Add multibyte character warning option to the assembler.
[binutils-gdb.git] / gas / NEWS
1 -*- text -*-
2
3 * Add support for the LoongArch instruction set.
4
5 * Add a command-line option, -muse-unaligned-vector-move, for x86 target
6 to encode aligned vector move as unaligned vector move.
7
8 * Add support for Cortex-R52+ for Arm.
9
10 * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
11
12 * Add support for Cortex-A710 for Arm.
13
14 * Add support for Scalable Matrix Extension (SME) for AArch64.
15
16 * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
17 assembler what to when it encoutners multibyte characters in the input. The
18 default is to allow them. Setting the option to "warn" will generate a
19 warning message whenever any multibyte character is encountered. Using the
20 option to "warn-sym-only" will make the assembler generate a warning whenever a
21 symbol is defined containing multibyte characters. (References to undefined
22 symbols will not generate warnings).
23
24 * Outputs of .ds.x directive and .tfloat directive with hex input from
25 x86 assembler have been reduced from 12 bytes to 10 bytes to match the
26 output of .tfloat directive.
27
28 * Add support for 'armv9-a' for -march in AArch64 GAS.
29
30 * Add support for 'armv9-a' for -march in Arm GAS.
31
32 * Add support for Intel AVX512_FP16 instructions.
33
34 Changes in 2.37:
35
36 * arm-symbianelf support removed.
37
38 * Add support for Realm Management Extension (RME) for AArch64.
39
40 Changes in 2.36:
41
42 * Add support for Intel AVX VNNI instructions.
43
44 * Add support for Intel HRESET instruction.
45
46 * Add support for Intel UINTR instructions.
47
48 * Support non-absolute segment values for i386 lcall and ljmp.
49
50 * When setting the link order attribute of ELF sections, it is now possible to
51 use a numeric section index instead of symbol name.
52
53 * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
54 AArch64 and ARM.
55 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
56
57 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
58 Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
59 Extension) system registers for AArch64.
60
61 * Add support for Armv8-R and Armv8.7-A AArch64.
62
63 * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
64 AArch64.
65
66 * Add support for +flagm feature for -march in Armv8.4 AArch64.
67
68 * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
69 64-byte load/store instructions for this feature.
70
71 * Add support for +pauth (Pointer Authentication) feature for -march in
72 AArch64.
73
74 * Add support for Intel TDX instructions.
75
76 * Add support for Intel Key Locker instructions.
77
78 * Added a .nop directive to generate a single no-op instruction in a target
79 neutral manner. This instruction does have an effect on DWARF line number
80 generation, if that is active.
81
82 * Removed --reduce-memory-overheads and --hash-size as gas now
83 uses hash tables that can be expand and shrink automatically.
84
85 * Add {disp16} pseudo prefix to x86 assembler.
86
87 * Add support for Intel AMX instructions.
88
89 * Configure with --enable-x86-used-note by default for Linux/x86.
90
91 * Add support for the SHF_GNU_RETAIN flag, which can be applied to
92 sections using the 'R' flag in the .section directive.
93 SHF_GNU_RETAIN specifies that the section should not be garbage
94 collected by the linker. It requires the GNU or FreeBSD ELF OSABIs.
95
96 Changes in 2.35:
97
98 * X86 NaCl target support is removed.
99
100 * Extend .symver directive to update visibility of the original symbol
101 and assign one original symbol to different versioned symbols.
102
103 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
104
105 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
106 -mlfence-before-ret= options to x86 assembler to help mitigate
107 CVE-2020-0551.
108
109 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
110 (if such output is being generated). Added the ability to generate
111 version 5 .debug_line sections.
112
113 * Add -mbig-obj support to i386 MingW targets.
114
115 Changes in 2.34:
116
117 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
118 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
119 options to x86 assembler to align branches within a fixed boundary
120 with segment prefixes or NOPs.
121
122 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
123
124 * Add support for z80-elf target.
125
126 * Add support for relocation of each byte or word of multibyte value to Z80
127 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
128 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
129
130 * Add SDCC support for Z80 targets.
131
132 Changes in 2.33:
133
134 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
135 instructions.
136
137 * Add support for the Arm Transactional Memory Extension (TME)
138 instructions.
139
140 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
141 instructions.
142
143 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
144 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
145 time option to set the default behavior. Set the default if the configure
146 option is not used to "no".
147
148 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
149 processors.
150
151 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
152 Cortex-A76AE, and Cortex-A77 processors.
153
154 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
155 floating point literals. Add .float16_format directive and
156 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
157 encoding.
158
159 * Add --gdwarf-cie-version command line flag. This allows control over which
160 version of DWARF CIE the assembler creates.
161
162 Changes in 2.32:
163
164 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
165 VEX.W-ignored (WIG) VEX instructions.
166
167 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
168 notes. Add a --enable-x86-used-note configure time option to set the
169 default behavior. Set the default if the configure option is not used
170 to "no".
171
172 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
173
174 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
175
176 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
177
178 * Add support for the C-SKY processor series.
179
180 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
181 ASE.
182
183 Changes in 2.31:
184
185 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
186 now only set the bottom bit of the address of thumb function symbols
187 if the -mthumb-interwork command line option is active.
188
189 * Add support for the MIPS Global INValidate (GINV) ASE.
190
191 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
192
193 * Add support for the Freescale S12Z architecture.
194
195 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
196 Build Attribute notes if none are present in the input sources. Add a
197 --enable-generate-build-notes=[yes|no] configure time option to set the
198 default behaviour. Set the default if the configure option is not used
199 to "no".
200
201 * Remove -mold-gcc command-line option for x86 targets.
202
203 * Add -O[2|s] command-line options to x86 assembler to enable alternate
204 shorter instruction encoding.
205
206 * Add support for .nops directive. It is currently supported only for
207 x86 targets.
208
209 Changes in 2.30:
210
211 * Add support for loaction views in DWARF debug line information.
212
213 Changes in 2.29:
214
215 * Add support for ELF SHF_GNU_MBIND.
216
217 * Add support for the WebAssembly file format and wasm32 ELF conversion.
218
219 * PowerPC gas now checks that the correct register class is used in
220 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
221 that the registers are invalid.
222
223 * Add support for the Texas Instruments PRU processor.
224
225 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
226 added to the ARM port.
227
228 Changes in 2.28:
229
230 * Add support for the RISC-V architecture.
231
232 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
233
234 Changes in 2.27:
235
236 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
237
238 * Add --no-pad-sections to stop the assembler from padding the end of output
239 sections up to their alignment boundary.
240
241 * Support for the ARMv8-M architecture has been added to the ARM port. Support
242 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
243 port.
244
245 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
246 .extCoreRegister pseudo-ops that allow an user to define custom
247 instructions, conditional codes, auxiliary and core registers.
248
249 * Add a configure option --enable-elf-stt-common to decide whether ELF
250 assembler should generate common symbols with the STT_COMMON type by
251 default. Default to no.
252
253 * New command-line option --elf-stt-common= for ELF targets to control
254 whether to generate common symbols with the STT_COMMON type.
255
256 * Add ability to set section flags and types via numeric values for ELF
257 based targets.
258
259 * Add a configure option --enable-x86-relax-relocations to decide whether
260 x86 assembler should generate relax relocations by default. Default to
261 yes, except for x86 Solaris targets older than Solaris 12.
262
263 * New command-line option -mrelax-relocations= for x86 target to control
264 whether to generate relax relocations.
265
266 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
267 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
268
269 * Add assembly-time relaxation option for ARC cpus.
270
271 * Add --with-cpu=TYPE configure option for ARC gas. This allows the default
272 cpu type to be adjusted at configure time.
273
274 Changes in 2.26:
275
276 * Add a configure option --enable-compressed-debug-sections={all,gas} to
277 decide whether DWARF debug sections should be compressed by default.
278
279 * Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
280 assembler support for Argonaut RISC architectures.
281
282 * Symbol and label names can now be enclosed in double quotes (") which allows
283 them to contain characters that are not part of valid symbol names in high
284 level languages.
285
286 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
287 previous spelling, -march=armv6zk, is still accepted.
288
289 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
290 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
291 extensions has also been added to the Aarch64 port.
292
293 * Support for the ARMv8.1 architecture has been added to the ARM port. Support
294 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
295 been added to the ARM port.
296
297 * Extend --compress-debug-sections option to support
298 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
299 targets.
300
301 * --compress-debug-sections is turned on for Linux/x86 by default.
302
303 Changes in 2.25:
304
305 * Add support for the AVR Tiny microcontrollers.
306
307 * Replace support for openrisc and or32 with support for or1k.
308
309 * Enhanced the ARM port to accept the assembler output from the CodeComposer
310 Studio tool. Support is enabled via the new command-line option -mccs.
311
312 * Add support for the Andes NDS32.
313
314 Changes in 2.24:
315
316 * Add support for the Texas Instruments MSP430X processor.
317
318 * Add -gdwarf-sections command-line option to enable per-code-section
319 generation of DWARF .debug_line sections.
320
321 * Add support for Altera Nios II.
322
323 * Add support for the Imagination Technologies Meta processor.
324
325 * Add support for the v850e3v5.
326
327 * Remove assembler support for MIPS ECOFF targets.
328
329 Changes in 2.23:
330
331 * Add support for the 64-bit ARM architecture: AArch64.
332
333 * Add support for S12X processor.
334
335 * Add support for the VLE extension to the PowerPC architecture.
336
337 * Add support for the Freescale XGATE architecture.
338
339 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
340 directives. These are currently available only for x86 and ARM targets.
341
342 * Add support for the Renesas RL78 architecture.
343
344 * Add support for the Adapteva EPIPHANY architecture.
345
346 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
347
348 Changes in 2.22:
349
350 * Add support for the Tilera TILEPro and TILE-Gx architectures.
351
352 Changes in 2.21:
353
354 * Gas no longer requires doubling of ampersands in macros.
355
356 * Add support for the TMS320C6000 (TI C6X) processor family.
357
358 * GAS now understands an extended syntax in the .section directive flags
359 for COFF targets that allows the section's alignment to be specified. This
360 feature has also been backported to the 2.20 release series, starting with
361 2.20.1.
362
363 * Add support for the Renesas RX processor.
364
365 * New command-line option, --compress-debug-sections, which requests
366 compression of DWARF debug information sections in the relocatable output
367 file. Compressed debug sections are supported by readelf, objdump, and
368 gold, but not currently by Gnu ld.
369
370 Changes in 2.20:
371
372 * Added support for v850e2 and v850e2v3.
373
374 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
375 pseudo op. It marks the symbol as being globally unique in the entire
376 process.
377
378 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
379 in binary rather than text.
380
381 * Add support for common symbol alignment to PE formats.
382
383 * Add support for the new discriminator column in the DWARF line table,
384 with a discriminator operand for the .loc directive.
385
386 * Add support for Sunplus score architecture.
387
388 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
389 indicate that if the symbol is the target of a relocation, its value should
390 not be use. Instead the function should be invoked and its result used as
391 the value.
392
393 * Add support for Lattice Mico32 (lm32) architecture.
394
395 * Add support for Xilinx MicroBlaze architecture.
396
397 Changes in 2.19:
398
399 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
400 tables without runtime relocation.
401
402 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
403 adds compatibility with H'00 style hex constants.
404
405 * New command-line option, -msse-check=[none|error|warning], for x86
406 targets.
407
408 * New sub-option added to the assembler's -a command-line switch to
409 generate a listing output. The 'g' sub-option will insert into the listing
410 various information about the assembly, such as assembler version, the
411 command-line options used, and a time stamp.
412
413 * New command-line option -msse2avx for x86 target to encode SSE
414 instructions with VEX prefix.
415
416 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
417
418 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
419 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
420 -mnaked-reg and -mold-gcc, for x86 targets.
421
422 * Support for generating wide character strings has been added via the new
423 pseudo ops: .string16, .string32 and .string64.
424
425 * Support for SSE5 has been added to the i386 port.
426
427 Changes in 2.18:
428
429 * The GAS sources are now released under the GPLv3.
430
431 * Support for the National Semiconductor CR16 target has been added.
432
433 * Added gas .reloc pseudo. This is a low-level interface for creating
434 relocations.
435
436 * Add support for x86_64 PE+ target.
437
438 * Add support for Score target.
439
440 Changes in 2.17:
441
442 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
443
444 * Support for ms2 architecture has been added.
445
446 * Support for the Z80 processor family has been added.
447
448 * Add support for the "@<file>" syntax to the command line, so that extra
449 switches can be read from <file>.
450
451 * The SH target supports a new command-line switch --enable-reg-prefix which,
452 if enabled, will allow register names to be optionally prefixed with a $
453 character. This allows register names to be distinguished from label names.
454
455 * Macros with a variable number of arguments are now supported. See the
456 documentation for how this works.
457
458 * Added --reduce-memory-overheads switch to reduce the size of the hash
459 tables used, at the expense of longer assembly times, and
460 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
461
462 * Macro names and macro parameter names can now be any identifier that would
463 also be legal as a symbol elsewhere. For macro parameter names, this is
464 known to cause problems in certain sources when the respective target uses
465 characters inconsistently, and thus macro parameter references may no longer
466 be recognized as such (see the documentation for details).
467
468 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
469 for the VAX target in order to be more compatible with the VAX MACRO
470 assembler.
471
472 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
473
474 Changes in 2.16:
475
476 * Redefinition of macros now results in an error.
477
478 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
479
480 * New command-line option -munwind-check=[warning|error] for IA64
481 targets.
482
483 * The IA64 port now uses automatic dependency violation removal as its default
484 mode.
485
486 * Port to MAXQ processor contributed by HCL Tech.
487
488 * Added support for generating unwind tables for ARM ELF targets.
489
490 * Add a -g command-line option to generate debug information in the target's
491 preferred debug format.
492
493 * Support for the crx-elf target added.
494
495 * Support for the sh-symbianelf target added.
496
497 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
498 on pe[i]-i386; required for this target's DWARF 2 support.
499
500 * Support for Motorola MCF521x/5249/547x/548x added.
501
502 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
503 instrucitons.
504
505 * New command-line option -mno-shared for MIPS ELF targets.
506
507 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
508 added to enter (and leave) alternate macro syntax mode.
509
510 Changes in 2.15:
511
512 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
513 deprecated and will be removed in a future release.
514
515 * Added PIC m32r Linux (ELF) and support to M32R assembler.
516
517 * Added support for ARM V6.
518
519 * Added support for sh4a and variants.
520
521 * Support for Renesas M32R2 added.
522
523 * Limited support for Mapping Symbols as specified in the ARM ELF
524 specification has been added to the arm assembler.
525
526 * On ARM architectures, added a new gas directive ".unreq" that undoes
527 definitions created by ".req".
528
529 * Support for Motorola ColdFire MCF528x added.
530
531 * Added --gstabs+ switch to enable the generation of STABS debug format
532 information with GNU extensions.
533
534 * Added support for MIPS64 Release 2.
535
536 * Added support for v850e1.
537
538 * Added -n switch for x86 assembler. By default, x86 GAS replaces
539 multiple nop instructions used for alignment within code sections
540 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
541 switch disables the optimization.
542
543 * Removed -n option from MIPS assembler. It was not useful, and confused the
544 existing -non_shared option.
545
546 Changes in 2.14:
547
548 * Added support for MIPS32 Release 2.
549
550 * Added support for Xtensa architecture.
551
552 * Support for Intel's iWMMXt processor (an ARM variant) added.
553
554 * An assembler test generator has been contributed and an example file that
555 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
556
557 * Support for SH2E added.
558
559 * GASP has now been removed.
560
561 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
562 DSP's contributed by Michael Hayes and Svein E. Seldal.
563
564 * Support for the Ubicom IP2xxx microcontroller added.
565
566 Changes in 2.13:
567
568 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
569 and FR500 included.
570
571 * Support for DLX processor added.
572
573 * GASP has now been deprecated and will be removed in a future release. Use
574 the macro facilities in GAS instead.
575
576 * GASP now correctly parses floating point numbers. Unless the base is
577 explicitly specified, they are interpreted as decimal numbers regardless of
578 the currently specified base.
579
580 Changes in 2.12:
581
582 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
583
584 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
585
586 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
587 specifying the target instruction set. The old method of specifying the
588 target processor has been deprecated, but is still accepted for
589 compatibility.
590
591 * Support for the VFP floating-point instruction set has been added to
592 the ARM assembler.
593
594 * New psuedo op: .incbin to include a set of binary data at a given point
595 in the assembly. Contributed by Anders Norlander.
596
597 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
598 but still works for compatability.
599
600 * The MIPS assembler no longer issues a warning by default when it
601 generates a nop instruction from a macro. The new command-line option
602 -n will turn on the warning.
603
604 Changes in 2.11:
605
606 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
607
608 * x86 gas now supports the full Pentium4 instruction set.
609
610 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
611
612 * Support for Motorola 68HC11 and 68HC12.
613
614 * Support for Texas Instruments TMS320C54x (tic54x).
615
616 * Support for IA-64.
617
618 * Support for i860, by Jason Eckhardt.
619
620 * Support for CRIS (Axis Communications ETRAX series).
621
622 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
623
624 * x86 gas -q command-line option quietens warnings about register size changes
625 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
626 translating various deprecated floating point instructions.
627
628 Changes in 2.10:
629
630 * Support for the ARM msr instruction was changed to only allow an immediate
631 operand when altering the flags field.
632
633 * Support for ATMEL AVR.
634
635 * Support for IBM 370 ELF. Somewhat experimental.
636
637 * Support for numbers with suffixes.
638
639 * Added support for breaking to the end of repeat loops.
640
641 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
642
643 * New .elseif pseudo-op added.
644
645 * New --fatal-warnings option.
646
647 * picoJava architecture support added.
648
649 * Motorola MCore 210 processor support added.
650
651 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
652 assembly programs with intel syntax.
653
654 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
655
656 * Added -gdwarf2 option to generate DWARF 2 debugging information.
657
658 * Full 16-bit mode support for i386.
659
660 * Greatly improved instruction operand checking for i386. This change will
661 produce errors or warnings on incorrect assembly code that previous versions
662 of gas accepted. If you get unexpected messages from code that worked with
663 older versions of gas, please double check the code before reporting a bug.
664
665 * Weak symbol support added for COFF targets.
666
667 * Mitsubishi D30V support added.
668
669 * Texas Instruments c80 (tms320c80) support added.
670
671 * i960 ELF support added.
672
673 * ARM ELF support added.
674
675 Changes in 2.9:
676
677 * Texas Instruments c30 (tms320c30) support added.
678
679 * The assembler now optimizes the exception frame information generated by egcs
680 and gcc 2.8. The new --traditional-format option disables this optimization.
681
682 * Added --gstabs option to generate stabs debugging information.
683
684 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
685 listing.
686
687 * Added -MD option to print dependencies.
688
689 Changes in 2.8:
690
691 * BeOS support added.
692
693 * MIPS16 support added.
694
695 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
696
697 * Alpha/VMS support added.
698
699 * m68k options --base-size-default-16, --base-size-default-32,
700 --disp-size-default-16, and --disp-size-default-32 added.
701
702 * The alignment directives now take an optional third argument, which is the
703 maximum number of bytes to skip. If doing the alignment would require
704 skipping more than the given number of bytes, the alignment is not done at
705 all.
706
707 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
708
709 * The -a option takes a new suboption, c (e.g., -alc), to skip false
710 conditionals in listings.
711
712 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
713 the symbol is already defined.
714
715 Changes in 2.7:
716
717 * The PowerPC assembler now allows the use of symbolic register names (r0,
718 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
719 can be used any time. PowerPC 860 move to/from SPR instructions have been
720 added.
721
722 * Alpha Linux (ELF) support added.
723
724 * PowerPC ELF support added.
725
726 * m68k Linux (ELF) support added.
727
728 * i960 Hx/Jx support added.
729
730 * i386/PowerPC gnu-win32 support added.
731
732 * SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
733 default is to build COFF-only support. To get a set of tools that generate
734 ELF (they'll understand both COFF and ELF), you must configure with
735 target=i386-unknown-sco3.2v5elf.
736
737 * m88k-motorola-sysv3* support added.
738
739 Changes in 2.6:
740
741 * Gas now directly supports macros, without requiring GASP.
742
743 * Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
744 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
745 ``.mri 0'' is seen; this can be convenient for inline assembler code.
746
747 * Added --defsym SYM=VALUE option.
748
749 * Added -mips4 support to MIPS assembler.
750
751 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
752
753 Changes in 2.4:
754
755 * Converted this directory to use an autoconf-generated configure script.
756
757 * ARM support, from Richard Earnshaw.
758
759 * Updated VMS support, from Pat Rankin, including considerably improved
760 debugging support.
761
762 * Support for the control registers in the 68060.
763
764 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
765 provide for possible future gcc changes, for targets where gas provides some
766 features not available in the native assembler. If the native assembler is
767 used, it should become obvious pretty quickly what the problem is.
768
769 * Usage message is available with "--help".
770
771 * The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
772 also, but didn't get into the NEWS file.)
773
774 * Weak symbol support for a.out.
775
776 * A bug in the listing code which could cause an infinite loop has been fixed.
777 Bugs in listings when generating a COFF object file have also been fixed.
778
779 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
780 Paul Kranenburg.
781
782 * Improved Alpha support. Immediate constants can have a much larger range
783 now. Support for the 21164 has been contributed by Digital.
784
785 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
786
787 Changes in 2.3:
788
789 * Mach i386 support, by David Mackenzie and Ken Raeburn.
790
791 * RS/6000 and PowerPC support by Ian Taylor.
792
793 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
794 based on mail received from various people. The `-h#' option should work
795 again too.
796
797 * HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
798 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
799 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
800 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
801 in the "dist" directory.
802
803 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
804 simple tests okay. I haven't put it through extensive testing. (GNU make is
805 currently required for BSD 4.3 builds.)
806
807 * Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
808 based on code donated by CMU, which used an a.out-based format. I'm afraid
809 the alpha-a.out support is pretty badly mangled, and much of it removed;
810 making it work will require rewriting it as BFD support for the format anyways.
811
812 * Irix 5 support.
813
814 * The test suites have been fixed up a bit, so that they should work with a
815 couple different versions of expect and dejagnu.
816
817 * Symbols' values are now handled internally as expressions, permitting more
818 flexibility in evaluating them in some cases. Some details of relocation
819 handling have also changed, and simple constant pool management has been
820 added, to make the Alpha port easier.
821
822 * New option "--statistics" for printing out program run times. This is
823 intended to be used with the gcc "-Q" option, which prints out times spent in
824 various phases of compilation. (You should be able to get all of them
825 printed out with "gcc -Q -Wa,--statistics", I think.)
826
827 Changes in 2.2:
828
829 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
830
831 * Configurations that are still in development (and therefore are convenient to
832 have listed in configure.in) still get rejected without a minor change to
833 gas/Makefile.in, so people not doing development work shouldn't get the
834 impression that support for such configurations is actually believed to be
835 reliable.
836
837 * The program name (usually "as") is printed when a fatal error message is
838 displayed. This should prevent some confusion about the source of occasional
839 messages about "internal errors".
840
841 * ELF support is falling into place. Support for the 386 should be working.
842 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
843
844 * Symbol values are maintained as expressions instead of being immediately
845 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
846 more complex calculations involving symbols whose values are not alreadey
847 known.
848
849 * DBX-style debugging info ("stabs") is now supported for COFF formats.
850 If any stabs directives are seen in the source, GAS will create two new
851 sections: a ".stab" and a ".stabstr" section. The format of the .stab
852 section is nearly identical to the a.out symbol format, and .stabstr is
853 its string table. For this to be useful, you must have configured GCC
854 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
855 that can use the stab sections (4.11 or later).
856
857 * LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
858 support is in progress.
859
860 Changes in 2.1:
861
862 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
863 incorporated, but not well tested yet.
864
865 * Altered the opcode table split for m68k; it should require less VM to compile
866 with gcc now.
867
868 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
869 suggested by Ronald Cole.
870
871 * HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
872 includes improved ELF support, which I've started adapting for SPARC Solaris
873 2.x. Integration isn't completely, so it probably won't work.
874
875 * HP9000/300 support, donated by HP, has been merged in.
876
877 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
878
879 * Better error messages for unsupported configurations (e.g., hppa-hpux).
880
881 * Test suite framework is starting to become reasonable.
882
883 Changes in 2.0:
884
885 * Mostly bug fixes.
886
887 * Some more merging of BFD and ELF code, but ELF still doesn't work.
888
889 Changes in 1.94:
890
891 * BFD merge is partly done. Adventurous souls may try giving configure the
892 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
893 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
894 or "solaris". (ELF isn't really supported yet. It needs work. I've got
895 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
896 fully merged yet.)
897
898 * The 68K opcode table has been split in half. It should now compile under gcc
899 without consuming ridiculous amounts of memory.
900
901 * A couple data structures have been reduced in size. This should result in
902 saving a little bit of space at runtime.
903
904 * Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
905 code provided ROSE format support, which I haven't merged in yet. (I can
906 make it available, if anyone wants to try it out.) Ralph's code, for BSD
907 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
908 coming.
909
910 * Support for the Hitachi H8/500 has been added.
911
912 * VMS host and target support should be working now, thanks chiefly to Eric
913 Youngdale.
914
915 Changes in 1.93.01:
916
917 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
918
919 * For i386, .align is now power-of-two; was number-of-bytes.
920
921 * For m68k, "%" is now accepted before register names. For COFF format, which
922 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
923 can be distinguished from the register.
924
925 * Last public release was 1.38. Lots of configuration changes since then, lots
926 of new CPUs and formats, lots of bugs fixed.
927
928 \f
929 Copyright (C) 2012-2021 Free Software Foundation, Inc.
930
931 Copying and distribution of this file, with or without modification,
932 are permitted in any medium without royalty provided the copyright
933 notice and this notice are preserved.
934
935 Local variables:
936 fill-column: 79
937 End: