gas/NEWS

   1 -*- text -*-
   2
   3 Changes in 2.39:
   4
   5 * Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and
   6   Intel K1OM.
   7
   8 Changes in 2.38:
   9
  10 * Add support for AArch64 system registers that were missing in previous
  11   releases.
  12
  13 * Add support for the LoongArch instruction set.
  14
  15 * Add a command-line option, -muse-unaligned-vector-move, for x86 target
  16   to encode aligned vector move as unaligned vector move.
  17
  18 * Add support for Cortex-R52+ for Arm.
  19
  20 * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
  21
  22 * Add support for Cortex-A710 for Arm.
  23
  24 * Add support for Scalable Matrix Extension (SME) for AArch64.
  25
  26 * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
  27   assembler what to when it encoutners multibyte characters in the input.  The
  28   default is to allow them.  Setting the option to "warn" will generate a
  29   warning message whenever any multibyte character is encountered.  Using the
  30   option to "warn-sym-only" will make the assembler generate a warning whenever a
  31   symbol is defined containing multibyte characters.  (References to undefined
  32   symbols will not generate warnings).
  33
  34 * Outputs of .ds.x directive and .tfloat directive with hex input from
  35   x86 assembler have been reduced from 12 bytes to 10 bytes to match the
  36   output of .tfloat directive.
  37
  38 * Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and
  39   'armv9.3-a' for -march in AArch64 GAS.
  40
  41 * Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a',
  42   'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS.
  43
  44 * Add support for Intel AVX512_FP16 instructions.
  45
  46 * Add support for the RISC-V scalar crypto extension, version 1.0.0.
  47
  48 * Add support for the RISC-V vector extension, version 1.0.
  49
  50 * Add support for the Z{f,d,q}inx extensions, version 1.0.0-rc.
  51
  52 * Add support for the RISC-V svinval extension, version 1.0.
  53
  54 * Add support for the RISC-V hypervisor extension, as defined by Privileged
  55   Specification 1.12.
  56
  57 Changes in 2.37:
  58
  59 * arm-symbianelf support removed.
  60
  61 * Add support for Realm Management Extension (RME) for AArch64.
  62
  63 * Add support for the Zba, Zbb, Zbc, and Zbs subsets of the RISC-V
  64   bit manipulation extension, version 0.93.
  65
  66 Changes in 2.36:
  67
  68 * Add support for Intel AVX VNNI instructions.
  69
  70 * Add support for Intel HRESET instruction.
  71
  72 * Add support for Intel UINTR instructions.
  73
  74 * Support non-absolute segment values for i386 lcall and ljmp.
  75
  76 * When setting the link order attribute of ELF sections, it is now possible to
  77   use a numeric section index instead of symbol name.
  78
  79 * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
  80   AArch64 and ARM.
  81   Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
  82
  83 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
  84   Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
  85   Extension) system registers for AArch64.
  86
  87 * Add support for Armv8-R and Armv8.7-A AArch64.
  88
  89 * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
  90   AArch64.
  91
  92 * Add support for +flagm feature for -march in Armv8.4 AArch64.
  93
  94 * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
  95   64-byte load/store instructions for this feature.
  96
  97 * Add support for +pauth (Pointer Authentication) feature for -march in
  98   AArch64.
  99
 100 * Add support for Intel TDX instructions.
 101
 102 * Add support for Intel Key Locker instructions.
 103
 104 * Added a .nop directive to generate a single no-op instruction in a target
 105   neutral manner.  This instruction does have an effect on DWARF line number
 106   generation, if that is active.
 107
 108 * Removed --reduce-memory-overheads and --hash-size as gas now
 109   uses hash tables that can be expand and shrink automatically.
 110
 111 * Add {disp16} pseudo prefix to x86 assembler.
 112
 113 * Add support for Intel AMX instructions.
 114
 115 * Configure with --enable-x86-used-note by default for Linux/x86.
 116
 117 * Add support for the SHF_GNU_RETAIN flag, which can be applied to
 118   sections using the 'R' flag in the .section directive.
 119   SHF_GNU_RETAIN specifies that the section should not be garbage
 120   collected by the linker.  It requires the GNU or FreeBSD ELF OSABIs.
 121
 122 * Add support for the RISC-V Zihintpause extension.
 123
 124 Changes in 2.35:
 125
 126 * X86 NaCl target support is removed.
 127
 128 * Extend .symver directive to update visibility of the original symbol
 129   and assign one original symbol to different versioned symbols.
 130
 131 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
 132
 133 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
 134   -mlfence-before-ret= options to x86 assembler to help mitigate
 135   CVE-2020-0551.
 136
 137 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
 138   (if such output is being generated).  Added the ability to generate
 139   version 5 .debug_line sections.
 140
 141 * Add -mbig-obj support to i386 MingW targets.
 142
 143 * Add support for the -mriscv-isa-version argument, to select the version of
 144   the RISC-V ISA specification used when assembling.
 145
 146 * Remove support for the RISC-V privileged specification, version 1.9.
 147
 148 Changes in 2.34:
 149
 150 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
 151   -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
 152   options to x86 assembler to align branches within a fixed boundary
 153   with segment prefixes or NOPs.
 154
 155 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
 156
 157 * Add support for z80-elf target.
 158
 159 * Add support for relocation of each byte or word of multibyte value to Z80
 160   targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
 161   with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
 162
 163 * Add SDCC support for Z80 targets.
 164
 165 Changes in 2.33:
 166
 167 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
 168   instructions.
 169
 170 * Add support for the Arm Transactional Memory Extension (TME)
 171   instructions.
 172
 173 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
 174   instructions.
 175
 176 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
 177   LLSC Errata.  Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
 178   time option to set the default behavior. Set the default if the configure
 179   option is not used to "no".
 180
 181 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
 182   processors.
 183
 184 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
 185   Cortex-A76AE, and Cortex-A77 processors.
 186
 187 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
 188   floating point literals.  Add .float16_format directive and
 189   -mfp16-format=[ieee|alternative] option for Arm to control the format of the
 190   encoding.
 191
 192 * Add --gdwarf-cie-version command line flag.  This allows control over which
 193   version of DWARF CIE the assembler creates.
 194
 195 Changes in 2.32:
 196
 197 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
 198   VEX.W-ignored (WIG) VEX instructions.
 199
 200 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
 201   notes.  Add a --enable-x86-used-note configure time option to set the
 202   default behavior.  Set the default if the configure option is not used
 203   to "no".
 204
 205 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
 206
 207 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
 208
 209 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
 210
 211 * Add support for the C-SKY processor series.
 212
 213 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
 214   ASE.
 215
 216 Changes in 2.31:
 217
 218 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
 219   now only set the bottom bit of the address of thumb function symbols
 220   if the -mthumb-interwork command line option is active.
 221
 222 * Add support for the MIPS Global INValidate (GINV) ASE.
 223
 224 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
 225
 226 * Add support for the Freescale S12Z architecture.
 227
 228 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
 229   Build Attribute notes if none are present in the input sources.  Add a
 230   --enable-generate-build-notes=[yes|no] configure time option to set the
 231   default behaviour.  Set the default if the configure option is not used
 232   to "no".
 233
 234 * Remove -mold-gcc command-line option for x86 targets.
 235
 236 * Add -O[2|s] command-line options to x86 assembler to enable alternate
 237   shorter instruction encoding.
 238
 239 * Add support for .nops directive.  It is currently supported only for
 240   x86 targets.
 241
 242 * Add support for the .insn directive on RISC-V targets.
 243
 244 Changes in 2.30:
 245
 246 * Add support for loaction views in DWARF debug line information.
 247
 248 Changes in 2.29:
 249
 250 * Add support for ELF SHF_GNU_MBIND.
 251
 252 * Add support for the WebAssembly file format and wasm32 ELF conversion.
 253
 254 * PowerPC gas now checks that the correct register class is used in
 255   instructions.  For instance, "addi %f4,%cr3,%r31" warns three times
 256   that the registers are invalid.
 257
 258 * Add support for the Texas Instruments PRU processor.
 259
 260 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
 261   added to the ARM port.
 262
 263 Changes in 2.28:
 264
 265 * Add support for the RISC-V architecture.
 266
 267 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
 268
 269 Changes in 2.27:
 270
 271 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
 272
 273 * Add --no-pad-sections to stop the assembler from padding the end of output
 274   sections up to their alignment boundary.
 275
 276 * Support for the ARMv8-M architecture has been added to the ARM port.  Support
 277   for the ARMv8-M Security and DSP Extensions has also been added to the ARM
 278   port.
 279
 280 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
 281   .extCoreRegister pseudo-ops that allow an user to define custom
 282   instructions, conditional codes, auxiliary and core registers.
 283
 284 * Add a configure option --enable-elf-stt-common to decide whether ELF
 285   assembler should generate common symbols with the STT_COMMON type by
 286   default.  Default to no.
 287
 288 * New command-line option --elf-stt-common= for ELF targets to control
 289   whether to generate common symbols with the STT_COMMON type.
 290
 291 * Add ability to set section flags and types via numeric values for ELF
 292   based targets.
 293
 294 * Add a configure option --enable-x86-relax-relocations to decide whether
 295   x86 assembler should generate relax relocations by default.  Default to
 296   yes, except for x86 Solaris targets older than Solaris 12.
 297
 298 * New command-line option -mrelax-relocations= for x86 target to control
 299   whether to generate relax relocations.
 300
 301 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
 302   lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
 303
 304 * Add assembly-time relaxation option for ARC cpus.
 305
 306 * Add --with-cpu=TYPE configure option for ARC gas.  This allows the default
 307   cpu type to be adjusted at configure time.
 308
 309 Changes in 2.26:
 310
 311 * Add a configure option --enable-compressed-debug-sections={all,gas} to
 312   decide whether DWARF debug sections should be compressed by default.
 313
 314 * Add support for the ARC EM/HS, and ARC600/700 architectures.  Remove
 315   assembler support for Argonaut RISC architectures.
 316
 317 * Symbol and label names can now be enclosed in double quotes (") which allows
 318   them to contain characters that are not part of valid symbol names in high
 319   level languages.
 320
 321 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support.  The
 322   previous spelling, -march=armv6zk, is still accepted.
 323
 324 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
 325   Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
 326   extensions has also been added to the Aarch64 port.
 327
 328 * Support for the ARMv8.1 architecture has been added to the ARM port.  Support
 329   for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
 330   been added to the ARM port.
 331
 332 * Extend --compress-debug-sections option to support
 333   --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
 334   targets.
 335
 336 * --compress-debug-sections is turned on for Linux/x86 by default.
 337
 338 Changes in 2.25:
 339
 340 * Add support for the AVR Tiny microcontrollers.
 341
 342 * Replace support for openrisc and or32 with support for or1k.
 343
 344 * Enhanced the ARM port to accept the assembler output from the CodeComposer
 345   Studio tool.  Support is enabled via the new command-line option -mccs.
 346
 347 * Add support for the Andes NDS32.
 348
 349 Changes in 2.24:
 350
 351 * Add support for the Texas Instruments MSP430X processor.
 352
 353 * Add -gdwarf-sections command-line option to enable per-code-section
 354   generation of DWARF .debug_line sections.
 355
 356 * Add support for Altera Nios II.
 357
 358 * Add support for the Imagination Technologies Meta processor.
 359
 360 * Add support for the v850e3v5.
 361
 362 * Remove assembler support for MIPS ECOFF targets.
 363
 364 Changes in 2.23:
 365
 366 * Add support for the 64-bit ARM architecture: AArch64.
 367
 368 * Add support for S12X processor.
 369
 370 * Add support for the VLE extension to the PowerPC architecture.
 371
 372 * Add support for the Freescale XGATE architecture.
 373
 374 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
 375   directives.  These are currently available only for x86 and ARM targets.
 376
 377 * Add support for the Renesas RL78 architecture.
 378
 379 * Add support for the Adapteva EPIPHANY architecture.
 380
 381 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
 382
 383 Changes in 2.22:
 384
 385 * Add support for the Tilera TILEPro and TILE-Gx architectures.
 386
 387 Changes in 2.21:
 388
 389 * Gas no longer requires doubling of ampersands in macros.
 390
 391 * Add support for the TMS320C6000 (TI C6X) processor family.
 392
 393 * GAS now understands an extended syntax in the .section directive flags
 394   for COFF targets that allows the section's alignment to be specified.  This
 395   feature has also been backported to the 2.20 release series, starting with
 396   2.20.1.
 397
 398 * Add support for the Renesas RX processor.
 399
 400 * New command-line option, --compress-debug-sections, which requests
 401   compression of DWARF debug information sections in the relocatable output
 402   file.  Compressed debug sections are supported by readelf, objdump, and
 403   gold, but not currently by Gnu ld.
 404
 405 Changes in 2.20:
 406
 407 * Added support for v850e2 and v850e2v3.
 408
 409 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
 410   pseudo op.  It marks the symbol as being globally unique in the entire
 411   process.
 412
 413 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
 414   in binary rather than text.
 415
 416 * Add support for common symbol alignment to PE formats.
 417
 418 * Add support for the new discriminator column in the DWARF line table,
 419   with a discriminator operand for the .loc directive.
 420
 421 * Add support for Sunplus score architecture.
 422
 423 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
 424   indicate that if the symbol is the target of a relocation, its value should
 425   not be use.  Instead the function should be invoked and its result used as
 426   the value.
 427
 428 * Add support for Lattice Mico32 (lm32) architecture.
 429
 430 * Add support for Xilinx MicroBlaze architecture.
 431
 432 Changes in 2.19:
 433
 434 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
 435   tables without runtime relocation.
 436
 437 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
 438   adds compatibility with H'00 style hex constants.
 439
 440 * New command-line option, -msse-check=[none|error|warning], for x86
 441   targets.
 442
 443 * New sub-option added to the assembler's -a command-line switch to
 444   generate a listing output.  The 'g' sub-option will insert into the listing
 445   various information about the assembly, such as assembler version, the
 446   command-line options used, and a time stamp.
 447
 448 * New command-line option -msse2avx for x86 target to encode SSE
 449   instructions with VEX prefix.
 450
 451 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
 452
 453 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
 454   -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
 455   -mnaked-reg and -mold-gcc, for x86 targets.
 456
 457 * Support for generating wide character strings has been added via the new
 458   pseudo ops: .string16, .string32 and .string64.
 459
 460 * Support for SSE5 has been added to the i386 port.
 461
 462 Changes in 2.18:
 463
 464 * The GAS sources are now released under the GPLv3.
 465
 466 * Support for the National Semiconductor CR16 target has been added.
 467
 468 * Added gas .reloc pseudo.  This is a low-level interface for creating
 469   relocations.
 470
 471 * Add support for x86_64 PE+ target.
 472
 473 * Add support for Score target.
 474
 475 Changes in 2.17:
 476
 477 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
 478
 479 * Support for ms2 architecture has been added.
 480
 481 * Support for the Z80 processor family has been added.
 482
 483 * Add support for the "@<file>" syntax to the command line, so that extra
 484   switches can be read from <file>.
 485
 486 * The SH target supports a new command-line switch --enable-reg-prefix which,
 487   if enabled, will allow register names to be optionally prefixed with a $
 488   character.  This allows register names to be distinguished from label names.
 489
 490 * Macros with a variable number of arguments are now supported. See the
 491   documentation for how this works.
 492
 493 * Added --reduce-memory-overheads switch to reduce the size of the hash
 494   tables used, at the expense of longer assembly times, and
 495   --hash-size=<NUMBER> to set the size of the hash tables used by gas.
 496
 497 * Macro names and macro parameter names can now be any identifier that would
 498   also be legal as a symbol elsewhere. For macro parameter names, this is
 499   known to cause problems in certain sources when the respective target uses
 500   characters inconsistently, and thus macro parameter references may no longer
 501   be recognized as such (see the documentation for details).
 502
 503 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
 504   for the VAX target in order to be more compatible with the VAX MACRO
 505   assembler.
 506
 507 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
 508
 509 Changes in 2.16:
 510
 511 * Redefinition of macros now results in an error.
 512
 513 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
 514
 515 * New command-line option -munwind-check=[warning|error] for IA64
 516   targets.
 517
 518 * The IA64 port now uses automatic dependency violation removal as its default
 519   mode.
 520
 521 * Port to MAXQ processor contributed by HCL Tech.
 522
 523 * Added support for generating unwind tables for ARM ELF targets.
 524
 525 * Add a -g command-line option to generate debug information in the target's
 526   preferred debug format.
 527
 528 * Support for the crx-elf target added.
 529
 530 * Support for the sh-symbianelf target added.
 531
 532 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
 533   on pe[i]-i386; required for this target's DWARF 2 support.
 534
 535 * Support for Motorola MCF521x/5249/547x/548x added.
 536
 537 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
 538   instrucitons.
 539
 540 * New command-line option -mno-shared for MIPS ELF targets.
 541
 542 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
 543   added to enter (and leave) alternate macro syntax mode.
 544
 545 Changes in 2.15:
 546
 547 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
 548   deprecated and will be removed in a future release.
 549
 550 * Added PIC m32r Linux (ELF) and support to M32R assembler.
 551
 552 * Added support for ARM V6.
 553
 554 * Added support for sh4a and variants.
 555
 556 * Support for Renesas M32R2 added.
 557
 558 * Limited support for Mapping Symbols as specified in the ARM ELF
 559   specification has been added to the arm assembler.
 560
 561 * On ARM architectures, added a new gas directive ".unreq" that undoes
 562   definitions created by ".req".
 563
 564 * Support for Motorola ColdFire MCF528x added.
 565
 566 * Added --gstabs+ switch to enable the generation of STABS debug format
 567   information with GNU extensions.
 568
 569 * Added support for MIPS64 Release 2.
 570
 571 * Added support for v850e1.
 572
 573 * Added -n switch for x86 assembler.  By default, x86 GAS replaces
 574   multiple nop instructions used for alignment within code sections
 575   with multi-byte nop instructions such as leal 0(%esi,1),%esi.  This
 576   switch disables the optimization.
 577
 578 * Removed -n option from MIPS assembler.  It was not useful, and confused the
 579   existing -non_shared option.
 580
 581 Changes in 2.14:
 582
 583 * Added support for MIPS32 Release 2.
 584
 585 * Added support for Xtensa architecture.
 586
 587 * Support for Intel's iWMMXt processor (an ARM variant) added.
 588
 589 * An assembler test generator has been contributed and an example file that
 590   uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
 591
 592 * Support for SH2E added.
 593
 594 * GASP has now been removed.
 595
 596 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
 597   DSP's contributed by Michael Hayes and Svein E. Seldal.
 598
 599 * Support for the Ubicom IP2xxx microcontroller added.
 600
 601 Changes in 2.13:
 602
 603 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
 604   and FR500 included.
 605
 606 * Support for DLX processor added.
 607
 608 * GASP has now been deprecated and will be removed in a future release.  Use
 609   the macro facilities in GAS instead.
 610
 611 * GASP now correctly parses floating point numbers. Unless the base is
 612   explicitly specified, they are interpreted as decimal numbers regardless of
 613   the currently specified base.
 614
 615 Changes in 2.12:
 616
 617 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
 618
 619 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
 620
 621 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
 622   specifying the target instruction set.  The old method of specifying the
 623   target processor has been deprecated, but is still accepted for
 624   compatibility.
 625
 626 * Support for the VFP floating-point instruction set has been added to
 627   the ARM assembler.
 628
 629 * New psuedo op: .incbin to include a set of binary data at a given point
 630   in the assembly.  Contributed by Anders Norlander.
 631
 632 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
 633   but still works for compatability.
 634
 635 * The MIPS assembler no longer issues a warning by default when it
 636   generates a nop instruction from a macro. The new command-line option
 637   -n will turn on the warning.
 638
 639 Changes in 2.11:
 640
 641 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
 642
 643 * x86 gas now supports the full Pentium4 instruction set.
 644
 645 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
 646
 647 * Support for Motorola 68HC11 and 68HC12.
 648
 649 * Support for Texas Instruments TMS320C54x (tic54x).
 650
 651 * Support for IA-64.
 652
 653 * Support for i860, by Jason Eckhardt.
 654
 655 * Support for CRIS (Axis Communications ETRAX series).
 656
 657 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
 658
 659 * x86 gas -q command-line option quietens warnings about register size changes
 660   due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
 661   translating various deprecated floating point instructions.
 662
 663 Changes in 2.10:
 664
 665 * Support for the ARM msr instruction was changed to only allow an immediate
 666   operand when altering the flags field.
 667
 668 * Support for ATMEL AVR.
 669
 670 * Support for IBM 370 ELF.  Somewhat experimental.
 671
 672 * Support for numbers with suffixes.
 673
 674 * Added support for breaking to the end of repeat loops.
 675
 676 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
 677
 678 * New .elseif pseudo-op added.
 679
 680 * New --fatal-warnings option.
 681
 682 * picoJava architecture support added.
 683
 684 * Motorola MCore 210 processor support added.
 685
 686 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
 687   assembly programs with intel syntax.
 688
 689 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
 690
 691 * Added -gdwarf2 option to generate DWARF 2 debugging information.
 692
 693 * Full 16-bit mode support for i386.
 694
 695 * Greatly improved instruction operand checking for i386.  This change will
 696   produce errors or warnings on incorrect assembly code that previous versions
 697   of gas accepted.  If you get unexpected messages from code that worked with
 698   older versions of gas, please double check the code before reporting a bug.
 699
 700 * Weak symbol support added for COFF targets.
 701
 702 * Mitsubishi D30V support added.
 703
 704 * Texas Instruments c80 (tms320c80) support added.
 705
 706 * i960 ELF support added.
 707
 708 * ARM ELF support added.
 709
 710 Changes in 2.9:
 711
 712 * Texas Instruments c30 (tms320c30) support added.
 713
 714 * The assembler now optimizes the exception frame information generated by egcs
 715   and gcc 2.8.  The new --traditional-format option disables this optimization.
 716
 717 * Added --gstabs option to generate stabs debugging information.
 718
 719 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
 720   listing.
 721
 722 * Added -MD option to print dependencies.
 723
 724 Changes in 2.8:
 725
 726 * BeOS support added.
 727
 728 * MIPS16 support added.
 729
 730 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
 731
 732 * Alpha/VMS support added.
 733
 734 * m68k options --base-size-default-16, --base-size-default-32,
 735   --disp-size-default-16, and --disp-size-default-32 added.
 736
 737 * The alignment directives now take an optional third argument, which is the
 738   maximum number of bytes to skip.  If doing the alignment would require
 739   skipping more than the given number of bytes, the alignment is not done at
 740   all.
 741
 742 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
 743
 744 * The -a option takes a new suboption, c (e.g., -alc), to skip false
 745   conditionals in listings.
 746
 747 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
 748   the symbol is already defined.
 749
 750 Changes in 2.7:
 751
 752 * The PowerPC assembler now allows the use of symbolic register names (r0,
 753   etc.) if -mregnames is used.  Symbolic names preceded by a '%' (%r0, etc.)
 754   can be used any time.  PowerPC 860 move to/from SPR instructions have been
 755   added.
 756
 757 * Alpha Linux (ELF) support added.
 758
 759 * PowerPC ELF support added.
 760
 761 * m68k Linux (ELF) support added.
 762
 763 * i960 Hx/Jx support added.
 764
 765 * i386/PowerPC gnu-win32 support added.
 766
 767 * SCO ELF support added.  For OpenServer 5 targets (i386-unknown-sco3.2v5) the
 768   default is to build COFF-only support.  To get a set of tools that generate
 769   ELF (they'll understand both COFF and ELF), you must configure with
 770   target=i386-unknown-sco3.2v5elf.
 771
 772 * m88k-motorola-sysv3* support added.
 773
 774 Changes in 2.6:
 775
 776 * Gas now directly supports macros, without requiring GASP.
 777
 778 * Gas now has an MRI assembler compatibility mode.  Use -M or --mri to select
 779   MRI mode.  The pseudo-op ``.mri 1'' will switch into the MRI mode until the
 780   ``.mri 0'' is seen; this can be convenient for inline assembler code.
 781
 782 * Added --defsym SYM=VALUE option.
 783
 784 * Added -mips4 support to MIPS assembler.
 785
 786 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
 787
 788 Changes in 2.4:
 789
 790 * Converted this directory to use an autoconf-generated configure script.
 791
 792 * ARM support, from Richard Earnshaw.
 793
 794 * Updated VMS support, from Pat Rankin, including considerably improved
 795   debugging support.
 796
 797 * Support for the control registers in the 68060.
 798
 799 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
 800   provide for possible future gcc changes, for targets where gas provides some
 801   features not available in the native assembler.  If the native assembler is
 802   used, it should become obvious pretty quickly what the problem is.
 803
 804 * Usage message is available with "--help".
 805
 806 * The GNU Assembler Preprocessor (gasp) is included.  (Actually, it was in 2.3
 807   also, but didn't get into the NEWS file.)
 808
 809 * Weak symbol support for a.out.
 810
 811 * A bug in the listing code which could cause an infinite loop has been fixed.
 812   Bugs in listings when generating a COFF object file have also been fixed.
 813
 814 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
 815   Paul Kranenburg.
 816
 817 * Improved Alpha support.  Immediate constants can have a much larger range
 818   now. Support for the 21164 has been contributed by Digital.
 819
 820 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
 821
 822 Changes in 2.3:
 823
 824 * Mach i386 support, by David Mackenzie and Ken Raeburn.
 825
 826 * RS/6000 and PowerPC support by Ian Taylor.
 827
 828 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
 829   based on mail received from various people.  The `-h#' option should work
 830   again too.
 831
 832 * HP-PA work, by Jeff Law.  Note, for the PA, gas-2.3 has been designed to work
 833   with gdb-4.12 and gcc-2.6.  As gcc-2.6 has not been released yet, a special
 834   version of gcc-2.5.8 has been patched to work with gas-2.3.  You can retrieve
 835   this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
 836   in the "dist" directory.
 837
 838 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
 839   simple tests okay.  I haven't put it through extensive testing.  (GNU make is
 840   currently required for BSD 4.3 builds.)
 841
 842 * Support for the DEC Alpha, running OSF/1 (ECOFF format).  The gas support is
 843   based on code donated by CMU, which used an a.out-based format.  I'm afraid
 844   the alpha-a.out support is pretty badly mangled, and much of it removed;
 845   making it work will require rewriting it as BFD support for the format anyways.
 846
 847 * Irix 5 support.
 848
 849 * The test suites have been fixed up a bit, so that they should work with a
 850   couple different versions of expect and dejagnu.
 851
 852 * Symbols' values are now handled internally as expressions, permitting more
 853   flexibility in evaluating them in some cases.  Some details of relocation
 854   handling have also changed, and simple constant pool management has been
 855   added, to make the Alpha port easier.
 856
 857 * New option "--statistics" for printing out program run times.  This is
 858   intended to be used with the gcc "-Q" option, which prints out times spent in
 859   various phases of compilation.  (You should be able to get all of them
 860   printed out with "gcc -Q -Wa,--statistics", I think.)
 861
 862 Changes in 2.2:
 863
 864 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
 865
 866 * Configurations that are still in development (and therefore are convenient to
 867   have listed in configure.in) still get rejected without a minor change to
 868   gas/Makefile.in, so people not doing development work shouldn't get the
 869   impression that support for such configurations is actually believed to be
 870   reliable.
 871
 872 * The program name (usually "as") is printed when a fatal error message is
 873   displayed.  This should prevent some confusion about the source of occasional
 874   messages about "internal errors".
 875
 876 * ELF support is falling into place.  Support for the 386 should be working.
 877   Support for SPARC Solaris is in.  HPPA support from Utah is being integrated.
 878
 879 * Symbol values are maintained as expressions instead of being immediately
 880   boiled down to add-symbol, sub-symbol, and constant.  This permits slightly
 881   more complex calculations involving symbols whose values are not alreadey
 882   known.
 883
 884 * DBX-style debugging info ("stabs") is now supported for COFF formats.
 885   If any stabs directives are seen in the source, GAS will create two new
 886   sections: a ".stab" and a ".stabstr" section.  The format of the .stab
 887   section is nearly identical to the a.out symbol format, and .stabstr is
 888   its string table.  For this to be useful, you must have configured GCC
 889   to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
 890   that can use the stab sections (4.11 or later).
 891
 892 * LynxOS, on i386 and m68k platforms, is now supported.  SPARC LynxOS
 893   support is in progress.
 894
 895 Changes in 2.1:
 896
 897 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
 898   incorporated, but not well tested yet.
 899
 900 * Altered the opcode table split for m68k; it should require less VM to compile
 901   with gcc now.
 902
 903 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
 904   suggested by Ronald Cole.
 905
 906 * HPPA support (running OSF only, not HPUX) has been contributed by Utah.  This
 907   includes improved ELF support, which I've started adapting for SPARC Solaris
 908   2.x.  Integration isn't completely, so it probably won't work.
 909
 910 * HP9000/300 support, donated by HP, has been merged in.
 911
 912 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
 913
 914 * Better error messages for unsupported configurations (e.g., hppa-hpux).
 915
 916 * Test suite framework is starting to become reasonable.
 917
 918 Changes in 2.0:
 919
 920 * Mostly bug fixes.
 921
 922 * Some more merging of BFD and ELF code, but ELF still doesn't work.
 923
 924 Changes in 1.94:
 925
 926 * BFD merge is partly done.  Adventurous souls may try giving configure the
 927   "--with-bfd-assembler" option.  Currently, ELF format requires it, a.out
 928   format accepts it; SPARC CPU accepts it.  It's the default only for OS "elf"
 929   or "solaris".  (ELF isn't really supported yet.  It needs work.  I've got
 930   some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
 931   fully merged yet.)
 932
 933 * The 68K opcode table has been split in half.  It should now compile under gcc
 934   without consuming ridiculous amounts of memory.
 935
 936 * A couple data structures have been reduced in size.  This should result in
 937   saving a little bit of space at runtime.
 938
 939 * Support for MIPS, from OSF and Ralph Campbell, has been merged in.  The OSF
 940   code provided ROSE format support, which I haven't merged in yet.  (I can
 941   make it available, if anyone wants to try it out.)  Ralph's code, for BSD
 942   4.4, supports a.out format.  We don't have ECOFF support in just yet; it's
 943   coming.
 944
 945 * Support for the Hitachi H8/500 has been added.
 946
 947 * VMS host and target support should be working now, thanks chiefly to Eric
 948   Youngdale.
 949
 950 Changes in 1.93.01:
 951
 952 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
 953
 954 * For i386, .align is now power-of-two; was number-of-bytes.
 955
 956 * For m68k, "%" is now accepted before register names.  For COFF format, which
 957   doesn't use underscore prefixes for C labels, it is required, so variable "a0"
 958   can be distinguished from the register.
 959
 960 * Last public release was 1.38.  Lots of configuration changes since then, lots
 961   of new CPUs and formats, lots of bugs fixed.
 962
 963 \f
 964 Copyright (C) 2012-2022 Free Software Foundation, Inc.
 965
 966 Copying and distribution of this file, with or without modification,
 967 are permitted in any medium without royalty provided the copyright
 968 notice and this notice are preserved.
 969
 970 Local variables:
 971 fill-column: 79
 972 End: