gas/config/m68k-parse.h

   1 /* m68k-parse.h -- header file for m68k assembler
   2    Copyright (C) 1987, 91, 92, 93, 94, 1995 Free Software Foundation, Inc.
   3
   4    This file is part of GAS, the GNU Assembler.
   5
   6    GAS is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2, or (at your option)
   9    any later version.
  10
  11    GAS is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with GAS; see the file COPYING.  If not, write to the Free
  18    Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  19    02111-1307, USA.  */
  20
  21 #ifndef M68K_PARSE_H
  22 #define M68K_PARSE_H
  23
  24 /* This header file defines things which are shared between the
  25    operand parser in m68k.y and the m68k assembler proper in
  26    tc-m68k.c.  */
  27
  28 /* The various m68k registers.  */
  29
  30 /* DATA and ADDR have to be contiguous, so that reg-DATA gives
  31    0-7==data reg, 8-15==addr reg for operands that take both types.
  32
  33    We don't use forms like "ADDR0 = ADDR" here because this file is
  34    likely to be used on an Apollo, and the broken Apollo compiler
  35    gives an `undefined variable' error if we do that, according to
  36    troy@cbme.unsw.edu.au.  */
  37
  38 #define DATA DATA0
  39 #define ADDR ADDR0
  40 #define SP ADDR7
  41 #define BAD BAD0
  42 #define BAC BAC0
  43
  44 enum m68k_register
  45 {
  46   DATA0 = 1,                    /*   1- 8 == data registers 0-7 */
  47   DATA1,
  48   DATA2,
  49   DATA3,
  50   DATA4,
  51   DATA5,
  52   DATA6,
  53   DATA7,
  54
  55   ADDR0,
  56   ADDR1,
  57   ADDR2,
  58   ADDR3,
  59   ADDR4,
  60   ADDR5,
  61   ADDR6,
  62   ADDR7,
  63
  64   FP0,                          /* Eight FP registers */
  65   FP1,
  66   FP2,
  67   FP3,
  68   FP4,
  69   FP5,
  70   FP6,
  71   FP7,
  72
  73   COP0,                         /* Co-processor #0-#7 */
  74   COP1,
  75   COP2,
  76   COP3,
  77   COP4,
  78   COP5,
  79   COP6,
  80   COP7,
  81
  82   PC,                           /* Program counter */
  83   ZPC,                          /* Hack for Program space, but 0 addressing */
  84   SR,                           /* Status Reg */
  85   CCR,                          /* Condition code Reg */
  86
  87   /* These have to be grouped together for the movec instruction to work. */
  88   USP,                          /*  User Stack Pointer */
  89   ISP,                          /*  Interrupt stack pointer */
  90   SFC,
  91   DFC,
  92   CACR,
  93   VBR,
  94   CAAR,
  95   MSP,
  96   ITT0,
  97   ITT1,
  98   DTT0,
  99   DTT1,
 100   MMUSR,
 101   TC,
 102   SRP,
 103   URP,
 104   BUSCR,                        /* 68060 added these */
 105   PCR,
 106   ROMBAR,                       /* mcf5200 added these */
 107   RAMBAR0,
 108   RAMBAR1,
 109   MBAR,
 110 #define last_movec_reg MBAR
 111   /* end of movec ordering constraints */
 112
 113   FPI,
 114   FPS,
 115   FPC,
 116
 117   DRP,                          /* 68851 or 68030 MMU regs */
 118   CRP,
 119   CAL,
 120   VAL,
 121   SCC,
 122   AC,
 123   BAD0,
 124   BAD1,
 125   BAD2,
 126   BAD3,
 127   BAD4,
 128   BAD5,
 129   BAD6,
 130   BAD7,
 131   BAC0,
 132   BAC1,
 133   BAC2,
 134   BAC3,
 135   BAC4,
 136   BAC5,
 137   BAC6,
 138   BAC7,
 139   PSR,                          /* aka MMUSR on 68030 (but not MMUSR on 68040)
 140                                    and ACUSR on 68ec030 */
 141   PCSR,
 142
 143   IC,                           /* instruction cache token */
 144   DC,                           /* data cache token */
 145   NC,                           /* no cache token */
 146   BC,                           /* both caches token */
 147
 148   TT0,                          /* 68030 access control unit regs */
 149   TT1,
 150
 151   ZDATA0,                       /* suppressed data registers.  */
 152   ZDATA1,
 153   ZDATA2,
 154   ZDATA3,
 155   ZDATA4,
 156   ZDATA5,
 157   ZDATA6,
 158   ZDATA7,
 159
 160   ZADDR0,                       /* suppressed address registers.  */
 161   ZADDR1,
 162   ZADDR2,
 163   ZADDR3,
 164   ZADDR4,
 165   ZADDR5,
 166   ZADDR6,
 167   ZADDR7,
 168 };
 169
 170 /* Size information.  */
 171
 172 enum m68k_size
 173 {
 174   /* Unspecified.  */
 175   SIZE_UNSPEC,
 176
 177   /* Byte.  */
 178   SIZE_BYTE,
 179
 180   /* Word (2 bytes).  */
 181   SIZE_WORD,
 182
 183   /* Longword (4 bytes).  */
 184   SIZE_LONG
 185 };
 186
 187 /* The structure used to hold information about an index register.  */
 188
 189 struct m68k_indexreg
 190 {
 191   /* The index register itself.  */
 192   enum m68k_register reg;
 193
 194   /* The size to use.  */
 195   enum m68k_size size;
 196
 197   /* The value to scale by.  */
 198   int scale;
 199 };
 200
 201 #ifdef OBJ_ELF
 202 /* The type of a PIC expression.  */
 203
 204 enum pic_relocation
 205 {
 206   pic_none,                     /* not pic */
 207   pic_plt_pcrel,                /* @PLTPC */
 208   pic_got_pcrel,                /* @GOTPC */
 209   pic_plt_off,                  /* @PLT */
 210   pic_got_off                   /* @GOT */
 211 };
 212 #endif
 213
 214 /* The structure used to hold information about an expression.  */
 215
 216 struct m68k_exp
 217 {
 218   /* The size to use.  */
 219   enum m68k_size size;
 220
 221 #ifdef OBJ_ELF
 222   /* The type of pic relocation if any.  */
 223   enum pic_relocation pic_reloc;
 224 #endif
 225
 226   /* The expression itself.  */
 227   expressionS exp;
 228 };
 229
 230 /* The operand modes.  */
 231
 232 enum m68k_operand_type
 233 {
 234   IMMED = 1,
 235   ABSL,
 236   DREG,
 237   AREG,
 238   FPREG,
 239   CONTROL,
 240   AINDR,
 241   AINC,
 242   ADEC,
 243   DISP,
 244   BASE,
 245   POST,
 246   PRE,
 247   REGLST
 248 };
 249
 250 /* The structure used to hold a parsed operand.  */
 251
 252 struct m68k_op
 253 {
 254   /* The type of operand.  */
 255   enum m68k_operand_type mode;
 256
 257   /* The main register.  */
 258   enum m68k_register reg;
 259
 260   /* The register mask for mode REGLST.  */
 261   unsigned long mask;
 262
 263   /* An error message.  */
 264   const char *error;
 265
 266   /* The index register.  */
 267   struct m68k_indexreg index;
 268
 269   /* The displacement.  */
 270   struct m68k_exp disp;
 271
 272   /* The outer displacement.  */
 273   struct m68k_exp odisp;
 274 };
 275
 276 #endif /* ! defined (M68K_PARSE_H) */
 277
 278 /* The parsing function.  */
 279
 280 extern int m68k_ip_op PARAMS ((char *, struct m68k_op *));
 281
 282 /* Whether register prefixes are optional.  */
 283 extern int flag_reg_prefix_optional;