gas/config/m68k-parse.h

   1 /* m68k-parse.h -- header file for m68k assembler
   2    Copyright (C) 1987, 91, 92, 93, 94, 1995 Free Software Foundation, Inc.
   3
   4    This file is part of GAS, the GNU Assembler.
   5
   6    GAS is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2, or (at your option)
   9    any later version.
  10
  11    GAS is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with GAS; see the file COPYING.  If not, write to the Free
  18    Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  19    02111-1307, USA.  */
  20
  21 #ifndef M68K_PARSE_H
  22 #define M68K_PARSE_H
  23
  24 /* This header file defines things which are shared between the
  25    operand parser in m68k.y and the m68k assembler proper in
  26    tc-m68k.c.  */
  27
  28 /* The various m68k registers.  */
  29
  30 /* DATA and ADDR have to be contiguous, so that reg-DATA gives
  31    0-7==data reg, 8-15==addr reg for operands that take both types.
  32
  33    We don't use forms like "ADDR0 = ADDR" here because this file is
  34    likely to be used on an Apollo, and the broken Apollo compiler
  35    gives an `undefined variable' error if we do that, according to
  36    troy@cbme.unsw.edu.au.  */
  37
  38 #define DATA DATA0
  39 #define ADDR ADDR0
  40 #define SP ADDR7
  41 #define BAD BAD0
  42 #define BAC BAC0
  43
  44 enum m68k_register
  45 {
  46   DATA0 = 1,                    /*   1- 8 == data registers 0-7 */
  47   DATA1,
  48   DATA2,
  49   DATA3,
  50   DATA4,
  51   DATA5,
  52   DATA6,
  53   DATA7,
  54
  55   ADDR0,
  56   ADDR1,
  57   ADDR2,
  58   ADDR3,
  59   ADDR4,
  60   ADDR5,
  61   ADDR6,
  62   ADDR7,
  63
  64   FP0,                          /* Eight FP registers */
  65   FP1,
  66   FP2,
  67   FP3,
  68   FP4,
  69   FP5,
  70   FP6,
  71   FP7,
  72
  73   COP0,                         /* Co-processor #0-#7 */
  74   COP1,
  75   COP2,
  76   COP3,
  77   COP4,
  78   COP5,
  79   COP6,
  80   COP7,
  81
  82   PC,                           /* Program counter */
  83   ZPC,                          /* Hack for Program space, but 0 addressing */
  84   SR,                           /* Status Reg */
  85   CCR,                          /* Condition code Reg */
  86
  87   /* These have to be grouped together for the movec instruction to work. */
  88   USP,                          /*  User Stack Pointer */
  89   ISP,                          /*  Interrupt stack pointer */
  90   SFC,
  91   DFC,
  92   CACR,
  93   VBR,
  94   CAAR,
  95   MSP,
  96   ITT0,
  97   ITT1,
  98   DTT0,
  99   DTT1,
 100   MMUSR,
 101   TC,
 102   SRP,
 103   URP,
 104   BUSCR,                        /* 68060 added these */
 105   PCR,
 106 #define last_movec_reg PCR
 107   /* end of movec ordering constraints */
 108
 109   FPI,
 110   FPS,
 111   FPC,
 112
 113   DRP,                          /* 68851 or 68030 MMU regs */
 114   CRP,
 115   CAL,
 116   VAL,
 117   SCC,
 118   AC,
 119   BAD0,
 120   BAD1,
 121   BAD2,
 122   BAD3,
 123   BAD4,
 124   BAD5,
 125   BAD6,
 126   BAD7,
 127   BAC0,
 128   BAC1,
 129   BAC2,
 130   BAC3,
 131   BAC4,
 132   BAC5,
 133   BAC6,
 134   BAC7,
 135   PSR,                          /* aka MMUSR on 68030 (but not MMUSR on 68040)
 136                                    and ACUSR on 68ec030 */
 137   PCSR,
 138
 139   IC,                           /* instruction cache token */
 140   DC,                           /* data cache token */
 141   NC,                           /* no cache token */
 142   BC,                           /* both caches token */
 143
 144   TT0,                          /* 68030 access control unit regs */
 145   TT1,
 146
 147   ZDATA0,                       /* suppressed data registers.  */
 148   ZDATA1,
 149   ZDATA2,
 150   ZDATA3,
 151   ZDATA4,
 152   ZDATA5,
 153   ZDATA6,
 154   ZDATA7,
 155
 156   ZADDR0,                       /* suppressed address registers.  */
 157   ZADDR1,
 158   ZADDR2,
 159   ZADDR3,
 160   ZADDR4,
 161   ZADDR5,
 162   ZADDR6,
 163   ZADDR7,
 164 };
 165
 166 /* Size information.  */
 167
 168 enum m68k_size
 169 {
 170   /* Unspecified.  */
 171   SIZE_UNSPEC,
 172
 173   /* Byte.  */
 174   SIZE_BYTE,
 175
 176   /* Word (2 bytes).  */
 177   SIZE_WORD,
 178
 179   /* Longword (4 bytes).  */
 180   SIZE_LONG
 181 };
 182
 183 /* The structure used to hold information about an index register.  */
 184
 185 struct m68k_indexreg
 186 {
 187   /* The index register itself.  */
 188   enum m68k_register reg;
 189
 190   /* The size to use.  */
 191   enum m68k_size size;
 192
 193   /* The value to scale by.  */
 194   int scale;
 195 };
 196
 197 /* The structure used to hold information about an expression.  */
 198
 199 struct m68k_exp
 200 {
 201   /* The size to use.  */
 202   enum m68k_size size;
 203
 204   /* The expression itself.  */
 205   expressionS exp;
 206 };
 207
 208 /* See whether an expression is a signed eight bit value.  */
 209
 210 #define expr8(ex)                               \
 211   ((ex)->exp.X_op == O_constant                 \
 212    && (ex)->exp.X_add_number >= -0x80           \
 213    && (ex)->exp.X_add_number < 0x80)
 214
 215 /* See whether an expression is a signed sixteen bit value.  */
 216
 217 #define expr16(ex)                              \
 218   ((ex)->exp.X_op == O_constant                 \
 219    && (ex)->exp.X_add_number >= -0x8000         \
 220    && (ex)->exp.X_add_number < 0x8000)
 221
 222 /* The operand modes.  */
 223
 224 enum m68k_operand_type
 225 {
 226   IMMED = 1,
 227   ABSL,
 228   DREG,
 229   AREG,
 230   FPREG,
 231   CONTROL,
 232   AINDR,
 233   AINC,
 234   ADEC,
 235   DISP,
 236   BASE,
 237   POST,
 238   PRE,
 239   REGLST
 240 };
 241
 242 /* The structure used to hold a parsed operand.  */
 243
 244 struct m68k_op
 245 {
 246   /* The type of operand.  */
 247   enum m68k_operand_type mode;
 248
 249   /* The main register.  */
 250   enum m68k_register reg;
 251
 252   /* The register mask for mode REGLST.  */
 253   unsigned long mask;
 254
 255   /* An error message.  */
 256   const char *error;
 257
 258   /* The index register.  */
 259   struct m68k_indexreg index;
 260
 261   /* The displacement.  */
 262   struct m68k_exp disp;
 263
 264   /* The outer displacement.  */
 265   struct m68k_exp odisp;
 266 };
 267
 268 #endif /* ! defined (M68K_PARSE_H) */
 269
 270 /* The parsing function.  */
 271
 272 extern int m68k_ip_op PARAMS ((char *, struct m68k_op *));
 273
 274 /* Whether register prefixes are optional.  */
 275 extern int flag_reg_prefix_optional;