1 /* tc-arc.c -- Assembler for the ARC
2 Copyright (C) 1994-2016 Free Software Foundation, Inc.
4 Contributor: Claudiu Zissulescu <claziss@synopsys.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
25 #include "struc-symbol.h"
26 #include "dwarf2dbg.h"
27 #include "safe-ctype.h"
29 #include "opcode/arc.h"
32 /* Defines section. */
34 #define MAX_FLAG_NAME_LENGHT 3
35 #define MAX_INSN_FIXUPS 2
36 #define MAX_CONSTR_STR 20
39 # define pr_debug(fmt, args...) fprintf (stderr, fmt, ##args)
41 # define pr_debug(fmt, args...)
44 #define MAJOR_OPCODE(x) (((x) & 0xF8000000) >> 27)
45 #define SUB_OPCODE(x) (((x) & 0x003F0000) >> 16)
46 #define LP_INSN(x) ((MAJOR_OPCODE (x) == 0x4) && \
47 (SUB_OPCODE (x) == 0x28))
49 /* Equal to MAX_PRECISION in atof-ieee.c. */
50 #define MAX_LITTLENUMS 6
54 #define regno(x) ((x) & 0x3F)
55 #define is_ir_num(x) (((x) & ~0x3F) == 0)
56 #define is_code_density_p(op) (((op)->subclass == CD1 || (op)->subclass == CD2))
57 #define is_br_jmp_insn_p(op) (((op)->class == BRANCH || (op)->class == JUMP))
58 #define is_kernel_insn_p(op) (((op)->class == KERNEL))
60 /* Generic assembler global variables which must be defined by all
63 /* Characters which always start a comment. */
64 const char comment_chars
[] = "#;";
66 /* Characters which start a comment at the beginning of a line. */
67 const char line_comment_chars
[] = "#";
69 /* Characters which may be used to separate multiple commands on a
71 const char line_separator_chars
[] = "`";
73 /* Characters which are used to indicate an exponent in a floating
75 const char EXP_CHARS
[] = "eE";
77 /* Chars that mean this number is a floating point constant
78 As in 0f12.456 or 0d1.2345e12. */
79 const char FLT_CHARS
[] = "rRsSfFdD";
82 extern int target_big_endian
;
83 const char *arc_target_format
= DEFAULT_TARGET_FORMAT
;
84 static int byte_order
= DEFAULT_BYTE_ORDER
;
86 extern int arc_get_mach (char *);
88 /* Forward declaration. */
89 static void arc_lcomm (int);
90 static void arc_option (int);
91 static void arc_extra_reloc (int);
93 const pseudo_typeS md_pseudo_table
[] =
95 /* Make sure that .word is 32 bits. */
98 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
99 { "lcomm", arc_lcomm
, 0 },
100 { "lcommon", arc_lcomm
, 0 },
101 { "cpu", arc_option
, 0 },
103 { "tls_gd_ld", arc_extra_reloc
, BFD_RELOC_ARC_TLS_GD_LD
},
104 { "tls_gd_call", arc_extra_reloc
, BFD_RELOC_ARC_TLS_GD_CALL
},
109 const char *md_shortopts
= "";
113 OPTION_EB
= OPTION_MD_BASE
,
125 /* The following options are deprecated and provided here only for
126 compatibility reasons. */
152 struct option md_longopts
[] =
154 { "EB", no_argument
, NULL
, OPTION_EB
},
155 { "EL", no_argument
, NULL
, OPTION_EL
},
156 { "mcpu", required_argument
, NULL
, OPTION_MCPU
},
157 { "mA6", no_argument
, NULL
, OPTION_ARC600
},
158 { "mARC600", no_argument
, NULL
, OPTION_ARC600
},
159 { "mARC601", no_argument
, NULL
, OPTION_ARC601
},
160 { "mARC700", no_argument
, NULL
, OPTION_ARC700
},
161 { "mA7", no_argument
, NULL
, OPTION_ARC700
},
162 { "mEM", no_argument
, NULL
, OPTION_ARCEM
},
163 { "mHS", no_argument
, NULL
, OPTION_ARCHS
},
164 { "mcode-density", no_argument
, NULL
, OPTION_CD
},
166 /* The following options are deprecated and provided here only for
167 compatibility reasons. */
168 { "mav2em", no_argument
, NULL
, OPTION_ARCEM
},
169 { "mav2hs", no_argument
, NULL
, OPTION_ARCHS
},
170 { "muser-mode-only", no_argument
, NULL
, OPTION_USER_MODE
},
171 { "mld-extension-reg-mask", required_argument
, NULL
, OPTION_LD_EXT_MASK
},
172 { "mswap", no_argument
, NULL
, OPTION_SWAP
},
173 { "mnorm", no_argument
, NULL
, OPTION_NORM
},
174 { "mbarrel-shifter", no_argument
, NULL
, OPTION_BARREL_SHIFT
},
175 { "mbarrel_shifter", no_argument
, NULL
, OPTION_BARREL_SHIFT
},
176 { "mmin-max", no_argument
, NULL
, OPTION_MIN_MAX
},
177 { "mmin_max", no_argument
, NULL
, OPTION_MIN_MAX
},
178 { "mno-mpy", no_argument
, NULL
, OPTION_NO_MPY
},
179 { "mea", no_argument
, NULL
, OPTION_EA
},
180 { "mEA", no_argument
, NULL
, OPTION_EA
},
181 { "mmul64", no_argument
, NULL
, OPTION_MUL64
},
182 { "msimd", no_argument
, NULL
, OPTION_SIMD
},
183 { "mspfp", no_argument
, NULL
, OPTION_SPFP
},
184 { "mspfp-compact", no_argument
, NULL
, OPTION_SPFP
},
185 { "mspfp_compact", no_argument
, NULL
, OPTION_SPFP
},
186 { "mspfp-fast", no_argument
, NULL
, OPTION_SPFP
},
187 { "mspfp_fast", no_argument
, NULL
, OPTION_SPFP
},
188 { "mdpfp", no_argument
, NULL
, OPTION_DPFP
},
189 { "mdpfp-compact", no_argument
, NULL
, OPTION_DPFP
},
190 { "mdpfp_compact", no_argument
, NULL
, OPTION_DPFP
},
191 { "mdpfp-fast", no_argument
, NULL
, OPTION_DPFP
},
192 { "mdpfp_fast", no_argument
, NULL
, OPTION_DPFP
},
193 { "mmac-d16", no_argument
, NULL
, OPTION_XMAC_D16
},
194 { "mmac_d16", no_argument
, NULL
, OPTION_XMAC_D16
},
195 { "mmac-24", no_argument
, NULL
, OPTION_XMAC_24
},
196 { "mmac_24", no_argument
, NULL
, OPTION_XMAC_24
},
197 { "mdsp-packa", no_argument
, NULL
, OPTION_DSP_PACKA
},
198 { "mdsp_packa", no_argument
, NULL
, OPTION_DSP_PACKA
},
199 { "mcrc", no_argument
, NULL
, OPTION_CRC
},
200 { "mdvbf", no_argument
, NULL
, OPTION_DVBF
},
201 { "mtelephony", no_argument
, NULL
, OPTION_TELEPHONY
},
202 { "mxy", no_argument
, NULL
, OPTION_XYMEMORY
},
203 { "mlock", no_argument
, NULL
, OPTION_LOCK
},
204 { "mswape", no_argument
, NULL
, OPTION_SWAPE
},
205 { "mrtsc", no_argument
, NULL
, OPTION_RTSC
},
206 { "mfpuda", no_argument
, NULL
, OPTION_FPUDA
},
208 { NULL
, no_argument
, NULL
, 0 }
211 size_t md_longopts_size
= sizeof (md_longopts
);
213 /* Local data and data types. */
215 /* Used since new relocation types are introduced in this
216 file (DUMMY_RELOC_LITUSE_*). */
217 typedef int extended_bfd_reloc_code_real_type
;
223 extended_bfd_reloc_code_real_type reloc
;
225 /* index into arc_operands. */
226 unsigned int opindex
;
228 /* PC-relative, used by internals fixups. */
231 /* TRUE if this fixup is for LIMM operand. */
239 struct arc_fixup fixups
[MAX_INSN_FIXUPS
];
241 bfd_boolean short_insn
; /* Boolean value: TRUE if current insn is
243 bfd_boolean has_limm
; /* Boolean value: TRUE if limm field is
247 /* Structure to hold any last two instructions. */
248 static struct arc_last_insn
250 /* Saved instruction opcode. */
251 const struct arc_opcode
*opcode
;
253 /* Boolean value: TRUE if current insn is short. */
254 bfd_boolean has_limm
;
256 /* Boolean value: TRUE if current insn has delay slot. */
257 bfd_boolean has_delay_slot
;
260 /* The cpu for which we are generating code. */
261 static unsigned arc_target
= ARC_OPCODE_BASE
;
262 static const char *arc_target_name
= "<all>";
263 static unsigned arc_features
= 0x00;
265 /* The default architecture. */
266 static int arc_mach_type
= bfd_mach_arc_arcv2
;
268 /* Non-zero if the cpu type has been explicitly specified. */
269 static int mach_type_specified_p
= 0;
271 /* The hash table of instruction opcodes. */
272 static struct hash_control
*arc_opcode_hash
;
274 /* The hash table of register symbols. */
275 static struct hash_control
*arc_reg_hash
;
277 /* A table of CPU names and opcode sets. */
278 static const struct cpu_type
288 { "arc600", ARC_OPCODE_ARC600
, bfd_mach_arc_arc600
,
289 E_ARC_MACH_ARC600
, 0x00},
290 { "arc700", ARC_OPCODE_ARC700
, bfd_mach_arc_arc700
,
291 E_ARC_MACH_ARC700
, 0x00},
292 { "arcem", ARC_OPCODE_ARCv2EM
, bfd_mach_arc_arcv2
,
293 EF_ARC_CPU_ARCV2EM
, 0x00},
294 { "archs", ARC_OPCODE_ARCv2HS
, bfd_mach_arc_arcv2
,
295 EF_ARC_CPU_ARCV2HS
, ARC_CD
},
296 { "all", ARC_OPCODE_BASE
, bfd_mach_arc_arcv2
,
303 /* Name of the parsed flag. */
304 char name
[MAX_FLAG_NAME_LENGHT
+1];
306 /* The code of the parsed flag. Valid when is not zero. */
310 /* Used by the arc_reloc_op table. Order is important. */
311 #define O_gotoff O_md1 /* @gotoff relocation. */
312 #define O_gotpc O_md2 /* @gotpc relocation. */
313 #define O_plt O_md3 /* @plt relocation. */
314 #define O_sda O_md4 /* @sda relocation. */
315 #define O_pcl O_md5 /* @pcl relocation. */
316 #define O_tlsgd O_md6 /* @tlsgd relocation. */
317 #define O_tlsie O_md7 /* @tlsie relocation. */
318 #define O_tpoff9 O_md8 /* @tpoff9 relocation. */
319 #define O_tpoff O_md9 /* @tpoff relocation. */
320 #define O_dtpoff9 O_md10 /* @dtpoff9 relocation. */
321 #define O_dtpoff O_md11 /* @dtpoff relocation. */
322 #define O_last O_dtpoff
324 /* Used to define a bracket as operand in tokens. */
325 #define O_bracket O_md32
327 /* Dummy relocation, to be sorted out. */
328 #define DUMMY_RELOC_ARC_ENTRY (BFD_RELOC_UNUSED + 1)
330 #define USER_RELOC_P(R) ((R) >= O_gotoff && (R) <= O_last)
332 /* A table to map the spelling of a relocation operand into an appropriate
333 bfd_reloc_code_real_type type. The table is assumed to be ordered such
334 that op-O_literal indexes into it. */
335 #define ARC_RELOC_TABLE(op) \
336 (&arc_reloc_op[ ((!USER_RELOC_P (op)) \
338 : (int) (op) - (int) O_gotoff) ])
340 #define DEF(NAME, RELOC, REQ) \
341 { #NAME, sizeof (#NAME)-1, O_##NAME, RELOC, REQ}
343 static const struct arc_reloc_op_tag
345 /* String to lookup. */
347 /* Size of the string. */
349 /* Which operator to use. */
351 extended_bfd_reloc_code_real_type reloc
;
352 /* Allows complex relocation expression like identifier@reloc +
354 unsigned int complex_expr
: 1;
358 DEF (gotoff
, BFD_RELOC_ARC_GOTOFF
, 1),
359 DEF (gotpc
, BFD_RELOC_ARC_GOTPC32
, 0),
360 DEF (plt
, BFD_RELOC_ARC_PLT32
, 0),
361 DEF (sda
, DUMMY_RELOC_ARC_ENTRY
, 1),
362 DEF (pcl
, BFD_RELOC_ARC_PC32
, 1),
363 DEF (tlsgd
, BFD_RELOC_ARC_TLS_GD_GOT
, 0),
364 DEF (tlsie
, BFD_RELOC_ARC_TLS_IE_GOT
, 0),
365 DEF (tpoff9
, BFD_RELOC_ARC_TLS_LE_S9
, 0),
366 DEF (tpoff
, BFD_RELOC_ARC_TLS_LE_32
, 1),
367 DEF (dtpoff9
, BFD_RELOC_ARC_TLS_DTPOFF_S9
, 0),
368 DEF (dtpoff
, BFD_RELOC_ARC_TLS_DTPOFF
, 0),
371 static const int arc_num_reloc_op
372 = sizeof (arc_reloc_op
) / sizeof (*arc_reloc_op
);
374 /* Flags to set in the elf header. */
375 static flagword arc_eflag
= 0x00;
377 /* Pre-defined "_GLOBAL_OFFSET_TABLE_". */
378 symbolS
* GOT_symbol
= 0;
380 /* Set to TRUE when we assemble instructions. */
381 static bfd_boolean assembling_insn
= FALSE
;
383 /* Functions declaration. */
385 static void assemble_tokens (const char *, expressionS
*, int,
386 struct arc_flags
*, int);
387 static const struct arc_opcode
*find_opcode_match (const struct arc_opcode
*,
388 expressionS
*, int *,
391 static void assemble_insn (const struct arc_opcode
*, const expressionS
*,
392 int, const struct arc_flags
*, int,
394 static void emit_insn (struct arc_insn
*);
395 static unsigned insert_operand (unsigned, const struct arc_operand
*,
396 offsetT
, char *, unsigned);
397 static const struct arc_opcode
*find_special_case_flag (const char *,
400 static const struct arc_opcode
*find_special_case (const char *,
403 expressionS
*, int *);
404 static const struct arc_opcode
*find_special_case_pseudo (const char *,
410 /* Functions implementation. */
412 /* Like md_number_to_chars but used for limms. The 4-byte limm value,
413 is encoded as 'middle-endian' for a little-endian target. FIXME!
414 this function is used for regular 4 byte instructions as well. */
417 md_number_to_chars_midend (char *buf
, valueT val
, int n
)
421 md_number_to_chars (buf
, (val
& 0xffff0000) >> 16, 2);
422 md_number_to_chars (buf
+ 2, (val
& 0xffff), 2);
426 md_number_to_chars (buf
, val
, n
);
430 /* Here ends all the ARCompact extension instruction assembling
434 arc_extra_reloc (int r_type
)
437 symbolS
*sym
, *lab
= NULL
;
439 if (*input_line_pointer
== '@')
440 input_line_pointer
++;
441 c
= get_symbol_name (&sym_name
);
442 sym
= symbol_find_or_make (sym_name
);
443 restore_line_pointer (c
);
444 if (c
== ',' && r_type
== BFD_RELOC_ARC_TLS_GD_LD
)
446 ++input_line_pointer
;
448 c
= get_symbol_name (&lab_name
);
449 lab
= symbol_find_or_make (lab_name
);
450 restore_line_pointer (c
);
453 = fix_new (frag_now
, /* Which frag? */
454 frag_now_fix (), /* Where in that frag? */
455 2, /* size: 1, 2, or 4 usually. */
456 sym
, /* X_add_symbol. */
457 0, /* X_add_number. */
458 FALSE
, /* TRUE if PC-relative relocation. */
459 r_type
/* Relocation type. */);
460 fixP
->fx_subsy
= lab
;
464 arc_lcomm_internal (int ignore ATTRIBUTE_UNUSED
,
465 symbolS
*symbolP
, addressT size
)
470 if (*input_line_pointer
== ',')
472 align
= parse_align (1);
474 if (align
== (addressT
) -1)
489 bss_alloc (symbolP
, size
, align
);
490 S_CLEAR_EXTERNAL (symbolP
);
496 arc_lcomm (int ignore
)
498 symbolS
*symbolP
= s_comm_internal (ignore
, arc_lcomm_internal
);
501 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
504 /* Select the cpu we're assembling for. */
507 arc_option (int ignore ATTRIBUTE_UNUSED
)
513 c
= get_symbol_name (&cpu
);
514 mach
= arc_get_mach (cpu
);
519 if (!mach_type_specified_p
)
521 if ((!strcmp ("ARC600", cpu
))
522 || (!strcmp ("ARC601", cpu
))
523 || (!strcmp ("A6", cpu
)))
525 md_parse_option (OPTION_MCPU
, "arc600");
527 else if ((!strcmp ("ARC700", cpu
))
528 || (!strcmp ("A7", cpu
)))
530 md_parse_option (OPTION_MCPU
, "arc700");
532 else if (!strcmp ("EM", cpu
))
534 md_parse_option (OPTION_MCPU
, "arcem");
536 else if (!strcmp ("HS", cpu
))
538 md_parse_option (OPTION_MCPU
, "archs");
541 as_fatal ("could not find the architecture");
543 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_arc
, mach
))
544 as_fatal ("could not set architecture and machine");
547 if (arc_mach_type
!= mach
)
548 as_warn ("Command-line value overrides \".cpu\" directive");
550 restore_line_pointer (c
);
551 demand_empty_rest_of_line ();
555 restore_line_pointer (c
);
556 as_bad ("invalid identifier for \".cpu\"");
557 ignore_rest_of_line ();
560 /* Smartly print an expression. */
563 debug_exp (expressionS
*t
)
565 const char *name ATTRIBUTE_UNUSED
;
566 const char *namemd ATTRIBUTE_UNUSED
;
568 pr_debug ("debug_exp: ");
572 default: name
= "unknown"; break;
573 case O_illegal
: name
= "O_illegal"; break;
574 case O_absent
: name
= "O_absent"; break;
575 case O_constant
: name
= "O_constant"; break;
576 case O_symbol
: name
= "O_symbol"; break;
577 case O_symbol_rva
: name
= "O_symbol_rva"; break;
578 case O_register
: name
= "O_register"; break;
579 case O_big
: name
= "O_big"; break;
580 case O_uminus
: name
= "O_uminus"; break;
581 case O_bit_not
: name
= "O_bit_not"; break;
582 case O_logical_not
: name
= "O_logical_not"; break;
583 case O_multiply
: name
= "O_multiply"; break;
584 case O_divide
: name
= "O_divide"; break;
585 case O_modulus
: name
= "O_modulus"; break;
586 case O_left_shift
: name
= "O_left_shift"; break;
587 case O_right_shift
: name
= "O_right_shift"; break;
588 case O_bit_inclusive_or
: name
= "O_bit_inclusive_or"; break;
589 case O_bit_or_not
: name
= "O_bit_or_not"; break;
590 case O_bit_exclusive_or
: name
= "O_bit_exclusive_or"; break;
591 case O_bit_and
: name
= "O_bit_and"; break;
592 case O_add
: name
= "O_add"; break;
593 case O_subtract
: name
= "O_subtract"; break;
594 case O_eq
: name
= "O_eq"; break;
595 case O_ne
: name
= "O_ne"; break;
596 case O_lt
: name
= "O_lt"; break;
597 case O_le
: name
= "O_le"; break;
598 case O_ge
: name
= "O_ge"; break;
599 case O_gt
: name
= "O_gt"; break;
600 case O_logical_and
: name
= "O_logical_and"; break;
601 case O_logical_or
: name
= "O_logical_or"; break;
602 case O_index
: name
= "O_index"; break;
603 case O_bracket
: name
= "O_bracket"; break;
608 default: namemd
= "unknown"; break;
609 case O_gotoff
: namemd
= "O_gotoff"; break;
610 case O_gotpc
: namemd
= "O_gotpc"; break;
611 case O_plt
: namemd
= "O_plt"; break;
612 case O_sda
: namemd
= "O_sda"; break;
613 case O_pcl
: namemd
= "O_pcl"; break;
614 case O_tlsgd
: namemd
= "O_tlsgd"; break;
615 case O_tlsie
: namemd
= "O_tlsie"; break;
616 case O_tpoff9
: namemd
= "O_tpoff9"; break;
617 case O_tpoff
: namemd
= "O_tpoff"; break;
618 case O_dtpoff9
: namemd
= "O_dtpoff9"; break;
619 case O_dtpoff
: namemd
= "O_dtpoff"; break;
622 pr_debug ("%s (%s, %s, %d, %s)", name
,
623 (t
->X_add_symbol
) ? S_GET_NAME (t
->X_add_symbol
) : "--",
624 (t
->X_op_symbol
) ? S_GET_NAME (t
->X_op_symbol
) : "--",
625 (int) t
->X_add_number
,
626 (t
->X_md
) ? namemd
: "--");
631 /* Parse the arguments to an opcode. */
634 tokenize_arguments (char *str
,
638 char *old_input_line_pointer
;
639 bfd_boolean saw_comma
= FALSE
;
640 bfd_boolean saw_arg
= FALSE
;
645 const struct arc_reloc_op_tag
*r
;
649 memset (tok
, 0, sizeof (*tok
) * ntok
);
651 /* Save and restore input_line_pointer around this function. */
652 old_input_line_pointer
= input_line_pointer
;
653 input_line_pointer
= str
;
655 while (*input_line_pointer
)
658 switch (*input_line_pointer
)
664 input_line_pointer
++;
665 if (saw_comma
|| !saw_arg
)
672 ++input_line_pointer
;
676 tok
->X_op
= O_bracket
;
683 input_line_pointer
++;
687 tok
->X_op
= O_bracket
;
693 /* We have labels, function names and relocations, all
694 starting with @ symbol. Sort them out. */
695 if (saw_arg
&& !saw_comma
)
699 tok
->X_op
= O_symbol
;
700 tok
->X_md
= O_absent
;
702 if (*input_line_pointer
!= '@')
703 goto normalsymbol
; /* This is not a relocation. */
707 /* A relocation opernad has the following form
708 @identifier@relocation_type. The identifier is already
710 if (tok
->X_op
!= O_symbol
)
712 as_bad (_("No valid label relocation operand"));
716 /* Parse @relocation_type. */
717 input_line_pointer
++;
718 c
= get_symbol_name (&reloc_name
);
719 len
= input_line_pointer
- reloc_name
;
722 as_bad (_("No relocation operand"));
726 /* Go through known relocation and try to find a match. */
727 r
= &arc_reloc_op
[0];
728 for (i
= arc_num_reloc_op
- 1; i
>= 0; i
--, r
++)
730 && memcmp (reloc_name
, r
->name
, len
) == 0)
734 as_bad (_("Unknown relocation operand: @%s"), reloc_name
);
738 *input_line_pointer
= c
;
739 SKIP_WHITESPACE_AFTER_NAME ();
740 /* Extra check for TLS: base. */
741 if (*input_line_pointer
== '@')
744 if (tok
->X_op_symbol
!= NULL
745 || tok
->X_op
!= O_symbol
)
747 as_bad (_("Unable to parse TLS base: %s"),
751 input_line_pointer
++;
753 c
= get_symbol_name (&sym_name
);
754 base
= symbol_find_or_make (sym_name
);
755 tok
->X_op
= O_subtract
;
756 tok
->X_op_symbol
= base
;
757 restore_line_pointer (c
);
758 tmpE
.X_add_number
= 0;
760 else if ((*input_line_pointer
!= '+')
761 && (*input_line_pointer
!= '-'))
763 tmpE
.X_add_number
= 0;
767 /* Parse the constant of a complex relocation expression
768 like @identifier@reloc +/- const. */
769 if (! r
->complex_expr
)
771 as_bad (_("@%s is not a complex relocation."), r
->name
);
775 if (tmpE
.X_op
!= O_constant
)
777 as_bad (_("Bad expression: @%s + %s."),
778 r
->name
, input_line_pointer
);
784 tok
->X_add_number
= tmpE
.X_add_number
;
795 /* Can be a register. */
796 ++input_line_pointer
;
800 if (saw_arg
&& !saw_comma
)
803 tok
->X_op
= O_absent
;
804 tok
->X_md
= O_absent
;
807 /* Legacy: There are cases when we have
808 identifier@relocation_type, if it is the case parse the
809 relocation type as well. */
810 if (*input_line_pointer
== '@')
816 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
828 if (saw_comma
|| brk_lvl
)
830 input_line_pointer
= old_input_line_pointer
;
836 as_bad (_("Brackets in operand field incorrect"));
838 as_bad (_("extra comma"));
840 as_bad (_("missing argument"));
842 as_bad (_("missing comma or colon"));
843 input_line_pointer
= old_input_line_pointer
;
847 /* Parse the flags to a structure. */
850 tokenize_flags (const char *str
,
851 struct arc_flags flags
[],
854 char *old_input_line_pointer
;
855 bfd_boolean saw_flg
= FALSE
;
856 bfd_boolean saw_dot
= FALSE
;
860 memset (flags
, 0, sizeof (*flags
) * nflg
);
862 /* Save and restore input_line_pointer around this function. */
863 old_input_line_pointer
= input_line_pointer
;
864 input_line_pointer
= (char *) str
;
866 while (*input_line_pointer
)
868 switch (*input_line_pointer
)
875 input_line_pointer
++;
883 if (saw_flg
&& !saw_dot
)
886 if (num_flags
>= nflg
)
889 flgnamelen
= strspn (input_line_pointer
, "abcdefghilmnopqrstvwxz");
890 if (flgnamelen
> MAX_FLAG_NAME_LENGHT
)
893 memcpy (flags
->name
, input_line_pointer
, flgnamelen
);
895 input_line_pointer
+= flgnamelen
;
905 input_line_pointer
= old_input_line_pointer
;
910 as_bad (_("extra dot"));
912 as_bad (_("unrecognized flag"));
914 as_bad (_("failed to parse flags"));
915 input_line_pointer
= old_input_line_pointer
;
919 /* The public interface to the instruction assembler. */
922 md_assemble (char *str
)
925 expressionS tok
[MAX_INSN_ARGS
];
928 struct arc_flags flags
[MAX_INSN_FLGS
];
930 /* Split off the opcode. */
931 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_0123468");
932 opname
= xmalloc (opnamelen
+ 1);
933 memcpy (opname
, str
, opnamelen
);
934 opname
[opnamelen
] = '\0';
936 /* Signalize we are assmbling the instructions. */
937 assembling_insn
= TRUE
;
939 /* Tokenize the flags. */
940 if ((nflg
= tokenize_flags (str
+ opnamelen
, flags
, MAX_INSN_FLGS
)) == -1)
942 as_bad (_("syntax error"));
946 /* Scan up to the end of the mnemonic which must end in space or end
949 for (; *str
!= '\0'; str
++)
953 /* Tokenize the rest of the line. */
954 if ((ntok
= tokenize_arguments (str
, tok
, MAX_INSN_ARGS
)) < 0)
956 as_bad (_("syntax error"));
961 assemble_tokens (opname
, tok
, ntok
, flags
, nflg
);
962 assembling_insn
= FALSE
;
965 /* Callback to insert a register into the hash table. */
968 declare_register (char *name
, int number
)
971 symbolS
*regS
= symbol_create (name
, reg_section
,
972 number
, &zero_address_frag
);
974 err
= hash_insert (arc_reg_hash
, S_GET_NAME (regS
), (void *) regS
);
976 as_fatal ("Inserting \"%s\" into register table failed: %s",
980 /* Construct symbols for each of the general registers. */
983 declare_register_set (void)
986 for (i
= 0; i
< 64; ++i
)
990 sprintf (name
, "r%d", i
);
991 declare_register (name
, i
);
994 sprintf (name
, "r%dr%d", i
, i
+1);
995 declare_register (name
, i
);
1000 /* Port-specific assembler initialization. This function is called
1001 once, at assembler startup time. */
1008 /* The endianness can be chosen "at the factory". */
1009 target_big_endian
= byte_order
== BIG_ENDIAN
;
1011 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_arc
, arc_mach_type
))
1012 as_warn (_("could not set architecture and machine"));
1014 /* Set elf header flags. */
1015 bfd_set_private_flags (stdoutput
, arc_eflag
);
1017 /* Set up a hash table for the instructions. */
1018 arc_opcode_hash
= hash_new ();
1019 if (arc_opcode_hash
== NULL
)
1020 as_fatal (_("Virtual memory exhausted"));
1022 /* Initialize the hash table with the insns. */
1023 for (i
= 0; i
< arc_num_opcodes
;)
1025 const char *name
, *retval
;
1027 name
= arc_opcodes
[i
].name
;
1028 retval
= hash_insert (arc_opcode_hash
, name
, (void *) &arc_opcodes
[i
]);
1030 as_fatal (_("internal error: can't hash opcode '%s': %s"),
1033 while (++i
< arc_num_opcodes
1034 && (arc_opcodes
[i
].name
== name
1035 || !strcmp (arc_opcodes
[i
].name
, name
)))
1039 /* Register declaration. */
1040 arc_reg_hash
= hash_new ();
1041 if (arc_reg_hash
== NULL
)
1042 as_fatal (_("Virtual memory exhausted"));
1044 declare_register_set ();
1045 declare_register ("gp", 26);
1046 declare_register ("fp", 27);
1047 declare_register ("sp", 28);
1048 declare_register ("ilink", 29);
1049 declare_register ("ilink1", 29);
1050 declare_register ("ilink2", 30);
1051 declare_register ("blink", 31);
1053 declare_register ("mlo", 57);
1054 declare_register ("mmid", 58);
1055 declare_register ("mhi", 59);
1057 declare_register ("acc1", 56);
1058 declare_register ("acc2", 57);
1060 declare_register ("lp_count", 60);
1061 declare_register ("pcl", 63);
1063 /* Initialize the last instructions. */
1064 memset (&arc_last_insns
[0], 0, sizeof (arc_last_insns
));
1067 /* Write a value out to the object file, using the appropriate
1071 md_number_to_chars (char *buf
,
1075 if (target_big_endian
)
1076 number_to_chars_bigendian (buf
, val
, n
);
1078 number_to_chars_littleendian (buf
, val
, n
);
1081 /* Round up a section size to the appropriate boundary. */
1084 md_section_align (segT segment
,
1087 int align
= bfd_get_section_alignment (stdoutput
, segment
);
1089 return ((size
+ (1 << align
) - 1) & (-((valueT
) 1 << align
)));
1092 /* The location from which a PC relative jump should be calculated,
1093 given a PC relative reloc. */
1096 md_pcrel_from_section (fixS
*fixP
,
1099 offsetT base
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
1101 pr_debug ("pcrel_from_section, fx_offset = %d\n", (int) fixP
->fx_offset
);
1103 if (fixP
->fx_addsy
!= (symbolS
*) NULL
1104 && (!S_IS_DEFINED (fixP
->fx_addsy
)
1105 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
1107 pr_debug ("Unknown pcrel symbol: %s\n", S_GET_NAME (fixP
->fx_addsy
));
1109 /* The symbol is undefined (or is defined but not in this section).
1110 Let the linker figure it out. */
1114 if ((int) fixP
->fx_r_type
< 0)
1116 /* These are the "internal" relocations. Align them to
1117 32 bit boundary (PCL), for the moment. */
1122 switch (fixP
->fx_r_type
)
1124 case BFD_RELOC_ARC_PC32
:
1125 /* The hardware calculates relative to the start of the
1126 insn, but this relocation is relative to location of the
1127 LIMM, compensate. The base always needs to be
1128 substracted by 4 as we do not support this type of PCrel
1129 relocation for short instructions. */
1132 case BFD_RELOC_ARC_PLT32
:
1133 case BFD_RELOC_ARC_S25H_PCREL_PLT
:
1134 case BFD_RELOC_ARC_S21H_PCREL_PLT
:
1135 case BFD_RELOC_ARC_S25W_PCREL_PLT
:
1136 case BFD_RELOC_ARC_S21W_PCREL_PLT
:
1138 case BFD_RELOC_ARC_S21H_PCREL
:
1139 case BFD_RELOC_ARC_S25H_PCREL
:
1140 case BFD_RELOC_ARC_S13_PCREL
:
1141 case BFD_RELOC_ARC_S21W_PCREL
:
1142 case BFD_RELOC_ARC_S25W_PCREL
:
1146 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1147 _("unhandled reloc %s in md_pcrel_from_section"),
1148 bfd_get_reloc_code_name (fixP
->fx_r_type
));
1153 pr_debug ("pcrel from %x + %lx = %x, symbol: %s (%x)\n",
1154 fixP
->fx_frag
->fr_address
, fixP
->fx_where
, base
,
1155 fixP
->fx_addsy
? S_GET_NAME (fixP
->fx_addsy
) : "(null)",
1156 fixP
->fx_addsy
? S_GET_VALUE (fixP
->fx_addsy
) : 0);
1161 /* Given a BFD relocation find the coresponding operand. */
1163 static const struct arc_operand
*
1164 find_operand_for_reloc (extended_bfd_reloc_code_real_type reloc
)
1168 for (i
= 0; i
< arc_num_operands
; i
++)
1169 if (arc_operands
[i
].default_reloc
== reloc
)
1170 return &arc_operands
[i
];
1174 /* Apply a fixup to the object code. At this point all symbol values
1175 should be fully resolved, and we attempt to completely resolve the
1176 reloc. If we can not do that, we determine the correct reloc code
1177 and put it back in the fixup. To indicate that a fixup has been
1178 eliminated, set fixP->fx_done. */
1181 md_apply_fix (fixS
*fixP
,
1185 char * const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1186 valueT value
= *valP
;
1188 symbolS
*fx_addsy
, *fx_subsy
;
1190 segT add_symbol_segment
= absolute_section
;
1191 segT sub_symbol_segment
= absolute_section
;
1192 const struct arc_operand
*operand
= NULL
;
1193 extended_bfd_reloc_code_real_type reloc
;
1195 pr_debug ("%s:%u: apply_fix: r_type=%d (%s) value=0x%lX offset=0x%lX\n",
1196 fixP
->fx_file
, fixP
->fx_line
, fixP
->fx_r_type
,
1197 ((int) fixP
->fx_r_type
< 0) ? "Internal":
1198 bfd_get_reloc_code_name (fixP
->fx_r_type
), value
,
1201 fx_addsy
= fixP
->fx_addsy
;
1202 fx_subsy
= fixP
->fx_subsy
;
1207 add_symbol_segment
= S_GET_SEGMENT (fx_addsy
);
1211 && fixP
->fx_r_type
!= BFD_RELOC_ARC_TLS_DTPOFF
1212 && fixP
->fx_r_type
!= BFD_RELOC_ARC_TLS_DTPOFF_S9
1213 && fixP
->fx_r_type
!= BFD_RELOC_ARC_TLS_GD_LD
)
1215 resolve_symbol_value (fx_subsy
);
1216 sub_symbol_segment
= S_GET_SEGMENT (fx_subsy
);
1218 if (sub_symbol_segment
== absolute_section
)
1220 /* The symbol is really a constant. */
1221 fx_offset
-= S_GET_VALUE (fx_subsy
);
1226 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1227 _("can't resolve `%s' {%s section} - `%s' {%s section}"),
1228 fx_addsy
? S_GET_NAME (fx_addsy
) : "0",
1229 segment_name (add_symbol_segment
),
1230 S_GET_NAME (fx_subsy
),
1231 segment_name (sub_symbol_segment
));
1237 && !S_IS_WEAK (fx_addsy
))
1239 if (add_symbol_segment
== seg
1242 value
+= S_GET_VALUE (fx_addsy
);
1243 value
-= md_pcrel_from_section (fixP
, seg
);
1245 fixP
->fx_pcrel
= FALSE
;
1247 else if (add_symbol_segment
== absolute_section
)
1249 value
= fixP
->fx_offset
;
1250 fx_offset
+= S_GET_VALUE (fixP
->fx_addsy
);
1252 fixP
->fx_pcrel
= FALSE
;
1257 fixP
->fx_done
= TRUE
;
1262 && ((S_IS_DEFINED (fx_addsy
)
1263 && S_GET_SEGMENT (fx_addsy
) != seg
)
1264 || S_IS_WEAK (fx_addsy
)))
1265 value
+= md_pcrel_from_section (fixP
, seg
);
1267 switch (fixP
->fx_r_type
)
1269 case BFD_RELOC_ARC_32_ME
:
1270 /* This is a pc-relative value in a LIMM. Adjust it to the
1271 address of the instruction not to the address of the
1272 LIMM. Note: it is not anylonger valid this afirmation as
1273 the linker consider ARC_PC32 a fixup to entire 64 bit
1275 fixP
->fx_offset
+= fixP
->fx_frag
->fr_address
;
1278 fixP
->fx_r_type
= BFD_RELOC_ARC_PC32
;
1280 case BFD_RELOC_ARC_PC32
:
1281 /* fixP->fx_offset += fixP->fx_where - fixP->fx_dot_value; */
1284 if ((int) fixP
->fx_r_type
< 0)
1285 as_fatal (_("PC relative relocation not allowed for (internal) type %d"),
1291 pr_debug ("%s:%u: apply_fix: r_type=%d (%s) value=0x%lX offset=0x%lX\n",
1292 fixP
->fx_file
, fixP
->fx_line
, fixP
->fx_r_type
,
1293 ((int) fixP
->fx_r_type
< 0) ? "Internal":
1294 bfd_get_reloc_code_name (fixP
->fx_r_type
), value
,
1298 /* Now check for TLS relocations. */
1299 reloc
= fixP
->fx_r_type
;
1302 case BFD_RELOC_ARC_TLS_DTPOFF
:
1303 case BFD_RELOC_ARC_TLS_LE_32
:
1307 case BFD_RELOC_ARC_TLS_GD_GOT
:
1308 case BFD_RELOC_ARC_TLS_IE_GOT
:
1309 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
1312 case BFD_RELOC_ARC_TLS_GD_LD
:
1313 gas_assert (!fixP
->fx_offset
);
1316 = (S_GET_VALUE (fixP
->fx_subsy
)
1317 - fixP
->fx_frag
->fr_address
- fixP
->fx_where
);
1318 fixP
->fx_subsy
= NULL
;
1320 case BFD_RELOC_ARC_TLS_GD_CALL
:
1321 /* These two relocs are there just to allow ld to change the tls
1322 model for this symbol, by patching the code. The offset -
1323 and scale, if any - will be installed by the linker. */
1324 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
1327 case BFD_RELOC_ARC_TLS_LE_S9
:
1328 case BFD_RELOC_ARC_TLS_DTPOFF_S9
:
1329 as_bad (_("TLS_*_S9 relocs are not supported yet"));
1341 /* Addjust the value if we have a constant. */
1344 /* For hosts with longs bigger than 32-bits make sure that the top
1345 bits of a 32-bit negative value read in by the parser are set,
1346 so that the correct comparisons are made. */
1347 if (value
& 0x80000000)
1348 value
|= (-1L << 31);
1350 reloc
= fixP
->fx_r_type
;
1358 case BFD_RELOC_ARC_32_PCREL
:
1359 md_number_to_chars (fixpos
, value
, fixP
->fx_size
);
1362 case BFD_RELOC_ARC_GOTPC32
:
1363 /* I cannot fix an GOTPC relocation because I need to relax it
1364 from ld rx,[pcl,@sym@gotpc] to add rx,pcl,@sym@gotpc. */
1365 as_bad (_("Unsupported operation on reloc"));
1368 case BFD_RELOC_ARC_TLS_DTPOFF
:
1369 case BFD_RELOC_ARC_TLS_LE_32
:
1370 gas_assert (!fixP
->fx_addsy
);
1371 gas_assert (!fixP
->fx_subsy
);
1373 case BFD_RELOC_ARC_GOTOFF
:
1374 case BFD_RELOC_ARC_32_ME
:
1375 case BFD_RELOC_ARC_PC32
:
1376 md_number_to_chars_midend (fixpos
, value
, fixP
->fx_size
);
1379 case BFD_RELOC_ARC_PLT32
:
1380 md_number_to_chars_midend (fixpos
, value
, fixP
->fx_size
);
1383 case BFD_RELOC_ARC_S25H_PCREL_PLT
:
1384 reloc
= BFD_RELOC_ARC_S25W_PCREL
;
1387 case BFD_RELOC_ARC_S21H_PCREL_PLT
:
1388 reloc
= BFD_RELOC_ARC_S21H_PCREL
;
1391 case BFD_RELOC_ARC_S25W_PCREL_PLT
:
1392 reloc
= BFD_RELOC_ARC_S25W_PCREL
;
1395 case BFD_RELOC_ARC_S21W_PCREL_PLT
:
1396 reloc
= BFD_RELOC_ARC_S21W_PCREL
;
1398 case BFD_RELOC_ARC_S25W_PCREL
:
1399 case BFD_RELOC_ARC_S21W_PCREL
:
1400 case BFD_RELOC_ARC_S21H_PCREL
:
1401 case BFD_RELOC_ARC_S25H_PCREL
:
1402 case BFD_RELOC_ARC_S13_PCREL
:
1404 operand
= find_operand_for_reloc (reloc
);
1405 gas_assert (operand
);
1410 if ((int) fixP
->fx_r_type
>= 0)
1411 as_fatal (_("unhandled relocation type %s"),
1412 bfd_get_reloc_code_name (fixP
->fx_r_type
));
1414 /* The rest of these fixups needs to be completely resolved as
1416 if (fixP
->fx_addsy
!= 0
1417 && S_GET_SEGMENT (fixP
->fx_addsy
) != absolute_section
)
1418 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1419 _("non-absolute expression in constant field"));
1421 gas_assert (-(int) fixP
->fx_r_type
< (int) arc_num_operands
);
1422 operand
= &arc_operands
[-(int) fixP
->fx_r_type
];
1427 if (target_big_endian
)
1429 switch (fixP
->fx_size
)
1432 insn
= bfd_getb32 (fixpos
);
1435 insn
= bfd_getb16 (fixpos
);
1438 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1439 _("unknown fixup size"));
1445 switch (fixP
->fx_size
)
1448 insn
= bfd_getl16 (fixpos
) << 16 | bfd_getl16 (fixpos
+ 2);
1451 insn
= bfd_getl16 (fixpos
);
1454 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1455 _("unknown fixup size"));
1459 insn
= insert_operand (insn
, operand
, (offsetT
) value
,
1460 fixP
->fx_file
, fixP
->fx_line
);
1462 md_number_to_chars_midend (fixpos
, insn
, fixP
->fx_size
);
1465 /* Prepare machine-dependent frags for relaxation.
1467 Called just before relaxation starts. Any symbol that is now undefined
1468 will not become defined.
1470 Return the correct fr_subtype in the frag.
1472 Return the initial "guess for fr_var" to caller. The guess for fr_var
1473 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
1474 or fr_var contributes to our returned value.
1476 Although it may not be explicit in the frag, pretend
1477 fr_var starts with a value. */
1480 md_estimate_size_before_relax (fragS
*fragP ATTRIBUTE_UNUSED
,
1481 segT segment ATTRIBUTE_UNUSED
)
1486 pr_debug ("%s:%d: md_estimate_size_before_relax: %d\n",
1487 fragP
->fr_file
, fragP
->fr_line
, growth
);
1489 as_fatal (_("md_estimate_size_before_relax\n"));
1493 /* Translate internal representation of relocation info to BFD target
1497 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
,
1501 bfd_reloc_code_real_type code
;
1503 reloc
= (arelent
*) xmalloc (sizeof (* reloc
));
1504 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
1505 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
1506 reloc
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
1508 /* Make sure none of our internal relocations make it this far.
1509 They'd better have been fully resolved by this point. */
1510 gas_assert ((int) fixP
->fx_r_type
> 0);
1512 code
= fixP
->fx_r_type
;
1514 /* if we have something like add gp, pcl,
1515 _GLOBAL_OFFSET_TABLE_@gotpc. */
1516 if (code
== BFD_RELOC_ARC_GOTPC32
1518 && fixP
->fx_addsy
== GOT_symbol
)
1519 code
= BFD_RELOC_ARC_GOTPC
;
1521 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
1522 if (reloc
->howto
== NULL
)
1524 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1525 _("cannot represent `%s' relocation in object file"),
1526 bfd_get_reloc_code_name (code
));
1530 if (!fixP
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
1531 as_fatal (_("internal error? cannot generate `%s' relocation"),
1532 bfd_get_reloc_code_name (code
));
1534 gas_assert (!fixP
->fx_pcrel
== !reloc
->howto
->pc_relative
);
1536 if (code
== BFD_RELOC_ARC_TLS_DTPOFF
1537 || code
== BFD_RELOC_ARC_TLS_DTPOFF_S9
)
1540 = fixP
->fx_subsy
? symbol_get_bfdsym (fixP
->fx_subsy
) : NULL
;
1541 /* We just want to store a 24 bit index, but we have to wait
1542 till after write_contents has been called via
1543 bfd_map_over_sections before we can get the index from
1544 _bfd_elf_symbol_from_bfd_symbol. Thus, the write_relocs
1545 function is elf32-arc.c has to pick up the slack.
1546 Unfortunately, this leads to problems with hosts that have
1547 pointers wider than long (bfd_vma). There would be various
1548 ways to handle this, all error-prone :-( */
1549 reloc
->addend
= (bfd_vma
) sym
;
1550 if ((asymbol
*) reloc
->addend
!= sym
)
1552 as_bad ("Can't store pointer\n");
1557 reloc
->addend
= fixP
->fx_offset
;
1562 /* Perform post-processing of machine-dependent frags after relaxation.
1563 Called after relaxation is finished.
1564 In: Address of frag.
1565 fr_type == rs_machine_dependent.
1566 fr_subtype is what the address relaxed to.
1568 Out: Any fixS:s and constants are set up. */
1571 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
1572 segT segment ATTRIBUTE_UNUSED
,
1573 fragS
*fragP ATTRIBUTE_UNUSED
)
1575 pr_debug ("%s:%d: md_convert_frag, subtype: %d, fix: %d, var: %d\n",
1576 fragP
->fr_file
, fragP
->fr_line
,
1577 fragP
->fr_subtype
, fragP
->fr_fix
, fragP
->fr_var
);
1581 /* We have no need to default values of symbols. We could catch
1582 register names here, but that is handled by inserting them all in
1583 the symbol table to begin with. */
1586 md_undefined_symbol (char *name
)
1588 /* The arc abi demands that a GOT[0] should be referencible as
1589 [pc+_DYNAMIC@gotpc]. Hence we convert a _DYNAMIC@gotpc to a
1590 GOTPC reference to _GLOBAL_OFFSET_TABLE_. */
1592 && (*(name
+1) == 'G')
1593 && (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0))
1595 && (*(name
+1) == 'D')
1596 && (strcmp (name
, DYNAMIC_STRUCT_NAME
) == 0)))
1600 if (symbol_find (name
))
1601 as_bad ("GOT already in symbol table");
1603 GOT_symbol
= symbol_new (GLOBAL_OFFSET_TABLE_NAME
, undefined_section
,
1604 (valueT
) 0, &zero_address_frag
);
1611 /* Turn a string in input_line_pointer into a floating point constant
1612 of type type, and store the appropriate bytes in *litP. The number
1613 of LITTLENUMS emitted is stored in *sizeP. An error message is
1614 returned, or NULL on OK. */
1617 md_atof (int type
, char *litP
, int *sizeP
)
1619 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
1622 /* Called for any expression that can not be recognized. When the
1623 function is called, `input_line_pointer' will point to the start of
1627 md_operand (expressionS
*expressionP ATTRIBUTE_UNUSED
)
1629 char *p
= input_line_pointer
;
1632 input_line_pointer
++;
1633 expressionP
->X_op
= O_symbol
;
1634 expression (expressionP
);
1638 /* This function is called from the function 'expression', it attempts
1639 to parse special names (in our case register names). It fills in
1640 the expression with the identified register. It returns TRUE if
1641 it is a register and FALSE otherwise. */
1644 arc_parse_name (const char *name
,
1645 struct expressionS
*e
)
1649 if (!assembling_insn
)
1652 /* Handle only registers. */
1653 if (e
->X_op
!= O_absent
)
1656 sym
= hash_find (arc_reg_hash
, name
);
1659 e
->X_op
= O_register
;
1660 e
->X_add_number
= S_GET_VALUE (sym
);
1667 Invocation line includes a switch not recognized by the base assembler.
1668 See if it's a processor-specific option.
1670 New options (supported) are:
1672 -mcpu=<cpu name> Assemble for selected processor
1673 -EB/-mbig-endian Big-endian
1674 -EL/-mlittle-endian Little-endian
1676 The following CPU names are recognized:
1677 arc700, av2em, av2hs. */
1680 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
1682 int cpu_flags
= EF_ARC_CPU_GENERIC
;
1688 return md_parse_option (OPTION_MCPU
, "arc600");
1691 return md_parse_option (OPTION_MCPU
, "arc700");
1694 return md_parse_option (OPTION_MCPU
, "arcem");
1697 return md_parse_option (OPTION_MCPU
, "archs");
1702 char *s
= alloca (strlen (arg
) + 1);
1709 *t
= TOLOWER (*arg1
++);
1713 for (i
= 0; cpu_types
[i
].name
; ++i
)
1715 if (!strcmp (cpu_types
[i
].name
, s
))
1717 arc_target
= cpu_types
[i
].flags
;
1718 arc_target_name
= cpu_types
[i
].name
;
1719 arc_features
= cpu_types
[i
].features
;
1720 arc_mach_type
= cpu_types
[i
].mach
;
1721 cpu_flags
= cpu_types
[i
].eflags
;
1723 mach_type_specified_p
= 1;
1728 if (!cpu_types
[i
].name
)
1730 as_fatal (_("unknown architecture: %s\n"), arg
);
1736 arc_target_format
= "elf32-bigarc";
1737 byte_order
= BIG_ENDIAN
;
1741 arc_target_format
= "elf32-littlearc";
1742 byte_order
= LITTLE_ENDIAN
;
1746 /* This option has an effect only on ARC EM. */
1747 if (arc_target
& ARC_OPCODE_ARCv2EM
)
1748 arc_features
|= ARC_CD
;
1751 case OPTION_USER_MODE
:
1752 case OPTION_LD_EXT_MASK
:
1755 case OPTION_BARREL_SHIFT
:
1756 case OPTION_MIN_MAX
:
1763 case OPTION_XMAC_D16
:
1764 case OPTION_XMAC_24
:
1765 case OPTION_DSP_PACKA
:
1768 case OPTION_TELEPHONY
:
1769 case OPTION_XYMEMORY
:
1774 /* Dummy options are accepted but have no effect. */
1781 if (cpu_flags
!= EF_ARC_CPU_GENERIC
)
1782 arc_eflag
= (arc_eflag
& ~EF_ARC_MACH_MSK
) | cpu_flags
;
1788 md_show_usage (FILE *stream
)
1790 fprintf (stream
, _("ARC-specific assembler options:\n"));
1792 fprintf (stream
, " -mcpu=<cpu name>\t assemble for CPU <cpu name>\n");
1794 " -mcode-density\t enable code density option for ARC EM\n");
1796 fprintf (stream
, _("\
1797 -EB assemble code for a big-endian cpu\n"));
1798 fprintf (stream
, _("\
1799 -EL assemble code for a little-endian cpu\n"));
1803 preprocess_operands (const struct arc_opcode
*opcode
,
1811 const struct arc_aux_reg
*auxr
;
1813 for (i
= 0; i
< ntok
; i
++)
1815 switch (tok
[i
].X_op
)
1819 break; /* Throw and error. */
1822 if (opcode
->class != AUXREG
)
1824 /* Convert the symbol to a constant if possible. */
1825 p
= S_GET_NAME (tok
[i
].X_add_symbol
);
1828 auxr
= &arc_aux_regs
[0];
1829 for (j
= 0; j
< arc_num_aux_regs
; j
++, auxr
++)
1830 if (len
== auxr
->length
1831 && strcasecmp (auxr
->name
, p
) == 0)
1833 tok
[i
].X_op
= O_constant
;
1834 tok
[i
].X_add_number
= auxr
->address
;
1844 /* Given an opcode name, pre-tockenized set of argumenst and the
1845 opcode flags, take it all the way through emission. */
1848 assemble_tokens (const char *opname
,
1851 struct arc_flags
*pflags
,
1854 bfd_boolean found_something
= FALSE
;
1855 const struct arc_opcode
*opcode
;
1858 /* Search opcodes. */
1859 opcode
= (const struct arc_opcode
*) hash_find (arc_opcode_hash
, opname
);
1861 /* Couldn't find opcode conventional way, try special cases. */
1863 opcode
= find_special_case (opname
, &nflgs
, pflags
, tok
, &ntok
);
1867 pr_debug ("%s:%d: assemble_tokens: %s trying opcode 0x%08X\n",
1868 frag_now
->fr_file
, frag_now
->fr_line
, opcode
->name
,
1871 preprocess_operands (opcode
, tok
, ntok
);
1873 found_something
= TRUE
;
1874 opcode
= find_opcode_match (opcode
, tok
, &ntok
, pflags
, nflgs
, &cpumatch
);
1877 struct arc_insn insn
;
1878 assemble_insn (opcode
, tok
, ntok
, pflags
, nflgs
, &insn
);
1884 if (found_something
)
1887 as_bad (_("inappropriate arguments for opcode '%s'"), opname
);
1889 as_bad (_("opcode '%s' not supported for target %s"), opname
,
1893 as_bad (_("unknown opcode '%s'"), opname
);
1896 /* Used to find special case opcode. */
1898 static const struct arc_opcode
*
1899 find_special_case (const char *opname
,
1901 struct arc_flags
*pflags
,
1905 const struct arc_opcode
*opcode
;
1907 opcode
= find_special_case_pseudo (opname
, ntok
, tok
, nflgs
, pflags
);
1910 opcode
= find_special_case_flag (opname
, nflgs
, pflags
);
1915 /* Swap operand tokens. */
1918 swap_operand (expressionS
*operand_array
,
1920 unsigned destination
)
1922 expressionS cpy_operand
;
1923 expressionS
*src_operand
;
1924 expressionS
*dst_operand
;
1927 if (source
== destination
)
1930 src_operand
= &operand_array
[source
];
1931 dst_operand
= &operand_array
[destination
];
1932 size
= sizeof (expressionS
);
1934 /* Make copy of operand to swap with and swap. */
1935 memcpy (&cpy_operand
, dst_operand
, size
);
1936 memcpy (dst_operand
, src_operand
, size
);
1937 memcpy (src_operand
, &cpy_operand
, size
);
1940 /* Check if *op matches *tok type.
1941 Returns FALSE if they don't match, TRUE if they match. */
1944 pseudo_operand_match (const expressionS
*tok
,
1945 const struct arc_operand_operation
*op
)
1947 offsetT min
, max
, val
;
1949 const struct arc_operand
*operand_real
= &arc_operands
[op
->operand_idx
];
1955 if (operand_real
->bits
== 32 && (operand_real
->flags
& ARC_OPERAND_LIMM
))
1957 else if (!(operand_real
->flags
& ARC_OPERAND_IR
))
1959 val
= tok
->X_add_number
+ op
->count
;
1960 if (operand_real
->flags
& ARC_OPERAND_SIGNED
)
1962 max
= (1 << (operand_real
->bits
- 1)) - 1;
1963 min
= -(1 << (operand_real
->bits
- 1));
1967 max
= (1 << operand_real
->bits
) - 1;
1970 if (min
<= val
&& val
<= max
)
1976 /* Handle all symbols as long immediates or signed 9. */
1977 if (operand_real
->flags
& ARC_OPERAND_LIMM
||
1978 ((operand_real
->flags
& ARC_OPERAND_SIGNED
) && operand_real
->bits
== 9))
1983 if (operand_real
->flags
& ARC_OPERAND_IR
)
1988 if (operand_real
->flags
& ARC_OPERAND_BRAKET
)
1999 /* Find pseudo instruction in array. */
2001 static const struct arc_pseudo_insn
*
2002 find_pseudo_insn (const char *opname
,
2004 const expressionS
*tok
)
2006 const struct arc_pseudo_insn
*pseudo_insn
= NULL
;
2007 const struct arc_operand_operation
*op
;
2011 for (i
= 0; i
< arc_num_pseudo_insn
; ++i
)
2013 pseudo_insn
= &arc_pseudo_insns
[i
];
2014 if (strcmp (pseudo_insn
->mnemonic_p
, opname
) == 0)
2016 op
= pseudo_insn
->operand
;
2017 for (j
= 0; j
< ntok
; ++j
)
2018 if (!pseudo_operand_match (&tok
[j
], &op
[j
]))
2021 /* Found the right instruction. */
2029 /* Assumes the expressionS *tok is of sufficient size. */
2031 static const struct arc_opcode
*
2032 find_special_case_pseudo (const char *opname
,
2036 struct arc_flags
*pflags
)
2038 const struct arc_pseudo_insn
*pseudo_insn
= NULL
;
2039 const struct arc_operand_operation
*operand_pseudo
;
2040 const struct arc_operand
*operand_real
;
2042 char construct_operand
[MAX_CONSTR_STR
];
2044 /* Find whether opname is in pseudo instruction array. */
2045 pseudo_insn
= find_pseudo_insn (opname
, *ntok
, tok
);
2047 if (pseudo_insn
== NULL
)
2050 /* Handle flag, Limited to one flag at the moment. */
2051 if (pseudo_insn
->flag_r
!= NULL
)
2052 *nflgs
+= tokenize_flags (pseudo_insn
->flag_r
, &pflags
[*nflgs
],
2053 MAX_INSN_FLGS
- *nflgs
);
2055 /* Handle operand operations. */
2056 for (i
= 0; i
< pseudo_insn
->operand_cnt
; ++i
)
2058 operand_pseudo
= &pseudo_insn
->operand
[i
];
2059 operand_real
= &arc_operands
[operand_pseudo
->operand_idx
];
2061 if (operand_real
->flags
& ARC_OPERAND_BRAKET
&&
2062 !operand_pseudo
->needs_insert
)
2065 /* Has to be inserted (i.e. this token does not exist yet). */
2066 if (operand_pseudo
->needs_insert
)
2068 if (operand_real
->flags
& ARC_OPERAND_BRAKET
)
2070 tok
[i
].X_op
= O_bracket
;
2075 /* Check if operand is a register or constant and handle it
2077 if (operand_real
->flags
& ARC_OPERAND_IR
)
2078 snprintf (construct_operand
, MAX_CONSTR_STR
, "r%d",
2079 operand_pseudo
->count
);
2081 snprintf (construct_operand
, MAX_CONSTR_STR
, "%d",
2082 operand_pseudo
->count
);
2084 tokenize_arguments (construct_operand
, &tok
[i
], 1);
2088 else if (operand_pseudo
->count
)
2090 /* Operand number has to be adjusted accordingly (by operand
2092 switch (tok
[i
].X_op
)
2095 tok
[i
].X_add_number
+= operand_pseudo
->count
;
2108 /* Swap operands if necessary. Only supports one swap at the
2110 for (i
= 0; i
< pseudo_insn
->operand_cnt
; ++i
)
2112 operand_pseudo
= &pseudo_insn
->operand
[i
];
2114 if (operand_pseudo
->swap_operand_idx
== i
)
2117 swap_operand (tok
, i
, operand_pseudo
->swap_operand_idx
);
2119 /* Prevent a swap back later by breaking out. */
2123 return (const struct arc_opcode
*)
2124 hash_find (arc_opcode_hash
, pseudo_insn
->mnemonic_r
);
2127 static const struct arc_opcode
*
2128 find_special_case_flag (const char *opname
,
2130 struct arc_flags
*pflags
)
2134 unsigned flag_idx
, flag_arr_idx
;
2135 size_t flaglen
, oplen
;
2136 const struct arc_flag_special
*arc_flag_special_opcode
;
2137 const struct arc_opcode
*opcode
;
2139 /* Search for special case instruction. */
2140 for (i
= 0; i
< arc_num_flag_special
; i
++)
2142 arc_flag_special_opcode
= &arc_flag_special_cases
[i
];
2143 oplen
= strlen (arc_flag_special_opcode
->name
);
2145 if (strncmp (opname
, arc_flag_special_opcode
->name
, oplen
) != 0)
2148 /* Found a potential special case instruction, now test for
2150 for (flag_arr_idx
= 0;; ++flag_arr_idx
)
2152 flag_idx
= arc_flag_special_opcode
->flags
[flag_arr_idx
];
2154 break; /* End of array, nothing found. */
2156 flagnm
= arc_flag_operands
[flag_idx
].name
;
2157 flaglen
= strlen (flagnm
);
2158 if (strcmp (opname
+ oplen
, flagnm
) == 0)
2160 opcode
= (const struct arc_opcode
*)
2161 hash_find (arc_opcode_hash
,
2162 arc_flag_special_opcode
->name
);
2164 if (*nflgs
+ 1 > MAX_INSN_FLGS
)
2166 memcpy (pflags
[*nflgs
].name
, flagnm
, flaglen
);
2167 pflags
[*nflgs
].name
[flaglen
] = '\0';
2176 /* Check whether a symbol involves a register. */
2179 contains_register (symbolS
*sym
)
2183 expressionS
*ex
= symbol_get_value_expression (sym
);
2184 return ((O_register
== ex
->X_op
)
2185 && !contains_register (ex
->X_add_symbol
)
2186 && !contains_register (ex
->X_op_symbol
));
2192 /* Returns the register number within a symbol. */
2195 get_register (symbolS
*sym
)
2197 if (!contains_register (sym
))
2200 expressionS
*ex
= symbol_get_value_expression (sym
);
2201 return regno (ex
->X_add_number
);
2204 /* Allocates a tok entry. */
2207 allocate_tok (expressionS
*tok
, int ntok
, int cidx
)
2209 if (ntok
> MAX_INSN_ARGS
- 2)
2210 return 0; /* No space left. */
2213 return 0; /* Incorect args. */
2215 memcpy (&tok
[ntok
+1], &tok
[ntok
], sizeof (*tok
));
2218 return 1; /* Success. */
2219 return allocate_tok (tok
, ntok
- 1, cidx
);
2222 /* Return true if a RELOC is generic. A generic reloc is PC-rel of a
2223 simple ME relocation (e.g. RELOC_ARC_32_ME, BFD_RELOC_ARC_PC32. */
2226 generic_reloc_p (extended_bfd_reloc_code_real_type reloc
)
2233 case BFD_RELOC_ARC_SDA_LDST
:
2234 case BFD_RELOC_ARC_SDA_LDST1
:
2235 case BFD_RELOC_ARC_SDA_LDST2
:
2236 case BFD_RELOC_ARC_SDA16_LD
:
2237 case BFD_RELOC_ARC_SDA16_LD1
:
2238 case BFD_RELOC_ARC_SDA16_LD2
:
2239 case BFD_RELOC_ARC_SDA16_ST2
:
2240 case BFD_RELOC_ARC_SDA32_ME
:
2248 /* Search forward through all variants of an opcode looking for a
2251 static const struct arc_opcode
*
2252 find_opcode_match (const struct arc_opcode
*first_opcode
,
2255 struct arc_flags
*first_pflag
,
2259 const struct arc_opcode
*opcode
= first_opcode
;
2261 int got_cpu_match
= 0;
2262 expressionS bktok
[MAX_INSN_ARGS
];
2266 memset (&emptyE
, 0, sizeof (emptyE
));
2267 memcpy (bktok
, tok
, MAX_INSN_ARGS
* sizeof (*tok
));
2272 const unsigned char *opidx
;
2273 const unsigned char *flgidx
;
2275 const expressionS
*t
= &emptyE
;
2277 pr_debug ("%s:%d: find_opcode_match: trying opcode 0x%08X ",
2278 frag_now
->fr_file
, frag_now
->fr_line
, opcode
->opcode
);
2280 /* Don't match opcodes that don't exist on this
2282 if (!(opcode
->cpu
& arc_target
))
2285 if (is_code_density_p (opcode
) && !(arc_features
& ARC_CD
))
2291 /* Check the operands. */
2292 for (opidx
= opcode
->operands
; *opidx
; ++opidx
)
2294 const struct arc_operand
*operand
= &arc_operands
[*opidx
];
2296 /* Only take input from real operands. */
2297 if ((operand
->flags
& ARC_OPERAND_FAKE
)
2298 && !(operand
->flags
& ARC_OPERAND_BRAKET
))
2301 /* When we expect input, make sure we have it. */
2305 /* Match operand type with expression type. */
2306 switch (operand
->flags
& ARC_OPERAND_TYPECHECK_MASK
)
2308 case ARC_OPERAND_IR
:
2309 /* Check to be a register. */
2310 if ((tok
[tokidx
].X_op
!= O_register
2311 || !is_ir_num (tok
[tokidx
].X_add_number
))
2312 && !(operand
->flags
& ARC_OPERAND_IGNORE
))
2315 /* If expect duplicate, make sure it is duplicate. */
2316 if (operand
->flags
& ARC_OPERAND_DUPLICATE
)
2318 /* Check for duplicate. */
2319 if (t
->X_op
!= O_register
2320 || !is_ir_num (t
->X_add_number
)
2321 || (regno (t
->X_add_number
) !=
2322 regno (tok
[tokidx
].X_add_number
)))
2326 /* Special handling? */
2327 if (operand
->insert
)
2329 const char *errmsg
= NULL
;
2330 (*operand
->insert
)(0,
2331 regno (tok
[tokidx
].X_add_number
),
2335 if (operand
->flags
& ARC_OPERAND_IGNORE
)
2337 /* Missing argument, create one. */
2338 if (!allocate_tok (tok
, ntok
- 1, tokidx
))
2341 tok
[tokidx
].X_op
= O_absent
;
2352 case ARC_OPERAND_BRAKET
:
2353 /* Check if bracket is also in opcode table as
2355 if (tok
[tokidx
].X_op
!= O_bracket
)
2359 case ARC_OPERAND_LIMM
:
2360 case ARC_OPERAND_SIGNED
:
2361 case ARC_OPERAND_UNSIGNED
:
2362 switch (tok
[tokidx
].X_op
)
2370 /* Got an (too) early bracket, check if it is an
2371 ignored operand. N.B. This procedure works only
2372 when bracket is the last operand! */
2373 if (!(operand
->flags
& ARC_OPERAND_IGNORE
))
2375 /* Insert the missing operand. */
2376 if (!allocate_tok (tok
, ntok
- 1, tokidx
))
2379 tok
[tokidx
].X_op
= O_absent
;
2384 /* Check the range. */
2385 if (operand
->bits
!= 32
2386 && !(operand
->flags
& ARC_OPERAND_NCHK
))
2388 offsetT min
, max
, val
;
2389 val
= tok
[tokidx
].X_add_number
;
2391 if (operand
->flags
& ARC_OPERAND_SIGNED
)
2393 max
= (1 << (operand
->bits
- 1)) - 1;
2394 min
= -(1 << (operand
->bits
- 1));
2398 max
= (1 << operand
->bits
) - 1;
2402 if (val
< min
|| val
> max
)
2405 /* Check alignmets. */
2406 if ((operand
->flags
& ARC_OPERAND_ALIGNED32
)
2410 if ((operand
->flags
& ARC_OPERAND_ALIGNED16
)
2414 else if (operand
->flags
& ARC_OPERAND_NCHK
)
2416 if (operand
->insert
)
2418 const char *errmsg
= NULL
;
2419 (*operand
->insert
)(0,
2420 tok
[tokidx
].X_add_number
,
2431 /* Check if it is register range. */
2432 if ((tok
[tokidx
].X_add_number
== 0)
2433 && contains_register (tok
[tokidx
].X_add_symbol
)
2434 && contains_register (tok
[tokidx
].X_op_symbol
))
2438 regs
= get_register (tok
[tokidx
].X_add_symbol
);
2440 regs
|= get_register (tok
[tokidx
].X_op_symbol
);
2441 if (operand
->insert
)
2443 const char *errmsg
= NULL
;
2444 (*operand
->insert
)(0,
2455 if (operand
->default_reloc
== 0)
2456 goto match_failed
; /* The operand needs relocation. */
2458 /* Relocs requiring long immediate. FIXME! make it
2459 generic and move it to a function. */
2460 switch (tok
[tokidx
].X_md
)
2469 if (!(operand
->flags
& ARC_OPERAND_LIMM
))
2472 if (!generic_reloc_p (operand
->default_reloc
))
2479 /* If expect duplicate, make sure it is duplicate. */
2480 if (operand
->flags
& ARC_OPERAND_DUPLICATE
)
2482 if (t
->X_op
== O_illegal
2483 || t
->X_op
== O_absent
2484 || t
->X_op
== O_register
2485 || (t
->X_add_number
!= tok
[tokidx
].X_add_number
))
2492 /* Everything else should have been fake. */
2500 /* Check the flags. Iterate over the valid flag classes. */
2503 for (flgidx
= opcode
->flags
; *flgidx
&& lnflg
; ++flgidx
)
2505 /* Get a valid flag class. */
2506 const struct arc_flag_class
*cl_flags
= &arc_flag_classes
[*flgidx
];
2507 const unsigned *flgopridx
;
2509 for (flgopridx
= cl_flags
->flags
; *flgopridx
; ++flgopridx
)
2511 const struct arc_flag_operand
*flg_operand
;
2512 struct arc_flags
*pflag
= first_pflag
;
2515 flg_operand
= &arc_flag_operands
[*flgopridx
];
2516 for (i
= 0; i
< nflgs
; i
++, pflag
++)
2518 /* Match against the parsed flags. */
2519 if (!strcmp (flg_operand
->name
, pflag
->name
))
2521 /*TODO: Check if it is duplicated. */
2522 pflag
->code
= *flgopridx
;
2524 break; /* goto next flag class and parsed flag. */
2529 /* Did I check all the parsed flags? */
2534 /* Possible match -- did we use all of our input? */
2544 /* Restore the original parameters. */
2545 memcpy (tok
, bktok
, MAX_INSN_ARGS
* sizeof (*tok
));
2548 while (++opcode
- arc_opcodes
< (int) arc_num_opcodes
2549 && !strcmp (opcode
->name
, first_opcode
->name
));
2552 *pcpumatch
= got_cpu_match
;
2557 /* Find the proper relocation for the given opcode. */
2559 static extended_bfd_reloc_code_real_type
2560 find_reloc (const char *name
,
2561 const char *opcodename
,
2562 const struct arc_flags
*pflags
,
2564 extended_bfd_reloc_code_real_type reloc
)
2568 bfd_boolean found_flag
, tmp
;
2569 extended_bfd_reloc_code_real_type ret
= BFD_RELOC_UNUSED
;
2571 for (i
= 0; i
< arc_num_equiv_tab
; i
++)
2573 const struct arc_reloc_equiv_tab
*r
= &arc_reloc_equiv
[i
];
2575 /* Find the entry. */
2576 if (strcmp (name
, r
->name
))
2578 if (r
->mnemonic
&& (strcmp (r
->mnemonic
, opcodename
)))
2585 unsigned * psflg
= (unsigned *)r
->flags
;
2589 for (j
= 0; j
< nflg
; j
++)
2590 if (!strcmp (pflags
[j
].name
,
2591 arc_flag_operands
[*psflg
].name
))
2612 if (reloc
!= r
->oldreloc
)
2619 if (ret
== BFD_RELOC_UNUSED
)
2620 as_bad (_("Unable to find %s relocation for instruction %s"),
2625 /* Turn an opcode description and a set of arguments into
2626 an instruction and a fixup. */
2629 assemble_insn (const struct arc_opcode
*opcode
,
2630 const expressionS
*tok
,
2632 const struct arc_flags
*pflags
,
2634 struct arc_insn
*insn
)
2636 const expressionS
*reloc_exp
= NULL
;
2638 const unsigned char *argidx
;
2641 unsigned char pcrel
= 0;
2642 bfd_boolean needGOTSymbol
;
2643 bfd_boolean has_delay_slot
= FALSE
;
2644 extended_bfd_reloc_code_real_type reloc
= BFD_RELOC_UNUSED
;
2646 memset (insn
, 0, sizeof (*insn
));
2647 image
= opcode
->opcode
;
2649 pr_debug ("%s:%d: assemble_insn: %s using opcode %x\n",
2650 frag_now
->fr_file
, frag_now
->fr_line
, opcode
->name
,
2653 /* Handle operands. */
2654 for (argidx
= opcode
->operands
; *argidx
; ++argidx
)
2656 const struct arc_operand
*operand
= &arc_operands
[*argidx
];
2657 const expressionS
*t
= (const expressionS
*) 0;
2659 if ((operand
->flags
& ARC_OPERAND_FAKE
)
2660 && !(operand
->flags
& ARC_OPERAND_BRAKET
))
2663 if (operand
->flags
& ARC_OPERAND_DUPLICATE
)
2665 /* Duplicate operand, already inserted. */
2677 /* Regardless if we have a reloc or not mark the instruction
2678 limm if it is the case. */
2679 if (operand
->flags
& ARC_OPERAND_LIMM
)
2680 insn
->has_limm
= TRUE
;
2685 image
= insert_operand (image
, operand
, regno (t
->X_add_number
),
2690 image
= insert_operand (image
, operand
, t
->X_add_number
, NULL
, 0);
2692 if (operand
->flags
& ARC_OPERAND_LIMM
)
2693 insn
->limm
= t
->X_add_number
;
2697 /* Ignore brackets. */
2701 gas_assert (operand
->flags
& ARC_OPERAND_IGNORE
);
2705 /* Maybe register range. */
2706 if ((t
->X_add_number
== 0)
2707 && contains_register (t
->X_add_symbol
)
2708 && contains_register (t
->X_op_symbol
))
2712 regs
= get_register (t
->X_add_symbol
);
2714 regs
|= get_register (t
->X_op_symbol
);
2715 image
= insert_operand (image
, operand
, regs
, NULL
, 0);
2720 /* This operand needs a relocation. */
2721 needGOTSymbol
= FALSE
;
2726 needGOTSymbol
= TRUE
;
2727 reloc
= find_reloc ("plt", opcode
->name
,
2729 operand
->default_reloc
);
2734 needGOTSymbol
= TRUE
;
2735 reloc
= ARC_RELOC_TABLE (t
->X_md
)->reloc
;
2738 reloc
= ARC_RELOC_TABLE (t
->X_md
)->reloc
;
2739 if (ARC_SHORT (opcode
->mask
))
2740 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
2741 _("Unable to use @pcl relocation for insn %s"),
2745 reloc
= find_reloc ("sda", opcode
->name
,
2747 operand
->default_reloc
);
2751 needGOTSymbol
= TRUE
;
2756 reloc
= ARC_RELOC_TABLE (t
->X_md
)->reloc
;
2759 case O_tpoff9
: /*FIXME! Check for the conditionality of
2761 case O_dtpoff9
: /*FIXME! Check for the conditionality of
2763 as_bad (_("TLS_*_S9 relocs are not supported yet"));
2767 /* Just consider the default relocation. */
2768 reloc
= operand
->default_reloc
;
2772 if (needGOTSymbol
&& (GOT_symbol
== NULL
))
2773 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2780 /* sanity checks. */
2781 reloc_howto_type
*reloc_howto
2782 = bfd_reloc_type_lookup (stdoutput
,
2783 (bfd_reloc_code_real_type
) reloc
);
2784 unsigned reloc_bitsize
= reloc_howto
->bitsize
;
2785 if (reloc_howto
->rightshift
)
2786 reloc_bitsize
-= reloc_howto
->rightshift
;
2787 if (reloc_bitsize
!= operand
->bits
)
2789 as_bad (_("invalid relocation %s for field"),
2790 bfd_get_reloc_code_name (reloc
));
2795 if (insn
->nfixups
>= MAX_INSN_FIXUPS
)
2796 as_fatal (_("too many fixups"));
2798 struct arc_fixup
*fixup
;
2799 fixup
= &insn
->fixups
[insn
->nfixups
++];
2801 fixup
->reloc
= reloc
;
2802 pcrel
= (operand
->flags
& ARC_OPERAND_PCREL
) ? 1 : 0;
2803 fixup
->pcrel
= pcrel
;
2804 fixup
->islong
= (operand
->flags
& ARC_OPERAND_LIMM
) ?
2811 for (i
= 0; i
< nflg
; i
++)
2813 const struct arc_flag_operand
*flg_operand
=
2814 &arc_flag_operands
[pflags
[i
].code
];
2816 /* Check if the instruction has a delay slot. */
2817 if (!strcmp (flg_operand
->name
, "d"))
2818 has_delay_slot
= TRUE
;
2820 /* There is an exceptional case when we cannot insert a flag
2821 just as it is. The .T flag must be handled in relation with
2822 the relative address. */
2823 if (!strcmp (flg_operand
->name
, "t")
2824 || !strcmp (flg_operand
->name
, "nt"))
2826 unsigned bitYoperand
= 0;
2827 /* FIXME! move selection bbit/brcc in arc-opc.c. */
2828 if (!strcmp (flg_operand
->name
, "t"))
2829 if (!strcmp (opcode
->name
, "bbit0")
2830 || !strcmp (opcode
->name
, "bbit1"))
2831 bitYoperand
= arc_NToperand
;
2833 bitYoperand
= arc_Toperand
;
2835 if (!strcmp (opcode
->name
, "bbit0")
2836 || !strcmp (opcode
->name
, "bbit1"))
2837 bitYoperand
= arc_Toperand
;
2839 bitYoperand
= arc_NToperand
;
2841 gas_assert (reloc_exp
!= NULL
);
2842 if (reloc_exp
->X_op
== O_constant
)
2844 /* Check if we have a constant and solved it
2846 offsetT val
= reloc_exp
->X_add_number
;
2847 image
|= insert_operand (image
, &arc_operands
[bitYoperand
],
2852 struct arc_fixup
*fixup
;
2854 if (insn
->nfixups
>= MAX_INSN_FIXUPS
)
2855 as_fatal (_("too many fixups"));
2857 fixup
= &insn
->fixups
[insn
->nfixups
++];
2858 fixup
->exp
= *reloc_exp
;
2859 fixup
->reloc
= -bitYoperand
;
2860 fixup
->pcrel
= pcrel
;
2861 fixup
->islong
= FALSE
;
2865 image
|= (flg_operand
->code
& ((1 << flg_operand
->bits
) - 1))
2866 << flg_operand
->shift
;
2869 /* Short instruction? */
2870 insn
->short_insn
= ARC_SHORT (opcode
->mask
) ? TRUE
: FALSE
;
2874 /* Update last insn status. */
2875 arc_last_insns
[1] = arc_last_insns
[0];
2876 arc_last_insns
[0].opcode
= opcode
;
2877 arc_last_insns
[0].has_limm
= insn
->has_limm
;
2878 arc_last_insns
[0].has_delay_slot
= has_delay_slot
;
2880 /* Check if the current instruction is legally used. */
2881 if (arc_last_insns
[1].has_delay_slot
2882 && is_br_jmp_insn_p (arc_last_insns
[0].opcode
))
2883 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
2884 _("A jump/branch instruction in delay slot."));
2887 /* Actually output an instruction with its fixup. */
2890 emit_insn (struct arc_insn
*insn
)
2895 pr_debug ("Emit insn : 0x%x\n", insn
->insn
);
2896 pr_debug ("\tShort : 0x%d\n", insn
->short_insn
);
2897 pr_debug ("\tLong imm: 0x%lx\n", insn
->limm
);
2899 /* Write out the instruction. */
2900 if (insn
->short_insn
)
2905 md_number_to_chars (f
, insn
->insn
, 2);
2906 md_number_to_chars_midend (f
+ 2, insn
->limm
, 4);
2907 dwarf2_emit_insn (6);
2912 md_number_to_chars (f
, insn
->insn
, 2);
2913 dwarf2_emit_insn (2);
2921 md_number_to_chars_midend (f
, insn
->insn
, 4);
2922 md_number_to_chars_midend (f
+ 4, insn
->limm
, 4);
2923 dwarf2_emit_insn (8);
2928 md_number_to_chars_midend (f
, insn
->insn
, 4);
2929 dwarf2_emit_insn (4);
2933 /* Apply the fixups in order. */
2934 for (i
= 0; i
< insn
->nfixups
; i
++)
2936 struct arc_fixup
*fixup
= &insn
->fixups
[i
];
2937 int size
, pcrel
, offset
= 0;
2939 /*FIXME! the reloc size is wrong in the BFD file. When it will
2940 be fixed please delete me. */
2941 size
= (insn
->short_insn
&& !fixup
->islong
) ? 2 : 4;
2944 offset
= (insn
->short_insn
) ? 2 : 4;
2946 /* Some fixups are only used internally, thus no howto. */
2947 if ((int) fixup
->reloc
< 0)
2949 /*FIXME! the reloc size is wrong in the BFD file. When it
2950 will be fixed please enable me.
2951 size = (insn->short_insn && !fixup->islong) ? 2 : 4; */
2952 pcrel
= fixup
->pcrel
;
2956 reloc_howto_type
*reloc_howto
=
2957 bfd_reloc_type_lookup (stdoutput
,
2958 (bfd_reloc_code_real_type
) fixup
->reloc
);
2959 gas_assert (reloc_howto
);
2960 /*FIXME! the reloc size is wrong in the BFD file. When it
2961 will be fixed please enable me.
2962 size = bfd_get_reloc_size (reloc_howto); */
2963 pcrel
= reloc_howto
->pc_relative
;
2966 pr_debug ("%s:%d: emit_insn: new %s fixup (PCrel:%s) of size %d @ offset %d\n",
2967 frag_now
->fr_file
, frag_now
->fr_line
,
2968 (fixup
->reloc
< 0) ? "Internal" :
2969 bfd_get_reloc_code_name (fixup
->reloc
),
2972 fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
2973 size
, &fixup
->exp
, pcrel
, fixup
->reloc
);
2975 /* Check for ZOLs, and update symbol info if any. */
2976 if (LP_INSN (insn
->insn
))
2978 gas_assert (fixup
->exp
.X_add_symbol
);
2979 ARC_SET_FLAG (fixup
->exp
.X_add_symbol
, ARC_FLAG_ZOL
);
2984 /* Insert an operand value into an instruction. */
2987 insert_operand (unsigned insn
,
2988 const struct arc_operand
*operand
,
2993 offsetT min
= 0, max
= 0;
2995 if (operand
->bits
!= 32
2996 && !(operand
->flags
& ARC_OPERAND_NCHK
)
2997 && !(operand
->flags
& ARC_OPERAND_FAKE
))
2999 if (operand
->flags
& ARC_OPERAND_SIGNED
)
3001 max
= (1 << (operand
->bits
- 1)) - 1;
3002 min
= -(1 << (operand
->bits
- 1));
3006 max
= (1 << operand
->bits
) - 1;
3010 if (val
< min
|| val
> max
)
3011 as_bad_value_out_of_range (_("operand"),
3012 val
, min
, max
, file
, line
);
3015 pr_debug ("insert field: %ld <= %ld <= %ld in 0x%08x\n",
3016 min
, val
, max
, insn
);
3018 if ((operand
->flags
& ARC_OPERAND_ALIGNED32
)
3020 as_bad_where (file
, line
,
3021 _("Unaligned operand. Needs to be 32bit aligned"));
3023 if ((operand
->flags
& ARC_OPERAND_ALIGNED16
)
3025 as_bad_where (file
, line
,
3026 _("Unaligned operand. Needs to be 16bit aligned"));
3028 if (operand
->insert
)
3030 const char *errmsg
= NULL
;
3032 insn
= (*operand
->insert
) (insn
, val
, &errmsg
);
3034 as_warn_where (file
, line
, "%s", errmsg
);
3038 if (operand
->flags
& ARC_OPERAND_TRUNCATE
)
3040 if (operand
->flags
& ARC_OPERAND_ALIGNED32
)
3042 if (operand
->flags
& ARC_OPERAND_ALIGNED16
)
3045 insn
|= ((val
& ((1 << operand
->bits
) - 1)) << operand
->shift
);
3051 arc_handle_align (fragS
* fragP
)
3053 if ((fragP
)->fr_type
== rs_align_code
)
3055 char *dest
= (fragP
)->fr_literal
+ (fragP
)->fr_fix
;
3056 valueT count
= ((fragP
)->fr_next
->fr_address
3057 - (fragP
)->fr_address
- (fragP
)->fr_fix
);
3059 (fragP
)->fr_var
= 2;
3061 if (count
& 1)/* Padding in the gap till the next 2-byte
3062 boundary with 0s. */
3067 /* Writing nop_s. */
3068 md_number_to_chars (dest
, NOP_OPCODE_S
, 2);
3072 /* Here we decide which fixups can be adjusted to make them relative
3073 to the beginning of the section instead of the symbol. Basically
3074 we need to make sure that the dynamic relocations are done
3075 correctly, so in some cases we force the original symbol to be
3079 tc_arc_fix_adjustable (fixS
*fixP
)
3082 /* Prevent all adjustments to global symbols. */
3083 if (S_IS_EXTERNAL (fixP
->fx_addsy
))
3085 if (S_IS_WEAK (fixP
->fx_addsy
))
3088 /* Adjust_reloc_syms doesn't know about the GOT. */
3089 switch (fixP
->fx_r_type
)
3091 case BFD_RELOC_ARC_GOTPC32
:
3092 case BFD_RELOC_ARC_PLT32
:
3093 case BFD_RELOC_ARC_S25H_PCREL_PLT
:
3094 case BFD_RELOC_ARC_S21H_PCREL_PLT
:
3095 case BFD_RELOC_ARC_S25W_PCREL_PLT
:
3096 case BFD_RELOC_ARC_S21W_PCREL_PLT
:
3103 return 0; /* FIXME! return 1, fix it in the linker. */
3106 /* Compute the reloc type of an expression EXP. */
3109 arc_check_reloc (expressionS
*exp
,
3110 bfd_reloc_code_real_type
*r_type_p
)
3112 if (*r_type_p
== BFD_RELOC_32
3113 && exp
->X_op
== O_subtract
3114 && exp
->X_op_symbol
!= NULL
3115 && exp
->X_op_symbol
->bsym
->section
== now_seg
)
3116 *r_type_p
= BFD_RELOC_ARC_32_PCREL
;
3120 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
3123 arc_cons_fix_new (fragS
*frag
,
3127 bfd_reloc_code_real_type r_type
)
3129 r_type
= BFD_RELOC_UNUSED
;
3134 r_type
= BFD_RELOC_8
;
3138 r_type
= BFD_RELOC_16
;
3142 r_type
= BFD_RELOC_24
;
3146 r_type
= BFD_RELOC_32
;
3147 arc_check_reloc (exp
, &r_type
);
3151 r_type
= BFD_RELOC_64
;
3155 as_bad (_("unsupported BFD relocation size %u"), size
);
3156 r_type
= BFD_RELOC_UNUSED
;
3159 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
3162 /* The actual routine that checks the ZOL conditions. */
3165 check_zol (symbolS
*s
)
3167 switch (arc_mach_type
)
3169 case bfd_mach_arc_arcv2
:
3170 if (arc_target
& ARC_OPCODE_ARCv2EM
)
3173 if (is_br_jmp_insn_p (arc_last_insns
[0].opcode
)
3174 || arc_last_insns
[1].has_delay_slot
)
3175 as_bad (_("Jump/Branch instruction detected at the end of the ZOL label @%s"),
3179 case bfd_mach_arc_arc600
:
3181 if (is_kernel_insn_p (arc_last_insns
[0].opcode
))
3182 as_bad (_("Kernel instruction detected at the end of the ZOL label @%s"),
3185 if (arc_last_insns
[0].has_limm
3186 && is_br_jmp_insn_p (arc_last_insns
[0].opcode
))
3187 as_bad (_("A jump instruction with long immediate detected at the \
3188 end of the ZOL label @%s"), S_GET_NAME (s
));
3191 case bfd_mach_arc_arc700
:
3192 if (arc_last_insns
[0].has_delay_slot
)
3193 as_bad (_("An illegal use of delay slot detected at the end of the ZOL label @%s"),
3202 /* If ZOL end check the last two instruction for illegals. */
3204 arc_frob_label (symbolS
* sym
)
3206 if (ARC_GET_FLAG (sym
) & ARC_FLAG_ZOL
)
3209 dwarf2_emit_label (sym
);