1 /* tc-cris.c -- Assembler code for the CRIS CPU core.
2 Copyright (C) 2000-2020 Free Software Foundation, Inc.
4 Contributed by Axis Communications AB, Lund, Sweden.
5 Originally written for GAS 1.38.1 by Mikael Asker.
6 Updates, BFDizing, GNUifying and ELF support by Hans-Peter Nilsson.
8 This file is part of GAS, the GNU Assembler.
10 GAS is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
15 GAS is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GAS; see the file COPYING. If not, write to the
22 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
23 MA 02110-1301, USA. */
26 #include "safe-ctype.h"
28 #include "opcode/cris.h"
29 #include "dwarf2dbg.h"
31 /* Conventions used here:
32 Generally speaking, pointers to binutils types such as "fragS" and
33 "expressionS" get parameter and variable names ending in "P", such as
34 "fragP", to harmonize with the rest of the binutils code. Other
35 pointers get a "p" suffix, such as "bufp". Any function or type-name
36 that could clash with a current or future binutils or GAS function get
39 #define SYNTAX_RELAX_REG_PREFIX "no_register_prefix"
40 #define SYNTAX_ENFORCE_REG_PREFIX "register_prefix"
41 #define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore"
42 #define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore"
43 #define REGISTER_PREFIX_CHAR '$'
45 /* True for expressions where getting X_add_symbol and X_add_number is
46 enough to get the "base" and "offset"; no need to make_expr_symbol.
47 It's not enough to check if X_op_symbol is NULL; that misses unary
48 operations like O_uminus. */
49 #define SIMPLE_EXPR(EXP) \
50 ((EXP)->X_op == O_constant || (EXP)->X_op == O_symbol)
52 /* Like in ":GOT", ":GOTOFF" etc. Other ports use '@', but that's in
53 line_separator_chars for CRIS, so we avoid it. */
54 #define RELOC_SUFFIX_CHAR ':'
56 /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only.
57 Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */
60 CRIS_INSN_NORMAL
, CRIS_INSN_NONE
, CRIS_INSN_BRANCH
, CRIS_INSN_MUL
63 /* An instruction will have one of these prefixes.
64 Although the same bit-pattern, we handle BDAP with an immediate
65 expression (eventually quick or [pc+]) different from when we only have
66 register expressions. */
69 PREFIX_NONE
, PREFIX_BDAP_IMM
, PREFIX_BDAP
, PREFIX_BIAP
, PREFIX_DIP
,
73 /* The prefix for an instruction. */
76 enum prefix_kind kind
;
80 /* There might be an expression to be evaluated, like I in [rN+I]. */
83 /* If there's an expression, we might need a relocation. Here's the
84 type of what relocation to start relaxation with.
85 The relocation is assumed to start immediately after the prefix insn,
86 so we don't provide an offset. */
87 enum bfd_reloc_code_real reloc
;
90 /* The description of the instruction being assembled. */
91 struct cris_instruction
93 /* If CRIS_INSN_NONE, then this insn is of zero length. */
94 enum cris_insn_kind insn_type
;
96 /* If a special register was mentioned, this is its description, else
98 const struct cris_spec_reg
*spec_reg
;
102 /* An insn may have at most one expression; theoretically there could be
103 another in its prefix (but I don't see how that could happen). */
106 /* The expression might need a relocation. Here's one to start
108 enum bfd_reloc_code_real reloc
;
110 /* The size in bytes of an immediate expression, or zero if
118 arch_crisv0
, arch_crisv3
, arch_crisv8
, arch_crisv10
,
119 arch_cris_any_v0_v10
, arch_crisv32
, arch_cris_common_v10_v32
122 static enum cris_archs
cris_arch_from_string (const char **);
123 static int cris_insn_ver_valid_for_arch (enum cris_insn_version_usage
,
126 static void cris_process_instruction (char *, struct cris_instruction
*,
127 struct cris_prefix
*);
128 static int get_bwd_size_modifier (char **, int *);
129 static int get_bw_size_modifier (char **, int *);
130 static int get_gen_reg (char **, int *);
131 static int get_spec_reg (char **, const struct cris_spec_reg
**);
132 static int get_sup_reg (char **, int *);
133 static int get_autoinc_prefix_or_indir_op (char **, struct cris_prefix
*,
136 static int get_3op_or_dip_prefix_op (char **, struct cris_prefix
*);
137 static int cris_get_expression (char **, expressionS
*);
138 static int get_flags (char **, int *);
139 static void gen_bdap (int, expressionS
*);
140 static int branch_disp (int);
141 static void gen_cond_branch_32 (char *, char *, fragS
*, symbolS
*, symbolS
*,
143 static void cris_number_to_imm (char *, long, int, fixS
*, segT
);
144 static void s_syntax (int);
145 static void s_cris_file (int);
146 static void s_cris_loc (int);
147 static void s_cris_arch (int);
148 static void s_cris_dtpoff (int);
150 /* Get ":GOT", ":GOTOFF", ":PLT" etc. suffixes. */
151 static void cris_get_reloc_suffix (char **, bfd_reloc_code_real_type
*,
153 static unsigned int cris_get_specified_reloc_size (bfd_reloc_code_real_type
);
155 /* All the .syntax functions. */
156 static void cris_force_reg_prefix (void);
157 static void cris_relax_reg_prefix (void);
158 static void cris_sym_leading_underscore (void);
159 static void cris_sym_no_leading_underscore (void);
160 static char *cris_insn_first_word_frag (void);
162 /* Handle to the opcode hash table. */
163 static htab_t op_hash
= NULL
;
165 /* If we target cris-axis-linux-gnu (as opposed to generic cris-axis-elf),
166 we default to no underscore and required register-prefixes. The
167 difference is in the default values. */
169 #define DEFAULT_CRIS_AXIS_LINUX_GNU TRUE
171 #define DEFAULT_CRIS_AXIS_LINUX_GNU FALSE
174 /* Whether we demand that registers have a `$' prefix. Default here. */
175 static bfd_boolean demand_register_prefix
= DEFAULT_CRIS_AXIS_LINUX_GNU
;
177 /* Whether global user symbols have a leading underscore. Default here. */
178 static bfd_boolean symbols_have_leading_underscore
179 = !DEFAULT_CRIS_AXIS_LINUX_GNU
;
181 /* Whether or not we allow PIC, and expand to PIC-friendly constructs. */
182 static bfd_boolean pic
= FALSE
;
184 /* Whether or not we allow TLS suffixes. For the moment, we always do. */
185 static const bfd_boolean tls
= TRUE
;
187 /* If we're configured for "cris", default to allow all v0..v10
188 instructions and register names. */
189 #ifndef DEFAULT_CRIS_ARCH
190 #define DEFAULT_CRIS_ARCH cris_any_v0_v10
193 /* No whitespace in the CONCAT2 parameter list. */
194 static enum cris_archs cris_arch
= XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
);
196 const pseudo_typeS md_pseudo_table
[] =
199 {"dtpoffd", s_cris_dtpoff
, 4},
200 {"syntax", s_syntax
, 0},
201 {"file", s_cris_file
, 0},
202 {"loc", s_cris_loc
, 0},
203 {"arch", s_cris_arch
, 0},
207 static int warn_for_branch_expansion
= 0;
209 /* Whether to emit error when a MULS/MULU could be located last on a
211 static int err_for_dangerous_mul_placement
212 = (XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
) != arch_crisv32
);
214 const char cris_comment_chars
[] = ";";
216 /* This array holds the chars that only start a comment at the beginning of
217 a line. If the line seems to have the form '# 123 filename'
218 .line and .file directives will appear in the pre-processed output. */
219 /* Note that input_file.c hand-checks for '#' at the beginning of the
220 first line of the input file. This is because the compiler outputs
221 #NO_APP at the beginning of its output. */
222 /* Also note that slash-star will always start a comment. */
223 const char line_comment_chars
[] = "#";
224 const char line_separator_chars
[] = "@";
226 /* Now all floating point support is shut off. See md_atof. */
227 const char EXP_CHARS
[] = "";
228 const char FLT_CHARS
[] = "";
230 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
232 ---/ /--+-----------------+-----------------+-----------------+
233 | what state ? | how long ? |
234 ---/ /--+-----------------+-----------------+-----------------+
236 The "how long" bits are 00 = byte, 01 = word, 10 = dword (long).
237 Not all lengths are legit for a given value of (what state).
239 Groups for CRIS address relaxing:
242 length: byte, word, 10-byte expansion
245 length: byte, word, dword
248 Not really a relaxation (no infrastructure to get delay-slots
249 right), just an alignment and placement checker for the v10
252 4. Bcc (V32 and later)
253 length: byte, word, 14-byte expansion
256 length: byte, word, error
259 length: byte, word, dword
265 #define STATE_COND_BRANCH (1)
266 #define STATE_BASE_PLUS_DISP_PREFIX (2)
267 #define STATE_MUL (3)
268 #define STATE_COND_BRANCH_V32 (4)
269 #define STATE_COND_BRANCH_COMMON (5)
270 #define STATE_ABS_BRANCH_V32 (6)
271 #define STATE_LAPC (7)
272 #define STATE_COND_BRANCH_PIC (8)
274 #define STATE_LENGTH_MASK (3)
275 #define STATE_BYTE (0)
276 #define STATE_WORD (1)
277 #define STATE_DWORD (2)
278 /* Symbol undefined. */
279 #define STATE_UNDF (3)
280 #define STATE_MAX_LENGTH (3)
282 /* These displacements are relative to the address following the opcode
283 word of the instruction. The first letter is Byte, Word. The 2nd
284 letter is Forward, Backward. */
286 #define BRANCH_BF ( 254)
287 #define BRANCH_BB (-256)
288 #define BRANCH_BF_V32 ( 252)
289 #define BRANCH_BB_V32 (-258)
290 #define BRANCH_WF (2 + 32767)
291 #define BRANCH_WB (2 + -32768)
292 #define BRANCH_WF_V32 (-2 + 32767)
293 #define BRANCH_WB_V32 (-2 + -32768)
295 #define BDAP_BF ( 127)
296 #define BDAP_BB (-128)
297 #define BDAP_WF ( 32767)
298 #define BDAP_WB (-32768)
300 #define ENCODE_RELAX(what, length) (((what) << 2) + (length))
302 const relax_typeS md_cris_relax_table
[] =
304 /* Error sentinel (0, 0). */
317 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (1, 1)},
319 /* Bcc [PC+] (1, 1). */
320 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (1, 2)},
322 /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
330 {BDAP_BF
, BDAP_BB
, 0, ENCODE_RELAX (2, 1)},
332 /* BDAP.[bw] [PC+] (2, 1). */
333 {BDAP_WF
, BDAP_WB
, 2, ENCODE_RELAX (2, 2)},
335 /* BDAP.d [PC+] (2, 2). */
341 /* MULS/MULU (3, 0). Positions (3, 1..3) are unused. */
342 {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0},
344 /* V32: Bcc o (4, 0). */
345 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (4, 1)},
347 /* V32: Bcc [PC+] (4, 1). */
348 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (4, 2)},
350 /* V32: BA .+12; NOP; BA32 target; NOP; Bcc .-6 (4, 2). */
356 /* COMMON: Bcc o (5, 0). The offsets are calculated as for v32. Code
357 should contain two nop insns (or four if offset size is large or
358 unknown) after every label. */
359 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (5, 1)},
361 /* COMMON: Bcc [PC+] (5, 1). */
362 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (5, 2)},
364 /* COMMON: FIXME: ???. Treat as error currently. */
370 /* V32: BA o (6, 0). */
371 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (6, 1)},
373 /* V32: BA.W (6, 1). */
374 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (6, 2)},
376 /* V32: BA.D (6, 2). */
382 /* LAPC: LAPCQ .+0..15*2,Rn (7, 0). */
383 {14*2, -1*2, 0, ENCODE_RELAX (7, 2)},
386 While there's a shorter sequence, e.g. LAPCQ + an ADDQ or SUBQ,
387 that would affect flags, so we can't do that as it wouldn't be a
388 proper insn expansion of LAPCQ. This row is associated with a
389 2-byte expansion, so it's unused rather than the next. */
392 /* LAPC: LAPC.D (7, 2). */
398 /* PIC for pre-v32: Bcc o (8, 0). */
399 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (STATE_COND_BRANCH_PIC
, 1)},
401 /* Bcc [PC+] (8, 1). */
402 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (STATE_COND_BRANCH_PIC
, 2)},
404 /* 32-bit expansion, PIC (8, 2). */
416 /* Target-specific multicharacter options, not const-declared. */
417 struct option md_longopts
[] =
419 #define OPTION_NO_US (OPTION_MD_BASE + 0)
420 {"no-underscore", no_argument
, NULL
, OPTION_NO_US
},
421 #define OPTION_US (OPTION_MD_BASE + 1)
422 {"underscore", no_argument
, NULL
, OPTION_US
},
423 #define OPTION_PIC (OPTION_US + 1)
424 {"pic", no_argument
, NULL
, OPTION_PIC
},
425 #define OPTION_MULBUG_ABORT_ON (OPTION_PIC + 1)
426 {"mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_ON
},
427 #define OPTION_MULBUG_ABORT_OFF (OPTION_MULBUG_ABORT_ON + 1)
428 {"no-mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_OFF
},
429 #define OPTION_ARCH (OPTION_MULBUG_ABORT_OFF + 1)
430 {"march", required_argument
, NULL
, OPTION_ARCH
},
431 {NULL
, no_argument
, NULL
, 0}
434 /* Not const-declared. */
435 size_t md_longopts_size
= sizeof (md_longopts
);
436 const char *md_shortopts
= "hHN";
438 /* At first glance, this may seems wrong and should be 4 (ba + nop); but
439 since a short_jump must skip a *number* of long jumps, it must also be
440 a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop"
441 for the delay slot and hope that the jump table at most needs
442 32767/4=8191 long-jumps. A branch is better than a jump, since it is
443 relative; we will not have a reloc to fix up somewhere.
445 Note that we can't add relocs, because relaxation uses these fixed
446 numbers, and md_create_short_jump is called after relaxation. */
448 int md_short_jump_size
= 6;
450 /* The v32 version has a delay-slot, hence two bytes longer.
451 The pre-v32 PIC version uses a prefixed insn. */
452 #define cris_any_v0_v10_long_jump_size 6
453 #define cris_any_v0_v10_long_jump_size_pic 8
454 #define crisv32_long_jump_size 8
456 int md_long_jump_size
= XCONCAT2 (DEFAULT_CRIS_ARCH
,_long_jump_size
);
458 /* Report output format. Small changes in output format (like elf
459 variants below) can happen until all options are parsed, but after
460 that, the output format must remain fixed. */
463 cris_target_format (void)
465 switch (OUTPUT_FLAVOR
)
467 case bfd_target_aout_flavour
:
470 case bfd_target_elf_flavour
:
471 if (symbols_have_leading_underscore
)
472 return "elf32-us-cris";
481 /* Return a bfd_mach_cris... value corresponding to the value of
487 unsigned int retval
= 0;
491 case arch_cris_common_v10_v32
:
492 retval
= bfd_mach_cris_v10_v32
;
496 retval
= bfd_mach_cris_v32
;
500 case arch_cris_any_v0_v10
:
501 retval
= bfd_mach_cris_v0_v10
;
505 BAD_CASE (cris_arch
);
511 /* We need a port-specific relaxation function to cope with sym2 - sym1
512 relative expressions with both symbols in the same segment (but not
513 necessarily in the same frag as this insn), for example:
514 move.d [pc+sym2-(sym1-2)],r10
516 The offset can be 8, 16 or 32 bits long. */
519 cris_relax_frag (segT seg ATTRIBUTE_UNUSED
, fragS
*fragP
,
520 long stretch ATTRIBUTE_UNUSED
)
525 const relax_typeS
*this_type
;
526 const relax_typeS
*start_type
;
527 relax_substateT next_state
;
528 relax_substateT this_state
;
529 const relax_typeS
*table
= TC_GENERIC_RELAX_TABLE
;
531 /* We only have to cope with frags as prepared by
532 md_estimate_size_before_relax. The dword cases may get here
533 because of the different reasons that they aren't relaxable. */
534 switch (fragP
->fr_subtype
)
536 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
537 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
538 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
539 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
540 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
541 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
542 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
543 /* When we get to these states, the frag won't grow any more. */
546 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
547 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
548 if (fragP
->fr_symbol
== NULL
549 || S_GET_SEGMENT (fragP
->fr_symbol
) != absolute_section
)
550 as_fatal (_("internal inconsistency problem in %s: fr_symbol %lx"),
551 __FUNCTION__
, (long) fragP
->fr_symbol
);
552 symbolP
= fragP
->fr_symbol
;
553 if (symbol_resolved_p (symbolP
))
554 as_fatal (_("internal inconsistency problem in %s: resolved symbol"),
556 aim
= S_GET_VALUE (symbolP
);
559 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
560 /* Nothing to do here. */
564 as_fatal (_("internal inconsistency problem in %s: fr_subtype %d"),
565 __FUNCTION__
, fragP
->fr_subtype
);
568 /* The rest is stolen from relax_frag. There's no obvious way to
569 share the code, but fortunately no requirement to keep in sync as
570 long as fragP->fr_symbol does not have its segment changed. */
572 this_state
= fragP
->fr_subtype
;
573 start_type
= this_type
= table
+ this_state
;
577 /* Look backwards. */
578 for (next_state
= this_type
->rlx_more
; next_state
;)
579 if (aim
>= this_type
->rlx_backward
)
583 /* Grow to next state. */
584 this_state
= next_state
;
585 this_type
= table
+ this_state
;
586 next_state
= this_type
->rlx_more
;
592 for (next_state
= this_type
->rlx_more
; next_state
;)
593 if (aim
<= this_type
->rlx_forward
)
597 /* Grow to next state. */
598 this_state
= next_state
;
599 this_type
= table
+ this_state
;
600 next_state
= this_type
->rlx_more
;
604 growth
= this_type
->rlx_length
- start_type
->rlx_length
;
606 fragP
->fr_subtype
= this_state
;
610 /* Prepare machine-dependent frags for relaxation.
612 Called just before relaxation starts. Any symbol that is now undefined
613 will not become defined.
615 Return the correct fr_subtype in the frag.
617 Return the initial "guess for fr_var" to caller. The guess for fr_var
618 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
619 or fr_var contributes to our returned value.
621 Although it may not be explicit in the frag, pretend
622 fr_var starts with a value. */
625 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
628 symbolS
*symbolP
= fragP
->fr_symbol
;
630 #define HANDLE_RELAXABLE(state) \
631 case ENCODE_RELAX (state, STATE_UNDF): \
632 if (symbolP != NULL \
633 && S_GET_SEGMENT (symbolP) == segment_type \
634 && !S_IS_WEAK (symbolP)) \
635 /* The symbol lies in the same segment - a relaxable \
638 = ENCODE_RELAX (state, STATE_BYTE); \
640 /* Unknown or not the same segment, so not relaxable. */ \
642 = ENCODE_RELAX (state, STATE_DWORD); \
644 = md_cris_relax_table[fragP->fr_subtype].rlx_length; \
647 old_fr_fix
= fragP
->fr_fix
;
649 switch (fragP
->fr_subtype
)
651 HANDLE_RELAXABLE (STATE_COND_BRANCH
);
652 HANDLE_RELAXABLE (STATE_COND_BRANCH_V32
);
653 HANDLE_RELAXABLE (STATE_COND_BRANCH_COMMON
);
654 HANDLE_RELAXABLE (STATE_COND_BRANCH_PIC
);
655 HANDLE_RELAXABLE (STATE_ABS_BRANCH_V32
);
657 case ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
):
659 && S_GET_SEGMENT (symbolP
) == segment_type
660 && !S_IS_WEAK (symbolP
))
662 /* The symbol lies in the same segment - a relaxable case.
663 Check if we currently have an odd offset; we can't code
664 that into the instruction. Relaxing presumably only cause
665 multiple-of-two changes, so we should only need to adjust
667 bfd_vma target_address
669 ? S_GET_VALUE (symbolP
)
670 : 0) + fragP
->fr_offset
;
671 bfd_vma var_part_offset
= fragP
->fr_fix
;
672 bfd_vma address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
673 long offset
= target_address
- (address_of_var_part
- 2);
677 ? ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
)
678 : ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
);
681 /* Unknown or not the same segment, so not relaxable. */
683 = ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
);
685 = md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
688 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
):
689 /* Note that we can not do anything sane with relaxing
690 [rX + a_known_symbol_in_text], it will have to be a 32-bit
693 We could play tricks with managing a constant pool and make
694 a_known_symbol_in_text a "bdap [pc + offset]" pointing there
695 (like the GOT for ELF shared libraries), but that's no use, it
696 would in general be no shorter or faster code, only more
699 if (S_GET_SEGMENT (symbolP
) != absolute_section
)
701 /* Go for dword if not absolute or same segment. */
703 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
);
704 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
706 else if (!symbol_resolved_p (fragP
->fr_symbol
))
708 /* The symbol will eventually be completely resolved as an
709 absolute expression, but right now it depends on the result
710 of relaxation and we don't know anything else about the
711 value. We start relaxation with the assumption that it'll
714 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
);
715 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
719 /* Absolute expression. */
721 value
= (symbolP
!= NULL
722 ? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
724 if (value
>= -128 && value
<= 127)
726 /* Byte displacement. */
727 (fragP
->fr_opcode
)[0] = value
;
731 /* Word or dword displacement. */
732 int pow2_of_size
= 1;
735 if (value
< -32768 || value
> 32767)
737 /* Outside word range, make it a dword. */
741 /* Modify the byte-offset BDAP into a word or dword offset
742 BDAP. Or really, a BDAP rX,8bit into a
743 BDAP.[wd] rX,[PC+] followed by a word or dword. */
744 (fragP
->fr_opcode
)[0] = BDAP_PC_LOW
+ pow2_of_size
* 16;
746 /* Keep the register number in the highest four bits. */
747 (fragP
->fr_opcode
)[1] &= 0xF0;
748 (fragP
->fr_opcode
)[1] |= BDAP_INCR_HIGH
;
750 /* It grew by two or four bytes. */
751 fragP
->fr_fix
+= 1 << pow2_of_size
;
752 writep
= fragP
->fr_literal
+ old_fr_fix
;
753 md_number_to_chars (writep
, value
, 1 << pow2_of_size
);
759 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
760 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
761 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
762 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_BYTE
):
763 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_WORD
):
764 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
765 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
766 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
767 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
768 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
769 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
770 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
771 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
772 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
773 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
774 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
775 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
776 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
777 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
778 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
779 /* When relaxing a section for the second time, we don't need to
780 do anything except making sure that fr_var is set right. */
781 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
784 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
785 /* Nothing to do here. */
789 BAD_CASE (fragP
->fr_subtype
);
792 return fragP
->fr_var
+ (fragP
->fr_fix
- old_fr_fix
);
795 /* Perform post-processing of machine-dependent frags after relaxation.
796 Called after relaxation is finished.
798 fr_type == rs_machine_dependent.
799 fr_subtype is what the address relaxed to.
801 Out: Any fixS:s and constants are set up.
803 The caller will turn the frag into a ".space 0". */
806 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec ATTRIBUTE_UNUSED
,
809 /* Pointer to first byte in variable-sized part of the frag. */
812 /* Pointer to first opcode byte in frag. */
815 /* Used to check integrity of the relaxation.
816 One of 2 = long, 1 = word, or 0 = byte. */
817 int length_code ATTRIBUTE_UNUSED
;
819 /* Size in bytes of variable-sized part of frag. */
820 int var_part_size
= 0;
822 /* This is part of *fragP. It contains all information about addresses
823 and offsets to varying parts. */
825 unsigned long var_part_offset
;
827 /* Where, in file space, is _var of *fragP? */
828 unsigned long address_of_var_part
= 0;
830 /* Where, in file space, does addr point? */
831 unsigned long target_address
;
833 know (fragP
->fr_type
== rs_machine_dependent
);
835 length_code
= fragP
->fr_subtype
& STATE_LENGTH_MASK
;
836 know (length_code
>= 0 && length_code
< STATE_MAX_LENGTH
);
838 var_part_offset
= fragP
->fr_fix
;
839 var_partp
= fragP
->fr_literal
+ var_part_offset
;
840 opcodep
= fragP
->fr_opcode
;
842 symbolP
= fragP
->fr_symbol
;
843 target_address
= (symbolP
? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
844 address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
846 switch (fragP
->fr_subtype
)
848 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
849 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_BYTE
):
850 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
851 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
852 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
853 opcodep
[0] = branch_disp ((target_address
- address_of_var_part
));
857 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
858 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_WORD
):
859 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
860 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
861 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
862 /* We had a quick immediate branch, now turn it into a word one i.e. a
864 opcodep
[0] = BRANCH_PC_LOW
;
866 opcodep
[1] |= BRANCH_INCR_HIGH
;
867 md_number_to_chars (var_partp
,
870 - (address_of_var_part
871 + (cris_arch
== arch_crisv32
872 || cris_arch
== arch_cris_common_v10_v32
878 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
879 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
880 fragP
->fr_symbol
, (symbolS
*) NULL
,
882 /* Ten bytes added: a branch, nop and a jump. */
883 var_part_size
= 2 + 2 + 4 + 2;
886 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
887 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
888 fragP
->fr_symbol
, (symbolS
*) NULL
,
890 /* Twelve bytes added: a branch, nop and a pic-branch-32. */
891 var_part_size
= 2 + 2 + 4 + 2 + 2;
894 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
895 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
896 fragP
->fr_symbol
, (symbolS
*) NULL
,
898 /* Twelve bytes added: a branch, nop and another branch and nop. */
899 var_part_size
= 2 + 2 + 2 + 4 + 2;
902 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
903 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
904 _("Relaxation to long branches for .arch common_v10_v32\
906 /* Pretend we have twelve bytes for sake of quelling further
908 var_part_size
= 2 + 2 + 2 + 4 + 2;
911 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
912 /* We had a quick immediate branch or a word immediate ba. Now
913 turn it into a dword one. */
914 opcodep
[0] = BA_DWORD_OPCODE
& 255;
915 opcodep
[1] = (BA_DWORD_OPCODE
>> 8) & 255;
916 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, symbolP
,
917 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
921 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
923 long offset
= target_address
- (address_of_var_part
- 2);
925 /* This is mostly a sanity check; useful occurrences (if there
926 really are any) should have been caught in
927 md_estimate_size_before_relax. We can (at least
928 theoretically) stumble over invalid code with odd sizes and
929 .p2aligns within the code, so emit an error if that happens.
930 (The generic relaxation machinery is not fit to check this.) */
933 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
934 _("Complicated LAPC target operand is not\
935 a multiple of two. Use LAPC.D"));
937 /* FIXME: This *is* a sanity check. Remove when done with. */
938 if (offset
> 15*2 || offset
< 0)
939 as_fatal (_("Internal error found in md_convert_frag: offset %ld.\
940 Please report this."),
943 opcodep
[0] |= (offset
/ 2) & 0xf;
948 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
950 md_number_to_chars (opcodep
,
951 LAPC_DWORD_OPCODE
+ (opcodep
[1] & 0xf0) * 256,
953 /* Remember that the reloc is against the position *after* the
954 relocated contents, so we need to adjust to the start of
956 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
957 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
962 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
964 as_fatal (_("internal inconsistency in %s: bdapq no symbol"),
966 opcodep
[0] = S_GET_VALUE (symbolP
);
970 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
971 /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
972 one that uses PC autoincrement. */
973 opcodep
[0] = BDAP_PC_LOW
+ (1 << 4);
975 opcodep
[1] |= BDAP_INCR_HIGH
;
977 as_fatal (_("internal inconsistency in %s: bdap.w with no symbol"),
979 md_number_to_chars (var_partp
, S_GET_VALUE (symbolP
), 2);
983 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
984 /* We had a BDAP 16-bit "word", change the offset to a dword. */
985 opcodep
[0] = BDAP_PC_LOW
+ (2 << 4);
987 opcodep
[1] |= BDAP_INCR_HIGH
;
988 if (fragP
->fr_symbol
== NULL
)
989 md_number_to_chars (var_partp
, fragP
->fr_offset
, 4);
991 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
992 fragP
->fr_offset
, 0, BFD_RELOC_32
);
996 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
997 /* This is the only time we check position and alignment of the
998 placement-tracking frag. */
999 if (sec
->alignment_power
< 2)
1000 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1001 _("section alignment must be >= 4 bytes to check MULS/MULU safeness"));
1004 /* If the address after the MULS/MULU has alignment which is
1005 that of the section and may be that of a cache-size of the
1006 buggy versions, then the MULS/MULU can be placed badly. */
1007 if ((address_of_var_part
1008 & ((1 << sec
->alignment_power
) - 1) & 31) == 0)
1009 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1010 _("dangerous MULS/MULU location; give it higher alignment"));
1015 BAD_CASE (fragP
->fr_subtype
);
1019 fragP
->fr_fix
+= var_part_size
;
1022 /* Generate a short jump around a secondary jump table.
1023 Also called from md_create_long_jump, when sufficient. */
1026 md_create_short_jump (char *storep
, addressT from_addr
, addressT to_addr
,
1027 fragS
*fragP ATTRIBUTE_UNUSED
,
1028 symbolS
*to_symbol ATTRIBUTE_UNUSED
)
1032 /* See md_create_long_jump about the comment on the "+ 2". */
1033 long int max_minimal_minus_distance
;
1034 long int max_minimal_plus_distance
;
1035 long int max_minus_distance
;
1036 long int max_plus_distance
;
1039 if (cris_arch
== arch_crisv32
)
1041 max_minimal_minus_distance
= BRANCH_BB_V32
+ 2;
1042 max_minimal_plus_distance
= BRANCH_BF_V32
+ 2;
1043 max_minus_distance
= BRANCH_WB_V32
+ 2;
1044 max_plus_distance
= BRANCH_WF_V32
+ 2;
1045 nop_opcode
= NOP_OPCODE_V32
;
1047 else if (cris_arch
== arch_cris_common_v10_v32
)
1048 /* Bail out for compatibility mode. (It seems it can be implemented,
1049 perhaps with a 10-byte sequence: "move.d NNNN,$pc/$acr", "jump
1050 $acr", "nop"; but doesn't seem worth it at the moment.) */
1051 as_fatal (_("Out-of-range .word offset handling\
1052 is not implemented for .arch common_v10_v32"));
1055 max_minimal_minus_distance
= BRANCH_BB
+ 2;
1056 max_minimal_plus_distance
= BRANCH_BF
+ 2;
1057 max_minus_distance
= BRANCH_WB
+ 2;
1058 max_plus_distance
= BRANCH_WF
+ 2;
1059 nop_opcode
= NOP_OPCODE
;
1062 distance
= to_addr
- from_addr
;
1064 if (max_minimal_minus_distance
<= distance
1065 && distance
<= max_minimal_plus_distance
)
1067 /* Create a "short" short jump: "BA distance - 2". */
1068 storep
[0] = branch_disp (distance
- 2);
1069 storep
[1] = BA_QUICK_HIGH
;
1071 /* A nop for the delay slot. */
1072 md_number_to_chars (storep
+ 2, nop_opcode
, 2);
1074 /* The extra word should be filled with something sane too. Make it
1075 a nop to keep disassembly sane. */
1076 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1078 else if (max_minus_distance
<= distance
1079 && distance
<= max_plus_distance
)
1081 /* Make it a "long" short jump: "BA (PC+)". */
1082 md_number_to_chars (storep
, BA_PC_INCR_OPCODE
, 2);
1084 /* ".WORD distance - 4". */
1085 md_number_to_chars (storep
+ 2,
1086 (long) (distance
- 4
1087 - (cris_arch
== arch_crisv32
1091 /* A nop for the delay slot. */
1092 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1095 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1096 _(".word case-table handling failed: table too large"));
1099 /* Generate a long jump in a secondary jump table.
1101 storep Where to store the jump instruction.
1102 from_addr Address of the jump instruction.
1103 to_addr Destination address of the jump.
1104 fragP Which frag the destination address operand
1106 to_symbol Destination symbol. */
1109 md_create_long_jump (char *storep
, addressT from_addr
, addressT to_addr
,
1110 fragS
*fragP
, symbolS
*to_symbol
)
1114 /* FIXME: What's that "+ 3"? It comes from the magic numbers that
1115 used to be here, it's just translated to the limit macros used in
1116 the relax table. But why + 3? */
1117 long int max_short_minus_distance
1118 = cris_arch
!= arch_crisv32
? BRANCH_WB
+ 3 : BRANCH_WB_V32
+ 3;
1120 long int max_short_plus_distance
1121 = cris_arch
!= arch_crisv32
? BRANCH_WF
+ 3 : BRANCH_WF_V32
+ 3;
1123 distance
= to_addr
- from_addr
;
1125 if (max_short_minus_distance
<= distance
1126 && distance
<= max_short_plus_distance
)
1128 /* Then make it a "short" long jump. */
1129 md_create_short_jump (storep
, from_addr
, to_addr
, fragP
,
1131 if (cris_arch
== arch_crisv32
)
1132 md_number_to_chars (storep
+ 6, NOP_OPCODE_V32
, 2);
1134 md_number_to_chars (storep
+ 6, NOP_OPCODE
, 2);
1138 /* We have a "long" long jump: "JUMP [PC+]". If CRISv32, always
1139 make it a BA. Else make it an "MOVE [PC=PC+N],P0" if we're supposed
1140 to emit PIC code. */
1141 md_number_to_chars (storep
,
1142 cris_arch
== arch_crisv32
1144 : (pic
? MOVE_PC_INCR_OPCODE_PREFIX
1145 : JUMP_PC_INCR_OPCODE
),
1148 /* Follow with a ".DWORD to_addr", PC-relative for PIC. */
1149 fix_new (fragP
, storep
+ 2 - fragP
->fr_literal
, 4, to_symbol
,
1150 cris_arch
== arch_crisv32
? 6 : 0,
1151 cris_arch
== arch_crisv32
|| pic
? 1 : 0,
1152 cris_arch
== arch_crisv32
|| pic
1153 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
1155 /* Follow it with a "NOP" for CRISv32. */
1156 if (cris_arch
== arch_crisv32
)
1157 md_number_to_chars (storep
+ 6, NOP_OPCODE_V32
, 2);
1159 /* ...and the rest of the move-opcode for pre-v32 PIC. */
1160 md_number_to_chars (storep
+ 6, MOVE_PC_INCR_OPCODE_SUFFIX
, 2);
1164 /* Allocate space for the first piece of an insn, and mark it as the
1165 start of the insn for debug-format use. */
1168 cris_insn_first_word_frag (void)
1170 char *insnp
= frag_more (2);
1172 /* We need to mark the start of the insn by passing dwarf2_emit_insn
1173 the offset from the current fragment position. This must be done
1174 after the first fragment is created but before any other fragments
1175 (fixed or varying) are created. Note that the offset only
1176 corresponds to the "size" of the insn for a fixed-size,
1177 non-expanded insn. */
1178 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
1179 dwarf2_emit_insn (2);
1184 /* Port-specific assembler initialization. */
1191 /* Set up a hash table for the instructions. */
1192 op_hash
= str_htab_create ();
1193 if (op_hash
== NULL
)
1194 as_fatal (_("Virtual memory exhausted"));
1196 /* Enable use of ".if ..asm.arch.cris.v32"
1197 and ".if ..asm.arch.cris.common_v10_v32" and a few others. */
1198 symbol_table_insert (symbol_new ("..asm.arch.cris.v32", absolute_section
,
1200 cris_arch
== arch_crisv32
));
1201 symbol_table_insert (symbol_new ("..asm.arch.cris.v10", absolute_section
,
1203 cris_arch
== arch_crisv10
));
1204 symbol_table_insert (symbol_new ("..asm.arch.cris.common_v10_v32",
1207 cris_arch
== arch_cris_common_v10_v32
));
1208 symbol_table_insert (symbol_new ("..asm.arch.cris.any_v0_v10",
1211 cris_arch
== arch_cris_any_v0_v10
));
1213 while (cris_opcodes
[i
].name
!= NULL
)
1215 const char *name
= cris_opcodes
[i
].name
;
1217 if (! cris_insn_ver_valid_for_arch (cris_opcodes
[i
].applicable_version
,
1224 if (str_hash_insert (op_hash
, name
, &cris_opcodes
[i
], 0) != NULL
)
1225 as_fatal (_("duplicate %s"), name
);
1229 if (cris_opcodes
[i
].match
& cris_opcodes
[i
].lose
)
1230 as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes
[i
].name
,
1231 cris_opcodes
[i
].args
);
1235 while (cris_opcodes
[i
].name
!= NULL
1236 && strcmp (cris_opcodes
[i
].name
, name
) == 0);
1240 /* Assemble a source line. */
1243 md_assemble (char *str
)
1245 struct cris_instruction output_instruction
;
1246 struct cris_prefix prefix
;
1252 /* Do the low-level grunt - assemble to bits and split up into a prefix
1253 and ordinary insn. */
1254 cris_process_instruction (str
, &output_instruction
, &prefix
);
1256 /* Handle any prefixes to the instruction. */
1257 switch (prefix
.kind
)
1262 /* When the expression is unknown for a BDAP, it can need 0, 2 or 4
1263 extra bytes, so we handle it separately. */
1264 case PREFIX_BDAP_IMM
:
1265 /* We only do it if the relocation is unspecified, i.e. not a PIC or TLS
1267 if (prefix
.reloc
== BFD_RELOC_NONE
)
1269 gen_bdap (prefix
.base_reg_number
, &prefix
.expr
);
1276 opcodep
= cris_insn_first_word_frag ();
1278 /* Output the prefix opcode. */
1279 md_number_to_chars (opcodep
, (long) prefix
.opcode
, 2);
1281 /* Having a specified reloc only happens for DIP and for BDAP with
1282 PIC or TLS operands, but it is ok to drop through here for the other
1283 prefixes as they can have no relocs specified. */
1284 if (prefix
.reloc
!= BFD_RELOC_NONE
)
1286 unsigned int relocsize
1287 = (prefix
.kind
== PREFIX_DIP
1288 ? 4 : cris_get_specified_reloc_size (prefix
.reloc
));
1290 p
= frag_more (relocsize
);
1291 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
), relocsize
,
1292 &prefix
.expr
, 0, prefix
.reloc
);
1297 opcodep
= cris_insn_first_word_frag ();
1299 /* Output the prefix opcode. Being a "push", we add the negative
1300 size of the register to "sp". */
1301 if (output_instruction
.spec_reg
!= NULL
)
1303 /* Special register. */
1304 opcodep
[0] = -output_instruction
.spec_reg
->reg_size
;
1308 /* General register. */
1311 opcodep
[1] = (REG_SP
<< 4) + (BDAP_QUICK_OPCODE
>> 8);
1315 BAD_CASE (prefix
.kind
);
1318 /* If we only had a prefix insn, we're done. */
1319 if (output_instruction
.insn_type
== CRIS_INSN_NONE
)
1322 /* Done with the prefix. Continue with the main instruction. */
1323 if (prefix
.kind
== PREFIX_NONE
)
1324 opcodep
= cris_insn_first_word_frag ();
1326 opcodep
= frag_more (2);
1328 /* Output the instruction opcode. */
1329 md_number_to_chars (opcodep
, (long) (output_instruction
.opcode
), 2);
1331 /* Output the symbol-dependent instruction stuff. */
1332 if (output_instruction
.insn_type
== CRIS_INSN_BRANCH
)
1334 segT to_seg
= absolute_section
;
1335 int is_undefined
= 0;
1338 if (output_instruction
.expr
.X_op
!= O_constant
)
1340 to_seg
= S_GET_SEGMENT (output_instruction
.expr
.X_add_symbol
);
1342 if (to_seg
== undefined_section
)
1346 if (to_seg
== now_seg
|| is_undefined
1347 /* In CRISv32, there *is* a 32-bit absolute branch, so don't
1348 emit the 12-byte sequence for known symbols in other
1350 || (cris_arch
== arch_crisv32
1351 && output_instruction
.opcode
== BA_QUICK_OPCODE
))
1353 /* Handle complex expressions. */
1355 = (SIMPLE_EXPR (&output_instruction
.expr
)
1356 ? output_instruction
.expr
.X_add_number
1359 = (SIMPLE_EXPR (&output_instruction
.expr
)
1360 ? output_instruction
.expr
.X_add_symbol
1361 : make_expr_symbol (&output_instruction
.expr
));
1363 /* If is_undefined, the expression may still become now_seg.
1364 That case is handled by md_estimate_size_before_relax. */
1365 length_code
= to_seg
== now_seg
? STATE_BYTE
: STATE_UNDF
;
1367 /* Make room for max twelve bytes of variable length for v32 mode
1368 or PIC, ten for v10 and older. */
1369 frag_var (rs_machine_dependent
,
1370 (cris_arch
== arch_crisv32
1371 || cris_arch
== arch_cris_common_v10_v32
1372 || pic
) ? 12 : 10, 0,
1373 ENCODE_RELAX (cris_arch
== arch_crisv32
1374 ? (output_instruction
.opcode
1376 ? STATE_ABS_BRANCH_V32
1377 : STATE_COND_BRANCH_V32
)
1378 : (cris_arch
== arch_cris_common_v10_v32
1379 ? STATE_COND_BRANCH_COMMON
1380 : (pic
? STATE_COND_BRANCH_PIC
1381 : STATE_COND_BRANCH
)),
1383 sym
, addvalue
, opcodep
);
1387 /* We have: to_seg != now_seg && to_seg != undefined_section.
1388 This means it is a branch to a known symbol in another
1389 section, perhaps an absolute address. Emit a 32-bit branch. */
1391 = frag_more ((cris_arch
== arch_crisv32
1392 || cris_arch
== arch_cris_common_v10_v32
1396 gen_cond_branch_32 (opcodep
, cond_jump
, frag_now
,
1397 output_instruction
.expr
.X_add_symbol
,
1399 output_instruction
.expr
.X_add_number
);
1402 else if (output_instruction
.insn_type
== CRIS_INSN_MUL
1403 && err_for_dangerous_mul_placement
)
1404 /* Create a frag which which we track the location of the mul insn
1405 (in the last two bytes before the mul-frag). */
1406 frag_variant (rs_machine_dependent
, 0, 0,
1407 ENCODE_RELAX (STATE_MUL
, STATE_BYTE
),
1411 if (output_instruction
.imm_oprnd_size
> 0)
1413 /* The instruction has an immediate operand. */
1414 enum bfd_reloc_code_real reloc
= BFD_RELOC_NONE
;
1416 switch (output_instruction
.imm_oprnd_size
)
1418 /* Any byte-size immediate constants are treated as
1419 word-size. FIXME: Thus overflow check does not work
1423 /* Note that size-check for the explicit reloc has already
1424 been done when we get here. */
1425 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1426 reloc
= output_instruction
.reloc
;
1428 reloc
= BFD_RELOC_16
;
1432 /* Allow a relocation specified in the operand. */
1433 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1434 reloc
= output_instruction
.reloc
;
1436 reloc
= BFD_RELOC_32
;
1440 BAD_CASE (output_instruction
.imm_oprnd_size
);
1443 p
= frag_more (output_instruction
.imm_oprnd_size
);
1444 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
),
1445 output_instruction
.imm_oprnd_size
,
1446 &output_instruction
.expr
,
1447 reloc
== BFD_RELOC_32_PCREL
1448 || reloc
== BFD_RELOC_16_PCREL
1449 || reloc
== BFD_RELOC_8_PCREL
, reloc
);
1451 else if (output_instruction
.reloc
== BFD_RELOC_CRIS_LAPCQ_OFFSET
1452 && output_instruction
.expr
.X_md
!= 0)
1454 /* Handle complex expressions. */
1456 = (output_instruction
.expr
.X_op_symbol
!= NULL
1457 ? 0 : output_instruction
.expr
.X_add_number
);
1459 = (output_instruction
.expr
.X_op_symbol
!= NULL
1460 ? make_expr_symbol (&output_instruction
.expr
)
1461 : output_instruction
.expr
.X_add_symbol
);
1463 /* This is a relaxing construct, so we need a frag_var rather
1464 than the fix_new_exp call below. */
1465 frag_var (rs_machine_dependent
,
1467 ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
),
1468 sym
, addvalue
, opcodep
);
1470 else if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1472 /* An immediate operand that has a relocation and needs to be
1473 processed further. */
1475 /* It is important to use fix_new_exp here and everywhere else
1476 (and not fix_new), as fix_new_exp can handle "difference
1477 expressions" - where the expression contains a difference of
1478 two symbols in the same segment. */
1479 fix_new_exp (frag_now
, (opcodep
- frag_now
->fr_literal
), 2,
1480 &output_instruction
.expr
,
1481 output_instruction
.reloc
== BFD_RELOC_32_PCREL
1482 || output_instruction
.reloc
== BFD_RELOC_16_PCREL
1483 || output_instruction
.reloc
== BFD_RELOC_8_PCREL
1484 || (output_instruction
.reloc
1485 == BFD_RELOC_CRIS_LAPCQ_OFFSET
),
1486 output_instruction
.reloc
);
1491 /* Helper error-reporting function: calls as_bad for a format string
1492 for a single value and zeroes the offending value (zero assumed
1493 being a valid value) to avoid repeated error reports in later value
1497 cris_bad (const char *format
, offsetT
*valp
)
1499 /* We cast to long so the format string can assume that format. */
1500 as_bad (format
, (long) *valp
);
1504 /* Low level text-to-bits assembly. */
1507 cris_process_instruction (char *insn_text
, struct cris_instruction
*out_insnp
,
1508 struct cris_prefix
*prefixp
)
1511 char modified_char
= 0;
1513 struct cris_opcode
*instruction
;
1520 /* Reset these fields to a harmless state in case we need to return in
1522 prefixp
->kind
= PREFIX_NONE
;
1523 prefixp
->reloc
= BFD_RELOC_NONE
;
1524 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1525 out_insnp
->imm_oprnd_size
= 0;
1527 /* Find the end of the opcode mnemonic. We assume (true in 2.9.1)
1528 that the caller has translated the opcode to lower-case, up to the
1529 first non-letter. */
1530 for (operands
= insn_text
; ISLOWER (*operands
); ++operands
)
1533 /* Terminate the opcode after letters, but save the character there if
1534 it was of significance. */
1541 /* Put back the modified character later. */
1542 modified_char
= *operands
;
1546 /* Consume the character after the mnemonic
1547 and replace it with '\0'. */
1552 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1556 /* Find the instruction. */
1557 instruction
= (struct cris_opcode
*) str_hash_find (op_hash
, insn_text
);
1558 if (instruction
== NULL
)
1560 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1564 /* Put back the modified character. */
1565 switch (modified_char
)
1571 *--operands
= modified_char
;
1574 /* Try to match an opcode table slot. */
1575 for (s
= operands
;;)
1579 /* Initialize *prefixp, perhaps after being modified for a
1581 prefixp
->kind
= PREFIX_NONE
;
1582 prefixp
->reloc
= BFD_RELOC_NONE
;
1584 /* Initialize *out_insnp. */
1585 memset (out_insnp
, 0, sizeof (*out_insnp
));
1586 out_insnp
->opcode
= instruction
->match
;
1587 out_insnp
->reloc
= BFD_RELOC_NONE
;
1588 out_insnp
->insn_type
= CRIS_INSN_NORMAL
;
1589 out_insnp
->imm_oprnd_size
= 0;
1593 /* Build the opcode, checking as we go to make sure that the
1595 for (args
= instruction
->args
;; ++args
)
1600 /* If we've come to the end of arguments, we're done. */
1606 /* Non-matcher character for disassembly.
1614 /* These must match exactly. */
1620 /* "ACR", case-insensitive.
1621 Handle a sometimes-mandatory dollar sign as register
1623 if (*s
== REGISTER_PREFIX_CHAR
)
1625 else if (demand_register_prefix
)
1628 if ((*s
++ != 'a' && s
[-1] != 'A')
1629 || (*s
++ != 'c' && s
[-1] != 'C')
1630 || (*s
++ != 'r' && s
[-1] != 'R'))
1635 /* This is not really an operand, but causes a "BDAP
1636 -size,SP" prefix to be output, for PUSH instructions. */
1637 prefixp
->kind
= PREFIX_PUSH
;
1641 /* This letter marks an operand that should not be matched
1642 in the assembler. It is a branch with 16-bit
1643 displacement. The assembler will create them from the
1644 8-bit flavor when necessary. The assembler does not
1645 support the [rN+] operand, as the [r15+] that is
1646 generated for 16-bit displacements. */
1650 /* A 5-bit unsigned immediate in bits <4:0>. */
1651 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1655 if (out_insnp
->expr
.X_op
== O_constant
1656 && (out_insnp
->expr
.X_add_number
< 0
1657 || out_insnp
->expr
.X_add_number
> 31))
1658 cris_bad (_("Immediate value not in 5 bit unsigned range: %ld"),
1659 &out_insnp
->expr
.X_add_number
);
1661 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_5
;
1666 /* A 4-bit unsigned immediate in bits <3:0>. */
1667 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1671 if (out_insnp
->expr
.X_op
== O_constant
1672 && (out_insnp
->expr
.X_add_number
< 0
1673 || out_insnp
->expr
.X_add_number
> 15))
1674 cris_bad (_("Immediate value not in 4 bit unsigned range: %ld"),
1675 &out_insnp
->expr
.X_add_number
);
1677 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_4
;
1681 /* For 'd', check for an optional ".d" or ".D" at the
1682 start of the operands, followed by a space character. */
1684 if (modified_char
== '.' && *s
== '.')
1686 if ((s
[1] != 'd' && s
[1] == 'D')
1687 || ! ISSPACE (s
[2]))
1695 /* General register in bits <15:12> and <3:0>. */
1696 if (! get_gen_reg (&s
, ®no
))
1700 out_insnp
->opcode
|= regno
/* << 0 */;
1701 out_insnp
->opcode
|= regno
<< 12;
1706 /* Flags from the condition code register. */
1710 if (! get_flags (&s
, &flags
))
1713 out_insnp
->opcode
|= ((flags
& 0xf0) << 8) | (flags
& 0xf);
1718 /* A 6-bit signed immediate in bits <5:0>. */
1719 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1723 if (out_insnp
->expr
.X_op
== O_constant
1724 && (out_insnp
->expr
.X_add_number
< -32
1725 || out_insnp
->expr
.X_add_number
> 31))
1726 cris_bad (_("Immediate value not in 6 bit range: %ld"),
1727 &out_insnp
->expr
.X_add_number
);
1729 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_6
;
1734 /* A 6-bit unsigned immediate in bits <5:0>. */
1735 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1739 if (out_insnp
->expr
.X_op
== O_constant
1740 && (out_insnp
->expr
.X_add_number
< 0
1741 || out_insnp
->expr
.X_add_number
> 63))
1742 cris_bad (_("Immediate value not in 6 bit unsigned range: %ld"),
1743 &out_insnp
->expr
.X_add_number
);
1745 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_6
;
1750 /* A size modifier, B, W or D, to be put in a bit position
1751 suitable for CLEAR instructions (i.e. reflecting a zero
1753 if (! get_bwd_size_modifier (&s
, &size_bits
))
1760 out_insnp
->opcode
|= 0 << 12;
1764 out_insnp
->opcode
|= 4 << 12;
1768 out_insnp
->opcode
|= 8 << 12;
1775 /* A size modifier, B, W or D, to be put in bits <5:4>. */
1776 if (modified_char
!= '.'
1777 || ! get_bwd_size_modifier (&s
, &size_bits
))
1781 out_insnp
->opcode
|= size_bits
<< 4;
1786 /* A branch expression. */
1787 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1791 out_insnp
->insn_type
= CRIS_INSN_BRANCH
;
1796 /* A 8-bit quick BDAP expression, "expr,R". */
1797 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1805 if (!get_gen_reg (&s
, ®no
))
1808 out_insnp
->opcode
|= regno
<< 12;
1809 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_8
;
1813 /* A BDAP expression for any size, "expr,R". */
1814 if (! cris_get_expression (&s
, &prefixp
->expr
))
1823 if (!get_gen_reg (&s
, &prefixp
->base_reg_number
))
1826 /* Since 'O' is used with an explicit bdap, we have no
1827 "real" instruction. */
1828 prefixp
->kind
= PREFIX_BDAP_IMM
;
1830 = BDAP_QUICK_OPCODE
| (prefixp
->base_reg_number
<< 12);
1832 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1837 /* Special register in bits <15:12>. */
1838 if (! get_spec_reg (&s
, &out_insnp
->spec_reg
))
1842 /* Use of some special register names come with a
1843 specific warning. Note that we have no ".cpu type"
1844 pseudo yet, so some of this is just unused
1846 if (out_insnp
->spec_reg
->warning
)
1847 as_warn ("%s", out_insnp
->spec_reg
->warning
);
1848 else if (out_insnp
->spec_reg
->applicable_version
1849 == cris_ver_warning
)
1850 /* Others have a generic warning. */
1851 as_warn (_("Unimplemented register `%s' specified"),
1852 out_insnp
->spec_reg
->name
);
1855 |= out_insnp
->spec_reg
->number
<< 12;
1860 /* This character is used in the disassembler to
1861 recognize a prefix instruction to fold into the
1862 addressing mode for the next instruction. It is
1867 /* General register in bits <15:12>. */
1868 if (! get_gen_reg (&s
, ®no
))
1872 out_insnp
->opcode
|= regno
<< 12;
1877 /* General register in bits <3:0>. */
1878 if (! get_gen_reg (&s
, ®no
))
1882 out_insnp
->opcode
|= regno
/* << 0 */;
1887 /* Source operand in bit <10> and a prefix; a 3-operand
1889 if (! get_3op_or_dip_prefix_op (&s
, prefixp
))
1895 /* Source operand in bits <10>, <3:0> and optionally a
1896 prefix; i.e. an indirect operand or an side-effect
1897 prefix (where valid). */
1898 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
, &mode
,
1905 if (prefixp
->kind
!= PREFIX_NONE
)
1907 /* A prefix, so it has the autoincrement bit
1909 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
1913 /* No prefix. The "mode" variable contains bits like
1914 whether or not this is autoincrement mode. */
1915 out_insnp
->opcode
|= (mode
<< 10);
1917 /* If there was a reloc specifier, then it was
1918 attached to the prefix. Note that we can't check
1919 that the reloc size matches, since we don't have
1920 all the operands yet in all cases. */
1921 if (prefixp
->reloc
!= BFD_RELOC_NONE
)
1922 out_insnp
->reloc
= prefixp
->reloc
;
1925 out_insnp
->opcode
|= regno
/* << 0 */ ;
1931 /* Like 's', but immediate operand only. Also do not
1932 modify insn. There are no insns where an explicit reloc
1933 specifier makes sense. */
1934 if (cris_get_expression (&s
, &out_insnp
->expr
))
1942 /* Like 'N', but PC-relative to the start of the insn.
1943 There might be a :PLT to request a PLT entry. */
1944 if (cris_get_expression (&s
, &out_insnp
->expr
))
1947 out_insnp
->reloc
= BFD_RELOC_32_PCREL
;
1949 /* We have to adjust the expression, because that
1950 relocation is to the location *after* the
1951 relocation. So add 2 for the insn and 4 for the
1953 out_insnp
->expr
.X_add_number
+= 6;
1955 /* TLS specifiers do not make sense here. */
1956 if (pic
&& *s
== RELOC_SUFFIX_CHAR
)
1957 cris_get_reloc_suffix (&s
, &out_insnp
->reloc
,
1965 /* Maybe 'u', maybe 'n'. Only for LAPC/LAPCQ. */
1966 if (cris_get_expression (&s
, &out_insnp
->expr
))
1968 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1970 /* Define 1 as relaxing. */
1971 out_insnp
->expr
.X_md
= 1;
1977 /* Four PC-relative bits in <3:0> representing <4:1>:0 of
1978 an offset relative to the beginning of the current
1980 if (cris_get_expression (&s
, &out_insnp
->expr
))
1982 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1984 /* Define 0 as non-relaxing. */
1985 out_insnp
->expr
.X_md
= 0;
1987 /* We have to adjust the expression, because that
1988 relocation is to the location *after* the
1989 insn. So add 2 for the insn. */
1990 out_insnp
->expr
.X_add_number
+= 2;
1996 /* Rs.m in bits <15:12> and <5:4>. */
1997 if (! get_gen_reg (&s
, ®no
)
1998 || ! get_bwd_size_modifier (&s
, &size_bits
))
2002 out_insnp
->opcode
|= (regno
<< 12) | (size_bits
<< 4);
2007 /* Source operand in bits <10>, <3:0> and optionally a
2008 prefix; i.e. an indirect operand or an side-effect
2011 The difference to 's' is that this does not allow an
2012 "immediate" expression. */
2013 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
,
2021 if (prefixp
->kind
!= PREFIX_NONE
)
2023 /* A prefix, and those matched here always have
2024 side-effects (see 's' case). */
2025 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
2029 /* No prefix. The "mode" variable contains bits
2030 like whether or not this is autoincrement
2032 out_insnp
->opcode
|= (mode
<< 10);
2035 out_insnp
->opcode
|= regno
/* << 0 */;
2040 /* Size modifier (B or W) in bit <4>. */
2041 if (! get_bw_size_modifier (&s
, &size_bits
))
2045 out_insnp
->opcode
|= size_bits
<< 4;
2050 if (cris_arch
== arch_crisv32
2051 && get_sup_reg (&s
, ®no
))
2053 out_insnp
->opcode
|= regno
<< 12;
2062 /* We get here when we fail a match above or we found a
2063 complete match. Break out of this loop. */
2067 /* Was it a match or a miss? */
2070 /* If it's just that the args don't match, maybe the next
2071 item in the table is the same opcode but with
2072 matching operands. First skip any invalid ones. */
2073 while (instruction
[1].name
!= NULL
2074 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2075 && ! cris_insn_ver_valid_for_arch (instruction
[1]
2076 .applicable_version
,
2080 if (instruction
[1].name
!= NULL
2081 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2082 && cris_insn_ver_valid_for_arch (instruction
[1]
2083 .applicable_version
,
2086 /* Yep. Restart and try that one instead. */
2093 /* We've come to the end of instructions with this
2094 opcode, so it must be an error. */
2095 as_bad (_("Illegal operands"));
2097 /* As discard_rest_of_line, but without continuing to the
2099 while (!is_end_of_line
[(unsigned char) *input_line_pointer
])
2100 input_line_pointer
++;
2106 /* We have a match. Check if there's anything more to do. */
2109 /* There was an immediate mode operand, so we must check
2110 that it has an appropriate size. */
2111 switch (instruction
->imm_oprnd_size
)
2115 /* Shouldn't happen; this one does not have immediate
2116 operands with different sizes. */
2117 BAD_CASE (instruction
->imm_oprnd_size
);
2121 out_insnp
->imm_oprnd_size
= 4;
2125 if (cris_arch
== arch_crisv32
)
2126 /* All immediate loads of special registers are
2127 32-bit on CRISv32. */
2128 out_insnp
->imm_oprnd_size
= 4;
2130 switch (out_insnp
->spec_reg
->reg_size
)
2133 if (out_insnp
->expr
.X_op
== O_constant
2134 && (out_insnp
->expr
.X_add_number
< -128
2135 || out_insnp
->expr
.X_add_number
> 255))
2136 cris_bad (_("Immediate value not in 8 bit range: %ld"),
2137 &out_insnp
->expr
.X_add_number
);
2140 /* FIXME: We need an indicator in the instruction
2141 table to pass on, to indicate if we need to check
2142 overflow for a signed or unsigned number. */
2143 if (out_insnp
->expr
.X_op
== O_constant
2144 && (out_insnp
->expr
.X_add_number
< -32768
2145 || out_insnp
->expr
.X_add_number
> 65535))
2146 cris_bad (_("Immediate value not in 16 bit range: %ld"),
2147 &out_insnp
->expr
.X_add_number
);
2148 out_insnp
->imm_oprnd_size
= 2;
2152 out_insnp
->imm_oprnd_size
= 4;
2156 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2161 case SIZE_FIELD_SIGNED
:
2162 case SIZE_FIELD_UNSIGNED
:
2165 /* FIXME: Find way to pass un/signedness to
2166 caller, and set reloc type instead, postponing
2167 this check until cris_number_to_imm. That
2168 necessarily corrects the reloc type for the
2169 byte case, maybe requiring further changes. */
2171 if (out_insnp
->expr
.X_op
== O_constant
)
2173 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2174 && (out_insnp
->expr
.X_add_number
< -128
2175 || out_insnp
->expr
.X_add_number
> 255))
2176 cris_bad (_("Immediate value not in 8 bit range: %ld"),
2177 &out_insnp
->expr
.X_add_number
);
2178 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2179 && (out_insnp
->expr
.X_add_number
< -128
2180 || out_insnp
->expr
.X_add_number
> 127))
2181 cris_bad (_("Immediate value not in 8 bit signed range: %ld"),
2182 &out_insnp
->expr
.X_add_number
);
2183 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2184 && (out_insnp
->expr
.X_add_number
< 0
2185 || out_insnp
->expr
.X_add_number
> 255))
2186 cris_bad (_("Immediate value not in 8 bit unsigned range: %ld"),
2187 &out_insnp
->expr
.X_add_number
);
2192 if (out_insnp
->expr
.X_op
== O_constant
)
2194 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2195 && (out_insnp
->expr
.X_add_number
< -32768
2196 || out_insnp
->expr
.X_add_number
> 65535))
2197 cris_bad (_("Immediate value not in 16 bit range: %ld"),
2198 &out_insnp
->expr
.X_add_number
);
2199 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2200 && (out_insnp
->expr
.X_add_number
< -32768
2201 || out_insnp
->expr
.X_add_number
> 32767))
2202 cris_bad (_("Immediate value not in 16 bit signed range: %ld"),
2203 &out_insnp
->expr
.X_add_number
);
2204 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2205 && (out_insnp
->expr
.X_add_number
< 0
2206 || out_insnp
->expr
.X_add_number
> 65535))
2207 cris_bad (_("Immediate value not in 16 bit unsigned range: %ld"),
2208 &out_insnp
->expr
.X_add_number
);
2210 out_insnp
->imm_oprnd_size
= 2;
2214 out_insnp
->imm_oprnd_size
= 4;
2218 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2222 /* If there was a relocation specified for the immediate
2223 expression (i.e. it had a PIC or TLS modifier) check that the
2224 size of the relocation matches the size specified by
2226 if (out_insnp
->reloc
!= BFD_RELOC_NONE
2227 && (cris_get_specified_reloc_size (out_insnp
->reloc
)
2228 != (unsigned int) out_insnp
->imm_oprnd_size
))
2229 as_bad (out_insnp
->reloc
== BFD_RELOC_CRIS_32_GD
2230 || out_insnp
->reloc
== BFD_RELOC_CRIS_32_TPREL
2231 || out_insnp
->reloc
== BFD_RELOC_CRIS_16_TPREL
2232 || out_insnp
->reloc
== BFD_RELOC_CRIS_32_IE
2233 ? _("TLS relocation size does not match operand size")
2234 : _("PIC relocation size does not match operand size"));
2236 else if (instruction
->op
== cris_muls_op
2237 || instruction
->op
== cris_mulu_op
)
2238 out_insnp
->insn_type
= CRIS_INSN_MUL
;
2244 /* Get a B, W, or D size modifier from the string pointed out by *cPP,
2245 which must point to a '.' in front of the modifier. On successful
2246 return, *cPP is advanced to the character following the size
2247 modifier, and is undefined otherwise.
2249 cPP Pointer to pointer to string starting
2250 with the size modifier.
2252 size_bitsp Pointer to variable to contain the size bits on
2255 Return 1 iff a correct size modifier is found, else 0. */
2258 get_bwd_size_modifier (char **cPP
, int *size_bitsp
)
2264 /* Consume the '.'. */
2288 /* Consume the size letter. */
2294 /* Get a B or W size modifier from the string pointed out by *cPP,
2295 which must point to a '.' in front of the modifier. On successful
2296 return, *cPP is advanced to the character following the size
2297 modifier, and is undefined otherwise.
2299 cPP Pointer to pointer to string starting
2300 with the size modifier.
2302 size_bitsp Pointer to variable to contain the size bits on
2305 Return 1 iff a correct size modifier is found, else 0. */
2308 get_bw_size_modifier (char **cPP
, int *size_bitsp
)
2314 /* Consume the '.'. */
2333 /* Consume the size letter. */
2339 /* Get a general register from the string pointed out by *cPP. The
2340 variable *cPP is advanced to the character following the general
2341 register name on a successful return, and has its initial position
2344 cPP Pointer to pointer to string, beginning with a general
2347 regnop Pointer to int containing the register number.
2349 Return 1 iff a correct general register designator is found,
2353 get_gen_reg (char **cPP
, int *regnop
)
2358 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2359 if (**cPP
== REGISTER_PREFIX_CHAR
)
2361 else if (demand_register_prefix
)
2368 /* "P" as in "PC"? Consume the "P". */
2371 if ((**cPP
== 'C' || **cPP
== 'c')
2372 && ! ISALNUM ((*cPP
)[1])
2373 /* Here's a little twist: For v32 and the compatibility mode,
2374 we only recognize PC as a register number if there's '+]'
2375 after. We don't consume that, but the presence can only be
2376 valid after a register in a post-increment context, which
2377 is also the only valid context for PC as a register for
2378 v32. Not that it's used very often, but saying "MOVE.D
2379 [PC+],R5" should remain valid. It's not supported for
2380 jump-type insns or other insns with no [Rn+] mode, though. */
2381 && ((cris_arch
!= arch_crisv32
2382 && cris_arch
!= arch_cris_common_v10_v32
)
2383 || ((*cPP
)[1] == '+' && (*cPP
)[2] == ']')))
2385 /* It's "PC": consume the "c" and we're done. */
2392 /* Like with PC, we recognize ACR, but only if it's *not* followed
2393 by '+', and only for v32. */
2396 if (cris_arch
!= arch_crisv32
2397 || ((*cPP
)[1] != 'c' && (*cPP
)[1] != 'C')
2398 || ((*cPP
)[2] != 'r' && (*cPP
)[2] != 'R')
2399 || ISALNUM ((*cPP
)[3])
2400 || (*cPP
)[3] == '+')
2408 /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */
2411 if (ISDIGIT (**cPP
))
2413 /* It's r[0-9]. Consume and check the next digit. */
2414 *regnop
= **cPP
- '0';
2417 if (! ISALNUM (**cPP
))
2419 /* No more digits, we're done. */
2424 /* One more digit. Consume and add. */
2425 *regnop
= *regnop
* 10 + (**cPP
- '0');
2427 /* We need to check for a valid register number; Rn,
2428 0 <= n <= MAX_REG. */
2429 if (*regnop
<= MAX_REG
)
2431 /* Consume second digit. */
2441 /* "S" as in "SP"? Consume the "S". */
2443 if (**cPP
== 'P' || **cPP
== 'p')
2445 /* It's "SP": consume the "p" and we're done. */
2453 /* Just here to silence compilation warnings. */
2457 /* We get here if we fail. Restore the pointer. */
2462 /* Get a special register from the string pointed out by *cPP. The
2463 variable *cPP is advanced to the character following the special
2464 register name if one is found, and retains its original position
2467 cPP Pointer to pointer to string starting with a special register
2470 sregpp Pointer to Pointer to struct spec_reg, where a pointer to the
2471 register description will be stored.
2473 Return 1 iff a correct special register name is found. */
2476 get_spec_reg (char **cPP
, const struct cris_spec_reg
**sregpp
)
2480 char *name_begin
= *cPP
;
2482 const struct cris_spec_reg
*sregp
;
2484 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2485 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2487 else if (demand_register_prefix
)
2490 /* Loop over all special registers. */
2491 for (sregp
= cris_spec_regs
; sregp
->name
!= NULL
; sregp
++)
2493 /* Start over from beginning of the supposed name. */
2497 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2503 /* For a match, we must have consumed the name in the table, and we
2504 must be outside what could be part of a name. Assume here that a
2505 test for alphanumerics is sufficient for a name test. */
2506 if (*s2
== 0 && ! ISALNUM (*s1
)
2507 && cris_insn_ver_valid_for_arch (sregp
->applicable_version
,
2510 /* We have a match. Update the pointer and be done. */
2517 /* If we got here, we did not find any name. */
2521 /* Get a support register from the string pointed out by *cPP. The
2522 variable *cPP is advanced to the character following the support-
2523 register name if one is found, and retains its original position
2526 cPP Pointer to pointer to string starting with a support-register
2529 sregpp Pointer to int containing the register number.
2531 Return 1 iff a correct support-register name is found. */
2534 get_sup_reg (char **cPP
, int *regnop
)
2538 char *name_begin
= *cPP
;
2540 const struct cris_support_reg
*sregp
;
2542 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2543 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2545 else if (demand_register_prefix
)
2548 /* Loop over all support-registers. */
2549 for (sregp
= cris_support_regs
; sregp
->name
!= NULL
; sregp
++)
2551 /* Start over from beginning of the supposed name. */
2555 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2561 /* For a match, we must have consumed the name in the table, and we
2562 must be outside what could be part of a name. Assume here that a
2563 test for alphanumerics is sufficient for a name test. */
2564 if (*s2
== 0 && ! ISALNUM (*s1
))
2566 /* We have a match. Update the pointer and be done. */
2568 *regnop
= sregp
->number
;
2573 /* If we got here, we did not find any name. */
2577 /* Get an unprefixed or side-effect-prefix operand from the string pointed
2578 out by *cPP. The pointer *cPP is advanced to the character following
2579 the indirect operand if we have success, else it contains an undefined
2582 cPP Pointer to pointer to string beginning with the first
2583 character of the supposed operand.
2585 prefixp Pointer to structure containing an optional instruction
2588 is_autoincp Pointer to int indicating the indirect or autoincrement
2591 src_regnop Pointer to int containing the source register number in
2594 imm_foundp Pointer to an int indicating if an immediate expression
2597 imm_exprP Pointer to a structure containing an immediate
2598 expression, if success and if *imm_foundp is nonzero.
2600 Return 1 iff a correct indirect operand is found. */
2603 get_autoinc_prefix_or_indir_op (char **cPP
, struct cris_prefix
*prefixp
,
2604 int *is_autoincp
, int *src_regnop
,
2605 int *imm_foundp
, expressionS
*imm_exprP
)
2607 /* Assume there was no immediate mode expression. */
2612 /* So this operand is one of:
2614 Autoincrement: [rN+]
2615 Indexed with assign: [rN=rM+rO.S]
2616 Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s]
2618 Either way, consume the '['. */
2621 /* Get the rN register. */
2622 if (! get_gen_reg (cPP
, src_regnop
))
2623 /* If there was no register, then this cannot match. */
2627 /* We got the register, now check the next character. */
2631 /* Indirect mode. We're done here. */
2632 prefixp
->kind
= PREFIX_NONE
;
2637 /* This must be an auto-increment mode, if there's a
2639 prefixp
->kind
= PREFIX_NONE
;
2642 /* We consume this character and break out to check the
2648 /* This must be indexed with assign, or offset with assign
2649 to match. Not supported for crisv32 or in
2650 compatibility mode. */
2651 if (cris_arch
== arch_crisv32
2652 || cris_arch
== arch_cris_common_v10_v32
)
2657 /* Either way, the next thing must be a register. */
2658 if (! get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2659 /* No register, no match. */
2663 /* We've consumed "[rN=rM", so we must be looking at
2664 "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or
2668 int index_reg_number
;
2674 /* This must be [rx=ry+[rz].s] or
2675 [rx=ry+[rz+].s] or no match. We must be
2676 looking at rz after consuming the '['. */
2679 if (!get_gen_reg (cPP
, &index_reg_number
))
2682 prefixp
->kind
= PREFIX_BDAP
;
2684 = (BDAP_INDIR_OPCODE
2685 + (prefixp
->base_reg_number
<< 12)
2686 + index_reg_number
);
2690 /* We've seen "[rx=ry+[rz+" here, so now we
2691 know that there must be "].s]" left to
2694 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2697 /* If it wasn't autoincrement, we don't need to
2700 /* Check the next-to-last ']'. */
2706 /* Check the ".s" modifier. */
2707 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2710 prefixp
->opcode
|= size_bits
<< 4;
2712 /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s.
2713 We break out to check the final ']'. */
2716 /* It wasn't an indirection. Check if it's a
2718 else if (get_gen_reg (cPP
, &index_reg_number
))
2722 /* Indexed with assign mode: "[rN+rM.S]". */
2723 prefixp
->kind
= PREFIX_BIAP
;
2725 = (BIAP_OPCODE
+ (index_reg_number
<< 12)
2726 + prefixp
->base_reg_number
/* << 0 */);
2728 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2729 /* Size missing, this isn't a match. */
2733 /* Size found, break out to check the
2735 prefixp
->opcode
|= size_bits
<< 4;
2739 /* Not a register. Then this must be "[rN+I]". */
2740 else if (cris_get_expression (cPP
, &prefixp
->expr
))
2742 /* We've got offset with assign mode. Fill
2743 in the blanks and break out to match the
2745 prefixp
->kind
= PREFIX_BDAP_IMM
;
2747 /* We tentatively put an opcode corresponding to
2748 a 32-bit operand here, although it may be
2749 relaxed when there's no relocation
2750 specifier for the operand. */
2752 = (BDAP_INDIR_OPCODE
2753 | (prefixp
->base_reg_number
<< 12)
2754 | (AUTOINCR_BIT
<< 8)
2756 | REG_PC
/* << 0 */);
2758 /* This can have a PIC suffix, specifying reloc
2760 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2762 unsigned int relocsize
;
2764 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
,
2767 /* Tweak the size of the immediate operand
2768 in the prefix opcode if it isn't what we
2771 = cris_get_specified_reloc_size (prefixp
->reloc
);
2774 = ((prefixp
->opcode
& ~(3 << 4))
2775 | ((relocsize
>> 1) << 4));
2780 /* Neither register nor expression found, so
2781 this can't be a match. */
2784 /* Not "[rN+" but perhaps "[rN-"? */
2785 else if (**cPP
== '-')
2787 /* We must have an offset with assign mode. */
2788 if (! cris_get_expression (cPP
, &prefixp
->expr
))
2789 /* No expression, no match. */
2793 /* We've got offset with assign mode. Fill
2794 in the blanks and break out to match the
2797 Note that we don't allow a relocation
2798 suffix for an operand with a minus
2800 prefixp
->kind
= PREFIX_BDAP_IMM
;
2805 /* Neither '+' nor '-' after "[rN=rM". Lose. */
2809 /* Neither ']' nor '+' nor '=' after "[rN". Lose. */
2814 /* When we get here, we have a match and will just check the closing
2815 ']'. We can still fail though. */
2820 /* Don't forget to consume the final ']'.
2821 Then return in glory. */
2826 /* No indirection. Perhaps a constant? */
2827 else if (cris_get_expression (cPP
, imm_exprP
))
2829 /* Expression found, this is immediate mode. */
2830 prefixp
->kind
= PREFIX_NONE
;
2832 *src_regnop
= REG_PC
;
2835 /* This can have a PIC suffix, specifying reloc type to use. The
2836 caller must check that the reloc size matches the operand size. */
2837 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2838 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, imm_exprP
);
2843 /* No luck today. */
2847 /* This function gets an indirect operand in a three-address operand
2848 combination from the string pointed out by *cPP. The pointer *cPP is
2849 advanced to the character following the indirect operand on success, or
2850 has an unspecified value on failure.
2852 cPP Pointer to pointer to string beginning
2855 prefixp Pointer to structure containing an
2858 Returns 1 iff a correct indirect operand is found. */
2861 get_3op_or_dip_prefix_op (char **cPP
, struct cris_prefix
*prefixp
)
2866 /* We must have a '[' or it's a clean failure. */
2869 /* Eat the first '['. */
2874 /* A second '[', so this must be double-indirect mode. */
2876 prefixp
->kind
= PREFIX_DIP
;
2877 prefixp
->opcode
= DIP_OPCODE
;
2879 /* Get the register or fail entirely. */
2880 if (! get_gen_reg (cPP
, ®_number
))
2884 prefixp
->opcode
|= reg_number
/* << 0 */ ;
2887 /* Since we found a '+', this must be double-indirect
2888 autoincrement mode. */
2890 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2893 /* There's nothing particular to do, if this was a
2894 double-indirect *without* autoincrement. */
2897 /* Check the first ']'. The second one is checked at the end. */
2901 /* Eat the first ']', so we'll be looking at a second ']'. */
2904 /* No second '['. Then we should have a register here, making
2906 else if (get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2908 /* This must be indexed or offset mode: "[rN+I]" or
2909 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */
2912 int index_reg_number
;
2918 /* This is "[rx+["... Expect a register next. */
2922 if (!get_gen_reg (cPP
, &index_reg_number
))
2925 prefixp
->kind
= PREFIX_BDAP
;
2927 = (BDAP_INDIR_OPCODE
2928 + (prefixp
->base_reg_number
<< 12)
2929 + index_reg_number
);
2931 /* We've seen "[rx+[ry", so check if this is
2935 /* Yep, now at "[rx+[ry+". */
2937 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2939 /* If it wasn't autoincrement, we don't need to
2942 /* Check a first closing ']': "[rx+[ry]" or
2948 /* Now expect a size modifier ".S". */
2949 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2952 prefixp
->opcode
|= size_bits
<< 4;
2954 /* Ok, all interesting stuff has been seen:
2955 "[rx+[ry+].S" or "[rx+[ry].S". We only need to
2956 expect a final ']', which we'll do in a common
2959 /* Seen "[rN+", but not a '[', so check if we have a
2961 else if (get_gen_reg (cPP
, &index_reg_number
))
2963 /* This is indexed mode: "[rN+rM.S]" or
2966 prefixp
->kind
= PREFIX_BIAP
;
2969 | prefixp
->base_reg_number
/* << 0 */
2970 | (index_reg_number
<< 12));
2972 /* Consume the ".S". */
2973 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2974 /* Missing size, so fail. */
2977 /* Size found. Add that piece and drop down to
2978 the common checking of the closing ']'. */
2979 prefixp
->opcode
|= size_bits
<< 4;
2981 /* Seen "[rN+", but not a '[' or a register, so then
2982 it must be a constant "I".
2984 As a quality of implementation improvement, we check for a
2985 closing ']', like in an erroneous "[rN+]". If we don't,
2986 the expression parser will emit a confusing "bad
2987 expression" when it sees the ']', probably because it
2988 doesn't like seeing no expression. */
2989 else if (**cPP
!= ']' && cris_get_expression (cPP
, &prefixp
->expr
))
2991 /* Expression found, so fill in the bits of offset
2992 mode and drop down to check the closing ']'. */
2993 prefixp
->kind
= PREFIX_BDAP_IMM
;
2995 /* We tentatively put an opcode corresponding to a 32-bit
2996 operand here, although it may be relaxed when there's no
2997 PIC specifier for the operand. */
2999 = (BDAP_INDIR_OPCODE
3000 | (prefixp
->base_reg_number
<< 12)
3001 | (AUTOINCR_BIT
<< 8)
3003 | REG_PC
/* << 0 */);
3005 /* This can have a PIC suffix, specifying reloc type to use. */
3006 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
3008 unsigned int relocsize
;
3010 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, &prefixp
->expr
);
3012 /* Tweak the size of the immediate operand in the prefix
3013 opcode if it isn't what we set. */
3014 relocsize
= cris_get_specified_reloc_size (prefixp
->reloc
);
3017 = ((prefixp
->opcode
& ~(3 << 4))
3018 | ((relocsize
>> 1) << 4));
3022 /* Nothing valid here: lose. */
3025 /* Seen "[rN" but no '+', so check if it's a '-'. */
3026 else if (**cPP
== '-')
3028 /* Yep, we must have offset mode. */
3029 if (! cris_get_expression (cPP
, &prefixp
->expr
))
3030 /* No expression, so we lose. */
3034 /* Expression found to make this offset mode, so
3035 fill those bits and drop down to check the
3038 Note that we don't allow a PIC suffix for
3039 an operand with a minus sign like this. */
3040 prefixp
->kind
= PREFIX_BDAP_IMM
;
3045 /* We've seen "[rN", but not '+' or '-'; rather a ']'.
3046 Hmm. Normally this is a simple indirect mode that we
3047 shouldn't match, but if we expect ']', then we have a
3048 zero offset, so it can be a three-address-operand,
3049 like "[rN],rO,rP", thus offset mode.
3051 Don't eat the ']', that will be done in the closing
3053 prefixp
->expr
.X_op
= O_constant
;
3054 prefixp
->expr
.X_add_number
= 0;
3055 prefixp
->expr
.X_add_symbol
= NULL
;
3056 prefixp
->expr
.X_op_symbol
= NULL
;
3057 prefixp
->kind
= PREFIX_BDAP_IMM
;
3060 /* A '[', but no second '[', and no register. Check if we
3061 have an expression, making this "[I]" for a double-indirect
3063 else if (cris_get_expression (cPP
, &prefixp
->expr
))
3065 /* Expression found, the so called absolute mode for a
3066 double-indirect prefix on PC. */
3067 prefixp
->kind
= PREFIX_DIP
;
3068 prefixp
->opcode
= DIP_OPCODE
| (AUTOINCR_BIT
<< 8) | REG_PC
;
3069 prefixp
->reloc
= BFD_RELOC_32
;
3071 /* For :GD and :IE, it makes sense to have TLS specifiers here. */
3072 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
3073 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, &prefixp
->expr
);
3076 /* Neither '[' nor register nor expression. We lose. */
3079 /* We get here as a closing ceremony to a successful match. We just
3080 need to check the closing ']'. */
3082 /* Oops. Close but no air-polluter. */
3085 /* Don't forget to consume that ']', before returning in glory. */
3090 /* Get an expression from the string pointed out by *cPP.
3091 The pointer *cPP is advanced to the character following the expression
3092 on a success, or retains its original value otherwise.
3094 cPP Pointer to pointer to string beginning with the expression.
3096 exprP Pointer to structure containing the expression.
3098 Return 1 iff a correct expression is found. */
3101 cris_get_expression (char **cPP
, expressionS
*exprP
)
3103 char *saved_input_line_pointer
;
3105 /* The "expression" function expects to find an expression at the
3106 global variable input_line_pointer, so we have to save it to give
3107 the impression that we don't fiddle with global variables. */
3108 saved_input_line_pointer
= input_line_pointer
;
3109 input_line_pointer
= *cPP
;
3111 /* Avoid a common error, confusing addressing modes. Beware that the
3112 call to expression below does not signal that error; it treats []
3113 as parentheses, unless #define NEED_INDEX_OPERATOR in which case it
3114 gives them other confusing semantics rather than plain outlawing
3115 them, which is what we want. */
3116 if (*input_line_pointer
== '[')
3118 input_line_pointer
= saved_input_line_pointer
;
3123 if (exprP
->X_op
== O_illegal
|| exprP
->X_op
== O_absent
)
3125 input_line_pointer
= saved_input_line_pointer
;
3129 /* Everything seems to be fine, just restore the global
3130 input_line_pointer and say we're successful. */
3131 *cPP
= input_line_pointer
;
3132 input_line_pointer
= saved_input_line_pointer
;
3136 /* Get a sequence of flag characters from *spp. The pointer *cPP is
3137 advanced to the character following the expression. The flag
3138 characters are consecutive, no commas or spaces.
3140 cPP Pointer to pointer to string beginning with the expression.
3142 flagp Pointer to int to return the flags expression.
3144 Return 1 iff a correct flags expression is found. */
3147 get_flags (char **cPP
, int *flagsp
)
3155 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3163 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3171 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3179 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3187 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3195 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3232 /* We consider this successful if we stop at a comma or
3233 whitespace. Anything else, and we consider it a failure. */
3236 && ! ISSPACE (**cPP
))
3242 /* Don't forget to consume each flag character. */
3247 /* Generate code and fixes for a BDAP prefix.
3248 For v32, this handles ADDOQ because thankfully the opcodes are the
3251 base_regno Int containing the base register number.
3253 exprP Pointer to structure containing the offset expression. */
3256 gen_bdap (int base_regno
, expressionS
*exprP
)
3258 unsigned int opcode
;
3261 /* Put out the prefix opcode; assume quick immediate mode at first. */
3262 opcode
= BDAP_QUICK_OPCODE
| (base_regno
<< 12);
3263 opcodep
= cris_insn_first_word_frag ();
3264 md_number_to_chars (opcodep
, opcode
, 2);
3266 if (exprP
->X_op
== O_constant
)
3268 /* We have an absolute expression that we know the size of right
3273 value
= exprP
->X_add_number
;
3274 if (value
< -32768 || value
> 32767)
3275 /* Outside range for a "word", make it a dword. */
3278 /* Assume "word" size. */
3281 /* If this is a signed-byte value, we can fit it into the prefix
3283 if (value
>= -128 && value
<= 127)
3287 /* This is a word or dword displacement, which will be put in a
3288 word or dword after the prefix. */
3291 opcodep
[0] = BDAP_PC_LOW
+ (size
<< 4);
3293 opcodep
[1] |= BDAP_INCR_HIGH
;
3294 p
= frag_more (1 << size
);
3295 md_number_to_chars (p
, value
, 1 << size
);
3300 /* Handle complex expressions. */
3302 = SIMPLE_EXPR (exprP
) ? exprP
->X_add_number
: 0;
3304 = (SIMPLE_EXPR (exprP
)
3305 ? exprP
->X_add_symbol
: make_expr_symbol (exprP
));
3307 /* The expression is not defined yet but may become absolute. We
3308 make it a relocation to be relaxed. */
3309 frag_var (rs_machine_dependent
, 4, 0,
3310 ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
),
3311 sym
, addvalue
, opcodep
);
3315 /* Encode a branch displacement in the range -256..254 into the form used
3316 by CRIS conditional branch instructions.
3318 offset The displacement value in bytes. */
3321 branch_disp (int offset
)
3325 /* Adjust all short branch offsets here. */
3326 if (cris_arch
== arch_crisv32
|| cris_arch
== arch_cris_common_v10_v32
)
3329 disp
= offset
& 0xFE;
3337 /* Generate code and fixes for a 32-bit conditional branch instruction
3338 created by "extending" an existing 8-bit branch instruction.
3340 opcodep Pointer to the word containing the original 8-bit branch
3343 writep Pointer to "extension area" following the first instruction
3346 fragP Pointer to the frag containing the instruction.
3348 add_symP, Parts of the destination address expression.
3353 gen_cond_branch_32 (char *opcodep
, char *writep
, fragS
*fragP
,
3354 symbolS
*add_symP
, symbolS
*sub_symP
, long int add_num
)
3360 if (cris_arch
== arch_crisv32
)
3362 nop_opcode
= NOP_OPCODE_V32
;
3364 branch_offset
= -2 - 8;
3368 nop_opcode
= NOP_OPCODE
;
3370 branch_offset
= -2 - 8;
3374 nop_opcode
= NOP_OPCODE
;
3376 branch_offset
= -2 - 6;
3379 /* We should never get here for compatibility mode. */
3380 if (cris_arch
== arch_cris_common_v10_v32
)
3381 as_fatal (_("Calling gen_cond_branch_32 for .arch common_v10_v32\n"));
3383 if (warn_for_branch_expansion
)
3384 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3385 _("32-bit conditional branch generated"));
3387 /* Here, writep points to what will be opcodep + 2. First, we change
3388 the actual branch in opcodep[0] and opcodep[1], so that in the
3389 final insn, it will look like:
3392 This means we don't have to worry about changing the opcode or
3393 messing with the delay-slot instruction. So, we move it to last in
3394 the "extended" branch, and just change the displacement. Admittedly,
3395 it's not the optimal extended construct, but we should get this
3396 rarely enough that it shouldn't matter. */
3398 writep
[opc_offset
] = branch_disp (branch_offset
);
3399 writep
[opc_offset
+ 1] = opcodep
[1];
3401 /* Then, we change the branch to an unconditional branch over the
3402 extended part, to the new location of the Bcc:
3406 Note that these two writes are to currently different locations,
3409 md_number_to_chars (opcodep
, BA_QUICK_OPCODE
3410 + (cris_arch
== arch_crisv32
? 12 : (pic
? 10 : 8)),
3412 md_number_to_chars (writep
, nop_opcode
, 2);
3414 /* Then the extended thing, the 32-bit jump insn.
3415 opcodep+4: JUMP [PC+]
3416 or, in the PIC case,
3417 opcodep+4: MOVE [PC=PC+N],P0. */
3419 md_number_to_chars (writep
+ 2,
3420 cris_arch
== arch_crisv32
3422 : (pic
? MOVE_PC_INCR_OPCODE_PREFIX
3423 : JUMP_PC_INCR_OPCODE
), 2);
3425 /* We have to fill in the actual value too.
3427 This is most probably an expression, but we can cope with an absolute
3428 value too. FIXME: Testcase needed with and without pic. */
3430 if (add_symP
== NULL
&& sub_symP
== NULL
)
3432 /* An absolute address. */
3433 if (pic
|| cris_arch
== arch_crisv32
)
3434 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4,
3435 section_symbol (absolute_section
),
3437 + (cris_arch
== arch_crisv32
? 6 : 0),
3438 1, BFD_RELOC_32_PCREL
);
3440 md_number_to_chars (writep
+ 4, add_num
, 4);
3444 if (sub_symP
!= NULL
)
3445 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3446 _("Complex expression not supported"));
3448 /* Not absolute, we have to make it a frag for later evaluation. */
3449 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4, add_symP
,
3450 add_num
+ (cris_arch
== arch_crisv32
? 6 : 0),
3451 pic
|| cris_arch
== arch_crisv32
? 1 : 0,
3452 pic
|| cris_arch
== arch_crisv32
3453 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
3456 if (cris_arch
== arch_crisv32
)
3457 /* Follow it with a "NOP" for CRISv32. */
3458 md_number_to_chars (writep
+ 8, NOP_OPCODE_V32
, 2);
3460 /* ...and the rest of the move-opcode for pre-v32 PIC. */
3461 md_number_to_chars (writep
+ 8, MOVE_PC_INCR_OPCODE_SUFFIX
, 2);
3464 /* Get the size of an immediate-reloc in bytes. Only valid for
3465 specified relocs (TLS, PIC). */
3468 cris_get_specified_reloc_size (bfd_reloc_code_real_type reloc
)
3471 reloc
== BFD_RELOC_CRIS_16_GOTPLT
3472 || reloc
== BFD_RELOC_CRIS_16_GOT
3473 || reloc
== BFD_RELOC_CRIS_16_GOT_GD
3474 || reloc
== BFD_RELOC_CRIS_16_DTPREL
3475 || reloc
== BFD_RELOC_CRIS_16_GOT_TPREL
3476 || reloc
== BFD_RELOC_CRIS_16_TPREL
3480 /* Store a reloc type at *RELOCP corresponding to the PIC suffix at *CPP.
3481 Adjust *EXPRP with any addend found after the PIC suffix. */
3484 cris_get_reloc_suffix (char **cPP
, bfd_reloc_code_real_type
*relocp
,
3489 expressionS const_expr
;
3491 const struct pic_suffixes_struct
3493 const char *const suffix
;
3495 bfd_reloc_code_real_type reloc
;
3501 #define PICMAP(s, r) {s, sizeof (s) - 1, r, TRUE, FALSE}
3502 #define PICTLSMAP(s, r) {s, sizeof (s) - 1, r, TRUE, TRUE}
3503 #define TLSMAP(s, r) {s, sizeof (s) - 1, r, FALSE, TRUE}
3504 /* Keep this in order with longest unambiguous prefix first. */
3505 PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT
),
3506 PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT
),
3507 PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL
),
3508 PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL
),
3509 PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL
),
3510 PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT
),
3511 PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT
),
3512 PICTLSMAP ("GDGOTREL16", BFD_RELOC_CRIS_16_GOT_GD
),
3513 PICTLSMAP ("GDGOTREL", BFD_RELOC_CRIS_32_GOT_GD
),
3514 TLSMAP ("GD", BFD_RELOC_CRIS_32_GD
),
3515 PICTLSMAP ("DTPREL16", BFD_RELOC_CRIS_16_DTPREL
),
3516 PICTLSMAP ("DTPREL", BFD_RELOC_CRIS_32_DTPREL
),
3517 TLSMAP ("IE", BFD_RELOC_CRIS_32_IE
),
3518 PICTLSMAP ("TPOFFGOT16", BFD_RELOC_CRIS_16_GOT_TPREL
),
3519 PICTLSMAP ("TPOFFGOT", BFD_RELOC_CRIS_32_GOT_TPREL
),
3520 TLSMAP ("TPOFF16", BFD_RELOC_CRIS_16_TPREL
),
3521 TLSMAP ("TPOFF", BFD_RELOC_CRIS_32_TPREL
)
3524 /* We've already seen the ':', so consume it. */
3527 for (i
= 0; i
< sizeof (pic_suffixes
)/sizeof (pic_suffixes
[0]); i
++)
3529 if (strncmp (s
, pic_suffixes
[i
].suffix
, pic_suffixes
[i
].len
) == 0
3530 && ! is_part_of_name (s
[pic_suffixes
[i
].len
])
3531 /* PIC and non-PIC relocations are exclusive. */
3532 && (pic
!= 0) == (pic_suffixes
[i
].pic_p
!= 0)
3533 /* But TLS can be active for non-TLS relocations too. */
3534 && (pic_suffixes
[i
].tls_p
== 0 || tls
))
3536 /* We have a match. Consume the suffix and set the relocation
3538 s
+= pic_suffixes
[i
].len
;
3540 /* There can be a constant term appended. If so, we will add it
3542 if (*s
== '+' || *s
== '-')
3544 if (! cris_get_expression (&s
, &const_expr
))
3545 /* There was some kind of syntax error. Bail out. */
3548 /* Allow complex expressions as the constant part. It still
3549 has to be an assembly-time constant or there will be an
3550 error emitting the reloc. This makes the PIC qualifiers
3551 idempotent; foo:GOTOFF+32 == foo+32:GOTOFF. The former we
3552 recognize here; the latter is parsed in the incoming
3554 exprP
->X_add_symbol
= make_expr_symbol (exprP
);
3555 exprP
->X_op
= O_add
;
3556 exprP
->X_add_number
= 0;
3557 exprP
->X_op_symbol
= make_expr_symbol (&const_expr
);
3560 *relocp
= pic_suffixes
[i
].reloc
;
3566 /* No match. Don't consume anything; fall back and there will be a
3570 /* This *could* have been:
3572 Turn a string in input_line_pointer into a floating point constant
3573 of type TYPE, and store the appropriate bytes in *LITP. The number
3574 of LITTLENUMS emitted is stored in *SIZEP.
3576 type A character from FLTCHARS that describes what kind of
3577 floating-point number is wanted.
3579 litp A pointer to an array that the result should be stored in.
3581 sizep A pointer to an integer where the size of the result is stored.
3583 But we don't support floating point constants in assembly code *at all*,
3584 since it's suboptimal and just opens up bug opportunities. GCC emits
3585 the bit patterns as hex. All we could do here is to emit what GCC
3586 would have done in the first place. *Nobody* writes floating-point
3587 code as assembly code, but if they do, they should be able enough to
3588 find out the correct bit patterns and use them. */
3591 md_atof (int type ATTRIBUTE_UNUSED
, char *litp ATTRIBUTE_UNUSED
,
3592 int *sizep ATTRIBUTE_UNUSED
)
3594 /* FIXME: Is this function mentioned in the internals.texi manual? If
3596 return _("Bad call to md_atof () - floating point formats are not supported");
3599 /* Turn a number as a fixS * into a series of bytes that represents the
3600 number on the target machine. The purpose of this procedure is the
3601 same as that of md_number_to_chars but this procedure is supposed to
3602 handle general bit field fixes and machine-dependent fixups.
3604 bufp Pointer to an array where the result should be stored.
3606 val The value to store.
3608 n The number of bytes in "val" that should be stored.
3610 fixP The fix to be applied to the bit field starting at bufp.
3612 seg The segment containing this number. */
3615 cris_number_to_imm (char *bufp
, long val
, int n
, fixS
*fixP
, segT seg
)
3622 /* We put the relative "vma" for the other segment for inter-segment
3623 relocations in the object data to stay binary "compatible" (with an
3624 uninteresting old version) for the relocation.
3625 Maybe delete some day. */
3627 && (sym_seg
= S_GET_SEGMENT (fixP
->fx_addsy
)) != seg
)
3628 val
+= sym_seg
->vma
;
3630 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3631 switch (fixP
->fx_r_type
)
3633 /* These must be fully resolved when getting here. */
3634 case BFD_RELOC_16_PCREL
:
3635 case BFD_RELOC_8_PCREL
:
3636 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3637 _("PC-relative relocation must be trivially resolved"));
3642 /* Only use the computed value for old-arch binaries. For all
3643 others, where we're going to output a relocation, put 0 in the
3645 if (cris_arch
!= arch_cris_any_v0_v10
3646 && (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
))
3649 switch (fixP
->fx_r_type
)
3651 /* Ditto here, we put the addend into the object code as
3652 well as the reloc addend. Keep it that way for now, to simplify
3653 regression tests on the object file contents. FIXME: Seems
3654 uninteresting now that we have a test suite. */
3656 case BFD_RELOC_CRIS_32_GOT_GD
:
3657 case BFD_RELOC_CRIS_16_GOT_GD
:
3658 case BFD_RELOC_CRIS_32_GD
:
3659 case BFD_RELOC_CRIS_32_IE
:
3660 case BFD_RELOC_CRIS_32_DTPREL
:
3661 case BFD_RELOC_CRIS_16_DTPREL
:
3662 case BFD_RELOC_CRIS_32_GOT_TPREL
:
3663 case BFD_RELOC_CRIS_16_GOT_TPREL
:
3664 case BFD_RELOC_CRIS_32_TPREL
:
3665 case BFD_RELOC_CRIS_16_TPREL
:
3666 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3667 if (IS_ELF
&& fixP
->fx_addsy
!= NULL
)
3668 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3672 case BFD_RELOC_CRIS_16_GOT
:
3673 case BFD_RELOC_CRIS_32_GOT
:
3674 case BFD_RELOC_CRIS_32_GOTREL
:
3675 case BFD_RELOC_CRIS_16_GOTPLT
:
3676 case BFD_RELOC_CRIS_32_GOTPLT
:
3677 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3678 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3679 /* We don't want to put in any kind of non-zero bits in the data
3680 being relocated for these. */
3681 md_number_to_chars (bufp
, 0, n
);
3684 case BFD_RELOC_32_PCREL
:
3685 /* If this one isn't fully resolved, we don't want to put non-zero
3687 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3692 /* No use having warnings here, since most hosts have a 32-bit type
3693 for "long" (which will probably change soon, now that I wrote
3695 bufp
[3] = (val
>> 24) & 0xFF;
3696 bufp
[2] = (val
>> 16) & 0xFF;
3697 bufp
[1] = (val
>> 8) & 0xFF;
3698 bufp
[0] = val
& 0xFF;
3701 /* FIXME: The 16 and 8-bit cases should have a way to check
3702 whether a signed or unsigned (or any signedness) number is
3706 case BFD_RELOC_16_PCREL
:
3707 if (val
> 0xffff || val
< -32768)
3708 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3709 _("Value not in 16 bit range: %ld"), val
);
3710 bufp
[1] = (val
>> 8) & 0xFF;
3711 bufp
[0] = val
& 0xFF;
3714 case BFD_RELOC_CRIS_SIGNED_16
:
3715 if (val
> 32767 || val
< -32768)
3716 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3717 _("Value not in 16 bit signed range: %ld"), val
);
3718 bufp
[1] = (val
>> 8) & 0xFF;
3719 bufp
[0] = val
& 0xFF;
3723 case BFD_RELOC_8_PCREL
:
3724 if (val
> 255 || val
< -128)
3725 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("Value not in 8 bit range: %ld"), val
);
3726 bufp
[0] = val
& 0xFF;
3729 case BFD_RELOC_CRIS_SIGNED_8
:
3730 if (val
> 127 || val
< -128)
3731 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3732 _("Value not in 8 bit signed range: %ld"), val
);
3733 bufp
[0] = val
& 0xFF;
3736 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3737 /* FIXME: Test-cases for out-of-range values. Probably also need
3738 to use as_bad_where. */
3739 case BFD_RELOC_CRIS_UNSIGNED_4
:
3740 if (val
> 15 || val
< 0)
3741 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3742 _("Value not in 4 bit unsigned range: %ld"), val
);
3743 bufp
[0] |= val
& 0x0F;
3746 case BFD_RELOC_CRIS_UNSIGNED_5
:
3747 if (val
> 31 || val
< 0)
3748 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3749 _("Value not in 5 bit unsigned range: %ld"), val
);
3750 bufp
[0] |= val
& 0x1F;
3753 case BFD_RELOC_CRIS_SIGNED_6
:
3754 if (val
> 31 || val
< -32)
3755 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3756 _("Value not in 6 bit range: %ld"), val
);
3757 bufp
[0] |= val
& 0x3F;
3760 case BFD_RELOC_CRIS_UNSIGNED_6
:
3761 if (val
> 63 || val
< 0)
3762 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3763 _("Value not in 6 bit unsigned range: %ld"), val
);
3764 bufp
[0] |= val
& 0x3F;
3767 case BFD_RELOC_CRIS_BDISP8
:
3768 bufp
[0] = branch_disp (val
);
3771 case BFD_RELOC_NONE
:
3772 /* May actually happen automatically. For example at broken
3773 words, if the word turns out not to be broken.
3774 FIXME: When? Which testcase? */
3775 if (! fixP
->fx_addsy
)
3776 md_number_to_chars (bufp
, val
, n
);
3779 case BFD_RELOC_VTABLE_INHERIT
:
3780 /* This borrowed from tc-ppc.c on a whim. */
3782 && !S_IS_DEFINED (fixP
->fx_addsy
)
3783 && !S_IS_WEAK (fixP
->fx_addsy
))
3784 S_SET_WEAK (fixP
->fx_addsy
);
3787 case BFD_RELOC_VTABLE_ENTRY
:
3792 BAD_CASE (fixP
->fx_r_type
);
3796 /* Processes machine-dependent command line options. Called once for
3797 each option on the command line that the machine-independent part of
3798 GAS does not understand. */
3801 md_parse_option (int arg
, const char *argp ATTRIBUTE_UNUSED
)
3807 printf (_("Please use --help to see usage and options for this assembler.\n"));
3808 md_show_usage (stdout
);
3809 exit (EXIT_SUCCESS
);
3812 warn_for_branch_expansion
= 1;
3816 demand_register_prefix
= TRUE
;
3818 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3819 as_bad (_("--no-underscore is invalid with a.out format"));
3821 symbols_have_leading_underscore
= FALSE
;
3825 demand_register_prefix
= FALSE
;
3826 symbols_have_leading_underscore
= TRUE
;
3830 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
3831 as_bad (_("--pic is invalid for this object format"));
3833 if (cris_arch
!= arch_crisv32
)
3834 md_long_jump_size
= cris_any_v0_v10_long_jump_size_pic
;
3836 md_long_jump_size
= crisv32_long_jump_size
;
3841 const char *str
= argp
;
3842 enum cris_archs argarch
= cris_arch_from_string (&str
);
3844 if (argarch
== arch_cris_unknown
)
3845 as_bad (_("invalid <arch> in --march=<arch>: %s"), argp
);
3847 cris_arch
= argarch
;
3849 if (argarch
== arch_crisv32
)
3851 err_for_dangerous_mul_placement
= 0;
3852 md_long_jump_size
= crisv32_long_jump_size
;
3857 md_long_jump_size
= cris_any_v0_v10_long_jump_size_pic
;
3859 md_long_jump_size
= cris_any_v0_v10_long_jump_size
;
3864 case OPTION_MULBUG_ABORT_OFF
:
3865 err_for_dangerous_mul_placement
= 0;
3868 case OPTION_MULBUG_ABORT_ON
:
3869 err_for_dangerous_mul_placement
= 1;
3879 /* Round up a section size to the appropriate boundary. */
3881 md_section_align (segT segment
, valueT size
)
3883 /* Round all sects to multiple of 4, except the bss section, which
3884 we'll round to word-size.
3886 FIXME: Check if this really matters. All sections should be
3887 rounded up, and all sections should (optionally) be assumed to be
3888 dword-aligned, it's just that there is actual usage of linking to a
3890 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3892 if (segment
== bss_section
)
3893 return (size
+ 1) & ~1;
3894 return (size
+ 3) & ~3;
3898 /* FIXME: Is this wanted? It matches the testsuite, but that's not
3899 really a valid reason. */
3900 if (segment
== text_section
)
3901 return (size
+ 3) & ~3;
3907 /* Generate a machine-dependent relocation. */
3909 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixP
)
3912 bfd_reloc_code_real_type code
;
3914 switch (fixP
->fx_r_type
)
3916 case BFD_RELOC_CRIS_SIGNED_8
:
3920 case BFD_RELOC_CRIS_SIGNED_16
:
3921 code
= BFD_RELOC_16
;
3924 case BFD_RELOC_CRIS_16_GOT
:
3925 case BFD_RELOC_CRIS_32_GOT
:
3926 case BFD_RELOC_CRIS_16_GOTPLT
:
3927 case BFD_RELOC_CRIS_32_GOTPLT
:
3928 case BFD_RELOC_CRIS_32_GOTREL
:
3929 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3930 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3932 case BFD_RELOC_32_PCREL
:
3935 case BFD_RELOC_VTABLE_INHERIT
:
3936 case BFD_RELOC_VTABLE_ENTRY
:
3937 case BFD_RELOC_CRIS_UNSIGNED_8
:
3938 case BFD_RELOC_CRIS_UNSIGNED_16
:
3939 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3940 case BFD_RELOC_CRIS_32_GOT_GD
:
3941 case BFD_RELOC_CRIS_16_GOT_GD
:
3942 case BFD_RELOC_CRIS_32_GD
:
3943 case BFD_RELOC_CRIS_32_IE
:
3944 case BFD_RELOC_CRIS_32_DTPREL
:
3945 case BFD_RELOC_CRIS_16_DTPREL
:
3946 case BFD_RELOC_CRIS_32_GOT_TPREL
:
3947 case BFD_RELOC_CRIS_16_GOT_TPREL
:
3948 case BFD_RELOC_CRIS_32_TPREL
:
3949 case BFD_RELOC_CRIS_16_TPREL
:
3950 code
= fixP
->fx_r_type
;
3953 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3954 _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant"));
3958 relP
= XNEW (arelent
);
3959 gas_assert (relP
!= 0);
3960 relP
->sym_ptr_ptr
= XNEW (asymbol
*);
3961 *relP
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
3962 relP
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
3964 relP
->addend
= fixP
->fx_offset
;
3966 /* This is the standard place for KLUDGEs to work around bugs in
3967 bfd_install_relocation (first such note in the documentation
3968 appears with binutils-2.8).
3970 That function bfd_install_relocation does the wrong thing with
3971 putting stuff into the addend of a reloc (it should stay out) for a
3972 weak symbol. The really bad thing is that it adds the
3973 "segment-relative offset" of the symbol into the reloc. In this
3974 case, the reloc should instead be relative to the symbol with no
3975 other offset than the assembly code shows; and since the symbol is
3976 weak, any local definition should be ignored until link time (or
3978 To wit: weaksym+42 should be weaksym+42 in the reloc,
3979 not weaksym+(offset_from_segment_of_local_weaksym_definition)
3981 To "work around" this, we subtract the segment-relative offset of
3982 "known" weak symbols. This evens out the extra offset.
3984 That happens for a.out but not for ELF, since for ELF,
3985 bfd_install_relocation uses the "special function" field of the
3986 howto, and does not execute the code that needs to be undone. */
3988 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
3989 && fixP
->fx_addsy
&& S_IS_WEAK (fixP
->fx_addsy
)
3990 && ! bfd_is_und_section (S_GET_SEGMENT (fixP
->fx_addsy
)))
3992 relP
->addend
-= S_GET_VALUE (fixP
->fx_addsy
);
3995 relP
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4000 name
= S_GET_NAME (fixP
->fx_addsy
);
4002 name
= _("<unknown>");
4003 as_fatal (_("Cannot generate relocation type for symbol %s, code %s"),
4004 name
, bfd_get_reloc_code_name (code
));
4010 /* Machine-dependent usage-output. */
4013 md_show_usage (FILE *stream
)
4015 /* The messages are formatted to line up with the generic options. */
4016 fprintf (stream
, _("CRIS-specific options:\n"));
4017 fprintf (stream
, "%s",
4018 _(" -h, -H Don't execute, print this help text. Deprecated.\n"));
4019 fprintf (stream
, "%s",
4020 _(" -N Warn when branches are expanded to jumps.\n"));
4021 fprintf (stream
, "%s",
4022 _(" --underscore User symbols are normally prepended with underscore.\n"));
4023 fprintf (stream
, "%s",
4024 _(" Registers will not need any prefix.\n"));
4025 fprintf (stream
, "%s",
4026 _(" --no-underscore User symbols do not have any prefix.\n"));
4027 fprintf (stream
, "%s",
4028 _(" Registers will require a `$'-prefix.\n"));
4029 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4030 fprintf (stream
, "%s",
4031 _(" --pic Enable generation of position-independent code.\n"));
4033 fprintf (stream
, "%s",
4034 _(" --march=<arch> Generate code for <arch>. Valid choices for <arch>\n\
4035 are v0_v10, v10, v32 and common_v10_v32.\n"));
4038 /* Apply a fixS (fixup of an instruction or data that we didn't have
4039 enough info to complete immediately) to the data in a frag. */
4042 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
4044 /* This assignment truncates upper bits if valueT is 64 bits (as with
4045 --enable-64-bit-bfd), which is fine here, though we cast to avoid
4046 any compiler warnings. */
4047 long val
= (long) *valP
;
4048 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
4050 if (fixP
->fx_addsy
== 0 && !fixP
->fx_pcrel
)
4053 /* We can't actually support subtracting a symbol. */
4054 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
4055 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4056 _("expression too complex"));
4058 /* This operand-type is scaled. */
4059 if (fixP
->fx_r_type
== BFD_RELOC_CRIS_LAPCQ_OFFSET
)
4061 cris_number_to_imm (buf
, val
, fixP
->fx_size
, fixP
, seg
);
4064 /* All relocations are relative to the location just after the fixup;
4065 the address of the fixup plus its size. */
4068 md_pcrel_from (fixS
*fixP
)
4070 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4072 /* FIXME: We get here only at the end of assembly, when X in ".-X" is
4073 still unknown. Since we don't have pc-relative relocations in a.out,
4074 this is invalid. What to do if anything for a.out, is to add
4075 pc-relative relocations everywhere including the elinux program
4076 loader. For ELF, allow straight-forward PC-relative relocations,
4077 which are always relative to the location after the relocation. */
4078 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
4079 || (fixP
->fx_r_type
!= BFD_RELOC_8_PCREL
4080 && fixP
->fx_r_type
!= BFD_RELOC_16_PCREL
4081 && fixP
->fx_r_type
!= BFD_RELOC_32_PCREL
4082 && fixP
->fx_r_type
!= BFD_RELOC_CRIS_LAPCQ_OFFSET
))
4083 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4084 _("Invalid pc-relative relocation"));
4085 return fixP
->fx_size
+ addr
;
4088 /* We have no need to give defaults for symbol-values. */
4090 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
4095 /* If this function returns non-zero, it prevents the relocation
4096 against symbol(s) in the FIXP from being replaced with relocations
4097 against section symbols, and guarantees that a relocation will be
4098 emitted even when the value can be resolved locally. */
4100 md_cris_force_relocation (struct fix
*fixp
)
4102 switch (fixp
->fx_r_type
)
4104 case BFD_RELOC_CRIS_16_GOT
:
4105 case BFD_RELOC_CRIS_32_GOT
:
4106 case BFD_RELOC_CRIS_16_GOTPLT
:
4107 case BFD_RELOC_CRIS_32_GOTPLT
:
4108 case BFD_RELOC_CRIS_32_GOTREL
:
4109 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
4110 case BFD_RELOC_CRIS_32_PLT_PCREL
:
4116 return generic_force_reloc (fixp
);
4119 /* Check and emit error if broken-word handling has failed to fix up a
4120 case-table. This is called from write.c, after doing everything it
4121 knows about how to handle broken words. */
4124 tc_cris_check_adjusted_broken_word (offsetT new_offset
, struct broken_word
*brokwP
)
4126 if (new_offset
> 32767 || new_offset
< -32768)
4127 /* We really want a genuine error, not a warning, so make it one. */
4128 as_bad_where (brokwP
->frag
->fr_file
, brokwP
->frag
->fr_line
,
4129 _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
4133 /* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers. */
4136 cris_force_reg_prefix (void)
4138 demand_register_prefix
= TRUE
;
4141 /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */
4144 cris_relax_reg_prefix (void)
4146 demand_register_prefix
= FALSE
;
4149 /* Adjust for having a leading '_' on all user symbols. */
4152 cris_sym_leading_underscore (void)
4154 /* We can't really do anything more than assert that what the program
4155 thinks symbol starts with agrees with the command-line options, since
4156 the bfd is already created. */
4158 if (!symbols_have_leading_underscore
)
4159 as_bad (_(".syntax %s requires command-line option `--underscore'"),
4160 SYNTAX_USER_SYM_LEADING_UNDERSCORE
);
4163 /* Adjust for not having any particular prefix on user symbols. */
4165 static void cris_sym_no_leading_underscore (void)
4167 if (symbols_have_leading_underscore
)
4168 as_bad (_(".syntax %s requires command-line option `--no-underscore'"),
4169 SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
);
4172 /* Handle the .syntax pseudo, which takes an argument that decides what
4173 syntax the assembly code has. */
4176 s_syntax (int ignore ATTRIBUTE_UNUSED
)
4178 static const struct syntaxes
4180 const char *const operand
;
4183 {{SYNTAX_ENFORCE_REG_PREFIX
, cris_force_reg_prefix
},
4184 {SYNTAX_RELAX_REG_PREFIX
, cris_relax_reg_prefix
},
4185 {SYNTAX_USER_SYM_LEADING_UNDERSCORE
, cris_sym_leading_underscore
},
4186 {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
, cris_sym_no_leading_underscore
}};
4188 const struct syntaxes
*sp
;
4190 for (sp
= syntax_table
;
4191 sp
< syntax_table
+ sizeof (syntax_table
) / sizeof (syntax_table
[0]);
4194 if (strncmp (input_line_pointer
, sp
->operand
,
4195 strlen (sp
->operand
)) == 0)
4199 input_line_pointer
+= strlen (sp
->operand
);
4200 demand_empty_rest_of_line ();
4205 as_bad (_("Unknown .syntax operand"));
4208 /* Wrapper for dwarf2_directive_file to emit error if this is seen when
4209 not emitting ELF. */
4212 s_cris_file (int dummy
)
4214 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4215 as_bad (_("Pseudodirective .file is only valid when generating ELF"));
4217 dwarf2_directive_file (dummy
);
4220 /* Wrapper for dwarf2_directive_loc to emit error if this is seen when not
4224 s_cris_loc (int dummy
)
4226 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4227 as_bad (_("Pseudodirective .loc is only valid when generating ELF"));
4229 dwarf2_directive_loc (dummy
);
4232 /* Worker for .dtpoffd: generate a R_CRIS_32_DTPREL reloc, as for
4233 expr:DTPREL but for use in debug info. */
4236 s_cris_dtpoff (int bytes
)
4242 as_fatal (_("internal inconsistency problem: %s called for %d bytes"),
4243 __FUNCTION__
, bytes
);
4247 p
= frag_more (bytes
);
4248 md_number_to_chars (p
, 0, bytes
);
4249 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, bytes
, &ex
, FALSE
,
4250 BFD_RELOC_CRIS_32_DTPREL
);
4252 demand_empty_rest_of_line ();
4256 /* Translate a <arch> string (as common to --march=<arch> and .arch <arch>)
4257 into an enum. If the string *STR is recognized, *STR is updated to point
4258 to the end of the string. If the string is not recognized,
4259 arch_cris_unknown is returned. */
4261 static enum cris_archs
4262 cris_arch_from_string (const char **str
)
4264 static const struct cris_arch_struct
4266 const char *const name
;
4267 enum cris_archs arch
;
4269 /* Keep in order longest-first for choices where one is a prefix
4271 {{"v0_v10", arch_cris_any_v0_v10
},
4272 {"v10", arch_crisv10
},
4273 {"v32", arch_crisv32
},
4274 {"common_v10_v32", arch_cris_common_v10_v32
}};
4276 const struct cris_arch_struct
*ap
;
4278 for (ap
= arch_table
;
4279 ap
< arch_table
+ sizeof (arch_table
) / sizeof (arch_table
[0]);
4282 int len
= strlen (ap
->name
);
4284 if (strncmp (*str
, ap
->name
, len
) == 0
4285 && (str
[0][len
] == 0 || ISSPACE (str
[0][len
])))
4287 *str
+= strlen (ap
->name
);
4292 return arch_cris_unknown
;
4295 /* Return nonzero if architecture version ARCH matches version range in
4299 cris_insn_ver_valid_for_arch (enum cris_insn_version_usage iver
,
4300 enum cris_archs arch
)
4304 case arch_cris_any_v0_v10
:
4306 (iver
== cris_ver_version_all
4307 || iver
== cris_ver_warning
4308 || iver
== cris_ver_v0_3
4309 || iver
== cris_ver_v3p
4310 || iver
== cris_ver_v0_10
4311 || iver
== cris_ver_sim_v0_10
4312 || iver
== cris_ver_v3_10
4313 || iver
== cris_ver_v8
4314 || iver
== cris_ver_v8p
4315 || iver
== cris_ver_v8_10
4316 || iver
== cris_ver_v10
4317 || iver
== cris_ver_v10p
);
4321 (iver
== cris_ver_version_all
4322 || iver
== cris_ver_v3p
4323 || iver
== cris_ver_v8p
4324 || iver
== cris_ver_v10p
4325 || iver
== cris_ver_v32p
);
4327 case arch_cris_common_v10_v32
:
4329 (iver
== cris_ver_version_all
4330 || iver
== cris_ver_v3p
4331 || iver
== cris_ver_v8p
4332 || iver
== cris_ver_v10p
);
4336 (iver
== cris_ver_version_all
4337 || iver
== cris_ver_v0_3
4338 || iver
== cris_ver_v0_10
4339 || iver
== cris_ver_sim_v0_10
);
4343 (iver
== cris_ver_version_all
4344 || iver
== cris_ver_v0_3
4345 || iver
== cris_ver_v3p
4346 || iver
== cris_ver_v0_10
4347 || iver
== cris_ver_sim_v0_10
4348 || iver
== cris_ver_v3_10
);
4352 (iver
== cris_ver_version_all
4353 || iver
== cris_ver_v3p
4354 || iver
== cris_ver_v0_10
4355 || iver
== cris_ver_sim_v0_10
4356 || iver
== cris_ver_v3_10
4357 || iver
== cris_ver_v8
4358 || iver
== cris_ver_v8p
4359 || iver
== cris_ver_v8_10
);
4363 (iver
== cris_ver_version_all
4364 || iver
== cris_ver_v3p
4365 || iver
== cris_ver_v0_10
4366 || iver
== cris_ver_sim_v0_10
4367 || iver
== cris_ver_v3_10
4368 || iver
== cris_ver_v8p
4369 || iver
== cris_ver_v8_10
4370 || iver
== cris_ver_v10
4371 || iver
== cris_ver_v10p
);
4378 /* Assert that the .arch ARCHCHOICE1 is compatible with the specified or
4379 default --march=<ARCHCHOICE2> option. */
4382 s_cris_arch (int dummy ATTRIBUTE_UNUSED
)
4384 /* Right now we take the easy route and check for sameness. It's not
4385 obvious that allowing e.g. --march=v32 and .arch common_v0_v32
4386 would be more useful than confusing, implementation-wise and
4389 const char *str
= input_line_pointer
;
4390 enum cris_archs arch
= cris_arch_from_string (&str
);
4392 if (arch
== arch_cris_unknown
)
4394 as_bad (_("unknown operand to .arch"));
4396 /* For this one, str does not reflect the end of the operand,
4397 since there was no matching arch. Skip it manually; skip
4398 things that can be part of a word (a name). */
4399 while (is_part_of_name (*str
))
4402 else if (arch
!= cris_arch
)
4403 as_bad (_(".arch <arch> requires a matching --march=... option"));
4405 input_line_pointer
= (char *) str
;
4406 demand_empty_rest_of_line ();
4412 * eval: (c-set-style "gnu")
4413 * indent-tabs-mode: t