1 /* tc-cris.c -- Assembler code for the CRIS CPU core.
2 Copyright 2000, 2001, 2002, 2003, 2004, 2006, 2007
3 Free Software Foundation, Inc.
5 Contributed by Axis Communications AB, Lund, Sweden.
6 Originally written for GAS 1.38.1 by Mikael Asker.
7 Updates, BFDizing, GNUifying and ELF support by Hans-Peter Nilsson.
9 This file is part of GAS, the GNU Assembler.
11 GAS is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
16 GAS is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with GAS; see the file COPYING. If not, write to the
23 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
24 MA 02110-1301, USA. */
27 #include "safe-ctype.h"
29 #include "opcode/cris.h"
30 #include "dwarf2dbg.h"
32 /* Conventions used here:
33 Generally speaking, pointers to binutils types such as "fragS" and
34 "expressionS" get parameter and variable names ending in "P", such as
35 "fragP", to harmonize with the rest of the binutils code. Other
36 pointers get a "p" suffix, such as "bufp". Any function or type-name
37 that could clash with a current or future binutils or GAS function get
40 #define SYNTAX_RELAX_REG_PREFIX "no_register_prefix"
41 #define SYNTAX_ENFORCE_REG_PREFIX "register_prefix"
42 #define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore"
43 #define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore"
44 #define REGISTER_PREFIX_CHAR '$'
46 /* True for expressions where getting X_add_symbol and X_add_number is
47 enough to get the "base" and "offset"; no need to make_expr_symbol.
48 It's not enough to check if X_op_symbol is NULL; that misses unary
49 operations like O_uminus. */
50 #define SIMPLE_EXPR(EXP) \
51 ((EXP)->X_op == O_constant || (EXP)->X_op == O_symbol)
53 /* Like in ":GOT", ":GOTOFF" etc. Other ports use '@', but that's in
54 line_separator_chars for CRIS, so we avoid it. */
55 #define RELOC_SUFFIX_CHAR ':'
57 /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only.
58 Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */
61 CRIS_INSN_NORMAL
, CRIS_INSN_NONE
, CRIS_INSN_BRANCH
, CRIS_INSN_MUL
64 /* An instruction will have one of these prefixes.
65 Although the same bit-pattern, we handle BDAP with an immediate
66 expression (eventually quick or [pc+]) different from when we only have
67 register expressions. */
70 PREFIX_NONE
, PREFIX_BDAP_IMM
, PREFIX_BDAP
, PREFIX_BIAP
, PREFIX_DIP
,
74 /* The prefix for an instruction. */
77 enum prefix_kind kind
;
81 /* There might be an expression to be evaluated, like I in [rN+I]. */
84 /* If there's an expression, we might need a relocation. Here's the
85 type of what relocation to start relaxaton with.
86 The relocation is assumed to start immediately after the prefix insn,
87 so we don't provide an offset. */
88 enum bfd_reloc_code_real reloc
;
91 /* The description of the instruction being assembled. */
92 struct cris_instruction
94 /* If CRIS_INSN_NONE, then this insn is of zero length. */
95 enum cris_insn_kind insn_type
;
97 /* If a special register was mentioned, this is its description, else
99 const struct cris_spec_reg
*spec_reg
;
103 /* An insn may have at most one expression; theoretically there could be
104 another in its prefix (but I don't see how that could happen). */
107 /* The expression might need a relocation. Here's one to start
109 enum bfd_reloc_code_real reloc
;
111 /* The size in bytes of an immediate expression, or zero if
119 arch_crisv0
, arch_crisv3
, arch_crisv8
, arch_crisv10
,
120 arch_cris_any_v0_v10
, arch_crisv32
, arch_cris_common_v10_v32
123 static enum cris_archs
cris_arch_from_string (char **);
124 static int cris_insn_ver_valid_for_arch (enum cris_insn_version_usage
,
127 static void cris_process_instruction (char *, struct cris_instruction
*,
128 struct cris_prefix
*);
129 static int get_bwd_size_modifier (char **, int *);
130 static int get_bw_size_modifier (char **, int *);
131 static int get_gen_reg (char **, int *);
132 static int get_spec_reg (char **, const struct cris_spec_reg
**);
133 static int get_sup_reg (char **, int *);
134 static int get_autoinc_prefix_or_indir_op (char **, struct cris_prefix
*,
137 static int get_3op_or_dip_prefix_op (char **, struct cris_prefix
*);
138 static int cris_get_expression (char **, expressionS
*);
139 static int get_flags (char **, int *);
140 static void gen_bdap (int, expressionS
*);
141 static int branch_disp (int);
142 static void gen_cond_branch_32 (char *, char *, fragS
*, symbolS
*, symbolS
*,
144 static void cris_number_to_imm (char *, long, int, fixS
*, segT
);
145 static void cris_create_short_jump (char *, addressT
, addressT
, fragS
*,
147 static void s_syntax (int);
148 static void s_cris_file (int);
149 static void s_cris_loc (int);
150 static void s_cris_arch (int);
152 /* Get ":GOT", ":GOTOFF", ":PLT" etc. suffixes. */
153 static void cris_get_reloc_suffix (char **, bfd_reloc_code_real_type
*,
155 static unsigned int cris_get_specified_reloc_size (bfd_reloc_code_real_type
);
157 /* All the .syntax functions. */
158 static void cris_force_reg_prefix (void);
159 static void cris_relax_reg_prefix (void);
160 static void cris_sym_leading_underscore (void);
161 static void cris_sym_no_leading_underscore (void);
162 static char *cris_insn_first_word_frag (void);
164 /* Handle to the opcode hash table. */
165 static struct hash_control
*op_hash
= NULL
;
167 /* If we target cris-axis-linux-gnu (as opposed to generic cris-axis-elf),
168 we default to no underscore and required register-prefixes. The
169 difference is in the default values. */
171 #define DEFAULT_CRIS_AXIS_LINUX_GNU TRUE
173 #define DEFAULT_CRIS_AXIS_LINUX_GNU FALSE
176 /* Whether we demand that registers have a `$' prefix. Default here. */
177 static bfd_boolean demand_register_prefix
= DEFAULT_CRIS_AXIS_LINUX_GNU
;
179 /* Whether global user symbols have a leading underscore. Default here. */
180 static bfd_boolean symbols_have_leading_underscore
181 = !DEFAULT_CRIS_AXIS_LINUX_GNU
;
183 /* Whether or not we allow PIC, and expand to PIC-friendly constructs. */
184 static bfd_boolean pic
= FALSE
;
186 /* Whether or not we allow TLS suffixes. For the moment, we always do. */
187 static const bfd_boolean tls
= TRUE
;
189 /* If we're configured for "cris", default to allow all v0..v10
190 instructions and register names. */
191 #ifndef DEFAULT_CRIS_ARCH
192 #define DEFAULT_CRIS_ARCH cris_any_v0_v10
195 /* No whitespace in the CONCAT2 parameter list. */
196 static enum cris_archs cris_arch
= XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
);
198 const pseudo_typeS md_pseudo_table
[] =
201 {"syntax", s_syntax
, 0},
202 {"file", s_cris_file
, 0},
203 {"loc", s_cris_loc
, 0},
204 {"arch", s_cris_arch
, 0},
208 static int warn_for_branch_expansion
= 0;
210 /* Whether to emit error when a MULS/MULU could be located last on a
212 static int err_for_dangerous_mul_placement
213 = (XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
) != arch_crisv32
);
215 const char cris_comment_chars
[] = ";";
217 /* This array holds the chars that only start a comment at the beginning of
218 a line. If the line seems to have the form '# 123 filename'
219 .line and .file directives will appear in the pre-processed output. */
220 /* Note that input_file.c hand-checks for '#' at the beginning of the
221 first line of the input file. This is because the compiler outputs
222 #NO_APP at the beginning of its output. */
223 /* Also note that slash-star will always start a comment. */
224 const char line_comment_chars
[] = "#";
225 const char line_separator_chars
[] = "@";
227 /* Now all floating point support is shut off. See md_atof. */
228 const char EXP_CHARS
[] = "";
229 const char FLT_CHARS
[] = "";
231 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
233 ---/ /--+-----------------+-----------------+-----------------+
234 | what state ? | how long ? |
235 ---/ /--+-----------------+-----------------+-----------------+
237 The "how long" bits are 00 = byte, 01 = word, 10 = dword (long).
238 Not all lengths are legit for a given value of (what state).
240 Groups for CRIS address relaxing:
243 length: byte, word, 10-byte expansion
246 length: byte, word, dword
249 Not really a relaxation (no infrastructure to get delay-slots
250 right), just an alignment and placement checker for the v10
253 4. Bcc (V32 and later)
254 length: byte, word, 14-byte expansion
257 length: byte, word, error
260 length: byte, word, dword
266 #define STATE_COND_BRANCH (1)
267 #define STATE_BASE_PLUS_DISP_PREFIX (2)
268 #define STATE_MUL (3)
269 #define STATE_COND_BRANCH_V32 (4)
270 #define STATE_COND_BRANCH_COMMON (5)
271 #define STATE_ABS_BRANCH_V32 (6)
272 #define STATE_LAPC (7)
273 #define STATE_COND_BRANCH_PIC (8)
275 #define STATE_LENGTH_MASK (3)
276 #define STATE_BYTE (0)
277 #define STATE_WORD (1)
278 #define STATE_DWORD (2)
279 /* Symbol undefined. */
280 #define STATE_UNDF (3)
281 #define STATE_MAX_LENGTH (3)
283 /* These displacements are relative to the address following the opcode
284 word of the instruction. The first letter is Byte, Word. The 2nd
285 letter is Forward, Backward. */
287 #define BRANCH_BF ( 254)
288 #define BRANCH_BB (-256)
289 #define BRANCH_BF_V32 ( 252)
290 #define BRANCH_BB_V32 (-258)
291 #define BRANCH_WF (2 + 32767)
292 #define BRANCH_WB (2 + -32768)
293 #define BRANCH_WF_V32 (-2 + 32767)
294 #define BRANCH_WB_V32 (-2 + -32768)
296 #define BDAP_BF ( 127)
297 #define BDAP_BB (-128)
298 #define BDAP_WF ( 32767)
299 #define BDAP_WB (-32768)
301 #define ENCODE_RELAX(what, length) (((what) << 2) + (length))
303 const relax_typeS md_cris_relax_table
[] =
305 /* Error sentinel (0, 0). */
318 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (1, 1)},
320 /* Bcc [PC+] (1, 1). */
321 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (1, 2)},
323 /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
331 {BDAP_BF
, BDAP_BB
, 0, ENCODE_RELAX (2, 1)},
333 /* BDAP.[bw] [PC+] (2, 1). */
334 {BDAP_WF
, BDAP_WB
, 2, ENCODE_RELAX (2, 2)},
336 /* BDAP.d [PC+] (2, 2). */
342 /* MULS/MULU (3, 0). Positions (3, 1..3) are unused. */
343 {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0},
345 /* V32: Bcc o (4, 0). */
346 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (4, 1)},
348 /* V32: Bcc [PC+] (4, 1). */
349 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (4, 2)},
351 /* V32: BA .+12; NOP; BA32 target; NOP; Bcc .-6 (4, 2). */
357 /* COMMON: Bcc o (5, 0). The offsets are calculated as for v32. Code
358 should contain two nop insns (or four if offset size is large or
359 unknown) after every label. */
360 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (5, 1)},
362 /* COMMON: Bcc [PC+] (5, 1). */
363 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (5, 2)},
365 /* COMMON: FIXME: ???. Treat as error currently. */
371 /* V32: BA o (6, 0). */
372 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (6, 1)},
374 /* V32: BA.W (6, 1). */
375 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (6, 2)},
377 /* V32: BA.D (6, 2). */
383 /* LAPC: LAPCQ .+0..15*2,Rn (7, 0). */
384 {14*2, -1*2, 0, ENCODE_RELAX (7, 2)},
387 While there's a shorter sequence, e.g. LAPCQ + an ADDQ or SUBQ,
388 that would affect flags, so we can't do that as it wouldn't be a
389 proper insn expansion of LAPCQ. This row is associated with a
390 2-byte expansion, so it's unused rather than the next. */
393 /* LAPC: LAPC.D (7, 2). */
399 /* PIC for pre-v32: Bcc o (8, 0). */
400 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (STATE_COND_BRANCH_PIC
, 1)},
402 /* Bcc [PC+] (8, 1). */
403 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (STATE_COND_BRANCH_PIC
, 2)},
405 /* 32-bit expansion, PIC (8, 2). */
417 /* Target-specific multicharacter options, not const-declared. */
418 struct option md_longopts
[] =
420 #define OPTION_NO_US (OPTION_MD_BASE + 0)
421 {"no-underscore", no_argument
, NULL
, OPTION_NO_US
},
422 #define OPTION_US (OPTION_MD_BASE + 1)
423 {"underscore", no_argument
, NULL
, OPTION_US
},
424 #define OPTION_PIC (OPTION_US + 1)
425 {"pic", no_argument
, NULL
, OPTION_PIC
},
426 #define OPTION_MULBUG_ABORT_ON (OPTION_PIC + 1)
427 {"mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_ON
},
428 #define OPTION_MULBUG_ABORT_OFF (OPTION_MULBUG_ABORT_ON + 1)
429 {"no-mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_OFF
},
430 #define OPTION_ARCH (OPTION_MULBUG_ABORT_OFF + 1)
431 {"march", required_argument
, NULL
, OPTION_ARCH
},
432 {NULL
, no_argument
, NULL
, 0}
435 /* Not const-declared. */
436 size_t md_longopts_size
= sizeof (md_longopts
);
437 const char *md_shortopts
= "hHN";
439 /* At first glance, this may seems wrong and should be 4 (ba + nop); but
440 since a short_jump must skip a *number* of long jumps, it must also be
441 a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop"
442 for the delay slot and hope that the jump table at most needs
443 32767/4=8191 long-jumps. A branch is better than a jump, since it is
444 relative; we will not have a reloc to fix up somewhere.
446 Note that we can't add relocs, because relaxation uses these fixed
447 numbers, and md_create_short_jump is called after relaxation. */
449 int md_short_jump_size
= 6;
451 /* The v32 version has a delay-slot, hence two bytes longer.
452 The pre-v32 PIC version uses a prefixed insn. */
453 #define cris_any_v0_v10_long_jump_size 6
454 #define cris_any_v0_v10_long_jump_size_pic 8
455 #define crisv32_long_jump_size 8
457 int md_long_jump_size
= XCONCAT2 (DEFAULT_CRIS_ARCH
,_long_jump_size
);
459 /* Report output format. Small changes in output format (like elf
460 variants below) can happen until all options are parsed, but after
461 that, the output format must remain fixed. */
464 cris_target_format (void)
466 switch (OUTPUT_FLAVOR
)
468 case bfd_target_aout_flavour
:
471 case bfd_target_elf_flavour
:
472 if (symbols_have_leading_underscore
)
473 return "elf32-us-cris";
482 /* Return a bfd_mach_cris... value corresponding to the value of
488 unsigned int retval
= 0;
492 case arch_cris_common_v10_v32
:
493 retval
= bfd_mach_cris_v10_v32
;
497 retval
= bfd_mach_cris_v32
;
501 case arch_cris_any_v0_v10
:
502 retval
= bfd_mach_cris_v0_v10
;
506 BAD_CASE (cris_arch
);
512 /* We need a port-specific relaxation function to cope with sym2 - sym1
513 relative expressions with both symbols in the same segment (but not
514 necessarily in the same frag as this insn), for example:
515 move.d [pc+sym2-(sym1-2)],r10
517 The offset can be 8, 16 or 32 bits long. */
520 cris_relax_frag (segT seg ATTRIBUTE_UNUSED
, fragS
*fragP
,
521 long stretch ATTRIBUTE_UNUSED
)
526 const relax_typeS
*this_type
;
527 const relax_typeS
*start_type
;
528 relax_substateT next_state
;
529 relax_substateT this_state
;
530 const relax_typeS
*table
= TC_GENERIC_RELAX_TABLE
;
532 /* We only have to cope with frags as prepared by
533 md_estimate_size_before_relax. The dword cases may get here
534 because of the different reasons that they aren't relaxable. */
535 switch (fragP
->fr_subtype
)
537 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
538 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
539 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
540 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
541 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
542 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
543 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
544 /* When we get to these states, the frag won't grow any more. */
547 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
548 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
549 if (fragP
->fr_symbol
== NULL
550 || S_GET_SEGMENT (fragP
->fr_symbol
) != absolute_section
)
551 as_fatal (_("internal inconsistency problem in %s: fr_symbol %lx"),
552 __FUNCTION__
, (long) fragP
->fr_symbol
);
553 symbolP
= fragP
->fr_symbol
;
554 if (symbol_resolved_p (symbolP
))
555 as_fatal (_("internal inconsistency problem in %s: resolved symbol"),
557 aim
= S_GET_VALUE (symbolP
);
560 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
561 /* Nothing to do here. */
565 as_fatal (_("internal inconsistency problem in %s: fr_subtype %d"),
566 __FUNCTION__
, fragP
->fr_subtype
);
569 /* The rest is stolen from relax_frag. There's no obvious way to
570 share the code, but fortunately no requirement to keep in sync as
571 long as fragP->fr_symbol does not have its segment changed. */
573 this_state
= fragP
->fr_subtype
;
574 start_type
= this_type
= table
+ this_state
;
578 /* Look backwards. */
579 for (next_state
= this_type
->rlx_more
; next_state
;)
580 if (aim
>= this_type
->rlx_backward
)
584 /* Grow to next state. */
585 this_state
= next_state
;
586 this_type
= table
+ this_state
;
587 next_state
= this_type
->rlx_more
;
593 for (next_state
= this_type
->rlx_more
; next_state
;)
594 if (aim
<= this_type
->rlx_forward
)
598 /* Grow to next state. */
599 this_state
= next_state
;
600 this_type
= table
+ this_state
;
601 next_state
= this_type
->rlx_more
;
605 growth
= this_type
->rlx_length
- start_type
->rlx_length
;
607 fragP
->fr_subtype
= this_state
;
611 /* Prepare machine-dependent frags for relaxation.
613 Called just before relaxation starts. Any symbol that is now undefined
614 will not become defined.
616 Return the correct fr_subtype in the frag.
618 Return the initial "guess for fr_var" to caller. The guess for fr_var
619 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
620 or fr_var contributes to our returned value.
622 Although it may not be explicit in the frag, pretend
623 fr_var starts with a value. */
626 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
629 symbolS
*symbolP
= fragP
->fr_symbol
;
631 #define HANDLE_RELAXABLE(state) \
632 case ENCODE_RELAX (state, STATE_UNDF): \
633 if (symbolP != NULL \
634 && S_GET_SEGMENT (symbolP) == segment_type \
635 && !S_IS_WEAK (symbolP)) \
636 /* The symbol lies in the same segment - a relaxable \
639 = ENCODE_RELAX (state, STATE_BYTE); \
641 /* Unknown or not the same segment, so not relaxable. */ \
643 = ENCODE_RELAX (state, STATE_DWORD); \
645 = md_cris_relax_table[fragP->fr_subtype].rlx_length; \
648 old_fr_fix
= fragP
->fr_fix
;
650 switch (fragP
->fr_subtype
)
652 HANDLE_RELAXABLE (STATE_COND_BRANCH
);
653 HANDLE_RELAXABLE (STATE_COND_BRANCH_V32
);
654 HANDLE_RELAXABLE (STATE_COND_BRANCH_COMMON
);
655 HANDLE_RELAXABLE (STATE_COND_BRANCH_PIC
);
656 HANDLE_RELAXABLE (STATE_ABS_BRANCH_V32
);
658 case ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
):
660 && S_GET_SEGMENT (symbolP
) == segment_type
661 && !S_IS_WEAK (symbolP
))
663 /* The symbol lies in the same segment - a relaxable case.
664 Check if we currently have an odd offset; we can't code
665 that into the instruction. Relaxing presumably only cause
666 multiple-of-two changes, so we should only need to adjust
668 bfd_vma target_address
670 ? S_GET_VALUE (symbolP
)
671 : 0) + fragP
->fr_offset
;
672 bfd_vma var_part_offset
= fragP
->fr_fix
;
673 bfd_vma address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
674 long offset
= target_address
- (address_of_var_part
- 2);
678 ? ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
)
679 : ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
);
682 /* Unknown or not the same segment, so not relaxable. */
684 = ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
);
686 = md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
689 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
):
690 /* Note that we can not do anything sane with relaxing
691 [rX + a_known_symbol_in_text], it will have to be a 32-bit
694 We could play tricks with managing a constant pool and make
695 a_known_symbol_in_text a "bdap [pc + offset]" pointing there
696 (like the GOT for ELF shared libraries), but that's no use, it
697 would in general be no shorter or faster code, only more
700 if (S_GET_SEGMENT (symbolP
) != absolute_section
)
702 /* Go for dword if not absolute or same segment. */
704 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
);
705 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
707 else if (!symbol_resolved_p (fragP
->fr_symbol
))
709 /* The symbol will eventually be completely resolved as an
710 absolute expression, but right now it depends on the result
711 of relaxation and we don't know anything else about the
712 value. We start relaxation with the assumption that it'll
715 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
);
716 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
720 /* Absolute expression. */
722 value
= (symbolP
!= NULL
723 ? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
725 if (value
>= -128 && value
<= 127)
727 /* Byte displacement. */
728 (fragP
->fr_opcode
)[0] = value
;
732 /* Word or dword displacement. */
733 int pow2_of_size
= 1;
736 if (value
< -32768 || value
> 32767)
738 /* Outside word range, make it a dword. */
742 /* Modify the byte-offset BDAP into a word or dword offset
743 BDAP. Or really, a BDAP rX,8bit into a
744 BDAP.[wd] rX,[PC+] followed by a word or dword. */
745 (fragP
->fr_opcode
)[0] = BDAP_PC_LOW
+ pow2_of_size
* 16;
747 /* Keep the register number in the highest four bits. */
748 (fragP
->fr_opcode
)[1] &= 0xF0;
749 (fragP
->fr_opcode
)[1] |= BDAP_INCR_HIGH
;
751 /* It grew by two or four bytes. */
752 fragP
->fr_fix
+= 1 << pow2_of_size
;
753 writep
= fragP
->fr_literal
+ old_fr_fix
;
754 md_number_to_chars (writep
, value
, 1 << pow2_of_size
);
760 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
761 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
762 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
763 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_BYTE
):
764 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_WORD
):
765 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
766 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
767 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
768 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
769 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
770 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
771 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
772 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
773 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
774 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
775 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
776 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
777 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
778 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
779 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
780 /* When relaxing a section for the second time, we don't need to
781 do anything except making sure that fr_var is set right. */
782 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
785 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
786 /* Nothing to do here. */
790 BAD_CASE (fragP
->fr_subtype
);
793 return fragP
->fr_var
+ (fragP
->fr_fix
- old_fr_fix
);
796 /* Perform post-processing of machine-dependent frags after relaxation.
797 Called after relaxation is finished.
799 fr_type == rs_machine_dependent.
800 fr_subtype is what the address relaxed to.
802 Out: Any fixS:s and constants are set up.
804 The caller will turn the frag into a ".space 0". */
807 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec ATTRIBUTE_UNUSED
,
810 /* Pointer to first byte in variable-sized part of the frag. */
813 /* Pointer to first opcode byte in frag. */
816 /* Used to check integrity of the relaxation.
817 One of 2 = long, 1 = word, or 0 = byte. */
820 /* Size in bytes of variable-sized part of frag. */
821 int var_part_size
= 0;
823 /* This is part of *fragP. It contains all information about addresses
824 and offsets to varying parts. */
826 unsigned long var_part_offset
;
828 /* Where, in file space, is _var of *fragP? */
829 unsigned long address_of_var_part
= 0;
831 /* Where, in file space, does addr point? */
832 unsigned long target_address
;
834 know (fragP
->fr_type
== rs_machine_dependent
);
836 length_code
= fragP
->fr_subtype
& STATE_LENGTH_MASK
;
837 know (length_code
>= 0 && length_code
< STATE_MAX_LENGTH
);
839 var_part_offset
= fragP
->fr_fix
;
840 var_partp
= fragP
->fr_literal
+ var_part_offset
;
841 opcodep
= fragP
->fr_opcode
;
843 symbolP
= fragP
->fr_symbol
;
844 target_address
= (symbolP
? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
845 address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
847 switch (fragP
->fr_subtype
)
849 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
850 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_BYTE
):
851 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
852 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
853 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
854 opcodep
[0] = branch_disp ((target_address
- address_of_var_part
));
858 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
859 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_WORD
):
860 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
861 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
862 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
863 /* We had a quick immediate branch, now turn it into a word one i.e. a
865 opcodep
[0] = BRANCH_PC_LOW
;
867 opcodep
[1] |= BRANCH_INCR_HIGH
;
868 md_number_to_chars (var_partp
,
871 - (address_of_var_part
872 + (cris_arch
== arch_crisv32
873 || cris_arch
== arch_cris_common_v10_v32
879 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
880 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
881 fragP
->fr_symbol
, (symbolS
*) NULL
,
883 /* Ten bytes added: a branch, nop and a jump. */
884 var_part_size
= 2 + 2 + 4 + 2;
887 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
888 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
889 fragP
->fr_symbol
, (symbolS
*) NULL
,
891 /* Twelve bytes added: a branch, nop and a pic-branch-32. */
892 var_part_size
= 2 + 2 + 4 + 2 + 2;
895 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
896 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
897 fragP
->fr_symbol
, (symbolS
*) NULL
,
899 /* Twelve bytes added: a branch, nop and another branch and nop. */
900 var_part_size
= 2 + 2 + 2 + 4 + 2;
903 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
904 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
905 _("Relaxation to long branches for .arch common_v10_v32\
907 /* Pretend we have twelve bytes for sake of quelling further
909 var_part_size
= 2 + 2 + 2 + 4 + 2;
912 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
913 /* We had a quick immediate branch or a word immediate ba. Now
914 turn it into a dword one. */
915 opcodep
[0] = BA_DWORD_OPCODE
& 255;
916 opcodep
[1] = (BA_DWORD_OPCODE
>> 8) & 255;
917 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, symbolP
,
918 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
922 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
924 long offset
= target_address
- (address_of_var_part
- 2);
926 /* This is mostly a sanity check; useful occurrences (if there
927 really are any) should have been caught in
928 md_estimate_size_before_relax. We can (at least
929 theoretically) stumble over invalid code with odd sizes and
930 .p2aligns within the code, so emit an error if that happens.
931 (The generic relaxation machinery is not fit to check this.) */
934 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
935 _("Complicated LAPC target operand is not\
936 a multiple of two. Use LAPC.D"));
938 /* FIXME: This *is* a sanity check. Remove when done with. */
939 if (offset
> 15*2 || offset
< 0)
940 as_fatal (_("Internal error found in md_convert_frag: offset %ld.\
941 Please report this."),
944 opcodep
[0] |= (offset
/ 2) & 0xf;
949 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
951 md_number_to_chars (opcodep
,
952 LAPC_DWORD_OPCODE
+ (opcodep
[1] & 0xf0) * 256,
954 /* Remember that the reloc is against the position *after* the
955 relocated contents, so we need to adjust to the start of
957 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
958 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
963 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
965 as_fatal (_("internal inconsistency in %s: bdapq no symbol"),
967 opcodep
[0] = S_GET_VALUE (symbolP
);
971 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
972 /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
973 one that uses PC autoincrement. */
974 opcodep
[0] = BDAP_PC_LOW
+ (1 << 4);
976 opcodep
[1] |= BDAP_INCR_HIGH
;
978 as_fatal (_("internal inconsistency in %s: bdap.w with no symbol"),
980 md_number_to_chars (var_partp
, S_GET_VALUE (symbolP
), 2);
984 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
985 /* We had a BDAP 16-bit "word", change the offset to a dword. */
986 opcodep
[0] = BDAP_PC_LOW
+ (2 << 4);
988 opcodep
[1] |= BDAP_INCR_HIGH
;
989 if (fragP
->fr_symbol
== NULL
)
990 md_number_to_chars (var_partp
, fragP
->fr_offset
, 4);
992 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
993 fragP
->fr_offset
, 0, BFD_RELOC_32
);
997 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
998 /* This is the only time we check position and alignment of the
999 placement-tracking frag. */
1000 if (sec
->alignment_power
< 2)
1001 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1002 _("section alignment must be >= 4 bytes to check MULS/MULU safeness"));
1005 /* If the address after the MULS/MULU has alignment which is
1006 that of the section and may be that of a cache-size of the
1007 buggy versions, then the MULS/MULU can be placed badly. */
1008 if ((address_of_var_part
1009 & ((1 << sec
->alignment_power
) - 1) & 31) == 0)
1010 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1011 _("dangerous MULS/MULU location; give it higher alignment"));
1016 BAD_CASE (fragP
->fr_subtype
);
1020 fragP
->fr_fix
+= var_part_size
;
1023 /* Generate a short jump around a secondary jump table.
1024 Used by md_create_long_jump.
1026 This used to be md_create_short_jump, but is now called from
1027 md_create_long_jump instead, when sufficient, since the sizes of the
1028 jumps are the same for pre-v32. */
1031 cris_create_short_jump (char *storep
, addressT from_addr
, addressT to_addr
,
1032 fragS
*fragP ATTRIBUTE_UNUSED
,
1033 symbolS
*to_symbol ATTRIBUTE_UNUSED
)
1037 /* See md_create_long_jump about the comment on the "+ 2". */
1038 long int max_minimal_minus_distance
;
1039 long int max_minimal_plus_distance
;
1042 if (cris_arch
== arch_crisv32
)
1044 max_minimal_minus_distance
= BRANCH_BB_V32
+ 2;
1045 max_minimal_plus_distance
= BRANCH_BF_V32
+ 2;
1046 nop_opcode
= NOP_OPCODE_V32
;
1050 max_minimal_minus_distance
= BRANCH_BB
+ 2;
1051 max_minimal_plus_distance
= BRANCH_BF
+ 2;
1052 nop_opcode
= NOP_OPCODE
;
1055 distance
= to_addr
- from_addr
;
1057 if (max_minimal_minus_distance
<= distance
1058 && distance
<= max_minimal_plus_distance
)
1060 /* Create a "short" short jump: "BA distance - 2". */
1061 storep
[0] = branch_disp (distance
- 2);
1062 storep
[1] = BA_QUICK_HIGH
;
1064 /* A nop for the delay slot. */
1065 md_number_to_chars (storep
+ 2, nop_opcode
, 2);
1067 /* The extra word should be filled with something sane too. Make it
1068 a nop to keep disassembly sane. */
1069 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1073 /* Make it a "long" short jump: "BA (PC+)". */
1074 md_number_to_chars (storep
, BA_PC_INCR_OPCODE
, 2);
1076 /* ".WORD distance - 4". */
1077 md_number_to_chars (storep
+ 2,
1078 (long) (distance
- 4
1079 - (cris_arch
== arch_crisv32
1083 /* A nop for the delay slot. */
1084 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1088 /* Generate a long jump in a secondary jump table.
1090 storep Where to store the jump instruction.
1091 from_addr Address of the jump instruction.
1092 to_addr Destination address of the jump.
1093 fragP Which frag the destination address operand
1095 to_symbol Destination symbol. */
1098 md_create_long_jump (char *storep
, addressT from_addr
, addressT to_addr
,
1099 fragS
*fragP
, symbolS
*to_symbol
)
1103 /* FIXME: What's that "+ 3"? It comes from the magic numbers that
1104 used to be here, it's just translated to the limit macros used in
1105 the relax table. But why + 3? */
1106 long int max_short_minus_distance
1107 = cris_arch
!= arch_crisv32
? BRANCH_WB
+ 3 : BRANCH_WB_V32
+ 3;
1109 long int max_short_plus_distance
1110 = cris_arch
!= arch_crisv32
? BRANCH_WF
+ 3 : BRANCH_WF_V32
+ 3;
1112 /* Bail out for compatibility mode. (It seems it can be implemented,
1113 perhaps with a 10-byte sequence: "move.d NNNN,$pc/$acr", "jump
1114 $acr", "nop"; but doesn't seem worth it at the moment.) */
1115 if (cris_arch
== arch_cris_common_v10_v32
)
1116 as_fatal (_("Out-of-range .word offset handling\
1117 is not implemented for .arch common_v10_v32"));
1119 distance
= to_addr
- from_addr
;
1121 if (max_short_minus_distance
<= distance
1122 && distance
<= max_short_plus_distance
)
1123 /* Then make it a "short" long jump. */
1124 cris_create_short_jump (storep
, from_addr
, to_addr
, fragP
,
1128 /* We have a "long" long jump: "JUMP [PC+]". If CRISv32, always
1129 make it a BA. Else make it an "MOVE [PC=PC+N],P0" if we're supposed
1130 to emit PIC code. */
1131 md_number_to_chars (storep
,
1132 cris_arch
== arch_crisv32
1134 : (pic
? MOVE_PC_INCR_OPCODE_PREFIX
1135 : JUMP_PC_INCR_OPCODE
),
1138 /* Follow with a ".DWORD to_addr", PC-relative for PIC. */
1139 fix_new (fragP
, storep
+ 2 - fragP
->fr_literal
, 4, to_symbol
,
1140 cris_arch
== arch_crisv32
? 6 : 0,
1141 cris_arch
== arch_crisv32
|| pic
? 1 : 0,
1142 cris_arch
== arch_crisv32
|| pic
1143 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
1145 /* Follow it with a "NOP" for CRISv32. */
1146 if (cris_arch
== arch_crisv32
)
1147 md_number_to_chars (storep
+ 6, NOP_OPCODE_V32
, 2);
1149 /* ...and the rest of the move-opcode for pre-v32 PIC. */
1150 md_number_to_chars (storep
+ 6, MOVE_PC_INCR_OPCODE_SUFFIX
, 2);
1154 /* Allocate space for the first piece of an insn, and mark it as the
1155 start of the insn for debug-format use. */
1158 cris_insn_first_word_frag (void)
1160 char *insnp
= frag_more (2);
1162 /* We need to mark the start of the insn by passing dwarf2_emit_insn
1163 the offset from the current fragment position. This must be done
1164 after the first fragment is created but before any other fragments
1165 (fixed or varying) are created. Note that the offset only
1166 corresponds to the "size" of the insn for a fixed-size,
1167 non-expanded insn. */
1168 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
1169 dwarf2_emit_insn (2);
1174 /* Port-specific assembler initialization. */
1179 const char *hashret
= NULL
;
1182 /* Set up a hash table for the instructions. */
1183 op_hash
= hash_new ();
1184 if (op_hash
== NULL
)
1185 as_fatal (_("Virtual memory exhausted"));
1187 /* Enable use of ".if ..asm.arch.cris.v32"
1188 and ".if ..asm.arch.cris.common_v10_v32" and a few others. */
1189 symbol_table_insert (symbol_new ("..asm.arch.cris.v32", absolute_section
,
1190 (cris_arch
== arch_crisv32
),
1191 &zero_address_frag
));
1192 symbol_table_insert (symbol_new ("..asm.arch.cris.v10", absolute_section
,
1193 (cris_arch
== arch_crisv10
),
1194 &zero_address_frag
));
1195 symbol_table_insert (symbol_new ("..asm.arch.cris.common_v10_v32",
1197 (cris_arch
== arch_cris_common_v10_v32
),
1198 &zero_address_frag
));
1199 symbol_table_insert (symbol_new ("..asm.arch.cris.any_v0_v10",
1201 (cris_arch
== arch_cris_any_v0_v10
),
1202 &zero_address_frag
));
1204 while (cris_opcodes
[i
].name
!= NULL
)
1206 const char *name
= cris_opcodes
[i
].name
;
1208 if (! cris_insn_ver_valid_for_arch (cris_opcodes
[i
].applicable_version
,
1215 /* Need to cast to get rid of "const". FIXME: Fix hash_insert instead. */
1216 hashret
= hash_insert (op_hash
, name
, (void *) &cris_opcodes
[i
]);
1218 if (hashret
!= NULL
&& *hashret
!= '\0')
1219 as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes
[i
].name
,
1220 *hashret
== 0 ? _("(unknown reason)") : hashret
);
1223 if (cris_opcodes
[i
].match
& cris_opcodes
[i
].lose
)
1224 as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes
[i
].name
,
1225 cris_opcodes
[i
].args
);
1229 while (cris_opcodes
[i
].name
!= NULL
1230 && strcmp (cris_opcodes
[i
].name
, name
) == 0);
1234 /* Assemble a source line. */
1237 md_assemble (char *str
)
1239 struct cris_instruction output_instruction
;
1240 struct cris_prefix prefix
;
1246 /* Do the low-level grunt - assemble to bits and split up into a prefix
1247 and ordinary insn. */
1248 cris_process_instruction (str
, &output_instruction
, &prefix
);
1250 /* Handle any prefixes to the instruction. */
1251 switch (prefix
.kind
)
1256 /* When the expression is unknown for a BDAP, it can need 0, 2 or 4
1257 extra bytes, so we handle it separately. */
1258 case PREFIX_BDAP_IMM
:
1259 /* We only do it if the relocation is unspecified, i.e. not a PIC or TLS
1261 if (prefix
.reloc
== BFD_RELOC_NONE
)
1263 gen_bdap (prefix
.base_reg_number
, &prefix
.expr
);
1270 opcodep
= cris_insn_first_word_frag ();
1272 /* Output the prefix opcode. */
1273 md_number_to_chars (opcodep
, (long) prefix
.opcode
, 2);
1275 /* Having a specified reloc only happens for DIP and for BDAP with
1276 PIC or TLS operands, but it is ok to drop through here for the other
1277 prefixes as they can have no relocs specified. */
1278 if (prefix
.reloc
!= BFD_RELOC_NONE
)
1280 unsigned int relocsize
1281 = (prefix
.kind
== PREFIX_DIP
1282 ? 4 : cris_get_specified_reloc_size (prefix
.reloc
));
1284 p
= frag_more (relocsize
);
1285 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
), relocsize
,
1286 &prefix
.expr
, 0, prefix
.reloc
);
1291 opcodep
= cris_insn_first_word_frag ();
1293 /* Output the prefix opcode. Being a "push", we add the negative
1294 size of the register to "sp". */
1295 if (output_instruction
.spec_reg
!= NULL
)
1297 /* Special register. */
1298 opcodep
[0] = -output_instruction
.spec_reg
->reg_size
;
1302 /* General register. */
1305 opcodep
[1] = (REG_SP
<< 4) + (BDAP_QUICK_OPCODE
>> 8);
1309 BAD_CASE (prefix
.kind
);
1312 /* If we only had a prefix insn, we're done. */
1313 if (output_instruction
.insn_type
== CRIS_INSN_NONE
)
1316 /* Done with the prefix. Continue with the main instruction. */
1317 if (prefix
.kind
== PREFIX_NONE
)
1318 opcodep
= cris_insn_first_word_frag ();
1320 opcodep
= frag_more (2);
1322 /* Output the instruction opcode. */
1323 md_number_to_chars (opcodep
, (long) (output_instruction
.opcode
), 2);
1325 /* Output the symbol-dependent instruction stuff. */
1326 if (output_instruction
.insn_type
== CRIS_INSN_BRANCH
)
1328 segT to_seg
= absolute_section
;
1329 int is_undefined
= 0;
1332 if (output_instruction
.expr
.X_op
!= O_constant
)
1334 to_seg
= S_GET_SEGMENT (output_instruction
.expr
.X_add_symbol
);
1336 if (to_seg
== undefined_section
)
1340 if (to_seg
== now_seg
|| is_undefined
1341 /* In CRISv32, there *is* a 32-bit absolute branch, so don't
1342 emit the 12-byte sequence for known symbols in other
1344 || (cris_arch
== arch_crisv32
1345 && output_instruction
.opcode
== BA_QUICK_OPCODE
))
1347 /* Handle complex expressions. */
1349 = (SIMPLE_EXPR (&output_instruction
.expr
)
1350 ? output_instruction
.expr
.X_add_number
1353 = (SIMPLE_EXPR (&output_instruction
.expr
)
1354 ? output_instruction
.expr
.X_add_symbol
1355 : make_expr_symbol (&output_instruction
.expr
));
1357 /* If is_undefined, the expression may still become now_seg.
1358 That case is handled by md_estimate_size_before_relax. */
1359 length_code
= to_seg
== now_seg
? STATE_BYTE
: STATE_UNDF
;
1361 /* Make room for max twelve bytes of variable length for v32 mode
1362 or PIC, ten for v10 and older. */
1363 frag_var (rs_machine_dependent
,
1364 (cris_arch
== arch_crisv32
1365 || cris_arch
== arch_cris_common_v10_v32
1366 || pic
) ? 12 : 10, 0,
1367 ENCODE_RELAX (cris_arch
== arch_crisv32
1368 ? (output_instruction
.opcode
1370 ? STATE_ABS_BRANCH_V32
1371 : STATE_COND_BRANCH_V32
)
1372 : (cris_arch
== arch_cris_common_v10_v32
1373 ? STATE_COND_BRANCH_COMMON
1374 : (pic
? STATE_COND_BRANCH_PIC
1375 : STATE_COND_BRANCH
)),
1377 sym
, addvalue
, opcodep
);
1381 /* We have: to_seg != now_seg && to_seg != undefined_section.
1382 This means it is a branch to a known symbol in another
1383 section, perhaps an absolute address. Emit a 32-bit branch. */
1385 = frag_more ((cris_arch
== arch_crisv32
1386 || cris_arch
== arch_cris_common_v10_v32
1390 gen_cond_branch_32 (opcodep
, cond_jump
, frag_now
,
1391 output_instruction
.expr
.X_add_symbol
,
1393 output_instruction
.expr
.X_add_number
);
1396 else if (output_instruction
.insn_type
== CRIS_INSN_MUL
1397 && err_for_dangerous_mul_placement
)
1398 /* Create a frag which which we track the location of the mul insn
1399 (in the last two bytes before the mul-frag). */
1400 frag_variant (rs_machine_dependent
, 0, 0,
1401 ENCODE_RELAX (STATE_MUL
, STATE_BYTE
),
1405 if (output_instruction
.imm_oprnd_size
> 0)
1407 /* The instruction has an immediate operand. */
1408 enum bfd_reloc_code_real reloc
= BFD_RELOC_NONE
;
1410 switch (output_instruction
.imm_oprnd_size
)
1412 /* Any byte-size immediate constants are treated as
1413 word-size. FIXME: Thus overflow check does not work
1417 /* Note that size-check for the explicit reloc has already
1418 been done when we get here. */
1419 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1420 reloc
= output_instruction
.reloc
;
1422 reloc
= BFD_RELOC_16
;
1426 /* Allow a relocation specified in the operand. */
1427 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1428 reloc
= output_instruction
.reloc
;
1430 reloc
= BFD_RELOC_32
;
1434 BAD_CASE (output_instruction
.imm_oprnd_size
);
1437 p
= frag_more (output_instruction
.imm_oprnd_size
);
1438 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
),
1439 output_instruction
.imm_oprnd_size
,
1440 &output_instruction
.expr
,
1441 reloc
== BFD_RELOC_32_PCREL
1442 || reloc
== BFD_RELOC_16_PCREL
1443 || reloc
== BFD_RELOC_8_PCREL
, reloc
);
1445 else if (output_instruction
.reloc
== BFD_RELOC_CRIS_LAPCQ_OFFSET
1446 && output_instruction
.expr
.X_md
!= 0)
1448 /* Handle complex expressions. */
1450 = (output_instruction
.expr
.X_op_symbol
!= NULL
1451 ? 0 : output_instruction
.expr
.X_add_number
);
1453 = (output_instruction
.expr
.X_op_symbol
!= NULL
1454 ? make_expr_symbol (&output_instruction
.expr
)
1455 : output_instruction
.expr
.X_add_symbol
);
1457 /* This is a relaxing construct, so we need a frag_var rather
1458 than the fix_new_exp call below. */
1459 frag_var (rs_machine_dependent
,
1461 ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
),
1462 sym
, addvalue
, opcodep
);
1464 else if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1466 /* An immediate operand that has a relocation and needs to be
1467 processed further. */
1469 /* It is important to use fix_new_exp here and everywhere else
1470 (and not fix_new), as fix_new_exp can handle "difference
1471 expressions" - where the expression contains a difference of
1472 two symbols in the same segment. */
1473 fix_new_exp (frag_now
, (opcodep
- frag_now
->fr_literal
), 2,
1474 &output_instruction
.expr
,
1475 output_instruction
.reloc
== BFD_RELOC_32_PCREL
1476 || output_instruction
.reloc
== BFD_RELOC_16_PCREL
1477 || output_instruction
.reloc
== BFD_RELOC_8_PCREL
1478 || (output_instruction
.reloc
1479 == BFD_RELOC_CRIS_LAPCQ_OFFSET
),
1480 output_instruction
.reloc
);
1485 /* Low level text-to-bits assembly. */
1488 cris_process_instruction (char *insn_text
, struct cris_instruction
*out_insnp
,
1489 struct cris_prefix
*prefixp
)
1492 char modified_char
= 0;
1494 struct cris_opcode
*instruction
;
1501 /* Reset these fields to a harmless state in case we need to return in
1503 prefixp
->kind
= PREFIX_NONE
;
1504 prefixp
->reloc
= BFD_RELOC_NONE
;
1505 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1506 out_insnp
->imm_oprnd_size
= 0;
1508 /* Find the end of the opcode mnemonic. We assume (true in 2.9.1)
1509 that the caller has translated the opcode to lower-case, up to the
1510 first non-letter. */
1511 for (operands
= insn_text
; ISLOWER (*operands
); ++operands
)
1514 /* Terminate the opcode after letters, but save the character there if
1515 it was of significance. */
1522 /* Put back the modified character later. */
1523 modified_char
= *operands
;
1527 /* Consume the character after the mnemonic
1528 and replace it with '\0'. */
1533 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1537 /* Find the instruction. */
1538 instruction
= (struct cris_opcode
*) hash_find (op_hash
, insn_text
);
1539 if (instruction
== NULL
)
1541 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1545 /* Put back the modified character. */
1546 switch (modified_char
)
1552 *--operands
= modified_char
;
1555 /* Try to match an opcode table slot. */
1556 for (s
= operands
;;)
1560 /* Initialize *prefixp, perhaps after being modified for a
1562 prefixp
->kind
= PREFIX_NONE
;
1563 prefixp
->reloc
= BFD_RELOC_NONE
;
1565 /* Initialize *out_insnp. */
1566 memset (out_insnp
, 0, sizeof (*out_insnp
));
1567 out_insnp
->opcode
= instruction
->match
;
1568 out_insnp
->reloc
= BFD_RELOC_NONE
;
1569 out_insnp
->insn_type
= CRIS_INSN_NORMAL
;
1570 out_insnp
->imm_oprnd_size
= 0;
1574 /* Build the opcode, checking as we go to make sure that the
1576 for (args
= instruction
->args
;; ++args
)
1581 /* If we've come to the end of arguments, we're done. */
1587 /* Non-matcher character for disassembly.
1595 /* These must match exactly. */
1601 /* "ACR", case-insensitive.
1602 Handle a sometimes-mandatory dollar sign as register
1604 if (*s
== REGISTER_PREFIX_CHAR
)
1606 else if (demand_register_prefix
)
1609 if ((*s
++ != 'a' && s
[-1] != 'A')
1610 || (*s
++ != 'c' && s
[-1] != 'C')
1611 || (*s
++ != 'r' && s
[-1] != 'R'))
1616 /* This is not really an operand, but causes a "BDAP
1617 -size,SP" prefix to be output, for PUSH instructions. */
1618 prefixp
->kind
= PREFIX_PUSH
;
1622 /* This letter marks an operand that should not be matched
1623 in the assembler. It is a branch with 16-bit
1624 displacement. The assembler will create them from the
1625 8-bit flavor when necessary. The assembler does not
1626 support the [rN+] operand, as the [r15+] that is
1627 generated for 16-bit displacements. */
1631 /* A 5-bit unsigned immediate in bits <4:0>. */
1632 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1636 if (out_insnp
->expr
.X_op
== O_constant
1637 && (out_insnp
->expr
.X_add_number
< 0
1638 || out_insnp
->expr
.X_add_number
> 31))
1639 as_bad (_("Immediate value not in 5 bit unsigned range: %ld"),
1640 out_insnp
->expr
.X_add_number
);
1642 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_5
;
1647 /* A 4-bit unsigned immediate in bits <3:0>. */
1648 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1652 if (out_insnp
->expr
.X_op
== O_constant
1653 && (out_insnp
->expr
.X_add_number
< 0
1654 || out_insnp
->expr
.X_add_number
> 15))
1655 as_bad (_("Immediate value not in 4 bit unsigned range: %ld"),
1656 out_insnp
->expr
.X_add_number
);
1658 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_4
;
1662 /* For 'd', check for an optional ".d" or ".D" at the
1663 start of the operands, followed by a space character. */
1665 if (modified_char
== '.' && *s
== '.')
1667 if ((s
[1] != 'd' && s
[1] == 'D')
1668 || ! ISSPACE (s
[2]))
1676 /* General register in bits <15:12> and <3:0>. */
1677 if (! get_gen_reg (&s
, ®no
))
1681 out_insnp
->opcode
|= regno
/* << 0 */;
1682 out_insnp
->opcode
|= regno
<< 12;
1687 /* Flags from the condition code register. */
1691 if (! get_flags (&s
, &flags
))
1694 out_insnp
->opcode
|= ((flags
& 0xf0) << 8) | (flags
& 0xf);
1699 /* A 6-bit signed immediate in bits <5:0>. */
1700 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1704 if (out_insnp
->expr
.X_op
== O_constant
1705 && (out_insnp
->expr
.X_add_number
< -32
1706 || out_insnp
->expr
.X_add_number
> 31))
1707 as_bad (_("Immediate value not in 6 bit range: %ld"),
1708 out_insnp
->expr
.X_add_number
);
1709 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_6
;
1714 /* A 6-bit unsigned immediate in bits <5:0>. */
1715 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1719 if (out_insnp
->expr
.X_op
== O_constant
1720 && (out_insnp
->expr
.X_add_number
< 0
1721 || out_insnp
->expr
.X_add_number
> 63))
1722 as_bad (_("Immediate value not in 6 bit unsigned range: %ld"),
1723 out_insnp
->expr
.X_add_number
);
1724 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_6
;
1729 /* A size modifier, B, W or D, to be put in a bit position
1730 suitable for CLEAR instructions (i.e. reflecting a zero
1732 if (! get_bwd_size_modifier (&s
, &size_bits
))
1739 out_insnp
->opcode
|= 0 << 12;
1743 out_insnp
->opcode
|= 4 << 12;
1747 out_insnp
->opcode
|= 8 << 12;
1754 /* A size modifier, B, W or D, to be put in bits <5:4>. */
1755 if (modified_char
!= '.'
1756 || ! get_bwd_size_modifier (&s
, &size_bits
))
1760 out_insnp
->opcode
|= size_bits
<< 4;
1765 /* A branch expression. */
1766 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1770 out_insnp
->insn_type
= CRIS_INSN_BRANCH
;
1775 /* A 8-bit quick BDAP expression, "expr,R". */
1776 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1784 if (!get_gen_reg (&s
, ®no
))
1787 out_insnp
->opcode
|= regno
<< 12;
1788 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_8
;
1792 /* A BDAP expression for any size, "expr,R". */
1793 if (! cris_get_expression (&s
, &prefixp
->expr
))
1802 if (!get_gen_reg (&s
, &prefixp
->base_reg_number
))
1805 /* Since 'O' is used with an explicit bdap, we have no
1806 "real" instruction. */
1807 prefixp
->kind
= PREFIX_BDAP_IMM
;
1809 = BDAP_QUICK_OPCODE
| (prefixp
->base_reg_number
<< 12);
1811 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1816 /* Special register in bits <15:12>. */
1817 if (! get_spec_reg (&s
, &out_insnp
->spec_reg
))
1821 /* Use of some special register names come with a
1822 specific warning. Note that we have no ".cpu type"
1823 pseudo yet, so some of this is just unused
1825 if (out_insnp
->spec_reg
->warning
)
1826 as_warn (out_insnp
->spec_reg
->warning
);
1827 else if (out_insnp
->spec_reg
->applicable_version
1828 == cris_ver_warning
)
1829 /* Others have a generic warning. */
1830 as_warn (_("Unimplemented register `%s' specified"),
1831 out_insnp
->spec_reg
->name
);
1834 |= out_insnp
->spec_reg
->number
<< 12;
1839 /* This character is used in the disassembler to
1840 recognize a prefix instruction to fold into the
1841 addressing mode for the next instruction. It is
1846 /* General register in bits <15:12>. */
1847 if (! get_gen_reg (&s
, ®no
))
1851 out_insnp
->opcode
|= regno
<< 12;
1856 /* General register in bits <3:0>. */
1857 if (! get_gen_reg (&s
, ®no
))
1861 out_insnp
->opcode
|= regno
/* << 0 */;
1866 /* Source operand in bit <10> and a prefix; a 3-operand
1868 if (! get_3op_or_dip_prefix_op (&s
, prefixp
))
1874 /* Source operand in bits <10>, <3:0> and optionally a
1875 prefix; i.e. an indirect operand or an side-effect
1876 prefix (where valid). */
1877 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
, &mode
,
1884 if (prefixp
->kind
!= PREFIX_NONE
)
1886 /* A prefix, so it has the autoincrement bit
1888 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
1892 /* No prefix. The "mode" variable contains bits like
1893 whether or not this is autoincrement mode. */
1894 out_insnp
->opcode
|= (mode
<< 10);
1896 /* If there was a reloc specifier, then it was
1897 attached to the prefix. Note that we can't check
1898 that the reloc size matches, since we don't have
1899 all the operands yet in all cases. */
1900 if (prefixp
->reloc
!= BFD_RELOC_NONE
)
1901 out_insnp
->reloc
= prefixp
->reloc
;
1904 out_insnp
->opcode
|= regno
/* << 0 */ ;
1910 /* Like 's', but immediate operand only. Also do not
1911 modify insn. There are no insns where an explicit reloc
1912 specifier makes sense. */
1913 if (cris_get_expression (&s
, &out_insnp
->expr
))
1921 /* Like 'N', but PC-relative to the start of the insn.
1922 There might be a :PLT to request a PLT entry. */
1923 if (cris_get_expression (&s
, &out_insnp
->expr
))
1926 out_insnp
->reloc
= BFD_RELOC_32_PCREL
;
1928 /* We have to adjust the expression, because that
1929 relocation is to the location *after* the
1930 relocation. So add 2 for the insn and 4 for the
1932 out_insnp
->expr
.X_add_number
+= 6;
1934 /* TLS specifiers do not make sense here. */
1935 if (pic
&& *s
== RELOC_SUFFIX_CHAR
)
1936 cris_get_reloc_suffix (&s
, &out_insnp
->reloc
,
1944 /* Maybe 'u', maybe 'n'. Only for LAPC/LAPCQ. */
1945 if (cris_get_expression (&s
, &out_insnp
->expr
))
1947 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1949 /* Define 1 as relaxing. */
1950 out_insnp
->expr
.X_md
= 1;
1956 /* Four PC-relative bits in <3:0> representing <4:1>:0 of
1957 an offset relative to the beginning of the current
1959 if (cris_get_expression (&s
, &out_insnp
->expr
))
1961 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1963 /* Define 0 as non-relaxing. */
1964 out_insnp
->expr
.X_md
= 0;
1966 /* We have to adjust the expression, because that
1967 relocation is to the location *after* the
1968 insn. So add 2 for the insn. */
1969 out_insnp
->expr
.X_add_number
+= 2;
1975 /* Rs.m in bits <15:12> and <5:4>. */
1976 if (! get_gen_reg (&s
, ®no
)
1977 || ! get_bwd_size_modifier (&s
, &size_bits
))
1981 out_insnp
->opcode
|= (regno
<< 12) | (size_bits
<< 4);
1986 /* Source operand in bits <10>, <3:0> and optionally a
1987 prefix; i.e. an indirect operand or an side-effect
1990 The difference to 's' is that this does not allow an
1991 "immediate" expression. */
1992 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
,
2000 if (prefixp
->kind
!= PREFIX_NONE
)
2002 /* A prefix, and those matched here always have
2003 side-effects (see 's' case). */
2004 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
2008 /* No prefix. The "mode" variable contains bits
2009 like whether or not this is autoincrement
2011 out_insnp
->opcode
|= (mode
<< 10);
2014 out_insnp
->opcode
|= regno
/* << 0 */;
2019 /* Size modifier (B or W) in bit <4>. */
2020 if (! get_bw_size_modifier (&s
, &size_bits
))
2024 out_insnp
->opcode
|= size_bits
<< 4;
2029 if (cris_arch
== arch_crisv32
2030 && get_sup_reg (&s
, ®no
))
2032 out_insnp
->opcode
|= regno
<< 12;
2041 /* We get here when we fail a match above or we found a
2042 complete match. Break out of this loop. */
2046 /* Was it a match or a miss? */
2049 /* If it's just that the args don't match, maybe the next
2050 item in the table is the same opcode but with
2051 matching operands. First skip any invalid ones. */
2052 while (instruction
[1].name
!= NULL
2053 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2054 && ! cris_insn_ver_valid_for_arch (instruction
[1]
2055 .applicable_version
,
2059 if (instruction
[1].name
!= NULL
2060 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2061 && cris_insn_ver_valid_for_arch (instruction
[1]
2062 .applicable_version
,
2065 /* Yep. Restart and try that one instead. */
2072 /* We've come to the end of instructions with this
2073 opcode, so it must be an error. */
2074 as_bad (_("Illegal operands"));
2076 /* As discard_rest_of_line, but without continuing to the
2078 while (!is_end_of_line
[(unsigned char) *input_line_pointer
])
2079 input_line_pointer
++;
2085 /* We have a match. Check if there's anything more to do. */
2088 /* There was an immediate mode operand, so we must check
2089 that it has an appropriate size. */
2090 switch (instruction
->imm_oprnd_size
)
2094 /* Shouldn't happen; this one does not have immediate
2095 operands with different sizes. */
2096 BAD_CASE (instruction
->imm_oprnd_size
);
2100 out_insnp
->imm_oprnd_size
= 4;
2104 if (cris_arch
== arch_crisv32
)
2105 /* All immediate loads of special registers are
2106 32-bit on CRISv32. */
2107 out_insnp
->imm_oprnd_size
= 4;
2109 switch (out_insnp
->spec_reg
->reg_size
)
2112 if (out_insnp
->expr
.X_op
== O_constant
2113 && (out_insnp
->expr
.X_add_number
< -128
2114 || out_insnp
->expr
.X_add_number
> 255))
2115 as_bad (_("Immediate value not in 8 bit range: %ld"),
2116 out_insnp
->expr
.X_add_number
);
2119 /* FIXME: We need an indicator in the instruction
2120 table to pass on, to indicate if we need to check
2121 overflow for a signed or unsigned number. */
2122 if (out_insnp
->expr
.X_op
== O_constant
2123 && (out_insnp
->expr
.X_add_number
< -32768
2124 || out_insnp
->expr
.X_add_number
> 65535))
2125 as_bad (_("Immediate value not in 16 bit range: %ld"),
2126 out_insnp
->expr
.X_add_number
);
2127 out_insnp
->imm_oprnd_size
= 2;
2131 out_insnp
->imm_oprnd_size
= 4;
2135 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2140 case SIZE_FIELD_SIGNED
:
2141 case SIZE_FIELD_UNSIGNED
:
2144 /* FIXME: Find way to pass un/signedness to
2145 caller, and set reloc type instead, postponing
2146 this check until cris_number_to_imm. That
2147 necessarily corrects the reloc type for the
2148 byte case, maybe requiring further changes. */
2150 if (out_insnp
->expr
.X_op
== O_constant
)
2152 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2153 && (out_insnp
->expr
.X_add_number
< -128
2154 || out_insnp
->expr
.X_add_number
> 255))
2155 as_bad (_("Immediate value not in 8 bit range: %ld"),
2156 out_insnp
->expr
.X_add_number
);
2157 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2158 && (out_insnp
->expr
.X_add_number
< -128
2159 || out_insnp
->expr
.X_add_number
> 127))
2160 as_bad (_("Immediate value not in 8 bit signed range: %ld"),
2161 out_insnp
->expr
.X_add_number
);
2162 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2163 && (out_insnp
->expr
.X_add_number
< 0
2164 || out_insnp
->expr
.X_add_number
> 255))
2165 as_bad (_("Immediate value not in 8 bit unsigned range: %ld"),
2166 out_insnp
->expr
.X_add_number
);
2171 if (out_insnp
->expr
.X_op
== O_constant
)
2173 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2174 && (out_insnp
->expr
.X_add_number
< -32768
2175 || out_insnp
->expr
.X_add_number
> 65535))
2176 as_bad (_("Immediate value not in 16 bit range: %ld"),
2177 out_insnp
->expr
.X_add_number
);
2178 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2179 && (out_insnp
->expr
.X_add_number
< -32768
2180 || out_insnp
->expr
.X_add_number
> 32767))
2181 as_bad (_("Immediate value not in 16 bit signed range: %ld"),
2182 out_insnp
->expr
.X_add_number
);
2183 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2184 && (out_insnp
->expr
.X_add_number
< 0
2185 || out_insnp
->expr
.X_add_number
> 65535))
2186 as_bad (_("Immediate value not in 16 bit unsigned range: %ld"),
2187 out_insnp
->expr
.X_add_number
);
2189 out_insnp
->imm_oprnd_size
= 2;
2193 out_insnp
->imm_oprnd_size
= 4;
2197 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2201 /* If there was a relocation specified for the immediate
2202 expression (i.e. it had a PIC or TLS modifier) check that the
2203 size of the relocation matches the size specified by
2205 if (out_insnp
->reloc
!= BFD_RELOC_NONE
2206 && (cris_get_specified_reloc_size (out_insnp
->reloc
)
2207 != (unsigned int) out_insnp
->imm_oprnd_size
))
2208 as_bad (out_insnp
->reloc
== BFD_RELOC_CRIS_32_GD
2209 || out_insnp
->reloc
== BFD_RELOC_CRIS_32_TPREL
2210 || out_insnp
->reloc
== BFD_RELOC_CRIS_16_TPREL
2211 ? _("TLS relocation size does not match operand size")
2212 : _("PIC relocation size does not match operand size"));
2214 else if (instruction
->op
== cris_muls_op
2215 || instruction
->op
== cris_mulu_op
)
2216 out_insnp
->insn_type
= CRIS_INSN_MUL
;
2222 /* Get a B, W, or D size modifier from the string pointed out by *cPP,
2223 which must point to a '.' in front of the modifier. On successful
2224 return, *cPP is advanced to the character following the size
2225 modifier, and is undefined otherwise.
2227 cPP Pointer to pointer to string starting
2228 with the size modifier.
2230 size_bitsp Pointer to variable to contain the size bits on
2233 Return 1 iff a correct size modifier is found, else 0. */
2236 get_bwd_size_modifier (char **cPP
, int *size_bitsp
)
2242 /* Consume the '.'. */
2266 /* Consume the size letter. */
2272 /* Get a B or W size modifier from the string pointed out by *cPP,
2273 which must point to a '.' in front of the modifier. On successful
2274 return, *cPP is advanced to the character following the size
2275 modifier, and is undefined otherwise.
2277 cPP Pointer to pointer to string starting
2278 with the size modifier.
2280 size_bitsp Pointer to variable to contain the size bits on
2283 Return 1 iff a correct size modifier is found, else 0. */
2286 get_bw_size_modifier (char **cPP
, int *size_bitsp
)
2292 /* Consume the '.'. */
2311 /* Consume the size letter. */
2317 /* Get a general register from the string pointed out by *cPP. The
2318 variable *cPP is advanced to the character following the general
2319 register name on a successful return, and has its initial position
2322 cPP Pointer to pointer to string, beginning with a general
2325 regnop Pointer to int containing the register number.
2327 Return 1 iff a correct general register designator is found,
2331 get_gen_reg (char **cPP
, int *regnop
)
2336 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2337 if (**cPP
== REGISTER_PREFIX_CHAR
)
2339 else if (demand_register_prefix
)
2346 /* "P" as in "PC"? Consume the "P". */
2349 if ((**cPP
== 'C' || **cPP
== 'c')
2350 && ! ISALNUM ((*cPP
)[1])
2351 /* Here's a little twist: For v32 and the compatibility mode,
2352 we only recognize PC as a register number if there's '+]'
2353 after. We don't consume that, but the presence can only be
2354 valid after a register in a post-increment context, which
2355 is also the only valid context for PC as a register for
2356 v32. Not that it's used very often, but saying "MOVE.D
2357 [PC+],R5" should remain valid. It's not supported for
2358 jump-type insns or other insns with no [Rn+] mode, though. */
2359 && ((cris_arch
!= arch_crisv32
2360 && cris_arch
!= arch_cris_common_v10_v32
)
2361 || ((*cPP
)[1] == '+' && (*cPP
)[2] == ']')))
2363 /* It's "PC": consume the "c" and we're done. */
2370 /* Like with PC, we recognize ACR, but only if it's *not* followed
2371 by '+', and only for v32. */
2374 if (cris_arch
!= arch_crisv32
2375 || ((*cPP
)[1] != 'c' && (*cPP
)[1] != 'C')
2376 || ((*cPP
)[2] != 'r' && (*cPP
)[2] != 'R')
2377 || ISALNUM ((*cPP
)[3])
2378 || (*cPP
)[3] == '+')
2386 /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */
2389 if (ISDIGIT (**cPP
))
2391 /* It's r[0-9]. Consume and check the next digit. */
2392 *regnop
= **cPP
- '0';
2395 if (! ISALNUM (**cPP
))
2397 /* No more digits, we're done. */
2402 /* One more digit. Consume and add. */
2403 *regnop
= *regnop
* 10 + (**cPP
- '0');
2405 /* We need to check for a valid register number; Rn,
2406 0 <= n <= MAX_REG. */
2407 if (*regnop
<= MAX_REG
)
2409 /* Consume second digit. */
2419 /* "S" as in "SP"? Consume the "S". */
2421 if (**cPP
== 'P' || **cPP
== 'p')
2423 /* It's "SP": consume the "p" and we're done. */
2431 /* Just here to silence compilation warnings. */
2435 /* We get here if we fail. Restore the pointer. */
2440 /* Get a special register from the string pointed out by *cPP. The
2441 variable *cPP is advanced to the character following the special
2442 register name if one is found, and retains its original position
2445 cPP Pointer to pointer to string starting with a special register
2448 sregpp Pointer to Pointer to struct spec_reg, where a pointer to the
2449 register description will be stored.
2451 Return 1 iff a correct special register name is found. */
2454 get_spec_reg (char **cPP
, const struct cris_spec_reg
**sregpp
)
2458 char *name_begin
= *cPP
;
2460 const struct cris_spec_reg
*sregp
;
2462 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2463 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2465 else if (demand_register_prefix
)
2468 /* Loop over all special registers. */
2469 for (sregp
= cris_spec_regs
; sregp
->name
!= NULL
; sregp
++)
2471 /* Start over from beginning of the supposed name. */
2475 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2481 /* For a match, we must have consumed the name in the table, and we
2482 must be outside what could be part of a name. Assume here that a
2483 test for alphanumerics is sufficient for a name test. */
2484 if (*s2
== 0 && ! ISALNUM (*s1
)
2485 && cris_insn_ver_valid_for_arch (sregp
->applicable_version
,
2488 /* We have a match. Update the pointer and be done. */
2495 /* If we got here, we did not find any name. */
2499 /* Get a support register from the string pointed out by *cPP. The
2500 variable *cPP is advanced to the character following the support-
2501 register name if one is found, and retains its original position
2504 cPP Pointer to pointer to string starting with a support-register
2507 sregpp Pointer to int containing the register number.
2509 Return 1 iff a correct support-register name is found. */
2512 get_sup_reg (char **cPP
, int *regnop
)
2516 char *name_begin
= *cPP
;
2518 const struct cris_support_reg
*sregp
;
2520 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2521 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2523 else if (demand_register_prefix
)
2526 /* Loop over all support-registers. */
2527 for (sregp
= cris_support_regs
; sregp
->name
!= NULL
; sregp
++)
2529 /* Start over from beginning of the supposed name. */
2533 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2539 /* For a match, we must have consumed the name in the table, and we
2540 must be outside what could be part of a name. Assume here that a
2541 test for alphanumerics is sufficient for a name test. */
2542 if (*s2
== 0 && ! ISALNUM (*s1
))
2544 /* We have a match. Update the pointer and be done. */
2546 *regnop
= sregp
->number
;
2551 /* If we got here, we did not find any name. */
2555 /* Get an unprefixed or side-effect-prefix operand from the string pointed
2556 out by *cPP. The pointer *cPP is advanced to the character following
2557 the indirect operand if we have success, else it contains an undefined
2560 cPP Pointer to pointer to string beginning with the first
2561 character of the supposed operand.
2563 prefixp Pointer to structure containing an optional instruction
2566 is_autoincp Pointer to int indicating the indirect or autoincrement
2569 src_regnop Pointer to int containing the source register number in
2572 imm_foundp Pointer to an int indicating if an immediate expression
2575 imm_exprP Pointer to a structure containing an immediate
2576 expression, if success and if *imm_foundp is nonzero.
2578 Return 1 iff a correct indirect operand is found. */
2581 get_autoinc_prefix_or_indir_op (char **cPP
, struct cris_prefix
*prefixp
,
2582 int *is_autoincp
, int *src_regnop
,
2583 int *imm_foundp
, expressionS
*imm_exprP
)
2585 /* Assume there was no immediate mode expression. */
2590 /* So this operand is one of:
2592 Autoincrement: [rN+]
2593 Indexed with assign: [rN=rM+rO.S]
2594 Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s]
2596 Either way, consume the '['. */
2599 /* Get the rN register. */
2600 if (! get_gen_reg (cPP
, src_regnop
))
2601 /* If there was no register, then this cannot match. */
2605 /* We got the register, now check the next character. */
2609 /* Indirect mode. We're done here. */
2610 prefixp
->kind
= PREFIX_NONE
;
2615 /* This must be an auto-increment mode, if there's a
2617 prefixp
->kind
= PREFIX_NONE
;
2620 /* We consume this character and break out to check the
2626 /* This must be indexed with assign, or offset with assign
2627 to match. Not supported for crisv32 or in
2628 compatibility mode. */
2629 if (cris_arch
== arch_crisv32
2630 || cris_arch
== arch_cris_common_v10_v32
)
2635 /* Either way, the next thing must be a register. */
2636 if (! get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2637 /* No register, no match. */
2641 /* We've consumed "[rN=rM", so we must be looking at
2642 "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or
2646 int index_reg_number
;
2652 /* This must be [rx=ry+[rz].s] or
2653 [rx=ry+[rz+].s] or no match. We must be
2654 looking at rz after consuming the '['. */
2657 if (!get_gen_reg (cPP
, &index_reg_number
))
2660 prefixp
->kind
= PREFIX_BDAP
;
2662 = (BDAP_INDIR_OPCODE
2663 + (prefixp
->base_reg_number
<< 12)
2664 + index_reg_number
);
2668 /* We've seen "[rx=ry+[rz+" here, so now we
2669 know that there must be "].s]" left to
2672 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2675 /* If it wasn't autoincrement, we don't need to
2678 /* Check the next-to-last ']'. */
2684 /* Check the ".s" modifier. */
2685 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2688 prefixp
->opcode
|= size_bits
<< 4;
2690 /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s.
2691 We break out to check the final ']'. */
2694 /* It wasn't an indirection. Check if it's a
2696 else if (get_gen_reg (cPP
, &index_reg_number
))
2700 /* Indexed with assign mode: "[rN+rM.S]". */
2701 prefixp
->kind
= PREFIX_BIAP
;
2703 = (BIAP_OPCODE
+ (index_reg_number
<< 12)
2704 + prefixp
->base_reg_number
/* << 0 */);
2706 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2707 /* Size missing, this isn't a match. */
2711 /* Size found, break out to check the
2713 prefixp
->opcode
|= size_bits
<< 4;
2717 /* Not a register. Then this must be "[rN+I]". */
2718 else if (cris_get_expression (cPP
, &prefixp
->expr
))
2720 /* We've got offset with assign mode. Fill
2721 in the blanks and break out to match the
2723 prefixp
->kind
= PREFIX_BDAP_IMM
;
2725 /* We tentatively put an opcode corresponding to
2726 a 32-bit operand here, although it may be
2727 relaxed when there's no relocation
2728 specifier for the operand. */
2730 = (BDAP_INDIR_OPCODE
2731 | (prefixp
->base_reg_number
<< 12)
2732 | (AUTOINCR_BIT
<< 8)
2734 | REG_PC
/* << 0 */);
2736 /* This can have a PIC suffix, specifying reloc
2738 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2740 unsigned int relocsize
;
2742 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
,
2745 /* Tweak the size of the immediate operand
2746 in the prefix opcode if it isn't what we
2749 = cris_get_specified_reloc_size (prefixp
->reloc
);
2752 = ((prefixp
->opcode
& ~(3 << 4))
2753 | ((relocsize
>> 1) << 4));
2758 /* Neither register nor expression found, so
2759 this can't be a match. */
2762 /* Not "[rN+" but perhaps "[rN-"? */
2763 else if (**cPP
== '-')
2765 /* We must have an offset with assign mode. */
2766 if (! cris_get_expression (cPP
, &prefixp
->expr
))
2767 /* No expression, no match. */
2771 /* We've got offset with assign mode. Fill
2772 in the blanks and break out to match the
2775 Note that we don't allow a relocation
2776 suffix for an operand with a minus
2778 prefixp
->kind
= PREFIX_BDAP_IMM
;
2783 /* Neither '+' nor '-' after "[rN=rM". Lose. */
2787 /* Neither ']' nor '+' nor '=' after "[rN". Lose. */
2792 /* When we get here, we have a match and will just check the closing
2793 ']'. We can still fail though. */
2798 /* Don't forget to consume the final ']'.
2799 Then return in glory. */
2804 /* No indirection. Perhaps a constant? */
2805 else if (cris_get_expression (cPP
, imm_exprP
))
2807 /* Expression found, this is immediate mode. */
2808 prefixp
->kind
= PREFIX_NONE
;
2810 *src_regnop
= REG_PC
;
2813 /* This can have a PIC suffix, specifying reloc type to use. The
2814 caller must check that the reloc size matches the operand size. */
2815 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2816 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, imm_exprP
);
2821 /* No luck today. */
2825 /* This function gets an indirect operand in a three-address operand
2826 combination from the string pointed out by *cPP. The pointer *cPP is
2827 advanced to the character following the indirect operand on success, or
2828 has an unspecified value on failure.
2830 cPP Pointer to pointer to string beginning
2833 prefixp Pointer to structure containing an
2836 Returns 1 iff a correct indirect operand is found. */
2839 get_3op_or_dip_prefix_op (char **cPP
, struct cris_prefix
*prefixp
)
2844 /* We must have a '[' or it's a clean failure. */
2847 /* Eat the first '['. */
2852 /* A second '[', so this must be double-indirect mode. */
2854 prefixp
->kind
= PREFIX_DIP
;
2855 prefixp
->opcode
= DIP_OPCODE
;
2857 /* Get the register or fail entirely. */
2858 if (! get_gen_reg (cPP
, ®_number
))
2862 prefixp
->opcode
|= reg_number
/* << 0 */ ;
2865 /* Since we found a '+', this must be double-indirect
2866 autoincrement mode. */
2868 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2871 /* There's nothing particular to do, if this was a
2872 double-indirect *without* autoincrement. */
2875 /* Check the first ']'. The second one is checked at the end. */
2879 /* Eat the first ']', so we'll be looking at a second ']'. */
2882 /* No second '['. Then we should have a register here, making
2884 else if (get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2886 /* This must be indexed or offset mode: "[rN+I]" or
2887 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */
2890 int index_reg_number
;
2896 /* This is "[rx+["... Expect a register next. */
2900 if (!get_gen_reg (cPP
, &index_reg_number
))
2903 prefixp
->kind
= PREFIX_BDAP
;
2905 = (BDAP_INDIR_OPCODE
2906 + (prefixp
->base_reg_number
<< 12)
2907 + index_reg_number
);
2909 /* We've seen "[rx+[ry", so check if this is
2913 /* Yep, now at "[rx+[ry+". */
2915 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2917 /* If it wasn't autoincrement, we don't need to
2920 /* Check a first closing ']': "[rx+[ry]" or
2926 /* Now expect a size modifier ".S". */
2927 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2930 prefixp
->opcode
|= size_bits
<< 4;
2932 /* Ok, all interesting stuff has been seen:
2933 "[rx+[ry+].S" or "[rx+[ry].S". We only need to
2934 expect a final ']', which we'll do in a common
2937 /* Seen "[rN+", but not a '[', so check if we have a
2939 else if (get_gen_reg (cPP
, &index_reg_number
))
2941 /* This is indexed mode: "[rN+rM.S]" or
2944 prefixp
->kind
= PREFIX_BIAP
;
2947 | prefixp
->base_reg_number
/* << 0 */
2948 | (index_reg_number
<< 12));
2950 /* Consume the ".S". */
2951 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2952 /* Missing size, so fail. */
2955 /* Size found. Add that piece and drop down to
2956 the common checking of the closing ']'. */
2957 prefixp
->opcode
|= size_bits
<< 4;
2959 /* Seen "[rN+", but not a '[' or a register, so then
2960 it must be a constant "I".
2962 As a quality of implementation improvement, we check for a
2963 closing ']', like in an erroneous "[rN+]". If we don't,
2964 the expression parser will emit a confusing "bad
2965 expression" when it sees the ']', probably because it
2966 doesn't like seeing no expression. */
2967 else if (**cPP
!= ']' && cris_get_expression (cPP
, &prefixp
->expr
))
2969 /* Expression found, so fill in the bits of offset
2970 mode and drop down to check the closing ']'. */
2971 prefixp
->kind
= PREFIX_BDAP_IMM
;
2973 /* We tentatively put an opcode corresponding to a 32-bit
2974 operand here, although it may be relaxed when there's no
2975 PIC specifier for the operand. */
2977 = (BDAP_INDIR_OPCODE
2978 | (prefixp
->base_reg_number
<< 12)
2979 | (AUTOINCR_BIT
<< 8)
2981 | REG_PC
/* << 0 */);
2983 /* This can have a PIC suffix, specifying reloc type to use. */
2984 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2986 unsigned int relocsize
;
2988 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, &prefixp
->expr
);
2990 /* Tweak the size of the immediate operand in the prefix
2991 opcode if it isn't what we set. */
2992 relocsize
= cris_get_specified_reloc_size (prefixp
->reloc
);
2995 = ((prefixp
->opcode
& ~(3 << 4))
2996 | ((relocsize
>> 1) << 4));
3000 /* Nothing valid here: lose. */
3003 /* Seen "[rN" but no '+', so check if it's a '-'. */
3004 else if (**cPP
== '-')
3006 /* Yep, we must have offset mode. */
3007 if (! cris_get_expression (cPP
, &prefixp
->expr
))
3008 /* No expression, so we lose. */
3012 /* Expression found to make this offset mode, so
3013 fill those bits and drop down to check the
3016 Note that we don't allow a PIC suffix for
3017 an operand with a minus sign like this. */
3018 prefixp
->kind
= PREFIX_BDAP_IMM
;
3023 /* We've seen "[rN", but not '+' or '-'; rather a ']'.
3024 Hmm. Normally this is a simple indirect mode that we
3025 shouldn't match, but if we expect ']', then we have a
3026 zero offset, so it can be a three-address-operand,
3027 like "[rN],rO,rP", thus offset mode.
3029 Don't eat the ']', that will be done in the closing
3031 prefixp
->expr
.X_op
= O_constant
;
3032 prefixp
->expr
.X_add_number
= 0;
3033 prefixp
->expr
.X_add_symbol
= NULL
;
3034 prefixp
->expr
.X_op_symbol
= NULL
;
3035 prefixp
->kind
= PREFIX_BDAP_IMM
;
3038 /* A '[', but no second '[', and no register. Check if we
3039 have an expression, making this "[I]" for a double-indirect
3041 else if (cris_get_expression (cPP
, &prefixp
->expr
))
3043 /* Expression found, the so called absolute mode for a
3044 double-indirect prefix on PC. */
3045 prefixp
->kind
= PREFIX_DIP
;
3046 prefixp
->opcode
= DIP_OPCODE
| (AUTOINCR_BIT
<< 8) | REG_PC
;
3047 prefixp
->reloc
= BFD_RELOC_32
;
3050 /* Neither '[' nor register nor expression. We lose. */
3053 /* We get here as a closing ceremony to a successful match. We just
3054 need to check the closing ']'. */
3056 /* Oops. Close but no air-polluter. */
3059 /* Don't forget to consume that ']', before returning in glory. */
3064 /* Get an expression from the string pointed out by *cPP.
3065 The pointer *cPP is advanced to the character following the expression
3066 on a success, or retains its original value otherwise.
3068 cPP Pointer to pointer to string beginning with the expression.
3070 exprP Pointer to structure containing the expression.
3072 Return 1 iff a correct expression is found. */
3075 cris_get_expression (char **cPP
, expressionS
*exprP
)
3077 char *saved_input_line_pointer
;
3080 /* The "expression" function expects to find an expression at the
3081 global variable input_line_pointer, so we have to save it to give
3082 the impression that we don't fiddle with global variables. */
3083 saved_input_line_pointer
= input_line_pointer
;
3084 input_line_pointer
= *cPP
;
3086 /* Avoid a common error, confusing addressing modes. Beware that the
3087 call to expression below does not signal that error; it treats []
3088 as parentheses, unless #define NEED_INDEX_OPERATOR in which case it
3089 gives them other confusing semantics rather than plain outlawing
3090 them, which is what we want. */
3091 if (*input_line_pointer
== '[')
3093 input_line_pointer
= saved_input_line_pointer
;
3097 exp
= expression (exprP
);
3098 if (exprP
->X_op
== O_illegal
|| exprP
->X_op
== O_absent
)
3100 input_line_pointer
= saved_input_line_pointer
;
3104 /* Everything seems to be fine, just restore the global
3105 input_line_pointer and say we're successful. */
3106 *cPP
= input_line_pointer
;
3107 input_line_pointer
= saved_input_line_pointer
;
3111 /* Get a sequence of flag characters from *spp. The pointer *cPP is
3112 advanced to the character following the expression. The flag
3113 characters are consecutive, no commas or spaces.
3115 cPP Pointer to pointer to string beginning with the expression.
3117 flagp Pointer to int to return the flags expression.
3119 Return 1 iff a correct flags expression is found. */
3122 get_flags (char **cPP
, int *flagsp
)
3130 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3138 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3146 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3154 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3162 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3170 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3207 /* We consider this successful if we stop at a comma or
3208 whitespace. Anything else, and we consider it a failure. */
3211 && ! ISSPACE (**cPP
))
3217 /* Don't forget to consume each flag character. */
3222 /* Generate code and fixes for a BDAP prefix.
3223 For v32, this handles ADDOQ because thankfully the opcodes are the
3226 base_regno Int containing the base register number.
3228 exprP Pointer to structure containing the offset expression. */
3231 gen_bdap (int base_regno
, expressionS
*exprP
)
3233 unsigned int opcode
;
3236 /* Put out the prefix opcode; assume quick immediate mode at first. */
3237 opcode
= BDAP_QUICK_OPCODE
| (base_regno
<< 12);
3238 opcodep
= cris_insn_first_word_frag ();
3239 md_number_to_chars (opcodep
, opcode
, 2);
3241 if (exprP
->X_op
== O_constant
)
3243 /* We have an absolute expression that we know the size of right
3248 value
= exprP
->X_add_number
;
3249 if (value
< -32768 || value
> 32767)
3250 /* Outside range for a "word", make it a dword. */
3253 /* Assume "word" size. */
3256 /* If this is a signed-byte value, we can fit it into the prefix
3258 if (value
>= -128 && value
<= 127)
3262 /* This is a word or dword displacement, which will be put in a
3263 word or dword after the prefix. */
3266 opcodep
[0] = BDAP_PC_LOW
+ (size
<< 4);
3268 opcodep
[1] |= BDAP_INCR_HIGH
;
3269 p
= frag_more (1 << size
);
3270 md_number_to_chars (p
, value
, 1 << size
);
3275 /* Handle complex expressions. */
3277 = SIMPLE_EXPR (exprP
) ? exprP
->X_add_number
: 0;
3279 = (SIMPLE_EXPR (exprP
)
3280 ? exprP
->X_add_symbol
: make_expr_symbol (exprP
));
3282 /* The expression is not defined yet but may become absolute. We
3283 make it a relocation to be relaxed. */
3284 frag_var (rs_machine_dependent
, 4, 0,
3285 ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
),
3286 sym
, addvalue
, opcodep
);
3290 /* Encode a branch displacement in the range -256..254 into the form used
3291 by CRIS conditional branch instructions.
3293 offset The displacement value in bytes. */
3296 branch_disp (int offset
)
3300 /* Adjust all short branch offsets here. */
3301 if (cris_arch
== arch_crisv32
|| cris_arch
== arch_cris_common_v10_v32
)
3304 disp
= offset
& 0xFE;
3312 /* Generate code and fixes for a 32-bit conditional branch instruction
3313 created by "extending" an existing 8-bit branch instruction.
3315 opcodep Pointer to the word containing the original 8-bit branch
3318 writep Pointer to "extension area" following the first instruction
3321 fragP Pointer to the frag containing the instruction.
3323 add_symP, Parts of the destination address expression.
3328 gen_cond_branch_32 (char *opcodep
, char *writep
, fragS
*fragP
,
3329 symbolS
*add_symP
, symbolS
*sub_symP
, long int add_num
)
3335 if (cris_arch
== arch_crisv32
)
3337 nop_opcode
= NOP_OPCODE_V32
;
3339 branch_offset
= -2 - 8;
3343 nop_opcode
= NOP_OPCODE
;
3345 branch_offset
= -2 - 8;
3349 nop_opcode
= NOP_OPCODE
;
3351 branch_offset
= -2 - 6;
3354 /* We should never get here for compatibility mode. */
3355 if (cris_arch
== arch_cris_common_v10_v32
)
3356 as_fatal (_("Calling gen_cond_branch_32 for .arch common_v10_v32\n"));
3358 if (warn_for_branch_expansion
)
3359 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3360 _("32-bit conditional branch generated"));
3362 /* Here, writep points to what will be opcodep + 2. First, we change
3363 the actual branch in opcodep[0] and opcodep[1], so that in the
3364 final insn, it will look like:
3367 This means we don't have to worry about changing the opcode or
3368 messing with the delay-slot instruction. So, we move it to last in
3369 the "extended" branch, and just change the displacement. Admittedly,
3370 it's not the optimal extended construct, but we should get this
3371 rarely enough that it shouldn't matter. */
3373 writep
[opc_offset
] = branch_disp (branch_offset
);
3374 writep
[opc_offset
+ 1] = opcodep
[1];
3376 /* Then, we change the branch to an unconditional branch over the
3377 extended part, to the new location of the Bcc:
3381 Note that these two writes are to currently different locations,
3384 md_number_to_chars (opcodep
, BA_QUICK_OPCODE
3385 + (cris_arch
== arch_crisv32
? 12 : (pic
? 10 : 8)),
3387 md_number_to_chars (writep
, nop_opcode
, 2);
3389 /* Then the extended thing, the 32-bit jump insn.
3390 opcodep+4: JUMP [PC+]
3391 or, in the PIC case,
3392 opcodep+4: MOVE [PC=PC+N],P0. */
3394 md_number_to_chars (writep
+ 2,
3395 cris_arch
== arch_crisv32
3397 : (pic
? MOVE_PC_INCR_OPCODE_PREFIX
3398 : JUMP_PC_INCR_OPCODE
), 2);
3400 /* We have to fill in the actual value too.
3402 This is most probably an expression, but we can cope with an absolute
3403 value too. FIXME: Testcase needed with and without pic. */
3405 if (add_symP
== NULL
&& sub_symP
== NULL
)
3407 /* An absolute address. */
3408 if (pic
|| cris_arch
== arch_crisv32
)
3409 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4,
3410 section_symbol (absolute_section
),
3412 + (cris_arch
== arch_crisv32
? 6 : 0),
3413 1, BFD_RELOC_32_PCREL
);
3415 md_number_to_chars (writep
+ 4, add_num
, 4);
3419 if (sub_symP
!= NULL
)
3420 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3421 _("Complex expression not supported"));
3423 /* Not absolute, we have to make it a frag for later evaluation. */
3424 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4, add_symP
,
3425 add_num
+ (cris_arch
== arch_crisv32
? 6 : 0),
3426 pic
|| cris_arch
== arch_crisv32
? 1 : 0,
3427 pic
|| cris_arch
== arch_crisv32
3428 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
3431 if (cris_arch
== arch_crisv32
)
3432 /* Follow it with a "NOP" for CRISv32. */
3433 md_number_to_chars (writep
+ 8, NOP_OPCODE_V32
, 2);
3435 /* ...and the rest of the move-opcode for pre-v32 PIC. */
3436 md_number_to_chars (writep
+ 8, MOVE_PC_INCR_OPCODE_SUFFIX
, 2);
3439 /* Get the size of an immediate-reloc in bytes. Only valid for
3440 specified relocs (TLS, PIC). */
3443 cris_get_specified_reloc_size (bfd_reloc_code_real_type reloc
)
3446 reloc
== BFD_RELOC_CRIS_16_GOTPLT
3447 || reloc
== BFD_RELOC_CRIS_16_GOT
3448 || reloc
== BFD_RELOC_CRIS_16_GOT_GD
3449 || reloc
== BFD_RELOC_CRIS_16_DTPREL
3450 || reloc
== BFD_RELOC_CRIS_16_GOT_TPREL
3451 || reloc
== BFD_RELOC_CRIS_16_TPREL
3455 /* Store a reloc type at *RELOCP corresponding to the PIC suffix at *CPP.
3456 Adjust *EXPRP with any addend found after the PIC suffix. */
3459 cris_get_reloc_suffix (char **cPP
, bfd_reloc_code_real_type
*relocp
,
3464 expressionS const_expr
;
3466 const struct pic_suffixes_struct
3468 const char *const suffix
;
3470 bfd_reloc_code_real_type reloc
;
3476 #define PICMAP(s, r) {s, sizeof (s) - 1, r, TRUE, FALSE}
3477 #define PICTLSMAP(s, r) {s, sizeof (s) - 1, r, TRUE, TRUE}
3478 #define TLSMAP(s, r) {s, sizeof (s) - 1, r, FALSE, TRUE}
3479 /* Keep this in order with longest unambiguous prefix first. */
3480 PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT
),
3481 PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT
),
3482 PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL
),
3483 PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL
),
3484 PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL
),
3485 PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT
),
3486 PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT
),
3487 PICTLSMAP ("GDGOTREL16", BFD_RELOC_CRIS_16_GOT_GD
),
3488 PICTLSMAP ("GDGOTREL", BFD_RELOC_CRIS_32_GOT_GD
),
3489 TLSMAP ("GD", BFD_RELOC_CRIS_32_GD
),
3490 PICTLSMAP ("DTPREL16", BFD_RELOC_CRIS_16_DTPREL
),
3491 PICTLSMAP ("DTPREL", BFD_RELOC_CRIS_32_DTPREL
),
3492 PICTLSMAP ("TPOFFGOT16", BFD_RELOC_CRIS_16_GOT_TPREL
),
3493 PICTLSMAP ("TPOFFGOT", BFD_RELOC_CRIS_32_GOT_TPREL
),
3494 TLSMAP ("TPOFF16", BFD_RELOC_CRIS_16_TPREL
),
3495 TLSMAP ("TPOFF", BFD_RELOC_CRIS_32_TPREL
)
3498 /* We've already seen the ':', so consume it. */
3501 for (i
= 0; i
< sizeof (pic_suffixes
)/sizeof (pic_suffixes
[0]); i
++)
3503 if (strncmp (s
, pic_suffixes
[i
].suffix
, pic_suffixes
[i
].len
) == 0
3504 && ! is_part_of_name (s
[pic_suffixes
[i
].len
])
3505 /* PIC and non-PIC relocations are exclusive. */
3506 && (pic
!= 0) == (pic_suffixes
[i
].pic_p
!= 0)
3507 /* But TLS can be active for non-TLS relocations too. */
3508 && (pic_suffixes
[i
].tls_p
== 0 || tls
))
3510 /* We have a match. Consume the suffix and set the relocation
3512 s
+= pic_suffixes
[i
].len
;
3514 /* There can be a constant term appended. If so, we will add it
3516 if (*s
== '+' || *s
== '-')
3518 if (! cris_get_expression (&s
, &const_expr
))
3519 /* There was some kind of syntax error. Bail out. */
3522 /* Allow complex expressions as the constant part. It still
3523 has to be an assembly-time constant or there will be an
3524 error emitting the reloc. This makes the PIC qualifiers
3525 idempotent; foo:GOTOFF+32 == foo+32:GOTOFF. The former we
3526 recognize here; the latter is parsed in the incoming
3528 exprP
->X_add_symbol
= make_expr_symbol (exprP
);
3529 exprP
->X_op
= O_add
;
3530 exprP
->X_add_number
= 0;
3531 exprP
->X_op_symbol
= make_expr_symbol (&const_expr
);
3534 *relocp
= pic_suffixes
[i
].reloc
;
3540 /* No match. Don't consume anything; fall back and there will be a
3544 /* This *could* have been:
3546 Turn a string in input_line_pointer into a floating point constant
3547 of type TYPE, and store the appropriate bytes in *LITP. The number
3548 of LITTLENUMS emitted is stored in *SIZEP.
3550 type A character from FLTCHARS that describes what kind of
3551 floating-point number is wanted.
3553 litp A pointer to an array that the result should be stored in.
3555 sizep A pointer to an integer where the size of the result is stored.
3557 But we don't support floating point constants in assembly code *at all*,
3558 since it's suboptimal and just opens up bug opportunities. GCC emits
3559 the bit patterns as hex. All we could do here is to emit what GCC
3560 would have done in the first place. *Nobody* writes floating-point
3561 code as assembly code, but if they do, they should be able enough to
3562 find out the correct bit patterns and use them. */
3565 md_atof (int type ATTRIBUTE_UNUSED
, char *litp ATTRIBUTE_UNUSED
,
3566 int *sizep ATTRIBUTE_UNUSED
)
3568 /* FIXME: Is this function mentioned in the internals.texi manual? If
3570 return _("Bad call to md_atof () - floating point formats are not supported");
3573 /* Turn a number as a fixS * into a series of bytes that represents the
3574 number on the target machine. The purpose of this procedure is the
3575 same as that of md_number_to_chars but this procedure is supposed to
3576 handle general bit field fixes and machine-dependent fixups.
3578 bufp Pointer to an array where the result should be stored.
3580 val The value to store.
3582 n The number of bytes in "val" that should be stored.
3584 fixP The fix to be applied to the bit field starting at bufp.
3586 seg The segment containing this number. */
3589 cris_number_to_imm (char *bufp
, long val
, int n
, fixS
*fixP
, segT seg
)
3596 /* We put the relative "vma" for the other segment for inter-segment
3597 relocations in the object data to stay binary "compatible" (with an
3598 uninteresting old version) for the relocation.
3599 Maybe delete some day. */
3601 && (sym_seg
= S_GET_SEGMENT (fixP
->fx_addsy
)) != seg
)
3602 val
+= sym_seg
->vma
;
3604 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3605 switch (fixP
->fx_r_type
)
3607 /* These must be fully resolved when getting here. */
3608 case BFD_RELOC_16_PCREL
:
3609 case BFD_RELOC_8_PCREL
:
3610 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3611 _("PC-relative relocation must be trivially resolved"));
3616 /* Only do this for old-arch binaries. */
3617 if (cris_arch
!= arch_cris_any_v0_v10
3618 && (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
))
3621 switch (fixP
->fx_r_type
)
3623 /* Ditto here, we put the addend into the object code as
3624 well as the reloc addend. Keep it that way for now, to simplify
3625 regression tests on the object file contents. FIXME: Seems
3626 uninteresting now that we have a test suite. */
3628 case BFD_RELOC_CRIS_16_GOT
:
3629 case BFD_RELOC_CRIS_32_GOT
:
3630 case BFD_RELOC_CRIS_32_GOTREL
:
3631 case BFD_RELOC_CRIS_16_GOTPLT
:
3632 case BFD_RELOC_CRIS_32_GOTPLT
:
3633 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3634 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3635 case BFD_RELOC_CRIS_32_GOT_GD
:
3636 case BFD_RELOC_CRIS_16_GOT_GD
:
3637 case BFD_RELOC_CRIS_32_GD
:
3638 case BFD_RELOC_CRIS_32_DTPREL
:
3639 case BFD_RELOC_CRIS_16_DTPREL
:
3640 case BFD_RELOC_CRIS_32_GOT_TPREL
:
3641 case BFD_RELOC_CRIS_16_GOT_TPREL
:
3642 case BFD_RELOC_CRIS_32_TPREL
:
3643 case BFD_RELOC_CRIS_16_TPREL
:
3644 /* We don't want to put in any kind of non-zero bits in the data
3645 being relocated for these. */
3648 case BFD_RELOC_32_PCREL
:
3649 /* If this one isn't fully resolved, we don't want to put anything
3651 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3656 /* No use having warnings here, since most hosts have a 32-bit type
3657 for "long" (which will probably change soon, now that I wrote
3659 bufp
[3] = (val
>> 24) & 0xFF;
3660 bufp
[2] = (val
>> 16) & 0xFF;
3661 bufp
[1] = (val
>> 8) & 0xFF;
3662 bufp
[0] = val
& 0xFF;
3665 /* FIXME: The 16 and 8-bit cases should have a way to check
3666 whether a signed or unsigned (or any signedness) number is
3670 case BFD_RELOC_16_PCREL
:
3671 if (val
> 0xffff || val
< -32768)
3672 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3673 _("Value not in 16 bit range: %ld"), val
);
3674 if (! fixP
->fx_addsy
)
3676 bufp
[1] = (val
>> 8) & 0xFF;
3677 bufp
[0] = val
& 0xFF;
3681 case BFD_RELOC_CRIS_SIGNED_16
:
3682 if (val
> 32767 || val
< -32768)
3683 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3684 _("Value not in 16 bit signed range: %ld"), val
);
3685 if (! fixP
->fx_addsy
)
3687 bufp
[1] = (val
>> 8) & 0xFF;
3688 bufp
[0] = val
& 0xFF;
3693 case BFD_RELOC_8_PCREL
:
3694 if (val
> 255 || val
< -128)
3695 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("Value not in 8 bit range: %ld"), val
);
3696 if (! fixP
->fx_addsy
)
3697 bufp
[0] = val
& 0xFF;
3700 case BFD_RELOC_CRIS_SIGNED_8
:
3701 if (val
> 127 || val
< -128)
3702 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3703 _("Value not in 8 bit signed range: %ld"), val
);
3704 if (! fixP
->fx_addsy
)
3705 bufp
[0] = val
& 0xFF;
3708 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3709 /* FIXME: Test-cases for out-of-range values. Probably also need
3710 to use as_bad_where. */
3711 case BFD_RELOC_CRIS_UNSIGNED_4
:
3712 if (val
> 15 || val
< 0)
3713 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3714 _("Value not in 4 bit unsigned range: %ld"), val
);
3715 if (! fixP
->fx_addsy
)
3716 bufp
[0] |= val
& 0x0F;
3719 case BFD_RELOC_CRIS_UNSIGNED_5
:
3720 if (val
> 31 || val
< 0)
3721 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3722 _("Value not in 5 bit unsigned range: %ld"), val
);
3723 if (! fixP
->fx_addsy
)
3724 bufp
[0] |= val
& 0x1F;
3727 case BFD_RELOC_CRIS_SIGNED_6
:
3728 if (val
> 31 || val
< -32)
3729 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3730 _("Value not in 6 bit range: %ld"), val
);
3731 if (! fixP
->fx_addsy
)
3732 bufp
[0] |= val
& 0x3F;
3735 case BFD_RELOC_CRIS_UNSIGNED_6
:
3736 if (val
> 63 || val
< 0)
3737 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3738 _("Value not in 6 bit unsigned range: %ld"), val
);
3739 if (! fixP
->fx_addsy
)
3740 bufp
[0] |= val
& 0x3F;
3743 case BFD_RELOC_CRIS_BDISP8
:
3744 if (! fixP
->fx_addsy
)
3745 bufp
[0] = branch_disp (val
);
3748 case BFD_RELOC_NONE
:
3749 /* May actually happen automatically. For example at broken
3750 words, if the word turns out not to be broken.
3751 FIXME: When? Which testcase? */
3752 if (! fixP
->fx_addsy
)
3753 md_number_to_chars (bufp
, val
, n
);
3756 case BFD_RELOC_VTABLE_INHERIT
:
3757 /* This borrowed from tc-ppc.c on a whim. */
3759 && !S_IS_DEFINED (fixP
->fx_addsy
)
3760 && !S_IS_WEAK (fixP
->fx_addsy
))
3761 S_SET_WEAK (fixP
->fx_addsy
);
3764 case BFD_RELOC_VTABLE_ENTRY
:
3769 BAD_CASE (fixP
->fx_r_type
);
3773 /* Processes machine-dependent command line options. Called once for
3774 each option on the command line that the machine-independent part of
3775 GAS does not understand. */
3778 md_parse_option (int arg
, char *argp ATTRIBUTE_UNUSED
)
3784 printf (_("Please use --help to see usage and options for this assembler.\n"));
3785 md_show_usage (stdout
);
3786 exit (EXIT_SUCCESS
);
3789 warn_for_branch_expansion
= 1;
3793 demand_register_prefix
= TRUE
;
3795 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3796 as_bad (_("--no-underscore is invalid with a.out format"));
3798 symbols_have_leading_underscore
= FALSE
;
3802 demand_register_prefix
= FALSE
;
3803 symbols_have_leading_underscore
= TRUE
;
3808 if (cris_arch
!= arch_crisv32
)
3809 md_long_jump_size
= cris_any_v0_v10_long_jump_size_pic
;
3811 md_long_jump_size
= crisv32_long_jump_size
;
3817 enum cris_archs argarch
= cris_arch_from_string (&str
);
3819 if (argarch
== arch_cris_unknown
)
3820 as_bad (_("invalid <arch> in --march=<arch>: %s"), argp
);
3822 cris_arch
= argarch
;
3824 if (argarch
== arch_crisv32
)
3826 err_for_dangerous_mul_placement
= 0;
3827 md_long_jump_size
= crisv32_long_jump_size
;
3832 md_long_jump_size
= cris_any_v0_v10_long_jump_size_pic
;
3834 md_long_jump_size
= cris_any_v0_v10_long_jump_size
;
3839 case OPTION_MULBUG_ABORT_OFF
:
3840 err_for_dangerous_mul_placement
= 0;
3843 case OPTION_MULBUG_ABORT_ON
:
3844 err_for_dangerous_mul_placement
= 1;
3854 /* Round up a section size to the appropriate boundary. */
3856 md_section_align (segT segment
, valueT size
)
3858 /* Round all sects to multiple of 4, except the bss section, which
3859 we'll round to word-size.
3861 FIXME: Check if this really matters. All sections should be
3862 rounded up, and all sections should (optionally) be assumed to be
3863 dword-aligned, it's just that there is actual usage of linking to a
3865 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3867 if (segment
== bss_section
)
3868 return (size
+ 1) & ~1;
3869 return (size
+ 3) & ~3;
3873 /* FIXME: Is this wanted? It matches the testsuite, but that's not
3874 really a valid reason. */
3875 if (segment
== text_section
)
3876 return (size
+ 3) & ~3;
3882 /* Generate a machine-dependent relocation. */
3884 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixP
)
3887 bfd_reloc_code_real_type code
;
3889 switch (fixP
->fx_r_type
)
3891 case BFD_RELOC_CRIS_SIGNED_8
:
3895 case BFD_RELOC_CRIS_SIGNED_16
:
3896 code
= BFD_RELOC_16
;
3899 case BFD_RELOC_CRIS_16_GOT
:
3900 case BFD_RELOC_CRIS_32_GOT
:
3901 case BFD_RELOC_CRIS_16_GOTPLT
:
3902 case BFD_RELOC_CRIS_32_GOTPLT
:
3903 case BFD_RELOC_CRIS_32_GOTREL
:
3904 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3905 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3907 case BFD_RELOC_32_PCREL
:
3910 case BFD_RELOC_VTABLE_INHERIT
:
3911 case BFD_RELOC_VTABLE_ENTRY
:
3912 case BFD_RELOC_CRIS_UNSIGNED_8
:
3913 case BFD_RELOC_CRIS_UNSIGNED_16
:
3914 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3915 case BFD_RELOC_CRIS_32_GOT_GD
:
3916 case BFD_RELOC_CRIS_16_GOT_GD
:
3917 case BFD_RELOC_CRIS_32_GD
:
3918 case BFD_RELOC_CRIS_32_DTPREL
:
3919 case BFD_RELOC_CRIS_16_DTPREL
:
3920 case BFD_RELOC_CRIS_32_GOT_TPREL
:
3921 case BFD_RELOC_CRIS_16_GOT_TPREL
:
3922 case BFD_RELOC_CRIS_32_TPREL
:
3923 case BFD_RELOC_CRIS_16_TPREL
:
3924 code
= fixP
->fx_r_type
;
3927 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3928 _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant"));
3932 relP
= (arelent
*) xmalloc (sizeof (arelent
));
3934 relP
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3935 *relP
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
3936 relP
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
3938 relP
->addend
= fixP
->fx_offset
;
3940 /* This is the standard place for KLUDGEs to work around bugs in
3941 bfd_install_relocation (first such note in the documentation
3942 appears with binutils-2.8).
3944 That function bfd_install_relocation does the wrong thing with
3945 putting stuff into the addend of a reloc (it should stay out) for a
3946 weak symbol. The really bad thing is that it adds the
3947 "segment-relative offset" of the symbol into the reloc. In this
3948 case, the reloc should instead be relative to the symbol with no
3949 other offset than the assembly code shows; and since the symbol is
3950 weak, any local definition should be ignored until link time (or
3952 To wit: weaksym+42 should be weaksym+42 in the reloc,
3953 not weaksym+(offset_from_segment_of_local_weaksym_definition)
3955 To "work around" this, we subtract the segment-relative offset of
3956 "known" weak symbols. This evens out the extra offset.
3958 That happens for a.out but not for ELF, since for ELF,
3959 bfd_install_relocation uses the "special function" field of the
3960 howto, and does not execute the code that needs to be undone. */
3962 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
3963 && fixP
->fx_addsy
&& S_IS_WEAK (fixP
->fx_addsy
)
3964 && ! bfd_is_und_section (S_GET_SEGMENT (fixP
->fx_addsy
)))
3966 relP
->addend
-= S_GET_VALUE (fixP
->fx_addsy
);
3969 relP
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3974 name
= S_GET_NAME (fixP
->fx_addsy
);
3976 name
= _("<unknown>");
3977 as_fatal (_("Cannot generate relocation type for symbol %s, code %s"),
3978 name
, bfd_get_reloc_code_name (code
));
3984 /* Machine-dependent usage-output. */
3987 md_show_usage (FILE *stream
)
3989 /* The messages are formatted to line up with the generic options. */
3990 fprintf (stream
, _("CRIS-specific options:\n"));
3991 fprintf (stream
, "%s",
3992 _(" -h, -H Don't execute, print this help text. Deprecated.\n"));
3993 fprintf (stream
, "%s",
3994 _(" -N Warn when branches are expanded to jumps.\n"));
3995 fprintf (stream
, "%s",
3996 _(" --underscore User symbols are normally prepended with underscore.\n"));
3997 fprintf (stream
, "%s",
3998 _(" Registers will not need any prefix.\n"));
3999 fprintf (stream
, "%s",
4000 _(" --no-underscore User symbols do not have any prefix.\n"));
4001 fprintf (stream
, "%s",
4002 _(" Registers will require a `$'-prefix.\n"));
4003 fprintf (stream
, "%s",
4004 _(" --pic Enable generation of position-independent code.\n"));
4005 fprintf (stream
, "%s",
4006 _(" --march=<arch> Generate code for <arch>. Valid choices for <arch>\n\
4007 are v0_v10, v10, v32 and common_v10_v32.\n"));
4010 /* Apply a fixS (fixup of an instruction or data that we didn't have
4011 enough info to complete immediately) to the data in a frag. */
4014 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
4016 /* This assignment truncates upper bits if valueT is 64 bits (as with
4017 --enable-64-bit-bfd), which is fine here, though we cast to avoid
4018 any compiler warnings. */
4019 long val
= (long) *valP
;
4020 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
4022 if (fixP
->fx_addsy
== 0 && !fixP
->fx_pcrel
)
4025 if (fixP
->fx_bit_fixP
|| fixP
->fx_im_disp
!= 0)
4027 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("Invalid relocation"));
4032 /* We can't actually support subtracting a symbol. */
4033 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
4034 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4035 _("expression too complex"));
4037 /* This operand-type is scaled. */
4038 if (fixP
->fx_r_type
== BFD_RELOC_CRIS_LAPCQ_OFFSET
)
4040 cris_number_to_imm (buf
, val
, fixP
->fx_size
, fixP
, seg
);
4044 /* All relocations are relative to the location just after the fixup;
4045 the address of the fixup plus its size. */
4048 md_pcrel_from (fixS
*fixP
)
4050 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4052 /* FIXME: We get here only at the end of assembly, when X in ".-X" is
4053 still unknown. Since we don't have pc-relative relocations in a.out,
4054 this is invalid. What to do if anything for a.out, is to add
4055 pc-relative relocations everywhere including the elinux program
4056 loader. For ELF, allow straight-forward PC-relative relocations,
4057 which are always relative to the location after the relocation. */
4058 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
4059 || (fixP
->fx_r_type
!= BFD_RELOC_8_PCREL
4060 && fixP
->fx_r_type
!= BFD_RELOC_16_PCREL
4061 && fixP
->fx_r_type
!= BFD_RELOC_32_PCREL
4062 && fixP
->fx_r_type
!= BFD_RELOC_CRIS_LAPCQ_OFFSET
))
4063 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4064 _("Invalid pc-relative relocation"));
4065 return fixP
->fx_size
+ addr
;
4068 /* We have no need to give defaults for symbol-values. */
4070 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
4075 /* If this function returns non-zero, it prevents the relocation
4076 against symbol(s) in the FIXP from being replaced with relocations
4077 against section symbols, and guarantees that a relocation will be
4078 emitted even when the value can be resolved locally. */
4080 md_cris_force_relocation (struct fix
*fixp
)
4082 switch (fixp
->fx_r_type
)
4084 case BFD_RELOC_CRIS_16_GOT
:
4085 case BFD_RELOC_CRIS_32_GOT
:
4086 case BFD_RELOC_CRIS_16_GOTPLT
:
4087 case BFD_RELOC_CRIS_32_GOTPLT
:
4088 case BFD_RELOC_CRIS_32_GOTREL
:
4089 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
4090 case BFD_RELOC_CRIS_32_PLT_PCREL
:
4096 return generic_force_reloc (fixp
);
4099 /* Check and emit error if broken-word handling has failed to fix up a
4100 case-table. This is called from write.c, after doing everything it
4101 knows about how to handle broken words. */
4104 tc_cris_check_adjusted_broken_word (offsetT new_offset
, struct broken_word
*brokwP
)
4106 if (new_offset
> 32767 || new_offset
< -32768)
4107 /* We really want a genuine error, not a warning, so make it one. */
4108 as_bad_where (brokwP
->frag
->fr_file
, brokwP
->frag
->fr_line
,
4109 _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
4113 /* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers. */
4116 cris_force_reg_prefix (void)
4118 demand_register_prefix
= TRUE
;
4121 /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */
4124 cris_relax_reg_prefix (void)
4126 demand_register_prefix
= FALSE
;
4129 /* Adjust for having a leading '_' on all user symbols. */
4132 cris_sym_leading_underscore (void)
4134 /* We can't really do anything more than assert that what the program
4135 thinks symbol starts with agrees with the command-line options, since
4136 the bfd is already created. */
4138 if (!symbols_have_leading_underscore
)
4139 as_bad (_(".syntax %s requires command-line option `--underscore'"),
4140 SYNTAX_USER_SYM_LEADING_UNDERSCORE
);
4143 /* Adjust for not having any particular prefix on user symbols. */
4145 static void cris_sym_no_leading_underscore (void)
4147 if (symbols_have_leading_underscore
)
4148 as_bad (_(".syntax %s requires command-line option `--no-underscore'"),
4149 SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
);
4152 /* Handle the .syntax pseudo, which takes an argument that decides what
4153 syntax the assembly code has. */
4156 s_syntax (int ignore ATTRIBUTE_UNUSED
)
4158 static const struct syntaxes
4160 const char *const operand
;
4163 {{SYNTAX_ENFORCE_REG_PREFIX
, cris_force_reg_prefix
},
4164 {SYNTAX_RELAX_REG_PREFIX
, cris_relax_reg_prefix
},
4165 {SYNTAX_USER_SYM_LEADING_UNDERSCORE
, cris_sym_leading_underscore
},
4166 {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
, cris_sym_no_leading_underscore
}};
4168 const struct syntaxes
*sp
;
4170 for (sp
= syntax_table
;
4171 sp
< syntax_table
+ sizeof (syntax_table
) / sizeof (syntax_table
[0]);
4174 if (strncmp (input_line_pointer
, sp
->operand
,
4175 strlen (sp
->operand
)) == 0)
4179 input_line_pointer
+= strlen (sp
->operand
);
4180 demand_empty_rest_of_line ();
4185 as_bad (_("Unknown .syntax operand"));
4188 /* Wrapper for dwarf2_directive_file to emit error if this is seen when
4189 not emitting ELF. */
4192 s_cris_file (int dummy
)
4194 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4195 as_bad (_("Pseudodirective .file is only valid when generating ELF"));
4197 dwarf2_directive_file (dummy
);
4200 /* Wrapper for dwarf2_directive_loc to emit error if this is seen when not
4204 s_cris_loc (int dummy
)
4206 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4207 as_bad (_("Pseudodirective .loc is only valid when generating ELF"));
4209 dwarf2_directive_loc (dummy
);
4212 /* Translate a <arch> string (as common to --march=<arch> and .arch <arch>)
4213 into an enum. If the string *STR is recognized, *STR is updated to point
4214 to the end of the string. If the string is not recognized,
4215 arch_cris_unknown is returned. */
4217 static enum cris_archs
4218 cris_arch_from_string (char **str
)
4220 static const struct cris_arch_struct
4222 const char *const name
;
4223 enum cris_archs arch
;
4225 /* Keep in order longest-first for choices where one is a prefix
4227 {{"v0_v10", arch_cris_any_v0_v10
},
4228 {"v10", arch_crisv10
},
4229 {"v32", arch_crisv32
},
4230 {"common_v10_v32", arch_cris_common_v10_v32
}};
4232 const struct cris_arch_struct
*ap
;
4234 for (ap
= arch_table
;
4235 ap
< arch_table
+ sizeof (arch_table
) / sizeof (arch_table
[0]);
4238 int len
= strlen (ap
->name
);
4240 if (strncmp (*str
, ap
->name
, len
) == 0
4241 && (str
[0][len
] == 0 || ISSPACE (str
[0][len
])))
4243 *str
+= strlen (ap
->name
);
4248 return arch_cris_unknown
;
4251 /* Return nonzero if architecture version ARCH matches version range in
4255 cris_insn_ver_valid_for_arch (enum cris_insn_version_usage iver
,
4256 enum cris_archs arch
)
4260 case arch_cris_any_v0_v10
:
4262 (iver
== cris_ver_version_all
4263 || iver
== cris_ver_warning
4264 || iver
== cris_ver_v0_3
4265 || iver
== cris_ver_v3p
4266 || iver
== cris_ver_v0_10
4267 || iver
== cris_ver_sim_v0_10
4268 || iver
== cris_ver_v3_10
4269 || iver
== cris_ver_v8
4270 || iver
== cris_ver_v8p
4271 || iver
== cris_ver_v8_10
4272 || iver
== cris_ver_v10
4273 || iver
== cris_ver_v10p
);
4277 (iver
== cris_ver_version_all
4278 || iver
== cris_ver_v3p
4279 || iver
== cris_ver_v8p
4280 || iver
== cris_ver_v10p
4281 || iver
== cris_ver_v32p
);
4283 case arch_cris_common_v10_v32
:
4285 (iver
== cris_ver_version_all
4286 || iver
== cris_ver_v3p
4287 || iver
== cris_ver_v8p
4288 || iver
== cris_ver_v10p
);
4292 (iver
== cris_ver_version_all
4293 || iver
== cris_ver_v0_3
4294 || iver
== cris_ver_v0_10
4295 || iver
== cris_ver_sim_v0_10
);
4299 (iver
== cris_ver_version_all
4300 || iver
== cris_ver_v0_3
4301 || iver
== cris_ver_v3p
4302 || iver
== cris_ver_v0_10
4303 || iver
== cris_ver_sim_v0_10
4304 || iver
== cris_ver_v3_10
);
4308 (iver
== cris_ver_version_all
4309 || iver
== cris_ver_v3p
4310 || iver
== cris_ver_v0_10
4311 || iver
== cris_ver_sim_v0_10
4312 || iver
== cris_ver_v3_10
4313 || iver
== cris_ver_v8
4314 || iver
== cris_ver_v8p
4315 || iver
== cris_ver_v8_10
);
4319 (iver
== cris_ver_version_all
4320 || iver
== cris_ver_v3p
4321 || iver
== cris_ver_v0_10
4322 || iver
== cris_ver_sim_v0_10
4323 || iver
== cris_ver_v3_10
4324 || iver
== cris_ver_v8p
4325 || iver
== cris_ver_v8_10
4326 || iver
== cris_ver_v10
4327 || iver
== cris_ver_v10p
);
4334 /* Assert that the .arch ARCHCHOICE1 is compatible with the specified or
4335 default --march=<ARCHCHOICE2> option. */
4338 s_cris_arch (int dummy ATTRIBUTE_UNUSED
)
4340 /* Right now we take the easy route and check for sameness. It's not
4341 obvious that allowing e.g. --march=v32 and .arch common_v0_v32
4342 would be more useful than confusing, implementation-wise and
4345 char *str
= input_line_pointer
;
4346 enum cris_archs arch
= cris_arch_from_string (&str
);
4348 if (arch
== arch_cris_unknown
)
4350 as_bad (_("unknown operand to .arch"));
4352 /* For this one, str does not reflect the end of the operand,
4353 since there was no matching arch. Skip it manually; skip
4354 things that can be part of a word (a name). */
4355 while (is_part_of_name (*str
))
4358 else if (arch
!= cris_arch
)
4359 as_bad (_(".arch <arch> requires a matching --march=... option"));
4361 input_line_pointer
= str
;
4362 demand_empty_rest_of_line ();
4368 * eval: (c-set-style "gnu")
4369 * indent-tabs-mode: t