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changes from Minh Tran-Le <TRANLE@INTELLICORP.COM> to support i386
[binutils-gdb.git] / gas / config / tc-i386.c
1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 1991, 1992 Free Software Foundation.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 /*
21 Intel 80386 machine specific gas.
22 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
23 Bugs & suggestions are completely welcome. This is free software.
24 Please help us make it better.
25 */
26
27 #include "as.h"
28
29 #include "obstack.h"
30 #include "opcode/i386.h"
31
32 /* 'md_assemble ()' gathers together information and puts it into a
33 i386_insn. */
34
35 typedef struct {
36 /* TM holds the template for the insn were currently assembling. */
37 template tm;
38 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
39 char suffix;
40 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
41
42 /* OPERANDS gives the number of given operands. */
43 unsigned int operands;
44
45 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number of
46 given register, displacement, memory operands and immediate operands. */
47 unsigned int reg_operands, disp_operands, mem_operands, imm_operands;
48
49 /* TYPES [i] is the type (see above #defines) which tells us how to
50 search through DISPS [i] & IMMS [i] & REGS [i] for the required
51 operand. */
52 unsigned int types[MAX_OPERANDS];
53
54 /* Displacements (if given) for each operand. */
55 expressionS *disps[MAX_OPERANDS];
56
57 /* Immediate operands (if given) for each operand. */
58 expressionS *imms[MAX_OPERANDS];
59
60 /* Register operands (if given) for each operand. */
61 reg_entry *regs[MAX_OPERANDS];
62
63 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
64 the base index byte below. */
65 reg_entry *base_reg;
66 reg_entry *index_reg;
67 unsigned int log2_scale_factor;
68
69 /* SEG gives the seg_entry of this insn. It is equal to zero unless
70 an explicit segment override is given. */
71 const seg_entry *seg; /* segment for memory operands (if given) */
72
73 /* PREFIX holds all the given prefix opcodes (usually null).
74 PREFIXES is the size of PREFIX. */
75 /* richfix: really unsigned? */
76 unsigned char prefix[MAX_PREFIXES];
77 unsigned int prefixes;
78
79 /* RM and IB are the modrm byte and the base index byte where the addressing
80 modes of this insn are encoded. */
81
82 modrm_byte rm;
83 base_index_byte bi;
84 } i386_insn;
85
86 /* This array holds the chars that always start a comment. If the
87 pre-processor is disabled, these aren't very useful */
88 const char comment_chars[] = "#";
89
90 /* This array holds the chars that only start a comment at the beginning of
91 a line. If the line seems to have the form '# 123 filename'
92 .line and .file directives will appear in the pre-processed output */
93 /* Note that input_file.c hand checks for '#' at the beginning of the
94 first line of the input file. This is because the compiler outputs
95 #NO_APP at the beginning of its output. */
96 /* Also note that comments started like this one will always work if
97 '/' isn't otherwise defined. */
98 const char line_comment_chars[] = "/"; /* removed '#' xoxorich. */
99
100 /* Chars that can be used to separate mant from exp in floating point nums */
101 const char EXP_CHARS[] = "eE";
102
103 /* Chars that mean this number is a floating point constant */
104 /* As in 0f12.456 */
105 /* or 0d1.2345e12 */
106 const char FLT_CHARS[] = "fFdDxX";
107
108 /* tables for lexical analysis */
109 static char opcode_chars[256];
110 static char register_chars[256];
111 static char operand_chars[256];
112 static char space_chars[256];
113 static char identifier_chars[256];
114 static char digit_chars[256];
115
116 /* lexical macros */
117 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
118 #define is_operand_char(x) (operand_chars[(unsigned char) x])
119 #define is_register_char(x) (register_chars[(unsigned char) x])
120 #define is_space_char(x) (space_chars[(unsigned char) x])
121 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
122 #define is_digit_char(x) (digit_chars[(unsigned char) x])
123
124 /* put here all non-digit non-letter charcters that may occur in an operand */
125 static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:";
126
127 static char *ordinal_names[] = { "first", "second", "third" }; /* for printfs */
128
129 /* md_assemble() always leaves the strings it's passed unaltered. To
130 effect this we maintain a stack of saved characters that we've smashed
131 with '\0's (indicating end of strings for various sub-fields of the
132 assembler instruction). */
133 static char save_stack[32];
134 static char *save_stack_p; /* stack pointer */
135 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
136 #define RESTORE_END_STRING(s) *s = *--save_stack_p
137
138 /* The instruction we're assembling. */
139 static i386_insn i;
140
141 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
142 static expressionS disp_expressions[2], im_expressions[2];
143
144 /* pointers to ebp & esp entries in reg_hash hash table */
145 static reg_entry *ebp, *esp;
146
147 static int this_operand; /* current operand we are working on */
148
149 /*
150 Interface to relax_segment.
151 There are 2 relax states for 386 jump insns: one for conditional & one
152 for unconditional jumps. This is because the these two types of jumps
153 add different sizes to frags when we're figuring out what sort of jump
154 to choose to reach a given label. */
155
156 /* types */
157 #define COND_JUMP 1 /* conditional jump */
158 #define UNCOND_JUMP 2 /* unconditional jump */
159 /* sizes */
160 #define BYTE 0
161 #define WORD 1
162 #define DWORD 2
163 #define UNKNOWN_SIZE 3
164
165 #define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size))
166 #define SIZE_FROM_RELAX_STATE(s) \
167 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
168
169 const relax_typeS md_relax_table[] = {
170 /*
171 The fields are:
172 1) most positive reach of this state,
173 2) most negative reach of this state,
174 3) how many bytes this mode will add to the size of the current frag
175 4) which index into the table to try if we can't fit into this one.
176 */
177 {1, 1, 0, 0},
178 {1, 1, 0, 0},
179 {1, 1, 0, 0},
180 {1, 1, 0, 0},
181
182 /* For now we don't use word displacement jumps: they may be
183 untrustworthy. */
184 {127+1, -128+1, 0, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
185 /* word conditionals add 3 bytes to frag:
186 2 opcode prefix; 1 displacement bytes */
187 {32767+2, -32768+2, 3, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
188 /* dword conditionals adds 4 bytes to frag:
189 1 opcode prefix; 3 displacement bytes */
190 {0, 0, 4, 0},
191 {1, 1, 0, 0},
192
193 {127+1, -128+1, 0, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
194 /* word jmp adds 2 bytes to frag:
195 1 opcode prefix; 1 displacement bytes */
196 {32767+2, -32768+2, 2, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
197 /* dword jmp adds 3 bytes to frag:
198 0 opcode prefix; 3 displacement bytes */
199 {0, 0, 3, 0},
200 {1, 1, 0, 0},
201
202 };
203
204 #if __STDC__ == 1
205
206 static char *output_invalid(int c);
207 static int fits_in_signed_byte(long num);
208 static int fits_in_signed_word(long num);
209 static int fits_in_unsigned_byte(long num);
210 static int fits_in_unsigned_word(long num);
211 static int i386_operand(char *operand_string);
212 static int smallest_imm_type(long num);
213 static reg_entry *parse_register(char *reg_string);
214 static unsigned long mode_from_disp_size(unsigned long t);
215 static unsigned long opcode_suffix_to_type(unsigned long s);
216
217 #else /* not __STDC__ */
218
219 static char *output_invalid();
220 static int fits_in_signed_byte();
221 static int fits_in_signed_word();
222 static int fits_in_unsigned_byte();
223 static int fits_in_unsigned_word();
224 static int i386_operand();
225 static int smallest_imm_type();
226 static reg_entry *parse_register();
227 static unsigned long mode_from_disp_size();
228 static unsigned long opcode_suffix_to_type();
229
230 #endif /* not __STDC__ */
231
232
233 /* Ignore certain directives generated by gcc. This probably should
234 not be here. */
235 void dummy ()
236 {
237 while (*input_line_pointer && *input_line_pointer != '\n')
238 input_line_pointer++;
239 }
240
241 const pseudo_typeS md_pseudo_table[] = {
242 { "align", s_align_bytes, 0 },
243 { "ffloat", float_cons, 'f' },
244 { "dfloat", float_cons, 'd' },
245 { "tfloat", float_cons, 'x' },
246 { "value", cons, 2 },
247 { 0, 0, 0 }
248 };
249
250 /* for interface with expression () */
251 extern char * input_line_pointer;
252
253 /* obstack for constructing various things in md_begin */
254 struct obstack o;
255
256 /* hash table for opcode lookup */
257 static struct hash_control *op_hash = (struct hash_control *) 0;
258 /* hash table for register lookup */
259 static struct hash_control *reg_hash = (struct hash_control *) 0;
260 /* hash table for prefix lookup */
261 static struct hash_control *prefix_hash = (struct hash_control *) 0;
262
263 \f
264 void md_begin ()
265 {
266 char * hash_err;
267
268 obstack_begin (&o,4096);
269
270 /* initialize op_hash hash table */
271 op_hash = hash_new(); /* xmalloc handles error */
272
273 {
274 register const template *optab;
275 register templates *core_optab;
276 char *prev_name;
277
278 optab = i386_optab; /* setup for loop */
279 prev_name = optab->name;
280 obstack_grow (&o, optab, sizeof(template));
281 core_optab = (templates *) xmalloc (sizeof (templates));
282
283 for (optab++; optab < i386_optab_end; optab++) {
284 if (! strcmp (optab->name, prev_name)) {
285 /* same name as before --> append to current template list */
286 obstack_grow (&o, optab, sizeof(template));
287 } else {
288 /* different name --> ship out current template list;
289 add to hash table; & begin anew */
290 /* Note: end must be set before start! since obstack_next_free changes
291 upon opstack_finish */
292 core_optab->end = (template *) obstack_next_free(&o);
293 core_optab->start = (template *) obstack_finish(&o);
294 hash_err = hash_insert (op_hash, prev_name, (char *) core_optab);
295 if (hash_err && *hash_err) {
296 hash_error:
297 as_fatal("Internal Error: Can't hash %s: %s", prev_name, hash_err);
298 }
299 prev_name = optab->name;
300 core_optab = (templates *) xmalloc (sizeof(templates));
301 obstack_grow (&o, optab, sizeof(template));
302 }
303 }
304 }
305
306 /* initialize reg_hash hash table */
307 reg_hash = hash_new();
308 {
309 register const reg_entry *regtab;
310
311 for (regtab = i386_regtab; regtab < i386_regtab_end; regtab++) {
312 hash_err = hash_insert (reg_hash, regtab->reg_name, regtab);
313 if (hash_err && *hash_err) goto hash_error;
314 }
315 }
316
317 esp = (reg_entry *) hash_find (reg_hash, "esp");
318 ebp = (reg_entry *) hash_find (reg_hash, "ebp");
319
320 /* initialize reg_hash hash table */
321 prefix_hash = hash_new();
322 {
323 register const prefix_entry *prefixtab;
324
325 for (prefixtab = i386_prefixtab;
326 prefixtab < i386_prefixtab_end; prefixtab++) {
327 hash_err = hash_insert (prefix_hash, prefixtab->prefix_name, prefixtab);
328 if (hash_err && *hash_err) goto hash_error;
329 }
330 }
331
332 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
333 {
334 register unsigned int c;
335
336 memset(opcode_chars, '\0', sizeof(opcode_chars));
337 memset(operand_chars, '\0', sizeof(operand_chars));
338 memset(space_chars, '\0', sizeof(space_chars));
339 memset(identifier_chars, '\0', sizeof(identifier_chars));
340 memset(digit_chars, '\0', sizeof(digit_chars));
341
342 for (c = 0; c < 256; c++) {
343 if (islower(c) || isdigit(c)) {
344 opcode_chars[c] = c;
345 register_chars[c] = c;
346 } else if (isupper(c)) {
347 opcode_chars[c] = tolower(c);
348 register_chars[c] = opcode_chars[c];
349 } else if (c == PREFIX_SEPERATOR) {
350 opcode_chars[c] = c;
351 } else if (c == ')' || c == '(') {
352 register_chars[c] = c;
353 }
354
355 if (isupper(c) || islower(c) || isdigit(c))
356 operand_chars[c] = c;
357 else if (c && strchr(operand_special_chars, c))
358 operand_chars[c] = c;
359
360 if (isdigit(c) || c == '-') digit_chars[c] = c;
361
362 if (isalpha(c) || c == '_' || c == '.' || isdigit(c))
363 identifier_chars[c] = c;
364
365 if (c == ' ' || c == '\t') space_chars[c] = c;
366 }
367 }
368 }
369
370 void md_end() {} /* not much to do here. */
371
372 \f
373 #ifdef DEBUG386
374
375 /* debugging routines for md_assemble */
376 /* static void pi (), pte (), pt (), pe (), ps (); */
377
378 static void pi (line, x)
379 char * line;
380 i386_insn *x;
381 {
382 register template *p;
383 int i;
384
385 fprintf (stdout, "%s: template ", line);
386 pte (&x->tm);
387 fprintf (stdout, " modrm: mode %x reg %x reg/mem %x",
388 x->rm.mode, x->rm.reg, x->rm.regmem);
389 fprintf (stdout, " base %x index %x scale %x\n",
390 x->bi.base, x->bi.index, x->bi.scale);
391 for (i = 0; i < x->operands; i++) {
392 fprintf (stdout, " #%d: ", i+1);
393 pt (x->types[i]);
394 fprintf (stdout, "\n");
395 if (x->types[i] & Reg) fprintf (stdout, "%s\n", x->regs[i]->reg_name);
396 if (x->types[i] & Imm) pe (x->imms[i]);
397 if (x->types[i] & (Disp|Abs)) pe (x->disps[i]);
398 }
399 }
400
401 static void pte (t)
402 template *t;
403 {
404 int i;
405 fprintf (stdout, " %d operands ", t->operands);
406 fprintf (stdout, "opcode %x ",
407 t->base_opcode);
408 if (t->extension_opcode != None)
409 fprintf (stdout, "ext %x ", t->extension_opcode);
410 if (t->opcode_modifier&D)
411 fprintf (stdout, "D");
412 if (t->opcode_modifier&W)
413 fprintf (stdout, "W");
414 fprintf (stdout, "\n");
415 for (i = 0; i < t->operands; i++) {
416 fprintf (stdout, " #%d type ", i+1);
417 pt (t->operand_types[i]);
418 fprintf (stdout, "\n");
419 }
420 }
421
422 static void pe (e)
423 expressionS *e;
424 {
425 fprintf (stdout, " segment %s\n", segment_name (e->X_seg));
426 fprintf (stdout, " add_number %d (%x)\n",
427 e->X_add_number, e->X_add_number);
428 if (e->X_add_symbol) {
429 fprintf (stdout, " add_symbol ");
430 ps (e->X_add_symbol);
431 fprintf (stdout, "\n");
432 }
433 if (e->X_subtract_symbol) {
434 fprintf (stdout, " sub_symbol ");
435 ps (e->X_subtract_symbol);
436 fprintf (stdout, "\n");
437 }
438 }
439
440 static void ps (s)
441 symbolS *s;
442 {
443 fprintf (stdout, "%s type %s%s",
444 S_GET_NAME(s),
445 S_IS_EXTERNAL(s) ? "EXTERNAL " : "",
446 segment_name(S_GET_SEGMENT(s)));
447 }
448
449 struct type_name {
450 unsigned int mask;
451 char *tname;
452 } type_names[] = {
453 { Reg8, "r8" }, { Reg16, "r16" }, { Reg32, "r32" }, { Imm8, "i8" },
454 { Imm8S, "i8s" },
455 { Imm16, "i16" }, { Imm32, "i32" }, { Mem8, "Mem8"}, { Mem16, "Mem16"},
456 { Mem32, "Mem32"}, { BaseIndex, "BaseIndex" },
457 { Abs8, "Abs8" }, { Abs16, "Abs16" }, { Abs32, "Abs32" },
458 { Disp8, "d8" }, { Disp16, "d16" },
459 { Disp32, "d32" }, { SReg2, "SReg2" }, { SReg3, "SReg3" }, { Acc, "Acc" },
460 { InOutPortReg, "InOutPortReg" }, { ShiftCount, "ShiftCount" },
461 { Imm1, "i1" }, { Control, "control reg" }, {Test, "test reg"},
462 { FloatReg, "FReg"}, {FloatAcc, "FAcc"},
463 { JumpAbsolute, "Jump Absolute"},
464 { 0, "" }
465 };
466
467 static void pt (t)
468 unsigned int t;
469 {
470 register struct type_name *ty;
471
472 if (t == Unknown) {
473 fprintf (stdout, "Unknown");
474 } else {
475 for (ty = type_names; ty->mask; ty++)
476 if (t & ty->mask) fprintf (stdout, "%s, ", ty->tname);
477 }
478 fflush (stdout);
479 }
480
481 #endif /* DEBUG386 */
482 \f
483 /*
484 This is the guts of the machine-dependent assembler. LINE points to a
485 machine dependent instruction. This funciton is supposed to emit
486 the frags/bytes it assembles to.
487 */
488 void md_assemble (line)
489 char *line;
490 {
491 /* Holds temlate once we've found it. */
492 register template *t;
493
494 /* Possible templates for current insn */
495 templates *current_templates = (templates *) 0;
496
497 /* Initialize globals. */
498 memset(&i, '\0', sizeof(i));
499 memset(disp_expressions, '\0', sizeof(disp_expressions));
500 memset(im_expressions, '\0', sizeof(im_expressions));
501 save_stack_p = save_stack; /* reset stack pointer */
502
503 /* Fist parse an opcode & call i386_operand for the operands.
504 We assume that the scrubber has arranged it so that line[0] is the valid
505 start of a (possibly prefixed) opcode. */
506 {
507 register char *l = line; /* Fast place to put LINE. */
508
509 /* 1 if operand is pending after ','. */
510 unsigned int expecting_operand = 0;
511 /* 1 if we found a prefix only acceptable with string insns. */
512 unsigned int expecting_string_instruction = 0;
513 /* Non-zero if operand parens not balenced. */
514 unsigned int paren_not_balenced;
515 char * token_start = l;
516
517 while (! is_space_char(*l) && *l != END_OF_INSN) {
518 if (! is_opcode_char(*l)) {
519 as_bad("invalid character %s in opcode", output_invalid(*l));
520 return;
521 } else if (*l != PREFIX_SEPERATOR) {
522 *l = opcode_chars[(unsigned char) *l]; /* fold case of opcodes */
523 l++;
524 } else { /* this opcode's got a prefix */
525 register unsigned int q;
526 register prefix_entry * prefix;
527
528 if (l == token_start) {
529 as_bad("expecting prefix; got nothing");
530 return;
531 }
532 END_STRING_AND_SAVE (l);
533 prefix = (prefix_entry *) hash_find (prefix_hash, token_start);
534 if (! prefix) {
535 as_bad("no such opcode prefix ('%s')", token_start);
536 return;
537 }
538 RESTORE_END_STRING (l);
539 /* check for repeated prefix */
540 for (q = 0; q < i.prefixes; q++)
541 if (i.prefix[q] == prefix->prefix_code) {
542 as_bad("same prefix used twice; you don't really want this!");
543 return;
544 }
545 if (i.prefixes == MAX_PREFIXES) {
546 as_bad("too many opcode prefixes");
547 return;
548 }
549 i.prefix[i.prefixes++] = prefix->prefix_code;
550 if (prefix->prefix_code == REPE || prefix->prefix_code == REPNE)
551 expecting_string_instruction = 1;
552 /* skip past PREFIX_SEPERATOR and reset token_start */
553 token_start = ++l;
554 }
555 }
556 END_STRING_AND_SAVE (l);
557 if (token_start == l) {
558 as_bad("expecting opcode; got nothing");
559 return;
560 }
561
562 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
563 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
564 current_templates = (templates *) hash_find (op_hash, token_start);
565 if (! current_templates) {
566 int last_index = strlen(token_start) - 1;
567 char last_char = token_start[last_index];
568 switch (last_char) {
569 case DWORD_OPCODE_SUFFIX:
570 case WORD_OPCODE_SUFFIX:
571 case BYTE_OPCODE_SUFFIX:
572 token_start[last_index] = '\0';
573 current_templates = (templates *) hash_find (op_hash, token_start);
574 token_start[last_index] = last_char;
575 i.suffix = last_char;
576 }
577 if (!current_templates) {
578 as_bad("no such 386 instruction: `%s'", token_start); return;
579 }
580 }
581 RESTORE_END_STRING (l);
582
583 /* check for rep/repne without a string instruction */
584 if (expecting_string_instruction &&
585 ! IS_STRING_INSTRUCTION (current_templates->
586 start->base_opcode)) {
587 as_bad("expecting string instruction after rep/repne");
588 return;
589 }
590
591 /* There may be operands to parse. */
592 if (*l != END_OF_INSN &&
593 /* For string instructions, we ignore any operands if given. This
594 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
595 the operands are always going to be the same, and are not really
596 encoded in machine code. */
597 ! IS_STRING_INSTRUCTION (current_templates->
598 start->base_opcode)) {
599 /* parse operands */
600 do {
601 /* skip optional white space before operand */
602 while (! is_operand_char(*l) && *l != END_OF_INSN) {
603 if (! is_space_char(*l)) {
604 as_bad("invalid character %s before %s operand",
605 output_invalid(*l),
606 ordinal_names[i.operands]);
607 return;
608 }
609 l++;
610 }
611 token_start = l; /* after white space */
612 paren_not_balenced = 0;
613 while (paren_not_balenced || *l != ',') {
614 if (*l == END_OF_INSN) {
615 if (paren_not_balenced) {
616 as_bad("unbalenced parenthesis in %s operand.",
617 ordinal_names[i.operands]);
618 return;
619 } else break; /* we are done */
620 } else if (! is_operand_char(*l)) {
621 as_bad("invalid character %s in %s operand",
622 output_invalid(*l),
623 ordinal_names[i.operands]);
624 return;
625 }
626 if (*l == '(') ++paren_not_balenced;
627 if (*l == ')') --paren_not_balenced;
628 l++;
629 }
630 if (l != token_start) { /* yes, we've read in another operand */
631 unsigned int operand_ok;
632 this_operand = i.operands++;
633 if (i.operands > MAX_OPERANDS) {
634 as_bad("spurious operands; (%d operands/instruction max)",
635 MAX_OPERANDS);
636 return;
637 }
638 /* now parse operand adding info to 'i' as we go along */
639 END_STRING_AND_SAVE (l);
640 operand_ok = i386_operand (token_start);
641 RESTORE_END_STRING (l); /* restore old contents */
642 if (!operand_ok) return;
643 } else {
644 if (expecting_operand) {
645 expecting_operand_after_comma:
646 as_bad("expecting operand after ','; got nothing");
647 return;
648 }
649 if (*l == ',') {
650 as_bad("expecting operand before ','; got nothing");
651 return;
652 }
653 }
654
655 /* now *l must be either ',' or END_OF_INSN */
656 if (*l == ',') {
657 if (*++l == END_OF_INSN) { /* just skip it, if it's \n complain */
658 goto expecting_operand_after_comma;
659 }
660 expecting_operand = 1;
661 }
662 } while (*l != END_OF_INSN); /* until we get end of insn */
663 }
664 }
665
666 /* Now we've parsed the opcode into a set of templates, and have the
667 operands at hand.
668 Next, we find a template that matches the given insn,
669 making sure the overlap of the given operands types is consistent
670 with the template operand types. */
671
672 #define MATCH(overlap,given_type) \
673 (overlap && \
674 (overlap & (JumpAbsolute|BaseIndex|Mem8)) \
675 == (given_type & (JumpAbsolute|BaseIndex|Mem8)))
676
677 /* If m0 and m1 are register matches they must be consistent
678 with the expected operand types t0 and t1.
679 That is, if both m0 & m1 are register matches
680 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
681 then, either 1. or 2. must be true:
682 1. the expected operand type register overlap is null:
683 (t0 & t1 & Reg) == 0
684 AND
685 the given register overlap is null:
686 (m0 & m1 & Reg) == 0
687 2. the expected operand type register overlap == the given
688 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
689 */
690 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
691 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
692 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
693 ((t0 & t1) & (m0 & m1) & (Reg)) \
694 ) : 1)
695 {
696 register unsigned int overlap0, overlap1;
697 expressionS * exp;
698 unsigned int overlap2;
699 unsigned int found_reverse_match;
700
701 overlap0 = overlap1 = overlap2 = found_reverse_match = 0;
702 for (t = current_templates->start;
703 t < current_templates->end;
704 t++) {
705
706 /* must have right number of operands */
707 if (i.operands != t->operands) continue;
708 else if (!t->operands) break; /* 0 operands always matches */
709
710 overlap0 = i.types[0] & t->operand_types[0];
711 switch (t->operands) {
712 case 1:
713 if (! MATCH (overlap0,i.types[0])) continue;
714 break;
715 case 2: case 3:
716 overlap1 = i.types[1] & t->operand_types[1];
717 if (! MATCH (overlap0,i.types[0]) ||
718 ! MATCH (overlap1,i.types[1]) ||
719 ! CONSISTENT_REGISTER_MATCH(overlap0, overlap1,
720 t->operand_types[0],
721 t->operand_types[1])) {
722
723 /* check if other direction is valid ... */
724 if (! (t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS))
725 continue;
726
727 /* try reversing direction of operands */
728 overlap0 = i.types[0] & t->operand_types[1];
729 overlap1 = i.types[1] & t->operand_types[0];
730 if (! MATCH (overlap0,i.types[0]) ||
731 ! MATCH (overlap1,i.types[1]) ||
732 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap1,
733 t->operand_types[0],
734 t->operand_types[1])) {
735 /* does not match either direction */
736 continue;
737 }
738 /* found a reverse match here -- slip through */
739 /* found_reverse_match holds which of D or FloatD we've found */
740 found_reverse_match = t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS;
741 } /* endif: not forward match */
742 /* found either forward/reverse 2 operand match here */
743 if (t->operands == 3) {
744 overlap2 = i.types[2] & t->operand_types[2];
745 if (! MATCH (overlap2,i.types[2]) ||
746 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap2,
747 t->operand_types[0],
748 t->operand_types[2]) ||
749 ! CONSISTENT_REGISTER_MATCH (overlap1, overlap2,
750 t->operand_types[1],
751 t->operand_types[2]))
752 continue;
753 }
754 /* found either forward/reverse 2 or 3 operand match here:
755 slip through to break */
756 }
757 break; /* we've found a match; break out of loop */
758 } /* for (t = ... */
759 if (t == current_templates->end) { /* we found no match */
760 as_bad("operands given don't match any known 386 instruction");
761 return;
762 }
763
764 /* Copy the template we found (we may change it!). */
765 memcpy(&i.tm, t, sizeof(template));
766 t = &i.tm; /* alter new copy of template */
767
768 /* If there's no opcode suffix we try to invent one based on register
769 operands. */
770 if (! i.suffix && i.reg_operands) {
771 /* We take i.suffix from the LAST register operand specified. This
772 assumes that the last register operands is the destination register
773 operand. */
774 int o;
775 for (o = 0; o < MAX_OPERANDS; o++)
776 if (i.types[o] & Reg) {
777 i.suffix = (i.types[o] == Reg8) ? BYTE_OPCODE_SUFFIX :
778 (i.types[o] == Reg16) ? WORD_OPCODE_SUFFIX :
779 DWORD_OPCODE_SUFFIX;
780 }
781 }
782
783 /* Make still unresolved immediate matches conform to size of immediate
784 given in i.suffix. Note: overlap2 cannot be an immediate!
785 We assume this. */
786 if ((overlap0 & (Imm8|Imm8S|Imm16|Imm32))
787 && overlap0 != Imm8 && overlap0 != Imm8S
788 && overlap0 != Imm16 && overlap0 != Imm32) {
789 if (! i.suffix) {
790 as_bad("no opcode suffix given; can't determine immediate size");
791 return;
792 }
793 overlap0 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
794 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
795 }
796 if ((overlap1 & (Imm8|Imm8S|Imm16|Imm32))
797 && overlap1 != Imm8 && overlap1 != Imm8S
798 && overlap1 != Imm16 && overlap1 != Imm32) {
799 if (! i.suffix) {
800 as_bad("no opcode suffix given; can't determine immediate size");
801 return;
802 }
803 overlap1 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
804 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
805 }
806
807 i.types[0] = overlap0;
808 i.types[1] = overlap1;
809 i.types[2] = overlap2;
810
811 if (overlap0 & ImplicitRegister) i.reg_operands--;
812 if (overlap1 & ImplicitRegister) i.reg_operands--;
813 if (overlap2 & ImplicitRegister) i.reg_operands--;
814 if (overlap0 & Imm1) i.imm_operands = 0; /* kludge for shift insns */
815
816 if (found_reverse_match) {
817 unsigned int save;
818 save = t->operand_types[0];
819 t->operand_types[0] = t->operand_types[1];
820 t->operand_types[1] = save;
821 }
822
823 /* Finalize opcode. First, we change the opcode based on the operand
824 size given by i.suffix: we never have to change things for byte insns,
825 or when no opcode suffix is need to size the operands. */
826
827 if (! i.suffix && (t->opcode_modifier & W)) {
828 as_bad("no opcode suffix given and no register operands; can't size instruction");
829 return;
830 }
831
832 if (i.suffix && i.suffix != BYTE_OPCODE_SUFFIX) {
833 /* Select between byte and word/dword operations. */
834 if (t->opcode_modifier & W)
835 t->base_opcode |= W;
836 /* Now select between word & dword operations via the
837 operand size prefix. */
838 if (i.suffix == WORD_OPCODE_SUFFIX) {
839 if (i.prefixes == MAX_PREFIXES) {
840 as_bad("%d prefixes given and 'w' opcode suffix gives too many prefixes",
841 MAX_PREFIXES);
842 return;
843 }
844 i.prefix[i.prefixes++] = WORD_PREFIX_OPCODE;
845 }
846 }
847
848 /* For insns with operands there are more diddles to do to the opcode. */
849 if (i.operands) {
850 /* If we found a reverse match we must alter the opcode direction bit
851 found_reverse_match holds bit to set (different for int &
852 float insns). */
853
854 if (found_reverse_match) {
855 t->base_opcode |= found_reverse_match;
856 }
857
858 /*
859 The imul $imm, %reg instruction is converted into
860 imul $imm, %reg, %reg. */
861 if (t->opcode_modifier & imulKludge) {
862 i.regs[2] = i.regs[1]; /* Pretend we saw the 3 operand case. */
863 i.reg_operands = 2;
864 }
865
866 /* Certain instructions expect the destination to be in the i.rm.reg
867 field. This is by far the exceptional case. For these instructions,
868 if the source operand is a register, we must reverse the i.rm.reg
869 and i.rm.regmem fields. We accomplish this by faking that the
870 two register operands were given in the reverse order. */
871 if ((t->opcode_modifier & ReverseRegRegmem) && i.reg_operands == 2) {
872 unsigned int first_reg_operand = (i.types[0] & Reg) ? 0 : 1;
873 unsigned int second_reg_operand = first_reg_operand + 1;
874 reg_entry *tmp = i.regs[first_reg_operand];
875 i.regs[first_reg_operand] = i.regs[second_reg_operand];
876 i.regs[second_reg_operand] = tmp;
877 }
878
879 if (t->opcode_modifier & ShortForm) {
880 /* The register or float register operand is in operand 0 or 1. */
881 unsigned int o = (i.types[0] & (Reg|FloatReg)) ? 0 : 1;
882 /* Register goes in low 3 bits of opcode. */
883 t->base_opcode |= i.regs[o]->reg_num;
884 } else if (t->opcode_modifier & ShortFormW) {
885 /* Short form with 0x8 width bit. Register is always dest. operand */
886 t->base_opcode |= i.regs[1]->reg_num;
887 if (i.suffix == WORD_OPCODE_SUFFIX ||
888 i.suffix == DWORD_OPCODE_SUFFIX)
889 t->base_opcode |= 0x8;
890 } else if (t->opcode_modifier & Seg2ShortForm) {
891 if (t->base_opcode == POP_SEG_SHORT && i.regs[0]->reg_num == 1) {
892 as_bad("you can't 'pop cs' on the 386.");
893 return;
894 }
895 t->base_opcode |= (i.regs[0]->reg_num << 3);
896 } else if (t->opcode_modifier & Seg3ShortForm) {
897 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
898 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
899 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
900 to change the opcode. */
901 if (i.regs[0]->reg_num == 5)
902 t->base_opcode |= 0x08;
903 } else if (t->opcode_modifier & Modrm) {
904 /* The opcode is completed (modulo t->extension_opcode which must
905 be put into the modrm byte.
906 Now, we make the modrm & index base bytes based on all the info
907 we've collected. */
908
909 /* i.reg_operands MUST be the number of real register operands;
910 implicit registers do not count. */
911 if (i.reg_operands == 2) {
912 unsigned int source, dest;
913 source = (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 : 1;
914 dest = source + 1;
915 i.rm.mode = 3;
916 /* We must be careful to make sure that all segment/control/test/
917 debug registers go into the i.rm.reg field (despite the whether
918 they are source or destination operands). */
919 if (i.regs[dest]->reg_type & (SReg2|SReg3|Control|Debug|Test)) {
920 i.rm.reg = i.regs[dest]->reg_num;
921 i.rm.regmem = i.regs[source]->reg_num;
922 } else {
923 i.rm.reg = i.regs[source]->reg_num;
924 i.rm.regmem = i.regs[dest]->reg_num;
925 }
926 } else { /* if it's not 2 reg operands... */
927 if (i.mem_operands) {
928 unsigned int fake_zero_displacement = 0;
929 unsigned int o = (i.types[0] & Mem) ? 0 : ((i.types[1] & Mem) ? 1 : 2);
930
931 /* Encode memory operand into modrm byte and base index byte. */
932
933 if (i.base_reg == esp && ! i.index_reg) {
934 /* <disp>(%esp) becomes two byte modrm with no index register. */
935 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
936 i.rm.mode = mode_from_disp_size(i.types[o]);
937 i.bi.base = ESP_REG_NUM;
938 i.bi.index = NO_INDEX_REGISTER;
939 i.bi.scale = 0; /* Must be zero! */
940 } else if (i.base_reg == ebp && !i.index_reg) {
941 if (! (i.types[o] & Disp)) {
942 /* Must fake a zero byte displacement.
943 There is no direct way to code '(%ebp)' directly. */
944 fake_zero_displacement = 1;
945 /* fake_zero_displacement code does not set this. */
946 i.types[o] |= Disp8;
947 }
948 i.rm.mode = mode_from_disp_size(i.types[o]);
949 i.rm.regmem = EBP_REG_NUM;
950 } else if (! i.base_reg && (i.types[o] & BaseIndex)) {
951 /* There are three cases here.
952 Case 1: '<32bit disp>(,1)' -- indirect absolute.
953 (Same as cases 2 & 3 with NO index register)
954 Case 2: <32bit disp> (,<index>) -- no base register with disp
955 Case 3: (, <index>) --- no base register;
956 no disp (must add 32bit 0 disp). */
957 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
958 i.rm.mode = 0; /* 32bit mode */
959 i.bi.base = NO_BASE_REGISTER;
960 i.types[o] &= ~Disp;
961 i.types[o] |= Disp32; /* Must be 32bit! */
962 if (i.index_reg) { /* case 2 or case 3 */
963 i.bi.index = i.index_reg->reg_num;
964 i.bi.scale = i.log2_scale_factor;
965 if (i.disp_operands == 0)
966 fake_zero_displacement = 1; /* case 3 */
967 } else {
968 i.bi.index = NO_INDEX_REGISTER;
969 i.bi.scale = 0;
970 }
971 } else if (i.disp_operands && !i.base_reg && !i.index_reg) {
972 /* Operand is just <32bit disp> */
973 i.rm.regmem = EBP_REG_NUM;
974 i.rm.mode = 0;
975 i.types[o] &= ~Disp;
976 i.types[o] |= Disp32;
977 } else {
978 /* It's not a special case; rev'em up. */
979 i.rm.regmem = i.base_reg->reg_num;
980 i.rm.mode = mode_from_disp_size(i.types[o]);
981 if (i.index_reg) {
982 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
983 i.bi.base = i.base_reg->reg_num;
984 i.bi.index = i.index_reg->reg_num;
985 i.bi.scale = i.log2_scale_factor;
986 if (i.base_reg == ebp && i.disp_operands == 0) { /* pace */
987 fake_zero_displacement = 1;
988 i.types[o] |= Disp8;
989 i.rm.mode = mode_from_disp_size(i.types[o]);
990 }
991 }
992 }
993 if (fake_zero_displacement) {
994 /* Fakes a zero displacement assuming that i.types[o] holds
995 the correct displacement size. */
996 exp = &disp_expressions[i.disp_operands++];
997 i.disps[o] = exp;
998 exp->X_seg = SEG_ABSOLUTE;
999 exp->X_add_number = 0;
1000 exp->X_add_symbol = (symbolS *) 0;
1001 exp->X_subtract_symbol = (symbolS *) 0;
1002 }
1003
1004 /* Select the correct segment for the memory operand. */
1005 if (i.seg) {
1006 unsigned int seg_index;
1007 const seg_entry *default_seg;
1008
1009 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING) {
1010 seg_index = (i.rm.mode<<3) | i.bi.base;
1011 default_seg = two_byte_segment_defaults[seg_index];
1012 } else {
1013 seg_index = (i.rm.mode<<3) | i.rm.regmem;
1014 default_seg = one_byte_segment_defaults[seg_index];
1015 }
1016 /* If the specified segment is not the default, use an
1017 opcode prefix to select it */
1018 if (i.seg != default_seg) {
1019 if (i.prefixes == MAX_PREFIXES) {
1020 as_bad("%d prefixes given and %s segment override gives too many prefixes",
1021 MAX_PREFIXES, i.seg->seg_name);
1022 return;
1023 }
1024 i.prefix[i.prefixes++] = i.seg->seg_prefix;
1025 }
1026 }
1027 }
1028
1029 /* Fill in i.rm.reg or i.rm.regmem field with register operand
1030 (if any) based on t->extension_opcode. Again, we must be careful
1031 to make sure that segment/control/debug/test registers are coded
1032 into the i.rm.reg field. */
1033 if (i.reg_operands) {
1034 unsigned int o =
1035 (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 :
1036 (i.types[1] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 1 : 2;
1037 /* If there is an extension opcode to put here, the register number
1038 must be put into the regmem field. */
1039 if (t->extension_opcode != None)
1040 i.rm.regmem = i.regs[o]->reg_num;
1041 else i.rm.reg = i.regs[o]->reg_num;
1042
1043 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1044 we must set it to 3 to indicate this is a register operand
1045 int the regmem field */
1046 if (! i.mem_operands) i.rm.mode = 3;
1047 }
1048
1049 /* Fill in i.rm.reg field with extension opcode (if any). */
1050 if (t->extension_opcode != None)
1051 i.rm.reg = t->extension_opcode;
1052 }
1053 }
1054 }
1055 }
1056
1057 /* Handle conversion of 'int $3' --> special int3 insn. */
1058 if (t->base_opcode == INT_OPCODE && i.imms[0]->X_add_number == 3) {
1059 t->base_opcode = INT3_OPCODE;
1060 i.imm_operands = 0;
1061 }
1062
1063 /* We are ready to output the insn. */
1064 {
1065 register char * p;
1066
1067 /* Output jumps. */
1068 if (t->opcode_modifier & Jump) {
1069 int n = i.disps[0]->X_add_number;
1070
1071 switch (i.disps[0]->X_seg) {
1072 case SEG_ABSOLUTE:
1073 if (fits_in_signed_byte(n)) {
1074 p = frag_more (2);
1075 p[0] = t->base_opcode;
1076 p[1] = n;
1077 #if 0 /* leave out 16 bit jumps - pace */
1078 } else if (fits_in_signed_word(n)) {
1079 p = frag_more (4);
1080 p[0] = WORD_PREFIX_OPCODE;
1081 p[1] = t->base_opcode;
1082 md_number_to_chars (&p[2], n, 2);
1083 #endif
1084 } else { /* It's an absolute dword displacement. */
1085 if (t->base_opcode == JUMP_PC_RELATIVE) { /* pace */
1086 /* unconditional jump */
1087 p = frag_more (5);
1088 p[0] = 0xe9;
1089 md_number_to_chars (&p[1], n, 4);
1090 } else {
1091 /* conditional jump */
1092 p = frag_more (6);
1093 p[0] = TWO_BYTE_OPCODE_ESCAPE;
1094 p[1] = t->base_opcode + 0x10;
1095 md_number_to_chars (&p[2], n, 4);
1096 }
1097 }
1098 break;
1099 default:
1100 /* It's a symbol; end frag & setup for relax.
1101 Make sure there are 6 chars left in the current frag; if not
1102 we'll have to start a new one. */
1103 /* I caught it failing with obstack_room == 6,
1104 so I changed to <= pace */
1105 if (obstack_room (&frags) <= 6) {
1106 frag_wane(frag_now);
1107 frag_new (0);
1108 }
1109 p = frag_more (1);
1110 p[0] = t->base_opcode;
1111 frag_var (rs_machine_dependent,
1112 6, /* 2 opcode/prefix + 4 displacement */
1113 1,
1114 ((unsigned char) *p == JUMP_PC_RELATIVE
1115 ? ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE)
1116 : ENCODE_RELAX_STATE (COND_JUMP, BYTE)),
1117 i.disps[0]->X_add_symbol,
1118 n, p);
1119 break;
1120 }
1121 } else if (t->opcode_modifier & (JumpByte|JumpDword)) {
1122 int size = (t->opcode_modifier & JumpByte) ? 1 : 4;
1123 int n = i.disps[0]->X_add_number;
1124
1125 if (fits_in_unsigned_byte(t->base_opcode)) {
1126 FRAG_APPEND_1_CHAR (t->base_opcode);
1127 } else {
1128 p = frag_more (2); /* opcode can be at most two bytes */
1129 /* put out high byte first: can't use md_number_to_chars! */
1130 *p++ = (t->base_opcode >> 8) & 0xff;
1131 *p = t->base_opcode & 0xff;
1132 }
1133
1134 p = frag_more (size);
1135 switch (i.disps[0]->X_seg) {
1136 case SEG_ABSOLUTE:
1137 md_number_to_chars (p, n, size);
1138 if (size == 1 && ! fits_in_signed_byte(n)) {
1139 as_bad("loop/jecx only takes byte displacement; %d shortened to %d",
1140 n, *p);
1141 }
1142 break;
1143 default:
1144 fix_new (frag_now, p - frag_now->fr_literal, size,
1145 i.disps[0]->X_add_symbol, i.disps[0]->X_subtract_symbol,
1146 i.disps[0]->X_add_number, 1, NO_RELOC);
1147 break;
1148 }
1149 } else if (t->opcode_modifier & JumpInterSegment) {
1150 p = frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1151 p[0] = t->base_opcode;
1152 if (i.imms[1]->X_seg == SEG_ABSOLUTE)
1153 md_number_to_chars (p + 1, i.imms[1]->X_add_number, 4);
1154 else
1155 fix_new (frag_now, p + 1 - frag_now->fr_literal, 4,
1156 i.imms[1]->X_add_symbol,
1157 i.imms[1]->X_subtract_symbol,
1158 i.imms[1]->X_add_number, 0, NO_RELOC);
1159 if (i.imms[0]->X_seg != SEG_ABSOLUTE)
1160 as_bad("can't handle non absolute segment in long call/jmp");
1161 md_number_to_chars (p + 5, i.imms[0]->X_add_number, 2);
1162 } else {
1163 /* Output normal instructions here. */
1164 unsigned char *q;
1165
1166 /* First the prefix bytes. */
1167 for (q = i.prefix; q < i.prefix + i.prefixes; q++) {
1168 p = frag_more (1);
1169 md_number_to_chars (p, (unsigned int) *q, 1);
1170 }
1171
1172 /* Now the opcode; be careful about word order here! */
1173 if (fits_in_unsigned_byte(t->base_opcode)) {
1174 FRAG_APPEND_1_CHAR (t->base_opcode);
1175 } else if (fits_in_unsigned_word(t->base_opcode)) {
1176 p = frag_more (2);
1177 /* put out high byte first: can't use md_number_to_chars! */
1178 *p++ = (t->base_opcode >> 8) & 0xff;
1179 *p = t->base_opcode & 0xff;
1180 } else { /* opcode is either 3 or 4 bytes */
1181 if (t->base_opcode & 0xff000000) {
1182 p = frag_more (4);
1183 *p++ = (t->base_opcode >> 24) & 0xff;
1184 } else p = frag_more (3);
1185 *p++ = (t->base_opcode >> 16) & 0xff;
1186 *p++ = (t->base_opcode >> 8) & 0xff;
1187 *p = (t->base_opcode ) & 0xff;
1188 }
1189
1190 /* Now the modrm byte and base index byte (if present). */
1191 if (t->opcode_modifier & Modrm) {
1192 p = frag_more (1);
1193 /* md_number_to_chars (p, i.rm, 1); */
1194 md_number_to_chars (p, (i.rm.regmem<<0 | i.rm.reg<<3 | i.rm.mode<<6), 1);
1195 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1196 ==> need second modrm byte. */
1197 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING && i.rm.mode != 3) {
1198 p = frag_more (1);
1199 /* md_number_to_chars (p, i.bi, 1); */
1200 md_number_to_chars (p,(i.bi.base<<0 | i.bi.index<<3 | i.bi.scale<<6), 1);
1201 }
1202 }
1203
1204 if (i.disp_operands) {
1205 register unsigned int n;
1206
1207 for (n = 0; n < i.operands; n++) {
1208 if (i.disps[n]) {
1209 if (i.disps[n]->X_seg == SEG_ABSOLUTE) {
1210 if (i.types[n] & (Disp8|Abs8)) {
1211 p = frag_more (1);
1212 md_number_to_chars (p, i.disps[n]->X_add_number, 1);
1213 } else if (i.types[n] & (Disp16|Abs16)) {
1214 p = frag_more (2);
1215 md_number_to_chars (p, i.disps[n]->X_add_number, 2);
1216 } else { /* Disp32|Abs32 */
1217 p = frag_more (4);
1218 md_number_to_chars (p, i.disps[n]->X_add_number, 4);
1219 }
1220 } else { /* not SEG_ABSOLUTE */
1221 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1222 p = frag_more (4);
1223 fix_new (frag_now, p - frag_now->fr_literal, 4,
1224 i.disps[n]->X_add_symbol, i.disps[n]->X_subtract_symbol,
1225 i.disps[n]->X_add_number, 0, NO_RELOC);
1226 }
1227 }
1228 }
1229 } /* end displacement output */
1230
1231 /* output immediate */
1232 if (i.imm_operands) {
1233 register unsigned int n;
1234
1235 for (n = 0; n < i.operands; n++) {
1236 if (i.imms[n]) {
1237 if (i.imms[n]->X_seg == SEG_ABSOLUTE) {
1238 if (i.types[n] & (Imm8|Imm8S)) {
1239 p = frag_more (1);
1240 md_number_to_chars (p, i.imms[n]->X_add_number, 1);
1241 } else if (i.types[n] & Imm16) {
1242 p = frag_more (2);
1243 md_number_to_chars (p, i.imms[n]->X_add_number, 2);
1244 } else {
1245 p = frag_more (4);
1246 md_number_to_chars (p, i.imms[n]->X_add_number, 4);
1247 }
1248 } else { /* not SEG_ABSOLUTE */
1249 /* need a 32-bit fixup (don't support 8bit non-absolute ims) */
1250 /* try to support other sizes ... */
1251 int size;
1252 if (i.types[n] & (Imm8|Imm8S))
1253 size = 1;
1254 else if (i.types[n] & Imm16)
1255 size = 2;
1256 else
1257 size = 4;
1258 p = frag_more (size);
1259 fix_new (frag_now, p - frag_now->fr_literal, size,
1260 i.imms[n]->X_add_symbol, i.imms[n]->X_subtract_symbol,
1261 i.imms[n]->X_add_number, 0, NO_RELOC);
1262 }
1263 }
1264 }
1265 } /* end immediate output */
1266 }
1267
1268 #ifdef DEBUG386
1269 if (flagseen ['D']) {
1270 pi (line, &i);
1271 }
1272 #endif /* DEBUG386 */
1273
1274 }
1275 return;
1276 }
1277 \f
1278 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1279 on error. */
1280
1281 static int i386_operand (operand_string)
1282 char *operand_string;
1283 {
1284 register char *op_string = operand_string;
1285
1286 /* Address of '\0' at end of operand_string. */
1287 char * end_of_operand_string = operand_string + strlen(operand_string);
1288
1289 /* Start and end of displacement string expression (if found). */
1290 char *displacement_string_start = NULL;
1291 char *displacement_string_end = NULL;
1292
1293 /* We check for an absolute prefix (differentiating,
1294 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1295 if (*op_string == ABSOLUTE_PREFIX) {
1296 op_string++;
1297 i.types[this_operand] |= JumpAbsolute;
1298 }
1299
1300 /* Check if operand is a register. */
1301 if (*op_string == REGISTER_PREFIX) {
1302 register reg_entry *r;
1303 if (!(r = parse_register (op_string))) {
1304 as_bad("bad register name ('%s')", op_string);
1305 return 0;
1306 }
1307 /* Check for segment override, rather than segment register by
1308 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1309 if ((r->reg_type & (SReg2|SReg3)) && op_string[3] == ':') {
1310 switch (r->reg_num) {
1311 case 0:
1312 i.seg = (seg_entry *) &es; break;
1313 case 1:
1314 i.seg = (seg_entry *) &cs; break;
1315 case 2:
1316 i.seg = (seg_entry *) &ss; break;
1317 case 3:
1318 i.seg = (seg_entry *) &ds; break;
1319 case 4:
1320 i.seg = (seg_entry *) &fs; break;
1321 case 5:
1322 i.seg = (seg_entry *) &gs; break;
1323 }
1324 op_string += 4; /* skip % <x> s : */
1325 operand_string = op_string; /* Pretend given string starts here. */
1326 if (!is_digit_char(*op_string) && !is_identifier_char(*op_string)
1327 && *op_string != '(' && *op_string != ABSOLUTE_PREFIX) {
1328 as_bad("bad memory operand after segment override");
1329 return 0;
1330 }
1331 /* Handle case of %es:*foo. */
1332 if (*op_string == ABSOLUTE_PREFIX) {
1333 op_string++;
1334 i.types[this_operand] |= JumpAbsolute;
1335 }
1336 goto do_memory_reference;
1337 }
1338 i.types[this_operand] |= r->reg_type;
1339 i.regs[this_operand] = r;
1340 i.reg_operands++;
1341 } else if (*op_string == IMMEDIATE_PREFIX) { /* ... or an immediate */
1342 char *save_input_line_pointer;
1343 segT exp_seg = SEG_GOOF;
1344 expressionS *exp;
1345
1346 if (i.imm_operands == MAX_IMMEDIATE_OPERANDS) {
1347 as_bad("only 1 or 2 immediate operands are allowed");
1348 return 0;
1349 }
1350
1351 exp = &im_expressions[i.imm_operands++];
1352 i.imms[this_operand] = exp;
1353 save_input_line_pointer = input_line_pointer;
1354 input_line_pointer = ++op_string; /* must advance op_string! */
1355 exp_seg = expression(exp);
1356 input_line_pointer = save_input_line_pointer;
1357
1358 switch (exp_seg) {
1359 case SEG_ABSENT: /* missing or bad expr becomes absolute 0 */
1360 as_bad("missing or invalid immediate expression '%s' taken as 0",
1361 operand_string);
1362 exp->X_seg = SEG_ABSOLUTE;
1363 exp->X_add_number = 0;
1364 exp->X_add_symbol = (symbolS *) 0;
1365 exp->X_subtract_symbol = (symbolS *) 0;
1366 i.types[this_operand] |= Imm;
1367 break;
1368 case SEG_ABSOLUTE:
1369 i.types[this_operand] |= smallest_imm_type(exp->X_add_number);
1370 break;
1371 case SEG_TEXT: case SEG_DATA: case SEG_BSS: case SEG_UNKNOWN:
1372 i.types[this_operand] |= Imm32; /* this is an address ==> 32bit */
1373 break;
1374 default:
1375 seg_unimplemented:
1376 as_bad("Unimplemented segment type %d in parse_operand", exp_seg);
1377 return 0;
1378 }
1379 /* shorten this type of this operand if the instruction wants
1380 * fewer bits than are present in the immediate. The bit field
1381 * code can put out 'andb $0xffffff, %al', for example. pace
1382 * also 'movw $foo,(%eax)'
1383 */
1384 switch (i.suffix) {
1385 case WORD_OPCODE_SUFFIX:
1386 i.types[this_operand] |= Imm16;
1387 break;
1388 case BYTE_OPCODE_SUFFIX:
1389 i.types[this_operand] |= Imm16 | Imm8 | Imm8S;
1390 break;
1391 }
1392 } else if (is_digit_char(*op_string) || is_identifier_char(*op_string)
1393 || *op_string == '(') {
1394 /* This is a memory reference of some sort. */
1395 register char * base_string;
1396 unsigned int found_base_index_form;
1397
1398 do_memory_reference:
1399 if (i.mem_operands == MAX_MEMORY_OPERANDS) {
1400 as_bad("more than 1 memory reference in instruction");
1401 return 0;
1402 }
1403 i.mem_operands++;
1404
1405 /* Determine type of memory operand from opcode_suffix;
1406 no opcode suffix implies general memory references. */
1407 switch (i.suffix) {
1408 case BYTE_OPCODE_SUFFIX:
1409 i.types[this_operand] |= Mem8;
1410 break;
1411 case WORD_OPCODE_SUFFIX:
1412 i.types[this_operand] |= Mem16;
1413 break;
1414 case DWORD_OPCODE_SUFFIX:
1415 default:
1416 i.types[this_operand] |= Mem32;
1417 }
1418
1419 /* Check for base index form. We detect the base index form by
1420 looking for an ')' at the end of the operand, searching
1421 for the '(' matching it, and finding a REGISTER_PREFIX or ','
1422 after it. */
1423 base_string = end_of_operand_string - 1;
1424 found_base_index_form = 0;
1425 if (*base_string == ')') {
1426 unsigned int parens_balenced = 1;
1427 /* We've already checked that the number of left & right ()'s are equal,
1428 so this loop will not be infinite. */
1429 do {
1430 base_string--;
1431 if (*base_string == ')') parens_balenced++;
1432 if (*base_string == '(') parens_balenced--;
1433 } while (parens_balenced);
1434 base_string++; /* Skip past '('. */
1435 if (*base_string == REGISTER_PREFIX || *base_string == ',')
1436 found_base_index_form = 1;
1437 }
1438
1439 /* If we can't parse a base index register expression, we've found
1440 a pure displacement expression. We set up displacement_string_start
1441 and displacement_string_end for the code below. */
1442 if (! found_base_index_form) {
1443 displacement_string_start = op_string;
1444 displacement_string_end = end_of_operand_string;
1445 } else {
1446 char *base_reg_name, *index_reg_name, *num_string;
1447 int num;
1448
1449 i.types[this_operand] |= BaseIndex;
1450
1451 /* If there is a displacement set-up for it to be parsed later. */
1452 if (base_string != op_string + 1) {
1453 displacement_string_start = op_string;
1454 displacement_string_end = base_string - 1;
1455 }
1456
1457 /* Find base register (if any). */
1458 if (*base_string != ',') {
1459 base_reg_name = base_string++;
1460 /* skip past register name & parse it */
1461 while (isalpha(*base_string)) base_string++;
1462 if (base_string == base_reg_name+1) {
1463 as_bad("can't find base register name after '(%c'",
1464 REGISTER_PREFIX);
1465 return 0;
1466 }
1467 END_STRING_AND_SAVE (base_string);
1468 if (! (i.base_reg = parse_register (base_reg_name))) {
1469 as_bad("bad base register name ('%s')", base_reg_name);
1470 return 0;
1471 }
1472 RESTORE_END_STRING (base_string);
1473 }
1474
1475 /* Now check seperator; must be ',' ==> index reg
1476 OR num ==> no index reg. just scale factor
1477 OR ')' ==> end. (scale factor = 1) */
1478 if (*base_string != ',' && *base_string != ')') {
1479 as_bad("expecting ',' or ')' after base register in `%s'",
1480 operand_string);
1481 return 0;
1482 }
1483
1484 /* There may index reg here; and there may be a scale factor. */
1485 if (*base_string == ',' && *(base_string+1) == REGISTER_PREFIX) {
1486 index_reg_name = ++base_string;
1487 while (isalpha(*++base_string));
1488 END_STRING_AND_SAVE (base_string);
1489 if (! (i.index_reg = parse_register(index_reg_name))) {
1490 as_bad("bad index register name ('%s')", index_reg_name);
1491 return 0;
1492 }
1493 RESTORE_END_STRING (base_string);
1494 }
1495
1496 /* Check for scale factor. */
1497 if (*base_string == ',' && isdigit(*(base_string+1))) {
1498 num_string = ++base_string;
1499 while (is_digit_char(*base_string)) base_string++;
1500 if (base_string == num_string) {
1501 as_bad("can't find a scale factor after ','");
1502 return 0;
1503 }
1504 END_STRING_AND_SAVE (base_string);
1505 /* We've got a scale factor. */
1506 if (! sscanf (num_string, "%d", &num)) {
1507 as_bad("can't parse scale factor from '%s'", num_string);
1508 return 0;
1509 }
1510 RESTORE_END_STRING (base_string);
1511 switch (num) { /* must be 1 digit scale */
1512 case 1: i.log2_scale_factor = 0; break;
1513 case 2: i.log2_scale_factor = 1; break;
1514 case 4: i.log2_scale_factor = 2; break;
1515 case 8: i.log2_scale_factor = 3; break;
1516 default:
1517 as_bad("expecting scale factor of 1, 2, 4, 8; got %d", num);
1518 return 0;
1519 }
1520 } else {
1521 if (! i.index_reg && *base_string == ',') {
1522 as_bad("expecting index register or scale factor after ','; got '%c'",
1523 *(base_string+1));
1524 return 0;
1525 }
1526 }
1527 }
1528
1529 /* If there's an expression begining the operand, parse it,
1530 assuming displacement_string_start and displacement_string_end
1531 are meaningful. */
1532 if (displacement_string_start) {
1533 register expressionS *exp;
1534 segT exp_seg = SEG_GOOF;
1535 char *save_input_line_pointer;
1536 exp = &disp_expressions[i.disp_operands];
1537 i.disps [this_operand] = exp;
1538 i.disp_operands++;
1539 save_input_line_pointer = input_line_pointer;
1540 input_line_pointer = displacement_string_start;
1541 END_STRING_AND_SAVE (displacement_string_end);
1542 exp_seg = expression(exp);
1543 if(*input_line_pointer)
1544 as_bad("Ignoring junk '%s' after expression",input_line_pointer);
1545 RESTORE_END_STRING (displacement_string_end);
1546 input_line_pointer = save_input_line_pointer;
1547 switch (exp_seg) {
1548 case SEG_ABSENT:
1549 /* missing expr becomes absolute 0 */
1550 as_bad("missing or invalid displacement '%s' taken as 0",
1551 operand_string);
1552 i.types[this_operand] |= (Disp|Abs);
1553 exp->X_seg = SEG_ABSOLUTE;
1554 exp->X_add_number = 0;
1555 exp->X_add_symbol = (symbolS *) 0;
1556 exp->X_subtract_symbol = (symbolS *) 0;
1557 break;
1558 case SEG_ABSOLUTE:
1559 i.types[this_operand] |= SMALLEST_DISP_TYPE (exp->X_add_number);
1560 break;
1561 case SEG_TEXT: case SEG_DATA: case SEG_BSS:
1562 case SEG_UNKNOWN: /* must be 32 bit displacement (i.e. address) */
1563 i.types[this_operand] |= Disp32;
1564 break;
1565 default:
1566 goto seg_unimplemented;
1567 }
1568 }
1569
1570 /* Make sure the memory operand we've been dealt is valid. */
1571 if (i.base_reg && i.index_reg &&
1572 ! (i.base_reg->reg_type & i.index_reg->reg_type & Reg)) {
1573 as_bad("register size mismatch in (base,index,scale) expression");
1574 return 0;
1575 }
1576 /*
1577 * special case for (%dx) while doing input/output op
1578 */
1579 if ((i.base_reg &&
1580 (i.base_reg->reg_type == (Reg16|InOutPortReg)) &&
1581 (i.index_reg == 0)))
1582 return 1;
1583 if ((i.base_reg && (i.base_reg->reg_type & Reg32) == 0) ||
1584 (i.index_reg && (i.index_reg->reg_type & Reg32) == 0)) {
1585 as_bad("base/index register must be 32 bit register");
1586 return 0;
1587 }
1588 if (i.index_reg && i.index_reg == esp) {
1589 as_bad("%s may not be used as an index register", esp->reg_name);
1590 return 0;
1591 }
1592 } else { /* it's not a memory operand; argh! */
1593 as_bad("invalid char %s begining %s operand '%s'",
1594 output_invalid(*op_string), ordinal_names[this_operand],
1595 op_string);
1596 return 0;
1597 }
1598 return 1; /* normal return */
1599 }
1600 \f
1601 /*
1602 * md_estimate_size_before_relax()
1603 *
1604 * Called just before relax().
1605 * Any symbol that is now undefined will not become defined.
1606 * Return the correct fr_subtype in the frag.
1607 * Return the initial "guess for fr_var" to caller.
1608 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
1609 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
1610 * Although it may not be explicit in the frag, pretend fr_var starts with a
1611 * 0 value.
1612 */
1613 int
1614 md_estimate_size_before_relax (fragP, segment)
1615 register fragS * fragP;
1616 register segT segment;
1617 {
1618 register unsigned char * opcode;
1619 register int old_fr_fix;
1620
1621 old_fr_fix = fragP -> fr_fix;
1622 opcode = (unsigned char *) fragP -> fr_opcode;
1623 /* We've already got fragP->fr_subtype right; all we have to do is check
1624 for un-relaxable symbols. */
1625 if (S_GET_SEGMENT(fragP -> fr_symbol) != segment) {
1626 /* symbol is undefined in this segment */
1627 switch (opcode[0]) {
1628 case JUMP_PC_RELATIVE: /* make jmp (0xeb) a dword displacement jump */
1629 opcode[0] = 0xe9; /* dword disp jmp */
1630 fragP -> fr_fix += 4;
1631 fix_new (fragP, old_fr_fix, 4,
1632 fragP -> fr_symbol,
1633 (symbolS *) 0,
1634 fragP -> fr_offset, 1, NO_RELOC);
1635 break;
1636
1637 default:
1638 /* This changes the byte-displacement jump 0x7N -->
1639 the dword-displacement jump 0x0f8N */
1640 opcode[1] = opcode[0] + 0x10;
1641 opcode[0] = TWO_BYTE_OPCODE_ESCAPE; /* two-byte escape */
1642 fragP -> fr_fix += 1 + 4; /* we've added an opcode byte */
1643 fix_new (fragP, old_fr_fix + 1, 4,
1644 fragP -> fr_symbol,
1645 (symbolS *) 0,
1646 fragP -> fr_offset, 1, NO_RELOC);
1647 break;
1648 }
1649 frag_wane (fragP);
1650 }
1651 return (fragP -> fr_var + fragP -> fr_fix - old_fr_fix);
1652 } /* md_estimate_size_before_relax() */
1653 \f
1654 /*
1655 * md_convert_frag();
1656 *
1657 * Called after relax() is finished.
1658 * In: Address of frag.
1659 * fr_type == rs_machine_dependent.
1660 * fr_subtype is what the address relaxed to.
1661 *
1662 * Out: Any fixSs and constants are set up.
1663 * Caller will turn frag into a ".space 0".
1664 */
1665 void
1666 md_convert_frag (headers, fragP)
1667 object_headers *headers;
1668 register fragS * fragP;
1669 {
1670 register unsigned char *opcode;
1671 unsigned char *where_to_put_displacement = NULL;
1672 unsigned int target_address;
1673 unsigned int opcode_address;
1674 unsigned int extension = 0;
1675 int displacement_from_opcode_start;
1676
1677 opcode = (unsigned char *) fragP -> fr_opcode;
1678
1679 /* Address we want to reach in file space. */
1680 target_address = S_GET_VALUE(fragP->fr_symbol) + fragP->fr_offset;
1681
1682 /* Address opcode resides at in file space. */
1683 opcode_address = fragP->fr_address + fragP->fr_fix;
1684
1685 /* Displacement from opcode start to fill into instruction. */
1686 displacement_from_opcode_start = target_address - opcode_address;
1687
1688 switch (fragP->fr_subtype) {
1689 case ENCODE_RELAX_STATE (COND_JUMP, BYTE):
1690 case ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE):
1691 /* don't have to change opcode */
1692 extension = 1; /* 1 opcode + 1 displacement */
1693 where_to_put_displacement = &opcode[1];
1694 break;
1695
1696 case ENCODE_RELAX_STATE (COND_JUMP, WORD):
1697 opcode[1] = TWO_BYTE_OPCODE_ESCAPE;
1698 opcode[2] = opcode[0] + 0x10;
1699 opcode[0] = WORD_PREFIX_OPCODE;
1700 extension = 4; /* 3 opcode + 2 displacement */
1701 where_to_put_displacement = &opcode[3];
1702 break;
1703
1704 case ENCODE_RELAX_STATE (UNCOND_JUMP, WORD):
1705 opcode[1] = 0xe9;
1706 opcode[0] = WORD_PREFIX_OPCODE;
1707 extension = 3; /* 2 opcode + 2 displacement */
1708 where_to_put_displacement = &opcode[2];
1709 break;
1710
1711 case ENCODE_RELAX_STATE (COND_JUMP, DWORD):
1712 opcode[1] = opcode[0] + 0x10;
1713 opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
1714 extension = 5; /* 2 opcode + 4 displacement */
1715 where_to_put_displacement = &opcode[2];
1716 break;
1717
1718 case ENCODE_RELAX_STATE (UNCOND_JUMP, DWORD):
1719 opcode[0] = 0xe9;
1720 extension = 4; /* 1 opcode + 4 displacement */
1721 where_to_put_displacement = &opcode[1];
1722 break;
1723
1724 default:
1725 BAD_CASE(fragP -> fr_subtype);
1726 break;
1727 }
1728 /* now put displacement after opcode */
1729 md_number_to_chars ((char *) where_to_put_displacement,
1730 displacement_from_opcode_start - extension,
1731 SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
1732 fragP -> fr_fix += extension;
1733 }
1734
1735 \f
1736 int md_short_jump_size = 2; /* size of byte displacement jmp */
1737 int md_long_jump_size = 5; /* size of dword displacement jmp */
1738 int md_reloc_size = 8; /* Size of relocation record */
1739
1740 void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol)
1741 char *ptr;
1742 long from_addr, to_addr;
1743 fragS *frag;
1744 symbolS *to_symbol;
1745 {
1746 long offset;
1747
1748 offset = to_addr - (from_addr + 2);
1749 md_number_to_chars (ptr, (long) 0xeb, 1); /* opcode for byte-disp jump */
1750 md_number_to_chars (ptr + 1, offset, 1);
1751 }
1752
1753 void md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
1754 char *ptr;
1755 long from_addr, to_addr;
1756 fragS *frag;
1757 symbolS *to_symbol;
1758 {
1759 long offset;
1760
1761 if (flagseen['m']) {
1762 offset = to_addr - S_GET_VALUE(to_symbol);
1763 md_number_to_chars (ptr, 0xe9, 1); /* opcode for long jmp */
1764 md_number_to_chars (ptr + 1, offset, 4);
1765 fix_new (frag, (ptr+1) - frag->fr_literal, 4,
1766 to_symbol, (symbolS *) 0, (long) 0, 0, NO_RELOC);
1767 } else {
1768 offset = to_addr - (from_addr + 5);
1769 md_number_to_chars(ptr, (long) 0xe9, 1);
1770 md_number_to_chars(ptr + 1, offset, 4);
1771 }
1772 }
1773 \f
1774 int
1775 md_parse_option(argP,cntP,vecP)
1776 char **argP;
1777 int *cntP;
1778 char ***vecP;
1779 {
1780 return 1;
1781 }
1782 \f
1783 void /* Knows about order of bytes in address. */
1784 md_number_to_chars (con, value, nbytes)
1785 char con []; /* Return 'nbytes' of chars here. */
1786 long value; /* The value of the bits. */
1787 int nbytes; /* Number of bytes in the output. */
1788 {
1789 register char * p = con;
1790
1791 switch (nbytes) {
1792 case 1:
1793 p[0] = value & 0xff;
1794 break;
1795 case 2:
1796 p[0] = value & 0xff;
1797 p[1] = (value >> 8) & 0xff;
1798 break;
1799 case 4:
1800 p[0] = value & 0xff;
1801 p[1] = (value>>8) & 0xff;
1802 p[2] = (value>>16) & 0xff;
1803 p[3] = (value>>24) & 0xff;
1804 break;
1805 default:
1806 BAD_CASE (nbytes);
1807 }
1808 }
1809
1810
1811 /* Apply a fixup (fixS) to segment data, once it has been determined
1812 by our caller that we have all the info we need to fix it up.
1813
1814 On the 386, immediates, displacements, and data pointers are all in
1815 the same (little-endian) format, so we don't need to care about which
1816 we are handling. */
1817
1818 void
1819 md_apply_fix (fixP, value)
1820 fixS * fixP; /* The fix we're to put in */
1821 long value; /* The value of the bits. */
1822 {
1823 register char * p = fixP->fx_where + fixP->fx_frag->fr_literal;
1824
1825 switch (fixP->fx_size) {
1826 case 1:
1827 *p = value;
1828 break;
1829 case 2:
1830 *p++ = value;
1831 *p = (value>>8);
1832 break;
1833 case 4:
1834 *p++ = value;
1835 *p++ = (value>>8);
1836 *p++ = (value>>16);
1837 *p = (value>>24);
1838 break;
1839 default:
1840 BAD_CASE (fixP->fx_size);
1841 }
1842 }
1843
1844 long /* Knows about the byte order in a word. */
1845 md_chars_to_number (con, nbytes)
1846 unsigned char con[]; /* Low order byte 1st. */
1847 int nbytes; /* Number of bytes in the input. */
1848 {
1849 long retval;
1850 for (retval=0, con+=nbytes-1; nbytes--; con--)
1851 {
1852 retval <<= BITS_PER_CHAR;
1853 retval |= *con;
1854 }
1855 return retval;
1856 }
1857
1858 /* Not needed for coff since relocation structure does not
1859 contain bitfields. */
1860 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
1861 #ifdef comment
1862 /* Output relocation information in the target's format. */
1863 void
1864 md_ri_to_chars(the_bytes, ri)
1865 char *the_bytes;
1866 struct reloc_info_generic *ri;
1867 {
1868 /* this is easy */
1869 md_number_to_chars(the_bytes, ri->r_address, 4);
1870 /* now the fun stuff */
1871 the_bytes[6] = (ri->r_symbolnum >> 16) & 0x0ff;
1872 the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
1873 the_bytes[4] = ri->r_symbolnum & 0x0ff;
1874 the_bytes[7] = (((ri->r_extern << 3) & 0x08) | ((ri->r_length << 1) & 0x06) |
1875 ((ri->r_pcrel << 0) & 0x01)) & 0x0F;
1876 }
1877 #endif /* comment */
1878
1879 void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
1880 char *where;
1881 fixS *fixP;
1882 relax_addressT segment_address_in_file;
1883 {
1884 /*
1885 * In: length of relocation (or of address) in chars: 1, 2 or 4.
1886 * Out: GNU LD relocation length code: 0, 1, or 2.
1887 */
1888
1889 static unsigned char nbytes_r_length [] = { 42, 0, 1, 42, 2 };
1890 long r_symbolnum;
1891
1892 know(fixP->fx_addsy != NULL);
1893
1894 md_number_to_chars(where,
1895 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
1896 4);
1897
1898 r_symbolnum = (S_IS_DEFINED(fixP->fx_addsy)
1899 ? S_GET_TYPE(fixP->fx_addsy)
1900 : fixP->fx_addsy->sy_number);
1901
1902 where[6] = (r_symbolnum >> 16) & 0x0ff;
1903 where[5] = (r_symbolnum >> 8) & 0x0ff;
1904 where[4] = r_symbolnum & 0x0ff;
1905 where[7] = ((((!S_IS_DEFINED(fixP->fx_addsy)) << 3) & 0x08)
1906 | ((nbytes_r_length[fixP->fx_size] << 1) & 0x06)
1907 | (((fixP->fx_pcrel << 0) & 0x01) & 0x0f));
1908
1909 return;
1910 } /* tc_aout_fix_to_chars() */
1911
1912 #endif /* OBJ_AOUT or OBJ_BOUT */
1913
1914 \f
1915 #define MAX_LITTLENUMS 6
1916
1917 /* Turn the string pointed to by litP into a floating point constant of type
1918 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
1919 is stored in *sizeP . An error message is returned, or NULL on OK.
1920 */
1921 char *
1922 md_atof(type,litP,sizeP)
1923 char type;
1924 char *litP;
1925 int *sizeP;
1926 {
1927 int prec;
1928 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1929 LITTLENUM_TYPE *wordP;
1930 char *t;
1931
1932 switch(type) {
1933 case 'f':
1934 case 'F':
1935 prec = 2;
1936 break;
1937
1938 case 'd':
1939 case 'D':
1940 prec = 4;
1941 break;
1942
1943 case 'x':
1944 case 'X':
1945 prec = 5;
1946 break;
1947
1948 default:
1949 *sizeP=0;
1950 return "Bad call to md_atof ()";
1951 }
1952 t = atof_ieee (input_line_pointer,type,words);
1953 if(t)
1954 input_line_pointer=t;
1955
1956 *sizeP = prec * sizeof(LITTLENUM_TYPE);
1957 /* this loops outputs the LITTLENUMs in REVERSE order; in accord with
1958 the bigendian 386 */
1959 for(wordP = words + prec - 1;prec--;) {
1960 md_number_to_chars (litP, (long) (*wordP--), sizeof(LITTLENUM_TYPE));
1961 litP += sizeof(LITTLENUM_TYPE);
1962 }
1963 return ""; /* Someone should teach Dean about null pointers */
1964 }
1965 \f
1966 char output_invalid_buf[8];
1967
1968 static char * output_invalid (c)
1969 char c;
1970 {
1971 if (isprint(c)) sprintf (output_invalid_buf, "'%c'", c);
1972 else sprintf (output_invalid_buf, "(0x%x)", (unsigned) c);
1973 return output_invalid_buf;
1974 }
1975
1976 static reg_entry *parse_register (reg_string)
1977 char *reg_string; /* reg_string starts *before* REGISTER_PREFIX */
1978 {
1979 register char *s = reg_string;
1980 register char *p;
1981 char reg_name_given[MAX_REG_NAME_SIZE];
1982
1983 s++; /* skip REGISTER_PREFIX */
1984 for (p = reg_name_given; is_register_char (*s); p++, s++) {
1985 *p = register_chars [*s];
1986 if (p >= reg_name_given + MAX_REG_NAME_SIZE)
1987 return (reg_entry *) 0;
1988 }
1989 *p = '\0';
1990 return (reg_entry *) hash_find (reg_hash, reg_name_given);
1991 }
1992
1993
1994 /* We have no need to default values of symbols. */
1995
1996 /* ARGSUSED */
1997 symbolS *
1998 md_undefined_symbol (name)
1999 char *name;
2000 {
2001 return 0;
2002 }
2003
2004 /* Parse an operand that is machine-specific.
2005 We just return without modifying the expression if we have nothing
2006 to do. */
2007
2008 /* ARGSUSED */
2009 void
2010 md_operand (expressionP)
2011 expressionS *expressionP;
2012 {
2013 }
2014
2015 /* Round up a section size to the appropriate boundary. */
2016 long
2017 md_section_align (segment, size)
2018 segT segment;
2019 long size;
2020 {
2021 return size; /* Byte alignment is fine */
2022 }
2023
2024 /* Exactly what point is a PC-relative offset relative TO?
2025 On the i386, they're relative to the address of the offset, plus
2026 its size. (??? Is this right? FIXME-SOON!) */
2027 long
2028 md_pcrel_from (fixP)
2029 fixS *fixP;
2030 {
2031 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
2032 }
2033
2034 /* these were macros, but I don't trust macros that eval their
2035 arguments more than once. Besides, gcc can static inline them.
2036 xoxorich. */
2037
2038 static unsigned long mode_from_disp_size(t)
2039 unsigned long t;
2040 {
2041 return((t & (Disp8))
2042 ? 1
2043 : ((t & (Disp32)) ? 2 : 0));
2044 } /* mode_from_disp_size() */
2045
2046 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifyer */
2047
2048 static unsigned long opcode_suffix_to_type(s)
2049 unsigned long s;
2050 {
2051 return(s == BYTE_OPCODE_SUFFIX
2052 ? Byte : (s == WORD_OPCODE_SUFFIX
2053 ? Word : DWord));
2054 } /* opcode_suffix_to_type() */
2055
2056 static int fits_in_signed_byte(num)
2057 long num;
2058 {
2059 return((num >= -128) && (num <= 127));
2060 } /* fits_in_signed_byte() */
2061
2062 static int fits_in_unsigned_byte(num)
2063 long num;
2064 {
2065 return((num & 0xff) == num);
2066 } /* fits_in_unsigned_byte() */
2067
2068 static int fits_in_unsigned_word(num)
2069 long num;
2070 {
2071 return((num & 0xffff) == num);
2072 } /* fits_in_unsigned_word() */
2073
2074 static int fits_in_signed_word(num)
2075 long num;
2076 {
2077 return((-32768 <= num) && (num <= 32767));
2078 } /* fits_in_signed_word() */
2079
2080 static int smallest_imm_type(num)
2081 long num;
2082 {
2083 return((num == 1)
2084 ? (Imm1|Imm8|Imm8S|Imm16|Imm32)
2085 : (fits_in_signed_byte(num)
2086 ? (Imm8S|Imm8|Imm16|Imm32)
2087 : (fits_in_unsigned_byte(num)
2088 ? (Imm8|Imm16|Imm32)
2089 : ((fits_in_signed_word(num) || fits_in_unsigned_word(num))
2090 ? (Imm16|Imm32)
2091 : (Imm32)))));
2092 } /* smallest_imm_type() */
2093
2094 /*
2095 * Local Variables:
2096 * comment-column: 0
2097 * End:
2098 */
2099
2100 /* end of tc-i386.c */