1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 1991, 1992 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 Intel 80386 machine specific gas.
22 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
23 Bugs & suggestions are completely welcome. This is free software.
24 Please help us make it better.
32 #include "opcode/i386.h"
34 /* 'md_assemble ()' gathers together information and puts it into a
39 /* TM holds the template for the insn were currently assembling. */
41 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
43 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
45 /* OPERANDS gives the number of given operands. */
46 unsigned int operands
;
48 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
49 of given register, displacement, memory operands and immediate
51 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
53 /* TYPES [i] is the type (see above #defines) which tells us how to
54 search through DISPS [i] & IMMS [i] & REGS [i] for the required
56 unsigned int types
[MAX_OPERANDS
];
58 /* Displacements (if given) for each operand. */
59 expressionS
*disps
[MAX_OPERANDS
];
61 /* Immediate operands (if given) for each operand. */
62 expressionS
*imms
[MAX_OPERANDS
];
64 /* Register operands (if given) for each operand. */
65 reg_entry
*regs
[MAX_OPERANDS
];
67 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
68 the base index byte below. */
71 unsigned int log2_scale_factor
;
73 /* SEG gives the seg_entry of this insn. It is equal to zero unless
74 an explicit segment override is given. */
75 const seg_entry
*seg
; /* segment for memory operands (if given) */
77 /* PREFIX holds all the given prefix opcodes (usually null).
78 PREFIXES is the size of PREFIX. */
79 /* richfix: really unsigned? */
80 unsigned char prefix
[MAX_PREFIXES
];
81 unsigned int prefixes
;
83 /* RM and IB are the modrm byte and the base index byte where the
84 addressing modes of this insn are encoded. */
90 typedef struct _i386_insn i386_insn
;
92 /* This array holds the chars that always start a comment. If the
93 pre-processor is disabled, these aren't very useful */
95 const char comment_chars
[] = "#/";
97 const char comment_chars
[] = "#";
100 /* This array holds the chars that only start a comment at the beginning of
101 a line. If the line seems to have the form '# 123 filename'
102 .line and .file directives will appear in the pre-processed output */
103 /* Note that input_file.c hand checks for '#' at the beginning of the
104 first line of the input file. This is because the compiler outputs
105 #NO_APP at the beginning of its output. */
106 /* Also note that comments started like this one will always work if
107 '/' isn't otherwise defined. */
108 const char line_comment_chars
[] = "/"; /* removed '#' xoxorich. */
109 const char line_separator_chars
[] = "";
111 /* Chars that can be used to separate mant from exp in floating point nums */
112 const char EXP_CHARS
[] = "eE";
114 /* Chars that mean this number is a floating point constant */
117 const char FLT_CHARS
[] = "fFdDxX";
119 /* tables for lexical analysis */
120 static char opcode_chars
[256];
121 static char register_chars
[256];
122 static char operand_chars
[256];
123 static char space_chars
[256];
124 static char identifier_chars
[256];
125 static char digit_chars
[256];
128 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
129 #define is_operand_char(x) (operand_chars[(unsigned char) x])
130 #define is_register_char(x) (register_chars[(unsigned char) x])
131 #define is_space_char(x) (space_chars[(unsigned char) x])
132 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
133 #define is_digit_char(x) (digit_chars[(unsigned char) x])
135 /* put here all non-digit non-letter charcters that may occur in an operand */
136 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:";
138 static char *ordinal_names
[] = {"first", "second", "third"}; /* for printfs */
140 /* md_assemble() always leaves the strings it's passed unaltered. To
141 effect this we maintain a stack of saved characters that we've smashed
142 with '\0's (indicating end of strings for various sub-fields of the
143 assembler instruction). */
144 static char save_stack
[32];
145 static char *save_stack_p
; /* stack pointer */
146 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
147 #define RESTORE_END_STRING(s) *s = *--save_stack_p
149 /* The instruction we're assembling. */
152 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
153 static expressionS disp_expressions
[2], im_expressions
[2];
155 /* pointers to ebp & esp entries in reg_hash hash table */
156 static reg_entry
*ebp
, *esp
;
158 static int this_operand
; /* current operand we are working on */
160 /* Interface to relax_segment.
161 There are 2 relax states for 386 jump insns: one for conditional &
162 one for unconditional jumps. This is because the these two types
163 of jumps add different sizes to frags when we're figuring out what
164 sort of jump to choose to reach a given label. */
167 #define COND_JUMP 1 /* conditional jump */
168 #define UNCOND_JUMP 2 /* unconditional jump */
173 #define UNKNOWN_SIZE 3
177 #define INLINE __inline__
183 #define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size))
184 #define SIZE_FROM_RELAX_STATE(s) \
185 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
187 const relax_typeS md_relax_table
[] =
190 1) most positive reach of this state,
191 2) most negative reach of this state,
192 3) how many bytes this mode will add to the size of the current frag
193 4) which index into the table to try if we can't fit into this one.
200 /* For now we don't use word displacement jumps; they may be
202 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
203 /* word conditionals add 3 bytes to frag:
204 2 opcode prefix; 1 displacement bytes */
205 {32767 + 2, -32768 + 2, 3, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
206 /* dword conditionals adds 4 bytes to frag:
207 1 opcode prefix; 3 displacement bytes */
211 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
212 /* word jmp adds 2 bytes to frag:
213 1 opcode prefix; 1 displacement bytes */
214 {32767 + 2, -32768 + 2, 2, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
215 /* dword jmp adds 3 bytes to frag:
216 0 opcode prefix; 3 displacement bytes */
222 static char *output_invalid
PARAMS ((int c
));
223 static int i386_operand
PARAMS ((char *operand_string
));
224 static reg_entry
*parse_register
PARAMS ((char *reg_string
));
226 static void s_bss
PARAMS ((void));
229 static INLINE
unsigned long
230 mode_from_disp_size (t
)
233 return (t
& Disp8
) ? 1 : (t
& Disp32
) ? 2 : 0;
236 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifier */
238 static INLINE
unsigned long
239 opcode_suffix_to_type (s
)
242 return (s
== BYTE_OPCODE_SUFFIX
243 ? Byte
: (s
== WORD_OPCODE_SUFFIX
245 } /* opcode_suffix_to_type() */
248 fits_in_signed_byte (num
)
251 return (num
>= -128) && (num
<= 127);
252 } /* fits_in_signed_byte() */
255 fits_in_unsigned_byte (num
)
258 return (num
& 0xff) == num
;
259 } /* fits_in_unsigned_byte() */
262 fits_in_unsigned_word (num
)
265 return (num
& 0xffff) == num
;
266 } /* fits_in_unsigned_word() */
269 fits_in_signed_word (num
)
272 return (-32768 <= num
) && (num
<= 32767);
273 } /* fits_in_signed_word() */
276 smallest_imm_type (num
)
280 ? (Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
)
281 : fits_in_signed_byte (num
)
282 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
283 : fits_in_unsigned_byte (num
)
284 ? (Imm8
| Imm16
| Imm32
)
285 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
288 } /* smallest_imm_type() */
290 /* Ignore certain directives generated by gcc. This probably should
295 while (*input_line_pointer
&& *input_line_pointer
!= '\n')
296 input_line_pointer
++;
299 const pseudo_typeS md_pseudo_table
[] =
305 {"align", s_align_bytes
, 0},
307 {"align", s_align_ptwo
, 0},
309 {"ffloat", float_cons
, 'f'},
310 {"dfloat", float_cons
, 'd'},
311 {"tfloat", float_cons
, 'x'},
313 {"noopt", s_ignore
, 0},
314 {"optim", s_ignore
, 0},
318 /* for interface with expression () */
319 extern char *input_line_pointer
;
321 /* obstack for constructing various things in md_begin */
324 /* hash table for opcode lookup */
325 static struct hash_control
*op_hash
= (struct hash_control
*) 0;
326 /* hash table for register lookup */
327 static struct hash_control
*reg_hash
= (struct hash_control
*) 0;
328 /* hash table for prefix lookup */
329 static struct hash_control
*prefix_hash
= (struct hash_control
*) 0;
337 obstack_begin (&o
, 4096);
339 /* initialize op_hash hash table */
340 op_hash
= hash_new (); /* xmalloc handles error */
343 register const template *optab
;
344 register templates
*core_optab
;
347 optab
= i386_optab
; /* setup for loop */
348 prev_name
= optab
->name
;
349 obstack_grow (&o
, optab
, sizeof (template));
350 core_optab
= (templates
*) xmalloc (sizeof (templates
));
352 for (optab
++; optab
< i386_optab_end
; optab
++)
354 if (!strcmp (optab
->name
, prev_name
))
356 /* same name as before --> append to current template list */
357 obstack_grow (&o
, optab
, sizeof (template));
361 /* different name --> ship out current template list;
362 add to hash table; & begin anew */
363 /* Note: end must be set before start! since obstack_next_free
364 changes upon opstack_finish */
365 core_optab
->end
= (template *) obstack_next_free (&o
);
366 core_optab
->start
= (template *) obstack_finish (&o
);
367 hash_err
= hash_insert (op_hash
, prev_name
, (char *) core_optab
);
368 if (hash_err
&& *hash_err
)
371 as_fatal ("Internal Error: Can't hash %s: %s", prev_name
,
374 prev_name
= optab
->name
;
375 core_optab
= (templates
*) xmalloc (sizeof (templates
));
376 obstack_grow (&o
, optab
, sizeof (template));
381 /* initialize reg_hash hash table */
382 reg_hash
= hash_new ();
384 register const reg_entry
*regtab
;
386 for (regtab
= i386_regtab
; regtab
< i386_regtab_end
; regtab
++)
388 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, regtab
);
389 if (hash_err
&& *hash_err
)
394 esp
= (reg_entry
*) hash_find (reg_hash
, "esp");
395 ebp
= (reg_entry
*) hash_find (reg_hash
, "ebp");
397 /* initialize reg_hash hash table */
398 prefix_hash
= hash_new ();
400 register const prefix_entry
*prefixtab
;
402 for (prefixtab
= i386_prefixtab
;
403 prefixtab
< i386_prefixtab_end
; prefixtab
++)
405 hash_err
= hash_insert (prefix_hash
, prefixtab
->prefix_name
, prefixtab
);
406 if (hash_err
&& *hash_err
)
411 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
413 register unsigned int c
;
415 memset (opcode_chars
, '\0', sizeof (opcode_chars
));
416 memset (operand_chars
, '\0', sizeof (operand_chars
));
417 memset (space_chars
, '\0', sizeof (space_chars
));
418 memset (identifier_chars
, '\0', sizeof (identifier_chars
));
419 memset (digit_chars
, '\0', sizeof (digit_chars
));
421 for (c
= 0; c
< 256; c
++)
423 if (islower (c
) || isdigit (c
))
426 register_chars
[c
] = c
;
428 else if (isupper (c
))
430 opcode_chars
[c
] = tolower (c
);
431 register_chars
[c
] = opcode_chars
[c
];
433 else if (c
== PREFIX_SEPERATOR
)
437 else if (c
== ')' || c
== '(')
439 register_chars
[c
] = c
;
442 if (isupper (c
) || islower (c
) || isdigit (c
))
443 operand_chars
[c
] = c
;
444 else if (c
&& strchr (operand_special_chars
, c
))
445 operand_chars
[c
] = c
;
447 if (isdigit (c
) || c
== '-')
450 if (isalpha (c
) || c
== '_' || c
== '.' || isdigit (c
))
451 identifier_chars
[c
] = c
;
453 if (c
== ' ' || c
== '\t')
462 } /* not much to do here. */
467 /* debugging routines for md_assemble */
468 /* static void pi (), pte (), pt (), pe (), ps (); */
475 register template *p
;
478 fprintf (stdout
, "%s: template ", line
);
480 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
481 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
482 fprintf (stdout
, " base %x index %x scale %x\n",
483 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
484 for (i
= 0; i
< x
->operands
; i
++)
486 fprintf (stdout
, " #%d: ", i
+ 1);
488 fprintf (stdout
, "\n");
489 if (x
->types
[i
] & Reg
)
490 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
491 if (x
->types
[i
] & Imm
)
493 if (x
->types
[i
] & (Disp
| Abs
))
503 fprintf (stdout
, " %d operands ", t
->operands
);
504 fprintf (stdout
, "opcode %x ",
506 if (t
->extension_opcode
!= None
)
507 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
508 if (t
->opcode_modifier
& D
)
509 fprintf (stdout
, "D");
510 if (t
->opcode_modifier
& W
)
511 fprintf (stdout
, "W");
512 fprintf (stdout
, "\n");
513 for (i
= 0; i
< t
->operands
; i
++)
515 fprintf (stdout
, " #%d type ", i
+ 1);
516 pt (t
->operand_types
[i
]);
517 fprintf (stdout
, "\n");
525 fprintf (stdout
, " segment %s\n", segment_name (e
->X_seg
));
526 fprintf (stdout
, " add_number %d (%x)\n",
527 e
->X_add_number
, e
->X_add_number
);
530 fprintf (stdout
, " add_symbol ");
531 ps (e
->X_add_symbol
);
532 fprintf (stdout
, "\n");
534 if (e
->X_subtract_symbol
)
536 fprintf (stdout
, " sub_symbol ");
537 ps (e
->X_subtract_symbol
);
538 fprintf (stdout
, "\n");
546 fprintf (stdout
, "%s type %s%s",
548 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
549 segment_name (S_GET_SEGMENT (s
)));
570 { BaseIndex
, "BaseIndex" },
580 { InOutPortReg
, "InOutPortReg" },
581 { ShiftCount
, "ShiftCount" },
583 { Control
, "control reg" },
584 { Test
, "test reg" },
585 { FloatReg
, "FReg" },
586 { FloatAcc
, "FAcc" },
587 { JumpAbsolute
, "Jump Absolute" },
595 register struct type_name
*ty
;
599 fprintf (stdout
, "Unknown");
603 for (ty
= type_names
; ty
->mask
; ty
++)
605 fprintf (stdout
, "%s, ", ty
->tname
);
610 #endif /* DEBUG386 */
613 static bfd_reloc_code_real_type
621 case 1: return BFD_RELOC_8_PCREL
;
622 case 2: return BFD_RELOC_16_PCREL
;
623 case 4: return BFD_RELOC_32_PCREL
;
628 case 1: return BFD_RELOC_8
;
629 case 2: return BFD_RELOC_16
;
630 case 4: return BFD_RELOC_32
;
636 /* This is the guts of the machine-dependent assembler. LINE points to a
637 machine dependent instruction. This function is supposed to emit
638 the frags/bytes it assembles to. */
643 /* Holds temlate once we've found it. */
644 register template *t
;
646 /* Possible templates for current insn */
647 templates
*current_templates
= (templates
*) 0;
649 /* Initialize globals. */
650 memset (&i
, '\0', sizeof (i
));
651 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
652 memset (im_expressions
, '\0', sizeof (im_expressions
));
653 save_stack_p
= save_stack
; /* reset stack pointer */
655 /* Fist parse an opcode & call i386_operand for the operands.
656 We assume that the scrubber has arranged it so that line[0] is the valid
657 start of a (possibly prefixed) opcode. */
659 register char *l
= line
; /* Fast place to put LINE. */
661 /* 1 if operand is pending after ','. */
662 unsigned int expecting_operand
= 0;
663 /* 1 if we found a prefix only acceptable with string insns. */
664 unsigned int expecting_string_instruction
= 0;
665 /* Non-zero if operand parens not balenced. */
666 unsigned int paren_not_balenced
;
667 char *token_start
= l
;
669 while (!is_space_char (*l
) && *l
!= END_OF_INSN
)
671 if (!is_opcode_char (*l
))
673 as_bad ("invalid character %s in opcode", output_invalid (*l
));
676 else if (*l
!= PREFIX_SEPERATOR
)
678 *l
= opcode_chars
[(unsigned char) *l
]; /* fold case of opcodes */
682 { /* this opcode's got a prefix */
683 register unsigned int q
;
684 register prefix_entry
*prefix
;
686 if (l
== token_start
)
688 as_bad ("expecting prefix; got nothing");
691 END_STRING_AND_SAVE (l
);
692 prefix
= (prefix_entry
*) hash_find (prefix_hash
, token_start
);
695 as_bad ("no such opcode prefix ('%s')", token_start
);
698 RESTORE_END_STRING (l
);
699 /* check for repeated prefix */
700 for (q
= 0; q
< i
.prefixes
; q
++)
701 if (i
.prefix
[q
] == prefix
->prefix_code
)
703 as_bad ("same prefix used twice; you don't really want this!");
706 if (i
.prefixes
== MAX_PREFIXES
)
708 as_bad ("too many opcode prefixes");
711 i
.prefix
[i
.prefixes
++] = prefix
->prefix_code
;
712 if (prefix
->prefix_code
== REPE
|| prefix
->prefix_code
== REPNE
)
713 expecting_string_instruction
= 1;
714 /* skip past PREFIX_SEPERATOR and reset token_start */
718 END_STRING_AND_SAVE (l
);
719 if (token_start
== l
)
721 as_bad ("expecting opcode; got nothing");
725 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
726 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
727 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
728 if (!current_templates
)
730 int last_index
= strlen (token_start
) - 1;
731 char last_char
= token_start
[last_index
];
734 case DWORD_OPCODE_SUFFIX
:
735 case WORD_OPCODE_SUFFIX
:
736 case BYTE_OPCODE_SUFFIX
:
737 token_start
[last_index
] = '\0';
738 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
739 token_start
[last_index
] = last_char
;
740 i
.suffix
= last_char
;
742 if (!current_templates
)
744 as_bad ("no such 386 instruction: `%s'", token_start
);
748 RESTORE_END_STRING (l
);
750 /* check for rep/repne without a string instruction */
751 if (expecting_string_instruction
&&
752 !IS_STRING_INSTRUCTION (current_templates
->
755 as_bad ("expecting string instruction after rep/repne");
759 /* There may be operands to parse. */
760 if (*l
!= END_OF_INSN
&&
761 /* For string instructions, we ignore any operands if given. This
762 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
763 the operands are always going to be the same, and are not really
764 encoded in machine code. */
765 !IS_STRING_INSTRUCTION (current_templates
->
771 /* skip optional white space before operand */
772 while (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
774 if (!is_space_char (*l
))
776 as_bad ("invalid character %s before %s operand",
778 ordinal_names
[i
.operands
]);
783 token_start
= l
; /* after white space */
784 paren_not_balenced
= 0;
785 while (paren_not_balenced
|| *l
!= ',')
787 if (*l
== END_OF_INSN
)
789 if (paren_not_balenced
)
791 as_bad ("unbalenced parenthesis in %s operand.",
792 ordinal_names
[i
.operands
]);
796 break; /* we are done */
798 else if (!is_operand_char (*l
))
800 as_bad ("invalid character %s in %s operand",
802 ordinal_names
[i
.operands
]);
806 ++paren_not_balenced
;
808 --paren_not_balenced
;
811 if (l
!= token_start
)
812 { /* yes, we've read in another operand */
813 unsigned int operand_ok
;
814 this_operand
= i
.operands
++;
815 if (i
.operands
> MAX_OPERANDS
)
817 as_bad ("spurious operands; (%d operands/instruction max)",
821 /* now parse operand adding info to 'i' as we go along */
822 END_STRING_AND_SAVE (l
);
823 operand_ok
= i386_operand (token_start
);
824 RESTORE_END_STRING (l
); /* restore old contents */
830 if (expecting_operand
)
832 expecting_operand_after_comma
:
833 as_bad ("expecting operand after ','; got nothing");
838 as_bad ("expecting operand before ','; got nothing");
843 /* now *l must be either ',' or END_OF_INSN */
846 if (*++l
== END_OF_INSN
)
847 { /* just skip it, if it's \n complain */
848 goto expecting_operand_after_comma
;
850 expecting_operand
= 1;
853 while (*l
!= END_OF_INSN
); /* until we get end of insn */
857 /* Now we've parsed the opcode into a set of templates, and have the
860 Next, we find a template that matches the given insn,
861 making sure the overlap of the given operands types is consistent
862 with the template operand types. */
864 #define MATCH(overlap,given_type) \
866 (((overlap & (JumpAbsolute|BaseIndex|Mem8)) \
867 == (given_type & (JumpAbsolute|BaseIndex|Mem8))) \
868 || (overlap == InOutPortReg)))
871 /* If m0 and m1 are register matches they must be consistent
872 with the expected operand types t0 and t1.
873 That is, if both m0 & m1 are register matches
874 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
875 then, either 1. or 2. must be true:
876 1. the expected operand type register overlap is null:
879 the given register overlap is null:
881 2. the expected operand type register overlap == the given
882 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
884 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
885 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
886 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
887 ((t0 & t1) & (m0 & m1) & (Reg)) \
890 register unsigned int overlap0
, overlap1
;
892 unsigned int overlap2
;
893 unsigned int found_reverse_match
;
895 overlap0
= overlap1
= overlap2
= found_reverse_match
= 0;
896 for (t
= current_templates
->start
;
897 t
< current_templates
->end
;
901 /* must have right number of operands */
902 if (i
.operands
!= t
->operands
)
904 else if (!t
->operands
)
905 break; /* 0 operands always matches */
907 overlap0
= i
.types
[0] & t
->operand_types
[0];
911 if (!MATCH (overlap0
, i
.types
[0]))
916 overlap1
= i
.types
[1] & t
->operand_types
[1];
917 if (!MATCH (overlap0
, i
.types
[0]) ||
918 !MATCH (overlap1
, i
.types
[1]) ||
919 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
921 t
->operand_types
[1]))
924 /* check if other direction is valid ... */
925 if (!(t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
))
928 /* try reversing direction of operands */
929 overlap0
= i
.types
[0] & t
->operand_types
[1];
930 overlap1
= i
.types
[1] & t
->operand_types
[0];
931 if (!MATCH (overlap0
, i
.types
[0]) ||
932 !MATCH (overlap1
, i
.types
[1]) ||
933 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
935 t
->operand_types
[1]))
937 /* does not match either direction */
940 /* found a reverse match here -- slip through */
941 /* found_reverse_match holds which of D or FloatD we've found */
942 found_reverse_match
= t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
;
943 } /* endif: not forward match */
944 /* found either forward/reverse 2 operand match here */
945 if (t
->operands
== 3)
947 overlap2
= i
.types
[2] & t
->operand_types
[2];
948 if (!MATCH (overlap2
, i
.types
[2]) ||
949 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap2
,
951 t
->operand_types
[2]) ||
952 !CONSISTENT_REGISTER_MATCH (overlap1
, overlap2
,
954 t
->operand_types
[2]))
957 /* found either forward/reverse 2 or 3 operand match here:
958 slip through to break */
960 break; /* we've found a match; break out of loop */
962 if (t
== current_templates
->end
)
963 { /* we found no match */
964 as_bad ("operands given don't match any known 386 instruction");
968 /* Copy the template we found (we may change it!). */
969 memcpy (&i
.tm
, t
, sizeof (template));
970 t
= &i
.tm
; /* alter new copy of template */
972 /* If there's no opcode suffix we try to invent one based on register
974 if (!i
.suffix
&& i
.reg_operands
)
976 /* We take i.suffix from the LAST register operand specified. This
977 assumes that the last register operands is the destination register
980 for (o
= 0; o
< MAX_OPERANDS
; o
++)
981 if (i
.types
[o
] & Reg
)
983 i
.suffix
= (i
.types
[o
] == Reg8
) ? BYTE_OPCODE_SUFFIX
:
984 (i
.types
[o
] == Reg16
) ? WORD_OPCODE_SUFFIX
:
989 /* Make still unresolved immediate matches conform to size of immediate
990 given in i.suffix. Note: overlap2 cannot be an immediate!
992 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
993 && overlap0
!= Imm8
&& overlap0
!= Imm8S
994 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
998 as_bad ("no opcode suffix given; can't determine immediate size");
1001 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1002 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1004 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1005 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1006 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1010 as_bad ("no opcode suffix given; can't determine immediate size");
1013 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1014 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1017 i
.types
[0] = overlap0
;
1018 i
.types
[1] = overlap1
;
1019 i
.types
[2] = overlap2
;
1021 if (overlap0
& ImplicitRegister
)
1023 if (overlap1
& ImplicitRegister
)
1025 if (overlap2
& ImplicitRegister
)
1027 if (overlap0
& Imm1
)
1028 i
.imm_operands
= 0; /* kludge for shift insns */
1030 if (found_reverse_match
)
1033 save
= t
->operand_types
[0];
1034 t
->operand_types
[0] = t
->operand_types
[1];
1035 t
->operand_types
[1] = save
;
1038 /* Finalize opcode. First, we change the opcode based on the operand
1039 size given by i.suffix: we never have to change things for byte insns,
1040 or when no opcode suffix is need to size the operands. */
1042 if (!i
.suffix
&& (t
->opcode_modifier
& W
))
1044 as_bad ("no opcode suffix given and no register operands; can't size instruction");
1048 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1050 /* Select between byte and word/dword operations. */
1051 if (t
->opcode_modifier
& W
)
1052 t
->base_opcode
|= W
;
1053 /* Now select between word & dword operations via the
1054 operand size prefix. */
1055 if (i
.suffix
== WORD_OPCODE_SUFFIX
)
1057 if (i
.prefixes
== MAX_PREFIXES
)
1059 as_bad ("%d prefixes given and 'w' opcode suffix gives too many prefixes",
1063 i
.prefix
[i
.prefixes
++] = WORD_PREFIX_OPCODE
;
1067 /* For insns with operands there are more diddles to do to the opcode. */
1070 /* If we found a reverse match we must alter the opcode direction bit
1071 found_reverse_match holds bit to set (different for int &
1074 if (found_reverse_match
)
1076 t
->base_opcode
|= found_reverse_match
;
1079 /* The imul $imm, %reg instruction is converted into
1080 imul $imm, %reg, %reg. */
1081 if (t
->opcode_modifier
& imulKludge
)
1083 /* Pretend we saw the 3 operand case. */
1084 i
.regs
[2] = i
.regs
[1];
1088 /* Certain instructions expect the destination to be in the i.rm.reg
1089 field. This is by far the exceptional case. For these
1090 instructions, if the source operand is a register, we must reverse
1091 the i.rm.reg and i.rm.regmem fields. We accomplish this by faking
1092 that the two register operands were given in the reverse order. */
1093 if ((t
->opcode_modifier
& ReverseRegRegmem
) && i
.reg_operands
== 2)
1095 unsigned int first_reg_operand
= (i
.types
[0] & Reg
) ? 0 : 1;
1096 unsigned int second_reg_operand
= first_reg_operand
+ 1;
1097 reg_entry
*tmp
= i
.regs
[first_reg_operand
];
1098 i
.regs
[first_reg_operand
] = i
.regs
[second_reg_operand
];
1099 i
.regs
[second_reg_operand
] = tmp
;
1102 if (t
->opcode_modifier
& ShortForm
)
1104 /* The register or float register operand is in operand 0 or 1. */
1105 unsigned int o
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1106 /* Register goes in low 3 bits of opcode. */
1107 t
->base_opcode
|= i
.regs
[o
]->reg_num
;
1109 else if (t
->opcode_modifier
& ShortFormW
)
1111 /* Short form with 0x8 width bit. Register is always dest. operand */
1112 t
->base_opcode
|= i
.regs
[1]->reg_num
;
1113 if (i
.suffix
== WORD_OPCODE_SUFFIX
||
1114 i
.suffix
== DWORD_OPCODE_SUFFIX
)
1115 t
->base_opcode
|= 0x8;
1117 else if (t
->opcode_modifier
& Seg2ShortForm
)
1119 if (t
->base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1121 as_bad ("you can't 'pop cs' on the 386.");
1124 t
->base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1126 else if (t
->opcode_modifier
& Seg3ShortForm
)
1128 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
1129 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
1130 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
1131 to change the opcode. */
1132 if (i
.regs
[0]->reg_num
== 5)
1133 t
->base_opcode
|= 0x08;
1135 else if (t
->opcode_modifier
& Modrm
)
1137 /* The opcode is completed (modulo t->extension_opcode which must
1138 be put into the modrm byte.
1139 Now, we make the modrm & index base bytes based on all the info
1142 /* i.reg_operands MUST be the number of real register operands;
1143 implicit registers do not count. */
1144 if (i
.reg_operands
== 2)
1146 unsigned int source
, dest
;
1147 source
= (i
.types
[0] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 0 : 1;
1150 /* We must be careful to make sure that all
1151 segment/control/test/debug registers go into the i.rm.reg
1152 field (despite the whether they are source or destination
1154 if (i
.regs
[dest
]->reg_type
& (SReg2
| SReg3
| Control
| Debug
| Test
))
1156 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1157 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1161 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1162 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1166 { /* if it's not 2 reg operands... */
1169 unsigned int fake_zero_displacement
= 0;
1170 unsigned int o
= (i
.types
[0] & Mem
) ? 0 : ((i
.types
[1] & Mem
) ? 1 : 2);
1172 /* Encode memory operand into modrm byte and base index
1175 if (i
.base_reg
== esp
&& !i
.index_reg
)
1177 /* <disp>(%esp) becomes two byte modrm with no index
1179 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1180 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1181 i
.bi
.base
= ESP_REG_NUM
;
1182 i
.bi
.index
= NO_INDEX_REGISTER
;
1183 i
.bi
.scale
= 0; /* Must be zero! */
1185 else if (i
.base_reg
== ebp
&& !i
.index_reg
)
1187 if (!(i
.types
[o
] & Disp
))
1189 /* Must fake a zero byte displacement. There is
1190 no direct way to code '(%ebp)' directly. */
1191 fake_zero_displacement
= 1;
1192 /* fake_zero_displacement code does not set this. */
1193 i
.types
[o
] |= Disp8
;
1195 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1196 i
.rm
.regmem
= EBP_REG_NUM
;
1198 else if (!i
.base_reg
&& (i
.types
[o
] & BaseIndex
))
1200 /* There are three cases here.
1201 Case 1: '<32bit disp>(,1)' -- indirect absolute.
1202 (Same as cases 2 & 3 with NO index register)
1203 Case 2: <32bit disp> (,<index>) -- no base register with disp
1204 Case 3: (, <index>) --- no base register;
1205 no disp (must add 32bit 0 disp). */
1206 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1207 i
.rm
.mode
= 0; /* 32bit mode */
1208 i
.bi
.base
= NO_BASE_REGISTER
;
1209 i
.types
[o
] &= ~Disp
;
1210 i
.types
[o
] |= Disp32
; /* Must be 32bit! */
1212 { /* case 2 or case 3 */
1213 i
.bi
.index
= i
.index_reg
->reg_num
;
1214 i
.bi
.scale
= i
.log2_scale_factor
;
1215 if (i
.disp_operands
== 0)
1216 fake_zero_displacement
= 1; /* case 3 */
1220 i
.bi
.index
= NO_INDEX_REGISTER
;
1224 else if (i
.disp_operands
&& !i
.base_reg
&& !i
.index_reg
)
1226 /* Operand is just <32bit disp> */
1227 i
.rm
.regmem
= EBP_REG_NUM
;
1229 i
.types
[o
] &= ~Disp
;
1230 i
.types
[o
] |= Disp32
;
1234 /* It's not a special case; rev'em up. */
1235 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1236 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1239 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1240 i
.bi
.base
= i
.base_reg
->reg_num
;
1241 i
.bi
.index
= i
.index_reg
->reg_num
;
1242 i
.bi
.scale
= i
.log2_scale_factor
;
1243 if (i
.base_reg
== ebp
&& i
.disp_operands
== 0)
1245 fake_zero_displacement
= 1;
1246 i
.types
[o
] |= Disp8
;
1247 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1251 if (fake_zero_displacement
)
1253 /* Fakes a zero displacement assuming that i.types[o]
1254 holds the correct displacement size. */
1255 exp
= &disp_expressions
[i
.disp_operands
++];
1257 exp
->X_seg
= absolute_section
;
1258 exp
->X_add_number
= 0;
1259 exp
->X_add_symbol
= (symbolS
*) 0;
1260 exp
->X_subtract_symbol
= (symbolS
*) 0;
1263 /* Select the correct segment for the memory operand. */
1266 unsigned int seg_index
;
1267 const seg_entry
*default_seg
;
1269 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
)
1271 seg_index
= (i
.rm
.mode
<< 3) | i
.bi
.base
;
1272 default_seg
= two_byte_segment_defaults
[seg_index
];
1276 seg_index
= (i
.rm
.mode
<< 3) | i
.rm
.regmem
;
1277 default_seg
= one_byte_segment_defaults
[seg_index
];
1279 /* If the specified segment is not the default, use an
1280 opcode prefix to select it */
1281 if (i
.seg
!= default_seg
)
1283 if (i
.prefixes
== MAX_PREFIXES
)
1285 as_bad ("%d prefixes given and %s segment override gives too many prefixes",
1286 MAX_PREFIXES
, i
.seg
->seg_name
);
1289 i
.prefix
[i
.prefixes
++] = i
.seg
->seg_prefix
;
1294 /* Fill in i.rm.reg or i.rm.regmem field with register operand
1295 (if any) based on t->extension_opcode. Again, we must be
1296 careful to make sure that segment/control/debug/test
1297 registers are coded into the i.rm.reg field. */
1301 (i
.types
[0] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 0 :
1302 (i
.types
[1] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 1 : 2;
1303 /* If there is an extension opcode to put here, the
1304 register number must be put into the regmem field. */
1305 if (t
->extension_opcode
!= None
)
1306 i
.rm
.regmem
= i
.regs
[o
]->reg_num
;
1308 i
.rm
.reg
= i
.regs
[o
]->reg_num
;
1310 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1311 we must set it to 3 to indicate this is a register
1312 operand int the regmem field */
1313 if (!i
.mem_operands
)
1317 /* Fill in i.rm.reg field with extension opcode (if any). */
1318 if (t
->extension_opcode
!= None
)
1319 i
.rm
.reg
= t
->extension_opcode
;
1325 /* Handle conversion of 'int $3' --> special int3 insn. */
1326 if (t
->base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1328 t
->base_opcode
= INT3_OPCODE
;
1332 /* We are ready to output the insn. */
1337 if (t
->opcode_modifier
& Jump
)
1339 int n
= i
.disps
[0]->X_add_number
;
1342 seg
= i
.disps
[0]->X_seg
;
1344 if (seg
== absolute_section
)
1346 if (fits_in_signed_byte (n
))
1349 p
[0] = t
->base_opcode
;
1352 #if 0 /* leave out 16 bit jumps - pace */
1353 else if (fits_in_signed_word (n
))
1356 p
[0] = WORD_PREFIX_OPCODE
;
1357 p
[1] = t
->base_opcode
;
1358 md_number_to_chars (&p
[2], n
, 2);
1362 { /* It's an absolute dword displacement. */
1363 if (t
->base_opcode
== JUMP_PC_RELATIVE
)
1365 /* unconditional jump */
1368 md_number_to_chars (&p
[1], n
, 4);
1372 /* conditional jump */
1374 p
[0] = TWO_BYTE_OPCODE_ESCAPE
;
1375 p
[1] = t
->base_opcode
+ 0x10;
1376 md_number_to_chars (&p
[2], n
, 4);
1382 /* It's a symbol; end frag & setup for relax.
1383 Make sure there are more than 6 chars left in the current frag;
1384 if not we'll have to start a new one. */
1385 if (obstack_room (&frags
) <= 6)
1387 frag_wane (frag_now
);
1391 p
[0] = t
->base_opcode
;
1392 frag_var (rs_machine_dependent
,
1393 6, /* 2 opcode/prefix + 4 displacement */
1395 ((unsigned char) *p
== JUMP_PC_RELATIVE
1396 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
)
1397 : ENCODE_RELAX_STATE (COND_JUMP
, BYTE
)),
1398 i
.disps
[0]->X_add_symbol
,
1402 else if (t
->opcode_modifier
& (JumpByte
| JumpDword
))
1404 int size
= (t
->opcode_modifier
& JumpByte
) ? 1 : 4;
1405 int n
= i
.disps
[0]->X_add_number
;
1407 if (fits_in_unsigned_byte (t
->base_opcode
))
1409 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1413 p
= frag_more (2); /* opcode can be at most two bytes */
1414 /* put out high byte first: can't use md_number_to_chars! */
1415 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1416 *p
= t
->base_opcode
& 0xff;
1419 p
= frag_more (size
);
1420 if (i
.disps
[0]->X_seg
== absolute_section
)
1422 md_number_to_chars (p
, n
, size
);
1423 if (size
== 1 && !fits_in_signed_byte (n
))
1425 as_bad ("loop/jecx only takes byte displacement; %d shortened to %d",
1431 fix_new (frag_now
, p
- frag_now
->fr_literal
, size
,
1432 i
.disps
[0]->X_add_symbol
, i
.disps
[0]->X_subtract_symbol
,
1433 i
.disps
[0]->X_add_number
, 1, NO_RELOC
);
1436 else if (t
->opcode_modifier
& JumpInterSegment
)
1438 p
= frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1439 p
[0] = t
->base_opcode
;
1440 if (i
.imms
[1]->X_seg
== absolute_section
)
1441 md_number_to_chars (p
+ 1, i
.imms
[1]->X_add_number
, 4);
1443 fix_new (frag_now
, p
+ 1 - frag_now
->fr_literal
, 4,
1444 i
.imms
[1]->X_add_symbol
,
1445 i
.imms
[1]->X_subtract_symbol
,
1446 i
.imms
[1]->X_add_number
, 0, NO_RELOC
);
1447 if (i
.imms
[0]->X_seg
!= absolute_section
)
1448 as_bad ("can't handle non absolute segment in long call/jmp");
1449 md_number_to_chars (p
+ 5, i
.imms
[0]->X_add_number
, 2);
1453 /* Output normal instructions here. */
1456 /* First the prefix bytes. */
1457 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1460 md_number_to_chars (p
, (unsigned int) *q
, 1);
1463 /* Now the opcode; be careful about word order here! */
1464 if (fits_in_unsigned_byte (t
->base_opcode
))
1466 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1468 else if (fits_in_unsigned_word (t
->base_opcode
))
1471 /* put out high byte first: can't use md_number_to_chars! */
1472 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1473 *p
= t
->base_opcode
& 0xff;
1476 { /* opcode is either 3 or 4 bytes */
1477 if (t
->base_opcode
& 0xff000000)
1480 *p
++ = (t
->base_opcode
>> 24) & 0xff;
1484 *p
++ = (t
->base_opcode
>> 16) & 0xff;
1485 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1486 *p
= (t
->base_opcode
) & 0xff;
1489 /* Now the modrm byte and base index byte (if present). */
1490 if (t
->opcode_modifier
& Modrm
)
1493 /* md_number_to_chars (p, i.rm, 1); */
1494 md_number_to_chars (p
, (i
.rm
.regmem
<< 0 | i
.rm
.reg
<< 3 | i
.rm
.mode
<< 6), 1);
1495 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1496 ==> need second modrm byte. */
1497 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
&& i
.rm
.mode
!= 3)
1500 /* md_number_to_chars (p, i.bi, 1); */
1501 md_number_to_chars (p
, (i
.bi
.base
<< 0 | i
.bi
.index
<< 3 | i
.bi
.scale
<< 6), 1);
1505 if (i
.disp_operands
)
1507 register unsigned int n
;
1509 for (n
= 0; n
< i
.operands
; n
++)
1513 if (i
.disps
[n
]->X_seg
== absolute_section
)
1515 if (i
.types
[n
] & (Disp8
| Abs8
))
1518 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 1);
1520 else if (i
.types
[n
] & (Disp16
| Abs16
))
1523 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 2);
1526 { /* Disp32|Abs32 */
1528 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 4);
1532 { /* not absolute_section */
1533 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1535 fix_new (frag_now
, p
- frag_now
->fr_literal
, 4,
1536 i
.disps
[n
]->X_add_symbol
, i
.disps
[n
]->X_subtract_symbol
,
1537 i
.disps
[n
]->X_add_number
, 0, NO_RELOC
);
1541 } /* end displacement output */
1543 /* output immediate */
1546 register unsigned int n
;
1548 for (n
= 0; n
< i
.operands
; n
++)
1552 if (i
.imms
[n
]->X_seg
== absolute_section
)
1554 if (i
.types
[n
] & (Imm8
| Imm8S
))
1557 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 1);
1559 else if (i
.types
[n
] & Imm16
)
1562 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 2);
1567 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 4);
1571 { /* not absolute_section */
1572 /* need a 32-bit fixup (don't support 8bit non-absolute ims) */
1573 /* try to support other sizes ... */
1575 if (i
.types
[n
] & (Imm8
| Imm8S
))
1577 else if (i
.types
[n
] & Imm16
)
1581 p
= frag_more (size
);
1582 fix_new (frag_now
, p
- frag_now
->fr_literal
, size
,
1583 i
.imms
[n
]->X_add_symbol
, i
.imms
[n
]->X_subtract_symbol
,
1584 i
.imms
[n
]->X_add_number
, 0, NO_RELOC
);
1588 } /* end immediate output */
1596 #endif /* DEBUG386 */
1602 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1606 i386_operand (operand_string
)
1607 char *operand_string
;
1609 register char *op_string
= operand_string
;
1611 /* Address of '\0' at end of operand_string. */
1612 char *end_of_operand_string
= operand_string
+ strlen (operand_string
);
1614 /* Start and end of displacement string expression (if found). */
1615 char *displacement_string_start
= NULL
;
1616 char *displacement_string_end
= NULL
;
1618 /* We check for an absolute prefix (differentiating,
1619 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1620 if (*op_string
== ABSOLUTE_PREFIX
)
1623 i
.types
[this_operand
] |= JumpAbsolute
;
1626 /* Check if operand is a register. */
1627 if (*op_string
== REGISTER_PREFIX
)
1629 register reg_entry
*r
;
1630 if (!(r
= parse_register (op_string
)))
1632 as_bad ("bad register name ('%s')", op_string
);
1635 /* Check for segment override, rather than segment register by
1636 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1637 if ((r
->reg_type
& (SReg2
| SReg3
)) && op_string
[3] == ':')
1642 i
.seg
= (seg_entry
*) & es
;
1645 i
.seg
= (seg_entry
*) & cs
;
1648 i
.seg
= (seg_entry
*) & ss
;
1651 i
.seg
= (seg_entry
*) & ds
;
1654 i
.seg
= (seg_entry
*) & fs
;
1657 i
.seg
= (seg_entry
*) & gs
;
1660 op_string
+= 4; /* skip % <x> s : */
1661 operand_string
= op_string
; /* Pretend given string starts here. */
1662 if (!is_digit_char (*op_string
) && !is_identifier_char (*op_string
)
1663 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
)
1665 as_bad ("bad memory operand after segment override");
1668 /* Handle case of %es:*foo. */
1669 if (*op_string
== ABSOLUTE_PREFIX
)
1672 i
.types
[this_operand
] |= JumpAbsolute
;
1674 goto do_memory_reference
;
1676 i
.types
[this_operand
] |= r
->reg_type
;
1677 i
.regs
[this_operand
] = r
;
1680 else if (*op_string
== IMMEDIATE_PREFIX
)
1681 { /* ... or an immediate */
1682 char *save_input_line_pointer
;
1686 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
1688 as_bad ("only 1 or 2 immediate operands are allowed");
1692 exp
= &im_expressions
[i
.imm_operands
++];
1693 i
.imms
[this_operand
] = exp
;
1694 save_input_line_pointer
= input_line_pointer
;
1695 input_line_pointer
= ++op_string
; /* must advance op_string! */
1696 exp_seg
= expression (exp
);
1697 input_line_pointer
= save_input_line_pointer
;
1699 if (exp_seg
== absent_section
)
1701 /* missing or bad expr becomes absolute 0 */
1702 as_bad ("missing or invalid immediate expression '%s' taken as 0",
1704 exp
->X_seg
= absolute_section
;
1705 exp
->X_add_number
= 0;
1706 exp
->X_add_symbol
= (symbolS
*) 0;
1707 exp
->X_subtract_symbol
= (symbolS
*) 0;
1708 i
.types
[this_operand
] |= Imm
;
1710 else if (exp_seg
== absolute_section
)
1712 i
.types
[this_operand
] |= smallest_imm_type (exp
->X_add_number
);
1715 else if (exp_seg
!= text_section
1716 && exp_seg
!= data_section
1717 && exp_seg
!= bss_section
1718 && exp_seg
!= undefined_section
1719 #ifdef BFD_ASSEMBLER
1720 && ! bfd_is_com_section (exp_seg
)
1725 as_bad ("Unimplemented segment type %d in parse_operand", exp_seg
);
1731 /* this is an address ==> 32bit */
1732 i
.types
[this_operand
] |= Imm32
;
1734 /* shorten this type of this operand if the instruction wants
1735 * fewer bits than are present in the immediate. The bit field
1736 * code can put out 'andb $0xffffff, %al', for example. pace
1737 * also 'movw $foo,(%eax)'
1741 case WORD_OPCODE_SUFFIX
:
1742 i
.types
[this_operand
] |= Imm16
;
1744 case BYTE_OPCODE_SUFFIX
:
1745 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
1749 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
1750 || *op_string
== '(')
1752 /* This is a memory reference of some sort. */
1753 register char *base_string
;
1754 unsigned int found_base_index_form
;
1756 do_memory_reference
:
1757 if (i
.mem_operands
== MAX_MEMORY_OPERANDS
)
1759 as_bad ("more than 1 memory reference in instruction");
1764 /* Determine type of memory operand from opcode_suffix;
1765 no opcode suffix implies general memory references. */
1768 case BYTE_OPCODE_SUFFIX
:
1769 i
.types
[this_operand
] |= Mem8
;
1771 case WORD_OPCODE_SUFFIX
:
1772 i
.types
[this_operand
] |= Mem16
;
1774 case DWORD_OPCODE_SUFFIX
:
1776 i
.types
[this_operand
] |= Mem32
;
1779 /* Check for base index form. We detect the base index form by
1780 looking for an ')' at the end of the operand, searching
1781 for the '(' matching it, and finding a REGISTER_PREFIX or ','
1783 base_string
= end_of_operand_string
- 1;
1784 found_base_index_form
= 0;
1785 if (*base_string
== ')')
1787 unsigned int parens_balenced
= 1;
1788 /* We've already checked that the number of left & right ()'s are
1789 equal, so this loop will not be infinite. */
1793 if (*base_string
== ')')
1795 if (*base_string
== '(')
1798 while (parens_balenced
);
1799 base_string
++; /* Skip past '('. */
1800 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
1801 found_base_index_form
= 1;
1804 /* If we can't parse a base index register expression, we've found
1805 a pure displacement expression. We set up displacement_string_start
1806 and displacement_string_end for the code below. */
1807 if (!found_base_index_form
)
1809 displacement_string_start
= op_string
;
1810 displacement_string_end
= end_of_operand_string
;
1814 char *base_reg_name
, *index_reg_name
, *num_string
;
1817 i
.types
[this_operand
] |= BaseIndex
;
1819 /* If there is a displacement set-up for it to be parsed later. */
1820 if (base_string
!= op_string
+ 1)
1822 displacement_string_start
= op_string
;
1823 displacement_string_end
= base_string
- 1;
1826 /* Find base register (if any). */
1827 if (*base_string
!= ',')
1829 base_reg_name
= base_string
++;
1830 /* skip past register name & parse it */
1831 while (isalpha (*base_string
))
1833 if (base_string
== base_reg_name
+ 1)
1835 as_bad ("can't find base register name after '(%c'",
1839 END_STRING_AND_SAVE (base_string
);
1840 if (!(i
.base_reg
= parse_register (base_reg_name
)))
1842 as_bad ("bad base register name ('%s')", base_reg_name
);
1845 RESTORE_END_STRING (base_string
);
1848 /* Now check seperator; must be ',' ==> index reg
1849 OR num ==> no index reg. just scale factor
1850 OR ')' ==> end. (scale factor = 1) */
1851 if (*base_string
!= ',' && *base_string
!= ')')
1853 as_bad ("expecting ',' or ')' after base register in `%s'",
1858 /* There may index reg here; and there may be a scale factor. */
1859 if (*base_string
== ',' && *(base_string
+ 1) == REGISTER_PREFIX
)
1861 index_reg_name
= ++base_string
;
1862 while (isalpha (*++base_string
));
1863 END_STRING_AND_SAVE (base_string
);
1864 if (!(i
.index_reg
= parse_register (index_reg_name
)))
1866 as_bad ("bad index register name ('%s')", index_reg_name
);
1869 RESTORE_END_STRING (base_string
);
1872 /* Check for scale factor. */
1873 if (*base_string
== ',' && isdigit (*(base_string
+ 1)))
1875 num_string
= ++base_string
;
1876 while (is_digit_char (*base_string
))
1878 if (base_string
== num_string
)
1880 as_bad ("can't find a scale factor after ','");
1883 END_STRING_AND_SAVE (base_string
);
1884 /* We've got a scale factor. */
1885 if (!sscanf (num_string
, "%d", &num
))
1887 as_bad ("can't parse scale factor from '%s'", num_string
);
1890 RESTORE_END_STRING (base_string
);
1892 { /* must be 1 digit scale */
1894 i
.log2_scale_factor
= 0;
1897 i
.log2_scale_factor
= 1;
1900 i
.log2_scale_factor
= 2;
1903 i
.log2_scale_factor
= 3;
1906 as_bad ("expecting scale factor of 1, 2, 4, 8; got %d", num
);
1912 if (!i
.index_reg
&& *base_string
== ',')
1914 as_bad ("expecting index register or scale factor after ','; got '%c'",
1915 *(base_string
+ 1));
1921 /* If there's an expression begining the operand, parse it,
1922 assuming displacement_string_start and displacement_string_end
1924 if (displacement_string_start
)
1926 register expressionS
*exp
;
1928 char *save_input_line_pointer
;
1929 exp
= &disp_expressions
[i
.disp_operands
];
1930 i
.disps
[this_operand
] = exp
;
1932 save_input_line_pointer
= input_line_pointer
;
1933 input_line_pointer
= displacement_string_start
;
1934 END_STRING_AND_SAVE (displacement_string_end
);
1935 exp_seg
= expression (exp
);
1936 if (*input_line_pointer
)
1937 as_bad ("Ignoring junk '%s' after expression", input_line_pointer
);
1938 RESTORE_END_STRING (displacement_string_end
);
1939 input_line_pointer
= save_input_line_pointer
;
1940 if (exp_seg
== absent_section
)
1942 /* missing expr becomes absolute 0 */
1943 as_bad ("missing or invalid displacement '%s' taken as 0",
1945 i
.types
[this_operand
] |= (Disp
| Abs
);
1946 exp
->X_seg
= absolute_section
;
1947 exp
->X_add_number
= 0;
1948 exp
->X_add_symbol
= (symbolS
*) 0;
1949 exp
->X_subtract_symbol
= (symbolS
*) 0;
1951 else if (exp_seg
== absolute_section
)
1953 i
.types
[this_operand
] |= SMALLEST_DISP_TYPE (exp
->X_add_number
);
1955 else if (exp_seg
== text_section
1956 || exp_seg
== data_section
1957 || exp_seg
== bss_section
1958 || exp_seg
== undefined_section
)
1960 i
.types
[this_operand
] |= Disp32
;
1965 i
.types
[this_operand
] |= Disp32
;
1967 goto seg_unimplemented
;
1972 /* Make sure the memory operand we've been dealt is valid. */
1973 if (i
.base_reg
&& i
.index_reg
&&
1974 !(i
.base_reg
->reg_type
& i
.index_reg
->reg_type
& Reg
))
1976 as_bad ("register size mismatch in (base,index,scale) expression");
1980 * special case for (%dx) while doing input/output op
1983 (i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)) &&
1984 (i
.index_reg
== 0)))
1986 i
.types
[this_operand
] |= InOutPortReg
;
1989 if ((i
.base_reg
&& (i
.base_reg
->reg_type
& Reg32
) == 0) ||
1990 (i
.index_reg
&& (i
.index_reg
->reg_type
& Reg32
) == 0))
1992 as_bad ("base/index register must be 32 bit register");
1995 if (i
.index_reg
&& i
.index_reg
== esp
)
1997 as_bad ("%s may not be used as an index register", esp
->reg_name
);
2002 { /* it's not a memory operand; argh! */
2003 as_bad ("invalid char %s begining %s operand '%s'",
2004 output_invalid (*op_string
), ordinal_names
[this_operand
],
2008 return 1; /* normal return */
2012 * md_estimate_size_before_relax()
2014 * Called just before relax().
2015 * Any symbol that is now undefined will not become defined.
2016 * Return the correct fr_subtype in the frag.
2017 * Return the initial "guess for fr_var" to caller.
2018 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2019 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2020 * Although it may not be explicit in the frag, pretend fr_var starts with a
2024 md_estimate_size_before_relax (fragP
, segment
)
2025 register fragS
*fragP
;
2026 register segT segment
;
2028 register unsigned char *opcode
;
2029 register int old_fr_fix
;
2031 old_fr_fix
= fragP
->fr_fix
;
2032 opcode
= (unsigned char *) fragP
->fr_opcode
;
2033 /* We've already got fragP->fr_subtype right; all we have to do is check
2034 for un-relaxable symbols. */
2035 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2037 /* symbol is undefined in this segment */
2040 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2041 opcode
[0] = 0xe9; /* dword disp jmp */
2043 fix_new (fragP
, old_fr_fix
, 4,
2046 fragP
->fr_offset
, 1, NO_RELOC
);
2050 /* This changes the byte-displacement jump 0x7N -->
2051 the dword-displacement jump 0x0f8N */
2052 opcode
[1] = opcode
[0] + 0x10;
2053 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2054 fragP
->fr_fix
+= 1 + 4; /* we've added an opcode byte */
2055 fix_new (fragP
, old_fr_fix
+ 1, 4,
2058 fragP
->fr_offset
, 1, NO_RELOC
);
2063 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2064 } /* md_estimate_size_before_relax() */
2067 * md_convert_frag();
2069 * Called after relax() is finished.
2070 * In: Address of frag.
2071 * fr_type == rs_machine_dependent.
2072 * fr_subtype is what the address relaxed to.
2074 * Out: Any fixSs and constants are set up.
2075 * Caller will turn frag into a ".space 0".
2077 #ifndef BFD_ASSEMBLER
2079 md_convert_frag (headers
, fragP
)
2080 object_headers
*headers
;
2081 register fragS
*fragP
;
2084 md_convert_frag (abfd
, sec
, fragP
)
2087 register fragS
*fragP
;
2090 register unsigned char *opcode
;
2091 unsigned char *where_to_put_displacement
= NULL
;
2092 unsigned int target_address
;
2093 unsigned int opcode_address
;
2094 unsigned int extension
= 0;
2095 int displacement_from_opcode_start
;
2097 opcode
= (unsigned char *) fragP
->fr_opcode
;
2099 /* Address we want to reach in file space. */
2100 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2102 /* Address opcode resides at in file space. */
2103 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2105 /* Displacement from opcode start to fill into instruction. */
2106 displacement_from_opcode_start
= target_address
- opcode_address
;
2108 switch (fragP
->fr_subtype
)
2110 case ENCODE_RELAX_STATE (COND_JUMP
, BYTE
):
2111 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
):
2112 /* don't have to change opcode */
2113 extension
= 1; /* 1 opcode + 1 displacement */
2114 where_to_put_displacement
= &opcode
[1];
2117 case ENCODE_RELAX_STATE (COND_JUMP
, WORD
):
2118 opcode
[1] = TWO_BYTE_OPCODE_ESCAPE
;
2119 opcode
[2] = opcode
[0] + 0x10;
2120 opcode
[0] = WORD_PREFIX_OPCODE
;
2121 extension
= 4; /* 3 opcode + 2 displacement */
2122 where_to_put_displacement
= &opcode
[3];
2125 case ENCODE_RELAX_STATE (UNCOND_JUMP
, WORD
):
2127 opcode
[0] = WORD_PREFIX_OPCODE
;
2128 extension
= 3; /* 2 opcode + 2 displacement */
2129 where_to_put_displacement
= &opcode
[2];
2132 case ENCODE_RELAX_STATE (COND_JUMP
, DWORD
):
2133 opcode
[1] = opcode
[0] + 0x10;
2134 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2135 extension
= 5; /* 2 opcode + 4 displacement */
2136 where_to_put_displacement
= &opcode
[2];
2139 case ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
):
2141 extension
= 4; /* 1 opcode + 4 displacement */
2142 where_to_put_displacement
= &opcode
[1];
2146 BAD_CASE (fragP
->fr_subtype
);
2149 /* now put displacement after opcode */
2150 md_number_to_chars ((char *) where_to_put_displacement
,
2151 displacement_from_opcode_start
- extension
,
2152 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
2153 fragP
->fr_fix
+= extension
;
2157 int md_short_jump_size
= 2; /* size of byte displacement jmp */
2158 int md_long_jump_size
= 5; /* size of dword displacement jmp */
2159 const int md_reloc_size
= 8; /* Size of relocation record */
2162 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2164 valueT from_addr
, to_addr
;
2170 offset
= to_addr
- (from_addr
+ 2);
2171 md_number_to_chars (ptr
, (long) 0xeb, 1); /* opcode for byte-disp jump */
2172 md_number_to_chars (ptr
+ 1, offset
, 1);
2176 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2178 valueT from_addr
, to_addr
;
2186 offset
= to_addr
- S_GET_VALUE (to_symbol
);
2187 md_number_to_chars (ptr
, 0xe9, 1); /* opcode for long jmp */
2188 md_number_to_chars (ptr
+ 1, offset
, 4);
2189 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
2190 to_symbol
, (symbolS
*) 0, (long) 0, 0, NO_RELOC
);
2194 offset
= to_addr
- (from_addr
+ 5);
2195 md_number_to_chars (ptr
, (long) 0xe9, 1);
2196 md_number_to_chars (ptr
+ 1, offset
, 4);
2201 md_parse_option (argP
, cntP
, vecP
)
2209 void /* Knows about order of bytes in address. */
2210 md_number_to_chars (con
, value
, nbytes
)
2211 char con
[]; /* Return 'nbytes' of chars here. */
2212 valueT value
; /* The value of the bits. */
2213 int nbytes
; /* Number of bytes in the output. */
2215 register char *p
= con
;
2220 p
[0] = value
& 0xff;
2223 p
[0] = value
& 0xff;
2224 p
[1] = (value
>> 8) & 0xff;
2227 p
[0] = value
& 0xff;
2228 p
[1] = (value
>> 8) & 0xff;
2229 p
[2] = (value
>> 16) & 0xff;
2230 p
[3] = (value
>> 24) & 0xff;
2238 /* Apply a fixup (fixS) to segment data, once it has been determined
2239 by our caller that we have all the info we need to fix it up.
2241 On the 386, immediates, displacements, and data pointers are all in
2242 the same (little-endian) format, so we don't need to care about which
2246 md_apply_fix_1 (fixP
, value
)
2247 fixS
*fixP
; /* The fix we're to put in */
2248 long value
; /* The value of the bits. */
2250 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2252 switch (fixP
->fx_size
)
2263 *p
++ = (value
>> 8);
2264 *p
++ = (value
>> 16);
2268 BAD_CASE (fixP
->fx_size
);
2272 #ifdef BFD_ASSEMBLER
2274 md_apply_fix (fixP
, valp
)
2278 md_apply_fix_1 (fixP
, *valp
);
2283 md_apply_fix (fixP
, val
)
2287 md_apply_fix_1 (fixP
, val
);
2291 long /* Knows about the byte order in a word. */
2292 md_chars_to_number (con
, nbytes
)
2293 unsigned char con
[]; /* Low order byte 1st. */
2294 int nbytes
; /* Number of bytes in the input. */
2297 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
2299 retval
<<= BITS_PER_CHAR
;
2307 #define MAX_LITTLENUMS 6
2309 /* Turn the string pointed to by litP into a floating point constant of type
2310 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
2311 is stored in *sizeP . An error message is returned, or NULL on OK. */
2313 md_atof (type
, litP
, sizeP
)
2319 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2320 LITTLENUM_TYPE
*wordP
;
2342 return "Bad call to md_atof ()";
2344 t
= atof_ieee (input_line_pointer
, type
, words
);
2346 input_line_pointer
= t
;
2348 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
2349 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
2350 the bigendian 386. */
2351 for (wordP
= words
+ prec
- 1; prec
--;)
2353 md_number_to_chars (litP
, (long) (*wordP
--), sizeof (LITTLENUM_TYPE
));
2354 litP
+= sizeof (LITTLENUM_TYPE
);
2359 char output_invalid_buf
[8];
2366 sprintf (output_invalid_buf
, "'%c'", c
);
2368 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
2369 return output_invalid_buf
;
2373 parse_register (reg_string
)
2374 /* reg_string starts *before* REGISTER_PREFIX */
2377 register char *s
= reg_string
;
2379 char reg_name_given
[MAX_REG_NAME_SIZE
];
2381 s
++; /* skip REGISTER_PREFIX */
2382 for (p
= reg_name_given
; is_register_char (*s
); p
++, s
++)
2384 *p
= register_chars
[*s
];
2385 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2386 return (reg_entry
*) 0;
2389 return (reg_entry
*) hash_find (reg_hash
, reg_name_given
);
2393 /* We have no need to default values of symbols. */
2397 md_undefined_symbol (name
)
2403 /* Parse an operand that is machine-specific.
2404 We just return without modifying the expression if we have nothing
2409 md_operand (expressionP
)
2410 expressionS
*expressionP
;
2414 /* Round up a section size to the appropriate boundary. */
2416 md_section_align (segment
, size
)
2420 return size
; /* Byte alignment is fine */
2423 /* Exactly what point is a PC-relative offset relative TO?
2424 On the i386, they're relative to the address of the offset, plus
2425 its size. (??? Is this right? FIXME-SOON!) */
2427 md_pcrel_from (fixP
)
2430 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2440 temp
= get_absolute_expression ();
2441 #ifdef BFD_ASSEMBLER
2442 subseg_set (bss_section
, (subsegT
) temp
);
2444 subseg_new (bss_section
, (subsegT
) temp
);
2446 demand_empty_rest_of_line ();
2452 #ifdef BFD_ASSEMBLER
2455 tc_gen_reloc (section
, fixp
)
2460 bfd_reloc_code_real_type code
;
2462 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
2463 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
2465 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
2466 MAP (1, 0, BFD_RELOC_8
);
2467 MAP (2, 0, BFD_RELOC_16
);
2468 MAP (4, 0, BFD_RELOC_32
);
2469 MAP (1, 1, BFD_RELOC_8_PCREL
);
2470 MAP (2, 1, BFD_RELOC_16_PCREL
);
2471 MAP (4, 1, BFD_RELOC_32_PCREL
);
2478 reloc
= (arelent
*) bfd_alloc_by_size_t (stdoutput
, sizeof (arelent
));
2479 assert (reloc
!= 0);
2480 reloc
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
2481 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2483 reloc
->addend
= fixp
->fx_addnumber
;
2487 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
2488 assert (reloc
->howto
!= 0);
2493 #else /* ! BFD_ASSEMBLER */
2495 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
2497 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
2500 relax_addressT segment_address_in_file
;
2503 * In: length of relocation (or of address) in chars: 1, 2 or 4.
2504 * Out: GNU LD relocation length code: 0, 1, or 2.
2507 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
2510 know (fixP
->fx_addsy
!= NULL
);
2512 md_number_to_chars (where
,
2513 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
2516 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
2517 ? S_GET_TYPE (fixP
->fx_addsy
)
2518 : fixP
->fx_addsy
->sy_number
);
2520 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
2521 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
2522 where
[4] = r_symbolnum
& 0x0ff;
2523 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
2524 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
2525 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
2528 #endif /* OBJ_AOUT or OBJ_BOUT */
2530 #if defined (I386COFF)
2533 tc_coff_fix2rtype (fixP
)
2536 return (fixP
->fx_pcrel
?
2537 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
2538 fixP
->fx_size
== 2 ? R_PCRWORD
:
2540 (fixP
->fx_size
== 1 ? R_RELBYTE
:
2541 fixP
->fx_size
== 2 ? R_RELWORD
:
2548 tc_coff_sizemachdep (frag
)
2552 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
2557 #endif /* I386COFF */
2559 #endif /* BFD_ASSEMBLER? */
2561 /* end of tc-i386.c */