1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 1998
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef SCALE1_WHEN_NO_INDEX
44 /* Specifying a scale factor besides 1 when there is no index is
45 futile. eg. `mov (%ebx,2),%al' does exactly the same as
46 `mov (%ebx),%al'. To slavishly follow what the programmer
47 specified, set SCALE1_WHEN_NO_INDEX to 0. */
48 #define SCALE1_WHEN_NO_INDEX 1
51 static unsigned long mode_from_disp_size
PARAMS ((unsigned long));
52 static int fits_in_signed_byte
PARAMS ((long));
53 static int fits_in_unsigned_byte
PARAMS ((long));
54 static int fits_in_unsigned_word
PARAMS ((long));
55 static int fits_in_signed_word
PARAMS ((long));
56 static int smallest_imm_type
PARAMS ((long));
57 static int add_prefix
PARAMS ((unsigned int));
58 static void set_16bit_code_flag
PARAMS ((int));
60 static bfd_reloc_code_real_type reloc
61 PARAMS ((int, int, bfd_reloc_code_real_type
));
64 /* 'md_assemble ()' gathers together information and puts it into a
69 /* TM holds the template for the insn were currently assembling. */
72 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
75 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
77 /* OPERANDS gives the number of given operands. */
78 unsigned int operands
;
80 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
81 of given register, displacement, memory operands and immediate
83 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
85 /* TYPES [i] is the type (see above #defines) which tells us how to
86 search through DISPS [i] & IMMS [i] & REGS [i] for the required
88 unsigned int types
[MAX_OPERANDS
];
90 /* Displacements (if given) for each operand. */
91 expressionS
*disps
[MAX_OPERANDS
];
93 /* Relocation type for operand */
95 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
97 int disp_reloc
[MAX_OPERANDS
];
100 /* Immediate operands (if given) for each operand. */
101 expressionS
*imms
[MAX_OPERANDS
];
103 /* Register operands (if given) for each operand. */
104 const reg_entry
*regs
[MAX_OPERANDS
];
106 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
107 the base index byte below. */
108 const reg_entry
*base_reg
;
109 const reg_entry
*index_reg
;
110 unsigned int log2_scale_factor
;
112 /* SEG gives the seg_entries of this insn. They are zero unless
113 explicit segment overrides are given. */
114 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
116 /* PREFIX holds all the given prefix opcodes (usually null).
117 PREFIXES is the number of prefix opcodes. */
118 unsigned int prefixes
;
119 unsigned char prefix
[MAX_PREFIXES
];
121 /* RM and SIB are the modrm byte and the sib byte where the
122 addressing modes of this insn are encoded. */
128 typedef struct _i386_insn i386_insn
;
130 /* This array holds the chars that always start a comment. If the
131 pre-processor is disabled, these aren't very useful */
132 #if defined (TE_I386AIX) || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
133 const char comment_chars
[] = "#/";
134 #define PREFIX_SEPARATOR '\\'
136 const char comment_chars
[] = "#";
137 #define PREFIX_SEPARATOR '/'
140 /* This array holds the chars that only start a comment at the beginning of
141 a line. If the line seems to have the form '# 123 filename'
142 .line and .file directives will appear in the pre-processed output */
143 /* Note that input_file.c hand checks for '#' at the beginning of the
144 first line of the input file. This is because the compiler outputs
145 #NO_APP at the beginning of its output. */
146 /* Also note that comments started like this one will always work if
147 '/' isn't otherwise defined. */
148 #if defined (TE_I386AIX) || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
149 const char line_comment_chars
[] = "";
151 const char line_comment_chars
[] = "/";
154 const char line_separator_chars
[] = "";
156 /* Chars that can be used to separate mant from exp in floating point nums */
157 const char EXP_CHARS
[] = "eE";
159 /* Chars that mean this number is a floating point constant */
162 const char FLT_CHARS
[] = "fFdDxX";
164 /* tables for lexical analysis */
165 static char opcode_chars
[256];
166 static char register_chars
[256];
167 static char operand_chars
[256];
168 static char space_chars
[256];
169 static char identifier_chars
[256];
170 static char digit_chars
[256];
173 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
174 #define is_operand_char(x) (operand_chars[(unsigned char) x])
175 #define is_register_char(x) (register_chars[(unsigned char) x])
176 #define is_space_char(x) (space_chars[(unsigned char) x])
177 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
178 #define is_digit_char(x) (digit_chars[(unsigned char) x])
180 /* put here all non-digit non-letter charcters that may occur in an operand */
181 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
183 /* md_assemble() always leaves the strings it's passed unaltered. To
184 effect this we maintain a stack of saved characters that we've smashed
185 with '\0's (indicating end of strings for various sub-fields of the
186 assembler instruction). */
187 static char save_stack
[32];
188 static char *save_stack_p
; /* stack pointer */
189 #define END_STRING_AND_SAVE(s) \
190 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
191 #define RESTORE_END_STRING(s) \
192 do { *(s) = *--save_stack_p; } while (0)
194 /* The instruction we're assembling. */
197 /* Possible templates for current insn. */
198 static const templates
*current_templates
;
200 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
201 static expressionS disp_expressions
[2], im_expressions
[2];
203 static int this_operand
; /* current operand we are working on */
205 static int flag_do_long_jump
; /* FIXME what does this do? */
207 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
209 /* Interface to relax_segment.
210 There are 2 relax states for 386 jump insns: one for conditional &
211 one for unconditional jumps. This is because the these two types
212 of jumps add different sizes to frags when we're figuring out what
213 sort of jump to choose to reach a given label. */
216 #define COND_JUMP 1 /* conditional jump */
217 #define UNCOND_JUMP 2 /* unconditional jump */
221 #define SMALL16 (SMALL|CODE16)
223 #define BIG16 (BIG|CODE16)
227 #define INLINE __inline__
233 #define ENCODE_RELAX_STATE(type,size) \
234 ((relax_substateT)((type<<2) | (size)))
235 #define SIZE_FROM_RELAX_STATE(s) \
236 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
238 /* This table is used by relax_frag to promote short jumps to long
239 ones where necessary. SMALL (short) jumps may be promoted to BIG
240 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
241 don't allow a short jump in a 32 bit code segment to be promoted to
242 a 16 bit offset jump because it's slower (requires data size
243 prefix), and doesn't work, unless the destination is in the bottom
244 64k of the code segment (The top 16 bits of eip are zeroed). */
246 const relax_typeS md_relax_table
[] =
249 1) most positive reach of this state,
250 2) most negative reach of this state,
251 3) how many bytes this mode will add to the size of the current frag
252 4) which index into the table to try if we can't fit into this one.
259 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
260 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
261 /* dword conditionals adds 4 bytes to frag:
262 1 extra opcode byte, 3 extra displacement bytes. */
264 /* word conditionals add 2 bytes to frag:
265 1 extra opcode byte, 1 extra displacement byte. */
268 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
269 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
270 /* dword jmp adds 3 bytes to frag:
271 0 extra opcode bytes, 3 extra displacement bytes. */
273 /* word jmp adds 1 byte to frag:
274 0 extra opcode bytes, 1 extra displacement byte. */
281 i386_align_code (fragP
, count
)
285 /* Various efficient no-op patterns for aligning code labels. */
286 /* Note: Don't try to assemble the instructions in the comments. */
287 /* 0L and 0w are not legal */
288 static const char f32_1
[] =
290 static const char f32_2
[] =
291 {0x89,0xf6}; /* movl %esi,%esi */
292 static const char f32_3
[] =
293 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
294 static const char f32_4
[] =
295 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
296 static const char f32_5
[] =
298 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
299 static const char f32_6
[] =
300 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
301 static const char f32_7
[] =
302 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
303 static const char f32_8
[] =
305 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
306 static const char f32_9
[] =
307 {0x89,0xf6, /* movl %esi,%esi */
308 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
309 static const char f32_10
[] =
310 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
311 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
312 static const char f32_11
[] =
313 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
314 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
315 static const char f32_12
[] =
316 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
317 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
318 static const char f32_13
[] =
319 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
320 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
321 static const char f32_14
[] =
322 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
323 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
324 static const char f32_15
[] =
325 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
326 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
327 static const char f16_4
[] =
328 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
329 static const char f16_5
[] =
331 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
332 static const char f16_6
[] =
333 {0x89,0xf6, /* mov %si,%si */
334 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
335 static const char f16_7
[] =
336 {0x8d,0x74,0x00, /* lea 0(%si),%si */
337 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
338 static const char f16_8
[] =
339 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
340 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
341 static const char *const f32_patt
[] = {
342 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
343 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
345 static const char *const f16_patt
[] = {
346 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
347 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
350 if (count
> 0 && count
<= 15)
354 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
355 f16_patt
[count
- 1], count
);
356 if (count
> 8) /* adjust jump offset */
357 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
360 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
361 f32_patt
[count
- 1], count
);
362 fragP
->fr_var
= count
;
366 static char *output_invalid
PARAMS ((int c
));
367 static int i386_operand
PARAMS ((char *operand_string
));
368 static const reg_entry
*parse_register
PARAMS ((const char *reg_string
));
370 static void s_bss
PARAMS ((int));
373 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
375 static INLINE
unsigned long
376 mode_from_disp_size (t
)
379 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
383 fits_in_signed_byte (num
)
386 return (num
>= -128) && (num
<= 127);
387 } /* fits_in_signed_byte() */
390 fits_in_unsigned_byte (num
)
393 return (num
& 0xff) == num
;
394 } /* fits_in_unsigned_byte() */
397 fits_in_unsigned_word (num
)
400 return (num
& 0xffff) == num
;
401 } /* fits_in_unsigned_word() */
404 fits_in_signed_word (num
)
407 return (-32768 <= num
) && (num
<= 32767);
408 } /* fits_in_signed_word() */
411 smallest_imm_type (num
)
415 /* This code is disabled because all the Imm1 forms in the opcode table
416 are slower on the i486, and they're the versions with the implicitly
417 specified single-position displacement, which has another syntax if
418 you really want to use that form. If you really prefer to have the
419 one-byte-shorter Imm1 form despite these problems, re-enable this
422 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
424 return (fits_in_signed_byte (num
)
425 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
426 : fits_in_unsigned_byte (num
)
427 ? (Imm8
| Imm16
| Imm32
)
428 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
431 } /* smallest_imm_type() */
433 /* Returns 0 if attempting to add a prefix where one from the same
434 class already exists, 1 if non rep/repne added, 2 if rep/repne
448 case CS_PREFIX_OPCODE
:
449 case DS_PREFIX_OPCODE
:
450 case ES_PREFIX_OPCODE
:
451 case FS_PREFIX_OPCODE
:
452 case GS_PREFIX_OPCODE
:
453 case SS_PREFIX_OPCODE
:
457 case REPNE_PREFIX_OPCODE
:
458 case REPE_PREFIX_OPCODE
:
461 case LOCK_PREFIX_OPCODE
:
469 case ADDR_PREFIX_OPCODE
:
473 case DATA_PREFIX_OPCODE
:
480 as_bad (_("same type of prefix used twice"));
485 i
.prefix
[q
] = prefix
;
490 set_16bit_code_flag (new_16bit_code_flag
)
491 int new_16bit_code_flag
;
493 flag_16bit_code
= new_16bit_code_flag
;
496 const pseudo_typeS md_pseudo_table
[] =
501 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
502 {"align", s_align_bytes
, 0},
504 {"align", s_align_ptwo
, 0},
506 {"ffloat", float_cons
, 'f'},
507 {"dfloat", float_cons
, 'd'},
508 {"tfloat", float_cons
, 'x'},
510 {"noopt", s_ignore
, 0},
511 {"optim", s_ignore
, 0},
512 {"code16", set_16bit_code_flag
, 1},
513 {"code32", set_16bit_code_flag
, 0},
517 /* for interface with expression () */
518 extern char *input_line_pointer
;
520 /* hash table for opcode lookup */
521 static struct hash_control
*op_hash
;
522 /* hash table for register lookup */
523 static struct hash_control
*reg_hash
;
529 const char *hash_err
;
531 /* initialize op_hash hash table */
532 op_hash
= hash_new ();
535 register const template *optab
;
536 register templates
*core_optab
;
538 optab
= i386_optab
; /* setup for loop */
539 core_optab
= (templates
*) xmalloc (sizeof (templates
));
540 core_optab
->start
= optab
;
545 if (optab
->name
== NULL
546 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
548 /* different name --> ship out current template list;
549 add to hash table; & begin anew */
550 core_optab
->end
= optab
;
551 hash_err
= hash_insert (op_hash
,
557 as_fatal (_("Internal Error: Can't hash %s: %s"),
561 if (optab
->name
== NULL
)
563 core_optab
= (templates
*) xmalloc (sizeof (templates
));
564 core_optab
->start
= optab
;
569 /* initialize reg_hash hash table */
570 reg_hash
= hash_new ();
572 register const reg_entry
*regtab
;
574 for (regtab
= i386_regtab
;
575 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
578 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
584 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
589 for (c
= 0; c
< 256; c
++)
595 register_chars
[c
] = c
;
596 operand_chars
[c
] = c
;
598 else if (islower (c
))
601 register_chars
[c
] = c
;
602 operand_chars
[c
] = c
;
604 else if (isupper (c
))
606 opcode_chars
[c
] = tolower (c
);
607 register_chars
[c
] = opcode_chars
[c
];
608 operand_chars
[c
] = c
;
611 if (isalpha (c
) || isdigit (c
))
612 identifier_chars
[c
] = c
;
616 identifier_chars
['@'] = '@';
618 register_chars
[')'] = ')';
619 register_chars
['('] = '(';
620 digit_chars
['-'] = '-';
621 identifier_chars
['_'] = '_';
622 identifier_chars
['.'] = '.';
623 space_chars
[' '] = ' ';
624 space_chars
['\t'] = '\t';
626 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
627 operand_chars
[(unsigned char) *p
] = *p
;
630 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
631 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
633 record_alignment (text_section
, 2);
634 record_alignment (data_section
, 2);
635 record_alignment (bss_section
, 2);
641 i386_print_statistics (file
)
644 hash_print_statistics (file
, "i386 opcode", op_hash
);
645 hash_print_statistics (file
, "i386 register", reg_hash
);
651 /* debugging routines for md_assemble */
652 static void pi
PARAMS ((char *, i386_insn
*));
653 static void pte
PARAMS ((template *));
654 static void pt
PARAMS ((unsigned int));
655 static void pe
PARAMS ((expressionS
*));
656 static void ps
PARAMS ((symbolS
*));
663 register template *p
;
666 fprintf (stdout
, "%s: template ", line
);
668 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
669 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
670 fprintf (stdout
, " base %x index %x scale %x\n",
671 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
672 for (i
= 0; i
< x
->operands
; i
++)
674 fprintf (stdout
, " #%d: ", i
+ 1);
676 fprintf (stdout
, "\n");
678 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
679 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
680 if (x
->types
[i
] & Imm
)
682 if (x
->types
[i
] & Disp
)
692 fprintf (stdout
, " %d operands ", t
->operands
);
693 fprintf (stdout
, "opcode %x ",
695 if (t
->extension_opcode
!= None
)
696 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
697 if (t
->opcode_modifier
& D
)
698 fprintf (stdout
, "D");
699 if (t
->opcode_modifier
& W
)
700 fprintf (stdout
, "W");
701 fprintf (stdout
, "\n");
702 for (i
= 0; i
< t
->operands
; i
++)
704 fprintf (stdout
, " #%d type ", i
+ 1);
705 pt (t
->operand_types
[i
]);
706 fprintf (stdout
, "\n");
714 fprintf (stdout
, " operation %d\n", e
->X_op
);
715 fprintf (stdout
, " add_number %d (%x)\n",
716 e
->X_add_number
, e
->X_add_number
);
719 fprintf (stdout
, " add_symbol ");
720 ps (e
->X_add_symbol
);
721 fprintf (stdout
, "\n");
725 fprintf (stdout
, " op_symbol ");
727 fprintf (stdout
, "\n");
735 fprintf (stdout
, "%s type %s%s",
737 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
738 segment_name (S_GET_SEGMENT (s
)));
757 { BaseIndex
, "BaseIndex" },
761 { InOutPortReg
, "InOutPortReg" },
762 { ShiftCount
, "ShiftCount" },
763 { Control
, "control reg" },
764 { Test
, "test reg" },
765 { Debug
, "debug reg" },
766 { FloatReg
, "FReg" },
767 { FloatAcc
, "FAcc" },
771 { JumpAbsolute
, "Jump Absolute" },
781 register struct type_name
*ty
;
785 fprintf (stdout
, _("Unknown"));
789 for (ty
= type_names
; ty
->mask
; ty
++)
791 fprintf (stdout
, "%s, ", ty
->tname
);
796 #endif /* DEBUG386 */
799 static bfd_reloc_code_real_type
800 reloc (size
, pcrel
, other
)
803 bfd_reloc_code_real_type other
;
805 if (other
!= NO_RELOC
) return other
;
811 case 1: return BFD_RELOC_8_PCREL
;
812 case 2: return BFD_RELOC_16_PCREL
;
813 case 4: return BFD_RELOC_32_PCREL
;
815 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
821 case 1: return BFD_RELOC_8
;
822 case 2: return BFD_RELOC_16
;
823 case 4: return BFD_RELOC_32
;
825 as_bad (_("Can not do %d byte relocation"), size
);
828 return BFD_RELOC_NONE
;
832 * Here we decide which fixups can be adjusted to make them relative to
833 * the beginning of the section instead of the symbol. Basically we need
834 * to make sure that the dynamic relocations are done correctly, so in
835 * some cases we force the original symbol to be used.
838 tc_i386_fix_adjustable(fixP
)
842 /* Prevent all adjustments to global symbols. */
843 if (S_IS_EXTERN (fixP
->fx_addsy
))
845 if (S_IS_WEAK (fixP
->fx_addsy
))
847 #endif /* ! defined (OBJ_AOUT) */
848 /* adjust_reloc_syms doesn't know about the GOT */
849 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
850 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
851 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
)
856 #define reloc(SIZE,PCREL,OTHER) 0
857 #define BFD_RELOC_16 0
858 #define BFD_RELOC_32 0
859 #define BFD_RELOC_16_PCREL 0
860 #define BFD_RELOC_32_PCREL 0
861 #define BFD_RELOC_386_PLT32 0
862 #define BFD_RELOC_386_GOT32 0
863 #define BFD_RELOC_386_GOTOFF 0
866 /* This is the guts of the machine-dependent assembler. LINE points to a
867 machine dependent instruction. This function is supposed to emit
868 the frags/bytes it assembles to. */
874 /* Points to template once we've found it. */
877 /* Count the size of the instruction generated. */
882 /* Initialize globals. */
883 memset (&i
, '\0', sizeof (i
));
884 for (j
= 0; j
< MAX_OPERANDS
; j
++)
885 i
.disp_reloc
[j
] = NO_RELOC
;
886 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
887 memset (im_expressions
, '\0', sizeof (im_expressions
));
888 save_stack_p
= save_stack
; /* reset stack pointer */
890 /* First parse an opcode & call i386_operand for the operands.
891 We assume that the scrubber has arranged it so that line[0] is the valid
892 start of a (possibly prefixed) opcode. */
894 char opcode
[MAX_OPCODE_SIZE
];
896 char *token_start
= l
;
899 /* Non-zero if we found a prefix only acceptable with string insns. */
900 const char *expecting_string_instruction
= NULL
;
905 while ((*opp
= opcode_chars
[(unsigned char) *l
]) != 0)
908 if (opp
>= opcode
+ sizeof (opcode
))
910 as_bad (_("no such 386 instruction: `%s'"), token_start
);
915 if (!is_space_char (*l
)
917 && *l
!= PREFIX_SEPARATOR
)
919 as_bad (_("invalid character %s in opcode"),
920 output_invalid (*l
));
923 if (token_start
== l
)
925 if (*l
== PREFIX_SEPARATOR
)
926 as_bad (_("expecting prefix; got nothing"));
928 as_bad (_("expecting opcode; got nothing"));
932 /* Look up instruction (or prefix) via hash table. */
933 current_templates
= hash_find (op_hash
, opcode
);
935 if (*l
!= END_OF_INSN
937 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
939 /* If we are in 16-bit mode, do not allow addr16 or data16.
940 Similarly, in 32-bit mode, do not allow addr32 or data32. */
941 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
942 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
945 as_bad (_("redundant %s prefix"),
946 current_templates
->start
->name
);
949 /* Add prefix, checking for repeated prefixes. */
950 switch (add_prefix (current_templates
->start
->base_opcode
))
955 expecting_string_instruction
=
956 current_templates
->start
->name
;
959 /* Skip past PREFIX_SEPARATOR and reset token_start. */
966 if (!current_templates
)
968 /* See if we can get a match by trimming off a suffix. */
971 case DWORD_OPCODE_SUFFIX
:
972 case WORD_OPCODE_SUFFIX
:
973 case BYTE_OPCODE_SUFFIX
:
974 case SHORT_OPCODE_SUFFIX
:
975 #if LONG_OPCODE_SUFFIX != DWORD_OPCODE_SUFFIX
976 case LONG_OPCODE_SUFFIX
:
980 current_templates
= hash_find (op_hash
, opcode
);
982 if (!current_templates
)
984 as_bad (_("no such 386 instruction: `%s'"), token_start
);
989 /* check for rep/repne without a string instruction */
990 if (expecting_string_instruction
991 && !(current_templates
->start
->opcode_modifier
& IsString
))
993 as_bad (_("expecting string instruction after `%s'"),
994 expecting_string_instruction
);
998 /* There may be operands to parse. */
999 if (*l
!= END_OF_INSN
)
1001 /* parse operands */
1003 /* 1 if operand is pending after ','. */
1004 unsigned int expecting_operand
= 0;
1006 /* Non-zero if operand parens not balanced. */
1007 unsigned int paren_not_balanced
;
1011 /* skip optional white space before operand */
1012 while (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1014 if (!is_space_char (*l
))
1016 as_bad (_("invalid character %s before operand %d"),
1017 output_invalid (*l
),
1023 token_start
= l
; /* after white space */
1024 paren_not_balanced
= 0;
1025 while (paren_not_balanced
|| *l
!= ',')
1027 if (*l
== END_OF_INSN
)
1029 if (paren_not_balanced
)
1031 as_bad (_("unbalanced parenthesis in operand %d."),
1036 break; /* we are done */
1038 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1040 as_bad (_("invalid character %s in operand %d"),
1041 output_invalid (*l
),
1046 ++paren_not_balanced
;
1048 --paren_not_balanced
;
1051 if (l
!= token_start
)
1052 { /* yes, we've read in another operand */
1053 unsigned int operand_ok
;
1054 this_operand
= i
.operands
++;
1055 if (i
.operands
> MAX_OPERANDS
)
1057 as_bad (_("spurious operands; (%d operands/instruction max)"),
1061 /* now parse operand adding info to 'i' as we go along */
1062 END_STRING_AND_SAVE (l
);
1063 operand_ok
= i386_operand (token_start
);
1064 RESTORE_END_STRING (l
); /* restore old contents */
1070 if (expecting_operand
)
1072 expecting_operand_after_comma
:
1073 as_bad (_("expecting operand after ','; got nothing"));
1078 as_bad (_("expecting operand before ','; got nothing"));
1083 /* now *l must be either ',' or END_OF_INSN */
1086 if (*++l
== END_OF_INSN
)
1087 { /* just skip it, if it's \n complain */
1088 goto expecting_operand_after_comma
;
1090 expecting_operand
= 1;
1093 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1097 /* Now we've parsed the opcode into a set of templates, and have the
1100 Next, we find a template that matches the given insn,
1101 making sure the overlap of the given operands types is consistent
1102 with the template operand types. */
1104 #define MATCH(overlap, given, template) \
1106 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1107 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1109 /* If given types r0 and r1 are registers they must be of the same type
1110 unless the expected operand type register overlap is null.
1111 Note that Acc in a template matches every size of reg. */
1112 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1113 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1114 ((g0) & Reg) == ((g1) & Reg) || \
1115 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1118 register unsigned int overlap0
, overlap1
;
1120 unsigned int overlap2
;
1121 unsigned int found_reverse_match
;
1127 found_reverse_match
= 0;
1128 suffix_check
= (i
.suffix
== BYTE_OPCODE_SUFFIX
1130 : (i
.suffix
== WORD_OPCODE_SUFFIX
1132 : (i
.suffix
== SHORT_OPCODE_SUFFIX
1134 : (i
.suffix
== LONG_OPCODE_SUFFIX
? No_lSuf
: 0))));
1136 for (t
= current_templates
->start
;
1137 t
< current_templates
->end
;
1140 /* Must have right number of operands, and must not have
1141 disallowed suffix. */
1142 if (i
.operands
!= t
->operands
|| (t
->opcode_modifier
& suffix_check
))
1144 else if (!t
->operands
)
1145 break; /* 0 operands always matches */
1147 overlap0
= i
.types
[0] & t
->operand_types
[0];
1148 switch (t
->operands
)
1151 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1156 overlap1
= i
.types
[1] & t
->operand_types
[1];
1157 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1158 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1159 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1160 t
->operand_types
[0],
1161 overlap1
, i
.types
[1],
1162 t
->operand_types
[1]))
1165 /* check if other direction is valid ... */
1166 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1169 /* try reversing direction of operands */
1170 overlap0
= i
.types
[0] & t
->operand_types
[1];
1171 overlap1
= i
.types
[1] & t
->operand_types
[0];
1172 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1173 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1174 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1175 t
->operand_types
[1],
1176 overlap1
, i
.types
[1],
1177 t
->operand_types
[0]))
1179 /* does not match either direction */
1182 /* found_reverse_match holds which of D or FloatDR
1184 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1187 /* found a forward 2 operand match here */
1188 if (t
->operands
== 3)
1190 /* Here we make use of the fact that there are no
1191 reverse match 3 operand instructions, and all 3
1192 operand instructions only need to be checked for
1193 register consistency between operands 2 and 3. */
1194 overlap2
= i
.types
[2] & t
->operand_types
[2];
1195 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1196 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1197 t
->operand_types
[1],
1198 overlap2
, i
.types
[2],
1199 t
->operand_types
[2]))
1202 /* found either forward/reverse 2 or 3 operand match here:
1203 slip through to break */
1205 break; /* we've found a match; break out of loop */
1206 } /* for (t = ... */
1207 if (t
== current_templates
->end
)
1208 { /* we found no match */
1209 as_bad (_("suffix or operands invalid for `%s'"),
1210 current_templates
->start
->name
);
1214 /* Copy the template we found. */
1216 if (found_reverse_match
)
1218 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1219 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1222 if (i
.tm
.opcode_modifier
& FWait
)
1223 if (! add_prefix (FWAIT_OPCODE
))
1226 /* Check string instruction segment overrides */
1227 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1229 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1230 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1232 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1234 as_bad (_("`%s' operand %d must use `%%es' segment"),
1239 /* There's only ever one segment override allowed per instruction.
1240 This instruction possibly has a legal segment override on the
1241 second operand, so copy the segment to where non-string
1242 instructions store it, allowing common code. */
1243 i
.seg
[0] = i
.seg
[1];
1245 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1247 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1249 as_bad (_("`%s' operand %d must use `%%es' segment"),
1257 /* If matched instruction specifies an explicit opcode suffix, use
1259 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1261 if (i
.tm
.opcode_modifier
& Size16
)
1262 i
.suffix
= WORD_OPCODE_SUFFIX
;
1264 i
.suffix
= DWORD_OPCODE_SUFFIX
;
1266 else if (i
.reg_operands
)
1268 /* If there's no opcode suffix we try to invent one based on
1269 register operands. */
1272 /* We take i.suffix from the last register operand specified,
1273 Destination register type is more significant than source
1276 for (op
= i
.operands
; --op
>= 0; )
1277 if (i
.types
[op
] & Reg
)
1279 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_OPCODE_SUFFIX
:
1280 (i
.types
[op
] & Reg16
) ? WORD_OPCODE_SUFFIX
:
1281 DWORD_OPCODE_SUFFIX
);
1285 else if (i
.suffix
== BYTE_OPCODE_SUFFIX
)
1288 for (op
= i
.operands
; --op
>= 0; )
1290 /* If this is an eight bit register, it's OK. If it's
1291 the 16 or 32 bit version of an eight bit register,
1292 we will just use the low portion, and that's OK too. */
1293 if (i
.types
[op
] & Reg8
)
1295 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1297 /* Check that the template allows eight bit regs
1298 This kills insns such as `orb $1,%edx', which
1299 maybe should be allowed. */
1300 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1304 #if REGISTER_WARNINGS
1305 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1306 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1307 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1308 i
.regs
[op
]->reg_name
,
1313 /* Any other register is bad */
1314 if (i
.types
[op
] & (Reg
| RegMMX
| Control
| Debug
| Test
1315 | FloatReg
| FloatAcc
| SReg2
| SReg3
))
1317 as_bad (_("`%%%s' not allowed with `%s%c'"),
1318 i
.regs
[op
]->reg_name
,
1325 else if (i
.suffix
== DWORD_OPCODE_SUFFIX
)
1328 for (op
= i
.operands
; --op
>= 0; )
1329 /* Reject eight bit registers, except where the template
1330 requires them. (eg. movzb) */
1331 if ((i
.types
[op
] & Reg8
) != 0
1332 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1334 as_bad (_("`%%%s' not allowed with `%s%c'"),
1335 i
.regs
[op
]->reg_name
,
1340 #if REGISTER_WARNINGS
1341 /* Warn if the e prefix on a general reg is missing. */
1342 else if ((i
.types
[op
] & Reg16
) != 0
1343 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1345 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1346 (i
.regs
[op
] + 8)->reg_name
,
1347 i
.regs
[op
]->reg_name
,
1352 else if (i
.suffix
== WORD_OPCODE_SUFFIX
)
1355 for (op
= i
.operands
; --op
>= 0; )
1356 /* Reject eight bit registers, except where the template
1357 requires them. (eg. movzb) */
1358 if ((i
.types
[op
] & Reg8
) != 0
1359 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1361 as_bad (_("`%%%s' not allowed with `%s%c'"),
1362 i
.regs
[op
]->reg_name
,
1367 #if REGISTER_WARNINGS
1368 /* Warn if the e prefix on a general reg is present. */
1369 else if ((i
.types
[op
] & Reg32
) != 0
1370 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1372 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1373 (i
.regs
[op
] - 8)->reg_name
,
1374 i
.regs
[op
]->reg_name
,
1383 /* Make still unresolved immediate matches conform to size of immediate
1384 given in i.suffix. Note: overlap2 cannot be an immediate!
1386 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1387 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1388 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1392 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1393 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1395 else if (overlap0
== (Imm16
| Imm32
))
1398 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1402 as_bad (_("no opcode suffix given; can't determine immediate size"));
1406 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1407 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1408 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1412 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1413 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1415 else if (overlap1
== (Imm16
| Imm32
))
1418 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1422 as_bad (_("no opcode suffix given; can't determine immediate size"));
1427 i
.types
[0] = overlap0
;
1428 if (overlap0
& ImplicitRegister
)
1430 if (overlap0
& Imm1
)
1431 i
.imm_operands
= 0; /* kludge for shift insns */
1433 i
.types
[1] = overlap1
;
1434 if (overlap1
& ImplicitRegister
)
1437 i
.types
[2] = overlap2
;
1438 if (overlap2
& ImplicitRegister
)
1441 /* Finalize opcode. First, we change the opcode based on the operand
1442 size given by i.suffix: we never have to change things for byte insns,
1443 or when no opcode suffix is need to size the operands. */
1445 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1447 as_bad (_("no opcode suffix given and no register operands; can't size instruction"));
1451 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1453 /* Select between byte and word/dword operations. */
1454 if (i
.tm
.opcode_modifier
& W
)
1456 if (i
.tm
.opcode_modifier
& ShortForm
)
1457 i
.tm
.base_opcode
|= 8;
1459 i
.tm
.base_opcode
|= 1;
1461 /* Now select between word & dword operations via the operand
1462 size prefix, except for instructions that will ignore this
1464 if ((i
.suffix
== DWORD_OPCODE_SUFFIX
1465 || i
.suffix
== LONG_OPCODE_SUFFIX
) == flag_16bit_code
1466 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1468 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1469 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1470 prefix
= ADDR_PREFIX_OPCODE
;
1472 if (! add_prefix (prefix
))
1475 /* Size floating point instruction. */
1476 if (i
.suffix
== LONG_OPCODE_SUFFIX
)
1478 if (i
.tm
.opcode_modifier
& FloatMF
)
1479 i
.tm
.base_opcode
^= 4;
1483 /* For insns with operands there are more diddles to do to the opcode. */
1486 /* Default segment register this instruction will use
1487 for memory accesses. 0 means unknown.
1488 This is only for optimizing out unnecessary segment overrides. */
1489 const seg_entry
*default_seg
= 0;
1491 /* If we found a reverse match we must alter the opcode
1492 direction bit. found_reverse_match holds bits to change
1493 (different for int & float insns). */
1495 i
.tm
.base_opcode
^= found_reverse_match
;
1497 /* The imul $imm, %reg instruction is converted into
1498 imul $imm, %reg, %reg, and the clr %reg instruction
1499 is converted into xor %reg, %reg. */
1500 if (i
.tm
.opcode_modifier
& regKludge
)
1502 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1503 /* Pretend we saw the extra register operand. */
1504 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1508 if (i
.tm
.opcode_modifier
& ShortForm
)
1510 /* The register or float register operand is in operand 0 or 1. */
1511 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1512 /* Register goes in low 3 bits of opcode. */
1513 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1514 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1516 /* Warn about some common errors, but press on regardless.
1517 The first case can be generated by gcc (<= 2.8.1). */
1518 if (i
.operands
== 2)
1520 /* reversed arguments on faddp, fsubp, etc. */
1521 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1522 i
.regs
[1]->reg_name
,
1523 i
.regs
[0]->reg_name
);
1527 /* extraneous `l' suffix on fp insn */
1528 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1529 i
.regs
[0]->reg_name
);
1533 else if (i
.tm
.opcode_modifier
& Modrm
)
1535 /* The opcode is completed (modulo i.tm.extension_opcode which
1536 must be put into the modrm byte).
1537 Now, we make the modrm & index base bytes based on all the
1538 info we've collected. */
1540 /* i.reg_operands MUST be the number of real register operands;
1541 implicit registers do not count. */
1542 if (i
.reg_operands
== 2)
1544 unsigned int source
, dest
;
1545 source
= ((i
.types
[0]
1556 /* Certain instructions expect the destination to be
1557 in the i.rm.reg field. This is by far the
1558 exceptional case. For these instructions, if the
1559 source operand is a register, we must reverse the
1560 i.rm.reg and i.rm.regmem fields. We accomplish
1561 this by pretending that the two register operands
1562 were given in the reverse order. */
1563 if (i
.tm
.opcode_modifier
& ReverseRegRegmem
)
1565 const reg_entry
*tmp
= i
.regs
[source
];
1566 i
.regs
[source
] = i
.regs
[dest
];
1571 /* We must be careful to make sure that all
1572 segment/control/test/debug/MMX registers go into
1573 the i.rm.reg field (despite whether they are
1574 source or destination operands). */
1575 if (i
.regs
[dest
]->reg_type
1576 & (SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
1578 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1579 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1583 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1584 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1588 { /* if it's not 2 reg operands... */
1591 unsigned int fake_zero_displacement
= 0;
1592 unsigned int op
= ((i
.types
[0] & AnyMem
)
1594 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1601 if (! i
.disp_operands
)
1602 fake_zero_displacement
= 1;
1605 /* Operand is just <disp> */
1606 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1608 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1609 i
.types
[op
] &= ~Disp
;
1610 i
.types
[op
] |= Disp16
;
1614 i
.rm
.regmem
= NO_BASE_REGISTER
;
1615 i
.types
[op
] &= ~Disp
;
1616 i
.types
[op
] |= Disp32
;
1619 else /* ! i.base_reg && i.index_reg */
1621 i
.sib
.index
= i
.index_reg
->reg_num
;
1622 i
.sib
.base
= NO_BASE_REGISTER
;
1623 i
.sib
.scale
= i
.log2_scale_factor
;
1624 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1625 i
.types
[op
] &= ~Disp
;
1626 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1629 else if (i
.base_reg
->reg_type
& Reg16
)
1631 switch (i
.base_reg
->reg_num
)
1636 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1637 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1644 if ((i
.types
[op
] & Disp
) == 0)
1646 /* fake (%bp) into 0(%bp) */
1647 i
.types
[op
] |= Disp8
;
1648 fake_zero_displacement
= 1;
1651 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1652 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1654 default: /* (%si) -> 4 or (%di) -> 5 */
1655 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1657 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1659 else /* i.base_reg and 32 bit mode */
1661 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1662 i
.sib
.base
= i
.base_reg
->reg_num
;
1663 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1666 if (i
.disp_operands
== 0)
1668 fake_zero_displacement
= 1;
1669 i
.types
[op
] |= Disp8
;
1672 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1676 i
.sib
.scale
= i
.log2_scale_factor
;
1679 /* <disp>(%esp) becomes two byte modrm
1680 with no index register. We've already
1681 stored the code for esp in i.rm.regmem
1682 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1683 base register besides %esp will not use
1684 the extra modrm byte. */
1685 i
.sib
.index
= NO_INDEX_REGISTER
;
1686 #if ! SCALE1_WHEN_NO_INDEX
1687 /* Another case where we force the second
1689 if (i
.log2_scale_factor
)
1690 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1695 i
.sib
.index
= i
.index_reg
->reg_num
;
1696 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1698 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1701 if (fake_zero_displacement
)
1703 /* Fakes a zero displacement assuming that i.types[op]
1704 holds the correct displacement size. */
1705 exp
= &disp_expressions
[i
.disp_operands
++];
1707 exp
->X_op
= O_constant
;
1708 exp
->X_add_number
= 0;
1709 exp
->X_add_symbol
= (symbolS
*) 0;
1710 exp
->X_op_symbol
= (symbolS
*) 0;
1714 /* Fill in i.rm.reg or i.rm.regmem field with register
1715 operand (if any) based on i.tm.extension_opcode.
1716 Again, we must be careful to make sure that
1717 segment/control/debug/test/MMX registers are coded
1718 into the i.rm.reg field. */
1723 & (Reg
| SReg2
| SReg3
| Control
| Debug
1727 & (Reg
| SReg2
| SReg3
| Control
| Debug
1731 /* If there is an extension opcode to put here, the
1732 register number must be put into the regmem field. */
1733 if (i
.tm
.extension_opcode
!= None
)
1734 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
1736 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
1738 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1739 we must set it to 3 to indicate this is a register
1740 operand in the regmem field. */
1741 if (!i
.mem_operands
)
1745 /* Fill in i.rm.reg field with extension opcode (if any). */
1746 if (i
.tm
.extension_opcode
!= None
)
1747 i
.rm
.reg
= i
.tm
.extension_opcode
;
1750 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
1752 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1754 as_bad (_("you can't `pop %%cs'"));
1757 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1759 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
1763 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
1765 /* For the string instructions that allow a segment override
1766 on one of their operands, the default segment is ds. */
1770 /* If a segment was explicitly specified,
1771 and the specified segment is not the default,
1772 use an opcode prefix to select it.
1773 If we never figured out what the default segment is,
1774 then default_seg will be zero at this point,
1775 and the specified segment prefix will always be used. */
1776 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
1778 if (! add_prefix (i
.seg
[0]->seg_prefix
))
1782 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1784 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc */
1785 as_warn (_("translating to `%sp'"), i
.tm
.name
);
1789 /* Handle conversion of 'int $3' --> special int3 insn. */
1790 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1792 i
.tm
.base_opcode
= INT3_OPCODE
;
1796 /* We are ready to output the insn. */
1801 if (i
.tm
.opcode_modifier
& Jump
)
1803 unsigned long n
= i
.disps
[0]->X_add_number
;
1804 int prefix
= (i
.prefix
[DATA_PREFIX
] != 0);
1812 if (flag_16bit_code
)
1815 if (i
.prefixes
!= 0)
1816 as_warn (_("skipping prefixes on this instruction"));
1818 if (i
.disps
[0]->X_op
== O_constant
)
1820 if (fits_in_signed_byte (n
))
1824 p
[0] = i
.tm
.base_opcode
;
1829 /* Use 16-bit jumps only for 16-bit code,
1830 because text segments are limited to 64K anyway;
1831 Use 32-bit jumps for 32-bit code, because they're faster,
1832 and a 16-bit jump will clear the top 16 bits of %eip. */
1833 int jmp_size
= code16
? 2 : 4;
1834 if (code16
&& !fits_in_signed_word (n
))
1836 as_bad (_("16-bit jump out of range"));
1840 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
1842 /* unconditional jump */
1843 insn_size
+= prefix
+ 1 + jmp_size
;
1844 p
= frag_more (prefix
+ 1 + jmp_size
);
1846 *p
++ = DATA_PREFIX_OPCODE
;
1848 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
1852 /* conditional jump */
1853 insn_size
+= prefix
+ 2 + jmp_size
;
1854 p
= frag_more (prefix
+ 2 + jmp_size
);
1856 *p
++ = DATA_PREFIX_OPCODE
;
1857 *p
++ = TWO_BYTE_OPCODE_ESCAPE
;
1858 *p
++ = i
.tm
.base_opcode
+ 0x10;
1859 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
1865 int size
= code16
? 2 : 4;
1867 /* It's a symbol; end frag & setup for relax.
1868 Make sure there are more than 6 chars left in the current frag;
1869 if not we'll have to start a new one. */
1870 frag_grow (prefix
+ 1 + 2 + size
);
1871 insn_size
+= 1 + prefix
;
1872 p
= frag_more (1 + prefix
);
1874 *p
++ = DATA_PREFIX_OPCODE
;
1875 *p
= i
.tm
.base_opcode
;
1876 frag_var (rs_machine_dependent
,
1877 prefix
+ 2 + size
, /* 2 opcode/prefix + displacement */
1879 ((unsigned char) *p
== JUMP_PC_RELATIVE
1880 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
1881 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
1882 i
.disps
[0]->X_add_symbol
,
1886 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
1888 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
1889 unsigned long n
= i
.disps
[0]->X_add_number
;
1891 if (size
== 1) /* then this is a loop or jecxz type instruction */
1893 if (i
.prefix
[ADDR_PREFIX
])
1896 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
1904 if (i
.prefix
[DATA_PREFIX
])
1907 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
1911 if (flag_16bit_code
)
1918 if (i
.prefixes
!= 0)
1919 as_warn (_("skipping prefixes on this instruction"));
1921 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
1923 insn_size
+= 1 + size
;
1924 p
= frag_more (1 + size
);
1928 insn_size
+= 2 + size
; /* opcode can be at most two bytes */
1929 p
= frag_more (2 + size
);
1930 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1932 *p
++ = i
.tm
.base_opcode
& 0xff;
1934 if (i
.disps
[0]->X_op
== O_constant
)
1936 if (size
== 1 && !fits_in_signed_byte (n
))
1938 as_bad (_("`%s' only takes byte displacement; %lu shortened to %d"),
1941 else if (size
== 2 && !fits_in_signed_word (n
))
1943 as_bad (_("16-bit jump out of range"));
1946 md_number_to_chars (p
, (valueT
) n
, size
);
1950 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1951 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
1955 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
1959 int prefix
= i
.prefix
[DATA_PREFIX
] != 0;
1967 if (flag_16bit_code
)
1971 reloc_type
= BFD_RELOC_32
;
1975 reloc_type
= BFD_RELOC_16
;
1978 if (i
.prefixes
!= 0)
1979 as_warn (_("skipping prefixes on this instruction"));
1981 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
1982 p
= frag_more (prefix
+ 1 + 2 + size
);
1984 *p
++ = DATA_PREFIX_OPCODE
;
1985 *p
++ = i
.tm
.base_opcode
;
1986 if (i
.imms
[1]->X_op
== O_constant
)
1988 unsigned long n
= i
.imms
[1]->X_add_number
;
1989 if (size
== 2 && !fits_in_unsigned_word (n
))
1991 as_bad (_("16-bit jump out of range"));
1994 md_number_to_chars (p
, (valueT
) n
, size
);
1997 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1998 i
.imms
[1], 0, reloc_type
);
1999 if (i
.imms
[0]->X_op
!= O_constant
)
2000 as_bad (_("can't handle non absolute segment in `%s'"),
2002 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2006 /* Output normal instructions here. */
2009 /* The prefix bytes. */
2011 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2018 md_number_to_chars (p
, (valueT
) *q
, 1);
2022 /* Now the opcode; be careful about word order here! */
2023 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2026 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2028 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2032 /* put out high byte first: can't use md_number_to_chars! */
2033 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2034 *p
= i
.tm
.base_opcode
& 0xff;
2037 { /* opcode is either 3 or 4 bytes */
2038 if (i
.tm
.base_opcode
& 0xff000000)
2042 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2049 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2050 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2051 *p
= (i
.tm
.base_opcode
) & 0xff;
2054 /* Now the modrm byte and sib byte (if present). */
2055 if (i
.tm
.opcode_modifier
& Modrm
)
2059 md_number_to_chars (p
,
2060 (valueT
) (i
.rm
.regmem
<< 0
2064 /* If i.rm.regmem == ESP (4)
2065 && i.rm.mode != (Register mode)
2067 ==> need second modrm byte. */
2068 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2070 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2074 md_number_to_chars (p
,
2075 (valueT
) (i
.sib
.base
<< 0
2077 | i
.sib
.scale
<< 6),
2082 if (i
.disp_operands
)
2084 register unsigned int n
;
2086 for (n
= 0; n
< i
.operands
; n
++)
2090 if (i
.disps
[n
]->X_op
== O_constant
)
2092 if (i
.types
[n
] & Disp8
)
2096 md_number_to_chars (p
,
2097 (valueT
) i
.disps
[n
]->X_add_number
,
2100 else if (i
.types
[n
] & Disp16
)
2104 md_number_to_chars (p
,
2105 (valueT
) i
.disps
[n
]->X_add_number
,
2112 md_number_to_chars (p
,
2113 (valueT
) i
.disps
[n
]->X_add_number
,
2117 else if (i
.types
[n
] & Disp32
)
2121 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2123 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2126 { /* must be Disp16 */
2129 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2131 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2135 } /* end displacement output */
2137 /* output immediate */
2140 register unsigned int n
;
2142 for (n
= 0; n
< i
.operands
; n
++)
2146 if (i
.imms
[n
]->X_op
== O_constant
)
2148 if (i
.types
[n
] & (Imm8
| Imm8S
))
2152 md_number_to_chars (p
,
2153 (valueT
) i
.imms
[n
]->X_add_number
,
2156 else if (i
.types
[n
] & Imm16
)
2160 md_number_to_chars (p
,
2161 (valueT
) i
.imms
[n
]->X_add_number
,
2168 md_number_to_chars (p
,
2169 (valueT
) i
.imms
[n
]->X_add_number
,
2174 { /* not absolute_section */
2175 /* Need a 32-bit fixup (don't support 8bit
2176 non-absolute ims). Try to support other
2182 if (i
.types
[n
] & (Imm8
| Imm8S
))
2184 else if (i
.types
[n
] & Imm16
)
2189 p
= frag_more (size
);
2190 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2191 #ifdef BFD_ASSEMBLER
2192 if (r_type
== BFD_RELOC_32
2194 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2195 && (i
.imms
[n
]->X_op
== O_symbol
2196 || (i
.imms
[n
]->X_op
== O_add
2197 && (i
.imms
[n
]->X_op_symbol
->sy_value
.X_op
2200 r_type
= BFD_RELOC_386_GOTPC
;
2201 i
.imms
[n
]->X_add_number
+= 3;
2204 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2205 i
.imms
[n
], pcrel
, r_type
);
2209 } /* end immediate output */
2217 #endif /* DEBUG386 */
2221 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
2225 i386_operand (operand_string
)
2226 char *operand_string
;
2228 register char *op_string
= operand_string
;
2230 /* We check for an absolute prefix (differentiating,
2231 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
2232 if (*op_string
== ABSOLUTE_PREFIX
)
2235 i
.types
[this_operand
] |= JumpAbsolute
;
2238 /* Check if operand is a register. */
2239 if (*op_string
== REGISTER_PREFIX
)
2241 register const reg_entry
*r
;
2242 if (!(r
= parse_register (op_string
)))
2244 as_bad (_("bad register name `%s'"), op_string
);
2247 /* Check for segment override, rather than segment register by
2248 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
2249 if ((r
->reg_type
& (SReg2
| SReg3
)) && op_string
[3] == ':')
2254 i
.seg
[i
.mem_operands
] = &es
;
2257 i
.seg
[i
.mem_operands
] = &cs
;
2260 i
.seg
[i
.mem_operands
] = &ss
;
2263 i
.seg
[i
.mem_operands
] = &ds
;
2266 i
.seg
[i
.mem_operands
] = &fs
;
2269 i
.seg
[i
.mem_operands
] = &gs
;
2272 op_string
+= 4; /* skip % <x> s : */
2273 operand_string
= op_string
; /* Pretend given string starts here. */
2274 if (!is_digit_char (*op_string
) && !is_identifier_char (*op_string
)
2275 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
)
2277 as_bad (_("bad memory operand `%s'"), op_string
);
2280 /* Handle case of %es:*foo. */
2281 if (*op_string
== ABSOLUTE_PREFIX
)
2284 i
.types
[this_operand
] |= JumpAbsolute
;
2286 goto do_memory_reference
;
2288 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
2289 i
.regs
[this_operand
] = r
;
2292 else if (*op_string
== IMMEDIATE_PREFIX
)
2293 { /* ... or an immediate */
2294 char *save_input_line_pointer
;
2298 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2300 as_bad (_("only 1 or 2 immediate operands are allowed"));
2304 exp
= &im_expressions
[i
.imm_operands
++];
2305 i
.imms
[this_operand
] = exp
;
2306 save_input_line_pointer
= input_line_pointer
;
2307 input_line_pointer
= ++op_string
; /* must advance op_string! */
2309 exp_seg
= expression (exp
);
2310 if (*input_line_pointer
!= '\0')
2312 /* This should be as_bad, but some versions of gcc, up to
2313 about 2.8 and egcs 1.01, generate a bogus @GOTOFF(%ebx)
2314 in certain cases. Oddly, the code in question turns out
2315 to work correctly anyhow, so we make this just a warning
2316 until those versions of gcc are obsolete. */
2317 as_warn (_("unrecognized characters `%s' in expression"),
2318 input_line_pointer
);
2320 input_line_pointer
= save_input_line_pointer
;
2322 if (exp
->X_op
== O_absent
)
2324 /* missing or bad expr becomes absolute 0 */
2325 as_bad (_("missing or invalid immediate expression `%s' taken as 0"),
2327 exp
->X_op
= O_constant
;
2328 exp
->X_add_number
= 0;
2329 exp
->X_add_symbol
= (symbolS
*) 0;
2330 exp
->X_op_symbol
= (symbolS
*) 0;
2331 i
.types
[this_operand
] |= Imm
;
2333 else if (exp
->X_op
== O_constant
)
2335 i
.types
[this_operand
] |=
2336 smallest_imm_type ((long) exp
->X_add_number
);
2339 else if (exp_seg
!= text_section
2340 && exp_seg
!= data_section
2341 && exp_seg
!= bss_section
2342 && exp_seg
!= undefined_section
2343 #ifdef BFD_ASSEMBLER
2344 && ! bfd_is_com_section (exp_seg
)
2349 as_bad (_("Unimplemented segment type %d in parse_operand"), exp_seg
);
2355 /* This is an address. */
2356 i
.types
[this_operand
] |=
2357 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
2359 /* shorten this type of this operand if the instruction wants
2360 * fewer bits than are present in the immediate. The bit field
2361 * code can put out 'andb $0xffffff, %al', for example. pace
2362 * also 'movw $foo,(%eax)'
2366 case WORD_OPCODE_SUFFIX
:
2367 i
.types
[this_operand
] |= Imm16
;
2369 case BYTE_OPCODE_SUFFIX
:
2370 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2374 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
2375 || *op_string
== '(')
2377 /* This is a memory reference of some sort. */
2378 char *end_of_operand_string
;
2379 register char *base_string
;
2380 int found_base_index_form
;
2382 /* Start and end of displacement string expression (if found). */
2383 char *displacement_string_start
;
2384 char *displacement_string_end
;
2386 do_memory_reference
:
2387 if ((i
.mem_operands
== 1
2388 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
2389 || i
.mem_operands
== 2)
2391 as_bad (_("too many memory references for `%s'"),
2392 current_templates
->start
->name
);
2396 /* Check for base index form. We detect the base index form by
2397 looking for an ')' at the end of the operand, searching
2398 for the '(' matching it, and finding a REGISTER_PREFIX or ','
2400 found_base_index_form
= 0;
2401 end_of_operand_string
= op_string
+ strlen (op_string
);
2402 base_string
= end_of_operand_string
- 1;
2403 if (*base_string
== ')')
2405 unsigned int parens_balanced
= 1;
2406 /* We've already checked that the number of left & right ()'s are
2407 equal, so this loop will not be infinite. */
2411 if (*base_string
== ')')
2413 if (*base_string
== '(')
2416 while (parens_balanced
);
2417 base_string
++; /* Skip past '('. */
2418 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
2419 found_base_index_form
= 1;
2422 /* If we can't parse a base index register expression, we've found
2423 a pure displacement expression. We set up displacement_string_start
2424 and displacement_string_end for the code below. */
2425 if (!found_base_index_form
)
2427 displacement_string_start
= op_string
;
2428 displacement_string_end
= end_of_operand_string
;
2432 char *base_reg_name
, *index_reg_name
, *num_string
;
2435 i
.types
[this_operand
] |= BaseIndex
;
2437 /* If there is a displacement set-up for it to be parsed later. */
2438 displacement_string_start
= NULL
;
2439 if (base_string
!= op_string
+ 1)
2441 displacement_string_start
= op_string
;
2442 displacement_string_end
= base_string
- 1;
2445 /* Find base register (if any). */
2446 if (*base_string
!= ',')
2448 base_reg_name
= base_string
++;
2449 /* skip past register name & parse it */
2450 while (isalpha (*base_string
))
2452 if (base_string
== base_reg_name
+ 1)
2454 as_bad (_("can't find base register name after `(%c'"),
2458 END_STRING_AND_SAVE (base_string
);
2459 if (!(i
.base_reg
= parse_register (base_reg_name
)))
2461 as_bad (_("bad base register name `%s'"), base_reg_name
);
2462 RESTORE_END_STRING (base_string
);
2465 RESTORE_END_STRING (base_string
);
2468 /* Now check seperator; must be ',' ==> index reg
2469 OR num ==> no index reg. just scale factor
2470 OR ')' ==> end. (scale factor = 1) */
2471 if (*base_string
!= ',' && *base_string
!= ')')
2473 as_bad (_("expecting `,' or `)' after base register in `%s'"),
2478 /* There may index reg here; and there may be a scale factor. */
2479 if (*base_string
== ',' && *(base_string
+ 1) == REGISTER_PREFIX
)
2481 index_reg_name
= ++base_string
;
2482 while (isalpha (*++base_string
));
2483 END_STRING_AND_SAVE (base_string
);
2484 if (!(i
.index_reg
= parse_register (index_reg_name
)))
2486 as_bad (_("bad index register name `%s'"), index_reg_name
);
2487 RESTORE_END_STRING (base_string
);
2490 RESTORE_END_STRING (base_string
);
2493 /* Check for scale factor. */
2494 if (*base_string
== ',' && isdigit (*(base_string
+ 1)))
2496 num_string
= ++base_string
;
2497 while (is_digit_char (*base_string
))
2499 if (base_string
== num_string
)
2501 as_bad (_("can't find a scale factor after `,'"));
2504 END_STRING_AND_SAVE (base_string
);
2505 /* We've got a scale factor. */
2506 if (!sscanf (num_string
, "%d", &num
))
2508 as_bad (_("can't parse scale factor from `%s'"), num_string
);
2509 RESTORE_END_STRING (base_string
);
2512 RESTORE_END_STRING (base_string
);
2514 { /* must be 1 digit scale */
2516 i
.log2_scale_factor
= 0;
2519 i
.log2_scale_factor
= 1;
2522 i
.log2_scale_factor
= 2;
2525 i
.log2_scale_factor
= 3;
2528 as_bad (_("expecting scale factor of 1, 2, 4, 8; got %d"), num
);
2531 if (num
!= 1 && ! i
.index_reg
)
2533 as_warn (_("scale factor of %d without an index register"),
2535 #if SCALE1_WHEN_NO_INDEX
2536 i
.log2_scale_factor
= 0;
2542 if (!i
.index_reg
&& *base_string
== ',')
2544 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
2545 *(base_string
+ 1));
2551 /* If there's an expression begining the operand, parse it,
2552 assuming displacement_string_start and displacement_string_end
2554 if (displacement_string_start
)
2556 register expressionS
*exp
;
2558 char *save_input_line_pointer
;
2559 int bigdisp
= Disp32
;
2561 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2563 i
.types
[this_operand
] |= bigdisp
;
2565 exp
= &disp_expressions
[i
.disp_operands
];
2566 i
.disps
[this_operand
] = exp
;
2567 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2569 save_input_line_pointer
= input_line_pointer
;
2570 input_line_pointer
= displacement_string_start
;
2571 END_STRING_AND_SAVE (displacement_string_end
);
2572 #ifndef GCC_ASM_O_HACK
2573 #define GCC_ASM_O_HACK 0
2576 END_STRING_AND_SAVE (displacement_string_end
+ 1);
2577 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2578 && displacement_string_end
[-1] == '+')
2580 /* This hack is to avoid a warning when using the "o"
2581 constraint within gcc asm statements.
2584 #define _set_tssldt_desc(n,addr,limit,type) \
2585 __asm__ __volatile__ ( \
2587 "movw %w1,2+%0\n\t" \
2589 "movb %b1,4+%0\n\t" \
2590 "movb %4,5+%0\n\t" \
2591 "movb $0,6+%0\n\t" \
2592 "movb %h1,7+%0\n\t" \
2594 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2596 This works great except that the output assembler ends
2597 up looking a bit weird if it turns out that there is
2598 no offset. You end up producing code that looks like:
2611 So here we provide the missing zero.
2614 *displacement_string_end
= '0';
2620 * We can have operands of the form
2621 * <symbol>@GOTOFF+<nnn>
2622 * Take the easy way out here and copy everything
2623 * into a temporary buffer...
2627 cp
= strchr (input_line_pointer
, '@');
2632 if (GOT_symbol
== NULL
)
2633 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2635 tmpbuf
= (char *) alloca ((cp
- input_line_pointer
) + 20);
2637 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2639 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2641 strcpy (tmpbuf
, input_line_pointer
);
2642 strcat (tmpbuf
, cp
+ 1 + 3);
2645 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2647 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2649 strcpy (tmpbuf
, input_line_pointer
);
2650 strcat (tmpbuf
, cp
+ 1 + 6);
2653 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2655 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2657 strcpy (tmpbuf
, input_line_pointer
);
2658 strcat (tmpbuf
, cp
+ 1 + 3);
2662 as_bad (_("Bad reloc specifier `%s' in expression"), cp
+ 1);
2664 /* GOT relocations are not supported in 16 bit mode */
2665 if (flag_16bit_code
)
2666 as_bad (_("GOT relocations not supported in 16 bit mode"));
2668 input_line_pointer
= tmpbuf
;
2673 exp_seg
= expression (exp
);
2675 #ifdef BFD_ASSEMBLER
2676 /* We do this to make sure that the section symbol is in
2677 the symbol table. We will ultimately change the relocation
2678 to be relative to the beginning of the section */
2679 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2681 if (S_IS_LOCAL(exp
->X_add_symbol
)
2682 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2683 section_symbol(exp
->X_add_symbol
->bsym
->section
);
2684 assert (exp
->X_op
== O_symbol
);
2685 exp
->X_op
= O_subtract
;
2686 exp
->X_op_symbol
= GOT_symbol
;
2687 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2691 if (*input_line_pointer
)
2692 as_bad (_("Ignoring junk `%s' after expression"),
2693 input_line_pointer
);
2695 RESTORE_END_STRING (displacement_string_end
+ 1);
2697 RESTORE_END_STRING (displacement_string_end
);
2698 input_line_pointer
= save_input_line_pointer
;
2700 #if 0 /* this is handled in expr. */
2701 if (exp
->X_op
== O_absent
)
2703 /* missing expr becomes absolute 0 */
2704 as_bad (_("missing or invalid displacement `%s' taken as 0"),
2706 exp
->X_op
= O_constant
;
2707 exp
->X_add_number
= 0;
2708 exp
->X_add_symbol
= (symbolS
*) 0;
2709 exp
->X_op_symbol
= (symbolS
*) 0;
2710 i
.types
[this_operand
] |= Disp8
;
2714 if (exp
->X_op
== O_constant
)
2716 if (fits_in_signed_byte (exp
->X_add_number
))
2717 i
.types
[this_operand
] |= Disp8
;
2720 else if (exp_seg
!= text_section
2721 && exp_seg
!= data_section
2722 && exp_seg
!= bss_section
2723 && exp_seg
!= undefined_section
)
2725 goto seg_unimplemented
;
2730 /* Special case for (%dx) while doing input/output op. */
2732 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
2734 && i
.log2_scale_factor
== 0
2735 && i
.seg
[i
.mem_operands
] == 0
2736 && (i
.types
[this_operand
] & Disp
) == 0)
2738 i
.types
[this_operand
] = InOutPortReg
;
2741 /* Make sure the memory operand we've been dealt is valid. */
2742 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2745 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
2746 != (Reg16
|BaseIndex
)))
2748 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
2749 != (Reg16
|BaseIndex
))
2751 && i
.base_reg
->reg_num
< 6
2752 && i
.index_reg
->reg_num
>= 6
2753 && i
.log2_scale_factor
== 0))))
2755 as_bad (_("`%s' is not a valid %s bit base/index expression"),
2756 operand_string
, "16");
2763 && (i
.base_reg
->reg_type
& Reg32
) == 0)
2765 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
2766 != (Reg32
|BaseIndex
))))
2768 as_bad (_("`%s' is not a valid %s bit base/index expression"),
2769 operand_string
, "32");
2776 { /* it's not a memory operand; argh! */
2777 as_bad (_("invalid char %s begining operand %d `%s'"),
2778 output_invalid (*op_string
),
2783 return 1; /* normal return */
2787 * md_estimate_size_before_relax()
2789 * Called just before relax().
2790 * Any symbol that is now undefined will not become defined.
2791 * Return the correct fr_subtype in the frag.
2792 * Return the initial "guess for fr_var" to caller.
2793 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2794 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2795 * Although it may not be explicit in the frag, pretend fr_var starts with a
2799 md_estimate_size_before_relax (fragP
, segment
)
2800 register fragS
*fragP
;
2801 register segT segment
;
2803 register unsigned char *opcode
;
2804 register int old_fr_fix
;
2806 old_fr_fix
= fragP
->fr_fix
;
2807 opcode
= (unsigned char *) fragP
->fr_opcode
;
2808 /* We've already got fragP->fr_subtype right; all we have to do is
2809 check for un-relaxable symbols. */
2810 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2812 /* symbol is undefined in this segment */
2813 int code16
= fragP
->fr_subtype
& CODE16
;
2814 int size
= code16
? 2 : 4;
2815 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
2819 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2820 opcode
[0] = 0xe9; /* dword disp jmp */
2821 fragP
->fr_fix
+= size
;
2822 fix_new (fragP
, old_fr_fix
, size
,
2824 fragP
->fr_offset
, 1,
2825 (GOT_symbol
&& /* Not quite right - we should switch on
2826 presence of @PLT, but I cannot see how
2827 to get to that from here. We should have
2828 done this in md_assemble to really
2829 get it right all of the time, but I
2830 think it does not matter that much, as
2831 this will be right most of the time. ERY*/
2832 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
2833 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
2837 /* This changes the byte-displacement jump 0x7N -->
2838 the dword-displacement jump 0x0f8N */
2839 opcode
[1] = opcode
[0] + 0x10;
2840 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2841 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
2842 fix_new (fragP
, old_fr_fix
+ 1, size
,
2844 fragP
->fr_offset
, 1,
2845 (GOT_symbol
&& /* Not quite right - we should switch on
2846 presence of @PLT, but I cannot see how
2847 to get to that from here. ERY */
2848 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
2849 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
2854 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2855 } /* md_estimate_size_before_relax() */
2858 * md_convert_frag();
2860 * Called after relax() is finished.
2861 * In: Address of frag.
2862 * fr_type == rs_machine_dependent.
2863 * fr_subtype is what the address relaxed to.
2865 * Out: Any fixSs and constants are set up.
2866 * Caller will turn frag into a ".space 0".
2868 #ifndef BFD_ASSEMBLER
2870 md_convert_frag (headers
, sec
, fragP
)
2871 object_headers
*headers
;
2873 register fragS
*fragP
;
2876 md_convert_frag (abfd
, sec
, fragP
)
2879 register fragS
*fragP
;
2882 register unsigned char *opcode
;
2883 unsigned char *where_to_put_displacement
= NULL
;
2884 unsigned int target_address
;
2885 unsigned int opcode_address
;
2886 unsigned int extension
= 0;
2887 int displacement_from_opcode_start
;
2889 opcode
= (unsigned char *) fragP
->fr_opcode
;
2891 /* Address we want to reach in file space. */
2892 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2893 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2894 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
2897 /* Address opcode resides at in file space. */
2898 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2900 /* Displacement from opcode start to fill into instruction. */
2901 displacement_from_opcode_start
= target_address
- opcode_address
;
2903 switch (fragP
->fr_subtype
)
2905 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
2906 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
2907 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
2908 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
2909 /* don't have to change opcode */
2910 extension
= 1; /* 1 opcode + 1 displacement */
2911 where_to_put_displacement
= &opcode
[1];
2914 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
2915 extension
= 5; /* 2 opcode + 4 displacement */
2916 opcode
[1] = opcode
[0] + 0x10;
2917 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2918 where_to_put_displacement
= &opcode
[2];
2921 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
2922 extension
= 4; /* 1 opcode + 4 displacement */
2924 where_to_put_displacement
= &opcode
[1];
2927 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
2928 extension
= 3; /* 2 opcode + 2 displacement */
2929 opcode
[1] = opcode
[0] + 0x10;
2930 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2931 where_to_put_displacement
= &opcode
[2];
2934 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
2935 extension
= 2; /* 1 opcode + 2 displacement */
2937 where_to_put_displacement
= &opcode
[1];
2941 BAD_CASE (fragP
->fr_subtype
);
2944 /* now put displacement after opcode */
2945 md_number_to_chars ((char *) where_to_put_displacement
,
2946 (valueT
) (displacement_from_opcode_start
- extension
),
2947 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
2948 fragP
->fr_fix
+= extension
;
2952 int md_short_jump_size
= 2; /* size of byte displacement jmp */
2953 int md_long_jump_size
= 5; /* size of dword displacement jmp */
2954 const int md_reloc_size
= 8; /* Size of relocation record */
2957 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2959 addressT from_addr
, to_addr
;
2965 offset
= to_addr
- (from_addr
+ 2);
2966 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
2967 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
2971 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2973 addressT from_addr
, to_addr
;
2979 if (flag_do_long_jump
)
2981 offset
= to_addr
- S_GET_VALUE (to_symbol
);
2982 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
2983 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2984 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
2985 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
2989 offset
= to_addr
- (from_addr
+ 5);
2990 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
2991 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2995 /* Apply a fixup (fixS) to segment data, once it has been determined
2996 by our caller that we have all the info we need to fix it up.
2998 On the 386, immediates, displacements, and data pointers are all in
2999 the same (little-endian) format, so we don't need to care about which
3003 md_apply_fix3 (fixP
, valp
, seg
)
3004 fixS
*fixP
; /* The fix we're to put in. */
3005 valueT
*valp
; /* Pointer to the value of the bits. */
3006 segT seg
; /* Segment fix is from. */
3008 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3009 valueT value
= *valp
;
3011 if (fixP
->fx_r_type
== BFD_RELOC_32
&& fixP
->fx_pcrel
)
3012 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3014 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3016 * This is a hack. There should be a better way to
3019 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
3022 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3023 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
)
3024 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3026 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3027 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3028 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
3029 || (fixP
->fx_addsy
->bsym
->flags
& BSF_SECTION_SYM
) != 0)
3030 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3031 && ! S_IS_WEAK (fixP
->fx_addsy
)
3032 && S_IS_DEFINED (fixP
->fx_addsy
)
3033 && ! S_IS_COMMON (fixP
->fx_addsy
))
3035 /* Yes, we add the values in twice. This is because
3036 bfd_perform_relocation subtracts them out again. I think
3037 bfd_perform_relocation is broken, but I don't dare change
3039 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3042 #if defined (OBJ_COFF) && defined (TE_PE)
3043 /* For some reason, the PE format does not store a section
3044 address offset for a PC relative symbol. */
3045 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3046 value
+= md_pcrel_from (fixP
);
3050 /* Fix a few things - the dynamic linker expects certain values here,
3051 and we must not dissappoint it. */
3052 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3053 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3055 switch (fixP
->fx_r_type
) {
3056 case BFD_RELOC_386_PLT32
:
3057 /* Make the jump instruction point to the address of the operand. At
3058 runtime we merely add the offset to the actual PLT entry. */
3061 case BFD_RELOC_386_GOTPC
:
3063 * This is tough to explain. We end up with this one if we have
3064 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3065 * here is to obtain the absolute address of the GOT, and it is strongly
3066 * preferable from a performance point of view to avoid using a runtime
3067 * relocation for this. The actual sequence of instructions often look
3073 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3075 * The call and pop essentially return the absolute address of
3076 * the label .L66 and store it in %ebx. The linker itself will
3077 * ultimately change the first operand of the addl so that %ebx points to
3078 * the GOT, but to keep things simple, the .o file must have this operand
3079 * set so that it generates not the absolute address of .L66, but the
3080 * absolute address of itself. This allows the linker itself simply
3081 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
3082 * added in, and the addend of the relocation is stored in the operand
3083 * field for the instruction itself.
3085 * Our job here is to fix the operand so that it would add the correct
3086 * offset so that %ebx would point to itself. The thing that is tricky is
3087 * that .-.L66 will point to the beginning of the instruction, so we need
3088 * to further modify the operand so that it will point to itself.
3089 * There are other cases where you have something like:
3091 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
3093 * and here no correction would be required. Internally in the assembler
3094 * we treat operands of this form as not being pcrel since the '.' is
3095 * explicitly mentioned, and I wonder whether it would simplify matters
3096 * to do it this way. Who knows. In earlier versions of the PIC patches,
3097 * the pcrel_adjust field was used to store the correction, but since the
3098 * expression is not pcrel, I felt it would be confusing to do it this way.
3102 case BFD_RELOC_386_GOT32
:
3103 value
= 0; /* Fully resolved at runtime. No addend. */
3105 case BFD_RELOC_386_GOTOFF
:
3114 md_number_to_chars (p
, value
, fixP
->fx_size
);
3120 /* This is never used. */
3121 long /* Knows about the byte order in a word. */
3122 md_chars_to_number (con
, nbytes
)
3123 unsigned char con
[]; /* Low order byte 1st. */
3124 int nbytes
; /* Number of bytes in the input. */
3127 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
3129 retval
<<= BITS_PER_CHAR
;
3137 #define MAX_LITTLENUMS 6
3139 /* Turn the string pointed to by litP into a floating point constant of type
3140 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
3141 is stored in *sizeP . An error message is returned, or NULL on OK. */
3143 md_atof (type
, litP
, sizeP
)
3149 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
3150 LITTLENUM_TYPE
*wordP
;
3172 return _("Bad call to md_atof ()");
3174 t
= atof_ieee (input_line_pointer
, type
, words
);
3176 input_line_pointer
= t
;
3178 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
3179 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
3180 the bigendian 386. */
3181 for (wordP
= words
+ prec
- 1; prec
--;)
3183 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
3184 litP
+= sizeof (LITTLENUM_TYPE
);
3189 char output_invalid_buf
[8];
3196 sprintf (output_invalid_buf
, "'%c'", c
);
3198 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
3199 return output_invalid_buf
;
3202 /* reg_string starts *before* REGISTER_PREFIX */
3203 static const reg_entry
*
3204 parse_register (reg_string
)
3205 const char *reg_string
;
3207 register const char *s
= reg_string
;
3209 char reg_name_given
[MAX_REG_NAME_SIZE
];
3211 s
++; /* skip REGISTER_PREFIX */
3213 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
3215 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
3216 return (const reg_entry
*) NULL
;
3218 return (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
3222 CONST
char *md_shortopts
= "kmVQ:";
3224 CONST
char *md_shortopts
= "m";
3226 struct option md_longopts
[] = {
3227 {NULL
, no_argument
, NULL
, 0}
3229 size_t md_longopts_size
= sizeof (md_longopts
);
3232 md_parse_option (c
, arg
)
3239 flag_do_long_jump
= 1;
3242 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3243 /* -k: Ignore for FreeBSD compatibility. */
3247 /* -V: SVR4 argument to print version ID. */
3249 print_version_id ();
3252 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
3253 should be emitted or not. FIXME: Not implemented. */
3265 md_show_usage (stream
)
3268 fprintf (stream
, _("\
3269 -m do long jump\n"));
3272 #ifdef BFD_ASSEMBLER
3273 #ifdef OBJ_MAYBE_ELF
3274 #ifdef OBJ_MAYBE_COFF
3276 /* Pick the target format to use. */
3279 i386_target_format ()
3281 switch (OUTPUT_FLAVOR
)
3283 case bfd_target_coff_flavour
:
3285 case bfd_target_elf_flavour
:
3286 return "elf32-i386";
3293 #endif /* OBJ_MAYBE_COFF */
3294 #endif /* OBJ_MAYBE_ELF */
3295 #endif /* BFD_ASSEMBLER */
3299 md_undefined_symbol (name
)
3302 if (*name
== '_' && *(name
+1) == 'G'
3303 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3307 if (symbol_find (name
))
3308 as_bad (_("GOT already in symbol table"));
3309 GOT_symbol
= symbol_new (name
, undefined_section
,
3310 (valueT
) 0, &zero_address_frag
);
3317 /* Round up a section size to the appropriate boundary. */
3319 md_section_align (segment
, size
)
3324 #ifdef BFD_ASSEMBLER
3325 /* For a.out, force the section size to be aligned. If we don't do
3326 this, BFD will align it for us, but it will not write out the
3327 final bytes of the section. This may be a bug in BFD, but it is
3328 easier to fix it here since that is how the other a.out targets
3332 align
= bfd_get_section_alignment (stdoutput
, segment
);
3333 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
3340 /* Exactly what point is a PC-relative offset relative TO? On the
3341 i386, they're relative to the address of the offset, plus its
3342 size. (??? Is this right? FIXME-SOON!) */
3344 md_pcrel_from (fixP
)
3347 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3358 temp
= get_absolute_expression ();
3359 subseg_set (bss_section
, (subsegT
) temp
);
3360 demand_empty_rest_of_line ();
3366 #ifdef BFD_ASSEMBLER
3369 i386_validate_fix (fixp
)
3372 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
3374 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
3379 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
3380 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
3383 tc_gen_reloc (section
, fixp
)
3388 bfd_reloc_code_real_type code
;
3390 switch (fixp
->fx_r_type
)
3392 case BFD_RELOC_386_PLT32
:
3393 case BFD_RELOC_386_GOT32
:
3394 case BFD_RELOC_386_GOTOFF
:
3395 case BFD_RELOC_386_GOTPC
:
3397 code
= fixp
->fx_r_type
;
3400 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
3402 MAP (1, 0, BFD_RELOC_8
);
3403 MAP (2, 0, BFD_RELOC_16
);
3404 MAP (4, 0, BFD_RELOC_32
);
3405 MAP (1, 1, BFD_RELOC_8_PCREL
);
3406 MAP (2, 1, BFD_RELOC_16_PCREL
);
3407 MAP (4, 1, BFD_RELOC_32_PCREL
);
3410 as_bad (_("Can not do %d byte pc-relative relocation"),
3413 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
3414 code
= BFD_RELOC_32
;
3422 if (code
== BFD_RELOC_32
3424 && fixp
->fx_addsy
== GOT_symbol
)
3425 code
= BFD_RELOC_386_GOTPC
;
3427 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3428 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
3429 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3431 rel
->addend
= fixp
->fx_addnumber
;
3435 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3436 if (rel
->howto
== NULL
)
3438 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3439 _("Cannot represent relocation type %s"),
3440 bfd_get_reloc_code_name (code
));
3441 /* Set howto to a garbage value so that we can keep going. */
3442 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3443 assert (rel
->howto
!= NULL
);
3449 #else /* ! BFD_ASSEMBLER */
3451 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
3453 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3456 relax_addressT segment_address_in_file
;
3459 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3460 * Out: GNU LD relocation length code: 0, 1, or 2.
3463 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3466 know (fixP
->fx_addsy
!= NULL
);
3468 md_number_to_chars (where
,
3469 (valueT
) (fixP
->fx_frag
->fr_address
3470 + fixP
->fx_where
- segment_address_in_file
),
3473 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3474 ? S_GET_TYPE (fixP
->fx_addsy
)
3475 : fixP
->fx_addsy
->sy_number
);
3477 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
3478 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3479 where
[4] = r_symbolnum
& 0x0ff;
3480 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
3481 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
3482 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
3485 #endif /* OBJ_AOUT or OBJ_BOUT */
3487 #if defined (I386COFF)
3490 tc_coff_fix2rtype (fixP
)
3493 if (fixP
->fx_r_type
== R_IMAGEBASE
)
3496 return (fixP
->fx_pcrel
?
3497 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
3498 fixP
->fx_size
== 2 ? R_PCRWORD
:
3500 (fixP
->fx_size
== 1 ? R_RELBYTE
:
3501 fixP
->fx_size
== 2 ? R_RELWORD
:
3506 tc_coff_sizemachdep (frag
)
3510 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
3515 #endif /* I386COFF */
3517 #endif /* BFD_ASSEMBLER? */
3519 /* end of tc-i386.c */