1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
35 #ifndef REGISTER_WARNINGS
36 #define REGISTER_WARNINGS 1
39 #ifndef INFER_ADDR_PREFIX
40 #define INFER_ADDR_PREFIX 1
43 #ifndef SCALE1_WHEN_NO_INDEX
44 /* Specifying a scale factor besides 1 when there is no index is
45 futile. eg. `mov (%ebx,2),%al' does exactly the same as
46 `mov (%ebx),%al'. To slavishly follow what the programmer
47 specified, set SCALE1_WHEN_NO_INDEX to 0. */
48 #define SCALE1_WHEN_NO_INDEX 1
54 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
55 static int fits_in_signed_byte
PARAMS ((long));
56 static int fits_in_unsigned_byte
PARAMS ((long));
57 static int fits_in_unsigned_word
PARAMS ((long));
58 static int fits_in_signed_word
PARAMS ((long));
59 static int smallest_imm_type
PARAMS ((long));
60 static int add_prefix
PARAMS ((unsigned int));
61 static void set_16bit_code_flag
PARAMS ((int));
62 static void set_16bit_gcc_code_flag
PARAMS((int));
63 static void set_intel_syntax
PARAMS ((int));
66 static bfd_reloc_code_real_type reloc
67 PARAMS ((int, int, bfd_reloc_code_real_type
));
70 /* 'md_assemble ()' gathers together information and puts it into a
77 const reg_entry
*regs
;
82 /* TM holds the template for the insn were currently assembling. */
85 /* SUFFIX holds the instruction mnemonic suffix if given.
86 (e.g. 'l' for 'movl') */
89 /* OPERANDS gives the number of given operands. */
90 unsigned int operands
;
92 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
93 of given register, displacement, memory operands and immediate
95 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
97 /* TYPES [i] is the type (see above #defines) which tells us how to
98 use OP[i] for the corresponding operand. */
99 unsigned int types
[MAX_OPERANDS
];
101 /* Displacement expression, immediate expression, or register for each
103 union i386_op op
[MAX_OPERANDS
];
105 /* Relocation type for operand */
107 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
109 int disp_reloc
[MAX_OPERANDS
];
112 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
113 the base index byte below. */
114 const reg_entry
*base_reg
;
115 const reg_entry
*index_reg
;
116 unsigned int log2_scale_factor
;
118 /* SEG gives the seg_entries of this insn. They are zero unless
119 explicit segment overrides are given. */
120 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
122 /* PREFIX holds all the given prefix opcodes (usually null).
123 PREFIXES is the number of prefix opcodes. */
124 unsigned int prefixes
;
125 unsigned char prefix
[MAX_PREFIXES
];
127 /* RM and SIB are the modrm byte and the sib byte where the
128 addressing modes of this insn are encoded. */
134 typedef struct _i386_insn i386_insn
;
136 /* List of chars besides those in app.c:symbol_chars that can start an
137 operand. Used to prevent the scrubber eating vital white-space. */
139 const char extra_symbol_chars
[] = "*%-(@";
141 const char extra_symbol_chars
[] = "*%-(";
144 /* This array holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful */
146 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
147 /* Putting '/' here makes it impossible to use the divide operator.
148 However, we need it for compatibility with SVR4 systems. */
149 const char comment_chars
[] = "#/";
150 #define PREFIX_SEPARATOR '\\'
152 const char comment_chars
[] = "#";
153 #define PREFIX_SEPARATOR '/'
156 /* This array holds the chars that only start a comment at the beginning of
157 a line. If the line seems to have the form '# 123 filename'
158 .line and .file directives will appear in the pre-processed output */
159 /* Note that input_file.c hand checks for '#' at the beginning of the
160 first line of the input file. This is because the compiler outputs
161 #NO_APP at the beginning of its output. */
162 /* Also note that comments started like this one will always work if
163 '/' isn't otherwise defined. */
164 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
165 const char line_comment_chars
[] = "";
167 const char line_comment_chars
[] = "/";
170 const char line_separator_chars
[] = "";
172 /* Chars that can be used to separate mant from exp in floating point nums */
173 const char EXP_CHARS
[] = "eE";
175 /* Chars that mean this number is a floating point constant */
178 const char FLT_CHARS
[] = "fFdDxX";
180 /* tables for lexical analysis */
181 static char mnemonic_chars
[256];
182 static char register_chars
[256];
183 static char operand_chars
[256];
184 static char identifier_chars
[256];
185 static char digit_chars
[256];
188 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
189 #define is_operand_char(x) (operand_chars[(unsigned char) x])
190 #define is_register_char(x) (register_chars[(unsigned char) x])
191 #define is_space_char(x) ((x) == ' ')
192 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
193 #define is_digit_char(x) (digit_chars[(unsigned char) x])
195 /* put here all non-digit non-letter charcters that may occur in an operand */
196 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
198 /* md_assemble() always leaves the strings it's passed unaltered. To
199 effect this we maintain a stack of saved characters that we've smashed
200 with '\0's (indicating end of strings for various sub-fields of the
201 assembler instruction). */
202 static char save_stack
[32];
203 static char *save_stack_p
; /* stack pointer */
204 #define END_STRING_AND_SAVE(s) \
205 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
206 #define RESTORE_END_STRING(s) \
207 do { *(s) = *--save_stack_p; } while (0)
209 /* The instruction we're assembling. */
212 /* Possible templates for current insn. */
213 static const templates
*current_templates
;
215 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
216 static expressionS disp_expressions
[2], im_expressions
[2];
218 static int this_operand
; /* current operand we are working on */
220 static int flag_do_long_jump
; /* FIXME what does this do? */
222 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
224 static int intel_syntax
= 0; /* 1 for intel syntax, 0 if att syntax */
226 static int allow_naked_reg
= 0; /* 1 if register prefix % not required */
228 static char stackop_size
= '\0'; /* Used in 16 bit gcc mode to add an l
229 suffix to call, ret, enter, leave, push,
230 and pop instructions so that gcc has the
231 same stack frame as in 32 bit mode. */
233 /* Interface to relax_segment.
234 There are 2 relax states for 386 jump insns: one for conditional &
235 one for unconditional jumps. This is because these two types of
236 jumps add different sizes to frags when we're figuring out what
237 sort of jump to choose to reach a given label. */
240 #define COND_JUMP 1 /* conditional jump */
241 #define UNCOND_JUMP 2 /* unconditional jump */
245 #define SMALL16 (SMALL|CODE16)
247 #define BIG16 (BIG|CODE16)
251 #define INLINE __inline__
257 #define ENCODE_RELAX_STATE(type,size) \
258 ((relax_substateT)((type<<2) | (size)))
259 #define SIZE_FROM_RELAX_STATE(s) \
260 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
262 /* This table is used by relax_frag to promote short jumps to long
263 ones where necessary. SMALL (short) jumps may be promoted to BIG
264 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
265 don't allow a short jump in a 32 bit code segment to be promoted to
266 a 16 bit offset jump because it's slower (requires data size
267 prefix), and doesn't work, unless the destination is in the bottom
268 64k of the code segment (The top 16 bits of eip are zeroed). */
270 const relax_typeS md_relax_table
[] =
273 1) most positive reach of this state,
274 2) most negative reach of this state,
275 3) how many bytes this mode will add to the size of the current frag
276 4) which index into the table to try if we can't fit into this one.
283 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
284 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
285 /* dword conditionals adds 4 bytes to frag:
286 1 extra opcode byte, 3 extra displacement bytes. */
288 /* word conditionals add 2 bytes to frag:
289 1 extra opcode byte, 1 extra displacement byte. */
292 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
293 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
294 /* dword jmp adds 3 bytes to frag:
295 0 extra opcode bytes, 3 extra displacement bytes. */
297 /* word jmp adds 1 byte to frag:
298 0 extra opcode bytes, 1 extra displacement byte. */
305 i386_align_code (fragP
, count
)
309 /* Various efficient no-op patterns for aligning code labels. */
310 /* Note: Don't try to assemble the instructions in the comments. */
311 /* 0L and 0w are not legal */
312 static const char f32_1
[] =
314 static const char f32_2
[] =
315 {0x89,0xf6}; /* movl %esi,%esi */
316 static const char f32_3
[] =
317 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
318 static const char f32_4
[] =
319 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
320 static const char f32_5
[] =
322 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
323 static const char f32_6
[] =
324 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
325 static const char f32_7
[] =
326 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
327 static const char f32_8
[] =
329 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
330 static const char f32_9
[] =
331 {0x89,0xf6, /* movl %esi,%esi */
332 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
333 static const char f32_10
[] =
334 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
335 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
336 static const char f32_11
[] =
337 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
338 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
339 static const char f32_12
[] =
340 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
341 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
342 static const char f32_13
[] =
343 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
344 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
345 static const char f32_14
[] =
346 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
347 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
348 static const char f32_15
[] =
349 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
350 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
351 static const char f16_3
[] =
352 {0x8d,0x74,0x00}; /* lea 0(%esi),%esi */
353 static const char f16_4
[] =
354 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
355 static const char f16_5
[] =
357 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
358 static const char f16_6
[] =
359 {0x89,0xf6, /* mov %si,%si */
360 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
361 static const char f16_7
[] =
362 {0x8d,0x74,0x00, /* lea 0(%si),%si */
363 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
364 static const char f16_8
[] =
365 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
366 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
367 static const char *const f32_patt
[] = {
368 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
369 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
371 static const char *const f16_patt
[] = {
372 f32_1
, f32_2
, f16_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
373 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
376 if (count
> 0 && count
<= 15)
380 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
381 f16_patt
[count
- 1], count
);
382 if (count
> 8) /* adjust jump offset */
383 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
386 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
387 f32_patt
[count
- 1], count
);
388 fragP
->fr_var
= count
;
392 static char *output_invalid
PARAMS ((int c
));
393 static int i386_operand
PARAMS ((char *operand_string
));
394 static int i386_intel_operand
PARAMS ((char *operand_string
, int got_a_float
));
395 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
399 static void s_bss
PARAMS ((int));
402 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
404 static INLINE
unsigned int
405 mode_from_disp_size (t
)
408 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
412 fits_in_signed_byte (num
)
415 return (num
>= -128) && (num
<= 127);
416 } /* fits_in_signed_byte() */
419 fits_in_unsigned_byte (num
)
422 return (num
& 0xff) == num
;
423 } /* fits_in_unsigned_byte() */
426 fits_in_unsigned_word (num
)
429 return (num
& 0xffff) == num
;
430 } /* fits_in_unsigned_word() */
433 fits_in_signed_word (num
)
436 return (-32768 <= num
) && (num
<= 32767);
437 } /* fits_in_signed_word() */
440 smallest_imm_type (num
)
444 /* This code is disabled because all the Imm1 forms in the opcode table
445 are slower on the i486, and they're the versions with the implicitly
446 specified single-position displacement, which has another syntax if
447 you really want to use that form. If you really prefer to have the
448 one-byte-shorter Imm1 form despite these problems, re-enable this
451 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
453 return (fits_in_signed_byte (num
)
454 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
455 : fits_in_unsigned_byte (num
)
456 ? (Imm8
| Imm16
| Imm32
)
457 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
460 } /* smallest_imm_type() */
462 /* Returns 0 if attempting to add a prefix where one from the same
463 class already exists, 1 if non rep/repne added, 2 if rep/repne
477 case CS_PREFIX_OPCODE
:
478 case DS_PREFIX_OPCODE
:
479 case ES_PREFIX_OPCODE
:
480 case FS_PREFIX_OPCODE
:
481 case GS_PREFIX_OPCODE
:
482 case SS_PREFIX_OPCODE
:
486 case REPNE_PREFIX_OPCODE
:
487 case REPE_PREFIX_OPCODE
:
490 case LOCK_PREFIX_OPCODE
:
498 case ADDR_PREFIX_OPCODE
:
502 case DATA_PREFIX_OPCODE
:
509 as_bad (_("same type of prefix used twice"));
514 i
.prefix
[q
] = prefix
;
519 set_16bit_code_flag (new_16bit_code_flag
)
520 int new_16bit_code_flag
;
522 flag_16bit_code
= new_16bit_code_flag
;
527 set_16bit_gcc_code_flag (new_16bit_code_flag
)
528 int new_16bit_code_flag
;
530 flag_16bit_code
= new_16bit_code_flag
;
531 stackop_size
= new_16bit_code_flag
? 'l' : '\0';
535 set_intel_syntax (syntax_flag
)
538 /* Find out if register prefixing is specified. */
539 int ask_naked_reg
= 0;
542 if (! is_end_of_line
[(unsigned char) *input_line_pointer
])
544 char *string
= input_line_pointer
;
545 int e
= get_symbol_end ();
547 if (strcmp(string
, "prefix") == 0)
549 else if (strcmp(string
, "noprefix") == 0)
552 as_bad (_("Bad argument to syntax directive."));
553 *input_line_pointer
= e
;
555 demand_empty_rest_of_line ();
557 intel_syntax
= syntax_flag
;
559 if (ask_naked_reg
== 0)
562 allow_naked_reg
= (intel_syntax
563 && (bfd_get_symbol_leading_char (stdoutput
) != '\0'));
565 allow_naked_reg
= 0; /* conservative default */
569 allow_naked_reg
= (ask_naked_reg
< 0);
572 const pseudo_typeS md_pseudo_table
[] =
577 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
578 {"align", s_align_bytes
, 0},
580 {"align", s_align_ptwo
, 0},
582 {"ffloat", float_cons
, 'f'},
583 {"dfloat", float_cons
, 'd'},
584 {"tfloat", float_cons
, 'x'},
586 {"noopt", s_ignore
, 0},
587 {"optim", s_ignore
, 0},
588 {"code16gcc", set_16bit_gcc_code_flag
, 1},
589 {"code16", set_16bit_code_flag
, 1},
590 {"code32", set_16bit_code_flag
, 0},
591 {"intel_syntax", set_intel_syntax
, 1},
592 {"att_syntax", set_intel_syntax
, 0},
596 /* for interface with expression () */
597 extern char *input_line_pointer
;
599 /* hash table for instruction mnemonic lookup */
600 static struct hash_control
*op_hash
;
601 /* hash table for register lookup */
602 static struct hash_control
*reg_hash
;
608 const char *hash_err
;
610 /* initialize op_hash hash table */
611 op_hash
= hash_new ();
614 register const template *optab
;
615 register templates
*core_optab
;
617 optab
= i386_optab
; /* setup for loop */
618 core_optab
= (templates
*) xmalloc (sizeof (templates
));
619 core_optab
->start
= optab
;
624 if (optab
->name
== NULL
625 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
627 /* different name --> ship out current template list;
628 add to hash table; & begin anew */
629 core_optab
->end
= optab
;
630 hash_err
= hash_insert (op_hash
,
636 as_fatal (_("Internal Error: Can't hash %s: %s"),
640 if (optab
->name
== NULL
)
642 core_optab
= (templates
*) xmalloc (sizeof (templates
));
643 core_optab
->start
= optab
;
648 /* initialize reg_hash hash table */
649 reg_hash
= hash_new ();
651 register const reg_entry
*regtab
;
653 for (regtab
= i386_regtab
;
654 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
657 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
663 /* fill in lexical tables: mnemonic_chars, operand_chars. */
668 for (c
= 0; c
< 256; c
++)
673 mnemonic_chars
[c
] = c
;
674 register_chars
[c
] = c
;
675 operand_chars
[c
] = c
;
677 else if (islower (c
))
679 mnemonic_chars
[c
] = c
;
680 register_chars
[c
] = c
;
681 operand_chars
[c
] = c
;
683 else if (isupper (c
))
685 mnemonic_chars
[c
] = tolower (c
);
686 register_chars
[c
] = mnemonic_chars
[c
];
687 operand_chars
[c
] = c
;
690 if (isalpha (c
) || isdigit (c
))
691 identifier_chars
[c
] = c
;
694 identifier_chars
[c
] = c
;
695 operand_chars
[c
] = c
;
700 identifier_chars
['@'] = '@';
702 digit_chars
['-'] = '-';
703 identifier_chars
['_'] = '_';
704 identifier_chars
['.'] = '.';
706 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
707 operand_chars
[(unsigned char) *p
] = *p
;
710 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
711 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
713 record_alignment (text_section
, 2);
714 record_alignment (data_section
, 2);
715 record_alignment (bss_section
, 2);
721 i386_print_statistics (file
)
724 hash_print_statistics (file
, "i386 opcode", op_hash
);
725 hash_print_statistics (file
, "i386 register", reg_hash
);
731 /* debugging routines for md_assemble */
732 static void pi
PARAMS ((char *, i386_insn
*));
733 static void pte
PARAMS ((template *));
734 static void pt
PARAMS ((unsigned int));
735 static void pe
PARAMS ((expressionS
*));
736 static void ps
PARAMS ((symbolS
*));
743 register template *p
;
746 fprintf (stdout
, "%s: template ", line
);
748 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
749 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
750 fprintf (stdout
, " base %x index %x scale %x\n",
751 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
752 for (i
= 0; i
< x
->operands
; i
++)
754 fprintf (stdout
, " #%d: ", i
+ 1);
756 fprintf (stdout
, "\n");
758 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
| RegXMM
))
759 fprintf (stdout
, "%s\n", x
->op
[i
].regs
->reg_name
);
760 if (x
->types
[i
] & Imm
)
762 if (x
->types
[i
] & Disp
)
772 fprintf (stdout
, " %d operands ", t
->operands
);
773 fprintf (stdout
, "opcode %x ",
775 if (t
->extension_opcode
!= None
)
776 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
777 if (t
->opcode_modifier
& D
)
778 fprintf (stdout
, "D");
779 if (t
->opcode_modifier
& W
)
780 fprintf (stdout
, "W");
781 fprintf (stdout
, "\n");
782 for (i
= 0; i
< t
->operands
; i
++)
784 fprintf (stdout
, " #%d type ", i
+ 1);
785 pt (t
->operand_types
[i
]);
786 fprintf (stdout
, "\n");
794 fprintf (stdout
, " operation %d\n", e
->X_op
);
795 fprintf (stdout
, " add_number %ld (%lx)\n",
796 (long) e
->X_add_number
, (long) e
->X_add_number
);
799 fprintf (stdout
, " add_symbol ");
800 ps (e
->X_add_symbol
);
801 fprintf (stdout
, "\n");
805 fprintf (stdout
, " op_symbol ");
807 fprintf (stdout
, "\n");
815 fprintf (stdout
, "%s type %s%s",
817 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
818 segment_name (S_GET_SEGMENT (s
)));
837 { BaseIndex
, "BaseIndex" },
841 { InOutPortReg
, "InOutPortReg" },
842 { ShiftCount
, "ShiftCount" },
843 { Control
, "control reg" },
844 { Test
, "test reg" },
845 { Debug
, "debug reg" },
846 { FloatReg
, "FReg" },
847 { FloatAcc
, "FAcc" },
851 { JumpAbsolute
, "Jump Absolute" },
862 register struct type_name
*ty
;
866 fprintf (stdout
, _("Unknown"));
870 for (ty
= type_names
; ty
->mask
; ty
++)
872 fprintf (stdout
, "%s, ", ty
->tname
);
877 #endif /* DEBUG386 */
880 tc_i386_force_relocation (fixp
)
884 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
885 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
890 return fixp
->fx_r_type
== 7;
895 static bfd_reloc_code_real_type reloc
896 PARAMS ((int, int, bfd_reloc_code_real_type
));
898 static bfd_reloc_code_real_type
899 reloc (size
, pcrel
, other
)
902 bfd_reloc_code_real_type other
;
904 if (other
!= NO_RELOC
) return other
;
910 case 1: return BFD_RELOC_8_PCREL
;
911 case 2: return BFD_RELOC_16_PCREL
;
912 case 4: return BFD_RELOC_32_PCREL
;
914 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
920 case 1: return BFD_RELOC_8
;
921 case 2: return BFD_RELOC_16
;
922 case 4: return BFD_RELOC_32
;
924 as_bad (_("Can not do %d byte relocation"), size
);
927 return BFD_RELOC_NONE
;
931 * Here we decide which fixups can be adjusted to make them relative to
932 * the beginning of the section instead of the symbol. Basically we need
933 * to make sure that the dynamic relocations are done correctly, so in
934 * some cases we force the original symbol to be used.
937 tc_i386_fix_adjustable (fixP
)
940 #if defined (OBJ_ELF) || defined (TE_PE)
941 /* Prevent all adjustments to global symbols, or else dynamic
942 linking will not work correctly. */
943 if (S_IS_EXTERN (fixP
->fx_addsy
))
945 if (S_IS_WEAK (fixP
->fx_addsy
))
948 /* adjust_reloc_syms doesn't know about the GOT */
949 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
950 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
951 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
952 || fixP
->fx_r_type
== BFD_RELOC_RVA
953 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
954 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
959 #define reloc(SIZE,PCREL,OTHER) 0
960 #define BFD_RELOC_16 0
961 #define BFD_RELOC_32 0
962 #define BFD_RELOC_16_PCREL 0
963 #define BFD_RELOC_32_PCREL 0
964 #define BFD_RELOC_386_PLT32 0
965 #define BFD_RELOC_386_GOT32 0
966 #define BFD_RELOC_386_GOTOFF 0
970 intel_float_operand
PARAMS ((char *mnemonic
));
973 intel_float_operand (mnemonic
)
976 if (mnemonic
[0] == 'f' && mnemonic
[1] =='i')
979 if (mnemonic
[0] == 'f')
985 /* This is the guts of the machine-dependent assembler. LINE points to a
986 machine dependent instruction. This function is supposed to emit
987 the frags/bytes it assembles to. */
993 /* Points to template once we've found it. */
996 /* Count the size of the instruction generated. */
1001 char mnemonic
[MAX_MNEM_SIZE
];
1003 /* Initialize globals. */
1004 memset (&i
, '\0', sizeof (i
));
1005 for (j
= 0; j
< MAX_OPERANDS
; j
++)
1006 i
.disp_reloc
[j
] = NO_RELOC
;
1007 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
1008 memset (im_expressions
, '\0', sizeof (im_expressions
));
1009 save_stack_p
= save_stack
; /* reset stack pointer */
1011 /* First parse an instruction mnemonic & call i386_operand for the operands.
1012 We assume that the scrubber has arranged it so that line[0] is the valid
1013 start of a (possibly prefixed) mnemonic. */
1016 char *token_start
= l
;
1019 /* Non-zero if we found a prefix only acceptable with string insns. */
1020 const char *expecting_string_instruction
= NULL
;
1025 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
1028 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
1030 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1035 if (!is_space_char (*l
)
1036 && *l
!= END_OF_INSN
1037 && *l
!= PREFIX_SEPARATOR
)
1039 as_bad (_("invalid character %s in mnemonic"),
1040 output_invalid (*l
));
1043 if (token_start
== l
)
1045 if (*l
== PREFIX_SEPARATOR
)
1046 as_bad (_("expecting prefix; got nothing"));
1048 as_bad (_("expecting mnemonic; got nothing"));
1052 /* Look up instruction (or prefix) via hash table. */
1053 current_templates
= hash_find (op_hash
, mnemonic
);
1055 if (*l
!= END_OF_INSN
1056 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
1057 && current_templates
1058 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
1060 /* If we are in 16-bit mode, do not allow addr16 or data16.
1061 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1062 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
1063 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
1066 as_bad (_("redundant %s prefix"),
1067 current_templates
->start
->name
);
1070 /* Add prefix, checking for repeated prefixes. */
1071 switch (add_prefix (current_templates
->start
->base_opcode
))
1076 expecting_string_instruction
=
1077 current_templates
->start
->name
;
1080 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1087 if (!current_templates
)
1089 /* See if we can get a match by trimming off a suffix. */
1092 case WORD_MNEM_SUFFIX
:
1093 case BYTE_MNEM_SUFFIX
:
1094 case SHORT_MNEM_SUFFIX
:
1095 case LONG_MNEM_SUFFIX
:
1096 i
.suffix
= mnem_p
[-1];
1098 current_templates
= hash_find (op_hash
, mnemonic
);
1102 case DWORD_MNEM_SUFFIX
:
1105 i
.suffix
= mnem_p
[-1];
1107 current_templates
= hash_find (op_hash
, mnemonic
);
1111 if (!current_templates
)
1113 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1118 /* check for rep/repne without a string instruction */
1119 if (expecting_string_instruction
1120 && !(current_templates
->start
->opcode_modifier
& IsString
))
1122 as_bad (_("expecting string instruction after `%s'"),
1123 expecting_string_instruction
);
1127 /* There may be operands to parse. */
1128 if (*l
!= END_OF_INSN
)
1130 /* parse operands */
1132 /* 1 if operand is pending after ','. */
1133 unsigned int expecting_operand
= 0;
1135 /* Non-zero if operand parens not balanced. */
1136 unsigned int paren_not_balanced
;
1140 /* skip optional white space before operand */
1141 if (is_space_char (*l
))
1143 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1145 as_bad (_("invalid character %s before operand %d"),
1146 output_invalid (*l
),
1150 token_start
= l
; /* after white space */
1151 paren_not_balanced
= 0;
1152 while (paren_not_balanced
|| *l
!= ',')
1154 if (*l
== END_OF_INSN
)
1156 if (paren_not_balanced
)
1159 as_bad (_("unbalanced parenthesis in operand %d."),
1162 as_bad (_("unbalanced brackets in operand %d."),
1167 break; /* we are done */
1169 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1171 as_bad (_("invalid character %s in operand %d"),
1172 output_invalid (*l
),
1179 ++paren_not_balanced
;
1181 --paren_not_balanced
;
1186 ++paren_not_balanced
;
1188 --paren_not_balanced
;
1192 if (l
!= token_start
)
1193 { /* yes, we've read in another operand */
1194 unsigned int operand_ok
;
1195 this_operand
= i
.operands
++;
1196 if (i
.operands
> MAX_OPERANDS
)
1198 as_bad (_("spurious operands; (%d operands/instruction max)"),
1202 /* now parse operand adding info to 'i' as we go along */
1203 END_STRING_AND_SAVE (l
);
1206 operand_ok
= i386_intel_operand (token_start
, intel_float_operand (mnemonic
));
1208 operand_ok
= i386_operand (token_start
);
1210 RESTORE_END_STRING (l
); /* restore old contents */
1216 if (expecting_operand
)
1218 expecting_operand_after_comma
:
1219 as_bad (_("expecting operand after ','; got nothing"));
1224 as_bad (_("expecting operand before ','; got nothing"));
1229 /* now *l must be either ',' or END_OF_INSN */
1232 if (*++l
== END_OF_INSN
)
1233 { /* just skip it, if it's \n complain */
1234 goto expecting_operand_after_comma
;
1236 expecting_operand
= 1;
1239 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1243 /* Now we've parsed the mnemonic into a set of templates, and have the
1246 Next, we find a template that matches the given insn,
1247 making sure the overlap of the given operands types is consistent
1248 with the template operand types. */
1250 #define MATCH(overlap, given, template) \
1251 ((overlap & ~JumpAbsolute) \
1252 && ((given) & (BaseIndex|JumpAbsolute)) == ((overlap) & (BaseIndex|JumpAbsolute)))
1254 /* If given types r0 and r1 are registers they must be of the same type
1255 unless the expected operand type register overlap is null.
1256 Note that Acc in a template matches every size of reg. */
1257 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1258 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1259 ((g0) & Reg) == ((g1) & Reg) || \
1260 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1263 register unsigned int overlap0
, overlap1
;
1264 unsigned int overlap2
;
1265 unsigned int found_reverse_match
;
1268 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1269 if (intel_syntax
&& i
.operands
> 1
1270 && (strcmp (mnemonic
, "enter") != 0)
1271 && (strcmp (mnemonic
, "bound") != 0))
1273 union i386_op temp_op
;
1274 unsigned int temp_type
;
1278 if (i
.operands
== 2)
1283 else if (i
.operands
== 3)
1288 temp_type
= i
.types
[xchg2
];
1289 i
.types
[xchg2
] = i
.types
[xchg1
];
1290 i
.types
[xchg1
] = temp_type
;
1291 temp_op
= i
.op
[xchg2
];
1292 i
.op
[xchg2
] = i
.op
[xchg1
];
1293 i
.op
[xchg1
] = temp_op
;
1295 if (i
.mem_operands
== 2)
1297 const seg_entry
*temp_seg
;
1298 temp_seg
= i
.seg
[0];
1299 i
.seg
[0] = i
.seg
[1];
1300 i
.seg
[1] = temp_seg
;
1306 found_reverse_match
= 0;
1307 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1309 : (i
.suffix
== WORD_MNEM_SUFFIX
1311 : (i
.suffix
== SHORT_MNEM_SUFFIX
1313 : (i
.suffix
== LONG_MNEM_SUFFIX
1315 : (i
.suffix
== DWORD_MNEM_SUFFIX
1317 : (i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf
: 0))))));
1319 for (t
= current_templates
->start
;
1320 t
< current_templates
->end
;
1323 /* Must have right number of operands. */
1324 if (i
.operands
!= t
->operands
)
1327 /* Check the suffix, except for some instructions in intel mode. */
1328 if ((t
->opcode_modifier
& suffix_check
)
1330 && t
->base_opcode
== 0xd9
1331 && (t
->extension_opcode
== 5 /* 0xd9,5 "fldcw" */
1332 || t
->extension_opcode
== 7))) /* 0xd9,7 "f{n}stcw" */
1335 else if (!t
->operands
)
1336 break; /* 0 operands always matches */
1338 overlap0
= i
.types
[0] & t
->operand_types
[0];
1339 switch (t
->operands
)
1342 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1347 overlap1
= i
.types
[1] & t
->operand_types
[1];
1348 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1349 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1350 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1351 t
->operand_types
[0],
1352 overlap1
, i
.types
[1],
1353 t
->operand_types
[1]))
1356 /* check if other direction is valid ... */
1357 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1360 /* try reversing direction of operands */
1361 overlap0
= i
.types
[0] & t
->operand_types
[1];
1362 overlap1
= i
.types
[1] & t
->operand_types
[0];
1363 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1364 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1365 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1366 t
->operand_types
[1],
1367 overlap1
, i
.types
[1],
1368 t
->operand_types
[0]))
1370 /* does not match either direction */
1373 /* found_reverse_match holds which of D or FloatDR
1375 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1378 /* found a forward 2 operand match here */
1379 if (t
->operands
== 3)
1381 /* Here we make use of the fact that there are no
1382 reverse match 3 operand instructions, and all 3
1383 operand instructions only need to be checked for
1384 register consistency between operands 2 and 3. */
1385 overlap2
= i
.types
[2] & t
->operand_types
[2];
1386 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1387 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1388 t
->operand_types
[1],
1389 overlap2
, i
.types
[2],
1390 t
->operand_types
[2]))
1394 /* found either forward/reverse 2 or 3 operand match here:
1395 slip through to break */
1397 break; /* we've found a match; break out of loop */
1398 } /* for (t = ... */
1399 if (t
== current_templates
->end
)
1400 { /* we found no match */
1401 as_bad (_("suffix or operands invalid for `%s'"),
1402 current_templates
->start
->name
);
1407 && (i
.types
[0] & JumpAbsolute
) != (t
->operand_types
[0] & JumpAbsolute
))
1409 as_warn (_("Indirect %s without `*'"), t
->name
);
1412 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1414 /* Warn them that a data or address size prefix doesn't affect
1415 assembly of the next line of code. */
1416 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1419 /* Copy the template we found. */
1421 if (found_reverse_match
)
1423 /* If we found a reverse match we must alter the opcode
1424 direction bit. found_reverse_match holds bits to change
1425 (different for int & float insns). */
1427 i
.tm
.base_opcode
^= found_reverse_match
;
1429 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1430 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1433 /* Undo UNIXWARE_COMPAT brokenness when in Intel mode. See i386.h */
1436 && (i
.tm
.base_opcode
& 0xfffffde0) == 0xdce0)
1437 i
.tm
.base_opcode
^= FloatR
;
1439 if (i
.tm
.opcode_modifier
& FWait
)
1440 if (! add_prefix (FWAIT_OPCODE
))
1443 /* Check string instruction segment overrides */
1444 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1446 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1447 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1449 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1451 as_bad (_("`%s' operand %d must use `%%es' segment"),
1456 /* There's only ever one segment override allowed per instruction.
1457 This instruction possibly has a legal segment override on the
1458 second operand, so copy the segment to where non-string
1459 instructions store it, allowing common code. */
1460 i
.seg
[0] = i
.seg
[1];
1462 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1464 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1466 as_bad (_("`%s' operand %d must use `%%es' segment"),
1474 /* If matched instruction specifies an explicit instruction mnemonic
1476 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1478 if (i
.tm
.opcode_modifier
& Size16
)
1479 i
.suffix
= WORD_MNEM_SUFFIX
;
1481 i
.suffix
= LONG_MNEM_SUFFIX
;
1483 else if (i
.reg_operands
)
1485 /* If there's no instruction mnemonic suffix we try to invent one
1486 based on register operands. */
1489 /* We take i.suffix from the last register operand specified,
1490 Destination register type is more significant than source
1493 for (op
= i
.operands
; --op
>= 0; )
1494 if (i
.types
[op
] & Reg
)
1496 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1497 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1502 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1505 for (op
= i
.operands
; --op
>= 0; )
1507 /* If this is an eight bit register, it's OK. If it's
1508 the 16 or 32 bit version of an eight bit register,
1509 we will just use the low portion, and that's OK too. */
1510 if (i
.types
[op
] & Reg8
)
1513 /* movzx and movsx should not generate this warning. */
1515 && (i
.tm
.base_opcode
== 0xfb7
1516 || i
.tm
.base_opcode
== 0xfb6
1517 || i
.tm
.base_opcode
== 0xfbe
1518 || i
.tm
.base_opcode
== 0xfbf))
1521 if ((i
.types
[op
] & WordReg
) && i
.op
[op
].regs
->reg_num
< 4
1523 /* Check that the template allows eight bit regs
1524 This kills insns such as `orb $1,%edx', which
1525 maybe should be allowed. */
1526 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1530 #if REGISTER_WARNINGS
1531 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1532 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1533 (i
.op
[op
].regs
- (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1534 i
.op
[op
].regs
->reg_name
,
1539 /* Any other register is bad */
1540 if (i
.types
[op
] & (Reg
| RegMMX
| RegXMM
1542 | Control
| Debug
| Test
1543 | FloatReg
| FloatAcc
))
1545 as_bad (_("`%%%s' not allowed with `%s%c'"),
1546 i
.op
[op
].regs
->reg_name
,
1553 else if (i
.suffix
== LONG_MNEM_SUFFIX
)
1556 for (op
= i
.operands
; --op
>= 0; )
1557 /* Reject eight bit registers, except where the template
1558 requires them. (eg. movzb) */
1559 if ((i
.types
[op
] & Reg8
) != 0
1560 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1562 as_bad (_("`%%%s' not allowed with `%s%c'"),
1563 i
.op
[op
].regs
->reg_name
,
1568 #if REGISTER_WARNINGS
1569 /* Warn if the e prefix on a general reg is missing. */
1570 else if ((i
.types
[op
] & Reg16
) != 0
1571 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1573 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1574 (i
.op
[op
].regs
+ 8)->reg_name
,
1575 i
.op
[op
].regs
->reg_name
,
1580 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1583 for (op
= i
.operands
; --op
>= 0; )
1584 /* Reject eight bit registers, except where the template
1585 requires them. (eg. movzb) */
1586 if ((i
.types
[op
] & Reg8
) != 0
1587 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1589 as_bad (_("`%%%s' not allowed with `%s%c'"),
1590 i
.op
[op
].regs
->reg_name
,
1595 #if REGISTER_WARNINGS
1596 /* Warn if the e prefix on a general reg is present. */
1597 else if ((i
.types
[op
] & Reg32
) != 0
1598 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1600 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1601 (i
.op
[op
].regs
- 8)->reg_name
,
1602 i
.op
[op
].regs
->reg_name
,
1610 else if ((i
.tm
.opcode_modifier
& DefaultSize
) && !i
.suffix
)
1612 i
.suffix
= stackop_size
;
1615 /* Make still unresolved immediate matches conform to size of immediate
1616 given in i.suffix. Note: overlap2 cannot be an immediate! */
1617 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1618 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1619 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1623 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1624 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1626 else if (overlap0
== (Imm16
| Imm32
))
1629 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1633 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1637 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1638 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1639 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1643 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1644 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1646 else if (overlap1
== (Imm16
| Imm32
))
1649 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1653 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1657 assert ((overlap2
& Imm
) == 0);
1659 i
.types
[0] = overlap0
;
1660 if (overlap0
& ImplicitRegister
)
1662 if (overlap0
& Imm1
)
1663 i
.imm_operands
= 0; /* kludge for shift insns */
1665 i
.types
[1] = overlap1
;
1666 if (overlap1
& ImplicitRegister
)
1669 i
.types
[2] = overlap2
;
1670 if (overlap2
& ImplicitRegister
)
1673 /* Finalize opcode. First, we change the opcode based on the operand
1674 size given by i.suffix: We need not change things for byte insns. */
1676 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1678 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1682 /* For movzx and movsx, need to check the register type */
1684 && (i
.tm
.base_opcode
== 0xfb6 || i
.tm
.base_opcode
== 0xfbe))
1685 if (i
.suffix
&& i
.suffix
== BYTE_MNEM_SUFFIX
)
1687 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1689 if ((i
.op
[1].regs
->reg_type
& Reg16
) != 0)
1690 if (!add_prefix (prefix
))
1694 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1696 /* It's not a byte, select word/dword operation. */
1697 if (i
.tm
.opcode_modifier
& W
)
1699 if (i
.tm
.opcode_modifier
& ShortForm
)
1700 i
.tm
.base_opcode
|= 8;
1702 i
.tm
.base_opcode
|= 1;
1704 /* Now select between word & dword operations via the operand
1705 size prefix, except for instructions that will ignore this
1707 if (((intel_syntax
&& (i
.suffix
== DWORD_MNEM_SUFFIX
))
1708 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1709 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1711 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1712 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1713 prefix
= ADDR_PREFIX_OPCODE
;
1715 if (! add_prefix (prefix
))
1718 /* Size floating point instruction. */
1719 if (i
.suffix
== LONG_MNEM_SUFFIX
1720 || (intel_syntax
&& i
.suffix
== DWORD_MNEM_SUFFIX
))
1722 if (i
.tm
.opcode_modifier
& FloatMF
)
1723 i
.tm
.base_opcode
^= 4;
1727 if (i
.tm
.opcode_modifier
& ImmExt
)
1729 /* These AMD 3DNow! and Intel Katmai New Instructions have an
1730 opcode suffix which is coded in the same place as an 8-bit
1731 immediate field would be. Here we fake an 8-bit immediate
1732 operand from the opcode suffix stored in tm.extension_opcode. */
1736 assert(i
.imm_operands
== 0 && i
.operands
<= 2 && 2 < MAX_OPERANDS
);
1738 exp
= &im_expressions
[i
.imm_operands
++];
1739 i
.op
[i
.operands
].imms
= exp
;
1740 i
.types
[i
.operands
++] = Imm8
;
1741 exp
->X_op
= O_constant
;
1742 exp
->X_add_number
= i
.tm
.extension_opcode
;
1743 i
.tm
.extension_opcode
= None
;
1746 /* For insns with operands there are more diddles to do to the opcode. */
1749 /* Default segment register this instruction will use
1750 for memory accesses. 0 means unknown.
1751 This is only for optimizing out unnecessary segment overrides. */
1752 const seg_entry
*default_seg
= 0;
1754 /* The imul $imm, %reg instruction is converted into
1755 imul $imm, %reg, %reg, and the clr %reg instruction
1756 is converted into xor %reg, %reg. */
1757 if (i
.tm
.opcode_modifier
& regKludge
)
1759 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1760 /* Pretend we saw the extra register operand. */
1761 assert (i
.op
[first_reg_op
+1].regs
== 0);
1762 i
.op
[first_reg_op
+1].regs
= i
.op
[first_reg_op
].regs
;
1763 i
.types
[first_reg_op
+1] = i
.types
[first_reg_op
];
1767 if (i
.tm
.opcode_modifier
& ShortForm
)
1769 /* The register or float register operand is in operand 0 or 1. */
1770 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1771 /* Register goes in low 3 bits of opcode. */
1772 i
.tm
.base_opcode
|= i
.op
[op
].regs
->reg_num
;
1773 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1775 /* Warn about some common errors, but press on regardless.
1776 The first case can be generated by gcc (<= 2.8.1). */
1777 if (i
.operands
== 2)
1779 /* reversed arguments on faddp, fsubp, etc. */
1780 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1781 i
.op
[1].regs
->reg_name
,
1782 i
.op
[0].regs
->reg_name
);
1786 /* extraneous `l' suffix on fp insn */
1787 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1788 i
.op
[0].regs
->reg_name
);
1792 else if (i
.tm
.opcode_modifier
& Modrm
)
1794 /* The opcode is completed (modulo i.tm.extension_opcode which
1795 must be put into the modrm byte).
1796 Now, we make the modrm & index base bytes based on all the
1797 info we've collected. */
1799 /* i.reg_operands MUST be the number of real register operands;
1800 implicit registers do not count. */
1801 if (i
.reg_operands
== 2)
1803 unsigned int source
, dest
;
1804 source
= ((i
.types
[0]
1805 & (Reg
| RegMMX
| RegXMM
1807 | Control
| Debug
| Test
))
1812 /* One of the register operands will be encoded in the
1813 i.tm.reg field, the other in the combined i.tm.mode
1814 and i.tm.regmem fields. If no form of this
1815 instruction supports a memory destination operand,
1816 then we assume the source operand may sometimes be
1817 a memory operand and so we need to store the
1818 destination in the i.rm.reg field. */
1819 if ((i
.tm
.operand_types
[dest
] & AnyMem
) == 0)
1821 i
.rm
.reg
= i
.op
[dest
].regs
->reg_num
;
1822 i
.rm
.regmem
= i
.op
[source
].regs
->reg_num
;
1826 i
.rm
.reg
= i
.op
[source
].regs
->reg_num
;
1827 i
.rm
.regmem
= i
.op
[dest
].regs
->reg_num
;
1831 { /* if it's not 2 reg operands... */
1834 unsigned int fake_zero_displacement
= 0;
1835 unsigned int op
= ((i
.types
[0] & AnyMem
)
1837 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1844 if (! i
.disp_operands
)
1845 fake_zero_displacement
= 1;
1848 /* Operand is just <disp> */
1849 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1851 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1852 i
.types
[op
] &= ~Disp
;
1853 i
.types
[op
] |= Disp16
;
1857 i
.rm
.regmem
= NO_BASE_REGISTER
;
1858 i
.types
[op
] &= ~Disp
;
1859 i
.types
[op
] |= Disp32
;
1862 else /* ! i.base_reg && i.index_reg */
1864 i
.sib
.index
= i
.index_reg
->reg_num
;
1865 i
.sib
.base
= NO_BASE_REGISTER
;
1866 i
.sib
.scale
= i
.log2_scale_factor
;
1867 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1868 i
.types
[op
] &= ~Disp
;
1869 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1872 else if (i
.base_reg
->reg_type
& Reg16
)
1874 switch (i
.base_reg
->reg_num
)
1879 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1880 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1887 if ((i
.types
[op
] & Disp
) == 0)
1889 /* fake (%bp) into 0(%bp) */
1890 i
.types
[op
] |= Disp8
;
1891 fake_zero_displacement
= 1;
1894 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1895 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1897 default: /* (%si) -> 4 or (%di) -> 5 */
1898 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1900 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1902 else /* i.base_reg and 32 bit mode */
1904 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1905 i
.sib
.base
= i
.base_reg
->reg_num
;
1906 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1909 if (i
.disp_operands
== 0)
1911 fake_zero_displacement
= 1;
1912 i
.types
[op
] |= Disp8
;
1915 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1919 i
.sib
.scale
= i
.log2_scale_factor
;
1922 /* <disp>(%esp) becomes two byte modrm
1923 with no index register. We've already
1924 stored the code for esp in i.rm.regmem
1925 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1926 base register besides %esp will not use
1927 the extra modrm byte. */
1928 i
.sib
.index
= NO_INDEX_REGISTER
;
1929 #if ! SCALE1_WHEN_NO_INDEX
1930 /* Another case where we force the second
1932 if (i
.log2_scale_factor
)
1933 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1938 i
.sib
.index
= i
.index_reg
->reg_num
;
1939 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1941 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1944 if (fake_zero_displacement
)
1946 /* Fakes a zero displacement assuming that i.types[op]
1947 holds the correct displacement size. */
1950 assert (i
.op
[op
].disps
== 0);
1951 exp
= &disp_expressions
[i
.disp_operands
++];
1952 i
.op
[op
].disps
= exp
;
1953 exp
->X_op
= O_constant
;
1954 exp
->X_add_number
= 0;
1955 exp
->X_add_symbol
= (symbolS
*) 0;
1956 exp
->X_op_symbol
= (symbolS
*) 0;
1960 /* Fill in i.rm.reg or i.rm.regmem field with register
1961 operand (if any) based on i.tm.extension_opcode.
1962 Again, we must be careful to make sure that
1963 segment/control/debug/test/MMX registers are coded
1964 into the i.rm.reg field. */
1969 & (Reg
| RegMMX
| RegXMM
1971 | Control
| Debug
| Test
))
1974 & (Reg
| RegMMX
| RegXMM
1976 | Control
| Debug
| Test
))
1979 /* If there is an extension opcode to put here, the
1980 register number must be put into the regmem field. */
1981 if (i
.tm
.extension_opcode
!= None
)
1982 i
.rm
.regmem
= i
.op
[op
].regs
->reg_num
;
1984 i
.rm
.reg
= i
.op
[op
].regs
->reg_num
;
1986 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1987 we must set it to 3 to indicate this is a register
1988 operand in the regmem field. */
1989 if (!i
.mem_operands
)
1993 /* Fill in i.rm.reg field with extension opcode (if any). */
1994 if (i
.tm
.extension_opcode
!= None
)
1995 i
.rm
.reg
= i
.tm
.extension_opcode
;
1998 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
2000 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.op
[0].regs
->reg_num
== 1)
2002 as_bad (_("you can't `pop %%cs'"));
2005 i
.tm
.base_opcode
|= (i
.op
[0].regs
->reg_num
<< 3);
2007 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
2011 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
2013 /* For the string instructions that allow a segment override
2014 on one of their operands, the default segment is ds. */
2018 /* If a segment was explicitly specified,
2019 and the specified segment is not the default,
2020 use an opcode prefix to select it.
2021 If we never figured out what the default segment is,
2022 then default_seg will be zero at this point,
2023 and the specified segment prefix will always be used. */
2024 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
2026 if (! add_prefix (i
.seg
[0]->seg_prefix
))
2030 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
2032 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */
2033 as_warn (_("translating to `%sp'"), i
.tm
.name
);
2037 /* Handle conversion of 'int $3' --> special int3 insn. */
2038 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.op
[0].imms
->X_add_number
== 3)
2040 i
.tm
.base_opcode
= INT3_OPCODE
;
2044 if ((i
.tm
.opcode_modifier
& (Jump
| JumpByte
| JumpDword
))
2045 && i
.op
[0].disps
->X_op
== O_constant
)
2047 /* Convert "jmp constant" (and "call constant") to a jump (call) to
2048 the absolute address given by the constant. Since ix86 jumps and
2049 calls are pc relative, we need to generate a reloc. */
2050 i
.op
[0].disps
->X_add_symbol
= &abs_symbol
;
2051 i
.op
[0].disps
->X_op
= O_symbol
;
2054 /* We are ready to output the insn. */
2059 if (i
.tm
.opcode_modifier
& Jump
)
2066 if (flag_16bit_code
)
2070 if (i
.prefix
[DATA_PREFIX
])
2081 if (i
.prefixes
!= 0 && !intel_syntax
)
2082 as_warn (_("skipping prefixes on this instruction"));
2084 /* It's always a symbol; End frag & setup for relax.
2085 Make sure there is enough room in this frag for the largest
2086 instruction we may generate in md_convert_frag. This is 2
2087 bytes for the opcode and room for the prefix and largest
2089 frag_grow (prefix
+ 2 + size
);
2090 insn_size
+= prefix
+ 1;
2091 /* Prefix and 1 opcode byte go in fr_fix. */
2092 p
= frag_more (prefix
+ 1);
2094 *p
++ = DATA_PREFIX_OPCODE
;
2095 *p
= i
.tm
.base_opcode
;
2096 /* 1 possible extra opcode + displacement go in fr_var. */
2097 frag_var (rs_machine_dependent
,
2100 ((unsigned char) *p
== JUMP_PC_RELATIVE
2101 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
2102 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
2103 i
.op
[0].disps
->X_add_symbol
,
2104 i
.op
[0].disps
->X_add_number
,
2107 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
2111 if (i
.tm
.opcode_modifier
& JumpByte
)
2113 /* This is a loop or jecxz type instruction. */
2115 if (i
.prefix
[ADDR_PREFIX
])
2118 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
2127 if (flag_16bit_code
)
2130 if (i
.prefix
[DATA_PREFIX
])
2133 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
2143 if (i
.prefixes
!= 0 && !intel_syntax
)
2144 as_warn (_("skipping prefixes on this instruction"));
2146 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2148 insn_size
+= 1 + size
;
2149 p
= frag_more (1 + size
);
2153 /* opcode can be at most two bytes */
2154 insn_size
+= 2 + size
;
2155 p
= frag_more (2 + size
);
2156 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2158 *p
++ = i
.tm
.base_opcode
& 0xff;
2160 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2161 i
.op
[0].disps
, 1, reloc (size
, 1, i
.disp_reloc
[0]));
2163 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2170 if (flag_16bit_code
)
2174 if (i
.prefix
[DATA_PREFIX
])
2185 if (i
.prefixes
!= 0 && !intel_syntax
)
2186 as_warn (_("skipping prefixes on this instruction"));
2188 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2189 p
= frag_more (prefix
+ 1 + 2 + size
);
2191 *p
++ = DATA_PREFIX_OPCODE
;
2192 *p
++ = i
.tm
.base_opcode
;
2193 if (i
.op
[1].imms
->X_op
== O_constant
)
2195 long n
= (long) i
.op
[1].imms
->X_add_number
;
2197 if (size
== 2 && !fits_in_unsigned_word (n
))
2199 as_bad (_("16-bit jump out of range"));
2202 md_number_to_chars (p
, (valueT
) n
, size
);
2205 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2206 i
.op
[1].imms
, 0, reloc (size
, 0, i
.disp_reloc
[0]));
2207 if (i
.op
[0].imms
->X_op
!= O_constant
)
2208 as_bad (_("can't handle non absolute segment in `%s'"),
2210 md_number_to_chars (p
+ size
, (valueT
) i
.op
[0].imms
->X_add_number
, 2);
2214 /* Output normal instructions here. */
2217 /* The prefix bytes. */
2219 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2226 md_number_to_chars (p
, (valueT
) *q
, 1);
2230 /* Now the opcode; be careful about word order here! */
2231 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2234 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2236 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2240 /* put out high byte first: can't use md_number_to_chars! */
2241 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2242 *p
= i
.tm
.base_opcode
& 0xff;
2245 { /* opcode is either 3 or 4 bytes */
2246 if (i
.tm
.base_opcode
& 0xff000000)
2250 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2257 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2258 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2259 *p
= (i
.tm
.base_opcode
) & 0xff;
2262 /* Now the modrm byte and sib byte (if present). */
2263 if (i
.tm
.opcode_modifier
& Modrm
)
2267 md_number_to_chars (p
,
2268 (valueT
) (i
.rm
.regmem
<< 0
2272 /* If i.rm.regmem == ESP (4)
2273 && i.rm.mode != (Register mode)
2275 ==> need second modrm byte. */
2276 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2278 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2282 md_number_to_chars (p
,
2283 (valueT
) (i
.sib
.base
<< 0
2285 | i
.sib
.scale
<< 6),
2290 if (i
.disp_operands
)
2292 register unsigned int n
;
2294 for (n
= 0; n
< i
.operands
; n
++)
2296 if (i
.types
[n
] & Disp
)
2298 if (i
.op
[n
].disps
->X_op
== O_constant
)
2301 long val
= (long) i
.op
[n
].disps
->X_add_number
;
2303 if (i
.types
[n
] & (Disp8
| Disp16
))
2308 mask
= ~ (long) 0xffff;
2309 if (i
.types
[n
] & Disp8
)
2312 mask
= ~ (long) 0xff;
2315 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2316 as_warn (_("%ld shortened to %ld"),
2320 p
= frag_more (size
);
2321 md_number_to_chars (p
, (valueT
) val
, size
);
2327 if (i
.types
[n
] & Disp16
)
2331 p
= frag_more (size
);
2332 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2334 reloc (size
, 0, i
.disp_reloc
[n
]));
2338 } /* end displacement output */
2340 /* output immediate */
2343 register unsigned int n
;
2345 for (n
= 0; n
< i
.operands
; n
++)
2347 if (i
.types
[n
] & Imm
)
2349 if (i
.op
[n
].imms
->X_op
== O_constant
)
2352 long val
= (long) i
.op
[n
].imms
->X_add_number
;
2354 if (i
.types
[n
] & (Imm8
| Imm8S
| Imm16
))
2359 mask
= ~ (long) 0xffff;
2360 if (i
.types
[n
] & (Imm8
| Imm8S
))
2363 mask
= ~ (long) 0xff;
2365 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2366 as_warn (_("%ld shortened to %ld"),
2370 p
= frag_more (size
);
2371 md_number_to_chars (p
, (valueT
) val
, size
);
2374 { /* not absolute_section */
2375 /* Need a 32-bit fixup (don't support 8bit
2376 non-absolute imms). Try to support other
2378 #ifdef BFD_ASSEMBLER
2379 enum bfd_reloc_code_real reloc_type
;
2385 if (i
.types
[n
] & Imm16
)
2387 else if (i
.types
[n
] & (Imm8
| Imm8S
))
2391 p
= frag_more (size
);
2392 reloc_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2393 #ifdef BFD_ASSEMBLER
2394 if (reloc_type
== BFD_RELOC_32
2396 && GOT_symbol
== i
.op
[n
].imms
->X_add_symbol
2397 && (i
.op
[n
].imms
->X_op
== O_symbol
2398 || (i
.op
[n
].imms
->X_op
== O_add
2399 && ((symbol_get_value_expression
2400 (i
.op
[n
].imms
->X_op_symbol
)->X_op
)
2403 reloc_type
= BFD_RELOC_386_GOTPC
;
2404 i
.op
[n
].imms
->X_add_number
+= 3;
2407 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2408 i
.op
[n
].imms
, 0, reloc_type
);
2412 } /* end immediate output */
2420 #endif /* DEBUG386 */
2424 static int i386_immediate
PARAMS ((char *));
2427 i386_immediate (imm_start
)
2430 char *save_input_line_pointer
;
2434 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2436 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2440 exp
= &im_expressions
[i
.imm_operands
++];
2441 i
.op
[this_operand
].imms
= exp
;
2443 if (is_space_char (*imm_start
))
2446 save_input_line_pointer
= input_line_pointer
;
2447 input_line_pointer
= imm_start
;
2452 * We can have operands of the form
2453 * <symbol>@GOTOFF+<nnn>
2454 * Take the easy way out here and copy everything
2455 * into a temporary buffer...
2459 cp
= strchr (input_line_pointer
, '@');
2466 /* GOT relocations are not supported in 16 bit mode */
2467 if (flag_16bit_code
)
2468 as_bad (_("GOT relocations not supported in 16 bit mode"));
2470 if (GOT_symbol
== NULL
)
2471 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2473 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2475 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2478 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2480 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2483 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2485 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2489 as_bad (_("Bad reloc specifier in expression"));
2491 /* Replace the relocation token with ' ', so that errors like
2492 foo@GOTOFF1 will be detected. */
2493 first
= cp
- input_line_pointer
;
2494 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2495 memcpy (tmpbuf
, input_line_pointer
, first
);
2496 tmpbuf
[first
] = ' ';
2497 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2498 input_line_pointer
= tmpbuf
;
2503 exp_seg
= expression (exp
);
2506 if (*input_line_pointer
)
2507 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer
);
2509 input_line_pointer
= save_input_line_pointer
;
2511 if (exp
->X_op
== O_absent
|| exp
->X_op
== O_big
)
2513 /* missing or bad expr becomes absolute 0 */
2514 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2516 exp
->X_op
= O_constant
;
2517 exp
->X_add_number
= 0;
2518 exp
->X_add_symbol
= (symbolS
*) 0;
2519 exp
->X_op_symbol
= (symbolS
*) 0;
2522 if (exp
->X_op
== O_constant
)
2525 if (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0))
2528 i
.types
[this_operand
] |=
2529 (bigimm
| smallest_imm_type ((long) exp
->X_add_number
));
2531 /* If a suffix is given, this operand may be shortened. */
2534 case WORD_MNEM_SUFFIX
:
2535 i
.types
[this_operand
] |= Imm16
;
2537 case BYTE_MNEM_SUFFIX
:
2538 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2542 #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
2544 #ifdef BFD_ASSEMBLER
2545 OUTPUT_FLAVOR
== bfd_target_aout_flavour
&&
2547 exp_seg
!= text_section
2548 && exp_seg
!= data_section
2549 && exp_seg
!= bss_section
2550 && exp_seg
!= undefined_section
2551 #ifdef BFD_ASSEMBLER
2552 && !bfd_is_com_section (exp_seg
)
2556 #ifdef BFD_ASSEMBLER
2557 as_bad (_("Unimplemented segment %s in operand"), exp_seg
->name
);
2559 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2566 /* This is an address. The size of the address will be
2567 determined later, depending on destination register,
2568 suffix, or the default for the section. We exclude
2569 Imm8S here so that `push $foo' and other instructions
2570 with an Imm8S form will use Imm16 or Imm32. */
2571 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2577 static int i386_scale
PARAMS ((char *));
2583 if (!isdigit (*scale
))
2590 i
.log2_scale_factor
= 0;
2593 i
.log2_scale_factor
= 1;
2596 i
.log2_scale_factor
= 2;
2599 i
.log2_scale_factor
= 3;
2603 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2607 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2609 as_warn (_("scale factor of %d without an index register"),
2610 1 << i
.log2_scale_factor
);
2611 #if SCALE1_WHEN_NO_INDEX
2612 i
.log2_scale_factor
= 0;
2618 static int i386_displacement
PARAMS ((char *, char *));
2621 i386_displacement (disp_start
, disp_end
)
2625 register expressionS
*exp
;
2627 char *save_input_line_pointer
;
2628 int bigdisp
= Disp32
;
2630 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2632 i
.types
[this_operand
] |= bigdisp
;
2634 exp
= &disp_expressions
[i
.disp_operands
];
2635 i
.op
[this_operand
].disps
= exp
;
2637 save_input_line_pointer
= input_line_pointer
;
2638 input_line_pointer
= disp_start
;
2639 END_STRING_AND_SAVE (disp_end
);
2641 #ifndef GCC_ASM_O_HACK
2642 #define GCC_ASM_O_HACK 0
2645 END_STRING_AND_SAVE (disp_end
+ 1);
2646 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2647 && displacement_string_end
[-1] == '+')
2649 /* This hack is to avoid a warning when using the "o"
2650 constraint within gcc asm statements.
2653 #define _set_tssldt_desc(n,addr,limit,type) \
2654 __asm__ __volatile__ ( \
2656 "movw %w1,2+%0\n\t" \
2658 "movb %b1,4+%0\n\t" \
2659 "movb %4,5+%0\n\t" \
2660 "movb $0,6+%0\n\t" \
2661 "movb %h1,7+%0\n\t" \
2663 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2665 This works great except that the output assembler ends
2666 up looking a bit weird if it turns out that there is
2667 no offset. You end up producing code that looks like:
2680 So here we provide the missing zero.
2683 *displacement_string_end
= '0';
2689 * We can have operands of the form
2690 * <symbol>@GOTOFF+<nnn>
2691 * Take the easy way out here and copy everything
2692 * into a temporary buffer...
2696 cp
= strchr (input_line_pointer
, '@');
2703 /* GOT relocations are not supported in 16 bit mode */
2704 if (flag_16bit_code
)
2705 as_bad (_("GOT relocations not supported in 16 bit mode"));
2707 if (GOT_symbol
== NULL
)
2708 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2710 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2712 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2715 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2717 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2720 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2722 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2726 as_bad (_("Bad reloc specifier in expression"));
2728 /* Replace the relocation token with ' ', so that errors like
2729 foo@GOTOFF1 will be detected. */
2730 first
= cp
- input_line_pointer
;
2731 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2732 memcpy (tmpbuf
, input_line_pointer
, first
);
2733 tmpbuf
[first
] = ' ';
2734 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2735 input_line_pointer
= tmpbuf
;
2740 exp_seg
= expression (exp
);
2742 #ifdef BFD_ASSEMBLER
2743 /* We do this to make sure that the section symbol is in
2744 the symbol table. We will ultimately change the relocation
2745 to be relative to the beginning of the section */
2746 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2748 if (S_IS_LOCAL(exp
->X_add_symbol
)
2749 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2750 section_symbol (S_GET_SEGMENT (exp
->X_add_symbol
));
2751 assert (exp
->X_op
== O_symbol
);
2752 exp
->X_op
= O_subtract
;
2753 exp
->X_op_symbol
= GOT_symbol
;
2754 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2759 if (*input_line_pointer
)
2760 as_bad (_("Ignoring junk `%s' after expression"),
2761 input_line_pointer
);
2763 RESTORE_END_STRING (disp_end
+ 1);
2765 RESTORE_END_STRING (disp_end
);
2766 input_line_pointer
= save_input_line_pointer
;
2768 if (exp
->X_op
== O_absent
|| exp
->X_op
== O_big
)
2770 /* missing or bad expr becomes absolute 0 */
2771 as_bad (_("Missing or invalid displacement expression `%s' taken as 0"),
2773 exp
->X_op
= O_constant
;
2774 exp
->X_add_number
= 0;
2775 exp
->X_add_symbol
= (symbolS
*) 0;
2776 exp
->X_op_symbol
= (symbolS
*) 0;
2779 if (exp
->X_op
== O_constant
)
2781 if (fits_in_signed_byte (exp
->X_add_number
))
2782 i
.types
[this_operand
] |= Disp8
;
2784 #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
2786 #ifdef BFD_ASSEMBLER
2787 OUTPUT_FLAVOR
== bfd_target_aout_flavour
&&
2789 exp_seg
!= text_section
2790 && exp_seg
!= data_section
2791 && exp_seg
!= bss_section
2792 && exp_seg
!= undefined_section
)
2794 #ifdef BFD_ASSEMBLER
2795 as_bad (_("Unimplemented segment %s in operand"), exp_seg
->name
);
2797 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2805 static int i386_operand_modifier
PARAMS ((char **, int));
2808 i386_operand_modifier (op_string
, got_a_float
)
2812 if (!strncasecmp (*op_string
, "BYTE PTR", 8))
2814 i
.suffix
= BYTE_MNEM_SUFFIX
;
2819 else if (!strncasecmp (*op_string
, "WORD PTR", 8))
2821 i
.suffix
= WORD_MNEM_SUFFIX
;
2826 else if (!strncasecmp (*op_string
, "DWORD PTR", 9))
2829 i
.suffix
= SHORT_MNEM_SUFFIX
;
2831 i
.suffix
= LONG_MNEM_SUFFIX
;
2836 else if (!strncasecmp (*op_string
, "QWORD PTR", 9))
2838 i
.suffix
= DWORD_MNEM_SUFFIX
;
2843 else if (!strncasecmp (*op_string
, "XWORD PTR", 9))
2845 i
.suffix
= LONG_DOUBLE_MNEM_SUFFIX
;
2850 else if (!strncasecmp (*op_string
, "SHORT", 5))
2852 i
.suffix
= WORD_MNEM_SUFFIX
;
2857 else if (!strncasecmp (*op_string
, "OFFSET FLAT:", 12))
2863 else if (!strncasecmp (*op_string
, "FLAT", 4))
2869 else return NONE_FOUND
;
2872 static char * build_displacement_string
PARAMS ((int, char *));
2875 build_displacement_string (initial_disp
, op_string
)
2879 char *temp_string
= (char *) malloc (strlen (op_string
) + 1);
2880 char *end_of_operand_string
;
2884 temp_string
[0] = '\0';
2885 tc
= end_of_operand_string
= strchr (op_string
, '[');
2886 if (initial_disp
&& !end_of_operand_string
)
2888 strcpy (temp_string
, op_string
);
2892 /* Build the whole displacement string */
2895 strncpy (temp_string
, op_string
, end_of_operand_string
- op_string
);
2896 temp_string
[end_of_operand_string
- op_string
] = '\0';
2900 temp_disp
= op_string
;
2902 while (*temp_disp
!= '\0')
2905 int add_minus
= (*temp_disp
== '-');
2907 if (*temp_disp
== '+' || *temp_disp
== '-' || *temp_disp
== '[')
2910 if (is_space_char (*temp_disp
))
2913 /* Don't consider registers */
2914 if ( !((*temp_disp
== REGISTER_PREFIX
|| allow_naked_reg
)
2915 && parse_register (temp_disp
, &end_op
)) )
2917 char *string_start
= temp_disp
;
2919 while (*temp_disp
!= ']'
2920 && *temp_disp
!= '+'
2921 && *temp_disp
!= '-'
2922 && *temp_disp
!= '*')
2926 strcat (temp_string
, "-");
2928 strcat (temp_string
, "+");
2930 strncat (temp_string
, string_start
, temp_disp
- string_start
);
2931 if (*temp_disp
== '+' || *temp_disp
== '-')
2935 while (*temp_disp
!= '\0'
2936 && *temp_disp
!= '+'
2937 && *temp_disp
!= '-')
2944 static int i386_parse_seg
PARAMS ((char *));
2947 i386_parse_seg (op_string
)
2950 if (is_space_char (*op_string
))
2953 /* Should be one of es, cs, ss, ds fs or gs */
2954 switch (*op_string
++)
2957 i
.seg
[i
.mem_operands
] = &es
;
2960 i
.seg
[i
.mem_operands
] = &cs
;
2963 i
.seg
[i
.mem_operands
] = &ss
;
2966 i
.seg
[i
.mem_operands
] = &ds
;
2969 i
.seg
[i
.mem_operands
] = &fs
;
2972 i
.seg
[i
.mem_operands
] = &gs
;
2975 as_bad (_("bad segment name `%s'"), op_string
);
2979 if (*op_string
++ != 's')
2981 as_bad (_("bad segment name `%s'"), op_string
);
2985 if (is_space_char (*op_string
))
2988 if (*op_string
!= ':')
2990 as_bad (_("bad segment name `%s'"), op_string
);
2998 static int i386_index_check
PARAMS((const char *));
3000 /* Make sure the memory operand we've been dealt is valid.
3001 Returns 1 on success, 0 on a failure.
3004 i386_index_check (operand_string
)
3005 const char *operand_string
;
3007 #if INFER_ADDR_PREFIX
3012 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ?
3013 /* 16 bit mode checks */
3015 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3016 != (Reg16
|BaseIndex
)))
3018 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3019 != (Reg16
|BaseIndex
))
3021 && i
.base_reg
->reg_num
< 6
3022 && i
.index_reg
->reg_num
>= 6
3023 && i
.log2_scale_factor
== 0)))) :
3024 /* 32 bit mode checks */
3026 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3028 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3029 != (Reg32
|BaseIndex
)))))
3031 #if INFER_ADDR_PREFIX
3032 if (i
.prefix
[ADDR_PREFIX
] == 0 && stackop_size
!= '\0')
3034 i
.prefix
[ADDR_PREFIX
] = ADDR_PREFIX_OPCODE
;
3036 /* Change the size of any displacement too. At most one of
3037 Disp16 or Disp32 is set.
3038 FIXME. There doesn't seem to be any real need for separate
3039 Disp16 and Disp32 flags. The same goes for Imm16 and Imm32.
3040 Removing them would probably clean up the code quite a lot.
3042 if (i
.types
[this_operand
] & (Disp16
|Disp32
))
3043 i
.types
[this_operand
] ^= (Disp16
|Disp32
);
3048 as_bad (_("`%s' is not a valid base/index expression"),
3052 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3054 flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ? "16" : "32");
3060 static int i386_intel_memory_operand
PARAMS ((char *));
3063 i386_intel_memory_operand (operand_string
)
3064 char *operand_string
;
3066 char *op_string
= operand_string
;
3067 char *end_of_operand_string
;
3069 if ((i
.mem_operands
== 1
3070 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3071 || i
.mem_operands
== 2)
3073 as_bad (_("too many memory references for `%s'"),
3074 current_templates
->start
->name
);
3078 /* First check for a segment override. */
3079 if (*op_string
!= '[')
3083 end_seg
= strchr (op_string
, ':');
3086 if (!i386_parse_seg (op_string
))
3088 op_string
= end_seg
+ 1;
3092 /* Look for displacement preceding open bracket */
3093 if (*op_string
!= '[')
3097 if (i
.disp_operands
)
3100 temp_string
= build_displacement_string (true, op_string
);
3102 if (!i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3109 end_of_operand_string
= strchr (op_string
, '[');
3110 if (!end_of_operand_string
)
3111 end_of_operand_string
= op_string
+ strlen (op_string
);
3113 if (is_space_char (*end_of_operand_string
))
3114 --end_of_operand_string
;
3116 op_string
= end_of_operand_string
;
3119 if (*op_string
== '[')
3123 /* Pick off each component and figure out where it belongs */
3125 end_of_operand_string
= op_string
;
3127 while (*op_string
!= ']')
3129 const reg_entry
*temp_reg
;
3133 while (*end_of_operand_string
!= '+'
3134 && *end_of_operand_string
!= '-'
3135 && *end_of_operand_string
!= '*'
3136 && *end_of_operand_string
!= ']')
3137 end_of_operand_string
++;
3139 temp_string
= op_string
;
3140 if (*temp_string
== '+')
3143 if (is_space_char (*temp_string
))
3147 if ((*temp_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3148 && (temp_reg
= parse_register (temp_string
, &end_op
)) != NULL
)
3150 if (i
.base_reg
== NULL
)
3151 i
.base_reg
= temp_reg
;
3153 i
.index_reg
= temp_reg
;
3155 i
.types
[this_operand
] |= BaseIndex
;
3157 else if (*temp_string
== REGISTER_PREFIX
)
3159 as_bad (_("bad register name `%s'"), temp_string
);
3162 else if (is_digit_char (*op_string
)
3163 || *op_string
== '+' || *op_string
== '-')
3167 if (i
.disp_operands
!= 0)
3170 temp_string
= build_displacement_string (false, op_string
);
3172 temp_str
= temp_string
;
3173 if (*temp_str
== '+')
3176 if (!i386_displacement (temp_str
, temp_str
+ strlen (temp_str
)))
3184 end_of_operand_string
= op_string
;
3185 while (*end_of_operand_string
!= ']'
3186 && *end_of_operand_string
!= '+'
3187 && *end_of_operand_string
!= '-'
3188 && *end_of_operand_string
!= '*')
3189 ++end_of_operand_string
;
3191 else if (*op_string
== '*')
3195 if (i
.base_reg
&& !i
.index_reg
)
3197 i
.index_reg
= i
.base_reg
;
3201 if (!i386_scale (op_string
))
3204 op_string
= end_of_operand_string
;
3205 ++end_of_operand_string
;
3209 if (i386_index_check (operand_string
) == 0)
3217 i386_intel_operand (operand_string
, got_a_float
)
3218 char *operand_string
;
3221 const reg_entry
* r
;
3223 char *op_string
= operand_string
;
3225 int operand_modifier
= i386_operand_modifier (&op_string
, got_a_float
);
3226 if (is_space_char (*op_string
))
3229 switch (operand_modifier
)
3236 if (!i386_intel_memory_operand (op_string
))
3242 if (!i386_immediate (op_string
))
3248 /* Should be register or immediate */
3249 if (is_digit_char (*op_string
)
3250 && strchr (op_string
, '[') == 0)
3252 if (!i386_immediate (op_string
))
3255 else if ((*op_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3256 && (r
= parse_register (op_string
, &end_op
)) != NULL
)
3258 /* Check for a segment override by searching for ':' after a
3259 segment register. */
3261 if (is_space_char (*op_string
))
3263 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3268 i
.seg
[i
.mem_operands
] = &es
;
3271 i
.seg
[i
.mem_operands
] = &cs
;
3274 i
.seg
[i
.mem_operands
] = &ss
;
3277 i
.seg
[i
.mem_operands
] = &ds
;
3280 i
.seg
[i
.mem_operands
] = &fs
;
3283 i
.seg
[i
.mem_operands
] = &gs
;
3288 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3289 i
.op
[this_operand
].regs
= r
;
3292 else if (*op_string
== REGISTER_PREFIX
)
3294 as_bad (_("bad register name `%s'"), op_string
);
3297 else if (!i386_intel_memory_operand (op_string
))
3306 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3310 i386_operand (operand_string
)
3311 char *operand_string
;
3315 char *op_string
= operand_string
;
3317 if (is_space_char (*op_string
))
3320 /* We check for an absolute prefix (differentiating,
3321 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3322 if (*op_string
== ABSOLUTE_PREFIX
)
3325 if (is_space_char (*op_string
))
3327 i
.types
[this_operand
] |= JumpAbsolute
;
3330 /* Check if operand is a register. */
3331 if ((*op_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3332 && (r
= parse_register (op_string
, &end_op
)) != NULL
)
3334 /* Check for a segment override by searching for ':' after a
3335 segment register. */
3337 if (is_space_char (*op_string
))
3339 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3344 i
.seg
[i
.mem_operands
] = &es
;
3347 i
.seg
[i
.mem_operands
] = &cs
;
3350 i
.seg
[i
.mem_operands
] = &ss
;
3353 i
.seg
[i
.mem_operands
] = &ds
;
3356 i
.seg
[i
.mem_operands
] = &fs
;
3359 i
.seg
[i
.mem_operands
] = &gs
;
3363 /* Skip the ':' and whitespace. */
3365 if (is_space_char (*op_string
))
3368 if (!is_digit_char (*op_string
)
3369 && !is_identifier_char (*op_string
)
3370 && *op_string
!= '('
3371 && *op_string
!= ABSOLUTE_PREFIX
)
3373 as_bad (_("bad memory operand `%s'"), op_string
);
3376 /* Handle case of %es:*foo. */
3377 if (*op_string
== ABSOLUTE_PREFIX
)
3380 if (is_space_char (*op_string
))
3382 i
.types
[this_operand
] |= JumpAbsolute
;
3384 goto do_memory_reference
;
3388 as_bad (_("Junk `%s' after register"), op_string
);
3391 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3392 i
.op
[this_operand
].regs
= r
;
3395 else if (*op_string
== REGISTER_PREFIX
)
3397 as_bad (_("bad register name `%s'"), op_string
);
3400 else if (*op_string
== IMMEDIATE_PREFIX
)
3401 { /* ... or an immediate */
3403 if (i
.types
[this_operand
] & JumpAbsolute
)
3405 as_bad (_("Immediate operand illegal with absolute jump"));
3408 if (!i386_immediate (op_string
))
3411 else if (is_digit_char (*op_string
)
3412 || is_identifier_char (*op_string
)
3413 || *op_string
== '(' )
3415 /* This is a memory reference of some sort. */
3418 /* Start and end of displacement string expression (if found). */
3419 char *displacement_string_start
;
3420 char *displacement_string_end
;
3422 do_memory_reference
:
3423 if ((i
.mem_operands
== 1
3424 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3425 || i
.mem_operands
== 2)
3427 as_bad (_("too many memory references for `%s'"),
3428 current_templates
->start
->name
);
3432 /* Check for base index form. We detect the base index form by
3433 looking for an ')' at the end of the operand, searching
3434 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3436 base_string
= op_string
+ strlen (op_string
);
3439 if (is_space_char (*base_string
))
3442 /* If we only have a displacement, set-up for it to be parsed later. */
3443 displacement_string_start
= op_string
;
3444 displacement_string_end
= base_string
+ 1;
3446 if (*base_string
== ')')
3449 unsigned int parens_balanced
= 1;
3450 /* We've already checked that the number of left & right ()'s are
3451 equal, so this loop will not be infinite. */
3455 if (*base_string
== ')')
3457 if (*base_string
== '(')
3460 while (parens_balanced
);
3462 temp_string
= base_string
;
3464 /* Skip past '(' and whitespace. */
3466 if (is_space_char (*base_string
))
3469 if (*base_string
== ','
3470 || ((*base_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3471 && (i
.base_reg
= parse_register (base_string
, &end_op
)) != NULL
))
3473 displacement_string_end
= temp_string
;
3475 i
.types
[this_operand
] |= BaseIndex
;
3479 base_string
= end_op
;
3480 if (is_space_char (*base_string
))
3484 /* There may be an index reg or scale factor here. */
3485 if (*base_string
== ',')
3488 if (is_space_char (*base_string
))
3491 if ((*base_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3492 && (i
.index_reg
= parse_register (base_string
, &end_op
)) != NULL
)
3494 base_string
= end_op
;
3495 if (is_space_char (*base_string
))
3497 if (*base_string
== ',')
3500 if (is_space_char (*base_string
))
3503 else if (*base_string
!= ')' )
3505 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3510 else if (*base_string
== REGISTER_PREFIX
)
3512 as_bad (_("bad register name `%s'"), base_string
);
3516 /* Check for scale factor. */
3517 if (isdigit ((unsigned char) *base_string
))
3519 if (!i386_scale (base_string
))
3523 if (is_space_char (*base_string
))
3525 if (*base_string
!= ')')
3527 as_bad (_("expecting `)' after scale factor in `%s'"),
3532 else if (!i
.index_reg
)
3534 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3539 else if (*base_string
!= ')')
3541 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3546 else if (*base_string
== REGISTER_PREFIX
)
3548 as_bad (_("bad register name `%s'"), base_string
);
3553 /* If there's an expression beginning the operand, parse it,
3554 assuming displacement_string_start and
3555 displacement_string_end are meaningful. */
3556 if (displacement_string_start
!= displacement_string_end
)
3558 if (!i386_displacement (displacement_string_start
,
3559 displacement_string_end
))
3563 /* Special case for (%dx) while doing input/output op. */
3565 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3567 && i
.log2_scale_factor
== 0
3568 && i
.seg
[i
.mem_operands
] == 0
3569 && (i
.types
[this_operand
] & Disp
) == 0)
3571 i
.types
[this_operand
] = InOutPortReg
;
3575 if (i386_index_check (operand_string
) == 0)
3580 { /* it's not a memory operand; argh! */
3581 as_bad (_("invalid char %s beginning operand %d `%s'"),
3582 output_invalid (*op_string
),
3587 return 1; /* normal return */
3591 * md_estimate_size_before_relax()
3593 * Called just before relax().
3594 * Any symbol that is now undefined will not become defined.
3595 * Return the correct fr_subtype in the frag.
3596 * Return the initial "guess for fr_var" to caller.
3597 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3598 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3599 * Although it may not be explicit in the frag, pretend fr_var starts with a
3603 md_estimate_size_before_relax (fragP
, segment
)
3604 register fragS
*fragP
;
3605 register segT segment
;
3607 register unsigned char *opcode
;
3608 register int old_fr_fix
;
3610 old_fr_fix
= fragP
->fr_fix
;
3611 opcode
= (unsigned char *) fragP
->fr_opcode
;
3612 /* We've already got fragP->fr_subtype right; all we have to do is
3613 check for un-relaxable symbols. */
3614 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
3616 /* symbol is undefined in this segment */
3617 int code16
= fragP
->fr_subtype
& CODE16
;
3618 int size
= code16
? 2 : 4;
3619 #ifdef BFD_ASSEMBLER
3620 enum bfd_reloc_code_real reloc_type
;
3625 if (GOT_symbol
/* Not quite right - we should switch on presence of
3626 @PLT, but I cannot see how to get to that from
3627 here. We should have done this in md_assemble to
3628 really get it right all of the time, but I think it
3629 does not matter that much, as this will be right
3630 most of the time. ERY */
3631 && S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3632 reloc_type
= BFD_RELOC_386_PLT32
;
3634 reloc_type
= BFD_RELOC_16_PCREL
;
3636 reloc_type
= BFD_RELOC_32_PCREL
;
3640 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
3641 opcode
[0] = 0xe9; /* dword disp jmp */
3642 fragP
->fr_fix
+= size
;
3643 fix_new (fragP
, old_fr_fix
, size
,
3645 fragP
->fr_offset
, 1,
3650 /* This changes the byte-displacement jump 0x7N
3651 to the dword-displacement jump 0x0f,0x8N. */
3652 opcode
[1] = opcode
[0] + 0x10;
3653 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3654 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
3655 fix_new (fragP
, old_fr_fix
+ 1, size
,
3657 fragP
->fr_offset
, 1,
3663 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
3664 } /* md_estimate_size_before_relax() */
3667 * md_convert_frag();
3669 * Called after relax() is finished.
3670 * In: Address of frag.
3671 * fr_type == rs_machine_dependent.
3672 * fr_subtype is what the address relaxed to.
3674 * Out: Any fixSs and constants are set up.
3675 * Caller will turn frag into a ".space 0".
3677 #ifndef BFD_ASSEMBLER
3679 md_convert_frag (headers
, sec
, fragP
)
3680 object_headers
*headers ATTRIBUTE_UNUSED
;
3681 segT sec ATTRIBUTE_UNUSED
;
3682 register fragS
*fragP
;
3685 md_convert_frag (abfd
, sec
, fragP
)
3686 bfd
*abfd ATTRIBUTE_UNUSED
;
3687 segT sec ATTRIBUTE_UNUSED
;
3688 register fragS
*fragP
;
3691 register unsigned char *opcode
;
3692 unsigned char *where_to_put_displacement
= NULL
;
3693 unsigned int target_address
;
3694 unsigned int opcode_address
;
3695 unsigned int extension
= 0;
3696 int displacement_from_opcode_start
;
3698 opcode
= (unsigned char *) fragP
->fr_opcode
;
3700 /* Address we want to reach in file space. */
3701 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
3702 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3703 target_address
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
3706 /* Address opcode resides at in file space. */
3707 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
3709 /* Displacement from opcode start to fill into instruction. */
3710 displacement_from_opcode_start
= target_address
- opcode_address
;
3712 switch (fragP
->fr_subtype
)
3714 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
3715 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
3716 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
3717 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
3718 /* don't have to change opcode */
3719 extension
= 1; /* 1 opcode + 1 displacement */
3720 where_to_put_displacement
= &opcode
[1];
3723 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3724 extension
= 5; /* 2 opcode + 4 displacement */
3725 opcode
[1] = opcode
[0] + 0x10;
3726 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3727 where_to_put_displacement
= &opcode
[2];
3730 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3731 extension
= 4; /* 1 opcode + 4 displacement */
3733 where_to_put_displacement
= &opcode
[1];
3736 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3737 extension
= 3; /* 2 opcode + 2 displacement */
3738 opcode
[1] = opcode
[0] + 0x10;
3739 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3740 where_to_put_displacement
= &opcode
[2];
3743 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3744 extension
= 2; /* 1 opcode + 2 displacement */
3746 where_to_put_displacement
= &opcode
[1];
3750 BAD_CASE (fragP
->fr_subtype
);
3753 /* now put displacement after opcode */
3754 md_number_to_chars ((char *) where_to_put_displacement
,
3755 (valueT
) (displacement_from_opcode_start
- extension
),
3756 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3757 fragP
->fr_fix
+= extension
;
3761 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3762 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3763 const int md_reloc_size
= 8; /* Size of relocation record */
3766 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3768 addressT from_addr
, to_addr
;
3769 fragS
*frag ATTRIBUTE_UNUSED
;
3770 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
3774 offset
= to_addr
- (from_addr
+ 2);
3775 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3776 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3780 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3782 addressT from_addr
, to_addr
;
3788 if (flag_do_long_jump
)
3790 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3791 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3792 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3793 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3794 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3798 offset
= to_addr
- (from_addr
+ 5);
3799 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3800 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3804 /* Apply a fixup (fixS) to segment data, once it has been determined
3805 by our caller that we have all the info we need to fix it up.
3807 On the 386, immediates, displacements, and data pointers are all in
3808 the same (little-endian) format, so we don't need to care about which
3812 md_apply_fix3 (fixP
, valp
, seg
)
3813 fixS
*fixP
; /* The fix we're to put in. */
3814 valueT
*valp
; /* Pointer to the value of the bits. */
3815 segT seg ATTRIBUTE_UNUSED
; /* Segment fix is from. */
3817 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3818 valueT value
= *valp
;
3820 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3823 switch (fixP
->fx_r_type
)
3829 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3832 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
3835 fixP
->fx_r_type
= BFD_RELOC_8_PCREL
;
3840 /* This is a hack. There should be a better way to handle this.
3841 This covers for the fact that bfd_install_relocation will
3842 subtract the current location (for partial_inplace, PC relative
3843 relocations); see more below. */
3844 if ((fixP
->fx_r_type
== BFD_RELOC_32_PCREL
3845 || fixP
->fx_r_type
== BFD_RELOC_16_PCREL
3846 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
)
3850 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3852 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3855 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3857 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3858 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
3860 segT fseg
= S_GET_SEGMENT (fixP
->fx_addsy
);
3863 || (symbol_section_p (fixP
->fx_addsy
)
3864 && fseg
!= absolute_section
))
3865 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3866 && ! S_IS_WEAK (fixP
->fx_addsy
)
3867 && S_IS_DEFINED (fixP
->fx_addsy
)
3868 && ! S_IS_COMMON (fixP
->fx_addsy
))
3870 /* Yes, we add the values in twice. This is because
3871 bfd_perform_relocation subtracts them out again. I think
3872 bfd_perform_relocation is broken, but I don't dare change
3874 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3878 #if defined (OBJ_COFF) && defined (TE_PE)
3879 /* For some reason, the PE format does not store a section
3880 address offset for a PC relative symbol. */
3881 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3882 value
+= md_pcrel_from (fixP
);
3883 else if (S_IS_EXTERNAL (fixP
->fx_addsy
)
3884 || S_IS_WEAK (fixP
->fx_addsy
))
3886 /* We are generating an external relocation for this defined
3887 symbol. We add the address, because
3888 bfd_install_relocation will subtract it. VALUE already
3889 holds the symbol value, because fixup_segment added it
3890 in. We subtract it out, and then we subtract it out
3891 again because bfd_install_relocation will add it in
3893 value
+= md_pcrel_from (fixP
);
3894 value
-= 2 * S_GET_VALUE (fixP
->fx_addsy
);
3899 else if (fixP
->fx_addsy
!= NULL
3900 && S_IS_DEFINED (fixP
->fx_addsy
)
3901 && (S_IS_EXTERNAL (fixP
->fx_addsy
)
3902 || S_IS_WEAK (fixP
->fx_addsy
)))
3904 /* We are generating an external relocation for this defined
3905 symbol. VALUE already holds the symbol value, and
3906 bfd_install_relocation will add it in again. We don't want
3908 value
-= 2 * S_GET_VALUE (fixP
->fx_addsy
);
3912 /* Fix a few things - the dynamic linker expects certain values here,
3913 and we must not dissappoint it. */
3914 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3915 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3917 switch (fixP
->fx_r_type
) {
3918 case BFD_RELOC_386_PLT32
:
3919 /* Make the jump instruction point to the address of the operand. At
3920 runtime we merely add the offset to the actual PLT entry. */
3923 case BFD_RELOC_386_GOTPC
:
3925 * This is tough to explain. We end up with this one if we have
3926 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3927 * here is to obtain the absolute address of the GOT, and it is strongly
3928 * preferable from a performance point of view to avoid using a runtime
3929 * relocation for this. The actual sequence of instructions often look
3935 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3937 * The call and pop essentially return the absolute address of
3938 * the label .L66 and store it in %ebx. The linker itself will
3939 * ultimately change the first operand of the addl so that %ebx points to
3940 * the GOT, but to keep things simple, the .o file must have this operand
3941 * set so that it generates not the absolute address of .L66, but the
3942 * absolute address of itself. This allows the linker itself simply
3943 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
3944 * added in, and the addend of the relocation is stored in the operand
3945 * field for the instruction itself.
3947 * Our job here is to fix the operand so that it would add the correct
3948 * offset so that %ebx would point to itself. The thing that is tricky is
3949 * that .-.L66 will point to the beginning of the instruction, so we need
3950 * to further modify the operand so that it will point to itself.
3951 * There are other cases where you have something like:
3953 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
3955 * and here no correction would be required. Internally in the assembler
3956 * we treat operands of this form as not being pcrel since the '.' is
3957 * explicitly mentioned, and I wonder whether it would simplify matters
3958 * to do it this way. Who knows. In earlier versions of the PIC patches,
3959 * the pcrel_adjust field was used to store the correction, but since the
3960 * expression is not pcrel, I felt it would be confusing to do it this way.
3964 case BFD_RELOC_386_GOT32
:
3965 value
= 0; /* Fully resolved at runtime. No addend. */
3967 case BFD_RELOC_386_GOTOFF
:
3970 case BFD_RELOC_VTABLE_INHERIT
:
3971 case BFD_RELOC_VTABLE_ENTRY
:
3978 #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
3980 #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
3981 md_number_to_chars (p
, value
, fixP
->fx_size
);
3987 /* This is never used. */
3988 long /* Knows about the byte order in a word. */
3989 md_chars_to_number (con
, nbytes
)
3990 unsigned char con
[]; /* Low order byte 1st. */
3991 int nbytes
; /* Number of bytes in the input. */
3994 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
3996 retval
<<= BITS_PER_CHAR
;
4004 #define MAX_LITTLENUMS 6
4006 /* Turn the string pointed to by litP into a floating point constant of type
4007 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
4008 is stored in *sizeP . An error message is returned, or NULL on OK. */
4010 md_atof (type
, litP
, sizeP
)
4016 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4017 LITTLENUM_TYPE
*wordP
;
4039 return _("Bad call to md_atof ()");
4041 t
= atof_ieee (input_line_pointer
, type
, words
);
4043 input_line_pointer
= t
;
4045 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4046 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4047 the bigendian 386. */
4048 for (wordP
= words
+ prec
- 1; prec
--;)
4050 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
4051 litP
+= sizeof (LITTLENUM_TYPE
);
4056 char output_invalid_buf
[8];
4058 static char * output_invalid
PARAMS ((int));
4065 sprintf (output_invalid_buf
, "'%c'", c
);
4067 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
4068 return output_invalid_buf
;
4072 /* REG_STRING starts *before* REGISTER_PREFIX. */
4074 static const reg_entry
*
4075 parse_register (reg_string
, end_op
)
4079 char *s
= reg_string
;
4081 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
4084 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4085 if (*s
== REGISTER_PREFIX
)
4088 if (is_space_char (*s
))
4092 while ((*p
++ = register_chars
[(unsigned char) *s
]) != '\0')
4094 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
4095 return (const reg_entry
*) NULL
;
4101 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
4103 /* Handle floating point regs, allowing spaces in the (i) part. */
4104 if (r
== i386_regtab
/* %st is first entry of table */)
4106 if (is_space_char (*s
))
4111 if (is_space_char (*s
))
4113 if (*s
>= '0' && *s
<= '7')
4115 r
= &i386_float_regtab
[*s
- '0'];
4117 if (is_space_char (*s
))
4125 /* We have "%st(" then garbage */
4126 return (const reg_entry
*) NULL
;
4133 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4134 CONST
char *md_shortopts
= "kmVQ:sq";
4136 CONST
char *md_shortopts
= "m";
4138 struct option md_longopts
[] = {
4139 {NULL
, no_argument
, NULL
, 0}
4141 size_t md_longopts_size
= sizeof (md_longopts
);
4144 md_parse_option (c
, arg
)
4146 char *arg ATTRIBUTE_UNUSED
;
4151 flag_do_long_jump
= 1;
4154 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4155 /* -k: Ignore for FreeBSD compatibility. */
4159 /* -V: SVR4 argument to print version ID. */
4161 print_version_id ();
4164 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4165 should be emitted or not. FIXME: Not implemented. */
4170 /* -s: On i386 Solaris, this tells the native assembler to use
4171 .stab instead of .stab.excl. We always use .stab anyhow. */
4175 /* -q: On i386 Solaris, this tells the native assembler does
4187 md_show_usage (stream
)
4190 fprintf (stream
, _("\
4191 -m do long jump\n"));
4192 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4193 fprintf (stream
, _("\
4194 -V print assembler version number\n\
4202 #ifdef BFD_ASSEMBLER
4203 #if ((defined (OBJ_MAYBE_ELF) && defined (OBJ_MAYBE_COFF)) \
4204 || (defined (OBJ_MAYBE_ELF) && defined (OBJ_MAYBE_AOUT)) \
4205 || (defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)))
4207 /* Pick the target format to use. */
4210 i386_target_format ()
4212 switch (OUTPUT_FLAVOR
)
4214 #ifdef OBJ_MAYBE_AOUT
4215 case bfd_target_aout_flavour
:
4216 return AOUT_TARGET_FORMAT
;
4218 #ifdef OBJ_MAYBE_COFF
4219 case bfd_target_coff_flavour
:
4222 #ifdef OBJ_MAYBE_ELF
4223 case bfd_target_elf_flavour
:
4224 return "elf32-i386";
4232 #endif /* OBJ_MAYBE_ more than one */
4233 #endif /* BFD_ASSEMBLER */
4236 md_undefined_symbol (name
)
4239 if (name
[0] == GLOBAL_OFFSET_TABLE_NAME
[0]
4240 && name
[1] == GLOBAL_OFFSET_TABLE_NAME
[1]
4241 && name
[2] == GLOBAL_OFFSET_TABLE_NAME
[2]
4242 && strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4246 if (symbol_find (name
))
4247 as_bad (_("GOT already in symbol table"));
4248 GOT_symbol
= symbol_new (name
, undefined_section
,
4249 (valueT
) 0, &zero_address_frag
);
4256 /* Round up a section size to the appropriate boundary. */
4258 md_section_align (segment
, size
)
4259 segT segment ATTRIBUTE_UNUSED
;
4262 #ifdef BFD_ASSEMBLER
4263 #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
4264 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
4266 /* For a.out, force the section size to be aligned. If we don't do
4267 this, BFD will align it for us, but it will not write out the
4268 final bytes of the section. This may be a bug in BFD, but it is
4269 easier to fix it here since that is how the other a.out targets
4273 align
= bfd_get_section_alignment (stdoutput
, segment
);
4274 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4282 /* On the i386, PC-relative offsets are relative to the start of the
4283 next instruction. That is, the address of the offset, plus its
4284 size, since the offset is always the last part of the insn. */
4287 md_pcrel_from (fixP
)
4290 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4297 int ignore ATTRIBUTE_UNUSED
;
4301 temp
= get_absolute_expression ();
4302 subseg_set (bss_section
, (subsegT
) temp
);
4303 demand_empty_rest_of_line ();
4309 #ifdef BFD_ASSEMBLER
4312 i386_validate_fix (fixp
)
4315 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
4317 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
4323 tc_gen_reloc (section
, fixp
)
4324 asection
*section ATTRIBUTE_UNUSED
;
4328 bfd_reloc_code_real_type code
;
4330 switch (fixp
->fx_r_type
)
4332 case BFD_RELOC_386_PLT32
:
4333 case BFD_RELOC_386_GOT32
:
4334 case BFD_RELOC_386_GOTOFF
:
4335 case BFD_RELOC_386_GOTPC
:
4337 case BFD_RELOC_VTABLE_ENTRY
:
4338 case BFD_RELOC_VTABLE_INHERIT
:
4339 code
= fixp
->fx_r_type
;
4344 switch (fixp
->fx_size
)
4347 as_bad (_("Can not do %d byte pc-relative relocation"),
4349 code
= BFD_RELOC_32_PCREL
;
4351 case 1: code
= BFD_RELOC_8_PCREL
; break;
4352 case 2: code
= BFD_RELOC_16_PCREL
; break;
4353 case 4: code
= BFD_RELOC_32_PCREL
; break;
4358 switch (fixp
->fx_size
)
4361 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
4362 code
= BFD_RELOC_32
;
4364 case 1: code
= BFD_RELOC_8
; break;
4365 case 2: code
= BFD_RELOC_16
; break;
4366 case 4: code
= BFD_RELOC_32
; break;
4372 if (code
== BFD_RELOC_32
4374 && fixp
->fx_addsy
== GOT_symbol
)
4375 code
= BFD_RELOC_386_GOTPC
;
4377 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4378 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4379 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4381 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4382 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4383 vtable entry to be used in the relocation's section offset. */
4384 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4385 rel
->address
= fixp
->fx_offset
;
4388 rel
->addend
= fixp
->fx_addnumber
;
4392 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4393 if (rel
->howto
== NULL
)
4395 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4396 _("Cannot represent relocation type %s"),
4397 bfd_get_reloc_code_name (code
));
4398 /* Set howto to a garbage value so that we can keep going. */
4399 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4400 assert (rel
->howto
!= NULL
);
4406 #else /* ! BFD_ASSEMBLER */
4408 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4410 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4413 relax_addressT segment_address_in_file
;
4416 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4417 * Out: GNU LD relocation length code: 0, 1, or 2.
4420 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4423 know (fixP
->fx_addsy
!= NULL
);
4425 md_number_to_chars (where
,
4426 (valueT
) (fixP
->fx_frag
->fr_address
4427 + fixP
->fx_where
- segment_address_in_file
),
4430 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4431 ? S_GET_TYPE (fixP
->fx_addsy
)
4432 : fixP
->fx_addsy
->sy_number
);
4434 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
4435 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4436 where
[4] = r_symbolnum
& 0x0ff;
4437 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
4438 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
4439 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
4442 #endif /* OBJ_AOUT or OBJ_BOUT */
4444 #if defined (I386COFF)
4447 tc_coff_fix2rtype (fixP
)
4450 if (fixP
->fx_r_type
== R_IMAGEBASE
)
4453 return (fixP
->fx_pcrel
?
4454 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
4455 fixP
->fx_size
== 2 ? R_PCRWORD
:
4457 (fixP
->fx_size
== 1 ? R_RELBYTE
:
4458 fixP
->fx_size
== 2 ? R_RELWORD
:
4463 tc_coff_sizemachdep (frag
)
4467 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
4472 #endif /* I386COFF */
4474 #endif /* ! BFD_ASSEMBLER */
4476 /* end of tc-i386.c */