1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef SCALE1_WHEN_NO_INDEX
44 /* Specifying a scale factor besides 1 when there is no index is
45 futile. eg. `mov (%ebx,2),%al' does exactly the same as
46 `mov (%ebx),%al'. To slavishly follow what the programmer
47 specified, set SCALE1_WHEN_NO_INDEX to 0. */
48 #define SCALE1_WHEN_NO_INDEX 1
54 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
55 static int fits_in_signed_byte
PARAMS ((long));
56 static int fits_in_unsigned_byte
PARAMS ((long));
57 static int fits_in_unsigned_word
PARAMS ((long));
58 static int fits_in_signed_word
PARAMS ((long));
59 static int smallest_imm_type
PARAMS ((long));
60 static int add_prefix
PARAMS ((unsigned int));
61 static void set_16bit_code_flag
PARAMS ((int));
62 static void set_intel_syntax
PARAMS ((int));
65 static bfd_reloc_code_real_type reloc
66 PARAMS ((int, int, bfd_reloc_code_real_type
));
69 /* 'md_assemble ()' gathers together information and puts it into a
74 /* TM holds the template for the insn were currently assembling. */
77 /* SUFFIX holds the instruction mnemonic suffix if given.
78 (e.g. 'l' for 'movl') */
81 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
83 /* OPERANDS gives the number of given operands. */
84 unsigned int operands
;
86 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
87 of given register, displacement, memory operands and immediate
89 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
91 /* TYPES [i] is the type (see above #defines) which tells us how to
92 search through DISPS [i] & IMMS [i] & REGS [i] for the required
94 unsigned int types
[MAX_OPERANDS
];
96 /* Displacements (if given) for each operand. */
97 expressionS
*disps
[MAX_OPERANDS
];
99 /* Relocation type for operand */
101 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
103 int disp_reloc
[MAX_OPERANDS
];
106 /* Immediate operands (if given) for each operand. */
107 expressionS
*imms
[MAX_OPERANDS
];
109 /* Register operands (if given) for each operand. */
110 const reg_entry
*regs
[MAX_OPERANDS
];
112 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
113 the base index byte below. */
114 const reg_entry
*base_reg
;
115 const reg_entry
*index_reg
;
116 unsigned int log2_scale_factor
;
118 /* SEG gives the seg_entries of this insn. They are zero unless
119 explicit segment overrides are given. */
120 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
122 /* PREFIX holds all the given prefix opcodes (usually null).
123 PREFIXES is the number of prefix opcodes. */
124 unsigned int prefixes
;
125 unsigned char prefix
[MAX_PREFIXES
];
127 /* RM and SIB are the modrm byte and the sib byte where the
128 addressing modes of this insn are encoded. */
134 typedef struct _i386_insn i386_insn
;
136 /* List of chars besides those in app.c:symbol_chars that can start an
137 operand. Used to prevent the scrubber eating vital white-space. */
139 const char extra_symbol_chars
[] = "*%-(@";
141 const char extra_symbol_chars
[] = "*%-(";
144 /* This array holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful */
146 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
147 /* Putting '/' here makes it impossible to use the divide operator.
148 However, we need it for compatibility with SVR4 systems. */
149 const char comment_chars
[] = "#/";
150 #define PREFIX_SEPARATOR '\\'
152 const char comment_chars
[] = "#";
153 #define PREFIX_SEPARATOR '/'
156 /* This array holds the chars that only start a comment at the beginning of
157 a line. If the line seems to have the form '# 123 filename'
158 .line and .file directives will appear in the pre-processed output */
159 /* Note that input_file.c hand checks for '#' at the beginning of the
160 first line of the input file. This is because the compiler outputs
161 #NO_APP at the beginning of its output. */
162 /* Also note that comments started like this one will always work if
163 '/' isn't otherwise defined. */
164 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
165 const char line_comment_chars
[] = "";
167 const char line_comment_chars
[] = "/";
170 const char line_separator_chars
[] = "";
172 /* Chars that can be used to separate mant from exp in floating point nums */
173 const char EXP_CHARS
[] = "eE";
175 /* Chars that mean this number is a floating point constant */
178 const char FLT_CHARS
[] = "fFdDxX";
180 /* tables for lexical analysis */
181 static char mnemonic_chars
[256];
182 static char register_chars
[256];
183 static char operand_chars
[256];
184 static char identifier_chars
[256];
185 static char digit_chars
[256];
188 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
189 #define is_operand_char(x) (operand_chars[(unsigned char) x])
190 #define is_register_char(x) (register_chars[(unsigned char) x])
191 #define is_space_char(x) ((x) == ' ')
192 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
193 #define is_digit_char(x) (digit_chars[(unsigned char) x])
195 /* put here all non-digit non-letter charcters that may occur in an operand */
196 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
198 /* md_assemble() always leaves the strings it's passed unaltered. To
199 effect this we maintain a stack of saved characters that we've smashed
200 with '\0's (indicating end of strings for various sub-fields of the
201 assembler instruction). */
202 static char save_stack
[32];
203 static char *save_stack_p
; /* stack pointer */
204 #define END_STRING_AND_SAVE(s) \
205 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
206 #define RESTORE_END_STRING(s) \
207 do { *(s) = *--save_stack_p; } while (0)
209 /* The instruction we're assembling. */
212 /* Possible templates for current insn. */
213 static const templates
*current_templates
;
215 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
216 static expressionS disp_expressions
[2], im_expressions
[2];
218 static int this_operand
; /* current operand we are working on */
220 static int flag_do_long_jump
; /* FIXME what does this do? */
222 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
224 static int intel_syntax
= 0; /* 1 for intel syntax, 0 if att syntax */
226 static int allow_naked_reg
= 0; /* 1 if register prefix % not required */
228 /* Interface to relax_segment.
229 There are 2 relax states for 386 jump insns: one for conditional &
230 one for unconditional jumps. This is because the these two types
231 of jumps add different sizes to frags when we're figuring out what
232 sort of jump to choose to reach a given label. */
235 #define COND_JUMP 1 /* conditional jump */
236 #define UNCOND_JUMP 2 /* unconditional jump */
240 #define SMALL16 (SMALL|CODE16)
242 #define BIG16 (BIG|CODE16)
246 #define INLINE __inline__
252 #define ENCODE_RELAX_STATE(type,size) \
253 ((relax_substateT)((type<<2) | (size)))
254 #define SIZE_FROM_RELAX_STATE(s) \
255 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
257 /* This table is used by relax_frag to promote short jumps to long
258 ones where necessary. SMALL (short) jumps may be promoted to BIG
259 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
260 don't allow a short jump in a 32 bit code segment to be promoted to
261 a 16 bit offset jump because it's slower (requires data size
262 prefix), and doesn't work, unless the destination is in the bottom
263 64k of the code segment (The top 16 bits of eip are zeroed). */
265 const relax_typeS md_relax_table
[] =
268 1) most positive reach of this state,
269 2) most negative reach of this state,
270 3) how many bytes this mode will add to the size of the current frag
271 4) which index into the table to try if we can't fit into this one.
278 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
279 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
280 /* dword conditionals adds 4 bytes to frag:
281 1 extra opcode byte, 3 extra displacement bytes. */
283 /* word conditionals add 2 bytes to frag:
284 1 extra opcode byte, 1 extra displacement byte. */
287 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
288 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
289 /* dword jmp adds 3 bytes to frag:
290 0 extra opcode bytes, 3 extra displacement bytes. */
292 /* word jmp adds 1 byte to frag:
293 0 extra opcode bytes, 1 extra displacement byte. */
300 i386_align_code (fragP
, count
)
304 /* Various efficient no-op patterns for aligning code labels. */
305 /* Note: Don't try to assemble the instructions in the comments. */
306 /* 0L and 0w are not legal */
307 static const char f32_1
[] =
309 static const char f32_2
[] =
310 {0x89,0xf6}; /* movl %esi,%esi */
311 static const char f32_3
[] =
312 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
313 static const char f32_4
[] =
314 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
315 static const char f32_5
[] =
317 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
318 static const char f32_6
[] =
319 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
320 static const char f32_7
[] =
321 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
322 static const char f32_8
[] =
324 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
325 static const char f32_9
[] =
326 {0x89,0xf6, /* movl %esi,%esi */
327 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
328 static const char f32_10
[] =
329 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
330 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
331 static const char f32_11
[] =
332 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
333 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
334 static const char f32_12
[] =
335 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
336 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
337 static const char f32_13
[] =
338 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
339 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
340 static const char f32_14
[] =
341 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
342 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
343 static const char f32_15
[] =
344 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
345 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
346 static const char f16_4
[] =
347 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
348 static const char f16_5
[] =
350 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
351 static const char f16_6
[] =
352 {0x89,0xf6, /* mov %si,%si */
353 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
354 static const char f16_7
[] =
355 {0x8d,0x74,0x00, /* lea 0(%si),%si */
356 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
357 static const char f16_8
[] =
358 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
359 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
360 static const char *const f32_patt
[] = {
361 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
362 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
364 static const char *const f16_patt
[] = {
365 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
366 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
369 if (count
> 0 && count
<= 15)
373 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
374 f16_patt
[count
- 1], count
);
375 if (count
> 8) /* adjust jump offset */
376 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
379 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
380 f32_patt
[count
- 1], count
);
381 fragP
->fr_var
= count
;
385 static char *output_invalid
PARAMS ((int c
));
386 static int i386_operand
PARAMS ((char *operand_string
));
387 static int i386_intel_operand
PARAMS ((char *operand_string
, int got_a_float
));
388 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
392 static void s_bss
PARAMS ((int));
395 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
397 static INLINE
unsigned int
398 mode_from_disp_size (t
)
401 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
405 fits_in_signed_byte (num
)
408 return (num
>= -128) && (num
<= 127);
409 } /* fits_in_signed_byte() */
412 fits_in_unsigned_byte (num
)
415 return (num
& 0xff) == num
;
416 } /* fits_in_unsigned_byte() */
419 fits_in_unsigned_word (num
)
422 return (num
& 0xffff) == num
;
423 } /* fits_in_unsigned_word() */
426 fits_in_signed_word (num
)
429 return (-32768 <= num
) && (num
<= 32767);
430 } /* fits_in_signed_word() */
433 smallest_imm_type (num
)
437 /* This code is disabled because all the Imm1 forms in the opcode table
438 are slower on the i486, and they're the versions with the implicitly
439 specified single-position displacement, which has another syntax if
440 you really want to use that form. If you really prefer to have the
441 one-byte-shorter Imm1 form despite these problems, re-enable this
444 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
446 return (fits_in_signed_byte (num
)
447 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
448 : fits_in_unsigned_byte (num
)
449 ? (Imm8
| Imm16
| Imm32
)
450 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
453 } /* smallest_imm_type() */
455 /* Returns 0 if attempting to add a prefix where one from the same
456 class already exists, 1 if non rep/repne added, 2 if rep/repne
470 case CS_PREFIX_OPCODE
:
471 case DS_PREFIX_OPCODE
:
472 case ES_PREFIX_OPCODE
:
473 case FS_PREFIX_OPCODE
:
474 case GS_PREFIX_OPCODE
:
475 case SS_PREFIX_OPCODE
:
479 case REPNE_PREFIX_OPCODE
:
480 case REPE_PREFIX_OPCODE
:
483 case LOCK_PREFIX_OPCODE
:
491 case ADDR_PREFIX_OPCODE
:
495 case DATA_PREFIX_OPCODE
:
502 as_bad (_("same type of prefix used twice"));
507 i
.prefix
[q
] = prefix
;
512 set_16bit_code_flag (new_16bit_code_flag
)
513 int new_16bit_code_flag
;
515 flag_16bit_code
= new_16bit_code_flag
;
519 set_intel_syntax (syntax_flag
)
522 /* Find out if register prefixing is specified. */
523 int ask_naked_reg
= 0;
526 if (! is_end_of_line
[(unsigned char) *input_line_pointer
])
528 char *string
= input_line_pointer
;
529 int e
= get_symbol_end ();
531 if (strcmp(string
, "prefix") == 0)
533 else if (strcmp(string
, "noprefix") == 0)
536 as_bad (_("Bad argument to syntax directive."));
537 *input_line_pointer
= e
;
539 demand_empty_rest_of_line ();
541 intel_syntax
= syntax_flag
;
543 if (ask_naked_reg
== 0)
546 allow_naked_reg
= (intel_syntax
547 && (bfd_get_symbol_leading_char (stdoutput
) != '\0'));
549 allow_naked_reg
= 0; /* conservative default */
553 allow_naked_reg
= (ask_naked_reg
< 0);
556 const pseudo_typeS md_pseudo_table
[] =
561 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
562 {"align", s_align_bytes
, 0},
564 {"align", s_align_ptwo
, 0},
566 {"ffloat", float_cons
, 'f'},
567 {"dfloat", float_cons
, 'd'},
568 {"tfloat", float_cons
, 'x'},
570 {"noopt", s_ignore
, 0},
571 {"optim", s_ignore
, 0},
572 {"code16", set_16bit_code_flag
, 1},
573 {"code32", set_16bit_code_flag
, 0},
574 {"intel_syntax", set_intel_syntax
, 1},
575 {"att_syntax", set_intel_syntax
, 0},
579 /* for interface with expression () */
580 extern char *input_line_pointer
;
582 /* hash table for instruction mnemonic lookup */
583 static struct hash_control
*op_hash
;
584 /* hash table for register lookup */
585 static struct hash_control
*reg_hash
;
591 const char *hash_err
;
593 /* initialize op_hash hash table */
594 op_hash
= hash_new ();
597 register const template *optab
;
598 register templates
*core_optab
;
600 optab
= i386_optab
; /* setup for loop */
601 core_optab
= (templates
*) xmalloc (sizeof (templates
));
602 core_optab
->start
= optab
;
607 if (optab
->name
== NULL
608 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
610 /* different name --> ship out current template list;
611 add to hash table; & begin anew */
612 core_optab
->end
= optab
;
613 hash_err
= hash_insert (op_hash
,
619 as_fatal (_("Internal Error: Can't hash %s: %s"),
623 if (optab
->name
== NULL
)
625 core_optab
= (templates
*) xmalloc (sizeof (templates
));
626 core_optab
->start
= optab
;
631 /* initialize reg_hash hash table */
632 reg_hash
= hash_new ();
634 register const reg_entry
*regtab
;
636 for (regtab
= i386_regtab
;
637 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
640 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
646 /* fill in lexical tables: mnemonic_chars, operand_chars. */
651 for (c
= 0; c
< 256; c
++)
656 mnemonic_chars
[c
] = c
;
657 register_chars
[c
] = c
;
658 operand_chars
[c
] = c
;
660 else if (islower (c
))
662 mnemonic_chars
[c
] = c
;
663 register_chars
[c
] = c
;
664 operand_chars
[c
] = c
;
666 else if (isupper (c
))
668 mnemonic_chars
[c
] = tolower (c
);
669 register_chars
[c
] = mnemonic_chars
[c
];
670 operand_chars
[c
] = c
;
673 if (isalpha (c
) || isdigit (c
))
674 identifier_chars
[c
] = c
;
677 identifier_chars
[c
] = c
;
678 operand_chars
[c
] = c
;
683 identifier_chars
['@'] = '@';
685 register_chars
[')'] = ')';
686 register_chars
['('] = '(';
687 digit_chars
['-'] = '-';
688 identifier_chars
['_'] = '_';
689 identifier_chars
['.'] = '.';
691 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
692 operand_chars
[(unsigned char) *p
] = *p
;
695 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
696 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
698 record_alignment (text_section
, 2);
699 record_alignment (data_section
, 2);
700 record_alignment (bss_section
, 2);
706 i386_print_statistics (file
)
709 hash_print_statistics (file
, "i386 opcode", op_hash
);
710 hash_print_statistics (file
, "i386 register", reg_hash
);
716 /* debugging routines for md_assemble */
717 static void pi
PARAMS ((char *, i386_insn
*));
718 static void pte
PARAMS ((template *));
719 static void pt
PARAMS ((unsigned int));
720 static void pe
PARAMS ((expressionS
*));
721 static void ps
PARAMS ((symbolS
*));
728 register template *p
;
731 fprintf (stdout
, "%s: template ", line
);
733 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
734 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
735 fprintf (stdout
, " base %x index %x scale %x\n",
736 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
737 for (i
= 0; i
< x
->operands
; i
++)
739 fprintf (stdout
, " #%d: ", i
+ 1);
741 fprintf (stdout
, "\n");
743 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
| RegXMM
))
744 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
745 if (x
->types
[i
] & Imm
)
747 if (x
->types
[i
] & Disp
)
757 fprintf (stdout
, " %d operands ", t
->operands
);
758 fprintf (stdout
, "opcode %x ",
760 if (t
->extension_opcode
!= None
)
761 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
762 if (t
->opcode_modifier
& D
)
763 fprintf (stdout
, "D");
764 if (t
->opcode_modifier
& W
)
765 fprintf (stdout
, "W");
766 fprintf (stdout
, "\n");
767 for (i
= 0; i
< t
->operands
; i
++)
769 fprintf (stdout
, " #%d type ", i
+ 1);
770 pt (t
->operand_types
[i
]);
771 fprintf (stdout
, "\n");
779 fprintf (stdout
, " operation %d\n", e
->X_op
);
780 fprintf (stdout
, " add_number %d (%x)\n",
781 e
->X_add_number
, e
->X_add_number
);
784 fprintf (stdout
, " add_symbol ");
785 ps (e
->X_add_symbol
);
786 fprintf (stdout
, "\n");
790 fprintf (stdout
, " op_symbol ");
792 fprintf (stdout
, "\n");
800 fprintf (stdout
, "%s type %s%s",
802 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
803 segment_name (S_GET_SEGMENT (s
)));
822 { BaseIndex
, "BaseIndex" },
826 { InOutPortReg
, "InOutPortReg" },
827 { ShiftCount
, "ShiftCount" },
828 { Control
, "control reg" },
829 { Test
, "test reg" },
830 { Debug
, "debug reg" },
831 { FloatReg
, "FReg" },
832 { FloatAcc
, "FAcc" },
836 { JumpAbsolute
, "Jump Absolute" },
847 register struct type_name
*ty
;
851 fprintf (stdout
, _("Unknown"));
855 for (ty
= type_names
; ty
->mask
; ty
++)
857 fprintf (stdout
, "%s, ", ty
->tname
);
862 #endif /* DEBUG386 */
865 tc_i386_force_relocation (fixp
)
869 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
870 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
875 return fixp
->fx_r_type
==7;
880 static bfd_reloc_code_real_type reloc
881 PARAMS ((int, int, bfd_reloc_code_real_type
));
883 static bfd_reloc_code_real_type
884 reloc (size
, pcrel
, other
)
887 bfd_reloc_code_real_type other
;
889 if (other
!= NO_RELOC
) return other
;
895 case 1: return BFD_RELOC_8_PCREL
;
896 case 2: return BFD_RELOC_16_PCREL
;
897 case 4: return BFD_RELOC_32_PCREL
;
899 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
905 case 1: return BFD_RELOC_8
;
906 case 2: return BFD_RELOC_16
;
907 case 4: return BFD_RELOC_32
;
909 as_bad (_("Can not do %d byte relocation"), size
);
912 return BFD_RELOC_NONE
;
916 * Here we decide which fixups can be adjusted to make them relative to
917 * the beginning of the section instead of the symbol. Basically we need
918 * to make sure that the dynamic relocations are done correctly, so in
919 * some cases we force the original symbol to be used.
922 tc_i386_fix_adjustable(fixP
)
926 /* Prevent all adjustments to global symbols. */
927 if (S_IS_EXTERN (fixP
->fx_addsy
))
929 if (S_IS_WEAK (fixP
->fx_addsy
))
932 /* adjust_reloc_syms doesn't know about the GOT */
933 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
934 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
935 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
936 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
937 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
942 #define reloc(SIZE,PCREL,OTHER) 0
943 #define BFD_RELOC_16 0
944 #define BFD_RELOC_32 0
945 #define BFD_RELOC_16_PCREL 0
946 #define BFD_RELOC_32_PCREL 0
947 #define BFD_RELOC_386_PLT32 0
948 #define BFD_RELOC_386_GOT32 0
949 #define BFD_RELOC_386_GOTOFF 0
953 intel_float_operand (mnemonic
)
956 if (mnemonic
[0] == 'f' && mnemonic
[1] =='i')
959 if (mnemonic
[0] == 'f')
965 /* This is the guts of the machine-dependent assembler. LINE points to a
966 machine dependent instruction. This function is supposed to emit
967 the frags/bytes it assembles to. */
973 /* Points to template once we've found it. */
976 /* Count the size of the instruction generated. */
981 char mnemonic
[MAX_MNEM_SIZE
];
983 /* Initialize globals. */
984 memset (&i
, '\0', sizeof (i
));
985 for (j
= 0; j
< MAX_OPERANDS
; j
++)
986 i
.disp_reloc
[j
] = NO_RELOC
;
987 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
988 memset (im_expressions
, '\0', sizeof (im_expressions
));
989 save_stack_p
= save_stack
; /* reset stack pointer */
991 /* First parse an instruction mnemonic & call i386_operand for the operands.
992 We assume that the scrubber has arranged it so that line[0] is the valid
993 start of a (possibly prefixed) mnemonic. */
996 char *token_start
= l
;
999 /* Non-zero if we found a prefix only acceptable with string insns. */
1000 const char *expecting_string_instruction
= NULL
;
1005 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
1008 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
1010 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1015 if (!is_space_char (*l
)
1016 && *l
!= END_OF_INSN
1017 && *l
!= PREFIX_SEPARATOR
)
1019 as_bad (_("invalid character %s in mnemonic"),
1020 output_invalid (*l
));
1023 if (token_start
== l
)
1025 if (*l
== PREFIX_SEPARATOR
)
1026 as_bad (_("expecting prefix; got nothing"));
1028 as_bad (_("expecting mnemonic; got nothing"));
1032 /* Look up instruction (or prefix) via hash table. */
1033 current_templates
= hash_find (op_hash
, mnemonic
);
1035 if (*l
!= END_OF_INSN
1036 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
1037 && current_templates
1038 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
1040 /* If we are in 16-bit mode, do not allow addr16 or data16.
1041 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1042 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
1043 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
1046 as_bad (_("redundant %s prefix"),
1047 current_templates
->start
->name
);
1050 /* Add prefix, checking for repeated prefixes. */
1051 switch (add_prefix (current_templates
->start
->base_opcode
))
1056 expecting_string_instruction
=
1057 current_templates
->start
->name
;
1060 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1067 if (!current_templates
)
1069 /* See if we can get a match by trimming off a suffix. */
1072 case DWORD_MNEM_SUFFIX
:
1073 case WORD_MNEM_SUFFIX
:
1074 case BYTE_MNEM_SUFFIX
:
1075 case SHORT_MNEM_SUFFIX
:
1076 #if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
1077 case LONG_MNEM_SUFFIX
:
1079 i
.suffix
= mnem_p
[-1];
1081 current_templates
= hash_find (op_hash
, mnemonic
);
1085 case INTEL_DWORD_MNEM_SUFFIX
:
1088 i
.suffix
= mnem_p
[-1];
1090 current_templates
= hash_find (op_hash
, mnemonic
);
1094 if (!current_templates
)
1096 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1101 /* check for rep/repne without a string instruction */
1102 if (expecting_string_instruction
1103 && !(current_templates
->start
->opcode_modifier
& IsString
))
1105 as_bad (_("expecting string instruction after `%s'"),
1106 expecting_string_instruction
);
1110 /* There may be operands to parse. */
1111 if (*l
!= END_OF_INSN
)
1113 /* parse operands */
1115 /* 1 if operand is pending after ','. */
1116 unsigned int expecting_operand
= 0;
1118 /* Non-zero if operand parens not balanced. */
1119 unsigned int paren_not_balanced
;
1123 /* skip optional white space before operand */
1124 if (is_space_char (*l
))
1126 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1128 as_bad (_("invalid character %s before operand %d"),
1129 output_invalid (*l
),
1133 token_start
= l
; /* after white space */
1134 paren_not_balanced
= 0;
1135 while (paren_not_balanced
|| *l
!= ',')
1137 if (*l
== END_OF_INSN
)
1139 if (paren_not_balanced
)
1142 as_bad (_("unbalanced parenthesis in operand %d."),
1145 as_bad (_("unbalanced brackets in operand %d."),
1150 break; /* we are done */
1152 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1154 as_bad (_("invalid character %s in operand %d"),
1155 output_invalid (*l
),
1162 ++paren_not_balanced
;
1164 --paren_not_balanced
;
1169 ++paren_not_balanced
;
1171 --paren_not_balanced
;
1175 if (l
!= token_start
)
1176 { /* yes, we've read in another operand */
1177 unsigned int operand_ok
;
1178 this_operand
= i
.operands
++;
1179 if (i
.operands
> MAX_OPERANDS
)
1181 as_bad (_("spurious operands; (%d operands/instruction max)"),
1185 /* now parse operand adding info to 'i' as we go along */
1186 END_STRING_AND_SAVE (l
);
1189 operand_ok
= i386_intel_operand (token_start
, intel_float_operand (mnemonic
));
1191 operand_ok
= i386_operand (token_start
);
1193 RESTORE_END_STRING (l
); /* restore old contents */
1199 if (expecting_operand
)
1201 expecting_operand_after_comma
:
1202 as_bad (_("expecting operand after ','; got nothing"));
1207 as_bad (_("expecting operand before ','; got nothing"));
1212 /* now *l must be either ',' or END_OF_INSN */
1215 if (*++l
== END_OF_INSN
)
1216 { /* just skip it, if it's \n complain */
1217 goto expecting_operand_after_comma
;
1219 expecting_operand
= 1;
1222 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1226 /* Now we've parsed the mnemonic into a set of templates, and have the
1229 Next, we find a template that matches the given insn,
1230 making sure the overlap of the given operands types is consistent
1231 with the template operand types. */
1233 #define MATCH(overlap, given, template) \
1235 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1236 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1238 /* If given types r0 and r1 are registers they must be of the same type
1239 unless the expected operand type register overlap is null.
1240 Note that Acc in a template matches every size of reg. */
1241 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1242 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1243 ((g0) & Reg) == ((g1) & Reg) || \
1244 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1247 register unsigned int overlap0
, overlap1
;
1249 unsigned int overlap2
;
1250 unsigned int found_reverse_match
;
1253 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1255 && (strcmp (mnemonic
, "enter") != 0)
1256 && (strcmp (mnemonic
, "bound") != 0)
1257 && (strncmp (mnemonic
, "fsub", 4) !=0)
1258 && (strncmp (mnemonic
, "fdiv", 4) !=0))
1260 const reg_entry
*temp_reg
;
1261 expressionS
*temp_disp
;
1262 expressionS
*temp_imm
;
1263 unsigned int temp_type
;
1266 if (i
.operands
== 2)
1271 else if (i
.operands
== 3)
1279 temp_type
= i
.types
[xchg2
];
1280 if (temp_type
& (Reg
| FloatReg
))
1281 temp_reg
= i
.regs
[xchg2
];
1282 else if (temp_type
& Imm
)
1283 temp_imm
= i
.imms
[xchg2
];
1284 else if (temp_type
& Disp
)
1285 temp_disp
= i
.disps
[xchg2
];
1287 i
.types
[xchg2
] = i
.types
[xchg1
];
1289 if (i
.types
[xchg1
] & (Reg
| FloatReg
))
1291 i
.regs
[xchg2
] = i
.regs
[xchg1
];
1292 i
.regs
[xchg1
] = NULL
;
1294 else if (i
.types
[xchg2
] & Imm
)
1296 i
.imms
[xchg2
] = i
.imms
[xchg1
];
1297 i
.imms
[xchg1
] = NULL
;
1299 else if (i
.types
[xchg2
] & Disp
)
1301 i
.disps
[xchg2
] = i
.disps
[xchg1
];
1302 i
.disps
[xchg1
] = NULL
;
1305 if (temp_type
& (Reg
| FloatReg
))
1307 i
.regs
[xchg1
] = temp_reg
;
1308 if (! (i
.types
[xchg1
] & (Reg
| FloatReg
)))
1309 i
.regs
[xchg2
] = NULL
;
1311 else if (temp_type
& Imm
)
1313 i
.imms
[xchg1
] = temp_imm
;
1314 if (! (i
.types
[xchg1
] & Imm
))
1315 i
.imms
[xchg2
] = NULL
;
1317 else if (temp_type
& Disp
)
1319 i
.disps
[xchg1
] = temp_disp
;
1320 if (! (i
.types
[xchg1
] & Disp
))
1321 i
.disps
[xchg2
] = NULL
;
1324 i
.types
[xchg1
] = temp_type
;
1326 if (!strcmp(mnemonic
,"jmp")
1327 || !strcmp (mnemonic
, "call"))
1328 if ((i
.types
[0] & Reg
) || i
.types
[0] & BaseIndex
)
1329 i
.types
[0] |= JumpAbsolute
;
1335 found_reverse_match
= 0;
1336 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1338 : (i
.suffix
== WORD_MNEM_SUFFIX
1340 : (i
.suffix
== SHORT_MNEM_SUFFIX
1342 : (i
.suffix
== LONG_MNEM_SUFFIX
1344 : (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
1346 : (i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf
: 0))))));
1348 for (t
= current_templates
->start
;
1349 t
< current_templates
->end
;
1352 /* Must have right number of operands. */
1353 if (i
.operands
!= t
->operands
)
1356 /* For some opcodes, don't check the suffix */
1359 if (strcmp (t
->name
, "fnstcw")
1360 && strcmp (t
->name
, "fldcw")
1361 && (t
->opcode_modifier
& suffix_check
))
1364 /* Must not have disallowed suffix. */
1365 else if ((t
->opcode_modifier
& suffix_check
))
1368 else if (!t
->operands
)
1369 break; /* 0 operands always matches */
1371 overlap0
= i
.types
[0] & t
->operand_types
[0];
1372 switch (t
->operands
)
1375 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1380 overlap1
= i
.types
[1] & t
->operand_types
[1];
1381 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1382 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1383 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1384 t
->operand_types
[0],
1385 overlap1
, i
.types
[1],
1386 t
->operand_types
[1]))
1389 /* check if other direction is valid ... */
1390 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1393 /* try reversing direction of operands */
1394 overlap0
= i
.types
[0] & t
->operand_types
[1];
1395 overlap1
= i
.types
[1] & t
->operand_types
[0];
1396 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1397 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1398 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1399 t
->operand_types
[1],
1400 overlap1
, i
.types
[1],
1401 t
->operand_types
[0]))
1403 /* does not match either direction */
1406 /* found_reverse_match holds which of D or FloatDR
1408 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1411 /* found a forward 2 operand match here */
1412 if (t
->operands
== 3)
1414 /* Here we make use of the fact that there are no
1415 reverse match 3 operand instructions, and all 3
1416 operand instructions only need to be checked for
1417 register consistency between operands 2 and 3. */
1418 overlap2
= i
.types
[2] & t
->operand_types
[2];
1419 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1420 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1421 t
->operand_types
[1],
1422 overlap2
, i
.types
[2],
1423 t
->operand_types
[2]))
1427 /* found either forward/reverse 2 or 3 operand match here:
1428 slip through to break */
1430 break; /* we've found a match; break out of loop */
1431 } /* for (t = ... */
1432 if (t
== current_templates
->end
)
1433 { /* we found no match */
1434 as_bad (_("suffix or operands invalid for `%s'"),
1435 current_templates
->start
->name
);
1439 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1441 /* Warn them that a data or address size prefix doesn't affect
1442 assembly of the next line of code. */
1443 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1446 /* Copy the template we found. */
1448 if (found_reverse_match
)
1450 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1451 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1455 if (i
.tm
.opcode_modifier
& FWait
)
1456 if (! add_prefix (FWAIT_OPCODE
))
1459 /* Check string instruction segment overrides */
1460 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1462 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1463 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1465 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1467 as_bad (_("`%s' operand %d must use `%%es' segment"),
1472 /* There's only ever one segment override allowed per instruction.
1473 This instruction possibly has a legal segment override on the
1474 second operand, so copy the segment to where non-string
1475 instructions store it, allowing common code. */
1476 i
.seg
[0] = i
.seg
[1];
1478 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1480 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1482 as_bad (_("`%s' operand %d must use `%%es' segment"),
1490 /* If matched instruction specifies an explicit instruction mnemonic
1492 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1494 if (i
.tm
.opcode_modifier
& Size16
)
1495 i
.suffix
= WORD_MNEM_SUFFIX
;
1497 i
.suffix
= DWORD_MNEM_SUFFIX
;
1499 else if (i
.reg_operands
)
1501 /* If there's no instruction mnemonic suffix we try to invent one
1502 based on register operands. */
1505 /* We take i.suffix from the last register operand specified,
1506 Destination register type is more significant than source
1509 for (op
= i
.operands
; --op
>= 0; )
1510 if (i
.types
[op
] & Reg
)
1512 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1513 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1518 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1521 for (op
= i
.operands
; --op
>= 0; )
1523 /* If this is an eight bit register, it's OK. If it's
1524 the 16 or 32 bit version of an eight bit register,
1525 we will just use the low portion, and that's OK too. */
1526 if (i
.types
[op
] & Reg8
)
1529 /* movzx and movsx should not generate this warning. */
1531 && (i
.tm
.base_opcode
== 0xfb7
1532 || i
.tm
.base_opcode
== 0xfb6
1533 || i
.tm
.base_opcode
== 0xfbe
1534 || i
.tm
.base_opcode
== 0xfbf))
1537 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1539 /* Check that the template allows eight bit regs
1540 This kills insns such as `orb $1,%edx', which
1541 maybe should be allowed. */
1542 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1546 #if REGISTER_WARNINGS
1547 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1548 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1549 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1550 i
.regs
[op
]->reg_name
,
1555 /* Any other register is bad */
1556 if (i
.types
[op
] & (Reg
| RegMMX
| RegXMM
1558 | Control
| Debug
| Test
1559 | FloatReg
| FloatAcc
))
1561 as_bad (_("`%%%s' not allowed with `%s%c'"),
1562 i
.regs
[op
]->reg_name
,
1569 else if (i
.suffix
== DWORD_MNEM_SUFFIX
)
1572 for (op
= i
.operands
; --op
>= 0; )
1573 /* Reject eight bit registers, except where the template
1574 requires them. (eg. movzb) */
1575 if ((i
.types
[op
] & Reg8
) != 0
1576 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1578 as_bad (_("`%%%s' not allowed with `%s%c'"),
1579 i
.regs
[op
]->reg_name
,
1584 #if REGISTER_WARNINGS
1585 /* Warn if the e prefix on a general reg is missing. */
1586 else if ((i
.types
[op
] & Reg16
) != 0
1587 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1589 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1590 (i
.regs
[op
] + 8)->reg_name
,
1591 i
.regs
[op
]->reg_name
,
1596 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1599 for (op
= i
.operands
; --op
>= 0; )
1600 /* Reject eight bit registers, except where the template
1601 requires them. (eg. movzb) */
1602 if ((i
.types
[op
] & Reg8
) != 0
1603 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1605 as_bad (_("`%%%s' not allowed with `%s%c'"),
1606 i
.regs
[op
]->reg_name
,
1611 #if REGISTER_WARNINGS
1612 /* Warn if the e prefix on a general reg is present. */
1613 else if ((i
.types
[op
] & Reg32
) != 0
1614 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1616 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1617 (i
.regs
[op
] - 8)->reg_name
,
1618 i
.regs
[op
]->reg_name
,
1627 /* Make still unresolved immediate matches conform to size of immediate
1628 given in i.suffix. Note: overlap2 cannot be an immediate! */
1629 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1630 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1631 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1635 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1636 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1638 else if (overlap0
== (Imm16
| Imm32
))
1641 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1645 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1649 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1650 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1651 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1655 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1656 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1658 else if (overlap1
== (Imm16
| Imm32
))
1661 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1665 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1669 assert ((overlap2
& Imm
) == 0);
1671 i
.types
[0] = overlap0
;
1672 if (overlap0
& ImplicitRegister
)
1674 if (overlap0
& Imm1
)
1675 i
.imm_operands
= 0; /* kludge for shift insns */
1677 i
.types
[1] = overlap1
;
1678 if (overlap1
& ImplicitRegister
)
1681 i
.types
[2] = overlap2
;
1682 if (overlap2
& ImplicitRegister
)
1685 /* Finalize opcode. First, we change the opcode based on the operand
1686 size given by i.suffix: We need not change things for byte insns. */
1688 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1690 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1694 /* For movzx and movsx, need to check the register type */
1696 && (i
.tm
.base_opcode
== 0xfb6 || i
.tm
.base_opcode
== 0xfbe))
1697 if (i
.suffix
&& i
.suffix
== BYTE_MNEM_SUFFIX
)
1699 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1701 if ((i
.regs
[1]->reg_type
& Reg16
) != 0)
1702 if (!add_prefix (prefix
))
1706 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1708 /* It's not a byte, select word/dword operation. */
1709 if (i
.tm
.opcode_modifier
& W
)
1711 if (i
.tm
.opcode_modifier
& ShortForm
)
1712 i
.tm
.base_opcode
|= 8;
1714 i
.tm
.base_opcode
|= 1;
1716 /* Now select between word & dword operations via the operand
1717 size prefix, except for instructions that will ignore this
1719 if (((intel_syntax
&& (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1720 || i
.suffix
== DWORD_MNEM_SUFFIX
1721 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1722 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1724 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1725 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1726 prefix
= ADDR_PREFIX_OPCODE
;
1728 if (! add_prefix (prefix
))
1731 /* Size floating point instruction. */
1732 if (i
.suffix
== LONG_MNEM_SUFFIX
1733 || (intel_syntax
&& i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1735 if (i
.tm
.opcode_modifier
& FloatMF
)
1736 i
.tm
.base_opcode
^= 4;
1739 if (intel_syntax
&& i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
)
1741 if (i
.tm
.opcode_modifier
& FloatMF
)
1742 i
.tm
.base_opcode
^= 2;
1746 if (i
.tm
.opcode_modifier
& ImmExt
)
1748 /* These AMD 3DNow! and Intel Katmai New Instructions have an
1749 opcode suffix which is coded in the same place as an 8-bit
1750 immediate field would be. Here we fake an 8-bit immediate
1751 operand from the opcode suffix stored in tm.extension_opcode. */
1755 assert(i
.imm_operands
== 0 && i
.operands
<= 2);
1757 exp
= &im_expressions
[i
.imm_operands
++];
1758 i
.imms
[i
.operands
] = exp
;
1759 i
.types
[i
.operands
++] = Imm8
;
1760 exp
->X_op
= O_constant
;
1761 exp
->X_add_number
= i
.tm
.extension_opcode
;
1762 i
.tm
.extension_opcode
= None
;
1765 /* For insns with operands there are more diddles to do to the opcode. */
1768 /* Default segment register this instruction will use
1769 for memory accesses. 0 means unknown.
1770 This is only for optimizing out unnecessary segment overrides. */
1771 const seg_entry
*default_seg
= 0;
1773 /* If we found a reverse match we must alter the opcode
1774 direction bit. found_reverse_match holds bits to change
1775 (different for int & float insns). */
1777 i
.tm
.base_opcode
^= found_reverse_match
;
1779 /* The imul $imm, %reg instruction is converted into
1780 imul $imm, %reg, %reg, and the clr %reg instruction
1781 is converted into xor %reg, %reg. */
1782 if (i
.tm
.opcode_modifier
& regKludge
)
1784 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1785 /* Pretend we saw the extra register operand. */
1786 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1790 if (i
.tm
.opcode_modifier
& ShortForm
)
1792 /* The register or float register operand is in operand 0 or 1. */
1793 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1794 /* Register goes in low 3 bits of opcode. */
1795 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1796 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1798 /* Warn about some common errors, but press on regardless.
1799 The first case can be generated by gcc (<= 2.8.1). */
1800 if (i
.operands
== 2)
1802 /* reversed arguments on faddp, fsubp, etc. */
1803 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1804 i
.regs
[1]->reg_name
,
1805 i
.regs
[0]->reg_name
);
1809 /* extraneous `l' suffix on fp insn */
1810 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1811 i
.regs
[0]->reg_name
);
1815 else if (i
.tm
.opcode_modifier
& Modrm
)
1817 /* The opcode is completed (modulo i.tm.extension_opcode which
1818 must be put into the modrm byte).
1819 Now, we make the modrm & index base bytes based on all the
1820 info we've collected. */
1822 /* i.reg_operands MUST be the number of real register operands;
1823 implicit registers do not count. */
1824 if (i
.reg_operands
== 2)
1826 unsigned int source
, dest
;
1827 source
= ((i
.types
[0]
1828 & (Reg
| RegMMX
| RegXMM
1830 | Control
| Debug
| Test
))
1835 /* One of the register operands will be encoded in the
1836 i.tm.reg field, the other in the combined i.tm.mode
1837 and i.tm.regmem fields. If no form of this
1838 instruction supports a memory destination operand,
1839 then we assume the source operand may sometimes be
1840 a memory operand and so we need to store the
1841 destination in the i.rm.reg field. */
1842 if ((i
.tm
.operand_types
[dest
] & AnyMem
) == 0)
1844 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1845 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1849 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1850 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1854 { /* if it's not 2 reg operands... */
1857 unsigned int fake_zero_displacement
= 0;
1858 unsigned int op
= ((i
.types
[0] & AnyMem
)
1860 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1867 if (! i
.disp_operands
)
1868 fake_zero_displacement
= 1;
1871 /* Operand is just <disp> */
1872 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1874 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1875 i
.types
[op
] &= ~Disp
;
1876 i
.types
[op
] |= Disp16
;
1880 i
.rm
.regmem
= NO_BASE_REGISTER
;
1881 i
.types
[op
] &= ~Disp
;
1882 i
.types
[op
] |= Disp32
;
1885 else /* ! i.base_reg && i.index_reg */
1887 i
.sib
.index
= i
.index_reg
->reg_num
;
1888 i
.sib
.base
= NO_BASE_REGISTER
;
1889 i
.sib
.scale
= i
.log2_scale_factor
;
1890 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1891 i
.types
[op
] &= ~Disp
;
1892 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1895 else if (i
.base_reg
->reg_type
& Reg16
)
1897 switch (i
.base_reg
->reg_num
)
1902 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1903 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1910 if ((i
.types
[op
] & Disp
) == 0)
1912 /* fake (%bp) into 0(%bp) */
1913 i
.types
[op
] |= Disp8
;
1914 fake_zero_displacement
= 1;
1917 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1918 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1920 default: /* (%si) -> 4 or (%di) -> 5 */
1921 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1923 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1925 else /* i.base_reg and 32 bit mode */
1927 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1928 i
.sib
.base
= i
.base_reg
->reg_num
;
1929 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1932 if (i
.disp_operands
== 0)
1934 fake_zero_displacement
= 1;
1935 i
.types
[op
] |= Disp8
;
1938 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1942 i
.sib
.scale
= i
.log2_scale_factor
;
1945 /* <disp>(%esp) becomes two byte modrm
1946 with no index register. We've already
1947 stored the code for esp in i.rm.regmem
1948 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1949 base register besides %esp will not use
1950 the extra modrm byte. */
1951 i
.sib
.index
= NO_INDEX_REGISTER
;
1952 #if ! SCALE1_WHEN_NO_INDEX
1953 /* Another case where we force the second
1955 if (i
.log2_scale_factor
)
1956 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1961 i
.sib
.index
= i
.index_reg
->reg_num
;
1962 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1964 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1967 if (fake_zero_displacement
)
1969 /* Fakes a zero displacement assuming that i.types[op]
1970 holds the correct displacement size. */
1971 exp
= &disp_expressions
[i
.disp_operands
++];
1973 exp
->X_op
= O_constant
;
1974 exp
->X_add_number
= 0;
1975 exp
->X_add_symbol
= (symbolS
*) 0;
1976 exp
->X_op_symbol
= (symbolS
*) 0;
1980 /* Fill in i.rm.reg or i.rm.regmem field with register
1981 operand (if any) based on i.tm.extension_opcode.
1982 Again, we must be careful to make sure that
1983 segment/control/debug/test/MMX registers are coded
1984 into the i.rm.reg field. */
1989 & (Reg
| RegMMX
| RegXMM
1991 | Control
| Debug
| Test
))
1994 & (Reg
| RegMMX
| RegXMM
1996 | Control
| Debug
| Test
))
1999 /* If there is an extension opcode to put here, the
2000 register number must be put into the regmem field. */
2001 if (i
.tm
.extension_opcode
!= None
)
2002 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
2004 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
2006 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
2007 we must set it to 3 to indicate this is a register
2008 operand in the regmem field. */
2009 if (!i
.mem_operands
)
2013 /* Fill in i.rm.reg field with extension opcode (if any). */
2014 if (i
.tm
.extension_opcode
!= None
)
2015 i
.rm
.reg
= i
.tm
.extension_opcode
;
2018 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
2020 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
2022 as_bad (_("you can't `pop %%cs'"));
2025 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
2027 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
2031 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
2033 /* For the string instructions that allow a segment override
2034 on one of their operands, the default segment is ds. */
2038 /* If a segment was explicitly specified,
2039 and the specified segment is not the default,
2040 use an opcode prefix to select it.
2041 If we never figured out what the default segment is,
2042 then default_seg will be zero at this point,
2043 and the specified segment prefix will always be used. */
2044 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
2046 if (! add_prefix (i
.seg
[0]->seg_prefix
))
2050 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
2052 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc */
2053 as_warn (_("translating to `%sp'"), i
.tm
.name
);
2057 /* Handle conversion of 'int $3' --> special int3 insn. */
2058 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
2060 i
.tm
.base_opcode
= INT3_OPCODE
;
2064 /* We are ready to output the insn. */
2069 if (i
.tm
.opcode_modifier
& Jump
)
2071 long n
= (long) i
.disps
[0]->X_add_number
;
2072 int prefix
= (i
.prefix
[DATA_PREFIX
] != 0);
2080 if (flag_16bit_code
)
2083 if (!intel_syntax
&& (i
.prefixes
!= 0))
2084 as_warn (_("skipping prefixes on this instruction"));
2086 if (i
.disps
[0]->X_op
== O_constant
)
2088 if (fits_in_signed_byte (n
))
2092 p
[0] = i
.tm
.base_opcode
;
2097 /* Use 16-bit jumps only for 16-bit code,
2098 because text segments are limited to 64K anyway;
2099 Use 32-bit jumps for 32-bit code, because they're faster,
2100 and a 16-bit jump will clear the top 16 bits of %eip. */
2101 int jmp_size
= code16
? 2 : 4;
2102 if (code16
&& !fits_in_signed_word (n
))
2104 as_bad (_("16-bit jump out of range"));
2108 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
2110 /* unconditional jump */
2111 insn_size
+= prefix
+ 1 + jmp_size
;
2112 p
= frag_more (prefix
+ 1 + jmp_size
);
2114 *p
++ = DATA_PREFIX_OPCODE
;
2116 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2120 /* conditional jump */
2121 insn_size
+= prefix
+ 2 + jmp_size
;
2122 p
= frag_more (prefix
+ 2 + jmp_size
);
2124 *p
++ = DATA_PREFIX_OPCODE
;
2125 *p
++ = TWO_BYTE_OPCODE_ESCAPE
;
2126 *p
++ = i
.tm
.base_opcode
+ 0x10;
2127 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2133 int size
= code16
? 2 : 4;
2135 /* It's a symbol; end frag & setup for relax.
2136 Make sure there are more than 6 chars left in the current frag;
2137 if not we'll have to start a new one. */
2138 frag_grow (prefix
+ 1 + 2 + size
);
2139 insn_size
+= 1 + prefix
;
2140 p
= frag_more (1 + prefix
);
2142 *p
++ = DATA_PREFIX_OPCODE
;
2143 *p
= i
.tm
.base_opcode
;
2144 frag_var (rs_machine_dependent
,
2145 prefix
+ 2 + size
, /* 2 opcode/prefix + displacement */
2147 ((unsigned char) *p
== JUMP_PC_RELATIVE
2148 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
2149 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
2150 i
.disps
[0]->X_add_symbol
,
2154 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
2156 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
2157 long n
= (long) i
.disps
[0]->X_add_number
;
2159 if (size
== 1) /* then this is a loop or jecxz type instruction */
2161 if (i
.prefix
[ADDR_PREFIX
])
2164 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
2172 if (i
.prefix
[DATA_PREFIX
])
2175 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
2179 if (flag_16bit_code
)
2186 if (!intel_syntax
&& (i
.prefixes
!= 0))
2187 as_warn (_("skipping prefixes on this instruction"));
2189 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2191 insn_size
+= 1 + size
;
2192 p
= frag_more (1 + size
);
2196 insn_size
+= 2 + size
; /* opcode can be at most two bytes */
2197 p
= frag_more (2 + size
);
2198 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2200 *p
++ = i
.tm
.base_opcode
& 0xff;
2202 if (i
.disps
[0]->X_op
== O_constant
)
2204 if (size
== 1 && !fits_in_signed_byte (n
))
2206 as_bad (_("`%s' only takes byte displacement; %ld shortened to %d"),
2209 else if (size
== 2 && !fits_in_signed_word (n
))
2211 as_bad (_("16-bit jump out of range"));
2214 md_number_to_chars (p
, (valueT
) n
, size
);
2218 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2219 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
2223 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2227 int prefix
= i
.prefix
[DATA_PREFIX
] != 0;
2235 if (flag_16bit_code
)
2239 reloc_type
= BFD_RELOC_32
;
2243 reloc_type
= BFD_RELOC_16
;
2246 if (!intel_syntax
&& (i
.prefixes
!= 0))
2247 as_warn (_("skipping prefixes on this instruction"));
2249 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2250 p
= frag_more (prefix
+ 1 + 2 + size
);
2252 *p
++ = DATA_PREFIX_OPCODE
;
2253 *p
++ = i
.tm
.base_opcode
;
2254 if (i
.imms
[1]->X_op
== O_constant
)
2256 long n
= (long) i
.imms
[1]->X_add_number
;
2258 if (size
== 2 && !fits_in_unsigned_word (n
))
2260 as_bad (_("16-bit jump out of range"));
2263 md_number_to_chars (p
, (valueT
) n
, size
);
2266 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2267 i
.imms
[1], 0, reloc_type
);
2268 if (i
.imms
[0]->X_op
!= O_constant
)
2269 as_bad (_("can't handle non absolute segment in `%s'"),
2271 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2275 /* Output normal instructions here. */
2278 /* The prefix bytes. */
2280 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2287 md_number_to_chars (p
, (valueT
) *q
, 1);
2291 /* Now the opcode; be careful about word order here! */
2292 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2295 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2297 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2301 /* put out high byte first: can't use md_number_to_chars! */
2302 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2303 *p
= i
.tm
.base_opcode
& 0xff;
2306 { /* opcode is either 3 or 4 bytes */
2307 if (i
.tm
.base_opcode
& 0xff000000)
2311 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2318 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2319 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2320 *p
= (i
.tm
.base_opcode
) & 0xff;
2323 /* Now the modrm byte and sib byte (if present). */
2324 if (i
.tm
.opcode_modifier
& Modrm
)
2328 md_number_to_chars (p
,
2329 (valueT
) (i
.rm
.regmem
<< 0
2333 /* If i.rm.regmem == ESP (4)
2334 && i.rm.mode != (Register mode)
2336 ==> need second modrm byte. */
2337 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2339 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2343 md_number_to_chars (p
,
2344 (valueT
) (i
.sib
.base
<< 0
2346 | i
.sib
.scale
<< 6),
2351 if (i
.disp_operands
)
2353 register unsigned int n
;
2355 for (n
= 0; n
< i
.operands
; n
++)
2359 if (i
.disps
[n
]->X_op
== O_constant
)
2361 if (i
.types
[n
] & Disp8
)
2365 md_number_to_chars (p
,
2366 (valueT
) i
.disps
[n
]->X_add_number
,
2369 else if (i
.types
[n
] & Disp16
)
2373 md_number_to_chars (p
,
2374 (valueT
) i
.disps
[n
]->X_add_number
,
2381 md_number_to_chars (p
,
2382 (valueT
) i
.disps
[n
]->X_add_number
,
2386 else if (i
.types
[n
] & Disp32
)
2390 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2392 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2395 { /* must be Disp16 */
2398 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2400 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2404 } /* end displacement output */
2406 /* output immediate */
2409 register unsigned int n
;
2411 for (n
= 0; n
< i
.operands
; n
++)
2415 if (i
.imms
[n
]->X_op
== O_constant
)
2417 if (i
.types
[n
] & (Imm8
| Imm8S
))
2421 md_number_to_chars (p
,
2422 (valueT
) i
.imms
[n
]->X_add_number
,
2425 else if (i
.types
[n
] & Imm16
)
2429 md_number_to_chars (p
,
2430 (valueT
) i
.imms
[n
]->X_add_number
,
2437 md_number_to_chars (p
,
2438 (valueT
) i
.imms
[n
]->X_add_number
,
2443 { /* not absolute_section */
2444 /* Need a 32-bit fixup (don't support 8bit
2445 non-absolute ims). Try to support other
2451 if (i
.types
[n
] & (Imm8
| Imm8S
))
2453 else if (i
.types
[n
] & Imm16
)
2458 p
= frag_more (size
);
2459 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2460 #ifdef BFD_ASSEMBLER
2461 if (r_type
== BFD_RELOC_32
2463 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2464 && (i
.imms
[n
]->X_op
== O_symbol
2465 || (i
.imms
[n
]->X_op
== O_add
2466 && ((symbol_get_value_expression
2467 (i
.imms
[n
]->X_op_symbol
)->X_op
)
2470 r_type
= BFD_RELOC_386_GOTPC
;
2471 i
.imms
[n
]->X_add_number
+= 3;
2474 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2475 i
.imms
[n
], pcrel
, r_type
);
2479 } /* end immediate output */
2487 #endif /* DEBUG386 */
2491 static int i386_is_reg
PARAMS ((char *));
2494 i386_is_reg (reg_string
)
2497 register char *s
= reg_string
;
2499 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
2501 if (is_space_char (*s
))
2505 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
2506 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2509 if (!hash_find (reg_hash
, reg_name_given
))
2515 static int i386_immediate
PARAMS ((char *));
2518 i386_immediate (imm_start
)
2521 char *save_input_line_pointer
;
2525 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2527 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2531 exp
= &im_expressions
[i
.imm_operands
++];
2532 i
.imms
[this_operand
] = exp
;
2534 if (is_space_char (*imm_start
))
2537 save_input_line_pointer
= input_line_pointer
;
2538 input_line_pointer
= imm_start
;
2543 * We can have operands of the form
2544 * <symbol>@GOTOFF+<nnn>
2545 * Take the easy way out here and copy everything
2546 * into a temporary buffer...
2550 cp
= strchr (input_line_pointer
, '@');
2556 /* GOT relocations are not supported in 16 bit mode */
2557 if (flag_16bit_code
)
2558 as_bad (_("GOT relocations not supported in 16 bit mode"));
2560 if (GOT_symbol
== NULL
)
2561 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2563 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2565 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2568 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2570 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2573 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2575 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2579 as_bad (_("Bad reloc specifier in expression"));
2581 /* Replace the relocation token with ' ', so that errors like
2582 foo@GOTOFF1 will be detected. */
2583 first
= cp
- input_line_pointer
;
2584 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2585 memcpy (tmpbuf
, input_line_pointer
, first
);
2586 tmpbuf
[first
] = ' ';
2587 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2588 input_line_pointer
= tmpbuf
;
2593 exp_seg
= expression (exp
);
2596 if (*input_line_pointer
)
2597 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer
);
2599 input_line_pointer
= save_input_line_pointer
;
2601 if (exp
->X_op
== O_absent
)
2603 /* missing or bad expr becomes absolute 0 */
2604 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2606 exp
->X_op
= O_constant
;
2607 exp
->X_add_number
= 0;
2608 exp
->X_add_symbol
= (symbolS
*) 0;
2609 exp
->X_op_symbol
= (symbolS
*) 0;
2610 i
.types
[this_operand
] |= Imm
;
2612 else if (exp
->X_op
== O_constant
)
2614 i
.types
[this_operand
] |=
2615 smallest_imm_type ((long) exp
->X_add_number
);
2617 /* If a suffix is given, this operand may be shortended. */
2620 case WORD_MNEM_SUFFIX
:
2621 i
.types
[this_operand
] |= Imm16
;
2623 case BYTE_MNEM_SUFFIX
:
2624 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2629 else if (exp_seg
!= text_section
2630 && exp_seg
!= data_section
2631 && exp_seg
!= bss_section
2632 && exp_seg
!= undefined_section
2633 #ifdef BFD_ASSEMBLER
2634 && !bfd_is_com_section (exp_seg
)
2639 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2645 /* This is an address. The size of the address will be
2646 determined later, depending on destination register,
2647 suffix, or the default for the section. We exclude
2648 Imm8S here so that `push $foo' and other instructions
2649 with an Imm8S form will use Imm16 or Imm32. */
2650 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2656 static int i386_scale
PARAMS ((char *));
2662 if (!isdigit (*scale
))
2669 i
.log2_scale_factor
= 0;
2672 i
.log2_scale_factor
= 1;
2675 i
.log2_scale_factor
= 2;
2678 i
.log2_scale_factor
= 3;
2682 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2686 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2688 as_warn (_("scale factor of %d without an index register"),
2689 1 << i
.log2_scale_factor
);
2690 #if SCALE1_WHEN_NO_INDEX
2691 i
.log2_scale_factor
= 0;
2697 static int i386_displacement
PARAMS ((char *, char *));
2700 i386_displacement (disp_start
, disp_end
)
2704 register expressionS
*exp
;
2706 char *save_input_line_pointer
;
2707 int bigdisp
= Disp32
;
2709 /* All of the pieces of the displacement expression are handled together. */
2710 if (intel_syntax
&& i
.disp_operands
!= 0)
2713 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2715 i
.types
[this_operand
] |= bigdisp
;
2717 exp
= &disp_expressions
[i
.disp_operands
];
2718 i
.disps
[this_operand
] = exp
;
2719 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2721 save_input_line_pointer
= input_line_pointer
;
2722 input_line_pointer
= disp_start
;
2723 END_STRING_AND_SAVE (disp_end
);
2725 #ifndef GCC_ASM_O_HACK
2726 #define GCC_ASM_O_HACK 0
2729 END_STRING_AND_SAVE (disp_end
+ 1);
2730 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2731 && displacement_string_end
[-1] == '+')
2733 /* This hack is to avoid a warning when using the "o"
2734 constraint within gcc asm statements.
2737 #define _set_tssldt_desc(n,addr,limit,type) \
2738 __asm__ __volatile__ ( \
2740 "movw %w1,2+%0\n\t" \
2742 "movb %b1,4+%0\n\t" \
2743 "movb %4,5+%0\n\t" \
2744 "movb $0,6+%0\n\t" \
2745 "movb %h1,7+%0\n\t" \
2747 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2749 This works great except that the output assembler ends
2750 up looking a bit weird if it turns out that there is
2751 no offset. You end up producing code that looks like:
2764 So here we provide the missing zero.
2767 *displacement_string_end
= '0';
2773 * We can have operands of the form
2774 * <symbol>@GOTOFF+<nnn>
2775 * Take the easy way out here and copy everything
2776 * into a temporary buffer...
2780 cp
= strchr (input_line_pointer
, '@');
2786 /* GOT relocations are not supported in 16 bit mode */
2787 if (flag_16bit_code
)
2788 as_bad (_("GOT relocations not supported in 16 bit mode"));
2790 if (GOT_symbol
== NULL
)
2791 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2793 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2795 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2798 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2800 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2803 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2805 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2809 as_bad (_("Bad reloc specifier in expression"));
2811 /* Replace the relocation token with ' ', so that errors like
2812 foo@GOTOFF1 will be detected. */
2813 first
= cp
- input_line_pointer
;
2814 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2815 memcpy (tmpbuf
, input_line_pointer
, first
);
2816 tmpbuf
[first
] = ' ';
2817 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2818 input_line_pointer
= tmpbuf
;
2823 exp_seg
= expression (exp
);
2825 #ifdef BFD_ASSEMBLER
2826 /* We do this to make sure that the section symbol is in
2827 the symbol table. We will ultimately change the relocation
2828 to be relative to the beginning of the section */
2829 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2831 if (S_IS_LOCAL(exp
->X_add_symbol
)
2832 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2833 section_symbol (S_GET_SEGMENT (exp
->X_add_symbol
));
2834 assert (exp
->X_op
== O_symbol
);
2835 exp
->X_op
= O_subtract
;
2836 exp
->X_op_symbol
= GOT_symbol
;
2837 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2842 if (*input_line_pointer
)
2843 as_bad (_("Ignoring junk `%s' after expression"),
2844 input_line_pointer
);
2846 RESTORE_END_STRING (disp_end
+ 1);
2848 RESTORE_END_STRING (disp_end
);
2849 input_line_pointer
= save_input_line_pointer
;
2851 if (exp
->X_op
== O_constant
)
2853 if (fits_in_signed_byte (exp
->X_add_number
))
2854 i
.types
[this_operand
] |= Disp8
;
2857 else if (exp_seg
!= text_section
2858 && exp_seg
!= data_section
2859 && exp_seg
!= bss_section
2860 && exp_seg
!= undefined_section
)
2862 as_bad (_ ("Unimplemented segment type %d in operand"), exp_seg
);
2869 static int i386_operand_modifier
PARAMS ((char **, int));
2872 i386_operand_modifier (op_string
, got_a_float
)
2876 if (!strncasecmp (*op_string
, "BYTE PTR", 8))
2878 i
.suffix
= BYTE_MNEM_SUFFIX
;
2883 else if (!strncasecmp (*op_string
, "WORD PTR", 8))
2885 i
.suffix
= WORD_MNEM_SUFFIX
;
2890 else if (!strncasecmp (*op_string
, "DWORD PTR", 9))
2893 i
.suffix
= SHORT_MNEM_SUFFIX
;
2895 i
.suffix
= DWORD_MNEM_SUFFIX
;
2900 else if (!strncasecmp (*op_string
, "QWORD PTR", 9))
2902 i
.suffix
= INTEL_DWORD_MNEM_SUFFIX
;
2907 else if (!strncasecmp (*op_string
, "XWORD PTR", 9))
2909 i
.suffix
= LONG_DOUBLE_MNEM_SUFFIX
;
2914 else if (!strncasecmp (*op_string
, "SHORT", 5))
2920 else if (!strncasecmp (*op_string
, "OFFSET FLAT:", 12))
2926 else if (!strncasecmp (*op_string
, "FLAT", 4))
2932 else return NONE_FOUND
;
2935 static char * build_displacement_string
PARAMS ((int, char *));
2938 build_displacement_string (initial_disp
, op_string
)
2942 char *temp_string
= (char *) malloc (strlen (op_string
) + 1);
2943 char *end_of_operand_string
;
2947 temp_string
[0] = '\0';
2948 tc
= end_of_operand_string
= strchr (op_string
, '[');
2949 if ( initial_disp
&& !end_of_operand_string
)
2951 strcpy (temp_string
, op_string
);
2952 return (temp_string
);
2955 /* Build the whole displacement string */
2958 strncpy (temp_string
, op_string
, end_of_operand_string
- op_string
);
2959 temp_string
[end_of_operand_string
- op_string
] = '\0';
2963 temp_disp
= op_string
;
2965 while (*temp_disp
!= '\0')
2967 int add_minus
= (*temp_disp
== '-');
2969 if (*temp_disp
== '+' || *temp_disp
== '-' || *temp_disp
== '[')
2972 if (is_space_char (*temp_disp
))
2975 /* Don't consider registers */
2976 if (*temp_disp
!= REGISTER_PREFIX
2977 && !(allow_naked_reg
&& i386_is_reg (temp_disp
)))
2979 char *string_start
= temp_disp
;
2981 while (*temp_disp
!= ']'
2982 && *temp_disp
!= '+'
2983 && *temp_disp
!= '-'
2984 && *temp_disp
!= '*')
2988 strcat (temp_string
, "-");
2990 strcat (temp_string
, "+");
2992 strncat (temp_string
, string_start
, temp_disp
- string_start
);
2993 if (*temp_disp
== '+' || *temp_disp
== '-')
2997 while (*temp_disp
!= '\0'
2998 && *temp_disp
!= '+'
2999 && *temp_disp
!= '-')
3006 static int i386_parse_seg
PARAMS ((char *));
3009 i386_parse_seg (op_string
)
3012 if (is_space_char (*op_string
))
3015 /* Should be one of es, cs, ss, ds fs or gs */
3016 switch (*op_string
++)
3019 i
.seg
[i
.mem_operands
] = &es
;
3022 i
.seg
[i
.mem_operands
] = &cs
;
3025 i
.seg
[i
.mem_operands
] = &ss
;
3028 i
.seg
[i
.mem_operands
] = &ds
;
3031 i
.seg
[i
.mem_operands
] = &fs
;
3034 i
.seg
[i
.mem_operands
] = &gs
;
3037 as_bad (_("bad segment name `%s'"), op_string
);
3041 if (*op_string
++ != 's')
3043 as_bad (_("bad segment name `%s'"), op_string
);
3047 if (is_space_char (*op_string
))
3050 if (*op_string
!= ':')
3052 as_bad (_("bad segment name `%s'"), op_string
);
3060 static int i386_intel_memory_operand
PARAMS ((char *));
3063 i386_intel_memory_operand (op_string
)
3067 char *end_of_operand_string
;
3069 if (is_digit_char (*op_string
)
3070 && strchr (op_string
, '[') == 0)
3072 if (!i386_immediate (op_string
))
3078 /* Look for displacement preceding open bracket */
3079 if (*op_string
!= '[')
3084 end_seg
= strchr (op_string
, ':');
3087 if (!i386_parse_seg (op_string
))
3089 op_string
= end_seg
+ 1;
3092 temp_string
= build_displacement_string (true, op_string
);
3093 if (!i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3096 end_of_operand_string
= strchr (op_string
, '[');
3097 if (!end_of_operand_string
)
3098 end_of_operand_string
= op_string
+ strlen (op_string
);
3100 if (is_space_char (*end_of_operand_string
))
3101 --end_of_operand_string
;
3103 op_string
= end_of_operand_string
;
3106 if (*op_string
== '[')
3110 /* Pick off each component and figure out where it belongs */
3112 end_of_operand_string
= op_string
;
3114 while (*op_string
!= ']')
3117 while (*end_of_operand_string
!= '+'
3118 && *end_of_operand_string
!= '-'
3119 && *end_of_operand_string
!= '*'
3120 && *end_of_operand_string
!= ']')
3121 end_of_operand_string
++;
3123 if (*op_string
== '+')
3125 char *temp_string
= op_string
+ 1;
3126 if (is_space_char (*temp_string
))
3128 if (*temp_string
== REGISTER_PREFIX
3129 || (allow_naked_reg
&& i386_is_reg (temp_string
)))
3133 if (*op_string
== REGISTER_PREFIX
3134 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3136 const reg_entry
*temp_reg
;
3139 END_STRING_AND_SAVE (end_of_operand_string
);
3140 temp_reg
= parse_register (op_string
, &end_op
);
3141 RESTORE_END_STRING (end_of_operand_string
);
3143 if (temp_reg
== NULL
)
3146 if (i
.base_reg
== NULL
)
3147 i
.base_reg
= temp_reg
;
3149 i
.index_reg
= temp_reg
;
3151 i
.types
[this_operand
] |= BaseIndex
;
3154 else if (is_digit_char (*op_string
) || *op_string
== '+' || *op_string
== '-')
3157 char *temp_string
= build_displacement_string (false, op_string
);
3159 if (*temp_string
== '+')
3162 if (!i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3166 end_of_operand_string
= op_string
;
3167 while (*end_of_operand_string
!= ']'
3168 && *end_of_operand_string
!= '+'
3169 && *end_of_operand_string
!= '-'
3170 && *end_of_operand_string
!= '*')
3171 ++end_of_operand_string
;
3173 else if (*op_string
== '*')
3177 if (i
.base_reg
&& !i
.index_reg
)
3179 i
.index_reg
= i
.base_reg
;
3183 if (!i386_scale (op_string
))
3186 op_string
= end_of_operand_string
;
3187 ++end_of_operand_string
;
3194 static int i386_intel_operand
PARAMS ((char *, int));
3197 i386_intel_operand (operand_string
, got_a_float
)
3198 char *operand_string
;
3201 char *op_string
= operand_string
;
3203 int operand_modifier
= i386_operand_modifier (&op_string
, got_a_float
);
3204 if (is_space_char (*op_string
))
3207 switch (operand_modifier
)
3214 if ((i
.mem_operands
== 1
3215 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3216 || i
.mem_operands
== 2)
3218 as_bad (_("too many memory references for `%s'"),
3219 current_templates
->start
->name
);
3223 if (!i386_intel_memory_operand (op_string
))
3232 if (!i386_immediate (op_string
))
3239 /* Should be register or immediate */
3240 if (is_digit_char (*op_string
)
3241 && strchr (op_string
, '[') == 0)
3243 if (!i386_immediate (op_string
))
3246 else if (*op_string
== REGISTER_PREFIX
3248 && i386_is_reg (op_string
)))
3251 register const reg_entry
* r
;
3254 r
= parse_register (op_string
, &end_op
);
3258 /* Check for a segment override by searching for ':' after a
3259 segment register. */
3261 if (is_space_char (*op_string
))
3263 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3268 i
.seg
[i
.mem_operands
] = &es
;
3271 i
.seg
[i
.mem_operands
] = &cs
;
3274 i
.seg
[i
.mem_operands
] = &ss
;
3277 i
.seg
[i
.mem_operands
] = &ds
;
3280 i
.seg
[i
.mem_operands
] = &fs
;
3283 i
.seg
[i
.mem_operands
] = &gs
;
3288 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3289 i
.regs
[this_operand
] = r
;
3296 if (!i386_intel_memory_operand (op_string
))
3304 /* Special case for (%dx) while doing input/output op. */
3306 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3308 && i
.log2_scale_factor
== 0
3309 && i
.seg
[i
.mem_operands
] == 0
3310 && (i
.types
[this_operand
] & Disp
) == 0)
3312 i
.types
[this_operand
] = InOutPortReg
;
3315 /* Make sure the memory operand we've been dealt is valid. */
3316 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
3319 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3320 != (Reg16
|BaseIndex
)))
3322 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3323 != (Reg16
|BaseIndex
))
3325 && i
.base_reg
->reg_num
< 6
3326 && i
.index_reg
->reg_num
>= 6
3327 && i
.log2_scale_factor
== 0))))
3329 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3330 operand_string
, "16");
3337 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3339 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3340 != (Reg32
|BaseIndex
))))
3342 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3343 operand_string
, "32");
3350 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3353 static int i386_operand
PARAMS ((char *));
3356 i386_operand (operand_string
)
3357 char *operand_string
;
3359 char *op_string
= operand_string
;
3361 if (is_space_char (*op_string
))
3364 /* We check for an absolute prefix (differentiating,
3365 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3366 if (*op_string
== ABSOLUTE_PREFIX
)
3369 if (is_space_char (*op_string
))
3371 i
.types
[this_operand
] |= JumpAbsolute
;
3374 /* Check if operand is a register. */
3375 if (*op_string
== REGISTER_PREFIX
3376 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3378 register const reg_entry
*r
;
3381 r
= parse_register (op_string
, &end_op
);
3385 /* Check for a segment override by searching for ':' after a
3386 segment register. */
3388 if (is_space_char (*op_string
))
3390 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3395 i
.seg
[i
.mem_operands
] = &es
;
3398 i
.seg
[i
.mem_operands
] = &cs
;
3401 i
.seg
[i
.mem_operands
] = &ss
;
3404 i
.seg
[i
.mem_operands
] = &ds
;
3407 i
.seg
[i
.mem_operands
] = &fs
;
3410 i
.seg
[i
.mem_operands
] = &gs
;
3414 /* Skip the ':' and whitespace. */
3416 if (is_space_char (*op_string
))
3419 /* Pretend given string starts here. */
3420 operand_string
= op_string
;
3421 if (!is_digit_char (*op_string
)
3422 && !is_identifier_char (*op_string
)
3423 && *op_string
!= '('
3424 && *op_string
!= ABSOLUTE_PREFIX
)
3426 as_bad (_("bad memory operand `%s'"), op_string
);
3429 /* Handle case of %es:*foo. */
3430 if (*op_string
== ABSOLUTE_PREFIX
)
3433 if (is_space_char (*op_string
))
3435 i
.types
[this_operand
] |= JumpAbsolute
;
3437 goto do_memory_reference
;
3441 as_bad (_("Junk `%s' after register"), op_string
);
3444 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3445 i
.regs
[this_operand
] = r
;
3448 else if (*op_string
== IMMEDIATE_PREFIX
)
3449 { /* ... or an immediate */
3451 if (!i386_immediate (op_string
))
3454 else if (is_digit_char (*op_string
)
3455 || is_identifier_char (*op_string
)
3456 || *op_string
== '(' )
3458 /* This is a memory reference of some sort. */
3459 char *end_of_operand_string
;
3460 register char *base_string
;
3461 int found_base_index_form
;
3463 /* Start and end of displacement string expression (if found). */
3464 char *displacement_string_start
;
3465 char *displacement_string_end
;
3467 do_memory_reference
:
3469 if ((i
.mem_operands
== 1
3470 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3471 || i
.mem_operands
== 2)
3473 as_bad (_("too many memory references for `%s'"),
3474 current_templates
->start
->name
);
3478 /* Check for base index form. We detect the base index form by
3479 looking for an ')' at the end of the operand, searching
3480 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3482 found_base_index_form
= 0;
3483 end_of_operand_string
= op_string
+ strlen (op_string
);
3485 --end_of_operand_string
;
3486 if (is_space_char (*end_of_operand_string
))
3487 --end_of_operand_string
;
3489 base_string
= end_of_operand_string
;
3491 if (*base_string
== ')')
3493 unsigned int parens_balanced
= 1;
3494 /* We've already checked that the number of left & right ()'s are
3495 equal, so this loop will not be infinite. */
3499 if (*base_string
== ')')
3501 if (*base_string
== '(')
3504 while (parens_balanced
);
3506 /* If there is a displacement set-up for it to be parsed later. */
3507 displacement_string_start
= op_string
;
3508 displacement_string_end
= base_string
;
3510 /* Skip past '(' and whitespace. */
3512 if (is_space_char (*base_string
))
3515 if (*base_string
== REGISTER_PREFIX
3516 || (allow_naked_reg
&& i386_is_reg (base_string
))
3517 || *base_string
== ',')
3518 found_base_index_form
= 1;
3521 /* If we can't parse a base index register expression, we've found
3522 a pure displacement expression. We set up displacement_string_start
3523 and displacement_string_end for the code below. */
3524 if (!found_base_index_form
)
3526 displacement_string_start
= op_string
;
3527 displacement_string_end
= end_of_operand_string
+ 1;
3531 i
.types
[this_operand
] |= BaseIndex
;
3533 /* Find base register (if any). */
3534 if (*base_string
!= ',')
3538 /* Trim off the closing ')' so that parse_register won't
3540 END_STRING_AND_SAVE (end_of_operand_string
);
3541 i
.base_reg
= parse_register (base_string
, &end_op
);
3542 RESTORE_END_STRING (end_of_operand_string
);
3544 if (i
.base_reg
== NULL
)
3547 base_string
= end_op
;
3548 if (is_space_char (*base_string
))
3552 /* There may be an index reg or scale factor here. */
3553 if (*base_string
== ',')
3556 if (is_space_char (*base_string
))
3559 if (*base_string
== REGISTER_PREFIX
3560 || (allow_naked_reg
&& i386_is_reg (base_string
)))
3564 END_STRING_AND_SAVE (end_of_operand_string
);
3565 i
.index_reg
= parse_register (base_string
, &end_op
);
3566 RESTORE_END_STRING (end_of_operand_string
);
3568 if (i
.index_reg
== NULL
)
3571 base_string
= end_op
;
3572 if (is_space_char (*base_string
))
3574 if (*base_string
== ',')
3577 if (is_space_char (*base_string
))
3580 else if (*base_string
!= ')' )
3582 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3588 /* Check for scale factor. */
3589 if (isdigit ((unsigned char) *base_string
))
3591 if (!i386_scale (base_string
))
3595 if (is_space_char (*base_string
))
3597 if (*base_string
!= ')')
3599 as_bad (_("expecting `)' after scale factor in `%s'"),
3604 else if (!i
.index_reg
)
3606 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3611 else if (*base_string
!= ')')
3613 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3619 /* If there's an expression beginning the operand, parse it,
3620 assuming displacement_string_start and
3621 displacement_string_end are meaningful. */
3622 if (displacement_string_start
!= displacement_string_end
)
3624 if (!i386_displacement (displacement_string_start
,
3625 displacement_string_end
))
3629 /* Special case for (%dx) while doing input/output op. */
3631 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3633 && i
.log2_scale_factor
== 0
3634 && i
.seg
[i
.mem_operands
] == 0
3635 && (i
.types
[this_operand
] & Disp
) == 0)
3637 i
.types
[this_operand
] = InOutPortReg
;
3640 /* Make sure the memory operand we've been dealt is valid. */
3641 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
3644 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3645 != (Reg16
|BaseIndex
)))
3647 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3648 != (Reg16
|BaseIndex
))
3650 && i
.base_reg
->reg_num
< 6
3651 && i
.index_reg
->reg_num
>= 6
3652 && i
.log2_scale_factor
== 0))))
3654 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3655 operand_string
, "16");
3662 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3664 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3665 != (Reg32
|BaseIndex
))))
3667 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3668 operand_string
, "32");
3675 { /* it's not a memory operand; argh! */
3676 as_bad (_("invalid char %s beginning operand %d `%s'"),
3677 output_invalid (*op_string
),
3682 return 1; /* normal return */
3686 * md_estimate_size_before_relax()
3688 * Called just before relax().
3689 * Any symbol that is now undefined will not become defined.
3690 * Return the correct fr_subtype in the frag.
3691 * Return the initial "guess for fr_var" to caller.
3692 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3693 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3694 * Although it may not be explicit in the frag, pretend fr_var starts with a
3698 md_estimate_size_before_relax (fragP
, segment
)
3699 register fragS
*fragP
;
3700 register segT segment
;
3702 register unsigned char *opcode
;
3703 register int old_fr_fix
;
3705 old_fr_fix
= fragP
->fr_fix
;
3706 opcode
= (unsigned char *) fragP
->fr_opcode
;
3707 /* We've already got fragP->fr_subtype right; all we have to do is
3708 check for un-relaxable symbols. */
3709 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
3711 /* symbol is undefined in this segment */
3712 int code16
= fragP
->fr_subtype
& CODE16
;
3713 int size
= code16
? 2 : 4;
3714 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
3718 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
3719 opcode
[0] = 0xe9; /* dword disp jmp */
3720 fragP
->fr_fix
+= size
;
3721 fix_new (fragP
, old_fr_fix
, size
,
3723 fragP
->fr_offset
, 1,
3724 (GOT_symbol
&& /* Not quite right - we should switch on
3725 presence of @PLT, but I cannot see how
3726 to get to that from here. We should have
3727 done this in md_assemble to really
3728 get it right all of the time, but I
3729 think it does not matter that much, as
3730 this will be right most of the time. ERY*/
3731 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3732 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3736 /* This changes the byte-displacement jump 0x7N -->
3737 the dword-displacement jump 0x0f8N */
3738 opcode
[1] = opcode
[0] + 0x10;
3739 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
3740 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
3741 fix_new (fragP
, old_fr_fix
+ 1, size
,
3743 fragP
->fr_offset
, 1,
3744 (GOT_symbol
&& /* Not quite right - we should switch on
3745 presence of @PLT, but I cannot see how
3746 to get to that from here. ERY */
3747 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3748 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3753 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
3754 } /* md_estimate_size_before_relax() */
3757 * md_convert_frag();
3759 * Called after relax() is finished.
3760 * In: Address of frag.
3761 * fr_type == rs_machine_dependent.
3762 * fr_subtype is what the address relaxed to.
3764 * Out: Any fixSs and constants are set up.
3765 * Caller will turn frag into a ".space 0".
3767 #ifndef BFD_ASSEMBLER
3769 md_convert_frag (headers
, sec
, fragP
)
3770 object_headers
*headers
;
3772 register fragS
*fragP
;
3775 md_convert_frag (abfd
, sec
, fragP
)
3778 register fragS
*fragP
;
3781 register unsigned char *opcode
;
3782 unsigned char *where_to_put_displacement
= NULL
;
3783 unsigned int target_address
;
3784 unsigned int opcode_address
;
3785 unsigned int extension
= 0;
3786 int displacement_from_opcode_start
;
3788 opcode
= (unsigned char *) fragP
->fr_opcode
;
3790 /* Address we want to reach in file space. */
3791 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
3792 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3793 target_address
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
3796 /* Address opcode resides at in file space. */
3797 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
3799 /* Displacement from opcode start to fill into instruction. */
3800 displacement_from_opcode_start
= target_address
- opcode_address
;
3802 switch (fragP
->fr_subtype
)
3804 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
3805 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
3806 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
3807 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
3808 /* don't have to change opcode */
3809 extension
= 1; /* 1 opcode + 1 displacement */
3810 where_to_put_displacement
= &opcode
[1];
3813 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3814 extension
= 5; /* 2 opcode + 4 displacement */
3815 opcode
[1] = opcode
[0] + 0x10;
3816 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3817 where_to_put_displacement
= &opcode
[2];
3820 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3821 extension
= 4; /* 1 opcode + 4 displacement */
3823 where_to_put_displacement
= &opcode
[1];
3826 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3827 extension
= 3; /* 2 opcode + 2 displacement */
3828 opcode
[1] = opcode
[0] + 0x10;
3829 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3830 where_to_put_displacement
= &opcode
[2];
3833 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3834 extension
= 2; /* 1 opcode + 2 displacement */
3836 where_to_put_displacement
= &opcode
[1];
3840 BAD_CASE (fragP
->fr_subtype
);
3843 /* now put displacement after opcode */
3844 md_number_to_chars ((char *) where_to_put_displacement
,
3845 (valueT
) (displacement_from_opcode_start
- extension
),
3846 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3847 fragP
->fr_fix
+= extension
;
3851 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3852 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3853 const int md_reloc_size
= 8; /* Size of relocation record */
3856 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3858 addressT from_addr
, to_addr
;
3864 offset
= to_addr
- (from_addr
+ 2);
3865 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3866 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3870 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3872 addressT from_addr
, to_addr
;
3878 if (flag_do_long_jump
)
3880 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3881 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3882 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3883 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3884 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3888 offset
= to_addr
- (from_addr
+ 5);
3889 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3890 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3894 /* Apply a fixup (fixS) to segment data, once it has been determined
3895 by our caller that we have all the info we need to fix it up.
3897 On the 386, immediates, displacements, and data pointers are all in
3898 the same (little-endian) format, so we don't need to care about which
3902 md_apply_fix3 (fixP
, valp
, seg
)
3903 fixS
*fixP
; /* The fix we're to put in. */
3904 valueT
*valp
; /* Pointer to the value of the bits. */
3905 segT seg
; /* Segment fix is from. */
3907 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3908 valueT value
= *valp
;
3910 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3913 switch (fixP
->fx_r_type
)
3916 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3919 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
3922 fixP
->fx_r_type
= BFD_RELOC_8_PCREL
;
3928 * This is a hack. There should be a better way to
3931 if ((fixP
->fx_r_type
== BFD_RELOC_32_PCREL
3932 || fixP
->fx_r_type
== BFD_RELOC_16_PCREL
3933 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
)
3937 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3939 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3942 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3944 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3945 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3946 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
3947 || symbol_section_p (fixP
->fx_addsy
))
3948 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3949 && ! S_IS_WEAK (fixP
->fx_addsy
)
3950 && S_IS_DEFINED (fixP
->fx_addsy
)
3951 && ! S_IS_COMMON (fixP
->fx_addsy
))
3953 /* Yes, we add the values in twice. This is because
3954 bfd_perform_relocation subtracts them out again. I think
3955 bfd_perform_relocation is broken, but I don't dare change
3957 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3960 #if defined (OBJ_COFF) && defined (TE_PE)
3961 /* For some reason, the PE format does not store a section
3962 address offset for a PC relative symbol. */
3963 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3964 value
+= md_pcrel_from (fixP
);
3968 /* Fix a few things - the dynamic linker expects certain values here,
3969 and we must not dissappoint it. */
3970 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3971 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3973 switch (fixP
->fx_r_type
) {
3974 case BFD_RELOC_386_PLT32
:
3975 /* Make the jump instruction point to the address of the operand. At
3976 runtime we merely add the offset to the actual PLT entry. */
3979 case BFD_RELOC_386_GOTPC
:
3981 * This is tough to explain. We end up with this one if we have
3982 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3983 * here is to obtain the absolute address of the GOT, and it is strongly
3984 * preferable from a performance point of view to avoid using a runtime
3985 * relocation for this. The actual sequence of instructions often look
3991 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3993 * The call and pop essentially return the absolute address of
3994 * the label .L66 and store it in %ebx. The linker itself will
3995 * ultimately change the first operand of the addl so that %ebx points to
3996 * the GOT, but to keep things simple, the .o file must have this operand
3997 * set so that it generates not the absolute address of .L66, but the
3998 * absolute address of itself. This allows the linker itself simply
3999 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
4000 * added in, and the addend of the relocation is stored in the operand
4001 * field for the instruction itself.
4003 * Our job here is to fix the operand so that it would add the correct
4004 * offset so that %ebx would point to itself. The thing that is tricky is
4005 * that .-.L66 will point to the beginning of the instruction, so we need
4006 * to further modify the operand so that it will point to itself.
4007 * There are other cases where you have something like:
4009 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
4011 * and here no correction would be required. Internally in the assembler
4012 * we treat operands of this form as not being pcrel since the '.' is
4013 * explicitly mentioned, and I wonder whether it would simplify matters
4014 * to do it this way. Who knows. In earlier versions of the PIC patches,
4015 * the pcrel_adjust field was used to store the correction, but since the
4016 * expression is not pcrel, I felt it would be confusing to do it this way.
4020 case BFD_RELOC_386_GOT32
:
4021 value
= 0; /* Fully resolved at runtime. No addend. */
4023 case BFD_RELOC_386_GOTOFF
:
4026 case BFD_RELOC_VTABLE_INHERIT
:
4027 case BFD_RELOC_VTABLE_ENTRY
:
4034 #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
4036 #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
4037 md_number_to_chars (p
, value
, fixP
->fx_size
);
4043 /* This is never used. */
4044 long /* Knows about the byte order in a word. */
4045 md_chars_to_number (con
, nbytes
)
4046 unsigned char con
[]; /* Low order byte 1st. */
4047 int nbytes
; /* Number of bytes in the input. */
4050 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
4052 retval
<<= BITS_PER_CHAR
;
4060 #define MAX_LITTLENUMS 6
4062 /* Turn the string pointed to by litP into a floating point constant of type
4063 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
4064 is stored in *sizeP . An error message is returned, or NULL on OK. */
4066 md_atof (type
, litP
, sizeP
)
4072 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4073 LITTLENUM_TYPE
*wordP
;
4095 return _("Bad call to md_atof ()");
4097 t
= atof_ieee (input_line_pointer
, type
, words
);
4099 input_line_pointer
= t
;
4101 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4102 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4103 the bigendian 386. */
4104 for (wordP
= words
+ prec
- 1; prec
--;)
4106 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
4107 litP
+= sizeof (LITTLENUM_TYPE
);
4112 char output_invalid_buf
[8];
4114 static char * output_invalid
PARAMS ((int));
4121 sprintf (output_invalid_buf
, "'%c'", c
);
4123 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
4124 return output_invalid_buf
;
4127 /* REG_STRING starts *before* REGISTER_PREFIX. */
4129 static const reg_entry
* parse_register
PARAMS ((char *, char **));
4131 static const reg_entry
*
4132 parse_register (reg_string
, end_op
)
4136 register char *s
= reg_string
;
4138 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
4141 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4142 if (*s
== REGISTER_PREFIX
)
4145 if (is_space_char (*s
))
4149 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
4151 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
4153 if (!allow_naked_reg
)
4156 as_bad (_("bad register name `%s'"), reg_name_given
);
4158 return (const reg_entry
*) NULL
;
4164 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
4168 if (!allow_naked_reg
)
4169 as_bad (_("bad register name `%s'"), reg_name_given
);
4170 return (const reg_entry
*) NULL
;
4177 CONST
char *md_shortopts
= "kmVQ:";
4179 CONST
char *md_shortopts
= "m";
4181 struct option md_longopts
[] = {
4182 {NULL
, no_argument
, NULL
, 0}
4184 size_t md_longopts_size
= sizeof (md_longopts
);
4187 md_parse_option (c
, arg
)
4194 flag_do_long_jump
= 1;
4197 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4198 /* -k: Ignore for FreeBSD compatibility. */
4202 /* -V: SVR4 argument to print version ID. */
4204 print_version_id ();
4207 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4208 should be emitted or not. FIXME: Not implemented. */
4220 md_show_usage (stream
)
4223 fprintf (stream
, _("\
4224 -m do long jump\n"));
4227 #ifdef BFD_ASSEMBLER
4228 #ifdef OBJ_MAYBE_ELF
4229 #ifdef OBJ_MAYBE_COFF
4231 /* Pick the target format to use. */
4234 i386_target_format ()
4236 switch (OUTPUT_FLAVOR
)
4238 case bfd_target_coff_flavour
:
4240 case bfd_target_elf_flavour
:
4241 return "elf32-i386";
4248 #endif /* OBJ_MAYBE_COFF */
4249 #endif /* OBJ_MAYBE_ELF */
4250 #endif /* BFD_ASSEMBLER */
4254 md_undefined_symbol (name
)
4257 if (*name
== '_' && *(name
+1) == 'G'
4258 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4262 if (symbol_find (name
))
4263 as_bad (_("GOT already in symbol table"));
4264 GOT_symbol
= symbol_new (name
, undefined_section
,
4265 (valueT
) 0, &zero_address_frag
);
4272 /* Round up a section size to the appropriate boundary. */
4274 md_section_align (segment
, size
)
4279 #ifdef BFD_ASSEMBLER
4280 /* For a.out, force the section size to be aligned. If we don't do
4281 this, BFD will align it for us, but it will not write out the
4282 final bytes of the section. This may be a bug in BFD, but it is
4283 easier to fix it here since that is how the other a.out targets
4287 align
= bfd_get_section_alignment (stdoutput
, segment
);
4288 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4295 /* On the i386, PC-relative offsets are relative to the start of the
4296 next instruction. That is, the address of the offset, plus its
4297 size, since the offset is always the last part of the insn. */
4300 md_pcrel_from (fixP
)
4303 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4314 temp
= get_absolute_expression ();
4315 subseg_set (bss_section
, (subsegT
) temp
);
4316 demand_empty_rest_of_line ();
4322 #ifdef BFD_ASSEMBLER
4325 i386_validate_fix (fixp
)
4328 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
4330 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
4336 tc_gen_reloc (section
, fixp
)
4341 bfd_reloc_code_real_type code
;
4343 switch (fixp
->fx_r_type
)
4345 case BFD_RELOC_386_PLT32
:
4346 case BFD_RELOC_386_GOT32
:
4347 case BFD_RELOC_386_GOTOFF
:
4348 case BFD_RELOC_386_GOTPC
:
4350 case BFD_RELOC_VTABLE_ENTRY
:
4351 case BFD_RELOC_VTABLE_INHERIT
:
4352 code
= fixp
->fx_r_type
;
4357 switch (fixp
->fx_size
)
4360 as_bad (_("Can not do %d byte pc-relative relocation"),
4362 code
= BFD_RELOC_32_PCREL
;
4364 case 1: code
= BFD_RELOC_8_PCREL
; break;
4365 case 2: code
= BFD_RELOC_16_PCREL
; break;
4366 case 4: code
= BFD_RELOC_32_PCREL
; break;
4371 switch (fixp
->fx_size
)
4374 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
4375 code
= BFD_RELOC_32
;
4377 case 1: code
= BFD_RELOC_8
; break;
4378 case 2: code
= BFD_RELOC_16
; break;
4379 case 4: code
= BFD_RELOC_32
; break;
4385 if (code
== BFD_RELOC_32
4387 && fixp
->fx_addsy
== GOT_symbol
)
4388 code
= BFD_RELOC_386_GOTPC
;
4390 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4391 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4392 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4394 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4395 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4396 vtable entry to be used in the relocation's section offset. */
4397 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4398 rel
->address
= fixp
->fx_offset
;
4401 rel
->addend
= fixp
->fx_addnumber
;
4405 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4406 if (rel
->howto
== NULL
)
4408 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4409 _("Cannot represent relocation type %s"),
4410 bfd_get_reloc_code_name (code
));
4411 /* Set howto to a garbage value so that we can keep going. */
4412 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4413 assert (rel
->howto
!= NULL
);
4419 #else /* ! BFD_ASSEMBLER */
4421 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4423 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4426 relax_addressT segment_address_in_file
;
4429 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4430 * Out: GNU LD relocation length code: 0, 1, or 2.
4433 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4436 know (fixP
->fx_addsy
!= NULL
);
4438 md_number_to_chars (where
,
4439 (valueT
) (fixP
->fx_frag
->fr_address
4440 + fixP
->fx_where
- segment_address_in_file
),
4443 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4444 ? S_GET_TYPE (fixP
->fx_addsy
)
4445 : fixP
->fx_addsy
->sy_number
);
4447 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
4448 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4449 where
[4] = r_symbolnum
& 0x0ff;
4450 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
4451 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
4452 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
4455 #endif /* OBJ_AOUT or OBJ_BOUT */
4457 #if defined (I386COFF)
4460 tc_coff_fix2rtype (fixP
)
4463 if (fixP
->fx_r_type
== R_IMAGEBASE
)
4466 return (fixP
->fx_pcrel
?
4467 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
4468 fixP
->fx_size
== 2 ? R_PCRWORD
:
4470 (fixP
->fx_size
== 1 ? R_RELBYTE
:
4471 fixP
->fx_size
== 2 ? R_RELWORD
:
4476 tc_coff_sizemachdep (frag
)
4480 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
4485 #endif /* I386COFF */
4487 #endif /* ! BFD_ASSEMBLER */
4489 /* end of tc-i386.c */