1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 1998
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef SCALE1_WHEN_NO_INDEX
44 /* Specifying a scale factor besides 1 when there is no index is
45 futile. eg. `mov (%ebx,2),%al' does exactly the same as
46 `mov (%ebx),%al'. To slavishly follow what the programmer
47 specified, set SCALE1_WHEN_NO_INDEX to 0. */
48 #define SCALE1_WHEN_NO_INDEX 1
51 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
52 static int fits_in_signed_byte
PARAMS ((long));
53 static int fits_in_unsigned_byte
PARAMS ((long));
54 static int fits_in_unsigned_word
PARAMS ((long));
55 static int fits_in_signed_word
PARAMS ((long));
56 static int smallest_imm_type
PARAMS ((long));
57 static int add_prefix
PARAMS ((unsigned int));
58 static void set_16bit_code_flag
PARAMS ((int));
60 static bfd_reloc_code_real_type reloc
61 PARAMS ((int, int, bfd_reloc_code_real_type
));
64 /* 'md_assemble ()' gathers together information and puts it into a
69 /* TM holds the template for the insn were currently assembling. */
72 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
75 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
77 /* OPERANDS gives the number of given operands. */
78 unsigned int operands
;
80 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
81 of given register, displacement, memory operands and immediate
83 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
85 /* TYPES [i] is the type (see above #defines) which tells us how to
86 search through DISPS [i] & IMMS [i] & REGS [i] for the required
88 unsigned int types
[MAX_OPERANDS
];
90 /* Displacements (if given) for each operand. */
91 expressionS
*disps
[MAX_OPERANDS
];
93 /* Relocation type for operand */
95 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
97 int disp_reloc
[MAX_OPERANDS
];
100 /* Immediate operands (if given) for each operand. */
101 expressionS
*imms
[MAX_OPERANDS
];
103 /* Register operands (if given) for each operand. */
104 const reg_entry
*regs
[MAX_OPERANDS
];
106 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
107 the base index byte below. */
108 const reg_entry
*base_reg
;
109 const reg_entry
*index_reg
;
110 unsigned int log2_scale_factor
;
112 /* SEG gives the seg_entries of this insn. They are zero unless
113 explicit segment overrides are given. */
114 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
116 /* PREFIX holds all the given prefix opcodes (usually null).
117 PREFIXES is the number of prefix opcodes. */
118 unsigned int prefixes
;
119 unsigned char prefix
[MAX_PREFIXES
];
121 /* RM and SIB are the modrm byte and the sib byte where the
122 addressing modes of this insn are encoded. */
128 typedef struct _i386_insn i386_insn
;
130 /* List of chars besides those in app.c:symbol_chars that can start an
131 operand. Used to prevent the scrubber eating vital white-space. */
133 const char extra_symbol_chars
[] = "*%-(@";
135 const char extra_symbol_chars
[] = "*%-(";
138 /* This array holds the chars that always start a comment. If the
139 pre-processor is disabled, these aren't very useful */
140 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
141 /* Putting '/' here makes it impossible to use the divide operator.
142 However, we need it for compatibility with SVR4 systems. */
143 const char comment_chars
[] = "#/";
144 #define PREFIX_SEPARATOR '\\'
146 const char comment_chars
[] = "#";
147 #define PREFIX_SEPARATOR '/'
150 /* This array holds the chars that only start a comment at the beginning of
151 a line. If the line seems to have the form '# 123 filename'
152 .line and .file directives will appear in the pre-processed output */
153 /* Note that input_file.c hand checks for '#' at the beginning of the
154 first line of the input file. This is because the compiler outputs
155 #NO_APP at the beginning of its output. */
156 /* Also note that comments started like this one will always work if
157 '/' isn't otherwise defined. */
158 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
159 const char line_comment_chars
[] = "";
161 const char line_comment_chars
[] = "/";
164 const char line_separator_chars
[] = "";
166 /* Chars that can be used to separate mant from exp in floating point nums */
167 const char EXP_CHARS
[] = "eE";
169 /* Chars that mean this number is a floating point constant */
172 const char FLT_CHARS
[] = "fFdDxX";
174 /* tables for lexical analysis */
175 static char opcode_chars
[256];
176 static char register_chars
[256];
177 static char operand_chars
[256];
178 static char identifier_chars
[256];
179 static char digit_chars
[256];
182 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
183 #define is_operand_char(x) (operand_chars[(unsigned char) x])
184 #define is_register_char(x) (register_chars[(unsigned char) x])
185 #define is_space_char(x) ((x) == ' ')
186 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
187 #define is_digit_char(x) (digit_chars[(unsigned char) x])
189 /* put here all non-digit non-letter charcters that may occur in an operand */
190 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
192 /* md_assemble() always leaves the strings it's passed unaltered. To
193 effect this we maintain a stack of saved characters that we've smashed
194 with '\0's (indicating end of strings for various sub-fields of the
195 assembler instruction). */
196 static char save_stack
[32];
197 static char *save_stack_p
; /* stack pointer */
198 #define END_STRING_AND_SAVE(s) \
199 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
200 #define RESTORE_END_STRING(s) \
201 do { *(s) = *--save_stack_p; } while (0)
203 /* The instruction we're assembling. */
206 /* Possible templates for current insn. */
207 static const templates
*current_templates
;
209 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
210 static expressionS disp_expressions
[2], im_expressions
[2];
212 static int this_operand
; /* current operand we are working on */
214 static int flag_do_long_jump
; /* FIXME what does this do? */
216 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
218 /* Interface to relax_segment.
219 There are 2 relax states for 386 jump insns: one for conditional &
220 one for unconditional jumps. This is because the these two types
221 of jumps add different sizes to frags when we're figuring out what
222 sort of jump to choose to reach a given label. */
225 #define COND_JUMP 1 /* conditional jump */
226 #define UNCOND_JUMP 2 /* unconditional jump */
230 #define SMALL16 (SMALL|CODE16)
232 #define BIG16 (BIG|CODE16)
236 #define INLINE __inline__
242 #define ENCODE_RELAX_STATE(type,size) \
243 ((relax_substateT)((type<<2) | (size)))
244 #define SIZE_FROM_RELAX_STATE(s) \
245 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
247 /* This table is used by relax_frag to promote short jumps to long
248 ones where necessary. SMALL (short) jumps may be promoted to BIG
249 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
250 don't allow a short jump in a 32 bit code segment to be promoted to
251 a 16 bit offset jump because it's slower (requires data size
252 prefix), and doesn't work, unless the destination is in the bottom
253 64k of the code segment (The top 16 bits of eip are zeroed). */
255 const relax_typeS md_relax_table
[] =
258 1) most positive reach of this state,
259 2) most negative reach of this state,
260 3) how many bytes this mode will add to the size of the current frag
261 4) which index into the table to try if we can't fit into this one.
268 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
269 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
270 /* dword conditionals adds 4 bytes to frag:
271 1 extra opcode byte, 3 extra displacement bytes. */
273 /* word conditionals add 2 bytes to frag:
274 1 extra opcode byte, 1 extra displacement byte. */
277 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
278 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
279 /* dword jmp adds 3 bytes to frag:
280 0 extra opcode bytes, 3 extra displacement bytes. */
282 /* word jmp adds 1 byte to frag:
283 0 extra opcode bytes, 1 extra displacement byte. */
290 i386_align_code (fragP
, count
)
294 /* Various efficient no-op patterns for aligning code labels. */
295 /* Note: Don't try to assemble the instructions in the comments. */
296 /* 0L and 0w are not legal */
297 static const char f32_1
[] =
299 static const char f32_2
[] =
300 {0x89,0xf6}; /* movl %esi,%esi */
301 static const char f32_3
[] =
302 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
303 static const char f32_4
[] =
304 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
305 static const char f32_5
[] =
307 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
308 static const char f32_6
[] =
309 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
310 static const char f32_7
[] =
311 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
312 static const char f32_8
[] =
314 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
315 static const char f32_9
[] =
316 {0x89,0xf6, /* movl %esi,%esi */
317 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
318 static const char f32_10
[] =
319 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
320 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
321 static const char f32_11
[] =
322 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
323 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
324 static const char f32_12
[] =
325 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
326 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
327 static const char f32_13
[] =
328 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
329 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
330 static const char f32_14
[] =
331 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
332 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
333 static const char f32_15
[] =
334 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
335 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
336 static const char f16_4
[] =
337 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
338 static const char f16_5
[] =
340 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
341 static const char f16_6
[] =
342 {0x89,0xf6, /* mov %si,%si */
343 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
344 static const char f16_7
[] =
345 {0x8d,0x74,0x00, /* lea 0(%si),%si */
346 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
347 static const char f16_8
[] =
348 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
349 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
350 static const char *const f32_patt
[] = {
351 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
352 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
354 static const char *const f16_patt
[] = {
355 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
356 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
359 if (count
> 0 && count
<= 15)
363 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
364 f16_patt
[count
- 1], count
);
365 if (count
> 8) /* adjust jump offset */
366 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
369 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
370 f32_patt
[count
- 1], count
);
371 fragP
->fr_var
= count
;
375 static char *output_invalid
PARAMS ((int c
));
376 static int i386_operand
PARAMS ((char *operand_string
));
377 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
380 static void s_bss
PARAMS ((int));
383 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
385 static INLINE
unsigned int
386 mode_from_disp_size (t
)
389 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
393 fits_in_signed_byte (num
)
396 return (num
>= -128) && (num
<= 127);
397 } /* fits_in_signed_byte() */
400 fits_in_unsigned_byte (num
)
403 return (num
& 0xff) == num
;
404 } /* fits_in_unsigned_byte() */
407 fits_in_unsigned_word (num
)
410 return (num
& 0xffff) == num
;
411 } /* fits_in_unsigned_word() */
414 fits_in_signed_word (num
)
417 return (-32768 <= num
) && (num
<= 32767);
418 } /* fits_in_signed_word() */
421 smallest_imm_type (num
)
425 /* This code is disabled because all the Imm1 forms in the opcode table
426 are slower on the i486, and they're the versions with the implicitly
427 specified single-position displacement, which has another syntax if
428 you really want to use that form. If you really prefer to have the
429 one-byte-shorter Imm1 form despite these problems, re-enable this
432 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
434 return (fits_in_signed_byte (num
)
435 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
436 : fits_in_unsigned_byte (num
)
437 ? (Imm8
| Imm16
| Imm32
)
438 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
441 } /* smallest_imm_type() */
443 /* Returns 0 if attempting to add a prefix where one from the same
444 class already exists, 1 if non rep/repne added, 2 if rep/repne
458 case CS_PREFIX_OPCODE
:
459 case DS_PREFIX_OPCODE
:
460 case ES_PREFIX_OPCODE
:
461 case FS_PREFIX_OPCODE
:
462 case GS_PREFIX_OPCODE
:
463 case SS_PREFIX_OPCODE
:
467 case REPNE_PREFIX_OPCODE
:
468 case REPE_PREFIX_OPCODE
:
471 case LOCK_PREFIX_OPCODE
:
479 case ADDR_PREFIX_OPCODE
:
483 case DATA_PREFIX_OPCODE
:
490 as_bad (_("same type of prefix used twice"));
495 i
.prefix
[q
] = prefix
;
500 set_16bit_code_flag (new_16bit_code_flag
)
501 int new_16bit_code_flag
;
503 flag_16bit_code
= new_16bit_code_flag
;
506 const pseudo_typeS md_pseudo_table
[] =
511 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
512 {"align", s_align_bytes
, 0},
514 {"align", s_align_ptwo
, 0},
516 {"ffloat", float_cons
, 'f'},
517 {"dfloat", float_cons
, 'd'},
518 {"tfloat", float_cons
, 'x'},
520 {"noopt", s_ignore
, 0},
521 {"optim", s_ignore
, 0},
522 {"code16", set_16bit_code_flag
, 1},
523 {"code32", set_16bit_code_flag
, 0},
527 /* for interface with expression () */
528 extern char *input_line_pointer
;
530 /* hash table for opcode lookup */
531 static struct hash_control
*op_hash
;
532 /* hash table for register lookup */
533 static struct hash_control
*reg_hash
;
539 const char *hash_err
;
541 /* initialize op_hash hash table */
542 op_hash
= hash_new ();
545 register const template *optab
;
546 register templates
*core_optab
;
548 optab
= i386_optab
; /* setup for loop */
549 core_optab
= (templates
*) xmalloc (sizeof (templates
));
550 core_optab
->start
= optab
;
555 if (optab
->name
== NULL
556 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
558 /* different name --> ship out current template list;
559 add to hash table; & begin anew */
560 core_optab
->end
= optab
;
561 hash_err
= hash_insert (op_hash
,
567 as_fatal (_("Internal Error: Can't hash %s: %s"),
571 if (optab
->name
== NULL
)
573 core_optab
= (templates
*) xmalloc (sizeof (templates
));
574 core_optab
->start
= optab
;
579 /* initialize reg_hash hash table */
580 reg_hash
= hash_new ();
582 register const reg_entry
*regtab
;
584 for (regtab
= i386_regtab
;
585 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
588 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
594 /* fill in lexical tables: opcode_chars, operand_chars. */
599 for (c
= 0; c
< 256; c
++)
605 register_chars
[c
] = c
;
606 operand_chars
[c
] = c
;
608 else if (islower (c
))
611 register_chars
[c
] = c
;
612 operand_chars
[c
] = c
;
614 else if (isupper (c
))
616 opcode_chars
[c
] = tolower (c
);
617 register_chars
[c
] = opcode_chars
[c
];
618 operand_chars
[c
] = c
;
621 if (isalpha (c
) || isdigit (c
))
622 identifier_chars
[c
] = c
;
626 identifier_chars
['@'] = '@';
628 register_chars
[')'] = ')';
629 register_chars
['('] = '(';
630 digit_chars
['-'] = '-';
631 identifier_chars
['_'] = '_';
632 identifier_chars
['.'] = '.';
634 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
635 operand_chars
[(unsigned char) *p
] = *p
;
638 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
639 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
641 record_alignment (text_section
, 2);
642 record_alignment (data_section
, 2);
643 record_alignment (bss_section
, 2);
649 i386_print_statistics (file
)
652 hash_print_statistics (file
, "i386 opcode", op_hash
);
653 hash_print_statistics (file
, "i386 register", reg_hash
);
659 /* debugging routines for md_assemble */
660 static void pi
PARAMS ((char *, i386_insn
*));
661 static void pte
PARAMS ((template *));
662 static void pt
PARAMS ((unsigned int));
663 static void pe
PARAMS ((expressionS
*));
664 static void ps
PARAMS ((symbolS
*));
671 register template *p
;
674 fprintf (stdout
, "%s: template ", line
);
676 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
677 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
678 fprintf (stdout
, " base %x index %x scale %x\n",
679 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
680 for (i
= 0; i
< x
->operands
; i
++)
682 fprintf (stdout
, " #%d: ", i
+ 1);
684 fprintf (stdout
, "\n");
686 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
687 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
688 if (x
->types
[i
] & Imm
)
690 if (x
->types
[i
] & Disp
)
700 fprintf (stdout
, " %d operands ", t
->operands
);
701 fprintf (stdout
, "opcode %x ",
703 if (t
->extension_opcode
!= None
)
704 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
705 if (t
->opcode_modifier
& D
)
706 fprintf (stdout
, "D");
707 if (t
->opcode_modifier
& W
)
708 fprintf (stdout
, "W");
709 fprintf (stdout
, "\n");
710 for (i
= 0; i
< t
->operands
; i
++)
712 fprintf (stdout
, " #%d type ", i
+ 1);
713 pt (t
->operand_types
[i
]);
714 fprintf (stdout
, "\n");
722 fprintf (stdout
, " operation %d\n", e
->X_op
);
723 fprintf (stdout
, " add_number %d (%x)\n",
724 e
->X_add_number
, e
->X_add_number
);
727 fprintf (stdout
, " add_symbol ");
728 ps (e
->X_add_symbol
);
729 fprintf (stdout
, "\n");
733 fprintf (stdout
, " op_symbol ");
735 fprintf (stdout
, "\n");
743 fprintf (stdout
, "%s type %s%s",
745 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
746 segment_name (S_GET_SEGMENT (s
)));
765 { BaseIndex
, "BaseIndex" },
769 { InOutPortReg
, "InOutPortReg" },
770 { ShiftCount
, "ShiftCount" },
771 { Control
, "control reg" },
772 { Test
, "test reg" },
773 { Debug
, "debug reg" },
774 { FloatReg
, "FReg" },
775 { FloatAcc
, "FAcc" },
779 { JumpAbsolute
, "Jump Absolute" },
789 register struct type_name
*ty
;
793 fprintf (stdout
, _("Unknown"));
797 for (ty
= type_names
; ty
->mask
; ty
++)
799 fprintf (stdout
, "%s, ", ty
->tname
);
804 #endif /* DEBUG386 */
807 static bfd_reloc_code_real_type
808 reloc (size
, pcrel
, other
)
811 bfd_reloc_code_real_type other
;
813 if (other
!= NO_RELOC
) return other
;
819 case 1: return BFD_RELOC_8_PCREL
;
820 case 2: return BFD_RELOC_16_PCREL
;
821 case 4: return BFD_RELOC_32_PCREL
;
823 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
829 case 1: return BFD_RELOC_8
;
830 case 2: return BFD_RELOC_16
;
831 case 4: return BFD_RELOC_32
;
833 as_bad (_("Can not do %d byte relocation"), size
);
836 return BFD_RELOC_NONE
;
840 * Here we decide which fixups can be adjusted to make them relative to
841 * the beginning of the section instead of the symbol. Basically we need
842 * to make sure that the dynamic relocations are done correctly, so in
843 * some cases we force the original symbol to be used.
846 tc_i386_fix_adjustable(fixP
)
850 /* Prevent all adjustments to global symbols. */
851 if (S_IS_EXTERN (fixP
->fx_addsy
))
853 if (S_IS_WEAK (fixP
->fx_addsy
))
855 #endif /* ! defined (OBJ_AOUT) */
856 /* adjust_reloc_syms doesn't know about the GOT */
857 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
858 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
859 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
)
864 #define reloc(SIZE,PCREL,OTHER) 0
865 #define BFD_RELOC_16 0
866 #define BFD_RELOC_32 0
867 #define BFD_RELOC_16_PCREL 0
868 #define BFD_RELOC_32_PCREL 0
869 #define BFD_RELOC_386_PLT32 0
870 #define BFD_RELOC_386_GOT32 0
871 #define BFD_RELOC_386_GOTOFF 0
874 /* This is the guts of the machine-dependent assembler. LINE points to a
875 machine dependent instruction. This function is supposed to emit
876 the frags/bytes it assembles to. */
882 /* Points to template once we've found it. */
885 /* Count the size of the instruction generated. */
890 /* Initialize globals. */
891 memset (&i
, '\0', sizeof (i
));
892 for (j
= 0; j
< MAX_OPERANDS
; j
++)
893 i
.disp_reloc
[j
] = NO_RELOC
;
894 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
895 memset (im_expressions
, '\0', sizeof (im_expressions
));
896 save_stack_p
= save_stack
; /* reset stack pointer */
898 /* First parse an opcode & call i386_operand for the operands.
899 We assume that the scrubber has arranged it so that line[0] is the valid
900 start of a (possibly prefixed) opcode. */
902 char opcode
[MAX_OPCODE_SIZE
];
904 char *token_start
= l
;
907 /* Non-zero if we found a prefix only acceptable with string insns. */
908 const char *expecting_string_instruction
= NULL
;
913 while ((*opp
= opcode_chars
[(unsigned char) *l
]) != 0)
916 if (opp
>= opcode
+ sizeof (opcode
))
918 as_bad (_("no such 386 instruction: `%s'"), token_start
);
923 if (!is_space_char (*l
)
925 && *l
!= PREFIX_SEPARATOR
)
927 as_bad (_("invalid character %s in opcode"),
928 output_invalid (*l
));
931 if (token_start
== l
)
933 if (*l
== PREFIX_SEPARATOR
)
934 as_bad (_("expecting prefix; got nothing"));
936 as_bad (_("expecting opcode; got nothing"));
940 /* Look up instruction (or prefix) via hash table. */
941 current_templates
= hash_find (op_hash
, opcode
);
943 if (*l
!= END_OF_INSN
944 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
946 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
948 /* If we are in 16-bit mode, do not allow addr16 or data16.
949 Similarly, in 32-bit mode, do not allow addr32 or data32. */
950 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
951 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
954 as_bad (_("redundant %s prefix"),
955 current_templates
->start
->name
);
958 /* Add prefix, checking for repeated prefixes. */
959 switch (add_prefix (current_templates
->start
->base_opcode
))
964 expecting_string_instruction
=
965 current_templates
->start
->name
;
968 /* Skip past PREFIX_SEPARATOR and reset token_start. */
975 if (!current_templates
)
977 /* See if we can get a match by trimming off a suffix. */
980 case DWORD_OPCODE_SUFFIX
:
981 case WORD_OPCODE_SUFFIX
:
982 case BYTE_OPCODE_SUFFIX
:
983 case SHORT_OPCODE_SUFFIX
:
984 #if LONG_OPCODE_SUFFIX != DWORD_OPCODE_SUFFIX
985 case LONG_OPCODE_SUFFIX
:
989 current_templates
= hash_find (op_hash
, opcode
);
991 if (!current_templates
)
993 as_bad (_("no such 386 instruction: `%s'"), token_start
);
998 /* check for rep/repne without a string instruction */
999 if (expecting_string_instruction
1000 && !(current_templates
->start
->opcode_modifier
& IsString
))
1002 as_bad (_("expecting string instruction after `%s'"),
1003 expecting_string_instruction
);
1007 /* There may be operands to parse. */
1008 if (*l
!= END_OF_INSN
)
1010 /* parse operands */
1012 /* 1 if operand is pending after ','. */
1013 unsigned int expecting_operand
= 0;
1015 /* Non-zero if operand parens not balanced. */
1016 unsigned int paren_not_balanced
;
1020 /* skip optional white space before operand */
1021 if (is_space_char (*l
))
1023 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1025 as_bad (_("invalid character %s before operand %d"),
1026 output_invalid (*l
),
1030 token_start
= l
; /* after white space */
1031 paren_not_balanced
= 0;
1032 while (paren_not_balanced
|| *l
!= ',')
1034 if (*l
== END_OF_INSN
)
1036 if (paren_not_balanced
)
1038 as_bad (_("unbalanced parenthesis in operand %d."),
1043 break; /* we are done */
1045 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1047 as_bad (_("invalid character %s in operand %d"),
1048 output_invalid (*l
),
1053 ++paren_not_balanced
;
1055 --paren_not_balanced
;
1058 if (l
!= token_start
)
1059 { /* yes, we've read in another operand */
1060 unsigned int operand_ok
;
1061 this_operand
= i
.operands
++;
1062 if (i
.operands
> MAX_OPERANDS
)
1064 as_bad (_("spurious operands; (%d operands/instruction max)"),
1068 /* now parse operand adding info to 'i' as we go along */
1069 END_STRING_AND_SAVE (l
);
1070 operand_ok
= i386_operand (token_start
);
1071 RESTORE_END_STRING (l
); /* restore old contents */
1077 if (expecting_operand
)
1079 expecting_operand_after_comma
:
1080 as_bad (_("expecting operand after ','; got nothing"));
1085 as_bad (_("expecting operand before ','; got nothing"));
1090 /* now *l must be either ',' or END_OF_INSN */
1093 if (*++l
== END_OF_INSN
)
1094 { /* just skip it, if it's \n complain */
1095 goto expecting_operand_after_comma
;
1097 expecting_operand
= 1;
1100 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1104 /* Now we've parsed the opcode into a set of templates, and have the
1107 Next, we find a template that matches the given insn,
1108 making sure the overlap of the given operands types is consistent
1109 with the template operand types. */
1111 #define MATCH(overlap, given, template) \
1113 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1114 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1116 /* If given types r0 and r1 are registers they must be of the same type
1117 unless the expected operand type register overlap is null.
1118 Note that Acc in a template matches every size of reg. */
1119 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1120 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1121 ((g0) & Reg) == ((g1) & Reg) || \
1122 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1125 register unsigned int overlap0
, overlap1
;
1127 unsigned int overlap2
;
1128 unsigned int found_reverse_match
;
1134 found_reverse_match
= 0;
1135 suffix_check
= (i
.suffix
== BYTE_OPCODE_SUFFIX
1137 : (i
.suffix
== WORD_OPCODE_SUFFIX
1139 : (i
.suffix
== SHORT_OPCODE_SUFFIX
1141 : (i
.suffix
== LONG_OPCODE_SUFFIX
? No_lSuf
: 0))));
1143 for (t
= current_templates
->start
;
1144 t
< current_templates
->end
;
1147 /* Must have right number of operands, and must not have
1148 disallowed suffix. */
1149 if (i
.operands
!= t
->operands
|| (t
->opcode_modifier
& suffix_check
))
1151 else if (!t
->operands
)
1152 break; /* 0 operands always matches */
1154 overlap0
= i
.types
[0] & t
->operand_types
[0];
1155 switch (t
->operands
)
1158 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1163 overlap1
= i
.types
[1] & t
->operand_types
[1];
1164 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1165 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1166 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1167 t
->operand_types
[0],
1168 overlap1
, i
.types
[1],
1169 t
->operand_types
[1]))
1172 /* check if other direction is valid ... */
1173 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1176 /* try reversing direction of operands */
1177 overlap0
= i
.types
[0] & t
->operand_types
[1];
1178 overlap1
= i
.types
[1] & t
->operand_types
[0];
1179 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1180 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1181 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1182 t
->operand_types
[1],
1183 overlap1
, i
.types
[1],
1184 t
->operand_types
[0]))
1186 /* does not match either direction */
1189 /* found_reverse_match holds which of D or FloatDR
1191 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1194 /* found a forward 2 operand match here */
1195 if (t
->operands
== 3)
1197 /* Here we make use of the fact that there are no
1198 reverse match 3 operand instructions, and all 3
1199 operand instructions only need to be checked for
1200 register consistency between operands 2 and 3. */
1201 overlap2
= i
.types
[2] & t
->operand_types
[2];
1202 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1203 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1204 t
->operand_types
[1],
1205 overlap2
, i
.types
[2],
1206 t
->operand_types
[2]))
1209 /* found either forward/reverse 2 or 3 operand match here:
1210 slip through to break */
1212 break; /* we've found a match; break out of loop */
1213 } /* for (t = ... */
1214 if (t
== current_templates
->end
)
1215 { /* we found no match */
1216 as_bad (_("suffix or operands invalid for `%s'"),
1217 current_templates
->start
->name
);
1221 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1223 /* Warn them that a data or address size prefix doesn't affect
1224 assembly of the next line of code. */
1225 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1228 /* Copy the template we found. */
1230 if (found_reverse_match
)
1232 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1233 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1236 if (i
.tm
.opcode_modifier
& FWait
)
1237 if (! add_prefix (FWAIT_OPCODE
))
1240 /* Check string instruction segment overrides */
1241 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1243 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1244 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1246 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1248 as_bad (_("`%s' operand %d must use `%%es' segment"),
1253 /* There's only ever one segment override allowed per instruction.
1254 This instruction possibly has a legal segment override on the
1255 second operand, so copy the segment to where non-string
1256 instructions store it, allowing common code. */
1257 i
.seg
[0] = i
.seg
[1];
1259 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1261 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1263 as_bad (_("`%s' operand %d must use `%%es' segment"),
1271 /* If matched instruction specifies an explicit opcode suffix, use
1273 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1275 if (i
.tm
.opcode_modifier
& Size16
)
1276 i
.suffix
= WORD_OPCODE_SUFFIX
;
1278 i
.suffix
= DWORD_OPCODE_SUFFIX
;
1280 else if (i
.reg_operands
)
1282 /* If there's no opcode suffix we try to invent one based on
1283 register operands. */
1286 /* We take i.suffix from the last register operand specified,
1287 Destination register type is more significant than source
1290 for (op
= i
.operands
; --op
>= 0; )
1291 if (i
.types
[op
] & Reg
)
1293 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_OPCODE_SUFFIX
:
1294 (i
.types
[op
] & Reg16
) ? WORD_OPCODE_SUFFIX
:
1295 DWORD_OPCODE_SUFFIX
);
1299 else if (i
.suffix
== BYTE_OPCODE_SUFFIX
)
1302 for (op
= i
.operands
; --op
>= 0; )
1304 /* If this is an eight bit register, it's OK. If it's
1305 the 16 or 32 bit version of an eight bit register,
1306 we will just use the low portion, and that's OK too. */
1307 if (i
.types
[op
] & Reg8
)
1309 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1311 /* Check that the template allows eight bit regs
1312 This kills insns such as `orb $1,%edx', which
1313 maybe should be allowed. */
1314 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1318 #if REGISTER_WARNINGS
1319 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1320 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1321 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1322 i
.regs
[op
]->reg_name
,
1327 /* Any other register is bad */
1328 if (i
.types
[op
] & (Reg
| RegMMX
| Control
| Debug
| Test
1329 | FloatReg
| FloatAcc
| SReg2
| SReg3
))
1331 as_bad (_("`%%%s' not allowed with `%s%c'"),
1332 i
.regs
[op
]->reg_name
,
1339 else if (i
.suffix
== DWORD_OPCODE_SUFFIX
)
1342 for (op
= i
.operands
; --op
>= 0; )
1343 /* Reject eight bit registers, except where the template
1344 requires them. (eg. movzb) */
1345 if ((i
.types
[op
] & Reg8
) != 0
1346 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1348 as_bad (_("`%%%s' not allowed with `%s%c'"),
1349 i
.regs
[op
]->reg_name
,
1354 #if REGISTER_WARNINGS
1355 /* Warn if the e prefix on a general reg is missing. */
1356 else if ((i
.types
[op
] & Reg16
) != 0
1357 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1359 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1360 (i
.regs
[op
] + 8)->reg_name
,
1361 i
.regs
[op
]->reg_name
,
1366 else if (i
.suffix
== WORD_OPCODE_SUFFIX
)
1369 for (op
= i
.operands
; --op
>= 0; )
1370 /* Reject eight bit registers, except where the template
1371 requires them. (eg. movzb) */
1372 if ((i
.types
[op
] & Reg8
) != 0
1373 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1375 as_bad (_("`%%%s' not allowed with `%s%c'"),
1376 i
.regs
[op
]->reg_name
,
1381 #if REGISTER_WARNINGS
1382 /* Warn if the e prefix on a general reg is present. */
1383 else if ((i
.types
[op
] & Reg32
) != 0
1384 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1386 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1387 (i
.regs
[op
] - 8)->reg_name
,
1388 i
.regs
[op
]->reg_name
,
1397 /* Make still unresolved immediate matches conform to size of immediate
1398 given in i.suffix. Note: overlap2 cannot be an immediate! */
1399 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1400 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1401 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1405 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1406 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1408 else if (overlap0
== (Imm16
| Imm32
))
1411 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1415 as_bad (_("no opcode suffix given; can't determine immediate size"));
1419 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1420 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1421 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1425 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1426 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1428 else if (overlap1
== (Imm16
| Imm32
))
1431 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1435 as_bad (_("no opcode suffix given; can't determine immediate size"));
1439 assert ((overlap2
& Imm
) == 0);
1441 i
.types
[0] = overlap0
;
1442 if (overlap0
& ImplicitRegister
)
1444 if (overlap0
& Imm1
)
1445 i
.imm_operands
= 0; /* kludge for shift insns */
1447 i
.types
[1] = overlap1
;
1448 if (overlap1
& ImplicitRegister
)
1451 i
.types
[2] = overlap2
;
1452 if (overlap2
& ImplicitRegister
)
1455 /* Finalize opcode. First, we change the opcode based on the operand
1456 size given by i.suffix: we never have to change things for byte insns,
1457 or when no opcode suffix is need to size the operands. */
1459 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1461 as_bad (_("no opcode suffix given and no register operands; can't size instruction"));
1465 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1467 /* Select between byte and word/dword operations. */
1468 if (i
.tm
.opcode_modifier
& W
)
1470 if (i
.tm
.opcode_modifier
& ShortForm
)
1471 i
.tm
.base_opcode
|= 8;
1473 i
.tm
.base_opcode
|= 1;
1475 /* Now select between word & dword operations via the operand
1476 size prefix, except for instructions that will ignore this
1478 if ((i
.suffix
== DWORD_OPCODE_SUFFIX
1479 || i
.suffix
== LONG_OPCODE_SUFFIX
) == flag_16bit_code
1480 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1482 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1483 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1484 prefix
= ADDR_PREFIX_OPCODE
;
1486 if (! add_prefix (prefix
))
1489 /* Size floating point instruction. */
1490 if (i
.suffix
== LONG_OPCODE_SUFFIX
)
1492 if (i
.tm
.opcode_modifier
& FloatMF
)
1493 i
.tm
.base_opcode
^= 4;
1497 /* For insns with operands there are more diddles to do to the opcode. */
1500 /* Default segment register this instruction will use
1501 for memory accesses. 0 means unknown.
1502 This is only for optimizing out unnecessary segment overrides. */
1503 const seg_entry
*default_seg
= 0;
1505 /* If we found a reverse match we must alter the opcode
1506 direction bit. found_reverse_match holds bits to change
1507 (different for int & float insns). */
1509 i
.tm
.base_opcode
^= found_reverse_match
;
1511 /* The imul $imm, %reg instruction is converted into
1512 imul $imm, %reg, %reg, and the clr %reg instruction
1513 is converted into xor %reg, %reg. */
1514 if (i
.tm
.opcode_modifier
& regKludge
)
1516 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1517 /* Pretend we saw the extra register operand. */
1518 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1522 if (i
.tm
.opcode_modifier
& ShortForm
)
1524 /* The register or float register operand is in operand 0 or 1. */
1525 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1526 /* Register goes in low 3 bits of opcode. */
1527 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1528 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1530 /* Warn about some common errors, but press on regardless.
1531 The first case can be generated by gcc (<= 2.8.1). */
1532 if (i
.operands
== 2)
1534 /* reversed arguments on faddp, fsubp, etc. */
1535 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1536 i
.regs
[1]->reg_name
,
1537 i
.regs
[0]->reg_name
);
1541 /* extraneous `l' suffix on fp insn */
1542 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1543 i
.regs
[0]->reg_name
);
1547 else if (i
.tm
.opcode_modifier
& Modrm
)
1549 /* The opcode is completed (modulo i.tm.extension_opcode which
1550 must be put into the modrm byte).
1551 Now, we make the modrm & index base bytes based on all the
1552 info we've collected. */
1554 /* i.reg_operands MUST be the number of real register operands;
1555 implicit registers do not count. */
1556 if (i
.reg_operands
== 2)
1558 unsigned int source
, dest
;
1559 source
= ((i
.types
[0]
1570 /* Certain instructions expect the destination to be
1571 in the i.rm.reg field. This is by far the
1572 exceptional case. For these instructions, if the
1573 source operand is a register, we must reverse the
1574 i.rm.reg and i.rm.regmem fields. We accomplish
1575 this by pretending that the two register operands
1576 were given in the reverse order. */
1577 if (i
.tm
.opcode_modifier
& ReverseRegRegmem
)
1579 const reg_entry
*tmp
= i
.regs
[source
];
1580 i
.regs
[source
] = i
.regs
[dest
];
1585 /* We must be careful to make sure that all
1586 segment/control/test/debug/MMX registers go into
1587 the i.rm.reg field (despite whether they are
1588 source or destination operands). */
1589 if (i
.regs
[dest
]->reg_type
1590 & (SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
1592 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1593 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1597 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1598 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1602 { /* if it's not 2 reg operands... */
1605 unsigned int fake_zero_displacement
= 0;
1606 unsigned int op
= ((i
.types
[0] & AnyMem
)
1608 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1615 if (! i
.disp_operands
)
1616 fake_zero_displacement
= 1;
1619 /* Operand is just <disp> */
1620 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1622 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1623 i
.types
[op
] &= ~Disp
;
1624 i
.types
[op
] |= Disp16
;
1628 i
.rm
.regmem
= NO_BASE_REGISTER
;
1629 i
.types
[op
] &= ~Disp
;
1630 i
.types
[op
] |= Disp32
;
1633 else /* ! i.base_reg && i.index_reg */
1635 i
.sib
.index
= i
.index_reg
->reg_num
;
1636 i
.sib
.base
= NO_BASE_REGISTER
;
1637 i
.sib
.scale
= i
.log2_scale_factor
;
1638 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1639 i
.types
[op
] &= ~Disp
;
1640 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1643 else if (i
.base_reg
->reg_type
& Reg16
)
1645 switch (i
.base_reg
->reg_num
)
1650 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1651 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1658 if ((i
.types
[op
] & Disp
) == 0)
1660 /* fake (%bp) into 0(%bp) */
1661 i
.types
[op
] |= Disp8
;
1662 fake_zero_displacement
= 1;
1665 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1666 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1668 default: /* (%si) -> 4 or (%di) -> 5 */
1669 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1671 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1673 else /* i.base_reg and 32 bit mode */
1675 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1676 i
.sib
.base
= i
.base_reg
->reg_num
;
1677 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1680 if (i
.disp_operands
== 0)
1682 fake_zero_displacement
= 1;
1683 i
.types
[op
] |= Disp8
;
1686 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1690 i
.sib
.scale
= i
.log2_scale_factor
;
1693 /* <disp>(%esp) becomes two byte modrm
1694 with no index register. We've already
1695 stored the code for esp in i.rm.regmem
1696 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1697 base register besides %esp will not use
1698 the extra modrm byte. */
1699 i
.sib
.index
= NO_INDEX_REGISTER
;
1700 #if ! SCALE1_WHEN_NO_INDEX
1701 /* Another case where we force the second
1703 if (i
.log2_scale_factor
)
1704 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1709 i
.sib
.index
= i
.index_reg
->reg_num
;
1710 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1712 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1715 if (fake_zero_displacement
)
1717 /* Fakes a zero displacement assuming that i.types[op]
1718 holds the correct displacement size. */
1719 exp
= &disp_expressions
[i
.disp_operands
++];
1721 exp
->X_op
= O_constant
;
1722 exp
->X_add_number
= 0;
1723 exp
->X_add_symbol
= (symbolS
*) 0;
1724 exp
->X_op_symbol
= (symbolS
*) 0;
1728 /* Fill in i.rm.reg or i.rm.regmem field with register
1729 operand (if any) based on i.tm.extension_opcode.
1730 Again, we must be careful to make sure that
1731 segment/control/debug/test/MMX registers are coded
1732 into the i.rm.reg field. */
1737 & (Reg
| SReg2
| SReg3
| Control
| Debug
1741 & (Reg
| SReg2
| SReg3
| Control
| Debug
1745 /* If there is an extension opcode to put here, the
1746 register number must be put into the regmem field. */
1747 if (i
.tm
.extension_opcode
!= None
)
1748 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
1750 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
1752 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1753 we must set it to 3 to indicate this is a register
1754 operand in the regmem field. */
1755 if (!i
.mem_operands
)
1759 /* Fill in i.rm.reg field with extension opcode (if any). */
1760 if (i
.tm
.extension_opcode
!= None
)
1761 i
.rm
.reg
= i
.tm
.extension_opcode
;
1764 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
1766 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1768 as_bad (_("you can't `pop %%cs'"));
1771 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1773 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
1777 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
1779 /* For the string instructions that allow a segment override
1780 on one of their operands, the default segment is ds. */
1784 /* If a segment was explicitly specified,
1785 and the specified segment is not the default,
1786 use an opcode prefix to select it.
1787 If we never figured out what the default segment is,
1788 then default_seg will be zero at this point,
1789 and the specified segment prefix will always be used. */
1790 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
1792 if (! add_prefix (i
.seg
[0]->seg_prefix
))
1796 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1798 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc */
1799 as_warn (_("translating to `%sp'"), i
.tm
.name
);
1803 /* Handle conversion of 'int $3' --> special int3 insn. */
1804 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1806 i
.tm
.base_opcode
= INT3_OPCODE
;
1810 /* We are ready to output the insn. */
1815 if (i
.tm
.opcode_modifier
& Jump
)
1817 long n
= (long) i
.disps
[0]->X_add_number
;
1818 int prefix
= (i
.prefix
[DATA_PREFIX
] != 0);
1826 if (flag_16bit_code
)
1829 if (i
.prefixes
!= 0)
1830 as_warn (_("skipping prefixes on this instruction"));
1832 if (i
.disps
[0]->X_op
== O_constant
)
1834 if (fits_in_signed_byte (n
))
1838 p
[0] = i
.tm
.base_opcode
;
1843 /* Use 16-bit jumps only for 16-bit code,
1844 because text segments are limited to 64K anyway;
1845 Use 32-bit jumps for 32-bit code, because they're faster,
1846 and a 16-bit jump will clear the top 16 bits of %eip. */
1847 int jmp_size
= code16
? 2 : 4;
1848 if (code16
&& !fits_in_signed_word (n
))
1850 as_bad (_("16-bit jump out of range"));
1854 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
1856 /* unconditional jump */
1857 insn_size
+= prefix
+ 1 + jmp_size
;
1858 p
= frag_more (prefix
+ 1 + jmp_size
);
1860 *p
++ = DATA_PREFIX_OPCODE
;
1862 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
1866 /* conditional jump */
1867 insn_size
+= prefix
+ 2 + jmp_size
;
1868 p
= frag_more (prefix
+ 2 + jmp_size
);
1870 *p
++ = DATA_PREFIX_OPCODE
;
1871 *p
++ = TWO_BYTE_OPCODE_ESCAPE
;
1872 *p
++ = i
.tm
.base_opcode
+ 0x10;
1873 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
1879 int size
= code16
? 2 : 4;
1881 /* It's a symbol; end frag & setup for relax.
1882 Make sure there are more than 6 chars left in the current frag;
1883 if not we'll have to start a new one. */
1884 frag_grow (prefix
+ 1 + 2 + size
);
1885 insn_size
+= 1 + prefix
;
1886 p
= frag_more (1 + prefix
);
1888 *p
++ = DATA_PREFIX_OPCODE
;
1889 *p
= i
.tm
.base_opcode
;
1890 frag_var (rs_machine_dependent
,
1891 prefix
+ 2 + size
, /* 2 opcode/prefix + displacement */
1893 ((unsigned char) *p
== JUMP_PC_RELATIVE
1894 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
1895 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
1896 i
.disps
[0]->X_add_symbol
,
1900 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
1902 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
1903 long n
= (long) i
.disps
[0]->X_add_number
;
1905 if (size
== 1) /* then this is a loop or jecxz type instruction */
1907 if (i
.prefix
[ADDR_PREFIX
])
1910 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
1918 if (i
.prefix
[DATA_PREFIX
])
1921 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
1925 if (flag_16bit_code
)
1932 if (i
.prefixes
!= 0)
1933 as_warn (_("skipping prefixes on this instruction"));
1935 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
1937 insn_size
+= 1 + size
;
1938 p
= frag_more (1 + size
);
1942 insn_size
+= 2 + size
; /* opcode can be at most two bytes */
1943 p
= frag_more (2 + size
);
1944 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1946 *p
++ = i
.tm
.base_opcode
& 0xff;
1948 if (i
.disps
[0]->X_op
== O_constant
)
1950 if (size
== 1 && !fits_in_signed_byte (n
))
1952 as_bad (_("`%s' only takes byte displacement; %ld shortened to %d"),
1955 else if (size
== 2 && !fits_in_signed_word (n
))
1957 as_bad (_("16-bit jump out of range"));
1960 md_number_to_chars (p
, (valueT
) n
, size
);
1964 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1965 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
1969 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
1973 int prefix
= i
.prefix
[DATA_PREFIX
] != 0;
1981 if (flag_16bit_code
)
1985 reloc_type
= BFD_RELOC_32
;
1989 reloc_type
= BFD_RELOC_16
;
1992 if (i
.prefixes
!= 0)
1993 as_warn (_("skipping prefixes on this instruction"));
1995 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
1996 p
= frag_more (prefix
+ 1 + 2 + size
);
1998 *p
++ = DATA_PREFIX_OPCODE
;
1999 *p
++ = i
.tm
.base_opcode
;
2000 if (i
.imms
[1]->X_op
== O_constant
)
2002 long n
= (long) i
.imms
[1]->X_add_number
;
2004 if (size
== 2 && !fits_in_unsigned_word (n
))
2006 as_bad (_("16-bit jump out of range"));
2009 md_number_to_chars (p
, (valueT
) n
, size
);
2012 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2013 i
.imms
[1], 0, reloc_type
);
2014 if (i
.imms
[0]->X_op
!= O_constant
)
2015 as_bad (_("can't handle non absolute segment in `%s'"),
2017 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2021 /* Output normal instructions here. */
2024 /* The prefix bytes. */
2026 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2033 md_number_to_chars (p
, (valueT
) *q
, 1);
2037 /* Now the opcode; be careful about word order here! */
2038 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2041 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2043 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2047 /* put out high byte first: can't use md_number_to_chars! */
2048 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2049 *p
= i
.tm
.base_opcode
& 0xff;
2052 { /* opcode is either 3 or 4 bytes */
2053 if (i
.tm
.base_opcode
& 0xff000000)
2057 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2064 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2065 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2066 *p
= (i
.tm
.base_opcode
) & 0xff;
2069 /* Now the modrm byte and sib byte (if present). */
2070 if (i
.tm
.opcode_modifier
& Modrm
)
2074 md_number_to_chars (p
,
2075 (valueT
) (i
.rm
.regmem
<< 0
2079 /* If i.rm.regmem == ESP (4)
2080 && i.rm.mode != (Register mode)
2082 ==> need second modrm byte. */
2083 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2085 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2089 md_number_to_chars (p
,
2090 (valueT
) (i
.sib
.base
<< 0
2092 | i
.sib
.scale
<< 6),
2097 if (i
.disp_operands
)
2099 register unsigned int n
;
2101 for (n
= 0; n
< i
.operands
; n
++)
2105 if (i
.disps
[n
]->X_op
== O_constant
)
2107 if (i
.types
[n
] & Disp8
)
2111 md_number_to_chars (p
,
2112 (valueT
) i
.disps
[n
]->X_add_number
,
2115 else if (i
.types
[n
] & Disp16
)
2119 md_number_to_chars (p
,
2120 (valueT
) i
.disps
[n
]->X_add_number
,
2127 md_number_to_chars (p
,
2128 (valueT
) i
.disps
[n
]->X_add_number
,
2132 else if (i
.types
[n
] & Disp32
)
2136 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2138 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2141 { /* must be Disp16 */
2144 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2146 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2150 } /* end displacement output */
2152 /* output immediate */
2155 register unsigned int n
;
2157 for (n
= 0; n
< i
.operands
; n
++)
2161 if (i
.imms
[n
]->X_op
== O_constant
)
2163 if (i
.types
[n
] & (Imm8
| Imm8S
))
2167 md_number_to_chars (p
,
2168 (valueT
) i
.imms
[n
]->X_add_number
,
2171 else if (i
.types
[n
] & Imm16
)
2175 md_number_to_chars (p
,
2176 (valueT
) i
.imms
[n
]->X_add_number
,
2183 md_number_to_chars (p
,
2184 (valueT
) i
.imms
[n
]->X_add_number
,
2189 { /* not absolute_section */
2190 /* Need a 32-bit fixup (don't support 8bit
2191 non-absolute ims). Try to support other
2197 if (i
.types
[n
] & (Imm8
| Imm8S
))
2199 else if (i
.types
[n
] & Imm16
)
2204 p
= frag_more (size
);
2205 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2206 #ifdef BFD_ASSEMBLER
2207 if (r_type
== BFD_RELOC_32
2209 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2210 && (i
.imms
[n
]->X_op
== O_symbol
2211 || (i
.imms
[n
]->X_op
== O_add
2212 && (i
.imms
[n
]->X_op_symbol
->sy_value
.X_op
2215 r_type
= BFD_RELOC_386_GOTPC
;
2216 i
.imms
[n
]->X_add_number
+= 3;
2219 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2220 i
.imms
[n
], pcrel
, r_type
);
2224 } /* end immediate output */
2232 #endif /* DEBUG386 */
2236 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
2240 i386_operand (operand_string
)
2241 char *operand_string
;
2243 register char *op_string
= operand_string
;
2245 /* We check for an absolute prefix (differentiating,
2246 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
2247 if (*op_string
== ABSOLUTE_PREFIX
)
2250 if (is_space_char (*op_string
))
2252 i
.types
[this_operand
] |= JumpAbsolute
;
2255 /* Check if operand is a register. */
2256 if (*op_string
== REGISTER_PREFIX
)
2258 register const reg_entry
*r
;
2261 r
= parse_register (op_string
, &end_op
);
2264 /* Check for a segment override by searching for ':' after a
2265 segment register. */
2267 if (is_space_char (*op_string
))
2269 if ((r
->reg_type
& (SReg2
| SReg3
)) && *op_string
== ':')
2274 i
.seg
[i
.mem_operands
] = &es
;
2277 i
.seg
[i
.mem_operands
] = &cs
;
2280 i
.seg
[i
.mem_operands
] = &ss
;
2283 i
.seg
[i
.mem_operands
] = &ds
;
2286 i
.seg
[i
.mem_operands
] = &fs
;
2289 i
.seg
[i
.mem_operands
] = &gs
;
2293 /* Skip the ':' and whitespace. */
2295 if (is_space_char (*op_string
))
2298 operand_string
= op_string
; /* Pretend given string starts here. */
2299 if (!is_digit_char (*op_string
) && !is_identifier_char (*op_string
)
2300 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
)
2302 as_bad (_("bad memory operand `%s'"), op_string
);
2305 /* Handle case of %es:*foo. */
2306 if (*op_string
== ABSOLUTE_PREFIX
)
2309 if (is_space_char (*op_string
))
2311 i
.types
[this_operand
] |= JumpAbsolute
;
2313 goto do_memory_reference
;
2315 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
2316 i
.regs
[this_operand
] = r
;
2319 else if (*op_string
== IMMEDIATE_PREFIX
)
2320 { /* ... or an immediate */
2321 char *save_input_line_pointer
;
2325 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2327 as_bad (_("only 1 or 2 immediate operands are allowed"));
2331 exp
= &im_expressions
[i
.imm_operands
++];
2332 i
.imms
[this_operand
] = exp
;
2335 if (is_space_char (*op_string
))
2338 save_input_line_pointer
= input_line_pointer
;
2339 input_line_pointer
= op_string
;
2340 exp_seg
= expression (exp
);
2341 if (*input_line_pointer
!= '\0')
2343 /* This should be as_bad, but some versions of gcc, up to
2344 about 2.8 and egcs 1.01, generate a bogus @GOTOFF(%ebx)
2345 in certain cases. Oddly, the code in question turns out
2346 to work correctly anyhow, so we make this just a warning
2347 until those versions of gcc are obsolete. */
2348 as_warn (_("unrecognized characters `%s' in expression"),
2349 input_line_pointer
);
2351 input_line_pointer
= save_input_line_pointer
;
2353 if (exp
->X_op
== O_absent
)
2355 /* missing or bad expr becomes absolute 0 */
2356 as_bad (_("missing or invalid immediate expression `%s' taken as 0"),
2358 exp
->X_op
= O_constant
;
2359 exp
->X_add_number
= 0;
2360 exp
->X_add_symbol
= (symbolS
*) 0;
2361 exp
->X_op_symbol
= (symbolS
*) 0;
2362 i
.types
[this_operand
] |= Imm
;
2364 else if (exp
->X_op
== O_constant
)
2366 i
.types
[this_operand
] |=
2367 smallest_imm_type ((long) exp
->X_add_number
);
2369 /* If a suffix is given, this operand may be shortened. */
2372 case WORD_OPCODE_SUFFIX
:
2373 i
.types
[this_operand
] |= Imm16
;
2375 case BYTE_OPCODE_SUFFIX
:
2376 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2381 else if (exp_seg
!= text_section
2382 && exp_seg
!= data_section
2383 && exp_seg
!= bss_section
2384 && exp_seg
!= undefined_section
2385 #ifdef BFD_ASSEMBLER
2386 && ! bfd_is_com_section (exp_seg
)
2391 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2397 /* This is an address. The size of the address will be
2398 determined later, depending on destination register,
2399 suffix, or the default for the section. We exclude
2400 Imm8S here so that `push $foo' and other instructions
2401 with an Imm8S form will use Imm16 or Imm32. */
2402 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2405 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
2406 || *op_string
== '(')
2408 /* This is a memory reference of some sort. */
2409 char *end_of_operand_string
;
2410 register char *base_string
;
2411 int found_base_index_form
;
2413 /* Start and end of displacement string expression (if found). */
2414 char *displacement_string_start
;
2415 char *displacement_string_end
;
2417 do_memory_reference
:
2418 if ((i
.mem_operands
== 1
2419 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
2420 || i
.mem_operands
== 2)
2422 as_bad (_("too many memory references for `%s'"),
2423 current_templates
->start
->name
);
2427 /* Check for base index form. We detect the base index form by
2428 looking for an ')' at the end of the operand, searching
2429 for the '(' matching it, and finding a REGISTER_PREFIX or ','
2431 found_base_index_form
= 0;
2432 end_of_operand_string
= op_string
+ strlen (op_string
);
2434 --end_of_operand_string
;
2435 if (is_space_char (*end_of_operand_string
))
2436 --end_of_operand_string
;
2438 base_string
= end_of_operand_string
;
2439 if (*base_string
== ')')
2441 unsigned int parens_balanced
= 1;
2442 /* We've already checked that the number of left & right ()'s are
2443 equal, so this loop will not be infinite. */
2447 if (*base_string
== ')')
2449 if (*base_string
== '(')
2452 while (parens_balanced
);
2454 /* If there is a displacement set-up for it to be parsed later. */
2455 displacement_string_start
= op_string
;
2456 displacement_string_end
= base_string
;
2458 /* Skip past '(' and whitespace. */
2460 if (is_space_char (*base_string
))
2463 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
2464 found_base_index_form
= 1;
2467 /* If we can't parse a base index register expression, we've found
2468 a pure displacement expression. We set up displacement_string_start
2469 and displacement_string_end for the code below. */
2470 if (!found_base_index_form
)
2472 displacement_string_start
= op_string
;
2473 displacement_string_end
= end_of_operand_string
+ 1;
2477 i
.types
[this_operand
] |= BaseIndex
;
2479 /* Find base register (if any). */
2480 if (*base_string
!= ',')
2484 /* Trim off the closing ')' so that parse_register won't
2486 END_STRING_AND_SAVE (end_of_operand_string
);
2487 i
.base_reg
= parse_register (base_string
, &end_op
);
2488 RESTORE_END_STRING (end_of_operand_string
);
2490 if (i
.base_reg
== NULL
)
2493 base_string
= end_op
;
2494 if (is_space_char (*base_string
))
2498 /* There may be an index reg or scale factor here. */
2499 if (*base_string
== ',')
2502 if (is_space_char (*base_string
))
2505 if (*base_string
== REGISTER_PREFIX
)
2509 END_STRING_AND_SAVE (end_of_operand_string
);
2510 i
.index_reg
= parse_register (base_string
, &end_op
);
2511 RESTORE_END_STRING (end_of_operand_string
);
2513 if (i
.index_reg
== NULL
)
2516 base_string
= end_op
;
2517 if (is_space_char (*base_string
))
2519 if (*base_string
== ',')
2522 if (is_space_char (*base_string
))
2525 else if (*base_string
!= ')')
2527 as_bad (_("expecting `,' or `)' after index register in `%s'"),
2533 /* Check for scale factor. */
2534 if (isdigit ((unsigned char) *base_string
))
2536 if (isdigit ((unsigned char) base_string
[1]))
2537 goto bad_scale
; /* must be 1 digit scale */
2538 switch (*base_string
)
2541 i
.log2_scale_factor
= 0;
2544 i
.log2_scale_factor
= 1;
2547 i
.log2_scale_factor
= 2;
2550 i
.log2_scale_factor
= 3;
2554 as_bad (_("expecting scale factor of 1, 2, 4 or 8; got `%s'"),
2560 if (is_space_char (*base_string
))
2562 if (*base_string
!= ')')
2564 as_bad (_("expecting `)' after scale factor in `%s'"),
2568 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2570 as_warn (_("scale factor of %d without an index register"),
2571 1 << i
.log2_scale_factor
);
2572 #if SCALE1_WHEN_NO_INDEX
2573 i
.log2_scale_factor
= 0;
2577 else if (!i
.index_reg
)
2579 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
2584 else if (*base_string
!= ')')
2586 as_bad (_("expecting `,' or `)' after base register in `%s'"),
2592 /* If there's an expression begining the operand, parse it,
2593 assuming displacement_string_start and
2594 displacement_string_end are meaningful. */
2595 if (displacement_string_start
!= displacement_string_end
)
2597 register expressionS
*exp
;
2599 char *save_input_line_pointer
;
2600 int bigdisp
= Disp32
;
2602 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2604 i
.types
[this_operand
] |= bigdisp
;
2606 exp
= &disp_expressions
[i
.disp_operands
];
2607 i
.disps
[this_operand
] = exp
;
2608 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2610 save_input_line_pointer
= input_line_pointer
;
2611 input_line_pointer
= displacement_string_start
;
2612 END_STRING_AND_SAVE (displacement_string_end
);
2613 #ifndef GCC_ASM_O_HACK
2614 #define GCC_ASM_O_HACK 0
2617 END_STRING_AND_SAVE (displacement_string_end
+ 1);
2618 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2619 && displacement_string_end
[-1] == '+')
2621 /* This hack is to avoid a warning when using the "o"
2622 constraint within gcc asm statements.
2625 #define _set_tssldt_desc(n,addr,limit,type) \
2626 __asm__ __volatile__ ( \
2628 "movw %w1,2+%0\n\t" \
2630 "movb %b1,4+%0\n\t" \
2631 "movb %4,5+%0\n\t" \
2632 "movb $0,6+%0\n\t" \
2633 "movb %h1,7+%0\n\t" \
2635 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2637 This works great except that the output assembler ends
2638 up looking a bit weird if it turns out that there is
2639 no offset. You end up producing code that looks like:
2652 So here we provide the missing zero.
2655 *displacement_string_end
= '0';
2661 * We can have operands of the form
2662 * <symbol>@GOTOFF+<nnn>
2663 * Take the easy way out here and copy everything
2664 * into a temporary buffer...
2668 cp
= strchr (input_line_pointer
, '@');
2673 if (GOT_symbol
== NULL
)
2674 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2676 tmpbuf
= (char *) alloca ((cp
- input_line_pointer
) + 20);
2678 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2680 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2682 strcpy (tmpbuf
, input_line_pointer
);
2683 strcat (tmpbuf
, cp
+ 1 + 3);
2686 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2688 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2690 strcpy (tmpbuf
, input_line_pointer
);
2691 strcat (tmpbuf
, cp
+ 1 + 6);
2694 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2696 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2698 strcpy (tmpbuf
, input_line_pointer
);
2699 strcat (tmpbuf
, cp
+ 1 + 3);
2703 as_bad (_("Bad reloc specifier `%s' in expression"), cp
+ 1);
2705 /* GOT relocations are not supported in 16 bit mode */
2706 if (flag_16bit_code
)
2707 as_bad (_("GOT relocations not supported in 16 bit mode"));
2709 input_line_pointer
= tmpbuf
;
2714 exp_seg
= expression (exp
);
2716 #ifdef BFD_ASSEMBLER
2717 /* We do this to make sure that the section symbol is in
2718 the symbol table. We will ultimately change the relocation
2719 to be relative to the beginning of the section */
2720 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2722 if (S_IS_LOCAL(exp
->X_add_symbol
)
2723 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2724 section_symbol(exp
->X_add_symbol
->bsym
->section
);
2725 assert (exp
->X_op
== O_symbol
);
2726 exp
->X_op
= O_subtract
;
2727 exp
->X_op_symbol
= GOT_symbol
;
2728 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2732 if (*input_line_pointer
)
2733 as_bad (_("Ignoring junk `%s' after expression"),
2734 input_line_pointer
);
2736 RESTORE_END_STRING (displacement_string_end
+ 1);
2738 RESTORE_END_STRING (displacement_string_end
);
2739 input_line_pointer
= save_input_line_pointer
;
2741 #if 0 /* this is handled in expr. */
2742 if (exp
->X_op
== O_absent
)
2744 /* missing expr becomes absolute 0 */
2745 as_bad (_("missing or invalid displacement `%s' taken as 0"),
2747 exp
->X_op
= O_constant
;
2748 exp
->X_add_number
= 0;
2749 exp
->X_add_symbol
= (symbolS
*) 0;
2750 exp
->X_op_symbol
= (symbolS
*) 0;
2751 i
.types
[this_operand
] |= Disp8
;
2755 if (exp
->X_op
== O_constant
)
2757 if (fits_in_signed_byte (exp
->X_add_number
))
2758 i
.types
[this_operand
] |= Disp8
;
2761 else if (exp_seg
!= text_section
2762 && exp_seg
!= data_section
2763 && exp_seg
!= bss_section
2764 && exp_seg
!= undefined_section
)
2766 goto seg_unimplemented
;
2771 /* Special case for (%dx) while doing input/output op. */
2773 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
2775 && i
.log2_scale_factor
== 0
2776 && i
.seg
[i
.mem_operands
] == 0
2777 && (i
.types
[this_operand
] & Disp
) == 0)
2779 i
.types
[this_operand
] = InOutPortReg
;
2782 /* Make sure the memory operand we've been dealt is valid. */
2783 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2786 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
2787 != (Reg16
|BaseIndex
)))
2789 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
2790 != (Reg16
|BaseIndex
))
2792 && i
.base_reg
->reg_num
< 6
2793 && i
.index_reg
->reg_num
>= 6
2794 && i
.log2_scale_factor
== 0))))
2796 as_bad (_("`%s' is not a valid %s bit base/index expression"),
2797 operand_string
, "16");
2804 && (i
.base_reg
->reg_type
& Reg32
) == 0)
2806 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
2807 != (Reg32
|BaseIndex
))))
2809 as_bad (_("`%s' is not a valid %s bit base/index expression"),
2810 operand_string
, "32");
2817 { /* it's not a memory operand; argh! */
2818 as_bad (_("invalid char %s begining operand %d `%s'"),
2819 output_invalid (*op_string
),
2824 return 1; /* normal return */
2828 * md_estimate_size_before_relax()
2830 * Called just before relax().
2831 * Any symbol that is now undefined will not become defined.
2832 * Return the correct fr_subtype in the frag.
2833 * Return the initial "guess for fr_var" to caller.
2834 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2835 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2836 * Although it may not be explicit in the frag, pretend fr_var starts with a
2840 md_estimate_size_before_relax (fragP
, segment
)
2841 register fragS
*fragP
;
2842 register segT segment
;
2844 register unsigned char *opcode
;
2845 register int old_fr_fix
;
2847 old_fr_fix
= fragP
->fr_fix
;
2848 opcode
= (unsigned char *) fragP
->fr_opcode
;
2849 /* We've already got fragP->fr_subtype right; all we have to do is
2850 check for un-relaxable symbols. */
2851 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2853 /* symbol is undefined in this segment */
2854 int code16
= fragP
->fr_subtype
& CODE16
;
2855 int size
= code16
? 2 : 4;
2856 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
2860 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2861 opcode
[0] = 0xe9; /* dword disp jmp */
2862 fragP
->fr_fix
+= size
;
2863 fix_new (fragP
, old_fr_fix
, size
,
2865 fragP
->fr_offset
, 1,
2866 (GOT_symbol
&& /* Not quite right - we should switch on
2867 presence of @PLT, but I cannot see how
2868 to get to that from here. We should have
2869 done this in md_assemble to really
2870 get it right all of the time, but I
2871 think it does not matter that much, as
2872 this will be right most of the time. ERY*/
2873 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
2874 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
2878 /* This changes the byte-displacement jump 0x7N -->
2879 the dword-displacement jump 0x0f8N */
2880 opcode
[1] = opcode
[0] + 0x10;
2881 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2882 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
2883 fix_new (fragP
, old_fr_fix
+ 1, size
,
2885 fragP
->fr_offset
, 1,
2886 (GOT_symbol
&& /* Not quite right - we should switch on
2887 presence of @PLT, but I cannot see how
2888 to get to that from here. ERY */
2889 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
2890 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
2895 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2896 } /* md_estimate_size_before_relax() */
2899 * md_convert_frag();
2901 * Called after relax() is finished.
2902 * In: Address of frag.
2903 * fr_type == rs_machine_dependent.
2904 * fr_subtype is what the address relaxed to.
2906 * Out: Any fixSs and constants are set up.
2907 * Caller will turn frag into a ".space 0".
2909 #ifndef BFD_ASSEMBLER
2911 md_convert_frag (headers
, sec
, fragP
)
2912 object_headers
*headers
;
2914 register fragS
*fragP
;
2917 md_convert_frag (abfd
, sec
, fragP
)
2920 register fragS
*fragP
;
2923 register unsigned char *opcode
;
2924 unsigned char *where_to_put_displacement
= NULL
;
2925 unsigned int target_address
;
2926 unsigned int opcode_address
;
2927 unsigned int extension
= 0;
2928 int displacement_from_opcode_start
;
2930 opcode
= (unsigned char *) fragP
->fr_opcode
;
2932 /* Address we want to reach in file space. */
2933 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2934 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2935 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
2938 /* Address opcode resides at in file space. */
2939 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2941 /* Displacement from opcode start to fill into instruction. */
2942 displacement_from_opcode_start
= target_address
- opcode_address
;
2944 switch (fragP
->fr_subtype
)
2946 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
2947 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
2948 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
2949 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
2950 /* don't have to change opcode */
2951 extension
= 1; /* 1 opcode + 1 displacement */
2952 where_to_put_displacement
= &opcode
[1];
2955 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
2956 extension
= 5; /* 2 opcode + 4 displacement */
2957 opcode
[1] = opcode
[0] + 0x10;
2958 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2959 where_to_put_displacement
= &opcode
[2];
2962 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
2963 extension
= 4; /* 1 opcode + 4 displacement */
2965 where_to_put_displacement
= &opcode
[1];
2968 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
2969 extension
= 3; /* 2 opcode + 2 displacement */
2970 opcode
[1] = opcode
[0] + 0x10;
2971 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2972 where_to_put_displacement
= &opcode
[2];
2975 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
2976 extension
= 2; /* 1 opcode + 2 displacement */
2978 where_to_put_displacement
= &opcode
[1];
2982 BAD_CASE (fragP
->fr_subtype
);
2985 /* now put displacement after opcode */
2986 md_number_to_chars ((char *) where_to_put_displacement
,
2987 (valueT
) (displacement_from_opcode_start
- extension
),
2988 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
2989 fragP
->fr_fix
+= extension
;
2993 int md_short_jump_size
= 2; /* size of byte displacement jmp */
2994 int md_long_jump_size
= 5; /* size of dword displacement jmp */
2995 const int md_reloc_size
= 8; /* Size of relocation record */
2998 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3000 addressT from_addr
, to_addr
;
3006 offset
= to_addr
- (from_addr
+ 2);
3007 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3008 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3012 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3014 addressT from_addr
, to_addr
;
3020 if (flag_do_long_jump
)
3022 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3023 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3024 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3025 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3026 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3030 offset
= to_addr
- (from_addr
+ 5);
3031 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3032 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3036 /* Apply a fixup (fixS) to segment data, once it has been determined
3037 by our caller that we have all the info we need to fix it up.
3039 On the 386, immediates, displacements, and data pointers are all in
3040 the same (little-endian) format, so we don't need to care about which
3044 md_apply_fix3 (fixP
, valp
, seg
)
3045 fixS
*fixP
; /* The fix we're to put in. */
3046 valueT
*valp
; /* Pointer to the value of the bits. */
3047 segT seg
; /* Segment fix is from. */
3049 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3050 valueT value
= *valp
;
3052 if (fixP
->fx_r_type
== BFD_RELOC_32
&& fixP
->fx_pcrel
)
3053 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3055 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3057 * This is a hack. There should be a better way to
3060 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
3063 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3064 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
)
3065 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3067 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3068 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3069 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
3070 || (fixP
->fx_addsy
->bsym
->flags
& BSF_SECTION_SYM
) != 0)
3071 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3072 && ! S_IS_WEAK (fixP
->fx_addsy
)
3073 && S_IS_DEFINED (fixP
->fx_addsy
)
3074 && ! S_IS_COMMON (fixP
->fx_addsy
))
3076 /* Yes, we add the values in twice. This is because
3077 bfd_perform_relocation subtracts them out again. I think
3078 bfd_perform_relocation is broken, but I don't dare change
3080 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3083 #if defined (OBJ_COFF) && defined (TE_PE)
3084 /* For some reason, the PE format does not store a section
3085 address offset for a PC relative symbol. */
3086 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3087 value
+= md_pcrel_from (fixP
);
3091 /* Fix a few things - the dynamic linker expects certain values here,
3092 and we must not dissappoint it. */
3093 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3094 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3096 switch (fixP
->fx_r_type
) {
3097 case BFD_RELOC_386_PLT32
:
3098 /* Make the jump instruction point to the address of the operand. At
3099 runtime we merely add the offset to the actual PLT entry. */
3102 case BFD_RELOC_386_GOTPC
:
3104 * This is tough to explain. We end up with this one if we have
3105 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3106 * here is to obtain the absolute address of the GOT, and it is strongly
3107 * preferable from a performance point of view to avoid using a runtime
3108 * relocation for this. The actual sequence of instructions often look
3114 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3116 * The call and pop essentially return the absolute address of
3117 * the label .L66 and store it in %ebx. The linker itself will
3118 * ultimately change the first operand of the addl so that %ebx points to
3119 * the GOT, but to keep things simple, the .o file must have this operand
3120 * set so that it generates not the absolute address of .L66, but the
3121 * absolute address of itself. This allows the linker itself simply
3122 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
3123 * added in, and the addend of the relocation is stored in the operand
3124 * field for the instruction itself.
3126 * Our job here is to fix the operand so that it would add the correct
3127 * offset so that %ebx would point to itself. The thing that is tricky is
3128 * that .-.L66 will point to the beginning of the instruction, so we need
3129 * to further modify the operand so that it will point to itself.
3130 * There are other cases where you have something like:
3132 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
3134 * and here no correction would be required. Internally in the assembler
3135 * we treat operands of this form as not being pcrel since the '.' is
3136 * explicitly mentioned, and I wonder whether it would simplify matters
3137 * to do it this way. Who knows. In earlier versions of the PIC patches,
3138 * the pcrel_adjust field was used to store the correction, but since the
3139 * expression is not pcrel, I felt it would be confusing to do it this way.
3143 case BFD_RELOC_386_GOT32
:
3144 value
= 0; /* Fully resolved at runtime. No addend. */
3146 case BFD_RELOC_386_GOTOFF
:
3155 md_number_to_chars (p
, value
, fixP
->fx_size
);
3161 /* This is never used. */
3162 long /* Knows about the byte order in a word. */
3163 md_chars_to_number (con
, nbytes
)
3164 unsigned char con
[]; /* Low order byte 1st. */
3165 int nbytes
; /* Number of bytes in the input. */
3168 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
3170 retval
<<= BITS_PER_CHAR
;
3178 #define MAX_LITTLENUMS 6
3180 /* Turn the string pointed to by litP into a floating point constant of type
3181 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
3182 is stored in *sizeP . An error message is returned, or NULL on OK. */
3184 md_atof (type
, litP
, sizeP
)
3190 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
3191 LITTLENUM_TYPE
*wordP
;
3213 return _("Bad call to md_atof ()");
3215 t
= atof_ieee (input_line_pointer
, type
, words
);
3217 input_line_pointer
= t
;
3219 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
3220 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
3221 the bigendian 386. */
3222 for (wordP
= words
+ prec
- 1; prec
--;)
3224 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
3225 litP
+= sizeof (LITTLENUM_TYPE
);
3230 char output_invalid_buf
[8];
3237 sprintf (output_invalid_buf
, "'%c'", c
);
3239 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
3240 return output_invalid_buf
;
3243 /* REG_STRING starts *before* REGISTER_PREFIX. */
3245 static const reg_entry
*
3246 parse_register (reg_string
, end_op
)
3250 register char *s
= reg_string
;
3252 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
3255 /* Skip REGISTER_PREFIX and possible whitespace. */
3257 if (is_space_char (*s
))
3261 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
3263 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
3266 as_bad (_("bad register name `%s'"), reg_name_given
);
3267 return (const reg_entry
*) NULL
;
3273 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
3277 as_bad (_("bad register name `%s'"), reg_name_given
);
3278 return (const reg_entry
*) NULL
;
3285 CONST
char *md_shortopts
= "kmVQ:";
3287 CONST
char *md_shortopts
= "m";
3289 struct option md_longopts
[] = {
3290 {NULL
, no_argument
, NULL
, 0}
3292 size_t md_longopts_size
= sizeof (md_longopts
);
3295 md_parse_option (c
, arg
)
3302 flag_do_long_jump
= 1;
3305 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3306 /* -k: Ignore for FreeBSD compatibility. */
3310 /* -V: SVR4 argument to print version ID. */
3312 print_version_id ();
3315 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
3316 should be emitted or not. FIXME: Not implemented. */
3328 md_show_usage (stream
)
3331 fprintf (stream
, _("\
3332 -m do long jump\n"));
3335 #ifdef BFD_ASSEMBLER
3336 #ifdef OBJ_MAYBE_ELF
3337 #ifdef OBJ_MAYBE_COFF
3339 /* Pick the target format to use. */
3342 i386_target_format ()
3344 switch (OUTPUT_FLAVOR
)
3346 case bfd_target_coff_flavour
:
3348 case bfd_target_elf_flavour
:
3349 return "elf32-i386";
3356 #endif /* OBJ_MAYBE_COFF */
3357 #endif /* OBJ_MAYBE_ELF */
3358 #endif /* BFD_ASSEMBLER */
3362 md_undefined_symbol (name
)
3365 if (*name
== '_' && *(name
+1) == 'G'
3366 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3370 if (symbol_find (name
))
3371 as_bad (_("GOT already in symbol table"));
3372 GOT_symbol
= symbol_new (name
, undefined_section
,
3373 (valueT
) 0, &zero_address_frag
);
3380 /* Round up a section size to the appropriate boundary. */
3382 md_section_align (segment
, size
)
3387 #ifdef BFD_ASSEMBLER
3388 /* For a.out, force the section size to be aligned. If we don't do
3389 this, BFD will align it for us, but it will not write out the
3390 final bytes of the section. This may be a bug in BFD, but it is
3391 easier to fix it here since that is how the other a.out targets
3395 align
= bfd_get_section_alignment (stdoutput
, segment
);
3396 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
3403 /* On the i386, PC-relative offsets are relative to the start of the
3404 next instruction. That is, the address of the offset, plus its
3405 size, since the offset is always the last part of the insn. */
3408 md_pcrel_from (fixP
)
3411 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3422 temp
= get_absolute_expression ();
3423 subseg_set (bss_section
, (subsegT
) temp
);
3424 demand_empty_rest_of_line ();
3430 #ifdef BFD_ASSEMBLER
3433 i386_validate_fix (fixp
)
3436 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
3438 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
3443 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
3444 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
3447 tc_gen_reloc (section
, fixp
)
3452 bfd_reloc_code_real_type code
;
3454 switch (fixp
->fx_r_type
)
3456 case BFD_RELOC_386_PLT32
:
3457 case BFD_RELOC_386_GOT32
:
3458 case BFD_RELOC_386_GOTOFF
:
3459 case BFD_RELOC_386_GOTPC
:
3461 code
= fixp
->fx_r_type
;
3464 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
3466 MAP (1, 0, BFD_RELOC_8
);
3467 MAP (2, 0, BFD_RELOC_16
);
3468 MAP (4, 0, BFD_RELOC_32
);
3469 MAP (1, 1, BFD_RELOC_8_PCREL
);
3470 MAP (2, 1, BFD_RELOC_16_PCREL
);
3471 MAP (4, 1, BFD_RELOC_32_PCREL
);
3474 as_bad (_("Can not do %d byte pc-relative relocation"),
3477 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
3478 code
= BFD_RELOC_32
;
3486 if (code
== BFD_RELOC_32
3488 && fixp
->fx_addsy
== GOT_symbol
)
3489 code
= BFD_RELOC_386_GOTPC
;
3491 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3492 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
3493 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3495 rel
->addend
= fixp
->fx_addnumber
;
3499 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3500 if (rel
->howto
== NULL
)
3502 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3503 _("Cannot represent relocation type %s"),
3504 bfd_get_reloc_code_name (code
));
3505 /* Set howto to a garbage value so that we can keep going. */
3506 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3507 assert (rel
->howto
!= NULL
);
3513 #else /* ! BFD_ASSEMBLER */
3515 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
3517 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3520 relax_addressT segment_address_in_file
;
3523 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3524 * Out: GNU LD relocation length code: 0, 1, or 2.
3527 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3530 know (fixP
->fx_addsy
!= NULL
);
3532 md_number_to_chars (where
,
3533 (valueT
) (fixP
->fx_frag
->fr_address
3534 + fixP
->fx_where
- segment_address_in_file
),
3537 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3538 ? S_GET_TYPE (fixP
->fx_addsy
)
3539 : fixP
->fx_addsy
->sy_number
);
3541 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
3542 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3543 where
[4] = r_symbolnum
& 0x0ff;
3544 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
3545 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
3546 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
3549 #endif /* OBJ_AOUT or OBJ_BOUT */
3551 #if defined (I386COFF)
3554 tc_coff_fix2rtype (fixP
)
3557 if (fixP
->fx_r_type
== R_IMAGEBASE
)
3560 return (fixP
->fx_pcrel
?
3561 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
3562 fixP
->fx_size
== 2 ? R_PCRWORD
:
3564 (fixP
->fx_size
== 1 ? R_RELBYTE
:
3565 fixP
->fx_size
== 2 ? R_RELWORD
:
3570 tc_coff_sizemachdep (frag
)
3574 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
3579 #endif /* I386COFF */
3581 #endif /* BFD_ASSEMBLER? */
3583 /* end of tc-i386.c */