1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef SCALE1_WHEN_NO_INDEX
44 /* Specifying a scale factor besides 1 when there is no index is
45 futile. eg. `mov (%ebx,2),%al' does exactly the same as
46 `mov (%ebx),%al'. To slavishly follow what the programmer
47 specified, set SCALE1_WHEN_NO_INDEX to 0. */
48 #define SCALE1_WHEN_NO_INDEX 1
54 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
55 static int fits_in_signed_byte
PARAMS ((long));
56 static int fits_in_unsigned_byte
PARAMS ((long));
57 static int fits_in_unsigned_word
PARAMS ((long));
58 static int fits_in_signed_word
PARAMS ((long));
59 static int smallest_imm_type
PARAMS ((long));
60 static int add_prefix
PARAMS ((unsigned int));
61 static void set_16bit_code_flag
PARAMS ((int));
62 static void set_intel_syntax
PARAMS ((int));
65 static bfd_reloc_code_real_type reloc
66 PARAMS ((int, int, bfd_reloc_code_real_type
));
69 /* 'md_assemble ()' gathers together information and puts it into a
74 /* TM holds the template for the insn were currently assembling. */
77 /* SUFFIX holds the instruction mnemonic suffix if given.
78 (e.g. 'l' for 'movl') */
81 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
83 /* OPERANDS gives the number of given operands. */
84 unsigned int operands
;
86 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
87 of given register, displacement, memory operands and immediate
89 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
91 /* TYPES [i] is the type (see above #defines) which tells us how to
92 search through DISPS [i] & IMMS [i] & REGS [i] for the required
94 unsigned int types
[MAX_OPERANDS
];
96 /* Displacements (if given) for each operand. */
97 expressionS
*disps
[MAX_OPERANDS
];
99 /* Relocation type for operand */
101 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
103 int disp_reloc
[MAX_OPERANDS
];
106 /* Immediate operands (if given) for each operand. */
107 expressionS
*imms
[MAX_OPERANDS
];
109 /* Register operands (if given) for each operand. */
110 const reg_entry
*regs
[MAX_OPERANDS
];
112 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
113 the base index byte below. */
114 const reg_entry
*base_reg
;
115 const reg_entry
*index_reg
;
116 unsigned int log2_scale_factor
;
118 /* SEG gives the seg_entries of this insn. They are zero unless
119 explicit segment overrides are given. */
120 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
122 /* PREFIX holds all the given prefix opcodes (usually null).
123 PREFIXES is the number of prefix opcodes. */
124 unsigned int prefixes
;
125 unsigned char prefix
[MAX_PREFIXES
];
127 /* RM and SIB are the modrm byte and the sib byte where the
128 addressing modes of this insn are encoded. */
134 typedef struct _i386_insn i386_insn
;
136 /* List of chars besides those in app.c:symbol_chars that can start an
137 operand. Used to prevent the scrubber eating vital white-space. */
139 const char extra_symbol_chars
[] = "*%-(@";
141 const char extra_symbol_chars
[] = "*%-(";
144 /* This array holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful */
146 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
147 /* Putting '/' here makes it impossible to use the divide operator.
148 However, we need it for compatibility with SVR4 systems. */
149 const char comment_chars
[] = "#/";
150 #define PREFIX_SEPARATOR '\\'
152 const char comment_chars
[] = "#";
153 #define PREFIX_SEPARATOR '/'
156 /* This array holds the chars that only start a comment at the beginning of
157 a line. If the line seems to have the form '# 123 filename'
158 .line and .file directives will appear in the pre-processed output */
159 /* Note that input_file.c hand checks for '#' at the beginning of the
160 first line of the input file. This is because the compiler outputs
161 #NO_APP at the beginning of its output. */
162 /* Also note that comments started like this one will always work if
163 '/' isn't otherwise defined. */
164 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
165 const char line_comment_chars
[] = "";
167 const char line_comment_chars
[] = "/";
170 const char line_separator_chars
[] = "";
172 /* Chars that can be used to separate mant from exp in floating point nums */
173 const char EXP_CHARS
[] = "eE";
175 /* Chars that mean this number is a floating point constant */
178 const char FLT_CHARS
[] = "fFdDxX";
180 /* tables for lexical analysis */
181 static char mnemonic_chars
[256];
182 static char register_chars
[256];
183 static char operand_chars
[256];
184 static char identifier_chars
[256];
185 static char digit_chars
[256];
188 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
189 #define is_operand_char(x) (operand_chars[(unsigned char) x])
190 #define is_register_char(x) (register_chars[(unsigned char) x])
191 #define is_space_char(x) ((x) == ' ')
192 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
193 #define is_digit_char(x) (digit_chars[(unsigned char) x])
195 /* put here all non-digit non-letter charcters that may occur in an operand */
196 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
198 /* md_assemble() always leaves the strings it's passed unaltered. To
199 effect this we maintain a stack of saved characters that we've smashed
200 with '\0's (indicating end of strings for various sub-fields of the
201 assembler instruction). */
202 static char save_stack
[32];
203 static char *save_stack_p
; /* stack pointer */
204 #define END_STRING_AND_SAVE(s) \
205 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
206 #define RESTORE_END_STRING(s) \
207 do { *(s) = *--save_stack_p; } while (0)
209 /* The instruction we're assembling. */
212 /* Possible templates for current insn. */
213 static const templates
*current_templates
;
215 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
216 static expressionS disp_expressions
[2], im_expressions
[2];
218 static int this_operand
; /* current operand we are working on */
220 static int flag_do_long_jump
; /* FIXME what does this do? */
222 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
224 static int intel_syntax
= 0; /* 1 for intel syntax, 0 if att syntax */
226 static int allow_naked_reg
= 0; /* 1 if register prefix % not required */
228 /* Interface to relax_segment.
229 There are 2 relax states for 386 jump insns: one for conditional &
230 one for unconditional jumps. This is because the these two types
231 of jumps add different sizes to frags when we're figuring out what
232 sort of jump to choose to reach a given label. */
235 #define COND_JUMP 1 /* conditional jump */
236 #define UNCOND_JUMP 2 /* unconditional jump */
240 #define SMALL16 (SMALL|CODE16)
242 #define BIG16 (BIG|CODE16)
246 #define INLINE __inline__
252 #define ENCODE_RELAX_STATE(type,size) \
253 ((relax_substateT)((type<<2) | (size)))
254 #define SIZE_FROM_RELAX_STATE(s) \
255 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
257 /* This table is used by relax_frag to promote short jumps to long
258 ones where necessary. SMALL (short) jumps may be promoted to BIG
259 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
260 don't allow a short jump in a 32 bit code segment to be promoted to
261 a 16 bit offset jump because it's slower (requires data size
262 prefix), and doesn't work, unless the destination is in the bottom
263 64k of the code segment (The top 16 bits of eip are zeroed). */
265 const relax_typeS md_relax_table
[] =
268 1) most positive reach of this state,
269 2) most negative reach of this state,
270 3) how many bytes this mode will add to the size of the current frag
271 4) which index into the table to try if we can't fit into this one.
278 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
279 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
280 /* dword conditionals adds 4 bytes to frag:
281 1 extra opcode byte, 3 extra displacement bytes. */
283 /* word conditionals add 2 bytes to frag:
284 1 extra opcode byte, 1 extra displacement byte. */
287 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
288 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
289 /* dword jmp adds 3 bytes to frag:
290 0 extra opcode bytes, 3 extra displacement bytes. */
292 /* word jmp adds 1 byte to frag:
293 0 extra opcode bytes, 1 extra displacement byte. */
300 i386_align_code (fragP
, count
)
304 /* Various efficient no-op patterns for aligning code labels. */
305 /* Note: Don't try to assemble the instructions in the comments. */
306 /* 0L and 0w are not legal */
307 static const char f32_1
[] =
309 static const char f32_2
[] =
310 {0x89,0xf6}; /* movl %esi,%esi */
311 static const char f32_3
[] =
312 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
313 static const char f32_4
[] =
314 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
315 static const char f32_5
[] =
317 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
318 static const char f32_6
[] =
319 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
320 static const char f32_7
[] =
321 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
322 static const char f32_8
[] =
324 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
325 static const char f32_9
[] =
326 {0x89,0xf6, /* movl %esi,%esi */
327 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
328 static const char f32_10
[] =
329 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
330 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
331 static const char f32_11
[] =
332 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
333 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
334 static const char f32_12
[] =
335 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
336 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
337 static const char f32_13
[] =
338 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
339 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
340 static const char f32_14
[] =
341 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
342 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
343 static const char f32_15
[] =
344 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
345 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
346 static const char f16_4
[] =
347 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
348 static const char f16_5
[] =
350 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
351 static const char f16_6
[] =
352 {0x89,0xf6, /* mov %si,%si */
353 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
354 static const char f16_7
[] =
355 {0x8d,0x74,0x00, /* lea 0(%si),%si */
356 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
357 static const char f16_8
[] =
358 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
359 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
360 static const char *const f32_patt
[] = {
361 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
362 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
364 static const char *const f16_patt
[] = {
365 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
366 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
369 if (count
> 0 && count
<= 15)
373 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
374 f16_patt
[count
- 1], count
);
375 if (count
> 8) /* adjust jump offset */
376 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
379 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
380 f32_patt
[count
- 1], count
);
381 fragP
->fr_var
= count
;
385 static char *output_invalid
PARAMS ((int c
));
386 static int i386_operand
PARAMS ((char *operand_string
));
387 static int i386_intel_operand
PARAMS ((char *operand_string
, int got_a_float
));
388 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
392 static void s_bss
PARAMS ((int));
395 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
397 static INLINE
unsigned int
398 mode_from_disp_size (t
)
401 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
405 fits_in_signed_byte (num
)
408 return (num
>= -128) && (num
<= 127);
409 } /* fits_in_signed_byte() */
412 fits_in_unsigned_byte (num
)
415 return (num
& 0xff) == num
;
416 } /* fits_in_unsigned_byte() */
419 fits_in_unsigned_word (num
)
422 return (num
& 0xffff) == num
;
423 } /* fits_in_unsigned_word() */
426 fits_in_signed_word (num
)
429 return (-32768 <= num
) && (num
<= 32767);
430 } /* fits_in_signed_word() */
433 smallest_imm_type (num
)
437 /* This code is disabled because all the Imm1 forms in the opcode table
438 are slower on the i486, and they're the versions with the implicitly
439 specified single-position displacement, which has another syntax if
440 you really want to use that form. If you really prefer to have the
441 one-byte-shorter Imm1 form despite these problems, re-enable this
444 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
446 return (fits_in_signed_byte (num
)
447 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
448 : fits_in_unsigned_byte (num
)
449 ? (Imm8
| Imm16
| Imm32
)
450 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
453 } /* smallest_imm_type() */
455 /* Returns 0 if attempting to add a prefix where one from the same
456 class already exists, 1 if non rep/repne added, 2 if rep/repne
470 case CS_PREFIX_OPCODE
:
471 case DS_PREFIX_OPCODE
:
472 case ES_PREFIX_OPCODE
:
473 case FS_PREFIX_OPCODE
:
474 case GS_PREFIX_OPCODE
:
475 case SS_PREFIX_OPCODE
:
479 case REPNE_PREFIX_OPCODE
:
480 case REPE_PREFIX_OPCODE
:
483 case LOCK_PREFIX_OPCODE
:
491 case ADDR_PREFIX_OPCODE
:
495 case DATA_PREFIX_OPCODE
:
502 as_bad (_("same type of prefix used twice"));
507 i
.prefix
[q
] = prefix
;
512 set_16bit_code_flag (new_16bit_code_flag
)
513 int new_16bit_code_flag
;
515 flag_16bit_code
= new_16bit_code_flag
;
519 set_intel_syntax (syntax_flag
)
522 /* Find out if register prefixing is specified. */
523 int ask_naked_reg
= 0;
526 if (! is_end_of_line
[(unsigned char) *input_line_pointer
])
528 char *string
= input_line_pointer
;
529 int e
= get_symbol_end ();
531 if (strcmp(string
, "prefix") == 0)
533 else if (strcmp(string
, "noprefix") == 0)
536 as_bad (_("Bad argument to syntax directive."));
537 *input_line_pointer
= e
;
539 demand_empty_rest_of_line ();
541 intel_syntax
= syntax_flag
;
543 if (ask_naked_reg
== 0)
546 allow_naked_reg
= (intel_syntax
547 && (bfd_get_symbol_leading_char (stdoutput
) != '\0'));
549 allow_naked_reg
= 0; /* conservative default */
553 allow_naked_reg
= (ask_naked_reg
< 0);
556 const pseudo_typeS md_pseudo_table
[] =
561 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
562 {"align", s_align_bytes
, 0},
564 {"align", s_align_ptwo
, 0},
566 {"ffloat", float_cons
, 'f'},
567 {"dfloat", float_cons
, 'd'},
568 {"tfloat", float_cons
, 'x'},
570 {"noopt", s_ignore
, 0},
571 {"optim", s_ignore
, 0},
572 {"code16", set_16bit_code_flag
, 1},
573 {"code32", set_16bit_code_flag
, 0},
574 {"intel_syntax", set_intel_syntax
, 1},
575 {"att_syntax", set_intel_syntax
, 0},
579 /* for interface with expression () */
580 extern char *input_line_pointer
;
582 /* hash table for instruction mnemonic lookup */
583 static struct hash_control
*op_hash
;
584 /* hash table for register lookup */
585 static struct hash_control
*reg_hash
;
591 const char *hash_err
;
593 /* initialize op_hash hash table */
594 op_hash
= hash_new ();
597 register const template *optab
;
598 register templates
*core_optab
;
600 optab
= i386_optab
; /* setup for loop */
601 core_optab
= (templates
*) xmalloc (sizeof (templates
));
602 core_optab
->start
= optab
;
607 if (optab
->name
== NULL
608 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
610 /* different name --> ship out current template list;
611 add to hash table; & begin anew */
612 core_optab
->end
= optab
;
613 hash_err
= hash_insert (op_hash
,
619 as_fatal (_("Internal Error: Can't hash %s: %s"),
623 if (optab
->name
== NULL
)
625 core_optab
= (templates
*) xmalloc (sizeof (templates
));
626 core_optab
->start
= optab
;
631 /* initialize reg_hash hash table */
632 reg_hash
= hash_new ();
634 register const reg_entry
*regtab
;
636 for (regtab
= i386_regtab
;
637 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
640 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
646 /* fill in lexical tables: mnemonic_chars, operand_chars. */
651 for (c
= 0; c
< 256; c
++)
656 mnemonic_chars
[c
] = c
;
657 register_chars
[c
] = c
;
658 operand_chars
[c
] = c
;
660 else if (islower (c
))
662 mnemonic_chars
[c
] = c
;
663 register_chars
[c
] = c
;
664 operand_chars
[c
] = c
;
666 else if (isupper (c
))
668 mnemonic_chars
[c
] = tolower (c
);
669 register_chars
[c
] = mnemonic_chars
[c
];
670 operand_chars
[c
] = c
;
673 if (isalpha (c
) || isdigit (c
))
674 identifier_chars
[c
] = c
;
677 identifier_chars
[c
] = c
;
678 operand_chars
[c
] = c
;
683 identifier_chars
['@'] = '@';
685 register_chars
[')'] = ')';
686 register_chars
['('] = '(';
687 digit_chars
['-'] = '-';
688 identifier_chars
['_'] = '_';
689 identifier_chars
['.'] = '.';
691 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
692 operand_chars
[(unsigned char) *p
] = *p
;
695 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
696 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
698 record_alignment (text_section
, 2);
699 record_alignment (data_section
, 2);
700 record_alignment (bss_section
, 2);
706 i386_print_statistics (file
)
709 hash_print_statistics (file
, "i386 opcode", op_hash
);
710 hash_print_statistics (file
, "i386 register", reg_hash
);
716 /* debugging routines for md_assemble */
717 static void pi
PARAMS ((char *, i386_insn
*));
718 static void pte
PARAMS ((template *));
719 static void pt
PARAMS ((unsigned int));
720 static void pe
PARAMS ((expressionS
*));
721 static void ps
PARAMS ((symbolS
*));
728 register template *p
;
731 fprintf (stdout
, "%s: template ", line
);
733 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
734 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
735 fprintf (stdout
, " base %x index %x scale %x\n",
736 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
737 for (i
= 0; i
< x
->operands
; i
++)
739 fprintf (stdout
, " #%d: ", i
+ 1);
741 fprintf (stdout
, "\n");
743 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
| RegXMM
))
744 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
745 if (x
->types
[i
] & Imm
)
747 if (x
->types
[i
] & Disp
)
757 fprintf (stdout
, " %d operands ", t
->operands
);
758 fprintf (stdout
, "opcode %x ",
760 if (t
->extension_opcode
!= None
)
761 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
762 if (t
->opcode_modifier
& D
)
763 fprintf (stdout
, "D");
764 if (t
->opcode_modifier
& W
)
765 fprintf (stdout
, "W");
766 fprintf (stdout
, "\n");
767 for (i
= 0; i
< t
->operands
; i
++)
769 fprintf (stdout
, " #%d type ", i
+ 1);
770 pt (t
->operand_types
[i
]);
771 fprintf (stdout
, "\n");
779 fprintf (stdout
, " operation %d\n", e
->X_op
);
780 fprintf (stdout
, " add_number %d (%x)\n",
781 e
->X_add_number
, e
->X_add_number
);
784 fprintf (stdout
, " add_symbol ");
785 ps (e
->X_add_symbol
);
786 fprintf (stdout
, "\n");
790 fprintf (stdout
, " op_symbol ");
792 fprintf (stdout
, "\n");
800 fprintf (stdout
, "%s type %s%s",
802 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
803 segment_name (S_GET_SEGMENT (s
)));
822 { BaseIndex
, "BaseIndex" },
826 { InOutPortReg
, "InOutPortReg" },
827 { ShiftCount
, "ShiftCount" },
828 { Control
, "control reg" },
829 { Test
, "test reg" },
830 { Debug
, "debug reg" },
831 { FloatReg
, "FReg" },
832 { FloatAcc
, "FAcc" },
836 { JumpAbsolute
, "Jump Absolute" },
847 register struct type_name
*ty
;
851 fprintf (stdout
, _("Unknown"));
855 for (ty
= type_names
; ty
->mask
; ty
++)
857 fprintf (stdout
, "%s, ", ty
->tname
);
862 #endif /* DEBUG386 */
865 tc_i386_force_relocation (fixp
)
869 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
870 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
875 return fixp
->fx_r_type
==7;
880 static bfd_reloc_code_real_type reloc
881 PARAMS ((int, int, bfd_reloc_code_real_type
));
883 static bfd_reloc_code_real_type
884 reloc (size
, pcrel
, other
)
887 bfd_reloc_code_real_type other
;
889 if (other
!= NO_RELOC
) return other
;
895 case 1: return BFD_RELOC_8_PCREL
;
896 case 2: return BFD_RELOC_16_PCREL
;
897 case 4: return BFD_RELOC_32_PCREL
;
899 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
905 case 1: return BFD_RELOC_8
;
906 case 2: return BFD_RELOC_16
;
907 case 4: return BFD_RELOC_32
;
909 as_bad (_("Can not do %d byte relocation"), size
);
912 return BFD_RELOC_NONE
;
916 * Here we decide which fixups can be adjusted to make them relative to
917 * the beginning of the section instead of the symbol. Basically we need
918 * to make sure that the dynamic relocations are done correctly, so in
919 * some cases we force the original symbol to be used.
922 tc_i386_fix_adjustable(fixP
)
926 /* Prevent all adjustments to global symbols. */
927 if (S_IS_EXTERN (fixP
->fx_addsy
))
929 if (S_IS_WEAK (fixP
->fx_addsy
))
932 /* adjust_reloc_syms doesn't know about the GOT */
933 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
934 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
935 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
936 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
937 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
942 #define reloc(SIZE,PCREL,OTHER) 0
943 #define BFD_RELOC_16 0
944 #define BFD_RELOC_32 0
945 #define BFD_RELOC_16_PCREL 0
946 #define BFD_RELOC_32_PCREL 0
947 #define BFD_RELOC_386_PLT32 0
948 #define BFD_RELOC_386_GOT32 0
949 #define BFD_RELOC_386_GOTOFF 0
953 intel_float_operand (mnemonic
)
956 if (mnemonic
[0] == 'f' && mnemonic
[1] =='i')
959 if (mnemonic
[0] == 'f')
965 /* This is the guts of the machine-dependent assembler. LINE points to a
966 machine dependent instruction. This function is supposed to emit
967 the frags/bytes it assembles to. */
973 /* Points to template once we've found it. */
976 /* Count the size of the instruction generated. */
981 char mnemonic
[MAX_MNEM_SIZE
];
983 /* Initialize globals. */
984 memset (&i
, '\0', sizeof (i
));
985 for (j
= 0; j
< MAX_OPERANDS
; j
++)
986 i
.disp_reloc
[j
] = NO_RELOC
;
987 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
988 memset (im_expressions
, '\0', sizeof (im_expressions
));
989 save_stack_p
= save_stack
; /* reset stack pointer */
991 /* First parse an instruction mnemonic & call i386_operand for the operands.
992 We assume that the scrubber has arranged it so that line[0] is the valid
993 start of a (possibly prefixed) mnemonic. */
996 char *token_start
= l
;
999 /* Non-zero if we found a prefix only acceptable with string insns. */
1000 const char *expecting_string_instruction
= NULL
;
1005 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
1008 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
1010 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1015 if (!is_space_char (*l
)
1016 && *l
!= END_OF_INSN
1017 && *l
!= PREFIX_SEPARATOR
)
1019 as_bad (_("invalid character %s in mnemonic"),
1020 output_invalid (*l
));
1023 if (token_start
== l
)
1025 if (*l
== PREFIX_SEPARATOR
)
1026 as_bad (_("expecting prefix; got nothing"));
1028 as_bad (_("expecting mnemonic; got nothing"));
1032 /* Look up instruction (or prefix) via hash table. */
1033 current_templates
= hash_find (op_hash
, mnemonic
);
1035 if (*l
!= END_OF_INSN
1036 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
1037 && current_templates
1038 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
1040 /* If we are in 16-bit mode, do not allow addr16 or data16.
1041 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1042 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
1043 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
1046 as_bad (_("redundant %s prefix"),
1047 current_templates
->start
->name
);
1050 /* Add prefix, checking for repeated prefixes. */
1051 switch (add_prefix (current_templates
->start
->base_opcode
))
1056 expecting_string_instruction
=
1057 current_templates
->start
->name
;
1060 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1067 if (!current_templates
)
1069 /* See if we can get a match by trimming off a suffix. */
1072 case DWORD_MNEM_SUFFIX
:
1073 case WORD_MNEM_SUFFIX
:
1074 case BYTE_MNEM_SUFFIX
:
1075 case SHORT_MNEM_SUFFIX
:
1076 #if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
1077 case LONG_MNEM_SUFFIX
:
1079 i
.suffix
= mnem_p
[-1];
1081 current_templates
= hash_find (op_hash
, mnemonic
);
1085 case INTEL_DWORD_MNEM_SUFFIX
:
1088 i
.suffix
= mnem_p
[-1];
1090 current_templates
= hash_find (op_hash
, mnemonic
);
1094 if (!current_templates
)
1096 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1101 /* check for rep/repne without a string instruction */
1102 if (expecting_string_instruction
1103 && !(current_templates
->start
->opcode_modifier
& IsString
))
1105 as_bad (_("expecting string instruction after `%s'"),
1106 expecting_string_instruction
);
1110 /* There may be operands to parse. */
1111 if (*l
!= END_OF_INSN
)
1113 /* parse operands */
1115 /* 1 if operand is pending after ','. */
1116 unsigned int expecting_operand
= 0;
1118 /* Non-zero if operand parens not balanced. */
1119 unsigned int paren_not_balanced
;
1123 /* skip optional white space before operand */
1124 if (is_space_char (*l
))
1126 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1128 as_bad (_("invalid character %s before operand %d"),
1129 output_invalid (*l
),
1133 token_start
= l
; /* after white space */
1134 paren_not_balanced
= 0;
1135 while (paren_not_balanced
|| *l
!= ',')
1137 if (*l
== END_OF_INSN
)
1139 if (paren_not_balanced
)
1142 as_bad (_("unbalanced parenthesis in operand %d."),
1145 as_bad (_("unbalanced brackets in operand %d."),
1150 break; /* we are done */
1152 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1154 as_bad (_("invalid character %s in operand %d"),
1155 output_invalid (*l
),
1162 ++paren_not_balanced
;
1164 --paren_not_balanced
;
1169 ++paren_not_balanced
;
1171 --paren_not_balanced
;
1175 if (l
!= token_start
)
1176 { /* yes, we've read in another operand */
1177 unsigned int operand_ok
;
1178 this_operand
= i
.operands
++;
1179 if (i
.operands
> MAX_OPERANDS
)
1181 as_bad (_("spurious operands; (%d operands/instruction max)"),
1185 /* now parse operand adding info to 'i' as we go along */
1186 END_STRING_AND_SAVE (l
);
1189 operand_ok
= i386_intel_operand (token_start
, intel_float_operand (mnemonic
));
1191 operand_ok
= i386_operand (token_start
);
1193 RESTORE_END_STRING (l
); /* restore old contents */
1199 if (expecting_operand
)
1201 expecting_operand_after_comma
:
1202 as_bad (_("expecting operand after ','; got nothing"));
1207 as_bad (_("expecting operand before ','; got nothing"));
1212 /* now *l must be either ',' or END_OF_INSN */
1215 if (*++l
== END_OF_INSN
)
1216 { /* just skip it, if it's \n complain */
1217 goto expecting_operand_after_comma
;
1219 expecting_operand
= 1;
1222 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1226 /* Now we've parsed the mnemonic into a set of templates, and have the
1229 Next, we find a template that matches the given insn,
1230 making sure the overlap of the given operands types is consistent
1231 with the template operand types. */
1233 #define MATCH(overlap, given, template) \
1235 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1236 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1238 /* If given types r0 and r1 are registers they must be of the same type
1239 unless the expected operand type register overlap is null.
1240 Note that Acc in a template matches every size of reg. */
1241 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1242 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1243 ((g0) & Reg) == ((g1) & Reg) || \
1244 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1247 register unsigned int overlap0
, overlap1
;
1249 unsigned int overlap2
;
1250 unsigned int found_reverse_match
;
1253 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1255 && (strcmp (mnemonic
, "enter") != 0)
1256 && (strcmp (mnemonic
, "bound") != 0)
1257 && (strncmp (mnemonic
, "fsub", 4) !=0)
1258 && (strncmp (mnemonic
, "fdiv", 4) !=0))
1260 const reg_entry
*temp_reg
= NULL
;
1261 expressionS
*temp_disp
= NULL
;
1262 expressionS
*temp_imm
= NULL
;
1263 unsigned int temp_type
;
1267 if (i
.operands
== 2)
1272 else if (i
.operands
== 3)
1280 temp_type
= i
.types
[xchg2
];
1281 if (temp_type
& (Reg
| FloatReg
))
1282 temp_reg
= i
.regs
[xchg2
];
1283 else if (temp_type
& Imm
)
1284 temp_imm
= i
.imms
[xchg2
];
1285 else if (temp_type
& Disp
)
1286 temp_disp
= i
.disps
[xchg2
];
1288 i
.types
[xchg2
] = i
.types
[xchg1
];
1290 if (i
.types
[xchg1
] & (Reg
| FloatReg
))
1292 i
.regs
[xchg2
] = i
.regs
[xchg1
];
1293 i
.regs
[xchg1
] = NULL
;
1295 else if (i
.types
[xchg2
] & Imm
)
1297 i
.imms
[xchg2
] = i
.imms
[xchg1
];
1298 i
.imms
[xchg1
] = NULL
;
1300 else if (i
.types
[xchg2
] & Disp
)
1302 i
.disps
[xchg2
] = i
.disps
[xchg1
];
1303 i
.disps
[xchg1
] = NULL
;
1306 if (temp_type
& (Reg
| FloatReg
))
1308 i
.regs
[xchg1
] = temp_reg
;
1309 if (! (i
.types
[xchg1
] & (Reg
| FloatReg
)))
1310 i
.regs
[xchg2
] = NULL
;
1312 else if (temp_type
& Imm
)
1314 i
.imms
[xchg1
] = temp_imm
;
1315 if (! (i
.types
[xchg1
] & Imm
))
1316 i
.imms
[xchg2
] = NULL
;
1318 else if (temp_type
& Disp
)
1320 i
.disps
[xchg1
] = temp_disp
;
1321 if (! (i
.types
[xchg1
] & Disp
))
1322 i
.disps
[xchg2
] = NULL
;
1325 i
.types
[xchg1
] = temp_type
;
1327 if (!strcmp(mnemonic
,"jmp")
1328 || !strcmp (mnemonic
, "call"))
1329 if ((i
.types
[0] & Reg
) || i
.types
[0] & BaseIndex
)
1330 i
.types
[0] |= JumpAbsolute
;
1336 found_reverse_match
= 0;
1337 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1339 : (i
.suffix
== WORD_MNEM_SUFFIX
1341 : (i
.suffix
== SHORT_MNEM_SUFFIX
1343 : (i
.suffix
== LONG_MNEM_SUFFIX
1345 : (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
1347 : (i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf
: 0))))));
1349 for (t
= current_templates
->start
;
1350 t
< current_templates
->end
;
1353 /* Must have right number of operands. */
1354 if (i
.operands
!= t
->operands
)
1357 /* For some opcodes, don't check the suffix */
1360 if (strcmp (t
->name
, "fnstcw")
1361 && strcmp (t
->name
, "fldcw")
1362 && (t
->opcode_modifier
& suffix_check
))
1365 /* Must not have disallowed suffix. */
1366 else if ((t
->opcode_modifier
& suffix_check
))
1369 else if (!t
->operands
)
1370 break; /* 0 operands always matches */
1372 overlap0
= i
.types
[0] & t
->operand_types
[0];
1373 switch (t
->operands
)
1376 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1381 overlap1
= i
.types
[1] & t
->operand_types
[1];
1382 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1383 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1384 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1385 t
->operand_types
[0],
1386 overlap1
, i
.types
[1],
1387 t
->operand_types
[1]))
1390 /* check if other direction is valid ... */
1391 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1394 /* try reversing direction of operands */
1395 overlap0
= i
.types
[0] & t
->operand_types
[1];
1396 overlap1
= i
.types
[1] & t
->operand_types
[0];
1397 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1398 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1399 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1400 t
->operand_types
[1],
1401 overlap1
, i
.types
[1],
1402 t
->operand_types
[0]))
1404 /* does not match either direction */
1407 /* found_reverse_match holds which of D or FloatDR
1409 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1412 /* found a forward 2 operand match here */
1413 if (t
->operands
== 3)
1415 /* Here we make use of the fact that there are no
1416 reverse match 3 operand instructions, and all 3
1417 operand instructions only need to be checked for
1418 register consistency between operands 2 and 3. */
1419 overlap2
= i
.types
[2] & t
->operand_types
[2];
1420 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1421 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1422 t
->operand_types
[1],
1423 overlap2
, i
.types
[2],
1424 t
->operand_types
[2]))
1428 /* found either forward/reverse 2 or 3 operand match here:
1429 slip through to break */
1431 break; /* we've found a match; break out of loop */
1432 } /* for (t = ... */
1433 if (t
== current_templates
->end
)
1434 { /* we found no match */
1435 as_bad (_("suffix or operands invalid for `%s'"),
1436 current_templates
->start
->name
);
1440 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1442 /* Warn them that a data or address size prefix doesn't affect
1443 assembly of the next line of code. */
1444 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1447 /* Copy the template we found. */
1449 if (found_reverse_match
)
1451 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1452 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1456 if (i
.tm
.opcode_modifier
& FWait
)
1457 if (! add_prefix (FWAIT_OPCODE
))
1460 /* Check string instruction segment overrides */
1461 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1463 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1464 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1466 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1468 as_bad (_("`%s' operand %d must use `%%es' segment"),
1473 /* There's only ever one segment override allowed per instruction.
1474 This instruction possibly has a legal segment override on the
1475 second operand, so copy the segment to where non-string
1476 instructions store it, allowing common code. */
1477 i
.seg
[0] = i
.seg
[1];
1479 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1481 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1483 as_bad (_("`%s' operand %d must use `%%es' segment"),
1491 /* If matched instruction specifies an explicit instruction mnemonic
1493 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1495 if (i
.tm
.opcode_modifier
& Size16
)
1496 i
.suffix
= WORD_MNEM_SUFFIX
;
1498 i
.suffix
= DWORD_MNEM_SUFFIX
;
1500 else if (i
.reg_operands
)
1502 /* If there's no instruction mnemonic suffix we try to invent one
1503 based on register operands. */
1506 /* We take i.suffix from the last register operand specified,
1507 Destination register type is more significant than source
1510 for (op
= i
.operands
; --op
>= 0; )
1511 if (i
.types
[op
] & Reg
)
1513 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1514 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1519 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1522 for (op
= i
.operands
; --op
>= 0; )
1524 /* If this is an eight bit register, it's OK. If it's
1525 the 16 or 32 bit version of an eight bit register,
1526 we will just use the low portion, and that's OK too. */
1527 if (i
.types
[op
] & Reg8
)
1530 /* movzx and movsx should not generate this warning. */
1532 && (i
.tm
.base_opcode
== 0xfb7
1533 || i
.tm
.base_opcode
== 0xfb6
1534 || i
.tm
.base_opcode
== 0xfbe
1535 || i
.tm
.base_opcode
== 0xfbf))
1538 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1540 /* Check that the template allows eight bit regs
1541 This kills insns such as `orb $1,%edx', which
1542 maybe should be allowed. */
1543 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1547 #if REGISTER_WARNINGS
1548 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1549 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1550 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1551 i
.regs
[op
]->reg_name
,
1556 /* Any other register is bad */
1557 if (i
.types
[op
] & (Reg
| RegMMX
| RegXMM
1559 | Control
| Debug
| Test
1560 | FloatReg
| FloatAcc
))
1562 as_bad (_("`%%%s' not allowed with `%s%c'"),
1563 i
.regs
[op
]->reg_name
,
1570 else if (i
.suffix
== DWORD_MNEM_SUFFIX
)
1573 for (op
= i
.operands
; --op
>= 0; )
1574 /* Reject eight bit registers, except where the template
1575 requires them. (eg. movzb) */
1576 if ((i
.types
[op
] & Reg8
) != 0
1577 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1579 as_bad (_("`%%%s' not allowed with `%s%c'"),
1580 i
.regs
[op
]->reg_name
,
1585 #if REGISTER_WARNINGS
1586 /* Warn if the e prefix on a general reg is missing. */
1587 else if ((i
.types
[op
] & Reg16
) != 0
1588 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1590 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1591 (i
.regs
[op
] + 8)->reg_name
,
1592 i
.regs
[op
]->reg_name
,
1597 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1600 for (op
= i
.operands
; --op
>= 0; )
1601 /* Reject eight bit registers, except where the template
1602 requires them. (eg. movzb) */
1603 if ((i
.types
[op
] & Reg8
) != 0
1604 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1606 as_bad (_("`%%%s' not allowed with `%s%c'"),
1607 i
.regs
[op
]->reg_name
,
1612 #if REGISTER_WARNINGS
1613 /* Warn if the e prefix on a general reg is present. */
1614 else if ((i
.types
[op
] & Reg32
) != 0
1615 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1617 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1618 (i
.regs
[op
] - 8)->reg_name
,
1619 i
.regs
[op
]->reg_name
,
1628 /* Make still unresolved immediate matches conform to size of immediate
1629 given in i.suffix. Note: overlap2 cannot be an immediate! */
1630 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1631 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1632 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1636 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1637 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1639 else if (overlap0
== (Imm16
| Imm32
))
1642 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1646 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1650 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1651 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1652 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1656 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1657 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1659 else if (overlap1
== (Imm16
| Imm32
))
1662 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1666 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1670 assert ((overlap2
& Imm
) == 0);
1672 i
.types
[0] = overlap0
;
1673 if (overlap0
& ImplicitRegister
)
1675 if (overlap0
& Imm1
)
1676 i
.imm_operands
= 0; /* kludge for shift insns */
1678 i
.types
[1] = overlap1
;
1679 if (overlap1
& ImplicitRegister
)
1682 i
.types
[2] = overlap2
;
1683 if (overlap2
& ImplicitRegister
)
1686 /* Finalize opcode. First, we change the opcode based on the operand
1687 size given by i.suffix: We need not change things for byte insns. */
1689 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1691 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1695 /* For movzx and movsx, need to check the register type */
1697 && (i
.tm
.base_opcode
== 0xfb6 || i
.tm
.base_opcode
== 0xfbe))
1698 if (i
.suffix
&& i
.suffix
== BYTE_MNEM_SUFFIX
)
1700 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1702 if ((i
.regs
[1]->reg_type
& Reg16
) != 0)
1703 if (!add_prefix (prefix
))
1707 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1709 /* It's not a byte, select word/dword operation. */
1710 if (i
.tm
.opcode_modifier
& W
)
1712 if (i
.tm
.opcode_modifier
& ShortForm
)
1713 i
.tm
.base_opcode
|= 8;
1715 i
.tm
.base_opcode
|= 1;
1717 /* Now select between word & dword operations via the operand
1718 size prefix, except for instructions that will ignore this
1720 if (((intel_syntax
&& (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1721 || i
.suffix
== DWORD_MNEM_SUFFIX
1722 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1723 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1725 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1726 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1727 prefix
= ADDR_PREFIX_OPCODE
;
1729 if (! add_prefix (prefix
))
1732 /* Size floating point instruction. */
1733 if (i
.suffix
== LONG_MNEM_SUFFIX
1734 || (intel_syntax
&& i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1736 if (i
.tm
.opcode_modifier
& FloatMF
)
1737 i
.tm
.base_opcode
^= 4;
1740 if (intel_syntax
&& i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
)
1742 if (i
.tm
.opcode_modifier
& FloatMF
)
1743 i
.tm
.base_opcode
^= 2;
1747 if (i
.tm
.opcode_modifier
& ImmExt
)
1749 /* These AMD 3DNow! and Intel Katmai New Instructions have an
1750 opcode suffix which is coded in the same place as an 8-bit
1751 immediate field would be. Here we fake an 8-bit immediate
1752 operand from the opcode suffix stored in tm.extension_opcode. */
1756 assert(i
.imm_operands
== 0 && i
.operands
<= 2);
1758 exp
= &im_expressions
[i
.imm_operands
++];
1759 i
.imms
[i
.operands
] = exp
;
1760 i
.types
[i
.operands
++] = Imm8
;
1761 exp
->X_op
= O_constant
;
1762 exp
->X_add_number
= i
.tm
.extension_opcode
;
1763 i
.tm
.extension_opcode
= None
;
1766 /* For insns with operands there are more diddles to do to the opcode. */
1769 /* Default segment register this instruction will use
1770 for memory accesses. 0 means unknown.
1771 This is only for optimizing out unnecessary segment overrides. */
1772 const seg_entry
*default_seg
= 0;
1774 /* If we found a reverse match we must alter the opcode
1775 direction bit. found_reverse_match holds bits to change
1776 (different for int & float insns). */
1778 i
.tm
.base_opcode
^= found_reverse_match
;
1780 /* The imul $imm, %reg instruction is converted into
1781 imul $imm, %reg, %reg, and the clr %reg instruction
1782 is converted into xor %reg, %reg. */
1783 if (i
.tm
.opcode_modifier
& regKludge
)
1785 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1786 /* Pretend we saw the extra register operand. */
1787 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1791 if (i
.tm
.opcode_modifier
& ShortForm
)
1793 /* The register or float register operand is in operand 0 or 1. */
1794 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1795 /* Register goes in low 3 bits of opcode. */
1796 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1797 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1799 /* Warn about some common errors, but press on regardless.
1800 The first case can be generated by gcc (<= 2.8.1). */
1801 if (i
.operands
== 2)
1803 /* reversed arguments on faddp, fsubp, etc. */
1804 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1805 i
.regs
[1]->reg_name
,
1806 i
.regs
[0]->reg_name
);
1810 /* extraneous `l' suffix on fp insn */
1811 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1812 i
.regs
[0]->reg_name
);
1816 else if (i
.tm
.opcode_modifier
& Modrm
)
1818 /* The opcode is completed (modulo i.tm.extension_opcode which
1819 must be put into the modrm byte).
1820 Now, we make the modrm & index base bytes based on all the
1821 info we've collected. */
1823 /* i.reg_operands MUST be the number of real register operands;
1824 implicit registers do not count. */
1825 if (i
.reg_operands
== 2)
1827 unsigned int source
, dest
;
1828 source
= ((i
.types
[0]
1829 & (Reg
| RegMMX
| RegXMM
1831 | Control
| Debug
| Test
))
1836 /* One of the register operands will be encoded in the
1837 i.tm.reg field, the other in the combined i.tm.mode
1838 and i.tm.regmem fields. If no form of this
1839 instruction supports a memory destination operand,
1840 then we assume the source operand may sometimes be
1841 a memory operand and so we need to store the
1842 destination in the i.rm.reg field. */
1843 if ((i
.tm
.operand_types
[dest
] & AnyMem
) == 0)
1845 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1846 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1850 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1851 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1855 { /* if it's not 2 reg operands... */
1858 unsigned int fake_zero_displacement
= 0;
1859 unsigned int op
= ((i
.types
[0] & AnyMem
)
1861 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1868 if (! i
.disp_operands
)
1869 fake_zero_displacement
= 1;
1872 /* Operand is just <disp> */
1873 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1875 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1876 i
.types
[op
] &= ~Disp
;
1877 i
.types
[op
] |= Disp16
;
1881 i
.rm
.regmem
= NO_BASE_REGISTER
;
1882 i
.types
[op
] &= ~Disp
;
1883 i
.types
[op
] |= Disp32
;
1886 else /* ! i.base_reg && i.index_reg */
1888 i
.sib
.index
= i
.index_reg
->reg_num
;
1889 i
.sib
.base
= NO_BASE_REGISTER
;
1890 i
.sib
.scale
= i
.log2_scale_factor
;
1891 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1892 i
.types
[op
] &= ~Disp
;
1893 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1896 else if (i
.base_reg
->reg_type
& Reg16
)
1898 switch (i
.base_reg
->reg_num
)
1903 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1904 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1911 if ((i
.types
[op
] & Disp
) == 0)
1913 /* fake (%bp) into 0(%bp) */
1914 i
.types
[op
] |= Disp8
;
1915 fake_zero_displacement
= 1;
1918 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1919 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1921 default: /* (%si) -> 4 or (%di) -> 5 */
1922 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1924 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1926 else /* i.base_reg and 32 bit mode */
1928 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1929 i
.sib
.base
= i
.base_reg
->reg_num
;
1930 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1933 if (i
.disp_operands
== 0)
1935 fake_zero_displacement
= 1;
1936 i
.types
[op
] |= Disp8
;
1939 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1943 i
.sib
.scale
= i
.log2_scale_factor
;
1946 /* <disp>(%esp) becomes two byte modrm
1947 with no index register. We've already
1948 stored the code for esp in i.rm.regmem
1949 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1950 base register besides %esp will not use
1951 the extra modrm byte. */
1952 i
.sib
.index
= NO_INDEX_REGISTER
;
1953 #if ! SCALE1_WHEN_NO_INDEX
1954 /* Another case where we force the second
1956 if (i
.log2_scale_factor
)
1957 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1962 i
.sib
.index
= i
.index_reg
->reg_num
;
1963 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1965 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1968 if (fake_zero_displacement
)
1970 /* Fakes a zero displacement assuming that i.types[op]
1971 holds the correct displacement size. */
1972 exp
= &disp_expressions
[i
.disp_operands
++];
1974 exp
->X_op
= O_constant
;
1975 exp
->X_add_number
= 0;
1976 exp
->X_add_symbol
= (symbolS
*) 0;
1977 exp
->X_op_symbol
= (symbolS
*) 0;
1981 /* Fill in i.rm.reg or i.rm.regmem field with register
1982 operand (if any) based on i.tm.extension_opcode.
1983 Again, we must be careful to make sure that
1984 segment/control/debug/test/MMX registers are coded
1985 into the i.rm.reg field. */
1990 & (Reg
| RegMMX
| RegXMM
1992 | Control
| Debug
| Test
))
1995 & (Reg
| RegMMX
| RegXMM
1997 | Control
| Debug
| Test
))
2000 /* If there is an extension opcode to put here, the
2001 register number must be put into the regmem field. */
2002 if (i
.tm
.extension_opcode
!= None
)
2003 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
2005 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
2007 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
2008 we must set it to 3 to indicate this is a register
2009 operand in the regmem field. */
2010 if (!i
.mem_operands
)
2014 /* Fill in i.rm.reg field with extension opcode (if any). */
2015 if (i
.tm
.extension_opcode
!= None
)
2016 i
.rm
.reg
= i
.tm
.extension_opcode
;
2019 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
2021 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
2023 as_bad (_("you can't `pop %%cs'"));
2026 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
2028 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
2032 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
2034 /* For the string instructions that allow a segment override
2035 on one of their operands, the default segment is ds. */
2039 /* If a segment was explicitly specified,
2040 and the specified segment is not the default,
2041 use an opcode prefix to select it.
2042 If we never figured out what the default segment is,
2043 then default_seg will be zero at this point,
2044 and the specified segment prefix will always be used. */
2045 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
2047 if (! add_prefix (i
.seg
[0]->seg_prefix
))
2051 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
2053 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc */
2054 as_warn (_("translating to `%sp'"), i
.tm
.name
);
2058 /* Handle conversion of 'int $3' --> special int3 insn. */
2059 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
2061 i
.tm
.base_opcode
= INT3_OPCODE
;
2065 /* We are ready to output the insn. */
2070 if (i
.tm
.opcode_modifier
& Jump
)
2072 long n
= (long) i
.disps
[0]->X_add_number
;
2073 int prefix
= (i
.prefix
[DATA_PREFIX
] != 0);
2081 if (flag_16bit_code
)
2084 if (!intel_syntax
&& (i
.prefixes
!= 0))
2085 as_warn (_("skipping prefixes on this instruction"));
2087 if (i
.disps
[0]->X_op
== O_constant
)
2089 if (fits_in_signed_byte (n
))
2093 p
[0] = i
.tm
.base_opcode
;
2098 /* Use 16-bit jumps only for 16-bit code,
2099 because text segments are limited to 64K anyway;
2100 Use 32-bit jumps for 32-bit code, because they're faster,
2101 and a 16-bit jump will clear the top 16 bits of %eip. */
2102 int jmp_size
= code16
? 2 : 4;
2103 if (code16
&& !fits_in_signed_word (n
))
2105 as_bad (_("16-bit jump out of range"));
2109 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
2111 /* unconditional jump */
2112 insn_size
+= prefix
+ 1 + jmp_size
;
2113 p
= frag_more (prefix
+ 1 + jmp_size
);
2115 *p
++ = DATA_PREFIX_OPCODE
;
2117 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2121 /* conditional jump */
2122 insn_size
+= prefix
+ 2 + jmp_size
;
2123 p
= frag_more (prefix
+ 2 + jmp_size
);
2125 *p
++ = DATA_PREFIX_OPCODE
;
2126 *p
++ = TWO_BYTE_OPCODE_ESCAPE
;
2127 *p
++ = i
.tm
.base_opcode
+ 0x10;
2128 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2134 int size
= code16
? 2 : 4;
2136 /* It's a symbol; end frag & setup for relax.
2137 Make sure there are more than 6 chars left in the current frag;
2138 if not we'll have to start a new one. */
2139 frag_grow (prefix
+ 1 + 2 + size
);
2140 insn_size
+= 1 + prefix
;
2141 p
= frag_more (1 + prefix
);
2143 *p
++ = DATA_PREFIX_OPCODE
;
2144 *p
= i
.tm
.base_opcode
;
2145 frag_var (rs_machine_dependent
,
2146 prefix
+ 2 + size
, /* 2 opcode/prefix + displacement */
2148 ((unsigned char) *p
== JUMP_PC_RELATIVE
2149 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
2150 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
2151 i
.disps
[0]->X_add_symbol
,
2155 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
2157 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
2158 long n
= (long) i
.disps
[0]->X_add_number
;
2160 if (size
== 1) /* then this is a loop or jecxz type instruction */
2162 if (i
.prefix
[ADDR_PREFIX
])
2165 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
2173 if (i
.prefix
[DATA_PREFIX
])
2176 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
2180 if (flag_16bit_code
)
2187 if (!intel_syntax
&& (i
.prefixes
!= 0))
2188 as_warn (_("skipping prefixes on this instruction"));
2190 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2192 insn_size
+= 1 + size
;
2193 p
= frag_more (1 + size
);
2197 insn_size
+= 2 + size
; /* opcode can be at most two bytes */
2198 p
= frag_more (2 + size
);
2199 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2201 *p
++ = i
.tm
.base_opcode
& 0xff;
2203 if (i
.disps
[0]->X_op
== O_constant
)
2205 if (size
== 1 && !fits_in_signed_byte (n
))
2207 as_bad (_("`%s' only takes byte displacement; %ld shortened to %d"),
2210 else if (size
== 2 && !fits_in_signed_word (n
))
2212 as_bad (_("16-bit jump out of range"));
2215 md_number_to_chars (p
, (valueT
) n
, size
);
2219 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2220 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
2224 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2228 int prefix
= i
.prefix
[DATA_PREFIX
] != 0;
2236 if (flag_16bit_code
)
2240 reloc_type
= BFD_RELOC_32
;
2244 reloc_type
= BFD_RELOC_16
;
2247 if (!intel_syntax
&& (i
.prefixes
!= 0))
2248 as_warn (_("skipping prefixes on this instruction"));
2250 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2251 p
= frag_more (prefix
+ 1 + 2 + size
);
2253 *p
++ = DATA_PREFIX_OPCODE
;
2254 *p
++ = i
.tm
.base_opcode
;
2255 if (i
.imms
[1]->X_op
== O_constant
)
2257 long n
= (long) i
.imms
[1]->X_add_number
;
2259 if (size
== 2 && !fits_in_unsigned_word (n
))
2261 as_bad (_("16-bit jump out of range"));
2264 md_number_to_chars (p
, (valueT
) n
, size
);
2267 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2268 i
.imms
[1], 0, reloc_type
);
2269 if (i
.imms
[0]->X_op
!= O_constant
)
2270 as_bad (_("can't handle non absolute segment in `%s'"),
2272 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2276 /* Output normal instructions here. */
2279 /* The prefix bytes. */
2281 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2288 md_number_to_chars (p
, (valueT
) *q
, 1);
2292 /* Now the opcode; be careful about word order here! */
2293 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2296 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2298 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2302 /* put out high byte first: can't use md_number_to_chars! */
2303 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2304 *p
= i
.tm
.base_opcode
& 0xff;
2307 { /* opcode is either 3 or 4 bytes */
2308 if (i
.tm
.base_opcode
& 0xff000000)
2312 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2319 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2320 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2321 *p
= (i
.tm
.base_opcode
) & 0xff;
2324 /* Now the modrm byte and sib byte (if present). */
2325 if (i
.tm
.opcode_modifier
& Modrm
)
2329 md_number_to_chars (p
,
2330 (valueT
) (i
.rm
.regmem
<< 0
2334 /* If i.rm.regmem == ESP (4)
2335 && i.rm.mode != (Register mode)
2337 ==> need second modrm byte. */
2338 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2340 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2344 md_number_to_chars (p
,
2345 (valueT
) (i
.sib
.base
<< 0
2347 | i
.sib
.scale
<< 6),
2352 if (i
.disp_operands
)
2354 register unsigned int n
;
2356 for (n
= 0; n
< i
.operands
; n
++)
2360 if (i
.disps
[n
]->X_op
== O_constant
)
2362 if (i
.types
[n
] & Disp8
)
2366 md_number_to_chars (p
,
2367 (valueT
) i
.disps
[n
]->X_add_number
,
2370 else if (i
.types
[n
] & Disp16
)
2374 md_number_to_chars (p
,
2375 (valueT
) i
.disps
[n
]->X_add_number
,
2382 md_number_to_chars (p
,
2383 (valueT
) i
.disps
[n
]->X_add_number
,
2387 else if (i
.types
[n
] & Disp32
)
2391 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2393 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2396 { /* must be Disp16 */
2399 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2401 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2405 } /* end displacement output */
2407 /* output immediate */
2410 register unsigned int n
;
2412 for (n
= 0; n
< i
.operands
; n
++)
2416 if (i
.imms
[n
]->X_op
== O_constant
)
2418 if (i
.types
[n
] & (Imm8
| Imm8S
))
2422 md_number_to_chars (p
,
2423 (valueT
) i
.imms
[n
]->X_add_number
,
2426 else if (i
.types
[n
] & Imm16
)
2430 md_number_to_chars (p
,
2431 (valueT
) i
.imms
[n
]->X_add_number
,
2438 md_number_to_chars (p
,
2439 (valueT
) i
.imms
[n
]->X_add_number
,
2444 { /* not absolute_section */
2445 /* Need a 32-bit fixup (don't support 8bit
2446 non-absolute ims). Try to support other
2452 if (i
.types
[n
] & (Imm8
| Imm8S
))
2454 else if (i
.types
[n
] & Imm16
)
2459 p
= frag_more (size
);
2460 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2461 #ifdef BFD_ASSEMBLER
2462 if (r_type
== BFD_RELOC_32
2464 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2465 && (i
.imms
[n
]->X_op
== O_symbol
2466 || (i
.imms
[n
]->X_op
== O_add
2467 && ((symbol_get_value_expression
2468 (i
.imms
[n
]->X_op_symbol
)->X_op
)
2471 r_type
= BFD_RELOC_386_GOTPC
;
2472 i
.imms
[n
]->X_add_number
+= 3;
2475 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2476 i
.imms
[n
], pcrel
, r_type
);
2480 } /* end immediate output */
2488 #endif /* DEBUG386 */
2492 static int i386_is_reg
PARAMS ((char *));
2495 i386_is_reg (reg_string
)
2498 register char *s
= reg_string
;
2500 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
2502 if (is_space_char (*s
))
2506 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
2507 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2510 if (!hash_find (reg_hash
, reg_name_given
))
2516 static int i386_immediate
PARAMS ((char *));
2519 i386_immediate (imm_start
)
2522 char *save_input_line_pointer
;
2526 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2528 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2532 exp
= &im_expressions
[i
.imm_operands
++];
2533 i
.imms
[this_operand
] = exp
;
2535 if (is_space_char (*imm_start
))
2538 save_input_line_pointer
= input_line_pointer
;
2539 input_line_pointer
= imm_start
;
2544 * We can have operands of the form
2545 * <symbol>@GOTOFF+<nnn>
2546 * Take the easy way out here and copy everything
2547 * into a temporary buffer...
2551 cp
= strchr (input_line_pointer
, '@');
2558 /* GOT relocations are not supported in 16 bit mode */
2559 if (flag_16bit_code
)
2560 as_bad (_("GOT relocations not supported in 16 bit mode"));
2562 if (GOT_symbol
== NULL
)
2563 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2565 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2567 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2570 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2572 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2575 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2577 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2581 as_bad (_("Bad reloc specifier in expression"));
2583 /* Replace the relocation token with ' ', so that errors like
2584 foo@GOTOFF1 will be detected. */
2585 first
= cp
- input_line_pointer
;
2586 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2587 memcpy (tmpbuf
, input_line_pointer
, first
);
2588 tmpbuf
[first
] = ' ';
2589 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2590 input_line_pointer
= tmpbuf
;
2595 exp_seg
= expression (exp
);
2598 if (*input_line_pointer
)
2599 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer
);
2601 input_line_pointer
= save_input_line_pointer
;
2603 if (exp
->X_op
== O_absent
)
2605 /* missing or bad expr becomes absolute 0 */
2606 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2608 exp
->X_op
= O_constant
;
2609 exp
->X_add_number
= 0;
2610 exp
->X_add_symbol
= (symbolS
*) 0;
2611 exp
->X_op_symbol
= (symbolS
*) 0;
2612 i
.types
[this_operand
] |= Imm
;
2614 else if (exp
->X_op
== O_constant
)
2616 i
.types
[this_operand
] |=
2617 smallest_imm_type ((long) exp
->X_add_number
);
2619 /* If a suffix is given, this operand may be shortended. */
2622 case WORD_MNEM_SUFFIX
:
2623 i
.types
[this_operand
] |= Imm16
;
2625 case BYTE_MNEM_SUFFIX
:
2626 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2631 else if (exp_seg
!= text_section
2632 && exp_seg
!= data_section
2633 && exp_seg
!= bss_section
2634 && exp_seg
!= undefined_section
2635 #ifdef BFD_ASSEMBLER
2636 && !bfd_is_com_section (exp_seg
)
2640 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2646 /* This is an address. The size of the address will be
2647 determined later, depending on destination register,
2648 suffix, or the default for the section. We exclude
2649 Imm8S here so that `push $foo' and other instructions
2650 with an Imm8S form will use Imm16 or Imm32. */
2651 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2657 static int i386_scale
PARAMS ((char *));
2663 if (!isdigit (*scale
))
2670 i
.log2_scale_factor
= 0;
2673 i
.log2_scale_factor
= 1;
2676 i
.log2_scale_factor
= 2;
2679 i
.log2_scale_factor
= 3;
2683 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2687 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2689 as_warn (_("scale factor of %d without an index register"),
2690 1 << i
.log2_scale_factor
);
2691 #if SCALE1_WHEN_NO_INDEX
2692 i
.log2_scale_factor
= 0;
2698 static int i386_displacement
PARAMS ((char *, char *));
2701 i386_displacement (disp_start
, disp_end
)
2705 register expressionS
*exp
;
2707 char *save_input_line_pointer
;
2708 int bigdisp
= Disp32
;
2710 /* All of the pieces of the displacement expression are handled together. */
2711 if (intel_syntax
&& i
.disp_operands
!= 0)
2714 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2716 i
.types
[this_operand
] |= bigdisp
;
2718 exp
= &disp_expressions
[i
.disp_operands
];
2719 i
.disps
[this_operand
] = exp
;
2720 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2722 save_input_line_pointer
= input_line_pointer
;
2723 input_line_pointer
= disp_start
;
2724 END_STRING_AND_SAVE (disp_end
);
2726 #ifndef GCC_ASM_O_HACK
2727 #define GCC_ASM_O_HACK 0
2730 END_STRING_AND_SAVE (disp_end
+ 1);
2731 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2732 && displacement_string_end
[-1] == '+')
2734 /* This hack is to avoid a warning when using the "o"
2735 constraint within gcc asm statements.
2738 #define _set_tssldt_desc(n,addr,limit,type) \
2739 __asm__ __volatile__ ( \
2741 "movw %w1,2+%0\n\t" \
2743 "movb %b1,4+%0\n\t" \
2744 "movb %4,5+%0\n\t" \
2745 "movb $0,6+%0\n\t" \
2746 "movb %h1,7+%0\n\t" \
2748 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2750 This works great except that the output assembler ends
2751 up looking a bit weird if it turns out that there is
2752 no offset. You end up producing code that looks like:
2765 So here we provide the missing zero.
2768 *displacement_string_end
= '0';
2774 * We can have operands of the form
2775 * <symbol>@GOTOFF+<nnn>
2776 * Take the easy way out here and copy everything
2777 * into a temporary buffer...
2781 cp
= strchr (input_line_pointer
, '@');
2788 /* GOT relocations are not supported in 16 bit mode */
2789 if (flag_16bit_code
)
2790 as_bad (_("GOT relocations not supported in 16 bit mode"));
2792 if (GOT_symbol
== NULL
)
2793 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2795 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2797 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2800 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2802 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2805 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2807 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2811 as_bad (_("Bad reloc specifier in expression"));
2813 /* Replace the relocation token with ' ', so that errors like
2814 foo@GOTOFF1 will be detected. */
2815 first
= cp
- input_line_pointer
;
2816 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2817 memcpy (tmpbuf
, input_line_pointer
, first
);
2818 tmpbuf
[first
] = ' ';
2819 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2820 input_line_pointer
= tmpbuf
;
2825 exp_seg
= expression (exp
);
2827 #ifdef BFD_ASSEMBLER
2828 /* We do this to make sure that the section symbol is in
2829 the symbol table. We will ultimately change the relocation
2830 to be relative to the beginning of the section */
2831 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2833 if (S_IS_LOCAL(exp
->X_add_symbol
)
2834 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2835 section_symbol (S_GET_SEGMENT (exp
->X_add_symbol
));
2836 assert (exp
->X_op
== O_symbol
);
2837 exp
->X_op
= O_subtract
;
2838 exp
->X_op_symbol
= GOT_symbol
;
2839 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2844 if (*input_line_pointer
)
2845 as_bad (_("Ignoring junk `%s' after expression"),
2846 input_line_pointer
);
2848 RESTORE_END_STRING (disp_end
+ 1);
2850 RESTORE_END_STRING (disp_end
);
2851 input_line_pointer
= save_input_line_pointer
;
2853 if (exp
->X_op
== O_constant
)
2855 if (fits_in_signed_byte (exp
->X_add_number
))
2856 i
.types
[this_operand
] |= Disp8
;
2859 else if (exp_seg
!= text_section
2860 && exp_seg
!= data_section
2861 && exp_seg
!= bss_section
2862 && exp_seg
!= undefined_section
)
2864 as_bad (_ ("Unimplemented segment type %d in operand"), exp_seg
);
2871 static int i386_operand_modifier
PARAMS ((char **, int));
2874 i386_operand_modifier (op_string
, got_a_float
)
2878 if (!strncasecmp (*op_string
, "BYTE PTR", 8))
2880 i
.suffix
= BYTE_MNEM_SUFFIX
;
2885 else if (!strncasecmp (*op_string
, "WORD PTR", 8))
2887 i
.suffix
= WORD_MNEM_SUFFIX
;
2892 else if (!strncasecmp (*op_string
, "DWORD PTR", 9))
2895 i
.suffix
= SHORT_MNEM_SUFFIX
;
2897 i
.suffix
= DWORD_MNEM_SUFFIX
;
2902 else if (!strncasecmp (*op_string
, "QWORD PTR", 9))
2904 i
.suffix
= INTEL_DWORD_MNEM_SUFFIX
;
2909 else if (!strncasecmp (*op_string
, "XWORD PTR", 9))
2911 i
.suffix
= LONG_DOUBLE_MNEM_SUFFIX
;
2916 else if (!strncasecmp (*op_string
, "SHORT", 5))
2922 else if (!strncasecmp (*op_string
, "OFFSET FLAT:", 12))
2928 else if (!strncasecmp (*op_string
, "FLAT", 4))
2934 else return NONE_FOUND
;
2937 static char * build_displacement_string
PARAMS ((int, char *));
2940 build_displacement_string (initial_disp
, op_string
)
2944 char *temp_string
= (char *) malloc (strlen (op_string
) + 1);
2945 char *end_of_operand_string
;
2949 temp_string
[0] = '\0';
2950 tc
= end_of_operand_string
= strchr (op_string
, '[');
2951 if ( initial_disp
&& !end_of_operand_string
)
2953 strcpy (temp_string
, op_string
);
2954 return (temp_string
);
2957 /* Build the whole displacement string */
2960 strncpy (temp_string
, op_string
, end_of_operand_string
- op_string
);
2961 temp_string
[end_of_operand_string
- op_string
] = '\0';
2965 temp_disp
= op_string
;
2967 while (*temp_disp
!= '\0')
2969 int add_minus
= (*temp_disp
== '-');
2971 if (*temp_disp
== '+' || *temp_disp
== '-' || *temp_disp
== '[')
2974 if (is_space_char (*temp_disp
))
2977 /* Don't consider registers */
2978 if (*temp_disp
!= REGISTER_PREFIX
2979 && !(allow_naked_reg
&& i386_is_reg (temp_disp
)))
2981 char *string_start
= temp_disp
;
2983 while (*temp_disp
!= ']'
2984 && *temp_disp
!= '+'
2985 && *temp_disp
!= '-'
2986 && *temp_disp
!= '*')
2990 strcat (temp_string
, "-");
2992 strcat (temp_string
, "+");
2994 strncat (temp_string
, string_start
, temp_disp
- string_start
);
2995 if (*temp_disp
== '+' || *temp_disp
== '-')
2999 while (*temp_disp
!= '\0'
3000 && *temp_disp
!= '+'
3001 && *temp_disp
!= '-')
3008 static int i386_parse_seg
PARAMS ((char *));
3011 i386_parse_seg (op_string
)
3014 if (is_space_char (*op_string
))
3017 /* Should be one of es, cs, ss, ds fs or gs */
3018 switch (*op_string
++)
3021 i
.seg
[i
.mem_operands
] = &es
;
3024 i
.seg
[i
.mem_operands
] = &cs
;
3027 i
.seg
[i
.mem_operands
] = &ss
;
3030 i
.seg
[i
.mem_operands
] = &ds
;
3033 i
.seg
[i
.mem_operands
] = &fs
;
3036 i
.seg
[i
.mem_operands
] = &gs
;
3039 as_bad (_("bad segment name `%s'"), op_string
);
3043 if (*op_string
++ != 's')
3045 as_bad (_("bad segment name `%s'"), op_string
);
3049 if (is_space_char (*op_string
))
3052 if (*op_string
!= ':')
3054 as_bad (_("bad segment name `%s'"), op_string
);
3062 static int i386_intel_memory_operand
PARAMS ((char *));
3065 i386_intel_memory_operand (op_string
)
3069 char *end_of_operand_string
;
3071 if (is_digit_char (*op_string
)
3072 && strchr (op_string
, '[') == 0)
3074 if (!i386_immediate (op_string
))
3080 /* Look for displacement preceding open bracket */
3081 if (*op_string
!= '[')
3086 end_seg
= strchr (op_string
, ':');
3089 if (!i386_parse_seg (op_string
))
3091 op_string
= end_seg
+ 1;
3094 temp_string
= build_displacement_string (true, op_string
);
3095 if (!i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3098 end_of_operand_string
= strchr (op_string
, '[');
3099 if (!end_of_operand_string
)
3100 end_of_operand_string
= op_string
+ strlen (op_string
);
3102 if (is_space_char (*end_of_operand_string
))
3103 --end_of_operand_string
;
3105 op_string
= end_of_operand_string
;
3108 if (*op_string
== '[')
3112 /* Pick off each component and figure out where it belongs */
3114 end_of_operand_string
= op_string
;
3116 while (*op_string
!= ']')
3119 while (*end_of_operand_string
!= '+'
3120 && *end_of_operand_string
!= '-'
3121 && *end_of_operand_string
!= '*'
3122 && *end_of_operand_string
!= ']')
3123 end_of_operand_string
++;
3125 if (*op_string
== '+')
3127 char *temp_string
= op_string
+ 1;
3128 if (is_space_char (*temp_string
))
3130 if (*temp_string
== REGISTER_PREFIX
3131 || (allow_naked_reg
&& i386_is_reg (temp_string
)))
3135 if (*op_string
== REGISTER_PREFIX
3136 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3138 const reg_entry
*temp_reg
;
3141 END_STRING_AND_SAVE (end_of_operand_string
);
3142 temp_reg
= parse_register (op_string
, &end_op
);
3143 RESTORE_END_STRING (end_of_operand_string
);
3145 if (temp_reg
== NULL
)
3148 if (i
.base_reg
== NULL
)
3149 i
.base_reg
= temp_reg
;
3151 i
.index_reg
= temp_reg
;
3153 i
.types
[this_operand
] |= BaseIndex
;
3156 else if (is_digit_char (*op_string
) || *op_string
== '+' || *op_string
== '-')
3159 char *temp_string
= build_displacement_string (false, op_string
);
3161 if (*temp_string
== '+')
3164 if (!i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3168 end_of_operand_string
= op_string
;
3169 while (*end_of_operand_string
!= ']'
3170 && *end_of_operand_string
!= '+'
3171 && *end_of_operand_string
!= '-'
3172 && *end_of_operand_string
!= '*')
3173 ++end_of_operand_string
;
3175 else if (*op_string
== '*')
3179 if (i
.base_reg
&& !i
.index_reg
)
3181 i
.index_reg
= i
.base_reg
;
3185 if (!i386_scale (op_string
))
3188 op_string
= end_of_operand_string
;
3189 ++end_of_operand_string
;
3196 static int i386_intel_operand
PARAMS ((char *, int));
3199 i386_intel_operand (operand_string
, got_a_float
)
3200 char *operand_string
;
3203 char *op_string
= operand_string
;
3205 int operand_modifier
= i386_operand_modifier (&op_string
, got_a_float
);
3206 if (is_space_char (*op_string
))
3209 switch (operand_modifier
)
3216 if ((i
.mem_operands
== 1
3217 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3218 || i
.mem_operands
== 2)
3220 as_bad (_("too many memory references for `%s'"),
3221 current_templates
->start
->name
);
3225 if (!i386_intel_memory_operand (op_string
))
3234 if (!i386_immediate (op_string
))
3241 /* Should be register or immediate */
3242 if (is_digit_char (*op_string
)
3243 && strchr (op_string
, '[') == 0)
3245 if (!i386_immediate (op_string
))
3248 else if (*op_string
== REGISTER_PREFIX
3250 && i386_is_reg (op_string
)))
3253 register const reg_entry
* r
;
3256 r
= parse_register (op_string
, &end_op
);
3260 /* Check for a segment override by searching for ':' after a
3261 segment register. */
3263 if (is_space_char (*op_string
))
3265 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3270 i
.seg
[i
.mem_operands
] = &es
;
3273 i
.seg
[i
.mem_operands
] = &cs
;
3276 i
.seg
[i
.mem_operands
] = &ss
;
3279 i
.seg
[i
.mem_operands
] = &ds
;
3282 i
.seg
[i
.mem_operands
] = &fs
;
3285 i
.seg
[i
.mem_operands
] = &gs
;
3290 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3291 i
.regs
[this_operand
] = r
;
3298 if (!i386_intel_memory_operand (op_string
))
3306 /* Special case for (%dx) while doing input/output op. */
3308 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3310 && i
.log2_scale_factor
== 0
3311 && i
.seg
[i
.mem_operands
] == 0
3312 && (i
.types
[this_operand
] & Disp
) == 0)
3314 i
.types
[this_operand
] = InOutPortReg
;
3317 /* Make sure the memory operand we've been dealt is valid. */
3318 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
3321 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3322 != (Reg16
|BaseIndex
)))
3324 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3325 != (Reg16
|BaseIndex
))
3327 && i
.base_reg
->reg_num
< 6
3328 && i
.index_reg
->reg_num
>= 6
3329 && i
.log2_scale_factor
== 0))))
3331 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3332 operand_string
, "16");
3339 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3341 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3342 != (Reg32
|BaseIndex
))))
3344 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3345 operand_string
, "32");
3352 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3355 static int i386_operand
PARAMS ((char *));
3358 i386_operand (operand_string
)
3359 char *operand_string
;
3361 char *op_string
= operand_string
;
3363 if (is_space_char (*op_string
))
3366 /* We check for an absolute prefix (differentiating,
3367 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3368 if (*op_string
== ABSOLUTE_PREFIX
)
3371 if (is_space_char (*op_string
))
3373 i
.types
[this_operand
] |= JumpAbsolute
;
3376 /* Check if operand is a register. */
3377 if (*op_string
== REGISTER_PREFIX
3378 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3380 register const reg_entry
*r
;
3383 r
= parse_register (op_string
, &end_op
);
3387 /* Check for a segment override by searching for ':' after a
3388 segment register. */
3390 if (is_space_char (*op_string
))
3392 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3397 i
.seg
[i
.mem_operands
] = &es
;
3400 i
.seg
[i
.mem_operands
] = &cs
;
3403 i
.seg
[i
.mem_operands
] = &ss
;
3406 i
.seg
[i
.mem_operands
] = &ds
;
3409 i
.seg
[i
.mem_operands
] = &fs
;
3412 i
.seg
[i
.mem_operands
] = &gs
;
3416 /* Skip the ':' and whitespace. */
3418 if (is_space_char (*op_string
))
3421 /* Pretend given string starts here. */
3422 operand_string
= op_string
;
3423 if (!is_digit_char (*op_string
)
3424 && !is_identifier_char (*op_string
)
3425 && *op_string
!= '('
3426 && *op_string
!= ABSOLUTE_PREFIX
)
3428 as_bad (_("bad memory operand `%s'"), op_string
);
3431 /* Handle case of %es:*foo. */
3432 if (*op_string
== ABSOLUTE_PREFIX
)
3435 if (is_space_char (*op_string
))
3437 i
.types
[this_operand
] |= JumpAbsolute
;
3439 goto do_memory_reference
;
3443 as_bad (_("Junk `%s' after register"), op_string
);
3446 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3447 i
.regs
[this_operand
] = r
;
3450 else if (*op_string
== IMMEDIATE_PREFIX
)
3451 { /* ... or an immediate */
3453 if (!i386_immediate (op_string
))
3456 else if (is_digit_char (*op_string
)
3457 || is_identifier_char (*op_string
)
3458 || *op_string
== '(' )
3460 /* This is a memory reference of some sort. */
3461 char *end_of_operand_string
;
3462 register char *base_string
;
3463 int found_base_index_form
;
3465 /* Start and end of displacement string expression (if found). */
3466 char *displacement_string_start
= NULL
;
3467 char *displacement_string_end
= NULL
;
3469 do_memory_reference
:
3471 if ((i
.mem_operands
== 1
3472 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3473 || i
.mem_operands
== 2)
3475 as_bad (_("too many memory references for `%s'"),
3476 current_templates
->start
->name
);
3480 /* Check for base index form. We detect the base index form by
3481 looking for an ')' at the end of the operand, searching
3482 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3484 found_base_index_form
= 0;
3485 end_of_operand_string
= op_string
+ strlen (op_string
);
3487 --end_of_operand_string
;
3488 if (is_space_char (*end_of_operand_string
))
3489 --end_of_operand_string
;
3491 base_string
= end_of_operand_string
;
3493 if (*base_string
== ')')
3495 unsigned int parens_balanced
= 1;
3496 /* We've already checked that the number of left & right ()'s are
3497 equal, so this loop will not be infinite. */
3501 if (*base_string
== ')')
3503 if (*base_string
== '(')
3506 while (parens_balanced
);
3508 /* If there is a displacement set-up for it to be parsed later. */
3509 displacement_string_start
= op_string
;
3510 displacement_string_end
= base_string
;
3512 /* Skip past '(' and whitespace. */
3514 if (is_space_char (*base_string
))
3517 if (*base_string
== REGISTER_PREFIX
3518 || (allow_naked_reg
&& i386_is_reg (base_string
))
3519 || *base_string
== ',')
3520 found_base_index_form
= 1;
3523 /* If we can't parse a base index register expression, we've found
3524 a pure displacement expression. We set up displacement_string_start
3525 and displacement_string_end for the code below. */
3526 if (!found_base_index_form
)
3528 displacement_string_start
= op_string
;
3529 displacement_string_end
= end_of_operand_string
+ 1;
3533 i
.types
[this_operand
] |= BaseIndex
;
3535 /* Find base register (if any). */
3536 if (*base_string
!= ',')
3540 /* Trim off the closing ')' so that parse_register won't
3542 END_STRING_AND_SAVE (end_of_operand_string
);
3543 i
.base_reg
= parse_register (base_string
, &end_op
);
3544 RESTORE_END_STRING (end_of_operand_string
);
3546 if (i
.base_reg
== NULL
)
3549 base_string
= end_op
;
3550 if (is_space_char (*base_string
))
3554 /* There may be an index reg or scale factor here. */
3555 if (*base_string
== ',')
3558 if (is_space_char (*base_string
))
3561 if (*base_string
== REGISTER_PREFIX
3562 || (allow_naked_reg
&& i386_is_reg (base_string
)))
3566 END_STRING_AND_SAVE (end_of_operand_string
);
3567 i
.index_reg
= parse_register (base_string
, &end_op
);
3568 RESTORE_END_STRING (end_of_operand_string
);
3570 if (i
.index_reg
== NULL
)
3573 base_string
= end_op
;
3574 if (is_space_char (*base_string
))
3576 if (*base_string
== ',')
3579 if (is_space_char (*base_string
))
3582 else if (*base_string
!= ')' )
3584 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3590 /* Check for scale factor. */
3591 if (isdigit ((unsigned char) *base_string
))
3593 if (!i386_scale (base_string
))
3597 if (is_space_char (*base_string
))
3599 if (*base_string
!= ')')
3601 as_bad (_("expecting `)' after scale factor in `%s'"),
3606 else if (!i
.index_reg
)
3608 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3613 else if (*base_string
!= ')')
3615 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3621 /* If there's an expression beginning the operand, parse it,
3622 assuming displacement_string_start and
3623 displacement_string_end are meaningful. */
3624 if (displacement_string_start
!= displacement_string_end
)
3626 if (!i386_displacement (displacement_string_start
,
3627 displacement_string_end
))
3631 /* Special case for (%dx) while doing input/output op. */
3633 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3635 && i
.log2_scale_factor
== 0
3636 && i
.seg
[i
.mem_operands
] == 0
3637 && (i
.types
[this_operand
] & Disp
) == 0)
3639 i
.types
[this_operand
] = InOutPortReg
;
3642 /* Make sure the memory operand we've been dealt is valid. */
3643 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
3646 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3647 != (Reg16
|BaseIndex
)))
3649 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3650 != (Reg16
|BaseIndex
))
3652 && i
.base_reg
->reg_num
< 6
3653 && i
.index_reg
->reg_num
>= 6
3654 && i
.log2_scale_factor
== 0))))
3656 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3657 operand_string
, "16");
3664 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3666 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3667 != (Reg32
|BaseIndex
))))
3669 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3670 operand_string
, "32");
3677 { /* it's not a memory operand; argh! */
3678 as_bad (_("invalid char %s beginning operand %d `%s'"),
3679 output_invalid (*op_string
),
3684 return 1; /* normal return */
3688 * md_estimate_size_before_relax()
3690 * Called just before relax().
3691 * Any symbol that is now undefined will not become defined.
3692 * Return the correct fr_subtype in the frag.
3693 * Return the initial "guess for fr_var" to caller.
3694 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3695 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3696 * Although it may not be explicit in the frag, pretend fr_var starts with a
3700 md_estimate_size_before_relax (fragP
, segment
)
3701 register fragS
*fragP
;
3702 register segT segment
;
3704 register unsigned char *opcode
;
3705 register int old_fr_fix
;
3707 old_fr_fix
= fragP
->fr_fix
;
3708 opcode
= (unsigned char *) fragP
->fr_opcode
;
3709 /* We've already got fragP->fr_subtype right; all we have to do is
3710 check for un-relaxable symbols. */
3711 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
3713 /* symbol is undefined in this segment */
3714 int code16
= fragP
->fr_subtype
& CODE16
;
3715 int size
= code16
? 2 : 4;
3716 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
3720 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
3721 opcode
[0] = 0xe9; /* dword disp jmp */
3722 fragP
->fr_fix
+= size
;
3723 fix_new (fragP
, old_fr_fix
, size
,
3725 fragP
->fr_offset
, 1,
3726 (GOT_symbol
&& /* Not quite right - we should switch on
3727 presence of @PLT, but I cannot see how
3728 to get to that from here. We should have
3729 done this in md_assemble to really
3730 get it right all of the time, but I
3731 think it does not matter that much, as
3732 this will be right most of the time. ERY*/
3733 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3734 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3738 /* This changes the byte-displacement jump 0x7N -->
3739 the dword-displacement jump 0x0f8N */
3740 opcode
[1] = opcode
[0] + 0x10;
3741 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
3742 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
3743 fix_new (fragP
, old_fr_fix
+ 1, size
,
3745 fragP
->fr_offset
, 1,
3746 (GOT_symbol
&& /* Not quite right - we should switch on
3747 presence of @PLT, but I cannot see how
3748 to get to that from here. ERY */
3749 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3750 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3755 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
3756 } /* md_estimate_size_before_relax() */
3759 * md_convert_frag();
3761 * Called after relax() is finished.
3762 * In: Address of frag.
3763 * fr_type == rs_machine_dependent.
3764 * fr_subtype is what the address relaxed to.
3766 * Out: Any fixSs and constants are set up.
3767 * Caller will turn frag into a ".space 0".
3769 #ifndef BFD_ASSEMBLER
3771 md_convert_frag (headers
, sec
, fragP
)
3772 object_headers
*headers
;
3774 register fragS
*fragP
;
3777 md_convert_frag (abfd
, sec
, fragP
)
3778 bfd
*abfd ATTRIBUTE_UNUSED
;
3779 segT sec ATTRIBUTE_UNUSED
;
3780 register fragS
*fragP
;
3783 register unsigned char *opcode
;
3784 unsigned char *where_to_put_displacement
= NULL
;
3785 unsigned int target_address
;
3786 unsigned int opcode_address
;
3787 unsigned int extension
= 0;
3788 int displacement_from_opcode_start
;
3790 opcode
= (unsigned char *) fragP
->fr_opcode
;
3792 /* Address we want to reach in file space. */
3793 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
3794 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3795 target_address
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
3798 /* Address opcode resides at in file space. */
3799 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
3801 /* Displacement from opcode start to fill into instruction. */
3802 displacement_from_opcode_start
= target_address
- opcode_address
;
3804 switch (fragP
->fr_subtype
)
3806 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
3807 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
3808 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
3809 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
3810 /* don't have to change opcode */
3811 extension
= 1; /* 1 opcode + 1 displacement */
3812 where_to_put_displacement
= &opcode
[1];
3815 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3816 extension
= 5; /* 2 opcode + 4 displacement */
3817 opcode
[1] = opcode
[0] + 0x10;
3818 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3819 where_to_put_displacement
= &opcode
[2];
3822 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3823 extension
= 4; /* 1 opcode + 4 displacement */
3825 where_to_put_displacement
= &opcode
[1];
3828 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3829 extension
= 3; /* 2 opcode + 2 displacement */
3830 opcode
[1] = opcode
[0] + 0x10;
3831 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3832 where_to_put_displacement
= &opcode
[2];
3835 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3836 extension
= 2; /* 1 opcode + 2 displacement */
3838 where_to_put_displacement
= &opcode
[1];
3842 BAD_CASE (fragP
->fr_subtype
);
3845 /* now put displacement after opcode */
3846 md_number_to_chars ((char *) where_to_put_displacement
,
3847 (valueT
) (displacement_from_opcode_start
- extension
),
3848 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3849 fragP
->fr_fix
+= extension
;
3853 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3854 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3855 const int md_reloc_size
= 8; /* Size of relocation record */
3858 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3860 addressT from_addr
, to_addr
;
3861 fragS
*frag ATTRIBUTE_UNUSED
;
3862 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
3866 offset
= to_addr
- (from_addr
+ 2);
3867 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3868 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3872 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3874 addressT from_addr
, to_addr
;
3880 if (flag_do_long_jump
)
3882 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3883 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3884 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3885 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3886 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3890 offset
= to_addr
- (from_addr
+ 5);
3891 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3892 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3896 /* Apply a fixup (fixS) to segment data, once it has been determined
3897 by our caller that we have all the info we need to fix it up.
3899 On the 386, immediates, displacements, and data pointers are all in
3900 the same (little-endian) format, so we don't need to care about which
3904 md_apply_fix3 (fixP
, valp
, seg
)
3905 fixS
*fixP
; /* The fix we're to put in. */
3906 valueT
*valp
; /* Pointer to the value of the bits. */
3907 segT seg
; /* Segment fix is from. */
3909 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3910 valueT value
= *valp
;
3912 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3915 switch (fixP
->fx_r_type
)
3921 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3924 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
3927 fixP
->fx_r_type
= BFD_RELOC_8_PCREL
;
3933 * This is a hack. There should be a better way to
3936 if ((fixP
->fx_r_type
== BFD_RELOC_32_PCREL
3937 || fixP
->fx_r_type
== BFD_RELOC_16_PCREL
3938 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
)
3942 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3944 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3947 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3949 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3950 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3951 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
3952 || symbol_section_p (fixP
->fx_addsy
))
3953 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3954 && ! S_IS_WEAK (fixP
->fx_addsy
)
3955 && S_IS_DEFINED (fixP
->fx_addsy
)
3956 && ! S_IS_COMMON (fixP
->fx_addsy
))
3958 /* Yes, we add the values in twice. This is because
3959 bfd_perform_relocation subtracts them out again. I think
3960 bfd_perform_relocation is broken, but I don't dare change
3962 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3965 #if defined (OBJ_COFF) && defined (TE_PE)
3966 /* For some reason, the PE format does not store a section
3967 address offset for a PC relative symbol. */
3968 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3969 value
+= md_pcrel_from (fixP
);
3973 /* Fix a few things - the dynamic linker expects certain values here,
3974 and we must not dissappoint it. */
3975 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3976 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3978 switch (fixP
->fx_r_type
) {
3979 case BFD_RELOC_386_PLT32
:
3980 /* Make the jump instruction point to the address of the operand. At
3981 runtime we merely add the offset to the actual PLT entry. */
3984 case BFD_RELOC_386_GOTPC
:
3986 * This is tough to explain. We end up with this one if we have
3987 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3988 * here is to obtain the absolute address of the GOT, and it is strongly
3989 * preferable from a performance point of view to avoid using a runtime
3990 * relocation for this. The actual sequence of instructions often look
3996 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3998 * The call and pop essentially return the absolute address of
3999 * the label .L66 and store it in %ebx. The linker itself will
4000 * ultimately change the first operand of the addl so that %ebx points to
4001 * the GOT, but to keep things simple, the .o file must have this operand
4002 * set so that it generates not the absolute address of .L66, but the
4003 * absolute address of itself. This allows the linker itself simply
4004 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
4005 * added in, and the addend of the relocation is stored in the operand
4006 * field for the instruction itself.
4008 * Our job here is to fix the operand so that it would add the correct
4009 * offset so that %ebx would point to itself. The thing that is tricky is
4010 * that .-.L66 will point to the beginning of the instruction, so we need
4011 * to further modify the operand so that it will point to itself.
4012 * There are other cases where you have something like:
4014 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
4016 * and here no correction would be required. Internally in the assembler
4017 * we treat operands of this form as not being pcrel since the '.' is
4018 * explicitly mentioned, and I wonder whether it would simplify matters
4019 * to do it this way. Who knows. In earlier versions of the PIC patches,
4020 * the pcrel_adjust field was used to store the correction, but since the
4021 * expression is not pcrel, I felt it would be confusing to do it this way.
4025 case BFD_RELOC_386_GOT32
:
4026 value
= 0; /* Fully resolved at runtime. No addend. */
4028 case BFD_RELOC_386_GOTOFF
:
4031 case BFD_RELOC_VTABLE_INHERIT
:
4032 case BFD_RELOC_VTABLE_ENTRY
:
4039 #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
4041 #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
4042 md_number_to_chars (p
, value
, fixP
->fx_size
);
4048 /* This is never used. */
4049 long /* Knows about the byte order in a word. */
4050 md_chars_to_number (con
, nbytes
)
4051 unsigned char con
[]; /* Low order byte 1st. */
4052 int nbytes
; /* Number of bytes in the input. */
4055 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
4057 retval
<<= BITS_PER_CHAR
;
4065 #define MAX_LITTLENUMS 6
4067 /* Turn the string pointed to by litP into a floating point constant of type
4068 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
4069 is stored in *sizeP . An error message is returned, or NULL on OK. */
4071 md_atof (type
, litP
, sizeP
)
4077 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4078 LITTLENUM_TYPE
*wordP
;
4100 return _("Bad call to md_atof ()");
4102 t
= atof_ieee (input_line_pointer
, type
, words
);
4104 input_line_pointer
= t
;
4106 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4107 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4108 the bigendian 386. */
4109 for (wordP
= words
+ prec
- 1; prec
--;)
4111 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
4112 litP
+= sizeof (LITTLENUM_TYPE
);
4117 char output_invalid_buf
[8];
4119 static char * output_invalid
PARAMS ((int));
4126 sprintf (output_invalid_buf
, "'%c'", c
);
4128 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
4129 return output_invalid_buf
;
4132 /* REG_STRING starts *before* REGISTER_PREFIX. */
4134 static const reg_entry
* parse_register
PARAMS ((char *, char **));
4136 static const reg_entry
*
4137 parse_register (reg_string
, end_op
)
4141 register char *s
= reg_string
;
4143 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
4146 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4147 if (*s
== REGISTER_PREFIX
)
4150 if (is_space_char (*s
))
4154 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
4156 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
4158 if (!allow_naked_reg
)
4161 as_bad (_("bad register name `%s'"), reg_name_given
);
4163 return (const reg_entry
*) NULL
;
4169 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
4173 if (!allow_naked_reg
)
4174 as_bad (_("bad register name `%s'"), reg_name_given
);
4175 return (const reg_entry
*) NULL
;
4182 CONST
char *md_shortopts
= "kmVQ:";
4184 CONST
char *md_shortopts
= "m";
4186 struct option md_longopts
[] = {
4187 {NULL
, no_argument
, NULL
, 0}
4189 size_t md_longopts_size
= sizeof (md_longopts
);
4192 md_parse_option (c
, arg
)
4194 char *arg ATTRIBUTE_UNUSED
;
4199 flag_do_long_jump
= 1;
4202 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4203 /* -k: Ignore for FreeBSD compatibility. */
4207 /* -V: SVR4 argument to print version ID. */
4209 print_version_id ();
4212 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4213 should be emitted or not. FIXME: Not implemented. */
4225 md_show_usage (stream
)
4228 fprintf (stream
, _("\
4229 -m do long jump\n"));
4232 #ifdef BFD_ASSEMBLER
4233 #ifdef OBJ_MAYBE_ELF
4234 #ifdef OBJ_MAYBE_COFF
4236 /* Pick the target format to use. */
4239 i386_target_format ()
4241 switch (OUTPUT_FLAVOR
)
4243 case bfd_target_coff_flavour
:
4245 case bfd_target_elf_flavour
:
4246 return "elf32-i386";
4253 #endif /* OBJ_MAYBE_COFF */
4254 #endif /* OBJ_MAYBE_ELF */
4255 #endif /* BFD_ASSEMBLER */
4259 md_undefined_symbol (name
)
4262 if (*name
== '_' && *(name
+1) == 'G'
4263 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4267 if (symbol_find (name
))
4268 as_bad (_("GOT already in symbol table"));
4269 GOT_symbol
= symbol_new (name
, undefined_section
,
4270 (valueT
) 0, &zero_address_frag
);
4277 /* Round up a section size to the appropriate boundary. */
4279 md_section_align (segment
, size
)
4280 segT segment ATTRIBUTE_UNUSED
;
4284 #ifdef BFD_ASSEMBLER
4285 /* For a.out, force the section size to be aligned. If we don't do
4286 this, BFD will align it for us, but it will not write out the
4287 final bytes of the section. This may be a bug in BFD, but it is
4288 easier to fix it here since that is how the other a.out targets
4292 align
= bfd_get_section_alignment (stdoutput
, segment
);
4293 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4300 /* On the i386, PC-relative offsets are relative to the start of the
4301 next instruction. That is, the address of the offset, plus its
4302 size, since the offset is always the last part of the insn. */
4305 md_pcrel_from (fixP
)
4308 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4315 int ignore ATTRIBUTE_UNUSED
;
4319 temp
= get_absolute_expression ();
4320 subseg_set (bss_section
, (subsegT
) temp
);
4321 demand_empty_rest_of_line ();
4327 #ifdef BFD_ASSEMBLER
4330 i386_validate_fix (fixp
)
4333 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
4335 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
4341 tc_gen_reloc (section
, fixp
)
4342 asection
*section ATTRIBUTE_UNUSED
;
4346 bfd_reloc_code_real_type code
;
4348 switch (fixp
->fx_r_type
)
4350 case BFD_RELOC_386_PLT32
:
4351 case BFD_RELOC_386_GOT32
:
4352 case BFD_RELOC_386_GOTOFF
:
4353 case BFD_RELOC_386_GOTPC
:
4355 case BFD_RELOC_VTABLE_ENTRY
:
4356 case BFD_RELOC_VTABLE_INHERIT
:
4357 code
= fixp
->fx_r_type
;
4362 switch (fixp
->fx_size
)
4365 as_bad (_("Can not do %d byte pc-relative relocation"),
4367 code
= BFD_RELOC_32_PCREL
;
4369 case 1: code
= BFD_RELOC_8_PCREL
; break;
4370 case 2: code
= BFD_RELOC_16_PCREL
; break;
4371 case 4: code
= BFD_RELOC_32_PCREL
; break;
4376 switch (fixp
->fx_size
)
4379 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
4380 code
= BFD_RELOC_32
;
4382 case 1: code
= BFD_RELOC_8
; break;
4383 case 2: code
= BFD_RELOC_16
; break;
4384 case 4: code
= BFD_RELOC_32
; break;
4390 if (code
== BFD_RELOC_32
4392 && fixp
->fx_addsy
== GOT_symbol
)
4393 code
= BFD_RELOC_386_GOTPC
;
4395 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4396 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4397 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4399 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4400 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4401 vtable entry to be used in the relocation's section offset. */
4402 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4403 rel
->address
= fixp
->fx_offset
;
4406 rel
->addend
= fixp
->fx_addnumber
;
4410 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4411 if (rel
->howto
== NULL
)
4413 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4414 _("Cannot represent relocation type %s"),
4415 bfd_get_reloc_code_name (code
));
4416 /* Set howto to a garbage value so that we can keep going. */
4417 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4418 assert (rel
->howto
!= NULL
);
4424 #else /* ! BFD_ASSEMBLER */
4426 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4428 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4431 relax_addressT segment_address_in_file
;
4434 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4435 * Out: GNU LD relocation length code: 0, 1, or 2.
4438 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4441 know (fixP
->fx_addsy
!= NULL
);
4443 md_number_to_chars (where
,
4444 (valueT
) (fixP
->fx_frag
->fr_address
4445 + fixP
->fx_where
- segment_address_in_file
),
4448 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4449 ? S_GET_TYPE (fixP
->fx_addsy
)
4450 : fixP
->fx_addsy
->sy_number
);
4452 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
4453 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4454 where
[4] = r_symbolnum
& 0x0ff;
4455 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
4456 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
4457 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
4460 #endif /* OBJ_AOUT or OBJ_BOUT */
4462 #if defined (I386COFF)
4465 tc_coff_fix2rtype (fixP
)
4468 if (fixP
->fx_r_type
== R_IMAGEBASE
)
4471 return (fixP
->fx_pcrel
?
4472 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
4473 fixP
->fx_size
== 2 ? R_PCRWORD
:
4475 (fixP
->fx_size
== 1 ? R_RELBYTE
:
4476 fixP
->fx_size
== 2 ? R_RELWORD
:
4481 tc_coff_sizemachdep (frag
)
4485 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
4490 #endif /* I386COFF */
4492 #endif /* ! BFD_ASSEMBLER */
4494 /* end of tc-i386.c */