1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 1998
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef SCALE1_WHEN_NO_INDEX
44 /* Specifying a scale factor besides 1 when there is no index is
45 futile. eg. `mov (%ebx,2),%al' does exactly the same as
46 `mov (%ebx),%al'. To slavishly follow what the programmer
47 specified, set SCALE1_WHEN_NO_INDEX to 0. */
48 #define SCALE1_WHEN_NO_INDEX 1
51 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
52 static int fits_in_signed_byte
PARAMS ((long));
53 static int fits_in_unsigned_byte
PARAMS ((long));
54 static int fits_in_unsigned_word
PARAMS ((long));
55 static int fits_in_signed_word
PARAMS ((long));
56 static int smallest_imm_type
PARAMS ((long));
57 static int add_prefix
PARAMS ((unsigned int));
58 static void set_16bit_code_flag
PARAMS ((int));
60 static bfd_reloc_code_real_type reloc
61 PARAMS ((int, int, bfd_reloc_code_real_type
));
64 /* 'md_assemble ()' gathers together information and puts it into a
69 /* TM holds the template for the insn were currently assembling. */
72 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
75 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
77 /* OPERANDS gives the number of given operands. */
78 unsigned int operands
;
80 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
81 of given register, displacement, memory operands and immediate
83 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
85 /* TYPES [i] is the type (see above #defines) which tells us how to
86 search through DISPS [i] & IMMS [i] & REGS [i] for the required
88 unsigned int types
[MAX_OPERANDS
];
90 /* Displacements (if given) for each operand. */
91 expressionS
*disps
[MAX_OPERANDS
];
93 /* Relocation type for operand */
95 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
97 int disp_reloc
[MAX_OPERANDS
];
100 /* Immediate operands (if given) for each operand. */
101 expressionS
*imms
[MAX_OPERANDS
];
103 /* Register operands (if given) for each operand. */
104 const reg_entry
*regs
[MAX_OPERANDS
];
106 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
107 the base index byte below. */
108 const reg_entry
*base_reg
;
109 const reg_entry
*index_reg
;
110 unsigned int log2_scale_factor
;
112 /* SEG gives the seg_entries of this insn. They are zero unless
113 explicit segment overrides are given. */
114 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
116 /* PREFIX holds all the given prefix opcodes (usually null).
117 PREFIXES is the number of prefix opcodes. */
118 unsigned int prefixes
;
119 unsigned char prefix
[MAX_PREFIXES
];
121 /* RM and SIB are the modrm byte and the sib byte where the
122 addressing modes of this insn are encoded. */
128 typedef struct _i386_insn i386_insn
;
130 /* List of chars besides those in app.c:symbol_chars that can start an
131 operand. Used to prevent the scrubber eating vital white-space. */
133 const char extra_symbol_chars
[] = "*%-(@";
135 const char extra_symbol_chars
[] = "*%-(";
138 /* This array holds the chars that always start a comment. If the
139 pre-processor is disabled, these aren't very useful */
140 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
141 /* Putting '/' here makes it impossible to use the divide operator.
142 However, we need it for compatibility with SVR4 systems. */
143 const char comment_chars
[] = "#/";
144 #define PREFIX_SEPARATOR '\\'
146 const char comment_chars
[] = "#";
147 #define PREFIX_SEPARATOR '/'
150 /* This array holds the chars that only start a comment at the beginning of
151 a line. If the line seems to have the form '# 123 filename'
152 .line and .file directives will appear in the pre-processed output */
153 /* Note that input_file.c hand checks for '#' at the beginning of the
154 first line of the input file. This is because the compiler outputs
155 #NO_APP at the beginning of its output. */
156 /* Also note that comments started like this one will always work if
157 '/' isn't otherwise defined. */
158 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
159 const char line_comment_chars
[] = "";
161 const char line_comment_chars
[] = "/";
164 const char line_separator_chars
[] = "";
166 /* Chars that can be used to separate mant from exp in floating point nums */
167 const char EXP_CHARS
[] = "eE";
169 /* Chars that mean this number is a floating point constant */
172 const char FLT_CHARS
[] = "fFdDxX";
174 /* tables for lexical analysis */
175 static char opcode_chars
[256];
176 static char register_chars
[256];
177 static char operand_chars
[256];
178 static char identifier_chars
[256];
179 static char digit_chars
[256];
182 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
183 #define is_operand_char(x) (operand_chars[(unsigned char) x])
184 #define is_register_char(x) (register_chars[(unsigned char) x])
185 #define is_space_char(x) ((x) == ' ')
186 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
187 #define is_digit_char(x) (digit_chars[(unsigned char) x])
189 /* put here all non-digit non-letter charcters that may occur in an operand */
190 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
192 /* md_assemble() always leaves the strings it's passed unaltered. To
193 effect this we maintain a stack of saved characters that we've smashed
194 with '\0's (indicating end of strings for various sub-fields of the
195 assembler instruction). */
196 static char save_stack
[32];
197 static char *save_stack_p
; /* stack pointer */
198 #define END_STRING_AND_SAVE(s) \
199 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
200 #define RESTORE_END_STRING(s) \
201 do { *(s) = *--save_stack_p; } while (0)
203 /* The instruction we're assembling. */
206 /* Possible templates for current insn. */
207 static const templates
*current_templates
;
209 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
210 static expressionS disp_expressions
[2], im_expressions
[2];
212 static int this_operand
; /* current operand we are working on */
214 static int flag_do_long_jump
; /* FIXME what does this do? */
216 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
218 /* Interface to relax_segment.
219 There are 2 relax states for 386 jump insns: one for conditional &
220 one for unconditional jumps. This is because the these two types
221 of jumps add different sizes to frags when we're figuring out what
222 sort of jump to choose to reach a given label. */
225 #define COND_JUMP 1 /* conditional jump */
226 #define UNCOND_JUMP 2 /* unconditional jump */
230 #define SMALL16 (SMALL|CODE16)
232 #define BIG16 (BIG|CODE16)
236 #define INLINE __inline__
242 #define ENCODE_RELAX_STATE(type,size) \
243 ((relax_substateT)((type<<2) | (size)))
244 #define SIZE_FROM_RELAX_STATE(s) \
245 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
247 /* This table is used by relax_frag to promote short jumps to long
248 ones where necessary. SMALL (short) jumps may be promoted to BIG
249 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
250 don't allow a short jump in a 32 bit code segment to be promoted to
251 a 16 bit offset jump because it's slower (requires data size
252 prefix), and doesn't work, unless the destination is in the bottom
253 64k of the code segment (The top 16 bits of eip are zeroed). */
255 const relax_typeS md_relax_table
[] =
258 1) most positive reach of this state,
259 2) most negative reach of this state,
260 3) how many bytes this mode will add to the size of the current frag
261 4) which index into the table to try if we can't fit into this one.
268 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
269 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
270 /* dword conditionals adds 4 bytes to frag:
271 1 extra opcode byte, 3 extra displacement bytes. */
273 /* word conditionals add 2 bytes to frag:
274 1 extra opcode byte, 1 extra displacement byte. */
277 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
278 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
279 /* dword jmp adds 3 bytes to frag:
280 0 extra opcode bytes, 3 extra displacement bytes. */
282 /* word jmp adds 1 byte to frag:
283 0 extra opcode bytes, 1 extra displacement byte. */
290 i386_align_code (fragP
, count
)
294 /* Various efficient no-op patterns for aligning code labels. */
295 /* Note: Don't try to assemble the instructions in the comments. */
296 /* 0L and 0w are not legal */
297 static const char f32_1
[] =
299 static const char f32_2
[] =
300 {0x89,0xf6}; /* movl %esi,%esi */
301 static const char f32_3
[] =
302 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
303 static const char f32_4
[] =
304 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
305 static const char f32_5
[] =
307 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
308 static const char f32_6
[] =
309 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
310 static const char f32_7
[] =
311 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
312 static const char f32_8
[] =
314 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
315 static const char f32_9
[] =
316 {0x89,0xf6, /* movl %esi,%esi */
317 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
318 static const char f32_10
[] =
319 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
320 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
321 static const char f32_11
[] =
322 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
323 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
324 static const char f32_12
[] =
325 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
326 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
327 static const char f32_13
[] =
328 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
329 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
330 static const char f32_14
[] =
331 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
332 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
333 static const char f32_15
[] =
334 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
335 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
336 static const char f16_4
[] =
337 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
338 static const char f16_5
[] =
340 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
341 static const char f16_6
[] =
342 {0x89,0xf6, /* mov %si,%si */
343 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
344 static const char f16_7
[] =
345 {0x8d,0x74,0x00, /* lea 0(%si),%si */
346 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
347 static const char f16_8
[] =
348 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
349 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
350 static const char *const f32_patt
[] = {
351 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
352 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
354 static const char *const f16_patt
[] = {
355 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
356 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
359 if (count
> 0 && count
<= 15)
363 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
364 f16_patt
[count
- 1], count
);
365 if (count
> 8) /* adjust jump offset */
366 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
369 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
370 f32_patt
[count
- 1], count
);
371 fragP
->fr_var
= count
;
375 static char *output_invalid
PARAMS ((int c
));
376 static int i386_operand
PARAMS ((char *operand_string
));
377 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
380 static void s_bss
PARAMS ((int));
383 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
385 static INLINE
unsigned int
386 mode_from_disp_size (t
)
389 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
393 fits_in_signed_byte (num
)
396 return (num
>= -128) && (num
<= 127);
397 } /* fits_in_signed_byte() */
400 fits_in_unsigned_byte (num
)
403 return (num
& 0xff) == num
;
404 } /* fits_in_unsigned_byte() */
407 fits_in_unsigned_word (num
)
410 return (num
& 0xffff) == num
;
411 } /* fits_in_unsigned_word() */
414 fits_in_signed_word (num
)
417 return (-32768 <= num
) && (num
<= 32767);
418 } /* fits_in_signed_word() */
421 smallest_imm_type (num
)
425 /* This code is disabled because all the Imm1 forms in the opcode table
426 are slower on the i486, and they're the versions with the implicitly
427 specified single-position displacement, which has another syntax if
428 you really want to use that form. If you really prefer to have the
429 one-byte-shorter Imm1 form despite these problems, re-enable this
432 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
434 return (fits_in_signed_byte (num
)
435 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
436 : fits_in_unsigned_byte (num
)
437 ? (Imm8
| Imm16
| Imm32
)
438 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
441 } /* smallest_imm_type() */
443 /* Returns 0 if attempting to add a prefix where one from the same
444 class already exists, 1 if non rep/repne added, 2 if rep/repne
458 case CS_PREFIX_OPCODE
:
459 case DS_PREFIX_OPCODE
:
460 case ES_PREFIX_OPCODE
:
461 case FS_PREFIX_OPCODE
:
462 case GS_PREFIX_OPCODE
:
463 case SS_PREFIX_OPCODE
:
467 case REPNE_PREFIX_OPCODE
:
468 case REPE_PREFIX_OPCODE
:
471 case LOCK_PREFIX_OPCODE
:
479 case ADDR_PREFIX_OPCODE
:
483 case DATA_PREFIX_OPCODE
:
490 as_bad (_("same type of prefix used twice"));
495 i
.prefix
[q
] = prefix
;
500 set_16bit_code_flag (new_16bit_code_flag
)
501 int new_16bit_code_flag
;
503 flag_16bit_code
= new_16bit_code_flag
;
506 const pseudo_typeS md_pseudo_table
[] =
511 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
512 {"align", s_align_bytes
, 0},
514 {"align", s_align_ptwo
, 0},
516 {"ffloat", float_cons
, 'f'},
517 {"dfloat", float_cons
, 'd'},
518 {"tfloat", float_cons
, 'x'},
520 {"noopt", s_ignore
, 0},
521 {"optim", s_ignore
, 0},
522 {"code16", set_16bit_code_flag
, 1},
523 {"code32", set_16bit_code_flag
, 0},
527 /* for interface with expression () */
528 extern char *input_line_pointer
;
530 /* hash table for opcode lookup */
531 static struct hash_control
*op_hash
;
532 /* hash table for register lookup */
533 static struct hash_control
*reg_hash
;
539 const char *hash_err
;
541 /* initialize op_hash hash table */
542 op_hash
= hash_new ();
545 register const template *optab
;
546 register templates
*core_optab
;
548 optab
= i386_optab
; /* setup for loop */
549 core_optab
= (templates
*) xmalloc (sizeof (templates
));
550 core_optab
->start
= optab
;
555 if (optab
->name
== NULL
556 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
558 /* different name --> ship out current template list;
559 add to hash table; & begin anew */
560 core_optab
->end
= optab
;
561 hash_err
= hash_insert (op_hash
,
567 as_fatal (_("Internal Error: Can't hash %s: %s"),
571 if (optab
->name
== NULL
)
573 core_optab
= (templates
*) xmalloc (sizeof (templates
));
574 core_optab
->start
= optab
;
579 /* initialize reg_hash hash table */
580 reg_hash
= hash_new ();
582 register const reg_entry
*regtab
;
584 for (regtab
= i386_regtab
;
585 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
588 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
594 /* fill in lexical tables: opcode_chars, operand_chars. */
599 for (c
= 0; c
< 256; c
++)
605 register_chars
[c
] = c
;
606 operand_chars
[c
] = c
;
608 else if (islower (c
))
611 register_chars
[c
] = c
;
612 operand_chars
[c
] = c
;
614 else if (isupper (c
))
616 opcode_chars
[c
] = tolower (c
);
617 register_chars
[c
] = opcode_chars
[c
];
618 operand_chars
[c
] = c
;
621 if (isalpha (c
) || isdigit (c
))
622 identifier_chars
[c
] = c
;
626 identifier_chars
['@'] = '@';
628 register_chars
[')'] = ')';
629 register_chars
['('] = '(';
630 digit_chars
['-'] = '-';
631 identifier_chars
['_'] = '_';
632 identifier_chars
['.'] = '.';
634 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
635 operand_chars
[(unsigned char) *p
] = *p
;
638 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
639 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
641 record_alignment (text_section
, 2);
642 record_alignment (data_section
, 2);
643 record_alignment (bss_section
, 2);
649 i386_print_statistics (file
)
652 hash_print_statistics (file
, "i386 opcode", op_hash
);
653 hash_print_statistics (file
, "i386 register", reg_hash
);
659 /* debugging routines for md_assemble */
660 static void pi
PARAMS ((char *, i386_insn
*));
661 static void pte
PARAMS ((template *));
662 static void pt
PARAMS ((unsigned int));
663 static void pe
PARAMS ((expressionS
*));
664 static void ps
PARAMS ((symbolS
*));
671 register template *p
;
674 fprintf (stdout
, "%s: template ", line
);
676 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
677 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
678 fprintf (stdout
, " base %x index %x scale %x\n",
679 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
680 for (i
= 0; i
< x
->operands
; i
++)
682 fprintf (stdout
, " #%d: ", i
+ 1);
684 fprintf (stdout
, "\n");
686 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
687 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
688 if (x
->types
[i
] & Imm
)
690 if (x
->types
[i
] & Disp
)
700 fprintf (stdout
, " %d operands ", t
->operands
);
701 fprintf (stdout
, "opcode %x ",
703 if (t
->extension_opcode
!= None
)
704 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
705 if (t
->opcode_modifier
& D
)
706 fprintf (stdout
, "D");
707 if (t
->opcode_modifier
& W
)
708 fprintf (stdout
, "W");
709 fprintf (stdout
, "\n");
710 for (i
= 0; i
< t
->operands
; i
++)
712 fprintf (stdout
, " #%d type ", i
+ 1);
713 pt (t
->operand_types
[i
]);
714 fprintf (stdout
, "\n");
722 fprintf (stdout
, " operation %d\n", e
->X_op
);
723 fprintf (stdout
, " add_number %d (%x)\n",
724 e
->X_add_number
, e
->X_add_number
);
727 fprintf (stdout
, " add_symbol ");
728 ps (e
->X_add_symbol
);
729 fprintf (stdout
, "\n");
733 fprintf (stdout
, " op_symbol ");
735 fprintf (stdout
, "\n");
743 fprintf (stdout
, "%s type %s%s",
745 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
746 segment_name (S_GET_SEGMENT (s
)));
765 { BaseIndex
, "BaseIndex" },
769 { InOutPortReg
, "InOutPortReg" },
770 { ShiftCount
, "ShiftCount" },
771 { Control
, "control reg" },
772 { Test
, "test reg" },
773 { Debug
, "debug reg" },
774 { FloatReg
, "FReg" },
775 { FloatAcc
, "FAcc" },
779 { JumpAbsolute
, "Jump Absolute" },
789 register struct type_name
*ty
;
793 fprintf (stdout
, _("Unknown"));
797 for (ty
= type_names
; ty
->mask
; ty
++)
799 fprintf (stdout
, "%s, ", ty
->tname
);
804 #endif /* DEBUG386 */
807 tc_i386_force_relocation (fixp
)
811 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
812 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
817 return fixp
->fx_r_type
==7;
822 static bfd_reloc_code_real_type
823 reloc (size
, pcrel
, other
)
826 bfd_reloc_code_real_type other
;
828 if (other
!= NO_RELOC
) return other
;
834 case 1: return BFD_RELOC_8_PCREL
;
835 case 2: return BFD_RELOC_16_PCREL
;
836 case 4: return BFD_RELOC_32_PCREL
;
838 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
844 case 1: return BFD_RELOC_8
;
845 case 2: return BFD_RELOC_16
;
846 case 4: return BFD_RELOC_32
;
848 as_bad (_("Can not do %d byte relocation"), size
);
851 return BFD_RELOC_NONE
;
855 * Here we decide which fixups can be adjusted to make them relative to
856 * the beginning of the section instead of the symbol. Basically we need
857 * to make sure that the dynamic relocations are done correctly, so in
858 * some cases we force the original symbol to be used.
861 tc_i386_fix_adjustable(fixP
)
865 /* Prevent all adjustments to global symbols. */
866 if (S_IS_EXTERN (fixP
->fx_addsy
))
868 if (S_IS_WEAK (fixP
->fx_addsy
))
871 /* adjust_reloc_syms doesn't know about the GOT */
872 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
873 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
874 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
875 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
876 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
881 #define reloc(SIZE,PCREL,OTHER) 0
882 #define BFD_RELOC_16 0
883 #define BFD_RELOC_32 0
884 #define BFD_RELOC_16_PCREL 0
885 #define BFD_RELOC_32_PCREL 0
886 #define BFD_RELOC_386_PLT32 0
887 #define BFD_RELOC_386_GOT32 0
888 #define BFD_RELOC_386_GOTOFF 0
891 /* This is the guts of the machine-dependent assembler. LINE points to a
892 machine dependent instruction. This function is supposed to emit
893 the frags/bytes it assembles to. */
899 /* Points to template once we've found it. */
902 /* Count the size of the instruction generated. */
907 /* Initialize globals. */
908 memset (&i
, '\0', sizeof (i
));
909 for (j
= 0; j
< MAX_OPERANDS
; j
++)
910 i
.disp_reloc
[j
] = NO_RELOC
;
911 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
912 memset (im_expressions
, '\0', sizeof (im_expressions
));
913 save_stack_p
= save_stack
; /* reset stack pointer */
915 /* First parse an opcode & call i386_operand for the operands.
916 We assume that the scrubber has arranged it so that line[0] is the valid
917 start of a (possibly prefixed) opcode. */
919 char opcode
[MAX_OPCODE_SIZE
];
921 char *token_start
= l
;
924 /* Non-zero if we found a prefix only acceptable with string insns. */
925 const char *expecting_string_instruction
= NULL
;
930 while ((*opp
= opcode_chars
[(unsigned char) *l
]) != 0)
933 if (opp
>= opcode
+ sizeof (opcode
))
935 as_bad (_("no such 386 instruction: `%s'"), token_start
);
940 if (!is_space_char (*l
)
942 && *l
!= PREFIX_SEPARATOR
)
944 as_bad (_("invalid character %s in opcode"),
945 output_invalid (*l
));
948 if (token_start
== l
)
950 if (*l
== PREFIX_SEPARATOR
)
951 as_bad (_("expecting prefix; got nothing"));
953 as_bad (_("expecting opcode; got nothing"));
957 /* Look up instruction (or prefix) via hash table. */
958 current_templates
= hash_find (op_hash
, opcode
);
960 if (*l
!= END_OF_INSN
961 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
963 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
965 /* If we are in 16-bit mode, do not allow addr16 or data16.
966 Similarly, in 32-bit mode, do not allow addr32 or data32. */
967 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
968 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
971 as_bad (_("redundant %s prefix"),
972 current_templates
->start
->name
);
975 /* Add prefix, checking for repeated prefixes. */
976 switch (add_prefix (current_templates
->start
->base_opcode
))
981 expecting_string_instruction
=
982 current_templates
->start
->name
;
985 /* Skip past PREFIX_SEPARATOR and reset token_start. */
992 if (!current_templates
)
994 /* See if we can get a match by trimming off a suffix. */
997 case DWORD_OPCODE_SUFFIX
:
998 case WORD_OPCODE_SUFFIX
:
999 case BYTE_OPCODE_SUFFIX
:
1000 case SHORT_OPCODE_SUFFIX
:
1001 #if LONG_OPCODE_SUFFIX != DWORD_OPCODE_SUFFIX
1002 case LONG_OPCODE_SUFFIX
:
1006 current_templates
= hash_find (op_hash
, opcode
);
1008 if (!current_templates
)
1010 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1015 /* check for rep/repne without a string instruction */
1016 if (expecting_string_instruction
1017 && !(current_templates
->start
->opcode_modifier
& IsString
))
1019 as_bad (_("expecting string instruction after `%s'"),
1020 expecting_string_instruction
);
1024 /* There may be operands to parse. */
1025 if (*l
!= END_OF_INSN
)
1027 /* parse operands */
1029 /* 1 if operand is pending after ','. */
1030 unsigned int expecting_operand
= 0;
1032 /* Non-zero if operand parens not balanced. */
1033 unsigned int paren_not_balanced
;
1037 /* skip optional white space before operand */
1038 if (is_space_char (*l
))
1040 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1042 as_bad (_("invalid character %s before operand %d"),
1043 output_invalid (*l
),
1047 token_start
= l
; /* after white space */
1048 paren_not_balanced
= 0;
1049 while (paren_not_balanced
|| *l
!= ',')
1051 if (*l
== END_OF_INSN
)
1053 if (paren_not_balanced
)
1055 as_bad (_("unbalanced parenthesis in operand %d."),
1060 break; /* we are done */
1062 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1064 as_bad (_("invalid character %s in operand %d"),
1065 output_invalid (*l
),
1070 ++paren_not_balanced
;
1072 --paren_not_balanced
;
1075 if (l
!= token_start
)
1076 { /* yes, we've read in another operand */
1077 unsigned int operand_ok
;
1078 this_operand
= i
.operands
++;
1079 if (i
.operands
> MAX_OPERANDS
)
1081 as_bad (_("spurious operands; (%d operands/instruction max)"),
1085 /* now parse operand adding info to 'i' as we go along */
1086 END_STRING_AND_SAVE (l
);
1087 operand_ok
= i386_operand (token_start
);
1088 RESTORE_END_STRING (l
); /* restore old contents */
1094 if (expecting_operand
)
1096 expecting_operand_after_comma
:
1097 as_bad (_("expecting operand after ','; got nothing"));
1102 as_bad (_("expecting operand before ','; got nothing"));
1107 /* now *l must be either ',' or END_OF_INSN */
1110 if (*++l
== END_OF_INSN
)
1111 { /* just skip it, if it's \n complain */
1112 goto expecting_operand_after_comma
;
1114 expecting_operand
= 1;
1117 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1121 /* Now we've parsed the opcode into a set of templates, and have the
1124 Next, we find a template that matches the given insn,
1125 making sure the overlap of the given operands types is consistent
1126 with the template operand types. */
1128 #define MATCH(overlap, given, template) \
1130 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1131 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1133 /* If given types r0 and r1 are registers they must be of the same type
1134 unless the expected operand type register overlap is null.
1135 Note that Acc in a template matches every size of reg. */
1136 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1137 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1138 ((g0) & Reg) == ((g1) & Reg) || \
1139 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1142 register unsigned int overlap0
, overlap1
;
1144 unsigned int overlap2
;
1145 unsigned int found_reverse_match
;
1151 found_reverse_match
= 0;
1152 suffix_check
= (i
.suffix
== BYTE_OPCODE_SUFFIX
1154 : (i
.suffix
== WORD_OPCODE_SUFFIX
1156 : (i
.suffix
== SHORT_OPCODE_SUFFIX
1158 : (i
.suffix
== LONG_OPCODE_SUFFIX
? No_lSuf
: 0))));
1160 for (t
= current_templates
->start
;
1161 t
< current_templates
->end
;
1164 /* Must have right number of operands, and must not have
1165 disallowed suffix. */
1166 if (i
.operands
!= t
->operands
|| (t
->opcode_modifier
& suffix_check
))
1168 else if (!t
->operands
)
1169 break; /* 0 operands always matches */
1171 overlap0
= i
.types
[0] & t
->operand_types
[0];
1172 switch (t
->operands
)
1175 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1180 overlap1
= i
.types
[1] & t
->operand_types
[1];
1181 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1182 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1183 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1184 t
->operand_types
[0],
1185 overlap1
, i
.types
[1],
1186 t
->operand_types
[1]))
1189 /* check if other direction is valid ... */
1190 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1193 /* try reversing direction of operands */
1194 overlap0
= i
.types
[0] & t
->operand_types
[1];
1195 overlap1
= i
.types
[1] & t
->operand_types
[0];
1196 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1197 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1198 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1199 t
->operand_types
[1],
1200 overlap1
, i
.types
[1],
1201 t
->operand_types
[0]))
1203 /* does not match either direction */
1206 /* found_reverse_match holds which of D or FloatDR
1208 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1211 /* found a forward 2 operand match here */
1212 if (t
->operands
== 3)
1214 /* Here we make use of the fact that there are no
1215 reverse match 3 operand instructions, and all 3
1216 operand instructions only need to be checked for
1217 register consistency between operands 2 and 3. */
1218 overlap2
= i
.types
[2] & t
->operand_types
[2];
1219 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1220 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1221 t
->operand_types
[1],
1222 overlap2
, i
.types
[2],
1223 t
->operand_types
[2]))
1226 /* found either forward/reverse 2 or 3 operand match here:
1227 slip through to break */
1229 break; /* we've found a match; break out of loop */
1230 } /* for (t = ... */
1231 if (t
== current_templates
->end
)
1232 { /* we found no match */
1233 as_bad (_("suffix or operands invalid for `%s'"),
1234 current_templates
->start
->name
);
1238 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1240 /* Warn them that a data or address size prefix doesn't affect
1241 assembly of the next line of code. */
1242 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1245 /* Copy the template we found. */
1247 if (found_reverse_match
)
1249 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1250 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1253 if (i
.tm
.opcode_modifier
& FWait
)
1254 if (! add_prefix (FWAIT_OPCODE
))
1257 /* Check string instruction segment overrides */
1258 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1260 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1261 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1263 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1265 as_bad (_("`%s' operand %d must use `%%es' segment"),
1270 /* There's only ever one segment override allowed per instruction.
1271 This instruction possibly has a legal segment override on the
1272 second operand, so copy the segment to where non-string
1273 instructions store it, allowing common code. */
1274 i
.seg
[0] = i
.seg
[1];
1276 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1278 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1280 as_bad (_("`%s' operand %d must use `%%es' segment"),
1288 /* If matched instruction specifies an explicit opcode suffix, use
1290 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1292 if (i
.tm
.opcode_modifier
& Size16
)
1293 i
.suffix
= WORD_OPCODE_SUFFIX
;
1295 i
.suffix
= DWORD_OPCODE_SUFFIX
;
1297 else if (i
.reg_operands
)
1299 /* If there's no opcode suffix we try to invent one based on
1300 register operands. */
1303 /* We take i.suffix from the last register operand specified,
1304 Destination register type is more significant than source
1307 for (op
= i
.operands
; --op
>= 0; )
1308 if (i
.types
[op
] & Reg
)
1310 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_OPCODE_SUFFIX
:
1311 (i
.types
[op
] & Reg16
) ? WORD_OPCODE_SUFFIX
:
1312 DWORD_OPCODE_SUFFIX
);
1316 else if (i
.suffix
== BYTE_OPCODE_SUFFIX
)
1319 for (op
= i
.operands
; --op
>= 0; )
1321 /* If this is an eight bit register, it's OK. If it's
1322 the 16 or 32 bit version of an eight bit register,
1323 we will just use the low portion, and that's OK too. */
1324 if (i
.types
[op
] & Reg8
)
1326 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1328 /* Check that the template allows eight bit regs
1329 This kills insns such as `orb $1,%edx', which
1330 maybe should be allowed. */
1331 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1335 #if REGISTER_WARNINGS
1336 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1337 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1338 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1339 i
.regs
[op
]->reg_name
,
1344 /* Any other register is bad */
1345 if (i
.types
[op
] & (Reg
| RegMMX
| Control
| Debug
| Test
1346 | FloatReg
| FloatAcc
| SReg2
| SReg3
))
1348 as_bad (_("`%%%s' not allowed with `%s%c'"),
1349 i
.regs
[op
]->reg_name
,
1356 else if (i
.suffix
== DWORD_OPCODE_SUFFIX
)
1359 for (op
= i
.operands
; --op
>= 0; )
1360 /* Reject eight bit registers, except where the template
1361 requires them. (eg. movzb) */
1362 if ((i
.types
[op
] & Reg8
) != 0
1363 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1365 as_bad (_("`%%%s' not allowed with `%s%c'"),
1366 i
.regs
[op
]->reg_name
,
1371 #if REGISTER_WARNINGS
1372 /* Warn if the e prefix on a general reg is missing. */
1373 else if ((i
.types
[op
] & Reg16
) != 0
1374 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1376 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1377 (i
.regs
[op
] + 8)->reg_name
,
1378 i
.regs
[op
]->reg_name
,
1383 else if (i
.suffix
== WORD_OPCODE_SUFFIX
)
1386 for (op
= i
.operands
; --op
>= 0; )
1387 /* Reject eight bit registers, except where the template
1388 requires them. (eg. movzb) */
1389 if ((i
.types
[op
] & Reg8
) != 0
1390 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1392 as_bad (_("`%%%s' not allowed with `%s%c'"),
1393 i
.regs
[op
]->reg_name
,
1398 #if REGISTER_WARNINGS
1399 /* Warn if the e prefix on a general reg is present. */
1400 else if ((i
.types
[op
] & Reg32
) != 0
1401 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1403 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1404 (i
.regs
[op
] - 8)->reg_name
,
1405 i
.regs
[op
]->reg_name
,
1414 /* Make still unresolved immediate matches conform to size of immediate
1415 given in i.suffix. Note: overlap2 cannot be an immediate! */
1416 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1417 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1418 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1422 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1423 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1425 else if (overlap0
== (Imm16
| Imm32
))
1428 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1432 as_bad (_("no opcode suffix given; can't determine immediate size"));
1436 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1437 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1438 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1442 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1443 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1445 else if (overlap1
== (Imm16
| Imm32
))
1448 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1452 as_bad (_("no opcode suffix given; can't determine immediate size"));
1456 assert ((overlap2
& Imm
) == 0);
1458 i
.types
[0] = overlap0
;
1459 if (overlap0
& ImplicitRegister
)
1461 if (overlap0
& Imm1
)
1462 i
.imm_operands
= 0; /* kludge for shift insns */
1464 i
.types
[1] = overlap1
;
1465 if (overlap1
& ImplicitRegister
)
1468 i
.types
[2] = overlap2
;
1469 if (overlap2
& ImplicitRegister
)
1472 /* Finalize opcode. First, we change the opcode based on the operand
1473 size given by i.suffix: we never have to change things for byte insns,
1474 or when no opcode suffix is need to size the operands. */
1476 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1478 as_bad (_("no opcode suffix given and no register operands; can't size instruction"));
1482 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1484 /* Select between byte and word/dword operations. */
1485 if (i
.tm
.opcode_modifier
& W
)
1487 if (i
.tm
.opcode_modifier
& ShortForm
)
1488 i
.tm
.base_opcode
|= 8;
1490 i
.tm
.base_opcode
|= 1;
1492 /* Now select between word & dword operations via the operand
1493 size prefix, except for instructions that will ignore this
1495 if ((i
.suffix
== DWORD_OPCODE_SUFFIX
1496 || i
.suffix
== LONG_OPCODE_SUFFIX
) == flag_16bit_code
1497 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1499 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1500 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1501 prefix
= ADDR_PREFIX_OPCODE
;
1503 if (! add_prefix (prefix
))
1506 /* Size floating point instruction. */
1507 if (i
.suffix
== LONG_OPCODE_SUFFIX
)
1509 if (i
.tm
.opcode_modifier
& FloatMF
)
1510 i
.tm
.base_opcode
^= 4;
1514 /* For insns with operands there are more diddles to do to the opcode. */
1517 /* Default segment register this instruction will use
1518 for memory accesses. 0 means unknown.
1519 This is only for optimizing out unnecessary segment overrides. */
1520 const seg_entry
*default_seg
= 0;
1522 /* If we found a reverse match we must alter the opcode
1523 direction bit. found_reverse_match holds bits to change
1524 (different for int & float insns). */
1526 i
.tm
.base_opcode
^= found_reverse_match
;
1528 /* The imul $imm, %reg instruction is converted into
1529 imul $imm, %reg, %reg, and the clr %reg instruction
1530 is converted into xor %reg, %reg. */
1531 if (i
.tm
.opcode_modifier
& regKludge
)
1533 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1534 /* Pretend we saw the extra register operand. */
1535 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1539 if (i
.tm
.opcode_modifier
& ShortForm
)
1541 /* The register or float register operand is in operand 0 or 1. */
1542 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1543 /* Register goes in low 3 bits of opcode. */
1544 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1545 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1547 /* Warn about some common errors, but press on regardless.
1548 The first case can be generated by gcc (<= 2.8.1). */
1549 if (i
.operands
== 2)
1551 /* reversed arguments on faddp, fsubp, etc. */
1552 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1553 i
.regs
[1]->reg_name
,
1554 i
.regs
[0]->reg_name
);
1558 /* extraneous `l' suffix on fp insn */
1559 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1560 i
.regs
[0]->reg_name
);
1564 else if (i
.tm
.opcode_modifier
& Modrm
)
1566 /* The opcode is completed (modulo i.tm.extension_opcode which
1567 must be put into the modrm byte).
1568 Now, we make the modrm & index base bytes based on all the
1569 info we've collected. */
1571 /* i.reg_operands MUST be the number of real register operands;
1572 implicit registers do not count. */
1573 if (i
.reg_operands
== 2)
1575 unsigned int source
, dest
;
1576 source
= ((i
.types
[0]
1587 /* Certain instructions expect the destination to be
1588 in the i.rm.reg field. This is by far the
1589 exceptional case. For these instructions, if the
1590 source operand is a register, we must reverse the
1591 i.rm.reg and i.rm.regmem fields. We accomplish
1592 this by pretending that the two register operands
1593 were given in the reverse order. */
1594 if (i
.tm
.opcode_modifier
& ReverseRegRegmem
)
1596 const reg_entry
*tmp
= i
.regs
[source
];
1597 i
.regs
[source
] = i
.regs
[dest
];
1602 /* We must be careful to make sure that all
1603 segment/control/test/debug/MMX registers go into
1604 the i.rm.reg field (despite whether they are
1605 source or destination operands). */
1606 if (i
.regs
[dest
]->reg_type
1607 & (SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
1609 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1610 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1614 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1615 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1619 { /* if it's not 2 reg operands... */
1622 unsigned int fake_zero_displacement
= 0;
1623 unsigned int op
= ((i
.types
[0] & AnyMem
)
1625 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1632 if (! i
.disp_operands
)
1633 fake_zero_displacement
= 1;
1636 /* Operand is just <disp> */
1637 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1639 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1640 i
.types
[op
] &= ~Disp
;
1641 i
.types
[op
] |= Disp16
;
1645 i
.rm
.regmem
= NO_BASE_REGISTER
;
1646 i
.types
[op
] &= ~Disp
;
1647 i
.types
[op
] |= Disp32
;
1650 else /* ! i.base_reg && i.index_reg */
1652 i
.sib
.index
= i
.index_reg
->reg_num
;
1653 i
.sib
.base
= NO_BASE_REGISTER
;
1654 i
.sib
.scale
= i
.log2_scale_factor
;
1655 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1656 i
.types
[op
] &= ~Disp
;
1657 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1660 else if (i
.base_reg
->reg_type
& Reg16
)
1662 switch (i
.base_reg
->reg_num
)
1667 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1668 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1675 if ((i
.types
[op
] & Disp
) == 0)
1677 /* fake (%bp) into 0(%bp) */
1678 i
.types
[op
] |= Disp8
;
1679 fake_zero_displacement
= 1;
1682 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1683 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1685 default: /* (%si) -> 4 or (%di) -> 5 */
1686 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1688 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1690 else /* i.base_reg and 32 bit mode */
1692 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1693 i
.sib
.base
= i
.base_reg
->reg_num
;
1694 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1697 if (i
.disp_operands
== 0)
1699 fake_zero_displacement
= 1;
1700 i
.types
[op
] |= Disp8
;
1703 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1707 i
.sib
.scale
= i
.log2_scale_factor
;
1710 /* <disp>(%esp) becomes two byte modrm
1711 with no index register. We've already
1712 stored the code for esp in i.rm.regmem
1713 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1714 base register besides %esp will not use
1715 the extra modrm byte. */
1716 i
.sib
.index
= NO_INDEX_REGISTER
;
1717 #if ! SCALE1_WHEN_NO_INDEX
1718 /* Another case where we force the second
1720 if (i
.log2_scale_factor
)
1721 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1726 i
.sib
.index
= i
.index_reg
->reg_num
;
1727 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1729 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1732 if (fake_zero_displacement
)
1734 /* Fakes a zero displacement assuming that i.types[op]
1735 holds the correct displacement size. */
1736 exp
= &disp_expressions
[i
.disp_operands
++];
1738 exp
->X_op
= O_constant
;
1739 exp
->X_add_number
= 0;
1740 exp
->X_add_symbol
= (symbolS
*) 0;
1741 exp
->X_op_symbol
= (symbolS
*) 0;
1745 /* Fill in i.rm.reg or i.rm.regmem field with register
1746 operand (if any) based on i.tm.extension_opcode.
1747 Again, we must be careful to make sure that
1748 segment/control/debug/test/MMX registers are coded
1749 into the i.rm.reg field. */
1754 & (Reg
| SReg2
| SReg3
| Control
| Debug
1758 & (Reg
| SReg2
| SReg3
| Control
| Debug
1762 /* If there is an extension opcode to put here, the
1763 register number must be put into the regmem field. */
1764 if (i
.tm
.extension_opcode
!= None
)
1765 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
1767 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
1769 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1770 we must set it to 3 to indicate this is a register
1771 operand in the regmem field. */
1772 if (!i
.mem_operands
)
1776 /* Fill in i.rm.reg field with extension opcode (if any). */
1777 if (i
.tm
.extension_opcode
!= None
)
1778 i
.rm
.reg
= i
.tm
.extension_opcode
;
1781 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
1783 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1785 as_bad (_("you can't `pop %%cs'"));
1788 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1790 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
1794 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
1796 /* For the string instructions that allow a segment override
1797 on one of their operands, the default segment is ds. */
1801 /* If a segment was explicitly specified,
1802 and the specified segment is not the default,
1803 use an opcode prefix to select it.
1804 If we never figured out what the default segment is,
1805 then default_seg will be zero at this point,
1806 and the specified segment prefix will always be used. */
1807 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
1809 if (! add_prefix (i
.seg
[0]->seg_prefix
))
1813 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1815 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc */
1816 as_warn (_("translating to `%sp'"), i
.tm
.name
);
1820 /* Handle conversion of 'int $3' --> special int3 insn. */
1821 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1823 i
.tm
.base_opcode
= INT3_OPCODE
;
1827 /* We are ready to output the insn. */
1832 if (i
.tm
.opcode_modifier
& Jump
)
1834 long n
= (long) i
.disps
[0]->X_add_number
;
1835 int prefix
= (i
.prefix
[DATA_PREFIX
] != 0);
1843 if (flag_16bit_code
)
1846 if (i
.prefixes
!= 0)
1847 as_warn (_("skipping prefixes on this instruction"));
1849 if (i
.disps
[0]->X_op
== O_constant
)
1851 if (fits_in_signed_byte (n
))
1855 p
[0] = i
.tm
.base_opcode
;
1860 /* Use 16-bit jumps only for 16-bit code,
1861 because text segments are limited to 64K anyway;
1862 Use 32-bit jumps for 32-bit code, because they're faster,
1863 and a 16-bit jump will clear the top 16 bits of %eip. */
1864 int jmp_size
= code16
? 2 : 4;
1865 if (code16
&& !fits_in_signed_word (n
))
1867 as_bad (_("16-bit jump out of range"));
1871 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
1873 /* unconditional jump */
1874 insn_size
+= prefix
+ 1 + jmp_size
;
1875 p
= frag_more (prefix
+ 1 + jmp_size
);
1877 *p
++ = DATA_PREFIX_OPCODE
;
1879 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
1883 /* conditional jump */
1884 insn_size
+= prefix
+ 2 + jmp_size
;
1885 p
= frag_more (prefix
+ 2 + jmp_size
);
1887 *p
++ = DATA_PREFIX_OPCODE
;
1888 *p
++ = TWO_BYTE_OPCODE_ESCAPE
;
1889 *p
++ = i
.tm
.base_opcode
+ 0x10;
1890 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
1896 int size
= code16
? 2 : 4;
1898 /* It's a symbol; end frag & setup for relax.
1899 Make sure there are more than 6 chars left in the current frag;
1900 if not we'll have to start a new one. */
1901 frag_grow (prefix
+ 1 + 2 + size
);
1902 insn_size
+= 1 + prefix
;
1903 p
= frag_more (1 + prefix
);
1905 *p
++ = DATA_PREFIX_OPCODE
;
1906 *p
= i
.tm
.base_opcode
;
1907 frag_var (rs_machine_dependent
,
1908 prefix
+ 2 + size
, /* 2 opcode/prefix + displacement */
1910 ((unsigned char) *p
== JUMP_PC_RELATIVE
1911 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
1912 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
1913 i
.disps
[0]->X_add_symbol
,
1917 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
1919 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
1920 long n
= (long) i
.disps
[0]->X_add_number
;
1922 if (size
== 1) /* then this is a loop or jecxz type instruction */
1924 if (i
.prefix
[ADDR_PREFIX
])
1927 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
1935 if (i
.prefix
[DATA_PREFIX
])
1938 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
1942 if (flag_16bit_code
)
1949 if (i
.prefixes
!= 0)
1950 as_warn (_("skipping prefixes on this instruction"));
1952 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
1954 insn_size
+= 1 + size
;
1955 p
= frag_more (1 + size
);
1959 insn_size
+= 2 + size
; /* opcode can be at most two bytes */
1960 p
= frag_more (2 + size
);
1961 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1963 *p
++ = i
.tm
.base_opcode
& 0xff;
1965 if (i
.disps
[0]->X_op
== O_constant
)
1967 if (size
== 1 && !fits_in_signed_byte (n
))
1969 as_bad (_("`%s' only takes byte displacement; %ld shortened to %d"),
1972 else if (size
== 2 && !fits_in_signed_word (n
))
1974 as_bad (_("16-bit jump out of range"));
1977 md_number_to_chars (p
, (valueT
) n
, size
);
1981 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1982 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
1986 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
1990 int prefix
= i
.prefix
[DATA_PREFIX
] != 0;
1998 if (flag_16bit_code
)
2002 reloc_type
= BFD_RELOC_32
;
2006 reloc_type
= BFD_RELOC_16
;
2009 if (i
.prefixes
!= 0)
2010 as_warn (_("skipping prefixes on this instruction"));
2012 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2013 p
= frag_more (prefix
+ 1 + 2 + size
);
2015 *p
++ = DATA_PREFIX_OPCODE
;
2016 *p
++ = i
.tm
.base_opcode
;
2017 if (i
.imms
[1]->X_op
== O_constant
)
2019 long n
= (long) i
.imms
[1]->X_add_number
;
2021 if (size
== 2 && !fits_in_unsigned_word (n
))
2023 as_bad (_("16-bit jump out of range"));
2026 md_number_to_chars (p
, (valueT
) n
, size
);
2029 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2030 i
.imms
[1], 0, reloc_type
);
2031 if (i
.imms
[0]->X_op
!= O_constant
)
2032 as_bad (_("can't handle non absolute segment in `%s'"),
2034 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2038 /* Output normal instructions here. */
2041 /* The prefix bytes. */
2043 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2050 md_number_to_chars (p
, (valueT
) *q
, 1);
2054 /* Now the opcode; be careful about word order here! */
2055 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2058 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2060 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2064 /* put out high byte first: can't use md_number_to_chars! */
2065 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2066 *p
= i
.tm
.base_opcode
& 0xff;
2069 { /* opcode is either 3 or 4 bytes */
2070 if (i
.tm
.base_opcode
& 0xff000000)
2074 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2081 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2082 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2083 *p
= (i
.tm
.base_opcode
) & 0xff;
2086 /* Now the modrm byte and sib byte (if present). */
2087 if (i
.tm
.opcode_modifier
& Modrm
)
2091 md_number_to_chars (p
,
2092 (valueT
) (i
.rm
.regmem
<< 0
2096 /* If i.rm.regmem == ESP (4)
2097 && i.rm.mode != (Register mode)
2099 ==> need second modrm byte. */
2100 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2102 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2106 md_number_to_chars (p
,
2107 (valueT
) (i
.sib
.base
<< 0
2109 | i
.sib
.scale
<< 6),
2114 if (i
.disp_operands
)
2116 register unsigned int n
;
2118 for (n
= 0; n
< i
.operands
; n
++)
2122 if (i
.disps
[n
]->X_op
== O_constant
)
2124 if (i
.types
[n
] & Disp8
)
2128 md_number_to_chars (p
,
2129 (valueT
) i
.disps
[n
]->X_add_number
,
2132 else if (i
.types
[n
] & Disp16
)
2136 md_number_to_chars (p
,
2137 (valueT
) i
.disps
[n
]->X_add_number
,
2144 md_number_to_chars (p
,
2145 (valueT
) i
.disps
[n
]->X_add_number
,
2149 else if (i
.types
[n
] & Disp32
)
2153 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2155 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2158 { /* must be Disp16 */
2161 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2163 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2167 } /* end displacement output */
2169 /* output immediate */
2172 register unsigned int n
;
2174 for (n
= 0; n
< i
.operands
; n
++)
2178 if (i
.imms
[n
]->X_op
== O_constant
)
2180 if (i
.types
[n
] & (Imm8
| Imm8S
))
2184 md_number_to_chars (p
,
2185 (valueT
) i
.imms
[n
]->X_add_number
,
2188 else if (i
.types
[n
] & Imm16
)
2192 md_number_to_chars (p
,
2193 (valueT
) i
.imms
[n
]->X_add_number
,
2200 md_number_to_chars (p
,
2201 (valueT
) i
.imms
[n
]->X_add_number
,
2206 { /* not absolute_section */
2207 /* Need a 32-bit fixup (don't support 8bit
2208 non-absolute ims). Try to support other
2214 if (i
.types
[n
] & (Imm8
| Imm8S
))
2216 else if (i
.types
[n
] & Imm16
)
2221 p
= frag_more (size
);
2222 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2223 #ifdef BFD_ASSEMBLER
2224 if (r_type
== BFD_RELOC_32
2226 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2227 && (i
.imms
[n
]->X_op
== O_symbol
2228 || (i
.imms
[n
]->X_op
== O_add
2229 && (i
.imms
[n
]->X_op_symbol
->sy_value
.X_op
2232 r_type
= BFD_RELOC_386_GOTPC
;
2233 i
.imms
[n
]->X_add_number
+= 3;
2236 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2237 i
.imms
[n
], pcrel
, r_type
);
2241 } /* end immediate output */
2249 #endif /* DEBUG386 */
2253 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
2257 i386_operand (operand_string
)
2258 char *operand_string
;
2260 register char *op_string
= operand_string
;
2262 /* We check for an absolute prefix (differentiating,
2263 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
2264 if (*op_string
== ABSOLUTE_PREFIX
)
2267 if (is_space_char (*op_string
))
2269 i
.types
[this_operand
] |= JumpAbsolute
;
2272 /* Check if operand is a register. */
2273 if (*op_string
== REGISTER_PREFIX
)
2275 register const reg_entry
*r
;
2278 r
= parse_register (op_string
, &end_op
);
2281 /* Check for a segment override by searching for ':' after a
2282 segment register. */
2284 if (is_space_char (*op_string
))
2288 if (r
->reg_type
& (SReg2
| SReg3
))
2293 i
.seg
[i
.mem_operands
] = &es
;
2296 i
.seg
[i
.mem_operands
] = &cs
;
2299 i
.seg
[i
.mem_operands
] = &ss
;
2302 i
.seg
[i
.mem_operands
] = &ds
;
2305 i
.seg
[i
.mem_operands
] = &fs
;
2308 i
.seg
[i
.mem_operands
] = &gs
;
2312 /* Skip the ':' and whitespace. */
2314 if (is_space_char (*op_string
))
2317 /* Pretend given string starts here. */
2318 operand_string
= op_string
;
2319 if (!is_digit_char (*op_string
)
2320 && !is_identifier_char (*op_string
)
2321 && *op_string
!= '('
2322 && *op_string
!= ABSOLUTE_PREFIX
)
2324 as_bad (_("bad memory operand `%s'"), op_string
);
2327 /* Handle case of %es:*foo. */
2328 if (*op_string
== ABSOLUTE_PREFIX
)
2331 if (is_space_char (*op_string
))
2333 i
.types
[this_operand
] |= JumpAbsolute
;
2335 goto do_memory_reference
;
2339 as_bad (_("bad segment prefix `%c%s'"),
2340 REGISTER_PREFIX
, r
->reg_name
);
2344 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
2345 i
.regs
[this_operand
] = r
;
2348 else if (*op_string
== IMMEDIATE_PREFIX
)
2349 { /* ... or an immediate */
2350 char *save_input_line_pointer
;
2354 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2356 as_bad (_("only 1 or 2 immediate operands are allowed"));
2360 exp
= &im_expressions
[i
.imm_operands
++];
2361 i
.imms
[this_operand
] = exp
;
2364 if (is_space_char (*op_string
))
2367 save_input_line_pointer
= input_line_pointer
;
2368 input_line_pointer
= op_string
;
2369 exp_seg
= expression (exp
);
2370 if (*input_line_pointer
!= '\0')
2372 /* This should be as_bad, but some versions of gcc, up to
2373 about 2.8 and egcs 1.01, generate a bogus @GOTOFF(%ebx)
2374 in certain cases. Oddly, the code in question turns out
2375 to work correctly anyhow, so we make this just a warning
2376 until those versions of gcc are obsolete. */
2377 as_warn (_("unrecognized characters `%s' in expression"),
2378 input_line_pointer
);
2380 input_line_pointer
= save_input_line_pointer
;
2382 if (exp
->X_op
== O_absent
)
2384 /* missing or bad expr becomes absolute 0 */
2385 as_bad (_("missing or invalid immediate expression `%s' taken as 0"),
2387 exp
->X_op
= O_constant
;
2388 exp
->X_add_number
= 0;
2389 exp
->X_add_symbol
= (symbolS
*) 0;
2390 exp
->X_op_symbol
= (symbolS
*) 0;
2391 i
.types
[this_operand
] |= Imm
;
2393 else if (exp
->X_op
== O_constant
)
2395 i
.types
[this_operand
] |=
2396 smallest_imm_type ((long) exp
->X_add_number
);
2398 /* If a suffix is given, this operand may be shortened. */
2401 case WORD_OPCODE_SUFFIX
:
2402 i
.types
[this_operand
] |= Imm16
;
2404 case BYTE_OPCODE_SUFFIX
:
2405 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2410 else if (exp_seg
!= text_section
2411 && exp_seg
!= data_section
2412 && exp_seg
!= bss_section
2413 && exp_seg
!= undefined_section
2414 #ifdef BFD_ASSEMBLER
2415 && ! bfd_is_com_section (exp_seg
)
2420 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2426 /* This is an address. The size of the address will be
2427 determined later, depending on destination register,
2428 suffix, or the default for the section. We exclude
2429 Imm8S here so that `push $foo' and other instructions
2430 with an Imm8S form will use Imm16 or Imm32. */
2431 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2434 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
2435 || *op_string
== '(')
2437 /* This is a memory reference of some sort. */
2438 char *end_of_operand_string
;
2439 register char *base_string
;
2440 int found_base_index_form
;
2442 /* Start and end of displacement string expression (if found). */
2443 char *displacement_string_start
;
2444 char *displacement_string_end
;
2446 do_memory_reference
:
2447 if ((i
.mem_operands
== 1
2448 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
2449 || i
.mem_operands
== 2)
2451 as_bad (_("too many memory references for `%s'"),
2452 current_templates
->start
->name
);
2456 /* Check for base index form. We detect the base index form by
2457 looking for an ')' at the end of the operand, searching
2458 for the '(' matching it, and finding a REGISTER_PREFIX or ','
2460 found_base_index_form
= 0;
2461 end_of_operand_string
= op_string
+ strlen (op_string
);
2463 --end_of_operand_string
;
2464 if (is_space_char (*end_of_operand_string
))
2465 --end_of_operand_string
;
2467 base_string
= end_of_operand_string
;
2468 if (*base_string
== ')')
2470 unsigned int parens_balanced
= 1;
2471 /* We've already checked that the number of left & right ()'s are
2472 equal, so this loop will not be infinite. */
2476 if (*base_string
== ')')
2478 if (*base_string
== '(')
2481 while (parens_balanced
);
2483 /* If there is a displacement set-up for it to be parsed later. */
2484 displacement_string_start
= op_string
;
2485 displacement_string_end
= base_string
;
2487 /* Skip past '(' and whitespace. */
2489 if (is_space_char (*base_string
))
2492 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
2493 found_base_index_form
= 1;
2496 /* If we can't parse a base index register expression, we've found
2497 a pure displacement expression. We set up displacement_string_start
2498 and displacement_string_end for the code below. */
2499 if (!found_base_index_form
)
2501 displacement_string_start
= op_string
;
2502 displacement_string_end
= end_of_operand_string
+ 1;
2506 i
.types
[this_operand
] |= BaseIndex
;
2508 /* Find base register (if any). */
2509 if (*base_string
!= ',')
2513 /* Trim off the closing ')' so that parse_register won't
2515 END_STRING_AND_SAVE (end_of_operand_string
);
2516 i
.base_reg
= parse_register (base_string
, &end_op
);
2517 RESTORE_END_STRING (end_of_operand_string
);
2519 if (i
.base_reg
== NULL
)
2522 base_string
= end_op
;
2523 if (is_space_char (*base_string
))
2527 /* There may be an index reg or scale factor here. */
2528 if (*base_string
== ',')
2531 if (is_space_char (*base_string
))
2534 if (*base_string
== REGISTER_PREFIX
)
2538 END_STRING_AND_SAVE (end_of_operand_string
);
2539 i
.index_reg
= parse_register (base_string
, &end_op
);
2540 RESTORE_END_STRING (end_of_operand_string
);
2542 if (i
.index_reg
== NULL
)
2545 base_string
= end_op
;
2546 if (is_space_char (*base_string
))
2548 if (*base_string
== ',')
2551 if (is_space_char (*base_string
))
2554 else if (*base_string
!= ')')
2556 as_bad (_("expecting `,' or `)' after index register in `%s'"),
2562 /* Check for scale factor. */
2563 if (isdigit ((unsigned char) *base_string
))
2565 if (isdigit ((unsigned char) base_string
[1]))
2566 goto bad_scale
; /* must be 1 digit scale */
2567 switch (*base_string
)
2570 i
.log2_scale_factor
= 0;
2573 i
.log2_scale_factor
= 1;
2576 i
.log2_scale_factor
= 2;
2579 i
.log2_scale_factor
= 3;
2583 as_bad (_("expecting scale factor of 1, 2, 4 or 8; got `%s'"),
2589 if (is_space_char (*base_string
))
2591 if (*base_string
!= ')')
2593 as_bad (_("expecting `)' after scale factor in `%s'"),
2597 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2599 as_warn (_("scale factor of %d without an index register"),
2600 1 << i
.log2_scale_factor
);
2601 #if SCALE1_WHEN_NO_INDEX
2602 i
.log2_scale_factor
= 0;
2606 else if (!i
.index_reg
)
2608 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
2613 else if (*base_string
!= ')')
2615 as_bad (_("expecting `,' or `)' after base register in `%s'"),
2621 /* If there's an expression begining the operand, parse it,
2622 assuming displacement_string_start and
2623 displacement_string_end are meaningful. */
2624 if (displacement_string_start
!= displacement_string_end
)
2626 register expressionS
*exp
;
2628 char *save_input_line_pointer
;
2629 int bigdisp
= Disp32
;
2631 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2633 i
.types
[this_operand
] |= bigdisp
;
2635 exp
= &disp_expressions
[i
.disp_operands
];
2636 i
.disps
[this_operand
] = exp
;
2637 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2639 save_input_line_pointer
= input_line_pointer
;
2640 input_line_pointer
= displacement_string_start
;
2641 END_STRING_AND_SAVE (displacement_string_end
);
2642 #ifndef GCC_ASM_O_HACK
2643 #define GCC_ASM_O_HACK 0
2646 END_STRING_AND_SAVE (displacement_string_end
+ 1);
2647 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2648 && displacement_string_end
[-1] == '+')
2650 /* This hack is to avoid a warning when using the "o"
2651 constraint within gcc asm statements.
2654 #define _set_tssldt_desc(n,addr,limit,type) \
2655 __asm__ __volatile__ ( \
2657 "movw %w1,2+%0\n\t" \
2659 "movb %b1,4+%0\n\t" \
2660 "movb %4,5+%0\n\t" \
2661 "movb $0,6+%0\n\t" \
2662 "movb %h1,7+%0\n\t" \
2664 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2666 This works great except that the output assembler ends
2667 up looking a bit weird if it turns out that there is
2668 no offset. You end up producing code that looks like:
2681 So here we provide the missing zero.
2684 *displacement_string_end
= '0';
2690 * We can have operands of the form
2691 * <symbol>@GOTOFF+<nnn>
2692 * Take the easy way out here and copy everything
2693 * into a temporary buffer...
2697 cp
= strchr (input_line_pointer
, '@');
2702 if (GOT_symbol
== NULL
)
2703 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2705 tmpbuf
= (char *) alloca ((cp
- input_line_pointer
) + 20);
2707 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2709 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2711 strcpy (tmpbuf
, input_line_pointer
);
2712 strcat (tmpbuf
, cp
+ 1 + 3);
2715 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2717 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2719 strcpy (tmpbuf
, input_line_pointer
);
2720 strcat (tmpbuf
, cp
+ 1 + 6);
2723 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2725 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2727 strcpy (tmpbuf
, input_line_pointer
);
2728 strcat (tmpbuf
, cp
+ 1 + 3);
2732 as_bad (_("Bad reloc specifier `%s' in expression"), cp
+ 1);
2734 /* GOT relocations are not supported in 16 bit mode */
2735 if (flag_16bit_code
)
2736 as_bad (_("GOT relocations not supported in 16 bit mode"));
2738 input_line_pointer
= tmpbuf
;
2743 exp_seg
= expression (exp
);
2745 #ifdef BFD_ASSEMBLER
2746 /* We do this to make sure that the section symbol is in
2747 the symbol table. We will ultimately change the relocation
2748 to be relative to the beginning of the section */
2749 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2751 if (S_IS_LOCAL(exp
->X_add_symbol
)
2752 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2753 section_symbol(exp
->X_add_symbol
->bsym
->section
);
2754 assert (exp
->X_op
== O_symbol
);
2755 exp
->X_op
= O_subtract
;
2756 exp
->X_op_symbol
= GOT_symbol
;
2757 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2761 if (*input_line_pointer
)
2762 as_bad (_("Ignoring junk `%s' after expression"),
2763 input_line_pointer
);
2765 RESTORE_END_STRING (displacement_string_end
+ 1);
2767 RESTORE_END_STRING (displacement_string_end
);
2768 input_line_pointer
= save_input_line_pointer
;
2770 #if 0 /* this is handled in expr. */
2771 if (exp
->X_op
== O_absent
)
2773 /* missing expr becomes absolute 0 */
2774 as_bad (_("missing or invalid displacement `%s' taken as 0"),
2776 exp
->X_op
= O_constant
;
2777 exp
->X_add_number
= 0;
2778 exp
->X_add_symbol
= (symbolS
*) 0;
2779 exp
->X_op_symbol
= (symbolS
*) 0;
2780 i
.types
[this_operand
] |= Disp8
;
2784 if (exp
->X_op
== O_constant
)
2786 if (fits_in_signed_byte (exp
->X_add_number
))
2787 i
.types
[this_operand
] |= Disp8
;
2790 else if (exp_seg
!= text_section
2791 && exp_seg
!= data_section
2792 && exp_seg
!= bss_section
2793 && exp_seg
!= undefined_section
)
2795 goto seg_unimplemented
;
2800 /* Special case for (%dx) while doing input/output op. */
2802 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
2804 && i
.log2_scale_factor
== 0
2805 && i
.seg
[i
.mem_operands
] == 0
2806 && (i
.types
[this_operand
] & Disp
) == 0)
2808 i
.types
[this_operand
] = InOutPortReg
;
2811 /* Make sure the memory operand we've been dealt is valid. */
2812 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2815 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
2816 != (Reg16
|BaseIndex
)))
2818 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
2819 != (Reg16
|BaseIndex
))
2821 && i
.base_reg
->reg_num
< 6
2822 && i
.index_reg
->reg_num
>= 6
2823 && i
.log2_scale_factor
== 0))))
2825 as_bad (_("`%s' is not a valid %s bit base/index expression"),
2826 operand_string
, "16");
2833 && (i
.base_reg
->reg_type
& Reg32
) == 0)
2835 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
2836 != (Reg32
|BaseIndex
))))
2838 as_bad (_("`%s' is not a valid %s bit base/index expression"),
2839 operand_string
, "32");
2846 { /* it's not a memory operand; argh! */
2847 as_bad (_("invalid char %s begining operand %d `%s'"),
2848 output_invalid (*op_string
),
2853 return 1; /* normal return */
2857 * md_estimate_size_before_relax()
2859 * Called just before relax().
2860 * Any symbol that is now undefined will not become defined.
2861 * Return the correct fr_subtype in the frag.
2862 * Return the initial "guess for fr_var" to caller.
2863 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2864 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2865 * Although it may not be explicit in the frag, pretend fr_var starts with a
2869 md_estimate_size_before_relax (fragP
, segment
)
2870 register fragS
*fragP
;
2871 register segT segment
;
2873 register unsigned char *opcode
;
2874 register int old_fr_fix
;
2876 old_fr_fix
= fragP
->fr_fix
;
2877 opcode
= (unsigned char *) fragP
->fr_opcode
;
2878 /* We've already got fragP->fr_subtype right; all we have to do is
2879 check for un-relaxable symbols. */
2880 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2882 /* symbol is undefined in this segment */
2883 int code16
= fragP
->fr_subtype
& CODE16
;
2884 int size
= code16
? 2 : 4;
2885 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
2889 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2890 opcode
[0] = 0xe9; /* dword disp jmp */
2891 fragP
->fr_fix
+= size
;
2892 fix_new (fragP
, old_fr_fix
, size
,
2894 fragP
->fr_offset
, 1,
2895 (GOT_symbol
&& /* Not quite right - we should switch on
2896 presence of @PLT, but I cannot see how
2897 to get to that from here. We should have
2898 done this in md_assemble to really
2899 get it right all of the time, but I
2900 think it does not matter that much, as
2901 this will be right most of the time. ERY*/
2902 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
2903 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
2907 /* This changes the byte-displacement jump 0x7N -->
2908 the dword-displacement jump 0x0f8N */
2909 opcode
[1] = opcode
[0] + 0x10;
2910 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2911 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
2912 fix_new (fragP
, old_fr_fix
+ 1, size
,
2914 fragP
->fr_offset
, 1,
2915 (GOT_symbol
&& /* Not quite right - we should switch on
2916 presence of @PLT, but I cannot see how
2917 to get to that from here. ERY */
2918 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
2919 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
2924 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2925 } /* md_estimate_size_before_relax() */
2928 * md_convert_frag();
2930 * Called after relax() is finished.
2931 * In: Address of frag.
2932 * fr_type == rs_machine_dependent.
2933 * fr_subtype is what the address relaxed to.
2935 * Out: Any fixSs and constants are set up.
2936 * Caller will turn frag into a ".space 0".
2938 #ifndef BFD_ASSEMBLER
2940 md_convert_frag (headers
, sec
, fragP
)
2941 object_headers
*headers
;
2943 register fragS
*fragP
;
2946 md_convert_frag (abfd
, sec
, fragP
)
2949 register fragS
*fragP
;
2952 register unsigned char *opcode
;
2953 unsigned char *where_to_put_displacement
= NULL
;
2954 unsigned int target_address
;
2955 unsigned int opcode_address
;
2956 unsigned int extension
= 0;
2957 int displacement_from_opcode_start
;
2959 opcode
= (unsigned char *) fragP
->fr_opcode
;
2961 /* Address we want to reach in file space. */
2962 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2963 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2964 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
2967 /* Address opcode resides at in file space. */
2968 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2970 /* Displacement from opcode start to fill into instruction. */
2971 displacement_from_opcode_start
= target_address
- opcode_address
;
2973 switch (fragP
->fr_subtype
)
2975 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
2976 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
2977 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
2978 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
2979 /* don't have to change opcode */
2980 extension
= 1; /* 1 opcode + 1 displacement */
2981 where_to_put_displacement
= &opcode
[1];
2984 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
2985 extension
= 5; /* 2 opcode + 4 displacement */
2986 opcode
[1] = opcode
[0] + 0x10;
2987 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2988 where_to_put_displacement
= &opcode
[2];
2991 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
2992 extension
= 4; /* 1 opcode + 4 displacement */
2994 where_to_put_displacement
= &opcode
[1];
2997 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
2998 extension
= 3; /* 2 opcode + 2 displacement */
2999 opcode
[1] = opcode
[0] + 0x10;
3000 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3001 where_to_put_displacement
= &opcode
[2];
3004 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3005 extension
= 2; /* 1 opcode + 2 displacement */
3007 where_to_put_displacement
= &opcode
[1];
3011 BAD_CASE (fragP
->fr_subtype
);
3014 /* now put displacement after opcode */
3015 md_number_to_chars ((char *) where_to_put_displacement
,
3016 (valueT
) (displacement_from_opcode_start
- extension
),
3017 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3018 fragP
->fr_fix
+= extension
;
3022 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3023 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3024 const int md_reloc_size
= 8; /* Size of relocation record */
3027 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3029 addressT from_addr
, to_addr
;
3035 offset
= to_addr
- (from_addr
+ 2);
3036 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3037 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3041 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3043 addressT from_addr
, to_addr
;
3049 if (flag_do_long_jump
)
3051 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3052 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3053 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3054 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3055 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3059 offset
= to_addr
- (from_addr
+ 5);
3060 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3061 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3065 /* Apply a fixup (fixS) to segment data, once it has been determined
3066 by our caller that we have all the info we need to fix it up.
3068 On the 386, immediates, displacements, and data pointers are all in
3069 the same (little-endian) format, so we don't need to care about which
3073 md_apply_fix3 (fixP
, valp
, seg
)
3074 fixS
*fixP
; /* The fix we're to put in. */
3075 valueT
*valp
; /* Pointer to the value of the bits. */
3076 segT seg
; /* Segment fix is from. */
3078 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3079 valueT value
= *valp
;
3081 if (fixP
->fx_r_type
== BFD_RELOC_32
&& fixP
->fx_pcrel
)
3082 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3084 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3086 * This is a hack. There should be a better way to
3089 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
3092 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3093 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
)
3094 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3096 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3097 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3098 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
3099 || (fixP
->fx_addsy
->bsym
->flags
& BSF_SECTION_SYM
) != 0)
3100 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3101 && ! S_IS_WEAK (fixP
->fx_addsy
)
3102 && S_IS_DEFINED (fixP
->fx_addsy
)
3103 && ! S_IS_COMMON (fixP
->fx_addsy
))
3105 /* Yes, we add the values in twice. This is because
3106 bfd_perform_relocation subtracts them out again. I think
3107 bfd_perform_relocation is broken, but I don't dare change
3109 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3112 #if defined (OBJ_COFF) && defined (TE_PE)
3113 /* For some reason, the PE format does not store a section
3114 address offset for a PC relative symbol. */
3115 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3116 value
+= md_pcrel_from (fixP
);
3120 /* Fix a few things - the dynamic linker expects certain values here,
3121 and we must not dissappoint it. */
3122 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3123 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3125 switch (fixP
->fx_r_type
) {
3126 case BFD_RELOC_386_PLT32
:
3127 /* Make the jump instruction point to the address of the operand. At
3128 runtime we merely add the offset to the actual PLT entry. */
3131 case BFD_RELOC_386_GOTPC
:
3133 * This is tough to explain. We end up with this one if we have
3134 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3135 * here is to obtain the absolute address of the GOT, and it is strongly
3136 * preferable from a performance point of view to avoid using a runtime
3137 * relocation for this. The actual sequence of instructions often look
3143 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3145 * The call and pop essentially return the absolute address of
3146 * the label .L66 and store it in %ebx. The linker itself will
3147 * ultimately change the first operand of the addl so that %ebx points to
3148 * the GOT, but to keep things simple, the .o file must have this operand
3149 * set so that it generates not the absolute address of .L66, but the
3150 * absolute address of itself. This allows the linker itself simply
3151 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
3152 * added in, and the addend of the relocation is stored in the operand
3153 * field for the instruction itself.
3155 * Our job here is to fix the operand so that it would add the correct
3156 * offset so that %ebx would point to itself. The thing that is tricky is
3157 * that .-.L66 will point to the beginning of the instruction, so we need
3158 * to further modify the operand so that it will point to itself.
3159 * There are other cases where you have something like:
3161 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
3163 * and here no correction would be required. Internally in the assembler
3164 * we treat operands of this form as not being pcrel since the '.' is
3165 * explicitly mentioned, and I wonder whether it would simplify matters
3166 * to do it this way. Who knows. In earlier versions of the PIC patches,
3167 * the pcrel_adjust field was used to store the correction, but since the
3168 * expression is not pcrel, I felt it would be confusing to do it this way.
3172 case BFD_RELOC_386_GOT32
:
3173 value
= 0; /* Fully resolved at runtime. No addend. */
3175 case BFD_RELOC_386_GOTOFF
:
3178 case BFD_RELOC_VTABLE_INHERIT
:
3179 case BFD_RELOC_VTABLE_ENTRY
:
3189 md_number_to_chars (p
, value
, fixP
->fx_size
);
3195 /* This is never used. */
3196 long /* Knows about the byte order in a word. */
3197 md_chars_to_number (con
, nbytes
)
3198 unsigned char con
[]; /* Low order byte 1st. */
3199 int nbytes
; /* Number of bytes in the input. */
3202 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
3204 retval
<<= BITS_PER_CHAR
;
3212 #define MAX_LITTLENUMS 6
3214 /* Turn the string pointed to by litP into a floating point constant of type
3215 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
3216 is stored in *sizeP . An error message is returned, or NULL on OK. */
3218 md_atof (type
, litP
, sizeP
)
3224 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
3225 LITTLENUM_TYPE
*wordP
;
3247 return _("Bad call to md_atof ()");
3249 t
= atof_ieee (input_line_pointer
, type
, words
);
3251 input_line_pointer
= t
;
3253 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
3254 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
3255 the bigendian 386. */
3256 for (wordP
= words
+ prec
- 1; prec
--;)
3258 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
3259 litP
+= sizeof (LITTLENUM_TYPE
);
3264 char output_invalid_buf
[8];
3271 sprintf (output_invalid_buf
, "'%c'", c
);
3273 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
3274 return output_invalid_buf
;
3277 /* REG_STRING starts *before* REGISTER_PREFIX. */
3279 static const reg_entry
*
3280 parse_register (reg_string
, end_op
)
3284 register char *s
= reg_string
;
3286 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
3289 /* Skip REGISTER_PREFIX and possible whitespace. */
3291 if (is_space_char (*s
))
3295 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
3297 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
3300 as_bad (_("bad register name `%s'"), reg_name_given
);
3301 return (const reg_entry
*) NULL
;
3307 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
3311 as_bad (_("bad register name `%s'"), reg_name_given
);
3312 return (const reg_entry
*) NULL
;
3319 CONST
char *md_shortopts
= "kmVQ:";
3321 CONST
char *md_shortopts
= "m";
3323 struct option md_longopts
[] = {
3324 {NULL
, no_argument
, NULL
, 0}
3326 size_t md_longopts_size
= sizeof (md_longopts
);
3329 md_parse_option (c
, arg
)
3336 flag_do_long_jump
= 1;
3339 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3340 /* -k: Ignore for FreeBSD compatibility. */
3344 /* -V: SVR4 argument to print version ID. */
3346 print_version_id ();
3349 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
3350 should be emitted or not. FIXME: Not implemented. */
3362 md_show_usage (stream
)
3365 fprintf (stream
, _("\
3366 -m do long jump\n"));
3369 #ifdef BFD_ASSEMBLER
3370 #ifdef OBJ_MAYBE_ELF
3371 #ifdef OBJ_MAYBE_COFF
3373 /* Pick the target format to use. */
3376 i386_target_format ()
3378 switch (OUTPUT_FLAVOR
)
3380 case bfd_target_coff_flavour
:
3382 case bfd_target_elf_flavour
:
3383 return "elf32-i386";
3390 #endif /* OBJ_MAYBE_COFF */
3391 #endif /* OBJ_MAYBE_ELF */
3392 #endif /* BFD_ASSEMBLER */
3396 md_undefined_symbol (name
)
3399 if (*name
== '_' && *(name
+1) == 'G'
3400 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3404 if (symbol_find (name
))
3405 as_bad (_("GOT already in symbol table"));
3406 GOT_symbol
= symbol_new (name
, undefined_section
,
3407 (valueT
) 0, &zero_address_frag
);
3414 /* Round up a section size to the appropriate boundary. */
3416 md_section_align (segment
, size
)
3421 #ifdef BFD_ASSEMBLER
3422 /* For a.out, force the section size to be aligned. If we don't do
3423 this, BFD will align it for us, but it will not write out the
3424 final bytes of the section. This may be a bug in BFD, but it is
3425 easier to fix it here since that is how the other a.out targets
3429 align
= bfd_get_section_alignment (stdoutput
, segment
);
3430 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
3437 /* On the i386, PC-relative offsets are relative to the start of the
3438 next instruction. That is, the address of the offset, plus its
3439 size, since the offset is always the last part of the insn. */
3442 md_pcrel_from (fixP
)
3445 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3456 temp
= get_absolute_expression ();
3457 subseg_set (bss_section
, (subsegT
) temp
);
3458 demand_empty_rest_of_line ();
3464 #ifdef BFD_ASSEMBLER
3467 i386_validate_fix (fixp
)
3470 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
3472 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
3477 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
3478 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
3481 tc_gen_reloc (section
, fixp
)
3486 bfd_reloc_code_real_type code
;
3488 switch (fixp
->fx_r_type
)
3490 case BFD_RELOC_386_PLT32
:
3491 case BFD_RELOC_386_GOT32
:
3492 case BFD_RELOC_386_GOTOFF
:
3493 case BFD_RELOC_386_GOTPC
:
3495 case BFD_RELOC_VTABLE_ENTRY
:
3496 case BFD_RELOC_VTABLE_INHERIT
:
3497 code
= fixp
->fx_r_type
;
3500 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
3502 MAP (1, 0, BFD_RELOC_8
);
3503 MAP (2, 0, BFD_RELOC_16
);
3504 MAP (4, 0, BFD_RELOC_32
);
3505 MAP (1, 1, BFD_RELOC_8_PCREL
);
3506 MAP (2, 1, BFD_RELOC_16_PCREL
);
3507 MAP (4, 1, BFD_RELOC_32_PCREL
);
3510 as_bad (_("Can not do %d byte pc-relative relocation"),
3513 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
3514 code
= BFD_RELOC_32
;
3522 if (code
== BFD_RELOC_32
3524 && fixp
->fx_addsy
== GOT_symbol
)
3525 code
= BFD_RELOC_386_GOTPC
;
3527 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3528 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
3530 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3531 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
3532 vtable entry to be used in the relocation's section offset. */
3533 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3534 rel
->address
= fixp
->fx_offset
;
3537 rel
->addend
= fixp
->fx_addnumber
;
3541 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3542 if (rel
->howto
== NULL
)
3544 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3545 _("Cannot represent relocation type %s"),
3546 bfd_get_reloc_code_name (code
));
3547 /* Set howto to a garbage value so that we can keep going. */
3548 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3549 assert (rel
->howto
!= NULL
);
3555 #else /* ! BFD_ASSEMBLER */
3557 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
3559 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3562 relax_addressT segment_address_in_file
;
3565 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3566 * Out: GNU LD relocation length code: 0, 1, or 2.
3569 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3572 know (fixP
->fx_addsy
!= NULL
);
3574 md_number_to_chars (where
,
3575 (valueT
) (fixP
->fx_frag
->fr_address
3576 + fixP
->fx_where
- segment_address_in_file
),
3579 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3580 ? S_GET_TYPE (fixP
->fx_addsy
)
3581 : fixP
->fx_addsy
->sy_number
);
3583 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
3584 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3585 where
[4] = r_symbolnum
& 0x0ff;
3586 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
3587 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
3588 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
3591 #endif /* OBJ_AOUT or OBJ_BOUT */
3593 #if defined (I386COFF)
3596 tc_coff_fix2rtype (fixP
)
3599 if (fixP
->fx_r_type
== R_IMAGEBASE
)
3602 return (fixP
->fx_pcrel
?
3603 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
3604 fixP
->fx_size
== 2 ? R_PCRWORD
:
3606 (fixP
->fx_size
== 1 ? R_RELBYTE
:
3607 fixP
->fx_size
== 2 ? R_RELWORD
:
3612 tc_coff_sizemachdep (frag
)
3616 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
3621 #endif /* I386COFF */
3623 #endif /* BFD_ASSEMBLER? */
3625 /* end of tc-i386.c */