1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 1998
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef SCALE1_WHEN_NO_INDEX
44 /* Specifying a scale factor besides 1 when there is no index is
45 futile. eg. `mov (%ebx,2),%al' does exactly the same as
46 `mov (%ebx),%al'. To slavishly follow what the programmer
47 specified, set SCALE1_WHEN_NO_INDEX to 0. */
48 #define SCALE1_WHEN_NO_INDEX 1
51 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
52 static int fits_in_signed_byte
PARAMS ((long));
53 static int fits_in_unsigned_byte
PARAMS ((long));
54 static int fits_in_unsigned_word
PARAMS ((long));
55 static int fits_in_signed_word
PARAMS ((long));
56 static int smallest_imm_type
PARAMS ((long));
57 static int add_prefix
PARAMS ((unsigned int));
58 static void set_16bit_code_flag
PARAMS ((int));
60 static bfd_reloc_code_real_type reloc
61 PARAMS ((int, int, bfd_reloc_code_real_type
));
64 /* 'md_assemble ()' gathers together information and puts it into a
69 /* TM holds the template for the insn were currently assembling. */
72 /* SUFFIX holds the instruction mnemonic suffix if given.
73 (e.g. 'l' for 'movl') */
76 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
78 /* OPERANDS gives the number of given operands. */
79 unsigned int operands
;
81 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
82 of given register, displacement, memory operands and immediate
84 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
86 /* TYPES [i] is the type (see above #defines) which tells us how to
87 search through DISPS [i] & IMMS [i] & REGS [i] for the required
89 unsigned int types
[MAX_OPERANDS
];
91 /* Displacements (if given) for each operand. */
92 expressionS
*disps
[MAX_OPERANDS
];
94 /* Relocation type for operand */
96 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
98 int disp_reloc
[MAX_OPERANDS
];
101 /* Immediate operands (if given) for each operand. */
102 expressionS
*imms
[MAX_OPERANDS
];
104 /* Register operands (if given) for each operand. */
105 const reg_entry
*regs
[MAX_OPERANDS
];
107 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
108 the base index byte below. */
109 const reg_entry
*base_reg
;
110 const reg_entry
*index_reg
;
111 unsigned int log2_scale_factor
;
113 /* SEG gives the seg_entries of this insn. They are zero unless
114 explicit segment overrides are given. */
115 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
117 /* PREFIX holds all the given prefix opcodes (usually null).
118 PREFIXES is the number of prefix opcodes. */
119 unsigned int prefixes
;
120 unsigned char prefix
[MAX_PREFIXES
];
122 /* RM and SIB are the modrm byte and the sib byte where the
123 addressing modes of this insn are encoded. */
129 typedef struct _i386_insn i386_insn
;
131 /* List of chars besides those in app.c:symbol_chars that can start an
132 operand. Used to prevent the scrubber eating vital white-space. */
134 const char extra_symbol_chars
[] = "*%-(@";
136 const char extra_symbol_chars
[] = "*%-(";
139 /* This array holds the chars that always start a comment. If the
140 pre-processor is disabled, these aren't very useful */
141 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
142 /* Putting '/' here makes it impossible to use the divide operator.
143 However, we need it for compatibility with SVR4 systems. */
144 const char comment_chars
[] = "#/";
145 #define PREFIX_SEPARATOR '\\'
147 const char comment_chars
[] = "#";
148 #define PREFIX_SEPARATOR '/'
151 /* This array holds the chars that only start a comment at the beginning of
152 a line. If the line seems to have the form '# 123 filename'
153 .line and .file directives will appear in the pre-processed output */
154 /* Note that input_file.c hand checks for '#' at the beginning of the
155 first line of the input file. This is because the compiler outputs
156 #NO_APP at the beginning of its output. */
157 /* Also note that comments started like this one will always work if
158 '/' isn't otherwise defined. */
159 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
160 const char line_comment_chars
[] = "";
162 const char line_comment_chars
[] = "/";
165 const char line_separator_chars
[] = "";
167 /* Chars that can be used to separate mant from exp in floating point nums */
168 const char EXP_CHARS
[] = "eE";
170 /* Chars that mean this number is a floating point constant */
173 const char FLT_CHARS
[] = "fFdDxX";
175 /* tables for lexical analysis */
176 static char mnemonic_chars
[256];
177 static char register_chars
[256];
178 static char operand_chars
[256];
179 static char identifier_chars
[256];
180 static char digit_chars
[256];
183 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
184 #define is_operand_char(x) (operand_chars[(unsigned char) x])
185 #define is_register_char(x) (register_chars[(unsigned char) x])
186 #define is_space_char(x) ((x) == ' ')
187 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
188 #define is_digit_char(x) (digit_chars[(unsigned char) x])
190 /* put here all non-digit non-letter charcters that may occur in an operand */
191 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
193 /* md_assemble() always leaves the strings it's passed unaltered. To
194 effect this we maintain a stack of saved characters that we've smashed
195 with '\0's (indicating end of strings for various sub-fields of the
196 assembler instruction). */
197 static char save_stack
[32];
198 static char *save_stack_p
; /* stack pointer */
199 #define END_STRING_AND_SAVE(s) \
200 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
201 #define RESTORE_END_STRING(s) \
202 do { *(s) = *--save_stack_p; } while (0)
204 /* The instruction we're assembling. */
207 /* Possible templates for current insn. */
208 static const templates
*current_templates
;
210 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
211 static expressionS disp_expressions
[2], im_expressions
[2];
213 static int this_operand
; /* current operand we are working on */
215 static int flag_do_long_jump
; /* FIXME what does this do? */
217 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
219 /* Interface to relax_segment.
220 There are 2 relax states for 386 jump insns: one for conditional &
221 one for unconditional jumps. This is because the these two types
222 of jumps add different sizes to frags when we're figuring out what
223 sort of jump to choose to reach a given label. */
226 #define COND_JUMP 1 /* conditional jump */
227 #define UNCOND_JUMP 2 /* unconditional jump */
231 #define SMALL16 (SMALL|CODE16)
233 #define BIG16 (BIG|CODE16)
237 #define INLINE __inline__
243 #define ENCODE_RELAX_STATE(type,size) \
244 ((relax_substateT)((type<<2) | (size)))
245 #define SIZE_FROM_RELAX_STATE(s) \
246 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
248 /* This table is used by relax_frag to promote short jumps to long
249 ones where necessary. SMALL (short) jumps may be promoted to BIG
250 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
251 don't allow a short jump in a 32 bit code segment to be promoted to
252 a 16 bit offset jump because it's slower (requires data size
253 prefix), and doesn't work, unless the destination is in the bottom
254 64k of the code segment (The top 16 bits of eip are zeroed). */
256 const relax_typeS md_relax_table
[] =
259 1) most positive reach of this state,
260 2) most negative reach of this state,
261 3) how many bytes this mode will add to the size of the current frag
262 4) which index into the table to try if we can't fit into this one.
269 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
270 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
271 /* dword conditionals adds 4 bytes to frag:
272 1 extra opcode byte, 3 extra displacement bytes. */
274 /* word conditionals add 2 bytes to frag:
275 1 extra opcode byte, 1 extra displacement byte. */
278 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
279 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
280 /* dword jmp adds 3 bytes to frag:
281 0 extra opcode bytes, 3 extra displacement bytes. */
283 /* word jmp adds 1 byte to frag:
284 0 extra opcode bytes, 1 extra displacement byte. */
291 i386_align_code (fragP
, count
)
295 /* Various efficient no-op patterns for aligning code labels. */
296 /* Note: Don't try to assemble the instructions in the comments. */
297 /* 0L and 0w are not legal */
298 static const char f32_1
[] =
300 static const char f32_2
[] =
301 {0x89,0xf6}; /* movl %esi,%esi */
302 static const char f32_3
[] =
303 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
304 static const char f32_4
[] =
305 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
306 static const char f32_5
[] =
308 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
309 static const char f32_6
[] =
310 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
311 static const char f32_7
[] =
312 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
313 static const char f32_8
[] =
315 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
316 static const char f32_9
[] =
317 {0x89,0xf6, /* movl %esi,%esi */
318 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
319 static const char f32_10
[] =
320 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
321 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
322 static const char f32_11
[] =
323 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
324 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
325 static const char f32_12
[] =
326 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
327 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
328 static const char f32_13
[] =
329 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
330 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
331 static const char f32_14
[] =
332 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
333 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
334 static const char f32_15
[] =
335 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
336 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
337 static const char f16_4
[] =
338 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
339 static const char f16_5
[] =
341 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
342 static const char f16_6
[] =
343 {0x89,0xf6, /* mov %si,%si */
344 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
345 static const char f16_7
[] =
346 {0x8d,0x74,0x00, /* lea 0(%si),%si */
347 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
348 static const char f16_8
[] =
349 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
350 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
351 static const char *const f32_patt
[] = {
352 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
353 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
355 static const char *const f16_patt
[] = {
356 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
357 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
360 if (count
> 0 && count
<= 15)
364 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
365 f16_patt
[count
- 1], count
);
366 if (count
> 8) /* adjust jump offset */
367 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
370 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
371 f32_patt
[count
- 1], count
);
372 fragP
->fr_var
= count
;
376 static char *output_invalid
PARAMS ((int c
));
377 static int i386_operand
PARAMS ((char *operand_string
));
378 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
381 static void s_bss
PARAMS ((int));
384 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
386 static INLINE
unsigned int
387 mode_from_disp_size (t
)
390 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
394 fits_in_signed_byte (num
)
397 return (num
>= -128) && (num
<= 127);
398 } /* fits_in_signed_byte() */
401 fits_in_unsigned_byte (num
)
404 return (num
& 0xff) == num
;
405 } /* fits_in_unsigned_byte() */
408 fits_in_unsigned_word (num
)
411 return (num
& 0xffff) == num
;
412 } /* fits_in_unsigned_word() */
415 fits_in_signed_word (num
)
418 return (-32768 <= num
) && (num
<= 32767);
419 } /* fits_in_signed_word() */
422 smallest_imm_type (num
)
426 /* This code is disabled because all the Imm1 forms in the opcode table
427 are slower on the i486, and they're the versions with the implicitly
428 specified single-position displacement, which has another syntax if
429 you really want to use that form. If you really prefer to have the
430 one-byte-shorter Imm1 form despite these problems, re-enable this
433 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
435 return (fits_in_signed_byte (num
)
436 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
437 : fits_in_unsigned_byte (num
)
438 ? (Imm8
| Imm16
| Imm32
)
439 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
442 } /* smallest_imm_type() */
444 /* Returns 0 if attempting to add a prefix where one from the same
445 class already exists, 1 if non rep/repne added, 2 if rep/repne
459 case CS_PREFIX_OPCODE
:
460 case DS_PREFIX_OPCODE
:
461 case ES_PREFIX_OPCODE
:
462 case FS_PREFIX_OPCODE
:
463 case GS_PREFIX_OPCODE
:
464 case SS_PREFIX_OPCODE
:
468 case REPNE_PREFIX_OPCODE
:
469 case REPE_PREFIX_OPCODE
:
472 case LOCK_PREFIX_OPCODE
:
480 case ADDR_PREFIX_OPCODE
:
484 case DATA_PREFIX_OPCODE
:
491 as_bad (_("same type of prefix used twice"));
496 i
.prefix
[q
] = prefix
;
501 set_16bit_code_flag (new_16bit_code_flag
)
502 int new_16bit_code_flag
;
504 flag_16bit_code
= new_16bit_code_flag
;
507 const pseudo_typeS md_pseudo_table
[] =
512 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
513 {"align", s_align_bytes
, 0},
515 {"align", s_align_ptwo
, 0},
517 {"ffloat", float_cons
, 'f'},
518 {"dfloat", float_cons
, 'd'},
519 {"tfloat", float_cons
, 'x'},
521 {"noopt", s_ignore
, 0},
522 {"optim", s_ignore
, 0},
523 {"code16", set_16bit_code_flag
, 1},
524 {"code32", set_16bit_code_flag
, 0},
528 /* for interface with expression () */
529 extern char *input_line_pointer
;
531 /* hash table for instruction mnemonic lookup */
532 static struct hash_control
*op_hash
;
533 /* hash table for register lookup */
534 static struct hash_control
*reg_hash
;
540 const char *hash_err
;
542 /* initialize op_hash hash table */
543 op_hash
= hash_new ();
546 register const template *optab
;
547 register templates
*core_optab
;
549 optab
= i386_optab
; /* setup for loop */
550 core_optab
= (templates
*) xmalloc (sizeof (templates
));
551 core_optab
->start
= optab
;
556 if (optab
->name
== NULL
557 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
559 /* different name --> ship out current template list;
560 add to hash table; & begin anew */
561 core_optab
->end
= optab
;
562 hash_err
= hash_insert (op_hash
,
568 as_fatal (_("Internal Error: Can't hash %s: %s"),
572 if (optab
->name
== NULL
)
574 core_optab
= (templates
*) xmalloc (sizeof (templates
));
575 core_optab
->start
= optab
;
580 /* initialize reg_hash hash table */
581 reg_hash
= hash_new ();
583 register const reg_entry
*regtab
;
585 for (regtab
= i386_regtab
;
586 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
589 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
595 /* fill in lexical tables: mnemonic_chars, operand_chars. */
600 for (c
= 0; c
< 256; c
++)
605 mnemonic_chars
[c
] = c
;
606 register_chars
[c
] = c
;
607 operand_chars
[c
] = c
;
609 else if (islower (c
))
611 mnemonic_chars
[c
] = c
;
612 register_chars
[c
] = c
;
613 operand_chars
[c
] = c
;
615 else if (isupper (c
))
617 mnemonic_chars
[c
] = tolower (c
);
618 register_chars
[c
] = mnemonic_chars
[c
];
619 operand_chars
[c
] = c
;
622 if (isalpha (c
) || isdigit (c
))
623 identifier_chars
[c
] = c
;
626 identifier_chars
[c
] = c
;
627 operand_chars
[c
] = c
;
632 identifier_chars
['@'] = '@';
634 register_chars
[')'] = ')';
635 register_chars
['('] = '(';
636 digit_chars
['-'] = '-';
637 identifier_chars
['_'] = '_';
638 identifier_chars
['.'] = '.';
640 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
641 operand_chars
[(unsigned char) *p
] = *p
;
644 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
645 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
647 record_alignment (text_section
, 2);
648 record_alignment (data_section
, 2);
649 record_alignment (bss_section
, 2);
655 i386_print_statistics (file
)
658 hash_print_statistics (file
, "i386 opcode", op_hash
);
659 hash_print_statistics (file
, "i386 register", reg_hash
);
665 /* debugging routines for md_assemble */
666 static void pi
PARAMS ((char *, i386_insn
*));
667 static void pte
PARAMS ((template *));
668 static void pt
PARAMS ((unsigned int));
669 static void pe
PARAMS ((expressionS
*));
670 static void ps
PARAMS ((symbolS
*));
677 register template *p
;
680 fprintf (stdout
, "%s: template ", line
);
682 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
683 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
684 fprintf (stdout
, " base %x index %x scale %x\n",
685 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
686 for (i
= 0; i
< x
->operands
; i
++)
688 fprintf (stdout
, " #%d: ", i
+ 1);
690 fprintf (stdout
, "\n");
692 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
693 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
694 if (x
->types
[i
] & Imm
)
696 if (x
->types
[i
] & Disp
)
706 fprintf (stdout
, " %d operands ", t
->operands
);
707 fprintf (stdout
, "opcode %x ",
709 if (t
->extension_opcode
!= None
)
710 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
711 if (t
->opcode_modifier
& D
)
712 fprintf (stdout
, "D");
713 if (t
->opcode_modifier
& W
)
714 fprintf (stdout
, "W");
715 fprintf (stdout
, "\n");
716 for (i
= 0; i
< t
->operands
; i
++)
718 fprintf (stdout
, " #%d type ", i
+ 1);
719 pt (t
->operand_types
[i
]);
720 fprintf (stdout
, "\n");
728 fprintf (stdout
, " operation %d\n", e
->X_op
);
729 fprintf (stdout
, " add_number %d (%x)\n",
730 e
->X_add_number
, e
->X_add_number
);
733 fprintf (stdout
, " add_symbol ");
734 ps (e
->X_add_symbol
);
735 fprintf (stdout
, "\n");
739 fprintf (stdout
, " op_symbol ");
741 fprintf (stdout
, "\n");
749 fprintf (stdout
, "%s type %s%s",
751 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
752 segment_name (S_GET_SEGMENT (s
)));
771 { BaseIndex
, "BaseIndex" },
775 { InOutPortReg
, "InOutPortReg" },
776 { ShiftCount
, "ShiftCount" },
777 { Control
, "control reg" },
778 { Test
, "test reg" },
779 { Debug
, "debug reg" },
780 { FloatReg
, "FReg" },
781 { FloatAcc
, "FAcc" },
785 { JumpAbsolute
, "Jump Absolute" },
795 register struct type_name
*ty
;
799 fprintf (stdout
, _("Unknown"));
803 for (ty
= type_names
; ty
->mask
; ty
++)
805 fprintf (stdout
, "%s, ", ty
->tname
);
810 #endif /* DEBUG386 */
813 tc_i386_force_relocation (fixp
)
817 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
818 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
823 return fixp
->fx_r_type
==7;
828 static bfd_reloc_code_real_type
829 reloc (size
, pcrel
, other
)
832 bfd_reloc_code_real_type other
;
834 if (other
!= NO_RELOC
) return other
;
840 case 1: return BFD_RELOC_8_PCREL
;
841 case 2: return BFD_RELOC_16_PCREL
;
842 case 4: return BFD_RELOC_32_PCREL
;
844 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
850 case 1: return BFD_RELOC_8
;
851 case 2: return BFD_RELOC_16
;
852 case 4: return BFD_RELOC_32
;
854 as_bad (_("Can not do %d byte relocation"), size
);
857 return BFD_RELOC_NONE
;
861 * Here we decide which fixups can be adjusted to make them relative to
862 * the beginning of the section instead of the symbol. Basically we need
863 * to make sure that the dynamic relocations are done correctly, so in
864 * some cases we force the original symbol to be used.
867 tc_i386_fix_adjustable(fixP
)
871 /* Prevent all adjustments to global symbols. */
872 if (S_IS_EXTERN (fixP
->fx_addsy
))
874 if (S_IS_WEAK (fixP
->fx_addsy
))
877 /* adjust_reloc_syms doesn't know about the GOT */
878 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
879 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
880 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
881 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
882 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
887 #define reloc(SIZE,PCREL,OTHER) 0
888 #define BFD_RELOC_16 0
889 #define BFD_RELOC_32 0
890 #define BFD_RELOC_16_PCREL 0
891 #define BFD_RELOC_32_PCREL 0
892 #define BFD_RELOC_386_PLT32 0
893 #define BFD_RELOC_386_GOT32 0
894 #define BFD_RELOC_386_GOTOFF 0
897 /* This is the guts of the machine-dependent assembler. LINE points to a
898 machine dependent instruction. This function is supposed to emit
899 the frags/bytes it assembles to. */
905 /* Points to template once we've found it. */
908 /* Count the size of the instruction generated. */
913 /* Initialize globals. */
914 memset (&i
, '\0', sizeof (i
));
915 for (j
= 0; j
< MAX_OPERANDS
; j
++)
916 i
.disp_reloc
[j
] = NO_RELOC
;
917 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
918 memset (im_expressions
, '\0', sizeof (im_expressions
));
919 save_stack_p
= save_stack
; /* reset stack pointer */
921 /* First parse an instruction mnemonic & call i386_operand for the operands.
922 We assume that the scrubber has arranged it so that line[0] is the valid
923 start of a (possibly prefixed) mnemonic. */
925 char mnemonic
[MAX_MNEM_SIZE
];
927 char *token_start
= l
;
930 /* Non-zero if we found a prefix only acceptable with string insns. */
931 const char *expecting_string_instruction
= NULL
;
936 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
939 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
941 as_bad (_("no such 386 instruction: `%s'"), token_start
);
946 if (!is_space_char (*l
)
948 && *l
!= PREFIX_SEPARATOR
)
950 as_bad (_("invalid character %s in mnemonic"),
951 output_invalid (*l
));
954 if (token_start
== l
)
956 if (*l
== PREFIX_SEPARATOR
)
957 as_bad (_("expecting prefix; got nothing"));
959 as_bad (_("expecting mnemonic; got nothing"));
963 /* Look up instruction (or prefix) via hash table. */
964 current_templates
= hash_find (op_hash
, mnemonic
);
966 if (*l
!= END_OF_INSN
967 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
969 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
971 /* If we are in 16-bit mode, do not allow addr16 or data16.
972 Similarly, in 32-bit mode, do not allow addr32 or data32. */
973 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
974 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
977 as_bad (_("redundant %s prefix"),
978 current_templates
->start
->name
);
981 /* Add prefix, checking for repeated prefixes. */
982 switch (add_prefix (current_templates
->start
->base_opcode
))
987 expecting_string_instruction
=
988 current_templates
->start
->name
;
991 /* Skip past PREFIX_SEPARATOR and reset token_start. */
998 if (!current_templates
)
1000 /* See if we can get a match by trimming off a suffix. */
1003 case DWORD_MNEM_SUFFIX
:
1004 case WORD_MNEM_SUFFIX
:
1005 case BYTE_MNEM_SUFFIX
:
1006 case SHORT_MNEM_SUFFIX
:
1007 #if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
1008 case LONG_MNEM_SUFFIX
:
1010 i
.suffix
= mnem_p
[-1];
1012 current_templates
= hash_find (op_hash
, mnemonic
);
1014 if (!current_templates
)
1016 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1021 /* check for rep/repne without a string instruction */
1022 if (expecting_string_instruction
1023 && !(current_templates
->start
->opcode_modifier
& IsString
))
1025 as_bad (_("expecting string instruction after `%s'"),
1026 expecting_string_instruction
);
1030 /* There may be operands to parse. */
1031 if (*l
!= END_OF_INSN
)
1033 /* parse operands */
1035 /* 1 if operand is pending after ','. */
1036 unsigned int expecting_operand
= 0;
1038 /* Non-zero if operand parens not balanced. */
1039 unsigned int paren_not_balanced
;
1043 /* skip optional white space before operand */
1044 if (is_space_char (*l
))
1046 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1048 as_bad (_("invalid character %s before operand %d"),
1049 output_invalid (*l
),
1053 token_start
= l
; /* after white space */
1054 paren_not_balanced
= 0;
1055 while (paren_not_balanced
|| *l
!= ',')
1057 if (*l
== END_OF_INSN
)
1059 if (paren_not_balanced
)
1061 as_bad (_("unbalanced parenthesis in operand %d."),
1066 break; /* we are done */
1068 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1070 as_bad (_("invalid character %s in operand %d"),
1071 output_invalid (*l
),
1076 ++paren_not_balanced
;
1078 --paren_not_balanced
;
1081 if (l
!= token_start
)
1082 { /* yes, we've read in another operand */
1083 unsigned int operand_ok
;
1084 this_operand
= i
.operands
++;
1085 if (i
.operands
> MAX_OPERANDS
)
1087 as_bad (_("spurious operands; (%d operands/instruction max)"),
1091 /* now parse operand adding info to 'i' as we go along */
1092 END_STRING_AND_SAVE (l
);
1093 operand_ok
= i386_operand (token_start
);
1094 RESTORE_END_STRING (l
); /* restore old contents */
1100 if (expecting_operand
)
1102 expecting_operand_after_comma
:
1103 as_bad (_("expecting operand after ','; got nothing"));
1108 as_bad (_("expecting operand before ','; got nothing"));
1113 /* now *l must be either ',' or END_OF_INSN */
1116 if (*++l
== END_OF_INSN
)
1117 { /* just skip it, if it's \n complain */
1118 goto expecting_operand_after_comma
;
1120 expecting_operand
= 1;
1123 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1127 /* Now we've parsed the mnemonic into a set of templates, and have the
1130 Next, we find a template that matches the given insn,
1131 making sure the overlap of the given operands types is consistent
1132 with the template operand types. */
1134 #define MATCH(overlap, given, template) \
1136 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1137 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1139 /* If given types r0 and r1 are registers they must be of the same type
1140 unless the expected operand type register overlap is null.
1141 Note that Acc in a template matches every size of reg. */
1142 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1143 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1144 ((g0) & Reg) == ((g1) & Reg) || \
1145 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1148 register unsigned int overlap0
, overlap1
;
1150 unsigned int overlap2
;
1151 unsigned int found_reverse_match
;
1157 found_reverse_match
= 0;
1158 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1160 : (i
.suffix
== WORD_MNEM_SUFFIX
1162 : (i
.suffix
== SHORT_MNEM_SUFFIX
1164 : (i
.suffix
== LONG_MNEM_SUFFIX
? No_lSuf
: 0))));
1166 for (t
= current_templates
->start
;
1167 t
< current_templates
->end
;
1170 /* Must have right number of operands, and must not have
1171 disallowed suffix. */
1172 if (i
.operands
!= t
->operands
|| (t
->opcode_modifier
& suffix_check
))
1174 else if (!t
->operands
)
1175 break; /* 0 operands always matches */
1177 overlap0
= i
.types
[0] & t
->operand_types
[0];
1178 switch (t
->operands
)
1181 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1186 overlap1
= i
.types
[1] & t
->operand_types
[1];
1187 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1188 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1189 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1190 t
->operand_types
[0],
1191 overlap1
, i
.types
[1],
1192 t
->operand_types
[1]))
1195 /* check if other direction is valid ... */
1196 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1199 /* try reversing direction of operands */
1200 overlap0
= i
.types
[0] & t
->operand_types
[1];
1201 overlap1
= i
.types
[1] & t
->operand_types
[0];
1202 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1203 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1204 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1205 t
->operand_types
[1],
1206 overlap1
, i
.types
[1],
1207 t
->operand_types
[0]))
1209 /* does not match either direction */
1212 /* found_reverse_match holds which of D or FloatDR
1214 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1217 /* found a forward 2 operand match here */
1218 if (t
->operands
== 3)
1220 /* Here we make use of the fact that there are no
1221 reverse match 3 operand instructions, and all 3
1222 operand instructions only need to be checked for
1223 register consistency between operands 2 and 3. */
1224 overlap2
= i
.types
[2] & t
->operand_types
[2];
1225 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1226 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1227 t
->operand_types
[1],
1228 overlap2
, i
.types
[2],
1229 t
->operand_types
[2]))
1232 /* found either forward/reverse 2 or 3 operand match here:
1233 slip through to break */
1235 break; /* we've found a match; break out of loop */
1236 } /* for (t = ... */
1237 if (t
== current_templates
->end
)
1238 { /* we found no match */
1239 as_bad (_("suffix or operands invalid for `%s'"),
1240 current_templates
->start
->name
);
1244 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1246 /* Warn them that a data or address size prefix doesn't affect
1247 assembly of the next line of code. */
1248 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1251 /* Copy the template we found. */
1253 if (found_reverse_match
)
1255 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1256 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1259 if (i
.tm
.opcode_modifier
& FWait
)
1260 if (! add_prefix (FWAIT_OPCODE
))
1263 /* Check string instruction segment overrides */
1264 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1266 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1267 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1269 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1271 as_bad (_("`%s' operand %d must use `%%es' segment"),
1276 /* There's only ever one segment override allowed per instruction.
1277 This instruction possibly has a legal segment override on the
1278 second operand, so copy the segment to where non-string
1279 instructions store it, allowing common code. */
1280 i
.seg
[0] = i
.seg
[1];
1282 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1284 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1286 as_bad (_("`%s' operand %d must use `%%es' segment"),
1294 /* If matched instruction specifies an explicit instruction mnemonic
1296 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1298 if (i
.tm
.opcode_modifier
& Size16
)
1299 i
.suffix
= WORD_MNEM_SUFFIX
;
1301 i
.suffix
= DWORD_MNEM_SUFFIX
;
1303 else if (i
.reg_operands
)
1305 /* If there's no instruction mnemonic suffix we try to invent one
1306 based on register operands. */
1309 /* We take i.suffix from the last register operand specified,
1310 Destination register type is more significant than source
1313 for (op
= i
.operands
; --op
>= 0; )
1314 if (i
.types
[op
] & Reg
)
1316 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1317 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1322 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1325 for (op
= i
.operands
; --op
>= 0; )
1327 /* If this is an eight bit register, it's OK. If it's
1328 the 16 or 32 bit version of an eight bit register,
1329 we will just use the low portion, and that's OK too. */
1330 if (i
.types
[op
] & Reg8
)
1332 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1334 /* Check that the template allows eight bit regs
1335 This kills insns such as `orb $1,%edx', which
1336 maybe should be allowed. */
1337 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1341 #if REGISTER_WARNINGS
1342 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1343 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1344 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1345 i
.regs
[op
]->reg_name
,
1350 /* Any other register is bad */
1351 if (i
.types
[op
] & (Reg
| RegMMX
| Control
| Debug
| Test
1352 | FloatReg
| FloatAcc
| SReg2
| SReg3
))
1354 as_bad (_("`%%%s' not allowed with `%s%c'"),
1355 i
.regs
[op
]->reg_name
,
1362 else if (i
.suffix
== DWORD_MNEM_SUFFIX
)
1365 for (op
= i
.operands
; --op
>= 0; )
1366 /* Reject eight bit registers, except where the template
1367 requires them. (eg. movzb) */
1368 if ((i
.types
[op
] & Reg8
) != 0
1369 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1371 as_bad (_("`%%%s' not allowed with `%s%c'"),
1372 i
.regs
[op
]->reg_name
,
1377 #if REGISTER_WARNINGS
1378 /* Warn if the e prefix on a general reg is missing. */
1379 else if ((i
.types
[op
] & Reg16
) != 0
1380 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1382 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1383 (i
.regs
[op
] + 8)->reg_name
,
1384 i
.regs
[op
]->reg_name
,
1389 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1392 for (op
= i
.operands
; --op
>= 0; )
1393 /* Reject eight bit registers, except where the template
1394 requires them. (eg. movzb) */
1395 if ((i
.types
[op
] & Reg8
) != 0
1396 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1398 as_bad (_("`%%%s' not allowed with `%s%c'"),
1399 i
.regs
[op
]->reg_name
,
1404 #if REGISTER_WARNINGS
1405 /* Warn if the e prefix on a general reg is present. */
1406 else if ((i
.types
[op
] & Reg32
) != 0
1407 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1409 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1410 (i
.regs
[op
] - 8)->reg_name
,
1411 i
.regs
[op
]->reg_name
,
1420 /* Make still unresolved immediate matches conform to size of immediate
1421 given in i.suffix. Note: overlap2 cannot be an immediate! */
1422 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1423 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1424 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1428 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1429 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1431 else if (overlap0
== (Imm16
| Imm32
))
1434 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1438 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1442 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1443 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1444 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1448 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1449 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1451 else if (overlap1
== (Imm16
| Imm32
))
1454 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1458 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1462 assert ((overlap2
& Imm
) == 0);
1464 i
.types
[0] = overlap0
;
1465 if (overlap0
& ImplicitRegister
)
1467 if (overlap0
& Imm1
)
1468 i
.imm_operands
= 0; /* kludge for shift insns */
1470 i
.types
[1] = overlap1
;
1471 if (overlap1
& ImplicitRegister
)
1474 i
.types
[2] = overlap2
;
1475 if (overlap2
& ImplicitRegister
)
1478 /* Finalize opcode. First, we change the opcode based on the operand
1479 size given by i.suffix: We need not change things for byte insns. */
1481 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1483 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1487 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1489 /* It's not a byte, select word/dword operation. */
1490 if (i
.tm
.opcode_modifier
& W
)
1492 if (i
.tm
.opcode_modifier
& ShortForm
)
1493 i
.tm
.base_opcode
|= 8;
1495 i
.tm
.base_opcode
|= 1;
1497 /* Now select between word & dword operations via the operand
1498 size prefix, except for instructions that will ignore this
1500 if ((i
.suffix
== DWORD_MNEM_SUFFIX
1501 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1502 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1504 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1505 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1506 prefix
= ADDR_PREFIX_OPCODE
;
1508 if (! add_prefix (prefix
))
1511 /* Size floating point instruction. */
1512 if (i
.suffix
== LONG_MNEM_SUFFIX
)
1514 if (i
.tm
.opcode_modifier
& FloatMF
)
1515 i
.tm
.base_opcode
^= 4;
1519 if (i
.tm
.base_opcode
== AMD_3DNOW_OPCODE
)
1521 /* These AMD specific instructions have an opcode suffix which
1522 is coded in the same place as an 8-bit immediate field
1523 would be. Here we fake an 8-bit immediate operand from the
1524 opcode suffix stored in tm.extension_opcode. */
1528 assert(i
.imm_operands
== 0 && i
.operands
<= 2);
1530 exp
= &im_expressions
[i
.imm_operands
++];
1531 i
.imms
[i
.operands
] = exp
;
1532 i
.types
[i
.operands
++] = Imm8
;
1533 exp
->X_op
= O_constant
;
1534 exp
->X_add_number
= i
.tm
.extension_opcode
;
1535 i
.tm
.extension_opcode
= None
;
1538 /* For insns with operands there are more diddles to do to the opcode. */
1541 /* Default segment register this instruction will use
1542 for memory accesses. 0 means unknown.
1543 This is only for optimizing out unnecessary segment overrides. */
1544 const seg_entry
*default_seg
= 0;
1546 /* If we found a reverse match we must alter the opcode
1547 direction bit. found_reverse_match holds bits to change
1548 (different for int & float insns). */
1550 i
.tm
.base_opcode
^= found_reverse_match
;
1552 /* The imul $imm, %reg instruction is converted into
1553 imul $imm, %reg, %reg, and the clr %reg instruction
1554 is converted into xor %reg, %reg. */
1555 if (i
.tm
.opcode_modifier
& regKludge
)
1557 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1558 /* Pretend we saw the extra register operand. */
1559 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1563 if (i
.tm
.opcode_modifier
& ShortForm
)
1565 /* The register or float register operand is in operand 0 or 1. */
1566 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1567 /* Register goes in low 3 bits of opcode. */
1568 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1569 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1571 /* Warn about some common errors, but press on regardless.
1572 The first case can be generated by gcc (<= 2.8.1). */
1573 if (i
.operands
== 2)
1575 /* reversed arguments on faddp, fsubp, etc. */
1576 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1577 i
.regs
[1]->reg_name
,
1578 i
.regs
[0]->reg_name
);
1582 /* extraneous `l' suffix on fp insn */
1583 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1584 i
.regs
[0]->reg_name
);
1588 else if (i
.tm
.opcode_modifier
& Modrm
)
1590 /* The opcode is completed (modulo i.tm.extension_opcode which
1591 must be put into the modrm byte).
1592 Now, we make the modrm & index base bytes based on all the
1593 info we've collected. */
1595 /* i.reg_operands MUST be the number of real register operands;
1596 implicit registers do not count. */
1597 if (i
.reg_operands
== 2)
1599 unsigned int source
, dest
;
1600 source
= ((i
.types
[0]
1611 /* Certain instructions expect the destination to be
1612 in the i.rm.reg field. This is by far the
1613 exceptional case. For these instructions, if the
1614 source operand is a register, we must reverse the
1615 i.rm.reg and i.rm.regmem fields. We accomplish
1616 this by pretending that the two register operands
1617 were given in the reverse order. */
1618 if (i
.tm
.opcode_modifier
& ReverseRegRegmem
)
1620 const reg_entry
*tmp
= i
.regs
[source
];
1621 i
.regs
[source
] = i
.regs
[dest
];
1626 /* We must be careful to make sure that all
1627 segment/control/test/debug/MMX registers go into
1628 the i.rm.reg field (despite whether they are
1629 source or destination operands). */
1630 if (i
.regs
[dest
]->reg_type
1631 & (SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
1633 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1634 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1638 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1639 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1643 { /* if it's not 2 reg operands... */
1646 unsigned int fake_zero_displacement
= 0;
1647 unsigned int op
= ((i
.types
[0] & AnyMem
)
1649 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1656 if (! i
.disp_operands
)
1657 fake_zero_displacement
= 1;
1660 /* Operand is just <disp> */
1661 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1663 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1664 i
.types
[op
] &= ~Disp
;
1665 i
.types
[op
] |= Disp16
;
1669 i
.rm
.regmem
= NO_BASE_REGISTER
;
1670 i
.types
[op
] &= ~Disp
;
1671 i
.types
[op
] |= Disp32
;
1674 else /* ! i.base_reg && i.index_reg */
1676 i
.sib
.index
= i
.index_reg
->reg_num
;
1677 i
.sib
.base
= NO_BASE_REGISTER
;
1678 i
.sib
.scale
= i
.log2_scale_factor
;
1679 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1680 i
.types
[op
] &= ~Disp
;
1681 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1684 else if (i
.base_reg
->reg_type
& Reg16
)
1686 switch (i
.base_reg
->reg_num
)
1691 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1692 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1699 if ((i
.types
[op
] & Disp
) == 0)
1701 /* fake (%bp) into 0(%bp) */
1702 i
.types
[op
] |= Disp8
;
1703 fake_zero_displacement
= 1;
1706 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1707 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1709 default: /* (%si) -> 4 or (%di) -> 5 */
1710 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1712 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1714 else /* i.base_reg and 32 bit mode */
1716 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1717 i
.sib
.base
= i
.base_reg
->reg_num
;
1718 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1721 if (i
.disp_operands
== 0)
1723 fake_zero_displacement
= 1;
1724 i
.types
[op
] |= Disp8
;
1727 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1731 i
.sib
.scale
= i
.log2_scale_factor
;
1734 /* <disp>(%esp) becomes two byte modrm
1735 with no index register. We've already
1736 stored the code for esp in i.rm.regmem
1737 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1738 base register besides %esp will not use
1739 the extra modrm byte. */
1740 i
.sib
.index
= NO_INDEX_REGISTER
;
1741 #if ! SCALE1_WHEN_NO_INDEX
1742 /* Another case where we force the second
1744 if (i
.log2_scale_factor
)
1745 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1750 i
.sib
.index
= i
.index_reg
->reg_num
;
1751 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1753 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1756 if (fake_zero_displacement
)
1758 /* Fakes a zero displacement assuming that i.types[op]
1759 holds the correct displacement size. */
1760 exp
= &disp_expressions
[i
.disp_operands
++];
1762 exp
->X_op
= O_constant
;
1763 exp
->X_add_number
= 0;
1764 exp
->X_add_symbol
= (symbolS
*) 0;
1765 exp
->X_op_symbol
= (symbolS
*) 0;
1769 /* Fill in i.rm.reg or i.rm.regmem field with register
1770 operand (if any) based on i.tm.extension_opcode.
1771 Again, we must be careful to make sure that
1772 segment/control/debug/test/MMX registers are coded
1773 into the i.rm.reg field. */
1778 & (Reg
| SReg2
| SReg3
| Control
| Debug
1782 & (Reg
| SReg2
| SReg3
| Control
| Debug
1786 /* If there is an extension opcode to put here, the
1787 register number must be put into the regmem field. */
1788 if (i
.tm
.extension_opcode
!= None
)
1789 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
1791 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
1793 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1794 we must set it to 3 to indicate this is a register
1795 operand in the regmem field. */
1796 if (!i
.mem_operands
)
1800 /* Fill in i.rm.reg field with extension opcode (if any). */
1801 if (i
.tm
.extension_opcode
!= None
)
1802 i
.rm
.reg
= i
.tm
.extension_opcode
;
1805 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
1807 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1809 as_bad (_("you can't `pop %%cs'"));
1812 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1814 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
1818 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
1820 /* For the string instructions that allow a segment override
1821 on one of their operands, the default segment is ds. */
1825 /* If a segment was explicitly specified,
1826 and the specified segment is not the default,
1827 use an opcode prefix to select it.
1828 If we never figured out what the default segment is,
1829 then default_seg will be zero at this point,
1830 and the specified segment prefix will always be used. */
1831 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
1833 if (! add_prefix (i
.seg
[0]->seg_prefix
))
1837 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1839 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc */
1840 as_warn (_("translating to `%sp'"), i
.tm
.name
);
1844 /* Handle conversion of 'int $3' --> special int3 insn. */
1845 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1847 i
.tm
.base_opcode
= INT3_OPCODE
;
1851 /* We are ready to output the insn. */
1856 if (i
.tm
.opcode_modifier
& Jump
)
1858 long n
= (long) i
.disps
[0]->X_add_number
;
1859 int prefix
= (i
.prefix
[DATA_PREFIX
] != 0);
1867 if (flag_16bit_code
)
1870 if (i
.prefixes
!= 0)
1871 as_warn (_("skipping prefixes on this instruction"));
1873 if (i
.disps
[0]->X_op
== O_constant
)
1875 if (fits_in_signed_byte (n
))
1879 p
[0] = i
.tm
.base_opcode
;
1884 /* Use 16-bit jumps only for 16-bit code,
1885 because text segments are limited to 64K anyway;
1886 Use 32-bit jumps for 32-bit code, because they're faster,
1887 and a 16-bit jump will clear the top 16 bits of %eip. */
1888 int jmp_size
= code16
? 2 : 4;
1889 if (code16
&& !fits_in_signed_word (n
))
1891 as_bad (_("16-bit jump out of range"));
1895 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
1897 /* unconditional jump */
1898 insn_size
+= prefix
+ 1 + jmp_size
;
1899 p
= frag_more (prefix
+ 1 + jmp_size
);
1901 *p
++ = DATA_PREFIX_OPCODE
;
1903 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
1907 /* conditional jump */
1908 insn_size
+= prefix
+ 2 + jmp_size
;
1909 p
= frag_more (prefix
+ 2 + jmp_size
);
1911 *p
++ = DATA_PREFIX_OPCODE
;
1912 *p
++ = TWO_BYTE_OPCODE_ESCAPE
;
1913 *p
++ = i
.tm
.base_opcode
+ 0x10;
1914 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
1920 int size
= code16
? 2 : 4;
1922 /* It's a symbol; end frag & setup for relax.
1923 Make sure there are more than 6 chars left in the current frag;
1924 if not we'll have to start a new one. */
1925 frag_grow (prefix
+ 1 + 2 + size
);
1926 insn_size
+= 1 + prefix
;
1927 p
= frag_more (1 + prefix
);
1929 *p
++ = DATA_PREFIX_OPCODE
;
1930 *p
= i
.tm
.base_opcode
;
1931 frag_var (rs_machine_dependent
,
1932 prefix
+ 2 + size
, /* 2 opcode/prefix + displacement */
1934 ((unsigned char) *p
== JUMP_PC_RELATIVE
1935 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
1936 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
1937 i
.disps
[0]->X_add_symbol
,
1941 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
1943 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
1944 long n
= (long) i
.disps
[0]->X_add_number
;
1946 if (size
== 1) /* then this is a loop or jecxz type instruction */
1948 if (i
.prefix
[ADDR_PREFIX
])
1951 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
1959 if (i
.prefix
[DATA_PREFIX
])
1962 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
1966 if (flag_16bit_code
)
1973 if (i
.prefixes
!= 0)
1974 as_warn (_("skipping prefixes on this instruction"));
1976 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
1978 insn_size
+= 1 + size
;
1979 p
= frag_more (1 + size
);
1983 insn_size
+= 2 + size
; /* opcode can be at most two bytes */
1984 p
= frag_more (2 + size
);
1985 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1987 *p
++ = i
.tm
.base_opcode
& 0xff;
1989 if (i
.disps
[0]->X_op
== O_constant
)
1991 if (size
== 1 && !fits_in_signed_byte (n
))
1993 as_bad (_("`%s' only takes byte displacement; %ld shortened to %d"),
1996 else if (size
== 2 && !fits_in_signed_word (n
))
1998 as_bad (_("16-bit jump out of range"));
2001 md_number_to_chars (p
, (valueT
) n
, size
);
2005 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2006 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
2010 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2014 int prefix
= i
.prefix
[DATA_PREFIX
] != 0;
2022 if (flag_16bit_code
)
2026 reloc_type
= BFD_RELOC_32
;
2030 reloc_type
= BFD_RELOC_16
;
2033 if (i
.prefixes
!= 0)
2034 as_warn (_("skipping prefixes on this instruction"));
2036 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2037 p
= frag_more (prefix
+ 1 + 2 + size
);
2039 *p
++ = DATA_PREFIX_OPCODE
;
2040 *p
++ = i
.tm
.base_opcode
;
2041 if (i
.imms
[1]->X_op
== O_constant
)
2043 long n
= (long) i
.imms
[1]->X_add_number
;
2045 if (size
== 2 && !fits_in_unsigned_word (n
))
2047 as_bad (_("16-bit jump out of range"));
2050 md_number_to_chars (p
, (valueT
) n
, size
);
2053 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2054 i
.imms
[1], 0, reloc_type
);
2055 if (i
.imms
[0]->X_op
!= O_constant
)
2056 as_bad (_("can't handle non absolute segment in `%s'"),
2058 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2062 /* Output normal instructions here. */
2065 /* The prefix bytes. */
2067 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2074 md_number_to_chars (p
, (valueT
) *q
, 1);
2078 /* Now the opcode; be careful about word order here! */
2079 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2082 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2084 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2088 /* put out high byte first: can't use md_number_to_chars! */
2089 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2090 *p
= i
.tm
.base_opcode
& 0xff;
2093 { /* opcode is either 3 or 4 bytes */
2094 if (i
.tm
.base_opcode
& 0xff000000)
2098 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2105 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2106 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2107 *p
= (i
.tm
.base_opcode
) & 0xff;
2110 /* Now the modrm byte and sib byte (if present). */
2111 if (i
.tm
.opcode_modifier
& Modrm
)
2115 md_number_to_chars (p
,
2116 (valueT
) (i
.rm
.regmem
<< 0
2120 /* If i.rm.regmem == ESP (4)
2121 && i.rm.mode != (Register mode)
2123 ==> need second modrm byte. */
2124 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2126 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2130 md_number_to_chars (p
,
2131 (valueT
) (i
.sib
.base
<< 0
2133 | i
.sib
.scale
<< 6),
2138 if (i
.disp_operands
)
2140 register unsigned int n
;
2142 for (n
= 0; n
< i
.operands
; n
++)
2146 if (i
.disps
[n
]->X_op
== O_constant
)
2148 if (i
.types
[n
] & Disp8
)
2152 md_number_to_chars (p
,
2153 (valueT
) i
.disps
[n
]->X_add_number
,
2156 else if (i
.types
[n
] & Disp16
)
2160 md_number_to_chars (p
,
2161 (valueT
) i
.disps
[n
]->X_add_number
,
2168 md_number_to_chars (p
,
2169 (valueT
) i
.disps
[n
]->X_add_number
,
2173 else if (i
.types
[n
] & Disp32
)
2177 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2179 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2182 { /* must be Disp16 */
2185 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2187 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2191 } /* end displacement output */
2193 /* output immediate */
2196 register unsigned int n
;
2198 for (n
= 0; n
< i
.operands
; n
++)
2202 if (i
.imms
[n
]->X_op
== O_constant
)
2204 if (i
.types
[n
] & (Imm8
| Imm8S
))
2208 md_number_to_chars (p
,
2209 (valueT
) i
.imms
[n
]->X_add_number
,
2212 else if (i
.types
[n
] & Imm16
)
2216 md_number_to_chars (p
,
2217 (valueT
) i
.imms
[n
]->X_add_number
,
2224 md_number_to_chars (p
,
2225 (valueT
) i
.imms
[n
]->X_add_number
,
2230 { /* not absolute_section */
2231 /* Need a 32-bit fixup (don't support 8bit
2232 non-absolute ims). Try to support other
2238 if (i
.types
[n
] & (Imm8
| Imm8S
))
2240 else if (i
.types
[n
] & Imm16
)
2245 p
= frag_more (size
);
2246 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2247 #ifdef BFD_ASSEMBLER
2248 if (r_type
== BFD_RELOC_32
2250 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2251 && (i
.imms
[n
]->X_op
== O_symbol
2252 || (i
.imms
[n
]->X_op
== O_add
2253 && (i
.imms
[n
]->X_op_symbol
->sy_value
.X_op
2256 r_type
= BFD_RELOC_386_GOTPC
;
2257 i
.imms
[n
]->X_add_number
+= 3;
2260 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2261 i
.imms
[n
], pcrel
, r_type
);
2265 } /* end immediate output */
2273 #endif /* DEBUG386 */
2277 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
2281 i386_operand (operand_string
)
2282 char *operand_string
;
2284 register char *op_string
= operand_string
;
2286 /* We check for an absolute prefix (differentiating,
2287 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
2288 if (*op_string
== ABSOLUTE_PREFIX
)
2291 if (is_space_char (*op_string
))
2293 i
.types
[this_operand
] |= JumpAbsolute
;
2296 /* Check if operand is a register. */
2297 if (*op_string
== REGISTER_PREFIX
)
2299 register const reg_entry
*r
;
2302 r
= parse_register (op_string
, &end_op
);
2305 /* Check for a segment override by searching for ':' after a
2306 segment register. */
2308 if (is_space_char (*op_string
))
2310 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
2315 i
.seg
[i
.mem_operands
] = &es
;
2318 i
.seg
[i
.mem_operands
] = &cs
;
2321 i
.seg
[i
.mem_operands
] = &ss
;
2324 i
.seg
[i
.mem_operands
] = &ds
;
2327 i
.seg
[i
.mem_operands
] = &fs
;
2330 i
.seg
[i
.mem_operands
] = &gs
;
2334 /* Skip the ':' and whitespace. */
2336 if (is_space_char (*op_string
))
2339 /* Pretend given string starts here. */
2340 operand_string
= op_string
;
2341 if (!is_digit_char (*op_string
)
2342 && !is_identifier_char (*op_string
)
2343 && *op_string
!= '('
2344 && *op_string
!= ABSOLUTE_PREFIX
)
2346 as_bad (_("bad memory operand `%s'"), op_string
);
2349 /* Handle case of %es:*foo. */
2350 if (*op_string
== ABSOLUTE_PREFIX
)
2353 if (is_space_char (*op_string
))
2355 i
.types
[this_operand
] |= JumpAbsolute
;
2357 goto do_memory_reference
;
2361 as_bad (_("Junk `%s' after register"), op_string
);
2364 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
2365 i
.regs
[this_operand
] = r
;
2368 else if (*op_string
== IMMEDIATE_PREFIX
)
2369 { /* ... or an immediate */
2370 char *save_input_line_pointer
;
2374 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2376 as_bad (_("only 1 or 2 immediate operands are allowed"));
2380 exp
= &im_expressions
[i
.imm_operands
++];
2381 i
.imms
[this_operand
] = exp
;
2384 if (is_space_char (*op_string
))
2387 save_input_line_pointer
= input_line_pointer
;
2388 input_line_pointer
= op_string
;
2389 exp_seg
= expression (exp
);
2390 if (*input_line_pointer
!= '\0')
2392 /* This should be as_bad, but some versions of gcc, up to
2393 about 2.8 and egcs 1.01, generate a bogus @GOTOFF(%ebx)
2394 in certain cases. Oddly, the code in question turns out
2395 to work correctly anyhow, so we make this just a warning
2396 until those versions of gcc are obsolete. */
2397 as_warn (_("unrecognized characters `%s' in expression"),
2398 input_line_pointer
);
2400 input_line_pointer
= save_input_line_pointer
;
2402 if (exp
->X_op
== O_absent
)
2404 /* missing or bad expr becomes absolute 0 */
2405 as_bad (_("missing or invalid immediate expression `%s' taken as 0"),
2407 exp
->X_op
= O_constant
;
2408 exp
->X_add_number
= 0;
2409 exp
->X_add_symbol
= (symbolS
*) 0;
2410 exp
->X_op_symbol
= (symbolS
*) 0;
2411 i
.types
[this_operand
] |= Imm
;
2413 else if (exp
->X_op
== O_constant
)
2415 i
.types
[this_operand
] |=
2416 smallest_imm_type ((long) exp
->X_add_number
);
2418 /* If a suffix is given, this operand may be shortened. */
2421 case WORD_MNEM_SUFFIX
:
2422 i
.types
[this_operand
] |= Imm16
;
2424 case BYTE_MNEM_SUFFIX
:
2425 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2430 else if (exp_seg
!= text_section
2431 && exp_seg
!= data_section
2432 && exp_seg
!= bss_section
2433 && exp_seg
!= undefined_section
2434 #ifdef BFD_ASSEMBLER
2435 && ! bfd_is_com_section (exp_seg
)
2440 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2446 /* This is an address. The size of the address will be
2447 determined later, depending on destination register,
2448 suffix, or the default for the section. We exclude
2449 Imm8S here so that `push $foo' and other instructions
2450 with an Imm8S form will use Imm16 or Imm32. */
2451 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2454 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
2455 || *op_string
== '(')
2457 /* This is a memory reference of some sort. */
2458 char *end_of_operand_string
;
2459 register char *base_string
;
2460 int found_base_index_form
;
2462 /* Start and end of displacement string expression (if found). */
2463 char *displacement_string_start
;
2464 char *displacement_string_end
;
2466 do_memory_reference
:
2467 if ((i
.mem_operands
== 1
2468 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
2469 || i
.mem_operands
== 2)
2471 as_bad (_("too many memory references for `%s'"),
2472 current_templates
->start
->name
);
2476 /* Check for base index form. We detect the base index form by
2477 looking for an ')' at the end of the operand, searching
2478 for the '(' matching it, and finding a REGISTER_PREFIX or ','
2480 found_base_index_form
= 0;
2481 end_of_operand_string
= op_string
+ strlen (op_string
);
2483 --end_of_operand_string
;
2484 if (is_space_char (*end_of_operand_string
))
2485 --end_of_operand_string
;
2487 base_string
= end_of_operand_string
;
2488 if (*base_string
== ')')
2490 unsigned int parens_balanced
= 1;
2491 /* We've already checked that the number of left & right ()'s are
2492 equal, so this loop will not be infinite. */
2496 if (*base_string
== ')')
2498 if (*base_string
== '(')
2501 while (parens_balanced
);
2503 /* If there is a displacement set-up for it to be parsed later. */
2504 displacement_string_start
= op_string
;
2505 displacement_string_end
= base_string
;
2507 /* Skip past '(' and whitespace. */
2509 if (is_space_char (*base_string
))
2512 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
2513 found_base_index_form
= 1;
2516 /* If we can't parse a base index register expression, we've found
2517 a pure displacement expression. We set up displacement_string_start
2518 and displacement_string_end for the code below. */
2519 if (!found_base_index_form
)
2521 displacement_string_start
= op_string
;
2522 displacement_string_end
= end_of_operand_string
+ 1;
2526 i
.types
[this_operand
] |= BaseIndex
;
2528 /* Find base register (if any). */
2529 if (*base_string
!= ',')
2533 /* Trim off the closing ')' so that parse_register won't
2535 END_STRING_AND_SAVE (end_of_operand_string
);
2536 i
.base_reg
= parse_register (base_string
, &end_op
);
2537 RESTORE_END_STRING (end_of_operand_string
);
2539 if (i
.base_reg
== NULL
)
2542 base_string
= end_op
;
2543 if (is_space_char (*base_string
))
2547 /* There may be an index reg or scale factor here. */
2548 if (*base_string
== ',')
2551 if (is_space_char (*base_string
))
2554 if (*base_string
== REGISTER_PREFIX
)
2558 END_STRING_AND_SAVE (end_of_operand_string
);
2559 i
.index_reg
= parse_register (base_string
, &end_op
);
2560 RESTORE_END_STRING (end_of_operand_string
);
2562 if (i
.index_reg
== NULL
)
2565 base_string
= end_op
;
2566 if (is_space_char (*base_string
))
2568 if (*base_string
== ',')
2571 if (is_space_char (*base_string
))
2574 else if (*base_string
!= ')')
2576 as_bad (_("expecting `,' or `)' after index register in `%s'"),
2582 /* Check for scale factor. */
2583 if (isdigit ((unsigned char) *base_string
))
2585 if (isdigit ((unsigned char) base_string
[1]))
2586 goto bad_scale
; /* must be 1 digit scale */
2587 switch (*base_string
)
2590 i
.log2_scale_factor
= 0;
2593 i
.log2_scale_factor
= 1;
2596 i
.log2_scale_factor
= 2;
2599 i
.log2_scale_factor
= 3;
2603 as_bad (_("expecting scale factor of 1, 2, 4 or 8; got `%s'"),
2609 if (is_space_char (*base_string
))
2611 if (*base_string
!= ')')
2613 as_bad (_("expecting `)' after scale factor in `%s'"),
2617 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2619 as_warn (_("scale factor of %d without an index register"),
2620 1 << i
.log2_scale_factor
);
2621 #if SCALE1_WHEN_NO_INDEX
2622 i
.log2_scale_factor
= 0;
2626 else if (!i
.index_reg
)
2628 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
2633 else if (*base_string
!= ')')
2635 as_bad (_("expecting `,' or `)' after base register in `%s'"),
2641 /* If there's an expression begining the operand, parse it,
2642 assuming displacement_string_start and
2643 displacement_string_end are meaningful. */
2644 if (displacement_string_start
!= displacement_string_end
)
2646 register expressionS
*exp
;
2648 char *save_input_line_pointer
;
2649 int bigdisp
= Disp32
;
2651 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2653 i
.types
[this_operand
] |= bigdisp
;
2655 exp
= &disp_expressions
[i
.disp_operands
];
2656 i
.disps
[this_operand
] = exp
;
2657 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2659 save_input_line_pointer
= input_line_pointer
;
2660 input_line_pointer
= displacement_string_start
;
2661 END_STRING_AND_SAVE (displacement_string_end
);
2662 #ifndef GCC_ASM_O_HACK
2663 #define GCC_ASM_O_HACK 0
2666 END_STRING_AND_SAVE (displacement_string_end
+ 1);
2667 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2668 && displacement_string_end
[-1] == '+')
2670 /* This hack is to avoid a warning when using the "o"
2671 constraint within gcc asm statements.
2674 #define _set_tssldt_desc(n,addr,limit,type) \
2675 __asm__ __volatile__ ( \
2677 "movw %w1,2+%0\n\t" \
2679 "movb %b1,4+%0\n\t" \
2680 "movb %4,5+%0\n\t" \
2681 "movb $0,6+%0\n\t" \
2682 "movb %h1,7+%0\n\t" \
2684 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2686 This works great except that the output assembler ends
2687 up looking a bit weird if it turns out that there is
2688 no offset. You end up producing code that looks like:
2701 So here we provide the missing zero.
2704 *displacement_string_end
= '0';
2710 * We can have operands of the form
2711 * <symbol>@GOTOFF+<nnn>
2712 * Take the easy way out here and copy everything
2713 * into a temporary buffer...
2717 cp
= strchr (input_line_pointer
, '@');
2722 if (GOT_symbol
== NULL
)
2723 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2725 tmpbuf
= (char *) alloca ((cp
- input_line_pointer
) + 20);
2727 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2729 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2731 strcpy (tmpbuf
, input_line_pointer
);
2732 strcat (tmpbuf
, cp
+ 1 + 3);
2735 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2737 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2739 strcpy (tmpbuf
, input_line_pointer
);
2740 strcat (tmpbuf
, cp
+ 1 + 6);
2743 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2745 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2747 strcpy (tmpbuf
, input_line_pointer
);
2748 strcat (tmpbuf
, cp
+ 1 + 3);
2752 as_bad (_("Bad reloc specifier `%s' in expression"), cp
+ 1);
2754 /* GOT relocations are not supported in 16 bit mode */
2755 if (flag_16bit_code
)
2756 as_bad (_("GOT relocations not supported in 16 bit mode"));
2758 input_line_pointer
= tmpbuf
;
2763 exp_seg
= expression (exp
);
2765 #ifdef BFD_ASSEMBLER
2766 /* We do this to make sure that the section symbol is in
2767 the symbol table. We will ultimately change the relocation
2768 to be relative to the beginning of the section */
2769 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2771 if (S_IS_LOCAL(exp
->X_add_symbol
)
2772 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2773 section_symbol(exp
->X_add_symbol
->bsym
->section
);
2774 assert (exp
->X_op
== O_symbol
);
2775 exp
->X_op
= O_subtract
;
2776 exp
->X_op_symbol
= GOT_symbol
;
2777 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2781 if (*input_line_pointer
)
2782 as_bad (_("Ignoring junk `%s' after expression"),
2783 input_line_pointer
);
2785 RESTORE_END_STRING (displacement_string_end
+ 1);
2787 RESTORE_END_STRING (displacement_string_end
);
2788 input_line_pointer
= save_input_line_pointer
;
2790 #if 0 /* this is handled in expr. */
2791 if (exp
->X_op
== O_absent
)
2793 /* missing expr becomes absolute 0 */
2794 as_bad (_("missing or invalid displacement `%s' taken as 0"),
2796 exp
->X_op
= O_constant
;
2797 exp
->X_add_number
= 0;
2798 exp
->X_add_symbol
= (symbolS
*) 0;
2799 exp
->X_op_symbol
= (symbolS
*) 0;
2800 i
.types
[this_operand
] |= Disp8
;
2804 if (exp
->X_op
== O_constant
)
2806 if (fits_in_signed_byte (exp
->X_add_number
))
2807 i
.types
[this_operand
] |= Disp8
;
2810 else if (exp_seg
!= text_section
2811 && exp_seg
!= data_section
2812 && exp_seg
!= bss_section
2813 && exp_seg
!= undefined_section
)
2815 goto seg_unimplemented
;
2820 /* Special case for (%dx) while doing input/output op. */
2822 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
2824 && i
.log2_scale_factor
== 0
2825 && i
.seg
[i
.mem_operands
] == 0
2826 && (i
.types
[this_operand
] & Disp
) == 0)
2828 i
.types
[this_operand
] = InOutPortReg
;
2831 /* Make sure the memory operand we've been dealt is valid. */
2832 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2835 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
2836 != (Reg16
|BaseIndex
)))
2838 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
2839 != (Reg16
|BaseIndex
))
2841 && i
.base_reg
->reg_num
< 6
2842 && i
.index_reg
->reg_num
>= 6
2843 && i
.log2_scale_factor
== 0))))
2845 as_bad (_("`%s' is not a valid %s bit base/index expression"),
2846 operand_string
, "16");
2853 && (i
.base_reg
->reg_type
& Reg32
) == 0)
2855 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
2856 != (Reg32
|BaseIndex
))))
2858 as_bad (_("`%s' is not a valid %s bit base/index expression"),
2859 operand_string
, "32");
2866 { /* it's not a memory operand; argh! */
2867 as_bad (_("invalid char %s begining operand %d `%s'"),
2868 output_invalid (*op_string
),
2873 return 1; /* normal return */
2877 * md_estimate_size_before_relax()
2879 * Called just before relax().
2880 * Any symbol that is now undefined will not become defined.
2881 * Return the correct fr_subtype in the frag.
2882 * Return the initial "guess for fr_var" to caller.
2883 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2884 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2885 * Although it may not be explicit in the frag, pretend fr_var starts with a
2889 md_estimate_size_before_relax (fragP
, segment
)
2890 register fragS
*fragP
;
2891 register segT segment
;
2893 register unsigned char *opcode
;
2894 register int old_fr_fix
;
2896 old_fr_fix
= fragP
->fr_fix
;
2897 opcode
= (unsigned char *) fragP
->fr_opcode
;
2898 /* We've already got fragP->fr_subtype right; all we have to do is
2899 check for un-relaxable symbols. */
2900 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2902 /* symbol is undefined in this segment */
2903 int code16
= fragP
->fr_subtype
& CODE16
;
2904 int size
= code16
? 2 : 4;
2905 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
2909 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2910 opcode
[0] = 0xe9; /* dword disp jmp */
2911 fragP
->fr_fix
+= size
;
2912 fix_new (fragP
, old_fr_fix
, size
,
2914 fragP
->fr_offset
, 1,
2915 (GOT_symbol
&& /* Not quite right - we should switch on
2916 presence of @PLT, but I cannot see how
2917 to get to that from here. We should have
2918 done this in md_assemble to really
2919 get it right all of the time, but I
2920 think it does not matter that much, as
2921 this will be right most of the time. ERY*/
2922 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
2923 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
2927 /* This changes the byte-displacement jump 0x7N -->
2928 the dword-displacement jump 0x0f8N */
2929 opcode
[1] = opcode
[0] + 0x10;
2930 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2931 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
2932 fix_new (fragP
, old_fr_fix
+ 1, size
,
2934 fragP
->fr_offset
, 1,
2935 (GOT_symbol
&& /* Not quite right - we should switch on
2936 presence of @PLT, but I cannot see how
2937 to get to that from here. ERY */
2938 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
2939 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
2944 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2945 } /* md_estimate_size_before_relax() */
2948 * md_convert_frag();
2950 * Called after relax() is finished.
2951 * In: Address of frag.
2952 * fr_type == rs_machine_dependent.
2953 * fr_subtype is what the address relaxed to.
2955 * Out: Any fixSs and constants are set up.
2956 * Caller will turn frag into a ".space 0".
2958 #ifndef BFD_ASSEMBLER
2960 md_convert_frag (headers
, sec
, fragP
)
2961 object_headers
*headers
;
2963 register fragS
*fragP
;
2966 md_convert_frag (abfd
, sec
, fragP
)
2969 register fragS
*fragP
;
2972 register unsigned char *opcode
;
2973 unsigned char *where_to_put_displacement
= NULL
;
2974 unsigned int target_address
;
2975 unsigned int opcode_address
;
2976 unsigned int extension
= 0;
2977 int displacement_from_opcode_start
;
2979 opcode
= (unsigned char *) fragP
->fr_opcode
;
2981 /* Address we want to reach in file space. */
2982 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2983 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2984 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
2987 /* Address opcode resides at in file space. */
2988 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2990 /* Displacement from opcode start to fill into instruction. */
2991 displacement_from_opcode_start
= target_address
- opcode_address
;
2993 switch (fragP
->fr_subtype
)
2995 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
2996 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
2997 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
2998 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
2999 /* don't have to change opcode */
3000 extension
= 1; /* 1 opcode + 1 displacement */
3001 where_to_put_displacement
= &opcode
[1];
3004 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3005 extension
= 5; /* 2 opcode + 4 displacement */
3006 opcode
[1] = opcode
[0] + 0x10;
3007 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3008 where_to_put_displacement
= &opcode
[2];
3011 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3012 extension
= 4; /* 1 opcode + 4 displacement */
3014 where_to_put_displacement
= &opcode
[1];
3017 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3018 extension
= 3; /* 2 opcode + 2 displacement */
3019 opcode
[1] = opcode
[0] + 0x10;
3020 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3021 where_to_put_displacement
= &opcode
[2];
3024 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3025 extension
= 2; /* 1 opcode + 2 displacement */
3027 where_to_put_displacement
= &opcode
[1];
3031 BAD_CASE (fragP
->fr_subtype
);
3034 /* now put displacement after opcode */
3035 md_number_to_chars ((char *) where_to_put_displacement
,
3036 (valueT
) (displacement_from_opcode_start
- extension
),
3037 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3038 fragP
->fr_fix
+= extension
;
3042 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3043 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3044 const int md_reloc_size
= 8; /* Size of relocation record */
3047 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3049 addressT from_addr
, to_addr
;
3055 offset
= to_addr
- (from_addr
+ 2);
3056 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3057 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3061 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3063 addressT from_addr
, to_addr
;
3069 if (flag_do_long_jump
)
3071 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3072 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3073 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3074 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3075 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3079 offset
= to_addr
- (from_addr
+ 5);
3080 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3081 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3085 /* Apply a fixup (fixS) to segment data, once it has been determined
3086 by our caller that we have all the info we need to fix it up.
3088 On the 386, immediates, displacements, and data pointers are all in
3089 the same (little-endian) format, so we don't need to care about which
3093 md_apply_fix3 (fixP
, valp
, seg
)
3094 fixS
*fixP
; /* The fix we're to put in. */
3095 valueT
*valp
; /* Pointer to the value of the bits. */
3096 segT seg
; /* Segment fix is from. */
3098 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3099 valueT value
= *valp
;
3101 if (fixP
->fx_r_type
== BFD_RELOC_32
&& fixP
->fx_pcrel
)
3102 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3104 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3106 * This is a hack. There should be a better way to
3109 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
3112 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3114 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3117 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3119 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3120 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3121 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
3122 || (fixP
->fx_addsy
->bsym
->flags
& BSF_SECTION_SYM
) != 0)
3123 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3124 && ! S_IS_WEAK (fixP
->fx_addsy
)
3125 && S_IS_DEFINED (fixP
->fx_addsy
)
3126 && ! S_IS_COMMON (fixP
->fx_addsy
))
3128 /* Yes, we add the values in twice. This is because
3129 bfd_perform_relocation subtracts them out again. I think
3130 bfd_perform_relocation is broken, but I don't dare change
3132 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3135 #if defined (OBJ_COFF) && defined (TE_PE)
3136 /* For some reason, the PE format does not store a section
3137 address offset for a PC relative symbol. */
3138 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3139 value
+= md_pcrel_from (fixP
);
3143 /* Fix a few things - the dynamic linker expects certain values here,
3144 and we must not dissappoint it. */
3145 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3146 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3148 switch (fixP
->fx_r_type
) {
3149 case BFD_RELOC_386_PLT32
:
3150 /* Make the jump instruction point to the address of the operand. At
3151 runtime we merely add the offset to the actual PLT entry. */
3154 case BFD_RELOC_386_GOTPC
:
3156 * This is tough to explain. We end up with this one if we have
3157 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3158 * here is to obtain the absolute address of the GOT, and it is strongly
3159 * preferable from a performance point of view to avoid using a runtime
3160 * relocation for this. The actual sequence of instructions often look
3166 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3168 * The call and pop essentially return the absolute address of
3169 * the label .L66 and store it in %ebx. The linker itself will
3170 * ultimately change the first operand of the addl so that %ebx points to
3171 * the GOT, but to keep things simple, the .o file must have this operand
3172 * set so that it generates not the absolute address of .L66, but the
3173 * absolute address of itself. This allows the linker itself simply
3174 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
3175 * added in, and the addend of the relocation is stored in the operand
3176 * field for the instruction itself.
3178 * Our job here is to fix the operand so that it would add the correct
3179 * offset so that %ebx would point to itself. The thing that is tricky is
3180 * that .-.L66 will point to the beginning of the instruction, so we need
3181 * to further modify the operand so that it will point to itself.
3182 * There are other cases where you have something like:
3184 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
3186 * and here no correction would be required. Internally in the assembler
3187 * we treat operands of this form as not being pcrel since the '.' is
3188 * explicitly mentioned, and I wonder whether it would simplify matters
3189 * to do it this way. Who knows. In earlier versions of the PIC patches,
3190 * the pcrel_adjust field was used to store the correction, but since the
3191 * expression is not pcrel, I felt it would be confusing to do it this way.
3195 case BFD_RELOC_386_GOT32
:
3196 value
= 0; /* Fully resolved at runtime. No addend. */
3198 case BFD_RELOC_386_GOTOFF
:
3201 case BFD_RELOC_VTABLE_INHERIT
:
3202 case BFD_RELOC_VTABLE_ENTRY
:
3212 md_number_to_chars (p
, value
, fixP
->fx_size
);
3218 /* This is never used. */
3219 long /* Knows about the byte order in a word. */
3220 md_chars_to_number (con
, nbytes
)
3221 unsigned char con
[]; /* Low order byte 1st. */
3222 int nbytes
; /* Number of bytes in the input. */
3225 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
3227 retval
<<= BITS_PER_CHAR
;
3235 #define MAX_LITTLENUMS 6
3237 /* Turn the string pointed to by litP into a floating point constant of type
3238 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
3239 is stored in *sizeP . An error message is returned, or NULL on OK. */
3241 md_atof (type
, litP
, sizeP
)
3247 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
3248 LITTLENUM_TYPE
*wordP
;
3270 return _("Bad call to md_atof ()");
3272 t
= atof_ieee (input_line_pointer
, type
, words
);
3274 input_line_pointer
= t
;
3276 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
3277 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
3278 the bigendian 386. */
3279 for (wordP
= words
+ prec
- 1; prec
--;)
3281 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
3282 litP
+= sizeof (LITTLENUM_TYPE
);
3287 char output_invalid_buf
[8];
3294 sprintf (output_invalid_buf
, "'%c'", c
);
3296 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
3297 return output_invalid_buf
;
3300 /* REG_STRING starts *before* REGISTER_PREFIX. */
3302 static const reg_entry
*
3303 parse_register (reg_string
, end_op
)
3307 register char *s
= reg_string
;
3309 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
3312 /* Skip REGISTER_PREFIX and possible whitespace. */
3314 if (is_space_char (*s
))
3318 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
3320 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
3323 as_bad (_("bad register name `%s'"), reg_name_given
);
3324 return (const reg_entry
*) NULL
;
3330 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
3334 as_bad (_("bad register name `%s'"), reg_name_given
);
3335 return (const reg_entry
*) NULL
;
3342 CONST
char *md_shortopts
= "kmVQ:";
3344 CONST
char *md_shortopts
= "m";
3346 struct option md_longopts
[] = {
3347 {NULL
, no_argument
, NULL
, 0}
3349 size_t md_longopts_size
= sizeof (md_longopts
);
3352 md_parse_option (c
, arg
)
3359 flag_do_long_jump
= 1;
3362 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3363 /* -k: Ignore for FreeBSD compatibility. */
3367 /* -V: SVR4 argument to print version ID. */
3369 print_version_id ();
3372 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
3373 should be emitted or not. FIXME: Not implemented. */
3385 md_show_usage (stream
)
3388 fprintf (stream
, _("\
3389 -m do long jump\n"));
3392 #ifdef BFD_ASSEMBLER
3393 #ifdef OBJ_MAYBE_ELF
3394 #ifdef OBJ_MAYBE_COFF
3396 /* Pick the target format to use. */
3399 i386_target_format ()
3401 switch (OUTPUT_FLAVOR
)
3403 case bfd_target_coff_flavour
:
3405 case bfd_target_elf_flavour
:
3406 return "elf32-i386";
3413 #endif /* OBJ_MAYBE_COFF */
3414 #endif /* OBJ_MAYBE_ELF */
3415 #endif /* BFD_ASSEMBLER */
3419 md_undefined_symbol (name
)
3422 if (*name
== '_' && *(name
+1) == 'G'
3423 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3427 if (symbol_find (name
))
3428 as_bad (_("GOT already in symbol table"));
3429 GOT_symbol
= symbol_new (name
, undefined_section
,
3430 (valueT
) 0, &zero_address_frag
);
3437 /* Round up a section size to the appropriate boundary. */
3439 md_section_align (segment
, size
)
3444 #ifdef BFD_ASSEMBLER
3445 /* For a.out, force the section size to be aligned. If we don't do
3446 this, BFD will align it for us, but it will not write out the
3447 final bytes of the section. This may be a bug in BFD, but it is
3448 easier to fix it here since that is how the other a.out targets
3452 align
= bfd_get_section_alignment (stdoutput
, segment
);
3453 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
3460 /* On the i386, PC-relative offsets are relative to the start of the
3461 next instruction. That is, the address of the offset, plus its
3462 size, since the offset is always the last part of the insn. */
3465 md_pcrel_from (fixP
)
3468 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3479 temp
= get_absolute_expression ();
3480 subseg_set (bss_section
, (subsegT
) temp
);
3481 demand_empty_rest_of_line ();
3487 #ifdef BFD_ASSEMBLER
3490 i386_validate_fix (fixp
)
3493 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
3495 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
3500 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
3501 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
3504 tc_gen_reloc (section
, fixp
)
3509 bfd_reloc_code_real_type code
;
3511 switch (fixp
->fx_r_type
)
3513 case BFD_RELOC_386_PLT32
:
3514 case BFD_RELOC_386_GOT32
:
3515 case BFD_RELOC_386_GOTOFF
:
3516 case BFD_RELOC_386_GOTPC
:
3518 case BFD_RELOC_VTABLE_ENTRY
:
3519 case BFD_RELOC_VTABLE_INHERIT
:
3520 code
= fixp
->fx_r_type
;
3523 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
3525 MAP (1, 0, BFD_RELOC_8
);
3526 MAP (2, 0, BFD_RELOC_16
);
3527 MAP (4, 0, BFD_RELOC_32
);
3528 MAP (1, 1, BFD_RELOC_8_PCREL
);
3529 MAP (2, 1, BFD_RELOC_16_PCREL
);
3530 MAP (4, 1, BFD_RELOC_32_PCREL
);
3533 as_bad (_("Can not do %d byte pc-relative relocation"),
3536 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
3537 code
= BFD_RELOC_32
;
3545 if (code
== BFD_RELOC_32
3547 && fixp
->fx_addsy
== GOT_symbol
)
3548 code
= BFD_RELOC_386_GOTPC
;
3550 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3551 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
3553 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3554 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
3555 vtable entry to be used in the relocation's section offset. */
3556 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3557 rel
->address
= fixp
->fx_offset
;
3560 rel
->addend
= fixp
->fx_addnumber
;
3564 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3565 if (rel
->howto
== NULL
)
3567 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3568 _("Cannot represent relocation type %s"),
3569 bfd_get_reloc_code_name (code
));
3570 /* Set howto to a garbage value so that we can keep going. */
3571 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3572 assert (rel
->howto
!= NULL
);
3578 #else /* ! BFD_ASSEMBLER */
3580 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
3582 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3585 relax_addressT segment_address_in_file
;
3588 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3589 * Out: GNU LD relocation length code: 0, 1, or 2.
3592 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3595 know (fixP
->fx_addsy
!= NULL
);
3597 md_number_to_chars (where
,
3598 (valueT
) (fixP
->fx_frag
->fr_address
3599 + fixP
->fx_where
- segment_address_in_file
),
3602 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3603 ? S_GET_TYPE (fixP
->fx_addsy
)
3604 : fixP
->fx_addsy
->sy_number
);
3606 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
3607 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3608 where
[4] = r_symbolnum
& 0x0ff;
3609 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
3610 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
3611 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
3614 #endif /* OBJ_AOUT or OBJ_BOUT */
3616 #if defined (I386COFF)
3619 tc_coff_fix2rtype (fixP
)
3622 if (fixP
->fx_r_type
== R_IMAGEBASE
)
3625 return (fixP
->fx_pcrel
?
3626 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
3627 fixP
->fx_size
== 2 ? R_PCRWORD
:
3629 (fixP
->fx_size
== 1 ? R_RELBYTE
:
3630 fixP
->fx_size
== 2 ? R_RELWORD
:
3635 tc_coff_sizemachdep (frag
)
3639 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
3644 #endif /* I386COFF */
3646 #endif /* BFD_ASSEMBLER? */
3648 /* end of tc-i386.c */