gas/config/tc-i386.h

   1 /* i386.h -- Header file for i386.c
   2    Copyright (C) 1989, Free Software Foundation.
   3
   4 This file is part of GAS, the GNU Assembler.
   5
   6 GAS is free software; you can redistribute it and/or modify
   7 it under the terms of the GNU General Public License as published by
   8 the Free Software Foundation; either version 1, or (at your option)
   9 any later version.
  10
  11 GAS is distributed in the hope that it will be useful,
  12 but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 GNU General Public License for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with GAS; see the file COPYING.  If not, write to
  18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
  19
  20 #define TC_I386 1
  21
  22 #define tc_crawl_symbol_chain(a)        ; /* not used */
  23 #define tc_headers_hook(a)              ; /* not used */
  24
  25 #define MAX_OPERANDS 3          /* max operands per insn */
  26 #define MAX_PREFIXES 4          /* max prefixes per opcode */
  27 #define MAX_IMMEDIATE_OPERANDS 2 /* max immediates per insn */
  28 #define MAX_MEMORY_OPERANDS 2   /* max memory ref per insn
  29                                  * lcall uses 2
  30                                  */
  31 /* we define the syntax here (modulo base,index,scale syntax) */
  32 #define REGISTER_PREFIX '%'
  33 #define IMMEDIATE_PREFIX '$'
  34 #define ABSOLUTE_PREFIX '*'
  35 #define PREFIX_SEPERATOR '/'
  36
  37 #define TWO_BYTE_OPCODE_ESCAPE 0x0f
  38
  39 /* register numbers */
  40 #define EBP_REG_NUM 5
  41 #define ESP_REG_NUM 4
  42
  43 /* modrm_byte.regmem for twobyte escape */
  44 #define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
  45 /* index_base_byte.index for no index register addressing */
  46 #define NO_INDEX_REGISTER ESP_REG_NUM
  47 /* index_base_byte.base for no base register addressing */
  48 #define NO_BASE_REGISTER EBP_REG_NUM
  49
  50 /* these are the att as opcode suffixes, making movl --> mov, for example */
  51 #define DWORD_OPCODE_SUFFIX 'l'
  52 #define WORD_OPCODE_SUFFIX  'w'
  53 #define BYTE_OPCODE_SUFFIX  'b'
  54
  55 /* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
  56 #define REGMEM_FIELD_HAS_REG 0x3                /* always = 0x3 */
  57 #define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
  58
  59 #define END_OF_INSN '\0'
  60
  61 /*
  62 When an operand is read in it is classified by its type.  This type includes
  63 all the possible ways an operand can be used.  Thus, '%eax' is both 'register
  64 # 0' and 'The Accumulator'.  In our language this is expressed by OR'ing
  65 'Reg32' (any 32 bit register) and 'Acc' (the accumulator).
  66 Operands are classified so that we can match given operand types with
  67 the opcode table in i386-opcode.h.
  68  */
  69 #define Unknown 0x0
  70 /* register */
  71 #define Reg8    0x1             /* 8 bit reg */
  72 #define Reg16   0x2             /* 16 bit reg */
  73 #define Reg32   0x4             /* 32 bit reg */
  74 #define Reg     (Reg8|Reg16|Reg32)    /* gen'l register */
  75 #define WordReg (Reg16|Reg32)   /* for push/pop operands */
  76 /* immediate */
  77 #define Imm8    0x8             /* 8 bit immediate */
  78 #define Imm8S   0x10            /* 8 bit immediate sign extended */
  79 #define Imm16   0x20            /* 16 bit immediate */
  80 #define Imm32   0x40            /* 32 bit immediate */
  81 #define Imm1    0x80            /* 1 bit immediate */
  82 #define ImmUnknown Imm32        /* for unknown expressions */
  83 #define Imm     (Imm8|Imm8S|Imm16|Imm32)    /* gen'l immediate */
  84 /* memory */
  85 #define Disp8   0x200           /* 8 bit displacement (for jumps) */
  86 #define Disp16  0x400           /* 16 bit displacement */
  87 #define Disp32  0x800           /* 32 bit displacement */
  88 #define Disp    (Disp8|Disp16|Disp32) /* General displacement */
  89 #define DispUnknown Disp32      /* for unknown size displacements */
  90 #define Mem8    0x1000
  91 #define Mem16   0x2000
  92 #define Mem32   0x4000
  93 #define BaseIndex 0x8000
  94 #define Mem     (Disp|Mem8|Mem16|Mem32|BaseIndex) /* General memory */
  95 #define WordMem   (Mem16|Mem32|Disp|BaseIndex)
  96 #define ByteMem   (Mem8|Disp|BaseIndex)
  97 /* specials */
  98 #define InOutPortReg 0x10000    /* register to hold in/out port addr = dx */
  99 #define ShiftCount 0x20000      /* register to hold shift cound = cl */
 100 #define Control 0x40000         /* Control register */
 101 #define Debug   0x80000         /* Debug register */
 102 #define Test    0x100000                /* Test register */
 103 #define FloatReg 0x200000       /* Float register */
 104 #define FloatAcc 0x400000       /* Float stack top %st(0) */
 105 #define SReg2   0x800000                /* 2 bit segment register */
 106 #define SReg3   0x1000000               /* 3 bit segment register */
 107 #define Acc     0x2000000               /* Accumulator %al or %ax or %eax */
 108 #define ImplicitRegister (InOutPortReg|ShiftCount|Acc|FloatAcc)
 109 #define JumpAbsolute 0x4000000
 110 #define Abs8  0x08000000
 111 #define Abs16 0x10000000
 112 #define Abs32 0x20000000
 113 #define Abs (Abs8|Abs16|Abs32)
 114
 115 #define MODE_FROM_DISP_SIZE(t) \
 116       ((t&(Disp8)) ? 1 : \
 117        ((t&(Disp32)) ? 2 : 0))
 118
 119 #define Byte (Reg8|Imm8|Imm8S)
 120 #define Word (Reg16|Imm16)
 121 #define DWord (Reg32|Imm32)
 122
 123 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifyer */
 124 #define OPCODE_SUFFIX_TO_TYPE(s)                 \
 125   (s == BYTE_OPCODE_SUFFIX ? Byte : \
 126    (s == WORD_OPCODE_SUFFIX ? Word : DWord))
 127
 128 #define FITS_IN_SIGNED_BYTE(num) ((num) >= -128 && (num) <= 127)
 129 #define FITS_IN_UNSIGNED_BYTE(num) ((num) >= 0 && (num) <= 255)
 130 #define FITS_IN_UNSIGNED_WORD(num) ((num) >= 0 && (num) <= 65535)
 131 #define FITS_IN_SIGNED_WORD(num) ((num) >= -32768 && (num) <= 32767)
 132
 133 #define SMALLEST_DISP_TYPE(num) \
 134   FITS_IN_SIGNED_BYTE(num) ? (Disp8|Disp32|Abs8|Abs32) : (Disp32|Abs32)
 135
 136 #define SMALLEST_IMM_TYPE(num) \
 137   (num == 1) ? (Imm1|Imm8|Imm8S|Imm16|Imm32): \
 138   FITS_IN_SIGNED_BYTE(num) ? (Imm8S|Imm8|Imm16|Imm32) : \
 139   FITS_IN_UNSIGNED_BYTE(num) ? (Imm8|Imm16|Imm32): \
 140   (FITS_IN_SIGNED_WORD(num)||FITS_IN_UNSIGNED_WORD(num)) ? (Imm16|Imm32) : \
 141   (Imm32)
 142
 143 typedef struct {
 144   /* instruction name sans width suffix ("mov" for movl insns) */
 145   char          *name;
 146
 147   /* how many operands */
 148   unsigned int    operands;
 149
 150   /* base_opcode is the fundamental opcode byte with a optional prefix(es). */
 151   unsigned int    base_opcode;
 152
 153   /* extension_opcode is the 3 bit extension for group <n> insns.
 154      If this template has no extension opcode (the usual case) use None */
 155   unsigned char    extension_opcode;
 156 #define None 0xff               /* If no extension_opcode is possible. */
 157
 158   /* the bits in opcode_modifier are used to generate the final opcode from
 159      the base_opcode.  These bits also are used to detect alternate forms of
 160      the same instruction */
 161   unsigned int    opcode_modifier;
 162
 163 /* opcode_modifier bits: */
 164 #define W        0x1    /* set if operands are words or dwords */
 165 #define D        0x2    /* D = 0 if Reg --> Regmem; D = 1 if Regmem --> Reg */
 166 /* direction flag for floating insns:  MUST BE 0x400 */
 167 #define FloatD 0x400
 168 /* shorthand */
 169 #define DW (D|W)
 170 #define ShortForm 0x10          /* register is in low 3 bits of opcode */
 171 #define ShortFormW 0x20         /* ShortForm and W bit is 0x8 */
 172 #define Seg2ShortForm 0x40      /* encoding of load segment reg insns */
 173 #define Seg3ShortForm 0x80      /* fs/gs segment register insns. */
 174 #define Jump 0x100              /* special case for jump insns. */
 175 #define JumpInterSegment 0x200  /* special case for intersegment leaps/calls */
 176 /* 0x400 CANNOT BE USED since it's already used by FloatD above */
 177 #define DONT_USE 0x400
 178 #define NoModrm 0x800
 179 #define Modrm 0x1000
 180 #define imulKludge 0x2000
 181 #define JumpByte 0x4000
 182 #define JumpDword 0x8000
 183 #define ReverseRegRegmem 0x10000
 184
 185   /* (opcode_modifier & COMES_IN_ALL_SIZES) is true if the
 186      instuction comes in byte, word, and dword sizes and is encoded into
 187      machine code in the canonical way. */
 188 #define COMES_IN_ALL_SIZES (W)
 189
 190   /* (opcode_modifier & COMES_IN_BOTH_DIRECTIONS) indicates that the
 191      source and destination operands can be reversed by setting either
 192      the D (for integer insns) or the FloatD (for floating insns) bit
 193      in base_opcode. */
 194 #define COMES_IN_BOTH_DIRECTIONS (D|FloatD)
 195
 196   /* operand_types[i] describes the type of operand i.  This is made
 197      by OR'ing together all of the possible type masks.  (e.g.
 198      'operand_types[i] = Reg|Imm' specifies that operand i can be
 199      either a register or an immediate operand */
 200   unsigned int operand_types[3];
 201 } template;
 202
 203 /*
 204   'templates' is for grouping together 'template' structures for opcodes
 205   of the same name.  This is only used for storing the insns in the grand
 206   ole hash table of insns.
 207   The templates themselves start at START and range up to (but not including)
 208   END.
 209 */
 210 typedef struct {
 211   template      *start;
 212   template      *end;
 213 } templates;
 214
 215 /* these are for register name --> number & type hash lookup */
 216 typedef struct {
 217   char * reg_name;
 218   unsigned int   reg_type;
 219   unsigned int   reg_num;
 220 } reg_entry;
 221
 222 typedef struct {
 223   char * seg_name;
 224   unsigned int   seg_prefix;
 225 } seg_entry;
 226
 227 /* these are for prefix name --> prefix code hash lookup */
 228 typedef struct {
 229   char * prefix_name;
 230   unsigned char  prefix_code;
 231 } prefix_entry;
 232
 233 /* 386 operand encoding bytes:  see 386 book for details of this. */
 234 typedef struct {
 235   unsigned regmem:3;         /* codes register or memory operand */
 236   unsigned reg:3;            /* codes register operand (or extended opcode) */
 237   unsigned mode:2;           /* how to interpret regmem & reg */
 238 } modrm_byte;
 239
 240 /* 386 opcode byte to code indirect addressing. */
 241 typedef struct {
 242   unsigned base:3;
 243   unsigned index:3;
 244   unsigned scale:2;
 245 } base_index_byte;
 246
 247 /* end of tc-i386.h */