1 /* tc-i386.h -- Header file for tc-i386.c
2 Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 #define TARGET_FORMAT "coff-i386-lynx"
28 /* This is used to determine relocation types in tc-i386.c. The first
29 parameter is the current relocation type, the second one is the desired
30 type. The idea is that if the original type is already some kind of PIC
31 relocation, we leave it alone, otherwise we give it the desired type */
33 #define TC_RELOC(X,Y) (((X) != BFD_RELOC_386_PLT32 && \
34 (X) != BFD_RELOC_386_GOTOFF && \
35 (X) != BFD_RELOC_386_GOT32 && \
36 (X) != BFD_RELOC_386_GOTPC) ? Y : X)
38 #define tc_fix_adjustable(X) tc_i386_fix_adjustable(X)
40 /* This is the relocation type for direct references to GLOBAL_OFFSET_TABLE.
41 * It comes up in complicated expressions such as
42 * _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed normally with
43 * the regular expressions. The fixup specified here when used at runtime
44 * implies that we should add the address of the GOT to the specified location,
45 * and as a result we have simplified the expression into something we can use.
47 #define TC_RELOC_GLOBAL_OFFSET_TABLE BFD_RELOC_386_GOTPC
49 /* This expression evaluates to false if the relocation is for a local object
50 for which we still want to do the relocation at runtime. True if we
51 are willing to perform this relocation while building the .o file.
52 This is only used for pcrel relocations, so GOTOFF does not need to be
53 checked here. I am not sure if some of the others are ever used with
54 pcrel, but it is easier to be safe than sorry. */
56 #define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
57 ((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \
58 && (FIX)->fx_r_type != BFD_RELOC_386_GOT32 \
59 && (FIX)->fx_r_type != BFD_RELOC_386_GOTPC)
61 #define TARGET_ARCH bfd_arch_i386
62 #define TARGET_BYTES_BIG_ENDIAN 0
66 #define TARGET_FORMAT "a.out-i386-netbsd"
69 #define TARGET_FORMAT "a.out-i386-bsd"
72 #define TARGET_FORMAT "a.out-i386-linux"
75 #define TARGET_FORMAT "a.out-mach3"
78 #define TARGET_FORMAT "a.out-i386"
83 #define TARGET_FORMAT "elf32-i386"
86 #else /* ! BFD_ASSEMBLER */
90 #define COFF_MAGIC I386MAGIC
91 #define BFD_ARCH bfd_arch_i386
92 #define COFF_FLAGS F_AR32WR
93 #define TC_COUNT_RELOC(x) ((x)->fx_addsy /* ||(x)->fx_subsy||(x)->fx_offset */)
94 #define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype(fixP)
95 extern short tc_coff_fix2rtype ();
96 #define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
97 extern int tc_coff_sizemachdep
PARAMS ((fragS
*frag
));
98 #define SUB_SEGMENT_ALIGN(SEG) 2
100 /* Need this for PIC relocations */
101 #define NEED_FX_R_TYPE
103 #define AOUT_MACHTYPE 100
104 #undef REVERSE_SORT_RELOCS
106 #endif /* ! BFD_ASSEMBLER */
109 #define NO_RELOC BFD_RELOC_NONE
113 #define tc_coff_symbol_emit_hook(a) ; /* not used */
116 /* Local labels starts with .L */
117 #define LOCAL_LABEL(name) (name[0] == '.' \
118 && (name[1] == 'L' || name[1] == 'X' || name[1] == '.'))
119 #define FAKE_LABEL_NAME ".L0\001"
121 #define LOCAL_LABELS_FB 1
123 #define tc_aout_pre_write_hook(x) {;} /* not used */
124 #define tc_crawl_symbol_chain(a) {;} /* not used */
125 #define tc_headers_hook(a) {;} /* not used */
127 #define MAX_OPERANDS 3 /* max operands per insn */
128 #define MAX_PREFIXES 5 /* max prefixes per opcode */
129 #define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn */
130 #define MAX_MEMORY_OPERANDS 2 /* max memory ref per insn (lcall uses 2) */
132 /* we define the syntax here (modulo base,index,scale syntax) */
133 #define REGISTER_PREFIX '%'
134 #define IMMEDIATE_PREFIX '$'
135 #define ABSOLUTE_PREFIX '*'
136 #define PREFIX_SEPERATOR '/'
138 #define TWO_BYTE_OPCODE_ESCAPE 0x0f
139 #define NOP_OPCODE (char) 0x90
141 /* register numbers */
142 #define EBP_REG_NUM 5
143 #define ESP_REG_NUM 4
145 /* modrm_byte.regmem for twobyte escape */
146 #define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
147 /* index_base_byte.index for no index register addressing */
148 #define NO_INDEX_REGISTER ESP_REG_NUM
149 /* index_base_byte.base for no base register addressing */
150 #define NO_BASE_REGISTER EBP_REG_NUM
152 /* these are the att as opcode suffixes, making movl --> mov, for example */
153 #define DWORD_OPCODE_SUFFIX 'l'
154 #define WORD_OPCODE_SUFFIX 'w'
155 #define BYTE_OPCODE_SUFFIX 'b'
157 /* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
158 #define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
159 #define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
161 #define END_OF_INSN '\0'
164 When an operand is read in it is classified by its type. This type includes
165 all the possible ways an operand can be used. Thus, '%eax' is both 'register
166 # 0' and 'The Accumulator'. In our language this is expressed by OR'ing
167 'Reg32' (any 32 bit register) and 'Acc' (the accumulator).
168 Operands are classified so that we can match given operand types with
169 the opcode table in i386-opcode.h.
173 #define Reg8 0x1 /* 8 bit reg */
174 #define Reg16 0x2 /* 16 bit reg */
175 #define Reg32 0x4 /* 32 bit reg */
176 #define Reg (Reg8|Reg16|Reg32) /* gen'l register */
177 #define WordReg (Reg16|Reg32) /* for push/pop operands */
179 #define Imm8 0x8 /* 8 bit immediate */
180 #define Imm8S 0x10 /* 8 bit immediate sign extended */
181 #define Imm16 0x20 /* 16 bit immediate */
182 #define Imm32 0x40 /* 32 bit immediate */
183 #define Imm1 0x80 /* 1 bit immediate */
184 #define ImmUnknown Imm32 /* for unknown expressions */
185 #define Imm (Imm8|Imm8S|Imm16|Imm32) /* gen'l immediate */
187 #define Disp8 0x200 /* 8 bit displacement (for jumps) */
188 #define Disp16 0x400 /* 16 bit displacement */
189 #define Disp32 0x800 /* 32 bit displacement */
190 #define Disp (Disp8|Disp16|Disp32) /* General displacement */
191 #define DispUnknown Disp32 /* for unknown size displacements */
195 #define BaseIndex 0x8000
196 #define Mem (Disp|Mem8|Mem16|Mem32|BaseIndex) /* General memory */
197 #define WordMem (Mem16|Mem32|Disp|BaseIndex)
198 #define ByteMem (Mem8|Disp|BaseIndex)
200 #define InOutPortReg 0x10000 /* register to hold in/out port addr = dx */
201 #define ShiftCount 0x20000 /* register to hold shift cound = cl */
202 #define Control 0x40000 /* Control register */
203 #define Debug 0x80000 /* Debug register */
204 #define Test 0x100000 /* Test register */
205 #define FloatReg 0x200000 /* Float register */
206 #define FloatAcc 0x400000 /* Float stack top %st(0) */
207 #define SReg2 0x800000 /* 2 bit segment register */
208 #define SReg3 0x1000000 /* 3 bit segment register */
209 #define Acc 0x2000000 /* Accumulator %al or %ax or %eax */
210 #define ImplicitRegister (InOutPortReg|ShiftCount|Acc|FloatAcc)
211 #define JumpAbsolute 0x4000000
212 #define Abs8 0x08000000
213 #define Abs16 0x10000000
214 #define Abs32 0x20000000
215 #define Abs (Abs8|Abs16|Abs32)
217 #define Byte (Reg8|Imm8|Imm8S)
218 #define Word (Reg16|Imm16)
219 #define DWord (Reg32|Imm32)
221 #define SMALLEST_DISP_TYPE(num) \
222 fits_in_signed_byte(num) ? (Disp8|Disp32|Abs8|Abs32) : (Disp32|Abs32)
226 /* instruction name sans width suffix ("mov" for movl insns) */
229 /* how many operands */
230 unsigned int operands
;
232 /* base_opcode is the fundamental opcode byte with a optional prefix(es). */
233 unsigned int base_opcode
;
235 /* extension_opcode is the 3 bit extension for group <n> insns.
236 If this template has no extension opcode (the usual case) use None */
237 unsigned char extension_opcode
;
238 #define None 0xff /* If no extension_opcode is possible. */
240 /* the bits in opcode_modifier are used to generate the final opcode from
241 the base_opcode. These bits also are used to detect alternate forms of
242 the same instruction */
243 unsigned int opcode_modifier
;
245 /* opcode_modifier bits: */
246 #define W 0x1 /* set if operands are words or dwords */
247 #define D 0x2 /* D = 0 if Reg --> Regmem; D = 1 if Regmem --> Reg */
248 /* direction flag for floating insns: MUST BE 0x400 */
252 #define ShortForm 0x10 /* register is in low 3 bits of opcode */
253 #define ShortFormW 0x20 /* ShortForm and W bit is 0x8 */
254 #define Seg2ShortForm 0x40 /* encoding of load segment reg insns */
255 #define Seg3ShortForm 0x80 /* fs/gs segment register insns. */
256 #define Jump 0x100 /* special case for jump insns. */
257 #define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */
258 /* 0x400 CANNOT BE USED since it's already used by FloatD above */
259 #define DONT_USE 0x400
260 #define NoModrm 0x800
262 #define imulKludge 0x2000
263 #define JumpByte 0x4000
264 #define JumpDword 0x8000
265 #define ReverseRegRegmem 0x10000
266 #define Data16 0x20000 /* needs data prefix if in 32-bit mode */
267 #define Data32 0x40000 /* needs data prefix if in 16-bit mode */
269 /* (opcode_modifier & COMES_IN_ALL_SIZES) is true if the
270 instuction comes in byte, word, and dword sizes and is encoded into
271 machine code in the canonical way. */
272 #define COMES_IN_ALL_SIZES (W)
274 /* (opcode_modifier & COMES_IN_BOTH_DIRECTIONS) indicates that the
275 source and destination operands can be reversed by setting either
276 the D (for integer insns) or the FloatD (for floating insns) bit
278 #define COMES_IN_BOTH_DIRECTIONS (D|FloatD)
280 /* operand_types[i] describes the type of operand i. This is made
281 by OR'ing together all of the possible type masks. (e.g.
282 'operand_types[i] = Reg|Imm' specifies that operand i can be
283 either a register or an immediate operand */
284 unsigned int operand_types
[3];
289 'templates' is for grouping together 'template' structures for opcodes
290 of the same name. This is only used for storing the insns in the grand
291 ole hash table of insns.
292 The templates themselves start at START and range up to (but not including)
301 /* these are for register name --> number & type hash lookup */
305 unsigned int reg_type
;
306 unsigned int reg_num
;
314 unsigned int seg_prefix
;
319 /* these are for prefix name --> prefix code hash lookup */
323 unsigned char prefix_code
;
328 /* 386 operand encoding bytes: see 386 book for details of this. */
331 unsigned regmem
:3; /* codes register or memory operand */
332 unsigned reg
:3; /* codes register operand (or extended opcode) */
333 unsigned mode
:2; /* how to interpret regmem & reg */
338 /* 386 opcode byte to code indirect addressing. */
348 /* The name of the global offset table generated by the compiler. Allow
349 this to be overridden if need be. */
350 #ifndef GLOBAL_OFFSET_TABLE_NAME
351 #define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
355 void i386_validate_fix ();
356 #define TC_VALIDATE_FIX(FIXP,SEGTYPE,SKIP) i386_validate_fix(FIXP)
361 #define md_operand(x)
363 extern const struct relax_type md_relax_table
[];
364 #define TC_GENERIC_RELAX_TABLE md_relax_table
366 /* end of tc-i386.h */