1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright (C) 1998-2020 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
59 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
61 /* Some systems define MIN in, e.g., param.h. */
63 #define MIN(a,b) ((a) < (b) ? (a) : (b))
66 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
67 #define CURR_SLOT md.slot[md.curr_slot]
69 #define O_pseudo_fixup (O_max + 1)
73 /* IA-64 ABI section pseudo-ops. */
74 SPECIAL_SECTION_BSS
= 0,
76 SPECIAL_SECTION_SDATA
,
77 SPECIAL_SECTION_RODATA
,
78 SPECIAL_SECTION_COMMENT
,
79 SPECIAL_SECTION_UNWIND
,
80 SPECIAL_SECTION_UNWIND_INFO
,
81 /* HPUX specific section pseudo-ops. */
82 SPECIAL_SECTION_INIT_ARRAY
,
83 SPECIAL_SECTION_FINI_ARRAY
,
100 FUNC_LT_FPTR_RELATIVE
,
102 FUNC_LT_DTP_RELATIVE
,
106 FUNC_SLOTCOUNT_RELOC
,
113 REG_FR
= (REG_GR
+ 128),
114 REG_AR
= (REG_FR
+ 128),
115 REG_CR
= (REG_AR
+ 128),
116 REG_DAHR
= (REG_CR
+ 128),
117 REG_P
= (REG_DAHR
+ 8),
118 REG_BR
= (REG_P
+ 64),
119 REG_IP
= (REG_BR
+ 8),
126 /* The following are pseudo-registers for use by gas only. */
138 /* The following pseudo-registers are used for unwind directives only: */
146 DYNREG_GR
= 0, /* dynamic general purpose register */
147 DYNREG_FR
, /* dynamic floating point register */
148 DYNREG_PR
, /* dynamic predicate register */
152 enum operand_match_result
155 OPERAND_OUT_OF_RANGE
,
159 /* On the ia64, we can't know the address of a text label until the
160 instructions are packed into a bundle. To handle this, we keep
161 track of the list of labels that appear in front of each
165 struct label_fix
*next
;
167 bfd_boolean dw2_mark_labels
;
171 /* An internally used relocation. */
172 #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1)
175 /* This is the endianness of the current section. */
176 extern int target_big_endian
;
178 /* This is the default endianness. */
179 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
181 void (*ia64_number_to_chars
) (char *, valueT
, int);
183 static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE
*, int);
184 static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE
*, int);
186 static void (*ia64_float_to_chars
) (char *, LITTLENUM_TYPE
*, int);
188 static htab_t alias_hash
;
189 static htab_t alias_name_hash
;
190 static htab_t secalias_hash
;
191 static htab_t secalias_name_hash
;
193 /* List of chars besides those in app.c:symbol_chars that can start an
194 operand. Used to prevent the scrubber eating vital white-space. */
195 const char ia64_symbol_chars
[] = "@?";
197 /* Characters which always start a comment. */
198 const char comment_chars
[] = "";
200 /* Characters which start a comment at the beginning of a line. */
201 const char line_comment_chars
[] = "#";
203 /* Characters which may be used to separate multiple commands on a
205 const char line_separator_chars
[] = ";{}";
207 /* Characters which are used to indicate an exponent in a floating
209 const char EXP_CHARS
[] = "eE";
211 /* Characters which mean that a number is a floating point constant,
213 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
215 /* ia64-specific option processing: */
217 const char *md_shortopts
= "m:N:x::";
219 struct option md_longopts
[] =
221 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
222 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
223 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
224 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
227 size_t md_longopts_size
= sizeof (md_longopts
);
231 htab_t pseudo_hash
; /* pseudo opcode hash table */
232 htab_t reg_hash
; /* register name hash table */
233 htab_t dynreg_hash
; /* dynamic register hash table */
234 htab_t const_hash
; /* constant hash table */
235 htab_t entry_hash
; /* code entry hint hash table */
237 /* If X_op is != O_absent, the register name for the instruction's
238 qualifying predicate. If NULL, p0 is assumed for instructions
239 that are predictable. */
242 /* Optimize for which CPU. */
249 /* What to do when hint.b is used. */
261 explicit_mode
: 1, /* which mode we're in */
262 default_explicit_mode
: 1, /* which mode is the default */
263 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
265 keep_pending_output
: 1;
267 /* What to do when something is wrong with unwind directives. */
270 unwind_check_warning
,
274 /* Each bundle consists of up to three instructions. We keep
275 track of four most recent instructions so we can correctly set
276 the end_of_insn_group for the last instruction in a bundle. */
278 int num_slots_in_use
;
282 end_of_insn_group
: 1,
283 manual_bundling_on
: 1,
284 manual_bundling_off
: 1,
285 loc_directive_seen
: 1;
286 signed char user_template
; /* user-selected template, if any */
287 unsigned char qp_regno
; /* qualifying predicate */
288 /* This duplicates a good fraction of "struct fix" but we
289 can't use a "struct fix" instead since we can't call
290 fix_new_exp() until we know the address of the instruction. */
294 bfd_reloc_code_real_type code
;
295 enum ia64_opnd opnd
; /* type of operand in need of fix */
296 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
297 expressionS expr
; /* the value to be inserted */
299 fixup
[2]; /* at most two fixups per insn */
300 struct ia64_opcode
*idesc
;
301 struct label_fix
*label_fixups
;
302 struct label_fix
*tag_fixups
;
303 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
305 const char *src_file
;
306 unsigned int src_line
;
307 struct dwarf2_line_info debug_line
;
315 struct dynreg
*next
; /* next dynamic register */
317 unsigned short base
; /* the base register number */
318 unsigned short num_regs
; /* # of registers in this set */
320 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
322 flagword flags
; /* ELF-header flags */
325 unsigned hint
:1; /* is this hint currently valid? */
326 bfd_vma offset
; /* mem.offset offset */
327 bfd_vma base
; /* mem.offset base */
330 int path
; /* number of alt. entry points seen */
331 const char **entry_labels
; /* labels of all alternate paths in
332 the current DV-checking block. */
333 int maxpaths
; /* size currently allocated for
336 int pointer_size
; /* size in bytes of a pointer */
337 int pointer_size_shift
; /* shift size of a pointer for alignment */
339 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
343 /* These are not const, because they are modified to MMI for non-itanium1
345 /* MFI bundle of nops. */
346 static unsigned char le_nop
[16] =
348 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
349 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
351 /* MFI bundle of nops with stop-bit. */
352 static unsigned char le_nop_stop
[16] =
354 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
355 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
358 /* application registers: */
364 #define AR_BSPSTORE 18
390 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
391 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
392 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
393 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
394 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
395 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
396 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
397 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
398 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
399 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
400 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
401 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
402 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
403 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
406 /* control registers: */
447 {"cr.gpta", CR_GPTA
},
448 {"cr.ipsr", CR_IPSR
},
452 {"cr.itir", CR_ITIR
},
453 {"cr.iipa", CR_IIPA
},
457 {"cr.iib0", CR_IIB0
},
458 {"cr.iib1", CR_IIB1
},
463 {"cr.irr0", CR_IRR0
},
464 {"cr.irr1", CR_IRR0
+ 1},
465 {"cr.irr2", CR_IRR0
+ 2},
466 {"cr.irr3", CR_IRR3
},
469 {"cr.cmcv", CR_CMCV
},
470 {"cr.lrr0", CR_LRR0
},
479 static const struct const_desc
486 /* PSR constant masks: */
489 {"psr.be", ((valueT
) 1) << 1},
490 {"psr.up", ((valueT
) 1) << 2},
491 {"psr.ac", ((valueT
) 1) << 3},
492 {"psr.mfl", ((valueT
) 1) << 4},
493 {"psr.mfh", ((valueT
) 1) << 5},
495 {"psr.ic", ((valueT
) 1) << 13},
496 {"psr.i", ((valueT
) 1) << 14},
497 {"psr.pk", ((valueT
) 1) << 15},
499 {"psr.dt", ((valueT
) 1) << 17},
500 {"psr.dfl", ((valueT
) 1) << 18},
501 {"psr.dfh", ((valueT
) 1) << 19},
502 {"psr.sp", ((valueT
) 1) << 20},
503 {"psr.pp", ((valueT
) 1) << 21},
504 {"psr.di", ((valueT
) 1) << 22},
505 {"psr.si", ((valueT
) 1) << 23},
506 {"psr.db", ((valueT
) 1) << 24},
507 {"psr.lp", ((valueT
) 1) << 25},
508 {"psr.tb", ((valueT
) 1) << 26},
509 {"psr.rt", ((valueT
) 1) << 27},
510 /* 28-31: reserved */
511 /* 32-33: cpl (current privilege level) */
512 {"psr.is", ((valueT
) 1) << 34},
513 {"psr.mc", ((valueT
) 1) << 35},
514 {"psr.it", ((valueT
) 1) << 36},
515 {"psr.id", ((valueT
) 1) << 37},
516 {"psr.da", ((valueT
) 1) << 38},
517 {"psr.dd", ((valueT
) 1) << 39},
518 {"psr.ss", ((valueT
) 1) << 40},
519 /* 41-42: ri (restart instruction) */
520 {"psr.ed", ((valueT
) 1) << 43},
521 {"psr.bn", ((valueT
) 1) << 44},
524 /* indirect register-sets/memory: */
533 { "CPUID", IND_CPUID
},
534 { "cpuid", IND_CPUID
},
543 { "dahr", IND_DAHR
},
547 /* Pseudo functions used to indicate relocation types (these functions
548 start with an at sign (@). */
570 /* reloc pseudo functions (these must come first!): */
571 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
572 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
573 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
574 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
575 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
576 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
577 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
578 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
579 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
580 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
581 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
582 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
583 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
584 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
585 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
586 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
587 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
589 { "slotcount", PSEUDO_FUNC_RELOC
, { 0 } },
592 /* mbtype4 constants: */
593 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
594 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
595 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
596 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
597 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
599 /* fclass constants: */
600 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
601 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
602 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
603 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
604 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
605 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
606 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
607 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
608 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
610 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
612 /* hint constants: */
613 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
614 { "priority", PSEUDO_FUNC_CONST
, { 0x1 } },
617 { "clz", PSEUDO_FUNC_CONST
, { 32 } },
618 { "mpy", PSEUDO_FUNC_CONST
, { 33 } },
619 { "datahints", PSEUDO_FUNC_CONST
, { 34 } },
621 /* unwind-related constants: */
622 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
623 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
624 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
625 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_GNU
} },
626 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
627 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
628 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
630 /* unwind-related registers: */
631 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
634 /* 41-bit nop opcodes (one per unit): */
635 static const bfd_vma nop
[IA64_NUM_UNITS
] =
637 0x0000000000LL
, /* NIL => break 0 */
638 0x0008000000LL
, /* I-unit nop */
639 0x0008000000LL
, /* M-unit nop */
640 0x4000000000LL
, /* B-unit nop */
641 0x0008000000LL
, /* F-unit nop */
642 0x0000000000LL
, /* L-"unit" nop immediate */
643 0x0008000000LL
, /* X-unit nop */
646 /* Can't be `const' as it's passed to input routines (which have the
647 habit of setting temporary sentinels. */
648 static char special_section_name
[][20] =
650 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
651 {".IA_64.unwind"}, {".IA_64.unwind_info"},
652 {".init_array"}, {".fini_array"}
655 /* The best template for a particular sequence of up to three
657 #define N IA64_NUM_TYPES
658 static unsigned char best_template
[N
][N
][N
];
661 /* Resource dependencies currently in effect */
663 int depind
; /* dependency index */
664 const struct ia64_dependency
*dependency
; /* actual dependency */
665 unsigned specific
:1, /* is this a specific bit/regno? */
666 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
667 int index
; /* specific regno/bit within dependency */
668 int note
; /* optional qualifying note (0 if none) */
672 int insn_srlz
; /* current insn serialization state */
673 int data_srlz
; /* current data serialization state */
674 int qp_regno
; /* qualifying predicate for this usage */
675 const char *file
; /* what file marked this dependency */
676 unsigned int line
; /* what line marked this dependency */
677 struct mem_offset mem_offset
; /* optional memory offset hint */
678 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
679 int path
; /* corresponding code entry index */
681 static int regdepslen
= 0;
682 static int regdepstotlen
= 0;
683 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
684 static const char *dv_sem
[] = { "none", "implied", "impliedf",
685 "data", "instr", "specific", "stop", "other" };
686 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
688 /* Current state of PR mutexation */
689 static struct qpmutex
{
692 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
693 static int qp_mutexeslen
= 0;
694 static int qp_mutexestotlen
= 0;
695 static valueT qp_safe_across_calls
= 0;
697 /* Current state of PR implications */
698 static struct qp_imply
{
701 unsigned p2_branched
:1;
703 } *qp_implies
= NULL
;
704 static int qp_implieslen
= 0;
705 static int qp_impliestotlen
= 0;
707 /* Keep track of static GR values so that indirect register usage can
708 sometimes be tracked. */
719 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
725 /* Remember the alignment frag. */
726 static fragS
*align_frag
;
728 /* These are the routines required to output the various types of
731 /* A slot_number is a frag address plus the slot index (0-2). We use the
732 frag address here so that if there is a section switch in the middle of
733 a function, then instructions emitted to a different section are not
734 counted. Since there may be more than one frag for a function, this
735 means we also need to keep track of which frag this address belongs to
736 so we can compute inter-frag distances. This also nicely solves the
737 problem with nops emitted for align directives, which can't easily be
738 counted, but can easily be derived from frag sizes. */
740 typedef struct unw_rec_list
{
742 unsigned long slot_number
;
744 struct unw_rec_list
*next
;
747 #define SLOT_NUM_NOT_SET (unsigned)-1
749 /* Linked list of saved prologue counts. A very poor
750 implementation of a map from label numbers to prologue counts. */
751 typedef struct label_prologue_count
753 struct label_prologue_count
*next
;
754 unsigned long label_number
;
755 unsigned int prologue_count
;
756 } label_prologue_count
;
758 typedef struct proc_pending
761 struct proc_pending
*next
;
766 /* Maintain a list of unwind entries for the current function. */
770 /* Any unwind entries that should be attached to the current slot
771 that an insn is being constructed for. */
772 unw_rec_list
*current_entry
;
774 /* These are used to create the unwind table entry for this function. */
775 proc_pending proc_pending
;
776 symbolS
*info
; /* pointer to unwind info */
777 symbolS
*personality_routine
;
779 subsegT saved_text_subseg
;
780 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
782 /* TRUE if processing unwind directives in a prologue region. */
783 unsigned int prologue
: 1;
784 unsigned int prologue_mask
: 4;
785 unsigned int prologue_gr
: 7;
786 unsigned int body
: 1;
787 unsigned int insn
: 1;
788 unsigned int prologue_count
; /* number of .prologues seen so far */
789 /* Prologue counts at previous .label_state directives. */
790 struct label_prologue_count
* saved_prologue_counts
;
792 /* List of split up .save-s. */
793 unw_p_record
*pending_saves
;
796 /* The input value is a negated offset from psp, and specifies an address
797 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
798 must add 16 and divide by 4 to get the encoded value. */
800 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
802 typedef void (*vbyte_func
) (int, char *, char *);
804 /* Forward declarations: */
805 static void dot_alias (int);
806 static int parse_operand_and_eval (expressionS
*, int);
807 static void emit_one_bundle (void);
808 static bfd_reloc_code_real_type
ia64_gen_real_reloc_type (struct symbol
*,
809 bfd_reloc_code_real_type
);
810 static void insn_group_break (int, int, int);
811 static void add_qp_mutex (valueT
);
812 static void add_qp_imply (int, int);
813 static void clear_qp_mutex (valueT
);
814 static void clear_qp_implies (valueT
, valueT
);
815 static void print_dependency (const char *, int);
816 static void instruction_serialization (void);
817 static void data_serialization (void);
818 static void output_R3_format (vbyte_func
, unw_record_type
, unsigned long);
819 static void output_B3_format (vbyte_func
, unsigned long, unsigned long);
820 static void output_B4_format (vbyte_func
, unw_record_type
, unsigned long);
821 static void free_saved_prologue_counts (void);
823 /* Determine if application register REGNUM resides only in the integer
824 unit (as opposed to the memory unit). */
826 ar_is_only_in_integer_unit (int reg
)
829 return reg
>= 64 && reg
<= 111;
832 /* Determine if application register REGNUM resides only in the memory
833 unit (as opposed to the integer unit). */
835 ar_is_only_in_memory_unit (int reg
)
838 return reg
>= 0 && reg
<= 47;
841 /* Switch to section NAME and create section if necessary. It's
842 rather ugly that we have to manipulate input_line_pointer but I
843 don't see any other way to accomplish the same thing without
844 changing obj-elf.c (which may be the Right Thing, in the end). */
846 set_section (char *name
)
848 char *saved_input_line_pointer
;
850 saved_input_line_pointer
= input_line_pointer
;
851 input_line_pointer
= name
;
853 input_line_pointer
= saved_input_line_pointer
;
856 /* Map 's' to SHF_IA_64_SHORT. */
859 ia64_elf_section_letter (int letter
, const char **ptr_msg
)
862 return SHF_IA_64_SHORT
;
863 else if (letter
== 'o')
864 return SHF_LINK_ORDER
;
866 else if (letter
== 'O')
867 return SHF_IA_64_VMS_OVERLAID
;
868 else if (letter
== 'g')
869 return SHF_IA_64_VMS_GLOBAL
;
872 *ptr_msg
= _("bad .section directive: want a,o,s,w,x,M,S,G,T in string");
876 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
879 ia64_elf_section_flags (flagword flags
,
881 int type ATTRIBUTE_UNUSED
)
883 if (attr
& SHF_IA_64_SHORT
)
884 flags
|= SEC_SMALL_DATA
;
889 ia64_elf_section_type (const char *str
, size_t len
)
891 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
893 if (STREQ (ELF_STRING_ia64_unwind_info
))
896 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
899 if (STREQ (ELF_STRING_ia64_unwind
))
900 return SHT_IA_64_UNWIND
;
902 if (STREQ (ELF_STRING_ia64_unwind_once
))
903 return SHT_IA_64_UNWIND
;
905 if (STREQ ("unwind"))
906 return SHT_IA_64_UNWIND
;
913 set_regstack (unsigned int ins
,
921 sof
= ins
+ locs
+ outs
;
924 as_bad (_("Size of frame exceeds maximum of 96 registers"));
929 as_warn (_("Size of rotating registers exceeds frame size"));
932 md
.in
.base
= REG_GR
+ 32;
933 md
.loc
.base
= md
.in
.base
+ ins
;
934 md
.out
.base
= md
.loc
.base
+ locs
;
936 md
.in
.num_regs
= ins
;
937 md
.loc
.num_regs
= locs
;
938 md
.out
.num_regs
= outs
;
939 md
.rot
.num_regs
= rots
;
944 ia64_flush_insns (void)
946 struct label_fix
*lfix
;
948 subsegT saved_subseg
;
952 if (!md
.last_text_seg
)
956 saved_subseg
= now_subseg
;
958 subseg_set (md
.last_text_seg
, 0);
960 while (md
.num_slots_in_use
> 0)
961 emit_one_bundle (); /* force out queued instructions */
963 /* In case there are labels following the last instruction, resolve
966 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
968 symbol_set_value_now (lfix
->sym
);
969 mark
|= lfix
->dw2_mark_labels
;
973 dwarf2_where (&CURR_SLOT
.debug_line
);
974 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
975 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
976 dwarf2_consume_line_info ();
978 CURR_SLOT
.label_fixups
= 0;
980 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
981 symbol_set_value_now (lfix
->sym
);
982 CURR_SLOT
.tag_fixups
= 0;
984 /* In case there are unwind directives following the last instruction,
985 resolve those now. We only handle prologue, body, and endp directives
986 here. Give an error for others. */
987 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
995 ptr
->slot_number
= (unsigned long) frag_more (0);
996 ptr
->slot_frag
= frag_now
;
999 /* Allow any record which doesn't have a "t" field (i.e.,
1000 doesn't relate to a particular instruction). */
1016 as_bad (_("Unwind directive not followed by an instruction."));
1020 unwind
.current_entry
= NULL
;
1022 subseg_set (saved_seg
, saved_subseg
);
1024 if (md
.qp
.X_op
== O_register
)
1025 as_bad (_("qualifying predicate not followed by instruction"));
1029 ia64_cons_align (int nbytes
)
1034 for (log
= 0; (nbytes
& 1) != 1; nbytes
>>= 1)
1037 do_align (log
, NULL
, 0, 0);
1043 /* .vms_common section, symbol, size, alignment */
1046 obj_elf_vms_common (int ignore ATTRIBUTE_UNUSED
)
1048 const char *sec_name
;
1055 segT current_seg
= now_seg
;
1056 subsegT current_subseg
= now_subseg
;
1060 sec_name
= obj_elf_section_name ();
1061 if (sec_name
== NULL
)
1066 if (*input_line_pointer
== ',')
1068 input_line_pointer
++;
1073 as_bad (_("expected ',' after section name"));
1074 ignore_rest_of_line ();
1078 c
= get_symbol_name (&sym_name
);
1080 if (input_line_pointer
== sym_name
)
1082 (void) restore_line_pointer (c
);
1083 as_bad (_("expected symbol name"));
1084 ignore_rest_of_line ();
1088 symbolP
= symbol_find_or_make (sym_name
);
1089 (void) restore_line_pointer (c
);
1091 if ((S_IS_DEFINED (symbolP
) || symbol_equated_p (symbolP
))
1092 && !S_IS_COMMON (symbolP
))
1094 as_bad (_("Ignoring attempt to re-define symbol"));
1095 ignore_rest_of_line ();
1101 if (*input_line_pointer
== ',')
1103 input_line_pointer
++;
1108 as_bad (_("expected ',' after symbol name"));
1109 ignore_rest_of_line ();
1113 temp
= get_absolute_expression ();
1115 size
&= ((offsetT
) 2 << (stdoutput
->arch_info
->bits_per_address
- 1)) - 1;
1118 as_warn (_("size (%ld) out of range, ignored"), (long) temp
);
1119 ignore_rest_of_line ();
1125 if (*input_line_pointer
== ',')
1127 input_line_pointer
++;
1132 as_bad (_("expected ',' after symbol size"));
1133 ignore_rest_of_line ();
1137 log_align
= get_absolute_expression ();
1139 demand_empty_rest_of_line ();
1141 obj_elf_change_section
1142 (sec_name
, SHT_NOBITS
,
1143 SHF_ALLOC
| SHF_WRITE
| SHF_IA_64_VMS_OVERLAID
| SHF_IA_64_VMS_GLOBAL
,
1146 S_SET_VALUE (symbolP
, 0);
1147 S_SET_SIZE (symbolP
, size
);
1148 S_SET_EXTERNAL (symbolP
);
1149 S_SET_SEGMENT (symbolP
, now_seg
);
1151 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
1153 record_alignment (now_seg
, log_align
);
1155 cur_size
= bfd_section_size (now_seg
);
1156 if ((int) size
> cur_size
)
1159 = frag_var (rs_fill
, 1, 1, (relax_substateT
)0, NULL
,
1160 (valueT
)size
- (valueT
)cur_size
, NULL
);
1162 bfd_set_section_size (now_seg
, size
);
1165 /* Switch back to current segment. */
1166 subseg_set (current_seg
, current_subseg
);
1168 #ifdef md_elf_section_change_hook
1169 md_elf_section_change_hook ();
1175 /* Output COUNT bytes to a memory location. */
1176 static char *vbyte_mem_ptr
= NULL
;
1179 output_vbyte_mem (int count
, char *ptr
, char *comment ATTRIBUTE_UNUSED
)
1182 if (vbyte_mem_ptr
== NULL
)
1187 for (x
= 0; x
< count
; x
++)
1188 *(vbyte_mem_ptr
++) = ptr
[x
];
1191 /* Count the number of bytes required for records. */
1192 static int vbyte_count
= 0;
1194 count_output (int count
,
1195 char *ptr ATTRIBUTE_UNUSED
,
1196 char *comment ATTRIBUTE_UNUSED
)
1198 vbyte_count
+= count
;
1202 output_R1_format (vbyte_func f
, unw_record_type rtype
, int rlen
)
1208 output_R3_format (f
, rtype
, rlen
);
1214 else if (rtype
!= prologue
)
1215 as_bad (_("record type is not valid"));
1217 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1218 (*f
) (1, &byte
, NULL
);
1222 output_R2_format (vbyte_func f
, int mask
, int grsave
, unsigned long rlen
)
1226 mask
= (mask
& 0x0f);
1227 grsave
= (grsave
& 0x7f);
1229 bytes
[0] = (UNW_R2
| (mask
>> 1));
1230 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1231 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1232 (*f
) (count
, bytes
, NULL
);
1236 output_R3_format (vbyte_func f
, unw_record_type rtype
, unsigned long rlen
)
1242 output_R1_format (f
, rtype
, rlen
);
1248 else if (rtype
!= prologue
)
1249 as_bad (_("record type is not valid"));
1250 bytes
[0] = (UNW_R3
| r
);
1251 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1252 (*f
) (count
+ 1, bytes
, NULL
);
1256 output_P1_format (vbyte_func f
, int brmask
)
1259 byte
= UNW_P1
| (brmask
& 0x1f);
1260 (*f
) (1, &byte
, NULL
);
1264 output_P2_format (vbyte_func f
, int brmask
, int gr
)
1267 brmask
= (brmask
& 0x1f);
1268 bytes
[0] = UNW_P2
| (brmask
>> 1);
1269 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1270 (*f
) (2, bytes
, NULL
);
1274 output_P3_format (vbyte_func f
, unw_record_type rtype
, int reg
)
1318 as_bad (_("Invalid record type for P3 format."));
1320 bytes
[0] = (UNW_P3
| (r
>> 1));
1321 bytes
[1] = (((r
& 1) << 7) | reg
);
1322 (*f
) (2, bytes
, NULL
);
1326 output_P4_format (vbyte_func f
, unsigned char *imask
, unsigned long imask_size
)
1329 (*f
) (imask_size
, (char *) imask
, NULL
);
1333 output_P5_format (vbyte_func f
, int grmask
, unsigned long frmask
)
1336 grmask
= (grmask
& 0x0f);
1339 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1340 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1341 bytes
[3] = (frmask
& 0x000000ff);
1342 (*f
) (4, bytes
, NULL
);
1346 output_P6_format (vbyte_func f
, unw_record_type rtype
, int rmask
)
1351 if (rtype
== gr_mem
)
1353 else if (rtype
!= fr_mem
)
1354 as_bad (_("Invalid record type for format P6"));
1355 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1356 (*f
) (1, &byte
, NULL
);
1360 output_P7_format (vbyte_func f
,
1361 unw_record_type rtype
,
1368 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1373 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1423 bytes
[0] = (UNW_P7
| r
);
1424 (*f
) (count
, bytes
, NULL
);
1428 output_P8_format (vbyte_func f
, unw_record_type rtype
, unsigned long t
)
1466 case bspstore_psprel
:
1469 case bspstore_sprel
:
1481 case priunat_when_gr
:
1484 case priunat_psprel
:
1490 case priunat_when_mem
:
1497 count
+= output_leb128 (bytes
+ 2, t
, 0);
1498 (*f
) (count
, bytes
, NULL
);
1502 output_P9_format (vbyte_func f
, int grmask
, int gr
)
1506 bytes
[1] = (grmask
& 0x0f);
1507 bytes
[2] = (gr
& 0x7f);
1508 (*f
) (3, bytes
, NULL
);
1512 output_P10_format (vbyte_func f
, int abi
, int context
)
1516 bytes
[1] = (abi
& 0xff);
1517 bytes
[2] = (context
& 0xff);
1518 (*f
) (3, bytes
, NULL
);
1522 output_B1_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1528 output_B4_format (f
, rtype
, label
);
1531 if (rtype
== copy_state
)
1533 else if (rtype
!= label_state
)
1534 as_bad (_("Invalid record type for format B1"));
1536 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1537 (*f
) (1, &byte
, NULL
);
1541 output_B2_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1547 output_B3_format (f
, ecount
, t
);
1550 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1551 count
+= output_leb128 (bytes
+ 1, t
, 0);
1552 (*f
) (count
, bytes
, NULL
);
1556 output_B3_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1562 output_B2_format (f
, ecount
, t
);
1566 count
+= output_leb128 (bytes
+ 1, t
, 0);
1567 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1568 (*f
) (count
, bytes
, NULL
);
1572 output_B4_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1579 output_B1_format (f
, rtype
, label
);
1583 if (rtype
== copy_state
)
1585 else if (rtype
!= label_state
)
1586 as_bad (_("Invalid record type for format B1"));
1588 bytes
[0] = (UNW_B4
| (r
<< 3));
1589 count
+= output_leb128 (bytes
+ 1, label
, 0);
1590 (*f
) (count
, bytes
, NULL
);
1594 format_ab_reg (int ab
, int reg
)
1599 ret
= (ab
<< 5) | reg
;
1604 output_X1_format (vbyte_func f
,
1605 unw_record_type rtype
,
1616 if (rtype
== spill_sprel
)
1618 else if (rtype
!= spill_psprel
)
1619 as_bad (_("Invalid record type for format X1"));
1620 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1621 count
+= output_leb128 (bytes
+ 2, t
, 0);
1622 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1623 (*f
) (count
, bytes
, NULL
);
1627 output_X2_format (vbyte_func f
,
1638 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1639 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1640 count
+= output_leb128 (bytes
+ 3, t
, 0);
1641 (*f
) (count
, bytes
, NULL
);
1645 output_X3_format (vbyte_func f
,
1646 unw_record_type rtype
,
1658 if (rtype
== spill_sprel_p
)
1660 else if (rtype
!= spill_psprel_p
)
1661 as_bad (_("Invalid record type for format X3"));
1662 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1663 bytes
[2] = format_ab_reg (ab
, reg
);
1664 count
+= output_leb128 (bytes
+ 3, t
, 0);
1665 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1666 (*f
) (count
, bytes
, NULL
);
1670 output_X4_format (vbyte_func f
,
1682 bytes
[1] = (qp
& 0x3f);
1683 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1684 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1685 count
+= output_leb128 (bytes
+ 4, t
, 0);
1686 (*f
) (count
, bytes
, NULL
);
1689 /* This function checks whether there are any outstanding .save-s and
1690 discards them if so. */
1693 check_pending_save (void)
1695 if (unwind
.pending_saves
)
1697 unw_rec_list
*cur
, *prev
;
1699 as_warn (_("Previous .save incomplete"));
1700 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1701 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1704 prev
->next
= cur
->next
;
1706 unwind
.list
= cur
->next
;
1707 if (cur
== unwind
.tail
)
1709 if (cur
== unwind
.current_entry
)
1710 unwind
.current_entry
= cur
->next
;
1711 /* Don't free the first discarded record, it's being used as
1712 terminator for (currently) br_gr and gr_gr processing, and
1713 also prevents leaving a dangling pointer to it in its
1715 cur
->r
.record
.p
.grmask
= 0;
1716 cur
->r
.record
.p
.brmask
= 0;
1717 cur
->r
.record
.p
.frmask
= 0;
1718 prev
= cur
->r
.record
.p
.next
;
1719 cur
->r
.record
.p
.next
= NULL
;
1731 cur
= cur
->r
.record
.p
.next
;
1734 unwind
.pending_saves
= NULL
;
1738 /* This function allocates a record list structure, and initializes fields. */
1740 static unw_rec_list
*
1741 alloc_record (unw_record_type t
)
1744 ptr
= XNEW (unw_rec_list
);
1745 memset (ptr
, 0, sizeof (*ptr
));
1746 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1751 /* Dummy unwind record used for calculating the length of the last prologue or
1754 static unw_rec_list
*
1757 unw_rec_list
*ptr
= alloc_record (endp
);
1761 static unw_rec_list
*
1762 output_prologue (void)
1764 unw_rec_list
*ptr
= alloc_record (prologue
);
1765 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1769 static unw_rec_list
*
1770 output_prologue_gr (unsigned int saved_mask
, unsigned int reg
)
1772 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1773 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1774 ptr
->r
.record
.r
.grmask
= saved_mask
;
1775 ptr
->r
.record
.r
.grsave
= reg
;
1779 static unw_rec_list
*
1782 unw_rec_list
*ptr
= alloc_record (body
);
1786 static unw_rec_list
*
1787 output_mem_stack_f (unsigned int size
)
1789 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1790 ptr
->r
.record
.p
.size
= size
;
1794 static unw_rec_list
*
1795 output_mem_stack_v (void)
1797 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1801 static unw_rec_list
*
1802 output_psp_gr (unsigned int gr
)
1804 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1805 ptr
->r
.record
.p
.r
.gr
= gr
;
1809 static unw_rec_list
*
1810 output_psp_sprel (unsigned int offset
)
1812 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1813 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1817 static unw_rec_list
*
1818 output_rp_when (void)
1820 unw_rec_list
*ptr
= alloc_record (rp_when
);
1824 static unw_rec_list
*
1825 output_rp_gr (unsigned int gr
)
1827 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1828 ptr
->r
.record
.p
.r
.gr
= gr
;
1832 static unw_rec_list
*
1833 output_rp_br (unsigned int br
)
1835 unw_rec_list
*ptr
= alloc_record (rp_br
);
1836 ptr
->r
.record
.p
.r
.br
= br
;
1840 static unw_rec_list
*
1841 output_rp_psprel (unsigned int offset
)
1843 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1844 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1848 static unw_rec_list
*
1849 output_rp_sprel (unsigned int offset
)
1851 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1852 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1856 static unw_rec_list
*
1857 output_pfs_when (void)
1859 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1863 static unw_rec_list
*
1864 output_pfs_gr (unsigned int gr
)
1866 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1867 ptr
->r
.record
.p
.r
.gr
= gr
;
1871 static unw_rec_list
*
1872 output_pfs_psprel (unsigned int offset
)
1874 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1875 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1879 static unw_rec_list
*
1880 output_pfs_sprel (unsigned int offset
)
1882 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1883 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1887 static unw_rec_list
*
1888 output_preds_when (void)
1890 unw_rec_list
*ptr
= alloc_record (preds_when
);
1894 static unw_rec_list
*
1895 output_preds_gr (unsigned int gr
)
1897 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1898 ptr
->r
.record
.p
.r
.gr
= gr
;
1902 static unw_rec_list
*
1903 output_preds_psprel (unsigned int offset
)
1905 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1906 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1910 static unw_rec_list
*
1911 output_preds_sprel (unsigned int offset
)
1913 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1914 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1918 static unw_rec_list
*
1919 output_fr_mem (unsigned int mask
)
1921 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1922 unw_rec_list
*cur
= ptr
;
1924 ptr
->r
.record
.p
.frmask
= mask
;
1925 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1928 unw_rec_list
*prev
= cur
;
1930 /* Clear least significant set bit. */
1931 mask
&= ~(mask
& (~mask
+ 1));
1934 cur
= alloc_record (fr_mem
);
1935 cur
->r
.record
.p
.frmask
= mask
;
1936 /* Retain only least significant bit. */
1937 prev
->r
.record
.p
.frmask
^= mask
;
1938 prev
->r
.record
.p
.next
= cur
;
1942 static unw_rec_list
*
1943 output_frgr_mem (unsigned int gr_mask
, unsigned int fr_mask
)
1945 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1946 unw_rec_list
*cur
= ptr
;
1948 unwind
.pending_saves
= &cur
->r
.record
.p
;
1949 cur
->r
.record
.p
.frmask
= fr_mask
;
1952 unw_rec_list
*prev
= cur
;
1954 /* Clear least significant set bit. */
1955 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
1956 if (!gr_mask
&& !fr_mask
)
1958 cur
= alloc_record (frgr_mem
);
1959 cur
->r
.record
.p
.frmask
= fr_mask
;
1960 /* Retain only least significant bit. */
1961 prev
->r
.record
.p
.frmask
^= fr_mask
;
1962 prev
->r
.record
.p
.next
= cur
;
1964 cur
->r
.record
.p
.grmask
= gr_mask
;
1967 unw_rec_list
*prev
= cur
;
1969 /* Clear least significant set bit. */
1970 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
1973 cur
= alloc_record (frgr_mem
);
1974 cur
->r
.record
.p
.grmask
= gr_mask
;
1975 /* Retain only least significant bit. */
1976 prev
->r
.record
.p
.grmask
^= gr_mask
;
1977 prev
->r
.record
.p
.next
= cur
;
1981 static unw_rec_list
*
1982 output_gr_gr (unsigned int mask
, unsigned int reg
)
1984 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1985 unw_rec_list
*cur
= ptr
;
1987 ptr
->r
.record
.p
.grmask
= mask
;
1988 ptr
->r
.record
.p
.r
.gr
= reg
;
1989 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1992 unw_rec_list
*prev
= cur
;
1994 /* Clear least significant set bit. */
1995 mask
&= ~(mask
& (~mask
+ 1));
1998 cur
= alloc_record (gr_gr
);
1999 cur
->r
.record
.p
.grmask
= mask
;
2000 /* Indicate this record shouldn't be output. */
2001 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2002 /* Retain only least significant bit. */
2003 prev
->r
.record
.p
.grmask
^= mask
;
2004 prev
->r
.record
.p
.next
= cur
;
2008 static unw_rec_list
*
2009 output_gr_mem (unsigned int mask
)
2011 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2012 unw_rec_list
*cur
= ptr
;
2014 ptr
->r
.record
.p
.grmask
= mask
;
2015 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2018 unw_rec_list
*prev
= cur
;
2020 /* Clear least significant set bit. */
2021 mask
&= ~(mask
& (~mask
+ 1));
2024 cur
= alloc_record (gr_mem
);
2025 cur
->r
.record
.p
.grmask
= mask
;
2026 /* Retain only least significant bit. */
2027 prev
->r
.record
.p
.grmask
^= mask
;
2028 prev
->r
.record
.p
.next
= cur
;
2032 static unw_rec_list
*
2033 output_br_mem (unsigned int mask
)
2035 unw_rec_list
*ptr
= alloc_record (br_mem
);
2036 unw_rec_list
*cur
= ptr
;
2038 ptr
->r
.record
.p
.brmask
= mask
;
2039 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2042 unw_rec_list
*prev
= cur
;
2044 /* Clear least significant set bit. */
2045 mask
&= ~(mask
& (~mask
+ 1));
2048 cur
= alloc_record (br_mem
);
2049 cur
->r
.record
.p
.brmask
= mask
;
2050 /* Retain only least significant bit. */
2051 prev
->r
.record
.p
.brmask
^= mask
;
2052 prev
->r
.record
.p
.next
= cur
;
2056 static unw_rec_list
*
2057 output_br_gr (unsigned int mask
, unsigned int reg
)
2059 unw_rec_list
*ptr
= alloc_record (br_gr
);
2060 unw_rec_list
*cur
= ptr
;
2062 ptr
->r
.record
.p
.brmask
= mask
;
2063 ptr
->r
.record
.p
.r
.gr
= reg
;
2064 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2067 unw_rec_list
*prev
= cur
;
2069 /* Clear least significant set bit. */
2070 mask
&= ~(mask
& (~mask
+ 1));
2073 cur
= alloc_record (br_gr
);
2074 cur
->r
.record
.p
.brmask
= mask
;
2075 /* Indicate this record shouldn't be output. */
2076 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2077 /* Retain only least significant bit. */
2078 prev
->r
.record
.p
.brmask
^= mask
;
2079 prev
->r
.record
.p
.next
= cur
;
2083 static unw_rec_list
*
2084 output_spill_base (unsigned int offset
)
2086 unw_rec_list
*ptr
= alloc_record (spill_base
);
2087 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2091 static unw_rec_list
*
2092 output_unat_when (void)
2094 unw_rec_list
*ptr
= alloc_record (unat_when
);
2098 static unw_rec_list
*
2099 output_unat_gr (unsigned int gr
)
2101 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2102 ptr
->r
.record
.p
.r
.gr
= gr
;
2106 static unw_rec_list
*
2107 output_unat_psprel (unsigned int offset
)
2109 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2110 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2114 static unw_rec_list
*
2115 output_unat_sprel (unsigned int offset
)
2117 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2118 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2122 static unw_rec_list
*
2123 output_lc_when (void)
2125 unw_rec_list
*ptr
= alloc_record (lc_when
);
2129 static unw_rec_list
*
2130 output_lc_gr (unsigned int gr
)
2132 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2133 ptr
->r
.record
.p
.r
.gr
= gr
;
2137 static unw_rec_list
*
2138 output_lc_psprel (unsigned int offset
)
2140 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2141 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2145 static unw_rec_list
*
2146 output_lc_sprel (unsigned int offset
)
2148 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2149 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2153 static unw_rec_list
*
2154 output_fpsr_when (void)
2156 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2160 static unw_rec_list
*
2161 output_fpsr_gr (unsigned int gr
)
2163 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2164 ptr
->r
.record
.p
.r
.gr
= gr
;
2168 static unw_rec_list
*
2169 output_fpsr_psprel (unsigned int offset
)
2171 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2172 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2176 static unw_rec_list
*
2177 output_fpsr_sprel (unsigned int offset
)
2179 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2180 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2184 static unw_rec_list
*
2185 output_priunat_when_gr (void)
2187 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2191 static unw_rec_list
*
2192 output_priunat_when_mem (void)
2194 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2198 static unw_rec_list
*
2199 output_priunat_gr (unsigned int gr
)
2201 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2202 ptr
->r
.record
.p
.r
.gr
= gr
;
2206 static unw_rec_list
*
2207 output_priunat_psprel (unsigned int offset
)
2209 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2210 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2214 static unw_rec_list
*
2215 output_priunat_sprel (unsigned int offset
)
2217 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2218 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2222 static unw_rec_list
*
2223 output_bsp_when (void)
2225 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2229 static unw_rec_list
*
2230 output_bsp_gr (unsigned int gr
)
2232 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2233 ptr
->r
.record
.p
.r
.gr
= gr
;
2237 static unw_rec_list
*
2238 output_bsp_psprel (unsigned int offset
)
2240 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2241 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2245 static unw_rec_list
*
2246 output_bsp_sprel (unsigned int offset
)
2248 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2249 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2253 static unw_rec_list
*
2254 output_bspstore_when (void)
2256 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2260 static unw_rec_list
*
2261 output_bspstore_gr (unsigned int gr
)
2263 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2264 ptr
->r
.record
.p
.r
.gr
= gr
;
2268 static unw_rec_list
*
2269 output_bspstore_psprel (unsigned int offset
)
2271 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2272 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2276 static unw_rec_list
*
2277 output_bspstore_sprel (unsigned int offset
)
2279 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2280 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2284 static unw_rec_list
*
2285 output_rnat_when (void)
2287 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2291 static unw_rec_list
*
2292 output_rnat_gr (unsigned int gr
)
2294 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2295 ptr
->r
.record
.p
.r
.gr
= gr
;
2299 static unw_rec_list
*
2300 output_rnat_psprel (unsigned int offset
)
2302 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2303 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2307 static unw_rec_list
*
2308 output_rnat_sprel (unsigned int offset
)
2310 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2311 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2315 static unw_rec_list
*
2316 output_unwabi (unsigned long abi
, unsigned long context
)
2318 unw_rec_list
*ptr
= alloc_record (unwabi
);
2319 ptr
->r
.record
.p
.abi
= abi
;
2320 ptr
->r
.record
.p
.context
= context
;
2324 static unw_rec_list
*
2325 output_epilogue (unsigned long ecount
)
2327 unw_rec_list
*ptr
= alloc_record (epilogue
);
2328 ptr
->r
.record
.b
.ecount
= ecount
;
2332 static unw_rec_list
*
2333 output_label_state (unsigned long label
)
2335 unw_rec_list
*ptr
= alloc_record (label_state
);
2336 ptr
->r
.record
.b
.label
= label
;
2340 static unw_rec_list
*
2341 output_copy_state (unsigned long label
)
2343 unw_rec_list
*ptr
= alloc_record (copy_state
);
2344 ptr
->r
.record
.b
.label
= label
;
2348 static unw_rec_list
*
2349 output_spill_psprel (unsigned int ab
,
2351 unsigned int offset
,
2352 unsigned int predicate
)
2354 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2355 ptr
->r
.record
.x
.ab
= ab
;
2356 ptr
->r
.record
.x
.reg
= reg
;
2357 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2358 ptr
->r
.record
.x
.qp
= predicate
;
2362 static unw_rec_list
*
2363 output_spill_sprel (unsigned int ab
,
2365 unsigned int offset
,
2366 unsigned int predicate
)
2368 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2369 ptr
->r
.record
.x
.ab
= ab
;
2370 ptr
->r
.record
.x
.reg
= reg
;
2371 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2372 ptr
->r
.record
.x
.qp
= predicate
;
2376 static unw_rec_list
*
2377 output_spill_reg (unsigned int ab
,
2379 unsigned int targ_reg
,
2381 unsigned int predicate
)
2383 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2384 ptr
->r
.record
.x
.ab
= ab
;
2385 ptr
->r
.record
.x
.reg
= reg
;
2386 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2387 ptr
->r
.record
.x
.xy
= xy
;
2388 ptr
->r
.record
.x
.qp
= predicate
;
2392 /* Given a unw_rec_list process the correct format with the
2393 specified function. */
2396 process_one_record (unw_rec_list
*ptr
, vbyte_func f
)
2398 unsigned int fr_mask
, gr_mask
;
2400 switch (ptr
->r
.type
)
2402 /* This is a dummy record that takes up no space in the output. */
2410 /* These are taken care of by prologue/prologue_gr. */
2415 if (ptr
->r
.type
== prologue_gr
)
2416 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2417 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2419 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2421 /* Output descriptor(s) for union of register spills (if any). */
2422 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2423 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2426 if ((fr_mask
& ~0xfUL
) == 0)
2427 output_P6_format (f
, fr_mem
, fr_mask
);
2430 output_P5_format (f
, gr_mask
, fr_mask
);
2435 output_P6_format (f
, gr_mem
, gr_mask
);
2436 if (ptr
->r
.record
.r
.mask
.br_mem
)
2437 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2439 /* output imask descriptor if necessary: */
2440 if (ptr
->r
.record
.r
.mask
.i
)
2441 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2442 ptr
->r
.record
.r
.imask_size
);
2446 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2450 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2451 ptr
->r
.record
.p
.size
);
2464 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2467 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2470 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2478 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2487 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2497 case bspstore_sprel
:
2499 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2502 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2504 const unw_rec_list
*cur
= ptr
;
2506 gr_mask
= cur
->r
.record
.p
.grmask
;
2507 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2508 gr_mask
|= cur
->r
.record
.p
.grmask
;
2509 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2513 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2515 const unw_rec_list
*cur
= ptr
;
2517 gr_mask
= cur
->r
.record
.p
.brmask
;
2518 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2519 gr_mask
|= cur
->r
.record
.p
.brmask
;
2520 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2524 as_bad (_("spill_mask record unimplemented."));
2526 case priunat_when_gr
:
2527 case priunat_when_mem
:
2531 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2533 case priunat_psprel
:
2535 case bspstore_psprel
:
2537 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2540 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2543 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2547 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2550 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2551 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2552 ptr
->r
.record
.x
.where
.pspoff
);
2555 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2556 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2557 ptr
->r
.record
.x
.where
.spoff
);
2560 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2561 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2562 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2564 case spill_psprel_p
:
2565 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2566 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2567 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2570 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2571 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2572 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2575 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2576 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2577 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2581 as_bad (_("record_type_not_valid"));
2586 /* Given a unw_rec_list list, process all the records with
2587 the specified function. */
2589 process_unw_records (unw_rec_list
*list
, vbyte_func f
)
2592 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2593 process_one_record (ptr
, f
);
2596 /* Determine the size of a record list in bytes. */
2598 calc_record_size (unw_rec_list
*list
)
2601 process_unw_records (list
, count_output
);
2605 /* Return the number of bits set in the input value.
2606 Perhaps this has a better place... */
2607 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2608 # define popcount __builtin_popcount
2611 popcount (unsigned x
)
2613 static const unsigned char popcnt
[16] =
2621 if (x
< NELEMS (popcnt
))
2623 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2627 /* Update IMASK bitmask to reflect the fact that one or more registers
2628 of type TYPE are saved starting at instruction with index T. If N
2629 bits are set in REGMASK, it is assumed that instructions T through
2630 T+N-1 save these registers.
2634 1: instruction saves next fp reg
2635 2: instruction saves next general reg
2636 3: instruction saves next branch reg */
2638 set_imask (unw_rec_list
*region
,
2639 unsigned long regmask
,
2643 unsigned char *imask
;
2644 unsigned long imask_size
;
2648 imask
= region
->r
.record
.r
.mask
.i
;
2649 imask_size
= region
->r
.record
.r
.imask_size
;
2652 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2653 imask
= XCNEWVEC (unsigned char, imask_size
);
2655 region
->r
.record
.r
.imask_size
= imask_size
;
2656 region
->r
.record
.r
.mask
.i
= imask
;
2660 pos
= 2 * (3 - t
% 4);
2663 if (i
>= imask_size
)
2665 as_bad (_("Ignoring attempt to spill beyond end of region"));
2669 imask
[i
] |= (type
& 0x3) << pos
;
2671 regmask
&= (regmask
- 1);
2681 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2682 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2683 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2686 static unsigned long
2687 slot_index (unsigned long slot_addr
,
2689 unsigned long first_addr
,
2693 unsigned long s_index
= 0;
2695 /* First time we are called, the initial address and frag are invalid. */
2696 if (first_addr
== 0)
2699 /* If the two addresses are in different frags, then we need to add in
2700 the remaining size of this frag, and then the entire size of intermediate
2702 while (slot_frag
!= first_frag
)
2704 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2708 /* We can get the final addresses only during and after
2710 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2711 s_index
+= 3 * ((first_frag
->fr_next
->fr_address
2712 - first_frag
->fr_address
2713 - first_frag
->fr_fix
) >> 4);
2716 /* We don't know what the final addresses will be. We try our
2717 best to estimate. */
2718 switch (first_frag
->fr_type
)
2724 as_fatal (_("Only constant space allocation is supported"));
2730 /* Take alignment into account. Assume the worst case
2731 before relaxation. */
2732 s_index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2736 if (first_frag
->fr_symbol
)
2738 as_fatal (_("Only constant offsets are supported"));
2743 s_index
+= 3 * (first_frag
->fr_offset
>> 4);
2747 /* Add in the full size of the frag converted to instruction slots. */
2748 s_index
+= 3 * (first_frag
->fr_fix
>> 4);
2749 /* Subtract away the initial part before first_addr. */
2750 s_index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2751 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2753 /* Move to the beginning of the next frag. */
2754 first_frag
= first_frag
->fr_next
;
2755 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2757 /* This can happen if there is section switching in the middle of a
2758 function, causing the frag chain for the function to be broken.
2759 It is too difficult to recover safely from this problem, so we just
2760 exit with an error. */
2761 if (first_frag
== NULL
)
2762 as_fatal (_("Section switching in code is not supported."));
2765 /* Add in the used part of the last frag. */
2766 s_index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2767 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2771 /* Optimize unwind record directives. */
2773 static unw_rec_list
*
2774 optimize_unw_records (unw_rec_list
*list
)
2779 /* If the only unwind record is ".prologue" or ".prologue" followed
2780 by ".body", then we can optimize the unwind directives away. */
2781 if (list
->r
.type
== prologue
2782 && (list
->next
->r
.type
== endp
2783 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2789 /* Given a complete record list, process any records which have
2790 unresolved fields, (ie length counts for a prologue). After
2791 this has been run, all necessary information should be available
2792 within each record to generate an image. */
2795 fixup_unw_records (unw_rec_list
*list
, int before_relax
)
2797 unw_rec_list
*ptr
, *region
= 0;
2798 unsigned long first_addr
= 0, rlen
= 0, t
;
2799 fragS
*first_frag
= 0;
2801 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2803 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2804 as_bad (_("Insn slot not set in unwind record."));
2805 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2806 first_addr
, first_frag
, before_relax
);
2807 switch (ptr
->r
.type
)
2815 unsigned long last_addr
= 0;
2816 fragS
*last_frag
= NULL
;
2818 first_addr
= ptr
->slot_number
;
2819 first_frag
= ptr
->slot_frag
;
2820 /* Find either the next body/prologue start, or the end of
2821 the function, and determine the size of the region. */
2822 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2823 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2824 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2826 last_addr
= last
->slot_number
;
2827 last_frag
= last
->slot_frag
;
2830 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2832 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2833 if (ptr
->r
.type
== body
)
2834 /* End of region. */
2842 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2844 /* This happens when a memory-stack-less procedure uses a
2845 ".restore sp" directive at the end of a region to pop
2847 ptr
->r
.record
.b
.t
= 0;
2858 case priunat_when_gr
:
2859 case priunat_when_mem
:
2863 ptr
->r
.record
.p
.t
= t
;
2871 case spill_psprel_p
:
2872 ptr
->r
.record
.x
.t
= t
;
2878 as_bad (_("frgr_mem record before region record!"));
2881 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2882 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2883 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2884 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2889 as_bad (_("fr_mem record before region record!"));
2892 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2893 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2898 as_bad (_("gr_mem record before region record!"));
2901 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2902 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2907 as_bad (_("br_mem record before region record!"));
2910 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2911 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2917 as_bad (_("gr_gr record before region record!"));
2920 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2925 as_bad (_("br_gr record before region record!"));
2928 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2937 /* Estimate the size of a frag before relaxing. We only have one type of frag
2938 to handle here, which is the unwind info frag. */
2941 ia64_estimate_size_before_relax (fragS
*frag
,
2942 asection
*segtype ATTRIBUTE_UNUSED
)
2947 /* ??? This code is identical to the first part of ia64_convert_frag. */
2948 list
= (unw_rec_list
*) frag
->fr_opcode
;
2949 fixup_unw_records (list
, 0);
2951 len
= calc_record_size (list
);
2952 /* pad to pointer-size boundary. */
2953 pad
= len
% md
.pointer_size
;
2955 len
+= md
.pointer_size
- pad
;
2956 /* Add 8 for the header. */
2958 /* Add a pointer for the personality offset. */
2959 if (frag
->fr_offset
)
2960 size
+= md
.pointer_size
;
2962 /* fr_var carries the max_chars that we created the fragment with.
2963 We must, of course, have allocated enough memory earlier. */
2964 gas_assert (frag
->fr_var
>= size
);
2966 return frag
->fr_fix
+ size
;
2969 /* This function converts a rs_machine_dependent variant frag into a
2970 normal fill frag with the unwind image from the record list. */
2972 ia64_convert_frag (fragS
*frag
)
2978 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2979 list
= (unw_rec_list
*) frag
->fr_opcode
;
2980 fixup_unw_records (list
, 0);
2982 len
= calc_record_size (list
);
2983 /* pad to pointer-size boundary. */
2984 pad
= len
% md
.pointer_size
;
2986 len
+= md
.pointer_size
- pad
;
2987 /* Add 8 for the header. */
2989 /* Add a pointer for the personality offset. */
2990 if (frag
->fr_offset
)
2991 size
+= md
.pointer_size
;
2993 /* fr_var carries the max_chars that we created the fragment with.
2994 We must, of course, have allocated enough memory earlier. */
2995 gas_assert (frag
->fr_var
>= size
);
2997 /* Initialize the header area. fr_offset is initialized with
2998 unwind.personality_routine. */
2999 if (frag
->fr_offset
)
3001 if (md
.flags
& EF_IA_64_ABI64
)
3002 flag_value
= (bfd_vma
) 3 << 32;
3004 /* 32-bit unwind info block. */
3005 flag_value
= (bfd_vma
) 0x1003 << 32;
3010 md_number_to_chars (frag
->fr_literal
,
3011 (((bfd_vma
) 1 << 48) /* Version. */
3012 | flag_value
/* U & E handler flags. */
3013 | (len
/ md
.pointer_size
)), /* Length. */
3016 /* Skip the header. */
3017 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3018 process_unw_records (list
, output_vbyte_mem
);
3020 /* Fill the padding bytes with zeros. */
3022 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3023 md
.pointer_size
- pad
);
3024 /* Fill the unwind personality with zeros. */
3025 if (frag
->fr_offset
)
3026 md_number_to_chars (frag
->fr_literal
+ size
- md
.pointer_size
, 0,
3029 frag
->fr_fix
+= size
;
3030 frag
->fr_type
= rs_fill
;
3032 frag
->fr_offset
= 0;
3036 parse_predicate_and_operand (expressionS
*e
, unsigned *qp
, const char *po
)
3038 int sep
= parse_operand_and_eval (e
, ',');
3040 *qp
= e
->X_add_number
- REG_P
;
3041 if (e
->X_op
!= O_register
|| *qp
> 63)
3043 as_bad (_("First operand to .%s must be a predicate"), po
);
3047 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
3049 sep
= parse_operand_and_eval (e
, ',');
3056 convert_expr_to_ab_reg (const expressionS
*e
,
3062 unsigned int reg
= e
->X_add_number
;
3064 *ab
= *regp
= 0; /* Anything valid is good here. */
3066 if (e
->X_op
!= O_register
)
3067 reg
= REG_GR
; /* Anything invalid is good here. */
3069 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3072 *regp
= reg
- REG_GR
;
3074 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3075 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3078 *regp
= reg
- REG_FR
;
3080 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3083 *regp
= reg
- REG_BR
;
3090 case REG_PR
: *regp
= 0; break;
3091 case REG_PSP
: *regp
= 1; break;
3092 case REG_PRIUNAT
: *regp
= 2; break;
3093 case REG_BR
+ 0: *regp
= 3; break;
3094 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3095 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3096 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3097 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3098 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3099 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3100 case REG_AR
+ AR_LC
: *regp
= 10; break;
3103 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
3110 convert_expr_to_xy_reg (const expressionS
*e
,
3116 unsigned int reg
= e
->X_add_number
;
3118 *xy
= *regp
= 0; /* Anything valid is good here. */
3120 if (e
->X_op
!= O_register
)
3121 reg
= REG_GR
; /* Anything invalid is good here. */
3123 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3126 *regp
= reg
- REG_GR
;
3128 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3131 *regp
= reg
- REG_FR
;
3133 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3136 *regp
= reg
- REG_BR
;
3139 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3145 /* The current frag is an alignment frag. */
3146 align_frag
= frag_now
;
3147 s_align_bytes (arg
);
3151 dot_radix (int dummy ATTRIBUTE_UNUSED
)
3158 if (is_it_end_of_statement ())
3160 ch
= get_symbol_name (&radix
);
3161 ia64_canonicalize_symbol_name (radix
);
3162 if (strcasecmp (radix
, "C"))
3163 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3164 (void) restore_line_pointer (ch
);
3165 demand_empty_rest_of_line ();
3168 /* Helper function for .loc directives. If the assembler is not generating
3169 line number info, then we need to remember which instructions have a .loc
3170 directive, and only call dwarf2_gen_line_info for those instructions. */
3175 CURR_SLOT
.loc_directive_seen
= 1;
3176 dwarf2_directive_loc (x
);
3179 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3181 dot_special_section (int which
)
3183 set_section ((char *) special_section_name
[which
]);
3186 /* Return -1 for warning and 0 for error. */
3189 unwind_diagnostic (const char * region
, const char *directive
)
3191 if (md
.unwind_check
== unwind_check_warning
)
3193 as_warn (_(".%s outside of %s"), directive
, region
);
3198 as_bad (_(".%s outside of %s"), directive
, region
);
3199 ignore_rest_of_line ();
3204 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3205 a procedure but the unwind directive check is set to warning, 0 if
3206 a directive isn't in a procedure and the unwind directive check is set
3210 in_procedure (const char *directive
)
3212 if (unwind
.proc_pending
.sym
3213 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3215 return unwind_diagnostic ("procedure", directive
);
3218 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3219 a prologue but the unwind directive check is set to warning, 0 if
3220 a directive isn't in a prologue and the unwind directive check is set
3224 in_prologue (const char *directive
)
3226 int in
= in_procedure (directive
);
3228 if (in
> 0 && !unwind
.prologue
)
3229 in
= unwind_diagnostic ("prologue", directive
);
3230 check_pending_save ();
3234 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3235 a body but the unwind directive check is set to warning, 0 if
3236 a directive isn't in a body and the unwind directive check is set
3240 in_body (const char *directive
)
3242 int in
= in_procedure (directive
);
3244 if (in
> 0 && !unwind
.body
)
3245 in
= unwind_diagnostic ("body region", directive
);
3250 add_unwind_entry (unw_rec_list
*ptr
, int sep
)
3255 unwind
.tail
->next
= ptr
;
3260 /* The current entry can in fact be a chain of unwind entries. */
3261 if (unwind
.current_entry
== NULL
)
3262 unwind
.current_entry
= ptr
;
3265 /* The current entry can in fact be a chain of unwind entries. */
3266 if (unwind
.current_entry
== NULL
)
3267 unwind
.current_entry
= ptr
;
3272 /* Parse a tag permitted for the current directive. */
3276 ch
= get_symbol_name (&name
);
3277 /* FIXME: For now, just issue a warning that this isn't implemented. */
3284 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3287 (void) restore_line_pointer (ch
);
3289 if (sep
!= NOT_A_CHAR
)
3290 demand_empty_rest_of_line ();
3294 dot_fframe (int dummy ATTRIBUTE_UNUSED
)
3299 if (!in_prologue ("fframe"))
3302 sep
= parse_operand_and_eval (&e
, ',');
3304 if (e
.X_op
!= O_constant
)
3306 as_bad (_("First operand to .fframe must be a constant"));
3309 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3313 dot_vframe (int dummy ATTRIBUTE_UNUSED
)
3319 if (!in_prologue ("vframe"))
3322 sep
= parse_operand_and_eval (&e
, ',');
3323 reg
= e
.X_add_number
- REG_GR
;
3324 if (e
.X_op
!= O_register
|| reg
> 127)
3326 as_bad (_("First operand to .vframe must be a general register"));
3329 add_unwind_entry (output_mem_stack_v (), sep
);
3330 if (! (unwind
.prologue_mask
& 2))
3331 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3332 else if (reg
!= unwind
.prologue_gr
3333 + (unsigned) popcount (unwind
.prologue_mask
& -(2 << 1)))
3334 as_warn (_("Operand of .vframe contradicts .prologue"));
3338 dot_vframesp (int psp
)
3344 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3346 if (!in_prologue ("vframesp"))
3349 sep
= parse_operand_and_eval (&e
, ',');
3350 if (e
.X_op
!= O_constant
)
3352 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3355 add_unwind_entry (output_mem_stack_v (), sep
);
3356 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3360 dot_save (int dummy ATTRIBUTE_UNUSED
)
3363 unsigned reg1
, reg2
;
3366 if (!in_prologue ("save"))
3369 sep
= parse_operand_and_eval (&e1
, ',');
3371 sep
= parse_operand_and_eval (&e2
, ',');
3375 reg1
= e1
.X_add_number
;
3376 /* Make sure it's a valid ar.xxx reg, OR its br0, aka 'rp'. */
3377 if (e1
.X_op
!= O_register
)
3379 as_bad (_("First operand to .save not a register"));
3380 reg1
= REG_PR
; /* Anything valid is good here. */
3382 reg2
= e2
.X_add_number
- REG_GR
;
3383 if (e2
.X_op
!= O_register
|| reg2
> 127)
3385 as_bad (_("Second operand to .save not a valid register"));
3390 case REG_AR
+ AR_BSP
:
3391 add_unwind_entry (output_bsp_when (), sep
);
3392 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3394 case REG_AR
+ AR_BSPSTORE
:
3395 add_unwind_entry (output_bspstore_when (), sep
);
3396 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3398 case REG_AR
+ AR_RNAT
:
3399 add_unwind_entry (output_rnat_when (), sep
);
3400 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3402 case REG_AR
+ AR_UNAT
:
3403 add_unwind_entry (output_unat_when (), sep
);
3404 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3406 case REG_AR
+ AR_FPSR
:
3407 add_unwind_entry (output_fpsr_when (), sep
);
3408 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3410 case REG_AR
+ AR_PFS
:
3411 add_unwind_entry (output_pfs_when (), sep
);
3412 if (! (unwind
.prologue_mask
& 4))
3413 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3414 else if (reg2
!= unwind
.prologue_gr
3415 + (unsigned) popcount (unwind
.prologue_mask
& -(4 << 1)))
3416 as_warn (_("Second operand of .save contradicts .prologue"));
3418 case REG_AR
+ AR_LC
:
3419 add_unwind_entry (output_lc_when (), sep
);
3420 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3423 add_unwind_entry (output_rp_when (), sep
);
3424 if (! (unwind
.prologue_mask
& 8))
3425 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3426 else if (reg2
!= unwind
.prologue_gr
)
3427 as_warn (_("Second operand of .save contradicts .prologue"));
3430 add_unwind_entry (output_preds_when (), sep
);
3431 if (! (unwind
.prologue_mask
& 1))
3432 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3433 else if (reg2
!= unwind
.prologue_gr
3434 + (unsigned) popcount (unwind
.prologue_mask
& -(1 << 1)))
3435 as_warn (_("Second operand of .save contradicts .prologue"));
3438 add_unwind_entry (output_priunat_when_gr (), sep
);
3439 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3442 as_bad (_("First operand to .save not a valid register"));
3443 add_unwind_entry (NULL
, sep
);
3449 dot_restore (int dummy ATTRIBUTE_UNUSED
)
3452 unsigned long ecount
; /* # of _additional_ regions to pop */
3455 if (!in_body ("restore"))
3458 sep
= parse_operand_and_eval (&e1
, ',');
3459 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3460 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3466 sep
= parse_operand_and_eval (&e2
, ',');
3467 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3469 as_bad (_("Second operand to .restore must be a constant >= 0"));
3470 e2
.X_add_number
= 0;
3472 ecount
= e2
.X_add_number
;
3475 ecount
= unwind
.prologue_count
- 1;
3477 if (ecount
>= unwind
.prologue_count
)
3479 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3480 ecount
+ 1, unwind
.prologue_count
);
3484 add_unwind_entry (output_epilogue (ecount
), sep
);
3486 if (ecount
< unwind
.prologue_count
)
3487 unwind
.prologue_count
-= ecount
+ 1;
3489 unwind
.prologue_count
= 0;
3493 dot_restorereg (int pred
)
3495 unsigned int qp
, ab
, reg
;
3498 const char * const po
= pred
? "restorereg.p" : "restorereg";
3500 if (!in_procedure (po
))
3504 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3507 sep
= parse_operand_and_eval (&e
, ',');
3510 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3512 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3515 static const char *special_linkonce_name
[] =
3517 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3521 start_unwind_section (const segT text_seg
, int sec_index
)
3524 Use a slightly ugly scheme to derive the unwind section names from
3525 the text section name:
3527 text sect. unwind table sect.
3528 name: name: comments:
3529 ---------- ----------------- --------------------------------
3531 .text.foo .IA_64.unwind.text.foo
3532 .foo .IA_64.unwind.foo
3534 .gnu.linkonce.ia64unw.foo
3535 _info .IA_64.unwind_info gas issues error message (ditto)
3536 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3538 This mapping is done so that:
3540 (a) An object file with unwind info only in .text will use
3541 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3542 This follows the letter of the ABI and also ensures backwards
3543 compatibility with older toolchains.
3545 (b) An object file with unwind info in multiple text sections
3546 will use separate unwind sections for each text section.
3547 This allows us to properly set the "sh_info" and "sh_link"
3548 fields in SHT_IA_64_UNWIND as required by the ABI and also
3549 lets GNU ld support programs with multiple segments
3550 containing unwind info (as might be the case for certain
3551 embedded applications).
3553 (c) An error is issued if there would be a name clash.
3556 const char *text_name
, *sec_text_name
;
3558 const char *prefix
= special_section_name
[sec_index
];
3561 sec_text_name
= segment_name (text_seg
);
3562 text_name
= sec_text_name
;
3563 if (strncmp (text_name
, "_info", 5) == 0)
3565 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3567 ignore_rest_of_line ();
3570 if (strcmp (text_name
, ".text") == 0)
3573 /* Build the unwind section name by appending the (possibly stripped)
3574 text section name to the unwind prefix. */
3576 if (strncmp (text_name
, ".gnu.linkonce.t.",
3577 sizeof (".gnu.linkonce.t.") - 1) == 0)
3579 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3580 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3583 sec_name
= concat (prefix
, suffix
, NULL
);
3585 /* Handle COMDAT group. */
3586 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3587 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3590 const char *group_name
= elf_group_name (text_seg
);
3592 if (group_name
== NULL
)
3594 as_bad (_("Group section `%s' has no group signature"),
3596 ignore_rest_of_line ();
3601 /* We have to construct a fake section directive. */
3602 section
= concat (sec_name
, ",\"aG\",@progbits,", group_name
, ",comdat", NULL
);
3603 set_section (section
);
3608 set_section (sec_name
);
3609 bfd_set_section_flags (now_seg
, SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3612 elf_linked_to_section (now_seg
) = text_seg
;
3617 generate_unwind_image (const segT text_seg
)
3622 /* Mark the end of the unwind info, so that we can compute the size of the
3623 last unwind region. */
3624 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3626 /* Force out pending instructions, to make sure all unwind records have
3627 a valid slot_number field. */
3628 ia64_flush_insns ();
3630 /* Generate the unwind record. */
3631 list
= optimize_unw_records (unwind
.list
);
3632 fixup_unw_records (list
, 1);
3633 size
= calc_record_size (list
);
3635 if (size
> 0 || unwind
.force_unwind_entry
)
3637 unwind
.force_unwind_entry
= 0;
3638 /* pad to pointer-size boundary. */
3639 pad
= size
% md
.pointer_size
;
3641 size
+= md
.pointer_size
- pad
;
3642 /* Add 8 for the header. */
3644 /* Add a pointer for the personality offset. */
3645 if (unwind
.personality_routine
)
3646 size
+= md
.pointer_size
;
3649 /* If there are unwind records, switch sections, and output the info. */
3653 bfd_reloc_code_real_type reloc
;
3655 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3657 /* Make sure the section has 4 byte alignment for ILP32 and
3658 8 byte alignment for LP64. */
3659 frag_align (md
.pointer_size_shift
, 0, 0);
3660 record_alignment (now_seg
, md
.pointer_size_shift
);
3662 /* Set expression which points to start of unwind descriptor area. */
3663 unwind
.info
= expr_build_dot ();
3665 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3666 (offsetT
) (long) unwind
.personality_routine
,
3669 /* Add the personality address to the image. */
3670 if (unwind
.personality_routine
!= 0)
3672 exp
.X_op
= O_symbol
;
3673 exp
.X_add_symbol
= unwind
.personality_routine
;
3674 exp
.X_add_number
= 0;
3676 if (md
.flags
& EF_IA_64_BE
)
3678 if (md
.flags
& EF_IA_64_ABI64
)
3679 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3681 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3685 if (md
.flags
& EF_IA_64_ABI64
)
3686 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3688 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3691 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3692 md
.pointer_size
, &exp
, 0, reloc
);
3693 unwind
.personality_routine
= 0;
3697 free_saved_prologue_counts ();
3698 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3702 dot_handlerdata (int dummy ATTRIBUTE_UNUSED
)
3704 if (!in_procedure ("handlerdata"))
3706 unwind
.force_unwind_entry
= 1;
3708 /* Remember which segment we're in so we can switch back after .endp */
3709 unwind
.saved_text_seg
= now_seg
;
3710 unwind
.saved_text_subseg
= now_subseg
;
3712 /* Generate unwind info into unwind-info section and then leave that
3713 section as the currently active one so dataXX directives go into
3714 the language specific data area of the unwind info block. */
3715 generate_unwind_image (now_seg
);
3716 demand_empty_rest_of_line ();
3720 dot_unwentry (int dummy ATTRIBUTE_UNUSED
)
3722 if (!in_procedure ("unwentry"))
3724 unwind
.force_unwind_entry
= 1;
3725 demand_empty_rest_of_line ();
3729 dot_altrp (int dummy ATTRIBUTE_UNUSED
)
3734 if (!in_prologue ("altrp"))
3737 parse_operand_and_eval (&e
, 0);
3738 reg
= e
.X_add_number
- REG_BR
;
3739 if (e
.X_op
!= O_register
|| reg
> 7)
3741 as_bad (_("First operand to .altrp not a valid branch register"));
3744 add_unwind_entry (output_rp_br (reg
), 0);
3748 dot_savemem (int psprel
)
3753 const char * const po
= psprel
? "savepsp" : "savesp";
3755 if (!in_prologue (po
))
3758 sep
= parse_operand_and_eval (&e1
, ',');
3760 sep
= parse_operand_and_eval (&e2
, ',');
3764 reg1
= e1
.X_add_number
;
3765 val
= e2
.X_add_number
;
3767 /* Make sure it's a valid ar.xxx reg, OR its br0, aka 'rp'. */
3768 if (e1
.X_op
!= O_register
)
3770 as_bad (_("First operand to .%s not a register"), po
);
3771 reg1
= REG_PR
; /* Anything valid is good here. */
3773 if (e2
.X_op
!= O_constant
)
3775 as_bad (_("Second operand to .%s not a constant"), po
);
3781 case REG_AR
+ AR_BSP
:
3782 add_unwind_entry (output_bsp_when (), sep
);
3783 add_unwind_entry ((psprel
3785 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3787 case REG_AR
+ AR_BSPSTORE
:
3788 add_unwind_entry (output_bspstore_when (), sep
);
3789 add_unwind_entry ((psprel
3790 ? output_bspstore_psprel
3791 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3793 case REG_AR
+ AR_RNAT
:
3794 add_unwind_entry (output_rnat_when (), sep
);
3795 add_unwind_entry ((psprel
3796 ? output_rnat_psprel
3797 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3799 case REG_AR
+ AR_UNAT
:
3800 add_unwind_entry (output_unat_when (), sep
);
3801 add_unwind_entry ((psprel
3802 ? output_unat_psprel
3803 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3805 case REG_AR
+ AR_FPSR
:
3806 add_unwind_entry (output_fpsr_when (), sep
);
3807 add_unwind_entry ((psprel
3808 ? output_fpsr_psprel
3809 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3811 case REG_AR
+ AR_PFS
:
3812 add_unwind_entry (output_pfs_when (), sep
);
3813 add_unwind_entry ((psprel
3815 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3817 case REG_AR
+ AR_LC
:
3818 add_unwind_entry (output_lc_when (), sep
);
3819 add_unwind_entry ((psprel
3821 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3824 add_unwind_entry (output_rp_when (), sep
);
3825 add_unwind_entry ((psprel
3827 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3830 add_unwind_entry (output_preds_when (), sep
);
3831 add_unwind_entry ((psprel
3832 ? output_preds_psprel
3833 : output_preds_sprel
) (val
), NOT_A_CHAR
);
3836 add_unwind_entry (output_priunat_when_mem (), sep
);
3837 add_unwind_entry ((psprel
3838 ? output_priunat_psprel
3839 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
3842 as_bad (_("First operand to .%s not a valid register"), po
);
3843 add_unwind_entry (NULL
, sep
);
3849 dot_saveg (int dummy ATTRIBUTE_UNUSED
)
3855 if (!in_prologue ("save.g"))
3858 sep
= parse_operand_and_eval (&e
, ',');
3860 grmask
= e
.X_add_number
;
3861 if (e
.X_op
!= O_constant
3862 || e
.X_add_number
<= 0
3863 || e
.X_add_number
> 0xf)
3865 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
3872 int n
= popcount (grmask
);
3874 parse_operand_and_eval (&e
, 0);
3875 reg
= e
.X_add_number
- REG_GR
;
3876 if (e
.X_op
!= O_register
|| reg
> 127)
3878 as_bad (_("Second operand to .save.g must be a general register"));
3881 else if (reg
> 128U - n
)
3883 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
3886 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
3889 add_unwind_entry (output_gr_mem (grmask
), 0);
3893 dot_savef (int dummy ATTRIBUTE_UNUSED
)
3897 if (!in_prologue ("save.f"))
3900 parse_operand_and_eval (&e
, 0);
3902 if (e
.X_op
!= O_constant
3903 || e
.X_add_number
<= 0
3904 || e
.X_add_number
> 0xfffff)
3906 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
3909 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
3913 dot_saveb (int dummy ATTRIBUTE_UNUSED
)
3919 if (!in_prologue ("save.b"))
3922 sep
= parse_operand_and_eval (&e
, ',');
3924 brmask
= e
.X_add_number
;
3925 if (e
.X_op
!= O_constant
3926 || e
.X_add_number
<= 0
3927 || e
.X_add_number
> 0x1f)
3929 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
3936 int n
= popcount (brmask
);
3938 parse_operand_and_eval (&e
, 0);
3939 reg
= e
.X_add_number
- REG_GR
;
3940 if (e
.X_op
!= O_register
|| reg
> 127)
3942 as_bad (_("Second operand to .save.b must be a general register"));
3945 else if (reg
> 128U - n
)
3947 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
3950 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
3953 add_unwind_entry (output_br_mem (brmask
), 0);
3957 dot_savegf (int dummy ATTRIBUTE_UNUSED
)
3961 if (!in_prologue ("save.gf"))
3964 if (parse_operand_and_eval (&e1
, ',') == ',')
3965 parse_operand_and_eval (&e2
, 0);
3969 if (e1
.X_op
!= O_constant
3970 || e1
.X_add_number
< 0
3971 || e1
.X_add_number
> 0xf)
3973 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
3975 e1
.X_add_number
= 0;
3977 if (e2
.X_op
!= O_constant
3978 || e2
.X_add_number
< 0
3979 || e2
.X_add_number
> 0xfffff)
3981 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
3983 e2
.X_add_number
= 0;
3985 if (e1
.X_op
== O_constant
3986 && e2
.X_op
== O_constant
3987 && e1
.X_add_number
== 0
3988 && e2
.X_add_number
== 0)
3989 as_bad (_("Operands to .save.gf may not be both zero"));
3991 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
3995 dot_spill (int dummy ATTRIBUTE_UNUSED
)
3999 if (!in_prologue ("spill"))
4002 parse_operand_and_eval (&e
, 0);
4004 if (e
.X_op
!= O_constant
)
4006 as_bad (_("Operand to .spill must be a constant"));
4009 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4013 dot_spillreg (int pred
)
4016 unsigned int qp
, ab
, xy
, reg
, treg
;
4018 const char * const po
= pred
? "spillreg.p" : "spillreg";
4020 if (!in_procedure (po
))
4024 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4027 sep
= parse_operand_and_eval (&e
, ',');
4030 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4033 sep
= parse_operand_and_eval (&e
, ',');
4036 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4038 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4042 dot_spillmem (int psprel
)
4045 int pred
= (psprel
< 0), sep
;
4046 unsigned int qp
, ab
, reg
;
4052 po
= psprel
? "spillpsp.p" : "spillsp.p";
4055 po
= psprel
? "spillpsp" : "spillsp";
4057 if (!in_procedure (po
))
4061 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4064 sep
= parse_operand_and_eval (&e
, ',');
4067 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4070 sep
= parse_operand_and_eval (&e
, ',');
4073 if (e
.X_op
!= O_constant
)
4075 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
4080 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4082 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4086 get_saved_prologue_count (unsigned long lbl
)
4088 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4090 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4094 return lpc
->prologue_count
;
4096 as_bad (_("Missing .label_state %ld"), lbl
);
4101 save_prologue_count (unsigned long lbl
, unsigned int count
)
4103 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4105 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4109 lpc
->prologue_count
= count
;
4112 label_prologue_count
*new_lpc
= XNEW (label_prologue_count
);
4114 new_lpc
->next
= unwind
.saved_prologue_counts
;
4115 new_lpc
->label_number
= lbl
;
4116 new_lpc
->prologue_count
= count
;
4117 unwind
.saved_prologue_counts
= new_lpc
;
4122 free_saved_prologue_counts (void)
4124 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4125 label_prologue_count
*next
;
4134 unwind
.saved_prologue_counts
= NULL
;
4138 dot_label_state (int dummy ATTRIBUTE_UNUSED
)
4142 if (!in_body ("label_state"))
4145 parse_operand_and_eval (&e
, 0);
4146 if (e
.X_op
== O_constant
)
4147 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4150 as_bad (_("Operand to .label_state must be a constant"));
4153 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4157 dot_copy_state (int dummy ATTRIBUTE_UNUSED
)
4161 if (!in_body ("copy_state"))
4164 parse_operand_and_eval (&e
, 0);
4165 if (e
.X_op
== O_constant
)
4166 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4169 as_bad (_("Operand to .copy_state must be a constant"));
4172 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4176 dot_unwabi (int dummy ATTRIBUTE_UNUSED
)
4181 if (!in_prologue ("unwabi"))
4184 sep
= parse_operand_and_eval (&e1
, ',');
4186 parse_operand_and_eval (&e2
, 0);
4190 if (e1
.X_op
!= O_constant
)
4192 as_bad (_("First operand to .unwabi must be a constant"));
4193 e1
.X_add_number
= 0;
4196 if (e2
.X_op
!= O_constant
)
4198 as_bad (_("Second operand to .unwabi must be a constant"));
4199 e2
.X_add_number
= 0;
4202 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4206 dot_personality (int dummy ATTRIBUTE_UNUSED
)
4210 if (!in_procedure ("personality"))
4213 c
= get_symbol_name (&name
);
4214 p
= input_line_pointer
;
4215 unwind
.personality_routine
= symbol_find_or_make (name
);
4216 unwind
.force_unwind_entry
= 1;
4218 SKIP_WHITESPACE_AFTER_NAME ();
4219 demand_empty_rest_of_line ();
4223 dot_proc (int dummy ATTRIBUTE_UNUSED
)
4227 proc_pending
*pending
, *last_pending
;
4229 if (unwind
.proc_pending
.sym
)
4231 (md
.unwind_check
== unwind_check_warning
4233 : as_bad
) (_("Missing .endp after previous .proc"));
4234 while (unwind
.proc_pending
.next
)
4236 pending
= unwind
.proc_pending
.next
;
4237 unwind
.proc_pending
.next
= pending
->next
;
4241 last_pending
= NULL
;
4243 /* Parse names of main and alternate entry points and mark them as
4244 function symbols: */
4248 c
= get_symbol_name (&name
);
4249 p
= input_line_pointer
;
4251 as_bad (_("Empty argument of .proc"));
4254 sym
= symbol_find_or_make (name
);
4255 if (S_IS_DEFINED (sym
))
4256 as_bad (_("`%s' was already defined"), name
);
4257 else if (!last_pending
)
4259 unwind
.proc_pending
.sym
= sym
;
4260 last_pending
= &unwind
.proc_pending
;
4264 pending
= XNEW (proc_pending
);
4266 last_pending
= last_pending
->next
= pending
;
4268 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4271 SKIP_WHITESPACE_AFTER_NAME ();
4272 if (*input_line_pointer
!= ',')
4274 ++input_line_pointer
;
4278 unwind
.proc_pending
.sym
= expr_build_dot ();
4279 last_pending
= &unwind
.proc_pending
;
4281 last_pending
->next
= NULL
;
4282 demand_empty_rest_of_line ();
4283 do_align (4, NULL
, 0, 0);
4285 unwind
.prologue
= 0;
4286 unwind
.prologue_count
= 0;
4289 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4290 unwind
.personality_routine
= 0;
4294 dot_body (int dummy ATTRIBUTE_UNUSED
)
4296 if (!in_procedure ("body"))
4298 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4299 as_warn (_("Initial .body should precede any instructions"));
4300 check_pending_save ();
4302 unwind
.prologue
= 0;
4303 unwind
.prologue_mask
= 0;
4306 add_unwind_entry (output_body (), 0);
4310 dot_prologue (int dummy ATTRIBUTE_UNUSED
)
4312 unsigned mask
= 0, grsave
= 0;
4314 if (!in_procedure ("prologue"))
4316 if (unwind
.prologue
)
4318 as_bad (_(".prologue within prologue"));
4319 ignore_rest_of_line ();
4322 if (!unwind
.body
&& unwind
.insn
)
4323 as_warn (_("Initial .prologue should precede any instructions"));
4325 if (!is_it_end_of_statement ())
4328 int n
, sep
= parse_operand_and_eval (&e
, ',');
4330 if (e
.X_op
!= O_constant
4331 || e
.X_add_number
< 0
4332 || e
.X_add_number
> 0xf)
4333 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4334 else if (e
.X_add_number
== 0)
4335 as_warn (_("Pointless use of zero first operand to .prologue"));
4337 mask
= e
.X_add_number
;
4339 n
= popcount (mask
);
4342 parse_operand_and_eval (&e
, 0);
4346 if (e
.X_op
== O_constant
4347 && e
.X_add_number
>= 0
4348 && e
.X_add_number
< 128)
4350 if (md
.unwind_check
== unwind_check_error
)
4351 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4352 grsave
= e
.X_add_number
;
4354 else if (e
.X_op
!= O_register
4355 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4357 as_bad (_("Second operand to .prologue must be a general register"));
4360 else if (grsave
> 128U - n
)
4362 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4368 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4370 add_unwind_entry (output_prologue (), 0);
4372 unwind
.prologue
= 1;
4373 unwind
.prologue_mask
= mask
;
4374 unwind
.prologue_gr
= grsave
;
4376 ++unwind
.prologue_count
;
4380 dot_endp (int dummy ATTRIBUTE_UNUSED
)
4383 int bytes_per_address
;
4386 subsegT saved_subseg
;
4387 proc_pending
*pending
;
4388 int unwind_check
= md
.unwind_check
;
4390 md
.unwind_check
= unwind_check_error
;
4391 if (!in_procedure ("endp"))
4393 md
.unwind_check
= unwind_check
;
4395 if (unwind
.saved_text_seg
)
4397 saved_seg
= unwind
.saved_text_seg
;
4398 saved_subseg
= unwind
.saved_text_subseg
;
4399 unwind
.saved_text_seg
= NULL
;
4403 saved_seg
= now_seg
;
4404 saved_subseg
= now_subseg
;
4407 insn_group_break (1, 0, 0);
4409 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4411 generate_unwind_image (saved_seg
);
4413 if (unwind
.info
|| unwind
.force_unwind_entry
)
4417 subseg_set (md
.last_text_seg
, 0);
4418 proc_end
= expr_build_dot ();
4420 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4422 /* Make sure that section has 4 byte alignment for ILP32 and
4423 8 byte alignment for LP64. */
4424 record_alignment (now_seg
, md
.pointer_size_shift
);
4426 /* Need space for 3 pointers for procedure start, procedure end,
4428 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4429 where
= frag_now_fix () - (3 * md
.pointer_size
);
4430 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4432 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4433 e
.X_op
= O_pseudo_fixup
;
4434 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4436 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4437 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4439 = symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4440 symbol_get_frag (unwind
.proc_pending
.sym
),
4441 S_GET_VALUE (unwind
.proc_pending
.sym
));
4443 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4444 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
,
4447 e
.X_op
= O_pseudo_fixup
;
4448 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4450 e
.X_add_symbol
= proc_end
;
4451 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4452 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4456 e
.X_op
= O_pseudo_fixup
;
4457 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4459 e
.X_add_symbol
= unwind
.info
;
4460 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4461 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4464 subseg_set (saved_seg
, saved_subseg
);
4466 /* Set symbol sizes. */
4467 pending
= &unwind
.proc_pending
;
4468 if (S_GET_NAME (pending
->sym
))
4472 symbolS
*sym
= pending
->sym
;
4474 if (!S_IS_DEFINED (sym
))
4475 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4476 else if (S_GET_SIZE (sym
) == 0
4477 && symbol_get_obj (sym
)->size
== NULL
)
4479 fragS
*frag
= symbol_get_frag (sym
);
4483 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4484 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4487 symbol_get_obj (sym
)->size
= XNEW (expressionS
);
4488 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4489 symbol_get_obj (sym
)->size
->X_add_symbol
4490 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4491 frag_now
, frag_now_fix ());
4492 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4493 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4497 } while ((pending
= pending
->next
) != NULL
);
4500 /* Parse names of main and alternate entry points. */
4506 c
= get_symbol_name (&name
);
4507 p
= input_line_pointer
;
4509 (md
.unwind_check
== unwind_check_warning
4511 : as_bad
) (_("Empty argument of .endp"));
4514 symbolS
*sym
= symbol_find (name
);
4516 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4518 if (sym
== pending
->sym
)
4520 pending
->sym
= NULL
;
4524 if (!sym
|| !pending
)
4525 as_warn (_("`%s' was not specified with previous .proc"), name
);
4528 SKIP_WHITESPACE_AFTER_NAME ();
4529 if (*input_line_pointer
!= ',')
4531 ++input_line_pointer
;
4533 demand_empty_rest_of_line ();
4535 /* Deliberately only checking for the main entry point here; the
4536 language spec even says all arguments to .endp are ignored. */
4537 if (unwind
.proc_pending
.sym
4538 && S_GET_NAME (unwind
.proc_pending
.sym
)
4539 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4540 as_warn (_("`%s' should be an operand to this .endp"),
4541 S_GET_NAME (unwind
.proc_pending
.sym
));
4542 while (unwind
.proc_pending
.next
)
4544 pending
= unwind
.proc_pending
.next
;
4545 unwind
.proc_pending
.next
= pending
->next
;
4548 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4552 dot_template (int template_val
)
4554 CURR_SLOT
.user_template
= template_val
;
4558 dot_regstk (int dummy ATTRIBUTE_UNUSED
)
4560 int ins
, locs
, outs
, rots
;
4562 if (is_it_end_of_statement ())
4563 ins
= locs
= outs
= rots
= 0;
4566 ins
= get_absolute_expression ();
4567 if (*input_line_pointer
++ != ',')
4569 locs
= get_absolute_expression ();
4570 if (*input_line_pointer
++ != ',')
4572 outs
= get_absolute_expression ();
4573 if (*input_line_pointer
++ != ',')
4575 rots
= get_absolute_expression ();
4577 set_regstack (ins
, locs
, outs
, rots
);
4581 as_bad (_("Comma expected"));
4582 ignore_rest_of_line ();
4589 valueT num_alloced
= 0;
4590 struct dynreg
**drpp
, *dr
;
4591 int ch
, base_reg
= 0;
4597 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4598 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4599 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4603 /* First, remove existing names from hash table. */
4604 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4606 str_hash_delete (md
.dynreg_hash
, dr
->name
);
4607 /* FIXME: Free dr->name. */
4611 drpp
= &md
.dynreg
[type
];
4614 ch
= get_symbol_name (&start
);
4615 len
= strlen (ia64_canonicalize_symbol_name (start
));
4616 *input_line_pointer
= ch
;
4618 SKIP_WHITESPACE_AFTER_NAME ();
4619 if (*input_line_pointer
!= '[')
4621 as_bad (_("Expected '['"));
4624 ++input_line_pointer
; /* skip '[' */
4626 num_regs
= get_absolute_expression ();
4628 if (*input_line_pointer
++ != ']')
4630 as_bad (_("Expected ']'"));
4635 as_bad (_("Number of elements must be positive"));
4640 num_alloced
+= num_regs
;
4644 if (num_alloced
> md
.rot
.num_regs
)
4646 as_bad (_("Used more than the declared %d rotating registers"),
4652 if (num_alloced
> 96)
4654 as_bad (_("Used more than the available 96 rotating registers"));
4659 if (num_alloced
> 48)
4661 as_bad (_("Used more than the available 48 rotating registers"));
4672 *drpp
= XOBNEW (¬es
, struct dynreg
);
4673 memset (*drpp
, 0, sizeof (*dr
));
4676 name
= XOBNEWVEC (¬es
, char, len
+ 1);
4677 memcpy (name
, start
, len
);
4682 dr
->num_regs
= num_regs
;
4683 dr
->base
= base_reg
;
4685 base_reg
+= num_regs
;
4687 if (str_hash_insert (md
.dynreg_hash
, name
, dr
, 0) != NULL
)
4689 as_bad (_("Attempt to redefine register set `%s'"), name
);
4690 obstack_free (¬es
, name
);
4694 if (*input_line_pointer
!= ',')
4696 ++input_line_pointer
; /* skip comma */
4699 demand_empty_rest_of_line ();
4703 ignore_rest_of_line ();
4707 dot_byteorder (int byteorder
)
4709 segment_info_type
*seginfo
= seg_info (now_seg
);
4711 if (byteorder
== -1)
4713 if (seginfo
->tc_segment_info_data
.endian
== 0)
4714 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4715 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4718 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4720 if (target_big_endian
!= byteorder
)
4722 target_big_endian
= byteorder
;
4723 if (target_big_endian
)
4725 ia64_number_to_chars
= number_to_chars_bigendian
;
4726 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4730 ia64_number_to_chars
= number_to_chars_littleendian
;
4731 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4737 dot_psr (int dummy ATTRIBUTE_UNUSED
)
4744 ch
= get_symbol_name (&option
);
4745 if (strcmp (option
, "lsb") == 0)
4746 md
.flags
&= ~EF_IA_64_BE
;
4747 else if (strcmp (option
, "msb") == 0)
4748 md
.flags
|= EF_IA_64_BE
;
4749 else if (strcmp (option
, "abi32") == 0)
4750 md
.flags
&= ~EF_IA_64_ABI64
;
4751 else if (strcmp (option
, "abi64") == 0)
4752 md
.flags
|= EF_IA_64_ABI64
;
4754 as_bad (_("Unknown psr option `%s'"), option
);
4755 *input_line_pointer
= ch
;
4757 SKIP_WHITESPACE_AFTER_NAME ();
4758 if (*input_line_pointer
!= ',')
4761 ++input_line_pointer
;
4764 demand_empty_rest_of_line ();
4768 dot_ln (int dummy ATTRIBUTE_UNUSED
)
4770 new_logical_line (0, get_absolute_expression ());
4771 demand_empty_rest_of_line ();
4775 cross_section (int ref
, void (*builder
) (int), int ua
)
4778 int saved_auto_align
;
4779 unsigned int section_count
;
4784 start
= input_line_pointer
;
4785 c
= get_symbol_name (&name
);
4786 if (input_line_pointer
== start
)
4788 as_bad (_("Missing section name"));
4789 ignore_rest_of_line ();
4792 * input_line_pointer
= c
;
4793 SKIP_WHITESPACE_AFTER_NAME ();
4794 end
= input_line_pointer
;
4795 if (*input_line_pointer
!= ',')
4797 as_bad (_("Comma expected after section name"));
4798 ignore_rest_of_line ();
4802 end
= input_line_pointer
+ 1; /* skip comma */
4803 input_line_pointer
= start
;
4804 md
.keep_pending_output
= 1;
4805 section_count
= bfd_count_sections (stdoutput
);
4806 obj_elf_section (0);
4807 if (section_count
!= bfd_count_sections (stdoutput
))
4808 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
4809 input_line_pointer
= end
;
4810 saved_auto_align
= md
.auto_align
;
4815 md
.auto_align
= saved_auto_align
;
4816 obj_elf_previous (0);
4817 md
.keep_pending_output
= 0;
4821 dot_xdata (int size
)
4823 cross_section (size
, cons
, 0);
4826 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4829 stmt_float_cons (int kind
)
4849 do_align (alignment
, NULL
, 0, 0);
4854 stmt_cons_ua (int size
)
4856 int saved_auto_align
= md
.auto_align
;
4860 md
.auto_align
= saved_auto_align
;
4864 dot_xfloat_cons (int kind
)
4866 cross_section (kind
, stmt_float_cons
, 0);
4870 dot_xstringer (int zero
)
4872 cross_section (zero
, stringer
, 0);
4876 dot_xdata_ua (int size
)
4878 cross_section (size
, cons
, 1);
4882 dot_xfloat_cons_ua (int kind
)
4884 cross_section (kind
, float_cons
, 1);
4887 /* .reg.val <regname>,value */
4890 dot_reg_val (int dummy ATTRIBUTE_UNUSED
)
4894 expression_and_evaluate (®
);
4895 if (reg
.X_op
!= O_register
)
4897 as_bad (_("Register name expected"));
4898 ignore_rest_of_line ();
4900 else if (*input_line_pointer
++ != ',')
4902 as_bad (_("Comma expected"));
4903 ignore_rest_of_line ();
4907 valueT value
= get_absolute_expression ();
4908 int regno
= reg
.X_add_number
;
4909 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4910 as_warn (_("Register value annotation ignored"));
4913 gr_values
[regno
- REG_GR
].known
= 1;
4914 gr_values
[regno
- REG_GR
].value
= value
;
4915 gr_values
[regno
- REG_GR
].path
= md
.path
;
4918 demand_empty_rest_of_line ();
4923 .serialize.instruction
4926 dot_serialize (int type
)
4928 insn_group_break (0, 0, 0);
4930 instruction_serialization ();
4932 data_serialization ();
4933 insn_group_break (0, 0, 0);
4934 demand_empty_rest_of_line ();
4937 /* select dv checking mode
4942 A stop is inserted when changing modes
4946 dot_dv_mode (int type
)
4948 if (md
.manual_bundling
)
4949 as_warn (_("Directive invalid within a bundle"));
4951 if (type
== 'E' || type
== 'A')
4952 md
.mode_explicitly_set
= 0;
4954 md
.mode_explicitly_set
= 1;
4961 if (md
.explicit_mode
)
4962 insn_group_break (1, 0, 0);
4963 md
.explicit_mode
= 0;
4967 if (!md
.explicit_mode
)
4968 insn_group_break (1, 0, 0);
4969 md
.explicit_mode
= 1;
4973 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4974 insn_group_break (1, 0, 0);
4975 md
.explicit_mode
= md
.default_explicit_mode
;
4976 md
.mode_explicitly_set
= 0;
4982 print_prmask (valueT mask
)
4985 const char *comma
= "";
4986 for (regno
= 0; regno
< 64; regno
++)
4988 if (mask
& ((valueT
) 1 << regno
))
4990 fprintf (stderr
, "%s p%d", comma
, regno
);
4997 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
4998 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
4999 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5000 .pred.safe_across_calls p1 [, p2 [,...]]
5004 dot_pred_rel (int type
)
5008 int p1
= -1, p2
= -1;
5012 if (*input_line_pointer
== '"')
5015 char *form
= demand_copy_C_string (&len
);
5017 if (strcmp (form
, "mutex") == 0)
5019 else if (strcmp (form
, "clear") == 0)
5021 else if (strcmp (form
, "imply") == 0)
5023 obstack_free (¬es
, form
);
5025 else if (*input_line_pointer
== '@')
5030 ++input_line_pointer
;
5031 c
= get_symbol_name (&form
);
5033 if (strcmp (form
, "mutex") == 0)
5035 else if (strcmp (form
, "clear") == 0)
5037 else if (strcmp (form
, "imply") == 0)
5039 (void) restore_line_pointer (c
);
5043 as_bad (_("Missing predicate relation type"));
5044 ignore_rest_of_line ();
5049 as_bad (_("Unrecognized predicate relation type"));
5050 ignore_rest_of_line ();
5053 if (*input_line_pointer
== ',')
5054 ++input_line_pointer
;
5062 expressionS pr
, *pr1
, *pr2
;
5064 sep
= parse_operand_and_eval (&pr
, ',');
5065 if (pr
.X_op
== O_register
5066 && pr
.X_add_number
>= REG_P
5067 && pr
.X_add_number
<= REG_P
+ 63)
5069 regno
= pr
.X_add_number
- REG_P
;
5077 else if (type
!= 'i'
5078 && pr
.X_op
== O_subtract
5079 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5080 && pr1
->X_op
== O_register
5081 && pr1
->X_add_number
>= REG_P
5082 && pr1
->X_add_number
<= REG_P
+ 63
5083 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5084 && pr2
->X_op
== O_register
5085 && pr2
->X_add_number
>= REG_P
5086 && pr2
->X_add_number
<= REG_P
+ 63)
5091 regno
= pr1
->X_add_number
- REG_P
;
5092 stop
= pr2
->X_add_number
- REG_P
;
5095 as_bad (_("Bad register range"));
5096 ignore_rest_of_line ();
5099 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5100 count
+= stop
- regno
+ 1;
5104 as_bad (_("Predicate register expected"));
5105 ignore_rest_of_line ();
5109 as_warn (_("Duplicate predicate register ignored"));
5120 clear_qp_mutex (mask
);
5121 clear_qp_implies (mask
, (valueT
) 0);
5124 if (count
!= 2 || p1
== -1 || p2
== -1)
5125 as_bad (_("Predicate source and target required"));
5126 else if (p1
== 0 || p2
== 0)
5127 as_bad (_("Use of p0 is not valid in this context"));
5129 add_qp_imply (p1
, p2
);
5134 as_bad (_("At least two PR arguments expected"));
5139 as_bad (_("Use of p0 is not valid in this context"));
5142 add_qp_mutex (mask
);
5145 /* note that we don't override any existing relations */
5148 as_bad (_("At least one PR argument expected"));
5153 fprintf (stderr
, "Safe across calls: ");
5154 print_prmask (mask
);
5155 fprintf (stderr
, "\n");
5157 qp_safe_across_calls
= mask
;
5160 demand_empty_rest_of_line ();
5163 /* .entry label [, label [, ...]]
5164 Hint to DV code that the given labels are to be considered entry points.
5165 Otherwise, only global labels are considered entry points. */
5168 dot_entry (int dummy ATTRIBUTE_UNUSED
)
5176 c
= get_symbol_name (&name
);
5177 symbolP
= symbol_find_or_make (name
);
5179 if (str_hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), symbolP
, 0))
5180 as_bad (_("duplicate entry hint %s"), name
);
5182 *input_line_pointer
= c
;
5183 SKIP_WHITESPACE_AFTER_NAME ();
5184 c
= *input_line_pointer
;
5187 input_line_pointer
++;
5189 if (*input_line_pointer
== '\n')
5195 demand_empty_rest_of_line ();
5198 /* .mem.offset offset, base
5199 "base" is used to distinguish between offsets from a different base. */
5202 dot_mem_offset (int dummy ATTRIBUTE_UNUSED
)
5204 md
.mem_offset
.hint
= 1;
5205 md
.mem_offset
.offset
= get_absolute_expression ();
5206 if (*input_line_pointer
!= ',')
5208 as_bad (_("Comma expected"));
5209 ignore_rest_of_line ();
5212 ++input_line_pointer
;
5213 md
.mem_offset
.base
= get_absolute_expression ();
5214 demand_empty_rest_of_line ();
5217 /* ia64-specific pseudo-ops: */
5218 const pseudo_typeS md_pseudo_table
[] =
5220 { "radix", dot_radix
, 0 },
5221 { "lcomm", s_lcomm_bytes
, 1 },
5222 { "loc", dot_loc
, 0 },
5223 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5224 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5225 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5226 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5227 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5228 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5229 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5230 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5231 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5232 { "proc", dot_proc
, 0 },
5233 { "body", dot_body
, 0 },
5234 { "prologue", dot_prologue
, 0 },
5235 { "endp", dot_endp
, 0 },
5237 { "fframe", dot_fframe
, 0 },
5238 { "vframe", dot_vframe
, 0 },
5239 { "vframesp", dot_vframesp
, 0 },
5240 { "vframepsp", dot_vframesp
, 1 },
5241 { "save", dot_save
, 0 },
5242 { "restore", dot_restore
, 0 },
5243 { "restorereg", dot_restorereg
, 0 },
5244 { "restorereg.p", dot_restorereg
, 1 },
5245 { "handlerdata", dot_handlerdata
, 0 },
5246 { "unwentry", dot_unwentry
, 0 },
5247 { "altrp", dot_altrp
, 0 },
5248 { "savesp", dot_savemem
, 0 },
5249 { "savepsp", dot_savemem
, 1 },
5250 { "save.g", dot_saveg
, 0 },
5251 { "save.f", dot_savef
, 0 },
5252 { "save.b", dot_saveb
, 0 },
5253 { "save.gf", dot_savegf
, 0 },
5254 { "spill", dot_spill
, 0 },
5255 { "spillreg", dot_spillreg
, 0 },
5256 { "spillsp", dot_spillmem
, 0 },
5257 { "spillpsp", dot_spillmem
, 1 },
5258 { "spillreg.p", dot_spillreg
, 1 },
5259 { "spillsp.p", dot_spillmem
, ~0 },
5260 { "spillpsp.p", dot_spillmem
, ~1 },
5261 { "label_state", dot_label_state
, 0 },
5262 { "copy_state", dot_copy_state
, 0 },
5263 { "unwabi", dot_unwabi
, 0 },
5264 { "personality", dot_personality
, 0 },
5265 { "mii", dot_template
, 0x0 },
5266 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5267 { "mlx", dot_template
, 0x2 },
5268 { "mmi", dot_template
, 0x4 },
5269 { "mfi", dot_template
, 0x6 },
5270 { "mmf", dot_template
, 0x7 },
5271 { "mib", dot_template
, 0x8 },
5272 { "mbb", dot_template
, 0x9 },
5273 { "bbb", dot_template
, 0xb },
5274 { "mmb", dot_template
, 0xc },
5275 { "mfb", dot_template
, 0xe },
5276 { "align", dot_align
, 0 },
5277 { "regstk", dot_regstk
, 0 },
5278 { "rotr", dot_rot
, DYNREG_GR
},
5279 { "rotf", dot_rot
, DYNREG_FR
},
5280 { "rotp", dot_rot
, DYNREG_PR
},
5281 { "lsb", dot_byteorder
, 0 },
5282 { "msb", dot_byteorder
, 1 },
5283 { "psr", dot_psr
, 0 },
5284 { "alias", dot_alias
, 0 },
5285 { "secalias", dot_alias
, 1 },
5286 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5288 { "xdata1", dot_xdata
, 1 },
5289 { "xdata2", dot_xdata
, 2 },
5290 { "xdata4", dot_xdata
, 4 },
5291 { "xdata8", dot_xdata
, 8 },
5292 { "xdata16", dot_xdata
, 16 },
5293 { "xreal4", dot_xfloat_cons
, 'f' },
5294 { "xreal8", dot_xfloat_cons
, 'd' },
5295 { "xreal10", dot_xfloat_cons
, 'x' },
5296 { "xreal16", dot_xfloat_cons
, 'X' },
5297 { "xstring", dot_xstringer
, 8 + 0 },
5298 { "xstringz", dot_xstringer
, 8 + 1 },
5300 /* unaligned versions: */
5301 { "xdata2.ua", dot_xdata_ua
, 2 },
5302 { "xdata4.ua", dot_xdata_ua
, 4 },
5303 { "xdata8.ua", dot_xdata_ua
, 8 },
5304 { "xdata16.ua", dot_xdata_ua
, 16 },
5305 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5306 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5307 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5308 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5310 /* annotations/DV checking support */
5311 { "entry", dot_entry
, 0 },
5312 { "mem.offset", dot_mem_offset
, 0 },
5313 { "pred.rel", dot_pred_rel
, 0 },
5314 { "pred.rel.clear", dot_pred_rel
, 'c' },
5315 { "pred.rel.imply", dot_pred_rel
, 'i' },
5316 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5317 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5318 { "reg.val", dot_reg_val
, 0 },
5319 { "serialize.data", dot_serialize
, 0 },
5320 { "serialize.instruction", dot_serialize
, 1 },
5321 { "auto", dot_dv_mode
, 'a' },
5322 { "explicit", dot_dv_mode
, 'e' },
5323 { "default", dot_dv_mode
, 'd' },
5325 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5326 IA-64 aligns data allocation pseudo-ops by default, so we have to
5327 tell it that these ones are supposed to be unaligned. Long term,
5328 should rewrite so that only IA-64 specific data allocation pseudo-ops
5329 are aligned by default. */
5330 {"2byte", stmt_cons_ua
, 2},
5331 {"4byte", stmt_cons_ua
, 4},
5332 {"8byte", stmt_cons_ua
, 8},
5335 {"vms_common", obj_elf_vms_common
, 0},
5341 static const struct pseudo_opcode
5344 void (*handler
) (int);
5349 /* these are more like pseudo-ops, but don't start with a dot */
5350 { "data1", cons
, 1 },
5351 { "data2", cons
, 2 },
5352 { "data4", cons
, 4 },
5353 { "data8", cons
, 8 },
5354 { "data16", cons
, 16 },
5355 { "real4", stmt_float_cons
, 'f' },
5356 { "real8", stmt_float_cons
, 'd' },
5357 { "real10", stmt_float_cons
, 'x' },
5358 { "real16", stmt_float_cons
, 'X' },
5359 { "string", stringer
, 8 + 0 },
5360 { "stringz", stringer
, 8 + 1 },
5362 /* unaligned versions: */
5363 { "data2.ua", stmt_cons_ua
, 2 },
5364 { "data4.ua", stmt_cons_ua
, 4 },
5365 { "data8.ua", stmt_cons_ua
, 8 },
5366 { "data16.ua", stmt_cons_ua
, 16 },
5367 { "real4.ua", float_cons
, 'f' },
5368 { "real8.ua", float_cons
, 'd' },
5369 { "real10.ua", float_cons
, 'x' },
5370 { "real16.ua", float_cons
, 'X' },
5373 /* Declare a register by creating a symbol for it and entering it in
5374 the symbol table. */
5377 declare_register (const char *name
, unsigned int regnum
)
5381 sym
= symbol_create (name
, reg_section
, &zero_address_frag
, regnum
);
5383 if (str_hash_insert (md
.reg_hash
, S_GET_NAME (sym
), sym
, 0) != NULL
)
5384 as_fatal (_("duplicate %s"), name
);
5390 declare_register_set (const char *prefix
,
5391 unsigned int num_regs
,
5392 unsigned int base_regnum
)
5397 for (i
= 0; i
< num_regs
; ++i
)
5399 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5400 declare_register (name
, base_regnum
+ i
);
5405 operand_width (enum ia64_opnd opnd
)
5407 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5408 unsigned int bits
= 0;
5412 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5413 bits
+= odesc
->field
[i
].bits
;
5418 static enum operand_match_result
5419 operand_match (const struct ia64_opcode
*idesc
, int res_index
, expressionS
*e
)
5421 enum ia64_opnd opnd
= idesc
->operands
[res_index
];
5422 int bits
, relocatable
= 0;
5423 struct insn_fix
*fix
;
5430 case IA64_OPND_AR_CCV
:
5431 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5432 return OPERAND_MATCH
;
5435 case IA64_OPND_AR_CSD
:
5436 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5437 return OPERAND_MATCH
;
5440 case IA64_OPND_AR_PFS
:
5441 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5442 return OPERAND_MATCH
;
5446 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5447 return OPERAND_MATCH
;
5451 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5452 return OPERAND_MATCH
;
5456 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5457 return OPERAND_MATCH
;
5460 case IA64_OPND_PR_ROT
:
5461 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5462 return OPERAND_MATCH
;
5466 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5467 return OPERAND_MATCH
;
5470 case IA64_OPND_PSR_L
:
5471 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5472 return OPERAND_MATCH
;
5475 case IA64_OPND_PSR_UM
:
5476 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5477 return OPERAND_MATCH
;
5481 if (e
->X_op
== O_constant
)
5483 if (e
->X_add_number
== 1)
5484 return OPERAND_MATCH
;
5486 return OPERAND_OUT_OF_RANGE
;
5491 if (e
->X_op
== O_constant
)
5493 if (e
->X_add_number
== 8)
5494 return OPERAND_MATCH
;
5496 return OPERAND_OUT_OF_RANGE
;
5501 if (e
->X_op
== O_constant
)
5503 if (e
->X_add_number
== 16)
5504 return OPERAND_MATCH
;
5506 return OPERAND_OUT_OF_RANGE
;
5510 /* register operands: */
5513 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5514 && e
->X_add_number
< REG_AR
+ 128)
5515 return OPERAND_MATCH
;
5520 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5521 && e
->X_add_number
< REG_BR
+ 8)
5522 return OPERAND_MATCH
;
5526 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5527 && e
->X_add_number
< REG_CR
+ 128)
5528 return OPERAND_MATCH
;
5531 case IA64_OPND_DAHR3
:
5532 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_DAHR
5533 && e
->X_add_number
< REG_DAHR
+ 8)
5534 return OPERAND_MATCH
;
5541 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5542 && e
->X_add_number
< REG_FR
+ 128)
5543 return OPERAND_MATCH
;
5548 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5549 && e
->X_add_number
< REG_P
+ 64)
5550 return OPERAND_MATCH
;
5556 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5557 && e
->X_add_number
< REG_GR
+ 128)
5558 return OPERAND_MATCH
;
5561 case IA64_OPND_R3_2
:
5562 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5564 if (e
->X_add_number
< REG_GR
+ 4)
5565 return OPERAND_MATCH
;
5566 else if (e
->X_add_number
< REG_GR
+ 128)
5567 return OPERAND_OUT_OF_RANGE
;
5571 /* indirect operands: */
5572 case IA64_OPND_CPUID_R3
:
5573 case IA64_OPND_DBR_R3
:
5574 case IA64_OPND_DTR_R3
:
5575 case IA64_OPND_ITR_R3
:
5576 case IA64_OPND_IBR_R3
:
5577 case IA64_OPND_MSR_R3
:
5578 case IA64_OPND_PKR_R3
:
5579 case IA64_OPND_PMC_R3
:
5580 case IA64_OPND_PMD_R3
:
5581 case IA64_OPND_DAHR_R3
:
5582 case IA64_OPND_RR_R3
:
5583 if (e
->X_op
== O_index
&& e
->X_op_symbol
5584 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5585 == opnd
- IA64_OPND_CPUID_R3
))
5586 return OPERAND_MATCH
;
5590 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5591 return OPERAND_MATCH
;
5594 /* immediate operands: */
5595 case IA64_OPND_CNT2a
:
5596 case IA64_OPND_LEN4
:
5597 case IA64_OPND_LEN6
:
5598 bits
= operand_width (idesc
->operands
[res_index
]);
5599 if (e
->X_op
== O_constant
)
5601 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5602 return OPERAND_MATCH
;
5604 return OPERAND_OUT_OF_RANGE
;
5608 case IA64_OPND_CNT2b
:
5609 if (e
->X_op
== O_constant
)
5611 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5612 return OPERAND_MATCH
;
5614 return OPERAND_OUT_OF_RANGE
;
5618 case IA64_OPND_CNT2c
:
5619 val
= e
->X_add_number
;
5620 if (e
->X_op
== O_constant
)
5622 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5623 return OPERAND_MATCH
;
5625 return OPERAND_OUT_OF_RANGE
;
5630 /* SOR must be an integer multiple of 8 */
5631 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5632 return OPERAND_OUT_OF_RANGE
;
5636 if (e
->X_op
== O_constant
)
5638 if ((bfd_vma
) e
->X_add_number
<= 96)
5639 return OPERAND_MATCH
;
5641 return OPERAND_OUT_OF_RANGE
;
5645 case IA64_OPND_IMMU62
:
5646 if (e
->X_op
== O_constant
)
5648 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5649 return OPERAND_MATCH
;
5651 return OPERAND_OUT_OF_RANGE
;
5655 /* FIXME -- need 62-bit relocation type */
5656 as_bad (_("62-bit relocation not yet implemented"));
5660 case IA64_OPND_IMMU64
:
5661 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5662 || e
->X_op
== O_subtract
)
5664 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5665 fix
->code
= BFD_RELOC_IA64_IMM64
;
5666 if (e
->X_op
!= O_subtract
)
5668 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5669 if (e
->X_op
== O_pseudo_fixup
)
5673 fix
->opnd
= idesc
->operands
[res_index
];
5676 ++CURR_SLOT
.num_fixups
;
5677 return OPERAND_MATCH
;
5679 else if (e
->X_op
== O_constant
)
5680 return OPERAND_MATCH
;
5683 case IA64_OPND_IMMU5b
:
5684 if (e
->X_op
== O_constant
)
5686 val
= e
->X_add_number
;
5687 if (val
>= 32 && val
<= 63)
5688 return OPERAND_MATCH
;
5690 return OPERAND_OUT_OF_RANGE
;
5694 case IA64_OPND_CCNT5
:
5695 case IA64_OPND_CNT5
:
5696 case IA64_OPND_CNT6
:
5697 case IA64_OPND_CPOS6a
:
5698 case IA64_OPND_CPOS6b
:
5699 case IA64_OPND_CPOS6c
:
5700 case IA64_OPND_IMMU2
:
5701 case IA64_OPND_IMMU7a
:
5702 case IA64_OPND_IMMU7b
:
5703 case IA64_OPND_IMMU16
:
5704 case IA64_OPND_IMMU19
:
5705 case IA64_OPND_IMMU21
:
5706 case IA64_OPND_IMMU24
:
5707 case IA64_OPND_MBTYPE4
:
5708 case IA64_OPND_MHTYPE8
:
5709 case IA64_OPND_POS6
:
5710 bits
= operand_width (idesc
->operands
[res_index
]);
5711 if (e
->X_op
== O_constant
)
5713 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5714 return OPERAND_MATCH
;
5716 return OPERAND_OUT_OF_RANGE
;
5720 case IA64_OPND_IMMU9
:
5721 bits
= operand_width (idesc
->operands
[res_index
]);
5722 if (e
->X_op
== O_constant
)
5724 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5726 int lobits
= e
->X_add_number
& 0x3;
5727 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5728 e
->X_add_number
|= (bfd_vma
) 0x3;
5729 return OPERAND_MATCH
;
5732 return OPERAND_OUT_OF_RANGE
;
5736 case IA64_OPND_IMM44
:
5737 /* least 16 bits must be zero */
5738 if ((e
->X_add_number
& 0xffff) != 0)
5739 /* XXX technically, this is wrong: we should not be issuing warning
5740 messages until we're sure this instruction pattern is going to
5742 as_warn (_("lower 16 bits of mask ignored"));
5744 if (e
->X_op
== O_constant
)
5746 if (((e
->X_add_number
>= 0
5747 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5748 || (e
->X_add_number
< 0
5749 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5752 if (e
->X_add_number
>= 0
5753 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5755 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5757 return OPERAND_MATCH
;
5760 return OPERAND_OUT_OF_RANGE
;
5764 case IA64_OPND_IMM17
:
5765 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5766 if (e
->X_op
== O_constant
)
5768 if (((e
->X_add_number
>= 0
5769 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5770 || (e
->X_add_number
< 0
5771 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5774 if (e
->X_add_number
>= 0
5775 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5777 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5779 return OPERAND_MATCH
;
5782 return OPERAND_OUT_OF_RANGE
;
5786 case IA64_OPND_IMM14
:
5787 case IA64_OPND_IMM22
:
5790 case IA64_OPND_IMM1
:
5791 case IA64_OPND_IMM8
:
5792 case IA64_OPND_IMM8U4
:
5793 case IA64_OPND_IMM8M1
:
5794 case IA64_OPND_IMM8M1U4
:
5795 case IA64_OPND_IMM8M1U8
:
5796 case IA64_OPND_IMM9a
:
5797 case IA64_OPND_IMM9b
:
5798 bits
= operand_width (idesc
->operands
[res_index
]);
5799 if (relocatable
&& (e
->X_op
== O_symbol
5800 || e
->X_op
== O_subtract
5801 || e
->X_op
== O_pseudo_fixup
))
5803 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5805 if (idesc
->operands
[res_index
] == IA64_OPND_IMM14
)
5806 fix
->code
= BFD_RELOC_IA64_IMM14
;
5808 fix
->code
= BFD_RELOC_IA64_IMM22
;
5810 if (e
->X_op
!= O_subtract
)
5812 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5813 if (e
->X_op
== O_pseudo_fixup
)
5817 fix
->opnd
= idesc
->operands
[res_index
];
5820 ++CURR_SLOT
.num_fixups
;
5821 return OPERAND_MATCH
;
5823 else if (e
->X_op
!= O_constant
5824 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5825 return OPERAND_MISMATCH
;
5827 if (opnd
== IA64_OPND_IMM8M1U4
)
5829 /* Zero is not valid for unsigned compares that take an adjusted
5830 constant immediate range. */
5831 if (e
->X_add_number
== 0)
5832 return OPERAND_OUT_OF_RANGE
;
5834 /* Sign-extend 32-bit unsigned numbers, so that the following range
5835 checks will work. */
5836 val
= e
->X_add_number
;
5837 if ((val
& (~(bfd_vma
) 0 << 32)) == 0)
5838 val
= (val
^ ((bfd_vma
) 1 << 31)) - ((bfd_vma
) 1 << 31);
5840 /* Check for 0x100000000. This is valid because
5841 0x100000000-1 is the same as ((uint32_t) -1). */
5842 if (val
== ((bfd_signed_vma
) 1 << 32))
5843 return OPERAND_MATCH
;
5847 else if (opnd
== IA64_OPND_IMM8M1U8
)
5849 /* Zero is not valid for unsigned compares that take an adjusted
5850 constant immediate range. */
5851 if (e
->X_add_number
== 0)
5852 return OPERAND_OUT_OF_RANGE
;
5854 /* Check for 0x10000000000000000. */
5855 if (e
->X_op
== O_big
)
5857 if (generic_bignum
[0] == 0
5858 && generic_bignum
[1] == 0
5859 && generic_bignum
[2] == 0
5860 && generic_bignum
[3] == 0
5861 && generic_bignum
[4] == 1)
5862 return OPERAND_MATCH
;
5864 return OPERAND_OUT_OF_RANGE
;
5867 val
= e
->X_add_number
- 1;
5869 else if (opnd
== IA64_OPND_IMM8M1
)
5870 val
= e
->X_add_number
- 1;
5871 else if (opnd
== IA64_OPND_IMM8U4
)
5873 /* Sign-extend 32-bit unsigned numbers, so that the following range
5874 checks will work. */
5875 val
= e
->X_add_number
;
5876 if ((val
& (~(bfd_vma
) 0 << 32)) == 0)
5877 val
= (val
^ ((bfd_vma
) 1 << 31)) - ((bfd_vma
) 1 << 31);
5880 val
= e
->X_add_number
;
5882 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5883 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5884 return OPERAND_MATCH
;
5886 return OPERAND_OUT_OF_RANGE
;
5888 case IA64_OPND_INC3
:
5889 /* +/- 1, 4, 8, 16 */
5890 val
= e
->X_add_number
;
5893 if (e
->X_op
== O_constant
)
5895 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5896 return OPERAND_MATCH
;
5898 return OPERAND_OUT_OF_RANGE
;
5902 case IA64_OPND_TGT25
:
5903 case IA64_OPND_TGT25b
:
5904 case IA64_OPND_TGT25c
:
5905 case IA64_OPND_TGT64
:
5906 if (e
->X_op
== O_symbol
)
5908 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5909 if (opnd
== IA64_OPND_TGT25
)
5910 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5911 else if (opnd
== IA64_OPND_TGT25b
)
5912 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5913 else if (opnd
== IA64_OPND_TGT25c
)
5914 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5915 else if (opnd
== IA64_OPND_TGT64
)
5916 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5920 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5921 fix
->opnd
= idesc
->operands
[res_index
];
5924 ++CURR_SLOT
.num_fixups
;
5925 return OPERAND_MATCH
;
5928 case IA64_OPND_TAG13
:
5929 case IA64_OPND_TAG13b
:
5933 return OPERAND_MATCH
;
5936 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5937 /* There are no external relocs for TAG13/TAG13b fields, so we
5938 create a dummy reloc. This will not live past md_apply_fix. */
5939 fix
->code
= BFD_RELOC_UNUSED
;
5940 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5941 fix
->opnd
= idesc
->operands
[res_index
];
5944 ++CURR_SLOT
.num_fixups
;
5945 return OPERAND_MATCH
;
5952 case IA64_OPND_LDXMOV
:
5953 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5954 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5955 fix
->opnd
= idesc
->operands
[res_index
];
5958 ++CURR_SLOT
.num_fixups
;
5959 return OPERAND_MATCH
;
5961 case IA64_OPND_STRD5b
:
5962 if (e
->X_op
== O_constant
)
5964 /* 5-bit signed scaled by 64 */
5965 if ((e
->X_add_number
<= ( 0xf << 6 ))
5966 && (e
->X_add_number
>= -( 0x10 << 6 )))
5969 /* Must be a multiple of 64 */
5970 if ((e
->X_add_number
& 0x3f) != 0)
5971 as_warn (_("stride must be a multiple of 64; lower 6 bits ignored"));
5973 e
->X_add_number
&= ~ 0x3f;
5974 return OPERAND_MATCH
;
5977 return OPERAND_OUT_OF_RANGE
;
5980 case IA64_OPND_CNT6a
:
5981 if (e
->X_op
== O_constant
)
5983 /* 6-bit unsigned biased by 1 -- count 0 is meaningless */
5984 if ((e
->X_add_number
<= 64)
5985 && (e
->X_add_number
> 0) )
5987 return OPERAND_MATCH
;
5990 return OPERAND_OUT_OF_RANGE
;
5997 return OPERAND_MISMATCH
;
6001 parse_operand (expressionS
*e
, int more
)
6005 memset (e
, 0, sizeof (*e
));
6009 sep
= *input_line_pointer
;
6010 if (more
&& (sep
== ',' || sep
== more
))
6011 ++input_line_pointer
;
6016 parse_operand_and_eval (expressionS
*e
, int more
)
6018 int sep
= parse_operand (e
, more
);
6019 resolve_expression (e
);
6024 parse_operand_maybe_eval (expressionS
*e
, int more
, enum ia64_opnd op
)
6026 int sep
= parse_operand (e
, more
);
6029 case IA64_OPND_IMM14
:
6030 case IA64_OPND_IMM22
:
6031 case IA64_OPND_IMMU64
:
6032 case IA64_OPND_TGT25
:
6033 case IA64_OPND_TGT25b
:
6034 case IA64_OPND_TGT25c
:
6035 case IA64_OPND_TGT64
:
6036 case IA64_OPND_TAG13
:
6037 case IA64_OPND_TAG13b
:
6038 case IA64_OPND_LDXMOV
:
6041 resolve_expression (e
);
6047 /* Returns the next entry in the opcode table that matches the one in
6048 IDESC, and frees the entry in IDESC. If no matching entry is
6049 found, NULL is returned instead. */
6051 static struct ia64_opcode
*
6052 get_next_opcode (struct ia64_opcode
*idesc
)
6054 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6055 ia64_free_opcode (idesc
);
6059 /* Parse the operands for the opcode and find the opcode variant that
6060 matches the specified operands, or NULL if no match is possible. */
6062 static struct ia64_opcode
*
6063 parse_operands (struct ia64_opcode
*idesc
)
6065 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6066 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6069 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6070 enum operand_match_result result
;
6072 char *first_arg
= 0, *end
, *saved_input_pointer
;
6075 gas_assert (strlen (idesc
->name
) <= 128);
6077 strcpy (mnemonic
, idesc
->name
);
6078 if (idesc
->operands
[2] == IA64_OPND_SOF
6079 || idesc
->operands
[1] == IA64_OPND_SOF
)
6081 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6082 can't parse the first operand until we have parsed the
6083 remaining operands of the "alloc" instruction. */
6085 first_arg
= input_line_pointer
;
6086 end
= strchr (input_line_pointer
, '=');
6089 as_bad (_("Expected separator `='"));
6092 input_line_pointer
= end
+ 1;
6099 if (i
< NELEMS (CURR_SLOT
.opnd
))
6101 enum ia64_opnd op
= IA64_OPND_NIL
;
6102 if (i
< NELEMS (idesc
->operands
))
6103 op
= idesc
->operands
[i
];
6104 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ i
, '=', op
);
6105 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6112 sep
= parse_operand (&dummy
, '=');
6113 if (dummy
.X_op
== O_absent
)
6119 if (sep
!= '=' && sep
!= ',')
6124 if (num_outputs
> 0)
6125 as_bad (_("Duplicate equal sign (=) in instruction"));
6127 num_outputs
= i
+ 1;
6132 as_bad (_("Illegal operand separator `%c'"), sep
);
6136 if (idesc
->operands
[2] == IA64_OPND_SOF
6137 || idesc
->operands
[1] == IA64_OPND_SOF
)
6139 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6140 Note, however, that due to that mapping operand numbers in error
6141 messages for any of the constant operands will not be correct. */
6142 know (strcmp (idesc
->name
, "alloc") == 0);
6143 /* The first operand hasn't been parsed/initialized, yet (but
6144 num_operands intentionally doesn't account for that). */
6145 i
= num_operands
> 4 ? 2 : 1;
6146 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6147 ? CURR_SLOT.opnd[n].X_add_number \
6149 sof
= set_regstack (FORCE_CONST(i
),
6152 FORCE_CONST(i
+ 3));
6155 /* now we can parse the first arg: */
6156 saved_input_pointer
= input_line_pointer
;
6157 input_line_pointer
= first_arg
;
6158 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ 0, '=',
6159 idesc
->operands
[0]);
6161 --num_outputs
; /* force error */
6162 input_line_pointer
= saved_input_pointer
;
6164 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6165 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6166 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6167 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6168 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6170 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6171 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6174 highest_unmatched_operand
= -4;
6175 curr_out_of_range_pos
= -1;
6177 for (; idesc
; idesc
= get_next_opcode (idesc
))
6179 if (num_outputs
!= idesc
->num_outputs
)
6180 continue; /* mismatch in # of outputs */
6181 if (highest_unmatched_operand
< 0)
6182 highest_unmatched_operand
|= 1;
6183 if (num_operands
> NELEMS (idesc
->operands
)
6184 || (num_operands
< NELEMS (idesc
->operands
)
6185 && idesc
->operands
[num_operands
])
6186 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6187 continue; /* mismatch in number of arguments */
6188 if (highest_unmatched_operand
< 0)
6189 highest_unmatched_operand
|= 2;
6191 CURR_SLOT
.num_fixups
= 0;
6193 /* Try to match all operands. If we see an out-of-range operand,
6194 then continue trying to match the rest of the operands, since if
6195 the rest match, then this idesc will give the best error message. */
6197 out_of_range_pos
= -1;
6198 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6200 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6201 if (result
!= OPERAND_MATCH
)
6203 if (result
!= OPERAND_OUT_OF_RANGE
)
6205 if (out_of_range_pos
< 0)
6206 /* remember position of the first out-of-range operand: */
6207 out_of_range_pos
= i
;
6211 /* If we did not match all operands, or if at least one operand was
6212 out-of-range, then this idesc does not match. Keep track of which
6213 idesc matched the most operands before failing. If we have two
6214 idescs that failed at the same position, and one had an out-of-range
6215 operand, then prefer the out-of-range operand. Thus if we have
6216 "add r0=0x1000000,r1" we get an error saying the constant is out
6217 of range instead of an error saying that the constant should have been
6220 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6222 if (i
> highest_unmatched_operand
6223 || (i
== highest_unmatched_operand
6224 && out_of_range_pos
> curr_out_of_range_pos
))
6226 highest_unmatched_operand
= i
;
6227 if (out_of_range_pos
>= 0)
6229 expected_operand
= idesc
->operands
[out_of_range_pos
];
6230 error_pos
= out_of_range_pos
;
6234 expected_operand
= idesc
->operands
[i
];
6237 curr_out_of_range_pos
= out_of_range_pos
;
6246 if (expected_operand
)
6247 as_bad (_("Operand %u of `%s' should be %s"),
6248 error_pos
+ 1, mnemonic
,
6249 elf64_ia64_operands
[expected_operand
].desc
);
6250 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6251 as_bad (_("Wrong number of output operands"));
6252 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6253 as_bad (_("Wrong number of input operands"));
6255 as_bad (_("Operand mismatch"));
6259 /* Check that the instruction doesn't use
6260 - r0, f0, or f1 as output operands
6261 - the same predicate twice as output operands
6262 - r0 as address of a base update load or store
6263 - the same GR as output and address of a base update load
6264 - two even- or two odd-numbered FRs as output operands of a floating
6265 point parallel load.
6266 At most two (conflicting) output (or output-like) operands can exist,
6267 (floating point parallel loads have three outputs, but the base register,
6268 if updated, cannot conflict with the actual outputs). */
6270 for (i
= 0; i
< num_operands
; ++i
)
6275 switch (idesc
->operands
[i
])
6280 if (i
< num_outputs
)
6282 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6285 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6287 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6292 if (i
< num_outputs
)
6295 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6297 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6304 if (i
< num_outputs
)
6306 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6307 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6310 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6313 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6315 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6319 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6321 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6324 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6326 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6337 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6340 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6346 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6351 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6356 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6364 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6366 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6367 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6368 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6369 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6370 && ! ((reg1
^ reg2
) & 1))
6371 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6372 reg1
- REG_FR
, reg2
- REG_FR
);
6373 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6374 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6375 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6376 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6377 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6378 reg1
- REG_FR
, reg2
- REG_FR
);
6383 build_insn (struct slot
*slot
, bfd_vma
*insnp
)
6385 const struct ia64_operand
*odesc
, *o2desc
;
6386 struct ia64_opcode
*idesc
= slot
->idesc
;
6392 insn
= idesc
->opcode
| slot
->qp_regno
;
6394 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6396 if (slot
->opnd
[i
].X_op
== O_register
6397 || slot
->opnd
[i
].X_op
== O_constant
6398 || slot
->opnd
[i
].X_op
== O_index
)
6399 val
= slot
->opnd
[i
].X_add_number
;
6400 else if (slot
->opnd
[i
].X_op
== O_big
)
6402 /* This must be the value 0x10000000000000000. */
6403 gas_assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6409 switch (idesc
->operands
[i
])
6411 case IA64_OPND_IMMU64
:
6412 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6413 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6414 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6415 | (((val
>> 63) & 0x1) << 36));
6418 case IA64_OPND_IMMU62
:
6419 val
&= 0x3fffffffffffffffULL
;
6420 if (val
!= slot
->opnd
[i
].X_add_number
)
6421 as_warn (_("Value truncated to 62 bits"));
6422 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6423 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6426 case IA64_OPND_TGT64
:
6428 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6429 insn
|= ((((val
>> 59) & 0x1) << 36)
6430 | (((val
>> 0) & 0xfffff) << 13));
6446 case IA64_OPND_DAHR3
:
6465 case IA64_OPND_R3_2
:
6466 case IA64_OPND_CPUID_R3
:
6467 case IA64_OPND_DBR_R3
:
6468 case IA64_OPND_DTR_R3
:
6469 case IA64_OPND_ITR_R3
:
6470 case IA64_OPND_IBR_R3
:
6472 case IA64_OPND_MSR_R3
:
6473 case IA64_OPND_PKR_R3
:
6474 case IA64_OPND_PMC_R3
:
6475 case IA64_OPND_PMD_R3
:
6476 case IA64_OPND_DAHR_R3
:
6477 case IA64_OPND_RR_R3
:
6485 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6486 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6488 as_bad_where (slot
->src_file
, slot
->src_line
,
6489 _("Bad operand value: %s"), err
);
6490 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6492 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6493 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6495 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6496 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6498 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6499 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6500 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6502 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6503 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6511 emit_one_bundle (void)
6513 int manual_bundling_off
= 0, manual_bundling
= 0;
6514 enum ia64_unit required_unit
, insn_unit
= 0;
6515 enum ia64_insn_type type
[3], insn_type
;
6516 unsigned int template_val
, orig_template
;
6517 bfd_vma insn
[3] = { -1, -1, -1 };
6518 struct ia64_opcode
*idesc
;
6519 int end_of_insn_group
= 0, user_template
= -1;
6520 int n
, i
, j
, first
, curr
, last_slot
;
6521 bfd_vma t0
= 0, t1
= 0;
6522 struct label_fix
*lfix
;
6523 bfd_boolean mark_label
;
6524 struct insn_fix
*ifix
;
6530 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6531 know (first
>= 0 && first
< NUM_SLOTS
);
6532 n
= MIN (3, md
.num_slots_in_use
);
6534 /* Determine template: user user_template if specified, best match
6537 if (md
.slot
[first
].user_template
>= 0)
6538 user_template
= template_val
= md
.slot
[first
].user_template
;
6541 /* Auto select appropriate template. */
6542 memset (type
, 0, sizeof (type
));
6544 for (i
= 0; i
< n
; ++i
)
6546 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6548 type
[i
] = md
.slot
[curr
].idesc
->type
;
6549 curr
= (curr
+ 1) % NUM_SLOTS
;
6551 template_val
= best_template
[type
[0]][type
[1]][type
[2]];
6554 /* initialize instructions with appropriate nops: */
6555 for (i
= 0; i
< 3; ++i
)
6556 insn
[i
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[i
]];
6560 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6561 from the start of the frag. */
6562 addr_mod
= frag_now_fix () & 15;
6563 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6564 as_bad (_("instruction address is not a multiple of 16"));
6565 frag_now
->insn_addr
= addr_mod
;
6566 frag_now
->has_code
= 1;
6568 /* now fill in slots with as many insns as possible: */
6570 idesc
= md
.slot
[curr
].idesc
;
6571 end_of_insn_group
= 0;
6573 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6575 /* If we have unwind records, we may need to update some now. */
6576 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6577 unw_rec_list
*end_ptr
= NULL
;
6581 /* Find the last prologue/body record in the list for the current
6582 insn, and set the slot number for all records up to that point.
6583 This needs to be done now, because prologue/body records refer to
6584 the current point, not the point after the instruction has been
6585 issued. This matters because there may have been nops emitted
6586 meanwhile. Any non-prologue non-body record followed by a
6587 prologue/body record must also refer to the current point. */
6588 unw_rec_list
*last_ptr
;
6590 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6591 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6592 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6593 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6594 || ptr
->r
.type
== body
)
6598 /* Make last_ptr point one after the last prologue/body
6600 last_ptr
= last_ptr
->next
;
6601 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6604 ptr
->slot_number
= (unsigned long) f
+ i
;
6605 ptr
->slot_frag
= frag_now
;
6607 /* Remove the initialized records, so that we won't accidentally
6608 update them again if we insert a nop and continue. */
6609 md
.slot
[curr
].unwind_record
= last_ptr
;
6613 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6614 if (md
.slot
[curr
].manual_bundling_on
)
6617 manual_bundling
= 1;
6619 break; /* Need to start a new bundle. */
6622 /* If this instruction specifies a template, then it must be the first
6623 instruction of a bundle. */
6624 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6627 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6629 if (manual_bundling
&& !manual_bundling_off
)
6631 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6632 _("`%s' must be last in bundle"), idesc
->name
);
6634 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6638 if (idesc
->flags
& IA64_OPCODE_LAST
)
6641 unsigned int required_template
;
6643 /* If we need a stop bit after an M slot, our only choice is
6644 template 5 (M;;MI). If we need a stop bit after a B
6645 slot, our only choice is to place it at the end of the
6646 bundle, because the only available templates are MIB,
6647 MBB, BBB, MMB, and MFB. We don't handle anything other
6648 than M and B slots because these are the only kind of
6649 instructions that can have the IA64_OPCODE_LAST bit set. */
6650 required_template
= template_val
;
6651 switch (idesc
->type
)
6655 required_template
= 5;
6663 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6664 _("Internal error: don't know how to force %s to end of instruction group"),
6670 && (i
> required_slot
6671 || (required_slot
== 2 && !manual_bundling_off
)
6672 || (user_template
>= 0
6673 /* Changing from MMI to M;MI is OK. */
6674 && (template_val
^ required_template
) > 1)))
6676 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6677 _("`%s' must be last in instruction group"),
6679 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6680 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6682 if (required_slot
< i
)
6683 /* Can't fit this instruction. */
6687 if (required_template
!= template_val
)
6689 /* If we switch the template, we need to reset the NOPs
6690 after slot i. The slot-types of the instructions ahead
6691 of i never change, so we don't need to worry about
6692 changing NOPs in front of this slot. */
6693 for (j
= i
; j
< 3; ++j
)
6694 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6696 /* We just picked a template that includes the stop bit in the
6697 middle, so we don't need another one emitted later. */
6698 md
.slot
[curr
].end_of_insn_group
= 0;
6700 template_val
= required_template
;
6702 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6704 if (manual_bundling
)
6706 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6707 _("Label must be first in a bundle"));
6708 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6710 /* This insn must go into the first slot of a bundle. */
6714 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6716 /* We need an instruction group boundary in the middle of a
6717 bundle. See if we can switch to an other template with
6718 an appropriate boundary. */
6720 orig_template
= template_val
;
6721 if (i
== 1 && (user_template
== 4
6722 || (user_template
< 0
6723 && (ia64_templ_desc
[template_val
].exec_unit
[0]
6727 end_of_insn_group
= 0;
6729 else if (i
== 2 && (user_template
== 0
6730 || (user_template
< 0
6731 && (ia64_templ_desc
[template_val
].exec_unit
[1]
6733 /* This test makes sure we don't switch the template if
6734 the next instruction is one that needs to be first in
6735 an instruction group. Since all those instructions are
6736 in the M group, there is no way such an instruction can
6737 fit in this bundle even if we switch the template. The
6738 reason we have to check for this is that otherwise we
6739 may end up generating "MI;;I M.." which has the deadly
6740 effect that the second M instruction is no longer the
6741 first in the group! --davidm 99/12/16 */
6742 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6745 end_of_insn_group
= 0;
6748 && user_template
== 0
6749 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6750 /* Use the next slot. */
6752 else if (curr
!= first
)
6753 /* can't fit this insn */
6756 if (template_val
!= orig_template
)
6757 /* if we switch the template, we need to reset the NOPs
6758 after slot i. The slot-types of the instructions ahead
6759 of i never change, so we don't need to worry about
6760 changing NOPs in front of this slot. */
6761 for (j
= i
; j
< 3; ++j
)
6762 insn
[j
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[j
]];
6764 required_unit
= ia64_templ_desc
[template_val
].exec_unit
[i
];
6766 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6767 if (idesc
->type
== IA64_TYPE_DYN
)
6769 enum ia64_opnd opnd1
, opnd2
;
6771 if ((strcmp (idesc
->name
, "nop") == 0)
6772 || (strcmp (idesc
->name
, "break") == 0))
6773 insn_unit
= required_unit
;
6774 else if (strcmp (idesc
->name
, "hint") == 0)
6776 insn_unit
= required_unit
;
6777 if (required_unit
== IA64_UNIT_B
)
6783 case hint_b_warning
:
6784 as_warn (_("hint in B unit may be treated as nop"));
6787 /* When manual bundling is off and there is no
6788 user template, we choose a different unit so
6789 that hint won't go into the current slot. We
6790 will fill the current bundle with nops and
6791 try to put hint into the next bundle. */
6792 if (!manual_bundling
&& user_template
< 0)
6793 insn_unit
= IA64_UNIT_I
;
6795 as_bad (_("hint in B unit can't be used"));
6800 else if (strcmp (idesc
->name
, "chk.s") == 0
6801 || strcmp (idesc
->name
, "mov") == 0)
6803 insn_unit
= IA64_UNIT_M
;
6804 if (required_unit
== IA64_UNIT_I
6805 || (required_unit
== IA64_UNIT_F
&& template_val
== 6))
6806 insn_unit
= IA64_UNIT_I
;
6809 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6811 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6812 idesc
->name
, "?imbfxx"[insn_unit
]);
6813 opnd1
= idesc
->operands
[0];
6814 opnd2
= idesc
->operands
[1];
6815 ia64_free_opcode (idesc
);
6816 idesc
= ia64_find_opcode (mnemonic
);
6817 /* moves to/from ARs have collisions */
6818 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6820 while (idesc
!= NULL
6821 && (idesc
->operands
[0] != opnd1
6822 || idesc
->operands
[1] != opnd2
))
6823 idesc
= get_next_opcode (idesc
);
6825 md
.slot
[curr
].idesc
= idesc
;
6829 insn_type
= idesc
->type
;
6830 insn_unit
= IA64_UNIT_NIL
;
6834 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6835 insn_unit
= required_unit
;
6837 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6838 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6839 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6840 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6841 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6846 if (insn_unit
!= required_unit
)
6847 continue; /* Try next slot. */
6849 /* Now is a good time to fix up the labels for this insn. */
6851 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6853 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6854 symbol_set_frag (lfix
->sym
, frag_now
);
6855 mark_label
|= lfix
->dw2_mark_labels
;
6857 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6859 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6860 symbol_set_frag (lfix
->sym
, frag_now
);
6863 if (debug_type
== DEBUG_DWARF2
6864 || md
.slot
[curr
].loc_directive_seen
6867 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6869 md
.slot
[curr
].loc_directive_seen
= 0;
6871 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
6873 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6876 build_insn (md
.slot
+ curr
, insn
+ i
);
6878 ptr
= md
.slot
[curr
].unwind_record
;
6881 /* Set slot numbers for all remaining unwind records belonging to the
6882 current insn. There can not be any prologue/body unwind records
6884 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6886 ptr
->slot_number
= (unsigned long) f
+ i
;
6887 ptr
->slot_frag
= frag_now
;
6889 md
.slot
[curr
].unwind_record
= NULL
;
6892 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6894 ifix
= md
.slot
[curr
].fixup
+ j
;
6895 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6896 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6897 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6898 fix
->fx_file
= md
.slot
[curr
].src_file
;
6899 fix
->fx_line
= md
.slot
[curr
].src_line
;
6902 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6904 /* This adjustment to "i" must occur after the fix, otherwise the fix
6905 is assigned to the wrong slot, and the VMS linker complains. */
6906 if (required_unit
== IA64_UNIT_L
)
6909 /* skip one slot for long/X-unit instructions */
6912 --md
.num_slots_in_use
;
6916 ia64_free_opcode (md
.slot
[curr
].idesc
);
6917 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6918 md
.slot
[curr
].user_template
= -1;
6920 if (manual_bundling_off
)
6922 manual_bundling
= 0;
6925 curr
= (curr
+ 1) % NUM_SLOTS
;
6926 idesc
= md
.slot
[curr
].idesc
;
6929 /* A user template was specified, but the first following instruction did
6930 not fit. This can happen with or without manual bundling. */
6931 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
6933 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6934 _("`%s' does not fit into %s template"),
6935 idesc
->name
, ia64_templ_desc
[template_val
].name
);
6936 /* Drop first insn so we don't livelock. */
6937 --md
.num_slots_in_use
;
6938 know (curr
== first
);
6939 ia64_free_opcode (md
.slot
[curr
].idesc
);
6940 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6941 md
.slot
[curr
].user_template
= -1;
6943 else if (manual_bundling
> 0)
6945 if (md
.num_slots_in_use
> 0)
6948 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6949 _("`%s' does not fit into bundle"), idesc
->name
);
6954 if (template_val
== 2)
6956 else if (last_slot
== 0)
6957 where
= "slots 2 or 3";
6960 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6961 _("`%s' can't go in %s of %s template"),
6962 idesc
->name
, where
, ia64_templ_desc
[template_val
].name
);
6966 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6967 _("Missing '}' at end of file"));
6970 know (md
.num_slots_in_use
< NUM_SLOTS
);
6972 t0
= end_of_insn_group
| (template_val
<< 1) | (insn
[0] << 5) | (insn
[1] << 46);
6973 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6975 number_to_chars_littleendian (f
+ 0, t0
, 8);
6976 number_to_chars_littleendian (f
+ 8, t1
, 8);
6980 md_parse_option (int c
, const char *arg
)
6985 /* Switches from the Intel assembler. */
6987 if (strcmp (arg
, "ilp64") == 0
6988 || strcmp (arg
, "lp64") == 0
6989 || strcmp (arg
, "p64") == 0)
6991 md
.flags
|= EF_IA_64_ABI64
;
6993 else if (strcmp (arg
, "ilp32") == 0)
6995 md
.flags
&= ~EF_IA_64_ABI64
;
6997 else if (strcmp (arg
, "le") == 0)
6999 md
.flags
&= ~EF_IA_64_BE
;
7000 default_big_endian
= 0;
7002 else if (strcmp (arg
, "be") == 0)
7004 md
.flags
|= EF_IA_64_BE
;
7005 default_big_endian
= 1;
7007 else if (strncmp (arg
, "unwind-check=", 13) == 0)
7010 if (strcmp (arg
, "warning") == 0)
7011 md
.unwind_check
= unwind_check_warning
;
7012 else if (strcmp (arg
, "error") == 0)
7013 md
.unwind_check
= unwind_check_error
;
7017 else if (strncmp (arg
, "hint.b=", 7) == 0)
7020 if (strcmp (arg
, "ok") == 0)
7021 md
.hint_b
= hint_b_ok
;
7022 else if (strcmp (arg
, "warning") == 0)
7023 md
.hint_b
= hint_b_warning
;
7024 else if (strcmp (arg
, "error") == 0)
7025 md
.hint_b
= hint_b_error
;
7029 else if (strncmp (arg
, "tune=", 5) == 0)
7032 if (strcmp (arg
, "itanium1") == 0)
7034 else if (strcmp (arg
, "itanium2") == 0)
7044 if (strcmp (arg
, "so") == 0)
7046 /* Suppress signon message. */
7048 else if (strcmp (arg
, "pi") == 0)
7050 /* Reject privileged instructions. FIXME */
7052 else if (strcmp (arg
, "us") == 0)
7054 /* Allow union of signed and unsigned range. FIXME */
7056 else if (strcmp (arg
, "close_fcalls") == 0)
7058 /* Do not resolve global function calls. */
7065 /* temp[="prefix"] Insert temporary labels into the object file
7066 symbol table prefixed by "prefix".
7067 Default prefix is ":temp:".
7072 /* indirect=<tgt> Assume unannotated indirect branches behavior
7073 according to <tgt> --
7074 exit: branch out from the current context (default)
7075 labels: all labels in context may be branch targets
7077 if (strncmp (arg
, "indirect=", 9) != 0)
7082 /* -X conflicts with an ignored option, use -x instead */
7084 if (!arg
|| strcmp (arg
, "explicit") == 0)
7086 /* set default mode to explicit */
7087 md
.default_explicit_mode
= 1;
7090 else if (strcmp (arg
, "auto") == 0)
7092 md
.default_explicit_mode
= 0;
7094 else if (strcmp (arg
, "none") == 0)
7098 else if (strcmp (arg
, "debug") == 0)
7102 else if (strcmp (arg
, "debugx") == 0)
7104 md
.default_explicit_mode
= 1;
7107 else if (strcmp (arg
, "debugn") == 0)
7114 as_bad (_("Unrecognized option '-x%s'"), arg
);
7119 /* nops Print nops statistics. */
7122 /* GNU specific switches for gcc. */
7123 case OPTION_MCONSTANT_GP
:
7124 md
.flags
|= EF_IA_64_CONS_GP
;
7127 case OPTION_MAUTO_PIC
:
7128 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7139 md_show_usage (FILE *stream
)
7143 --mconstant-gp mark output file as using the constant-GP model\n\
7144 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7145 --mauto-pic mark output file as using the constant-GP model\n\
7146 without function descriptors (sets ELF header flag\n\
7147 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7148 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7149 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7150 -mtune=[itanium1|itanium2]\n\
7151 tune for a specific CPU (default -mtune=itanium2)\n\
7152 -munwind-check=[warning|error]\n\
7153 unwind directive check (default -munwind-check=warning)\n\
7154 -mhint.b=[ok|warning|error]\n\
7155 hint.b check (default -mhint.b=error)\n\
7156 -x | -xexplicit turn on dependency violation checking\n"), stream
);
7157 /* Note for translators: "automagically" can be translated as "automatically" here. */
7159 -xauto automagically remove dependency violations (default)\n\
7160 -xnone turn off dependency violation checking\n\
7161 -xdebug debug dependency violation checker\n\
7162 -xdebugn debug dependency violation checker but turn off\n\
7163 dependency violation checking\n\
7164 -xdebugx debug dependency violation checker and turn on\n\
7165 dependency violation checking\n"),
7170 ia64_after_parse_args (void)
7172 if (debug_type
== DEBUG_STABS
)
7173 as_fatal (_("--gstabs is not supported for ia64"));
7176 /* Return true if TYPE fits in TEMPL at SLOT. */
7179 match (int templ
, int type
, int slot
)
7181 enum ia64_unit unit
;
7184 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7187 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7189 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7191 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7192 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7193 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7194 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7195 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7196 default: result
= 0; break;
7201 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7202 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7203 type M or I would fit in TEMPL at SLOT. */
7206 extra_goodness (int templ
, int slot
)
7211 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7213 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7219 if (match (templ
, IA64_TYPE_M
, slot
)
7220 || match (templ
, IA64_TYPE_I
, slot
))
7221 /* Favor M- and I-unit NOPs. We definitely want to avoid
7222 F-unit and B-unit may cause split-issue or less-than-optimal
7223 branch-prediction. */
7234 /* This function is called once, at assembler startup time. It sets
7235 up all the tables, etc. that the MD part of the assembler will need
7236 that can be determined before arguments are parsed. */
7240 int i
, j
, k
, t
, goodness
, best
, ok
;
7243 md
.explicit_mode
= md
.default_explicit_mode
;
7245 bfd_set_section_alignment (text_section
, 4);
7247 /* Make sure function pointers get initialized. */
7248 target_big_endian
= -1;
7249 dot_byteorder (default_big_endian
);
7251 alias_hash
= str_htab_create ();
7252 alias_name_hash
= str_htab_create ();
7253 secalias_hash
= str_htab_create ();
7254 secalias_name_hash
= str_htab_create ();
7256 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7257 symbol_new (".<dtpmod>", undefined_section
,
7258 &zero_address_frag
, FUNC_DTP_MODULE
);
7260 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7261 symbol_new (".<dtprel>", undefined_section
,
7262 &zero_address_frag
, FUNC_DTP_RELATIVE
);
7264 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7265 symbol_new (".<fptr>", undefined_section
,
7266 &zero_address_frag
, FUNC_FPTR_RELATIVE
);
7268 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7269 symbol_new (".<gprel>", undefined_section
,
7270 &zero_address_frag
, FUNC_GP_RELATIVE
);
7272 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7273 symbol_new (".<ltoff>", undefined_section
,
7274 &zero_address_frag
, FUNC_LT_RELATIVE
);
7276 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7277 symbol_new (".<ltoffx>", undefined_section
,
7278 &zero_address_frag
, FUNC_LT_RELATIVE_X
);
7280 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7281 symbol_new (".<pcrel>", undefined_section
,
7282 &zero_address_frag
, FUNC_PC_RELATIVE
);
7284 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7285 symbol_new (".<pltoff>", undefined_section
,
7286 &zero_address_frag
, FUNC_PLT_RELATIVE
);
7288 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7289 symbol_new (".<secrel>", undefined_section
,
7290 &zero_address_frag
, FUNC_SEC_RELATIVE
);
7292 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7293 symbol_new (".<segrel>", undefined_section
,
7294 &zero_address_frag
, FUNC_SEG_RELATIVE
);
7296 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7297 symbol_new (".<tprel>", undefined_section
,
7298 &zero_address_frag
, FUNC_TP_RELATIVE
);
7300 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7301 symbol_new (".<ltv>", undefined_section
,
7302 &zero_address_frag
, FUNC_LTV_RELATIVE
);
7304 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7305 symbol_new (".<ltoff.fptr>", undefined_section
,
7306 &zero_address_frag
, FUNC_LT_FPTR_RELATIVE
);
7308 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7309 symbol_new (".<ltoff.dtpmod>", undefined_section
,
7310 &zero_address_frag
, FUNC_LT_DTP_MODULE
);
7312 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7313 symbol_new (".<ltoff.dptrel>", undefined_section
,
7314 &zero_address_frag
, FUNC_LT_DTP_RELATIVE
);
7316 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7317 symbol_new (".<ltoff.tprel>", undefined_section
,
7318 &zero_address_frag
, FUNC_LT_TP_RELATIVE
);
7320 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7321 symbol_new (".<iplt>", undefined_section
,
7322 &zero_address_frag
, FUNC_IPLT_RELOC
);
7325 pseudo_func
[FUNC_SLOTCOUNT_RELOC
].u
.sym
=
7326 symbol_new (".<slotcount>", undefined_section
,
7327 &zero_address_frag
, FUNC_SLOTCOUNT_RELOC
);
7330 if (md
.tune
!= itanium1
)
7332 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7334 le_nop_stop
[0] = 0x9;
7337 /* Compute the table of best templates. We compute goodness as a
7338 base 4 value, in which each match counts for 3. Match-failures
7339 result in NOPs and we use extra_goodness() to pick the execution
7340 units that are best suited for issuing the NOP. */
7341 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7342 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7343 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7346 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7349 if (match (t
, i
, 0))
7351 if (match (t
, j
, 1))
7353 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7354 goodness
= 3 + 3 + 3;
7356 goodness
= 3 + 3 + extra_goodness (t
, 2);
7358 else if (match (t
, j
, 2))
7359 goodness
= 3 + 3 + extra_goodness (t
, 1);
7363 goodness
+= extra_goodness (t
, 1);
7364 goodness
+= extra_goodness (t
, 2);
7367 else if (match (t
, i
, 1))
7369 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7372 goodness
= 3 + extra_goodness (t
, 2);
7374 else if (match (t
, i
, 2))
7375 goodness
= 3 + extra_goodness (t
, 1);
7377 if (goodness
> best
)
7380 best_template
[i
][j
][k
] = t
;
7385 #ifdef DEBUG_TEMPLATES
7386 /* For debugging changes to the best_template calculations. We don't care
7387 about combinations with invalid instructions, so start the loops at 1. */
7388 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7389 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7390 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7392 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7394 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7396 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7400 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7401 md
.slot
[i
].user_template
= -1;
7403 md
.pseudo_hash
= str_htab_create ();
7404 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7405 if (str_hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7406 pseudo_opcode
+ i
, 0) != NULL
)
7407 as_fatal (_("duplicate %s"), pseudo_opcode
[i
].name
);
7409 md
.reg_hash
= str_htab_create ();
7410 md
.dynreg_hash
= str_htab_create ();
7411 md
.const_hash
= str_htab_create ();
7412 md
.entry_hash
= str_htab_create ();
7414 /* general registers: */
7415 declare_register_set ("r", 128, REG_GR
);
7416 declare_register ("gp", REG_GR
+ 1);
7417 declare_register ("sp", REG_GR
+ 12);
7418 declare_register ("tp", REG_GR
+ 13);
7419 declare_register_set ("ret", 4, REG_GR
+ 8);
7421 /* floating point registers: */
7422 declare_register_set ("f", 128, REG_FR
);
7423 declare_register_set ("farg", 8, REG_FR
+ 8);
7424 declare_register_set ("fret", 8, REG_FR
+ 8);
7426 /* branch registers: */
7427 declare_register_set ("b", 8, REG_BR
);
7428 declare_register ("rp", REG_BR
+ 0);
7430 /* predicate registers: */
7431 declare_register_set ("p", 64, REG_P
);
7432 declare_register ("pr", REG_PR
);
7433 declare_register ("pr.rot", REG_PR_ROT
);
7435 /* application registers: */
7436 declare_register_set ("ar", 128, REG_AR
);
7437 for (i
= 0; i
< NELEMS (ar
); ++i
)
7438 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7440 /* control registers: */
7441 declare_register_set ("cr", 128, REG_CR
);
7442 for (i
= 0; i
< NELEMS (cr
); ++i
)
7443 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7445 /* dahr registers: */
7446 declare_register_set ("dahr", 8, REG_DAHR
);
7448 declare_register ("ip", REG_IP
);
7449 declare_register ("cfm", REG_CFM
);
7450 declare_register ("psr", REG_PSR
);
7451 declare_register ("psr.l", REG_PSR_L
);
7452 declare_register ("psr.um", REG_PSR_UM
);
7454 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7456 unsigned int regnum
= indirect_reg
[i
].regnum
;
7458 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7461 /* pseudo-registers used to specify unwind info: */
7462 declare_register ("psp", REG_PSP
);
7464 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7465 if (str_hash_insert (md
.const_hash
, const_bits
[i
].name
, const_bits
+ i
, 0))
7466 as_fatal (_("duplicate %s"), const_bits
[i
].name
);
7468 /* Set the architecture and machine depending on defaults and command line
7470 if (md
.flags
& EF_IA_64_ABI64
)
7471 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7473 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7476 as_warn (_("Could not set architecture and machine"));
7478 /* Set the pointer size and pointer shift size depending on md.flags */
7480 if (md
.flags
& EF_IA_64_ABI64
)
7482 md
.pointer_size
= 8; /* pointers are 8 bytes */
7483 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7487 md
.pointer_size
= 4; /* pointers are 4 bytes */
7488 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7491 md
.mem_offset
.hint
= 0;
7494 md
.entry_labels
= NULL
;
7497 /* Set the default options in md. Cannot do this in md_begin because
7498 that is called after md_parse_option which is where we set the
7499 options in md based on command line options. */
7502 ia64_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
7504 md
.flags
= MD_FLAGS_DEFAULT
;
7506 /* Don't turn on dependency checking for VMS, doesn't work. */
7509 /* FIXME: We should change it to unwind_check_error someday. */
7510 md
.unwind_check
= unwind_check_warning
;
7511 md
.hint_b
= hint_b_error
;
7515 /* Return a string for the target object file format. */
7518 ia64_target_format (void)
7520 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7522 if (md
.flags
& EF_IA_64_BE
)
7524 if (md
.flags
& EF_IA_64_ABI64
)
7525 #if defined(TE_AIX50)
7526 return "elf64-ia64-aix-big";
7527 #elif defined(TE_HPUX)
7528 return "elf64-ia64-hpux-big";
7530 return "elf64-ia64-big";
7533 #if defined(TE_AIX50)
7534 return "elf32-ia64-aix-big";
7535 #elif defined(TE_HPUX)
7536 return "elf32-ia64-hpux-big";
7538 return "elf32-ia64-big";
7543 if (md
.flags
& EF_IA_64_ABI64
)
7544 #if defined (TE_AIX50)
7545 return "elf64-ia64-aix-little";
7546 #elif defined (TE_VMS)
7548 md
.flags
|= EF_IA_64_ARCHVER_1
;
7549 return "elf64-ia64-vms";
7552 return "elf64-ia64-little";
7556 return "elf32-ia64-aix-little";
7558 return "elf32-ia64-little";
7563 return "unknown-format";
7567 ia64_end_of_source (void)
7569 /* terminate insn group upon reaching end of file: */
7570 insn_group_break (1, 0, 0);
7572 /* emits slots we haven't written yet: */
7573 ia64_flush_insns ();
7575 bfd_set_private_flags (stdoutput
, md
.flags
);
7577 md
.mem_offset
.hint
= 0;
7581 ia64_start_line (void)
7586 /* Make sure we don't reference input_line_pointer[-1] when that's
7592 if (md
.qp
.X_op
== O_register
)
7593 as_bad (_("qualifying predicate not followed by instruction"));
7594 md
.qp
.X_op
= O_absent
;
7596 if (ignore_input ())
7599 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7601 if (md
.detect_dv
&& !md
.explicit_mode
)
7608 as_warn (_("Explicit stops are ignored in auto mode"));
7612 insn_group_break (1, 0, 0);
7614 else if (input_line_pointer
[-1] == '{')
7616 if (md
.manual_bundling
)
7617 as_warn (_("Found '{' when manual bundling is already turned on"));
7619 CURR_SLOT
.manual_bundling_on
= 1;
7620 md
.manual_bundling
= 1;
7622 /* Bundling is only acceptable in explicit mode
7623 or when in default automatic mode. */
7624 if (md
.detect_dv
&& !md
.explicit_mode
)
7626 if (!md
.mode_explicitly_set
7627 && !md
.default_explicit_mode
)
7630 as_warn (_("Found '{' after explicit switch to automatic mode"));
7633 else if (input_line_pointer
[-1] == '}')
7635 if (!md
.manual_bundling
)
7636 as_warn (_("Found '}' when manual bundling is off"));
7638 PREV_SLOT
.manual_bundling_off
= 1;
7639 md
.manual_bundling
= 0;
7641 /* switch back to automatic mode, if applicable */
7644 && !md
.mode_explicitly_set
7645 && !md
.default_explicit_mode
)
7650 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7652 static int defining_tag
= 0;
7655 ia64_unrecognized_line (int ch
)
7660 expression_and_evaluate (&md
.qp
);
7661 if (*input_line_pointer
++ != ')')
7663 as_bad (_("Expected ')'"));
7666 if (md
.qp
.X_op
!= O_register
)
7668 as_bad (_("Qualifying predicate expected"));
7671 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7673 as_bad (_("Predicate register expected"));
7685 if (md
.qp
.X_op
== O_register
)
7687 as_bad (_("Tag must come before qualifying predicate."));
7691 /* This implements just enough of read_a_source_file in read.c to
7692 recognize labels. */
7693 if (is_name_beginner (*input_line_pointer
))
7695 c
= get_symbol_name (&s
);
7697 else if (LOCAL_LABELS_FB
7698 && ISDIGIT (*input_line_pointer
))
7701 while (ISDIGIT (*input_line_pointer
))
7702 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7703 fb_label_instance_inc (temp
);
7704 s
= fb_label_name (temp
, 0);
7705 c
= *input_line_pointer
;
7714 /* Put ':' back for error messages' sake. */
7715 *input_line_pointer
++ = ':';
7716 as_bad (_("Expected ':'"));
7723 /* Put ':' back for error messages' sake. */
7724 *input_line_pointer
++ = ':';
7725 if (*input_line_pointer
++ != ']')
7727 as_bad (_("Expected ']'"));
7732 as_bad (_("Tag name expected"));
7742 /* Not a valid line. */
7747 ia64_frob_label (struct symbol
*sym
)
7749 struct label_fix
*fix
;
7751 /* Tags need special handling since they are not bundle breaks like
7755 fix
= XOBNEW (¬es
, struct label_fix
);
7757 fix
->next
= CURR_SLOT
.tag_fixups
;
7758 fix
->dw2_mark_labels
= FALSE
;
7759 CURR_SLOT
.tag_fixups
= fix
;
7764 if (bfd_section_flags (now_seg
) & SEC_CODE
)
7766 md
.last_text_seg
= now_seg
;
7767 fix
= XOBNEW (¬es
, struct label_fix
);
7769 fix
->next
= CURR_SLOT
.label_fixups
;
7770 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7771 CURR_SLOT
.label_fixups
= fix
;
7773 /* Keep track of how many code entry points we've seen. */
7774 if (md
.path
== md
.maxpaths
)
7777 md
.entry_labels
= XRESIZEVEC (const char *, md
.entry_labels
,
7780 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7785 /* The HP-UX linker will give unresolved symbol errors for symbols
7786 that are declared but unused. This routine removes declared,
7787 unused symbols from an object. */
7789 ia64_frob_symbol (struct symbol
*sym
)
7791 if ((S_GET_SEGMENT (sym
) == bfd_und_section_ptr
&& ! symbol_used_p (sym
) &&
7792 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7793 || (S_GET_SEGMENT (sym
) == bfd_abs_section_ptr
7794 && ! S_IS_EXTERNAL (sym
)))
7801 ia64_flush_pending_output (void)
7803 if (!md
.keep_pending_output
7804 && bfd_section_flags (now_seg
) & SEC_CODE
)
7806 /* ??? This causes many unnecessary stop bits to be emitted.
7807 Unfortunately, it isn't clear if it is safe to remove this. */
7808 insn_group_break (1, 0, 0);
7809 ia64_flush_insns ();
7813 /* Do ia64-specific expression optimization. All that's done here is
7814 to transform index expressions that are either due to the indexing
7815 of rotating registers or due to the indexing of indirect register
7818 ia64_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
7822 resolve_expression (l
);
7823 if (l
->X_op
== O_register
)
7825 unsigned num_regs
= l
->X_add_number
>> 16;
7827 resolve_expression (r
);
7830 /* Left side is a .rotX-allocated register. */
7831 if (r
->X_op
!= O_constant
)
7833 as_bad (_("Rotating register index must be a non-negative constant"));
7834 r
->X_add_number
= 0;
7836 else if ((valueT
) r
->X_add_number
>= num_regs
)
7838 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
7839 r
->X_add_number
= 0;
7841 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7844 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
7846 if (r
->X_op
!= O_register
7847 || r
->X_add_number
< REG_GR
7848 || r
->X_add_number
> REG_GR
+ 127)
7850 as_bad (_("Indirect register index must be a general register"));
7851 r
->X_add_number
= REG_GR
;
7854 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
7855 l
->X_add_number
= r
->X_add_number
;
7859 as_bad (_("Index can only be applied to rotating or indirect registers"));
7860 /* Fall back to some register use of which has as little as possible
7861 side effects, to minimize subsequent error messages. */
7862 l
->X_op
= O_register
;
7863 l
->X_add_number
= REG_GR
+ 3;
7868 ia64_parse_name (char *name
, expressionS
*e
, char *nextcharP
)
7870 struct const_desc
*cdesc
;
7871 struct dynreg
*dr
= 0;
7878 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7880 /* Find what relocation pseudo-function we're dealing with. */
7881 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7882 if (pseudo_func
[idx
].name
7883 && pseudo_func
[idx
].name
[0] == name
[1]
7884 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7886 pseudo_type
= pseudo_func
[idx
].type
;
7889 switch (pseudo_type
)
7891 case PSEUDO_FUNC_RELOC
:
7892 end
= input_line_pointer
;
7893 if (*nextcharP
!= '(')
7895 as_bad (_("Expected '('"));
7899 ++input_line_pointer
;
7901 if (*input_line_pointer
!= ')')
7903 as_bad (_("Missing ')'"));
7907 ++input_line_pointer
;
7909 if (idx
== FUNC_SLOTCOUNT_RELOC
)
7911 /* @slotcount can accept any expression. Canonicalize. */
7912 e
->X_add_symbol
= make_expr_symbol (e
);
7914 e
->X_add_number
= 0;
7917 if (e
->X_op
!= O_symbol
)
7919 if (e
->X_op
!= O_pseudo_fixup
)
7921 as_bad (_("Not a symbolic expression"));
7924 if (idx
!= FUNC_LT_RELATIVE
)
7926 as_bad (_("Illegal combination of relocation functions"));
7929 switch (S_GET_VALUE (e
->X_op_symbol
))
7931 case FUNC_FPTR_RELATIVE
:
7932 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7933 case FUNC_DTP_MODULE
:
7934 idx
= FUNC_LT_DTP_MODULE
; break;
7935 case FUNC_DTP_RELATIVE
:
7936 idx
= FUNC_LT_DTP_RELATIVE
; break;
7937 case FUNC_TP_RELATIVE
:
7938 idx
= FUNC_LT_TP_RELATIVE
; break;
7940 as_bad (_("Illegal combination of relocation functions"));
7944 /* Make sure gas doesn't get rid of local symbols that are used
7946 e
->X_op
= O_pseudo_fixup
;
7947 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7949 *nextcharP
= *input_line_pointer
;
7952 case PSEUDO_FUNC_CONST
:
7953 e
->X_op
= O_constant
;
7954 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7957 case PSEUDO_FUNC_REG
:
7958 e
->X_op
= O_register
;
7959 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7968 /* first see if NAME is a known register name: */
7969 sym
= str_hash_find (md
.reg_hash
, name
);
7972 e
->X_op
= O_register
;
7973 e
->X_add_number
= S_GET_VALUE (sym
);
7977 cdesc
= str_hash_find (md
.const_hash
, name
);
7980 e
->X_op
= O_constant
;
7981 e
->X_add_number
= cdesc
->value
;
7985 /* check for inN, locN, or outN: */
7990 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7998 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8006 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8017 /* Ignore register numbers with leading zeroes, except zero itself. */
8018 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8020 unsigned long regnum
;
8022 /* The name is inN, locN, or outN; parse the register number. */
8023 regnum
= strtoul (name
+ idx
, &end
, 10);
8024 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8026 if (regnum
>= dr
->num_regs
)
8029 as_bad (_("No current frame"));
8031 as_bad (_("Register number out of range 0..%u"),
8035 e
->X_op
= O_register
;
8036 e
->X_add_number
= dr
->base
+ regnum
;
8041 end
= xstrdup (name
);
8042 name
= ia64_canonicalize_symbol_name (end
);
8043 if ((dr
= str_hash_find (md
.dynreg_hash
, name
)))
8045 /* We've got ourselves the name of a rotating register set.
8046 Store the base register number in the low 16 bits of
8047 X_add_number and the size of the register set in the top 16
8049 e
->X_op
= O_register
;
8050 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8058 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8061 ia64_canonicalize_symbol_name (char *name
)
8063 size_t len
= strlen (name
), full
= len
;
8065 while (len
> 0 && name
[len
- 1] == '#')
8070 as_bad (_("Standalone `#' is illegal"));
8072 else if (len
< full
- 1)
8073 as_warn (_("Redundant `#' suffix operators"));
8078 /* Return true if idesc is a conditional branch instruction. This excludes
8079 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8080 because they always read/write resources regardless of the value of the
8081 qualifying predicate. br.ia must always use p0, and hence is always
8082 taken. Thus this function returns true for branches which can fall
8083 through, and which use no resources if they do fall through. */
8086 is_conditional_branch (struct ia64_opcode
*idesc
)
8088 /* br is a conditional branch. Everything that starts with br. except
8089 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8090 Everything that starts with brl is a conditional branch. */
8091 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8092 && (idesc
->name
[2] == '\0'
8093 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8094 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8095 || idesc
->name
[2] == 'l'
8096 /* br.cond, br.call, br.clr */
8097 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8098 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8099 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8102 /* Return whether the given opcode is a taken branch. If there's any doubt,
8106 is_taken_branch (struct ia64_opcode
*idesc
)
8108 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8109 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8112 /* Return whether the given opcode is an interruption or rfi. If there's any
8113 doubt, returns zero. */
8116 is_interruption_or_rfi (struct ia64_opcode
*idesc
)
8118 if (strcmp (idesc
->name
, "rfi") == 0)
8123 /* Returns the index of the given dependency in the opcode's list of chks, or
8124 -1 if there is no dependency. */
8127 depends_on (int depind
, struct ia64_opcode
*idesc
)
8130 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8131 for (i
= 0; i
< dep
->nchks
; i
++)
8133 if (depind
== DEP (dep
->chks
[i
]))
8139 /* Determine a set of specific resources used for a particular resource
8140 class. Returns the number of specific resources identified For those
8141 cases which are not determinable statically, the resource returned is
8144 Meanings of value in 'NOTE':
8145 1) only read/write when the register number is explicitly encoded in the
8147 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8148 accesses CFM when qualifying predicate is in the rotating region.
8149 3) general register value is used to specify an indirect register; not
8150 determinable statically.
8151 4) only read the given resource when bits 7:0 of the indirect index
8152 register value does not match the register number of the resource; not
8153 determinable statically.
8154 5) all rules are implementation specific.
8155 6) only when both the index specified by the reader and the index specified
8156 by the writer have the same value in bits 63:61; not determinable
8158 7) only access the specified resource when the corresponding mask bit is
8160 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8161 only read when these insns reference FR2-31
8162 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8163 written when these insns write FR32-127
8164 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8166 11) The target predicates are written independently of PR[qp], but source
8167 registers are only read if PR[qp] is true. Since the state of PR[qp]
8168 cannot statically be determined, all source registers are marked used.
8169 12) This insn only reads the specified predicate register when that
8170 register is the PR[qp].
8171 13) This reference to ld-c only applies to the GR whose value is loaded
8172 with data returned from memory, not the post-incremented address register.
8173 14) The RSE resource includes the implementation-specific RSE internal
8174 state resources. At least one (and possibly more) of these resources are
8175 read by each instruction listed in IC:rse-readers. At least one (and
8176 possibly more) of these resources are written by each insn listed in
8178 15+16) Represents reserved instructions, which the assembler does not
8180 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8181 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8183 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8184 this code; there are no dependency violations based on memory access.
8187 #define MAX_SPECS 256
8192 specify_resource (const struct ia64_dependency
*dep
,
8193 struct ia64_opcode
*idesc
,
8194 /* is this a DV chk or a DV reg? */
8196 /* returned specific resources */
8197 struct rsrc specs
[MAX_SPECS
],
8198 /* resource note for this insn's usage */
8200 /* which execution path to examine */
8208 if (dep
->mode
== IA64_DV_WAW
8209 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8210 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8213 /* template for any resources we identify */
8214 tmpl
.dependency
= dep
;
8216 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8217 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8218 tmpl
.link_to_qp_branch
= 1;
8219 tmpl
.mem_offset
.hint
= 0;
8220 tmpl
.mem_offset
.offset
= 0;
8221 tmpl
.mem_offset
.base
= 0;
8224 tmpl
.cmp_type
= CMP_NONE
;
8231 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8232 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8233 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8235 /* we don't need to track these */
8236 if (dep
->semantics
== IA64_DVS_NONE
)
8239 switch (dep
->specifier
)
8244 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8246 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8247 if (regno
>= 0 && regno
<= 7)
8249 specs
[count
] = tmpl
;
8250 specs
[count
++].index
= regno
;
8256 for (i
= 0; i
< 8; i
++)
8258 specs
[count
] = tmpl
;
8259 specs
[count
++].index
= i
;
8268 case IA64_RS_AR_UNAT
:
8269 /* This is a mov =AR or mov AR= instruction. */
8270 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8272 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8273 if (regno
== AR_UNAT
)
8275 specs
[count
++] = tmpl
;
8280 /* This is a spill/fill, or other instruction that modifies the
8283 /* Unless we can determine the specific bits used, mark the whole
8284 thing; bits 8:3 of the memory address indicate the bit used in
8285 UNAT. The .mem.offset hint may be used to eliminate a small
8286 subset of conflicts. */
8287 specs
[count
] = tmpl
;
8288 if (md
.mem_offset
.hint
)
8291 fprintf (stderr
, " Using hint for spill/fill\n");
8292 /* The index isn't actually used, just set it to something
8293 approximating the bit index. */
8294 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8295 specs
[count
].mem_offset
.hint
= 1;
8296 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8297 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8301 specs
[count
++].specific
= 0;
8309 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8311 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8312 if ((regno
>= 8 && regno
<= 15)
8313 || (regno
>= 20 && regno
<= 23)
8314 || (regno
>= 31 && regno
<= 39)
8315 || (regno
>= 41 && regno
<= 47)
8316 || (regno
>= 67 && regno
<= 111))
8318 specs
[count
] = tmpl
;
8319 specs
[count
++].index
= regno
;
8332 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8334 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8335 if ((regno
>= 48 && regno
<= 63)
8336 || (regno
>= 112 && regno
<= 127))
8338 specs
[count
] = tmpl
;
8339 specs
[count
++].index
= regno
;
8345 for (i
= 48; i
< 64; i
++)
8347 specs
[count
] = tmpl
;
8348 specs
[count
++].index
= i
;
8350 for (i
= 112; i
< 128; i
++)
8352 specs
[count
] = tmpl
;
8353 specs
[count
++].index
= i
;
8371 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8372 if (idesc
->operands
[i
] == IA64_OPND_B1
8373 || idesc
->operands
[i
] == IA64_OPND_B2
)
8375 specs
[count
] = tmpl
;
8376 specs
[count
++].index
=
8377 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8382 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8383 if (idesc
->operands
[i
] == IA64_OPND_B1
8384 || idesc
->operands
[i
] == IA64_OPND_B2
)
8386 specs
[count
] = tmpl
;
8387 specs
[count
++].index
=
8388 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8394 case IA64_RS_CPUID
: /* four or more registers */
8397 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8399 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8400 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8403 specs
[count
] = tmpl
;
8404 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8408 specs
[count
] = tmpl
;
8409 specs
[count
++].specific
= 0;
8419 case IA64_RS_DBR
: /* four or more registers */
8422 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8424 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8425 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8428 specs
[count
] = tmpl
;
8429 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8433 specs
[count
] = tmpl
;
8434 specs
[count
++].specific
= 0;
8438 else if (note
== 0 && !rsrc_write
)
8440 specs
[count
] = tmpl
;
8441 specs
[count
++].specific
= 0;
8449 case IA64_RS_IBR
: /* four or more registers */
8452 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8454 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8455 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8458 specs
[count
] = tmpl
;
8459 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8463 specs
[count
] = tmpl
;
8464 specs
[count
++].specific
= 0;
8477 /* These are implementation specific. Force all references to
8478 conflict with all other references. */
8479 specs
[count
] = tmpl
;
8480 specs
[count
++].specific
= 0;
8488 case IA64_RS_PKR
: /* 16 or more registers */
8489 if (note
== 3 || note
== 4)
8491 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8493 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8494 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8499 specs
[count
] = tmpl
;
8500 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8503 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8505 /* Uses all registers *except* the one in R3. */
8506 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8508 specs
[count
] = tmpl
;
8509 specs
[count
++].index
= i
;
8515 specs
[count
] = tmpl
;
8516 specs
[count
++].specific
= 0;
8523 specs
[count
] = tmpl
;
8524 specs
[count
++].specific
= 0;
8528 case IA64_RS_PMC
: /* four or more registers */
8531 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8532 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8535 int reg_index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8537 int regno
= CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_GR
;
8538 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8541 specs
[count
] = tmpl
;
8542 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8546 specs
[count
] = tmpl
;
8547 specs
[count
++].specific
= 0;
8557 case IA64_RS_PMD
: /* four or more registers */
8560 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8562 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8563 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8566 specs
[count
] = tmpl
;
8567 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8571 specs
[count
] = tmpl
;
8572 specs
[count
++].specific
= 0;
8582 case IA64_RS_RR
: /* eight registers */
8585 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8587 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8588 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8591 specs
[count
] = tmpl
;
8592 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8596 specs
[count
] = tmpl
;
8597 specs
[count
++].specific
= 0;
8601 else if (note
== 0 && !rsrc_write
)
8603 specs
[count
] = tmpl
;
8604 specs
[count
++].specific
= 0;
8612 case IA64_RS_CR_IRR
:
8615 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8616 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8618 && idesc
->operands
[1] == IA64_OPND_CR3
8621 for (i
= 0; i
< 4; i
++)
8623 specs
[count
] = tmpl
;
8624 specs
[count
++].index
= CR_IRR0
+ i
;
8630 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8631 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8633 && regno
<= CR_IRR3
)
8635 specs
[count
] = tmpl
;
8636 specs
[count
++].index
= regno
;
8645 case IA64_RS_CR_IIB
:
8652 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8653 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8654 && (regno
== CR_IIB0
|| regno
== CR_IIB1
))
8656 specs
[count
] = tmpl
;
8657 specs
[count
++].index
= regno
;
8662 case IA64_RS_CR_LRR
:
8669 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8670 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8671 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8673 specs
[count
] = tmpl
;
8674 specs
[count
++].index
= regno
;
8682 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8684 specs
[count
] = tmpl
;
8685 specs
[count
++].index
=
8686 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8698 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DAHR3
)
8700 specs
[count
] = tmpl
;
8701 specs
[count
++].index
=
8702 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_DAHR
;
8717 else if (rsrc_write
)
8719 if (dep
->specifier
== IA64_RS_FRb
8720 && idesc
->operands
[0] == IA64_OPND_F1
)
8722 specs
[count
] = tmpl
;
8723 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8728 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8730 if (idesc
->operands
[i
] == IA64_OPND_F2
8731 || idesc
->operands
[i
] == IA64_OPND_F3
8732 || idesc
->operands
[i
] == IA64_OPND_F4
)
8734 specs
[count
] = tmpl
;
8735 specs
[count
++].index
=
8736 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8745 /* This reference applies only to the GR whose value is loaded with
8746 data returned from memory. */
8747 specs
[count
] = tmpl
;
8748 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8754 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8755 if (idesc
->operands
[i
] == IA64_OPND_R1
8756 || idesc
->operands
[i
] == IA64_OPND_R2
8757 || idesc
->operands
[i
] == IA64_OPND_R3
)
8759 specs
[count
] = tmpl
;
8760 specs
[count
++].index
=
8761 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8763 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8764 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8765 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8767 specs
[count
] = tmpl
;
8768 specs
[count
++].index
=
8769 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8774 /* Look for anything that reads a GR. */
8775 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8777 if (idesc
->operands
[i
] == IA64_OPND_MR3
8778 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8779 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8780 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8781 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8782 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8783 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8784 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8785 || idesc
->operands
[i
] == IA64_OPND_DAHR_R3
8786 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8787 || ((i
>= idesc
->num_outputs
)
8788 && (idesc
->operands
[i
] == IA64_OPND_R1
8789 || idesc
->operands
[i
] == IA64_OPND_R2
8790 || idesc
->operands
[i
] == IA64_OPND_R3
8791 /* addl source register. */
8792 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8794 specs
[count
] = tmpl
;
8795 specs
[count
++].index
=
8796 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8807 /* This is the same as IA64_RS_PRr, except that the register range is
8808 from 1 - 15, and there are no rotating register reads/writes here. */
8812 for (i
= 1; i
< 16; i
++)
8814 specs
[count
] = tmpl
;
8815 specs
[count
++].index
= i
;
8821 /* Mark only those registers indicated by the mask. */
8824 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8825 for (i
= 1; i
< 16; i
++)
8826 if (mask
& ((valueT
) 1 << i
))
8828 specs
[count
] = tmpl
;
8829 specs
[count
++].index
= i
;
8837 else if (note
== 11) /* note 11 implies note 1 as well */
8841 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8843 if (idesc
->operands
[i
] == IA64_OPND_P1
8844 || idesc
->operands
[i
] == IA64_OPND_P2
)
8846 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8847 if (regno
>= 1 && regno
< 16)
8849 specs
[count
] = tmpl
;
8850 specs
[count
++].index
= regno
;
8860 else if (note
== 12)
8862 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8864 specs
[count
] = tmpl
;
8865 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8872 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8873 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8874 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8875 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8877 if ((idesc
->operands
[0] == IA64_OPND_P1
8878 || idesc
->operands
[0] == IA64_OPND_P2
)
8879 && p1
>= 1 && p1
< 16)
8881 specs
[count
] = tmpl
;
8882 specs
[count
].cmp_type
=
8883 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8884 specs
[count
++].index
= p1
;
8886 if ((idesc
->operands
[1] == IA64_OPND_P1
8887 || idesc
->operands
[1] == IA64_OPND_P2
)
8888 && p2
>= 1 && p2
< 16)
8890 specs
[count
] = tmpl
;
8891 specs
[count
].cmp_type
=
8892 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8893 specs
[count
++].index
= p2
;
8898 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8900 specs
[count
] = tmpl
;
8901 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8903 if (idesc
->operands
[1] == IA64_OPND_PR
)
8905 for (i
= 1; i
< 16; i
++)
8907 specs
[count
] = tmpl
;
8908 specs
[count
++].index
= i
;
8919 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8920 simplified cases of this. */
8924 for (i
= 16; i
< 63; i
++)
8926 specs
[count
] = tmpl
;
8927 specs
[count
++].index
= i
;
8933 /* Mark only those registers indicated by the mask. */
8935 && idesc
->operands
[0] == IA64_OPND_PR
)
8937 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8938 if (mask
& ((valueT
) 1 << 16))
8939 for (i
= 16; i
< 63; i
++)
8941 specs
[count
] = tmpl
;
8942 specs
[count
++].index
= i
;
8946 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8948 for (i
= 16; i
< 63; i
++)
8950 specs
[count
] = tmpl
;
8951 specs
[count
++].index
= i
;
8959 else if (note
== 11) /* note 11 implies note 1 as well */
8963 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8965 if (idesc
->operands
[i
] == IA64_OPND_P1
8966 || idesc
->operands
[i
] == IA64_OPND_P2
)
8968 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8969 if (regno
>= 16 && regno
< 63)
8971 specs
[count
] = tmpl
;
8972 specs
[count
++].index
= regno
;
8982 else if (note
== 12)
8984 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8986 specs
[count
] = tmpl
;
8987 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8994 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8995 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8996 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8997 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8999 if ((idesc
->operands
[0] == IA64_OPND_P1
9000 || idesc
->operands
[0] == IA64_OPND_P2
)
9001 && p1
>= 16 && p1
< 63)
9003 specs
[count
] = tmpl
;
9004 specs
[count
].cmp_type
=
9005 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9006 specs
[count
++].index
= p1
;
9008 if ((idesc
->operands
[1] == IA64_OPND_P1
9009 || idesc
->operands
[1] == IA64_OPND_P2
)
9010 && p2
>= 16 && p2
< 63)
9012 specs
[count
] = tmpl
;
9013 specs
[count
].cmp_type
=
9014 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9015 specs
[count
++].index
= p2
;
9020 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9022 specs
[count
] = tmpl
;
9023 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9025 if (idesc
->operands
[1] == IA64_OPND_PR
)
9027 for (i
= 16; i
< 63; i
++)
9029 specs
[count
] = tmpl
;
9030 specs
[count
++].index
= i
;
9042 /* Verify that the instruction is using the PSR bit indicated in
9046 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9048 if (dep
->regindex
< 6)
9050 specs
[count
++] = tmpl
;
9053 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9055 if (dep
->regindex
< 32
9056 || dep
->regindex
== 35
9057 || dep
->regindex
== 36
9058 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9060 specs
[count
++] = tmpl
;
9063 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9065 if (dep
->regindex
< 32
9066 || dep
->regindex
== 35
9067 || dep
->regindex
== 36
9068 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9070 specs
[count
++] = tmpl
;
9075 /* Several PSR bits have very specific dependencies. */
9076 switch (dep
->regindex
)
9079 specs
[count
++] = tmpl
;
9084 specs
[count
++] = tmpl
;
9088 /* Only certain CR accesses use PSR.ic */
9089 if (idesc
->operands
[0] == IA64_OPND_CR3
9090 || idesc
->operands
[1] == IA64_OPND_CR3
)
9093 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9096 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_CR
;
9113 specs
[count
++] = tmpl
;
9122 specs
[count
++] = tmpl
;
9126 /* Only some AR accesses use cpl */
9127 if (idesc
->operands
[0] == IA64_OPND_AR3
9128 || idesc
->operands
[1] == IA64_OPND_AR3
)
9131 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9134 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_AR
;
9141 && regno
<= AR_K7
))))
9143 specs
[count
++] = tmpl
;
9148 specs
[count
++] = tmpl
;
9158 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9160 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9166 if (mask
& ((valueT
) 1 << dep
->regindex
))
9168 specs
[count
++] = tmpl
;
9173 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9174 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9175 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9176 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9178 if (idesc
->operands
[i
] == IA64_OPND_F1
9179 || idesc
->operands
[i
] == IA64_OPND_F2
9180 || idesc
->operands
[i
] == IA64_OPND_F3
9181 || idesc
->operands
[i
] == IA64_OPND_F4
)
9183 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9184 if (reg
>= min
&& reg
<= max
)
9186 specs
[count
++] = tmpl
;
9193 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9194 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9195 /* mfh is read on writes to FR32-127; mfl is read on writes to
9197 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9199 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9201 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9202 if (reg
>= min
&& reg
<= max
)
9204 specs
[count
++] = tmpl
;
9209 else if (note
== 10)
9211 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9213 if (idesc
->operands
[i
] == IA64_OPND_R1
9214 || idesc
->operands
[i
] == IA64_OPND_R2
9215 || idesc
->operands
[i
] == IA64_OPND_R3
)
9217 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9218 if (regno
>= 16 && regno
<= 31)
9220 specs
[count
++] = tmpl
;
9231 case IA64_RS_AR_FPSR
:
9232 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9234 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9235 if (regno
== AR_FPSR
)
9237 specs
[count
++] = tmpl
;
9242 specs
[count
++] = tmpl
;
9247 /* Handle all AR[REG] resources */
9248 if (note
== 0 || note
== 1)
9250 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9251 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9252 && regno
== dep
->regindex
)
9254 specs
[count
++] = tmpl
;
9256 /* other AR[REG] resources may be affected by AR accesses */
9257 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9260 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9261 switch (dep
->regindex
)
9267 if (regno
== AR_BSPSTORE
)
9269 specs
[count
++] = tmpl
;
9274 (regno
== AR_BSPSTORE
9275 || regno
== AR_RNAT
))
9277 specs
[count
++] = tmpl
;
9282 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9285 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9286 switch (dep
->regindex
)
9291 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9293 specs
[count
++] = tmpl
;
9300 specs
[count
++] = tmpl
;
9310 /* Handle all CR[REG] resources.
9311 ??? FIXME: The rule 17 isn't really handled correctly. */
9312 if (note
== 0 || note
== 1 || note
== 17)
9314 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9316 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9317 if (regno
== dep
->regindex
)
9319 specs
[count
++] = tmpl
;
9321 else if (!rsrc_write
)
9323 /* Reads from CR[IVR] affect other resources. */
9324 if (regno
== CR_IVR
)
9326 if ((dep
->regindex
>= CR_IRR0
9327 && dep
->regindex
<= CR_IRR3
)
9328 || dep
->regindex
== CR_TPR
)
9330 specs
[count
++] = tmpl
;
9337 specs
[count
++] = tmpl
;
9346 case IA64_RS_INSERVICE
:
9347 /* look for write of EOI (67) or read of IVR (65) */
9348 if ((idesc
->operands
[0] == IA64_OPND_CR3
9349 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9350 || (idesc
->operands
[1] == IA64_OPND_CR3
9351 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9353 specs
[count
++] = tmpl
;
9360 specs
[count
++] = tmpl
;
9371 specs
[count
++] = tmpl
;
9375 /* Check if any of the registers accessed are in the rotating region.
9376 mov to/from pr accesses CFM only when qp_regno is in the rotating
9378 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9380 if (idesc
->operands
[i
] == IA64_OPND_R1
9381 || idesc
->operands
[i
] == IA64_OPND_R2
9382 || idesc
->operands
[i
] == IA64_OPND_R3
)
9384 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9385 /* Assumes that md.rot.num_regs is always valid */
9386 if (md
.rot
.num_regs
> 0
9388 && num
< 31 + md
.rot
.num_regs
)
9390 specs
[count
] = tmpl
;
9391 specs
[count
++].specific
= 0;
9394 else if (idesc
->operands
[i
] == IA64_OPND_F1
9395 || idesc
->operands
[i
] == IA64_OPND_F2
9396 || idesc
->operands
[i
] == IA64_OPND_F3
9397 || idesc
->operands
[i
] == IA64_OPND_F4
)
9399 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9402 specs
[count
] = tmpl
;
9403 specs
[count
++].specific
= 0;
9406 else if (idesc
->operands
[i
] == IA64_OPND_P1
9407 || idesc
->operands
[i
] == IA64_OPND_P2
)
9409 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9412 specs
[count
] = tmpl
;
9413 specs
[count
++].specific
= 0;
9417 if (CURR_SLOT
.qp_regno
> 15)
9419 specs
[count
] = tmpl
;
9420 specs
[count
++].specific
= 0;
9425 /* This is the same as IA64_RS_PRr, except simplified to account for
9426 the fact that there is only one register. */
9430 specs
[count
++] = tmpl
;
9435 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9436 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9437 if (mask
& ((valueT
) 1 << 63))
9438 specs
[count
++] = tmpl
;
9440 else if (note
== 11)
9442 if ((idesc
->operands
[0] == IA64_OPND_P1
9443 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9444 || (idesc
->operands
[1] == IA64_OPND_P2
9445 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9447 specs
[count
++] = tmpl
;
9450 else if (note
== 12)
9452 if (CURR_SLOT
.qp_regno
== 63)
9454 specs
[count
++] = tmpl
;
9461 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9462 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9463 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9464 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9467 && (idesc
->operands
[0] == IA64_OPND_P1
9468 || idesc
->operands
[0] == IA64_OPND_P2
))
9470 specs
[count
] = tmpl
;
9471 specs
[count
++].cmp_type
=
9472 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9475 && (idesc
->operands
[1] == IA64_OPND_P1
9476 || idesc
->operands
[1] == IA64_OPND_P2
))
9478 specs
[count
] = tmpl
;
9479 specs
[count
++].cmp_type
=
9480 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9485 if (CURR_SLOT
.qp_regno
== 63)
9487 specs
[count
++] = tmpl
;
9498 /* FIXME we can identify some individual RSE written resources, but RSE
9499 read resources have not yet been completely identified, so for now
9500 treat RSE as a single resource */
9501 if (strncmp (idesc
->name
, "mov", 3) == 0)
9505 if (idesc
->operands
[0] == IA64_OPND_AR3
9506 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9508 specs
[count
++] = tmpl
;
9513 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9515 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9516 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9518 specs
[count
++] = tmpl
;
9521 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9523 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9524 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9525 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9527 specs
[count
++] = tmpl
;
9534 specs
[count
++] = tmpl
;
9539 /* FIXME -- do any of these need to be non-specific? */
9540 specs
[count
++] = tmpl
;
9544 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9551 /* Clear branch flags on marked resources. This breaks the link between the
9552 QP of the marking instruction and a subsequent branch on the same QP. */
9555 clear_qp_branch_flag (valueT mask
)
9558 for (i
= 0; i
< regdepslen
; i
++)
9560 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9561 if ((bit
& mask
) != 0)
9563 regdeps
[i
].link_to_qp_branch
= 0;
9568 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9569 any mutexes which contain one of the PRs and create new ones when
9573 update_qp_mutex (valueT mask
)
9579 while (i
< qp_mutexeslen
)
9581 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9583 /* If it destroys and creates the same mutex, do nothing. */
9584 if (qp_mutexes
[i
].prmask
== mask
9585 && qp_mutexes
[i
].path
== md
.path
)
9596 fprintf (stderr
, " Clearing mutex relation");
9597 print_prmask (qp_mutexes
[i
].prmask
);
9598 fprintf (stderr
, "\n");
9601 /* Deal with the old mutex with more than 3+ PRs only if
9602 the new mutex on the same execution path with it.
9604 FIXME: The 3+ mutex support is incomplete.
9605 dot_pred_rel () may be a better place to fix it. */
9606 if (qp_mutexes
[i
].path
== md
.path
)
9608 /* If it is a proper subset of the mutex, create a
9611 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9614 qp_mutexes
[i
].prmask
&= ~mask
;
9615 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9617 /* Modify the mutex if there are more than one
9625 /* Remove the mutex. */
9626 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9634 add_qp_mutex (mask
);
9639 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9641 Any changes to a PR clears the mutex relations which include that PR. */
9644 clear_qp_mutex (valueT mask
)
9649 while (i
< qp_mutexeslen
)
9651 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9655 fprintf (stderr
, " Clearing mutex relation");
9656 print_prmask (qp_mutexes
[i
].prmask
);
9657 fprintf (stderr
, "\n");
9659 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9666 /* Clear implies relations which contain PRs in the given masks.
9667 P1_MASK indicates the source of the implies relation, while P2_MASK
9668 indicates the implied PR. */
9671 clear_qp_implies (valueT p1_mask
, valueT p2_mask
)
9676 while (i
< qp_implieslen
)
9678 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9679 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9682 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9683 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9684 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9691 /* Add the PRs specified to the list of implied relations. */
9694 add_qp_imply (int p1
, int p2
)
9700 /* p0 is not meaningful here. */
9701 if (p1
== 0 || p2
== 0)
9707 /* If it exists already, ignore it. */
9708 for (i
= 0; i
< qp_implieslen
; i
++)
9710 if (qp_implies
[i
].p1
== p1
9711 && qp_implies
[i
].p2
== p2
9712 && qp_implies
[i
].path
== md
.path
9713 && !qp_implies
[i
].p2_branched
)
9717 if (qp_implieslen
== qp_impliestotlen
)
9719 qp_impliestotlen
+= 20;
9720 qp_implies
= XRESIZEVEC (struct qp_imply
, qp_implies
, qp_impliestotlen
);
9723 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9724 qp_implies
[qp_implieslen
].p1
= p1
;
9725 qp_implies
[qp_implieslen
].p2
= p2
;
9726 qp_implies
[qp_implieslen
].path
= md
.path
;
9727 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9729 /* Add in the implied transitive relations; for everything that p2 implies,
9730 make p1 imply that, too; for everything that implies p1, make it imply p2
9732 for (i
= 0; i
< qp_implieslen
; i
++)
9734 if (qp_implies
[i
].p1
== p2
)
9735 add_qp_imply (p1
, qp_implies
[i
].p2
);
9736 if (qp_implies
[i
].p2
== p1
)
9737 add_qp_imply (qp_implies
[i
].p1
, p2
);
9739 /* Add in mutex relations implied by this implies relation; for each mutex
9740 relation containing p2, duplicate it and replace p2 with p1. */
9741 bit
= (valueT
) 1 << p1
;
9742 mask
= (valueT
) 1 << p2
;
9743 for (i
= 0; i
< qp_mutexeslen
; i
++)
9745 if (qp_mutexes
[i
].prmask
& mask
)
9746 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9750 /* Add the PRs specified in the mask to the mutex list; this means that only
9751 one of the PRs can be true at any time. PR0 should never be included in
9755 add_qp_mutex (valueT mask
)
9760 if (qp_mutexeslen
== qp_mutexestotlen
)
9762 qp_mutexestotlen
+= 20;
9763 qp_mutexes
= XRESIZEVEC (struct qpmutex
, qp_mutexes
, qp_mutexestotlen
);
9767 fprintf (stderr
, " Registering mutex on");
9768 print_prmask (mask
);
9769 fprintf (stderr
, "\n");
9771 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9772 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9776 has_suffix_p (const char *name
, const char *suffix
)
9778 size_t namelen
= strlen (name
);
9779 size_t sufflen
= strlen (suffix
);
9781 if (namelen
<= sufflen
)
9783 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9787 clear_register_values (void)
9791 fprintf (stderr
, " Clearing register values\n");
9792 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9793 gr_values
[i
].known
= 0;
9796 /* Keep track of register values/changes which affect DV tracking.
9798 optimization note: should add a flag to classes of insns where otherwise we
9799 have to examine a group of strings to identify them. */
9802 note_register_values (struct ia64_opcode
*idesc
)
9804 valueT qp_changemask
= 0;
9807 /* Invalidate values for registers being written to. */
9808 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9810 if (idesc
->operands
[i
] == IA64_OPND_R1
9811 || idesc
->operands
[i
] == IA64_OPND_R2
9812 || idesc
->operands
[i
] == IA64_OPND_R3
)
9814 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9815 if (regno
> 0 && regno
< NELEMS (gr_values
))
9816 gr_values
[regno
].known
= 0;
9818 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9820 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9821 if (regno
> 0 && regno
< 4)
9822 gr_values
[regno
].known
= 0;
9824 else if (idesc
->operands
[i
] == IA64_OPND_P1
9825 || idesc
->operands
[i
] == IA64_OPND_P2
)
9827 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9828 qp_changemask
|= (valueT
) 1 << regno
;
9830 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9832 if (idesc
->operands
[2] & (valueT
) 0x10000)
9833 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9835 qp_changemask
= idesc
->operands
[2];
9838 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9840 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9841 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9843 qp_changemask
= idesc
->operands
[1];
9844 qp_changemask
&= ~(valueT
) 0xFFFF;
9849 /* Always clear qp branch flags on any PR change. */
9850 /* FIXME there may be exceptions for certain compares. */
9851 clear_qp_branch_flag (qp_changemask
);
9853 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9854 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9856 qp_changemask
|= ~(valueT
) 0xFFFF;
9857 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9859 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9860 gr_values
[i
].known
= 0;
9862 clear_qp_mutex (qp_changemask
);
9863 clear_qp_implies (qp_changemask
, qp_changemask
);
9865 /* After a call, all register values are undefined, except those marked
9867 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9868 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9870 /* FIXME keep GR values which are marked as "safe_across_calls" */
9871 clear_register_values ();
9872 clear_qp_mutex (~qp_safe_across_calls
);
9873 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9874 clear_qp_branch_flag (~qp_safe_across_calls
);
9876 else if (is_interruption_or_rfi (idesc
)
9877 || is_taken_branch (idesc
))
9879 clear_register_values ();
9880 clear_qp_mutex (~(valueT
) 0);
9881 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9883 /* Look for mutex and implies relations. */
9884 else if ((idesc
->operands
[0] == IA64_OPND_P1
9885 || idesc
->operands
[0] == IA64_OPND_P2
)
9886 && (idesc
->operands
[1] == IA64_OPND_P1
9887 || idesc
->operands
[1] == IA64_OPND_P2
))
9889 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9890 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9891 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9892 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9894 /* If both PRs are PR0, we can't really do anything. */
9895 if (p1
== 0 && p2
== 0)
9898 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9900 /* In general, clear mutexes and implies which include P1 or P2,
9901 with the following exceptions. */
9902 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9903 || has_suffix_p (idesc
->name
, ".and.orcm"))
9905 clear_qp_implies (p2mask
, p1mask
);
9907 else if (has_suffix_p (idesc
->name
, ".andcm")
9908 || has_suffix_p (idesc
->name
, ".and"))
9910 clear_qp_implies (0, p1mask
| p2mask
);
9912 else if (has_suffix_p (idesc
->name
, ".orcm")
9913 || has_suffix_p (idesc
->name
, ".or"))
9915 clear_qp_mutex (p1mask
| p2mask
);
9916 clear_qp_implies (p1mask
| p2mask
, 0);
9922 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9924 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9925 if (p1
== 0 || p2
== 0)
9926 clear_qp_mutex (p1mask
| p2mask
);
9928 added
= update_qp_mutex (p1mask
| p2mask
);
9930 if (CURR_SLOT
.qp_regno
== 0
9931 || has_suffix_p (idesc
->name
, ".unc"))
9933 if (added
== 0 && p1
&& p2
)
9934 add_qp_mutex (p1mask
| p2mask
);
9935 if (CURR_SLOT
.qp_regno
!= 0)
9938 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9940 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9945 /* Look for mov imm insns into GRs. */
9946 else if (idesc
->operands
[0] == IA64_OPND_R1
9947 && (idesc
->operands
[1] == IA64_OPND_IMM22
9948 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9949 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9950 && (strcmp (idesc
->name
, "mov") == 0
9951 || strcmp (idesc
->name
, "movl") == 0))
9953 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9954 if (regno
> 0 && regno
< NELEMS (gr_values
))
9956 gr_values
[regno
].known
= 1;
9957 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9958 gr_values
[regno
].path
= md
.path
;
9961 fprintf (stderr
, " Know gr%d = ", regno
);
9962 fprintf_vma (stderr
, gr_values
[regno
].value
);
9963 fputs ("\n", stderr
);
9967 /* Look for dep.z imm insns. */
9968 else if (idesc
->operands
[0] == IA64_OPND_R1
9969 && idesc
->operands
[1] == IA64_OPND_IMM8
9970 && strcmp (idesc
->name
, "dep.z") == 0)
9972 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9973 if (regno
> 0 && regno
< NELEMS (gr_values
))
9975 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9977 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9978 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9979 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9980 gr_values
[regno
].known
= 1;
9981 gr_values
[regno
].value
= value
;
9982 gr_values
[regno
].path
= md
.path
;
9985 fprintf (stderr
, " Know gr%d = ", regno
);
9986 fprintf_vma (stderr
, gr_values
[regno
].value
);
9987 fputs ("\n", stderr
);
9993 clear_qp_mutex (qp_changemask
);
9994 clear_qp_implies (qp_changemask
, qp_changemask
);
9998 /* Return whether the given predicate registers are currently mutex. */
10001 qp_mutex (int p1
, int p2
, int path
)
10008 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10009 for (i
= 0; i
< qp_mutexeslen
; i
++)
10011 if (qp_mutexes
[i
].path
>= path
10012 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10019 /* Return whether the given resource is in the given insn's list of chks
10020 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10024 resources_match (struct rsrc
*rs
,
10025 struct ia64_opcode
*idesc
,
10030 struct rsrc specs
[MAX_SPECS
];
10033 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10034 we don't need to check. One exception is note 11, which indicates that
10035 target predicates are written regardless of PR[qp]. */
10036 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10040 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10041 while (count
-- > 0)
10043 /* UNAT checking is a bit more specific than other resources */
10044 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10045 && specs
[count
].mem_offset
.hint
10046 && rs
->mem_offset
.hint
)
10048 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10050 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10051 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10058 /* Skip apparent PR write conflicts where both writes are an AND or both
10059 writes are an OR. */
10060 if (rs
->dependency
->specifier
== IA64_RS_PR
10061 || rs
->dependency
->specifier
== IA64_RS_PRr
10062 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10064 if (specs
[count
].cmp_type
!= CMP_NONE
10065 && specs
[count
].cmp_type
== rs
->cmp_type
)
10068 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10069 dv_mode
[rs
->dependency
->mode
],
10070 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10071 specs
[count
].index
: 63);
10076 " %s on parallel compare conflict %s vs %s on PR%d\n",
10077 dv_mode
[rs
->dependency
->mode
],
10078 dv_cmp_type
[rs
->cmp_type
],
10079 dv_cmp_type
[specs
[count
].cmp_type
],
10080 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10081 specs
[count
].index
: 63);
10085 /* If either resource is not specific, conservatively assume a conflict
10087 if (!specs
[count
].specific
|| !rs
->specific
)
10089 else if (specs
[count
].index
== rs
->index
)
10096 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10097 insert a stop to create the break. Update all resource dependencies
10098 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10099 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10100 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10104 insn_group_break (int insert_stop
, int qp_regno
, int save_current
)
10108 if (insert_stop
&& md
.num_slots_in_use
> 0)
10109 PREV_SLOT
.end_of_insn_group
= 1;
10113 fprintf (stderr
, " Insn group break%s",
10114 (insert_stop
? " (w/stop)" : ""));
10116 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10117 fprintf (stderr
, "\n");
10121 while (i
< regdepslen
)
10123 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10126 && regdeps
[i
].qp_regno
!= qp_regno
)
10133 && CURR_SLOT
.src_file
== regdeps
[i
].file
10134 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10140 /* clear dependencies which are automatically cleared by a stop, or
10141 those that have reached the appropriate state of insn serialization */
10142 if (dep
->semantics
== IA64_DVS_IMPLIED
10143 || dep
->semantics
== IA64_DVS_IMPLIEDF
10144 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10146 print_dependency ("Removing", i
);
10147 regdeps
[i
] = regdeps
[--regdepslen
];
10151 if (dep
->semantics
== IA64_DVS_DATA
10152 || dep
->semantics
== IA64_DVS_INSTR
10153 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10155 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10156 regdeps
[i
].insn_srlz
= STATE_STOP
;
10157 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10158 regdeps
[i
].data_srlz
= STATE_STOP
;
10165 /* Add the given resource usage spec to the list of active dependencies. */
10168 mark_resource (struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
,
10169 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
,
10174 if (regdepslen
== regdepstotlen
)
10176 regdepstotlen
+= 20;
10177 regdeps
= XRESIZEVEC (struct rsrc
, regdeps
, regdepstotlen
);
10180 regdeps
[regdepslen
] = *spec
;
10181 regdeps
[regdepslen
].depind
= depind
;
10182 regdeps
[regdepslen
].path
= path
;
10183 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10184 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10186 print_dependency ("Adding", regdepslen
);
10192 print_dependency (const char *action
, int depind
)
10196 fprintf (stderr
, " %s %s '%s'",
10197 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10198 (regdeps
[depind
].dependency
)->name
);
10199 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10200 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10201 if (regdeps
[depind
].mem_offset
.hint
)
10203 fputs (" ", stderr
);
10204 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10205 fputs ("+", stderr
);
10206 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10208 fprintf (stderr
, "\n");
10213 instruction_serialization (void)
10217 fprintf (stderr
, " Instruction serialization\n");
10218 for (i
= 0; i
< regdepslen
; i
++)
10219 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10220 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10224 data_serialization (void)
10228 fprintf (stderr
, " Data serialization\n");
10229 while (i
< regdepslen
)
10231 if (regdeps
[i
].data_srlz
== STATE_STOP
10232 /* Note: as of 991210, all "other" dependencies are cleared by a
10233 data serialization. This might change with new tables */
10234 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10236 print_dependency ("Removing", i
);
10237 regdeps
[i
] = regdeps
[--regdepslen
];
10244 /* Insert stops and serializations as needed to avoid DVs. */
10247 remove_marked_resource (struct rsrc
*rs
)
10249 switch (rs
->dependency
->semantics
)
10251 case IA64_DVS_SPECIFIC
:
10253 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10254 /* Fall through. */
10255 case IA64_DVS_INSTR
:
10257 fprintf (stderr
, "Inserting instr serialization\n");
10258 if (rs
->insn_srlz
< STATE_STOP
)
10259 insn_group_break (1, 0, 0);
10260 if (rs
->insn_srlz
< STATE_SRLZ
)
10262 struct slot oldslot
= CURR_SLOT
;
10263 /* Manually jam a srlz.i insn into the stream */
10264 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10265 CURR_SLOT
.user_template
= -1;
10266 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10267 instruction_serialization ();
10268 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10269 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10270 emit_one_bundle ();
10271 CURR_SLOT
= oldslot
;
10273 insn_group_break (1, 0, 0);
10275 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10276 "other" types of DV are eliminated
10277 by a data serialization */
10278 case IA64_DVS_DATA
:
10280 fprintf (stderr
, "Inserting data serialization\n");
10281 if (rs
->data_srlz
< STATE_STOP
)
10282 insn_group_break (1, 0, 0);
10284 struct slot oldslot
= CURR_SLOT
;
10285 /* Manually jam a srlz.d insn into the stream */
10286 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10287 CURR_SLOT
.user_template
= -1;
10288 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10289 data_serialization ();
10290 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10291 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10292 emit_one_bundle ();
10293 CURR_SLOT
= oldslot
;
10296 case IA64_DVS_IMPLIED
:
10297 case IA64_DVS_IMPLIEDF
:
10299 fprintf (stderr
, "Inserting stop\n");
10300 insn_group_break (1, 0, 0);
10307 /* Check the resources used by the given opcode against the current dependency
10310 The check is run once for each execution path encountered. In this case,
10311 a unique execution path is the sequence of instructions following a code
10312 entry point, e.g. the following has three execution paths, one starting
10313 at L0, one at L1, and one at L2.
10322 check_dependencies (struct ia64_opcode
*idesc
)
10324 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10328 /* Note that the number of marked resources may change within the
10329 loop if in auto mode. */
10331 while (i
< regdepslen
)
10333 struct rsrc
*rs
= ®deps
[i
];
10334 const struct ia64_dependency
*dep
= rs
->dependency
;
10337 int start_over
= 0;
10339 if (dep
->semantics
== IA64_DVS_NONE
10340 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10346 note
= NOTE (opdeps
->chks
[chkind
]);
10348 /* Check this resource against each execution path seen thus far. */
10349 for (path
= 0; path
<= md
.path
; path
++)
10353 /* If the dependency wasn't on the path being checked, ignore it. */
10354 if (rs
->path
< path
)
10357 /* If the QP for this insn implies a QP which has branched, don't
10358 bother checking. Ed. NOTE: I don't think this check is terribly
10359 useful; what's the point of generating code which will only be
10360 reached if its QP is zero?
10361 This code was specifically inserted to handle the following code,
10362 based on notes from Intel's DV checking code, where p1 implies p2.
10368 if (CURR_SLOT
.qp_regno
!= 0)
10372 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10374 if (qp_implies
[implies
].path
>= path
10375 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10376 && qp_implies
[implies
].p2_branched
)
10386 if ((matchtype
= resources_match (rs
, idesc
, note
,
10387 CURR_SLOT
.qp_regno
, path
)) != 0)
10390 char pathmsg
[256] = "";
10391 char indexmsg
[256] = "";
10392 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10395 snprintf (pathmsg
, sizeof (pathmsg
),
10396 " when entry is at label '%s'",
10397 md
.entry_labels
[path
- 1]);
10398 if (matchtype
== 1 && rs
->index
>= 0)
10399 snprintf (indexmsg
, sizeof (indexmsg
),
10400 ", specific resource number is %d",
10402 snprintf (msg
, sizeof (msg
),
10403 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10405 (certain
? "violates" : "may violate"),
10406 dv_mode
[dep
->mode
], dep
->name
,
10407 dv_sem
[dep
->semantics
],
10408 pathmsg
, indexmsg
);
10410 if (md
.explicit_mode
)
10412 as_warn ("%s", msg
);
10413 if (path
< md
.path
)
10414 as_warn (_("Only the first path encountering the conflict is reported"));
10415 as_warn_where (rs
->file
, rs
->line
,
10416 _("This is the location of the conflicting usage"));
10417 /* Don't bother checking other paths, to avoid duplicating
10418 the same warning */
10424 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10426 remove_marked_resource (rs
);
10428 /* since the set of dependencies has changed, start over */
10429 /* FIXME -- since we're removing dvs as we go, we
10430 probably don't really need to start over... */
10443 /* Register new dependencies based on the given opcode. */
10446 mark_resources (struct ia64_opcode
*idesc
)
10449 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10450 int add_only_qp_reads
= 0;
10452 /* A conditional branch only uses its resources if it is taken; if it is
10453 taken, we stop following that path. The other branch types effectively
10454 *always* write their resources. If it's not taken, register only QP
10456 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10458 add_only_qp_reads
= 1;
10462 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10464 for (i
= 0; i
< opdeps
->nregs
; i
++)
10466 const struct ia64_dependency
*dep
;
10467 struct rsrc specs
[MAX_SPECS
];
10472 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10473 note
= NOTE (opdeps
->regs
[i
]);
10475 if (add_only_qp_reads
10476 && !(dep
->mode
== IA64_DV_WAR
10477 && (dep
->specifier
== IA64_RS_PR
10478 || dep
->specifier
== IA64_RS_PRr
10479 || dep
->specifier
== IA64_RS_PR63
)))
10482 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10484 while (count
-- > 0)
10486 mark_resource (idesc
, dep
, &specs
[count
],
10487 DEP (opdeps
->regs
[i
]), md
.path
);
10490 /* The execution path may affect register values, which may in turn
10491 affect which indirect-access resources are accessed. */
10492 switch (dep
->specifier
)
10496 case IA64_RS_CPUID
:
10504 for (path
= 0; path
< md
.path
; path
++)
10506 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10507 while (count
-- > 0)
10508 mark_resource (idesc
, dep
, &specs
[count
],
10509 DEP (opdeps
->regs
[i
]), path
);
10516 /* Remove dependencies when they no longer apply. */
10519 update_dependencies (struct ia64_opcode
*idesc
)
10523 if (strcmp (idesc
->name
, "srlz.i") == 0)
10525 instruction_serialization ();
10527 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10529 data_serialization ();
10531 else if (is_interruption_or_rfi (idesc
)
10532 || is_taken_branch (idesc
))
10534 /* Although technically the taken branch doesn't clear dependencies
10535 which require a srlz.[id], we don't follow the branch; the next
10536 instruction is assumed to start with a clean slate. */
10540 else if (is_conditional_branch (idesc
)
10541 && CURR_SLOT
.qp_regno
!= 0)
10543 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10545 for (i
= 0; i
< qp_implieslen
; i
++)
10547 /* If the conditional branch's predicate is implied by the predicate
10548 in an existing dependency, remove that dependency. */
10549 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10552 /* Note that this implied predicate takes a branch so that if
10553 a later insn generates a DV but its predicate implies this
10554 one, we can avoid the false DV warning. */
10555 qp_implies
[i
].p2_branched
= 1;
10556 while (depind
< regdepslen
)
10558 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10560 print_dependency ("Removing", depind
);
10561 regdeps
[depind
] = regdeps
[--regdepslen
];
10568 /* Any marked resources which have this same predicate should be
10569 cleared, provided that the QP hasn't been modified between the
10570 marking instruction and the branch. */
10573 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10578 while (i
< regdepslen
)
10580 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10581 && regdeps
[i
].link_to_qp_branch
10582 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10583 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10585 /* Treat like a taken branch */
10586 print_dependency ("Removing", i
);
10587 regdeps
[i
] = regdeps
[--regdepslen
];
10596 /* Examine the current instruction for dependency violations. */
10599 check_dv (struct ia64_opcode
*idesc
)
10603 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10604 idesc
->name
, CURR_SLOT
.src_line
,
10605 idesc
->dependencies
->nchks
,
10606 idesc
->dependencies
->nregs
);
10609 /* Look through the list of currently marked resources; if the current
10610 instruction has the dependency in its chks list which uses that resource,
10611 check against the specific resources used. */
10612 check_dependencies (idesc
);
10614 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10615 then add them to the list of marked resources. */
10616 mark_resources (idesc
);
10618 /* There are several types of dependency semantics, and each has its own
10619 requirements for being cleared
10621 Instruction serialization (insns separated by interruption, rfi, or
10622 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10624 Data serialization (instruction serialization, or writer + srlz.d +
10625 reader, where writer and srlz.d are in separate groups) clears
10626 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10627 always be the case).
10629 Instruction group break (groups separated by stop, taken branch,
10630 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10632 update_dependencies (idesc
);
10634 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10635 warning. Keep track of as many as possible that are useful. */
10636 note_register_values (idesc
);
10638 /* We don't need or want this anymore. */
10639 md
.mem_offset
.hint
= 0;
10644 /* Translate one line of assembly. Pseudo ops and labels do not show
10647 md_assemble (char *str
)
10649 char *saved_input_line_pointer
, *temp
;
10650 const char *mnemonic
;
10651 const struct pseudo_opcode
*pdesc
;
10652 struct ia64_opcode
*idesc
;
10653 unsigned char qp_regno
;
10654 unsigned int flags
;
10657 saved_input_line_pointer
= input_line_pointer
;
10658 input_line_pointer
= str
;
10660 /* extract the opcode (mnemonic): */
10662 ch
= get_symbol_name (&temp
);
10664 pdesc
= (struct pseudo_opcode
*) str_hash_find (md
.pseudo_hash
, mnemonic
);
10667 (void) restore_line_pointer (ch
);
10668 (*pdesc
->handler
) (pdesc
->arg
);
10672 /* Find the instruction descriptor matching the arguments. */
10674 idesc
= ia64_find_opcode (mnemonic
);
10675 (void) restore_line_pointer (ch
);
10678 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10682 idesc
= parse_operands (idesc
);
10686 /* Handle the dynamic ops we can handle now: */
10687 if (idesc
->type
== IA64_TYPE_DYN
)
10689 if (strcmp (idesc
->name
, "add") == 0)
10691 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10692 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10696 ia64_free_opcode (idesc
);
10697 idesc
= ia64_find_opcode (mnemonic
);
10699 else if (strcmp (idesc
->name
, "mov") == 0)
10701 enum ia64_opnd opnd1
, opnd2
;
10704 opnd1
= idesc
->operands
[0];
10705 opnd2
= idesc
->operands
[1];
10706 if (opnd1
== IA64_OPND_AR3
)
10708 else if (opnd2
== IA64_OPND_AR3
)
10712 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10714 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10715 mnemonic
= "mov.i";
10716 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10717 mnemonic
= "mov.m";
10725 ia64_free_opcode (idesc
);
10726 idesc
= ia64_find_opcode (mnemonic
);
10727 while (idesc
!= NULL
10728 && (idesc
->operands
[0] != opnd1
10729 || idesc
->operands
[1] != opnd2
))
10730 idesc
= get_next_opcode (idesc
);
10734 else if (strcmp (idesc
->name
, "mov.i") == 0
10735 || strcmp (idesc
->name
, "mov.m") == 0)
10737 enum ia64_opnd opnd1
, opnd2
;
10740 opnd1
= idesc
->operands
[0];
10741 opnd2
= idesc
->operands
[1];
10742 if (opnd1
== IA64_OPND_AR3
)
10744 else if (opnd2
== IA64_OPND_AR3
)
10748 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10751 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10753 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10755 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10756 as_bad (_("AR %d can only be accessed by %c-unit"),
10757 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10761 else if (strcmp (idesc
->name
, "hint.b") == 0)
10767 case hint_b_warning
:
10768 as_warn (_("hint.b may be treated as nop"));
10771 as_bad (_("hint.b shouldn't be used"));
10777 if (md
.qp
.X_op
== O_register
)
10779 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10780 md
.qp
.X_op
= O_absent
;
10783 flags
= idesc
->flags
;
10785 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10787 /* The alignment frag has to end with a stop bit only if the
10788 next instruction after the alignment directive has to be
10789 the first instruction in an instruction group. */
10792 while (align_frag
->fr_type
!= rs_align_code
)
10794 align_frag
= align_frag
->fr_next
;
10798 /* align_frag can be NULL if there are directives in
10800 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10801 align_frag
->tc_frag_data
= 1;
10804 insn_group_break (1, 0, 0);
10808 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10810 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10814 /* Build the instruction. */
10815 CURR_SLOT
.qp_regno
= qp_regno
;
10816 CURR_SLOT
.idesc
= idesc
;
10817 CURR_SLOT
.src_file
= as_where (&CURR_SLOT
.src_line
);
10818 dwarf2_where (&CURR_SLOT
.debug_line
);
10819 dwarf2_consume_line_info ();
10821 /* Add unwind entries, if there are any. */
10822 if (unwind
.current_entry
)
10824 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10825 unwind
.current_entry
= NULL
;
10827 if (unwind
.pending_saves
)
10829 if (unwind
.pending_saves
->next
)
10831 /* Attach the next pending save to the next slot so that its
10832 slot number will get set correctly. */
10833 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10834 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10837 unwind
.pending_saves
= NULL
;
10839 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10842 /* Check for dependency violations. */
10846 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10847 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10848 emit_one_bundle ();
10850 if ((flags
& IA64_OPCODE_LAST
) != 0)
10851 insn_group_break (1, 0, 0);
10853 md
.last_text_seg
= now_seg
;
10856 input_line_pointer
= saved_input_line_pointer
;
10859 /* Called when symbol NAME cannot be found in the symbol table.
10860 Should be used for dynamic valued symbols only. */
10863 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
10868 /* Called for any expression that can not be recognized. When the
10869 function is called, `input_line_pointer' will point to the start of
10873 md_operand (expressionS
*e
)
10875 switch (*input_line_pointer
)
10878 ++input_line_pointer
;
10879 expression_and_evaluate (e
);
10880 if (*input_line_pointer
!= ']')
10882 as_bad (_("Closing bracket missing"));
10887 if (e
->X_op
!= O_register
10888 || e
->X_add_number
< REG_GR
10889 || e
->X_add_number
> REG_GR
+ 127)
10891 as_bad (_("Index must be a general register"));
10892 e
->X_add_number
= REG_GR
;
10895 ++input_line_pointer
;
10906 ignore_rest_of_line ();
10909 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10910 a section symbol plus some offset. For relocs involving @fptr(),
10911 directives we don't want such adjustments since we need to have the
10912 original symbol's name in the reloc. */
10914 ia64_fix_adjustable (fixS
*fix
)
10916 /* Prevent all adjustments to global symbols */
10917 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10920 switch (fix
->fx_r_type
)
10922 case BFD_RELOC_IA64_FPTR64I
:
10923 case BFD_RELOC_IA64_FPTR32MSB
:
10924 case BFD_RELOC_IA64_FPTR32LSB
:
10925 case BFD_RELOC_IA64_FPTR64MSB
:
10926 case BFD_RELOC_IA64_FPTR64LSB
:
10927 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10928 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10938 ia64_force_relocation (fixS
*fix
)
10940 switch (fix
->fx_r_type
)
10942 case BFD_RELOC_IA64_FPTR64I
:
10943 case BFD_RELOC_IA64_FPTR32MSB
:
10944 case BFD_RELOC_IA64_FPTR32LSB
:
10945 case BFD_RELOC_IA64_FPTR64MSB
:
10946 case BFD_RELOC_IA64_FPTR64LSB
:
10948 case BFD_RELOC_IA64_LTOFF22
:
10949 case BFD_RELOC_IA64_LTOFF64I
:
10950 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10951 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10952 case BFD_RELOC_IA64_PLTOFF22
:
10953 case BFD_RELOC_IA64_PLTOFF64I
:
10954 case BFD_RELOC_IA64_PLTOFF64MSB
:
10955 case BFD_RELOC_IA64_PLTOFF64LSB
:
10957 case BFD_RELOC_IA64_LTOFF22X
:
10958 case BFD_RELOC_IA64_LDXMOV
:
10965 return generic_force_reloc (fix
);
10968 /* Decide from what point a pc-relative relocation is relative to,
10969 relative to the pc-relative fixup. Er, relatively speaking. */
10971 ia64_pcrel_from_section (fixS
*fix
, segT sec
)
10973 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10975 if (bfd_section_flags (sec
) & SEC_CODE
)
10982 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10984 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10988 exp
.X_op
= O_pseudo_fixup
;
10989 exp
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10990 exp
.X_add_number
= 0;
10991 exp
.X_add_symbol
= symbol
;
10992 emit_expr (&exp
, size
);
10995 /* This is called whenever some data item (not an instruction) needs a
10996 fixup. We pick the right reloc code depending on the byteorder
10997 currently in effect. */
10999 ia64_cons_fix_new (fragS
*f
, int where
, int nbytes
, expressionS
*exp
,
11000 bfd_reloc_code_real_type code
)
11006 /* There are no reloc for 8 and 16 bit quantities, but we allow
11007 them here since they will work fine as long as the expression
11008 is fully defined at the end of the pass over the source file. */
11009 case 1: code
= BFD_RELOC_8
; break;
11010 case 2: code
= BFD_RELOC_16
; break;
11012 if (target_big_endian
)
11013 code
= BFD_RELOC_IA64_DIR32MSB
;
11015 code
= BFD_RELOC_IA64_DIR32LSB
;
11019 /* In 32-bit mode, data8 could mean function descriptors too. */
11020 if (exp
->X_op
== O_pseudo_fixup
11021 && exp
->X_op_symbol
11022 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11023 && !(md
.flags
& EF_IA_64_ABI64
))
11025 if (target_big_endian
)
11026 code
= BFD_RELOC_IA64_IPLTMSB
;
11028 code
= BFD_RELOC_IA64_IPLTLSB
;
11029 exp
->X_op
= O_symbol
;
11034 if (target_big_endian
)
11035 code
= BFD_RELOC_IA64_DIR64MSB
;
11037 code
= BFD_RELOC_IA64_DIR64LSB
;
11042 if (exp
->X_op
== O_pseudo_fixup
11043 && exp
->X_op_symbol
11044 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11046 if (target_big_endian
)
11047 code
= BFD_RELOC_IA64_IPLTMSB
;
11049 code
= BFD_RELOC_IA64_IPLTLSB
;
11050 exp
->X_op
= O_symbol
;
11056 as_bad (_("Unsupported fixup size %d"), nbytes
);
11057 ignore_rest_of_line ();
11061 if (exp
->X_op
== O_pseudo_fixup
)
11063 exp
->X_op
= O_symbol
;
11064 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11065 /* ??? If code unchanged, unsupported. */
11068 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11069 /* We need to store the byte order in effect in case we're going
11070 to fix an 8 or 16 bit relocation (for which there no real
11071 relocs available). See md_apply_fix(). */
11072 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11075 /* Return the actual relocation we wish to associate with the pseudo
11076 reloc described by SYM and R_TYPE. SYM should be one of the
11077 symbols in the pseudo_func array, or NULL. */
11079 static bfd_reloc_code_real_type
11080 ia64_gen_real_reloc_type (struct symbol
*sym
, bfd_reloc_code_real_type r_type
)
11082 bfd_reloc_code_real_type newr
= 0;
11083 const char *type
= NULL
, *suffix
= "";
11090 switch (S_GET_VALUE (sym
))
11092 case FUNC_FPTR_RELATIVE
:
11095 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_FPTR64I
; break;
11096 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_FPTR32MSB
; break;
11097 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_FPTR32LSB
; break;
11098 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_FPTR64MSB
; break;
11099 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_FPTR64LSB
; break;
11100 default: type
= "FPTR"; break;
11104 case FUNC_GP_RELATIVE
:
11107 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_GPREL22
; break;
11108 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_GPREL64I
; break;
11109 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_GPREL32MSB
; break;
11110 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_GPREL32LSB
; break;
11111 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_GPREL64MSB
; break;
11112 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_GPREL64LSB
; break;
11113 default: type
= "GPREL"; break;
11117 case FUNC_LT_RELATIVE
:
11120 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22
; break;
11121 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_LTOFF64I
; break;
11122 default: type
= "LTOFF"; break;
11126 case FUNC_LT_RELATIVE_X
:
11129 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22X
; break;
11130 default: type
= "LTOFF"; suffix
= "X"; break;
11134 case FUNC_PC_RELATIVE
:
11137 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PCREL22
; break;
11138 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PCREL64I
; break;
11139 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_PCREL32MSB
; break;
11140 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_PCREL32LSB
; break;
11141 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PCREL64MSB
; break;
11142 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PCREL64LSB
; break;
11143 default: type
= "PCREL"; break;
11147 case FUNC_PLT_RELATIVE
:
11150 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PLTOFF22
; break;
11151 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PLTOFF64I
; break;
11152 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PLTOFF64MSB
;break;
11153 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PLTOFF64LSB
;break;
11154 default: type
= "PLTOFF"; break;
11158 case FUNC_SEC_RELATIVE
:
11161 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SECREL32MSB
;break;
11162 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SECREL32LSB
;break;
11163 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SECREL64MSB
;break;
11164 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SECREL64LSB
;break;
11165 default: type
= "SECREL"; break;
11169 case FUNC_SEG_RELATIVE
:
11172 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SEGREL32MSB
;break;
11173 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SEGREL32LSB
;break;
11174 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SEGREL64MSB
;break;
11175 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SEGREL64LSB
;break;
11176 default: type
= "SEGREL"; break;
11180 case FUNC_LTV_RELATIVE
:
11183 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_LTV32MSB
; break;
11184 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_LTV32LSB
; break;
11185 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_LTV64MSB
; break;
11186 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_LTV64LSB
; break;
11187 default: type
= "LTV"; break;
11191 case FUNC_LT_FPTR_RELATIVE
:
11194 case BFD_RELOC_IA64_IMM22
:
11195 newr
= BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11196 case BFD_RELOC_IA64_IMM64
:
11197 newr
= BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11198 case BFD_RELOC_IA64_DIR32MSB
:
11199 newr
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11200 case BFD_RELOC_IA64_DIR32LSB
:
11201 newr
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11202 case BFD_RELOC_IA64_DIR64MSB
:
11203 newr
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11204 case BFD_RELOC_IA64_DIR64LSB
:
11205 newr
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11207 type
= "LTOFF_FPTR"; break;
11211 case FUNC_TP_RELATIVE
:
11214 case BFD_RELOC_IA64_IMM14
: newr
= BFD_RELOC_IA64_TPREL14
; break;
11215 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_TPREL22
; break;
11216 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_TPREL64I
; break;
11217 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_TPREL64MSB
; break;
11218 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_TPREL64LSB
; break;
11219 default: type
= "TPREL"; break;
11223 case FUNC_LT_TP_RELATIVE
:
11226 case BFD_RELOC_IA64_IMM22
:
11227 newr
= BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11229 type
= "LTOFF_TPREL"; break;
11233 case FUNC_DTP_MODULE
:
11236 case BFD_RELOC_IA64_DIR64MSB
:
11237 newr
= BFD_RELOC_IA64_DTPMOD64MSB
; break;
11238 case BFD_RELOC_IA64_DIR64LSB
:
11239 newr
= BFD_RELOC_IA64_DTPMOD64LSB
; break;
11241 type
= "DTPMOD"; break;
11245 case FUNC_LT_DTP_MODULE
:
11248 case BFD_RELOC_IA64_IMM22
:
11249 newr
= BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11251 type
= "LTOFF_DTPMOD"; break;
11255 case FUNC_DTP_RELATIVE
:
11258 case BFD_RELOC_IA64_DIR32MSB
:
11259 newr
= BFD_RELOC_IA64_DTPREL32MSB
; break;
11260 case BFD_RELOC_IA64_DIR32LSB
:
11261 newr
= BFD_RELOC_IA64_DTPREL32LSB
; break;
11262 case BFD_RELOC_IA64_DIR64MSB
:
11263 newr
= BFD_RELOC_IA64_DTPREL64MSB
; break;
11264 case BFD_RELOC_IA64_DIR64LSB
:
11265 newr
= BFD_RELOC_IA64_DTPREL64LSB
; break;
11266 case BFD_RELOC_IA64_IMM14
:
11267 newr
= BFD_RELOC_IA64_DTPREL14
; break;
11268 case BFD_RELOC_IA64_IMM22
:
11269 newr
= BFD_RELOC_IA64_DTPREL22
; break;
11270 case BFD_RELOC_IA64_IMM64
:
11271 newr
= BFD_RELOC_IA64_DTPREL64I
; break;
11273 type
= "DTPREL"; break;
11277 case FUNC_LT_DTP_RELATIVE
:
11280 case BFD_RELOC_IA64_IMM22
:
11281 newr
= BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11283 type
= "LTOFF_DTPREL"; break;
11287 case FUNC_IPLT_RELOC
:
11290 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11291 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11292 default: type
= "IPLT"; break;
11297 case FUNC_SLOTCOUNT_RELOC
:
11298 return DUMMY_RELOC_IA64_SLOTCOUNT
;
11315 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11316 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11317 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11318 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11319 case BFD_RELOC_UNUSED
: width
= 13; break;
11320 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11321 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11322 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11326 /* This should be an error, but since previously there wasn't any
11327 diagnostic here, don't make it fail because of this for now. */
11328 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11333 /* Here is where generate the appropriate reloc for pseudo relocation
11336 ia64_validate_fix (fixS
*fix
)
11338 switch (fix
->fx_r_type
)
11340 case BFD_RELOC_IA64_FPTR64I
:
11341 case BFD_RELOC_IA64_FPTR32MSB
:
11342 case BFD_RELOC_IA64_FPTR64LSB
:
11343 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11344 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11345 if (fix
->fx_offset
!= 0)
11346 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11347 _("No addend allowed in @fptr() relocation"));
11355 fix_insn (fixS
*fix
, const struct ia64_operand
*odesc
, valueT value
)
11357 bfd_vma insn
[3], t0
, t1
, control_bits
;
11362 slot
= fix
->fx_where
& 0x3;
11363 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11365 /* Bundles are always in little-endian byte order */
11366 t0
= bfd_getl64 (fixpos
);
11367 t1
= bfd_getl64 (fixpos
+ 8);
11368 control_bits
= t0
& 0x1f;
11369 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11370 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11371 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11374 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11376 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11377 insn
[2] |= (((value
& 0x7f) << 13)
11378 | (((value
>> 7) & 0x1ff) << 27)
11379 | (((value
>> 16) & 0x1f) << 22)
11380 | (((value
>> 21) & 0x1) << 21)
11381 | (((value
>> 63) & 0x1) << 36));
11383 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11385 if (value
& ~0x3fffffffffffffffULL
)
11386 err
= _("integer operand out of range");
11387 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11388 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11390 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11393 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11394 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11395 | (((value
>> 0) & 0xfffff) << 13));
11398 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11401 as_bad_where (fix
->fx_file
, fix
->fx_line
, "%s", err
);
11403 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11404 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11405 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11406 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11409 /* Attempt to simplify or even eliminate a fixup. The return value is
11410 ignored; perhaps it was once meaningful, but now it is historical.
11411 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11413 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11417 md_apply_fix (fixS
*fix
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
11420 valueT value
= *valP
;
11422 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11426 switch (fix
->fx_r_type
)
11428 case BFD_RELOC_IA64_PCREL21B
: break;
11429 case BFD_RELOC_IA64_PCREL21BI
: break;
11430 case BFD_RELOC_IA64_PCREL21F
: break;
11431 case BFD_RELOC_IA64_PCREL21M
: break;
11432 case BFD_RELOC_IA64_PCREL60B
: break;
11433 case BFD_RELOC_IA64_PCREL22
: break;
11434 case BFD_RELOC_IA64_PCREL64I
: break;
11435 case BFD_RELOC_IA64_PCREL32MSB
: break;
11436 case BFD_RELOC_IA64_PCREL32LSB
: break;
11437 case BFD_RELOC_IA64_PCREL64MSB
: break;
11438 case BFD_RELOC_IA64_PCREL64LSB
: break;
11440 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11447 switch ((unsigned) fix
->fx_r_type
)
11449 case BFD_RELOC_UNUSED
:
11450 /* This must be a TAG13 or TAG13b operand. There are no external
11451 relocs defined for them, so we must give an error. */
11452 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11453 _("%s must have a constant value"),
11454 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11458 case BFD_RELOC_IA64_TPREL14
:
11459 case BFD_RELOC_IA64_TPREL22
:
11460 case BFD_RELOC_IA64_TPREL64I
:
11461 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11462 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11463 case BFD_RELOC_IA64_DTPREL14
:
11464 case BFD_RELOC_IA64_DTPREL22
:
11465 case BFD_RELOC_IA64_DTPREL64I
:
11466 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11467 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11471 case DUMMY_RELOC_IA64_SLOTCOUNT
:
11472 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11473 _("cannot resolve @slotcount parameter"));
11482 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11485 if (fix
->fx_r_type
== DUMMY_RELOC_IA64_SLOTCOUNT
)
11487 /* For @slotcount, convert an addresses difference to a slots
11491 v
= (value
>> 4) * 3;
11492 switch (value
& 0x0f)
11506 as_bad (_("invalid @slotcount value"));
11512 if (fix
->tc_fix_data
.bigendian
)
11513 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11515 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11520 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11525 /* Generate the BFD reloc to be stuck in the object file from the
11526 fixup used internally in the assembler. */
11529 tc_gen_reloc (asection
*sec ATTRIBUTE_UNUSED
, fixS
*fixp
)
11533 reloc
= XNEW (arelent
);
11534 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
11535 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11536 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11537 reloc
->addend
= fixp
->fx_offset
;
11538 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11542 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11543 _("Cannot represent %s relocation in object file"),
11544 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11551 /* Turn a string in input_line_pointer into a floating point constant
11552 of type TYPE, and store the appropriate bytes in *LIT. The number
11553 of LITTLENUMS emitted is stored in *SIZE. An error message is
11554 returned, or NULL on OK. */
11557 md_atof (int type
, char *lit
, int *size
)
11559 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11589 return _("Unrecognized or unsupported floating point constant");
11591 t
= atof_ieee (input_line_pointer
, type
, words
);
11593 input_line_pointer
= t
;
11595 (*ia64_float_to_chars
) (lit
, words
, prec
);
11599 /* It is 10 byte floating point with 6 byte padding. */
11600 memset (&lit
[10], 0, 6);
11601 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11604 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11609 /* Handle ia64 specific semantics of the align directive. */
11612 ia64_md_do_align (int n ATTRIBUTE_UNUSED
,
11613 const char *fill ATTRIBUTE_UNUSED
,
11614 int len ATTRIBUTE_UNUSED
,
11615 int max ATTRIBUTE_UNUSED
)
11617 if (subseg_text_p (now_seg
))
11618 ia64_flush_insns ();
11621 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11622 of an rs_align_code fragment. */
11625 ia64_handle_align (fragS
*fragp
)
11629 const unsigned char *nop_type
;
11631 if (fragp
->fr_type
!= rs_align_code
)
11634 /* Check if this frag has to end with a stop bit. */
11635 nop_type
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11637 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11638 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11640 /* If no paddings are needed, we check if we need a stop bit. */
11641 if (!bytes
&& fragp
->tc_frag_data
)
11643 if (fragp
->fr_fix
< 16)
11645 /* FIXME: It won't work with
11647 alloc r32=ar.pfs,1,2,4,0
11651 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11652 _("Can't add stop bit to mark end of instruction group"));
11655 /* Bundles are always in little-endian byte order. Make sure
11656 the previous bundle has the stop bit. */
11660 /* Make sure we are on a 16-byte boundary, in case someone has been
11661 putting data into a text section. */
11664 int fix
= bytes
& 15;
11665 memset (p
, 0, fix
);
11668 fragp
->fr_fix
+= fix
;
11671 /* Instruction bundles are always little-endian. */
11672 memcpy (p
, nop_type
, 16);
11673 fragp
->fr_var
= 16;
11677 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11682 number_to_chars_bigendian (lit
, (long) (*words
++),
11683 sizeof (LITTLENUM_TYPE
));
11684 lit
+= sizeof (LITTLENUM_TYPE
);
11689 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11694 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11695 sizeof (LITTLENUM_TYPE
));
11696 lit
+= sizeof (LITTLENUM_TYPE
);
11701 ia64_elf_section_change_hook (void)
11703 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11704 && elf_linked_to_section (now_seg
) == NULL
)
11705 elf_linked_to_section (now_seg
) = text_section
;
11706 dot_byteorder (-1);
11709 /* Check if a label should be made global. */
11711 ia64_check_label (symbolS
*label
)
11713 if (*input_line_pointer
== ':')
11715 S_SET_EXTERNAL (label
);
11716 input_line_pointer
++;
11720 /* Used to remember where .alias and .secalias directives are seen. We
11721 will rename symbol and section names when we are about to output
11722 the relocatable file. */
11725 const char *file
; /* The file where the directive is seen. */
11726 unsigned int line
; /* The line number the directive is at. */
11727 const char *name
; /* The original name of the symbol. */
11730 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11731 .secalias. Otherwise, it is .alias. */
11733 dot_alias (int section
)
11735 char *name
, *alias
;
11741 htab_t ahash
, nhash
;
11744 delim
= get_symbol_name (&name
);
11745 end_name
= input_line_pointer
;
11748 if (name
== end_name
)
11750 as_bad (_("expected symbol name"));
11751 ignore_rest_of_line ();
11755 SKIP_WHITESPACE_AFTER_NAME ();
11757 if (*input_line_pointer
!= ',')
11760 as_bad (_("expected comma after \"%s\""), name
);
11762 ignore_rest_of_line ();
11766 input_line_pointer
++;
11768 ia64_canonicalize_symbol_name (name
);
11770 /* We call demand_copy_C_string to check if alias string is valid.
11771 There should be a closing `"' and no `\0' in the string. */
11772 alias
= demand_copy_C_string (&len
);
11775 ignore_rest_of_line ();
11779 /* Make a copy of name string. */
11780 len
= strlen (name
) + 1;
11781 obstack_grow (¬es
, name
, len
);
11782 name
= obstack_finish (¬es
);
11787 ahash
= secalias_hash
;
11788 nhash
= secalias_name_hash
;
11793 ahash
= alias_hash
;
11794 nhash
= alias_name_hash
;
11797 /* Check if alias has been used before. */
11799 h
= (struct alias
*) str_hash_find (ahash
, alias
);
11802 if (strcmp (h
->name
, name
))
11803 as_bad (_("`%s' is already the alias of %s `%s'"),
11804 alias
, kind
, h
->name
);
11805 obstack_free (¬es
, name
);
11806 obstack_free (¬es
, alias
);
11810 /* Check if name already has an alias. */
11811 a
= (const char *) str_hash_find (nhash
, name
);
11814 if (strcmp (a
, alias
))
11815 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11816 obstack_free (¬es
, name
);
11817 obstack_free (¬es
, alias
);
11821 h
= XNEW (struct alias
);
11822 h
->file
= as_where (&h
->line
);
11825 str_hash_insert (ahash
, alias
, h
, 0);
11826 str_hash_insert (nhash
, name
, alias
, 0);
11829 demand_empty_rest_of_line ();
11832 /* It renames the original symbol name to its alias. */
11834 do_alias (void **slot
, void *arg ATTRIBUTE_UNUSED
)
11836 string_tuple_t
*tuple
= *((string_tuple_t
**) slot
);
11837 struct alias
*h
= (struct alias
*) tuple
->value
;
11838 symbolS
*sym
= symbol_find (h
->name
);
11843 /* Uses .alias extensively to alias CRTL functions to same with
11844 decc$ prefix. Sometimes function gets optimized away and a
11845 warning results, which should be suppressed. */
11846 if (strncmp (tuple
->key
, "decc$", 5) != 0)
11848 as_warn_where (h
->file
, h
->line
,
11849 _("symbol `%s' aliased to `%s' is not used"),
11850 h
->name
, tuple
->key
);
11853 S_SET_NAME (sym
, (char *) tuple
->key
);
11858 /* Called from write_object_file. */
11860 ia64_adjust_symtab (void)
11862 htab_traverse (alias_hash
, do_alias
, NULL
);
11865 /* It renames the original section name to its alias. */
11867 do_secalias (void **slot
, void *arg ATTRIBUTE_UNUSED
)
11869 string_tuple_t
*tuple
= *((string_tuple_t
**) slot
);
11870 struct alias
*h
= (struct alias
*) tuple
->value
;
11871 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11874 as_warn_where (h
->file
, h
->line
,
11875 _("section `%s' aliased to `%s' is not used"),
11876 h
->name
, tuple
->key
);
11878 sec
->name
= tuple
->key
;
11883 /* Called from write_object_file. */
11885 ia64_frob_file (void)
11887 htab_traverse (secalias_hash
, do_secalias
, NULL
);
11891 #define NT_VMS_MHD 1
11892 #define NT_VMS_LNM 2
11894 /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF
11897 /* Manufacture a VMS-like time string. */
11899 get_vms_time (char *Now
)
11905 pnt
= ctime (&timeb
);
11911 sprintf (Now
, "%2s-%3s-%s %s", pnt
+ 8, pnt
+ 4, pnt
+ 20, pnt
+ 11);
11915 ia64_vms_note (void)
11918 asection
*seg
= now_seg
;
11919 subsegT subseg
= now_subseg
;
11920 asection
*secp
= NULL
;
11925 /* Create the .note section. */
11927 secp
= subseg_new (".note", 0);
11928 bfd_set_section_flags (secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
11930 /* Module header note (MHD). */
11931 bname
= xstrdup (lbasename (out_file_name
));
11932 if ((p
= strrchr (bname
, '.')))
11935 /* VMS note header is 24 bytes long. */
11936 p
= frag_more (8 + 8 + 8);
11937 number_to_chars_littleendian (p
+ 0, 8, 8);
11938 number_to_chars_littleendian (p
+ 8, 40 + strlen (bname
), 8);
11939 number_to_chars_littleendian (p
+ 16, NT_VMS_MHD
, 8);
11942 strcpy (p
, "IPF/VMS");
11944 p
= frag_more (17 + 17 + strlen (bname
) + 1 + 5);
11946 strcpy (p
+ 17, "24-FEB-2005 15:00");
11949 p
+= strlen (bname
) + 1;
11951 strcpy (p
, "V1.0");
11953 frag_align (3, 0, 0);
11955 /* Language processor name note. */
11956 sprintf (buf
, "GNU assembler version %s (%s) using BFD version %s",
11957 VERSION
, TARGET_ALIAS
, BFD_VERSION_STRING
);
11959 p
= frag_more (8 + 8 + 8);
11960 number_to_chars_littleendian (p
+ 0, 8, 8);
11961 number_to_chars_littleendian (p
+ 8, strlen (buf
) + 1, 8);
11962 number_to_chars_littleendian (p
+ 16, NT_VMS_LNM
, 8);
11965 strcpy (p
, "IPF/VMS");
11967 p
= frag_more (strlen (buf
) + 1);
11970 frag_align (3, 0, 0);
11972 secp
= subseg_new (".vms_display_name_info", 0);
11973 bfd_set_section_flags (secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
11975 /* This symbol should be passed on the command line and be variable
11976 according to language. */
11977 sym
= symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl",
11978 absolute_section
, &zero_address_frag
, 0);
11979 symbol_table_insert (sym
);
11980 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
| BSF_DYNAMIC
;
11983 /* Format 3 of VMS demangler Spec. */
11984 number_to_chars_littleendian (p
, 3, 4);
11987 /* Place holder for symbol table index of above symbol. */
11988 number_to_chars_littleendian (p
, -1, 4);
11990 frag_align (3, 0, 0);
11992 /* We probably can't restore the current segment, for there likely
11993 isn't one yet... */
11995 subseg_set (seg
, subseg
);
11998 #endif /* TE_VMS */