1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
53 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54 #define MIN(a,b) ((a) < (b) ? (a) : (b))
57 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58 #define CURR_SLOT md.slot[md.curr_slot]
60 #define O_pseudo_fixup (O_max + 1)
64 /* IA-64 ABI section pseudo-ops. */
65 SPECIAL_SECTION_BSS
= 0,
67 SPECIAL_SECTION_SDATA
,
68 SPECIAL_SECTION_RODATA
,
69 SPECIAL_SECTION_COMMENT
,
70 SPECIAL_SECTION_UNWIND
,
71 SPECIAL_SECTION_UNWIND_INFO
,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY
,
74 SPECIAL_SECTION_FINI_ARRAY
,
91 FUNC_LT_FPTR_RELATIVE
,
101 REG_FR
= (REG_GR
+ 128),
102 REG_AR
= (REG_FR
+ 128),
103 REG_CR
= (REG_AR
+ 128),
104 REG_P
= (REG_CR
+ 128),
105 REG_BR
= (REG_P
+ 64),
106 REG_IP
= (REG_BR
+ 8),
113 /* The following are pseudo-registers for use by gas only. */
125 /* The following pseudo-registers are used for unwind directives only: */
133 DYNREG_GR
= 0, /* dynamic general purpose register */
134 DYNREG_FR
, /* dynamic floating point register */
135 DYNREG_PR
, /* dynamic predicate register */
139 enum operand_match_result
142 OPERAND_OUT_OF_RANGE
,
146 /* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
152 struct label_fix
*next
;
156 /* This is the endianness of the current section. */
157 extern int target_big_endian
;
159 /* This is the default endianness. */
160 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
162 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
164 static void ia64_float_to_chars_bigendian
165 PARAMS ((char *, LITTLENUM_TYPE
*, int));
166 static void ia64_float_to_chars_littleendian
167 PARAMS ((char *, LITTLENUM_TYPE
*, int));
168 static void (*ia64_float_to_chars
)
169 PARAMS ((char *, LITTLENUM_TYPE
*, int));
171 static struct hash_control
*alias_hash
;
172 static struct hash_control
*alias_name_hash
;
173 static struct hash_control
*secalias_hash
;
174 static struct hash_control
*secalias_name_hash
;
176 /* Characters which always start a comment. */
177 const char comment_chars
[] = "";
179 /* Characters which start a comment at the beginning of a line. */
180 const char line_comment_chars
[] = "#";
182 /* Characters which may be used to separate multiple commands on a
184 const char line_separator_chars
[] = ";";
186 /* Characters which are used to indicate an exponent in a floating
188 const char EXP_CHARS
[] = "eE";
190 /* Characters which mean that a number is a floating point constant,
192 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
194 /* ia64-specific option processing: */
196 const char *md_shortopts
= "m:N:x::";
198 struct option md_longopts
[] =
200 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
201 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
202 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
203 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
206 size_t md_longopts_size
= sizeof (md_longopts
);
210 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
211 struct hash_control
*reg_hash
; /* register name hash table */
212 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
213 struct hash_control
*const_hash
; /* constant hash table */
214 struct hash_control
*entry_hash
; /* code entry hint hash table */
216 symbolS
*regsym
[REG_NUM
];
218 /* If X_op is != O_absent, the registername for the instruction's
219 qualifying predicate. If NULL, p0 is assumed for instructions
220 that are predicatable. */
227 explicit_mode
: 1, /* which mode we're in */
228 default_explicit_mode
: 1, /* which mode is the default */
229 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
231 keep_pending_output
: 1;
233 /* Each bundle consists of up to three instructions. We keep
234 track of four most recent instructions so we can correctly set
235 the end_of_insn_group for the last instruction in a bundle. */
237 int num_slots_in_use
;
241 end_of_insn_group
: 1,
242 manual_bundling_on
: 1,
243 manual_bundling_off
: 1;
244 signed char user_template
; /* user-selected template, if any */
245 unsigned char qp_regno
; /* qualifying predicate */
246 /* This duplicates a good fraction of "struct fix" but we
247 can't use a "struct fix" instead since we can't call
248 fix_new_exp() until we know the address of the instruction. */
252 bfd_reloc_code_real_type code
;
253 enum ia64_opnd opnd
; /* type of operand in need of fix */
254 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
255 expressionS expr
; /* the value to be inserted */
257 fixup
[2]; /* at most two fixups per insn */
258 struct ia64_opcode
*idesc
;
259 struct label_fix
*label_fixups
;
260 struct label_fix
*tag_fixups
;
261 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
264 unsigned int src_line
;
265 struct dwarf2_line_info debug_line
;
273 struct dynreg
*next
; /* next dynamic register */
275 unsigned short base
; /* the base register number */
276 unsigned short num_regs
; /* # of registers in this set */
278 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
280 flagword flags
; /* ELF-header flags */
283 unsigned hint
:1; /* is this hint currently valid? */
284 bfd_vma offset
; /* mem.offset offset */
285 bfd_vma base
; /* mem.offset base */
288 int path
; /* number of alt. entry points seen */
289 const char **entry_labels
; /* labels of all alternate paths in
290 the current DV-checking block. */
291 int maxpaths
; /* size currently allocated for
293 /* Support for hardware errata workarounds. */
295 /* Record data about the last three insn groups. */
298 /* B-step workaround.
299 For each predicate register, this is set if the corresponding insn
300 group conditionally sets this register with one of the affected
303 /* B-step workaround.
304 For each general register, this is set if the corresponding insn
305 a) is conditional one one of the predicate registers for which
306 P_REG_SET is 1 in the corresponding entry of the previous group,
307 b) sets this general register with one of the affected
309 int g_reg_set_conditionally
[128];
313 int pointer_size
; /* size in bytes of a pointer */
314 int pointer_size_shift
; /* shift size of a pointer for alignment */
318 /* application registers: */
324 #define AR_BSPSTORE 18
339 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
340 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
341 {"ar.rsc", 16}, {"ar.bsp", 17},
342 {"ar.bspstore", 18}, {"ar.rnat", 19},
343 {"ar.fcr", 21}, {"ar.eflag", 24},
344 {"ar.csd", 25}, {"ar.ssd", 26},
345 {"ar.cflg", 27}, {"ar.fsr", 28},
346 {"ar.fir", 29}, {"ar.fdr", 30},
347 {"ar.ccv", 32}, {"ar.unat", 36},
348 {"ar.fpsr", 40}, {"ar.itc", 44},
349 {"ar.pfs", 64}, {"ar.lc", 65},
370 /* control registers: */
412 static const struct const_desc
419 /* PSR constant masks: */
422 {"psr.be", ((valueT
) 1) << 1},
423 {"psr.up", ((valueT
) 1) << 2},
424 {"psr.ac", ((valueT
) 1) << 3},
425 {"psr.mfl", ((valueT
) 1) << 4},
426 {"psr.mfh", ((valueT
) 1) << 5},
428 {"psr.ic", ((valueT
) 1) << 13},
429 {"psr.i", ((valueT
) 1) << 14},
430 {"psr.pk", ((valueT
) 1) << 15},
432 {"psr.dt", ((valueT
) 1) << 17},
433 {"psr.dfl", ((valueT
) 1) << 18},
434 {"psr.dfh", ((valueT
) 1) << 19},
435 {"psr.sp", ((valueT
) 1) << 20},
436 {"psr.pp", ((valueT
) 1) << 21},
437 {"psr.di", ((valueT
) 1) << 22},
438 {"psr.si", ((valueT
) 1) << 23},
439 {"psr.db", ((valueT
) 1) << 24},
440 {"psr.lp", ((valueT
) 1) << 25},
441 {"psr.tb", ((valueT
) 1) << 26},
442 {"psr.rt", ((valueT
) 1) << 27},
443 /* 28-31: reserved */
444 /* 32-33: cpl (current privilege level) */
445 {"psr.is", ((valueT
) 1) << 34},
446 {"psr.mc", ((valueT
) 1) << 35},
447 {"psr.it", ((valueT
) 1) << 36},
448 {"psr.id", ((valueT
) 1) << 37},
449 {"psr.da", ((valueT
) 1) << 38},
450 {"psr.dd", ((valueT
) 1) << 39},
451 {"psr.ss", ((valueT
) 1) << 40},
452 /* 41-42: ri (restart instruction) */
453 {"psr.ed", ((valueT
) 1) << 43},
454 {"psr.bn", ((valueT
) 1) << 44},
457 /* indirect register-sets/memory: */
466 { "CPUID", IND_CPUID
},
467 { "cpuid", IND_CPUID
},
479 /* Pseudo functions used to indicate relocation types (these functions
480 start with an at sign (@). */
502 /* reloc pseudo functions (these must come first!): */
503 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
504 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
505 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
506 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
507 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
508 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
509 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
510 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
511 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
512 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
513 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
514 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
515 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
516 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
517 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
518 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
519 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
521 /* mbtype4 constants: */
522 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
523 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
524 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
525 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
526 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
528 /* fclass constants: */
529 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
530 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
531 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
532 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
533 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
534 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
535 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
536 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
537 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
539 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
541 /* hint constants: */
542 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
544 /* unwind-related constants: */
545 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
546 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
547 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
548 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
549 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
550 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
551 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
553 /* unwind-related registers: */
554 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
557 /* 41-bit nop opcodes (one per unit): */
558 static const bfd_vma nop
[IA64_NUM_UNITS
] =
560 0x0000000000LL
, /* NIL => break 0 */
561 0x0008000000LL
, /* I-unit nop */
562 0x0008000000LL
, /* M-unit nop */
563 0x4000000000LL
, /* B-unit nop */
564 0x0008000000LL
, /* F-unit nop */
565 0x0008000000LL
, /* L-"unit" nop */
566 0x0008000000LL
, /* X-unit nop */
569 /* Can't be `const' as it's passed to input routines (which have the
570 habit of setting temporary sentinels. */
571 static char special_section_name
[][20] =
573 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
574 {".IA_64.unwind"}, {".IA_64.unwind_info"},
575 {".init_array"}, {".fini_array"}
578 /* The best template for a particular sequence of up to three
580 #define N IA64_NUM_TYPES
581 static unsigned char best_template
[N
][N
][N
];
584 /* Resource dependencies currently in effect */
586 int depind
; /* dependency index */
587 const struct ia64_dependency
*dependency
; /* actual dependency */
588 unsigned specific
:1, /* is this a specific bit/regno? */
589 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
590 int index
; /* specific regno/bit within dependency */
591 int note
; /* optional qualifying note (0 if none) */
595 int insn_srlz
; /* current insn serialization state */
596 int data_srlz
; /* current data serialization state */
597 int qp_regno
; /* qualifying predicate for this usage */
598 char *file
; /* what file marked this dependency */
599 unsigned int line
; /* what line marked this dependency */
600 struct mem_offset mem_offset
; /* optional memory offset hint */
601 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
602 int path
; /* corresponding code entry index */
604 static int regdepslen
= 0;
605 static int regdepstotlen
= 0;
606 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
607 static const char *dv_sem
[] = { "none", "implied", "impliedf",
608 "data", "instr", "specific", "stop", "other" };
609 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
611 /* Current state of PR mutexation */
612 static struct qpmutex
{
615 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
616 static int qp_mutexeslen
= 0;
617 static int qp_mutexestotlen
= 0;
618 static valueT qp_safe_across_calls
= 0;
620 /* Current state of PR implications */
621 static struct qp_imply
{
624 unsigned p2_branched
:1;
626 } *qp_implies
= NULL
;
627 static int qp_implieslen
= 0;
628 static int qp_impliestotlen
= 0;
630 /* Keep track of static GR values so that indirect register usage can
631 sometimes be tracked. */
636 } gr_values
[128] = {{ 1, 0, 0 }};
638 /* Remember the alignment frag. */
639 static fragS
*align_frag
;
641 /* These are the routines required to output the various types of
644 /* A slot_number is a frag address plus the slot index (0-2). We use the
645 frag address here so that if there is a section switch in the middle of
646 a function, then instructions emitted to a different section are not
647 counted. Since there may be more than one frag for a function, this
648 means we also need to keep track of which frag this address belongs to
649 so we can compute inter-frag distances. This also nicely solves the
650 problem with nops emitted for align directives, which can't easily be
651 counted, but can easily be derived from frag sizes. */
653 typedef struct unw_rec_list
{
655 unsigned long slot_number
;
657 unsigned long next_slot_number
;
658 fragS
*next_slot_frag
;
659 struct unw_rec_list
*next
;
662 #define SLOT_NUM_NOT_SET (unsigned)-1
664 /* Linked list of saved prologue counts. A very poor
665 implementation of a map from label numbers to prologue counts. */
666 typedef struct label_prologue_count
668 struct label_prologue_count
*next
;
669 unsigned long label_number
;
670 unsigned int prologue_count
;
671 } label_prologue_count
;
675 /* Maintain a list of unwind entries for the current function. */
679 /* Any unwind entires that should be attached to the current slot
680 that an insn is being constructed for. */
681 unw_rec_list
*current_entry
;
683 /* These are used to create the unwind table entry for this function. */
686 symbolS
*info
; /* pointer to unwind info */
687 symbolS
*personality_routine
;
689 subsegT saved_text_subseg
;
690 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
692 /* TRUE if processing unwind directives in a prologue region. */
695 unsigned int prologue_count
; /* number of .prologues seen so far */
696 /* Prologue counts at previous .label_state directives. */
697 struct label_prologue_count
* saved_prologue_counts
;
700 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
702 /* Forward declarations: */
703 static void set_section
PARAMS ((char *name
));
704 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
705 unsigned int, unsigned int));
706 static void dot_align (int);
707 static void dot_radix
PARAMS ((int));
708 static void dot_special_section
PARAMS ((int));
709 static void dot_proc
PARAMS ((int));
710 static void dot_fframe
PARAMS ((int));
711 static void dot_vframe
PARAMS ((int));
712 static void dot_vframesp
PARAMS ((int));
713 static void dot_vframepsp
PARAMS ((int));
714 static void dot_save
PARAMS ((int));
715 static void dot_restore
PARAMS ((int));
716 static void dot_restorereg
PARAMS ((int));
717 static void dot_restorereg_p
PARAMS ((int));
718 static void dot_handlerdata
PARAMS ((int));
719 static void dot_unwentry
PARAMS ((int));
720 static void dot_altrp
PARAMS ((int));
721 static void dot_savemem
PARAMS ((int));
722 static void dot_saveg
PARAMS ((int));
723 static void dot_savef
PARAMS ((int));
724 static void dot_saveb
PARAMS ((int));
725 static void dot_savegf
PARAMS ((int));
726 static void dot_spill
PARAMS ((int));
727 static void dot_spillreg
PARAMS ((int));
728 static void dot_spillmem
PARAMS ((int));
729 static void dot_spillreg_p
PARAMS ((int));
730 static void dot_spillmem_p
PARAMS ((int));
731 static void dot_label_state
PARAMS ((int));
732 static void dot_copy_state
PARAMS ((int));
733 static void dot_unwabi
PARAMS ((int));
734 static void dot_personality
PARAMS ((int));
735 static void dot_body
PARAMS ((int));
736 static void dot_prologue
PARAMS ((int));
737 static void dot_endp
PARAMS ((int));
738 static void dot_template
PARAMS ((int));
739 static void dot_regstk
PARAMS ((int));
740 static void dot_rot
PARAMS ((int));
741 static void dot_byteorder
PARAMS ((int));
742 static void dot_psr
PARAMS ((int));
743 static void dot_alias
PARAMS ((int));
744 static void dot_ln
PARAMS ((int));
745 static char *parse_section_name
PARAMS ((void));
746 static void dot_xdata
PARAMS ((int));
747 static void stmt_float_cons
PARAMS ((int));
748 static void stmt_cons_ua
PARAMS ((int));
749 static void dot_xfloat_cons
PARAMS ((int));
750 static void dot_xstringer
PARAMS ((int));
751 static void dot_xdata_ua
PARAMS ((int));
752 static void dot_xfloat_cons_ua
PARAMS ((int));
753 static void print_prmask
PARAMS ((valueT mask
));
754 static void dot_pred_rel
PARAMS ((int));
755 static void dot_reg_val
PARAMS ((int));
756 static void dot_serialize
PARAMS ((int));
757 static void dot_dv_mode
PARAMS ((int));
758 static void dot_entry
PARAMS ((int));
759 static void dot_mem_offset
PARAMS ((int));
760 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
761 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
762 static void declare_register_set
PARAMS ((const char *, int, int));
763 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
764 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
767 static int parse_operand
PARAMS ((expressionS
*e
));
768 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
769 static int errata_nop_necessary_p
PARAMS ((struct slot
*, enum ia64_unit
));
770 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
771 static void emit_one_bundle
PARAMS ((void));
772 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
773 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
774 bfd_reloc_code_real_type r_type
));
775 static void insn_group_break
PARAMS ((int, int, int));
776 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
777 struct rsrc
*, int depind
, int path
));
778 static void add_qp_mutex
PARAMS((valueT mask
));
779 static void add_qp_imply
PARAMS((int p1
, int p2
));
780 static void clear_qp_branch_flag
PARAMS((valueT mask
));
781 static void clear_qp_mutex
PARAMS((valueT mask
));
782 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
783 static int has_suffix_p
PARAMS((const char *, const char *));
784 static void clear_register_values
PARAMS ((void));
785 static void print_dependency
PARAMS ((const char *action
, int depind
));
786 static void instruction_serialization
PARAMS ((void));
787 static void data_serialization
PARAMS ((void));
788 static void remove_marked_resource
PARAMS ((struct rsrc
*));
789 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
790 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
791 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
792 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
793 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
794 struct ia64_opcode
*, int, struct rsrc
[], int, int));
795 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
796 static void check_dependencies
PARAMS((struct ia64_opcode
*));
797 static void mark_resources
PARAMS((struct ia64_opcode
*));
798 static void update_dependencies
PARAMS((struct ia64_opcode
*));
799 static void note_register_values
PARAMS((struct ia64_opcode
*));
800 static int qp_mutex
PARAMS ((int, int, int));
801 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
802 static void output_vbyte_mem
PARAMS ((int, char *, char *));
803 static void count_output
PARAMS ((int, char *, char *));
804 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
805 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
806 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
807 static void output_P1_format
PARAMS ((vbyte_func
, int));
808 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
809 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
810 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
811 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
812 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
813 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
814 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
815 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
816 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
817 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
818 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
819 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
820 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
821 static char format_ab_reg
PARAMS ((int, int));
822 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
824 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
825 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
827 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
828 static unw_rec_list
*output_endp
PARAMS ((void));
829 static unw_rec_list
*output_prologue
PARAMS ((void));
830 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
831 static unw_rec_list
*output_body
PARAMS ((void));
832 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
833 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
834 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
835 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
836 static unw_rec_list
*output_rp_when
PARAMS ((void));
837 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
838 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
839 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
840 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
841 static unw_rec_list
*output_pfs_when
PARAMS ((void));
842 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
843 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
844 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
845 static unw_rec_list
*output_preds_when
PARAMS ((void));
846 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
847 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
848 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
849 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
850 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
851 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
852 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
853 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
854 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
855 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
856 static unw_rec_list
*output_unat_when
PARAMS ((void));
857 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
858 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
859 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
860 static unw_rec_list
*output_lc_when
PARAMS ((void));
861 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
862 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
863 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
864 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
865 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
866 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
867 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
868 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
869 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
870 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
871 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
872 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
873 static unw_rec_list
*output_bsp_when
PARAMS ((void));
874 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
875 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
876 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
877 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
878 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
879 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
880 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
881 static unw_rec_list
*output_rnat_when
PARAMS ((void));
882 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
883 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
884 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
885 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
886 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
887 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
888 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
889 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
890 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
891 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
893 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
895 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
897 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
898 unsigned int, unsigned int));
899 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
900 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
901 static int calc_record_size
PARAMS ((unw_rec_list
*));
902 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
903 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
904 unsigned long, fragS
*,
906 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
907 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
908 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
909 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
910 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
911 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
912 static void free_saved_prologue_counts
PARAMS ((void));
914 /* Determine if application register REGNUM resides only in the integer
915 unit (as opposed to the memory unit). */
917 ar_is_only_in_integer_unit (int reg
)
920 return reg
>= 64 && reg
<= 111;
923 /* Determine if application register REGNUM resides only in the memory
924 unit (as opposed to the integer unit). */
926 ar_is_only_in_memory_unit (int reg
)
929 return reg
>= 0 && reg
<= 47;
932 /* Switch to section NAME and create section if necessary. It's
933 rather ugly that we have to manipulate input_line_pointer but I
934 don't see any other way to accomplish the same thing without
935 changing obj-elf.c (which may be the Right Thing, in the end). */
940 char *saved_input_line_pointer
;
942 saved_input_line_pointer
= input_line_pointer
;
943 input_line_pointer
= name
;
945 input_line_pointer
= saved_input_line_pointer
;
948 /* Map 's' to SHF_IA_64_SHORT. */
951 ia64_elf_section_letter (letter
, ptr_msg
)
956 return SHF_IA_64_SHORT
;
957 else if (letter
== 'o')
958 return SHF_LINK_ORDER
;
960 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
964 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
967 ia64_elf_section_flags (flags
, attr
, type
)
969 int attr
, type ATTRIBUTE_UNUSED
;
971 if (attr
& SHF_IA_64_SHORT
)
972 flags
|= SEC_SMALL_DATA
;
977 ia64_elf_section_type (str
, len
)
981 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
983 if (STREQ (ELF_STRING_ia64_unwind_info
))
986 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
989 if (STREQ (ELF_STRING_ia64_unwind
))
990 return SHT_IA_64_UNWIND
;
992 if (STREQ (ELF_STRING_ia64_unwind_once
))
993 return SHT_IA_64_UNWIND
;
995 if (STREQ ("unwind"))
996 return SHT_IA_64_UNWIND
;
998 if (STREQ ("init_array"))
999 return SHT_INIT_ARRAY
;
1001 if (STREQ ("fini_array"))
1002 return SHT_FINI_ARRAY
;
1009 set_regstack (ins
, locs
, outs
, rots
)
1010 unsigned int ins
, locs
, outs
, rots
;
1012 /* Size of frame. */
1015 sof
= ins
+ locs
+ outs
;
1018 as_bad ("Size of frame exceeds maximum of 96 registers");
1023 as_warn ("Size of rotating registers exceeds frame size");
1026 md
.in
.base
= REG_GR
+ 32;
1027 md
.loc
.base
= md
.in
.base
+ ins
;
1028 md
.out
.base
= md
.loc
.base
+ locs
;
1030 md
.in
.num_regs
= ins
;
1031 md
.loc
.num_regs
= locs
;
1032 md
.out
.num_regs
= outs
;
1033 md
.rot
.num_regs
= rots
;
1040 struct label_fix
*lfix
;
1042 subsegT saved_subseg
;
1045 if (!md
.last_text_seg
)
1048 saved_seg
= now_seg
;
1049 saved_subseg
= now_subseg
;
1051 subseg_set (md
.last_text_seg
, 0);
1053 while (md
.num_slots_in_use
> 0)
1054 emit_one_bundle (); /* force out queued instructions */
1056 /* In case there are labels following the last instruction, resolve
1058 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1060 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1061 symbol_set_frag (lfix
->sym
, frag_now
);
1063 CURR_SLOT
.label_fixups
= 0;
1064 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1066 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1067 symbol_set_frag (lfix
->sym
, frag_now
);
1069 CURR_SLOT
.tag_fixups
= 0;
1071 /* In case there are unwind directives following the last instruction,
1072 resolve those now. We only handle prologue, body, and endp directives
1073 here. Give an error for others. */
1074 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1076 switch (ptr
->r
.type
)
1082 ptr
->slot_number
= (unsigned long) frag_more (0);
1083 ptr
->slot_frag
= frag_now
;
1086 /* Allow any record which doesn't have a "t" field (i.e.,
1087 doesn't relate to a particular instruction). */
1103 as_bad (_("Unwind directive not followed by an instruction."));
1107 unwind
.current_entry
= NULL
;
1109 subseg_set (saved_seg
, saved_subseg
);
1111 if (md
.qp
.X_op
== O_register
)
1112 as_bad ("qualifying predicate not followed by instruction");
1116 ia64_do_align (int nbytes
)
1118 char *saved_input_line_pointer
= input_line_pointer
;
1120 input_line_pointer
= "";
1121 s_align_bytes (nbytes
);
1122 input_line_pointer
= saved_input_line_pointer
;
1126 ia64_cons_align (nbytes
)
1131 char *saved_input_line_pointer
= input_line_pointer
;
1132 input_line_pointer
= "";
1133 s_align_bytes (nbytes
);
1134 input_line_pointer
= saved_input_line_pointer
;
1138 /* Output COUNT bytes to a memory location. */
1139 static unsigned char *vbyte_mem_ptr
= NULL
;
1142 output_vbyte_mem (count
, ptr
, comment
)
1145 char *comment ATTRIBUTE_UNUSED
;
1148 if (vbyte_mem_ptr
== NULL
)
1153 for (x
= 0; x
< count
; x
++)
1154 *(vbyte_mem_ptr
++) = ptr
[x
];
1157 /* Count the number of bytes required for records. */
1158 static int vbyte_count
= 0;
1160 count_output (count
, ptr
, comment
)
1162 char *ptr ATTRIBUTE_UNUSED
;
1163 char *comment ATTRIBUTE_UNUSED
;
1165 vbyte_count
+= count
;
1169 output_R1_format (f
, rtype
, rlen
)
1171 unw_record_type rtype
;
1178 output_R3_format (f
, rtype
, rlen
);
1184 else if (rtype
!= prologue
)
1185 as_bad ("record type is not valid");
1187 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1188 (*f
) (1, &byte
, NULL
);
1192 output_R2_format (f
, mask
, grsave
, rlen
)
1199 mask
= (mask
& 0x0f);
1200 grsave
= (grsave
& 0x7f);
1202 bytes
[0] = (UNW_R2
| (mask
>> 1));
1203 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1204 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1205 (*f
) (count
, bytes
, NULL
);
1209 output_R3_format (f
, rtype
, rlen
)
1211 unw_record_type rtype
;
1218 output_R1_format (f
, rtype
, rlen
);
1224 else if (rtype
!= prologue
)
1225 as_bad ("record type is not valid");
1226 bytes
[0] = (UNW_R3
| r
);
1227 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1228 (*f
) (count
+ 1, bytes
, NULL
);
1232 output_P1_format (f
, brmask
)
1237 byte
= UNW_P1
| (brmask
& 0x1f);
1238 (*f
) (1, &byte
, NULL
);
1242 output_P2_format (f
, brmask
, gr
)
1248 brmask
= (brmask
& 0x1f);
1249 bytes
[0] = UNW_P2
| (brmask
>> 1);
1250 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1251 (*f
) (2, bytes
, NULL
);
1255 output_P3_format (f
, rtype
, reg
)
1257 unw_record_type rtype
;
1302 as_bad ("Invalid record type for P3 format.");
1304 bytes
[0] = (UNW_P3
| (r
>> 1));
1305 bytes
[1] = (((r
& 1) << 7) | reg
);
1306 (*f
) (2, bytes
, NULL
);
1310 output_P4_format (f
, imask
, imask_size
)
1312 unsigned char *imask
;
1313 unsigned long imask_size
;
1316 (*f
) (imask_size
, imask
, NULL
);
1320 output_P5_format (f
, grmask
, frmask
)
1323 unsigned long frmask
;
1326 grmask
= (grmask
& 0x0f);
1329 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1330 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1331 bytes
[3] = (frmask
& 0x000000ff);
1332 (*f
) (4, bytes
, NULL
);
1336 output_P6_format (f
, rtype
, rmask
)
1338 unw_record_type rtype
;
1344 if (rtype
== gr_mem
)
1346 else if (rtype
!= fr_mem
)
1347 as_bad ("Invalid record type for format P6");
1348 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1349 (*f
) (1, &byte
, NULL
);
1353 output_P7_format (f
, rtype
, w1
, w2
)
1355 unw_record_type rtype
;
1362 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1367 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1417 bytes
[0] = (UNW_P7
| r
);
1418 (*f
) (count
, bytes
, NULL
);
1422 output_P8_format (f
, rtype
, t
)
1424 unw_record_type rtype
;
1463 case bspstore_psprel
:
1466 case bspstore_sprel
:
1478 case priunat_when_gr
:
1481 case priunat_psprel
:
1487 case priunat_when_mem
:
1494 count
+= output_leb128 (bytes
+ 2, t
, 0);
1495 (*f
) (count
, bytes
, NULL
);
1499 output_P9_format (f
, grmask
, gr
)
1506 bytes
[1] = (grmask
& 0x0f);
1507 bytes
[2] = (gr
& 0x7f);
1508 (*f
) (3, bytes
, NULL
);
1512 output_P10_format (f
, abi
, context
)
1519 bytes
[1] = (abi
& 0xff);
1520 bytes
[2] = (context
& 0xff);
1521 (*f
) (3, bytes
, NULL
);
1525 output_B1_format (f
, rtype
, label
)
1527 unw_record_type rtype
;
1528 unsigned long label
;
1534 output_B4_format (f
, rtype
, label
);
1537 if (rtype
== copy_state
)
1539 else if (rtype
!= label_state
)
1540 as_bad ("Invalid record type for format B1");
1542 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1543 (*f
) (1, &byte
, NULL
);
1547 output_B2_format (f
, ecount
, t
)
1549 unsigned long ecount
;
1556 output_B3_format (f
, ecount
, t
);
1559 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1560 count
+= output_leb128 (bytes
+ 1, t
, 0);
1561 (*f
) (count
, bytes
, NULL
);
1565 output_B3_format (f
, ecount
, t
)
1567 unsigned long ecount
;
1574 output_B2_format (f
, ecount
, t
);
1578 count
+= output_leb128 (bytes
+ 1, t
, 0);
1579 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1580 (*f
) (count
, bytes
, NULL
);
1584 output_B4_format (f
, rtype
, label
)
1586 unw_record_type rtype
;
1587 unsigned long label
;
1594 output_B1_format (f
, rtype
, label
);
1598 if (rtype
== copy_state
)
1600 else if (rtype
!= label_state
)
1601 as_bad ("Invalid record type for format B1");
1603 bytes
[0] = (UNW_B4
| (r
<< 3));
1604 count
+= output_leb128 (bytes
+ 1, label
, 0);
1605 (*f
) (count
, bytes
, NULL
);
1609 format_ab_reg (ab
, reg
)
1616 ret
= (ab
<< 5) | reg
;
1621 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1623 unw_record_type rtype
;
1633 if (rtype
== spill_sprel
)
1635 else if (rtype
!= spill_psprel
)
1636 as_bad ("Invalid record type for format X1");
1637 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1638 count
+= output_leb128 (bytes
+ 2, t
, 0);
1639 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1640 (*f
) (count
, bytes
, NULL
);
1644 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1653 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1654 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1655 count
+= output_leb128 (bytes
+ 3, t
, 0);
1656 (*f
) (count
, bytes
, NULL
);
1660 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1662 unw_record_type rtype
;
1673 if (rtype
== spill_sprel_p
)
1675 else if (rtype
!= spill_psprel_p
)
1676 as_bad ("Invalid record type for format X3");
1677 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1678 bytes
[2] = format_ab_reg (ab
, reg
);
1679 count
+= output_leb128 (bytes
+ 3, t
, 0);
1680 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1681 (*f
) (count
, bytes
, NULL
);
1685 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1695 bytes
[1] = (qp
& 0x3f);
1696 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1697 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1698 count
+= output_leb128 (bytes
+ 4, t
, 0);
1699 (*f
) (count
, bytes
, NULL
);
1702 /* This function allocates a record list structure, and initializes fields. */
1704 static unw_rec_list
*
1705 alloc_record (unw_record_type t
)
1708 ptr
= xmalloc (sizeof (*ptr
));
1710 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1712 ptr
->next_slot_number
= 0;
1713 ptr
->next_slot_frag
= 0;
1717 /* Dummy unwind record used for calculating the length of the last prologue or
1720 static unw_rec_list
*
1723 unw_rec_list
*ptr
= alloc_record (endp
);
1727 static unw_rec_list
*
1730 unw_rec_list
*ptr
= alloc_record (prologue
);
1731 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1735 static unw_rec_list
*
1736 output_prologue_gr (saved_mask
, reg
)
1737 unsigned int saved_mask
;
1740 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1741 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1742 ptr
->r
.record
.r
.grmask
= saved_mask
;
1743 ptr
->r
.record
.r
.grsave
= reg
;
1747 static unw_rec_list
*
1750 unw_rec_list
*ptr
= alloc_record (body
);
1754 static unw_rec_list
*
1755 output_mem_stack_f (size
)
1758 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1759 ptr
->r
.record
.p
.size
= size
;
1763 static unw_rec_list
*
1764 output_mem_stack_v ()
1766 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1770 static unw_rec_list
*
1774 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1775 ptr
->r
.record
.p
.gr
= gr
;
1779 static unw_rec_list
*
1780 output_psp_sprel (offset
)
1781 unsigned int offset
;
1783 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1784 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1788 static unw_rec_list
*
1791 unw_rec_list
*ptr
= alloc_record (rp_when
);
1795 static unw_rec_list
*
1799 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1800 ptr
->r
.record
.p
.gr
= gr
;
1804 static unw_rec_list
*
1808 unw_rec_list
*ptr
= alloc_record (rp_br
);
1809 ptr
->r
.record
.p
.br
= br
;
1813 static unw_rec_list
*
1814 output_rp_psprel (offset
)
1815 unsigned int offset
;
1817 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1818 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1822 static unw_rec_list
*
1823 output_rp_sprel (offset
)
1824 unsigned int offset
;
1826 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1827 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1831 static unw_rec_list
*
1834 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1838 static unw_rec_list
*
1842 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1843 ptr
->r
.record
.p
.gr
= gr
;
1847 static unw_rec_list
*
1848 output_pfs_psprel (offset
)
1849 unsigned int offset
;
1851 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1852 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1856 static unw_rec_list
*
1857 output_pfs_sprel (offset
)
1858 unsigned int offset
;
1860 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1861 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1865 static unw_rec_list
*
1866 output_preds_when ()
1868 unw_rec_list
*ptr
= alloc_record (preds_when
);
1872 static unw_rec_list
*
1873 output_preds_gr (gr
)
1876 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1877 ptr
->r
.record
.p
.gr
= gr
;
1881 static unw_rec_list
*
1882 output_preds_psprel (offset
)
1883 unsigned int offset
;
1885 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1886 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1890 static unw_rec_list
*
1891 output_preds_sprel (offset
)
1892 unsigned int offset
;
1894 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1895 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1899 static unw_rec_list
*
1900 output_fr_mem (mask
)
1903 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1904 ptr
->r
.record
.p
.rmask
= mask
;
1908 static unw_rec_list
*
1909 output_frgr_mem (gr_mask
, fr_mask
)
1910 unsigned int gr_mask
;
1911 unsigned int fr_mask
;
1913 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1914 ptr
->r
.record
.p
.grmask
= gr_mask
;
1915 ptr
->r
.record
.p
.frmask
= fr_mask
;
1919 static unw_rec_list
*
1920 output_gr_gr (mask
, reg
)
1924 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1925 ptr
->r
.record
.p
.grmask
= mask
;
1926 ptr
->r
.record
.p
.gr
= reg
;
1930 static unw_rec_list
*
1931 output_gr_mem (mask
)
1934 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1935 ptr
->r
.record
.p
.rmask
= mask
;
1939 static unw_rec_list
*
1940 output_br_mem (unsigned int mask
)
1942 unw_rec_list
*ptr
= alloc_record (br_mem
);
1943 ptr
->r
.record
.p
.brmask
= mask
;
1947 static unw_rec_list
*
1948 output_br_gr (save_mask
, reg
)
1949 unsigned int save_mask
;
1952 unw_rec_list
*ptr
= alloc_record (br_gr
);
1953 ptr
->r
.record
.p
.brmask
= save_mask
;
1954 ptr
->r
.record
.p
.gr
= reg
;
1958 static unw_rec_list
*
1959 output_spill_base (offset
)
1960 unsigned int offset
;
1962 unw_rec_list
*ptr
= alloc_record (spill_base
);
1963 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1967 static unw_rec_list
*
1970 unw_rec_list
*ptr
= alloc_record (unat_when
);
1974 static unw_rec_list
*
1978 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1979 ptr
->r
.record
.p
.gr
= gr
;
1983 static unw_rec_list
*
1984 output_unat_psprel (offset
)
1985 unsigned int offset
;
1987 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
1988 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1992 static unw_rec_list
*
1993 output_unat_sprel (offset
)
1994 unsigned int offset
;
1996 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
1997 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2001 static unw_rec_list
*
2004 unw_rec_list
*ptr
= alloc_record (lc_when
);
2008 static unw_rec_list
*
2012 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2013 ptr
->r
.record
.p
.gr
= gr
;
2017 static unw_rec_list
*
2018 output_lc_psprel (offset
)
2019 unsigned int offset
;
2021 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2022 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2026 static unw_rec_list
*
2027 output_lc_sprel (offset
)
2028 unsigned int offset
;
2030 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2031 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2035 static unw_rec_list
*
2038 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2042 static unw_rec_list
*
2046 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2047 ptr
->r
.record
.p
.gr
= gr
;
2051 static unw_rec_list
*
2052 output_fpsr_psprel (offset
)
2053 unsigned int offset
;
2055 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2056 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2060 static unw_rec_list
*
2061 output_fpsr_sprel (offset
)
2062 unsigned int offset
;
2064 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2065 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2069 static unw_rec_list
*
2070 output_priunat_when_gr ()
2072 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2076 static unw_rec_list
*
2077 output_priunat_when_mem ()
2079 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2083 static unw_rec_list
*
2084 output_priunat_gr (gr
)
2087 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2088 ptr
->r
.record
.p
.gr
= gr
;
2092 static unw_rec_list
*
2093 output_priunat_psprel (offset
)
2094 unsigned int offset
;
2096 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2097 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2101 static unw_rec_list
*
2102 output_priunat_sprel (offset
)
2103 unsigned int offset
;
2105 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2106 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2110 static unw_rec_list
*
2113 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2117 static unw_rec_list
*
2121 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2122 ptr
->r
.record
.p
.gr
= gr
;
2126 static unw_rec_list
*
2127 output_bsp_psprel (offset
)
2128 unsigned int offset
;
2130 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2131 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2135 static unw_rec_list
*
2136 output_bsp_sprel (offset
)
2137 unsigned int offset
;
2139 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2140 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2144 static unw_rec_list
*
2145 output_bspstore_when ()
2147 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2151 static unw_rec_list
*
2152 output_bspstore_gr (gr
)
2155 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2156 ptr
->r
.record
.p
.gr
= gr
;
2160 static unw_rec_list
*
2161 output_bspstore_psprel (offset
)
2162 unsigned int offset
;
2164 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2165 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2169 static unw_rec_list
*
2170 output_bspstore_sprel (offset
)
2171 unsigned int offset
;
2173 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2174 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2178 static unw_rec_list
*
2181 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2185 static unw_rec_list
*
2189 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2190 ptr
->r
.record
.p
.gr
= gr
;
2194 static unw_rec_list
*
2195 output_rnat_psprel (offset
)
2196 unsigned int offset
;
2198 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2199 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2203 static unw_rec_list
*
2204 output_rnat_sprel (offset
)
2205 unsigned int offset
;
2207 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2208 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2212 static unw_rec_list
*
2213 output_unwabi (abi
, context
)
2215 unsigned long context
;
2217 unw_rec_list
*ptr
= alloc_record (unwabi
);
2218 ptr
->r
.record
.p
.abi
= abi
;
2219 ptr
->r
.record
.p
.context
= context
;
2223 static unw_rec_list
*
2224 output_epilogue (unsigned long ecount
)
2226 unw_rec_list
*ptr
= alloc_record (epilogue
);
2227 ptr
->r
.record
.b
.ecount
= ecount
;
2231 static unw_rec_list
*
2232 output_label_state (unsigned long label
)
2234 unw_rec_list
*ptr
= alloc_record (label_state
);
2235 ptr
->r
.record
.b
.label
= label
;
2239 static unw_rec_list
*
2240 output_copy_state (unsigned long label
)
2242 unw_rec_list
*ptr
= alloc_record (copy_state
);
2243 ptr
->r
.record
.b
.label
= label
;
2247 static unw_rec_list
*
2248 output_spill_psprel (ab
, reg
, offset
)
2251 unsigned int offset
;
2253 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2254 ptr
->r
.record
.x
.ab
= ab
;
2255 ptr
->r
.record
.x
.reg
= reg
;
2256 ptr
->r
.record
.x
.pspoff
= offset
/ 4;
2260 static unw_rec_list
*
2261 output_spill_sprel (ab
, reg
, offset
)
2264 unsigned int offset
;
2266 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2267 ptr
->r
.record
.x
.ab
= ab
;
2268 ptr
->r
.record
.x
.reg
= reg
;
2269 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2273 static unw_rec_list
*
2274 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2277 unsigned int offset
;
2278 unsigned int predicate
;
2280 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2281 ptr
->r
.record
.x
.ab
= ab
;
2282 ptr
->r
.record
.x
.reg
= reg
;
2283 ptr
->r
.record
.x
.pspoff
= offset
/ 4;
2284 ptr
->r
.record
.x
.qp
= predicate
;
2288 static unw_rec_list
*
2289 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2292 unsigned int offset
;
2293 unsigned int predicate
;
2295 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2296 ptr
->r
.record
.x
.ab
= ab
;
2297 ptr
->r
.record
.x
.reg
= reg
;
2298 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2299 ptr
->r
.record
.x
.qp
= predicate
;
2303 static unw_rec_list
*
2304 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2307 unsigned int targ_reg
;
2310 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2311 ptr
->r
.record
.x
.ab
= ab
;
2312 ptr
->r
.record
.x
.reg
= reg
;
2313 ptr
->r
.record
.x
.treg
= targ_reg
;
2314 ptr
->r
.record
.x
.xy
= xy
;
2318 static unw_rec_list
*
2319 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2322 unsigned int targ_reg
;
2324 unsigned int predicate
;
2326 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2327 ptr
->r
.record
.x
.ab
= ab
;
2328 ptr
->r
.record
.x
.reg
= reg
;
2329 ptr
->r
.record
.x
.treg
= targ_reg
;
2330 ptr
->r
.record
.x
.xy
= xy
;
2331 ptr
->r
.record
.x
.qp
= predicate
;
2335 /* Given a unw_rec_list process the correct format with the
2336 specified function. */
2339 process_one_record (ptr
, f
)
2343 unsigned long fr_mask
, gr_mask
;
2345 switch (ptr
->r
.type
)
2347 /* This is a dummy record that takes up no space in the output. */
2355 /* These are taken care of by prologue/prologue_gr. */
2360 if (ptr
->r
.type
== prologue_gr
)
2361 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2362 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2364 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2366 /* Output descriptor(s) for union of register spills (if any). */
2367 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2368 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2371 if ((fr_mask
& ~0xfUL
) == 0)
2372 output_P6_format (f
, fr_mem
, fr_mask
);
2375 output_P5_format (f
, gr_mask
, fr_mask
);
2380 output_P6_format (f
, gr_mem
, gr_mask
);
2381 if (ptr
->r
.record
.r
.mask
.br_mem
)
2382 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2384 /* output imask descriptor if necessary: */
2385 if (ptr
->r
.record
.r
.mask
.i
)
2386 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2387 ptr
->r
.record
.r
.imask_size
);
2391 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2395 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2396 ptr
->r
.record
.p
.size
);
2409 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2412 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2415 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2423 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2432 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2442 case bspstore_sprel
:
2444 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2447 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2450 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2453 as_bad ("spill_mask record unimplemented.");
2455 case priunat_when_gr
:
2456 case priunat_when_mem
:
2460 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2462 case priunat_psprel
:
2464 case bspstore_psprel
:
2466 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2469 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2472 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2476 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2479 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2480 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2481 ptr
->r
.record
.x
.pspoff
);
2484 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2485 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2486 ptr
->r
.record
.x
.spoff
);
2489 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2490 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2491 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2493 case spill_psprel_p
:
2494 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2495 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2496 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2499 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2500 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2501 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2504 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2505 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2506 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2510 as_bad ("record_type_not_valid");
2515 /* Given a unw_rec_list list, process all the records with
2516 the specified function. */
2518 process_unw_records (list
, f
)
2523 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2524 process_one_record (ptr
, f
);
2527 /* Determine the size of a record list in bytes. */
2529 calc_record_size (list
)
2533 process_unw_records (list
, count_output
);
2537 /* Update IMASK bitmask to reflect the fact that one or more registers
2538 of type TYPE are saved starting at instruction with index T. If N
2539 bits are set in REGMASK, it is assumed that instructions T through
2540 T+N-1 save these registers.
2544 1: instruction saves next fp reg
2545 2: instruction saves next general reg
2546 3: instruction saves next branch reg */
2548 set_imask (region
, regmask
, t
, type
)
2549 unw_rec_list
*region
;
2550 unsigned long regmask
;
2554 unsigned char *imask
;
2555 unsigned long imask_size
;
2559 imask
= region
->r
.record
.r
.mask
.i
;
2560 imask_size
= region
->r
.record
.r
.imask_size
;
2563 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2564 imask
= xmalloc (imask_size
);
2565 memset (imask
, 0, imask_size
);
2567 region
->r
.record
.r
.imask_size
= imask_size
;
2568 region
->r
.record
.r
.mask
.i
= imask
;
2572 pos
= 2 * (3 - t
% 4);
2575 if (i
>= imask_size
)
2577 as_bad ("Ignoring attempt to spill beyond end of region");
2581 imask
[i
] |= (type
& 0x3) << pos
;
2583 regmask
&= (regmask
- 1);
2593 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2594 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2595 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2599 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2600 unsigned long slot_addr
;
2602 unsigned long first_addr
;
2606 unsigned long index
= 0;
2608 /* First time we are called, the initial address and frag are invalid. */
2609 if (first_addr
== 0)
2612 /* If the two addresses are in different frags, then we need to add in
2613 the remaining size of this frag, and then the entire size of intermediate
2615 while (slot_frag
!= first_frag
)
2617 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2621 /* We can get the final addresses only during and after
2623 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2624 index
+= 3 * ((first_frag
->fr_next
->fr_address
2625 - first_frag
->fr_address
2626 - first_frag
->fr_fix
) >> 4);
2629 /* We don't know what the final addresses will be. We try our
2630 best to estimate. */
2631 switch (first_frag
->fr_type
)
2637 as_fatal ("only constant space allocation is supported");
2643 /* Take alignment into account. Assume the worst case
2644 before relaxation. */
2645 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2649 if (first_frag
->fr_symbol
)
2651 as_fatal ("only constant offsets are supported");
2655 index
+= 3 * (first_frag
->fr_offset
>> 4);
2659 /* Add in the full size of the frag converted to instruction slots. */
2660 index
+= 3 * (first_frag
->fr_fix
>> 4);
2661 /* Subtract away the initial part before first_addr. */
2662 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2663 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2665 /* Move to the beginning of the next frag. */
2666 first_frag
= first_frag
->fr_next
;
2667 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2670 /* Add in the used part of the last frag. */
2671 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2672 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2676 /* Optimize unwind record directives. */
2678 static unw_rec_list
*
2679 optimize_unw_records (list
)
2685 /* If the only unwind record is ".prologue" or ".prologue" followed
2686 by ".body", then we can optimize the unwind directives away. */
2687 if (list
->r
.type
== prologue
2688 && (list
->next
->r
.type
== endp
2689 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2695 /* Given a complete record list, process any records which have
2696 unresolved fields, (ie length counts for a prologue). After
2697 this has been run, all necessary information should be available
2698 within each record to generate an image. */
2701 fixup_unw_records (list
, before_relax
)
2705 unw_rec_list
*ptr
, *region
= 0;
2706 unsigned long first_addr
= 0, rlen
= 0, t
;
2707 fragS
*first_frag
= 0;
2709 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2711 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2712 as_bad (" Insn slot not set in unwind record.");
2713 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2714 first_addr
, first_frag
, before_relax
);
2715 switch (ptr
->r
.type
)
2723 unsigned long last_addr
= 0;
2724 fragS
*last_frag
= NULL
;
2726 first_addr
= ptr
->slot_number
;
2727 first_frag
= ptr
->slot_frag
;
2728 /* Find either the next body/prologue start, or the end of
2729 the function, and determine the size of the region. */
2730 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2731 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2732 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2734 last_addr
= last
->slot_number
;
2735 last_frag
= last
->slot_frag
;
2738 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2740 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2741 if (ptr
->r
.type
== body
)
2742 /* End of region. */
2749 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2760 case priunat_when_gr
:
2761 case priunat_when_mem
:
2765 ptr
->r
.record
.p
.t
= t
;
2773 case spill_psprel_p
:
2774 ptr
->r
.record
.x
.t
= t
;
2780 as_bad ("frgr_mem record before region record!\n");
2783 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2784 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2785 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2786 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2791 as_bad ("fr_mem record before region record!\n");
2794 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2795 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2800 as_bad ("gr_mem record before region record!\n");
2803 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2804 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2809 as_bad ("br_mem record before region record!\n");
2812 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2813 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2819 as_bad ("gr_gr record before region record!\n");
2822 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2827 as_bad ("br_gr record before region record!\n");
2830 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2839 /* Estimate the size of a frag before relaxing. We only have one type of frag
2840 to handle here, which is the unwind info frag. */
2843 ia64_estimate_size_before_relax (fragS
*frag
,
2844 asection
*segtype ATTRIBUTE_UNUSED
)
2849 /* ??? This code is identical to the first part of ia64_convert_frag. */
2850 list
= (unw_rec_list
*) frag
->fr_opcode
;
2851 fixup_unw_records (list
, 0);
2853 len
= calc_record_size (list
);
2854 /* pad to pointer-size boundary. */
2855 pad
= len
% md
.pointer_size
;
2857 len
+= md
.pointer_size
- pad
;
2858 /* Add 8 for the header + a pointer for the personality offset. */
2859 size
= len
+ 8 + md
.pointer_size
;
2861 /* fr_var carries the max_chars that we created the fragment with.
2862 We must, of course, have allocated enough memory earlier. */
2863 assert (frag
->fr_var
>= size
);
2865 return frag
->fr_fix
+ size
;
2868 /* This function converts a rs_machine_dependent variant frag into a
2869 normal fill frag with the unwind image from the the record list. */
2871 ia64_convert_frag (fragS
*frag
)
2877 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2878 list
= (unw_rec_list
*) frag
->fr_opcode
;
2879 fixup_unw_records (list
, 0);
2881 len
= calc_record_size (list
);
2882 /* pad to pointer-size boundary. */
2883 pad
= len
% md
.pointer_size
;
2885 len
+= md
.pointer_size
- pad
;
2886 /* Add 8 for the header + a pointer for the personality offset. */
2887 size
= len
+ 8 + md
.pointer_size
;
2889 /* fr_var carries the max_chars that we created the fragment with.
2890 We must, of course, have allocated enough memory earlier. */
2891 assert (frag
->fr_var
>= size
);
2893 /* Initialize the header area. fr_offset is initialized with
2894 unwind.personality_routine. */
2895 if (frag
->fr_offset
)
2897 if (md
.flags
& EF_IA_64_ABI64
)
2898 flag_value
= (bfd_vma
) 3 << 32;
2900 /* 32-bit unwind info block. */
2901 flag_value
= (bfd_vma
) 0x1003 << 32;
2906 md_number_to_chars (frag
->fr_literal
,
2907 (((bfd_vma
) 1 << 48) /* Version. */
2908 | flag_value
/* U & E handler flags. */
2909 | (len
/ md
.pointer_size
)), /* Length. */
2912 /* Skip the header. */
2913 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2914 process_unw_records (list
, output_vbyte_mem
);
2916 /* Fill the padding bytes with zeros. */
2918 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2919 md
.pointer_size
- pad
);
2921 frag
->fr_fix
+= size
;
2922 frag
->fr_type
= rs_fill
;
2924 frag
->fr_offset
= 0;
2928 convert_expr_to_ab_reg (e
, ab
, regp
)
2935 if (e
->X_op
!= O_register
)
2938 reg
= e
->X_add_number
;
2939 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2942 *regp
= reg
- REG_GR
;
2944 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2945 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2948 *regp
= reg
- REG_FR
;
2950 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2953 *regp
= reg
- REG_BR
;
2960 case REG_PR
: *regp
= 0; break;
2961 case REG_PSP
: *regp
= 1; break;
2962 case REG_PRIUNAT
: *regp
= 2; break;
2963 case REG_BR
+ 0: *regp
= 3; break;
2964 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2965 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2966 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2967 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2968 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2969 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2970 case REG_AR
+ AR_LC
: *regp
= 10; break;
2980 convert_expr_to_xy_reg (e
, xy
, regp
)
2987 if (e
->X_op
!= O_register
)
2990 reg
= e
->X_add_number
;
2992 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
2995 *regp
= reg
- REG_GR
;
2997 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3000 *regp
= reg
- REG_FR
;
3002 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3005 *regp
= reg
- REG_BR
;
3015 /* The current frag is an alignment frag. */
3016 align_frag
= frag_now
;
3017 s_align_bytes (arg
);
3022 int dummy ATTRIBUTE_UNUSED
;
3027 radix
= *input_line_pointer
++;
3029 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3031 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3032 ignore_rest_of_line ();
3037 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3039 dot_special_section (which
)
3042 set_section ((char *) special_section_name
[which
]);
3046 add_unwind_entry (ptr
)
3050 unwind
.tail
->next
= ptr
;
3055 /* The current entry can in fact be a chain of unwind entries. */
3056 if (unwind
.current_entry
== NULL
)
3057 unwind
.current_entry
= ptr
;
3062 int dummy ATTRIBUTE_UNUSED
;
3068 if (e
.X_op
!= O_constant
)
3069 as_bad ("Operand to .fframe must be a constant");
3071 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3076 int dummy ATTRIBUTE_UNUSED
;
3082 reg
= e
.X_add_number
- REG_GR
;
3083 if (e
.X_op
== O_register
&& reg
< 128)
3085 add_unwind_entry (output_mem_stack_v ());
3086 if (! (unwind
.prologue_mask
& 2))
3087 add_unwind_entry (output_psp_gr (reg
));
3090 as_bad ("First operand to .vframe must be a general register");
3094 dot_vframesp (dummy
)
3095 int dummy ATTRIBUTE_UNUSED
;
3100 if (e
.X_op
== O_constant
)
3102 add_unwind_entry (output_mem_stack_v ());
3103 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3106 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3110 dot_vframepsp (dummy
)
3111 int dummy ATTRIBUTE_UNUSED
;
3116 if (e
.X_op
== O_constant
)
3118 add_unwind_entry (output_mem_stack_v ());
3119 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3122 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3127 int dummy ATTRIBUTE_UNUSED
;
3133 sep
= parse_operand (&e1
);
3135 as_bad ("No second operand to .save");
3136 sep
= parse_operand (&e2
);
3138 reg1
= e1
.X_add_number
;
3139 reg2
= e2
.X_add_number
- REG_GR
;
3141 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3142 if (e1
.X_op
== O_register
)
3144 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3148 case REG_AR
+ AR_BSP
:
3149 add_unwind_entry (output_bsp_when ());
3150 add_unwind_entry (output_bsp_gr (reg2
));
3152 case REG_AR
+ AR_BSPSTORE
:
3153 add_unwind_entry (output_bspstore_when ());
3154 add_unwind_entry (output_bspstore_gr (reg2
));
3156 case REG_AR
+ AR_RNAT
:
3157 add_unwind_entry (output_rnat_when ());
3158 add_unwind_entry (output_rnat_gr (reg2
));
3160 case REG_AR
+ AR_UNAT
:
3161 add_unwind_entry (output_unat_when ());
3162 add_unwind_entry (output_unat_gr (reg2
));
3164 case REG_AR
+ AR_FPSR
:
3165 add_unwind_entry (output_fpsr_when ());
3166 add_unwind_entry (output_fpsr_gr (reg2
));
3168 case REG_AR
+ AR_PFS
:
3169 add_unwind_entry (output_pfs_when ());
3170 if (! (unwind
.prologue_mask
& 4))
3171 add_unwind_entry (output_pfs_gr (reg2
));
3173 case REG_AR
+ AR_LC
:
3174 add_unwind_entry (output_lc_when ());
3175 add_unwind_entry (output_lc_gr (reg2
));
3178 add_unwind_entry (output_rp_when ());
3179 if (! (unwind
.prologue_mask
& 8))
3180 add_unwind_entry (output_rp_gr (reg2
));
3183 add_unwind_entry (output_preds_when ());
3184 if (! (unwind
.prologue_mask
& 1))
3185 add_unwind_entry (output_preds_gr (reg2
));
3188 add_unwind_entry (output_priunat_when_gr ());
3189 add_unwind_entry (output_priunat_gr (reg2
));
3192 as_bad ("First operand not a valid register");
3196 as_bad (" Second operand not a valid register");
3199 as_bad ("First operand not a register");
3204 int dummy ATTRIBUTE_UNUSED
;
3207 unsigned long ecount
; /* # of _additional_ regions to pop */
3210 sep
= parse_operand (&e1
);
3211 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3213 as_bad ("First operand to .restore must be stack pointer (sp)");
3219 parse_operand (&e2
);
3220 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3222 as_bad ("Second operand to .restore must be a constant >= 0");
3225 ecount
= e2
.X_add_number
;
3228 ecount
= unwind
.prologue_count
- 1;
3230 if (ecount
>= unwind
.prologue_count
)
3232 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3233 ecount
+ 1, unwind
.prologue_count
);
3237 add_unwind_entry (output_epilogue (ecount
));
3239 if (ecount
< unwind
.prologue_count
)
3240 unwind
.prologue_count
-= ecount
+ 1;
3242 unwind
.prologue_count
= 0;
3246 dot_restorereg (dummy
)
3247 int dummy ATTRIBUTE_UNUSED
;
3249 unsigned int ab
, reg
;
3254 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3256 as_bad ("First operand to .restorereg must be a preserved register");
3259 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3263 dot_restorereg_p (dummy
)
3264 int dummy ATTRIBUTE_UNUSED
;
3266 unsigned int qp
, ab
, reg
;
3270 sep
= parse_operand (&e1
);
3273 as_bad ("No second operand to .restorereg.p");
3277 parse_operand (&e2
);
3279 qp
= e1
.X_add_number
- REG_P
;
3280 if (e1
.X_op
!= O_register
|| qp
> 63)
3282 as_bad ("First operand to .restorereg.p must be a predicate");
3286 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3288 as_bad ("Second operand to .restorereg.p must be a preserved register");
3291 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3294 static char *special_linkonce_name
[] =
3296 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3300 start_unwind_section (const segT text_seg
, int sec_index
)
3303 Use a slightly ugly scheme to derive the unwind section names from
3304 the text section name:
3306 text sect. unwind table sect.
3307 name: name: comments:
3308 ---------- ----------------- --------------------------------
3310 .text.foo .IA_64.unwind.text.foo
3311 .foo .IA_64.unwind.foo
3313 .gnu.linkonce.ia64unw.foo
3314 _info .IA_64.unwind_info gas issues error message (ditto)
3315 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3317 This mapping is done so that:
3319 (a) An object file with unwind info only in .text will use
3320 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3321 This follows the letter of the ABI and also ensures backwards
3322 compatibility with older toolchains.
3324 (b) An object file with unwind info in multiple text sections
3325 will use separate unwind sections for each text section.
3326 This allows us to properly set the "sh_info" and "sh_link"
3327 fields in SHT_IA_64_UNWIND as required by the ABI and also
3328 lets GNU ld support programs with multiple segments
3329 containing unwind info (as might be the case for certain
3330 embedded applications).
3332 (c) An error is issued if there would be a name clash.
3335 const char *text_name
, *sec_text_name
;
3337 const char *prefix
= special_section_name
[sec_index
];
3339 size_t prefix_len
, suffix_len
, sec_name_len
;
3341 sec_text_name
= segment_name (text_seg
);
3342 text_name
= sec_text_name
;
3343 if (strncmp (text_name
, "_info", 5) == 0)
3345 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3347 ignore_rest_of_line ();
3350 if (strcmp (text_name
, ".text") == 0)
3353 /* Build the unwind section name by appending the (possibly stripped)
3354 text section name to the unwind prefix. */
3356 if (strncmp (text_name
, ".gnu.linkonce.t.",
3357 sizeof (".gnu.linkonce.t.") - 1) == 0)
3359 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3360 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3363 prefix_len
= strlen (prefix
);
3364 suffix_len
= strlen (suffix
);
3365 sec_name_len
= prefix_len
+ suffix_len
;
3366 sec_name
= alloca (sec_name_len
+ 1);
3367 memcpy (sec_name
, prefix
, prefix_len
);
3368 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3369 sec_name
[sec_name_len
] = '\0';
3371 /* Handle COMDAT group. */
3372 if (suffix
== text_name
&& (text_seg
->flags
& SEC_LINK_ONCE
) != 0)
3375 size_t len
, group_name_len
;
3376 const char *group_name
= elf_group_name (text_seg
);
3378 if (group_name
== NULL
)
3380 as_bad ("Group section `%s' has no group signature",
3382 ignore_rest_of_line ();
3385 /* We have to construct a fake section directive. */
3386 group_name_len
= strlen (group_name
);
3388 + 16 /* ,"aG",@progbits, */
3389 + group_name_len
/* ,group_name */
3392 section
= alloca (len
+ 1);
3393 memcpy (section
, sec_name
, sec_name_len
);
3394 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3395 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3396 memcpy (section
+ len
- 7, ",comdat", 7);
3397 section
[len
] = '\0';
3398 set_section (section
);
3402 set_section (sec_name
);
3403 bfd_set_section_flags (stdoutput
, now_seg
,
3404 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3409 generate_unwind_image (const segT text_seg
)
3414 /* Mark the end of the unwind info, so that we can compute the size of the
3415 last unwind region. */
3416 add_unwind_entry (output_endp ());
3418 /* Force out pending instructions, to make sure all unwind records have
3419 a valid slot_number field. */
3420 ia64_flush_insns ();
3422 /* Generate the unwind record. */
3423 list
= optimize_unw_records (unwind
.list
);
3424 fixup_unw_records (list
, 1);
3425 size
= calc_record_size (list
);
3427 if (size
> 0 || unwind
.force_unwind_entry
)
3429 unwind
.force_unwind_entry
= 0;
3430 /* pad to pointer-size boundary. */
3431 pad
= size
% md
.pointer_size
;
3433 size
+= md
.pointer_size
- pad
;
3434 /* Add 8 for the header + a pointer for the personality
3436 size
+= 8 + md
.pointer_size
;
3439 /* If there are unwind records, switch sections, and output the info. */
3443 bfd_reloc_code_real_type reloc
;
3445 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3447 /* Make sure the section has 4 byte alignment for ILP32 and
3448 8 byte alignment for LP64. */
3449 frag_align (md
.pointer_size_shift
, 0, 0);
3450 record_alignment (now_seg
, md
.pointer_size_shift
);
3452 /* Set expression which points to start of unwind descriptor area. */
3453 unwind
.info
= expr_build_dot ();
3455 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3456 (offsetT
) (long) unwind
.personality_routine
,
3459 /* Add the personality address to the image. */
3460 if (unwind
.personality_routine
!= 0)
3462 exp
.X_op
= O_symbol
;
3463 exp
.X_add_symbol
= unwind
.personality_routine
;
3464 exp
.X_add_number
= 0;
3466 if (md
.flags
& EF_IA_64_BE
)
3468 if (md
.flags
& EF_IA_64_ABI64
)
3469 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3471 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3475 if (md
.flags
& EF_IA_64_ABI64
)
3476 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3478 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3481 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3482 md
.pointer_size
, &exp
, 0, reloc
);
3483 unwind
.personality_routine
= 0;
3487 free_saved_prologue_counts ();
3488 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3492 dot_handlerdata (dummy
)
3493 int dummy ATTRIBUTE_UNUSED
;
3495 unwind
.force_unwind_entry
= 1;
3497 /* Remember which segment we're in so we can switch back after .endp */
3498 unwind
.saved_text_seg
= now_seg
;
3499 unwind
.saved_text_subseg
= now_subseg
;
3501 /* Generate unwind info into unwind-info section and then leave that
3502 section as the currently active one so dataXX directives go into
3503 the language specific data area of the unwind info block. */
3504 generate_unwind_image (now_seg
);
3505 demand_empty_rest_of_line ();
3509 dot_unwentry (dummy
)
3510 int dummy ATTRIBUTE_UNUSED
;
3512 unwind
.force_unwind_entry
= 1;
3513 demand_empty_rest_of_line ();
3518 int dummy ATTRIBUTE_UNUSED
;
3524 reg
= e
.X_add_number
- REG_BR
;
3525 if (e
.X_op
== O_register
&& reg
< 8)
3526 add_unwind_entry (output_rp_br (reg
));
3528 as_bad ("First operand not a valid branch register");
3532 dot_savemem (psprel
)
3539 sep
= parse_operand (&e1
);
3541 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3542 sep
= parse_operand (&e2
);
3544 reg1
= e1
.X_add_number
;
3545 val
= e2
.X_add_number
;
3547 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3548 if (e1
.X_op
== O_register
)
3550 if (e2
.X_op
== O_constant
)
3554 case REG_AR
+ AR_BSP
:
3555 add_unwind_entry (output_bsp_when ());
3556 add_unwind_entry ((psprel
3558 : output_bsp_sprel
) (val
));
3560 case REG_AR
+ AR_BSPSTORE
:
3561 add_unwind_entry (output_bspstore_when ());
3562 add_unwind_entry ((psprel
3563 ? output_bspstore_psprel
3564 : output_bspstore_sprel
) (val
));
3566 case REG_AR
+ AR_RNAT
:
3567 add_unwind_entry (output_rnat_when ());
3568 add_unwind_entry ((psprel
3569 ? output_rnat_psprel
3570 : output_rnat_sprel
) (val
));
3572 case REG_AR
+ AR_UNAT
:
3573 add_unwind_entry (output_unat_when ());
3574 add_unwind_entry ((psprel
3575 ? output_unat_psprel
3576 : output_unat_sprel
) (val
));
3578 case REG_AR
+ AR_FPSR
:
3579 add_unwind_entry (output_fpsr_when ());
3580 add_unwind_entry ((psprel
3581 ? output_fpsr_psprel
3582 : output_fpsr_sprel
) (val
));
3584 case REG_AR
+ AR_PFS
:
3585 add_unwind_entry (output_pfs_when ());
3586 add_unwind_entry ((psprel
3588 : output_pfs_sprel
) (val
));
3590 case REG_AR
+ AR_LC
:
3591 add_unwind_entry (output_lc_when ());
3592 add_unwind_entry ((psprel
3594 : output_lc_sprel
) (val
));
3597 add_unwind_entry (output_rp_when ());
3598 add_unwind_entry ((psprel
3600 : output_rp_sprel
) (val
));
3603 add_unwind_entry (output_preds_when ());
3604 add_unwind_entry ((psprel
3605 ? output_preds_psprel
3606 : output_preds_sprel
) (val
));
3609 add_unwind_entry (output_priunat_when_mem ());
3610 add_unwind_entry ((psprel
3611 ? output_priunat_psprel
3612 : output_priunat_sprel
) (val
));
3615 as_bad ("First operand not a valid register");
3619 as_bad (" Second operand not a valid constant");
3622 as_bad ("First operand not a register");
3627 int dummy ATTRIBUTE_UNUSED
;
3631 sep
= parse_operand (&e1
);
3633 parse_operand (&e2
);
3635 if (e1
.X_op
!= O_constant
)
3636 as_bad ("First operand to .save.g must be a constant.");
3639 int grmask
= e1
.X_add_number
;
3641 add_unwind_entry (output_gr_mem (grmask
));
3644 int reg
= e2
.X_add_number
- REG_GR
;
3645 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3646 add_unwind_entry (output_gr_gr (grmask
, reg
));
3648 as_bad ("Second operand is an invalid register.");
3655 int dummy ATTRIBUTE_UNUSED
;
3659 sep
= parse_operand (&e1
);
3661 if (e1
.X_op
!= O_constant
)
3662 as_bad ("Operand to .save.f must be a constant.");
3664 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3669 int dummy ATTRIBUTE_UNUSED
;
3676 sep
= parse_operand (&e1
);
3677 if (e1
.X_op
!= O_constant
)
3679 as_bad ("First operand to .save.b must be a constant.");
3682 brmask
= e1
.X_add_number
;
3686 sep
= parse_operand (&e2
);
3687 reg
= e2
.X_add_number
- REG_GR
;
3688 if (e2
.X_op
!= O_register
|| reg
> 127)
3690 as_bad ("Second operand to .save.b must be a general register.");
3693 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3696 add_unwind_entry (output_br_mem (brmask
));
3698 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3699 demand_empty_rest_of_line ();
3704 int dummy ATTRIBUTE_UNUSED
;
3708 sep
= parse_operand (&e1
);
3710 parse_operand (&e2
);
3712 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3713 as_bad ("Both operands of .save.gf must be constants.");
3716 int grmask
= e1
.X_add_number
;
3717 int frmask
= e2
.X_add_number
;
3718 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3724 int dummy ATTRIBUTE_UNUSED
;
3729 sep
= parse_operand (&e
);
3730 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3731 demand_empty_rest_of_line ();
3733 if (e
.X_op
!= O_constant
)
3734 as_bad ("Operand to .spill must be a constant");
3736 add_unwind_entry (output_spill_base (e
.X_add_number
));
3740 dot_spillreg (dummy
)
3741 int dummy ATTRIBUTE_UNUSED
;
3743 int sep
, ab
, xy
, reg
, treg
;
3746 sep
= parse_operand (&e1
);
3749 as_bad ("No second operand to .spillreg");
3753 parse_operand (&e2
);
3755 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3757 as_bad ("First operand to .spillreg must be a preserved register");
3761 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3763 as_bad ("Second operand to .spillreg must be a register");
3767 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3771 dot_spillmem (psprel
)
3777 sep
= parse_operand (&e1
);
3780 as_bad ("Second operand missing");
3784 parse_operand (&e2
);
3786 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3788 as_bad ("First operand to .spill%s must be a preserved register",
3789 psprel
? "psp" : "sp");
3793 if (e2
.X_op
!= O_constant
)
3795 as_bad ("Second operand to .spill%s must be a constant",
3796 psprel
? "psp" : "sp");
3801 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
3803 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
3807 dot_spillreg_p (dummy
)
3808 int dummy ATTRIBUTE_UNUSED
;
3810 int sep
, ab
, xy
, reg
, treg
;
3811 expressionS e1
, e2
, e3
;
3814 sep
= parse_operand (&e1
);
3817 as_bad ("No second and third operand to .spillreg.p");
3821 sep
= parse_operand (&e2
);
3824 as_bad ("No third operand to .spillreg.p");
3828 parse_operand (&e3
);
3830 qp
= e1
.X_add_number
- REG_P
;
3832 if (e1
.X_op
!= O_register
|| qp
> 63)
3834 as_bad ("First operand to .spillreg.p must be a predicate");
3838 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3840 as_bad ("Second operand to .spillreg.p must be a preserved register");
3844 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
3846 as_bad ("Third operand to .spillreg.p must be a register");
3850 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
3854 dot_spillmem_p (psprel
)
3857 expressionS e1
, e2
, e3
;
3861 sep
= parse_operand (&e1
);
3864 as_bad ("Second operand missing");
3868 parse_operand (&e2
);
3871 as_bad ("Second operand missing");
3875 parse_operand (&e3
);
3877 qp
= e1
.X_add_number
- REG_P
;
3878 if (e1
.X_op
!= O_register
|| qp
> 63)
3880 as_bad ("First operand to .spill%s_p must be a predicate",
3881 psprel
? "psp" : "sp");
3885 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3887 as_bad ("Second operand to .spill%s_p must be a preserved register",
3888 psprel
? "psp" : "sp");
3892 if (e3
.X_op
!= O_constant
)
3894 as_bad ("Third operand to .spill%s_p must be a constant",
3895 psprel
? "psp" : "sp");
3900 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3902 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3906 get_saved_prologue_count (lbl
)
3909 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3911 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3915 return lpc
->prologue_count
;
3917 as_bad ("Missing .label_state %ld", lbl
);
3922 save_prologue_count (lbl
, count
)
3926 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3928 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3932 lpc
->prologue_count
= count
;
3935 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
3937 new_lpc
->next
= unwind
.saved_prologue_counts
;
3938 new_lpc
->label_number
= lbl
;
3939 new_lpc
->prologue_count
= count
;
3940 unwind
.saved_prologue_counts
= new_lpc
;
3945 free_saved_prologue_counts ()
3947 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3948 label_prologue_count
*next
;
3957 unwind
.saved_prologue_counts
= NULL
;
3961 dot_label_state (dummy
)
3962 int dummy ATTRIBUTE_UNUSED
;
3967 if (e
.X_op
!= O_constant
)
3969 as_bad ("Operand to .label_state must be a constant");
3972 add_unwind_entry (output_label_state (e
.X_add_number
));
3973 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
3977 dot_copy_state (dummy
)
3978 int dummy ATTRIBUTE_UNUSED
;
3983 if (e
.X_op
!= O_constant
)
3985 as_bad ("Operand to .copy_state must be a constant");
3988 add_unwind_entry (output_copy_state (e
.X_add_number
));
3989 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
3994 int dummy ATTRIBUTE_UNUSED
;
3999 sep
= parse_operand (&e1
);
4002 as_bad ("Second operand to .unwabi missing");
4005 sep
= parse_operand (&e2
);
4006 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4007 demand_empty_rest_of_line ();
4009 if (e1
.X_op
!= O_constant
)
4011 as_bad ("First operand to .unwabi must be a constant");
4015 if (e2
.X_op
!= O_constant
)
4017 as_bad ("Second operand to .unwabi must be a constant");
4021 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4025 dot_personality (dummy
)
4026 int dummy ATTRIBUTE_UNUSED
;
4030 name
= input_line_pointer
;
4031 c
= get_symbol_end ();
4032 p
= input_line_pointer
;
4033 unwind
.personality_routine
= symbol_find_or_make (name
);
4034 unwind
.force_unwind_entry
= 1;
4037 demand_empty_rest_of_line ();
4042 int dummy ATTRIBUTE_UNUSED
;
4047 unwind
.proc_start
= expr_build_dot ();
4048 /* Parse names of main and alternate entry points and mark them as
4049 function symbols: */
4053 name
= input_line_pointer
;
4054 c
= get_symbol_end ();
4055 p
= input_line_pointer
;
4056 sym
= symbol_find_or_make (name
);
4057 if (unwind
.proc_start
== 0)
4059 unwind
.proc_start
= sym
;
4061 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4064 if (*input_line_pointer
!= ',')
4066 ++input_line_pointer
;
4068 demand_empty_rest_of_line ();
4071 unwind
.prologue_count
= 0;
4072 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4073 unwind
.personality_routine
= 0;
4078 int dummy ATTRIBUTE_UNUSED
;
4080 unwind
.prologue
= 0;
4081 unwind
.prologue_mask
= 0;
4083 add_unwind_entry (output_body ());
4084 demand_empty_rest_of_line ();
4088 dot_prologue (dummy
)
4089 int dummy ATTRIBUTE_UNUSED
;
4092 int mask
= 0, grsave
= 0;
4094 if (!is_it_end_of_statement ())
4097 sep
= parse_operand (&e1
);
4099 as_bad ("No second operand to .prologue");
4100 sep
= parse_operand (&e2
);
4101 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4102 demand_empty_rest_of_line ();
4104 if (e1
.X_op
== O_constant
)
4106 mask
= e1
.X_add_number
;
4108 if (e2
.X_op
== O_constant
)
4109 grsave
= e2
.X_add_number
;
4110 else if (e2
.X_op
== O_register
4111 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4114 as_bad ("Second operand not a constant or general register");
4116 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4119 as_bad ("First operand not a constant");
4122 add_unwind_entry (output_prologue ());
4124 unwind
.prologue
= 1;
4125 unwind
.prologue_mask
= mask
;
4126 ++unwind
.prologue_count
;
4131 int dummy ATTRIBUTE_UNUSED
;
4135 int bytes_per_address
;
4138 subsegT saved_subseg
;
4142 if (unwind
.saved_text_seg
)
4144 saved_seg
= unwind
.saved_text_seg
;
4145 saved_subseg
= unwind
.saved_text_subseg
;
4146 unwind
.saved_text_seg
= NULL
;
4150 saved_seg
= now_seg
;
4151 saved_subseg
= now_subseg
;
4154 insn_group_break (1, 0, 0);
4156 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4158 generate_unwind_image (saved_seg
);
4160 if (unwind
.info
|| unwind
.force_unwind_entry
)
4162 subseg_set (md
.last_text_seg
, 0);
4163 unwind
.proc_end
= expr_build_dot ();
4165 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4167 /* Make sure that section has 4 byte alignment for ILP32 and
4168 8 byte alignment for LP64. */
4169 record_alignment (now_seg
, md
.pointer_size_shift
);
4171 /* Need space for 3 pointers for procedure start, procedure end,
4173 ptr
= frag_more (3 * md
.pointer_size
);
4174 where
= frag_now_fix () - (3 * md
.pointer_size
);
4175 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4177 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4178 e
.X_op
= O_pseudo_fixup
;
4179 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4181 e
.X_add_symbol
= unwind
.proc_start
;
4182 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4184 e
.X_op
= O_pseudo_fixup
;
4185 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4187 e
.X_add_symbol
= unwind
.proc_end
;
4188 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4189 bytes_per_address
, &e
);
4193 e
.X_op
= O_pseudo_fixup
;
4194 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4196 e
.X_add_symbol
= unwind
.info
;
4197 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4198 bytes_per_address
, &e
);
4201 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4205 subseg_set (saved_seg
, saved_subseg
);
4207 /* Parse names of main and alternate entry points and set symbol sizes. */
4211 name
= input_line_pointer
;
4212 c
= get_symbol_end ();
4213 p
= input_line_pointer
;
4214 sym
= symbol_find (name
);
4215 if (sym
&& unwind
.proc_start
4216 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4217 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4219 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4220 fragS
*frag
= symbol_get_frag (sym
);
4222 /* Check whether the function label is at or beyond last
4224 while (fr
&& fr
!= frag
)
4228 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4229 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4232 symbol_get_obj (sym
)->size
=
4233 (expressionS
*) xmalloc (sizeof (expressionS
));
4234 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4235 symbol_get_obj (sym
)->size
->X_add_symbol
4236 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4237 frag_now_fix (), frag_now
);
4238 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4239 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4245 if (*input_line_pointer
!= ',')
4247 ++input_line_pointer
;
4249 demand_empty_rest_of_line ();
4250 unwind
.proc_start
= unwind
.proc_end
= unwind
.info
= 0;
4254 dot_template (template)
4257 CURR_SLOT
.user_template
= template;
4262 int dummy ATTRIBUTE_UNUSED
;
4264 int ins
, locs
, outs
, rots
;
4266 if (is_it_end_of_statement ())
4267 ins
= locs
= outs
= rots
= 0;
4270 ins
= get_absolute_expression ();
4271 if (*input_line_pointer
++ != ',')
4273 locs
= get_absolute_expression ();
4274 if (*input_line_pointer
++ != ',')
4276 outs
= get_absolute_expression ();
4277 if (*input_line_pointer
++ != ',')
4279 rots
= get_absolute_expression ();
4281 set_regstack (ins
, locs
, outs
, rots
);
4285 as_bad ("Comma expected");
4286 ignore_rest_of_line ();
4293 unsigned num_regs
, num_alloced
= 0;
4294 struct dynreg
**drpp
, *dr
;
4295 int ch
, base_reg
= 0;
4301 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4302 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4303 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4307 /* First, remove existing names from hash table. */
4308 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4310 hash_delete (md
.dynreg_hash
, dr
->name
);
4314 drpp
= &md
.dynreg
[type
];
4317 start
= input_line_pointer
;
4318 ch
= get_symbol_end ();
4319 *input_line_pointer
= ch
;
4320 len
= (input_line_pointer
- start
);
4323 if (*input_line_pointer
!= '[')
4325 as_bad ("Expected '['");
4328 ++input_line_pointer
; /* skip '[' */
4330 num_regs
= get_absolute_expression ();
4332 if (*input_line_pointer
++ != ']')
4334 as_bad ("Expected ']'");
4339 num_alloced
+= num_regs
;
4343 if (num_alloced
> md
.rot
.num_regs
)
4345 as_bad ("Used more than the declared %d rotating registers",
4351 if (num_alloced
> 96)
4353 as_bad ("Used more than the available 96 rotating registers");
4358 if (num_alloced
> 48)
4360 as_bad ("Used more than the available 48 rotating registers");
4369 name
= obstack_alloc (¬es
, len
+ 1);
4370 memcpy (name
, start
, len
);
4375 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4376 memset (*drpp
, 0, sizeof (*dr
));
4381 dr
->num_regs
= num_regs
;
4382 dr
->base
= base_reg
;
4384 base_reg
+= num_regs
;
4386 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4388 as_bad ("Attempt to redefine register set `%s'", name
);
4392 if (*input_line_pointer
!= ',')
4394 ++input_line_pointer
; /* skip comma */
4397 demand_empty_rest_of_line ();
4401 ignore_rest_of_line ();
4405 dot_byteorder (byteorder
)
4408 segment_info_type
*seginfo
= seg_info (now_seg
);
4410 if (byteorder
== -1)
4412 if (seginfo
->tc_segment_info_data
.endian
== 0)
4413 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4414 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4417 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4419 if (target_big_endian
!= byteorder
)
4421 target_big_endian
= byteorder
;
4422 if (target_big_endian
)
4424 ia64_number_to_chars
= number_to_chars_bigendian
;
4425 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4429 ia64_number_to_chars
= number_to_chars_littleendian
;
4430 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4437 int dummy ATTRIBUTE_UNUSED
;
4444 option
= input_line_pointer
;
4445 ch
= get_symbol_end ();
4446 if (strcmp (option
, "lsb") == 0)
4447 md
.flags
&= ~EF_IA_64_BE
;
4448 else if (strcmp (option
, "msb") == 0)
4449 md
.flags
|= EF_IA_64_BE
;
4450 else if (strcmp (option
, "abi32") == 0)
4451 md
.flags
&= ~EF_IA_64_ABI64
;
4452 else if (strcmp (option
, "abi64") == 0)
4453 md
.flags
|= EF_IA_64_ABI64
;
4455 as_bad ("Unknown psr option `%s'", option
);
4456 *input_line_pointer
= ch
;
4459 if (*input_line_pointer
!= ',')
4462 ++input_line_pointer
;
4465 demand_empty_rest_of_line ();
4470 int dummy ATTRIBUTE_UNUSED
;
4472 new_logical_line (0, get_absolute_expression ());
4473 demand_empty_rest_of_line ();
4477 parse_section_name ()
4483 if (*input_line_pointer
!= '"')
4485 as_bad ("Missing section name");
4486 ignore_rest_of_line ();
4489 name
= demand_copy_C_string (&len
);
4492 ignore_rest_of_line ();
4496 if (*input_line_pointer
!= ',')
4498 as_bad ("Comma expected after section name");
4499 ignore_rest_of_line ();
4502 ++input_line_pointer
; /* skip comma */
4510 char *name
= parse_section_name ();
4514 md
.keep_pending_output
= 1;
4517 obj_elf_previous (0);
4518 md
.keep_pending_output
= 0;
4521 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4524 stmt_float_cons (kind
)
4545 ia64_do_align (alignment
);
4553 int saved_auto_align
= md
.auto_align
;
4557 md
.auto_align
= saved_auto_align
;
4561 dot_xfloat_cons (kind
)
4564 char *name
= parse_section_name ();
4568 md
.keep_pending_output
= 1;
4570 stmt_float_cons (kind
);
4571 obj_elf_previous (0);
4572 md
.keep_pending_output
= 0;
4576 dot_xstringer (zero
)
4579 char *name
= parse_section_name ();
4583 md
.keep_pending_output
= 1;
4586 obj_elf_previous (0);
4587 md
.keep_pending_output
= 0;
4594 int saved_auto_align
= md
.auto_align
;
4595 char *name
= parse_section_name ();
4599 md
.keep_pending_output
= 1;
4603 md
.auto_align
= saved_auto_align
;
4604 obj_elf_previous (0);
4605 md
.keep_pending_output
= 0;
4609 dot_xfloat_cons_ua (kind
)
4612 int saved_auto_align
= md
.auto_align
;
4613 char *name
= parse_section_name ();
4617 md
.keep_pending_output
= 1;
4620 stmt_float_cons (kind
);
4621 md
.auto_align
= saved_auto_align
;
4622 obj_elf_previous (0);
4623 md
.keep_pending_output
= 0;
4626 /* .reg.val <regname>,value */
4630 int dummy ATTRIBUTE_UNUSED
;
4635 if (reg
.X_op
!= O_register
)
4637 as_bad (_("Register name expected"));
4638 ignore_rest_of_line ();
4640 else if (*input_line_pointer
++ != ',')
4642 as_bad (_("Comma expected"));
4643 ignore_rest_of_line ();
4647 valueT value
= get_absolute_expression ();
4648 int regno
= reg
.X_add_number
;
4649 if (regno
< REG_GR
|| regno
> REG_GR
+ 128)
4650 as_warn (_("Register value annotation ignored"));
4653 gr_values
[regno
- REG_GR
].known
= 1;
4654 gr_values
[regno
- REG_GR
].value
= value
;
4655 gr_values
[regno
- REG_GR
].path
= md
.path
;
4658 demand_empty_rest_of_line ();
4663 .serialize.instruction
4666 dot_serialize (type
)
4669 insn_group_break (0, 0, 0);
4671 instruction_serialization ();
4673 data_serialization ();
4674 insn_group_break (0, 0, 0);
4675 demand_empty_rest_of_line ();
4678 /* select dv checking mode
4683 A stop is inserted when changing modes
4690 if (md
.manual_bundling
)
4691 as_warn (_("Directive invalid within a bundle"));
4693 if (type
== 'E' || type
== 'A')
4694 md
.mode_explicitly_set
= 0;
4696 md
.mode_explicitly_set
= 1;
4703 if (md
.explicit_mode
)
4704 insn_group_break (1, 0, 0);
4705 md
.explicit_mode
= 0;
4709 if (!md
.explicit_mode
)
4710 insn_group_break (1, 0, 0);
4711 md
.explicit_mode
= 1;
4715 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4716 insn_group_break (1, 0, 0);
4717 md
.explicit_mode
= md
.default_explicit_mode
;
4718 md
.mode_explicitly_set
= 0;
4729 for (regno
= 0; regno
< 64; regno
++)
4731 if (mask
& ((valueT
) 1 << regno
))
4733 fprintf (stderr
, "%s p%d", comma
, regno
);
4740 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4741 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4742 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4743 .pred.safe_across_calls p1 [, p2 [,...]]
4752 int p1
= -1, p2
= -1;
4756 if (*input_line_pointer
!= '"')
4758 as_bad (_("Missing predicate relation type"));
4759 ignore_rest_of_line ();
4765 char *form
= demand_copy_C_string (&len
);
4766 if (strcmp (form
, "mutex") == 0)
4768 else if (strcmp (form
, "clear") == 0)
4770 else if (strcmp (form
, "imply") == 0)
4774 as_bad (_("Unrecognized predicate relation type"));
4775 ignore_rest_of_line ();
4779 if (*input_line_pointer
== ',')
4780 ++input_line_pointer
;
4790 if (TOUPPER (*input_line_pointer
) != 'P'
4791 || (regno
= atoi (++input_line_pointer
)) < 0
4794 as_bad (_("Predicate register expected"));
4795 ignore_rest_of_line ();
4798 while (ISDIGIT (*input_line_pointer
))
4799 ++input_line_pointer
;
4806 as_warn (_("Duplicate predicate register ignored"));
4809 /* See if it's a range. */
4810 if (*input_line_pointer
== '-')
4813 ++input_line_pointer
;
4815 if (TOUPPER (*input_line_pointer
) != 'P'
4816 || (regno
= atoi (++input_line_pointer
)) < 0
4819 as_bad (_("Predicate register expected"));
4820 ignore_rest_of_line ();
4823 while (ISDIGIT (*input_line_pointer
))
4824 ++input_line_pointer
;
4828 as_bad (_("Bad register range"));
4829 ignore_rest_of_line ();
4840 if (*input_line_pointer
!= ',')
4842 ++input_line_pointer
;
4851 clear_qp_mutex (mask
);
4852 clear_qp_implies (mask
, (valueT
) 0);
4855 if (count
!= 2 || p1
== -1 || p2
== -1)
4856 as_bad (_("Predicate source and target required"));
4857 else if (p1
== 0 || p2
== 0)
4858 as_bad (_("Use of p0 is not valid in this context"));
4860 add_qp_imply (p1
, p2
);
4865 as_bad (_("At least two PR arguments expected"));
4870 as_bad (_("Use of p0 is not valid in this context"));
4873 add_qp_mutex (mask
);
4876 /* note that we don't override any existing relations */
4879 as_bad (_("At least one PR argument expected"));
4884 fprintf (stderr
, "Safe across calls: ");
4885 print_prmask (mask
);
4886 fprintf (stderr
, "\n");
4888 qp_safe_across_calls
= mask
;
4891 demand_empty_rest_of_line ();
4894 /* .entry label [, label [, ...]]
4895 Hint to DV code that the given labels are to be considered entry points.
4896 Otherwise, only global labels are considered entry points. */
4900 int dummy ATTRIBUTE_UNUSED
;
4909 name
= input_line_pointer
;
4910 c
= get_symbol_end ();
4911 symbolP
= symbol_find_or_make (name
);
4913 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
4915 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4918 *input_line_pointer
= c
;
4920 c
= *input_line_pointer
;
4923 input_line_pointer
++;
4925 if (*input_line_pointer
== '\n')
4931 demand_empty_rest_of_line ();
4934 /* .mem.offset offset, base
4935 "base" is used to distinguish between offsets from a different base. */
4938 dot_mem_offset (dummy
)
4939 int dummy ATTRIBUTE_UNUSED
;
4941 md
.mem_offset
.hint
= 1;
4942 md
.mem_offset
.offset
= get_absolute_expression ();
4943 if (*input_line_pointer
!= ',')
4945 as_bad (_("Comma expected"));
4946 ignore_rest_of_line ();
4949 ++input_line_pointer
;
4950 md
.mem_offset
.base
= get_absolute_expression ();
4951 demand_empty_rest_of_line ();
4954 /* ia64-specific pseudo-ops: */
4955 const pseudo_typeS md_pseudo_table
[] =
4957 { "radix", dot_radix
, 0 },
4958 { "lcomm", s_lcomm_bytes
, 1 },
4959 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
4960 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
4961 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
4962 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
4963 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
4964 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
4965 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
4966 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
4967 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
4968 { "proc", dot_proc
, 0 },
4969 { "body", dot_body
, 0 },
4970 { "prologue", dot_prologue
, 0 },
4971 { "endp", dot_endp
, 0 },
4973 { "fframe", dot_fframe
, 0 },
4974 { "vframe", dot_vframe
, 0 },
4975 { "vframesp", dot_vframesp
, 0 },
4976 { "vframepsp", dot_vframepsp
, 0 },
4977 { "save", dot_save
, 0 },
4978 { "restore", dot_restore
, 0 },
4979 { "restorereg", dot_restorereg
, 0 },
4980 { "restorereg.p", dot_restorereg_p
, 0 },
4981 { "handlerdata", dot_handlerdata
, 0 },
4982 { "unwentry", dot_unwentry
, 0 },
4983 { "altrp", dot_altrp
, 0 },
4984 { "savesp", dot_savemem
, 0 },
4985 { "savepsp", dot_savemem
, 1 },
4986 { "save.g", dot_saveg
, 0 },
4987 { "save.f", dot_savef
, 0 },
4988 { "save.b", dot_saveb
, 0 },
4989 { "save.gf", dot_savegf
, 0 },
4990 { "spill", dot_spill
, 0 },
4991 { "spillreg", dot_spillreg
, 0 },
4992 { "spillsp", dot_spillmem
, 0 },
4993 { "spillpsp", dot_spillmem
, 1 },
4994 { "spillreg.p", dot_spillreg_p
, 0 },
4995 { "spillsp.p", dot_spillmem_p
, 0 },
4996 { "spillpsp.p", dot_spillmem_p
, 1 },
4997 { "label_state", dot_label_state
, 0 },
4998 { "copy_state", dot_copy_state
, 0 },
4999 { "unwabi", dot_unwabi
, 0 },
5000 { "personality", dot_personality
, 0 },
5002 { "estate", dot_estate
, 0 },
5004 { "mii", dot_template
, 0x0 },
5005 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5006 { "mlx", dot_template
, 0x2 },
5007 { "mmi", dot_template
, 0x4 },
5008 { "mfi", dot_template
, 0x6 },
5009 { "mmf", dot_template
, 0x7 },
5010 { "mib", dot_template
, 0x8 },
5011 { "mbb", dot_template
, 0x9 },
5012 { "bbb", dot_template
, 0xb },
5013 { "mmb", dot_template
, 0xc },
5014 { "mfb", dot_template
, 0xe },
5016 { "lb", dot_scope
, 0 },
5017 { "le", dot_scope
, 1 },
5019 { "align", dot_align
, 0 },
5020 { "regstk", dot_regstk
, 0 },
5021 { "rotr", dot_rot
, DYNREG_GR
},
5022 { "rotf", dot_rot
, DYNREG_FR
},
5023 { "rotp", dot_rot
, DYNREG_PR
},
5024 { "lsb", dot_byteorder
, 0 },
5025 { "msb", dot_byteorder
, 1 },
5026 { "psr", dot_psr
, 0 },
5027 { "alias", dot_alias
, 0 },
5028 { "secalias", dot_alias
, 1 },
5029 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5031 { "xdata1", dot_xdata
, 1 },
5032 { "xdata2", dot_xdata
, 2 },
5033 { "xdata4", dot_xdata
, 4 },
5034 { "xdata8", dot_xdata
, 8 },
5035 { "xreal4", dot_xfloat_cons
, 'f' },
5036 { "xreal8", dot_xfloat_cons
, 'd' },
5037 { "xreal10", dot_xfloat_cons
, 'x' },
5038 { "xreal16", dot_xfloat_cons
, 'X' },
5039 { "xstring", dot_xstringer
, 0 },
5040 { "xstringz", dot_xstringer
, 1 },
5042 /* unaligned versions: */
5043 { "xdata2.ua", dot_xdata_ua
, 2 },
5044 { "xdata4.ua", dot_xdata_ua
, 4 },
5045 { "xdata8.ua", dot_xdata_ua
, 8 },
5046 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5047 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5048 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5049 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5051 /* annotations/DV checking support */
5052 { "entry", dot_entry
, 0 },
5053 { "mem.offset", dot_mem_offset
, 0 },
5054 { "pred.rel", dot_pred_rel
, 0 },
5055 { "pred.rel.clear", dot_pred_rel
, 'c' },
5056 { "pred.rel.imply", dot_pred_rel
, 'i' },
5057 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5058 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5059 { "reg.val", dot_reg_val
, 0 },
5060 { "serialize.data", dot_serialize
, 0 },
5061 { "serialize.instruction", dot_serialize
, 1 },
5062 { "auto", dot_dv_mode
, 'a' },
5063 { "explicit", dot_dv_mode
, 'e' },
5064 { "default", dot_dv_mode
, 'd' },
5066 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5067 IA-64 aligns data allocation pseudo-ops by default, so we have to
5068 tell it that these ones are supposed to be unaligned. Long term,
5069 should rewrite so that only IA-64 specific data allocation pseudo-ops
5070 are aligned by default. */
5071 {"2byte", stmt_cons_ua
, 2},
5072 {"4byte", stmt_cons_ua
, 4},
5073 {"8byte", stmt_cons_ua
, 8},
5078 static const struct pseudo_opcode
5081 void (*handler
) (int);
5086 /* these are more like pseudo-ops, but don't start with a dot */
5087 { "data1", cons
, 1 },
5088 { "data2", cons
, 2 },
5089 { "data4", cons
, 4 },
5090 { "data8", cons
, 8 },
5091 { "data16", cons
, 16 },
5092 { "real4", stmt_float_cons
, 'f' },
5093 { "real8", stmt_float_cons
, 'd' },
5094 { "real10", stmt_float_cons
, 'x' },
5095 { "real16", stmt_float_cons
, 'X' },
5096 { "string", stringer
, 0 },
5097 { "stringz", stringer
, 1 },
5099 /* unaligned versions: */
5100 { "data2.ua", stmt_cons_ua
, 2 },
5101 { "data4.ua", stmt_cons_ua
, 4 },
5102 { "data8.ua", stmt_cons_ua
, 8 },
5103 { "data16.ua", stmt_cons_ua
, 16 },
5104 { "real4.ua", float_cons
, 'f' },
5105 { "real8.ua", float_cons
, 'd' },
5106 { "real10.ua", float_cons
, 'x' },
5107 { "real16.ua", float_cons
, 'X' },
5110 /* Declare a register by creating a symbol for it and entering it in
5111 the symbol table. */
5114 declare_register (name
, regnum
)
5121 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5123 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5125 as_fatal ("Inserting \"%s\" into register table failed: %s",
5132 declare_register_set (prefix
, num_regs
, base_regnum
)
5140 for (i
= 0; i
< num_regs
; ++i
)
5142 sprintf (name
, "%s%u", prefix
, i
);
5143 declare_register (name
, base_regnum
+ i
);
5148 operand_width (opnd
)
5149 enum ia64_opnd opnd
;
5151 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5152 unsigned int bits
= 0;
5156 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5157 bits
+= odesc
->field
[i
].bits
;
5162 static enum operand_match_result
5163 operand_match (idesc
, index
, e
)
5164 const struct ia64_opcode
*idesc
;
5168 enum ia64_opnd opnd
= idesc
->operands
[index
];
5169 int bits
, relocatable
= 0;
5170 struct insn_fix
*fix
;
5177 case IA64_OPND_AR_CCV
:
5178 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5179 return OPERAND_MATCH
;
5182 case IA64_OPND_AR_CSD
:
5183 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5184 return OPERAND_MATCH
;
5187 case IA64_OPND_AR_PFS
:
5188 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5189 return OPERAND_MATCH
;
5193 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5194 return OPERAND_MATCH
;
5198 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5199 return OPERAND_MATCH
;
5203 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5204 return OPERAND_MATCH
;
5207 case IA64_OPND_PR_ROT
:
5208 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5209 return OPERAND_MATCH
;
5213 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5214 return OPERAND_MATCH
;
5217 case IA64_OPND_PSR_L
:
5218 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5219 return OPERAND_MATCH
;
5222 case IA64_OPND_PSR_UM
:
5223 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5224 return OPERAND_MATCH
;
5228 if (e
->X_op
== O_constant
)
5230 if (e
->X_add_number
== 1)
5231 return OPERAND_MATCH
;
5233 return OPERAND_OUT_OF_RANGE
;
5238 if (e
->X_op
== O_constant
)
5240 if (e
->X_add_number
== 8)
5241 return OPERAND_MATCH
;
5243 return OPERAND_OUT_OF_RANGE
;
5248 if (e
->X_op
== O_constant
)
5250 if (e
->X_add_number
== 16)
5251 return OPERAND_MATCH
;
5253 return OPERAND_OUT_OF_RANGE
;
5257 /* register operands: */
5260 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5261 && e
->X_add_number
< REG_AR
+ 128)
5262 return OPERAND_MATCH
;
5267 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5268 && e
->X_add_number
< REG_BR
+ 8)
5269 return OPERAND_MATCH
;
5273 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5274 && e
->X_add_number
< REG_CR
+ 128)
5275 return OPERAND_MATCH
;
5282 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5283 && e
->X_add_number
< REG_FR
+ 128)
5284 return OPERAND_MATCH
;
5289 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5290 && e
->X_add_number
< REG_P
+ 64)
5291 return OPERAND_MATCH
;
5297 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5298 && e
->X_add_number
< REG_GR
+ 128)
5299 return OPERAND_MATCH
;
5302 case IA64_OPND_R3_2
:
5303 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5305 if (e
->X_add_number
< REG_GR
+ 4)
5306 return OPERAND_MATCH
;
5307 else if (e
->X_add_number
< REG_GR
+ 128)
5308 return OPERAND_OUT_OF_RANGE
;
5312 /* indirect operands: */
5313 case IA64_OPND_CPUID_R3
:
5314 case IA64_OPND_DBR_R3
:
5315 case IA64_OPND_DTR_R3
:
5316 case IA64_OPND_ITR_R3
:
5317 case IA64_OPND_IBR_R3
:
5318 case IA64_OPND_MSR_R3
:
5319 case IA64_OPND_PKR_R3
:
5320 case IA64_OPND_PMC_R3
:
5321 case IA64_OPND_PMD_R3
:
5322 case IA64_OPND_RR_R3
:
5323 if (e
->X_op
== O_index
&& e
->X_op_symbol
5324 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5325 == opnd
- IA64_OPND_CPUID_R3
))
5326 return OPERAND_MATCH
;
5330 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5331 return OPERAND_MATCH
;
5334 /* immediate operands: */
5335 case IA64_OPND_CNT2a
:
5336 case IA64_OPND_LEN4
:
5337 case IA64_OPND_LEN6
:
5338 bits
= operand_width (idesc
->operands
[index
]);
5339 if (e
->X_op
== O_constant
)
5341 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5342 return OPERAND_MATCH
;
5344 return OPERAND_OUT_OF_RANGE
;
5348 case IA64_OPND_CNT2b
:
5349 if (e
->X_op
== O_constant
)
5351 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5352 return OPERAND_MATCH
;
5354 return OPERAND_OUT_OF_RANGE
;
5358 case IA64_OPND_CNT2c
:
5359 val
= e
->X_add_number
;
5360 if (e
->X_op
== O_constant
)
5362 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5363 return OPERAND_MATCH
;
5365 return OPERAND_OUT_OF_RANGE
;
5370 /* SOR must be an integer multiple of 8 */
5371 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5372 return OPERAND_OUT_OF_RANGE
;
5375 if (e
->X_op
== O_constant
)
5377 if ((bfd_vma
) e
->X_add_number
<= 96)
5378 return OPERAND_MATCH
;
5380 return OPERAND_OUT_OF_RANGE
;
5384 case IA64_OPND_IMMU62
:
5385 if (e
->X_op
== O_constant
)
5387 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5388 return OPERAND_MATCH
;
5390 return OPERAND_OUT_OF_RANGE
;
5394 /* FIXME -- need 62-bit relocation type */
5395 as_bad (_("62-bit relocation not yet implemented"));
5399 case IA64_OPND_IMMU64
:
5400 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5401 || e
->X_op
== O_subtract
)
5403 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5404 fix
->code
= BFD_RELOC_IA64_IMM64
;
5405 if (e
->X_op
!= O_subtract
)
5407 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5408 if (e
->X_op
== O_pseudo_fixup
)
5412 fix
->opnd
= idesc
->operands
[index
];
5415 ++CURR_SLOT
.num_fixups
;
5416 return OPERAND_MATCH
;
5418 else if (e
->X_op
== O_constant
)
5419 return OPERAND_MATCH
;
5422 case IA64_OPND_CCNT5
:
5423 case IA64_OPND_CNT5
:
5424 case IA64_OPND_CNT6
:
5425 case IA64_OPND_CPOS6a
:
5426 case IA64_OPND_CPOS6b
:
5427 case IA64_OPND_CPOS6c
:
5428 case IA64_OPND_IMMU2
:
5429 case IA64_OPND_IMMU7a
:
5430 case IA64_OPND_IMMU7b
:
5431 case IA64_OPND_IMMU21
:
5432 case IA64_OPND_IMMU24
:
5433 case IA64_OPND_MBTYPE4
:
5434 case IA64_OPND_MHTYPE8
:
5435 case IA64_OPND_POS6
:
5436 bits
= operand_width (idesc
->operands
[index
]);
5437 if (e
->X_op
== O_constant
)
5439 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5440 return OPERAND_MATCH
;
5442 return OPERAND_OUT_OF_RANGE
;
5446 case IA64_OPND_IMMU9
:
5447 bits
= operand_width (idesc
->operands
[index
]);
5448 if (e
->X_op
== O_constant
)
5450 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5452 int lobits
= e
->X_add_number
& 0x3;
5453 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5454 e
->X_add_number
|= (bfd_vma
) 0x3;
5455 return OPERAND_MATCH
;
5458 return OPERAND_OUT_OF_RANGE
;
5462 case IA64_OPND_IMM44
:
5463 /* least 16 bits must be zero */
5464 if ((e
->X_add_number
& 0xffff) != 0)
5465 /* XXX technically, this is wrong: we should not be issuing warning
5466 messages until we're sure this instruction pattern is going to
5468 as_warn (_("lower 16 bits of mask ignored"));
5470 if (e
->X_op
== O_constant
)
5472 if (((e
->X_add_number
>= 0
5473 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5474 || (e
->X_add_number
< 0
5475 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5478 if (e
->X_add_number
>= 0
5479 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5481 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5483 return OPERAND_MATCH
;
5486 return OPERAND_OUT_OF_RANGE
;
5490 case IA64_OPND_IMM17
:
5491 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5492 if (e
->X_op
== O_constant
)
5494 if (((e
->X_add_number
>= 0
5495 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5496 || (e
->X_add_number
< 0
5497 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5500 if (e
->X_add_number
>= 0
5501 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5503 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5505 return OPERAND_MATCH
;
5508 return OPERAND_OUT_OF_RANGE
;
5512 case IA64_OPND_IMM14
:
5513 case IA64_OPND_IMM22
:
5515 case IA64_OPND_IMM1
:
5516 case IA64_OPND_IMM8
:
5517 case IA64_OPND_IMM8U4
:
5518 case IA64_OPND_IMM8M1
:
5519 case IA64_OPND_IMM8M1U4
:
5520 case IA64_OPND_IMM8M1U8
:
5521 case IA64_OPND_IMM9a
:
5522 case IA64_OPND_IMM9b
:
5523 bits
= operand_width (idesc
->operands
[index
]);
5524 if (relocatable
&& (e
->X_op
== O_symbol
5525 || e
->X_op
== O_subtract
5526 || e
->X_op
== O_pseudo_fixup
))
5528 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5530 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5531 fix
->code
= BFD_RELOC_IA64_IMM14
;
5533 fix
->code
= BFD_RELOC_IA64_IMM22
;
5535 if (e
->X_op
!= O_subtract
)
5537 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5538 if (e
->X_op
== O_pseudo_fixup
)
5542 fix
->opnd
= idesc
->operands
[index
];
5545 ++CURR_SLOT
.num_fixups
;
5546 return OPERAND_MATCH
;
5548 else if (e
->X_op
!= O_constant
5549 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5550 return OPERAND_MISMATCH
;
5552 if (opnd
== IA64_OPND_IMM8M1U4
)
5554 /* Zero is not valid for unsigned compares that take an adjusted
5555 constant immediate range. */
5556 if (e
->X_add_number
== 0)
5557 return OPERAND_OUT_OF_RANGE
;
5559 /* Sign-extend 32-bit unsigned numbers, so that the following range
5560 checks will work. */
5561 val
= e
->X_add_number
;
5562 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5563 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5564 val
= ((val
<< 32) >> 32);
5566 /* Check for 0x100000000. This is valid because
5567 0x100000000-1 is the same as ((uint32_t) -1). */
5568 if (val
== ((bfd_signed_vma
) 1 << 32))
5569 return OPERAND_MATCH
;
5573 else if (opnd
== IA64_OPND_IMM8M1U8
)
5575 /* Zero is not valid for unsigned compares that take an adjusted
5576 constant immediate range. */
5577 if (e
->X_add_number
== 0)
5578 return OPERAND_OUT_OF_RANGE
;
5580 /* Check for 0x10000000000000000. */
5581 if (e
->X_op
== O_big
)
5583 if (generic_bignum
[0] == 0
5584 && generic_bignum
[1] == 0
5585 && generic_bignum
[2] == 0
5586 && generic_bignum
[3] == 0
5587 && generic_bignum
[4] == 1)
5588 return OPERAND_MATCH
;
5590 return OPERAND_OUT_OF_RANGE
;
5593 val
= e
->X_add_number
- 1;
5595 else if (opnd
== IA64_OPND_IMM8M1
)
5596 val
= e
->X_add_number
- 1;
5597 else if (opnd
== IA64_OPND_IMM8U4
)
5599 /* Sign-extend 32-bit unsigned numbers, so that the following range
5600 checks will work. */
5601 val
= e
->X_add_number
;
5602 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5603 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5604 val
= ((val
<< 32) >> 32);
5607 val
= e
->X_add_number
;
5609 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5610 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5611 return OPERAND_MATCH
;
5613 return OPERAND_OUT_OF_RANGE
;
5615 case IA64_OPND_INC3
:
5616 /* +/- 1, 4, 8, 16 */
5617 val
= e
->X_add_number
;
5620 if (e
->X_op
== O_constant
)
5622 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5623 return OPERAND_MATCH
;
5625 return OPERAND_OUT_OF_RANGE
;
5629 case IA64_OPND_TGT25
:
5630 case IA64_OPND_TGT25b
:
5631 case IA64_OPND_TGT25c
:
5632 case IA64_OPND_TGT64
:
5633 if (e
->X_op
== O_symbol
)
5635 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5636 if (opnd
== IA64_OPND_TGT25
)
5637 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5638 else if (opnd
== IA64_OPND_TGT25b
)
5639 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5640 else if (opnd
== IA64_OPND_TGT25c
)
5641 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5642 else if (opnd
== IA64_OPND_TGT64
)
5643 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5647 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5648 fix
->opnd
= idesc
->operands
[index
];
5651 ++CURR_SLOT
.num_fixups
;
5652 return OPERAND_MATCH
;
5654 case IA64_OPND_TAG13
:
5655 case IA64_OPND_TAG13b
:
5659 return OPERAND_MATCH
;
5662 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5663 /* There are no external relocs for TAG13/TAG13b fields, so we
5664 create a dummy reloc. This will not live past md_apply_fix3. */
5665 fix
->code
= BFD_RELOC_UNUSED
;
5666 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5667 fix
->opnd
= idesc
->operands
[index
];
5670 ++CURR_SLOT
.num_fixups
;
5671 return OPERAND_MATCH
;
5678 case IA64_OPND_LDXMOV
:
5679 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5680 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5681 fix
->opnd
= idesc
->operands
[index
];
5684 ++CURR_SLOT
.num_fixups
;
5685 return OPERAND_MATCH
;
5690 return OPERAND_MISMATCH
;
5699 memset (e
, 0, sizeof (*e
));
5702 if (*input_line_pointer
!= '}')
5704 sep
= *input_line_pointer
++;
5708 if (!md
.manual_bundling
)
5709 as_warn ("Found '}' when manual bundling is off");
5711 CURR_SLOT
.manual_bundling_off
= 1;
5712 md
.manual_bundling
= 0;
5718 /* Returns the next entry in the opcode table that matches the one in
5719 IDESC, and frees the entry in IDESC. If no matching entry is
5720 found, NULL is returned instead. */
5722 static struct ia64_opcode
*
5723 get_next_opcode (struct ia64_opcode
*idesc
)
5725 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
5726 ia64_free_opcode (idesc
);
5730 /* Parse the operands for the opcode and find the opcode variant that
5731 matches the specified operands, or NULL if no match is possible. */
5733 static struct ia64_opcode
*
5734 parse_operands (idesc
)
5735 struct ia64_opcode
*idesc
;
5737 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
5738 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
5739 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
5740 enum operand_match_result result
;
5742 char *first_arg
= 0, *end
, *saved_input_pointer
;
5745 assert (strlen (idesc
->name
) <= 128);
5747 strcpy (mnemonic
, idesc
->name
);
5748 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5750 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5751 can't parse the first operand until we have parsed the
5752 remaining operands of the "alloc" instruction. */
5754 first_arg
= input_line_pointer
;
5755 end
= strchr (input_line_pointer
, '=');
5758 as_bad ("Expected separator `='");
5761 input_line_pointer
= end
+ 1;
5766 for (; i
< NELEMS (CURR_SLOT
.opnd
); ++i
)
5768 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
5769 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
5774 if (sep
!= '=' && sep
!= ',')
5779 if (num_outputs
> 0)
5780 as_bad ("Duplicate equal sign (=) in instruction");
5782 num_outputs
= i
+ 1;
5787 as_bad ("Illegal operand separator `%c'", sep
);
5791 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5793 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5794 know (strcmp (idesc
->name
, "alloc") == 0);
5795 if (num_operands
== 5 /* first_arg not included in this count! */
5796 && CURR_SLOT
.opnd
[2].X_op
== O_constant
5797 && CURR_SLOT
.opnd
[3].X_op
== O_constant
5798 && CURR_SLOT
.opnd
[4].X_op
== O_constant
5799 && CURR_SLOT
.opnd
[5].X_op
== O_constant
)
5801 sof
= set_regstack (CURR_SLOT
.opnd
[2].X_add_number
,
5802 CURR_SLOT
.opnd
[3].X_add_number
,
5803 CURR_SLOT
.opnd
[4].X_add_number
,
5804 CURR_SLOT
.opnd
[5].X_add_number
);
5806 /* now we can parse the first arg: */
5807 saved_input_pointer
= input_line_pointer
;
5808 input_line_pointer
= first_arg
;
5809 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
5811 --num_outputs
; /* force error */
5812 input_line_pointer
= saved_input_pointer
;
5814 CURR_SLOT
.opnd
[2].X_add_number
= sof
;
5815 CURR_SLOT
.opnd
[3].X_add_number
5816 = sof
- CURR_SLOT
.opnd
[4].X_add_number
;
5817 CURR_SLOT
.opnd
[4] = CURR_SLOT
.opnd
[5];
5821 highest_unmatched_operand
= 0;
5822 curr_out_of_range_pos
= -1;
5824 expected_operand
= idesc
->operands
[0];
5825 for (; idesc
; idesc
= get_next_opcode (idesc
))
5827 if (num_outputs
!= idesc
->num_outputs
)
5828 continue; /* mismatch in # of outputs */
5830 CURR_SLOT
.num_fixups
= 0;
5832 /* Try to match all operands. If we see an out-of-range operand,
5833 then continue trying to match the rest of the operands, since if
5834 the rest match, then this idesc will give the best error message. */
5836 out_of_range_pos
= -1;
5837 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
5839 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
5840 if (result
!= OPERAND_MATCH
)
5842 if (result
!= OPERAND_OUT_OF_RANGE
)
5844 if (out_of_range_pos
< 0)
5845 /* remember position of the first out-of-range operand: */
5846 out_of_range_pos
= i
;
5850 /* If we did not match all operands, or if at least one operand was
5851 out-of-range, then this idesc does not match. Keep track of which
5852 idesc matched the most operands before failing. If we have two
5853 idescs that failed at the same position, and one had an out-of-range
5854 operand, then prefer the out-of-range operand. Thus if we have
5855 "add r0=0x1000000,r1" we get an error saying the constant is out
5856 of range instead of an error saying that the constant should have been
5859 if (i
!= num_operands
|| out_of_range_pos
>= 0)
5861 if (i
> highest_unmatched_operand
5862 || (i
== highest_unmatched_operand
5863 && out_of_range_pos
> curr_out_of_range_pos
))
5865 highest_unmatched_operand
= i
;
5866 if (out_of_range_pos
>= 0)
5868 expected_operand
= idesc
->operands
[out_of_range_pos
];
5869 error_pos
= out_of_range_pos
;
5873 expected_operand
= idesc
->operands
[i
];
5876 curr_out_of_range_pos
= out_of_range_pos
;
5881 if (num_operands
< NELEMS (idesc
->operands
)
5882 && idesc
->operands
[num_operands
])
5883 continue; /* mismatch in number of arguments */
5889 if (expected_operand
)
5890 as_bad ("Operand %u of `%s' should be %s",
5891 error_pos
+ 1, mnemonic
,
5892 elf64_ia64_operands
[expected_operand
].desc
);
5894 as_bad ("Operand mismatch");
5900 /* Keep track of state necessary to determine whether a NOP is necessary
5901 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5902 detect a case where additional NOPs may be necessary. */
5904 errata_nop_necessary_p (slot
, insn_unit
)
5906 enum ia64_unit insn_unit
;
5909 struct group
*this_group
= md
.last_groups
+ md
.group_idx
;
5910 struct group
*prev_group
= md
.last_groups
+ (md
.group_idx
+ 2) % 3;
5911 struct ia64_opcode
*idesc
= slot
->idesc
;
5913 /* Test whether this could be the first insn in a problematic sequence. */
5914 if (insn_unit
== IA64_UNIT_F
)
5916 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5917 if (idesc
->operands
[i
] == IA64_OPND_P1
5918 || idesc
->operands
[i
] == IA64_OPND_P2
)
5920 int regno
= slot
->opnd
[i
].X_add_number
- REG_P
;
5921 /* Ignore invalid operands; they generate errors elsewhere. */
5924 this_group
->p_reg_set
[regno
] = 1;
5928 /* Test whether this could be the second insn in a problematic sequence. */
5929 if (insn_unit
== IA64_UNIT_M
&& slot
->qp_regno
> 0
5930 && prev_group
->p_reg_set
[slot
->qp_regno
])
5932 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5933 if (idesc
->operands
[i
] == IA64_OPND_R1
5934 || idesc
->operands
[i
] == IA64_OPND_R2
5935 || idesc
->operands
[i
] == IA64_OPND_R3
)
5937 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5938 /* Ignore invalid operands; they generate errors elsewhere. */
5941 if (strncmp (idesc
->name
, "add", 3) != 0
5942 && strncmp (idesc
->name
, "sub", 3) != 0
5943 && strncmp (idesc
->name
, "shladd", 6) != 0
5944 && (idesc
->flags
& IA64_OPCODE_POSTINC
) == 0)
5945 this_group
->g_reg_set_conditionally
[regno
] = 1;
5949 /* Test whether this could be the third insn in a problematic sequence. */
5950 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; i
++)
5952 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5953 idesc
->operands
[i
] == IA64_OPND_R3
5954 /* For mov indirect. */
5955 || idesc
->operands
[i
] == IA64_OPND_RR_R3
5956 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
5957 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
5958 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
5959 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
5960 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
5961 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
5962 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
5964 || idesc
->operands
[i
] == IA64_OPND_ITR_R3
5965 || idesc
->operands
[i
] == IA64_OPND_DTR_R3
5966 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5967 || idesc
->operands
[i
] == IA64_OPND_MR3
)
5969 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5970 /* Ignore invalid operands; they generate errors elsewhere. */
5973 if (idesc
->operands
[i
] == IA64_OPND_R3
)
5975 if (strcmp (idesc
->name
, "fc") != 0
5976 && strcmp (idesc
->name
, "tak") != 0
5977 && strcmp (idesc
->name
, "thash") != 0
5978 && strcmp (idesc
->name
, "tpa") != 0
5979 && strcmp (idesc
->name
, "ttag") != 0
5980 && strncmp (idesc
->name
, "ptr", 3) != 0
5981 && strncmp (idesc
->name
, "ptc", 3) != 0
5982 && strncmp (idesc
->name
, "probe", 5) != 0)
5985 if (prev_group
->g_reg_set_conditionally
[regno
])
5993 build_insn (slot
, insnp
)
5997 const struct ia64_operand
*odesc
, *o2desc
;
5998 struct ia64_opcode
*idesc
= slot
->idesc
;
5999 bfd_signed_vma insn
, val
;
6003 insn
= idesc
->opcode
| slot
->qp_regno
;
6005 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6007 if (slot
->opnd
[i
].X_op
== O_register
6008 || slot
->opnd
[i
].X_op
== O_constant
6009 || slot
->opnd
[i
].X_op
== O_index
)
6010 val
= slot
->opnd
[i
].X_add_number
;
6011 else if (slot
->opnd
[i
].X_op
== O_big
)
6013 /* This must be the value 0x10000000000000000. */
6014 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6020 switch (idesc
->operands
[i
])
6022 case IA64_OPND_IMMU64
:
6023 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6024 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6025 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6026 | (((val
>> 63) & 0x1) << 36));
6029 case IA64_OPND_IMMU62
:
6030 val
&= 0x3fffffffffffffffULL
;
6031 if (val
!= slot
->opnd
[i
].X_add_number
)
6032 as_warn (_("Value truncated to 62 bits"));
6033 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6034 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6037 case IA64_OPND_TGT64
:
6039 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6040 insn
|= ((((val
>> 59) & 0x1) << 36)
6041 | (((val
>> 0) & 0xfffff) << 13));
6072 case IA64_OPND_R3_2
:
6073 case IA64_OPND_CPUID_R3
:
6074 case IA64_OPND_DBR_R3
:
6075 case IA64_OPND_DTR_R3
:
6076 case IA64_OPND_ITR_R3
:
6077 case IA64_OPND_IBR_R3
:
6079 case IA64_OPND_MSR_R3
:
6080 case IA64_OPND_PKR_R3
:
6081 case IA64_OPND_PMC_R3
:
6082 case IA64_OPND_PMD_R3
:
6083 case IA64_OPND_RR_R3
:
6091 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6092 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6094 as_bad_where (slot
->src_file
, slot
->src_line
,
6095 "Bad operand value: %s", err
);
6096 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6098 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6099 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6101 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6102 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6104 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6105 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6106 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6108 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6109 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6119 unsigned int manual_bundling_on
= 0, manual_bundling_off
= 0;
6120 unsigned int manual_bundling
= 0;
6121 enum ia64_unit required_unit
, insn_unit
= 0;
6122 enum ia64_insn_type type
[3], insn_type
;
6123 unsigned int template, orig_template
;
6124 bfd_vma insn
[3] = { -1, -1, -1 };
6125 struct ia64_opcode
*idesc
;
6126 int end_of_insn_group
= 0, user_template
= -1;
6127 int n
, i
, j
, first
, curr
;
6128 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6129 bfd_vma t0
= 0, t1
= 0;
6130 struct label_fix
*lfix
;
6131 struct insn_fix
*ifix
;
6137 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6138 know (first
>= 0 & first
< NUM_SLOTS
);
6139 n
= MIN (3, md
.num_slots_in_use
);
6141 /* Determine template: user user_template if specified, best match
6144 if (md
.slot
[first
].user_template
>= 0)
6145 user_template
= template = md
.slot
[first
].user_template
;
6148 /* Auto select appropriate template. */
6149 memset (type
, 0, sizeof (type
));
6151 for (i
= 0; i
< n
; ++i
)
6153 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6155 type
[i
] = md
.slot
[curr
].idesc
->type
;
6156 curr
= (curr
+ 1) % NUM_SLOTS
;
6158 template = best_template
[type
[0]][type
[1]][type
[2]];
6161 /* initialize instructions with appropriate nops: */
6162 for (i
= 0; i
< 3; ++i
)
6163 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6167 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6168 from the start of the frag. */
6169 addr_mod
= frag_now_fix () & 15;
6170 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6171 as_bad (_("instruction address is not a multiple of 16"));
6172 frag_now
->insn_addr
= addr_mod
;
6173 frag_now
->has_code
= 1;
6175 /* now fill in slots with as many insns as possible: */
6177 idesc
= md
.slot
[curr
].idesc
;
6178 end_of_insn_group
= 0;
6179 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6181 /* If we have unwind records, we may need to update some now. */
6182 ptr
= md
.slot
[curr
].unwind_record
;
6185 /* Find the last prologue/body record in the list for the current
6186 insn, and set the slot number for all records up to that point.
6187 This needs to be done now, because prologue/body records refer to
6188 the current point, not the point after the instruction has been
6189 issued. This matters because there may have been nops emitted
6190 meanwhile. Any non-prologue non-body record followed by a
6191 prologue/body record must also refer to the current point. */
6193 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6194 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6195 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6196 || ptr
->r
.type
== body
)
6200 /* Make last_ptr point one after the last prologue/body
6202 last_ptr
= last_ptr
->next
;
6203 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6206 ptr
->slot_number
= (unsigned long) f
+ i
;
6207 ptr
->slot_frag
= frag_now
;
6209 /* Remove the initialized records, so that we won't accidentally
6210 update them again if we insert a nop and continue. */
6211 md
.slot
[curr
].unwind_record
= last_ptr
;
6215 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6217 if (manual_bundling
&& i
!= 2)
6218 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6219 "`%s' must be last in bundle", idesc
->name
);
6223 if (idesc
->flags
& IA64_OPCODE_LAST
)
6226 unsigned int required_template
;
6228 /* If we need a stop bit after an M slot, our only choice is
6229 template 5 (M;;MI). If we need a stop bit after a B
6230 slot, our only choice is to place it at the end of the
6231 bundle, because the only available templates are MIB,
6232 MBB, BBB, MMB, and MFB. We don't handle anything other
6233 than M and B slots because these are the only kind of
6234 instructions that can have the IA64_OPCODE_LAST bit set. */
6235 required_template
= template;
6236 switch (idesc
->type
)
6240 required_template
= 5;
6248 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6249 "Internal error: don't know how to force %s to end"
6250 "of instruction group", idesc
->name
);
6254 if (manual_bundling
&& i
!= required_slot
)
6255 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6256 "`%s' must be last in instruction group",
6258 if (required_slot
< i
)
6259 /* Can't fit this instruction. */
6263 if (required_template
!= template)
6265 /* If we switch the template, we need to reset the NOPs
6266 after slot i. The slot-types of the instructions ahead
6267 of i never change, so we don't need to worry about
6268 changing NOPs in front of this slot. */
6269 for (j
= i
; j
< 3; ++j
)
6270 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6272 template = required_template
;
6274 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6276 if (manual_bundling_on
)
6277 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6278 "Label must be first in a bundle");
6279 /* This insn must go into the first slot of a bundle. */
6283 manual_bundling_on
= md
.slot
[curr
].manual_bundling_on
;
6284 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6286 if (manual_bundling_on
)
6289 manual_bundling
= 1;
6291 break; /* need to start a new bundle */
6294 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6296 /* We need an instruction group boundary in the middle of a
6297 bundle. See if we can switch to an other template with
6298 an appropriate boundary. */
6300 orig_template
= template;
6301 if (i
== 1 && (user_template
== 4
6302 || (user_template
< 0
6303 && (ia64_templ_desc
[template].exec_unit
[0]
6307 end_of_insn_group
= 0;
6309 else if (i
== 2 && (user_template
== 0
6310 || (user_template
< 0
6311 && (ia64_templ_desc
[template].exec_unit
[1]
6313 /* This test makes sure we don't switch the template if
6314 the next instruction is one that needs to be first in
6315 an instruction group. Since all those instructions are
6316 in the M group, there is no way such an instruction can
6317 fit in this bundle even if we switch the template. The
6318 reason we have to check for this is that otherwise we
6319 may end up generating "MI;;I M.." which has the deadly
6320 effect that the second M instruction is no longer the
6321 first in the bundle! --davidm 99/12/16 */
6322 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6325 end_of_insn_group
= 0;
6327 else if (curr
!= first
)
6328 /* can't fit this insn */
6331 if (template != orig_template
)
6332 /* if we switch the template, we need to reset the NOPs
6333 after slot i. The slot-types of the instructions ahead
6334 of i never change, so we don't need to worry about
6335 changing NOPs in front of this slot. */
6336 for (j
= i
; j
< 3; ++j
)
6337 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6339 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6341 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6342 if (idesc
->type
== IA64_TYPE_DYN
)
6344 if ((strcmp (idesc
->name
, "nop") == 0)
6345 || (strcmp (idesc
->name
, "hint") == 0)
6346 || (strcmp (idesc
->name
, "break") == 0))
6347 insn_unit
= required_unit
;
6348 else if (strcmp (idesc
->name
, "chk.s") == 0)
6350 insn_unit
= IA64_UNIT_M
;
6351 if (required_unit
== IA64_UNIT_I
)
6352 insn_unit
= IA64_UNIT_I
;
6355 as_fatal ("emit_one_bundle: unexpected dynamic op");
6357 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbf??"[insn_unit
]);
6358 ia64_free_opcode (idesc
);
6359 md
.slot
[curr
].idesc
= idesc
= ia64_find_opcode (mnemonic
);
6361 know (!idesc
->next
); /* no resolved dynamic ops have collisions */
6366 insn_type
= idesc
->type
;
6367 insn_unit
= IA64_UNIT_NIL
;
6371 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6372 insn_unit
= required_unit
;
6374 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6375 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6376 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6377 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6378 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6383 if (insn_unit
!= required_unit
)
6385 if (required_unit
== IA64_UNIT_L
6386 && insn_unit
== IA64_UNIT_I
6387 && !(idesc
->flags
& IA64_OPCODE_X_IN_MLX
))
6389 /* we got ourselves an MLX template but the current
6390 instruction isn't an X-unit, or an I-unit instruction
6391 that can go into the X slot of an MLX template. Duh. */
6392 if (md
.num_slots_in_use
>= NUM_SLOTS
)
6394 as_bad_where (md
.slot
[curr
].src_file
,
6395 md
.slot
[curr
].src_line
,
6396 "`%s' can't go in X slot of "
6397 "MLX template", idesc
->name
);
6398 /* drop this insn so we don't livelock: */
6399 --md
.num_slots_in_use
;
6403 continue; /* try next slot */
6409 addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6410 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6413 if (errata_nop_necessary_p (md
.slot
+ curr
, insn_unit
))
6414 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6416 build_insn (md
.slot
+ curr
, insn
+ i
);
6418 ptr
= md
.slot
[curr
].unwind_record
;
6421 /* Set slot numbers for all remaining unwind records belonging to the
6422 current insn. There can not be any prologue/body unwind records
6424 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6425 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6427 ptr
->slot_number
= (unsigned long) f
+ i
;
6428 ptr
->slot_frag
= frag_now
;
6430 md
.slot
[curr
].unwind_record
= NULL
;
6433 if (required_unit
== IA64_UNIT_L
)
6436 /* skip one slot for long/X-unit instructions */
6439 --md
.num_slots_in_use
;
6441 /* now is a good time to fix up the labels for this insn: */
6442 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6444 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6445 symbol_set_frag (lfix
->sym
, frag_now
);
6447 /* and fix up the tags also. */
6448 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6450 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6451 symbol_set_frag (lfix
->sym
, frag_now
);
6454 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6456 ifix
= md
.slot
[curr
].fixup
+ j
;
6457 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6458 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6459 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6460 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6461 fix
->fx_file
= md
.slot
[curr
].src_file
;
6462 fix
->fx_line
= md
.slot
[curr
].src_line
;
6465 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6467 if (end_of_insn_group
)
6469 md
.group_idx
= (md
.group_idx
+ 1) % 3;
6470 memset (md
.last_groups
+ md
.group_idx
, 0, sizeof md
.last_groups
[0]);
6474 ia64_free_opcode (md
.slot
[curr
].idesc
);
6475 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6476 md
.slot
[curr
].user_template
= -1;
6478 if (manual_bundling_off
)
6480 manual_bundling
= 0;
6483 curr
= (curr
+ 1) % NUM_SLOTS
;
6484 idesc
= md
.slot
[curr
].idesc
;
6486 if (manual_bundling
)
6488 if (md
.num_slots_in_use
> 0)
6489 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6490 "`%s' does not fit into %s template",
6491 idesc
->name
, ia64_templ_desc
[template].name
);
6493 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6494 "Missing '}' at end of file");
6496 know (md
.num_slots_in_use
< NUM_SLOTS
);
6498 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6499 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6501 number_to_chars_littleendian (f
+ 0, t0
, 8);
6502 number_to_chars_littleendian (f
+ 8, t1
, 8);
6506 unwind
.list
->next_slot_number
= (unsigned long) f
+ 16;
6507 unwind
.list
->next_slot_frag
= frag_now
;
6512 md_parse_option (c
, arg
)
6519 /* Switches from the Intel assembler. */
6521 if (strcmp (arg
, "ilp64") == 0
6522 || strcmp (arg
, "lp64") == 0
6523 || strcmp (arg
, "p64") == 0)
6525 md
.flags
|= EF_IA_64_ABI64
;
6527 else if (strcmp (arg
, "ilp32") == 0)
6529 md
.flags
&= ~EF_IA_64_ABI64
;
6531 else if (strcmp (arg
, "le") == 0)
6533 md
.flags
&= ~EF_IA_64_BE
;
6534 default_big_endian
= 0;
6536 else if (strcmp (arg
, "be") == 0)
6538 md
.flags
|= EF_IA_64_BE
;
6539 default_big_endian
= 1;
6546 if (strcmp (arg
, "so") == 0)
6548 /* Suppress signon message. */
6550 else if (strcmp (arg
, "pi") == 0)
6552 /* Reject privileged instructions. FIXME */
6554 else if (strcmp (arg
, "us") == 0)
6556 /* Allow union of signed and unsigned range. FIXME */
6558 else if (strcmp (arg
, "close_fcalls") == 0)
6560 /* Do not resolve global function calls. */
6567 /* temp[="prefix"] Insert temporary labels into the object file
6568 symbol table prefixed by "prefix".
6569 Default prefix is ":temp:".
6574 /* indirect=<tgt> Assume unannotated indirect branches behavior
6575 according to <tgt> --
6576 exit: branch out from the current context (default)
6577 labels: all labels in context may be branch targets
6579 if (strncmp (arg
, "indirect=", 9) != 0)
6584 /* -X conflicts with an ignored option, use -x instead */
6586 if (!arg
|| strcmp (arg
, "explicit") == 0)
6588 /* set default mode to explicit */
6589 md
.default_explicit_mode
= 1;
6592 else if (strcmp (arg
, "auto") == 0)
6594 md
.default_explicit_mode
= 0;
6596 else if (strcmp (arg
, "debug") == 0)
6600 else if (strcmp (arg
, "debugx") == 0)
6602 md
.default_explicit_mode
= 1;
6607 as_bad (_("Unrecognized option '-x%s'"), arg
);
6612 /* nops Print nops statistics. */
6615 /* GNU specific switches for gcc. */
6616 case OPTION_MCONSTANT_GP
:
6617 md
.flags
|= EF_IA_64_CONS_GP
;
6620 case OPTION_MAUTO_PIC
:
6621 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
6632 md_show_usage (stream
)
6637 --mconstant-gp mark output file as using the constant-GP model\n\
6638 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6639 --mauto-pic mark output file as using the constant-GP model\n\
6640 without function descriptors (sets ELF header flag\n\
6641 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6642 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6643 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6644 -x | -xexplicit turn on dependency violation checking (default)\n\
6645 -xauto automagically remove dependency violations\n\
6646 -xdebug debug dependency violation checker\n"),
6651 ia64_after_parse_args ()
6653 if (debug_type
== DEBUG_STABS
)
6654 as_fatal (_("--gstabs is not supported for ia64"));
6657 /* Return true if TYPE fits in TEMPL at SLOT. */
6660 match (int templ
, int type
, int slot
)
6662 enum ia64_unit unit
;
6665 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
6668 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
6670 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
6672 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
6673 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
6674 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
6675 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
6676 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
6677 default: result
= 0; break;
6682 /* Add a bit of extra goodness if a nop of type F or B would fit
6683 in TEMPL at SLOT. */
6686 extra_goodness (int templ
, int slot
)
6688 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
6690 if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
6695 /* This function is called once, at assembler startup time. It sets
6696 up all the tables, etc. that the MD part of the assembler will need
6697 that can be determined before arguments are parsed. */
6701 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
6706 md
.explicit_mode
= md
.default_explicit_mode
;
6708 bfd_set_section_alignment (stdoutput
, text_section
, 4);
6710 /* Make sure function pointers get initialized. */
6711 target_big_endian
= -1;
6712 dot_byteorder (default_big_endian
);
6714 alias_hash
= hash_new ();
6715 alias_name_hash
= hash_new ();
6716 secalias_hash
= hash_new ();
6717 secalias_name_hash
= hash_new ();
6719 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
6720 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
6721 &zero_address_frag
);
6723 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
6724 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
6725 &zero_address_frag
);
6727 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
6728 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
6729 &zero_address_frag
);
6731 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
6732 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
6733 &zero_address_frag
);
6735 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
6736 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
6737 &zero_address_frag
);
6739 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
6740 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
6741 &zero_address_frag
);
6743 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
6744 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
6745 &zero_address_frag
);
6747 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
6748 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
6749 &zero_address_frag
);
6751 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
6752 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
6753 &zero_address_frag
);
6755 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
6756 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
6757 &zero_address_frag
);
6759 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
6760 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
6761 &zero_address_frag
);
6763 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
6764 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
6765 &zero_address_frag
);
6767 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
6768 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
6769 &zero_address_frag
);
6771 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
6772 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
6773 &zero_address_frag
);
6775 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
6776 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
6777 &zero_address_frag
);
6779 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
6780 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
6781 &zero_address_frag
);
6783 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
6784 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
6785 &zero_address_frag
);
6787 /* Compute the table of best templates. We compute goodness as a
6788 base 4 value, in which each match counts for 3, each F counts
6789 for 2, each B counts for 1. This should maximize the number of
6790 F and B nops in the chosen bundles, which is good because these
6791 pipelines are least likely to be overcommitted. */
6792 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
6793 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
6794 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
6797 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
6800 if (match (t
, i
, 0))
6802 if (match (t
, j
, 1))
6804 if (match (t
, k
, 2))
6805 goodness
= 3 + 3 + 3;
6807 goodness
= 3 + 3 + extra_goodness (t
, 2);
6809 else if (match (t
, j
, 2))
6810 goodness
= 3 + 3 + extra_goodness (t
, 1);
6814 goodness
+= extra_goodness (t
, 1);
6815 goodness
+= extra_goodness (t
, 2);
6818 else if (match (t
, i
, 1))
6820 if (match (t
, j
, 2))
6823 goodness
= 3 + extra_goodness (t
, 2);
6825 else if (match (t
, i
, 2))
6826 goodness
= 3 + extra_goodness (t
, 1);
6828 if (goodness
> best
)
6831 best_template
[i
][j
][k
] = t
;
6836 for (i
= 0; i
< NUM_SLOTS
; ++i
)
6837 md
.slot
[i
].user_template
= -1;
6839 md
.pseudo_hash
= hash_new ();
6840 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
6842 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
6843 (void *) (pseudo_opcode
+ i
));
6845 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6846 pseudo_opcode
[i
].name
, err
);
6849 md
.reg_hash
= hash_new ();
6850 md
.dynreg_hash
= hash_new ();
6851 md
.const_hash
= hash_new ();
6852 md
.entry_hash
= hash_new ();
6854 /* general registers: */
6857 for (i
= 0; i
< total
; ++i
)
6859 sprintf (name
, "r%d", i
- REG_GR
);
6860 md
.regsym
[i
] = declare_register (name
, i
);
6863 /* floating point registers: */
6865 for (; i
< total
; ++i
)
6867 sprintf (name
, "f%d", i
- REG_FR
);
6868 md
.regsym
[i
] = declare_register (name
, i
);
6871 /* application registers: */
6874 for (; i
< total
; ++i
)
6876 sprintf (name
, "ar%d", i
- REG_AR
);
6877 md
.regsym
[i
] = declare_register (name
, i
);
6880 /* control registers: */
6883 for (; i
< total
; ++i
)
6885 sprintf (name
, "cr%d", i
- REG_CR
);
6886 md
.regsym
[i
] = declare_register (name
, i
);
6889 /* predicate registers: */
6891 for (; i
< total
; ++i
)
6893 sprintf (name
, "p%d", i
- REG_P
);
6894 md
.regsym
[i
] = declare_register (name
, i
);
6897 /* branch registers: */
6899 for (; i
< total
; ++i
)
6901 sprintf (name
, "b%d", i
- REG_BR
);
6902 md
.regsym
[i
] = declare_register (name
, i
);
6905 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
6906 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
6907 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
6908 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
6909 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
6910 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
6911 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
6913 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
6915 regnum
= indirect_reg
[i
].regnum
;
6916 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
6919 /* define synonyms for application registers: */
6920 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
6921 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
6922 REG_AR
+ ar
[i
- REG_AR
].regnum
);
6924 /* define synonyms for control registers: */
6925 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
6926 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
6927 REG_CR
+ cr
[i
- REG_CR
].regnum
);
6929 declare_register ("gp", REG_GR
+ 1);
6930 declare_register ("sp", REG_GR
+ 12);
6931 declare_register ("rp", REG_BR
+ 0);
6933 /* pseudo-registers used to specify unwind info: */
6934 declare_register ("psp", REG_PSP
);
6936 declare_register_set ("ret", 4, REG_GR
+ 8);
6937 declare_register_set ("farg", 8, REG_FR
+ 8);
6938 declare_register_set ("fret", 8, REG_FR
+ 8);
6940 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
6942 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
6943 (PTR
) (const_bits
+ i
));
6945 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6949 /* Set the architecture and machine depending on defaults and command line
6951 if (md
.flags
& EF_IA_64_ABI64
)
6952 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
6954 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
6957 as_warn (_("Could not set architecture and machine"));
6959 /* Set the pointer size and pointer shift size depending on md.flags */
6961 if (md
.flags
& EF_IA_64_ABI64
)
6963 md
.pointer_size
= 8; /* pointers are 8 bytes */
6964 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
6968 md
.pointer_size
= 4; /* pointers are 4 bytes */
6969 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
6972 md
.mem_offset
.hint
= 0;
6975 md
.entry_labels
= NULL
;
6978 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6979 because that is called after md_parse_option which is where we do the
6980 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6981 default endianness. */
6984 ia64_init (argc
, argv
)
6985 int argc ATTRIBUTE_UNUSED
;
6986 char **argv ATTRIBUTE_UNUSED
;
6988 md
.flags
= MD_FLAGS_DEFAULT
;
6991 /* Return a string for the target object file format. */
6994 ia64_target_format ()
6996 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
6998 if (md
.flags
& EF_IA_64_BE
)
7000 if (md
.flags
& EF_IA_64_ABI64
)
7001 #if defined(TE_AIX50)
7002 return "elf64-ia64-aix-big";
7003 #elif defined(TE_HPUX)
7004 return "elf64-ia64-hpux-big";
7006 return "elf64-ia64-big";
7009 #if defined(TE_AIX50)
7010 return "elf32-ia64-aix-big";
7011 #elif defined(TE_HPUX)
7012 return "elf32-ia64-hpux-big";
7014 return "elf32-ia64-big";
7019 if (md
.flags
& EF_IA_64_ABI64
)
7021 return "elf64-ia64-aix-little";
7023 return "elf64-ia64-little";
7027 return "elf32-ia64-aix-little";
7029 return "elf32-ia64-little";
7034 return "unknown-format";
7038 ia64_end_of_source ()
7040 /* terminate insn group upon reaching end of file: */
7041 insn_group_break (1, 0, 0);
7043 /* emits slots we haven't written yet: */
7044 ia64_flush_insns ();
7046 bfd_set_private_flags (stdoutput
, md
.flags
);
7048 md
.mem_offset
.hint
= 0;
7054 if (md
.qp
.X_op
== O_register
)
7055 as_bad ("qualifying predicate not followed by instruction");
7056 md
.qp
.X_op
= O_absent
;
7058 if (ignore_input ())
7061 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7063 if (md
.detect_dv
&& !md
.explicit_mode
)
7064 as_warn (_("Explicit stops are ignored in auto mode"));
7066 insn_group_break (1, 0, 0);
7070 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7072 static int defining_tag
= 0;
7075 ia64_unrecognized_line (ch
)
7081 expression (&md
.qp
);
7082 if (*input_line_pointer
++ != ')')
7084 as_bad ("Expected ')'");
7087 if (md
.qp
.X_op
!= O_register
)
7089 as_bad ("Qualifying predicate expected");
7092 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7094 as_bad ("Predicate register expected");
7100 if (md
.manual_bundling
)
7101 as_warn ("Found '{' when manual bundling is already turned on");
7103 CURR_SLOT
.manual_bundling_on
= 1;
7104 md
.manual_bundling
= 1;
7106 /* Bundling is only acceptable in explicit mode
7107 or when in default automatic mode. */
7108 if (md
.detect_dv
&& !md
.explicit_mode
)
7110 if (!md
.mode_explicitly_set
7111 && !md
.default_explicit_mode
)
7114 as_warn (_("Found '{' after explicit switch to automatic mode"));
7119 if (!md
.manual_bundling
)
7120 as_warn ("Found '}' when manual bundling is off");
7122 PREV_SLOT
.manual_bundling_off
= 1;
7123 md
.manual_bundling
= 0;
7125 /* switch back to automatic mode, if applicable */
7128 && !md
.mode_explicitly_set
7129 && !md
.default_explicit_mode
)
7132 /* Allow '{' to follow on the same line. We also allow ";;", but that
7133 happens automatically because ';' is an end of line marker. */
7135 if (input_line_pointer
[0] == '{')
7137 input_line_pointer
++;
7138 return ia64_unrecognized_line ('{');
7141 demand_empty_rest_of_line ();
7151 if (md
.qp
.X_op
== O_register
)
7153 as_bad ("Tag must come before qualifying predicate.");
7157 /* This implements just enough of read_a_source_file in read.c to
7158 recognize labels. */
7159 if (is_name_beginner (*input_line_pointer
))
7161 s
= input_line_pointer
;
7162 c
= get_symbol_end ();
7164 else if (LOCAL_LABELS_FB
7165 && ISDIGIT (*input_line_pointer
))
7168 while (ISDIGIT (*input_line_pointer
))
7169 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7170 fb_label_instance_inc (temp
);
7171 s
= fb_label_name (temp
, 0);
7172 c
= *input_line_pointer
;
7181 /* Put ':' back for error messages' sake. */
7182 *input_line_pointer
++ = ':';
7183 as_bad ("Expected ':'");
7190 /* Put ':' back for error messages' sake. */
7191 *input_line_pointer
++ = ':';
7192 if (*input_line_pointer
++ != ']')
7194 as_bad ("Expected ']'");
7199 as_bad ("Tag name expected");
7209 /* Not a valid line. */
7214 ia64_frob_label (sym
)
7217 struct label_fix
*fix
;
7219 /* Tags need special handling since they are not bundle breaks like
7223 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7225 fix
->next
= CURR_SLOT
.tag_fixups
;
7226 CURR_SLOT
.tag_fixups
= fix
;
7231 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7233 md
.last_text_seg
= now_seg
;
7234 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7236 fix
->next
= CURR_SLOT
.label_fixups
;
7237 CURR_SLOT
.label_fixups
= fix
;
7239 /* Keep track of how many code entry points we've seen. */
7240 if (md
.path
== md
.maxpaths
)
7243 md
.entry_labels
= (const char **)
7244 xrealloc ((void *) md
.entry_labels
,
7245 md
.maxpaths
* sizeof (char *));
7247 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7252 /* The HP-UX linker will give unresolved symbol errors for symbols
7253 that are declared but unused. This routine removes declared,
7254 unused symbols from an object. */
7256 ia64_frob_symbol (sym
)
7259 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7260 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7261 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7262 && ! S_IS_EXTERNAL (sym
)))
7269 ia64_flush_pending_output ()
7271 if (!md
.keep_pending_output
7272 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7274 /* ??? This causes many unnecessary stop bits to be emitted.
7275 Unfortunately, it isn't clear if it is safe to remove this. */
7276 insn_group_break (1, 0, 0);
7277 ia64_flush_insns ();
7281 /* Do ia64-specific expression optimization. All that's done here is
7282 to transform index expressions that are either due to the indexing
7283 of rotating registers or due to the indexing of indirect register
7286 ia64_optimize_expr (l
, op
, r
)
7295 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7297 num_regs
= (l
->X_add_number
>> 16);
7298 if ((unsigned) r
->X_add_number
>= num_regs
)
7301 as_bad ("No current frame");
7303 as_bad ("Index out of range 0..%u", num_regs
- 1);
7304 r
->X_add_number
= 0;
7306 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7309 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7311 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7312 || l
->X_add_number
== IND_MEM
)
7314 as_bad ("Indirect register set name expected");
7315 l
->X_add_number
= IND_CPUID
;
7318 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7319 l
->X_add_number
= r
->X_add_number
;
7327 ia64_parse_name (name
, e
)
7331 struct const_desc
*cdesc
;
7332 struct dynreg
*dr
= 0;
7333 unsigned int regnum
;
7337 /* first see if NAME is a known register name: */
7338 sym
= hash_find (md
.reg_hash
, name
);
7341 e
->X_op
= O_register
;
7342 e
->X_add_number
= S_GET_VALUE (sym
);
7346 cdesc
= hash_find (md
.const_hash
, name
);
7349 e
->X_op
= O_constant
;
7350 e
->X_add_number
= cdesc
->value
;
7354 /* check for inN, locN, or outN: */
7358 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7366 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7374 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7387 /* The name is inN, locN, or outN; parse the register number. */
7388 regnum
= strtoul (name
, &end
, 10);
7389 if (end
> name
&& *end
== '\0')
7391 if ((unsigned) regnum
>= dr
->num_regs
)
7394 as_bad ("No current frame");
7396 as_bad ("Register number out of range 0..%u",
7400 e
->X_op
= O_register
;
7401 e
->X_add_number
= dr
->base
+ regnum
;
7406 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7408 /* We've got ourselves the name of a rotating register set.
7409 Store the base register number in the low 16 bits of
7410 X_add_number and the size of the register set in the top 16
7412 e
->X_op
= O_register
;
7413 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7419 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7422 ia64_canonicalize_symbol_name (name
)
7425 size_t len
= strlen (name
);
7426 if (len
> 1 && name
[len
- 1] == '#')
7427 name
[len
- 1] = '\0';
7431 /* Return true if idesc is a conditional branch instruction. This excludes
7432 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7433 because they always read/write resources regardless of the value of the
7434 qualifying predicate. br.ia must always use p0, and hence is always
7435 taken. Thus this function returns true for branches which can fall
7436 through, and which use no resources if they do fall through. */
7439 is_conditional_branch (idesc
)
7440 struct ia64_opcode
*idesc
;
7442 /* br is a conditional branch. Everything that starts with br. except
7443 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7444 Everything that starts with brl is a conditional branch. */
7445 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
7446 && (idesc
->name
[2] == '\0'
7447 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
7448 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
7449 || idesc
->name
[2] == 'l'
7450 /* br.cond, br.call, br.clr */
7451 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
7452 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
7453 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
7456 /* Return whether the given opcode is a taken branch. If there's any doubt,
7460 is_taken_branch (idesc
)
7461 struct ia64_opcode
*idesc
;
7463 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
7464 || strncmp (idesc
->name
, "br.ia", 5) == 0);
7467 /* Return whether the given opcode is an interruption or rfi. If there's any
7468 doubt, returns zero. */
7471 is_interruption_or_rfi (idesc
)
7472 struct ia64_opcode
*idesc
;
7474 if (strcmp (idesc
->name
, "rfi") == 0)
7479 /* Returns the index of the given dependency in the opcode's list of chks, or
7480 -1 if there is no dependency. */
7483 depends_on (depind
, idesc
)
7485 struct ia64_opcode
*idesc
;
7488 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
7489 for (i
= 0; i
< dep
->nchks
; i
++)
7491 if (depind
== DEP (dep
->chks
[i
]))
7497 /* Determine a set of specific resources used for a particular resource
7498 class. Returns the number of specific resources identified For those
7499 cases which are not determinable statically, the resource returned is
7502 Meanings of value in 'NOTE':
7503 1) only read/write when the register number is explicitly encoded in the
7505 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7506 accesses CFM when qualifying predicate is in the rotating region.
7507 3) general register value is used to specify an indirect register; not
7508 determinable statically.
7509 4) only read the given resource when bits 7:0 of the indirect index
7510 register value does not match the register number of the resource; not
7511 determinable statically.
7512 5) all rules are implementation specific.
7513 6) only when both the index specified by the reader and the index specified
7514 by the writer have the same value in bits 63:61; not determinable
7516 7) only access the specified resource when the corresponding mask bit is
7518 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7519 only read when these insns reference FR2-31
7520 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7521 written when these insns write FR32-127
7522 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7524 11) The target predicates are written independently of PR[qp], but source
7525 registers are only read if PR[qp] is true. Since the state of PR[qp]
7526 cannot statically be determined, all source registers are marked used.
7527 12) This insn only reads the specified predicate register when that
7528 register is the PR[qp].
7529 13) This reference to ld-c only applies to teh GR whose value is loaded
7530 with data returned from memory, not the post-incremented address register.
7531 14) The RSE resource includes the implementation-specific RSE internal
7532 state resources. At least one (and possibly more) of these resources are
7533 read by each instruction listed in IC:rse-readers. At least one (and
7534 possibly more) of these resources are written by each insn listed in
7536 15+16) Represents reserved instructions, which the assembler does not
7539 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7540 this code; there are no dependency violations based on memory access.
7543 #define MAX_SPECS 256
7548 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
7549 const struct ia64_dependency
*dep
;
7550 struct ia64_opcode
*idesc
;
7551 int type
; /* is this a DV chk or a DV reg? */
7552 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
7553 int note
; /* resource note for this insn's usage */
7554 int path
; /* which execution path to examine */
7561 if (dep
->mode
== IA64_DV_WAW
7562 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
7563 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
7566 /* template for any resources we identify */
7567 tmpl
.dependency
= dep
;
7569 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
7570 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
7571 tmpl
.link_to_qp_branch
= 1;
7572 tmpl
.mem_offset
.hint
= 0;
7575 tmpl
.cmp_type
= CMP_NONE
;
7578 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7579 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7580 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7582 /* we don't need to track these */
7583 if (dep
->semantics
== IA64_DVS_NONE
)
7586 switch (dep
->specifier
)
7591 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7593 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7594 if (regno
>= 0 && regno
<= 7)
7596 specs
[count
] = tmpl
;
7597 specs
[count
++].index
= regno
;
7603 for (i
= 0; i
< 8; i
++)
7605 specs
[count
] = tmpl
;
7606 specs
[count
++].index
= i
;
7615 case IA64_RS_AR_UNAT
:
7616 /* This is a mov =AR or mov AR= instruction. */
7617 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7619 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7620 if (regno
== AR_UNAT
)
7622 specs
[count
++] = tmpl
;
7627 /* This is a spill/fill, or other instruction that modifies the
7630 /* Unless we can determine the specific bits used, mark the whole
7631 thing; bits 8:3 of the memory address indicate the bit used in
7632 UNAT. The .mem.offset hint may be used to eliminate a small
7633 subset of conflicts. */
7634 specs
[count
] = tmpl
;
7635 if (md
.mem_offset
.hint
)
7638 fprintf (stderr
, " Using hint for spill/fill\n");
7639 /* The index isn't actually used, just set it to something
7640 approximating the bit index. */
7641 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
7642 specs
[count
].mem_offset
.hint
= 1;
7643 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
7644 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
7648 specs
[count
++].specific
= 0;
7656 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7658 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7659 if ((regno
>= 8 && regno
<= 15)
7660 || (regno
>= 20 && regno
<= 23)
7661 || (regno
>= 31 && regno
<= 39)
7662 || (regno
>= 41 && regno
<= 47)
7663 || (regno
>= 67 && regno
<= 111))
7665 specs
[count
] = tmpl
;
7666 specs
[count
++].index
= regno
;
7679 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7681 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7682 if ((regno
>= 48 && regno
<= 63)
7683 || (regno
>= 112 && regno
<= 127))
7685 specs
[count
] = tmpl
;
7686 specs
[count
++].index
= regno
;
7692 for (i
= 48; i
< 64; i
++)
7694 specs
[count
] = tmpl
;
7695 specs
[count
++].index
= i
;
7697 for (i
= 112; i
< 128; i
++)
7699 specs
[count
] = tmpl
;
7700 specs
[count
++].index
= i
;
7718 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7719 if (idesc
->operands
[i
] == IA64_OPND_B1
7720 || idesc
->operands
[i
] == IA64_OPND_B2
)
7722 specs
[count
] = tmpl
;
7723 specs
[count
++].index
=
7724 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7729 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7730 if (idesc
->operands
[i
] == IA64_OPND_B1
7731 || idesc
->operands
[i
] == IA64_OPND_B2
)
7733 specs
[count
] = tmpl
;
7734 specs
[count
++].index
=
7735 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7741 case IA64_RS_CPUID
: /* four or more registers */
7744 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
7746 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7747 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7750 specs
[count
] = tmpl
;
7751 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7755 specs
[count
] = tmpl
;
7756 specs
[count
++].specific
= 0;
7766 case IA64_RS_DBR
: /* four or more registers */
7769 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
7771 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7772 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7775 specs
[count
] = tmpl
;
7776 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7780 specs
[count
] = tmpl
;
7781 specs
[count
++].specific
= 0;
7785 else if (note
== 0 && !rsrc_write
)
7787 specs
[count
] = tmpl
;
7788 specs
[count
++].specific
= 0;
7796 case IA64_RS_IBR
: /* four or more registers */
7799 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
7801 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7802 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7805 specs
[count
] = tmpl
;
7806 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7810 specs
[count
] = tmpl
;
7811 specs
[count
++].specific
= 0;
7824 /* These are implementation specific. Force all references to
7825 conflict with all other references. */
7826 specs
[count
] = tmpl
;
7827 specs
[count
++].specific
= 0;
7835 case IA64_RS_PKR
: /* 16 or more registers */
7836 if (note
== 3 || note
== 4)
7838 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
7840 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7841 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7846 specs
[count
] = tmpl
;
7847 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7850 for (i
= 0; i
< NELEMS (gr_values
); i
++)
7852 /* Uses all registers *except* the one in R3. */
7853 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
7855 specs
[count
] = tmpl
;
7856 specs
[count
++].index
= i
;
7862 specs
[count
] = tmpl
;
7863 specs
[count
++].specific
= 0;
7870 specs
[count
] = tmpl
;
7871 specs
[count
++].specific
= 0;
7875 case IA64_RS_PMC
: /* four or more registers */
7878 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
7879 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
7882 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
7884 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
7885 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7888 specs
[count
] = tmpl
;
7889 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7893 specs
[count
] = tmpl
;
7894 specs
[count
++].specific
= 0;
7904 case IA64_RS_PMD
: /* four or more registers */
7907 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
7909 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7910 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7913 specs
[count
] = tmpl
;
7914 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7918 specs
[count
] = tmpl
;
7919 specs
[count
++].specific
= 0;
7929 case IA64_RS_RR
: /* eight registers */
7932 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
7934 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7935 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7938 specs
[count
] = tmpl
;
7939 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
7943 specs
[count
] = tmpl
;
7944 specs
[count
++].specific
= 0;
7948 else if (note
== 0 && !rsrc_write
)
7950 specs
[count
] = tmpl
;
7951 specs
[count
++].specific
= 0;
7959 case IA64_RS_CR_IRR
:
7962 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7963 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
7965 && idesc
->operands
[1] == IA64_OPND_CR3
7968 for (i
= 0; i
< 4; i
++)
7970 specs
[count
] = tmpl
;
7971 specs
[count
++].index
= CR_IRR0
+ i
;
7977 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7978 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
7980 && regno
<= CR_IRR3
)
7982 specs
[count
] = tmpl
;
7983 specs
[count
++].index
= regno
;
7992 case IA64_RS_CR_LRR
:
7999 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8000 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8001 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8003 specs
[count
] = tmpl
;
8004 specs
[count
++].index
= regno
;
8012 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8014 specs
[count
] = tmpl
;
8015 specs
[count
++].index
=
8016 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8031 else if (rsrc_write
)
8033 if (dep
->specifier
== IA64_RS_FRb
8034 && idesc
->operands
[0] == IA64_OPND_F1
)
8036 specs
[count
] = tmpl
;
8037 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8042 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8044 if (idesc
->operands
[i
] == IA64_OPND_F2
8045 || idesc
->operands
[i
] == IA64_OPND_F3
8046 || idesc
->operands
[i
] == IA64_OPND_F4
)
8048 specs
[count
] = tmpl
;
8049 specs
[count
++].index
=
8050 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8059 /* This reference applies only to the GR whose value is loaded with
8060 data returned from memory. */
8061 specs
[count
] = tmpl
;
8062 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8068 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8069 if (idesc
->operands
[i
] == IA64_OPND_R1
8070 || idesc
->operands
[i
] == IA64_OPND_R2
8071 || idesc
->operands
[i
] == IA64_OPND_R3
)
8073 specs
[count
] = tmpl
;
8074 specs
[count
++].index
=
8075 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8077 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8078 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8079 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8081 specs
[count
] = tmpl
;
8082 specs
[count
++].index
=
8083 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8088 /* Look for anything that reads a GR. */
8089 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8091 if (idesc
->operands
[i
] == IA64_OPND_MR3
8092 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8093 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8094 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8095 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8096 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8097 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8098 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8099 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8100 || ((i
>= idesc
->num_outputs
)
8101 && (idesc
->operands
[i
] == IA64_OPND_R1
8102 || idesc
->operands
[i
] == IA64_OPND_R2
8103 || idesc
->operands
[i
] == IA64_OPND_R3
8104 /* addl source register. */
8105 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8107 specs
[count
] = tmpl
;
8108 specs
[count
++].index
=
8109 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8120 /* This is the same as IA64_RS_PRr, except that the register range is
8121 from 1 - 15, and there are no rotating register reads/writes here. */
8125 for (i
= 1; i
< 16; i
++)
8127 specs
[count
] = tmpl
;
8128 specs
[count
++].index
= i
;
8134 /* Mark only those registers indicated by the mask. */
8137 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8138 for (i
= 1; i
< 16; i
++)
8139 if (mask
& ((valueT
) 1 << i
))
8141 specs
[count
] = tmpl
;
8142 specs
[count
++].index
= i
;
8150 else if (note
== 11) /* note 11 implies note 1 as well */
8154 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8156 if (idesc
->operands
[i
] == IA64_OPND_P1
8157 || idesc
->operands
[i
] == IA64_OPND_P2
)
8159 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8160 if (regno
>= 1 && regno
< 16)
8162 specs
[count
] = tmpl
;
8163 specs
[count
++].index
= regno
;
8173 else if (note
== 12)
8175 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8177 specs
[count
] = tmpl
;
8178 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8185 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8186 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8187 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8188 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8190 if ((idesc
->operands
[0] == IA64_OPND_P1
8191 || idesc
->operands
[0] == IA64_OPND_P2
)
8192 && p1
>= 1 && p1
< 16)
8194 specs
[count
] = tmpl
;
8195 specs
[count
].cmp_type
=
8196 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8197 specs
[count
++].index
= p1
;
8199 if ((idesc
->operands
[1] == IA64_OPND_P1
8200 || idesc
->operands
[1] == IA64_OPND_P2
)
8201 && p2
>= 1 && p2
< 16)
8203 specs
[count
] = tmpl
;
8204 specs
[count
].cmp_type
=
8205 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8206 specs
[count
++].index
= p2
;
8211 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8213 specs
[count
] = tmpl
;
8214 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8216 if (idesc
->operands
[1] == IA64_OPND_PR
)
8218 for (i
= 1; i
< 16; i
++)
8220 specs
[count
] = tmpl
;
8221 specs
[count
++].index
= i
;
8232 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8233 simplified cases of this. */
8237 for (i
= 16; i
< 63; i
++)
8239 specs
[count
] = tmpl
;
8240 specs
[count
++].index
= i
;
8246 /* Mark only those registers indicated by the mask. */
8248 && idesc
->operands
[0] == IA64_OPND_PR
)
8250 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8251 if (mask
& ((valueT
) 1 << 16))
8252 for (i
= 16; i
< 63; i
++)
8254 specs
[count
] = tmpl
;
8255 specs
[count
++].index
= i
;
8259 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8261 for (i
= 16; i
< 63; i
++)
8263 specs
[count
] = tmpl
;
8264 specs
[count
++].index
= i
;
8272 else if (note
== 11) /* note 11 implies note 1 as well */
8276 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8278 if (idesc
->operands
[i
] == IA64_OPND_P1
8279 || idesc
->operands
[i
] == IA64_OPND_P2
)
8281 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8282 if (regno
>= 16 && regno
< 63)
8284 specs
[count
] = tmpl
;
8285 specs
[count
++].index
= regno
;
8295 else if (note
== 12)
8297 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8299 specs
[count
] = tmpl
;
8300 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8307 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8308 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8309 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8310 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8312 if ((idesc
->operands
[0] == IA64_OPND_P1
8313 || idesc
->operands
[0] == IA64_OPND_P2
)
8314 && p1
>= 16 && p1
< 63)
8316 specs
[count
] = tmpl
;
8317 specs
[count
].cmp_type
=
8318 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8319 specs
[count
++].index
= p1
;
8321 if ((idesc
->operands
[1] == IA64_OPND_P1
8322 || idesc
->operands
[1] == IA64_OPND_P2
)
8323 && p2
>= 16 && p2
< 63)
8325 specs
[count
] = tmpl
;
8326 specs
[count
].cmp_type
=
8327 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8328 specs
[count
++].index
= p2
;
8333 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8335 specs
[count
] = tmpl
;
8336 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8338 if (idesc
->operands
[1] == IA64_OPND_PR
)
8340 for (i
= 16; i
< 63; i
++)
8342 specs
[count
] = tmpl
;
8343 specs
[count
++].index
= i
;
8355 /* Verify that the instruction is using the PSR bit indicated in
8359 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8361 if (dep
->regindex
< 6)
8363 specs
[count
++] = tmpl
;
8366 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8368 if (dep
->regindex
< 32
8369 || dep
->regindex
== 35
8370 || dep
->regindex
== 36
8371 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8373 specs
[count
++] = tmpl
;
8376 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8378 if (dep
->regindex
< 32
8379 || dep
->regindex
== 35
8380 || dep
->regindex
== 36
8381 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8383 specs
[count
++] = tmpl
;
8388 /* Several PSR bits have very specific dependencies. */
8389 switch (dep
->regindex
)
8392 specs
[count
++] = tmpl
;
8397 specs
[count
++] = tmpl
;
8401 /* Only certain CR accesses use PSR.ic */
8402 if (idesc
->operands
[0] == IA64_OPND_CR3
8403 || idesc
->operands
[1] == IA64_OPND_CR3
)
8406 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8409 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
8424 specs
[count
++] = tmpl
;
8433 specs
[count
++] = tmpl
;
8437 /* Only some AR accesses use cpl */
8438 if (idesc
->operands
[0] == IA64_OPND_AR3
8439 || idesc
->operands
[1] == IA64_OPND_AR3
)
8442 ((idesc
->operands
[0] == IA64_OPND_AR3
)
8445 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
8452 && regno
<= AR_K7
))))
8454 specs
[count
++] = tmpl
;
8459 specs
[count
++] = tmpl
;
8469 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
8471 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
8477 if (mask
& ((valueT
) 1 << dep
->regindex
))
8479 specs
[count
++] = tmpl
;
8484 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
8485 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
8486 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8487 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8489 if (idesc
->operands
[i
] == IA64_OPND_F1
8490 || idesc
->operands
[i
] == IA64_OPND_F2
8491 || idesc
->operands
[i
] == IA64_OPND_F3
8492 || idesc
->operands
[i
] == IA64_OPND_F4
)
8494 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8495 if (reg
>= min
&& reg
<= max
)
8497 specs
[count
++] = tmpl
;
8504 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
8505 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
8506 /* mfh is read on writes to FR32-127; mfl is read on writes to
8508 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8510 if (idesc
->operands
[i
] == IA64_OPND_F1
)
8512 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8513 if (reg
>= min
&& reg
<= max
)
8515 specs
[count
++] = tmpl
;
8520 else if (note
== 10)
8522 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8524 if (idesc
->operands
[i
] == IA64_OPND_R1
8525 || idesc
->operands
[i
] == IA64_OPND_R2
8526 || idesc
->operands
[i
] == IA64_OPND_R3
)
8528 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8529 if (regno
>= 16 && regno
<= 31)
8531 specs
[count
++] = tmpl
;
8542 case IA64_RS_AR_FPSR
:
8543 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8545 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8546 if (regno
== AR_FPSR
)
8548 specs
[count
++] = tmpl
;
8553 specs
[count
++] = tmpl
;
8558 /* Handle all AR[REG] resources */
8559 if (note
== 0 || note
== 1)
8561 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8562 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
8563 && regno
== dep
->regindex
)
8565 specs
[count
++] = tmpl
;
8567 /* other AR[REG] resources may be affected by AR accesses */
8568 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
8571 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
8572 switch (dep
->regindex
)
8578 if (regno
== AR_BSPSTORE
)
8580 specs
[count
++] = tmpl
;
8584 (regno
== AR_BSPSTORE
8585 || regno
== AR_RNAT
))
8587 specs
[count
++] = tmpl
;
8592 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8595 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
8596 switch (dep
->regindex
)
8601 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
8603 specs
[count
++] = tmpl
;
8610 specs
[count
++] = tmpl
;
8620 /* Handle all CR[REG] resources */
8621 if (note
== 0 || note
== 1)
8623 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8625 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8626 if (regno
== dep
->regindex
)
8628 specs
[count
++] = tmpl
;
8630 else if (!rsrc_write
)
8632 /* Reads from CR[IVR] affect other resources. */
8633 if (regno
== CR_IVR
)
8635 if ((dep
->regindex
>= CR_IRR0
8636 && dep
->regindex
<= CR_IRR3
)
8637 || dep
->regindex
== CR_TPR
)
8639 specs
[count
++] = tmpl
;
8646 specs
[count
++] = tmpl
;
8655 case IA64_RS_INSERVICE
:
8656 /* look for write of EOI (67) or read of IVR (65) */
8657 if ((idesc
->operands
[0] == IA64_OPND_CR3
8658 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
8659 || (idesc
->operands
[1] == IA64_OPND_CR3
8660 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
8662 specs
[count
++] = tmpl
;
8669 specs
[count
++] = tmpl
;
8680 specs
[count
++] = tmpl
;
8684 /* Check if any of the registers accessed are in the rotating region.
8685 mov to/from pr accesses CFM only when qp_regno is in the rotating
8687 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8689 if (idesc
->operands
[i
] == IA64_OPND_R1
8690 || idesc
->operands
[i
] == IA64_OPND_R2
8691 || idesc
->operands
[i
] == IA64_OPND_R3
)
8693 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8694 /* Assumes that md.rot.num_regs is always valid */
8695 if (md
.rot
.num_regs
> 0
8697 && num
< 31 + md
.rot
.num_regs
)
8699 specs
[count
] = tmpl
;
8700 specs
[count
++].specific
= 0;
8703 else if (idesc
->operands
[i
] == IA64_OPND_F1
8704 || idesc
->operands
[i
] == IA64_OPND_F2
8705 || idesc
->operands
[i
] == IA64_OPND_F3
8706 || idesc
->operands
[i
] == IA64_OPND_F4
)
8708 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8711 specs
[count
] = tmpl
;
8712 specs
[count
++].specific
= 0;
8715 else if (idesc
->operands
[i
] == IA64_OPND_P1
8716 || idesc
->operands
[i
] == IA64_OPND_P2
)
8718 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8721 specs
[count
] = tmpl
;
8722 specs
[count
++].specific
= 0;
8726 if (CURR_SLOT
.qp_regno
> 15)
8728 specs
[count
] = tmpl
;
8729 specs
[count
++].specific
= 0;
8734 /* This is the same as IA64_RS_PRr, except simplified to account for
8735 the fact that there is only one register. */
8739 specs
[count
++] = tmpl
;
8744 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
8745 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8746 if (mask
& ((valueT
) 1 << 63))
8747 specs
[count
++] = tmpl
;
8749 else if (note
== 11)
8751 if ((idesc
->operands
[0] == IA64_OPND_P1
8752 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
8753 || (idesc
->operands
[1] == IA64_OPND_P2
8754 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
8756 specs
[count
++] = tmpl
;
8759 else if (note
== 12)
8761 if (CURR_SLOT
.qp_regno
== 63)
8763 specs
[count
++] = tmpl
;
8770 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8771 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8772 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8773 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8776 && (idesc
->operands
[0] == IA64_OPND_P1
8777 || idesc
->operands
[0] == IA64_OPND_P2
))
8779 specs
[count
] = tmpl
;
8780 specs
[count
++].cmp_type
=
8781 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8784 && (idesc
->operands
[1] == IA64_OPND_P1
8785 || idesc
->operands
[1] == IA64_OPND_P2
))
8787 specs
[count
] = tmpl
;
8788 specs
[count
++].cmp_type
=
8789 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8794 if (CURR_SLOT
.qp_regno
== 63)
8796 specs
[count
++] = tmpl
;
8807 /* FIXME we can identify some individual RSE written resources, but RSE
8808 read resources have not yet been completely identified, so for now
8809 treat RSE as a single resource */
8810 if (strncmp (idesc
->name
, "mov", 3) == 0)
8814 if (idesc
->operands
[0] == IA64_OPND_AR3
8815 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
8817 specs
[count
] = tmpl
;
8818 specs
[count
++].index
= 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8823 if (idesc
->operands
[0] == IA64_OPND_AR3
)
8825 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
8826 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
8828 specs
[count
++] = tmpl
;
8831 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8833 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
8834 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
8835 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
8837 specs
[count
++] = tmpl
;
8844 specs
[count
++] = tmpl
;
8849 /* FIXME -- do any of these need to be non-specific? */
8850 specs
[count
++] = tmpl
;
8854 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
8861 /* Clear branch flags on marked resources. This breaks the link between the
8862 QP of the marking instruction and a subsequent branch on the same QP. */
8865 clear_qp_branch_flag (mask
)
8869 for (i
= 0; i
< regdepslen
; i
++)
8871 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
8872 if ((bit
& mask
) != 0)
8874 regdeps
[i
].link_to_qp_branch
= 0;
8879 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8880 any mutexes which contain one of the PRs and create new ones when
8884 update_qp_mutex (valueT mask
)
8890 while (i
< qp_mutexeslen
)
8892 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
8894 /* If it destroys and creates the same mutex, do nothing. */
8895 if (qp_mutexes
[i
].prmask
== mask
8896 && qp_mutexes
[i
].path
== md
.path
)
8907 fprintf (stderr
, " Clearing mutex relation");
8908 print_prmask (qp_mutexes
[i
].prmask
);
8909 fprintf (stderr
, "\n");
8912 /* Deal with the old mutex with more than 3+ PRs only if
8913 the new mutex on the same execution path with it.
8915 FIXME: The 3+ mutex support is incomplete.
8916 dot_pred_rel () may be a better place to fix it. */
8917 if (qp_mutexes
[i
].path
== md
.path
)
8919 /* If it is a proper subset of the mutex, create a
8922 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
8925 qp_mutexes
[i
].prmask
&= ~mask
;
8926 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
8928 /* Modify the mutex if there are more than one
8936 /* Remove the mutex. */
8937 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
8945 add_qp_mutex (mask
);
8950 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8952 Any changes to a PR clears the mutex relations which include that PR. */
8955 clear_qp_mutex (mask
)
8961 while (i
< qp_mutexeslen
)
8963 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
8967 fprintf (stderr
, " Clearing mutex relation");
8968 print_prmask (qp_mutexes
[i
].prmask
);
8969 fprintf (stderr
, "\n");
8971 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
8978 /* Clear implies relations which contain PRs in the given masks.
8979 P1_MASK indicates the source of the implies relation, while P2_MASK
8980 indicates the implied PR. */
8983 clear_qp_implies (p1_mask
, p2_mask
)
8990 while (i
< qp_implieslen
)
8992 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
8993 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
8996 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
8997 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
8998 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9005 /* Add the PRs specified to the list of implied relations. */
9008 add_qp_imply (p1
, p2
)
9015 /* p0 is not meaningful here. */
9016 if (p1
== 0 || p2
== 0)
9022 /* If it exists already, ignore it. */
9023 for (i
= 0; i
< qp_implieslen
; i
++)
9025 if (qp_implies
[i
].p1
== p1
9026 && qp_implies
[i
].p2
== p2
9027 && qp_implies
[i
].path
== md
.path
9028 && !qp_implies
[i
].p2_branched
)
9032 if (qp_implieslen
== qp_impliestotlen
)
9034 qp_impliestotlen
+= 20;
9035 qp_implies
= (struct qp_imply
*)
9036 xrealloc ((void *) qp_implies
,
9037 qp_impliestotlen
* sizeof (struct qp_imply
));
9040 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9041 qp_implies
[qp_implieslen
].p1
= p1
;
9042 qp_implies
[qp_implieslen
].p2
= p2
;
9043 qp_implies
[qp_implieslen
].path
= md
.path
;
9044 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9046 /* Add in the implied transitive relations; for everything that p2 implies,
9047 make p1 imply that, too; for everything that implies p1, make it imply p2
9049 for (i
= 0; i
< qp_implieslen
; i
++)
9051 if (qp_implies
[i
].p1
== p2
)
9052 add_qp_imply (p1
, qp_implies
[i
].p2
);
9053 if (qp_implies
[i
].p2
== p1
)
9054 add_qp_imply (qp_implies
[i
].p1
, p2
);
9056 /* Add in mutex relations implied by this implies relation; for each mutex
9057 relation containing p2, duplicate it and replace p2 with p1. */
9058 bit
= (valueT
) 1 << p1
;
9059 mask
= (valueT
) 1 << p2
;
9060 for (i
= 0; i
< qp_mutexeslen
; i
++)
9062 if (qp_mutexes
[i
].prmask
& mask
)
9063 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9067 /* Add the PRs specified in the mask to the mutex list; this means that only
9068 one of the PRs can be true at any time. PR0 should never be included in
9078 if (qp_mutexeslen
== qp_mutexestotlen
)
9080 qp_mutexestotlen
+= 20;
9081 qp_mutexes
= (struct qpmutex
*)
9082 xrealloc ((void *) qp_mutexes
,
9083 qp_mutexestotlen
* sizeof (struct qpmutex
));
9087 fprintf (stderr
, " Registering mutex on");
9088 print_prmask (mask
);
9089 fprintf (stderr
, "\n");
9091 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9092 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9096 has_suffix_p (name
, suffix
)
9100 size_t namelen
= strlen (name
);
9101 size_t sufflen
= strlen (suffix
);
9103 if (namelen
<= sufflen
)
9105 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9109 clear_register_values ()
9113 fprintf (stderr
, " Clearing register values\n");
9114 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9115 gr_values
[i
].known
= 0;
9118 /* Keep track of register values/changes which affect DV tracking.
9120 optimization note: should add a flag to classes of insns where otherwise we
9121 have to examine a group of strings to identify them. */
9124 note_register_values (idesc
)
9125 struct ia64_opcode
*idesc
;
9127 valueT qp_changemask
= 0;
9130 /* Invalidate values for registers being written to. */
9131 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9133 if (idesc
->operands
[i
] == IA64_OPND_R1
9134 || idesc
->operands
[i
] == IA64_OPND_R2
9135 || idesc
->operands
[i
] == IA64_OPND_R3
)
9137 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9138 if (regno
> 0 && regno
< NELEMS (gr_values
))
9139 gr_values
[regno
].known
= 0;
9141 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9143 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9144 if (regno
> 0 && regno
< 4)
9145 gr_values
[regno
].known
= 0;
9147 else if (idesc
->operands
[i
] == IA64_OPND_P1
9148 || idesc
->operands
[i
] == IA64_OPND_P2
)
9150 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9151 qp_changemask
|= (valueT
) 1 << regno
;
9153 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9155 if (idesc
->operands
[2] & (valueT
) 0x10000)
9156 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9158 qp_changemask
= idesc
->operands
[2];
9161 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9163 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9164 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9166 qp_changemask
= idesc
->operands
[1];
9167 qp_changemask
&= ~(valueT
) 0xFFFF;
9172 /* Always clear qp branch flags on any PR change. */
9173 /* FIXME there may be exceptions for certain compares. */
9174 clear_qp_branch_flag (qp_changemask
);
9176 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9177 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9179 qp_changemask
|= ~(valueT
) 0xFFFF;
9180 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9182 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9183 gr_values
[i
].known
= 0;
9185 clear_qp_mutex (qp_changemask
);
9186 clear_qp_implies (qp_changemask
, qp_changemask
);
9188 /* After a call, all register values are undefined, except those marked
9190 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9191 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9193 /* FIXME keep GR values which are marked as "safe_across_calls" */
9194 clear_register_values ();
9195 clear_qp_mutex (~qp_safe_across_calls
);
9196 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9197 clear_qp_branch_flag (~qp_safe_across_calls
);
9199 else if (is_interruption_or_rfi (idesc
)
9200 || is_taken_branch (idesc
))
9202 clear_register_values ();
9203 clear_qp_mutex (~(valueT
) 0);
9204 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9206 /* Look for mutex and implies relations. */
9207 else if ((idesc
->operands
[0] == IA64_OPND_P1
9208 || idesc
->operands
[0] == IA64_OPND_P2
)
9209 && (idesc
->operands
[1] == IA64_OPND_P1
9210 || idesc
->operands
[1] == IA64_OPND_P2
))
9212 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9213 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9214 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9215 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9217 /* If both PRs are PR0, we can't really do anything. */
9218 if (p1
== 0 && p2
== 0)
9221 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9223 /* In general, clear mutexes and implies which include P1 or P2,
9224 with the following exceptions. */
9225 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9226 || has_suffix_p (idesc
->name
, ".and.orcm"))
9228 clear_qp_implies (p2mask
, p1mask
);
9230 else if (has_suffix_p (idesc
->name
, ".andcm")
9231 || has_suffix_p (idesc
->name
, ".and"))
9233 clear_qp_implies (0, p1mask
| p2mask
);
9235 else if (has_suffix_p (idesc
->name
, ".orcm")
9236 || has_suffix_p (idesc
->name
, ".or"))
9238 clear_qp_mutex (p1mask
| p2mask
);
9239 clear_qp_implies (p1mask
| p2mask
, 0);
9245 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9247 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9248 if (p1
== 0 || p2
== 0)
9249 clear_qp_mutex (p1mask
| p2mask
);
9251 added
= update_qp_mutex (p1mask
| p2mask
);
9253 if (CURR_SLOT
.qp_regno
== 0
9254 || has_suffix_p (idesc
->name
, ".unc"))
9256 if (added
== 0 && p1
&& p2
)
9257 add_qp_mutex (p1mask
| p2mask
);
9258 if (CURR_SLOT
.qp_regno
!= 0)
9261 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9263 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9268 /* Look for mov imm insns into GRs. */
9269 else if (idesc
->operands
[0] == IA64_OPND_R1
9270 && (idesc
->operands
[1] == IA64_OPND_IMM22
9271 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9272 && (strcmp (idesc
->name
, "mov") == 0
9273 || strcmp (idesc
->name
, "movl") == 0))
9275 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9276 if (regno
> 0 && regno
< NELEMS (gr_values
))
9278 gr_values
[regno
].known
= 1;
9279 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9280 gr_values
[regno
].path
= md
.path
;
9283 fprintf (stderr
, " Know gr%d = ", regno
);
9284 fprintf_vma (stderr
, gr_values
[regno
].value
);
9285 fputs ("\n", stderr
);
9291 clear_qp_mutex (qp_changemask
);
9292 clear_qp_implies (qp_changemask
, qp_changemask
);
9296 /* Return whether the given predicate registers are currently mutex. */
9299 qp_mutex (p1
, p2
, path
)
9309 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9310 for (i
= 0; i
< qp_mutexeslen
; i
++)
9312 if (qp_mutexes
[i
].path
>= path
9313 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9320 /* Return whether the given resource is in the given insn's list of chks
9321 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9325 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9327 struct ia64_opcode
*idesc
;
9332 struct rsrc specs
[MAX_SPECS
];
9335 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9336 we don't need to check. One exception is note 11, which indicates that
9337 target predicates are written regardless of PR[qp]. */
9338 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9342 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9345 /* UNAT checking is a bit more specific than other resources */
9346 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9347 && specs
[count
].mem_offset
.hint
9348 && rs
->mem_offset
.hint
)
9350 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9352 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9353 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9360 /* Skip apparent PR write conflicts where both writes are an AND or both
9361 writes are an OR. */
9362 if (rs
->dependency
->specifier
== IA64_RS_PR
9363 || rs
->dependency
->specifier
== IA64_RS_PRr
9364 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9366 if (specs
[count
].cmp_type
!= CMP_NONE
9367 && specs
[count
].cmp_type
== rs
->cmp_type
)
9370 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
9371 dv_mode
[rs
->dependency
->mode
],
9372 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9373 specs
[count
].index
: 63);
9378 " %s on parallel compare conflict %s vs %s on PR%d\n",
9379 dv_mode
[rs
->dependency
->mode
],
9380 dv_cmp_type
[rs
->cmp_type
],
9381 dv_cmp_type
[specs
[count
].cmp_type
],
9382 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9383 specs
[count
].index
: 63);
9387 /* If either resource is not specific, conservatively assume a conflict
9389 if (!specs
[count
].specific
|| !rs
->specific
)
9391 else if (specs
[count
].index
== rs
->index
)
9396 fprintf (stderr
, " No %s conflicts\n", rs
->dependency
->name
);
9402 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9403 insert a stop to create the break. Update all resource dependencies
9404 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9405 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9406 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9410 insn_group_break (insert_stop
, qp_regno
, save_current
)
9417 if (insert_stop
&& md
.num_slots_in_use
> 0)
9418 PREV_SLOT
.end_of_insn_group
= 1;
9422 fprintf (stderr
, " Insn group break%s",
9423 (insert_stop
? " (w/stop)" : ""));
9425 fprintf (stderr
, " effective for QP=%d", qp_regno
);
9426 fprintf (stderr
, "\n");
9430 while (i
< regdepslen
)
9432 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
9435 && regdeps
[i
].qp_regno
!= qp_regno
)
9442 && CURR_SLOT
.src_file
== regdeps
[i
].file
9443 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
9449 /* clear dependencies which are automatically cleared by a stop, or
9450 those that have reached the appropriate state of insn serialization */
9451 if (dep
->semantics
== IA64_DVS_IMPLIED
9452 || dep
->semantics
== IA64_DVS_IMPLIEDF
9453 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
9455 print_dependency ("Removing", i
);
9456 regdeps
[i
] = regdeps
[--regdepslen
];
9460 if (dep
->semantics
== IA64_DVS_DATA
9461 || dep
->semantics
== IA64_DVS_INSTR
9462 || dep
->semantics
== IA64_DVS_SPECIFIC
)
9464 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
9465 regdeps
[i
].insn_srlz
= STATE_STOP
;
9466 if (regdeps
[i
].data_srlz
== STATE_NONE
)
9467 regdeps
[i
].data_srlz
= STATE_STOP
;
9474 /* Add the given resource usage spec to the list of active dependencies. */
9477 mark_resource (idesc
, dep
, spec
, depind
, path
)
9478 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
9479 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
9484 if (regdepslen
== regdepstotlen
)
9486 regdepstotlen
+= 20;
9487 regdeps
= (struct rsrc
*)
9488 xrealloc ((void *) regdeps
,
9489 regdepstotlen
* sizeof (struct rsrc
));
9492 regdeps
[regdepslen
] = *spec
;
9493 regdeps
[regdepslen
].depind
= depind
;
9494 regdeps
[regdepslen
].path
= path
;
9495 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
9496 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
9498 print_dependency ("Adding", regdepslen
);
9504 print_dependency (action
, depind
)
9510 fprintf (stderr
, " %s %s '%s'",
9511 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
9512 (regdeps
[depind
].dependency
)->name
);
9513 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
!= 0)
9514 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
9515 if (regdeps
[depind
].mem_offset
.hint
)
9517 fputs (" ", stderr
);
9518 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
9519 fputs ("+", stderr
);
9520 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
9522 fprintf (stderr
, "\n");
9527 instruction_serialization ()
9531 fprintf (stderr
, " Instruction serialization\n");
9532 for (i
= 0; i
< regdepslen
; i
++)
9533 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
9534 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
9538 data_serialization ()
9542 fprintf (stderr
, " Data serialization\n");
9543 while (i
< regdepslen
)
9545 if (regdeps
[i
].data_srlz
== STATE_STOP
9546 /* Note: as of 991210, all "other" dependencies are cleared by a
9547 data serialization. This might change with new tables */
9548 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
9550 print_dependency ("Removing", i
);
9551 regdeps
[i
] = regdeps
[--regdepslen
];
9558 /* Insert stops and serializations as needed to avoid DVs. */
9561 remove_marked_resource (rs
)
9564 switch (rs
->dependency
->semantics
)
9566 case IA64_DVS_SPECIFIC
:
9568 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
9569 /* ...fall through... */
9570 case IA64_DVS_INSTR
:
9572 fprintf (stderr
, "Inserting instr serialization\n");
9573 if (rs
->insn_srlz
< STATE_STOP
)
9574 insn_group_break (1, 0, 0);
9575 if (rs
->insn_srlz
< STATE_SRLZ
)
9577 struct slot oldslot
= CURR_SLOT
;
9578 /* Manually jam a srlz.i insn into the stream */
9579 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
9580 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
9581 instruction_serialization ();
9582 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9583 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9585 CURR_SLOT
= oldslot
;
9587 insn_group_break (1, 0, 0);
9589 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
9590 "other" types of DV are eliminated
9591 by a data serialization */
9594 fprintf (stderr
, "Inserting data serialization\n");
9595 if (rs
->data_srlz
< STATE_STOP
)
9596 insn_group_break (1, 0, 0);
9598 struct slot oldslot
= CURR_SLOT
;
9599 /* Manually jam a srlz.d insn into the stream */
9600 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
9601 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
9602 data_serialization ();
9603 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9604 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9606 CURR_SLOT
= oldslot
;
9609 case IA64_DVS_IMPLIED
:
9610 case IA64_DVS_IMPLIEDF
:
9612 fprintf (stderr
, "Inserting stop\n");
9613 insn_group_break (1, 0, 0);
9620 /* Check the resources used by the given opcode against the current dependency
9623 The check is run once for each execution path encountered. In this case,
9624 a unique execution path is the sequence of instructions following a code
9625 entry point, e.g. the following has three execution paths, one starting
9626 at L0, one at L1, and one at L2.
9635 check_dependencies (idesc
)
9636 struct ia64_opcode
*idesc
;
9638 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9642 /* Note that the number of marked resources may change within the
9643 loop if in auto mode. */
9645 while (i
< regdepslen
)
9647 struct rsrc
*rs
= ®deps
[i
];
9648 const struct ia64_dependency
*dep
= rs
->dependency
;
9653 if (dep
->semantics
== IA64_DVS_NONE
9654 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
9660 note
= NOTE (opdeps
->chks
[chkind
]);
9662 /* Check this resource against each execution path seen thus far. */
9663 for (path
= 0; path
<= md
.path
; path
++)
9667 /* If the dependency wasn't on the path being checked, ignore it. */
9668 if (rs
->path
< path
)
9671 /* If the QP for this insn implies a QP which has branched, don't
9672 bother checking. Ed. NOTE: I don't think this check is terribly
9673 useful; what's the point of generating code which will only be
9674 reached if its QP is zero?
9675 This code was specifically inserted to handle the following code,
9676 based on notes from Intel's DV checking code, where p1 implies p2.
9682 if (CURR_SLOT
.qp_regno
!= 0)
9686 for (implies
= 0; implies
< qp_implieslen
; implies
++)
9688 if (qp_implies
[implies
].path
>= path
9689 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
9690 && qp_implies
[implies
].p2_branched
)
9700 if ((matchtype
= resources_match (rs
, idesc
, note
,
9701 CURR_SLOT
.qp_regno
, path
)) != 0)
9704 char pathmsg
[256] = "";
9705 char indexmsg
[256] = "";
9706 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
9709 sprintf (pathmsg
, " when entry is at label '%s'",
9710 md
.entry_labels
[path
- 1]);
9711 if (rs
->specific
&& rs
->index
!= 0)
9712 sprintf (indexmsg
, ", specific resource number is %d",
9714 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9716 (certain
? "violates" : "may violate"),
9717 dv_mode
[dep
->mode
], dep
->name
,
9718 dv_sem
[dep
->semantics
],
9721 if (md
.explicit_mode
)
9723 as_warn ("%s", msg
);
9725 as_warn (_("Only the first path encountering the conflict "
9727 as_warn_where (rs
->file
, rs
->line
,
9728 _("This is the location of the "
9729 "conflicting usage"));
9730 /* Don't bother checking other paths, to avoid duplicating
9737 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
9739 remove_marked_resource (rs
);
9741 /* since the set of dependencies has changed, start over */
9742 /* FIXME -- since we're removing dvs as we go, we
9743 probably don't really need to start over... */
9756 /* Register new dependencies based on the given opcode. */
9759 mark_resources (idesc
)
9760 struct ia64_opcode
*idesc
;
9763 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9764 int add_only_qp_reads
= 0;
9766 /* A conditional branch only uses its resources if it is taken; if it is
9767 taken, we stop following that path. The other branch types effectively
9768 *always* write their resources. If it's not taken, register only QP
9770 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
9772 add_only_qp_reads
= 1;
9776 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
9778 for (i
= 0; i
< opdeps
->nregs
; i
++)
9780 const struct ia64_dependency
*dep
;
9781 struct rsrc specs
[MAX_SPECS
];
9786 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
9787 note
= NOTE (opdeps
->regs
[i
]);
9789 if (add_only_qp_reads
9790 && !(dep
->mode
== IA64_DV_WAR
9791 && (dep
->specifier
== IA64_RS_PR
9792 || dep
->specifier
== IA64_RS_PRr
9793 || dep
->specifier
== IA64_RS_PR63
)))
9796 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
9799 if (md
.debug_dv
&& !count
)
9800 fprintf (stderr
, " No %s %s usage found (path %d)\n",
9801 dv_mode
[dep
->mode
], dep
->name
, md
.path
);
9806 mark_resource (idesc
, dep
, &specs
[count
],
9807 DEP (opdeps
->regs
[i
]), md
.path
);
9810 /* The execution path may affect register values, which may in turn
9811 affect which indirect-access resources are accessed. */
9812 switch (dep
->specifier
)
9824 for (path
= 0; path
< md
.path
; path
++)
9826 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
9828 mark_resource (idesc
, dep
, &specs
[count
],
9829 DEP (opdeps
->regs
[i
]), path
);
9836 /* Remove dependencies when they no longer apply. */
9839 update_dependencies (idesc
)
9840 struct ia64_opcode
*idesc
;
9844 if (strcmp (idesc
->name
, "srlz.i") == 0)
9846 instruction_serialization ();
9848 else if (strcmp (idesc
->name
, "srlz.d") == 0)
9850 data_serialization ();
9852 else if (is_interruption_or_rfi (idesc
)
9853 || is_taken_branch (idesc
))
9855 /* Although technically the taken branch doesn't clear dependencies
9856 which require a srlz.[id], we don't follow the branch; the next
9857 instruction is assumed to start with a clean slate. */
9861 else if (is_conditional_branch (idesc
)
9862 && CURR_SLOT
.qp_regno
!= 0)
9864 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
9866 for (i
= 0; i
< qp_implieslen
; i
++)
9868 /* If the conditional branch's predicate is implied by the predicate
9869 in an existing dependency, remove that dependency. */
9870 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
9873 /* Note that this implied predicate takes a branch so that if
9874 a later insn generates a DV but its predicate implies this
9875 one, we can avoid the false DV warning. */
9876 qp_implies
[i
].p2_branched
= 1;
9877 while (depind
< regdepslen
)
9879 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
9881 print_dependency ("Removing", depind
);
9882 regdeps
[depind
] = regdeps
[--regdepslen
];
9889 /* Any marked resources which have this same predicate should be
9890 cleared, provided that the QP hasn't been modified between the
9891 marking instruction and the branch. */
9894 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
9899 while (i
< regdepslen
)
9901 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
9902 && regdeps
[i
].link_to_qp_branch
9903 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
9904 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
9906 /* Treat like a taken branch */
9907 print_dependency ("Removing", i
);
9908 regdeps
[i
] = regdeps
[--regdepslen
];
9917 /* Examine the current instruction for dependency violations. */
9921 struct ia64_opcode
*idesc
;
9925 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
9926 idesc
->name
, CURR_SLOT
.src_line
,
9927 idesc
->dependencies
->nchks
,
9928 idesc
->dependencies
->nregs
);
9931 /* Look through the list of currently marked resources; if the current
9932 instruction has the dependency in its chks list which uses that resource,
9933 check against the specific resources used. */
9934 check_dependencies (idesc
);
9936 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9937 then add them to the list of marked resources. */
9938 mark_resources (idesc
);
9940 /* There are several types of dependency semantics, and each has its own
9941 requirements for being cleared
9943 Instruction serialization (insns separated by interruption, rfi, or
9944 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9946 Data serialization (instruction serialization, or writer + srlz.d +
9947 reader, where writer and srlz.d are in separate groups) clears
9948 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9949 always be the case).
9951 Instruction group break (groups separated by stop, taken branch,
9952 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9954 update_dependencies (idesc
);
9956 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9957 warning. Keep track of as many as possible that are useful. */
9958 note_register_values (idesc
);
9960 /* We don't need or want this anymore. */
9961 md
.mem_offset
.hint
= 0;
9966 /* Translate one line of assembly. Pseudo ops and labels do not show
9972 char *saved_input_line_pointer
, *mnemonic
;
9973 const struct pseudo_opcode
*pdesc
;
9974 struct ia64_opcode
*idesc
;
9975 unsigned char qp_regno
;
9979 saved_input_line_pointer
= input_line_pointer
;
9980 input_line_pointer
= str
;
9982 /* extract the opcode (mnemonic): */
9984 mnemonic
= input_line_pointer
;
9985 ch
= get_symbol_end ();
9986 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
9989 *input_line_pointer
= ch
;
9990 (*pdesc
->handler
) (pdesc
->arg
);
9994 /* Find the instruction descriptor matching the arguments. */
9996 idesc
= ia64_find_opcode (mnemonic
);
9997 *input_line_pointer
= ch
;
10000 as_bad ("Unknown opcode `%s'", mnemonic
);
10004 idesc
= parse_operands (idesc
);
10008 /* Handle the dynamic ops we can handle now: */
10009 if (idesc
->type
== IA64_TYPE_DYN
)
10011 if (strcmp (idesc
->name
, "add") == 0)
10013 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10014 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10018 ia64_free_opcode (idesc
);
10019 idesc
= ia64_find_opcode (mnemonic
);
10021 know (!idesc
->next
);
10024 else if (strcmp (idesc
->name
, "mov") == 0)
10026 enum ia64_opnd opnd1
, opnd2
;
10029 opnd1
= idesc
->operands
[0];
10030 opnd2
= idesc
->operands
[1];
10031 if (opnd1
== IA64_OPND_AR3
)
10033 else if (opnd2
== IA64_OPND_AR3
)
10037 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10039 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10040 mnemonic
= "mov.i";
10042 mnemonic
= "mov.m";
10046 ia64_free_opcode (idesc
);
10047 idesc
= ia64_find_opcode (mnemonic
);
10048 while (idesc
!= NULL
10049 && (idesc
->operands
[0] != opnd1
10050 || idesc
->operands
[1] != opnd2
))
10051 idesc
= get_next_opcode (idesc
);
10054 else if (strcmp (idesc
->name
, "mov.i") == 0
10055 || strcmp (idesc
->name
, "mov.m") == 0)
10057 enum ia64_opnd opnd1
, opnd2
;
10060 opnd1
= idesc
->operands
[0];
10061 opnd2
= idesc
->operands
[1];
10062 if (opnd1
== IA64_OPND_AR3
)
10064 else if (opnd2
== IA64_OPND_AR3
)
10068 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10071 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10073 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10075 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10076 as_bad ("AR %d cannot be accessed by %c-unit",
10077 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10083 if (md
.qp
.X_op
== O_register
)
10085 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10086 md
.qp
.X_op
= O_absent
;
10089 flags
= idesc
->flags
;
10091 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10093 /* The alignment frag has to end with a stop bit only if the
10094 next instruction after the alignment directive has to be
10095 the first instruction in an instruction group. */
10098 while (align_frag
->fr_type
!= rs_align_code
)
10100 align_frag
= align_frag
->fr_next
;
10104 /* align_frag can be NULL if there are directives in
10106 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10107 align_frag
->tc_frag_data
= 1;
10110 insn_group_break (1, 0, 0);
10114 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10116 as_bad ("`%s' cannot be predicated", idesc
->name
);
10120 /* Build the instruction. */
10121 CURR_SLOT
.qp_regno
= qp_regno
;
10122 CURR_SLOT
.idesc
= idesc
;
10123 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10124 dwarf2_where (&CURR_SLOT
.debug_line
);
10126 /* Add unwind entry, if there is one. */
10127 if (unwind
.current_entry
)
10129 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10130 unwind
.current_entry
= NULL
;
10133 /* Check for dependency violations. */
10137 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10138 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10139 emit_one_bundle ();
10141 if ((flags
& IA64_OPCODE_LAST
) != 0)
10142 insn_group_break (1, 0, 0);
10144 md
.last_text_seg
= now_seg
;
10147 input_line_pointer
= saved_input_line_pointer
;
10150 /* Called when symbol NAME cannot be found in the symbol table.
10151 Should be used for dynamic valued symbols only. */
10154 md_undefined_symbol (name
)
10155 char *name ATTRIBUTE_UNUSED
;
10160 /* Called for any expression that can not be recognized. When the
10161 function is called, `input_line_pointer' will point to the start of
10168 enum pseudo_type pseudo_type
;
10173 switch (*input_line_pointer
)
10176 /* Find what relocation pseudo-function we're dealing with. */
10178 ch
= *++input_line_pointer
;
10179 for (i
= 0; i
< NELEMS (pseudo_func
); ++i
)
10180 if (pseudo_func
[i
].name
&& pseudo_func
[i
].name
[0] == ch
)
10182 len
= strlen (pseudo_func
[i
].name
);
10183 if (strncmp (pseudo_func
[i
].name
+ 1,
10184 input_line_pointer
+ 1, len
- 1) == 0
10185 && !is_part_of_name (input_line_pointer
[len
]))
10187 input_line_pointer
+= len
;
10188 pseudo_type
= pseudo_func
[i
].type
;
10192 switch (pseudo_type
)
10194 case PSEUDO_FUNC_RELOC
:
10195 SKIP_WHITESPACE ();
10196 if (*input_line_pointer
!= '(')
10198 as_bad ("Expected '('");
10202 ++input_line_pointer
;
10204 if (*input_line_pointer
++ != ')')
10206 as_bad ("Missing ')'");
10209 if (e
->X_op
!= O_symbol
)
10211 if (e
->X_op
!= O_pseudo_fixup
)
10213 as_bad ("Not a symbolic expression");
10216 if (i
!= FUNC_LT_RELATIVE
)
10218 as_bad ("Illegal combination of relocation functions");
10221 switch (S_GET_VALUE (e
->X_op_symbol
))
10223 case FUNC_FPTR_RELATIVE
:
10224 i
= FUNC_LT_FPTR_RELATIVE
; break;
10225 case FUNC_DTP_MODULE
:
10226 i
= FUNC_LT_DTP_MODULE
; break;
10227 case FUNC_DTP_RELATIVE
:
10228 i
= FUNC_LT_DTP_RELATIVE
; break;
10229 case FUNC_TP_RELATIVE
:
10230 i
= FUNC_LT_TP_RELATIVE
; break;
10232 as_bad ("Illegal combination of relocation functions");
10236 /* Make sure gas doesn't get rid of local symbols that are used
10238 e
->X_op
= O_pseudo_fixup
;
10239 e
->X_op_symbol
= pseudo_func
[i
].u
.sym
;
10242 case PSEUDO_FUNC_CONST
:
10243 e
->X_op
= O_constant
;
10244 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10247 case PSEUDO_FUNC_REG
:
10248 e
->X_op
= O_register
;
10249 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10253 name
= input_line_pointer
- 1;
10255 as_bad ("Unknown pseudo function `%s'", name
);
10261 ++input_line_pointer
;
10263 if (*input_line_pointer
!= ']')
10265 as_bad ("Closing bracket misssing");
10270 if (e
->X_op
!= O_register
)
10271 as_bad ("Register expected as index");
10273 ++input_line_pointer
;
10284 ignore_rest_of_line ();
10287 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10288 a section symbol plus some offset. For relocs involving @fptr(),
10289 directives we don't want such adjustments since we need to have the
10290 original symbol's name in the reloc. */
10292 ia64_fix_adjustable (fix
)
10295 /* Prevent all adjustments to global symbols */
10296 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10299 switch (fix
->fx_r_type
)
10301 case BFD_RELOC_IA64_FPTR64I
:
10302 case BFD_RELOC_IA64_FPTR32MSB
:
10303 case BFD_RELOC_IA64_FPTR32LSB
:
10304 case BFD_RELOC_IA64_FPTR64MSB
:
10305 case BFD_RELOC_IA64_FPTR64LSB
:
10306 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10307 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10317 ia64_force_relocation (fix
)
10320 switch (fix
->fx_r_type
)
10322 case BFD_RELOC_IA64_FPTR64I
:
10323 case BFD_RELOC_IA64_FPTR32MSB
:
10324 case BFD_RELOC_IA64_FPTR32LSB
:
10325 case BFD_RELOC_IA64_FPTR64MSB
:
10326 case BFD_RELOC_IA64_FPTR64LSB
:
10328 case BFD_RELOC_IA64_LTOFF22
:
10329 case BFD_RELOC_IA64_LTOFF64I
:
10330 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10331 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10332 case BFD_RELOC_IA64_PLTOFF22
:
10333 case BFD_RELOC_IA64_PLTOFF64I
:
10334 case BFD_RELOC_IA64_PLTOFF64MSB
:
10335 case BFD_RELOC_IA64_PLTOFF64LSB
:
10337 case BFD_RELOC_IA64_LTOFF22X
:
10338 case BFD_RELOC_IA64_LDXMOV
:
10345 return generic_force_reloc (fix
);
10348 /* Decide from what point a pc-relative relocation is relative to,
10349 relative to the pc-relative fixup. Er, relatively speaking. */
10351 ia64_pcrel_from_section (fix
, sec
)
10355 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10357 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10364 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10366 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10370 expr
.X_op
= O_pseudo_fixup
;
10371 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10372 expr
.X_add_number
= 0;
10373 expr
.X_add_symbol
= symbol
;
10374 emit_expr (&expr
, size
);
10377 /* This is called whenever some data item (not an instruction) needs a
10378 fixup. We pick the right reloc code depending on the byteorder
10379 currently in effect. */
10381 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10387 bfd_reloc_code_real_type code
;
10392 /* There are no reloc for 8 and 16 bit quantities, but we allow
10393 them here since they will work fine as long as the expression
10394 is fully defined at the end of the pass over the source file. */
10395 case 1: code
= BFD_RELOC_8
; break;
10396 case 2: code
= BFD_RELOC_16
; break;
10398 if (target_big_endian
)
10399 code
= BFD_RELOC_IA64_DIR32MSB
;
10401 code
= BFD_RELOC_IA64_DIR32LSB
;
10405 /* In 32-bit mode, data8 could mean function descriptors too. */
10406 if (exp
->X_op
== O_pseudo_fixup
10407 && exp
->X_op_symbol
10408 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10409 && !(md
.flags
& EF_IA_64_ABI64
))
10411 if (target_big_endian
)
10412 code
= BFD_RELOC_IA64_IPLTMSB
;
10414 code
= BFD_RELOC_IA64_IPLTLSB
;
10415 exp
->X_op
= O_symbol
;
10420 if (target_big_endian
)
10421 code
= BFD_RELOC_IA64_DIR64MSB
;
10423 code
= BFD_RELOC_IA64_DIR64LSB
;
10428 if (exp
->X_op
== O_pseudo_fixup
10429 && exp
->X_op_symbol
10430 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10432 if (target_big_endian
)
10433 code
= BFD_RELOC_IA64_IPLTMSB
;
10435 code
= BFD_RELOC_IA64_IPLTLSB
;
10436 exp
->X_op
= O_symbol
;
10442 as_bad ("Unsupported fixup size %d", nbytes
);
10443 ignore_rest_of_line ();
10447 if (exp
->X_op
== O_pseudo_fixup
)
10449 exp
->X_op
= O_symbol
;
10450 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
10451 /* ??? If code unchanged, unsupported. */
10454 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
10455 /* We need to store the byte order in effect in case we're going
10456 to fix an 8 or 16 bit relocation (for which there no real
10457 relocs available). See md_apply_fix3(). */
10458 fix
->tc_fix_data
.bigendian
= target_big_endian
;
10461 /* Return the actual relocation we wish to associate with the pseudo
10462 reloc described by SYM and R_TYPE. SYM should be one of the
10463 symbols in the pseudo_func array, or NULL. */
10465 static bfd_reloc_code_real_type
10466 ia64_gen_real_reloc_type (sym
, r_type
)
10467 struct symbol
*sym
;
10468 bfd_reloc_code_real_type r_type
;
10470 bfd_reloc_code_real_type
new = 0;
10477 switch (S_GET_VALUE (sym
))
10479 case FUNC_FPTR_RELATIVE
:
10482 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
10483 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
10484 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
10485 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
10486 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
10491 case FUNC_GP_RELATIVE
:
10494 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
10495 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
10496 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
10497 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
10498 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
10499 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
10504 case FUNC_LT_RELATIVE
:
10507 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
10508 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
10513 case FUNC_LT_RELATIVE_X
:
10516 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
10521 case FUNC_PC_RELATIVE
:
10524 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
10525 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
10526 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
10527 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
10528 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
10529 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
10534 case FUNC_PLT_RELATIVE
:
10537 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
10538 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
10539 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
10540 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
10545 case FUNC_SEC_RELATIVE
:
10548 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
10549 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
10550 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
10551 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
10556 case FUNC_SEG_RELATIVE
:
10559 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
10560 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
10561 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
10562 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
10567 case FUNC_LTV_RELATIVE
:
10570 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
10571 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
10572 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
10573 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
10578 case FUNC_LT_FPTR_RELATIVE
:
10581 case BFD_RELOC_IA64_IMM22
:
10582 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
10583 case BFD_RELOC_IA64_IMM64
:
10584 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
10590 case FUNC_TP_RELATIVE
:
10593 case BFD_RELOC_IA64_IMM14
:
10594 new = BFD_RELOC_IA64_TPREL14
; break;
10595 case BFD_RELOC_IA64_IMM22
:
10596 new = BFD_RELOC_IA64_TPREL22
; break;
10597 case BFD_RELOC_IA64_IMM64
:
10598 new = BFD_RELOC_IA64_TPREL64I
; break;
10604 case FUNC_LT_TP_RELATIVE
:
10607 case BFD_RELOC_IA64_IMM22
:
10608 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
10614 case FUNC_LT_DTP_MODULE
:
10617 case BFD_RELOC_IA64_IMM22
:
10618 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
10624 case FUNC_DTP_RELATIVE
:
10627 case BFD_RELOC_IA64_DIR64MSB
:
10628 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
10629 case BFD_RELOC_IA64_DIR64LSB
:
10630 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
10631 case BFD_RELOC_IA64_IMM14
:
10632 new = BFD_RELOC_IA64_DTPREL14
; break;
10633 case BFD_RELOC_IA64_IMM22
:
10634 new = BFD_RELOC_IA64_DTPREL22
; break;
10635 case BFD_RELOC_IA64_IMM64
:
10636 new = BFD_RELOC_IA64_DTPREL64I
; break;
10642 case FUNC_LT_DTP_RELATIVE
:
10645 case BFD_RELOC_IA64_IMM22
:
10646 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
10652 case FUNC_IPLT_RELOC
:
10659 /* Hmmmm. Should this ever occur? */
10666 /* Here is where generate the appropriate reloc for pseudo relocation
10669 ia64_validate_fix (fix
)
10672 switch (fix
->fx_r_type
)
10674 case BFD_RELOC_IA64_FPTR64I
:
10675 case BFD_RELOC_IA64_FPTR32MSB
:
10676 case BFD_RELOC_IA64_FPTR64LSB
:
10677 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10678 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10679 if (fix
->fx_offset
!= 0)
10680 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10681 "No addend allowed in @fptr() relocation");
10689 fix_insn (fix
, odesc
, value
)
10691 const struct ia64_operand
*odesc
;
10694 bfd_vma insn
[3], t0
, t1
, control_bits
;
10699 slot
= fix
->fx_where
& 0x3;
10700 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
10702 /* Bundles are always in little-endian byte order */
10703 t0
= bfd_getl64 (fixpos
);
10704 t1
= bfd_getl64 (fixpos
+ 8);
10705 control_bits
= t0
& 0x1f;
10706 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
10707 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
10708 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
10711 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
10713 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
10714 insn
[2] |= (((value
& 0x7f) << 13)
10715 | (((value
>> 7) & 0x1ff) << 27)
10716 | (((value
>> 16) & 0x1f) << 22)
10717 | (((value
>> 21) & 0x1) << 21)
10718 | (((value
>> 63) & 0x1) << 36));
10720 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
10722 if (value
& ~0x3fffffffffffffffULL
)
10723 err
= "integer operand out of range";
10724 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
10725 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
10727 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
10730 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
10731 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
10732 | (((value
>> 0) & 0xfffff) << 13));
10735 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
10738 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
10740 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
10741 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
10742 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
10743 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
10746 /* Attempt to simplify or even eliminate a fixup. The return value is
10747 ignored; perhaps it was once meaningful, but now it is historical.
10748 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10750 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10754 md_apply_fix3 (fix
, valP
, seg
)
10757 segT seg ATTRIBUTE_UNUSED
;
10760 valueT value
= *valP
;
10762 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
10766 switch (fix
->fx_r_type
)
10768 case BFD_RELOC_IA64_DIR32MSB
:
10769 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32MSB
;
10772 case BFD_RELOC_IA64_DIR32LSB
:
10773 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32LSB
;
10776 case BFD_RELOC_IA64_DIR64MSB
:
10777 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64MSB
;
10780 case BFD_RELOC_IA64_DIR64LSB
:
10781 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64LSB
;
10790 switch (fix
->fx_r_type
)
10792 case BFD_RELOC_UNUSED
:
10793 /* This must be a TAG13 or TAG13b operand. There are no external
10794 relocs defined for them, so we must give an error. */
10795 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10796 "%s must have a constant value",
10797 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
10801 case BFD_RELOC_IA64_TPREL14
:
10802 case BFD_RELOC_IA64_TPREL22
:
10803 case BFD_RELOC_IA64_TPREL64I
:
10804 case BFD_RELOC_IA64_LTOFF_TPREL22
:
10805 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
10806 case BFD_RELOC_IA64_DTPREL14
:
10807 case BFD_RELOC_IA64_DTPREL22
:
10808 case BFD_RELOC_IA64_DTPREL64I
:
10809 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
10810 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
10817 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
10819 if (fix
->tc_fix_data
.bigendian
)
10820 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
10822 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
10827 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
10832 /* Generate the BFD reloc to be stuck in the object file from the
10833 fixup used internally in the assembler. */
10836 tc_gen_reloc (sec
, fixp
)
10837 asection
*sec ATTRIBUTE_UNUSED
;
10842 reloc
= xmalloc (sizeof (*reloc
));
10843 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
10844 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
10845 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
10846 reloc
->addend
= fixp
->fx_offset
;
10847 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
10851 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
10852 "Cannot represent %s relocation in object file",
10853 bfd_get_reloc_code_name (fixp
->fx_r_type
));
10858 /* Turn a string in input_line_pointer into a floating point constant
10859 of type TYPE, and store the appropriate bytes in *LIT. The number
10860 of LITTLENUMS emitted is stored in *SIZE. An error message is
10861 returned, or NULL on OK. */
10863 #define MAX_LITTLENUMS 5
10866 md_atof (type
, lit
, size
)
10871 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
10901 return "Bad call to MD_ATOF()";
10903 t
= atof_ieee (input_line_pointer
, type
, words
);
10905 input_line_pointer
= t
;
10907 (*ia64_float_to_chars
) (lit
, words
, prec
);
10911 /* It is 10 byte floating point with 6 byte padding. */
10912 memset (&lit
[10], 0, 6);
10913 *size
= 8 * sizeof (LITTLENUM_TYPE
);
10916 *size
= prec
* sizeof (LITTLENUM_TYPE
);
10921 /* Handle ia64 specific semantics of the align directive. */
10924 ia64_md_do_align (n
, fill
, len
, max
)
10925 int n ATTRIBUTE_UNUSED
;
10926 const char *fill ATTRIBUTE_UNUSED
;
10927 int len ATTRIBUTE_UNUSED
;
10928 int max ATTRIBUTE_UNUSED
;
10930 if (subseg_text_p (now_seg
))
10931 ia64_flush_insns ();
10934 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10935 of an rs_align_code fragment. */
10938 ia64_handle_align (fragp
)
10941 /* Use mfi bundle of nops with no stop bits. */
10942 static const unsigned char le_nop
[]
10943 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10944 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10945 static const unsigned char le_nop_stop
[]
10946 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10947 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10951 const unsigned char *nop
;
10953 if (fragp
->fr_type
!= rs_align_code
)
10956 /* Check if this frag has to end with a stop bit. */
10957 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
10959 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
10960 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
10962 /* If no paddings are needed, we check if we need a stop bit. */
10963 if (!bytes
&& fragp
->tc_frag_data
)
10965 if (fragp
->fr_fix
< 16)
10967 /* FIXME: It won't work with
10969 alloc r32=ar.pfs,1,2,4,0
10973 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
10974 _("Can't add stop bit to mark end of instruction group"));
10977 /* Bundles are always in little-endian byte order. Make sure
10978 the previous bundle has the stop bit. */
10982 /* Make sure we are on a 16-byte boundary, in case someone has been
10983 putting data into a text section. */
10986 int fix
= bytes
& 15;
10987 memset (p
, 0, fix
);
10990 fragp
->fr_fix
+= fix
;
10993 /* Instruction bundles are always little-endian. */
10994 memcpy (p
, nop
, 16);
10995 fragp
->fr_var
= 16;
10999 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11004 number_to_chars_bigendian (lit
, (long) (*words
++),
11005 sizeof (LITTLENUM_TYPE
));
11006 lit
+= sizeof (LITTLENUM_TYPE
);
11011 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11016 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11017 sizeof (LITTLENUM_TYPE
));
11018 lit
+= sizeof (LITTLENUM_TYPE
);
11023 ia64_elf_section_change_hook (void)
11025 dot_byteorder (-1);
11028 /* Check if a label should be made global. */
11030 ia64_check_label (symbolS
*label
)
11032 if (*input_line_pointer
== ':')
11034 S_SET_EXTERNAL (label
);
11035 input_line_pointer
++;
11039 /* Used to remember where .alias and .secalias directives are seen. We
11040 will rename symbol and section names when we are about to output
11041 the relocatable file. */
11044 char *file
; /* The file where the directive is seen. */
11045 unsigned int line
; /* The line number the directive is at. */
11046 const char *name
; /* The orignale name of the symbol. */
11049 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11050 .secalias. Otherwise, it is .alias. */
11052 dot_alias (int section
)
11054 char *name
, *alias
;
11058 const char *error_string
;
11061 struct hash_control
*ahash
, *nhash
;
11064 name
= input_line_pointer
;
11065 delim
= get_symbol_end ();
11066 end_name
= input_line_pointer
;
11069 if (name
== end_name
)
11071 as_bad (_("expected symbol name"));
11072 discard_rest_of_line ();
11076 SKIP_WHITESPACE ();
11078 if (*input_line_pointer
!= ',')
11081 as_bad (_("expected comma after \"%s\""), name
);
11083 ignore_rest_of_line ();
11087 input_line_pointer
++;
11090 /* We call demand_copy_C_string to check if alias string is valid.
11091 There should be a closing `"' and no `\0' in the string. */
11092 alias
= demand_copy_C_string (&len
);
11095 ignore_rest_of_line ();
11099 /* Make a copy of name string. */
11100 len
= strlen (name
) + 1;
11101 obstack_grow (¬es
, name
, len
);
11102 name
= obstack_finish (¬es
);
11107 ahash
= secalias_hash
;
11108 nhash
= secalias_name_hash
;
11113 ahash
= alias_hash
;
11114 nhash
= alias_name_hash
;
11117 /* Check if alias has been used before. */
11118 h
= (struct alias
*) hash_find (ahash
, alias
);
11121 if (strcmp (h
->name
, name
))
11122 as_bad (_("`%s' is already the alias of %s `%s'"),
11123 alias
, kind
, h
->name
);
11127 /* Check if name already has an alias. */
11128 a
= (const char *) hash_find (nhash
, name
);
11131 if (strcmp (a
, alias
))
11132 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11136 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11137 as_where (&h
->file
, &h
->line
);
11140 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11143 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11144 alias
, kind
, error_string
);
11148 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11151 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11152 alias
, kind
, error_string
);
11154 obstack_free (¬es
, name
);
11155 obstack_free (¬es
, alias
);
11158 demand_empty_rest_of_line ();
11161 /* It renames the original symbol name to its alias. */
11163 do_alias (const char *alias
, PTR value
)
11165 struct alias
*h
= (struct alias
*) value
;
11166 symbolS
*sym
= symbol_find (h
->name
);
11169 as_warn_where (h
->file
, h
->line
,
11170 _("symbol `%s' aliased to `%s' is not used"),
11173 S_SET_NAME (sym
, (char *) alias
);
11176 /* Called from write_object_file. */
11178 ia64_adjust_symtab (void)
11180 hash_traverse (alias_hash
, do_alias
);
11183 /* It renames the original section name to its alias. */
11185 do_secalias (const char *alias
, PTR value
)
11187 struct alias
*h
= (struct alias
*) value
;
11188 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11191 as_warn_where (h
->file
, h
->line
,
11192 _("section `%s' aliased to `%s' is not used"),
11198 /* Called from write_object_file. */
11200 ia64_frob_file (void)
11202 hash_traverse (secalias_hash
, do_secalias
);