1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright (C) 1998-2021 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
56 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
58 /* Some systems define MIN in, e.g., param.h. */
60 #define MIN(a,b) ((a) < (b) ? (a) : (b))
63 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
64 #define CURR_SLOT md.slot[md.curr_slot]
66 #define O_pseudo_fixup (O_max + 1)
70 /* IA-64 ABI section pseudo-ops. */
71 SPECIAL_SECTION_BSS
= 0,
73 SPECIAL_SECTION_SDATA
,
74 SPECIAL_SECTION_RODATA
,
75 SPECIAL_SECTION_COMMENT
,
76 SPECIAL_SECTION_UNWIND
,
77 SPECIAL_SECTION_UNWIND_INFO
,
78 /* HPUX specific section pseudo-ops. */
79 SPECIAL_SECTION_INIT_ARRAY
,
80 SPECIAL_SECTION_FINI_ARRAY
,
97 FUNC_LT_FPTR_RELATIVE
,
103 FUNC_SLOTCOUNT_RELOC
,
110 REG_FR
= (REG_GR
+ 128),
111 REG_AR
= (REG_FR
+ 128),
112 REG_CR
= (REG_AR
+ 128),
113 REG_DAHR
= (REG_CR
+ 128),
114 REG_P
= (REG_DAHR
+ 8),
115 REG_BR
= (REG_P
+ 64),
116 REG_IP
= (REG_BR
+ 8),
123 /* The following are pseudo-registers for use by gas only. */
135 /* The following pseudo-registers are used for unwind directives only: */
143 DYNREG_GR
= 0, /* dynamic general purpose register */
144 DYNREG_FR
, /* dynamic floating point register */
145 DYNREG_PR
, /* dynamic predicate register */
149 enum operand_match_result
152 OPERAND_OUT_OF_RANGE
,
156 /* On the ia64, we can't know the address of a text label until the
157 instructions are packed into a bundle. To handle this, we keep
158 track of the list of labels that appear in front of each
162 struct label_fix
*next
;
164 bool dw2_mark_labels
;
168 /* An internally used relocation. */
169 #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1)
172 /* This is the endianness of the current section. */
173 extern int target_big_endian
;
175 /* This is the default endianness. */
176 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
178 void (*ia64_number_to_chars
) (char *, valueT
, int);
180 static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE
*, int);
181 static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE
*, int);
183 static void (*ia64_float_to_chars
) (char *, LITTLENUM_TYPE
*, int);
185 static htab_t alias_hash
;
186 static htab_t alias_name_hash
;
187 static htab_t secalias_hash
;
188 static htab_t secalias_name_hash
;
190 /* List of chars besides those in app.c:symbol_chars that can start an
191 operand. Used to prevent the scrubber eating vital white-space. */
192 const char ia64_symbol_chars
[] = "@?";
194 /* Characters which always start a comment. */
195 const char comment_chars
[] = "";
197 /* Characters which start a comment at the beginning of a line. */
198 const char line_comment_chars
[] = "#";
200 /* Characters which may be used to separate multiple commands on a
202 const char line_separator_chars
[] = ";{}";
204 /* Characters which are used to indicate an exponent in a floating
206 const char EXP_CHARS
[] = "eE";
208 /* Characters which mean that a number is a floating point constant,
210 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
212 /* ia64-specific option processing: */
214 const char *md_shortopts
= "m:N:x::";
216 struct option md_longopts
[] =
218 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
219 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
220 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
221 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
224 size_t md_longopts_size
= sizeof (md_longopts
);
228 htab_t pseudo_hash
; /* pseudo opcode hash table */
229 htab_t reg_hash
; /* register name hash table */
230 htab_t dynreg_hash
; /* dynamic register hash table */
231 htab_t const_hash
; /* constant hash table */
232 htab_t entry_hash
; /* code entry hint hash table */
234 /* If X_op is != O_absent, the register name for the instruction's
235 qualifying predicate. If NULL, p0 is assumed for instructions
236 that are predictable. */
239 /* Optimize for which CPU. */
246 /* What to do when hint.b is used. */
258 explicit_mode
: 1, /* which mode we're in */
259 default_explicit_mode
: 1, /* which mode is the default */
260 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
262 keep_pending_output
: 1;
264 /* What to do when something is wrong with unwind directives. */
267 unwind_check_warning
,
271 /* Each bundle consists of up to three instructions. We keep
272 track of four most recent instructions so we can correctly set
273 the end_of_insn_group for the last instruction in a bundle. */
275 int num_slots_in_use
;
279 end_of_insn_group
: 1,
280 manual_bundling_on
: 1,
281 manual_bundling_off
: 1,
282 loc_directive_seen
: 1;
283 signed char user_template
; /* user-selected template, if any */
284 unsigned char qp_regno
; /* qualifying predicate */
285 /* This duplicates a good fraction of "struct fix" but we
286 can't use a "struct fix" instead since we can't call
287 fix_new_exp() until we know the address of the instruction. */
291 bfd_reloc_code_real_type code
;
292 enum ia64_opnd opnd
; /* type of operand in need of fix */
293 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
294 expressionS expr
; /* the value to be inserted */
296 fixup
[2]; /* at most two fixups per insn */
297 struct ia64_opcode
*idesc
;
298 struct label_fix
*label_fixups
;
299 struct label_fix
*tag_fixups
;
300 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
302 const char *src_file
;
303 unsigned int src_line
;
304 struct dwarf2_line_info debug_line
;
312 struct dynreg
*next
; /* next dynamic register */
314 unsigned short base
; /* the base register number */
315 unsigned short num_regs
; /* # of registers in this set */
317 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
319 flagword flags
; /* ELF-header flags */
322 unsigned hint
:1; /* is this hint currently valid? */
323 bfd_vma offset
; /* mem.offset offset */
324 bfd_vma base
; /* mem.offset base */
327 int path
; /* number of alt. entry points seen */
328 const char **entry_labels
; /* labels of all alternate paths in
329 the current DV-checking block. */
330 int maxpaths
; /* size currently allocated for
333 int pointer_size
; /* size in bytes of a pointer */
334 int pointer_size_shift
; /* shift size of a pointer for alignment */
336 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
340 /* These are not const, because they are modified to MMI for non-itanium1
342 /* MFI bundle of nops. */
343 static unsigned char le_nop
[16] =
345 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
348 /* MFI bundle of nops with stop-bit. */
349 static unsigned char le_nop_stop
[16] =
351 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
352 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
355 /* application registers: */
361 #define AR_BSPSTORE 18
387 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
388 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
389 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
390 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
391 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
392 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
393 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
394 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
395 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
396 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
397 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
398 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
399 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
400 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
403 /* control registers: */
444 {"cr.gpta", CR_GPTA
},
445 {"cr.ipsr", CR_IPSR
},
449 {"cr.itir", CR_ITIR
},
450 {"cr.iipa", CR_IIPA
},
454 {"cr.iib0", CR_IIB0
},
455 {"cr.iib1", CR_IIB1
},
460 {"cr.irr0", CR_IRR0
},
461 {"cr.irr1", CR_IRR0
+ 1},
462 {"cr.irr2", CR_IRR0
+ 2},
463 {"cr.irr3", CR_IRR3
},
466 {"cr.cmcv", CR_CMCV
},
467 {"cr.lrr0", CR_LRR0
},
476 static const struct const_desc
483 /* PSR constant masks: */
486 {"psr.be", ((valueT
) 1) << 1},
487 {"psr.up", ((valueT
) 1) << 2},
488 {"psr.ac", ((valueT
) 1) << 3},
489 {"psr.mfl", ((valueT
) 1) << 4},
490 {"psr.mfh", ((valueT
) 1) << 5},
492 {"psr.ic", ((valueT
) 1) << 13},
493 {"psr.i", ((valueT
) 1) << 14},
494 {"psr.pk", ((valueT
) 1) << 15},
496 {"psr.dt", ((valueT
) 1) << 17},
497 {"psr.dfl", ((valueT
) 1) << 18},
498 {"psr.dfh", ((valueT
) 1) << 19},
499 {"psr.sp", ((valueT
) 1) << 20},
500 {"psr.pp", ((valueT
) 1) << 21},
501 {"psr.di", ((valueT
) 1) << 22},
502 {"psr.si", ((valueT
) 1) << 23},
503 {"psr.db", ((valueT
) 1) << 24},
504 {"psr.lp", ((valueT
) 1) << 25},
505 {"psr.tb", ((valueT
) 1) << 26},
506 {"psr.rt", ((valueT
) 1) << 27},
507 /* 28-31: reserved */
508 /* 32-33: cpl (current privilege level) */
509 {"psr.is", ((valueT
) 1) << 34},
510 {"psr.mc", ((valueT
) 1) << 35},
511 {"psr.it", ((valueT
) 1) << 36},
512 {"psr.id", ((valueT
) 1) << 37},
513 {"psr.da", ((valueT
) 1) << 38},
514 {"psr.dd", ((valueT
) 1) << 39},
515 {"psr.ss", ((valueT
) 1) << 40},
516 /* 41-42: ri (restart instruction) */
517 {"psr.ed", ((valueT
) 1) << 43},
518 {"psr.bn", ((valueT
) 1) << 44},
521 /* indirect register-sets/memory: */
530 { "CPUID", IND_CPUID
},
531 { "cpuid", IND_CPUID
},
540 { "dahr", IND_DAHR
},
544 /* Pseudo functions used to indicate relocation types (these functions
545 start with an at sign (@). */
567 /* reloc pseudo functions (these must come first!): */
568 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
569 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
570 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
571 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
572 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
573 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
574 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
575 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
576 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
577 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
578 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
579 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
580 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
581 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
582 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
583 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
584 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
586 { "slotcount", PSEUDO_FUNC_RELOC
, { 0 } },
589 /* mbtype4 constants: */
590 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
591 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
592 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
593 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
594 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
596 /* fclass constants: */
597 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
598 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
599 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
600 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
601 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
602 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
603 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
604 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
605 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
607 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
609 /* hint constants: */
610 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
611 { "priority", PSEUDO_FUNC_CONST
, { 0x1 } },
614 { "clz", PSEUDO_FUNC_CONST
, { 32 } },
615 { "mpy", PSEUDO_FUNC_CONST
, { 33 } },
616 { "datahints", PSEUDO_FUNC_CONST
, { 34 } },
618 /* unwind-related constants: */
619 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
620 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
621 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
622 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_GNU
} },
623 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
624 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
625 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
627 /* unwind-related registers: */
628 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
631 /* 41-bit nop opcodes (one per unit): */
632 static const bfd_vma nop
[IA64_NUM_UNITS
] =
634 0x0000000000LL
, /* NIL => break 0 */
635 0x0008000000LL
, /* I-unit nop */
636 0x0008000000LL
, /* M-unit nop */
637 0x4000000000LL
, /* B-unit nop */
638 0x0008000000LL
, /* F-unit nop */
639 0x0000000000LL
, /* L-"unit" nop immediate */
640 0x0008000000LL
, /* X-unit nop */
643 /* Can't be `const' as it's passed to input routines (which have the
644 habit of setting temporary sentinels. */
645 static char special_section_name
[][20] =
647 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
648 {".IA_64.unwind"}, {".IA_64.unwind_info"},
649 {".init_array"}, {".fini_array"}
652 /* The best template for a particular sequence of up to three
654 #define N IA64_NUM_TYPES
655 static unsigned char best_template
[N
][N
][N
];
658 /* Resource dependencies currently in effect */
660 int depind
; /* dependency index */
661 const struct ia64_dependency
*dependency
; /* actual dependency */
662 unsigned specific
:1, /* is this a specific bit/regno? */
663 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
664 int index
; /* specific regno/bit within dependency */
665 int note
; /* optional qualifying note (0 if none) */
669 int insn_srlz
; /* current insn serialization state */
670 int data_srlz
; /* current data serialization state */
671 int qp_regno
; /* qualifying predicate for this usage */
672 const char *file
; /* what file marked this dependency */
673 unsigned int line
; /* what line marked this dependency */
674 struct mem_offset mem_offset
; /* optional memory offset hint */
675 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
676 int path
; /* corresponding code entry index */
678 static int regdepslen
= 0;
679 static int regdepstotlen
= 0;
680 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
681 static const char *dv_sem
[] = { "none", "implied", "impliedf",
682 "data", "instr", "specific", "stop", "other" };
683 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
685 /* Current state of PR mutexation */
686 static struct qpmutex
{
689 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
690 static int qp_mutexeslen
= 0;
691 static int qp_mutexestotlen
= 0;
692 static valueT qp_safe_across_calls
= 0;
694 /* Current state of PR implications */
695 static struct qp_imply
{
698 unsigned p2_branched
:1;
700 } *qp_implies
= NULL
;
701 static int qp_implieslen
= 0;
702 static int qp_impliestotlen
= 0;
704 /* Keep track of static GR values so that indirect register usage can
705 sometimes be tracked. */
716 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
722 /* Remember the alignment frag. */
723 static fragS
*align_frag
;
725 /* These are the routines required to output the various types of
728 /* A slot_number is a frag address plus the slot index (0-2). We use the
729 frag address here so that if there is a section switch in the middle of
730 a function, then instructions emitted to a different section are not
731 counted. Since there may be more than one frag for a function, this
732 means we also need to keep track of which frag this address belongs to
733 so we can compute inter-frag distances. This also nicely solves the
734 problem with nops emitted for align directives, which can't easily be
735 counted, but can easily be derived from frag sizes. */
737 typedef struct unw_rec_list
{
739 unsigned long slot_number
;
741 struct unw_rec_list
*next
;
744 #define SLOT_NUM_NOT_SET (unsigned)-1
746 /* Linked list of saved prologue counts. A very poor
747 implementation of a map from label numbers to prologue counts. */
748 typedef struct label_prologue_count
750 struct label_prologue_count
*next
;
751 unsigned long label_number
;
752 unsigned int prologue_count
;
753 } label_prologue_count
;
755 typedef struct proc_pending
758 struct proc_pending
*next
;
763 /* Maintain a list of unwind entries for the current function. */
767 /* Any unwind entries that should be attached to the current slot
768 that an insn is being constructed for. */
769 unw_rec_list
*current_entry
;
771 /* These are used to create the unwind table entry for this function. */
772 proc_pending proc_pending
;
773 symbolS
*info
; /* pointer to unwind info */
774 symbolS
*personality_routine
;
776 subsegT saved_text_subseg
;
777 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
779 /* TRUE if processing unwind directives in a prologue region. */
780 unsigned int prologue
: 1;
781 unsigned int prologue_mask
: 4;
782 unsigned int prologue_gr
: 7;
783 unsigned int body
: 1;
784 unsigned int insn
: 1;
785 unsigned int prologue_count
; /* number of .prologues seen so far */
786 /* Prologue counts at previous .label_state directives. */
787 struct label_prologue_count
* saved_prologue_counts
;
789 /* List of split up .save-s. */
790 unw_p_record
*pending_saves
;
793 /* The input value is a negated offset from psp, and specifies an address
794 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
795 must add 16 and divide by 4 to get the encoded value. */
797 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
799 typedef void (*vbyte_func
) (int, char *, char *);
801 /* Forward declarations: */
802 static void dot_alias (int);
803 static int parse_operand_and_eval (expressionS
*, int);
804 static void emit_one_bundle (void);
805 static bfd_reloc_code_real_type
ia64_gen_real_reloc_type (struct symbol
*,
806 bfd_reloc_code_real_type
);
807 static void insn_group_break (int, int, int);
808 static void add_qp_mutex (valueT
);
809 static void add_qp_imply (int, int);
810 static void clear_qp_mutex (valueT
);
811 static void clear_qp_implies (valueT
, valueT
);
812 static void print_dependency (const char *, int);
813 static void instruction_serialization (void);
814 static void data_serialization (void);
815 static void output_R3_format (vbyte_func
, unw_record_type
, unsigned long);
816 static void output_B3_format (vbyte_func
, unsigned long, unsigned long);
817 static void output_B4_format (vbyte_func
, unw_record_type
, unsigned long);
818 static void free_saved_prologue_counts (void);
820 /* Determine if application register REGNUM resides only in the integer
821 unit (as opposed to the memory unit). */
823 ar_is_only_in_integer_unit (int reg
)
826 return reg
>= 64 && reg
<= 111;
829 /* Determine if application register REGNUM resides only in the memory
830 unit (as opposed to the integer unit). */
832 ar_is_only_in_memory_unit (int reg
)
835 return reg
>= 0 && reg
<= 47;
838 /* Switch to section NAME and create section if necessary. It's
839 rather ugly that we have to manipulate input_line_pointer but I
840 don't see any other way to accomplish the same thing without
841 changing obj-elf.c (which may be the Right Thing, in the end). */
843 set_section (char *name
)
845 char *saved_input_line_pointer
;
847 saved_input_line_pointer
= input_line_pointer
;
848 input_line_pointer
= name
;
850 input_line_pointer
= saved_input_line_pointer
;
853 /* Map 's' to SHF_IA_64_SHORT. */
856 ia64_elf_section_letter (int letter
, const char **ptr_msg
)
859 return SHF_IA_64_SHORT
;
860 else if (letter
== 'o')
861 return SHF_LINK_ORDER
;
863 else if (letter
== 'O')
864 return SHF_IA_64_VMS_OVERLAID
;
865 else if (letter
== 'g')
866 return SHF_IA_64_VMS_GLOBAL
;
869 *ptr_msg
= _("bad .section directive: want a,o,s,w,x,M,S,G,T in string");
873 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
876 ia64_elf_section_flags (flagword flags
,
878 int type ATTRIBUTE_UNUSED
)
880 if (attr
& SHF_IA_64_SHORT
)
881 flags
|= SEC_SMALL_DATA
;
886 ia64_elf_section_type (const char *str
, size_t len
)
888 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
890 if (STREQ (ELF_STRING_ia64_unwind_info
))
893 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
896 if (STREQ (ELF_STRING_ia64_unwind
))
897 return SHT_IA_64_UNWIND
;
899 if (STREQ (ELF_STRING_ia64_unwind_once
))
900 return SHT_IA_64_UNWIND
;
902 if (STREQ ("unwind"))
903 return SHT_IA_64_UNWIND
;
910 set_regstack (unsigned int ins
,
918 sof
= ins
+ locs
+ outs
;
921 as_bad (_("Size of frame exceeds maximum of 96 registers"));
926 as_warn (_("Size of rotating registers exceeds frame size"));
929 md
.in
.base
= REG_GR
+ 32;
930 md
.loc
.base
= md
.in
.base
+ ins
;
931 md
.out
.base
= md
.loc
.base
+ locs
;
933 md
.in
.num_regs
= ins
;
934 md
.loc
.num_regs
= locs
;
935 md
.out
.num_regs
= outs
;
936 md
.rot
.num_regs
= rots
;
941 ia64_flush_insns (void)
943 struct label_fix
*lfix
;
945 subsegT saved_subseg
;
949 if (!md
.last_text_seg
)
953 saved_subseg
= now_subseg
;
955 subseg_set (md
.last_text_seg
, 0);
957 while (md
.num_slots_in_use
> 0)
958 emit_one_bundle (); /* force out queued instructions */
960 /* In case there are labels following the last instruction, resolve
963 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
965 symbol_set_value_now (lfix
->sym
);
966 mark
|= lfix
->dw2_mark_labels
;
970 dwarf2_where (&CURR_SLOT
.debug_line
);
971 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
972 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
973 dwarf2_consume_line_info ();
975 CURR_SLOT
.label_fixups
= 0;
977 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
978 symbol_set_value_now (lfix
->sym
);
979 CURR_SLOT
.tag_fixups
= 0;
981 /* In case there are unwind directives following the last instruction,
982 resolve those now. We only handle prologue, body, and endp directives
983 here. Give an error for others. */
984 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
992 ptr
->slot_number
= (unsigned long) frag_more (0);
993 ptr
->slot_frag
= frag_now
;
996 /* Allow any record which doesn't have a "t" field (i.e.,
997 doesn't relate to a particular instruction). */
1013 as_bad (_("Unwind directive not followed by an instruction."));
1017 unwind
.current_entry
= NULL
;
1019 subseg_set (saved_seg
, saved_subseg
);
1021 if (md
.qp
.X_op
== O_register
)
1022 as_bad (_("qualifying predicate not followed by instruction"));
1026 ia64_cons_align (int nbytes
)
1031 for (log
= 0; (nbytes
& 1) != 1; nbytes
>>= 1)
1034 do_align (log
, NULL
, 0, 0);
1040 /* .vms_common section, symbol, size, alignment */
1043 obj_elf_vms_common (int ignore ATTRIBUTE_UNUSED
)
1045 const char *sec_name
;
1052 segT current_seg
= now_seg
;
1053 subsegT current_subseg
= now_subseg
;
1057 sec_name
= obj_elf_section_name ();
1058 if (sec_name
== NULL
)
1063 if (*input_line_pointer
== ',')
1065 input_line_pointer
++;
1070 as_bad (_("expected ',' after section name"));
1071 ignore_rest_of_line ();
1075 c
= get_symbol_name (&sym_name
);
1077 if (input_line_pointer
== sym_name
)
1079 (void) restore_line_pointer (c
);
1080 as_bad (_("expected symbol name"));
1081 ignore_rest_of_line ();
1085 symbolP
= symbol_find_or_make (sym_name
);
1086 (void) restore_line_pointer (c
);
1088 if ((S_IS_DEFINED (symbolP
) || symbol_equated_p (symbolP
))
1089 && !S_IS_COMMON (symbolP
))
1091 as_bad (_("Ignoring attempt to re-define symbol"));
1092 ignore_rest_of_line ();
1098 if (*input_line_pointer
== ',')
1100 input_line_pointer
++;
1105 as_bad (_("expected ',' after symbol name"));
1106 ignore_rest_of_line ();
1110 temp
= get_absolute_expression ();
1112 size
&= ((offsetT
) 2 << (stdoutput
->arch_info
->bits_per_address
- 1)) - 1;
1115 as_warn (_("size (%ld) out of range, ignored"), (long) temp
);
1116 ignore_rest_of_line ();
1122 if (*input_line_pointer
== ',')
1124 input_line_pointer
++;
1129 as_bad (_("expected ',' after symbol size"));
1130 ignore_rest_of_line ();
1134 log_align
= get_absolute_expression ();
1136 demand_empty_rest_of_line ();
1138 obj_elf_change_section
1139 (sec_name
, SHT_NOBITS
,
1140 SHF_ALLOC
| SHF_WRITE
| SHF_IA_64_VMS_OVERLAID
| SHF_IA_64_VMS_GLOBAL
,
1143 S_SET_VALUE (symbolP
, 0);
1144 S_SET_SIZE (symbolP
, size
);
1145 S_SET_EXTERNAL (symbolP
);
1146 S_SET_SEGMENT (symbolP
, now_seg
);
1148 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
1150 record_alignment (now_seg
, log_align
);
1152 cur_size
= bfd_section_size (now_seg
);
1153 if ((int) size
> cur_size
)
1156 = frag_var (rs_fill
, 1, 1, (relax_substateT
)0, NULL
,
1157 (valueT
)size
- (valueT
)cur_size
, NULL
);
1159 bfd_set_section_size (now_seg
, size
);
1162 /* Switch back to current segment. */
1163 subseg_set (current_seg
, current_subseg
);
1165 #ifdef md_elf_section_change_hook
1166 md_elf_section_change_hook ();
1172 /* Output COUNT bytes to a memory location. */
1173 static char *vbyte_mem_ptr
= NULL
;
1176 output_vbyte_mem (int count
, char *ptr
, char *comment ATTRIBUTE_UNUSED
)
1179 if (vbyte_mem_ptr
== NULL
)
1184 for (x
= 0; x
< count
; x
++)
1185 *(vbyte_mem_ptr
++) = ptr
[x
];
1188 /* Count the number of bytes required for records. */
1189 static int vbyte_count
= 0;
1191 count_output (int count
,
1192 char *ptr ATTRIBUTE_UNUSED
,
1193 char *comment ATTRIBUTE_UNUSED
)
1195 vbyte_count
+= count
;
1199 output_R1_format (vbyte_func f
, unw_record_type rtype
, int rlen
)
1205 output_R3_format (f
, rtype
, rlen
);
1211 else if (rtype
!= prologue
)
1212 as_bad (_("record type is not valid"));
1214 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1215 (*f
) (1, &byte
, NULL
);
1219 output_R2_format (vbyte_func f
, int mask
, int grsave
, unsigned long rlen
)
1223 mask
= (mask
& 0x0f);
1224 grsave
= (grsave
& 0x7f);
1226 bytes
[0] = (UNW_R2
| (mask
>> 1));
1227 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1228 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1229 (*f
) (count
, bytes
, NULL
);
1233 output_R3_format (vbyte_func f
, unw_record_type rtype
, unsigned long rlen
)
1239 output_R1_format (f
, rtype
, rlen
);
1245 else if (rtype
!= prologue
)
1246 as_bad (_("record type is not valid"));
1247 bytes
[0] = (UNW_R3
| r
);
1248 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1249 (*f
) (count
+ 1, bytes
, NULL
);
1253 output_P1_format (vbyte_func f
, int brmask
)
1256 byte
= UNW_P1
| (brmask
& 0x1f);
1257 (*f
) (1, &byte
, NULL
);
1261 output_P2_format (vbyte_func f
, int brmask
, int gr
)
1264 brmask
= (brmask
& 0x1f);
1265 bytes
[0] = UNW_P2
| (brmask
>> 1);
1266 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1267 (*f
) (2, bytes
, NULL
);
1271 output_P3_format (vbyte_func f
, unw_record_type rtype
, int reg
)
1315 as_bad (_("Invalid record type for P3 format."));
1317 bytes
[0] = (UNW_P3
| (r
>> 1));
1318 bytes
[1] = (((r
& 1) << 7) | reg
);
1319 (*f
) (2, bytes
, NULL
);
1323 output_P4_format (vbyte_func f
, unsigned char *imask
, unsigned long imask_size
)
1326 (*f
) (imask_size
, (char *) imask
, NULL
);
1330 output_P5_format (vbyte_func f
, int grmask
, unsigned long frmask
)
1333 grmask
= (grmask
& 0x0f);
1336 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1337 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1338 bytes
[3] = (frmask
& 0x000000ff);
1339 (*f
) (4, bytes
, NULL
);
1343 output_P6_format (vbyte_func f
, unw_record_type rtype
, int rmask
)
1348 if (rtype
== gr_mem
)
1350 else if (rtype
!= fr_mem
)
1351 as_bad (_("Invalid record type for format P6"));
1352 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1353 (*f
) (1, &byte
, NULL
);
1357 output_P7_format (vbyte_func f
,
1358 unw_record_type rtype
,
1365 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1370 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1420 bytes
[0] = (UNW_P7
| r
);
1421 (*f
) (count
, bytes
, NULL
);
1425 output_P8_format (vbyte_func f
, unw_record_type rtype
, unsigned long t
)
1463 case bspstore_psprel
:
1466 case bspstore_sprel
:
1478 case priunat_when_gr
:
1481 case priunat_psprel
:
1487 case priunat_when_mem
:
1494 count
+= output_leb128 (bytes
+ 2, t
, 0);
1495 (*f
) (count
, bytes
, NULL
);
1499 output_P9_format (vbyte_func f
, int grmask
, int gr
)
1503 bytes
[1] = (grmask
& 0x0f);
1504 bytes
[2] = (gr
& 0x7f);
1505 (*f
) (3, bytes
, NULL
);
1509 output_P10_format (vbyte_func f
, int abi
, int context
)
1513 bytes
[1] = (abi
& 0xff);
1514 bytes
[2] = (context
& 0xff);
1515 (*f
) (3, bytes
, NULL
);
1519 output_B1_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1525 output_B4_format (f
, rtype
, label
);
1528 if (rtype
== copy_state
)
1530 else if (rtype
!= label_state
)
1531 as_bad (_("Invalid record type for format B1"));
1533 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1534 (*f
) (1, &byte
, NULL
);
1538 output_B2_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1544 output_B3_format (f
, ecount
, t
);
1547 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1548 count
+= output_leb128 (bytes
+ 1, t
, 0);
1549 (*f
) (count
, bytes
, NULL
);
1553 output_B3_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1559 output_B2_format (f
, ecount
, t
);
1563 count
+= output_leb128 (bytes
+ 1, t
, 0);
1564 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1565 (*f
) (count
, bytes
, NULL
);
1569 output_B4_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1576 output_B1_format (f
, rtype
, label
);
1580 if (rtype
== copy_state
)
1582 else if (rtype
!= label_state
)
1583 as_bad (_("Invalid record type for format B1"));
1585 bytes
[0] = (UNW_B4
| (r
<< 3));
1586 count
+= output_leb128 (bytes
+ 1, label
, 0);
1587 (*f
) (count
, bytes
, NULL
);
1591 format_ab_reg (int ab
, int reg
)
1596 ret
= (ab
<< 5) | reg
;
1601 output_X1_format (vbyte_func f
,
1602 unw_record_type rtype
,
1613 if (rtype
== spill_sprel
)
1615 else if (rtype
!= spill_psprel
)
1616 as_bad (_("Invalid record type for format X1"));
1617 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1618 count
+= output_leb128 (bytes
+ 2, t
, 0);
1619 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1620 (*f
) (count
, bytes
, NULL
);
1624 output_X2_format (vbyte_func f
,
1635 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1636 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1637 count
+= output_leb128 (bytes
+ 3, t
, 0);
1638 (*f
) (count
, bytes
, NULL
);
1642 output_X3_format (vbyte_func f
,
1643 unw_record_type rtype
,
1655 if (rtype
== spill_sprel_p
)
1657 else if (rtype
!= spill_psprel_p
)
1658 as_bad (_("Invalid record type for format X3"));
1659 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1660 bytes
[2] = format_ab_reg (ab
, reg
);
1661 count
+= output_leb128 (bytes
+ 3, t
, 0);
1662 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1663 (*f
) (count
, bytes
, NULL
);
1667 output_X4_format (vbyte_func f
,
1679 bytes
[1] = (qp
& 0x3f);
1680 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1681 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1682 count
+= output_leb128 (bytes
+ 4, t
, 0);
1683 (*f
) (count
, bytes
, NULL
);
1686 /* This function checks whether there are any outstanding .save-s and
1687 discards them if so. */
1690 check_pending_save (void)
1692 if (unwind
.pending_saves
)
1694 unw_rec_list
*cur
, *prev
;
1696 as_warn (_("Previous .save incomplete"));
1697 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1698 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1701 prev
->next
= cur
->next
;
1703 unwind
.list
= cur
->next
;
1704 if (cur
== unwind
.tail
)
1706 if (cur
== unwind
.current_entry
)
1707 unwind
.current_entry
= cur
->next
;
1708 /* Don't free the first discarded record, it's being used as
1709 terminator for (currently) br_gr and gr_gr processing, and
1710 also prevents leaving a dangling pointer to it in its
1712 cur
->r
.record
.p
.grmask
= 0;
1713 cur
->r
.record
.p
.brmask
= 0;
1714 cur
->r
.record
.p
.frmask
= 0;
1715 prev
= cur
->r
.record
.p
.next
;
1716 cur
->r
.record
.p
.next
= NULL
;
1728 cur
= cur
->r
.record
.p
.next
;
1731 unwind
.pending_saves
= NULL
;
1735 /* This function allocates a record list structure, and initializes fields. */
1737 static unw_rec_list
*
1738 alloc_record (unw_record_type t
)
1741 ptr
= XNEW (unw_rec_list
);
1742 memset (ptr
, 0, sizeof (*ptr
));
1743 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1748 /* Dummy unwind record used for calculating the length of the last prologue or
1751 static unw_rec_list
*
1754 unw_rec_list
*ptr
= alloc_record (endp
);
1758 static unw_rec_list
*
1759 output_prologue (void)
1761 unw_rec_list
*ptr
= alloc_record (prologue
);
1762 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1766 static unw_rec_list
*
1767 output_prologue_gr (unsigned int saved_mask
, unsigned int reg
)
1769 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1770 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1771 ptr
->r
.record
.r
.grmask
= saved_mask
;
1772 ptr
->r
.record
.r
.grsave
= reg
;
1776 static unw_rec_list
*
1779 unw_rec_list
*ptr
= alloc_record (body
);
1783 static unw_rec_list
*
1784 output_mem_stack_f (unsigned int size
)
1786 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1787 ptr
->r
.record
.p
.size
= size
;
1791 static unw_rec_list
*
1792 output_mem_stack_v (void)
1794 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1798 static unw_rec_list
*
1799 output_psp_gr (unsigned int gr
)
1801 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1802 ptr
->r
.record
.p
.r
.gr
= gr
;
1806 static unw_rec_list
*
1807 output_psp_sprel (unsigned int offset
)
1809 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1810 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1814 static unw_rec_list
*
1815 output_rp_when (void)
1817 unw_rec_list
*ptr
= alloc_record (rp_when
);
1821 static unw_rec_list
*
1822 output_rp_gr (unsigned int gr
)
1824 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1825 ptr
->r
.record
.p
.r
.gr
= gr
;
1829 static unw_rec_list
*
1830 output_rp_br (unsigned int br
)
1832 unw_rec_list
*ptr
= alloc_record (rp_br
);
1833 ptr
->r
.record
.p
.r
.br
= br
;
1837 static unw_rec_list
*
1838 output_rp_psprel (unsigned int offset
)
1840 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1841 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1845 static unw_rec_list
*
1846 output_rp_sprel (unsigned int offset
)
1848 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1849 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1853 static unw_rec_list
*
1854 output_pfs_when (void)
1856 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1860 static unw_rec_list
*
1861 output_pfs_gr (unsigned int gr
)
1863 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1864 ptr
->r
.record
.p
.r
.gr
= gr
;
1868 static unw_rec_list
*
1869 output_pfs_psprel (unsigned int offset
)
1871 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1872 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1876 static unw_rec_list
*
1877 output_pfs_sprel (unsigned int offset
)
1879 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1880 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1884 static unw_rec_list
*
1885 output_preds_when (void)
1887 unw_rec_list
*ptr
= alloc_record (preds_when
);
1891 static unw_rec_list
*
1892 output_preds_gr (unsigned int gr
)
1894 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1895 ptr
->r
.record
.p
.r
.gr
= gr
;
1899 static unw_rec_list
*
1900 output_preds_psprel (unsigned int offset
)
1902 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1903 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1907 static unw_rec_list
*
1908 output_preds_sprel (unsigned int offset
)
1910 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1911 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1915 static unw_rec_list
*
1916 output_fr_mem (unsigned int mask
)
1918 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1919 unw_rec_list
*cur
= ptr
;
1921 ptr
->r
.record
.p
.frmask
= mask
;
1922 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1925 unw_rec_list
*prev
= cur
;
1927 /* Clear least significant set bit. */
1928 mask
&= ~(mask
& (~mask
+ 1));
1931 cur
= alloc_record (fr_mem
);
1932 cur
->r
.record
.p
.frmask
= mask
;
1933 /* Retain only least significant bit. */
1934 prev
->r
.record
.p
.frmask
^= mask
;
1935 prev
->r
.record
.p
.next
= cur
;
1939 static unw_rec_list
*
1940 output_frgr_mem (unsigned int gr_mask
, unsigned int fr_mask
)
1942 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1943 unw_rec_list
*cur
= ptr
;
1945 unwind
.pending_saves
= &cur
->r
.record
.p
;
1946 cur
->r
.record
.p
.frmask
= fr_mask
;
1949 unw_rec_list
*prev
= cur
;
1951 /* Clear least significant set bit. */
1952 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
1953 if (!gr_mask
&& !fr_mask
)
1955 cur
= alloc_record (frgr_mem
);
1956 cur
->r
.record
.p
.frmask
= fr_mask
;
1957 /* Retain only least significant bit. */
1958 prev
->r
.record
.p
.frmask
^= fr_mask
;
1959 prev
->r
.record
.p
.next
= cur
;
1961 cur
->r
.record
.p
.grmask
= gr_mask
;
1964 unw_rec_list
*prev
= cur
;
1966 /* Clear least significant set bit. */
1967 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
1970 cur
= alloc_record (frgr_mem
);
1971 cur
->r
.record
.p
.grmask
= gr_mask
;
1972 /* Retain only least significant bit. */
1973 prev
->r
.record
.p
.grmask
^= gr_mask
;
1974 prev
->r
.record
.p
.next
= cur
;
1978 static unw_rec_list
*
1979 output_gr_gr (unsigned int mask
, unsigned int reg
)
1981 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1982 unw_rec_list
*cur
= ptr
;
1984 ptr
->r
.record
.p
.grmask
= mask
;
1985 ptr
->r
.record
.p
.r
.gr
= reg
;
1986 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1989 unw_rec_list
*prev
= cur
;
1991 /* Clear least significant set bit. */
1992 mask
&= ~(mask
& (~mask
+ 1));
1995 cur
= alloc_record (gr_gr
);
1996 cur
->r
.record
.p
.grmask
= mask
;
1997 /* Indicate this record shouldn't be output. */
1998 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
1999 /* Retain only least significant bit. */
2000 prev
->r
.record
.p
.grmask
^= mask
;
2001 prev
->r
.record
.p
.next
= cur
;
2005 static unw_rec_list
*
2006 output_gr_mem (unsigned int mask
)
2008 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2009 unw_rec_list
*cur
= ptr
;
2011 ptr
->r
.record
.p
.grmask
= mask
;
2012 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2015 unw_rec_list
*prev
= cur
;
2017 /* Clear least significant set bit. */
2018 mask
&= ~(mask
& (~mask
+ 1));
2021 cur
= alloc_record (gr_mem
);
2022 cur
->r
.record
.p
.grmask
= mask
;
2023 /* Retain only least significant bit. */
2024 prev
->r
.record
.p
.grmask
^= mask
;
2025 prev
->r
.record
.p
.next
= cur
;
2029 static unw_rec_list
*
2030 output_br_mem (unsigned int mask
)
2032 unw_rec_list
*ptr
= alloc_record (br_mem
);
2033 unw_rec_list
*cur
= ptr
;
2035 ptr
->r
.record
.p
.brmask
= mask
;
2036 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2039 unw_rec_list
*prev
= cur
;
2041 /* Clear least significant set bit. */
2042 mask
&= ~(mask
& (~mask
+ 1));
2045 cur
= alloc_record (br_mem
);
2046 cur
->r
.record
.p
.brmask
= mask
;
2047 /* Retain only least significant bit. */
2048 prev
->r
.record
.p
.brmask
^= mask
;
2049 prev
->r
.record
.p
.next
= cur
;
2053 static unw_rec_list
*
2054 output_br_gr (unsigned int mask
, unsigned int reg
)
2056 unw_rec_list
*ptr
= alloc_record (br_gr
);
2057 unw_rec_list
*cur
= ptr
;
2059 ptr
->r
.record
.p
.brmask
= mask
;
2060 ptr
->r
.record
.p
.r
.gr
= reg
;
2061 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2064 unw_rec_list
*prev
= cur
;
2066 /* Clear least significant set bit. */
2067 mask
&= ~(mask
& (~mask
+ 1));
2070 cur
= alloc_record (br_gr
);
2071 cur
->r
.record
.p
.brmask
= mask
;
2072 /* Indicate this record shouldn't be output. */
2073 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2074 /* Retain only least significant bit. */
2075 prev
->r
.record
.p
.brmask
^= mask
;
2076 prev
->r
.record
.p
.next
= cur
;
2080 static unw_rec_list
*
2081 output_spill_base (unsigned int offset
)
2083 unw_rec_list
*ptr
= alloc_record (spill_base
);
2084 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2088 static unw_rec_list
*
2089 output_unat_when (void)
2091 unw_rec_list
*ptr
= alloc_record (unat_when
);
2095 static unw_rec_list
*
2096 output_unat_gr (unsigned int gr
)
2098 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2099 ptr
->r
.record
.p
.r
.gr
= gr
;
2103 static unw_rec_list
*
2104 output_unat_psprel (unsigned int offset
)
2106 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2107 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2111 static unw_rec_list
*
2112 output_unat_sprel (unsigned int offset
)
2114 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2115 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2119 static unw_rec_list
*
2120 output_lc_when (void)
2122 unw_rec_list
*ptr
= alloc_record (lc_when
);
2126 static unw_rec_list
*
2127 output_lc_gr (unsigned int gr
)
2129 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2130 ptr
->r
.record
.p
.r
.gr
= gr
;
2134 static unw_rec_list
*
2135 output_lc_psprel (unsigned int offset
)
2137 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2138 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2142 static unw_rec_list
*
2143 output_lc_sprel (unsigned int offset
)
2145 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2146 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2150 static unw_rec_list
*
2151 output_fpsr_when (void)
2153 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2157 static unw_rec_list
*
2158 output_fpsr_gr (unsigned int gr
)
2160 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2161 ptr
->r
.record
.p
.r
.gr
= gr
;
2165 static unw_rec_list
*
2166 output_fpsr_psprel (unsigned int offset
)
2168 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2169 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2173 static unw_rec_list
*
2174 output_fpsr_sprel (unsigned int offset
)
2176 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2177 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2181 static unw_rec_list
*
2182 output_priunat_when_gr (void)
2184 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2188 static unw_rec_list
*
2189 output_priunat_when_mem (void)
2191 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2195 static unw_rec_list
*
2196 output_priunat_gr (unsigned int gr
)
2198 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2199 ptr
->r
.record
.p
.r
.gr
= gr
;
2203 static unw_rec_list
*
2204 output_priunat_psprel (unsigned int offset
)
2206 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2207 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2211 static unw_rec_list
*
2212 output_priunat_sprel (unsigned int offset
)
2214 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2215 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2219 static unw_rec_list
*
2220 output_bsp_when (void)
2222 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2226 static unw_rec_list
*
2227 output_bsp_gr (unsigned int gr
)
2229 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2230 ptr
->r
.record
.p
.r
.gr
= gr
;
2234 static unw_rec_list
*
2235 output_bsp_psprel (unsigned int offset
)
2237 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2238 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2242 static unw_rec_list
*
2243 output_bsp_sprel (unsigned int offset
)
2245 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2246 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2250 static unw_rec_list
*
2251 output_bspstore_when (void)
2253 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2257 static unw_rec_list
*
2258 output_bspstore_gr (unsigned int gr
)
2260 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2261 ptr
->r
.record
.p
.r
.gr
= gr
;
2265 static unw_rec_list
*
2266 output_bspstore_psprel (unsigned int offset
)
2268 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2269 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2273 static unw_rec_list
*
2274 output_bspstore_sprel (unsigned int offset
)
2276 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2277 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2281 static unw_rec_list
*
2282 output_rnat_when (void)
2284 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2288 static unw_rec_list
*
2289 output_rnat_gr (unsigned int gr
)
2291 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2292 ptr
->r
.record
.p
.r
.gr
= gr
;
2296 static unw_rec_list
*
2297 output_rnat_psprel (unsigned int offset
)
2299 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2300 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2304 static unw_rec_list
*
2305 output_rnat_sprel (unsigned int offset
)
2307 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2308 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2312 static unw_rec_list
*
2313 output_unwabi (unsigned long abi
, unsigned long context
)
2315 unw_rec_list
*ptr
= alloc_record (unwabi
);
2316 ptr
->r
.record
.p
.abi
= abi
;
2317 ptr
->r
.record
.p
.context
= context
;
2321 static unw_rec_list
*
2322 output_epilogue (unsigned long ecount
)
2324 unw_rec_list
*ptr
= alloc_record (epilogue
);
2325 ptr
->r
.record
.b
.ecount
= ecount
;
2329 static unw_rec_list
*
2330 output_label_state (unsigned long label
)
2332 unw_rec_list
*ptr
= alloc_record (label_state
);
2333 ptr
->r
.record
.b
.label
= label
;
2337 static unw_rec_list
*
2338 output_copy_state (unsigned long label
)
2340 unw_rec_list
*ptr
= alloc_record (copy_state
);
2341 ptr
->r
.record
.b
.label
= label
;
2345 static unw_rec_list
*
2346 output_spill_psprel (unsigned int ab
,
2348 unsigned int offset
,
2349 unsigned int predicate
)
2351 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2352 ptr
->r
.record
.x
.ab
= ab
;
2353 ptr
->r
.record
.x
.reg
= reg
;
2354 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2355 ptr
->r
.record
.x
.qp
= predicate
;
2359 static unw_rec_list
*
2360 output_spill_sprel (unsigned int ab
,
2362 unsigned int offset
,
2363 unsigned int predicate
)
2365 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2366 ptr
->r
.record
.x
.ab
= ab
;
2367 ptr
->r
.record
.x
.reg
= reg
;
2368 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2369 ptr
->r
.record
.x
.qp
= predicate
;
2373 static unw_rec_list
*
2374 output_spill_reg (unsigned int ab
,
2376 unsigned int targ_reg
,
2378 unsigned int predicate
)
2380 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2381 ptr
->r
.record
.x
.ab
= ab
;
2382 ptr
->r
.record
.x
.reg
= reg
;
2383 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2384 ptr
->r
.record
.x
.xy
= xy
;
2385 ptr
->r
.record
.x
.qp
= predicate
;
2389 /* Given a unw_rec_list process the correct format with the
2390 specified function. */
2393 process_one_record (unw_rec_list
*ptr
, vbyte_func f
)
2395 unsigned int fr_mask
, gr_mask
;
2397 switch (ptr
->r
.type
)
2399 /* This is a dummy record that takes up no space in the output. */
2407 /* These are taken care of by prologue/prologue_gr. */
2412 if (ptr
->r
.type
== prologue_gr
)
2413 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2414 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2416 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2418 /* Output descriptor(s) for union of register spills (if any). */
2419 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2420 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2423 if ((fr_mask
& ~0xfUL
) == 0)
2424 output_P6_format (f
, fr_mem
, fr_mask
);
2427 output_P5_format (f
, gr_mask
, fr_mask
);
2432 output_P6_format (f
, gr_mem
, gr_mask
);
2433 if (ptr
->r
.record
.r
.mask
.br_mem
)
2434 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2436 /* output imask descriptor if necessary: */
2437 if (ptr
->r
.record
.r
.mask
.i
)
2438 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2439 ptr
->r
.record
.r
.imask_size
);
2443 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2447 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2448 ptr
->r
.record
.p
.size
);
2461 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2464 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2467 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2475 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2484 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2494 case bspstore_sprel
:
2496 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2499 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2501 const unw_rec_list
*cur
= ptr
;
2503 gr_mask
= cur
->r
.record
.p
.grmask
;
2504 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2505 gr_mask
|= cur
->r
.record
.p
.grmask
;
2506 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2510 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2512 const unw_rec_list
*cur
= ptr
;
2514 gr_mask
= cur
->r
.record
.p
.brmask
;
2515 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2516 gr_mask
|= cur
->r
.record
.p
.brmask
;
2517 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2521 as_bad (_("spill_mask record unimplemented."));
2523 case priunat_when_gr
:
2524 case priunat_when_mem
:
2528 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2530 case priunat_psprel
:
2532 case bspstore_psprel
:
2534 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2537 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2540 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2544 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2547 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2548 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2549 ptr
->r
.record
.x
.where
.pspoff
);
2552 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2553 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2554 ptr
->r
.record
.x
.where
.spoff
);
2557 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2558 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2559 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2561 case spill_psprel_p
:
2562 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2563 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2564 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2567 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2568 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2569 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2572 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2573 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2574 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2578 as_bad (_("record_type_not_valid"));
2583 /* Given a unw_rec_list list, process all the records with
2584 the specified function. */
2586 process_unw_records (unw_rec_list
*list
, vbyte_func f
)
2589 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2590 process_one_record (ptr
, f
);
2593 /* Determine the size of a record list in bytes. */
2595 calc_record_size (unw_rec_list
*list
)
2598 process_unw_records (list
, count_output
);
2602 /* Return the number of bits set in the input value.
2603 Perhaps this has a better place... */
2604 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2605 # define popcount __builtin_popcount
2608 popcount (unsigned x
)
2610 static const unsigned char popcnt
[16] =
2618 if (x
< NELEMS (popcnt
))
2620 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2624 /* Update IMASK bitmask to reflect the fact that one or more registers
2625 of type TYPE are saved starting at instruction with index T. If N
2626 bits are set in REGMASK, it is assumed that instructions T through
2627 T+N-1 save these registers.
2631 1: instruction saves next fp reg
2632 2: instruction saves next general reg
2633 3: instruction saves next branch reg */
2635 set_imask (unw_rec_list
*region
,
2636 unsigned long regmask
,
2640 unsigned char *imask
;
2641 unsigned long imask_size
;
2645 imask
= region
->r
.record
.r
.mask
.i
;
2646 imask_size
= region
->r
.record
.r
.imask_size
;
2649 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2650 imask
= XCNEWVEC (unsigned char, imask_size
);
2652 region
->r
.record
.r
.imask_size
= imask_size
;
2653 region
->r
.record
.r
.mask
.i
= imask
;
2657 pos
= 2 * (3 - t
% 4);
2660 if (i
>= imask_size
)
2662 as_bad (_("Ignoring attempt to spill beyond end of region"));
2666 imask
[i
] |= (type
& 0x3) << pos
;
2668 regmask
&= (regmask
- 1);
2678 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2679 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2680 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2683 static unsigned long
2684 slot_index (unsigned long slot_addr
,
2686 unsigned long first_addr
,
2690 unsigned long s_index
= 0;
2692 /* First time we are called, the initial address and frag are invalid. */
2693 if (first_addr
== 0)
2696 /* If the two addresses are in different frags, then we need to add in
2697 the remaining size of this frag, and then the entire size of intermediate
2699 while (slot_frag
!= first_frag
)
2701 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2705 /* We can get the final addresses only during and after
2707 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2708 s_index
+= 3 * ((first_frag
->fr_next
->fr_address
2709 - first_frag
->fr_address
2710 - first_frag
->fr_fix
) >> 4);
2713 /* We don't know what the final addresses will be. We try our
2714 best to estimate. */
2715 switch (first_frag
->fr_type
)
2721 as_fatal (_("Only constant space allocation is supported"));
2727 /* Take alignment into account. Assume the worst case
2728 before relaxation. */
2729 s_index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2733 if (first_frag
->fr_symbol
)
2735 as_fatal (_("Only constant offsets are supported"));
2740 s_index
+= 3 * (first_frag
->fr_offset
>> 4);
2744 /* Add in the full size of the frag converted to instruction slots. */
2745 s_index
+= 3 * (first_frag
->fr_fix
>> 4);
2746 /* Subtract away the initial part before first_addr. */
2747 s_index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2748 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2750 /* Move to the beginning of the next frag. */
2751 first_frag
= first_frag
->fr_next
;
2752 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2754 /* This can happen if there is section switching in the middle of a
2755 function, causing the frag chain for the function to be broken.
2756 It is too difficult to recover safely from this problem, so we just
2757 exit with an error. */
2758 if (first_frag
== NULL
)
2759 as_fatal (_("Section switching in code is not supported."));
2762 /* Add in the used part of the last frag. */
2763 s_index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2764 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2768 /* Optimize unwind record directives. */
2770 static unw_rec_list
*
2771 optimize_unw_records (unw_rec_list
*list
)
2776 /* If the only unwind record is ".prologue" or ".prologue" followed
2777 by ".body", then we can optimize the unwind directives away. */
2778 if (list
->r
.type
== prologue
2779 && (list
->next
->r
.type
== endp
2780 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2786 /* Given a complete record list, process any records which have
2787 unresolved fields, (ie length counts for a prologue). After
2788 this has been run, all necessary information should be available
2789 within each record to generate an image. */
2792 fixup_unw_records (unw_rec_list
*list
, int before_relax
)
2794 unw_rec_list
*ptr
, *region
= 0;
2795 unsigned long first_addr
= 0, rlen
= 0, t
;
2796 fragS
*first_frag
= 0;
2798 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2800 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2801 as_bad (_("Insn slot not set in unwind record."));
2802 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2803 first_addr
, first_frag
, before_relax
);
2804 switch (ptr
->r
.type
)
2812 unsigned long last_addr
= 0;
2813 fragS
*last_frag
= NULL
;
2815 first_addr
= ptr
->slot_number
;
2816 first_frag
= ptr
->slot_frag
;
2817 /* Find either the next body/prologue start, or the end of
2818 the function, and determine the size of the region. */
2819 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2820 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2821 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2823 last_addr
= last
->slot_number
;
2824 last_frag
= last
->slot_frag
;
2827 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2829 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2830 if (ptr
->r
.type
== body
)
2831 /* End of region. */
2839 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2841 /* This happens when a memory-stack-less procedure uses a
2842 ".restore sp" directive at the end of a region to pop
2844 ptr
->r
.record
.b
.t
= 0;
2855 case priunat_when_gr
:
2856 case priunat_when_mem
:
2860 ptr
->r
.record
.p
.t
= t
;
2868 case spill_psprel_p
:
2869 ptr
->r
.record
.x
.t
= t
;
2875 as_bad (_("frgr_mem record before region record!"));
2878 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2879 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2880 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2881 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2886 as_bad (_("fr_mem record before region record!"));
2889 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2890 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2895 as_bad (_("gr_mem record before region record!"));
2898 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2899 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2904 as_bad (_("br_mem record before region record!"));
2907 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2908 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2914 as_bad (_("gr_gr record before region record!"));
2917 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2922 as_bad (_("br_gr record before region record!"));
2925 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2934 /* Estimate the size of a frag before relaxing. We only have one type of frag
2935 to handle here, which is the unwind info frag. */
2938 ia64_estimate_size_before_relax (fragS
*frag
,
2939 asection
*segtype ATTRIBUTE_UNUSED
)
2944 /* ??? This code is identical to the first part of ia64_convert_frag. */
2945 list
= (unw_rec_list
*) frag
->fr_opcode
;
2946 fixup_unw_records (list
, 0);
2948 len
= calc_record_size (list
);
2949 /* pad to pointer-size boundary. */
2950 pad
= len
% md
.pointer_size
;
2952 len
+= md
.pointer_size
- pad
;
2953 /* Add 8 for the header. */
2955 /* Add a pointer for the personality offset. */
2956 if (frag
->fr_offset
)
2957 size
+= md
.pointer_size
;
2959 /* fr_var carries the max_chars that we created the fragment with.
2960 We must, of course, have allocated enough memory earlier. */
2961 gas_assert (frag
->fr_var
>= size
);
2963 return frag
->fr_fix
+ size
;
2966 /* This function converts a rs_machine_dependent variant frag into a
2967 normal fill frag with the unwind image from the record list. */
2969 ia64_convert_frag (fragS
*frag
)
2975 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2976 list
= (unw_rec_list
*) frag
->fr_opcode
;
2977 fixup_unw_records (list
, 0);
2979 len
= calc_record_size (list
);
2980 /* pad to pointer-size boundary. */
2981 pad
= len
% md
.pointer_size
;
2983 len
+= md
.pointer_size
- pad
;
2984 /* Add 8 for the header. */
2986 /* Add a pointer for the personality offset. */
2987 if (frag
->fr_offset
)
2988 size
+= md
.pointer_size
;
2990 /* fr_var carries the max_chars that we created the fragment with.
2991 We must, of course, have allocated enough memory earlier. */
2992 gas_assert (frag
->fr_var
>= size
);
2994 /* Initialize the header area. fr_offset is initialized with
2995 unwind.personality_routine. */
2996 if (frag
->fr_offset
)
2998 if (md
.flags
& EF_IA_64_ABI64
)
2999 flag_value
= (bfd_vma
) 3 << 32;
3001 /* 32-bit unwind info block. */
3002 flag_value
= (bfd_vma
) 0x1003 << 32;
3007 md_number_to_chars (frag
->fr_literal
,
3008 (((bfd_vma
) 1 << 48) /* Version. */
3009 | flag_value
/* U & E handler flags. */
3010 | (len
/ md
.pointer_size
)), /* Length. */
3013 /* Skip the header. */
3014 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3015 process_unw_records (list
, output_vbyte_mem
);
3017 /* Fill the padding bytes with zeros. */
3019 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3020 md
.pointer_size
- pad
);
3021 /* Fill the unwind personality with zeros. */
3022 if (frag
->fr_offset
)
3023 md_number_to_chars (frag
->fr_literal
+ size
- md
.pointer_size
, 0,
3026 frag
->fr_fix
+= size
;
3027 frag
->fr_type
= rs_fill
;
3029 frag
->fr_offset
= 0;
3033 parse_predicate_and_operand (expressionS
*e
, unsigned *qp
, const char *po
)
3035 int sep
= parse_operand_and_eval (e
, ',');
3037 *qp
= e
->X_add_number
- REG_P
;
3038 if (e
->X_op
!= O_register
|| *qp
> 63)
3040 as_bad (_("First operand to .%s must be a predicate"), po
);
3044 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
3046 sep
= parse_operand_and_eval (e
, ',');
3053 convert_expr_to_ab_reg (const expressionS
*e
,
3059 unsigned int reg
= e
->X_add_number
;
3061 *ab
= *regp
= 0; /* Anything valid is good here. */
3063 if (e
->X_op
!= O_register
)
3064 reg
= REG_GR
; /* Anything invalid is good here. */
3066 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3069 *regp
= reg
- REG_GR
;
3071 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3072 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3075 *regp
= reg
- REG_FR
;
3077 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3080 *regp
= reg
- REG_BR
;
3087 case REG_PR
: *regp
= 0; break;
3088 case REG_PSP
: *regp
= 1; break;
3089 case REG_PRIUNAT
: *regp
= 2; break;
3090 case REG_BR
+ 0: *regp
= 3; break;
3091 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3092 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3093 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3094 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3095 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3096 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3097 case REG_AR
+ AR_LC
: *regp
= 10; break;
3100 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
3107 convert_expr_to_xy_reg (const expressionS
*e
,
3113 unsigned int reg
= e
->X_add_number
;
3115 *xy
= *regp
= 0; /* Anything valid is good here. */
3117 if (e
->X_op
!= O_register
)
3118 reg
= REG_GR
; /* Anything invalid is good here. */
3120 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3123 *regp
= reg
- REG_GR
;
3125 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3128 *regp
= reg
- REG_FR
;
3130 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3133 *regp
= reg
- REG_BR
;
3136 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3142 /* The current frag is an alignment frag. */
3143 align_frag
= frag_now
;
3144 s_align_bytes (arg
);
3148 dot_radix (int dummy ATTRIBUTE_UNUSED
)
3155 if (is_it_end_of_statement ())
3157 ch
= get_symbol_name (&radix
);
3158 ia64_canonicalize_symbol_name (radix
);
3159 if (strcasecmp (radix
, "C"))
3160 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3161 (void) restore_line_pointer (ch
);
3162 demand_empty_rest_of_line ();
3165 /* Helper function for .loc directives. If the assembler is not generating
3166 line number info, then we need to remember which instructions have a .loc
3167 directive, and only call dwarf2_gen_line_info for those instructions. */
3172 CURR_SLOT
.loc_directive_seen
= 1;
3173 dwarf2_directive_loc (x
);
3176 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3178 dot_special_section (int which
)
3180 set_section ((char *) special_section_name
[which
]);
3183 /* Return -1 for warning and 0 for error. */
3186 unwind_diagnostic (const char * region
, const char *directive
)
3188 if (md
.unwind_check
== unwind_check_warning
)
3190 as_warn (_(".%s outside of %s"), directive
, region
);
3195 as_bad (_(".%s outside of %s"), directive
, region
);
3196 ignore_rest_of_line ();
3201 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3202 a procedure but the unwind directive check is set to warning, 0 if
3203 a directive isn't in a procedure and the unwind directive check is set
3207 in_procedure (const char *directive
)
3209 if (unwind
.proc_pending
.sym
3210 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3212 return unwind_diagnostic ("procedure", directive
);
3215 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3216 a prologue but the unwind directive check is set to warning, 0 if
3217 a directive isn't in a prologue and the unwind directive check is set
3221 in_prologue (const char *directive
)
3223 int in
= in_procedure (directive
);
3225 if (in
> 0 && !unwind
.prologue
)
3226 in
= unwind_diagnostic ("prologue", directive
);
3227 check_pending_save ();
3231 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3232 a body but the unwind directive check is set to warning, 0 if
3233 a directive isn't in a body and the unwind directive check is set
3237 in_body (const char *directive
)
3239 int in
= in_procedure (directive
);
3241 if (in
> 0 && !unwind
.body
)
3242 in
= unwind_diagnostic ("body region", directive
);
3247 add_unwind_entry (unw_rec_list
*ptr
, int sep
)
3252 unwind
.tail
->next
= ptr
;
3257 /* The current entry can in fact be a chain of unwind entries. */
3258 if (unwind
.current_entry
== NULL
)
3259 unwind
.current_entry
= ptr
;
3262 /* The current entry can in fact be a chain of unwind entries. */
3263 if (unwind
.current_entry
== NULL
)
3264 unwind
.current_entry
= ptr
;
3269 /* Parse a tag permitted for the current directive. */
3273 ch
= get_symbol_name (&name
);
3274 /* FIXME: For now, just issue a warning that this isn't implemented. */
3281 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3284 (void) restore_line_pointer (ch
);
3286 if (sep
!= NOT_A_CHAR
)
3287 demand_empty_rest_of_line ();
3291 dot_fframe (int dummy ATTRIBUTE_UNUSED
)
3296 if (!in_prologue ("fframe"))
3299 sep
= parse_operand_and_eval (&e
, ',');
3301 if (e
.X_op
!= O_constant
)
3303 as_bad (_("First operand to .fframe must be a constant"));
3306 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3310 dot_vframe (int dummy ATTRIBUTE_UNUSED
)
3316 if (!in_prologue ("vframe"))
3319 sep
= parse_operand_and_eval (&e
, ',');
3320 reg
= e
.X_add_number
- REG_GR
;
3321 if (e
.X_op
!= O_register
|| reg
> 127)
3323 as_bad (_("First operand to .vframe must be a general register"));
3326 add_unwind_entry (output_mem_stack_v (), sep
);
3327 if (! (unwind
.prologue_mask
& 2))
3328 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3329 else if (reg
!= unwind
.prologue_gr
3330 + (unsigned) popcount (unwind
.prologue_mask
& -(2 << 1)))
3331 as_warn (_("Operand of .vframe contradicts .prologue"));
3335 dot_vframesp (int psp
)
3341 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3343 if (!in_prologue ("vframesp"))
3346 sep
= parse_operand_and_eval (&e
, ',');
3347 if (e
.X_op
!= O_constant
)
3349 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3352 add_unwind_entry (output_mem_stack_v (), sep
);
3353 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3357 dot_save (int dummy ATTRIBUTE_UNUSED
)
3360 unsigned reg1
, reg2
;
3363 if (!in_prologue ("save"))
3366 sep
= parse_operand_and_eval (&e1
, ',');
3368 sep
= parse_operand_and_eval (&e2
, ',');
3372 reg1
= e1
.X_add_number
;
3373 /* Make sure it's a valid ar.xxx reg, OR its br0, aka 'rp'. */
3374 if (e1
.X_op
!= O_register
)
3376 as_bad (_("First operand to .save not a register"));
3377 reg1
= REG_PR
; /* Anything valid is good here. */
3379 reg2
= e2
.X_add_number
- REG_GR
;
3380 if (e2
.X_op
!= O_register
|| reg2
> 127)
3382 as_bad (_("Second operand to .save not a valid register"));
3387 case REG_AR
+ AR_BSP
:
3388 add_unwind_entry (output_bsp_when (), sep
);
3389 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3391 case REG_AR
+ AR_BSPSTORE
:
3392 add_unwind_entry (output_bspstore_when (), sep
);
3393 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3395 case REG_AR
+ AR_RNAT
:
3396 add_unwind_entry (output_rnat_when (), sep
);
3397 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3399 case REG_AR
+ AR_UNAT
:
3400 add_unwind_entry (output_unat_when (), sep
);
3401 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3403 case REG_AR
+ AR_FPSR
:
3404 add_unwind_entry (output_fpsr_when (), sep
);
3405 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3407 case REG_AR
+ AR_PFS
:
3408 add_unwind_entry (output_pfs_when (), sep
);
3409 if (! (unwind
.prologue_mask
& 4))
3410 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3411 else if (reg2
!= unwind
.prologue_gr
3412 + (unsigned) popcount (unwind
.prologue_mask
& -(4 << 1)))
3413 as_warn (_("Second operand of .save contradicts .prologue"));
3415 case REG_AR
+ AR_LC
:
3416 add_unwind_entry (output_lc_when (), sep
);
3417 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3420 add_unwind_entry (output_rp_when (), sep
);
3421 if (! (unwind
.prologue_mask
& 8))
3422 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3423 else if (reg2
!= unwind
.prologue_gr
)
3424 as_warn (_("Second operand of .save contradicts .prologue"));
3427 add_unwind_entry (output_preds_when (), sep
);
3428 if (! (unwind
.prologue_mask
& 1))
3429 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3430 else if (reg2
!= unwind
.prologue_gr
3431 + (unsigned) popcount (unwind
.prologue_mask
& -(1 << 1)))
3432 as_warn (_("Second operand of .save contradicts .prologue"));
3435 add_unwind_entry (output_priunat_when_gr (), sep
);
3436 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3439 as_bad (_("First operand to .save not a valid register"));
3440 add_unwind_entry (NULL
, sep
);
3446 dot_restore (int dummy ATTRIBUTE_UNUSED
)
3449 unsigned long ecount
; /* # of _additional_ regions to pop */
3452 if (!in_body ("restore"))
3455 sep
= parse_operand_and_eval (&e1
, ',');
3456 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3457 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3463 sep
= parse_operand_and_eval (&e2
, ',');
3464 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3466 as_bad (_("Second operand to .restore must be a constant >= 0"));
3467 e2
.X_add_number
= 0;
3469 ecount
= e2
.X_add_number
;
3472 ecount
= unwind
.prologue_count
- 1;
3474 if (ecount
>= unwind
.prologue_count
)
3476 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3477 ecount
+ 1, unwind
.prologue_count
);
3481 add_unwind_entry (output_epilogue (ecount
), sep
);
3483 if (ecount
< unwind
.prologue_count
)
3484 unwind
.prologue_count
-= ecount
+ 1;
3486 unwind
.prologue_count
= 0;
3490 dot_restorereg (int pred
)
3492 unsigned int qp
, ab
, reg
;
3495 const char * const po
= pred
? "restorereg.p" : "restorereg";
3497 if (!in_procedure (po
))
3501 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3504 sep
= parse_operand_and_eval (&e
, ',');
3507 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3509 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3512 static const char *special_linkonce_name
[] =
3514 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3518 start_unwind_section (const segT text_seg
, int sec_index
)
3521 Use a slightly ugly scheme to derive the unwind section names from
3522 the text section name:
3524 text sect. unwind table sect.
3525 name: name: comments:
3526 ---------- ----------------- --------------------------------
3528 .text.foo .IA_64.unwind.text.foo
3529 .foo .IA_64.unwind.foo
3531 .gnu.linkonce.ia64unw.foo
3532 _info .IA_64.unwind_info gas issues error message (ditto)
3533 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3535 This mapping is done so that:
3537 (a) An object file with unwind info only in .text will use
3538 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3539 This follows the letter of the ABI and also ensures backwards
3540 compatibility with older toolchains.
3542 (b) An object file with unwind info in multiple text sections
3543 will use separate unwind sections for each text section.
3544 This allows us to properly set the "sh_info" and "sh_link"
3545 fields in SHT_IA_64_UNWIND as required by the ABI and also
3546 lets GNU ld support programs with multiple segments
3547 containing unwind info (as might be the case for certain
3548 embedded applications).
3550 (c) An error is issued if there would be a name clash.
3553 const char *text_name
, *sec_text_name
;
3555 const char *prefix
= special_section_name
[sec_index
];
3558 sec_text_name
= segment_name (text_seg
);
3559 text_name
= sec_text_name
;
3560 if (startswith (text_name
, "_info"))
3562 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3564 ignore_rest_of_line ();
3567 if (strcmp (text_name
, ".text") == 0)
3570 /* Build the unwind section name by appending the (possibly stripped)
3571 text section name to the unwind prefix. */
3573 if (startswith (text_name
, ".gnu.linkonce.t."))
3575 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3576 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3579 sec_name
= concat (prefix
, suffix
, NULL
);
3581 /* Handle COMDAT group. */
3582 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3583 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3586 const char *group_name
= elf_group_name (text_seg
);
3588 if (group_name
== NULL
)
3590 as_bad (_("Group section `%s' has no group signature"),
3592 ignore_rest_of_line ();
3597 /* We have to construct a fake section directive. */
3598 section
= concat (sec_name
, ",\"aG\",@progbits,", group_name
, ",comdat", NULL
);
3599 set_section (section
);
3604 set_section (sec_name
);
3605 bfd_set_section_flags (now_seg
, SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3608 elf_linked_to_section (now_seg
) = text_seg
;
3613 generate_unwind_image (const segT text_seg
)
3618 /* Mark the end of the unwind info, so that we can compute the size of the
3619 last unwind region. */
3620 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3622 /* Force out pending instructions, to make sure all unwind records have
3623 a valid slot_number field. */
3624 ia64_flush_insns ();
3626 /* Generate the unwind record. */
3627 list
= optimize_unw_records (unwind
.list
);
3628 fixup_unw_records (list
, 1);
3629 size
= calc_record_size (list
);
3631 if (size
> 0 || unwind
.force_unwind_entry
)
3633 unwind
.force_unwind_entry
= 0;
3634 /* pad to pointer-size boundary. */
3635 pad
= size
% md
.pointer_size
;
3637 size
+= md
.pointer_size
- pad
;
3638 /* Add 8 for the header. */
3640 /* Add a pointer for the personality offset. */
3641 if (unwind
.personality_routine
)
3642 size
+= md
.pointer_size
;
3645 /* If there are unwind records, switch sections, and output the info. */
3649 bfd_reloc_code_real_type reloc
;
3651 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3653 /* Make sure the section has 4 byte alignment for ILP32 and
3654 8 byte alignment for LP64. */
3655 frag_align (md
.pointer_size_shift
, 0, 0);
3656 record_alignment (now_seg
, md
.pointer_size_shift
);
3658 /* Set expression which points to start of unwind descriptor area. */
3659 unwind
.info
= expr_build_dot ();
3661 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3662 (offsetT
) (long) unwind
.personality_routine
,
3665 /* Add the personality address to the image. */
3666 if (unwind
.personality_routine
!= 0)
3668 exp
.X_op
= O_symbol
;
3669 exp
.X_add_symbol
= unwind
.personality_routine
;
3670 exp
.X_add_number
= 0;
3672 if (md
.flags
& EF_IA_64_BE
)
3674 if (md
.flags
& EF_IA_64_ABI64
)
3675 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3677 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3681 if (md
.flags
& EF_IA_64_ABI64
)
3682 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3684 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3687 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3688 md
.pointer_size
, &exp
, 0, reloc
);
3689 unwind
.personality_routine
= 0;
3693 free_saved_prologue_counts ();
3694 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3698 dot_handlerdata (int dummy ATTRIBUTE_UNUSED
)
3700 if (!in_procedure ("handlerdata"))
3702 unwind
.force_unwind_entry
= 1;
3704 /* Remember which segment we're in so we can switch back after .endp */
3705 unwind
.saved_text_seg
= now_seg
;
3706 unwind
.saved_text_subseg
= now_subseg
;
3708 /* Generate unwind info into unwind-info section and then leave that
3709 section as the currently active one so dataXX directives go into
3710 the language specific data area of the unwind info block. */
3711 generate_unwind_image (now_seg
);
3712 demand_empty_rest_of_line ();
3716 dot_unwentry (int dummy ATTRIBUTE_UNUSED
)
3718 if (!in_procedure ("unwentry"))
3720 unwind
.force_unwind_entry
= 1;
3721 demand_empty_rest_of_line ();
3725 dot_altrp (int dummy ATTRIBUTE_UNUSED
)
3730 if (!in_prologue ("altrp"))
3733 parse_operand_and_eval (&e
, 0);
3734 reg
= e
.X_add_number
- REG_BR
;
3735 if (e
.X_op
!= O_register
|| reg
> 7)
3737 as_bad (_("First operand to .altrp not a valid branch register"));
3740 add_unwind_entry (output_rp_br (reg
), 0);
3744 dot_savemem (int psprel
)
3749 const char * const po
= psprel
? "savepsp" : "savesp";
3751 if (!in_prologue (po
))
3754 sep
= parse_operand_and_eval (&e1
, ',');
3756 sep
= parse_operand_and_eval (&e2
, ',');
3760 reg1
= e1
.X_add_number
;
3761 val
= e2
.X_add_number
;
3763 /* Make sure it's a valid ar.xxx reg, OR its br0, aka 'rp'. */
3764 if (e1
.X_op
!= O_register
)
3766 as_bad (_("First operand to .%s not a register"), po
);
3767 reg1
= REG_PR
; /* Anything valid is good here. */
3769 if (e2
.X_op
!= O_constant
)
3771 as_bad (_("Second operand to .%s not a constant"), po
);
3777 case REG_AR
+ AR_BSP
:
3778 add_unwind_entry (output_bsp_when (), sep
);
3779 add_unwind_entry ((psprel
3781 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3783 case REG_AR
+ AR_BSPSTORE
:
3784 add_unwind_entry (output_bspstore_when (), sep
);
3785 add_unwind_entry ((psprel
3786 ? output_bspstore_psprel
3787 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3789 case REG_AR
+ AR_RNAT
:
3790 add_unwind_entry (output_rnat_when (), sep
);
3791 add_unwind_entry ((psprel
3792 ? output_rnat_psprel
3793 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3795 case REG_AR
+ AR_UNAT
:
3796 add_unwind_entry (output_unat_when (), sep
);
3797 add_unwind_entry ((psprel
3798 ? output_unat_psprel
3799 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3801 case REG_AR
+ AR_FPSR
:
3802 add_unwind_entry (output_fpsr_when (), sep
);
3803 add_unwind_entry ((psprel
3804 ? output_fpsr_psprel
3805 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3807 case REG_AR
+ AR_PFS
:
3808 add_unwind_entry (output_pfs_when (), sep
);
3809 add_unwind_entry ((psprel
3811 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3813 case REG_AR
+ AR_LC
:
3814 add_unwind_entry (output_lc_when (), sep
);
3815 add_unwind_entry ((psprel
3817 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3820 add_unwind_entry (output_rp_when (), sep
);
3821 add_unwind_entry ((psprel
3823 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3826 add_unwind_entry (output_preds_when (), sep
);
3827 add_unwind_entry ((psprel
3828 ? output_preds_psprel
3829 : output_preds_sprel
) (val
), NOT_A_CHAR
);
3832 add_unwind_entry (output_priunat_when_mem (), sep
);
3833 add_unwind_entry ((psprel
3834 ? output_priunat_psprel
3835 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
3838 as_bad (_("First operand to .%s not a valid register"), po
);
3839 add_unwind_entry (NULL
, sep
);
3845 dot_saveg (int dummy ATTRIBUTE_UNUSED
)
3851 if (!in_prologue ("save.g"))
3854 sep
= parse_operand_and_eval (&e
, ',');
3856 grmask
= e
.X_add_number
;
3857 if (e
.X_op
!= O_constant
3858 || e
.X_add_number
<= 0
3859 || e
.X_add_number
> 0xf)
3861 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
3868 int n
= popcount (grmask
);
3870 parse_operand_and_eval (&e
, 0);
3871 reg
= e
.X_add_number
- REG_GR
;
3872 if (e
.X_op
!= O_register
|| reg
> 127)
3874 as_bad (_("Second operand to .save.g must be a general register"));
3877 else if (reg
> 128U - n
)
3879 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
3882 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
3885 add_unwind_entry (output_gr_mem (grmask
), 0);
3889 dot_savef (int dummy ATTRIBUTE_UNUSED
)
3893 if (!in_prologue ("save.f"))
3896 parse_operand_and_eval (&e
, 0);
3898 if (e
.X_op
!= O_constant
3899 || e
.X_add_number
<= 0
3900 || e
.X_add_number
> 0xfffff)
3902 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
3905 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
3909 dot_saveb (int dummy ATTRIBUTE_UNUSED
)
3915 if (!in_prologue ("save.b"))
3918 sep
= parse_operand_and_eval (&e
, ',');
3920 brmask
= e
.X_add_number
;
3921 if (e
.X_op
!= O_constant
3922 || e
.X_add_number
<= 0
3923 || e
.X_add_number
> 0x1f)
3925 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
3932 int n
= popcount (brmask
);
3934 parse_operand_and_eval (&e
, 0);
3935 reg
= e
.X_add_number
- REG_GR
;
3936 if (e
.X_op
!= O_register
|| reg
> 127)
3938 as_bad (_("Second operand to .save.b must be a general register"));
3941 else if (reg
> 128U - n
)
3943 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
3946 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
3949 add_unwind_entry (output_br_mem (brmask
), 0);
3953 dot_savegf (int dummy ATTRIBUTE_UNUSED
)
3957 if (!in_prologue ("save.gf"))
3960 if (parse_operand_and_eval (&e1
, ',') == ',')
3961 parse_operand_and_eval (&e2
, 0);
3965 if (e1
.X_op
!= O_constant
3966 || e1
.X_add_number
< 0
3967 || e1
.X_add_number
> 0xf)
3969 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
3971 e1
.X_add_number
= 0;
3973 if (e2
.X_op
!= O_constant
3974 || e2
.X_add_number
< 0
3975 || e2
.X_add_number
> 0xfffff)
3977 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
3979 e2
.X_add_number
= 0;
3981 if (e1
.X_op
== O_constant
3982 && e2
.X_op
== O_constant
3983 && e1
.X_add_number
== 0
3984 && e2
.X_add_number
== 0)
3985 as_bad (_("Operands to .save.gf may not be both zero"));
3987 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
3991 dot_spill (int dummy ATTRIBUTE_UNUSED
)
3995 if (!in_prologue ("spill"))
3998 parse_operand_and_eval (&e
, 0);
4000 if (e
.X_op
!= O_constant
)
4002 as_bad (_("Operand to .spill must be a constant"));
4005 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4009 dot_spillreg (int pred
)
4012 unsigned int qp
, ab
, xy
, reg
, treg
;
4014 const char * const po
= pred
? "spillreg.p" : "spillreg";
4016 if (!in_procedure (po
))
4020 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4023 sep
= parse_operand_and_eval (&e
, ',');
4026 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4029 sep
= parse_operand_and_eval (&e
, ',');
4032 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4034 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4038 dot_spillmem (int psprel
)
4041 int pred
= (psprel
< 0), sep
;
4042 unsigned int qp
, ab
, reg
;
4048 po
= psprel
? "spillpsp.p" : "spillsp.p";
4051 po
= psprel
? "spillpsp" : "spillsp";
4053 if (!in_procedure (po
))
4057 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4060 sep
= parse_operand_and_eval (&e
, ',');
4063 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4066 sep
= parse_operand_and_eval (&e
, ',');
4069 if (e
.X_op
!= O_constant
)
4071 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
4076 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4078 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4082 get_saved_prologue_count (unsigned long lbl
)
4084 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4086 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4090 return lpc
->prologue_count
;
4092 as_bad (_("Missing .label_state %ld"), lbl
);
4097 save_prologue_count (unsigned long lbl
, unsigned int count
)
4099 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4101 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4105 lpc
->prologue_count
= count
;
4108 label_prologue_count
*new_lpc
= XNEW (label_prologue_count
);
4110 new_lpc
->next
= unwind
.saved_prologue_counts
;
4111 new_lpc
->label_number
= lbl
;
4112 new_lpc
->prologue_count
= count
;
4113 unwind
.saved_prologue_counts
= new_lpc
;
4118 free_saved_prologue_counts (void)
4120 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4121 label_prologue_count
*next
;
4130 unwind
.saved_prologue_counts
= NULL
;
4134 dot_label_state (int dummy ATTRIBUTE_UNUSED
)
4138 if (!in_body ("label_state"))
4141 parse_operand_and_eval (&e
, 0);
4142 if (e
.X_op
== O_constant
)
4143 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4146 as_bad (_("Operand to .label_state must be a constant"));
4149 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4153 dot_copy_state (int dummy ATTRIBUTE_UNUSED
)
4157 if (!in_body ("copy_state"))
4160 parse_operand_and_eval (&e
, 0);
4161 if (e
.X_op
== O_constant
)
4162 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4165 as_bad (_("Operand to .copy_state must be a constant"));
4168 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4172 dot_unwabi (int dummy ATTRIBUTE_UNUSED
)
4177 if (!in_prologue ("unwabi"))
4180 sep
= parse_operand_and_eval (&e1
, ',');
4182 parse_operand_and_eval (&e2
, 0);
4186 if (e1
.X_op
!= O_constant
)
4188 as_bad (_("First operand to .unwabi must be a constant"));
4189 e1
.X_add_number
= 0;
4192 if (e2
.X_op
!= O_constant
)
4194 as_bad (_("Second operand to .unwabi must be a constant"));
4195 e2
.X_add_number
= 0;
4198 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4202 dot_personality (int dummy ATTRIBUTE_UNUSED
)
4206 if (!in_procedure ("personality"))
4209 c
= get_symbol_name (&name
);
4210 p
= input_line_pointer
;
4211 unwind
.personality_routine
= symbol_find_or_make (name
);
4212 unwind
.force_unwind_entry
= 1;
4214 SKIP_WHITESPACE_AFTER_NAME ();
4215 demand_empty_rest_of_line ();
4219 dot_proc (int dummy ATTRIBUTE_UNUSED
)
4223 proc_pending
*pending
, *last_pending
;
4225 if (unwind
.proc_pending
.sym
)
4227 (md
.unwind_check
== unwind_check_warning
4229 : as_bad
) (_("Missing .endp after previous .proc"));
4230 while (unwind
.proc_pending
.next
)
4232 pending
= unwind
.proc_pending
.next
;
4233 unwind
.proc_pending
.next
= pending
->next
;
4237 last_pending
= NULL
;
4239 /* Parse names of main and alternate entry points and mark them as
4240 function symbols: */
4244 c
= get_symbol_name (&name
);
4245 p
= input_line_pointer
;
4247 as_bad (_("Empty argument of .proc"));
4250 sym
= symbol_find_or_make (name
);
4251 if (S_IS_DEFINED (sym
))
4252 as_bad (_("`%s' was already defined"), name
);
4253 else if (!last_pending
)
4255 unwind
.proc_pending
.sym
= sym
;
4256 last_pending
= &unwind
.proc_pending
;
4260 pending
= XNEW (proc_pending
);
4262 last_pending
= last_pending
->next
= pending
;
4264 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4267 SKIP_WHITESPACE_AFTER_NAME ();
4268 if (*input_line_pointer
!= ',')
4270 ++input_line_pointer
;
4274 unwind
.proc_pending
.sym
= expr_build_dot ();
4275 last_pending
= &unwind
.proc_pending
;
4277 last_pending
->next
= NULL
;
4278 demand_empty_rest_of_line ();
4279 do_align (4, NULL
, 0, 0);
4281 unwind
.prologue
= 0;
4282 unwind
.prologue_count
= 0;
4285 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4286 unwind
.personality_routine
= 0;
4290 dot_body (int dummy ATTRIBUTE_UNUSED
)
4292 if (!in_procedure ("body"))
4294 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4295 as_warn (_("Initial .body should precede any instructions"));
4296 check_pending_save ();
4298 unwind
.prologue
= 0;
4299 unwind
.prologue_mask
= 0;
4302 add_unwind_entry (output_body (), 0);
4306 dot_prologue (int dummy ATTRIBUTE_UNUSED
)
4308 unsigned mask
= 0, grsave
= 0;
4310 if (!in_procedure ("prologue"))
4312 if (unwind
.prologue
)
4314 as_bad (_(".prologue within prologue"));
4315 ignore_rest_of_line ();
4318 if (!unwind
.body
&& unwind
.insn
)
4319 as_warn (_("Initial .prologue should precede any instructions"));
4321 if (!is_it_end_of_statement ())
4324 int n
, sep
= parse_operand_and_eval (&e
, ',');
4326 if (e
.X_op
!= O_constant
4327 || e
.X_add_number
< 0
4328 || e
.X_add_number
> 0xf)
4329 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4330 else if (e
.X_add_number
== 0)
4331 as_warn (_("Pointless use of zero first operand to .prologue"));
4333 mask
= e
.X_add_number
;
4335 n
= popcount (mask
);
4338 parse_operand_and_eval (&e
, 0);
4342 if (e
.X_op
== O_constant
4343 && e
.X_add_number
>= 0
4344 && e
.X_add_number
< 128)
4346 if (md
.unwind_check
== unwind_check_error
)
4347 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4348 grsave
= e
.X_add_number
;
4350 else if (e
.X_op
!= O_register
4351 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4353 as_bad (_("Second operand to .prologue must be a general register"));
4356 else if (grsave
> 128U - n
)
4358 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4364 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4366 add_unwind_entry (output_prologue (), 0);
4368 unwind
.prologue
= 1;
4369 unwind
.prologue_mask
= mask
;
4370 unwind
.prologue_gr
= grsave
;
4372 ++unwind
.prologue_count
;
4376 dot_endp (int dummy ATTRIBUTE_UNUSED
)
4379 int bytes_per_address
;
4382 subsegT saved_subseg
;
4383 proc_pending
*pending
;
4384 int unwind_check
= md
.unwind_check
;
4386 md
.unwind_check
= unwind_check_error
;
4387 if (!in_procedure ("endp"))
4389 md
.unwind_check
= unwind_check
;
4391 if (unwind
.saved_text_seg
)
4393 saved_seg
= unwind
.saved_text_seg
;
4394 saved_subseg
= unwind
.saved_text_subseg
;
4395 unwind
.saved_text_seg
= NULL
;
4399 saved_seg
= now_seg
;
4400 saved_subseg
= now_subseg
;
4403 insn_group_break (1, 0, 0);
4405 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4407 generate_unwind_image (saved_seg
);
4409 if (unwind
.info
|| unwind
.force_unwind_entry
)
4413 subseg_set (md
.last_text_seg
, 0);
4414 proc_end
= expr_build_dot ();
4416 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4418 /* Make sure that section has 4 byte alignment for ILP32 and
4419 8 byte alignment for LP64. */
4420 record_alignment (now_seg
, md
.pointer_size_shift
);
4422 /* Need space for 3 pointers for procedure start, procedure end,
4424 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4425 where
= frag_now_fix () - (3 * md
.pointer_size
);
4426 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4428 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4429 e
.X_op
= O_pseudo_fixup
;
4430 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4432 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4433 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4435 = symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4436 symbol_get_frag (unwind
.proc_pending
.sym
),
4437 S_GET_VALUE (unwind
.proc_pending
.sym
));
4439 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4440 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
,
4443 e
.X_op
= O_pseudo_fixup
;
4444 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4446 e
.X_add_symbol
= proc_end
;
4447 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4448 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4452 e
.X_op
= O_pseudo_fixup
;
4453 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4455 e
.X_add_symbol
= unwind
.info
;
4456 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4457 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4460 subseg_set (saved_seg
, saved_subseg
);
4462 /* Set symbol sizes. */
4463 pending
= &unwind
.proc_pending
;
4464 if (S_GET_NAME (pending
->sym
))
4468 symbolS
*sym
= pending
->sym
;
4470 if (!S_IS_DEFINED (sym
))
4471 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4472 else if (S_GET_SIZE (sym
) == 0
4473 && symbol_get_obj (sym
)->size
== NULL
)
4475 fragS
*frag
= symbol_get_frag (sym
);
4479 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4480 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4483 symbol_get_obj (sym
)->size
= XNEW (expressionS
);
4484 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4485 symbol_get_obj (sym
)->size
->X_add_symbol
4486 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4487 frag_now
, frag_now_fix ());
4488 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4489 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4493 } while ((pending
= pending
->next
) != NULL
);
4496 /* Parse names of main and alternate entry points. */
4502 c
= get_symbol_name (&name
);
4503 p
= input_line_pointer
;
4505 (md
.unwind_check
== unwind_check_warning
4507 : as_bad
) (_("Empty argument of .endp"));
4510 symbolS
*sym
= symbol_find (name
);
4512 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4514 if (sym
== pending
->sym
)
4516 pending
->sym
= NULL
;
4520 if (!sym
|| !pending
)
4521 as_warn (_("`%s' was not specified with previous .proc"), name
);
4524 SKIP_WHITESPACE_AFTER_NAME ();
4525 if (*input_line_pointer
!= ',')
4527 ++input_line_pointer
;
4529 demand_empty_rest_of_line ();
4531 /* Deliberately only checking for the main entry point here; the
4532 language spec even says all arguments to .endp are ignored. */
4533 if (unwind
.proc_pending
.sym
4534 && S_GET_NAME (unwind
.proc_pending
.sym
)
4535 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4536 as_warn (_("`%s' should be an operand to this .endp"),
4537 S_GET_NAME (unwind
.proc_pending
.sym
));
4538 while (unwind
.proc_pending
.next
)
4540 pending
= unwind
.proc_pending
.next
;
4541 unwind
.proc_pending
.next
= pending
->next
;
4544 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4548 dot_template (int template_val
)
4550 CURR_SLOT
.user_template
= template_val
;
4554 dot_regstk (int dummy ATTRIBUTE_UNUSED
)
4556 int ins
, locs
, outs
, rots
;
4558 if (is_it_end_of_statement ())
4559 ins
= locs
= outs
= rots
= 0;
4562 ins
= get_absolute_expression ();
4563 if (*input_line_pointer
++ != ',')
4565 locs
= get_absolute_expression ();
4566 if (*input_line_pointer
++ != ',')
4568 outs
= get_absolute_expression ();
4569 if (*input_line_pointer
++ != ',')
4571 rots
= get_absolute_expression ();
4573 set_regstack (ins
, locs
, outs
, rots
);
4577 as_bad (_("Comma expected"));
4578 ignore_rest_of_line ();
4585 valueT num_alloced
= 0;
4586 struct dynreg
**drpp
, *dr
;
4587 int ch
, base_reg
= 0;
4593 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4594 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4595 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4599 /* First, remove existing names from hash table. */
4600 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4602 str_hash_delete (md
.dynreg_hash
, dr
->name
);
4603 /* FIXME: Free dr->name. */
4607 drpp
= &md
.dynreg
[type
];
4610 ch
= get_symbol_name (&start
);
4611 len
= strlen (ia64_canonicalize_symbol_name (start
));
4612 *input_line_pointer
= ch
;
4614 SKIP_WHITESPACE_AFTER_NAME ();
4615 if (*input_line_pointer
!= '[')
4617 as_bad (_("Expected '['"));
4620 ++input_line_pointer
; /* skip '[' */
4622 num_regs
= get_absolute_expression ();
4624 if (*input_line_pointer
++ != ']')
4626 as_bad (_("Expected ']'"));
4631 as_bad (_("Number of elements must be positive"));
4636 num_alloced
+= num_regs
;
4640 if (num_alloced
> md
.rot
.num_regs
)
4642 as_bad (_("Used more than the declared %d rotating registers"),
4648 if (num_alloced
> 96)
4650 as_bad (_("Used more than the available 96 rotating registers"));
4655 if (num_alloced
> 48)
4657 as_bad (_("Used more than the available 48 rotating registers"));
4668 *drpp
= XOBNEW (¬es
, struct dynreg
);
4669 memset (*drpp
, 0, sizeof (*dr
));
4672 name
= XOBNEWVEC (¬es
, char, len
+ 1);
4673 memcpy (name
, start
, len
);
4678 dr
->num_regs
= num_regs
;
4679 dr
->base
= base_reg
;
4681 base_reg
+= num_regs
;
4683 if (str_hash_insert (md
.dynreg_hash
, name
, dr
, 0) != NULL
)
4685 as_bad (_("Attempt to redefine register set `%s'"), name
);
4686 obstack_free (¬es
, name
);
4690 if (*input_line_pointer
!= ',')
4692 ++input_line_pointer
; /* skip comma */
4695 demand_empty_rest_of_line ();
4699 ignore_rest_of_line ();
4703 dot_byteorder (int byteorder
)
4705 segment_info_type
*seginfo
= seg_info (now_seg
);
4707 if (byteorder
== -1)
4709 if (seginfo
->tc_segment_info_data
.endian
== 0)
4710 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4711 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4714 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4716 if (target_big_endian
!= byteorder
)
4718 target_big_endian
= byteorder
;
4719 if (target_big_endian
)
4721 ia64_number_to_chars
= number_to_chars_bigendian
;
4722 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4726 ia64_number_to_chars
= number_to_chars_littleendian
;
4727 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4733 dot_psr (int dummy ATTRIBUTE_UNUSED
)
4740 ch
= get_symbol_name (&option
);
4741 if (strcmp (option
, "lsb") == 0)
4742 md
.flags
&= ~EF_IA_64_BE
;
4743 else if (strcmp (option
, "msb") == 0)
4744 md
.flags
|= EF_IA_64_BE
;
4745 else if (strcmp (option
, "abi32") == 0)
4746 md
.flags
&= ~EF_IA_64_ABI64
;
4747 else if (strcmp (option
, "abi64") == 0)
4748 md
.flags
|= EF_IA_64_ABI64
;
4750 as_bad (_("Unknown psr option `%s'"), option
);
4751 *input_line_pointer
= ch
;
4753 SKIP_WHITESPACE_AFTER_NAME ();
4754 if (*input_line_pointer
!= ',')
4757 ++input_line_pointer
;
4760 demand_empty_rest_of_line ();
4764 dot_ln (int dummy ATTRIBUTE_UNUSED
)
4766 new_logical_line (0, get_absolute_expression ());
4767 demand_empty_rest_of_line ();
4771 cross_section (int ref
, void (*builder
) (int), int ua
)
4774 int saved_auto_align
;
4775 unsigned int section_count
;
4780 start
= input_line_pointer
;
4781 c
= get_symbol_name (&name
);
4782 if (input_line_pointer
== start
)
4784 as_bad (_("Missing section name"));
4785 ignore_rest_of_line ();
4788 * input_line_pointer
= c
;
4789 SKIP_WHITESPACE_AFTER_NAME ();
4790 end
= input_line_pointer
;
4791 if (*input_line_pointer
!= ',')
4793 as_bad (_("Comma expected after section name"));
4794 ignore_rest_of_line ();
4798 end
= input_line_pointer
+ 1; /* skip comma */
4799 input_line_pointer
= start
;
4800 md
.keep_pending_output
= 1;
4801 section_count
= bfd_count_sections (stdoutput
);
4802 obj_elf_section (0);
4803 if (section_count
!= bfd_count_sections (stdoutput
))
4804 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
4805 input_line_pointer
= end
;
4806 saved_auto_align
= md
.auto_align
;
4811 md
.auto_align
= saved_auto_align
;
4812 obj_elf_previous (0);
4813 md
.keep_pending_output
= 0;
4817 dot_xdata (int size
)
4819 cross_section (size
, cons
, 0);
4822 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4825 stmt_float_cons (int kind
)
4845 do_align (alignment
, NULL
, 0, 0);
4850 stmt_cons_ua (int size
)
4852 int saved_auto_align
= md
.auto_align
;
4856 md
.auto_align
= saved_auto_align
;
4860 dot_xfloat_cons (int kind
)
4862 cross_section (kind
, stmt_float_cons
, 0);
4866 dot_xstringer (int zero
)
4868 cross_section (zero
, stringer
, 0);
4872 dot_xdata_ua (int size
)
4874 cross_section (size
, cons
, 1);
4878 dot_xfloat_cons_ua (int kind
)
4880 cross_section (kind
, float_cons
, 1);
4883 /* .reg.val <regname>,value */
4886 dot_reg_val (int dummy ATTRIBUTE_UNUSED
)
4890 expression_and_evaluate (®
);
4891 if (reg
.X_op
!= O_register
)
4893 as_bad (_("Register name expected"));
4894 ignore_rest_of_line ();
4896 else if (*input_line_pointer
++ != ',')
4898 as_bad (_("Comma expected"));
4899 ignore_rest_of_line ();
4903 valueT value
= get_absolute_expression ();
4904 int regno
= reg
.X_add_number
;
4905 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4906 as_warn (_("Register value annotation ignored"));
4909 gr_values
[regno
- REG_GR
].known
= 1;
4910 gr_values
[regno
- REG_GR
].value
= value
;
4911 gr_values
[regno
- REG_GR
].path
= md
.path
;
4914 demand_empty_rest_of_line ();
4919 .serialize.instruction
4922 dot_serialize (int type
)
4924 insn_group_break (0, 0, 0);
4926 instruction_serialization ();
4928 data_serialization ();
4929 insn_group_break (0, 0, 0);
4930 demand_empty_rest_of_line ();
4933 /* select dv checking mode
4938 A stop is inserted when changing modes
4942 dot_dv_mode (int type
)
4944 if (md
.manual_bundling
)
4945 as_warn (_("Directive invalid within a bundle"));
4947 if (type
== 'E' || type
== 'A')
4948 md
.mode_explicitly_set
= 0;
4950 md
.mode_explicitly_set
= 1;
4957 if (md
.explicit_mode
)
4958 insn_group_break (1, 0, 0);
4959 md
.explicit_mode
= 0;
4963 if (!md
.explicit_mode
)
4964 insn_group_break (1, 0, 0);
4965 md
.explicit_mode
= 1;
4969 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4970 insn_group_break (1, 0, 0);
4971 md
.explicit_mode
= md
.default_explicit_mode
;
4972 md
.mode_explicitly_set
= 0;
4978 print_prmask (valueT mask
)
4981 const char *comma
= "";
4982 for (regno
= 0; regno
< 64; regno
++)
4984 if (mask
& ((valueT
) 1 << regno
))
4986 fprintf (stderr
, "%s p%d", comma
, regno
);
4993 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
4994 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
4995 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
4996 .pred.safe_across_calls p1 [, p2 [,...]]
5000 dot_pred_rel (int type
)
5004 int p1
= -1, p2
= -1;
5008 if (*input_line_pointer
== '"')
5011 char *form
= demand_copy_C_string (&len
);
5013 if (strcmp (form
, "mutex") == 0)
5015 else if (strcmp (form
, "clear") == 0)
5017 else if (strcmp (form
, "imply") == 0)
5019 obstack_free (¬es
, form
);
5021 else if (*input_line_pointer
== '@')
5026 ++input_line_pointer
;
5027 c
= get_symbol_name (&form
);
5029 if (strcmp (form
, "mutex") == 0)
5031 else if (strcmp (form
, "clear") == 0)
5033 else if (strcmp (form
, "imply") == 0)
5035 (void) restore_line_pointer (c
);
5039 as_bad (_("Missing predicate relation type"));
5040 ignore_rest_of_line ();
5045 as_bad (_("Unrecognized predicate relation type"));
5046 ignore_rest_of_line ();
5049 if (*input_line_pointer
== ',')
5050 ++input_line_pointer
;
5058 expressionS pr
, *pr1
, *pr2
;
5060 sep
= parse_operand_and_eval (&pr
, ',');
5061 if (pr
.X_op
== O_register
5062 && pr
.X_add_number
>= REG_P
5063 && pr
.X_add_number
<= REG_P
+ 63)
5065 regno
= pr
.X_add_number
- REG_P
;
5073 else if (type
!= 'i'
5074 && pr
.X_op
== O_subtract
5075 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5076 && pr1
->X_op
== O_register
5077 && pr1
->X_add_number
>= REG_P
5078 && pr1
->X_add_number
<= REG_P
+ 63
5079 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5080 && pr2
->X_op
== O_register
5081 && pr2
->X_add_number
>= REG_P
5082 && pr2
->X_add_number
<= REG_P
+ 63)
5087 regno
= pr1
->X_add_number
- REG_P
;
5088 stop
= pr2
->X_add_number
- REG_P
;
5091 as_bad (_("Bad register range"));
5092 ignore_rest_of_line ();
5095 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5096 count
+= stop
- regno
+ 1;
5100 as_bad (_("Predicate register expected"));
5101 ignore_rest_of_line ();
5105 as_warn (_("Duplicate predicate register ignored"));
5116 clear_qp_mutex (mask
);
5117 clear_qp_implies (mask
, (valueT
) 0);
5120 if (count
!= 2 || p1
== -1 || p2
== -1)
5121 as_bad (_("Predicate source and target required"));
5122 else if (p1
== 0 || p2
== 0)
5123 as_bad (_("Use of p0 is not valid in this context"));
5125 add_qp_imply (p1
, p2
);
5130 as_bad (_("At least two PR arguments expected"));
5135 as_bad (_("Use of p0 is not valid in this context"));
5138 add_qp_mutex (mask
);
5141 /* note that we don't override any existing relations */
5144 as_bad (_("At least one PR argument expected"));
5149 fprintf (stderr
, "Safe across calls: ");
5150 print_prmask (mask
);
5151 fprintf (stderr
, "\n");
5153 qp_safe_across_calls
= mask
;
5156 demand_empty_rest_of_line ();
5159 /* .entry label [, label [, ...]]
5160 Hint to DV code that the given labels are to be considered entry points.
5161 Otherwise, only global labels are considered entry points. */
5164 dot_entry (int dummy ATTRIBUTE_UNUSED
)
5172 c
= get_symbol_name (&name
);
5173 symbolP
= symbol_find_or_make (name
);
5175 if (str_hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), symbolP
, 0))
5176 as_bad (_("duplicate entry hint %s"), name
);
5178 *input_line_pointer
= c
;
5179 SKIP_WHITESPACE_AFTER_NAME ();
5180 c
= *input_line_pointer
;
5183 input_line_pointer
++;
5185 if (*input_line_pointer
== '\n')
5191 demand_empty_rest_of_line ();
5194 /* .mem.offset offset, base
5195 "base" is used to distinguish between offsets from a different base. */
5198 dot_mem_offset (int dummy ATTRIBUTE_UNUSED
)
5200 md
.mem_offset
.hint
= 1;
5201 md
.mem_offset
.offset
= get_absolute_expression ();
5202 if (*input_line_pointer
!= ',')
5204 as_bad (_("Comma expected"));
5205 ignore_rest_of_line ();
5208 ++input_line_pointer
;
5209 md
.mem_offset
.base
= get_absolute_expression ();
5210 demand_empty_rest_of_line ();
5213 /* ia64-specific pseudo-ops: */
5214 const pseudo_typeS md_pseudo_table
[] =
5216 { "radix", dot_radix
, 0 },
5217 { "lcomm", s_lcomm_bytes
, 1 },
5218 { "loc", dot_loc
, 0 },
5219 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5220 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5221 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5222 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5223 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5224 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5225 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5226 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5227 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5228 { "proc", dot_proc
, 0 },
5229 { "body", dot_body
, 0 },
5230 { "prologue", dot_prologue
, 0 },
5231 { "endp", dot_endp
, 0 },
5233 { "fframe", dot_fframe
, 0 },
5234 { "vframe", dot_vframe
, 0 },
5235 { "vframesp", dot_vframesp
, 0 },
5236 { "vframepsp", dot_vframesp
, 1 },
5237 { "save", dot_save
, 0 },
5238 { "restore", dot_restore
, 0 },
5239 { "restorereg", dot_restorereg
, 0 },
5240 { "restorereg.p", dot_restorereg
, 1 },
5241 { "handlerdata", dot_handlerdata
, 0 },
5242 { "unwentry", dot_unwentry
, 0 },
5243 { "altrp", dot_altrp
, 0 },
5244 { "savesp", dot_savemem
, 0 },
5245 { "savepsp", dot_savemem
, 1 },
5246 { "save.g", dot_saveg
, 0 },
5247 { "save.f", dot_savef
, 0 },
5248 { "save.b", dot_saveb
, 0 },
5249 { "save.gf", dot_savegf
, 0 },
5250 { "spill", dot_spill
, 0 },
5251 { "spillreg", dot_spillreg
, 0 },
5252 { "spillsp", dot_spillmem
, 0 },
5253 { "spillpsp", dot_spillmem
, 1 },
5254 { "spillreg.p", dot_spillreg
, 1 },
5255 { "spillsp.p", dot_spillmem
, ~0 },
5256 { "spillpsp.p", dot_spillmem
, ~1 },
5257 { "label_state", dot_label_state
, 0 },
5258 { "copy_state", dot_copy_state
, 0 },
5259 { "unwabi", dot_unwabi
, 0 },
5260 { "personality", dot_personality
, 0 },
5261 { "mii", dot_template
, 0x0 },
5262 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5263 { "mlx", dot_template
, 0x2 },
5264 { "mmi", dot_template
, 0x4 },
5265 { "mfi", dot_template
, 0x6 },
5266 { "mmf", dot_template
, 0x7 },
5267 { "mib", dot_template
, 0x8 },
5268 { "mbb", dot_template
, 0x9 },
5269 { "bbb", dot_template
, 0xb },
5270 { "mmb", dot_template
, 0xc },
5271 { "mfb", dot_template
, 0xe },
5272 { "align", dot_align
, 0 },
5273 { "regstk", dot_regstk
, 0 },
5274 { "rotr", dot_rot
, DYNREG_GR
},
5275 { "rotf", dot_rot
, DYNREG_FR
},
5276 { "rotp", dot_rot
, DYNREG_PR
},
5277 { "lsb", dot_byteorder
, 0 },
5278 { "msb", dot_byteorder
, 1 },
5279 { "psr", dot_psr
, 0 },
5280 { "alias", dot_alias
, 0 },
5281 { "secalias", dot_alias
, 1 },
5282 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5284 { "xdata1", dot_xdata
, 1 },
5285 { "xdata2", dot_xdata
, 2 },
5286 { "xdata4", dot_xdata
, 4 },
5287 { "xdata8", dot_xdata
, 8 },
5288 { "xdata16", dot_xdata
, 16 },
5289 { "xreal4", dot_xfloat_cons
, 'f' },
5290 { "xreal8", dot_xfloat_cons
, 'd' },
5291 { "xreal10", dot_xfloat_cons
, 'x' },
5292 { "xreal16", dot_xfloat_cons
, 'X' },
5293 { "xstring", dot_xstringer
, 8 + 0 },
5294 { "xstringz", dot_xstringer
, 8 + 1 },
5296 /* unaligned versions: */
5297 { "xdata2.ua", dot_xdata_ua
, 2 },
5298 { "xdata4.ua", dot_xdata_ua
, 4 },
5299 { "xdata8.ua", dot_xdata_ua
, 8 },
5300 { "xdata16.ua", dot_xdata_ua
, 16 },
5301 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5302 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5303 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5304 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5306 /* annotations/DV checking support */
5307 { "entry", dot_entry
, 0 },
5308 { "mem.offset", dot_mem_offset
, 0 },
5309 { "pred.rel", dot_pred_rel
, 0 },
5310 { "pred.rel.clear", dot_pred_rel
, 'c' },
5311 { "pred.rel.imply", dot_pred_rel
, 'i' },
5312 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5313 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5314 { "reg.val", dot_reg_val
, 0 },
5315 { "serialize.data", dot_serialize
, 0 },
5316 { "serialize.instruction", dot_serialize
, 1 },
5317 { "auto", dot_dv_mode
, 'a' },
5318 { "explicit", dot_dv_mode
, 'e' },
5319 { "default", dot_dv_mode
, 'd' },
5321 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5322 IA-64 aligns data allocation pseudo-ops by default, so we have to
5323 tell it that these ones are supposed to be unaligned. Long term,
5324 should rewrite so that only IA-64 specific data allocation pseudo-ops
5325 are aligned by default. */
5326 {"2byte", stmt_cons_ua
, 2},
5327 {"4byte", stmt_cons_ua
, 4},
5328 {"8byte", stmt_cons_ua
, 8},
5331 {"vms_common", obj_elf_vms_common
, 0},
5337 static const struct pseudo_opcode
5340 void (*handler
) (int);
5345 /* these are more like pseudo-ops, but don't start with a dot */
5346 { "data1", cons
, 1 },
5347 { "data2", cons
, 2 },
5348 { "data4", cons
, 4 },
5349 { "data8", cons
, 8 },
5350 { "data16", cons
, 16 },
5351 { "real4", stmt_float_cons
, 'f' },
5352 { "real8", stmt_float_cons
, 'd' },
5353 { "real10", stmt_float_cons
, 'x' },
5354 { "real16", stmt_float_cons
, 'X' },
5355 { "string", stringer
, 8 + 0 },
5356 { "stringz", stringer
, 8 + 1 },
5358 /* unaligned versions: */
5359 { "data2.ua", stmt_cons_ua
, 2 },
5360 { "data4.ua", stmt_cons_ua
, 4 },
5361 { "data8.ua", stmt_cons_ua
, 8 },
5362 { "data16.ua", stmt_cons_ua
, 16 },
5363 { "real4.ua", float_cons
, 'f' },
5364 { "real8.ua", float_cons
, 'd' },
5365 { "real10.ua", float_cons
, 'x' },
5366 { "real16.ua", float_cons
, 'X' },
5369 /* Declare a register by creating a symbol for it and entering it in
5370 the symbol table. */
5373 declare_register (const char *name
, unsigned int regnum
)
5377 sym
= symbol_create (name
, reg_section
, &zero_address_frag
, regnum
);
5379 if (str_hash_insert (md
.reg_hash
, S_GET_NAME (sym
), sym
, 0) != NULL
)
5380 as_fatal (_("duplicate %s"), name
);
5386 declare_register_set (const char *prefix
,
5387 unsigned int num_regs
,
5388 unsigned int base_regnum
)
5393 for (i
= 0; i
< num_regs
; ++i
)
5395 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5396 declare_register (name
, base_regnum
+ i
);
5401 operand_width (enum ia64_opnd opnd
)
5403 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5404 unsigned int bits
= 0;
5408 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5409 bits
+= odesc
->field
[i
].bits
;
5414 static enum operand_match_result
5415 operand_match (const struct ia64_opcode
*idesc
, int res_index
, expressionS
*e
)
5417 enum ia64_opnd opnd
= idesc
->operands
[res_index
];
5418 int bits
, relocatable
= 0;
5419 struct insn_fix
*fix
;
5426 case IA64_OPND_AR_CCV
:
5427 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5428 return OPERAND_MATCH
;
5431 case IA64_OPND_AR_CSD
:
5432 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5433 return OPERAND_MATCH
;
5436 case IA64_OPND_AR_PFS
:
5437 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5438 return OPERAND_MATCH
;
5442 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5443 return OPERAND_MATCH
;
5447 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5448 return OPERAND_MATCH
;
5452 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5453 return OPERAND_MATCH
;
5456 case IA64_OPND_PR_ROT
:
5457 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5458 return OPERAND_MATCH
;
5462 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5463 return OPERAND_MATCH
;
5466 case IA64_OPND_PSR_L
:
5467 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5468 return OPERAND_MATCH
;
5471 case IA64_OPND_PSR_UM
:
5472 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5473 return OPERAND_MATCH
;
5477 if (e
->X_op
== O_constant
)
5479 if (e
->X_add_number
== 1)
5480 return OPERAND_MATCH
;
5482 return OPERAND_OUT_OF_RANGE
;
5487 if (e
->X_op
== O_constant
)
5489 if (e
->X_add_number
== 8)
5490 return OPERAND_MATCH
;
5492 return OPERAND_OUT_OF_RANGE
;
5497 if (e
->X_op
== O_constant
)
5499 if (e
->X_add_number
== 16)
5500 return OPERAND_MATCH
;
5502 return OPERAND_OUT_OF_RANGE
;
5506 /* register operands: */
5509 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5510 && e
->X_add_number
< REG_AR
+ 128)
5511 return OPERAND_MATCH
;
5516 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5517 && e
->X_add_number
< REG_BR
+ 8)
5518 return OPERAND_MATCH
;
5522 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5523 && e
->X_add_number
< REG_CR
+ 128)
5524 return OPERAND_MATCH
;
5527 case IA64_OPND_DAHR3
:
5528 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_DAHR
5529 && e
->X_add_number
< REG_DAHR
+ 8)
5530 return OPERAND_MATCH
;
5537 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5538 && e
->X_add_number
< REG_FR
+ 128)
5539 return OPERAND_MATCH
;
5544 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5545 && e
->X_add_number
< REG_P
+ 64)
5546 return OPERAND_MATCH
;
5552 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5553 && e
->X_add_number
< REG_GR
+ 128)
5554 return OPERAND_MATCH
;
5557 case IA64_OPND_R3_2
:
5558 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5560 if (e
->X_add_number
< REG_GR
+ 4)
5561 return OPERAND_MATCH
;
5562 else if (e
->X_add_number
< REG_GR
+ 128)
5563 return OPERAND_OUT_OF_RANGE
;
5567 /* indirect operands: */
5568 case IA64_OPND_CPUID_R3
:
5569 case IA64_OPND_DBR_R3
:
5570 case IA64_OPND_DTR_R3
:
5571 case IA64_OPND_ITR_R3
:
5572 case IA64_OPND_IBR_R3
:
5573 case IA64_OPND_MSR_R3
:
5574 case IA64_OPND_PKR_R3
:
5575 case IA64_OPND_PMC_R3
:
5576 case IA64_OPND_PMD_R3
:
5577 case IA64_OPND_DAHR_R3
:
5578 case IA64_OPND_RR_R3
:
5579 if (e
->X_op
== O_index
&& e
->X_op_symbol
5580 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5581 == opnd
- IA64_OPND_CPUID_R3
))
5582 return OPERAND_MATCH
;
5586 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5587 return OPERAND_MATCH
;
5590 /* immediate operands: */
5591 case IA64_OPND_CNT2a
:
5592 case IA64_OPND_LEN4
:
5593 case IA64_OPND_LEN6
:
5594 bits
= operand_width (idesc
->operands
[res_index
]);
5595 if (e
->X_op
== O_constant
)
5597 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5598 return OPERAND_MATCH
;
5600 return OPERAND_OUT_OF_RANGE
;
5604 case IA64_OPND_CNT2b
:
5605 if (e
->X_op
== O_constant
)
5607 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5608 return OPERAND_MATCH
;
5610 return OPERAND_OUT_OF_RANGE
;
5614 case IA64_OPND_CNT2c
:
5615 val
= e
->X_add_number
;
5616 if (e
->X_op
== O_constant
)
5618 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5619 return OPERAND_MATCH
;
5621 return OPERAND_OUT_OF_RANGE
;
5626 /* SOR must be an integer multiple of 8 */
5627 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5628 return OPERAND_OUT_OF_RANGE
;
5632 if (e
->X_op
== O_constant
)
5634 if ((bfd_vma
) e
->X_add_number
<= 96)
5635 return OPERAND_MATCH
;
5637 return OPERAND_OUT_OF_RANGE
;
5641 case IA64_OPND_IMMU62
:
5642 if (e
->X_op
== O_constant
)
5644 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5645 return OPERAND_MATCH
;
5647 return OPERAND_OUT_OF_RANGE
;
5651 /* FIXME -- need 62-bit relocation type */
5652 as_bad (_("62-bit relocation not yet implemented"));
5656 case IA64_OPND_IMMU64
:
5657 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5658 || e
->X_op
== O_subtract
)
5660 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5661 fix
->code
= BFD_RELOC_IA64_IMM64
;
5662 if (e
->X_op
!= O_subtract
)
5664 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5665 if (e
->X_op
== O_pseudo_fixup
)
5669 fix
->opnd
= idesc
->operands
[res_index
];
5672 ++CURR_SLOT
.num_fixups
;
5673 return OPERAND_MATCH
;
5675 else if (e
->X_op
== O_constant
)
5676 return OPERAND_MATCH
;
5679 case IA64_OPND_IMMU5b
:
5680 if (e
->X_op
== O_constant
)
5682 val
= e
->X_add_number
;
5683 if (val
>= 32 && val
<= 63)
5684 return OPERAND_MATCH
;
5686 return OPERAND_OUT_OF_RANGE
;
5690 case IA64_OPND_CCNT5
:
5691 case IA64_OPND_CNT5
:
5692 case IA64_OPND_CNT6
:
5693 case IA64_OPND_CPOS6a
:
5694 case IA64_OPND_CPOS6b
:
5695 case IA64_OPND_CPOS6c
:
5696 case IA64_OPND_IMMU2
:
5697 case IA64_OPND_IMMU7a
:
5698 case IA64_OPND_IMMU7b
:
5699 case IA64_OPND_IMMU16
:
5700 case IA64_OPND_IMMU19
:
5701 case IA64_OPND_IMMU21
:
5702 case IA64_OPND_IMMU24
:
5703 case IA64_OPND_MBTYPE4
:
5704 case IA64_OPND_MHTYPE8
:
5705 case IA64_OPND_POS6
:
5706 bits
= operand_width (idesc
->operands
[res_index
]);
5707 if (e
->X_op
== O_constant
)
5709 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5710 return OPERAND_MATCH
;
5712 return OPERAND_OUT_OF_RANGE
;
5716 case IA64_OPND_IMMU9
:
5717 bits
= operand_width (idesc
->operands
[res_index
]);
5718 if (e
->X_op
== O_constant
)
5720 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5722 int lobits
= e
->X_add_number
& 0x3;
5723 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5724 e
->X_add_number
|= (bfd_vma
) 0x3;
5725 return OPERAND_MATCH
;
5728 return OPERAND_OUT_OF_RANGE
;
5732 case IA64_OPND_IMM44
:
5733 /* least 16 bits must be zero */
5734 if ((e
->X_add_number
& 0xffff) != 0)
5735 /* XXX technically, this is wrong: we should not be issuing warning
5736 messages until we're sure this instruction pattern is going to
5738 as_warn (_("lower 16 bits of mask ignored"));
5740 if (e
->X_op
== O_constant
)
5742 if (((e
->X_add_number
>= 0
5743 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5744 || (e
->X_add_number
< 0
5745 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5748 if (e
->X_add_number
>= 0
5749 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5751 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5753 return OPERAND_MATCH
;
5756 return OPERAND_OUT_OF_RANGE
;
5760 case IA64_OPND_IMM17
:
5761 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5762 if (e
->X_op
== O_constant
)
5764 if (((e
->X_add_number
>= 0
5765 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5766 || (e
->X_add_number
< 0
5767 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5770 if (e
->X_add_number
>= 0
5771 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5773 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5775 return OPERAND_MATCH
;
5778 return OPERAND_OUT_OF_RANGE
;
5782 case IA64_OPND_IMM14
:
5783 case IA64_OPND_IMM22
:
5786 case IA64_OPND_IMM1
:
5787 case IA64_OPND_IMM8
:
5788 case IA64_OPND_IMM8U4
:
5789 case IA64_OPND_IMM8M1
:
5790 case IA64_OPND_IMM8M1U4
:
5791 case IA64_OPND_IMM8M1U8
:
5792 case IA64_OPND_IMM9a
:
5793 case IA64_OPND_IMM9b
:
5794 bits
= operand_width (idesc
->operands
[res_index
]);
5795 if (relocatable
&& (e
->X_op
== O_symbol
5796 || e
->X_op
== O_subtract
5797 || e
->X_op
== O_pseudo_fixup
))
5799 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5801 if (idesc
->operands
[res_index
] == IA64_OPND_IMM14
)
5802 fix
->code
= BFD_RELOC_IA64_IMM14
;
5804 fix
->code
= BFD_RELOC_IA64_IMM22
;
5806 if (e
->X_op
!= O_subtract
)
5808 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5809 if (e
->X_op
== O_pseudo_fixup
)
5813 fix
->opnd
= idesc
->operands
[res_index
];
5816 ++CURR_SLOT
.num_fixups
;
5817 return OPERAND_MATCH
;
5819 else if (e
->X_op
!= O_constant
5820 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5821 return OPERAND_MISMATCH
;
5823 if (opnd
== IA64_OPND_IMM8M1U4
)
5825 /* Zero is not valid for unsigned compares that take an adjusted
5826 constant immediate range. */
5827 if (e
->X_add_number
== 0)
5828 return OPERAND_OUT_OF_RANGE
;
5830 /* Sign-extend 32-bit unsigned numbers, so that the following range
5831 checks will work. */
5832 val
= e
->X_add_number
;
5833 if ((val
& (~(bfd_vma
) 0 << 32)) == 0)
5834 val
= (val
^ ((bfd_vma
) 1 << 31)) - ((bfd_vma
) 1 << 31);
5836 /* Check for 0x100000000. This is valid because
5837 0x100000000-1 is the same as ((uint32_t) -1). */
5838 if (val
== ((bfd_signed_vma
) 1 << 32))
5839 return OPERAND_MATCH
;
5843 else if (opnd
== IA64_OPND_IMM8M1U8
)
5845 /* Zero is not valid for unsigned compares that take an adjusted
5846 constant immediate range. */
5847 if (e
->X_add_number
== 0)
5848 return OPERAND_OUT_OF_RANGE
;
5850 /* Check for 0x10000000000000000. */
5851 if (e
->X_op
== O_big
)
5853 if (generic_bignum
[0] == 0
5854 && generic_bignum
[1] == 0
5855 && generic_bignum
[2] == 0
5856 && generic_bignum
[3] == 0
5857 && generic_bignum
[4] == 1)
5858 return OPERAND_MATCH
;
5860 return OPERAND_OUT_OF_RANGE
;
5863 val
= e
->X_add_number
- 1;
5865 else if (opnd
== IA64_OPND_IMM8M1
)
5866 val
= e
->X_add_number
- 1;
5867 else if (opnd
== IA64_OPND_IMM8U4
)
5869 /* Sign-extend 32-bit unsigned numbers, so that the following range
5870 checks will work. */
5871 val
= e
->X_add_number
;
5872 if ((val
& (~(bfd_vma
) 0 << 32)) == 0)
5873 val
= (val
^ ((bfd_vma
) 1 << 31)) - ((bfd_vma
) 1 << 31);
5876 val
= e
->X_add_number
;
5878 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5879 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5880 return OPERAND_MATCH
;
5882 return OPERAND_OUT_OF_RANGE
;
5884 case IA64_OPND_INC3
:
5885 /* +/- 1, 4, 8, 16 */
5886 val
= e
->X_add_number
;
5889 if (e
->X_op
== O_constant
)
5891 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5892 return OPERAND_MATCH
;
5894 return OPERAND_OUT_OF_RANGE
;
5898 case IA64_OPND_TGT25
:
5899 case IA64_OPND_TGT25b
:
5900 case IA64_OPND_TGT25c
:
5901 case IA64_OPND_TGT64
:
5902 if (e
->X_op
== O_symbol
)
5904 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5905 if (opnd
== IA64_OPND_TGT25
)
5906 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5907 else if (opnd
== IA64_OPND_TGT25b
)
5908 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5909 else if (opnd
== IA64_OPND_TGT25c
)
5910 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5911 else if (opnd
== IA64_OPND_TGT64
)
5912 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5916 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5917 fix
->opnd
= idesc
->operands
[res_index
];
5920 ++CURR_SLOT
.num_fixups
;
5921 return OPERAND_MATCH
;
5924 case IA64_OPND_TAG13
:
5925 case IA64_OPND_TAG13b
:
5929 return OPERAND_MATCH
;
5932 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5933 /* There are no external relocs for TAG13/TAG13b fields, so we
5934 create a dummy reloc. This will not live past md_apply_fix. */
5935 fix
->code
= BFD_RELOC_UNUSED
;
5936 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5937 fix
->opnd
= idesc
->operands
[res_index
];
5940 ++CURR_SLOT
.num_fixups
;
5941 return OPERAND_MATCH
;
5948 case IA64_OPND_LDXMOV
:
5949 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5950 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5951 fix
->opnd
= idesc
->operands
[res_index
];
5954 ++CURR_SLOT
.num_fixups
;
5955 return OPERAND_MATCH
;
5957 case IA64_OPND_STRD5b
:
5958 if (e
->X_op
== O_constant
)
5960 /* 5-bit signed scaled by 64 */
5961 if ((e
->X_add_number
<= ( 0xf << 6 ))
5962 && (e
->X_add_number
>= -( 0x10 << 6 )))
5965 /* Must be a multiple of 64 */
5966 if ((e
->X_add_number
& 0x3f) != 0)
5967 as_warn (_("stride must be a multiple of 64; lower 6 bits ignored"));
5969 e
->X_add_number
&= ~ 0x3f;
5970 return OPERAND_MATCH
;
5973 return OPERAND_OUT_OF_RANGE
;
5976 case IA64_OPND_CNT6a
:
5977 if (e
->X_op
== O_constant
)
5979 /* 6-bit unsigned biased by 1 -- count 0 is meaningless */
5980 if ((e
->X_add_number
<= 64)
5981 && (e
->X_add_number
> 0) )
5983 return OPERAND_MATCH
;
5986 return OPERAND_OUT_OF_RANGE
;
5993 return OPERAND_MISMATCH
;
5997 parse_operand (expressionS
*e
, int more
)
6001 memset (e
, 0, sizeof (*e
));
6005 sep
= *input_line_pointer
;
6006 if (more
&& (sep
== ',' || sep
== more
))
6007 ++input_line_pointer
;
6012 parse_operand_and_eval (expressionS
*e
, int more
)
6014 int sep
= parse_operand (e
, more
);
6015 resolve_expression (e
);
6020 parse_operand_maybe_eval (expressionS
*e
, int more
, enum ia64_opnd op
)
6022 int sep
= parse_operand (e
, more
);
6025 case IA64_OPND_IMM14
:
6026 case IA64_OPND_IMM22
:
6027 case IA64_OPND_IMMU64
:
6028 case IA64_OPND_TGT25
:
6029 case IA64_OPND_TGT25b
:
6030 case IA64_OPND_TGT25c
:
6031 case IA64_OPND_TGT64
:
6032 case IA64_OPND_TAG13
:
6033 case IA64_OPND_TAG13b
:
6034 case IA64_OPND_LDXMOV
:
6037 resolve_expression (e
);
6043 /* Returns the next entry in the opcode table that matches the one in
6044 IDESC, and frees the entry in IDESC. If no matching entry is
6045 found, NULL is returned instead. */
6047 static struct ia64_opcode
*
6048 get_next_opcode (struct ia64_opcode
*idesc
)
6050 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6051 ia64_free_opcode (idesc
);
6055 /* Parse the operands for the opcode and find the opcode variant that
6056 matches the specified operands, or NULL if no match is possible. */
6058 static struct ia64_opcode
*
6059 parse_operands (struct ia64_opcode
*idesc
)
6061 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6062 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6065 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6066 enum operand_match_result result
;
6068 char *first_arg
= 0, *end
, *saved_input_pointer
;
6071 gas_assert (strlen (idesc
->name
) <= 128);
6073 strcpy (mnemonic
, idesc
->name
);
6074 if (idesc
->operands
[2] == IA64_OPND_SOF
6075 || idesc
->operands
[1] == IA64_OPND_SOF
)
6077 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6078 can't parse the first operand until we have parsed the
6079 remaining operands of the "alloc" instruction. */
6081 first_arg
= input_line_pointer
;
6082 end
= strchr (input_line_pointer
, '=');
6085 as_bad (_("Expected separator `='"));
6088 input_line_pointer
= end
+ 1;
6095 if (i
< NELEMS (CURR_SLOT
.opnd
))
6097 enum ia64_opnd op
= IA64_OPND_NIL
;
6098 if (i
< NELEMS (idesc
->operands
))
6099 op
= idesc
->operands
[i
];
6100 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ i
, '=', op
);
6101 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6108 sep
= parse_operand (&dummy
, '=');
6109 if (dummy
.X_op
== O_absent
)
6115 if (sep
!= '=' && sep
!= ',')
6120 if (num_outputs
> 0)
6121 as_bad (_("Duplicate equal sign (=) in instruction"));
6123 num_outputs
= i
+ 1;
6128 as_bad (_("Illegal operand separator `%c'"), sep
);
6132 if (idesc
->operands
[2] == IA64_OPND_SOF
6133 || idesc
->operands
[1] == IA64_OPND_SOF
)
6135 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6136 Note, however, that due to that mapping operand numbers in error
6137 messages for any of the constant operands will not be correct. */
6138 know (strcmp (idesc
->name
, "alloc") == 0);
6139 /* The first operand hasn't been parsed/initialized, yet (but
6140 num_operands intentionally doesn't account for that). */
6141 i
= num_operands
> 4 ? 2 : 1;
6142 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6143 ? CURR_SLOT.opnd[n].X_add_number \
6145 sof
= set_regstack (FORCE_CONST(i
),
6148 FORCE_CONST(i
+ 3));
6151 /* now we can parse the first arg: */
6152 saved_input_pointer
= input_line_pointer
;
6153 input_line_pointer
= first_arg
;
6154 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ 0, '=',
6155 idesc
->operands
[0]);
6157 --num_outputs
; /* force error */
6158 input_line_pointer
= saved_input_pointer
;
6160 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6161 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6162 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6163 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6164 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6166 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6167 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6170 highest_unmatched_operand
= -4;
6171 curr_out_of_range_pos
= -1;
6173 for (; idesc
; idesc
= get_next_opcode (idesc
))
6175 if (num_outputs
!= idesc
->num_outputs
)
6176 continue; /* mismatch in # of outputs */
6177 if (highest_unmatched_operand
< 0)
6178 highest_unmatched_operand
|= 1;
6179 if (num_operands
> NELEMS (idesc
->operands
)
6180 || (num_operands
< NELEMS (idesc
->operands
)
6181 && idesc
->operands
[num_operands
])
6182 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6183 continue; /* mismatch in number of arguments */
6184 if (highest_unmatched_operand
< 0)
6185 highest_unmatched_operand
|= 2;
6187 CURR_SLOT
.num_fixups
= 0;
6189 /* Try to match all operands. If we see an out-of-range operand,
6190 then continue trying to match the rest of the operands, since if
6191 the rest match, then this idesc will give the best error message. */
6193 out_of_range_pos
= -1;
6194 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6196 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6197 if (result
!= OPERAND_MATCH
)
6199 if (result
!= OPERAND_OUT_OF_RANGE
)
6201 if (out_of_range_pos
< 0)
6202 /* remember position of the first out-of-range operand: */
6203 out_of_range_pos
= i
;
6207 /* If we did not match all operands, or if at least one operand was
6208 out-of-range, then this idesc does not match. Keep track of which
6209 idesc matched the most operands before failing. If we have two
6210 idescs that failed at the same position, and one had an out-of-range
6211 operand, then prefer the out-of-range operand. Thus if we have
6212 "add r0=0x1000000,r1" we get an error saying the constant is out
6213 of range instead of an error saying that the constant should have been
6216 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6218 if (i
> highest_unmatched_operand
6219 || (i
== highest_unmatched_operand
6220 && out_of_range_pos
> curr_out_of_range_pos
))
6222 highest_unmatched_operand
= i
;
6223 if (out_of_range_pos
>= 0)
6225 expected_operand
= idesc
->operands
[out_of_range_pos
];
6226 error_pos
= out_of_range_pos
;
6230 expected_operand
= idesc
->operands
[i
];
6233 curr_out_of_range_pos
= out_of_range_pos
;
6242 if (expected_operand
)
6243 as_bad (_("Operand %u of `%s' should be %s"),
6244 error_pos
+ 1, mnemonic
,
6245 elf64_ia64_operands
[expected_operand
].desc
);
6246 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6247 as_bad (_("Wrong number of output operands"));
6248 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6249 as_bad (_("Wrong number of input operands"));
6251 as_bad (_("Operand mismatch"));
6255 /* Check that the instruction doesn't use
6256 - r0, f0, or f1 as output operands
6257 - the same predicate twice as output operands
6258 - r0 as address of a base update load or store
6259 - the same GR as output and address of a base update load
6260 - two even- or two odd-numbered FRs as output operands of a floating
6261 point parallel load.
6262 At most two (conflicting) output (or output-like) operands can exist,
6263 (floating point parallel loads have three outputs, but the base register,
6264 if updated, cannot conflict with the actual outputs). */
6266 for (i
= 0; i
< num_operands
; ++i
)
6271 switch (idesc
->operands
[i
])
6276 if (i
< num_outputs
)
6278 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6281 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6283 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6288 if (i
< num_outputs
)
6291 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6293 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6300 if (i
< num_outputs
)
6302 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6303 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6306 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6309 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6311 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6315 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6317 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6320 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6322 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6333 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6336 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6342 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6347 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6352 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6360 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6362 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6363 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6364 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6365 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6366 && ! ((reg1
^ reg2
) & 1))
6367 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6368 reg1
- REG_FR
, reg2
- REG_FR
);
6369 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6370 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6371 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6372 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6373 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6374 reg1
- REG_FR
, reg2
- REG_FR
);
6379 build_insn (struct slot
*slot
, bfd_vma
*insnp
)
6381 const struct ia64_operand
*odesc
, *o2desc
;
6382 struct ia64_opcode
*idesc
= slot
->idesc
;
6388 insn
= idesc
->opcode
| slot
->qp_regno
;
6390 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6392 if (slot
->opnd
[i
].X_op
== O_register
6393 || slot
->opnd
[i
].X_op
== O_constant
6394 || slot
->opnd
[i
].X_op
== O_index
)
6395 val
= slot
->opnd
[i
].X_add_number
;
6396 else if (slot
->opnd
[i
].X_op
== O_big
)
6398 /* This must be the value 0x10000000000000000. */
6399 gas_assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6405 switch (idesc
->operands
[i
])
6407 case IA64_OPND_IMMU64
:
6408 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6409 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6410 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6411 | (((val
>> 63) & 0x1) << 36));
6414 case IA64_OPND_IMMU62
:
6415 val
&= 0x3fffffffffffffffULL
;
6416 if (val
!= slot
->opnd
[i
].X_add_number
)
6417 as_warn (_("Value truncated to 62 bits"));
6418 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6419 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6422 case IA64_OPND_TGT64
:
6424 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6425 insn
|= ((((val
>> 59) & 0x1) << 36)
6426 | (((val
>> 0) & 0xfffff) << 13));
6442 case IA64_OPND_DAHR3
:
6461 case IA64_OPND_R3_2
:
6462 case IA64_OPND_CPUID_R3
:
6463 case IA64_OPND_DBR_R3
:
6464 case IA64_OPND_DTR_R3
:
6465 case IA64_OPND_ITR_R3
:
6466 case IA64_OPND_IBR_R3
:
6468 case IA64_OPND_MSR_R3
:
6469 case IA64_OPND_PKR_R3
:
6470 case IA64_OPND_PMC_R3
:
6471 case IA64_OPND_PMD_R3
:
6472 case IA64_OPND_DAHR_R3
:
6473 case IA64_OPND_RR_R3
:
6481 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6482 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6484 as_bad_where (slot
->src_file
, slot
->src_line
,
6485 _("Bad operand value: %s"), err
);
6486 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6488 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6489 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6491 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6492 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6494 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6495 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6496 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6498 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6499 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6507 emit_one_bundle (void)
6509 int manual_bundling_off
= 0, manual_bundling
= 0;
6510 enum ia64_unit required_unit
, insn_unit
= 0;
6511 enum ia64_insn_type type
[3], insn_type
;
6512 unsigned int template_val
, orig_template
;
6513 bfd_vma insn
[3] = { -1, -1, -1 };
6514 struct ia64_opcode
*idesc
;
6515 int end_of_insn_group
= 0, user_template
= -1;
6516 int n
, i
, j
, first
, curr
, last_slot
;
6517 bfd_vma t0
= 0, t1
= 0;
6518 struct label_fix
*lfix
;
6520 struct insn_fix
*ifix
;
6526 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6527 know (first
>= 0 && first
< NUM_SLOTS
);
6528 n
= MIN (3, md
.num_slots_in_use
);
6530 /* Determine template: user user_template if specified, best match
6533 if (md
.slot
[first
].user_template
>= 0)
6534 user_template
= template_val
= md
.slot
[first
].user_template
;
6537 /* Auto select appropriate template. */
6538 memset (type
, 0, sizeof (type
));
6540 for (i
= 0; i
< n
; ++i
)
6542 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6544 type
[i
] = md
.slot
[curr
].idesc
->type
;
6545 curr
= (curr
+ 1) % NUM_SLOTS
;
6547 template_val
= best_template
[type
[0]][type
[1]][type
[2]];
6550 /* initialize instructions with appropriate nops: */
6551 for (i
= 0; i
< 3; ++i
)
6552 insn
[i
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[i
]];
6556 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6557 from the start of the frag. */
6558 addr_mod
= frag_now_fix () & 15;
6559 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6560 as_bad (_("instruction address is not a multiple of 16"));
6561 frag_now
->insn_addr
= addr_mod
;
6562 frag_now
->has_code
= 1;
6564 /* now fill in slots with as many insns as possible: */
6566 idesc
= md
.slot
[curr
].idesc
;
6567 end_of_insn_group
= 0;
6569 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6571 /* If we have unwind records, we may need to update some now. */
6572 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6573 unw_rec_list
*end_ptr
= NULL
;
6577 /* Find the last prologue/body record in the list for the current
6578 insn, and set the slot number for all records up to that point.
6579 This needs to be done now, because prologue/body records refer to
6580 the current point, not the point after the instruction has been
6581 issued. This matters because there may have been nops emitted
6582 meanwhile. Any non-prologue non-body record followed by a
6583 prologue/body record must also refer to the current point. */
6584 unw_rec_list
*last_ptr
;
6586 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6587 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6588 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6589 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6590 || ptr
->r
.type
== body
)
6594 /* Make last_ptr point one after the last prologue/body
6596 last_ptr
= last_ptr
->next
;
6597 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6600 ptr
->slot_number
= (unsigned long) f
+ i
;
6601 ptr
->slot_frag
= frag_now
;
6603 /* Remove the initialized records, so that we won't accidentally
6604 update them again if we insert a nop and continue. */
6605 md
.slot
[curr
].unwind_record
= last_ptr
;
6609 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6610 if (md
.slot
[curr
].manual_bundling_on
)
6613 manual_bundling
= 1;
6615 break; /* Need to start a new bundle. */
6618 /* If this instruction specifies a template, then it must be the first
6619 instruction of a bundle. */
6620 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6623 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6625 if (manual_bundling
&& !manual_bundling_off
)
6627 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6628 _("`%s' must be last in bundle"), idesc
->name
);
6630 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6634 if (idesc
->flags
& IA64_OPCODE_LAST
)
6637 unsigned int required_template
;
6639 /* If we need a stop bit after an M slot, our only choice is
6640 template 5 (M;;MI). If we need a stop bit after a B
6641 slot, our only choice is to place it at the end of the
6642 bundle, because the only available templates are MIB,
6643 MBB, BBB, MMB, and MFB. We don't handle anything other
6644 than M and B slots because these are the only kind of
6645 instructions that can have the IA64_OPCODE_LAST bit set. */
6646 required_template
= template_val
;
6647 switch (idesc
->type
)
6651 required_template
= 5;
6659 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6660 _("Internal error: don't know how to force %s to end of instruction group"),
6666 && (i
> required_slot
6667 || (required_slot
== 2 && !manual_bundling_off
)
6668 || (user_template
>= 0
6669 /* Changing from MMI to M;MI is OK. */
6670 && (template_val
^ required_template
) > 1)))
6672 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6673 _("`%s' must be last in instruction group"),
6675 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6676 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6678 if (required_slot
< i
)
6679 /* Can't fit this instruction. */
6683 if (required_template
!= template_val
)
6685 /* If we switch the template, we need to reset the NOPs
6686 after slot i. The slot-types of the instructions ahead
6687 of i never change, so we don't need to worry about
6688 changing NOPs in front of this slot. */
6689 for (j
= i
; j
< 3; ++j
)
6690 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6692 /* We just picked a template that includes the stop bit in the
6693 middle, so we don't need another one emitted later. */
6694 md
.slot
[curr
].end_of_insn_group
= 0;
6696 template_val
= required_template
;
6698 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6700 if (manual_bundling
)
6702 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6703 _("Label must be first in a bundle"));
6704 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6706 /* This insn must go into the first slot of a bundle. */
6710 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6712 /* We need an instruction group boundary in the middle of a
6713 bundle. See if we can switch to an other template with
6714 an appropriate boundary. */
6716 orig_template
= template_val
;
6717 if (i
== 1 && (user_template
== 4
6718 || (user_template
< 0
6719 && (ia64_templ_desc
[template_val
].exec_unit
[0]
6723 end_of_insn_group
= 0;
6725 else if (i
== 2 && (user_template
== 0
6726 || (user_template
< 0
6727 && (ia64_templ_desc
[template_val
].exec_unit
[1]
6729 /* This test makes sure we don't switch the template if
6730 the next instruction is one that needs to be first in
6731 an instruction group. Since all those instructions are
6732 in the M group, there is no way such an instruction can
6733 fit in this bundle even if we switch the template. The
6734 reason we have to check for this is that otherwise we
6735 may end up generating "MI;;I M.." which has the deadly
6736 effect that the second M instruction is no longer the
6737 first in the group! --davidm 99/12/16 */
6738 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6741 end_of_insn_group
= 0;
6744 && user_template
== 0
6745 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6746 /* Use the next slot. */
6748 else if (curr
!= first
)
6749 /* can't fit this insn */
6752 if (template_val
!= orig_template
)
6753 /* if we switch the template, we need to reset the NOPs
6754 after slot i. The slot-types of the instructions ahead
6755 of i never change, so we don't need to worry about
6756 changing NOPs in front of this slot. */
6757 for (j
= i
; j
< 3; ++j
)
6758 insn
[j
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[j
]];
6760 required_unit
= ia64_templ_desc
[template_val
].exec_unit
[i
];
6762 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6763 if (idesc
->type
== IA64_TYPE_DYN
)
6765 enum ia64_opnd opnd1
, opnd2
;
6767 if ((strcmp (idesc
->name
, "nop") == 0)
6768 || (strcmp (idesc
->name
, "break") == 0))
6769 insn_unit
= required_unit
;
6770 else if (strcmp (idesc
->name
, "hint") == 0)
6772 insn_unit
= required_unit
;
6773 if (required_unit
== IA64_UNIT_B
)
6779 case hint_b_warning
:
6780 as_warn (_("hint in B unit may be treated as nop"));
6783 /* When manual bundling is off and there is no
6784 user template, we choose a different unit so
6785 that hint won't go into the current slot. We
6786 will fill the current bundle with nops and
6787 try to put hint into the next bundle. */
6788 if (!manual_bundling
&& user_template
< 0)
6789 insn_unit
= IA64_UNIT_I
;
6791 as_bad (_("hint in B unit can't be used"));
6796 else if (strcmp (idesc
->name
, "chk.s") == 0
6797 || strcmp (idesc
->name
, "mov") == 0)
6799 insn_unit
= IA64_UNIT_M
;
6800 if (required_unit
== IA64_UNIT_I
6801 || (required_unit
== IA64_UNIT_F
&& template_val
== 6))
6802 insn_unit
= IA64_UNIT_I
;
6805 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6807 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6808 idesc
->name
, "?imbfxx"[insn_unit
]);
6809 opnd1
= idesc
->operands
[0];
6810 opnd2
= idesc
->operands
[1];
6811 ia64_free_opcode (idesc
);
6812 idesc
= ia64_find_opcode (mnemonic
);
6813 /* moves to/from ARs have collisions */
6814 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6816 while (idesc
!= NULL
6817 && (idesc
->operands
[0] != opnd1
6818 || idesc
->operands
[1] != opnd2
))
6819 idesc
= get_next_opcode (idesc
);
6821 md
.slot
[curr
].idesc
= idesc
;
6825 insn_type
= idesc
->type
;
6826 insn_unit
= IA64_UNIT_NIL
;
6830 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6831 insn_unit
= required_unit
;
6833 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6834 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6835 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6836 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6837 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6842 if (insn_unit
!= required_unit
)
6843 continue; /* Try next slot. */
6845 /* Now is a good time to fix up the labels for this insn. */
6847 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6849 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6850 symbol_set_frag (lfix
->sym
, frag_now
);
6851 mark_label
|= lfix
->dw2_mark_labels
;
6853 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6855 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6856 symbol_set_frag (lfix
->sym
, frag_now
);
6859 if (debug_type
== DEBUG_DWARF2
6860 || md
.slot
[curr
].loc_directive_seen
6863 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6865 md
.slot
[curr
].loc_directive_seen
= 0;
6867 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
6869 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6872 build_insn (md
.slot
+ curr
, insn
+ i
);
6874 ptr
= md
.slot
[curr
].unwind_record
;
6877 /* Set slot numbers for all remaining unwind records belonging to the
6878 current insn. There can not be any prologue/body unwind records
6880 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6882 ptr
->slot_number
= (unsigned long) f
+ i
;
6883 ptr
->slot_frag
= frag_now
;
6885 md
.slot
[curr
].unwind_record
= NULL
;
6888 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6890 unsigned long where
;
6892 ifix
= md
.slot
[curr
].fixup
+ j
;
6893 where
= frag_now_fix () - 16 + i
;
6895 /* Relocations for instructions specify the slot in the
6896 bottom two bits of r_offset. The IA64 HP-UX linker
6897 expects PCREL60B relocations to specify slot 2 of an
6898 instruction. gas generates PCREL60B against slot 1. */
6899 if (ifix
->code
== BFD_RELOC_IA64_PCREL60B
)
6906 fix
= fix_new_exp (frag_now
, where
, 8,
6907 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6908 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6909 fix
->fx_file
= md
.slot
[curr
].src_file
;
6910 fix
->fx_line
= md
.slot
[curr
].src_line
;
6913 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6915 /* This adjustment to "i" must occur after the fix, otherwise the fix
6916 is assigned to the wrong slot, and the VMS linker complains. */
6917 if (required_unit
== IA64_UNIT_L
)
6920 /* skip one slot for long/X-unit instructions */
6923 --md
.num_slots_in_use
;
6927 ia64_free_opcode (md
.slot
[curr
].idesc
);
6928 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6929 md
.slot
[curr
].user_template
= -1;
6931 if (manual_bundling_off
)
6933 manual_bundling
= 0;
6936 curr
= (curr
+ 1) % NUM_SLOTS
;
6937 idesc
= md
.slot
[curr
].idesc
;
6940 /* A user template was specified, but the first following instruction did
6941 not fit. This can happen with or without manual bundling. */
6942 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
6944 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6945 _("`%s' does not fit into %s template"),
6946 idesc
->name
, ia64_templ_desc
[template_val
].name
);
6947 /* Drop first insn so we don't livelock. */
6948 --md
.num_slots_in_use
;
6949 know (curr
== first
);
6950 ia64_free_opcode (md
.slot
[curr
].idesc
);
6951 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6952 md
.slot
[curr
].user_template
= -1;
6954 else if (manual_bundling
> 0)
6956 if (md
.num_slots_in_use
> 0)
6959 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6960 _("`%s' does not fit into bundle"), idesc
->name
);
6965 if (template_val
== 2)
6967 else if (last_slot
== 0)
6968 where
= "slots 2 or 3";
6971 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6972 _("`%s' can't go in %s of %s template"),
6973 idesc
->name
, where
, ia64_templ_desc
[template_val
].name
);
6977 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6978 _("Missing '}' at end of file"));
6981 know (md
.num_slots_in_use
< NUM_SLOTS
);
6983 t0
= end_of_insn_group
| (template_val
<< 1) | (insn
[0] << 5) | (insn
[1] << 46);
6984 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6986 number_to_chars_littleendian (f
+ 0, t0
, 8);
6987 number_to_chars_littleendian (f
+ 8, t1
, 8);
6991 md_parse_option (int c
, const char *arg
)
6996 /* Switches from the Intel assembler. */
6998 if (strcmp (arg
, "ilp64") == 0
6999 || strcmp (arg
, "lp64") == 0
7000 || strcmp (arg
, "p64") == 0)
7002 md
.flags
|= EF_IA_64_ABI64
;
7004 else if (strcmp (arg
, "ilp32") == 0)
7006 md
.flags
&= ~EF_IA_64_ABI64
;
7008 else if (strcmp (arg
, "le") == 0)
7010 md
.flags
&= ~EF_IA_64_BE
;
7011 default_big_endian
= 0;
7013 else if (strcmp (arg
, "be") == 0)
7015 md
.flags
|= EF_IA_64_BE
;
7016 default_big_endian
= 1;
7018 else if (startswith (arg
, "unwind-check="))
7021 if (strcmp (arg
, "warning") == 0)
7022 md
.unwind_check
= unwind_check_warning
;
7023 else if (strcmp (arg
, "error") == 0)
7024 md
.unwind_check
= unwind_check_error
;
7028 else if (startswith (arg
, "hint.b="))
7031 if (strcmp (arg
, "ok") == 0)
7032 md
.hint_b
= hint_b_ok
;
7033 else if (strcmp (arg
, "warning") == 0)
7034 md
.hint_b
= hint_b_warning
;
7035 else if (strcmp (arg
, "error") == 0)
7036 md
.hint_b
= hint_b_error
;
7040 else if (startswith (arg
, "tune="))
7043 if (strcmp (arg
, "itanium1") == 0)
7045 else if (strcmp (arg
, "itanium2") == 0)
7055 if (strcmp (arg
, "so") == 0)
7057 /* Suppress signon message. */
7059 else if (strcmp (arg
, "pi") == 0)
7061 /* Reject privileged instructions. FIXME */
7063 else if (strcmp (arg
, "us") == 0)
7065 /* Allow union of signed and unsigned range. FIXME */
7067 else if (strcmp (arg
, "close_fcalls") == 0)
7069 /* Do not resolve global function calls. */
7076 /* temp[="prefix"] Insert temporary labels into the object file
7077 symbol table prefixed by "prefix".
7078 Default prefix is ":temp:".
7083 /* indirect=<tgt> Assume unannotated indirect branches behavior
7084 according to <tgt> --
7085 exit: branch out from the current context (default)
7086 labels: all labels in context may be branch targets
7088 if (!startswith (arg
, "indirect="))
7093 /* -X conflicts with an ignored option, use -x instead */
7095 if (!arg
|| strcmp (arg
, "explicit") == 0)
7097 /* set default mode to explicit */
7098 md
.default_explicit_mode
= 1;
7101 else if (strcmp (arg
, "auto") == 0)
7103 md
.default_explicit_mode
= 0;
7105 else if (strcmp (arg
, "none") == 0)
7109 else if (strcmp (arg
, "debug") == 0)
7113 else if (strcmp (arg
, "debugx") == 0)
7115 md
.default_explicit_mode
= 1;
7118 else if (strcmp (arg
, "debugn") == 0)
7125 as_bad (_("Unrecognized option '-x%s'"), arg
);
7130 /* nops Print nops statistics. */
7133 /* GNU specific switches for gcc. */
7134 case OPTION_MCONSTANT_GP
:
7135 md
.flags
|= EF_IA_64_CONS_GP
;
7138 case OPTION_MAUTO_PIC
:
7139 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7150 md_show_usage (FILE *stream
)
7154 --mconstant-gp mark output file as using the constant-GP model\n\
7155 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7156 --mauto-pic mark output file as using the constant-GP model\n\
7157 without function descriptors (sets ELF header flag\n\
7158 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7159 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7160 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7161 -mtune=[itanium1|itanium2]\n\
7162 tune for a specific CPU (default -mtune=itanium2)\n\
7163 -munwind-check=[warning|error]\n\
7164 unwind directive check (default -munwind-check=warning)\n\
7165 -mhint.b=[ok|warning|error]\n\
7166 hint.b check (default -mhint.b=error)\n\
7167 -x | -xexplicit turn on dependency violation checking\n"), stream
);
7168 /* Note for translators: "automagically" can be translated as "automatically" here. */
7170 -xauto automagically remove dependency violations (default)\n\
7171 -xnone turn off dependency violation checking\n\
7172 -xdebug debug dependency violation checker\n\
7173 -xdebugn debug dependency violation checker but turn off\n\
7174 dependency violation checking\n\
7175 -xdebugx debug dependency violation checker and turn on\n\
7176 dependency violation checking\n"),
7181 ia64_after_parse_args (void)
7183 if (debug_type
== DEBUG_STABS
)
7184 as_fatal (_("--gstabs is not supported for ia64"));
7187 /* Return true if TYPE fits in TEMPL at SLOT. */
7190 match (int templ
, int type
, int slot
)
7192 enum ia64_unit unit
;
7195 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7198 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7200 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7202 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7203 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7204 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7205 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7206 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7207 default: result
= 0; break;
7212 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7213 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7214 type M or I would fit in TEMPL at SLOT. */
7217 extra_goodness (int templ
, int slot
)
7222 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7224 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7230 if (match (templ
, IA64_TYPE_M
, slot
)
7231 || match (templ
, IA64_TYPE_I
, slot
))
7232 /* Favor M- and I-unit NOPs. We definitely want to avoid
7233 F-unit and B-unit may cause split-issue or less-than-optimal
7234 branch-prediction. */
7245 /* This function is called once, at assembler startup time. It sets
7246 up all the tables, etc. that the MD part of the assembler will need
7247 that can be determined before arguments are parsed. */
7251 int i
, j
, k
, t
, goodness
, best
, ok
;
7254 md
.explicit_mode
= md
.default_explicit_mode
;
7256 bfd_set_section_alignment (text_section
, 4);
7258 /* Make sure function pointers get initialized. */
7259 target_big_endian
= -1;
7260 dot_byteorder (default_big_endian
);
7262 alias_hash
= str_htab_create ();
7263 alias_name_hash
= str_htab_create ();
7264 secalias_hash
= str_htab_create ();
7265 secalias_name_hash
= str_htab_create ();
7267 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7268 symbol_new (".<dtpmod>", undefined_section
,
7269 &zero_address_frag
, FUNC_DTP_MODULE
);
7271 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7272 symbol_new (".<dtprel>", undefined_section
,
7273 &zero_address_frag
, FUNC_DTP_RELATIVE
);
7275 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7276 symbol_new (".<fptr>", undefined_section
,
7277 &zero_address_frag
, FUNC_FPTR_RELATIVE
);
7279 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7280 symbol_new (".<gprel>", undefined_section
,
7281 &zero_address_frag
, FUNC_GP_RELATIVE
);
7283 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7284 symbol_new (".<ltoff>", undefined_section
,
7285 &zero_address_frag
, FUNC_LT_RELATIVE
);
7287 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7288 symbol_new (".<ltoffx>", undefined_section
,
7289 &zero_address_frag
, FUNC_LT_RELATIVE_X
);
7291 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7292 symbol_new (".<pcrel>", undefined_section
,
7293 &zero_address_frag
, FUNC_PC_RELATIVE
);
7295 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7296 symbol_new (".<pltoff>", undefined_section
,
7297 &zero_address_frag
, FUNC_PLT_RELATIVE
);
7299 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7300 symbol_new (".<secrel>", undefined_section
,
7301 &zero_address_frag
, FUNC_SEC_RELATIVE
);
7303 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7304 symbol_new (".<segrel>", undefined_section
,
7305 &zero_address_frag
, FUNC_SEG_RELATIVE
);
7307 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7308 symbol_new (".<tprel>", undefined_section
,
7309 &zero_address_frag
, FUNC_TP_RELATIVE
);
7311 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7312 symbol_new (".<ltv>", undefined_section
,
7313 &zero_address_frag
, FUNC_LTV_RELATIVE
);
7315 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7316 symbol_new (".<ltoff.fptr>", undefined_section
,
7317 &zero_address_frag
, FUNC_LT_FPTR_RELATIVE
);
7319 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7320 symbol_new (".<ltoff.dtpmod>", undefined_section
,
7321 &zero_address_frag
, FUNC_LT_DTP_MODULE
);
7323 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7324 symbol_new (".<ltoff.dptrel>", undefined_section
,
7325 &zero_address_frag
, FUNC_LT_DTP_RELATIVE
);
7327 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7328 symbol_new (".<ltoff.tprel>", undefined_section
,
7329 &zero_address_frag
, FUNC_LT_TP_RELATIVE
);
7331 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7332 symbol_new (".<iplt>", undefined_section
,
7333 &zero_address_frag
, FUNC_IPLT_RELOC
);
7336 pseudo_func
[FUNC_SLOTCOUNT_RELOC
].u
.sym
=
7337 symbol_new (".<slotcount>", undefined_section
,
7338 &zero_address_frag
, FUNC_SLOTCOUNT_RELOC
);
7341 if (md
.tune
!= itanium1
)
7343 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7345 le_nop_stop
[0] = 0x9;
7348 /* Compute the table of best templates. We compute goodness as a
7349 base 4 value, in which each match counts for 3. Match-failures
7350 result in NOPs and we use extra_goodness() to pick the execution
7351 units that are best suited for issuing the NOP. */
7352 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7353 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7354 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7357 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7360 if (match (t
, i
, 0))
7362 if (match (t
, j
, 1))
7364 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7365 goodness
= 3 + 3 + 3;
7367 goodness
= 3 + 3 + extra_goodness (t
, 2);
7369 else if (match (t
, j
, 2))
7370 goodness
= 3 + 3 + extra_goodness (t
, 1);
7374 goodness
+= extra_goodness (t
, 1);
7375 goodness
+= extra_goodness (t
, 2);
7378 else if (match (t
, i
, 1))
7380 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7383 goodness
= 3 + extra_goodness (t
, 2);
7385 else if (match (t
, i
, 2))
7386 goodness
= 3 + extra_goodness (t
, 1);
7388 if (goodness
> best
)
7391 best_template
[i
][j
][k
] = t
;
7396 #ifdef DEBUG_TEMPLATES
7397 /* For debugging changes to the best_template calculations. We don't care
7398 about combinations with invalid instructions, so start the loops at 1. */
7399 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7400 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7401 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7403 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7405 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7407 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7411 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7412 md
.slot
[i
].user_template
= -1;
7414 md
.pseudo_hash
= str_htab_create ();
7415 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7416 if (str_hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7417 pseudo_opcode
+ i
, 0) != NULL
)
7418 as_fatal (_("duplicate %s"), pseudo_opcode
[i
].name
);
7420 md
.reg_hash
= str_htab_create ();
7421 md
.dynreg_hash
= str_htab_create ();
7422 md
.const_hash
= str_htab_create ();
7423 md
.entry_hash
= str_htab_create ();
7425 /* general registers: */
7426 declare_register_set ("r", 128, REG_GR
);
7427 declare_register ("gp", REG_GR
+ 1);
7428 declare_register ("sp", REG_GR
+ 12);
7429 declare_register ("tp", REG_GR
+ 13);
7430 declare_register_set ("ret", 4, REG_GR
+ 8);
7432 /* floating point registers: */
7433 declare_register_set ("f", 128, REG_FR
);
7434 declare_register_set ("farg", 8, REG_FR
+ 8);
7435 declare_register_set ("fret", 8, REG_FR
+ 8);
7437 /* branch registers: */
7438 declare_register_set ("b", 8, REG_BR
);
7439 declare_register ("rp", REG_BR
+ 0);
7441 /* predicate registers: */
7442 declare_register_set ("p", 64, REG_P
);
7443 declare_register ("pr", REG_PR
);
7444 declare_register ("pr.rot", REG_PR_ROT
);
7446 /* application registers: */
7447 declare_register_set ("ar", 128, REG_AR
);
7448 for (i
= 0; i
< NELEMS (ar
); ++i
)
7449 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7451 /* control registers: */
7452 declare_register_set ("cr", 128, REG_CR
);
7453 for (i
= 0; i
< NELEMS (cr
); ++i
)
7454 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7456 /* dahr registers: */
7457 declare_register_set ("dahr", 8, REG_DAHR
);
7459 declare_register ("ip", REG_IP
);
7460 declare_register ("cfm", REG_CFM
);
7461 declare_register ("psr", REG_PSR
);
7462 declare_register ("psr.l", REG_PSR_L
);
7463 declare_register ("psr.um", REG_PSR_UM
);
7465 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7467 unsigned int regnum
= indirect_reg
[i
].regnum
;
7469 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7472 /* pseudo-registers used to specify unwind info: */
7473 declare_register ("psp", REG_PSP
);
7475 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7476 if (str_hash_insert (md
.const_hash
, const_bits
[i
].name
, const_bits
+ i
, 0))
7477 as_fatal (_("duplicate %s"), const_bits
[i
].name
);
7479 /* Set the architecture and machine depending on defaults and command line
7481 if (md
.flags
& EF_IA_64_ABI64
)
7482 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7484 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7487 as_warn (_("Could not set architecture and machine"));
7489 /* Set the pointer size and pointer shift size depending on md.flags */
7491 if (md
.flags
& EF_IA_64_ABI64
)
7493 md
.pointer_size
= 8; /* pointers are 8 bytes */
7494 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7498 md
.pointer_size
= 4; /* pointers are 4 bytes */
7499 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7502 md
.mem_offset
.hint
= 0;
7505 md
.entry_labels
= NULL
;
7508 /* Set the default options in md. Cannot do this in md_begin because
7509 that is called after md_parse_option which is where we set the
7510 options in md based on command line options. */
7513 ia64_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
7515 md
.flags
= MD_FLAGS_DEFAULT
;
7517 /* Don't turn on dependency checking for VMS, doesn't work. */
7520 /* FIXME: We should change it to unwind_check_error someday. */
7521 md
.unwind_check
= unwind_check_warning
;
7522 md
.hint_b
= hint_b_error
;
7526 /* Return a string for the target object file format. */
7529 ia64_target_format (void)
7531 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7533 if (md
.flags
& EF_IA_64_BE
)
7535 if (md
.flags
& EF_IA_64_ABI64
)
7536 #if defined(TE_AIX50)
7537 return "elf64-ia64-aix-big";
7538 #elif defined(TE_HPUX)
7539 return "elf64-ia64-hpux-big";
7541 return "elf64-ia64-big";
7544 #if defined(TE_AIX50)
7545 return "elf32-ia64-aix-big";
7546 #elif defined(TE_HPUX)
7547 return "elf32-ia64-hpux-big";
7549 return "elf32-ia64-big";
7554 if (md
.flags
& EF_IA_64_ABI64
)
7555 #if defined (TE_AIX50)
7556 return "elf64-ia64-aix-little";
7557 #elif defined (TE_VMS)
7559 md
.flags
|= EF_IA_64_ARCHVER_1
;
7560 return "elf64-ia64-vms";
7563 return "elf64-ia64-little";
7567 return "elf32-ia64-aix-little";
7569 return "elf32-ia64-little";
7574 return "unknown-format";
7578 ia64_end_of_source (void)
7580 /* terminate insn group upon reaching end of file: */
7581 insn_group_break (1, 0, 0);
7583 /* emits slots we haven't written yet: */
7584 ia64_flush_insns ();
7586 bfd_set_private_flags (stdoutput
, md
.flags
);
7588 md
.mem_offset
.hint
= 0;
7592 ia64_start_line (void)
7597 /* Make sure we don't reference input_line_pointer[-1] when that's
7603 if (md
.qp
.X_op
== O_register
)
7604 as_bad (_("qualifying predicate not followed by instruction"));
7605 md
.qp
.X_op
= O_absent
;
7607 if (ignore_input ())
7610 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7612 if (md
.detect_dv
&& !md
.explicit_mode
)
7619 as_warn (_("Explicit stops are ignored in auto mode"));
7623 insn_group_break (1, 0, 0);
7625 else if (input_line_pointer
[-1] == '{')
7627 if (md
.manual_bundling
)
7628 as_warn (_("Found '{' when manual bundling is already turned on"));
7630 CURR_SLOT
.manual_bundling_on
= 1;
7631 md
.manual_bundling
= 1;
7633 /* Bundling is only acceptable in explicit mode
7634 or when in default automatic mode. */
7635 if (md
.detect_dv
&& !md
.explicit_mode
)
7637 if (!md
.mode_explicitly_set
7638 && !md
.default_explicit_mode
)
7641 as_warn (_("Found '{' after explicit switch to automatic mode"));
7644 else if (input_line_pointer
[-1] == '}')
7646 if (!md
.manual_bundling
)
7647 as_warn (_("Found '}' when manual bundling is off"));
7649 PREV_SLOT
.manual_bundling_off
= 1;
7650 md
.manual_bundling
= 0;
7652 /* switch back to automatic mode, if applicable */
7655 && !md
.mode_explicitly_set
7656 && !md
.default_explicit_mode
)
7661 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7663 static int defining_tag
= 0;
7666 ia64_unrecognized_line (int ch
)
7671 expression_and_evaluate (&md
.qp
);
7672 if (*input_line_pointer
++ != ')')
7674 as_bad (_("Expected ')'"));
7677 if (md
.qp
.X_op
!= O_register
)
7679 as_bad (_("Qualifying predicate expected"));
7682 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7684 as_bad (_("Predicate register expected"));
7696 if (md
.qp
.X_op
== O_register
)
7698 as_bad (_("Tag must come before qualifying predicate."));
7702 /* This implements just enough of read_a_source_file in read.c to
7703 recognize labels. */
7704 if (is_name_beginner (*input_line_pointer
))
7706 c
= get_symbol_name (&s
);
7708 else if (LOCAL_LABELS_FB
7709 && ISDIGIT (*input_line_pointer
))
7712 while (ISDIGIT (*input_line_pointer
))
7713 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7714 fb_label_instance_inc (temp
);
7715 s
= fb_label_name (temp
, 0);
7716 c
= *input_line_pointer
;
7725 /* Put ':' back for error messages' sake. */
7726 *input_line_pointer
++ = ':';
7727 as_bad (_("Expected ':'"));
7734 /* Put ':' back for error messages' sake. */
7735 *input_line_pointer
++ = ':';
7736 if (*input_line_pointer
++ != ']')
7738 as_bad (_("Expected ']'"));
7743 as_bad (_("Tag name expected"));
7753 /* Not a valid line. */
7758 ia64_frob_label (struct symbol
*sym
)
7760 struct label_fix
*fix
;
7762 /* Tags need special handling since they are not bundle breaks like
7766 fix
= XOBNEW (¬es
, struct label_fix
);
7768 fix
->next
= CURR_SLOT
.tag_fixups
;
7769 fix
->dw2_mark_labels
= false;
7770 CURR_SLOT
.tag_fixups
= fix
;
7775 if (bfd_section_flags (now_seg
) & SEC_CODE
)
7777 md
.last_text_seg
= now_seg
;
7778 fix
= XOBNEW (¬es
, struct label_fix
);
7780 fix
->next
= CURR_SLOT
.label_fixups
;
7781 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7782 CURR_SLOT
.label_fixups
= fix
;
7784 /* Keep track of how many code entry points we've seen. */
7785 if (md
.path
== md
.maxpaths
)
7788 md
.entry_labels
= XRESIZEVEC (const char *, md
.entry_labels
,
7791 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7796 /* The HP-UX linker will give unresolved symbol errors for symbols
7797 that are declared but unused. This routine removes declared,
7798 unused symbols from an object. */
7800 ia64_frob_symbol (struct symbol
*sym
)
7802 if ((S_GET_SEGMENT (sym
) == bfd_und_section_ptr
&& ! symbol_used_p (sym
) &&
7803 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7804 || (S_GET_SEGMENT (sym
) == bfd_abs_section_ptr
7805 && ! S_IS_EXTERNAL (sym
)))
7812 ia64_flush_pending_output (void)
7814 if (!md
.keep_pending_output
7815 && bfd_section_flags (now_seg
) & SEC_CODE
)
7817 /* ??? This causes many unnecessary stop bits to be emitted.
7818 Unfortunately, it isn't clear if it is safe to remove this. */
7819 insn_group_break (1, 0, 0);
7820 ia64_flush_insns ();
7824 /* Do ia64-specific expression optimization. All that's done here is
7825 to transform index expressions that are either due to the indexing
7826 of rotating registers or due to the indexing of indirect register
7829 ia64_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
7833 resolve_expression (l
);
7834 if (l
->X_op
== O_register
)
7836 unsigned num_regs
= l
->X_add_number
>> 16;
7838 resolve_expression (r
);
7841 /* Left side is a .rotX-allocated register. */
7842 if (r
->X_op
!= O_constant
)
7844 as_bad (_("Rotating register index must be a non-negative constant"));
7845 r
->X_add_number
= 0;
7847 else if ((valueT
) r
->X_add_number
>= num_regs
)
7849 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
7850 r
->X_add_number
= 0;
7852 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7855 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
7857 if (r
->X_op
!= O_register
7858 || r
->X_add_number
< REG_GR
7859 || r
->X_add_number
> REG_GR
+ 127)
7861 as_bad (_("Indirect register index must be a general register"));
7862 r
->X_add_number
= REG_GR
;
7865 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
7866 l
->X_add_number
= r
->X_add_number
;
7870 as_bad (_("Index can only be applied to rotating or indirect registers"));
7871 /* Fall back to some register use of which has as little as possible
7872 side effects, to minimize subsequent error messages. */
7873 l
->X_op
= O_register
;
7874 l
->X_add_number
= REG_GR
+ 3;
7879 ia64_parse_name (char *name
, expressionS
*e
, char *nextcharP
)
7881 struct const_desc
*cdesc
;
7882 struct dynreg
*dr
= 0;
7889 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7891 /* Find what relocation pseudo-function we're dealing with. */
7892 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7893 if (pseudo_func
[idx
].name
7894 && pseudo_func
[idx
].name
[0] == name
[1]
7895 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7897 pseudo_type
= pseudo_func
[idx
].type
;
7900 switch (pseudo_type
)
7902 case PSEUDO_FUNC_RELOC
:
7903 end
= input_line_pointer
;
7904 if (*nextcharP
!= '(')
7906 as_bad (_("Expected '('"));
7910 ++input_line_pointer
;
7912 if (*input_line_pointer
!= ')')
7914 as_bad (_("Missing ')'"));
7918 ++input_line_pointer
;
7920 if (idx
== FUNC_SLOTCOUNT_RELOC
)
7922 /* @slotcount can accept any expression. Canonicalize. */
7923 e
->X_add_symbol
= make_expr_symbol (e
);
7925 e
->X_add_number
= 0;
7928 if (e
->X_op
!= O_symbol
)
7930 if (e
->X_op
!= O_pseudo_fixup
)
7932 as_bad (_("Not a symbolic expression"));
7935 if (idx
!= FUNC_LT_RELATIVE
)
7937 as_bad (_("Illegal combination of relocation functions"));
7940 switch (S_GET_VALUE (e
->X_op_symbol
))
7942 case FUNC_FPTR_RELATIVE
:
7943 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7944 case FUNC_DTP_MODULE
:
7945 idx
= FUNC_LT_DTP_MODULE
; break;
7946 case FUNC_DTP_RELATIVE
:
7947 idx
= FUNC_LT_DTP_RELATIVE
; break;
7948 case FUNC_TP_RELATIVE
:
7949 idx
= FUNC_LT_TP_RELATIVE
; break;
7951 as_bad (_("Illegal combination of relocation functions"));
7955 /* Make sure gas doesn't get rid of local symbols that are used
7957 e
->X_op
= O_pseudo_fixup
;
7958 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7960 *nextcharP
= *input_line_pointer
;
7963 case PSEUDO_FUNC_CONST
:
7964 e
->X_op
= O_constant
;
7965 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7968 case PSEUDO_FUNC_REG
:
7969 e
->X_op
= O_register
;
7970 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7979 /* first see if NAME is a known register name: */
7980 sym
= str_hash_find (md
.reg_hash
, name
);
7983 e
->X_op
= O_register
;
7984 e
->X_add_number
= S_GET_VALUE (sym
);
7988 cdesc
= str_hash_find (md
.const_hash
, name
);
7991 e
->X_op
= O_constant
;
7992 e
->X_add_number
= cdesc
->value
;
7996 /* check for inN, locN, or outN: */
8001 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8009 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8017 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8028 /* Ignore register numbers with leading zeroes, except zero itself. */
8029 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8031 unsigned long regnum
;
8033 /* The name is inN, locN, or outN; parse the register number. */
8034 regnum
= strtoul (name
+ idx
, &end
, 10);
8035 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8037 if (regnum
>= dr
->num_regs
)
8040 as_bad (_("No current frame"));
8042 as_bad (_("Register number out of range 0..%u"),
8046 e
->X_op
= O_register
;
8047 e
->X_add_number
= dr
->base
+ regnum
;
8052 end
= xstrdup (name
);
8053 name
= ia64_canonicalize_symbol_name (end
);
8054 if ((dr
= str_hash_find (md
.dynreg_hash
, name
)))
8056 /* We've got ourselves the name of a rotating register set.
8057 Store the base register number in the low 16 bits of
8058 X_add_number and the size of the register set in the top 16
8060 e
->X_op
= O_register
;
8061 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8069 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8072 ia64_canonicalize_symbol_name (char *name
)
8074 size_t len
= strlen (name
), full
= len
;
8076 while (len
> 0 && name
[len
- 1] == '#')
8081 as_bad (_("Standalone `#' is illegal"));
8083 else if (len
< full
- 1)
8084 as_warn (_("Redundant `#' suffix operators"));
8089 /* Return true if idesc is a conditional branch instruction. This excludes
8090 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8091 because they always read/write resources regardless of the value of the
8092 qualifying predicate. br.ia must always use p0, and hence is always
8093 taken. Thus this function returns true for branches which can fall
8094 through, and which use no resources if they do fall through. */
8097 is_conditional_branch (struct ia64_opcode
*idesc
)
8099 /* br is a conditional branch. Everything that starts with br. except
8100 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8101 Everything that starts with brl is a conditional branch. */
8102 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8103 && (idesc
->name
[2] == '\0'
8104 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8105 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8106 || idesc
->name
[2] == 'l'
8107 /* br.cond, br.call, br.clr */
8108 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8109 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8110 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8113 /* Return whether the given opcode is a taken branch. If there's any doubt,
8117 is_taken_branch (struct ia64_opcode
*idesc
)
8119 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8120 || startswith (idesc
->name
, "br.ia"));
8123 /* Return whether the given opcode is an interruption or rfi. If there's any
8124 doubt, returns zero. */
8127 is_interruption_or_rfi (struct ia64_opcode
*idesc
)
8129 if (strcmp (idesc
->name
, "rfi") == 0)
8134 /* Returns the index of the given dependency in the opcode's list of chks, or
8135 -1 if there is no dependency. */
8138 depends_on (int depind
, struct ia64_opcode
*idesc
)
8141 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8142 for (i
= 0; i
< dep
->nchks
; i
++)
8144 if (depind
== DEP (dep
->chks
[i
]))
8150 /* Determine a set of specific resources used for a particular resource
8151 class. Returns the number of specific resources identified For those
8152 cases which are not determinable statically, the resource returned is
8155 Meanings of value in 'NOTE':
8156 1) only read/write when the register number is explicitly encoded in the
8158 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8159 accesses CFM when qualifying predicate is in the rotating region.
8160 3) general register value is used to specify an indirect register; not
8161 determinable statically.
8162 4) only read the given resource when bits 7:0 of the indirect index
8163 register value does not match the register number of the resource; not
8164 determinable statically.
8165 5) all rules are implementation specific.
8166 6) only when both the index specified by the reader and the index specified
8167 by the writer have the same value in bits 63:61; not determinable
8169 7) only access the specified resource when the corresponding mask bit is
8171 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8172 only read when these insns reference FR2-31
8173 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8174 written when these insns write FR32-127
8175 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8177 11) The target predicates are written independently of PR[qp], but source
8178 registers are only read if PR[qp] is true. Since the state of PR[qp]
8179 cannot statically be determined, all source registers are marked used.
8180 12) This insn only reads the specified predicate register when that
8181 register is the PR[qp].
8182 13) This reference to ld-c only applies to the GR whose value is loaded
8183 with data returned from memory, not the post-incremented address register.
8184 14) The RSE resource includes the implementation-specific RSE internal
8185 state resources. At least one (and possibly more) of these resources are
8186 read by each instruction listed in IC:rse-readers. At least one (and
8187 possibly more) of these resources are written by each insn listed in
8189 15+16) Represents reserved instructions, which the assembler does not
8191 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8192 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8194 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8195 this code; there are no dependency violations based on memory access.
8198 #define MAX_SPECS 256
8203 specify_resource (const struct ia64_dependency
*dep
,
8204 struct ia64_opcode
*idesc
,
8205 /* is this a DV chk or a DV reg? */
8207 /* returned specific resources */
8208 struct rsrc specs
[MAX_SPECS
],
8209 /* resource note for this insn's usage */
8211 /* which execution path to examine */
8219 if (dep
->mode
== IA64_DV_WAW
8220 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8221 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8224 /* template for any resources we identify */
8225 tmpl
.dependency
= dep
;
8227 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8228 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8229 tmpl
.link_to_qp_branch
= 1;
8230 tmpl
.mem_offset
.hint
= 0;
8231 tmpl
.mem_offset
.offset
= 0;
8232 tmpl
.mem_offset
.base
= 0;
8235 tmpl
.cmp_type
= CMP_NONE
;
8242 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8243 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8244 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8246 /* we don't need to track these */
8247 if (dep
->semantics
== IA64_DVS_NONE
)
8250 switch (dep
->specifier
)
8255 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8257 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8258 if (regno
>= 0 && regno
<= 7)
8260 specs
[count
] = tmpl
;
8261 specs
[count
++].index
= regno
;
8267 for (i
= 0; i
< 8; i
++)
8269 specs
[count
] = tmpl
;
8270 specs
[count
++].index
= i
;
8279 case IA64_RS_AR_UNAT
:
8280 /* This is a mov =AR or mov AR= instruction. */
8281 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8283 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8284 if (regno
== AR_UNAT
)
8286 specs
[count
++] = tmpl
;
8291 /* This is a spill/fill, or other instruction that modifies the
8294 /* Unless we can determine the specific bits used, mark the whole
8295 thing; bits 8:3 of the memory address indicate the bit used in
8296 UNAT. The .mem.offset hint may be used to eliminate a small
8297 subset of conflicts. */
8298 specs
[count
] = tmpl
;
8299 if (md
.mem_offset
.hint
)
8302 fprintf (stderr
, " Using hint for spill/fill\n");
8303 /* The index isn't actually used, just set it to something
8304 approximating the bit index. */
8305 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8306 specs
[count
].mem_offset
.hint
= 1;
8307 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8308 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8312 specs
[count
++].specific
= 0;
8320 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8322 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8323 if ((regno
>= 8 && regno
<= 15)
8324 || (regno
>= 20 && regno
<= 23)
8325 || (regno
>= 31 && regno
<= 39)
8326 || (regno
>= 41 && regno
<= 47)
8327 || (regno
>= 67 && regno
<= 111))
8329 specs
[count
] = tmpl
;
8330 specs
[count
++].index
= regno
;
8343 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8345 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8346 if ((regno
>= 48 && regno
<= 63)
8347 || (regno
>= 112 && regno
<= 127))
8349 specs
[count
] = tmpl
;
8350 specs
[count
++].index
= regno
;
8356 for (i
= 48; i
< 64; i
++)
8358 specs
[count
] = tmpl
;
8359 specs
[count
++].index
= i
;
8361 for (i
= 112; i
< 128; i
++)
8363 specs
[count
] = tmpl
;
8364 specs
[count
++].index
= i
;
8382 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8383 if (idesc
->operands
[i
] == IA64_OPND_B1
8384 || idesc
->operands
[i
] == IA64_OPND_B2
)
8386 specs
[count
] = tmpl
;
8387 specs
[count
++].index
=
8388 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8393 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8394 if (idesc
->operands
[i
] == IA64_OPND_B1
8395 || idesc
->operands
[i
] == IA64_OPND_B2
)
8397 specs
[count
] = tmpl
;
8398 specs
[count
++].index
=
8399 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8405 case IA64_RS_CPUID
: /* four or more registers */
8408 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8410 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8411 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8414 specs
[count
] = tmpl
;
8415 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8419 specs
[count
] = tmpl
;
8420 specs
[count
++].specific
= 0;
8430 case IA64_RS_DBR
: /* four or more registers */
8433 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8435 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8436 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8439 specs
[count
] = tmpl
;
8440 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8444 specs
[count
] = tmpl
;
8445 specs
[count
++].specific
= 0;
8449 else if (note
== 0 && !rsrc_write
)
8451 specs
[count
] = tmpl
;
8452 specs
[count
++].specific
= 0;
8460 case IA64_RS_IBR
: /* four or more registers */
8463 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8465 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8466 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8469 specs
[count
] = tmpl
;
8470 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8474 specs
[count
] = tmpl
;
8475 specs
[count
++].specific
= 0;
8488 /* These are implementation specific. Force all references to
8489 conflict with all other references. */
8490 specs
[count
] = tmpl
;
8491 specs
[count
++].specific
= 0;
8499 case IA64_RS_PKR
: /* 16 or more registers */
8500 if (note
== 3 || note
== 4)
8502 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8504 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8505 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8510 specs
[count
] = tmpl
;
8511 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8514 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8516 /* Uses all registers *except* the one in R3. */
8517 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8519 specs
[count
] = tmpl
;
8520 specs
[count
++].index
= i
;
8526 specs
[count
] = tmpl
;
8527 specs
[count
++].specific
= 0;
8534 specs
[count
] = tmpl
;
8535 specs
[count
++].specific
= 0;
8539 case IA64_RS_PMC
: /* four or more registers */
8542 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8543 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8546 int reg_index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8548 int regno
= CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_GR
;
8549 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8552 specs
[count
] = tmpl
;
8553 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8557 specs
[count
] = tmpl
;
8558 specs
[count
++].specific
= 0;
8568 case IA64_RS_PMD
: /* four or more registers */
8571 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8573 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8574 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8577 specs
[count
] = tmpl
;
8578 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8582 specs
[count
] = tmpl
;
8583 specs
[count
++].specific
= 0;
8593 case IA64_RS_RR
: /* eight registers */
8596 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8598 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8599 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8602 specs
[count
] = tmpl
;
8603 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8607 specs
[count
] = tmpl
;
8608 specs
[count
++].specific
= 0;
8612 else if (note
== 0 && !rsrc_write
)
8614 specs
[count
] = tmpl
;
8615 specs
[count
++].specific
= 0;
8623 case IA64_RS_CR_IRR
:
8626 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8627 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8629 && idesc
->operands
[1] == IA64_OPND_CR3
8632 for (i
= 0; i
< 4; i
++)
8634 specs
[count
] = tmpl
;
8635 specs
[count
++].index
= CR_IRR0
+ i
;
8641 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8642 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8644 && regno
<= CR_IRR3
)
8646 specs
[count
] = tmpl
;
8647 specs
[count
++].index
= regno
;
8656 case IA64_RS_CR_IIB
:
8663 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8664 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8665 && (regno
== CR_IIB0
|| regno
== CR_IIB1
))
8667 specs
[count
] = tmpl
;
8668 specs
[count
++].index
= regno
;
8673 case IA64_RS_CR_LRR
:
8680 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8681 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8682 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8684 specs
[count
] = tmpl
;
8685 specs
[count
++].index
= regno
;
8693 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8695 specs
[count
] = tmpl
;
8696 specs
[count
++].index
=
8697 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8709 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DAHR3
)
8711 specs
[count
] = tmpl
;
8712 specs
[count
++].index
=
8713 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_DAHR
;
8728 else if (rsrc_write
)
8730 if (dep
->specifier
== IA64_RS_FRb
8731 && idesc
->operands
[0] == IA64_OPND_F1
)
8733 specs
[count
] = tmpl
;
8734 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8739 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8741 if (idesc
->operands
[i
] == IA64_OPND_F2
8742 || idesc
->operands
[i
] == IA64_OPND_F3
8743 || idesc
->operands
[i
] == IA64_OPND_F4
)
8745 specs
[count
] = tmpl
;
8746 specs
[count
++].index
=
8747 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8756 /* This reference applies only to the GR whose value is loaded with
8757 data returned from memory. */
8758 specs
[count
] = tmpl
;
8759 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8765 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8766 if (idesc
->operands
[i
] == IA64_OPND_R1
8767 || idesc
->operands
[i
] == IA64_OPND_R2
8768 || idesc
->operands
[i
] == IA64_OPND_R3
)
8770 specs
[count
] = tmpl
;
8771 specs
[count
++].index
=
8772 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8774 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8775 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8776 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8778 specs
[count
] = tmpl
;
8779 specs
[count
++].index
=
8780 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8785 /* Look for anything that reads a GR. */
8786 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8788 if (idesc
->operands
[i
] == IA64_OPND_MR3
8789 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8790 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8791 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8792 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8793 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8794 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8795 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8796 || idesc
->operands
[i
] == IA64_OPND_DAHR_R3
8797 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8798 || ((i
>= idesc
->num_outputs
)
8799 && (idesc
->operands
[i
] == IA64_OPND_R1
8800 || idesc
->operands
[i
] == IA64_OPND_R2
8801 || idesc
->operands
[i
] == IA64_OPND_R3
8802 /* addl source register. */
8803 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8805 specs
[count
] = tmpl
;
8806 specs
[count
++].index
=
8807 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8818 /* This is the same as IA64_RS_PRr, except that the register range is
8819 from 1 - 15, and there are no rotating register reads/writes here. */
8823 for (i
= 1; i
< 16; i
++)
8825 specs
[count
] = tmpl
;
8826 specs
[count
++].index
= i
;
8832 /* Mark only those registers indicated by the mask. */
8835 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8836 for (i
= 1; i
< 16; i
++)
8837 if (mask
& ((valueT
) 1 << i
))
8839 specs
[count
] = tmpl
;
8840 specs
[count
++].index
= i
;
8848 else if (note
== 11) /* note 11 implies note 1 as well */
8852 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8854 if (idesc
->operands
[i
] == IA64_OPND_P1
8855 || idesc
->operands
[i
] == IA64_OPND_P2
)
8857 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8858 if (regno
>= 1 && regno
< 16)
8860 specs
[count
] = tmpl
;
8861 specs
[count
++].index
= regno
;
8871 else if (note
== 12)
8873 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8875 specs
[count
] = tmpl
;
8876 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8883 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8884 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8885 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8886 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8888 if ((idesc
->operands
[0] == IA64_OPND_P1
8889 || idesc
->operands
[0] == IA64_OPND_P2
)
8890 && p1
>= 1 && p1
< 16)
8892 specs
[count
] = tmpl
;
8893 specs
[count
].cmp_type
=
8894 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8895 specs
[count
++].index
= p1
;
8897 if ((idesc
->operands
[1] == IA64_OPND_P1
8898 || idesc
->operands
[1] == IA64_OPND_P2
)
8899 && p2
>= 1 && p2
< 16)
8901 specs
[count
] = tmpl
;
8902 specs
[count
].cmp_type
=
8903 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8904 specs
[count
++].index
= p2
;
8909 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8911 specs
[count
] = tmpl
;
8912 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8914 if (idesc
->operands
[1] == IA64_OPND_PR
)
8916 for (i
= 1; i
< 16; i
++)
8918 specs
[count
] = tmpl
;
8919 specs
[count
++].index
= i
;
8930 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8931 simplified cases of this. */
8935 for (i
= 16; i
< 63; i
++)
8937 specs
[count
] = tmpl
;
8938 specs
[count
++].index
= i
;
8944 /* Mark only those registers indicated by the mask. */
8946 && idesc
->operands
[0] == IA64_OPND_PR
)
8948 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8949 if (mask
& ((valueT
) 1 << 16))
8950 for (i
= 16; i
< 63; i
++)
8952 specs
[count
] = tmpl
;
8953 specs
[count
++].index
= i
;
8957 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8959 for (i
= 16; i
< 63; i
++)
8961 specs
[count
] = tmpl
;
8962 specs
[count
++].index
= i
;
8970 else if (note
== 11) /* note 11 implies note 1 as well */
8974 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8976 if (idesc
->operands
[i
] == IA64_OPND_P1
8977 || idesc
->operands
[i
] == IA64_OPND_P2
)
8979 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8980 if (regno
>= 16 && regno
< 63)
8982 specs
[count
] = tmpl
;
8983 specs
[count
++].index
= regno
;
8993 else if (note
== 12)
8995 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8997 specs
[count
] = tmpl
;
8998 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9005 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9006 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9007 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9008 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9010 if ((idesc
->operands
[0] == IA64_OPND_P1
9011 || idesc
->operands
[0] == IA64_OPND_P2
)
9012 && p1
>= 16 && p1
< 63)
9014 specs
[count
] = tmpl
;
9015 specs
[count
].cmp_type
=
9016 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9017 specs
[count
++].index
= p1
;
9019 if ((idesc
->operands
[1] == IA64_OPND_P1
9020 || idesc
->operands
[1] == IA64_OPND_P2
)
9021 && p2
>= 16 && p2
< 63)
9023 specs
[count
] = tmpl
;
9024 specs
[count
].cmp_type
=
9025 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9026 specs
[count
++].index
= p2
;
9031 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9033 specs
[count
] = tmpl
;
9034 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9036 if (idesc
->operands
[1] == IA64_OPND_PR
)
9038 for (i
= 16; i
< 63; i
++)
9040 specs
[count
] = tmpl
;
9041 specs
[count
++].index
= i
;
9053 /* Verify that the instruction is using the PSR bit indicated in
9057 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9059 if (dep
->regindex
< 6)
9061 specs
[count
++] = tmpl
;
9064 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9066 if (dep
->regindex
< 32
9067 || dep
->regindex
== 35
9068 || dep
->regindex
== 36
9069 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9071 specs
[count
++] = tmpl
;
9074 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9076 if (dep
->regindex
< 32
9077 || dep
->regindex
== 35
9078 || dep
->regindex
== 36
9079 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9081 specs
[count
++] = tmpl
;
9086 /* Several PSR bits have very specific dependencies. */
9087 switch (dep
->regindex
)
9090 specs
[count
++] = tmpl
;
9095 specs
[count
++] = tmpl
;
9099 /* Only certain CR accesses use PSR.ic */
9100 if (idesc
->operands
[0] == IA64_OPND_CR3
9101 || idesc
->operands
[1] == IA64_OPND_CR3
)
9104 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9107 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_CR
;
9124 specs
[count
++] = tmpl
;
9133 specs
[count
++] = tmpl
;
9137 /* Only some AR accesses use cpl */
9138 if (idesc
->operands
[0] == IA64_OPND_AR3
9139 || idesc
->operands
[1] == IA64_OPND_AR3
)
9142 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9145 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_AR
;
9152 && regno
<= AR_K7
))))
9154 specs
[count
++] = tmpl
;
9159 specs
[count
++] = tmpl
;
9169 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9171 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9177 if (mask
& ((valueT
) 1 << dep
->regindex
))
9179 specs
[count
++] = tmpl
;
9184 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9185 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9186 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9187 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9189 if (idesc
->operands
[i
] == IA64_OPND_F1
9190 || idesc
->operands
[i
] == IA64_OPND_F2
9191 || idesc
->operands
[i
] == IA64_OPND_F3
9192 || idesc
->operands
[i
] == IA64_OPND_F4
)
9194 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9195 if (reg
>= min
&& reg
<= max
)
9197 specs
[count
++] = tmpl
;
9204 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9205 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9206 /* mfh is read on writes to FR32-127; mfl is read on writes to
9208 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9210 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9212 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9213 if (reg
>= min
&& reg
<= max
)
9215 specs
[count
++] = tmpl
;
9220 else if (note
== 10)
9222 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9224 if (idesc
->operands
[i
] == IA64_OPND_R1
9225 || idesc
->operands
[i
] == IA64_OPND_R2
9226 || idesc
->operands
[i
] == IA64_OPND_R3
)
9228 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9229 if (regno
>= 16 && regno
<= 31)
9231 specs
[count
++] = tmpl
;
9242 case IA64_RS_AR_FPSR
:
9243 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9245 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9246 if (regno
== AR_FPSR
)
9248 specs
[count
++] = tmpl
;
9253 specs
[count
++] = tmpl
;
9258 /* Handle all AR[REG] resources */
9259 if (note
== 0 || note
== 1)
9261 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9262 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9263 && regno
== dep
->regindex
)
9265 specs
[count
++] = tmpl
;
9267 /* other AR[REG] resources may be affected by AR accesses */
9268 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9271 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9272 switch (dep
->regindex
)
9278 if (regno
== AR_BSPSTORE
)
9280 specs
[count
++] = tmpl
;
9285 (regno
== AR_BSPSTORE
9286 || regno
== AR_RNAT
))
9288 specs
[count
++] = tmpl
;
9293 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9296 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9297 switch (dep
->regindex
)
9302 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9304 specs
[count
++] = tmpl
;
9311 specs
[count
++] = tmpl
;
9321 /* Handle all CR[REG] resources.
9322 ??? FIXME: The rule 17 isn't really handled correctly. */
9323 if (note
== 0 || note
== 1 || note
== 17)
9325 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9327 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9328 if (regno
== dep
->regindex
)
9330 specs
[count
++] = tmpl
;
9332 else if (!rsrc_write
)
9334 /* Reads from CR[IVR] affect other resources. */
9335 if (regno
== CR_IVR
)
9337 if ((dep
->regindex
>= CR_IRR0
9338 && dep
->regindex
<= CR_IRR3
)
9339 || dep
->regindex
== CR_TPR
)
9341 specs
[count
++] = tmpl
;
9348 specs
[count
++] = tmpl
;
9357 case IA64_RS_INSERVICE
:
9358 /* look for write of EOI (67) or read of IVR (65) */
9359 if ((idesc
->operands
[0] == IA64_OPND_CR3
9360 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9361 || (idesc
->operands
[1] == IA64_OPND_CR3
9362 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9364 specs
[count
++] = tmpl
;
9371 specs
[count
++] = tmpl
;
9382 specs
[count
++] = tmpl
;
9386 /* Check if any of the registers accessed are in the rotating region.
9387 mov to/from pr accesses CFM only when qp_regno is in the rotating
9389 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9391 if (idesc
->operands
[i
] == IA64_OPND_R1
9392 || idesc
->operands
[i
] == IA64_OPND_R2
9393 || idesc
->operands
[i
] == IA64_OPND_R3
)
9395 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9396 /* Assumes that md.rot.num_regs is always valid */
9397 if (md
.rot
.num_regs
> 0
9399 && num
< 31 + md
.rot
.num_regs
)
9401 specs
[count
] = tmpl
;
9402 specs
[count
++].specific
= 0;
9405 else if (idesc
->operands
[i
] == IA64_OPND_F1
9406 || idesc
->operands
[i
] == IA64_OPND_F2
9407 || idesc
->operands
[i
] == IA64_OPND_F3
9408 || idesc
->operands
[i
] == IA64_OPND_F4
)
9410 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9413 specs
[count
] = tmpl
;
9414 specs
[count
++].specific
= 0;
9417 else if (idesc
->operands
[i
] == IA64_OPND_P1
9418 || idesc
->operands
[i
] == IA64_OPND_P2
)
9420 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9423 specs
[count
] = tmpl
;
9424 specs
[count
++].specific
= 0;
9428 if (CURR_SLOT
.qp_regno
> 15)
9430 specs
[count
] = tmpl
;
9431 specs
[count
++].specific
= 0;
9436 /* This is the same as IA64_RS_PRr, except simplified to account for
9437 the fact that there is only one register. */
9441 specs
[count
++] = tmpl
;
9446 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9447 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9448 if (mask
& ((valueT
) 1 << 63))
9449 specs
[count
++] = tmpl
;
9451 else if (note
== 11)
9453 if ((idesc
->operands
[0] == IA64_OPND_P1
9454 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9455 || (idesc
->operands
[1] == IA64_OPND_P2
9456 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9458 specs
[count
++] = tmpl
;
9461 else if (note
== 12)
9463 if (CURR_SLOT
.qp_regno
== 63)
9465 specs
[count
++] = tmpl
;
9472 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9473 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9474 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9475 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9478 && (idesc
->operands
[0] == IA64_OPND_P1
9479 || idesc
->operands
[0] == IA64_OPND_P2
))
9481 specs
[count
] = tmpl
;
9482 specs
[count
++].cmp_type
=
9483 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9486 && (idesc
->operands
[1] == IA64_OPND_P1
9487 || idesc
->operands
[1] == IA64_OPND_P2
))
9489 specs
[count
] = tmpl
;
9490 specs
[count
++].cmp_type
=
9491 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9496 if (CURR_SLOT
.qp_regno
== 63)
9498 specs
[count
++] = tmpl
;
9509 /* FIXME we can identify some individual RSE written resources, but RSE
9510 read resources have not yet been completely identified, so for now
9511 treat RSE as a single resource */
9512 if (startswith (idesc
->name
, "mov"))
9516 if (idesc
->operands
[0] == IA64_OPND_AR3
9517 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9519 specs
[count
++] = tmpl
;
9524 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9526 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9527 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9529 specs
[count
++] = tmpl
;
9532 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9534 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9535 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9536 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9538 specs
[count
++] = tmpl
;
9545 specs
[count
++] = tmpl
;
9550 /* FIXME -- do any of these need to be non-specific? */
9551 specs
[count
++] = tmpl
;
9555 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9562 /* Clear branch flags on marked resources. This breaks the link between the
9563 QP of the marking instruction and a subsequent branch on the same QP. */
9566 clear_qp_branch_flag (valueT mask
)
9569 for (i
= 0; i
< regdepslen
; i
++)
9571 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9572 if ((bit
& mask
) != 0)
9574 regdeps
[i
].link_to_qp_branch
= 0;
9579 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9580 any mutexes which contain one of the PRs and create new ones when
9584 update_qp_mutex (valueT mask
)
9590 while (i
< qp_mutexeslen
)
9592 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9594 /* If it destroys and creates the same mutex, do nothing. */
9595 if (qp_mutexes
[i
].prmask
== mask
9596 && qp_mutexes
[i
].path
== md
.path
)
9607 fprintf (stderr
, " Clearing mutex relation");
9608 print_prmask (qp_mutexes
[i
].prmask
);
9609 fprintf (stderr
, "\n");
9612 /* Deal with the old mutex with more than 3+ PRs only if
9613 the new mutex on the same execution path with it.
9615 FIXME: The 3+ mutex support is incomplete.
9616 dot_pred_rel () may be a better place to fix it. */
9617 if (qp_mutexes
[i
].path
== md
.path
)
9619 /* If it is a proper subset of the mutex, create a
9622 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9625 qp_mutexes
[i
].prmask
&= ~mask
;
9626 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9628 /* Modify the mutex if there are more than one
9636 /* Remove the mutex. */
9637 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9645 add_qp_mutex (mask
);
9650 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9652 Any changes to a PR clears the mutex relations which include that PR. */
9655 clear_qp_mutex (valueT mask
)
9660 while (i
< qp_mutexeslen
)
9662 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9666 fprintf (stderr
, " Clearing mutex relation");
9667 print_prmask (qp_mutexes
[i
].prmask
);
9668 fprintf (stderr
, "\n");
9670 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9677 /* Clear implies relations which contain PRs in the given masks.
9678 P1_MASK indicates the source of the implies relation, while P2_MASK
9679 indicates the implied PR. */
9682 clear_qp_implies (valueT p1_mask
, valueT p2_mask
)
9687 while (i
< qp_implieslen
)
9689 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9690 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9693 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9694 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9695 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9702 /* Add the PRs specified to the list of implied relations. */
9705 add_qp_imply (int p1
, int p2
)
9711 /* p0 is not meaningful here. */
9712 if (p1
== 0 || p2
== 0)
9718 /* If it exists already, ignore it. */
9719 for (i
= 0; i
< qp_implieslen
; i
++)
9721 if (qp_implies
[i
].p1
== p1
9722 && qp_implies
[i
].p2
== p2
9723 && qp_implies
[i
].path
== md
.path
9724 && !qp_implies
[i
].p2_branched
)
9728 if (qp_implieslen
== qp_impliestotlen
)
9730 qp_impliestotlen
+= 20;
9731 qp_implies
= XRESIZEVEC (struct qp_imply
, qp_implies
, qp_impliestotlen
);
9734 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9735 qp_implies
[qp_implieslen
].p1
= p1
;
9736 qp_implies
[qp_implieslen
].p2
= p2
;
9737 qp_implies
[qp_implieslen
].path
= md
.path
;
9738 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9740 /* Add in the implied transitive relations; for everything that p2 implies,
9741 make p1 imply that, too; for everything that implies p1, make it imply p2
9743 for (i
= 0; i
< qp_implieslen
; i
++)
9745 if (qp_implies
[i
].p1
== p2
)
9746 add_qp_imply (p1
, qp_implies
[i
].p2
);
9747 if (qp_implies
[i
].p2
== p1
)
9748 add_qp_imply (qp_implies
[i
].p1
, p2
);
9750 /* Add in mutex relations implied by this implies relation; for each mutex
9751 relation containing p2, duplicate it and replace p2 with p1. */
9752 bit
= (valueT
) 1 << p1
;
9753 mask
= (valueT
) 1 << p2
;
9754 for (i
= 0; i
< qp_mutexeslen
; i
++)
9756 if (qp_mutexes
[i
].prmask
& mask
)
9757 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9761 /* Add the PRs specified in the mask to the mutex list; this means that only
9762 one of the PRs can be true at any time. PR0 should never be included in
9766 add_qp_mutex (valueT mask
)
9771 if (qp_mutexeslen
== qp_mutexestotlen
)
9773 qp_mutexestotlen
+= 20;
9774 qp_mutexes
= XRESIZEVEC (struct qpmutex
, qp_mutexes
, qp_mutexestotlen
);
9778 fprintf (stderr
, " Registering mutex on");
9779 print_prmask (mask
);
9780 fprintf (stderr
, "\n");
9782 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9783 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9787 has_suffix_p (const char *name
, const char *suffix
)
9789 size_t namelen
= strlen (name
);
9790 size_t sufflen
= strlen (suffix
);
9792 if (namelen
<= sufflen
)
9794 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9798 clear_register_values (void)
9802 fprintf (stderr
, " Clearing register values\n");
9803 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9804 gr_values
[i
].known
= 0;
9807 /* Keep track of register values/changes which affect DV tracking.
9809 optimization note: should add a flag to classes of insns where otherwise we
9810 have to examine a group of strings to identify them. */
9813 note_register_values (struct ia64_opcode
*idesc
)
9815 valueT qp_changemask
= 0;
9818 /* Invalidate values for registers being written to. */
9819 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9821 if (idesc
->operands
[i
] == IA64_OPND_R1
9822 || idesc
->operands
[i
] == IA64_OPND_R2
9823 || idesc
->operands
[i
] == IA64_OPND_R3
)
9825 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9826 if (regno
> 0 && regno
< NELEMS (gr_values
))
9827 gr_values
[regno
].known
= 0;
9829 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9831 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9832 if (regno
> 0 && regno
< 4)
9833 gr_values
[regno
].known
= 0;
9835 else if (idesc
->operands
[i
] == IA64_OPND_P1
9836 || idesc
->operands
[i
] == IA64_OPND_P2
)
9838 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9839 qp_changemask
|= (valueT
) 1 << regno
;
9841 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9843 if (idesc
->operands
[2] & (valueT
) 0x10000)
9844 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9846 qp_changemask
= idesc
->operands
[2];
9849 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9851 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9852 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9854 qp_changemask
= idesc
->operands
[1];
9855 qp_changemask
&= ~(valueT
) 0xFFFF;
9860 /* Always clear qp branch flags on any PR change. */
9861 /* FIXME there may be exceptions for certain compares. */
9862 clear_qp_branch_flag (qp_changemask
);
9864 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9865 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9867 qp_changemask
|= ~(valueT
) 0xFFFF;
9868 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9870 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9871 gr_values
[i
].known
= 0;
9873 clear_qp_mutex (qp_changemask
);
9874 clear_qp_implies (qp_changemask
, qp_changemask
);
9876 /* After a call, all register values are undefined, except those marked
9878 else if (startswith (idesc
->name
, "br.call")
9879 || startswith (idesc
->name
, "brl.call"))
9881 /* FIXME keep GR values which are marked as "safe_across_calls" */
9882 clear_register_values ();
9883 clear_qp_mutex (~qp_safe_across_calls
);
9884 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9885 clear_qp_branch_flag (~qp_safe_across_calls
);
9887 else if (is_interruption_or_rfi (idesc
)
9888 || is_taken_branch (idesc
))
9890 clear_register_values ();
9891 clear_qp_mutex (~(valueT
) 0);
9892 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9894 /* Look for mutex and implies relations. */
9895 else if ((idesc
->operands
[0] == IA64_OPND_P1
9896 || idesc
->operands
[0] == IA64_OPND_P2
)
9897 && (idesc
->operands
[1] == IA64_OPND_P1
9898 || idesc
->operands
[1] == IA64_OPND_P2
))
9900 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9901 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9902 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9903 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9905 /* If both PRs are PR0, we can't really do anything. */
9906 if (p1
== 0 && p2
== 0)
9909 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9911 /* In general, clear mutexes and implies which include P1 or P2,
9912 with the following exceptions. */
9913 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9914 || has_suffix_p (idesc
->name
, ".and.orcm"))
9916 clear_qp_implies (p2mask
, p1mask
);
9918 else if (has_suffix_p (idesc
->name
, ".andcm")
9919 || has_suffix_p (idesc
->name
, ".and"))
9921 clear_qp_implies (0, p1mask
| p2mask
);
9923 else if (has_suffix_p (idesc
->name
, ".orcm")
9924 || has_suffix_p (idesc
->name
, ".or"))
9926 clear_qp_mutex (p1mask
| p2mask
);
9927 clear_qp_implies (p1mask
| p2mask
, 0);
9933 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9935 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9936 if (p1
== 0 || p2
== 0)
9937 clear_qp_mutex (p1mask
| p2mask
);
9939 added
= update_qp_mutex (p1mask
| p2mask
);
9941 if (CURR_SLOT
.qp_regno
== 0
9942 || has_suffix_p (idesc
->name
, ".unc"))
9944 if (added
== 0 && p1
&& p2
)
9945 add_qp_mutex (p1mask
| p2mask
);
9946 if (CURR_SLOT
.qp_regno
!= 0)
9949 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9951 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9956 /* Look for mov imm insns into GRs. */
9957 else if (idesc
->operands
[0] == IA64_OPND_R1
9958 && (idesc
->operands
[1] == IA64_OPND_IMM22
9959 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9960 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9961 && (strcmp (idesc
->name
, "mov") == 0
9962 || strcmp (idesc
->name
, "movl") == 0))
9964 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9965 if (regno
> 0 && regno
< NELEMS (gr_values
))
9967 gr_values
[regno
].known
= 1;
9968 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9969 gr_values
[regno
].path
= md
.path
;
9972 fprintf (stderr
, " Know gr%d = ", regno
);
9973 fprintf_vma (stderr
, gr_values
[regno
].value
);
9974 fputs ("\n", stderr
);
9978 /* Look for dep.z imm insns. */
9979 else if (idesc
->operands
[0] == IA64_OPND_R1
9980 && idesc
->operands
[1] == IA64_OPND_IMM8
9981 && strcmp (idesc
->name
, "dep.z") == 0)
9983 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9984 if (regno
> 0 && regno
< NELEMS (gr_values
))
9986 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9988 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9989 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9990 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9991 gr_values
[regno
].known
= 1;
9992 gr_values
[regno
].value
= value
;
9993 gr_values
[regno
].path
= md
.path
;
9996 fprintf (stderr
, " Know gr%d = ", regno
);
9997 fprintf_vma (stderr
, gr_values
[regno
].value
);
9998 fputs ("\n", stderr
);
10004 clear_qp_mutex (qp_changemask
);
10005 clear_qp_implies (qp_changemask
, qp_changemask
);
10009 /* Return whether the given predicate registers are currently mutex. */
10012 qp_mutex (int p1
, int p2
, int path
)
10019 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10020 for (i
= 0; i
< qp_mutexeslen
; i
++)
10022 if (qp_mutexes
[i
].path
>= path
10023 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10030 /* Return whether the given resource is in the given insn's list of chks
10031 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10035 resources_match (struct rsrc
*rs
,
10036 struct ia64_opcode
*idesc
,
10041 struct rsrc specs
[MAX_SPECS
];
10044 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10045 we don't need to check. One exception is note 11, which indicates that
10046 target predicates are written regardless of PR[qp]. */
10047 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10051 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10052 while (count
-- > 0)
10054 /* UNAT checking is a bit more specific than other resources */
10055 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10056 && specs
[count
].mem_offset
.hint
10057 && rs
->mem_offset
.hint
)
10059 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10061 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10062 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10069 /* Skip apparent PR write conflicts where both writes are an AND or both
10070 writes are an OR. */
10071 if (rs
->dependency
->specifier
== IA64_RS_PR
10072 || rs
->dependency
->specifier
== IA64_RS_PRr
10073 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10075 if (specs
[count
].cmp_type
!= CMP_NONE
10076 && specs
[count
].cmp_type
== rs
->cmp_type
)
10079 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10080 dv_mode
[rs
->dependency
->mode
],
10081 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10082 specs
[count
].index
: 63);
10087 " %s on parallel compare conflict %s vs %s on PR%d\n",
10088 dv_mode
[rs
->dependency
->mode
],
10089 dv_cmp_type
[rs
->cmp_type
],
10090 dv_cmp_type
[specs
[count
].cmp_type
],
10091 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10092 specs
[count
].index
: 63);
10096 /* If either resource is not specific, conservatively assume a conflict
10098 if (!specs
[count
].specific
|| !rs
->specific
)
10100 else if (specs
[count
].index
== rs
->index
)
10107 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10108 insert a stop to create the break. Update all resource dependencies
10109 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10110 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10111 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10115 insn_group_break (int insert_stop
, int qp_regno
, int save_current
)
10119 if (insert_stop
&& md
.num_slots_in_use
> 0)
10120 PREV_SLOT
.end_of_insn_group
= 1;
10124 fprintf (stderr
, " Insn group break%s",
10125 (insert_stop
? " (w/stop)" : ""));
10127 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10128 fprintf (stderr
, "\n");
10132 while (i
< regdepslen
)
10134 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10137 && regdeps
[i
].qp_regno
!= qp_regno
)
10144 && CURR_SLOT
.src_file
== regdeps
[i
].file
10145 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10151 /* clear dependencies which are automatically cleared by a stop, or
10152 those that have reached the appropriate state of insn serialization */
10153 if (dep
->semantics
== IA64_DVS_IMPLIED
10154 || dep
->semantics
== IA64_DVS_IMPLIEDF
10155 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10157 print_dependency ("Removing", i
);
10158 regdeps
[i
] = regdeps
[--regdepslen
];
10162 if (dep
->semantics
== IA64_DVS_DATA
10163 || dep
->semantics
== IA64_DVS_INSTR
10164 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10166 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10167 regdeps
[i
].insn_srlz
= STATE_STOP
;
10168 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10169 regdeps
[i
].data_srlz
= STATE_STOP
;
10176 /* Add the given resource usage spec to the list of active dependencies. */
10179 mark_resource (struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
,
10180 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
,
10185 if (regdepslen
== regdepstotlen
)
10187 regdepstotlen
+= 20;
10188 regdeps
= XRESIZEVEC (struct rsrc
, regdeps
, regdepstotlen
);
10191 regdeps
[regdepslen
] = *spec
;
10192 regdeps
[regdepslen
].depind
= depind
;
10193 regdeps
[regdepslen
].path
= path
;
10194 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10195 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10197 print_dependency ("Adding", regdepslen
);
10203 print_dependency (const char *action
, int depind
)
10207 fprintf (stderr
, " %s %s '%s'",
10208 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10209 (regdeps
[depind
].dependency
)->name
);
10210 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10211 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10212 if (regdeps
[depind
].mem_offset
.hint
)
10214 fputs (" ", stderr
);
10215 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10216 fputs ("+", stderr
);
10217 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10219 fprintf (stderr
, "\n");
10224 instruction_serialization (void)
10228 fprintf (stderr
, " Instruction serialization\n");
10229 for (i
= 0; i
< regdepslen
; i
++)
10230 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10231 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10235 data_serialization (void)
10239 fprintf (stderr
, " Data serialization\n");
10240 while (i
< regdepslen
)
10242 if (regdeps
[i
].data_srlz
== STATE_STOP
10243 /* Note: as of 991210, all "other" dependencies are cleared by a
10244 data serialization. This might change with new tables */
10245 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10247 print_dependency ("Removing", i
);
10248 regdeps
[i
] = regdeps
[--regdepslen
];
10255 /* Insert stops and serializations as needed to avoid DVs. */
10258 remove_marked_resource (struct rsrc
*rs
)
10260 switch (rs
->dependency
->semantics
)
10262 case IA64_DVS_SPECIFIC
:
10264 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10265 /* Fall through. */
10266 case IA64_DVS_INSTR
:
10268 fprintf (stderr
, "Inserting instr serialization\n");
10269 if (rs
->insn_srlz
< STATE_STOP
)
10270 insn_group_break (1, 0, 0);
10271 if (rs
->insn_srlz
< STATE_SRLZ
)
10273 struct slot oldslot
= CURR_SLOT
;
10274 /* Manually jam a srlz.i insn into the stream */
10275 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10276 CURR_SLOT
.user_template
= -1;
10277 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10278 instruction_serialization ();
10279 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10280 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10281 emit_one_bundle ();
10282 CURR_SLOT
= oldslot
;
10284 insn_group_break (1, 0, 0);
10286 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10287 "other" types of DV are eliminated
10288 by a data serialization */
10289 case IA64_DVS_DATA
:
10291 fprintf (stderr
, "Inserting data serialization\n");
10292 if (rs
->data_srlz
< STATE_STOP
)
10293 insn_group_break (1, 0, 0);
10295 struct slot oldslot
= CURR_SLOT
;
10296 /* Manually jam a srlz.d insn into the stream */
10297 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10298 CURR_SLOT
.user_template
= -1;
10299 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10300 data_serialization ();
10301 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10302 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10303 emit_one_bundle ();
10304 CURR_SLOT
= oldslot
;
10307 case IA64_DVS_IMPLIED
:
10308 case IA64_DVS_IMPLIEDF
:
10310 fprintf (stderr
, "Inserting stop\n");
10311 insn_group_break (1, 0, 0);
10318 /* Check the resources used by the given opcode against the current dependency
10321 The check is run once for each execution path encountered. In this case,
10322 a unique execution path is the sequence of instructions following a code
10323 entry point, e.g. the following has three execution paths, one starting
10324 at L0, one at L1, and one at L2.
10333 check_dependencies (struct ia64_opcode
*idesc
)
10335 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10339 /* Note that the number of marked resources may change within the
10340 loop if in auto mode. */
10342 while (i
< regdepslen
)
10344 struct rsrc
*rs
= ®deps
[i
];
10345 const struct ia64_dependency
*dep
= rs
->dependency
;
10348 int start_over
= 0;
10350 if (dep
->semantics
== IA64_DVS_NONE
10351 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10357 note
= NOTE (opdeps
->chks
[chkind
]);
10359 /* Check this resource against each execution path seen thus far. */
10360 for (path
= 0; path
<= md
.path
; path
++)
10364 /* If the dependency wasn't on the path being checked, ignore it. */
10365 if (rs
->path
< path
)
10368 /* If the QP for this insn implies a QP which has branched, don't
10369 bother checking. Ed. NOTE: I don't think this check is terribly
10370 useful; what's the point of generating code which will only be
10371 reached if its QP is zero?
10372 This code was specifically inserted to handle the following code,
10373 based on notes from Intel's DV checking code, where p1 implies p2.
10379 if (CURR_SLOT
.qp_regno
!= 0)
10383 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10385 if (qp_implies
[implies
].path
>= path
10386 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10387 && qp_implies
[implies
].p2_branched
)
10397 if ((matchtype
= resources_match (rs
, idesc
, note
,
10398 CURR_SLOT
.qp_regno
, path
)) != 0)
10401 char pathmsg
[256] = "";
10402 char indexmsg
[256] = "";
10403 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10406 snprintf (pathmsg
, sizeof (pathmsg
),
10407 " when entry is at label '%s'",
10408 md
.entry_labels
[path
- 1]);
10409 if (matchtype
== 1 && rs
->index
>= 0)
10410 snprintf (indexmsg
, sizeof (indexmsg
),
10411 ", specific resource number is %d",
10413 snprintf (msg
, sizeof (msg
),
10414 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10416 (certain
? "violates" : "may violate"),
10417 dv_mode
[dep
->mode
], dep
->name
,
10418 dv_sem
[dep
->semantics
],
10419 pathmsg
, indexmsg
);
10421 if (md
.explicit_mode
)
10423 as_warn ("%s", msg
);
10424 if (path
< md
.path
)
10425 as_warn (_("Only the first path encountering the conflict is reported"));
10426 as_warn_where (rs
->file
, rs
->line
,
10427 _("This is the location of the conflicting usage"));
10428 /* Don't bother checking other paths, to avoid duplicating
10429 the same warning */
10435 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10437 remove_marked_resource (rs
);
10439 /* since the set of dependencies has changed, start over */
10440 /* FIXME -- since we're removing dvs as we go, we
10441 probably don't really need to start over... */
10454 /* Register new dependencies based on the given opcode. */
10457 mark_resources (struct ia64_opcode
*idesc
)
10460 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10461 int add_only_qp_reads
= 0;
10463 /* A conditional branch only uses its resources if it is taken; if it is
10464 taken, we stop following that path. The other branch types effectively
10465 *always* write their resources. If it's not taken, register only QP
10467 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10469 add_only_qp_reads
= 1;
10473 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10475 for (i
= 0; i
< opdeps
->nregs
; i
++)
10477 const struct ia64_dependency
*dep
;
10478 struct rsrc specs
[MAX_SPECS
];
10483 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10484 note
= NOTE (opdeps
->regs
[i
]);
10486 if (add_only_qp_reads
10487 && !(dep
->mode
== IA64_DV_WAR
10488 && (dep
->specifier
== IA64_RS_PR
10489 || dep
->specifier
== IA64_RS_PRr
10490 || dep
->specifier
== IA64_RS_PR63
)))
10493 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10495 while (count
-- > 0)
10497 mark_resource (idesc
, dep
, &specs
[count
],
10498 DEP (opdeps
->regs
[i
]), md
.path
);
10501 /* The execution path may affect register values, which may in turn
10502 affect which indirect-access resources are accessed. */
10503 switch (dep
->specifier
)
10507 case IA64_RS_CPUID
:
10515 for (path
= 0; path
< md
.path
; path
++)
10517 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10518 while (count
-- > 0)
10519 mark_resource (idesc
, dep
, &specs
[count
],
10520 DEP (opdeps
->regs
[i
]), path
);
10527 /* Remove dependencies when they no longer apply. */
10530 update_dependencies (struct ia64_opcode
*idesc
)
10534 if (strcmp (idesc
->name
, "srlz.i") == 0)
10536 instruction_serialization ();
10538 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10540 data_serialization ();
10542 else if (is_interruption_or_rfi (idesc
)
10543 || is_taken_branch (idesc
))
10545 /* Although technically the taken branch doesn't clear dependencies
10546 which require a srlz.[id], we don't follow the branch; the next
10547 instruction is assumed to start with a clean slate. */
10551 else if (is_conditional_branch (idesc
)
10552 && CURR_SLOT
.qp_regno
!= 0)
10554 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10556 for (i
= 0; i
< qp_implieslen
; i
++)
10558 /* If the conditional branch's predicate is implied by the predicate
10559 in an existing dependency, remove that dependency. */
10560 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10563 /* Note that this implied predicate takes a branch so that if
10564 a later insn generates a DV but its predicate implies this
10565 one, we can avoid the false DV warning. */
10566 qp_implies
[i
].p2_branched
= 1;
10567 while (depind
< regdepslen
)
10569 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10571 print_dependency ("Removing", depind
);
10572 regdeps
[depind
] = regdeps
[--regdepslen
];
10579 /* Any marked resources which have this same predicate should be
10580 cleared, provided that the QP hasn't been modified between the
10581 marking instruction and the branch. */
10584 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10589 while (i
< regdepslen
)
10591 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10592 && regdeps
[i
].link_to_qp_branch
10593 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10594 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10596 /* Treat like a taken branch */
10597 print_dependency ("Removing", i
);
10598 regdeps
[i
] = regdeps
[--regdepslen
];
10607 /* Examine the current instruction for dependency violations. */
10610 check_dv (struct ia64_opcode
*idesc
)
10614 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10615 idesc
->name
, CURR_SLOT
.src_line
,
10616 idesc
->dependencies
->nchks
,
10617 idesc
->dependencies
->nregs
);
10620 /* Look through the list of currently marked resources; if the current
10621 instruction has the dependency in its chks list which uses that resource,
10622 check against the specific resources used. */
10623 check_dependencies (idesc
);
10625 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10626 then add them to the list of marked resources. */
10627 mark_resources (idesc
);
10629 /* There are several types of dependency semantics, and each has its own
10630 requirements for being cleared
10632 Instruction serialization (insns separated by interruption, rfi, or
10633 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10635 Data serialization (instruction serialization, or writer + srlz.d +
10636 reader, where writer and srlz.d are in separate groups) clears
10637 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10638 always be the case).
10640 Instruction group break (groups separated by stop, taken branch,
10641 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10643 update_dependencies (idesc
);
10645 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10646 warning. Keep track of as many as possible that are useful. */
10647 note_register_values (idesc
);
10649 /* We don't need or want this anymore. */
10650 md
.mem_offset
.hint
= 0;
10655 /* Translate one line of assembly. Pseudo ops and labels do not show
10658 md_assemble (char *str
)
10660 char *saved_input_line_pointer
, *temp
;
10661 const char *mnemonic
;
10662 const struct pseudo_opcode
*pdesc
;
10663 struct ia64_opcode
*idesc
;
10664 unsigned char qp_regno
;
10665 unsigned int flags
;
10668 saved_input_line_pointer
= input_line_pointer
;
10669 input_line_pointer
= str
;
10671 /* extract the opcode (mnemonic): */
10673 ch
= get_symbol_name (&temp
);
10675 pdesc
= (struct pseudo_opcode
*) str_hash_find (md
.pseudo_hash
, mnemonic
);
10678 (void) restore_line_pointer (ch
);
10679 (*pdesc
->handler
) (pdesc
->arg
);
10683 /* Find the instruction descriptor matching the arguments. */
10685 idesc
= ia64_find_opcode (mnemonic
);
10686 (void) restore_line_pointer (ch
);
10689 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10693 idesc
= parse_operands (idesc
);
10697 /* Handle the dynamic ops we can handle now: */
10698 if (idesc
->type
== IA64_TYPE_DYN
)
10700 if (strcmp (idesc
->name
, "add") == 0)
10702 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10703 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10707 ia64_free_opcode (idesc
);
10708 idesc
= ia64_find_opcode (mnemonic
);
10710 else if (strcmp (idesc
->name
, "mov") == 0)
10712 enum ia64_opnd opnd1
, opnd2
;
10715 opnd1
= idesc
->operands
[0];
10716 opnd2
= idesc
->operands
[1];
10717 if (opnd1
== IA64_OPND_AR3
)
10719 else if (opnd2
== IA64_OPND_AR3
)
10723 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10725 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10726 mnemonic
= "mov.i";
10727 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10728 mnemonic
= "mov.m";
10736 ia64_free_opcode (idesc
);
10737 idesc
= ia64_find_opcode (mnemonic
);
10738 while (idesc
!= NULL
10739 && (idesc
->operands
[0] != opnd1
10740 || idesc
->operands
[1] != opnd2
))
10741 idesc
= get_next_opcode (idesc
);
10745 else if (strcmp (idesc
->name
, "mov.i") == 0
10746 || strcmp (idesc
->name
, "mov.m") == 0)
10748 enum ia64_opnd opnd1
, opnd2
;
10751 opnd1
= idesc
->operands
[0];
10752 opnd2
= idesc
->operands
[1];
10753 if (opnd1
== IA64_OPND_AR3
)
10755 else if (opnd2
== IA64_OPND_AR3
)
10759 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10762 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10764 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10766 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10767 as_bad (_("AR %d can only be accessed by %c-unit"),
10768 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10772 else if (strcmp (idesc
->name
, "hint.b") == 0)
10778 case hint_b_warning
:
10779 as_warn (_("hint.b may be treated as nop"));
10782 as_bad (_("hint.b shouldn't be used"));
10788 if (md
.qp
.X_op
== O_register
)
10790 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10791 md
.qp
.X_op
= O_absent
;
10794 flags
= idesc
->flags
;
10796 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10798 /* The alignment frag has to end with a stop bit only if the
10799 next instruction after the alignment directive has to be
10800 the first instruction in an instruction group. */
10803 while (align_frag
->fr_type
!= rs_align_code
)
10805 align_frag
= align_frag
->fr_next
;
10809 /* align_frag can be NULL if there are directives in
10811 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10812 align_frag
->tc_frag_data
= 1;
10815 insn_group_break (1, 0, 0);
10819 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10821 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10825 /* Build the instruction. */
10826 CURR_SLOT
.qp_regno
= qp_regno
;
10827 CURR_SLOT
.idesc
= idesc
;
10828 CURR_SLOT
.src_file
= as_where (&CURR_SLOT
.src_line
);
10829 dwarf2_where (&CURR_SLOT
.debug_line
);
10830 dwarf2_consume_line_info ();
10832 /* Add unwind entries, if there are any. */
10833 if (unwind
.current_entry
)
10835 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10836 unwind
.current_entry
= NULL
;
10838 if (unwind
.pending_saves
)
10840 if (unwind
.pending_saves
->next
)
10842 /* Attach the next pending save to the next slot so that its
10843 slot number will get set correctly. */
10844 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10845 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10848 unwind
.pending_saves
= NULL
;
10850 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10853 /* Check for dependency violations. */
10857 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10858 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10859 emit_one_bundle ();
10861 if ((flags
& IA64_OPCODE_LAST
) != 0)
10862 insn_group_break (1, 0, 0);
10864 md
.last_text_seg
= now_seg
;
10867 input_line_pointer
= saved_input_line_pointer
;
10870 /* Called when symbol NAME cannot be found in the symbol table.
10871 Should be used for dynamic valued symbols only. */
10874 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
10879 /* Called for any expression that can not be recognized. When the
10880 function is called, `input_line_pointer' will point to the start of
10884 md_operand (expressionS
*e
)
10886 switch (*input_line_pointer
)
10889 ++input_line_pointer
;
10890 expression_and_evaluate (e
);
10891 if (*input_line_pointer
!= ']')
10893 as_bad (_("Closing bracket missing"));
10898 if (e
->X_op
!= O_register
10899 || e
->X_add_number
< REG_GR
10900 || e
->X_add_number
> REG_GR
+ 127)
10902 as_bad (_("Index must be a general register"));
10903 e
->X_add_number
= REG_GR
;
10906 ++input_line_pointer
;
10917 ignore_rest_of_line ();
10920 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10921 a section symbol plus some offset. For relocs involving @fptr(),
10922 directives we don't want such adjustments since we need to have the
10923 original symbol's name in the reloc. */
10925 ia64_fix_adjustable (fixS
*fix
)
10927 /* Prevent all adjustments to global symbols */
10928 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10931 switch (fix
->fx_r_type
)
10933 case BFD_RELOC_IA64_FPTR64I
:
10934 case BFD_RELOC_IA64_FPTR32MSB
:
10935 case BFD_RELOC_IA64_FPTR32LSB
:
10936 case BFD_RELOC_IA64_FPTR64MSB
:
10937 case BFD_RELOC_IA64_FPTR64LSB
:
10938 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10939 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10949 ia64_force_relocation (fixS
*fix
)
10951 switch (fix
->fx_r_type
)
10953 case BFD_RELOC_IA64_FPTR64I
:
10954 case BFD_RELOC_IA64_FPTR32MSB
:
10955 case BFD_RELOC_IA64_FPTR32LSB
:
10956 case BFD_RELOC_IA64_FPTR64MSB
:
10957 case BFD_RELOC_IA64_FPTR64LSB
:
10959 case BFD_RELOC_IA64_LTOFF22
:
10960 case BFD_RELOC_IA64_LTOFF64I
:
10961 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10962 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10963 case BFD_RELOC_IA64_PLTOFF22
:
10964 case BFD_RELOC_IA64_PLTOFF64I
:
10965 case BFD_RELOC_IA64_PLTOFF64MSB
:
10966 case BFD_RELOC_IA64_PLTOFF64LSB
:
10968 case BFD_RELOC_IA64_LTOFF22X
:
10969 case BFD_RELOC_IA64_LDXMOV
:
10976 return generic_force_reloc (fix
);
10979 /* Decide from what point a pc-relative relocation is relative to,
10980 relative to the pc-relative fixup. Er, relatively speaking. */
10982 ia64_pcrel_from_section (fixS
*fix
, segT sec
)
10984 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10986 if (bfd_section_flags (sec
) & SEC_CODE
)
10993 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10995 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10999 exp
.X_op
= O_pseudo_fixup
;
11000 exp
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
11001 exp
.X_add_number
= 0;
11002 exp
.X_add_symbol
= symbol
;
11003 emit_expr (&exp
, size
);
11006 /* This is called whenever some data item (not an instruction) needs a
11007 fixup. We pick the right reloc code depending on the byteorder
11008 currently in effect. */
11010 ia64_cons_fix_new (fragS
*f
, int where
, int nbytes
, expressionS
*exp
,
11011 bfd_reloc_code_real_type code
)
11017 /* There are no reloc for 8 and 16 bit quantities, but we allow
11018 them here since they will work fine as long as the expression
11019 is fully defined at the end of the pass over the source file. */
11020 case 1: code
= BFD_RELOC_8
; break;
11021 case 2: code
= BFD_RELOC_16
; break;
11023 if (target_big_endian
)
11024 code
= BFD_RELOC_IA64_DIR32MSB
;
11026 code
= BFD_RELOC_IA64_DIR32LSB
;
11030 /* In 32-bit mode, data8 could mean function descriptors too. */
11031 if (exp
->X_op
== O_pseudo_fixup
11032 && exp
->X_op_symbol
11033 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11034 && !(md
.flags
& EF_IA_64_ABI64
))
11036 if (target_big_endian
)
11037 code
= BFD_RELOC_IA64_IPLTMSB
;
11039 code
= BFD_RELOC_IA64_IPLTLSB
;
11040 exp
->X_op
= O_symbol
;
11045 if (target_big_endian
)
11046 code
= BFD_RELOC_IA64_DIR64MSB
;
11048 code
= BFD_RELOC_IA64_DIR64LSB
;
11053 if (exp
->X_op
== O_pseudo_fixup
11054 && exp
->X_op_symbol
11055 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11057 if (target_big_endian
)
11058 code
= BFD_RELOC_IA64_IPLTMSB
;
11060 code
= BFD_RELOC_IA64_IPLTLSB
;
11061 exp
->X_op
= O_symbol
;
11067 as_bad (_("Unsupported fixup size %d"), nbytes
);
11068 ignore_rest_of_line ();
11072 if (exp
->X_op
== O_pseudo_fixup
)
11074 exp
->X_op
= O_symbol
;
11075 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11076 /* ??? If code unchanged, unsupported. */
11079 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11080 /* We need to store the byte order in effect in case we're going
11081 to fix an 8 or 16 bit relocation (for which there no real
11082 relocs available). See md_apply_fix(). */
11083 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11086 /* Return the actual relocation we wish to associate with the pseudo
11087 reloc described by SYM and R_TYPE. SYM should be one of the
11088 symbols in the pseudo_func array, or NULL. */
11090 static bfd_reloc_code_real_type
11091 ia64_gen_real_reloc_type (struct symbol
*sym
, bfd_reloc_code_real_type r_type
)
11093 bfd_reloc_code_real_type newr
= 0;
11094 const char *type
= NULL
, *suffix
= "";
11101 switch (S_GET_VALUE (sym
))
11103 case FUNC_FPTR_RELATIVE
:
11106 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_FPTR64I
; break;
11107 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_FPTR32MSB
; break;
11108 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_FPTR32LSB
; break;
11109 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_FPTR64MSB
; break;
11110 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_FPTR64LSB
; break;
11111 default: type
= "FPTR"; break;
11115 case FUNC_GP_RELATIVE
:
11118 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_GPREL22
; break;
11119 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_GPREL64I
; break;
11120 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_GPREL32MSB
; break;
11121 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_GPREL32LSB
; break;
11122 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_GPREL64MSB
; break;
11123 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_GPREL64LSB
; break;
11124 default: type
= "GPREL"; break;
11128 case FUNC_LT_RELATIVE
:
11131 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22
; break;
11132 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_LTOFF64I
; break;
11133 default: type
= "LTOFF"; break;
11137 case FUNC_LT_RELATIVE_X
:
11140 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22X
; break;
11141 default: type
= "LTOFF"; suffix
= "X"; break;
11145 case FUNC_PC_RELATIVE
:
11148 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PCREL22
; break;
11149 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PCREL64I
; break;
11150 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_PCREL32MSB
; break;
11151 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_PCREL32LSB
; break;
11152 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PCREL64MSB
; break;
11153 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PCREL64LSB
; break;
11154 default: type
= "PCREL"; break;
11158 case FUNC_PLT_RELATIVE
:
11161 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PLTOFF22
; break;
11162 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PLTOFF64I
; break;
11163 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PLTOFF64MSB
;break;
11164 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PLTOFF64LSB
;break;
11165 default: type
= "PLTOFF"; break;
11169 case FUNC_SEC_RELATIVE
:
11172 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SECREL32MSB
;break;
11173 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SECREL32LSB
;break;
11174 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SECREL64MSB
;break;
11175 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SECREL64LSB
;break;
11176 default: type
= "SECREL"; break;
11180 case FUNC_SEG_RELATIVE
:
11183 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SEGREL32MSB
;break;
11184 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SEGREL32LSB
;break;
11185 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SEGREL64MSB
;break;
11186 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SEGREL64LSB
;break;
11187 default: type
= "SEGREL"; break;
11191 case FUNC_LTV_RELATIVE
:
11194 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_LTV32MSB
; break;
11195 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_LTV32LSB
; break;
11196 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_LTV64MSB
; break;
11197 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_LTV64LSB
; break;
11198 default: type
= "LTV"; break;
11202 case FUNC_LT_FPTR_RELATIVE
:
11205 case BFD_RELOC_IA64_IMM22
:
11206 newr
= BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11207 case BFD_RELOC_IA64_IMM64
:
11208 newr
= BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11209 case BFD_RELOC_IA64_DIR32MSB
:
11210 newr
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11211 case BFD_RELOC_IA64_DIR32LSB
:
11212 newr
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11213 case BFD_RELOC_IA64_DIR64MSB
:
11214 newr
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11215 case BFD_RELOC_IA64_DIR64LSB
:
11216 newr
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11218 type
= "LTOFF_FPTR"; break;
11222 case FUNC_TP_RELATIVE
:
11225 case BFD_RELOC_IA64_IMM14
: newr
= BFD_RELOC_IA64_TPREL14
; break;
11226 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_TPREL22
; break;
11227 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_TPREL64I
; break;
11228 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_TPREL64MSB
; break;
11229 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_TPREL64LSB
; break;
11230 default: type
= "TPREL"; break;
11234 case FUNC_LT_TP_RELATIVE
:
11237 case BFD_RELOC_IA64_IMM22
:
11238 newr
= BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11240 type
= "LTOFF_TPREL"; break;
11244 case FUNC_DTP_MODULE
:
11247 case BFD_RELOC_IA64_DIR64MSB
:
11248 newr
= BFD_RELOC_IA64_DTPMOD64MSB
; break;
11249 case BFD_RELOC_IA64_DIR64LSB
:
11250 newr
= BFD_RELOC_IA64_DTPMOD64LSB
; break;
11252 type
= "DTPMOD"; break;
11256 case FUNC_LT_DTP_MODULE
:
11259 case BFD_RELOC_IA64_IMM22
:
11260 newr
= BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11262 type
= "LTOFF_DTPMOD"; break;
11266 case FUNC_DTP_RELATIVE
:
11269 case BFD_RELOC_IA64_DIR32MSB
:
11270 newr
= BFD_RELOC_IA64_DTPREL32MSB
; break;
11271 case BFD_RELOC_IA64_DIR32LSB
:
11272 newr
= BFD_RELOC_IA64_DTPREL32LSB
; break;
11273 case BFD_RELOC_IA64_DIR64MSB
:
11274 newr
= BFD_RELOC_IA64_DTPREL64MSB
; break;
11275 case BFD_RELOC_IA64_DIR64LSB
:
11276 newr
= BFD_RELOC_IA64_DTPREL64LSB
; break;
11277 case BFD_RELOC_IA64_IMM14
:
11278 newr
= BFD_RELOC_IA64_DTPREL14
; break;
11279 case BFD_RELOC_IA64_IMM22
:
11280 newr
= BFD_RELOC_IA64_DTPREL22
; break;
11281 case BFD_RELOC_IA64_IMM64
:
11282 newr
= BFD_RELOC_IA64_DTPREL64I
; break;
11284 type
= "DTPREL"; break;
11288 case FUNC_LT_DTP_RELATIVE
:
11291 case BFD_RELOC_IA64_IMM22
:
11292 newr
= BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11294 type
= "LTOFF_DTPREL"; break;
11298 case FUNC_IPLT_RELOC
:
11301 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11302 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11303 default: type
= "IPLT"; break;
11308 case FUNC_SLOTCOUNT_RELOC
:
11309 return DUMMY_RELOC_IA64_SLOTCOUNT
;
11326 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11327 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11328 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11329 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11330 case BFD_RELOC_UNUSED
: width
= 13; break;
11331 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11332 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11333 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11337 /* This should be an error, but since previously there wasn't any
11338 diagnostic here, don't make it fail because of this for now. */
11339 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11344 /* Here is where generate the appropriate reloc for pseudo relocation
11347 ia64_validate_fix (fixS
*fix
)
11349 switch (fix
->fx_r_type
)
11351 case BFD_RELOC_IA64_FPTR64I
:
11352 case BFD_RELOC_IA64_FPTR32MSB
:
11353 case BFD_RELOC_IA64_FPTR64LSB
:
11354 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11355 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11356 if (fix
->fx_offset
!= 0)
11357 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11358 _("No addend allowed in @fptr() relocation"));
11366 fix_insn (fixS
*fix
, const struct ia64_operand
*odesc
, valueT value
)
11368 bfd_vma insn
[3], t0
, t1
, control_bits
;
11373 slot
= fix
->fx_where
& 0x3;
11374 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11376 /* Bundles are always in little-endian byte order */
11377 t0
= bfd_getl64 (fixpos
);
11378 t1
= bfd_getl64 (fixpos
+ 8);
11379 control_bits
= t0
& 0x1f;
11380 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11381 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11382 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11385 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11387 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11388 insn
[2] |= (((value
& 0x7f) << 13)
11389 | (((value
>> 7) & 0x1ff) << 27)
11390 | (((value
>> 16) & 0x1f) << 22)
11391 | (((value
>> 21) & 0x1) << 21)
11392 | (((value
>> 63) & 0x1) << 36));
11394 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11396 if (value
& ~0x3fffffffffffffffULL
)
11397 err
= _("integer operand out of range");
11398 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11399 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11401 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11404 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11405 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11406 | (((value
>> 0) & 0xfffff) << 13));
11409 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11412 as_bad_where (fix
->fx_file
, fix
->fx_line
, "%s", err
);
11414 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11415 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11416 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11417 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11420 /* Attempt to simplify or even eliminate a fixup. The return value is
11421 ignored; perhaps it was once meaningful, but now it is historical.
11422 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11424 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11428 md_apply_fix (fixS
*fix
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
11431 valueT value
= *valP
;
11433 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11437 switch (fix
->fx_r_type
)
11439 case BFD_RELOC_IA64_PCREL21B
: break;
11440 case BFD_RELOC_IA64_PCREL21BI
: break;
11441 case BFD_RELOC_IA64_PCREL21F
: break;
11442 case BFD_RELOC_IA64_PCREL21M
: break;
11443 case BFD_RELOC_IA64_PCREL60B
: break;
11444 case BFD_RELOC_IA64_PCREL22
: break;
11445 case BFD_RELOC_IA64_PCREL64I
: break;
11446 case BFD_RELOC_IA64_PCREL32MSB
: break;
11447 case BFD_RELOC_IA64_PCREL32LSB
: break;
11448 case BFD_RELOC_IA64_PCREL64MSB
: break;
11449 case BFD_RELOC_IA64_PCREL64LSB
: break;
11451 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11458 switch ((unsigned) fix
->fx_r_type
)
11460 case BFD_RELOC_UNUSED
:
11461 /* This must be a TAG13 or TAG13b operand. There are no external
11462 relocs defined for them, so we must give an error. */
11463 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11464 _("%s must have a constant value"),
11465 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11469 case BFD_RELOC_IA64_TPREL14
:
11470 case BFD_RELOC_IA64_TPREL22
:
11471 case BFD_RELOC_IA64_TPREL64I
:
11472 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11473 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11474 case BFD_RELOC_IA64_DTPREL14
:
11475 case BFD_RELOC_IA64_DTPREL22
:
11476 case BFD_RELOC_IA64_DTPREL64I
:
11477 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11478 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11482 case DUMMY_RELOC_IA64_SLOTCOUNT
:
11483 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11484 _("cannot resolve @slotcount parameter"));
11493 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11496 if (fix
->fx_r_type
== DUMMY_RELOC_IA64_SLOTCOUNT
)
11498 /* For @slotcount, convert an addresses difference to a slots
11502 v
= (value
>> 4) * 3;
11503 switch (value
& 0x0f)
11517 as_bad (_("invalid @slotcount value"));
11523 if (fix
->tc_fix_data
.bigendian
)
11524 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11526 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11531 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11536 /* Generate the BFD reloc to be stuck in the object file from the
11537 fixup used internally in the assembler. */
11540 tc_gen_reloc (asection
*sec ATTRIBUTE_UNUSED
, fixS
*fixp
)
11544 reloc
= XNEW (arelent
);
11545 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
11546 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11547 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11548 reloc
->addend
= fixp
->fx_offset
;
11549 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11553 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11554 _("Cannot represent %s relocation in object file"),
11555 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11562 /* Turn a string in input_line_pointer into a floating point constant
11563 of type TYPE, and store the appropriate bytes in *LIT. The number
11564 of LITTLENUMS emitted is stored in *SIZE. An error message is
11565 returned, or NULL on OK. */
11568 md_atof (int type
, char *lit
, int *size
)
11570 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11600 return _("Unrecognized or unsupported floating point constant");
11602 t
= atof_ieee (input_line_pointer
, type
, words
);
11604 input_line_pointer
= t
;
11606 (*ia64_float_to_chars
) (lit
, words
, prec
);
11610 /* It is 10 byte floating point with 6 byte padding. */
11611 memset (&lit
[10], 0, 6);
11612 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11615 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11620 /* Handle ia64 specific semantics of the align directive. */
11623 ia64_md_do_align (int n ATTRIBUTE_UNUSED
,
11624 const char *fill ATTRIBUTE_UNUSED
,
11625 int len ATTRIBUTE_UNUSED
,
11626 int max ATTRIBUTE_UNUSED
)
11628 if (subseg_text_p (now_seg
))
11629 ia64_flush_insns ();
11632 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11633 of an rs_align_code fragment. */
11636 ia64_handle_align (fragS
*fragp
)
11640 const unsigned char *nop_type
;
11642 if (fragp
->fr_type
!= rs_align_code
)
11645 /* Check if this frag has to end with a stop bit. */
11646 nop_type
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11648 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11649 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11651 /* If no paddings are needed, we check if we need a stop bit. */
11652 if (!bytes
&& fragp
->tc_frag_data
)
11654 if (fragp
->fr_fix
< 16)
11656 /* FIXME: It won't work with
11658 alloc r32=ar.pfs,1,2,4,0
11662 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11663 _("Can't add stop bit to mark end of instruction group"));
11666 /* Bundles are always in little-endian byte order. Make sure
11667 the previous bundle has the stop bit. */
11671 /* Make sure we are on a 16-byte boundary, in case someone has been
11672 putting data into a text section. */
11675 int fix
= bytes
& 15;
11676 memset (p
, 0, fix
);
11679 fragp
->fr_fix
+= fix
;
11682 /* Instruction bundles are always little-endian. */
11683 memcpy (p
, nop_type
, 16);
11684 fragp
->fr_var
= 16;
11688 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11693 number_to_chars_bigendian (lit
, (long) (*words
++),
11694 sizeof (LITTLENUM_TYPE
));
11695 lit
+= sizeof (LITTLENUM_TYPE
);
11700 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11705 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11706 sizeof (LITTLENUM_TYPE
));
11707 lit
+= sizeof (LITTLENUM_TYPE
);
11712 ia64_elf_section_change_hook (void)
11714 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11715 && elf_linked_to_section (now_seg
) == NULL
)
11716 elf_linked_to_section (now_seg
) = text_section
;
11717 dot_byteorder (-1);
11720 /* Check if a label should be made global. */
11722 ia64_check_label (symbolS
*label
)
11724 if (*input_line_pointer
== ':')
11726 S_SET_EXTERNAL (label
);
11727 input_line_pointer
++;
11731 /* Used to remember where .alias and .secalias directives are seen. We
11732 will rename symbol and section names when we are about to output
11733 the relocatable file. */
11736 const char *file
; /* The file where the directive is seen. */
11737 unsigned int line
; /* The line number the directive is at. */
11738 const char *name
; /* The original name of the symbol. */
11741 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11742 .secalias. Otherwise, it is .alias. */
11744 dot_alias (int section
)
11746 char *name
, *alias
;
11752 htab_t ahash
, nhash
;
11755 delim
= get_symbol_name (&name
);
11756 end_name
= input_line_pointer
;
11759 if (name
== end_name
)
11761 as_bad (_("expected symbol name"));
11762 ignore_rest_of_line ();
11766 SKIP_WHITESPACE_AFTER_NAME ();
11768 if (*input_line_pointer
!= ',')
11771 as_bad (_("expected comma after \"%s\""), name
);
11773 ignore_rest_of_line ();
11777 input_line_pointer
++;
11779 ia64_canonicalize_symbol_name (name
);
11781 /* We call demand_copy_C_string to check if alias string is valid.
11782 There should be a closing `"' and no `\0' in the string. */
11783 alias
= demand_copy_C_string (&len
);
11786 ignore_rest_of_line ();
11790 /* Make a copy of name string. */
11791 len
= strlen (name
) + 1;
11792 obstack_grow (¬es
, name
, len
);
11793 name
= obstack_finish (¬es
);
11798 ahash
= secalias_hash
;
11799 nhash
= secalias_name_hash
;
11804 ahash
= alias_hash
;
11805 nhash
= alias_name_hash
;
11808 /* Check if alias has been used before. */
11810 h
= (struct alias
*) str_hash_find (ahash
, alias
);
11813 if (strcmp (h
->name
, name
))
11814 as_bad (_("`%s' is already the alias of %s `%s'"),
11815 alias
, kind
, h
->name
);
11816 obstack_free (¬es
, name
);
11817 obstack_free (¬es
, alias
);
11821 /* Check if name already has an alias. */
11822 a
= (const char *) str_hash_find (nhash
, name
);
11825 if (strcmp (a
, alias
))
11826 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11827 obstack_free (¬es
, name
);
11828 obstack_free (¬es
, alias
);
11832 h
= XNEW (struct alias
);
11833 h
->file
= as_where (&h
->line
);
11836 str_hash_insert (ahash
, alias
, h
, 0);
11837 str_hash_insert (nhash
, name
, alias
, 0);
11840 demand_empty_rest_of_line ();
11843 /* It renames the original symbol name to its alias. */
11845 do_alias (void **slot
, void *arg ATTRIBUTE_UNUSED
)
11847 string_tuple_t
*tuple
= *((string_tuple_t
**) slot
);
11848 struct alias
*h
= (struct alias
*) tuple
->value
;
11849 symbolS
*sym
= symbol_find (h
->name
);
11854 /* Uses .alias extensively to alias CRTL functions to same with
11855 decc$ prefix. Sometimes function gets optimized away and a
11856 warning results, which should be suppressed. */
11857 if (!startswith (tuple
->key
, "decc$"))
11859 as_warn_where (h
->file
, h
->line
,
11860 _("symbol `%s' aliased to `%s' is not used"),
11861 h
->name
, tuple
->key
);
11864 S_SET_NAME (sym
, (char *) tuple
->key
);
11869 /* Called from write_object_file. */
11871 ia64_adjust_symtab (void)
11873 htab_traverse (alias_hash
, do_alias
, NULL
);
11876 /* It renames the original section name to its alias. */
11878 do_secalias (void **slot
, void *arg ATTRIBUTE_UNUSED
)
11880 string_tuple_t
*tuple
= *((string_tuple_t
**) slot
);
11881 struct alias
*h
= (struct alias
*) tuple
->value
;
11882 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11885 as_warn_where (h
->file
, h
->line
,
11886 _("section `%s' aliased to `%s' is not used"),
11887 h
->name
, tuple
->key
);
11889 sec
->name
= tuple
->key
;
11894 /* Called from write_object_file. */
11896 ia64_frob_file (void)
11898 htab_traverse (secalias_hash
, do_secalias
, NULL
);
11902 #define NT_VMS_MHD 1
11903 #define NT_VMS_LNM 2
11905 /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF
11908 /* Manufacture a VMS-like time string. */
11910 get_vms_time (char *Now
)
11916 pnt
= ctime (&timeb
);
11922 sprintf (Now
, "%2s-%3s-%s %s", pnt
+ 8, pnt
+ 4, pnt
+ 20, pnt
+ 11);
11926 ia64_vms_note (void)
11929 asection
*seg
= now_seg
;
11930 subsegT subseg
= now_subseg
;
11931 asection
*secp
= NULL
;
11936 /* Create the .note section. */
11938 secp
= subseg_new (".note", 0);
11939 bfd_set_section_flags (secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
11941 /* Module header note (MHD). */
11942 bname
= xstrdup (lbasename (out_file_name
));
11943 if ((p
= strrchr (bname
, '.')))
11946 /* VMS note header is 24 bytes long. */
11947 p
= frag_more (8 + 8 + 8);
11948 number_to_chars_littleendian (p
+ 0, 8, 8);
11949 number_to_chars_littleendian (p
+ 8, 40 + strlen (bname
), 8);
11950 number_to_chars_littleendian (p
+ 16, NT_VMS_MHD
, 8);
11953 strcpy (p
, "IPF/VMS");
11955 p
= frag_more (17 + 17 + strlen (bname
) + 1 + 5);
11957 strcpy (p
+ 17, "24-FEB-2005 15:00");
11960 p
+= strlen (bname
) + 1;
11962 strcpy (p
, "V1.0");
11964 frag_align (3, 0, 0);
11966 /* Language processor name note. */
11967 sprintf (buf
, "GNU assembler version %s (%s) using BFD version %s",
11968 VERSION
, TARGET_ALIAS
, BFD_VERSION_STRING
);
11970 p
= frag_more (8 + 8 + 8);
11971 number_to_chars_littleendian (p
+ 0, 8, 8);
11972 number_to_chars_littleendian (p
+ 8, strlen (buf
) + 1, 8);
11973 number_to_chars_littleendian (p
+ 16, NT_VMS_LNM
, 8);
11976 strcpy (p
, "IPF/VMS");
11978 p
= frag_more (strlen (buf
) + 1);
11981 frag_align (3, 0, 0);
11983 secp
= subseg_new (".vms_display_name_info", 0);
11984 bfd_set_section_flags (secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
11986 /* This symbol should be passed on the command line and be variable
11987 according to language. */
11988 sym
= symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl",
11989 absolute_section
, &zero_address_frag
, 0);
11990 symbol_table_insert (sym
);
11991 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
| BSF_DYNAMIC
;
11994 /* Format 3 of VMS demangler Spec. */
11995 number_to_chars_littleendian (p
, 3, 4);
11998 /* Place holder for symbol table index of above symbol. */
11999 number_to_chars_littleendian (p
, -1, 4);
12001 frag_align (3, 0, 0);
12003 /* We probably can't restore the current segment, for there likely
12004 isn't one yet... */
12006 subseg_set (seg
, subseg
);
12009 #endif /* TE_VMS */