1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
53 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54 #define MIN(a,b) ((a) < (b) ? (a) : (b))
57 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58 #define CURR_SLOT md.slot[md.curr_slot]
60 #define O_pseudo_fixup (O_max + 1)
64 /* IA-64 ABI section pseudo-ops. */
65 SPECIAL_SECTION_BSS
= 0,
67 SPECIAL_SECTION_SDATA
,
68 SPECIAL_SECTION_RODATA
,
69 SPECIAL_SECTION_COMMENT
,
70 SPECIAL_SECTION_UNWIND
,
71 SPECIAL_SECTION_UNWIND_INFO
,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY
,
74 SPECIAL_SECTION_FINI_ARRAY
,
91 FUNC_LT_FPTR_RELATIVE
,
101 REG_FR
= (REG_GR
+ 128),
102 REG_AR
= (REG_FR
+ 128),
103 REG_CR
= (REG_AR
+ 128),
104 REG_P
= (REG_CR
+ 128),
105 REG_BR
= (REG_P
+ 64),
106 REG_IP
= (REG_BR
+ 8),
113 /* The following are pseudo-registers for use by gas only. */
125 /* The following pseudo-registers are used for unwind directives only: */
133 DYNREG_GR
= 0, /* dynamic general purpose register */
134 DYNREG_FR
, /* dynamic floating point register */
135 DYNREG_PR
, /* dynamic predicate register */
139 enum operand_match_result
142 OPERAND_OUT_OF_RANGE
,
146 /* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
152 struct label_fix
*next
;
156 extern int target_big_endian
;
158 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
160 static void ia64_float_to_chars_bigendian
161 PARAMS ((char *, LITTLENUM_TYPE
*, int));
162 static void ia64_float_to_chars_littleendian
163 PARAMS ((char *, LITTLENUM_TYPE
*, int));
164 static void (*ia64_float_to_chars
)
165 PARAMS ((char *, LITTLENUM_TYPE
*, int));
167 static struct hash_control
*alias_hash
;
168 static struct hash_control
*alias_name_hash
;
169 static struct hash_control
*secalias_hash
;
170 static struct hash_control
*secalias_name_hash
;
172 /* Characters which always start a comment. */
173 const char comment_chars
[] = "";
175 /* Characters which start a comment at the beginning of a line. */
176 const char line_comment_chars
[] = "#";
178 /* Characters which may be used to separate multiple commands on a
180 const char line_separator_chars
[] = ";";
182 /* Characters which are used to indicate an exponent in a floating
184 const char EXP_CHARS
[] = "eE";
186 /* Characters which mean that a number is a floating point constant,
188 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
190 /* ia64-specific option processing: */
192 const char *md_shortopts
= "m:N:x::";
194 struct option md_longopts
[] =
196 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
197 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
198 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
199 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
202 size_t md_longopts_size
= sizeof (md_longopts
);
206 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
207 struct hash_control
*reg_hash
; /* register name hash table */
208 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
209 struct hash_control
*const_hash
; /* constant hash table */
210 struct hash_control
*entry_hash
; /* code entry hint hash table */
212 symbolS
*regsym
[REG_NUM
];
214 /* If X_op is != O_absent, the registername for the instruction's
215 qualifying predicate. If NULL, p0 is assumed for instructions
216 that are predicatable. */
223 explicit_mode
: 1, /* which mode we're in */
224 default_explicit_mode
: 1, /* which mode is the default */
225 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
227 keep_pending_output
: 1;
229 /* Each bundle consists of up to three instructions. We keep
230 track of four most recent instructions so we can correctly set
231 the end_of_insn_group for the last instruction in a bundle. */
233 int num_slots_in_use
;
237 end_of_insn_group
: 1,
238 manual_bundling_on
: 1,
239 manual_bundling_off
: 1;
240 signed char user_template
; /* user-selected template, if any */
241 unsigned char qp_regno
; /* qualifying predicate */
242 /* This duplicates a good fraction of "struct fix" but we
243 can't use a "struct fix" instead since we can't call
244 fix_new_exp() until we know the address of the instruction. */
248 bfd_reloc_code_real_type code
;
249 enum ia64_opnd opnd
; /* type of operand in need of fix */
250 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
251 expressionS expr
; /* the value to be inserted */
253 fixup
[2]; /* at most two fixups per insn */
254 struct ia64_opcode
*idesc
;
255 struct label_fix
*label_fixups
;
256 struct label_fix
*tag_fixups
;
257 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
260 unsigned int src_line
;
261 struct dwarf2_line_info debug_line
;
269 struct dynreg
*next
; /* next dynamic register */
271 unsigned short base
; /* the base register number */
272 unsigned short num_regs
; /* # of registers in this set */
274 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
276 flagword flags
; /* ELF-header flags */
279 unsigned hint
:1; /* is this hint currently valid? */
280 bfd_vma offset
; /* mem.offset offset */
281 bfd_vma base
; /* mem.offset base */
284 int path
; /* number of alt. entry points seen */
285 const char **entry_labels
; /* labels of all alternate paths in
286 the current DV-checking block. */
287 int maxpaths
; /* size currently allocated for
289 /* Support for hardware errata workarounds. */
291 /* Record data about the last three insn groups. */
294 /* B-step workaround.
295 For each predicate register, this is set if the corresponding insn
296 group conditionally sets this register with one of the affected
299 /* B-step workaround.
300 For each general register, this is set if the corresponding insn
301 a) is conditional one one of the predicate registers for which
302 P_REG_SET is 1 in the corresponding entry of the previous group,
303 b) sets this general register with one of the affected
305 int g_reg_set_conditionally
[128];
309 int pointer_size
; /* size in bytes of a pointer */
310 int pointer_size_shift
; /* shift size of a pointer for alignment */
314 /* application registers: */
320 #define AR_BSPSTORE 18
335 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
336 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
337 {"ar.rsc", 16}, {"ar.bsp", 17},
338 {"ar.bspstore", 18}, {"ar.rnat", 19},
339 {"ar.fcr", 21}, {"ar.eflag", 24},
340 {"ar.csd", 25}, {"ar.ssd", 26},
341 {"ar.cflg", 27}, {"ar.fsr", 28},
342 {"ar.fir", 29}, {"ar.fdr", 30},
343 {"ar.ccv", 32}, {"ar.unat", 36},
344 {"ar.fpsr", 40}, {"ar.itc", 44},
345 {"ar.pfs", 64}, {"ar.lc", 65},
366 /* control registers: */
408 static const struct const_desc
415 /* PSR constant masks: */
418 {"psr.be", ((valueT
) 1) << 1},
419 {"psr.up", ((valueT
) 1) << 2},
420 {"psr.ac", ((valueT
) 1) << 3},
421 {"psr.mfl", ((valueT
) 1) << 4},
422 {"psr.mfh", ((valueT
) 1) << 5},
424 {"psr.ic", ((valueT
) 1) << 13},
425 {"psr.i", ((valueT
) 1) << 14},
426 {"psr.pk", ((valueT
) 1) << 15},
428 {"psr.dt", ((valueT
) 1) << 17},
429 {"psr.dfl", ((valueT
) 1) << 18},
430 {"psr.dfh", ((valueT
) 1) << 19},
431 {"psr.sp", ((valueT
) 1) << 20},
432 {"psr.pp", ((valueT
) 1) << 21},
433 {"psr.di", ((valueT
) 1) << 22},
434 {"psr.si", ((valueT
) 1) << 23},
435 {"psr.db", ((valueT
) 1) << 24},
436 {"psr.lp", ((valueT
) 1) << 25},
437 {"psr.tb", ((valueT
) 1) << 26},
438 {"psr.rt", ((valueT
) 1) << 27},
439 /* 28-31: reserved */
440 /* 32-33: cpl (current privilege level) */
441 {"psr.is", ((valueT
) 1) << 34},
442 {"psr.mc", ((valueT
) 1) << 35},
443 {"psr.it", ((valueT
) 1) << 36},
444 {"psr.id", ((valueT
) 1) << 37},
445 {"psr.da", ((valueT
) 1) << 38},
446 {"psr.dd", ((valueT
) 1) << 39},
447 {"psr.ss", ((valueT
) 1) << 40},
448 /* 41-42: ri (restart instruction) */
449 {"psr.ed", ((valueT
) 1) << 43},
450 {"psr.bn", ((valueT
) 1) << 44},
453 /* indirect register-sets/memory: */
462 { "CPUID", IND_CPUID
},
463 { "cpuid", IND_CPUID
},
475 /* Pseudo functions used to indicate relocation types (these functions
476 start with an at sign (@). */
498 /* reloc pseudo functions (these must come first!): */
499 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
500 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
501 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
502 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
503 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
504 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
505 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
506 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
507 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
508 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
509 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
510 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
511 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
512 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
513 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
514 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
515 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
517 /* mbtype4 constants: */
518 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
519 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
520 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
521 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
522 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
524 /* fclass constants: */
525 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
526 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
527 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
528 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
529 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
530 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
531 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
532 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
533 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
535 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
537 /* hint constants: */
538 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
540 /* unwind-related constants: */
541 { "svr4", PSEUDO_FUNC_CONST
, { 0 } },
542 { "hpux", PSEUDO_FUNC_CONST
, { 1 } },
543 { "nt", PSEUDO_FUNC_CONST
, { 2 } },
545 /* unwind-related registers: */
546 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
549 /* 41-bit nop opcodes (one per unit): */
550 static const bfd_vma nop
[IA64_NUM_UNITS
] =
552 0x0000000000LL
, /* NIL => break 0 */
553 0x0008000000LL
, /* I-unit nop */
554 0x0008000000LL
, /* M-unit nop */
555 0x4000000000LL
, /* B-unit nop */
556 0x0008000000LL
, /* F-unit nop */
557 0x0008000000LL
, /* L-"unit" nop */
558 0x0008000000LL
, /* X-unit nop */
561 /* Can't be `const' as it's passed to input routines (which have the
562 habit of setting temporary sentinels. */
563 static char special_section_name
[][20] =
565 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
566 {".IA_64.unwind"}, {".IA_64.unwind_info"},
567 {".init_array"}, {".fini_array"}
570 static char *special_linkonce_name
[] =
572 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
575 /* The best template for a particular sequence of up to three
577 #define N IA64_NUM_TYPES
578 static unsigned char best_template
[N
][N
][N
];
581 /* Resource dependencies currently in effect */
583 int depind
; /* dependency index */
584 const struct ia64_dependency
*dependency
; /* actual dependency */
585 unsigned specific
:1, /* is this a specific bit/regno? */
586 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
587 int index
; /* specific regno/bit within dependency */
588 int note
; /* optional qualifying note (0 if none) */
592 int insn_srlz
; /* current insn serialization state */
593 int data_srlz
; /* current data serialization state */
594 int qp_regno
; /* qualifying predicate for this usage */
595 char *file
; /* what file marked this dependency */
596 unsigned int line
; /* what line marked this dependency */
597 struct mem_offset mem_offset
; /* optional memory offset hint */
598 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
599 int path
; /* corresponding code entry index */
601 static int regdepslen
= 0;
602 static int regdepstotlen
= 0;
603 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
604 static const char *dv_sem
[] = { "none", "implied", "impliedf",
605 "data", "instr", "specific", "stop", "other" };
606 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
608 /* Current state of PR mutexation */
609 static struct qpmutex
{
612 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
613 static int qp_mutexeslen
= 0;
614 static int qp_mutexestotlen
= 0;
615 static valueT qp_safe_across_calls
= 0;
617 /* Current state of PR implications */
618 static struct qp_imply
{
621 unsigned p2_branched
:1;
623 } *qp_implies
= NULL
;
624 static int qp_implieslen
= 0;
625 static int qp_impliestotlen
= 0;
627 /* Keep track of static GR values so that indirect register usage can
628 sometimes be tracked. */
633 } gr_values
[128] = {{ 1, 0, 0 }};
635 /* These are the routines required to output the various types of
638 /* A slot_number is a frag address plus the slot index (0-2). We use the
639 frag address here so that if there is a section switch in the middle of
640 a function, then instructions emitted to a different section are not
641 counted. Since there may be more than one frag for a function, this
642 means we also need to keep track of which frag this address belongs to
643 so we can compute inter-frag distances. This also nicely solves the
644 problem with nops emitted for align directives, which can't easily be
645 counted, but can easily be derived from frag sizes. */
647 typedef struct unw_rec_list
{
649 unsigned long slot_number
;
651 struct unw_rec_list
*next
;
654 #define SLOT_NUM_NOT_SET (unsigned)-1
656 /* Linked list of saved prologue counts. A very poor
657 implementation of a map from label numbers to prologue counts. */
658 typedef struct label_prologue_count
660 struct label_prologue_count
*next
;
661 unsigned long label_number
;
662 unsigned int prologue_count
;
663 } label_prologue_count
;
667 unsigned long next_slot_number
;
668 fragS
*next_slot_frag
;
670 /* Maintain a list of unwind entries for the current function. */
674 /* Any unwind entires that should be attached to the current slot
675 that an insn is being constructed for. */
676 unw_rec_list
*current_entry
;
678 /* These are used to create the unwind table entry for this function. */
681 symbolS
*info
; /* pointer to unwind info */
682 symbolS
*personality_routine
;
684 subsegT saved_text_subseg
;
685 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
687 /* TRUE if processing unwind directives in a prologue region. */
690 unsigned int prologue_count
; /* number of .prologues seen so far */
691 /* Prologue counts at previous .label_state directives. */
692 struct label_prologue_count
* saved_prologue_counts
;
695 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
697 /* Forward delarations: */
698 static int ar_is_in_integer_unit
PARAMS ((int regnum
));
699 static void set_section
PARAMS ((char *name
));
700 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
701 unsigned int, unsigned int));
702 static void dot_radix
PARAMS ((int));
703 static void dot_special_section
PARAMS ((int));
704 static void dot_proc
PARAMS ((int));
705 static void dot_fframe
PARAMS ((int));
706 static void dot_vframe
PARAMS ((int));
707 static void dot_vframesp
PARAMS ((int));
708 static void dot_vframepsp
PARAMS ((int));
709 static void dot_save
PARAMS ((int));
710 static void dot_restore
PARAMS ((int));
711 static void dot_restorereg
PARAMS ((int));
712 static void dot_restorereg_p
PARAMS ((int));
713 static void dot_handlerdata
PARAMS ((int));
714 static void dot_unwentry
PARAMS ((int));
715 static void dot_altrp
PARAMS ((int));
716 static void dot_savemem
PARAMS ((int));
717 static void dot_saveg
PARAMS ((int));
718 static void dot_savef
PARAMS ((int));
719 static void dot_saveb
PARAMS ((int));
720 static void dot_savegf
PARAMS ((int));
721 static void dot_spill
PARAMS ((int));
722 static void dot_spillreg
PARAMS ((int));
723 static void dot_spillmem
PARAMS ((int));
724 static void dot_spillreg_p
PARAMS ((int));
725 static void dot_spillmem_p
PARAMS ((int));
726 static void dot_label_state
PARAMS ((int));
727 static void dot_copy_state
PARAMS ((int));
728 static void dot_unwabi
PARAMS ((int));
729 static void dot_personality
PARAMS ((int));
730 static void dot_body
PARAMS ((int));
731 static void dot_prologue
PARAMS ((int));
732 static void dot_endp
PARAMS ((int));
733 static void dot_template
PARAMS ((int));
734 static void dot_regstk
PARAMS ((int));
735 static void dot_rot
PARAMS ((int));
736 static void dot_byteorder
PARAMS ((int));
737 static void dot_psr
PARAMS ((int));
738 static void dot_alias
PARAMS ((int));
739 static void dot_ln
PARAMS ((int));
740 static char *parse_section_name
PARAMS ((void));
741 static void dot_xdata
PARAMS ((int));
742 static void stmt_float_cons
PARAMS ((int));
743 static void stmt_cons_ua
PARAMS ((int));
744 static void dot_xfloat_cons
PARAMS ((int));
745 static void dot_xstringer
PARAMS ((int));
746 static void dot_xdata_ua
PARAMS ((int));
747 static void dot_xfloat_cons_ua
PARAMS ((int));
748 static void print_prmask
PARAMS ((valueT mask
));
749 static void dot_pred_rel
PARAMS ((int));
750 static void dot_reg_val
PARAMS ((int));
751 static void dot_dv_mode
PARAMS ((int));
752 static void dot_entry
PARAMS ((int));
753 static void dot_mem_offset
PARAMS ((int));
754 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
755 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
756 static void declare_register_set
PARAMS ((const char *, int, int));
757 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
758 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
761 static int parse_operand
PARAMS ((expressionS
*e
));
762 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
763 static int errata_nop_necessary_p
PARAMS ((struct slot
*, enum ia64_unit
));
764 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
765 static void emit_one_bundle
PARAMS ((void));
766 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
767 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
768 bfd_reloc_code_real_type r_type
));
769 static void insn_group_break
PARAMS ((int, int, int));
770 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
771 struct rsrc
*, int depind
, int path
));
772 static void add_qp_mutex
PARAMS((valueT mask
));
773 static void add_qp_imply
PARAMS((int p1
, int p2
));
774 static void clear_qp_branch_flag
PARAMS((valueT mask
));
775 static void clear_qp_mutex
PARAMS((valueT mask
));
776 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
777 static int has_suffix_p
PARAMS((const char *, const char *));
778 static void clear_register_values
PARAMS ((void));
779 static void print_dependency
PARAMS ((const char *action
, int depind
));
780 static void instruction_serialization
PARAMS ((void));
781 static void data_serialization
PARAMS ((void));
782 static void remove_marked_resource
PARAMS ((struct rsrc
*));
783 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
784 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
785 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
786 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
787 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
788 struct ia64_opcode
*, int, struct rsrc
[], int, int));
789 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
790 static void check_dependencies
PARAMS((struct ia64_opcode
*));
791 static void mark_resources
PARAMS((struct ia64_opcode
*));
792 static void update_dependencies
PARAMS((struct ia64_opcode
*));
793 static void note_register_values
PARAMS((struct ia64_opcode
*));
794 static int qp_mutex
PARAMS ((int, int, int));
795 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
796 static void output_vbyte_mem
PARAMS ((int, char *, char *));
797 static void count_output
PARAMS ((int, char *, char *));
798 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
799 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
800 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
801 static void output_P1_format
PARAMS ((vbyte_func
, int));
802 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
803 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
804 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
805 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
806 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
807 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
808 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
809 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
810 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
811 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
812 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
813 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
814 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
815 static char format_ab_reg
PARAMS ((int, int));
816 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
818 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
819 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
821 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
822 static void free_list_records
PARAMS ((unw_rec_list
*));
823 static unw_rec_list
*output_prologue
PARAMS ((void));
824 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
825 static unw_rec_list
*output_body
PARAMS ((void));
826 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
827 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
828 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
829 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
830 static unw_rec_list
*output_rp_when
PARAMS ((void));
831 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
832 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
833 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
834 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
835 static unw_rec_list
*output_pfs_when
PARAMS ((void));
836 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
837 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
838 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
839 static unw_rec_list
*output_preds_when
PARAMS ((void));
840 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
841 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
842 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
843 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
844 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
845 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
846 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
847 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
848 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
849 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
850 static unw_rec_list
*output_unat_when
PARAMS ((void));
851 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
852 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
853 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
854 static unw_rec_list
*output_lc_when
PARAMS ((void));
855 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
856 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
857 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
858 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
859 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
860 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
861 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
862 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
863 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
864 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
865 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
866 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
867 static unw_rec_list
*output_bsp_when
PARAMS ((void));
868 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
869 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
870 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
871 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
872 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
873 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
874 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
875 static unw_rec_list
*output_rnat_when
PARAMS ((void));
876 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
877 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
878 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
879 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
880 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
881 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
882 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
883 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
884 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
885 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
887 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
889 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
891 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
892 unsigned int, unsigned int));
893 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
894 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
895 static int calc_record_size
PARAMS ((unw_rec_list
*));
896 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
897 static int count_bits
PARAMS ((unsigned long));
898 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
899 unsigned long, fragS
*));
900 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
901 static void fixup_unw_records
PARAMS ((unw_rec_list
*));
902 static int output_unw_records
PARAMS ((unw_rec_list
*, void **));
903 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
904 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
905 static int generate_unwind_image
PARAMS ((const char *));
906 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
907 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
908 static void free_saved_prologue_counts
PARAMS ((void));
910 /* Build the unwind section name by appending the (possibly stripped)
911 text section NAME to the unwind PREFIX. The resulting string
912 pointer is assigned to RESULT. The string is allocated on the
913 stack, so this must be a macro... */
914 #define make_unw_section_name(special, text_name, result) \
916 const char *_prefix = special_section_name[special]; \
917 const char *_suffix = text_name; \
918 size_t _prefix_len, _suffix_len; \
920 if (strncmp (text_name, ".gnu.linkonce.t.", \
921 sizeof (".gnu.linkonce.t.") - 1) == 0) \
923 _prefix = special_linkonce_name[special - SPECIAL_SECTION_UNWIND]; \
924 _suffix += sizeof (".gnu.linkonce.t.") - 1; \
926 _prefix_len = strlen (_prefix), _suffix_len = strlen (_suffix); \
927 _result = alloca (_prefix_len + _suffix_len + 1); \
928 memcpy (_result, _prefix, _prefix_len); \
929 memcpy (_result + _prefix_len, _suffix, _suffix_len); \
930 _result[_prefix_len + _suffix_len] = '\0'; \
935 /* Determine if application register REGNUM resides in the integer
936 unit (as opposed to the memory unit). */
938 ar_is_in_integer_unit (reg
)
943 return (reg
== 64 /* pfs */
944 || reg
== 65 /* lc */
945 || reg
== 66 /* ec */
946 /* ??? ias accepts and puts these in the integer unit. */
947 || (reg
>= 112 && reg
<= 127));
950 /* Switch to section NAME and create section if necessary. It's
951 rather ugly that we have to manipulate input_line_pointer but I
952 don't see any other way to accomplish the same thing without
953 changing obj-elf.c (which may be the Right Thing, in the end). */
958 char *saved_input_line_pointer
;
960 saved_input_line_pointer
= input_line_pointer
;
961 input_line_pointer
= name
;
963 input_line_pointer
= saved_input_line_pointer
;
966 /* Map 's' to SHF_IA_64_SHORT. */
969 ia64_elf_section_letter (letter
, ptr_msg
)
974 return SHF_IA_64_SHORT
;
975 else if (letter
== 'o')
976 return SHF_LINK_ORDER
;
978 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
982 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
985 ia64_elf_section_flags (flags
, attr
, type
)
987 int attr
, type ATTRIBUTE_UNUSED
;
989 if (attr
& SHF_IA_64_SHORT
)
990 flags
|= SEC_SMALL_DATA
;
995 ia64_elf_section_type (str
, len
)
999 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1001 if (STREQ (ELF_STRING_ia64_unwind_info
))
1002 return SHT_PROGBITS
;
1004 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1005 return SHT_PROGBITS
;
1007 if (STREQ (ELF_STRING_ia64_unwind
))
1008 return SHT_IA_64_UNWIND
;
1010 if (STREQ (ELF_STRING_ia64_unwind_once
))
1011 return SHT_IA_64_UNWIND
;
1013 if (STREQ ("unwind"))
1014 return SHT_IA_64_UNWIND
;
1016 if (STREQ ("init_array"))
1017 return SHT_INIT_ARRAY
;
1019 if (STREQ ("fini_array"))
1020 return SHT_FINI_ARRAY
;
1027 set_regstack (ins
, locs
, outs
, rots
)
1028 unsigned int ins
, locs
, outs
, rots
;
1030 /* Size of frame. */
1033 sof
= ins
+ locs
+ outs
;
1036 as_bad ("Size of frame exceeds maximum of 96 registers");
1041 as_warn ("Size of rotating registers exceeds frame size");
1044 md
.in
.base
= REG_GR
+ 32;
1045 md
.loc
.base
= md
.in
.base
+ ins
;
1046 md
.out
.base
= md
.loc
.base
+ locs
;
1048 md
.in
.num_regs
= ins
;
1049 md
.loc
.num_regs
= locs
;
1050 md
.out
.num_regs
= outs
;
1051 md
.rot
.num_regs
= rots
;
1058 struct label_fix
*lfix
;
1060 subsegT saved_subseg
;
1063 if (!md
.last_text_seg
)
1066 saved_seg
= now_seg
;
1067 saved_subseg
= now_subseg
;
1069 subseg_set (md
.last_text_seg
, 0);
1071 while (md
.num_slots_in_use
> 0)
1072 emit_one_bundle (); /* force out queued instructions */
1074 /* In case there are labels following the last instruction, resolve
1076 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1078 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1079 symbol_set_frag (lfix
->sym
, frag_now
);
1081 CURR_SLOT
.label_fixups
= 0;
1082 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1084 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1085 symbol_set_frag (lfix
->sym
, frag_now
);
1087 CURR_SLOT
.tag_fixups
= 0;
1089 /* In case there are unwind directives following the last instruction,
1090 resolve those now. We only handle body and prologue directives here.
1091 Give an error for others. */
1092 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1094 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
1095 || ptr
->r
.type
== body
)
1097 ptr
->slot_number
= (unsigned long) frag_more (0);
1098 ptr
->slot_frag
= frag_now
;
1101 as_bad (_("Unwind directive not followed by an instruction."));
1103 unwind
.current_entry
= NULL
;
1105 subseg_set (saved_seg
, saved_subseg
);
1107 if (md
.qp
.X_op
== O_register
)
1108 as_bad ("qualifying predicate not followed by instruction");
1112 ia64_do_align (nbytes
)
1115 char *saved_input_line_pointer
= input_line_pointer
;
1117 input_line_pointer
= "";
1118 s_align_bytes (nbytes
);
1119 input_line_pointer
= saved_input_line_pointer
;
1123 ia64_cons_align (nbytes
)
1128 char *saved_input_line_pointer
= input_line_pointer
;
1129 input_line_pointer
= "";
1130 s_align_bytes (nbytes
);
1131 input_line_pointer
= saved_input_line_pointer
;
1135 /* Output COUNT bytes to a memory location. */
1136 static unsigned char *vbyte_mem_ptr
= NULL
;
1139 output_vbyte_mem (count
, ptr
, comment
)
1142 char *comment ATTRIBUTE_UNUSED
;
1145 if (vbyte_mem_ptr
== NULL
)
1150 for (x
= 0; x
< count
; x
++)
1151 *(vbyte_mem_ptr
++) = ptr
[x
];
1154 /* Count the number of bytes required for records. */
1155 static int vbyte_count
= 0;
1157 count_output (count
, ptr
, comment
)
1159 char *ptr ATTRIBUTE_UNUSED
;
1160 char *comment ATTRIBUTE_UNUSED
;
1162 vbyte_count
+= count
;
1166 output_R1_format (f
, rtype
, rlen
)
1168 unw_record_type rtype
;
1175 output_R3_format (f
, rtype
, rlen
);
1181 else if (rtype
!= prologue
)
1182 as_bad ("record type is not valid");
1184 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1185 (*f
) (1, &byte
, NULL
);
1189 output_R2_format (f
, mask
, grsave
, rlen
)
1196 mask
= (mask
& 0x0f);
1197 grsave
= (grsave
& 0x7f);
1199 bytes
[0] = (UNW_R2
| (mask
>> 1));
1200 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1201 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1202 (*f
) (count
, bytes
, NULL
);
1206 output_R3_format (f
, rtype
, rlen
)
1208 unw_record_type rtype
;
1215 output_R1_format (f
, rtype
, rlen
);
1221 else if (rtype
!= prologue
)
1222 as_bad ("record type is not valid");
1223 bytes
[0] = (UNW_R3
| r
);
1224 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1225 (*f
) (count
+ 1, bytes
, NULL
);
1229 output_P1_format (f
, brmask
)
1234 byte
= UNW_P1
| (brmask
& 0x1f);
1235 (*f
) (1, &byte
, NULL
);
1239 output_P2_format (f
, brmask
, gr
)
1245 brmask
= (brmask
& 0x1f);
1246 bytes
[0] = UNW_P2
| (brmask
>> 1);
1247 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1248 (*f
) (2, bytes
, NULL
);
1252 output_P3_format (f
, rtype
, reg
)
1254 unw_record_type rtype
;
1299 as_bad ("Invalid record type for P3 format.");
1301 bytes
[0] = (UNW_P3
| (r
>> 1));
1302 bytes
[1] = (((r
& 1) << 7) | reg
);
1303 (*f
) (2, bytes
, NULL
);
1307 output_P4_format (f
, imask
, imask_size
)
1309 unsigned char *imask
;
1310 unsigned long imask_size
;
1313 (*f
) (imask_size
, imask
, NULL
);
1317 output_P5_format (f
, grmask
, frmask
)
1320 unsigned long frmask
;
1323 grmask
= (grmask
& 0x0f);
1326 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1327 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1328 bytes
[3] = (frmask
& 0x000000ff);
1329 (*f
) (4, bytes
, NULL
);
1333 output_P6_format (f
, rtype
, rmask
)
1335 unw_record_type rtype
;
1341 if (rtype
== gr_mem
)
1343 else if (rtype
!= fr_mem
)
1344 as_bad ("Invalid record type for format P6");
1345 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1346 (*f
) (1, &byte
, NULL
);
1350 output_P7_format (f
, rtype
, w1
, w2
)
1352 unw_record_type rtype
;
1359 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1364 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1414 bytes
[0] = (UNW_P7
| r
);
1415 (*f
) (count
, bytes
, NULL
);
1419 output_P8_format (f
, rtype
, t
)
1421 unw_record_type rtype
;
1460 case bspstore_psprel
:
1463 case bspstore_sprel
:
1475 case priunat_when_gr
:
1478 case priunat_psprel
:
1484 case priunat_when_mem
:
1491 count
+= output_leb128 (bytes
+ 2, t
, 0);
1492 (*f
) (count
, bytes
, NULL
);
1496 output_P9_format (f
, grmask
, gr
)
1503 bytes
[1] = (grmask
& 0x0f);
1504 bytes
[2] = (gr
& 0x7f);
1505 (*f
) (3, bytes
, NULL
);
1509 output_P10_format (f
, abi
, context
)
1516 bytes
[1] = (abi
& 0xff);
1517 bytes
[2] = (context
& 0xff);
1518 (*f
) (3, bytes
, NULL
);
1522 output_B1_format (f
, rtype
, label
)
1524 unw_record_type rtype
;
1525 unsigned long label
;
1531 output_B4_format (f
, rtype
, label
);
1534 if (rtype
== copy_state
)
1536 else if (rtype
!= label_state
)
1537 as_bad ("Invalid record type for format B1");
1539 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1540 (*f
) (1, &byte
, NULL
);
1544 output_B2_format (f
, ecount
, t
)
1546 unsigned long ecount
;
1553 output_B3_format (f
, ecount
, t
);
1556 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1557 count
+= output_leb128 (bytes
+ 1, t
, 0);
1558 (*f
) (count
, bytes
, NULL
);
1562 output_B3_format (f
, ecount
, t
)
1564 unsigned long ecount
;
1571 output_B2_format (f
, ecount
, t
);
1575 count
+= output_leb128 (bytes
+ 1, t
, 0);
1576 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1577 (*f
) (count
, bytes
, NULL
);
1581 output_B4_format (f
, rtype
, label
)
1583 unw_record_type rtype
;
1584 unsigned long label
;
1591 output_B1_format (f
, rtype
, label
);
1595 if (rtype
== copy_state
)
1597 else if (rtype
!= label_state
)
1598 as_bad ("Invalid record type for format B1");
1600 bytes
[0] = (UNW_B4
| (r
<< 3));
1601 count
+= output_leb128 (bytes
+ 1, label
, 0);
1602 (*f
) (count
, bytes
, NULL
);
1606 format_ab_reg (ab
, reg
)
1613 ret
= (ab
<< 5) | reg
;
1618 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1620 unw_record_type rtype
;
1630 if (rtype
== spill_sprel
)
1632 else if (rtype
!= spill_psprel
)
1633 as_bad ("Invalid record type for format X1");
1634 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1635 count
+= output_leb128 (bytes
+ 2, t
, 0);
1636 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1637 (*f
) (count
, bytes
, NULL
);
1641 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1650 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1651 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1652 count
+= output_leb128 (bytes
+ 3, t
, 0);
1653 (*f
) (count
, bytes
, NULL
);
1657 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1659 unw_record_type rtype
;
1670 if (rtype
== spill_sprel_p
)
1672 else if (rtype
!= spill_psprel_p
)
1673 as_bad ("Invalid record type for format X3");
1674 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1675 bytes
[2] = format_ab_reg (ab
, reg
);
1676 count
+= output_leb128 (bytes
+ 3, t
, 0);
1677 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1678 (*f
) (count
, bytes
, NULL
);
1682 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1692 bytes
[1] = (qp
& 0x3f);
1693 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1694 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1695 count
+= output_leb128 (bytes
+ 4, t
, 0);
1696 (*f
) (count
, bytes
, NULL
);
1699 /* This function allocates a record list structure, and initializes fields. */
1701 static unw_rec_list
*
1702 alloc_record (unw_record_type t
)
1705 ptr
= xmalloc (sizeof (*ptr
));
1707 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1712 /* This function frees an entire list of record structures. */
1715 free_list_records (unw_rec_list
*first
)
1718 for (ptr
= first
; ptr
!= NULL
;)
1720 unw_rec_list
*tmp
= ptr
;
1722 if ((tmp
->r
.type
== prologue
|| tmp
->r
.type
== prologue_gr
)
1723 && tmp
->r
.record
.r
.mask
.i
)
1724 free (tmp
->r
.record
.r
.mask
.i
);
1731 static unw_rec_list
*
1734 unw_rec_list
*ptr
= alloc_record (prologue
);
1735 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1739 static unw_rec_list
*
1740 output_prologue_gr (saved_mask
, reg
)
1741 unsigned int saved_mask
;
1744 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1745 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1746 ptr
->r
.record
.r
.grmask
= saved_mask
;
1747 ptr
->r
.record
.r
.grsave
= reg
;
1751 static unw_rec_list
*
1754 unw_rec_list
*ptr
= alloc_record (body
);
1758 static unw_rec_list
*
1759 output_mem_stack_f (size
)
1762 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1763 ptr
->r
.record
.p
.size
= size
;
1767 static unw_rec_list
*
1768 output_mem_stack_v ()
1770 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1774 static unw_rec_list
*
1778 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1779 ptr
->r
.record
.p
.gr
= gr
;
1783 static unw_rec_list
*
1784 output_psp_sprel (offset
)
1785 unsigned int offset
;
1787 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1788 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1792 static unw_rec_list
*
1795 unw_rec_list
*ptr
= alloc_record (rp_when
);
1799 static unw_rec_list
*
1803 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1804 ptr
->r
.record
.p
.gr
= gr
;
1808 static unw_rec_list
*
1812 unw_rec_list
*ptr
= alloc_record (rp_br
);
1813 ptr
->r
.record
.p
.br
= br
;
1817 static unw_rec_list
*
1818 output_rp_psprel (offset
)
1819 unsigned int offset
;
1821 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1822 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1826 static unw_rec_list
*
1827 output_rp_sprel (offset
)
1828 unsigned int offset
;
1830 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1831 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1835 static unw_rec_list
*
1838 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1842 static unw_rec_list
*
1846 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1847 ptr
->r
.record
.p
.gr
= gr
;
1851 static unw_rec_list
*
1852 output_pfs_psprel (offset
)
1853 unsigned int offset
;
1855 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1856 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1860 static unw_rec_list
*
1861 output_pfs_sprel (offset
)
1862 unsigned int offset
;
1864 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1865 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1869 static unw_rec_list
*
1870 output_preds_when ()
1872 unw_rec_list
*ptr
= alloc_record (preds_when
);
1876 static unw_rec_list
*
1877 output_preds_gr (gr
)
1880 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1881 ptr
->r
.record
.p
.gr
= gr
;
1885 static unw_rec_list
*
1886 output_preds_psprel (offset
)
1887 unsigned int offset
;
1889 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1890 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1894 static unw_rec_list
*
1895 output_preds_sprel (offset
)
1896 unsigned int offset
;
1898 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1899 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1903 static unw_rec_list
*
1904 output_fr_mem (mask
)
1907 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1908 ptr
->r
.record
.p
.rmask
= mask
;
1912 static unw_rec_list
*
1913 output_frgr_mem (gr_mask
, fr_mask
)
1914 unsigned int gr_mask
;
1915 unsigned int fr_mask
;
1917 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1918 ptr
->r
.record
.p
.grmask
= gr_mask
;
1919 ptr
->r
.record
.p
.frmask
= fr_mask
;
1923 static unw_rec_list
*
1924 output_gr_gr (mask
, reg
)
1928 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1929 ptr
->r
.record
.p
.grmask
= mask
;
1930 ptr
->r
.record
.p
.gr
= reg
;
1934 static unw_rec_list
*
1935 output_gr_mem (mask
)
1938 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1939 ptr
->r
.record
.p
.rmask
= mask
;
1943 static unw_rec_list
*
1944 output_br_mem (unsigned int mask
)
1946 unw_rec_list
*ptr
= alloc_record (br_mem
);
1947 ptr
->r
.record
.p
.brmask
= mask
;
1951 static unw_rec_list
*
1952 output_br_gr (save_mask
, reg
)
1953 unsigned int save_mask
;
1956 unw_rec_list
*ptr
= alloc_record (br_gr
);
1957 ptr
->r
.record
.p
.brmask
= save_mask
;
1958 ptr
->r
.record
.p
.gr
= reg
;
1962 static unw_rec_list
*
1963 output_spill_base (offset
)
1964 unsigned int offset
;
1966 unw_rec_list
*ptr
= alloc_record (spill_base
);
1967 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1971 static unw_rec_list
*
1974 unw_rec_list
*ptr
= alloc_record (unat_when
);
1978 static unw_rec_list
*
1982 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1983 ptr
->r
.record
.p
.gr
= gr
;
1987 static unw_rec_list
*
1988 output_unat_psprel (offset
)
1989 unsigned int offset
;
1991 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
1992 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1996 static unw_rec_list
*
1997 output_unat_sprel (offset
)
1998 unsigned int offset
;
2000 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2001 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2005 static unw_rec_list
*
2008 unw_rec_list
*ptr
= alloc_record (lc_when
);
2012 static unw_rec_list
*
2016 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2017 ptr
->r
.record
.p
.gr
= gr
;
2021 static unw_rec_list
*
2022 output_lc_psprel (offset
)
2023 unsigned int offset
;
2025 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2026 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2030 static unw_rec_list
*
2031 output_lc_sprel (offset
)
2032 unsigned int offset
;
2034 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2035 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2039 static unw_rec_list
*
2042 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2046 static unw_rec_list
*
2050 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2051 ptr
->r
.record
.p
.gr
= gr
;
2055 static unw_rec_list
*
2056 output_fpsr_psprel (offset
)
2057 unsigned int offset
;
2059 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2060 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2064 static unw_rec_list
*
2065 output_fpsr_sprel (offset
)
2066 unsigned int offset
;
2068 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2069 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2073 static unw_rec_list
*
2074 output_priunat_when_gr ()
2076 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2080 static unw_rec_list
*
2081 output_priunat_when_mem ()
2083 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2087 static unw_rec_list
*
2088 output_priunat_gr (gr
)
2091 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2092 ptr
->r
.record
.p
.gr
= gr
;
2096 static unw_rec_list
*
2097 output_priunat_psprel (offset
)
2098 unsigned int offset
;
2100 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2101 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2105 static unw_rec_list
*
2106 output_priunat_sprel (offset
)
2107 unsigned int offset
;
2109 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2110 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2114 static unw_rec_list
*
2117 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2121 static unw_rec_list
*
2125 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2126 ptr
->r
.record
.p
.gr
= gr
;
2130 static unw_rec_list
*
2131 output_bsp_psprel (offset
)
2132 unsigned int offset
;
2134 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2135 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2139 static unw_rec_list
*
2140 output_bsp_sprel (offset
)
2141 unsigned int offset
;
2143 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2144 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2148 static unw_rec_list
*
2149 output_bspstore_when ()
2151 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2155 static unw_rec_list
*
2156 output_bspstore_gr (gr
)
2159 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2160 ptr
->r
.record
.p
.gr
= gr
;
2164 static unw_rec_list
*
2165 output_bspstore_psprel (offset
)
2166 unsigned int offset
;
2168 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2169 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2173 static unw_rec_list
*
2174 output_bspstore_sprel (offset
)
2175 unsigned int offset
;
2177 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2178 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2182 static unw_rec_list
*
2185 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2189 static unw_rec_list
*
2193 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2194 ptr
->r
.record
.p
.gr
= gr
;
2198 static unw_rec_list
*
2199 output_rnat_psprel (offset
)
2200 unsigned int offset
;
2202 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2203 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2207 static unw_rec_list
*
2208 output_rnat_sprel (offset
)
2209 unsigned int offset
;
2211 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2212 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2216 static unw_rec_list
*
2217 output_unwabi (abi
, context
)
2219 unsigned long context
;
2221 unw_rec_list
*ptr
= alloc_record (unwabi
);
2222 ptr
->r
.record
.p
.abi
= abi
;
2223 ptr
->r
.record
.p
.context
= context
;
2227 static unw_rec_list
*
2228 output_epilogue (unsigned long ecount
)
2230 unw_rec_list
*ptr
= alloc_record (epilogue
);
2231 ptr
->r
.record
.b
.ecount
= ecount
;
2235 static unw_rec_list
*
2236 output_label_state (unsigned long label
)
2238 unw_rec_list
*ptr
= alloc_record (label_state
);
2239 ptr
->r
.record
.b
.label
= label
;
2243 static unw_rec_list
*
2244 output_copy_state (unsigned long label
)
2246 unw_rec_list
*ptr
= alloc_record (copy_state
);
2247 ptr
->r
.record
.b
.label
= label
;
2251 static unw_rec_list
*
2252 output_spill_psprel (ab
, reg
, offset
)
2255 unsigned int offset
;
2257 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2258 ptr
->r
.record
.x
.ab
= ab
;
2259 ptr
->r
.record
.x
.reg
= reg
;
2260 ptr
->r
.record
.x
.pspoff
= offset
/ 4;
2264 static unw_rec_list
*
2265 output_spill_sprel (ab
, reg
, offset
)
2268 unsigned int offset
;
2270 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2271 ptr
->r
.record
.x
.ab
= ab
;
2272 ptr
->r
.record
.x
.reg
= reg
;
2273 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2277 static unw_rec_list
*
2278 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2281 unsigned int offset
;
2282 unsigned int predicate
;
2284 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2285 ptr
->r
.record
.x
.ab
= ab
;
2286 ptr
->r
.record
.x
.reg
= reg
;
2287 ptr
->r
.record
.x
.pspoff
= offset
/ 4;
2288 ptr
->r
.record
.x
.qp
= predicate
;
2292 static unw_rec_list
*
2293 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2296 unsigned int offset
;
2297 unsigned int predicate
;
2299 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2300 ptr
->r
.record
.x
.ab
= ab
;
2301 ptr
->r
.record
.x
.reg
= reg
;
2302 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2303 ptr
->r
.record
.x
.qp
= predicate
;
2307 static unw_rec_list
*
2308 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2311 unsigned int targ_reg
;
2314 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2315 ptr
->r
.record
.x
.ab
= ab
;
2316 ptr
->r
.record
.x
.reg
= reg
;
2317 ptr
->r
.record
.x
.treg
= targ_reg
;
2318 ptr
->r
.record
.x
.xy
= xy
;
2322 static unw_rec_list
*
2323 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2326 unsigned int targ_reg
;
2328 unsigned int predicate
;
2330 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2331 ptr
->r
.record
.x
.ab
= ab
;
2332 ptr
->r
.record
.x
.reg
= reg
;
2333 ptr
->r
.record
.x
.treg
= targ_reg
;
2334 ptr
->r
.record
.x
.xy
= xy
;
2335 ptr
->r
.record
.x
.qp
= predicate
;
2339 /* Given a unw_rec_list process the correct format with the
2340 specified function. */
2343 process_one_record (ptr
, f
)
2347 unsigned long fr_mask
, gr_mask
;
2349 switch (ptr
->r
.type
)
2355 /* These are taken care of by prologue/prologue_gr. */
2360 if (ptr
->r
.type
== prologue_gr
)
2361 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2362 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2364 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2366 /* Output descriptor(s) for union of register spills (if any). */
2367 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2368 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2371 if ((fr_mask
& ~0xfUL
) == 0)
2372 output_P6_format (f
, fr_mem
, fr_mask
);
2375 output_P5_format (f
, gr_mask
, fr_mask
);
2380 output_P6_format (f
, gr_mem
, gr_mask
);
2381 if (ptr
->r
.record
.r
.mask
.br_mem
)
2382 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2384 /* output imask descriptor if necessary: */
2385 if (ptr
->r
.record
.r
.mask
.i
)
2386 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2387 ptr
->r
.record
.r
.imask_size
);
2391 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2395 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2396 ptr
->r
.record
.p
.size
);
2409 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2412 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2415 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2423 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2432 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2442 case bspstore_sprel
:
2444 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2447 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2450 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2453 as_bad ("spill_mask record unimplemented.");
2455 case priunat_when_gr
:
2456 case priunat_when_mem
:
2460 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2462 case priunat_psprel
:
2464 case bspstore_psprel
:
2466 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2469 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2472 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2476 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2479 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2480 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2481 ptr
->r
.record
.x
.pspoff
);
2484 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2485 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2486 ptr
->r
.record
.x
.spoff
);
2489 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2490 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2491 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2493 case spill_psprel_p
:
2494 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2495 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2496 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2499 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2500 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2501 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2504 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2505 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2506 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2510 as_bad ("record_type_not_valid");
2515 /* Given a unw_rec_list list, process all the records with
2516 the specified function. */
2518 process_unw_records (list
, f
)
2523 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2524 process_one_record (ptr
, f
);
2527 /* Determine the size of a record list in bytes. */
2529 calc_record_size (list
)
2533 process_unw_records (list
, count_output
);
2537 /* Update IMASK bitmask to reflect the fact that one or more registers
2538 of type TYPE are saved starting at instruction with index T. If N
2539 bits are set in REGMASK, it is assumed that instructions T through
2540 T+N-1 save these registers.
2544 1: instruction saves next fp reg
2545 2: instruction saves next general reg
2546 3: instruction saves next branch reg */
2548 set_imask (region
, regmask
, t
, type
)
2549 unw_rec_list
*region
;
2550 unsigned long regmask
;
2554 unsigned char *imask
;
2555 unsigned long imask_size
;
2559 imask
= region
->r
.record
.r
.mask
.i
;
2560 imask_size
= region
->r
.record
.r
.imask_size
;
2563 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2564 imask
= xmalloc (imask_size
);
2565 memset (imask
, 0, imask_size
);
2567 region
->r
.record
.r
.imask_size
= imask_size
;
2568 region
->r
.record
.r
.mask
.i
= imask
;
2572 pos
= 2 * (3 - t
% 4);
2575 if (i
>= imask_size
)
2577 as_bad ("Ignoring attempt to spill beyond end of region");
2581 imask
[i
] |= (type
& 0x3) << pos
;
2583 regmask
&= (regmask
- 1);
2594 count_bits (unsigned long mask
)
2606 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2607 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2608 containing FIRST_ADDR. */
2611 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
)
2612 unsigned long slot_addr
;
2614 unsigned long first_addr
;
2617 unsigned long index
= 0;
2619 /* First time we are called, the initial address and frag are invalid. */
2620 if (first_addr
== 0)
2623 /* If the two addresses are in different frags, then we need to add in
2624 the remaining size of this frag, and then the entire size of intermediate
2626 while (slot_frag
!= first_frag
)
2628 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2630 /* Add in the full size of the frag converted to instruction slots. */
2631 index
+= 3 * (first_frag
->fr_fix
>> 4);
2632 /* Subtract away the initial part before first_addr. */
2633 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2634 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2636 /* Move to the beginning of the next frag. */
2637 first_frag
= first_frag
->fr_next
;
2638 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2641 /* Add in the used part of the last frag. */
2642 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2643 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2647 /* Optimize unwind record directives. */
2649 static unw_rec_list
*
2650 optimize_unw_records (list
)
2656 /* If the only unwind record is ".prologue" or ".prologue" followed
2657 by ".body", then we can optimize the unwind directives away. */
2658 if (list
->r
.type
== prologue
2659 && (list
->next
== NULL
2660 || (list
->next
->r
.type
== body
&& list
->next
->next
== NULL
)))
2666 /* Given a complete record list, process any records which have
2667 unresolved fields, (ie length counts for a prologue). After
2668 this has been run, all neccessary information should be available
2669 within each record to generate an image. */
2672 fixup_unw_records (list
)
2675 unw_rec_list
*ptr
, *region
= 0;
2676 unsigned long first_addr
= 0, rlen
= 0, t
;
2677 fragS
*first_frag
= 0;
2679 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2681 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2682 as_bad (" Insn slot not set in unwind record.");
2683 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2684 first_addr
, first_frag
);
2685 switch (ptr
->r
.type
)
2692 int size
, dir_len
= 0;
2693 unsigned long last_addr
;
2696 first_addr
= ptr
->slot_number
;
2697 first_frag
= ptr
->slot_frag
;
2698 ptr
->slot_number
= 0;
2699 /* Find either the next body/prologue start, or the end of
2700 the list, and determine the size of the region. */
2701 last_addr
= unwind
.next_slot_number
;
2702 last_frag
= unwind
.next_slot_frag
;
2703 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2704 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2705 || last
->r
.type
== body
)
2707 last_addr
= last
->slot_number
;
2708 last_frag
= last
->slot_frag
;
2711 else if (!last
->next
)
2713 /* In the absence of an explicit .body directive,
2714 the prologue ends after the last instruction
2715 covered by an unwind directive. */
2716 if (ptr
->r
.type
!= body
)
2718 last_addr
= last
->slot_number
;
2719 last_frag
= last
->slot_frag
;
2720 switch (last
->r
.type
)
2723 dir_len
= (count_bits (last
->r
.record
.p
.frmask
)
2724 + count_bits (last
->r
.record
.p
.grmask
));
2728 dir_len
+= count_bits (last
->r
.record
.p
.rmask
);
2732 dir_len
+= count_bits (last
->r
.record
.p
.brmask
);
2735 dir_len
+= count_bits (last
->r
.record
.p
.grmask
);
2744 size
= (slot_index (last_addr
, last_frag
, first_addr
, first_frag
)
2746 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2747 if (ptr
->r
.type
== body
)
2748 /* End of region. */
2755 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2766 case priunat_when_gr
:
2767 case priunat_when_mem
:
2771 ptr
->r
.record
.p
.t
= t
;
2779 case spill_psprel_p
:
2780 ptr
->r
.record
.x
.t
= t
;
2786 as_bad ("frgr_mem record before region record!\n");
2789 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2790 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2791 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2792 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2797 as_bad ("fr_mem record before region record!\n");
2800 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2801 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2806 as_bad ("gr_mem record before region record!\n");
2809 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2810 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2815 as_bad ("br_mem record before region record!\n");
2818 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2819 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2825 as_bad ("gr_gr record before region record!\n");
2828 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2833 as_bad ("br_gr record before region record!\n");
2836 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2845 /* Helper routine for output_unw_records. Emits the header for the unwind
2849 setup_unwind_header (int size
, unsigned char **mem
)
2854 /* pad to pointer-size boundry. */
2855 x
= size
% md
.pointer_size
;
2857 extra
= md
.pointer_size
- x
;
2859 /* Add 8 for the header + a pointer for the
2860 personality offset. */
2861 *mem
= xmalloc (size
+ extra
+ 8 + md
.pointer_size
);
2863 /* Clear the padding area and personality. */
2864 memset (*mem
+ 8 + size
, 0, extra
+ md
.pointer_size
);
2866 /* Initialize the header area. */
2867 if (unwind
.personality_routine
)
2869 if (md
.flags
& EF_IA_64_ABI64
)
2870 flag_value
= (bfd_vma
) 3 << 32;
2872 /* 32-bit unwind info block. */
2873 flag_value
= (bfd_vma
) 0x1003 << 32;
2878 md_number_to_chars (*mem
, (((bfd_vma
) 1 << 48) /* Version. */
2879 | flag_value
/* U & E handler flags. */
2880 | ((size
+ extra
) / md
.pointer_size
)), /* Length. */
2886 /* Generate an unwind image from a record list. Returns the number of
2887 bytes in the resulting image. The memory image itselof is returned
2888 in the 'ptr' parameter. */
2890 output_unw_records (list
, ptr
)
2899 list
= optimize_unw_records (list
);
2900 fixup_unw_records (list
);
2901 size
= calc_record_size (list
);
2903 if (size
> 0 || unwind
.force_unwind_entry
)
2905 unwind
.force_unwind_entry
= 0;
2906 extra
= setup_unwind_header (size
, &mem
);
2908 vbyte_mem_ptr
= mem
+ 8;
2909 process_unw_records (list
, output_vbyte_mem
);
2913 size
+= extra
+ 8 + md
.pointer_size
;
2919 convert_expr_to_ab_reg (e
, ab
, regp
)
2926 if (e
->X_op
!= O_register
)
2929 reg
= e
->X_add_number
;
2930 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2933 *regp
= reg
- REG_GR
;
2935 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2936 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2939 *regp
= reg
- REG_FR
;
2941 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2944 *regp
= reg
- REG_BR
;
2951 case REG_PR
: *regp
= 0; break;
2952 case REG_PSP
: *regp
= 1; break;
2953 case REG_PRIUNAT
: *regp
= 2; break;
2954 case REG_BR
+ 0: *regp
= 3; break;
2955 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2956 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2957 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2958 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2959 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2960 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2961 case REG_AR
+ AR_LC
: *regp
= 10; break;
2971 convert_expr_to_xy_reg (e
, xy
, regp
)
2978 if (e
->X_op
!= O_register
)
2981 reg
= e
->X_add_number
;
2983 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
2986 *regp
= reg
- REG_GR
;
2988 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
2991 *regp
= reg
- REG_FR
;
2993 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
2996 *regp
= reg
- REG_BR
;
3005 int dummy ATTRIBUTE_UNUSED
;
3010 radix
= *input_line_pointer
++;
3012 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3014 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3015 ignore_rest_of_line ();
3020 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3022 dot_special_section (which
)
3025 set_section ((char *) special_section_name
[which
]);
3029 add_unwind_entry (ptr
)
3033 unwind
.tail
->next
= ptr
;
3038 /* The current entry can in fact be a chain of unwind entries. */
3039 if (unwind
.current_entry
== NULL
)
3040 unwind
.current_entry
= ptr
;
3045 int dummy ATTRIBUTE_UNUSED
;
3051 if (e
.X_op
!= O_constant
)
3052 as_bad ("Operand to .fframe must be a constant");
3054 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3059 int dummy ATTRIBUTE_UNUSED
;
3065 reg
= e
.X_add_number
- REG_GR
;
3066 if (e
.X_op
== O_register
&& reg
< 128)
3068 add_unwind_entry (output_mem_stack_v ());
3069 if (! (unwind
.prologue_mask
& 2))
3070 add_unwind_entry (output_psp_gr (reg
));
3073 as_bad ("First operand to .vframe must be a general register");
3077 dot_vframesp (dummy
)
3078 int dummy ATTRIBUTE_UNUSED
;
3083 if (e
.X_op
== O_constant
)
3085 add_unwind_entry (output_mem_stack_v ());
3086 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3089 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3093 dot_vframepsp (dummy
)
3094 int dummy ATTRIBUTE_UNUSED
;
3099 if (e
.X_op
== O_constant
)
3101 add_unwind_entry (output_mem_stack_v ());
3102 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3105 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3110 int dummy ATTRIBUTE_UNUSED
;
3116 sep
= parse_operand (&e1
);
3118 as_bad ("No second operand to .save");
3119 sep
= parse_operand (&e2
);
3121 reg1
= e1
.X_add_number
;
3122 reg2
= e2
.X_add_number
- REG_GR
;
3124 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3125 if (e1
.X_op
== O_register
)
3127 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3131 case REG_AR
+ AR_BSP
:
3132 add_unwind_entry (output_bsp_when ());
3133 add_unwind_entry (output_bsp_gr (reg2
));
3135 case REG_AR
+ AR_BSPSTORE
:
3136 add_unwind_entry (output_bspstore_when ());
3137 add_unwind_entry (output_bspstore_gr (reg2
));
3139 case REG_AR
+ AR_RNAT
:
3140 add_unwind_entry (output_rnat_when ());
3141 add_unwind_entry (output_rnat_gr (reg2
));
3143 case REG_AR
+ AR_UNAT
:
3144 add_unwind_entry (output_unat_when ());
3145 add_unwind_entry (output_unat_gr (reg2
));
3147 case REG_AR
+ AR_FPSR
:
3148 add_unwind_entry (output_fpsr_when ());
3149 add_unwind_entry (output_fpsr_gr (reg2
));
3151 case REG_AR
+ AR_PFS
:
3152 add_unwind_entry (output_pfs_when ());
3153 if (! (unwind
.prologue_mask
& 4))
3154 add_unwind_entry (output_pfs_gr (reg2
));
3156 case REG_AR
+ AR_LC
:
3157 add_unwind_entry (output_lc_when ());
3158 add_unwind_entry (output_lc_gr (reg2
));
3161 add_unwind_entry (output_rp_when ());
3162 if (! (unwind
.prologue_mask
& 8))
3163 add_unwind_entry (output_rp_gr (reg2
));
3166 add_unwind_entry (output_preds_when ());
3167 if (! (unwind
.prologue_mask
& 1))
3168 add_unwind_entry (output_preds_gr (reg2
));
3171 add_unwind_entry (output_priunat_when_gr ());
3172 add_unwind_entry (output_priunat_gr (reg2
));
3175 as_bad ("First operand not a valid register");
3179 as_bad (" Second operand not a valid register");
3182 as_bad ("First operand not a register");
3187 int dummy ATTRIBUTE_UNUSED
;
3190 unsigned long ecount
; /* # of _additional_ regions to pop */
3193 sep
= parse_operand (&e1
);
3194 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3196 as_bad ("First operand to .restore must be stack pointer (sp)");
3202 parse_operand (&e2
);
3203 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3205 as_bad ("Second operand to .restore must be a constant >= 0");
3208 ecount
= e2
.X_add_number
;
3211 ecount
= unwind
.prologue_count
- 1;
3213 if (ecount
>= unwind
.prologue_count
)
3215 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3216 ecount
+ 1, unwind
.prologue_count
);
3220 add_unwind_entry (output_epilogue (ecount
));
3222 if (ecount
< unwind
.prologue_count
)
3223 unwind
.prologue_count
-= ecount
+ 1;
3225 unwind
.prologue_count
= 0;
3229 dot_restorereg (dummy
)
3230 int dummy ATTRIBUTE_UNUSED
;
3232 unsigned int ab
, reg
;
3237 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3239 as_bad ("First operand to .restorereg must be a preserved register");
3242 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3246 dot_restorereg_p (dummy
)
3247 int dummy ATTRIBUTE_UNUSED
;
3249 unsigned int qp
, ab
, reg
;
3253 sep
= parse_operand (&e1
);
3256 as_bad ("No second operand to .restorereg.p");
3260 parse_operand (&e2
);
3262 qp
= e1
.X_add_number
- REG_P
;
3263 if (e1
.X_op
!= O_register
|| qp
> 63)
3265 as_bad ("First operand to .restorereg.p must be a predicate");
3269 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3271 as_bad ("Second operand to .restorereg.p must be a preserved register");
3274 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3278 generate_unwind_image (text_name
)
3279 const char *text_name
;
3284 /* Force out pending instructions, to make sure all unwind records have
3285 a valid slot_number field. */
3286 ia64_flush_insns ();
3288 /* Generate the unwind record. */
3289 size
= output_unw_records (unwind
.list
, &unw_rec
);
3290 if (size
% md
.pointer_size
!= 0)
3291 as_bad ("Unwind record is not a multiple of %d bytes.", md
.pointer_size
);
3293 /* If there are unwind records, switch sections, and output the info. */
3296 unsigned char *where
;
3299 bfd_reloc_code_real_type reloc
;
3301 make_unw_section_name (SPECIAL_SECTION_UNWIND_INFO
, text_name
, sec_name
);
3302 set_section (sec_name
);
3303 bfd_set_section_flags (stdoutput
, now_seg
,
3304 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3306 /* Make sure the section has 4 byte alignment for ILP32 and
3307 8 byte alignment for LP64. */
3308 frag_align (md
.pointer_size_shift
, 0, 0);
3309 record_alignment (now_seg
, md
.pointer_size_shift
);
3311 /* Set expression which points to start of unwind descriptor area. */
3312 unwind
.info
= expr_build_dot ();
3314 where
= (unsigned char *) frag_more (size
);
3316 /* Issue a label for this address, and keep track of it to put it
3317 in the unwind section. */
3319 /* Copy the information from the unwind record into this section. The
3320 data is already in the correct byte order. */
3321 memcpy (where
, unw_rec
, size
);
3323 /* Add the personality address to the image. */
3324 if (unwind
.personality_routine
!= 0)
3326 exp
.X_op
= O_symbol
;
3327 exp
.X_add_symbol
= unwind
.personality_routine
;
3328 exp
.X_add_number
= 0;
3330 if (md
.flags
& EF_IA_64_BE
)
3332 if (md
.flags
& EF_IA_64_ABI64
)
3333 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3335 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3339 if (md
.flags
& EF_IA_64_ABI64
)
3340 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3342 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3345 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3346 md
.pointer_size
, &exp
, 0, reloc
);
3347 unwind
.personality_routine
= 0;
3351 free_list_records (unwind
.list
);
3352 free_saved_prologue_counts ();
3353 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3359 dot_handlerdata (dummy
)
3360 int dummy ATTRIBUTE_UNUSED
;
3362 const char *text_name
= segment_name (now_seg
);
3364 /* If text section name starts with ".text" (which it should),
3365 strip this prefix off. */
3366 if (strcmp (text_name
, ".text") == 0)
3369 unwind
.force_unwind_entry
= 1;
3371 /* Remember which segment we're in so we can switch back after .endp */
3372 unwind
.saved_text_seg
= now_seg
;
3373 unwind
.saved_text_subseg
= now_subseg
;
3375 /* Generate unwind info into unwind-info section and then leave that
3376 section as the currently active one so dataXX directives go into
3377 the language specific data area of the unwind info block. */
3378 generate_unwind_image (text_name
);
3379 demand_empty_rest_of_line ();
3383 dot_unwentry (dummy
)
3384 int dummy ATTRIBUTE_UNUSED
;
3386 unwind
.force_unwind_entry
= 1;
3387 demand_empty_rest_of_line ();
3392 int dummy ATTRIBUTE_UNUSED
;
3398 reg
= e
.X_add_number
- REG_BR
;
3399 if (e
.X_op
== O_register
&& reg
< 8)
3400 add_unwind_entry (output_rp_br (reg
));
3402 as_bad ("First operand not a valid branch register");
3406 dot_savemem (psprel
)
3413 sep
= parse_operand (&e1
);
3415 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3416 sep
= parse_operand (&e2
);
3418 reg1
= e1
.X_add_number
;
3419 val
= e2
.X_add_number
;
3421 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3422 if (e1
.X_op
== O_register
)
3424 if (e2
.X_op
== O_constant
)
3428 case REG_AR
+ AR_BSP
:
3429 add_unwind_entry (output_bsp_when ());
3430 add_unwind_entry ((psprel
3432 : output_bsp_sprel
) (val
));
3434 case REG_AR
+ AR_BSPSTORE
:
3435 add_unwind_entry (output_bspstore_when ());
3436 add_unwind_entry ((psprel
3437 ? output_bspstore_psprel
3438 : output_bspstore_sprel
) (val
));
3440 case REG_AR
+ AR_RNAT
:
3441 add_unwind_entry (output_rnat_when ());
3442 add_unwind_entry ((psprel
3443 ? output_rnat_psprel
3444 : output_rnat_sprel
) (val
));
3446 case REG_AR
+ AR_UNAT
:
3447 add_unwind_entry (output_unat_when ());
3448 add_unwind_entry ((psprel
3449 ? output_unat_psprel
3450 : output_unat_sprel
) (val
));
3452 case REG_AR
+ AR_FPSR
:
3453 add_unwind_entry (output_fpsr_when ());
3454 add_unwind_entry ((psprel
3455 ? output_fpsr_psprel
3456 : output_fpsr_sprel
) (val
));
3458 case REG_AR
+ AR_PFS
:
3459 add_unwind_entry (output_pfs_when ());
3460 add_unwind_entry ((psprel
3462 : output_pfs_sprel
) (val
));
3464 case REG_AR
+ AR_LC
:
3465 add_unwind_entry (output_lc_when ());
3466 add_unwind_entry ((psprel
3468 : output_lc_sprel
) (val
));
3471 add_unwind_entry (output_rp_when ());
3472 add_unwind_entry ((psprel
3474 : output_rp_sprel
) (val
));
3477 add_unwind_entry (output_preds_when ());
3478 add_unwind_entry ((psprel
3479 ? output_preds_psprel
3480 : output_preds_sprel
) (val
));
3483 add_unwind_entry (output_priunat_when_mem ());
3484 add_unwind_entry ((psprel
3485 ? output_priunat_psprel
3486 : output_priunat_sprel
) (val
));
3489 as_bad ("First operand not a valid register");
3493 as_bad (" Second operand not a valid constant");
3496 as_bad ("First operand not a register");
3501 int dummy ATTRIBUTE_UNUSED
;
3505 sep
= parse_operand (&e1
);
3507 parse_operand (&e2
);
3509 if (e1
.X_op
!= O_constant
)
3510 as_bad ("First operand to .save.g must be a constant.");
3513 int grmask
= e1
.X_add_number
;
3515 add_unwind_entry (output_gr_mem (grmask
));
3518 int reg
= e2
.X_add_number
- REG_GR
;
3519 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3520 add_unwind_entry (output_gr_gr (grmask
, reg
));
3522 as_bad ("Second operand is an invalid register.");
3529 int dummy ATTRIBUTE_UNUSED
;
3533 sep
= parse_operand (&e1
);
3535 if (e1
.X_op
!= O_constant
)
3536 as_bad ("Operand to .save.f must be a constant.");
3538 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3543 int dummy ATTRIBUTE_UNUSED
;
3550 sep
= parse_operand (&e1
);
3551 if (e1
.X_op
!= O_constant
)
3553 as_bad ("First operand to .save.b must be a constant.");
3556 brmask
= e1
.X_add_number
;
3560 sep
= parse_operand (&e2
);
3561 reg
= e2
.X_add_number
- REG_GR
;
3562 if (e2
.X_op
!= O_register
|| reg
> 127)
3564 as_bad ("Second operand to .save.b must be a general register.");
3567 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3570 add_unwind_entry (output_br_mem (brmask
));
3572 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3573 ignore_rest_of_line ();
3578 int dummy ATTRIBUTE_UNUSED
;
3582 sep
= parse_operand (&e1
);
3584 parse_operand (&e2
);
3586 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3587 as_bad ("Both operands of .save.gf must be constants.");
3590 int grmask
= e1
.X_add_number
;
3591 int frmask
= e2
.X_add_number
;
3592 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3598 int dummy ATTRIBUTE_UNUSED
;
3603 sep
= parse_operand (&e
);
3604 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3605 ignore_rest_of_line ();
3607 if (e
.X_op
!= O_constant
)
3608 as_bad ("Operand to .spill must be a constant");
3610 add_unwind_entry (output_spill_base (e
.X_add_number
));
3614 dot_spillreg (dummy
)
3615 int dummy ATTRIBUTE_UNUSED
;
3617 int sep
, ab
, xy
, reg
, treg
;
3620 sep
= parse_operand (&e1
);
3623 as_bad ("No second operand to .spillreg");
3627 parse_operand (&e2
);
3629 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3631 as_bad ("First operand to .spillreg must be a preserved register");
3635 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3637 as_bad ("Second operand to .spillreg must be a register");
3641 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3645 dot_spillmem (psprel
)
3651 sep
= parse_operand (&e1
);
3654 as_bad ("Second operand missing");
3658 parse_operand (&e2
);
3660 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3662 as_bad ("First operand to .spill%s must be a preserved register",
3663 psprel
? "psp" : "sp");
3667 if (e2
.X_op
!= O_constant
)
3669 as_bad ("Second operand to .spill%s must be a constant",
3670 psprel
? "psp" : "sp");
3675 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
3677 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
3681 dot_spillreg_p (dummy
)
3682 int dummy ATTRIBUTE_UNUSED
;
3684 int sep
, ab
, xy
, reg
, treg
;
3685 expressionS e1
, e2
, e3
;
3688 sep
= parse_operand (&e1
);
3691 as_bad ("No second and third operand to .spillreg.p");
3695 sep
= parse_operand (&e2
);
3698 as_bad ("No third operand to .spillreg.p");
3702 parse_operand (&e3
);
3704 qp
= e1
.X_add_number
- REG_P
;
3706 if (e1
.X_op
!= O_register
|| qp
> 63)
3708 as_bad ("First operand to .spillreg.p must be a predicate");
3712 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3714 as_bad ("Second operand to .spillreg.p must be a preserved register");
3718 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
3720 as_bad ("Third operand to .spillreg.p must be a register");
3724 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
3728 dot_spillmem_p (psprel
)
3731 expressionS e1
, e2
, e3
;
3735 sep
= parse_operand (&e1
);
3738 as_bad ("Second operand missing");
3742 parse_operand (&e2
);
3745 as_bad ("Second operand missing");
3749 parse_operand (&e3
);
3751 qp
= e1
.X_add_number
- REG_P
;
3752 if (e1
.X_op
!= O_register
|| qp
> 63)
3754 as_bad ("First operand to .spill%s_p must be a predicate",
3755 psprel
? "psp" : "sp");
3759 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3761 as_bad ("Second operand to .spill%s_p must be a preserved register",
3762 psprel
? "psp" : "sp");
3766 if (e3
.X_op
!= O_constant
)
3768 as_bad ("Third operand to .spill%s_p must be a constant",
3769 psprel
? "psp" : "sp");
3774 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3776 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3780 get_saved_prologue_count (lbl
)
3783 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3785 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3789 return lpc
->prologue_count
;
3791 as_bad ("Missing .label_state %ld", lbl
);
3796 save_prologue_count (lbl
, count
)
3800 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3802 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3806 lpc
->prologue_count
= count
;
3809 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
3811 new_lpc
->next
= unwind
.saved_prologue_counts
;
3812 new_lpc
->label_number
= lbl
;
3813 new_lpc
->prologue_count
= count
;
3814 unwind
.saved_prologue_counts
= new_lpc
;
3819 free_saved_prologue_counts ()
3821 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3822 label_prologue_count
*next
;
3831 unwind
.saved_prologue_counts
= NULL
;
3835 dot_label_state (dummy
)
3836 int dummy ATTRIBUTE_UNUSED
;
3841 if (e
.X_op
!= O_constant
)
3843 as_bad ("Operand to .label_state must be a constant");
3846 add_unwind_entry (output_label_state (e
.X_add_number
));
3847 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
3851 dot_copy_state (dummy
)
3852 int dummy ATTRIBUTE_UNUSED
;
3857 if (e
.X_op
!= O_constant
)
3859 as_bad ("Operand to .copy_state must be a constant");
3862 add_unwind_entry (output_copy_state (e
.X_add_number
));
3863 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
3868 int dummy ATTRIBUTE_UNUSED
;
3873 sep
= parse_operand (&e1
);
3876 as_bad ("Second operand to .unwabi missing");
3879 sep
= parse_operand (&e2
);
3880 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3881 ignore_rest_of_line ();
3883 if (e1
.X_op
!= O_constant
)
3885 as_bad ("First operand to .unwabi must be a constant");
3889 if (e2
.X_op
!= O_constant
)
3891 as_bad ("Second operand to .unwabi must be a constant");
3895 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
3899 dot_personality (dummy
)
3900 int dummy ATTRIBUTE_UNUSED
;
3904 name
= input_line_pointer
;
3905 c
= get_symbol_end ();
3906 p
= input_line_pointer
;
3907 unwind
.personality_routine
= symbol_find_or_make (name
);
3908 unwind
.force_unwind_entry
= 1;
3911 demand_empty_rest_of_line ();
3916 int dummy ATTRIBUTE_UNUSED
;
3921 unwind
.proc_start
= expr_build_dot ();
3922 /* Parse names of main and alternate entry points and mark them as
3923 function symbols: */
3927 name
= input_line_pointer
;
3928 c
= get_symbol_end ();
3929 p
= input_line_pointer
;
3930 sym
= symbol_find_or_make (name
);
3931 if (unwind
.proc_start
== 0)
3933 unwind
.proc_start
= sym
;
3935 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
3938 if (*input_line_pointer
!= ',')
3940 ++input_line_pointer
;
3942 demand_empty_rest_of_line ();
3945 unwind
.prologue_count
= 0;
3946 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3947 unwind
.personality_routine
= 0;
3952 int dummy ATTRIBUTE_UNUSED
;
3954 unwind
.prologue
= 0;
3955 unwind
.prologue_mask
= 0;
3957 add_unwind_entry (output_body ());
3958 demand_empty_rest_of_line ();
3962 dot_prologue (dummy
)
3963 int dummy ATTRIBUTE_UNUSED
;
3966 int mask
= 0, grsave
= 0;
3968 if (!is_it_end_of_statement ())
3971 sep
= parse_operand (&e1
);
3973 as_bad ("No second operand to .prologue");
3974 sep
= parse_operand (&e2
);
3975 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3976 ignore_rest_of_line ();
3978 if (e1
.X_op
== O_constant
)
3980 mask
= e1
.X_add_number
;
3982 if (e2
.X_op
== O_constant
)
3983 grsave
= e2
.X_add_number
;
3984 else if (e2
.X_op
== O_register
3985 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
3988 as_bad ("Second operand not a constant or general register");
3990 add_unwind_entry (output_prologue_gr (mask
, grsave
));
3993 as_bad ("First operand not a constant");
3996 add_unwind_entry (output_prologue ());
3998 unwind
.prologue
= 1;
3999 unwind
.prologue_mask
= mask
;
4000 ++unwind
.prologue_count
;
4005 int dummy ATTRIBUTE_UNUSED
;
4009 int bytes_per_address
;
4012 subsegT saved_subseg
;
4013 const char *sec_name
, *text_name
;
4017 if (unwind
.saved_text_seg
)
4019 saved_seg
= unwind
.saved_text_seg
;
4020 saved_subseg
= unwind
.saved_text_subseg
;
4021 unwind
.saved_text_seg
= NULL
;
4025 saved_seg
= now_seg
;
4026 saved_subseg
= now_subseg
;
4030 Use a slightly ugly scheme to derive the unwind section names from
4031 the text section name:
4033 text sect. unwind table sect.
4034 name: name: comments:
4035 ---------- ----------------- --------------------------------
4037 .text.foo .IA_64.unwind.text.foo
4038 .foo .IA_64.unwind.foo
4040 .gnu.linkonce.ia64unw.foo
4041 _info .IA_64.unwind_info gas issues error message (ditto)
4042 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
4044 This mapping is done so that:
4046 (a) An object file with unwind info only in .text will use
4047 unwind section names .IA_64.unwind and .IA_64.unwind_info.
4048 This follows the letter of the ABI and also ensures backwards
4049 compatibility with older toolchains.
4051 (b) An object file with unwind info in multiple text sections
4052 will use separate unwind sections for each text section.
4053 This allows us to properly set the "sh_info" and "sh_link"
4054 fields in SHT_IA_64_UNWIND as required by the ABI and also
4055 lets GNU ld support programs with multiple segments
4056 containing unwind info (as might be the case for certain
4057 embedded applications).
4059 (c) An error is issued if there would be a name clash.
4061 text_name
= segment_name (saved_seg
);
4062 if (strncmp (text_name
, "_info", 5) == 0)
4064 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
4066 ignore_rest_of_line ();
4069 if (strcmp (text_name
, ".text") == 0)
4072 insn_group_break (1, 0, 0);
4074 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4076 generate_unwind_image (text_name
);
4078 if (unwind
.info
|| unwind
.force_unwind_entry
)
4080 subseg_set (md
.last_text_seg
, 0);
4081 unwind
.proc_end
= expr_build_dot ();
4083 make_unw_section_name (SPECIAL_SECTION_UNWIND
, text_name
, sec_name
);
4084 set_section ((char *) sec_name
);
4085 bfd_set_section_flags (stdoutput
, now_seg
,
4086 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
4088 /* Make sure that section has 4 byte alignment for ILP32 and
4089 8 byte alignment for LP64. */
4090 record_alignment (now_seg
, md
.pointer_size_shift
);
4092 /* Need space for 3 pointers for procedure start, procedure end,
4094 ptr
= frag_more (3 * md
.pointer_size
);
4095 where
= frag_now_fix () - (3 * md
.pointer_size
);
4096 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4098 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4099 e
.X_op
= O_pseudo_fixup
;
4100 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4102 e
.X_add_symbol
= unwind
.proc_start
;
4103 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4105 e
.X_op
= O_pseudo_fixup
;
4106 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4108 e
.X_add_symbol
= unwind
.proc_end
;
4109 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4110 bytes_per_address
, &e
);
4114 e
.X_op
= O_pseudo_fixup
;
4115 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4117 e
.X_add_symbol
= unwind
.info
;
4118 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4119 bytes_per_address
, &e
);
4122 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4126 subseg_set (saved_seg
, saved_subseg
);
4128 /* Parse names of main and alternate entry points and set symbol sizes. */
4132 name
= input_line_pointer
;
4133 c
= get_symbol_end ();
4134 p
= input_line_pointer
;
4135 sym
= symbol_find (name
);
4136 if (sym
&& unwind
.proc_start
4137 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4138 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4140 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4141 fragS
*frag
= symbol_get_frag (sym
);
4143 /* Check whether the function label is at or beyond last
4145 while (fr
&& fr
!= frag
)
4149 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4150 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4153 symbol_get_obj (sym
)->size
=
4154 (expressionS
*) xmalloc (sizeof (expressionS
));
4155 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4156 symbol_get_obj (sym
)->size
->X_add_symbol
4157 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4158 frag_now_fix (), frag_now
);
4159 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4160 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4166 if (*input_line_pointer
!= ',')
4168 ++input_line_pointer
;
4170 demand_empty_rest_of_line ();
4171 unwind
.proc_start
= unwind
.proc_end
= unwind
.info
= 0;
4175 dot_template (template)
4178 CURR_SLOT
.user_template
= template;
4183 int dummy ATTRIBUTE_UNUSED
;
4185 int ins
, locs
, outs
, rots
;
4187 if (is_it_end_of_statement ())
4188 ins
= locs
= outs
= rots
= 0;
4191 ins
= get_absolute_expression ();
4192 if (*input_line_pointer
++ != ',')
4194 locs
= get_absolute_expression ();
4195 if (*input_line_pointer
++ != ',')
4197 outs
= get_absolute_expression ();
4198 if (*input_line_pointer
++ != ',')
4200 rots
= get_absolute_expression ();
4202 set_regstack (ins
, locs
, outs
, rots
);
4206 as_bad ("Comma expected");
4207 ignore_rest_of_line ();
4214 unsigned num_regs
, num_alloced
= 0;
4215 struct dynreg
**drpp
, *dr
;
4216 int ch
, base_reg
= 0;
4222 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4223 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4224 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4228 /* First, remove existing names from hash table. */
4229 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4231 hash_delete (md
.dynreg_hash
, dr
->name
);
4235 drpp
= &md
.dynreg
[type
];
4238 start
= input_line_pointer
;
4239 ch
= get_symbol_end ();
4240 *input_line_pointer
= ch
;
4241 len
= (input_line_pointer
- start
);
4244 if (*input_line_pointer
!= '[')
4246 as_bad ("Expected '['");
4249 ++input_line_pointer
; /* skip '[' */
4251 num_regs
= get_absolute_expression ();
4253 if (*input_line_pointer
++ != ']')
4255 as_bad ("Expected ']'");
4260 num_alloced
+= num_regs
;
4264 if (num_alloced
> md
.rot
.num_regs
)
4266 as_bad ("Used more than the declared %d rotating registers",
4272 if (num_alloced
> 96)
4274 as_bad ("Used more than the available 96 rotating registers");
4279 if (num_alloced
> 48)
4281 as_bad ("Used more than the available 48 rotating registers");
4290 name
= obstack_alloc (¬es
, len
+ 1);
4291 memcpy (name
, start
, len
);
4296 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4297 memset (*drpp
, 0, sizeof (*dr
));
4302 dr
->num_regs
= num_regs
;
4303 dr
->base
= base_reg
;
4305 base_reg
+= num_regs
;
4307 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4309 as_bad ("Attempt to redefine register set `%s'", name
);
4313 if (*input_line_pointer
!= ',')
4315 ++input_line_pointer
; /* skip comma */
4318 demand_empty_rest_of_line ();
4322 ignore_rest_of_line ();
4326 dot_byteorder (byteorder
)
4329 segment_info_type
*seginfo
= seg_info (now_seg
);
4331 if (byteorder
== -1)
4333 if (seginfo
->tc_segment_info_data
.endian
== 0)
4334 seginfo
->tc_segment_info_data
.endian
4335 = TARGET_BYTES_BIG_ENDIAN
? 1 : 2;
4336 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4339 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4341 if (target_big_endian
!= byteorder
)
4343 target_big_endian
= byteorder
;
4344 if (target_big_endian
)
4346 ia64_number_to_chars
= number_to_chars_bigendian
;
4347 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4351 ia64_number_to_chars
= number_to_chars_littleendian
;
4352 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4359 int dummy ATTRIBUTE_UNUSED
;
4366 option
= input_line_pointer
;
4367 ch
= get_symbol_end ();
4368 if (strcmp (option
, "lsb") == 0)
4369 md
.flags
&= ~EF_IA_64_BE
;
4370 else if (strcmp (option
, "msb") == 0)
4371 md
.flags
|= EF_IA_64_BE
;
4372 else if (strcmp (option
, "abi32") == 0)
4373 md
.flags
&= ~EF_IA_64_ABI64
;
4374 else if (strcmp (option
, "abi64") == 0)
4375 md
.flags
|= EF_IA_64_ABI64
;
4377 as_bad ("Unknown psr option `%s'", option
);
4378 *input_line_pointer
= ch
;
4381 if (*input_line_pointer
!= ',')
4384 ++input_line_pointer
;
4387 demand_empty_rest_of_line ();
4392 int dummy ATTRIBUTE_UNUSED
;
4394 new_logical_line (0, get_absolute_expression ());
4395 demand_empty_rest_of_line ();
4399 parse_section_name ()
4405 if (*input_line_pointer
!= '"')
4407 as_bad ("Missing section name");
4408 ignore_rest_of_line ();
4411 name
= demand_copy_C_string (&len
);
4414 ignore_rest_of_line ();
4418 if (*input_line_pointer
!= ',')
4420 as_bad ("Comma expected after section name");
4421 ignore_rest_of_line ();
4424 ++input_line_pointer
; /* skip comma */
4432 char *name
= parse_section_name ();
4436 md
.keep_pending_output
= 1;
4439 obj_elf_previous (0);
4440 md
.keep_pending_output
= 0;
4443 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4446 stmt_float_cons (kind
)
4467 ia64_do_align (alignment
);
4475 int saved_auto_align
= md
.auto_align
;
4479 md
.auto_align
= saved_auto_align
;
4483 dot_xfloat_cons (kind
)
4486 char *name
= parse_section_name ();
4490 md
.keep_pending_output
= 1;
4492 stmt_float_cons (kind
);
4493 obj_elf_previous (0);
4494 md
.keep_pending_output
= 0;
4498 dot_xstringer (zero
)
4501 char *name
= parse_section_name ();
4505 md
.keep_pending_output
= 1;
4508 obj_elf_previous (0);
4509 md
.keep_pending_output
= 0;
4516 int saved_auto_align
= md
.auto_align
;
4517 char *name
= parse_section_name ();
4521 md
.keep_pending_output
= 1;
4525 md
.auto_align
= saved_auto_align
;
4526 obj_elf_previous (0);
4527 md
.keep_pending_output
= 0;
4531 dot_xfloat_cons_ua (kind
)
4534 int saved_auto_align
= md
.auto_align
;
4535 char *name
= parse_section_name ();
4539 md
.keep_pending_output
= 1;
4542 stmt_float_cons (kind
);
4543 md
.auto_align
= saved_auto_align
;
4544 obj_elf_previous (0);
4545 md
.keep_pending_output
= 0;
4548 /* .reg.val <regname>,value */
4552 int dummy ATTRIBUTE_UNUSED
;
4557 if (reg
.X_op
!= O_register
)
4559 as_bad (_("Register name expected"));
4560 ignore_rest_of_line ();
4562 else if (*input_line_pointer
++ != ',')
4564 as_bad (_("Comma expected"));
4565 ignore_rest_of_line ();
4569 valueT value
= get_absolute_expression ();
4570 int regno
= reg
.X_add_number
;
4571 if (regno
< REG_GR
|| regno
> REG_GR
+ 128)
4572 as_warn (_("Register value annotation ignored"));
4575 gr_values
[regno
- REG_GR
].known
= 1;
4576 gr_values
[regno
- REG_GR
].value
= value
;
4577 gr_values
[regno
- REG_GR
].path
= md
.path
;
4580 demand_empty_rest_of_line ();
4583 /* select dv checking mode
4588 A stop is inserted when changing modes
4595 if (md
.manual_bundling
)
4596 as_warn (_("Directive invalid within a bundle"));
4598 if (type
== 'E' || type
== 'A')
4599 md
.mode_explicitly_set
= 0;
4601 md
.mode_explicitly_set
= 1;
4608 if (md
.explicit_mode
)
4609 insn_group_break (1, 0, 0);
4610 md
.explicit_mode
= 0;
4614 if (!md
.explicit_mode
)
4615 insn_group_break (1, 0, 0);
4616 md
.explicit_mode
= 1;
4620 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4621 insn_group_break (1, 0, 0);
4622 md
.explicit_mode
= md
.default_explicit_mode
;
4623 md
.mode_explicitly_set
= 0;
4634 for (regno
= 0; regno
< 64; regno
++)
4636 if (mask
& ((valueT
) 1 << regno
))
4638 fprintf (stderr
, "%s p%d", comma
, regno
);
4645 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4646 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4647 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4648 .pred.safe_across_calls p1 [, p2 [,...]]
4657 int p1
= -1, p2
= -1;
4661 if (*input_line_pointer
!= '"')
4663 as_bad (_("Missing predicate relation type"));
4664 ignore_rest_of_line ();
4670 char *form
= demand_copy_C_string (&len
);
4671 if (strcmp (form
, "mutex") == 0)
4673 else if (strcmp (form
, "clear") == 0)
4675 else if (strcmp (form
, "imply") == 0)
4679 as_bad (_("Unrecognized predicate relation type"));
4680 ignore_rest_of_line ();
4684 if (*input_line_pointer
== ',')
4685 ++input_line_pointer
;
4695 if (TOUPPER (*input_line_pointer
) != 'P'
4696 || (regno
= atoi (++input_line_pointer
)) < 0
4699 as_bad (_("Predicate register expected"));
4700 ignore_rest_of_line ();
4703 while (ISDIGIT (*input_line_pointer
))
4704 ++input_line_pointer
;
4711 as_warn (_("Duplicate predicate register ignored"));
4714 /* See if it's a range. */
4715 if (*input_line_pointer
== '-')
4718 ++input_line_pointer
;
4720 if (TOUPPER (*input_line_pointer
) != 'P'
4721 || (regno
= atoi (++input_line_pointer
)) < 0
4724 as_bad (_("Predicate register expected"));
4725 ignore_rest_of_line ();
4728 while (ISDIGIT (*input_line_pointer
))
4729 ++input_line_pointer
;
4733 as_bad (_("Bad register range"));
4734 ignore_rest_of_line ();
4745 if (*input_line_pointer
!= ',')
4747 ++input_line_pointer
;
4756 clear_qp_mutex (mask
);
4757 clear_qp_implies (mask
, (valueT
) 0);
4760 if (count
!= 2 || p1
== -1 || p2
== -1)
4761 as_bad (_("Predicate source and target required"));
4762 else if (p1
== 0 || p2
== 0)
4763 as_bad (_("Use of p0 is not valid in this context"));
4765 add_qp_imply (p1
, p2
);
4770 as_bad (_("At least two PR arguments expected"));
4775 as_bad (_("Use of p0 is not valid in this context"));
4778 add_qp_mutex (mask
);
4781 /* note that we don't override any existing relations */
4784 as_bad (_("At least one PR argument expected"));
4789 fprintf (stderr
, "Safe across calls: ");
4790 print_prmask (mask
);
4791 fprintf (stderr
, "\n");
4793 qp_safe_across_calls
= mask
;
4796 demand_empty_rest_of_line ();
4799 /* .entry label [, label [, ...]]
4800 Hint to DV code that the given labels are to be considered entry points.
4801 Otherwise, only global labels are considered entry points. */
4805 int dummy ATTRIBUTE_UNUSED
;
4814 name
= input_line_pointer
;
4815 c
= get_symbol_end ();
4816 symbolP
= symbol_find_or_make (name
);
4818 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
4820 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4823 *input_line_pointer
= c
;
4825 c
= *input_line_pointer
;
4828 input_line_pointer
++;
4830 if (*input_line_pointer
== '\n')
4836 demand_empty_rest_of_line ();
4839 /* .mem.offset offset, base
4840 "base" is used to distinguish between offsets from a different base. */
4843 dot_mem_offset (dummy
)
4844 int dummy ATTRIBUTE_UNUSED
;
4846 md
.mem_offset
.hint
= 1;
4847 md
.mem_offset
.offset
= get_absolute_expression ();
4848 if (*input_line_pointer
!= ',')
4850 as_bad (_("Comma expected"));
4851 ignore_rest_of_line ();
4854 ++input_line_pointer
;
4855 md
.mem_offset
.base
= get_absolute_expression ();
4856 demand_empty_rest_of_line ();
4859 /* ia64-specific pseudo-ops: */
4860 const pseudo_typeS md_pseudo_table
[] =
4862 { "radix", dot_radix
, 0 },
4863 { "lcomm", s_lcomm_bytes
, 1 },
4864 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
4865 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
4866 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
4867 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
4868 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
4869 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
4870 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
4871 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
4872 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
4873 { "proc", dot_proc
, 0 },
4874 { "body", dot_body
, 0 },
4875 { "prologue", dot_prologue
, 0 },
4876 { "endp", dot_endp
, 0 },
4877 { "file", (void (*) PARAMS ((int))) dwarf2_directive_file
, 0 },
4878 { "loc", dwarf2_directive_loc
, 0 },
4880 { "fframe", dot_fframe
, 0 },
4881 { "vframe", dot_vframe
, 0 },
4882 { "vframesp", dot_vframesp
, 0 },
4883 { "vframepsp", dot_vframepsp
, 0 },
4884 { "save", dot_save
, 0 },
4885 { "restore", dot_restore
, 0 },
4886 { "restorereg", dot_restorereg
, 0 },
4887 { "restorereg.p", dot_restorereg_p
, 0 },
4888 { "handlerdata", dot_handlerdata
, 0 },
4889 { "unwentry", dot_unwentry
, 0 },
4890 { "altrp", dot_altrp
, 0 },
4891 { "savesp", dot_savemem
, 0 },
4892 { "savepsp", dot_savemem
, 1 },
4893 { "save.g", dot_saveg
, 0 },
4894 { "save.f", dot_savef
, 0 },
4895 { "save.b", dot_saveb
, 0 },
4896 { "save.gf", dot_savegf
, 0 },
4897 { "spill", dot_spill
, 0 },
4898 { "spillreg", dot_spillreg
, 0 },
4899 { "spillsp", dot_spillmem
, 0 },
4900 { "spillpsp", dot_spillmem
, 1 },
4901 { "spillreg.p", dot_spillreg_p
, 0 },
4902 { "spillsp.p", dot_spillmem_p
, 0 },
4903 { "spillpsp.p", dot_spillmem_p
, 1 },
4904 { "label_state", dot_label_state
, 0 },
4905 { "copy_state", dot_copy_state
, 0 },
4906 { "unwabi", dot_unwabi
, 0 },
4907 { "personality", dot_personality
, 0 },
4909 { "estate", dot_estate
, 0 },
4911 { "mii", dot_template
, 0x0 },
4912 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
4913 { "mlx", dot_template
, 0x2 },
4914 { "mmi", dot_template
, 0x4 },
4915 { "mfi", dot_template
, 0x6 },
4916 { "mmf", dot_template
, 0x7 },
4917 { "mib", dot_template
, 0x8 },
4918 { "mbb", dot_template
, 0x9 },
4919 { "bbb", dot_template
, 0xb },
4920 { "mmb", dot_template
, 0xc },
4921 { "mfb", dot_template
, 0xe },
4923 { "lb", dot_scope
, 0 },
4924 { "le", dot_scope
, 1 },
4926 { "align", s_align_bytes
, 0 },
4927 { "regstk", dot_regstk
, 0 },
4928 { "rotr", dot_rot
, DYNREG_GR
},
4929 { "rotf", dot_rot
, DYNREG_FR
},
4930 { "rotp", dot_rot
, DYNREG_PR
},
4931 { "lsb", dot_byteorder
, 0 },
4932 { "msb", dot_byteorder
, 1 },
4933 { "psr", dot_psr
, 0 },
4934 { "alias", dot_alias
, 0 },
4935 { "secalias", dot_alias
, 1 },
4936 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
4938 { "xdata1", dot_xdata
, 1 },
4939 { "xdata2", dot_xdata
, 2 },
4940 { "xdata4", dot_xdata
, 4 },
4941 { "xdata8", dot_xdata
, 8 },
4942 { "xreal4", dot_xfloat_cons
, 'f' },
4943 { "xreal8", dot_xfloat_cons
, 'd' },
4944 { "xreal10", dot_xfloat_cons
, 'x' },
4945 { "xreal16", dot_xfloat_cons
, 'X' },
4946 { "xstring", dot_xstringer
, 0 },
4947 { "xstringz", dot_xstringer
, 1 },
4949 /* unaligned versions: */
4950 { "xdata2.ua", dot_xdata_ua
, 2 },
4951 { "xdata4.ua", dot_xdata_ua
, 4 },
4952 { "xdata8.ua", dot_xdata_ua
, 8 },
4953 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
4954 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
4955 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
4956 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
4958 /* annotations/DV checking support */
4959 { "entry", dot_entry
, 0 },
4960 { "mem.offset", dot_mem_offset
, 0 },
4961 { "pred.rel", dot_pred_rel
, 0 },
4962 { "pred.rel.clear", dot_pred_rel
, 'c' },
4963 { "pred.rel.imply", dot_pred_rel
, 'i' },
4964 { "pred.rel.mutex", dot_pred_rel
, 'm' },
4965 { "pred.safe_across_calls", dot_pred_rel
, 's' },
4966 { "reg.val", dot_reg_val
, 0 },
4967 { "auto", dot_dv_mode
, 'a' },
4968 { "explicit", dot_dv_mode
, 'e' },
4969 { "default", dot_dv_mode
, 'd' },
4971 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
4972 IA-64 aligns data allocation pseudo-ops by default, so we have to
4973 tell it that these ones are supposed to be unaligned. Long term,
4974 should rewrite so that only IA-64 specific data allocation pseudo-ops
4975 are aligned by default. */
4976 {"2byte", stmt_cons_ua
, 2},
4977 {"4byte", stmt_cons_ua
, 4},
4978 {"8byte", stmt_cons_ua
, 8},
4983 static const struct pseudo_opcode
4986 void (*handler
) (int);
4991 /* these are more like pseudo-ops, but don't start with a dot */
4992 { "data1", cons
, 1 },
4993 { "data2", cons
, 2 },
4994 { "data4", cons
, 4 },
4995 { "data8", cons
, 8 },
4996 { "data16", cons
, 16 },
4997 { "real4", stmt_float_cons
, 'f' },
4998 { "real8", stmt_float_cons
, 'd' },
4999 { "real10", stmt_float_cons
, 'x' },
5000 { "real16", stmt_float_cons
, 'X' },
5001 { "string", stringer
, 0 },
5002 { "stringz", stringer
, 1 },
5004 /* unaligned versions: */
5005 { "data2.ua", stmt_cons_ua
, 2 },
5006 { "data4.ua", stmt_cons_ua
, 4 },
5007 { "data8.ua", stmt_cons_ua
, 8 },
5008 { "data16.ua", stmt_cons_ua
, 16 },
5009 { "real4.ua", float_cons
, 'f' },
5010 { "real8.ua", float_cons
, 'd' },
5011 { "real10.ua", float_cons
, 'x' },
5012 { "real16.ua", float_cons
, 'X' },
5015 /* Declare a register by creating a symbol for it and entering it in
5016 the symbol table. */
5019 declare_register (name
, regnum
)
5026 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5028 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5030 as_fatal ("Inserting \"%s\" into register table failed: %s",
5037 declare_register_set (prefix
, num_regs
, base_regnum
)
5045 for (i
= 0; i
< num_regs
; ++i
)
5047 sprintf (name
, "%s%u", prefix
, i
);
5048 declare_register (name
, base_regnum
+ i
);
5053 operand_width (opnd
)
5054 enum ia64_opnd opnd
;
5056 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5057 unsigned int bits
= 0;
5061 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5062 bits
+= odesc
->field
[i
].bits
;
5067 static enum operand_match_result
5068 operand_match (idesc
, index
, e
)
5069 const struct ia64_opcode
*idesc
;
5073 enum ia64_opnd opnd
= idesc
->operands
[index
];
5074 int bits
, relocatable
= 0;
5075 struct insn_fix
*fix
;
5082 case IA64_OPND_AR_CCV
:
5083 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5084 return OPERAND_MATCH
;
5087 case IA64_OPND_AR_CSD
:
5088 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5089 return OPERAND_MATCH
;
5092 case IA64_OPND_AR_PFS
:
5093 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5094 return OPERAND_MATCH
;
5098 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5099 return OPERAND_MATCH
;
5103 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5104 return OPERAND_MATCH
;
5108 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5109 return OPERAND_MATCH
;
5112 case IA64_OPND_PR_ROT
:
5113 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5114 return OPERAND_MATCH
;
5118 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5119 return OPERAND_MATCH
;
5122 case IA64_OPND_PSR_L
:
5123 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5124 return OPERAND_MATCH
;
5127 case IA64_OPND_PSR_UM
:
5128 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5129 return OPERAND_MATCH
;
5133 if (e
->X_op
== O_constant
)
5135 if (e
->X_add_number
== 1)
5136 return OPERAND_MATCH
;
5138 return OPERAND_OUT_OF_RANGE
;
5143 if (e
->X_op
== O_constant
)
5145 if (e
->X_add_number
== 8)
5146 return OPERAND_MATCH
;
5148 return OPERAND_OUT_OF_RANGE
;
5153 if (e
->X_op
== O_constant
)
5155 if (e
->X_add_number
== 16)
5156 return OPERAND_MATCH
;
5158 return OPERAND_OUT_OF_RANGE
;
5162 /* register operands: */
5165 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5166 && e
->X_add_number
< REG_AR
+ 128)
5167 return OPERAND_MATCH
;
5172 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5173 && e
->X_add_number
< REG_BR
+ 8)
5174 return OPERAND_MATCH
;
5178 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5179 && e
->X_add_number
< REG_CR
+ 128)
5180 return OPERAND_MATCH
;
5187 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5188 && e
->X_add_number
< REG_FR
+ 128)
5189 return OPERAND_MATCH
;
5194 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5195 && e
->X_add_number
< REG_P
+ 64)
5196 return OPERAND_MATCH
;
5202 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5203 && e
->X_add_number
< REG_GR
+ 128)
5204 return OPERAND_MATCH
;
5207 case IA64_OPND_R3_2
:
5208 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5210 if (e
->X_add_number
< REG_GR
+ 4)
5211 return OPERAND_MATCH
;
5212 else if (e
->X_add_number
< REG_GR
+ 128)
5213 return OPERAND_OUT_OF_RANGE
;
5217 /* indirect operands: */
5218 case IA64_OPND_CPUID_R3
:
5219 case IA64_OPND_DBR_R3
:
5220 case IA64_OPND_DTR_R3
:
5221 case IA64_OPND_ITR_R3
:
5222 case IA64_OPND_IBR_R3
:
5223 case IA64_OPND_MSR_R3
:
5224 case IA64_OPND_PKR_R3
:
5225 case IA64_OPND_PMC_R3
:
5226 case IA64_OPND_PMD_R3
:
5227 case IA64_OPND_RR_R3
:
5228 if (e
->X_op
== O_index
&& e
->X_op_symbol
5229 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5230 == opnd
- IA64_OPND_CPUID_R3
))
5231 return OPERAND_MATCH
;
5235 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5236 return OPERAND_MATCH
;
5239 /* immediate operands: */
5240 case IA64_OPND_CNT2a
:
5241 case IA64_OPND_LEN4
:
5242 case IA64_OPND_LEN6
:
5243 bits
= operand_width (idesc
->operands
[index
]);
5244 if (e
->X_op
== O_constant
)
5246 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5247 return OPERAND_MATCH
;
5249 return OPERAND_OUT_OF_RANGE
;
5253 case IA64_OPND_CNT2b
:
5254 if (e
->X_op
== O_constant
)
5256 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5257 return OPERAND_MATCH
;
5259 return OPERAND_OUT_OF_RANGE
;
5263 case IA64_OPND_CNT2c
:
5264 val
= e
->X_add_number
;
5265 if (e
->X_op
== O_constant
)
5267 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5268 return OPERAND_MATCH
;
5270 return OPERAND_OUT_OF_RANGE
;
5275 /* SOR must be an integer multiple of 8 */
5276 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5277 return OPERAND_OUT_OF_RANGE
;
5280 if (e
->X_op
== O_constant
)
5282 if ((bfd_vma
) e
->X_add_number
<= 96)
5283 return OPERAND_MATCH
;
5285 return OPERAND_OUT_OF_RANGE
;
5289 case IA64_OPND_IMMU62
:
5290 if (e
->X_op
== O_constant
)
5292 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5293 return OPERAND_MATCH
;
5295 return OPERAND_OUT_OF_RANGE
;
5299 /* FIXME -- need 62-bit relocation type */
5300 as_bad (_("62-bit relocation not yet implemented"));
5304 case IA64_OPND_IMMU64
:
5305 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5306 || e
->X_op
== O_subtract
)
5308 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5309 fix
->code
= BFD_RELOC_IA64_IMM64
;
5310 if (e
->X_op
!= O_subtract
)
5312 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5313 if (e
->X_op
== O_pseudo_fixup
)
5317 fix
->opnd
= idesc
->operands
[index
];
5320 ++CURR_SLOT
.num_fixups
;
5321 return OPERAND_MATCH
;
5323 else if (e
->X_op
== O_constant
)
5324 return OPERAND_MATCH
;
5327 case IA64_OPND_CCNT5
:
5328 case IA64_OPND_CNT5
:
5329 case IA64_OPND_CNT6
:
5330 case IA64_OPND_CPOS6a
:
5331 case IA64_OPND_CPOS6b
:
5332 case IA64_OPND_CPOS6c
:
5333 case IA64_OPND_IMMU2
:
5334 case IA64_OPND_IMMU7a
:
5335 case IA64_OPND_IMMU7b
:
5336 case IA64_OPND_IMMU21
:
5337 case IA64_OPND_IMMU24
:
5338 case IA64_OPND_MBTYPE4
:
5339 case IA64_OPND_MHTYPE8
:
5340 case IA64_OPND_POS6
:
5341 bits
= operand_width (idesc
->operands
[index
]);
5342 if (e
->X_op
== O_constant
)
5344 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5345 return OPERAND_MATCH
;
5347 return OPERAND_OUT_OF_RANGE
;
5351 case IA64_OPND_IMMU9
:
5352 bits
= operand_width (idesc
->operands
[index
]);
5353 if (e
->X_op
== O_constant
)
5355 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5357 int lobits
= e
->X_add_number
& 0x3;
5358 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5359 e
->X_add_number
|= (bfd_vma
) 0x3;
5360 return OPERAND_MATCH
;
5363 return OPERAND_OUT_OF_RANGE
;
5367 case IA64_OPND_IMM44
:
5368 /* least 16 bits must be zero */
5369 if ((e
->X_add_number
& 0xffff) != 0)
5370 /* XXX technically, this is wrong: we should not be issuing warning
5371 messages until we're sure this instruction pattern is going to
5373 as_warn (_("lower 16 bits of mask ignored"));
5375 if (e
->X_op
== O_constant
)
5377 if (((e
->X_add_number
>= 0
5378 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5379 || (e
->X_add_number
< 0
5380 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5383 if (e
->X_add_number
>= 0
5384 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5386 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5388 return OPERAND_MATCH
;
5391 return OPERAND_OUT_OF_RANGE
;
5395 case IA64_OPND_IMM17
:
5396 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5397 if (e
->X_op
== O_constant
)
5399 if (((e
->X_add_number
>= 0
5400 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5401 || (e
->X_add_number
< 0
5402 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5405 if (e
->X_add_number
>= 0
5406 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5408 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5410 return OPERAND_MATCH
;
5413 return OPERAND_OUT_OF_RANGE
;
5417 case IA64_OPND_IMM14
:
5418 case IA64_OPND_IMM22
:
5420 case IA64_OPND_IMM1
:
5421 case IA64_OPND_IMM8
:
5422 case IA64_OPND_IMM8U4
:
5423 case IA64_OPND_IMM8M1
:
5424 case IA64_OPND_IMM8M1U4
:
5425 case IA64_OPND_IMM8M1U8
:
5426 case IA64_OPND_IMM9a
:
5427 case IA64_OPND_IMM9b
:
5428 bits
= operand_width (idesc
->operands
[index
]);
5429 if (relocatable
&& (e
->X_op
== O_symbol
5430 || e
->X_op
== O_subtract
5431 || e
->X_op
== O_pseudo_fixup
))
5433 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5435 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5436 fix
->code
= BFD_RELOC_IA64_IMM14
;
5438 fix
->code
= BFD_RELOC_IA64_IMM22
;
5440 if (e
->X_op
!= O_subtract
)
5442 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5443 if (e
->X_op
== O_pseudo_fixup
)
5447 fix
->opnd
= idesc
->operands
[index
];
5450 ++CURR_SLOT
.num_fixups
;
5451 return OPERAND_MATCH
;
5453 else if (e
->X_op
!= O_constant
5454 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5455 return OPERAND_MISMATCH
;
5457 if (opnd
== IA64_OPND_IMM8M1U4
)
5459 /* Zero is not valid for unsigned compares that take an adjusted
5460 constant immediate range. */
5461 if (e
->X_add_number
== 0)
5462 return OPERAND_OUT_OF_RANGE
;
5464 /* Sign-extend 32-bit unsigned numbers, so that the following range
5465 checks will work. */
5466 val
= e
->X_add_number
;
5467 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5468 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5469 val
= ((val
<< 32) >> 32);
5471 /* Check for 0x100000000. This is valid because
5472 0x100000000-1 is the same as ((uint32_t) -1). */
5473 if (val
== ((bfd_signed_vma
) 1 << 32))
5474 return OPERAND_MATCH
;
5478 else if (opnd
== IA64_OPND_IMM8M1U8
)
5480 /* Zero is not valid for unsigned compares that take an adjusted
5481 constant immediate range. */
5482 if (e
->X_add_number
== 0)
5483 return OPERAND_OUT_OF_RANGE
;
5485 /* Check for 0x10000000000000000. */
5486 if (e
->X_op
== O_big
)
5488 if (generic_bignum
[0] == 0
5489 && generic_bignum
[1] == 0
5490 && generic_bignum
[2] == 0
5491 && generic_bignum
[3] == 0
5492 && generic_bignum
[4] == 1)
5493 return OPERAND_MATCH
;
5495 return OPERAND_OUT_OF_RANGE
;
5498 val
= e
->X_add_number
- 1;
5500 else if (opnd
== IA64_OPND_IMM8M1
)
5501 val
= e
->X_add_number
- 1;
5502 else if (opnd
== IA64_OPND_IMM8U4
)
5504 /* Sign-extend 32-bit unsigned numbers, so that the following range
5505 checks will work. */
5506 val
= e
->X_add_number
;
5507 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5508 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5509 val
= ((val
<< 32) >> 32);
5512 val
= e
->X_add_number
;
5514 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5515 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5516 return OPERAND_MATCH
;
5518 return OPERAND_OUT_OF_RANGE
;
5520 case IA64_OPND_INC3
:
5521 /* +/- 1, 4, 8, 16 */
5522 val
= e
->X_add_number
;
5525 if (e
->X_op
== O_constant
)
5527 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5528 return OPERAND_MATCH
;
5530 return OPERAND_OUT_OF_RANGE
;
5534 case IA64_OPND_TGT25
:
5535 case IA64_OPND_TGT25b
:
5536 case IA64_OPND_TGT25c
:
5537 case IA64_OPND_TGT64
:
5538 if (e
->X_op
== O_symbol
)
5540 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5541 if (opnd
== IA64_OPND_TGT25
)
5542 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5543 else if (opnd
== IA64_OPND_TGT25b
)
5544 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5545 else if (opnd
== IA64_OPND_TGT25c
)
5546 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5547 else if (opnd
== IA64_OPND_TGT64
)
5548 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5552 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5553 fix
->opnd
= idesc
->operands
[index
];
5556 ++CURR_SLOT
.num_fixups
;
5557 return OPERAND_MATCH
;
5559 case IA64_OPND_TAG13
:
5560 case IA64_OPND_TAG13b
:
5564 return OPERAND_MATCH
;
5567 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5568 /* There are no external relocs for TAG13/TAG13b fields, so we
5569 create a dummy reloc. This will not live past md_apply_fix3. */
5570 fix
->code
= BFD_RELOC_UNUSED
;
5571 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5572 fix
->opnd
= idesc
->operands
[index
];
5575 ++CURR_SLOT
.num_fixups
;
5576 return OPERAND_MATCH
;
5583 case IA64_OPND_LDXMOV
:
5584 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5585 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5586 fix
->opnd
= idesc
->operands
[index
];
5589 ++CURR_SLOT
.num_fixups
;
5590 return OPERAND_MATCH
;
5595 return OPERAND_MISMATCH
;
5604 memset (e
, 0, sizeof (*e
));
5607 if (*input_line_pointer
!= '}')
5609 sep
= *input_line_pointer
++;
5613 if (!md
.manual_bundling
)
5614 as_warn ("Found '}' when manual bundling is off");
5616 CURR_SLOT
.manual_bundling_off
= 1;
5617 md
.manual_bundling
= 0;
5623 /* Returns the next entry in the opcode table that matches the one in
5624 IDESC, and frees the entry in IDESC. If no matching entry is
5625 found, NULL is returned instead. */
5627 static struct ia64_opcode
*
5628 get_next_opcode (struct ia64_opcode
*idesc
)
5630 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
5631 ia64_free_opcode (idesc
);
5635 /* Parse the operands for the opcode and find the opcode variant that
5636 matches the specified operands, or NULL if no match is possible. */
5638 static struct ia64_opcode
*
5639 parse_operands (idesc
)
5640 struct ia64_opcode
*idesc
;
5642 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
5643 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
5644 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
5645 enum operand_match_result result
;
5647 char *first_arg
= 0, *end
, *saved_input_pointer
;
5650 assert (strlen (idesc
->name
) <= 128);
5652 strcpy (mnemonic
, idesc
->name
);
5653 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5655 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5656 can't parse the first operand until we have parsed the
5657 remaining operands of the "alloc" instruction. */
5659 first_arg
= input_line_pointer
;
5660 end
= strchr (input_line_pointer
, '=');
5663 as_bad ("Expected separator `='");
5666 input_line_pointer
= end
+ 1;
5671 for (; i
< NELEMS (CURR_SLOT
.opnd
); ++i
)
5673 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
5674 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
5679 if (sep
!= '=' && sep
!= ',')
5684 if (num_outputs
> 0)
5685 as_bad ("Duplicate equal sign (=) in instruction");
5687 num_outputs
= i
+ 1;
5692 as_bad ("Illegal operand separator `%c'", sep
);
5696 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5698 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5699 know (strcmp (idesc
->name
, "alloc") == 0);
5700 if (num_operands
== 5 /* first_arg not included in this count! */
5701 && CURR_SLOT
.opnd
[2].X_op
== O_constant
5702 && CURR_SLOT
.opnd
[3].X_op
== O_constant
5703 && CURR_SLOT
.opnd
[4].X_op
== O_constant
5704 && CURR_SLOT
.opnd
[5].X_op
== O_constant
)
5706 sof
= set_regstack (CURR_SLOT
.opnd
[2].X_add_number
,
5707 CURR_SLOT
.opnd
[3].X_add_number
,
5708 CURR_SLOT
.opnd
[4].X_add_number
,
5709 CURR_SLOT
.opnd
[5].X_add_number
);
5711 /* now we can parse the first arg: */
5712 saved_input_pointer
= input_line_pointer
;
5713 input_line_pointer
= first_arg
;
5714 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
5716 --num_outputs
; /* force error */
5717 input_line_pointer
= saved_input_pointer
;
5719 CURR_SLOT
.opnd
[2].X_add_number
= sof
;
5720 CURR_SLOT
.opnd
[3].X_add_number
5721 = sof
- CURR_SLOT
.opnd
[4].X_add_number
;
5722 CURR_SLOT
.opnd
[4] = CURR_SLOT
.opnd
[5];
5726 highest_unmatched_operand
= 0;
5727 curr_out_of_range_pos
= -1;
5729 expected_operand
= idesc
->operands
[0];
5730 for (; idesc
; idesc
= get_next_opcode (idesc
))
5732 if (num_outputs
!= idesc
->num_outputs
)
5733 continue; /* mismatch in # of outputs */
5735 CURR_SLOT
.num_fixups
= 0;
5737 /* Try to match all operands. If we see an out-of-range operand,
5738 then continue trying to match the rest of the operands, since if
5739 the rest match, then this idesc will give the best error message. */
5741 out_of_range_pos
= -1;
5742 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
5744 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
5745 if (result
!= OPERAND_MATCH
)
5747 if (result
!= OPERAND_OUT_OF_RANGE
)
5749 if (out_of_range_pos
< 0)
5750 /* remember position of the first out-of-range operand: */
5751 out_of_range_pos
= i
;
5755 /* If we did not match all operands, or if at least one operand was
5756 out-of-range, then this idesc does not match. Keep track of which
5757 idesc matched the most operands before failing. If we have two
5758 idescs that failed at the same position, and one had an out-of-range
5759 operand, then prefer the out-of-range operand. Thus if we have
5760 "add r0=0x1000000,r1" we get an error saying the constant is out
5761 of range instead of an error saying that the constant should have been
5764 if (i
!= num_operands
|| out_of_range_pos
>= 0)
5766 if (i
> highest_unmatched_operand
5767 || (i
== highest_unmatched_operand
5768 && out_of_range_pos
> curr_out_of_range_pos
))
5770 highest_unmatched_operand
= i
;
5771 if (out_of_range_pos
>= 0)
5773 expected_operand
= idesc
->operands
[out_of_range_pos
];
5774 error_pos
= out_of_range_pos
;
5778 expected_operand
= idesc
->operands
[i
];
5781 curr_out_of_range_pos
= out_of_range_pos
;
5786 if (num_operands
< NELEMS (idesc
->operands
)
5787 && idesc
->operands
[num_operands
])
5788 continue; /* mismatch in number of arguments */
5794 if (expected_operand
)
5795 as_bad ("Operand %u of `%s' should be %s",
5796 error_pos
+ 1, mnemonic
,
5797 elf64_ia64_operands
[expected_operand
].desc
);
5799 as_bad ("Operand mismatch");
5805 /* Keep track of state necessary to determine whether a NOP is necessary
5806 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5807 detect a case where additional NOPs may be necessary. */
5809 errata_nop_necessary_p (slot
, insn_unit
)
5811 enum ia64_unit insn_unit
;
5814 struct group
*this_group
= md
.last_groups
+ md
.group_idx
;
5815 struct group
*prev_group
= md
.last_groups
+ (md
.group_idx
+ 2) % 3;
5816 struct ia64_opcode
*idesc
= slot
->idesc
;
5818 /* Test whether this could be the first insn in a problematic sequence. */
5819 if (insn_unit
== IA64_UNIT_F
)
5821 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5822 if (idesc
->operands
[i
] == IA64_OPND_P1
5823 || idesc
->operands
[i
] == IA64_OPND_P2
)
5825 int regno
= slot
->opnd
[i
].X_add_number
- REG_P
;
5826 /* Ignore invalid operands; they generate errors elsewhere. */
5829 this_group
->p_reg_set
[regno
] = 1;
5833 /* Test whether this could be the second insn in a problematic sequence. */
5834 if (insn_unit
== IA64_UNIT_M
&& slot
->qp_regno
> 0
5835 && prev_group
->p_reg_set
[slot
->qp_regno
])
5837 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5838 if (idesc
->operands
[i
] == IA64_OPND_R1
5839 || idesc
->operands
[i
] == IA64_OPND_R2
5840 || idesc
->operands
[i
] == IA64_OPND_R3
)
5842 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5843 /* Ignore invalid operands; they generate errors elsewhere. */
5846 if (strncmp (idesc
->name
, "add", 3) != 0
5847 && strncmp (idesc
->name
, "sub", 3) != 0
5848 && strncmp (idesc
->name
, "shladd", 6) != 0
5849 && (idesc
->flags
& IA64_OPCODE_POSTINC
) == 0)
5850 this_group
->g_reg_set_conditionally
[regno
] = 1;
5854 /* Test whether this could be the third insn in a problematic sequence. */
5855 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; i
++)
5857 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5858 idesc
->operands
[i
] == IA64_OPND_R3
5859 /* For mov indirect. */
5860 || idesc
->operands
[i
] == IA64_OPND_RR_R3
5861 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
5862 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
5863 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
5864 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
5865 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
5866 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
5867 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
5869 || idesc
->operands
[i
] == IA64_OPND_ITR_R3
5870 || idesc
->operands
[i
] == IA64_OPND_DTR_R3
5871 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5872 || idesc
->operands
[i
] == IA64_OPND_MR3
)
5874 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5875 /* Ignore invalid operands; they generate errors elsewhere. */
5878 if (idesc
->operands
[i
] == IA64_OPND_R3
)
5880 if (strcmp (idesc
->name
, "fc") != 0
5881 && strcmp (idesc
->name
, "tak") != 0
5882 && strcmp (idesc
->name
, "thash") != 0
5883 && strcmp (idesc
->name
, "tpa") != 0
5884 && strcmp (idesc
->name
, "ttag") != 0
5885 && strncmp (idesc
->name
, "ptr", 3) != 0
5886 && strncmp (idesc
->name
, "ptc", 3) != 0
5887 && strncmp (idesc
->name
, "probe", 5) != 0)
5890 if (prev_group
->g_reg_set_conditionally
[regno
])
5898 build_insn (slot
, insnp
)
5902 const struct ia64_operand
*odesc
, *o2desc
;
5903 struct ia64_opcode
*idesc
= slot
->idesc
;
5904 bfd_signed_vma insn
, val
;
5908 insn
= idesc
->opcode
| slot
->qp_regno
;
5910 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
5912 if (slot
->opnd
[i
].X_op
== O_register
5913 || slot
->opnd
[i
].X_op
== O_constant
5914 || slot
->opnd
[i
].X_op
== O_index
)
5915 val
= slot
->opnd
[i
].X_add_number
;
5916 else if (slot
->opnd
[i
].X_op
== O_big
)
5918 /* This must be the value 0x10000000000000000. */
5919 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
5925 switch (idesc
->operands
[i
])
5927 case IA64_OPND_IMMU64
:
5928 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
5929 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
5930 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
5931 | (((val
>> 63) & 0x1) << 36));
5934 case IA64_OPND_IMMU62
:
5935 val
&= 0x3fffffffffffffffULL
;
5936 if (val
!= slot
->opnd
[i
].X_add_number
)
5937 as_warn (_("Value truncated to 62 bits"));
5938 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
5939 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
5942 case IA64_OPND_TGT64
:
5944 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
5945 insn
|= ((((val
>> 59) & 0x1) << 36)
5946 | (((val
>> 0) & 0xfffff) << 13));
5977 case IA64_OPND_R3_2
:
5978 case IA64_OPND_CPUID_R3
:
5979 case IA64_OPND_DBR_R3
:
5980 case IA64_OPND_DTR_R3
:
5981 case IA64_OPND_ITR_R3
:
5982 case IA64_OPND_IBR_R3
:
5984 case IA64_OPND_MSR_R3
:
5985 case IA64_OPND_PKR_R3
:
5986 case IA64_OPND_PMC_R3
:
5987 case IA64_OPND_PMD_R3
:
5988 case IA64_OPND_RR_R3
:
5996 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
5997 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
5999 as_bad_where (slot
->src_file
, slot
->src_line
,
6000 "Bad operand value: %s", err
);
6001 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6003 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6004 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6006 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6007 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6009 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6010 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6011 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6013 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6014 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6024 unsigned int manual_bundling_on
= 0, manual_bundling_off
= 0;
6025 unsigned int manual_bundling
= 0;
6026 enum ia64_unit required_unit
, insn_unit
= 0;
6027 enum ia64_insn_type type
[3], insn_type
;
6028 unsigned int template, orig_template
;
6029 bfd_vma insn
[3] = { -1, -1, -1 };
6030 struct ia64_opcode
*idesc
;
6031 int end_of_insn_group
= 0, user_template
= -1;
6032 int n
, i
, j
, first
, curr
;
6034 bfd_vma t0
= 0, t1
= 0;
6035 struct label_fix
*lfix
;
6036 struct insn_fix
*ifix
;
6041 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6042 know (first
>= 0 & first
< NUM_SLOTS
);
6043 n
= MIN (3, md
.num_slots_in_use
);
6045 /* Determine template: user user_template if specified, best match
6048 if (md
.slot
[first
].user_template
>= 0)
6049 user_template
= template = md
.slot
[first
].user_template
;
6052 /* Auto select appropriate template. */
6053 memset (type
, 0, sizeof (type
));
6055 for (i
= 0; i
< n
; ++i
)
6057 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6059 type
[i
] = md
.slot
[curr
].idesc
->type
;
6060 curr
= (curr
+ 1) % NUM_SLOTS
;
6062 template = best_template
[type
[0]][type
[1]][type
[2]];
6065 /* initialize instructions with appropriate nops: */
6066 for (i
= 0; i
< 3; ++i
)
6067 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6071 /* now fill in slots with as many insns as possible: */
6073 idesc
= md
.slot
[curr
].idesc
;
6074 end_of_insn_group
= 0;
6075 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6077 /* Set the slot number for prologue/body records now as those
6078 refer to the current point, not the point after the
6079 instruction has been issued: */
6080 /* Don't try to delete prologue/body records here, as that will cause
6081 them to also be deleted from the master list of unwind records. */
6082 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
; ptr
= ptr
->next
)
6083 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6084 || ptr
->r
.type
== body
)
6086 ptr
->slot_number
= (unsigned long) f
+ i
;
6087 ptr
->slot_frag
= frag_now
;
6090 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6092 if (manual_bundling
&& i
!= 2)
6093 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6094 "`%s' must be last in bundle", idesc
->name
);
6098 if (idesc
->flags
& IA64_OPCODE_LAST
)
6101 unsigned int required_template
;
6103 /* If we need a stop bit after an M slot, our only choice is
6104 template 5 (M;;MI). If we need a stop bit after a B
6105 slot, our only choice is to place it at the end of the
6106 bundle, because the only available templates are MIB,
6107 MBB, BBB, MMB, and MFB. We don't handle anything other
6108 than M and B slots because these are the only kind of
6109 instructions that can have the IA64_OPCODE_LAST bit set. */
6110 required_template
= template;
6111 switch (idesc
->type
)
6115 required_template
= 5;
6123 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6124 "Internal error: don't know how to force %s to end"
6125 "of instruction group", idesc
->name
);
6129 if (manual_bundling
&& i
!= required_slot
)
6130 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6131 "`%s' must be last in instruction group",
6133 if (required_slot
< i
)
6134 /* Can't fit this instruction. */
6138 if (required_template
!= template)
6140 /* If we switch the template, we need to reset the NOPs
6141 after slot i. The slot-types of the instructions ahead
6142 of i never change, so we don't need to worry about
6143 changing NOPs in front of this slot. */
6144 for (j
= i
; j
< 3; ++j
)
6145 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6147 template = required_template
;
6149 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6151 if (manual_bundling_on
)
6152 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6153 "Label must be first in a bundle");
6154 /* This insn must go into the first slot of a bundle. */
6158 manual_bundling_on
= md
.slot
[curr
].manual_bundling_on
;
6159 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6161 if (manual_bundling_on
)
6164 manual_bundling
= 1;
6166 break; /* need to start a new bundle */
6169 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6171 /* We need an instruction group boundary in the middle of a
6172 bundle. See if we can switch to an other template with
6173 an appropriate boundary. */
6175 orig_template
= template;
6176 if (i
== 1 && (user_template
== 4
6177 || (user_template
< 0
6178 && (ia64_templ_desc
[template].exec_unit
[0]
6182 end_of_insn_group
= 0;
6184 else if (i
== 2 && (user_template
== 0
6185 || (user_template
< 0
6186 && (ia64_templ_desc
[template].exec_unit
[1]
6188 /* This test makes sure we don't switch the template if
6189 the next instruction is one that needs to be first in
6190 an instruction group. Since all those instructions are
6191 in the M group, there is no way such an instruction can
6192 fit in this bundle even if we switch the template. The
6193 reason we have to check for this is that otherwise we
6194 may end up generating "MI;;I M.." which has the deadly
6195 effect that the second M instruction is no longer the
6196 first in the bundle! --davidm 99/12/16 */
6197 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6200 end_of_insn_group
= 0;
6202 else if (curr
!= first
)
6203 /* can't fit this insn */
6206 if (template != orig_template
)
6207 /* if we switch the template, we need to reset the NOPs
6208 after slot i. The slot-types of the instructions ahead
6209 of i never change, so we don't need to worry about
6210 changing NOPs in front of this slot. */
6211 for (j
= i
; j
< 3; ++j
)
6212 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6214 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6216 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6217 if (idesc
->type
== IA64_TYPE_DYN
)
6219 if ((strcmp (idesc
->name
, "nop") == 0)
6220 || (strcmp (idesc
->name
, "hint") == 0)
6221 || (strcmp (idesc
->name
, "break") == 0))
6222 insn_unit
= required_unit
;
6223 else if (strcmp (idesc
->name
, "chk.s") == 0)
6225 insn_unit
= IA64_UNIT_M
;
6226 if (required_unit
== IA64_UNIT_I
)
6227 insn_unit
= IA64_UNIT_I
;
6230 as_fatal ("emit_one_bundle: unexpected dynamic op");
6232 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbf??"[insn_unit
]);
6233 ia64_free_opcode (idesc
);
6234 md
.slot
[curr
].idesc
= idesc
= ia64_find_opcode (mnemonic
);
6236 know (!idesc
->next
); /* no resolved dynamic ops have collisions */
6241 insn_type
= idesc
->type
;
6242 insn_unit
= IA64_UNIT_NIL
;
6246 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6247 insn_unit
= required_unit
;
6249 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6250 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6251 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6252 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6253 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6258 if (insn_unit
!= required_unit
)
6260 if (required_unit
== IA64_UNIT_L
6261 && insn_unit
== IA64_UNIT_I
6262 && !(idesc
->flags
& IA64_OPCODE_X_IN_MLX
))
6264 /* we got ourselves an MLX template but the current
6265 instruction isn't an X-unit, or an I-unit instruction
6266 that can go into the X slot of an MLX template. Duh. */
6267 if (md
.num_slots_in_use
>= NUM_SLOTS
)
6269 as_bad_where (md
.slot
[curr
].src_file
,
6270 md
.slot
[curr
].src_line
,
6271 "`%s' can't go in X slot of "
6272 "MLX template", idesc
->name
);
6273 /* drop this insn so we don't livelock: */
6274 --md
.num_slots_in_use
;
6278 continue; /* try next slot */
6284 addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6285 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6288 if (errata_nop_necessary_p (md
.slot
+ curr
, insn_unit
))
6289 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6291 build_insn (md
.slot
+ curr
, insn
+ i
);
6293 /* Set slot counts for non prologue/body unwind records. */
6294 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
; ptr
= ptr
->next
)
6295 if (ptr
->r
.type
!= prologue
&& ptr
->r
.type
!= prologue_gr
6296 && ptr
->r
.type
!= body
)
6298 ptr
->slot_number
= (unsigned long) f
+ i
;
6299 ptr
->slot_frag
= frag_now
;
6301 md
.slot
[curr
].unwind_record
= NULL
;
6303 if (required_unit
== IA64_UNIT_L
)
6306 /* skip one slot for long/X-unit instructions */
6309 --md
.num_slots_in_use
;
6311 /* now is a good time to fix up the labels for this insn: */
6312 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6314 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6315 symbol_set_frag (lfix
->sym
, frag_now
);
6317 /* and fix up the tags also. */
6318 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6320 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6321 symbol_set_frag (lfix
->sym
, frag_now
);
6324 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6326 ifix
= md
.slot
[curr
].fixup
+ j
;
6327 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6328 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6329 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6330 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6331 fix
->fx_file
= md
.slot
[curr
].src_file
;
6332 fix
->fx_line
= md
.slot
[curr
].src_line
;
6335 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6337 if (end_of_insn_group
)
6339 md
.group_idx
= (md
.group_idx
+ 1) % 3;
6340 memset (md
.last_groups
+ md
.group_idx
, 0, sizeof md
.last_groups
[0]);
6344 ia64_free_opcode (md
.slot
[curr
].idesc
);
6345 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6346 md
.slot
[curr
].user_template
= -1;
6348 if (manual_bundling_off
)
6350 manual_bundling
= 0;
6353 curr
= (curr
+ 1) % NUM_SLOTS
;
6354 idesc
= md
.slot
[curr
].idesc
;
6356 if (manual_bundling
)
6358 if (md
.num_slots_in_use
> 0)
6359 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6360 "`%s' does not fit into %s template",
6361 idesc
->name
, ia64_templ_desc
[template].name
);
6363 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6364 "Missing '}' at end of file");
6366 know (md
.num_slots_in_use
< NUM_SLOTS
);
6368 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6369 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6371 number_to_chars_littleendian (f
+ 0, t0
, 8);
6372 number_to_chars_littleendian (f
+ 8, t1
, 8);
6374 unwind
.next_slot_number
= (unsigned long) f
+ 16;
6375 unwind
.next_slot_frag
= frag_now
;
6379 md_parse_option (c
, arg
)
6386 /* Switches from the Intel assembler. */
6388 if (strcmp (arg
, "ilp64") == 0
6389 || strcmp (arg
, "lp64") == 0
6390 || strcmp (arg
, "p64") == 0)
6392 md
.flags
|= EF_IA_64_ABI64
;
6394 else if (strcmp (arg
, "ilp32") == 0)
6396 md
.flags
&= ~EF_IA_64_ABI64
;
6398 else if (strcmp (arg
, "le") == 0)
6400 md
.flags
&= ~EF_IA_64_BE
;
6402 else if (strcmp (arg
, "be") == 0)
6404 md
.flags
|= EF_IA_64_BE
;
6411 if (strcmp (arg
, "so") == 0)
6413 /* Suppress signon message. */
6415 else if (strcmp (arg
, "pi") == 0)
6417 /* Reject privileged instructions. FIXME */
6419 else if (strcmp (arg
, "us") == 0)
6421 /* Allow union of signed and unsigned range. FIXME */
6423 else if (strcmp (arg
, "close_fcalls") == 0)
6425 /* Do not resolve global function calls. */
6432 /* temp[="prefix"] Insert temporary labels into the object file
6433 symbol table prefixed by "prefix".
6434 Default prefix is ":temp:".
6439 /* indirect=<tgt> Assume unannotated indirect branches behavior
6440 according to <tgt> --
6441 exit: branch out from the current context (default)
6442 labels: all labels in context may be branch targets
6444 if (strncmp (arg
, "indirect=", 9) != 0)
6449 /* -X conflicts with an ignored option, use -x instead */
6451 if (!arg
|| strcmp (arg
, "explicit") == 0)
6453 /* set default mode to explicit */
6454 md
.default_explicit_mode
= 1;
6457 else if (strcmp (arg
, "auto") == 0)
6459 md
.default_explicit_mode
= 0;
6461 else if (strcmp (arg
, "debug") == 0)
6465 else if (strcmp (arg
, "debugx") == 0)
6467 md
.default_explicit_mode
= 1;
6472 as_bad (_("Unrecognized option '-x%s'"), arg
);
6477 /* nops Print nops statistics. */
6480 /* GNU specific switches for gcc. */
6481 case OPTION_MCONSTANT_GP
:
6482 md
.flags
|= EF_IA_64_CONS_GP
;
6485 case OPTION_MAUTO_PIC
:
6486 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
6497 md_show_usage (stream
)
6502 --mconstant-gp mark output file as using the constant-GP model\n\
6503 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6504 --mauto-pic mark output file as using the constant-GP model\n\
6505 without function descriptors (sets ELF header flag\n\
6506 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6507 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6508 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6509 -x | -xexplicit turn on dependency violation checking (default)\n\
6510 -xauto automagically remove dependency violations\n\
6511 -xdebug debug dependency violation checker\n"),
6516 ia64_after_parse_args ()
6518 if (debug_type
== DEBUG_STABS
)
6519 as_fatal (_("--gstabs is not supported for ia64"));
6522 /* Return true if TYPE fits in TEMPL at SLOT. */
6525 match (int templ
, int type
, int slot
)
6527 enum ia64_unit unit
;
6530 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
6533 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
6535 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
6537 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
6538 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
6539 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
6540 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
6541 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
6542 default: result
= 0; break;
6547 /* Add a bit of extra goodness if a nop of type F or B would fit
6548 in TEMPL at SLOT. */
6551 extra_goodness (int templ
, int slot
)
6553 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
6555 if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
6560 /* This function is called once, at assembler startup time. It sets
6561 up all the tables, etc. that the MD part of the assembler will need
6562 that can be determined before arguments are parsed. */
6566 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
6571 md
.explicit_mode
= md
.default_explicit_mode
;
6573 bfd_set_section_alignment (stdoutput
, text_section
, 4);
6575 /* Make sure fucntion pointers get initialized. */
6576 target_big_endian
= -1;
6577 dot_byteorder (TARGET_BYTES_BIG_ENDIAN
);
6579 alias_hash
= hash_new ();
6580 alias_name_hash
= hash_new ();
6581 secalias_hash
= hash_new ();
6582 secalias_name_hash
= hash_new ();
6584 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
6585 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
6586 &zero_address_frag
);
6588 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
6589 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
6590 &zero_address_frag
);
6592 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
6593 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
6594 &zero_address_frag
);
6596 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
6597 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
6598 &zero_address_frag
);
6600 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
6601 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
6602 &zero_address_frag
);
6604 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
6605 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
6606 &zero_address_frag
);
6608 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
6609 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
6610 &zero_address_frag
);
6612 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
6613 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
6614 &zero_address_frag
);
6616 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
6617 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
6618 &zero_address_frag
);
6620 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
6621 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
6622 &zero_address_frag
);
6624 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
6625 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
6626 &zero_address_frag
);
6628 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
6629 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
6630 &zero_address_frag
);
6632 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
6633 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
6634 &zero_address_frag
);
6636 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
6637 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
6638 &zero_address_frag
);
6640 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
6641 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
6642 &zero_address_frag
);
6644 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
6645 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
6646 &zero_address_frag
);
6648 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
6649 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
6650 &zero_address_frag
);
6652 /* Compute the table of best templates. We compute goodness as a
6653 base 4 value, in which each match counts for 3, each F counts
6654 for 2, each B counts for 1. This should maximize the number of
6655 F and B nops in the chosen bundles, which is good because these
6656 pipelines are least likely to be overcommitted. */
6657 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
6658 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
6659 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
6662 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
6665 if (match (t
, i
, 0))
6667 if (match (t
, j
, 1))
6669 if (match (t
, k
, 2))
6670 goodness
= 3 + 3 + 3;
6672 goodness
= 3 + 3 + extra_goodness (t
, 2);
6674 else if (match (t
, j
, 2))
6675 goodness
= 3 + 3 + extra_goodness (t
, 1);
6679 goodness
+= extra_goodness (t
, 1);
6680 goodness
+= extra_goodness (t
, 2);
6683 else if (match (t
, i
, 1))
6685 if (match (t
, j
, 2))
6688 goodness
= 3 + extra_goodness (t
, 2);
6690 else if (match (t
, i
, 2))
6691 goodness
= 3 + extra_goodness (t
, 1);
6693 if (goodness
> best
)
6696 best_template
[i
][j
][k
] = t
;
6701 for (i
= 0; i
< NUM_SLOTS
; ++i
)
6702 md
.slot
[i
].user_template
= -1;
6704 md
.pseudo_hash
= hash_new ();
6705 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
6707 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
6708 (void *) (pseudo_opcode
+ i
));
6710 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6711 pseudo_opcode
[i
].name
, err
);
6714 md
.reg_hash
= hash_new ();
6715 md
.dynreg_hash
= hash_new ();
6716 md
.const_hash
= hash_new ();
6717 md
.entry_hash
= hash_new ();
6719 /* general registers: */
6722 for (i
= 0; i
< total
; ++i
)
6724 sprintf (name
, "r%d", i
- REG_GR
);
6725 md
.regsym
[i
] = declare_register (name
, i
);
6728 /* floating point registers: */
6730 for (; i
< total
; ++i
)
6732 sprintf (name
, "f%d", i
- REG_FR
);
6733 md
.regsym
[i
] = declare_register (name
, i
);
6736 /* application registers: */
6739 for (; i
< total
; ++i
)
6741 sprintf (name
, "ar%d", i
- REG_AR
);
6742 md
.regsym
[i
] = declare_register (name
, i
);
6745 /* control registers: */
6748 for (; i
< total
; ++i
)
6750 sprintf (name
, "cr%d", i
- REG_CR
);
6751 md
.regsym
[i
] = declare_register (name
, i
);
6754 /* predicate registers: */
6756 for (; i
< total
; ++i
)
6758 sprintf (name
, "p%d", i
- REG_P
);
6759 md
.regsym
[i
] = declare_register (name
, i
);
6762 /* branch registers: */
6764 for (; i
< total
; ++i
)
6766 sprintf (name
, "b%d", i
- REG_BR
);
6767 md
.regsym
[i
] = declare_register (name
, i
);
6770 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
6771 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
6772 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
6773 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
6774 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
6775 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
6776 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
6778 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
6780 regnum
= indirect_reg
[i
].regnum
;
6781 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
6784 /* define synonyms for application registers: */
6785 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
6786 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
6787 REG_AR
+ ar
[i
- REG_AR
].regnum
);
6789 /* define synonyms for control registers: */
6790 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
6791 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
6792 REG_CR
+ cr
[i
- REG_CR
].regnum
);
6794 declare_register ("gp", REG_GR
+ 1);
6795 declare_register ("sp", REG_GR
+ 12);
6796 declare_register ("rp", REG_BR
+ 0);
6798 /* pseudo-registers used to specify unwind info: */
6799 declare_register ("psp", REG_PSP
);
6801 declare_register_set ("ret", 4, REG_GR
+ 8);
6802 declare_register_set ("farg", 8, REG_FR
+ 8);
6803 declare_register_set ("fret", 8, REG_FR
+ 8);
6805 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
6807 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
6808 (PTR
) (const_bits
+ i
));
6810 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6814 /* Set the architecture and machine depending on defaults and command line
6816 if (md
.flags
& EF_IA_64_ABI64
)
6817 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
6819 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
6822 as_warn (_("Could not set architecture and machine"));
6824 /* Set the pointer size and pointer shift size depending on md.flags */
6826 if (md
.flags
& EF_IA_64_ABI64
)
6828 md
.pointer_size
= 8; /* pointers are 8 bytes */
6829 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
6833 md
.pointer_size
= 4; /* pointers are 4 bytes */
6834 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
6837 md
.mem_offset
.hint
= 0;
6840 md
.entry_labels
= NULL
;
6843 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6844 because that is called after md_parse_option which is where we do the
6845 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6846 default endianness. */
6849 ia64_init (argc
, argv
)
6850 int argc ATTRIBUTE_UNUSED
;
6851 char **argv ATTRIBUTE_UNUSED
;
6853 md
.flags
= MD_FLAGS_DEFAULT
;
6856 /* Return a string for the target object file format. */
6859 ia64_target_format ()
6861 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
6863 if (md
.flags
& EF_IA_64_BE
)
6865 if (md
.flags
& EF_IA_64_ABI64
)
6866 #if defined(TE_AIX50)
6867 return "elf64-ia64-aix-big";
6868 #elif defined(TE_HPUX)
6869 return "elf64-ia64-hpux-big";
6871 return "elf64-ia64-big";
6874 #if defined(TE_AIX50)
6875 return "elf32-ia64-aix-big";
6876 #elif defined(TE_HPUX)
6877 return "elf32-ia64-hpux-big";
6879 return "elf32-ia64-big";
6884 if (md
.flags
& EF_IA_64_ABI64
)
6886 return "elf64-ia64-aix-little";
6888 return "elf64-ia64-little";
6892 return "elf32-ia64-aix-little";
6894 return "elf32-ia64-little";
6899 return "unknown-format";
6903 ia64_end_of_source ()
6905 /* terminate insn group upon reaching end of file: */
6906 insn_group_break (1, 0, 0);
6908 /* emits slots we haven't written yet: */
6909 ia64_flush_insns ();
6911 bfd_set_private_flags (stdoutput
, md
.flags
);
6913 md
.mem_offset
.hint
= 0;
6919 if (md
.qp
.X_op
== O_register
)
6920 as_bad ("qualifying predicate not followed by instruction");
6921 md
.qp
.X_op
= O_absent
;
6923 if (ignore_input ())
6926 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
6928 if (md
.detect_dv
&& !md
.explicit_mode
)
6929 as_warn (_("Explicit stops are ignored in auto mode"));
6931 insn_group_break (1, 0, 0);
6935 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
6937 static int defining_tag
= 0;
6940 ia64_unrecognized_line (ch
)
6946 expression (&md
.qp
);
6947 if (*input_line_pointer
++ != ')')
6949 as_bad ("Expected ')'");
6952 if (md
.qp
.X_op
!= O_register
)
6954 as_bad ("Qualifying predicate expected");
6957 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
6959 as_bad ("Predicate register expected");
6965 if (md
.manual_bundling
)
6966 as_warn ("Found '{' when manual bundling is already turned on");
6968 CURR_SLOT
.manual_bundling_on
= 1;
6969 md
.manual_bundling
= 1;
6971 /* Bundling is only acceptable in explicit mode
6972 or when in default automatic mode. */
6973 if (md
.detect_dv
&& !md
.explicit_mode
)
6975 if (!md
.mode_explicitly_set
6976 && !md
.default_explicit_mode
)
6979 as_warn (_("Found '{' after explicit switch to automatic mode"));
6984 if (!md
.manual_bundling
)
6985 as_warn ("Found '}' when manual bundling is off");
6987 PREV_SLOT
.manual_bundling_off
= 1;
6988 md
.manual_bundling
= 0;
6990 /* switch back to automatic mode, if applicable */
6993 && !md
.mode_explicitly_set
6994 && !md
.default_explicit_mode
)
6997 /* Allow '{' to follow on the same line. We also allow ";;", but that
6998 happens automatically because ';' is an end of line marker. */
7000 if (input_line_pointer
[0] == '{')
7002 input_line_pointer
++;
7003 return ia64_unrecognized_line ('{');
7006 demand_empty_rest_of_line ();
7016 if (md
.qp
.X_op
== O_register
)
7018 as_bad ("Tag must come before qualifying predicate.");
7022 /* This implements just enough of read_a_source_file in read.c to
7023 recognize labels. */
7024 if (is_name_beginner (*input_line_pointer
))
7026 s
= input_line_pointer
;
7027 c
= get_symbol_end ();
7029 else if (LOCAL_LABELS_FB
7030 && ISDIGIT (*input_line_pointer
))
7033 while (ISDIGIT (*input_line_pointer
))
7034 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7035 fb_label_instance_inc (temp
);
7036 s
= fb_label_name (temp
, 0);
7037 c
= *input_line_pointer
;
7046 /* Put ':' back for error messages' sake. */
7047 *input_line_pointer
++ = ':';
7048 as_bad ("Expected ':'");
7055 /* Put ':' back for error messages' sake. */
7056 *input_line_pointer
++ = ':';
7057 if (*input_line_pointer
++ != ']')
7059 as_bad ("Expected ']'");
7064 as_bad ("Tag name expected");
7074 /* Not a valid line. */
7079 ia64_frob_label (sym
)
7082 struct label_fix
*fix
;
7084 /* Tags need special handling since they are not bundle breaks like
7088 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7090 fix
->next
= CURR_SLOT
.tag_fixups
;
7091 CURR_SLOT
.tag_fixups
= fix
;
7096 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7098 md
.last_text_seg
= now_seg
;
7099 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7101 fix
->next
= CURR_SLOT
.label_fixups
;
7102 CURR_SLOT
.label_fixups
= fix
;
7104 /* Keep track of how many code entry points we've seen. */
7105 if (md
.path
== md
.maxpaths
)
7108 md
.entry_labels
= (const char **)
7109 xrealloc ((void *) md
.entry_labels
,
7110 md
.maxpaths
* sizeof (char *));
7112 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7117 ia64_flush_pending_output ()
7119 if (!md
.keep_pending_output
7120 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7122 /* ??? This causes many unnecessary stop bits to be emitted.
7123 Unfortunately, it isn't clear if it is safe to remove this. */
7124 insn_group_break (1, 0, 0);
7125 ia64_flush_insns ();
7129 /* Do ia64-specific expression optimization. All that's done here is
7130 to transform index expressions that are either due to the indexing
7131 of rotating registers or due to the indexing of indirect register
7134 ia64_optimize_expr (l
, op
, r
)
7143 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7145 num_regs
= (l
->X_add_number
>> 16);
7146 if ((unsigned) r
->X_add_number
>= num_regs
)
7149 as_bad ("No current frame");
7151 as_bad ("Index out of range 0..%u", num_regs
- 1);
7152 r
->X_add_number
= 0;
7154 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7157 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7159 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7160 || l
->X_add_number
== IND_MEM
)
7162 as_bad ("Indirect register set name expected");
7163 l
->X_add_number
= IND_CPUID
;
7166 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7167 l
->X_add_number
= r
->X_add_number
;
7175 ia64_parse_name (name
, e
)
7179 struct const_desc
*cdesc
;
7180 struct dynreg
*dr
= 0;
7181 unsigned int regnum
;
7185 /* first see if NAME is a known register name: */
7186 sym
= hash_find (md
.reg_hash
, name
);
7189 e
->X_op
= O_register
;
7190 e
->X_add_number
= S_GET_VALUE (sym
);
7194 cdesc
= hash_find (md
.const_hash
, name
);
7197 e
->X_op
= O_constant
;
7198 e
->X_add_number
= cdesc
->value
;
7202 /* check for inN, locN, or outN: */
7206 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7214 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7222 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7235 /* The name is inN, locN, or outN; parse the register number. */
7236 regnum
= strtoul (name
, &end
, 10);
7237 if (end
> name
&& *end
== '\0')
7239 if ((unsigned) regnum
>= dr
->num_regs
)
7242 as_bad ("No current frame");
7244 as_bad ("Register number out of range 0..%u",
7248 e
->X_op
= O_register
;
7249 e
->X_add_number
= dr
->base
+ regnum
;
7254 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7256 /* We've got ourselves the name of a rotating register set.
7257 Store the base register number in the low 16 bits of
7258 X_add_number and the size of the register set in the top 16
7260 e
->X_op
= O_register
;
7261 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7267 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7270 ia64_canonicalize_symbol_name (name
)
7273 size_t len
= strlen (name
);
7274 if (len
> 1 && name
[len
- 1] == '#')
7275 name
[len
- 1] = '\0';
7279 /* Return true if idesc is a conditional branch instruction. This excludes
7280 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7281 because they always read/write resources regardless of the value of the
7282 qualifying predicate. br.ia must always use p0, and hence is always
7283 taken. Thus this function returns true for branches which can fall
7284 through, and which use no resources if they do fall through. */
7287 is_conditional_branch (idesc
)
7288 struct ia64_opcode
*idesc
;
7290 /* br is a conditional branch. Everything that starts with br. except
7291 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7292 Everything that starts with brl is a conditional branch. */
7293 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
7294 && (idesc
->name
[2] == '\0'
7295 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
7296 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
7297 || idesc
->name
[2] == 'l'
7298 /* br.cond, br.call, br.clr */
7299 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
7300 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
7301 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
7304 /* Return whether the given opcode is a taken branch. If there's any doubt,
7308 is_taken_branch (idesc
)
7309 struct ia64_opcode
*idesc
;
7311 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
7312 || strncmp (idesc
->name
, "br.ia", 5) == 0);
7315 /* Return whether the given opcode is an interruption or rfi. If there's any
7316 doubt, returns zero. */
7319 is_interruption_or_rfi (idesc
)
7320 struct ia64_opcode
*idesc
;
7322 if (strcmp (idesc
->name
, "rfi") == 0)
7327 /* Returns the index of the given dependency in the opcode's list of chks, or
7328 -1 if there is no dependency. */
7331 depends_on (depind
, idesc
)
7333 struct ia64_opcode
*idesc
;
7336 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
7337 for (i
= 0; i
< dep
->nchks
; i
++)
7339 if (depind
== DEP (dep
->chks
[i
]))
7345 /* Determine a set of specific resources used for a particular resource
7346 class. Returns the number of specific resources identified For those
7347 cases which are not determinable statically, the resource returned is
7350 Meanings of value in 'NOTE':
7351 1) only read/write when the register number is explicitly encoded in the
7353 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7354 accesses CFM when qualifying predicate is in the rotating region.
7355 3) general register value is used to specify an indirect register; not
7356 determinable statically.
7357 4) only read the given resource when bits 7:0 of the indirect index
7358 register value does not match the register number of the resource; not
7359 determinable statically.
7360 5) all rules are implementation specific.
7361 6) only when both the index specified by the reader and the index specified
7362 by the writer have the same value in bits 63:61; not determinable
7364 7) only access the specified resource when the corresponding mask bit is
7366 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7367 only read when these insns reference FR2-31
7368 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7369 written when these insns write FR32-127
7370 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7372 11) The target predicates are written independently of PR[qp], but source
7373 registers are only read if PR[qp] is true. Since the state of PR[qp]
7374 cannot statically be determined, all source registers are marked used.
7375 12) This insn only reads the specified predicate register when that
7376 register is the PR[qp].
7377 13) This reference to ld-c only applies to teh GR whose value is loaded
7378 with data returned from memory, not the post-incremented address register.
7379 14) The RSE resource includes the implementation-specific RSE internal
7380 state resources. At least one (and possibly more) of these resources are
7381 read by each instruction listed in IC:rse-readers. At least one (and
7382 possibly more) of these resources are written by each insn listed in
7384 15+16) Represents reserved instructions, which the assembler does not
7387 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7388 this code; there are no dependency violations based on memory access.
7391 #define MAX_SPECS 256
7396 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
7397 const struct ia64_dependency
*dep
;
7398 struct ia64_opcode
*idesc
;
7399 int type
; /* is this a DV chk or a DV reg? */
7400 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
7401 int note
; /* resource note for this insn's usage */
7402 int path
; /* which execution path to examine */
7409 if (dep
->mode
== IA64_DV_WAW
7410 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
7411 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
7414 /* template for any resources we identify */
7415 tmpl
.dependency
= dep
;
7417 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
7418 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
7419 tmpl
.link_to_qp_branch
= 1;
7420 tmpl
.mem_offset
.hint
= 0;
7423 tmpl
.cmp_type
= CMP_NONE
;
7426 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7427 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7428 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7430 /* we don't need to track these */
7431 if (dep
->semantics
== IA64_DVS_NONE
)
7434 switch (dep
->specifier
)
7439 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7441 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7442 if (regno
>= 0 && regno
<= 7)
7444 specs
[count
] = tmpl
;
7445 specs
[count
++].index
= regno
;
7451 for (i
= 0; i
< 8; i
++)
7453 specs
[count
] = tmpl
;
7454 specs
[count
++].index
= i
;
7463 case IA64_RS_AR_UNAT
:
7464 /* This is a mov =AR or mov AR= instruction. */
7465 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7467 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7468 if (regno
== AR_UNAT
)
7470 specs
[count
++] = tmpl
;
7475 /* This is a spill/fill, or other instruction that modifies the
7478 /* Unless we can determine the specific bits used, mark the whole
7479 thing; bits 8:3 of the memory address indicate the bit used in
7480 UNAT. The .mem.offset hint may be used to eliminate a small
7481 subset of conflicts. */
7482 specs
[count
] = tmpl
;
7483 if (md
.mem_offset
.hint
)
7486 fprintf (stderr
, " Using hint for spill/fill\n");
7487 /* The index isn't actually used, just set it to something
7488 approximating the bit index. */
7489 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
7490 specs
[count
].mem_offset
.hint
= 1;
7491 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
7492 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
7496 specs
[count
++].specific
= 0;
7504 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7506 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7507 if ((regno
>= 8 && regno
<= 15)
7508 || (regno
>= 20 && regno
<= 23)
7509 || (regno
>= 31 && regno
<= 39)
7510 || (regno
>= 41 && regno
<= 47)
7511 || (regno
>= 67 && regno
<= 111))
7513 specs
[count
] = tmpl
;
7514 specs
[count
++].index
= regno
;
7527 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7529 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7530 if ((regno
>= 48 && regno
<= 63)
7531 || (regno
>= 112 && regno
<= 127))
7533 specs
[count
] = tmpl
;
7534 specs
[count
++].index
= regno
;
7540 for (i
= 48; i
< 64; i
++)
7542 specs
[count
] = tmpl
;
7543 specs
[count
++].index
= i
;
7545 for (i
= 112; i
< 128; i
++)
7547 specs
[count
] = tmpl
;
7548 specs
[count
++].index
= i
;
7566 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7567 if (idesc
->operands
[i
] == IA64_OPND_B1
7568 || idesc
->operands
[i
] == IA64_OPND_B2
)
7570 specs
[count
] = tmpl
;
7571 specs
[count
++].index
=
7572 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7577 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7578 if (idesc
->operands
[i
] == IA64_OPND_B1
7579 || idesc
->operands
[i
] == IA64_OPND_B2
)
7581 specs
[count
] = tmpl
;
7582 specs
[count
++].index
=
7583 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7589 case IA64_RS_CPUID
: /* four or more registers */
7592 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
7594 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7595 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7598 specs
[count
] = tmpl
;
7599 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7603 specs
[count
] = tmpl
;
7604 specs
[count
++].specific
= 0;
7614 case IA64_RS_DBR
: /* four or more registers */
7617 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
7619 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7620 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7623 specs
[count
] = tmpl
;
7624 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7628 specs
[count
] = tmpl
;
7629 specs
[count
++].specific
= 0;
7633 else if (note
== 0 && !rsrc_write
)
7635 specs
[count
] = tmpl
;
7636 specs
[count
++].specific
= 0;
7644 case IA64_RS_IBR
: /* four or more registers */
7647 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
7649 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7650 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7653 specs
[count
] = tmpl
;
7654 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7658 specs
[count
] = tmpl
;
7659 specs
[count
++].specific
= 0;
7672 /* These are implementation specific. Force all references to
7673 conflict with all other references. */
7674 specs
[count
] = tmpl
;
7675 specs
[count
++].specific
= 0;
7683 case IA64_RS_PKR
: /* 16 or more registers */
7684 if (note
== 3 || note
== 4)
7686 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
7688 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7689 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7694 specs
[count
] = tmpl
;
7695 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7698 for (i
= 0; i
< NELEMS (gr_values
); i
++)
7700 /* Uses all registers *except* the one in R3. */
7701 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
7703 specs
[count
] = tmpl
;
7704 specs
[count
++].index
= i
;
7710 specs
[count
] = tmpl
;
7711 specs
[count
++].specific
= 0;
7718 specs
[count
] = tmpl
;
7719 specs
[count
++].specific
= 0;
7723 case IA64_RS_PMC
: /* four or more registers */
7726 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
7727 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
7730 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
7732 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
7733 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7736 specs
[count
] = tmpl
;
7737 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7741 specs
[count
] = tmpl
;
7742 specs
[count
++].specific
= 0;
7752 case IA64_RS_PMD
: /* four or more registers */
7755 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
7757 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7758 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7761 specs
[count
] = tmpl
;
7762 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7766 specs
[count
] = tmpl
;
7767 specs
[count
++].specific
= 0;
7777 case IA64_RS_RR
: /* eight registers */
7780 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
7782 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7783 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7786 specs
[count
] = tmpl
;
7787 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
7791 specs
[count
] = tmpl
;
7792 specs
[count
++].specific
= 0;
7796 else if (note
== 0 && !rsrc_write
)
7798 specs
[count
] = tmpl
;
7799 specs
[count
++].specific
= 0;
7807 case IA64_RS_CR_IRR
:
7810 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7811 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
7813 && idesc
->operands
[1] == IA64_OPND_CR3
7816 for (i
= 0; i
< 4; i
++)
7818 specs
[count
] = tmpl
;
7819 specs
[count
++].index
= CR_IRR0
+ i
;
7825 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7826 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
7828 && regno
<= CR_IRR3
)
7830 specs
[count
] = tmpl
;
7831 specs
[count
++].index
= regno
;
7840 case IA64_RS_CR_LRR
:
7847 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7848 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
7849 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
7851 specs
[count
] = tmpl
;
7852 specs
[count
++].index
= regno
;
7860 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
7862 specs
[count
] = tmpl
;
7863 specs
[count
++].index
=
7864 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7879 else if (rsrc_write
)
7881 if (dep
->specifier
== IA64_RS_FRb
7882 && idesc
->operands
[0] == IA64_OPND_F1
)
7884 specs
[count
] = tmpl
;
7885 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
7890 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7892 if (idesc
->operands
[i
] == IA64_OPND_F2
7893 || idesc
->operands
[i
] == IA64_OPND_F3
7894 || idesc
->operands
[i
] == IA64_OPND_F4
)
7896 specs
[count
] = tmpl
;
7897 specs
[count
++].index
=
7898 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
7907 /* This reference applies only to the GR whose value is loaded with
7908 data returned from memory. */
7909 specs
[count
] = tmpl
;
7910 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
7916 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7917 if (idesc
->operands
[i
] == IA64_OPND_R1
7918 || idesc
->operands
[i
] == IA64_OPND_R2
7919 || idesc
->operands
[i
] == IA64_OPND_R3
)
7921 specs
[count
] = tmpl
;
7922 specs
[count
++].index
=
7923 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
7925 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
7926 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
7927 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
7929 specs
[count
] = tmpl
;
7930 specs
[count
++].index
=
7931 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
7936 /* Look for anything that reads a GR. */
7937 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
7939 if (idesc
->operands
[i
] == IA64_OPND_MR3
7940 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
7941 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
7942 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
7943 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
7944 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
7945 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
7946 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
7947 || idesc
->operands
[i
] == IA64_OPND_RR_R3
7948 || ((i
>= idesc
->num_outputs
)
7949 && (idesc
->operands
[i
] == IA64_OPND_R1
7950 || idesc
->operands
[i
] == IA64_OPND_R2
7951 || idesc
->operands
[i
] == IA64_OPND_R3
7952 /* addl source register. */
7953 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
7955 specs
[count
] = tmpl
;
7956 specs
[count
++].index
=
7957 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
7968 /* This is the same as IA64_RS_PRr, except that the register range is
7969 from 1 - 15, and there are no rotating register reads/writes here. */
7973 for (i
= 1; i
< 16; i
++)
7975 specs
[count
] = tmpl
;
7976 specs
[count
++].index
= i
;
7982 /* Mark only those registers indicated by the mask. */
7985 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
7986 for (i
= 1; i
< 16; i
++)
7987 if (mask
& ((valueT
) 1 << i
))
7989 specs
[count
] = tmpl
;
7990 specs
[count
++].index
= i
;
7998 else if (note
== 11) /* note 11 implies note 1 as well */
8002 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8004 if (idesc
->operands
[i
] == IA64_OPND_P1
8005 || idesc
->operands
[i
] == IA64_OPND_P2
)
8007 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8008 if (regno
>= 1 && regno
< 16)
8010 specs
[count
] = tmpl
;
8011 specs
[count
++].index
= regno
;
8021 else if (note
== 12)
8023 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8025 specs
[count
] = tmpl
;
8026 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8033 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8034 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8035 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8036 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8038 if ((idesc
->operands
[0] == IA64_OPND_P1
8039 || idesc
->operands
[0] == IA64_OPND_P2
)
8040 && p1
>= 1 && p1
< 16)
8042 specs
[count
] = tmpl
;
8043 specs
[count
].cmp_type
=
8044 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8045 specs
[count
++].index
= p1
;
8047 if ((idesc
->operands
[1] == IA64_OPND_P1
8048 || idesc
->operands
[1] == IA64_OPND_P2
)
8049 && p2
>= 1 && p2
< 16)
8051 specs
[count
] = tmpl
;
8052 specs
[count
].cmp_type
=
8053 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8054 specs
[count
++].index
= p2
;
8059 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8061 specs
[count
] = tmpl
;
8062 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8064 if (idesc
->operands
[1] == IA64_OPND_PR
)
8066 for (i
= 1; i
< 16; i
++)
8068 specs
[count
] = tmpl
;
8069 specs
[count
++].index
= i
;
8080 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8081 simplified cases of this. */
8085 for (i
= 16; i
< 63; i
++)
8087 specs
[count
] = tmpl
;
8088 specs
[count
++].index
= i
;
8094 /* Mark only those registers indicated by the mask. */
8096 && idesc
->operands
[0] == IA64_OPND_PR
)
8098 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8099 if (mask
& ((valueT
) 1 << 16))
8100 for (i
= 16; i
< 63; i
++)
8102 specs
[count
] = tmpl
;
8103 specs
[count
++].index
= i
;
8107 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8109 for (i
= 16; i
< 63; i
++)
8111 specs
[count
] = tmpl
;
8112 specs
[count
++].index
= i
;
8120 else if (note
== 11) /* note 11 implies note 1 as well */
8124 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8126 if (idesc
->operands
[i
] == IA64_OPND_P1
8127 || idesc
->operands
[i
] == IA64_OPND_P2
)
8129 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8130 if (regno
>= 16 && regno
< 63)
8132 specs
[count
] = tmpl
;
8133 specs
[count
++].index
= regno
;
8143 else if (note
== 12)
8145 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8147 specs
[count
] = tmpl
;
8148 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8155 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8156 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8157 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8158 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8160 if ((idesc
->operands
[0] == IA64_OPND_P1
8161 || idesc
->operands
[0] == IA64_OPND_P2
)
8162 && p1
>= 16 && p1
< 63)
8164 specs
[count
] = tmpl
;
8165 specs
[count
].cmp_type
=
8166 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8167 specs
[count
++].index
= p1
;
8169 if ((idesc
->operands
[1] == IA64_OPND_P1
8170 || idesc
->operands
[1] == IA64_OPND_P2
)
8171 && p2
>= 16 && p2
< 63)
8173 specs
[count
] = tmpl
;
8174 specs
[count
].cmp_type
=
8175 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8176 specs
[count
++].index
= p2
;
8181 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8183 specs
[count
] = tmpl
;
8184 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8186 if (idesc
->operands
[1] == IA64_OPND_PR
)
8188 for (i
= 16; i
< 63; i
++)
8190 specs
[count
] = tmpl
;
8191 specs
[count
++].index
= i
;
8203 /* Verify that the instruction is using the PSR bit indicated in
8207 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8209 if (dep
->regindex
< 6)
8211 specs
[count
++] = tmpl
;
8214 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8216 if (dep
->regindex
< 32
8217 || dep
->regindex
== 35
8218 || dep
->regindex
== 36
8219 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8221 specs
[count
++] = tmpl
;
8224 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8226 if (dep
->regindex
< 32
8227 || dep
->regindex
== 35
8228 || dep
->regindex
== 36
8229 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8231 specs
[count
++] = tmpl
;
8236 /* Several PSR bits have very specific dependencies. */
8237 switch (dep
->regindex
)
8240 specs
[count
++] = tmpl
;
8245 specs
[count
++] = tmpl
;
8249 /* Only certain CR accesses use PSR.ic */
8250 if (idesc
->operands
[0] == IA64_OPND_CR3
8251 || idesc
->operands
[1] == IA64_OPND_CR3
)
8254 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8257 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
8272 specs
[count
++] = tmpl
;
8281 specs
[count
++] = tmpl
;
8285 /* Only some AR accesses use cpl */
8286 if (idesc
->operands
[0] == IA64_OPND_AR3
8287 || idesc
->operands
[1] == IA64_OPND_AR3
)
8290 ((idesc
->operands
[0] == IA64_OPND_AR3
)
8293 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
8300 && regno
<= AR_K7
))))
8302 specs
[count
++] = tmpl
;
8307 specs
[count
++] = tmpl
;
8317 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
8319 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
8325 if (mask
& ((valueT
) 1 << dep
->regindex
))
8327 specs
[count
++] = tmpl
;
8332 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
8333 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
8334 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8335 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8337 if (idesc
->operands
[i
] == IA64_OPND_F1
8338 || idesc
->operands
[i
] == IA64_OPND_F2
8339 || idesc
->operands
[i
] == IA64_OPND_F3
8340 || idesc
->operands
[i
] == IA64_OPND_F4
)
8342 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8343 if (reg
>= min
&& reg
<= max
)
8345 specs
[count
++] = tmpl
;
8352 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
8353 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
8354 /* mfh is read on writes to FR32-127; mfl is read on writes to
8356 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8358 if (idesc
->operands
[i
] == IA64_OPND_F1
)
8360 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8361 if (reg
>= min
&& reg
<= max
)
8363 specs
[count
++] = tmpl
;
8368 else if (note
== 10)
8370 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8372 if (idesc
->operands
[i
] == IA64_OPND_R1
8373 || idesc
->operands
[i
] == IA64_OPND_R2
8374 || idesc
->operands
[i
] == IA64_OPND_R3
)
8376 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8377 if (regno
>= 16 && regno
<= 31)
8379 specs
[count
++] = tmpl
;
8390 case IA64_RS_AR_FPSR
:
8391 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8393 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8394 if (regno
== AR_FPSR
)
8396 specs
[count
++] = tmpl
;
8401 specs
[count
++] = tmpl
;
8406 /* Handle all AR[REG] resources */
8407 if (note
== 0 || note
== 1)
8409 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8410 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
8411 && regno
== dep
->regindex
)
8413 specs
[count
++] = tmpl
;
8415 /* other AR[REG] resources may be affected by AR accesses */
8416 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
8419 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
8420 switch (dep
->regindex
)
8426 if (regno
== AR_BSPSTORE
)
8428 specs
[count
++] = tmpl
;
8432 (regno
== AR_BSPSTORE
8433 || regno
== AR_RNAT
))
8435 specs
[count
++] = tmpl
;
8440 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8443 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
8444 switch (dep
->regindex
)
8449 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
8451 specs
[count
++] = tmpl
;
8458 specs
[count
++] = tmpl
;
8468 /* Handle all CR[REG] resources */
8469 if (note
== 0 || note
== 1)
8471 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8473 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8474 if (regno
== dep
->regindex
)
8476 specs
[count
++] = tmpl
;
8478 else if (!rsrc_write
)
8480 /* Reads from CR[IVR] affect other resources. */
8481 if (regno
== CR_IVR
)
8483 if ((dep
->regindex
>= CR_IRR0
8484 && dep
->regindex
<= CR_IRR3
)
8485 || dep
->regindex
== CR_TPR
)
8487 specs
[count
++] = tmpl
;
8494 specs
[count
++] = tmpl
;
8503 case IA64_RS_INSERVICE
:
8504 /* look for write of EOI (67) or read of IVR (65) */
8505 if ((idesc
->operands
[0] == IA64_OPND_CR3
8506 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
8507 || (idesc
->operands
[1] == IA64_OPND_CR3
8508 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
8510 specs
[count
++] = tmpl
;
8517 specs
[count
++] = tmpl
;
8528 specs
[count
++] = tmpl
;
8532 /* Check if any of the registers accessed are in the rotating region.
8533 mov to/from pr accesses CFM only when qp_regno is in the rotating
8535 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8537 if (idesc
->operands
[i
] == IA64_OPND_R1
8538 || idesc
->operands
[i
] == IA64_OPND_R2
8539 || idesc
->operands
[i
] == IA64_OPND_R3
)
8541 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8542 /* Assumes that md.rot.num_regs is always valid */
8543 if (md
.rot
.num_regs
> 0
8545 && num
< 31 + md
.rot
.num_regs
)
8547 specs
[count
] = tmpl
;
8548 specs
[count
++].specific
= 0;
8551 else if (idesc
->operands
[i
] == IA64_OPND_F1
8552 || idesc
->operands
[i
] == IA64_OPND_F2
8553 || idesc
->operands
[i
] == IA64_OPND_F3
8554 || idesc
->operands
[i
] == IA64_OPND_F4
)
8556 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8559 specs
[count
] = tmpl
;
8560 specs
[count
++].specific
= 0;
8563 else if (idesc
->operands
[i
] == IA64_OPND_P1
8564 || idesc
->operands
[i
] == IA64_OPND_P2
)
8566 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8569 specs
[count
] = tmpl
;
8570 specs
[count
++].specific
= 0;
8574 if (CURR_SLOT
.qp_regno
> 15)
8576 specs
[count
] = tmpl
;
8577 specs
[count
++].specific
= 0;
8582 /* This is the same as IA64_RS_PRr, except simplified to account for
8583 the fact that there is only one register. */
8587 specs
[count
++] = tmpl
;
8592 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
8593 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8594 if (mask
& ((valueT
) 1 << 63))
8595 specs
[count
++] = tmpl
;
8597 else if (note
== 11)
8599 if ((idesc
->operands
[0] == IA64_OPND_P1
8600 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
8601 || (idesc
->operands
[1] == IA64_OPND_P2
8602 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
8604 specs
[count
++] = tmpl
;
8607 else if (note
== 12)
8609 if (CURR_SLOT
.qp_regno
== 63)
8611 specs
[count
++] = tmpl
;
8618 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8619 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8620 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8621 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8624 && (idesc
->operands
[0] == IA64_OPND_P1
8625 || idesc
->operands
[0] == IA64_OPND_P2
))
8627 specs
[count
] = tmpl
;
8628 specs
[count
++].cmp_type
=
8629 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8632 && (idesc
->operands
[1] == IA64_OPND_P1
8633 || idesc
->operands
[1] == IA64_OPND_P2
))
8635 specs
[count
] = tmpl
;
8636 specs
[count
++].cmp_type
=
8637 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8642 if (CURR_SLOT
.qp_regno
== 63)
8644 specs
[count
++] = tmpl
;
8655 /* FIXME we can identify some individual RSE written resources, but RSE
8656 read resources have not yet been completely identified, so for now
8657 treat RSE as a single resource */
8658 if (strncmp (idesc
->name
, "mov", 3) == 0)
8662 if (idesc
->operands
[0] == IA64_OPND_AR3
8663 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
8665 specs
[count
] = tmpl
;
8666 specs
[count
++].index
= 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8671 if (idesc
->operands
[0] == IA64_OPND_AR3
)
8673 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
8674 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
8676 specs
[count
++] = tmpl
;
8679 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8681 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
8682 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
8683 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
8685 specs
[count
++] = tmpl
;
8692 specs
[count
++] = tmpl
;
8697 /* FIXME -- do any of these need to be non-specific? */
8698 specs
[count
++] = tmpl
;
8702 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
8709 /* Clear branch flags on marked resources. This breaks the link between the
8710 QP of the marking instruction and a subsequent branch on the same QP. */
8713 clear_qp_branch_flag (mask
)
8717 for (i
= 0; i
< regdepslen
; i
++)
8719 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
8720 if ((bit
& mask
) != 0)
8722 regdeps
[i
].link_to_qp_branch
= 0;
8727 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8729 Any changes to a PR clears the mutex relations which include that PR. */
8732 clear_qp_mutex (mask
)
8738 while (i
< qp_mutexeslen
)
8740 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
8744 fprintf (stderr
, " Clearing mutex relation");
8745 print_prmask (qp_mutexes
[i
].prmask
);
8746 fprintf (stderr
, "\n");
8748 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
8755 /* Clear implies relations which contain PRs in the given masks.
8756 P1_MASK indicates the source of the implies relation, while P2_MASK
8757 indicates the implied PR. */
8760 clear_qp_implies (p1_mask
, p2_mask
)
8767 while (i
< qp_implieslen
)
8769 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
8770 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
8773 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
8774 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
8775 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
8782 /* Add the PRs specified to the list of implied relations. */
8785 add_qp_imply (p1
, p2
)
8792 /* p0 is not meaningful here. */
8793 if (p1
== 0 || p2
== 0)
8799 /* If it exists already, ignore it. */
8800 for (i
= 0; i
< qp_implieslen
; i
++)
8802 if (qp_implies
[i
].p1
== p1
8803 && qp_implies
[i
].p2
== p2
8804 && qp_implies
[i
].path
== md
.path
8805 && !qp_implies
[i
].p2_branched
)
8809 if (qp_implieslen
== qp_impliestotlen
)
8811 qp_impliestotlen
+= 20;
8812 qp_implies
= (struct qp_imply
*)
8813 xrealloc ((void *) qp_implies
,
8814 qp_impliestotlen
* sizeof (struct qp_imply
));
8817 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
8818 qp_implies
[qp_implieslen
].p1
= p1
;
8819 qp_implies
[qp_implieslen
].p2
= p2
;
8820 qp_implies
[qp_implieslen
].path
= md
.path
;
8821 qp_implies
[qp_implieslen
++].p2_branched
= 0;
8823 /* Add in the implied transitive relations; for everything that p2 implies,
8824 make p1 imply that, too; for everything that implies p1, make it imply p2
8826 for (i
= 0; i
< qp_implieslen
; i
++)
8828 if (qp_implies
[i
].p1
== p2
)
8829 add_qp_imply (p1
, qp_implies
[i
].p2
);
8830 if (qp_implies
[i
].p2
== p1
)
8831 add_qp_imply (qp_implies
[i
].p1
, p2
);
8833 /* Add in mutex relations implied by this implies relation; for each mutex
8834 relation containing p2, duplicate it and replace p2 with p1. */
8835 bit
= (valueT
) 1 << p1
;
8836 mask
= (valueT
) 1 << p2
;
8837 for (i
= 0; i
< qp_mutexeslen
; i
++)
8839 if (qp_mutexes
[i
].prmask
& mask
)
8840 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
8844 /* Add the PRs specified in the mask to the mutex list; this means that only
8845 one of the PRs can be true at any time. PR0 should never be included in
8855 if (qp_mutexeslen
== qp_mutexestotlen
)
8857 qp_mutexestotlen
+= 20;
8858 qp_mutexes
= (struct qpmutex
*)
8859 xrealloc ((void *) qp_mutexes
,
8860 qp_mutexestotlen
* sizeof (struct qpmutex
));
8864 fprintf (stderr
, " Registering mutex on");
8865 print_prmask (mask
);
8866 fprintf (stderr
, "\n");
8868 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
8869 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
8873 has_suffix_p (name
, suffix
)
8877 size_t namelen
= strlen (name
);
8878 size_t sufflen
= strlen (suffix
);
8880 if (namelen
<= sufflen
)
8882 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
8886 clear_register_values ()
8890 fprintf (stderr
, " Clearing register values\n");
8891 for (i
= 1; i
< NELEMS (gr_values
); i
++)
8892 gr_values
[i
].known
= 0;
8895 /* Keep track of register values/changes which affect DV tracking.
8897 optimization note: should add a flag to classes of insns where otherwise we
8898 have to examine a group of strings to identify them. */
8901 note_register_values (idesc
)
8902 struct ia64_opcode
*idesc
;
8904 valueT qp_changemask
= 0;
8907 /* Invalidate values for registers being written to. */
8908 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8910 if (idesc
->operands
[i
] == IA64_OPND_R1
8911 || idesc
->operands
[i
] == IA64_OPND_R2
8912 || idesc
->operands
[i
] == IA64_OPND_R3
)
8914 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8915 if (regno
> 0 && regno
< NELEMS (gr_values
))
8916 gr_values
[regno
].known
= 0;
8918 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
8920 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8921 if (regno
> 0 && regno
< 4)
8922 gr_values
[regno
].known
= 0;
8924 else if (idesc
->operands
[i
] == IA64_OPND_P1
8925 || idesc
->operands
[i
] == IA64_OPND_P2
)
8927 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8928 qp_changemask
|= (valueT
) 1 << regno
;
8930 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
8932 if (idesc
->operands
[2] & (valueT
) 0x10000)
8933 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
8935 qp_changemask
= idesc
->operands
[2];
8938 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
8940 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
8941 qp_changemask
= ~(valueT
) 0xFFFFFFFFFFF | idesc
->operands
[1];
8943 qp_changemask
= idesc
->operands
[1];
8944 qp_changemask
&= ~(valueT
) 0xFFFF;
8949 /* Always clear qp branch flags on any PR change. */
8950 /* FIXME there may be exceptions for certain compares. */
8951 clear_qp_branch_flag (qp_changemask
);
8953 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
8954 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
8956 qp_changemask
|= ~(valueT
) 0xFFFF;
8957 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
8959 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
8960 gr_values
[i
].known
= 0;
8962 clear_qp_mutex (qp_changemask
);
8963 clear_qp_implies (qp_changemask
, qp_changemask
);
8965 /* After a call, all register values are undefined, except those marked
8967 else if (strncmp (idesc
->name
, "br.call", 6) == 0
8968 || strncmp (idesc
->name
, "brl.call", 7) == 0)
8970 /* FIXME keep GR values which are marked as "safe_across_calls" */
8971 clear_register_values ();
8972 clear_qp_mutex (~qp_safe_across_calls
);
8973 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
8974 clear_qp_branch_flag (~qp_safe_across_calls
);
8976 else if (is_interruption_or_rfi (idesc
)
8977 || is_taken_branch (idesc
))
8979 clear_register_values ();
8980 clear_qp_mutex (~(valueT
) 0);
8981 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
8983 /* Look for mutex and implies relations. */
8984 else if ((idesc
->operands
[0] == IA64_OPND_P1
8985 || idesc
->operands
[0] == IA64_OPND_P2
)
8986 && (idesc
->operands
[1] == IA64_OPND_P1
8987 || idesc
->operands
[1] == IA64_OPND_P2
))
8989 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8990 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8991 valueT p1mask
= (valueT
) 1 << p1
;
8992 valueT p2mask
= (valueT
) 1 << p2
;
8994 /* If one of the PRs is PR0, we can't really do anything. */
8995 if (p1
== 0 || p2
== 0)
8998 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9000 /* In general, clear mutexes and implies which include P1 or P2,
9001 with the following exceptions. */
9002 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9003 || has_suffix_p (idesc
->name
, ".and.orcm"))
9005 add_qp_mutex (p1mask
| p2mask
);
9006 clear_qp_implies (p2mask
, p1mask
);
9008 else if (has_suffix_p (idesc
->name
, ".andcm")
9009 || has_suffix_p (idesc
->name
, ".and"))
9011 clear_qp_implies (0, p1mask
| p2mask
);
9013 else if (has_suffix_p (idesc
->name
, ".orcm")
9014 || has_suffix_p (idesc
->name
, ".or"))
9016 clear_qp_mutex (p1mask
| p2mask
);
9017 clear_qp_implies (p1mask
| p2mask
, 0);
9021 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9022 if (has_suffix_p (idesc
->name
, ".unc"))
9024 add_qp_mutex (p1mask
| p2mask
);
9025 if (CURR_SLOT
.qp_regno
!= 0)
9027 add_qp_imply (CURR_SLOT
.opnd
[0].X_add_number
- REG_P
,
9028 CURR_SLOT
.qp_regno
);
9029 add_qp_imply (CURR_SLOT
.opnd
[1].X_add_number
- REG_P
,
9030 CURR_SLOT
.qp_regno
);
9033 else if (CURR_SLOT
.qp_regno
== 0)
9035 add_qp_mutex (p1mask
| p2mask
);
9039 clear_qp_mutex (p1mask
| p2mask
);
9043 /* Look for mov imm insns into GRs. */
9044 else if (idesc
->operands
[0] == IA64_OPND_R1
9045 && (idesc
->operands
[1] == IA64_OPND_IMM22
9046 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9047 && (strcmp (idesc
->name
, "mov") == 0
9048 || strcmp (idesc
->name
, "movl") == 0))
9050 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9051 if (regno
> 0 && regno
< NELEMS (gr_values
))
9053 gr_values
[regno
].known
= 1;
9054 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9055 gr_values
[regno
].path
= md
.path
;
9058 fprintf (stderr
, " Know gr%d = ", regno
);
9059 fprintf_vma (stderr
, gr_values
[regno
].value
);
9060 fputs ("\n", stderr
);
9066 clear_qp_mutex (qp_changemask
);
9067 clear_qp_implies (qp_changemask
, qp_changemask
);
9071 /* Return whether the given predicate registers are currently mutex. */
9074 qp_mutex (p1
, p2
, path
)
9084 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9085 for (i
= 0; i
< qp_mutexeslen
; i
++)
9087 if (qp_mutexes
[i
].path
>= path
9088 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9095 /* Return whether the given resource is in the given insn's list of chks
9096 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9100 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9102 struct ia64_opcode
*idesc
;
9107 struct rsrc specs
[MAX_SPECS
];
9110 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9111 we don't need to check. One exception is note 11, which indicates that
9112 target predicates are written regardless of PR[qp]. */
9113 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9117 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9120 /* UNAT checking is a bit more specific than other resources */
9121 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9122 && specs
[count
].mem_offset
.hint
9123 && rs
->mem_offset
.hint
)
9125 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9127 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9128 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9135 /* Skip apparent PR write conflicts where both writes are an AND or both
9136 writes are an OR. */
9137 if (rs
->dependency
->specifier
== IA64_RS_PR
9138 || rs
->dependency
->specifier
== IA64_RS_PRr
9139 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9141 if (specs
[count
].cmp_type
!= CMP_NONE
9142 && specs
[count
].cmp_type
== rs
->cmp_type
)
9145 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
9146 dv_mode
[rs
->dependency
->mode
],
9147 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9148 specs
[count
].index
: 63);
9153 " %s on parallel compare conflict %s vs %s on PR%d\n",
9154 dv_mode
[rs
->dependency
->mode
],
9155 dv_cmp_type
[rs
->cmp_type
],
9156 dv_cmp_type
[specs
[count
].cmp_type
],
9157 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9158 specs
[count
].index
: 63);
9162 /* If either resource is not specific, conservatively assume a conflict
9164 if (!specs
[count
].specific
|| !rs
->specific
)
9166 else if (specs
[count
].index
== rs
->index
)
9171 fprintf (stderr
, " No %s conflicts\n", rs
->dependency
->name
);
9177 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9178 insert a stop to create the break. Update all resource dependencies
9179 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9180 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9181 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9185 insn_group_break (insert_stop
, qp_regno
, save_current
)
9192 if (insert_stop
&& md
.num_slots_in_use
> 0)
9193 PREV_SLOT
.end_of_insn_group
= 1;
9197 fprintf (stderr
, " Insn group break%s",
9198 (insert_stop
? " (w/stop)" : ""));
9200 fprintf (stderr
, " effective for QP=%d", qp_regno
);
9201 fprintf (stderr
, "\n");
9205 while (i
< regdepslen
)
9207 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
9210 && regdeps
[i
].qp_regno
!= qp_regno
)
9217 && CURR_SLOT
.src_file
== regdeps
[i
].file
9218 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
9224 /* clear dependencies which are automatically cleared by a stop, or
9225 those that have reached the appropriate state of insn serialization */
9226 if (dep
->semantics
== IA64_DVS_IMPLIED
9227 || dep
->semantics
== IA64_DVS_IMPLIEDF
9228 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
9230 print_dependency ("Removing", i
);
9231 regdeps
[i
] = regdeps
[--regdepslen
];
9235 if (dep
->semantics
== IA64_DVS_DATA
9236 || dep
->semantics
== IA64_DVS_INSTR
9237 || dep
->semantics
== IA64_DVS_SPECIFIC
)
9239 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
9240 regdeps
[i
].insn_srlz
= STATE_STOP
;
9241 if (regdeps
[i
].data_srlz
== STATE_NONE
)
9242 regdeps
[i
].data_srlz
= STATE_STOP
;
9249 /* Add the given resource usage spec to the list of active dependencies. */
9252 mark_resource (idesc
, dep
, spec
, depind
, path
)
9253 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
9254 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
9259 if (regdepslen
== regdepstotlen
)
9261 regdepstotlen
+= 20;
9262 regdeps
= (struct rsrc
*)
9263 xrealloc ((void *) regdeps
,
9264 regdepstotlen
* sizeof (struct rsrc
));
9267 regdeps
[regdepslen
] = *spec
;
9268 regdeps
[regdepslen
].depind
= depind
;
9269 regdeps
[regdepslen
].path
= path
;
9270 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
9271 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
9273 print_dependency ("Adding", regdepslen
);
9279 print_dependency (action
, depind
)
9285 fprintf (stderr
, " %s %s '%s'",
9286 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
9287 (regdeps
[depind
].dependency
)->name
);
9288 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
!= 0)
9289 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
9290 if (regdeps
[depind
].mem_offset
.hint
)
9292 fputs (" ", stderr
);
9293 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
9294 fputs ("+", stderr
);
9295 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
9297 fprintf (stderr
, "\n");
9302 instruction_serialization ()
9306 fprintf (stderr
, " Instruction serialization\n");
9307 for (i
= 0; i
< regdepslen
; i
++)
9308 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
9309 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
9313 data_serialization ()
9317 fprintf (stderr
, " Data serialization\n");
9318 while (i
< regdepslen
)
9320 if (regdeps
[i
].data_srlz
== STATE_STOP
9321 /* Note: as of 991210, all "other" dependencies are cleared by a
9322 data serialization. This might change with new tables */
9323 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
9325 print_dependency ("Removing", i
);
9326 regdeps
[i
] = regdeps
[--regdepslen
];
9333 /* Insert stops and serializations as needed to avoid DVs. */
9336 remove_marked_resource (rs
)
9339 switch (rs
->dependency
->semantics
)
9341 case IA64_DVS_SPECIFIC
:
9343 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
9344 /* ...fall through... */
9345 case IA64_DVS_INSTR
:
9347 fprintf (stderr
, "Inserting instr serialization\n");
9348 if (rs
->insn_srlz
< STATE_STOP
)
9349 insn_group_break (1, 0, 0);
9350 if (rs
->insn_srlz
< STATE_SRLZ
)
9352 int oldqp
= CURR_SLOT
.qp_regno
;
9353 struct ia64_opcode
*oldidesc
= CURR_SLOT
.idesc
;
9354 /* Manually jam a srlz.i insn into the stream */
9355 CURR_SLOT
.qp_regno
= 0;
9356 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
9357 instruction_serialization ();
9358 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9359 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9361 CURR_SLOT
.qp_regno
= oldqp
;
9362 CURR_SLOT
.idesc
= oldidesc
;
9364 insn_group_break (1, 0, 0);
9366 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
9367 "other" types of DV are eliminated
9368 by a data serialization */
9371 fprintf (stderr
, "Inserting data serialization\n");
9372 if (rs
->data_srlz
< STATE_STOP
)
9373 insn_group_break (1, 0, 0);
9375 int oldqp
= CURR_SLOT
.qp_regno
;
9376 struct ia64_opcode
*oldidesc
= CURR_SLOT
.idesc
;
9377 /* Manually jam a srlz.d insn into the stream */
9378 CURR_SLOT
.qp_regno
= 0;
9379 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
9380 data_serialization ();
9381 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9382 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9384 CURR_SLOT
.qp_regno
= oldqp
;
9385 CURR_SLOT
.idesc
= oldidesc
;
9388 case IA64_DVS_IMPLIED
:
9389 case IA64_DVS_IMPLIEDF
:
9391 fprintf (stderr
, "Inserting stop\n");
9392 insn_group_break (1, 0, 0);
9399 /* Check the resources used by the given opcode against the current dependency
9402 The check is run once for each execution path encountered. In this case,
9403 a unique execution path is the sequence of instructions following a code
9404 entry point, e.g. the following has three execution paths, one starting
9405 at L0, one at L1, and one at L2.
9414 check_dependencies (idesc
)
9415 struct ia64_opcode
*idesc
;
9417 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9421 /* Note that the number of marked resources may change within the
9422 loop if in auto mode. */
9424 while (i
< regdepslen
)
9426 struct rsrc
*rs
= ®deps
[i
];
9427 const struct ia64_dependency
*dep
= rs
->dependency
;
9432 if (dep
->semantics
== IA64_DVS_NONE
9433 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
9439 note
= NOTE (opdeps
->chks
[chkind
]);
9441 /* Check this resource against each execution path seen thus far. */
9442 for (path
= 0; path
<= md
.path
; path
++)
9446 /* If the dependency wasn't on the path being checked, ignore it. */
9447 if (rs
->path
< path
)
9450 /* If the QP for this insn implies a QP which has branched, don't
9451 bother checking. Ed. NOTE: I don't think this check is terribly
9452 useful; what's the point of generating code which will only be
9453 reached if its QP is zero?
9454 This code was specifically inserted to handle the following code,
9455 based on notes from Intel's DV checking code, where p1 implies p2.
9461 if (CURR_SLOT
.qp_regno
!= 0)
9465 for (implies
= 0; implies
< qp_implieslen
; implies
++)
9467 if (qp_implies
[implies
].path
>= path
9468 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
9469 && qp_implies
[implies
].p2_branched
)
9479 if ((matchtype
= resources_match (rs
, idesc
, note
,
9480 CURR_SLOT
.qp_regno
, path
)) != 0)
9483 char pathmsg
[256] = "";
9484 char indexmsg
[256] = "";
9485 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
9488 sprintf (pathmsg
, " when entry is at label '%s'",
9489 md
.entry_labels
[path
- 1]);
9490 if (rs
->specific
&& rs
->index
!= 0)
9491 sprintf (indexmsg
, ", specific resource number is %d",
9493 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9495 (certain
? "violates" : "may violate"),
9496 dv_mode
[dep
->mode
], dep
->name
,
9497 dv_sem
[dep
->semantics
],
9500 if (md
.explicit_mode
)
9502 as_warn ("%s", msg
);
9504 as_warn (_("Only the first path encountering the conflict "
9506 as_warn_where (rs
->file
, rs
->line
,
9507 _("This is the location of the "
9508 "conflicting usage"));
9509 /* Don't bother checking other paths, to avoid duplicating
9516 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
9518 remove_marked_resource (rs
);
9520 /* since the set of dependencies has changed, start over */
9521 /* FIXME -- since we're removing dvs as we go, we
9522 probably don't really need to start over... */
9535 /* Register new dependencies based on the given opcode. */
9538 mark_resources (idesc
)
9539 struct ia64_opcode
*idesc
;
9542 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9543 int add_only_qp_reads
= 0;
9545 /* A conditional branch only uses its resources if it is taken; if it is
9546 taken, we stop following that path. The other branch types effectively
9547 *always* write their resources. If it's not taken, register only QP
9549 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
9551 add_only_qp_reads
= 1;
9555 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
9557 for (i
= 0; i
< opdeps
->nregs
; i
++)
9559 const struct ia64_dependency
*dep
;
9560 struct rsrc specs
[MAX_SPECS
];
9565 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
9566 note
= NOTE (opdeps
->regs
[i
]);
9568 if (add_only_qp_reads
9569 && !(dep
->mode
== IA64_DV_WAR
9570 && (dep
->specifier
== IA64_RS_PR
9571 || dep
->specifier
== IA64_RS_PRr
9572 || dep
->specifier
== IA64_RS_PR63
)))
9575 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
9578 if (md
.debug_dv
&& !count
)
9579 fprintf (stderr
, " No %s %s usage found (path %d)\n",
9580 dv_mode
[dep
->mode
], dep
->name
, md
.path
);
9585 mark_resource (idesc
, dep
, &specs
[count
],
9586 DEP (opdeps
->regs
[i
]), md
.path
);
9589 /* The execution path may affect register values, which may in turn
9590 affect which indirect-access resources are accessed. */
9591 switch (dep
->specifier
)
9603 for (path
= 0; path
< md
.path
; path
++)
9605 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
9607 mark_resource (idesc
, dep
, &specs
[count
],
9608 DEP (opdeps
->regs
[i
]), path
);
9615 /* Remove dependencies when they no longer apply. */
9618 update_dependencies (idesc
)
9619 struct ia64_opcode
*idesc
;
9623 if (strcmp (idesc
->name
, "srlz.i") == 0)
9625 instruction_serialization ();
9627 else if (strcmp (idesc
->name
, "srlz.d") == 0)
9629 data_serialization ();
9631 else if (is_interruption_or_rfi (idesc
)
9632 || is_taken_branch (idesc
))
9634 /* Although technically the taken branch doesn't clear dependencies
9635 which require a srlz.[id], we don't follow the branch; the next
9636 instruction is assumed to start with a clean slate. */
9640 else if (is_conditional_branch (idesc
)
9641 && CURR_SLOT
.qp_regno
!= 0)
9643 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
9645 for (i
= 0; i
< qp_implieslen
; i
++)
9647 /* If the conditional branch's predicate is implied by the predicate
9648 in an existing dependency, remove that dependency. */
9649 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
9652 /* Note that this implied predicate takes a branch so that if
9653 a later insn generates a DV but its predicate implies this
9654 one, we can avoid the false DV warning. */
9655 qp_implies
[i
].p2_branched
= 1;
9656 while (depind
< regdepslen
)
9658 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
9660 print_dependency ("Removing", depind
);
9661 regdeps
[depind
] = regdeps
[--regdepslen
];
9668 /* Any marked resources which have this same predicate should be
9669 cleared, provided that the QP hasn't been modified between the
9670 marking instruction and the branch. */
9673 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
9678 while (i
< regdepslen
)
9680 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
9681 && regdeps
[i
].link_to_qp_branch
9682 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
9683 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
9685 /* Treat like a taken branch */
9686 print_dependency ("Removing", i
);
9687 regdeps
[i
] = regdeps
[--regdepslen
];
9696 /* Examine the current instruction for dependency violations. */
9700 struct ia64_opcode
*idesc
;
9704 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
9705 idesc
->name
, CURR_SLOT
.src_line
,
9706 idesc
->dependencies
->nchks
,
9707 idesc
->dependencies
->nregs
);
9710 /* Look through the list of currently marked resources; if the current
9711 instruction has the dependency in its chks list which uses that resource,
9712 check against the specific resources used. */
9713 check_dependencies (idesc
);
9715 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9716 then add them to the list of marked resources. */
9717 mark_resources (idesc
);
9719 /* There are several types of dependency semantics, and each has its own
9720 requirements for being cleared
9722 Instruction serialization (insns separated by interruption, rfi, or
9723 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9725 Data serialization (instruction serialization, or writer + srlz.d +
9726 reader, where writer and srlz.d are in separate groups) clears
9727 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9728 always be the case).
9730 Instruction group break (groups separated by stop, taken branch,
9731 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9733 update_dependencies (idesc
);
9735 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9736 warning. Keep track of as many as possible that are useful. */
9737 note_register_values (idesc
);
9739 /* We don't need or want this anymore. */
9740 md
.mem_offset
.hint
= 0;
9745 /* Translate one line of assembly. Pseudo ops and labels do not show
9751 char *saved_input_line_pointer
, *mnemonic
;
9752 const struct pseudo_opcode
*pdesc
;
9753 struct ia64_opcode
*idesc
;
9754 unsigned char qp_regno
;
9758 saved_input_line_pointer
= input_line_pointer
;
9759 input_line_pointer
= str
;
9761 /* extract the opcode (mnemonic): */
9763 mnemonic
= input_line_pointer
;
9764 ch
= get_symbol_end ();
9765 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
9768 *input_line_pointer
= ch
;
9769 (*pdesc
->handler
) (pdesc
->arg
);
9773 /* Find the instruction descriptor matching the arguments. */
9775 idesc
= ia64_find_opcode (mnemonic
);
9776 *input_line_pointer
= ch
;
9779 as_bad ("Unknown opcode `%s'", mnemonic
);
9783 idesc
= parse_operands (idesc
);
9787 /* Handle the dynamic ops we can handle now: */
9788 if (idesc
->type
== IA64_TYPE_DYN
)
9790 if (strcmp (idesc
->name
, "add") == 0)
9792 if (CURR_SLOT
.opnd
[2].X_op
== O_register
9793 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
9797 ia64_free_opcode (idesc
);
9798 idesc
= ia64_find_opcode (mnemonic
);
9800 know (!idesc
->next
);
9803 else if (strcmp (idesc
->name
, "mov") == 0)
9805 enum ia64_opnd opnd1
, opnd2
;
9808 opnd1
= idesc
->operands
[0];
9809 opnd2
= idesc
->operands
[1];
9810 if (opnd1
== IA64_OPND_AR3
)
9812 else if (opnd2
== IA64_OPND_AR3
)
9816 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
9817 && ar_is_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
9821 ia64_free_opcode (idesc
);
9822 idesc
= ia64_find_opcode (mnemonic
);
9823 while (idesc
!= NULL
9824 && (idesc
->operands
[0] != opnd1
9825 || idesc
->operands
[1] != opnd2
))
9826 idesc
= get_next_opcode (idesc
);
9831 if (md
.qp
.X_op
== O_register
)
9833 qp_regno
= md
.qp
.X_add_number
- REG_P
;
9834 md
.qp
.X_op
= O_absent
;
9837 flags
= idesc
->flags
;
9839 if ((flags
& IA64_OPCODE_FIRST
) != 0)
9840 insn_group_break (1, 0, 0);
9842 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
9844 as_bad ("`%s' cannot be predicated", idesc
->name
);
9848 /* Build the instruction. */
9849 CURR_SLOT
.qp_regno
= qp_regno
;
9850 CURR_SLOT
.idesc
= idesc
;
9851 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
9852 dwarf2_where (&CURR_SLOT
.debug_line
);
9854 /* Add unwind entry, if there is one. */
9855 if (unwind
.current_entry
)
9857 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
9858 unwind
.current_entry
= NULL
;
9861 /* Check for dependency violations. */
9865 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9866 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9869 if ((flags
& IA64_OPCODE_LAST
) != 0)
9870 insn_group_break (1, 0, 0);
9872 md
.last_text_seg
= now_seg
;
9875 input_line_pointer
= saved_input_line_pointer
;
9878 /* Called when symbol NAME cannot be found in the symbol table.
9879 Should be used for dynamic valued symbols only. */
9882 md_undefined_symbol (name
)
9883 char *name ATTRIBUTE_UNUSED
;
9888 /* Called for any expression that can not be recognized. When the
9889 function is called, `input_line_pointer' will point to the start of
9896 enum pseudo_type pseudo_type
;
9901 switch (*input_line_pointer
)
9904 /* Find what relocation pseudo-function we're dealing with. */
9906 ch
= *++input_line_pointer
;
9907 for (i
= 0; i
< NELEMS (pseudo_func
); ++i
)
9908 if (pseudo_func
[i
].name
&& pseudo_func
[i
].name
[0] == ch
)
9910 len
= strlen (pseudo_func
[i
].name
);
9911 if (strncmp (pseudo_func
[i
].name
+ 1,
9912 input_line_pointer
+ 1, len
- 1) == 0
9913 && !is_part_of_name (input_line_pointer
[len
]))
9915 input_line_pointer
+= len
;
9916 pseudo_type
= pseudo_func
[i
].type
;
9920 switch (pseudo_type
)
9922 case PSEUDO_FUNC_RELOC
:
9924 if (*input_line_pointer
!= '(')
9926 as_bad ("Expected '('");
9930 ++input_line_pointer
;
9932 if (*input_line_pointer
++ != ')')
9934 as_bad ("Missing ')'");
9937 if (e
->X_op
!= O_symbol
)
9939 if (e
->X_op
!= O_pseudo_fixup
)
9941 as_bad ("Not a symbolic expression");
9944 if (i
!= FUNC_LT_RELATIVE
)
9946 as_bad ("Illegal combination of relocation functions");
9949 switch (S_GET_VALUE (e
->X_op_symbol
))
9951 case FUNC_FPTR_RELATIVE
:
9952 i
= FUNC_LT_FPTR_RELATIVE
; break;
9953 case FUNC_DTP_MODULE
:
9954 i
= FUNC_LT_DTP_MODULE
; break;
9955 case FUNC_DTP_RELATIVE
:
9956 i
= FUNC_LT_DTP_RELATIVE
; break;
9957 case FUNC_TP_RELATIVE
:
9958 i
= FUNC_LT_TP_RELATIVE
; break;
9960 as_bad ("Illegal combination of relocation functions");
9964 /* Make sure gas doesn't get rid of local symbols that are used
9966 e
->X_op
= O_pseudo_fixup
;
9967 e
->X_op_symbol
= pseudo_func
[i
].u
.sym
;
9970 case PSEUDO_FUNC_CONST
:
9971 e
->X_op
= O_constant
;
9972 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
9975 case PSEUDO_FUNC_REG
:
9976 e
->X_op
= O_register
;
9977 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
9981 name
= input_line_pointer
- 1;
9983 as_bad ("Unknown pseudo function `%s'", name
);
9989 ++input_line_pointer
;
9991 if (*input_line_pointer
!= ']')
9993 as_bad ("Closing bracket misssing");
9998 if (e
->X_op
!= O_register
)
9999 as_bad ("Register expected as index");
10001 ++input_line_pointer
;
10012 ignore_rest_of_line ();
10015 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10016 a section symbol plus some offset. For relocs involving @fptr(),
10017 directives we don't want such adjustments since we need to have the
10018 original symbol's name in the reloc. */
10020 ia64_fix_adjustable (fix
)
10023 /* Prevent all adjustments to global symbols */
10024 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10027 switch (fix
->fx_r_type
)
10029 case BFD_RELOC_IA64_FPTR64I
:
10030 case BFD_RELOC_IA64_FPTR32MSB
:
10031 case BFD_RELOC_IA64_FPTR32LSB
:
10032 case BFD_RELOC_IA64_FPTR64MSB
:
10033 case BFD_RELOC_IA64_FPTR64LSB
:
10034 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10035 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10045 ia64_force_relocation (fix
)
10048 switch (fix
->fx_r_type
)
10050 case BFD_RELOC_IA64_FPTR64I
:
10051 case BFD_RELOC_IA64_FPTR32MSB
:
10052 case BFD_RELOC_IA64_FPTR32LSB
:
10053 case BFD_RELOC_IA64_FPTR64MSB
:
10054 case BFD_RELOC_IA64_FPTR64LSB
:
10056 case BFD_RELOC_IA64_LTOFF22
:
10057 case BFD_RELOC_IA64_LTOFF64I
:
10058 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10059 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10060 case BFD_RELOC_IA64_PLTOFF22
:
10061 case BFD_RELOC_IA64_PLTOFF64I
:
10062 case BFD_RELOC_IA64_PLTOFF64MSB
:
10063 case BFD_RELOC_IA64_PLTOFF64LSB
:
10065 case BFD_RELOC_IA64_LTOFF22X
:
10066 case BFD_RELOC_IA64_LDXMOV
:
10073 return generic_force_reloc (fix
);
10076 /* Decide from what point a pc-relative relocation is relative to,
10077 relative to the pc-relative fixup. Er, relatively speaking. */
10079 ia64_pcrel_from_section (fix
, sec
)
10083 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10085 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10092 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10094 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10098 expr
.X_op
= O_pseudo_fixup
;
10099 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10100 expr
.X_add_number
= 0;
10101 expr
.X_add_symbol
= symbol
;
10102 emit_expr (&expr
, size
);
10105 /* This is called whenever some data item (not an instruction) needs a
10106 fixup. We pick the right reloc code depending on the byteorder
10107 currently in effect. */
10109 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10115 bfd_reloc_code_real_type code
;
10120 /* There are no reloc for 8 and 16 bit quantities, but we allow
10121 them here since they will work fine as long as the expression
10122 is fully defined at the end of the pass over the source file. */
10123 case 1: code
= BFD_RELOC_8
; break;
10124 case 2: code
= BFD_RELOC_16
; break;
10126 if (target_big_endian
)
10127 code
= BFD_RELOC_IA64_DIR32MSB
;
10129 code
= BFD_RELOC_IA64_DIR32LSB
;
10133 /* In 32-bit mode, data8 could mean function descriptors too. */
10134 if (exp
->X_op
== O_pseudo_fixup
10135 && exp
->X_op_symbol
10136 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10137 && !(md
.flags
& EF_IA_64_ABI64
))
10139 if (target_big_endian
)
10140 code
= BFD_RELOC_IA64_IPLTMSB
;
10142 code
= BFD_RELOC_IA64_IPLTLSB
;
10143 exp
->X_op
= O_symbol
;
10148 if (target_big_endian
)
10149 code
= BFD_RELOC_IA64_DIR64MSB
;
10151 code
= BFD_RELOC_IA64_DIR64LSB
;
10156 if (exp
->X_op
== O_pseudo_fixup
10157 && exp
->X_op_symbol
10158 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10160 if (target_big_endian
)
10161 code
= BFD_RELOC_IA64_IPLTMSB
;
10163 code
= BFD_RELOC_IA64_IPLTLSB
;
10164 exp
->X_op
= O_symbol
;
10170 as_bad ("Unsupported fixup size %d", nbytes
);
10171 ignore_rest_of_line ();
10175 if (exp
->X_op
== O_pseudo_fixup
)
10177 exp
->X_op
= O_symbol
;
10178 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
10179 /* ??? If code unchanged, unsupported. */
10182 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
10183 /* We need to store the byte order in effect in case we're going
10184 to fix an 8 or 16 bit relocation (for which there no real
10185 relocs available). See md_apply_fix3(). */
10186 fix
->tc_fix_data
.bigendian
= target_big_endian
;
10189 /* Return the actual relocation we wish to associate with the pseudo
10190 reloc described by SYM and R_TYPE. SYM should be one of the
10191 symbols in the pseudo_func array, or NULL. */
10193 static bfd_reloc_code_real_type
10194 ia64_gen_real_reloc_type (sym
, r_type
)
10195 struct symbol
*sym
;
10196 bfd_reloc_code_real_type r_type
;
10198 bfd_reloc_code_real_type
new = 0;
10205 switch (S_GET_VALUE (sym
))
10207 case FUNC_FPTR_RELATIVE
:
10210 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
10211 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
10212 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
10213 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
10214 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
10219 case FUNC_GP_RELATIVE
:
10222 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
10223 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
10224 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
10225 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
10226 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
10227 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
10232 case FUNC_LT_RELATIVE
:
10235 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
10236 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
10241 case FUNC_LT_RELATIVE_X
:
10244 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
10249 case FUNC_PC_RELATIVE
:
10252 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
10253 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
10254 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
10255 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
10256 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
10257 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
10262 case FUNC_PLT_RELATIVE
:
10265 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
10266 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
10267 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
10268 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
10273 case FUNC_SEC_RELATIVE
:
10276 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
10277 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
10278 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
10279 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
10284 case FUNC_SEG_RELATIVE
:
10287 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
10288 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
10289 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
10290 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
10295 case FUNC_LTV_RELATIVE
:
10298 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
10299 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
10300 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
10301 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
10306 case FUNC_LT_FPTR_RELATIVE
:
10309 case BFD_RELOC_IA64_IMM22
:
10310 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
10311 case BFD_RELOC_IA64_IMM64
:
10312 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
10318 case FUNC_TP_RELATIVE
:
10321 case BFD_RELOC_IA64_IMM14
:
10322 new = BFD_RELOC_IA64_TPREL14
; break;
10323 case BFD_RELOC_IA64_IMM22
:
10324 new = BFD_RELOC_IA64_TPREL22
; break;
10325 case BFD_RELOC_IA64_IMM64
:
10326 new = BFD_RELOC_IA64_TPREL64I
; break;
10332 case FUNC_LT_TP_RELATIVE
:
10335 case BFD_RELOC_IA64_IMM22
:
10336 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
10342 case FUNC_LT_DTP_MODULE
:
10345 case BFD_RELOC_IA64_IMM22
:
10346 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
10352 case FUNC_DTP_RELATIVE
:
10355 case BFD_RELOC_IA64_DIR64MSB
:
10356 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
10357 case BFD_RELOC_IA64_DIR64LSB
:
10358 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
10359 case BFD_RELOC_IA64_IMM14
:
10360 new = BFD_RELOC_IA64_DTPREL14
; break;
10361 case BFD_RELOC_IA64_IMM22
:
10362 new = BFD_RELOC_IA64_DTPREL22
; break;
10363 case BFD_RELOC_IA64_IMM64
:
10364 new = BFD_RELOC_IA64_DTPREL64I
; break;
10370 case FUNC_LT_DTP_RELATIVE
:
10373 case BFD_RELOC_IA64_IMM22
:
10374 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
10380 case FUNC_IPLT_RELOC
:
10387 /* Hmmmm. Should this ever occur? */
10394 /* Here is where generate the appropriate reloc for pseudo relocation
10397 ia64_validate_fix (fix
)
10400 switch (fix
->fx_r_type
)
10402 case BFD_RELOC_IA64_FPTR64I
:
10403 case BFD_RELOC_IA64_FPTR32MSB
:
10404 case BFD_RELOC_IA64_FPTR64LSB
:
10405 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10406 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10407 if (fix
->fx_offset
!= 0)
10408 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10409 "No addend allowed in @fptr() relocation");
10419 fix_insn (fix
, odesc
, value
)
10421 const struct ia64_operand
*odesc
;
10424 bfd_vma insn
[3], t0
, t1
, control_bits
;
10429 slot
= fix
->fx_where
& 0x3;
10430 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
10432 /* Bundles are always in little-endian byte order */
10433 t0
= bfd_getl64 (fixpos
);
10434 t1
= bfd_getl64 (fixpos
+ 8);
10435 control_bits
= t0
& 0x1f;
10436 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
10437 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
10438 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
10441 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
10443 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
10444 insn
[2] |= (((value
& 0x7f) << 13)
10445 | (((value
>> 7) & 0x1ff) << 27)
10446 | (((value
>> 16) & 0x1f) << 22)
10447 | (((value
>> 21) & 0x1) << 21)
10448 | (((value
>> 63) & 0x1) << 36));
10450 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
10452 if (value
& ~0x3fffffffffffffffULL
)
10453 err
= "integer operand out of range";
10454 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
10455 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
10457 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
10460 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
10461 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
10462 | (((value
>> 0) & 0xfffff) << 13));
10465 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
10468 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
10470 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
10471 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
10472 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
10473 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
10476 /* Attempt to simplify or even eliminate a fixup. The return value is
10477 ignored; perhaps it was once meaningful, but now it is historical.
10478 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10480 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10484 md_apply_fix3 (fix
, valP
, seg
)
10487 segT seg ATTRIBUTE_UNUSED
;
10490 valueT value
= *valP
;
10492 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
10496 switch (fix
->fx_r_type
)
10498 case BFD_RELOC_IA64_DIR32MSB
:
10499 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32MSB
;
10502 case BFD_RELOC_IA64_DIR32LSB
:
10503 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32LSB
;
10506 case BFD_RELOC_IA64_DIR64MSB
:
10507 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64MSB
;
10510 case BFD_RELOC_IA64_DIR64LSB
:
10511 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64LSB
;
10520 switch (fix
->fx_r_type
)
10522 case BFD_RELOC_UNUSED
:
10523 /* This must be a TAG13 or TAG13b operand. There are no external
10524 relocs defined for them, so we must give an error. */
10525 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10526 "%s must have a constant value",
10527 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
10531 case BFD_RELOC_IA64_TPREL14
:
10532 case BFD_RELOC_IA64_TPREL22
:
10533 case BFD_RELOC_IA64_TPREL64I
:
10534 case BFD_RELOC_IA64_LTOFF_TPREL22
:
10535 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
10536 case BFD_RELOC_IA64_DTPREL14
:
10537 case BFD_RELOC_IA64_DTPREL22
:
10538 case BFD_RELOC_IA64_DTPREL64I
:
10539 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
10540 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
10547 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
10549 if (fix
->tc_fix_data
.bigendian
)
10550 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
10552 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
10557 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
10562 /* Generate the BFD reloc to be stuck in the object file from the
10563 fixup used internally in the assembler. */
10566 tc_gen_reloc (sec
, fixp
)
10567 asection
*sec ATTRIBUTE_UNUSED
;
10572 reloc
= xmalloc (sizeof (*reloc
));
10573 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
10574 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
10575 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
10576 reloc
->addend
= fixp
->fx_offset
;
10577 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
10581 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
10582 "Cannot represent %s relocation in object file",
10583 bfd_get_reloc_code_name (fixp
->fx_r_type
));
10588 /* Turn a string in input_line_pointer into a floating point constant
10589 of type TYPE, and store the appropriate bytes in *LIT. The number
10590 of LITTLENUMS emitted is stored in *SIZE. An error message is
10591 returned, or NULL on OK. */
10593 #define MAX_LITTLENUMS 5
10596 md_atof (type
, lit
, size
)
10601 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
10631 return "Bad call to MD_ATOF()";
10633 t
= atof_ieee (input_line_pointer
, type
, words
);
10635 input_line_pointer
= t
;
10637 (*ia64_float_to_chars
) (lit
, words
, prec
);
10641 /* It is 10 byte floating point with 6 byte padding. */
10642 memset (&lit
[10], 0, 6);
10643 *size
= 8 * sizeof (LITTLENUM_TYPE
);
10646 *size
= prec
* sizeof (LITTLENUM_TYPE
);
10651 /* Handle ia64 specific semantics of the align directive. */
10654 ia64_md_do_align (n
, fill
, len
, max
)
10655 int n ATTRIBUTE_UNUSED
;
10656 const char *fill ATTRIBUTE_UNUSED
;
10657 int len ATTRIBUTE_UNUSED
;
10658 int max ATTRIBUTE_UNUSED
;
10660 if (subseg_text_p (now_seg
))
10661 ia64_flush_insns ();
10664 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10665 of an rs_align_code fragment. */
10668 ia64_handle_align (fragp
)
10671 /* Use mfi bundle of nops with no stop bits. */
10672 static const unsigned char be_nop
[]
10673 = { 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
10674 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0c};
10675 static const unsigned char le_nop
[]
10676 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10677 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10682 if (fragp
->fr_type
!= rs_align_code
)
10685 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
10686 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
10688 /* Make sure we are on a 16-byte boundary, in case someone has been
10689 putting data into a text section. */
10692 int fix
= bytes
& 15;
10693 memset (p
, 0, fix
);
10696 fragp
->fr_fix
+= fix
;
10699 memcpy (p
, (target_big_endian
? be_nop
: le_nop
), 16);
10700 fragp
->fr_var
= 16;
10704 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
10709 number_to_chars_bigendian (lit
, (long) (*words
++),
10710 sizeof (LITTLENUM_TYPE
));
10711 lit
+= sizeof (LITTLENUM_TYPE
);
10716 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
10721 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
10722 sizeof (LITTLENUM_TYPE
));
10723 lit
+= sizeof (LITTLENUM_TYPE
);
10728 ia64_elf_section_change_hook (void)
10730 dot_byteorder (-1);
10733 /* Check if a label should be made global. */
10735 ia64_check_label (symbolS
*label
)
10737 if (*input_line_pointer
== ':')
10739 S_SET_EXTERNAL (label
);
10740 input_line_pointer
++;
10744 /* Used to remember where .alias and .secalias directives are seen. We
10745 will rename symbol and section names when we are about to output
10746 the relocatable file. */
10749 char *file
; /* The file where the directive is seen. */
10750 unsigned int line
; /* The line number the directive is at. */
10751 const char *name
; /* The orignale name of the symbol. */
10754 /* Called for .alias and .secalias directives. If SECTION is 1, it is
10755 .secalias. Otherwise, it is .alias. */
10757 dot_alias (int section
)
10759 char *name
, *alias
;
10763 const char *error_string
;
10766 struct hash_control
*ahash
, *nhash
;
10769 name
= input_line_pointer
;
10770 delim
= get_symbol_end ();
10771 end_name
= input_line_pointer
;
10774 if (name
== end_name
)
10776 as_bad (_("expected symbol name"));
10777 discard_rest_of_line ();
10781 SKIP_WHITESPACE ();
10783 if (*input_line_pointer
!= ',')
10786 as_bad (_("expected comma after \"%s\""), name
);
10788 ignore_rest_of_line ();
10792 input_line_pointer
++;
10795 /* We call demand_copy_C_string to check if alias string is valid.
10796 There should be a closing `"' and no `\0' in the string. */
10797 alias
= demand_copy_C_string (&len
);
10800 ignore_rest_of_line ();
10804 /* Make a copy of name string. */
10805 len
= strlen (name
) + 1;
10806 obstack_grow (¬es
, name
, len
);
10807 name
= obstack_finish (¬es
);
10812 ahash
= secalias_hash
;
10813 nhash
= secalias_name_hash
;
10818 ahash
= alias_hash
;
10819 nhash
= alias_name_hash
;
10822 /* Check if alias has been used before. */
10823 h
= (struct alias
*) hash_find (ahash
, alias
);
10826 if (strcmp (h
->name
, name
))
10827 as_bad (_("`%s' is already the alias of %s `%s'"),
10828 alias
, kind
, h
->name
);
10832 /* Check if name already has an alias. */
10833 a
= (const char *) hash_find (nhash
, name
);
10836 if (strcmp (a
, alias
))
10837 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
10841 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
10842 as_where (&h
->file
, &h
->line
);
10845 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
10848 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
10849 alias
, kind
, error_string
);
10853 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
10856 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
10857 alias
, kind
, error_string
);
10859 obstack_free (¬es
, name
);
10860 obstack_free (¬es
, alias
);
10863 demand_empty_rest_of_line ();
10866 /* It renames the original symbol name to its alias. */
10868 do_alias (const char *alias
, PTR value
)
10870 struct alias
*h
= (struct alias
*) value
;
10871 symbolS
*sym
= symbol_find (h
->name
);
10874 as_warn_where (h
->file
, h
->line
,
10875 _("symbol `%s' aliased to `%s' is not used"),
10878 S_SET_NAME (sym
, (char *) alias
);
10881 /* Called from write_object_file. */
10883 ia64_adjust_symtab (void)
10885 hash_traverse (alias_hash
, do_alias
);
10888 /* It renames the original section name to its alias. */
10890 do_secalias (const char *alias
, PTR value
)
10892 struct alias
*h
= (struct alias
*) value
;
10893 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
10896 as_warn_where (h
->file
, h
->line
,
10897 _("section `%s' aliased to `%s' is not used"),
10903 /* Called from write_object_file. */
10905 ia64_frob_file (void)
10907 hash_traverse (secalias_hash
, do_secalias
);