1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
54 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55 #define MIN(a,b) ((a) < (b) ? (a) : (b))
58 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59 #define CURR_SLOT md.slot[md.curr_slot]
61 #define O_pseudo_fixup (O_max + 1)
65 /* IA-64 ABI section pseudo-ops. */
66 SPECIAL_SECTION_BSS
= 0,
68 SPECIAL_SECTION_SDATA
,
69 SPECIAL_SECTION_RODATA
,
70 SPECIAL_SECTION_COMMENT
,
71 SPECIAL_SECTION_UNWIND
,
72 SPECIAL_SECTION_UNWIND_INFO
,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY
,
75 SPECIAL_SECTION_FINI_ARRAY
,
88 FUNC_LT_FPTR_RELATIVE
,
95 REG_FR
= (REG_GR
+ 128),
96 REG_AR
= (REG_FR
+ 128),
97 REG_CR
= (REG_AR
+ 128),
98 REG_P
= (REG_CR
+ 128),
99 REG_BR
= (REG_P
+ 64),
100 REG_IP
= (REG_BR
+ 8),
107 /* The following are pseudo-registers for use by gas only. */
119 /* The following pseudo-registers are used for unwind directives only: */
127 DYNREG_GR
= 0, /* dynamic general purpose register */
128 DYNREG_FR
, /* dynamic floating point register */
129 DYNREG_PR
, /* dynamic predicate register */
133 enum operand_match_result
136 OPERAND_OUT_OF_RANGE
,
140 /* On the ia64, we can't know the address of a text label until the
141 instructions are packed into a bundle. To handle this, we keep
142 track of the list of labels that appear in front of each
146 struct label_fix
*next
;
150 extern int target_big_endian
;
152 /* Characters which always start a comment. */
153 const char comment_chars
[] = "";
155 /* Characters which start a comment at the beginning of a line. */
156 const char line_comment_chars
[] = "#";
158 /* Characters which may be used to separate multiple commands on a
160 const char line_separator_chars
[] = ";";
162 /* Characters which are used to indicate an exponent in a floating
164 const char EXP_CHARS
[] = "eE";
166 /* Characters which mean that a number is a floating point constant,
168 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
170 /* ia64-specific option processing: */
172 const char *md_shortopts
= "m:N:x::";
174 struct option md_longopts
[] =
176 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
177 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
178 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
179 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
182 size_t md_longopts_size
= sizeof (md_longopts
);
186 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
187 struct hash_control
*reg_hash
; /* register name hash table */
188 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
189 struct hash_control
*const_hash
; /* constant hash table */
190 struct hash_control
*entry_hash
; /* code entry hint hash table */
192 symbolS
*regsym
[REG_NUM
];
194 /* If X_op is != O_absent, the registername for the instruction's
195 qualifying predicate. If NULL, p0 is assumed for instructions
196 that are predicatable. */
203 explicit_mode
: 1, /* which mode we're in */
204 default_explicit_mode
: 1, /* which mode is the default */
205 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
207 keep_pending_output
: 1;
209 /* Each bundle consists of up to three instructions. We keep
210 track of four most recent instructions so we can correctly set
211 the end_of_insn_group for the last instruction in a bundle. */
213 int num_slots_in_use
;
217 end_of_insn_group
: 1,
218 manual_bundling_on
: 1,
219 manual_bundling_off
: 1;
220 signed char user_template
; /* user-selected template, if any */
221 unsigned char qp_regno
; /* qualifying predicate */
222 /* This duplicates a good fraction of "struct fix" but we
223 can't use a "struct fix" instead since we can't call
224 fix_new_exp() until we know the address of the instruction. */
228 bfd_reloc_code_real_type code
;
229 enum ia64_opnd opnd
; /* type of operand in need of fix */
230 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
231 expressionS expr
; /* the value to be inserted */
233 fixup
[2]; /* at most two fixups per insn */
234 struct ia64_opcode
*idesc
;
235 struct label_fix
*label_fixups
;
236 struct label_fix
*tag_fixups
;
237 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
240 unsigned int src_line
;
241 struct dwarf2_line_info debug_line
;
249 struct dynreg
*next
; /* next dynamic register */
251 unsigned short base
; /* the base register number */
252 unsigned short num_regs
; /* # of registers in this set */
254 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
256 flagword flags
; /* ELF-header flags */
259 unsigned hint
:1; /* is this hint currently valid? */
260 bfd_vma offset
; /* mem.offset offset */
261 bfd_vma base
; /* mem.offset base */
264 int path
; /* number of alt. entry points seen */
265 const char **entry_labels
; /* labels of all alternate paths in
266 the current DV-checking block. */
267 int maxpaths
; /* size currently allocated for
269 /* Support for hardware errata workarounds. */
271 /* Record data about the last three insn groups. */
274 /* B-step workaround.
275 For each predicate register, this is set if the corresponding insn
276 group conditionally sets this register with one of the affected
279 /* B-step workaround.
280 For each general register, this is set if the corresponding insn
281 a) is conditional one one of the predicate registers for which
282 P_REG_SET is 1 in the corresponding entry of the previous group,
283 b) sets this general register with one of the affected
285 int g_reg_set_conditionally
[128];
289 int pointer_size
; /* size in bytes of a pointer */
290 int pointer_size_shift
; /* shift size of a pointer for alignment */
294 /* application registers: */
300 #define AR_BSPSTORE 18
315 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
316 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
317 {"ar.rsc", 16}, {"ar.bsp", 17},
318 {"ar.bspstore", 18}, {"ar.rnat", 19},
319 {"ar.fcr", 21}, {"ar.eflag", 24},
320 {"ar.csd", 25}, {"ar.ssd", 26},
321 {"ar.cflg", 27}, {"ar.fsr", 28},
322 {"ar.fir", 29}, {"ar.fdr", 30},
323 {"ar.ccv", 32}, {"ar.unat", 36},
324 {"ar.fpsr", 40}, {"ar.itc", 44},
325 {"ar.pfs", 64}, {"ar.lc", 65},
346 /* control registers: */
388 static const struct const_desc
395 /* PSR constant masks: */
398 {"psr.be", ((valueT
) 1) << 1},
399 {"psr.up", ((valueT
) 1) << 2},
400 {"psr.ac", ((valueT
) 1) << 3},
401 {"psr.mfl", ((valueT
) 1) << 4},
402 {"psr.mfh", ((valueT
) 1) << 5},
404 {"psr.ic", ((valueT
) 1) << 13},
405 {"psr.i", ((valueT
) 1) << 14},
406 {"psr.pk", ((valueT
) 1) << 15},
408 {"psr.dt", ((valueT
) 1) << 17},
409 {"psr.dfl", ((valueT
) 1) << 18},
410 {"psr.dfh", ((valueT
) 1) << 19},
411 {"psr.sp", ((valueT
) 1) << 20},
412 {"psr.pp", ((valueT
) 1) << 21},
413 {"psr.di", ((valueT
) 1) << 22},
414 {"psr.si", ((valueT
) 1) << 23},
415 {"psr.db", ((valueT
) 1) << 24},
416 {"psr.lp", ((valueT
) 1) << 25},
417 {"psr.tb", ((valueT
) 1) << 26},
418 {"psr.rt", ((valueT
) 1) << 27},
419 /* 28-31: reserved */
420 /* 32-33: cpl (current privilege level) */
421 {"psr.is", ((valueT
) 1) << 34},
422 {"psr.mc", ((valueT
) 1) << 35},
423 {"psr.it", ((valueT
) 1) << 36},
424 {"psr.id", ((valueT
) 1) << 37},
425 {"psr.da", ((valueT
) 1) << 38},
426 {"psr.dd", ((valueT
) 1) << 39},
427 {"psr.ss", ((valueT
) 1) << 40},
428 /* 41-42: ri (restart instruction) */
429 {"psr.ed", ((valueT
) 1) << 43},
430 {"psr.bn", ((valueT
) 1) << 44},
433 /* indirect register-sets/memory: */
442 { "CPUID", IND_CPUID
},
443 { "cpuid", IND_CPUID
},
455 /* Pseudo functions used to indicate relocation types (these functions
456 start with an at sign (@). */
478 /* reloc pseudo functions (these must come first!): */
479 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
480 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
481 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
482 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
483 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
484 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
485 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
486 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
487 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
488 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
490 /* mbtype4 constants: */
491 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
492 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
493 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
494 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
495 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
497 /* fclass constants: */
498 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
499 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
500 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
501 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
502 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
503 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
504 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
505 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
506 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
508 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
510 /* unwind-related constants: */
511 { "svr4", PSEUDO_FUNC_CONST
, { 0 } },
512 { "hpux", PSEUDO_FUNC_CONST
, { 1 } },
513 { "nt", PSEUDO_FUNC_CONST
, { 2 } },
515 /* unwind-related registers: */
516 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
519 /* 41-bit nop opcodes (one per unit): */
520 static const bfd_vma nop
[IA64_NUM_UNITS
] =
522 0x0000000000LL
, /* NIL => break 0 */
523 0x0008000000LL
, /* I-unit nop */
524 0x0008000000LL
, /* M-unit nop */
525 0x4000000000LL
, /* B-unit nop */
526 0x0008000000LL
, /* F-unit nop */
527 0x0008000000LL
, /* L-"unit" nop */
528 0x0008000000LL
, /* X-unit nop */
531 /* Can't be `const' as it's passed to input routines (which have the
532 habit of setting temporary sentinels. */
533 static char special_section_name
[][20] =
535 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
536 {".IA_64.unwind"}, {".IA_64.unwind_info"},
537 {".init_array"}, {".fini_array"}
540 static char *special_linkonce_name
[] =
542 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
545 /* The best template for a particular sequence of up to three
547 #define N IA64_NUM_TYPES
548 static unsigned char best_template
[N
][N
][N
];
551 /* Resource dependencies currently in effect */
553 int depind
; /* dependency index */
554 const struct ia64_dependency
*dependency
; /* actual dependency */
555 unsigned specific
:1, /* is this a specific bit/regno? */
556 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
557 int index
; /* specific regno/bit within dependency */
558 int note
; /* optional qualifying note (0 if none) */
562 int insn_srlz
; /* current insn serialization state */
563 int data_srlz
; /* current data serialization state */
564 int qp_regno
; /* qualifying predicate for this usage */
565 char *file
; /* what file marked this dependency */
566 unsigned int line
; /* what line marked this dependency */
567 struct mem_offset mem_offset
; /* optional memory offset hint */
568 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
569 int path
; /* corresponding code entry index */
571 static int regdepslen
= 0;
572 static int regdepstotlen
= 0;
573 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
574 static const char *dv_sem
[] = { "none", "implied", "impliedf",
575 "data", "instr", "specific", "stop", "other" };
576 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
578 /* Current state of PR mutexation */
579 static struct qpmutex
{
582 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
583 static int qp_mutexeslen
= 0;
584 static int qp_mutexestotlen
= 0;
585 static valueT qp_safe_across_calls
= 0;
587 /* Current state of PR implications */
588 static struct qp_imply
{
591 unsigned p2_branched
:1;
593 } *qp_implies
= NULL
;
594 static int qp_implieslen
= 0;
595 static int qp_impliestotlen
= 0;
597 /* Keep track of static GR values so that indirect register usage can
598 sometimes be tracked. */
603 } gr_values
[128] = {{ 1, 0, 0 }};
605 /* These are the routines required to output the various types of
608 /* A slot_number is a frag address plus the slot index (0-2). We use the
609 frag address here so that if there is a section switch in the middle of
610 a function, then instructions emitted to a different section are not
611 counted. Since there may be more than one frag for a function, this
612 means we also need to keep track of which frag this address belongs to
613 so we can compute inter-frag distances. This also nicely solves the
614 problem with nops emitted for align directives, which can't easily be
615 counted, but can easily be derived from frag sizes. */
617 typedef struct unw_rec_list
{
619 unsigned long slot_number
;
621 struct unw_rec_list
*next
;
624 #define SLOT_NUM_NOT_SET (unsigned)-1
628 unsigned long next_slot_number
;
629 fragS
*next_slot_frag
;
631 /* Maintain a list of unwind entries for the current function. */
635 /* Any unwind entires that should be attached to the current slot
636 that an insn is being constructed for. */
637 unw_rec_list
*current_entry
;
639 /* These are used to create the unwind table entry for this function. */
642 symbolS
*info
; /* pointer to unwind info */
643 symbolS
*personality_routine
;
645 subsegT saved_text_subseg
;
646 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
648 /* TRUE if processing unwind directives in a prologue region. */
651 unsigned int prologue_count
; /* number of .prologues seen so far */
654 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
656 /* Forward delarations: */
657 static int ar_is_in_integer_unit
PARAMS ((int regnum
));
658 static void set_section
PARAMS ((char *name
));
659 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
660 unsigned int, unsigned int));
661 static void dot_radix
PARAMS ((int));
662 static void dot_special_section
PARAMS ((int));
663 static void dot_proc
PARAMS ((int));
664 static void dot_fframe
PARAMS ((int));
665 static void dot_vframe
PARAMS ((int));
666 static void dot_vframesp
PARAMS ((int));
667 static void dot_vframepsp
PARAMS ((int));
668 static void dot_save
PARAMS ((int));
669 static void dot_restore
PARAMS ((int));
670 static void dot_restorereg
PARAMS ((int));
671 static void dot_restorereg_p
PARAMS ((int));
672 static void dot_handlerdata
PARAMS ((int));
673 static void dot_unwentry
PARAMS ((int));
674 static void dot_altrp
PARAMS ((int));
675 static void dot_savemem
PARAMS ((int));
676 static void dot_saveg
PARAMS ((int));
677 static void dot_savef
PARAMS ((int));
678 static void dot_saveb
PARAMS ((int));
679 static void dot_savegf
PARAMS ((int));
680 static void dot_spill
PARAMS ((int));
681 static void dot_spillreg
PARAMS ((int));
682 static void dot_spillmem
PARAMS ((int));
683 static void dot_spillreg_p
PARAMS ((int));
684 static void dot_spillmem_p
PARAMS ((int));
685 static void dot_label_state
PARAMS ((int));
686 static void dot_copy_state
PARAMS ((int));
687 static void dot_unwabi
PARAMS ((int));
688 static void dot_personality
PARAMS ((int));
689 static void dot_body
PARAMS ((int));
690 static void dot_prologue
PARAMS ((int));
691 static void dot_endp
PARAMS ((int));
692 static void dot_template
PARAMS ((int));
693 static void dot_regstk
PARAMS ((int));
694 static void dot_rot
PARAMS ((int));
695 static void dot_byteorder
PARAMS ((int));
696 static void dot_psr
PARAMS ((int));
697 static void dot_alias
PARAMS ((int));
698 static void dot_ln
PARAMS ((int));
699 static char *parse_section_name
PARAMS ((void));
700 static void dot_xdata
PARAMS ((int));
701 static void stmt_float_cons
PARAMS ((int));
702 static void stmt_cons_ua
PARAMS ((int));
703 static void dot_xfloat_cons
PARAMS ((int));
704 static void dot_xstringer
PARAMS ((int));
705 static void dot_xdata_ua
PARAMS ((int));
706 static void dot_xfloat_cons_ua
PARAMS ((int));
707 static void print_prmask
PARAMS ((valueT mask
));
708 static void dot_pred_rel
PARAMS ((int));
709 static void dot_reg_val
PARAMS ((int));
710 static void dot_dv_mode
PARAMS ((int));
711 static void dot_entry
PARAMS ((int));
712 static void dot_mem_offset
PARAMS ((int));
713 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
714 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
715 static void declare_register_set
PARAMS ((const char *, int, int));
716 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
717 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
720 static int parse_operand
PARAMS ((expressionS
*e
));
721 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
722 static int errata_nop_necessary_p
PARAMS ((struct slot
*, enum ia64_unit
));
723 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
724 static void emit_one_bundle
PARAMS ((void));
725 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
726 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
727 bfd_reloc_code_real_type r_type
));
728 static void insn_group_break
PARAMS ((int, int, int));
729 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
730 struct rsrc
*, int depind
, int path
));
731 static void add_qp_mutex
PARAMS((valueT mask
));
732 static void add_qp_imply
PARAMS((int p1
, int p2
));
733 static void clear_qp_branch_flag
PARAMS((valueT mask
));
734 static void clear_qp_mutex
PARAMS((valueT mask
));
735 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
736 static int has_suffix_p
PARAMS((const char *, const char *));
737 static void clear_register_values
PARAMS ((void));
738 static void print_dependency
PARAMS ((const char *action
, int depind
));
739 static void instruction_serialization
PARAMS ((void));
740 static void data_serialization
PARAMS ((void));
741 static void remove_marked_resource
PARAMS ((struct rsrc
*));
742 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
743 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
744 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
745 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
746 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
747 struct ia64_opcode
*, int, struct rsrc
[], int, int));
748 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
749 static void check_dependencies
PARAMS((struct ia64_opcode
*));
750 static void mark_resources
PARAMS((struct ia64_opcode
*));
751 static void update_dependencies
PARAMS((struct ia64_opcode
*));
752 static void note_register_values
PARAMS((struct ia64_opcode
*));
753 static int qp_mutex
PARAMS ((int, int, int));
754 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
755 static void output_vbyte_mem
PARAMS ((int, char *, char *));
756 static void count_output
PARAMS ((int, char *, char *));
757 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
758 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
759 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
760 static void output_P1_format
PARAMS ((vbyte_func
, int));
761 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
762 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
763 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
764 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
765 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
766 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
767 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
768 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
769 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
770 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
771 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
772 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
773 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
774 static char format_ab_reg
PARAMS ((int, int));
775 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
777 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
778 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
780 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
781 static void free_list_records
PARAMS ((unw_rec_list
*));
782 static unw_rec_list
*output_prologue
PARAMS ((void));
783 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
784 static unw_rec_list
*output_body
PARAMS ((void));
785 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
786 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
787 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
788 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
789 static unw_rec_list
*output_rp_when
PARAMS ((void));
790 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
791 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
792 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
793 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
794 static unw_rec_list
*output_pfs_when
PARAMS ((void));
795 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
796 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
797 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
798 static unw_rec_list
*output_preds_when
PARAMS ((void));
799 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
800 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
801 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
802 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
803 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
804 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
805 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
806 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
807 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
808 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
809 static unw_rec_list
*output_unat_when
PARAMS ((void));
810 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
811 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
812 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
813 static unw_rec_list
*output_lc_when
PARAMS ((void));
814 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
815 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
816 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
817 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
818 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
819 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
820 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
821 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
822 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
823 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
824 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
825 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
826 static unw_rec_list
*output_bsp_when
PARAMS ((void));
827 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
828 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
829 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
830 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
831 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
832 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
833 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
834 static unw_rec_list
*output_rnat_when
PARAMS ((void));
835 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
836 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
837 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
838 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
839 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
840 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
841 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
842 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
843 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
844 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
846 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
848 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
850 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
851 unsigned int, unsigned int));
852 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
853 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
854 static int calc_record_size
PARAMS ((unw_rec_list
*));
855 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
856 static int count_bits
PARAMS ((unsigned long));
857 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
858 unsigned long, fragS
*));
859 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
860 static void fixup_unw_records
PARAMS ((unw_rec_list
*));
861 static int output_unw_records
PARAMS ((unw_rec_list
*, void **));
862 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
863 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
864 static int generate_unwind_image
PARAMS ((const char *));
866 /* Build the unwind section name by appending the (possibly stripped)
867 text section NAME to the unwind PREFIX. The resulting string
868 pointer is assigned to RESULT. The string is allocated on the
869 stack, so this must be a macro... */
870 #define make_unw_section_name(special, text_name, result) \
872 const char *_prefix = special_section_name[special]; \
873 const char *_suffix = text_name; \
874 size_t _prefix_len, _suffix_len; \
876 if (strncmp (text_name, ".gnu.linkonce.t.", \
877 sizeof (".gnu.linkonce.t.") - 1) == 0) \
879 _prefix = special_linkonce_name[special - SPECIAL_SECTION_UNWIND]; \
880 _suffix += sizeof (".gnu.linkonce.t.") - 1; \
882 _prefix_len = strlen (_prefix), _suffix_len = strlen (_suffix); \
883 _result = alloca (_prefix_len + _suffix_len + 1); \
884 memcpy (_result, _prefix, _prefix_len); \
885 memcpy (_result + _prefix_len, _suffix, _suffix_len); \
886 _result[_prefix_len + _suffix_len] = '\0'; \
891 /* Determine if application register REGNUM resides in the integer
892 unit (as opposed to the memory unit). */
894 ar_is_in_integer_unit (reg
)
899 return (reg
== 64 /* pfs */
900 || reg
== 65 /* lc */
901 || reg
== 66 /* ec */
902 /* ??? ias accepts and puts these in the integer unit. */
903 || (reg
>= 112 && reg
<= 127));
906 /* Switch to section NAME and create section if necessary. It's
907 rather ugly that we have to manipulate input_line_pointer but I
908 don't see any other way to accomplish the same thing without
909 changing obj-elf.c (which may be the Right Thing, in the end). */
914 char *saved_input_line_pointer
;
916 saved_input_line_pointer
= input_line_pointer
;
917 input_line_pointer
= name
;
919 input_line_pointer
= saved_input_line_pointer
;
922 /* Map 's' to SHF_IA_64_SHORT. */
925 ia64_elf_section_letter (letter
, ptr_msg
)
930 return SHF_IA_64_SHORT
;
932 *ptr_msg
= _("Bad .section directive: want a,s,w,x,M,S in string");
936 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
939 ia64_elf_section_flags (flags
, attr
, type
)
941 int attr
, type ATTRIBUTE_UNUSED
;
943 if (attr
& SHF_IA_64_SHORT
)
944 flags
|= SEC_SMALL_DATA
;
949 ia64_elf_section_type (str
, len
)
953 len
= sizeof (ELF_STRING_ia64_unwind_info
) - 1;
954 if (strncmp (str
, ELF_STRING_ia64_unwind_info
, len
) == 0)
957 len
= sizeof (ELF_STRING_ia64_unwind_info_once
) - 1;
958 if (strncmp (str
, ELF_STRING_ia64_unwind_info_once
, len
) == 0)
961 len
= sizeof (ELF_STRING_ia64_unwind
) - 1;
962 if (strncmp (str
, ELF_STRING_ia64_unwind
, len
) == 0)
963 return SHT_IA_64_UNWIND
;
965 len
= sizeof (ELF_STRING_ia64_unwind_once
) - 1;
966 if (strncmp (str
, ELF_STRING_ia64_unwind_once
, len
) == 0)
967 return SHT_IA_64_UNWIND
;
973 set_regstack (ins
, locs
, outs
, rots
)
974 unsigned int ins
, locs
, outs
, rots
;
979 sof
= ins
+ locs
+ outs
;
982 as_bad ("Size of frame exceeds maximum of 96 registers");
987 as_warn ("Size of rotating registers exceeds frame size");
990 md
.in
.base
= REG_GR
+ 32;
991 md
.loc
.base
= md
.in
.base
+ ins
;
992 md
.out
.base
= md
.loc
.base
+ locs
;
994 md
.in
.num_regs
= ins
;
995 md
.loc
.num_regs
= locs
;
996 md
.out
.num_regs
= outs
;
997 md
.rot
.num_regs
= rots
;
1004 struct label_fix
*lfix
;
1006 subsegT saved_subseg
;
1009 if (!md
.last_text_seg
)
1012 saved_seg
= now_seg
;
1013 saved_subseg
= now_subseg
;
1015 subseg_set (md
.last_text_seg
, 0);
1017 while (md
.num_slots_in_use
> 0)
1018 emit_one_bundle (); /* force out queued instructions */
1020 /* In case there are labels following the last instruction, resolve
1022 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1024 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1025 symbol_set_frag (lfix
->sym
, frag_now
);
1027 CURR_SLOT
.label_fixups
= 0;
1028 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1030 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1031 symbol_set_frag (lfix
->sym
, frag_now
);
1033 CURR_SLOT
.tag_fixups
= 0;
1035 /* In case there are unwind directives following the last instruction,
1036 resolve those now. We only handle body and prologue directives here.
1037 Give an error for others. */
1038 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1040 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
1041 || ptr
->r
.type
== body
)
1043 ptr
->slot_number
= (unsigned long) frag_more (0);
1044 ptr
->slot_frag
= frag_now
;
1047 as_bad (_("Unwind directive not followed by an instruction."));
1049 unwind
.current_entry
= NULL
;
1051 subseg_set (saved_seg
, saved_subseg
);
1053 if (md
.qp
.X_op
== O_register
)
1054 as_bad ("qualifying predicate not followed by instruction");
1058 ia64_do_align (nbytes
)
1061 char *saved_input_line_pointer
= input_line_pointer
;
1063 input_line_pointer
= "";
1064 s_align_bytes (nbytes
);
1065 input_line_pointer
= saved_input_line_pointer
;
1069 ia64_cons_align (nbytes
)
1074 char *saved_input_line_pointer
= input_line_pointer
;
1075 input_line_pointer
= "";
1076 s_align_bytes (nbytes
);
1077 input_line_pointer
= saved_input_line_pointer
;
1081 /* Output COUNT bytes to a memory location. */
1082 static unsigned char *vbyte_mem_ptr
= NULL
;
1085 output_vbyte_mem (count
, ptr
, comment
)
1088 char *comment ATTRIBUTE_UNUSED
;
1091 if (vbyte_mem_ptr
== NULL
)
1096 for (x
= 0; x
< count
; x
++)
1097 *(vbyte_mem_ptr
++) = ptr
[x
];
1100 /* Count the number of bytes required for records. */
1101 static int vbyte_count
= 0;
1103 count_output (count
, ptr
, comment
)
1105 char *ptr ATTRIBUTE_UNUSED
;
1106 char *comment ATTRIBUTE_UNUSED
;
1108 vbyte_count
+= count
;
1112 output_R1_format (f
, rtype
, rlen
)
1114 unw_record_type rtype
;
1121 output_R3_format (f
, rtype
, rlen
);
1127 else if (rtype
!= prologue
)
1128 as_bad ("record type is not valid");
1130 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1131 (*f
) (1, &byte
, NULL
);
1135 output_R2_format (f
, mask
, grsave
, rlen
)
1142 mask
= (mask
& 0x0f);
1143 grsave
= (grsave
& 0x7f);
1145 bytes
[0] = (UNW_R2
| (mask
>> 1));
1146 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1147 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1148 (*f
) (count
, bytes
, NULL
);
1152 output_R3_format (f
, rtype
, rlen
)
1154 unw_record_type rtype
;
1161 output_R1_format (f
, rtype
, rlen
);
1167 else if (rtype
!= prologue
)
1168 as_bad ("record type is not valid");
1169 bytes
[0] = (UNW_R3
| r
);
1170 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1171 (*f
) (count
+ 1, bytes
, NULL
);
1175 output_P1_format (f
, brmask
)
1180 byte
= UNW_P1
| (brmask
& 0x1f);
1181 (*f
) (1, &byte
, NULL
);
1185 output_P2_format (f
, brmask
, gr
)
1191 brmask
= (brmask
& 0x1f);
1192 bytes
[0] = UNW_P2
| (brmask
>> 1);
1193 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1194 (*f
) (2, bytes
, NULL
);
1198 output_P3_format (f
, rtype
, reg
)
1200 unw_record_type rtype
;
1245 as_bad ("Invalid record type for P3 format.");
1247 bytes
[0] = (UNW_P3
| (r
>> 1));
1248 bytes
[1] = (((r
& 1) << 7) | reg
);
1249 (*f
) (2, bytes
, NULL
);
1253 output_P4_format (f
, imask
, imask_size
)
1255 unsigned char *imask
;
1256 unsigned long imask_size
;
1259 (*f
) (imask_size
, imask
, NULL
);
1263 output_P5_format (f
, grmask
, frmask
)
1266 unsigned long frmask
;
1269 grmask
= (grmask
& 0x0f);
1272 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1273 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1274 bytes
[3] = (frmask
& 0x000000ff);
1275 (*f
) (4, bytes
, NULL
);
1279 output_P6_format (f
, rtype
, rmask
)
1281 unw_record_type rtype
;
1287 if (rtype
== gr_mem
)
1289 else if (rtype
!= fr_mem
)
1290 as_bad ("Invalid record type for format P6");
1291 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1292 (*f
) (1, &byte
, NULL
);
1296 output_P7_format (f
, rtype
, w1
, w2
)
1298 unw_record_type rtype
;
1305 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1310 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1360 bytes
[0] = (UNW_P7
| r
);
1361 (*f
) (count
, bytes
, NULL
);
1365 output_P8_format (f
, rtype
, t
)
1367 unw_record_type rtype
;
1406 case bspstore_psprel
:
1409 case bspstore_sprel
:
1421 case priunat_when_gr
:
1424 case priunat_psprel
:
1430 case priunat_when_mem
:
1437 count
+= output_leb128 (bytes
+ 2, t
, 0);
1438 (*f
) (count
, bytes
, NULL
);
1442 output_P9_format (f
, grmask
, gr
)
1449 bytes
[1] = (grmask
& 0x0f);
1450 bytes
[2] = (gr
& 0x7f);
1451 (*f
) (3, bytes
, NULL
);
1455 output_P10_format (f
, abi
, context
)
1462 bytes
[1] = (abi
& 0xff);
1463 bytes
[2] = (context
& 0xff);
1464 (*f
) (3, bytes
, NULL
);
1468 output_B1_format (f
, rtype
, label
)
1470 unw_record_type rtype
;
1471 unsigned long label
;
1477 output_B4_format (f
, rtype
, label
);
1480 if (rtype
== copy_state
)
1482 else if (rtype
!= label_state
)
1483 as_bad ("Invalid record type for format B1");
1485 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1486 (*f
) (1, &byte
, NULL
);
1490 output_B2_format (f
, ecount
, t
)
1492 unsigned long ecount
;
1499 output_B3_format (f
, ecount
, t
);
1502 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1503 count
+= output_leb128 (bytes
+ 1, t
, 0);
1504 (*f
) (count
, bytes
, NULL
);
1508 output_B3_format (f
, ecount
, t
)
1510 unsigned long ecount
;
1517 output_B2_format (f
, ecount
, t
);
1521 count
+= output_leb128 (bytes
+ 1, t
, 0);
1522 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1523 (*f
) (count
, bytes
, NULL
);
1527 output_B4_format (f
, rtype
, label
)
1529 unw_record_type rtype
;
1530 unsigned long label
;
1537 output_B1_format (f
, rtype
, label
);
1541 if (rtype
== copy_state
)
1543 else if (rtype
!= label_state
)
1544 as_bad ("Invalid record type for format B1");
1546 bytes
[0] = (UNW_B4
| (r
<< 3));
1547 count
+= output_leb128 (bytes
+ 1, label
, 0);
1548 (*f
) (count
, bytes
, NULL
);
1552 format_ab_reg (ab
, reg
)
1559 ret
= (ab
<< 5) | reg
;
1564 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1566 unw_record_type rtype
;
1576 if (rtype
== spill_sprel
)
1578 else if (rtype
!= spill_psprel
)
1579 as_bad ("Invalid record type for format X1");
1580 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1581 count
+= output_leb128 (bytes
+ 2, t
, 0);
1582 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1583 (*f
) (count
, bytes
, NULL
);
1587 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1596 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1597 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1598 count
+= output_leb128 (bytes
+ 3, t
, 0);
1599 (*f
) (count
, bytes
, NULL
);
1603 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1605 unw_record_type rtype
;
1616 if (rtype
== spill_sprel_p
)
1618 else if (rtype
!= spill_psprel_p
)
1619 as_bad ("Invalid record type for format X3");
1620 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1621 bytes
[2] = format_ab_reg (ab
, reg
);
1622 count
+= output_leb128 (bytes
+ 3, t
, 0);
1623 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1624 (*f
) (count
, bytes
, NULL
);
1628 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1638 bytes
[1] = (qp
& 0x3f);
1639 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1640 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1641 count
+= output_leb128 (bytes
+ 4, t
, 0);
1642 (*f
) (count
, bytes
, NULL
);
1645 /* This function allocates a record list structure, and initializes fields. */
1647 static unw_rec_list
*
1648 alloc_record (unw_record_type t
)
1651 ptr
= xmalloc (sizeof (*ptr
));
1653 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1658 /* This function frees an entire list of record structures. */
1661 free_list_records (unw_rec_list
*first
)
1664 for (ptr
= first
; ptr
!= NULL
;)
1666 unw_rec_list
*tmp
= ptr
;
1668 if ((tmp
->r
.type
== prologue
|| tmp
->r
.type
== prologue_gr
)
1669 && tmp
->r
.record
.r
.mask
.i
)
1670 free (tmp
->r
.record
.r
.mask
.i
);
1677 static unw_rec_list
*
1680 unw_rec_list
*ptr
= alloc_record (prologue
);
1681 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1685 static unw_rec_list
*
1686 output_prologue_gr (saved_mask
, reg
)
1687 unsigned int saved_mask
;
1690 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1691 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1692 ptr
->r
.record
.r
.grmask
= saved_mask
;
1693 ptr
->r
.record
.r
.grsave
= reg
;
1697 static unw_rec_list
*
1700 unw_rec_list
*ptr
= alloc_record (body
);
1704 static unw_rec_list
*
1705 output_mem_stack_f (size
)
1708 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1709 ptr
->r
.record
.p
.size
= size
;
1713 static unw_rec_list
*
1714 output_mem_stack_v ()
1716 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1720 static unw_rec_list
*
1724 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1725 ptr
->r
.record
.p
.gr
= gr
;
1729 static unw_rec_list
*
1730 output_psp_sprel (offset
)
1731 unsigned int offset
;
1733 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1734 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1738 static unw_rec_list
*
1741 unw_rec_list
*ptr
= alloc_record (rp_when
);
1745 static unw_rec_list
*
1749 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1750 ptr
->r
.record
.p
.gr
= gr
;
1754 static unw_rec_list
*
1758 unw_rec_list
*ptr
= alloc_record (rp_br
);
1759 ptr
->r
.record
.p
.br
= br
;
1763 static unw_rec_list
*
1764 output_rp_psprel (offset
)
1765 unsigned int offset
;
1767 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1768 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1772 static unw_rec_list
*
1773 output_rp_sprel (offset
)
1774 unsigned int offset
;
1776 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1777 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1781 static unw_rec_list
*
1784 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1788 static unw_rec_list
*
1792 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1793 ptr
->r
.record
.p
.gr
= gr
;
1797 static unw_rec_list
*
1798 output_pfs_psprel (offset
)
1799 unsigned int offset
;
1801 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1802 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1806 static unw_rec_list
*
1807 output_pfs_sprel (offset
)
1808 unsigned int offset
;
1810 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1811 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1815 static unw_rec_list
*
1816 output_preds_when ()
1818 unw_rec_list
*ptr
= alloc_record (preds_when
);
1822 static unw_rec_list
*
1823 output_preds_gr (gr
)
1826 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1827 ptr
->r
.record
.p
.gr
= gr
;
1831 static unw_rec_list
*
1832 output_preds_psprel (offset
)
1833 unsigned int offset
;
1835 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1836 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1840 static unw_rec_list
*
1841 output_preds_sprel (offset
)
1842 unsigned int offset
;
1844 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1845 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1849 static unw_rec_list
*
1850 output_fr_mem (mask
)
1853 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1854 ptr
->r
.record
.p
.rmask
= mask
;
1858 static unw_rec_list
*
1859 output_frgr_mem (gr_mask
, fr_mask
)
1860 unsigned int gr_mask
;
1861 unsigned int fr_mask
;
1863 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1864 ptr
->r
.record
.p
.grmask
= gr_mask
;
1865 ptr
->r
.record
.p
.frmask
= fr_mask
;
1869 static unw_rec_list
*
1870 output_gr_gr (mask
, reg
)
1874 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1875 ptr
->r
.record
.p
.grmask
= mask
;
1876 ptr
->r
.record
.p
.gr
= reg
;
1880 static unw_rec_list
*
1881 output_gr_mem (mask
)
1884 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1885 ptr
->r
.record
.p
.rmask
= mask
;
1889 static unw_rec_list
*
1890 output_br_mem (unsigned int mask
)
1892 unw_rec_list
*ptr
= alloc_record (br_mem
);
1893 ptr
->r
.record
.p
.brmask
= mask
;
1897 static unw_rec_list
*
1898 output_br_gr (save_mask
, reg
)
1899 unsigned int save_mask
;
1902 unw_rec_list
*ptr
= alloc_record (br_gr
);
1903 ptr
->r
.record
.p
.brmask
= save_mask
;
1904 ptr
->r
.record
.p
.gr
= reg
;
1908 static unw_rec_list
*
1909 output_spill_base (offset
)
1910 unsigned int offset
;
1912 unw_rec_list
*ptr
= alloc_record (spill_base
);
1913 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1917 static unw_rec_list
*
1920 unw_rec_list
*ptr
= alloc_record (unat_when
);
1924 static unw_rec_list
*
1928 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1929 ptr
->r
.record
.p
.gr
= gr
;
1933 static unw_rec_list
*
1934 output_unat_psprel (offset
)
1935 unsigned int offset
;
1937 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
1938 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1942 static unw_rec_list
*
1943 output_unat_sprel (offset
)
1944 unsigned int offset
;
1946 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
1947 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1951 static unw_rec_list
*
1954 unw_rec_list
*ptr
= alloc_record (lc_when
);
1958 static unw_rec_list
*
1962 unw_rec_list
*ptr
= alloc_record (lc_gr
);
1963 ptr
->r
.record
.p
.gr
= gr
;
1967 static unw_rec_list
*
1968 output_lc_psprel (offset
)
1969 unsigned int offset
;
1971 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
1972 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1976 static unw_rec_list
*
1977 output_lc_sprel (offset
)
1978 unsigned int offset
;
1980 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
1981 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1985 static unw_rec_list
*
1988 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
1992 static unw_rec_list
*
1996 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
1997 ptr
->r
.record
.p
.gr
= gr
;
2001 static unw_rec_list
*
2002 output_fpsr_psprel (offset
)
2003 unsigned int offset
;
2005 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2006 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2010 static unw_rec_list
*
2011 output_fpsr_sprel (offset
)
2012 unsigned int offset
;
2014 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2015 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2019 static unw_rec_list
*
2020 output_priunat_when_gr ()
2022 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2026 static unw_rec_list
*
2027 output_priunat_when_mem ()
2029 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2033 static unw_rec_list
*
2034 output_priunat_gr (gr
)
2037 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2038 ptr
->r
.record
.p
.gr
= gr
;
2042 static unw_rec_list
*
2043 output_priunat_psprel (offset
)
2044 unsigned int offset
;
2046 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2047 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2051 static unw_rec_list
*
2052 output_priunat_sprel (offset
)
2053 unsigned int offset
;
2055 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2056 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2060 static unw_rec_list
*
2063 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2067 static unw_rec_list
*
2071 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2072 ptr
->r
.record
.p
.gr
= gr
;
2076 static unw_rec_list
*
2077 output_bsp_psprel (offset
)
2078 unsigned int offset
;
2080 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2081 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2085 static unw_rec_list
*
2086 output_bsp_sprel (offset
)
2087 unsigned int offset
;
2089 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2090 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2094 static unw_rec_list
*
2095 output_bspstore_when ()
2097 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2101 static unw_rec_list
*
2102 output_bspstore_gr (gr
)
2105 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2106 ptr
->r
.record
.p
.gr
= gr
;
2110 static unw_rec_list
*
2111 output_bspstore_psprel (offset
)
2112 unsigned int offset
;
2114 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2115 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2119 static unw_rec_list
*
2120 output_bspstore_sprel (offset
)
2121 unsigned int offset
;
2123 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2124 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2128 static unw_rec_list
*
2131 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2135 static unw_rec_list
*
2139 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2140 ptr
->r
.record
.p
.gr
= gr
;
2144 static unw_rec_list
*
2145 output_rnat_psprel (offset
)
2146 unsigned int offset
;
2148 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2149 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2153 static unw_rec_list
*
2154 output_rnat_sprel (offset
)
2155 unsigned int offset
;
2157 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2158 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2162 static unw_rec_list
*
2163 output_unwabi (abi
, context
)
2165 unsigned long context
;
2167 unw_rec_list
*ptr
= alloc_record (unwabi
);
2168 ptr
->r
.record
.p
.abi
= abi
;
2169 ptr
->r
.record
.p
.context
= context
;
2173 static unw_rec_list
*
2174 output_epilogue (unsigned long ecount
)
2176 unw_rec_list
*ptr
= alloc_record (epilogue
);
2177 ptr
->r
.record
.b
.ecount
= ecount
;
2181 static unw_rec_list
*
2182 output_label_state (unsigned long label
)
2184 unw_rec_list
*ptr
= alloc_record (label_state
);
2185 ptr
->r
.record
.b
.label
= label
;
2189 static unw_rec_list
*
2190 output_copy_state (unsigned long label
)
2192 unw_rec_list
*ptr
= alloc_record (copy_state
);
2193 ptr
->r
.record
.b
.label
= label
;
2197 static unw_rec_list
*
2198 output_spill_psprel (ab
, reg
, offset
)
2201 unsigned int offset
;
2203 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2204 ptr
->r
.record
.x
.ab
= ab
;
2205 ptr
->r
.record
.x
.reg
= reg
;
2206 ptr
->r
.record
.x
.pspoff
= offset
/ 4;
2210 static unw_rec_list
*
2211 output_spill_sprel (ab
, reg
, offset
)
2214 unsigned int offset
;
2216 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2217 ptr
->r
.record
.x
.ab
= ab
;
2218 ptr
->r
.record
.x
.reg
= reg
;
2219 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2223 static unw_rec_list
*
2224 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2227 unsigned int offset
;
2228 unsigned int predicate
;
2230 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2231 ptr
->r
.record
.x
.ab
= ab
;
2232 ptr
->r
.record
.x
.reg
= reg
;
2233 ptr
->r
.record
.x
.pspoff
= offset
/ 4;
2234 ptr
->r
.record
.x
.qp
= predicate
;
2238 static unw_rec_list
*
2239 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2242 unsigned int offset
;
2243 unsigned int predicate
;
2245 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2246 ptr
->r
.record
.x
.ab
= ab
;
2247 ptr
->r
.record
.x
.reg
= reg
;
2248 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2249 ptr
->r
.record
.x
.qp
= predicate
;
2253 static unw_rec_list
*
2254 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2257 unsigned int targ_reg
;
2260 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2261 ptr
->r
.record
.x
.ab
= ab
;
2262 ptr
->r
.record
.x
.reg
= reg
;
2263 ptr
->r
.record
.x
.treg
= targ_reg
;
2264 ptr
->r
.record
.x
.xy
= xy
;
2268 static unw_rec_list
*
2269 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2272 unsigned int targ_reg
;
2274 unsigned int predicate
;
2276 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2277 ptr
->r
.record
.x
.ab
= ab
;
2278 ptr
->r
.record
.x
.reg
= reg
;
2279 ptr
->r
.record
.x
.treg
= targ_reg
;
2280 ptr
->r
.record
.x
.xy
= xy
;
2281 ptr
->r
.record
.x
.qp
= predicate
;
2285 /* Given a unw_rec_list process the correct format with the
2286 specified function. */
2289 process_one_record (ptr
, f
)
2293 unsigned long fr_mask
, gr_mask
;
2295 switch (ptr
->r
.type
)
2301 /* These are taken care of by prologue/prologue_gr. */
2306 if (ptr
->r
.type
== prologue_gr
)
2307 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2308 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2310 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2312 /* Output descriptor(s) for union of register spills (if any). */
2313 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2314 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2317 if ((fr_mask
& ~0xfUL
) == 0)
2318 output_P6_format (f
, fr_mem
, fr_mask
);
2321 output_P5_format (f
, gr_mask
, fr_mask
);
2326 output_P6_format (f
, gr_mem
, gr_mask
);
2327 if (ptr
->r
.record
.r
.mask
.br_mem
)
2328 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2330 /* output imask descriptor if necessary: */
2331 if (ptr
->r
.record
.r
.mask
.i
)
2332 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2333 ptr
->r
.record
.r
.imask_size
);
2337 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2341 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2342 ptr
->r
.record
.p
.size
);
2355 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2358 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2361 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2369 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2378 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2388 case bspstore_sprel
:
2390 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2393 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2396 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2399 as_bad ("spill_mask record unimplemented.");
2401 case priunat_when_gr
:
2402 case priunat_when_mem
:
2406 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2408 case priunat_psprel
:
2410 case bspstore_psprel
:
2412 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2415 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2418 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2422 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2425 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2426 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2427 ptr
->r
.record
.x
.pspoff
);
2430 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2431 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2432 ptr
->r
.record
.x
.spoff
);
2435 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2436 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2437 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2439 case spill_psprel_p
:
2440 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2441 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2442 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2445 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2446 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2447 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2450 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2451 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2452 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2456 as_bad ("record_type_not_valid");
2461 /* Given a unw_rec_list list, process all the records with
2462 the specified function. */
2464 process_unw_records (list
, f
)
2469 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2470 process_one_record (ptr
, f
);
2473 /* Determine the size of a record list in bytes. */
2475 calc_record_size (list
)
2479 process_unw_records (list
, count_output
);
2483 /* Update IMASK bitmask to reflect the fact that one or more registers
2484 of type TYPE are saved starting at instruction with index T. If N
2485 bits are set in REGMASK, it is assumed that instructions T through
2486 T+N-1 save these registers.
2490 1: instruction saves next fp reg
2491 2: instruction saves next general reg
2492 3: instruction saves next branch reg */
2494 set_imask (region
, regmask
, t
, type
)
2495 unw_rec_list
*region
;
2496 unsigned long regmask
;
2500 unsigned char *imask
;
2501 unsigned long imask_size
;
2505 imask
= region
->r
.record
.r
.mask
.i
;
2506 imask_size
= region
->r
.record
.r
.imask_size
;
2509 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2510 imask
= xmalloc (imask_size
);
2511 memset (imask
, 0, imask_size
);
2513 region
->r
.record
.r
.imask_size
= imask_size
;
2514 region
->r
.record
.r
.mask
.i
= imask
;
2518 pos
= 2 * (3 - t
% 4);
2521 if (i
>= imask_size
)
2523 as_bad ("Ignoring attempt to spill beyond end of region");
2527 imask
[i
] |= (type
& 0x3) << pos
;
2529 regmask
&= (regmask
- 1);
2540 count_bits (unsigned long mask
)
2552 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2553 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2554 containing FIRST_ADDR. */
2557 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
)
2558 unsigned long slot_addr
;
2560 unsigned long first_addr
;
2563 unsigned long index
= 0;
2565 /* First time we are called, the initial address and frag are invalid. */
2566 if (first_addr
== 0)
2569 /* If the two addresses are in different frags, then we need to add in
2570 the remaining size of this frag, and then the entire size of intermediate
2572 while (slot_frag
!= first_frag
)
2574 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2576 /* Add in the full size of the frag converted to instruction slots. */
2577 index
+= 3 * (first_frag
->fr_fix
>> 4);
2578 /* Subtract away the initial part before first_addr. */
2579 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2580 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2582 /* Move to the beginning of the next frag. */
2583 first_frag
= first_frag
->fr_next
;
2584 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2587 /* Add in the used part of the last frag. */
2588 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2589 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2593 /* Optimize unwind record directives. */
2595 static unw_rec_list
*
2596 optimize_unw_records (list
)
2602 /* If the only unwind record is ".prologue" or ".prologue" followed
2603 by ".body", then we can optimize the unwind directives away. */
2604 if (list
->r
.type
== prologue
2605 && (list
->next
== NULL
2606 || (list
->next
->r
.type
== body
&& list
->next
->next
== NULL
)))
2612 /* Given a complete record list, process any records which have
2613 unresolved fields, (ie length counts for a prologue). After
2614 this has been run, all neccessary information should be available
2615 within each record to generate an image. */
2618 fixup_unw_records (list
)
2621 unw_rec_list
*ptr
, *region
= 0;
2622 unsigned long first_addr
= 0, rlen
= 0, t
;
2623 fragS
*first_frag
= 0;
2625 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2627 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2628 as_bad (" Insn slot not set in unwind record.");
2629 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2630 first_addr
, first_frag
);
2631 switch (ptr
->r
.type
)
2638 int size
, dir_len
= 0;
2639 unsigned long last_addr
;
2642 first_addr
= ptr
->slot_number
;
2643 first_frag
= ptr
->slot_frag
;
2644 ptr
->slot_number
= 0;
2645 /* Find either the next body/prologue start, or the end of
2646 the list, and determine the size of the region. */
2647 last_addr
= unwind
.next_slot_number
;
2648 last_frag
= unwind
.next_slot_frag
;
2649 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2650 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2651 || last
->r
.type
== body
)
2653 last_addr
= last
->slot_number
;
2654 last_frag
= last
->slot_frag
;
2657 else if (!last
->next
)
2659 /* In the absence of an explicit .body directive,
2660 the prologue ends after the last instruction
2661 covered by an unwind directive. */
2662 if (ptr
->r
.type
!= body
)
2664 last_addr
= last
->slot_number
;
2665 last_frag
= last
->slot_frag
;
2666 switch (last
->r
.type
)
2669 dir_len
= (count_bits (last
->r
.record
.p
.frmask
)
2670 + count_bits (last
->r
.record
.p
.grmask
));
2674 dir_len
+= count_bits (last
->r
.record
.p
.rmask
);
2678 dir_len
+= count_bits (last
->r
.record
.p
.brmask
);
2681 dir_len
+= count_bits (last
->r
.record
.p
.grmask
);
2690 size
= (slot_index (last_addr
, last_frag
, first_addr
, first_frag
)
2692 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2697 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2708 case priunat_when_gr
:
2709 case priunat_when_mem
:
2713 ptr
->r
.record
.p
.t
= t
;
2721 case spill_psprel_p
:
2722 ptr
->r
.record
.x
.t
= t
;
2728 as_bad ("frgr_mem record before region record!\n");
2731 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2732 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2733 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2734 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2739 as_bad ("fr_mem record before region record!\n");
2742 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2743 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2748 as_bad ("gr_mem record before region record!\n");
2751 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2752 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2757 as_bad ("br_mem record before region record!\n");
2760 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2761 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2767 as_bad ("gr_gr record before region record!\n");
2770 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2775 as_bad ("br_gr record before region record!\n");
2778 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2787 /* Helper routine for output_unw_records. Emits the header for the unwind
2791 setup_unwind_header (int size
, unsigned char **mem
)
2795 /* pad to pointer-size boundry. */
2796 x
= size
% md
.pointer_size
;
2798 extra
= md
.pointer_size
- x
;
2800 /* Add 8 for the header + a pointer for the
2801 personality offset. */
2802 *mem
= xmalloc (size
+ extra
+ 8 + md
.pointer_size
);
2804 /* Clear the padding area and personality. */
2805 memset (*mem
+ 8 + size
, 0 , extra
+ md
.pointer_size
);
2806 /* Initialize the header area. */
2808 md_number_to_chars (*mem
, (((bfd_vma
) 1 << 48) /* version */
2809 | (unwind
.personality_routine
2810 ? ((bfd_vma
) 3 << 32) /* U & E handler flags */
2812 | ((size
+ extra
) / md
.pointer_size
)), /* length */
2818 /* Generate an unwind image from a record list. Returns the number of
2819 bytes in the resulting image. The memory image itselof is returned
2820 in the 'ptr' parameter. */
2822 output_unw_records (list
, ptr
)
2831 list
= optimize_unw_records (list
);
2832 fixup_unw_records (list
);
2833 size
= calc_record_size (list
);
2835 if (size
> 0 || unwind
.force_unwind_entry
)
2837 unwind
.force_unwind_entry
= 0;
2838 extra
= setup_unwind_header (size
, &mem
);
2840 vbyte_mem_ptr
= mem
+ 8;
2841 process_unw_records (list
, output_vbyte_mem
);
2845 size
+= extra
+ 8 + md
.pointer_size
;
2851 convert_expr_to_ab_reg (e
, ab
, regp
)
2858 if (e
->X_op
!= O_register
)
2861 reg
= e
->X_add_number
;
2862 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2865 *regp
= reg
- REG_GR
;
2867 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2868 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2871 *regp
= reg
- REG_FR
;
2873 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2876 *regp
= reg
- REG_BR
;
2883 case REG_PR
: *regp
= 0; break;
2884 case REG_PSP
: *regp
= 1; break;
2885 case REG_PRIUNAT
: *regp
= 2; break;
2886 case REG_BR
+ 0: *regp
= 3; break;
2887 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2888 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2889 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2890 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2891 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2892 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2893 case REG_AR
+ AR_LC
: *regp
= 10; break;
2903 convert_expr_to_xy_reg (e
, xy
, regp
)
2910 if (e
->X_op
!= O_register
)
2913 reg
= e
->X_add_number
;
2915 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
2918 *regp
= reg
- REG_GR
;
2920 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
2923 *regp
= reg
- REG_FR
;
2925 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
2928 *regp
= reg
- REG_BR
;
2937 int dummy ATTRIBUTE_UNUSED
;
2942 radix
= *input_line_pointer
++;
2944 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
2946 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
2947 ignore_rest_of_line ();
2952 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
2954 dot_special_section (which
)
2957 set_section ((char *) special_section_name
[which
]);
2961 add_unwind_entry (ptr
)
2965 unwind
.tail
->next
= ptr
;
2970 /* The current entry can in fact be a chain of unwind entries. */
2971 if (unwind
.current_entry
== NULL
)
2972 unwind
.current_entry
= ptr
;
2977 int dummy ATTRIBUTE_UNUSED
;
2983 if (e
.X_op
!= O_constant
)
2984 as_bad ("Operand to .fframe must be a constant");
2986 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
2991 int dummy ATTRIBUTE_UNUSED
;
2997 reg
= e
.X_add_number
- REG_GR
;
2998 if (e
.X_op
== O_register
&& reg
< 128)
3000 add_unwind_entry (output_mem_stack_v ());
3001 if (! (unwind
.prologue_mask
& 2))
3002 add_unwind_entry (output_psp_gr (reg
));
3005 as_bad ("First operand to .vframe must be a general register");
3009 dot_vframesp (dummy
)
3010 int dummy ATTRIBUTE_UNUSED
;
3015 if (e
.X_op
== O_constant
)
3017 add_unwind_entry (output_mem_stack_v ());
3018 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3021 as_bad ("First operand to .vframesp must be a general register");
3025 dot_vframepsp (dummy
)
3026 int dummy ATTRIBUTE_UNUSED
;
3031 if (e
.X_op
== O_constant
)
3033 add_unwind_entry (output_mem_stack_v ());
3034 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3037 as_bad ("First operand to .vframepsp must be a general register");
3042 int dummy ATTRIBUTE_UNUSED
;
3048 sep
= parse_operand (&e1
);
3050 as_bad ("No second operand to .save");
3051 sep
= parse_operand (&e2
);
3053 reg1
= e1
.X_add_number
;
3054 reg2
= e2
.X_add_number
- REG_GR
;
3056 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3057 if (e1
.X_op
== O_register
)
3059 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3063 case REG_AR
+ AR_BSP
:
3064 add_unwind_entry (output_bsp_when ());
3065 add_unwind_entry (output_bsp_gr (reg2
));
3067 case REG_AR
+ AR_BSPSTORE
:
3068 add_unwind_entry (output_bspstore_when ());
3069 add_unwind_entry (output_bspstore_gr (reg2
));
3071 case REG_AR
+ AR_RNAT
:
3072 add_unwind_entry (output_rnat_when ());
3073 add_unwind_entry (output_rnat_gr (reg2
));
3075 case REG_AR
+ AR_UNAT
:
3076 add_unwind_entry (output_unat_when ());
3077 add_unwind_entry (output_unat_gr (reg2
));
3079 case REG_AR
+ AR_FPSR
:
3080 add_unwind_entry (output_fpsr_when ());
3081 add_unwind_entry (output_fpsr_gr (reg2
));
3083 case REG_AR
+ AR_PFS
:
3084 add_unwind_entry (output_pfs_when ());
3085 if (! (unwind
.prologue_mask
& 4))
3086 add_unwind_entry (output_pfs_gr (reg2
));
3088 case REG_AR
+ AR_LC
:
3089 add_unwind_entry (output_lc_when ());
3090 add_unwind_entry (output_lc_gr (reg2
));
3093 add_unwind_entry (output_rp_when ());
3094 if (! (unwind
.prologue_mask
& 8))
3095 add_unwind_entry (output_rp_gr (reg2
));
3098 add_unwind_entry (output_preds_when ());
3099 if (! (unwind
.prologue_mask
& 1))
3100 add_unwind_entry (output_preds_gr (reg2
));
3103 add_unwind_entry (output_priunat_when_gr ());
3104 add_unwind_entry (output_priunat_gr (reg2
));
3107 as_bad ("First operand not a valid register");
3111 as_bad (" Second operand not a valid register");
3114 as_bad ("First operand not a register");
3119 int dummy ATTRIBUTE_UNUSED
;
3122 unsigned long ecount
; /* # of _additional_ regions to pop */
3125 sep
= parse_operand (&e1
);
3126 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3128 as_bad ("First operand to .restore must be stack pointer (sp)");
3134 parse_operand (&e2
);
3135 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3137 as_bad ("Second operand to .restore must be a constant >= 0");
3140 ecount
= e2
.X_add_number
;
3143 ecount
= unwind
.prologue_count
- 1;
3144 add_unwind_entry (output_epilogue (ecount
));
3146 if (ecount
< unwind
.prologue_count
)
3147 unwind
.prologue_count
-= ecount
+ 1;
3149 unwind
.prologue_count
= 0;
3153 dot_restorereg (dummy
)
3154 int dummy ATTRIBUTE_UNUSED
;
3156 unsigned int ab
, reg
;
3161 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3163 as_bad ("First operand to .restorereg must be a preserved register");
3166 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3170 dot_restorereg_p (dummy
)
3171 int dummy ATTRIBUTE_UNUSED
;
3173 unsigned int qp
, ab
, reg
;
3177 sep
= parse_operand (&e1
);
3180 as_bad ("No second operand to .restorereg.p");
3184 parse_operand (&e2
);
3186 qp
= e1
.X_add_number
- REG_P
;
3187 if (e1
.X_op
!= O_register
|| qp
> 63)
3189 as_bad ("First operand to .restorereg.p must be a predicate");
3193 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3195 as_bad ("Second operand to .restorereg.p must be a preserved register");
3198 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3202 generate_unwind_image (text_name
)
3203 const char *text_name
;
3206 unsigned char *unw_rec
;
3208 /* Force out pending instructions, to make sure all unwind records have
3209 a valid slot_number field. */
3210 ia64_flush_insns ();
3212 /* Generate the unwind record. */
3213 size
= output_unw_records (unwind
.list
, (void **) &unw_rec
);
3214 if (size
% md
.pointer_size
!= 0)
3215 as_bad ("Unwind record is not a multiple of %d bytes.", md
.pointer_size
);
3217 /* If there are unwind records, switch sections, and output the info. */
3220 unsigned char *where
;
3224 make_unw_section_name (SPECIAL_SECTION_UNWIND_INFO
, text_name
, sec_name
);
3225 set_section (sec_name
);
3226 bfd_set_section_flags (stdoutput
, now_seg
,
3227 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3229 /* Make sure the section has 4 byte alignment for ILP32 and
3230 8 byte alignment for LP64. */
3231 frag_align (md
.pointer_size_shift
, 0, 0);
3232 record_alignment (now_seg
, md
.pointer_size_shift
);
3234 /* Set expression which points to start of unwind descriptor area. */
3235 unwind
.info
= expr_build_dot ();
3237 where
= (unsigned char *) frag_more (size
);
3239 /* Issue a label for this address, and keep track of it to put it
3240 in the unwind section. */
3242 /* Copy the information from the unwind record into this section. The
3243 data is already in the correct byte order. */
3244 memcpy (where
, unw_rec
, size
);
3246 /* Add the personality address to the image. */
3247 if (unwind
.personality_routine
!= 0)
3249 exp
.X_op
= O_symbol
;
3250 exp
.X_add_symbol
= unwind
.personality_routine
;
3251 exp
.X_add_number
= 0;
3252 fix_new_exp (frag_now
, frag_now_fix () - 8, 8,
3253 &exp
, 0, BFD_RELOC_IA64_LTOFF_FPTR64LSB
);
3254 unwind
.personality_routine
= 0;
3258 free_list_records (unwind
.list
);
3259 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3265 dot_handlerdata (dummy
)
3266 int dummy ATTRIBUTE_UNUSED
;
3268 const char *text_name
= segment_name (now_seg
);
3270 /* If text section name starts with ".text" (which it should),
3271 strip this prefix off. */
3272 if (strcmp (text_name
, ".text") == 0)
3275 unwind
.force_unwind_entry
= 1;
3277 /* Remember which segment we're in so we can switch back after .endp */
3278 unwind
.saved_text_seg
= now_seg
;
3279 unwind
.saved_text_subseg
= now_subseg
;
3281 /* Generate unwind info into unwind-info section and then leave that
3282 section as the currently active one so dataXX directives go into
3283 the language specific data area of the unwind info block. */
3284 generate_unwind_image (text_name
);
3285 demand_empty_rest_of_line ();
3289 dot_unwentry (dummy
)
3290 int dummy ATTRIBUTE_UNUSED
;
3292 unwind
.force_unwind_entry
= 1;
3293 demand_empty_rest_of_line ();
3298 int dummy ATTRIBUTE_UNUSED
;
3304 reg
= e
.X_add_number
- REG_BR
;
3305 if (e
.X_op
== O_register
&& reg
< 8)
3306 add_unwind_entry (output_rp_br (reg
));
3308 as_bad ("First operand not a valid branch register");
3312 dot_savemem (psprel
)
3319 sep
= parse_operand (&e1
);
3321 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3322 sep
= parse_operand (&e2
);
3324 reg1
= e1
.X_add_number
;
3325 val
= e2
.X_add_number
;
3327 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3328 if (e1
.X_op
== O_register
)
3330 if (e2
.X_op
== O_constant
)
3334 case REG_AR
+ AR_BSP
:
3335 add_unwind_entry (output_bsp_when ());
3336 add_unwind_entry ((psprel
3338 : output_bsp_sprel
) (val
));
3340 case REG_AR
+ AR_BSPSTORE
:
3341 add_unwind_entry (output_bspstore_when ());
3342 add_unwind_entry ((psprel
3343 ? output_bspstore_psprel
3344 : output_bspstore_sprel
) (val
));
3346 case REG_AR
+ AR_RNAT
:
3347 add_unwind_entry (output_rnat_when ());
3348 add_unwind_entry ((psprel
3349 ? output_rnat_psprel
3350 : output_rnat_sprel
) (val
));
3352 case REG_AR
+ AR_UNAT
:
3353 add_unwind_entry (output_unat_when ());
3354 add_unwind_entry ((psprel
3355 ? output_unat_psprel
3356 : output_unat_sprel
) (val
));
3358 case REG_AR
+ AR_FPSR
:
3359 add_unwind_entry (output_fpsr_when ());
3360 add_unwind_entry ((psprel
3361 ? output_fpsr_psprel
3362 : output_fpsr_sprel
) (val
));
3364 case REG_AR
+ AR_PFS
:
3365 add_unwind_entry (output_pfs_when ());
3366 add_unwind_entry ((psprel
3368 : output_pfs_sprel
) (val
));
3370 case REG_AR
+ AR_LC
:
3371 add_unwind_entry (output_lc_when ());
3372 add_unwind_entry ((psprel
3374 : output_lc_sprel
) (val
));
3377 add_unwind_entry (output_rp_when ());
3378 add_unwind_entry ((psprel
3380 : output_rp_sprel
) (val
));
3383 add_unwind_entry (output_preds_when ());
3384 add_unwind_entry ((psprel
3385 ? output_preds_psprel
3386 : output_preds_sprel
) (val
));
3389 add_unwind_entry (output_priunat_when_mem ());
3390 add_unwind_entry ((psprel
3391 ? output_priunat_psprel
3392 : output_priunat_sprel
) (val
));
3395 as_bad ("First operand not a valid register");
3399 as_bad (" Second operand not a valid constant");
3402 as_bad ("First operand not a register");
3407 int dummy ATTRIBUTE_UNUSED
;
3411 sep
= parse_operand (&e1
);
3413 parse_operand (&e2
);
3415 if (e1
.X_op
!= O_constant
)
3416 as_bad ("First operand to .save.g must be a constant.");
3419 int grmask
= e1
.X_add_number
;
3421 add_unwind_entry (output_gr_mem (grmask
));
3424 int reg
= e2
.X_add_number
- REG_GR
;
3425 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3426 add_unwind_entry (output_gr_gr (grmask
, reg
));
3428 as_bad ("Second operand is an invalid register.");
3435 int dummy ATTRIBUTE_UNUSED
;
3439 sep
= parse_operand (&e1
);
3441 if (e1
.X_op
!= O_constant
)
3442 as_bad ("Operand to .save.f must be a constant.");
3444 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3449 int dummy ATTRIBUTE_UNUSED
;
3456 sep
= parse_operand (&e1
);
3457 if (e1
.X_op
!= O_constant
)
3459 as_bad ("First operand to .save.b must be a constant.");
3462 brmask
= e1
.X_add_number
;
3466 sep
= parse_operand (&e2
);
3467 reg
= e2
.X_add_number
- REG_GR
;
3468 if (e2
.X_op
!= O_register
|| reg
> 127)
3470 as_bad ("Second operand to .save.b must be a general register.");
3473 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3476 add_unwind_entry (output_br_mem (brmask
));
3478 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3479 ignore_rest_of_line ();
3484 int dummy ATTRIBUTE_UNUSED
;
3488 sep
= parse_operand (&e1
);
3490 parse_operand (&e2
);
3492 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3493 as_bad ("Both operands of .save.gf must be constants.");
3496 int grmask
= e1
.X_add_number
;
3497 int frmask
= e2
.X_add_number
;
3498 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3504 int dummy ATTRIBUTE_UNUSED
;
3509 sep
= parse_operand (&e
);
3510 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3511 ignore_rest_of_line ();
3513 if (e
.X_op
!= O_constant
)
3514 as_bad ("Operand to .spill must be a constant");
3516 add_unwind_entry (output_spill_base (e
.X_add_number
));
3520 dot_spillreg (dummy
)
3521 int dummy ATTRIBUTE_UNUSED
;
3523 int sep
, ab
, xy
, reg
, treg
;
3526 sep
= parse_operand (&e1
);
3529 as_bad ("No second operand to .spillreg");
3533 parse_operand (&e2
);
3535 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3537 as_bad ("First operand to .spillreg must be a preserved register");
3541 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3543 as_bad ("Second operand to .spillreg must be a register");
3547 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3551 dot_spillmem (psprel
)
3557 sep
= parse_operand (&e1
);
3560 as_bad ("Second operand missing");
3564 parse_operand (&e2
);
3566 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3568 as_bad ("First operand to .spill%s must be a preserved register",
3569 psprel
? "psp" : "sp");
3573 if (e2
.X_op
!= O_constant
)
3575 as_bad ("Second operand to .spill%s must be a constant",
3576 psprel
? "psp" : "sp");
3581 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
3583 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
3587 dot_spillreg_p (dummy
)
3588 int dummy ATTRIBUTE_UNUSED
;
3590 int sep
, ab
, xy
, reg
, treg
;
3591 expressionS e1
, e2
, e3
;
3594 sep
= parse_operand (&e1
);
3597 as_bad ("No second and third operand to .spillreg.p");
3601 sep
= parse_operand (&e2
);
3604 as_bad ("No third operand to .spillreg.p");
3608 parse_operand (&e3
);
3610 qp
= e1
.X_add_number
- REG_P
;
3612 if (e1
.X_op
!= O_register
|| qp
> 63)
3614 as_bad ("First operand to .spillreg.p must be a predicate");
3618 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3620 as_bad ("Second operand to .spillreg.p must be a preserved register");
3624 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
3626 as_bad ("Third operand to .spillreg.p must be a register");
3630 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
3634 dot_spillmem_p (psprel
)
3637 expressionS e1
, e2
, e3
;
3641 sep
= parse_operand (&e1
);
3644 as_bad ("Second operand missing");
3648 parse_operand (&e2
);
3651 as_bad ("Second operand missing");
3655 parse_operand (&e3
);
3657 qp
= e1
.X_add_number
- REG_P
;
3658 if (e1
.X_op
!= O_register
|| qp
> 63)
3660 as_bad ("First operand to .spill%s_p must be a predicate",
3661 psprel
? "psp" : "sp");
3665 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3667 as_bad ("Second operand to .spill%s_p must be a preserved register",
3668 psprel
? "psp" : "sp");
3672 if (e3
.X_op
!= O_constant
)
3674 as_bad ("Third operand to .spill%s_p must be a constant",
3675 psprel
? "psp" : "sp");
3680 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3682 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3686 dot_label_state (dummy
)
3687 int dummy ATTRIBUTE_UNUSED
;
3692 if (e
.X_op
!= O_constant
)
3694 as_bad ("Operand to .label_state must be a constant");
3697 add_unwind_entry (output_label_state (e
.X_add_number
));
3701 dot_copy_state (dummy
)
3702 int dummy ATTRIBUTE_UNUSED
;
3707 if (e
.X_op
!= O_constant
)
3709 as_bad ("Operand to .copy_state must be a constant");
3712 add_unwind_entry (output_copy_state (e
.X_add_number
));
3717 int dummy ATTRIBUTE_UNUSED
;
3722 sep
= parse_operand (&e1
);
3725 as_bad ("Second operand to .unwabi missing");
3728 sep
= parse_operand (&e2
);
3729 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3730 ignore_rest_of_line ();
3732 if (e1
.X_op
!= O_constant
)
3734 as_bad ("First operand to .unwabi must be a constant");
3738 if (e2
.X_op
!= O_constant
)
3740 as_bad ("Second operand to .unwabi must be a constant");
3744 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
3748 dot_personality (dummy
)
3749 int dummy ATTRIBUTE_UNUSED
;
3753 name
= input_line_pointer
;
3754 c
= get_symbol_end ();
3755 p
= input_line_pointer
;
3756 unwind
.personality_routine
= symbol_find_or_make (name
);
3757 unwind
.force_unwind_entry
= 1;
3760 demand_empty_rest_of_line ();
3765 int dummy ATTRIBUTE_UNUSED
;
3770 unwind
.proc_start
= expr_build_dot ();
3771 /* Parse names of main and alternate entry points and mark them as
3772 function symbols: */
3776 name
= input_line_pointer
;
3777 c
= get_symbol_end ();
3778 p
= input_line_pointer
;
3779 sym
= symbol_find_or_make (name
);
3780 if (unwind
.proc_start
== 0)
3782 unwind
.proc_start
= sym
;
3784 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
3787 if (*input_line_pointer
!= ',')
3789 ++input_line_pointer
;
3791 demand_empty_rest_of_line ();
3794 unwind
.prologue_count
= 0;
3795 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3796 unwind
.personality_routine
= 0;
3801 int dummy ATTRIBUTE_UNUSED
;
3803 unwind
.prologue
= 0;
3804 unwind
.prologue_mask
= 0;
3806 add_unwind_entry (output_body ());
3807 demand_empty_rest_of_line ();
3811 dot_prologue (dummy
)
3812 int dummy ATTRIBUTE_UNUSED
;
3815 int mask
= 0, grsave
= 0;
3817 if (!is_it_end_of_statement ())
3820 sep
= parse_operand (&e1
);
3822 as_bad ("No second operand to .prologue");
3823 sep
= parse_operand (&e2
);
3824 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3825 ignore_rest_of_line ();
3827 if (e1
.X_op
== O_constant
)
3829 mask
= e1
.X_add_number
;
3831 if (e2
.X_op
== O_constant
)
3832 grsave
= e2
.X_add_number
;
3833 else if (e2
.X_op
== O_register
3834 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
3837 as_bad ("Second operand not a constant or general register");
3839 add_unwind_entry (output_prologue_gr (mask
, grsave
));
3842 as_bad ("First operand not a constant");
3845 add_unwind_entry (output_prologue ());
3847 unwind
.prologue
= 1;
3848 unwind
.prologue_mask
= mask
;
3849 ++unwind
.prologue_count
;
3854 int dummy ATTRIBUTE_UNUSED
;
3858 int bytes_per_address
;
3861 subsegT saved_subseg
;
3862 const char *sec_name
, *text_name
;
3866 if (unwind
.saved_text_seg
)
3868 saved_seg
= unwind
.saved_text_seg
;
3869 saved_subseg
= unwind
.saved_text_subseg
;
3870 unwind
.saved_text_seg
= NULL
;
3874 saved_seg
= now_seg
;
3875 saved_subseg
= now_subseg
;
3879 Use a slightly ugly scheme to derive the unwind section names from
3880 the text section name:
3882 text sect. unwind table sect.
3883 name: name: comments:
3884 ---------- ----------------- --------------------------------
3886 .text.foo .IA_64.unwind.text.foo
3887 .foo .IA_64.unwind.foo
3889 .gnu.linkonce.ia64unw.foo
3890 _info .IA_64.unwind_info gas issues error message (ditto)
3891 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3893 This mapping is done so that:
3895 (a) An object file with unwind info only in .text will use
3896 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3897 This follows the letter of the ABI and also ensures backwards
3898 compatibility with older toolchains.
3900 (b) An object file with unwind info in multiple text sections
3901 will use separate unwind sections for each text section.
3902 This allows us to properly set the "sh_info" and "sh_link"
3903 fields in SHT_IA_64_UNWIND as required by the ABI and also
3904 lets GNU ld support programs with multiple segments
3905 containing unwind info (as might be the case for certain
3906 embedded applications).
3908 (c) An error is issued if there would be a name clash.
3910 text_name
= segment_name (saved_seg
);
3911 if (strncmp (text_name
, "_info", 5) == 0)
3913 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3915 ignore_rest_of_line ();
3918 if (strcmp (text_name
, ".text") == 0)
3921 insn_group_break (1, 0, 0);
3923 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
3925 generate_unwind_image (text_name
);
3927 if (unwind
.info
|| unwind
.force_unwind_entry
)
3929 subseg_set (md
.last_text_seg
, 0);
3930 unwind
.proc_end
= expr_build_dot ();
3932 make_unw_section_name (SPECIAL_SECTION_UNWIND
, text_name
, sec_name
);
3933 set_section ((char *) sec_name
);
3934 bfd_set_section_flags (stdoutput
, now_seg
,
3935 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3937 /* Make sure that section has 4 byte alignment for ILP32 and
3938 8 byte alignment for LP64. */
3939 record_alignment (now_seg
, md
.pointer_size_shift
);
3941 /* Need space for 3 pointers for procedure start, procedure end,
3943 ptr
= frag_more (3 * md
.pointer_size
);
3944 where
= frag_now_fix () - (3 * md
.pointer_size
);
3945 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
3947 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
3948 e
.X_op
= O_pseudo_fixup
;
3949 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
3951 e
.X_add_symbol
= unwind
.proc_start
;
3952 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
3954 e
.X_op
= O_pseudo_fixup
;
3955 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
3957 e
.X_add_symbol
= unwind
.proc_end
;
3958 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
3959 bytes_per_address
, &e
);
3963 e
.X_op
= O_pseudo_fixup
;
3964 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
3966 e
.X_add_symbol
= unwind
.info
;
3967 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
3968 bytes_per_address
, &e
);
3971 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
3975 subseg_set (saved_seg
, saved_subseg
);
3977 /* Parse names of main and alternate entry points and set symbol sizes. */
3981 name
= input_line_pointer
;
3982 c
= get_symbol_end ();
3983 p
= input_line_pointer
;
3984 sym
= symbol_find (name
);
3985 if (sym
&& unwind
.proc_start
3986 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
3987 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
3989 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
3990 fragS
*frag
= symbol_get_frag (sym
);
3992 /* Check whether the function label is at or beyond last
3994 while (fr
&& fr
!= frag
)
3998 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
3999 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4002 symbol_get_obj (sym
)->size
=
4003 (expressionS
*) xmalloc (sizeof (expressionS
));
4004 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4005 symbol_get_obj (sym
)->size
->X_add_symbol
4006 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4007 frag_now_fix (), frag_now
);
4008 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4009 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4015 if (*input_line_pointer
!= ',')
4017 ++input_line_pointer
;
4019 demand_empty_rest_of_line ();
4020 unwind
.proc_start
= unwind
.proc_end
= unwind
.info
= 0;
4024 dot_template (template)
4027 CURR_SLOT
.user_template
= template;
4032 int dummy ATTRIBUTE_UNUSED
;
4034 int ins
, locs
, outs
, rots
;
4036 if (is_it_end_of_statement ())
4037 ins
= locs
= outs
= rots
= 0;
4040 ins
= get_absolute_expression ();
4041 if (*input_line_pointer
++ != ',')
4043 locs
= get_absolute_expression ();
4044 if (*input_line_pointer
++ != ',')
4046 outs
= get_absolute_expression ();
4047 if (*input_line_pointer
++ != ',')
4049 rots
= get_absolute_expression ();
4051 set_regstack (ins
, locs
, outs
, rots
);
4055 as_bad ("Comma expected");
4056 ignore_rest_of_line ();
4063 unsigned num_regs
, num_alloced
= 0;
4064 struct dynreg
**drpp
, *dr
;
4065 int ch
, base_reg
= 0;
4071 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4072 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4073 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4077 /* First, remove existing names from hash table. */
4078 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4080 hash_delete (md
.dynreg_hash
, dr
->name
);
4084 drpp
= &md
.dynreg
[type
];
4087 start
= input_line_pointer
;
4088 ch
= get_symbol_end ();
4089 *input_line_pointer
= ch
;
4090 len
= (input_line_pointer
- start
);
4093 if (*input_line_pointer
!= '[')
4095 as_bad ("Expected '['");
4098 ++input_line_pointer
; /* skip '[' */
4100 num_regs
= get_absolute_expression ();
4102 if (*input_line_pointer
++ != ']')
4104 as_bad ("Expected ']'");
4109 num_alloced
+= num_regs
;
4113 if (num_alloced
> md
.rot
.num_regs
)
4115 as_bad ("Used more than the declared %d rotating registers",
4121 if (num_alloced
> 96)
4123 as_bad ("Used more than the available 96 rotating registers");
4128 if (num_alloced
> 48)
4130 as_bad ("Used more than the available 48 rotating registers");
4139 name
= obstack_alloc (¬es
, len
+ 1);
4140 memcpy (name
, start
, len
);
4145 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4146 memset (*drpp
, 0, sizeof (*dr
));
4151 dr
->num_regs
= num_regs
;
4152 dr
->base
= base_reg
;
4154 base_reg
+= num_regs
;
4156 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4158 as_bad ("Attempt to redefine register set `%s'", name
);
4162 if (*input_line_pointer
!= ',')
4164 ++input_line_pointer
; /* skip comma */
4167 demand_empty_rest_of_line ();
4171 ignore_rest_of_line ();
4175 dot_byteorder (byteorder
)
4178 target_big_endian
= byteorder
;
4183 int dummy ATTRIBUTE_UNUSED
;
4190 option
= input_line_pointer
;
4191 ch
= get_symbol_end ();
4192 if (strcmp (option
, "lsb") == 0)
4193 md
.flags
&= ~EF_IA_64_BE
;
4194 else if (strcmp (option
, "msb") == 0)
4195 md
.flags
|= EF_IA_64_BE
;
4196 else if (strcmp (option
, "abi32") == 0)
4197 md
.flags
&= ~EF_IA_64_ABI64
;
4198 else if (strcmp (option
, "abi64") == 0)
4199 md
.flags
|= EF_IA_64_ABI64
;
4201 as_bad ("Unknown psr option `%s'", option
);
4202 *input_line_pointer
= ch
;
4205 if (*input_line_pointer
!= ',')
4208 ++input_line_pointer
;
4211 demand_empty_rest_of_line ();
4216 int dummy ATTRIBUTE_UNUSED
;
4218 as_bad (".alias not implemented yet");
4223 int dummy ATTRIBUTE_UNUSED
;
4225 new_logical_line (0, get_absolute_expression ());
4226 demand_empty_rest_of_line ();
4230 parse_section_name ()
4236 if (*input_line_pointer
!= '"')
4238 as_bad ("Missing section name");
4239 ignore_rest_of_line ();
4242 name
= demand_copy_C_string (&len
);
4245 ignore_rest_of_line ();
4249 if (*input_line_pointer
!= ',')
4251 as_bad ("Comma expected after section name");
4252 ignore_rest_of_line ();
4255 ++input_line_pointer
; /* skip comma */
4263 char *name
= parse_section_name ();
4267 md
.keep_pending_output
= 1;
4270 obj_elf_previous (0);
4271 md
.keep_pending_output
= 0;
4274 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4277 stmt_float_cons (kind
)
4284 case 'd': size
= 8; break;
4285 case 'x': size
= 10; break;
4292 ia64_do_align (size
);
4300 int saved_auto_align
= md
.auto_align
;
4304 md
.auto_align
= saved_auto_align
;
4308 dot_xfloat_cons (kind
)
4311 char *name
= parse_section_name ();
4315 md
.keep_pending_output
= 1;
4317 stmt_float_cons (kind
);
4318 obj_elf_previous (0);
4319 md
.keep_pending_output
= 0;
4323 dot_xstringer (zero
)
4326 char *name
= parse_section_name ();
4330 md
.keep_pending_output
= 1;
4333 obj_elf_previous (0);
4334 md
.keep_pending_output
= 0;
4341 int saved_auto_align
= md
.auto_align
;
4342 char *name
= parse_section_name ();
4346 md
.keep_pending_output
= 1;
4350 md
.auto_align
= saved_auto_align
;
4351 obj_elf_previous (0);
4352 md
.keep_pending_output
= 0;
4356 dot_xfloat_cons_ua (kind
)
4359 int saved_auto_align
= md
.auto_align
;
4360 char *name
= parse_section_name ();
4364 md
.keep_pending_output
= 1;
4367 stmt_float_cons (kind
);
4368 md
.auto_align
= saved_auto_align
;
4369 obj_elf_previous (0);
4370 md
.keep_pending_output
= 0;
4373 /* .reg.val <regname>,value */
4377 int dummy ATTRIBUTE_UNUSED
;
4382 if (reg
.X_op
!= O_register
)
4384 as_bad (_("Register name expected"));
4385 ignore_rest_of_line ();
4387 else if (*input_line_pointer
++ != ',')
4389 as_bad (_("Comma expected"));
4390 ignore_rest_of_line ();
4394 valueT value
= get_absolute_expression ();
4395 int regno
= reg
.X_add_number
;
4396 if (regno
< REG_GR
|| regno
> REG_GR
+ 128)
4397 as_warn (_("Register value annotation ignored"));
4400 gr_values
[regno
- REG_GR
].known
= 1;
4401 gr_values
[regno
- REG_GR
].value
= value
;
4402 gr_values
[regno
- REG_GR
].path
= md
.path
;
4405 demand_empty_rest_of_line ();
4408 /* select dv checking mode
4413 A stop is inserted when changing modes
4420 if (md
.manual_bundling
)
4421 as_warn (_("Directive invalid within a bundle"));
4423 if (type
== 'E' || type
== 'A')
4424 md
.mode_explicitly_set
= 0;
4426 md
.mode_explicitly_set
= 1;
4433 if (md
.explicit_mode
)
4434 insn_group_break (1, 0, 0);
4435 md
.explicit_mode
= 0;
4439 if (!md
.explicit_mode
)
4440 insn_group_break (1, 0, 0);
4441 md
.explicit_mode
= 1;
4445 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4446 insn_group_break (1, 0, 0);
4447 md
.explicit_mode
= md
.default_explicit_mode
;
4448 md
.mode_explicitly_set
= 0;
4459 for (regno
= 0; regno
< 64; regno
++)
4461 if (mask
& ((valueT
) 1 << regno
))
4463 fprintf (stderr
, "%s p%d", comma
, regno
);
4470 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4471 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4472 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4473 .pred.safe_across_calls p1 [, p2 [,...]]
4482 int p1
= -1, p2
= -1;
4486 if (*input_line_pointer
!= '"')
4488 as_bad (_("Missing predicate relation type"));
4489 ignore_rest_of_line ();
4495 char *form
= demand_copy_C_string (&len
);
4496 if (strcmp (form
, "mutex") == 0)
4498 else if (strcmp (form
, "clear") == 0)
4500 else if (strcmp (form
, "imply") == 0)
4504 as_bad (_("Unrecognized predicate relation type"));
4505 ignore_rest_of_line ();
4509 if (*input_line_pointer
== ',')
4510 ++input_line_pointer
;
4520 if (TOUPPER (*input_line_pointer
) != 'P'
4521 || (regno
= atoi (++input_line_pointer
)) < 0
4524 as_bad (_("Predicate register expected"));
4525 ignore_rest_of_line ();
4528 while (ISDIGIT (*input_line_pointer
))
4529 ++input_line_pointer
;
4536 as_warn (_("Duplicate predicate register ignored"));
4539 /* See if it's a range. */
4540 if (*input_line_pointer
== '-')
4543 ++input_line_pointer
;
4545 if (TOUPPER (*input_line_pointer
) != 'P'
4546 || (regno
= atoi (++input_line_pointer
)) < 0
4549 as_bad (_("Predicate register expected"));
4550 ignore_rest_of_line ();
4553 while (ISDIGIT (*input_line_pointer
))
4554 ++input_line_pointer
;
4558 as_bad (_("Bad register range"));
4559 ignore_rest_of_line ();
4570 if (*input_line_pointer
!= ',')
4572 ++input_line_pointer
;
4581 clear_qp_mutex (mask
);
4582 clear_qp_implies (mask
, (valueT
) 0);
4585 if (count
!= 2 || p1
== -1 || p2
== -1)
4586 as_bad (_("Predicate source and target required"));
4587 else if (p1
== 0 || p2
== 0)
4588 as_bad (_("Use of p0 is not valid in this context"));
4590 add_qp_imply (p1
, p2
);
4595 as_bad (_("At least two PR arguments expected"));
4600 as_bad (_("Use of p0 is not valid in this context"));
4603 add_qp_mutex (mask
);
4606 /* note that we don't override any existing relations */
4609 as_bad (_("At least one PR argument expected"));
4614 fprintf (stderr
, "Safe across calls: ");
4615 print_prmask (mask
);
4616 fprintf (stderr
, "\n");
4618 qp_safe_across_calls
= mask
;
4621 demand_empty_rest_of_line ();
4624 /* .entry label [, label [, ...]]
4625 Hint to DV code that the given labels are to be considered entry points.
4626 Otherwise, only global labels are considered entry points. */
4630 int dummy ATTRIBUTE_UNUSED
;
4639 name
= input_line_pointer
;
4640 c
= get_symbol_end ();
4641 symbolP
= symbol_find_or_make (name
);
4643 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
4645 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4648 *input_line_pointer
= c
;
4650 c
= *input_line_pointer
;
4653 input_line_pointer
++;
4655 if (*input_line_pointer
== '\n')
4661 demand_empty_rest_of_line ();
4664 /* .mem.offset offset, base
4665 "base" is used to distinguish between offsets from a different base. */
4668 dot_mem_offset (dummy
)
4669 int dummy ATTRIBUTE_UNUSED
;
4671 md
.mem_offset
.hint
= 1;
4672 md
.mem_offset
.offset
= get_absolute_expression ();
4673 if (*input_line_pointer
!= ',')
4675 as_bad (_("Comma expected"));
4676 ignore_rest_of_line ();
4679 ++input_line_pointer
;
4680 md
.mem_offset
.base
= get_absolute_expression ();
4681 demand_empty_rest_of_line ();
4684 /* ia64-specific pseudo-ops: */
4685 const pseudo_typeS md_pseudo_table
[] =
4687 { "radix", dot_radix
, 0 },
4688 { "lcomm", s_lcomm_bytes
, 1 },
4689 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
4690 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
4691 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
4692 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
4693 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
4694 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
4695 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
4696 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
4697 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
4698 { "proc", dot_proc
, 0 },
4699 { "body", dot_body
, 0 },
4700 { "prologue", dot_prologue
, 0 },
4701 { "endp", dot_endp
, 0 },
4702 { "file", dwarf2_directive_file
, 0 },
4703 { "loc", dwarf2_directive_loc
, 0 },
4705 { "fframe", dot_fframe
, 0 },
4706 { "vframe", dot_vframe
, 0 },
4707 { "vframesp", dot_vframesp
, 0 },
4708 { "vframepsp", dot_vframepsp
, 0 },
4709 { "save", dot_save
, 0 },
4710 { "restore", dot_restore
, 0 },
4711 { "restorereg", dot_restorereg
, 0 },
4712 { "restorereg.p", dot_restorereg_p
, 0 },
4713 { "handlerdata", dot_handlerdata
, 0 },
4714 { "unwentry", dot_unwentry
, 0 },
4715 { "altrp", dot_altrp
, 0 },
4716 { "savesp", dot_savemem
, 0 },
4717 { "savepsp", dot_savemem
, 1 },
4718 { "save.g", dot_saveg
, 0 },
4719 { "save.f", dot_savef
, 0 },
4720 { "save.b", dot_saveb
, 0 },
4721 { "save.gf", dot_savegf
, 0 },
4722 { "spill", dot_spill
, 0 },
4723 { "spillreg", dot_spillreg
, 0 },
4724 { "spillsp", dot_spillmem
, 0 },
4725 { "spillpsp", dot_spillmem
, 1 },
4726 { "spillreg.p", dot_spillreg_p
, 0 },
4727 { "spillsp.p", dot_spillmem_p
, 0 },
4728 { "spillpsp.p", dot_spillmem_p
, 1 },
4729 { "label_state", dot_label_state
, 0 },
4730 { "copy_state", dot_copy_state
, 0 },
4731 { "unwabi", dot_unwabi
, 0 },
4732 { "personality", dot_personality
, 0 },
4734 { "estate", dot_estate
, 0 },
4736 { "mii", dot_template
, 0x0 },
4737 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
4738 { "mlx", dot_template
, 0x2 },
4739 { "mmi", dot_template
, 0x4 },
4740 { "mfi", dot_template
, 0x6 },
4741 { "mmf", dot_template
, 0x7 },
4742 { "mib", dot_template
, 0x8 },
4743 { "mbb", dot_template
, 0x9 },
4744 { "bbb", dot_template
, 0xb },
4745 { "mmb", dot_template
, 0xc },
4746 { "mfb", dot_template
, 0xe },
4748 { "lb", dot_scope
, 0 },
4749 { "le", dot_scope
, 1 },
4751 { "align", s_align_bytes
, 0 },
4752 { "regstk", dot_regstk
, 0 },
4753 { "rotr", dot_rot
, DYNREG_GR
},
4754 { "rotf", dot_rot
, DYNREG_FR
},
4755 { "rotp", dot_rot
, DYNREG_PR
},
4756 { "lsb", dot_byteorder
, 0 },
4757 { "msb", dot_byteorder
, 1 },
4758 { "psr", dot_psr
, 0 },
4759 { "alias", dot_alias
, 0 },
4760 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
4762 { "xdata1", dot_xdata
, 1 },
4763 { "xdata2", dot_xdata
, 2 },
4764 { "xdata4", dot_xdata
, 4 },
4765 { "xdata8", dot_xdata
, 8 },
4766 { "xreal4", dot_xfloat_cons
, 'f' },
4767 { "xreal8", dot_xfloat_cons
, 'd' },
4768 { "xreal10", dot_xfloat_cons
, 'x' },
4769 { "xstring", dot_xstringer
, 0 },
4770 { "xstringz", dot_xstringer
, 1 },
4772 /* unaligned versions: */
4773 { "xdata2.ua", dot_xdata_ua
, 2 },
4774 { "xdata4.ua", dot_xdata_ua
, 4 },
4775 { "xdata8.ua", dot_xdata_ua
, 8 },
4776 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
4777 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
4778 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
4780 /* annotations/DV checking support */
4781 { "entry", dot_entry
, 0 },
4782 { "mem.offset", dot_mem_offset
, 0 },
4783 { "pred.rel", dot_pred_rel
, 0 },
4784 { "pred.rel.clear", dot_pred_rel
, 'c' },
4785 { "pred.rel.imply", dot_pred_rel
, 'i' },
4786 { "pred.rel.mutex", dot_pred_rel
, 'm' },
4787 { "pred.safe_across_calls", dot_pred_rel
, 's' },
4788 { "reg.val", dot_reg_val
, 0 },
4789 { "auto", dot_dv_mode
, 'a' },
4790 { "explicit", dot_dv_mode
, 'e' },
4791 { "default", dot_dv_mode
, 'd' },
4793 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
4794 IA-64 aligns data allocation pseudo-ops by default, so we have to
4795 tell it that these ones are supposed to be unaligned. Long term,
4796 should rewrite so that only IA-64 specific data allocation pseudo-ops
4797 are aligned by default. */
4798 {"2byte", stmt_cons_ua
, 2},
4799 {"4byte", stmt_cons_ua
, 4},
4800 {"8byte", stmt_cons_ua
, 8},
4805 static const struct pseudo_opcode
4808 void (*handler
) (int);
4813 /* these are more like pseudo-ops, but don't start with a dot */
4814 { "data1", cons
, 1 },
4815 { "data2", cons
, 2 },
4816 { "data4", cons
, 4 },
4817 { "data8", cons
, 8 },
4818 { "data16", cons
, 16 },
4819 { "real4", stmt_float_cons
, 'f' },
4820 { "real8", stmt_float_cons
, 'd' },
4821 { "real10", stmt_float_cons
, 'x' },
4822 { "string", stringer
, 0 },
4823 { "stringz", stringer
, 1 },
4825 /* unaligned versions: */
4826 { "data2.ua", stmt_cons_ua
, 2 },
4827 { "data4.ua", stmt_cons_ua
, 4 },
4828 { "data8.ua", stmt_cons_ua
, 8 },
4829 { "data16.ua", stmt_cons_ua
, 16 },
4830 { "real4.ua", float_cons
, 'f' },
4831 { "real8.ua", float_cons
, 'd' },
4832 { "real10.ua", float_cons
, 'x' },
4835 /* Declare a register by creating a symbol for it and entering it in
4836 the symbol table. */
4839 declare_register (name
, regnum
)
4846 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
4848 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
4850 as_fatal ("Inserting \"%s\" into register table failed: %s",
4857 declare_register_set (prefix
, num_regs
, base_regnum
)
4865 for (i
= 0; i
< num_regs
; ++i
)
4867 sprintf (name
, "%s%u", prefix
, i
);
4868 declare_register (name
, base_regnum
+ i
);
4873 operand_width (opnd
)
4874 enum ia64_opnd opnd
;
4876 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
4877 unsigned int bits
= 0;
4881 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
4882 bits
+= odesc
->field
[i
].bits
;
4887 static enum operand_match_result
4888 operand_match (idesc
, index
, e
)
4889 const struct ia64_opcode
*idesc
;
4893 enum ia64_opnd opnd
= idesc
->operands
[index
];
4894 int bits
, relocatable
= 0;
4895 struct insn_fix
*fix
;
4902 case IA64_OPND_AR_CCV
:
4903 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
4904 return OPERAND_MATCH
;
4907 case IA64_OPND_AR_PFS
:
4908 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
4909 return OPERAND_MATCH
;
4913 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
4914 return OPERAND_MATCH
;
4918 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
4919 return OPERAND_MATCH
;
4923 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
4924 return OPERAND_MATCH
;
4927 case IA64_OPND_PR_ROT
:
4928 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
4929 return OPERAND_MATCH
;
4933 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
4934 return OPERAND_MATCH
;
4937 case IA64_OPND_PSR_L
:
4938 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
4939 return OPERAND_MATCH
;
4942 case IA64_OPND_PSR_UM
:
4943 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
4944 return OPERAND_MATCH
;
4948 if (e
->X_op
== O_constant
)
4950 if (e
->X_add_number
== 1)
4951 return OPERAND_MATCH
;
4953 return OPERAND_OUT_OF_RANGE
;
4958 if (e
->X_op
== O_constant
)
4960 if (e
->X_add_number
== 8)
4961 return OPERAND_MATCH
;
4963 return OPERAND_OUT_OF_RANGE
;
4968 if (e
->X_op
== O_constant
)
4970 if (e
->X_add_number
== 16)
4971 return OPERAND_MATCH
;
4973 return OPERAND_OUT_OF_RANGE
;
4977 /* register operands: */
4980 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
4981 && e
->X_add_number
< REG_AR
+ 128)
4982 return OPERAND_MATCH
;
4987 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
4988 && e
->X_add_number
< REG_BR
+ 8)
4989 return OPERAND_MATCH
;
4993 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
4994 && e
->X_add_number
< REG_CR
+ 128)
4995 return OPERAND_MATCH
;
5002 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5003 && e
->X_add_number
< REG_FR
+ 128)
5004 return OPERAND_MATCH
;
5009 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5010 && e
->X_add_number
< REG_P
+ 64)
5011 return OPERAND_MATCH
;
5017 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5018 && e
->X_add_number
< REG_GR
+ 128)
5019 return OPERAND_MATCH
;
5022 case IA64_OPND_R3_2
:
5023 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5025 if (e
->X_add_number
< REG_GR
+ 4)
5026 return OPERAND_MATCH
;
5027 else if (e
->X_add_number
< REG_GR
+ 128)
5028 return OPERAND_OUT_OF_RANGE
;
5032 /* indirect operands: */
5033 case IA64_OPND_CPUID_R3
:
5034 case IA64_OPND_DBR_R3
:
5035 case IA64_OPND_DTR_R3
:
5036 case IA64_OPND_ITR_R3
:
5037 case IA64_OPND_IBR_R3
:
5038 case IA64_OPND_MSR_R3
:
5039 case IA64_OPND_PKR_R3
:
5040 case IA64_OPND_PMC_R3
:
5041 case IA64_OPND_PMD_R3
:
5042 case IA64_OPND_RR_R3
:
5043 if (e
->X_op
== O_index
&& e
->X_op_symbol
5044 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5045 == opnd
- IA64_OPND_CPUID_R3
))
5046 return OPERAND_MATCH
;
5050 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5051 return OPERAND_MATCH
;
5054 /* immediate operands: */
5055 case IA64_OPND_CNT2a
:
5056 case IA64_OPND_LEN4
:
5057 case IA64_OPND_LEN6
:
5058 bits
= operand_width (idesc
->operands
[index
]);
5059 if (e
->X_op
== O_constant
)
5061 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5062 return OPERAND_MATCH
;
5064 return OPERAND_OUT_OF_RANGE
;
5068 case IA64_OPND_CNT2b
:
5069 if (e
->X_op
== O_constant
)
5071 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5072 return OPERAND_MATCH
;
5074 return OPERAND_OUT_OF_RANGE
;
5078 case IA64_OPND_CNT2c
:
5079 val
= e
->X_add_number
;
5080 if (e
->X_op
== O_constant
)
5082 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5083 return OPERAND_MATCH
;
5085 return OPERAND_OUT_OF_RANGE
;
5090 /* SOR must be an integer multiple of 8 */
5091 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5092 return OPERAND_OUT_OF_RANGE
;
5095 if (e
->X_op
== O_constant
)
5097 if ((bfd_vma
) e
->X_add_number
<= 96)
5098 return OPERAND_MATCH
;
5100 return OPERAND_OUT_OF_RANGE
;
5104 case IA64_OPND_IMMU62
:
5105 if (e
->X_op
== O_constant
)
5107 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5108 return OPERAND_MATCH
;
5110 return OPERAND_OUT_OF_RANGE
;
5114 /* FIXME -- need 62-bit relocation type */
5115 as_bad (_("62-bit relocation not yet implemented"));
5119 case IA64_OPND_IMMU64
:
5120 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5121 || e
->X_op
== O_subtract
)
5123 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5124 fix
->code
= BFD_RELOC_IA64_IMM64
;
5125 if (e
->X_op
!= O_subtract
)
5127 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5128 if (e
->X_op
== O_pseudo_fixup
)
5132 fix
->opnd
= idesc
->operands
[index
];
5135 ++CURR_SLOT
.num_fixups
;
5136 return OPERAND_MATCH
;
5138 else if (e
->X_op
== O_constant
)
5139 return OPERAND_MATCH
;
5142 case IA64_OPND_CCNT5
:
5143 case IA64_OPND_CNT5
:
5144 case IA64_OPND_CNT6
:
5145 case IA64_OPND_CPOS6a
:
5146 case IA64_OPND_CPOS6b
:
5147 case IA64_OPND_CPOS6c
:
5148 case IA64_OPND_IMMU2
:
5149 case IA64_OPND_IMMU7a
:
5150 case IA64_OPND_IMMU7b
:
5151 case IA64_OPND_IMMU21
:
5152 case IA64_OPND_IMMU24
:
5153 case IA64_OPND_MBTYPE4
:
5154 case IA64_OPND_MHTYPE8
:
5155 case IA64_OPND_POS6
:
5156 bits
= operand_width (idesc
->operands
[index
]);
5157 if (e
->X_op
== O_constant
)
5159 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5160 return OPERAND_MATCH
;
5162 return OPERAND_OUT_OF_RANGE
;
5166 case IA64_OPND_IMMU9
:
5167 bits
= operand_width (idesc
->operands
[index
]);
5168 if (e
->X_op
== O_constant
)
5170 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5172 int lobits
= e
->X_add_number
& 0x3;
5173 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5174 e
->X_add_number
|= (bfd_vma
) 0x3;
5175 return OPERAND_MATCH
;
5178 return OPERAND_OUT_OF_RANGE
;
5182 case IA64_OPND_IMM44
:
5183 /* least 16 bits must be zero */
5184 if ((e
->X_add_number
& 0xffff) != 0)
5185 /* XXX technically, this is wrong: we should not be issuing warning
5186 messages until we're sure this instruction pattern is going to
5188 as_warn (_("lower 16 bits of mask ignored"));
5190 if (e
->X_op
== O_constant
)
5192 if (((e
->X_add_number
>= 0
5193 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5194 || (e
->X_add_number
< 0
5195 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5198 if (e
->X_add_number
>= 0
5199 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5201 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5203 return OPERAND_MATCH
;
5206 return OPERAND_OUT_OF_RANGE
;
5210 case IA64_OPND_IMM17
:
5211 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5212 if (e
->X_op
== O_constant
)
5214 if (((e
->X_add_number
>= 0
5215 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5216 || (e
->X_add_number
< 0
5217 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5220 if (e
->X_add_number
>= 0
5221 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5223 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5225 return OPERAND_MATCH
;
5228 return OPERAND_OUT_OF_RANGE
;
5232 case IA64_OPND_IMM14
:
5233 case IA64_OPND_IMM22
:
5235 case IA64_OPND_IMM1
:
5236 case IA64_OPND_IMM8
:
5237 case IA64_OPND_IMM8U4
:
5238 case IA64_OPND_IMM8M1
:
5239 case IA64_OPND_IMM8M1U4
:
5240 case IA64_OPND_IMM8M1U8
:
5241 case IA64_OPND_IMM9a
:
5242 case IA64_OPND_IMM9b
:
5243 bits
= operand_width (idesc
->operands
[index
]);
5244 if (relocatable
&& (e
->X_op
== O_symbol
5245 || e
->X_op
== O_subtract
5246 || e
->X_op
== O_pseudo_fixup
))
5248 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5250 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5251 fix
->code
= BFD_RELOC_IA64_IMM14
;
5253 fix
->code
= BFD_RELOC_IA64_IMM22
;
5255 if (e
->X_op
!= O_subtract
)
5257 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5258 if (e
->X_op
== O_pseudo_fixup
)
5262 fix
->opnd
= idesc
->operands
[index
];
5265 ++CURR_SLOT
.num_fixups
;
5266 return OPERAND_MATCH
;
5268 else if (e
->X_op
!= O_constant
5269 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5270 return OPERAND_MISMATCH
;
5272 if (opnd
== IA64_OPND_IMM8M1U4
)
5274 /* Zero is not valid for unsigned compares that take an adjusted
5275 constant immediate range. */
5276 if (e
->X_add_number
== 0)
5277 return OPERAND_OUT_OF_RANGE
;
5279 /* Sign-extend 32-bit unsigned numbers, so that the following range
5280 checks will work. */
5281 val
= e
->X_add_number
;
5282 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5283 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5284 val
= ((val
<< 32) >> 32);
5286 /* Check for 0x100000000. This is valid because
5287 0x100000000-1 is the same as ((uint32_t) -1). */
5288 if (val
== ((bfd_signed_vma
) 1 << 32))
5289 return OPERAND_MATCH
;
5293 else if (opnd
== IA64_OPND_IMM8M1U8
)
5295 /* Zero is not valid for unsigned compares that take an adjusted
5296 constant immediate range. */
5297 if (e
->X_add_number
== 0)
5298 return OPERAND_OUT_OF_RANGE
;
5300 /* Check for 0x10000000000000000. */
5301 if (e
->X_op
== O_big
)
5303 if (generic_bignum
[0] == 0
5304 && generic_bignum
[1] == 0
5305 && generic_bignum
[2] == 0
5306 && generic_bignum
[3] == 0
5307 && generic_bignum
[4] == 1)
5308 return OPERAND_MATCH
;
5310 return OPERAND_OUT_OF_RANGE
;
5313 val
= e
->X_add_number
- 1;
5315 else if (opnd
== IA64_OPND_IMM8M1
)
5316 val
= e
->X_add_number
- 1;
5317 else if (opnd
== IA64_OPND_IMM8U4
)
5319 /* Sign-extend 32-bit unsigned numbers, so that the following range
5320 checks will work. */
5321 val
= e
->X_add_number
;
5322 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5323 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5324 val
= ((val
<< 32) >> 32);
5327 val
= e
->X_add_number
;
5329 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5330 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5331 return OPERAND_MATCH
;
5333 return OPERAND_OUT_OF_RANGE
;
5335 case IA64_OPND_INC3
:
5336 /* +/- 1, 4, 8, 16 */
5337 val
= e
->X_add_number
;
5340 if (e
->X_op
== O_constant
)
5342 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5343 return OPERAND_MATCH
;
5345 return OPERAND_OUT_OF_RANGE
;
5349 case IA64_OPND_TGT25
:
5350 case IA64_OPND_TGT25b
:
5351 case IA64_OPND_TGT25c
:
5352 case IA64_OPND_TGT64
:
5353 if (e
->X_op
== O_symbol
)
5355 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5356 if (opnd
== IA64_OPND_TGT25
)
5357 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5358 else if (opnd
== IA64_OPND_TGT25b
)
5359 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5360 else if (opnd
== IA64_OPND_TGT25c
)
5361 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5362 else if (opnd
== IA64_OPND_TGT64
)
5363 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5367 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5368 fix
->opnd
= idesc
->operands
[index
];
5371 ++CURR_SLOT
.num_fixups
;
5372 return OPERAND_MATCH
;
5374 case IA64_OPND_TAG13
:
5375 case IA64_OPND_TAG13b
:
5379 return OPERAND_MATCH
;
5382 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5383 /* There are no external relocs for TAG13/TAG13b fields, so we
5384 create a dummy reloc. This will not live past md_apply_fix3. */
5385 fix
->code
= BFD_RELOC_UNUSED
;
5386 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5387 fix
->opnd
= idesc
->operands
[index
];
5390 ++CURR_SLOT
.num_fixups
;
5391 return OPERAND_MATCH
;
5401 return OPERAND_MISMATCH
;
5410 memset (e
, 0, sizeof (*e
));
5413 if (*input_line_pointer
!= '}')
5415 sep
= *input_line_pointer
++;
5419 if (!md
.manual_bundling
)
5420 as_warn ("Found '}' when manual bundling is off");
5422 CURR_SLOT
.manual_bundling_off
= 1;
5423 md
.manual_bundling
= 0;
5429 /* Returns the next entry in the opcode table that matches the one in
5430 IDESC, and frees the entry in IDESC. If no matching entry is
5431 found, NULL is returned instead. */
5433 static struct ia64_opcode
*
5434 get_next_opcode (struct ia64_opcode
*idesc
)
5436 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
5437 ia64_free_opcode (idesc
);
5441 /* Parse the operands for the opcode and find the opcode variant that
5442 matches the specified operands, or NULL if no match is possible. */
5444 static struct ia64_opcode
*
5445 parse_operands (idesc
)
5446 struct ia64_opcode
*idesc
;
5448 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
5449 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
5450 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
5451 enum operand_match_result result
;
5453 char *first_arg
= 0, *end
, *saved_input_pointer
;
5456 assert (strlen (idesc
->name
) <= 128);
5458 strcpy (mnemonic
, idesc
->name
);
5459 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5461 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5462 can't parse the first operand until we have parsed the
5463 remaining operands of the "alloc" instruction. */
5465 first_arg
= input_line_pointer
;
5466 end
= strchr (input_line_pointer
, '=');
5469 as_bad ("Expected separator `='");
5472 input_line_pointer
= end
+ 1;
5477 for (; i
< NELEMS (CURR_SLOT
.opnd
); ++i
)
5479 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
5480 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
5485 if (sep
!= '=' && sep
!= ',')
5490 if (num_outputs
> 0)
5491 as_bad ("Duplicate equal sign (=) in instruction");
5493 num_outputs
= i
+ 1;
5498 as_bad ("Illegal operand separator `%c'", sep
);
5502 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5504 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5505 know (strcmp (idesc
->name
, "alloc") == 0);
5506 if (num_operands
== 5 /* first_arg not included in this count! */
5507 && CURR_SLOT
.opnd
[2].X_op
== O_constant
5508 && CURR_SLOT
.opnd
[3].X_op
== O_constant
5509 && CURR_SLOT
.opnd
[4].X_op
== O_constant
5510 && CURR_SLOT
.opnd
[5].X_op
== O_constant
)
5512 sof
= set_regstack (CURR_SLOT
.opnd
[2].X_add_number
,
5513 CURR_SLOT
.opnd
[3].X_add_number
,
5514 CURR_SLOT
.opnd
[4].X_add_number
,
5515 CURR_SLOT
.opnd
[5].X_add_number
);
5517 /* now we can parse the first arg: */
5518 saved_input_pointer
= input_line_pointer
;
5519 input_line_pointer
= first_arg
;
5520 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
5522 --num_outputs
; /* force error */
5523 input_line_pointer
= saved_input_pointer
;
5525 CURR_SLOT
.opnd
[2].X_add_number
= sof
;
5526 CURR_SLOT
.opnd
[3].X_add_number
5527 = sof
- CURR_SLOT
.opnd
[4].X_add_number
;
5528 CURR_SLOT
.opnd
[4] = CURR_SLOT
.opnd
[5];
5532 highest_unmatched_operand
= 0;
5533 curr_out_of_range_pos
= -1;
5535 expected_operand
= idesc
->operands
[0];
5536 for (; idesc
; idesc
= get_next_opcode (idesc
))
5538 if (num_outputs
!= idesc
->num_outputs
)
5539 continue; /* mismatch in # of outputs */
5541 CURR_SLOT
.num_fixups
= 0;
5543 /* Try to match all operands. If we see an out-of-range operand,
5544 then continue trying to match the rest of the operands, since if
5545 the rest match, then this idesc will give the best error message. */
5547 out_of_range_pos
= -1;
5548 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
5550 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
5551 if (result
!= OPERAND_MATCH
)
5553 if (result
!= OPERAND_OUT_OF_RANGE
)
5555 if (out_of_range_pos
< 0)
5556 /* remember position of the first out-of-range operand: */
5557 out_of_range_pos
= i
;
5561 /* If we did not match all operands, or if at least one operand was
5562 out-of-range, then this idesc does not match. Keep track of which
5563 idesc matched the most operands before failing. If we have two
5564 idescs that failed at the same position, and one had an out-of-range
5565 operand, then prefer the out-of-range operand. Thus if we have
5566 "add r0=0x1000000,r1" we get an error saying the constant is out
5567 of range instead of an error saying that the constant should have been
5570 if (i
!= num_operands
|| out_of_range_pos
>= 0)
5572 if (i
> highest_unmatched_operand
5573 || (i
== highest_unmatched_operand
5574 && out_of_range_pos
> curr_out_of_range_pos
))
5576 highest_unmatched_operand
= i
;
5577 if (out_of_range_pos
>= 0)
5579 expected_operand
= idesc
->operands
[out_of_range_pos
];
5580 error_pos
= out_of_range_pos
;
5584 expected_operand
= idesc
->operands
[i
];
5587 curr_out_of_range_pos
= out_of_range_pos
;
5592 if (num_operands
< NELEMS (idesc
->operands
)
5593 && idesc
->operands
[num_operands
])
5594 continue; /* mismatch in number of arguments */
5600 if (expected_operand
)
5601 as_bad ("Operand %u of `%s' should be %s",
5602 error_pos
+ 1, mnemonic
,
5603 elf64_ia64_operands
[expected_operand
].desc
);
5605 as_bad ("Operand mismatch");
5611 /* Keep track of state necessary to determine whether a NOP is necessary
5612 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5613 detect a case where additional NOPs may be necessary. */
5615 errata_nop_necessary_p (slot
, insn_unit
)
5617 enum ia64_unit insn_unit
;
5620 struct group
*this_group
= md
.last_groups
+ md
.group_idx
;
5621 struct group
*prev_group
= md
.last_groups
+ (md
.group_idx
+ 2) % 3;
5622 struct ia64_opcode
*idesc
= slot
->idesc
;
5624 /* Test whether this could be the first insn in a problematic sequence. */
5625 if (insn_unit
== IA64_UNIT_F
)
5627 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5628 if (idesc
->operands
[i
] == IA64_OPND_P1
5629 || idesc
->operands
[i
] == IA64_OPND_P2
)
5631 int regno
= slot
->opnd
[i
].X_add_number
- REG_P
;
5632 /* Ignore invalid operands; they generate errors elsewhere. */
5635 this_group
->p_reg_set
[regno
] = 1;
5639 /* Test whether this could be the second insn in a problematic sequence. */
5640 if (insn_unit
== IA64_UNIT_M
&& slot
->qp_regno
> 0
5641 && prev_group
->p_reg_set
[slot
->qp_regno
])
5643 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5644 if (idesc
->operands
[i
] == IA64_OPND_R1
5645 || idesc
->operands
[i
] == IA64_OPND_R2
5646 || idesc
->operands
[i
] == IA64_OPND_R3
)
5648 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5649 /* Ignore invalid operands; they generate errors elsewhere. */
5652 if (strncmp (idesc
->name
, "add", 3) != 0
5653 && strncmp (idesc
->name
, "sub", 3) != 0
5654 && strncmp (idesc
->name
, "shladd", 6) != 0
5655 && (idesc
->flags
& IA64_OPCODE_POSTINC
) == 0)
5656 this_group
->g_reg_set_conditionally
[regno
] = 1;
5660 /* Test whether this could be the third insn in a problematic sequence. */
5661 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; i
++)
5663 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5664 idesc
->operands
[i
] == IA64_OPND_R3
5665 /* For mov indirect. */
5666 || idesc
->operands
[i
] == IA64_OPND_RR_R3
5667 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
5668 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
5669 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
5670 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
5671 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
5672 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
5673 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
5675 || idesc
->operands
[i
] == IA64_OPND_ITR_R3
5676 || idesc
->operands
[i
] == IA64_OPND_DTR_R3
5677 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5678 || idesc
->operands
[i
] == IA64_OPND_MR3
)
5680 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5681 /* Ignore invalid operands; they generate errors elsewhere. */
5684 if (idesc
->operands
[i
] == IA64_OPND_R3
)
5686 if (strcmp (idesc
->name
, "fc") != 0
5687 && strcmp (idesc
->name
, "tak") != 0
5688 && strcmp (idesc
->name
, "thash") != 0
5689 && strcmp (idesc
->name
, "tpa") != 0
5690 && strcmp (idesc
->name
, "ttag") != 0
5691 && strncmp (idesc
->name
, "ptr", 3) != 0
5692 && strncmp (idesc
->name
, "ptc", 3) != 0
5693 && strncmp (idesc
->name
, "probe", 5) != 0)
5696 if (prev_group
->g_reg_set_conditionally
[regno
])
5704 build_insn (slot
, insnp
)
5708 const struct ia64_operand
*odesc
, *o2desc
;
5709 struct ia64_opcode
*idesc
= slot
->idesc
;
5710 bfd_signed_vma insn
, val
;
5714 insn
= idesc
->opcode
| slot
->qp_regno
;
5716 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
5718 if (slot
->opnd
[i
].X_op
== O_register
5719 || slot
->opnd
[i
].X_op
== O_constant
5720 || slot
->opnd
[i
].X_op
== O_index
)
5721 val
= slot
->opnd
[i
].X_add_number
;
5722 else if (slot
->opnd
[i
].X_op
== O_big
)
5724 /* This must be the value 0x10000000000000000. */
5725 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
5731 switch (idesc
->operands
[i
])
5733 case IA64_OPND_IMMU64
:
5734 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
5735 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
5736 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
5737 | (((val
>> 63) & 0x1) << 36));
5740 case IA64_OPND_IMMU62
:
5741 val
&= 0x3fffffffffffffffULL
;
5742 if (val
!= slot
->opnd
[i
].X_add_number
)
5743 as_warn (_("Value truncated to 62 bits"));
5744 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
5745 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
5748 case IA64_OPND_TGT64
:
5750 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
5751 insn
|= ((((val
>> 59) & 0x1) << 36)
5752 | (((val
>> 0) & 0xfffff) << 13));
5783 case IA64_OPND_R3_2
:
5784 case IA64_OPND_CPUID_R3
:
5785 case IA64_OPND_DBR_R3
:
5786 case IA64_OPND_DTR_R3
:
5787 case IA64_OPND_ITR_R3
:
5788 case IA64_OPND_IBR_R3
:
5790 case IA64_OPND_MSR_R3
:
5791 case IA64_OPND_PKR_R3
:
5792 case IA64_OPND_PMC_R3
:
5793 case IA64_OPND_PMD_R3
:
5794 case IA64_OPND_RR_R3
:
5802 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
5803 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
5805 as_bad_where (slot
->src_file
, slot
->src_line
,
5806 "Bad operand value: %s", err
);
5807 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
5809 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
5810 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
5812 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
5813 (*o2desc
->insert
) (o2desc
, val
, &insn
);
5815 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
5816 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
5817 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
5819 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
5820 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
5830 unsigned int manual_bundling_on
= 0, manual_bundling_off
= 0;
5831 unsigned int manual_bundling
= 0;
5832 enum ia64_unit required_unit
, insn_unit
= 0;
5833 enum ia64_insn_type type
[3], insn_type
;
5834 unsigned int template, orig_template
;
5835 bfd_vma insn
[3] = { -1, -1, -1 };
5836 struct ia64_opcode
*idesc
;
5837 int end_of_insn_group
= 0, user_template
= -1;
5838 int n
, i
, j
, first
, curr
;
5840 bfd_vma t0
= 0, t1
= 0;
5841 struct label_fix
*lfix
;
5842 struct insn_fix
*ifix
;
5847 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
5848 know (first
>= 0 & first
< NUM_SLOTS
);
5849 n
= MIN (3, md
.num_slots_in_use
);
5851 /* Determine template: user user_template if specified, best match
5854 if (md
.slot
[first
].user_template
>= 0)
5855 user_template
= template = md
.slot
[first
].user_template
;
5858 /* Auto select appropriate template. */
5859 memset (type
, 0, sizeof (type
));
5861 for (i
= 0; i
< n
; ++i
)
5863 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
5865 type
[i
] = md
.slot
[curr
].idesc
->type
;
5866 curr
= (curr
+ 1) % NUM_SLOTS
;
5868 template = best_template
[type
[0]][type
[1]][type
[2]];
5871 /* initialize instructions with appropriate nops: */
5872 for (i
= 0; i
< 3; ++i
)
5873 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
5877 /* now fill in slots with as many insns as possible: */
5879 idesc
= md
.slot
[curr
].idesc
;
5880 end_of_insn_group
= 0;
5881 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
5883 /* Set the slot number for prologue/body records now as those
5884 refer to the current point, not the point after the
5885 instruction has been issued: */
5886 /* Don't try to delete prologue/body records here, as that will cause
5887 them to also be deleted from the master list of unwind records. */
5888 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
; ptr
= ptr
->next
)
5889 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
5890 || ptr
->r
.type
== body
)
5892 ptr
->slot_number
= (unsigned long) f
+ i
;
5893 ptr
->slot_frag
= frag_now
;
5896 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
5898 if (manual_bundling
&& i
!= 2)
5899 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
5900 "`%s' must be last in bundle", idesc
->name
);
5904 if (idesc
->flags
& IA64_OPCODE_LAST
)
5907 unsigned int required_template
;
5909 /* If we need a stop bit after an M slot, our only choice is
5910 template 5 (M;;MI). If we need a stop bit after a B
5911 slot, our only choice is to place it at the end of the
5912 bundle, because the only available templates are MIB,
5913 MBB, BBB, MMB, and MFB. We don't handle anything other
5914 than M and B slots because these are the only kind of
5915 instructions that can have the IA64_OPCODE_LAST bit set. */
5916 required_template
= template;
5917 switch (idesc
->type
)
5921 required_template
= 5;
5929 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
5930 "Internal error: don't know how to force %s to end"
5931 "of instruction group", idesc
->name
);
5935 if (manual_bundling
&& i
!= required_slot
)
5936 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
5937 "`%s' must be last in instruction group",
5939 if (required_slot
< i
)
5940 /* Can't fit this instruction. */
5944 if (required_template
!= template)
5946 /* If we switch the template, we need to reset the NOPs
5947 after slot i. The slot-types of the instructions ahead
5948 of i never change, so we don't need to worry about
5949 changing NOPs in front of this slot. */
5950 for (j
= i
; j
< 3; ++j
)
5951 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
5953 template = required_template
;
5955 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
5957 if (manual_bundling_on
)
5958 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
5959 "Label must be first in a bundle");
5960 /* This insn must go into the first slot of a bundle. */
5964 manual_bundling_on
= md
.slot
[curr
].manual_bundling_on
;
5965 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
5967 if (manual_bundling_on
)
5970 manual_bundling
= 1;
5972 break; /* need to start a new bundle */
5975 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
5977 /* We need an instruction group boundary in the middle of a
5978 bundle. See if we can switch to an other template with
5979 an appropriate boundary. */
5981 orig_template
= template;
5982 if (i
== 1 && (user_template
== 4
5983 || (user_template
< 0
5984 && (ia64_templ_desc
[template].exec_unit
[0]
5988 end_of_insn_group
= 0;
5990 else if (i
== 2 && (user_template
== 0
5991 || (user_template
< 0
5992 && (ia64_templ_desc
[template].exec_unit
[1]
5994 /* This test makes sure we don't switch the template if
5995 the next instruction is one that needs to be first in
5996 an instruction group. Since all those instructions are
5997 in the M group, there is no way such an instruction can
5998 fit in this bundle even if we switch the template. The
5999 reason we have to check for this is that otherwise we
6000 may end up generating "MI;;I M.." which has the deadly
6001 effect that the second M instruction is no longer the
6002 first in the bundle! --davidm 99/12/16 */
6003 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6006 end_of_insn_group
= 0;
6008 else if (curr
!= first
)
6009 /* can't fit this insn */
6012 if (template != orig_template
)
6013 /* if we switch the template, we need to reset the NOPs
6014 after slot i. The slot-types of the instructions ahead
6015 of i never change, so we don't need to worry about
6016 changing NOPs in front of this slot. */
6017 for (j
= i
; j
< 3; ++j
)
6018 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6020 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6022 /* resolve dynamic opcodes such as "break" and "nop": */
6023 if (idesc
->type
== IA64_TYPE_DYN
)
6025 if ((strcmp (idesc
->name
, "nop") == 0)
6026 || (strcmp (idesc
->name
, "break") == 0))
6027 insn_unit
= required_unit
;
6028 else if (strcmp (idesc
->name
, "chk.s") == 0)
6030 insn_unit
= IA64_UNIT_M
;
6031 if (required_unit
== IA64_UNIT_I
)
6032 insn_unit
= IA64_UNIT_I
;
6035 as_fatal ("emit_one_bundle: unexpected dynamic op");
6037 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbf??"[insn_unit
]);
6038 ia64_free_opcode (idesc
);
6039 md
.slot
[curr
].idesc
= idesc
= ia64_find_opcode (mnemonic
);
6041 know (!idesc
->next
); /* no resolved dynamic ops have collisions */
6046 insn_type
= idesc
->type
;
6047 insn_unit
= IA64_UNIT_NIL
;
6051 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6052 insn_unit
= required_unit
;
6054 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6055 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6056 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6057 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6058 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6063 if (insn_unit
!= required_unit
)
6065 if (required_unit
== IA64_UNIT_L
6066 && insn_unit
== IA64_UNIT_I
6067 && !(idesc
->flags
& IA64_OPCODE_X_IN_MLX
))
6069 /* we got ourselves an MLX template but the current
6070 instruction isn't an X-unit, or an I-unit instruction
6071 that can go into the X slot of an MLX template. Duh. */
6072 if (md
.num_slots_in_use
>= NUM_SLOTS
)
6074 as_bad_where (md
.slot
[curr
].src_file
,
6075 md
.slot
[curr
].src_line
,
6076 "`%s' can't go in X slot of "
6077 "MLX template", idesc
->name
);
6078 /* drop this insn so we don't livelock: */
6079 --md
.num_slots_in_use
;
6083 continue; /* try next slot */
6089 addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6090 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6093 if (errata_nop_necessary_p (md
.slot
+ curr
, insn_unit
))
6094 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6096 build_insn (md
.slot
+ curr
, insn
+ i
);
6098 /* Set slot counts for non prologue/body unwind records. */
6099 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
; ptr
= ptr
->next
)
6100 if (ptr
->r
.type
!= prologue
&& ptr
->r
.type
!= prologue_gr
6101 && ptr
->r
.type
!= body
)
6103 ptr
->slot_number
= (unsigned long) f
+ i
;
6104 ptr
->slot_frag
= frag_now
;
6106 md
.slot
[curr
].unwind_record
= NULL
;
6108 if (required_unit
== IA64_UNIT_L
)
6111 /* skip one slot for long/X-unit instructions */
6114 --md
.num_slots_in_use
;
6116 /* now is a good time to fix up the labels for this insn: */
6117 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6119 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6120 symbol_set_frag (lfix
->sym
, frag_now
);
6122 /* and fix up the tags also. */
6123 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6125 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6126 symbol_set_frag (lfix
->sym
, frag_now
);
6129 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6131 ifix
= md
.slot
[curr
].fixup
+ j
;
6132 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6133 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6134 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6135 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6136 fix
->fx_file
= md
.slot
[curr
].src_file
;
6137 fix
->fx_line
= md
.slot
[curr
].src_line
;
6140 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6142 if (end_of_insn_group
)
6144 md
.group_idx
= (md
.group_idx
+ 1) % 3;
6145 memset (md
.last_groups
+ md
.group_idx
, 0, sizeof md
.last_groups
[0]);
6149 ia64_free_opcode (md
.slot
[curr
].idesc
);
6150 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6151 md
.slot
[curr
].user_template
= -1;
6153 if (manual_bundling_off
)
6155 manual_bundling
= 0;
6158 curr
= (curr
+ 1) % NUM_SLOTS
;
6159 idesc
= md
.slot
[curr
].idesc
;
6161 if (manual_bundling
)
6163 if (md
.num_slots_in_use
> 0)
6164 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6165 "`%s' does not fit into %s template",
6166 idesc
->name
, ia64_templ_desc
[template].name
);
6168 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6169 "Missing '}' at end of file");
6171 know (md
.num_slots_in_use
< NUM_SLOTS
);
6173 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6174 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6176 number_to_chars_littleendian (f
+ 0, t0
, 8);
6177 number_to_chars_littleendian (f
+ 8, t1
, 8);
6179 unwind
.next_slot_number
= (unsigned long) f
+ 16;
6180 unwind
.next_slot_frag
= frag_now
;
6184 md_parse_option (c
, arg
)
6191 /* Switches from the Intel assembler. */
6193 if (strcmp (arg
, "ilp64") == 0
6194 || strcmp (arg
, "lp64") == 0
6195 || strcmp (arg
, "p64") == 0)
6197 md
.flags
|= EF_IA_64_ABI64
;
6199 else if (strcmp (arg
, "ilp32") == 0)
6201 md
.flags
&= ~EF_IA_64_ABI64
;
6203 else if (strcmp (arg
, "le") == 0)
6205 md
.flags
&= ~EF_IA_64_BE
;
6207 else if (strcmp (arg
, "be") == 0)
6209 md
.flags
|= EF_IA_64_BE
;
6216 if (strcmp (arg
, "so") == 0)
6218 /* Suppress signon message. */
6220 else if (strcmp (arg
, "pi") == 0)
6222 /* Reject privileged instructions. FIXME */
6224 else if (strcmp (arg
, "us") == 0)
6226 /* Allow union of signed and unsigned range. FIXME */
6228 else if (strcmp (arg
, "close_fcalls") == 0)
6230 /* Do not resolve global function calls. */
6237 /* temp[="prefix"] Insert temporary labels into the object file
6238 symbol table prefixed by "prefix".
6239 Default prefix is ":temp:".
6244 /* indirect=<tgt> Assume unannotated indirect branches behavior
6245 according to <tgt> --
6246 exit: branch out from the current context (default)
6247 labels: all labels in context may be branch targets
6249 if (strncmp (arg
, "indirect=", 9) != 0)
6254 /* -X conflicts with an ignored option, use -x instead */
6256 if (!arg
|| strcmp (arg
, "explicit") == 0)
6258 /* set default mode to explicit */
6259 md
.default_explicit_mode
= 1;
6262 else if (strcmp (arg
, "auto") == 0)
6264 md
.default_explicit_mode
= 0;
6266 else if (strcmp (arg
, "debug") == 0)
6270 else if (strcmp (arg
, "debugx") == 0)
6272 md
.default_explicit_mode
= 1;
6277 as_bad (_("Unrecognized option '-x%s'"), arg
);
6282 /* nops Print nops statistics. */
6285 /* GNU specific switches for gcc. */
6286 case OPTION_MCONSTANT_GP
:
6287 md
.flags
|= EF_IA_64_CONS_GP
;
6290 case OPTION_MAUTO_PIC
:
6291 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
6302 md_show_usage (stream
)
6307 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6308 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6309 -x | -xexplicit turn on dependency violation checking (default)\n\
6310 -xauto automagically remove dependency violations\n\
6311 -xdebug debug dependency violation checker\n"),
6316 ia64_after_parse_args ()
6318 if (debug_type
== DEBUG_STABS
)
6319 as_fatal (_("--gstabs is not supported for ia64"));
6322 /* Return true if TYPE fits in TEMPL at SLOT. */
6325 match (int templ
, int type
, int slot
)
6327 enum ia64_unit unit
;
6330 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
6333 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
6335 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
6337 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
6338 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
6339 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
6340 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
6341 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
6342 default: result
= 0; break;
6347 /* Add a bit of extra goodness if a nop of type F or B would fit
6348 in TEMPL at SLOT. */
6351 extra_goodness (int templ
, int slot
)
6353 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
6355 if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
6360 /* This function is called once, at assembler startup time. It sets
6361 up all the tables, etc. that the MD part of the assembler will need
6362 that can be determined before arguments are parsed. */
6366 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
6371 md
.explicit_mode
= md
.default_explicit_mode
;
6373 bfd_set_section_alignment (stdoutput
, text_section
, 4);
6375 target_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
6376 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
6377 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
6378 &zero_address_frag
);
6380 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
6381 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
6382 &zero_address_frag
);
6384 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
6385 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
6386 &zero_address_frag
);
6388 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
6389 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
6390 &zero_address_frag
);
6392 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
6393 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
6394 &zero_address_frag
);
6396 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
6397 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
6398 &zero_address_frag
);
6400 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
6401 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
6402 &zero_address_frag
);
6404 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
6405 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
6406 &zero_address_frag
);
6408 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
6409 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
6410 &zero_address_frag
);
6412 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
6413 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
6414 &zero_address_frag
);
6416 /* Compute the table of best templates. We compute goodness as a
6417 base 4 value, in which each match counts for 3, each F counts
6418 for 2, each B counts for 1. This should maximize the number of
6419 F and B nops in the chosen bundles, which is good because these
6420 pipelines are least likely to be overcommitted. */
6421 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
6422 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
6423 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
6426 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
6429 if (match (t
, i
, 0))
6431 if (match (t
, j
, 1))
6433 if (match (t
, k
, 2))
6434 goodness
= 3 + 3 + 3;
6436 goodness
= 3 + 3 + extra_goodness (t
, 2);
6438 else if (match (t
, j
, 2))
6439 goodness
= 3 + 3 + extra_goodness (t
, 1);
6443 goodness
+= extra_goodness (t
, 1);
6444 goodness
+= extra_goodness (t
, 2);
6447 else if (match (t
, i
, 1))
6449 if (match (t
, j
, 2))
6452 goodness
= 3 + extra_goodness (t
, 2);
6454 else if (match (t
, i
, 2))
6455 goodness
= 3 + extra_goodness (t
, 1);
6457 if (goodness
> best
)
6460 best_template
[i
][j
][k
] = t
;
6465 for (i
= 0; i
< NUM_SLOTS
; ++i
)
6466 md
.slot
[i
].user_template
= -1;
6468 md
.pseudo_hash
= hash_new ();
6469 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
6471 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
6472 (void *) (pseudo_opcode
+ i
));
6474 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6475 pseudo_opcode
[i
].name
, err
);
6478 md
.reg_hash
= hash_new ();
6479 md
.dynreg_hash
= hash_new ();
6480 md
.const_hash
= hash_new ();
6481 md
.entry_hash
= hash_new ();
6483 /* general registers: */
6486 for (i
= 0; i
< total
; ++i
)
6488 sprintf (name
, "r%d", i
- REG_GR
);
6489 md
.regsym
[i
] = declare_register (name
, i
);
6492 /* floating point registers: */
6494 for (; i
< total
; ++i
)
6496 sprintf (name
, "f%d", i
- REG_FR
);
6497 md
.regsym
[i
] = declare_register (name
, i
);
6500 /* application registers: */
6503 for (; i
< total
; ++i
)
6505 sprintf (name
, "ar%d", i
- REG_AR
);
6506 md
.regsym
[i
] = declare_register (name
, i
);
6509 /* control registers: */
6512 for (; i
< total
; ++i
)
6514 sprintf (name
, "cr%d", i
- REG_CR
);
6515 md
.regsym
[i
] = declare_register (name
, i
);
6518 /* predicate registers: */
6520 for (; i
< total
; ++i
)
6522 sprintf (name
, "p%d", i
- REG_P
);
6523 md
.regsym
[i
] = declare_register (name
, i
);
6526 /* branch registers: */
6528 for (; i
< total
; ++i
)
6530 sprintf (name
, "b%d", i
- REG_BR
);
6531 md
.regsym
[i
] = declare_register (name
, i
);
6534 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
6535 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
6536 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
6537 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
6538 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
6539 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
6540 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
6542 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
6544 regnum
= indirect_reg
[i
].regnum
;
6545 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
6548 /* define synonyms for application registers: */
6549 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
6550 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
6551 REG_AR
+ ar
[i
- REG_AR
].regnum
);
6553 /* define synonyms for control registers: */
6554 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
6555 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
6556 REG_CR
+ cr
[i
- REG_CR
].regnum
);
6558 declare_register ("gp", REG_GR
+ 1);
6559 declare_register ("sp", REG_GR
+ 12);
6560 declare_register ("rp", REG_BR
+ 0);
6562 /* pseudo-registers used to specify unwind info: */
6563 declare_register ("psp", REG_PSP
);
6565 declare_register_set ("ret", 4, REG_GR
+ 8);
6566 declare_register_set ("farg", 8, REG_FR
+ 8);
6567 declare_register_set ("fret", 8, REG_FR
+ 8);
6569 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
6571 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
6572 (PTR
) (const_bits
+ i
));
6574 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6578 /* Set the architecture and machine depending on defaults and command line
6580 if (md
.flags
& EF_IA_64_ABI64
)
6581 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
6583 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
6586 as_warn (_("Could not set architecture and machine"));
6588 /* Set the pointer size and pointer shift size depending on md.flags */
6590 if (md
.flags
& EF_IA_64_ABI64
)
6592 md
.pointer_size
= 8; /* pointers are 8 bytes */
6593 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
6597 md
.pointer_size
= 4; /* pointers are 4 bytes */
6598 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
6601 md
.mem_offset
.hint
= 0;
6604 md
.entry_labels
= NULL
;
6607 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6608 because that is called after md_parse_option which is where we do the
6609 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6610 default endianness. */
6613 ia64_init (argc
, argv
)
6614 int argc ATTRIBUTE_UNUSED
;
6615 char **argv ATTRIBUTE_UNUSED
;
6617 md
.flags
= EF_IA_64_ABI64
;
6618 if (TARGET_BYTES_BIG_ENDIAN
)
6619 md
.flags
|= EF_IA_64_BE
;
6622 /* Return a string for the target object file format. */
6625 ia64_target_format ()
6627 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
6629 if (md
.flags
& EF_IA_64_BE
)
6631 if (md
.flags
& EF_IA_64_ABI64
)
6633 return "elf64-ia64-aix-big";
6635 return "elf64-ia64-big";
6639 return "elf32-ia64-aix-big";
6641 return "elf32-ia64-big";
6646 if (md
.flags
& EF_IA_64_ABI64
)
6648 return "elf64-ia64-aix-little";
6650 return "elf64-ia64-little";
6654 return "elf32-ia64-aix-little";
6656 return "elf32-ia64-little";
6661 return "unknown-format";
6665 ia64_end_of_source ()
6667 /* terminate insn group upon reaching end of file: */
6668 insn_group_break (1, 0, 0);
6670 /* emits slots we haven't written yet: */
6671 ia64_flush_insns ();
6673 bfd_set_private_flags (stdoutput
, md
.flags
);
6675 md
.mem_offset
.hint
= 0;
6681 if (md
.qp
.X_op
== O_register
)
6682 as_bad ("qualifying predicate not followed by instruction");
6683 md
.qp
.X_op
= O_absent
;
6685 if (ignore_input ())
6688 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
6690 if (md
.detect_dv
&& !md
.explicit_mode
)
6691 as_warn (_("Explicit stops are ignored in auto mode"));
6693 insn_group_break (1, 0, 0);
6697 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
6699 static int defining_tag
= 0;
6702 ia64_unrecognized_line (ch
)
6708 expression (&md
.qp
);
6709 if (*input_line_pointer
++ != ')')
6711 as_bad ("Expected ')'");
6714 if (md
.qp
.X_op
!= O_register
)
6716 as_bad ("Qualifying predicate expected");
6719 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
6721 as_bad ("Predicate register expected");
6727 if (md
.manual_bundling
)
6728 as_warn ("Found '{' when manual bundling is already turned on");
6730 CURR_SLOT
.manual_bundling_on
= 1;
6731 md
.manual_bundling
= 1;
6733 /* Bundling is only acceptable in explicit mode
6734 or when in default automatic mode. */
6735 if (md
.detect_dv
&& !md
.explicit_mode
)
6737 if (!md
.mode_explicitly_set
6738 && !md
.default_explicit_mode
)
6741 as_warn (_("Found '{' after explicit switch to automatic mode"));
6746 if (!md
.manual_bundling
)
6747 as_warn ("Found '}' when manual bundling is off");
6749 PREV_SLOT
.manual_bundling_off
= 1;
6750 md
.manual_bundling
= 0;
6752 /* switch back to automatic mode, if applicable */
6755 && !md
.mode_explicitly_set
6756 && !md
.default_explicit_mode
)
6759 /* Allow '{' to follow on the same line. We also allow ";;", but that
6760 happens automatically because ';' is an end of line marker. */
6762 if (input_line_pointer
[0] == '{')
6764 input_line_pointer
++;
6765 return ia64_unrecognized_line ('{');
6768 demand_empty_rest_of_line ();
6778 if (md
.qp
.X_op
== O_register
)
6780 as_bad ("Tag must come before qualifying predicate.");
6784 /* This implements just enough of read_a_source_file in read.c to
6785 recognize labels. */
6786 if (is_name_beginner (*input_line_pointer
))
6788 s
= input_line_pointer
;
6789 c
= get_symbol_end ();
6791 else if (LOCAL_LABELS_FB
6792 && ISDIGIT (*input_line_pointer
))
6795 while (ISDIGIT (*input_line_pointer
))
6796 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
6797 fb_label_instance_inc (temp
);
6798 s
= fb_label_name (temp
, 0);
6799 c
= *input_line_pointer
;
6808 /* Put ':' back for error messages' sake. */
6809 *input_line_pointer
++ = ':';
6810 as_bad ("Expected ':'");
6817 /* Put ':' back for error messages' sake. */
6818 *input_line_pointer
++ = ':';
6819 if (*input_line_pointer
++ != ']')
6821 as_bad ("Expected ']'");
6826 as_bad ("Tag name expected");
6836 /* Not a valid line. */
6841 ia64_frob_label (sym
)
6844 struct label_fix
*fix
;
6846 /* Tags need special handling since they are not bundle breaks like
6850 fix
= obstack_alloc (¬es
, sizeof (*fix
));
6852 fix
->next
= CURR_SLOT
.tag_fixups
;
6853 CURR_SLOT
.tag_fixups
= fix
;
6858 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
6860 md
.last_text_seg
= now_seg
;
6861 fix
= obstack_alloc (¬es
, sizeof (*fix
));
6863 fix
->next
= CURR_SLOT
.label_fixups
;
6864 CURR_SLOT
.label_fixups
= fix
;
6866 /* Keep track of how many code entry points we've seen. */
6867 if (md
.path
== md
.maxpaths
)
6870 md
.entry_labels
= (const char **)
6871 xrealloc ((void *) md
.entry_labels
,
6872 md
.maxpaths
* sizeof (char *));
6874 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
6879 ia64_flush_pending_output ()
6881 if (!md
.keep_pending_output
6882 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
6884 /* ??? This causes many unnecessary stop bits to be emitted.
6885 Unfortunately, it isn't clear if it is safe to remove this. */
6886 insn_group_break (1, 0, 0);
6887 ia64_flush_insns ();
6891 /* Do ia64-specific expression optimization. All that's done here is
6892 to transform index expressions that are either due to the indexing
6893 of rotating registers or due to the indexing of indirect register
6896 ia64_optimize_expr (l
, op
, r
)
6905 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
6907 num_regs
= (l
->X_add_number
>> 16);
6908 if ((unsigned) r
->X_add_number
>= num_regs
)
6911 as_bad ("No current frame");
6913 as_bad ("Index out of range 0..%u", num_regs
- 1);
6914 r
->X_add_number
= 0;
6916 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
6919 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
6921 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
6922 || l
->X_add_number
== IND_MEM
)
6924 as_bad ("Indirect register set name expected");
6925 l
->X_add_number
= IND_CPUID
;
6928 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
6929 l
->X_add_number
= r
->X_add_number
;
6937 ia64_parse_name (name
, e
)
6941 struct const_desc
*cdesc
;
6942 struct dynreg
*dr
= 0;
6943 unsigned int regnum
;
6947 /* first see if NAME is a known register name: */
6948 sym
= hash_find (md
.reg_hash
, name
);
6951 e
->X_op
= O_register
;
6952 e
->X_add_number
= S_GET_VALUE (sym
);
6956 cdesc
= hash_find (md
.const_hash
, name
);
6959 e
->X_op
= O_constant
;
6960 e
->X_add_number
= cdesc
->value
;
6964 /* check for inN, locN, or outN: */
6968 if (name
[1] == 'n' && ISDIGIT (name
[2]))
6976 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
6984 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
6997 /* The name is inN, locN, or outN; parse the register number. */
6998 regnum
= strtoul (name
, &end
, 10);
6999 if (end
> name
&& *end
== '\0')
7001 if ((unsigned) regnum
>= dr
->num_regs
)
7004 as_bad ("No current frame");
7006 as_bad ("Register number out of range 0..%u",
7010 e
->X_op
= O_register
;
7011 e
->X_add_number
= dr
->base
+ regnum
;
7016 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7018 /* We've got ourselves the name of a rotating register set.
7019 Store the base register number in the low 16 bits of
7020 X_add_number and the size of the register set in the top 16
7022 e
->X_op
= O_register
;
7023 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7029 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7032 ia64_canonicalize_symbol_name (name
)
7035 size_t len
= strlen (name
);
7036 if (len
> 1 && name
[len
- 1] == '#')
7037 name
[len
- 1] = '\0';
7041 /* Return true if idesc is a conditional branch instruction. This excludes
7042 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7043 because they always read/write resources regardless of the value of the
7044 qualifying predicate. br.ia must always use p0, and hence is always
7045 taken. Thus this function returns true for branches which can fall
7046 through, and which use no resources if they do fall through. */
7049 is_conditional_branch (idesc
)
7050 struct ia64_opcode
*idesc
;
7052 /* br is a conditional branch. Everything that starts with br. except
7053 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7054 Everything that starts with brl is a conditional branch. */
7055 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
7056 && (idesc
->name
[2] == '\0'
7057 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
7058 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
7059 || idesc
->name
[2] == 'l'
7060 /* br.cond, br.call, br.clr */
7061 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
7062 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
7063 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
7066 /* Return whether the given opcode is a taken branch. If there's any doubt,
7070 is_taken_branch (idesc
)
7071 struct ia64_opcode
*idesc
;
7073 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
7074 || strncmp (idesc
->name
, "br.ia", 5) == 0);
7077 /* Return whether the given opcode is an interruption or rfi. If there's any
7078 doubt, returns zero. */
7081 is_interruption_or_rfi (idesc
)
7082 struct ia64_opcode
*idesc
;
7084 if (strcmp (idesc
->name
, "rfi") == 0)
7089 /* Returns the index of the given dependency in the opcode's list of chks, or
7090 -1 if there is no dependency. */
7093 depends_on (depind
, idesc
)
7095 struct ia64_opcode
*idesc
;
7098 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
7099 for (i
= 0; i
< dep
->nchks
; i
++)
7101 if (depind
== DEP (dep
->chks
[i
]))
7107 /* Determine a set of specific resources used for a particular resource
7108 class. Returns the number of specific resources identified For those
7109 cases which are not determinable statically, the resource returned is
7112 Meanings of value in 'NOTE':
7113 1) only read/write when the register number is explicitly encoded in the
7115 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7116 accesses CFM when qualifying predicate is in the rotating region.
7117 3) general register value is used to specify an indirect register; not
7118 determinable statically.
7119 4) only read the given resource when bits 7:0 of the indirect index
7120 register value does not match the register number of the resource; not
7121 determinable statically.
7122 5) all rules are implementation specific.
7123 6) only when both the index specified by the reader and the index specified
7124 by the writer have the same value in bits 63:61; not determinable
7126 7) only access the specified resource when the corresponding mask bit is
7128 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7129 only read when these insns reference FR2-31
7130 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7131 written when these insns write FR32-127
7132 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7134 11) The target predicates are written independently of PR[qp], but source
7135 registers are only read if PR[qp] is true. Since the state of PR[qp]
7136 cannot statically be determined, all source registers are marked used.
7137 12) This insn only reads the specified predicate register when that
7138 register is the PR[qp].
7139 13) This reference to ld-c only applies to teh GR whose value is loaded
7140 with data returned from memory, not the post-incremented address register.
7141 14) The RSE resource includes the implementation-specific RSE internal
7142 state resources. At least one (and possibly more) of these resources are
7143 read by each instruction listed in IC:rse-readers. At least one (and
7144 possibly more) of these resources are written by each insn listed in
7146 15+16) Represents reserved instructions, which the assembler does not
7149 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7150 this code; there are no dependency violations based on memory access.
7153 #define MAX_SPECS 256
7158 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
7159 const struct ia64_dependency
*dep
;
7160 struct ia64_opcode
*idesc
;
7161 int type
; /* is this a DV chk or a DV reg? */
7162 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
7163 int note
; /* resource note for this insn's usage */
7164 int path
; /* which execution path to examine */
7171 if (dep
->mode
== IA64_DV_WAW
7172 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
7173 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
7176 /* template for any resources we identify */
7177 tmpl
.dependency
= dep
;
7179 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
7180 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
7181 tmpl
.link_to_qp_branch
= 1;
7182 tmpl
.mem_offset
.hint
= 0;
7185 tmpl
.cmp_type
= CMP_NONE
;
7188 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7189 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7190 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7192 /* we don't need to track these */
7193 if (dep
->semantics
== IA64_DVS_NONE
)
7196 switch (dep
->specifier
)
7201 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7203 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7204 if (regno
>= 0 && regno
<= 7)
7206 specs
[count
] = tmpl
;
7207 specs
[count
++].index
= regno
;
7213 for (i
= 0; i
< 8; i
++)
7215 specs
[count
] = tmpl
;
7216 specs
[count
++].index
= i
;
7225 case IA64_RS_AR_UNAT
:
7226 /* This is a mov =AR or mov AR= instruction. */
7227 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7229 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7230 if (regno
== AR_UNAT
)
7232 specs
[count
++] = tmpl
;
7237 /* This is a spill/fill, or other instruction that modifies the
7240 /* Unless we can determine the specific bits used, mark the whole
7241 thing; bits 8:3 of the memory address indicate the bit used in
7242 UNAT. The .mem.offset hint may be used to eliminate a small
7243 subset of conflicts. */
7244 specs
[count
] = tmpl
;
7245 if (md
.mem_offset
.hint
)
7248 fprintf (stderr
, " Using hint for spill/fill\n");
7249 /* The index isn't actually used, just set it to something
7250 approximating the bit index. */
7251 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
7252 specs
[count
].mem_offset
.hint
= 1;
7253 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
7254 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
7258 specs
[count
++].specific
= 0;
7266 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7268 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7269 if ((regno
>= 8 && regno
<= 15)
7270 || (regno
>= 20 && regno
<= 23)
7271 || (regno
>= 31 && regno
<= 39)
7272 || (regno
>= 41 && regno
<= 47)
7273 || (regno
>= 67 && regno
<= 111))
7275 specs
[count
] = tmpl
;
7276 specs
[count
++].index
= regno
;
7289 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7291 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7292 if ((regno
>= 48 && regno
<= 63)
7293 || (regno
>= 112 && regno
<= 127))
7295 specs
[count
] = tmpl
;
7296 specs
[count
++].index
= regno
;
7302 for (i
= 48; i
< 64; i
++)
7304 specs
[count
] = tmpl
;
7305 specs
[count
++].index
= i
;
7307 for (i
= 112; i
< 128; i
++)
7309 specs
[count
] = tmpl
;
7310 specs
[count
++].index
= i
;
7328 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7329 if (idesc
->operands
[i
] == IA64_OPND_B1
7330 || idesc
->operands
[i
] == IA64_OPND_B2
)
7332 specs
[count
] = tmpl
;
7333 specs
[count
++].index
=
7334 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7339 for (i
= idesc
->num_outputs
;i
< NELEMS (idesc
->operands
); i
++)
7340 if (idesc
->operands
[i
] == IA64_OPND_B1
7341 || idesc
->operands
[i
] == IA64_OPND_B2
)
7343 specs
[count
] = tmpl
;
7344 specs
[count
++].index
=
7345 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7351 case IA64_RS_CPUID
: /* four or more registers */
7354 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
7356 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7357 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7360 specs
[count
] = tmpl
;
7361 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7365 specs
[count
] = tmpl
;
7366 specs
[count
++].specific
= 0;
7376 case IA64_RS_DBR
: /* four or more registers */
7379 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
7381 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7382 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7385 specs
[count
] = tmpl
;
7386 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7390 specs
[count
] = tmpl
;
7391 specs
[count
++].specific
= 0;
7395 else if (note
== 0 && !rsrc_write
)
7397 specs
[count
] = tmpl
;
7398 specs
[count
++].specific
= 0;
7406 case IA64_RS_IBR
: /* four or more registers */
7409 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
7411 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7412 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7415 specs
[count
] = tmpl
;
7416 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7420 specs
[count
] = tmpl
;
7421 specs
[count
++].specific
= 0;
7434 /* These are implementation specific. Force all references to
7435 conflict with all other references. */
7436 specs
[count
] = tmpl
;
7437 specs
[count
++].specific
= 0;
7445 case IA64_RS_PKR
: /* 16 or more registers */
7446 if (note
== 3 || note
== 4)
7448 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
7450 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7451 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7456 specs
[count
] = tmpl
;
7457 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7460 for (i
= 0; i
< NELEMS (gr_values
); i
++)
7462 /* Uses all registers *except* the one in R3. */
7463 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
7465 specs
[count
] = tmpl
;
7466 specs
[count
++].index
= i
;
7472 specs
[count
] = tmpl
;
7473 specs
[count
++].specific
= 0;
7480 specs
[count
] = tmpl
;
7481 specs
[count
++].specific
= 0;
7485 case IA64_RS_PMC
: /* four or more registers */
7488 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
7489 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
7492 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
7494 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
7495 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7498 specs
[count
] = tmpl
;
7499 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7503 specs
[count
] = tmpl
;
7504 specs
[count
++].specific
= 0;
7514 case IA64_RS_PMD
: /* four or more registers */
7517 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
7519 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7520 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7523 specs
[count
] = tmpl
;
7524 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7528 specs
[count
] = tmpl
;
7529 specs
[count
++].specific
= 0;
7539 case IA64_RS_RR
: /* eight registers */
7542 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
7544 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7545 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7548 specs
[count
] = tmpl
;
7549 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
7553 specs
[count
] = tmpl
;
7554 specs
[count
++].specific
= 0;
7558 else if (note
== 0 && !rsrc_write
)
7560 specs
[count
] = tmpl
;
7561 specs
[count
++].specific
= 0;
7569 case IA64_RS_CR_IRR
:
7572 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7573 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
7575 && idesc
->operands
[1] == IA64_OPND_CR3
7578 for (i
= 0; i
< 4; i
++)
7580 specs
[count
] = tmpl
;
7581 specs
[count
++].index
= CR_IRR0
+ i
;
7587 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7588 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
7590 && regno
<= CR_IRR3
)
7592 specs
[count
] = tmpl
;
7593 specs
[count
++].index
= regno
;
7602 case IA64_RS_CR_LRR
:
7609 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7610 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
7611 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
7613 specs
[count
] = tmpl
;
7614 specs
[count
++].index
= regno
;
7622 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
7624 specs
[count
] = tmpl
;
7625 specs
[count
++].index
=
7626 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7641 else if (rsrc_write
)
7643 if (dep
->specifier
== IA64_RS_FRb
7644 && idesc
->operands
[0] == IA64_OPND_F1
)
7646 specs
[count
] = tmpl
;
7647 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
7652 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7654 if (idesc
->operands
[i
] == IA64_OPND_F2
7655 || idesc
->operands
[i
] == IA64_OPND_F3
7656 || idesc
->operands
[i
] == IA64_OPND_F4
)
7658 specs
[count
] = tmpl
;
7659 specs
[count
++].index
=
7660 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
7669 /* This reference applies only to the GR whose value is loaded with
7670 data returned from memory. */
7671 specs
[count
] = tmpl
;
7672 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
7678 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7679 if (idesc
->operands
[i
] == IA64_OPND_R1
7680 || idesc
->operands
[i
] == IA64_OPND_R2
7681 || idesc
->operands
[i
] == IA64_OPND_R3
)
7683 specs
[count
] = tmpl
;
7684 specs
[count
++].index
=
7685 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
7687 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
7688 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
7689 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
7691 specs
[count
] = tmpl
;
7692 specs
[count
++].index
=
7693 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
7698 /* Look for anything that reads a GR. */
7699 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
7701 if (idesc
->operands
[i
] == IA64_OPND_MR3
7702 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
7703 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
7704 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
7705 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
7706 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
7707 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
7708 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
7709 || idesc
->operands
[i
] == IA64_OPND_RR_R3
7710 || ((i
>= idesc
->num_outputs
)
7711 && (idesc
->operands
[i
] == IA64_OPND_R1
7712 || idesc
->operands
[i
] == IA64_OPND_R2
7713 || idesc
->operands
[i
] == IA64_OPND_R3
7714 /* addl source register. */
7715 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
7717 specs
[count
] = tmpl
;
7718 specs
[count
++].index
=
7719 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
7730 /* This is the same as IA64_RS_PRr, except that the register range is
7731 from 1 - 15, and there are no rotating register reads/writes here. */
7735 for (i
= 1; i
< 16; i
++)
7737 specs
[count
] = tmpl
;
7738 specs
[count
++].index
= i
;
7744 /* Mark only those registers indicated by the mask. */
7747 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
7748 for (i
= 1; i
< 16; i
++)
7749 if (mask
& ((valueT
) 1 << i
))
7751 specs
[count
] = tmpl
;
7752 specs
[count
++].index
= i
;
7760 else if (note
== 11) /* note 11 implies note 1 as well */
7764 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7766 if (idesc
->operands
[i
] == IA64_OPND_P1
7767 || idesc
->operands
[i
] == IA64_OPND_P2
)
7769 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
7770 if (regno
>= 1 && regno
< 16)
7772 specs
[count
] = tmpl
;
7773 specs
[count
++].index
= regno
;
7783 else if (note
== 12)
7785 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
7787 specs
[count
] = tmpl
;
7788 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
7795 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
7796 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
7797 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
7798 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
7800 if ((idesc
->operands
[0] == IA64_OPND_P1
7801 || idesc
->operands
[0] == IA64_OPND_P2
)
7802 && p1
>= 1 && p1
< 16)
7804 specs
[count
] = tmpl
;
7805 specs
[count
].cmp_type
=
7806 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
7807 specs
[count
++].index
= p1
;
7809 if ((idesc
->operands
[1] == IA64_OPND_P1
7810 || idesc
->operands
[1] == IA64_OPND_P2
)
7811 && p2
>= 1 && p2
< 16)
7813 specs
[count
] = tmpl
;
7814 specs
[count
].cmp_type
=
7815 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
7816 specs
[count
++].index
= p2
;
7821 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
7823 specs
[count
] = tmpl
;
7824 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
7826 if (idesc
->operands
[1] == IA64_OPND_PR
)
7828 for (i
= 1; i
< 16; i
++)
7830 specs
[count
] = tmpl
;
7831 specs
[count
++].index
= i
;
7842 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
7843 simplified cases of this. */
7847 for (i
= 16; i
< 63; i
++)
7849 specs
[count
] = tmpl
;
7850 specs
[count
++].index
= i
;
7856 /* Mark only those registers indicated by the mask. */
7858 && idesc
->operands
[0] == IA64_OPND_PR
)
7860 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
7861 if (mask
& ((valueT
) 1<<16))
7862 for (i
= 16; i
< 63; i
++)
7864 specs
[count
] = tmpl
;
7865 specs
[count
++].index
= i
;
7869 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
7871 for (i
= 16; i
< 63; i
++)
7873 specs
[count
] = tmpl
;
7874 specs
[count
++].index
= i
;
7882 else if (note
== 11) /* note 11 implies note 1 as well */
7886 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7888 if (idesc
->operands
[i
] == IA64_OPND_P1
7889 || idesc
->operands
[i
] == IA64_OPND_P2
)
7891 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
7892 if (regno
>= 16 && regno
< 63)
7894 specs
[count
] = tmpl
;
7895 specs
[count
++].index
= regno
;
7905 else if (note
== 12)
7907 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
7909 specs
[count
] = tmpl
;
7910 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
7917 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
7918 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
7919 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
7920 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
7922 if ((idesc
->operands
[0] == IA64_OPND_P1
7923 || idesc
->operands
[0] == IA64_OPND_P2
)
7924 && p1
>= 16 && p1
< 63)
7926 specs
[count
] = tmpl
;
7927 specs
[count
].cmp_type
=
7928 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
7929 specs
[count
++].index
= p1
;
7931 if ((idesc
->operands
[1] == IA64_OPND_P1
7932 || idesc
->operands
[1] == IA64_OPND_P2
)
7933 && p2
>= 16 && p2
< 63)
7935 specs
[count
] = tmpl
;
7936 specs
[count
].cmp_type
=
7937 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
7938 specs
[count
++].index
= p2
;
7943 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
7945 specs
[count
] = tmpl
;
7946 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
7948 if (idesc
->operands
[1] == IA64_OPND_PR
)
7950 for (i
= 16; i
< 63; i
++)
7952 specs
[count
] = tmpl
;
7953 specs
[count
++].index
= i
;
7965 /* Verify that the instruction is using the PSR bit indicated in
7969 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
7971 if (dep
->regindex
< 6)
7973 specs
[count
++] = tmpl
;
7976 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
7978 if (dep
->regindex
< 32
7979 || dep
->regindex
== 35
7980 || dep
->regindex
== 36
7981 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
7983 specs
[count
++] = tmpl
;
7986 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
7988 if (dep
->regindex
< 32
7989 || dep
->regindex
== 35
7990 || dep
->regindex
== 36
7991 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
7993 specs
[count
++] = tmpl
;
7998 /* Several PSR bits have very specific dependencies. */
7999 switch (dep
->regindex
)
8002 specs
[count
++] = tmpl
;
8007 specs
[count
++] = tmpl
;
8011 /* Only certain CR accesses use PSR.ic */
8012 if (idesc
->operands
[0] == IA64_OPND_CR3
8013 || idesc
->operands
[1] == IA64_OPND_CR3
)
8016 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8019 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
8034 specs
[count
++] = tmpl
;
8043 specs
[count
++] = tmpl
;
8047 /* Only some AR accesses use cpl */
8048 if (idesc
->operands
[0] == IA64_OPND_AR3
8049 || idesc
->operands
[1] == IA64_OPND_AR3
)
8052 ((idesc
->operands
[0] == IA64_OPND_AR3
)
8055 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
8062 && regno
<= AR_K7
))))
8064 specs
[count
++] = tmpl
;
8069 specs
[count
++] = tmpl
;
8079 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
8081 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
8087 if (mask
& ((valueT
) 1 << dep
->regindex
))
8089 specs
[count
++] = tmpl
;
8094 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
8095 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
8096 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8097 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8099 if (idesc
->operands
[i
] == IA64_OPND_F1
8100 || idesc
->operands
[i
] == IA64_OPND_F2
8101 || idesc
->operands
[i
] == IA64_OPND_F3
8102 || idesc
->operands
[i
] == IA64_OPND_F4
)
8104 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8105 if (reg
>= min
&& reg
<= max
)
8107 specs
[count
++] = tmpl
;
8114 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
8115 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
8116 /* mfh is read on writes to FR32-127; mfl is read on writes to
8118 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8120 if (idesc
->operands
[i
] == IA64_OPND_F1
)
8122 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8123 if (reg
>= min
&& reg
<= max
)
8125 specs
[count
++] = tmpl
;
8130 else if (note
== 10)
8132 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8134 if (idesc
->operands
[i
] == IA64_OPND_R1
8135 || idesc
->operands
[i
] == IA64_OPND_R2
8136 || idesc
->operands
[i
] == IA64_OPND_R3
)
8138 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8139 if (regno
>= 16 && regno
<= 31)
8141 specs
[count
++] = tmpl
;
8152 case IA64_RS_AR_FPSR
:
8153 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8155 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8156 if (regno
== AR_FPSR
)
8158 specs
[count
++] = tmpl
;
8163 specs
[count
++] = tmpl
;
8168 /* Handle all AR[REG] resources */
8169 if (note
== 0 || note
== 1)
8171 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8172 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
8173 && regno
== dep
->regindex
)
8175 specs
[count
++] = tmpl
;
8177 /* other AR[REG] resources may be affected by AR accesses */
8178 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
8181 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
8182 switch (dep
->regindex
)
8188 if (regno
== AR_BSPSTORE
)
8190 specs
[count
++] = tmpl
;
8194 (regno
== AR_BSPSTORE
8195 || regno
== AR_RNAT
))
8197 specs
[count
++] = tmpl
;
8202 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8205 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
8206 switch (dep
->regindex
)
8211 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
8213 specs
[count
++] = tmpl
;
8220 specs
[count
++] = tmpl
;
8230 /* Handle all CR[REG] resources */
8231 if (note
== 0 || note
== 1)
8233 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8235 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8236 if (regno
== dep
->regindex
)
8238 specs
[count
++] = tmpl
;
8240 else if (!rsrc_write
)
8242 /* Reads from CR[IVR] affect other resources. */
8243 if (regno
== CR_IVR
)
8245 if ((dep
->regindex
>= CR_IRR0
8246 && dep
->regindex
<= CR_IRR3
)
8247 || dep
->regindex
== CR_TPR
)
8249 specs
[count
++] = tmpl
;
8256 specs
[count
++] = tmpl
;
8265 case IA64_RS_INSERVICE
:
8266 /* look for write of EOI (67) or read of IVR (65) */
8267 if ((idesc
->operands
[0] == IA64_OPND_CR3
8268 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
8269 || (idesc
->operands
[1] == IA64_OPND_CR3
8270 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
8272 specs
[count
++] = tmpl
;
8279 specs
[count
++] = tmpl
;
8290 specs
[count
++] = tmpl
;
8294 /* Check if any of the registers accessed are in the rotating region.
8295 mov to/from pr accesses CFM only when qp_regno is in the rotating
8297 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8299 if (idesc
->operands
[i
] == IA64_OPND_R1
8300 || idesc
->operands
[i
] == IA64_OPND_R2
8301 || idesc
->operands
[i
] == IA64_OPND_R3
)
8303 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8304 /* Assumes that md.rot.num_regs is always valid */
8305 if (md
.rot
.num_regs
> 0
8307 && num
< 31 + md
.rot
.num_regs
)
8309 specs
[count
] = tmpl
;
8310 specs
[count
++].specific
= 0;
8313 else if (idesc
->operands
[i
] == IA64_OPND_F1
8314 || idesc
->operands
[i
] == IA64_OPND_F2
8315 || idesc
->operands
[i
] == IA64_OPND_F3
8316 || idesc
->operands
[i
] == IA64_OPND_F4
)
8318 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8321 specs
[count
] = tmpl
;
8322 specs
[count
++].specific
= 0;
8325 else if (idesc
->operands
[i
] == IA64_OPND_P1
8326 || idesc
->operands
[i
] == IA64_OPND_P2
)
8328 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8331 specs
[count
] = tmpl
;
8332 specs
[count
++].specific
= 0;
8336 if (CURR_SLOT
.qp_regno
> 15)
8338 specs
[count
] = tmpl
;
8339 specs
[count
++].specific
= 0;
8344 /* This is the same as IA64_RS_PRr, except simplified to account for
8345 the fact that there is only one register. */
8349 specs
[count
++] = tmpl
;
8354 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
8355 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8356 if (mask
& ((valueT
) 1 << 63))
8357 specs
[count
++] = tmpl
;
8359 else if (note
== 11)
8361 if ((idesc
->operands
[0] == IA64_OPND_P1
8362 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
8363 || (idesc
->operands
[1] == IA64_OPND_P2
8364 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
8366 specs
[count
++] = tmpl
;
8369 else if (note
== 12)
8371 if (CURR_SLOT
.qp_regno
== 63)
8373 specs
[count
++] = tmpl
;
8380 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8381 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8382 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8383 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8386 && (idesc
->operands
[0] == IA64_OPND_P1
8387 || idesc
->operands
[0] == IA64_OPND_P2
))
8389 specs
[count
] = tmpl
;
8390 specs
[count
++].cmp_type
=
8391 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8394 && (idesc
->operands
[1] == IA64_OPND_P1
8395 || idesc
->operands
[1] == IA64_OPND_P2
))
8397 specs
[count
] = tmpl
;
8398 specs
[count
++].cmp_type
=
8399 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8404 if (CURR_SLOT
.qp_regno
== 63)
8406 specs
[count
++] = tmpl
;
8417 /* FIXME we can identify some individual RSE written resources, but RSE
8418 read resources have not yet been completely identified, so for now
8419 treat RSE as a single resource */
8420 if (strncmp (idesc
->name
, "mov", 3) == 0)
8424 if (idesc
->operands
[0] == IA64_OPND_AR3
8425 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
8427 specs
[count
] = tmpl
;
8428 specs
[count
++].index
= 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8433 if (idesc
->operands
[0] == IA64_OPND_AR3
)
8435 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
8436 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
8438 specs
[count
++] = tmpl
;
8441 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8443 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
8444 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
8445 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
8447 specs
[count
++] = tmpl
;
8454 specs
[count
++] = tmpl
;
8459 /* FIXME -- do any of these need to be non-specific? */
8460 specs
[count
++] = tmpl
;
8464 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
8471 /* Clear branch flags on marked resources. This breaks the link between the
8472 QP of the marking instruction and a subsequent branch on the same QP. */
8475 clear_qp_branch_flag (mask
)
8479 for (i
= 0; i
< regdepslen
; i
++)
8481 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
8482 if ((bit
& mask
) != 0)
8484 regdeps
[i
].link_to_qp_branch
= 0;
8489 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8491 Any changes to a PR clears the mutex relations which include that PR. */
8494 clear_qp_mutex (mask
)
8500 while (i
< qp_mutexeslen
)
8502 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
8506 fprintf (stderr
, " Clearing mutex relation");
8507 print_prmask (qp_mutexes
[i
].prmask
);
8508 fprintf (stderr
, "\n");
8510 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
8517 /* Clear implies relations which contain PRs in the given masks.
8518 P1_MASK indicates the source of the implies relation, while P2_MASK
8519 indicates the implied PR. */
8522 clear_qp_implies (p1_mask
, p2_mask
)
8529 while (i
< qp_implieslen
)
8531 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
8532 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
8535 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
8536 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
8537 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
8544 /* Add the PRs specified to the list of implied relations. */
8547 add_qp_imply (p1
, p2
)
8554 /* p0 is not meaningful here. */
8555 if (p1
== 0 || p2
== 0)
8561 /* If it exists already, ignore it. */
8562 for (i
= 0; i
< qp_implieslen
; i
++)
8564 if (qp_implies
[i
].p1
== p1
8565 && qp_implies
[i
].p2
== p2
8566 && qp_implies
[i
].path
== md
.path
8567 && !qp_implies
[i
].p2_branched
)
8571 if (qp_implieslen
== qp_impliestotlen
)
8573 qp_impliestotlen
+= 20;
8574 qp_implies
= (struct qp_imply
*)
8575 xrealloc ((void *) qp_implies
,
8576 qp_impliestotlen
* sizeof (struct qp_imply
));
8579 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
8580 qp_implies
[qp_implieslen
].p1
= p1
;
8581 qp_implies
[qp_implieslen
].p2
= p2
;
8582 qp_implies
[qp_implieslen
].path
= md
.path
;
8583 qp_implies
[qp_implieslen
++].p2_branched
= 0;
8585 /* Add in the implied transitive relations; for everything that p2 implies,
8586 make p1 imply that, too; for everything that implies p1, make it imply p2
8588 for (i
= 0; i
< qp_implieslen
; i
++)
8590 if (qp_implies
[i
].p1
== p2
)
8591 add_qp_imply (p1
, qp_implies
[i
].p2
);
8592 if (qp_implies
[i
].p2
== p1
)
8593 add_qp_imply (qp_implies
[i
].p1
, p2
);
8595 /* Add in mutex relations implied by this implies relation; for each mutex
8596 relation containing p2, duplicate it and replace p2 with p1. */
8597 bit
= (valueT
) 1 << p1
;
8598 mask
= (valueT
) 1 << p2
;
8599 for (i
= 0; i
< qp_mutexeslen
; i
++)
8601 if (qp_mutexes
[i
].prmask
& mask
)
8602 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
8606 /* Add the PRs specified in the mask to the mutex list; this means that only
8607 one of the PRs can be true at any time. PR0 should never be included in
8617 if (qp_mutexeslen
== qp_mutexestotlen
)
8619 qp_mutexestotlen
+= 20;
8620 qp_mutexes
= (struct qpmutex
*)
8621 xrealloc ((void *) qp_mutexes
,
8622 qp_mutexestotlen
* sizeof (struct qpmutex
));
8626 fprintf (stderr
, " Registering mutex on");
8627 print_prmask (mask
);
8628 fprintf (stderr
, "\n");
8630 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
8631 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
8635 has_suffix_p (name
, suffix
)
8639 size_t namelen
= strlen (name
);
8640 size_t sufflen
= strlen (suffix
);
8642 if (namelen
<= sufflen
)
8644 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
8648 clear_register_values ()
8652 fprintf (stderr
, " Clearing register values\n");
8653 for (i
= 1; i
< NELEMS (gr_values
); i
++)
8654 gr_values
[i
].known
= 0;
8657 /* Keep track of register values/changes which affect DV tracking.
8659 optimization note: should add a flag to classes of insns where otherwise we
8660 have to examine a group of strings to identify them. */
8663 note_register_values (idesc
)
8664 struct ia64_opcode
*idesc
;
8666 valueT qp_changemask
= 0;
8669 /* Invalidate values for registers being written to. */
8670 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8672 if (idesc
->operands
[i
] == IA64_OPND_R1
8673 || idesc
->operands
[i
] == IA64_OPND_R2
8674 || idesc
->operands
[i
] == IA64_OPND_R3
)
8676 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8677 if (regno
> 0 && regno
< NELEMS (gr_values
))
8678 gr_values
[regno
].known
= 0;
8680 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
8682 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8683 if (regno
> 0 && regno
< 4)
8684 gr_values
[regno
].known
= 0;
8686 else if (idesc
->operands
[i
] == IA64_OPND_P1
8687 || idesc
->operands
[i
] == IA64_OPND_P2
)
8689 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8690 qp_changemask
|= (valueT
) 1 << regno
;
8692 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
8694 if (idesc
->operands
[2] & (valueT
) 0x10000)
8695 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
8697 qp_changemask
= idesc
->operands
[2];
8700 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
8702 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
8703 qp_changemask
= ~(valueT
) 0xFFFFFFFFFFF | idesc
->operands
[1];
8705 qp_changemask
= idesc
->operands
[1];
8706 qp_changemask
&= ~(valueT
) 0xFFFF;
8711 /* Always clear qp branch flags on any PR change. */
8712 /* FIXME there may be exceptions for certain compares. */
8713 clear_qp_branch_flag (qp_changemask
);
8715 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
8716 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
8718 qp_changemask
|= ~(valueT
) 0xFFFF;
8719 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
8721 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
8722 gr_values
[i
].known
= 0;
8724 clear_qp_mutex (qp_changemask
);
8725 clear_qp_implies (qp_changemask
, qp_changemask
);
8727 /* After a call, all register values are undefined, except those marked
8729 else if (strncmp (idesc
->name
, "br.call", 6) == 0
8730 || strncmp (idesc
->name
, "brl.call", 7) == 0)
8732 /* FIXME keep GR values which are marked as "safe_across_calls" */
8733 clear_register_values ();
8734 clear_qp_mutex (~qp_safe_across_calls
);
8735 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
8736 clear_qp_branch_flag (~qp_safe_across_calls
);
8738 else if (is_interruption_or_rfi (idesc
)
8739 || is_taken_branch (idesc
))
8741 clear_register_values ();
8742 clear_qp_mutex (~(valueT
) 0);
8743 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
8745 /* Look for mutex and implies relations. */
8746 else if ((idesc
->operands
[0] == IA64_OPND_P1
8747 || idesc
->operands
[0] == IA64_OPND_P2
)
8748 && (idesc
->operands
[1] == IA64_OPND_P1
8749 || idesc
->operands
[1] == IA64_OPND_P2
))
8751 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8752 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8753 valueT p1mask
= (valueT
) 1 << p1
;
8754 valueT p2mask
= (valueT
) 1 << p2
;
8756 /* If one of the PRs is PR0, we can't really do anything. */
8757 if (p1
== 0 || p2
== 0)
8760 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
8762 /* In general, clear mutexes and implies which include P1 or P2,
8763 with the following exceptions. */
8764 else if (has_suffix_p (idesc
->name
, ".or.andcm")
8765 || has_suffix_p (idesc
->name
, ".and.orcm"))
8767 add_qp_mutex (p1mask
| p2mask
);
8768 clear_qp_implies (p2mask
, p1mask
);
8770 else if (has_suffix_p (idesc
->name
, ".andcm")
8771 || has_suffix_p (idesc
->name
, ".and"))
8773 clear_qp_implies (0, p1mask
| p2mask
);
8775 else if (has_suffix_p (idesc
->name
, ".orcm")
8776 || has_suffix_p (idesc
->name
, ".or"))
8778 clear_qp_mutex (p1mask
| p2mask
);
8779 clear_qp_implies (p1mask
| p2mask
, 0);
8783 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
8784 if (has_suffix_p (idesc
->name
, ".unc"))
8786 add_qp_mutex (p1mask
| p2mask
);
8787 if (CURR_SLOT
.qp_regno
!= 0)
8789 add_qp_imply (CURR_SLOT
.opnd
[0].X_add_number
- REG_P
,
8790 CURR_SLOT
.qp_regno
);
8791 add_qp_imply (CURR_SLOT
.opnd
[1].X_add_number
- REG_P
,
8792 CURR_SLOT
.qp_regno
);
8795 else if (CURR_SLOT
.qp_regno
== 0)
8797 add_qp_mutex (p1mask
| p2mask
);
8801 clear_qp_mutex (p1mask
| p2mask
);
8805 /* Look for mov imm insns into GRs. */
8806 else if (idesc
->operands
[0] == IA64_OPND_R1
8807 && (idesc
->operands
[1] == IA64_OPND_IMM22
8808 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
8809 && (strcmp (idesc
->name
, "mov") == 0
8810 || strcmp (idesc
->name
, "movl") == 0))
8812 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8813 if (regno
> 0 && regno
< NELEMS (gr_values
))
8815 gr_values
[regno
].known
= 1;
8816 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
8817 gr_values
[regno
].path
= md
.path
;
8820 fprintf (stderr
, " Know gr%d = ", regno
);
8821 fprintf_vma (stderr
, gr_values
[regno
].value
);
8822 fputs ("\n", stderr
);
8828 clear_qp_mutex (qp_changemask
);
8829 clear_qp_implies (qp_changemask
, qp_changemask
);
8833 /* Return whether the given predicate registers are currently mutex. */
8836 qp_mutex (p1
, p2
, path
)
8846 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
8847 for (i
= 0; i
< qp_mutexeslen
; i
++)
8849 if (qp_mutexes
[i
].path
>= path
8850 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
8857 /* Return whether the given resource is in the given insn's list of chks
8858 Return 1 if the conflict is absolutely determined, 2 if it's a potential
8862 resources_match (rs
, idesc
, note
, qp_regno
, path
)
8864 struct ia64_opcode
*idesc
;
8869 struct rsrc specs
[MAX_SPECS
];
8872 /* If the marked resource's qp_regno and the given qp_regno are mutex,
8873 we don't need to check. One exception is note 11, which indicates that
8874 target predicates are written regardless of PR[qp]. */
8875 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
8879 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
8882 /* UNAT checking is a bit more specific than other resources */
8883 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
8884 && specs
[count
].mem_offset
.hint
8885 && rs
->mem_offset
.hint
)
8887 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
8889 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
8890 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
8897 /* Skip apparent PR write conflicts where both writes are an AND or both
8898 writes are an OR. */
8899 if (rs
->dependency
->specifier
== IA64_RS_PR
8900 || rs
->dependency
->specifier
== IA64_RS_PRr
8901 || rs
->dependency
->specifier
== IA64_RS_PR63
)
8903 if (specs
[count
].cmp_type
!= CMP_NONE
8904 && specs
[count
].cmp_type
== rs
->cmp_type
)
8907 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
8908 dv_mode
[rs
->dependency
->mode
],
8909 rs
->dependency
->specifier
!= IA64_RS_PR63
?
8910 specs
[count
].index
: 63);
8915 " %s on parallel compare conflict %s vs %s on PR%d\n",
8916 dv_mode
[rs
->dependency
->mode
],
8917 dv_cmp_type
[rs
->cmp_type
],
8918 dv_cmp_type
[specs
[count
].cmp_type
],
8919 rs
->dependency
->specifier
!= IA64_RS_PR63
?
8920 specs
[count
].index
: 63);
8924 /* If either resource is not specific, conservatively assume a conflict
8926 if (!specs
[count
].specific
|| !rs
->specific
)
8928 else if (specs
[count
].index
== rs
->index
)
8933 fprintf (stderr
, " No %s conflicts\n", rs
->dependency
->name
);
8939 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
8940 insert a stop to create the break. Update all resource dependencies
8941 appropriately. If QP_REGNO is non-zero, only apply the break to resources
8942 which use the same QP_REGNO and have the link_to_qp_branch flag set.
8943 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
8947 insn_group_break (insert_stop
, qp_regno
, save_current
)
8954 if (insert_stop
&& md
.num_slots_in_use
> 0)
8955 PREV_SLOT
.end_of_insn_group
= 1;
8959 fprintf (stderr
, " Insn group break%s",
8960 (insert_stop
? " (w/stop)" : ""));
8962 fprintf (stderr
, " effective for QP=%d", qp_regno
);
8963 fprintf (stderr
, "\n");
8967 while (i
< regdepslen
)
8969 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
8972 && regdeps
[i
].qp_regno
!= qp_regno
)
8979 && CURR_SLOT
.src_file
== regdeps
[i
].file
8980 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
8986 /* clear dependencies which are automatically cleared by a stop, or
8987 those that have reached the appropriate state of insn serialization */
8988 if (dep
->semantics
== IA64_DVS_IMPLIED
8989 || dep
->semantics
== IA64_DVS_IMPLIEDF
8990 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
8992 print_dependency ("Removing", i
);
8993 regdeps
[i
] = regdeps
[--regdepslen
];
8997 if (dep
->semantics
== IA64_DVS_DATA
8998 || dep
->semantics
== IA64_DVS_INSTR
8999 || dep
->semantics
== IA64_DVS_SPECIFIC
)
9001 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
9002 regdeps
[i
].insn_srlz
= STATE_STOP
;
9003 if (regdeps
[i
].data_srlz
== STATE_NONE
)
9004 regdeps
[i
].data_srlz
= STATE_STOP
;
9011 /* Add the given resource usage spec to the list of active dependencies. */
9014 mark_resource (idesc
, dep
, spec
, depind
, path
)
9015 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
9016 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
9021 if (regdepslen
== regdepstotlen
)
9023 regdepstotlen
+= 20;
9024 regdeps
= (struct rsrc
*)
9025 xrealloc ((void *) regdeps
,
9026 regdepstotlen
* sizeof (struct rsrc
));
9029 regdeps
[regdepslen
] = *spec
;
9030 regdeps
[regdepslen
].depind
= depind
;
9031 regdeps
[regdepslen
].path
= path
;
9032 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
9033 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
9035 print_dependency ("Adding", regdepslen
);
9041 print_dependency (action
, depind
)
9047 fprintf (stderr
, " %s %s '%s'",
9048 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
9049 (regdeps
[depind
].dependency
)->name
);
9050 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
!= 0)
9051 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
9052 if (regdeps
[depind
].mem_offset
.hint
)
9054 fputs (" ", stderr
);
9055 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
9056 fputs ("+", stderr
);
9057 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
9059 fprintf (stderr
, "\n");
9064 instruction_serialization ()
9068 fprintf (stderr
, " Instruction serialization\n");
9069 for (i
= 0; i
< regdepslen
; i
++)
9070 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
9071 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
9075 data_serialization ()
9079 fprintf (stderr
, " Data serialization\n");
9080 while (i
< regdepslen
)
9082 if (regdeps
[i
].data_srlz
== STATE_STOP
9083 /* Note: as of 991210, all "other" dependencies are cleared by a
9084 data serialization. This might change with new tables */
9085 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
9087 print_dependency ("Removing", i
);
9088 regdeps
[i
] = regdeps
[--regdepslen
];
9095 /* Insert stops and serializations as needed to avoid DVs. */
9098 remove_marked_resource (rs
)
9101 switch (rs
->dependency
->semantics
)
9103 case IA64_DVS_SPECIFIC
:
9105 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
9106 /* ...fall through... */
9107 case IA64_DVS_INSTR
:
9109 fprintf (stderr
, "Inserting instr serialization\n");
9110 if (rs
->insn_srlz
< STATE_STOP
)
9111 insn_group_break (1, 0, 0);
9112 if (rs
->insn_srlz
< STATE_SRLZ
)
9114 int oldqp
= CURR_SLOT
.qp_regno
;
9115 struct ia64_opcode
*oldidesc
= CURR_SLOT
.idesc
;
9116 /* Manually jam a srlz.i insn into the stream */
9117 CURR_SLOT
.qp_regno
= 0;
9118 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
9119 instruction_serialization ();
9120 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9121 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9123 CURR_SLOT
.qp_regno
= oldqp
;
9124 CURR_SLOT
.idesc
= oldidesc
;
9126 insn_group_break (1, 0, 0);
9128 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
9129 "other" types of DV are eliminated
9130 by a data serialization */
9133 fprintf (stderr
, "Inserting data serialization\n");
9134 if (rs
->data_srlz
< STATE_STOP
)
9135 insn_group_break (1, 0, 0);
9137 int oldqp
= CURR_SLOT
.qp_regno
;
9138 struct ia64_opcode
*oldidesc
= CURR_SLOT
.idesc
;
9139 /* Manually jam a srlz.d insn into the stream */
9140 CURR_SLOT
.qp_regno
= 0;
9141 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
9142 data_serialization ();
9143 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9144 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9146 CURR_SLOT
.qp_regno
= oldqp
;
9147 CURR_SLOT
.idesc
= oldidesc
;
9150 case IA64_DVS_IMPLIED
:
9151 case IA64_DVS_IMPLIEDF
:
9153 fprintf (stderr
, "Inserting stop\n");
9154 insn_group_break (1, 0, 0);
9161 /* Check the resources used by the given opcode against the current dependency
9164 The check is run once for each execution path encountered. In this case,
9165 a unique execution path is the sequence of instructions following a code
9166 entry point, e.g. the following has three execution paths, one starting
9167 at L0, one at L1, and one at L2.
9176 check_dependencies (idesc
)
9177 struct ia64_opcode
*idesc
;
9179 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9183 /* Note that the number of marked resources may change within the
9184 loop if in auto mode. */
9186 while (i
< regdepslen
)
9188 struct rsrc
*rs
= ®deps
[i
];
9189 const struct ia64_dependency
*dep
= rs
->dependency
;
9194 if (dep
->semantics
== IA64_DVS_NONE
9195 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
9201 note
= NOTE (opdeps
->chks
[chkind
]);
9203 /* Check this resource against each execution path seen thus far. */
9204 for (path
= 0; path
<= md
.path
; path
++)
9208 /* If the dependency wasn't on the path being checked, ignore it. */
9209 if (rs
->path
< path
)
9212 /* If the QP for this insn implies a QP which has branched, don't
9213 bother checking. Ed. NOTE: I don't think this check is terribly
9214 useful; what's the point of generating code which will only be
9215 reached if its QP is zero?
9216 This code was specifically inserted to handle the following code,
9217 based on notes from Intel's DV checking code, where p1 implies p2.
9223 if (CURR_SLOT
.qp_regno
!= 0)
9227 for (implies
= 0; implies
< qp_implieslen
; implies
++)
9229 if (qp_implies
[implies
].path
>= path
9230 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
9231 && qp_implies
[implies
].p2_branched
)
9241 if ((matchtype
= resources_match (rs
, idesc
, note
,
9242 CURR_SLOT
.qp_regno
, path
)) != 0)
9245 char pathmsg
[256] = "";
9246 char indexmsg
[256] = "";
9247 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
9250 sprintf (pathmsg
, " when entry is at label '%s'",
9251 md
.entry_labels
[path
- 1]);
9252 if (rs
->specific
&& rs
->index
!= 0)
9253 sprintf (indexmsg
, ", specific resource number is %d",
9255 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9257 (certain
? "violates" : "may violate"),
9258 dv_mode
[dep
->mode
], dep
->name
,
9259 dv_sem
[dep
->semantics
],
9262 if (md
.explicit_mode
)
9264 as_warn ("%s", msg
);
9266 as_warn (_("Only the first path encountering the conflict "
9268 as_warn_where (rs
->file
, rs
->line
,
9269 _("This is the location of the "
9270 "conflicting usage"));
9271 /* Don't bother checking other paths, to avoid duplicating
9278 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
9280 remove_marked_resource (rs
);
9282 /* since the set of dependencies has changed, start over */
9283 /* FIXME -- since we're removing dvs as we go, we
9284 probably don't really need to start over... */
9297 /* Register new dependencies based on the given opcode. */
9300 mark_resources (idesc
)
9301 struct ia64_opcode
*idesc
;
9304 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9305 int add_only_qp_reads
= 0;
9307 /* A conditional branch only uses its resources if it is taken; if it is
9308 taken, we stop following that path. The other branch types effectively
9309 *always* write their resources. If it's not taken, register only QP
9311 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
9313 add_only_qp_reads
= 1;
9317 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
9319 for (i
= 0; i
< opdeps
->nregs
; i
++)
9321 const struct ia64_dependency
*dep
;
9322 struct rsrc specs
[MAX_SPECS
];
9327 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
9328 note
= NOTE (opdeps
->regs
[i
]);
9330 if (add_only_qp_reads
9331 && !(dep
->mode
== IA64_DV_WAR
9332 && (dep
->specifier
== IA64_RS_PR
9333 || dep
->specifier
== IA64_RS_PRr
9334 || dep
->specifier
== IA64_RS_PR63
)))
9337 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
9340 if (md
.debug_dv
&& !count
)
9341 fprintf (stderr
, " No %s %s usage found (path %d)\n",
9342 dv_mode
[dep
->mode
], dep
->name
, md
.path
);
9347 mark_resource (idesc
, dep
, &specs
[count
],
9348 DEP (opdeps
->regs
[i
]), md
.path
);
9351 /* The execution path may affect register values, which may in turn
9352 affect which indirect-access resources are accessed. */
9353 switch (dep
->specifier
)
9365 for (path
= 0; path
< md
.path
; path
++)
9367 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
9369 mark_resource (idesc
, dep
, &specs
[count
],
9370 DEP (opdeps
->regs
[i
]), path
);
9377 /* Remove dependencies when they no longer apply. */
9380 update_dependencies (idesc
)
9381 struct ia64_opcode
*idesc
;
9385 if (strcmp (idesc
->name
, "srlz.i") == 0)
9387 instruction_serialization ();
9389 else if (strcmp (idesc
->name
, "srlz.d") == 0)
9391 data_serialization ();
9393 else if (is_interruption_or_rfi (idesc
)
9394 || is_taken_branch (idesc
))
9396 /* Although technically the taken branch doesn't clear dependencies
9397 which require a srlz.[id], we don't follow the branch; the next
9398 instruction is assumed to start with a clean slate. */
9402 else if (is_conditional_branch (idesc
)
9403 && CURR_SLOT
.qp_regno
!= 0)
9405 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
9407 for (i
= 0; i
< qp_implieslen
; i
++)
9409 /* If the conditional branch's predicate is implied by the predicate
9410 in an existing dependency, remove that dependency. */
9411 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
9414 /* Note that this implied predicate takes a branch so that if
9415 a later insn generates a DV but its predicate implies this
9416 one, we can avoid the false DV warning. */
9417 qp_implies
[i
].p2_branched
= 1;
9418 while (depind
< regdepslen
)
9420 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
9422 print_dependency ("Removing", depind
);
9423 regdeps
[depind
] = regdeps
[--regdepslen
];
9430 /* Any marked resources which have this same predicate should be
9431 cleared, provided that the QP hasn't been modified between the
9432 marking instruction and the branch. */
9435 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
9440 while (i
< regdepslen
)
9442 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
9443 && regdeps
[i
].link_to_qp_branch
9444 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
9445 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
9447 /* Treat like a taken branch */
9448 print_dependency ("Removing", i
);
9449 regdeps
[i
] = regdeps
[--regdepslen
];
9458 /* Examine the current instruction for dependency violations. */
9462 struct ia64_opcode
*idesc
;
9466 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
9467 idesc
->name
, CURR_SLOT
.src_line
,
9468 idesc
->dependencies
->nchks
,
9469 idesc
->dependencies
->nregs
);
9472 /* Look through the list of currently marked resources; if the current
9473 instruction has the dependency in its chks list which uses that resource,
9474 check against the specific resources used. */
9475 check_dependencies (idesc
);
9477 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9478 then add them to the list of marked resources. */
9479 mark_resources (idesc
);
9481 /* There are several types of dependency semantics, and each has its own
9482 requirements for being cleared
9484 Instruction serialization (insns separated by interruption, rfi, or
9485 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9487 Data serialization (instruction serialization, or writer + srlz.d +
9488 reader, where writer and srlz.d are in separate groups) clears
9489 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9490 always be the case).
9492 Instruction group break (groups separated by stop, taken branch,
9493 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9495 update_dependencies (idesc
);
9497 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9498 warning. Keep track of as many as possible that are useful. */
9499 note_register_values (idesc
);
9501 /* We don't need or want this anymore. */
9502 md
.mem_offset
.hint
= 0;
9507 /* Translate one line of assembly. Pseudo ops and labels do not show
9513 char *saved_input_line_pointer
, *mnemonic
;
9514 const struct pseudo_opcode
*pdesc
;
9515 struct ia64_opcode
*idesc
;
9516 unsigned char qp_regno
;
9520 saved_input_line_pointer
= input_line_pointer
;
9521 input_line_pointer
= str
;
9523 /* extract the opcode (mnemonic): */
9525 mnemonic
= input_line_pointer
;
9526 ch
= get_symbol_end ();
9527 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
9530 *input_line_pointer
= ch
;
9531 (*pdesc
->handler
) (pdesc
->arg
);
9535 /* Find the instruction descriptor matching the arguments. */
9537 idesc
= ia64_find_opcode (mnemonic
);
9538 *input_line_pointer
= ch
;
9541 as_bad ("Unknown opcode `%s'", mnemonic
);
9545 idesc
= parse_operands (idesc
);
9549 /* Handle the dynamic ops we can handle now: */
9550 if (idesc
->type
== IA64_TYPE_DYN
)
9552 if (strcmp (idesc
->name
, "add") == 0)
9554 if (CURR_SLOT
.opnd
[2].X_op
== O_register
9555 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
9559 ia64_free_opcode (idesc
);
9560 idesc
= ia64_find_opcode (mnemonic
);
9562 know (!idesc
->next
);
9565 else if (strcmp (idesc
->name
, "mov") == 0)
9567 enum ia64_opnd opnd1
, opnd2
;
9570 opnd1
= idesc
->operands
[0];
9571 opnd2
= idesc
->operands
[1];
9572 if (opnd1
== IA64_OPND_AR3
)
9574 else if (opnd2
== IA64_OPND_AR3
)
9578 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
9579 && ar_is_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
9583 ia64_free_opcode (idesc
);
9584 idesc
= ia64_find_opcode (mnemonic
);
9585 while (idesc
!= NULL
9586 && (idesc
->operands
[0] != opnd1
9587 || idesc
->operands
[1] != opnd2
))
9588 idesc
= get_next_opcode (idesc
);
9593 if (md
.qp
.X_op
== O_register
)
9595 qp_regno
= md
.qp
.X_add_number
- REG_P
;
9596 md
.qp
.X_op
= O_absent
;
9599 flags
= idesc
->flags
;
9601 if ((flags
& IA64_OPCODE_FIRST
) != 0)
9602 insn_group_break (1, 0, 0);
9604 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
9606 as_bad ("`%s' cannot be predicated", idesc
->name
);
9610 /* Build the instruction. */
9611 CURR_SLOT
.qp_regno
= qp_regno
;
9612 CURR_SLOT
.idesc
= idesc
;
9613 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
9614 dwarf2_where (&CURR_SLOT
.debug_line
);
9616 /* Add unwind entry, if there is one. */
9617 if (unwind
.current_entry
)
9619 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
9620 unwind
.current_entry
= NULL
;
9623 /* Check for dependency violations. */
9627 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9628 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9631 if ((flags
& IA64_OPCODE_LAST
) != 0)
9632 insn_group_break (1, 0, 0);
9634 md
.last_text_seg
= now_seg
;
9637 input_line_pointer
= saved_input_line_pointer
;
9640 /* Called when symbol NAME cannot be found in the symbol table.
9641 Should be used for dynamic valued symbols only. */
9644 md_undefined_symbol (name
)
9645 char *name ATTRIBUTE_UNUSED
;
9650 /* Called for any expression that can not be recognized. When the
9651 function is called, `input_line_pointer' will point to the start of
9658 enum pseudo_type pseudo_type
;
9663 switch (*input_line_pointer
)
9666 /* Find what relocation pseudo-function we're dealing with. */
9668 ch
= *++input_line_pointer
;
9669 for (i
= 0; i
< NELEMS (pseudo_func
); ++i
)
9670 if (pseudo_func
[i
].name
&& pseudo_func
[i
].name
[0] == ch
)
9672 len
= strlen (pseudo_func
[i
].name
);
9673 if (strncmp (pseudo_func
[i
].name
+ 1,
9674 input_line_pointer
+ 1, len
- 1) == 0
9675 && !is_part_of_name (input_line_pointer
[len
]))
9677 input_line_pointer
+= len
;
9678 pseudo_type
= pseudo_func
[i
].type
;
9682 switch (pseudo_type
)
9684 case PSEUDO_FUNC_RELOC
:
9686 if (*input_line_pointer
!= '(')
9688 as_bad ("Expected '('");
9692 ++input_line_pointer
;
9694 if (*input_line_pointer
++ != ')')
9696 as_bad ("Missing ')'");
9699 if (e
->X_op
!= O_symbol
)
9701 if (e
->X_op
!= O_pseudo_fixup
)
9703 as_bad ("Not a symbolic expression");
9706 if (S_GET_VALUE (e
->X_op_symbol
) == FUNC_FPTR_RELATIVE
9707 && i
== FUNC_LT_RELATIVE
)
9708 i
= FUNC_LT_FPTR_RELATIVE
;
9711 as_bad ("Illegal combination of relocation functions");
9715 /* Make sure gas doesn't get rid of local symbols that are used
9717 e
->X_op
= O_pseudo_fixup
;
9718 e
->X_op_symbol
= pseudo_func
[i
].u
.sym
;
9721 case PSEUDO_FUNC_CONST
:
9722 e
->X_op
= O_constant
;
9723 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
9726 case PSEUDO_FUNC_REG
:
9727 e
->X_op
= O_register
;
9728 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
9732 name
= input_line_pointer
- 1;
9734 as_bad ("Unknown pseudo function `%s'", name
);
9740 ++input_line_pointer
;
9742 if (*input_line_pointer
!= ']')
9744 as_bad ("Closing bracket misssing");
9749 if (e
->X_op
!= O_register
)
9750 as_bad ("Register expected as index");
9752 ++input_line_pointer
;
9763 ignore_rest_of_line ();
9766 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
9767 a section symbol plus some offset. For relocs involving @fptr(),
9768 directives we don't want such adjustments since we need to have the
9769 original symbol's name in the reloc. */
9771 ia64_fix_adjustable (fix
)
9774 /* Prevent all adjustments to global symbols */
9775 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
9778 switch (fix
->fx_r_type
)
9780 case BFD_RELOC_IA64_FPTR64I
:
9781 case BFD_RELOC_IA64_FPTR32MSB
:
9782 case BFD_RELOC_IA64_FPTR32LSB
:
9783 case BFD_RELOC_IA64_FPTR64MSB
:
9784 case BFD_RELOC_IA64_FPTR64LSB
:
9785 case BFD_RELOC_IA64_LTOFF_FPTR22
:
9786 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
9796 ia64_force_relocation (fix
)
9799 switch (fix
->fx_r_type
)
9801 case BFD_RELOC_IA64_FPTR64I
:
9802 case BFD_RELOC_IA64_FPTR32MSB
:
9803 case BFD_RELOC_IA64_FPTR32LSB
:
9804 case BFD_RELOC_IA64_FPTR64MSB
:
9805 case BFD_RELOC_IA64_FPTR64LSB
:
9807 case BFD_RELOC_IA64_LTOFF22
:
9808 case BFD_RELOC_IA64_LTOFF64I
:
9809 case BFD_RELOC_IA64_LTOFF_FPTR22
:
9810 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
9811 case BFD_RELOC_IA64_PLTOFF22
:
9812 case BFD_RELOC_IA64_PLTOFF64I
:
9813 case BFD_RELOC_IA64_PLTOFF64MSB
:
9814 case BFD_RELOC_IA64_PLTOFF64LSB
:
9823 /* Decide from what point a pc-relative relocation is relative to,
9824 relative to the pc-relative fixup. Er, relatively speaking. */
9826 ia64_pcrel_from_section (fix
, sec
)
9830 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
9832 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
9838 /* This is called whenever some data item (not an instruction) needs a
9839 fixup. We pick the right reloc code depending on the byteorder
9840 currently in effect. */
9842 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
9848 bfd_reloc_code_real_type code
;
9853 /* There are no reloc for 8 and 16 bit quantities, but we allow
9854 them here since they will work fine as long as the expression
9855 is fully defined at the end of the pass over the source file. */
9856 case 1: code
= BFD_RELOC_8
; break;
9857 case 2: code
= BFD_RELOC_16
; break;
9859 if (target_big_endian
)
9860 code
= BFD_RELOC_IA64_DIR32MSB
;
9862 code
= BFD_RELOC_IA64_DIR32LSB
;
9866 if (target_big_endian
)
9867 code
= BFD_RELOC_IA64_DIR64MSB
;
9869 code
= BFD_RELOC_IA64_DIR64LSB
;
9873 if (exp
->X_op
== O_pseudo_fixup
9875 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
9877 if (target_big_endian
)
9878 code
= BFD_RELOC_IA64_IPLTMSB
;
9880 code
= BFD_RELOC_IA64_IPLTLSB
;
9882 exp
->X_op
= O_symbol
;
9888 as_bad ("Unsupported fixup size %d", nbytes
);
9889 ignore_rest_of_line ();
9892 if (exp
->X_op
== O_pseudo_fixup
)
9895 exp
->X_op
= O_symbol
;
9896 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
9899 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
9900 /* We need to store the byte order in effect in case we're going
9901 to fix an 8 or 16 bit relocation (for which there no real
9902 relocs available). See md_apply_fix3(). */
9903 fix
->tc_fix_data
.bigendian
= target_big_endian
;
9906 /* Return the actual relocation we wish to associate with the pseudo
9907 reloc described by SYM and R_TYPE. SYM should be one of the
9908 symbols in the pseudo_func array, or NULL. */
9910 static bfd_reloc_code_real_type
9911 ia64_gen_real_reloc_type (sym
, r_type
)
9913 bfd_reloc_code_real_type r_type
;
9915 bfd_reloc_code_real_type
new = 0;
9922 switch (S_GET_VALUE (sym
))
9924 case FUNC_FPTR_RELATIVE
:
9927 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
9928 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
9929 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
9930 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
9931 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
9936 case FUNC_GP_RELATIVE
:
9939 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
9940 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
9941 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
9942 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
9943 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
9944 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
9949 case FUNC_LT_RELATIVE
:
9952 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
9953 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
9958 case FUNC_PC_RELATIVE
:
9961 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
9962 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
9963 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
9964 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
9965 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
9966 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
9971 case FUNC_PLT_RELATIVE
:
9974 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
9975 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
9976 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
9977 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
9982 case FUNC_SEC_RELATIVE
:
9985 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
9986 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
9987 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
9988 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
9993 case FUNC_SEG_RELATIVE
:
9996 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
9997 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
9998 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
9999 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
10004 case FUNC_LTV_RELATIVE
:
10007 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
10008 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
10009 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
10010 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
10015 case FUNC_LT_FPTR_RELATIVE
:
10018 case BFD_RELOC_IA64_IMM22
:
10019 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
10020 case BFD_RELOC_IA64_IMM64
:
10021 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
10030 /* Hmmmm. Should this ever occur? */
10037 /* Here is where generate the appropriate reloc for pseudo relocation
10040 ia64_validate_fix (fix
)
10043 switch (fix
->fx_r_type
)
10045 case BFD_RELOC_IA64_FPTR64I
:
10046 case BFD_RELOC_IA64_FPTR32MSB
:
10047 case BFD_RELOC_IA64_FPTR64LSB
:
10048 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10049 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10050 if (fix
->fx_offset
!= 0)
10051 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10052 "No addend allowed in @fptr() relocation");
10062 fix_insn (fix
, odesc
, value
)
10064 const struct ia64_operand
*odesc
;
10067 bfd_vma insn
[3], t0
, t1
, control_bits
;
10072 slot
= fix
->fx_where
& 0x3;
10073 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
10075 /* Bundles are always in little-endian byte order */
10076 t0
= bfd_getl64 (fixpos
);
10077 t1
= bfd_getl64 (fixpos
+ 8);
10078 control_bits
= t0
& 0x1f;
10079 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
10080 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
10081 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
10084 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
10086 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
10087 insn
[2] |= (((value
& 0x7f) << 13)
10088 | (((value
>> 7) & 0x1ff) << 27)
10089 | (((value
>> 16) & 0x1f) << 22)
10090 | (((value
>> 21) & 0x1) << 21)
10091 | (((value
>> 63) & 0x1) << 36));
10093 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
10095 if (value
& ~0x3fffffffffffffffULL
)
10096 err
= "integer operand out of range";
10097 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
10098 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
10100 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
10103 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
10104 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
10105 | (((value
>> 0) & 0xfffff) << 13));
10108 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
10111 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
10113 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
10114 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
10115 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
10116 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
10119 /* Attempt to simplify or even eliminate a fixup. The return value is
10120 ignored; perhaps it was once meaningful, but now it is historical.
10121 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10123 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10127 md_apply_fix3 (fix
, valP
, seg
)
10130 segT seg ATTRIBUTE_UNUSED
;
10133 valueT value
= * valP
;
10136 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
10140 switch (fix
->fx_r_type
)
10142 case BFD_RELOC_IA64_DIR32MSB
:
10143 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32MSB
;
10147 case BFD_RELOC_IA64_DIR32LSB
:
10148 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32LSB
;
10152 case BFD_RELOC_IA64_DIR64MSB
:
10153 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64MSB
;
10157 case BFD_RELOC_IA64_DIR64LSB
:
10158 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64LSB
;
10168 if (fix
->fx_r_type
== (int) BFD_RELOC_UNUSED
)
10170 /* This must be a TAG13 or TAG13b operand. There are no external
10171 relocs defined for them, so we must give an error. */
10172 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10173 "%s must have a constant value",
10174 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
10179 /* ??? This is a hack copied from tc-i386.c to make PCREL relocs
10180 work. There should be a better way to handle this. */
10182 fix
->fx_offset
+= fix
->fx_where
+ fix
->fx_frag
->fr_address
;
10184 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
10186 if (fix
->tc_fix_data
.bigendian
)
10187 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
10189 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
10194 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
10199 /* Generate the BFD reloc to be stuck in the object file from the
10200 fixup used internally in the assembler. */
10203 tc_gen_reloc (sec
, fixp
)
10204 asection
*sec ATTRIBUTE_UNUSED
;
10209 reloc
= xmalloc (sizeof (*reloc
));
10210 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
10211 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
10212 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
10213 reloc
->addend
= fixp
->fx_offset
;
10214 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
10218 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
10219 "Cannot represent %s relocation in object file",
10220 bfd_get_reloc_code_name (fixp
->fx_r_type
));
10225 /* Turn a string in input_line_pointer into a floating point constant
10226 of type TYPE, and store the appropriate bytes in *LIT. The number
10227 of LITTLENUMS emitted is stored in *SIZE. An error message is
10228 returned, or NULL on OK. */
10230 #define MAX_LITTLENUMS 5
10233 md_atof (type
, lit
, size
)
10238 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
10239 LITTLENUM_TYPE
*word
;
10269 return "Bad call to MD_ATOF()";
10271 t
= atof_ieee (input_line_pointer
, type
, words
);
10273 input_line_pointer
= t
;
10274 *size
= prec
* sizeof (LITTLENUM_TYPE
);
10276 for (word
= words
+ prec
- 1; prec
--;)
10278 md_number_to_chars (lit
, (long) (*word
--), sizeof (LITTLENUM_TYPE
));
10279 lit
+= sizeof (LITTLENUM_TYPE
);
10284 /* Round up a section's size to the appropriate boundary. */
10286 md_section_align (seg
, size
)
10290 int align
= bfd_get_section_alignment (stdoutput
, seg
);
10291 valueT mask
= ((valueT
) 1 << align
) - 1;
10293 return (size
+ mask
) & ~mask
;
10296 /* Handle ia64 specific semantics of the align directive. */
10299 ia64_md_do_align (n
, fill
, len
, max
)
10300 int n ATTRIBUTE_UNUSED
;
10301 const char *fill ATTRIBUTE_UNUSED
;
10302 int len ATTRIBUTE_UNUSED
;
10303 int max ATTRIBUTE_UNUSED
;
10305 if (subseg_text_p (now_seg
))
10306 ia64_flush_insns ();
10309 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10310 of an rs_align_code fragment. */
10313 ia64_handle_align (fragp
)
10316 /* Use mfi bundle of nops with no stop bits. */
10317 static const unsigned char be_nop
[]
10318 = { 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
10319 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0c};
10320 static const unsigned char le_nop
[]
10321 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10322 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10327 if (fragp
->fr_type
!= rs_align_code
)
10330 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
10331 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
10333 /* Make sure we are on a 16-byte boundary, in case someone has been
10334 putting data into a text section. */
10337 int fix
= bytes
& 15;
10338 memset (p
, 0, fix
);
10341 fragp
->fr_fix
+= fix
;
10344 memcpy (p
, (target_big_endian
? be_nop
: le_nop
), 16);
10345 fragp
->fr_var
= 16;