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changes from Minh Tran-Le <TRANLE@INTELLICORP.COM> to support i386
[binutils-gdb.git] / gas / config / tc-m68k.c
1 /* tc-m68k.c All the m68020 specific stuff in one convenient, huge,
2 slow to compile, easy to find file.
3
4 Copyright (C) 1987, 1991, 1992 Free Software Foundation, Inc.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21
22 #include <ctype.h>
23
24 #include "as.h"
25
26 #include "obstack.h"
27
28 /* note that this file includes real declarations and thus can only be included by one source file per executable. */
29 #include "opcode/m68k.h"
30 #ifdef TE_SUN
31 /* This variable contains the value to write out at the beginning of
32 the a.out file. The 2<<16 means that this is a 68020 file instead
33 of an old-style 68000 file */
34
35 long omagic = 2<<16|OMAGIC; /* Magic byte for header file */
36 #else
37 long omagic = OMAGIC;
38 #endif
39
40 /* This array holds the chars that always start a comment. If the
41 pre-processor is disabled, these aren't very useful */
42 const char comment_chars[] = "|";
43
44 /* This array holds the chars that only start a comment at the beginning of
45 a line. If the line seems to have the form '# 123 filename'
46 .line and .file directives will appear in the pre-processed output */
47 /* Note that input_file.c hand checks for '#' at the beginning of the
48 first line of the input file. This is because the compiler outputs
49 #NO_APP at the beginning of its output. */
50 /* Also note that comments like this one will always work. */
51 const char line_comment_chars[] = "#";
52
53 /* Chars that can be used to separate mant from exp in floating point nums */
54 const char EXP_CHARS[] = "eE";
55
56 /* Chars that mean this number is a floating point constant */
57 /* As in 0f12.456 */
58 /* or 0d1.2345e12 */
59
60 const char FLT_CHARS[] = "rRsSfFdDxXeEpP";
61
62 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
63 changed in read.c . Ideally it shouldn't have to know about it at all,
64 but nothing is ideal around here.
65 */
66
67 int md_reloc_size = 8; /* Size of relocation record */
68
69 /* Its an arbitrary name: This means I don't approve of it */
70 /* See flames below */
71 static struct obstack robyn;
72
73 #define TAB(x,y) (((x)<<2)+(y))
74 #define TABTYPE(xy) ((xy) >> 2)
75 #define BYTE 0
76 #define SHORT 1
77 #define LONG 2
78 #define SZ_UNDEF 3
79
80 #define BRANCH 1
81 #define FBRANCH 2
82 #define PCREL 3
83 #define BCC68000 4
84 #define DBCC 5
85 #define PCLEA 6
86
87 /* Operands we can parse: (And associated modes)
88
89 numb: 8 bit num
90 numw: 16 bit num
91 numl: 32 bit num
92 dreg: data reg 0-7
93 reg: address or data register
94 areg: address register
95 apc: address register, PC, ZPC or empty string
96 num: 16 or 32 bit num
97 num2: like num
98 sz: w or l if omitted, l assumed
99 scale: 1 2 4 or 8 if omitted, 1 assumed
100
101 7.4 IMMED #num --> NUM
102 0.? DREG dreg --> dreg
103 1.? AREG areg --> areg
104 2.? AINDR areg@ --> *(areg)
105 3.? AINC areg@+ --> *(areg++)
106 4.? ADEC areg@- --> *(--areg)
107 5.? AOFF apc@(numw) --> *(apc+numw) -- empty string and ZPC not allowed here
108 6.? AINDX apc@(num,reg:sz:scale) --> *(apc+num+reg*scale)
109 6.? AINDX apc@(reg:sz:scale) --> same, with num=0
110 6.? APODX apc@(num)@(num2,reg:sz:scale) --> *(*(apc+num)+num2+reg*scale)
111 6.? APODX apc@(num)@(reg:sz:scale) --> same, with num2=0
112 6.? AMIND apc@(num)@(num2) --> *(*(apc+num)+num2) (previous mode without an index reg)
113 6.? APRDX apc@(num,reg:sz:scale)@(num2) --> *(*(apc+num+reg*scale)+num2)
114 6.? APRDX apc@(reg:sz:scale)@(num2) --> same, with num=0
115 7.0 ABSL num:sz --> *(num)
116 num --> *(num) (sz L assumed)
117 *** MSCR otherreg --> Magic
118 With -l option
119 5.? AOFF apc@(num) --> *(apc+num) -- empty string and ZPC not allowed here still
120
121 examples:
122 #foo #0x35 #12
123 d2
124 a4
125 a3@
126 a5@+
127 a6@-
128 a2@(12) pc@(14)
129 a1@(5,d2:w:1) @(45,d6:l:4)
130 pc@(a2) @(d4)
131 etc . . .
132
133
134 #name@(numw) -->turn into PC rel mode
135 apc@(num8,reg:sz:scale) --> *(apc+num8+reg*scale)
136
137 */
138
139 enum operand_type {
140 IMMED = 1,
141 DREG,
142 AREG,
143 AINDR,
144 ADEC,
145 AINC,
146 AOFF,
147 AINDX,
148 APODX,
149 AMIND,
150 APRDX,
151 ABSL,
152 MSCR,
153 REGLST,
154 };
155
156
157 struct m68k_exp {
158 char *e_beg;
159 char *e_end;
160 expressionS e_exp;
161 short e_siz; /* 0== default 1==short/byte 2==word 3==long */
162 };
163
164 /* DATA and ADDR have to be contiguous, so that reg-DATA gives 0-7==data reg,
165 8-15==addr reg for operands that take both types */
166
167 enum _register {
168 DATA = 1, /* 1- 8 == data registers 0-7 */
169 DATA0 = DATA,
170 DATA1,
171 DATA2,
172 DATA3,
173 DATA4,
174 DATA5,
175 DATA6,
176 DATA7,
177
178 ADDR,
179 ADDR0 = ADDR,
180 ADDR1,
181 ADDR2,
182 ADDR3,
183 ADDR4,
184 ADDR5,
185 ADDR6,
186 ADDR7,
187
188 /* Note that COPNUM==processor #1 -- COPNUM+7==#8, which stores as 000 */
189 /* I think. . . */
190
191 SP = ADDR7,
192
193 FPREG, /* Eight FP registers */
194 FP0 = FPREG,
195 FP1,
196 FP2,
197 FP3,
198 FP4,
199 FP5,
200 FP6,
201 FP7,
202 COPNUM = (FPREG+8), /* Co-processor #1-#8 */
203 COP0 = COPNUM,
204 COP1,
205 COP2,
206 COP3,
207 COP4,
208 COP5,
209 COP6,
210 COP7,
211 PC, /* Program counter */
212 ZPC, /* Hack for Program space, but 0 addressing */
213 SR, /* Status Reg */
214 CCR, /* Condition code Reg */
215
216 /* These have to be in order for the movec instruction to work. */
217 USP, /* User Stack Pointer */
218 ISP, /* Interrupt stack pointer */
219 SFC,
220 DFC,
221 CACR,
222 VBR,
223 CAAR,
224 MSP,
225 ITT0,
226 ITT1,
227 DTT0,
228 DTT1,
229 MMUSR,
230 TC,
231 SRP,
232 URP,
233 /* end of movec ordering constraints */
234
235 FPI,
236 FPS,
237 FPC,
238
239 DRP,
240 CRP,
241 CAL,
242 VAL,
243 SCC,
244 AC,
245 BAD,
246 BAD0 = BAD,
247 BAD1,
248 BAD2,
249 BAD3,
250 BAD4,
251 BAD5,
252 BAD6,
253 BAD7,
254 BAC,
255 BAC0 = BAC,
256 BAC1,
257 BAC2,
258 BAC3,
259 BAC4,
260 BAC5,
261 BAC6,
262 BAC7,
263 PSR,
264 PCSR,
265
266 IC, /* instruction cache token */
267 DC, /* data cache token */
268 NC, /* no cache token */
269 BC, /* both caches token */
270
271 };
272
273 /* Internal form of an operand. */
274 struct m68k_op {
275 char *error; /* Couldn't parse it */
276 enum operand_type mode; /* What mode this instruction is in. */
277 enum _register reg; /* Base register */
278 struct m68k_exp *con1;
279 int ireg; /* Index register */
280 int isiz; /* 0==unspec 1==byte(?) 2==short 3==long */
281 int imul; /* Multipy ireg by this (1,2,4,or 8) */
282 struct m68k_exp *con2;
283 };
284
285 /* internal form of a 68020 instruction */
286 struct m68k_it {
287 char *error;
288 char *args; /* list of opcode info */
289 int numargs;
290
291 int numo; /* Number of shorts in opcode */
292 short opcode[11];
293
294 struct m68k_op operands[6];
295
296 int nexp; /* number of exprs in use */
297 struct m68k_exp exprs[4];
298
299 int nfrag; /* Number of frags we have to produce */
300 struct {
301 int fragoff; /* Where in the current opcode[] the frag ends */
302 symbolS *fadd;
303 long foff;
304 int fragty;
305 } fragb[4];
306
307 int nrel; /* Num of reloc strucs in use */
308 struct {
309 int n;
310 symbolS *add,
311 *sub;
312 long off;
313 char wid;
314 char pcrel;
315 } reloc[5]; /* Five is enough??? */
316 };
317
318 #define cpu_of_arch(x) ((x) & m68000up)
319 #define float_of_arch(x) ((x) & mfloat)
320 #define mmu_of_arch(x) ((x) & mmmu)
321
322 static struct m68k_it the_ins; /* the instruction being assembled */
323
324 /* Macros for adding things to the m68k_it struct */
325
326 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
327
328 /* Like addword, but goes BEFORE general operands */
329 #define insop(w) {int z;\
330 for(z=the_ins.numo;z>opcode->m_codenum;--z)\
331 the_ins.opcode[z]=the_ins.opcode[z-1];\
332 for(z=0;z<the_ins.nrel;z++)\
333 the_ins.reloc[z].n+=2;\
334 the_ins.opcode[opcode->m_codenum]=w;\
335 the_ins.numo++;\
336 }
337
338
339 #define add_exp(beg,end) (\
340 the_ins.exprs[the_ins.nexp].e_beg=beg,\
341 the_ins.exprs[the_ins.nexp].e_end=end,\
342 &the_ins.exprs[the_ins.nexp++]\
343 )
344
345
346 /* The numo+1 kludge is so we can hit the low order byte of the prev word. Blecch*/
347 #define add_fix(width,exp,pc_rel) {\
348 the_ins.reloc[the_ins.nrel].n= ((width)=='B') ? (the_ins.numo*2-1) : \
349 (((width)=='b') ? ((the_ins.numo-1)*2) : (the_ins.numo*2));\
350 the_ins.reloc[the_ins.nrel].add=adds((exp));\
351 the_ins.reloc[the_ins.nrel].sub=subs((exp));\
352 the_ins.reloc[the_ins.nrel].off=offs((exp));\
353 the_ins.reloc[the_ins.nrel].wid=width;\
354 the_ins.reloc[the_ins.nrel++].pcrel=pc_rel;\
355 }
356
357 #define add_frag(add,off,type) {\
358 the_ins.fragb[the_ins.nfrag].fragoff=the_ins.numo;\
359 the_ins.fragb[the_ins.nfrag].fadd=add;\
360 the_ins.fragb[the_ins.nfrag].foff=off;\
361 the_ins.fragb[the_ins.nfrag++].fragty=type;\
362 }
363
364 #define isvar(exp) ((exp) && (adds(exp) || subs(exp)))
365
366 #define seg(exp) ((exp)->e_exp.X_seg)
367 #define adds(exp) ((exp)->e_exp.X_add_symbol)
368 #define subs(exp) ((exp)->e_exp.X_subtract_symbol)
369 #define offs(exp) ((exp)->e_exp.X_add_number)
370
371
372 struct m68k_incant {
373 char *m_operands;
374 unsigned long m_opcode;
375 short m_opnum;
376 short m_codenum;
377 enum m68k_architecture m_arch;
378 struct m68k_incant *m_next;
379 };
380
381 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
382 #define gettwo(x) (((x)->m_opcode)&0xffff)
383
384
385 #if __STDC__ == 1
386
387 static char *crack_operand(char *str, struct m68k_op *opP);
388 static int get_num(struct m68k_exp *exp, int ok);
389 static int get_regs(int i, char *str, struct m68k_op *opP);
390 static int reverse_16_bits(int in);
391 static int reverse_8_bits(int in);
392 static int try_index(char **s, struct m68k_op *opP);
393 static void install_gen_operand(int mode, int val);
394 static void install_operand(int mode, int val);
395 static void s_bss(void);
396 static void s_data1(void);
397 static void s_data2(void);
398 static void s_even(void);
399 static void s_proc(void);
400
401 #else /* not __STDC__ */
402
403 static char *crack_operand();
404 static int get_num();
405 static int get_regs();
406 static int reverse_16_bits();
407 static int reverse_8_bits();
408 static int try_index();
409 static void install_gen_operand();
410 static void install_operand();
411 static void s_bss();
412 static void s_data1();
413 static void s_data2();
414 static void s_even();
415 static void s_proc();
416
417 #endif /* not __STDC__ */
418
419 static enum m68k_architecture current_architecture = 0;
420
421 /* BCC68000 is for patching in an extra jmp instruction for long offsets
422 on the 68000. The 68000 doesn't support long branches with branchs */
423
424 /* This table desribes how you change sizes for the various types of variable
425 size expressions. This version only supports two kinds. */
426
427 /* Note that calls to frag_var need to specify the maximum expansion needed */
428 /* This is currently 10 bytes for DBCC */
429
430 /* The fields are:
431 How far Forward this mode will reach:
432 How far Backward this mode will reach:
433 How many bytes this mode will add to the size of the frag
434 Which mode to go to if the offset won't fit in this one
435 */
436 const relax_typeS
437 md_relax_table[] = {
438 { 1, 1, 0, 0 }, /* First entries aren't used */
439 { 1, 1, 0, 0 }, /* For no good reason except */
440 { 1, 1, 0, 0 }, /* that the VAX doesn't either */
441 { 1, 1, 0, 0 },
442
443 { (127), (-128), 0, TAB(BRANCH,SHORT)},
444 { (32767), (-32768), 2, TAB(BRANCH,LONG) },
445 { 0, 0, 4, 0 },
446 { 1, 1, 0, 0 },
447
448 { 1, 1, 0, 0 }, /* FBRANCH doesn't come BYTE */
449 { (32767), (-32768), 2, TAB(FBRANCH,LONG)},
450 { 0, 0, 4, 0 },
451 { 1, 1, 0, 0 },
452
453 { 1, 1, 0, 0 }, /* PCREL doesn't come BYTE */
454 { (32767), (-32768), 2, TAB(PCREL,LONG)},
455 { 0, 0, 4, 0 },
456 { 1, 1, 0, 0 },
457
458 { (127), (-128), 0, TAB(BCC68000,SHORT)},
459 { (32767), (-32768), 2, TAB(BCC68000,LONG) },
460 { 0, 0, 6, 0 }, /* jmp long space */
461 { 1, 1, 0, 0 },
462
463 { 1, 1, 0, 0 }, /* DBCC doesn't come BYTE */
464 { (32767), (-32768), 2, TAB(DBCC,LONG) },
465 { 0, 0, 10, 0 }, /* bra/jmp long space */
466 { 1, 1, 0, 0 },
467
468 { 1, 1, 0, 0 }, /* PCLEA doesn't come BYTE */
469 { 32767, -32768, 2, TAB(PCLEA,LONG) },
470 { 0, 0, 6, 0 },
471 { 1, 1, 0, 0 },
472
473 };
474
475 /* These are the machine dependent pseudo-ops. These are included so
476 the assembler can work on the output from the SUN C compiler, which
477 generates these.
478 */
479
480 /* This table describes all the machine specific pseudo-ops the assembler
481 has to support. The fields are:
482 pseudo-op name without dot
483 function to call to execute this pseudo-op
484 Integer arg to pass to the function
485 */
486 const pseudo_typeS md_pseudo_table[] = {
487 { "data1", s_data1, 0 },
488 { "data2", s_data2, 0 },
489 { "bss", s_bss, 0 },
490 { "even", s_even, 0 },
491 { "skip", s_space, 0 },
492 { "proc", s_proc, 0 },
493 { 0, 0, 0 }
494 };
495
496
497 /* #define isbyte(x) ((x)>=-128 && (x)<=127) */
498 /* #define isword(x) ((x)>=-32768 && (x)<=32767) */
499
500 #define issbyte(x) ((x)>=-128 && (x)<=127)
501 #define isubyte(x) ((x)>=0 && (x)<=255)
502 #define issword(x) ((x)>=-32768 && (x)<=32767)
503 #define isuword(x) ((x)>=0 && (x)<=65535)
504
505 #define isbyte(x) ((x)>=-128 && (x)<=255)
506 #define isword(x) ((x)>=-32768 && (x)<=65535)
507 #define islong(x) (1)
508
509 extern char *input_line_pointer;
510
511 enum {
512 FAIL = 0,
513 OK = 1,
514 };
515
516 /* JF these tables here are for speed at the expense of size */
517 /* You can replace them with the #if 0 versions if you really
518 need space and don't mind it running a bit slower */
519
520 static char mklower_table[256];
521 #define mklower(c) (mklower_table[(unsigned char)(c)])
522 static char notend_table[256];
523 static char alt_notend_table[256];
524 #define notend(s) ( !(notend_table[(unsigned char)(*s)] || (*s==':' &&\
525 alt_notend_table[(unsigned char)(s[1])])))
526
527 #if 0
528 #define mklower(c) (isupper(c) ? tolower(c) : c)
529 #endif
530
531
532 /* JF modified this to handle cases where the first part of a symbol name
533 looks like a register */
534
535 /*
536 * m68k_reg_parse() := if it looks like a register, return it's token &
537 * advance the pointer.
538 */
539
540 enum _register m68k_reg_parse(ccp)
541 register char **ccp;
542 {
543 #ifndef MAX_REG_NAME_LEN
544 #define MAX_REG_NAME_LEN (6)
545 #endif /* MAX_REG_NAME_LEN */
546 register char c[MAX_REG_NAME_LEN];
547 char *p, *q;
548 register int n = 0,
549 ret = FAIL;
550
551 c[0] = mklower(ccp[0][0]);
552 #ifdef REGISTER_PREFIX
553 if (c[0] != REGISTER_PREFIX) {
554 return(FAIL);
555 } /* need prefix */
556 #endif
557
558 for (p = c, q = ccp[0]; p < c + MAX_REG_NAME_LEN; ++p, ++q)
559 {
560 if (*q == 0)
561 {
562 *p = 0;
563 break;
564 }
565 else
566 *p = mklower(*q);
567 } /* downcase */
568
569 switch(c[0]) {
570 case 'a':
571 if(c[1]>='0' && c[1]<='7') {
572 n=2;
573 ret=ADDR+c[1]-'0';
574 }
575 #ifndef NO_68851
576 else if (c[1] == 'c') {
577 n = 2;
578 ret = AC;
579 }
580 #endif
581 break;
582 #ifndef NO_68851
583 case 'b':
584 if (c[1] == 'a') {
585 if (c[2] == 'd') {
586 if (c[3] >= '0' && c[3] <= '7') {
587 n = 4;
588 ret = BAD + c[3] - '0';
589 }
590 } /* BAD */
591 if (c[2] == 'c') {
592 if (c[3] >= '0' && c[3] <= '7') {
593 n = 4;
594 ret = BAC + c[3] - '0';
595 }
596 } /* BAC */
597 } else if (c[1] == 'c') {
598 n = 2;
599 ret = BC;
600 } /* BC */
601 break;
602 #endif
603 case 'c':
604 #ifndef NO_68851
605 if (c[1] == 'a' && c[2] == 'l') {
606 n = 3;
607 ret = CAL;
608 } else
609 #endif
610 /* This supports both CCR and CC as the ccr reg. */
611 if(c[1]=='c' && c[2]=='r') {
612 n=3;
613 ret = CCR;
614 } else if(c[1]=='c') {
615 n=2;
616 ret = CCR;
617 } else if(c[1]=='a' && (c[2]=='a' || c[2]=='c') && c[3]=='r') {
618 n=4;
619 ret = c[2]=='a' ? CAAR : CACR;
620 }
621 #ifndef NO_68851
622 else if (c[1] == 'r' && c[2] == 'p') {
623 n = 3;
624 ret = (CRP);
625 }
626 #endif
627 break;
628 case 'd':
629 if (c[1] >= '0' && c[1] <= '7') {
630 n = 2;
631 ret = DATA + c[1] - '0';
632 } else if (c[1] == 'f' && c[2] == 'c') {
633 n = 3;
634 ret = DFC;
635 } else if (c[1] == 'c') {
636 n = 2;
637 ret = DC;
638 } else if (c[1] == 't' && c[2] == 't') {
639 if ('0' <= c[3] && c[3] <= '1') {
640 n = 4;
641 ret = DTT0 + (c[3] - '0');
642 } /* DTT[01] */
643 }
644 #ifndef NO_68851
645 else if (c[1] == 'r' && c[2] == 'p') {
646 n = 3;
647 ret = (DRP);
648 }
649 #endif
650 break;
651 case 'f':
652 if(c[1]=='p') {
653 if(c[2]>='0' && c[2]<='7') {
654 n=3;
655 ret = FPREG+c[2]-'0';
656 if(c[3]==':')
657 ccp[0][3]=',';
658 } else if(c[2]=='i') {
659 n=3;
660 ret = FPI;
661 } else if(c[2]=='s') {
662 n= (c[3] == 'r' ? 4 : 3);
663 ret = FPS;
664 } else if(c[2]=='c') {
665 n= (c[3] == 'r' ? 4 : 3);
666 ret = FPC;
667 }
668 }
669 break;
670 case 'i':
671 if (c[1] == 's' && c[2] == 'p') {
672 n = 3;
673 ret = ISP;
674 } else if (c[1] == 'c') {
675 n = 2;
676 ret = IC;
677 } else if (c[1] == 't' && c[2] == 't') {
678 if ('0' <= c[3] && c[3] <= '1') {
679 n = 4;
680 ret = ITT0 + (c[3] - '0');
681 } /* ITT[01] */
682 }
683 break;
684 case 'm':
685 if (c[1] == 's' && c[2] == 'p') {
686 n = 3;
687 ret = MSP;
688 } else if (c[1] == 'm' && c[2] == 'u' && c[3] == 's' && c[4] == 'r') {
689 n = 5;
690 ret = MMUSR;
691 }
692 break;
693 case 'n':
694 if (c[1] == 'c') {
695 n = 2;
696 ret = NC;
697 }
698 break;
699 case 'p':
700 if(c[1]=='c') {
701 #ifndef NO_68851
702 if(c[2] == 's' && c[3]=='r') {
703 n=4;
704 ret = (PCSR);
705 } else
706 #endif
707 {
708 n=2;
709 ret = PC;
710 }
711 }
712 #ifndef NO_68851
713 else if (c[1] == 's' && c[2] == 'r') {
714 n = 3;
715 ret = (PSR);
716 }
717 #endif
718 break;
719 case 's':
720 #ifndef NO_68851
721 if (c[1] == 'c' && c[2] == 'c') {
722 n = 3;
723 ret = (SCC);
724 } else
725 #endif
726 if (c[1] == 'r') {
727 if (c[2] == 'p') {
728 n = 3;
729 ret = SRP;
730 } else {
731 n = 2;
732 ret = SR;
733 } /* srp else sr */
734 } else if (c[1] == 'p') {
735 n = 2;
736 ret = SP;
737 } else if (c[1] == 'f' && c[2] == 'c') {
738 n = 3;
739 ret = SFC;
740 }
741 break;
742 case 't':
743 if (c[1] == 'c') {
744 n = 2;
745 ret = TC;
746 }
747 break;
748 case 'u':
749 if (c[1] == 's' && c[2] == 'p') {
750 n=3;
751 ret = USP;
752 } else if (c[1] == 'r' && c[2] == 'p') {
753 n = 3;
754 ret = URP;
755 }
756 break;
757 case 'v':
758 #ifndef NO_68851
759 if (c[1] == 'a' && c[2] == 'l') {
760 n = 3;
761 ret = (VAL);
762 } else
763 #endif
764 if(c[1]=='b' && c[2]=='r') {
765 n=3;
766 ret = VBR;
767 }
768 break;
769 case 'z':
770 if(c[1]=='p' && c[2]=='c') {
771 n=3;
772 ret = ZPC;
773 }
774 break;
775 default:
776 break;
777 }
778 if(n) {
779 #ifdef REGISTER_PREFIX
780 n++;
781 #endif
782 if(isalnum(ccp[0][n]) || ccp[0][n]=='_')
783 ret=FAIL;
784 else
785 ccp[0]+=n;
786 } else
787 ret = FAIL;
788 return ret;
789 }
790
791 #define SKIP_WHITE() { str++; if(*str==' ') str++;}
792
793 /*
794 * m68k_ip_op := '#' + <anything>
795 * | <register> + range_sep + get_regs
796 * ;
797 *
798 * range_sep := '/' | '-' ;
799 *
800 * SKIP_WHITE := <empty> | ' ' ;
801 *
802 */
803
804 int
805 m68k_ip_op(str,opP)
806 char *str;
807 register struct m68k_op *opP;
808 {
809 char *strend;
810 long i;
811 char *parse_index();
812
813 if (*str==' ') {
814 str++;
815 } /* Find the beginning of the string */
816
817 if(!*str) {
818 opP->error="Missing operand";
819 return FAIL;
820 } /* Out of gas */
821
822 for(strend = str; *strend; strend++) ;;
823
824 --strend;
825
826 if(*str=='#') {
827 str++;
828 opP->con1=add_exp(str,strend);
829 opP->mode=IMMED;
830 return OK;
831 } /* Guess what: A constant. Shar and enjoy */
832
833 i = m68k_reg_parse(&str);
834
835 /* is a register, is exactly a register, and is followed by '@' */
836
837 if((i==FAIL || *str!='\0') && *str!='@') {
838 char *stmp;
839
840 if(i!=FAIL && (*str=='/' || *str=='-')) {
841 opP->mode=REGLST;
842 return(get_regs(i,str,opP));
843 }
844 if ((stmp=strchr(str,'@')) != '\0') {
845 opP->con1=add_exp(str,stmp-1);
846 if(stmp==strend) {
847 opP->mode=AINDX;
848 return(OK);
849 }
850
851 if ((current_architecture & m68020up) == 0) {
852 return(FAIL);
853 } /* if target is not a '20 or better */
854
855 stmp++;
856 if(*stmp++!='(' || *strend--!=')') {
857 opP->error="Malformed operand";
858 return(FAIL);
859 }
860 i=try_index(&stmp,opP);
861 opP->con2=add_exp(stmp,strend);
862
863 if (i == FAIL) {
864 opP->mode=AMIND;
865 } else {
866 opP->mode=APODX;
867 }
868 return(OK);
869 } /* if there's an '@' */
870 opP->mode = ABSL;
871 opP->con1 = add_exp(str,strend);
872 return(OK);
873 } /* not a register, not exactly a register, or no '@' */
874
875 opP->reg=i;
876
877 if (*str=='\0') {
878 if(i>=DATA+0 && i<=DATA+7)
879 opP->mode=DREG;
880 else if(i>=ADDR+0 && i<=ADDR+7)
881 opP->mode=AREG;
882 else
883 opP->mode=MSCR;
884 return OK;
885 }
886
887 if((i<ADDR+0 || i>ADDR+7) && i!=PC && i!=ZPC && i!=FAIL) { /* Can't indirect off non address regs */
888 opP->error="Invalid indirect register";
889 return FAIL;
890 }
891 know(*str == '@');
892
893 str++;
894 switch(*str) {
895 case '\0':
896 opP->mode=AINDR;
897 return OK;
898 case '-':
899 opP->mode=ADEC;
900 return OK;
901 case '+':
902 opP->mode=AINC;
903 return OK;
904 case '(':
905 str++;
906 break;
907 default:
908 opP->error="Junk after indirect";
909 return FAIL;
910 }
911 /* Some kind of indexing involved. Lets find out how bad it is */
912 i=try_index(&str,opP);
913 /* Didn't start with an index reg, maybe its offset or offset,reg */
914 if(i==FAIL) {
915 char *beg_str;
916
917 beg_str=str;
918 for(i=1;i;) {
919 switch(*str++) {
920 case '\0':
921 opP->error="Missing )";
922 return FAIL;
923 case ',': i=0; break;
924 case '(': i++; break;
925 case ')': --i; break;
926 }
927 }
928 /* if(str[-3]==':') {
929 int siz;
930
931 switch(str[-2]) {
932 case 'b':
933 case 'B':
934 siz=1;
935 break;
936 case 'w':
937 case 'W':
938 siz=2;
939 break;
940 case 'l':
941 case 'L':
942 siz=3;
943 break;
944 default:
945 opP->error="Specified size isn't :w or :l";
946 return FAIL;
947 }
948 opP->con1=add_exp(beg_str,str-4);
949 opP->con1->e_siz=siz;
950 } else */
951 opP->con1=add_exp(beg_str,str-2);
952 /* Should be offset,reg */
953 if(str[-1]==',') {
954 i=try_index(&str,opP);
955 if(i==FAIL) {
956 opP->error="Malformed index reg";
957 return FAIL;
958 }
959 }
960 }
961 /* We've now got offset) offset,reg) or reg) */
962
963 if (*str == '\0') {
964 /* Th-the-thats all folks */
965 if (opP->reg == FAIL) opP->mode = AINDX; /* Other form of indirect */
966 else if(opP->ireg == FAIL) opP->mode = AOFF;
967 else opP->mode = AINDX;
968 return(OK);
969 }
970 /* Next thing had better be another @ */
971 if(*str!='@' || str[1]!='(') {
972 opP->error = "junk after indirect";
973 return(FAIL);
974 }
975
976 if ((current_architecture & m68020up) == 0) {
977 return(FAIL);
978 } /* if target is not a '20 or better */
979
980 str+=2;
981
982 if(opP->ireg != FAIL) {
983 opP->mode = APRDX;
984
985 i = try_index(&str, opP);
986 if (i != FAIL) {
987 opP->error = "Two index registers! not allowed!";
988 return(FAIL);
989 }
990 } else {
991 i = try_index(&str, opP);
992 }
993
994 if (i == FAIL) {
995 char *beg_str;
996
997 beg_str = str;
998
999 for (i = 1; i; ) {
1000 switch(*str++) {
1001 case '\0':
1002 opP->error="Missing )";
1003 return(FAIL);
1004 case ',': i=0; break;
1005 case '(': i++; break;
1006 case ')': --i; break;
1007 }
1008 }
1009
1010 opP->con2=add_exp(beg_str,str-2);
1011
1012 if (str[-1] == ',') {
1013 if (opP->ireg != FAIL) {
1014 opP->error = "Can't have two index regs";
1015 return(FAIL);
1016 }
1017
1018 i = try_index(&str, opP);
1019
1020 if (i == FAIL) {
1021 opP->error = "malformed index reg";
1022 return(FAIL);
1023 }
1024
1025 opP->mode = APODX;
1026 } else if (opP->ireg != FAIL) {
1027 opP->mode = APRDX;
1028 } else {
1029 opP->mode = AMIND;
1030 }
1031 } else {
1032 opP->mode = APODX;
1033 }
1034
1035 if(*str!='\0') {
1036 opP->error="Junk after indirect";
1037 return FAIL;
1038 }
1039 return(OK);
1040 } /* m68k_ip_op() */
1041
1042 /*
1043 *
1044 * try_index := data_or_address_register + ')' + SKIP_W
1045 * | data_or_address_register + ':' + SKIP_W + size_spec + SKIP_W + multiplier + ')' + SKIP_W
1046 *
1047 * multiplier := <empty>
1048 * | ':' + multiplier_number
1049 * ;
1050 *
1051 * multiplier_number := '1' | '2' | '4' | '8' ;
1052 *
1053 * size_spec := 'l' | 'L' | 'w' | 'W' ;
1054 *
1055 * SKIP_W := <empty> | ' ' ;
1056 *
1057 */
1058
1059 static int try_index(s,opP)
1060 char **s;
1061 struct m68k_op *opP;
1062 {
1063 register int i;
1064 char *ss;
1065 #define SKIP_W() { ss++; if (*ss==' ') ss++;}
1066
1067 ss= *s;
1068 /* SKIP_W(); */
1069 i=m68k_reg_parse(&ss);
1070 if(!(i>=DATA+0 && i<=ADDR+7)) { /* if i is not DATA or ADDR reg */
1071 *s=ss;
1072 return FAIL;
1073 }
1074 opP->ireg=i;
1075 /* SKIP_W(); */
1076 if(*ss==')') {
1077 opP->isiz=0;
1078 opP->imul=1;
1079 SKIP_W();
1080 *s=ss;
1081 return OK;
1082 }
1083 if(*ss!=':') {
1084 opP->error="Missing : in index register";
1085 *s=ss;
1086 return FAIL;
1087 }
1088 SKIP_W();
1089 switch(*ss) {
1090 case 'w':
1091 case 'W':
1092 opP->isiz=2;
1093 break;
1094 case 'l':
1095 case 'L':
1096 opP->isiz=3;
1097 break;
1098 default:
1099 opP->error="Index register size spec not :w or :l";
1100 *s=ss;
1101 return FAIL;
1102 }
1103 SKIP_W();
1104 if(*ss==':') {
1105 SKIP_W();
1106 switch(*ss) {
1107 case '1':
1108 case '2':
1109 case '4':
1110 case '8':
1111 opP->imul= *ss-'0';
1112 break;
1113 default:
1114 opP->error="index multiplier not 1, 2, 4 or 8";
1115 *s=ss;
1116 return FAIL;
1117 }
1118 SKIP_W();
1119 } else opP->imul=1;
1120 if(*ss!=')') {
1121 opP->error="Missing )";
1122 *s=ss;
1123 return FAIL;
1124 }
1125 SKIP_W();
1126 *s=ss;
1127 return OK;
1128 } /* try_index() */
1129
1130 #ifdef TEST1 /* TEST1 tests m68k_ip_op(), which parses operands */
1131 main()
1132 {
1133 char buf[128];
1134 struct m68k_op thark;
1135
1136 for(;;) {
1137 if(!gets(buf))
1138 break;
1139 bzero(&thark,sizeof(thark));
1140 if(!m68k_ip_op(buf,&thark)) printf("FAIL:");
1141 if(thark.error)
1142 printf("op1 error %s in %s\n",thark.error,buf);
1143 printf("mode %d, reg %d, ",thark.mode,thark.reg);
1144 if(thark.b_const)
1145 printf("Constant: '%.*s',",1+thark.e_const-thark.b_const,thark.b_const);
1146 printf("ireg %d, isiz %d, imul %d ",thark.ireg,thark.isiz,thark.imul);
1147 if(thark.b_iadd)
1148 printf("Iadd: '%.*s'",1+thark.e_iadd-thark.b_iadd,thark.b_iadd);
1149 printf("\n");
1150 }
1151 exit(0);
1152 }
1153
1154 #endif
1155
1156
1157 static struct hash_control* op_hash = NULL; /* handle of the OPCODE hash table
1158 NULL means any use before m68k_ip_begin()
1159 will crash */
1160
1161 \f
1162 /*
1163 * m 6 8 k _ i p ( )
1164 *
1165 * This converts a string into a 68k instruction.
1166 * The string must be a bare single instruction in sun format
1167 * with RMS-style 68020 indirects
1168 * (example: )
1169 *
1170 * It provides some error messages: at most one fatal error message (which
1171 * stops the scan) and at most one warning message for each operand.
1172 * The 68k instruction is returned in exploded form, since we have no
1173 * knowledge of how you parse (or evaluate) your expressions.
1174 * We do however strip off and decode addressing modes and operation
1175 * mnemonic.
1176 *
1177 * This function's value is a string. If it is not "" then an internal
1178 * logic error was found: read this code to assign meaning to the string.
1179 * No argument string should generate such an error string:
1180 * it means a bug in our code, not in the user's text.
1181 *
1182 * You MUST have called m68k_ip_begin() once and m86_ip_end() never before using
1183 * this function.
1184 */
1185
1186 /* JF this function no longer returns a useful value. Sorry */
1187 void m68k_ip (instring)
1188 char *instring;
1189 {
1190 register char *p;
1191 register struct m68k_op *opP;
1192 register struct m68k_incant *opcode;
1193 register char *s;
1194 register int tmpreg = 0,
1195 baseo = 0,
1196 outro = 0,
1197 nextword;
1198 int siz1,
1199 siz2;
1200 char c;
1201 int losing;
1202 int opsfound;
1203 char *crack_operand();
1204 LITTLENUM_TYPE words[6];
1205 LITTLENUM_TYPE *wordp;
1206
1207 if (*instring == ' ')
1208 instring++; /* skip leading whitespace */
1209
1210 /* Scan up to end of operation-code, which MUST end in end-of-string
1211 or exactly 1 space. */
1212 for (p = instring; *p != '\0'; p++)
1213 if (*p == ' ')
1214 break;
1215
1216
1217 if (p == instring) {
1218 the_ins.error = "No operator";
1219 the_ins.opcode[0] = NULL;
1220 /* the_ins.numo=1; */
1221 return;
1222 }
1223
1224 /* p now points to the end of the opcode name, probably whitespace.
1225 make sure the name is null terminated by clobbering the whitespace,
1226 look it up in the hash table, then fix it back. */
1227 c = *p;
1228 *p = '\0';
1229 opcode = (struct m68k_incant *)hash_find (op_hash, instring);
1230 *p = c;
1231
1232 if (opcode == NULL) {
1233 the_ins.error = "Unknown operator";
1234 the_ins.opcode[0] = NULL;
1235 /* the_ins.numo=1; */
1236 return;
1237 }
1238
1239 /* found a legitimate opcode, start matching operands */
1240 while (*p == ' ') ++p;
1241
1242 for(opP = &the_ins.operands[0]; *p; opP++) {
1243
1244 p = crack_operand(p, opP);
1245
1246 if (opP->error) {
1247 the_ins.error=opP->error;
1248 return;
1249 }
1250 }
1251
1252 opsfound = opP - &the_ins.operands[0];
1253
1254 /* This ugly hack is to support the floating pt opcodes in their standard form */
1255 /* Essentially, we fake a first enty of type COP#1 */
1256 if (opcode->m_operands[0]=='I') {
1257 int n;
1258
1259 for(n=opsfound;n>0;--n)
1260 the_ins.operands[n]=the_ins.operands[n-1];
1261
1262 /* bcopy((char *)(&the_ins.operands[0]),(char *)(&the_ins.operands[1]),opsfound*sizeof(the_ins.operands[0])); */
1263 bzero((char *)(&the_ins.operands[0]),sizeof(the_ins.operands[0]));
1264 the_ins.operands[0].mode=MSCR;
1265 the_ins.operands[0].reg=COPNUM; /* COP #1 */
1266 opsfound++;
1267 }
1268
1269 /* We've got the operands. Find an opcode that'll accept them */
1270 for (losing = 0; ; ) {
1271 /* if we didn't get the right number of ops,
1272 or we have no common model with this pattern
1273 then reject this pattern. */
1274
1275 if (opsfound != opcode->m_opnum
1276 || ((opcode->m_arch & current_architecture) == 0)) {
1277
1278 ++losing;
1279
1280 } else {
1281 for (s=opcode->m_operands, opP = &the_ins.operands[0]; *s && !losing; s += 2, opP++) {
1282 /* Warning: this switch is huge! */
1283 /* I've tried to organize the cases into this order:
1284 non-alpha first, then alpha by letter. lower-case goes directly
1285 before uppercase counterpart. */
1286 /* Code with multiple case ...: gets sorted by the lowest case ...
1287 it belongs to. I hope this makes sense. */
1288 switch(*s) {
1289 case '!':
1290 if (opP->mode == MSCR || opP->mode == IMMED
1291 || opP->mode == DREG || opP->mode == AREG
1292 || opP->mode == AINC || opP->mode == ADEC
1293 || opP->mode == REGLST)
1294 losing++;
1295 break;
1296
1297 case '#':
1298 if(opP->mode!=IMMED)
1299 losing++;
1300 else {
1301 long t;
1302
1303 t=get_num(opP->con1,80);
1304 if(s[1]=='b' && !isbyte(t))
1305 losing++;
1306 else if(s[1]=='w' && !isword(t))
1307 losing++;
1308 }
1309 break;
1310
1311 case '^':
1312 case 'T':
1313 if(opP->mode!=IMMED)
1314 losing++;
1315 break;
1316
1317 case '$':
1318 if(opP->mode==MSCR || opP->mode==AREG ||
1319 opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1320 losing++;
1321 break;
1322
1323 case '%':
1324 if(opP->mode==MSCR || opP->reg==PC ||
1325 opP->reg==ZPC || opP->mode==REGLST)
1326 losing++;
1327 break;
1328
1329
1330 case '&':
1331 if(opP->mode==MSCR || opP->mode==DREG ||
1332 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC ||
1333 opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
1334 losing++;
1335 break;
1336
1337 case '*':
1338 if(opP->mode==MSCR || opP->mode==REGLST)
1339 losing++;
1340 break;
1341
1342 case '+':
1343 if(opP->mode!=AINC)
1344 losing++;
1345 break;
1346
1347 case '-':
1348 if(opP->mode!=ADEC)
1349 losing++;
1350 break;
1351
1352 case '/':
1353 if(opP->mode==MSCR || opP->mode==AREG ||
1354 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->mode==REGLST)
1355 losing++;
1356 break;
1357
1358 case ';':
1359 if(opP->mode==MSCR || opP->mode==AREG || opP->mode==REGLST)
1360 losing++;
1361 break;
1362
1363 case '?':
1364 if(opP->mode==MSCR || opP->mode==AREG ||
1365 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->reg==PC ||
1366 opP->reg==ZPC || opP->mode==REGLST)
1367 losing++;
1368 break;
1369
1370 case '@':
1371 if(opP->mode==MSCR || opP->mode==AREG ||
1372 opP->mode==IMMED || opP->mode==REGLST)
1373 losing++;
1374 break;
1375
1376 case '~': /* For now! (JF FOO is this right?) */
1377 if(opP->mode==MSCR || opP->mode==DREG ||
1378 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1379 losing++;
1380 break;
1381
1382 case 'A':
1383 if(opP->mode!=AREG)
1384 losing++;
1385 break;
1386 case 'a':
1387 if (opP->mode != AINDR) {
1388 ++losing;
1389 } /* if not address register indirect */
1390 break;
1391 case 'B': /* FOO */
1392 if(opP->mode!=ABSL || (flagseen['S'] && instring[0] == 'j'
1393 && instring[1] == 'b'
1394 && instring[2] == 's'
1395 && instring[3] == 'r'))
1396 losing++;
1397 break;
1398
1399 case 'C':
1400 if(opP->mode!=MSCR || opP->reg!=CCR)
1401 losing++;
1402 break;
1403
1404 case 'd': /* FOO This mode is a KLUDGE!! */
1405 if(opP->mode!=AOFF && (opP->mode!=ABSL ||
1406 opP->con1->e_beg[0]!='(' || opP->con1->e_end[0]!=')'))
1407 losing++;
1408 break;
1409
1410 case 'D':
1411 if(opP->mode!=DREG)
1412 losing++;
1413 break;
1414
1415 case 'F':
1416 if(opP->mode!=MSCR || opP->reg<(FPREG+0) || opP->reg>(FPREG+7))
1417 losing++;
1418 break;
1419
1420 case 'I':
1421 if(opP->mode!=MSCR || opP->reg<COPNUM ||
1422 opP->reg>=COPNUM+7)
1423 losing++;
1424 break;
1425
1426 case 'J':
1427 if (opP->mode != MSCR
1428 || opP->reg < USP
1429 || opP->reg > URP
1430 || cpu_of_arch(current_architecture) < m68010 /* before 68010 had none */
1431 || (cpu_of_arch(current_architecture) < m68020
1432 && opP->reg != SFC
1433 && opP->reg != DFC
1434 && opP->reg != USP
1435 && opP->reg != VBR) /* 68010's had only these */
1436 || (cpu_of_arch(current_architecture) < m68040
1437 && opP->reg != SFC
1438 && opP->reg != DFC
1439 && opP->reg != USP
1440 && opP->reg != VBR
1441 && opP->reg != CACR
1442 && opP->reg != CAAR
1443 && opP->reg != MSP
1444 && opP->reg != ISP) /* 680[23]0's have only these */
1445 || (cpu_of_arch(current_architecture) == m68040 /* 68040 has all but this */
1446 && opP->reg == CAAR)) {
1447 losing++;
1448 } /* doesn't cut it */
1449 break;
1450
1451 case 'k':
1452 if(opP->mode!=IMMED)
1453 losing++;
1454 break;
1455
1456 case 'l':
1457 case 'L':
1458 if(opP->mode==DREG || opP->mode==AREG || opP->mode==FPREG) {
1459 if(s[1]=='8')
1460 losing++;
1461 else {
1462 opP->mode=REGLST;
1463 opP->reg=1<<(opP->reg-DATA);
1464 }
1465 } else if(opP->mode!=REGLST) {
1466 losing++;
1467 } else if(s[1]=='8' && opP->reg&0x0FFffFF)
1468 losing++;
1469 else if(s[1]=='3' && opP->reg&0x7000000)
1470 losing++;
1471 break;
1472
1473 case 'M':
1474 if(opP->mode!=IMMED)
1475 losing++;
1476 else {
1477 long t;
1478
1479 t=get_num(opP->con1,80);
1480 if(!issbyte(t) || isvar(opP->con1))
1481 losing++;
1482 }
1483 break;
1484
1485 case 'O':
1486 if(opP->mode!=DREG && opP->mode!=IMMED)
1487 losing++;
1488 break;
1489
1490 case 'Q':
1491 if(opP->mode!=IMMED)
1492 losing++;
1493 else {
1494 long t;
1495
1496 t=get_num(opP->con1,80);
1497 if(t<1 || t>8 || isvar(opP->con1))
1498 losing++;
1499 }
1500 break;
1501
1502 case 'R':
1503 if(opP->mode!=DREG && opP->mode!=AREG)
1504 losing++;
1505 break;
1506
1507 case 's':
1508 if(opP->mode!=MSCR || !(opP->reg==FPI || opP->reg==FPS || opP->reg==FPC))
1509 losing++;
1510 break;
1511
1512 case 'S':
1513 if(opP->mode!=MSCR || opP->reg!=SR)
1514 losing++;
1515 break;
1516
1517 case 'U':
1518 if(opP->mode!=MSCR || opP->reg!=USP)
1519 losing++;
1520 break;
1521
1522 /* JF these are out of order. We could put them
1523 in order if we were willing to put up with
1524 bunches of #ifdef m68851s in the code */
1525 #ifndef NO_68851
1526 /* Memory addressing mode used by pflushr */
1527 case '|':
1528 if(opP->mode==MSCR || opP->mode==DREG ||
1529 opP->mode==AREG || opP->mode==REGLST)
1530 losing++;
1531 break;
1532
1533 case 'f':
1534 if (opP->mode != MSCR || (opP->reg != SFC && opP->reg != DFC))
1535 losing++;
1536 break;
1537
1538 case 'P':
1539 if (opP->mode != MSCR || (opP->reg != TC && opP->reg != CAL &&
1540 opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
1541 losing++;
1542 break;
1543
1544 case 'V':
1545 if (opP->reg != VAL)
1546 losing++;
1547 break;
1548
1549 case 'W':
1550 if (opP->mode != MSCR || (opP->reg != DRP && opP->reg != SRP &&
1551 opP->reg != CRP))
1552 losing++;
1553 break;
1554
1555 case 'X':
1556 if (opP->mode != MSCR ||
1557 (!(opP->reg >= BAD && opP->reg <= BAD+7) &&
1558 !(opP->reg >= BAC && opP->reg <= BAC+7)))
1559 losing++;
1560 break;
1561
1562 case 'Y':
1563 if (opP->reg != PSR)
1564 losing++;
1565 break;
1566
1567 case 'Z':
1568 if (opP->reg != PCSR)
1569 losing++;
1570 break;
1571 #endif
1572 case 'c':
1573 if (opP->reg != NC
1574 && opP->reg != IC
1575 && opP->reg != DC
1576 && opP->reg != BC) {
1577 losing++;
1578 } /* not a cache specifier. */
1579 break;
1580
1581 case '_':
1582 if (opP->mode != ABSL) {
1583 ++losing;
1584 } /* not absolute */
1585 break;
1586
1587 default:
1588 as_fatal("Internal error: Operand mode %c unknown in line %s of file \"%s\"",
1589 *s, __LINE__, __FILE__);
1590 } /* switch on type of operand */
1591
1592 if (losing) break;
1593 } /* for each operand */
1594 } /* if immediately wrong */
1595
1596 if (!losing) {
1597 break;
1598 } /* got it. */
1599
1600 opcode = opcode->m_next;
1601
1602 if (!opcode) {
1603 the_ins.error = "instruction/operands mismatch";
1604 return;
1605 } /* Fell off the end */
1606
1607 losing = 0;
1608 }
1609
1610 /* now assemble it */
1611
1612 the_ins.args=opcode->m_operands;
1613 the_ins.numargs=opcode->m_opnum;
1614 the_ins.numo=opcode->m_codenum;
1615 the_ins.opcode[0]=getone(opcode);
1616 the_ins.opcode[1]=gettwo(opcode);
1617
1618 for (s = the_ins.args, opP = &the_ins.operands[0]; *s; s += 2, opP++) {
1619 /* This switch is a doozy.
1620 Watch the first step; its a big one! */
1621 switch(s[0]) {
1622
1623 case '*':
1624 case '~':
1625 case '%':
1626 case ';':
1627 case '@':
1628 case '!':
1629 case '&':
1630 case '$':
1631 case '?':
1632 case '/':
1633 #ifndef NO_68851
1634 case '|':
1635 #endif
1636 switch(opP->mode) {
1637 case IMMED:
1638 tmpreg=0x3c; /* 7.4 */
1639 if (strchr("bwl",s[1])) nextword=get_num(opP->con1,80);
1640 else nextword=nextword=get_num(opP->con1,0);
1641 if(isvar(opP->con1))
1642 add_fix(s[1],opP->con1,0);
1643 switch(s[1]) {
1644 case 'b':
1645 if(!isbyte(nextword))
1646 opP->error="operand out of range";
1647 addword(nextword);
1648 baseo=0;
1649 break;
1650 case 'w':
1651 if(!isword(nextword))
1652 opP->error="operand out of range";
1653 addword(nextword);
1654 baseo=0;
1655 break;
1656 case 'l':
1657 addword(nextword>>16);
1658 addword(nextword);
1659 baseo=0;
1660 break;
1661
1662 case 'f':
1663 baseo=2;
1664 outro=8;
1665 break;
1666 case 'F':
1667 baseo=4;
1668 outro=11;
1669 break;
1670 case 'x':
1671 baseo=6;
1672 outro=15;
1673 break;
1674 case 'p':
1675 baseo=6;
1676 outro= -1;
1677 break;
1678 default:
1679 as_fatal("Internal error: Can't decode %c%c in line %s of file \"%s\"",
1680 *s, s[1], __LINE__, __FILE__);
1681 }
1682 if(!baseo)
1683 break;
1684
1685 /* We gotta put out some float */
1686 if(seg(opP->con1)!=SEG_BIG) {
1687 int_to_gen(nextword);
1688 gen_to_words(words,baseo,(long int)outro);
1689 for(wordp=words;baseo--;wordp++)
1690 addword(*wordp);
1691 break;
1692 } /* Its BIG */
1693 if(offs(opP->con1)>0) {
1694 as_warn("Bignum assumed to be binary bit-pattern");
1695 if(offs(opP->con1)>baseo) {
1696 as_warn("Bignum too big for %c format; truncated",s[1]);
1697 offs(opP->con1)=baseo;
1698 }
1699 baseo-=offs(opP->con1);
1700 for(wordp=generic_bignum+offs(opP->con1)-1;offs(opP->con1)--;--wordp)
1701 addword(*wordp);
1702 while(baseo--)
1703 addword(0);
1704 break;
1705 }
1706 gen_to_words(words,baseo,(long)outro);
1707 for (wordp=words;baseo--;wordp++)
1708 addword(*wordp);
1709 break;
1710 case DREG:
1711 tmpreg=opP->reg-DATA; /* 0.dreg */
1712 break;
1713 case AREG:
1714 tmpreg=0x08+opP->reg-ADDR; /* 1.areg */
1715 break;
1716 case AINDR:
1717 tmpreg=0x10+opP->reg-ADDR; /* 2.areg */
1718 break;
1719 case ADEC:
1720 tmpreg=0x20+opP->reg-ADDR; /* 4.areg */
1721 break;
1722 case AINC:
1723 tmpreg=0x18+opP->reg-ADDR; /* 3.areg */
1724 break;
1725 case AOFF:
1726
1727 nextword=get_num(opP->con1,80);
1728 /* Force into index mode. Hope this works */
1729
1730 /* We do the first bit for 32-bit displacements,
1731 and the second bit for 16 bit ones. It is
1732 possible that we should make the default be
1733 WORD instead of LONG, but I think that'd
1734 break GCC, so we put up with a little
1735 inefficiency for the sake of working output.
1736 */
1737
1738 if( !issword(nextword)
1739 || ( isvar(opP->con1)
1740 && ( ( opP->con1->e_siz==0
1741 && flagseen['l']==0)
1742 || opP->con1->e_siz==3))) {
1743
1744 if(opP->reg==PC)
1745 tmpreg=0x3B; /* 7.3 */
1746 else
1747 tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1748 if(isvar(opP->con1)) {
1749 if(opP->reg==PC) {
1750 add_frag(adds(opP->con1),
1751 offs(opP->con1),
1752 TAB(PCLEA,SZ_UNDEF));
1753 break;
1754 } else {
1755 addword(0x0170);
1756 add_fix('l',opP->con1,1);
1757 }
1758 } else
1759 addword(0x0170);
1760 addword(nextword>>16);
1761 } else {
1762 if(opP->reg==PC)
1763 tmpreg=0x3A; /* 7.2 */
1764 else
1765 tmpreg=0x28+opP->reg-ADDR; /* 5.areg */
1766
1767 if(isvar(opP->con1)) {
1768 if(opP->reg==PC) {
1769 add_fix('w',opP->con1,1);
1770 } else
1771 add_fix('w',opP->con1,0);
1772 }
1773 }
1774 addword(nextword);
1775 break;
1776
1777 case APODX:
1778 case AMIND:
1779 case APRDX:
1780 know(current_architecture & m68020up);
1781 /* intentional fall-through */
1782 case AINDX:
1783 nextword=0;
1784 baseo=get_num(opP->con1,80);
1785 outro=get_num(opP->con2,80);
1786 /* Figure out the 'addressing mode' */
1787 /* Also turn on the BASE_DISABLE bit, if needed */
1788 if(opP->reg==PC || opP->reg==ZPC) {
1789 tmpreg=0x3b; /* 7.3 */
1790 if(opP->reg==ZPC)
1791 nextword|=0x80;
1792 } else if(opP->reg==FAIL) {
1793 nextword|=0x80;
1794 tmpreg=0x30; /* 6.garbage */
1795 } else tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1796
1797 siz1= (opP->con1) ? opP->con1->e_siz : 0;
1798 siz2= (opP->con2) ? opP->con2->e_siz : 0;
1799
1800 /* Index register stuff */
1801 if(opP->ireg>=DATA+0 && opP->ireg<=ADDR+7) {
1802 nextword|=(opP->ireg-DATA)<<12;
1803
1804 if(opP->isiz==0 || opP->isiz==3)
1805 nextword|=0x800;
1806 switch(opP->imul) {
1807 case 1: break;
1808 case 2: nextword|=0x200; break;
1809 case 4: nextword|=0x400; break;
1810 case 8: nextword|=0x600; break;
1811 default: as_fatal("failed sanity check.");
1812 }
1813 /* IF its simple,
1814 GET US OUT OF HERE! */
1815
1816 /* Must be INDEX, with an index
1817 register. Address register
1818 cannot be ZERO-PC, and either
1819 :b was forced, or we know
1820 it will fit */
1821 if( opP->mode==AINDX
1822 && opP->reg!=FAIL
1823 && opP->reg!=ZPC
1824 && ( siz1==1
1825 || ( issbyte(baseo)
1826 && !isvar(opP->con1)))) {
1827 nextword +=baseo&0xff;
1828 addword(nextword);
1829 if(isvar(opP->con1))
1830 add_fix('B',opP->con1,0);
1831 break;
1832 }
1833 } else
1834 nextword|=0x40; /* No index reg */
1835
1836 /* It aint simple */
1837 nextword|=0x100;
1838 /* If the guy specified a width, we assume that
1839 it is wide enough. Maybe it isn't. If so, we lose
1840 */
1841 switch(siz1) {
1842 case 0:
1843 if(isvar(opP->con1) || !issword(baseo)) {
1844 siz1=3;
1845 nextword|=0x30;
1846 } else if(baseo==0)
1847 nextword|=0x10;
1848 else {
1849 nextword|=0x20;
1850 siz1=2;
1851 }
1852 break;
1853 case 1:
1854 as_warn("Byte dispacement won't work. Defaulting to :w");
1855 case 2:
1856 nextword|=0x20;
1857 break;
1858 case 3:
1859 nextword|=0x30;
1860 break;
1861 }
1862
1863 /* Figure out innner displacement stuff */
1864 if(opP->mode!=AINDX) {
1865 switch(siz2) {
1866 case 0:
1867 if(isvar(opP->con2) || !issword(outro)) {
1868 siz2=3;
1869 nextword|=0x3;
1870 } else if(outro==0)
1871 nextword|=0x1;
1872 else {
1873 nextword|=0x2;
1874 siz2=2;
1875 }
1876 break;
1877 case 1:
1878 as_warn("Byte dispacement won't work. Defaulting to :w");
1879 case 2:
1880 nextword|=0x2;
1881 break;
1882 case 3:
1883 nextword|=0x3;
1884 break;
1885 }
1886 if(opP->mode==APODX) nextword|=0x04;
1887 else if(opP->mode==AMIND) nextword|=0x40;
1888 }
1889 addword(nextword);
1890
1891 if(isvar(opP->con1)) {
1892 if(opP->reg==PC || opP->reg==ZPC) {
1893 add_fix(siz1==3 ? 'l' : 'w',opP->con1,1);
1894 opP->con1->e_exp.X_add_number+=6;
1895 } else
1896 add_fix(siz1==3 ? 'l' : 'w',opP->con1,0);
1897 }
1898 if(siz1==3)
1899 addword(baseo>>16);
1900 if(siz1)
1901 addword(baseo);
1902
1903 if(isvar(opP->con2)) {
1904 if(opP->reg==PC || opP->reg==ZPC) {
1905 add_fix(siz2==3 ? 'l' : 'w',opP->con2,1);
1906 opP->con1->e_exp.X_add_number+=6;
1907 } else
1908 add_fix(siz2==3 ? 'l' : 'w',opP->con2,0);
1909 }
1910 if(siz2==3)
1911 addword(outro>>16);
1912 if(siz2)
1913 addword(outro);
1914
1915 break;
1916
1917 case ABSL:
1918 nextword=get_num(opP->con1,80);
1919 switch(opP->con1->e_siz) {
1920 default:
1921 as_warn("Unknown size for absolute reference");
1922 case 0:
1923 if(!isvar(opP->con1) && issword(offs(opP->con1))) {
1924 tmpreg=0x38; /* 7.0 */
1925 addword(nextword);
1926 break;
1927 }
1928 /* Don't generate pc relative code
1929 on 68010 and 68000 */
1930 if(isvar(opP->con1)
1931 && !subs(opP->con1)
1932 && seg(opP->con1) == SEG_TEXT
1933 && now_seg == SEG_TEXT
1934 && cpu_of_arch(current_architecture) < m68020
1935 && !flagseen['S']
1936 && !strchr("~%&$?", s[0])) {
1937 tmpreg=0x3A; /* 7.2 */
1938 add_frag(adds(opP->con1),
1939 offs(opP->con1),
1940 TAB(PCREL,SZ_UNDEF));
1941 break;
1942 }
1943 case 3: /* Fall through into long */
1944 if(isvar(opP->con1))
1945 add_fix('l',opP->con1,0);
1946
1947 tmpreg=0x39; /* 7.1 mode */
1948 addword(nextword>>16);
1949 addword(nextword);
1950 break;
1951
1952 case 2: /* Word */
1953 if(isvar(opP->con1))
1954 add_fix('w',opP->con1,0);
1955
1956 tmpreg=0x38; /* 7.0 mode */
1957 addword(nextword);
1958 break;
1959 }
1960 break;
1961 case MSCR:
1962 default:
1963 as_bad("unknown/incorrect operand");
1964 /* abort(); */
1965 }
1966 install_gen_operand(s[1],tmpreg);
1967 break;
1968
1969 case '#':
1970 case '^':
1971 switch(s[1]) { /* JF: I hate floating point! */
1972 case 'j':
1973 tmpreg=70;
1974 break;
1975 case '8':
1976 tmpreg=20;
1977 break;
1978 case 'C':
1979 tmpreg=50;
1980 break;
1981 case '3':
1982 default:
1983 tmpreg=80;
1984 break;
1985 }
1986 tmpreg=get_num(opP->con1,tmpreg);
1987 if(isvar(opP->con1))
1988 add_fix(s[1],opP->con1,0);
1989 switch(s[1]) {
1990 case 'b': /* Danger: These do no check for
1991 certain types of overflow.
1992 user beware! */
1993 if(!isbyte(tmpreg))
1994 opP->error="out of range";
1995 insop(tmpreg);
1996 if(isvar(opP->con1))
1997 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1998 break;
1999 case 'w':
2000 if(!isword(tmpreg))
2001 opP->error="out of range";
2002 insop(tmpreg);
2003 if(isvar(opP->con1))
2004 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
2005 break;
2006 case 'l':
2007 insop(tmpreg); /* Because of the way insop works, we put these two out backwards */
2008 insop(tmpreg>>16);
2009 if(isvar(opP->con1))
2010 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
2011 break;
2012 case '3':
2013 tmpreg&=0xFF;
2014 case '8':
2015 case 'C':
2016 install_operand(s[1],tmpreg);
2017 break;
2018 default:
2019 as_fatal("Internal error: Unknown mode #%c in line %s of file \"%s\"", s[1], __LINE__, __FILE__);
2020 }
2021 break;
2022
2023 case '+':
2024 case '-':
2025 case 'A':
2026 case 'a':
2027 install_operand(s[1],opP->reg-ADDR);
2028 break;
2029
2030 case 'B':
2031 tmpreg=get_num(opP->con1,80);
2032 switch(s[1]) {
2033 case 'B':
2034 /* Needs no offsetting */
2035 add_fix('B',opP->con1,1);
2036 break;
2037 case 'W':
2038 /* Offset the displacement to be relative to byte disp location */
2039 opP->con1->e_exp.X_add_number+=2;
2040 add_fix('w',opP->con1,1);
2041 addword(0);
2042 break;
2043 case 'L':
2044 long_branch:
2045 if (cpu_of_arch(current_architecture) < m68020) /* 68000 or 010 */
2046 as_warn("Can't use long branches on 68000/68010");
2047 the_ins.opcode[the_ins.numo-1]|=0xff;
2048 /* Offset the displacement to be relative to byte disp location */
2049 opP->con1->e_exp.X_add_number+=4;
2050 add_fix('l',opP->con1,1);
2051 addword(0);
2052 addword(0);
2053 break;
2054 case 'g':
2055 if(subs(opP->con1)) /* We can't relax it */
2056 goto long_branch;
2057
2058 /* This could either be a symbol, or an
2059 absolute address. No matter, the
2060 frag hacking will finger it out.
2061 Not quite: it can't switch from
2062 BRANCH to BCC68000 for the case
2063 where opnd is absolute (it needs
2064 to use the 68000 hack since no
2065 conditional abs jumps). */
2066 if (((cpu_of_arch(current_architecture) < m68020) || (0==adds(opP->con1)))
2067 && (the_ins.opcode[0] >= 0x6200)
2068 && (the_ins.opcode[0] <= 0x6f00)) {
2069 add_frag(adds(opP->con1),offs(opP->con1),TAB(BCC68000,SZ_UNDEF));
2070 } else {
2071 add_frag(adds(opP->con1),offs(opP->con1),TAB(BRANCH,SZ_UNDEF));
2072 }
2073 break;
2074 case 'w':
2075 if(isvar(opP->con1)) {
2076 /* check for DBcc instruction */
2077 if ((the_ins.opcode[0] & 0xf0f8) ==0x50c8) {
2078 /* size varies if patch */
2079 /* needed for long form */
2080 add_frag(adds(opP->con1),offs(opP->con1),TAB(DBCC,SZ_UNDEF));
2081 break;
2082 }
2083
2084 /* Don't ask! */
2085 opP->con1->e_exp.X_add_number+=2;
2086 add_fix('w',opP->con1,1);
2087 }
2088 addword(0);
2089 break;
2090 case 'C': /* Fixed size LONG coproc branches */
2091 the_ins.opcode[the_ins.numo-1]|=0x40;
2092 /* Offset the displacement to be relative to byte disp location */
2093 /* Coproc branches don't have a byte disp option, but they are
2094 compatible with the ordinary branches, which do... */
2095 opP->con1->e_exp.X_add_number+=4;
2096 add_fix('l',opP->con1,1);
2097 addword(0);
2098 addword(0);
2099 break;
2100 case 'c': /* Var size Coprocesssor branches */
2101 if(subs(opP->con1)) {
2102 add_fix('l',opP->con1,1);
2103 add_frag((symbolS *)0,(long)0,TAB(FBRANCH,LONG));
2104 } else if(adds(opP->con1)) {
2105 add_frag(adds(opP->con1),offs(opP->con1),TAB(FBRANCH,SZ_UNDEF));
2106 } else {
2107 /* add_frag((symbolS *)0,offs(opP->con1),TAB(FBRANCH,SHORT)); */
2108 the_ins.opcode[the_ins.numo-1]|=0x40;
2109 add_fix('l',opP->con1,1);
2110 addword(0);
2111 addword(4);
2112 }
2113 break;
2114 default:
2115 as_fatal("Internal error: operand type B%c unknown in line %s of file \"%s\"",
2116 s[1], __LINE__, __FILE__);
2117 }
2118 break;
2119
2120 case 'C': /* Ignore it */
2121 break;
2122
2123 case 'd': /* JF this is a kludge */
2124 if(opP->mode==AOFF) {
2125 install_operand('s',opP->reg-ADDR);
2126 } else {
2127 char *tmpP;
2128
2129 tmpP=opP->con1->e_end-2;
2130 opP->con1->e_beg++;
2131 opP->con1->e_end-=4; /* point to the , */
2132 baseo=m68k_reg_parse(&tmpP);
2133 if(baseo<ADDR+0 || baseo>ADDR+7) {
2134 as_bad("Unknown address reg, using A0");
2135 baseo=0;
2136 } else baseo-=ADDR;
2137 install_operand('s',baseo);
2138 }
2139 tmpreg=get_num(opP->con1,80);
2140 if(!issword(tmpreg)) {
2141 as_warn("Expression out of range, using 0");
2142 tmpreg=0;
2143 }
2144 addword(tmpreg);
2145 break;
2146
2147 case 'D':
2148 install_operand(s[1],opP->reg-DATA);
2149 break;
2150
2151 case 'F':
2152 install_operand(s[1],opP->reg-FPREG);
2153 break;
2154
2155 case 'I':
2156 tmpreg=1+opP->reg-COPNUM;
2157 if(tmpreg==8)
2158 tmpreg=0;
2159 install_operand(s[1],tmpreg);
2160 break;
2161
2162 case 'J': /* JF foo */
2163 switch(opP->reg) {
2164 case SFC: tmpreg=0x000; break;
2165 case DFC: tmpreg=0x001; break;
2166 case CACR: tmpreg=0x002; break;
2167 case TC: tmpreg=0x003; break;
2168 case ITT0: tmpreg=0x004; break;
2169 case ITT1: tmpreg=0x005; break;
2170 case DTT0: tmpreg=0x006; break;
2171 case DTT1: tmpreg=0x007; break;
2172
2173 case USP: tmpreg=0x800; break;
2174 case VBR: tmpreg=0x801; break;
2175 case CAAR: tmpreg=0x802; break;
2176 case MSP: tmpreg=0x803; break;
2177 case ISP: tmpreg=0x804; break;
2178 case MMUSR: tmpreg=0x805; break;
2179 case URP: tmpreg=0x806; break;
2180 case SRP: tmpreg=0x807; break;
2181 default:
2182 as_fatal("failed sanity check.");
2183 }
2184 install_operand(s[1],tmpreg);
2185 break;
2186
2187 case 'k':
2188 tmpreg=get_num(opP->con1,55);
2189 install_operand(s[1],tmpreg&0x7f);
2190 break;
2191
2192 case 'l':
2193 tmpreg=opP->reg;
2194 if(s[1]=='w') {
2195 if(tmpreg&0x7FF0000)
2196 as_bad("Floating point register in register list");
2197 insop(reverse_16_bits(tmpreg));
2198 } else {
2199 if(tmpreg&0x700FFFF)
2200 as_bad("Wrong register in floating-point reglist");
2201 install_operand(s[1],reverse_8_bits(tmpreg>>16));
2202 }
2203 break;
2204
2205 case 'L':
2206 tmpreg=opP->reg;
2207 if(s[1]=='w') {
2208 if(tmpreg&0x7FF0000)
2209 as_bad("Floating point register in register list");
2210 insop(tmpreg);
2211 } else if(s[1]=='8') {
2212 if(tmpreg&0x0FFFFFF)
2213 as_bad("incorrect register in reglist");
2214 install_operand(s[1],tmpreg>>24);
2215 } else {
2216 if(tmpreg&0x700FFFF)
2217 as_bad("wrong register in floating-point reglist");
2218 else
2219 install_operand(s[1],tmpreg>>16);
2220 }
2221 break;
2222
2223 case 'M':
2224 install_operand(s[1],get_num(opP->con1,60));
2225 break;
2226
2227 case 'O':
2228 tmpreg= (opP->mode==DREG)
2229 ? 0x20+opP->reg-DATA
2230 : (get_num(opP->con1,40)&0x1F);
2231 install_operand(s[1],tmpreg);
2232 break;
2233
2234 case 'Q':
2235 tmpreg=get_num(opP->con1,10);
2236 if(tmpreg==8)
2237 tmpreg=0;
2238 install_operand(s[1],tmpreg);
2239 break;
2240
2241 case 'R':
2242 /* This depends on the fact that ADDR registers are
2243 eight more than their corresponding DATA regs, so
2244 the result will have the ADDR_REG bit set */
2245 install_operand(s[1],opP->reg-DATA);
2246 break;
2247
2248 case 's':
2249 if(opP->reg==FPI) tmpreg=0x1;
2250 else if(opP->reg==FPS) tmpreg=0x2;
2251 else if(opP->reg==FPC) tmpreg=0x4;
2252 else as_fatal("failed sanity check.");
2253 install_operand(s[1],tmpreg);
2254 break;
2255
2256 case 'S': /* Ignore it */
2257 break;
2258
2259 case 'T':
2260 install_operand(s[1],get_num(opP->con1,30));
2261 break;
2262
2263 case 'U': /* Ignore it */
2264 break;
2265
2266 case 'c':
2267 switch (opP->reg) {
2268 case NC: tmpreg = 0; break;
2269 case DC: tmpreg = 1; break;
2270 case IC: tmpreg = 2; break;
2271 case BC: tmpreg = 3; break;
2272 default:
2273 as_fatal("failed sanity check");
2274 } /* switch on cache token */
2275 install_operand(s[1], tmpreg);
2276 break;
2277 #ifndef NO_68851
2278 /* JF: These are out of order, I fear. */
2279 case 'f':
2280 switch (opP->reg) {
2281 case SFC:
2282 tmpreg=0;
2283 break;
2284 case DFC:
2285 tmpreg=1;
2286 break;
2287 default:
2288 as_fatal("failed sanity check.");
2289 }
2290 install_operand(s[1],tmpreg);
2291 break;
2292
2293 case 'P':
2294 switch(opP->reg) {
2295 case TC:
2296 tmpreg=0;
2297 break;
2298 case CAL:
2299 tmpreg=4;
2300 break;
2301 case VAL:
2302 tmpreg=5;
2303 break;
2304 case SCC:
2305 tmpreg=6;
2306 break;
2307 case AC:
2308 tmpreg=7;
2309 break;
2310 default:
2311 as_fatal("failed sanity check.");
2312 }
2313 install_operand(s[1],tmpreg);
2314 break;
2315
2316 case 'V':
2317 if (opP->reg == VAL)
2318 break;
2319 as_fatal("failed sanity check.");
2320
2321 case 'W':
2322 switch(opP->reg) {
2323
2324 case DRP:
2325 tmpreg=1;
2326 break;
2327 case SRP:
2328 tmpreg=2;
2329 break;
2330 case CRP:
2331 tmpreg=3;
2332 break;
2333 default:
2334 as_fatal("failed sanity check.");
2335 }
2336 install_operand(s[1],tmpreg);
2337 break;
2338
2339 case 'X':
2340 switch (opP->reg) {
2341 case BAD: case BAD+1: case BAD+2: case BAD+3:
2342 case BAD+4: case BAD+5: case BAD+6: case BAD+7:
2343 tmpreg = (4 << 10) | ((opP->reg - BAD) << 2);
2344 break;
2345
2346 case BAC: case BAC+1: case BAC+2: case BAC+3:
2347 case BAC+4: case BAC+5: case BAC+6: case BAC+7:
2348 tmpreg = (5 << 10) | ((opP->reg - BAC) << 2);
2349 break;
2350
2351 default:
2352 as_fatal("failed sanity check.");
2353 }
2354 install_operand(s[1], tmpreg);
2355 break;
2356 case 'Y':
2357 know(opP->reg == PSR);
2358 break;
2359 case 'Z':
2360 know(opP->reg == PCSR);
2361 break;
2362 #endif /* m68851 */
2363 case '_':
2364 tmpreg=get_num(opP->con1,80);
2365 install_operand(s[1], tmpreg);
2366 break;
2367 default:
2368 as_fatal("Internal error: Operand type %c unknown in line %s of file \"%s\"", s[0], __LINE__, __FILE__);
2369 }
2370 }
2371 /* By the time whe get here (FINALLY) the_ins contains the complete
2372 instruction, ready to be emitted. . . */
2373 } /* m68k_ip() */
2374
2375 /*
2376 * get_regs := '/' + ?
2377 * | '-' + <register>
2378 * | '-' + <register> + ?
2379 * | <empty>
2380 * ;
2381 *
2382
2383 * The idea here must be to scan in a set of registers but I don't
2384 * understand it. Looks awfully sloppy to me but I don't have any doc on
2385 * this format so...
2386
2387 *
2388 *
2389 */
2390
2391 static int get_regs(i,str,opP)
2392 int i;
2393 struct m68k_op *opP;
2394 char *str;
2395 {
2396 /* 26, 25, 24, 23-16, 15-8, 0-7 */
2397 /* Low order 24 bits encoded fpc,fps,fpi,fp7-fp0,a7-a0,d7-d0 */
2398 unsigned long cur_regs = 0;
2399 int reg1,
2400 reg2;
2401
2402 #define ADD_REG(x) { if(x==FPI) cur_regs|=(1<<24);\
2403 else if(x==FPS) cur_regs|=(1<<25);\
2404 else if(x==FPC) cur_regs|=(1<<26);\
2405 else cur_regs|=(1<<(x-1)); }
2406
2407 reg1=i;
2408 for(;;) {
2409 if(*str=='/') {
2410 ADD_REG(reg1);
2411 str++;
2412 } else if(*str=='-') {
2413 str++;
2414 reg2=m68k_reg_parse(&str);
2415 if(reg2<DATA || reg2>=FPREG+8 || reg1==FPI || reg1==FPS || reg1==FPC) {
2416 opP->error="unknown register in register list";
2417 return FAIL;
2418 }
2419 while(reg1<=reg2) {
2420 ADD_REG(reg1);
2421 reg1++;
2422 }
2423 if(*str=='\0')
2424 break;
2425 } else if(*str=='\0') {
2426 ADD_REG(reg1);
2427 break;
2428 } else {
2429 opP->error="unknow character in register list";
2430 return FAIL;
2431 }
2432 /* DJA -- Bug Fix. Did't handle d1-d2/a1 until the following instruction was added */
2433 if (*str=='/')
2434 str ++;
2435 reg1=m68k_reg_parse(&str);
2436 if((reg1<DATA || reg1>=FPREG+8) && !(reg1==FPI || reg1==FPS || reg1==FPC)) {
2437 opP->error="unknown register in register list";
2438 return FAIL;
2439 }
2440 }
2441 opP->reg=cur_regs;
2442 return OK;
2443 } /* get_regs() */
2444
2445 static int reverse_16_bits(in)
2446 int in;
2447 {
2448 int out=0;
2449 int n;
2450
2451 static int mask[16] = {
2452 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2453 0x0100,0x0200,0x0400,0x0800,0x1000,0x2000,0x4000,0x8000
2454 };
2455 for(n=0;n<16;n++) {
2456 if(in&mask[n])
2457 out|=mask[15-n];
2458 }
2459 return out;
2460 } /* reverse_16_bits() */
2461
2462 static int reverse_8_bits(in)
2463 int in;
2464 {
2465 int out=0;
2466 int n;
2467
2468 static int mask[8] = {
2469 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2470 };
2471
2472 for(n=0;n<8;n++) {
2473 if(in&mask[n])
2474 out|=mask[7-n];
2475 }
2476 return out;
2477 } /* reverse_8_bits() */
2478
2479 static void install_operand(mode,val)
2480 int mode;
2481 int val;
2482 {
2483 switch(mode) {
2484 case 's':
2485 the_ins.opcode[0]|=val & 0xFF; /* JF FF is for M kludge */
2486 break;
2487 case 'd':
2488 the_ins.opcode[0]|=val<<9;
2489 break;
2490 case '1':
2491 the_ins.opcode[1]|=val<<12;
2492 break;
2493 case '2':
2494 the_ins.opcode[1]|=val<<6;
2495 break;
2496 case '3':
2497 the_ins.opcode[1]|=val;
2498 break;
2499 case '4':
2500 the_ins.opcode[2]|=val<<12;
2501 break;
2502 case '5':
2503 the_ins.opcode[2]|=val<<6;
2504 break;
2505 case '6':
2506 /* DANGER! This is a hack to force cas2l and cas2w cmds
2507 to be three words long! */
2508 the_ins.numo++;
2509 the_ins.opcode[2]|=val;
2510 break;
2511 case '7':
2512 the_ins.opcode[1]|=val<<7;
2513 break;
2514 case '8':
2515 the_ins.opcode[1]|=val<<10;
2516 break;
2517 #ifndef NO_68851
2518 case '9':
2519 the_ins.opcode[1]|=val<<5;
2520 break;
2521 #endif
2522
2523 case 't':
2524 the_ins.opcode[1]|=(val<<10)|(val<<7);
2525 break;
2526 case 'D':
2527 the_ins.opcode[1]|=(val<<12)|val;
2528 break;
2529 case 'g':
2530 the_ins.opcode[0]|=val=0xff;
2531 break;
2532 case 'i':
2533 the_ins.opcode[0]|=val<<9;
2534 break;
2535 case 'C':
2536 the_ins.opcode[1]|=val;
2537 break;
2538 case 'j':
2539 the_ins.opcode[1]|=val;
2540 the_ins.numo++; /* What a hack */
2541 break;
2542 case 'k':
2543 the_ins.opcode[1]|=val<<4;
2544 break;
2545 case 'b':
2546 case 'w':
2547 case 'l':
2548 break;
2549 case 'e':
2550 the_ins.opcode[0] |= (val << 6);
2551 break;
2552 case 'L':
2553 the_ins.opcode[1] = (val >> 16);
2554 the_ins.opcode[2] = val & 0xffff;
2555 break;
2556 case 'c':
2557 default:
2558 as_fatal("failed sanity check.");
2559 }
2560 } /* install_operand() */
2561
2562 static void install_gen_operand(mode,val)
2563 int mode;
2564 int val;
2565 {
2566 switch(mode) {
2567 case 's':
2568 the_ins.opcode[0]|=val;
2569 break;
2570 case 'd':
2571 /* This is a kludge!!! */
2572 the_ins.opcode[0]|=(val&0x07)<<9|(val&0x38)<<3;
2573 break;
2574 case 'b':
2575 case 'w':
2576 case 'l':
2577 case 'f':
2578 case 'F':
2579 case 'x':
2580 case 'p':
2581 the_ins.opcode[0]|=val;
2582 break;
2583 /* more stuff goes here */
2584 default:
2585 as_fatal("failed sanity check.");
2586 }
2587 } /* install_gen_operand() */
2588
2589 /*
2590 * verify that we have some number of paren pairs, do m68k_ip_op(), and
2591 * then deal with the bitfield hack.
2592 */
2593
2594 static char *crack_operand(str,opP)
2595 register char *str;
2596 register struct m68k_op *opP;
2597 {
2598 register int parens;
2599 register int c;
2600 register char *beg_str;
2601
2602 if(!str) {
2603 return str;
2604 }
2605 beg_str=str;
2606 for(parens=0;*str && (parens>0 || notend(str));str++) {
2607 if(*str=='(') parens++;
2608 else if(*str==')') {
2609 if(!parens) { /* ERROR */
2610 opP->error="Extra )";
2611 return str;
2612 }
2613 --parens;
2614 }
2615 }
2616 if(!*str && parens) { /* ERROR */
2617 opP->error="Missing )";
2618 return str;
2619 }
2620 c= *str;
2621 *str='\0';
2622 if(m68k_ip_op(beg_str,opP)==FAIL) {
2623 *str=c;
2624 return str;
2625 }
2626 *str=c;
2627 if(c=='}')
2628 c= *++str; /* JF bitfield hack */
2629 if(c) {
2630 c= *++str;
2631 if(!c)
2632 as_bad("Missing operand");
2633 }
2634 return str;
2635 }
2636
2637 /* See the comment up above where the #define notend(... is */
2638 #if 0
2639 notend(s)
2640 char *s;
2641 {
2642 if(*s==',') return 0;
2643 if(*s=='{' || *s=='}')
2644 return 0;
2645 if(*s!=':') return 1;
2646 /* This kludge here is for the division cmd, which is a kludge */
2647 if(index("aAdD#",s[1])) return 0;
2648 return 1;
2649 }
2650 #endif
2651
2652 /* This is the guts of the machine-dependent assembler. STR points to a
2653 machine dependent instruction. This function is supposed to emit
2654 the frags/bytes it assembles to.
2655 */
2656 void
2657 md_assemble(str)
2658 char *str;
2659 {
2660 char *er;
2661 short *fromP;
2662 char *toP = NULL;
2663 int m,n = 0;
2664 char *to_beg_P;
2665 int shorts_this_frag;
2666
2667
2668 if (current_architecture == 0) {
2669 current_architecture = (m68020
2670 #ifndef NO_68881
2671 | m68881
2672 #endif
2673 #ifndef NO_68851
2674 | m68851
2675 #endif
2676 );
2677 } /* default current_architecture */
2678
2679 bzero((char *)(&the_ins),sizeof(the_ins)); /* JF for paranoia sake */
2680 m68k_ip(str);
2681 er=the_ins.error;
2682 if(!er) {
2683 for(n=the_ins.numargs;n;--n)
2684 if(the_ins.operands[n].error) {
2685 er=the_ins.operands[n].error;
2686 break;
2687 }
2688 }
2689 if(er) {
2690 as_bad("\"%s\" -- Statement '%s' ignored",er,str);
2691 return;
2692 }
2693
2694 if(the_ins.nfrag==0) { /* No frag hacking involved; just put it out */
2695 toP=frag_more(2*the_ins.numo);
2696 fromP= &the_ins.opcode[0];
2697 for(m=the_ins.numo;m;--m) {
2698 md_number_to_chars(toP,(long)(*fromP),2);
2699 toP+=2;
2700 fromP++;
2701 }
2702 /* put out symbol-dependent info */
2703 for(m=0;m<the_ins.nrel;m++) {
2704 switch(the_ins.reloc[m].wid) {
2705 case 'B':
2706 n=1;
2707 break;
2708 case 'b':
2709 n=1;
2710 break;
2711 case '3':
2712 n=2;
2713 break;
2714 case 'w':
2715 n=2;
2716 break;
2717 case 'l':
2718 n=4;
2719 break;
2720 default:
2721 as_fatal("Don't know how to figure width of %c in md_assemble()",the_ins.reloc[m].wid);
2722 }
2723
2724 fix_new(frag_now,
2725 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2726 n,
2727 the_ins.reloc[m].add,
2728 the_ins.reloc[m].sub,
2729 the_ins.reloc[m].off,
2730 the_ins.reloc[m].pcrel,
2731 NO_RELOC);
2732 }
2733 return;
2734 }
2735
2736 /* There's some frag hacking */
2737 for(n=0,fromP= &the_ins.opcode[0];n<the_ins.nfrag;n++) {
2738 int wid;
2739
2740 if(n==0) wid=2*the_ins.fragb[n].fragoff;
2741 else wid=2*(the_ins.numo-the_ins.fragb[n-1].fragoff);
2742 toP=frag_more(wid);
2743 to_beg_P=toP;
2744 shorts_this_frag=0;
2745 for(m=wid/2;m;--m) {
2746 md_number_to_chars(toP,(long)(*fromP),2);
2747 toP+=2;
2748 fromP++;
2749 shorts_this_frag++;
2750 }
2751 for(m=0;m<the_ins.nrel;m++) {
2752 if((the_ins.reloc[m].n)>= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */) {
2753 the_ins.reloc[m].n-= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */;
2754 break;
2755 }
2756 wid=the_ins.reloc[m].wid;
2757 if(wid==0)
2758 continue;
2759 the_ins.reloc[m].wid=0;
2760 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2761
2762 fix_new(frag_now,
2763 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2764 wid,
2765 the_ins.reloc[m].add,
2766 the_ins.reloc[m].sub,
2767 the_ins.reloc[m].off,
2768 the_ins.reloc[m].pcrel,
2769 NO_RELOC);
2770 }
2771 /* know(the_ins.fragb[n].fadd); */
2772 (void)frag_var(rs_machine_dependent,10,0,(relax_substateT)(the_ins.fragb[n].fragty),
2773 the_ins.fragb[n].fadd,the_ins.fragb[n].foff,to_beg_P);
2774 }
2775 n=(the_ins.numo-the_ins.fragb[n-1].fragoff);
2776 shorts_this_frag=0;
2777 if(n) {
2778 toP=frag_more(n*sizeof(short));
2779 while(n--) {
2780 md_number_to_chars(toP,(long)(*fromP),2);
2781 toP+=2;
2782 fromP++;
2783 shorts_this_frag++;
2784 }
2785 }
2786 for(m=0;m<the_ins.nrel;m++) {
2787 int wid;
2788
2789 wid=the_ins.reloc[m].wid;
2790 if(wid==0)
2791 continue;
2792 the_ins.reloc[m].wid=0;
2793 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2794
2795 fix_new(frag_now,
2796 (the_ins.reloc[m].n + toP-frag_now->fr_literal)-/* the_ins.numo */ shorts_this_frag*2,
2797 wid,
2798 the_ins.reloc[m].add,
2799 the_ins.reloc[m].sub,
2800 the_ins.reloc[m].off,
2801 the_ins.reloc[m].pcrel,
2802 NO_RELOC);
2803 }
2804 }
2805
2806 /* This function is called once, at assembler startup time. This should
2807 set up all the tables, etc that the MD part of the assembler needs
2808 */
2809 void
2810 md_begin()
2811 {
2812 /*
2813 * md_begin -- set up hash tables with 68000 instructions.
2814 * similar to what the vax assembler does. ---phr
2815 */
2816 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
2817 a copy of it at runtime, adding in the information we want but isn't
2818 there. I think it'd be better to have an awk script hack the table
2819 at compile time. Or even just xstr the table and use it as-is. But
2820 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
2821 names. */
2822
2823 register const struct m68k_opcode *ins;
2824 register struct m68k_incant *hack,
2825 *slak;
2826 register char *retval = 0; /* empty string, or error msg text */
2827 register unsigned int i;
2828 register char c;
2829
2830 if ((op_hash = hash_new()) == NULL)
2831 as_fatal("Virtual memory exhausted");
2832
2833 obstack_begin(&robyn,4000);
2834 for (ins = m68k_opcodes; ins < endop; ins++) {
2835 hack=slak=(struct m68k_incant *)obstack_alloc(&robyn,sizeof(struct m68k_incant));
2836 do {
2837 /* we *could* ignore insns that don't match our
2838 arch here but just leaving them out of the
2839 hash. */
2840 slak->m_operands=ins->args;
2841 slak->m_opnum=strlen(slak->m_operands)/2;
2842 slak->m_arch = ins->arch;
2843 slak->m_opcode=ins->opcode;
2844 /* This is kludgey */
2845 slak->m_codenum=((ins->match)&0xffffL) ? 2 : 1;
2846 if((ins+1)!=endop && !strcmp(ins->name,(ins+1)->name)) {
2847 slak->m_next=(struct m68k_incant *) obstack_alloc(&robyn,sizeof(struct m68k_incant));
2848 ins++;
2849 } else
2850 slak->m_next=0;
2851 slak=slak->m_next;
2852 } while(slak);
2853
2854 retval = hash_insert (op_hash, ins->name,(char *)hack);
2855 /* Didn't his mommy tell him about null pointers? */
2856 if(retval && *retval)
2857 as_fatal("Internal Error: Can't hash %s: %s",ins->name,retval);
2858 }
2859
2860 for (i = 0; i < sizeof(mklower_table) ; i++)
2861 mklower_table[i] = (isupper(c = (char) i)) ? tolower(c) : c;
2862
2863 for (i = 0 ; i < sizeof(notend_table) ; i++) {
2864 notend_table[i] = 0;
2865 alt_notend_table[i] = 0;
2866 }
2867 notend_table[','] = 1;
2868 notend_table['{'] = 1;
2869 notend_table['}'] = 1;
2870 alt_notend_table['a'] = 1;
2871 alt_notend_table['A'] = 1;
2872 alt_notend_table['d'] = 1;
2873 alt_notend_table['D'] = 1;
2874 alt_notend_table['#'] = 1;
2875 alt_notend_table['f'] = 1;
2876 alt_notend_table['F'] = 1;
2877 #ifdef REGISTER_PREFIX
2878 alt_notend_table[REGISTER_PREFIX] = 1;
2879 #endif
2880 }
2881
2882 #if 0
2883 #define notend(s) ((*s == ',' || *s == '}' || *s == '{' \
2884 || (*s == ':' && strchr("aAdD#", s[1]))) \
2885 ? 0 : 1)
2886 #endif
2887
2888 /* This funciton is called once, before the assembler exits. It is
2889 supposed to do any final cleanup for this part of the assembler.
2890 */
2891 void
2892 md_end()
2893 {
2894 }
2895
2896 /* Equal to MAX_PRECISION in atof-ieee.c */
2897 #define MAX_LITTLENUMS 6
2898
2899 /* Turn a string in input_line_pointer into a floating point constant of type
2900 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
2901 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
2902 */
2903 char *
2904 md_atof(type,litP,sizeP)
2905 char type;
2906 char *litP;
2907 int *sizeP;
2908 {
2909 int prec;
2910 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2911 LITTLENUM_TYPE *wordP;
2912 char *t;
2913 char *atof_ieee();
2914
2915 switch(type) {
2916 case 'f':
2917 case 'F':
2918 case 's':
2919 case 'S':
2920 prec = 2;
2921 break;
2922
2923 case 'd':
2924 case 'D':
2925 case 'r':
2926 case 'R':
2927 prec = 4;
2928 break;
2929
2930 case 'x':
2931 case 'X':
2932 prec = 6;
2933 break;
2934
2935 case 'p':
2936 case 'P':
2937 prec = 6;
2938 break;
2939
2940 default:
2941 *sizeP=0;
2942 return "Bad call to MD_ATOF()";
2943 }
2944 t=atof_ieee(input_line_pointer,type,words);
2945 if(t)
2946 input_line_pointer=t;
2947
2948 *sizeP=prec * sizeof(LITTLENUM_TYPE);
2949 for(wordP=words;prec--;) {
2950 md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
2951 litP+=sizeof(LITTLENUM_TYPE);
2952 }
2953 return ""; /* Someone should teach Dean about null pointers */
2954 }
2955
2956 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
2957 for use in the a.out file, and stores them in the array pointed to by buf.
2958 This knows about the endian-ness of the target machine and does
2959 THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
2960 2 (short) and 4 (long) Floating numbers are put out as a series of
2961 LITTLENUMS (shorts, here at least)
2962 */
2963 void
2964 md_number_to_chars(buf,val,n)
2965 char *buf;
2966 long val;
2967 int n;
2968 {
2969 switch(n) {
2970 case 1:
2971 *buf++=val;
2972 break;
2973 case 2:
2974 *buf++=(val>>8);
2975 *buf++=val;
2976 break;
2977 case 4:
2978 *buf++=(val>>24);
2979 *buf++=(val>>16);
2980 *buf++=(val>>8);
2981 *buf++=val;
2982 break;
2983 default:
2984 as_fatal("failed sanity check.");
2985 }
2986 }
2987
2988 void
2989 md_apply_fix(fixP, val)
2990 fixS *fixP;
2991 long val;
2992 {
2993 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2994
2995 switch(fixP->fx_size) {
2996 case 1:
2997 *buf++=val;
2998 break;
2999 case 2:
3000 *buf++=(val>>8);
3001 *buf++=val;
3002 break;
3003 case 4:
3004 *buf++=(val>>24);
3005 *buf++=(val>>16);
3006 *buf++=(val>>8);
3007 *buf++=val;
3008 break;
3009 default:
3010 BAD_CASE (fixP->fx_size);
3011 }
3012 }
3013
3014
3015 /* *fragP has been relaxed to its final size, and now needs to have
3016 the bytes inside it modified to conform to the new size There is UGLY
3017 MAGIC here. ..
3018 */
3019 void
3020 md_convert_frag(headers, fragP)
3021 object_headers *headers;
3022 register fragS *fragP;
3023 {
3024 long disp;
3025 long ext = 0;
3026
3027 /* Address in object code of the displacement. */
3028 register int object_address = fragP -> fr_fix + fragP -> fr_address;
3029
3030 #ifdef IBM_COMPILER_SUX
3031 /* This is wrong but it convinces the native rs6000 compiler to
3032 generate the code we want. */
3033 register char *buffer_address = fragP -> fr_literal;
3034 buffer_address += fragP -> fr_fix;
3035 #else /* IBM_COMPILER_SUX */
3036 /* Address in gas core of the place to store the displacement. */
3037 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
3038 #endif /* IBM_COMPILER_SUX */
3039
3040 /* No longer true: know(fragP->fr_symbol); */
3041
3042 /* The displacement of the address, from current location. */
3043 disp = fragP->fr_symbol ? S_GET_VALUE(fragP->fr_symbol) : 0;
3044 disp = (disp + fragP->fr_offset) - object_address;
3045
3046 switch(fragP->fr_subtype) {
3047 case TAB(BCC68000,BYTE):
3048 case TAB(BRANCH,BYTE):
3049 know(issbyte(disp));
3050 if(disp==0)
3051 as_bad("short branch with zero offset: use :w");
3052 fragP->fr_opcode[1]=disp;
3053 ext=0;
3054 break;
3055 case TAB(DBCC,SHORT):
3056 know(issword(disp));
3057 ext=2;
3058 break;
3059 case TAB(BCC68000,SHORT):
3060 case TAB(BRANCH,SHORT):
3061 know(issword(disp));
3062 fragP->fr_opcode[1]=0x00;
3063 ext=2;
3064 break;
3065 case TAB(BRANCH,LONG):
3066 if (cpu_of_arch(current_architecture) < m68020) {
3067 if (fragP->fr_opcode[0]==0x61) {
3068 fragP->fr_opcode[0]= 0x4E;
3069 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
3070 subseg_change(SEG_TEXT, 0);
3071
3072 fix_new(fragP,
3073 fragP->fr_fix,
3074 4,
3075 fragP->fr_symbol,
3076 0,
3077 fragP->fr_offset,
3078 0,
3079 NO_RELOC);
3080
3081 fragP->fr_fix+=4;
3082 ext=0;
3083 } else if (fragP->fr_opcode[0]==0x60) {
3084 fragP->fr_opcode[0]= 0x4E;
3085 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3086 subseg_change(SEG_TEXT, 0);
3087 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset,0,
3088 NO_RELOC);
3089 fragP->fr_fix+=4;
3090 ext=0;
3091 } else {
3092 as_bad("Long branch offset not supported.");
3093 }
3094 } else {
3095 fragP->fr_opcode[1]=0xff;
3096 ext=4;
3097 }
3098 break;
3099 case TAB(BCC68000,LONG):
3100 /* only Bcc 68000 instructions can come here */
3101 /* change bcc into b!cc/jmp absl long */
3102 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
3103 fragP->fr_opcode[1] = 0x6; /* branch offset = 6 */
3104
3105 /* JF: these used to be fr_opcode[2,3], but they may be in a
3106 different frag, in which case refering to them is a no-no.
3107 Only fr_opcode[0,1] are guaranteed to work. */
3108 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
3109 *buffer_address++ = 0xf9;
3110 fragP->fr_fix += 2; /* account for jmp instruction */
3111 subseg_change(SEG_TEXT,0);
3112 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3113 fragP->fr_offset,0,
3114 NO_RELOC);
3115 fragP->fr_fix += 4;
3116 ext=0;
3117 break;
3118 case TAB(DBCC,LONG):
3119 /* only DBcc 68000 instructions can come here */
3120 /* change dbcc into dbcc/jmp absl long */
3121 /* JF: these used to be fr_opcode[2-7], but that's wrong */
3122 *buffer_address++ = 0x00; /* branch offset = 4 */
3123 *buffer_address++ = 0x04;
3124 *buffer_address++ = 0x60; /* put in bra pc+6 */
3125 *buffer_address++ = 0x06;
3126 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
3127 *buffer_address++ = 0xf9;
3128
3129 fragP->fr_fix += 6; /* account for bra/jmp instructions */
3130 subseg_change(SEG_TEXT,0);
3131 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3132 fragP->fr_offset,0,
3133 NO_RELOC);
3134 fragP->fr_fix += 4;
3135 ext=0;
3136 break;
3137 case TAB(FBRANCH,SHORT):
3138 know((fragP->fr_opcode[1]&0x40)==0);
3139 ext=2;
3140 break;
3141 case TAB(FBRANCH,LONG):
3142 fragP->fr_opcode[1]|=0x40; /* Turn on LONG bit */
3143 ext=4;
3144 break;
3145 case TAB(PCREL,SHORT):
3146 ext=2;
3147 break;
3148 case TAB(PCREL,LONG):
3149 /* The thing to do here is force it to ABSOLUTE LONG, since
3150 PCREL is really trying to shorten an ABSOLUTE address anyway */
3151 /* JF FOO This code has not been tested */
3152 subseg_change(SEG_TEXT,0);
3153 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3154 if((fragP->fr_opcode[1] & 0x3F) != 0x3A)
3155 as_bad("Internal error (long PC-relative operand) for insn 0x%04lx at 0x%lx",
3156 fragP->fr_opcode[0],fragP->fr_address);
3157 fragP->fr_opcode[1]&= ~0x3F;
3158 fragP->fr_opcode[1]|=0x39; /* Mode 7.1 */
3159 fragP->fr_fix+=4;
3160 /* md_number_to_chars(buffer_address,
3161 (long)(fragP->fr_symbol->sy_value + fragP->fr_offset),
3162 4); */
3163 ext=0;
3164 break;
3165 case TAB(PCLEA,SHORT):
3166 subseg_change(SEG_TEXT,0);
3167 fix_new(fragP,(int)(fragP->fr_fix),2,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset,1,
3168 NO_RELOC);
3169 fragP->fr_opcode[1] &= ~0x3F;
3170 fragP->fr_opcode[1] |= 0x3A;
3171 ext=2;
3172 break;
3173 case TAB(PCLEA,LONG):
3174 subseg_change(SEG_TEXT,0);
3175 fix_new(fragP,(int)(fragP->fr_fix)+2,4,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset+2,1,
3176 NO_RELOC);
3177 *buffer_address++ = 0x01;
3178 *buffer_address++ = 0x70;
3179 fragP->fr_fix+=2;
3180 /* buffer_address+=2; */
3181 ext=4;
3182 break;
3183
3184 } /* switch on subtype */
3185
3186 if (ext) {
3187 md_number_to_chars(buffer_address, (long) disp, (int) ext);
3188 fragP->fr_fix += ext;
3189 /* H_SET_TEXT_SIZE(headers, H_GET_TEXT_SIZE(headers) + ext); */
3190 } /* if extending */
3191
3192 return;
3193 } /* md_convert_frag() */
3194
3195 /* Force truly undefined symbols to their maximum size, and generally set up
3196 the frag list to be relaxed
3197 */
3198 int md_estimate_size_before_relax(fragP, segment)
3199 register fragS *fragP;
3200 segT segment;
3201 {
3202 int old_fix;
3203 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
3204
3205 old_fix = fragP->fr_fix;
3206
3207 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
3208 switch(fragP->fr_subtype) {
3209
3210 case TAB(BRANCH,SZ_UNDEF): {
3211 if((fragP->fr_symbol != NULL) /* Not absolute */
3212 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3213 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),BYTE);
3214 break;
3215 } else if((fragP->fr_symbol == 0) || (cpu_of_arch(current_architecture) < m68020)) {
3216 /* On 68000, or for absolute value, switch to abs long */
3217 /* FIXME, we should check abs val, pick short or long */
3218 if(fragP->fr_opcode[0]==0x61) {
3219 fragP->fr_opcode[0]= 0x4E;
3220 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
3221 subseg_change(SEG_TEXT, 0);
3222 fix_new(fragP, fragP->fr_fix, 4,
3223 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3224 fragP->fr_fix+=4;
3225 frag_wane(fragP);
3226 } else if(fragP->fr_opcode[0]==0x60) {
3227 fragP->fr_opcode[0]= 0x4E;
3228 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3229 subseg_change(SEG_TEXT, 0);
3230 fix_new(fragP, fragP->fr_fix, 4,
3231 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3232 fragP->fr_fix+=4;
3233 frag_wane(fragP);
3234 } else {
3235 as_warn("Long branch offset to extern symbol not supported.");
3236 }
3237 } else { /* Symbol is still undefined. Make it simple */
3238 fix_new(fragP, (int)(fragP->fr_fix), 4, fragP->fr_symbol,
3239 (symbolS *)0, fragP->fr_offset+4, 1, NO_RELOC);
3240 fragP->fr_fix+=4;
3241 fragP->fr_opcode[1]=0xff;
3242 frag_wane(fragP);
3243 break;
3244 }
3245
3246 break;
3247 } /* case TAB(BRANCH,SZ_UNDEF) */
3248
3249 case TAB(FBRANCH,SZ_UNDEF): {
3250 if(S_GET_SEGMENT(fragP->fr_symbol) == segment || flagseen['l']) {
3251 fragP->fr_subtype = TAB(FBRANCH,SHORT);
3252 fragP->fr_var += 2;
3253 } else {
3254 fragP->fr_subtype = TAB(FBRANCH,LONG);
3255 fragP->fr_var += 4;
3256 }
3257 break;
3258 } /* TAB(FBRANCH,SZ_UNDEF) */
3259
3260 case TAB(PCREL,SZ_UNDEF): {
3261 if(S_GET_SEGMENT(fragP->fr_symbol) == segment || flagseen['l']) {
3262 fragP->fr_subtype = TAB(PCREL,SHORT);
3263 fragP->fr_var += 2;
3264 } else {
3265 fragP->fr_subtype = TAB(PCREL,LONG);
3266 fragP->fr_var += 4;
3267 }
3268 break;
3269 } /* TAB(PCREL,SZ_UNDEF) */
3270
3271 case TAB(BCC68000,SZ_UNDEF): {
3272 if((fragP->fr_symbol != NULL)
3273 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3274 fragP->fr_subtype=TAB(BCC68000,BYTE);
3275 break;
3276 }
3277 /* only Bcc 68000 instructions can come here */
3278 /* change bcc into b!cc/jmp absl long */
3279 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
3280 if(flagseen['l']) {
3281 fragP->fr_opcode[1] = 0x04; /* branch offset = 6 */
3282 /* JF: these were fr_opcode[2,3] */
3283 buffer_address[0] = 0x4e; /* put in jmp long (0x4ef9) */
3284 buffer_address[1] = 0xf8;
3285 fragP->fr_fix += 2; /* account for jmp instruction */
3286 subseg_change(SEG_TEXT,0);
3287 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
3288 fragP->fr_offset, 0, NO_RELOC);
3289 fragP->fr_fix += 2;
3290 } else {
3291 fragP->fr_opcode[1] = 0x06; /* branch offset = 6 */
3292 /* JF: these were fr_opcode[2,3] */
3293 buffer_address[2] = 0x4e; /* put in jmp long (0x4ef9) */
3294 buffer_address[3] = 0xf9;
3295 fragP->fr_fix += 2; /* account for jmp instruction */
3296 subseg_change(SEG_TEXT,0);
3297 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3298 fragP->fr_offset, 0, NO_RELOC);
3299 fragP->fr_fix += 4;
3300 }
3301 frag_wane(fragP);
3302 break;
3303 } /* case TAB(BCC68000,SZ_UNDEF) */
3304
3305 case TAB(DBCC,SZ_UNDEF): {
3306 if (fragP->fr_symbol != NULL && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3307 fragP->fr_subtype=TAB(DBCC,SHORT);
3308 fragP->fr_var+=2;
3309 break;
3310 }
3311 /* only DBcc 68000 instructions can come here */
3312 /* change dbcc into dbcc/jmp absl long */
3313 /* JF: these used to be fr_opcode[2-4], which is wrong. */
3314 buffer_address[0] = 0x00; /* branch offset = 4 */
3315 buffer_address[1] = 0x04;
3316 buffer_address[2] = 0x60; /* put in bra pc + ... */
3317
3318 if(flagseen['l']) {
3319 /* JF: these were fr_opcode[5-7] */
3320 buffer_address[3] = 0x04; /* plus 4 */
3321 buffer_address[4] = 0x4e;/* Put in Jump Word */
3322 buffer_address[5] = 0xf8;
3323 fragP->fr_fix += 6; /* account for bra/jmp instruction */
3324 subseg_change(SEG_TEXT,0);
3325 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
3326 fragP->fr_offset, 0, NO_RELOC);
3327 fragP->fr_fix += 2;
3328 } else {
3329 /* JF: these were fr_opcode[5-7] */
3330 buffer_address[3] = 0x06; /* Plus 6 */
3331 buffer_address[4] = 0x4e; /* put in jmp long (0x4ef9) */
3332 buffer_address[5] = 0xf9;
3333 fragP->fr_fix += 6; /* account for bra/jmp instruction */
3334 subseg_change(SEG_TEXT,0);
3335 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3336 fragP->fr_offset, 0, NO_RELOC);
3337 fragP->fr_fix += 4;
3338 }
3339
3340 frag_wane(fragP);
3341 break;
3342 } /* case TAB(DBCC,SZ_UNDEF) */
3343
3344 case TAB(PCLEA,SZ_UNDEF): {
3345 if ((S_GET_SEGMENT(fragP->fr_symbol))==segment || flagseen['l']) {
3346 fragP->fr_subtype=TAB(PCLEA,SHORT);
3347 fragP->fr_var+=2;
3348 } else {
3349 fragP->fr_subtype=TAB(PCLEA,LONG);
3350 fragP->fr_var+=6;
3351 }
3352 break;
3353 } /* TAB(PCLEA,SZ_UNDEF) */
3354
3355 default:
3356 break;
3357
3358 } /* switch on subtype looking for SZ_UNDEF's. */
3359
3360 /* now that SZ_UNDEF are taken care of, check others */
3361 switch(fragP->fr_subtype) {
3362 case TAB(BCC68000,BYTE):
3363 case TAB(BRANCH,BYTE):
3364 /* We can't do a short jump to the next instruction,
3365 so we force word mode. */
3366 if (fragP->fr_symbol && S_GET_VALUE(fragP->fr_symbol)==0 &&
3367 fragP->fr_symbol->sy_frag==fragP->fr_next) {
3368 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),SHORT);
3369 fragP->fr_var+=2;
3370 }
3371 break;
3372 default:
3373 break;
3374 }
3375 return fragP->fr_var + fragP->fr_fix - old_fix;
3376 }
3377
3378 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
3379 /* the bit-field entries in the relocation_info struct plays hell
3380 with the byte-order problems of cross-assembly. So as a hack,
3381 I added this mach. dependent ri twiddler. Ugly, but it gets
3382 you there. -KWK */
3383 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
3384 are symbolnum, most sig. byte first. Last byte is broken up with
3385 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
3386 nibble as nuthin. (on Sun 3 at least) */
3387 /* Translate the internal relocation information into target-specific
3388 format. */
3389 #ifdef comment
3390 void
3391 md_ri_to_chars(the_bytes, ri)
3392 char *the_bytes;
3393 struct reloc_info_generic *ri;
3394 {
3395 /* this is easy */
3396 md_number_to_chars(the_bytes, ri->r_address, 4);
3397 /* now the fun stuff */
3398 the_bytes[4] = (ri->r_symbolnum >> 16) & 0x0ff;
3399 the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
3400 the_bytes[6] = ri->r_symbolnum & 0x0ff;
3401 the_bytes[7] = (((ri->r_pcrel << 7) & 0x80) | ((ri->r_length << 5) & 0x60) |
3402 ((ri->r_extern << 4) & 0x10));
3403 }
3404 #endif /* comment */
3405
3406 void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
3407 char *where;
3408 fixS *fixP;
3409 relax_addressT segment_address_in_file;
3410 {
3411 /*
3412 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3413 * Out: GNU LD relocation length code: 0, 1, or 2.
3414 */
3415
3416 static unsigned char nbytes_r_length [] = { 42, 0, 1, 42, 2 };
3417
3418 long r_extern;
3419 long r_symbolnum;
3420
3421 /* this is easy */
3422 md_number_to_chars(where,
3423 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
3424 4);
3425
3426 /* now the fun stuff */
3427 if (S_GET_TYPE(fixP->fx_addsy) == N_UNDF) {
3428 r_extern = 1;
3429 r_symbolnum = fixP->fx_addsy->sy_number;
3430 } else {
3431 r_extern = 0;
3432 r_symbolnum = S_GET_TYPE(fixP->fx_addsy);
3433 }
3434
3435 where[4] = (r_symbolnum >> 16) & 0x0ff;
3436 where[5] = (r_symbolnum >> 8) & 0x0ff;
3437 where[6] = r_symbolnum & 0x0ff;
3438 where[7] = (((fixP->fx_pcrel << 7) & 0x80) | ((nbytes_r_length[fixP->fx_size] << 5) & 0x60) |
3439 ((r_extern << 4) & 0x10));
3440
3441 return;
3442 } /* tc_aout_fix_to_chars() */
3443
3444 #endif /* OBJ_AOUT or OBJ_BOUT */
3445
3446 #ifndef WORKING_DOT_WORD
3447 const int md_short_jump_size = 4;
3448 const int md_long_jump_size = 6;
3449
3450 void
3451 md_create_short_jump(ptr,from_addr,to_addr,frag,to_symbol)
3452 char *ptr;
3453 long from_addr,
3454 to_addr;
3455 fragS *frag;
3456 symbolS *to_symbol;
3457 {
3458 long offset;
3459
3460 offset = to_addr - (from_addr+2);
3461
3462 md_number_to_chars(ptr ,(long)0x6000,2);
3463 md_number_to_chars(ptr+2,(long)offset,2);
3464 }
3465
3466 void
3467 md_create_long_jump(ptr,from_addr,to_addr,frag,to_symbol)
3468 char *ptr;
3469 long from_addr,
3470 to_addr;
3471 fragS *frag;
3472 symbolS *to_symbol;
3473 {
3474 long offset;
3475
3476 if (cpu_of_arch(current_architecture) < m68020) {
3477 offset=to_addr-S_GET_VALUE(to_symbol);
3478 md_number_to_chars(ptr ,(long)0x4EF9,2);
3479 md_number_to_chars(ptr+2,(long)offset,4);
3480 fix_new(frag,(ptr+2)-frag->fr_literal,4,to_symbol,(symbolS *)0,(long)0,0,
3481 NO_RELOC);
3482 } else {
3483 offset=to_addr - (from_addr+2);
3484 md_number_to_chars(ptr ,(long)0x60ff,2);
3485 md_number_to_chars(ptr+2,(long)offset,4);
3486 }
3487 }
3488
3489 #endif
3490 /* Different values of OK tell what its OK to return. Things that aren't OK are an error (what a shock, no?)
3491
3492 0: Everything is OK
3493 10: Absolute 1:8 only
3494 20: Absolute 0:7 only
3495 30: absolute 0:15 only
3496 40: Absolute 0:31 only
3497 50: absolute 0:127 only
3498 55: absolute -64:63 only
3499 60: absolute -128:127 only
3500 70: absolute 0:4095 only
3501 80: No bignums
3502
3503 */
3504
3505 static int get_num(exp,ok)
3506 struct m68k_exp *exp;
3507 int ok;
3508 {
3509 #ifdef TEST2
3510 long l = 0;
3511
3512 if(!exp->e_beg)
3513 return 0;
3514 if(*exp->e_beg=='0') {
3515 if(exp->e_beg[1]=='x')
3516 sscanf(exp->e_beg+2,"%x",&l);
3517 else
3518 sscanf(exp->e_beg+1,"%O",&l);
3519 return l;
3520 }
3521 return atol(exp->e_beg);
3522 #else
3523 char *save_in;
3524 char c_save;
3525
3526 if(!exp) {
3527 /* Can't do anything */
3528 return 0;
3529 }
3530 if(!exp->e_beg || !exp->e_end) {
3531 seg(exp)=SEG_ABSOLUTE;
3532 adds(exp)=0;
3533 subs(exp)=0;
3534 offs(exp)= (ok==10) ? 1 : 0;
3535 as_warn("Null expression defaults to %ld",offs(exp));
3536 return 0;
3537 }
3538
3539 exp->e_siz=0;
3540 if(/* ok!=80 && */exp->e_end[-1]==':' && (exp->e_end-exp->e_beg)>=2) {
3541 switch(exp->e_end[0]) {
3542 case 's':
3543 case 'S':
3544 case 'b':
3545 case 'B':
3546 exp->e_siz=1;
3547 break;
3548 case 'w':
3549 case 'W':
3550 exp->e_siz=2;
3551 break;
3552 case 'l':
3553 case 'L':
3554 exp->e_siz=3;
3555 break;
3556 default:
3557 as_bad("Unknown size for expression \"%c\"",exp->e_end[0]);
3558 }
3559 exp->e_end-=2;
3560 }
3561 c_save=exp->e_end[1];
3562 exp->e_end[1]='\0';
3563 save_in=input_line_pointer;
3564 input_line_pointer=exp->e_beg;
3565 switch(expression(&(exp->e_exp))) {
3566 case SEG_PASS1:
3567 seg(exp)=SEG_ABSOLUTE;
3568 adds(exp)=0;
3569 subs(exp)=0;
3570 offs(exp)= (ok==10) ? 1 : 0;
3571 as_warn("Unknown expression: '%s' defaulting to %d",exp->e_beg,offs(exp));
3572 break;
3573
3574 case SEG_ABSENT:
3575 /* Do the same thing the VAX asm does */
3576 seg(exp)=SEG_ABSOLUTE;
3577 adds(exp)=0;
3578 subs(exp)=0;
3579 offs(exp)=0;
3580 if(ok==10) {
3581 as_warn("expression out of range: defaulting to 1");
3582 offs(exp)=1;
3583 }
3584 break;
3585 case SEG_ABSOLUTE:
3586 switch(ok) {
3587 case 10:
3588 if(offs(exp)<1 || offs(exp)>8) {
3589 as_warn("expression out of range: defaulting to 1");
3590 offs(exp)=1;
3591 }
3592 break;
3593 case 20:
3594 if(offs(exp)<0 || offs(exp)>7)
3595 goto outrange;
3596 break;
3597 case 30:
3598 if(offs(exp)<0 || offs(exp)>15)
3599 goto outrange;
3600 break;
3601 case 40:
3602 if(offs(exp)<0 || offs(exp)>32)
3603 goto outrange;
3604 break;
3605 case 50:
3606 if(offs(exp)<0 || offs(exp)>127)
3607 goto outrange;
3608 break;
3609 case 55:
3610 if(offs(exp)<-64 || offs(exp)>63)
3611 goto outrange;
3612 break;
3613 case 60:
3614 if(offs(exp)<-128 || offs(exp)>127)
3615 goto outrange;
3616 break;
3617 case 70:
3618 if(offs(exp)<0 || offs(exp)>4095) {
3619 outrange:
3620 as_warn("expression out of range: defaulting to 0");
3621 offs(exp)=0;
3622 }
3623 break;
3624 default:
3625 break;
3626 }
3627 break;
3628 case SEG_TEXT:
3629 case SEG_DATA:
3630 case SEG_BSS:
3631 case SEG_UNKNOWN:
3632 case SEG_DIFFERENCE:
3633 if(ok>=10 && ok<=70) {
3634 seg(exp)=SEG_ABSOLUTE;
3635 adds(exp)=0;
3636 subs(exp)=0;
3637 offs(exp)= (ok==10) ? 1 : 0;
3638 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3639 }
3640 break;
3641 case SEG_BIG:
3642 if(ok==80 && offs(exp)<0) { /* HACK! Turn it into a long */
3643 LITTLENUM_TYPE words[6];
3644
3645 gen_to_words(words,2,8L);/* These numbers are magic! */
3646 seg(exp)=SEG_ABSOLUTE;
3647 adds(exp)=0;
3648 subs(exp)=0;
3649 offs(exp)=words[1]|(words[0]<<16);
3650 } else if(ok!=0) {
3651 seg(exp)=SEG_ABSOLUTE;
3652 adds(exp)=0;
3653 subs(exp)=0;
3654 offs(exp)= (ok==10) ? 1 : 0;
3655 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3656 }
3657 break;
3658 default:
3659 as_fatal("failed sanity check.");
3660 }
3661 if(input_line_pointer!=exp->e_end+1)
3662 as_bad("Ignoring junk after expression");
3663 exp->e_end[1]=c_save;
3664 input_line_pointer=save_in;
3665 if(exp->e_siz) {
3666 switch(exp->e_siz) {
3667 case 1:
3668 if(!isbyte(offs(exp)))
3669 as_warn("expression doesn't fit in BYTE");
3670 break;
3671 case 2:
3672 if(!isword(offs(exp)))
3673 as_warn("expression doesn't fit in WORD");
3674 break;
3675 }
3676 }
3677 return offs(exp);
3678 #endif
3679 } /* get_num() */
3680
3681 /* These are the back-ends for the various machine dependent pseudo-ops. */
3682 void demand_empty_rest_of_line(); /* Hate those extra verbose names */
3683
3684 static void s_data1() {
3685 subseg_new(SEG_DATA,1);
3686 demand_empty_rest_of_line();
3687 } /* s_data1() */
3688
3689 static void s_data2() {
3690 subseg_new(SEG_DATA,2);
3691 demand_empty_rest_of_line();
3692 } /* s_data2() */
3693
3694 static void s_bss() {
3695 /* We don't support putting frags in the BSS segment, but we
3696 can put them into initialized data for now... */
3697 subseg_new(SEG_DATA,255); /* FIXME-SOON */
3698 demand_empty_rest_of_line();
3699 } /* s_bss() */
3700
3701 static void s_even() {
3702 register int temp;
3703 register long temp_fill;
3704
3705 temp = 1; /* JF should be 2? */
3706 temp_fill = get_absolute_expression ();
3707 if ( ! need_pass_2 ) /* Never make frag if expect extra pass. */
3708 frag_align (temp, (int)temp_fill);
3709 demand_empty_rest_of_line();
3710 } /* s_even() */
3711
3712 static void s_proc() {
3713 demand_empty_rest_of_line();
3714 } /* s_proc() */
3715
3716 /* s_space is defined in read.c .skip is simply an alias to it. */
3717
3718 /*
3719 * md_parse_option
3720 * Invocation line includes a switch not recognized by the base assembler.
3721 * See if it's a processor-specific option. These are:
3722 *
3723 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
3724 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
3725 * Select the architecture. Instructions or features not
3726 * supported by the selected architecture cause fatal
3727 * errors. More than one may be specified. The default is
3728 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
3729 * for -m68000, and -m68882 is a synonym for -m68881.
3730 *
3731 * MAYBE_FLOAT_TOO is defined below so that specifying a processor type
3732 * (e.g. m68020) also requests that float instructions be included. This
3733 * is the default setup, mostly to avoid hassling users. A better
3734 * rearrangement of this structure would be to add an option to DENY
3735 * floating point opcodes, for people who want to really know there's none
3736 * of that funny floaty stuff going on. FIXME-later.
3737 */
3738 #ifndef MAYBE_FLOAT_TOO
3739 #define MAYBE_FLOAT_TOO m68881
3740 #endif
3741
3742 int md_parse_option(argP,cntP,vecP)
3743 char **argP;
3744 int *cntP;
3745 char ***vecP;
3746 {
3747 switch(**argP) {
3748 case 'l': /* -l means keep external to 2 bit offset
3749 rather than 16 bit one */
3750 break;
3751
3752 case 'S': /* -S means that jbsr's always turn into jsr's. */
3753 break;
3754
3755 case 'A':
3756 (*argP)++;
3757 /* intentional fall-through */
3758 case 'm':
3759 (*argP)++;
3760
3761 if (**argP=='c') {
3762 (*argP)++;
3763 } /* allow an optional "c" */
3764
3765 if (!strcmp(*argP, "68000")
3766 || !strcmp(*argP, "68008")) {
3767 current_architecture |= m68000;
3768 } else if (!strcmp(*argP, "68010")) {
3769 #ifdef TE_SUN
3770 omagic= 1<<16|OMAGIC;
3771 #endif
3772 current_architecture |= m68010;
3773
3774 } else if (!strcmp(*argP, "68020")) {
3775 current_architecture |= m68020 | MAYBE_FLOAT_TOO;
3776
3777 } else if (!strcmp(*argP, "68030")) {
3778 current_architecture |= m68030 | MAYBE_FLOAT_TOO;
3779
3780 } else if (!strcmp(*argP, "68040")) {
3781 current_architecture |= m68040 | MAYBE_FLOAT_TOO;
3782
3783 #ifndef NO_68881
3784 } else if (!strcmp(*argP, "68881")) {
3785 current_architecture |= m68881;
3786
3787 } else if (!strcmp(*argP, "68882")) {
3788 current_architecture |= m68882;
3789
3790 #endif /* NO_68881 */
3791 #ifndef NO_68851
3792 } else if (!strcmp(*argP,"68851")) {
3793 current_architecture |= m68851;
3794
3795 #endif /* NO_68851 */
3796 } else {
3797 as_warn("Unknown architecture, \"%s\". option ignored", *argP);
3798 } /* switch on architecture */
3799
3800 while(**argP) (*argP)++;
3801
3802 break;
3803
3804 case 'p':
3805 if (!strcmp(*argP,"pic")) {
3806 (*argP) += 3;
3807 break; /* -pic, Position Independent Code */
3808 } else {
3809 return(0);
3810 } /* pic or not */
3811
3812 default:
3813 return 0;
3814 }
3815 return 1;
3816 }
3817
3818
3819 #ifdef TEST2
3820
3821 /* TEST2: Test md_assemble() */
3822 /* Warning, this routine probably doesn't work anymore */
3823
3824 main()
3825 {
3826 struct m68k_it the_ins;
3827 char buf[120];
3828 char *cp;
3829 int n;
3830
3831 m68k_ip_begin();
3832 for(;;) {
3833 if(!gets(buf) || !*buf)
3834 break;
3835 if(buf[0]=='|' || buf[1]=='.')
3836 continue;
3837 for(cp=buf;*cp;cp++)
3838 if(*cp=='\t')
3839 *cp=' ';
3840 if(is_label(buf))
3841 continue;
3842 bzero(&the_ins,sizeof(the_ins));
3843 m68k_ip(&the_ins,buf);
3844 if(the_ins.error) {
3845 printf("Error %s in %s\n",the_ins.error,buf);
3846 } else {
3847 printf("Opcode(%d.%s): ",the_ins.numo,the_ins.args);
3848 for(n=0;n<the_ins.numo;n++)
3849 printf(" 0x%x",the_ins.opcode[n]&0xffff);
3850 printf(" ");
3851 print_the_insn(&the_ins.opcode[0],stdout);
3852 (void)putchar('\n');
3853 }
3854 for(n=0;n<strlen(the_ins.args)/2;n++) {
3855 if(the_ins.operands[n].error) {
3856 printf("op%d Error %s in %s\n",n,the_ins.operands[n].error,buf);
3857 continue;
3858 }
3859 printf("mode %d, reg %d, ",the_ins.operands[n].mode,the_ins.operands[n].reg);
3860 if(the_ins.operands[n].b_const)
3861 printf("Constant: '%.*s', ",1+the_ins.operands[n].e_const-the_ins.operands[n].b_const,the_ins.operands[n].b_const);
3862 printf("ireg %d, isiz %d, imul %d, ",the_ins.operands[n].ireg,the_ins.operands[n].isiz,the_ins.operands[n].imul);
3863 if(the_ins.operands[n].b_iadd)
3864 printf("Iadd: '%.*s',",1+the_ins.operands[n].e_iadd-the_ins.operands[n].b_iadd,the_ins.operands[n].b_iadd);
3865 (void)putchar('\n');
3866 }
3867 }
3868 m68k_ip_end();
3869 return 0;
3870 }
3871
3872 is_label(str)
3873 char *str;
3874 {
3875 while(*str==' ')
3876 str++;
3877 while(*str && *str!=' ')
3878 str++;
3879 if(str[-1]==':' || str[1]=='=')
3880 return 1;
3881 return 0;
3882 }
3883
3884 #endif
3885
3886 /* Possible states for relaxation:
3887
3888 0 0 branch offset byte (bra, etc)
3889 0 1 word
3890 0 2 long
3891
3892 1 0 indexed offsets byte a0@(32,d4:w:1) etc
3893 1 1 word
3894 1 2 long
3895
3896 2 0 two-offset index word-word a0@(32,d4)@(45) etc
3897 2 1 word-long
3898 2 2 long-word
3899 2 3 long-long
3900
3901 */
3902
3903
3904
3905 #ifdef DONTDEF
3906 abort()
3907 {
3908 printf("ABORT!\n");
3909 exit(12);
3910 }
3911
3912 char *index(s,c)
3913 char *s;
3914 {
3915 while(*s!=c) {
3916 if(!*s) return 0;
3917 s++;
3918 }
3919 return s;
3920 }
3921
3922 bzero(s,n)
3923 char *s;
3924 {
3925 while(n--)
3926 *s++=0;
3927 }
3928
3929 print_frags()
3930 {
3931 fragS *fragP;
3932 extern fragS *text_frag_root;
3933
3934 for(fragP=text_frag_root;fragP;fragP=fragP->fr_next) {
3935 printf("addr %lu next 0x%x fix %ld var %ld symbol 0x%x offset %ld\n",
3936 fragP->fr_address,fragP->fr_next,fragP->fr_fix,fragP->fr_var,fragP->fr_symbol,fragP->fr_offset);
3937 printf("opcode 0x%x type %d subtype %d\n\n",fragP->fr_opcode,fragP->fr_type,fragP->fr_subtype);
3938 }
3939 fflush(stdout);
3940 return 0;
3941 }
3942 #endif
3943
3944 #ifdef DONTDEF
3945 /*VARARGS1*/
3946 panic(format,args)
3947 char *format;
3948 {
3949 fputs("Internal error:",stderr);
3950 _doprnt(format,&args,stderr);
3951 (void)putc('\n',stderr);
3952 as_where();
3953 abort();
3954 }
3955 #endif
3956
3957 /* We have no need to default values of symbols. */
3958
3959 /* ARGSUSED */
3960 symbolS *
3961 md_undefined_symbol (name)
3962 char *name;
3963 {
3964 return 0;
3965 }
3966
3967 /* Parse an operand that is machine-specific.
3968 We just return without modifying the expression if we have nothing
3969 to do. */
3970
3971 /* ARGSUSED */
3972 void
3973 md_operand (expressionP)
3974 expressionS *expressionP;
3975 {
3976 }
3977
3978 /* Round up a section size to the appropriate boundary. */
3979 long
3980 md_section_align (segment, size)
3981 segT segment;
3982 long size;
3983 {
3984 return size; /* Byte alignment is fine */
3985 }
3986
3987 /* Exactly what point is a PC-relative offset relative TO?
3988 On the 68k, they're relative to the address of the offset, plus
3989 its size. (??? Is this right? FIXME-SOON!) */
3990 long
3991 md_pcrel_from (fixP)
3992 fixS *fixP;
3993 {
3994 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
3995 }
3996
3997 /*
3998 * Local Variables:
3999 * comment-column: 0
4000 * fill-column: 131
4001 * End:
4002 */
4003
4004 /* end of tc-m68k.c */