1 /* tc-m68k.c -- Assemble for the m68k family
2 Copyright (C) 1987, 91, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
27 #include "opcode/m68k.h"
28 #include "m68k-parse.h"
30 /* This array holds the chars that always start a comment. If the
31 pre-processor is disabled, these aren't very useful */
32 #if defined (OBJ_ELF) || defined (TE_DELTA)
33 const char comment_chars
[] = "|#";
35 const char comment_chars
[] = "|";
38 /* This array holds the chars that only start a comment at the beginning of
39 a line. If the line seems to have the form '# 123 filename'
40 .line and .file directives will appear in the pre-processed output */
41 /* Note that input_file.c hand checks for '#' at the beginning of the
42 first line of the input file. This is because the compiler outputs
43 #NO_APP at the beginning of its output. */
44 /* Also note that comments like this one will always work. */
45 const char line_comment_chars
[] = "#";
47 const char line_separator_chars
[] = "";
49 /* Chars that can be used to separate mant from exp in floating point nums */
50 CONST
char EXP_CHARS
[] = "eE";
52 /* Chars that mean this number is a floating point constant, as
53 in "0f12.456" or "0d1.2345e12". */
55 CONST
char FLT_CHARS
[] = "rRsSfFdDxXeEpP";
57 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
58 changed in read.c . Ideally it shouldn't have to know about it at all,
59 but nothing is ideal around here. */
61 const int md_reloc_size
= 8; /* Size of relocation record */
63 /* Are we trying to generate PIC code? If so, absolute references
64 ought to be made into linkage table references or pc-relative
68 static int flag_short_refs
; /* -l option */
69 static int flag_long_jumps
; /* -S option */
71 #ifdef REGISTER_PREFIX_OPTIONAL
72 int flag_reg_prefix_optional
= REGISTER_PREFIX_OPTIONAL
;
74 int flag_reg_prefix_optional
;
77 /* The floating point coprocessor to use by default. */
78 static enum m68k_register m68k_float_copnum
= COP1
;
80 /* If this is non-zero, then references to number(%pc) will be taken
81 to refer to number, rather than to %pc + number. */
82 static int m68k_abspcadd
;
84 /* If this is non-zero, then the quick forms of the move, add, and sub
85 instructions are used when possible. */
86 static int m68k_quick
= 1;
88 /* If this is non-zero, then if the size is not specified for a base
89 or outer displacement, the assembler assumes that the size should
91 static int m68k_rel32
= 1;
93 /* Its an arbitrary name: This means I don't approve of it */
94 /* See flames below */
95 static struct obstack robyn
;
97 #define TAB(x,y) (((x)<<2)+(y))
98 #define TABTYPE(xy) ((xy) >> 2)
104 /* Case `g' except when BCC68000 is applicable. */
106 /* Coprocessor branches. */
108 /* Mode 7.2 -- program counter indirect with (16-bit) displacement,
109 supported on all cpus. Widens to 32-bit absolute. */
111 /* For inserting an extra jmp instruction with long offset on 68000,
112 for expanding conditional branches. (Not bsr or bra.) Since the
113 68000 doesn't support 32-bit displacements for conditional
114 branches, we fake it by reversing the condition and branching
115 around a jmp with an absolute long operand. */
117 /* For the DBcc "instructions". If the displacement requires 32 bits,
118 the branch-around-a-jump game is played here too. */
120 /* Not currently used? */
122 /* Mode AINDX (apc-relative) using PC, with variable target, might fit
128 const char *m_operands
;
129 unsigned long m_opcode
;
133 struct m68k_incant
*m_next
;
136 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
137 #define gettwo(x) (((x)->m_opcode)&0xffff)
139 static const enum m68k_register m68000_control_regs
[] = { 0 };
140 static const enum m68k_register m68010_control_regs
[] = {
144 static const enum m68k_register m68020_control_regs
[] = {
145 SFC
, DFC
, USP
, VBR
, CACR
, CAAR
, MSP
, ISP
,
148 static const enum m68k_register m68040_control_regs
[] = {
149 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
,
150 USP
, VBR
, MSP
, ISP
, MMUSR
, URP
, SRP
,
153 static const enum m68k_register m68060_control_regs
[] = {
154 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
, BUSCR
,
155 USP
, VBR
, URP
, SRP
, PCR
,
158 #define cpu32_control_regs m68010_control_regs
160 static const enum m68k_register
*control_regs
;
162 /* internal form of a 68020 instruction */
166 const char *args
; /* list of opcode info */
169 int numo
; /* Number of shorts in opcode */
172 struct m68k_op operands
[6];
174 int nexp
; /* number of exprs in use */
175 struct m68k_exp exprs
[4];
177 int nfrag
; /* Number of frags we have to produce */
180 int fragoff
; /* Where in the current opcode the frag ends */
187 int nrel
; /* Num of reloc strucs in use */
194 /* In a pc relative address the difference between the address
195 of the offset and the address that the offset is relative
196 to. This depends on the addressing mode. Basically this
197 is the value to put in the offset field to address the
198 first byte of the offset, without regarding the special
199 significance of some values (in the branch instruction, for
203 reloc
[5]; /* Five is enough??? */
206 #define cpu_of_arch(x) ((x) & m68000up)
207 #define float_of_arch(x) ((x) & mfloat)
208 #define mmu_of_arch(x) ((x) & mmmu)
210 static struct m68k_it the_ins
; /* the instruction being assembled */
212 #define op(ex) ((ex)->exp.X_op)
213 #define adds(ex) ((ex)->exp.X_add_symbol)
214 #define subs(ex) ((ex)->exp.X_op_symbol)
215 #define offs(ex) ((ex)->exp.X_add_number)
217 /* Macros for adding things to the m68k_it struct */
219 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
221 /* Like addword, but goes BEFORE general operands */
225 struct m68k_incant
*opcode
;
228 for(z
=the_ins
.numo
;z
>opcode
->m_codenum
;--z
)
229 the_ins
.opcode
[z
]=the_ins
.opcode
[z
-1];
230 for(z
=0;z
<the_ins
.nrel
;z
++)
231 the_ins
.reloc
[z
].n
+=2;
232 for (z
= 0; z
< the_ins
.nfrag
; z
++)
233 the_ins
.fragb
[z
].fragoff
++;
234 the_ins
.opcode
[opcode
->m_codenum
]=w
;
238 /* The numo+1 kludge is so we can hit the low order byte of the prev word.
241 add_fix (width
, exp
, pc_rel
, pc_fix
)
243 struct m68k_exp
*exp
;
247 the_ins
.reloc
[the_ins
.nrel
].n
= (((width
)=='B')
251 : (the_ins
.numo
*2)));
252 the_ins
.reloc
[the_ins
.nrel
].exp
= exp
->exp
;
253 the_ins
.reloc
[the_ins
.nrel
].wid
= width
;
254 the_ins
.reloc
[the_ins
.nrel
].pcrel_fix
= pc_fix
;
255 the_ins
.reloc
[the_ins
.nrel
++].pcrel
= pc_rel
;
258 /* Cause an extra frag to be generated here, inserting up to 10 bytes
259 (that value is chosen in the frag_var call in md_assemble). TYPE
260 is the subtype of the frag to be generated; its primary type is
261 rs_machine_dependent.
263 The TYPE parameter is also used by md_convert_frag_1 and
264 md_estimate_size_before_relax. The appropriate type of fixup will
265 be emitted by md_convert_frag_1.
267 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
269 add_frag(add
,off
,type
)
274 the_ins
.fragb
[the_ins
.nfrag
].fragoff
=the_ins
.numo
;
275 the_ins
.fragb
[the_ins
.nfrag
].fadd
=add
;
276 the_ins
.fragb
[the_ins
.nfrag
].foff
=off
;
277 the_ins
.fragb
[the_ins
.nfrag
++].fragty
=type
;
281 (op (ex) != O_constant && op (ex) != O_big)
283 static char *crack_operand
PARAMS ((char *str
, struct m68k_op
*opP
));
284 static int get_num
PARAMS ((struct m68k_exp
*exp
, int ok
));
285 static int reverse_16_bits
PARAMS ((int in
));
286 static int reverse_8_bits
PARAMS ((int in
));
287 static void install_gen_operand
PARAMS ((int mode
, int val
));
288 static void install_operand
PARAMS ((int mode
, int val
));
289 static void s_bss
PARAMS ((int));
290 static void s_data1
PARAMS ((int));
291 static void s_data2
PARAMS ((int));
292 static void s_even
PARAMS ((int));
293 static void s_proc
PARAMS ((int));
294 static void mri_chip
PARAMS ((void));
295 static void s_chip
PARAMS ((int));
296 static void s_fopt
PARAMS ((int));
297 static void s_opt
PARAMS ((int));
298 static void s_reg
PARAMS ((int));
299 static void s_restore
PARAMS ((int));
300 static void s_save
PARAMS ((int));
301 static void s_mri_if
PARAMS ((int));
302 static void s_mri_else
PARAMS ((int));
303 static void s_mri_endi
PARAMS ((int));
304 static void s_mri_break
PARAMS ((int));
305 static void s_mri_next
PARAMS ((int));
306 static void s_mri_for
PARAMS ((int));
307 static void s_mri_endf
PARAMS ((int));
308 static void s_mri_repeat
PARAMS ((int));
309 static void s_mri_until
PARAMS ((int));
310 static void s_mri_while
PARAMS ((int));
311 static void s_mri_endw
PARAMS ((int));
313 static int current_architecture
;
320 static const struct m68k_cpu archs
[] = {
330 /* Aliases (effectively, so far as gas is concerned) for the above
335 { m68000
, "68ec000" },
336 { m68000
, "68hc000" },
337 { m68000
, "68hc001" },
338 { m68020
, "68ec020" },
339 { m68030
, "68ec030" },
340 { m68040
, "68ec040" },
350 static const int n_archs
= sizeof (archs
) / sizeof (archs
[0]);
352 /* BCC68000 is for patching in an extra jmp instruction for long offsets
353 on the 68000. The 68000 doesn't support long branches with branchs */
355 /* This table desribes how you change sizes for the various types of variable
356 size expressions. This version only supports two kinds. */
358 /* Note that calls to frag_var need to specify the maximum expansion
359 needed; this is currently 10 bytes for DBCC. */
362 How far Forward this mode will reach:
363 How far Backward this mode will reach:
364 How many bytes this mode will add to the size of the frag
365 Which mode to go to if the offset won't fit in this one
367 relax_typeS md_relax_table
[] =
369 {1, 1, 0, 0}, /* First entries aren't used */
370 {1, 1, 0, 0}, /* For no good reason except */
371 {1, 1, 0, 0}, /* that the VAX doesn't either */
374 {(127), (-128), 0, TAB (ABRANCH
, SHORT
)},
375 {(32767), (-32768), 2, TAB (ABRANCH
, LONG
)},
379 {1, 1, 0, 0}, /* FBRANCH doesn't come BYTE */
380 {(32767), (-32768), 2, TAB (FBRANCH
, LONG
)},
384 {1, 1, 0, 0}, /* PCREL doesn't come BYTE */
385 {(32767), (-32768), 2, TAB (PCREL
, LONG
)},
389 {(127), (-128), 0, TAB (BCC68000
, SHORT
)},
390 {(32767), (-32768), 2, TAB (BCC68000
, LONG
)},
391 {0, 0, 6, 0}, /* jmp long space */
394 {1, 1, 0, 0}, /* DBCC doesn't come BYTE */
395 {(32767), (-32768), 2, TAB (DBCC
, LONG
)},
396 {0, 0, 10, 0}, /* bra/jmp long space */
399 {1, 1, 0, 0}, /* PCLEA doesn't come BYTE */
400 {32767, -32768, 2, TAB (PCLEA
, LONG
)},
404 /* For, e.g., jmp pcrel indexed. */
405 {125, -130, 0, TAB (PCINDEX
, SHORT
)},
406 {32765, -32770, 2, TAB (PCINDEX
, LONG
)},
411 /* These are the machine dependent pseudo-ops. These are included so
412 the assembler can work on the output from the SUN C compiler, which
416 /* This table describes all the machine specific pseudo-ops the assembler
417 has to support. The fields are:
418 pseudo-op name without dot
419 function to call to execute this pseudo-op
420 Integer arg to pass to the function
422 const pseudo_typeS md_pseudo_table
[] =
424 {"data1", s_data1
, 0},
425 {"data2", s_data2
, 0},
428 {"skip", s_space
, 0},
431 {"align", s_align_bytes
, 0},
434 {"swbeg", s_ignore
, 0},
437 /* The following pseudo-ops are supported for MRI compatibility. */
439 {"comline", s_space
, 1},
441 {"mask2", s_ignore
, 0},
444 {"restore", s_restore
, 0},
448 {"if.b", s_mri_if
, 'b'},
449 {"if.w", s_mri_if
, 'w'},
450 {"if.l", s_mri_if
, 'l'},
451 {"else", s_mri_else
, 0},
452 {"else.s", s_mri_else
, 's'},
453 {"else.l", s_mri_else
, 'l'},
454 {"endi", s_mri_endi
, 0},
455 {"break", s_mri_break
, 0},
456 {"break.s", s_mri_break
, 's'},
457 {"break.l", s_mri_break
, 'l'},
458 {"next", s_mri_next
, 0},
459 {"next.s", s_mri_next
, 's'},
460 {"next.l", s_mri_next
, 'l'},
461 {"for", s_mri_for
, 0},
462 {"for.b", s_mri_for
, 'b'},
463 {"for.w", s_mri_for
, 'w'},
464 {"for.l", s_mri_for
, 'l'},
465 {"endf", s_mri_endf
, 0},
466 {"repeat", s_mri_repeat
, 0},
467 {"until", s_mri_until
, 0},
468 {"until.b", s_mri_until
, 'b'},
469 {"until.w", s_mri_until
, 'w'},
470 {"until.l", s_mri_until
, 'l'},
471 {"while", s_mri_while
, 0},
472 {"while.b", s_mri_while
, 'b'},
473 {"while.w", s_mri_while
, 'w'},
474 {"while.l", s_mri_while
, 'l'},
475 {"endw", s_mri_endw
, 0},
481 /* The mote pseudo ops are put into the opcode table, since they
482 don't start with a . they look like opcodes to gas.
484 extern void obj_coff_section ();
486 CONST pseudo_typeS mote_pseudo_table
[] =
499 {"xdef", s_globl
, 0},
500 {"align", s_align_ptwo
, 0},
502 {"sect", obj_coff_section
, 0},
503 {"section", obj_coff_section
, 0},
508 #define issbyte(x) ((x)>=-128 && (x)<=127)
509 #define isubyte(x) ((x)>=0 && (x)<=255)
510 #define issword(x) ((x)>=-32768 && (x)<=32767)
511 #define isuword(x) ((x)>=0 && (x)<=65535)
513 #define isbyte(x) ((x)>= -255 && (x)<=255)
514 #define isword(x) ((x)>=-32768 && (x)<=65535)
515 #define islong(x) (1)
517 extern char *input_line_pointer
;
519 static char mklower_table
[256];
520 #define mklower(c) (mklower_table[(unsigned char)(c)])
521 static char notend_table
[256];
522 static char alt_notend_table
[256];
524 (! (notend_table[(unsigned char) *s] \
526 && alt_notend_table[(unsigned char) s[1]])))
528 #if defined (M68KCOFF) && !defined (BFD_ASSEMBLER)
530 #ifdef NO_PCREL_RELOCS
533 make_pcrel_absolute(fixP
, add_number
)
537 register unsigned char *opcode
= fixP
->fx_frag
->fr_opcode
;
539 /* rewrite the PC relative instructions to absolute address ones.
540 * these are rumoured to be faster, and the apollo linker refuses
541 * to deal with the PC relative relocations.
543 if (opcode
[0] == 0x60 && opcode
[1] == 0xff) /* BRA -> JMP */
548 else if (opcode
[0] == 0x61 && opcode
[1] == 0xff) /* BSR -> JSR */
554 as_fatal ("Unknown PC relative instruction");
559 #endif /* NO_PCREL_RELOCS */
562 tc_coff_fix2rtype (fixP
)
565 if (fixP
->fx_tcbit
&& fixP
->fx_size
== 4)
566 return R_RELLONG_NEG
;
567 #ifdef NO_PCREL_RELOCS
568 know (fixP
->fx_pcrel
== 0);
569 return (fixP
->fx_size
== 1 ? R_RELBYTE
570 : fixP
->fx_size
== 2 ? R_DIR16
573 return (fixP
->fx_pcrel
?
574 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
575 fixP
->fx_size
== 2 ? R_PCRWORD
:
577 (fixP
->fx_size
== 1 ? R_RELBYTE
:
578 fixP
->fx_size
== 2 ? R_RELWORD
:
588 tc_gen_reloc (section
, fixp
)
593 bfd_reloc_code_real_type code
;
598 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
599 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
601 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
602 MAP (1, 0, BFD_RELOC_8
);
603 MAP (2, 0, BFD_RELOC_16
);
604 MAP (4, 0, BFD_RELOC_32
);
605 MAP (1, 1, BFD_RELOC_8_PCREL
);
606 MAP (2, 1, BFD_RELOC_16_PCREL
);
607 MAP (4, 1, BFD_RELOC_32_PCREL
);
612 reloc
= (arelent
*) bfd_alloc_by_size_t (stdoutput
, sizeof (arelent
));
614 reloc
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
615 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
617 reloc
->addend
= fixp
->fx_addnumber
;
621 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
622 assert (reloc
->howto
!= 0);
627 #endif /* BFD_ASSEMBLER */
629 /* Handle of the OPCODE hash table. NULL means any use before
630 m68k_ip_begin() will crash. */
631 static struct hash_control
*op_hash
;
633 /* Assemble an m68k instruction. */
640 register struct m68k_op
*opP
;
641 register struct m68k_incant
*opcode
;
642 register const char *s
;
643 register int tmpreg
= 0, baseo
= 0, outro
= 0, nextword
;
644 char *pdot
, *pdotmove
;
645 enum m68k_size siz1
, siz2
;
649 char *crack_operand ();
650 LITTLENUM_TYPE words
[6];
651 LITTLENUM_TYPE
*wordp
;
652 unsigned long ok_arch
= 0;
654 if (*instring
== ' ')
655 instring
++; /* skip leading whitespace */
657 /* Scan up to end of operation-code, which MUST end in end-of-string
658 or exactly 1 space. */
660 for (p
= instring
; *p
!= '\0'; p
++)
670 the_ins
.error
= "No operator";
674 /* p now points to the end of the opcode name, probably whitespace.
675 Make sure the name is null terminated by clobbering the
676 whitespace, look it up in the hash table, then fix it back.
677 Remove a dot, first, since the opcode tables have none. */
680 for (pdotmove
= pdot
; pdotmove
< p
; pdotmove
++)
681 *pdotmove
= pdotmove
[1];
687 opcode
= (struct m68k_incant
*) hash_find (op_hash
, instring
);
692 for (pdotmove
= p
; pdotmove
> pdot
; pdotmove
--)
693 *pdotmove
= pdotmove
[-1];
700 the_ins
.error
= "Unknown operator";
704 /* found a legitimate opcode, start matching operands */
708 if (opcode
->m_operands
== 0)
710 char *old
= input_line_pointer
;
712 input_line_pointer
= p
;
713 /* Ahh - it's a motorola style psuedo op */
714 mote_pseudo_table
[opcode
->m_opnum
].poc_handler
715 (mote_pseudo_table
[opcode
->m_opnum
].poc_val
);
716 input_line_pointer
= old
;
722 if (flag_mri
&& opcode
->m_opnum
== 0)
724 /* In MRI mode, random garbage is allowed after an instruction
725 which accepts no operands. */
726 the_ins
.args
= opcode
->m_operands
;
727 the_ins
.numargs
= opcode
->m_opnum
;
728 the_ins
.numo
= opcode
->m_codenum
;
729 the_ins
.opcode
[0] = getone (opcode
);
730 the_ins
.opcode
[1] = gettwo (opcode
);
734 for (opP
= &the_ins
.operands
[0]; *p
; opP
++)
736 p
= crack_operand (p
, opP
);
740 the_ins
.error
= opP
->error
;
745 opsfound
= opP
- &the_ins
.operands
[0];
747 /* This ugly hack is to support the floating pt opcodes in their
748 standard form. Essentially, we fake a first enty of type COP#1 */
749 if (opcode
->m_operands
[0] == 'I')
753 for (n
= opsfound
; n
> 0; --n
)
754 the_ins
.operands
[n
] = the_ins
.operands
[n
- 1];
756 memset ((char *) (&the_ins
.operands
[0]), '\0',
757 sizeof (the_ins
.operands
[0]));
758 the_ins
.operands
[0].mode
= CONTROL
;
759 the_ins
.operands
[0].reg
= m68k_float_copnum
;
763 /* We've got the operands. Find an opcode that'll accept them */
766 /* If we didn't get the right number of ops, or we have no
767 common model with this pattern then reject this pattern. */
769 if (opsfound
!= opcode
->m_opnum
770 || ((opcode
->m_arch
& current_architecture
) == 0))
773 ok_arch
|= opcode
->m_arch
;
777 for (s
= opcode
->m_operands
, opP
= &the_ins
.operands
[0];
781 /* Warning: this switch is huge! */
782 /* I've tried to organize the cases into this order:
783 non-alpha first, then alpha by letter. Lower-case
784 goes directly before uppercase counterpart. */
785 /* Code with multiple case ...: gets sorted by the lowest
786 case ... it belongs to. I hope this makes sense. */
826 if (opP
->mode
!= IMMED
)
829 && ! isvar (&opP
->disp
)
830 && (opP
->disp
.exp
.X_op
!= O_constant
831 || ! isbyte (opP
->disp
.exp
.X_add_number
)))
834 && ! isvar (&opP
->disp
)
835 && (opP
->disp
.exp
.X_op
!= O_constant
836 || ! isword (opP
->disp
.exp
.X_add_number
)))
842 if (opP
->mode
!= IMMED
)
847 if (opP
->mode
== AREG
848 || opP
->mode
== CONTROL
849 || opP
->mode
== FPREG
850 || opP
->mode
== IMMED
851 || opP
->mode
== REGLST
852 || (opP
->mode
!= ABSL
854 || opP
->reg
== ZPC
)))
859 if (opP
->mode
== CONTROL
860 || opP
->mode
== FPREG
861 || opP
->mode
== REGLST
862 || (opP
->mode
!= ABSL
863 && opP
->mode
!= IMMED
865 || opP
->reg
== ZPC
)))
893 if (opP
->mode
== CONTROL
894 || opP
->mode
== FPREG
895 || opP
->mode
== REGLST
)
900 if (opP
->mode
!= AINC
)
905 if (opP
->mode
!= ADEC
)
955 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
976 case '~': /* For now! (JF FOO is this right?) */
998 if (opP
->mode
!= CONTROL
999 || (opP
->reg
!= TT0
&& opP
->reg
!= TT1
))
1004 if (opP
->mode
!= AREG
)
1009 if (opP
->mode
!= AINDR
)
1014 if (opP
->mode
!= ABSL
1016 && strncmp (instring
, "jbsr", 4) == 0))
1021 if (opP
->mode
!= CONTROL
|| opP
->reg
!= CCR
)
1026 if (opP
->mode
!= DISP
1028 || opP
->reg
> ADDR7
)
1033 if (opP
->mode
!= DREG
)
1038 if (opP
->mode
!= FPREG
)
1043 if (opP
->mode
!= CONTROL
1050 if (opP
->mode
!= CONTROL
1052 || opP
->reg
> last_movec_reg
)
1056 const enum m68k_register
*rp
;
1057 for (rp
= control_regs
; *rp
; rp
++)
1058 if (*rp
== opP
->reg
)
1066 if (opP
->mode
!= IMMED
)
1072 if (opP
->mode
== DREG
1073 || opP
->mode
== AREG
1074 || opP
->mode
== FPREG
)
1083 opP
->mask
= 1 << (opP
->reg
- DATA0
);
1086 opP
->mask
= 1 << (opP
->reg
- ADDR0
+ 8);
1089 opP
->mask
= 1 << (opP
->reg
- FP0
+ 16);
1097 else if (opP
->mode
== CONTROL
)
1106 opP
->mask
= 1 << 24;
1109 opP
->mask
= 1 << 25;
1112 opP
->mask
= 1 << 26;
1121 else if (opP
->mode
== ABSL
1122 && opP
->disp
.size
== SIZE_UNSPEC
1123 && opP
->disp
.exp
.X_op
== O_constant
)
1125 /* This is what the MRI REG pseudo-op generates. */
1127 opP
->mask
= opP
->disp
.exp
.X_add_number
;
1129 else if (opP
->mode
!= REGLST
)
1131 else if (s
[1] == '8' && (opP
->mask
& 0x0ffffff) != 0)
1133 else if (s
[1] == '3' && (opP
->mask
& 0x7000000) != 0)
1138 if (opP
->mode
!= IMMED
)
1140 else if (opP
->disp
.exp
.X_op
!= O_constant
1141 || ! issbyte (opP
->disp
.exp
.X_add_number
))
1143 else if (! m68k_quick
1144 && instring
[3] != 'q'
1145 && instring
[4] != 'q')
1150 if (opP
->mode
!= DREG
&& opP
->mode
!= IMMED
)
1155 if (opP
->mode
!= IMMED
)
1157 else if (opP
->disp
.exp
.X_op
!= O_constant
1158 || opP
->disp
.exp
.X_add_number
< 1
1159 || opP
->disp
.exp
.X_add_number
> 8)
1161 else if (! m68k_quick
1162 && (strncmp (instring
, "add", 3) == 0
1163 || strncmp (instring
, "sub", 3) == 0)
1164 && instring
[3] != 'q')
1169 if (opP
->mode
!= DREG
&& opP
->mode
!= AREG
)
1174 if (opP
->mode
!= AINDR
1175 && (opP
->mode
!= BASE
1177 && opP
->reg
!= ZADDR0
)
1178 || opP
->disp
.exp
.X_op
!= O_absent
1179 || ((opP
->index
.reg
< DATA0
1180 || opP
->index
.reg
> DATA7
)
1181 && (opP
->index
.reg
< ADDR0
1182 || opP
->index
.reg
> ADDR7
))
1183 || opP
->index
.size
!= SIZE_UNSPEC
1184 || opP
->index
.scale
!= 1))
1189 if (opP
->mode
!= CONTROL
1190 || ! (opP
->reg
== FPI
1192 || opP
->reg
== FPC
))
1197 if (opP
->mode
!= CONTROL
|| opP
->reg
!= SR
)
1202 if (opP
->mode
!= IMMED
)
1204 else if (opP
->disp
.exp
.X_op
!= O_constant
1205 || opP
->disp
.exp
.X_add_number
< 0
1206 || opP
->disp
.exp
.X_add_number
> 7)
1211 if (opP
->mode
!= CONTROL
|| opP
->reg
!= USP
)
1215 /* JF these are out of order. We could put them
1216 in order if we were willing to put up with
1217 bunches of #ifdef m68851s in the code.
1219 Don't forget that you need these operands
1220 to use 68030 MMU instructions. */
1222 /* Memory addressing mode used by pflushr */
1224 if (opP
->mode
== CONTROL
1225 || opP
->mode
== FPREG
1226 || opP
->mode
== DREG
1227 || opP
->mode
== AREG
1228 || opP
->mode
== REGLST
)
1230 /* We should accept immediate operands, but they
1231 supposedly have to be quad word, and we don't
1232 handle that. I would like to see what a Motorola
1233 assembler does before doing something here. */
1234 if (opP
->mode
== IMMED
)
1239 if (opP
->mode
!= CONTROL
1240 || (opP
->reg
!= SFC
&& opP
->reg
!= DFC
))
1245 if (opP
->mode
!= CONTROL
|| opP
->reg
!= TC
)
1250 if (opP
->mode
!= CONTROL
|| opP
->reg
!= AC
)
1255 if (opP
->mode
!= CONTROL
1258 && opP
->reg
!= SCC
))
1263 if (opP
->mode
!= CONTROL
1269 if (opP
->mode
!= CONTROL
1272 && opP
->reg
!= CRP
))
1277 if (opP
->mode
!= CONTROL
1278 || (!(opP
->reg
>= BAD
&& opP
->reg
<= BAD
+ 7)
1279 && !(opP
->reg
>= BAC
&& opP
->reg
<= BAC
+ 7)))
1284 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PSR
)
1289 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PCSR
)
1294 if (opP
->mode
!= CONTROL
1301 } /* not a cache specifier. */
1305 if (opP
->mode
!= ABSL
)
1311 } /* switch on type of operand */
1315 } /* for each operand */
1316 } /* if immediately wrong */
1323 opcode
= opcode
->m_next
;
1328 && !(ok_arch
& current_architecture
))
1333 "invalid instruction for this architecture; needs ");
1334 cp
= buf
+ strlen (buf
);
1338 strcpy (cp
, "fpu (68040, 68060 or 68881/68882)");
1341 strcpy (cp
, "mmu (68030 or 68851)");
1344 strcpy (cp
, "68020 or higher");
1347 strcpy (cp
, "68000 or higher");
1350 strcpy (cp
, "68010 or higher");
1354 int got_one
= 0, idx
;
1355 for (idx
= 0; idx
< sizeof (archs
) / sizeof (archs
[0]);
1358 if (archs
[idx
].arch
& ok_arch
)
1362 strcpy (cp
, " or ");
1366 strcpy (cp
, archs
[idx
].name
);
1378 the_ins
.error
= "operands mismatch";
1380 } /* Fell off the end */
1385 /* now assemble it */
1387 the_ins
.args
= opcode
->m_operands
;
1388 the_ins
.numargs
= opcode
->m_opnum
;
1389 the_ins
.numo
= opcode
->m_codenum
;
1390 the_ins
.opcode
[0] = getone (opcode
);
1391 the_ins
.opcode
[1] = gettwo (opcode
);
1393 for (s
= the_ins
.args
, opP
= &the_ins
.operands
[0]; *s
; s
+= 2, opP
++)
1395 /* This switch is a doozy.
1396 Watch the first step; its a big one! */
1417 tmpreg
= 0x3c; /* 7.4 */
1418 if (strchr ("bwl", s
[1]))
1419 nextword
= get_num (&opP
->disp
, 80);
1421 nextword
= get_num (&opP
->disp
, 0);
1422 if (isvar (&opP
->disp
))
1423 add_fix (s
[1], &opP
->disp
, 0, 0);
1427 if (!isbyte (nextword
))
1428 opP
->error
= "operand out of range";
1433 if (!isword (nextword
))
1434 opP
->error
= "operand out of range";
1439 addword (nextword
>> 16);
1466 /* We gotta put out some float */
1467 if (op (&opP
->disp
) != O_big
)
1472 /* Can other cases happen here? */
1473 if (op (&opP
->disp
) != O_constant
)
1476 val
= (valueT
) offs (&opP
->disp
);
1480 generic_bignum
[gencnt
] = (LITTLENUM_TYPE
) val
;
1481 val
>>= LITTLENUM_NUMBER_OF_BITS
;
1485 offs (&opP
->disp
) = gencnt
;
1487 if (offs (&opP
->disp
) > 0)
1489 if (offs (&opP
->disp
) > baseo
)
1491 as_warn ("Bignum too big for %c format; truncated",
1493 offs (&opP
->disp
) = baseo
;
1495 baseo
-= offs (&opP
->disp
);
1498 for (wordp
= generic_bignum
+ offs (&opP
->disp
) - 1;
1499 offs (&opP
->disp
)--;
1504 gen_to_words (words
, baseo
, (long) outro
);
1505 for (wordp
= words
; baseo
--; wordp
++)
1509 tmpreg
= opP
->reg
- DATA
; /* 0.dreg */
1512 tmpreg
= 0x08 + opP
->reg
- ADDR
; /* 1.areg */
1515 tmpreg
= 0x10 + opP
->reg
- ADDR
; /* 2.areg */
1518 tmpreg
= 0x20 + opP
->reg
- ADDR
; /* 4.areg */
1521 tmpreg
= 0x18 + opP
->reg
- ADDR
; /* 3.areg */
1525 nextword
= get_num (&opP
->disp
, 80);
1528 && ! isvar (&opP
->disp
)
1531 opP
->disp
.exp
.X_op
= O_symbol
;
1532 #ifndef BFD_ASSEMBLER
1533 opP
->disp
.exp
.X_add_symbol
= &abs_symbol
;
1535 opP
->disp
.exp
.X_add_symbol
=
1536 section_symbol (absolute_section
);
1540 /* Force into index mode. Hope this works */
1542 /* We do the first bit for 32-bit displacements, and the
1543 second bit for 16 bit ones. It is possible that we
1544 should make the default be WORD instead of LONG, but
1545 I think that'd break GCC, so we put up with a little
1546 inefficiency for the sake of working output. */
1548 if (!issword (nextword
)
1549 || (isvar (&opP
->disp
)
1550 && ((opP
->disp
.size
== SIZE_UNSPEC
1551 && flag_short_refs
== 0
1552 && cpu_of_arch (current_architecture
) >= m68020
)
1553 || opP
->disp
.size
== SIZE_LONG
)))
1556 tmpreg
= 0x3B; /* 7.3 */
1558 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
1559 if (isvar (&opP
->disp
))
1565 add_fix ('l', &opP
->disp
, 1, 2);
1566 addword (0), addword (0);
1568 add_frag (adds (&opP
->disp
),
1570 TAB (PCLEA
, SZ_UNDEF
));
1577 add_fix ('l', &opP
->disp
, 0, 0);
1582 addword (nextword
>> 16);
1587 tmpreg
= 0x3A; /* 7.2 */
1589 tmpreg
= 0x28 + opP
->reg
- ADDR
; /* 5.areg */
1591 if (isvar (&opP
->disp
))
1595 add_fix ('w', &opP
->disp
, 1, 0);
1598 add_fix ('w', &opP
->disp
, 0, 0);
1608 baseo
= get_num (&opP
->disp
, 80);
1609 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
1610 outro
= get_num (&opP
->odisp
, 80);
1611 /* Figure out the `addressing mode'.
1612 Also turn on the BASE_DISABLE bit, if needed. */
1613 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1615 tmpreg
= 0x3b; /* 7.3 */
1616 if (opP
->reg
== ZPC
)
1619 else if (opP
->reg
== 0)
1622 tmpreg
= 0x30; /* 6.garbage */
1624 else if (opP
->reg
>= ZADDR0
&& opP
->reg
<= ZADDR7
)
1627 tmpreg
= 0x30 + opP
->reg
- ZADDR0
;
1630 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
1632 siz1
= opP
->disp
.size
;
1633 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
1634 siz2
= opP
->odisp
.size
;
1638 /* Index register stuff */
1639 if (opP
->index
.reg
!= 0
1640 && opP
->index
.reg
>= DATA
1641 && opP
->index
.reg
<= ADDR7
)
1643 nextword
|= (opP
->index
.reg
- DATA
) << 12;
1645 if (opP
->index
.size
== SIZE_UNSPEC
1646 || opP
->index
.size
== SIZE_LONG
)
1649 if (cpu_of_arch (current_architecture
) < m68020
)
1651 if (opP
->index
.scale
!= 1)
1654 "scale factor invalid on this architecture; needs 68020 or higher";
1658 switch (opP
->index
.scale
)
1675 GET US OUT OF HERE! */
1677 /* Must be INDEX, with an index register. Address
1678 register cannot be ZERO-PC, and either :b was
1679 forced, or we know it will fit. For a 68000 or
1680 68010, force this mode anyways, because the
1681 larger modes aren't supported. */
1682 if (opP
->mode
== BASE
1683 && ((opP
->reg
>= ADDR0
1684 && opP
->reg
<= ADDR7
)
1687 if (siz1
== SIZE_BYTE
1688 || cpu_of_arch (current_architecture
) < m68020
1689 || (siz1
== SIZE_UNSPEC
1690 && ! isvar (&opP
->disp
)
1691 && issbyte (baseo
)))
1693 nextword
+= baseo
& 0xff;
1695 if (isvar (&opP
->disp
))
1697 /* Do a byte relocation. If it doesn't
1698 fit (possible on m68000) let the
1699 fixup processing complain later. */
1701 add_fix ('B', &opP
->disp
, 1, 1);
1703 add_fix ('B', &opP
->disp
, 0, 0);
1705 else if (siz1
!= SIZE_BYTE
)
1707 if (siz1
!= SIZE_UNSPEC
)
1708 as_warn ("Forcing byte displacement");
1709 if (! issbyte (baseo
))
1710 opP
->error
= "byte displacement out of range";
1715 else if (siz1
== SIZE_UNSPEC
1717 && isvar (&opP
->disp
)
1718 && subs (&opP
->disp
) == NULL
)
1720 nextword
+= baseo
& 0xff;
1722 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
1723 TAB (PCINDEX
, SZ_UNDEF
));
1731 nextword
|= 0x40; /* No index reg */
1732 if (opP
->index
.reg
>= ZDATA0
1733 && opP
->index
.reg
<= ZDATA7
)
1734 nextword
|= (opP
->index
.reg
- ZDATA0
) << 12;
1735 else if (opP
->index
.reg
>= ZADDR0
1736 || opP
->index
.reg
<= ZADDR7
)
1737 nextword
|= (opP
->index
.reg
- ZADDR0
+ 8) << 12;
1740 /* It isn't simple. */
1742 if (cpu_of_arch (current_architecture
) < m68020
)
1744 "invalid operand mode for this architecture; needs 68020 or higher";
1747 /* If the guy specified a width, we assume that it is
1748 wide enough. Maybe it isn't. If so, we lose. */
1752 if (isvar (&opP
->disp
)
1754 : ! issword (baseo
))
1759 else if (! isvar (&opP
->disp
) && baseo
== 0)
1768 as_warn (":b not permitted; defaulting to :w");
1778 /* Figure out innner displacement stuff */
1779 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
1784 if (isvar (&opP
->odisp
)
1786 : ! issword (outro
))
1791 else if (! isvar (&opP
->odisp
) && outro
== 0)
1800 as_warn (":b not permitted; defaulting to :w");
1809 if (opP
->mode
== POST
1810 && (nextword
& 0x40) == 0)
1815 if (siz1
!= SIZE_UNSPEC
&& isvar (&opP
->disp
))
1817 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1818 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 1, 2);
1820 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 0, 0);
1822 if (siz1
== SIZE_LONG
)
1823 addword (baseo
>> 16);
1824 if (siz1
!= SIZE_UNSPEC
)
1827 if (siz2
!= SIZE_UNSPEC
&& isvar (&opP
->odisp
))
1828 add_fix (siz2
== SIZE_LONG
? 'l' : 'w', &opP
->odisp
, 0, 0);
1829 if (siz2
== SIZE_LONG
)
1830 addword (outro
>> 16);
1831 if (siz2
!= SIZE_UNSPEC
)
1837 nextword
= get_num (&opP
->disp
, 80);
1838 switch (opP
->disp
.size
)
1843 if (!isvar (&opP
->disp
) && issword (offs (&opP
->disp
)))
1845 tmpreg
= 0x38; /* 7.0 */
1849 /* Don't generate pc relative code on 68010 and
1851 if (isvar (&opP
->disp
)
1852 && !subs (&opP
->disp
)
1853 && adds (&opP
->disp
)
1854 && S_GET_SEGMENT (adds (&opP
->disp
)) == now_seg
1855 && cpu_of_arch (current_architecture
) >= m68020
1857 && !strchr ("~%&$?", s
[0]))
1859 tmpreg
= 0x3A; /* 7.2 */
1860 add_frag (adds (&opP
->disp
),
1862 TAB (PCREL
, SZ_UNDEF
));
1865 /* Fall through into long */
1867 if (isvar (&opP
->disp
))
1868 add_fix ('l', &opP
->disp
, 0, 0);
1870 tmpreg
= 0x39;/* 7.1 mode */
1871 addword (nextword
>> 16);
1875 case SIZE_WORD
: /* Word */
1876 if (isvar (&opP
->disp
))
1877 add_fix ('w', &opP
->disp
, 0, 0);
1879 tmpreg
= 0x38;/* 7.0 mode */
1887 as_bad ("unknown/incorrect operand");
1890 install_gen_operand (s
[1], tmpreg
);
1896 { /* JF: I hate floating point! */
1911 tmpreg
= get_num (&opP
->disp
, tmpreg
);
1912 if (isvar (&opP
->disp
))
1913 add_fix (s
[1], &opP
->disp
, 0, 0);
1916 case 'b': /* Danger: These do no check for
1917 certain types of overflow.
1919 if (!isbyte (tmpreg
))
1920 opP
->error
= "out of range";
1921 insop (tmpreg
, opcode
);
1922 if (isvar (&opP
->disp
))
1923 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
1926 if (!isword (tmpreg
))
1927 opP
->error
= "out of range";
1928 insop (tmpreg
, opcode
);
1929 if (isvar (&opP
->disp
))
1930 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
1933 /* Because of the way insop works, we put these two out
1935 insop (tmpreg
, opcode
);
1936 insop (tmpreg
>> 16, opcode
);
1937 if (isvar (&opP
->disp
))
1938 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
1944 install_operand (s
[1], tmpreg
);
1955 install_operand (s
[1], opP
->reg
- ADDR
);
1959 tmpreg
= get_num (&opP
->disp
, 80);
1963 /* The pc_fix argument winds up in fx_pcrel_adjust,
1964 which is a char, and may therefore be unsigned. We
1965 want to pass -1, but we pass 64 instead, and convert
1966 back in md_pcrel_from. */
1967 add_fix ('B', &opP
->disp
, 1, 64);
1970 add_fix ('w', &opP
->disp
, 1, 0);
1975 if (cpu_of_arch (current_architecture
) < m68020
)
1976 as_warn ("Can't use long branches on 68000/68010");
1977 the_ins
.opcode
[the_ins
.numo
- 1] |= 0xff;
1978 add_fix ('l', &opP
->disp
, 1, 0);
1983 if (subs (&opP
->disp
)) /* We can't relax it */
1986 /* This could either be a symbol, or an absolute
1987 address. No matter, the frag hacking will finger it
1988 out. Not quite: it can't switch from BRANCH to
1989 BCC68000 for the case where opnd is absolute (it
1990 needs to use the 68000 hack since no conditional abs
1992 if (((cpu_of_arch (current_architecture
) < m68020
)
1993 || (0 == adds (&opP
->disp
)))
1994 && (the_ins
.opcode
[0] >= 0x6200)
1995 && (the_ins
.opcode
[0] <= 0x6f00))
1996 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
1997 TAB (BCC68000
, SZ_UNDEF
));
1999 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2000 TAB (ABRANCH
, SZ_UNDEF
));
2003 if (isvar (&opP
->disp
))
2006 /* check for DBcc instruction */
2007 if ((the_ins
.opcode
[0] & 0xf0f8) == 0x50c8)
2009 /* size varies if patch */
2010 /* needed for long form */
2011 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2012 TAB (DBCC
, SZ_UNDEF
));
2016 add_fix ('w', &opP
->disp
, 1, 0);
2020 case 'C': /* Fixed size LONG coproc branches */
2021 add_fix ('l', &opP
->disp
, 1, 0);
2025 case 'c': /* Var size Coprocesssor branches */
2026 if (subs (&opP
->disp
))
2028 add_fix ('l', &opP
->disp
, 1, 0);
2029 add_frag ((symbolS
*) 0, (long) 0, TAB (FBRANCH
, LONG
));
2031 else if (adds (&opP
->disp
))
2032 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2033 TAB (FBRANCH
, SZ_UNDEF
));
2036 /* add_frag((symbolS *) 0, offs(&opP->disp),
2037 TAB(FBRANCH,SHORT)); */
2038 the_ins
.opcode
[the_ins
.numo
- 1] |= 0x40;
2039 add_fix ('l', &opP
->disp
, 1, 0);
2049 case 'C': /* Ignore it */
2052 case 'd': /* JF this is a kludge */
2053 install_operand ('s', opP
->reg
- ADDR
);
2054 tmpreg
= get_num (&opP
->disp
, 80);
2055 if (!issword (tmpreg
))
2057 as_warn ("Expression out of range, using 0");
2064 install_operand (s
[1], opP
->reg
- DATA
);
2068 install_operand (s
[1], opP
->reg
- FP0
);
2072 tmpreg
= opP
->reg
- COP0
;
2073 install_operand (s
[1], tmpreg
);
2076 case 'J': /* JF foo */
2137 install_operand (s
[1], tmpreg
);
2141 tmpreg
= get_num (&opP
->disp
, 55);
2142 install_operand (s
[1], tmpreg
& 0x7f);
2149 if (tmpreg
& 0x7FF0000)
2150 as_bad ("Floating point register in register list");
2151 insop (reverse_16_bits (tmpreg
), opcode
);
2155 if (tmpreg
& 0x700FFFF)
2156 as_bad ("Wrong register in floating-point reglist");
2157 install_operand (s
[1], reverse_8_bits (tmpreg
>> 16));
2165 if (tmpreg
& 0x7FF0000)
2166 as_bad ("Floating point register in register list");
2167 insop (tmpreg
, opcode
);
2169 else if (s
[1] == '8')
2171 if (tmpreg
& 0x0FFFFFF)
2172 as_bad ("incorrect register in reglist");
2173 install_operand (s
[1], tmpreg
>> 24);
2177 if (tmpreg
& 0x700FFFF)
2178 as_bad ("wrong register in floating-point reglist");
2180 install_operand (s
[1], tmpreg
>> 16);
2185 install_operand (s
[1], get_num (&opP
->disp
, 60));
2189 tmpreg
= ((opP
->mode
== DREG
)
2190 ? 0x20 + opP
->reg
- DATA
2191 : (get_num (&opP
->disp
, 40) & 0x1F));
2192 install_operand (s
[1], tmpreg
);
2196 tmpreg
= get_num (&opP
->disp
, 10);
2199 install_operand (s
[1], tmpreg
);
2203 /* This depends on the fact that ADDR registers are eight
2204 more than their corresponding DATA regs, so the result
2205 will have the ADDR_REG bit set */
2206 install_operand (s
[1], opP
->reg
- DATA
);
2210 if (opP
->mode
== AINDR
)
2211 install_operand (s
[1], opP
->reg
- DATA
);
2213 install_operand (s
[1], opP
->index
.reg
- DATA
);
2217 if (opP
->reg
== FPI
)
2219 else if (opP
->reg
== FPS
)
2221 else if (opP
->reg
== FPC
)
2225 install_operand (s
[1], tmpreg
);
2228 case 'S': /* Ignore it */
2232 install_operand (s
[1], get_num (&opP
->disp
, 30));
2235 case 'U': /* Ignore it */
2254 as_fatal ("failed sanity check");
2255 } /* switch on cache token */
2256 install_operand (s
[1], tmpreg
);
2259 /* JF: These are out of order, I fear. */
2272 install_operand (s
[1], tmpreg
);
2298 install_operand (s
[1], tmpreg
);
2302 if (opP
->reg
== VAL
)
2321 install_operand (s
[1], tmpreg
);
2335 tmpreg
= (4 << 10) | ((opP
->reg
- BAD
) << 2);
2346 tmpreg
= (5 << 10) | ((opP
->reg
- BAC
) << 2);
2352 install_operand (s
[1], tmpreg
);
2355 know (opP
->reg
== PSR
);
2358 know (opP
->reg
== PCSR
);
2373 install_operand (s
[1], tmpreg
);
2376 tmpreg
= get_num (&opP
->disp
, 20);
2377 install_operand (s
[1], tmpreg
);
2379 case '_': /* used only for move16 absolute 32-bit address */
2380 tmpreg
= get_num (&opP
->disp
, 80);
2381 addword (tmpreg
>> 16);
2382 addword (tmpreg
& 0xFFFF);
2389 /* By the time whe get here (FINALLY) the_ins contains the complete
2390 instruction, ready to be emitted. . . */
2394 reverse_16_bits (in
)
2400 static int mask
[16] =
2402 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
2403 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000
2405 for (n
= 0; n
< 16; n
++)
2408 out
|= mask
[15 - n
];
2411 } /* reverse_16_bits() */
2420 static int mask
[8] =
2422 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
2425 for (n
= 0; n
< 8; n
++)
2431 } /* reverse_8_bits() */
2433 /* Cause an extra frag to be generated here, inserting up to 10 bytes
2434 (that value is chosen in the frag_var call in md_assemble). TYPE
2435 is the subtype of the frag to be generated; its primary type is
2436 rs_machine_dependent.
2438 The TYPE parameter is also used by md_convert_frag_1 and
2439 md_estimate_size_before_relax. The appropriate type of fixup will
2440 be emitted by md_convert_frag_1.
2442 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
2444 install_operand (mode
, val
)
2451 the_ins
.opcode
[0] |= val
& 0xFF; /* JF FF is for M kludge */
2454 the_ins
.opcode
[0] |= val
<< 9;
2457 the_ins
.opcode
[1] |= val
<< 12;
2460 the_ins
.opcode
[1] |= val
<< 6;
2463 the_ins
.opcode
[1] |= val
;
2466 the_ins
.opcode
[2] |= val
<< 12;
2469 the_ins
.opcode
[2] |= val
<< 6;
2472 /* DANGER! This is a hack to force cas2l and cas2w cmds to be
2473 three words long! */
2475 the_ins
.opcode
[2] |= val
;
2478 the_ins
.opcode
[1] |= val
<< 7;
2481 the_ins
.opcode
[1] |= val
<< 10;
2485 the_ins
.opcode
[1] |= val
<< 5;
2490 the_ins
.opcode
[1] |= (val
<< 10) | (val
<< 7);
2493 the_ins
.opcode
[1] |= (val
<< 12) | val
;
2496 the_ins
.opcode
[0] |= val
= 0xff;
2499 the_ins
.opcode
[0] |= val
<< 9;
2502 the_ins
.opcode
[1] |= val
;
2505 the_ins
.opcode
[1] |= val
;
2506 the_ins
.numo
++; /* What a hack */
2509 the_ins
.opcode
[1] |= val
<< 4;
2516 the_ins
.opcode
[0] |= (val
<< 6);
2519 the_ins
.opcode
[1] = (val
>> 16);
2520 the_ins
.opcode
[2] = val
& 0xffff;
2524 as_fatal ("failed sanity check.");
2526 } /* install_operand() */
2529 install_gen_operand (mode
, val
)
2536 the_ins
.opcode
[0] |= val
;
2539 /* This is a kludge!!! */
2540 the_ins
.opcode
[0] |= (val
& 0x07) << 9 | (val
& 0x38) << 3;
2549 the_ins
.opcode
[0] |= val
;
2551 /* more stuff goes here */
2553 as_fatal ("failed sanity check.");
2555 } /* install_gen_operand() */
2558 * verify that we have some number of paren pairs, do m68k_ip_op(), and
2559 * then deal with the bitfield hack.
2563 crack_operand (str
, opP
)
2565 register struct m68k_op
*opP
;
2567 register int parens
;
2569 register char *beg_str
;
2577 for (parens
= 0; *str
&& (parens
> 0 || inquote
|| notend (str
)); str
++)
2583 else if (*str
== ')')
2587 opP
->error
= "Extra )";
2593 if (flag_mri
&& *str
== '\'')
2594 inquote
= ! inquote
;
2596 if (!*str
&& parens
)
2598 opP
->error
= "Missing )";
2603 if (m68k_ip_op (beg_str
, opP
) != 0)
2610 c
= *++str
; /* JF bitfield hack */
2615 as_bad ("Missing operand");
2620 /* This is the guts of the machine-dependent assembler. STR points to a
2621 machine dependent instruction. This function is supposed to emit
2622 the frags/bytes it assembles to.
2626 insert_reg (regname
, regnum
)
2633 #ifdef REGISTER_PREFIX
2634 if (!flag_reg_prefix_optional
)
2636 buf
[0] = REGISTER_PREFIX
;
2637 strcpy (buf
+ 1, regname
);
2642 symbol_table_insert (symbol_new (regname
, reg_section
, regnum
,
2643 &zero_address_frag
));
2645 for (i
= 0; regname
[i
]; i
++)
2646 buf
[i
] = islower (regname
[i
]) ? toupper (regname
[i
]) : regname
[i
];
2649 symbol_table_insert (symbol_new (buf
, reg_section
, regnum
,
2650 &zero_address_frag
));
2659 static const struct init_entry init_table
[] =
2769 /* 68ec030 versions of same */
2772 /* 68ec030 access control unit, identical to 030 MMU status reg */
2775 /* Suppressed data and address registers. */
2800 for (i
= 0; init_table
[i
].name
; i
++)
2801 insert_reg (init_table
[i
].name
, init_table
[i
].number
);
2804 static int no_68851
, no_68881
;
2807 /* a.out machine type. Default to 68020. */
2808 int m68k_aout_machtype
= 2;
2820 int shorts_this_frag
;
2823 /* In MRI mode, the instruction and operands are separated by a
2824 space. Anything following the operands is a comment. The label
2825 has already been removed. */
2833 for (s
= str
; *s
!= '\0'; s
++)
2835 if ((*s
== ' ' || *s
== '\t') && ! inquote
)
2853 inquote
= ! inquote
;
2858 memset ((char *) (&the_ins
), '\0', sizeof (the_ins
));
2863 for (n
= 0; n
< the_ins
.numargs
; n
++)
2864 if (the_ins
.operands
[n
].error
)
2866 er
= the_ins
.operands
[n
].error
;
2872 as_bad ("%s -- statement `%s' ignored", er
, str
);
2876 if (the_ins
.nfrag
== 0)
2878 /* No frag hacking involved; just put it out */
2879 toP
= frag_more (2 * the_ins
.numo
);
2880 fromP
= &the_ins
.opcode
[0];
2881 for (m
= the_ins
.numo
; m
; --m
)
2883 md_number_to_chars (toP
, (long) (*fromP
), 2);
2887 /* put out symbol-dependent info */
2888 for (m
= 0; m
< the_ins
.nrel
; m
++)
2890 switch (the_ins
.reloc
[m
].wid
)
2908 as_fatal ("Don't know how to figure width of %c in md_assemble()",
2909 the_ins
.reloc
[m
].wid
);
2912 fixP
= fix_new_exp (frag_now
,
2913 ((toP
- frag_now
->fr_literal
)
2914 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
2916 &the_ins
.reloc
[m
].exp
,
2917 the_ins
.reloc
[m
].pcrel
,
2919 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
2924 /* There's some frag hacking */
2925 for (n
= 0, fromP
= &the_ins
.opcode
[0]; n
< the_ins
.nfrag
; n
++)
2930 wid
= 2 * the_ins
.fragb
[n
].fragoff
;
2932 wid
= 2 * (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
2933 toP
= frag_more (wid
);
2935 shorts_this_frag
= 0;
2936 for (m
= wid
/ 2; m
; --m
)
2938 md_number_to_chars (toP
, (long) (*fromP
), 2);
2943 for (m
= 0; m
< the_ins
.nrel
; m
++)
2945 if ((the_ins
.reloc
[m
].n
) >= 2 * shorts_this_frag
)
2947 the_ins
.reloc
[m
].n
-= 2 * shorts_this_frag
;
2950 wid
= the_ins
.reloc
[m
].wid
;
2953 the_ins
.reloc
[m
].wid
= 0;
2954 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
2956 fixP
= fix_new_exp (frag_now
,
2957 ((toP
- frag_now
->fr_literal
)
2958 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
2960 &the_ins
.reloc
[m
].exp
,
2961 the_ins
.reloc
[m
].pcrel
,
2963 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
2965 (void) frag_var (rs_machine_dependent
, 10, 0,
2966 (relax_substateT
) (the_ins
.fragb
[n
].fragty
),
2967 the_ins
.fragb
[n
].fadd
, the_ins
.fragb
[n
].foff
, to_beg_P
);
2969 n
= (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
2970 shorts_this_frag
= 0;
2973 toP
= frag_more (n
* sizeof (short));
2976 md_number_to_chars (toP
, (long) (*fromP
), 2);
2982 for (m
= 0; m
< the_ins
.nrel
; m
++)
2986 wid
= the_ins
.reloc
[m
].wid
;
2989 the_ins
.reloc
[m
].wid
= 0;
2990 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
2992 fixP
= fix_new_exp (frag_now
,
2993 ((the_ins
.reloc
[m
].n
+ toP
- frag_now
->fr_literal
)
2994 - shorts_this_frag
* 2),
2996 &the_ins
.reloc
[m
].exp
,
2997 the_ins
.reloc
[m
].pcrel
,
2999 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3007 * md_begin -- set up hash tables with 68000 instructions.
3008 * similar to what the vax assembler does. ---phr
3010 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
3011 a copy of it at runtime, adding in the information we want but isn't
3012 there. I think it'd be better to have an awk script hack the table
3013 at compile time. Or even just xstr the table and use it as-is. But
3014 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
3017 register const struct m68k_opcode
*ins
;
3018 register struct m68k_incant
*hack
, *slak
;
3019 register const char *retval
= 0; /* empty string, or error msg text */
3020 register unsigned int i
;
3025 flag_reg_prefix_optional
= 1;
3030 op_hash
= hash_new ();
3032 obstack_begin (&robyn
, 4000);
3033 for (i
= 0; i
< m68k_numopcodes
; i
++)
3035 hack
= slak
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3038 ins
= &m68k_opcodes
[i
];
3039 /* We *could* ignore insns that don't match our arch here
3040 but just leaving them out of the hash. */
3041 slak
->m_operands
= ins
->args
;
3042 slak
->m_opnum
= strlen (slak
->m_operands
) / 2;
3043 slak
->m_arch
= ins
->arch
;
3044 slak
->m_opcode
= ins
->opcode
;
3045 /* This is kludgey */
3046 slak
->m_codenum
= ((ins
->match
) & 0xffffL
) ? 2 : 1;
3047 if (i
+ 1 != m68k_numopcodes
3048 && !strcmp (ins
->name
, m68k_opcodes
[i
+ 1].name
))
3050 slak
->m_next
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3055 slak
= slak
->m_next
;
3059 retval
= hash_insert (op_hash
, ins
->name
, (char *) hack
);
3061 as_fatal ("Internal Error: Can't hash %s: %s", ins
->name
, retval
);
3064 for (i
= 0; i
< m68k_numaliases
; i
++)
3066 const char *name
= m68k_opcode_aliases
[i
].primary
;
3067 const char *alias
= m68k_opcode_aliases
[i
].alias
;
3068 PTR val
= hash_find (op_hash
, name
);
3070 as_fatal ("Internal Error: Can't find %s in hash table", name
);
3071 retval
= hash_insert (op_hash
, alias
, val
);
3073 as_fatal ("Internal Error: Can't hash %s: %s", alias
, retval
);
3076 /* In MRI mode, all unsized branches are variable sized. Normally,
3077 they are word sized. */
3080 static struct m68k_opcode_alias mri_aliases
[] =
3100 for (i
= 0; i
< sizeof mri_aliases
/ sizeof mri_aliases
[0]; i
++)
3102 const char *name
= mri_aliases
[i
].primary
;
3103 const char *alias
= mri_aliases
[i
].alias
;
3104 PTR val
= hash_find (op_hash
, name
);
3106 as_fatal ("Internal Error: Can't find %s in hash table", name
);
3107 retval
= hash_jam (op_hash
, alias
, val
);
3109 as_fatal ("Internal Error: Can't hash %s: %s", alias
, retval
);
3113 for (i
= 0; i
< sizeof (mklower_table
); i
++)
3114 mklower_table
[i
] = (isupper (c
= (char) i
)) ? tolower (c
) : c
;
3116 for (i
= 0; i
< sizeof (notend_table
); i
++)
3118 notend_table
[i
] = 0;
3119 alt_notend_table
[i
] = 0;
3121 notend_table
[','] = 1;
3122 notend_table
['{'] = 1;
3123 notend_table
['}'] = 1;
3124 alt_notend_table
['a'] = 1;
3125 alt_notend_table
['A'] = 1;
3126 alt_notend_table
['d'] = 1;
3127 alt_notend_table
['D'] = 1;
3128 alt_notend_table
['#'] = 1;
3129 alt_notend_table
['&'] = 1;
3130 alt_notend_table
['f'] = 1;
3131 alt_notend_table
['F'] = 1;
3132 #ifdef REGISTER_PREFIX
3133 alt_notend_table
[REGISTER_PREFIX
] = 1;
3136 /* We need to put '(' in alt_notend_table to handle
3137 cas2 %d0:%d2,%d3:%d4,(%a0):(%a1)
3139 alt_notend_table
['('] = 1;
3141 /* We need to put '@' in alt_notend_table to handle
3142 cas2 %d0:%d2,%d3:%d4,@(%d0):@(%d1)
3144 alt_notend_table
['@'] = 1;
3146 #ifndef MIT_SYNTAX_ONLY
3147 /* Insert pseudo ops, these have to go into the opcode table since
3148 gas expects pseudo ops to start with a dot */
3151 while (mote_pseudo_table
[n
].poc_name
)
3153 hack
= (struct m68k_incant
*)
3154 obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3155 hash_insert (op_hash
,
3156 mote_pseudo_table
[n
].poc_name
, (char *) hack
);
3157 hack
->m_operands
= 0;
3168 m68k_init_after_args ()
3170 if (cpu_of_arch (current_architecture
) == 0)
3173 const char *default_cpu
= TARGET_CPU
;
3175 if (*default_cpu
== 'm')
3177 for (i
= 0; i
< n_archs
; i
++)
3178 if (strcasecmp (default_cpu
, archs
[i
].name
) == 0)
3182 as_bad ("unrecognized default cpu `%s' ???", TARGET_CPU
);
3183 current_architecture
|= m68020
;
3186 current_architecture
|= archs
[i
].arch
;
3188 /* Permit m68881 specification with all cpus; those that can't work
3189 with a coprocessor could be doing emulation. */
3190 if (current_architecture
& m68851
)
3192 if (current_architecture
& m68040
)
3194 as_warn ("68040 and 68851 specified; mmu instructions may assemble incorrectly");
3197 /* What other incompatibilities could we check for? */
3199 /* Toss in some default assumptions about coprocessors. */
3201 && (cpu_of_arch (current_architecture
)
3202 /* Can CPU32 have a 68881 coprocessor?? */
3203 & (m68020
| m68030
| cpu32
)))
3205 current_architecture
|= m68881
;
3208 && (cpu_of_arch (current_architecture
) & m68020up
) != 0
3209 && (cpu_of_arch (current_architecture
) & m68040up
) == 0)
3211 current_architecture
|= m68851
;
3213 if (no_68881
&& (current_architecture
& m68881
))
3214 as_bad ("options for 68881 and no-68881 both given");
3215 if (no_68851
&& (current_architecture
& m68851
))
3216 as_bad ("options for 68851 and no-68851 both given");
3219 /* Work out the magic number. This isn't very general. */
3220 if (current_architecture
& m68000
)
3221 m68k_aout_machtype
= 0;
3222 else if (current_architecture
& m68010
)
3223 m68k_aout_machtype
= 1;
3224 else if (current_architecture
& m68020
)
3225 m68k_aout_machtype
= 2;
3227 m68k_aout_machtype
= 2;
3230 /* Note which set of "movec" control registers is available. */
3231 switch (cpu_of_arch (current_architecture
))
3234 control_regs
= m68000_control_regs
;
3237 control_regs
= m68010_control_regs
;
3241 control_regs
= m68020_control_regs
;
3244 control_regs
= m68040_control_regs
;
3247 control_regs
= m68060_control_regs
;
3250 control_regs
= cpu32_control_regs
;
3256 if (cpu_of_arch (current_architecture
) < m68020
)
3257 md_relax_table
[TAB (PCINDEX
, BYTE
)].rlx_more
= 0;
3260 /* Equal to MAX_PRECISION in atof-ieee.c */
3261 #define MAX_LITTLENUMS 6
3263 /* Turn a string in input_line_pointer into a floating point constant
3264 of type type, and store the appropriate bytes in *litP. The number
3265 of LITTLENUMS emitted is stored in *sizeP . An error message is
3266 returned, or NULL on OK. */
3269 md_atof (type
, litP
, sizeP
)
3275 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
3276 LITTLENUM_TYPE
*wordP
;
3308 return "Bad call to MD_ATOF()";
3310 t
= atof_ieee (input_line_pointer
, type
, words
);
3312 input_line_pointer
= t
;
3314 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
3315 for (wordP
= words
; prec
--;)
3317 md_number_to_chars (litP
, (long) (*wordP
++), sizeof (LITTLENUM_TYPE
));
3318 litP
+= sizeof (LITTLENUM_TYPE
);
3324 md_number_to_chars (buf
, val
, n
)
3329 number_to_chars_bigendian (buf
, val
, n
);
3333 md_apply_fix_2 (fixP
, val
)
3337 addressT upper_limit
;
3338 offsetT lower_limit
;
3340 /* This is unnecessary but it convinces the native rs6000 compiler
3341 to generate the code we want. */
3342 char *buf
= fixP
->fx_frag
->fr_literal
;
3343 buf
+= fixP
->fx_where
;
3344 /* end ibm compiler workaround */
3346 if (val
& 0x80000000)
3347 val
|= ~(addressT
)0x7fffffff;
3351 switch (fixP
->fx_size
)
3353 /* The cast to offsetT below are necessary to make code correct for
3354 machines where ints are smaller than offsetT */
3358 lower_limit
= - (offsetT
) 0x80;
3361 *buf
++ = (val
>> 8);
3363 upper_limit
= 0x7fff;
3364 lower_limit
= - (offsetT
) 0x8000;
3367 *buf
++ = (val
>> 24);
3368 *buf
++ = (val
>> 16);
3369 *buf
++ = (val
>> 8);
3371 upper_limit
= 0x7fffffff;
3372 lower_limit
= - (offsetT
) 0x7fffffff - 1; /* avoid constant overflow */
3375 BAD_CASE (fixP
->fx_size
);
3378 /* Fix up a negative reloc. */
3379 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_subsy
!= NULL
)
3381 fixP
->fx_addsy
= fixP
->fx_subsy
;
3382 fixP
->fx_subsy
= NULL
;
3386 /* For non-pc-relative values, it's conceivable we might get something
3387 like "0xff" for a byte field. So extend the upper part of the range
3388 to accept such numbers. We arbitrarily disallow "-0xff" or "0xff+0xff",
3389 so that we can do any range checking at all. */
3390 if (!fixP
->fx_pcrel
)
3391 upper_limit
= upper_limit
* 2 + 1;
3393 if ((addressT
) val
> upper_limit
3394 && (val
> 0 || val
< lower_limit
))
3395 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, "value out of range");
3397 /* A one byte PC-relative reloc means a short branch. We can't use
3398 a short branch with a value of 0 or -1, because those indicate
3399 different opcodes (branches with longer offsets). */
3401 && fixP
->fx_size
== 1
3402 && (fixP
->fx_addsy
== NULL
3403 || S_IS_DEFINED (fixP
->fx_addsy
))
3404 && (val
== 0 || val
== -1))
3405 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, "invalid byte branch offset");
3408 #ifdef BFD_ASSEMBLER
3410 md_apply_fix (fixP
, valp
)
3414 md_apply_fix_2 (fixP
, (addressT
) *valp
);
3418 void md_apply_fix (fixP
, val
)
3422 md_apply_fix_2 (fixP
, (addressT
) val
);
3426 /* *fragP has been relaxed to its final size, and now needs to have
3427 the bytes inside it modified to conform to the new size There is UGLY
3431 md_convert_frag_1 (fragP
)
3432 register fragS
*fragP
;
3438 /* Address in object code of the displacement. */
3439 register int object_address
= fragP
->fr_fix
+ fragP
->fr_address
;
3441 /* Address in gas core of the place to store the displacement. */
3442 /* This convinces the native rs6000 compiler to generate the code we
3444 register char *buffer_address
= fragP
->fr_literal
;
3445 buffer_address
+= fragP
->fr_fix
;
3446 /* end ibm compiler workaround */
3448 /* The displacement of the address, from current location. */
3449 disp
= fragP
->fr_symbol
? S_GET_VALUE (fragP
->fr_symbol
) : 0;
3450 disp
= (disp
+ fragP
->fr_offset
) - object_address
;
3452 #ifdef BFD_ASSEMBLER
3453 disp
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
3456 switch (fragP
->fr_subtype
)
3458 case TAB (BCC68000
, BYTE
):
3459 case TAB (ABRANCH
, BYTE
):
3460 know (issbyte (disp
));
3462 as_bad ("short branch with zero offset: use :w");
3463 fragP
->fr_opcode
[1] = disp
;
3466 case TAB (DBCC
, SHORT
):
3467 know (issword (disp
));
3470 case TAB (BCC68000
, SHORT
):
3471 case TAB (ABRANCH
, SHORT
):
3472 know (issword (disp
));
3473 fragP
->fr_opcode
[1] = 0x00;
3476 case TAB (ABRANCH
, LONG
):
3477 if (cpu_of_arch (current_architecture
) < m68020
)
3479 if (fragP
->fr_opcode
[0] == 0x61)
3482 fragP
->fr_opcode
[0] = 0x4E;
3483 fragP
->fr_opcode
[1] = (char) 0xB9; /* JBSR with ABSL LONG offset */
3497 else if (fragP
->fr_opcode
[0] == 0x60)
3499 fragP
->fr_opcode
[0] = 0x4E;
3500 fragP
->fr_opcode
[1] = (char) 0xF9; /* JMP with ABSL LONG offset */
3501 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3502 fragP
->fr_offset
, 0, NO_RELOC
);
3508 as_bad ("Long branch offset not supported.");
3513 fragP
->fr_opcode
[1] = (char) 0xff;
3517 case TAB (BCC68000
, LONG
):
3518 /* only Bcc 68000 instructions can come here */
3519 /* change bcc into b!cc/jmp absl long */
3520 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
3521 fragP
->fr_opcode
[1] = 0x6;/* branch offset = 6 */
3523 /* JF: these used to be fr_opcode[2,3], but they may be in a
3524 different frag, in which case refering to them is a no-no.
3525 Only fr_opcode[0,1] are guaranteed to work. */
3526 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
3527 *buffer_address
++ = (char) 0xf9;
3528 fragP
->fr_fix
+= 2; /* account for jmp instruction */
3529 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3530 fragP
->fr_offset
, 0, NO_RELOC
);
3534 case TAB (DBCC
, LONG
):
3535 /* only DBcc 68000 instructions can come here */
3536 /* change dbcc into dbcc/jmp absl long */
3537 /* JF: these used to be fr_opcode[2-7], but that's wrong */
3538 *buffer_address
++ = 0x00; /* branch offset = 4 */
3539 *buffer_address
++ = 0x04;
3540 *buffer_address
++ = 0x60; /* put in bra pc+6 */
3541 *buffer_address
++ = 0x06;
3542 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
3543 *buffer_address
++ = (char) 0xf9;
3545 fragP
->fr_fix
+= 6; /* account for bra/jmp instructions */
3546 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3547 fragP
->fr_offset
, 0, NO_RELOC
);
3551 case TAB (FBRANCH
, SHORT
):
3552 know ((fragP
->fr_opcode
[1] & 0x40) == 0);
3555 case TAB (FBRANCH
, LONG
):
3556 fragP
->fr_opcode
[1] |= 0x40; /* Turn on LONG bit */
3559 case TAB (PCREL
, SHORT
):
3562 case TAB (PCREL
, LONG
):
3563 /* The thing to do here is force it to ABSOLUTE LONG, since
3564 PCREL is really trying to shorten an ABSOLUTE address anyway */
3565 /* JF FOO This code has not been tested */
3566 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
3568 if ((fragP
->fr_opcode
[1] & 0x3F) != 0x3A)
3569 as_bad ("Internal error (long PC-relative operand) for insn 0x%04x at 0x%lx",
3570 (unsigned) fragP
->fr_opcode
[0],
3571 (unsigned long) fragP
->fr_address
);
3572 fragP
->fr_opcode
[1] &= ~0x3F;
3573 fragP
->fr_opcode
[1] |= 0x39; /* Mode 7.1 */
3577 case TAB (PCLEA
, SHORT
):
3578 fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
3579 fragP
->fr_offset
, 1, NO_RELOC
);
3580 fragP
->fr_opcode
[1] &= ~0x3F;
3581 fragP
->fr_opcode
[1] |= 0x3A; /* 072 - mode 7.2 */
3584 case TAB (PCLEA
, LONG
):
3585 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
) + 2, 4, fragP
->fr_symbol
,
3586 fragP
->fr_offset
, 1, NO_RELOC
);
3587 fixP
->fx_pcrel_adjust
= 2;
3588 /* Already set to mode 7.3; this indicates: PC indirect with
3589 suppressed index, 32-bit displacement. */
3590 *buffer_address
++ = 0x01;
3591 *buffer_address
++ = 0x70;
3596 case TAB (PCINDEX
, BYTE
):
3598 if (!issbyte (disp
))
3600 as_bad ("displacement doesn't fit in one byte");
3603 assert (fragP
->fr_fix
>= 2);
3604 buffer_address
[-2] &= ~1;
3605 buffer_address
[-1] = disp
;
3608 case TAB (PCINDEX
, SHORT
):
3610 assert (issword (disp
));
3611 assert (fragP
->fr_fix
>= 2);
3612 buffer_address
[-2] |= 0x1;
3613 buffer_address
[-1] = 0x20;
3614 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
3615 fragP
->fr_offset
, (fragP
->fr_opcode
[1] & 077) == 073,
3617 fixP
->fx_pcrel_adjust
= 2;
3620 case TAB (PCINDEX
, LONG
):
3622 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
3623 fragP
->fr_offset
, (fragP
->fr_opcode
[1] & 077) == 073,
3625 fixP
->fx_pcrel_adjust
= 2;
3626 assert (fragP
->fr_fix
>= 2);
3627 buffer_address
[-2] |= 0x1;
3628 buffer_address
[-1] = 0x30;
3635 md_number_to_chars (buffer_address
, (long) disp
, (int) ext
);
3636 fragP
->fr_fix
+= ext
;
3640 #ifndef BFD_ASSEMBLER
3643 md_convert_frag (headers
, sec
, fragP
)
3644 object_headers
*headers
;
3648 md_convert_frag_1 (fragP
);
3654 md_convert_frag (abfd
, sec
, fragP
)
3659 md_convert_frag_1 (fragP
);
3663 /* Force truly undefined symbols to their maximum size, and generally set up
3664 the frag list to be relaxed
3667 md_estimate_size_before_relax (fragP
, segment
)
3668 register fragS
*fragP
;
3672 register char *buffer_address
= fragP
->fr_fix
+ fragP
->fr_literal
;
3674 old_fix
= fragP
->fr_fix
;
3676 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
3677 switch (fragP
->fr_subtype
)
3680 case TAB (ABRANCH
, SZ_UNDEF
):
3682 if ((fragP
->fr_symbol
!= NULL
) /* Not absolute */
3683 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
3685 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), BYTE
);
3688 else if ((fragP
->fr_symbol
== 0) || (cpu_of_arch (current_architecture
) < m68020
))
3690 /* On 68000, or for absolute value, switch to abs long */
3691 /* FIXME, we should check abs val, pick short or long */
3692 if (fragP
->fr_opcode
[0] == 0x61)
3694 fragP
->fr_opcode
[0] = 0x4E;
3695 fragP
->fr_opcode
[1] = (char) 0xB9; /* JBSR with ABSL LONG offset */
3696 fix_new (fragP
, fragP
->fr_fix
, 4,
3697 fragP
->fr_symbol
, fragP
->fr_offset
, 0, NO_RELOC
);
3701 else if (fragP
->fr_opcode
[0] == 0x60)
3703 fragP
->fr_opcode
[0] = 0x4E;
3704 fragP
->fr_opcode
[1] = (char) 0xF9; /* JMP with ABSL LONG offset */
3705 fix_new (fragP
, fragP
->fr_fix
, 4,
3706 fragP
->fr_symbol
, fragP
->fr_offset
, 0, NO_RELOC
);
3712 as_warn ("Long branch offset to extern symbol not supported.");
3716 { /* Symbol is still undefined. Make it simple */
3717 fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
3718 fragP
->fr_offset
, 1, NO_RELOC
);
3720 fragP
->fr_opcode
[1] = (char) 0xff;
3726 } /* case TAB(ABRANCH,SZ_UNDEF) */
3728 case TAB (FBRANCH
, SZ_UNDEF
):
3730 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
|| flag_short_refs
)
3732 fragP
->fr_subtype
= TAB (FBRANCH
, SHORT
);
3737 fix_new (fragP
, (int) fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3738 fragP
->fr_offset
, 1, NO_RELOC
);
3740 fragP
->fr_opcode
[1] |= 0x40; /* Turn on LONG bit */
3744 } /* TAB(FBRANCH,SZ_UNDEF) */
3746 case TAB (PCREL
, SZ_UNDEF
):
3748 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
3750 || cpu_of_arch (current_architecture
) < m68020
)
3752 fragP
->fr_subtype
= TAB (PCREL
, SHORT
);
3757 fragP
->fr_subtype
= TAB (PCREL
, LONG
);
3761 } /* TAB(PCREL,SZ_UNDEF) */
3763 case TAB (BCC68000
, SZ_UNDEF
):
3765 if ((fragP
->fr_symbol
!= NULL
)
3766 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
3768 fragP
->fr_subtype
= TAB (BCC68000
, BYTE
);
3771 /* only Bcc 68000 instructions can come here */
3772 /* change bcc into b!cc/jmp absl long */
3773 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
3774 if (flag_short_refs
)
3776 fragP
->fr_opcode
[1] = 0x04; /* branch offset = 6 */
3777 /* JF: these were fr_opcode[2,3] */
3778 buffer_address
[0] = 0x4e; /* put in jmp long (0x4ef9) */
3779 buffer_address
[1] = (char) 0xf8;
3780 fragP
->fr_fix
+= 2; /* account for jmp instruction */
3781 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
,
3782 fragP
->fr_offset
, 0, NO_RELOC
);
3787 fragP
->fr_opcode
[1] = 0x06; /* branch offset = 6 */
3788 /* JF: these were fr_opcode[2,3] */
3789 buffer_address
[0] = 0x4e; /* put in jmp long (0x4ef9) */
3790 buffer_address
[1] = (char) 0xf9;
3791 fragP
->fr_fix
+= 2; /* account for jmp instruction */
3792 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3793 fragP
->fr_offset
, 0, NO_RELOC
);
3798 } /* case TAB(BCC68000,SZ_UNDEF) */
3800 case TAB (DBCC
, SZ_UNDEF
):
3802 if (fragP
->fr_symbol
!= NULL
&& S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
3804 fragP
->fr_subtype
= TAB (DBCC
, SHORT
);
3808 /* only DBcc 68000 instructions can come here */
3809 /* change dbcc into dbcc/jmp absl long */
3810 /* JF: these used to be fr_opcode[2-4], which is wrong. */
3811 buffer_address
[0] = 0x00; /* branch offset = 4 */
3812 buffer_address
[1] = 0x04;
3813 buffer_address
[2] = 0x60; /* put in bra pc + ... */
3815 if (flag_short_refs
)
3817 /* JF: these were fr_opcode[5-7] */
3818 buffer_address
[3] = 0x04; /* plus 4 */
3819 buffer_address
[4] = 0x4e; /* Put in Jump Word */
3820 buffer_address
[5] = (char) 0xf8;
3821 fragP
->fr_fix
+= 6; /* account for bra/jmp instruction */
3822 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
,
3823 fragP
->fr_offset
, 0, NO_RELOC
);
3828 /* JF: these were fr_opcode[5-7] */
3829 buffer_address
[3] = 0x06; /* Plus 6 */
3830 buffer_address
[4] = 0x4e; /* put in jmp long (0x4ef9) */
3831 buffer_address
[5] = (char) 0xf9;
3832 fragP
->fr_fix
+= 6; /* account for bra/jmp instruction */
3833 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3834 fragP
->fr_offset
, 0, NO_RELOC
);
3840 } /* case TAB(DBCC,SZ_UNDEF) */
3842 case TAB (PCLEA
, SZ_UNDEF
):
3844 if ((S_GET_SEGMENT (fragP
->fr_symbol
)) == segment
3846 || cpu_of_arch (current_architecture
) < m68020
)
3848 fragP
->fr_subtype
= TAB (PCLEA
, SHORT
);
3853 fragP
->fr_subtype
= TAB (PCLEA
, LONG
);
3857 } /* TAB(PCLEA,SZ_UNDEF) */
3859 case TAB (PCINDEX
, SZ_UNDEF
):
3860 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
3861 || cpu_of_arch (current_architecture
) < m68020
)
3863 fragP
->fr_subtype
= TAB (PCINDEX
, BYTE
);
3867 fragP
->fr_subtype
= TAB (PCINDEX
, LONG
);
3876 /* now that SZ_UNDEF are taken care of, check others */
3877 switch (fragP
->fr_subtype
)
3879 case TAB (BCC68000
, BYTE
):
3880 case TAB (ABRANCH
, BYTE
):
3881 /* We can't do a short jump to the next instruction,
3882 so we force word mode. */
3883 if (fragP
->fr_symbol
&& S_GET_VALUE (fragP
->fr_symbol
) == 0 &&
3884 fragP
->fr_symbol
->sy_frag
== fragP
->fr_next
)
3886 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
3893 return fragP
->fr_var
+ fragP
->fr_fix
- old_fix
;
3896 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
3897 /* the bit-field entries in the relocation_info struct plays hell
3898 with the byte-order problems of cross-assembly. So as a hack,
3899 I added this mach. dependent ri twiddler. Ugly, but it gets
3901 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
3902 are symbolnum, most sig. byte first. Last byte is broken up with
3903 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
3904 nibble as nuthin. (on Sun 3 at least) */
3905 /* Translate the internal relocation information into target-specific
3909 md_ri_to_chars (the_bytes
, ri
)
3911 struct reloc_info_generic
*ri
;
3914 md_number_to_chars (the_bytes
, ri
->r_address
, 4);
3915 /* now the fun stuff */
3916 the_bytes
[4] = (ri
->r_symbolnum
>> 16) & 0x0ff;
3917 the_bytes
[5] = (ri
->r_symbolnum
>> 8) & 0x0ff;
3918 the_bytes
[6] = ri
->r_symbolnum
& 0x0ff;
3919 the_bytes
[7] = (((ri
->r_pcrel
<< 7) & 0x80) | ((ri
->r_length
<< 5) & 0x60) |
3920 ((ri
->r_extern
<< 4) & 0x10));
3923 #endif /* comment */
3925 #ifndef BFD_ASSEMBLER
3927 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3930 relax_addressT segment_address_in_file
;
3933 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3934 * Out: GNU LD relocation length code: 0, 1, or 2.
3937 static CONST
unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3940 know (fixP
->fx_addsy
!= NULL
);
3942 md_number_to_chars (where
,
3943 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
3946 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3947 ? S_GET_TYPE (fixP
->fx_addsy
)
3948 : fixP
->fx_addsy
->sy_number
);
3950 where
[4] = (r_symbolnum
>> 16) & 0x0ff;
3951 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3952 where
[6] = r_symbolnum
& 0x0ff;
3953 where
[7] = (((fixP
->fx_pcrel
<< 7) & 0x80) | ((nbytes_r_length
[fixP
->fx_size
] << 5) & 0x60) |
3954 (((!S_IS_DEFINED (fixP
->fx_addsy
)) << 4) & 0x10));
3958 #endif /* OBJ_AOUT or OBJ_BOUT */
3960 #ifndef WORKING_DOT_WORD
3961 CONST
int md_short_jump_size
= 4;
3962 CONST
int md_long_jump_size
= 6;
3965 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3967 addressT from_addr
, to_addr
;
3973 offset
= to_addr
- (from_addr
+ 2);
3975 md_number_to_chars (ptr
, (valueT
) 0x6000, 2);
3976 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 2);
3980 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3982 addressT from_addr
, to_addr
;
3988 if (cpu_of_arch (current_architecture
) < m68020
)
3990 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3991 md_number_to_chars (ptr
, (valueT
) 0x4EF9, 2);
3992 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
3993 fix_new (frag
, (ptr
+ 2) - frag
->fr_literal
, 4, to_symbol
, (offsetT
) 0,
3998 offset
= to_addr
- (from_addr
+ 2);
3999 md_number_to_chars (ptr
, (valueT
) 0x60ff, 2);
4000 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
4006 /* Different values of OK tell what its OK to return. Things that
4007 aren't OK are an error (what a shock, no?)
4010 10: Absolute 1:8 only
4011 20: Absolute 0:7 only
4012 30: absolute 0:15 only
4013 40: Absolute 0:31 only
4014 50: absolute 0:127 only
4015 55: absolute -64:63 only
4016 60: absolute -128:127 only
4017 70: absolute 0:4095 only
4024 struct m68k_exp
*exp
;
4027 if (exp
->exp
.X_op
== O_absent
)
4029 /* Do the same thing the VAX asm does */
4030 op (exp
) = O_constant
;
4036 as_warn ("expression out of range: defaulting to 1");
4040 else if (exp
->exp
.X_op
== O_constant
)
4045 if (offs (exp
) < 1 || offs (exp
) > 8)
4047 as_warn ("expression out of range: defaulting to 1");
4052 if (offs (exp
) < 0 || offs (exp
) > 7)
4056 if (offs (exp
) < 0 || offs (exp
) > 15)
4060 if (offs (exp
) < 0 || offs (exp
) > 32)
4064 if (offs (exp
) < 0 || offs (exp
) > 127)
4068 if (offs (exp
) < -64 || offs (exp
) > 63)
4072 if (offs (exp
) < -128 || offs (exp
) > 127)
4076 if (offs (exp
) < 0 || offs (exp
) > 4095)
4079 as_warn ("expression out of range: defaulting to 0");
4087 else if (exp
->exp
.X_op
== O_big
)
4089 if (offs (exp
) <= 0 /* flonum */
4090 && (ok
== 80 /* no bignums */
4091 || (ok
> 10 /* small-int ranges including 0 ok */
4092 /* If we have a flonum zero, a zero integer should
4093 do as well (e.g., in moveq). */
4094 && generic_floating_point_number
.exponent
== 0
4095 && generic_floating_point_number
.low
[0] == 0)))
4097 /* HACK! Turn it into a long */
4098 LITTLENUM_TYPE words
[6];
4100 gen_to_words (words
, 2, 8L); /* These numbers are magic! */
4101 op (exp
) = O_constant
;
4104 offs (exp
) = words
[1] | (words
[0] << 16);
4108 op (exp
) = O_constant
;
4111 offs (exp
) = (ok
== 10) ? 1 : 0;
4112 as_warn ("Can't deal with expression; defaulting to %ld",
4118 if (ok
>= 10 && ok
<= 70)
4120 op (exp
) = O_constant
;
4123 offs (exp
) = (ok
== 10) ? 1 : 0;
4124 as_warn ("Can't deal with expression; defaulting to %ld",
4129 if (exp
->size
!= SIZE_UNSPEC
)
4137 if (!isbyte (offs (exp
)))
4138 as_warn ("expression doesn't fit in BYTE");
4141 if (!isword (offs (exp
)))
4142 as_warn ("expression doesn't fit in WORD");
4150 /* These are the back-ends for the various machine dependent pseudo-ops. */
4151 void demand_empty_rest_of_line (); /* Hate those extra verbose names */
4157 subseg_set (data_section
, 1);
4158 demand_empty_rest_of_line ();
4165 subseg_set (data_section
, 2);
4166 demand_empty_rest_of_line ();
4173 /* We don't support putting frags in the BSS segment, we fake it
4174 by marking in_bss, then looking at s_skip for clues. */
4176 subseg_set (bss_section
, 0);
4177 demand_empty_rest_of_line ();
4185 register long temp_fill
;
4187 temp
= 1; /* JF should be 2? */
4188 temp_fill
= get_absolute_expression ();
4189 if (!need_pass_2
) /* Never make frag if expect extra pass. */
4190 frag_align (temp
, (int) temp_fill
);
4191 demand_empty_rest_of_line ();
4198 demand_empty_rest_of_line ();
4201 /* Pseudo-ops handled for MRI compatibility. */
4203 /* Handle an MRI style chip specification. */
4212 s
= input_line_pointer
;
4213 c
= get_symbol_end ();
4214 for (i
= 0; i
< n_archs
; i
++)
4215 if (strcasecmp (s
, archs
[i
].name
) == 0)
4219 as_bad ("%s: unrecognized processor name", s
);
4220 *input_line_pointer
= c
;
4221 ignore_rest_of_line ();
4224 *input_line_pointer
= c
;
4226 if (*input_line_pointer
== '/')
4227 current_architecture
= 0;
4229 current_architecture
&= m68881
| m68851
;
4230 current_architecture
|= archs
[i
].arch
;
4232 while (*input_line_pointer
== '/')
4234 ++input_line_pointer
;
4235 s
= input_line_pointer
;
4236 c
= get_symbol_end ();
4237 if (strcmp (s
, "68881") == 0)
4238 current_architecture
|= m68881
;
4239 else if (strcmp (s
, "68851") == 0)
4240 current_architecture
|= m68851
;
4241 *input_line_pointer
= c
;
4245 /* The MRI CHIP pseudo-op. */
4255 stop
= mri_comment_field (&stopc
);
4258 mri_comment_end (stop
, stopc
);
4259 demand_empty_rest_of_line ();
4262 /* The MRI FOPT pseudo-op. */
4270 if (strncasecmp (input_line_pointer
, "ID=", 3) == 0)
4274 input_line_pointer
+= 3;
4275 temp
= get_absolute_expression ();
4276 if (temp
< 0 || temp
> 7)
4277 as_bad ("bad coprocessor id");
4279 m68k_float_copnum
= COP0
+ temp
;
4283 as_bad ("unrecognized fopt option");
4284 ignore_rest_of_line ();
4288 demand_empty_rest_of_line ();
4291 /* The structure used to handle the MRI OPT pseudo-op. */
4295 /* The name of the option. */
4298 /* If this is not NULL, just call this function. The first argument
4299 is the ARG field of this structure, the second argument is
4300 whether the option was negated. */
4301 void (*pfn
) PARAMS ((int arg
, int on
));
4303 /* If this is not NULL, and the PFN field is NULL, set the variable
4304 this points to. Set it to the ARG field if the option was not
4305 negated, and the NOTARG field otherwise. */
4308 /* The value to pass to PFN or to assign to *PVAR. */
4311 /* The value to assign to *PVAR if the option is negated. If PFN is
4312 NULL, and PVAR is not NULL, and ARG and NOTARG are the same, then
4313 the option may not be negated. */
4317 /* The table used to handle the MRI OPT pseudo-op. */
4319 static void skip_to_comma
PARAMS ((int, int));
4320 static void opt_nest
PARAMS ((int, int));
4321 static void opt_chip
PARAMS ((int, int));
4322 static void opt_list
PARAMS ((int, int));
4323 static void opt_list_symbols
PARAMS ((int, int));
4325 static const struct opt_action opt_table
[] =
4327 { "abspcadd", 0, &m68k_abspcadd
, 1, 0 },
4329 /* We do relaxing, so there is little use for these options. */
4330 { "b", 0, 0, 0, 0 },
4331 { "brs", 0, 0, 0, 0 },
4332 { "brb", 0, 0, 0, 0 },
4333 { "brl", 0, 0, 0, 0 },
4334 { "brw", 0, 0, 0, 0 },
4336 { "c", 0, 0, 0, 0 },
4337 { "cex", 0, 0, 0, 0 },
4338 { "case", 0, &symbols_case_sensitive
, 1, 0 },
4339 { "cl", 0, 0, 0, 0 },
4340 { "cre", 0, 0, 0, 0 },
4341 { "d", 0, &flag_keep_locals
, 1, 0 },
4342 { "e", 0, 0, 0, 0 },
4343 { "f", 0, &flag_short_refs
, 1, 0 },
4344 { "frs", 0, &flag_short_refs
, 1, 0 },
4345 { "frl", 0, &flag_short_refs
, 0, 1 },
4346 { "g", 0, 0, 0, 0 },
4347 { "i", 0, 0, 0, 0 },
4348 { "m", 0, 0, 0, 0 },
4349 { "mex", 0, 0, 0, 0 },
4350 { "mc", 0, 0, 0, 0 },
4351 { "md", 0, 0, 0, 0 },
4352 { "nest", opt_nest
, 0, 0, 0 },
4353 { "next", skip_to_comma
, 0, 0, 0 },
4354 { "o", 0, 0, 0, 0 },
4355 { "old", 0, 0, 0, 0 },
4356 { "op", skip_to_comma
, 0, 0, 0 },
4357 { "pco", 0, 0, 0, 0 },
4358 { "p", opt_chip
, 0, 0, 0 },
4359 { "pcr", 0, 0, 0, 0 },
4360 { "pcs", 0, 0, 0, 0 },
4361 { "r", 0, 0, 0, 0 },
4362 { "quick", 0, &m68k_quick
, 1, 0 },
4363 { "rel32", 0, &m68k_rel32
, 1, 0 },
4364 { "s", opt_list
, 0, 0, 0 },
4365 { "t", opt_list_symbols
, 0, 0, 0 },
4366 { "w", 0, &flag_no_warnings
, 0, 1 },
4370 #define OPTCOUNT (sizeof opt_table / sizeof opt_table[0])
4372 /* The MRI OPT pseudo-op. */
4384 const struct opt_action
*o
;
4389 if (*input_line_pointer
== '-')
4391 ++input_line_pointer
;
4394 else if (strncasecmp (input_line_pointer
, "NO", 2) == 0)
4396 input_line_pointer
+= 2;
4400 s
= input_line_pointer
;
4401 c
= get_symbol_end ();
4403 for (i
= 0, o
= opt_table
; i
< OPTCOUNT
; i
++, o
++)
4405 if (strcasecmp (s
, o
->name
) == 0)
4409 /* Restore input_line_pointer now in case the option
4411 *input_line_pointer
= c
;
4412 (*o
->pfn
) (o
->arg
, t
);
4414 else if (o
->pvar
!= NULL
)
4416 if (! t
&& o
->arg
== o
->notarg
)
4417 as_bad ("option `%s' may not be negated", s
);
4418 *input_line_pointer
= c
;
4419 *o
->pvar
= t
? o
->arg
: o
->notarg
;
4422 *input_line_pointer
= c
;
4428 as_bad ("option `%s' not recognized", s
);
4429 *input_line_pointer
= c
;
4432 while (*input_line_pointer
++ == ',');
4434 /* Move back to terminating character. */
4435 --input_line_pointer
;
4436 demand_empty_rest_of_line ();
4439 /* Skip ahead to a comma. This is used for OPT options which we do
4440 not suppor tand which take arguments. */
4443 skip_to_comma (arg
, on
)
4447 while (*input_line_pointer
!= ','
4448 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
4449 ++input_line_pointer
;
4452 /* Handle the OPT NEST=depth option. */
4459 if (*input_line_pointer
!= '=')
4461 as_bad ("bad format of OPT NEST=depth");
4465 ++input_line_pointer
;
4466 max_macro_nest
= get_absolute_expression ();
4469 /* Handle the OPT P=chip option. */
4476 if (*input_line_pointer
!= '=')
4478 /* This is just OPT P, which we do not support. */
4482 ++input_line_pointer
;
4486 /* Handle the OPT S option. */
4496 /* Handle the OPT T option. */
4499 opt_list_symbols (arg
, on
)
4504 listing
|= LISTING_SYMBOLS
;
4506 listing
&=~ LISTING_SYMBOLS
;
4509 /* Handle the MRI REG pseudo-op. */
4522 if (line_label
== NULL
)
4524 as_bad ("missing label");
4525 ignore_rest_of_line ();
4530 stop
= mri_comment_field (&stopc
);
4534 s
= input_line_pointer
;
4535 while (isalnum ((unsigned char) *input_line_pointer
)
4536 #ifdef REGISTER_PREFIX
4537 || *input_line_pointer
== REGISTER_PREFIX
4539 || *input_line_pointer
== '/'
4540 || *input_line_pointer
== '-')
4541 ++input_line_pointer
;
4542 c
= *input_line_pointer
;
4543 *input_line_pointer
= '\0';
4545 if (m68k_ip_op (s
, &rop
) != 0)
4547 if (rop
.error
== NULL
)
4548 as_bad ("bad register list");
4550 as_bad ("bad register list: %s", rop
.error
);
4551 *input_line_pointer
= c
;
4552 ignore_rest_of_line ();
4556 *input_line_pointer
= c
;
4558 if (rop
.mode
== REGLST
)
4560 else if (rop
.mode
== DREG
)
4561 mask
= 1 << (rop
.reg
- DATA0
);
4562 else if (rop
.mode
== AREG
)
4563 mask
= 1 << (rop
.reg
- ADDR0
+ 8);
4564 else if (rop
.mode
== FPREG
)
4565 mask
= 1 << (rop
.reg
- FP0
+ 16);
4566 else if (rop
.mode
== CONTROL
4569 else if (rop
.mode
== CONTROL
4572 else if (rop
.mode
== CONTROL
4577 as_bad ("bad register list");
4578 ignore_rest_of_line ();
4582 S_SET_SEGMENT (line_label
, absolute_section
);
4583 S_SET_VALUE (line_label
, mask
);
4584 line_label
->sy_frag
= &zero_address_frag
;
4587 mri_comment_end (stop
, stopc
);
4589 demand_empty_rest_of_line ();
4592 /* This structure is used for the MRI SAVE and RESTORE pseudo-ops. */
4596 struct save_opts
*next
;
4598 int symbols_case_sensitive
;
4606 /* FIXME: We don't save OPT S. */
4609 /* This variable holds the stack of saved options. */
4611 static struct save_opts
*save_stack
;
4613 /* The MRI SAVE pseudo-op. */
4619 struct save_opts
*s
;
4621 s
= (struct save_opts
*) xmalloc (sizeof (struct save_opts
));
4622 s
->abspcadd
= m68k_abspcadd
;
4623 s
->symbols_case_sensitive
= symbols_case_sensitive
;
4624 s
->keep_locals
= flag_keep_locals
;
4625 s
->short_refs
= flag_short_refs
;
4626 s
->architecture
= current_architecture
;
4627 s
->quick
= m68k_quick
;
4628 s
->rel32
= m68k_rel32
;
4629 s
->listing
= listing
;
4630 s
->no_warnings
= flag_no_warnings
;
4632 s
->next
= save_stack
;
4635 demand_empty_rest_of_line ();
4638 /* The MRI RESTORE pseudo-op. */
4644 struct save_opts
*s
;
4646 if (save_stack
== NULL
)
4648 as_bad ("restore without save");
4649 ignore_rest_of_line ();
4654 save_stack
= s
->next
;
4656 m68k_abspcadd
= s
->abspcadd
;
4657 symbols_case_sensitive
= s
->symbols_case_sensitive
;
4658 flag_keep_locals
= s
->keep_locals
;
4659 flag_short_refs
= s
->short_refs
;
4660 current_architecture
= s
->architecture
;
4661 m68k_quick
= s
->quick
;
4662 m68k_rel32
= s
->rel32
;
4663 listing
= s
->listing
;
4664 flag_no_warnings
= s
->no_warnings
;
4668 demand_empty_rest_of_line ();
4671 /* Types of MRI structured control directives. */
4673 enum mri_control_type
4681 /* This structure is used to stack the MRI structured control
4684 struct mri_control_info
4686 /* The directive within which this one is enclosed. */
4687 struct mri_control_info
*outer
;
4689 /* The type of directive. */
4690 enum mri_control_type type
;
4692 /* Whether an ELSE has been in an IF. */
4695 /* The add or sub statement at the end of a FOR. */
4698 /* The label of the top of a FOR or REPEAT loop. */
4701 /* The label to jump to for the next iteration, or the else
4702 expression of a conditional. */
4705 /* The label to jump to to break out of the loop, or the label past
4706 the end of a conditional. */
4710 /* The stack of MRI structured control directives. */
4712 static struct mri_control_info
*mri_control_stack
;
4714 /* The current MRI structured control directive index number, used to
4715 generate label names. */
4717 static int mri_control_index
;
4719 /* Some function prototypes. */
4721 static char *mri_control_label
PARAMS ((void));
4722 static struct mri_control_info
*push_mri_control
4723 PARAMS ((enum mri_control_type
));
4724 static void pop_mri_control
PARAMS ((void));
4725 static int parse_mri_condition
PARAMS ((int *));
4726 static int parse_mri_control_operand
4727 PARAMS ((int *, char **, char **, char **, char **));
4728 static int swap_mri_condition
PARAMS ((int));
4729 static int reverse_mri_condition
PARAMS ((int));
4730 static void build_mri_control_operand
4731 PARAMS ((int, int, char *, char *, char *, char *, const char *,
4732 const char *, int));
4733 static void parse_mri_control_expression
4734 PARAMS ((char *, int, const char *, const char *, int));
4736 /* Generate a new MRI label structured control directive label name. */
4739 mri_control_label ()
4743 n
= (char *) xmalloc (20);
4744 sprintf (n
, "%smc%d", FAKE_LABEL_NAME
, mri_control_index
);
4745 ++mri_control_index
;
4749 /* Create a new MRI structured control directive. */
4751 static struct mri_control_info
*
4752 push_mri_control (type
)
4753 enum mri_control_type type
;
4755 struct mri_control_info
*n
;
4757 n
= (struct mri_control_info
*) xmalloc (sizeof (struct mri_control_info
));
4761 if (type
== mri_if
|| type
== mri_while
)
4764 n
->top
= mri_control_label ();
4765 n
->next
= mri_control_label ();
4766 n
->bottom
= mri_control_label ();
4768 n
->outer
= mri_control_stack
;
4769 mri_control_stack
= n
;
4774 /* Pop off the stack of MRI structured control directives. */
4779 struct mri_control_info
*n
;
4781 n
= mri_control_stack
;
4782 mri_control_stack
= n
->outer
;
4790 /* Recognize a condition code in an MRI structured control expression. */
4793 parse_mri_condition (pcc
)
4798 know (*input_line_pointer
== '<');
4800 ++input_line_pointer
;
4801 c1
= *input_line_pointer
++;
4802 c2
= *input_line_pointer
++;
4804 if (*input_line_pointer
!= '>')
4806 as_bad ("syntax error in structured control directive");
4810 ++input_line_pointer
;
4818 *pcc
= (c1
<< 8) | c2
;
4823 /* Parse a single operand in an MRI structured control expression. */
4826 parse_mri_control_operand (pcc
, leftstart
, leftstop
, rightstart
, rightstop
)
4843 if (*input_line_pointer
== '<')
4845 /* It's just a condition code. */
4846 return parse_mri_condition (pcc
);
4849 /* Look ahead for the condition code. */
4850 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
4852 if (*s
== '<' && s
[1] != '\0' && s
[2] != '\0' && s
[3] == '>')
4857 as_bad ("missing condition code in structured control directive");
4861 *leftstart
= input_line_pointer
;
4863 if (*leftstop
> *leftstart
4864 && ((*leftstop
)[-1] == ' ' || (*leftstop
)[-1] == '\t'))
4867 input_line_pointer
= s
;
4868 if (! parse_mri_condition (pcc
))
4871 /* Look ahead for AND or OR or end of line. */
4872 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
4874 if ((strncasecmp (s
, "AND", 3) == 0
4875 && (s
[3] == '.' || ! is_part_of_name (s
[3])))
4876 || (strncasecmp (s
, "OR", 2) == 0
4877 && (s
[2] == '.' || ! is_part_of_name (s
[2]))))
4881 *rightstart
= input_line_pointer
;
4883 if (*rightstop
> *rightstart
4884 && ((*rightstop
)[-1] == ' ' || (*rightstop
)[-1] == '\t'))
4887 input_line_pointer
= s
;
4892 #define MCC(b1, b2) (((b1) << 8) | (b2))
4894 /* Swap the sense of a condition. This changes the condition so that
4895 it generates the same result when the operands are swapped. */
4898 swap_mri_condition (cc
)
4903 case MCC ('h', 'i'): return MCC ('c', 's');
4904 case MCC ('l', 's'): return MCC ('c', 'c');
4905 case MCC ('c', 'c'): return MCC ('l', 's');
4906 case MCC ('c', 's'): return MCC ('h', 'i');
4907 case MCC ('p', 'l'): return MCC ('m', 'i');
4908 case MCC ('m', 'i'): return MCC ('p', 'l');
4909 case MCC ('g', 'e'): return MCC ('l', 'e');
4910 case MCC ('l', 't'): return MCC ('g', 't');
4911 case MCC ('g', 't'): return MCC ('l', 't');
4912 case MCC ('l', 'e'): return MCC ('g', 'e');
4917 /* Reverse the sense of a condition. */
4920 reverse_mri_condition (cc
)
4925 case MCC ('h', 'i'): return MCC ('l', 's');
4926 case MCC ('l', 's'): return MCC ('h', 'i');
4927 case MCC ('c', 'c'): return MCC ('c', 's');
4928 case MCC ('c', 's'): return MCC ('c', 'c');
4929 case MCC ('n', 'e'): return MCC ('e', 'q');
4930 case MCC ('e', 'q'): return MCC ('n', 'e');
4931 case MCC ('v', 'c'): return MCC ('v', 's');
4932 case MCC ('v', 's'): return MCC ('v', 'c');
4933 case MCC ('p', 'l'): return MCC ('m', 'i');
4934 case MCC ('m', 'i'): return MCC ('p', 'l');
4935 case MCC ('g', 'e'): return MCC ('l', 't');
4936 case MCC ('l', 't'): return MCC ('g', 'e');
4937 case MCC ('g', 't'): return MCC ('l', 'e');
4938 case MCC ('l', 'e'): return MCC ('g', 't');
4943 /* Build an MRI structured control expression. This generates test
4944 and branch instructions. It goes to TRUELAB if the condition is
4945 true, and to FALSELAB if the condition is false. Exactly one of
4946 TRUELAB and FALSELAB will be NULL, meaning to fall through. QUAL
4947 is the size qualifier for the expression. EXTENT is the size to
4948 use for the branch. */
4951 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
4952 rightstop
, truelab
, falselab
, extent
)
4959 const char *truelab
;
4960 const char *falselab
;
4966 if (leftstart
!= NULL
)
4968 struct m68k_op leftop
, rightop
;
4971 /* Swap the compare operands, if necessary, to produce a legal
4972 m68k compare instruction. Comparing a register operand with
4973 a non-register operand requires the register to be on the
4974 right (cmp, cmpa). Comparing an immediate value with
4975 anything requires the immediate value to be on the left
4980 (void) m68k_ip_op (leftstart
, &leftop
);
4985 (void) m68k_ip_op (rightstart
, &rightop
);
4988 if (rightop
.mode
== IMMED
4989 || ((leftop
.mode
== DREG
|| leftop
.mode
== AREG
)
4990 && (rightop
.mode
!= DREG
&& rightop
.mode
!= AREG
)))
4994 cc
= swap_mri_condition (cc
);
4996 leftstart
= rightstart
;
4999 leftstop
= rightstop
;
5004 if (truelab
== NULL
)
5006 cc
= reverse_mri_condition (cc
);
5010 if (leftstart
!= NULL
)
5012 buf
= (char *) xmalloc (20
5013 + (leftstop
- leftstart
)
5014 + (rightstop
- rightstart
));
5022 memcpy (s
, leftstart
, leftstop
- leftstart
);
5023 s
+= leftstop
- leftstart
;
5025 memcpy (s
, rightstart
, rightstop
- rightstart
);
5026 s
+= rightstop
- rightstart
;
5032 buf
= (char *) xmalloc (20 + strlen (truelab
));
5040 strcpy (s
, truelab
);
5045 /* Parse an MRI structured control expression. This generates test
5046 and branch instructions. STOP is where the expression ends. It
5047 goes to TRUELAB if the condition is true, and to FALSELAB if the
5048 condition is false. Exactly one of TRUELAB and FALSELAB will be
5049 NULL, meaning to fall through. QUAL is the size qualifier for the
5050 expression. EXTENT is the size to use for the branch. */
5053 parse_mri_control_expression (stop
, qual
, truelab
, falselab
, extent
)
5056 const char *truelab
;
5057 const char *falselab
;
5070 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5071 &rightstart
, &rightstop
))
5077 if (strncasecmp (input_line_pointer
, "AND", 3) == 0)
5081 if (falselab
!= NULL
)
5084 flab
= mri_control_label ();
5086 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5087 rightstop
, (const char *) NULL
, flab
, extent
);
5089 input_line_pointer
+= 3;
5090 if (*input_line_pointer
!= '.'
5091 || input_line_pointer
[1] == '\0')
5095 qual
= input_line_pointer
[1];
5096 input_line_pointer
+= 2;
5099 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5100 &rightstart
, &rightstop
))
5106 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5107 rightstop
, truelab
, falselab
, extent
);
5109 if (falselab
== NULL
)
5112 else if (strncasecmp (input_line_pointer
, "OR", 2) == 0)
5116 if (truelab
!= NULL
)
5119 tlab
= mri_control_label ();
5121 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5122 rightstop
, tlab
, (const char *) NULL
, extent
);
5124 input_line_pointer
+= 2;
5125 if (*input_line_pointer
!= '.'
5126 || input_line_pointer
[1] == '\0')
5130 qual
= input_line_pointer
[1];
5131 input_line_pointer
+= 2;
5134 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5135 &rightstart
, &rightstop
))
5141 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5142 rightstop
, truelab
, falselab
, extent
);
5144 if (truelab
== NULL
)
5149 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5150 rightstop
, truelab
, falselab
, extent
);
5154 if (input_line_pointer
!= stop
)
5155 as_bad ("syntax error in structured control directive");
5158 /* Handle the MRI IF pseudo-op. This may be a structured control
5159 directive, or it may be a regular assembler conditional, depending
5168 struct mri_control_info
*n
;
5170 /* A structured control directive must end with THEN with an
5171 optional qualifier. */
5172 s
= input_line_pointer
;
5173 while (! is_end_of_line
[(unsigned char) *s
]
5174 && (! flag_mri
|| *s
!= '*'))
5177 while (s
> input_line_pointer
&& (*s
== ' ' || *s
== '\t'))
5180 if (s
- input_line_pointer
> 1
5184 if (s
- input_line_pointer
< 3
5185 || strncasecmp (s
- 3, "THEN", 4) != 0)
5189 as_bad ("missing then");
5190 ignore_rest_of_line ();
5194 /* It's a conditional. */
5199 /* Since this might be a conditional if, this pseudo-op will be
5200 called even if we are supported to be ignoring input. Double
5201 check now. Clobber *input_line_pointer so that ignore_input
5202 thinks that this is not a special pseudo-op. */
5203 c
= *input_line_pointer
;
5204 *input_line_pointer
= 0;
5205 if (ignore_input ())
5207 *input_line_pointer
= c
;
5208 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5209 ++input_line_pointer
;
5210 demand_empty_rest_of_line ();
5213 *input_line_pointer
= c
;
5215 n
= push_mri_control (mri_if
);
5217 parse_mri_control_expression (s
- 3, qual
, (const char *) NULL
,
5218 n
->next
, s
[1] == '.' ? s
[2] : '\0');
5221 input_line_pointer
= s
+ 3;
5223 input_line_pointer
= s
+ 1;
5227 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5228 ++input_line_pointer
;
5231 demand_empty_rest_of_line ();
5234 /* Handle the MRI else pseudo-op. If we are currently doing an MRI
5235 structured IF, associate the ELSE with the IF. Otherwise, assume
5236 it is a conditional else. */
5247 && (mri_control_stack
== NULL
5248 || mri_control_stack
->type
!= mri_if
5249 || mri_control_stack
->else_seen
))
5255 c
= *input_line_pointer
;
5256 *input_line_pointer
= 0;
5257 if (ignore_input ())
5259 *input_line_pointer
= c
;
5260 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5261 ++input_line_pointer
;
5262 demand_empty_rest_of_line ();
5265 *input_line_pointer
= c
;
5267 if (mri_control_stack
== NULL
5268 || mri_control_stack
->type
!= mri_if
5269 || mri_control_stack
->else_seen
)
5271 as_bad ("else without matching if");
5272 ignore_rest_of_line ();
5276 mri_control_stack
->else_seen
= 1;
5278 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->bottom
));
5281 sprintf (buf
, "bra%s %s", q
, mri_control_stack
->bottom
);
5285 colon (mri_control_stack
->next
);
5289 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5290 ++input_line_pointer
;
5293 demand_empty_rest_of_line ();
5296 /* Handle the MRI ENDI pseudo-op. */
5302 if (mri_control_stack
== NULL
5303 || mri_control_stack
->type
!= mri_if
)
5305 as_bad ("endi without matching if");
5306 ignore_rest_of_line ();
5310 /* ignore_input will not return true for ENDI, so we don't need to
5311 worry about checking it again here. */
5313 if (! mri_control_stack
->else_seen
)
5314 colon (mri_control_stack
->next
);
5315 colon (mri_control_stack
->bottom
);
5321 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5322 ++input_line_pointer
;
5325 demand_empty_rest_of_line ();
5328 /* Handle the MRI BREAK pseudo-op. */
5331 s_mri_break (extent
)
5334 struct mri_control_info
*n
;
5338 n
= mri_control_stack
;
5340 && n
->type
!= mri_for
5341 && n
->type
!= mri_repeat
5342 && n
->type
!= mri_while
)
5346 as_bad ("break outside of structured loop");
5347 ignore_rest_of_line ();
5351 buf
= (char *) xmalloc (20 + strlen (n
->bottom
));
5354 sprintf (buf
, "bra%s %s", ex
, n
->bottom
);
5360 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5361 ++input_line_pointer
;
5364 demand_empty_rest_of_line ();
5367 /* Handle the MRI NEXT pseudo-op. */
5373 struct mri_control_info
*n
;
5377 n
= mri_control_stack
;
5379 && n
->type
!= mri_for
5380 && n
->type
!= mri_repeat
5381 && n
->type
!= mri_while
)
5385 as_bad ("next outside of structured loop");
5386 ignore_rest_of_line ();
5390 buf
= (char *) xmalloc (20 + strlen (n
->next
));
5393 sprintf (buf
, "bra%s %s", ex
, n
->next
);
5399 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5400 ++input_line_pointer
;
5403 demand_empty_rest_of_line ();
5406 /* Handle the MRI FOR pseudo-op. */
5412 const char *varstart
, *varstop
;
5413 const char *initstart
, *initstop
;
5414 const char *endstart
, *endstop
;
5415 const char *bystart
, *bystop
;
5419 struct mri_control_info
*n
;
5425 FOR.q var = init { TO | DOWNTO } end [ BY by ] DO.e
5429 varstart
= input_line_pointer
;
5431 /* Look for the '='. */
5432 while (! is_end_of_line
[(unsigned char) *input_line_pointer
]
5433 && *input_line_pointer
!= '=')
5434 ++input_line_pointer
;
5435 if (*input_line_pointer
!= '=')
5437 as_bad ("missing =");
5438 ignore_rest_of_line ();
5442 varstop
= input_line_pointer
;
5443 if (varstop
> varstart
5444 && (varstop
[-1] == ' ' || varstop
[-1] == '\t'))
5447 ++input_line_pointer
;
5449 initstart
= input_line_pointer
;
5451 /* Look for TO or DOWNTO. */
5454 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5456 if (strncasecmp (input_line_pointer
, "TO", 2) == 0
5457 && ! is_part_of_name (input_line_pointer
[2]))
5459 initstop
= input_line_pointer
;
5460 input_line_pointer
+= 2;
5463 if (strncasecmp (input_line_pointer
, "DOWNTO", 6) == 0
5464 && ! is_part_of_name (input_line_pointer
[6]))
5466 initstop
= input_line_pointer
;
5468 input_line_pointer
+= 6;
5471 ++input_line_pointer
;
5473 if (initstop
== NULL
)
5475 as_bad ("missing to or downto");
5476 ignore_rest_of_line ();
5479 if (initstop
> initstart
5480 && (initstop
[-1] == ' ' || initstop
[-1] == '\t'))
5484 endstart
= input_line_pointer
;
5486 /* Look for BY or DO. */
5489 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5491 if (strncasecmp (input_line_pointer
, "BY", 2) == 0
5492 && ! is_part_of_name (input_line_pointer
[2]))
5494 endstop
= input_line_pointer
;
5496 input_line_pointer
+= 2;
5499 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
5500 && (input_line_pointer
[2] == '.'
5501 || ! is_part_of_name (input_line_pointer
[2])))
5503 endstop
= input_line_pointer
;
5504 input_line_pointer
+= 2;
5507 ++input_line_pointer
;
5509 if (endstop
== NULL
)
5511 as_bad ("missing do");
5512 ignore_rest_of_line ();
5515 if (endstop
> endstart
5516 && (endstop
[-1] == ' ' || endstop
[-1] == '\t'))
5522 bystop
= bystart
+ 2;
5527 bystart
= input_line_pointer
;
5531 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5533 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
5534 && (input_line_pointer
[2] == '.'
5535 || ! is_part_of_name (input_line_pointer
[2])))
5537 bystop
= input_line_pointer
;
5538 input_line_pointer
+= 2;
5541 ++input_line_pointer
;
5545 as_bad ("missing do");
5546 ignore_rest_of_line ();
5549 if (bystop
> bystart
5550 && (bystop
[-1] == ' ' || bystop
[-1] == '\t'))
5554 if (*input_line_pointer
!= '.')
5558 extent
= input_line_pointer
[1];
5559 input_line_pointer
+= 2;
5562 /* We have fully parsed the FOR operands. Now build the loop. */
5564 n
= push_mri_control (mri_for
);
5566 buf
= (char *) xmalloc (50 + (input_line_pointer
- varstart
));
5577 memcpy (s
, initstart
, initstop
- initstart
);
5578 s
+= initstop
- initstart
;
5580 memcpy (s
, varstart
, varstop
- varstart
);
5581 s
+= varstop
- varstart
;
5595 memcpy (s
, endstart
, endstop
- endstart
);
5596 s
+= endstop
- endstart
;
5598 memcpy (s
, varstart
, varstop
- varstart
);
5599 s
+= varstop
- varstart
;
5607 sprintf (buf
, "blt%s %s", ex
, n
->bottom
);
5609 sprintf (buf
, "bgt%s %s", ex
, n
->bottom
);
5612 /* Put together the add or sub instruction used by ENDF. */
5622 memcpy (s
, bystart
, bystop
- bystart
);
5623 s
+= bystop
- bystart
;
5625 memcpy (s
, varstart
, varstop
- varstart
);
5626 s
+= varstop
- varstart
;
5632 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5633 ++input_line_pointer
;
5636 demand_empty_rest_of_line ();
5639 /* Handle the MRI ENDF pseudo-op. */
5645 if (mri_control_stack
== NULL
5646 || mri_control_stack
->type
!= mri_for
)
5648 as_bad ("endf without for");
5649 ignore_rest_of_line ();
5653 colon (mri_control_stack
->next
);
5655 md_assemble (mri_control_stack
->incr
);
5657 sprintf (mri_control_stack
->incr
, "bra %s", mri_control_stack
->top
);
5658 md_assemble (mri_control_stack
->incr
);
5660 free (mri_control_stack
->incr
);
5662 colon (mri_control_stack
->bottom
);
5668 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5669 ++input_line_pointer
;
5672 demand_empty_rest_of_line ();
5675 /* Handle the MRI REPEAT pseudo-op. */
5678 s_mri_repeat (ignore
)
5681 struct mri_control_info
*n
;
5683 n
= push_mri_control (mri_repeat
);
5687 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5688 ++input_line_pointer
;
5690 demand_empty_rest_of_line ();
5693 /* Handle the MRI UNTIL pseudo-op. */
5701 if (mri_control_stack
== NULL
5702 || mri_control_stack
->type
!= mri_repeat
)
5704 as_bad ("until without repeat");
5705 ignore_rest_of_line ();
5709 colon (mri_control_stack
->next
);
5711 for (s
= input_line_pointer
; ! is_end_of_line
[(unsigned char) *s
]; s
++)
5714 parse_mri_control_expression (s
, qual
, (const char *) NULL
,
5715 mri_control_stack
->top
, '\0');
5717 colon (mri_control_stack
->bottom
);
5719 input_line_pointer
= s
;
5723 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5724 ++input_line_pointer
;
5727 demand_empty_rest_of_line ();
5730 /* Handle the MRI WHILE pseudo-op. */
5738 struct mri_control_info
*n
;
5740 s
= input_line_pointer
;
5741 while (! is_end_of_line
[(unsigned char) *s
]
5742 && (! flag_mri
|| *s
!= '*'))
5745 while (*s
== ' ' || *s
== '\t')
5747 if (s
- input_line_pointer
> 1
5750 if (s
- input_line_pointer
< 2
5751 || strncasecmp (s
- 1, "DO", 2) != 0)
5753 as_bad ("missing do");
5754 ignore_rest_of_line ();
5758 n
= push_mri_control (mri_while
);
5762 parse_mri_control_expression (s
- 1, qual
, (const char *) NULL
, n
->bottom
,
5763 s
[1] == '.' ? s
[2] : '\0');
5765 input_line_pointer
= s
+ 1;
5766 if (*input_line_pointer
== '.')
5767 input_line_pointer
+= 2;
5771 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5772 ++input_line_pointer
;
5775 demand_empty_rest_of_line ();
5778 /* Handle the MRI ENDW pseudo-op. */
5786 if (mri_control_stack
== NULL
5787 || mri_control_stack
->type
!= mri_while
)
5789 as_bad ("endw without while");
5790 ignore_rest_of_line ();
5794 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->next
));
5795 sprintf (buf
, "bra %s", mri_control_stack
->next
);
5799 colon (mri_control_stack
->bottom
);
5805 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5806 ++input_line_pointer
;
5809 demand_empty_rest_of_line ();
5814 * Invocation line includes a switch not recognized by the base assembler.
5815 * See if it's a processor-specific option. These are:
5817 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
5818 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
5819 * Select the architecture. Instructions or features not
5820 * supported by the selected architecture cause fatal
5821 * errors. More than one may be specified. The default is
5822 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
5823 * for -m68000, and -m68882 is a synonym for -m68881.
5824 * -[A]m[c]no-68851, -[A]m[c]no-68881
5825 * Don't accept 688?1 instructions. (The "c" is kind of silly,
5826 * so don't use or document it, but that's the way the parsing
5829 * -pic Indicates PIC.
5830 * -k Indicates PIC. (Sun 3 only.)
5835 CONST
char *md_shortopts
= "lSA:m:kQ:V";
5837 CONST
char *md_shortopts
= "lSA:m:k";
5840 struct option md_longopts
[] = {
5841 #define OPTION_PIC (OPTION_MD_BASE)
5842 {"pic", no_argument
, NULL
, OPTION_PIC
},
5843 #define OPTION_REGISTER_PREFIX_OPTIONAL (OPTION_MD_BASE + 1)
5844 {"register-prefix-optional", no_argument
, NULL
,
5845 OPTION_REGISTER_PREFIX_OPTIONAL
},
5846 {NULL
, no_argument
, NULL
, 0}
5848 size_t md_longopts_size
= sizeof(md_longopts
);
5851 md_parse_option (c
, arg
)
5857 case 'l': /* -l means keep external to 2 bit offset
5858 rather than 16 bit one */
5859 flag_short_refs
= 1;
5862 case 'S': /* -S means that jbsr's always turn into
5864 flag_long_jumps
= 1;
5870 /* intentional fall-through */
5873 if (arg
[0] == 'n' && arg
[1] == 'o' && arg
[2] == '-')
5877 const char *oarg
= arg
;
5883 if (arg
[0] == 'c' && arg
[1] == '6')
5886 for (i
= 0; i
< n_archs
; i
++)
5887 if (!strcmp (arg
, archs
[i
].name
))
5892 as_bad ("unrecognized option `%s'", oarg
);
5895 arch
= archs
[i
].arch
;
5898 else if (arch
== m68851
)
5907 if (arg
[0] == 'c' && arg
[1] == '6')
5910 for (i
= 0; i
< n_archs
; i
++)
5911 if (!strcmp (arg
, archs
[i
].name
))
5913 unsigned long arch
= archs
[i
].arch
;
5914 if (cpu_of_arch (arch
))
5915 /* It's a cpu spec. */
5917 current_architecture
&= ~m68000up
;
5918 current_architecture
|= arch
;
5920 else if (arch
== m68881
)
5922 current_architecture
|= m68881
;
5925 else if (arch
== m68851
)
5927 current_architecture
|= m68851
;
5937 as_bad ("unrecognized architecture specification `%s'", arg
);
5946 break; /* -pic, Position Independent Code */
5948 case OPTION_REGISTER_PREFIX_OPTIONAL
:
5949 flag_reg_prefix_optional
= 1;
5964 md_show_usage (stream
)
5969 -l use 1 word for refs to undefined symbols [default 2]\n\
5970 -m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060\n\
5971 | -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360\n\
5973 specify variant of 680X0 architecture [default 68020]\n\
5974 -m68881 | -m68882 | -mno-68881 | -mno-68882\n\
5975 target has/lacks floating-point coprocessor\n\
5976 [default yes for 68020, 68030, and cpu32]\n");
5978 -m68851 | -mno-68851\n\
5979 target has/lacks memory-management unit coprocessor\n\
5980 [default yes for 68020 and up]\n\
5981 -pic, -k generate position independent code\n\
5982 -S turn jbsr into jsr\n\
5983 --register-prefix-optional\n\
5984 recognize register names without prefix character\n");
5989 /* TEST2: Test md_assemble() */
5990 /* Warning, this routine probably doesn't work anymore */
5994 struct m68k_it the_ins
;
6002 if (!gets (buf
) || !*buf
)
6004 if (buf
[0] == '|' || buf
[1] == '.')
6006 for (cp
= buf
; *cp
; cp
++)
6011 memset (&the_ins
, '\0', sizeof (the_ins
));
6012 m68k_ip (&the_ins
, buf
);
6015 printf ("Error %s in %s\n", the_ins
.error
, buf
);
6019 printf ("Opcode(%d.%s): ", the_ins
.numo
, the_ins
.args
);
6020 for (n
= 0; n
< the_ins
.numo
; n
++)
6021 printf (" 0x%x", the_ins
.opcode
[n
] & 0xffff);
6023 print_the_insn (&the_ins
.opcode
[0], stdout
);
6024 (void) putchar ('\n');
6026 for (n
= 0; n
< strlen (the_ins
.args
) / 2; n
++)
6028 if (the_ins
.operands
[n
].error
)
6030 printf ("op%d Error %s in %s\n", n
, the_ins
.operands
[n
].error
, buf
);
6033 printf ("mode %d, reg %d, ", the_ins
.operands
[n
].mode
, the_ins
.operands
[n
].reg
);
6034 if (the_ins
.operands
[n
].b_const
)
6035 printf ("Constant: '%.*s', ", 1 + the_ins
.operands
[n
].e_const
- the_ins
.operands
[n
].b_const
, the_ins
.operands
[n
].b_const
);
6036 printf ("ireg %d, isiz %d, imul %d, ", the_ins
.operands
[n
].ireg
, the_ins
.operands
[n
].isiz
, the_ins
.operands
[n
].imul
);
6037 if (the_ins
.operands
[n
].b_iadd
)
6038 printf ("Iadd: '%.*s',", 1 + the_ins
.operands
[n
].e_iadd
- the_ins
.operands
[n
].b_iadd
, the_ins
.operands
[n
].b_iadd
);
6039 (void) putchar ('\n');
6051 while (*str
&& *str
!= ' ')
6053 if (str
[-1] == ':' || str
[1] == '=')
6060 /* Possible states for relaxation:
6062 0 0 branch offset byte (bra, etc)
6066 1 0 indexed offsets byte a0@(32,d4:w:1) etc
6070 2 0 two-offset index word-word a0@(32,d4)@(45) etc
6077 /* We have no need to default values of symbols. */
6081 md_undefined_symbol (name
)
6087 /* Round up a section size to the appropriate boundary. */
6089 md_section_align (segment
, size
)
6093 return size
; /* Byte alignment is fine */
6096 /* Exactly what point is a PC-relative offset relative TO?
6097 On the 68k, it is relative to the address of the first extension
6098 word. The difference between the addresses of the offset and the
6099 first extension word is stored in fx_pcrel_adjust. */
6101 md_pcrel_from (fixP
)
6106 /* Because fx_pcrel_adjust is a char, and may be unsigned, we store
6108 adjust
= fixP
->fx_pcrel_adjust
;
6111 return fixP
->fx_where
+ fixP
->fx_frag
->fr_address
- adjust
;
6114 #ifndef BFD_ASSEMBLER
6117 tc_coff_symbol_emit_hook (ignore
)
6123 tc_coff_sizemachdep (frag
)
6126 switch (frag
->fr_subtype
& 0x3)
6141 /* end of tc-m68k.c */