1 /* tc-m68k.c -- Assemble for the m68k family
2 Copyright (C) 1987, 91, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
27 #include "opcode/m68k.h"
28 #include "m68k-parse.h"
30 /* This array holds the chars that always start a comment. If the
31 pre-processor is disabled, these aren't very useful */
33 CONST
char comment_chars
[] = "|#";
35 CONST
char comment_chars
[] = "|";
38 /* This array holds the chars that only start a comment at the beginning of
39 a line. If the line seems to have the form '# 123 filename'
40 .line and .file directives will appear in the pre-processed output */
41 /* Note that input_file.c hand checks for '#' at the beginning of the
42 first line of the input file. This is because the compiler outputs
43 #NO_APP at the beginning of its output. */
44 /* Also note that comments like this one will always work. */
45 CONST
char line_comment_chars
[] = "#";
47 CONST
char line_separator_chars
[] = "";
49 /* Chars that can be used to separate mant from exp in floating point nums */
50 CONST
char EXP_CHARS
[] = "eE";
52 /* Chars that mean this number is a floating point constant, as
53 in "0f12.456" or "0d1.2345e12". */
55 CONST
char FLT_CHARS
[] = "rRsSfFdDxXeEpP";
57 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
58 changed in read.c . Ideally it shouldn't have to know about it at all,
59 but nothing is ideal around here. */
61 const int md_reloc_size
= 8; /* Size of relocation record */
63 /* Are we trying to generate PIC code? If so, absolute references
64 ought to be made into linkage table references or pc-relative
68 static int flag_short_refs
; /* -l option */
69 static int flag_long_jumps
; /* -S option */
71 #ifdef REGISTER_PREFIX_OPTIONAL
72 int flag_reg_prefix_optional
= REGISTER_PREFIX_OPTIONAL
;
74 int flag_reg_prefix_optional
;
77 /* The floating point coprocessor to use by default. */
78 static enum m68k_register m68k_float_copnum
= COP1
;
80 /* If this is non-zero, then references to number(%pc) will be taken
81 to refer to number, rather than to %pc + number. */
82 static int m68k_abspcadd
;
84 /* If this is non-zero, then the quick forms of the move, add, and sub
85 instructions are used when possible. */
86 static int m68k_quick
= 1;
88 /* If this is non-zero, then if the size is not specified for a base
89 or outer displacement, the assembler assumes that the size should
91 static int m68k_rel32
= 1;
93 /* Its an arbitrary name: This means I don't approve of it */
94 /* See flames below */
95 static struct obstack robyn
;
97 #define TAB(x,y) (((x)<<2)+(y))
98 #define TABTYPE(xy) ((xy) >> 2)
104 /* Case `g' except when BCC68000 is applicable. */
106 /* Coprocessor branches. */
108 /* Mode 7.2 -- program counter indirect with (16-bit) displacement,
109 supported on all cpus. Widens to 32-bit absolute. */
111 /* For inserting an extra jmp instruction with long offset on 68000,
112 for expanding conditional branches. (Not bsr or bra.) Since the
113 68000 doesn't support 32-bit displacements for conditional
114 branches, we fake it by reversing the condition and branching
115 around a jmp with an absolute long operand. */
117 /* For the DBcc "instructions". If the displacement requires 32 bits,
118 the branch-around-a-jump game is played here too. */
120 /* Not currently used? */
122 /* Mode AINDX (apc-relative) using PC, with variable target, might fit
128 const char *m_operands
;
129 unsigned long m_opcode
;
133 struct m68k_incant
*m_next
;
136 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
137 #define gettwo(x) (((x)->m_opcode)&0xffff)
139 static const enum m68k_register m68000_control_regs
[] = { 0 };
140 static const enum m68k_register m68010_control_regs
[] = {
144 static const enum m68k_register m68020_control_regs
[] = {
145 SFC
, DFC
, USP
, VBR
, CACR
, CAAR
, MSP
, ISP
,
148 static const enum m68k_register m68040_control_regs
[] = {
149 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
,
150 USP
, VBR
, MSP
, ISP
, MMUSR
, URP
, SRP
,
153 static const enum m68k_register m68060_control_regs
[] = {
154 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
, BUSCR
,
155 USP
, VBR
, URP
, SRP
, PCR
,
158 #define cpu32_control_regs m68010_control_regs
160 static const enum m68k_register
*control_regs
;
162 /* internal form of a 68020 instruction */
166 const char *args
; /* list of opcode info */
169 int numo
; /* Number of shorts in opcode */
172 struct m68k_op operands
[6];
174 int nexp
; /* number of exprs in use */
175 struct m68k_exp exprs
[4];
177 int nfrag
; /* Number of frags we have to produce */
180 int fragoff
; /* Where in the current opcode the frag ends */
187 int nrel
; /* Num of reloc strucs in use */
194 /* In a pc relative address the difference between the address
195 of the offset and the address that the offset is relative
196 to. This depends on the addressing mode. Basically this
197 is the value to put in the offset field to address the
198 first byte of the offset, without regarding the special
199 significance of some values (in the branch instruction, for
203 reloc
[5]; /* Five is enough??? */
206 #define cpu_of_arch(x) ((x) & m68000up)
207 #define float_of_arch(x) ((x) & mfloat)
208 #define mmu_of_arch(x) ((x) & mmmu)
210 static struct m68k_it the_ins
; /* the instruction being assembled */
212 #define op(ex) ((ex)->exp.X_op)
213 #define adds(ex) ((ex)->exp.X_add_symbol)
214 #define subs(ex) ((ex)->exp.X_op_symbol)
215 #define offs(ex) ((ex)->exp.X_add_number)
217 /* Macros for adding things to the m68k_it struct */
219 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
221 /* Like addword, but goes BEFORE general operands */
225 struct m68k_incant
*opcode
;
228 for(z
=the_ins
.numo
;z
>opcode
->m_codenum
;--z
)
229 the_ins
.opcode
[z
]=the_ins
.opcode
[z
-1];
230 for(z
=0;z
<the_ins
.nrel
;z
++)
231 the_ins
.reloc
[z
].n
+=2;
232 for (z
= 0; z
< the_ins
.nfrag
; z
++)
233 the_ins
.fragb
[z
].fragoff
++;
234 the_ins
.opcode
[opcode
->m_codenum
]=w
;
238 /* The numo+1 kludge is so we can hit the low order byte of the prev word.
241 add_fix (width
, exp
, pc_rel
, pc_fix
)
243 struct m68k_exp
*exp
;
247 the_ins
.reloc
[the_ins
.nrel
].n
= (((width
)=='B')
251 : (the_ins
.numo
*2)));
252 the_ins
.reloc
[the_ins
.nrel
].exp
= exp
->exp
;
253 the_ins
.reloc
[the_ins
.nrel
].wid
= width
;
254 the_ins
.reloc
[the_ins
.nrel
].pcrel_fix
= pc_fix
;
255 the_ins
.reloc
[the_ins
.nrel
++].pcrel
= pc_rel
;
258 /* Cause an extra frag to be generated here, inserting up to 10 bytes
259 (that value is chosen in the frag_var call in md_assemble). TYPE
260 is the subtype of the frag to be generated; its primary type is
261 rs_machine_dependent.
263 The TYPE parameter is also used by md_convert_frag_1 and
264 md_estimate_size_before_relax. The appropriate type of fixup will
265 be emitted by md_convert_frag_1.
267 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
269 add_frag(add
,off
,type
)
274 the_ins
.fragb
[the_ins
.nfrag
].fragoff
=the_ins
.numo
;
275 the_ins
.fragb
[the_ins
.nfrag
].fadd
=add
;
276 the_ins
.fragb
[the_ins
.nfrag
].foff
=off
;
277 the_ins
.fragb
[the_ins
.nfrag
++].fragty
=type
;
281 (op (ex) != O_constant && op (ex) != O_big)
283 static char *crack_operand
PARAMS ((char *str
, struct m68k_op
*opP
));
284 static int get_num
PARAMS ((struct m68k_exp
*exp
, int ok
));
285 static int reverse_16_bits
PARAMS ((int in
));
286 static int reverse_8_bits
PARAMS ((int in
));
287 static void install_gen_operand
PARAMS ((int mode
, int val
));
288 static void install_operand
PARAMS ((int mode
, int val
));
289 static void s_bss
PARAMS ((int));
290 static void s_data1
PARAMS ((int));
291 static void s_data2
PARAMS ((int));
292 static void s_even
PARAMS ((int));
293 static void s_proc
PARAMS ((int));
294 static void mri_chip
PARAMS ((void));
295 static void s_chip
PARAMS ((int));
296 static void s_fopt
PARAMS ((int));
297 static void s_opt
PARAMS ((int));
298 static void s_reg
PARAMS ((int));
299 static void s_restore
PARAMS ((int));
300 static void s_save
PARAMS ((int));
301 static void s_mri_if
PARAMS ((int));
302 static void s_mri_else
PARAMS ((int));
303 static void s_mri_endi
PARAMS ((int));
304 static void s_mri_break
PARAMS ((int));
305 static void s_mri_next
PARAMS ((int));
306 static void s_mri_for
PARAMS ((int));
307 static void s_mri_endf
PARAMS ((int));
308 static void s_mri_repeat
PARAMS ((int));
309 static void s_mri_until
PARAMS ((int));
310 static void s_mri_while
PARAMS ((int));
311 static void s_mri_endw
PARAMS ((int));
313 static int current_architecture
;
320 static const struct m68k_cpu archs
[] = {
330 /* Aliases (effectively, so far as gas is concerned) for the above
335 { m68000
, "68ec000" },
336 { m68000
, "68hc000" },
337 { m68000
, "68hc001" },
338 { m68020
, "68ec020" },
339 { m68030
, "68ec030" },
340 { m68040
, "68ec040" },
350 static const int n_archs
= sizeof (archs
) / sizeof (archs
[0]);
352 /* BCC68000 is for patching in an extra jmp instruction for long offsets
353 on the 68000. The 68000 doesn't support long branches with branchs */
355 /* This table desribes how you change sizes for the various types of variable
356 size expressions. This version only supports two kinds. */
358 /* Note that calls to frag_var need to specify the maximum expansion
359 needed; this is currently 10 bytes for DBCC. */
362 How far Forward this mode will reach:
363 How far Backward this mode will reach:
364 How many bytes this mode will add to the size of the frag
365 Which mode to go to if the offset won't fit in this one
367 relax_typeS md_relax_table
[] =
369 {1, 1, 0, 0}, /* First entries aren't used */
370 {1, 1, 0, 0}, /* For no good reason except */
371 {1, 1, 0, 0}, /* that the VAX doesn't either */
374 {(127), (-128), 0, TAB (ABRANCH
, SHORT
)},
375 {(32767), (-32768), 2, TAB (ABRANCH
, LONG
)},
379 {1, 1, 0, 0}, /* FBRANCH doesn't come BYTE */
380 {(32767), (-32768), 2, TAB (FBRANCH
, LONG
)},
384 {1, 1, 0, 0}, /* PCREL doesn't come BYTE */
385 {(32767), (-32768), 2, TAB (PCREL
, LONG
)},
389 {(127), (-128), 0, TAB (BCC68000
, SHORT
)},
390 {(32767), (-32768), 2, TAB (BCC68000
, LONG
)},
391 {0, 0, 6, 0}, /* jmp long space */
394 {1, 1, 0, 0}, /* DBCC doesn't come BYTE */
395 {(32767), (-32768), 2, TAB (DBCC
, LONG
)},
396 {0, 0, 10, 0}, /* bra/jmp long space */
399 {1, 1, 0, 0}, /* PCLEA doesn't come BYTE */
400 {32767, -32768, 2, TAB (PCLEA
, LONG
)},
404 /* For, e.g., jmp pcrel indexed. */
405 {125, -130, 0, TAB (PCINDEX
, SHORT
)},
406 {32765, -32770, 2, TAB (PCINDEX
, LONG
)},
411 /* These are the machine dependent pseudo-ops. These are included so
412 the assembler can work on the output from the SUN C compiler, which
416 /* This table describes all the machine specific pseudo-ops the assembler
417 has to support. The fields are:
418 pseudo-op name without dot
419 function to call to execute this pseudo-op
420 Integer arg to pass to the function
422 CONST pseudo_typeS md_pseudo_table
[] =
424 {"data1", s_data1
, 0},
425 {"data2", s_data2
, 0},
428 {"skip", s_space
, 0},
431 {"align", s_align_bytes
, 0},
434 {"swbeg", s_ignore
, 0},
437 /* The following pseudo-ops are supported for MRI compatibility. */
439 {"comline", s_space
, 1},
441 {"mask2", s_ignore
, 0},
444 {"restore", s_restore
, 0},
448 {"if.b", s_mri_if
, 'b'},
449 {"if.w", s_mri_if
, 'w'},
450 {"if.l", s_mri_if
, 'l'},
451 {"else", s_mri_else
, 0},
452 {"else.s", s_mri_else
, 's'},
453 {"else.l", s_mri_else
, 'l'},
454 {"endi", s_mri_endi
, 0},
455 {"break", s_mri_break
, 0},
456 {"break.s", s_mri_break
, 's'},
457 {"break.l", s_mri_break
, 'l'},
458 {"next", s_mri_next
, 0},
459 {"next.s", s_mri_next
, 's'},
460 {"next.l", s_mri_next
, 'l'},
461 {"for", s_mri_for
, 0},
462 {"for.b", s_mri_for
, 'b'},
463 {"for.w", s_mri_for
, 'w'},
464 {"for.l", s_mri_for
, 'l'},
465 {"endf", s_mri_endf
, 0},
466 {"repeat", s_mri_repeat
, 0},
467 {"until", s_mri_until
, 0},
468 {"until.b", s_mri_until
, 'b'},
469 {"until.w", s_mri_until
, 'w'},
470 {"until.l", s_mri_until
, 'l'},
471 {"while", s_mri_while
, 0},
472 {"while.b", s_mri_while
, 'b'},
473 {"while.w", s_mri_while
, 'w'},
474 {"while.l", s_mri_while
, 'l'},
475 {"endw", s_mri_endw
, 0},
481 /* The mote pseudo ops are put into the opcode table, since they
482 don't start with a . they look like opcodes to gas.
484 extern void obj_coff_section ();
486 CONST pseudo_typeS mote_pseudo_table
[] =
499 {"xdef", s_globl
, 0},
500 {"align", s_align_ptwo
, 0},
502 {"sect", obj_coff_section
, 0},
503 {"section", obj_coff_section
, 0},
508 #define issbyte(x) ((x)>=-128 && (x)<=127)
509 #define isubyte(x) ((x)>=0 && (x)<=255)
510 #define issword(x) ((x)>=-32768 && (x)<=32767)
511 #define isuword(x) ((x)>=0 && (x)<=65535)
513 #define isbyte(x) ((x)>= -255 && (x)<=255)
514 #define isword(x) ((x)>=-32768 && (x)<=65535)
515 #define islong(x) (1)
517 extern char *input_line_pointer
;
519 static char mklower_table
[256];
520 #define mklower(c) (mklower_table[(unsigned char)(c)])
521 static char notend_table
[256];
522 static char alt_notend_table
[256];
524 (! (notend_table[(unsigned char) *s] \
526 && alt_notend_table[(unsigned char) s[1]])))
528 #if defined (M68KCOFF) && !defined (BFD_ASSEMBLER)
530 #ifdef NO_PCREL_RELOCS
533 make_pcrel_absolute(fixP
, add_number
)
537 register unsigned char *opcode
= fixP
->fx_frag
->fr_opcode
;
539 /* rewrite the PC relative instructions to absolute address ones.
540 * these are rumoured to be faster, and the apollo linker refuses
541 * to deal with the PC relative relocations.
543 if (opcode
[0] == 0x60 && opcode
[1] == 0xff) /* BRA -> JMP */
548 else if (opcode
[0] == 0x61 && opcode
[1] == 0xff) /* BSR -> JSR */
554 as_fatal ("Unknown PC relative instruction");
559 #endif /* NO_PCREL_RELOCS */
562 tc_coff_fix2rtype (fixP
)
565 #ifdef NO_PCREL_RELOCS
566 know (fixP
->fx_pcrel
== 0);
567 return (fixP
->fx_size
== 1 ? R_RELBYTE
568 : fixP
->fx_size
== 2 ? R_DIR16
571 return (fixP
->fx_pcrel
?
572 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
573 fixP
->fx_size
== 2 ? R_PCRWORD
:
575 (fixP
->fx_size
== 1 ? R_RELBYTE
:
576 fixP
->fx_size
== 2 ? R_RELWORD
:
586 tc_gen_reloc (section
, fixp
)
591 bfd_reloc_code_real_type code
;
593 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
594 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
596 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
597 MAP (1, 0, BFD_RELOC_8
);
598 MAP (2, 0, BFD_RELOC_16
);
599 MAP (4, 0, BFD_RELOC_32
);
600 MAP (1, 1, BFD_RELOC_8_PCREL
);
601 MAP (2, 1, BFD_RELOC_16_PCREL
);
602 MAP (4, 1, BFD_RELOC_32_PCREL
);
607 reloc
= (arelent
*) bfd_alloc_by_size_t (stdoutput
, sizeof (arelent
));
609 reloc
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
610 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
612 reloc
->addend
= fixp
->fx_addnumber
;
616 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
617 assert (reloc
->howto
!= 0);
622 #endif /* BFD_ASSEMBLER */
624 /* Handle of the OPCODE hash table. NULL means any use before
625 m68k_ip_begin() will crash. */
626 static struct hash_control
*op_hash
;
628 /* Assemble an m68k instruction. */
635 register struct m68k_op
*opP
;
636 register struct m68k_incant
*opcode
;
637 register const char *s
;
638 register int tmpreg
= 0, baseo
= 0, outro
= 0, nextword
;
639 char *pdot
, *pdotmove
;
640 enum m68k_size siz1
, siz2
;
644 char *crack_operand ();
645 LITTLENUM_TYPE words
[6];
646 LITTLENUM_TYPE
*wordp
;
647 unsigned long ok_arch
= 0;
649 if (*instring
== ' ')
650 instring
++; /* skip leading whitespace */
652 /* Scan up to end of operation-code, which MUST end in end-of-string
653 or exactly 1 space. */
655 for (p
= instring
; *p
!= '\0'; p
++)
665 the_ins
.error
= "No operator";
669 /* p now points to the end of the opcode name, probably whitespace.
670 Make sure the name is null terminated by clobbering the
671 whitespace, look it up in the hash table, then fix it back.
672 Remove a dot, first, since the opcode tables have none. */
675 for (pdotmove
= pdot
; pdotmove
< p
; pdotmove
++)
676 *pdotmove
= pdotmove
[1];
682 opcode
= (struct m68k_incant
*) hash_find (op_hash
, instring
);
687 for (pdotmove
= p
; pdotmove
> pdot
; pdotmove
--)
688 *pdotmove
= pdotmove
[-1];
695 the_ins
.error
= "Unknown operator";
699 /* found a legitimate opcode, start matching operands */
703 if (opcode
->m_operands
== 0)
705 char *old
= input_line_pointer
;
707 input_line_pointer
= p
;
708 /* Ahh - it's a motorola style psuedo op */
709 mote_pseudo_table
[opcode
->m_opnum
].poc_handler
710 (mote_pseudo_table
[opcode
->m_opnum
].poc_val
);
711 input_line_pointer
= old
;
717 for (opP
= &the_ins
.operands
[0]; *p
; opP
++)
719 p
= crack_operand (p
, opP
);
723 the_ins
.error
= opP
->error
;
728 opsfound
= opP
- &the_ins
.operands
[0];
730 /* This ugly hack is to support the floating pt opcodes in their
731 standard form. Essentially, we fake a first enty of type COP#1 */
732 if (opcode
->m_operands
[0] == 'I')
736 for (n
= opsfound
; n
> 0; --n
)
737 the_ins
.operands
[n
] = the_ins
.operands
[n
- 1];
739 memset ((char *) (&the_ins
.operands
[0]), '\0',
740 sizeof (the_ins
.operands
[0]));
741 the_ins
.operands
[0].mode
= CONTROL
;
742 the_ins
.operands
[0].reg
= m68k_float_copnum
;
746 /* We've got the operands. Find an opcode that'll accept them */
749 /* If we didn't get the right number of ops, or we have no
750 common model with this pattern then reject this pattern. */
752 if (opsfound
!= opcode
->m_opnum
753 || ((opcode
->m_arch
& current_architecture
) == 0))
756 ok_arch
|= opcode
->m_arch
;
760 for (s
= opcode
->m_operands
, opP
= &the_ins
.operands
[0];
764 /* Warning: this switch is huge! */
765 /* I've tried to organize the cases into this order:
766 non-alpha first, then alpha by letter. Lower-case
767 goes directly before uppercase counterpart. */
768 /* Code with multiple case ...: gets sorted by the lowest
769 case ... it belongs to. I hope this makes sense. */
809 if (opP
->mode
!= IMMED
)
812 && ! isvar (&opP
->disp
)
813 && (opP
->disp
.exp
.X_op
!= O_constant
814 || ! isbyte (opP
->disp
.exp
.X_add_number
)))
817 && ! isvar (&opP
->disp
)
818 && (opP
->disp
.exp
.X_op
!= O_constant
819 || ! isword (opP
->disp
.exp
.X_add_number
)))
825 if (opP
->mode
!= IMMED
)
830 if (opP
->mode
== AREG
831 || opP
->mode
== CONTROL
832 || opP
->mode
== FPREG
833 || opP
->mode
== IMMED
834 || opP
->mode
== REGLST
835 || (opP
->mode
!= ABSL
837 || opP
->reg
== ZPC
)))
842 if (opP
->mode
== CONTROL
843 || opP
->mode
== FPREG
844 || opP
->mode
== REGLST
845 || (opP
->mode
!= ABSL
846 && opP
->mode
!= IMMED
848 || opP
->reg
== ZPC
)))
876 if (opP
->mode
== CONTROL
877 || opP
->mode
== FPREG
878 || opP
->mode
== REGLST
)
883 if (opP
->mode
!= AINC
)
888 if (opP
->mode
!= ADEC
)
938 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
959 case '~': /* For now! (JF FOO is this right?) */
981 if (opP
->mode
!= CONTROL
982 || (opP
->reg
!= TT0
&& opP
->reg
!= TT1
))
987 if (opP
->mode
!= AREG
)
992 if (opP
->mode
!= AINDR
)
997 if (opP
->mode
!= ABSL
999 && strncmp (instring
, "jbsr", 4) == 0))
1004 if (opP
->mode
!= CONTROL
|| opP
->reg
!= CCR
)
1009 if (opP
->mode
!= DISP
1011 || opP
->reg
> ADDR7
)
1016 if (opP
->mode
!= DREG
)
1021 if (opP
->mode
!= FPREG
)
1026 if (opP
->mode
!= CONTROL
1033 if (opP
->mode
!= CONTROL
1035 || opP
->reg
> last_movec_reg
)
1039 const enum m68k_register
*rp
;
1040 for (rp
= control_regs
; *rp
; rp
++)
1041 if (*rp
== opP
->reg
)
1049 if (opP
->mode
!= IMMED
)
1055 if (opP
->mode
== DREG
1056 || opP
->mode
== AREG
1057 || opP
->mode
== FPREG
)
1066 opP
->mask
= 1 << (opP
->reg
- DATA0
);
1069 opP
->mask
= 1 << (opP
->reg
- ADDR0
+ 8);
1072 opP
->mask
= 1 << (opP
->reg
- FP0
+ 16);
1080 else if (opP
->mode
== CONTROL
)
1089 opP
->mask
= 1 << 24;
1092 opP
->mask
= 1 << 25;
1095 opP
->mask
= 1 << 26;
1104 else if (opP
->mode
== ABSL
1105 && opP
->disp
.size
== SIZE_UNSPEC
1106 && opP
->disp
.exp
.X_op
== O_constant
)
1108 /* This is what the MRI REG pseudo-op generates. */
1110 opP
->mask
= opP
->disp
.exp
.X_add_number
;
1112 else if (opP
->mode
!= REGLST
)
1114 else if (s
[1] == '8' && (opP
->mask
& 0x0ffffff) != 0)
1116 else if (s
[1] == '3' && (opP
->mask
& 0x7000000) != 0)
1121 if (opP
->mode
!= IMMED
)
1123 else if (opP
->disp
.exp
.X_op
!= O_constant
1124 || ! issbyte (opP
->disp
.exp
.X_add_number
))
1126 else if (! m68k_quick
1127 && instring
[3] != 'q'
1128 && instring
[4] != 'q')
1133 if (opP
->mode
!= DREG
&& opP
->mode
!= IMMED
)
1138 if (opP
->mode
!= IMMED
)
1140 else if (opP
->disp
.exp
.X_op
!= O_constant
1141 || opP
->disp
.exp
.X_add_number
< 1
1142 || opP
->disp
.exp
.X_add_number
> 8)
1144 else if (! m68k_quick
1145 && (strncmp (instring
, "add", 3) == 0
1146 || strncmp (instring
, "sub", 3) == 0)
1147 && instring
[3] != 'q')
1152 if (opP
->mode
!= DREG
&& opP
->mode
!= AREG
)
1157 if (opP
->mode
!= AINDR
1158 && (opP
->mode
!= BASE
1160 && opP
->reg
!= ZADDR0
)
1161 || opP
->disp
.exp
.X_op
!= O_absent
1162 || ((opP
->index
.reg
< DATA0
1163 || opP
->index
.reg
> DATA7
)
1164 && (opP
->index
.reg
< ADDR0
1165 || opP
->index
.reg
> ADDR7
))
1166 || opP
->index
.size
!= SIZE_UNSPEC
1167 || opP
->index
.scale
!= 1))
1172 if (opP
->mode
!= CONTROL
1173 || ! (opP
->reg
== FPI
1175 || opP
->reg
== FPC
))
1180 if (opP
->mode
!= CONTROL
|| opP
->reg
!= SR
)
1185 if (opP
->mode
!= IMMED
)
1187 else if (opP
->disp
.exp
.X_op
!= O_constant
1188 || opP
->disp
.exp
.X_add_number
< 0
1189 || opP
->disp
.exp
.X_add_number
> 7)
1194 if (opP
->mode
!= CONTROL
|| opP
->reg
!= USP
)
1198 /* JF these are out of order. We could put them
1199 in order if we were willing to put up with
1200 bunches of #ifdef m68851s in the code.
1202 Don't forget that you need these operands
1203 to use 68030 MMU instructions. */
1205 /* Memory addressing mode used by pflushr */
1207 if (opP
->mode
== CONTROL
1208 || opP
->mode
== FPREG
1209 || opP
->mode
== DREG
1210 || opP
->mode
== AREG
1211 || opP
->mode
== REGLST
)
1216 if (opP
->mode
!= CONTROL
1217 || (opP
->reg
!= SFC
&& opP
->reg
!= DFC
))
1222 if (opP
->mode
!= CONTROL
1232 if (opP
->mode
!= CONTROL
1238 if (opP
->mode
!= CONTROL
1241 && opP
->reg
!= CRP
))
1246 if (opP
->mode
!= CONTROL
1247 || (!(opP
->reg
>= BAD
&& opP
->reg
<= BAD
+ 7)
1248 && !(opP
->reg
>= BAC
&& opP
->reg
<= BAC
+ 7)))
1253 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PSR
)
1258 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PCSR
)
1263 if (opP
->mode
!= CONTROL
1270 } /* not a cache specifier. */
1274 if (opP
->mode
!= ABSL
)
1280 } /* switch on type of operand */
1284 } /* for each operand */
1285 } /* if immediately wrong */
1292 opcode
= opcode
->m_next
;
1297 && !(ok_arch
& current_architecture
))
1302 "invalid instruction for this architecture; needs ");
1303 cp
= buf
+ strlen (buf
);
1307 strcpy (cp
, "fpu (68040, 68060 or 68881/68882)");
1310 strcpy (cp
, "mmu (68030 or 68851)");
1313 strcpy (cp
, "68020 or higher");
1316 strcpy (cp
, "68000 or higher");
1319 strcpy (cp
, "68010 or higher");
1323 int got_one
= 0, idx
;
1324 for (idx
= 0; idx
< sizeof (archs
) / sizeof (archs
[0]);
1327 if (archs
[idx
].arch
& ok_arch
)
1331 strcpy (cp
, " or ");
1335 strcpy (cp
, archs
[idx
].name
);
1347 the_ins
.error
= "operands mismatch";
1349 } /* Fell off the end */
1354 /* now assemble it */
1356 the_ins
.args
= opcode
->m_operands
;
1357 the_ins
.numargs
= opcode
->m_opnum
;
1358 the_ins
.numo
= opcode
->m_codenum
;
1359 the_ins
.opcode
[0] = getone (opcode
);
1360 the_ins
.opcode
[1] = gettwo (opcode
);
1362 for (s
= the_ins
.args
, opP
= &the_ins
.operands
[0]; *s
; s
+= 2, opP
++)
1364 /* This switch is a doozy.
1365 Watch the first step; its a big one! */
1386 tmpreg
= 0x3c; /* 7.4 */
1387 if (strchr ("bwl", s
[1]))
1388 nextword
= get_num (&opP
->disp
, 80);
1390 nextword
= get_num (&opP
->disp
, 0);
1391 if (isvar (&opP
->disp
))
1392 add_fix (s
[1], &opP
->disp
, 0, 0);
1396 if (!isbyte (nextword
))
1397 opP
->error
= "operand out of range";
1402 if (!isword (nextword
))
1403 opP
->error
= "operand out of range";
1408 addword (nextword
>> 16);
1435 /* We gotta put out some float */
1436 if (op (&opP
->disp
) != O_big
)
1441 /* Can other cases happen here? */
1442 if (op (&opP
->disp
) != O_constant
)
1445 val
= (valueT
) offs (&opP
->disp
);
1449 generic_bignum
[gencnt
] = (LITTLENUM_TYPE
) val
;
1450 val
>>= LITTLENUM_NUMBER_OF_BITS
;
1454 offs (&opP
->disp
) = gencnt
;
1456 if (offs (&opP
->disp
) > 0)
1458 if (offs (&opP
->disp
) > baseo
)
1460 as_warn ("Bignum too big for %c format; truncated",
1462 offs (&opP
->disp
) = baseo
;
1464 baseo
-= offs (&opP
->disp
);
1467 for (wordp
= generic_bignum
+ offs (&opP
->disp
) - 1;
1468 offs (&opP
->disp
)--;
1473 gen_to_words (words
, baseo
, (long) outro
);
1474 for (wordp
= words
; baseo
--; wordp
++)
1478 tmpreg
= opP
->reg
- DATA
; /* 0.dreg */
1481 tmpreg
= 0x08 + opP
->reg
- ADDR
; /* 1.areg */
1484 tmpreg
= 0x10 + opP
->reg
- ADDR
; /* 2.areg */
1487 tmpreg
= 0x20 + opP
->reg
- ADDR
; /* 4.areg */
1490 tmpreg
= 0x18 + opP
->reg
- ADDR
; /* 3.areg */
1494 nextword
= get_num (&opP
->disp
, 80);
1497 && ! isvar (&opP
->disp
)
1500 opP
->disp
.exp
.X_op
= O_symbol
;
1501 #ifndef BFD_ASSEMBLER
1502 opP
->disp
.exp
.X_add_symbol
= &abs_symbol
;
1504 opP
->disp
.exp
.X_add_symbol
=
1505 section_symbol (absolute_section
);
1509 /* Force into index mode. Hope this works */
1511 /* We do the first bit for 32-bit displacements, and the
1512 second bit for 16 bit ones. It is possible that we
1513 should make the default be WORD instead of LONG, but
1514 I think that'd break GCC, so we put up with a little
1515 inefficiency for the sake of working output. */
1517 if (!issword (nextword
)
1518 || (isvar (&opP
->disp
)
1519 && ((opP
->disp
.size
== SIZE_UNSPEC
1520 && flag_short_refs
== 0
1521 && cpu_of_arch (current_architecture
) >= m68020
)
1522 || opP
->disp
.size
== SIZE_LONG
)))
1525 tmpreg
= 0x3B; /* 7.3 */
1527 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
1528 if (isvar (&opP
->disp
))
1534 add_fix ('l', &opP
->disp
, 1, 2);
1535 addword (0), addword (0);
1537 add_frag (adds (&opP
->disp
),
1539 TAB (PCLEA
, SZ_UNDEF
));
1546 add_fix ('l', &opP
->disp
, 0, 0);
1551 addword (nextword
>> 16);
1556 tmpreg
= 0x3A; /* 7.2 */
1558 tmpreg
= 0x28 + opP
->reg
- ADDR
; /* 5.areg */
1560 if (isvar (&opP
->disp
))
1564 add_fix ('w', &opP
->disp
, 1, 0);
1567 add_fix ('w', &opP
->disp
, 0, 0);
1577 baseo
= get_num (&opP
->disp
, 80);
1578 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
1579 outro
= get_num (&opP
->odisp
, 80);
1580 /* Figure out the `addressing mode'.
1581 Also turn on the BASE_DISABLE bit, if needed. */
1582 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1584 tmpreg
= 0x3b; /* 7.3 */
1585 if (opP
->reg
== ZPC
)
1588 else if (opP
->reg
== 0)
1591 tmpreg
= 0x30; /* 6.garbage */
1593 else if (opP
->reg
>= ZADDR0
&& opP
->reg
<= ZADDR7
)
1596 tmpreg
= 0x30 + opP
->reg
- ZADDR0
;
1599 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
1601 siz1
= opP
->disp
.size
;
1602 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
1603 siz2
= opP
->odisp
.size
;
1607 /* Index register stuff */
1608 if (opP
->index
.reg
!= 0
1609 && opP
->index
.reg
>= DATA
1610 && opP
->index
.reg
<= ADDR7
)
1612 nextword
|= (opP
->index
.reg
- DATA
) << 12;
1614 if (opP
->index
.size
== SIZE_UNSPEC
1615 || opP
->index
.size
== SIZE_LONG
)
1618 if (cpu_of_arch (current_architecture
) < m68020
)
1620 if (opP
->index
.scale
!= 1)
1623 "scale factor invalid on this architecture; needs 68020 or higher";
1627 switch (opP
->index
.scale
)
1644 GET US OUT OF HERE! */
1646 /* Must be INDEX, with an index register. Address
1647 register cannot be ZERO-PC, and either :b was
1648 forced, or we know it will fit. For a 68000 or
1649 68010, force this mode anyways, because the
1650 larger modes aren't supported. */
1651 if (opP
->mode
== BASE
1652 && ((opP
->reg
>= ADDR0
1653 && opP
->reg
<= ADDR7
)
1656 if (siz1
== SIZE_BYTE
1657 || cpu_of_arch (current_architecture
) < m68020
1658 || (siz1
== SIZE_UNSPEC
1659 && ! isvar (&opP
->disp
)
1660 && issbyte (baseo
)))
1662 nextword
+= baseo
& 0xff;
1664 if (isvar (&opP
->disp
))
1666 /* Do a byte relocation. If it doesn't
1667 fit (possible on m68000) let the
1668 fixup processing complain later. */
1670 add_fix ('B', &opP
->disp
, 1, 1);
1672 add_fix ('B', &opP
->disp
, 0, 0);
1674 else if (siz1
!= SIZE_BYTE
)
1676 if (siz1
!= SIZE_UNSPEC
)
1677 as_warn ("Forcing byte displacement");
1678 if (! issbyte (baseo
))
1679 opP
->error
= "byte displacement out of range";
1684 else if (siz1
== SIZE_UNSPEC
1686 && isvar (&opP
->disp
)
1687 && subs (&opP
->disp
) == NULL
)
1689 nextword
+= baseo
& 0xff;
1691 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
1692 TAB (PCINDEX
, SZ_UNDEF
));
1700 nextword
|= 0x40; /* No index reg */
1701 if (opP
->index
.reg
>= ZDATA0
1702 && opP
->index
.reg
<= ZDATA7
)
1703 nextword
|= (opP
->index
.reg
- ZDATA0
) << 12;
1704 else if (opP
->index
.reg
>= ZADDR0
1705 || opP
->index
.reg
<= ZADDR7
)
1706 nextword
|= (opP
->index
.reg
- ZADDR0
+ 8) << 12;
1709 /* It isn't simple. */
1711 if (cpu_of_arch (current_architecture
) < m68020
)
1713 "invalid operand mode for this architecture; needs 68020 or higher";
1716 /* If the guy specified a width, we assume that it is
1717 wide enough. Maybe it isn't. If so, we lose. */
1721 if (isvar (&opP
->disp
)
1723 : ! issword (baseo
))
1728 else if (! isvar (&opP
->disp
) && baseo
== 0)
1737 as_warn (":b not permitted; defaulting to :w");
1747 /* Figure out innner displacement stuff */
1748 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
1753 if (isvar (&opP
->odisp
)
1755 : ! issword (outro
))
1760 else if (! isvar (&opP
->disp
) && outro
== 0)
1769 as_warn (":b not permitted; defaulting to :w");
1778 if (opP
->mode
== POST
)
1783 if (siz1
!= SIZE_UNSPEC
&& isvar (&opP
->disp
))
1785 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1786 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 1, 2);
1788 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 0, 0);
1790 if (siz1
== SIZE_LONG
)
1791 addword (baseo
>> 16);
1792 if (siz1
!= SIZE_UNSPEC
)
1795 if (siz2
!= SIZE_UNSPEC
&& isvar (&opP
->odisp
))
1796 add_fix (siz2
== SIZE_LONG
? 'l' : 'w', &opP
->odisp
, 0, 0);
1797 if (siz2
== SIZE_LONG
)
1798 addword (outro
>> 16);
1799 if (siz2
!= SIZE_UNSPEC
)
1805 nextword
= get_num (&opP
->disp
, 80);
1806 switch (opP
->disp
.size
)
1811 if (!isvar (&opP
->disp
) && issword (offs (&opP
->disp
)))
1813 tmpreg
= 0x38; /* 7.0 */
1817 /* Don't generate pc relative code on 68010 and
1819 if (isvar (&opP
->disp
)
1820 && !subs (&opP
->disp
)
1821 && adds (&opP
->disp
)
1822 && (S_GET_SEGMENT (adds (&opP
->disp
)) == text_section
)
1823 && now_seg
== text_section
1824 && cpu_of_arch (current_architecture
) >= m68020
1826 && !strchr ("~%&$?", s
[0]))
1828 tmpreg
= 0x3A; /* 7.2 */
1829 add_frag (adds (&opP
->disp
),
1831 TAB (PCREL
, SZ_UNDEF
));
1834 /* Fall through into long */
1836 if (isvar (&opP
->disp
))
1837 add_fix ('l', &opP
->disp
, 0, 0);
1839 tmpreg
= 0x39;/* 7.1 mode */
1840 addword (nextword
>> 16);
1844 case SIZE_WORD
: /* Word */
1845 if (isvar (&opP
->disp
))
1846 add_fix ('w', &opP
->disp
, 0, 0);
1848 tmpreg
= 0x38;/* 7.0 mode */
1856 as_bad ("unknown/incorrect operand");
1859 install_gen_operand (s
[1], tmpreg
);
1865 { /* JF: I hate floating point! */
1880 tmpreg
= get_num (&opP
->disp
, tmpreg
);
1881 if (isvar (&opP
->disp
))
1882 add_fix (s
[1], &opP
->disp
, 0, 0);
1885 case 'b': /* Danger: These do no check for
1886 certain types of overflow.
1888 if (!isbyte (tmpreg
))
1889 opP
->error
= "out of range";
1890 insop (tmpreg
, opcode
);
1891 if (isvar (&opP
->disp
))
1892 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
1895 if (!isword (tmpreg
))
1896 opP
->error
= "out of range";
1897 insop (tmpreg
, opcode
);
1898 if (isvar (&opP
->disp
))
1899 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
1902 /* Because of the way insop works, we put these two out
1904 insop (tmpreg
, opcode
);
1905 insop (tmpreg
>> 16, opcode
);
1906 if (isvar (&opP
->disp
))
1907 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
1913 install_operand (s
[1], tmpreg
);
1924 install_operand (s
[1], opP
->reg
- ADDR
);
1928 tmpreg
= get_num (&opP
->disp
, 80);
1932 /* The pc_fix argument winds up in fx_pcrel_adjust,
1933 which is a char, and may therefore be unsigned. We
1934 want to pass -1, but we pass 64 instead, and convert
1935 back in md_pcrel_from. */
1936 add_fix ('B', &opP
->disp
, 1, 64);
1939 add_fix ('w', &opP
->disp
, 1, 0);
1944 if (cpu_of_arch (current_architecture
) < m68020
)
1945 as_warn ("Can't use long branches on 68000/68010");
1946 the_ins
.opcode
[the_ins
.numo
- 1] |= 0xff;
1947 add_fix ('l', &opP
->disp
, 1, 0);
1952 if (subs (&opP
->disp
)) /* We can't relax it */
1955 /* This could either be a symbol, or an absolute
1956 address. No matter, the frag hacking will finger it
1957 out. Not quite: it can't switch from BRANCH to
1958 BCC68000 for the case where opnd is absolute (it
1959 needs to use the 68000 hack since no conditional abs
1961 if (((cpu_of_arch (current_architecture
) < m68020
)
1962 || (0 == adds (&opP
->disp
)))
1963 && (the_ins
.opcode
[0] >= 0x6200)
1964 && (the_ins
.opcode
[0] <= 0x6f00))
1965 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
1966 TAB (BCC68000
, SZ_UNDEF
));
1968 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
1969 TAB (ABRANCH
, SZ_UNDEF
));
1972 if (isvar (&opP
->disp
))
1975 /* check for DBcc instruction */
1976 if ((the_ins
.opcode
[0] & 0xf0f8) == 0x50c8)
1978 /* size varies if patch */
1979 /* needed for long form */
1980 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
1981 TAB (DBCC
, SZ_UNDEF
));
1985 add_fix ('w', &opP
->disp
, 1, 0);
1989 case 'C': /* Fixed size LONG coproc branches */
1990 add_fix ('l', &opP
->disp
, 1, 0);
1994 case 'c': /* Var size Coprocesssor branches */
1995 if (subs (&opP
->disp
))
1997 add_fix ('l', &opP
->disp
, 1, 0);
1998 add_frag ((symbolS
*) 0, (long) 0, TAB (FBRANCH
, LONG
));
2000 else if (adds (&opP
->disp
))
2001 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2002 TAB (FBRANCH
, SZ_UNDEF
));
2005 /* add_frag((symbolS *) 0, offs(&opP->disp),
2006 TAB(FBRANCH,SHORT)); */
2007 the_ins
.opcode
[the_ins
.numo
- 1] |= 0x40;
2008 add_fix ('l', &opP
->disp
, 1, 0);
2018 case 'C': /* Ignore it */
2021 case 'd': /* JF this is a kludge */
2022 install_operand ('s', opP
->reg
- ADDR
);
2023 tmpreg
= get_num (&opP
->disp
, 80);
2024 if (!issword (tmpreg
))
2026 as_warn ("Expression out of range, using 0");
2033 install_operand (s
[1], opP
->reg
- DATA
);
2037 install_operand (s
[1], opP
->reg
- FP0
);
2041 tmpreg
= opP
->reg
- COP0
;
2042 install_operand (s
[1], tmpreg
);
2045 case 'J': /* JF foo */
2106 install_operand (s
[1], tmpreg
);
2110 tmpreg
= get_num (&opP
->disp
, 55);
2111 install_operand (s
[1], tmpreg
& 0x7f);
2118 if (tmpreg
& 0x7FF0000)
2119 as_bad ("Floating point register in register list");
2120 insop (reverse_16_bits (tmpreg
), opcode
);
2124 if (tmpreg
& 0x700FFFF)
2125 as_bad ("Wrong register in floating-point reglist");
2126 install_operand (s
[1], reverse_8_bits (tmpreg
>> 16));
2134 if (tmpreg
& 0x7FF0000)
2135 as_bad ("Floating point register in register list");
2136 insop (tmpreg
, opcode
);
2138 else if (s
[1] == '8')
2140 if (tmpreg
& 0x0FFFFFF)
2141 as_bad ("incorrect register in reglist");
2142 install_operand (s
[1], tmpreg
>> 24);
2146 if (tmpreg
& 0x700FFFF)
2147 as_bad ("wrong register in floating-point reglist");
2149 install_operand (s
[1], tmpreg
>> 16);
2154 install_operand (s
[1], get_num (&opP
->disp
, 60));
2158 tmpreg
= ((opP
->mode
== DREG
)
2159 ? 0x20 + opP
->reg
- DATA
2160 : (get_num (&opP
->disp
, 40) & 0x1F));
2161 install_operand (s
[1], tmpreg
);
2165 tmpreg
= get_num (&opP
->disp
, 10);
2168 install_operand (s
[1], tmpreg
);
2172 /* This depends on the fact that ADDR registers are eight
2173 more than their corresponding DATA regs, so the result
2174 will have the ADDR_REG bit set */
2175 install_operand (s
[1], opP
->reg
- DATA
);
2179 if (opP
->mode
== AINDR
)
2180 install_operand (s
[1], opP
->reg
- DATA
);
2182 install_operand (s
[1], opP
->index
.reg
- DATA
);
2186 if (opP
->reg
== FPI
)
2188 else if (opP
->reg
== FPS
)
2190 else if (opP
->reg
== FPC
)
2194 install_operand (s
[1], tmpreg
);
2197 case 'S': /* Ignore it */
2201 install_operand (s
[1], get_num (&opP
->disp
, 30));
2204 case 'U': /* Ignore it */
2223 as_fatal ("failed sanity check");
2224 } /* switch on cache token */
2225 install_operand (s
[1], tmpreg
);
2228 /* JF: These are out of order, I fear. */
2241 install_operand (s
[1], tmpreg
);
2265 install_operand (s
[1], tmpreg
);
2269 if (opP
->reg
== VAL
)
2288 install_operand (s
[1], tmpreg
);
2302 tmpreg
= (4 << 10) | ((opP
->reg
- BAD
) << 2);
2313 tmpreg
= (5 << 10) | ((opP
->reg
- BAC
) << 2);
2319 install_operand (s
[1], tmpreg
);
2322 know (opP
->reg
== PSR
);
2325 know (opP
->reg
== PCSR
);
2340 install_operand (s
[1], tmpreg
);
2343 tmpreg
= get_num (&opP
->disp
, 20);
2344 install_operand (s
[1], tmpreg
);
2346 case '_': /* used only for move16 absolute 32-bit address */
2347 tmpreg
= get_num (&opP
->disp
, 80);
2348 addword (tmpreg
>> 16);
2349 addword (tmpreg
& 0xFFFF);
2356 /* By the time whe get here (FINALLY) the_ins contains the complete
2357 instruction, ready to be emitted. . . */
2361 reverse_16_bits (in
)
2367 static int mask
[16] =
2369 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
2370 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000
2372 for (n
= 0; n
< 16; n
++)
2375 out
|= mask
[15 - n
];
2378 } /* reverse_16_bits() */
2387 static int mask
[8] =
2389 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
2392 for (n
= 0; n
< 8; n
++)
2398 } /* reverse_8_bits() */
2400 /* Cause an extra frag to be generated here, inserting up to 10 bytes
2401 (that value is chosen in the frag_var call in md_assemble). TYPE
2402 is the subtype of the frag to be generated; its primary type is
2403 rs_machine_dependent.
2405 The TYPE parameter is also used by md_convert_frag_1 and
2406 md_estimate_size_before_relax. The appropriate type of fixup will
2407 be emitted by md_convert_frag_1.
2409 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
2411 install_operand (mode
, val
)
2418 the_ins
.opcode
[0] |= val
& 0xFF; /* JF FF is for M kludge */
2421 the_ins
.opcode
[0] |= val
<< 9;
2424 the_ins
.opcode
[1] |= val
<< 12;
2427 the_ins
.opcode
[1] |= val
<< 6;
2430 the_ins
.opcode
[1] |= val
;
2433 the_ins
.opcode
[2] |= val
<< 12;
2436 the_ins
.opcode
[2] |= val
<< 6;
2439 /* DANGER! This is a hack to force cas2l and cas2w cmds to be
2440 three words long! */
2442 the_ins
.opcode
[2] |= val
;
2445 the_ins
.opcode
[1] |= val
<< 7;
2448 the_ins
.opcode
[1] |= val
<< 10;
2452 the_ins
.opcode
[1] |= val
<< 5;
2457 the_ins
.opcode
[1] |= (val
<< 10) | (val
<< 7);
2460 the_ins
.opcode
[1] |= (val
<< 12) | val
;
2463 the_ins
.opcode
[0] |= val
= 0xff;
2466 the_ins
.opcode
[0] |= val
<< 9;
2469 the_ins
.opcode
[1] |= val
;
2472 the_ins
.opcode
[1] |= val
;
2473 the_ins
.numo
++; /* What a hack */
2476 the_ins
.opcode
[1] |= val
<< 4;
2483 the_ins
.opcode
[0] |= (val
<< 6);
2486 the_ins
.opcode
[1] = (val
>> 16);
2487 the_ins
.opcode
[2] = val
& 0xffff;
2491 as_fatal ("failed sanity check.");
2493 } /* install_operand() */
2496 install_gen_operand (mode
, val
)
2503 the_ins
.opcode
[0] |= val
;
2506 /* This is a kludge!!! */
2507 the_ins
.opcode
[0] |= (val
& 0x07) << 9 | (val
& 0x38) << 3;
2516 the_ins
.opcode
[0] |= val
;
2518 /* more stuff goes here */
2520 as_fatal ("failed sanity check.");
2522 } /* install_gen_operand() */
2525 * verify that we have some number of paren pairs, do m68k_ip_op(), and
2526 * then deal with the bitfield hack.
2530 crack_operand (str
, opP
)
2532 register struct m68k_op
*opP
;
2534 register int parens
;
2536 register char *beg_str
;
2543 for (parens
= 0; *str
&& (parens
> 0 || notend (str
)); str
++)
2547 else if (*str
== ')')
2551 opP
->error
= "Extra )";
2557 if (!*str
&& parens
)
2559 opP
->error
= "Missing )";
2564 if (m68k_ip_op (beg_str
, opP
) != 0)
2571 c
= *++str
; /* JF bitfield hack */
2576 as_bad ("Missing operand");
2581 /* This is the guts of the machine-dependent assembler. STR points to a
2582 machine dependent instruction. This function is supposed to emit
2583 the frags/bytes it assembles to.
2587 insert_reg (regname
, regnum
)
2594 #ifdef REGISTER_PREFIX
2595 if (!flag_reg_prefix_optional
)
2597 buf
[0] = REGISTER_PREFIX
;
2598 strcpy (buf
+ 1, regname
);
2603 symbol_table_insert (symbol_new (regname
, reg_section
, regnum
,
2604 &zero_address_frag
));
2606 for (i
= 0; regname
[i
]; i
++)
2607 buf
[i
] = islower (regname
[i
]) ? toupper (regname
[i
]) : regname
[i
];
2610 symbol_table_insert (symbol_new (buf
, reg_section
, regnum
,
2611 &zero_address_frag
));
2620 static const struct init_entry init_table
[] =
2730 /* 68ec030 versions of same */
2733 /* 68ec030 access control unit, identical to 030 MMU status reg */
2736 /* Suppressed data and address registers. */
2761 for (i
= 0; init_table
[i
].name
; i
++)
2762 insert_reg (init_table
[i
].name
, init_table
[i
].number
);
2765 static int no_68851
, no_68881
;
2768 /* a.out machine type. Default to 68020. */
2769 int m68k_aout_machtype
= 2;
2781 int shorts_this_frag
;
2784 memset ((char *) (&the_ins
), '\0', sizeof (the_ins
));
2789 for (n
= 0; n
< the_ins
.numargs
; n
++)
2790 if (the_ins
.operands
[n
].error
)
2792 er
= the_ins
.operands
[n
].error
;
2798 as_bad ("%s -- statement `%s' ignored", er
, str
);
2802 if (the_ins
.nfrag
== 0)
2804 /* No frag hacking involved; just put it out */
2805 toP
= frag_more (2 * the_ins
.numo
);
2806 fromP
= &the_ins
.opcode
[0];
2807 for (m
= the_ins
.numo
; m
; --m
)
2809 md_number_to_chars (toP
, (long) (*fromP
), 2);
2813 /* put out symbol-dependent info */
2814 for (m
= 0; m
< the_ins
.nrel
; m
++)
2816 switch (the_ins
.reloc
[m
].wid
)
2834 as_fatal ("Don't know how to figure width of %c in md_assemble()",
2835 the_ins
.reloc
[m
].wid
);
2838 fixP
= fix_new_exp (frag_now
,
2839 ((toP
- frag_now
->fr_literal
)
2840 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
2842 &the_ins
.reloc
[m
].exp
,
2843 the_ins
.reloc
[m
].pcrel
,
2845 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
2850 /* There's some frag hacking */
2851 for (n
= 0, fromP
= &the_ins
.opcode
[0]; n
< the_ins
.nfrag
; n
++)
2856 wid
= 2 * the_ins
.fragb
[n
].fragoff
;
2858 wid
= 2 * (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
2859 toP
= frag_more (wid
);
2861 shorts_this_frag
= 0;
2862 for (m
= wid
/ 2; m
; --m
)
2864 md_number_to_chars (toP
, (long) (*fromP
), 2);
2869 for (m
= 0; m
< the_ins
.nrel
; m
++)
2871 if ((the_ins
.reloc
[m
].n
) >= 2 * shorts_this_frag
)
2873 the_ins
.reloc
[m
].n
-= 2 * shorts_this_frag
;
2876 wid
= the_ins
.reloc
[m
].wid
;
2879 the_ins
.reloc
[m
].wid
= 0;
2880 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
2882 fixP
= fix_new_exp (frag_now
,
2883 ((toP
- frag_now
->fr_literal
)
2884 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
2886 &the_ins
.reloc
[m
].exp
,
2887 the_ins
.reloc
[m
].pcrel
,
2889 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
2891 (void) frag_var (rs_machine_dependent
, 10, 0,
2892 (relax_substateT
) (the_ins
.fragb
[n
].fragty
),
2893 the_ins
.fragb
[n
].fadd
, the_ins
.fragb
[n
].foff
, to_beg_P
);
2895 n
= (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
2896 shorts_this_frag
= 0;
2899 toP
= frag_more (n
* sizeof (short));
2902 md_number_to_chars (toP
, (long) (*fromP
), 2);
2908 for (m
= 0; m
< the_ins
.nrel
; m
++)
2912 wid
= the_ins
.reloc
[m
].wid
;
2915 the_ins
.reloc
[m
].wid
= 0;
2916 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
2918 fixP
= fix_new_exp (frag_now
,
2919 ((the_ins
.reloc
[m
].n
+ toP
- frag_now
->fr_literal
)
2920 - shorts_this_frag
* 2),
2922 &the_ins
.reloc
[m
].exp
,
2923 the_ins
.reloc
[m
].pcrel
,
2925 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
2933 * md_begin -- set up hash tables with 68000 instructions.
2934 * similar to what the vax assembler does. ---phr
2936 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
2937 a copy of it at runtime, adding in the information we want but isn't
2938 there. I think it'd be better to have an awk script hack the table
2939 at compile time. Or even just xstr the table and use it as-is. But
2940 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
2943 register const struct m68k_opcode
*ins
;
2944 register struct m68k_incant
*hack
, *slak
;
2945 register const char *retval
= 0; /* empty string, or error msg text */
2946 register unsigned int i
;
2951 flag_reg_prefix_optional
= 1;
2956 op_hash
= hash_new ();
2958 obstack_begin (&robyn
, 4000);
2959 for (i
= 0; i
< m68k_numopcodes
; i
++)
2961 hack
= slak
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
2964 ins
= &m68k_opcodes
[i
];
2965 /* We *could* ignore insns that don't match our arch here
2966 but just leaving them out of the hash. */
2967 slak
->m_operands
= ins
->args
;
2968 slak
->m_opnum
= strlen (slak
->m_operands
) / 2;
2969 slak
->m_arch
= ins
->arch
;
2970 slak
->m_opcode
= ins
->opcode
;
2971 /* This is kludgey */
2972 slak
->m_codenum
= ((ins
->match
) & 0xffffL
) ? 2 : 1;
2973 if (i
+ 1 != m68k_numopcodes
2974 && !strcmp (ins
->name
, m68k_opcodes
[i
+ 1].name
))
2976 slak
->m_next
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
2981 slak
= slak
->m_next
;
2985 retval
= hash_insert (op_hash
, ins
->name
, (char *) hack
);
2987 as_fatal ("Internal Error: Can't hash %s: %s", ins
->name
, retval
);
2990 for (i
= 0; i
< m68k_numaliases
; i
++)
2992 const char *name
= m68k_opcode_aliases
[i
].primary
;
2993 const char *alias
= m68k_opcode_aliases
[i
].alias
;
2994 PTR val
= hash_find (op_hash
, name
);
2996 as_fatal ("Internal Error: Can't find %s in hash table", name
);
2997 retval
= hash_insert (op_hash
, alias
, val
);
2999 as_fatal ("Internal Error: Can't hash %s: %s", alias
, retval
);
3002 /* In MRI mode, all unsized branches are variable sized. Normally,
3003 they are word sized. */
3006 static struct m68k_opcode_alias mri_aliases
[] =
3026 for (i
= 0; i
< sizeof mri_aliases
/ sizeof mri_aliases
[0]; i
++)
3028 const char *name
= mri_aliases
[i
].primary
;
3029 const char *alias
= mri_aliases
[i
].alias
;
3030 PTR val
= hash_find (op_hash
, name
);
3032 as_fatal ("Internal Error: Can't find %s in hash table", name
);
3033 retval
= hash_jam (op_hash
, alias
, val
);
3035 as_fatal ("Internal Error: Can't hash %s: %s", alias
, retval
);
3039 for (i
= 0; i
< sizeof (mklower_table
); i
++)
3040 mklower_table
[i
] = (isupper (c
= (char) i
)) ? tolower (c
) : c
;
3042 for (i
= 0; i
< sizeof (notend_table
); i
++)
3044 notend_table
[i
] = 0;
3045 alt_notend_table
[i
] = 0;
3047 notend_table
[','] = 1;
3048 notend_table
['{'] = 1;
3049 notend_table
['}'] = 1;
3050 alt_notend_table
['a'] = 1;
3051 alt_notend_table
['A'] = 1;
3052 alt_notend_table
['d'] = 1;
3053 alt_notend_table
['D'] = 1;
3054 alt_notend_table
['#'] = 1;
3055 alt_notend_table
['&'] = 1;
3056 alt_notend_table
['f'] = 1;
3057 alt_notend_table
['F'] = 1;
3058 #ifdef REGISTER_PREFIX
3059 alt_notend_table
[REGISTER_PREFIX
] = 1;
3062 /* We need to put '(' in alt_notend_table to handle
3063 cas2 %d0:%d2,%d3:%d4,(%a0):(%a1)
3065 alt_notend_table
['('] = 1;
3067 /* We need to put '@' in alt_notend_table to handle
3068 cas2 %d0:%d2,%d3:%d4,@(%d0):@(%d1)
3070 alt_notend_table
['@'] = 1;
3072 #ifndef MIT_SYNTAX_ONLY
3073 /* Insert pseudo ops, these have to go into the opcode table since
3074 gas expects pseudo ops to start with a dot */
3077 while (mote_pseudo_table
[n
].poc_name
)
3079 hack
= (struct m68k_incant
*)
3080 obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3081 hash_insert (op_hash
,
3082 mote_pseudo_table
[n
].poc_name
, (char *) hack
);
3083 hack
->m_operands
= 0;
3094 m68k_init_after_args ()
3096 if (cpu_of_arch (current_architecture
) == 0)
3099 const char *default_cpu
= TARGET_CPU
;
3101 if (*default_cpu
== 'm')
3103 for (i
= 0; i
< n_archs
; i
++)
3104 if (strcasecmp (default_cpu
, archs
[i
].name
) == 0)
3108 as_bad ("unrecognized default cpu `%s' ???", TARGET_CPU
);
3109 current_architecture
|= m68020
;
3112 current_architecture
|= archs
[i
].arch
;
3114 /* Permit m68881 specification with all cpus; those that can't work
3115 with a coprocessor could be doing emulation. */
3116 if (current_architecture
& m68851
)
3118 if (current_architecture
& m68040
)
3120 as_warn ("68040 and 68851 specified; mmu instructions may assemble incorrectly");
3123 /* What other incompatibilities could we check for? */
3125 /* Toss in some default assumptions about coprocessors. */
3127 && (cpu_of_arch (current_architecture
)
3128 /* Can CPU32 have a 68881 coprocessor?? */
3129 & (m68020
| m68030
| cpu32
)))
3131 current_architecture
|= m68881
;
3134 && (cpu_of_arch (current_architecture
) & m68020up
) != 0
3135 && (cpu_of_arch (current_architecture
) & m68040up
) == 0)
3137 current_architecture
|= m68851
;
3139 if (no_68881
&& (current_architecture
& m68881
))
3140 as_bad ("options for 68881 and no-68881 both given");
3141 if (no_68851
&& (current_architecture
& m68851
))
3142 as_bad ("options for 68851 and no-68851 both given");
3145 /* Work out the magic number. This isn't very general. */
3146 if (current_architecture
& m68000
)
3147 m68k_aout_machtype
= 0;
3148 else if (current_architecture
& m68010
)
3149 m68k_aout_machtype
= 1;
3150 else if (current_architecture
& m68020
)
3151 m68k_aout_machtype
= 2;
3153 m68k_aout_machtype
= 2;
3156 /* Note which set of "movec" control registers is available. */
3157 switch (cpu_of_arch (current_architecture
))
3160 control_regs
= m68000_control_regs
;
3163 control_regs
= m68010_control_regs
;
3167 control_regs
= m68020_control_regs
;
3170 control_regs
= m68040_control_regs
;
3173 control_regs
= m68060_control_regs
;
3176 control_regs
= cpu32_control_regs
;
3182 if (cpu_of_arch (current_architecture
) < m68020
)
3183 md_relax_table
[TAB (PCINDEX
, BYTE
)].rlx_more
= 0;
3186 /* Equal to MAX_PRECISION in atof-ieee.c */
3187 #define MAX_LITTLENUMS 6
3189 /* Turn a string in input_line_pointer into a floating point constant
3190 of type type, and store the appropriate bytes in *litP. The number
3191 of LITTLENUMS emitted is stored in *sizeP . An error message is
3192 returned, or NULL on OK. */
3195 md_atof (type
, litP
, sizeP
)
3201 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
3202 LITTLENUM_TYPE
*wordP
;
3234 return "Bad call to MD_ATOF()";
3236 t
= atof_ieee (input_line_pointer
, type
, words
);
3238 input_line_pointer
= t
;
3240 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
3241 for (wordP
= words
; prec
--;)
3243 md_number_to_chars (litP
, (long) (*wordP
++), sizeof (LITTLENUM_TYPE
));
3244 litP
+= sizeof (LITTLENUM_TYPE
);
3250 md_number_to_chars (buf
, val
, n
)
3255 number_to_chars_bigendian (buf
, val
, n
);
3259 md_apply_fix_2 (fixP
, val
)
3263 addressT upper_limit
;
3264 offsetT lower_limit
;
3266 /* This is unnecessary but it convinces the native rs6000 compiler
3267 to generate the code we want. */
3268 char *buf
= fixP
->fx_frag
->fr_literal
;
3269 buf
+= fixP
->fx_where
;
3270 /* end ibm compiler workaround */
3272 if (val
& 0x80000000)
3273 val
|= ~(addressT
)0x7fffffff;
3277 switch (fixP
->fx_size
)
3279 /* The cast to offsetT below are necessary to make code correct for
3280 machines where ints are smaller than offsetT */
3284 lower_limit
= - (offsetT
) 0x80;
3287 *buf
++ = (val
>> 8);
3289 upper_limit
= 0x7fff;
3290 lower_limit
= - (offsetT
) 0x8000;
3293 *buf
++ = (val
>> 24);
3294 *buf
++ = (val
>> 16);
3295 *buf
++ = (val
>> 8);
3297 upper_limit
= 0x7fffffff;
3298 lower_limit
= - (offsetT
) 0x7fffffff - 1; /* avoid constant overflow */
3301 BAD_CASE (fixP
->fx_size
);
3304 /* For non-pc-relative values, it's conceivable we might get something
3305 like "0xff" for a byte field. So extend the upper part of the range
3306 to accept such numbers. We arbitrarily disallow "-0xff" or "0xff+0xff",
3307 so that we can do any range checking at all. */
3308 if (!fixP
->fx_pcrel
)
3309 upper_limit
= upper_limit
* 2 + 1;
3311 if ((addressT
) val
> upper_limit
3312 && (val
> 0 || val
< lower_limit
))
3313 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, "value out of range");
3315 /* A one byte PC-relative reloc means a short branch. We can't use
3316 a short branch with a value of 0 or -1, because those indicate
3317 different opcodes (branches with longer offsets). */
3319 && fixP
->fx_size
== 1
3320 && (fixP
->fx_addsy
== NULL
3321 || S_IS_DEFINED (fixP
->fx_addsy
))
3322 && (val
== 0 || val
== -1))
3323 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, "invalid byte branch offset");
3326 #ifdef BFD_ASSEMBLER
3328 md_apply_fix (fixP
, valp
)
3332 md_apply_fix_2 (fixP
, (addressT
) *valp
);
3336 void md_apply_fix (fixP
, val
)
3340 md_apply_fix_2 (fixP
, (addressT
) val
);
3344 /* *fragP has been relaxed to its final size, and now needs to have
3345 the bytes inside it modified to conform to the new size There is UGLY
3349 md_convert_frag_1 (fragP
)
3350 register fragS
*fragP
;
3356 /* Address in object code of the displacement. */
3357 register int object_address
= fragP
->fr_fix
+ fragP
->fr_address
;
3359 /* Address in gas core of the place to store the displacement. */
3360 /* This convinces the native rs6000 compiler to generate the code we
3362 register char *buffer_address
= fragP
->fr_literal
;
3363 buffer_address
+= fragP
->fr_fix
;
3364 /* end ibm compiler workaround */
3366 /* The displacement of the address, from current location. */
3367 disp
= fragP
->fr_symbol
? S_GET_VALUE (fragP
->fr_symbol
) : 0;
3368 disp
= (disp
+ fragP
->fr_offset
) - object_address
;
3370 #ifdef BFD_ASSEMBLER
3371 disp
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
3374 switch (fragP
->fr_subtype
)
3376 case TAB (BCC68000
, BYTE
):
3377 case TAB (ABRANCH
, BYTE
):
3378 know (issbyte (disp
));
3380 as_bad ("short branch with zero offset: use :w");
3381 fragP
->fr_opcode
[1] = disp
;
3384 case TAB (DBCC
, SHORT
):
3385 know (issword (disp
));
3388 case TAB (BCC68000
, SHORT
):
3389 case TAB (ABRANCH
, SHORT
):
3390 know (issword (disp
));
3391 fragP
->fr_opcode
[1] = 0x00;
3394 case TAB (ABRANCH
, LONG
):
3395 if (cpu_of_arch (current_architecture
) < m68020
)
3397 if (fragP
->fr_opcode
[0] == 0x61)
3400 fragP
->fr_opcode
[0] = 0x4E;
3401 fragP
->fr_opcode
[1] = (char) 0xB9; /* JBSR with ABSL LONG offset */
3402 subseg_change (text_section
, 0); /* @@ */
3416 else if (fragP
->fr_opcode
[0] == 0x60)
3418 fragP
->fr_opcode
[0] = 0x4E;
3419 fragP
->fr_opcode
[1] = (char) 0xF9; /* JMP with ABSL LONG offset */
3420 subseg_change (text_section
, 0); /* @@ */
3421 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3422 fragP
->fr_offset
, 0, NO_RELOC
);
3428 as_bad ("Long branch offset not supported.");
3433 fragP
->fr_opcode
[1] = (char) 0xff;
3437 case TAB (BCC68000
, LONG
):
3438 /* only Bcc 68000 instructions can come here */
3439 /* change bcc into b!cc/jmp absl long */
3440 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
3441 fragP
->fr_opcode
[1] = 0x6;/* branch offset = 6 */
3443 /* JF: these used to be fr_opcode[2,3], but they may be in a
3444 different frag, in which case refering to them is a no-no.
3445 Only fr_opcode[0,1] are guaranteed to work. */
3446 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
3447 *buffer_address
++ = (char) 0xf9;
3448 fragP
->fr_fix
+= 2; /* account for jmp instruction */
3449 subseg_change (text_section
, 0);
3450 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3451 fragP
->fr_offset
, 0, NO_RELOC
);
3455 case TAB (DBCC
, LONG
):
3456 /* only DBcc 68000 instructions can come here */
3457 /* change dbcc into dbcc/jmp absl long */
3458 /* JF: these used to be fr_opcode[2-7], but that's wrong */
3459 *buffer_address
++ = 0x00; /* branch offset = 4 */
3460 *buffer_address
++ = 0x04;
3461 *buffer_address
++ = 0x60; /* put in bra pc+6 */
3462 *buffer_address
++ = 0x06;
3463 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
3464 *buffer_address
++ = (char) 0xf9;
3466 fragP
->fr_fix
+= 6; /* account for bra/jmp instructions */
3467 subseg_change (text_section
, 0);
3468 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3469 fragP
->fr_offset
, 0, NO_RELOC
);
3473 case TAB (FBRANCH
, SHORT
):
3474 know ((fragP
->fr_opcode
[1] & 0x40) == 0);
3477 case TAB (FBRANCH
, LONG
):
3478 fragP
->fr_opcode
[1] |= 0x40; /* Turn on LONG bit */
3481 case TAB (PCREL
, SHORT
):
3484 case TAB (PCREL
, LONG
):
3485 /* The thing to do here is force it to ABSOLUTE LONG, since
3486 PCREL is really trying to shorten an ABSOLUTE address anyway */
3487 /* JF FOO This code has not been tested */
3488 subseg_change (text_section
, 0);
3489 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
3491 if ((fragP
->fr_opcode
[1] & 0x3F) != 0x3A)
3492 as_bad ("Internal error (long PC-relative operand) for insn 0x%04x at 0x%lx",
3493 (unsigned) fragP
->fr_opcode
[0],
3494 (unsigned long) fragP
->fr_address
);
3495 fragP
->fr_opcode
[1] &= ~0x3F;
3496 fragP
->fr_opcode
[1] |= 0x39; /* Mode 7.1 */
3500 case TAB (PCLEA
, SHORT
):
3501 subseg_change (text_section
, 0);
3502 fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
3503 fragP
->fr_offset
, 1, NO_RELOC
);
3504 fragP
->fr_opcode
[1] &= ~0x3F;
3505 fragP
->fr_opcode
[1] |= 0x3A; /* 072 - mode 7.2 */
3508 case TAB (PCLEA
, LONG
):
3509 subseg_change (text_section
, 0);
3510 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
) + 2, 4, fragP
->fr_symbol
,
3511 fragP
->fr_offset
, 1, NO_RELOC
);
3512 fixP
->fx_pcrel_adjust
= 2;
3513 /* Already set to mode 7.3; this indicates: PC indirect with
3514 suppressed index, 32-bit displacement. */
3515 *buffer_address
++ = 0x01;
3516 *buffer_address
++ = 0x70;
3521 case TAB (PCINDEX
, BYTE
):
3523 if (!issbyte (disp
))
3525 as_bad ("displacement doesn't fit in one byte");
3528 assert (fragP
->fr_fix
>= 2);
3529 buffer_address
[-2] &= ~1;
3530 buffer_address
[-1] = disp
;
3533 case TAB (PCINDEX
, SHORT
):
3534 subseg_change (text_section
, 0);
3536 assert (issword (disp
));
3537 assert (fragP
->fr_fix
>= 2);
3538 buffer_address
[-2] |= 0x1;
3539 buffer_address
[-1] = 0x20;
3540 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
3541 fragP
->fr_offset
, (fragP
->fr_opcode
[1] & 077) == 073,
3543 fixP
->fx_pcrel_adjust
= 2;
3546 case TAB (PCINDEX
, LONG
):
3547 subseg_change (text_section
, 0);
3549 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
3550 fragP
->fr_offset
, (fragP
->fr_opcode
[1] & 077) == 073,
3552 fixP
->fx_pcrel_adjust
= 2;
3553 assert (fragP
->fr_fix
>= 2);
3554 buffer_address
[-2] |= 0x1;
3555 buffer_address
[-1] = 0x30;
3562 md_number_to_chars (buffer_address
, (long) disp
, (int) ext
);
3563 fragP
->fr_fix
+= ext
;
3567 #ifndef BFD_ASSEMBLER
3570 md_convert_frag (headers
, sec
, fragP
)
3571 object_headers
*headers
;
3575 md_convert_frag_1 (fragP
);
3581 md_convert_frag (abfd
, sec
, fragP
)
3586 md_convert_frag_1 (fragP
);
3590 /* Force truly undefined symbols to their maximum size, and generally set up
3591 the frag list to be relaxed
3594 md_estimate_size_before_relax (fragP
, segment
)
3595 register fragS
*fragP
;
3599 register char *buffer_address
= fragP
->fr_fix
+ fragP
->fr_literal
;
3601 old_fix
= fragP
->fr_fix
;
3603 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
3604 switch (fragP
->fr_subtype
)
3607 case TAB (ABRANCH
, SZ_UNDEF
):
3609 if ((fragP
->fr_symbol
!= NULL
) /* Not absolute */
3610 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
3612 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), BYTE
);
3615 else if ((fragP
->fr_symbol
== 0) || (cpu_of_arch (current_architecture
) < m68020
))
3617 /* On 68000, or for absolute value, switch to abs long */
3618 /* FIXME, we should check abs val, pick short or long */
3619 if (fragP
->fr_opcode
[0] == 0x61)
3621 fragP
->fr_opcode
[0] = 0x4E;
3622 fragP
->fr_opcode
[1] = (char) 0xB9; /* JBSR with ABSL LONG offset */
3623 subseg_change (text_section
, 0);
3624 fix_new (fragP
, fragP
->fr_fix
, 4,
3625 fragP
->fr_symbol
, fragP
->fr_offset
, 0, NO_RELOC
);
3629 else if (fragP
->fr_opcode
[0] == 0x60)
3631 fragP
->fr_opcode
[0] = 0x4E;
3632 fragP
->fr_opcode
[1] = (char) 0xF9; /* JMP with ABSL LONG offset */
3633 subseg_change (text_section
, 0);
3634 fix_new (fragP
, fragP
->fr_fix
, 4,
3635 fragP
->fr_symbol
, fragP
->fr_offset
, 0, NO_RELOC
);
3641 as_warn ("Long branch offset to extern symbol not supported.");
3645 { /* Symbol is still undefined. Make it simple */
3646 fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
3647 fragP
->fr_offset
, 1, NO_RELOC
);
3649 fragP
->fr_opcode
[1] = (char) 0xff;
3655 } /* case TAB(ABRANCH,SZ_UNDEF) */
3657 case TAB (FBRANCH
, SZ_UNDEF
):
3659 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
|| flag_short_refs
)
3661 fragP
->fr_subtype
= TAB (FBRANCH
, SHORT
);
3666 fix_new (fragP
, (int) fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3667 fragP
->fr_offset
, 1, NO_RELOC
);
3669 fragP
->fr_opcode
[1] |= 0x40; /* Turn on LONG bit */
3673 } /* TAB(FBRANCH,SZ_UNDEF) */
3675 case TAB (PCREL
, SZ_UNDEF
):
3677 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
3679 || cpu_of_arch (current_architecture
) < m68020
)
3681 fragP
->fr_subtype
= TAB (PCREL
, SHORT
);
3686 fragP
->fr_subtype
= TAB (PCREL
, LONG
);
3690 } /* TAB(PCREL,SZ_UNDEF) */
3692 case TAB (BCC68000
, SZ_UNDEF
):
3694 if ((fragP
->fr_symbol
!= NULL
)
3695 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
3697 fragP
->fr_subtype
= TAB (BCC68000
, BYTE
);
3700 /* only Bcc 68000 instructions can come here */
3701 /* change bcc into b!cc/jmp absl long */
3702 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
3703 if (flag_short_refs
)
3705 fragP
->fr_opcode
[1] = 0x04; /* branch offset = 6 */
3706 /* JF: these were fr_opcode[2,3] */
3707 buffer_address
[0] = 0x4e; /* put in jmp long (0x4ef9) */
3708 buffer_address
[1] = (char) 0xf8;
3709 fragP
->fr_fix
+= 2; /* account for jmp instruction */
3710 subseg_change (text_section
, 0);
3711 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
,
3712 fragP
->fr_offset
, 0, NO_RELOC
);
3717 fragP
->fr_opcode
[1] = 0x06; /* branch offset = 6 */
3718 /* JF: these were fr_opcode[2,3] */
3719 buffer_address
[0] = 0x4e; /* put in jmp long (0x4ef9) */
3720 buffer_address
[1] = (char) 0xf9;
3721 fragP
->fr_fix
+= 2; /* account for jmp instruction */
3722 subseg_change (text_section
, 0);
3723 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3724 fragP
->fr_offset
, 0, NO_RELOC
);
3729 } /* case TAB(BCC68000,SZ_UNDEF) */
3731 case TAB (DBCC
, SZ_UNDEF
):
3733 if (fragP
->fr_symbol
!= NULL
&& S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
3735 fragP
->fr_subtype
= TAB (DBCC
, SHORT
);
3739 /* only DBcc 68000 instructions can come here */
3740 /* change dbcc into dbcc/jmp absl long */
3741 /* JF: these used to be fr_opcode[2-4], which is wrong. */
3742 buffer_address
[0] = 0x00; /* branch offset = 4 */
3743 buffer_address
[1] = 0x04;
3744 buffer_address
[2] = 0x60; /* put in bra pc + ... */
3746 if (flag_short_refs
)
3748 /* JF: these were fr_opcode[5-7] */
3749 buffer_address
[3] = 0x04; /* plus 4 */
3750 buffer_address
[4] = 0x4e; /* Put in Jump Word */
3751 buffer_address
[5] = (char) 0xf8;
3752 fragP
->fr_fix
+= 6; /* account for bra/jmp instruction */
3753 subseg_change (text_section
, 0);
3754 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
,
3755 fragP
->fr_offset
, 0, NO_RELOC
);
3760 /* JF: these were fr_opcode[5-7] */
3761 buffer_address
[3] = 0x06; /* Plus 6 */
3762 buffer_address
[4] = 0x4e; /* put in jmp long (0x4ef9) */
3763 buffer_address
[5] = (char) 0xf9;
3764 fragP
->fr_fix
+= 6; /* account for bra/jmp instruction */
3765 subseg_change (text_section
, 0);
3766 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3767 fragP
->fr_offset
, 0, NO_RELOC
);
3773 } /* case TAB(DBCC,SZ_UNDEF) */
3775 case TAB (PCLEA
, SZ_UNDEF
):
3777 if ((S_GET_SEGMENT (fragP
->fr_symbol
)) == segment
3779 || cpu_of_arch (current_architecture
) < m68020
)
3781 fragP
->fr_subtype
= TAB (PCLEA
, SHORT
);
3786 fragP
->fr_subtype
= TAB (PCLEA
, LONG
);
3790 } /* TAB(PCLEA,SZ_UNDEF) */
3792 case TAB (PCINDEX
, SZ_UNDEF
):
3793 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
3794 || cpu_of_arch (current_architecture
) < m68020
)
3796 fragP
->fr_subtype
= TAB (PCINDEX
, BYTE
);
3800 fragP
->fr_subtype
= TAB (PCINDEX
, LONG
);
3809 /* now that SZ_UNDEF are taken care of, check others */
3810 switch (fragP
->fr_subtype
)
3812 case TAB (BCC68000
, BYTE
):
3813 case TAB (ABRANCH
, BYTE
):
3814 /* We can't do a short jump to the next instruction,
3815 so we force word mode. */
3816 if (fragP
->fr_symbol
&& S_GET_VALUE (fragP
->fr_symbol
) == 0 &&
3817 fragP
->fr_symbol
->sy_frag
== fragP
->fr_next
)
3819 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
3826 return fragP
->fr_var
+ fragP
->fr_fix
- old_fix
;
3829 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
3830 /* the bit-field entries in the relocation_info struct plays hell
3831 with the byte-order problems of cross-assembly. So as a hack,
3832 I added this mach. dependent ri twiddler. Ugly, but it gets
3834 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
3835 are symbolnum, most sig. byte first. Last byte is broken up with
3836 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
3837 nibble as nuthin. (on Sun 3 at least) */
3838 /* Translate the internal relocation information into target-specific
3842 md_ri_to_chars (the_bytes
, ri
)
3844 struct reloc_info_generic
*ri
;
3847 md_number_to_chars (the_bytes
, ri
->r_address
, 4);
3848 /* now the fun stuff */
3849 the_bytes
[4] = (ri
->r_symbolnum
>> 16) & 0x0ff;
3850 the_bytes
[5] = (ri
->r_symbolnum
>> 8) & 0x0ff;
3851 the_bytes
[6] = ri
->r_symbolnum
& 0x0ff;
3852 the_bytes
[7] = (((ri
->r_pcrel
<< 7) & 0x80) | ((ri
->r_length
<< 5) & 0x60) |
3853 ((ri
->r_extern
<< 4) & 0x10));
3856 #endif /* comment */
3858 #ifndef BFD_ASSEMBLER
3860 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3863 relax_addressT segment_address_in_file
;
3866 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3867 * Out: GNU LD relocation length code: 0, 1, or 2.
3870 static CONST
unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3873 know (fixP
->fx_addsy
!= NULL
);
3875 md_number_to_chars (where
,
3876 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
3879 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3880 ? S_GET_TYPE (fixP
->fx_addsy
)
3881 : fixP
->fx_addsy
->sy_number
);
3883 where
[4] = (r_symbolnum
>> 16) & 0x0ff;
3884 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3885 where
[6] = r_symbolnum
& 0x0ff;
3886 where
[7] = (((fixP
->fx_pcrel
<< 7) & 0x80) | ((nbytes_r_length
[fixP
->fx_size
] << 5) & 0x60) |
3887 (((!S_IS_DEFINED (fixP
->fx_addsy
)) << 4) & 0x10));
3891 #endif /* OBJ_AOUT or OBJ_BOUT */
3893 #ifndef WORKING_DOT_WORD
3894 CONST
int md_short_jump_size
= 4;
3895 CONST
int md_long_jump_size
= 6;
3898 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3900 addressT from_addr
, to_addr
;
3906 offset
= to_addr
- (from_addr
+ 2);
3908 md_number_to_chars (ptr
, (valueT
) 0x6000, 2);
3909 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 2);
3913 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3915 addressT from_addr
, to_addr
;
3921 if (cpu_of_arch (current_architecture
) < m68020
)
3923 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3924 md_number_to_chars (ptr
, (valueT
) 0x4EF9, 2);
3925 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
3926 fix_new (frag
, (ptr
+ 2) - frag
->fr_literal
, 4, to_symbol
, (offsetT
) 0,
3931 offset
= to_addr
- (from_addr
+ 2);
3932 md_number_to_chars (ptr
, (valueT
) 0x60ff, 2);
3933 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
3939 /* Different values of OK tell what its OK to return. Things that
3940 aren't OK are an error (what a shock, no?)
3943 10: Absolute 1:8 only
3944 20: Absolute 0:7 only
3945 30: absolute 0:15 only
3946 40: Absolute 0:31 only
3947 50: absolute 0:127 only
3948 55: absolute -64:63 only
3949 60: absolute -128:127 only
3950 70: absolute 0:4095 only
3957 struct m68k_exp
*exp
;
3960 if (exp
->exp
.X_op
== O_absent
)
3962 /* Do the same thing the VAX asm does */
3963 op (exp
) = O_constant
;
3969 as_warn ("expression out of range: defaulting to 1");
3973 else if (exp
->exp
.X_op
== O_constant
)
3978 if (offs (exp
) < 1 || offs (exp
) > 8)
3980 as_warn ("expression out of range: defaulting to 1");
3985 if (offs (exp
) < 0 || offs (exp
) > 7)
3989 if (offs (exp
) < 0 || offs (exp
) > 15)
3993 if (offs (exp
) < 0 || offs (exp
) > 32)
3997 if (offs (exp
) < 0 || offs (exp
) > 127)
4001 if (offs (exp
) < -64 || offs (exp
) > 63)
4005 if (offs (exp
) < -128 || offs (exp
) > 127)
4009 if (offs (exp
) < 0 || offs (exp
) > 4095)
4012 as_warn ("expression out of range: defaulting to 0");
4020 else if (exp
->exp
.X_op
== O_big
)
4022 if (offs (exp
) <= 0 /* flonum */
4023 && (ok
== 80 /* no bignums */
4024 || (ok
> 10 /* small-int ranges including 0 ok */
4025 /* If we have a flonum zero, a zero integer should
4026 do as well (e.g., in moveq). */
4027 && generic_floating_point_number
.exponent
== 0
4028 && generic_floating_point_number
.low
[0] == 0)))
4030 /* HACK! Turn it into a long */
4031 LITTLENUM_TYPE words
[6];
4033 gen_to_words (words
, 2, 8L); /* These numbers are magic! */
4034 op (exp
) = O_constant
;
4037 offs (exp
) = words
[1] | (words
[0] << 16);
4041 op (exp
) = O_constant
;
4044 offs (exp
) = (ok
== 10) ? 1 : 0;
4045 as_warn ("Can't deal with expression; defaulting to %ld",
4051 if (ok
>= 10 && ok
<= 70)
4053 op (exp
) = O_constant
;
4056 offs (exp
) = (ok
== 10) ? 1 : 0;
4057 as_warn ("Can't deal with expression; defaulting to %ld",
4062 if (exp
->size
!= SIZE_UNSPEC
)
4070 if (!isbyte (offs (exp
)))
4071 as_warn ("expression doesn't fit in BYTE");
4074 if (!isword (offs (exp
)))
4075 as_warn ("expression doesn't fit in WORD");
4083 /* These are the back-ends for the various machine dependent pseudo-ops. */
4084 void demand_empty_rest_of_line (); /* Hate those extra verbose names */
4090 subseg_set (data_section
, 1);
4091 demand_empty_rest_of_line ();
4098 subseg_set (data_section
, 2);
4099 demand_empty_rest_of_line ();
4106 /* We don't support putting frags in the BSS segment, we fake it
4107 by marking in_bss, then looking at s_skip for clues. */
4109 subseg_set (bss_section
, 0);
4110 demand_empty_rest_of_line ();
4118 register long temp_fill
;
4120 temp
= 1; /* JF should be 2? */
4121 temp_fill
= get_absolute_expression ();
4122 if (!need_pass_2
) /* Never make frag if expect extra pass. */
4123 frag_align (temp
, (int) temp_fill
);
4124 demand_empty_rest_of_line ();
4131 demand_empty_rest_of_line ();
4134 /* Pseudo-ops handled for MRI compatibility. */
4136 /* Handle an MRI style chip specification. */
4145 s
= input_line_pointer
;
4146 c
= get_symbol_end ();
4147 for (i
= 0; i
< n_archs
; i
++)
4148 if (strcasecmp (s
, archs
[i
].name
) == 0)
4152 as_bad ("%s: unrecognized processor name", s
);
4153 *input_line_pointer
= c
;
4154 ignore_rest_of_line ();
4157 *input_line_pointer
= c
;
4159 if (*input_line_pointer
== '/')
4160 current_architecture
= 0;
4162 current_architecture
&= m68881
| m68851
;
4163 current_architecture
|= archs
[i
].arch
;
4165 while (*input_line_pointer
== '/')
4167 ++input_line_pointer
;
4168 s
= input_line_pointer
;
4169 c
= get_symbol_end ();
4170 if (strcmp (s
, "68881") == 0)
4171 current_architecture
|= m68881
;
4172 else if (strcmp (s
, "68851") == 0)
4173 current_architecture
|= m68851
;
4174 *input_line_pointer
= c
;
4178 /* The MRI CHIP pseudo-op. */
4185 demand_empty_rest_of_line ();
4188 /* The MRI FOPT pseudo-op. */
4196 if (strncasecmp (input_line_pointer
, "ID=", 3) == 0)
4200 input_line_pointer
+= 3;
4201 temp
= get_absolute_expression ();
4202 if (temp
< 0 || temp
> 7)
4203 as_bad ("bad coprocessor id");
4205 m68k_float_copnum
= COP0
+ temp
;
4209 as_bad ("unrecognized fopt option");
4210 ignore_rest_of_line ();
4214 demand_empty_rest_of_line ();
4217 /* The structure used to handle the MRI OPT pseudo-op. */
4221 /* The name of the option. */
4224 /* If this is not NULL, just call this function. The first argument
4225 is the ARG field of this structure, the second argument is
4226 whether the option was negated. */
4227 void (*pfn
) PARAMS ((int arg
, int on
));
4229 /* If this is not NULL, and the PFN field is NULL, set the variable
4230 this points to. Set it to the ARG field if the option was not
4231 negated, and the NOTARG field otherwise. */
4234 /* The value to pass to PFN or to assign to *PVAR. */
4237 /* The value to assign to *PVAR if the option is negated. If PFN is
4238 NULL, and PVAR is not NULL, and ARG and NOTARG are the same, then
4239 the option may not be negated. */
4243 /* The table used to handle the MRI OPT pseudo-op. */
4245 static void skip_to_comma
PARAMS ((int, int));
4246 static void opt_chip
PARAMS ((int, int));
4247 static void opt_list
PARAMS ((int, int));
4248 static void opt_list_symbols
PARAMS ((int, int));
4250 static const struct opt_action opt_table
[] =
4252 { "abspcadd", 0, &m68k_abspcadd
, 1, 0 },
4254 /* We do relaxing, so there is little use for these options. */
4255 { "b", 0, 0, 0, 0 },
4256 { "brs", 0, 0, 0, 0 },
4257 { "brb", 0, 0, 0, 0 },
4258 { "brl", 0, 0, 0, 0 },
4259 { "brw", 0, 0, 0, 0 },
4261 { "c", 0, 0, 0, 0 },
4262 { "cex", 0, 0, 0, 0 },
4263 { "case", 0, &symbols_case_sensitive
, 1, 0 },
4264 { "cl", 0, 0, 0, 0 },
4265 { "cre", 0, 0, 0, 0 },
4266 { "d", 0, &flag_keep_locals
, 1, 0 },
4267 { "e", 0, 0, 0, 0 },
4268 { "f", 0, &flag_short_refs
, 1, 0 },
4269 { "frs", 0, &flag_short_refs
, 1, 0 },
4270 { "frl", 0, &flag_short_refs
, 0, 1 },
4271 { "g", 0, 0, 0, 0 },
4272 { "i", 0, 0, 0, 0 },
4273 { "m", 0, 0, 0, 0 },
4274 { "mex", 0, 0, 0, 0 },
4275 { "mc", 0, 0, 0, 0 },
4276 { "md", 0, 0, 0, 0 },
4277 { "next", skip_to_comma
, 0, 0, 0 },
4278 { "o", 0, 0, 0, 0 },
4279 { "old", 0, 0, 0, 0 },
4280 { "op", skip_to_comma
, 0, 0, 0 },
4281 { "pco", 0, 0, 0, 0 },
4282 { "p", opt_chip
, 0, 0, 0 },
4283 { "pcr", 0, 0, 0, 0 },
4284 { "pcs", 0, 0, 0, 0 },
4285 { "r", 0, 0, 0, 0 },
4286 { "quick", 0, &m68k_quick
, 1, 0 },
4287 { "rel32", 0, &m68k_rel32
, 1, 0 },
4288 { "s", opt_list
, 0, 0, 0 },
4289 { "t", opt_list_symbols
, 0, 0, 0 },
4290 { "w", 0, &flag_no_warnings
, 0, 1 },
4294 #define OPTCOUNT (sizeof opt_table / sizeof opt_table[0])
4296 /* The MRI OPT pseudo-op. */
4308 const struct opt_action
*o
;
4313 if (*input_line_pointer
== '-')
4315 ++input_line_pointer
;
4318 else if (strncasecmp (input_line_pointer
, "NO", 2) == 0)
4320 input_line_pointer
+= 2;
4324 s
= input_line_pointer
;
4325 c
= get_symbol_end ();
4327 for (i
= 0, o
= opt_table
; i
< OPTCOUNT
; i
++, o
++)
4329 if (strcasecmp (s
, o
->name
) == 0)
4333 /* Restore input_line_pointer now in case the option
4335 *input_line_pointer
= c
;
4336 (*o
->pfn
) (o
->arg
, t
);
4338 else if (o
->pvar
!= NULL
)
4340 if (! t
&& o
->arg
== o
->notarg
)
4341 as_bad ("option `%s' may not be negated", s
);
4342 *input_line_pointer
= c
;
4343 *o
->pvar
= t
? o
->arg
: o
->notarg
;
4346 *input_line_pointer
= c
;
4352 as_bad ("option `%s' not recognized", s
);
4353 *input_line_pointer
= c
;
4356 while (*input_line_pointer
++ == ',');
4358 /* Move back to terminating character. */
4359 --input_line_pointer
;
4360 demand_empty_rest_of_line ();
4363 /* Skip ahead to a comma. This is used for OPT options which we do
4364 not suppor tand which take arguments. */
4367 skip_to_comma (arg
, on
)
4371 while (*input_line_pointer
!= ','
4372 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
4373 ++input_line_pointer
;
4376 /* Handle the OPT P=chip option. */
4383 if (*input_line_pointer
!= '=')
4385 /* This is just OPT P, which we do not support. */
4389 ++input_line_pointer
;
4393 /* Handle the OPT S option. */
4403 /* Handle the OPT T option. */
4406 opt_list_symbols (arg
, on
)
4411 listing
|= LISTING_SYMBOLS
;
4413 listing
&=~ LISTING_SYMBOLS
;
4416 /* Handle the MRI REG pseudo-op. */
4427 if (mri_line_label
== NULL
)
4429 as_bad ("missing label");
4430 ignore_rest_of_line ();
4436 s
= input_line_pointer
;
4437 while (isalnum ((unsigned char) *input_line_pointer
)
4438 #ifdef REGISTER_PREFIX
4439 || *input_line_pointer
== REGISTER_PREFIX
4441 || *input_line_pointer
== '/'
4442 || *input_line_pointer
== '-')
4443 ++input_line_pointer
;
4444 c
= *input_line_pointer
;
4445 *input_line_pointer
= '\0';
4447 if (m68k_ip_op (s
, &rop
) != 0)
4449 if (rop
.error
== NULL
)
4450 as_bad ("bad register list");
4452 as_bad ("bad register list: %s", rop
.error
);
4453 *input_line_pointer
= c
;
4454 ignore_rest_of_line ();
4458 *input_line_pointer
= c
;
4460 if (rop
.mode
== REGLST
)
4462 else if (rop
.mode
== DREG
)
4463 mask
= 1 << (rop
.reg
- DATA0
);
4464 else if (rop
.mode
== AREG
)
4465 mask
= 1 << (rop
.reg
- ADDR0
+ 8);
4466 else if (rop
.mode
== FPREG
)
4467 mask
= 1 << (rop
.reg
- FP0
+ 16);
4468 else if (rop
.mode
== CONTROL
4471 else if (rop
.mode
== CONTROL
4474 else if (rop
.mode
== CONTROL
4479 as_bad ("bad register list");
4480 ignore_rest_of_line ();
4484 S_SET_SEGMENT (mri_line_label
, absolute_section
);
4485 S_SET_VALUE (mri_line_label
, mask
);
4486 mri_line_label
->sy_frag
= &zero_address_frag
;
4488 demand_empty_rest_of_line ();
4491 /* This structure is used for the MRI SAVE and RESTORE pseudo-ops. */
4495 struct save_opts
*next
;
4497 int symbols_case_sensitive
;
4505 /* FIXME: We don't save OPT S. */
4508 /* This variable holds the stack of saved options. */
4510 static struct save_opts
*save_stack
;
4512 /* The MRI SAVE pseudo-op. */
4518 struct save_opts
*s
;
4520 s
= (struct save_opts
*) xmalloc (sizeof (struct save_opts
));
4521 s
->abspcadd
= m68k_abspcadd
;
4522 s
->symbols_case_sensitive
= symbols_case_sensitive
;
4523 s
->keep_locals
= flag_keep_locals
;
4524 s
->short_refs
= flag_short_refs
;
4525 s
->architecture
= current_architecture
;
4526 s
->quick
= m68k_quick
;
4527 s
->rel32
= m68k_rel32
;
4528 s
->listing
= listing
;
4529 s
->no_warnings
= flag_no_warnings
;
4531 s
->next
= save_stack
;
4534 demand_empty_rest_of_line ();
4537 /* The MRI RESTORE pseudo-op. */
4543 struct save_opts
*s
;
4545 if (save_stack
== NULL
)
4547 as_bad ("restore without save");
4548 ignore_rest_of_line ();
4553 save_stack
= s
->next
;
4555 m68k_abspcadd
= s
->abspcadd
;
4556 symbols_case_sensitive
= s
->symbols_case_sensitive
;
4557 flag_keep_locals
= s
->keep_locals
;
4558 flag_short_refs
= s
->short_refs
;
4559 current_architecture
= s
->architecture
;
4560 m68k_quick
= s
->quick
;
4561 m68k_rel32
= s
->rel32
;
4562 listing
= s
->listing
;
4563 flag_no_warnings
= s
->no_warnings
;
4567 demand_empty_rest_of_line ();
4570 /* Types of MRI structured control directives. */
4572 enum mri_control_type
4580 /* This structure is used to stack the MRI structured control
4583 struct mri_control_info
4585 /* The directive within which this one is enclosed. */
4586 struct mri_control_info
*outer
;
4588 /* The type of directive. */
4589 enum mri_control_type type
;
4591 /* Whether an ELSE has been in an IF. */
4594 /* The add or sub statement at the end of a FOR. */
4597 /* The label of the top of a FOR or REPEAT loop. */
4600 /* The label to jump to for the next iteration, or the else
4601 expression of a conditional. */
4604 /* The label to jump to to break out of the loop, or the label past
4605 the end of a conditional. */
4609 /* The stack of MRI structured control directives. */
4611 static struct mri_control_info
*mri_control_stack
;
4613 /* The current MRI structured control directive index number, used to
4614 generate label names. */
4616 static int mri_control_index
;
4618 /* Some function prototypes. */
4620 static char *mri_control_label
PARAMS ((void));
4621 static struct mri_control_info
*push_mri_control
4622 PARAMS ((enum mri_control_type
));
4623 static void pop_mri_control
PARAMS ((void));
4624 static int parse_mri_condition
PARAMS ((int *));
4625 static int parse_mri_control_operand
4626 PARAMS ((int *, const char **, const char **, const char **, const char **));
4627 static int swap_mri_condition
PARAMS ((int));
4628 static int reverse_mri_condition
PARAMS ((int));
4629 static void build_mri_control_operand
4630 PARAMS ((int, int, const char *, const char *, const char *, const char *,
4631 const char *, const char *, int));
4632 static void parse_mri_control_expression
4633 PARAMS ((char *, int, const char *, const char *, int));
4635 /* Generate a new MRI label structured control directive label name. */
4638 mri_control_label ()
4642 n
= (char *) xmalloc (20);
4643 sprintf (n
, "%smc%d", FAKE_LABEL_NAME
, mri_control_index
);
4644 ++mri_control_index
;
4648 /* Create a new MRI structured control directive. */
4650 static struct mri_control_info
*
4651 push_mri_control (type
)
4652 enum mri_control_type type
;
4654 struct mri_control_info
*n
;
4656 n
= (struct mri_control_info
*) xmalloc (sizeof (struct mri_control_info
));
4660 if (type
== mri_if
|| type
== mri_while
)
4663 n
->top
= mri_control_label ();
4664 n
->next
= mri_control_label ();
4665 n
->bottom
= mri_control_label ();
4667 n
->outer
= mri_control_stack
;
4668 mri_control_stack
= n
;
4673 /* Pop off the stack of MRI structured control directives. */
4678 struct mri_control_info
*n
;
4680 n
= mri_control_stack
;
4681 mri_control_stack
= n
->outer
;
4689 /* Recognize a condition code in an MRI structured control expression. */
4692 parse_mri_condition (pcc
)
4697 know (*input_line_pointer
== '<');
4699 ++input_line_pointer
;
4700 c1
= *input_line_pointer
++;
4701 c2
= *input_line_pointer
++;
4703 if (*input_line_pointer
!= '>')
4705 as_bad ("syntax error in structured control directive");
4709 ++input_line_pointer
;
4717 *pcc
= (c1
<< 8) | c2
;
4722 /* Parse a single operand in an MRI structured control expression. */
4725 parse_mri_control_operand (pcc
, leftstart
, leftstop
, rightstart
, rightstop
)
4727 const char **leftstart
;
4728 const char **leftstop
;
4729 const char **rightstart
;
4730 const char **rightstop
;
4742 if (*input_line_pointer
== '<')
4744 /* It's just a condition code. */
4745 return parse_mri_condition (pcc
);
4748 /* Look ahead for the condition code. */
4749 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
4751 if (*s
== '<' && s
[1] != '\0' && s
[2] != '\0' && s
[3] == '>')
4756 as_bad ("missing condition code in structured control directive");
4760 *leftstart
= input_line_pointer
;
4763 input_line_pointer
= s
;
4764 if (! parse_mri_condition (pcc
))
4767 /* Look ahead for AND or OR or end of line. */
4768 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
4770 if ((strncasecmp (s
, "AND", 3) == 0
4771 && (s
[3] == '.' || ! is_part_of_name (s
[3])))
4772 || (strncasecmp (s
, "OR", 2) == 0
4773 && (s
[2] == '.' || ! is_part_of_name (s
[2]))))
4777 *rightstart
= input_line_pointer
;
4780 input_line_pointer
= s
;
4785 #define MCC(b1, b2) (((b1) << 8) | (b2))
4787 /* Swap the sense of a condition. This changes the condition so that
4788 it generates the same result when the operands are swapped. */
4791 swap_mri_condition (cc
)
4796 case MCC ('h', 'i'): return MCC ('c', 's');
4797 case MCC ('l', 's'): return MCC ('c', 'c');
4798 case MCC ('c', 'c'): return MCC ('l', 's');
4799 case MCC ('c', 's'): return MCC ('h', 'i');
4800 case MCC ('p', 'l'): return MCC ('m', 'i');
4801 case MCC ('m', 'i'): return MCC ('p', 'l');
4802 case MCC ('g', 'e'): return MCC ('l', 'e');
4803 case MCC ('l', 't'): return MCC ('g', 't');
4804 case MCC ('g', 't'): return MCC ('l', 't');
4805 case MCC ('l', 'e'): return MCC ('g', 'e');
4810 /* Reverse the sense of a condition. */
4813 reverse_mri_condition (cc
)
4818 case MCC ('h', 'i'): return MCC ('l', 's');
4819 case MCC ('l', 's'): return MCC ('h', 'i');
4820 case MCC ('c', 'c'): return MCC ('c', 's');
4821 case MCC ('c', 's'): return MCC ('c', 'c');
4822 case MCC ('n', 'e'): return MCC ('e', 'q');
4823 case MCC ('e', 'q'): return MCC ('n', 'e');
4824 case MCC ('v', 'c'): return MCC ('v', 's');
4825 case MCC ('v', 's'): return MCC ('v', 'c');
4826 case MCC ('p', 'l'): return MCC ('m', 'i');
4827 case MCC ('m', 'i'): return MCC ('p', 'l');
4828 case MCC ('g', 'e'): return MCC ('l', 't');
4829 case MCC ('l', 't'): return MCC ('g', 'e');
4830 case MCC ('g', 't'): return MCC ('l', 'e');
4831 case MCC ('l', 'e'): return MCC ('g', 't');
4836 /* Build an MRI structured control expression. This generates test
4837 and branch instructions. It goes to TRUELAB if the condition is
4838 true, and to FALSELAB if the condition is false. Exactly one of
4839 TRUELAB and FALSELAB will be NULL, meaning to fall through. QUAL
4840 is the size qualifier for the expression. EXTENT is the size to
4841 use for the branch. */
4844 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
4845 rightstop
, truelab
, falselab
, extent
)
4848 const char *leftstart
;
4849 const char *leftstop
;
4850 const char *rightstart
;
4851 const char *rightstop
;
4852 const char *truelab
;
4853 const char *falselab
;
4859 /* The 68k can't do a general comparision with an immediate operand
4860 on the right hand side. */
4861 if (rightstart
!= NULL
&& *rightstart
== '#')
4865 cc
= swap_mri_condition (cc
);
4867 leftstart
= rightstart
;
4870 leftstop
= rightstop
;
4874 if (truelab
== NULL
)
4876 cc
= reverse_mri_condition (cc
);
4880 if (leftstart
!= NULL
)
4882 buf
= (char *) xmalloc (20
4883 + (leftstop
- leftstart
)
4884 + (rightstop
- rightstart
));
4892 memcpy (s
, leftstart
, leftstop
- leftstart
);
4893 s
+= leftstop
- leftstart
;
4895 memcpy (s
, rightstart
, rightstop
- rightstart
);
4896 s
+= rightstop
- rightstart
;
4902 buf
= (char *) xmalloc (20 + strlen (truelab
));
4910 strcpy (s
, truelab
);
4915 /* Parse an MRI structured control expression. This generates test
4916 and branch instructions. STOP is where the expression ends. It
4917 goes to TRUELAB if the condition is true, and to FALSELAB if the
4918 condition is false. Exactly one of TRUELAB and FALSELAB will be
4919 NULL, meaning to fall through. QUAL is the size qualifier for the
4920 expression. EXTENT is the size to use for the branch. */
4923 parse_mri_control_expression (stop
, qual
, truelab
, falselab
, extent
)
4926 const char *truelab
;
4927 const char *falselab
;
4932 const char *leftstart
;
4933 const char *leftstop
;
4934 const char *rightstart
;
4935 const char *rightstop
;
4940 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
4941 &rightstart
, &rightstop
))
4947 if (strncasecmp (input_line_pointer
, "AND", 3) == 0)
4951 if (falselab
!= NULL
)
4954 flab
= mri_control_label ();
4956 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
4957 rightstop
, (const char *) NULL
, flab
, extent
);
4959 input_line_pointer
+= 3;
4960 if (*input_line_pointer
!= '.'
4961 || input_line_pointer
[1] == '\0')
4965 qual
= input_line_pointer
[1];
4966 input_line_pointer
+= 2;
4969 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
4970 &rightstart
, &rightstop
))
4976 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
4977 rightstop
, truelab
, falselab
, extent
);
4979 if (falselab
== NULL
)
4982 else if (strncasecmp (input_line_pointer
, "OR", 2) == 0)
4986 if (truelab
!= NULL
)
4989 tlab
= mri_control_label ();
4991 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
4992 rightstop
, tlab
, (const char *) NULL
, extent
);
4994 input_line_pointer
+= 2;
4995 if (*input_line_pointer
!= '.'
4996 || input_line_pointer
[1] == '\0')
5000 qual
= input_line_pointer
[1];
5001 input_line_pointer
+= 2;
5004 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5005 &rightstart
, &rightstop
))
5011 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5012 rightstop
, truelab
, falselab
, extent
);
5014 if (truelab
== NULL
)
5019 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5020 rightstop
, truelab
, falselab
, extent
);
5024 if (input_line_pointer
!= stop
)
5025 as_bad ("syntax error in structured control directive");
5028 /* Handle the MRI IF pseudo-op. This may be a structured control
5029 directive, or it may be a regular assembler conditional, depending
5038 struct mri_control_info
*n
;
5040 /* A structured control directive must end with THEN with an
5041 optional qualifier. */
5042 s
= input_line_pointer
;
5043 while (! is_end_of_line
[(unsigned char) *s
])
5046 while (s
> input_line_pointer
&& (*s
== ' ' || *s
== '\t'))
5049 if (s
- input_line_pointer
> 1
5053 if (s
- input_line_pointer
< 3
5054 || strncasecmp (s
- 3, "THEN", 4) != 0)
5058 as_bad ("missing then");
5059 ignore_rest_of_line ();
5063 /* It's a conditional. */
5068 /* Since this might be a conditional if, this pseudo-op will be
5069 called even if we are supported to be ignoring input. Double
5070 check now. Clobber *input_line_pointer so that ignore_input
5071 thinks that this is not a special pseudo-op. */
5072 c
= *input_line_pointer
;
5073 *input_line_pointer
= 0;
5074 if (ignore_input ())
5076 *input_line_pointer
= c
;
5077 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5078 ++input_line_pointer
;
5079 demand_empty_rest_of_line ();
5082 *input_line_pointer
= c
;
5084 n
= push_mri_control (mri_if
);
5086 parse_mri_control_expression (s
- 3, qual
, (const char *) NULL
,
5087 n
->next
, s
[1] == '.' ? s
[2] : '\0');
5090 input_line_pointer
= s
+ 3;
5092 input_line_pointer
= s
+ 1;
5094 demand_empty_rest_of_line ();
5097 /* Handle the MRI else pseudo-op. If we are currently doing an MRI
5098 structured IF, associate the ELSE with the IF. Otherwise, assume
5099 it is a conditional else. */
5110 && (mri_control_stack
== NULL
5111 || mri_control_stack
->type
!= mri_if
5112 || mri_control_stack
->else_seen
))
5118 c
= *input_line_pointer
;
5119 *input_line_pointer
= 0;
5120 if (ignore_input ())
5122 *input_line_pointer
= c
;
5123 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5124 ++input_line_pointer
;
5125 demand_empty_rest_of_line ();
5128 *input_line_pointer
= c
;
5130 if (mri_control_stack
== NULL
5131 || mri_control_stack
->type
!= mri_if
5132 || mri_control_stack
->else_seen
)
5134 as_bad ("else without matching if");
5135 ignore_rest_of_line ();
5139 mri_control_stack
->else_seen
= 1;
5141 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->bottom
));
5144 sprintf (buf
, "bra%s %s", q
, mri_control_stack
->bottom
);
5148 colon (mri_control_stack
->next
);
5150 demand_empty_rest_of_line ();
5153 /* Handle the MRI ENDI pseudo-op. */
5159 if (mri_control_stack
== NULL
5160 || mri_control_stack
->type
!= mri_if
)
5162 as_bad ("endi without matching if");
5163 ignore_rest_of_line ();
5167 /* ignore_input will not return true for ENDI, so we don't need to
5168 worry about checking it again here. */
5170 if (! mri_control_stack
->else_seen
)
5171 colon (mri_control_stack
->next
);
5172 colon (mri_control_stack
->bottom
);
5176 demand_empty_rest_of_line ();
5179 /* Handle the MRI BREAK pseudo-op. */
5182 s_mri_break (extent
)
5185 struct mri_control_info
*n
;
5189 n
= mri_control_stack
;
5191 && n
->type
!= mri_for
5192 && n
->type
!= mri_repeat
5193 && n
->type
!= mri_while
)
5197 as_bad ("break outside of structured loop");
5198 ignore_rest_of_line ();
5202 buf
= (char *) xmalloc (20 + strlen (n
->bottom
));
5205 sprintf (buf
, "bra%s %s", ex
, n
->bottom
);
5209 demand_empty_rest_of_line ();
5212 /* Handle the MRI NEXT pseudo-op. */
5218 struct mri_control_info
*n
;
5222 n
= mri_control_stack
;
5224 && n
->type
!= mri_for
5225 && n
->type
!= mri_repeat
5226 && n
->type
!= mri_while
)
5230 as_bad ("next outside of structured loop");
5231 ignore_rest_of_line ();
5235 buf
= (char *) xmalloc (20 + strlen (n
->next
));
5238 sprintf (buf
, "bra%s %s", ex
, n
->next
);
5242 demand_empty_rest_of_line ();
5245 /* Handle the MRI FOR pseudo-op. */
5251 const char *varstart
, *varstop
;
5252 const char *initstart
, *initstop
;
5253 const char *endstart
, *endstop
;
5254 const char *bystart
, *bystop
;
5258 struct mri_control_info
*n
;
5264 FOR.q var = init { TO | DOWNTO } end [ BY by ] DO.e
5267 varstart
= input_line_pointer
;
5269 /* Look for the '='. */
5270 while (! is_end_of_line
[(unsigned char) *input_line_pointer
]
5271 && *input_line_pointer
!= '=')
5272 ++input_line_pointer
;
5273 if (*input_line_pointer
!= '=')
5275 as_bad ("missing =");
5276 ignore_rest_of_line ();
5280 varstop
= input_line_pointer
;
5282 ++input_line_pointer
;
5284 initstart
= input_line_pointer
;
5286 /* Look for TO or DOWNTO. */
5289 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5291 if (strncasecmp (input_line_pointer
, "TO", 2) == 0
5292 && ! is_part_of_name (input_line_pointer
[2]))
5294 initstop
= input_line_pointer
;
5295 input_line_pointer
+= 2;
5298 if (strncasecmp (input_line_pointer
, "DOWNTO", 6) == 0
5299 && ! is_part_of_name (input_line_pointer
[6]))
5301 initstop
= input_line_pointer
;
5303 input_line_pointer
+= 6;
5306 ++input_line_pointer
;
5308 if (initstop
== NULL
)
5310 as_bad ("missing to or downto");
5311 ignore_rest_of_line ();
5315 endstart
= input_line_pointer
;
5317 /* Look for BY or DO. */
5320 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5322 if (strncasecmp (input_line_pointer
, "BY", 2) == 0
5323 && ! is_part_of_name (input_line_pointer
[2]))
5325 endstop
= input_line_pointer
;
5327 input_line_pointer
+= 2;
5330 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
5331 && (input_line_pointer
[2] == '.'
5332 || ! is_part_of_name (input_line_pointer
[2])))
5334 endstop
= input_line_pointer
;
5335 input_line_pointer
+= 2;
5338 ++input_line_pointer
;
5340 if (endstop
== NULL
)
5342 as_bad ("missing do");
5343 ignore_rest_of_line ();
5350 bystop
= bystart
+ 2;
5354 bystart
= input_line_pointer
;
5358 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5360 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
5361 && (input_line_pointer
[2] == '.'
5362 || ! is_part_of_name (input_line_pointer
[2])))
5364 bystop
= input_line_pointer
;
5365 input_line_pointer
+= 2;
5368 ++input_line_pointer
;
5372 as_bad ("missing do");
5373 ignore_rest_of_line ();
5378 if (*input_line_pointer
!= '.')
5382 extent
= input_line_pointer
[1];
5383 input_line_pointer
+= 2;
5386 /* We have fully parsed the FOR operands. Now build the loop. */
5388 n
= push_mri_control (mri_for
);
5390 buf
= (char *) xmalloc (50 + (input_line_pointer
- varstart
));
5401 memcpy (s
, initstart
, initstop
- initstart
);
5402 s
+= initstop
- initstart
;
5404 memcpy (s
, varstart
, varstop
- varstart
);
5405 s
+= varstop
- varstart
;
5419 memcpy (s
, endstart
, endstop
- endstart
);
5420 s
+= endstop
- endstart
;
5422 memcpy (s
, varstart
, varstop
- varstart
);
5423 s
+= varstop
- varstart
;
5431 sprintf (buf
, "blt%s %s", ex
, n
->bottom
);
5433 sprintf (buf
, "bgt%s %s", ex
, n
->bottom
);
5436 /* Put together the add or sub instruction used by ENDF. */
5446 memcpy (s
, bystart
, bystop
- bystart
);
5447 s
+= bystop
- bystart
;
5449 memcpy (s
, varstart
, varstop
- varstart
);
5450 s
+= varstop
- varstart
;
5454 demand_empty_rest_of_line ();
5457 /* Handle the MRI ENDF pseudo-op. */
5463 if (mri_control_stack
== NULL
5464 || mri_control_stack
->type
!= mri_for
)
5466 as_bad ("endf without for");
5467 ignore_rest_of_line ();
5471 colon (mri_control_stack
->next
);
5473 md_assemble (mri_control_stack
->incr
);
5475 sprintf (mri_control_stack
->incr
, "bra %s", mri_control_stack
->top
);
5476 md_assemble (mri_control_stack
->incr
);
5478 free (mri_control_stack
->incr
);
5480 colon (mri_control_stack
->bottom
);
5484 demand_empty_rest_of_line ();
5487 /* Handle the MRI REPEAT pseudo-op. */
5490 s_mri_repeat (ignore
)
5493 struct mri_control_info
*n
;
5495 n
= push_mri_control (mri_repeat
);
5497 demand_empty_rest_of_line ();
5500 /* Handle the MRI UNTIL pseudo-op. */
5508 if (mri_control_stack
== NULL
5509 || mri_control_stack
->type
!= mri_repeat
)
5511 as_bad ("until without repeat");
5512 ignore_rest_of_line ();
5516 colon (mri_control_stack
->next
);
5518 for (s
= input_line_pointer
; ! is_end_of_line
[(unsigned char) *s
]; s
++)
5521 parse_mri_control_expression (s
, qual
, (const char *) NULL
,
5522 mri_control_stack
->top
, '\0');
5524 colon (mri_control_stack
->bottom
);
5526 input_line_pointer
= s
;
5528 demand_empty_rest_of_line ();
5531 /* Handle the MRI WHILE pseudo-op. */
5539 struct mri_control_info
*n
;
5541 s
= input_line_pointer
;
5542 while (! is_end_of_line
[(unsigned char) *s
])
5545 while (*s
== ' ' || *s
== '\t')
5547 if (s
- input_line_pointer
> 1
5550 if (s
- input_line_pointer
< 2
5551 || strncasecmp (s
- 1, "DO", 2) != 0)
5553 as_bad ("missing do");
5554 ignore_rest_of_line ();
5558 n
= push_mri_control (mri_while
);
5562 parse_mri_control_expression (s
- 1, qual
, (const char *) NULL
, n
->bottom
,
5563 s
[1] == '.' ? s
[2] : '\0');
5565 input_line_pointer
= s
+ 1;
5566 if (*input_line_pointer
== '.')
5567 input_line_pointer
+= 2;
5569 demand_empty_rest_of_line ();
5572 /* Handle the MRI ENDW pseudo-op. */
5580 if (mri_control_stack
== NULL
5581 || mri_control_stack
->type
!= mri_while
)
5583 as_bad ("endw without while");
5584 ignore_rest_of_line ();
5588 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->next
));
5589 sprintf (buf
, "bra %s", mri_control_stack
->next
);
5593 colon (mri_control_stack
->bottom
);
5597 demand_empty_rest_of_line ();
5602 * Invocation line includes a switch not recognized by the base assembler.
5603 * See if it's a processor-specific option. These are:
5605 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
5606 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
5607 * Select the architecture. Instructions or features not
5608 * supported by the selected architecture cause fatal
5609 * errors. More than one may be specified. The default is
5610 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
5611 * for -m68000, and -m68882 is a synonym for -m68881.
5612 * -[A]m[c]no-68851, -[A]m[c]no-68881
5613 * Don't accept 688?1 instructions. (The "c" is kind of silly,
5614 * so don't use or document it, but that's the way the parsing
5617 * -pic Indicates PIC.
5618 * -k Indicates PIC. (Sun 3 only.)
5623 CONST
char *md_shortopts
= "lSA:m:kQ:V";
5625 CONST
char *md_shortopts
= "lSA:m:k";
5628 struct option md_longopts
[] = {
5629 #define OPTION_PIC (OPTION_MD_BASE)
5630 {"pic", no_argument
, NULL
, OPTION_PIC
},
5631 #define OPTION_REGISTER_PREFIX_OPTIONAL (OPTION_MD_BASE + 1)
5632 {"register-prefix-optional", no_argument
, NULL
,
5633 OPTION_REGISTER_PREFIX_OPTIONAL
},
5634 {NULL
, no_argument
, NULL
, 0}
5636 size_t md_longopts_size
= sizeof(md_longopts
);
5639 md_parse_option (c
, arg
)
5645 case 'l': /* -l means keep external to 2 bit offset
5646 rather than 16 bit one */
5647 flag_short_refs
= 1;
5650 case 'S': /* -S means that jbsr's always turn into
5652 flag_long_jumps
= 1;
5658 /* intentional fall-through */
5661 if (arg
[0] == 'n' && arg
[1] == 'o' && arg
[2] == '-')
5665 const char *oarg
= arg
;
5671 if (arg
[0] == 'c' && arg
[1] == '6')
5674 for (i
= 0; i
< n_archs
; i
++)
5675 if (!strcmp (arg
, archs
[i
].name
))
5680 as_bad ("unrecognized option `%s'", oarg
);
5683 arch
= archs
[i
].arch
;
5686 else if (arch
== m68851
)
5695 if (arg
[0] == 'c' && arg
[1] == '6')
5698 for (i
= 0; i
< n_archs
; i
++)
5699 if (!strcmp (arg
, archs
[i
].name
))
5701 unsigned long arch
= archs
[i
].arch
;
5702 if (cpu_of_arch (arch
))
5703 /* It's a cpu spec. */
5705 current_architecture
&= ~m68000up
;
5706 current_architecture
|= arch
;
5708 else if (arch
== m68881
)
5710 current_architecture
|= m68881
;
5713 else if (arch
== m68851
)
5715 current_architecture
|= m68851
;
5725 as_bad ("unrecognized architecture specification `%s'", arg
);
5734 break; /* -pic, Position Independent Code */
5736 case OPTION_REGISTER_PREFIX_OPTIONAL
:
5737 flag_reg_prefix_optional
= 1;
5752 md_show_usage (stream
)
5757 -l use 1 word for refs to undefined symbols [default 2]\n\
5758 -m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060\n\
5759 | -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360\n\
5761 specify variant of 680X0 architecture [default 68020]\n\
5762 -m68881 | -m68882 | -mno-68881 | -mno-68882\n\
5763 target has/lacks floating-point coprocessor\n\
5764 [default yes for 68020, 68030, and cpu32]\n\
5765 -m68851 | -mno-68851\n\
5766 target has/lacks memory-management unit coprocessor\n\
5767 [default yes for 68020 and up]\n\
5768 -pic, -k generate position independent code\n\
5769 -S turn jbsr into jsr\n\
5770 --register-prefix-optional\n\
5771 recognize register names without prefix character\n");
5776 /* TEST2: Test md_assemble() */
5777 /* Warning, this routine probably doesn't work anymore */
5781 struct m68k_it the_ins
;
5789 if (!gets (buf
) || !*buf
)
5791 if (buf
[0] == '|' || buf
[1] == '.')
5793 for (cp
= buf
; *cp
; cp
++)
5798 memset (&the_ins
, '\0', sizeof (the_ins
));
5799 m68k_ip (&the_ins
, buf
);
5802 printf ("Error %s in %s\n", the_ins
.error
, buf
);
5806 printf ("Opcode(%d.%s): ", the_ins
.numo
, the_ins
.args
);
5807 for (n
= 0; n
< the_ins
.numo
; n
++)
5808 printf (" 0x%x", the_ins
.opcode
[n
] & 0xffff);
5810 print_the_insn (&the_ins
.opcode
[0], stdout
);
5811 (void) putchar ('\n');
5813 for (n
= 0; n
< strlen (the_ins
.args
) / 2; n
++)
5815 if (the_ins
.operands
[n
].error
)
5817 printf ("op%d Error %s in %s\n", n
, the_ins
.operands
[n
].error
, buf
);
5820 printf ("mode %d, reg %d, ", the_ins
.operands
[n
].mode
, the_ins
.operands
[n
].reg
);
5821 if (the_ins
.operands
[n
].b_const
)
5822 printf ("Constant: '%.*s', ", 1 + the_ins
.operands
[n
].e_const
- the_ins
.operands
[n
].b_const
, the_ins
.operands
[n
].b_const
);
5823 printf ("ireg %d, isiz %d, imul %d, ", the_ins
.operands
[n
].ireg
, the_ins
.operands
[n
].isiz
, the_ins
.operands
[n
].imul
);
5824 if (the_ins
.operands
[n
].b_iadd
)
5825 printf ("Iadd: '%.*s',", 1 + the_ins
.operands
[n
].e_iadd
- the_ins
.operands
[n
].b_iadd
, the_ins
.operands
[n
].b_iadd
);
5826 (void) putchar ('\n');
5838 while (*str
&& *str
!= ' ')
5840 if (str
[-1] == ':' || str
[1] == '=')
5847 /* Possible states for relaxation:
5849 0 0 branch offset byte (bra, etc)
5853 1 0 indexed offsets byte a0@(32,d4:w:1) etc
5857 2 0 two-offset index word-word a0@(32,d4)@(45) etc
5864 /* We have no need to default values of symbols. */
5868 md_undefined_symbol (name
)
5874 /* Round up a section size to the appropriate boundary. */
5876 md_section_align (segment
, size
)
5880 return size
; /* Byte alignment is fine */
5883 /* Exactly what point is a PC-relative offset relative TO?
5884 On the 68k, it is relative to the address of the first extension
5885 word. The difference between the addresses of the offset and the
5886 first extension word is stored in fx_pcrel_adjust. */
5888 md_pcrel_from (fixP
)
5893 /* Because fx_pcrel_adjust is a char, and may be unsigned, we store
5895 adjust
= fixP
->fx_pcrel_adjust
;
5898 return fixP
->fx_where
+ fixP
->fx_frag
->fr_address
- adjust
;
5901 #ifndef BFD_ASSEMBLER
5904 tc_coff_symbol_emit_hook (ignore
)
5910 tc_coff_sizemachdep (frag
)
5913 switch (frag
->fr_subtype
& 0x3)
5928 /* end of tc-m68k.c */