1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2022 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
35 #include "coff/xcoff.h"
39 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
41 /* Tell the main code what the endianness is. */
42 extern int target_big_endian
;
44 /* Whether or not, we've set target_big_endian. */
45 static int set_target_endian
= 0;
47 /* Whether to use user friendly register names. */
48 #ifndef TARGET_REG_NAMES_P
49 #define TARGET_REG_NAMES_P false
52 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
55 /* #lo(value) denotes the least significant 16 bits of the indicated. */
56 #define PPC_LO(v) ((v) & 0xffff)
58 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
59 #define PPC_HI(v) (((v) >> 16) & 0xffff)
61 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
62 the indicated value, compensating for #lo() being treated as a
64 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
66 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
67 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
69 /* #highera(value) denotes bits 32 through 47 of the indicated value,
70 compensating for #lo() being treated as a signed number. */
71 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
73 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
74 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
76 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
77 compensating for #lo being treated as a signed number. */
78 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
80 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
82 /* For the time being on ppc64, don't report overflow on @h and @ha
83 applied to constants. */
84 #define REPORT_OVERFLOW_HI 0
86 static bool reg_names_p
= TARGET_REG_NAMES_P
;
88 static void ppc_byte (int);
90 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
91 static void ppc_tc (int);
92 static void ppc_machine (int);
96 static void ppc_comm (int);
97 static void ppc_bb (int);
98 static void ppc_bc (int);
99 static void ppc_bf (int);
100 static void ppc_biei (int);
101 static void ppc_bs (int);
102 static void ppc_eb (int);
103 static void ppc_ec (int);
104 static void ppc_ef (int);
105 static void ppc_es (int);
106 static void ppc_csect (int);
107 static void ppc_dwsect (int);
108 static void ppc_change_csect (symbolS
*, offsetT
);
109 static void ppc_file (int);
110 static void ppc_function (int);
111 static void ppc_extern (int);
112 static void ppc_globl (int);
113 static void ppc_lglobl (int);
114 static void ppc_ref (int);
115 static void ppc_section (int);
116 static void ppc_named_section (int);
117 static void ppc_stabx (int);
118 static void ppc_rename (int);
119 static void ppc_toc (int);
120 static void ppc_xcoff_cons (int);
121 static void ppc_vbyte (int);
122 static void ppc_weak (int);
123 static void ppc_GNU_visibility (int);
127 static void ppc_elf_rdata (int);
128 static void ppc_elf_lcomm (int);
129 static void ppc_elf_localentry (int);
130 static void ppc_elf_abiversion (int);
131 static void ppc_elf_gnu_attribute (int);
134 /* Generic assembler global variables which must be defined by all
138 /* This string holds the chars that always start a comment. If the
139 pre-processor is disabled, these aren't very useful. The macro
140 tc_comment_chars points to this. We use this, rather than the
141 usual comment_chars, so that we can switch for Solaris conventions. */
142 static const char ppc_solaris_comment_chars
[] = "#!";
143 static const char ppc_eabi_comment_chars
[] = "#";
145 #ifdef TARGET_SOLARIS_COMMENT
146 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
148 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
151 const char comment_chars
[] = "#";
154 /* Characters which start a comment at the beginning of a line. */
155 const char line_comment_chars
[] = "#";
157 /* Characters which may be used to separate multiple commands on a
159 const char line_separator_chars
[] = ";";
161 /* Characters which are used to indicate an exponent in a floating
163 const char EXP_CHARS
[] = "eE";
165 /* Characters which mean that a number is a floating point constant,
167 const char FLT_CHARS
[] = "dD";
169 /* Anything that can start an operand needs to be mentioned here,
170 to stop the input scrubber eating whitespace. */
171 const char ppc_symbol_chars
[] = "%[";
173 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
174 int ppc_cie_data_alignment
;
176 /* The dwarf2 minimum instruction length. */
177 int ppc_dwarf2_line_min_insn_length
;
179 /* More than this number of nops in an alignment op gets a branch
181 unsigned long nop_limit
= 4;
183 /* The type of processor we are assembling for. This is one or more
184 of the PPC_OPCODE flags defined in opcode/ppc.h. */
185 ppc_cpu_t ppc_cpu
= 0;
186 ppc_cpu_t sticky
= 0;
188 /* Value for ELF e_flags EF_PPC64_ABI. */
189 unsigned int ppc_abiversion
= 0;
192 /* Flags set on encountering toc relocs. */
194 has_large_toc_reloc
= 1,
195 has_small_toc_reloc
= 2
199 /* Warn on emitting data to code sections. */
205 /* The target specific pseudo-ops which we support. */
207 const pseudo_typeS md_pseudo_table
[] =
209 /* Pseudo-ops which must be overridden. */
210 { "byte", ppc_byte
, 0 },
213 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
214 legitimately belong in the obj-*.c file. However, XCOFF is based
215 on COFF, and is only implemented for the RS/6000. We just use
216 obj-coff.c, and add what we need here. */
217 { "comm", ppc_comm
, 0 },
218 { "lcomm", ppc_comm
, 1 },
222 { "bi", ppc_biei
, 0 },
224 { "csect", ppc_csect
, 0 },
225 { "dwsect", ppc_dwsect
, 0 },
226 { "data", ppc_section
, 'd' },
230 { "ei", ppc_biei
, 1 },
232 { "extern", ppc_extern
, 0 },
233 { "file", ppc_file
, 0 },
234 { "function", ppc_function
, 0 },
235 { "globl", ppc_globl
, 0 },
236 { "lglobl", ppc_lglobl
, 0 },
237 { "ref", ppc_ref
, 0 },
238 { "rename", ppc_rename
, 0 },
239 { "section", ppc_named_section
, 0 },
240 { "stabx", ppc_stabx
, 0 },
241 { "text", ppc_section
, 't' },
242 { "toc", ppc_toc
, 0 },
243 { "long", ppc_xcoff_cons
, 2 },
244 { "llong", ppc_xcoff_cons
, 3 },
245 { "word", ppc_xcoff_cons
, 1 },
246 { "short", ppc_xcoff_cons
, 1 },
247 { "vbyte", ppc_vbyte
, 0 },
248 { "weak", ppc_weak
, 0 },
250 /* Enable GNU syntax for symbol visibility. */
251 {"internal", ppc_GNU_visibility
, SYM_V_INTERNAL
},
252 {"hidden", ppc_GNU_visibility
, SYM_V_HIDDEN
},
253 {"protected", ppc_GNU_visibility
, SYM_V_PROTECTED
},
257 { "llong", cons
, 8 },
258 { "rdata", ppc_elf_rdata
, 0 },
259 { "rodata", ppc_elf_rdata
, 0 },
260 { "lcomm", ppc_elf_lcomm
, 0 },
261 { "localentry", ppc_elf_localentry
, 0 },
262 { "abiversion", ppc_elf_abiversion
, 0 },
263 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
266 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
268 { "machine", ppc_machine
, 0 },
275 /* Predefined register names if -mregnames (or default for Windows NT).
276 In general, there are lots of them, in an attempt to be compatible
277 with a number of other Windows NT assemblers. */
279 /* Structure to hold information about predefined registers. */
283 unsigned short value
;
284 unsigned short flags
;
287 /* List of registers that are pre-defined:
289 Each general register has predefined names of the form:
290 1. r<reg_num> which has the value <reg_num>.
291 2. r.<reg_num> which has the value <reg_num>.
293 Each floating point register has predefined names of the form:
294 1. f<reg_num> which has the value <reg_num>.
295 2. f.<reg_num> which has the value <reg_num>.
297 Each vector unit register has predefined names of the form:
298 1. v<reg_num> which has the value <reg_num>.
299 2. v.<reg_num> which has the value <reg_num>.
301 Each condition register has predefined names of the form:
302 1. cr<reg_num> which has the value <reg_num>.
303 2. cr.<reg_num> which has the value <reg_num>.
305 There are individual registers as well:
306 sp or r.sp has the value 1
307 rtoc or r.toc has the value 2
312 dsisr has the value 18
314 sdr1 has the value 25
315 srr0 has the value 26
316 srr1 has the value 27
318 The table is sorted. Suitable for searching by a binary search. */
320 static const struct pd_reg pre_defined_registers
[] =
322 /* VSX accumulators. */
323 { "a0", 0, PPC_OPERAND_ACC
},
324 { "a1", 1, PPC_OPERAND_ACC
},
325 { "a2", 2, PPC_OPERAND_ACC
},
326 { "a3", 3, PPC_OPERAND_ACC
},
327 { "a4", 4, PPC_OPERAND_ACC
},
328 { "a5", 5, PPC_OPERAND_ACC
},
329 { "a6", 6, PPC_OPERAND_ACC
},
330 { "a7", 7, PPC_OPERAND_ACC
},
332 /* Condition Registers */
333 { "cr.0", 0, PPC_OPERAND_CR_REG
},
334 { "cr.1", 1, PPC_OPERAND_CR_REG
},
335 { "cr.2", 2, PPC_OPERAND_CR_REG
},
336 { "cr.3", 3, PPC_OPERAND_CR_REG
},
337 { "cr.4", 4, PPC_OPERAND_CR_REG
},
338 { "cr.5", 5, PPC_OPERAND_CR_REG
},
339 { "cr.6", 6, PPC_OPERAND_CR_REG
},
340 { "cr.7", 7, PPC_OPERAND_CR_REG
},
342 { "cr0", 0, PPC_OPERAND_CR_REG
},
343 { "cr1", 1, PPC_OPERAND_CR_REG
},
344 { "cr2", 2, PPC_OPERAND_CR_REG
},
345 { "cr3", 3, PPC_OPERAND_CR_REG
},
346 { "cr4", 4, PPC_OPERAND_CR_REG
},
347 { "cr5", 5, PPC_OPERAND_CR_REG
},
348 { "cr6", 6, PPC_OPERAND_CR_REG
},
349 { "cr7", 7, PPC_OPERAND_CR_REG
},
351 { "ctr", 9, PPC_OPERAND_SPR
},
352 { "dar", 19, PPC_OPERAND_SPR
},
353 { "dec", 22, PPC_OPERAND_SPR
},
354 { "dsisr", 18, PPC_OPERAND_SPR
},
356 /* Floating point registers */
357 { "f.0", 0, PPC_OPERAND_FPR
},
358 { "f.1", 1, PPC_OPERAND_FPR
},
359 { "f.10", 10, PPC_OPERAND_FPR
},
360 { "f.11", 11, PPC_OPERAND_FPR
},
361 { "f.12", 12, PPC_OPERAND_FPR
},
362 { "f.13", 13, PPC_OPERAND_FPR
},
363 { "f.14", 14, PPC_OPERAND_FPR
},
364 { "f.15", 15, PPC_OPERAND_FPR
},
365 { "f.16", 16, PPC_OPERAND_FPR
},
366 { "f.17", 17, PPC_OPERAND_FPR
},
367 { "f.18", 18, PPC_OPERAND_FPR
},
368 { "f.19", 19, PPC_OPERAND_FPR
},
369 { "f.2", 2, PPC_OPERAND_FPR
},
370 { "f.20", 20, PPC_OPERAND_FPR
},
371 { "f.21", 21, PPC_OPERAND_FPR
},
372 { "f.22", 22, PPC_OPERAND_FPR
},
373 { "f.23", 23, PPC_OPERAND_FPR
},
374 { "f.24", 24, PPC_OPERAND_FPR
},
375 { "f.25", 25, PPC_OPERAND_FPR
},
376 { "f.26", 26, PPC_OPERAND_FPR
},
377 { "f.27", 27, PPC_OPERAND_FPR
},
378 { "f.28", 28, PPC_OPERAND_FPR
},
379 { "f.29", 29, PPC_OPERAND_FPR
},
380 { "f.3", 3, PPC_OPERAND_FPR
},
381 { "f.30", 30, PPC_OPERAND_FPR
},
382 { "f.31", 31, PPC_OPERAND_FPR
},
383 { "f.32", 32, PPC_OPERAND_VSR
},
384 { "f.33", 33, PPC_OPERAND_VSR
},
385 { "f.34", 34, PPC_OPERAND_VSR
},
386 { "f.35", 35, PPC_OPERAND_VSR
},
387 { "f.36", 36, PPC_OPERAND_VSR
},
388 { "f.37", 37, PPC_OPERAND_VSR
},
389 { "f.38", 38, PPC_OPERAND_VSR
},
390 { "f.39", 39, PPC_OPERAND_VSR
},
391 { "f.4", 4, PPC_OPERAND_FPR
},
392 { "f.40", 40, PPC_OPERAND_VSR
},
393 { "f.41", 41, PPC_OPERAND_VSR
},
394 { "f.42", 42, PPC_OPERAND_VSR
},
395 { "f.43", 43, PPC_OPERAND_VSR
},
396 { "f.44", 44, PPC_OPERAND_VSR
},
397 { "f.45", 45, PPC_OPERAND_VSR
},
398 { "f.46", 46, PPC_OPERAND_VSR
},
399 { "f.47", 47, PPC_OPERAND_VSR
},
400 { "f.48", 48, PPC_OPERAND_VSR
},
401 { "f.49", 49, PPC_OPERAND_VSR
},
402 { "f.5", 5, PPC_OPERAND_FPR
},
403 { "f.50", 50, PPC_OPERAND_VSR
},
404 { "f.51", 51, PPC_OPERAND_VSR
},
405 { "f.52", 52, PPC_OPERAND_VSR
},
406 { "f.53", 53, PPC_OPERAND_VSR
},
407 { "f.54", 54, PPC_OPERAND_VSR
},
408 { "f.55", 55, PPC_OPERAND_VSR
},
409 { "f.56", 56, PPC_OPERAND_VSR
},
410 { "f.57", 57, PPC_OPERAND_VSR
},
411 { "f.58", 58, PPC_OPERAND_VSR
},
412 { "f.59", 59, PPC_OPERAND_VSR
},
413 { "f.6", 6, PPC_OPERAND_FPR
},
414 { "f.60", 60, PPC_OPERAND_VSR
},
415 { "f.61", 61, PPC_OPERAND_VSR
},
416 { "f.62", 62, PPC_OPERAND_VSR
},
417 { "f.63", 63, PPC_OPERAND_VSR
},
418 { "f.7", 7, PPC_OPERAND_FPR
},
419 { "f.8", 8, PPC_OPERAND_FPR
},
420 { "f.9", 9, PPC_OPERAND_FPR
},
422 { "f0", 0, PPC_OPERAND_FPR
},
423 { "f1", 1, PPC_OPERAND_FPR
},
424 { "f10", 10, PPC_OPERAND_FPR
},
425 { "f11", 11, PPC_OPERAND_FPR
},
426 { "f12", 12, PPC_OPERAND_FPR
},
427 { "f13", 13, PPC_OPERAND_FPR
},
428 { "f14", 14, PPC_OPERAND_FPR
},
429 { "f15", 15, PPC_OPERAND_FPR
},
430 { "f16", 16, PPC_OPERAND_FPR
},
431 { "f17", 17, PPC_OPERAND_FPR
},
432 { "f18", 18, PPC_OPERAND_FPR
},
433 { "f19", 19, PPC_OPERAND_FPR
},
434 { "f2", 2, PPC_OPERAND_FPR
},
435 { "f20", 20, PPC_OPERAND_FPR
},
436 { "f21", 21, PPC_OPERAND_FPR
},
437 { "f22", 22, PPC_OPERAND_FPR
},
438 { "f23", 23, PPC_OPERAND_FPR
},
439 { "f24", 24, PPC_OPERAND_FPR
},
440 { "f25", 25, PPC_OPERAND_FPR
},
441 { "f26", 26, PPC_OPERAND_FPR
},
442 { "f27", 27, PPC_OPERAND_FPR
},
443 { "f28", 28, PPC_OPERAND_FPR
},
444 { "f29", 29, PPC_OPERAND_FPR
},
445 { "f3", 3, PPC_OPERAND_FPR
},
446 { "f30", 30, PPC_OPERAND_FPR
},
447 { "f31", 31, PPC_OPERAND_FPR
},
448 { "f32", 32, PPC_OPERAND_VSR
},
449 { "f33", 33, PPC_OPERAND_VSR
},
450 { "f34", 34, PPC_OPERAND_VSR
},
451 { "f35", 35, PPC_OPERAND_VSR
},
452 { "f36", 36, PPC_OPERAND_VSR
},
453 { "f37", 37, PPC_OPERAND_VSR
},
454 { "f38", 38, PPC_OPERAND_VSR
},
455 { "f39", 39, PPC_OPERAND_VSR
},
456 { "f4", 4, PPC_OPERAND_FPR
},
457 { "f40", 40, PPC_OPERAND_VSR
},
458 { "f41", 41, PPC_OPERAND_VSR
},
459 { "f42", 42, PPC_OPERAND_VSR
},
460 { "f43", 43, PPC_OPERAND_VSR
},
461 { "f44", 44, PPC_OPERAND_VSR
},
462 { "f45", 45, PPC_OPERAND_VSR
},
463 { "f46", 46, PPC_OPERAND_VSR
},
464 { "f47", 47, PPC_OPERAND_VSR
},
465 { "f48", 48, PPC_OPERAND_VSR
},
466 { "f49", 49, PPC_OPERAND_VSR
},
467 { "f5", 5, PPC_OPERAND_FPR
},
468 { "f50", 50, PPC_OPERAND_VSR
},
469 { "f51", 51, PPC_OPERAND_VSR
},
470 { "f52", 52, PPC_OPERAND_VSR
},
471 { "f53", 53, PPC_OPERAND_VSR
},
472 { "f54", 54, PPC_OPERAND_VSR
},
473 { "f55", 55, PPC_OPERAND_VSR
},
474 { "f56", 56, PPC_OPERAND_VSR
},
475 { "f57", 57, PPC_OPERAND_VSR
},
476 { "f58", 58, PPC_OPERAND_VSR
},
477 { "f59", 59, PPC_OPERAND_VSR
},
478 { "f6", 6, PPC_OPERAND_FPR
},
479 { "f60", 60, PPC_OPERAND_VSR
},
480 { "f61", 61, PPC_OPERAND_VSR
},
481 { "f62", 62, PPC_OPERAND_VSR
},
482 { "f63", 63, PPC_OPERAND_VSR
},
483 { "f7", 7, PPC_OPERAND_FPR
},
484 { "f8", 8, PPC_OPERAND_FPR
},
485 { "f9", 9, PPC_OPERAND_FPR
},
487 /* Quantization registers used with pair single instructions. */
488 { "gqr.0", 0, PPC_OPERAND_GQR
},
489 { "gqr.1", 1, PPC_OPERAND_GQR
},
490 { "gqr.2", 2, PPC_OPERAND_GQR
},
491 { "gqr.3", 3, PPC_OPERAND_GQR
},
492 { "gqr.4", 4, PPC_OPERAND_GQR
},
493 { "gqr.5", 5, PPC_OPERAND_GQR
},
494 { "gqr.6", 6, PPC_OPERAND_GQR
},
495 { "gqr.7", 7, PPC_OPERAND_GQR
},
496 { "gqr0", 0, PPC_OPERAND_GQR
},
497 { "gqr1", 1, PPC_OPERAND_GQR
},
498 { "gqr2", 2, PPC_OPERAND_GQR
},
499 { "gqr3", 3, PPC_OPERAND_GQR
},
500 { "gqr4", 4, PPC_OPERAND_GQR
},
501 { "gqr5", 5, PPC_OPERAND_GQR
},
502 { "gqr6", 6, PPC_OPERAND_GQR
},
503 { "gqr7", 7, PPC_OPERAND_GQR
},
505 { "lr", 8, PPC_OPERAND_SPR
},
507 /* General Purpose Registers */
508 { "r.0", 0, PPC_OPERAND_GPR
},
509 { "r.1", 1, PPC_OPERAND_GPR
},
510 { "r.10", 10, PPC_OPERAND_GPR
},
511 { "r.11", 11, PPC_OPERAND_GPR
},
512 { "r.12", 12, PPC_OPERAND_GPR
},
513 { "r.13", 13, PPC_OPERAND_GPR
},
514 { "r.14", 14, PPC_OPERAND_GPR
},
515 { "r.15", 15, PPC_OPERAND_GPR
},
516 { "r.16", 16, PPC_OPERAND_GPR
},
517 { "r.17", 17, PPC_OPERAND_GPR
},
518 { "r.18", 18, PPC_OPERAND_GPR
},
519 { "r.19", 19, PPC_OPERAND_GPR
},
520 { "r.2", 2, PPC_OPERAND_GPR
},
521 { "r.20", 20, PPC_OPERAND_GPR
},
522 { "r.21", 21, PPC_OPERAND_GPR
},
523 { "r.22", 22, PPC_OPERAND_GPR
},
524 { "r.23", 23, PPC_OPERAND_GPR
},
525 { "r.24", 24, PPC_OPERAND_GPR
},
526 { "r.25", 25, PPC_OPERAND_GPR
},
527 { "r.26", 26, PPC_OPERAND_GPR
},
528 { "r.27", 27, PPC_OPERAND_GPR
},
529 { "r.28", 28, PPC_OPERAND_GPR
},
530 { "r.29", 29, PPC_OPERAND_GPR
},
531 { "r.3", 3, PPC_OPERAND_GPR
},
532 { "r.30", 30, PPC_OPERAND_GPR
},
533 { "r.31", 31, PPC_OPERAND_GPR
},
534 { "r.4", 4, PPC_OPERAND_GPR
},
535 { "r.5", 5, PPC_OPERAND_GPR
},
536 { "r.6", 6, PPC_OPERAND_GPR
},
537 { "r.7", 7, PPC_OPERAND_GPR
},
538 { "r.8", 8, PPC_OPERAND_GPR
},
539 { "r.9", 9, PPC_OPERAND_GPR
},
541 { "r.sp", 1, PPC_OPERAND_GPR
},
543 { "r.toc", 2, PPC_OPERAND_GPR
},
545 { "r0", 0, PPC_OPERAND_GPR
},
546 { "r1", 1, PPC_OPERAND_GPR
},
547 { "r10", 10, PPC_OPERAND_GPR
},
548 { "r11", 11, PPC_OPERAND_GPR
},
549 { "r12", 12, PPC_OPERAND_GPR
},
550 { "r13", 13, PPC_OPERAND_GPR
},
551 { "r14", 14, PPC_OPERAND_GPR
},
552 { "r15", 15, PPC_OPERAND_GPR
},
553 { "r16", 16, PPC_OPERAND_GPR
},
554 { "r17", 17, PPC_OPERAND_GPR
},
555 { "r18", 18, PPC_OPERAND_GPR
},
556 { "r19", 19, PPC_OPERAND_GPR
},
557 { "r2", 2, PPC_OPERAND_GPR
},
558 { "r20", 20, PPC_OPERAND_GPR
},
559 { "r21", 21, PPC_OPERAND_GPR
},
560 { "r22", 22, PPC_OPERAND_GPR
},
561 { "r23", 23, PPC_OPERAND_GPR
},
562 { "r24", 24, PPC_OPERAND_GPR
},
563 { "r25", 25, PPC_OPERAND_GPR
},
564 { "r26", 26, PPC_OPERAND_GPR
},
565 { "r27", 27, PPC_OPERAND_GPR
},
566 { "r28", 28, PPC_OPERAND_GPR
},
567 { "r29", 29, PPC_OPERAND_GPR
},
568 { "r3", 3, PPC_OPERAND_GPR
},
569 { "r30", 30, PPC_OPERAND_GPR
},
570 { "r31", 31, PPC_OPERAND_GPR
},
571 { "r4", 4, PPC_OPERAND_GPR
},
572 { "r5", 5, PPC_OPERAND_GPR
},
573 { "r6", 6, PPC_OPERAND_GPR
},
574 { "r7", 7, PPC_OPERAND_GPR
},
575 { "r8", 8, PPC_OPERAND_GPR
},
576 { "r9", 9, PPC_OPERAND_GPR
},
578 { "rtoc", 2, PPC_OPERAND_GPR
},
580 { "sdr1", 25, PPC_OPERAND_SPR
},
582 { "sp", 1, PPC_OPERAND_GPR
},
584 { "srr0", 26, PPC_OPERAND_SPR
},
585 { "srr1", 27, PPC_OPERAND_SPR
},
587 /* Vector (Altivec/VMX) registers */
588 { "v.0", 0, PPC_OPERAND_VR
},
589 { "v.1", 1, PPC_OPERAND_VR
},
590 { "v.10", 10, PPC_OPERAND_VR
},
591 { "v.11", 11, PPC_OPERAND_VR
},
592 { "v.12", 12, PPC_OPERAND_VR
},
593 { "v.13", 13, PPC_OPERAND_VR
},
594 { "v.14", 14, PPC_OPERAND_VR
},
595 { "v.15", 15, PPC_OPERAND_VR
},
596 { "v.16", 16, PPC_OPERAND_VR
},
597 { "v.17", 17, PPC_OPERAND_VR
},
598 { "v.18", 18, PPC_OPERAND_VR
},
599 { "v.19", 19, PPC_OPERAND_VR
},
600 { "v.2", 2, PPC_OPERAND_VR
},
601 { "v.20", 20, PPC_OPERAND_VR
},
602 { "v.21", 21, PPC_OPERAND_VR
},
603 { "v.22", 22, PPC_OPERAND_VR
},
604 { "v.23", 23, PPC_OPERAND_VR
},
605 { "v.24", 24, PPC_OPERAND_VR
},
606 { "v.25", 25, PPC_OPERAND_VR
},
607 { "v.26", 26, PPC_OPERAND_VR
},
608 { "v.27", 27, PPC_OPERAND_VR
},
609 { "v.28", 28, PPC_OPERAND_VR
},
610 { "v.29", 29, PPC_OPERAND_VR
},
611 { "v.3", 3, PPC_OPERAND_VR
},
612 { "v.30", 30, PPC_OPERAND_VR
},
613 { "v.31", 31, PPC_OPERAND_VR
},
614 { "v.4", 4, PPC_OPERAND_VR
},
615 { "v.5", 5, PPC_OPERAND_VR
},
616 { "v.6", 6, PPC_OPERAND_VR
},
617 { "v.7", 7, PPC_OPERAND_VR
},
618 { "v.8", 8, PPC_OPERAND_VR
},
619 { "v.9", 9, PPC_OPERAND_VR
},
621 { "v0", 0, PPC_OPERAND_VR
},
622 { "v1", 1, PPC_OPERAND_VR
},
623 { "v10", 10, PPC_OPERAND_VR
},
624 { "v11", 11, PPC_OPERAND_VR
},
625 { "v12", 12, PPC_OPERAND_VR
},
626 { "v13", 13, PPC_OPERAND_VR
},
627 { "v14", 14, PPC_OPERAND_VR
},
628 { "v15", 15, PPC_OPERAND_VR
},
629 { "v16", 16, PPC_OPERAND_VR
},
630 { "v17", 17, PPC_OPERAND_VR
},
631 { "v18", 18, PPC_OPERAND_VR
},
632 { "v19", 19, PPC_OPERAND_VR
},
633 { "v2", 2, PPC_OPERAND_VR
},
634 { "v20", 20, PPC_OPERAND_VR
},
635 { "v21", 21, PPC_OPERAND_VR
},
636 { "v22", 22, PPC_OPERAND_VR
},
637 { "v23", 23, PPC_OPERAND_VR
},
638 { "v24", 24, PPC_OPERAND_VR
},
639 { "v25", 25, PPC_OPERAND_VR
},
640 { "v26", 26, PPC_OPERAND_VR
},
641 { "v27", 27, PPC_OPERAND_VR
},
642 { "v28", 28, PPC_OPERAND_VR
},
643 { "v29", 29, PPC_OPERAND_VR
},
644 { "v3", 3, PPC_OPERAND_VR
},
645 { "v30", 30, PPC_OPERAND_VR
},
646 { "v31", 31, PPC_OPERAND_VR
},
647 { "v4", 4, PPC_OPERAND_VR
},
648 { "v5", 5, PPC_OPERAND_VR
},
649 { "v6", 6, PPC_OPERAND_VR
},
650 { "v7", 7, PPC_OPERAND_VR
},
651 { "v8", 8, PPC_OPERAND_VR
},
652 { "v9", 9, PPC_OPERAND_VR
},
654 /* Vector Scalar (VSX) registers (ISA 2.06). */
655 { "vs.0", 0, PPC_OPERAND_VSR
},
656 { "vs.1", 1, PPC_OPERAND_VSR
},
657 { "vs.10", 10, PPC_OPERAND_VSR
},
658 { "vs.11", 11, PPC_OPERAND_VSR
},
659 { "vs.12", 12, PPC_OPERAND_VSR
},
660 { "vs.13", 13, PPC_OPERAND_VSR
},
661 { "vs.14", 14, PPC_OPERAND_VSR
},
662 { "vs.15", 15, PPC_OPERAND_VSR
},
663 { "vs.16", 16, PPC_OPERAND_VSR
},
664 { "vs.17", 17, PPC_OPERAND_VSR
},
665 { "vs.18", 18, PPC_OPERAND_VSR
},
666 { "vs.19", 19, PPC_OPERAND_VSR
},
667 { "vs.2", 2, PPC_OPERAND_VSR
},
668 { "vs.20", 20, PPC_OPERAND_VSR
},
669 { "vs.21", 21, PPC_OPERAND_VSR
},
670 { "vs.22", 22, PPC_OPERAND_VSR
},
671 { "vs.23", 23, PPC_OPERAND_VSR
},
672 { "vs.24", 24, PPC_OPERAND_VSR
},
673 { "vs.25", 25, PPC_OPERAND_VSR
},
674 { "vs.26", 26, PPC_OPERAND_VSR
},
675 { "vs.27", 27, PPC_OPERAND_VSR
},
676 { "vs.28", 28, PPC_OPERAND_VSR
},
677 { "vs.29", 29, PPC_OPERAND_VSR
},
678 { "vs.3", 3, PPC_OPERAND_VSR
},
679 { "vs.30", 30, PPC_OPERAND_VSR
},
680 { "vs.31", 31, PPC_OPERAND_VSR
},
681 { "vs.32", 32, PPC_OPERAND_VSR
},
682 { "vs.33", 33, PPC_OPERAND_VSR
},
683 { "vs.34", 34, PPC_OPERAND_VSR
},
684 { "vs.35", 35, PPC_OPERAND_VSR
},
685 { "vs.36", 36, PPC_OPERAND_VSR
},
686 { "vs.37", 37, PPC_OPERAND_VSR
},
687 { "vs.38", 38, PPC_OPERAND_VSR
},
688 { "vs.39", 39, PPC_OPERAND_VSR
},
689 { "vs.4", 4, PPC_OPERAND_VSR
},
690 { "vs.40", 40, PPC_OPERAND_VSR
},
691 { "vs.41", 41, PPC_OPERAND_VSR
},
692 { "vs.42", 42, PPC_OPERAND_VSR
},
693 { "vs.43", 43, PPC_OPERAND_VSR
},
694 { "vs.44", 44, PPC_OPERAND_VSR
},
695 { "vs.45", 45, PPC_OPERAND_VSR
},
696 { "vs.46", 46, PPC_OPERAND_VSR
},
697 { "vs.47", 47, PPC_OPERAND_VSR
},
698 { "vs.48", 48, PPC_OPERAND_VSR
},
699 { "vs.49", 49, PPC_OPERAND_VSR
},
700 { "vs.5", 5, PPC_OPERAND_VSR
},
701 { "vs.50", 50, PPC_OPERAND_VSR
},
702 { "vs.51", 51, PPC_OPERAND_VSR
},
703 { "vs.52", 52, PPC_OPERAND_VSR
},
704 { "vs.53", 53, PPC_OPERAND_VSR
},
705 { "vs.54", 54, PPC_OPERAND_VSR
},
706 { "vs.55", 55, PPC_OPERAND_VSR
},
707 { "vs.56", 56, PPC_OPERAND_VSR
},
708 { "vs.57", 57, PPC_OPERAND_VSR
},
709 { "vs.58", 58, PPC_OPERAND_VSR
},
710 { "vs.59", 59, PPC_OPERAND_VSR
},
711 { "vs.6", 6, PPC_OPERAND_VSR
},
712 { "vs.60", 60, PPC_OPERAND_VSR
},
713 { "vs.61", 61, PPC_OPERAND_VSR
},
714 { "vs.62", 62, PPC_OPERAND_VSR
},
715 { "vs.63", 63, PPC_OPERAND_VSR
},
716 { "vs.7", 7, PPC_OPERAND_VSR
},
717 { "vs.8", 8, PPC_OPERAND_VSR
},
718 { "vs.9", 9, PPC_OPERAND_VSR
},
720 { "vs0", 0, PPC_OPERAND_VSR
},
721 { "vs1", 1, PPC_OPERAND_VSR
},
722 { "vs10", 10, PPC_OPERAND_VSR
},
723 { "vs11", 11, PPC_OPERAND_VSR
},
724 { "vs12", 12, PPC_OPERAND_VSR
},
725 { "vs13", 13, PPC_OPERAND_VSR
},
726 { "vs14", 14, PPC_OPERAND_VSR
},
727 { "vs15", 15, PPC_OPERAND_VSR
},
728 { "vs16", 16, PPC_OPERAND_VSR
},
729 { "vs17", 17, PPC_OPERAND_VSR
},
730 { "vs18", 18, PPC_OPERAND_VSR
},
731 { "vs19", 19, PPC_OPERAND_VSR
},
732 { "vs2", 2, PPC_OPERAND_VSR
},
733 { "vs20", 20, PPC_OPERAND_VSR
},
734 { "vs21", 21, PPC_OPERAND_VSR
},
735 { "vs22", 22, PPC_OPERAND_VSR
},
736 { "vs23", 23, PPC_OPERAND_VSR
},
737 { "vs24", 24, PPC_OPERAND_VSR
},
738 { "vs25", 25, PPC_OPERAND_VSR
},
739 { "vs26", 26, PPC_OPERAND_VSR
},
740 { "vs27", 27, PPC_OPERAND_VSR
},
741 { "vs28", 28, PPC_OPERAND_VSR
},
742 { "vs29", 29, PPC_OPERAND_VSR
},
743 { "vs3", 3, PPC_OPERAND_VSR
},
744 { "vs30", 30, PPC_OPERAND_VSR
},
745 { "vs31", 31, PPC_OPERAND_VSR
},
746 { "vs32", 32, PPC_OPERAND_VSR
},
747 { "vs33", 33, PPC_OPERAND_VSR
},
748 { "vs34", 34, PPC_OPERAND_VSR
},
749 { "vs35", 35, PPC_OPERAND_VSR
},
750 { "vs36", 36, PPC_OPERAND_VSR
},
751 { "vs37", 37, PPC_OPERAND_VSR
},
752 { "vs38", 38, PPC_OPERAND_VSR
},
753 { "vs39", 39, PPC_OPERAND_VSR
},
754 { "vs4", 4, PPC_OPERAND_VSR
},
755 { "vs40", 40, PPC_OPERAND_VSR
},
756 { "vs41", 41, PPC_OPERAND_VSR
},
757 { "vs42", 42, PPC_OPERAND_VSR
},
758 { "vs43", 43, PPC_OPERAND_VSR
},
759 { "vs44", 44, PPC_OPERAND_VSR
},
760 { "vs45", 45, PPC_OPERAND_VSR
},
761 { "vs46", 46, PPC_OPERAND_VSR
},
762 { "vs47", 47, PPC_OPERAND_VSR
},
763 { "vs48", 48, PPC_OPERAND_VSR
},
764 { "vs49", 49, PPC_OPERAND_VSR
},
765 { "vs5", 5, PPC_OPERAND_VSR
},
766 { "vs50", 50, PPC_OPERAND_VSR
},
767 { "vs51", 51, PPC_OPERAND_VSR
},
768 { "vs52", 52, PPC_OPERAND_VSR
},
769 { "vs53", 53, PPC_OPERAND_VSR
},
770 { "vs54", 54, PPC_OPERAND_VSR
},
771 { "vs55", 55, PPC_OPERAND_VSR
},
772 { "vs56", 56, PPC_OPERAND_VSR
},
773 { "vs57", 57, PPC_OPERAND_VSR
},
774 { "vs58", 58, PPC_OPERAND_VSR
},
775 { "vs59", 59, PPC_OPERAND_VSR
},
776 { "vs6", 6, PPC_OPERAND_VSR
},
777 { "vs60", 60, PPC_OPERAND_VSR
},
778 { "vs61", 61, PPC_OPERAND_VSR
},
779 { "vs62", 62, PPC_OPERAND_VSR
},
780 { "vs63", 63, PPC_OPERAND_VSR
},
781 { "vs7", 7, PPC_OPERAND_VSR
},
782 { "vs8", 8, PPC_OPERAND_VSR
},
783 { "vs9", 9, PPC_OPERAND_VSR
},
785 { "xer", 1, PPC_OPERAND_SPR
}
788 /* Given NAME, find the register number associated with that name, return
789 the integer value associated with the given name or -1 on failure. */
791 static const struct pd_reg
*
792 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
794 int middle
, low
, high
;
802 middle
= (low
+ high
) / 2;
803 cmp
= strcasecmp (name
, regs
[middle
].name
);
809 return ®s
[middle
];
816 /* Called for a non-symbol, non-number operand. Handles %reg. */
819 md_operand (expressionS
*expressionP
)
821 const struct pd_reg
*reg
;
826 if (input_line_pointer
[0] != '%' || !ISALPHA (input_line_pointer
[1]))
829 start
= input_line_pointer
;
830 ++input_line_pointer
;
832 c
= get_symbol_name (&name
);
833 reg
= reg_name_search (pre_defined_registers
,
834 ARRAY_SIZE (pre_defined_registers
), name
);
835 *input_line_pointer
= c
;
839 expressionP
->X_op
= O_register
;
840 expressionP
->X_add_number
= reg
->value
;
841 expressionP
->X_md
= reg
->flags
;
844 input_line_pointer
= start
;
847 /* Whether to do the special parsing. */
848 static bool cr_operand
;
850 /* Extra names to recognise in a condition code. This table is sorted. */
851 static const struct pd_reg cr_cond
[] =
853 { "eq", 2, PPC_OPERAND_CR_BIT
},
854 { "gt", 1, PPC_OPERAND_CR_BIT
},
855 { "lt", 0, PPC_OPERAND_CR_BIT
},
856 { "so", 3, PPC_OPERAND_CR_BIT
},
857 { "un", 3, PPC_OPERAND_CR_BIT
}
860 /* This function is called for each symbol seen in an expression. It
861 handles the special parsing which PowerPC assemblers are supposed
862 to use for condition codes, and recognises other registers when
866 ppc_parse_name (const char *name
, expressionS
*exp
, enum expr_mode mode
)
868 const struct pd_reg
*reg
= NULL
;
871 reg
= reg_name_search (cr_cond
, ARRAY_SIZE (cr_cond
), name
);
872 if (reg
== NULL
&& (cr_operand
|| reg_names_p
))
873 reg
= reg_name_search (pre_defined_registers
,
874 ARRAY_SIZE (pre_defined_registers
), name
);
877 exp
->X_op
= O_register
;
878 exp
->X_add_number
= reg
->value
;
879 exp
->X_md
= reg
->flags
;
883 /* The following replaces code in expr.c operand() after the
884 md_parse_name call. There is too much difference between targets
885 in the way X_md is used to move this code into expr.c. If you
886 do, you'll get failures on x86 due to uninitialised X_md fields,
887 failures on alpha and other targets due to creating register
888 symbols as O_constant rather than O_register, and failures on arc
889 and others due to expecting expr() to leave X_md alone. */
890 symbolS
*sym
= symbol_find_or_make (name
);
892 /* If we have an absolute symbol or a reg, then we know its value
893 now. Copy the symbol value expression to propagate X_md. */
895 if (mode
!= expr_defer
896 && !S_FORCE_RELOC (sym
, 0))
898 segT segment
= S_GET_SEGMENT (sym
);
899 if (segment
== absolute_section
|| segment
== reg_section
)
901 resolve_symbol_value (sym
);
902 *exp
= *symbol_get_value_expression (sym
);
908 exp
->X_op
= O_symbol
;
909 exp
->X_add_symbol
= sym
;
910 exp
->X_add_number
= 0;
914 /* Propagate X_md and check register expressions. This is to support
915 condition codes like 4*cr5+eq. */
918 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
920 /* Accept 4*cr<n> and cr<n>*4. */
922 && ((right
->X_op
== O_register
923 && right
->X_md
== PPC_OPERAND_CR_REG
924 && left
->X_op
== O_constant
925 && left
->X_add_number
== 4)
926 || (left
->X_op
== O_register
927 && left
->X_md
== PPC_OPERAND_CR_REG
928 && right
->X_op
== O_constant
929 && right
->X_add_number
== 4)))
931 left
->X_op
= O_register
;
932 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
933 left
->X_add_number
*= right
->X_add_number
;
937 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
938 if (right
->X_op
== O_register
939 && left
->X_op
== O_register
941 && ((right
->X_md
== PPC_OPERAND_CR_BIT
942 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
943 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
944 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
946 left
->X_md
= PPC_OPERAND_CR_BIT
;
947 right
->X_op
= O_constant
;
951 /* Accept reg +/- constant. */
952 if (left
->X_op
== O_register
953 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
954 as_warn (_("invalid register expression"));
956 /* Accept constant + reg. */
957 if (right
->X_op
== O_register
)
959 if (op
== O_add
&& left
->X_op
== O_constant
)
960 left
->X_md
= right
->X_md
;
962 as_warn (_("invalid register expression"));
968 /* Local variables. */
970 /* Whether to target xcoff64/elf64. */
971 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
973 /* A separate obstack for use by ppc_hash, so that we can quickly
974 throw away hash table memory . */
975 struct obstack insn_obstack
;
977 /* Opcode hash table. */
978 static htab_t ppc_hash
;
981 /* What type of shared library support to use. */
982 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
984 /* Flags to set in the elf header. */
985 static flagword ppc_flags
= 0;
987 /* Whether this is Solaris or not. */
988 #ifdef TARGET_SOLARIS_COMMENT
989 #define SOLARIS_P true
991 #define SOLARIS_P false
994 static bool msolaris
= SOLARIS_P
;
999 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1000 using a bunch of different sections. These assembler sections,
1001 however, are all encompassed within the .text, .data or .bss sections
1002 of the final output file. We handle this by using different
1003 subsegments within these main segments.
1004 .tdata and .tbss sections only have one type of csects for now,
1005 but it's better to follow the same construction like the others. */
1007 struct ppc_xcoff_section ppc_xcoff_text_section
;
1008 struct ppc_xcoff_section ppc_xcoff_data_section
;
1009 struct ppc_xcoff_section ppc_xcoff_bss_section
;
1010 struct ppc_xcoff_section ppc_xcoff_tdata_section
;
1011 struct ppc_xcoff_section ppc_xcoff_tbss_section
;
1013 /* Return true if the ppc_xcoff_section structure is already
1016 ppc_xcoff_section_is_initialized (struct ppc_xcoff_section
*section
)
1018 return section
->segment
!= NULL
;
1021 /* Initialize a ppc_xcoff_section.
1022 Dummy symbols are used to ensure the position of .text over .data
1023 and .tdata. Moreover, they allow all algorithms here to be sure that
1024 csects isn't NULL. These symbols won't be output. */
1026 ppc_init_xcoff_section (struct ppc_xcoff_section
*s
, segT seg
)
1029 s
->next_subsegment
= 2;
1030 s
->csects
= symbol_make ("dummy\001");
1031 symbol_get_tc (s
->csects
)->within
= s
->csects
;
1034 /* The current csect. */
1035 static symbolS
*ppc_current_csect
;
1037 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1038 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1039 A special relocation is used when accessing TOC entries. We handle
1040 the TOC as a subsegment within the .data segment. We set it up if
1041 we see a .toc pseudo-op, and save the csect symbol here. */
1042 static symbolS
*ppc_toc_csect
;
1044 /* The first frag in the TOC subsegment. */
1045 static fragS
*ppc_toc_frag
;
1047 /* The first frag in the first subsegment after the TOC in the .data
1048 segment. NULL if there are no subsegments after the TOC. */
1049 static fragS
*ppc_after_toc_frag
;
1051 /* The current static block. */
1052 static symbolS
*ppc_current_block
;
1054 /* The COFF debugging section; set by md_begin. This is not the
1055 .debug section, but is instead the secret BFD section which will
1056 cause BFD to set the section number of a symbol to N_DEBUG. */
1057 static asection
*ppc_coff_debug_section
;
1059 /* Structure to set the length field of the dwarf sections. */
1060 struct dw_subsection
{
1061 /* Subsections are simply linked. */
1062 struct dw_subsection
*link
;
1064 /* The subsection number. */
1067 /* Expression to compute the length of the section. */
1068 expressionS end_exp
;
1071 static struct dw_section
{
1072 /* Corresponding section. */
1075 /* Simply linked list of subsections with a label. */
1076 struct dw_subsection
*list_subseg
;
1078 /* The anonymous subsection. */
1079 struct dw_subsection
*anon_subseg
;
1080 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1081 #endif /* OBJ_XCOFF */
1084 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1085 unsigned long *ppc_apuinfo_list
;
1086 unsigned int ppc_apuinfo_num
;
1087 unsigned int ppc_apuinfo_num_alloc
;
1088 #endif /* OBJ_ELF */
1091 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1093 const char *const md_shortopts
= "um:";
1095 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1096 const struct option md_longopts
[] = {
1097 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1098 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1099 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1100 {NULL
, no_argument
, NULL
, 0}
1102 const size_t md_longopts_size
= sizeof (md_longopts
);
1105 md_parse_option (int c
, const char *arg
)
1112 /* -u means that any undefined symbols should be treated as
1113 external, which is the default for gas anyhow. */
1118 /* Solaris as takes -le (presumably for little endian). For completeness
1119 sake, recognize -be also. */
1120 if (strcmp (arg
, "e") == 0)
1122 target_big_endian
= 0;
1123 set_target_endian
= 1;
1124 if (ppc_cpu
& PPC_OPCODE_VLE
)
1125 as_bad (_("the use of -mvle requires big endian."));
1133 if (strcmp (arg
, "e") == 0)
1135 target_big_endian
= 1;
1136 set_target_endian
= 1;
1144 /* Recognize -K PIC. */
1145 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1148 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1156 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1158 if (strcmp (arg
, "64") == 0)
1162 if (ppc_cpu
& PPC_OPCODE_VLE
)
1163 as_bad (_("the use of -mvle requires -a32."));
1165 as_fatal (_("%s unsupported"), "-a64");
1168 else if (strcmp (arg
, "32") == 0)
1175 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1176 /* "raw" is only valid for the disassembler. */
1177 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1180 if (strcmp (arg
, "vle") == 0)
1182 if (set_target_endian
&& target_big_endian
== 0)
1183 as_bad (_("the use of -mvle requires big endian."));
1185 as_bad (_("the use of -mvle requires -a32."));
1189 else if (strcmp (arg
, "no-vle") == 0)
1191 sticky
&= ~PPC_OPCODE_VLE
;
1193 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1194 new_cpu
&= ~PPC_OPCODE_VLE
;
1199 else if (strcmp (arg
, "regnames") == 0)
1202 else if (strcmp (arg
, "no-regnames") == 0)
1203 reg_names_p
= false;
1206 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1207 that require relocation. */
1208 else if (strcmp (arg
, "relocatable") == 0)
1210 shlib
= SHLIB_MRELOCATABLE
;
1211 ppc_flags
|= EF_PPC_RELOCATABLE
;
1214 else if (strcmp (arg
, "relocatable-lib") == 0)
1216 shlib
= SHLIB_MRELOCATABLE
;
1217 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1220 /* -memb, set embedded bit. */
1221 else if (strcmp (arg
, "emb") == 0)
1222 ppc_flags
|= EF_PPC_EMB
;
1224 /* -mlittle/-mbig set the endianness. */
1225 else if (strcmp (arg
, "little") == 0
1226 || strcmp (arg
, "little-endian") == 0)
1228 target_big_endian
= 0;
1229 set_target_endian
= 1;
1230 if (ppc_cpu
& PPC_OPCODE_VLE
)
1231 as_bad (_("the use of -mvle requires big endian."));
1234 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1236 target_big_endian
= 1;
1237 set_target_endian
= 1;
1240 else if (strcmp (arg
, "solaris") == 0)
1243 ppc_comment_chars
= ppc_solaris_comment_chars
;
1246 else if (strcmp (arg
, "no-solaris") == 0)
1249 ppc_comment_chars
= ppc_eabi_comment_chars
;
1251 else if (strcmp (arg
, "spe2") == 0)
1253 ppc_cpu
|= PPC_OPCODE_SPE2
;
1258 as_bad (_("invalid switch -m%s"), arg
);
1264 /* -V: SVR4 argument to print version ID. */
1266 print_version_id ();
1269 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1270 should be emitted or not. FIXME: Not implemented. */
1274 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1275 rather than .stabs.excl, which is ignored by the linker.
1276 FIXME: Not implemented. */
1287 nop_limit
= strtoul (optarg
, &end
, 0);
1289 as_bad (_("--nops needs a numeric argument"));
1304 is_ppc64_target (const bfd_target
*targ
, void *data ATTRIBUTE_UNUSED
)
1306 switch (targ
->flavour
)
1309 case bfd_target_elf_flavour
:
1310 return startswith (targ
->name
, "elf64-powerpc");
1313 case bfd_target_xcoff_flavour
:
1314 return (strcmp (targ
->name
, "aixcoff64-rs6000") == 0
1315 || strcmp (targ
->name
, "aix5coff64-rs6000") == 0);
1323 md_show_usage (FILE *stream
)
1325 fprintf (stream
, _("\
1326 PowerPC options:\n"));
1327 fprintf (stream
, _("\
1328 -a32 generate ELF32/XCOFF32\n"));
1329 if (bfd_iterate_over_targets (is_ppc64_target
, NULL
))
1330 fprintf (stream
, _("\
1331 -a64 generate ELF64/XCOFF64\n"));
1332 fprintf (stream
, _("\
1334 fprintf (stream
, _("\
1335 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n"));
1336 fprintf (stream
, _("\
1337 -mpwr generate code for POWER (RIOS1)\n"));
1338 fprintf (stream
, _("\
1339 -m601 generate code for PowerPC 601\n"));
1340 fprintf (stream
, _("\
1341 -mppc, -mppc32, -m603, -m604\n\
1342 generate code for PowerPC 603/604\n"));
1343 fprintf (stream
, _("\
1344 -m403 generate code for PowerPC 403\n"));
1345 fprintf (stream
, _("\
1346 -m405 generate code for PowerPC 405\n"));
1347 fprintf (stream
, _("\
1348 -m440 generate code for PowerPC 440\n"));
1349 fprintf (stream
, _("\
1350 -m464 generate code for PowerPC 464\n"));
1351 fprintf (stream
, _("\
1352 -m476 generate code for PowerPC 476\n"));
1353 fprintf (stream
, _("\
1354 -m7400, -m7410, -m7450, -m7455\n\
1355 generate code for PowerPC 7400/7410/7450/7455\n"));
1356 fprintf (stream
, _("\
1357 -m750cl, -mgekko, -mbroadway\n\
1358 generate code for PowerPC 750cl/Gekko/Broadway\n"));
1359 fprintf (stream
, _("\
1360 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1361 fprintf (stream
, _("\
1362 -mppc64, -m620 generate code for PowerPC 620/625/630\n"));
1363 fprintf (stream
, _("\
1364 -mppc64bridge generate code for PowerPC 64, including bridge insns\n"));
1365 fprintf (stream
, _("\
1366 -mbooke generate code for 32-bit PowerPC BookE\n"));
1367 fprintf (stream
, _("\
1368 -ma2 generate code for A2 architecture\n"));
1369 fprintf (stream
, _("\
1370 -mpower4, -mpwr4 generate code for Power4 architecture\n"));
1371 fprintf (stream
, _("\
1372 -mpower5, -mpwr5, -mpwr5x\n\
1373 generate code for Power5 architecture\n"));
1374 fprintf (stream
, _("\
1375 -mpower6, -mpwr6 generate code for Power6 architecture\n"));
1376 fprintf (stream
, _("\
1377 -mpower7, -mpwr7 generate code for Power7 architecture\n"));
1378 fprintf (stream
, _("\
1379 -mpower8, -mpwr8 generate code for Power8 architecture\n"));
1380 fprintf (stream
, _("\
1381 -mpower9, -mpwr9 generate code for Power9 architecture\n"));
1382 fprintf (stream
, _("\
1383 -mpower10, -mpwr10 generate code for Power10 architecture\n"));
1384 fprintf (stream
, _("\
1385 -mlibresoc generate code for Libre-SOC architecture\n"));
1386 fprintf (stream
, _("\
1387 -mfuture generate code for 'future' architecture\n"));
1388 fprintf (stream
, _("\
1389 -mcell generate code for Cell Broadband Engine architecture\n"));
1390 fprintf (stream
, _("\
1391 -mcom generate code for Power/PowerPC common instructions\n"));
1392 fprintf (stream
, _("\
1393 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1394 fprintf (stream
, _("\
1395 -maltivec generate code for AltiVec\n"));
1396 fprintf (stream
, _("\
1397 -mvsx generate code for Vector-Scalar (VSX) instructions\n"));
1398 fprintf (stream
, _("\
1399 -me300 generate code for PowerPC e300 family\n"));
1400 fprintf (stream
, _("\
1401 -me500, -me500x2 generate code for Motorola e500 core complex\n"));
1402 fprintf (stream
, _("\
1403 -me500mc, generate code for Freescale e500mc core complex\n"));
1404 fprintf (stream
, _("\
1405 -me500mc64, generate code for Freescale e500mc64 core complex\n"));
1406 fprintf (stream
, _("\
1407 -me5500, generate code for Freescale e5500 core complex\n"));
1408 fprintf (stream
, _("\
1409 -me6500, generate code for Freescale e6500 core complex\n"));
1410 fprintf (stream
, _("\
1411 -mspe generate code for Motorola SPE instructions\n"));
1412 fprintf (stream
, _("\
1413 -mspe2 generate code for Freescale SPE2 instructions\n"));
1414 fprintf (stream
, _("\
1415 -mvle generate code for Freescale VLE instructions\n"));
1416 fprintf (stream
, _("\
1417 -mtitan generate code for AppliedMicro Titan core complex\n"));
1418 fprintf (stream
, _("\
1419 -mregnames Allow symbolic names for registers\n"));
1420 fprintf (stream
, _("\
1421 -mno-regnames Do not allow symbolic names for registers\n"));
1423 fprintf (stream
, _("\
1424 -mrelocatable support for GCC's -mrelocatble option\n"));
1425 fprintf (stream
, _("\
1426 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n"));
1427 fprintf (stream
, _("\
1428 -memb set PPC_EMB bit in ELF flags\n"));
1429 fprintf (stream
, _("\
1430 -mlittle, -mlittle-endian, -le\n\
1431 generate code for a little endian machine\n"));
1432 fprintf (stream
, _("\
1433 -mbig, -mbig-endian, -be\n\
1434 generate code for a big endian machine\n"));
1435 fprintf (stream
, _("\
1436 -msolaris generate code for Solaris\n"));
1437 fprintf (stream
, _("\
1438 -mno-solaris do not generate code for Solaris\n"));
1439 fprintf (stream
, _("\
1440 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n"));
1441 fprintf (stream
, _("\
1442 -V print assembler version number\n"));
1443 fprintf (stream
, _("\
1444 -Qy, -Qn ignored\n"));
1446 fprintf (stream
, _("\
1447 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1448 fprintf (stream
, _("\
1449 -ppc476-workaround warn if emitting data to code sections\n"));
1452 /* Set ppc_cpu if it is not already set. */
1457 const char *default_os
= TARGET_OS
;
1458 const char *default_cpu
= TARGET_CPU
;
1460 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1463 if (target_big_endian
)
1464 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1466 /* The minimum supported cpu for 64-bit little-endian is power8. */
1467 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1468 else if (startswith (default_os
, "aix")
1469 && default_os
[3] >= '4' && default_os
[3] <= '9')
1470 ppc_cpu
|= PPC_OPCODE_COMMON
;
1471 else if (startswith (default_os
, "aix3"))
1472 ppc_cpu
|= PPC_OPCODE_POWER
;
1473 else if (strcmp (default_cpu
, "rs6000") == 0)
1474 ppc_cpu
|= PPC_OPCODE_POWER
;
1475 else if (startswith (default_cpu
, "powerpc"))
1476 ppc_cpu
|= PPC_OPCODE_PPC
;
1478 as_fatal (_("unknown default cpu = %s, os = %s"),
1479 default_cpu
, default_os
);
1483 /* Figure out the BFD architecture to use. This function and ppc_mach
1484 are called well before md_begin, when the output file is opened. */
1486 enum bfd_architecture
1489 const char *default_cpu
= TARGET_CPU
;
1492 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1493 return bfd_arch_powerpc
;
1494 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1495 return bfd_arch_powerpc
;
1496 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1497 return bfd_arch_rs6000
;
1498 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1500 if (strcmp (default_cpu
, "rs6000") == 0)
1501 return bfd_arch_rs6000
;
1502 else if (startswith (default_cpu
, "powerpc"))
1503 return bfd_arch_powerpc
;
1506 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1507 return bfd_arch_unknown
;
1514 return bfd_mach_ppc64
;
1515 else if (ppc_arch () == bfd_arch_rs6000
)
1516 return bfd_mach_rs6k
;
1517 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1518 return bfd_mach_ppc_titan
;
1519 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1520 return bfd_mach_ppc_vle
;
1522 return bfd_mach_ppc
;
1526 ppc_target_format (void)
1530 return "xcoff-powermac";
1533 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1535 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1541 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1542 # elif defined (TE_VXWORKS)
1543 return "elf32-powerpc-vxworks";
1545 return (target_big_endian
1546 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1547 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1552 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1553 Return TRUE if there's a problem, otherwise FALSE. */
1556 insn_validate (const struct powerpc_opcode
*op
)
1558 const ppc_opindex_t
*o
;
1559 uint64_t omask
= op
->mask
;
1561 /* The mask had better not trim off opcode bits. */
1562 if ((op
->opcode
& omask
) != op
->opcode
)
1564 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1568 /* The operands must not overlap the opcode or each other. */
1569 for (o
= op
->operands
; *o
; ++o
)
1571 bool optional
= false;
1572 if (*o
>= num_powerpc_operands
)
1574 as_bad (_("operand index error for %s"), op
->name
);
1580 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1581 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1588 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1590 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1592 else if (operand
->shift
== (int) PPC_OPSHIFT_SH6
)
1593 mask
= (0x1f << 11) | 0x2;
1594 else if (operand
->shift
>= 0)
1595 mask
= operand
->bitm
<< operand
->shift
;
1597 mask
= operand
->bitm
>> -operand
->shift
;
1600 as_bad (_("operand %d overlap in %s"),
1601 (int) (o
- op
->operands
), op
->name
);
1605 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1609 as_bad (_("non-optional operand %d follows optional operand in %s"),
1610 (int) (o
- op
->operands
), op
->name
);
1619 insn_calloc (size_t n
, size_t size
)
1621 size_t amt
= n
* size
;
1622 void *ret
= obstack_alloc (&insn_obstack
, amt
);
1623 memset (ret
, 0, amt
);
1627 /* Insert opcodes into hash tables. Called at startup and for
1631 ppc_setup_opcodes (void)
1633 const struct powerpc_opcode
*op
;
1634 const struct powerpc_opcode
*op_end
;
1635 bool bad_insn
= false;
1637 if (ppc_hash
!= NULL
)
1639 htab_delete (ppc_hash
);
1640 _obstack_free (&insn_obstack
, NULL
);
1643 obstack_begin (&insn_obstack
, chunksize
);
1645 /* Insert the opcodes into a hash table. */
1646 ppc_hash
= htab_create_alloc (5000, hash_string_tuple
, eq_string_tuple
,
1647 NULL
, insn_calloc
, NULL
);
1649 if (ENABLE_CHECKING
)
1653 /* An index into powerpc_operands is stored in struct fix
1654 fx_pcrel_adjust which is a 16 bit field. */
1655 gas_assert (num_powerpc_operands
<= PPC_OPINDEX_MAX
+ 1);
1657 /* Check operand masks. Code here and in the disassembler assumes
1658 all the 1's in the mask are contiguous. */
1659 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1661 uint64_t mask
= powerpc_operands
[i
].bitm
;
1662 unsigned long flags
= powerpc_operands
[i
].flags
;
1666 if ((flags
& PPC_OPERAND_PLUS1
) != 0
1667 && (flags
& PPC_OPERAND_NONZERO
) != 0)
1668 as_bad ("mutually exclusive operand flags");
1670 right_bit
= mask
& -mask
;
1672 right_bit
= mask
& -mask
;
1673 if (mask
!= right_bit
)
1675 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1678 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1679 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1680 sizeof (powerpc_operands
[0])) == 0)
1682 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1689 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1690 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1692 if (ENABLE_CHECKING
)
1694 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1696 #ifdef PRINT_OPCODE_TABLE
1697 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1698 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1699 new_opcode
, (unsigned long long) op
->opcode
,
1700 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1703 /* The major opcodes had better be sorted. Code in the disassembler
1704 assumes the insns are sorted according to major opcode. */
1705 if (op
!= powerpc_opcodes
1706 && new_opcode
< PPC_OP (op
[-1].opcode
))
1708 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1712 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1714 as_bad (_("%s is enabled by vle flag"), op
->name
);
1717 if (PPC_OP (op
->opcode
) != 4
1718 && PPC_OP (op
->opcode
) != 31
1719 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1721 as_bad (_("%s not disabled by vle flag"), op
->name
);
1724 bad_insn
|= insn_validate (op
);
1727 if ((ppc_cpu
& op
->flags
) != 0
1728 && !(ppc_cpu
& op
->deprecated
)
1729 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1731 as_bad (_("duplicate %s"), op
->name
);
1736 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1737 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1738 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1740 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1741 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1743 if (ENABLE_CHECKING
)
1745 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1747 #ifdef PRINT_OPCODE_TABLE
1748 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1749 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1750 new_opcode
, (unsigned long long) op
->opcode
,
1751 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1754 /* The major opcodes had better be sorted. Code in the disassembler
1755 assumes the insns are sorted according to major opcode. */
1756 if (op
!= prefix_opcodes
1757 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1759 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1762 bad_insn
|= insn_validate (op
);
1765 if ((ppc_cpu
& op
->flags
) != 0
1766 && !(ppc_cpu
& op
->deprecated
)
1767 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1769 as_bad (_("duplicate %s"), op
->name
);
1774 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1775 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1776 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1778 op_end
= vle_opcodes
+ vle_num_opcodes
;
1779 for (op
= vle_opcodes
; op
< op_end
; op
++)
1781 if (ENABLE_CHECKING
)
1783 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1785 #ifdef PRINT_OPCODE_TABLE
1786 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1787 op
->name
, (unsigned int) (op
- vle_opcodes
),
1788 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1789 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1792 /* The major opcodes had better be sorted. Code in the disassembler
1793 assumes the insns are sorted according to major opcode. */
1794 if (op
!= vle_opcodes
1795 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1797 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1801 bad_insn
|= insn_validate (op
);
1804 if ((ppc_cpu
& op
->flags
) != 0
1805 && !(ppc_cpu
& op
->deprecated
)
1806 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1808 as_bad (_("duplicate %s"), op
->name
);
1813 /* SPE2 instructions */
1814 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1816 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1817 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1819 if (ENABLE_CHECKING
)
1821 if (op
!= spe2_opcodes
)
1823 unsigned old_seg
, new_seg
;
1825 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1826 old_seg
= VLE_OP_TO_SEG (old_seg
);
1827 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1828 new_seg
= VLE_OP_TO_SEG (new_seg
);
1830 /* The major opcodes had better be sorted. Code in the
1831 disassembler assumes the insns are sorted according to
1833 if (new_seg
< old_seg
)
1835 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1840 bad_insn
|= insn_validate (op
);
1843 if ((ppc_cpu
& op
->flags
) != 0
1844 && !(ppc_cpu
& op
->deprecated
)
1845 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1847 as_bad (_("duplicate %s"), op
->name
);
1852 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1853 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1860 /* This function is called when the assembler starts up. It is called
1861 after the options have been parsed and the output file has been
1869 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1870 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1873 /* Set the ELF flags if desired. */
1874 if (ppc_flags
&& !msolaris
)
1875 bfd_set_private_flags (stdoutput
, ppc_flags
);
1878 ppc_setup_opcodes ();
1880 /* Tell the main code what the endianness is if it is not overridden
1882 if (!set_target_endian
)
1884 set_target_endian
= 1;
1885 target_big_endian
= PPC_BIG_ENDIAN
;
1889 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1891 /* Create XCOFF sections with .text in first, as it's creating dummy symbols
1892 to serve as initial csects. This forces the text csects to precede the
1893 data csects. These symbols will not be output. */
1894 ppc_init_xcoff_section (&ppc_xcoff_text_section
, text_section
);
1895 ppc_init_xcoff_section (&ppc_xcoff_data_section
, data_section
);
1896 ppc_init_xcoff_section (&ppc_xcoff_bss_section
, bss_section
);
1905 htab_delete (ppc_hash
);
1906 _obstack_free (&insn_obstack
, NULL
);
1915 if (ppc_apuinfo_list
== NULL
)
1918 /* Ok, so write the section info out. We have this layout:
1922 0 8 length of "APUinfo\0"
1923 4 (n*4) number of APU's (4 bytes each)
1926 20 APU#1 first APU's info
1927 24 APU#2 second APU's info
1932 asection
*seg
= now_seg
;
1933 subsegT subseg
= now_subseg
;
1934 asection
*apuinfo_secp
= (asection
*) NULL
;
1937 /* Create the .PPC.EMB.apuinfo section. */
1938 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1939 bfd_set_section_flags (apuinfo_secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
1942 md_number_to_chars (p
, (valueT
) 8, 4);
1945 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1948 md_number_to_chars (p
, (valueT
) 2, 4);
1951 strcpy (p
, APUINFO_LABEL
);
1953 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1956 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1959 frag_align (2, 0, 0);
1961 /* We probably can't restore the current segment, for there likely
1964 subseg_set (seg
, subseg
);
1969 /* Insert an operand value into an instruction. */
1972 ppc_insert_operand (uint64_t insn
,
1973 const struct powerpc_operand
*operand
,
1979 int64_t min
, max
, right
;
1981 max
= operand
->bitm
;
1985 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1987 /* Extend the allowed range for addis to [-32768, 65535].
1988 Similarly for cmpli and some VLE high part insns. For 64-bit
1989 it would be good to disable this for signed fields since the
1990 value is sign extended into the high 32 bits of the register.
1991 If the value is, say, an address, then we might care about
1992 the high bits. However, gcc as of 2014-06 uses unsigned
1993 values when loading the high part of 64-bit constants using
1995 min
= ~(max
>> 1) & -right
;
1997 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1999 max
= (max
>> 1) & -right
;
2000 min
= ~max
& -right
;
2002 else if ((operand
->flags
& PPC_OPERAND_NONZERO
) != 0)
2008 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
2011 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
2020 /* Some people write constants with the sign extension done by
2021 hand but only up to 32 bits. This shouldn't really be valid,
2022 but, to permit this code to assemble on a 64-bit host, we
2023 sign extend the 32-bit value to 64 bits if so doing makes the
2024 value valid. We only do this for operands that are 32-bits or
2027 && (operand
->bitm
& ~0xffffffffULL
) == 0
2028 && (val
- (1LL << 32)) >= min
2029 && (val
- (1LL << 32)) <= max
2030 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
2031 val
= val
- (1LL << 32);
2033 /* Similarly, people write expressions like ~(1<<15), and expect
2034 this to be OK for a 32-bit unsigned value. */
2036 && (operand
->bitm
& ~0xffffffffULL
) == 0
2037 && (val
+ (1LL << 32)) >= min
2038 && (val
+ (1LL << 32)) <= max
2039 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2040 val
= val
+ (1LL << 32);
2044 || (val
& (right
- 1)) != 0)
2045 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2048 if (operand
->insert
)
2053 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2054 if (errmsg
!= (const char *) NULL
)
2055 as_bad_where (file
, line
, "%s", errmsg
);
2059 if ((operand
->flags
& PPC_OPERAND_NONZERO
) != 0)
2061 if (operand
->shift
>= 0)
2062 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2064 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2072 /* Parse @got, etc. and return the desired relocation. */
2073 static bfd_reloc_code_real_type
2074 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2078 unsigned int length
: 8;
2079 unsigned int valid32
: 1;
2080 unsigned int valid64
: 1;
2089 const struct map_bfd
*ptr
;
2091 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2092 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2093 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2095 static const struct map_bfd mapping
[] = {
2096 MAP ("l", BFD_RELOC_LO16
),
2097 MAP ("h", BFD_RELOC_HI16
),
2098 MAP ("ha", BFD_RELOC_HI16_S
),
2099 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2100 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2101 MAP ("got", BFD_RELOC_16_GOTOFF
),
2102 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2103 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2104 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2105 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2106 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2107 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2108 MAP ("copy", BFD_RELOC_PPC_COPY
),
2109 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2110 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2111 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2112 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2113 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2114 MAP ("tls", BFD_RELOC_PPC_TLS
),
2115 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2116 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2117 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2118 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2119 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2120 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2121 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2122 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2123 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2124 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2125 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2126 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2127 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2128 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2129 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2130 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2131 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2132 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2133 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2134 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2135 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2136 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2137 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2138 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2139 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2140 MAP32 ("fixup", BFD_RELOC_CTOR
),
2141 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2142 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2143 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2144 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2145 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2146 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2147 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2148 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2149 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2150 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2151 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2152 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2153 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2154 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2155 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2156 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2157 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2158 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2159 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2160 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2161 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2162 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2163 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2164 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2165 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2166 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2167 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2168 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2169 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2170 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2171 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2172 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2173 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2174 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2175 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2176 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2177 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2178 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2179 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2180 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2181 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2182 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2183 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2184 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2185 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2186 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2187 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2188 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2189 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2190 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2191 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2192 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2193 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2194 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2195 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2196 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL
),
2197 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
),
2198 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
),
2199 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL_PCREL34
),
2200 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
),
2201 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2202 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2203 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2204 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2205 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2209 return BFD_RELOC_NONE
;
2211 for (ch
= *str
, str2
= ident
;
2212 (str2
< ident
+ sizeof (ident
) - 1
2213 && (ISALNUM (ch
) || ch
== '@'));
2216 *str2
++ = TOLOWER (ch
);
2223 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2224 if (ch
== ptr
->string
[0]
2225 && len
== ptr
->length
2226 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2227 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2229 int reloc
= ptr
->reloc
;
2231 if (!ppc_obj64
&& (exp_p
->X_op
== O_big
|| exp_p
->X_add_number
!= 0))
2235 case BFD_RELOC_16_GOTOFF
:
2236 case BFD_RELOC_LO16_GOTOFF
:
2237 case BFD_RELOC_HI16_GOTOFF
:
2238 case BFD_RELOC_HI16_S_GOTOFF
:
2239 as_warn (_("symbol+offset@%s means symbol@%s+offset"),
2240 ptr
->string
, ptr
->string
);
2243 case BFD_RELOC_PPC_GOT_TLSGD16
:
2244 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2245 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2246 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2247 case BFD_RELOC_PPC_GOT_TLSLD16
:
2248 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2249 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2250 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2251 case BFD_RELOC_PPC_GOT_DTPREL16
:
2252 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2253 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2254 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2255 case BFD_RELOC_PPC_GOT_TPREL16
:
2256 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2257 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2258 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2259 as_bad (_("symbol+offset@%s not supported"), ptr
->string
);
2264 /* Now check for identifier@suffix+constant. */
2265 if (*str
== '-' || *str
== '+')
2267 char *orig_line
= input_line_pointer
;
2268 expressionS new_exp
;
2270 input_line_pointer
= str
;
2271 expression (&new_exp
);
2272 if (new_exp
.X_op
== O_constant
&& exp_p
->X_op
!= O_big
)
2274 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2275 str
= input_line_pointer
;
2277 input_line_pointer
= orig_line
;
2281 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2282 && exp_p
->X_op
== O_symbol
2283 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2285 /* Change the symbol so that the dummy .TOC. symbol can be
2286 omitted from the object file. */
2287 exp_p
->X_add_symbol
= &abs_symbol
;
2290 if (reloc
== BFD_RELOC_PPC64_REL24_NOTOC
2291 && (ppc_cpu
& PPC_OPCODE_POWER10
) == 0)
2292 reloc
= BFD_RELOC_PPC64_REL24_P9NOTOC
;
2294 return (bfd_reloc_code_real_type
) reloc
;
2297 return BFD_RELOC_NONE
;
2300 /* Support @got, etc. on constants emitted via .short, .int etc. */
2302 bfd_reloc_code_real_type
2303 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2306 if (nbytes
>= 2 && *input_line_pointer
== '@')
2307 return ppc_elf_suffix (&input_line_pointer
, exp
);
2308 return BFD_RELOC_NONE
;
2311 /* Warn when emitting data to code sections, unless we are emitting
2312 a relocation that ld --ppc476-workaround uses to recognise data
2313 *and* there was an unconditional branch prior to the data. */
2316 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2317 unsigned int nbytes
, fixS
*fix
)
2320 && (now_seg
->flags
& SEC_CODE
) != 0
2323 || !(fix
->fx_r_type
== BFD_RELOC_32
2324 || fix
->fx_r_type
== BFD_RELOC_CTOR
2325 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2326 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2327 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2328 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2329 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2330 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2331 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2332 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2334 /* Flag that we've warned. */
2338 as_warn (_("data in executable section"));
2342 /* Solaris pseduo op to change to the .rodata section. */
2344 ppc_elf_rdata (int xxx
)
2346 char *save_line
= input_line_pointer
;
2347 static char section
[] = ".rodata\n";
2349 /* Just pretend this is .section .rodata */
2350 input_line_pointer
= section
;
2351 obj_elf_section (xxx
);
2353 input_line_pointer
= save_line
;
2356 /* Pseudo op to make file scope bss items. */
2358 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2371 c
= get_symbol_name (&name
);
2373 /* Just after name is now '\0'. */
2374 p
= input_line_pointer
;
2376 SKIP_WHITESPACE_AFTER_NAME ();
2377 if (*input_line_pointer
!= ',')
2379 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2380 ignore_rest_of_line ();
2384 input_line_pointer
++; /* skip ',' */
2385 if ((size
= get_absolute_expression ()) < 0)
2387 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2388 ignore_rest_of_line ();
2392 /* The third argument to .lcomm is the alignment. */
2393 if (*input_line_pointer
!= ',')
2397 ++input_line_pointer
;
2398 align
= get_absolute_expression ();
2401 as_warn (_("ignoring bad alignment"));
2407 symbolP
= symbol_find_or_make (name
);
2410 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2412 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2413 S_GET_NAME (symbolP
));
2414 ignore_rest_of_line ();
2418 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2420 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2421 S_GET_NAME (symbolP
),
2422 (long) S_GET_VALUE (symbolP
),
2425 ignore_rest_of_line ();
2431 old_subsec
= now_subseg
;
2434 /* Convert to a power of 2 alignment. */
2435 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2438 as_bad (_("common alignment not a power of 2"));
2439 ignore_rest_of_line ();
2446 record_alignment (bss_section
, align2
);
2447 subseg_set (bss_section
, 1);
2449 frag_align (align2
, 0, 0);
2450 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2451 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2452 symbol_set_frag (symbolP
, frag_now
);
2453 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2456 S_SET_SIZE (symbolP
, size
);
2457 S_SET_SEGMENT (symbolP
, bss_section
);
2458 subseg_set (old_sec
, old_subsec
);
2459 demand_empty_rest_of_line ();
2462 /* Pseudo op to set symbol local entry point. */
2464 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2467 char c
= get_symbol_name (&name
);
2472 elf_symbol_type
*elfsym
;
2474 p
= input_line_pointer
;
2476 SKIP_WHITESPACE_AFTER_NAME ();
2477 if (*input_line_pointer
!= ',')
2480 as_bad (_("expected comma after name `%s' in .localentry directive"),
2483 ignore_rest_of_line ();
2486 input_line_pointer
++;
2488 if (exp
.X_op
== O_absent
)
2490 as_bad (_("missing expression in .localentry directive"));
2491 exp
.X_op
= O_constant
;
2492 exp
.X_add_number
= 0;
2495 sym
= symbol_find_or_make (name
);
2498 if (resolve_expression (&exp
)
2499 && exp
.X_op
== O_constant
)
2501 unsigned int encoded
, ok
;
2504 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2505 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2508 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2509 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2511 as_bad (_(".localentry expression for `%s' "
2512 "is not a valid power of 2"), S_GET_NAME (sym
));
2518 bfdsym
= symbol_get_bfdsym (sym
);
2519 elfsym
= elf_symbol_from (bfdsym
);
2520 gas_assert (elfsym
);
2521 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2522 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2523 if (ppc_abiversion
== 0)
2528 as_bad (_(".localentry expression for `%s' "
2529 "does not evaluate to a constant"), S_GET_NAME (sym
));
2531 demand_empty_rest_of_line ();
2534 /* Pseudo op to set ABI version. */
2536 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2541 if (exp
.X_op
== O_absent
)
2543 as_bad (_("missing expression in .abiversion directive"));
2544 exp
.X_op
= O_constant
;
2545 exp
.X_add_number
= 0;
2548 if (resolve_expression (&exp
)
2549 && exp
.X_op
== O_constant
)
2550 ppc_abiversion
= exp
.X_add_number
;
2552 as_bad (_(".abiversion expression does not evaluate to a constant"));
2553 demand_empty_rest_of_line ();
2556 /* Parse a .gnu_attribute directive. */
2558 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2560 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2562 /* Check validity of defined powerpc tags. */
2563 if (tag
== Tag_GNU_Power_ABI_FP
2564 || tag
== Tag_GNU_Power_ABI_Vector
2565 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2569 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2571 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2572 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2573 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2574 as_warn (_("unknown .gnu_attribute value"));
2578 /* Set ABI version in output file. */
2580 ppc_elf_md_finish (void)
2582 if (ppc_obj64
&& ppc_abiversion
!= 0)
2584 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2585 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2587 /* Any selection of opcodes based on ppc_cpu after gas has finished
2588 parsing the file is invalid. md_apply_fix and ppc_handle_align
2589 must select opcodes based on the machine in force at the point
2590 where the fixup or alignment frag was created, not the machine in
2591 force at the end of file. */
2595 /* Validate any relocations emitted for -mrelocatable, possibly adding
2596 fixups for word relocations in writable segments, so we can adjust
2599 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2601 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2610 case SHLIB_MRELOCATABLE
:
2611 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2612 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2613 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2614 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2615 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2616 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2617 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2618 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2619 && (seg
->flags
& SEC_LOAD
) != 0
2620 && strcmp (segment_name (seg
), ".got2") != 0
2621 && strcmp (segment_name (seg
), ".dtors") != 0
2622 && strcmp (segment_name (seg
), ".ctors") != 0
2623 && strcmp (segment_name (seg
), ".fixup") != 0
2624 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2625 && strcmp (segment_name (seg
), ".eh_frame") != 0
2626 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2628 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2629 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2631 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2632 _("relocation cannot be done when using -mrelocatable"));
2639 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2640 function descriptor sym if the corresponding code sym is used. */
2643 ppc_frob_file_before_adjust (void)
2651 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2657 name
= S_GET_NAME (symp
);
2661 if (! S_IS_WEAK (symp
)
2662 || S_IS_DEFINED (symp
))
2665 dotname
= concat (".", name
, (char *) NULL
);
2666 dotsym
= symbol_find_noref (dotname
, 1);
2668 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2669 || symbol_used_in_reloc_p (dotsym
)))
2670 symbol_mark_used (symp
);
2674 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2676 && toc_reloc_types
!= has_large_toc_reloc
2677 && bfd_section_size (toc
) > 0x10000)
2678 as_warn (_("TOC section size exceeds 64k"));
2681 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2682 emitted. Other uses of .TOC. will cause the symbol to be marked
2683 with BSF_KEEP in md_apply_fix. */
2686 ppc_elf_adjust_symtab (void)
2691 symp
= symbol_find (".TOC.");
2694 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2695 if ((bsym
->flags
& BSF_KEEP
) == 0)
2696 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2700 #endif /* OBJ_ELF */
2703 /* Parse XCOFF relocations. */
2704 static bfd_reloc_code_real_type
2705 ppc_xcoff_suffix (char **str_p
)
2709 unsigned int length
: 8;
2710 unsigned int valid32
: 1;
2711 unsigned int valid64
: 1;
2720 const struct map_bfd
*ptr
;
2722 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2723 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2724 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2726 static const struct map_bfd mapping
[] = {
2727 MAP ("l", BFD_RELOC_PPC_TOC16_LO
),
2728 MAP ("u", BFD_RELOC_PPC_TOC16_HI
),
2729 MAP32 ("ie", BFD_RELOC_PPC_TLSIE
),
2730 MAP32 ("ld", BFD_RELOC_PPC_TLSLD
),
2731 MAP32 ("le", BFD_RELOC_PPC_TLSLE
),
2732 MAP32 ("m", BFD_RELOC_PPC_TLSM
),
2733 MAP32 ("ml", BFD_RELOC_PPC_TLSML
),
2734 MAP64 ("ie", BFD_RELOC_PPC64_TLSIE
),
2735 MAP64 ("ld", BFD_RELOC_PPC64_TLSLD
),
2736 MAP64 ("le", BFD_RELOC_PPC64_TLSLE
),
2737 MAP64 ("m", BFD_RELOC_PPC64_TLSM
),
2738 MAP64 ("ml", BFD_RELOC_PPC64_TLSML
),
2742 return BFD_RELOC_NONE
;
2744 for (ch
= *str
, str2
= ident
;
2745 (str2
< ident
+ sizeof (ident
) - 1
2746 && (ISALNUM (ch
) || ch
== '@'));
2749 *str2
++ = TOLOWER (ch
);
2756 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2757 if (ch
== ptr
->string
[0]
2758 && len
== ptr
->length
2759 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2760 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2763 return (bfd_reloc_code_real_type
) ptr
->reloc
;
2766 return BFD_RELOC_NONE
;
2769 /* Restore XCOFF addis instruction to ELF format.
2770 AIX often generates addis instructions using "addis RT,D(RA)"
2771 format instead of the ELF "addis RT,RA,SI" one.
2772 On entry RT_E is at the comma after RT, D_E is at the open
2773 parenthesis after D, and RA_E is at the close parenthesis after RA. */
2775 ppc_xcoff_fixup_addis (char *rt_e
, char *d_e
, char *ra_e
)
2777 size_t ra_size
= ra_e
- d_e
- 1;
2778 char *save_ra
= xmalloc (ra_size
);
2781 memcpy (save_ra
, d_e
+ 1, ra_size
);
2782 /* Shuffle D to make room for RA, copying the comma too. */
2783 memmove (rt_e
+ ra_size
+ 1, rt_e
, d_e
- rt_e
);
2784 /* Erase the trailing ')', keeping any rubbish for potential errors. */
2785 memmove (ra_e
, ra_e
+ 1, strlen (ra_e
));
2786 /* Write RA back. */
2787 memcpy (rt_e
+ 1, save_ra
, ra_size
);
2791 /* Support @ie, etc. on constants emitted via .short, .int etc. */
2793 bfd_reloc_code_real_type
2794 ppc_xcoff_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2797 if (nbytes
>= 2 && *input_line_pointer
== '@')
2798 return ppc_xcoff_suffix (&input_line_pointer
);
2800 /* There isn't any @ symbol for default TLS relocations (R_TLS). */
2801 if (exp
->X_add_symbol
!= NULL
2802 && (symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_TL
2803 || symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_UL
))
2804 return (ppc_obj64
? BFD_RELOC_PPC64_TLSGD
: BFD_RELOC_PPC_TLSGD
);
2806 return BFD_RELOC_NONE
;
2809 #endif /* OBJ_XCOFF */
2811 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2812 /* See whether a symbol is in the TOC section. */
2815 ppc_is_toc_sym (symbolS
*sym
)
2818 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2819 || symbol_get_tc (sym
)->symbol_class
== XMC_TE
2820 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2823 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2825 return strcmp (sname
, ".toc") == 0;
2827 return strcmp (sname
, ".got") == 0;
2830 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2834 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2836 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2840 /* Check we don't already exist. */
2841 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2842 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2845 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2847 if (ppc_apuinfo_num_alloc
== 0)
2849 ppc_apuinfo_num_alloc
= 4;
2850 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2854 ppc_apuinfo_num_alloc
+= 4;
2855 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2856 ppc_apuinfo_num_alloc
);
2859 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2864 /* Various frobbings of labels and their addresses. */
2866 /* Symbols labelling the current insn. */
2867 struct insn_label_list
2869 struct insn_label_list
*next
;
2873 static struct insn_label_list
*insn_labels
;
2874 static struct insn_label_list
*free_insn_labels
;
2877 ppc_record_label (symbolS
*sym
)
2879 struct insn_label_list
*l
;
2881 if (free_insn_labels
== NULL
)
2882 l
= XNEW (struct insn_label_list
);
2885 l
= free_insn_labels
;
2886 free_insn_labels
= l
->next
;
2890 l
->next
= insn_labels
;
2895 ppc_clear_labels (void)
2897 while (insn_labels
!= NULL
)
2899 struct insn_label_list
*l
= insn_labels
;
2900 insn_labels
= l
->next
;
2901 l
->next
= free_insn_labels
;
2902 free_insn_labels
= l
;
2907 ppc_start_line_hook (void)
2909 ppc_clear_labels ();
2913 ppc_new_dot_label (symbolS
*sym
)
2915 ppc_record_label (sym
);
2917 /* Anchor this label to the current csect for relocations. */
2918 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2923 ppc_frob_label (symbolS
*sym
)
2925 ppc_record_label (sym
);
2928 /* Set the class of a label based on where it is defined. This handles
2929 symbols without suffixes. Also, move the symbol so that it follows
2930 the csect symbol. */
2931 if (ppc_current_csect
!= (symbolS
*) NULL
)
2933 if (symbol_get_tc (sym
)->symbol_class
== -1)
2934 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2936 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2937 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2938 &symbol_rootP
, &symbol_lastP
);
2939 /* Update last csect symbol. */
2940 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2942 /* Some labels like .bs are using within differently.
2943 So avoid changing it, if it's already set. */
2944 if (symbol_get_tc (sym
)->within
== NULL
)
2945 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2950 dwarf2_emit_label (sym
);
2954 /* We need to keep a list of fixups. We can't simply generate them as
2955 we go, because that would require us to first create the frag, and
2956 that would screw up references to ``.''. */
2962 bfd_reloc_code_real_type reloc
;
2965 #define MAX_INSN_FIXUPS (5)
2967 /* Return the field size operated on by RELOC, and whether it is
2968 pc-relative in PC_RELATIVE. */
2971 fixup_size (bfd_reloc_code_real_type reloc
, bool *pc_relative
)
2973 unsigned int size
= 0;
2978 /* This switch statement must handle all BFD_RELOC values
2979 possible in instruction fixups. As is, it handles all
2980 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2981 bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2982 Overkill since data and marker relocs need not be handled
2983 here, but this way we can be sure a needed fixup reloc isn't
2984 accidentally omitted. */
2985 case BFD_RELOC_PPC_EMB_MRKREF
:
2986 case BFD_RELOC_VTABLE_ENTRY
:
2987 case BFD_RELOC_VTABLE_INHERIT
:
2995 case BFD_RELOC_16_BASEREL
:
2996 case BFD_RELOC_16_GOTOFF
:
2997 case BFD_RELOC_GPREL16
:
2998 case BFD_RELOC_HI16
:
2999 case BFD_RELOC_HI16_BASEREL
:
3000 case BFD_RELOC_HI16_GOTOFF
:
3001 case BFD_RELOC_HI16_PLTOFF
:
3002 case BFD_RELOC_HI16_S
:
3003 case BFD_RELOC_HI16_S_BASEREL
:
3004 case BFD_RELOC_HI16_S_GOTOFF
:
3005 case BFD_RELOC_HI16_S_PLTOFF
:
3006 case BFD_RELOC_LO16
:
3007 case BFD_RELOC_LO16_BASEREL
:
3008 case BFD_RELOC_LO16_GOTOFF
:
3009 case BFD_RELOC_LO16_PLTOFF
:
3010 case BFD_RELOC_PPC64_ADDR16_DS
:
3011 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3012 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3013 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
3014 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
3015 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
3016 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
3017 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
3018 case BFD_RELOC_PPC64_DTPREL16_DS
:
3019 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
3020 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
3021 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
3022 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
3023 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
3024 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
3025 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
3026 case BFD_RELOC_PPC64_GOT16_DS
:
3027 case BFD_RELOC_PPC64_GOT16_LO_DS
:
3028 case BFD_RELOC_PPC64_HIGHER
:
3029 case BFD_RELOC_PPC64_HIGHER_S
:
3030 case BFD_RELOC_PPC64_HIGHEST
:
3031 case BFD_RELOC_PPC64_HIGHEST_S
:
3032 case BFD_RELOC_PPC64_PLT16_LO_DS
:
3033 case BFD_RELOC_PPC64_PLTGOT16
:
3034 case BFD_RELOC_PPC64_PLTGOT16_DS
:
3035 case BFD_RELOC_PPC64_PLTGOT16_HA
:
3036 case BFD_RELOC_PPC64_PLTGOT16_HI
:
3037 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3038 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
3039 case BFD_RELOC_PPC64_SECTOFF_DS
:
3040 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
3041 case BFD_RELOC_PPC64_TOC16_DS
:
3042 case BFD_RELOC_PPC64_TOC16_HA
:
3043 case BFD_RELOC_PPC64_TOC16_HI
:
3044 case BFD_RELOC_PPC64_TOC16_LO
:
3045 case BFD_RELOC_PPC64_TOC16_LO_DS
:
3046 case BFD_RELOC_PPC64_TPREL16_DS
:
3047 case BFD_RELOC_PPC64_TPREL16_HIGH
:
3048 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
3049 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
3050 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
3051 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
3052 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
3053 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
3055 case BFD_RELOC_PPC_BA16
:
3057 case BFD_RELOC_PPC_DTPREL16
:
3058 case BFD_RELOC_PPC_DTPREL16_HA
:
3059 case BFD_RELOC_PPC_DTPREL16_HI
:
3060 case BFD_RELOC_PPC_DTPREL16_LO
:
3061 case BFD_RELOC_PPC_EMB_NADDR16
:
3062 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
3063 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
3064 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
3065 case BFD_RELOC_PPC_EMB_RELSDA
:
3066 case BFD_RELOC_PPC_EMB_RELSEC16
:
3067 case BFD_RELOC_PPC_EMB_RELST_LO
:
3068 case BFD_RELOC_PPC_EMB_RELST_HI
:
3069 case BFD_RELOC_PPC_EMB_RELST_HA
:
3070 case BFD_RELOC_PPC_EMB_SDA2I16
:
3071 case BFD_RELOC_PPC_EMB_SDA2REL
:
3072 case BFD_RELOC_PPC_EMB_SDAI16
:
3073 case BFD_RELOC_PPC_GOT_DTPREL16
:
3074 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
3075 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
3076 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3077 case BFD_RELOC_PPC_GOT_TLSGD16
:
3078 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
3079 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
3080 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
3081 case BFD_RELOC_PPC_GOT_TLSLD16
:
3082 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3083 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3084 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3085 case BFD_RELOC_PPC_GOT_TPREL16
:
3086 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3087 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3088 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3089 case BFD_RELOC_PPC_TOC16
:
3090 case BFD_RELOC_PPC_TOC16_HI
:
3091 case BFD_RELOC_PPC_TOC16_LO
:
3092 case BFD_RELOC_PPC_TPREL16
:
3093 case BFD_RELOC_PPC_TPREL16_HA
:
3094 case BFD_RELOC_PPC_TPREL16_HI
:
3095 case BFD_RELOC_PPC_TPREL16_LO
:
3099 case BFD_RELOC_16_PCREL
:
3100 case BFD_RELOC_HI16_PCREL
:
3101 case BFD_RELOC_HI16_S_PCREL
:
3102 case BFD_RELOC_LO16_PCREL
:
3103 case BFD_RELOC_PPC64_REL16_HIGH
:
3104 case BFD_RELOC_PPC64_REL16_HIGHA
:
3105 case BFD_RELOC_PPC64_REL16_HIGHER
:
3106 case BFD_RELOC_PPC64_REL16_HIGHER34
:
3107 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3108 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
3109 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3110 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
3111 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3112 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
3114 case BFD_RELOC_PPC_B16
:
3116 case BFD_RELOC_PPC_VLE_REL8
:
3122 case BFD_RELOC_32_PLTOFF
:
3124 case BFD_RELOC_CTOR
:
3126 case BFD_RELOC_PPC64_ENTRY
:
3127 case BFD_RELOC_PPC_16DX_HA
:
3129 case BFD_RELOC_PPC_BA16
:
3131 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3132 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3133 case BFD_RELOC_PPC_BA26
:
3134 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3135 case BFD_RELOC_PPC_EMB_NADDR32
:
3136 case BFD_RELOC_PPC_EMB_SDA21
:
3137 case BFD_RELOC_PPC_TLS
:
3138 case BFD_RELOC_PPC_TLSGD
:
3139 case BFD_RELOC_PPC_TLSLD
:
3140 case BFD_RELOC_PPC_TLSLE
:
3141 case BFD_RELOC_PPC_TLSIE
:
3142 case BFD_RELOC_PPC_TLSM
:
3143 case BFD_RELOC_PPC_TLSML
:
3144 case BFD_RELOC_PPC_VLE_HA16A
:
3145 case BFD_RELOC_PPC_VLE_HA16D
:
3146 case BFD_RELOC_PPC_VLE_HI16A
:
3147 case BFD_RELOC_PPC_VLE_HI16D
:
3148 case BFD_RELOC_PPC_VLE_LO16A
:
3149 case BFD_RELOC_PPC_VLE_LO16D
:
3150 case BFD_RELOC_PPC_VLE_SDA21
:
3151 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3152 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3153 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3154 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3155 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3156 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3157 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3158 case BFD_RELOC_PPC64_TLS_PCREL
:
3163 case BFD_RELOC_24_PLT_PCREL
:
3164 case BFD_RELOC_32_PCREL
:
3165 case BFD_RELOC_32_PLT_PCREL
:
3166 case BFD_RELOC_PPC64_REL24_NOTOC
:
3167 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
3169 case BFD_RELOC_PPC_B16
:
3171 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3172 case BFD_RELOC_PPC_B16_BRTAKEN
:
3173 case BFD_RELOC_PPC_B26
:
3174 case BFD_RELOC_PPC_LOCAL24PC
:
3175 case BFD_RELOC_PPC_REL16DX_HA
:
3176 case BFD_RELOC_PPC_VLE_REL15
:
3177 case BFD_RELOC_PPC_VLE_REL24
:
3183 case BFD_RELOC_CTOR
:
3185 case BFD_RELOC_PPC_COPY
:
3186 case BFD_RELOC_PPC_DTPMOD
:
3187 case BFD_RELOC_PPC_DTPREL
:
3188 case BFD_RELOC_PPC_GLOB_DAT
:
3189 case BFD_RELOC_PPC_TPREL
:
3190 size
= ppc_obj64
? 8 : 4;
3194 case BFD_RELOC_64_PLTOFF
:
3195 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3196 case BFD_RELOC_PPC64_D28
:
3197 case BFD_RELOC_PPC64_D34
:
3198 case BFD_RELOC_PPC64_D34_LO
:
3199 case BFD_RELOC_PPC64_D34_HI30
:
3200 case BFD_RELOC_PPC64_D34_HA30
:
3201 case BFD_RELOC_PPC64_TPREL34
:
3202 case BFD_RELOC_PPC64_DTPREL34
:
3203 case BFD_RELOC_PPC64_TOC
:
3204 case BFD_RELOC_PPC64_TLSGD
:
3205 case BFD_RELOC_PPC64_TLSLD
:
3206 case BFD_RELOC_PPC64_TLSLE
:
3207 case BFD_RELOC_PPC64_TLSIE
:
3208 case BFD_RELOC_PPC64_TLSM
:
3209 case BFD_RELOC_PPC64_TLSML
:
3213 case BFD_RELOC_64_PCREL
:
3214 case BFD_RELOC_64_PLT_PCREL
:
3215 case BFD_RELOC_PPC64_GOT_PCREL34
:
3216 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3217 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3218 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3219 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3220 case BFD_RELOC_PPC64_PCREL28
:
3221 case BFD_RELOC_PPC64_PCREL34
:
3222 case BFD_RELOC_PPC64_PLT_PCREL34
:
3231 if (ENABLE_CHECKING
)
3233 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3234 if (reloc_howto
!= NULL
3235 && (size
!= bfd_get_reloc_size (reloc_howto
)
3236 || pcrel
!= reloc_howto
->pc_relative
))
3238 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3243 *pc_relative
= pcrel
;
3248 /* If we have parsed a call to __tls_get_addr, parse an argument like
3249 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3250 is successfully parsed, *STR is updated past the trailing
3251 parenthesis and trailing white space, and *TLS_FIX contains the
3252 reloc and arg expression. */
3255 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3257 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3258 if (sym_name
[0] == '.')
3261 tls_fix
->reloc
= BFD_RELOC_NONE
;
3262 if (strncasecmp (sym_name
, "__tls_get_addr", 14) == 0
3263 && (sym_name
[14] == 0
3264 || strcasecmp (sym_name
+ 14, "_desc") == 0
3265 || strcasecmp (sym_name
+ 14, "_opt") == 0))
3267 char *hold
= input_line_pointer
;
3268 input_line_pointer
= *str
+ 1;
3269 expression (&tls_fix
->exp
);
3270 if (tls_fix
->exp
.X_op
== O_symbol
)
3272 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3273 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3274 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3275 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3276 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3278 input_line_pointer
+= 7;
3280 *str
= input_line_pointer
;
3283 input_line_pointer
= hold
;
3285 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3289 /* This routine is called for each instruction to be assembled. */
3292 md_assemble (char *str
)
3295 const struct powerpc_opcode
*opcode
;
3297 const ppc_opindex_t
*opindex_ptr
;
3300 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3305 unsigned int insn_length
;
3307 /* Get the opcode. */
3308 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3313 /* Look up the opcode in the hash table. */
3314 opcode
= (const struct powerpc_opcode
*) str_hash_find (ppc_hash
, str
);
3315 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3317 as_bad (_("unrecognized opcode: `%s'"), str
);
3318 ppc_clear_labels ();
3322 insn
= opcode
->opcode
;
3323 if (!target_big_endian
3324 && ((insn
& ~(1 << 26)) == 46u << 26
3325 || (insn
& ~(0xc0 << 1)) == (31u << 26 | 533 << 1)))
3327 /* lmw, stmw, lswi, lswx, stswi, stswx */
3328 as_bad (_("`%s' invalid when little-endian"), str
);
3329 ppc_clear_labels ();
3334 while (ISSPACE (*str
))
3338 /* AIX often generates addis instructions using "addis RT, D(RA)"
3339 format instead of the classic "addis RT, RA, SI" one.
3340 Restore it to the default format as it's the one encoded
3342 if (!strcmp (opcode
->name
, "addis"))
3344 char *rt_e
= strchr (str
, ',');
3346 && strchr (rt_e
+ 1, ',') == NULL
)
3348 char *d_e
= strchr (rt_e
+ 1, '(');
3349 if (d_e
!= NULL
&& d_e
!= rt_e
+ 1)
3351 char *ra_e
= strrchr (d_e
+ 1, ')');
3352 if (ra_e
!= NULL
&& ra_e
!= d_e
+ 1)
3353 ppc_xcoff_fixup_addis (rt_e
, d_e
, ra_e
);
3359 /* PowerPC operands are just expressions. The only real issue is
3360 that a few operand types are optional. If an instruction has
3361 multiple optional operands and one is omitted, then all optional
3362 operands past the first omitted one must also be omitted. */
3363 int num_optional_operands
= 0;
3364 int num_optional_provided
= 0;
3366 /* Gather the operands. */
3370 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3372 const struct powerpc_operand
*operand
;
3378 if (next_opindex
== 0)
3379 operand
= &powerpc_operands
[*opindex_ptr
];
3382 operand
= &powerpc_operands
[next_opindex
];
3387 /* If this is an optional operand, and we are skipping it, just
3388 insert the default value, usually a zero. */
3389 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3390 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3392 if (num_optional_operands
== 0)
3394 const ppc_opindex_t
*optr
;
3400 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3402 const struct powerpc_operand
*op
;
3403 op
= &powerpc_operands
[*optr
];
3407 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3408 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3410 ++num_optional_operands
;
3412 if (s
!= NULL
&& *s
!= '\0')
3416 /* Look for the start of the next operand. */
3417 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3418 s
= strpbrk (s
, "(,");
3420 s
= strchr (s
, ',');
3426 omitted
= total
- provided
;
3427 num_optional_provided
= num_optional_operands
- omitted
;
3429 if (--num_optional_provided
< 0)
3431 uint64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3432 num_optional_provided
);
3433 if (operand
->insert
)
3435 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3436 if (errmsg
!= (const char *) NULL
)
3437 as_bad ("%s", errmsg
);
3439 else if (operand
->shift
>= 0)
3440 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3442 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3444 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3445 next_opindex
= *opindex_ptr
+ 1;
3450 /* Gather the operand. */
3451 hold
= input_line_pointer
;
3452 input_line_pointer
= str
;
3453 cr_operand
= ((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0
3454 || (operand
->flags
& PPC_OPERAND_CR_REG
) != 0);
3457 str
= input_line_pointer
;
3458 input_line_pointer
= hold
;
3460 if (ex
.X_op
== O_illegal
)
3461 as_bad (_("illegal operand"));
3462 else if (ex
.X_op
== O_absent
)
3463 as_bad (_("missing operand"));
3464 else if (ex
.X_op
== O_register
)
3468 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3469 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3470 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
| PPC_OPERAND_ACC
)) != 0
3471 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3472 && ex
.X_add_number
!= 0
3473 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3474 as_warn (_("invalid register expression"));
3475 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3476 ppc_cpu
, (char *) NULL
, 0);
3478 else if (ex
.X_op
== O_constant
3479 || (ex
.X_op
== O_big
&& ex
.X_add_number
> 0))
3482 if (ex
.X_op
== O_constant
)
3484 val
= ex
.X_add_number
;
3485 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3486 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3487 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3490 val
= generic_bignum_to_int64 ();
3492 /* Allow @HA, @L, @H on constants. */
3493 char *orig_str
= str
;
3494 bfd_reloc_code_real_type reloc
= ppc_elf_suffix (&str
, &ex
);
3496 if (ex
.X_op
== O_constant
)
3498 val
= ex
.X_add_number
;
3499 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3500 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3501 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3503 if (reloc
!= BFD_RELOC_NONE
)
3510 case BFD_RELOC_LO16
:
3512 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3516 case BFD_RELOC_HI16
:
3517 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3519 /* PowerPC64 @h is tested for overflow. */
3521 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3523 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3524 val
= (val
^ sign
) - sign
;
3530 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3532 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3536 case BFD_RELOC_HI16_S
:
3537 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3539 /* PowerPC64 @ha is tested for overflow. */
3540 val
= (val
+ 0x8000) >> 16;
3541 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3543 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3544 val
= (val
^ sign
) - sign
;
3550 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3552 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3556 case BFD_RELOC_PPC64_HIGHER
:
3557 val
= PPC_HIGHER (val
);
3558 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3562 case BFD_RELOC_PPC64_HIGHER_S
:
3563 val
= PPC_HIGHERA (val
);
3564 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3568 case BFD_RELOC_PPC64_HIGHEST
:
3569 val
= PPC_HIGHEST (val
);
3570 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3574 case BFD_RELOC_PPC64_HIGHEST_S
:
3575 val
= PPC_HIGHESTA (val
);
3576 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3580 #endif /* OBJ_ELF */
3581 insn
= ppc_insert_operand (insn
, operand
, val
, ppc_cpu
, NULL
, 0);
3585 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3587 /* Look for a __tls_get_addr arg using the insane old syntax. */
3588 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3589 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3591 fixups
[fc
].opindex
= *opindex_ptr
;
3595 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3597 /* If VLE-mode convert LO/HI/HA relocations. */
3598 if (opcode
->flags
& PPC_OPCODE_VLE
)
3600 uint64_t tmp_insn
= insn
& opcode
->mask
;
3602 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3603 || tmp_insn
== E_AND2I_DOT_INSN
3604 || tmp_insn
== E_OR2IS_INSN
3605 || tmp_insn
== E_LI_INSN
3606 || tmp_insn
== E_LIS_INSN
3607 || tmp_insn
== E_AND2IS_DOT_INSN
);
3610 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3611 || tmp_insn
== E_ADD2IS_INSN
3612 || tmp_insn
== E_CMP16I_INSN
3613 || tmp_insn
== E_MULL2I_INSN
3614 || tmp_insn
== E_CMPL16I_INSN
3615 || tmp_insn
== E_CMPH16I_INSN
3616 || tmp_insn
== E_CMPHL16I_INSN
);
3623 case BFD_RELOC_PPC_EMB_SDA21
:
3624 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3627 case BFD_RELOC_LO16
:
3629 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3630 else if (use_a_reloc
)
3631 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3634 case BFD_RELOC_HI16
:
3636 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3637 else if (use_a_reloc
)
3638 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3641 case BFD_RELOC_HI16_S
:
3643 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3644 else if (use_a_reloc
)
3645 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3648 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3650 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3653 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3655 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3658 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3660 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3665 /* TLS and other tweaks. */
3671 case BFD_RELOC_PPC_TLS
:
3672 case BFD_RELOC_PPC64_TLS_PCREL
:
3673 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3674 as_bad (_("@tls may not be used with \"%s\" operands"),
3676 else if (operand
->shift
!= 11)
3677 as_bad (_("@tls may only be used in last operand"));
3679 insn
= ppc_insert_operand (insn
, operand
,
3681 ppc_cpu
, (char *) NULL
, 0);
3684 /* We'll only use the 32 (or 64) bit form of these relocations
3685 in constants. Instructions get the 16 or 34 bit form. */
3686 case BFD_RELOC_PPC_DTPREL
:
3687 if (operand
->bitm
== 0x3ffffffffULL
)
3688 reloc
= BFD_RELOC_PPC64_DTPREL34
;
3690 reloc
= BFD_RELOC_PPC_DTPREL16
;
3693 case BFD_RELOC_PPC_TPREL
:
3694 if (operand
->bitm
== 0x3ffffffffULL
)
3695 reloc
= BFD_RELOC_PPC64_TPREL34
;
3697 reloc
= BFD_RELOC_PPC_TPREL16
;
3700 case BFD_RELOC_PPC64_PCREL34
:
3701 if (operand
->bitm
== 0xfffffffULL
)
3703 reloc
= BFD_RELOC_PPC64_PCREL28
;
3707 case BFD_RELOC_PPC64_GOT_PCREL34
:
3708 case BFD_RELOC_PPC64_PLT_PCREL34
:
3709 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3710 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3711 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3712 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3713 if (operand
->bitm
!= 0x3ffffffffULL
3714 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3715 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3718 case BFD_RELOC_LO16
:
3719 if (operand
->bitm
== 0x3ffffffffULL
3720 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3721 reloc
= BFD_RELOC_PPC64_D34_LO
;
3722 else if ((operand
->bitm
| 0xf) != 0xffff
3723 || operand
->shift
!= 0
3724 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3725 as_warn (_("%s unsupported on this instruction"), "@l");
3728 case BFD_RELOC_HI16
:
3729 if (operand
->bitm
== 0x3ffffffffULL
3730 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3731 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3732 else if (operand
->bitm
!= 0xffff
3733 || operand
->shift
!= 0
3734 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3735 as_warn (_("%s unsupported on this instruction"), "@h");
3738 case BFD_RELOC_HI16_S
:
3739 if (operand
->bitm
== 0x3ffffffffULL
3740 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3741 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3742 else if (operand
->bitm
== 0xffff
3743 && operand
->shift
== (int) PPC_OPSHIFT_INV
3744 && opcode
->opcode
== (19 << 26) + (2 << 1))
3746 reloc
= BFD_RELOC_PPC_16DX_HA
;
3747 else if (operand
->bitm
!= 0xffff
3748 || operand
->shift
!= 0
3749 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3750 as_warn (_("%s unsupported on this instruction"), "@ha");
3753 #endif /* OBJ_ELF */
3755 reloc
= ppc_xcoff_suffix (&str
);
3756 #endif /* OBJ_XCOFF */
3758 if (reloc
!= BFD_RELOC_NONE
)
3760 /* Determine a BFD reloc value based on the operand information.
3761 We are only prepared to turn a few of the operands into
3763 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3764 | PPC_OPERAND_ABSOLUTE
)) != 0
3765 && operand
->bitm
== 0x3fffffc
3766 && operand
->shift
== 0)
3767 reloc
= BFD_RELOC_PPC_B26
;
3768 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3769 | PPC_OPERAND_ABSOLUTE
)) != 0
3770 && operand
->bitm
== 0xfffc
3771 && operand
->shift
== 0)
3772 reloc
= BFD_RELOC_PPC_B16
;
3773 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3774 && operand
->bitm
== 0x1fe
3775 && operand
->shift
== -1)
3776 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3777 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3778 && operand
->bitm
== 0xfffe
3779 && operand
->shift
== 0)
3780 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3781 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3782 && operand
->bitm
== 0x1fffffe
3783 && operand
->shift
== 0)
3784 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3785 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3786 && (operand
->bitm
& 0xfff0) == 0xfff0
3787 && operand
->shift
== 0)
3789 reloc
= BFD_RELOC_16
;
3790 #if defined OBJ_XCOFF || defined OBJ_ELF
3791 /* Note: the symbol may be not yet defined. */
3792 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3793 && ppc_is_toc_sym (ex
.X_add_symbol
))
3795 reloc
= BFD_RELOC_PPC_TOC16
;
3797 as_warn (_("assuming %s on symbol"),
3798 ppc_obj64
? "@toc" : "@xgot");
3803 else if (operand
->bitm
== 0x3ffffffffULL
)
3804 reloc
= BFD_RELOC_PPC64_D34
;
3805 else if (operand
->bitm
== 0xfffffffULL
)
3806 reloc
= BFD_RELOC_PPC64_D28
;
3808 /* For the absolute forms of branches, convert the PC
3809 relative form back into the absolute. */
3810 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3814 case BFD_RELOC_PPC_B26
:
3815 reloc
= BFD_RELOC_PPC_BA26
;
3817 case BFD_RELOC_PPC_B16
:
3818 reloc
= BFD_RELOC_PPC_BA16
;
3821 case BFD_RELOC_PPC_B16_BRTAKEN
:
3822 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3824 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3825 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3836 case BFD_RELOC_PPC_TOC16
:
3837 toc_reloc_types
|= has_small_toc_reloc
;
3839 case BFD_RELOC_PPC64_TOC16_LO
:
3840 case BFD_RELOC_PPC64_TOC16_HI
:
3841 case BFD_RELOC_PPC64_TOC16_HA
:
3842 toc_reloc_types
|= has_large_toc_reloc
;
3849 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3854 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3857 case BFD_RELOC_LO16
:
3858 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3861 case BFD_RELOC_16_GOTOFF
:
3862 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3865 case BFD_RELOC_LO16_GOTOFF
:
3866 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3869 case BFD_RELOC_LO16_PLTOFF
:
3870 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3873 case BFD_RELOC_16_BASEREL
:
3874 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3877 case BFD_RELOC_LO16_BASEREL
:
3878 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3881 case BFD_RELOC_PPC_TOC16
:
3882 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3885 case BFD_RELOC_PPC64_TOC16_LO
:
3886 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3889 case BFD_RELOC_PPC64_PLTGOT16
:
3890 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3893 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3894 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3897 case BFD_RELOC_PPC_DTPREL16
:
3898 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3901 case BFD_RELOC_PPC_DTPREL16_LO
:
3902 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3905 case BFD_RELOC_PPC_TPREL16
:
3906 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3909 case BFD_RELOC_PPC_TPREL16_LO
:
3910 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3913 case BFD_RELOC_PPC_GOT_DTPREL16
:
3914 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3915 case BFD_RELOC_PPC_GOT_TPREL16
:
3916 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3920 as_bad (_("unsupported relocation for DS offset field"));
3925 /* Look for a __tls_get_addr arg after any __tls_get_addr
3926 modifiers like @plt. This fixup must be emitted before
3927 the usual call fixup. */
3928 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3929 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3931 fixups
[fc
].opindex
= *opindex_ptr
;
3936 /* We need to generate a fixup for this expression. */
3937 if (fc
>= MAX_INSN_FIXUPS
)
3938 as_fatal (_("too many fixups"));
3939 fixups
[fc
].exp
= ex
;
3940 fixups
[fc
].opindex
= *opindex_ptr
;
3941 fixups
[fc
].reloc
= reloc
;
3949 /* If expecting more operands, then we want to see "),". */
3950 if (*str
== endc
&& opindex_ptr
[1] != 0)
3954 while (ISSPACE (*str
));
3958 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3963 /* The call to expression should have advanced str past any
3971 else if (*str
!= '\0')
3973 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3976 else if (endc
== ')')
3978 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3983 while (ISSPACE (*str
))
3987 as_bad (_("junk at end of line: `%s'"), str
);
3990 /* Do we need/want an APUinfo section? */
3991 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3994 /* These are all version "1". */
3995 if (opcode
->flags
& PPC_OPCODE_SPE
)
3996 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3997 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3998 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3999 if (opcode
->flags
& PPC_OPCODE_EFS
)
4000 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
4001 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
4002 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
4003 if (opcode
->flags
& PPC_OPCODE_PMR
)
4004 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
4005 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
4006 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
4007 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
4008 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
4009 /* Only set the VLE flag if the instruction has been pulled via
4010 the VLE instruction set. This way the flag is guaranteed to
4011 be set for VLE-only instructions or for VLE-only processors,
4012 however it'll remain clear for dual-mode instructions on
4013 dual-mode and, more importantly, standard-mode processors. */
4014 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
4016 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
4017 if (elf_section_data (now_seg
) != NULL
)
4018 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
4023 /* Write out the instruction. */
4026 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
4027 /* All instructions can start on a 2 byte boundary for VLE. */
4030 if (frag_now
->insn_addr
!= addr_mask
)
4032 /* Don't emit instructions to a frag started for data, or for a
4033 CPU differing in VLE mode. Data is allowed to be misaligned,
4034 and it's possible to start a new frag in the middle of
4036 frag_wane (frag_now
);
4040 /* Check that insns within the frag are aligned. ppc_frag_check
4041 will ensure that the frag start address is aligned. */
4042 if ((frag_now_fix () & addr_mask
) != 0)
4043 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
4045 /* Differentiate between two, four, and eight byte insns. */
4047 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
4049 else if ((opcode
->flags
& PPC_OPCODE_POWER10
) != 0
4050 && PPC_PREFIX_P (insn
))
4052 struct insn_label_list
*l
;
4056 /* 8-byte prefix instructions are not allowed to cross 64-byte
4058 frag_align_code (6, 4);
4059 record_alignment (now_seg
, 6);
4061 /* Update alignment of the containing csect. */
4062 if (symbol_get_tc (ppc_current_csect
)->align
< 6)
4063 symbol_get_tc (ppc_current_csect
)->align
= 6;
4066 /* Update "dot" in any expressions used by this instruction, and
4067 a label attached to the instruction. By "attached" we mean
4068 on the same source line as the instruction and without any
4069 intervening semicolons. */
4070 dot_value
= frag_now_fix ();
4071 dot_frag
= frag_now
;
4072 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
4074 symbol_set_frag (l
->label
, dot_frag
);
4075 S_SET_VALUE (l
->label
, dot_value
);
4079 ppc_clear_labels ();
4081 f
= frag_more (insn_length
);
4082 frag_now
->insn_addr
= addr_mask
;
4084 /* The prefix part of an 8-byte instruction always occupies the lower
4085 addressed word in a doubleword, regardless of endianness. */
4086 if (insn_length
== 8
4087 && (sizeof (insn
) > sizeof (valueT
) || !target_big_endian
))
4089 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4090 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4093 md_number_to_chars (f
, insn
, insn_length
);
4097 last_subseg
= now_subseg
;
4100 dwarf2_emit_insn (insn_length
);
4103 /* Create any fixups. */
4104 for (i
= 0; i
< fc
; i
++)
4107 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4110 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4111 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4113 fixP
= fix_new_exp (frag_now
,
4114 f
- frag_now
->fr_literal
+ offset
,
4122 const struct powerpc_operand
*operand
;
4124 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4125 fixP
= fix_new_exp (frag_now
,
4126 f
- frag_now
->fr_literal
,
4129 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4132 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4137 /* For ELF, add support for SHT_ORDERED. */
4140 ppc_section_type (char *str
, size_t len
)
4142 if (len
== 7 && startswith (str
, "ordered"))
4149 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4151 if (type
== SHT_ORDERED
)
4152 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4158 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4163 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4166 #endif /* OBJ_ELF */
4169 /* Pseudo-op handling. */
4171 /* The .byte pseudo-op. This is similar to the normal .byte
4172 pseudo-op, but it can also take a single ASCII string. */
4175 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4179 if (*input_line_pointer
!= '\"')
4185 /* Gather characters. A real double quote is doubled. Unusual
4186 characters are not permitted. */
4187 ++input_line_pointer
;
4192 c
= *input_line_pointer
++;
4196 if (*input_line_pointer
!= '\"')
4198 ++input_line_pointer
;
4201 FRAG_APPEND_1_CHAR (c
);
4205 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4206 as_warn (_("data in executable section"));
4207 demand_empty_rest_of_line ();
4212 /* XCOFF specific pseudo-op handling. */
4214 /* This is set if we are creating a .stabx symbol, since we don't want
4215 to handle symbol suffixes for such symbols. */
4216 static bool ppc_stab_symbol
;
4218 /* Retrieve the visiblity input for pseudo-ops having ones. */
4219 static unsigned short
4220 ppc_xcoff_get_visibility (void) {
4223 if (startswith (input_line_pointer
, "exported"))
4225 input_line_pointer
+= 8;
4226 return SYM_V_EXPORTED
;
4229 if (startswith (input_line_pointer
, "hidden"))
4231 input_line_pointer
+= 6;
4232 return SYM_V_HIDDEN
;
4235 if (startswith (input_line_pointer
, "internal"))
4237 input_line_pointer
+= 8;
4238 return SYM_V_INTERNAL
;
4241 if (startswith (input_line_pointer
, "protected"))
4243 input_line_pointer
+= 9;
4244 return SYM_V_PROTECTED
;
4250 /* Retrieve visiblity using GNU syntax. */
4251 static void ppc_GNU_visibility (int visibility
) {
4255 coff_symbol_type
*coffsym
;
4259 if ((name
= read_symbol_name ()) == NULL
)
4261 symbolP
= symbol_find_or_make (name
);
4263 coffsym
= coffsymbol (symbol_get_bfdsym (symbolP
));
4265 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4266 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4268 c
= *input_line_pointer
;
4271 input_line_pointer
++;
4275 if (*input_line_pointer
== '\n')
4281 demand_empty_rest_of_line ();
4284 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4285 symbols in the .bss segment as though they were local common
4286 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4287 aligns .comm and .lcomm to 4 bytes.
4288 Symbols having a XMC_UL storage class are uninialized thread-local
4292 ppc_comm (int lcomm
)
4294 asection
*current_seg
= now_seg
;
4295 subsegT current_subseg
= now_subseg
;
4301 symbolS
*lcomm_sym
= NULL
;
4304 unsigned short visibility
= 0;
4305 struct ppc_xcoff_section
*section
;
4307 endc
= get_symbol_name (&name
);
4308 end_name
= input_line_pointer
;
4309 (void) restore_line_pointer (endc
);
4311 if (*input_line_pointer
!= ',')
4313 as_bad (_("missing size"));
4314 ignore_rest_of_line ();
4317 ++input_line_pointer
;
4319 size
= get_absolute_expression ();
4322 as_bad (_("negative size"));
4323 ignore_rest_of_line ();
4329 /* The third argument to .comm is the alignment. */
4330 if (*input_line_pointer
!= ',')
4334 ++input_line_pointer
;
4335 align
= get_absolute_expression ();
4338 as_warn (_("ignoring bad alignment"));
4342 /* The fourth argument to .comm is the visibility. */
4343 if (*input_line_pointer
== ',')
4345 input_line_pointer
++;
4346 visibility
= ppc_xcoff_get_visibility ();
4349 as_bad (_("Unknown visibility field in .comm"));
4350 ignore_rest_of_line ();
4361 /* The third argument to .lcomm appears to be the real local
4362 common symbol to create. References to the symbol named in
4363 the first argument are turned into references to the third
4365 if (*input_line_pointer
!= ',')
4367 as_bad (_("missing real symbol name"));
4368 ignore_rest_of_line ();
4371 ++input_line_pointer
;
4373 lcomm_endc
= get_symbol_name (&lcomm_name
);
4375 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4377 (void) restore_line_pointer (lcomm_endc
);
4379 /* The fourth argument to .lcomm is the alignment. */
4380 if (*input_line_pointer
!= ',')
4389 ++input_line_pointer
;
4390 align
= get_absolute_expression ();
4393 as_warn (_("ignoring bad alignment"));
4400 sym
= symbol_find_or_make (name
);
4403 if (S_IS_DEFINED (sym
)
4404 || S_GET_VALUE (sym
) != 0)
4406 as_bad (_("attempt to redefine symbol"));
4407 ignore_rest_of_line ();
4411 if (symbol_get_tc (sym
)->symbol_class
== XMC_UL
4412 || (lcomm
&& symbol_get_tc (lcomm_sym
)->symbol_class
== XMC_UL
))
4414 section
= &ppc_xcoff_tbss_section
;
4415 if (!ppc_xcoff_section_is_initialized (section
))
4417 ppc_init_xcoff_section (section
, subseg_new (".tbss", 0));
4418 bfd_set_section_flags (section
->segment
,
4419 SEC_ALLOC
| SEC_THREAD_LOCAL
);
4420 seg_info (section
->segment
)->bss
= 1;
4424 section
= &ppc_xcoff_bss_section
;
4426 record_alignment (section
->segment
, align
);
4429 || ! S_IS_DEFINED (lcomm_sym
))
4438 S_SET_EXTERNAL (sym
);
4442 symbol_get_tc (lcomm_sym
)->output
= 1;
4443 def_sym
= lcomm_sym
;
4447 subseg_set (section
->segment
, 1);
4448 frag_align (align
, 0, 0);
4450 symbol_set_frag (def_sym
, frag_now
);
4451 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4452 def_size
, (char *) NULL
);
4454 S_SET_SEGMENT (def_sym
, section
->segment
);
4455 symbol_get_tc (def_sym
)->align
= align
;
4459 /* Align the size of lcomm_sym. */
4460 symbol_get_frag (lcomm_sym
)->fr_offset
=
4461 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4462 &~ ((1 << align
) - 1));
4463 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4464 symbol_get_tc (lcomm_sym
)->align
= align
;
4469 /* Make sym an offset from lcomm_sym. */
4470 S_SET_SEGMENT (sym
, section
->segment
);
4471 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4472 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4473 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4476 if (!lcomm
&& visibility
)
4478 /* Add visibility to .comm symbol. */
4479 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4480 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4481 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4484 subseg_set (current_seg
, current_subseg
);
4486 demand_empty_rest_of_line ();
4489 /* The .csect pseudo-op. This switches us into a different
4490 subsegment. The first argument is a symbol whose value is the
4491 start of the .csect. In COFF, csect symbols get special aux
4492 entries defined by the x_csect field of union internal_auxent. The
4493 optional second argument is the alignment (the default is 2). */
4496 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4503 endc
= get_symbol_name (&name
);
4505 sym
= symbol_find_or_make (name
);
4507 (void) restore_line_pointer (endc
);
4509 if (S_GET_NAME (sym
)[0] == '\0')
4511 /* An unnamed csect is assumed to be [PR]. */
4512 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4516 if (*input_line_pointer
== ',')
4518 ++input_line_pointer
;
4519 align
= get_absolute_expression ();
4522 ppc_change_csect (sym
, align
);
4524 demand_empty_rest_of_line ();
4527 /* Change to a different csect. */
4530 ppc_change_csect (symbolS
*sym
, offsetT align
)
4532 if (S_IS_DEFINED (sym
))
4533 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4536 struct ppc_xcoff_section
*section
;
4543 /* This is a new csect. We need to look at the symbol class to
4544 figure out whether it should go in the text section or the
4548 switch (symbol_get_tc (sym
)->symbol_class
)
4558 section
= &ppc_xcoff_text_section
;
4568 section
= &ppc_xcoff_data_section
;
4569 if (ppc_toc_csect
!= NULL
4570 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4571 == section
->next_subsegment
))
4575 section
= &ppc_xcoff_bss_section
;
4578 section
= &ppc_xcoff_tdata_section
;
4579 /* Create .tdata section if not yet done. */
4580 if (!ppc_xcoff_section_is_initialized (section
))
4582 ppc_init_xcoff_section (section
, subseg_new (".tdata", 0));
4583 bfd_set_section_flags (section
->segment
, SEC_ALLOC
4584 | SEC_LOAD
| SEC_RELOC
| SEC_DATA
4585 | SEC_THREAD_LOCAL
);
4589 section
= &ppc_xcoff_tbss_section
;
4590 /* Create .tbss section if not yet done. */
4591 if (!ppc_xcoff_section_is_initialized (section
))
4593 ppc_init_xcoff_section (section
, subseg_new (".tbss", 0));
4594 bfd_set_section_flags (section
->segment
, SEC_ALLOC
|
4596 seg_info (section
->segment
)->bss
= 1;
4603 S_SET_SEGMENT (sym
, section
->segment
);
4604 symbol_get_tc (sym
)->subseg
= section
->next_subsegment
;
4605 ++section
->next_subsegment
;
4607 /* We set the obstack chunk size to a small value before
4608 changing subsegments, so that we don't use a lot of memory
4609 space for what may be a small section. */
4610 hold_chunksize
= chunksize
;
4613 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4614 symbol_get_tc (sym
)->subseg
);
4616 chunksize
= hold_chunksize
;
4619 ppc_after_toc_frag
= frag_now
;
4621 record_alignment (sec
, align
);
4623 frag_align_code (align
, 0);
4625 frag_align (align
, 0, 0);
4627 symbol_set_frag (sym
, frag_now
);
4628 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4630 symbol_get_tc (sym
)->align
= align
;
4631 symbol_get_tc (sym
)->output
= 1;
4632 symbol_get_tc (sym
)->within
= sym
;
4634 for (list
= section
->csects
;
4635 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4636 list
= symbol_get_tc (list
)->next
)
4638 symbol_get_tc (list
)->next
= sym
;
4640 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4641 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4645 ppc_current_csect
= sym
;
4649 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4653 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4655 sec
= subseg_new (dw
->xcoff_name
, subseg
);
4656 oldflags
= bfd_section_flags (sec
);
4657 if (oldflags
== SEC_NO_FLAGS
)
4659 /* Just created section. */
4660 gas_assert (dw_sections
[idx
].sect
== NULL
);
4662 bfd_set_section_flags (sec
, SEC_DEBUGGING
);
4663 bfd_set_section_alignment (sec
, 0);
4664 dw_sections
[idx
].sect
= sec
;
4667 /* Not anymore in a csect. */
4668 ppc_current_csect
= NULL
;
4671 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4672 .dwsect flag [, opt-label ]
4676 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4680 const struct xcoff_dwsect_name
*dw
;
4681 struct dw_subsection
*subseg
;
4682 struct dw_section
*dws
;
4686 flag
= get_absolute_expression ();
4688 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4689 if (xcoff_dwsect_names
[i
].flag
== flag
)
4691 dw
= &xcoff_dwsect_names
[i
];
4695 /* Parse opt-label. */
4696 if (*input_line_pointer
== ',')
4701 ++input_line_pointer
;
4703 c
= get_symbol_name (&label
);
4704 opt_label
= symbol_find_or_make (label
);
4705 (void) restore_line_pointer (c
);
4710 demand_empty_rest_of_line ();
4712 /* Return now in case of unknown subsection. */
4715 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4720 /* Find the subsection. */
4721 dws
= &dw_sections
[i
];
4723 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4725 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4726 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4728 as_bad (_("label %s was not defined in this dwarf section"),
4729 S_GET_NAME (opt_label
));
4730 subseg
= dws
->anon_subseg
;
4734 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4739 /* Switch to the subsection. */
4740 ppc_change_debug_section (i
, subseg
->subseg
);
4744 /* Create a new dw subsection. */
4745 subseg
= XCNEW (struct dw_subsection
);
4747 if (opt_label
== NULL
)
4749 /* The anonymous one. */
4751 subseg
->link
= NULL
;
4752 dws
->anon_subseg
= subseg
;
4757 if (dws
->list_subseg
!= NULL
)
4758 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4762 subseg
->link
= dws
->list_subseg
;
4763 dws
->list_subseg
= subseg
;
4764 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4767 ppc_change_debug_section (i
, subseg
->subseg
);
4771 /* Add the length field. */
4772 expressionS
*exp
= &subseg
->end_exp
;
4775 if (opt_label
!= NULL
)
4776 symbol_set_value_now (opt_label
);
4778 /* Add the length field. Note that according to the AIX assembler
4779 manual, the size of the length field is 4 for powerpc32 but
4780 12 for powerpc64. */
4783 /* Write the 64bit marker. */
4784 md_number_to_chars (frag_more (4), -1, 4);
4787 exp
->X_op
= O_subtract
;
4788 exp
->X_op_symbol
= symbol_temp_new_now ();
4789 exp
->X_add_symbol
= symbol_temp_make ();
4791 sz
= ppc_obj64
? 8 : 4;
4792 exp
->X_add_number
= -sz
;
4793 emit_expr (exp
, sz
);
4798 /* This function handles the .text and .data pseudo-ops. These
4799 pseudo-ops aren't really used by XCOFF; we implement them for the
4800 convenience of people who aren't used to XCOFF. */
4803 ppc_section (int type
)
4810 else if (type
== 'd')
4815 sym
= symbol_find_or_make (name
);
4817 ppc_change_csect (sym
, 2);
4819 demand_empty_rest_of_line ();
4822 /* This function handles the .section pseudo-op. This is mostly to
4823 give an error, since XCOFF only supports .text, .data and .bss, but
4824 we do permit the user to name the text or data section. */
4827 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4830 const char *real_name
;
4834 c
= get_symbol_name (&user_name
);
4836 if (strcmp (user_name
, ".text") == 0)
4837 real_name
= ".text[PR]";
4838 else if (strcmp (user_name
, ".data") == 0)
4839 real_name
= ".data[RW]";
4842 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4843 (void) restore_line_pointer (c
);
4844 ignore_rest_of_line ();
4848 (void) restore_line_pointer (c
);
4850 sym
= symbol_find_or_make (real_name
);
4852 ppc_change_csect (sym
, 2);
4854 demand_empty_rest_of_line ();
4857 /* The .extern pseudo-op. We create an undefined symbol. */
4860 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4865 if ((name
= read_symbol_name ()) == NULL
)
4868 sym
= symbol_find_or_make (name
);
4871 if (*input_line_pointer
== ',')
4873 unsigned short visibility
;
4874 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4876 input_line_pointer
++;
4877 visibility
= ppc_xcoff_get_visibility ();
4880 as_bad (_("Unknown visibility field in .extern"));
4881 ignore_rest_of_line ();
4885 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4886 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4889 demand_empty_rest_of_line ();
4892 /* XCOFF semantic for .globl says that the second parameter is
4893 the symbol visibility. */
4896 ppc_globl (int ignore ATTRIBUTE_UNUSED
)
4901 if ((name
= read_symbol_name ()) == NULL
)
4904 sym
= symbol_find_or_make (name
);
4906 S_SET_EXTERNAL (sym
);
4908 if (*input_line_pointer
== ',')
4910 unsigned short visibility
;
4911 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4913 input_line_pointer
++;
4914 visibility
= ppc_xcoff_get_visibility ();
4917 as_bad (_("Unknown visibility field in .globl"));
4918 ignore_rest_of_line ();
4922 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4923 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4926 demand_empty_rest_of_line ();
4929 /* XCOFF semantic for .weak says that the second parameter is
4930 the symbol visibility. */
4933 ppc_weak (int ignore ATTRIBUTE_UNUSED
)
4938 if ((name
= read_symbol_name ()) == NULL
)
4941 sym
= symbol_find_or_make (name
);
4945 if (*input_line_pointer
== ',')
4947 unsigned short visibility
;
4948 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4950 input_line_pointer
++;
4951 visibility
= ppc_xcoff_get_visibility ();
4954 as_bad (_("Unknown visibility field in .weak"));
4955 ignore_rest_of_line ();
4959 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4960 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4963 demand_empty_rest_of_line ();
4966 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4969 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4975 endc
= get_symbol_name (&name
);
4977 sym
= symbol_find_or_make (name
);
4979 (void) restore_line_pointer (endc
);
4981 symbol_get_tc (sym
)->output
= 1;
4983 demand_empty_rest_of_line ();
4986 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4987 relocations at the beginning of the current csect.
4989 (In principle, there's no reason why the relocations _have_ to be at
4990 the beginning. Anywhere in the csect would do. However, inserting
4991 at the beginning is what the native assembler does, and it helps to
4992 deal with cases where the .ref statements follow the section contents.)
4994 ??? .refs don't work for empty .csects. However, the native assembler
4995 doesn't report an error in this case, and neither yet do we. */
4998 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
5003 if (ppc_current_csect
== NULL
)
5005 as_bad (_(".ref outside .csect"));
5006 ignore_rest_of_line ();
5012 c
= get_symbol_name (&name
);
5014 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
5015 symbol_find_or_make (name
), 0, false, BFD_RELOC_NONE
);
5017 *input_line_pointer
= c
;
5018 SKIP_WHITESPACE_AFTER_NAME ();
5019 c
= *input_line_pointer
;
5022 input_line_pointer
++;
5024 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
5026 as_bad (_("missing symbol name"));
5027 ignore_rest_of_line ();
5034 demand_empty_rest_of_line ();
5037 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
5038 although I don't know why it bothers. */
5041 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
5048 endc
= get_symbol_name (&name
);
5050 sym
= symbol_find_or_make (name
);
5052 (void) restore_line_pointer (endc
);
5054 if (*input_line_pointer
!= ',')
5056 as_bad (_("missing rename string"));
5057 ignore_rest_of_line ();
5060 ++input_line_pointer
;
5062 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
5064 demand_empty_rest_of_line ();
5067 /* The .stabx pseudo-op. This is similar to a normal .stabs
5068 pseudo-op, but slightly different. A sample is
5069 .stabx "main:F-1",.main,142,0
5070 The first argument is the symbol name to create. The second is the
5071 value, and the third is the storage class. The fourth seems to be
5072 always zero, and I am assuming it is the type. */
5075 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
5082 name
= demand_copy_C_string (&len
);
5084 if (*input_line_pointer
!= ',')
5086 as_bad (_("missing value"));
5089 ++input_line_pointer
;
5091 ppc_stab_symbol
= true;
5092 sym
= symbol_make (name
);
5093 ppc_stab_symbol
= false;
5095 symbol_get_tc (sym
)->real_name
= name
;
5097 (void) expression (&exp
);
5104 as_bad (_("illegal .stabx expression; zero assumed"));
5105 exp
.X_add_number
= 0;
5108 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
5109 symbol_set_frag (sym
, &zero_address_frag
);
5113 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
5114 symbol_set_value_expression (sym
, &exp
);
5118 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
5119 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
5124 /* The value is some complex expression. This will probably
5125 fail at some later point, but this is probably the right
5126 thing to do here. */
5127 symbol_set_value_expression (sym
, &exp
);
5131 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5132 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5134 if (*input_line_pointer
!= ',')
5136 as_bad (_("missing class"));
5139 ++input_line_pointer
;
5141 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
5143 if (*input_line_pointer
!= ',')
5145 as_bad (_("missing type"));
5148 ++input_line_pointer
;
5150 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
5152 symbol_get_tc (sym
)->output
= 1;
5154 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
5159 .stabx "z",arrays_,133,0
5162 .comm arrays_,13768,3
5164 resolve_symbol_value will copy the exp's "within" into sym's when the
5165 offset is 0. Since this seems to be corner case problem,
5166 only do the correction for storage class C_STSYM. A better solution
5167 would be to have the tc field updated in ppc_symbol_new_hook. */
5169 if (exp
.X_op
== O_symbol
)
5171 if (ppc_current_block
== NULL
)
5172 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
5174 symbol_get_tc (sym
)->within
= ppc_current_block
;
5178 if (exp
.X_op
!= O_symbol
5179 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
5180 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
5181 ppc_frob_label (sym
);
5184 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5185 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
5186 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
5187 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5190 demand_empty_rest_of_line ();
5193 /* The .file pseudo-op. On XCOFF, .file can have several parameters
5194 which are being added to the symbol table to provide additional
5198 ppc_file (int ignore ATTRIBUTE_UNUSED
)
5200 char *sfname
, *s1
= NULL
, *s2
= NULL
, *s3
= NULL
;
5201 int length
, auxnb
= 1;
5203 /* Some assemblers tolerate immediately following '"'. */
5204 if ((sfname
= demand_copy_string (&length
)) != 0)
5206 coff_symbol_type
*coffsym
;
5207 if (*input_line_pointer
== ',')
5209 ++input_line_pointer
;
5210 s1
= demand_copy_string (&length
);
5213 if (*input_line_pointer
== ',')
5215 ++input_line_pointer
;
5216 s2
= demand_copy_string (&length
);
5219 if (*input_line_pointer
== ',')
5221 ++input_line_pointer
;
5222 s3
= demand_copy_string (&length
);
5228 /* Use coff dot_file creation and adjust auxiliary entries. */
5229 c_dot_file_symbol (sfname
);
5230 S_SET_NUMBER_AUXILIARY (symbol_rootP
, auxnb
);
5231 coffsym
= coffsymbol (symbol_get_bfdsym (symbol_rootP
));
5232 coffsym
->native
[1].u
.auxent
.x_file
.x_ftype
= XFT_FN
;
5236 coffsym
->native
[2].u
.auxent
.x_file
.x_ftype
= XFT_CT
;
5237 coffsym
->native
[2].extrap
= s1
;
5241 coffsym
->native
[3].u
.auxent
.x_file
.x_ftype
= XFT_CV
;
5242 coffsym
->native
[3].extrap
= s2
;
5246 coffsym
->native
[4].u
.auxent
.x_file
.x_ftype
= XFT_CD
;
5247 coffsym
->native
[4].extrap
= s3
;
5250 demand_empty_rest_of_line ();
5254 /* The .function pseudo-op. This takes several arguments. The first
5255 argument seems to be the external name of the symbol. The second
5256 argument seems to be the label for the start of the function. gcc
5257 uses the same name for both. I have no idea what the third and
5258 fourth arguments are meant to be. The optional fifth argument is
5259 an expression for the size of the function. In COFF this symbol
5260 gets an aux entry like that used for a csect. */
5263 ppc_function (int ignore ATTRIBUTE_UNUSED
)
5271 endc
= get_symbol_name (&name
);
5273 /* Ignore any [PR] suffix. */
5274 name
= ppc_canonicalize_symbol_name (name
);
5275 s
= strchr (name
, '[');
5276 if (s
!= (char *) NULL
5277 && strcmp (s
+ 1, "PR]") == 0)
5280 ext_sym
= symbol_find_or_make (name
);
5282 (void) restore_line_pointer (endc
);
5284 if (*input_line_pointer
!= ',')
5286 as_bad (_("missing symbol name"));
5287 ignore_rest_of_line ();
5290 ++input_line_pointer
;
5292 endc
= get_symbol_name (&name
);
5294 lab_sym
= symbol_find_or_make (name
);
5296 (void) restore_line_pointer (endc
);
5298 if (ext_sym
!= lab_sym
)
5302 exp
.X_op
= O_symbol
;
5303 exp
.X_add_symbol
= lab_sym
;
5304 exp
.X_op_symbol
= NULL
;
5305 exp
.X_add_number
= 0;
5307 symbol_set_value_expression (ext_sym
, &exp
);
5310 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5311 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5312 symbol_get_tc (ext_sym
)->output
= 1;
5314 if (*input_line_pointer
== ',')
5318 /* Ignore the third argument. */
5319 ++input_line_pointer
;
5321 if (*input_line_pointer
== ',')
5323 /* Ignore the fourth argument. */
5324 ++input_line_pointer
;
5326 if (*input_line_pointer
== ',')
5328 /* The fifth argument is the function size.
5329 If it's omitted, the size will be the containing csect.
5330 This will be donce during ppc_frob_symtab. */
5331 ++input_line_pointer
;
5332 symbol_get_tc (ext_sym
)->u
.size
5333 = symbol_new ("L0\001", absolute_section
,
5334 &zero_address_frag
, 0);
5335 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5340 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5341 SF_SET_FUNCTION (ext_sym
);
5342 SF_SET_PROCESS (ext_sym
);
5343 coff_add_linesym (ext_sym
);
5345 demand_empty_rest_of_line ();
5348 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5349 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5350 with the correct line number */
5352 static symbolS
*saved_bi_sym
= 0;
5355 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5359 sym
= symbol_make (".bf");
5360 S_SET_SEGMENT (sym
, text_section
);
5361 symbol_set_frag (sym
, frag_now
);
5362 S_SET_VALUE (sym
, frag_now_fix ());
5363 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5365 coff_line_base
= get_absolute_expression ();
5367 S_SET_NUMBER_AUXILIARY (sym
, 1);
5368 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5370 /* Line number for bi. */
5373 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5378 symbol_get_tc (sym
)->output
= 1;
5380 ppc_frob_label (sym
);
5382 demand_empty_rest_of_line ();
5385 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5386 ".ef", except that the line number is absolute, not relative to the
5387 most recent ".bf" symbol. */
5390 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5394 sym
= symbol_make (".ef");
5395 S_SET_SEGMENT (sym
, text_section
);
5396 symbol_set_frag (sym
, frag_now
);
5397 S_SET_VALUE (sym
, frag_now_fix ());
5398 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5399 S_SET_NUMBER_AUXILIARY (sym
, 1);
5400 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5401 symbol_get_tc (sym
)->output
= 1;
5403 ppc_frob_label (sym
);
5405 demand_empty_rest_of_line ();
5408 /* The .bi and .ei pseudo-ops. These take a string argument and
5409 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5410 the symbol list. The value of .bi will be know when the next .bf
5416 static symbolS
*last_biei
;
5423 name
= demand_copy_C_string (&len
);
5425 /* The value of these symbols is actually file offset. Here we set
5426 the value to the index into the line number entries. In
5427 ppc_frob_symbols we set the fix_line field, which will cause BFD
5428 to do the right thing. */
5430 sym
= symbol_make (name
);
5431 /* obj-coff.c currently only handles line numbers correctly in the
5433 S_SET_SEGMENT (sym
, text_section
);
5434 S_SET_VALUE (sym
, coff_n_line_nos
);
5435 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5437 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5438 symbol_get_tc (sym
)->output
= 1;
5446 for (look
= last_biei
? last_biei
: symbol_rootP
;
5447 (look
!= (symbolS
*) NULL
5448 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5449 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5450 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5451 look
= symbol_next (look
))
5453 if (look
!= (symbolS
*) NULL
)
5455 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5456 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5460 demand_empty_rest_of_line ();
5463 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5464 There is one argument, which is a csect symbol. The value of the
5465 .bs symbol is the index of this csect symbol. */
5468 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5475 if (ppc_current_block
!= NULL
)
5476 as_bad (_("nested .bs blocks"));
5478 endc
= get_symbol_name (&name
);
5480 csect
= symbol_find_or_make (name
);
5482 (void) restore_line_pointer (endc
);
5484 sym
= symbol_make (".bs");
5485 S_SET_SEGMENT (sym
, now_seg
);
5486 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5487 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5488 symbol_get_tc (sym
)->output
= 1;
5490 symbol_get_tc (sym
)->within
= csect
;
5492 ppc_frob_label (sym
);
5494 ppc_current_block
= sym
;
5496 demand_empty_rest_of_line ();
5499 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5502 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5506 if (ppc_current_block
== NULL
)
5507 as_bad (_(".es without preceding .bs"));
5509 sym
= symbol_make (".es");
5510 S_SET_SEGMENT (sym
, now_seg
);
5511 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5512 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5513 symbol_get_tc (sym
)->output
= 1;
5515 ppc_frob_label (sym
);
5517 ppc_current_block
= NULL
;
5519 demand_empty_rest_of_line ();
5522 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5526 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5530 sym
= symbol_make (".bb");
5531 S_SET_SEGMENT (sym
, text_section
);
5532 symbol_set_frag (sym
, frag_now
);
5533 S_SET_VALUE (sym
, frag_now_fix ());
5534 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5536 S_SET_NUMBER_AUXILIARY (sym
, 1);
5537 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5539 symbol_get_tc (sym
)->output
= 1;
5541 SF_SET_PROCESS (sym
);
5543 ppc_frob_label (sym
);
5545 demand_empty_rest_of_line ();
5548 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5552 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5556 sym
= symbol_make (".eb");
5557 S_SET_SEGMENT (sym
, text_section
);
5558 symbol_set_frag (sym
, frag_now
);
5559 S_SET_VALUE (sym
, frag_now_fix ());
5560 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5561 S_SET_NUMBER_AUXILIARY (sym
, 1);
5562 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5563 symbol_get_tc (sym
)->output
= 1;
5565 SF_SET_PROCESS (sym
);
5567 ppc_frob_label (sym
);
5569 demand_empty_rest_of_line ();
5572 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5576 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5582 name
= demand_copy_C_string (&len
);
5583 sym
= symbol_make (name
);
5584 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5585 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5586 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5587 S_SET_VALUE (sym
, 0);
5588 symbol_get_tc (sym
)->output
= 1;
5590 ppc_frob_label (sym
);
5592 demand_empty_rest_of_line ();
5595 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5598 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5602 sym
= symbol_make (".ec");
5603 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5604 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5605 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5606 S_SET_VALUE (sym
, 0);
5607 symbol_get_tc (sym
)->output
= 1;
5609 ppc_frob_label (sym
);
5611 demand_empty_rest_of_line ();
5614 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5617 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5619 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5620 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5627 subseg
= ppc_xcoff_data_section
.next_subsegment
;
5628 ++ppc_xcoff_data_section
.next_subsegment
;
5630 subseg_new (segment_name (data_section
), subseg
);
5631 ppc_toc_frag
= frag_now
;
5633 sym
= symbol_find_or_make ("TOC[TC0]");
5634 symbol_set_frag (sym
, frag_now
);
5635 S_SET_SEGMENT (sym
, data_section
);
5636 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5637 symbol_get_tc (sym
)->subseg
= subseg
;
5638 symbol_get_tc (sym
)->output
= 1;
5639 symbol_get_tc (sym
)->within
= sym
;
5641 ppc_toc_csect
= sym
;
5643 for (list
= ppc_xcoff_data_section
.csects
;
5644 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5645 list
= symbol_get_tc (list
)->next
)
5647 symbol_get_tc (list
)->next
= sym
;
5649 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5650 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5654 ppc_current_csect
= ppc_toc_csect
;
5656 demand_empty_rest_of_line ();
5659 /* The AIX assembler automatically aligns the operands of a .long or
5660 .short pseudo-op, and we want to be compatible. */
5663 ppc_xcoff_cons (int log_size
)
5665 frag_align (log_size
, 0, 0);
5666 record_alignment (now_seg
, log_size
);
5667 cons (1 << log_size
);
5671 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5676 (void) expression (&exp
);
5678 if (exp
.X_op
!= O_constant
)
5680 as_bad (_("non-constant byte count"));
5684 byte_count
= exp
.X_add_number
;
5686 if (*input_line_pointer
!= ',')
5688 as_bad (_("missing value"));
5692 ++input_line_pointer
;
5697 ppc_xcoff_md_finish (void)
5701 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5703 struct dw_section
*dws
= &dw_sections
[i
];
5704 struct dw_subsection
*dwss
;
5706 if (dws
->anon_subseg
)
5708 dwss
= dws
->anon_subseg
;
5709 dwss
->link
= dws
->list_subseg
;
5712 dwss
= dws
->list_subseg
;
5714 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5715 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5717 subseg_set (dws
->sect
, dwss
->subseg
);
5718 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5724 #endif /* OBJ_XCOFF */
5725 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5727 /* The .tc pseudo-op. This is used when generating either XCOFF or
5728 ELF. This takes two or more arguments.
5730 When generating XCOFF output, the first argument is the name to
5731 give to this location in the toc; this will be a symbol with class
5732 TC. The rest of the arguments are N-byte values to actually put at
5733 this location in the TOC; often there is just one more argument, a
5734 relocatable symbol reference. The size of the value to store
5735 depends on target word size. A 32-bit target uses 4-byte values, a
5736 64-bit target uses 8-byte values.
5738 When not generating XCOFF output, the arguments are the same, but
5739 the first argument is simply ignored. */
5742 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5746 /* Define the TOC symbol name. */
5752 if (ppc_toc_csect
== (symbolS
*) NULL
5753 || ppc_toc_csect
!= ppc_current_csect
)
5755 as_bad (_(".tc not in .toc section"));
5756 ignore_rest_of_line ();
5760 endc
= get_symbol_name (&name
);
5762 sym
= symbol_find_or_make (name
);
5764 (void) restore_line_pointer (endc
);
5766 if (S_IS_DEFINED (sym
))
5770 label
= symbol_get_tc (ppc_current_csect
)->within
;
5771 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5773 as_bad (_(".tc with no label"));
5774 ignore_rest_of_line ();
5778 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5779 symbol_set_frag (label
, symbol_get_frag (sym
));
5780 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5782 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5783 ++input_line_pointer
;
5788 S_SET_SEGMENT (sym
, now_seg
);
5789 symbol_set_frag (sym
, frag_now
);
5790 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5792 /* AIX assembler seems to allow any storage class to be set in .tc.
5793 But for now, only XMC_TC and XMC_TE are supported by us. */
5794 switch (symbol_get_tc (sym
)->symbol_class
)
5801 as_bad (_(".tc with storage class %d not yet supported"),
5802 symbol_get_tc (sym
)->symbol_class
);
5803 ignore_rest_of_line ();
5806 symbol_get_tc (sym
)->output
= 1;
5808 ppc_frob_label (sym
);
5811 #endif /* OBJ_XCOFF */
5815 /* Skip the TOC symbol name. */
5816 while (is_part_of_name (*input_line_pointer
)
5817 || *input_line_pointer
== ' '
5818 || *input_line_pointer
== '['
5819 || *input_line_pointer
== ']'
5820 || *input_line_pointer
== '{'
5821 || *input_line_pointer
== '}')
5822 ++input_line_pointer
;
5824 /* Align to a four/eight byte boundary. */
5825 align
= ppc_obj64
? 3 : 2;
5826 frag_align (align
, 0, 0);
5827 record_alignment (now_seg
, align
);
5828 #endif /* OBJ_ELF */
5830 if (*input_line_pointer
!= ',')
5831 demand_empty_rest_of_line ();
5834 ++input_line_pointer
;
5835 cons (ppc_obj64
? 8 : 4);
5839 /* Pseudo-op .machine. */
5842 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5846 #define MAX_HISTORY 100
5847 static ppc_cpu_t
*cpu_history
;
5848 static int curr_hist
;
5852 c
= get_symbol_name (&cpu_string
);
5853 cpu_string
= xstrdup (cpu_string
);
5854 (void) restore_line_pointer (c
);
5856 if (cpu_string
!= NULL
)
5858 ppc_cpu_t old_cpu
= ppc_cpu
;
5861 for (p
= cpu_string
; *p
!= 0; p
++)
5864 if (strcmp (cpu_string
, "push") == 0)
5866 if (cpu_history
== NULL
)
5867 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5869 if (curr_hist
>= MAX_HISTORY
)
5870 as_bad (_(".machine stack overflow"));
5872 cpu_history
[curr_hist
++] = ppc_cpu
;
5874 else if (strcmp (cpu_string
, "pop") == 0)
5877 as_bad (_(".machine stack underflow"));
5879 ppc_cpu
= cpu_history
[--curr_hist
];
5884 /* Not using the global "sticky" variable here results in
5885 none of the extra functional unit command line options,
5886 -many, -maltivec, -mspe, -mspe2, -mvle, -mvsx, being in
5887 force after selecting a new cpu with .machine.
5888 ".machine altivec" and other extra functional unit
5889 options do not count as a new machine, instead they add
5890 to currently selected opcodes. */
5891 ppc_cpu_t machine_sticky
= 0;
5892 /* Unfortunately, some versions of gcc emit a .machine
5893 directive very near the start of the compiler's assembly
5894 output file. This is bad because it overrides user -Wa
5895 cpu selection. Worse, there are versions of gcc that
5896 emit the *wrong* cpu, not even respecting the -mcpu given
5897 to gcc. See gcc pr101393. And to compound the problem,
5898 as of 20220222 gcc doesn't pass the correct cpu option to
5899 gas on the command line. See gcc pr59828. Hack around
5900 this by keeping sticky options for an early .machine. */
5902 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
5904 segment_info_type
*info
= seg_info (sec
);
5905 /* Are the frags for this section perturbed from their
5906 initial state? Even .align will count here. */
5908 && (info
->frchainP
->frch_root
!= info
->frchainP
->frch_last
5909 || info
->frchainP
->frch_root
->fr_type
!= rs_fill
5910 || info
->frchainP
->frch_root
->fr_fix
!= 0))
5913 new_cpu
= ppc_parse_cpu (ppc_cpu
,
5914 sec
== NULL
? &sticky
: &machine_sticky
,
5919 as_bad (_("invalid machine `%s'"), cpu_string
);
5922 if (ppc_cpu
!= old_cpu
)
5923 ppc_setup_opcodes ();
5926 demand_empty_rest_of_line ();
5928 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5932 /* XCOFF specific symbol and file handling. */
5934 /* Canonicalize the symbol name. We use the to force the suffix, if
5935 any, to use square brackets, and to be in upper case. */
5938 ppc_canonicalize_symbol_name (char *name
)
5942 if (ppc_stab_symbol
)
5945 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5959 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5962 if (*s
== '\0' || s
[1] != '\0')
5963 as_bad (_("bad symbol suffix"));
5971 /* Set the class of a symbol based on the suffix, if any. This is
5972 called whenever a new symbol is created. */
5975 ppc_symbol_new_hook (symbolS
*sym
)
5977 struct ppc_tc_sy
*tc
;
5980 tc
= symbol_get_tc (sym
);
5983 tc
->symbol_class
= -1;
5984 tc
->real_name
= NULL
;
5991 if (ppc_stab_symbol
)
5994 s
= strchr (S_GET_NAME (sym
), '[');
5995 if (s
== (const char *) NULL
)
5997 /* There is no suffix. */
6006 if (strcmp (s
, "BS]") == 0)
6007 tc
->symbol_class
= XMC_BS
;
6010 if (strcmp (s
, "DB]") == 0)
6011 tc
->symbol_class
= XMC_DB
;
6012 else if (strcmp (s
, "DS]") == 0)
6013 tc
->symbol_class
= XMC_DS
;
6016 if (strcmp (s
, "GL]") == 0)
6017 tc
->symbol_class
= XMC_GL
;
6020 if (strcmp (s
, "PR]") == 0)
6021 tc
->symbol_class
= XMC_PR
;
6024 if (strcmp (s
, "RO]") == 0)
6025 tc
->symbol_class
= XMC_RO
;
6026 else if (strcmp (s
, "RW]") == 0)
6027 tc
->symbol_class
= XMC_RW
;
6030 if (strcmp (s
, "SV]") == 0)
6031 tc
->symbol_class
= XMC_SV
;
6034 if (strcmp (s
, "TC]") == 0)
6035 tc
->symbol_class
= XMC_TC
;
6036 else if (strcmp (s
, "TI]") == 0)
6037 tc
->symbol_class
= XMC_TI
;
6038 else if (strcmp (s
, "TB]") == 0)
6039 tc
->symbol_class
= XMC_TB
;
6040 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6041 tc
->symbol_class
= XMC_TC0
;
6042 else if (strcmp (s
, "TE]") == 0)
6043 tc
->symbol_class
= XMC_TE
;
6044 else if (strcmp (s
, "TL]") == 0)
6045 tc
->symbol_class
= XMC_TL
;
6048 if (strcmp (s
, "UA]") == 0)
6049 tc
->symbol_class
= XMC_UA
;
6050 else if (strcmp (s
, "UC]") == 0)
6051 tc
->symbol_class
= XMC_UC
;
6052 else if (strcmp (s
, "UL]") == 0)
6053 tc
->symbol_class
= XMC_UL
;
6056 if (strcmp (s
, "XO]") == 0)
6057 tc
->symbol_class
= XMC_XO
;
6061 if (tc
->symbol_class
== -1)
6062 as_bad (_("unrecognized symbol suffix"));
6065 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6066 seen. It tells ppc_adjust_symtab whether it needs to look through
6069 static bool ppc_saw_abs
;
6071 /* Change the name of a symbol just before writing it out. Set the
6072 real name if the .rename pseudo-op was used. Otherwise, remove any
6073 class suffix. Return 1 if the symbol should not be included in the
6077 ppc_frob_symbol (symbolS
*sym
)
6079 static symbolS
*ppc_last_function
;
6080 static symbolS
*set_end
;
6082 /* Discard symbols that should not be included in the output symbol
6084 if (! symbol_used_in_reloc_p (sym
)
6085 && S_GET_STORAGE_CLASS (sym
) != C_DWARF
6086 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6087 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6088 && ! symbol_get_tc (sym
)->output
6089 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6092 /* This one will disappear anyway. Don't make a csect sym for it. */
6093 if (sym
== abs_section_sym
)
6096 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6097 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6103 name
= S_GET_NAME (sym
);
6104 s
= strchr (name
, '[');
6105 if (s
!= (char *) NULL
)
6111 snew
= xstrndup (name
, len
);
6113 S_SET_NAME (sym
, snew
);
6117 if (set_end
!= (symbolS
*) NULL
)
6119 SA_SET_SYM_ENDNDX (set_end
, sym
);
6123 if (SF_GET_FUNCTION (sym
))
6125 /* Make sure coff_last_function is reset. Otherwise, we won't create
6126 the auxent for the next function. */
6127 coff_last_function
= 0;
6128 ppc_last_function
= sym
;
6129 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6131 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6132 SA_SET_SYM_FSIZE (sym
,
6133 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6137 /* Size of containing csect. */
6138 symbolS
* within
= symbol_get_tc (sym
)->within
;
6139 union internal_auxent
*csectaux
;
6140 csectaux
= &coffsymbol (symbol_get_bfdsym (within
))
6141 ->native
[S_GET_NUMBER_AUXILIARY(within
)].u
.auxent
;
6143 SA_SET_SYM_FSIZE (sym
, csectaux
->x_csect
.x_scnlen
.l
);
6146 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6147 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6149 if (ppc_last_function
== (symbolS
*) NULL
)
6150 as_bad (_(".ef with no preceding .function"));
6153 set_end
= ppc_last_function
;
6154 ppc_last_function
= NULL
;
6156 /* We don't have a C_EFCN symbol, but we need to force the
6157 COFF backend to believe that it has seen one. */
6158 coff_last_function
= NULL
;
6162 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6163 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6164 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6165 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6166 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6167 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6168 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6169 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6170 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6171 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6172 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6174 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6175 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6176 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6179 union internal_auxent
*a
;
6181 /* Create a csect aux. */
6182 i
= S_GET_NUMBER_AUXILIARY (sym
);
6183 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6184 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6185 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6187 /* This is the TOC table. */
6188 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6189 a
->x_csect
.x_scnlen
.l
= 0;
6190 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6192 else if (symbol_get_tc (sym
)->subseg
!= 0)
6194 /* This is a csect symbol. x_scnlen is the size of the
6196 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6197 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (S_GET_SEGMENT (sym
))
6198 - S_GET_VALUE (sym
));
6201 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6202 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6203 - S_GET_VALUE (sym
));
6205 if (symbol_get_tc (sym
)->symbol_class
== XMC_BS
6206 || symbol_get_tc (sym
)->symbol_class
== XMC_UL
)
6207 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6209 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6211 else if (S_GET_SEGMENT (sym
) == bss_section
6212 || S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6214 /* This is a common symbol. */
6215 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6216 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6217 if (S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6218 symbol_get_tc (sym
)->symbol_class
= XMC_UL
;
6219 else if (S_IS_EXTERNAL (sym
))
6220 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6222 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6224 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6226 /* This is an absolute symbol. The csect will be created by
6227 ppc_adjust_symtab. */
6229 a
->x_csect
.x_smtyp
= XTY_LD
;
6230 if (symbol_get_tc (sym
)->symbol_class
== -1)
6231 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6233 else if (! S_IS_DEFINED (sym
))
6235 /* This is an external symbol. */
6236 a
->x_csect
.x_scnlen
.l
= 0;
6237 a
->x_csect
.x_smtyp
= XTY_ER
;
6239 else if (ppc_is_toc_sym (sym
))
6243 /* This is a TOC definition. x_scnlen is the size of the
6245 next
= symbol_next (sym
);
6246 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6247 next
= symbol_next (next
);
6248 if (next
== (symbolS
*) NULL
6249 || (!ppc_is_toc_sym (next
)))
6251 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6252 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (data_section
)
6253 - S_GET_VALUE (sym
));
6255 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6256 - S_GET_VALUE (sym
));
6260 resolve_symbol_value (next
);
6261 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6262 - S_GET_VALUE (sym
));
6264 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6270 /* This is a normal symbol definition. x_scnlen is the
6271 symbol index of the containing csect. */
6272 if (S_GET_SEGMENT (sym
) == text_section
)
6273 csect
= ppc_xcoff_text_section
.csects
;
6274 else if (S_GET_SEGMENT (sym
) == data_section
)
6275 csect
= ppc_xcoff_data_section
.csects
;
6276 else if (S_GET_SEGMENT (sym
) == ppc_xcoff_tdata_section
.segment
)
6277 csect
= ppc_xcoff_tdata_section
.csects
;
6281 /* Skip the initial dummy symbol. */
6282 csect
= symbol_get_tc (csect
)->next
;
6284 if (csect
== (symbolS
*) NULL
)
6286 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6287 a
->x_csect
.x_scnlen
.l
= 0;
6291 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6293 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6294 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6295 > S_GET_VALUE (sym
))
6297 csect
= symbol_get_tc (csect
)->next
;
6300 a
->x_csect
.x_scnlen
.p
=
6301 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6302 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6305 a
->x_csect
.x_smtyp
= XTY_LD
;
6308 a
->x_csect
.x_parmhash
= 0;
6309 a
->x_csect
.x_snhash
= 0;
6310 if (symbol_get_tc (sym
)->symbol_class
== -1)
6311 a
->x_csect
.x_smclas
= XMC_PR
;
6313 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6314 a
->x_csect
.x_stab
= 0;
6315 a
->x_csect
.x_snstab
= 0;
6317 /* Don't let the COFF backend resort these symbols. */
6318 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6320 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6322 /* We want the value to be the symbol index of the referenced
6323 csect symbol. BFD will do that for us if we set the right
6325 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6326 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6328 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6329 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6331 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6336 block
= symbol_get_tc (sym
)->within
;
6339 /* The value is the offset from the enclosing csect. */
6342 csect
= symbol_get_tc (block
)->within
;
6343 resolve_symbol_value (csect
);
6344 base
= S_GET_VALUE (csect
);
6349 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6351 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6352 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6354 /* We want the value to be a file offset into the line numbers.
6355 BFD will do that for us if we set the right flags. We have
6356 already set the value correctly. */
6357 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6363 /* Adjust the symbol table. */
6366 ppc_adjust_symtab (void)
6371 /* Make sure C_DWARF symbols come right after C_FILE.
6372 As the C_FILE might not be defined yet and as C_DWARF
6373 might already be ordered, we insert them before the
6374 first symbol which isn't a C_FILE or a C_DWARF. */
6375 for (anchorSym
= symbol_rootP
; anchorSym
!= NULL
;
6376 anchorSym
= symbol_next (anchorSym
))
6378 if (S_GET_STORAGE_CLASS (anchorSym
) != C_FILE
6379 && S_GET_STORAGE_CLASS (anchorSym
) != C_DWARF
)
6386 if (S_GET_STORAGE_CLASS (sym
) != C_DWARF
)
6388 sym
= symbol_next (sym
);
6392 symbolS
* tsym
= sym
;
6393 sym
= symbol_next (sym
);
6395 symbol_remove (tsym
, &symbol_rootP
, &symbol_lastP
);
6396 symbol_insert (tsym
, anchorSym
, &symbol_rootP
, &symbol_lastP
);
6399 /* Create csect symbols for all absolute symbols. */
6404 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6408 union internal_auxent
*a
;
6410 if (S_GET_SEGMENT (sym
) != absolute_section
)
6413 csect
= symbol_create (".abs[XO]", absolute_section
,
6414 &zero_address_frag
, S_GET_VALUE (sym
));
6415 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6416 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6417 i
= S_GET_NUMBER_AUXILIARY (csect
);
6418 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6419 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6420 a
->x_csect
.x_scnlen
.l
= 0;
6421 a
->x_csect
.x_smtyp
= XTY_SD
;
6422 a
->x_csect
.x_parmhash
= 0;
6423 a
->x_csect
.x_snhash
= 0;
6424 a
->x_csect
.x_smclas
= XMC_XO
;
6425 a
->x_csect
.x_stab
= 0;
6426 a
->x_csect
.x_snstab
= 0;
6428 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6430 i
= S_GET_NUMBER_AUXILIARY (sym
);
6431 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6432 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6433 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6436 ppc_saw_abs
= false;
6439 /* Set the VMA for a section. This is called on all the sections in
6443 ppc_frob_section (asection
*sec
)
6445 static bfd_vma vma
= 0;
6447 /* Dwarf sections start at 0. */
6448 if (bfd_section_flags (sec
) & SEC_DEBUGGING
)
6451 vma
= md_section_align (sec
, vma
);
6452 bfd_set_section_vma (sec
, vma
);
6453 vma
+= bfd_section_size (sec
);
6456 #endif /* OBJ_XCOFF */
6459 md_atof (int type
, char *litp
, int *sizep
)
6461 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6464 /* Write a value out to the object file, using the appropriate
6468 md_number_to_chars (char *buf
, valueT val
, int n
)
6470 if (target_big_endian
)
6471 number_to_chars_bigendian (buf
, val
, n
);
6473 number_to_chars_littleendian (buf
, val
, n
);
6476 /* Align a section (I don't know why this is machine dependent). */
6479 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6484 int align
= bfd_section_alignment (seg
);
6486 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6490 /* We don't have any form of relaxing. */
6493 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6494 asection
*seg ATTRIBUTE_UNUSED
)
6500 /* Convert a machine dependent frag. We never generate these. */
6503 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6504 asection
*sec ATTRIBUTE_UNUSED
,
6505 fragS
*fragp ATTRIBUTE_UNUSED
)
6510 /* We have no need to default values of symbols. */
6513 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6518 /* Functions concerning relocs. */
6520 /* The location from which a PC relative jump should be calculated,
6521 given a PC relative reloc. */
6524 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6526 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6531 /* Return the surrending csect for sym when possible. */
6534 ppc_get_csect_to_adjust (symbolS
*sym
)
6539 valueT val
= resolve_symbol_value (sym
);
6540 TC_SYMFIELD_TYPE
*tc
= symbol_get_tc (sym
);
6541 segT symseg
= S_GET_SEGMENT (sym
);
6544 && tc
->symbol_class
!= XMC_TC0
6545 && tc
->symbol_class
!= XMC_TC
6546 && tc
->symbol_class
!= XMC_TE
6547 && symseg
!= bss_section
6548 && symseg
!= ppc_xcoff_tbss_section
.segment
6549 /* Don't adjust if this is a reloc in the toc section. */
6550 && (symseg
!= data_section
6551 || ppc_toc_csect
== NULL
6552 || val
< ppc_toc_frag
->fr_address
6553 || (ppc_after_toc_frag
!= NULL
6554 && val
>= ppc_after_toc_frag
->fr_address
)))
6556 symbolS
* csect
= tc
->within
;
6558 /* If the symbol was not declared by a label (eg: a section symbol),
6559 use the section instead of the csect. This doesn't happen in
6560 normal AIX assembly code. */
6562 csect
= seg_info (symseg
)->sym
;
6570 /* This is called to see whether a fixup should be adjusted to use a
6571 section symbol. We take the opportunity to change a fixup against
6572 a symbol in the TOC subsegment into a reloc against the
6573 corresponding .tc symbol. */
6576 ppc_fix_adjustable (fixS
*fix
)
6578 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6579 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6582 if (symseg
== absolute_section
)
6585 /* Always adjust symbols in debugging sections. */
6586 if (bfd_section_flags (symseg
) & SEC_DEBUGGING
)
6589 if (ppc_toc_csect
!= (symbolS
*) NULL
6590 && fix
->fx_addsy
!= ppc_toc_csect
6591 && symseg
== data_section
6592 && val
>= ppc_toc_frag
->fr_address
6593 && (ppc_after_toc_frag
== (fragS
*) NULL
6594 || val
< ppc_after_toc_frag
->fr_address
))
6598 for (sy
= symbol_next (ppc_toc_csect
);
6599 sy
!= (symbolS
*) NULL
;
6600 sy
= symbol_next (sy
))
6602 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6604 if (sy_tc
->symbol_class
== XMC_TC0
)
6606 if (sy_tc
->symbol_class
!= XMC_TC
6607 && sy_tc
->symbol_class
!= XMC_TE
)
6609 if (val
== resolve_symbol_value (sy
))
6612 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6617 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6618 _("symbol in .toc does not match any .tc"));
6621 /* Possibly adjust the reloc to be against the csect. */
6622 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_addsy
)) != NULL
)
6624 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6625 fix
->fx_addsy
= csect
;
6628 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_subsy
)) != NULL
)
6630 fix
->fx_offset
-= resolve_symbol_value (fix
->fx_subsy
)
6631 - symbol_get_frag (csect
)->fr_address
;
6632 fix
->fx_subsy
= csect
;
6635 /* Adjust a reloc against a .lcomm symbol to be against the base
6637 if (symseg
== bss_section
6638 && ! S_IS_EXTERNAL (fix
->fx_addsy
)
6639 && symbol_get_tc (fix
->fx_addsy
)->subseg
== 0)
6641 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6643 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6650 /* A reloc from one csect to another must be kept. The assembler
6651 will, of course, keep relocs between sections, and it will keep
6652 absolute relocs, but we need to force it to keep PC relative relocs
6653 between two csects in the same section. */
6656 ppc_force_relocation (fixS
*fix
)
6658 /* At this point fix->fx_addsy should already have been converted to
6659 a csect symbol. If the csect does not include the fragment, then
6660 we need to force the relocation. */
6662 && fix
->fx_addsy
!= NULL
6663 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6664 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6665 > fix
->fx_frag
->fr_address
)
6666 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6667 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6668 <= fix
->fx_frag
->fr_address
))))
6671 return generic_force_reloc (fix
);
6673 #endif /* OBJ_XCOFF */
6676 /* If this function returns non-zero, it guarantees that a relocation
6677 will be emitted for a fixup. */
6680 ppc_force_relocation (fixS
*fix
)
6682 /* Branch prediction relocations must force a relocation, as must
6683 the vtable description relocs. */
6684 switch (fix
->fx_r_type
)
6686 case BFD_RELOC_PPC_B16_BRTAKEN
:
6687 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6688 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6689 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6690 case BFD_RELOC_24_PLT_PCREL
:
6691 case BFD_RELOC_PPC64_TOC
:
6693 case BFD_RELOC_PPC_B26
:
6694 case BFD_RELOC_PPC_BA26
:
6695 case BFD_RELOC_PPC_B16
:
6696 case BFD_RELOC_PPC_BA16
:
6697 case BFD_RELOC_PPC64_REL24_NOTOC
:
6698 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
6699 /* All branch fixups targeting a localentry symbol must
6700 force a relocation. */
6703 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6704 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6705 gas_assert (elfsym
);
6706 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6714 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6715 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
)
6718 return generic_force_reloc (fix
);
6722 ppc_fix_adjustable (fixS
*fix
)
6724 switch (fix
->fx_r_type
)
6726 /* All branch fixups targeting a localentry symbol must
6727 continue using the symbol. */
6728 case BFD_RELOC_PPC_B26
:
6729 case BFD_RELOC_PPC_BA26
:
6730 case BFD_RELOC_PPC_B16
:
6731 case BFD_RELOC_PPC_BA16
:
6732 case BFD_RELOC_PPC_B16_BRTAKEN
:
6733 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6734 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6735 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6736 case BFD_RELOC_PPC64_REL24_NOTOC
:
6737 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
6740 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6741 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6742 gas_assert (elfsym
);
6743 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6751 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6752 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6753 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6754 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6755 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6756 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6757 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
6758 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
6759 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
6760 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
6761 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
6762 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
6763 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
6764 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
6765 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
6766 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
6767 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
6768 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
6769 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
6770 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
6771 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
6772 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
6773 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
6774 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6775 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
6776 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
6777 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
6778 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6779 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6780 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6781 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
));
6786 ppc_frag_check (struct frag
*fragP
)
6788 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6789 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6790 _("instruction address is not a multiple of %d"),
6791 fragP
->insn_addr
+ 1);
6794 /* rs_align_code frag handling. */
6796 enum ppc_nop_encoding_for_rs_align_code
6805 ppc_nop_select (void)
6807 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
6809 if ((ppc_cpu
& (PPC_OPCODE_POWER9
| PPC_OPCODE_E500MC
)) == 0)
6811 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
6812 return PPC_NOP_GROUP_P7
;
6813 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0)
6814 return PPC_NOP_GROUP_P6
;
6816 return PPC_NOP_VANILLA
;
6820 ppc_handle_align (struct frag
*fragP
)
6822 valueT count
= (fragP
->fr_next
->fr_address
6823 - (fragP
->fr_address
+ fragP
->fr_fix
));
6824 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6825 enum ppc_nop_encoding_for_rs_align_code nop_select
= *dest
& 0xff;
6827 /* Pad with zeros if not inserting a whole number of instructions.
6828 We could pad with zeros up to an instruction boundary then follow
6829 with nops but odd counts indicate data in an executable section
6830 so padding with zeros is most appropriate. */
6832 || (nop_select
== PPC_NOP_VLE
? (count
& 1) != 0 : (count
& 3) != 0))
6838 if (nop_select
== PPC_NOP_VLE
)
6842 md_number_to_chars (dest
, 0x4400, 2);
6848 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6852 /* Make a branch, then follow with nops. Insert another
6853 frag to handle the nops. */
6854 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6859 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6860 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6861 fragP
->fr_next
= rest
;
6863 rest
->fr_address
+= rest
->fr_fix
+ 4;
6865 /* If we leave the next frag as rs_align_code we'll come here
6866 again, resulting in a bunch of branches rather than a
6867 branch followed by nops. */
6868 rest
->fr_type
= rs_align
;
6869 dest
= rest
->fr_literal
;
6872 md_number_to_chars (dest
, 0x60000000, 4);
6874 if (nop_select
>= PPC_NOP_GROUP_P6
)
6876 /* For power6, power7, and power8, we want the last nop to
6877 be a group terminating one. Do this by inserting an
6878 rs_fill frag immediately after this one, with its address
6879 set to the last nop location. This will automatically
6880 reduce the number of nops in the current frag by one. */
6883 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6885 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6886 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6887 group_nop
->fr_fix
= 0;
6888 group_nop
->fr_offset
= 1;
6889 group_nop
->fr_type
= rs_fill
;
6890 fragP
->fr_next
= group_nop
;
6891 dest
= group_nop
->fr_literal
;
6894 if (nop_select
== PPC_NOP_GROUP_P6
)
6895 /* power6 group terminating nop: "ori 1,1,0". */
6896 md_number_to_chars (dest
, 0x60210000, 4);
6898 /* power7/power8 group terminating nop: "ori 2,2,0". */
6899 md_number_to_chars (dest
, 0x60420000, 4);
6904 /* Apply a fixup to the object code. This is called for all the
6905 fixups we generated by the calls to fix_new_exp, above. */
6908 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6910 valueT value
= * valP
;
6912 const struct powerpc_operand
*operand
;
6915 if (fixP
->fx_addsy
!= NULL
)
6917 /* Hack around bfd_install_relocation brain damage. */
6919 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6921 if (fixP
->fx_addsy
== abs_section_sym
)
6927 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6928 the symbol values. If we are doing this relocation the code in
6929 write.c is going to call bfd_install_relocation, which is also
6930 going to use the symbol value. That means that if the reloc is
6931 fully resolved we want to use *valP since bfd_install_relocation is
6933 However, if the reloc is not fully resolved we do not want to
6934 use *valP, and must use fx_offset instead. If the relocation
6935 is PC-relative, we then need to re-apply md_pcrel_from_section
6936 to this new relocation value. */
6937 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6942 value
= fixP
->fx_offset
;
6944 value
-= md_pcrel_from_section (fixP
, seg
);
6948 /* We are only able to convert some relocs to pc-relative. */
6951 switch (fixP
->fx_r_type
)
6954 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6958 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6962 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6965 case BFD_RELOC_LO16
:
6966 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6969 case BFD_RELOC_HI16
:
6970 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6973 case BFD_RELOC_HI16_S
:
6974 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6977 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6978 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
6981 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6982 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
6985 case BFD_RELOC_PPC64_HIGHER
:
6986 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
6989 case BFD_RELOC_PPC64_HIGHER_S
:
6990 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
6993 case BFD_RELOC_PPC64_HIGHEST
:
6994 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
6997 case BFD_RELOC_PPC64_HIGHEST_S
:
6998 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
7001 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
7002 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
7005 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
7006 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
7009 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
7010 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
7013 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
7014 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
7017 case BFD_RELOC_PPC_16DX_HA
:
7018 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7021 case BFD_RELOC_PPC64_D34
:
7022 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
7025 case BFD_RELOC_PPC64_D28
:
7026 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
7033 else if (!fixP
->fx_done
7034 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
7036 /* addpcis is relative to next insn address. */
7038 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7043 if (fixP
->fx_pcrel_adjust
!= 0)
7045 /* This is a fixup on an instruction. */
7046 ppc_opindex_t opindex
= fixP
->fx_pcrel_adjust
& PPC_OPINDEX_MAX
;
7048 operand
= &powerpc_operands
[opindex
];
7050 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
7051 does not generate a reloc. It uses the offset of `sym' within its
7052 csect. Other usages, such as `.long sym', generate relocs. This
7053 is the documented behaviour of non-TOC symbols. */
7054 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
7055 && (operand
->bitm
& 0xfff0) == 0xfff0
7056 && operand
->shift
== 0
7057 && (operand
->insert
== NULL
|| ppc_obj64
)
7058 && fixP
->fx_addsy
!= NULL
7059 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
7060 && !ppc_is_toc_sym (fixP
->fx_addsy
)
7061 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
7063 value
= fixP
->fx_offset
;
7067 /* During parsing of instructions, a TOC16 reloc is generated for
7068 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7069 in the toc. But at parse time, SYM may be not yet defined, so
7070 check again here. */
7071 if (fixP
->fx_r_type
== BFD_RELOC_16
7072 && fixP
->fx_addsy
!= NULL
7073 && ppc_is_toc_sym (fixP
->fx_addsy
))
7074 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
7078 /* Calculate value to be stored in field. */
7080 switch (fixP
->fx_r_type
)
7083 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
7084 case BFD_RELOC_PPC_VLE_LO16A
:
7085 case BFD_RELOC_PPC_VLE_LO16D
:
7087 case BFD_RELOC_LO16
:
7088 case BFD_RELOC_LO16_PCREL
:
7089 fieldval
= value
& 0xffff;
7091 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7092 fieldval
= SEX16 (fieldval
);
7093 fixP
->fx_no_overflow
= 1;
7096 case BFD_RELOC_HI16
:
7097 case BFD_RELOC_HI16_PCREL
:
7099 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7101 fieldval
= value
>> 16;
7102 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7104 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7105 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7111 case BFD_RELOC_PPC_VLE_HI16A
:
7112 case BFD_RELOC_PPC_VLE_HI16D
:
7113 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7115 fieldval
= PPC_HI (value
);
7116 goto sign_extend_16
;
7118 case BFD_RELOC_HI16_S
:
7119 case BFD_RELOC_HI16_S_PCREL
:
7120 case BFD_RELOC_PPC_16DX_HA
:
7121 case BFD_RELOC_PPC_REL16DX_HA
:
7123 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7125 fieldval
= (value
+ 0x8000) >> 16;
7126 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7128 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7129 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7135 case BFD_RELOC_PPC_VLE_HA16A
:
7136 case BFD_RELOC_PPC_VLE_HA16D
:
7137 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7139 fieldval
= PPC_HA (value
);
7140 goto sign_extend_16
;
7143 case BFD_RELOC_PPC64_HIGHER
:
7144 fieldval
= PPC_HIGHER (value
);
7145 goto sign_extend_16
;
7147 case BFD_RELOC_PPC64_HIGHER_S
:
7148 fieldval
= PPC_HIGHERA (value
);
7149 goto sign_extend_16
;
7151 case BFD_RELOC_PPC64_HIGHEST
:
7152 fieldval
= PPC_HIGHEST (value
);
7153 goto sign_extend_16
;
7155 case BFD_RELOC_PPC64_HIGHEST_S
:
7156 fieldval
= PPC_HIGHESTA (value
);
7157 goto sign_extend_16
;
7164 if (operand
!= NULL
)
7166 /* Handle relocs in an insn. */
7167 switch (fixP
->fx_r_type
)
7170 /* The following relocs can't be calculated by the assembler.
7171 Leave the field zero. */
7172 case BFD_RELOC_PPC_TPREL16
:
7173 case BFD_RELOC_PPC_TPREL16_LO
:
7174 case BFD_RELOC_PPC_TPREL16_HI
:
7175 case BFD_RELOC_PPC_TPREL16_HA
:
7176 case BFD_RELOC_PPC_DTPREL16
:
7177 case BFD_RELOC_PPC_DTPREL16_LO
:
7178 case BFD_RELOC_PPC_DTPREL16_HI
:
7179 case BFD_RELOC_PPC_DTPREL16_HA
:
7180 case BFD_RELOC_PPC_GOT_TLSGD16
:
7181 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7182 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7183 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7184 case BFD_RELOC_PPC_GOT_TLSLD16
:
7185 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7186 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7187 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7188 case BFD_RELOC_PPC_GOT_TPREL16
:
7189 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7190 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7191 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7192 case BFD_RELOC_PPC_GOT_DTPREL16
:
7193 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7194 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7195 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7196 case BFD_RELOC_PPC64_TPREL16_DS
:
7197 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7198 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7199 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7200 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7201 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7202 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7203 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7204 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7205 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7206 case BFD_RELOC_PPC64_DTPREL16_DS
:
7207 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7208 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7209 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7210 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7211 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7212 case BFD_RELOC_PPC64_TPREL34
:
7213 case BFD_RELOC_PPC64_DTPREL34
:
7214 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
7215 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
7216 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
7217 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
7218 gas_assert (fixP
->fx_addsy
!= NULL
);
7219 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7223 /* These also should leave the field zero for the same
7224 reason. Note that older versions of gas wrote values
7225 here. If we want to go back to the old behaviour, then
7226 all _LO and _LO_DS cases will need to be treated like
7227 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7228 case BFD_RELOC_16_GOTOFF
:
7229 case BFD_RELOC_LO16_GOTOFF
:
7230 case BFD_RELOC_HI16_GOTOFF
:
7231 case BFD_RELOC_HI16_S_GOTOFF
:
7232 case BFD_RELOC_LO16_PLTOFF
:
7233 case BFD_RELOC_HI16_PLTOFF
:
7234 case BFD_RELOC_HI16_S_PLTOFF
:
7235 case BFD_RELOC_GPREL16
:
7236 case BFD_RELOC_16_BASEREL
:
7237 case BFD_RELOC_LO16_BASEREL
:
7238 case BFD_RELOC_HI16_BASEREL
:
7239 case BFD_RELOC_HI16_S_BASEREL
:
7240 case BFD_RELOC_PPC_TOC16
:
7241 case BFD_RELOC_PPC64_TOC16_LO
:
7242 case BFD_RELOC_PPC64_TOC16_HI
:
7243 case BFD_RELOC_PPC64_TOC16_HA
:
7244 case BFD_RELOC_PPC64_PLTGOT16
:
7245 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7246 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7247 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7248 case BFD_RELOC_PPC64_GOT16_DS
:
7249 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7250 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7251 case BFD_RELOC_PPC64_SECTOFF_DS
:
7252 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7253 case BFD_RELOC_PPC64_TOC16_DS
:
7254 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7255 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7256 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7257 case BFD_RELOC_PPC_EMB_NADDR16
:
7258 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7259 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7260 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7261 case BFD_RELOC_PPC_EMB_SDAI16
:
7262 case BFD_RELOC_PPC_EMB_SDA2I16
:
7263 case BFD_RELOC_PPC_EMB_SDA2REL
:
7264 case BFD_RELOC_PPC_EMB_SDA21
:
7265 case BFD_RELOC_PPC_EMB_MRKREF
:
7266 case BFD_RELOC_PPC_EMB_RELSEC16
:
7267 case BFD_RELOC_PPC_EMB_RELST_LO
:
7268 case BFD_RELOC_PPC_EMB_RELST_HI
:
7269 case BFD_RELOC_PPC_EMB_RELST_HA
:
7270 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7271 case BFD_RELOC_PPC_EMB_RELSDA
:
7272 case BFD_RELOC_PPC_VLE_SDA21
:
7273 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7274 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7275 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7276 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7277 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7278 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7279 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7280 case BFD_RELOC_PPC64_GOT_PCREL34
:
7281 case BFD_RELOC_PPC64_PLT_PCREL34
:
7282 gas_assert (fixP
->fx_addsy
!= NULL
);
7285 case BFD_RELOC_PPC_TLS
:
7286 case BFD_RELOC_PPC_TLSGD
:
7287 case BFD_RELOC_PPC_TLSLD
:
7288 case BFD_RELOC_PPC64_TLS_PCREL
:
7294 case BFD_RELOC_PPC_B16
:
7295 /* Adjust the offset to the instruction boundary. */
7300 case BFD_RELOC_VTABLE_INHERIT
:
7301 case BFD_RELOC_VTABLE_ENTRY
:
7302 case BFD_RELOC_PPC_DTPMOD
:
7303 case BFD_RELOC_PPC_TPREL
:
7304 case BFD_RELOC_PPC_DTPREL
:
7305 case BFD_RELOC_PPC_COPY
:
7306 case BFD_RELOC_PPC_GLOB_DAT
:
7307 case BFD_RELOC_32_PLT_PCREL
:
7308 case BFD_RELOC_PPC_EMB_NADDR32
:
7309 case BFD_RELOC_PPC64_TOC
:
7310 case BFD_RELOC_CTOR
:
7312 case BFD_RELOC_32_PCREL
:
7315 case BFD_RELOC_64_PCREL
:
7316 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7317 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7318 _("%s unsupported as instruction fixup"),
7319 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7328 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7329 contents can stay at zero. */
7330 #define APPLY_RELOC fixP->fx_done
7332 #define APPLY_RELOC 1
7334 /* We need to call the insert function even when fieldval is
7335 zero if the insert function would translate that zero to a
7336 bit pattern other than all zeros. */
7337 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7340 unsigned char *where
;
7342 /* Fetch the instruction, insert the fully resolved operand
7343 value, and stuff the instruction back again. */
7344 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7345 if (target_big_endian
)
7347 if (fixP
->fx_size
< 4)
7348 insn
= bfd_getb16 (where
);
7351 insn
= bfd_getb32 (where
);
7352 if (fixP
->fx_size
> 4)
7353 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
7358 if (fixP
->fx_size
< 4)
7359 insn
= bfd_getl16 (where
);
7362 insn
= bfd_getl32 (where
);
7363 if (fixP
->fx_size
> 4)
7364 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
7367 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7368 fixP
->tc_fix_data
.ppc_cpu
,
7369 fixP
->fx_file
, fixP
->fx_line
);
7370 if (target_big_endian
)
7372 if (fixP
->fx_size
< 4)
7373 bfd_putb16 (insn
, where
);
7376 if (fixP
->fx_size
> 4)
7378 bfd_putb32 (insn
, where
+ 4);
7381 bfd_putb32 (insn
, where
);
7386 if (fixP
->fx_size
< 4)
7387 bfd_putl16 (insn
, where
);
7390 if (fixP
->fx_size
> 4)
7392 bfd_putl32 (insn
, where
+ 4);
7395 bfd_putl32 (insn
, where
);
7401 /* Nothing else to do here. */
7404 gas_assert (fixP
->fx_addsy
!= NULL
);
7405 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7410 /* Use expr_symbol_where to see if this is an expression
7412 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7413 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7414 _("unresolved expression that must be resolved"));
7416 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7417 _("unsupported relocation against %s"),
7418 S_GET_NAME (fixP
->fx_addsy
));
7425 /* Handle relocs in data. */
7426 switch (fixP
->fx_r_type
)
7428 case BFD_RELOC_VTABLE_INHERIT
:
7430 && !S_IS_DEFINED (fixP
->fx_addsy
)
7431 && !S_IS_WEAK (fixP
->fx_addsy
))
7432 S_SET_WEAK (fixP
->fx_addsy
);
7435 case BFD_RELOC_VTABLE_ENTRY
:
7440 /* These can appear with @l etc. in data. */
7441 case BFD_RELOC_LO16
:
7442 case BFD_RELOC_LO16_PCREL
:
7443 case BFD_RELOC_HI16
:
7444 case BFD_RELOC_HI16_PCREL
:
7445 case BFD_RELOC_HI16_S
:
7446 case BFD_RELOC_HI16_S_PCREL
:
7447 case BFD_RELOC_PPC64_HIGHER
:
7448 case BFD_RELOC_PPC64_HIGHER_S
:
7449 case BFD_RELOC_PPC64_HIGHEST
:
7450 case BFD_RELOC_PPC64_HIGHEST_S
:
7451 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7452 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7453 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7456 case BFD_RELOC_PPC_DTPMOD
:
7457 case BFD_RELOC_PPC_TPREL
:
7458 case BFD_RELOC_PPC_DTPREL
:
7459 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7462 /* Just punt all of these to the linker. */
7463 case BFD_RELOC_PPC_B16_BRTAKEN
:
7464 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7465 case BFD_RELOC_16_GOTOFF
:
7466 case BFD_RELOC_LO16_GOTOFF
:
7467 case BFD_RELOC_HI16_GOTOFF
:
7468 case BFD_RELOC_HI16_S_GOTOFF
:
7469 case BFD_RELOC_LO16_PLTOFF
:
7470 case BFD_RELOC_HI16_PLTOFF
:
7471 case BFD_RELOC_HI16_S_PLTOFF
:
7472 case BFD_RELOC_PPC_COPY
:
7473 case BFD_RELOC_PPC_GLOB_DAT
:
7474 case BFD_RELOC_16_BASEREL
:
7475 case BFD_RELOC_LO16_BASEREL
:
7476 case BFD_RELOC_HI16_BASEREL
:
7477 case BFD_RELOC_HI16_S_BASEREL
:
7478 case BFD_RELOC_PPC_TLS
:
7479 case BFD_RELOC_PPC_DTPREL16_LO
:
7480 case BFD_RELOC_PPC_DTPREL16_HI
:
7481 case BFD_RELOC_PPC_DTPREL16_HA
:
7482 case BFD_RELOC_PPC_TPREL16_LO
:
7483 case BFD_RELOC_PPC_TPREL16_HI
:
7484 case BFD_RELOC_PPC_TPREL16_HA
:
7485 case BFD_RELOC_PPC_GOT_TLSGD16
:
7486 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7487 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7488 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7489 case BFD_RELOC_PPC_GOT_TLSLD16
:
7490 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7491 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7492 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7493 case BFD_RELOC_PPC_GOT_DTPREL16
:
7494 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7495 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7496 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7497 case BFD_RELOC_PPC_GOT_TPREL16
:
7498 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7499 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7500 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7501 case BFD_RELOC_24_PLT_PCREL
:
7502 case BFD_RELOC_PPC_LOCAL24PC
:
7503 case BFD_RELOC_32_PLT_PCREL
:
7504 case BFD_RELOC_GPREL16
:
7505 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7506 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7507 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7508 case BFD_RELOC_PPC_EMB_NADDR32
:
7509 case BFD_RELOC_PPC_EMB_NADDR16
:
7510 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7511 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7512 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7513 case BFD_RELOC_PPC_EMB_SDAI16
:
7514 case BFD_RELOC_PPC_EMB_SDA2REL
:
7515 case BFD_RELOC_PPC_EMB_SDA2I16
:
7516 case BFD_RELOC_PPC_EMB_SDA21
:
7517 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7518 case BFD_RELOC_PPC_EMB_MRKREF
:
7519 case BFD_RELOC_PPC_EMB_RELSEC16
:
7520 case BFD_RELOC_PPC_EMB_RELST_LO
:
7521 case BFD_RELOC_PPC_EMB_RELST_HI
:
7522 case BFD_RELOC_PPC_EMB_RELST_HA
:
7523 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7524 case BFD_RELOC_PPC_EMB_RELSDA
:
7525 case BFD_RELOC_PPC64_TOC
:
7526 case BFD_RELOC_PPC_TOC16
:
7527 case BFD_RELOC_PPC_TOC16_LO
:
7528 case BFD_RELOC_PPC_TOC16_HI
:
7529 case BFD_RELOC_PPC64_TOC16_LO
:
7530 case BFD_RELOC_PPC64_TOC16_HI
:
7531 case BFD_RELOC_PPC64_TOC16_HA
:
7532 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7533 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7534 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7535 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7536 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7537 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7538 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7539 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7540 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7541 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7542 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7543 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7544 case BFD_RELOC_PPC64_TLS_PCREL
:
7550 case BFD_RELOC_PPC_TLSGD
:
7551 case BFD_RELOC_PPC_TLSLD
:
7552 case BFD_RELOC_PPC_TLSLE
:
7553 case BFD_RELOC_PPC_TLSIE
:
7554 case BFD_RELOC_PPC_TLSM
:
7555 case BFD_RELOC_PPC64_TLSGD
:
7556 case BFD_RELOC_PPC64_TLSLD
:
7557 case BFD_RELOC_PPC64_TLSLE
:
7558 case BFD_RELOC_PPC64_TLSIE
:
7559 case BFD_RELOC_PPC64_TLSM
:
7560 gas_assert (fixP
->fx_addsy
!= NULL
);
7561 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7564 /* Officially, R_TLSML relocations must be from a TOC entry
7565 targeting itself. In practice, this TOC entry is always
7566 named (or .rename) "_$TLSML".
7567 Thus, as it doesn't seem possible to retrieve the symbol
7568 being relocated here, we simply check that the symbol
7569 targeted by R_TLSML is indeed a TOC entry named "_$TLSML".
7570 FIXME: Find a way to correctly check R_TLSML relocations
7571 as described above. */
7572 case BFD_RELOC_PPC_TLSML
:
7573 case BFD_RELOC_PPC64_TLSML
:
7574 gas_assert (fixP
->fx_addsy
!= NULL
);
7575 if ((symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
7576 || symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TE
)
7577 && strcmp (symbol_get_tc (fixP
->fx_addsy
)->real_name
, "_$TLSML") != 0)
7578 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7579 _("R_TLSML relocation doesn't target a "
7580 "TOC entry named \"_$TLSML\": %s"), S_GET_NAME(fixP
->fx_addsy
));
7584 case BFD_RELOC_NONE
:
7586 case BFD_RELOC_CTOR
:
7588 case BFD_RELOC_32_PCREL
:
7591 case BFD_RELOC_64_PCREL
:
7593 case BFD_RELOC_16_PCREL
:
7599 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7604 if (fixP
->fx_size
&& APPLY_RELOC
)
7605 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7606 fieldval
, fixP
->fx_size
);
7608 && (seg
->flags
& SEC_CODE
) != 0
7609 && fixP
->fx_size
== 4
7612 && (fixP
->fx_r_type
== BFD_RELOC_32
7613 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7614 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7615 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7616 _("data in executable section"));
7620 ppc_elf_validate_fix (fixP
, seg
);
7621 fixP
->fx_addnumber
= value
;
7623 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7624 from the section contents. If we are going to be emitting a reloc
7625 then the section contents are immaterial, so don't warn if they
7626 happen to overflow. Leave such warnings to ld. */
7629 fixP
->fx_no_overflow
= 1;
7631 /* Arrange to emit .TOC. as a normal symbol if used in anything
7632 but .TOC.@tocbase. */
7634 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7635 && fixP
->fx_addsy
!= NULL
7636 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7637 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7640 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16
7641 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
7642 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_LO
)
7644 /* We want to use the offset within the toc, not the actual VMA
7646 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7647 - S_GET_VALUE (ppc_toc_csect
));
7649 /* The high bits must be adjusted for the low bits being signed. */
7650 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
) {
7651 fixP
->fx_addnumber
+= 0x8000;
7654 /* Set *valP to avoid errors. */
7657 else if (fixP
->fx_r_type
== BFD_RELOC_PPC_TLSM
7658 || fixP
->fx_r_type
== BFD_RELOC_PPC64_TLSM
7659 || fixP
->fx_r_type
== BFD_RELOC_PPC_TLSML
7660 || fixP
->fx_r_type
== BFD_RELOC_PPC64_TLSML
)
7661 /* AIX ld expects the section contents for these relocations
7662 to be zero. Arrange for that to occur when
7663 bfd_install_relocation is called. */
7664 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7665 - S_GET_VALUE (fixP
->fx_addsy
)
7668 fixP
->fx_addnumber
= 0;
7672 /* Generate a reloc for a fixup. */
7675 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7677 static arelent
*relocs
[3];
7680 relocs
[0] = reloc
= XNEW (arelent
);
7683 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7684 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7685 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7686 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */
7687 if (fixp
->fx_r_type
== BFD_RELOC_PPC64_TLS_PCREL
)
7689 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7690 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7692 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7693 _("reloc %d not supported by object file format"),
7694 (int) fixp
->fx_r_type
);
7697 reloc
->addend
= fixp
->fx_addnumber
;
7699 if (fixp
->fx_subsy
!= NULL
)
7701 relocs
[1] = reloc
= XNEW (arelent
);
7704 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7705 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
7706 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7708 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_PPC_NEG
);
7709 reloc
->addend
= fixp
->fx_addnumber
;
7711 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7713 as_bad_subtract (fixp
);
7714 free (relocs
[1]->sym_ptr_ptr
);
7716 free (relocs
[0]->sym_ptr_ptr
);
7727 ppc_cfi_frame_initial_instructions (void)
7729 cfi_add_CFA_def_cfa (1, 0);
7733 tc_ppc_regname_to_dw2regnum (char *regname
)
7735 unsigned int regnum
= -1;
7739 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7741 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7742 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7743 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7744 { "spe_acc", 111 }, { "spefscr", 112 }
7747 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7748 if (strcmp (regnames
[i
].name
, regname
) == 0)
7749 return regnames
[i
].dw2regnum
;
7751 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7753 p
= regname
+ 1 + (regname
[1] == '.');
7754 regnum
= strtoul (p
, &q
, 10);
7755 if (p
== q
|| *q
|| regnum
>= 32)
7757 if (regname
[0] == 'f')
7759 else if (regname
[0] == 'v')
7762 else if (regname
[0] == 'c' && regname
[1] == 'r')
7764 p
= regname
+ 2 + (regname
[2] == '.');
7765 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7767 regnum
= p
[0] - '0' + 68;