1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2021 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
35 #include "coff/xcoff.h"
39 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
41 /* Tell the main code what the endianness is. */
42 extern int target_big_endian
;
44 /* Whether or not, we've set target_big_endian. */
45 static int set_target_endian
= 0;
47 /* Whether to use user friendly register names. */
48 #ifndef TARGET_REG_NAMES_P
49 #define TARGET_REG_NAMES_P false
52 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
55 /* #lo(value) denotes the least significant 16 bits of the indicated. */
56 #define PPC_LO(v) ((v) & 0xffff)
58 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
59 #define PPC_HI(v) (((v) >> 16) & 0xffff)
61 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
62 the indicated value, compensating for #lo() being treated as a
64 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
66 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
67 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
69 /* #highera(value) denotes bits 32 through 47 of the indicated value,
70 compensating for #lo() being treated as a signed number. */
71 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
73 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
74 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
76 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
77 compensating for #lo being treated as a signed number. */
78 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
80 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
82 /* For the time being on ppc64, don't report overflow on @h and @ha
83 applied to constants. */
84 #define REPORT_OVERFLOW_HI 0
86 static bool reg_names_p
= TARGET_REG_NAMES_P
;
88 static void ppc_macro (char *, const struct powerpc_macro
*);
89 static void ppc_byte (int);
91 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
92 static void ppc_tc (int);
93 static void ppc_machine (int);
97 static void ppc_comm (int);
98 static void ppc_bb (int);
99 static void ppc_bc (int);
100 static void ppc_bf (int);
101 static void ppc_biei (int);
102 static void ppc_bs (int);
103 static void ppc_eb (int);
104 static void ppc_ec (int);
105 static void ppc_ef (int);
106 static void ppc_es (int);
107 static void ppc_csect (int);
108 static void ppc_dwsect (int);
109 static void ppc_change_csect (symbolS
*, offsetT
);
110 static void ppc_file (int);
111 static void ppc_function (int);
112 static void ppc_extern (int);
113 static void ppc_lglobl (int);
114 static void ppc_ref (int);
115 static void ppc_section (int);
116 static void ppc_named_section (int);
117 static void ppc_stabx (int);
118 static void ppc_rename (int);
119 static void ppc_toc (int);
120 static void ppc_xcoff_cons (int);
121 static void ppc_vbyte (int);
125 static void ppc_elf_rdata (int);
126 static void ppc_elf_lcomm (int);
127 static void ppc_elf_localentry (int);
128 static void ppc_elf_abiversion (int);
129 static void ppc_elf_gnu_attribute (int);
132 /* Generic assembler global variables which must be defined by all
136 /* This string holds the chars that always start a comment. If the
137 pre-processor is disabled, these aren't very useful. The macro
138 tc_comment_chars points to this. We use this, rather than the
139 usual comment_chars, so that we can switch for Solaris conventions. */
140 static const char ppc_solaris_comment_chars
[] = "#!";
141 static const char ppc_eabi_comment_chars
[] = "#";
143 #ifdef TARGET_SOLARIS_COMMENT
144 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
146 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
149 const char comment_chars
[] = "#";
152 /* Characters which start a comment at the beginning of a line. */
153 const char line_comment_chars
[] = "#";
155 /* Characters which may be used to separate multiple commands on a
157 const char line_separator_chars
[] = ";";
159 /* Characters which are used to indicate an exponent in a floating
161 const char EXP_CHARS
[] = "eE";
163 /* Characters which mean that a number is a floating point constant,
165 const char FLT_CHARS
[] = "dD";
167 /* Anything that can start an operand needs to be mentioned here,
168 to stop the input scrubber eating whitespace. */
169 const char ppc_symbol_chars
[] = "%[";
171 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
172 int ppc_cie_data_alignment
;
174 /* The dwarf2 minimum instruction length. */
175 int ppc_dwarf2_line_min_insn_length
;
177 /* More than this number of nops in an alignment op gets a branch
179 unsigned long nop_limit
= 4;
181 /* The type of processor we are assembling for. This is one or more
182 of the PPC_OPCODE flags defined in opcode/ppc.h. */
183 ppc_cpu_t ppc_cpu
= 0;
184 ppc_cpu_t sticky
= 0;
186 /* Value for ELF e_flags EF_PPC64_ABI. */
187 unsigned int ppc_abiversion
= 0;
190 /* Flags set on encountering toc relocs. */
192 has_large_toc_reloc
= 1,
193 has_small_toc_reloc
= 2
197 /* Warn on emitting data to code sections. */
203 /* The target specific pseudo-ops which we support. */
205 const pseudo_typeS md_pseudo_table
[] =
207 /* Pseudo-ops which must be overridden. */
208 { "byte", ppc_byte
, 0 },
211 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
212 legitimately belong in the obj-*.c file. However, XCOFF is based
213 on COFF, and is only implemented for the RS/6000. We just use
214 obj-coff.c, and add what we need here. */
215 { "comm", ppc_comm
, 0 },
216 { "lcomm", ppc_comm
, 1 },
220 { "bi", ppc_biei
, 0 },
222 { "csect", ppc_csect
, 0 },
223 { "dwsect", ppc_dwsect
, 0 },
224 { "data", ppc_section
, 'd' },
228 { "ei", ppc_biei
, 1 },
230 { "extern", ppc_extern
, 0 },
231 { "file", ppc_file
, 0 },
232 { "function", ppc_function
, 0 },
233 { "lglobl", ppc_lglobl
, 0 },
234 { "ref", ppc_ref
, 0 },
235 { "rename", ppc_rename
, 0 },
236 { "section", ppc_named_section
, 0 },
237 { "stabx", ppc_stabx
, 0 },
238 { "text", ppc_section
, 't' },
239 { "toc", ppc_toc
, 0 },
240 { "long", ppc_xcoff_cons
, 2 },
241 { "llong", ppc_xcoff_cons
, 3 },
242 { "word", ppc_xcoff_cons
, 1 },
243 { "short", ppc_xcoff_cons
, 1 },
244 { "vbyte", ppc_vbyte
, 0 },
248 { "llong", cons
, 8 },
249 { "rdata", ppc_elf_rdata
, 0 },
250 { "rodata", ppc_elf_rdata
, 0 },
251 { "lcomm", ppc_elf_lcomm
, 0 },
252 { "localentry", ppc_elf_localentry
, 0 },
253 { "abiversion", ppc_elf_abiversion
, 0 },
254 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
257 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
259 { "machine", ppc_machine
, 0 },
266 /* Predefined register names if -mregnames (or default for Windows NT).
267 In general, there are lots of them, in an attempt to be compatible
268 with a number of other Windows NT assemblers. */
270 /* Structure to hold information about predefined registers. */
274 unsigned short value
;
275 unsigned short flags
;
278 /* List of registers that are pre-defined:
280 Each general register has predefined names of the form:
281 1. r<reg_num> which has the value <reg_num>.
282 2. r.<reg_num> which has the value <reg_num>.
284 Each floating point register has predefined names of the form:
285 1. f<reg_num> which has the value <reg_num>.
286 2. f.<reg_num> which has the value <reg_num>.
288 Each vector unit register has predefined names of the form:
289 1. v<reg_num> which has the value <reg_num>.
290 2. v.<reg_num> which has the value <reg_num>.
292 Each condition register has predefined names of the form:
293 1. cr<reg_num> which has the value <reg_num>.
294 2. cr.<reg_num> which has the value <reg_num>.
296 There are individual registers as well:
297 sp or r.sp has the value 1
298 rtoc or r.toc has the value 2
303 dsisr has the value 18
305 sdr1 has the value 25
306 srr0 has the value 26
307 srr1 has the value 27
309 The table is sorted. Suitable for searching by a binary search. */
311 static const struct pd_reg pre_defined_registers
[] =
313 /* VSX accumulators. */
314 { "a0", 0, PPC_OPERAND_ACC
},
315 { "a1", 1, PPC_OPERAND_ACC
},
316 { "a2", 2, PPC_OPERAND_ACC
},
317 { "a3", 3, PPC_OPERAND_ACC
},
318 { "a4", 4, PPC_OPERAND_ACC
},
319 { "a5", 5, PPC_OPERAND_ACC
},
320 { "a6", 6, PPC_OPERAND_ACC
},
321 { "a7", 7, PPC_OPERAND_ACC
},
323 /* Condition Registers */
324 { "cr.0", 0, PPC_OPERAND_CR_REG
},
325 { "cr.1", 1, PPC_OPERAND_CR_REG
},
326 { "cr.2", 2, PPC_OPERAND_CR_REG
},
327 { "cr.3", 3, PPC_OPERAND_CR_REG
},
328 { "cr.4", 4, PPC_OPERAND_CR_REG
},
329 { "cr.5", 5, PPC_OPERAND_CR_REG
},
330 { "cr.6", 6, PPC_OPERAND_CR_REG
},
331 { "cr.7", 7, PPC_OPERAND_CR_REG
},
333 { "cr0", 0, PPC_OPERAND_CR_REG
},
334 { "cr1", 1, PPC_OPERAND_CR_REG
},
335 { "cr2", 2, PPC_OPERAND_CR_REG
},
336 { "cr3", 3, PPC_OPERAND_CR_REG
},
337 { "cr4", 4, PPC_OPERAND_CR_REG
},
338 { "cr5", 5, PPC_OPERAND_CR_REG
},
339 { "cr6", 6, PPC_OPERAND_CR_REG
},
340 { "cr7", 7, PPC_OPERAND_CR_REG
},
342 { "ctr", 9, PPC_OPERAND_SPR
},
343 { "dar", 19, PPC_OPERAND_SPR
},
344 { "dec", 22, PPC_OPERAND_SPR
},
345 { "dsisr", 18, PPC_OPERAND_SPR
},
347 /* Floating point registers */
348 { "f.0", 0, PPC_OPERAND_FPR
},
349 { "f.1", 1, PPC_OPERAND_FPR
},
350 { "f.10", 10, PPC_OPERAND_FPR
},
351 { "f.11", 11, PPC_OPERAND_FPR
},
352 { "f.12", 12, PPC_OPERAND_FPR
},
353 { "f.13", 13, PPC_OPERAND_FPR
},
354 { "f.14", 14, PPC_OPERAND_FPR
},
355 { "f.15", 15, PPC_OPERAND_FPR
},
356 { "f.16", 16, PPC_OPERAND_FPR
},
357 { "f.17", 17, PPC_OPERAND_FPR
},
358 { "f.18", 18, PPC_OPERAND_FPR
},
359 { "f.19", 19, PPC_OPERAND_FPR
},
360 { "f.2", 2, PPC_OPERAND_FPR
},
361 { "f.20", 20, PPC_OPERAND_FPR
},
362 { "f.21", 21, PPC_OPERAND_FPR
},
363 { "f.22", 22, PPC_OPERAND_FPR
},
364 { "f.23", 23, PPC_OPERAND_FPR
},
365 { "f.24", 24, PPC_OPERAND_FPR
},
366 { "f.25", 25, PPC_OPERAND_FPR
},
367 { "f.26", 26, PPC_OPERAND_FPR
},
368 { "f.27", 27, PPC_OPERAND_FPR
},
369 { "f.28", 28, PPC_OPERAND_FPR
},
370 { "f.29", 29, PPC_OPERAND_FPR
},
371 { "f.3", 3, PPC_OPERAND_FPR
},
372 { "f.30", 30, PPC_OPERAND_FPR
},
373 { "f.31", 31, PPC_OPERAND_FPR
},
374 { "f.32", 32, PPC_OPERAND_VSR
},
375 { "f.33", 33, PPC_OPERAND_VSR
},
376 { "f.34", 34, PPC_OPERAND_VSR
},
377 { "f.35", 35, PPC_OPERAND_VSR
},
378 { "f.36", 36, PPC_OPERAND_VSR
},
379 { "f.37", 37, PPC_OPERAND_VSR
},
380 { "f.38", 38, PPC_OPERAND_VSR
},
381 { "f.39", 39, PPC_OPERAND_VSR
},
382 { "f.4", 4, PPC_OPERAND_FPR
},
383 { "f.40", 40, PPC_OPERAND_VSR
},
384 { "f.41", 41, PPC_OPERAND_VSR
},
385 { "f.42", 42, PPC_OPERAND_VSR
},
386 { "f.43", 43, PPC_OPERAND_VSR
},
387 { "f.44", 44, PPC_OPERAND_VSR
},
388 { "f.45", 45, PPC_OPERAND_VSR
},
389 { "f.46", 46, PPC_OPERAND_VSR
},
390 { "f.47", 47, PPC_OPERAND_VSR
},
391 { "f.48", 48, PPC_OPERAND_VSR
},
392 { "f.49", 49, PPC_OPERAND_VSR
},
393 { "f.5", 5, PPC_OPERAND_FPR
},
394 { "f.50", 50, PPC_OPERAND_VSR
},
395 { "f.51", 51, PPC_OPERAND_VSR
},
396 { "f.52", 52, PPC_OPERAND_VSR
},
397 { "f.53", 53, PPC_OPERAND_VSR
},
398 { "f.54", 54, PPC_OPERAND_VSR
},
399 { "f.55", 55, PPC_OPERAND_VSR
},
400 { "f.56", 56, PPC_OPERAND_VSR
},
401 { "f.57", 57, PPC_OPERAND_VSR
},
402 { "f.58", 58, PPC_OPERAND_VSR
},
403 { "f.59", 59, PPC_OPERAND_VSR
},
404 { "f.6", 6, PPC_OPERAND_FPR
},
405 { "f.60", 60, PPC_OPERAND_VSR
},
406 { "f.61", 61, PPC_OPERAND_VSR
},
407 { "f.62", 62, PPC_OPERAND_VSR
},
408 { "f.63", 63, PPC_OPERAND_VSR
},
409 { "f.7", 7, PPC_OPERAND_FPR
},
410 { "f.8", 8, PPC_OPERAND_FPR
},
411 { "f.9", 9, PPC_OPERAND_FPR
},
413 { "f0", 0, PPC_OPERAND_FPR
},
414 { "f1", 1, PPC_OPERAND_FPR
},
415 { "f10", 10, PPC_OPERAND_FPR
},
416 { "f11", 11, PPC_OPERAND_FPR
},
417 { "f12", 12, PPC_OPERAND_FPR
},
418 { "f13", 13, PPC_OPERAND_FPR
},
419 { "f14", 14, PPC_OPERAND_FPR
},
420 { "f15", 15, PPC_OPERAND_FPR
},
421 { "f16", 16, PPC_OPERAND_FPR
},
422 { "f17", 17, PPC_OPERAND_FPR
},
423 { "f18", 18, PPC_OPERAND_FPR
},
424 { "f19", 19, PPC_OPERAND_FPR
},
425 { "f2", 2, PPC_OPERAND_FPR
},
426 { "f20", 20, PPC_OPERAND_FPR
},
427 { "f21", 21, PPC_OPERAND_FPR
},
428 { "f22", 22, PPC_OPERAND_FPR
},
429 { "f23", 23, PPC_OPERAND_FPR
},
430 { "f24", 24, PPC_OPERAND_FPR
},
431 { "f25", 25, PPC_OPERAND_FPR
},
432 { "f26", 26, PPC_OPERAND_FPR
},
433 { "f27", 27, PPC_OPERAND_FPR
},
434 { "f28", 28, PPC_OPERAND_FPR
},
435 { "f29", 29, PPC_OPERAND_FPR
},
436 { "f3", 3, PPC_OPERAND_FPR
},
437 { "f30", 30, PPC_OPERAND_FPR
},
438 { "f31", 31, PPC_OPERAND_FPR
},
439 { "f32", 32, PPC_OPERAND_VSR
},
440 { "f33", 33, PPC_OPERAND_VSR
},
441 { "f34", 34, PPC_OPERAND_VSR
},
442 { "f35", 35, PPC_OPERAND_VSR
},
443 { "f36", 36, PPC_OPERAND_VSR
},
444 { "f37", 37, PPC_OPERAND_VSR
},
445 { "f38", 38, PPC_OPERAND_VSR
},
446 { "f39", 39, PPC_OPERAND_VSR
},
447 { "f4", 4, PPC_OPERAND_FPR
},
448 { "f40", 40, PPC_OPERAND_VSR
},
449 { "f41", 41, PPC_OPERAND_VSR
},
450 { "f42", 42, PPC_OPERAND_VSR
},
451 { "f43", 43, PPC_OPERAND_VSR
},
452 { "f44", 44, PPC_OPERAND_VSR
},
453 { "f45", 45, PPC_OPERAND_VSR
},
454 { "f46", 46, PPC_OPERAND_VSR
},
455 { "f47", 47, PPC_OPERAND_VSR
},
456 { "f48", 48, PPC_OPERAND_VSR
},
457 { "f49", 49, PPC_OPERAND_VSR
},
458 { "f5", 5, PPC_OPERAND_FPR
},
459 { "f50", 50, PPC_OPERAND_VSR
},
460 { "f51", 51, PPC_OPERAND_VSR
},
461 { "f52", 52, PPC_OPERAND_VSR
},
462 { "f53", 53, PPC_OPERAND_VSR
},
463 { "f54", 54, PPC_OPERAND_VSR
},
464 { "f55", 55, PPC_OPERAND_VSR
},
465 { "f56", 56, PPC_OPERAND_VSR
},
466 { "f57", 57, PPC_OPERAND_VSR
},
467 { "f58", 58, PPC_OPERAND_VSR
},
468 { "f59", 59, PPC_OPERAND_VSR
},
469 { "f6", 6, PPC_OPERAND_FPR
},
470 { "f60", 60, PPC_OPERAND_VSR
},
471 { "f61", 61, PPC_OPERAND_VSR
},
472 { "f62", 62, PPC_OPERAND_VSR
},
473 { "f63", 63, PPC_OPERAND_VSR
},
474 { "f7", 7, PPC_OPERAND_FPR
},
475 { "f8", 8, PPC_OPERAND_FPR
},
476 { "f9", 9, PPC_OPERAND_FPR
},
478 /* Quantization registers used with pair single instructions. */
479 { "gqr.0", 0, PPC_OPERAND_GQR
},
480 { "gqr.1", 1, PPC_OPERAND_GQR
},
481 { "gqr.2", 2, PPC_OPERAND_GQR
},
482 { "gqr.3", 3, PPC_OPERAND_GQR
},
483 { "gqr.4", 4, PPC_OPERAND_GQR
},
484 { "gqr.5", 5, PPC_OPERAND_GQR
},
485 { "gqr.6", 6, PPC_OPERAND_GQR
},
486 { "gqr.7", 7, PPC_OPERAND_GQR
},
487 { "gqr0", 0, PPC_OPERAND_GQR
},
488 { "gqr1", 1, PPC_OPERAND_GQR
},
489 { "gqr2", 2, PPC_OPERAND_GQR
},
490 { "gqr3", 3, PPC_OPERAND_GQR
},
491 { "gqr4", 4, PPC_OPERAND_GQR
},
492 { "gqr5", 5, PPC_OPERAND_GQR
},
493 { "gqr6", 6, PPC_OPERAND_GQR
},
494 { "gqr7", 7, PPC_OPERAND_GQR
},
496 { "lr", 8, PPC_OPERAND_SPR
},
498 /* General Purpose Registers */
499 { "r.0", 0, PPC_OPERAND_GPR
},
500 { "r.1", 1, PPC_OPERAND_GPR
},
501 { "r.10", 10, PPC_OPERAND_GPR
},
502 { "r.11", 11, PPC_OPERAND_GPR
},
503 { "r.12", 12, PPC_OPERAND_GPR
},
504 { "r.13", 13, PPC_OPERAND_GPR
},
505 { "r.14", 14, PPC_OPERAND_GPR
},
506 { "r.15", 15, PPC_OPERAND_GPR
},
507 { "r.16", 16, PPC_OPERAND_GPR
},
508 { "r.17", 17, PPC_OPERAND_GPR
},
509 { "r.18", 18, PPC_OPERAND_GPR
},
510 { "r.19", 19, PPC_OPERAND_GPR
},
511 { "r.2", 2, PPC_OPERAND_GPR
},
512 { "r.20", 20, PPC_OPERAND_GPR
},
513 { "r.21", 21, PPC_OPERAND_GPR
},
514 { "r.22", 22, PPC_OPERAND_GPR
},
515 { "r.23", 23, PPC_OPERAND_GPR
},
516 { "r.24", 24, PPC_OPERAND_GPR
},
517 { "r.25", 25, PPC_OPERAND_GPR
},
518 { "r.26", 26, PPC_OPERAND_GPR
},
519 { "r.27", 27, PPC_OPERAND_GPR
},
520 { "r.28", 28, PPC_OPERAND_GPR
},
521 { "r.29", 29, PPC_OPERAND_GPR
},
522 { "r.3", 3, PPC_OPERAND_GPR
},
523 { "r.30", 30, PPC_OPERAND_GPR
},
524 { "r.31", 31, PPC_OPERAND_GPR
},
525 { "r.4", 4, PPC_OPERAND_GPR
},
526 { "r.5", 5, PPC_OPERAND_GPR
},
527 { "r.6", 6, PPC_OPERAND_GPR
},
528 { "r.7", 7, PPC_OPERAND_GPR
},
529 { "r.8", 8, PPC_OPERAND_GPR
},
530 { "r.9", 9, PPC_OPERAND_GPR
},
532 { "r.sp", 1, PPC_OPERAND_GPR
},
534 { "r.toc", 2, PPC_OPERAND_GPR
},
536 { "r0", 0, PPC_OPERAND_GPR
},
537 { "r1", 1, PPC_OPERAND_GPR
},
538 { "r10", 10, PPC_OPERAND_GPR
},
539 { "r11", 11, PPC_OPERAND_GPR
},
540 { "r12", 12, PPC_OPERAND_GPR
},
541 { "r13", 13, PPC_OPERAND_GPR
},
542 { "r14", 14, PPC_OPERAND_GPR
},
543 { "r15", 15, PPC_OPERAND_GPR
},
544 { "r16", 16, PPC_OPERAND_GPR
},
545 { "r17", 17, PPC_OPERAND_GPR
},
546 { "r18", 18, PPC_OPERAND_GPR
},
547 { "r19", 19, PPC_OPERAND_GPR
},
548 { "r2", 2, PPC_OPERAND_GPR
},
549 { "r20", 20, PPC_OPERAND_GPR
},
550 { "r21", 21, PPC_OPERAND_GPR
},
551 { "r22", 22, PPC_OPERAND_GPR
},
552 { "r23", 23, PPC_OPERAND_GPR
},
553 { "r24", 24, PPC_OPERAND_GPR
},
554 { "r25", 25, PPC_OPERAND_GPR
},
555 { "r26", 26, PPC_OPERAND_GPR
},
556 { "r27", 27, PPC_OPERAND_GPR
},
557 { "r28", 28, PPC_OPERAND_GPR
},
558 { "r29", 29, PPC_OPERAND_GPR
},
559 { "r3", 3, PPC_OPERAND_GPR
},
560 { "r30", 30, PPC_OPERAND_GPR
},
561 { "r31", 31, PPC_OPERAND_GPR
},
562 { "r4", 4, PPC_OPERAND_GPR
},
563 { "r5", 5, PPC_OPERAND_GPR
},
564 { "r6", 6, PPC_OPERAND_GPR
},
565 { "r7", 7, PPC_OPERAND_GPR
},
566 { "r8", 8, PPC_OPERAND_GPR
},
567 { "r9", 9, PPC_OPERAND_GPR
},
569 { "rtoc", 2, PPC_OPERAND_GPR
},
571 { "sdr1", 25, PPC_OPERAND_SPR
},
573 { "sp", 1, PPC_OPERAND_GPR
},
575 { "srr0", 26, PPC_OPERAND_SPR
},
576 { "srr1", 27, PPC_OPERAND_SPR
},
578 /* Vector (Altivec/VMX) registers */
579 { "v.0", 0, PPC_OPERAND_VR
},
580 { "v.1", 1, PPC_OPERAND_VR
},
581 { "v.10", 10, PPC_OPERAND_VR
},
582 { "v.11", 11, PPC_OPERAND_VR
},
583 { "v.12", 12, PPC_OPERAND_VR
},
584 { "v.13", 13, PPC_OPERAND_VR
},
585 { "v.14", 14, PPC_OPERAND_VR
},
586 { "v.15", 15, PPC_OPERAND_VR
},
587 { "v.16", 16, PPC_OPERAND_VR
},
588 { "v.17", 17, PPC_OPERAND_VR
},
589 { "v.18", 18, PPC_OPERAND_VR
},
590 { "v.19", 19, PPC_OPERAND_VR
},
591 { "v.2", 2, PPC_OPERAND_VR
},
592 { "v.20", 20, PPC_OPERAND_VR
},
593 { "v.21", 21, PPC_OPERAND_VR
},
594 { "v.22", 22, PPC_OPERAND_VR
},
595 { "v.23", 23, PPC_OPERAND_VR
},
596 { "v.24", 24, PPC_OPERAND_VR
},
597 { "v.25", 25, PPC_OPERAND_VR
},
598 { "v.26", 26, PPC_OPERAND_VR
},
599 { "v.27", 27, PPC_OPERAND_VR
},
600 { "v.28", 28, PPC_OPERAND_VR
},
601 { "v.29", 29, PPC_OPERAND_VR
},
602 { "v.3", 3, PPC_OPERAND_VR
},
603 { "v.30", 30, PPC_OPERAND_VR
},
604 { "v.31", 31, PPC_OPERAND_VR
},
605 { "v.4", 4, PPC_OPERAND_VR
},
606 { "v.5", 5, PPC_OPERAND_VR
},
607 { "v.6", 6, PPC_OPERAND_VR
},
608 { "v.7", 7, PPC_OPERAND_VR
},
609 { "v.8", 8, PPC_OPERAND_VR
},
610 { "v.9", 9, PPC_OPERAND_VR
},
612 { "v0", 0, PPC_OPERAND_VR
},
613 { "v1", 1, PPC_OPERAND_VR
},
614 { "v10", 10, PPC_OPERAND_VR
},
615 { "v11", 11, PPC_OPERAND_VR
},
616 { "v12", 12, PPC_OPERAND_VR
},
617 { "v13", 13, PPC_OPERAND_VR
},
618 { "v14", 14, PPC_OPERAND_VR
},
619 { "v15", 15, PPC_OPERAND_VR
},
620 { "v16", 16, PPC_OPERAND_VR
},
621 { "v17", 17, PPC_OPERAND_VR
},
622 { "v18", 18, PPC_OPERAND_VR
},
623 { "v19", 19, PPC_OPERAND_VR
},
624 { "v2", 2, PPC_OPERAND_VR
},
625 { "v20", 20, PPC_OPERAND_VR
},
626 { "v21", 21, PPC_OPERAND_VR
},
627 { "v22", 22, PPC_OPERAND_VR
},
628 { "v23", 23, PPC_OPERAND_VR
},
629 { "v24", 24, PPC_OPERAND_VR
},
630 { "v25", 25, PPC_OPERAND_VR
},
631 { "v26", 26, PPC_OPERAND_VR
},
632 { "v27", 27, PPC_OPERAND_VR
},
633 { "v28", 28, PPC_OPERAND_VR
},
634 { "v29", 29, PPC_OPERAND_VR
},
635 { "v3", 3, PPC_OPERAND_VR
},
636 { "v30", 30, PPC_OPERAND_VR
},
637 { "v31", 31, PPC_OPERAND_VR
},
638 { "v4", 4, PPC_OPERAND_VR
},
639 { "v5", 5, PPC_OPERAND_VR
},
640 { "v6", 6, PPC_OPERAND_VR
},
641 { "v7", 7, PPC_OPERAND_VR
},
642 { "v8", 8, PPC_OPERAND_VR
},
643 { "v9", 9, PPC_OPERAND_VR
},
645 /* Vector Scalar (VSX) registers (ISA 2.06). */
646 { "vs.0", 0, PPC_OPERAND_VSR
},
647 { "vs.1", 1, PPC_OPERAND_VSR
},
648 { "vs.10", 10, PPC_OPERAND_VSR
},
649 { "vs.11", 11, PPC_OPERAND_VSR
},
650 { "vs.12", 12, PPC_OPERAND_VSR
},
651 { "vs.13", 13, PPC_OPERAND_VSR
},
652 { "vs.14", 14, PPC_OPERAND_VSR
},
653 { "vs.15", 15, PPC_OPERAND_VSR
},
654 { "vs.16", 16, PPC_OPERAND_VSR
},
655 { "vs.17", 17, PPC_OPERAND_VSR
},
656 { "vs.18", 18, PPC_OPERAND_VSR
},
657 { "vs.19", 19, PPC_OPERAND_VSR
},
658 { "vs.2", 2, PPC_OPERAND_VSR
},
659 { "vs.20", 20, PPC_OPERAND_VSR
},
660 { "vs.21", 21, PPC_OPERAND_VSR
},
661 { "vs.22", 22, PPC_OPERAND_VSR
},
662 { "vs.23", 23, PPC_OPERAND_VSR
},
663 { "vs.24", 24, PPC_OPERAND_VSR
},
664 { "vs.25", 25, PPC_OPERAND_VSR
},
665 { "vs.26", 26, PPC_OPERAND_VSR
},
666 { "vs.27", 27, PPC_OPERAND_VSR
},
667 { "vs.28", 28, PPC_OPERAND_VSR
},
668 { "vs.29", 29, PPC_OPERAND_VSR
},
669 { "vs.3", 3, PPC_OPERAND_VSR
},
670 { "vs.30", 30, PPC_OPERAND_VSR
},
671 { "vs.31", 31, PPC_OPERAND_VSR
},
672 { "vs.32", 32, PPC_OPERAND_VSR
},
673 { "vs.33", 33, PPC_OPERAND_VSR
},
674 { "vs.34", 34, PPC_OPERAND_VSR
},
675 { "vs.35", 35, PPC_OPERAND_VSR
},
676 { "vs.36", 36, PPC_OPERAND_VSR
},
677 { "vs.37", 37, PPC_OPERAND_VSR
},
678 { "vs.38", 38, PPC_OPERAND_VSR
},
679 { "vs.39", 39, PPC_OPERAND_VSR
},
680 { "vs.4", 4, PPC_OPERAND_VSR
},
681 { "vs.40", 40, PPC_OPERAND_VSR
},
682 { "vs.41", 41, PPC_OPERAND_VSR
},
683 { "vs.42", 42, PPC_OPERAND_VSR
},
684 { "vs.43", 43, PPC_OPERAND_VSR
},
685 { "vs.44", 44, PPC_OPERAND_VSR
},
686 { "vs.45", 45, PPC_OPERAND_VSR
},
687 { "vs.46", 46, PPC_OPERAND_VSR
},
688 { "vs.47", 47, PPC_OPERAND_VSR
},
689 { "vs.48", 48, PPC_OPERAND_VSR
},
690 { "vs.49", 49, PPC_OPERAND_VSR
},
691 { "vs.5", 5, PPC_OPERAND_VSR
},
692 { "vs.50", 50, PPC_OPERAND_VSR
},
693 { "vs.51", 51, PPC_OPERAND_VSR
},
694 { "vs.52", 52, PPC_OPERAND_VSR
},
695 { "vs.53", 53, PPC_OPERAND_VSR
},
696 { "vs.54", 54, PPC_OPERAND_VSR
},
697 { "vs.55", 55, PPC_OPERAND_VSR
},
698 { "vs.56", 56, PPC_OPERAND_VSR
},
699 { "vs.57", 57, PPC_OPERAND_VSR
},
700 { "vs.58", 58, PPC_OPERAND_VSR
},
701 { "vs.59", 59, PPC_OPERAND_VSR
},
702 { "vs.6", 6, PPC_OPERAND_VSR
},
703 { "vs.60", 60, PPC_OPERAND_VSR
},
704 { "vs.61", 61, PPC_OPERAND_VSR
},
705 { "vs.62", 62, PPC_OPERAND_VSR
},
706 { "vs.63", 63, PPC_OPERAND_VSR
},
707 { "vs.7", 7, PPC_OPERAND_VSR
},
708 { "vs.8", 8, PPC_OPERAND_VSR
},
709 { "vs.9", 9, PPC_OPERAND_VSR
},
711 { "vs0", 0, PPC_OPERAND_VSR
},
712 { "vs1", 1, PPC_OPERAND_VSR
},
713 { "vs10", 10, PPC_OPERAND_VSR
},
714 { "vs11", 11, PPC_OPERAND_VSR
},
715 { "vs12", 12, PPC_OPERAND_VSR
},
716 { "vs13", 13, PPC_OPERAND_VSR
},
717 { "vs14", 14, PPC_OPERAND_VSR
},
718 { "vs15", 15, PPC_OPERAND_VSR
},
719 { "vs16", 16, PPC_OPERAND_VSR
},
720 { "vs17", 17, PPC_OPERAND_VSR
},
721 { "vs18", 18, PPC_OPERAND_VSR
},
722 { "vs19", 19, PPC_OPERAND_VSR
},
723 { "vs2", 2, PPC_OPERAND_VSR
},
724 { "vs20", 20, PPC_OPERAND_VSR
},
725 { "vs21", 21, PPC_OPERAND_VSR
},
726 { "vs22", 22, PPC_OPERAND_VSR
},
727 { "vs23", 23, PPC_OPERAND_VSR
},
728 { "vs24", 24, PPC_OPERAND_VSR
},
729 { "vs25", 25, PPC_OPERAND_VSR
},
730 { "vs26", 26, PPC_OPERAND_VSR
},
731 { "vs27", 27, PPC_OPERAND_VSR
},
732 { "vs28", 28, PPC_OPERAND_VSR
},
733 { "vs29", 29, PPC_OPERAND_VSR
},
734 { "vs3", 3, PPC_OPERAND_VSR
},
735 { "vs30", 30, PPC_OPERAND_VSR
},
736 { "vs31", 31, PPC_OPERAND_VSR
},
737 { "vs32", 32, PPC_OPERAND_VSR
},
738 { "vs33", 33, PPC_OPERAND_VSR
},
739 { "vs34", 34, PPC_OPERAND_VSR
},
740 { "vs35", 35, PPC_OPERAND_VSR
},
741 { "vs36", 36, PPC_OPERAND_VSR
},
742 { "vs37", 37, PPC_OPERAND_VSR
},
743 { "vs38", 38, PPC_OPERAND_VSR
},
744 { "vs39", 39, PPC_OPERAND_VSR
},
745 { "vs4", 4, PPC_OPERAND_VSR
},
746 { "vs40", 40, PPC_OPERAND_VSR
},
747 { "vs41", 41, PPC_OPERAND_VSR
},
748 { "vs42", 42, PPC_OPERAND_VSR
},
749 { "vs43", 43, PPC_OPERAND_VSR
},
750 { "vs44", 44, PPC_OPERAND_VSR
},
751 { "vs45", 45, PPC_OPERAND_VSR
},
752 { "vs46", 46, PPC_OPERAND_VSR
},
753 { "vs47", 47, PPC_OPERAND_VSR
},
754 { "vs48", 48, PPC_OPERAND_VSR
},
755 { "vs49", 49, PPC_OPERAND_VSR
},
756 { "vs5", 5, PPC_OPERAND_VSR
},
757 { "vs50", 50, PPC_OPERAND_VSR
},
758 { "vs51", 51, PPC_OPERAND_VSR
},
759 { "vs52", 52, PPC_OPERAND_VSR
},
760 { "vs53", 53, PPC_OPERAND_VSR
},
761 { "vs54", 54, PPC_OPERAND_VSR
},
762 { "vs55", 55, PPC_OPERAND_VSR
},
763 { "vs56", 56, PPC_OPERAND_VSR
},
764 { "vs57", 57, PPC_OPERAND_VSR
},
765 { "vs58", 58, PPC_OPERAND_VSR
},
766 { "vs59", 59, PPC_OPERAND_VSR
},
767 { "vs6", 6, PPC_OPERAND_VSR
},
768 { "vs60", 60, PPC_OPERAND_VSR
},
769 { "vs61", 61, PPC_OPERAND_VSR
},
770 { "vs62", 62, PPC_OPERAND_VSR
},
771 { "vs63", 63, PPC_OPERAND_VSR
},
772 { "vs7", 7, PPC_OPERAND_VSR
},
773 { "vs8", 8, PPC_OPERAND_VSR
},
774 { "vs9", 9, PPC_OPERAND_VSR
},
776 { "xer", 1, PPC_OPERAND_SPR
}
779 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
781 /* Given NAME, find the register number associated with that name, return
782 the integer value associated with the given name or -1 on failure. */
784 static const struct pd_reg
*
785 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
787 int middle
, low
, high
;
795 middle
= (low
+ high
) / 2;
796 cmp
= strcasecmp (name
, regs
[middle
].name
);
802 return ®s
[middle
];
810 * Summary of register_name.
812 * in: Input_line_pointer points to 1st char of operand.
814 * out: A expressionS.
815 * The operand may have been a register: in this case, X_op == O_register,
816 * X_add_number is set to the register number, and truth is returned.
817 * Input_line_pointer->(next non-blank) char after operand, or is in its
822 register_name (expressionS
*expressionP
)
824 const struct pd_reg
*reg
;
829 /* Find the spelling of the operand. */
830 start
= name
= input_line_pointer
;
831 if (name
[0] == '%' && ISALPHA (name
[1]))
832 name
= ++input_line_pointer
;
834 else if (!reg_names_p
|| !ISALPHA (name
[0]))
837 c
= get_symbol_name (&name
);
838 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
840 /* Put back the delimiting char. */
841 *input_line_pointer
= c
;
843 /* Look to see if it's in the register table. */
846 expressionP
->X_op
= O_register
;
847 expressionP
->X_add_number
= reg
->value
;
848 expressionP
->X_md
= reg
->flags
;
850 /* Make the rest nice. */
851 expressionP
->X_add_symbol
= NULL
;
852 expressionP
->X_op_symbol
= NULL
;
856 /* Reset the line as if we had not done anything. */
857 input_line_pointer
= start
;
861 /* This function is called for each symbol seen in an expression. It
862 handles the special parsing which PowerPC assemblers are supposed
863 to use for condition codes. */
865 /* Whether to do the special parsing. */
866 static bool cr_operand
;
868 /* Names to recognize in a condition code. This table is sorted. */
869 static const struct pd_reg cr_names
[] =
871 { "cr0", 0, PPC_OPERAND_CR_REG
},
872 { "cr1", 1, PPC_OPERAND_CR_REG
},
873 { "cr2", 2, PPC_OPERAND_CR_REG
},
874 { "cr3", 3, PPC_OPERAND_CR_REG
},
875 { "cr4", 4, PPC_OPERAND_CR_REG
},
876 { "cr5", 5, PPC_OPERAND_CR_REG
},
877 { "cr6", 6, PPC_OPERAND_CR_REG
},
878 { "cr7", 7, PPC_OPERAND_CR_REG
},
879 { "eq", 2, PPC_OPERAND_CR_BIT
},
880 { "gt", 1, PPC_OPERAND_CR_BIT
},
881 { "lt", 0, PPC_OPERAND_CR_BIT
},
882 { "so", 3, PPC_OPERAND_CR_BIT
},
883 { "un", 3, PPC_OPERAND_CR_BIT
}
886 /* Parsing function. This returns non-zero if it recognized an
890 ppc_parse_name (const char *name
, expressionS
*exp
)
892 const struct pd_reg
*reg
;
899 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
904 exp
->X_op
= O_register
;
905 exp
->X_add_number
= reg
->value
;
906 exp
->X_md
= reg
->flags
;
911 /* Propagate X_md and check register expressions. This is to support
912 condition codes like 4*cr5+eq. */
915 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
917 /* Accept 4*cr<n> and cr<n>*4. */
919 && ((right
->X_op
== O_register
920 && right
->X_md
== PPC_OPERAND_CR_REG
921 && left
->X_op
== O_constant
922 && left
->X_add_number
== 4)
923 || (left
->X_op
== O_register
924 && left
->X_md
== PPC_OPERAND_CR_REG
925 && right
->X_op
== O_constant
926 && right
->X_add_number
== 4)))
928 left
->X_op
= O_register
;
929 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
930 left
->X_add_number
*= right
->X_add_number
;
934 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
935 if (right
->X_op
== O_register
936 && left
->X_op
== O_register
938 && ((right
->X_md
== PPC_OPERAND_CR_BIT
939 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
940 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
941 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
943 left
->X_md
= PPC_OPERAND_CR_BIT
;
944 right
->X_op
= O_constant
;
948 /* Accept reg +/- constant. */
949 if (left
->X_op
== O_register
950 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
951 as_warn (_("invalid register expression"));
953 /* Accept constant + reg. */
954 if (right
->X_op
== O_register
)
956 if (op
== O_add
&& left
->X_op
== O_constant
)
957 left
->X_md
= right
->X_md
;
959 as_warn (_("invalid register expression"));
965 /* Local variables. */
967 /* Whether to target xcoff64/elf64. */
968 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
970 /* Opcode hash table. */
971 static htab_t ppc_hash
;
973 /* Macro hash table. */
974 static htab_t ppc_macro_hash
;
977 /* What type of shared library support to use. */
978 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
980 /* Flags to set in the elf header. */
981 static flagword ppc_flags
= 0;
983 /* Whether this is Solaris or not. */
984 #ifdef TARGET_SOLARIS_COMMENT
985 #define SOLARIS_P true
987 #define SOLARIS_P false
990 static bool msolaris
= SOLARIS_P
;
995 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
996 using a bunch of different sections. These assembler sections,
997 however, are all encompassed within the .text, .data or .bss sections
998 of the final output file. We handle this by using different
999 subsegments within these main segments.
1000 .tdata and .tbss sections only have one type of csects for now,
1001 but it's better to follow the same construction like the others. */
1003 struct ppc_xcoff_section ppc_xcoff_text_section
;
1004 struct ppc_xcoff_section ppc_xcoff_data_section
;
1005 struct ppc_xcoff_section ppc_xcoff_bss_section
;
1006 struct ppc_xcoff_section ppc_xcoff_tdata_section
;
1007 struct ppc_xcoff_section ppc_xcoff_tbss_section
;
1009 /* Return true if the ppc_xcoff_section structure is already
1012 ppc_xcoff_section_is_initialized (struct ppc_xcoff_section
*section
)
1014 return section
->segment
!= NULL
;
1017 /* Initialize a ppc_xcoff_section.
1018 Dummy symbols are used to ensure the position of .text over .data
1019 and .tdata. Moreover, they allow all algorithms here to be sure that
1020 csects isn't NULL. These symbols won't be output. */
1022 ppc_init_xcoff_section (struct ppc_xcoff_section
*s
, segT seg
)
1025 s
->next_subsegment
= 2;
1026 s
->csects
= symbol_make ("dummy\001");
1027 symbol_get_tc (s
->csects
)->within
= s
->csects
;
1030 /* The current csect. */
1031 static symbolS
*ppc_current_csect
;
1033 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1034 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1035 A special relocation is used when accessing TOC entries. We handle
1036 the TOC as a subsegment within the .data segment. We set it up if
1037 we see a .toc pseudo-op, and save the csect symbol here. */
1038 static symbolS
*ppc_toc_csect
;
1040 /* The first frag in the TOC subsegment. */
1041 static fragS
*ppc_toc_frag
;
1043 /* The first frag in the first subsegment after the TOC in the .data
1044 segment. NULL if there are no subsegments after the TOC. */
1045 static fragS
*ppc_after_toc_frag
;
1047 /* The current static block. */
1048 static symbolS
*ppc_current_block
;
1050 /* The COFF debugging section; set by md_begin. This is not the
1051 .debug section, but is instead the secret BFD section which will
1052 cause BFD to set the section number of a symbol to N_DEBUG. */
1053 static asection
*ppc_coff_debug_section
;
1055 /* Structure to set the length field of the dwarf sections. */
1056 struct dw_subsection
{
1057 /* Subsections are simply linked. */
1058 struct dw_subsection
*link
;
1060 /* The subsection number. */
1063 /* Expression to compute the length of the section. */
1064 expressionS end_exp
;
1067 static struct dw_section
{
1068 /* Corresponding section. */
1071 /* Simply linked list of subsections with a label. */
1072 struct dw_subsection
*list_subseg
;
1074 /* The anonymous subsection. */
1075 struct dw_subsection
*anon_subseg
;
1076 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1077 #endif /* OBJ_XCOFF */
1080 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1081 unsigned long *ppc_apuinfo_list
;
1082 unsigned int ppc_apuinfo_num
;
1083 unsigned int ppc_apuinfo_num_alloc
;
1084 #endif /* OBJ_ELF */
1087 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1089 const char *const md_shortopts
= "um:";
1091 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1092 const struct option md_longopts
[] = {
1093 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1094 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1095 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1096 {NULL
, no_argument
, NULL
, 0}
1098 const size_t md_longopts_size
= sizeof (md_longopts
);
1101 md_parse_option (int c
, const char *arg
)
1108 /* -u means that any undefined symbols should be treated as
1109 external, which is the default for gas anyhow. */
1114 /* Solaris as takes -le (presumably for little endian). For completeness
1115 sake, recognize -be also. */
1116 if (strcmp (arg
, "e") == 0)
1118 target_big_endian
= 0;
1119 set_target_endian
= 1;
1120 if (ppc_cpu
& PPC_OPCODE_VLE
)
1121 as_bad (_("the use of -mvle requires big endian."));
1129 if (strcmp (arg
, "e") == 0)
1131 target_big_endian
= 1;
1132 set_target_endian
= 1;
1140 /* Recognize -K PIC. */
1141 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1144 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1152 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1154 if (strcmp (arg
, "64") == 0)
1158 if (ppc_cpu
& PPC_OPCODE_VLE
)
1159 as_bad (_("the use of -mvle requires -a32."));
1161 as_fatal (_("%s unsupported"), "-a64");
1164 else if (strcmp (arg
, "32") == 0)
1171 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1172 /* "raw" is only valid for the disassembler. */
1173 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1176 if (strcmp (arg
, "vle") == 0)
1178 if (set_target_endian
&& target_big_endian
== 0)
1179 as_bad (_("the use of -mvle requires big endian."));
1181 as_bad (_("the use of -mvle requires -a32."));
1185 else if (strcmp (arg
, "no-vle") == 0)
1187 sticky
&= ~PPC_OPCODE_VLE
;
1189 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1190 new_cpu
&= ~PPC_OPCODE_VLE
;
1195 else if (strcmp (arg
, "regnames") == 0)
1198 else if (strcmp (arg
, "no-regnames") == 0)
1199 reg_names_p
= false;
1202 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1203 that require relocation. */
1204 else if (strcmp (arg
, "relocatable") == 0)
1206 shlib
= SHLIB_MRELOCATABLE
;
1207 ppc_flags
|= EF_PPC_RELOCATABLE
;
1210 else if (strcmp (arg
, "relocatable-lib") == 0)
1212 shlib
= SHLIB_MRELOCATABLE
;
1213 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1216 /* -memb, set embedded bit. */
1217 else if (strcmp (arg
, "emb") == 0)
1218 ppc_flags
|= EF_PPC_EMB
;
1220 /* -mlittle/-mbig set the endianness. */
1221 else if (strcmp (arg
, "little") == 0
1222 || strcmp (arg
, "little-endian") == 0)
1224 target_big_endian
= 0;
1225 set_target_endian
= 1;
1226 if (ppc_cpu
& PPC_OPCODE_VLE
)
1227 as_bad (_("the use of -mvle requires big endian."));
1230 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1232 target_big_endian
= 1;
1233 set_target_endian
= 1;
1236 else if (strcmp (arg
, "solaris") == 0)
1239 ppc_comment_chars
= ppc_solaris_comment_chars
;
1242 else if (strcmp (arg
, "no-solaris") == 0)
1245 ppc_comment_chars
= ppc_eabi_comment_chars
;
1247 else if (strcmp (arg
, "spe2") == 0)
1249 ppc_cpu
|= PPC_OPCODE_SPE2
;
1254 as_bad (_("invalid switch -m%s"), arg
);
1260 /* -V: SVR4 argument to print version ID. */
1262 print_version_id ();
1265 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1266 should be emitted or not. FIXME: Not implemented. */
1270 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1271 rather than .stabs.excl, which is ignored by the linker.
1272 FIXME: Not implemented. */
1283 nop_limit
= strtoul (optarg
, &end
, 0);
1285 as_bad (_("--nops needs a numeric argument"));
1300 is_ppc64_target (const bfd_target
*targ
, void *data ATTRIBUTE_UNUSED
)
1302 switch (targ
->flavour
)
1305 case bfd_target_elf_flavour
:
1306 return startswith (targ
->name
, "elf64-powerpc");
1309 case bfd_target_xcoff_flavour
:
1310 return (strcmp (targ
->name
, "aixcoff64-rs6000") == 0
1311 || strcmp (targ
->name
, "aix5coff64-rs6000") == 0);
1319 md_show_usage (FILE *stream
)
1321 fprintf (stream
, _("\
1322 PowerPC options:\n"));
1323 fprintf (stream
, _("\
1324 -a32 generate ELF32/XCOFF32\n"));
1325 if (bfd_iterate_over_targets (is_ppc64_target
, NULL
))
1326 fprintf (stream
, _("\
1327 -a64 generate ELF64/XCOFF64\n"));
1328 fprintf (stream
, _("\
1330 fprintf (stream
, _("\
1331 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n"));
1332 fprintf (stream
, _("\
1333 -mpwr generate code for POWER (RIOS1)\n"));
1334 fprintf (stream
, _("\
1335 -m601 generate code for PowerPC 601\n"));
1336 fprintf (stream
, _("\
1337 -mppc, -mppc32, -m603, -m604\n\
1338 generate code for PowerPC 603/604\n"));
1339 fprintf (stream
, _("\
1340 -m403 generate code for PowerPC 403\n"));
1341 fprintf (stream
, _("\
1342 -m405 generate code for PowerPC 405\n"));
1343 fprintf (stream
, _("\
1344 -m440 generate code for PowerPC 440\n"));
1345 fprintf (stream
, _("\
1346 -m464 generate code for PowerPC 464\n"));
1347 fprintf (stream
, _("\
1348 -m476 generate code for PowerPC 476\n"));
1349 fprintf (stream
, _("\
1350 -m7400, -m7410, -m7450, -m7455\n\
1351 generate code for PowerPC 7400/7410/7450/7455\n"));
1352 fprintf (stream
, _("\
1353 -m750cl, -mgekko, -mbroadway\n\
1354 generate code for PowerPC 750cl/Gekko/Broadway\n"));
1355 fprintf (stream
, _("\
1356 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1357 fprintf (stream
, _("\
1358 -mppc64, -m620 generate code for PowerPC 620/625/630\n"));
1359 fprintf (stream
, _("\
1360 -mppc64bridge generate code for PowerPC 64, including bridge insns\n"));
1361 fprintf (stream
, _("\
1362 -mbooke generate code for 32-bit PowerPC BookE\n"));
1363 fprintf (stream
, _("\
1364 -ma2 generate code for A2 architecture\n"));
1365 fprintf (stream
, _("\
1366 -mpower4, -mpwr4 generate code for Power4 architecture\n"));
1367 fprintf (stream
, _("\
1368 -mpower5, -mpwr5, -mpwr5x\n\
1369 generate code for Power5 architecture\n"));
1370 fprintf (stream
, _("\
1371 -mpower6, -mpwr6 generate code for Power6 architecture\n"));
1372 fprintf (stream
, _("\
1373 -mpower7, -mpwr7 generate code for Power7 architecture\n"));
1374 fprintf (stream
, _("\
1375 -mpower8, -mpwr8 generate code for Power8 architecture\n"));
1376 fprintf (stream
, _("\
1377 -mpower9, -mpwr9 generate code for Power9 architecture\n"));
1378 fprintf (stream
, _("\
1379 -mpower10, -mpwr10 generate code for Power10 architecture\n"));
1380 fprintf (stream
, _("\
1381 -mcell generate code for Cell Broadband Engine architecture\n"));
1382 fprintf (stream
, _("\
1383 -mcom generate code for Power/PowerPC common instructions\n"));
1384 fprintf (stream
, _("\
1385 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1386 fprintf (stream
, _("\
1387 -maltivec generate code for AltiVec\n"));
1388 fprintf (stream
, _("\
1389 -mvsx generate code for Vector-Scalar (VSX) instructions\n"));
1390 fprintf (stream
, _("\
1391 -me300 generate code for PowerPC e300 family\n"));
1392 fprintf (stream
, _("\
1393 -me500, -me500x2 generate code for Motorola e500 core complex\n"));
1394 fprintf (stream
, _("\
1395 -me500mc, generate code for Freescale e500mc core complex\n"));
1396 fprintf (stream
, _("\
1397 -me500mc64, generate code for Freescale e500mc64 core complex\n"));
1398 fprintf (stream
, _("\
1399 -me5500, generate code for Freescale e5500 core complex\n"));
1400 fprintf (stream
, _("\
1401 -me6500, generate code for Freescale e6500 core complex\n"));
1402 fprintf (stream
, _("\
1403 -mspe generate code for Motorola SPE instructions\n"));
1404 fprintf (stream
, _("\
1405 -mspe2 generate code for Freescale SPE2 instructions\n"));
1406 fprintf (stream
, _("\
1407 -mvle generate code for Freescale VLE instructions\n"));
1408 fprintf (stream
, _("\
1409 -mtitan generate code for AppliedMicro Titan core complex\n"));
1410 fprintf (stream
, _("\
1411 -mregnames Allow symbolic names for registers\n"));
1412 fprintf (stream
, _("\
1413 -mno-regnames Do not allow symbolic names for registers\n"));
1415 fprintf (stream
, _("\
1416 -mrelocatable support for GCC's -mrelocatble option\n"));
1417 fprintf (stream
, _("\
1418 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n"));
1419 fprintf (stream
, _("\
1420 -memb set PPC_EMB bit in ELF flags\n"));
1421 fprintf (stream
, _("\
1422 -mlittle, -mlittle-endian, -le\n\
1423 generate code for a little endian machine\n"));
1424 fprintf (stream
, _("\
1425 -mbig, -mbig-endian, -be\n\
1426 generate code for a big endian machine\n"));
1427 fprintf (stream
, _("\
1428 -msolaris generate code for Solaris\n"));
1429 fprintf (stream
, _("\
1430 -mno-solaris do not generate code for Solaris\n"));
1431 fprintf (stream
, _("\
1432 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n"));
1433 fprintf (stream
, _("\
1434 -V print assembler version number\n"));
1435 fprintf (stream
, _("\
1436 -Qy, -Qn ignored\n"));
1438 fprintf (stream
, _("\
1439 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1440 fprintf (stream
, _("\
1441 -ppc476-workaround warn if emitting data to code sections\n"));
1444 /* Set ppc_cpu if it is not already set. */
1449 const char *default_os
= TARGET_OS
;
1450 const char *default_cpu
= TARGET_CPU
;
1452 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1455 if (target_big_endian
)
1456 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1458 /* The minimum supported cpu for 64-bit little-endian is power8. */
1459 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1460 else if (startswith (default_os
, "aix")
1461 && default_os
[3] >= '4' && default_os
[3] <= '9')
1462 ppc_cpu
|= PPC_OPCODE_COMMON
;
1463 else if (startswith (default_os
, "aix3"))
1464 ppc_cpu
|= PPC_OPCODE_POWER
;
1465 else if (strcmp (default_cpu
, "rs6000") == 0)
1466 ppc_cpu
|= PPC_OPCODE_POWER
;
1467 else if (startswith (default_cpu
, "powerpc"))
1468 ppc_cpu
|= PPC_OPCODE_PPC
;
1470 as_fatal (_("unknown default cpu = %s, os = %s"),
1471 default_cpu
, default_os
);
1475 /* Figure out the BFD architecture to use. This function and ppc_mach
1476 are called well before md_begin, when the output file is opened. */
1478 enum bfd_architecture
1481 const char *default_cpu
= TARGET_CPU
;
1484 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1485 return bfd_arch_powerpc
;
1486 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1487 return bfd_arch_powerpc
;
1488 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1489 return bfd_arch_rs6000
;
1490 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1492 if (strcmp (default_cpu
, "rs6000") == 0)
1493 return bfd_arch_rs6000
;
1494 else if (startswith (default_cpu
, "powerpc"))
1495 return bfd_arch_powerpc
;
1498 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1499 return bfd_arch_unknown
;
1506 return bfd_mach_ppc64
;
1507 else if (ppc_arch () == bfd_arch_rs6000
)
1508 return bfd_mach_rs6k
;
1509 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1510 return bfd_mach_ppc_titan
;
1511 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1512 return bfd_mach_ppc_vle
;
1514 return bfd_mach_ppc
;
1518 ppc_target_format (void)
1522 return "xcoff-powermac";
1525 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1527 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1533 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1534 # elif defined (TE_VXWORKS)
1535 return "elf32-powerpc-vxworks";
1537 return (target_big_endian
1538 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1539 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1544 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1545 Return TRUE if there's a problem, otherwise FALSE. */
1548 insn_validate (const struct powerpc_opcode
*op
)
1550 const unsigned char *o
;
1551 uint64_t omask
= op
->mask
;
1553 /* The mask had better not trim off opcode bits. */
1554 if ((op
->opcode
& omask
) != op
->opcode
)
1556 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1560 /* The operands must not overlap the opcode or each other. */
1561 for (o
= op
->operands
; *o
; ++o
)
1563 bool optional
= false;
1564 if (*o
>= num_powerpc_operands
)
1566 as_bad (_("operand index error for %s"), op
->name
);
1572 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1573 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1580 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1582 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1584 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1586 else if (operand
->shift
>= 0)
1587 mask
= operand
->bitm
<< operand
->shift
;
1589 mask
= operand
->bitm
>> -operand
->shift
;
1592 as_bad (_("operand %d overlap in %s"),
1593 (int) (o
- op
->operands
), op
->name
);
1597 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1601 as_bad (_("non-optional operand %d follows optional operand in %s"),
1602 (int) (o
- op
->operands
), op
->name
);
1610 /* Insert opcodes and macros into hash tables. Called at startup and
1611 for .machine pseudo. */
1614 ppc_setup_opcodes (void)
1616 const struct powerpc_opcode
*op
;
1617 const struct powerpc_opcode
*op_end
;
1618 const struct powerpc_macro
*macro
;
1619 const struct powerpc_macro
*macro_end
;
1620 bool bad_insn
= false;
1622 if (ppc_hash
!= NULL
)
1623 htab_delete (ppc_hash
);
1624 if (ppc_macro_hash
!= NULL
)
1625 htab_delete (ppc_macro_hash
);
1627 /* Insert the opcodes into a hash table. */
1628 ppc_hash
= str_htab_create ();
1630 if (ENABLE_CHECKING
)
1634 /* An index into powerpc_operands is stored in struct fix
1635 fx_pcrel_adjust which is 8 bits wide. */
1636 gas_assert (num_powerpc_operands
< 256);
1638 /* Check operand masks. Code here and in the disassembler assumes
1639 all the 1's in the mask are contiguous. */
1640 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1642 uint64_t mask
= powerpc_operands
[i
].bitm
;
1646 right_bit
= mask
& -mask
;
1648 right_bit
= mask
& -mask
;
1649 if (mask
!= right_bit
)
1651 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1654 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1655 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1656 sizeof (powerpc_operands
[0])) == 0)
1658 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1665 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1666 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1668 if (ENABLE_CHECKING
)
1670 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1672 #ifdef PRINT_OPCODE_TABLE
1673 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1674 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1675 new_opcode
, (unsigned long long) op
->opcode
,
1676 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1679 /* The major opcodes had better be sorted. Code in the disassembler
1680 assumes the insns are sorted according to major opcode. */
1681 if (op
!= powerpc_opcodes
1682 && new_opcode
< PPC_OP (op
[-1].opcode
))
1684 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1688 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1690 as_bad (_("%s is enabled by vle flag"), op
->name
);
1693 if (PPC_OP (op
->opcode
) != 4
1694 && PPC_OP (op
->opcode
) != 31
1695 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1697 as_bad (_("%s not disabled by vle flag"), op
->name
);
1700 bad_insn
|= insn_validate (op
);
1703 if ((ppc_cpu
& op
->flags
) != 0
1704 && !(ppc_cpu
& op
->deprecated
)
1705 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1707 as_bad (_("duplicate %s"), op
->name
);
1712 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1713 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1714 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1716 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1717 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1719 if (ENABLE_CHECKING
)
1721 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1723 #ifdef PRINT_OPCODE_TABLE
1724 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1725 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1726 new_opcode
, (unsigned long long) op
->opcode
,
1727 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1730 /* The major opcodes had better be sorted. Code in the disassembler
1731 assumes the insns are sorted according to major opcode. */
1732 if (op
!= prefix_opcodes
1733 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1735 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1738 bad_insn
|= insn_validate (op
);
1741 if ((ppc_cpu
& op
->flags
) != 0
1742 && !(ppc_cpu
& op
->deprecated
)
1743 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1745 as_bad (_("duplicate %s"), op
->name
);
1750 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1751 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1752 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1754 op_end
= vle_opcodes
+ vle_num_opcodes
;
1755 for (op
= vle_opcodes
; op
< op_end
; op
++)
1757 if (ENABLE_CHECKING
)
1759 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1761 #ifdef PRINT_OPCODE_TABLE
1762 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1763 op
->name
, (unsigned int) (op
- vle_opcodes
),
1764 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1765 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1768 /* The major opcodes had better be sorted. Code in the disassembler
1769 assumes the insns are sorted according to major opcode. */
1770 if (op
!= vle_opcodes
1771 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1773 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1777 bad_insn
|= insn_validate (op
);
1780 if ((ppc_cpu
& op
->flags
) != 0
1781 && !(ppc_cpu
& op
->deprecated
)
1782 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1784 as_bad (_("duplicate %s"), op
->name
);
1789 /* SPE2 instructions */
1790 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1792 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1793 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1795 if (ENABLE_CHECKING
)
1797 if (op
!= spe2_opcodes
)
1799 unsigned old_seg
, new_seg
;
1801 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1802 old_seg
= VLE_OP_TO_SEG (old_seg
);
1803 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1804 new_seg
= VLE_OP_TO_SEG (new_seg
);
1806 /* The major opcodes had better be sorted. Code in the
1807 disassembler assumes the insns are sorted according to
1809 if (new_seg
< old_seg
)
1811 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1816 bad_insn
|= insn_validate (op
);
1819 if ((ppc_cpu
& op
->flags
) != 0
1820 && !(ppc_cpu
& op
->deprecated
)
1821 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1823 as_bad (_("duplicate %s"), op
->name
);
1828 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1829 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1832 /* Insert the macros into a hash table. */
1833 ppc_macro_hash
= str_htab_create ();
1835 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1836 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1837 if (((macro
->flags
& ppc_cpu
) != 0
1838 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1839 && str_hash_insert (ppc_macro_hash
, macro
->name
, macro
, 0) != NULL
)
1841 as_bad (_("duplicate %s"), macro
->name
);
1849 /* This function is called when the assembler starts up. It is called
1850 after the options have been parsed and the output file has been
1858 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1859 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1862 /* Set the ELF flags if desired. */
1863 if (ppc_flags
&& !msolaris
)
1864 bfd_set_private_flags (stdoutput
, ppc_flags
);
1867 ppc_setup_opcodes ();
1869 /* Tell the main code what the endianness is if it is not overridden
1871 if (!set_target_endian
)
1873 set_target_endian
= 1;
1874 target_big_endian
= PPC_BIG_ENDIAN
;
1878 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1880 /* Create XCOFF sections with .text in first, as it's creating dummy symbols
1881 to serve as initial csects. This forces the text csects to precede the
1882 data csects. These symbols will not be output. */
1883 ppc_init_xcoff_section (&ppc_xcoff_text_section
, text_section
);
1884 ppc_init_xcoff_section (&ppc_xcoff_data_section
, data_section
);
1885 ppc_init_xcoff_section (&ppc_xcoff_bss_section
, bss_section
);
1893 if (ppc_apuinfo_list
== NULL
)
1896 /* Ok, so write the section info out. We have this layout:
1900 0 8 length of "APUinfo\0"
1901 4 (n*4) number of APU's (4 bytes each)
1904 20 APU#1 first APU's info
1905 24 APU#2 second APU's info
1910 asection
*seg
= now_seg
;
1911 subsegT subseg
= now_subseg
;
1912 asection
*apuinfo_secp
= (asection
*) NULL
;
1915 /* Create the .PPC.EMB.apuinfo section. */
1916 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1917 bfd_set_section_flags (apuinfo_secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
1920 md_number_to_chars (p
, (valueT
) 8, 4);
1923 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1926 md_number_to_chars (p
, (valueT
) 2, 4);
1929 strcpy (p
, APUINFO_LABEL
);
1931 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1934 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1937 frag_align (2, 0, 0);
1939 /* We probably can't restore the current segment, for there likely
1942 subseg_set (seg
, subseg
);
1947 /* Insert an operand value into an instruction. */
1950 ppc_insert_operand (uint64_t insn
,
1951 const struct powerpc_operand
*operand
,
1957 int64_t min
, max
, right
;
1959 max
= operand
->bitm
;
1963 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1965 /* Extend the allowed range for addis to [-32768, 65535].
1966 Similarly for cmpli and some VLE high part insns. For 64-bit
1967 it would be good to disable this for signed fields since the
1968 value is sign extended into the high 32 bits of the register.
1969 If the value is, say, an address, then we might care about
1970 the high bits. However, gcc as of 2014-06 uses unsigned
1971 values when loading the high part of 64-bit constants using
1973 min
= ~(max
>> 1) & -right
;
1975 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1977 max
= (max
>> 1) & -right
;
1978 min
= ~max
& -right
;
1981 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1984 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1993 /* Some people write constants with the sign extension done by
1994 hand but only up to 32 bits. This shouldn't really be valid,
1995 but, to permit this code to assemble on a 64-bit host, we
1996 sign extend the 32-bit value to 64 bits if so doing makes the
1997 value valid. We only do this for operands that are 32-bits or
2000 && (operand
->bitm
& ~0xffffffffULL
) == 0
2001 && (val
- (1LL << 32)) >= min
2002 && (val
- (1LL << 32)) <= max
2003 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
2004 val
= val
- (1LL << 32);
2006 /* Similarly, people write expressions like ~(1<<15), and expect
2007 this to be OK for a 32-bit unsigned value. */
2009 && (operand
->bitm
& ~0xffffffffULL
) == 0
2010 && (val
+ (1LL << 32)) >= min
2011 && (val
+ (1LL << 32)) <= max
2012 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2013 val
= val
+ (1LL << 32);
2017 || (val
& (right
- 1)) != 0)
2018 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2021 if (operand
->insert
)
2026 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2027 if (errmsg
!= (const char *) NULL
)
2028 as_bad_where (file
, line
, "%s", errmsg
);
2030 else if (operand
->shift
>= 0)
2031 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2033 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2040 /* Parse @got, etc. and return the desired relocation. */
2041 static bfd_reloc_code_real_type
2042 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2046 unsigned int length
: 8;
2047 unsigned int valid32
: 1;
2048 unsigned int valid64
: 1;
2057 const struct map_bfd
*ptr
;
2059 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2060 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2061 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2063 static const struct map_bfd mapping
[] = {
2064 MAP ("l", BFD_RELOC_LO16
),
2065 MAP ("h", BFD_RELOC_HI16
),
2066 MAP ("ha", BFD_RELOC_HI16_S
),
2067 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2068 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2069 MAP ("got", BFD_RELOC_16_GOTOFF
),
2070 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2071 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2072 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2073 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2074 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2075 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2076 MAP ("copy", BFD_RELOC_PPC_COPY
),
2077 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2078 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2079 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2080 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2081 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2082 MAP ("tls", BFD_RELOC_PPC_TLS
),
2083 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2084 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2085 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2086 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2087 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2088 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2089 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2090 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2091 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2092 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2093 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2094 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2095 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2096 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2097 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2098 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2099 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2100 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2101 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2102 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2103 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2104 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2105 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2106 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2107 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2108 MAP32 ("fixup", BFD_RELOC_CTOR
),
2109 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2110 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2111 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2112 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2113 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2114 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2115 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2116 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2117 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2118 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2119 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2120 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2121 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2122 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2123 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2124 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2125 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2126 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2127 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2128 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2129 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2130 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2131 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2132 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2133 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2134 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2135 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2136 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2137 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2138 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2139 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2140 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2141 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2142 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2143 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2144 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2145 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2146 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2147 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2148 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2149 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2150 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2151 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2152 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2153 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2154 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2155 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2156 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2157 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2158 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2159 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2160 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2161 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2162 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2163 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2164 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL
),
2165 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
),
2166 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
),
2167 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL_PCREL34
),
2168 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
),
2169 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2170 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2171 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2172 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2173 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2177 return BFD_RELOC_NONE
;
2179 for (ch
= *str
, str2
= ident
;
2180 (str2
< ident
+ sizeof (ident
) - 1
2181 && (ISALNUM (ch
) || ch
== '@'));
2184 *str2
++ = TOLOWER (ch
);
2191 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2192 if (ch
== ptr
->string
[0]
2193 && len
== ptr
->length
2194 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2195 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2197 int reloc
= ptr
->reloc
;
2199 if (!ppc_obj64
&& (exp_p
->X_op
== O_big
|| exp_p
->X_add_number
!= 0))
2203 case BFD_RELOC_16_GOTOFF
:
2204 case BFD_RELOC_LO16_GOTOFF
:
2205 case BFD_RELOC_HI16_GOTOFF
:
2206 case BFD_RELOC_HI16_S_GOTOFF
:
2207 as_warn (_("symbol+offset@%s means symbol@%s+offset"),
2208 ptr
->string
, ptr
->string
);
2211 case BFD_RELOC_PPC_GOT_TLSGD16
:
2212 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2213 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2214 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2215 case BFD_RELOC_PPC_GOT_TLSLD16
:
2216 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2217 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2218 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2219 case BFD_RELOC_PPC_GOT_DTPREL16
:
2220 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2221 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2222 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2223 case BFD_RELOC_PPC_GOT_TPREL16
:
2224 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2225 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2226 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2227 as_bad (_("symbol+offset@%s not supported"), ptr
->string
);
2232 /* Now check for identifier@suffix+constant. */
2233 if (*str
== '-' || *str
== '+')
2235 char *orig_line
= input_line_pointer
;
2236 expressionS new_exp
;
2238 input_line_pointer
= str
;
2239 expression (&new_exp
);
2240 if (new_exp
.X_op
== O_constant
&& exp_p
->X_op
!= O_big
)
2242 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2243 str
= input_line_pointer
;
2245 input_line_pointer
= orig_line
;
2249 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2250 && exp_p
->X_op
== O_symbol
2251 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2253 /* Change the symbol so that the dummy .TOC. symbol can be
2254 omitted from the object file. */
2255 exp_p
->X_add_symbol
= &abs_symbol
;
2258 if (reloc
== BFD_RELOC_PPC64_REL24_NOTOC
2259 && (ppc_cpu
& PPC_OPCODE_POWER10
) == 0)
2260 reloc
= BFD_RELOC_PPC64_REL24_P9NOTOC
;
2262 return (bfd_reloc_code_real_type
) reloc
;
2265 return BFD_RELOC_NONE
;
2268 /* Support @got, etc. on constants emitted via .short, .int etc. */
2270 bfd_reloc_code_real_type
2271 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2274 if (nbytes
>= 2 && *input_line_pointer
== '@')
2275 return ppc_elf_suffix (&input_line_pointer
, exp
);
2276 return BFD_RELOC_NONE
;
2279 /* Warn when emitting data to code sections, unless we are emitting
2280 a relocation that ld --ppc476-workaround uses to recognise data
2281 *and* there was an unconditional branch prior to the data. */
2284 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2285 unsigned int nbytes
, fixS
*fix
)
2288 && (now_seg
->flags
& SEC_CODE
) != 0
2291 || !(fix
->fx_r_type
== BFD_RELOC_32
2292 || fix
->fx_r_type
== BFD_RELOC_CTOR
2293 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2294 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2295 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2296 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2297 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2298 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2299 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2300 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2302 /* Flag that we've warned. */
2306 as_warn (_("data in executable section"));
2310 /* Solaris pseduo op to change to the .rodata section. */
2312 ppc_elf_rdata (int xxx
)
2314 char *save_line
= input_line_pointer
;
2315 static char section
[] = ".rodata\n";
2317 /* Just pretend this is .section .rodata */
2318 input_line_pointer
= section
;
2319 obj_elf_section (xxx
);
2321 input_line_pointer
= save_line
;
2324 /* Pseudo op to make file scope bss items. */
2326 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2339 c
= get_symbol_name (&name
);
2341 /* Just after name is now '\0'. */
2342 p
= input_line_pointer
;
2344 SKIP_WHITESPACE_AFTER_NAME ();
2345 if (*input_line_pointer
!= ',')
2347 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2348 ignore_rest_of_line ();
2352 input_line_pointer
++; /* skip ',' */
2353 if ((size
= get_absolute_expression ()) < 0)
2355 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2356 ignore_rest_of_line ();
2360 /* The third argument to .lcomm is the alignment. */
2361 if (*input_line_pointer
!= ',')
2365 ++input_line_pointer
;
2366 align
= get_absolute_expression ();
2369 as_warn (_("ignoring bad alignment"));
2375 symbolP
= symbol_find_or_make (name
);
2378 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2380 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2381 S_GET_NAME (symbolP
));
2382 ignore_rest_of_line ();
2386 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2388 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2389 S_GET_NAME (symbolP
),
2390 (long) S_GET_VALUE (symbolP
),
2393 ignore_rest_of_line ();
2399 old_subsec
= now_subseg
;
2402 /* Convert to a power of 2 alignment. */
2403 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2406 as_bad (_("common alignment not a power of 2"));
2407 ignore_rest_of_line ();
2414 record_alignment (bss_section
, align2
);
2415 subseg_set (bss_section
, 1);
2417 frag_align (align2
, 0, 0);
2418 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2419 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2420 symbol_set_frag (symbolP
, frag_now
);
2421 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2424 S_SET_SIZE (symbolP
, size
);
2425 S_SET_SEGMENT (symbolP
, bss_section
);
2426 subseg_set (old_sec
, old_subsec
);
2427 demand_empty_rest_of_line ();
2430 /* Pseudo op to set symbol local entry point. */
2432 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2435 char c
= get_symbol_name (&name
);
2440 elf_symbol_type
*elfsym
;
2442 p
= input_line_pointer
;
2444 SKIP_WHITESPACE_AFTER_NAME ();
2445 if (*input_line_pointer
!= ',')
2448 as_bad (_("expected comma after name `%s' in .localentry directive"),
2451 ignore_rest_of_line ();
2454 input_line_pointer
++;
2456 if (exp
.X_op
== O_absent
)
2458 as_bad (_("missing expression in .localentry directive"));
2459 exp
.X_op
= O_constant
;
2460 exp
.X_add_number
= 0;
2463 sym
= symbol_find_or_make (name
);
2466 if (resolve_expression (&exp
)
2467 && exp
.X_op
== O_constant
)
2469 unsigned int encoded
, ok
;
2472 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2473 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2476 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2477 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2479 as_bad (_(".localentry expression for `%s' "
2480 "is not a valid power of 2"), S_GET_NAME (sym
));
2486 bfdsym
= symbol_get_bfdsym (sym
);
2487 elfsym
= elf_symbol_from (bfdsym
);
2488 gas_assert (elfsym
);
2489 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2490 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2491 if (ppc_abiversion
== 0)
2496 as_bad (_(".localentry expression for `%s' "
2497 "does not evaluate to a constant"), S_GET_NAME (sym
));
2499 demand_empty_rest_of_line ();
2502 /* Pseudo op to set ABI version. */
2504 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2509 if (exp
.X_op
== O_absent
)
2511 as_bad (_("missing expression in .abiversion directive"));
2512 exp
.X_op
= O_constant
;
2513 exp
.X_add_number
= 0;
2516 if (resolve_expression (&exp
)
2517 && exp
.X_op
== O_constant
)
2518 ppc_abiversion
= exp
.X_add_number
;
2520 as_bad (_(".abiversion expression does not evaluate to a constant"));
2521 demand_empty_rest_of_line ();
2524 /* Parse a .gnu_attribute directive. */
2526 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2528 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2530 /* Check validity of defined powerpc tags. */
2531 if (tag
== Tag_GNU_Power_ABI_FP
2532 || tag
== Tag_GNU_Power_ABI_Vector
2533 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2537 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2539 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2540 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2541 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2542 as_warn (_("unknown .gnu_attribute value"));
2546 /* Set ABI version in output file. */
2550 if (ppc_obj64
&& ppc_abiversion
!= 0)
2552 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2553 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2555 /* Any selection of opcodes based on ppc_cpu after gas has finished
2556 parsing the file is invalid. md_apply_fix and ppc_handle_align
2557 must select opcodes based on the machine in force at the point
2558 where the fixup or alignment frag was created, not the machine in
2559 force at the end of file. */
2563 /* Validate any relocations emitted for -mrelocatable, possibly adding
2564 fixups for word relocations in writable segments, so we can adjust
2567 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2569 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2578 case SHLIB_MRELOCATABLE
:
2579 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2580 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2581 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2582 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2583 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2584 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2585 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2586 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2587 && (seg
->flags
& SEC_LOAD
) != 0
2588 && strcmp (segment_name (seg
), ".got2") != 0
2589 && strcmp (segment_name (seg
), ".dtors") != 0
2590 && strcmp (segment_name (seg
), ".ctors") != 0
2591 && strcmp (segment_name (seg
), ".fixup") != 0
2592 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2593 && strcmp (segment_name (seg
), ".eh_frame") != 0
2594 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2596 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2597 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2599 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2600 _("relocation cannot be done when using -mrelocatable"));
2607 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2608 function descriptor sym if the corresponding code sym is used. */
2611 ppc_frob_file_before_adjust (void)
2619 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2625 name
= S_GET_NAME (symp
);
2629 if (! S_IS_WEAK (symp
)
2630 || S_IS_DEFINED (symp
))
2633 dotname
= concat (".", name
, (char *) NULL
);
2634 dotsym
= symbol_find_noref (dotname
, 1);
2636 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2637 || symbol_used_in_reloc_p (dotsym
)))
2638 symbol_mark_used (symp
);
2642 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2644 && toc_reloc_types
!= has_large_toc_reloc
2645 && bfd_section_size (toc
) > 0x10000)
2646 as_warn (_("TOC section size exceeds 64k"));
2649 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2650 emitted. Other uses of .TOC. will cause the symbol to be marked
2651 with BSF_KEEP in md_apply_fix. */
2654 ppc_elf_adjust_symtab (void)
2659 symp
= symbol_find (".TOC.");
2662 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2663 if ((bsym
->flags
& BSF_KEEP
) == 0)
2664 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2668 #endif /* OBJ_ELF */
2671 /* Parse XCOFF relocations. */
2672 static bfd_reloc_code_real_type
2673 ppc_xcoff_suffix (char **str_p
)
2677 unsigned int length
: 8;
2678 unsigned int valid32
: 1;
2679 unsigned int valid64
: 1;
2688 const struct map_bfd
*ptr
;
2690 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2691 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2692 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2694 static const struct map_bfd mapping
[] = {
2695 MAP ("l", BFD_RELOC_PPC_TOC16_LO
),
2696 MAP ("u", BFD_RELOC_PPC_TOC16_HI
),
2697 MAP32 ("ie", BFD_RELOC_PPC_TLSIE
),
2698 MAP32 ("ld", BFD_RELOC_PPC_TLSLD
),
2699 MAP32 ("le", BFD_RELOC_PPC_TLSLE
),
2700 MAP32 ("m", BFD_RELOC_PPC_TLSM
),
2701 MAP32 ("ml", BFD_RELOC_PPC_TLSML
),
2702 MAP64 ("ie", BFD_RELOC_PPC64_TLSIE
),
2703 MAP64 ("ld", BFD_RELOC_PPC64_TLSLD
),
2704 MAP64 ("le", BFD_RELOC_PPC64_TLSLE
),
2705 MAP64 ("m", BFD_RELOC_PPC64_TLSM
),
2706 MAP64 ("ml", BFD_RELOC_PPC64_TLSML
),
2710 return BFD_RELOC_NONE
;
2712 for (ch
= *str
, str2
= ident
;
2713 (str2
< ident
+ sizeof (ident
) - 1
2714 && (ISALNUM (ch
) || ch
== '@'));
2717 *str2
++ = TOLOWER (ch
);
2724 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2725 if (ch
== ptr
->string
[0]
2726 && len
== ptr
->length
2727 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2728 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2731 return (bfd_reloc_code_real_type
) ptr
->reloc
;
2734 return BFD_RELOC_NONE
;
2737 /* Restore XCOFF addis instruction to ELF format.
2738 AIX often generates addis instructions using "addis RT,D(RA)"
2739 format instead of the ELF "addis RT,RA,SI" one.
2740 On entry RT_E is at the comma after RT, D_E is at the open
2741 parenthesis after D, and RA_E is at the close parenthesis after RA. */
2743 ppc_xcoff_fixup_addis (char *rt_e
, char *d_e
, char *ra_e
)
2745 size_t ra_size
= ra_e
- d_e
- 1;
2746 char *save_ra
= xmalloc (ra_size
);
2749 memcpy (save_ra
, d_e
+ 1, ra_size
);
2750 /* Shuffle D to make room for RA, copying the comma too. */
2751 memmove (rt_e
+ ra_size
+ 1, rt_e
, d_e
- rt_e
);
2752 /* Erase the trailing ')', keeping any rubbish for potential errors. */
2753 memmove (ra_e
, ra_e
+ 1, strlen (ra_e
));
2754 /* Write RA back. */
2755 memcpy (rt_e
+ 1, save_ra
, ra_size
);
2759 /* Support @ie, etc. on constants emitted via .short, .int etc. */
2761 bfd_reloc_code_real_type
2762 ppc_xcoff_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2765 if (nbytes
>= 2 && *input_line_pointer
== '@')
2766 return ppc_xcoff_suffix (&input_line_pointer
);
2768 /* There isn't any @ symbol for default TLS relocations (R_TLS). */
2769 if (exp
->X_add_symbol
!= NULL
2770 && (symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_TL
2771 || symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_UL
))
2772 return (ppc_obj64
? BFD_RELOC_PPC64_TLSGD
: BFD_RELOC_PPC_TLSGD
);
2774 return BFD_RELOC_NONE
;
2777 #endif /* OBJ_XCOFF */
2779 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2780 /* See whether a symbol is in the TOC section. */
2783 ppc_is_toc_sym (symbolS
*sym
)
2786 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2787 || symbol_get_tc (sym
)->symbol_class
== XMC_TE
2788 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2791 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2793 return strcmp (sname
, ".toc") == 0;
2795 return strcmp (sname
, ".got") == 0;
2798 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2802 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2804 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2808 /* Check we don't already exist. */
2809 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2810 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2813 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2815 if (ppc_apuinfo_num_alloc
== 0)
2817 ppc_apuinfo_num_alloc
= 4;
2818 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2822 ppc_apuinfo_num_alloc
+= 4;
2823 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2824 ppc_apuinfo_num_alloc
);
2827 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2832 /* Various frobbings of labels and their addresses. */
2834 /* Symbols labelling the current insn. */
2835 struct insn_label_list
2837 struct insn_label_list
*next
;
2841 static struct insn_label_list
*insn_labels
;
2842 static struct insn_label_list
*free_insn_labels
;
2845 ppc_record_label (symbolS
*sym
)
2847 struct insn_label_list
*l
;
2849 if (free_insn_labels
== NULL
)
2850 l
= XNEW (struct insn_label_list
);
2853 l
= free_insn_labels
;
2854 free_insn_labels
= l
->next
;
2858 l
->next
= insn_labels
;
2863 ppc_clear_labels (void)
2865 while (insn_labels
!= NULL
)
2867 struct insn_label_list
*l
= insn_labels
;
2868 insn_labels
= l
->next
;
2869 l
->next
= free_insn_labels
;
2870 free_insn_labels
= l
;
2875 ppc_start_line_hook (void)
2877 ppc_clear_labels ();
2881 ppc_new_dot_label (symbolS
*sym
)
2883 ppc_record_label (sym
);
2885 /* Anchor this label to the current csect for relocations. */
2886 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2891 ppc_frob_label (symbolS
*sym
)
2893 ppc_record_label (sym
);
2896 /* Set the class of a label based on where it is defined. This handles
2897 symbols without suffixes. Also, move the symbol so that it follows
2898 the csect symbol. */
2899 if (ppc_current_csect
!= (symbolS
*) NULL
)
2901 if (symbol_get_tc (sym
)->symbol_class
== -1)
2902 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2904 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2905 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2906 &symbol_rootP
, &symbol_lastP
);
2907 /* Update last csect symbol. */
2908 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2910 /* Some labels like .bs are using within differently.
2911 So avoid changing it, if it's already set. */
2912 if (symbol_get_tc (sym
)->within
== NULL
)
2913 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2918 dwarf2_emit_label (sym
);
2922 /* We need to keep a list of fixups. We can't simply generate them as
2923 we go, because that would require us to first create the frag, and
2924 that would screw up references to ``.''. */
2930 bfd_reloc_code_real_type reloc
;
2933 #define MAX_INSN_FIXUPS (5)
2935 /* Return the field size operated on by RELOC, and whether it is
2936 pc-relative in PC_RELATIVE. */
2939 fixup_size (bfd_reloc_code_real_type reloc
, bool *pc_relative
)
2941 unsigned int size
= 0;
2946 /* This switch statement must handle all BFD_RELOC values
2947 possible in instruction fixups. As is, it handles all
2948 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2949 bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2950 Overkill since data and marker relocs need not be handled
2951 here, but this way we can be sure a needed fixup reloc isn't
2952 accidentally omitted. */
2953 case BFD_RELOC_PPC_EMB_MRKREF
:
2954 case BFD_RELOC_VTABLE_ENTRY
:
2955 case BFD_RELOC_VTABLE_INHERIT
:
2963 case BFD_RELOC_16_BASEREL
:
2964 case BFD_RELOC_16_GOTOFF
:
2965 case BFD_RELOC_GPREL16
:
2966 case BFD_RELOC_HI16
:
2967 case BFD_RELOC_HI16_BASEREL
:
2968 case BFD_RELOC_HI16_GOTOFF
:
2969 case BFD_RELOC_HI16_PLTOFF
:
2970 case BFD_RELOC_HI16_S
:
2971 case BFD_RELOC_HI16_S_BASEREL
:
2972 case BFD_RELOC_HI16_S_GOTOFF
:
2973 case BFD_RELOC_HI16_S_PLTOFF
:
2974 case BFD_RELOC_LO16
:
2975 case BFD_RELOC_LO16_BASEREL
:
2976 case BFD_RELOC_LO16_GOTOFF
:
2977 case BFD_RELOC_LO16_PLTOFF
:
2978 case BFD_RELOC_PPC64_ADDR16_DS
:
2979 case BFD_RELOC_PPC64_ADDR16_HIGH
:
2980 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
2981 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
2982 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
2983 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
2984 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
2985 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
2986 case BFD_RELOC_PPC64_DTPREL16_DS
:
2987 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
2988 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
2989 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
2990 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
2991 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
2992 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
2993 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
2994 case BFD_RELOC_PPC64_GOT16_DS
:
2995 case BFD_RELOC_PPC64_GOT16_LO_DS
:
2996 case BFD_RELOC_PPC64_HIGHER
:
2997 case BFD_RELOC_PPC64_HIGHER_S
:
2998 case BFD_RELOC_PPC64_HIGHEST
:
2999 case BFD_RELOC_PPC64_HIGHEST_S
:
3000 case BFD_RELOC_PPC64_PLT16_LO_DS
:
3001 case BFD_RELOC_PPC64_PLTGOT16
:
3002 case BFD_RELOC_PPC64_PLTGOT16_DS
:
3003 case BFD_RELOC_PPC64_PLTGOT16_HA
:
3004 case BFD_RELOC_PPC64_PLTGOT16_HI
:
3005 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3006 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
3007 case BFD_RELOC_PPC64_SECTOFF_DS
:
3008 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
3009 case BFD_RELOC_PPC64_TOC16_DS
:
3010 case BFD_RELOC_PPC64_TOC16_HA
:
3011 case BFD_RELOC_PPC64_TOC16_HI
:
3012 case BFD_RELOC_PPC64_TOC16_LO
:
3013 case BFD_RELOC_PPC64_TOC16_LO_DS
:
3014 case BFD_RELOC_PPC64_TPREL16_DS
:
3015 case BFD_RELOC_PPC64_TPREL16_HIGH
:
3016 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
3017 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
3018 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
3019 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
3020 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
3021 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
3023 case BFD_RELOC_PPC_BA16
:
3025 case BFD_RELOC_PPC_DTPREL16
:
3026 case BFD_RELOC_PPC_DTPREL16_HA
:
3027 case BFD_RELOC_PPC_DTPREL16_HI
:
3028 case BFD_RELOC_PPC_DTPREL16_LO
:
3029 case BFD_RELOC_PPC_EMB_NADDR16
:
3030 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
3031 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
3032 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
3033 case BFD_RELOC_PPC_EMB_RELSDA
:
3034 case BFD_RELOC_PPC_EMB_RELSEC16
:
3035 case BFD_RELOC_PPC_EMB_RELST_LO
:
3036 case BFD_RELOC_PPC_EMB_RELST_HI
:
3037 case BFD_RELOC_PPC_EMB_RELST_HA
:
3038 case BFD_RELOC_PPC_EMB_SDA2I16
:
3039 case BFD_RELOC_PPC_EMB_SDA2REL
:
3040 case BFD_RELOC_PPC_EMB_SDAI16
:
3041 case BFD_RELOC_PPC_GOT_DTPREL16
:
3042 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
3043 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
3044 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3045 case BFD_RELOC_PPC_GOT_TLSGD16
:
3046 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
3047 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
3048 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
3049 case BFD_RELOC_PPC_GOT_TLSLD16
:
3050 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3051 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3052 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3053 case BFD_RELOC_PPC_GOT_TPREL16
:
3054 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3055 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3056 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3057 case BFD_RELOC_PPC_TOC16
:
3058 case BFD_RELOC_PPC_TOC16_HI
:
3059 case BFD_RELOC_PPC_TOC16_LO
:
3060 case BFD_RELOC_PPC_TPREL16
:
3061 case BFD_RELOC_PPC_TPREL16_HA
:
3062 case BFD_RELOC_PPC_TPREL16_HI
:
3063 case BFD_RELOC_PPC_TPREL16_LO
:
3067 case BFD_RELOC_16_PCREL
:
3068 case BFD_RELOC_HI16_PCREL
:
3069 case BFD_RELOC_HI16_S_PCREL
:
3070 case BFD_RELOC_LO16_PCREL
:
3071 case BFD_RELOC_PPC64_REL16_HIGH
:
3072 case BFD_RELOC_PPC64_REL16_HIGHA
:
3073 case BFD_RELOC_PPC64_REL16_HIGHER
:
3074 case BFD_RELOC_PPC64_REL16_HIGHER34
:
3075 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3076 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
3077 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3078 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
3079 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3080 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
3082 case BFD_RELOC_PPC_B16
:
3084 case BFD_RELOC_PPC_VLE_REL8
:
3090 case BFD_RELOC_32_PLTOFF
:
3092 case BFD_RELOC_CTOR
:
3094 case BFD_RELOC_PPC64_ENTRY
:
3095 case BFD_RELOC_PPC_16DX_HA
:
3097 case BFD_RELOC_PPC_BA16
:
3099 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3100 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3101 case BFD_RELOC_PPC_BA26
:
3102 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3103 case BFD_RELOC_PPC_EMB_NADDR32
:
3104 case BFD_RELOC_PPC_EMB_SDA21
:
3105 case BFD_RELOC_PPC_TLS
:
3106 case BFD_RELOC_PPC_TLSGD
:
3107 case BFD_RELOC_PPC_TLSLD
:
3108 case BFD_RELOC_PPC_TLSLE
:
3109 case BFD_RELOC_PPC_TLSIE
:
3110 case BFD_RELOC_PPC_TLSM
:
3111 case BFD_RELOC_PPC_TLSML
:
3112 case BFD_RELOC_PPC_VLE_HA16A
:
3113 case BFD_RELOC_PPC_VLE_HA16D
:
3114 case BFD_RELOC_PPC_VLE_HI16A
:
3115 case BFD_RELOC_PPC_VLE_HI16D
:
3116 case BFD_RELOC_PPC_VLE_LO16A
:
3117 case BFD_RELOC_PPC_VLE_LO16D
:
3118 case BFD_RELOC_PPC_VLE_SDA21
:
3119 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3120 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3121 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3122 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3123 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3124 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3125 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3126 case BFD_RELOC_PPC64_TLS_PCREL
:
3131 case BFD_RELOC_24_PLT_PCREL
:
3132 case BFD_RELOC_32_PCREL
:
3133 case BFD_RELOC_32_PLT_PCREL
:
3134 case BFD_RELOC_PPC64_REL24_NOTOC
:
3135 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
3137 case BFD_RELOC_PPC_B16
:
3139 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3140 case BFD_RELOC_PPC_B16_BRTAKEN
:
3141 case BFD_RELOC_PPC_B26
:
3142 case BFD_RELOC_PPC_LOCAL24PC
:
3143 case BFD_RELOC_PPC_REL16DX_HA
:
3144 case BFD_RELOC_PPC_VLE_REL15
:
3145 case BFD_RELOC_PPC_VLE_REL24
:
3151 case BFD_RELOC_CTOR
:
3153 case BFD_RELOC_PPC_COPY
:
3154 case BFD_RELOC_PPC_DTPMOD
:
3155 case BFD_RELOC_PPC_DTPREL
:
3156 case BFD_RELOC_PPC_GLOB_DAT
:
3157 case BFD_RELOC_PPC_TPREL
:
3158 size
= ppc_obj64
? 8 : 4;
3162 case BFD_RELOC_64_PLTOFF
:
3163 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3164 case BFD_RELOC_PPC64_D28
:
3165 case BFD_RELOC_PPC64_D34
:
3166 case BFD_RELOC_PPC64_D34_LO
:
3167 case BFD_RELOC_PPC64_D34_HI30
:
3168 case BFD_RELOC_PPC64_D34_HA30
:
3169 case BFD_RELOC_PPC64_TPREL34
:
3170 case BFD_RELOC_PPC64_DTPREL34
:
3171 case BFD_RELOC_PPC64_TOC
:
3172 case BFD_RELOC_PPC64_TLSGD
:
3173 case BFD_RELOC_PPC64_TLSLD
:
3174 case BFD_RELOC_PPC64_TLSLE
:
3175 case BFD_RELOC_PPC64_TLSIE
:
3176 case BFD_RELOC_PPC64_TLSM
:
3177 case BFD_RELOC_PPC64_TLSML
:
3181 case BFD_RELOC_64_PCREL
:
3182 case BFD_RELOC_64_PLT_PCREL
:
3183 case BFD_RELOC_PPC64_GOT_PCREL34
:
3184 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3185 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3186 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3187 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3188 case BFD_RELOC_PPC64_PCREL28
:
3189 case BFD_RELOC_PPC64_PCREL34
:
3190 case BFD_RELOC_PPC64_PLT_PCREL34
:
3199 if (ENABLE_CHECKING
)
3201 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3202 if (reloc_howto
!= NULL
3203 && (size
!= bfd_get_reloc_size (reloc_howto
)
3204 || pcrel
!= reloc_howto
->pc_relative
))
3206 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3211 *pc_relative
= pcrel
;
3216 /* If we have parsed a call to __tls_get_addr, parse an argument like
3217 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3218 is successfully parsed, *STR is updated past the trailing
3219 parenthesis and trailing white space, and *TLS_FIX contains the
3220 reloc and arg expression. */
3223 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3225 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3226 if (sym_name
[0] == '.')
3229 tls_fix
->reloc
= BFD_RELOC_NONE
;
3230 if (strncasecmp (sym_name
, "__tls_get_addr", 14) == 0
3231 && (sym_name
[14] == 0
3232 || strcasecmp (sym_name
+ 14, "_desc") == 0
3233 || strcasecmp (sym_name
+ 14, "_opt") == 0))
3235 char *hold
= input_line_pointer
;
3236 input_line_pointer
= *str
+ 1;
3237 expression (&tls_fix
->exp
);
3238 if (tls_fix
->exp
.X_op
== O_symbol
)
3240 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3241 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3242 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3243 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3244 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3246 input_line_pointer
+= 7;
3248 *str
= input_line_pointer
;
3251 input_line_pointer
= hold
;
3253 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3257 /* This routine is called for each instruction to be assembled. */
3260 md_assemble (char *str
)
3263 const struct powerpc_opcode
*opcode
;
3265 const unsigned char *opindex_ptr
;
3268 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3273 unsigned int insn_length
;
3275 /* Get the opcode. */
3276 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3281 /* Look up the opcode in the hash table. */
3282 opcode
= (const struct powerpc_opcode
*) str_hash_find (ppc_hash
, str
);
3283 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3285 const struct powerpc_macro
*macro
;
3287 macro
= (const struct powerpc_macro
*) str_hash_find (ppc_macro_hash
,
3289 if (macro
== (const struct powerpc_macro
*) NULL
)
3290 as_bad (_("unrecognized opcode: `%s'"), str
);
3292 ppc_macro (s
, macro
);
3294 ppc_clear_labels ();
3298 insn
= opcode
->opcode
;
3299 if (!target_big_endian
3300 && ((insn
& ~(1 << 26)) == 46u << 26
3301 || (insn
& ~(0xc0 << 1)) == (31u << 26 | 533 << 1)))
3303 /* lmw, stmw, lswi, lswx, stswi, stswx */
3304 as_bad (_("`%s' invalid when little-endian"), str
);
3305 ppc_clear_labels ();
3310 while (ISSPACE (*str
))
3314 /* AIX often generates addis instructions using "addis RT, D(RA)"
3315 format instead of the classic "addis RT, RA, SI" one.
3316 Restore it to the default format as it's the one encoded
3318 if (!strcmp (opcode
->name
, "addis"))
3320 char *rt_e
= strchr (str
, ',');
3322 && strchr (rt_e
+ 1, ',') == NULL
)
3324 char *d_e
= strchr (rt_e
+ 1, '(');
3325 if (d_e
!= NULL
&& d_e
!= rt_e
+ 1)
3327 char *ra_e
= strrchr (d_e
+ 1, ')');
3328 if (ra_e
!= NULL
&& ra_e
!= d_e
+ 1)
3329 ppc_xcoff_fixup_addis (rt_e
, d_e
, ra_e
);
3335 /* PowerPC operands are just expressions. The only real issue is
3336 that a few operand types are optional. If an instruction has
3337 multiple optional operands and one is omitted, then all optional
3338 operands past the first omitted one must also be omitted. */
3339 int num_optional_operands
= 0;
3340 int num_optional_provided
= 0;
3342 /* Gather the operands. */
3346 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3348 const struct powerpc_operand
*operand
;
3354 if (next_opindex
== 0)
3355 operand
= &powerpc_operands
[*opindex_ptr
];
3358 operand
= &powerpc_operands
[next_opindex
];
3363 /* If this is an optional operand, and we are skipping it, just
3364 insert the default value, usually a zero. */
3365 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3366 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3368 if (num_optional_operands
== 0)
3370 const unsigned char *optr
;
3376 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3378 const struct powerpc_operand
*op
;
3379 op
= &powerpc_operands
[*optr
];
3383 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3384 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3386 ++num_optional_operands
;
3388 if (s
!= NULL
&& *s
!= '\0')
3392 /* Look for the start of the next operand. */
3393 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3394 s
= strpbrk (s
, "(,");
3396 s
= strchr (s
, ',');
3402 omitted
= total
- provided
;
3403 num_optional_provided
= num_optional_operands
- omitted
;
3405 if (--num_optional_provided
< 0)
3407 uint64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3408 num_optional_provided
);
3409 if (operand
->insert
)
3411 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3412 if (errmsg
!= (const char *) NULL
)
3413 as_bad ("%s", errmsg
);
3415 else if (operand
->shift
>= 0)
3416 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3418 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3420 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3421 next_opindex
= *opindex_ptr
+ 1;
3426 /* Gather the operand. */
3427 hold
= input_line_pointer
;
3428 input_line_pointer
= str
;
3431 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3432 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3433 || !register_name (&ex
))
3435 char save_lex
= lex_type
['%'];
3437 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3438 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3441 lex_type
['%'] |= LEX_BEGIN_NAME
;
3445 lex_type
['%'] = save_lex
;
3448 str
= input_line_pointer
;
3449 input_line_pointer
= hold
;
3451 if (ex
.X_op
== O_illegal
)
3452 as_bad (_("illegal operand"));
3453 else if (ex
.X_op
== O_absent
)
3454 as_bad (_("missing operand"));
3455 else if (ex
.X_op
== O_register
)
3459 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3460 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3461 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
| PPC_OPERAND_ACC
)) != 0
3462 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3463 && ex
.X_add_number
!= 0
3464 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3465 as_warn (_("invalid register expression"));
3466 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3467 ppc_cpu
, (char *) NULL
, 0);
3469 else if (ex
.X_op
== O_constant
3470 || (ex
.X_op
== O_big
&& ex
.X_add_number
> 0))
3473 if (ex
.X_op
== O_constant
)
3475 val
= ex
.X_add_number
;
3476 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3477 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3478 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3481 val
= generic_bignum_to_int64 ();
3483 /* Allow @HA, @L, @H on constants. */
3484 char *orig_str
= str
;
3485 bfd_reloc_code_real_type reloc
= ppc_elf_suffix (&str
, &ex
);
3487 if (ex
.X_op
== O_constant
)
3489 val
= ex
.X_add_number
;
3490 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3491 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3492 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3494 if (reloc
!= BFD_RELOC_NONE
)
3501 case BFD_RELOC_LO16
:
3503 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3507 case BFD_RELOC_HI16
:
3508 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3510 /* PowerPC64 @h is tested for overflow. */
3512 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3514 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3515 val
= (val
^ sign
) - sign
;
3521 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3523 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3527 case BFD_RELOC_HI16_S
:
3528 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3530 /* PowerPC64 @ha is tested for overflow. */
3531 val
= (val
+ 0x8000) >> 16;
3532 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3534 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3535 val
= (val
^ sign
) - sign
;
3541 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3543 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3547 case BFD_RELOC_PPC64_HIGHER
:
3548 val
= PPC_HIGHER (val
);
3549 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3553 case BFD_RELOC_PPC64_HIGHER_S
:
3554 val
= PPC_HIGHERA (val
);
3555 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3559 case BFD_RELOC_PPC64_HIGHEST
:
3560 val
= PPC_HIGHEST (val
);
3561 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3565 case BFD_RELOC_PPC64_HIGHEST_S
:
3566 val
= PPC_HIGHESTA (val
);
3567 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3571 #endif /* OBJ_ELF */
3572 insn
= ppc_insert_operand (insn
, operand
, val
, ppc_cpu
, NULL
, 0);
3576 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3578 /* Look for a __tls_get_addr arg using the insane old syntax. */
3579 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3580 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3582 fixups
[fc
].opindex
= *opindex_ptr
;
3586 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3588 /* If VLE-mode convert LO/HI/HA relocations. */
3589 if (opcode
->flags
& PPC_OPCODE_VLE
)
3591 uint64_t tmp_insn
= insn
& opcode
->mask
;
3593 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3594 || tmp_insn
== E_AND2I_DOT_INSN
3595 || tmp_insn
== E_OR2IS_INSN
3596 || tmp_insn
== E_LI_INSN
3597 || tmp_insn
== E_LIS_INSN
3598 || tmp_insn
== E_AND2IS_DOT_INSN
);
3601 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3602 || tmp_insn
== E_ADD2IS_INSN
3603 || tmp_insn
== E_CMP16I_INSN
3604 || tmp_insn
== E_MULL2I_INSN
3605 || tmp_insn
== E_CMPL16I_INSN
3606 || tmp_insn
== E_CMPH16I_INSN
3607 || tmp_insn
== E_CMPHL16I_INSN
);
3614 case BFD_RELOC_PPC_EMB_SDA21
:
3615 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3618 case BFD_RELOC_LO16
:
3620 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3621 else if (use_a_reloc
)
3622 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3625 case BFD_RELOC_HI16
:
3627 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3628 else if (use_a_reloc
)
3629 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3632 case BFD_RELOC_HI16_S
:
3634 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3635 else if (use_a_reloc
)
3636 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3639 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3641 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3644 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3646 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3649 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3651 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3656 /* TLS and other tweaks. */
3662 case BFD_RELOC_PPC_TLS
:
3663 case BFD_RELOC_PPC64_TLS_PCREL
:
3664 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3665 as_bad (_("@tls may not be used with \"%s\" operands"),
3667 else if (operand
->shift
!= 11)
3668 as_bad (_("@tls may only be used in last operand"));
3670 insn
= ppc_insert_operand (insn
, operand
,
3672 ppc_cpu
, (char *) NULL
, 0);
3675 /* We'll only use the 32 (or 64) bit form of these relocations
3676 in constants. Instructions get the 16 or 34 bit form. */
3677 case BFD_RELOC_PPC_DTPREL
:
3678 if (operand
->bitm
== 0x3ffffffffULL
)
3679 reloc
= BFD_RELOC_PPC64_DTPREL34
;
3681 reloc
= BFD_RELOC_PPC_DTPREL16
;
3684 case BFD_RELOC_PPC_TPREL
:
3685 if (operand
->bitm
== 0x3ffffffffULL
)
3686 reloc
= BFD_RELOC_PPC64_TPREL34
;
3688 reloc
= BFD_RELOC_PPC_TPREL16
;
3691 case BFD_RELOC_PPC64_PCREL34
:
3692 if (operand
->bitm
== 0xfffffffULL
)
3694 reloc
= BFD_RELOC_PPC64_PCREL28
;
3698 case BFD_RELOC_PPC64_GOT_PCREL34
:
3699 case BFD_RELOC_PPC64_PLT_PCREL34
:
3700 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3701 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3702 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3703 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3704 if (operand
->bitm
!= 0x3ffffffffULL
3705 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3706 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3709 case BFD_RELOC_LO16
:
3710 if (operand
->bitm
== 0x3ffffffffULL
3711 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3712 reloc
= BFD_RELOC_PPC64_D34_LO
;
3713 else if ((operand
->bitm
| 0xf) != 0xffff
3714 || operand
->shift
!= 0
3715 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3716 as_warn (_("%s unsupported on this instruction"), "@l");
3719 case BFD_RELOC_HI16
:
3720 if (operand
->bitm
== 0x3ffffffffULL
3721 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3722 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3723 else if (operand
->bitm
!= 0xffff
3724 || operand
->shift
!= 0
3725 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3726 as_warn (_("%s unsupported on this instruction"), "@h");
3729 case BFD_RELOC_HI16_S
:
3730 if (operand
->bitm
== 0x3ffffffffULL
3731 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3732 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3733 else if (operand
->bitm
== 0xffff
3734 && operand
->shift
== (int) PPC_OPSHIFT_INV
3735 && opcode
->opcode
== (19 << 26) + (2 << 1))
3737 reloc
= BFD_RELOC_PPC_16DX_HA
;
3738 else if (operand
->bitm
!= 0xffff
3739 || operand
->shift
!= 0
3740 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3741 as_warn (_("%s unsupported on this instruction"), "@ha");
3744 #endif /* OBJ_ELF */
3746 reloc
= ppc_xcoff_suffix (&str
);
3747 #endif /* OBJ_XCOFF */
3749 if (reloc
!= BFD_RELOC_NONE
)
3751 /* Determine a BFD reloc value based on the operand information.
3752 We are only prepared to turn a few of the operands into
3754 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3755 | PPC_OPERAND_ABSOLUTE
)) != 0
3756 && operand
->bitm
== 0x3fffffc
3757 && operand
->shift
== 0)
3758 reloc
= BFD_RELOC_PPC_B26
;
3759 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3760 | PPC_OPERAND_ABSOLUTE
)) != 0
3761 && operand
->bitm
== 0xfffc
3762 && operand
->shift
== 0)
3763 reloc
= BFD_RELOC_PPC_B16
;
3764 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3765 && operand
->bitm
== 0x1fe
3766 && operand
->shift
== -1)
3767 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3768 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3769 && operand
->bitm
== 0xfffe
3770 && operand
->shift
== 0)
3771 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3772 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3773 && operand
->bitm
== 0x1fffffe
3774 && operand
->shift
== 0)
3775 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3776 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3777 && (operand
->bitm
& 0xfff0) == 0xfff0
3778 && operand
->shift
== 0)
3780 reloc
= BFD_RELOC_16
;
3781 #if defined OBJ_XCOFF || defined OBJ_ELF
3782 /* Note: the symbol may be not yet defined. */
3783 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3784 && ppc_is_toc_sym (ex
.X_add_symbol
))
3786 reloc
= BFD_RELOC_PPC_TOC16
;
3788 as_warn (_("assuming %s on symbol"),
3789 ppc_obj64
? "@toc" : "@xgot");
3794 else if (operand
->bitm
== 0x3ffffffffULL
)
3795 reloc
= BFD_RELOC_PPC64_D34
;
3796 else if (operand
->bitm
== 0xfffffffULL
)
3797 reloc
= BFD_RELOC_PPC64_D28
;
3799 /* For the absolute forms of branches, convert the PC
3800 relative form back into the absolute. */
3801 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3805 case BFD_RELOC_PPC_B26
:
3806 reloc
= BFD_RELOC_PPC_BA26
;
3808 case BFD_RELOC_PPC_B16
:
3809 reloc
= BFD_RELOC_PPC_BA16
;
3812 case BFD_RELOC_PPC_B16_BRTAKEN
:
3813 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3815 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3816 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3827 case BFD_RELOC_PPC_TOC16
:
3828 toc_reloc_types
|= has_small_toc_reloc
;
3830 case BFD_RELOC_PPC64_TOC16_LO
:
3831 case BFD_RELOC_PPC64_TOC16_HI
:
3832 case BFD_RELOC_PPC64_TOC16_HA
:
3833 toc_reloc_types
|= has_large_toc_reloc
;
3840 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3845 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3848 case BFD_RELOC_LO16
:
3849 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3852 case BFD_RELOC_16_GOTOFF
:
3853 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3856 case BFD_RELOC_LO16_GOTOFF
:
3857 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3860 case BFD_RELOC_LO16_PLTOFF
:
3861 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3864 case BFD_RELOC_16_BASEREL
:
3865 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3868 case BFD_RELOC_LO16_BASEREL
:
3869 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3872 case BFD_RELOC_PPC_TOC16
:
3873 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3876 case BFD_RELOC_PPC64_TOC16_LO
:
3877 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3880 case BFD_RELOC_PPC64_PLTGOT16
:
3881 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3884 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3885 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3888 case BFD_RELOC_PPC_DTPREL16
:
3889 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3892 case BFD_RELOC_PPC_DTPREL16_LO
:
3893 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3896 case BFD_RELOC_PPC_TPREL16
:
3897 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3900 case BFD_RELOC_PPC_TPREL16_LO
:
3901 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3904 case BFD_RELOC_PPC_GOT_DTPREL16
:
3905 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3906 case BFD_RELOC_PPC_GOT_TPREL16
:
3907 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3911 as_bad (_("unsupported relocation for DS offset field"));
3916 /* Look for a __tls_get_addr arg after any __tls_get_addr
3917 modifiers like @plt. This fixup must be emitted before
3918 the usual call fixup. */
3919 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3920 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3922 fixups
[fc
].opindex
= *opindex_ptr
;
3927 /* We need to generate a fixup for this expression. */
3928 if (fc
>= MAX_INSN_FIXUPS
)
3929 as_fatal (_("too many fixups"));
3930 fixups
[fc
].exp
= ex
;
3931 fixups
[fc
].opindex
= *opindex_ptr
;
3932 fixups
[fc
].reloc
= reloc
;
3940 /* If expecting more operands, then we want to see "),". */
3941 if (*str
== endc
&& opindex_ptr
[1] != 0)
3945 while (ISSPACE (*str
));
3949 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3954 /* The call to expression should have advanced str past any
3962 else if (*str
!= '\0')
3964 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3967 else if (endc
== ')')
3969 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3974 while (ISSPACE (*str
))
3978 as_bad (_("junk at end of line: `%s'"), str
);
3981 /* Do we need/want an APUinfo section? */
3982 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3985 /* These are all version "1". */
3986 if (opcode
->flags
& PPC_OPCODE_SPE
)
3987 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3988 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3989 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3990 if (opcode
->flags
& PPC_OPCODE_EFS
)
3991 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3992 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3993 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3994 if (opcode
->flags
& PPC_OPCODE_PMR
)
3995 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3996 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3997 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3998 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3999 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
4000 /* Only set the VLE flag if the instruction has been pulled via
4001 the VLE instruction set. This way the flag is guaranteed to
4002 be set for VLE-only instructions or for VLE-only processors,
4003 however it'll remain clear for dual-mode instructions on
4004 dual-mode and, more importantly, standard-mode processors. */
4005 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
4007 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
4008 if (elf_section_data (now_seg
) != NULL
)
4009 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
4014 /* Write out the instruction. */
4017 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
4018 /* All instructions can start on a 2 byte boundary for VLE. */
4021 if (frag_now
->insn_addr
!= addr_mask
)
4023 /* Don't emit instructions to a frag started for data, or for a
4024 CPU differing in VLE mode. Data is allowed to be misaligned,
4025 and it's possible to start a new frag in the middle of
4027 frag_wane (frag_now
);
4031 /* Check that insns within the frag are aligned. ppc_frag_check
4032 will ensure that the frag start address is aligned. */
4033 if ((frag_now_fix () & addr_mask
) != 0)
4034 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
4036 /* Differentiate between two, four, and eight byte insns. */
4038 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
4040 else if ((opcode
->flags
& PPC_OPCODE_POWER10
) != 0
4041 && PPC_PREFIX_P (insn
))
4043 struct insn_label_list
*l
;
4047 /* 8-byte prefix instructions are not allowed to cross 64-byte
4049 frag_align_code (6, 4);
4050 record_alignment (now_seg
, 6);
4052 /* Update alignment of the containing csect. */
4053 if (symbol_get_tc (ppc_current_csect
)->align
< 6)
4054 symbol_get_tc (ppc_current_csect
)->align
= 6;
4057 /* Update "dot" in any expressions used by this instruction, and
4058 a label attached to the instruction. By "attached" we mean
4059 on the same source line as the instruction and without any
4060 intervening semicolons. */
4061 dot_value
= frag_now_fix ();
4062 dot_frag
= frag_now
;
4063 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
4065 symbol_set_frag (l
->label
, dot_frag
);
4066 S_SET_VALUE (l
->label
, dot_value
);
4070 ppc_clear_labels ();
4072 f
= frag_more (insn_length
);
4073 frag_now
->insn_addr
= addr_mask
;
4075 /* The prefix part of an 8-byte instruction always occupies the lower
4076 addressed word in a doubleword, regardless of endianness. */
4077 if (insn_length
== 8
4078 && (sizeof (insn
) > sizeof (valueT
) || !target_big_endian
))
4080 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4081 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4084 md_number_to_chars (f
, insn
, insn_length
);
4088 last_subseg
= now_subseg
;
4091 dwarf2_emit_insn (insn_length
);
4094 /* Create any fixups. */
4095 for (i
= 0; i
< fc
; i
++)
4098 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4101 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4102 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4104 fixP
= fix_new_exp (frag_now
,
4105 f
- frag_now
->fr_literal
+ offset
,
4113 const struct powerpc_operand
*operand
;
4115 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4116 fixP
= fix_new_exp (frag_now
,
4117 f
- frag_now
->fr_literal
,
4120 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4123 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4127 /* Handle a macro. Gather all the operands, transform them as
4128 described by the macro, and call md_assemble recursively. All the
4129 operands are separated by commas; we don't accept parentheses
4130 around operands here. */
4133 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
4144 /* Gather the users operands into the operands array. */
4149 if (count
>= sizeof operands
/ sizeof operands
[0])
4151 operands
[count
++] = s
;
4152 s
= strchr (s
, ',');
4153 if (s
== (char *) NULL
)
4158 if (count
!= macro
->operands
)
4160 as_bad (_("wrong number of operands"));
4164 /* Work out how large the string must be (the size is unbounded
4165 because it includes user input). */
4167 format
= macro
->format
;
4168 while (*format
!= '\0')
4177 arg
= strtol (format
+ 1, &send
, 10);
4178 know (send
!= format
&& arg
< count
);
4179 len
+= strlen (operands
[arg
]);
4184 /* Put the string together. */
4185 complete
= s
= XNEWVEC (char, len
+ 1);
4186 format
= macro
->format
;
4187 while (*format
!= '\0')
4193 arg
= strtol (format
+ 1, &send
, 10);
4194 strcpy (s
, operands
[arg
]);
4201 /* Assemble the constructed instruction. */
4202 md_assemble (complete
);
4207 /* For ELF, add support for SHT_ORDERED. */
4210 ppc_section_type (char *str
, size_t len
)
4212 if (len
== 7 && startswith (str
, "ordered"))
4219 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4221 if (type
== SHT_ORDERED
)
4222 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4228 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4233 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4236 #endif /* OBJ_ELF */
4239 /* Pseudo-op handling. */
4241 /* The .byte pseudo-op. This is similar to the normal .byte
4242 pseudo-op, but it can also take a single ASCII string. */
4245 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4249 if (*input_line_pointer
!= '\"')
4255 /* Gather characters. A real double quote is doubled. Unusual
4256 characters are not permitted. */
4257 ++input_line_pointer
;
4262 c
= *input_line_pointer
++;
4266 if (*input_line_pointer
!= '\"')
4268 ++input_line_pointer
;
4271 FRAG_APPEND_1_CHAR (c
);
4275 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4276 as_warn (_("data in executable section"));
4277 demand_empty_rest_of_line ();
4282 /* XCOFF specific pseudo-op handling. */
4284 /* This is set if we are creating a .stabx symbol, since we don't want
4285 to handle symbol suffixes for such symbols. */
4286 static bool ppc_stab_symbol
;
4288 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4289 symbols in the .bss segment as though they were local common
4290 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4291 aligns .comm and .lcomm to 4 bytes.
4292 Symbols having a XMC_UL storage class are uninialized thread-local
4296 ppc_comm (int lcomm
)
4298 asection
*current_seg
= now_seg
;
4299 subsegT current_subseg
= now_subseg
;
4305 symbolS
*lcomm_sym
= NULL
;
4308 struct ppc_xcoff_section
*section
;
4310 endc
= get_symbol_name (&name
);
4311 end_name
= input_line_pointer
;
4312 (void) restore_line_pointer (endc
);
4314 if (*input_line_pointer
!= ',')
4316 as_bad (_("missing size"));
4317 ignore_rest_of_line ();
4320 ++input_line_pointer
;
4322 size
= get_absolute_expression ();
4325 as_bad (_("negative size"));
4326 ignore_rest_of_line ();
4332 /* The third argument to .comm is the alignment. */
4333 if (*input_line_pointer
!= ',')
4337 ++input_line_pointer
;
4338 align
= get_absolute_expression ();
4341 as_warn (_("ignoring bad alignment"));
4351 /* The third argument to .lcomm appears to be the real local
4352 common symbol to create. References to the symbol named in
4353 the first argument are turned into references to the third
4355 if (*input_line_pointer
!= ',')
4357 as_bad (_("missing real symbol name"));
4358 ignore_rest_of_line ();
4361 ++input_line_pointer
;
4363 lcomm_endc
= get_symbol_name (&lcomm_name
);
4365 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4367 (void) restore_line_pointer (lcomm_endc
);
4369 /* The fourth argument to .lcomm is the alignment. */
4370 if (*input_line_pointer
!= ',')
4379 ++input_line_pointer
;
4380 align
= get_absolute_expression ();
4383 as_warn (_("ignoring bad alignment"));
4390 sym
= symbol_find_or_make (name
);
4393 if (S_IS_DEFINED (sym
)
4394 || S_GET_VALUE (sym
) != 0)
4396 as_bad (_("attempt to redefine symbol"));
4397 ignore_rest_of_line ();
4401 if (symbol_get_tc (sym
)->symbol_class
== XMC_UL
4402 || (lcomm
&& symbol_get_tc (lcomm_sym
)->symbol_class
== XMC_UL
))
4404 section
= &ppc_xcoff_tbss_section
;
4405 if (!ppc_xcoff_section_is_initialized (section
))
4407 ppc_init_xcoff_section (section
, subseg_new (".tbss", 0));
4408 bfd_set_section_flags (section
->segment
,
4409 SEC_ALLOC
| SEC_THREAD_LOCAL
);
4410 seg_info (section
->segment
)->bss
= 1;
4414 section
= &ppc_xcoff_bss_section
;
4416 record_alignment (section
->segment
, align
);
4419 || ! S_IS_DEFINED (lcomm_sym
))
4428 S_SET_EXTERNAL (sym
);
4432 symbol_get_tc (lcomm_sym
)->output
= 1;
4433 def_sym
= lcomm_sym
;
4437 subseg_set (section
->segment
, 1);
4438 frag_align (align
, 0, 0);
4440 symbol_set_frag (def_sym
, frag_now
);
4441 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4442 def_size
, (char *) NULL
);
4444 S_SET_SEGMENT (def_sym
, section
->segment
);
4445 symbol_get_tc (def_sym
)->align
= align
;
4449 /* Align the size of lcomm_sym. */
4450 symbol_get_frag (lcomm_sym
)->fr_offset
=
4451 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4452 &~ ((1 << align
) - 1));
4453 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4454 symbol_get_tc (lcomm_sym
)->align
= align
;
4459 /* Make sym an offset from lcomm_sym. */
4460 S_SET_SEGMENT (sym
, section
->segment
);
4461 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4462 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4463 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4466 subseg_set (current_seg
, current_subseg
);
4468 demand_empty_rest_of_line ();
4471 /* The .csect pseudo-op. This switches us into a different
4472 subsegment. The first argument is a symbol whose value is the
4473 start of the .csect. In COFF, csect symbols get special aux
4474 entries defined by the x_csect field of union internal_auxent. The
4475 optional second argument is the alignment (the default is 2). */
4478 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4485 endc
= get_symbol_name (&name
);
4487 sym
= symbol_find_or_make (name
);
4489 (void) restore_line_pointer (endc
);
4491 if (S_GET_NAME (sym
)[0] == '\0')
4493 /* An unnamed csect is assumed to be [PR]. */
4494 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4498 if (*input_line_pointer
== ',')
4500 ++input_line_pointer
;
4501 align
= get_absolute_expression ();
4504 ppc_change_csect (sym
, align
);
4506 demand_empty_rest_of_line ();
4509 /* Change to a different csect. */
4512 ppc_change_csect (symbolS
*sym
, offsetT align
)
4514 if (S_IS_DEFINED (sym
))
4515 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4518 struct ppc_xcoff_section
*section
;
4525 /* This is a new csect. We need to look at the symbol class to
4526 figure out whether it should go in the text section or the
4530 switch (symbol_get_tc (sym
)->symbol_class
)
4540 section
= &ppc_xcoff_text_section
;
4550 section
= &ppc_xcoff_data_section
;
4551 if (ppc_toc_csect
!= NULL
4552 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4553 == section
->next_subsegment
))
4557 section
= &ppc_xcoff_bss_section
;
4560 section
= &ppc_xcoff_tdata_section
;
4561 /* Create .tdata section if not yet done. */
4562 if (!ppc_xcoff_section_is_initialized (section
))
4564 ppc_init_xcoff_section (section
, subseg_new (".tdata", 0));
4565 bfd_set_section_flags (section
->segment
, SEC_ALLOC
4566 | SEC_LOAD
| SEC_RELOC
| SEC_DATA
4567 | SEC_THREAD_LOCAL
);
4571 section
= &ppc_xcoff_tbss_section
;
4572 /* Create .tbss section if not yet done. */
4573 if (!ppc_xcoff_section_is_initialized (section
))
4575 ppc_init_xcoff_section (section
, subseg_new (".tbss", 0));
4576 bfd_set_section_flags (section
->segment
, SEC_ALLOC
|
4578 seg_info (section
->segment
)->bss
= 1;
4585 S_SET_SEGMENT (sym
, section
->segment
);
4586 symbol_get_tc (sym
)->subseg
= section
->next_subsegment
;
4587 ++section
->next_subsegment
;
4589 /* We set the obstack chunk size to a small value before
4590 changing subsegments, so that we don't use a lot of memory
4591 space for what may be a small section. */
4592 hold_chunksize
= chunksize
;
4595 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4596 symbol_get_tc (sym
)->subseg
);
4598 chunksize
= hold_chunksize
;
4601 ppc_after_toc_frag
= frag_now
;
4603 record_alignment (sec
, align
);
4605 frag_align_code (align
, 0);
4607 frag_align (align
, 0, 0);
4609 symbol_set_frag (sym
, frag_now
);
4610 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4612 symbol_get_tc (sym
)->align
= align
;
4613 symbol_get_tc (sym
)->output
= 1;
4614 symbol_get_tc (sym
)->within
= sym
;
4616 for (list
= section
->csects
;
4617 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4618 list
= symbol_get_tc (list
)->next
)
4620 symbol_get_tc (list
)->next
= sym
;
4622 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4623 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4627 ppc_current_csect
= sym
;
4631 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4635 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4637 sec
= subseg_new (dw
->xcoff_name
, subseg
);
4638 oldflags
= bfd_section_flags (sec
);
4639 if (oldflags
== SEC_NO_FLAGS
)
4641 /* Just created section. */
4642 gas_assert (dw_sections
[idx
].sect
== NULL
);
4644 bfd_set_section_flags (sec
, SEC_DEBUGGING
);
4645 bfd_set_section_alignment (sec
, 0);
4646 dw_sections
[idx
].sect
= sec
;
4649 /* Not anymore in a csect. */
4650 ppc_current_csect
= NULL
;
4653 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4654 .dwsect flag [, opt-label ]
4658 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4662 const struct xcoff_dwsect_name
*dw
;
4663 struct dw_subsection
*subseg
;
4664 struct dw_section
*dws
;
4668 flag
= get_absolute_expression ();
4670 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4671 if (xcoff_dwsect_names
[i
].flag
== flag
)
4673 dw
= &xcoff_dwsect_names
[i
];
4677 /* Parse opt-label. */
4678 if (*input_line_pointer
== ',')
4683 ++input_line_pointer
;
4685 c
= get_symbol_name (&label
);
4686 opt_label
= symbol_find_or_make (label
);
4687 (void) restore_line_pointer (c
);
4692 demand_empty_rest_of_line ();
4694 /* Return now in case of unknown subsection. */
4697 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4702 /* Find the subsection. */
4703 dws
= &dw_sections
[i
];
4705 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4707 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4708 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4710 as_bad (_("label %s was not defined in this dwarf section"),
4711 S_GET_NAME (opt_label
));
4712 subseg
= dws
->anon_subseg
;
4716 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4721 /* Switch to the subsection. */
4722 ppc_change_debug_section (i
, subseg
->subseg
);
4726 /* Create a new dw subsection. */
4727 subseg
= XCNEW (struct dw_subsection
);
4729 if (opt_label
== NULL
)
4731 /* The anonymous one. */
4733 subseg
->link
= NULL
;
4734 dws
->anon_subseg
= subseg
;
4739 if (dws
->list_subseg
!= NULL
)
4740 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4744 subseg
->link
= dws
->list_subseg
;
4745 dws
->list_subseg
= subseg
;
4746 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4749 ppc_change_debug_section (i
, subseg
->subseg
);
4753 /* Add the length field. */
4754 expressionS
*exp
= &subseg
->end_exp
;
4757 if (opt_label
!= NULL
)
4758 symbol_set_value_now (opt_label
);
4760 /* Add the length field. Note that according to the AIX assembler
4761 manual, the size of the length field is 4 for powerpc32 but
4762 12 for powerpc64. */
4765 /* Write the 64bit marker. */
4766 md_number_to_chars (frag_more (4), -1, 4);
4769 exp
->X_op
= O_subtract
;
4770 exp
->X_op_symbol
= symbol_temp_new_now ();
4771 exp
->X_add_symbol
= symbol_temp_make ();
4773 sz
= ppc_obj64
? 8 : 4;
4774 exp
->X_add_number
= -sz
;
4775 emit_expr (exp
, sz
);
4780 /* This function handles the .text and .data pseudo-ops. These
4781 pseudo-ops aren't really used by XCOFF; we implement them for the
4782 convenience of people who aren't used to XCOFF. */
4785 ppc_section (int type
)
4792 else if (type
== 'd')
4797 sym
= symbol_find_or_make (name
);
4799 ppc_change_csect (sym
, 2);
4801 demand_empty_rest_of_line ();
4804 /* This function handles the .section pseudo-op. This is mostly to
4805 give an error, since XCOFF only supports .text, .data and .bss, but
4806 we do permit the user to name the text or data section. */
4809 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4812 const char *real_name
;
4816 c
= get_symbol_name (&user_name
);
4818 if (strcmp (user_name
, ".text") == 0)
4819 real_name
= ".text[PR]";
4820 else if (strcmp (user_name
, ".data") == 0)
4821 real_name
= ".data[RW]";
4824 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4825 (void) restore_line_pointer (c
);
4826 ignore_rest_of_line ();
4830 (void) restore_line_pointer (c
);
4832 sym
= symbol_find_or_make (real_name
);
4834 ppc_change_csect (sym
, 2);
4836 demand_empty_rest_of_line ();
4839 /* The .extern pseudo-op. We create an undefined symbol. */
4842 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4847 endc
= get_symbol_name (&name
);
4849 (void) symbol_find_or_make (name
);
4851 (void) restore_line_pointer (endc
);
4853 demand_empty_rest_of_line ();
4856 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4859 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4865 endc
= get_symbol_name (&name
);
4867 sym
= symbol_find_or_make (name
);
4869 (void) restore_line_pointer (endc
);
4871 symbol_get_tc (sym
)->output
= 1;
4873 demand_empty_rest_of_line ();
4876 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4877 relocations at the beginning of the current csect.
4879 (In principle, there's no reason why the relocations _have_ to be at
4880 the beginning. Anywhere in the csect would do. However, inserting
4881 at the beginning is what the native assembler does, and it helps to
4882 deal with cases where the .ref statements follow the section contents.)
4884 ??? .refs don't work for empty .csects. However, the native assembler
4885 doesn't report an error in this case, and neither yet do we. */
4888 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4893 if (ppc_current_csect
== NULL
)
4895 as_bad (_(".ref outside .csect"));
4896 ignore_rest_of_line ();
4902 c
= get_symbol_name (&name
);
4904 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4905 symbol_find_or_make (name
), 0, false, BFD_RELOC_NONE
);
4907 *input_line_pointer
= c
;
4908 SKIP_WHITESPACE_AFTER_NAME ();
4909 c
= *input_line_pointer
;
4912 input_line_pointer
++;
4914 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4916 as_bad (_("missing symbol name"));
4917 ignore_rest_of_line ();
4924 demand_empty_rest_of_line ();
4927 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4928 although I don't know why it bothers. */
4931 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4938 endc
= get_symbol_name (&name
);
4940 sym
= symbol_find_or_make (name
);
4942 (void) restore_line_pointer (endc
);
4944 if (*input_line_pointer
!= ',')
4946 as_bad (_("missing rename string"));
4947 ignore_rest_of_line ();
4950 ++input_line_pointer
;
4952 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4954 demand_empty_rest_of_line ();
4957 /* The .stabx pseudo-op. This is similar to a normal .stabs
4958 pseudo-op, but slightly different. A sample is
4959 .stabx "main:F-1",.main,142,0
4960 The first argument is the symbol name to create. The second is the
4961 value, and the third is the storage class. The fourth seems to be
4962 always zero, and I am assuming it is the type. */
4965 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4972 name
= demand_copy_C_string (&len
);
4974 if (*input_line_pointer
!= ',')
4976 as_bad (_("missing value"));
4979 ++input_line_pointer
;
4981 ppc_stab_symbol
= true;
4982 sym
= symbol_make (name
);
4983 ppc_stab_symbol
= false;
4985 symbol_get_tc (sym
)->real_name
= name
;
4987 (void) expression (&exp
);
4994 as_bad (_("illegal .stabx expression; zero assumed"));
4995 exp
.X_add_number
= 0;
4998 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4999 symbol_set_frag (sym
, &zero_address_frag
);
5003 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
5004 symbol_set_value_expression (sym
, &exp
);
5008 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
5009 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
5014 /* The value is some complex expression. This will probably
5015 fail at some later point, but this is probably the right
5016 thing to do here. */
5017 symbol_set_value_expression (sym
, &exp
);
5021 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5022 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5024 if (*input_line_pointer
!= ',')
5026 as_bad (_("missing class"));
5029 ++input_line_pointer
;
5031 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
5033 if (*input_line_pointer
!= ',')
5035 as_bad (_("missing type"));
5038 ++input_line_pointer
;
5040 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
5042 symbol_get_tc (sym
)->output
= 1;
5044 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
5049 .stabx "z",arrays_,133,0
5052 .comm arrays_,13768,3
5054 resolve_symbol_value will copy the exp's "within" into sym's when the
5055 offset is 0. Since this seems to be corner case problem,
5056 only do the correction for storage class C_STSYM. A better solution
5057 would be to have the tc field updated in ppc_symbol_new_hook. */
5059 if (exp
.X_op
== O_symbol
)
5061 if (ppc_current_block
== NULL
)
5062 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
5064 symbol_get_tc (sym
)->within
= ppc_current_block
;
5068 if (exp
.X_op
!= O_symbol
5069 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
5070 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
5071 ppc_frob_label (sym
);
5074 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5075 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
5076 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
5077 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5080 demand_empty_rest_of_line ();
5083 /* The .file pseudo-op. On XCOFF, .file can have several parameters
5084 which are being added to the symbol table to provide additional
5088 ppc_file (int ignore ATTRIBUTE_UNUSED
)
5090 char *sfname
, *s1
= NULL
, *s2
= NULL
, *s3
= NULL
;
5091 int length
, auxnb
= 1;
5093 /* Some assemblers tolerate immediately following '"'. */
5094 if ((sfname
= demand_copy_string (&length
)) != 0)
5096 coff_symbol_type
*coffsym
;
5097 if (*input_line_pointer
== ',')
5099 ++input_line_pointer
;
5100 s1
= demand_copy_string (&length
);
5103 if (*input_line_pointer
== ',')
5105 ++input_line_pointer
;
5106 s2
= demand_copy_string (&length
);
5109 if (*input_line_pointer
== ',')
5111 ++input_line_pointer
;
5112 s3
= demand_copy_string (&length
);
5118 /* Use coff dot_file creation and adjust auxiliary entries. */
5119 c_dot_file_symbol (sfname
, 0);
5120 S_SET_NUMBER_AUXILIARY (symbol_rootP
, auxnb
);
5121 coffsym
= coffsymbol (symbol_get_bfdsym (symbol_rootP
));
5122 coffsym
->native
[1].u
.auxent
.x_file
.x_ftype
= XFT_FN
;
5126 coffsym
->native
[2].u
.auxent
.x_file
.x_ftype
= XFT_CT
;
5127 coffsym
->native
[2].extrap
= s1
;
5131 coffsym
->native
[3].u
.auxent
.x_file
.x_ftype
= XFT_CV
;
5132 coffsym
->native
[3].extrap
= s2
;
5136 coffsym
->native
[4].u
.auxent
.x_file
.x_ftype
= XFT_CD
;
5137 coffsym
->native
[4].extrap
= s3
;
5140 demand_empty_rest_of_line ();
5144 /* The .function pseudo-op. This takes several arguments. The first
5145 argument seems to be the external name of the symbol. The second
5146 argument seems to be the label for the start of the function. gcc
5147 uses the same name for both. I have no idea what the third and
5148 fourth arguments are meant to be. The optional fifth argument is
5149 an expression for the size of the function. In COFF this symbol
5150 gets an aux entry like that used for a csect. */
5153 ppc_function (int ignore ATTRIBUTE_UNUSED
)
5161 endc
= get_symbol_name (&name
);
5163 /* Ignore any [PR] suffix. */
5164 name
= ppc_canonicalize_symbol_name (name
);
5165 s
= strchr (name
, '[');
5166 if (s
!= (char *) NULL
5167 && strcmp (s
+ 1, "PR]") == 0)
5170 ext_sym
= symbol_find_or_make (name
);
5172 (void) restore_line_pointer (endc
);
5174 if (*input_line_pointer
!= ',')
5176 as_bad (_("missing symbol name"));
5177 ignore_rest_of_line ();
5180 ++input_line_pointer
;
5182 endc
= get_symbol_name (&name
);
5184 lab_sym
= symbol_find_or_make (name
);
5186 (void) restore_line_pointer (endc
);
5188 if (ext_sym
!= lab_sym
)
5192 exp
.X_op
= O_symbol
;
5193 exp
.X_add_symbol
= lab_sym
;
5194 exp
.X_op_symbol
= NULL
;
5195 exp
.X_add_number
= 0;
5197 symbol_set_value_expression (ext_sym
, &exp
);
5200 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5201 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5202 symbol_get_tc (ext_sym
)->output
= 1;
5204 if (*input_line_pointer
== ',')
5208 /* Ignore the third argument. */
5209 ++input_line_pointer
;
5211 if (*input_line_pointer
== ',')
5213 /* Ignore the fourth argument. */
5214 ++input_line_pointer
;
5216 if (*input_line_pointer
== ',')
5218 /* The fifth argument is the function size.
5219 If it's omitted, the size will be the containing csect.
5220 This will be donce during ppc_frob_symtab. */
5221 ++input_line_pointer
;
5222 symbol_get_tc (ext_sym
)->u
.size
5223 = symbol_new ("L0\001", absolute_section
,
5224 &zero_address_frag
, 0);
5225 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5230 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5231 SF_SET_FUNCTION (ext_sym
);
5232 SF_SET_PROCESS (ext_sym
);
5233 coff_add_linesym (ext_sym
);
5235 demand_empty_rest_of_line ();
5238 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5239 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5240 with the correct line number */
5242 static symbolS
*saved_bi_sym
= 0;
5245 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5249 sym
= symbol_make (".bf");
5250 S_SET_SEGMENT (sym
, text_section
);
5251 symbol_set_frag (sym
, frag_now
);
5252 S_SET_VALUE (sym
, frag_now_fix ());
5253 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5255 coff_line_base
= get_absolute_expression ();
5257 S_SET_NUMBER_AUXILIARY (sym
, 1);
5258 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5260 /* Line number for bi. */
5263 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5268 symbol_get_tc (sym
)->output
= 1;
5270 ppc_frob_label (sym
);
5272 demand_empty_rest_of_line ();
5275 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5276 ".ef", except that the line number is absolute, not relative to the
5277 most recent ".bf" symbol. */
5280 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5284 sym
= symbol_make (".ef");
5285 S_SET_SEGMENT (sym
, text_section
);
5286 symbol_set_frag (sym
, frag_now
);
5287 S_SET_VALUE (sym
, frag_now_fix ());
5288 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5289 S_SET_NUMBER_AUXILIARY (sym
, 1);
5290 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5291 symbol_get_tc (sym
)->output
= 1;
5293 ppc_frob_label (sym
);
5295 demand_empty_rest_of_line ();
5298 /* The .bi and .ei pseudo-ops. These take a string argument and
5299 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5300 the symbol list. The value of .bi will be know when the next .bf
5306 static symbolS
*last_biei
;
5313 name
= demand_copy_C_string (&len
);
5315 /* The value of these symbols is actually file offset. Here we set
5316 the value to the index into the line number entries. In
5317 ppc_frob_symbols we set the fix_line field, which will cause BFD
5318 to do the right thing. */
5320 sym
= symbol_make (name
);
5321 /* obj-coff.c currently only handles line numbers correctly in the
5323 S_SET_SEGMENT (sym
, text_section
);
5324 S_SET_VALUE (sym
, coff_n_line_nos
);
5325 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5327 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5328 symbol_get_tc (sym
)->output
= 1;
5336 for (look
= last_biei
? last_biei
: symbol_rootP
;
5337 (look
!= (symbolS
*) NULL
5338 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5339 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5340 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5341 look
= symbol_next (look
))
5343 if (look
!= (symbolS
*) NULL
)
5345 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5346 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5350 demand_empty_rest_of_line ();
5353 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5354 There is one argument, which is a csect symbol. The value of the
5355 .bs symbol is the index of this csect symbol. */
5358 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5365 if (ppc_current_block
!= NULL
)
5366 as_bad (_("nested .bs blocks"));
5368 endc
= get_symbol_name (&name
);
5370 csect
= symbol_find_or_make (name
);
5372 (void) restore_line_pointer (endc
);
5374 sym
= symbol_make (".bs");
5375 S_SET_SEGMENT (sym
, now_seg
);
5376 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5377 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5378 symbol_get_tc (sym
)->output
= 1;
5380 symbol_get_tc (sym
)->within
= csect
;
5382 ppc_frob_label (sym
);
5384 ppc_current_block
= sym
;
5386 demand_empty_rest_of_line ();
5389 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5392 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5396 if (ppc_current_block
== NULL
)
5397 as_bad (_(".es without preceding .bs"));
5399 sym
= symbol_make (".es");
5400 S_SET_SEGMENT (sym
, now_seg
);
5401 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5402 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5403 symbol_get_tc (sym
)->output
= 1;
5405 ppc_frob_label (sym
);
5407 ppc_current_block
= NULL
;
5409 demand_empty_rest_of_line ();
5412 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5416 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5420 sym
= symbol_make (".bb");
5421 S_SET_SEGMENT (sym
, text_section
);
5422 symbol_set_frag (sym
, frag_now
);
5423 S_SET_VALUE (sym
, frag_now_fix ());
5424 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5426 S_SET_NUMBER_AUXILIARY (sym
, 1);
5427 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5429 symbol_get_tc (sym
)->output
= 1;
5431 SF_SET_PROCESS (sym
);
5433 ppc_frob_label (sym
);
5435 demand_empty_rest_of_line ();
5438 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5442 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5446 sym
= symbol_make (".eb");
5447 S_SET_SEGMENT (sym
, text_section
);
5448 symbol_set_frag (sym
, frag_now
);
5449 S_SET_VALUE (sym
, frag_now_fix ());
5450 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5451 S_SET_NUMBER_AUXILIARY (sym
, 1);
5452 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5453 symbol_get_tc (sym
)->output
= 1;
5455 SF_SET_PROCESS (sym
);
5457 ppc_frob_label (sym
);
5459 demand_empty_rest_of_line ();
5462 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5466 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5472 name
= demand_copy_C_string (&len
);
5473 sym
= symbol_make (name
);
5474 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5475 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5476 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5477 S_SET_VALUE (sym
, 0);
5478 symbol_get_tc (sym
)->output
= 1;
5480 ppc_frob_label (sym
);
5482 demand_empty_rest_of_line ();
5485 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5488 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5492 sym
= symbol_make (".ec");
5493 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5494 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5495 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5496 S_SET_VALUE (sym
, 0);
5497 symbol_get_tc (sym
)->output
= 1;
5499 ppc_frob_label (sym
);
5501 demand_empty_rest_of_line ();
5504 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5507 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5509 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5510 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5517 subseg
= ppc_xcoff_data_section
.next_subsegment
;
5518 ++ppc_xcoff_data_section
.next_subsegment
;
5520 subseg_new (segment_name (data_section
), subseg
);
5521 ppc_toc_frag
= frag_now
;
5523 sym
= symbol_find_or_make ("TOC[TC0]");
5524 symbol_set_frag (sym
, frag_now
);
5525 S_SET_SEGMENT (sym
, data_section
);
5526 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5527 symbol_get_tc (sym
)->subseg
= subseg
;
5528 symbol_get_tc (sym
)->output
= 1;
5529 symbol_get_tc (sym
)->within
= sym
;
5531 ppc_toc_csect
= sym
;
5533 for (list
= ppc_xcoff_data_section
.csects
;
5534 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5535 list
= symbol_get_tc (list
)->next
)
5537 symbol_get_tc (list
)->next
= sym
;
5539 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5540 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5544 ppc_current_csect
= ppc_toc_csect
;
5546 demand_empty_rest_of_line ();
5549 /* The AIX assembler automatically aligns the operands of a .long or
5550 .short pseudo-op, and we want to be compatible. */
5553 ppc_xcoff_cons (int log_size
)
5555 frag_align (log_size
, 0, 0);
5556 record_alignment (now_seg
, log_size
);
5557 cons (1 << log_size
);
5561 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5566 (void) expression (&exp
);
5568 if (exp
.X_op
!= O_constant
)
5570 as_bad (_("non-constant byte count"));
5574 byte_count
= exp
.X_add_number
;
5576 if (*input_line_pointer
!= ',')
5578 as_bad (_("missing value"));
5582 ++input_line_pointer
;
5587 ppc_xcoff_end (void)
5591 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5593 struct dw_section
*dws
= &dw_sections
[i
];
5594 struct dw_subsection
*dwss
;
5596 if (dws
->anon_subseg
)
5598 dwss
= dws
->anon_subseg
;
5599 dwss
->link
= dws
->list_subseg
;
5602 dwss
= dws
->list_subseg
;
5604 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5605 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5607 subseg_set (dws
->sect
, dwss
->subseg
);
5608 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5614 #endif /* OBJ_XCOFF */
5615 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5617 /* The .tc pseudo-op. This is used when generating either XCOFF or
5618 ELF. This takes two or more arguments.
5620 When generating XCOFF output, the first argument is the name to
5621 give to this location in the toc; this will be a symbol with class
5622 TC. The rest of the arguments are N-byte values to actually put at
5623 this location in the TOC; often there is just one more argument, a
5624 relocatable symbol reference. The size of the value to store
5625 depends on target word size. A 32-bit target uses 4-byte values, a
5626 64-bit target uses 8-byte values.
5628 When not generating XCOFF output, the arguments are the same, but
5629 the first argument is simply ignored. */
5632 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5636 /* Define the TOC symbol name. */
5642 if (ppc_toc_csect
== (symbolS
*) NULL
5643 || ppc_toc_csect
!= ppc_current_csect
)
5645 as_bad (_(".tc not in .toc section"));
5646 ignore_rest_of_line ();
5650 endc
= get_symbol_name (&name
);
5652 sym
= symbol_find_or_make (name
);
5654 (void) restore_line_pointer (endc
);
5656 if (S_IS_DEFINED (sym
))
5660 label
= symbol_get_tc (ppc_current_csect
)->within
;
5661 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5663 as_bad (_(".tc with no label"));
5664 ignore_rest_of_line ();
5668 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5669 symbol_set_frag (label
, symbol_get_frag (sym
));
5670 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5672 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5673 ++input_line_pointer
;
5678 S_SET_SEGMENT (sym
, now_seg
);
5679 symbol_set_frag (sym
, frag_now
);
5680 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5682 /* AIX assembler seems to allow any storage class to be set in .tc.
5683 But for now, only XMC_TC and XMC_TE are supported by us. */
5684 switch (symbol_get_tc (sym
)->symbol_class
)
5691 as_bad (_(".tc with storage class %d not yet supported"),
5692 symbol_get_tc (sym
)->symbol_class
);
5693 ignore_rest_of_line ();
5696 symbol_get_tc (sym
)->output
= 1;
5698 ppc_frob_label (sym
);
5701 #endif /* OBJ_XCOFF */
5705 /* Skip the TOC symbol name. */
5706 while (is_part_of_name (*input_line_pointer
)
5707 || *input_line_pointer
== ' '
5708 || *input_line_pointer
== '['
5709 || *input_line_pointer
== ']'
5710 || *input_line_pointer
== '{'
5711 || *input_line_pointer
== '}')
5712 ++input_line_pointer
;
5714 /* Align to a four/eight byte boundary. */
5715 align
= ppc_obj64
? 3 : 2;
5716 frag_align (align
, 0, 0);
5717 record_alignment (now_seg
, align
);
5718 #endif /* OBJ_ELF */
5720 if (*input_line_pointer
!= ',')
5721 demand_empty_rest_of_line ();
5724 ++input_line_pointer
;
5725 cons (ppc_obj64
? 8 : 4);
5729 /* Pseudo-op .machine. */
5732 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5736 #define MAX_HISTORY 100
5737 static ppc_cpu_t
*cpu_history
;
5738 static int curr_hist
;
5742 c
= get_symbol_name (&cpu_string
);
5743 cpu_string
= xstrdup (cpu_string
);
5744 (void) restore_line_pointer (c
);
5746 if (cpu_string
!= NULL
)
5748 ppc_cpu_t old_cpu
= ppc_cpu
;
5751 for (p
= cpu_string
; *p
!= 0; p
++)
5754 if (strcmp (cpu_string
, "push") == 0)
5756 if (cpu_history
== NULL
)
5757 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5759 if (curr_hist
>= MAX_HISTORY
)
5760 as_bad (_(".machine stack overflow"));
5762 cpu_history
[curr_hist
++] = ppc_cpu
;
5764 else if (strcmp (cpu_string
, "pop") == 0)
5767 as_bad (_(".machine stack underflow"));
5769 ppc_cpu
= cpu_history
[--curr_hist
];
5774 /* Not using the global "sticky" variable here results in
5775 none of the extra functional unit command line options,
5776 -many, -maltivec, -mspe, -mspe2, -mvle, -mvsx, being in
5777 force after selecting a new cpu with .machine.
5778 ".machine altivec" and other extra functional unit
5779 options do not count as a new machine, instead they add
5780 to currently selected opcodes. */
5781 ppc_cpu_t machine_sticky
= 0;
5782 new_cpu
= ppc_parse_cpu (ppc_cpu
, &machine_sticky
, cpu_string
);
5786 as_bad (_("invalid machine `%s'"), cpu_string
);
5789 if (ppc_cpu
!= old_cpu
)
5790 ppc_setup_opcodes ();
5793 demand_empty_rest_of_line ();
5795 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5799 /* XCOFF specific symbol and file handling. */
5801 /* Canonicalize the symbol name. We use the to force the suffix, if
5802 any, to use square brackets, and to be in upper case. */
5805 ppc_canonicalize_symbol_name (char *name
)
5809 if (ppc_stab_symbol
)
5812 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5826 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5829 if (*s
== '\0' || s
[1] != '\0')
5830 as_bad (_("bad symbol suffix"));
5838 /* Set the class of a symbol based on the suffix, if any. This is
5839 called whenever a new symbol is created. */
5842 ppc_symbol_new_hook (symbolS
*sym
)
5844 struct ppc_tc_sy
*tc
;
5847 tc
= symbol_get_tc (sym
);
5850 tc
->symbol_class
= -1;
5851 tc
->real_name
= NULL
;
5858 if (ppc_stab_symbol
)
5861 s
= strchr (S_GET_NAME (sym
), '[');
5862 if (s
== (const char *) NULL
)
5864 /* There is no suffix. */
5873 if (strcmp (s
, "BS]") == 0)
5874 tc
->symbol_class
= XMC_BS
;
5877 if (strcmp (s
, "DB]") == 0)
5878 tc
->symbol_class
= XMC_DB
;
5879 else if (strcmp (s
, "DS]") == 0)
5880 tc
->symbol_class
= XMC_DS
;
5883 if (strcmp (s
, "GL]") == 0)
5884 tc
->symbol_class
= XMC_GL
;
5887 if (strcmp (s
, "PR]") == 0)
5888 tc
->symbol_class
= XMC_PR
;
5891 if (strcmp (s
, "RO]") == 0)
5892 tc
->symbol_class
= XMC_RO
;
5893 else if (strcmp (s
, "RW]") == 0)
5894 tc
->symbol_class
= XMC_RW
;
5897 if (strcmp (s
, "SV]") == 0)
5898 tc
->symbol_class
= XMC_SV
;
5901 if (strcmp (s
, "TC]") == 0)
5902 tc
->symbol_class
= XMC_TC
;
5903 else if (strcmp (s
, "TI]") == 0)
5904 tc
->symbol_class
= XMC_TI
;
5905 else if (strcmp (s
, "TB]") == 0)
5906 tc
->symbol_class
= XMC_TB
;
5907 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
5908 tc
->symbol_class
= XMC_TC0
;
5909 else if (strcmp (s
, "TE]") == 0)
5910 tc
->symbol_class
= XMC_TE
;
5911 else if (strcmp (s
, "TL]") == 0)
5912 tc
->symbol_class
= XMC_TL
;
5915 if (strcmp (s
, "UA]") == 0)
5916 tc
->symbol_class
= XMC_UA
;
5917 else if (strcmp (s
, "UC]") == 0)
5918 tc
->symbol_class
= XMC_UC
;
5919 else if (strcmp (s
, "UL]") == 0)
5920 tc
->symbol_class
= XMC_UL
;
5923 if (strcmp (s
, "XO]") == 0)
5924 tc
->symbol_class
= XMC_XO
;
5928 if (tc
->symbol_class
== -1)
5929 as_bad (_("unrecognized symbol suffix"));
5932 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5933 seen. It tells ppc_adjust_symtab whether it needs to look through
5936 static bool ppc_saw_abs
;
5938 /* Change the name of a symbol just before writing it out. Set the
5939 real name if the .rename pseudo-op was used. Otherwise, remove any
5940 class suffix. Return 1 if the symbol should not be included in the
5944 ppc_frob_symbol (symbolS
*sym
)
5946 static symbolS
*ppc_last_function
;
5947 static symbolS
*set_end
;
5949 /* Discard symbols that should not be included in the output symbol
5951 if (! symbol_used_in_reloc_p (sym
)
5952 && S_GET_STORAGE_CLASS (sym
) != C_DWARF
5953 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
5954 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5955 && ! symbol_get_tc (sym
)->output
5956 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
5959 /* This one will disappear anyway. Don't make a csect sym for it. */
5960 if (sym
== abs_section_sym
)
5963 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
5964 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
5970 name
= S_GET_NAME (sym
);
5971 s
= strchr (name
, '[');
5972 if (s
!= (char *) NULL
)
5978 snew
= xstrndup (name
, len
);
5980 S_SET_NAME (sym
, snew
);
5984 if (set_end
!= (symbolS
*) NULL
)
5986 SA_SET_SYM_ENDNDX (set_end
, sym
);
5990 if (SF_GET_FUNCTION (sym
))
5992 /* Make sure coff_last_function is reset. Otherwise, we won't create
5993 the auxent for the next function. */
5994 coff_last_function
= 0;
5995 ppc_last_function
= sym
;
5996 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
5998 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
5999 SA_SET_SYM_FSIZE (sym
,
6000 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6004 /* Size of containing csect. */
6005 symbolS
* within
= symbol_get_tc (sym
)->within
;
6006 union internal_auxent
*csectaux
;
6007 csectaux
= &coffsymbol (symbol_get_bfdsym (within
))
6008 ->native
[S_GET_NUMBER_AUXILIARY(within
)].u
.auxent
;
6010 SA_SET_SYM_FSIZE (sym
, csectaux
->x_csect
.x_scnlen
.l
);
6013 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6014 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6016 if (ppc_last_function
== (symbolS
*) NULL
)
6017 as_bad (_(".ef with no preceding .function"));
6020 set_end
= ppc_last_function
;
6021 ppc_last_function
= NULL
;
6023 /* We don't have a C_EFCN symbol, but we need to force the
6024 COFF backend to believe that it has seen one. */
6025 coff_last_function
= NULL
;
6029 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6030 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6031 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6032 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6033 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6034 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6035 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6036 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6037 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6038 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6039 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6041 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6042 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6043 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6046 union internal_auxent
*a
;
6048 /* Create a csect aux. */
6049 i
= S_GET_NUMBER_AUXILIARY (sym
);
6050 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6051 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6052 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6054 /* This is the TOC table. */
6055 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6056 a
->x_csect
.x_scnlen
.l
= 0;
6057 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6059 else if (symbol_get_tc (sym
)->subseg
!= 0)
6061 /* This is a csect symbol. x_scnlen is the size of the
6063 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6064 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (S_GET_SEGMENT (sym
))
6065 - S_GET_VALUE (sym
));
6068 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6069 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6070 - S_GET_VALUE (sym
));
6072 if (symbol_get_tc (sym
)->symbol_class
== XMC_BS
6073 || symbol_get_tc (sym
)->symbol_class
== XMC_UL
)
6074 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6076 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6078 else if (S_GET_SEGMENT (sym
) == bss_section
6079 || S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6081 /* This is a common symbol. */
6082 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6083 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6084 if (S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6085 symbol_get_tc (sym
)->symbol_class
= XMC_UL
;
6086 else if (S_IS_EXTERNAL (sym
))
6087 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6089 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6091 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6093 /* This is an absolute symbol. The csect will be created by
6094 ppc_adjust_symtab. */
6096 a
->x_csect
.x_smtyp
= XTY_LD
;
6097 if (symbol_get_tc (sym
)->symbol_class
== -1)
6098 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6100 else if (! S_IS_DEFINED (sym
))
6102 /* This is an external symbol. */
6103 a
->x_csect
.x_scnlen
.l
= 0;
6104 a
->x_csect
.x_smtyp
= XTY_ER
;
6106 else if (ppc_is_toc_sym (sym
))
6110 /* This is a TOC definition. x_scnlen is the size of the
6112 next
= symbol_next (sym
);
6113 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6114 next
= symbol_next (next
);
6115 if (next
== (symbolS
*) NULL
6116 || (!ppc_is_toc_sym (next
)))
6118 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6119 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (data_section
)
6120 - S_GET_VALUE (sym
));
6122 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6123 - S_GET_VALUE (sym
));
6127 resolve_symbol_value (next
);
6128 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6129 - S_GET_VALUE (sym
));
6131 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6137 /* This is a normal symbol definition. x_scnlen is the
6138 symbol index of the containing csect. */
6139 if (S_GET_SEGMENT (sym
) == text_section
)
6140 csect
= ppc_xcoff_text_section
.csects
;
6141 else if (S_GET_SEGMENT (sym
) == data_section
)
6142 csect
= ppc_xcoff_data_section
.csects
;
6143 else if (S_GET_SEGMENT (sym
) == ppc_xcoff_tdata_section
.segment
)
6144 csect
= ppc_xcoff_tdata_section
.csects
;
6148 /* Skip the initial dummy symbol. */
6149 csect
= symbol_get_tc (csect
)->next
;
6151 if (csect
== (symbolS
*) NULL
)
6153 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6154 a
->x_csect
.x_scnlen
.l
= 0;
6158 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6160 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6161 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6162 > S_GET_VALUE (sym
))
6164 csect
= symbol_get_tc (csect
)->next
;
6167 a
->x_csect
.x_scnlen
.p
=
6168 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6169 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6172 a
->x_csect
.x_smtyp
= XTY_LD
;
6175 a
->x_csect
.x_parmhash
= 0;
6176 a
->x_csect
.x_snhash
= 0;
6177 if (symbol_get_tc (sym
)->symbol_class
== -1)
6178 a
->x_csect
.x_smclas
= XMC_PR
;
6180 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6181 a
->x_csect
.x_stab
= 0;
6182 a
->x_csect
.x_snstab
= 0;
6184 /* Don't let the COFF backend resort these symbols. */
6185 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6187 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6189 /* We want the value to be the symbol index of the referenced
6190 csect symbol. BFD will do that for us if we set the right
6192 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6193 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6195 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6196 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6198 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6203 block
= symbol_get_tc (sym
)->within
;
6206 /* The value is the offset from the enclosing csect. */
6209 csect
= symbol_get_tc (block
)->within
;
6210 resolve_symbol_value (csect
);
6211 base
= S_GET_VALUE (csect
);
6216 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6218 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6219 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6221 /* We want the value to be a file offset into the line numbers.
6222 BFD will do that for us if we set the right flags. We have
6223 already set the value correctly. */
6224 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6230 /* Adjust the symbol table. */
6233 ppc_adjust_symtab (void)
6238 /* Make sure C_DWARF symbols come right after C_FILE.
6239 As the C_FILE might not be defined yet and as C_DWARF
6240 might already be ordered, we insert them before the
6241 first symbol which isn't a C_FILE or a C_DWARF. */
6242 for (anchorSym
= symbol_rootP
; anchorSym
!= NULL
;
6243 anchorSym
= symbol_next (anchorSym
))
6245 if (S_GET_STORAGE_CLASS (anchorSym
) != C_FILE
6246 && S_GET_STORAGE_CLASS (anchorSym
) != C_DWARF
)
6253 if (S_GET_STORAGE_CLASS (sym
) != C_DWARF
)
6255 sym
= symbol_next (sym
);
6259 symbolS
* tsym
= sym
;
6260 sym
= symbol_next (sym
);
6262 symbol_remove (tsym
, &symbol_rootP
, &symbol_lastP
);
6263 symbol_insert (tsym
, anchorSym
, &symbol_rootP
, &symbol_lastP
);
6266 /* Create csect symbols for all absolute symbols. */
6271 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6275 union internal_auxent
*a
;
6277 if (S_GET_SEGMENT (sym
) != absolute_section
)
6280 csect
= symbol_create (".abs[XO]", absolute_section
,
6281 &zero_address_frag
, S_GET_VALUE (sym
));
6282 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6283 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6284 i
= S_GET_NUMBER_AUXILIARY (csect
);
6285 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6286 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6287 a
->x_csect
.x_scnlen
.l
= 0;
6288 a
->x_csect
.x_smtyp
= XTY_SD
;
6289 a
->x_csect
.x_parmhash
= 0;
6290 a
->x_csect
.x_snhash
= 0;
6291 a
->x_csect
.x_smclas
= XMC_XO
;
6292 a
->x_csect
.x_stab
= 0;
6293 a
->x_csect
.x_snstab
= 0;
6295 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6297 i
= S_GET_NUMBER_AUXILIARY (sym
);
6298 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6299 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6300 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6303 ppc_saw_abs
= false;
6306 /* Set the VMA for a section. This is called on all the sections in
6310 ppc_frob_section (asection
*sec
)
6312 static bfd_vma vma
= 0;
6314 /* Dwarf sections start at 0. */
6315 if (bfd_section_flags (sec
) & SEC_DEBUGGING
)
6318 vma
= md_section_align (sec
, vma
);
6319 bfd_set_section_vma (sec
, vma
);
6320 vma
+= bfd_section_size (sec
);
6323 #endif /* OBJ_XCOFF */
6326 md_atof (int type
, char *litp
, int *sizep
)
6328 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6331 /* Write a value out to the object file, using the appropriate
6335 md_number_to_chars (char *buf
, valueT val
, int n
)
6337 if (target_big_endian
)
6338 number_to_chars_bigendian (buf
, val
, n
);
6340 number_to_chars_littleendian (buf
, val
, n
);
6343 /* Align a section (I don't know why this is machine dependent). */
6346 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6351 int align
= bfd_section_alignment (seg
);
6353 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6357 /* We don't have any form of relaxing. */
6360 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6361 asection
*seg ATTRIBUTE_UNUSED
)
6367 /* Convert a machine dependent frag. We never generate these. */
6370 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6371 asection
*sec ATTRIBUTE_UNUSED
,
6372 fragS
*fragp ATTRIBUTE_UNUSED
)
6377 /* We have no need to default values of symbols. */
6380 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6385 /* Functions concerning relocs. */
6387 /* The location from which a PC relative jump should be calculated,
6388 given a PC relative reloc. */
6391 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6393 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6398 /* Return the surrending csect for sym when possible. */
6401 ppc_get_csect_to_adjust (symbolS
*sym
)
6406 valueT val
= resolve_symbol_value (sym
);
6407 TC_SYMFIELD_TYPE
*tc
= symbol_get_tc (sym
);
6408 segT symseg
= S_GET_SEGMENT (sym
);
6411 && tc
->symbol_class
!= XMC_TC0
6412 && tc
->symbol_class
!= XMC_TC
6413 && tc
->symbol_class
!= XMC_TE
6414 && symseg
!= bss_section
6415 && symseg
!= ppc_xcoff_tbss_section
.segment
6416 /* Don't adjust if this is a reloc in the toc section. */
6417 && (symseg
!= data_section
6418 || ppc_toc_csect
== NULL
6419 || val
< ppc_toc_frag
->fr_address
6420 || (ppc_after_toc_frag
!= NULL
6421 && val
>= ppc_after_toc_frag
->fr_address
)))
6423 symbolS
* csect
= tc
->within
;
6425 /* If the symbol was not declared by a label (eg: a section symbol),
6426 use the section instead of the csect. This doesn't happen in
6427 normal AIX assembly code. */
6429 csect
= seg_info (symseg
)->sym
;
6437 /* This is called to see whether a fixup should be adjusted to use a
6438 section symbol. We take the opportunity to change a fixup against
6439 a symbol in the TOC subsegment into a reloc against the
6440 corresponding .tc symbol. */
6443 ppc_fix_adjustable (fixS
*fix
)
6445 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6446 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6449 if (symseg
== absolute_section
)
6452 /* Always adjust symbols in debugging sections. */
6453 if (bfd_section_flags (symseg
) & SEC_DEBUGGING
)
6456 if (ppc_toc_csect
!= (symbolS
*) NULL
6457 && fix
->fx_addsy
!= ppc_toc_csect
6458 && symseg
== data_section
6459 && val
>= ppc_toc_frag
->fr_address
6460 && (ppc_after_toc_frag
== (fragS
*) NULL
6461 || val
< ppc_after_toc_frag
->fr_address
))
6465 for (sy
= symbol_next (ppc_toc_csect
);
6466 sy
!= (symbolS
*) NULL
;
6467 sy
= symbol_next (sy
))
6469 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6471 if (sy_tc
->symbol_class
== XMC_TC0
)
6473 if (sy_tc
->symbol_class
!= XMC_TC
6474 && sy_tc
->symbol_class
!= XMC_TE
)
6476 if (val
== resolve_symbol_value (sy
))
6479 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6484 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6485 _("symbol in .toc does not match any .tc"));
6488 /* Possibly adjust the reloc to be against the csect. */
6489 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_addsy
)) != NULL
)
6491 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6492 fix
->fx_addsy
= csect
;
6495 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_subsy
)) != NULL
)
6497 fix
->fx_offset
-= resolve_symbol_value (fix
->fx_subsy
)
6498 - symbol_get_frag (csect
)->fr_address
;
6499 fix
->fx_subsy
= csect
;
6502 /* Adjust a reloc against a .lcomm symbol to be against the base
6504 if (symseg
== bss_section
6505 && ! S_IS_EXTERNAL (fix
->fx_addsy
)
6506 && symbol_get_tc (fix
->fx_addsy
)->subseg
== 0)
6508 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6510 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6517 /* A reloc from one csect to another must be kept. The assembler
6518 will, of course, keep relocs between sections, and it will keep
6519 absolute relocs, but we need to force it to keep PC relative relocs
6520 between two csects in the same section. */
6523 ppc_force_relocation (fixS
*fix
)
6525 /* At this point fix->fx_addsy should already have been converted to
6526 a csect symbol. If the csect does not include the fragment, then
6527 we need to force the relocation. */
6529 && fix
->fx_addsy
!= NULL
6530 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6531 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6532 > fix
->fx_frag
->fr_address
)
6533 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6534 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6535 <= fix
->fx_frag
->fr_address
))))
6538 return generic_force_reloc (fix
);
6540 #endif /* OBJ_XCOFF */
6543 /* If this function returns non-zero, it guarantees that a relocation
6544 will be emitted for a fixup. */
6547 ppc_force_relocation (fixS
*fix
)
6549 /* Branch prediction relocations must force a relocation, as must
6550 the vtable description relocs. */
6551 switch (fix
->fx_r_type
)
6553 case BFD_RELOC_PPC_B16_BRTAKEN
:
6554 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6555 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6556 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6557 case BFD_RELOC_24_PLT_PCREL
:
6558 case BFD_RELOC_PPC64_TOC
:
6560 case BFD_RELOC_PPC_B26
:
6561 case BFD_RELOC_PPC_BA26
:
6562 case BFD_RELOC_PPC_B16
:
6563 case BFD_RELOC_PPC_BA16
:
6564 case BFD_RELOC_PPC64_REL24_NOTOC
:
6565 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
6566 /* All branch fixups targeting a localentry symbol must
6567 force a relocation. */
6570 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6571 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6572 gas_assert (elfsym
);
6573 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6581 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6582 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
)
6585 return generic_force_reloc (fix
);
6589 ppc_fix_adjustable (fixS
*fix
)
6591 switch (fix
->fx_r_type
)
6593 /* All branch fixups targeting a localentry symbol must
6594 continue using the symbol. */
6595 case BFD_RELOC_PPC_B26
:
6596 case BFD_RELOC_PPC_BA26
:
6597 case BFD_RELOC_PPC_B16
:
6598 case BFD_RELOC_PPC_BA16
:
6599 case BFD_RELOC_PPC_B16_BRTAKEN
:
6600 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6601 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6602 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6603 case BFD_RELOC_PPC64_REL24_NOTOC
:
6604 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
6607 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6608 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6609 gas_assert (elfsym
);
6610 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6618 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6619 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6620 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6621 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6622 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6623 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6624 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
6625 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
6626 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
6627 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
6628 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
6629 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
6630 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
6631 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
6632 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
6633 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
6634 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
6635 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
6636 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
6637 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
6638 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
6639 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
6640 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
6641 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6642 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
6643 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
6644 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
6645 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6646 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6647 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6648 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
));
6653 ppc_frag_check (struct frag
*fragP
)
6655 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6656 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6657 _("instruction address is not a multiple of %d"),
6658 fragP
->insn_addr
+ 1);
6661 /* rs_align_code frag handling. */
6663 enum ppc_nop_encoding_for_rs_align_code
6672 ppc_nop_select (void)
6674 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
6676 if ((ppc_cpu
& (PPC_OPCODE_POWER9
| PPC_OPCODE_E500MC
)) == 0)
6678 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
6679 return PPC_NOP_GROUP_P7
;
6680 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0)
6681 return PPC_NOP_GROUP_P6
;
6683 return PPC_NOP_VANILLA
;
6687 ppc_handle_align (struct frag
*fragP
)
6689 valueT count
= (fragP
->fr_next
->fr_address
6690 - (fragP
->fr_address
+ fragP
->fr_fix
));
6691 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6692 enum ppc_nop_encoding_for_rs_align_code nop_select
= *dest
& 0xff;
6694 /* Pad with zeros if not inserting a whole number of instructions.
6695 We could pad with zeros up to an instruction boundary then follow
6696 with nops but odd counts indicate data in an executable section
6697 so padding with zeros is most appropriate. */
6699 || (nop_select
== PPC_NOP_VLE
? (count
& 1) != 0 : (count
& 3) != 0))
6705 if (nop_select
== PPC_NOP_VLE
)
6709 md_number_to_chars (dest
, 0x4400, 2);
6715 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6719 /* Make a branch, then follow with nops. Insert another
6720 frag to handle the nops. */
6721 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6726 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6727 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6728 fragP
->fr_next
= rest
;
6730 rest
->fr_address
+= rest
->fr_fix
+ 4;
6732 /* If we leave the next frag as rs_align_code we'll come here
6733 again, resulting in a bunch of branches rather than a
6734 branch followed by nops. */
6735 rest
->fr_type
= rs_align
;
6736 dest
= rest
->fr_literal
;
6739 md_number_to_chars (dest
, 0x60000000, 4);
6741 if (nop_select
>= PPC_NOP_GROUP_P6
)
6743 /* For power6, power7, and power8, we want the last nop to
6744 be a group terminating one. Do this by inserting an
6745 rs_fill frag immediately after this one, with its address
6746 set to the last nop location. This will automatically
6747 reduce the number of nops in the current frag by one. */
6750 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6752 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6753 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6754 group_nop
->fr_fix
= 0;
6755 group_nop
->fr_offset
= 1;
6756 group_nop
->fr_type
= rs_fill
;
6757 fragP
->fr_next
= group_nop
;
6758 dest
= group_nop
->fr_literal
;
6761 if (nop_select
== PPC_NOP_GROUP_P6
)
6762 /* power6 group terminating nop: "ori 1,1,0". */
6763 md_number_to_chars (dest
, 0x60210000, 4);
6765 /* power7/power8 group terminating nop: "ori 2,2,0". */
6766 md_number_to_chars (dest
, 0x60420000, 4);
6771 /* Apply a fixup to the object code. This is called for all the
6772 fixups we generated by the calls to fix_new_exp, above. */
6775 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6777 valueT value
= * valP
;
6779 const struct powerpc_operand
*operand
;
6782 if (fixP
->fx_addsy
!= NULL
)
6784 /* Hack around bfd_install_relocation brain damage. */
6786 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6788 if (fixP
->fx_addsy
== abs_section_sym
)
6794 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6795 the symbol values. If we are doing this relocation the code in
6796 write.c is going to call bfd_install_relocation, which is also
6797 going to use the symbol value. That means that if the reloc is
6798 fully resolved we want to use *valP since bfd_install_relocation is
6800 However, if the reloc is not fully resolved we do not want to
6801 use *valP, and must use fx_offset instead. If the relocation
6802 is PC-relative, we then need to re-apply md_pcrel_from_section
6803 to this new relocation value. */
6804 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6809 value
= fixP
->fx_offset
;
6811 value
-= md_pcrel_from_section (fixP
, seg
);
6815 /* We are only able to convert some relocs to pc-relative. */
6818 switch (fixP
->fx_r_type
)
6821 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6825 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6829 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6832 case BFD_RELOC_LO16
:
6833 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6836 case BFD_RELOC_HI16
:
6837 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6840 case BFD_RELOC_HI16_S
:
6841 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6844 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6845 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
6848 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6849 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
6852 case BFD_RELOC_PPC64_HIGHER
:
6853 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
6856 case BFD_RELOC_PPC64_HIGHER_S
:
6857 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
6860 case BFD_RELOC_PPC64_HIGHEST
:
6861 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
6864 case BFD_RELOC_PPC64_HIGHEST_S
:
6865 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
6868 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
6869 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
6872 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
6873 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
6876 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
6877 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
6880 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
6881 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
6884 case BFD_RELOC_PPC_16DX_HA
:
6885 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6888 case BFD_RELOC_PPC64_D34
:
6889 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
6892 case BFD_RELOC_PPC64_D28
:
6893 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
6900 else if (!fixP
->fx_done
6901 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
6903 /* addpcis is relative to next insn address. */
6905 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6910 if (fixP
->fx_pcrel_adjust
!= 0)
6912 /* This is a fixup on an instruction. */
6913 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
6915 operand
= &powerpc_operands
[opindex
];
6917 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6918 does not generate a reloc. It uses the offset of `sym' within its
6919 csect. Other usages, such as `.long sym', generate relocs. This
6920 is the documented behaviour of non-TOC symbols. */
6921 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
6922 && (operand
->bitm
& 0xfff0) == 0xfff0
6923 && operand
->shift
== 0
6924 && (operand
->insert
== NULL
|| ppc_obj64
)
6925 && fixP
->fx_addsy
!= NULL
6926 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
6927 && !ppc_is_toc_sym (fixP
->fx_addsy
)
6928 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
6930 value
= fixP
->fx_offset
;
6934 /* During parsing of instructions, a TOC16 reloc is generated for
6935 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6936 in the toc. But at parse time, SYM may be not yet defined, so
6937 check again here. */
6938 if (fixP
->fx_r_type
== BFD_RELOC_16
6939 && fixP
->fx_addsy
!= NULL
6940 && ppc_is_toc_sym (fixP
->fx_addsy
))
6941 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
6945 /* Calculate value to be stored in field. */
6947 switch (fixP
->fx_r_type
)
6950 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
6951 case BFD_RELOC_PPC_VLE_LO16A
:
6952 case BFD_RELOC_PPC_VLE_LO16D
:
6954 case BFD_RELOC_LO16
:
6955 case BFD_RELOC_LO16_PCREL
:
6956 fieldval
= value
& 0xffff;
6958 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6959 fieldval
= SEX16 (fieldval
);
6960 fixP
->fx_no_overflow
= 1;
6963 case BFD_RELOC_HI16
:
6964 case BFD_RELOC_HI16_PCREL
:
6966 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6968 fieldval
= value
>> 16;
6969 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6971 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6972 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6978 case BFD_RELOC_PPC_VLE_HI16A
:
6979 case BFD_RELOC_PPC_VLE_HI16D
:
6980 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6982 fieldval
= PPC_HI (value
);
6983 goto sign_extend_16
;
6985 case BFD_RELOC_HI16_S
:
6986 case BFD_RELOC_HI16_S_PCREL
:
6987 case BFD_RELOC_PPC_16DX_HA
:
6988 case BFD_RELOC_PPC_REL16DX_HA
:
6990 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6992 fieldval
= (value
+ 0x8000) >> 16;
6993 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6995 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6996 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7002 case BFD_RELOC_PPC_VLE_HA16A
:
7003 case BFD_RELOC_PPC_VLE_HA16D
:
7004 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7006 fieldval
= PPC_HA (value
);
7007 goto sign_extend_16
;
7010 case BFD_RELOC_PPC64_HIGHER
:
7011 fieldval
= PPC_HIGHER (value
);
7012 goto sign_extend_16
;
7014 case BFD_RELOC_PPC64_HIGHER_S
:
7015 fieldval
= PPC_HIGHERA (value
);
7016 goto sign_extend_16
;
7018 case BFD_RELOC_PPC64_HIGHEST
:
7019 fieldval
= PPC_HIGHEST (value
);
7020 goto sign_extend_16
;
7022 case BFD_RELOC_PPC64_HIGHEST_S
:
7023 fieldval
= PPC_HIGHESTA (value
);
7024 goto sign_extend_16
;
7031 if (operand
!= NULL
)
7033 /* Handle relocs in an insn. */
7034 switch (fixP
->fx_r_type
)
7037 /* The following relocs can't be calculated by the assembler.
7038 Leave the field zero. */
7039 case BFD_RELOC_PPC_TPREL16
:
7040 case BFD_RELOC_PPC_TPREL16_LO
:
7041 case BFD_RELOC_PPC_TPREL16_HI
:
7042 case BFD_RELOC_PPC_TPREL16_HA
:
7043 case BFD_RELOC_PPC_DTPREL16
:
7044 case BFD_RELOC_PPC_DTPREL16_LO
:
7045 case BFD_RELOC_PPC_DTPREL16_HI
:
7046 case BFD_RELOC_PPC_DTPREL16_HA
:
7047 case BFD_RELOC_PPC_GOT_TLSGD16
:
7048 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7049 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7050 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7051 case BFD_RELOC_PPC_GOT_TLSLD16
:
7052 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7053 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7054 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7055 case BFD_RELOC_PPC_GOT_TPREL16
:
7056 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7057 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7058 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7059 case BFD_RELOC_PPC_GOT_DTPREL16
:
7060 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7061 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7062 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7063 case BFD_RELOC_PPC64_TPREL16_DS
:
7064 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7065 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7066 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7067 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7068 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7069 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7070 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7071 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7072 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7073 case BFD_RELOC_PPC64_DTPREL16_DS
:
7074 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7075 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7076 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7077 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7078 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7079 case BFD_RELOC_PPC64_TPREL34
:
7080 case BFD_RELOC_PPC64_DTPREL34
:
7081 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
7082 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
7083 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
7084 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
7085 gas_assert (fixP
->fx_addsy
!= NULL
);
7086 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7090 /* These also should leave the field zero for the same
7091 reason. Note that older versions of gas wrote values
7092 here. If we want to go back to the old behaviour, then
7093 all _LO and _LO_DS cases will need to be treated like
7094 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7095 case BFD_RELOC_16_GOTOFF
:
7096 case BFD_RELOC_LO16_GOTOFF
:
7097 case BFD_RELOC_HI16_GOTOFF
:
7098 case BFD_RELOC_HI16_S_GOTOFF
:
7099 case BFD_RELOC_LO16_PLTOFF
:
7100 case BFD_RELOC_HI16_PLTOFF
:
7101 case BFD_RELOC_HI16_S_PLTOFF
:
7102 case BFD_RELOC_GPREL16
:
7103 case BFD_RELOC_16_BASEREL
:
7104 case BFD_RELOC_LO16_BASEREL
:
7105 case BFD_RELOC_HI16_BASEREL
:
7106 case BFD_RELOC_HI16_S_BASEREL
:
7107 case BFD_RELOC_PPC_TOC16
:
7108 case BFD_RELOC_PPC64_TOC16_LO
:
7109 case BFD_RELOC_PPC64_TOC16_HI
:
7110 case BFD_RELOC_PPC64_TOC16_HA
:
7111 case BFD_RELOC_PPC64_PLTGOT16
:
7112 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7113 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7114 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7115 case BFD_RELOC_PPC64_GOT16_DS
:
7116 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7117 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7118 case BFD_RELOC_PPC64_SECTOFF_DS
:
7119 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7120 case BFD_RELOC_PPC64_TOC16_DS
:
7121 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7122 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7123 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7124 case BFD_RELOC_PPC_EMB_NADDR16
:
7125 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7126 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7127 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7128 case BFD_RELOC_PPC_EMB_SDAI16
:
7129 case BFD_RELOC_PPC_EMB_SDA2I16
:
7130 case BFD_RELOC_PPC_EMB_SDA2REL
:
7131 case BFD_RELOC_PPC_EMB_SDA21
:
7132 case BFD_RELOC_PPC_EMB_MRKREF
:
7133 case BFD_RELOC_PPC_EMB_RELSEC16
:
7134 case BFD_RELOC_PPC_EMB_RELST_LO
:
7135 case BFD_RELOC_PPC_EMB_RELST_HI
:
7136 case BFD_RELOC_PPC_EMB_RELST_HA
:
7137 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7138 case BFD_RELOC_PPC_EMB_RELSDA
:
7139 case BFD_RELOC_PPC_VLE_SDA21
:
7140 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7141 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7142 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7143 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7144 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7145 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7146 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7147 case BFD_RELOC_PPC64_GOT_PCREL34
:
7148 case BFD_RELOC_PPC64_PLT_PCREL34
:
7149 gas_assert (fixP
->fx_addsy
!= NULL
);
7152 case BFD_RELOC_PPC_TLS
:
7153 case BFD_RELOC_PPC_TLSGD
:
7154 case BFD_RELOC_PPC_TLSLD
:
7155 case BFD_RELOC_PPC64_TLS_PCREL
:
7161 case BFD_RELOC_PPC_B16
:
7162 /* Adjust the offset to the instruction boundary. */
7167 case BFD_RELOC_VTABLE_INHERIT
:
7168 case BFD_RELOC_VTABLE_ENTRY
:
7169 case BFD_RELOC_PPC_DTPMOD
:
7170 case BFD_RELOC_PPC_TPREL
:
7171 case BFD_RELOC_PPC_DTPREL
:
7172 case BFD_RELOC_PPC_COPY
:
7173 case BFD_RELOC_PPC_GLOB_DAT
:
7174 case BFD_RELOC_32_PLT_PCREL
:
7175 case BFD_RELOC_PPC_EMB_NADDR32
:
7176 case BFD_RELOC_PPC64_TOC
:
7177 case BFD_RELOC_CTOR
:
7179 case BFD_RELOC_32_PCREL
:
7182 case BFD_RELOC_64_PCREL
:
7183 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7184 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7185 _("%s unsupported as instruction fixup"),
7186 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7195 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7196 contents can stay at zero. */
7197 #define APPLY_RELOC fixP->fx_done
7199 #define APPLY_RELOC 1
7201 /* We need to call the insert function even when fieldval is
7202 zero if the insert function would translate that zero to a
7203 bit pattern other than all zeros. */
7204 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7207 unsigned char *where
;
7209 /* Fetch the instruction, insert the fully resolved operand
7210 value, and stuff the instruction back again. */
7211 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7212 if (target_big_endian
)
7214 if (fixP
->fx_size
< 4)
7215 insn
= bfd_getb16 (where
);
7218 insn
= bfd_getb32 (where
);
7219 if (fixP
->fx_size
> 4)
7220 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
7225 if (fixP
->fx_size
< 4)
7226 insn
= bfd_getl16 (where
);
7229 insn
= bfd_getl32 (where
);
7230 if (fixP
->fx_size
> 4)
7231 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
7234 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7235 fixP
->tc_fix_data
.ppc_cpu
,
7236 fixP
->fx_file
, fixP
->fx_line
);
7237 if (target_big_endian
)
7239 if (fixP
->fx_size
< 4)
7240 bfd_putb16 (insn
, where
);
7243 if (fixP
->fx_size
> 4)
7245 bfd_putb32 (insn
, where
+ 4);
7248 bfd_putb32 (insn
, where
);
7253 if (fixP
->fx_size
< 4)
7254 bfd_putl16 (insn
, where
);
7257 if (fixP
->fx_size
> 4)
7259 bfd_putl32 (insn
, where
+ 4);
7262 bfd_putl32 (insn
, where
);
7268 /* Nothing else to do here. */
7271 gas_assert (fixP
->fx_addsy
!= NULL
);
7272 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7277 /* Use expr_symbol_where to see if this is an expression
7279 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7280 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7281 _("unresolved expression that must be resolved"));
7283 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7284 _("unsupported relocation against %s"),
7285 S_GET_NAME (fixP
->fx_addsy
));
7292 /* Handle relocs in data. */
7293 switch (fixP
->fx_r_type
)
7295 case BFD_RELOC_VTABLE_INHERIT
:
7297 && !S_IS_DEFINED (fixP
->fx_addsy
)
7298 && !S_IS_WEAK (fixP
->fx_addsy
))
7299 S_SET_WEAK (fixP
->fx_addsy
);
7302 case BFD_RELOC_VTABLE_ENTRY
:
7307 /* These can appear with @l etc. in data. */
7308 case BFD_RELOC_LO16
:
7309 case BFD_RELOC_LO16_PCREL
:
7310 case BFD_RELOC_HI16
:
7311 case BFD_RELOC_HI16_PCREL
:
7312 case BFD_RELOC_HI16_S
:
7313 case BFD_RELOC_HI16_S_PCREL
:
7314 case BFD_RELOC_PPC64_HIGHER
:
7315 case BFD_RELOC_PPC64_HIGHER_S
:
7316 case BFD_RELOC_PPC64_HIGHEST
:
7317 case BFD_RELOC_PPC64_HIGHEST_S
:
7318 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7319 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7320 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7323 case BFD_RELOC_PPC_DTPMOD
:
7324 case BFD_RELOC_PPC_TPREL
:
7325 case BFD_RELOC_PPC_DTPREL
:
7326 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7329 /* Just punt all of these to the linker. */
7330 case BFD_RELOC_PPC_B16_BRTAKEN
:
7331 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7332 case BFD_RELOC_16_GOTOFF
:
7333 case BFD_RELOC_LO16_GOTOFF
:
7334 case BFD_RELOC_HI16_GOTOFF
:
7335 case BFD_RELOC_HI16_S_GOTOFF
:
7336 case BFD_RELOC_LO16_PLTOFF
:
7337 case BFD_RELOC_HI16_PLTOFF
:
7338 case BFD_RELOC_HI16_S_PLTOFF
:
7339 case BFD_RELOC_PPC_COPY
:
7340 case BFD_RELOC_PPC_GLOB_DAT
:
7341 case BFD_RELOC_16_BASEREL
:
7342 case BFD_RELOC_LO16_BASEREL
:
7343 case BFD_RELOC_HI16_BASEREL
:
7344 case BFD_RELOC_HI16_S_BASEREL
:
7345 case BFD_RELOC_PPC_TLS
:
7346 case BFD_RELOC_PPC_DTPREL16_LO
:
7347 case BFD_RELOC_PPC_DTPREL16_HI
:
7348 case BFD_RELOC_PPC_DTPREL16_HA
:
7349 case BFD_RELOC_PPC_TPREL16_LO
:
7350 case BFD_RELOC_PPC_TPREL16_HI
:
7351 case BFD_RELOC_PPC_TPREL16_HA
:
7352 case BFD_RELOC_PPC_GOT_TLSGD16
:
7353 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7354 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7355 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7356 case BFD_RELOC_PPC_GOT_TLSLD16
:
7357 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7358 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7359 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7360 case BFD_RELOC_PPC_GOT_DTPREL16
:
7361 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7362 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7363 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7364 case BFD_RELOC_PPC_GOT_TPREL16
:
7365 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7366 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7367 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7368 case BFD_RELOC_24_PLT_PCREL
:
7369 case BFD_RELOC_PPC_LOCAL24PC
:
7370 case BFD_RELOC_32_PLT_PCREL
:
7371 case BFD_RELOC_GPREL16
:
7372 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7373 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7374 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7375 case BFD_RELOC_PPC_EMB_NADDR32
:
7376 case BFD_RELOC_PPC_EMB_NADDR16
:
7377 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7378 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7379 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7380 case BFD_RELOC_PPC_EMB_SDAI16
:
7381 case BFD_RELOC_PPC_EMB_SDA2REL
:
7382 case BFD_RELOC_PPC_EMB_SDA2I16
:
7383 case BFD_RELOC_PPC_EMB_SDA21
:
7384 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7385 case BFD_RELOC_PPC_EMB_MRKREF
:
7386 case BFD_RELOC_PPC_EMB_RELSEC16
:
7387 case BFD_RELOC_PPC_EMB_RELST_LO
:
7388 case BFD_RELOC_PPC_EMB_RELST_HI
:
7389 case BFD_RELOC_PPC_EMB_RELST_HA
:
7390 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7391 case BFD_RELOC_PPC_EMB_RELSDA
:
7392 case BFD_RELOC_PPC64_TOC
:
7393 case BFD_RELOC_PPC_TOC16
:
7394 case BFD_RELOC_PPC_TOC16_LO
:
7395 case BFD_RELOC_PPC_TOC16_HI
:
7396 case BFD_RELOC_PPC64_TOC16_LO
:
7397 case BFD_RELOC_PPC64_TOC16_HI
:
7398 case BFD_RELOC_PPC64_TOC16_HA
:
7399 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7400 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7401 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7402 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7403 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7404 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7405 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7406 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7407 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7408 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7409 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7410 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7411 case BFD_RELOC_PPC64_TLS_PCREL
:
7417 case BFD_RELOC_PPC_TLSGD
:
7418 case BFD_RELOC_PPC_TLSLD
:
7419 case BFD_RELOC_PPC_TLSLE
:
7420 case BFD_RELOC_PPC_TLSIE
:
7421 case BFD_RELOC_PPC_TLSM
:
7422 case BFD_RELOC_PPC64_TLSGD
:
7423 case BFD_RELOC_PPC64_TLSLD
:
7424 case BFD_RELOC_PPC64_TLSLE
:
7425 case BFD_RELOC_PPC64_TLSIE
:
7426 case BFD_RELOC_PPC64_TLSM
:
7427 gas_assert (fixP
->fx_addsy
!= NULL
);
7428 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7432 /* TLSML relocations are targeting a XMC_TC symbol named
7433 "_$TLSML". We can't check earlier because the relocation
7434 can target any symbol name which will be latter .rename
7436 case BFD_RELOC_PPC_TLSML
:
7437 case BFD_RELOC_PPC64_TLSML
:
7438 gas_assert (fixP
->fx_addsy
!= NULL
);
7439 if (strcmp (symbol_get_tc (fixP
->fx_addsy
)->real_name
, "_$TLSML") != 0)
7441 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7442 _("R_TLSML relocation doesn't target a "
7443 "symbol named \"_$TLSML\". %s"), S_GET_NAME(fixP
->fx_addsy
));
7448 case BFD_RELOC_NONE
:
7450 case BFD_RELOC_CTOR
:
7452 case BFD_RELOC_32_PCREL
:
7455 case BFD_RELOC_64_PCREL
:
7457 case BFD_RELOC_16_PCREL
:
7463 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7468 if (fixP
->fx_size
&& APPLY_RELOC
)
7469 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7470 fieldval
, fixP
->fx_size
);
7472 && (seg
->flags
& SEC_CODE
) != 0
7473 && fixP
->fx_size
== 4
7476 && (fixP
->fx_r_type
== BFD_RELOC_32
7477 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7478 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7479 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7480 _("data in executable section"));
7484 ppc_elf_validate_fix (fixP
, seg
);
7485 fixP
->fx_addnumber
= value
;
7487 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7488 from the section contents. If we are going to be emitting a reloc
7489 then the section contents are immaterial, so don't warn if they
7490 happen to overflow. Leave such warnings to ld. */
7493 fixP
->fx_no_overflow
= 1;
7495 /* Arrange to emit .TOC. as a normal symbol if used in anything
7496 but .TOC.@tocbase. */
7498 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7499 && fixP
->fx_addsy
!= NULL
7500 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7501 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7504 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16
7505 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
7506 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_LO
)
7508 /* We want to use the offset within the toc, not the actual VMA
7510 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7511 - S_GET_VALUE (ppc_toc_csect
));
7513 /* The high bits must be adjusted for the low bits being signed. */
7514 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
) {
7515 fixP
->fx_addnumber
+= 0x8000;
7518 /* Set *valP to avoid errors. */
7521 else if (fixP
->fx_r_type
== BFD_RELOC_PPC_TLSM
7522 || fixP
->fx_r_type
== BFD_RELOC_PPC64_TLSM
)
7523 /* AIX ld expects the section contents for these relocations
7524 to be zero. Arrange for that to occur when
7525 bfd_install_relocation is called. */
7526 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7527 - S_GET_VALUE (fixP
->fx_addsy
));
7529 fixP
->fx_addnumber
= 0;
7533 /* Generate a reloc for a fixup. */
7536 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7538 static arelent
*relocs
[3];
7541 relocs
[0] = reloc
= XNEW (arelent
);
7544 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7545 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7546 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7547 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */
7548 if (fixp
->fx_r_type
== BFD_RELOC_PPC64_TLS_PCREL
)
7550 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7551 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7553 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7554 _("reloc %d not supported by object file format"),
7555 (int) fixp
->fx_r_type
);
7558 reloc
->addend
= fixp
->fx_addnumber
;
7560 if (fixp
->fx_subsy
!= NULL
)
7562 relocs
[1] = reloc
= XNEW (arelent
);
7565 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7566 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
7567 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7569 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_PPC_NEG
);
7570 reloc
->addend
= fixp
->fx_addnumber
;
7572 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7574 as_bad_subtract (fixp
);
7575 free (relocs
[1]->sym_ptr_ptr
);
7577 free (relocs
[0]->sym_ptr_ptr
);
7588 ppc_cfi_frame_initial_instructions (void)
7590 cfi_add_CFA_def_cfa (1, 0);
7594 tc_ppc_regname_to_dw2regnum (char *regname
)
7596 unsigned int regnum
= -1;
7600 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7602 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7603 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7604 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7605 { "spe_acc", 111 }, { "spefscr", 112 }
7608 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7609 if (strcmp (regnames
[i
].name
, regname
) == 0)
7610 return regnames
[i
].dw2regnum
;
7612 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7614 p
= regname
+ 1 + (regname
[1] == '.');
7615 regnum
= strtoul (p
, &q
, 10);
7616 if (p
== q
|| *q
|| regnum
>= 32)
7618 if (regname
[0] == 'f')
7620 else if (regname
[0] == 'v')
7623 else if (regname
[0] == 'c' && regname
[1] == 'r')
7625 p
= regname
+ 2 + (regname
[2] == '.');
7626 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7628 regnum
= p
[0] - '0' + 68;