1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
43 expressionS immediate
;
47 const char comment_chars
[] = "!";
48 const char line_separator_chars
[] = ";";
49 const char line_comment_chars
[] = "!#";
51 static void s_uses
PARAMS ((int));
53 static void sh_count_relocs
PARAMS ((bfd
*, segT
, PTR
));
54 static void sh_frob_section
PARAMS ((bfd
*, segT
, PTR
));
56 static void s_uacons
PARAMS ((int));
57 static sh_opcode_info
*find_cooked_opcode
PARAMS ((char **));
58 static unsigned int assemble_ppi
PARAMS ((char *, sh_opcode_info
*));
59 static void little
PARAMS ((int));
60 static void big
PARAMS ((int));
61 static bfd_reloc_code_real_type sh_elf_suffix
62 PARAMS ((char **str_p
, expressionS
*, expressionS
*new_exp_p
));
63 static int parse_reg
PARAMS ((char *, int *, int *));
64 static symbolS
*dot
PARAMS ((void));
65 static char *parse_exp
PARAMS ((char *, sh_operand_info
*));
66 static char *parse_at
PARAMS ((char *, sh_operand_info
*));
67 static void get_operand
PARAMS ((char **, sh_operand_info
*));
68 static char *get_operands
69 PARAMS ((sh_opcode_info
*, char *, sh_operand_info
*));
70 static sh_opcode_info
*get_specific
71 PARAMS ((sh_opcode_info
*, sh_operand_info
*));
72 static void insert
PARAMS ((char *, int, int, sh_operand_info
*));
73 static void build_relax
PARAMS ((sh_opcode_info
*, sh_operand_info
*));
74 static char *insert_loop_bounds
PARAMS ((char *, sh_operand_info
*));
75 static unsigned int build_Mytes
76 PARAMS ((sh_opcode_info
*, sh_operand_info
*));
79 static void sh_elf_cons
PARAMS ((int));
81 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
86 int ignore ATTRIBUTE_UNUSED
;
88 if (! target_big_endian
)
89 as_bad (_("directive .big encountered when option -big required"));
91 /* Stop further messages. */
92 target_big_endian
= 1;
97 int ignore ATTRIBUTE_UNUSED
;
99 if (target_big_endian
)
100 as_bad (_("directive .little encountered when option -little required"));
102 /* Stop further messages. */
103 target_big_endian
= 0;
106 /* This table describes all the machine specific pseudo-ops the assembler
107 has to support. The fields are:
108 pseudo-op name without dot
109 function to call to execute this pseudo-op
110 Integer arg to pass to the function. */
112 const pseudo_typeS md_pseudo_table
[] =
115 {"long", sh_elf_cons
, 4},
116 {"int", sh_elf_cons
, 4},
117 {"word", sh_elf_cons
, 2},
118 {"short", sh_elf_cons
, 2},
124 {"form", listing_psize
, 0},
125 {"little", little
, 0},
126 {"heading", listing_title
, 0},
127 {"import", s_ignore
, 0},
128 {"page", listing_eject
, 0},
129 {"program", s_ignore
, 0},
131 {"uaword", s_uacons
, 2},
132 {"ualong", s_uacons
, 4},
133 {"uaquad", s_uacons
, 8},
134 {"2byte", s_uacons
, 2},
135 {"4byte", s_uacons
, 4},
136 {"8byte", s_uacons
, 8},
138 {"file", dwarf2_directive_file
, 0 },
139 {"loc", dwarf2_directive_loc
, 0 },
144 /*int md_reloc_size; */
146 int sh_relax
; /* set if -relax seen */
148 /* Whether -small was seen. */
152 /* Whether -dsp was seen. */
156 /* The bit mask of architectures that could
157 accomodate the insns seen so far. */
158 static int valid_arch
;
160 const char EXP_CHARS
[] = "eE";
162 /* Chars that mean this number is a floating point constant. */
165 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
167 #define C(a,b) ENCODE_RELAX(a,b)
169 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
170 #define GET_WHAT(x) ((x>>4))
172 /* These are the three types of relaxable instrction. */
174 #define COND_JUMP_DELAY 2
175 #define UNCOND_JUMP 3
182 #define UNDEF_WORD_DISP 4
187 /* Branch displacements are from the address of the branch plus
188 four, thus all minimum and maximum values have 4 added to them. */
191 #define COND8_LENGTH 2
193 /* There is one extra instruction before the branch, so we must add
194 two more bytes to account for it. */
195 #define COND12_F 4100
196 #define COND12_M -4090
197 #define COND12_LENGTH 6
199 #define COND12_DELAY_LENGTH 4
201 /* ??? The minimum and maximum values are wrong, but this does not matter
202 since this relocation type is not supported yet. */
203 #define COND32_F (1<<30)
204 #define COND32_M -(1<<30)
205 #define COND32_LENGTH 14
207 #define UNCOND12_F 4098
208 #define UNCOND12_M -4092
209 #define UNCOND12_LENGTH 2
211 /* ??? The minimum and maximum values are wrong, but this does not matter
212 since this relocation type is not supported yet. */
213 #define UNCOND32_F (1<<30)
214 #define UNCOND32_M -(1<<30)
215 #define UNCOND32_LENGTH 14
217 #define EMPTY { 0, 0, 0, 0 }
219 const relax_typeS md_relax_table
[C (END
, 0)] = {
220 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
221 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
224 /* C (COND_JUMP, COND8) */
225 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
226 /* C (COND_JUMP, COND12) */
227 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
228 /* C (COND_JUMP, COND32) */
229 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
230 /* C (COND_JUMP, UNDEF_WORD_DISP) */
231 { 0, 0, COND32_LENGTH
, 0, },
233 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
236 /* C (COND_JUMP_DELAY, COND8) */
237 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
238 /* C (COND_JUMP_DELAY, COND12) */
239 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
240 /* C (COND_JUMP_DELAY, COND32) */
241 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
242 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
243 { 0, 0, COND32_LENGTH
, 0, },
245 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
248 /* C (UNCOND_JUMP, UNCOND12) */
249 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
250 /* C (UNCOND_JUMP, UNCOND32) */
251 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
253 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
254 { 0, 0, UNCOND32_LENGTH
, 0, },
256 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
261 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
265 /* Parse @got, etc. and return the desired relocation.
266 If we have additional arithmetic expression, then we fill in new_exp_p. */
267 static bfd_reloc_code_real_type
268 sh_elf_suffix (str_p
, exp_p
, new_exp_p
)
270 expressionS
*exp_p
, *new_exp_p
;
275 bfd_reloc_code_real_type reloc
;
285 #define MAP(str,reloc) { str, sizeof (str)-1, reloc }
287 static struct map_bfd mapping
[] = {
288 MAP ("got", BFD_RELOC_32_GOT_PCREL
),
289 MAP ("plt", BFD_RELOC_32_PLT_PCREL
),
290 MAP ("gotoff", BFD_RELOC_32_GOTOFF
),
291 { (char *)0, 0, BFD_RELOC_UNUSED
}
295 return BFD_RELOC_UNUSED
;
297 for (ch
= *str
, str2
= ident
;
298 (str2
< ident
+ sizeof (ident
) - 1
299 && (ISALNUM (ch
) || ch
== '@'));
301 *str2
++ = TOLOWER (ch
);
307 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
308 if (ch
== ptr
->string
[0]
309 && len
== ptr
->length
310 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0)
312 /* Now check for identifier@suffix+constant */
313 if (*str
== '-' || *str
== '+')
315 char *orig_line
= input_line_pointer
;
317 input_line_pointer
= str
;
318 expression (new_exp_p
);
319 if (new_exp_p
->X_op
== O_constant
)
321 exp_p
->X_add_number
+= new_exp_p
->X_add_number
;
322 str
= input_line_pointer
;
324 if (new_exp_p
->X_op
== O_subtract
)
325 str
= input_line_pointer
;
327 if (&input_line_pointer
!= str_p
)
328 input_line_pointer
= orig_line
;
335 return BFD_RELOC_UNUSED
;
338 /* The regular cons() function, that reads constants, doesn't support
339 suffixes such as @GOT, @GOTOFF and @PLT, that generate
340 machine-specific relocation types. So we must define it here. */
341 /* Clobbers input_line_pointer, checks end-of-line. */
344 register int nbytes
; /* 1=.byte, 2=.word, 4=.long */
346 expressionS exp
, new_exp
;
347 bfd_reloc_code_real_type reloc
;
350 if (is_it_end_of_statement ())
352 demand_empty_rest_of_line ();
359 new_exp
.X_op
= O_absent
;
360 new_exp
.X_add_symbol
= new_exp
.X_op_symbol
= NULL
;
361 /* If the _GLOBAL_OFFSET_TABLE_ symbol hasn't been found yet,
362 use the name of the symbol to tell whether it's the
363 _GLOBAL_OFFSET_TABLE_. If it has, comparing the symbols is
365 if (! GOT_symbol
&& exp
.X_add_symbol
)
366 name
= S_GET_NAME (exp
.X_add_symbol
);
369 /* Check whether this expression involves the
370 _GLOBAL_OFFSET_TABLE_ symbol, by itself or added to a
371 difference of two other symbols. */
372 if (((GOT_symbol
&& GOT_symbol
== exp
.X_add_symbol
)
373 || (! GOT_symbol
&& name
374 && strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0))
375 && (exp
.X_op
== O_symbol
376 || (exp
.X_op
== O_add
377 && ((symbol_get_value_expression (exp
.X_op_symbol
)->X_op
)
380 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
382 int size
= bfd_get_reloc_size (reloc_howto
);
384 if (GOT_symbol
== NULL
)
385 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
388 as_bad (_("%s relocations do not fit in %d bytes\n"),
389 reloc_howto
->name
, nbytes
);
392 register char *p
= frag_more ((int) nbytes
);
393 int offset
= nbytes
- size
;
395 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
,
396 size
, &exp
, 0, TC_RELOC_GLOBAL_OFFSET_TABLE
);
399 /* Check if this symbol involves one of the magic suffixes, such
400 as @GOT, @GOTOFF or @PLT, and determine which relocation type
402 else if ((exp
.X_op
== O_symbol
|| (exp
.X_op
== O_add
&& exp
.X_op_symbol
))
403 && *input_line_pointer
== '@'
404 && ((reloc
= sh_elf_suffix (&input_line_pointer
, &exp
, &new_exp
))
405 != BFD_RELOC_UNUSED
))
407 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
409 int size
= bfd_get_reloc_size (reloc_howto
);
411 /* Force a GOT to be generated. */
412 if (GOT_symbol
== NULL
)
413 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
416 as_bad (_("%s relocations do not fit in %d bytes\n"),
417 reloc_howto
->name
, nbytes
);
420 register char *p
= frag_more ((int) nbytes
);
421 int offset
= nbytes
- size
;
423 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
, size
,
425 if (new_exp
.X_op
!= O_absent
)
426 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
, size
,
427 &new_exp
, 0, BFD_RELOC_32
);
431 emit_expr (&exp
, (unsigned int) nbytes
);
433 while (*input_line_pointer
++ == ',');
435 input_line_pointer
--; /* Put terminator back into stream. */
436 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
438 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
441 demand_empty_rest_of_line ();
446 /* This function is called once, at assembler startup time. This should
447 set up all the tables, etc that the MD part of the assembler needs. */
452 sh_opcode_info
*opcode
;
453 char *prev_name
= "";
456 target_arch
= arch_sh1_up
& ~(sh_dsp
? arch_sh3e_up
: arch_sh_dsp_up
);
457 valid_arch
= target_arch
;
459 opcode_hash_control
= hash_new ();
461 /* Insert unique names into hash table. */
462 for (opcode
= sh_table
; opcode
->name
; opcode
++)
464 if (strcmp (prev_name
, opcode
->name
))
466 if (! (opcode
->arch
& target_arch
))
468 prev_name
= opcode
->name
;
469 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
473 /* Make all the opcodes with the same name point to the same
475 opcode
->name
= prev_name
;
482 static int reg_x
, reg_y
;
486 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
488 /* Try to parse a reg name. Return the number of chars consumed. */
491 parse_reg (src
, mode
, reg
)
496 char l0
= TOLOWER (src
[0]);
497 char l1
= l0
? TOLOWER (src
[1]) : 0;
499 /* We use ! IDENT_CHAR for the next character after the register name, to
500 make sure that we won't accidentally recognize a symbol name such as
501 'sram' or sr_ram as being a reference to the register 'sr'. */
507 if (src
[2] >= '0' && src
[2] <= '5'
508 && ! IDENT_CHAR ((unsigned char) src
[3]))
511 *reg
= 10 + src
[2] - '0';
515 if (l1
>= '0' && l1
<= '9'
516 && ! IDENT_CHAR ((unsigned char) src
[2]))
522 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
523 && ! IDENT_CHAR ((unsigned char) src
[7]))
530 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
535 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
546 if (! IDENT_CHAR ((unsigned char) src
[2]))
552 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
561 if (! IDENT_CHAR ((unsigned char) src
[2]))
567 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
575 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
576 && ! IDENT_CHAR ((unsigned char) src
[3]))
579 *reg
= 4 + (l1
- '0');
582 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
583 && ! IDENT_CHAR ((unsigned char) src
[3]))
586 *reg
= 6 + (l1
- '0');
589 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
590 && ! IDENT_CHAR ((unsigned char) src
[3]))
595 *reg
= n
| ((~n
& 2) << 1);
600 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[3]))
622 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
623 && ! IDENT_CHAR ((unsigned char) src
[2]))
626 *reg
= A_X0_NUM
+ l1
- '0';
630 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
631 && ! IDENT_CHAR ((unsigned char) src
[2]))
634 *reg
= A_Y0_NUM
+ l1
- '0';
638 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
639 && ! IDENT_CHAR ((unsigned char) src
[2]))
642 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
648 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
654 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
655 && ! IDENT_CHAR ((unsigned char) src
[3]))
661 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
662 && ! IDENT_CHAR ((unsigned char) src
[3]))
668 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
669 && ! IDENT_CHAR ((unsigned char) src
[3]))
675 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
676 && ! IDENT_CHAR ((unsigned char) src
[3]))
682 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
688 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
695 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
700 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
702 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
703 and use an uninitialized immediate. */
707 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
708 && ! IDENT_CHAR ((unsigned char) src
[3]))
713 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
714 && ! IDENT_CHAR ((unsigned char) src
[3]))
720 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
721 && ! IDENT_CHAR ((unsigned char) src
[4]))
723 if (TOLOWER (src
[3]) == 'l')
728 if (TOLOWER (src
[3]) == 'h')
734 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
735 && ! IDENT_CHAR ((unsigned char) src
[4]))
740 if (l0
== 'f' && l1
== 'r')
744 if (src
[3] >= '0' && src
[3] <= '5'
745 && ! IDENT_CHAR ((unsigned char) src
[4]))
748 *reg
= 10 + src
[3] - '0';
752 if (src
[2] >= '0' && src
[2] <= '9'
753 && ! IDENT_CHAR ((unsigned char) src
[3]))
756 *reg
= (src
[2] - '0');
760 if (l0
== 'd' && l1
== 'r')
764 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
765 && ! IDENT_CHAR ((unsigned char) src
[4]))
768 *reg
= 10 + src
[3] - '0';
772 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
773 && ! IDENT_CHAR ((unsigned char) src
[3]))
776 *reg
= (src
[2] - '0');
780 if (l0
== 'x' && l1
== 'd')
784 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
785 && ! IDENT_CHAR ((unsigned char) src
[4]))
788 *reg
= 11 + src
[3] - '0';
792 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
793 && ! IDENT_CHAR ((unsigned char) src
[3]))
796 *reg
= (src
[2] - '0') + 1;
800 if (l0
== 'f' && l1
== 'v')
802 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
808 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
809 && ! IDENT_CHAR ((unsigned char) src
[3]))
812 *reg
= (src
[2] - '0');
816 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
817 && TOLOWER (src
[3]) == 'l'
818 && ! IDENT_CHAR ((unsigned char) src
[4]))
824 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
825 && TOLOWER (src
[3]) == 'c'
826 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
832 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
833 && TOLOWER (src
[3]) == 'r'
834 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
848 /* JF: '.' is pseudo symbol with value of current location
849 in current segment. */
850 fake
= FAKE_LABEL_NAME
;
851 return symbol_new (fake
,
853 (valueT
) frag_now_fix (),
865 save
= input_line_pointer
;
866 input_line_pointer
= s
;
867 expression (&op
->immediate
);
868 if (op
->immediate
.X_op
== O_absent
)
869 as_bad (_("missing operand"));
870 new = input_line_pointer
;
871 input_line_pointer
= save
;
875 /* The many forms of operand:
878 @Rn Register indirect
891 pr, gbr, vbr, macl, mach
904 /* Must be predecrement. */
907 len
= parse_reg (src
, &mode
, &(op
->reg
));
909 as_bad (_("illegal register after @-"));
914 else if (src
[0] == '(')
916 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
919 len
= parse_reg (src
, &mode
, &(op
->reg
));
920 if (len
&& mode
== A_REG_N
)
925 as_bad (_("must be @(r0,...)"));
929 /* Now can be rn or gbr */
930 len
= parse_reg (src
, &mode
, &(op
->reg
));
935 else if (mode
== A_REG_N
)
937 op
->type
= A_IND_R0_REG_N
;
941 as_bad (_("syntax error in @(r0,...)"));
946 /* Must be an @(disp,.. thing) */
947 src
= parse_exp (src
, op
);
950 /* Now can be rn, gbr or pc */
951 len
= parse_reg (src
, &mode
, &op
->reg
);
956 op
->type
= A_DISP_REG_N
;
958 else if (mode
== A_GBR
)
960 op
->type
= A_DISP_GBR
;
962 else if (mode
== A_PC
)
964 /* Turn a plain @(4,pc) into @(.+4,pc). */
965 if (op
->immediate
.X_op
== O_constant
)
967 op
->immediate
.X_add_symbol
= dot();
968 op
->immediate
.X_op
= O_symbol
;
970 op
->type
= A_DISP_PC
;
974 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
979 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
984 as_bad (_("expecting )"));
990 src
+= parse_reg (src
, &mode
, &(op
->reg
));
993 as_bad (_("illegal register after @"));
1000 l0
= TOLOWER (src
[0]);
1001 l1
= TOLOWER (src
[1]);
1003 if ((l0
== 'r' && l1
== '8')
1004 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1007 op
->type
= A_PMOD_N
;
1009 if ((l0
== 'r' && l1
== '9')
1010 || (l0
== 'i' && l1
== 'y'))
1013 op
->type
= A_PMODY_N
;
1027 get_operand (ptr
, op
)
1029 sh_operand_info
*op
;
1038 *ptr
= parse_exp (src
, op
);
1043 else if (src
[0] == '@')
1045 *ptr
= parse_at (src
, op
);
1048 len
= parse_reg (src
, &mode
, &(op
->reg
));
1057 /* Not a reg, the only thing left is a displacement. */
1058 *ptr
= parse_exp (src
, op
);
1059 op
->type
= A_DISP_PC
;
1065 get_operands (info
, args
, operand
)
1066 sh_opcode_info
*info
;
1068 sh_operand_info
*operand
;
1073 /* The pre-processor will eliminate whitespace in front of '@'
1074 after the first argument; we may be called multiple times
1075 from assemble_ppi, so don't insist on finding whitespace here. */
1079 get_operand (&ptr
, operand
+ 0);
1086 get_operand (&ptr
, operand
+ 1);
1087 /* ??? Hack: psha/pshl have a varying operand number depending on
1088 the type of the first operand. We handle this by having the
1089 three-operand version first and reducing the number of operands
1090 parsed to two if we see that the first operand is an immediate.
1091 This works because no insn with three operands has an immediate
1092 as first operand. */
1093 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1099 get_operand (&ptr
, operand
+ 2);
1103 operand
[2].type
= 0;
1108 operand
[1].type
= 0;
1109 operand
[2].type
= 0;
1114 operand
[0].type
= 0;
1115 operand
[1].type
= 0;
1116 operand
[2].type
= 0;
1121 /* Passed a pointer to a list of opcodes which use different
1122 addressing modes, return the opcode which matches the opcodes
1125 static sh_opcode_info
*
1126 get_specific (opcode
, operands
)
1127 sh_opcode_info
*opcode
;
1128 sh_operand_info
*operands
;
1130 sh_opcode_info
*this_try
= opcode
;
1131 char *name
= opcode
->name
;
1134 while (opcode
->name
)
1136 this_try
= opcode
++;
1137 if (this_try
->name
!= name
)
1139 /* We've looked so far down the table that we've run out of
1140 opcodes with the same name. */
1144 /* Look at both operands needed by the opcodes and provided by
1145 the user - since an arg test will often fail on the same arg
1146 again and again, we'll try and test the last failing arg the
1147 first on each opcode try. */
1148 for (n
= 0; this_try
->arg
[n
]; n
++)
1150 sh_operand_info
*user
= operands
+ n
;
1151 sh_arg_type arg
= this_try
->arg
[n
];
1163 if (user
->type
!= arg
)
1167 /* opcode needs r0 */
1168 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1172 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1176 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1184 case A_IND_R0_REG_N
:
1195 /* Opcode needs rn */
1196 if (user
->type
!= arg
)
1201 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1216 if (user
->type
!= arg
)
1221 if (user
->type
!= arg
)
1230 case A_IND_R0_REG_M
:
1233 /* Opcode needs rn */
1234 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1240 if (user
->type
!= DSP_REG_N
)
1262 if (user
->type
!= DSP_REG_N
)
1284 if (user
->type
!= DSP_REG_N
)
1306 if (user
->type
!= DSP_REG_N
)
1328 if (user
->type
!= DSP_REG_N
)
1350 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1354 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1358 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1362 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1366 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1376 /* Opcode needs rn */
1377 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1382 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1387 if (user
->type
!= XMTRX_M4
)
1393 printf (_("unhandled %d\n"), arg
);
1397 if ( !(valid_arch
& this_try
->arch
))
1399 valid_arch
&= this_try
->arch
;
1409 insert (where
, how
, pcrel
, op
)
1413 sh_operand_info
*op
;
1415 fix_new_exp (frag_now
,
1416 where
- frag_now
->fr_literal
,
1424 build_relax (opcode
, op
)
1425 sh_opcode_info
*opcode
;
1426 sh_operand_info
*op
;
1428 int high_byte
= target_big_endian
? 0 : 1;
1431 if (opcode
->arg
[0] == A_BDISP8
)
1433 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1434 p
= frag_var (rs_machine_dependent
,
1435 md_relax_table
[C (what
, COND32
)].rlx_length
,
1436 md_relax_table
[C (what
, COND8
)].rlx_length
,
1438 op
->immediate
.X_add_symbol
,
1439 op
->immediate
.X_add_number
,
1441 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1443 else if (opcode
->arg
[0] == A_BDISP12
)
1445 p
= frag_var (rs_machine_dependent
,
1446 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1447 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1449 op
->immediate
.X_add_symbol
,
1450 op
->immediate
.X_add_number
,
1452 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1457 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1460 insert_loop_bounds (output
, operand
)
1462 sh_operand_info
*operand
;
1467 /* Since the low byte of the opcode will be overwritten by the reloc, we
1468 can just stash the high byte into both bytes and ignore endianness. */
1471 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1472 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1476 static int count
= 0;
1478 /* If the last loop insn is a two-byte-insn, it is in danger of being
1479 swapped with the insn after it. To prevent this, create a new
1480 symbol - complete with SH_LABEL reloc - after the last loop insn.
1481 If the last loop insn is four bytes long, the symbol will be
1482 right in the middle, but four byte insns are not swapped anyways. */
1483 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1484 Hence a 9 digit number should be enough to count all REPEATs. */
1486 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1487 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1488 /* Make this a local symbol. */
1490 SF_SET_LOCAL (end_sym
);
1491 #endif /* OBJ_COFF */
1492 symbol_table_insert (end_sym
);
1493 end_sym
->sy_value
= operand
[1].immediate
;
1494 end_sym
->sy_value
.X_add_number
+= 2;
1495 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1498 output
= frag_more (2);
1501 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1502 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1504 return frag_more (2);
1507 /* Now we know what sort of opcodes it is, let's build the bytes. */
1510 build_Mytes (opcode
, operand
)
1511 sh_opcode_info
*opcode
;
1512 sh_operand_info
*operand
;
1516 char *output
= frag_more (2);
1517 unsigned int size
= 2;
1518 int low_byte
= target_big_endian
? 1 : 0;
1524 for (index
= 0; index
< 4; index
++)
1526 sh_nibble_type i
= opcode
->nibbles
[index
];
1536 nbuf
[index
] = reg_n
;
1539 nbuf
[index
] = reg_m
;
1542 if (reg_n
< 2 || reg_n
> 5)
1543 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1544 nbuf
[index
] = (reg_n
& 3) | 4;
1547 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1550 nbuf
[index
] = reg_b
| 0x08;
1553 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
1556 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
1559 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
1562 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
1565 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
1568 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
1571 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
1574 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
1577 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
1580 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
1583 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
1586 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
1589 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
, 1, operand
);
1592 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
, 1, operand
);
1595 output
= insert_loop_bounds (output
, operand
);
1596 nbuf
[index
] = opcode
->nibbles
[3];
1600 printf (_("failed for %d\n"), i
);
1604 if (!target_big_endian
)
1606 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1607 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1611 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1612 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1617 /* Find an opcode at the start of *STR_P in the hash table, and set
1618 *STR_P to the first character after the last one read. */
1620 static sh_opcode_info
*
1621 find_cooked_opcode (str_p
)
1625 unsigned char *op_start
;
1626 unsigned char *op_end
;
1630 /* Drop leading whitespace. */
1634 /* Find the op code end.
1635 The pre-processor will eliminate whitespace in front of
1636 any '@' after the first argument; we may be called from
1637 assemble_ppi, so the opcode might be terminated by an '@'. */
1638 for (op_start
= op_end
= (unsigned char *) (str
);
1641 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
1644 unsigned char c
= op_start
[nlen
];
1646 /* The machine independent code will convert CMP/EQ into cmp/EQ
1647 because it thinks the '/' is the end of the symbol. Moreover,
1648 all but the first sub-insn is a parallel processing insn won't
1649 be capitalized. Instead of hacking up the machine independent
1650 code, we just deal with it here. */
1660 as_bad (_("can't find opcode "));
1662 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
1665 /* Assemble a parallel processing insn. */
1666 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1669 assemble_ppi (op_end
, opcode
)
1671 sh_opcode_info
*opcode
;
1681 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1682 Make sure we encode a defined insn pattern. */
1688 sh_operand_info operand
[3];
1690 if (opcode
->arg
[0] != A_END
)
1691 op_end
= get_operands (opcode
, op_end
, operand
);
1692 opcode
= get_specific (opcode
, operand
);
1695 /* Couldn't find an opcode which matched the operands. */
1696 char *where
= frag_more (2);
1701 as_bad (_("invalid operands for opcode"));
1705 if (opcode
->nibbles
[0] != PPI
)
1706 as_bad (_("insn can't be combined with parallel processing insn"));
1708 switch (opcode
->nibbles
[1])
1713 as_bad (_("multiple movx specifications"));
1718 as_bad (_("multiple movy specifications"));
1724 as_bad (_("multiple movx specifications"));
1725 if (reg_n
< 4 || reg_n
> 5)
1726 as_bad (_("invalid movx address register"));
1727 if (opcode
->nibbles
[2] & 8)
1729 if (reg_m
== A_A1_NUM
)
1731 else if (reg_m
!= A_A0_NUM
)
1732 as_bad (_("invalid movx dsp register"));
1737 as_bad (_("invalid movx dsp register"));
1740 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
1745 as_bad (_("multiple movy specifications"));
1746 if (opcode
->nibbles
[2] & 8)
1748 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1751 if (reg_m
== A_A1_NUM
)
1753 else if (reg_m
!= A_A0_NUM
)
1754 as_bad (_("invalid movy dsp register"));
1759 as_bad (_("invalid movy dsp register"));
1762 if (reg_n
< 6 || reg_n
> 7)
1763 as_bad (_("invalid movy address register"));
1764 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
1768 if (operand
[0].immediate
.X_op
!= O_constant
)
1769 as_bad (_("dsp immediate shift value not constant"));
1770 field_b
= ((opcode
->nibbles
[2] << 12)
1771 | (operand
[0].immediate
.X_add_number
& 127) << 4
1776 as_bad (_("multiple parallel processing specifications"));
1777 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1778 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1782 as_bad (_("multiple condition specifications"));
1783 cond
= opcode
->nibbles
[2] << 8;
1785 goto skip_cond_check
;
1789 as_bad (_("multiple parallel processing specifications"));
1790 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1791 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1797 if ((field_b
& 0xef00) != 0xa100)
1798 as_bad (_("insn cannot be combined with pmuls"));
1800 switch (field_b
& 0xf)
1803 field_b
+= 0 - A_X0_NUM
;
1806 field_b
+= 1 - A_Y0_NUM
;
1809 field_b
+= 2 - A_A0_NUM
;
1812 field_b
+= 3 - A_A1_NUM
;
1815 as_bad (_("bad padd / psub pmuls output operand"));
1818 field_b
+= 0x4000 + reg_efg
;
1825 as_bad (_("condition not followed by conditionalizable insn"));
1831 opcode
= find_cooked_opcode (&op_end
);
1835 (_("unrecognized characters at end of parallel processing insn")));
1840 move_code
= movx
| movy
;
1843 /* Parallel processing insn. */
1844 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
1846 output
= frag_more (4);
1848 if (! target_big_endian
)
1850 output
[3] = ppi_code
>> 8;
1851 output
[2] = ppi_code
;
1855 output
[2] = ppi_code
>> 8;
1856 output
[3] = ppi_code
;
1858 move_code
|= 0xf800;
1862 /* Just a double data transfer. */
1863 output
= frag_more (2);
1866 if (! target_big_endian
)
1868 output
[1] = move_code
>> 8;
1869 output
[0] = move_code
;
1873 output
[0] = move_code
>> 8;
1874 output
[1] = move_code
;
1879 /* This is the guts of the machine-dependent assembler. STR points to a
1880 machine dependent instruction. This function is supposed to emit
1881 the frags/bytes it assembles to. */
1887 unsigned char *op_end
;
1888 sh_operand_info operand
[3];
1889 sh_opcode_info
*opcode
;
1890 unsigned int size
= 0;
1892 opcode
= find_cooked_opcode (&str
);
1897 as_bad (_("unknown opcode"));
1902 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1904 /* Output a CODE reloc to tell the linker that the following
1905 bytes are instructions, not data. */
1906 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1908 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
1911 if (opcode
->nibbles
[0] == PPI
)
1913 size
= assemble_ppi (op_end
, opcode
);
1917 if (opcode
->arg
[0] == A_BDISP12
1918 || opcode
->arg
[0] == A_BDISP8
)
1920 parse_exp (op_end
+ 1, &operand
[0]);
1921 build_relax (opcode
, &operand
[0]);
1925 if (opcode
->arg
[0] == A_END
)
1927 /* Ignore trailing whitespace. If there is any, it has already
1928 been compressed to a single space. */
1934 op_end
= get_operands (opcode
, op_end
, operand
);
1936 opcode
= get_specific (opcode
, operand
);
1940 /* Couldn't find an opcode which matched the operands. */
1941 char *where
= frag_more (2);
1946 as_bad (_("invalid operands for opcode"));
1951 as_bad (_("excess operands: '%s'"), op_end
);
1953 size
= build_Mytes (opcode
, operand
);
1958 #ifdef BFD_ASSEMBLER
1959 dwarf2_emit_insn (size
);
1963 /* This routine is called each time a label definition is seen. It
1964 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1969 static fragS
*last_label_frag
;
1970 static int last_label_offset
;
1973 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1977 offset
= frag_now_fix ();
1978 if (frag_now
!= last_label_frag
1979 || offset
!= last_label_offset
)
1981 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
1982 last_label_frag
= frag_now
;
1983 last_label_offset
= offset
;
1988 /* This routine is called when the assembler is about to output some
1989 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1992 sh_flush_pending_output ()
1995 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1997 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1999 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2004 md_undefined_symbol (name
)
2008 /* Under ELF we need to default _GLOBAL_OFFSET_TABLE. Otherwise we
2009 have no need to default values of symbols. */
2010 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
2014 if (symbol_find (name
))
2015 as_bad ("GOT already in the symbol table");
2017 GOT_symbol
= symbol_new (name
, undefined_section
,
2018 (valueT
)0, & zero_address_frag
);
2023 #endif /* OBJ_ELF */
2029 #ifndef BFD_ASSEMBLER
2032 tc_crawl_symbol_chain (headers
)
2033 object_headers
*headers
;
2035 printf (_("call to tc_crawl_symbol_chain \n"));
2039 tc_headers_hook (headers
)
2040 object_headers
*headers
;
2042 printf (_("call to tc_headers_hook \n"));
2048 /* Various routines to kill one day. */
2049 /* Equal to MAX_PRECISION in atof-ieee.c. */
2050 #define MAX_LITTLENUMS 6
2052 /* Turn a string in input_line_pointer into a floating point constant
2053 of type TYPE, and store the appropriate bytes in *LITP. The number
2054 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2055 returned, or NULL on OK. */
2058 md_atof (type
, litP
, sizeP
)
2064 LITTLENUM_TYPE words
[4];
2080 return _("bad call to md_atof");
2083 t
= atof_ieee (input_line_pointer
, type
, words
);
2085 input_line_pointer
= t
;
2089 if (! target_big_endian
)
2091 for (i
= prec
- 1; i
>= 0; i
--)
2093 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2099 for (i
= 0; i
< prec
; i
++)
2101 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2109 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2110 call instruction. It refers to a label of the instruction which
2111 loads the register which the call uses. We use it to generate a
2112 special reloc for the linker. */
2116 int ignore ATTRIBUTE_UNUSED
;
2121 as_warn (_(".uses pseudo-op seen when not relaxing"));
2125 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2127 as_bad (_("bad .uses format"));
2128 ignore_rest_of_line ();
2132 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2134 demand_empty_rest_of_line ();
2137 CONST
char *md_shortopts
= "";
2138 struct option md_longopts
[] =
2140 #define OPTION_RELAX (OPTION_MD_BASE)
2141 #define OPTION_BIG (OPTION_MD_BASE + 1)
2142 #define OPTION_LITTLE (OPTION_BIG + 1)
2143 #define OPTION_SMALL (OPTION_LITTLE + 1)
2144 #define OPTION_DSP (OPTION_SMALL + 1)
2146 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2147 {"big", no_argument
, NULL
, OPTION_BIG
},
2148 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2149 {"small", no_argument
, NULL
, OPTION_SMALL
},
2150 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2151 {NULL
, no_argument
, NULL
, 0}
2153 size_t md_longopts_size
= sizeof (md_longopts
);
2156 md_parse_option (c
, arg
)
2158 char *arg ATTRIBUTE_UNUSED
;
2167 target_big_endian
= 1;
2171 target_big_endian
= 0;
2190 md_show_usage (stream
)
2193 fprintf (stream
, _("\
2195 -little generate little endian code\n\
2196 -big generate big endian code\n\
2197 -relax alter jump instructions for long displacements\n\
2198 -small align sections to 4 byte boundaries, not 16\n\
2199 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
2202 /* This struct is used to pass arguments to sh_count_relocs through
2203 bfd_map_over_sections. */
2205 struct sh_count_relocs
2207 /* Symbol we are looking for. */
2209 /* Count of relocs found. */
2213 /* Count the number of fixups in a section which refer to a particular
2214 symbol. When using BFD_ASSEMBLER, this is called via
2215 bfd_map_over_sections. */
2218 sh_count_relocs (abfd
, sec
, data
)
2219 bfd
*abfd ATTRIBUTE_UNUSED
;
2223 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
2224 segment_info_type
*seginfo
;
2228 seginfo
= seg_info (sec
);
2229 if (seginfo
== NULL
)
2233 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2235 if (fix
->fx_addsy
== sym
)
2243 /* Handle the count relocs for a particular section. When using
2244 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2247 sh_frob_section (abfd
, sec
, ignore
)
2248 bfd
*abfd ATTRIBUTE_UNUSED
;
2250 PTR ignore ATTRIBUTE_UNUSED
;
2252 segment_info_type
*seginfo
;
2255 seginfo
= seg_info (sec
);
2256 if (seginfo
== NULL
)
2259 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2264 struct sh_count_relocs info
;
2266 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2269 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2270 symbol in the same section. */
2271 sym
= fix
->fx_addsy
;
2273 || fix
->fx_subsy
!= NULL
2274 || fix
->fx_addnumber
!= 0
2275 || S_GET_SEGMENT (sym
) != sec
2276 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2277 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2279 || S_IS_EXTERNAL (sym
))
2281 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2282 _(".uses does not refer to a local symbol in the same section"));
2286 /* Look through the fixups again, this time looking for one
2287 at the same location as sym. */
2288 val
= S_GET_VALUE (sym
);
2289 for (fscan
= seginfo
->fix_root
;
2291 fscan
= fscan
->fx_next
)
2292 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2293 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2294 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2295 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2296 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2300 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2301 _("can't find fixup pointed to by .uses"));
2305 if (fscan
->fx_tcbit
)
2307 /* We've already done this one. */
2311 /* The variable fscan should also be a fixup to a local symbol
2312 in the same section. */
2313 sym
= fscan
->fx_addsy
;
2315 || fscan
->fx_subsy
!= NULL
2316 || fscan
->fx_addnumber
!= 0
2317 || S_GET_SEGMENT (sym
) != sec
2318 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2319 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2321 || S_IS_EXTERNAL (sym
))
2323 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2324 _(".uses target does not refer to a local symbol in the same section"));
2328 /* Now we look through all the fixups of all the sections,
2329 counting the number of times we find a reference to sym. */
2332 #ifdef BFD_ASSEMBLER
2333 bfd_map_over_sections (stdoutput
, sh_count_relocs
, (PTR
) &info
);
2338 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
2339 sh_count_relocs ((bfd
*) NULL
, iscan
, (PTR
) &info
);
2346 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2347 We have already adjusted the value of sym to include the
2348 fragment address, so we undo that adjustment here. */
2349 subseg_change (sec
, 0);
2350 fix_new (fscan
->fx_frag
,
2351 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
2352 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2356 /* This function is called after the symbol table has been completed,
2357 but before the relocs or section contents have been written out.
2358 If we have seen any .uses pseudo-ops, they point to an instruction
2359 which loads a register with the address of a function. We look
2360 through the fixups to find where the function address is being
2361 loaded from. We then generate a COUNT reloc giving the number of
2362 times that function address is referred to. The linker uses this
2363 information when doing relaxing, to decide when it can eliminate
2364 the stored function address entirely. */
2372 #ifdef BFD_ASSEMBLER
2373 bfd_map_over_sections (stdoutput
, sh_frob_section
, (PTR
) NULL
);
2378 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2379 sh_frob_section ((bfd
*) NULL
, iseg
, (PTR
) NULL
);
2384 /* Called after relaxing. Set the correct sizes of the fragments, and
2385 create relocs so that md_apply_fix3 will fill in the correct values. */
2388 md_convert_frag (headers
, seg
, fragP
)
2389 #ifdef BFD_ASSEMBLER
2390 bfd
*headers ATTRIBUTE_UNUSED
;
2392 object_headers
*headers
;
2399 switch (fragP
->fr_subtype
)
2401 case C (COND_JUMP
, COND8
):
2402 case C (COND_JUMP_DELAY
, COND8
):
2403 subseg_change (seg
, 0);
2404 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2405 1, BFD_RELOC_SH_PCDISP8BY2
);
2410 case C (UNCOND_JUMP
, UNCOND12
):
2411 subseg_change (seg
, 0);
2412 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2413 1, BFD_RELOC_SH_PCDISP12BY2
);
2418 case C (UNCOND_JUMP
, UNCOND32
):
2419 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2420 if (fragP
->fr_symbol
== NULL
)
2421 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2422 _("displacement overflows 12-bit field"));
2423 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2424 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2425 _("displacement to defined symbol %s overflows 12-bit field"),
2426 S_GET_NAME (fragP
->fr_symbol
));
2428 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2429 _("displacement to undefined symbol %s overflows 12-bit field"),
2430 S_GET_NAME (fragP
->fr_symbol
));
2431 /* Stabilize this frag, so we don't trip an assert. */
2432 fragP
->fr_fix
+= fragP
->fr_var
;
2436 case C (COND_JUMP
, COND12
):
2437 case C (COND_JUMP_DELAY
, COND12
):
2438 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2439 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2440 was due to gas incorrectly relaxing an out-of-range conditional
2441 branch with delay slot. It turned:
2442 bf.s L6 (slot mov.l r12,@(44,r0))
2445 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2447 32: 10 cb mov.l r12,@(44,r0)
2448 Therefore, branches with delay slots have to be handled
2449 differently from ones without delay slots. */
2451 unsigned char *buffer
=
2452 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2453 int highbyte
= target_big_endian
? 0 : 1;
2454 int lowbyte
= target_big_endian
? 1 : 0;
2455 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2457 /* Toggle the true/false bit of the bcond. */
2458 buffer
[highbyte
] ^= 0x2;
2460 /* If this is a delayed branch, we may not put the bra in the
2461 slot. So we change it to a non-delayed branch, like that:
2462 b! cond slot_label; bra disp; slot_label: slot_insn
2463 ??? We should try if swapping the conditional branch and
2464 its delay-slot insn already makes the branch reach. */
2466 /* Build a relocation to six / four bytes farther on. */
2467 subseg_change (seg
, 0);
2468 fix_new (fragP
, fragP
->fr_fix
, 2,
2469 #ifdef BFD_ASSEMBLER
2470 section_symbol (seg
),
2472 seg_info (seg
)->dot
,
2474 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2475 1, BFD_RELOC_SH_PCDISP8BY2
);
2477 /* Set up a jump instruction. */
2478 buffer
[highbyte
+ 2] = 0xa0;
2479 buffer
[lowbyte
+ 2] = 0;
2480 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2481 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2485 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2490 /* Fill in a NOP instruction. */
2491 buffer
[highbyte
+ 4] = 0x0;
2492 buffer
[lowbyte
+ 4] = 0x9;
2501 case C (COND_JUMP
, COND32
):
2502 case C (COND_JUMP_DELAY
, COND32
):
2503 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2504 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2505 if (fragP
->fr_symbol
== NULL
)
2506 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2507 _("displacement overflows 8-bit field"));
2508 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2509 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2510 _("displacement to defined symbol %s overflows 8-bit field"),
2511 S_GET_NAME (fragP
->fr_symbol
));
2513 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2514 _("displacement to undefined symbol %s overflows 8-bit field "),
2515 S_GET_NAME (fragP
->fr_symbol
));
2516 /* Stabilize this frag, so we don't trip an assert. */
2517 fragP
->fr_fix
+= fragP
->fr_var
;
2525 if (donerelax
&& !sh_relax
)
2526 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
2527 _("overflow in branch to %s; converted into longer instruction sequence"),
2528 (fragP
->fr_symbol
!= NULL
2529 ? S_GET_NAME (fragP
->fr_symbol
)
2534 md_section_align (seg
, size
)
2535 segT seg ATTRIBUTE_UNUSED
;
2538 #ifdef BFD_ASSEMBLER
2541 #else /* ! OBJ_ELF */
2542 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
2543 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
2544 #endif /* ! OBJ_ELF */
2545 #else /* ! BFD_ASSEMBLER */
2546 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2547 & (-1 << section_alignment
[(int) seg
]));
2548 #endif /* ! BFD_ASSEMBLER */
2551 /* This static variable is set by s_uacons to tell sh_cons_align that
2552 the expession does not need to be aligned. */
2554 static int sh_no_align_cons
= 0;
2556 /* This handles the unaligned space allocation pseudo-ops, such as
2557 .uaword. .uaword is just like .word, but the value does not need
2564 /* Tell sh_cons_align not to align this value. */
2565 sh_no_align_cons
= 1;
2569 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2570 aligned correctly. Note that this can cause warnings to be issued
2571 when assembling initialized structured which were declared with the
2572 packed attribute. FIXME: Perhaps we should require an option to
2573 enable this warning? */
2576 sh_cons_align (nbytes
)
2582 if (sh_no_align_cons
)
2584 /* This is an unaligned pseudo-op. */
2585 sh_no_align_cons
= 0;
2590 while ((nbytes
& 1) == 0)
2599 if (now_seg
== absolute_section
)
2601 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
2602 as_warn (_("misaligned data"));
2606 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
2607 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
2609 record_alignment (now_seg
, nalign
);
2612 /* When relaxing, we need to output a reloc for any .align directive
2613 that requests alignment to a four byte boundary or larger. This is
2614 also where we check for misaligned data. */
2617 sh_handle_align (frag
)
2620 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
2622 if (frag
->fr_type
== rs_align_code
)
2624 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
2625 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
2627 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
2636 if (target_big_endian
)
2638 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
2639 frag
->fr_var
= sizeof big_nop_pattern
;
2643 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
2644 frag
->fr_var
= sizeof little_nop_pattern
;
2647 else if (frag
->fr_type
== rs_align_test
)
2650 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
2654 && (frag
->fr_type
== rs_align
2655 || frag
->fr_type
== rs_align_code
)
2656 && frag
->fr_address
+ frag
->fr_fix
> 0
2657 && frag
->fr_offset
> 1
2658 && now_seg
!= bss_section
)
2659 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
2660 BFD_RELOC_SH_ALIGN
);
2663 /* This macro decides whether a particular reloc is an entry in a
2664 switch table. It is used when relaxing, because the linker needs
2665 to know about all such entries so that it can adjust them if
2668 #ifdef BFD_ASSEMBLER
2669 #define SWITCH_TABLE_CONS(fix) (0)
2671 #define SWITCH_TABLE_CONS(fix) \
2672 ((fix)->fx_r_type == 0 \
2673 && ((fix)->fx_size == 2 \
2674 || (fix)->fx_size == 1 \
2675 || (fix)->fx_size == 4))
2678 #define SWITCH_TABLE(fix) \
2679 ((fix)->fx_addsy != NULL \
2680 && (fix)->fx_subsy != NULL \
2681 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2682 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2683 && ((fix)->fx_r_type == BFD_RELOC_32 \
2684 || (fix)->fx_r_type == BFD_RELOC_16 \
2685 || (fix)->fx_r_type == BFD_RELOC_8 \
2686 || SWITCH_TABLE_CONS (fix)))
2688 /* See whether we need to force a relocation into the output file.
2689 This is used to force out switch and PC relative relocations when
2693 sh_force_relocation (fix
)
2697 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2698 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
2699 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
2700 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
)
2706 return (fix
->fx_pcrel
2707 || SWITCH_TABLE (fix
)
2708 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
2709 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
2710 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
2711 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2712 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
2717 sh_fix_adjustable (fixP
)
2721 if (fixP
->fx_addsy
== NULL
)
2724 if (fixP
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
2725 || fixP
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
2726 || fixP
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
2727 || fixP
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
2728 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
2729 || fixP
->fx_r_type
== BFD_RELOC_SH_SWITCH16
2730 || fixP
->fx_r_type
== BFD_RELOC_SH_SWITCH32
)
2733 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP
)
2734 || fixP
->fx_r_type
== BFD_RELOC_32_GOTOFF
2735 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
2738 /* We need the symbol name for the VTABLE entries */
2739 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2740 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2747 sh_elf_final_processing ()
2751 /* Set file-specific flags to indicate if this code needs
2752 a processor with the sh-dsp / sh3e ISA to execute. */
2753 if (valid_arch
& arch_sh1
)
2755 else if (valid_arch
& arch_sh2
)
2757 else if (valid_arch
& arch_sh_dsp
)
2759 else if (valid_arch
& arch_sh3
)
2761 else if (valid_arch
& arch_sh3_dsp
)
2763 else if (valid_arch
& arch_sh3e
)
2765 else if (valid_arch
& arch_sh4
)
2770 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
2771 elf_elfheader (stdoutput
)->e_flags
|= val
;
2775 /* Apply a fixup to the object file. */
2778 md_apply_fix3 (fixP
, valP
, seg
)
2781 segT seg ATTRIBUTE_UNUSED
;
2783 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2784 int lowbyte
= target_big_endian
? 1 : 0;
2785 int highbyte
= target_big_endian
? 0 : 1;
2786 long val
= * (long *) valP
;
2790 #ifdef BFD_ASSEMBLER
2791 /* A difference between two symbols, the second of which is in the
2792 current section, is transformed in a PC-relative relocation to
2793 the other symbol. We have to adjust the relocation type here. */
2796 switch (fixP
->fx_r_type
)
2802 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
2805 /* Currently, we only support 32-bit PCREL relocations.
2806 We'd need a new reloc type to handle 16_PCREL, and
2807 8_PCREL is already taken for R_SH_SWITCH8, which
2808 apparently does something completely different than what
2811 bfd_set_error (bfd_error_bad_value
);
2815 bfd_set_error (bfd_error_bad_value
);
2820 /* The function adjust_reloc_syms won't convert a reloc against a weak
2821 symbol into a reloc against a section, but bfd_install_relocation
2822 will screw up if the symbol is defined, so we have to adjust val here
2823 to avoid the screw up later.
2825 For ordinary relocs, this does not happen for ELF, since for ELF,
2826 bfd_install_relocation uses the "special function" field of the
2827 howto, and does not execute the code that needs to be undone, as long
2828 as the special function does not return bfd_reloc_continue.
2829 It can happen for GOT- and PLT-type relocs the way they are
2830 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
2831 doesn't matter here since those relocs don't use VAL; see below. */
2832 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
2833 && fixP
->fx_addsy
!= NULL
2834 && S_IS_WEAK (fixP
->fx_addsy
))
2835 val
-= S_GET_VALUE (fixP
->fx_addsy
);
2838 #ifndef BFD_ASSEMBLER
2839 if (fixP
->fx_r_type
== 0)
2841 if (fixP
->fx_size
== 2)
2842 fixP
->fx_r_type
= BFD_RELOC_16
;
2843 else if (fixP
->fx_size
== 4)
2844 fixP
->fx_r_type
= BFD_RELOC_32
;
2845 else if (fixP
->fx_size
== 1)
2846 fixP
->fx_r_type
= BFD_RELOC_8
;
2854 switch (fixP
->fx_r_type
)
2856 case BFD_RELOC_SH_IMM4
:
2858 *buf
= (*buf
& 0xf0) | (val
& 0xf);
2861 case BFD_RELOC_SH_IMM4BY2
:
2864 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
2867 case BFD_RELOC_SH_IMM4BY4
:
2870 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
2873 case BFD_RELOC_SH_IMM8BY2
:
2879 case BFD_RELOC_SH_IMM8BY4
:
2886 case BFD_RELOC_SH_IMM8
:
2887 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2888 sometimes it is not (e.g., and). We permit any 8 bit value.
2889 Note that adding further restrictions may invalidate
2890 reasonable looking assembly code, such as ``and -0x1,r0''. */
2896 case BFD_RELOC_SH_PCRELIMM8BY4
:
2897 /* The lower two bits of the PC are cleared before the
2898 displacement is added in. We can assume that the destination
2899 is on a 4 byte bounday. If this instruction is also on a 4
2900 byte boundary, then we want
2902 and target - here is a multiple of 4.
2903 Otherwise, we are on a 2 byte boundary, and we want
2904 (target - (here - 2)) / 4
2905 and target - here is not a multiple of 4. Computing
2906 (target - (here - 2)) / 4 == (target - here + 2) / 4
2907 works for both cases, since in the first case the addition of
2908 2 will be removed by the division. target - here is in the
2910 val
= (val
+ 2) / 4;
2912 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2916 case BFD_RELOC_SH_PCRELIMM8BY2
:
2919 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2923 case BFD_RELOC_SH_PCDISP8BY2
:
2925 if (val
< -0x80 || val
> 0x7f)
2926 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2930 case BFD_RELOC_SH_PCDISP12BY2
:
2932 if (val
< -0x800 || val
> 0x7ff)
2933 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2934 buf
[lowbyte
] = val
& 0xff;
2935 buf
[highbyte
] |= (val
>> 8) & 0xf;
2939 case BFD_RELOC_32_PCREL
:
2940 md_number_to_chars (buf
, val
, 4);
2944 md_number_to_chars (buf
, val
, 2);
2947 case BFD_RELOC_SH_USES
:
2948 /* Pass the value into sh_coff_reloc_mangle. */
2949 fixP
->fx_addnumber
= val
;
2952 case BFD_RELOC_SH_COUNT
:
2953 case BFD_RELOC_SH_ALIGN
:
2954 case BFD_RELOC_SH_CODE
:
2955 case BFD_RELOC_SH_DATA
:
2956 case BFD_RELOC_SH_LABEL
:
2957 /* Nothing to do here. */
2960 case BFD_RELOC_SH_LOOP_START
:
2961 case BFD_RELOC_SH_LOOP_END
:
2963 case BFD_RELOC_VTABLE_INHERIT
:
2964 case BFD_RELOC_VTABLE_ENTRY
:
2969 case BFD_RELOC_32_PLT_PCREL
:
2970 /* Make the jump instruction point to the address of the operand. At
2971 runtime we merely add the offset to the actual PLT entry. */
2972 * valP
= 0xfffffffc;
2975 case BFD_RELOC_SH_GOTPC
:
2976 /* This is tough to explain. We end up with this one if we have
2977 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
2978 The goal here is to obtain the absolute address of the GOT,
2979 and it is strongly preferable from a performance point of
2980 view to avoid using a runtime relocation for this. There are
2981 cases where you have something like:
2983 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
2985 and here no correction would be required. Internally in the
2986 assembler we treat operands of this form as not being pcrel
2987 since the '.' is explicitly mentioned, and I wonder whether
2988 it would simplify matters to do it this way. Who knows. In
2989 earlier versions of the PIC patches, the pcrel_adjust field
2990 was used to store the correction, but since the expression is
2991 not pcrel, I felt it would be confusing to do it this way. */
2993 md_number_to_chars (buf
, val
, 4);
2996 case BFD_RELOC_32_GOT_PCREL
:
2997 * valP
= 0; /* Fully resolved at runtime. No addend. */
2998 md_number_to_chars (buf
, 0, 4);
3001 case BFD_RELOC_32_GOTOFF
:
3011 if ((val
& ((1 << shift
) - 1)) != 0)
3012 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3016 val
= ((val
>> shift
)
3017 | ((long) -1 & ~ ((long) -1 >> shift
)));
3019 if (max
!= 0 && (val
< min
|| val
> max
))
3020 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3022 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3026 /* Called just before address relaxation. Return the length
3027 by which a fragment must grow to reach it's destination. */
3030 md_estimate_size_before_relax (fragP
, segment_type
)
3031 register fragS
*fragP
;
3032 register segT segment_type
;
3036 switch (fragP
->fr_subtype
)
3041 case C (UNCOND_JUMP
, UNDEF_DISP
):
3042 /* Used to be a branch to somewhere which was unknown. */
3043 if (!fragP
->fr_symbol
)
3045 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3047 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3049 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3053 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3057 case C (COND_JUMP
, UNDEF_DISP
):
3058 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3059 what
= GET_WHAT (fragP
->fr_subtype
);
3060 /* Used to be a branch to somewhere which was unknown. */
3061 if (fragP
->fr_symbol
3062 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3064 /* Got a symbol and it's defined in this segment, become byte
3065 sized - maybe it will fix up. */
3066 fragP
->fr_subtype
= C (what
, COND8
);
3068 else if (fragP
->fr_symbol
)
3070 /* Its got a segment, but its not ours, so it will always be long. */
3071 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3075 /* We know the abs value. */
3076 fragP
->fr_subtype
= C (what
, COND8
);
3080 case C (UNCOND_JUMP
, UNCOND12
):
3081 case C (UNCOND_JUMP
, UNCOND32
):
3082 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3083 case C (COND_JUMP
, COND8
):
3084 case C (COND_JUMP
, COND12
):
3085 case C (COND_JUMP
, COND32
):
3086 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3087 case C (COND_JUMP_DELAY
, COND8
):
3088 case C (COND_JUMP_DELAY
, COND12
):
3089 case C (COND_JUMP_DELAY
, COND32
):
3090 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3091 /* When relaxing a section for the second time, we don't need to
3092 do anything besides return the current size. */
3096 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
3097 return fragP
->fr_var
;
3100 /* Put number into target byte order. */
3103 md_number_to_chars (ptr
, use
, nbytes
)
3108 if (! target_big_endian
)
3109 number_to_chars_littleendian (ptr
, use
, nbytes
);
3111 number_to_chars_bigendian (ptr
, use
, nbytes
);
3115 md_pcrel_from_section (fixP
, sec
)
3119 if (fixP
->fx_addsy
!= (symbolS
*) NULL
3120 && (! S_IS_DEFINED (fixP
->fx_addsy
)
3121 || S_IS_EXTERN (fixP
->fx_addsy
)
3122 || S_IS_WEAK (fixP
->fx_addsy
)
3123 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
3125 /* The symbol is undefined (or is defined but not in this section,
3126 or we're not sure about it being the final definition). Let the
3127 linker figure it out. We need to adjust the subtraction of a
3128 symbol to the position of the relocated data, though. */
3129 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
3132 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
3138 tc_coff_sizemachdep (frag
)
3141 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
3144 #endif /* OBJ_COFF */
3146 #ifndef BFD_ASSEMBLER
3149 /* Map BFD relocs to SH COFF relocs. */
3153 bfd_reloc_code_real_type bfd_reloc
;
3157 static const struct reloc_map coff_reloc_map
[] =
3159 { BFD_RELOC_32
, R_SH_IMM32
},
3160 { BFD_RELOC_16
, R_SH_IMM16
},
3161 { BFD_RELOC_8
, R_SH_IMM8
},
3162 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
3163 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
3164 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
3165 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
3166 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
3167 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
3168 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
3169 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
3170 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
3171 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
3172 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
3173 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
3174 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
3175 { BFD_RELOC_SH_USES
, R_SH_USES
},
3176 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
3177 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
3178 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
3179 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
3180 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
3181 { BFD_RELOC_UNUSED
, 0 }
3184 /* Adjust a reloc for the SH. This is similar to the generic code,
3185 but does some minor tweaking. */
3188 sh_coff_reloc_mangle (seg
, fix
, intr
, paddr
)
3189 segment_info_type
*seg
;
3191 struct internal_reloc
*intr
;
3194 symbolS
*symbol_ptr
= fix
->fx_addsy
;
3197 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
3199 if (! SWITCH_TABLE (fix
))
3201 const struct reloc_map
*rm
;
3203 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
3204 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
3206 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
3207 as_bad_where (fix
->fx_file
, fix
->fx_line
,
3208 _("Can not represent %s relocation in this object file format"),
3209 bfd_get_reloc_code_name (fix
->fx_r_type
));
3210 intr
->r_type
= rm
->sh_reloc
;
3217 if (fix
->fx_r_type
== BFD_RELOC_16
)
3218 intr
->r_type
= R_SH_SWITCH16
;
3219 else if (fix
->fx_r_type
== BFD_RELOC_8
)
3220 intr
->r_type
= R_SH_SWITCH8
;
3221 else if (fix
->fx_r_type
== BFD_RELOC_32
)
3222 intr
->r_type
= R_SH_SWITCH32
;
3226 /* For a switch reloc, we set r_offset to the difference between
3227 the reloc address and the subtrahend. When the linker is
3228 doing relaxing, it can use the determine the starting and
3229 ending points of the switch difference expression. */
3230 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
3233 /* PC relative relocs are always against the current section. */
3234 if (symbol_ptr
== NULL
)
3236 switch (fix
->fx_r_type
)
3238 case BFD_RELOC_SH_PCRELIMM8BY2
:
3239 case BFD_RELOC_SH_PCRELIMM8BY4
:
3240 case BFD_RELOC_SH_PCDISP8BY2
:
3241 case BFD_RELOC_SH_PCDISP12BY2
:
3242 case BFD_RELOC_SH_USES
:
3243 symbol_ptr
= seg
->dot
;
3250 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
3252 /* We can't store the offset in the object file, since this
3253 reloc does not take up any space, so we store it in r_offset.
3254 The fx_addnumber field was set in md_apply_fix3. */
3255 intr
->r_offset
= fix
->fx_addnumber
;
3257 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
3259 /* We can't store the count in the object file, since this reloc
3260 does not take up any space, so we store it in r_offset. The
3261 fx_offset field was set when the fixup was created in
3262 sh_coff_frob_file. */
3263 intr
->r_offset
= fix
->fx_offset
;
3264 /* This reloc is always absolute. */
3267 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
3269 /* Store the alignment in the r_offset field. */
3270 intr
->r_offset
= fix
->fx_offset
;
3271 /* This reloc is always absolute. */
3274 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
3275 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3276 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
3278 /* These relocs are always absolute. */
3282 /* Turn the segment of the symbol into an offset. */
3283 if (symbol_ptr
!= NULL
)
3285 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
3287 intr
->r_symndx
= dot
->sy_number
;
3289 intr
->r_symndx
= symbol_ptr
->sy_number
;
3292 intr
->r_symndx
= -1;
3295 #endif /* OBJ_COFF */
3296 #endif /* ! BFD_ASSEMBLER */
3298 #ifdef BFD_ASSEMBLER
3300 /* Create a reloc. */
3303 tc_gen_reloc (section
, fixp
)
3304 asection
*section ATTRIBUTE_UNUSED
;
3308 bfd_reloc_code_real_type r_type
;
3310 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3311 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3312 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3313 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3315 r_type
= fixp
->fx_r_type
;
3317 if (SWITCH_TABLE (fixp
))
3319 rel
->addend
= rel
->address
- S_GET_VALUE (fixp
->fx_subsy
);
3320 if (r_type
== BFD_RELOC_16
)
3321 r_type
= BFD_RELOC_SH_SWITCH16
;
3322 else if (r_type
== BFD_RELOC_8
)
3323 r_type
= BFD_RELOC_8_PCREL
;
3324 else if (r_type
== BFD_RELOC_32
)
3325 r_type
= BFD_RELOC_SH_SWITCH32
;
3329 else if (r_type
== BFD_RELOC_SH_USES
)
3330 rel
->addend
= fixp
->fx_addnumber
;
3331 else if (r_type
== BFD_RELOC_SH_COUNT
)
3332 rel
->addend
= fixp
->fx_offset
;
3333 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3334 rel
->addend
= fixp
->fx_offset
;
3335 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3336 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3337 rel
->addend
= fixp
->fx_offset
;
3338 else if (r_type
== BFD_RELOC_SH_LOOP_START
3339 || r_type
== BFD_RELOC_SH_LOOP_END
)
3340 rel
->addend
= fixp
->fx_offset
;
3341 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3344 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3346 else if (fixp
->fx_pcrel
)
3347 rel
->addend
= fixp
->fx_addnumber
;
3348 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
3349 rel
->addend
= fixp
->fx_addnumber
;
3353 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3354 if (rel
->howto
== NULL
)
3356 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3357 _("Cannot represent relocation type %s"),
3358 bfd_get_reloc_code_name (r_type
));
3359 /* Set howto to a garbage value so that we can keep going. */
3360 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3361 assert (rel
->howto
!= NULL
);
3367 #endif /* BFD_ASSEMBLER */