1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright (C) 1993, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Written By Steve Chamberlain <sac@cygnus.com> */
28 #include "opcodes/sh-opc.h"
30 #include "struc-symbol.h"
36 #include "dwarf2dbg.h"
37 struct dwarf2_line_info debug_line
;
39 const char comment_chars
[] = "!";
40 const char line_separator_chars
[] = ";";
41 const char line_comment_chars
[] = "!#";
43 static void s_uses
PARAMS ((int));
45 static void sh_count_relocs
PARAMS ((bfd
*, segT
, PTR
));
46 static void sh_frob_section
PARAMS ((bfd
*, segT
, PTR
));
49 void s_align_bytes ();
50 static void s_uacons
PARAMS ((int));
51 static sh_opcode_info
*find_cooked_opcode
PARAMS ((char **));
52 static unsigned int assemble_ppi
PARAMS ((char *, sh_opcode_info
*));
55 static void sh_elf_cons
PARAMS ((int));
57 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
64 int ignore ATTRIBUTE_UNUSED
;
67 target_big_endian
= 0;
70 /* This table describes all the machine specific pseudo-ops the assembler
71 has to support. The fields are:
72 pseudo-op name without dot
73 function to call to execute this pseudo-op
74 Integer arg to pass to the function. */
76 const pseudo_typeS md_pseudo_table
[] =
79 {"long", sh_elf_cons
, 4},
80 {"int", sh_elf_cons
, 4},
81 {"word", sh_elf_cons
, 2},
82 {"short", sh_elf_cons
, 2},
87 {"form", listing_psize
, 0},
88 {"little", little
, 0},
89 {"heading", listing_title
, 0},
90 {"import", s_ignore
, 0},
91 {"page", listing_eject
, 0},
92 {"program", s_ignore
, 0},
94 {"uaword", s_uacons
, 2},
95 {"ualong", s_uacons
, 4},
96 { "file", dwarf2_directive_file
, 0 },
97 { "loc", dwarf2_directive_loc
, 0 },
101 /*int md_reloc_size; */
103 int sh_relax
; /* set if -relax seen */
105 /* Whether -small was seen. */
109 /* Whether -dsp was seen. */
113 /* The bit mask of architectures that could
114 accomodate the insns seen so far. */
115 static int valid_arch
;
117 const char EXP_CHARS
[] = "eE";
119 /* Chars that mean this number is a floating point constant. */
122 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
124 #define C(a,b) ENCODE_RELAX(a,b)
126 #define JREG 14 /* Register used as a temp when relaxing */
127 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
128 #define GET_WHAT(x) ((x>>4))
130 /* These are the three types of relaxable instrction. */
132 #define COND_JUMP_DELAY 2
133 #define UNCOND_JUMP 3
142 #define UNDEF_WORD_DISP 4
147 /* Branch displacements are from the address of the branch plus
148 four, thus all minimum and maximum values have 4 added to them. */
151 #define COND8_LENGTH 2
153 /* There is one extra instruction before the branch, so we must add
154 two more bytes to account for it. */
155 #define COND12_F 4100
156 #define COND12_M -4090
157 #define COND12_LENGTH 6
159 #define COND12_DELAY_LENGTH 4
161 /* ??? The minimum and maximum values are wrong, but this does not matter
162 since this relocation type is not supported yet. */
163 #define COND32_F (1<<30)
164 #define COND32_M -(1<<30)
165 #define COND32_LENGTH 14
167 #define UNCOND12_F 4098
168 #define UNCOND12_M -4092
169 #define UNCOND12_LENGTH 2
171 /* ??? The minimum and maximum values are wrong, but this does not matter
172 since this relocation type is not supported yet. */
173 #define UNCOND32_F (1<<30)
174 #define UNCOND32_M -(1<<30)
175 #define UNCOND32_LENGTH 14
177 #define EMPTY { 0, 0, 0, 0 }
179 const relax_typeS md_relax_table
[C (END
, 0)] = {
180 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
181 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
184 /* C (COND_JUMP, COND8) */
185 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
186 /* C (COND_JUMP, COND12) */
187 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
188 /* C (COND_JUMP, COND32) */
189 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
190 EMPTY
, EMPTY
, EMPTY
, EMPTY
,
191 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
194 /* C (COND_JUMP_DELAY, COND8) */
195 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
196 /* C (COND_JUMP_DELAY, COND12) */
197 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
198 /* C (COND_JUMP_DELAY, COND32) */
199 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
200 EMPTY
, EMPTY
, EMPTY
, EMPTY
,
201 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
204 /* C (UNCOND_JUMP, UNCOND12) */
205 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
206 /* C (UNCOND_JUMP, UNCOND32) */
207 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
208 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
209 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
214 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
218 /* Parse @got, etc. and return the desired relocation.
219 If we have additional arithmetic expression, then we fill in new_exp_p. */
220 static bfd_reloc_code_real_type
221 sh_elf_suffix (str_p
, exp_p
, new_exp_p
)
223 expressionS
*exp_p
, *new_exp_p
;
228 bfd_reloc_code_real_type reloc
;
238 #define MAP(str,reloc) { str, sizeof(str)-1, reloc }
240 static struct map_bfd mapping
[] = {
241 MAP ("got", BFD_RELOC_32_GOT_PCREL
),
242 MAP ("plt", BFD_RELOC_32_PLT_PCREL
),
243 MAP ("gotoff", BFD_RELOC_32_GOTOFF
),
244 { (char *)0, 0, BFD_RELOC_UNUSED
}
248 return BFD_RELOC_UNUSED
;
250 for (ch
= *str
, str2
= ident
;
251 (str2
< ident
+ sizeof (ident
) - 1
252 && (isalnum (ch
) || ch
== '@'));
255 *str2
++ = (islower (ch
)) ? ch
: tolower (ch
);
262 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
263 if (ch
== ptr
->string
[0]
264 && len
== ptr
->length
265 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0)
267 /* Now check for identifier@suffix+constant */
268 if (*str
== '-' || *str
== '+')
270 char *orig_line
= input_line_pointer
;
272 input_line_pointer
= str
;
273 expression (new_exp_p
);
274 if (new_exp_p
->X_op
== O_constant
)
276 exp_p
->X_add_number
+= new_exp_p
->X_add_number
;
277 str
= input_line_pointer
;
279 if (new_exp_p
->X_op
== O_subtract
)
280 str
= input_line_pointer
;
282 if (&input_line_pointer
!= str_p
)
283 input_line_pointer
= orig_line
;
290 return BFD_RELOC_UNUSED
;
293 /* The regular cons() function, that reads constants, doesn't support
294 suffixes such as @GOT, @GOTOFF and @PLT, that generate
295 machine-specific relocation types. So we must define it here. */
296 /* Clobbers input_line_pointer, checks end-of-line. */
299 register int nbytes
; /* 1=.byte, 2=.word, 4=.long */
301 expressionS exp
, new_exp
;
302 bfd_reloc_code_real_type reloc
;
305 if (is_it_end_of_statement ())
307 demand_empty_rest_of_line ();
314 new_exp
.X_op
= O_absent
;
315 new_exp
.X_add_symbol
= new_exp
.X_op_symbol
= NULL
;
316 /* If the _GLOBAL_OFFSET_TABLE_ symbol hasn't been found yet,
317 use the name of the symbol to tell whether it's the
318 _GLOBAL_OFFSET_TABLE_. If it has, comparing the symbols is
320 if (! GOT_symbol
&& exp
.X_add_symbol
)
321 name
= S_GET_NAME (exp
.X_add_symbol
);
324 /* Check whether this expression involves the
325 _GLOBAL_OFFSET_TABLE_ symbol, by itself or added to a
326 difference of two other symbols. */
327 if (((GOT_symbol
&& GOT_symbol
== exp
.X_add_symbol
)
328 || (! GOT_symbol
&& name
329 && strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0))
330 && (exp
.X_op
== O_symbol
331 || (exp
.X_op
== O_add
332 && ((symbol_get_value_expression (exp
.X_op_symbol
)->X_op
)
335 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
337 int size
= bfd_get_reloc_size (reloc_howto
);
339 if (GOT_symbol
== NULL
)
340 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
343 as_bad (_("%s relocations do not fit in %d bytes\n"),
344 reloc_howto
->name
, nbytes
);
347 register char *p
= frag_more ((int) nbytes
);
348 int offset
= nbytes
- size
;
350 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
,
351 size
, &exp
, 0, TC_RELOC_GLOBAL_OFFSET_TABLE
);
354 /* Check if this symbol involves one of the magic suffixes, such
355 as @GOT, @GOTOFF or @PLT, and determine which relocation type
357 else if ((exp
.X_op
== O_symbol
|| (exp
.X_op
== O_add
&& exp
.X_op_symbol
))
358 && *input_line_pointer
== '@'
359 && ((reloc
= sh_elf_suffix (&input_line_pointer
, &exp
, &new_exp
))
360 != BFD_RELOC_UNUSED
))
362 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
364 int size
= bfd_get_reloc_size (reloc_howto
);
366 /* Force a GOT to be generated. */
367 if (GOT_symbol
== NULL
)
368 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
371 as_bad (_("%s relocations do not fit in %d bytes\n"),
372 reloc_howto
->name
, nbytes
);
375 register char *p
= frag_more ((int) nbytes
);
376 int offset
= nbytes
- size
;
378 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
, size
,
380 if (new_exp
.X_op
!= O_absent
)
381 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
, size
,
382 &new_exp
, 0, BFD_RELOC_32
);
386 emit_expr (&exp
, (unsigned int) nbytes
);
388 while (*input_line_pointer
++ == ',');
390 input_line_pointer
--; /* Put terminator back into stream. */
391 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
393 while (! is_end_of_line
[*input_line_pointer
++]);
396 demand_empty_rest_of_line ();
401 /* This function is called once, at assembler startup time. This should
402 set up all the tables, etc that the MD part of the assembler needs. */
407 sh_opcode_info
*opcode
;
408 char *prev_name
= "";
412 /* The WinCE OS only supports little endian executables. */
413 target_big_endian
= 0;
416 target_big_endian
= 1;
419 target_arch
= arch_sh1_up
& ~(sh_dsp
? arch_sh3e_up
: arch_sh_dsp_up
);
420 valid_arch
= target_arch
;
422 opcode_hash_control
= hash_new ();
424 /* Insert unique names into hash table. */
425 for (opcode
= sh_table
; opcode
->name
; opcode
++)
427 if (strcmp (prev_name
, opcode
->name
))
429 if (! (opcode
->arch
& target_arch
))
431 prev_name
= opcode
->name
;
432 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
436 /* Make all the opcodes with the same name point to the same
438 opcode
->name
= prev_name
;
445 static int reg_x
, reg_y
;
453 expressionS immediate
;
457 #define IDENT_CHAR(c) (isalnum (c) || (c) == '_')
459 /* Try to parse a reg name. Return the number of chars consumed. */
462 parse_reg (src
, mode
, reg
)
467 /* We use ! IDENT_CHAR for the next character after the register name, to
468 make sure that we won't accidentally recognize a symbol name such as
469 'sram' or sr_ram as being a reference to the register 'sr'. */
475 if (src
[2] >= '0' && src
[2] <= '5'
476 && ! IDENT_CHAR ((unsigned char) src
[3]))
479 *reg
= 10 + src
[2] - '0';
483 if (src
[1] >= '0' && src
[1] <= '9'
484 && ! IDENT_CHAR ((unsigned char) src
[2]))
487 *reg
= (src
[1] - '0');
490 if (src
[1] >= '0' && src
[1] <= '7' && strncmp (&src
[2], "_bank", 5) == 0
491 && ! IDENT_CHAR ((unsigned char) src
[7]))
494 *reg
= (src
[1] - '0');
498 if (src
[1] == 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
503 if (src
[1] == 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
514 if (! IDENT_CHAR ((unsigned char) src
[2]))
520 if (src
[2] == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
529 if (! IDENT_CHAR ((unsigned char) src
[2]))
535 if (src
[2] == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
543 if (src
[1] == 'x' && src
[2] >= '0' && src
[2] <= '1'
544 && ! IDENT_CHAR ((unsigned char) src
[3]))
547 *reg
= 4 + (src
[1] - '0');
550 if (src
[1] == 'y' && src
[2] >= '0' && src
[2] <= '1'
551 && ! IDENT_CHAR ((unsigned char) src
[3]))
554 *reg
= 6 + (src
[1] - '0');
557 if (src
[1] == 's' && src
[2] >= '0' && src
[2] <= '3'
558 && ! IDENT_CHAR ((unsigned char) src
[3]))
560 int n
= src
[1] - '0';
563 *reg
= n
| ((~n
& 2) << 1);
568 if (src
[0] == 'i' && src
[1] && ! IDENT_CHAR ((unsigned char) src
[3]))
590 if (src
[0] == 'x' && src
[1] >= '0' && src
[1] <= '1'
591 && ! IDENT_CHAR ((unsigned char) src
[2]))
594 *reg
= A_X0_NUM
+ src
[1] - '0';
598 if (src
[0] == 'y' && src
[1] >= '0' && src
[1] <= '1'
599 && ! IDENT_CHAR ((unsigned char) src
[2]))
602 *reg
= A_Y0_NUM
+ src
[1] - '0';
606 if (src
[0] == 'm' && src
[1] >= '0' && src
[1] <= '1'
607 && ! IDENT_CHAR ((unsigned char) src
[2]))
610 *reg
= src
[1] == '0' ? A_M0_NUM
: A_M1_NUM
;
616 && src
[2] == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
622 if (src
[0] == 's' && src
[1] == 'p' && src
[2] == 'c'
623 && ! IDENT_CHAR ((unsigned char) src
[3]))
629 if (src
[0] == 's' && src
[1] == 'g' && src
[2] == 'r'
630 && ! IDENT_CHAR ((unsigned char) src
[3]))
636 if (src
[0] == 'd' && src
[1] == 's' && src
[2] == 'r'
637 && ! IDENT_CHAR ((unsigned char) src
[3]))
643 if (src
[0] == 'd' && src
[1] == 'b' && src
[2] == 'r'
644 && ! IDENT_CHAR ((unsigned char) src
[3]))
650 if (src
[0] == 's' && src
[1] == 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
656 if (src
[0] == 's' && src
[1] == 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
663 if (src
[0] == 'p' && src
[1] == 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
668 if (src
[0] == 'p' && src
[1] == 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
670 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
671 and use an uninitialized immediate. */
675 if (src
[0] == 'g' && src
[1] == 'b' && src
[2] == 'r'
676 && ! IDENT_CHAR ((unsigned char) src
[3]))
681 if (src
[0] == 'v' && src
[1] == 'b' && src
[2] == 'r'
682 && ! IDENT_CHAR ((unsigned char) src
[3]))
688 if (src
[0] == 'm' && src
[1] == 'a' && src
[2] == 'c'
689 && ! IDENT_CHAR ((unsigned char) src
[4]))
702 if (src
[0] == 'm' && src
[1] == 'o' && src
[2] == 'd'
703 && ! IDENT_CHAR ((unsigned char) src
[4]))
708 if (src
[0] == 'f' && src
[1] == 'r')
712 if (src
[3] >= '0' && src
[3] <= '5'
713 && ! IDENT_CHAR ((unsigned char) src
[4]))
716 *reg
= 10 + src
[3] - '0';
720 if (src
[2] >= '0' && src
[2] <= '9'
721 && ! IDENT_CHAR ((unsigned char) src
[3]))
724 *reg
= (src
[2] - '0');
728 if (src
[0] == 'd' && src
[1] == 'r')
732 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
733 && ! IDENT_CHAR ((unsigned char) src
[4]))
736 *reg
= 10 + src
[3] - '0';
740 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
741 && ! IDENT_CHAR ((unsigned char) src
[3]))
744 *reg
= (src
[2] - '0');
748 if (src
[0] == 'x' && src
[1] == 'd')
752 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
753 && ! IDENT_CHAR ((unsigned char) src
[4]))
756 *reg
= 11 + src
[3] - '0';
760 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
761 && ! IDENT_CHAR ((unsigned char) src
[3]))
764 *reg
= (src
[2] - '0') + 1;
768 if (src
[0] == 'f' && src
[1] == 'v')
770 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
776 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
777 && ! IDENT_CHAR ((unsigned char) src
[3]))
780 *reg
= (src
[2] - '0');
784 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 'u' && src
[3] == 'l'
785 && ! IDENT_CHAR ((unsigned char) src
[4]))
791 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 's' && src
[3] == 'c'
792 && src
[4] == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
798 if (src
[0] == 'x' && src
[1] == 'm' && src
[2] == 't' && src
[3] == 'r'
799 && src
[4] == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
813 /* JF: '.' is pseudo symbol with value of current location
814 in current segment. */
815 fake
= FAKE_LABEL_NAME
;
816 return symbol_new (fake
,
818 (valueT
) frag_now_fix (),
830 save
= input_line_pointer
;
831 input_line_pointer
= s
;
832 expression (&op
->immediate
);
833 if (op
->immediate
.X_op
== O_absent
)
834 as_bad (_("missing operand"));
835 new = input_line_pointer
;
836 input_line_pointer
= save
;
840 /* The many forms of operand:
843 @Rn Register indirect
856 pr, gbr, vbr, macl, mach
869 /* Must be predecrement. */
872 len
= parse_reg (src
, &mode
, &(op
->reg
));
874 as_bad (_("illegal register after @-"));
879 else if (src
[0] == '(')
881 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
884 len
= parse_reg (src
, &mode
, &(op
->reg
));
885 if (len
&& mode
== A_REG_N
)
890 as_bad (_("must be @(r0,...)"));
894 /* Now can be rn or gbr */
895 len
= parse_reg (src
, &mode
, &(op
->reg
));
900 else if (mode
== A_REG_N
)
902 op
->type
= A_IND_R0_REG_N
;
906 as_bad (_("syntax error in @(r0,...)"));
911 /* Must be an @(disp,.. thing) */
912 src
= parse_exp (src
, op
);
915 /* Now can be rn, gbr or pc */
916 len
= parse_reg (src
, &mode
, &op
->reg
);
921 op
->type
= A_DISP_REG_N
;
923 else if (mode
== A_GBR
)
925 op
->type
= A_DISP_GBR
;
927 else if (mode
== A_PC
)
929 /* Turn a plain @(4,pc) into @(.+4,pc). */
930 if (op
->immediate
.X_op
== O_constant
)
932 op
->immediate
.X_add_symbol
= dot();
933 op
->immediate
.X_op
= O_symbol
;
935 op
->type
= A_DISP_PC
;
939 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
944 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
949 as_bad (_("expecting )"));
955 src
+= parse_reg (src
, &mode
, &(op
->reg
));
958 as_bad (_("illegal register after @"));
963 if ((src
[0] == 'r' && src
[1] == '8')
964 || (src
[0] == 'i' && (src
[1] == 'x' || src
[1] == 's')))
969 if ((src
[0] == 'r' && src
[1] == '9')
970 || (src
[0] == 'i' && src
[1] == 'y'))
973 op
->type
= A_PMODY_N
;
987 get_operand (ptr
, op
)
998 *ptr
= parse_exp (src
, op
);
1003 else if (src
[0] == '@')
1005 *ptr
= parse_at (src
, op
);
1008 len
= parse_reg (src
, &mode
, &(op
->reg
));
1017 /* Not a reg, the only thing left is a displacement. */
1018 *ptr
= parse_exp (src
, op
);
1019 op
->type
= A_DISP_PC
;
1025 get_operands (info
, args
, operand
)
1026 sh_opcode_info
*info
;
1028 sh_operand_info
*operand
;
1033 /* The pre-processor will eliminate whitespace in front of '@'
1034 after the first argument; we may be called multiple times
1035 from assemble_ppi, so don't insist on finding whitespace here. */
1039 get_operand (&ptr
, operand
+ 0);
1046 get_operand (&ptr
, operand
+ 1);
1047 /* ??? Hack: psha/pshl have a varying operand number depending on
1048 the type of the first operand. We handle this by having the
1049 three-operand version first and reducing the number of operands
1050 parsed to two if we see that the first operand is an immediate.
1051 This works because no insn with three operands has an immediate
1052 as first operand. */
1053 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1059 get_operand (&ptr
, operand
+ 2);
1063 operand
[2].type
= 0;
1068 operand
[1].type
= 0;
1069 operand
[2].type
= 0;
1074 operand
[0].type
= 0;
1075 operand
[1].type
= 0;
1076 operand
[2].type
= 0;
1081 /* Passed a pointer to a list of opcodes which use different
1082 addressing modes, return the opcode which matches the opcodes
1085 static sh_opcode_info
*
1086 get_specific (opcode
, operands
)
1087 sh_opcode_info
*opcode
;
1088 sh_operand_info
*operands
;
1090 sh_opcode_info
*this_try
= opcode
;
1091 char *name
= opcode
->name
;
1094 while (opcode
->name
)
1096 this_try
= opcode
++;
1097 if (this_try
->name
!= name
)
1099 /* We've looked so far down the table that we've run out of
1100 opcodes with the same name. */
1104 /* Look at both operands needed by the opcodes and provided by
1105 the user - since an arg test will often fail on the same arg
1106 again and again, we'll try and test the last failing arg the
1107 first on each opcode try. */
1108 for (n
= 0; this_try
->arg
[n
]; n
++)
1110 sh_operand_info
*user
= operands
+ n
;
1111 sh_arg_type arg
= this_try
->arg
[n
];
1123 if (user
->type
!= arg
)
1127 /* opcode needs r0 */
1128 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1132 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1136 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1144 case A_IND_R0_REG_N
:
1155 /* Opcode needs rn */
1156 if (user
->type
!= arg
)
1161 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1176 if (user
->type
!= arg
)
1181 if (user
->type
!= arg
)
1190 case A_IND_R0_REG_M
:
1193 /* Opcode needs rn */
1194 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1200 if (user
->type
!= DSP_REG_N
)
1222 if (user
->type
!= DSP_REG_N
)
1244 if (user
->type
!= DSP_REG_N
)
1266 if (user
->type
!= DSP_REG_N
)
1288 if (user
->type
!= DSP_REG_N
)
1310 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1314 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1318 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1322 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1326 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1336 /* Opcode needs rn */
1337 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1342 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1347 if (user
->type
!= XMTRX_M4
)
1353 printf (_("unhandled %d\n"), arg
);
1357 if ( !(valid_arch
& this_try
->arch
))
1359 valid_arch
&= this_try
->arch
;
1369 check (operand
, low
, high
)
1370 expressionS
*operand
;
1374 if (operand
->X_op
!= O_constant
1375 || operand
->X_add_number
< low
1376 || operand
->X_add_number
> high
)
1378 as_bad (_("operand must be absolute in range %d..%d"), low
, high
);
1380 return operand
->X_add_number
;
1384 insert (where
, how
, pcrel
, op
)
1388 sh_operand_info
*op
;
1390 fix_new_exp (frag_now
,
1391 where
- frag_now
->fr_literal
,
1399 build_relax (opcode
, op
)
1400 sh_opcode_info
*opcode
;
1401 sh_operand_info
*op
;
1403 int high_byte
= target_big_endian
? 0 : 1;
1406 if (opcode
->arg
[0] == A_BDISP8
)
1408 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1409 p
= frag_var (rs_machine_dependent
,
1410 md_relax_table
[C (what
, COND32
)].rlx_length
,
1411 md_relax_table
[C (what
, COND8
)].rlx_length
,
1413 op
->immediate
.X_add_symbol
,
1414 op
->immediate
.X_add_number
,
1416 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1418 else if (opcode
->arg
[0] == A_BDISP12
)
1420 p
= frag_var (rs_machine_dependent
,
1421 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1422 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1424 op
->immediate
.X_add_symbol
,
1425 op
->immediate
.X_add_number
,
1427 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1432 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1435 insert_loop_bounds (output
, operand
)
1437 sh_operand_info
*operand
;
1442 /* Since the low byte of the opcode will be overwritten by the reloc, we
1443 can just stash the high byte into both bytes and ignore endianness. */
1446 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1447 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1451 static int count
= 0;
1453 /* If the last loop insn is a two-byte-insn, it is in danger of being
1454 swapped with the insn after it. To prevent this, create a new
1455 symbol - complete with SH_LABEL reloc - after the last loop insn.
1456 If the last loop insn is four bytes long, the symbol will be
1457 right in the middle, but four byte insns are not swapped anyways. */
1458 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1459 Hence a 9 digit number should be enough to count all REPEATs. */
1461 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1462 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1463 /* Make this a local symbol. */
1465 SF_SET_LOCAL (end_sym
);
1466 #endif /* OBJ_COFF */
1467 symbol_table_insert (end_sym
);
1468 end_sym
->sy_value
= operand
[1].immediate
;
1469 end_sym
->sy_value
.X_add_number
+= 2;
1470 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1473 output
= frag_more (2);
1476 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1477 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1479 return frag_more (2);
1482 /* Now we know what sort of opcodes it is, let's build the bytes. */
1485 build_Mytes (opcode
, operand
)
1486 sh_opcode_info
*opcode
;
1487 sh_operand_info
*operand
;
1492 char *output
= frag_more (2);
1493 unsigned int size
= 2;
1494 int low_byte
= target_big_endian
? 1 : 0;
1500 for (index
= 0; index
< 4; index
++)
1502 sh_nibble_type i
= opcode
->nibbles
[index
];
1512 nbuf
[index
] = reg_n
;
1515 nbuf
[index
] = reg_m
;
1518 if (reg_n
< 2 || reg_n
> 5)
1519 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1520 nbuf
[index
] = (reg_n
& 3) | 4;
1523 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1526 nbuf
[index
] = reg_b
| 0x08;
1529 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
1532 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
1535 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
1538 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
1541 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
1544 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
1547 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
1550 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
1553 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
1556 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
1559 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
1562 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
1565 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
, 1, operand
);
1568 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
, 1, operand
);
1571 output
= insert_loop_bounds (output
, operand
);
1572 nbuf
[index
] = opcode
->nibbles
[3];
1576 printf (_("failed for %d\n"), i
);
1580 if (!target_big_endian
)
1582 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1583 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1587 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1588 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1593 /* Find an opcode at the start of *STR_P in the hash table, and set
1594 *STR_P to the first character after the last one read. */
1596 static sh_opcode_info
*
1597 find_cooked_opcode (str_p
)
1601 unsigned char *op_start
;
1602 unsigned char *op_end
;
1606 /* Drop leading whitespace. */
1610 /* Find the op code end.
1611 The pre-processor will eliminate whitespace in front of
1612 any '@' after the first argument; we may be called from
1613 assemble_ppi, so the opcode might be terminated by an '@'. */
1614 for (op_start
= op_end
= (unsigned char *) (str
);
1617 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
1620 unsigned char c
= op_start
[nlen
];
1622 /* The machine independent code will convert CMP/EQ into cmp/EQ
1623 because it thinks the '/' is the end of the symbol. Moreover,
1624 all but the first sub-insn is a parallel processing insn won't
1625 be capitailzed. Instead of hacking up the machine independent
1626 code, we just deal with it here. */
1627 c
= isupper (c
) ? tolower (c
) : c
;
1636 as_bad (_("can't find opcode "));
1638 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
1641 /* Assemble a parallel processing insn. */
1642 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1645 assemble_ppi (op_end
, opcode
)
1647 sh_opcode_info
*opcode
;
1657 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1658 Make sure we encode a defined insn pattern. */
1664 sh_operand_info operand
[3];
1666 if (opcode
->arg
[0] != A_END
)
1667 op_end
= get_operands (opcode
, op_end
, operand
);
1668 opcode
= get_specific (opcode
, operand
);
1671 /* Couldn't find an opcode which matched the operands. */
1672 char *where
= frag_more (2);
1677 as_bad (_("invalid operands for opcode"));
1681 if (opcode
->nibbles
[0] != PPI
)
1682 as_bad (_("insn can't be combined with parallel processing insn"));
1684 switch (opcode
->nibbles
[1])
1689 as_bad (_("multiple movx specifications"));
1694 as_bad (_("multiple movy specifications"));
1700 as_bad (_("multiple movx specifications"));
1701 if (reg_n
< 4 || reg_n
> 5)
1702 as_bad (_("invalid movx address register"));
1703 if (opcode
->nibbles
[2] & 8)
1705 if (reg_m
== A_A1_NUM
)
1707 else if (reg_m
!= A_A0_NUM
)
1708 as_bad (_("invalid movx dsp register"));
1713 as_bad (_("invalid movx dsp register"));
1716 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
1721 as_bad (_("multiple movy specifications"));
1722 if (opcode
->nibbles
[2] & 8)
1724 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1727 if (reg_m
== A_A1_NUM
)
1729 else if (reg_m
!= A_A0_NUM
)
1730 as_bad (_("invalid movy dsp register"));
1735 as_bad (_("invalid movy dsp register"));
1738 if (reg_n
< 6 || reg_n
> 7)
1739 as_bad (_("invalid movy address register"));
1740 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
1744 if (operand
[0].immediate
.X_op
!= O_constant
)
1745 as_bad (_("dsp immediate shift value not constant"));
1746 field_b
= ((opcode
->nibbles
[2] << 12)
1747 | (operand
[0].immediate
.X_add_number
& 127) << 4
1752 as_bad (_("multiple parallel processing specifications"));
1753 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1754 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1758 as_bad (_("multiple condition specifications"));
1759 cond
= opcode
->nibbles
[2] << 8;
1761 goto skip_cond_check
;
1765 as_bad (_("multiple parallel processing specifications"));
1766 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1767 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1773 if ((field_b
& 0xef00) != 0xa100)
1774 as_bad (_("insn cannot be combined with pmuls"));
1776 switch (field_b
& 0xf)
1779 field_b
+= 0 - A_X0_NUM
;
1782 field_b
+= 1 - A_Y0_NUM
;
1785 field_b
+= 2 - A_A0_NUM
;
1788 field_b
+= 3 - A_A1_NUM
;
1791 as_bad (_("bad padd / psub pmuls output operand"));
1794 field_b
+= 0x4000 + reg_efg
;
1801 as_bad (_("condition not followed by conditionalizable insn"));
1807 opcode
= find_cooked_opcode (&op_end
);
1811 (_("unrecognized characters at end of parallel processing insn")));
1816 move_code
= movx
| movy
;
1819 /* Parallel processing insn. */
1820 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
1822 output
= frag_more (4);
1824 if (! target_big_endian
)
1826 output
[3] = ppi_code
>> 8;
1827 output
[2] = ppi_code
;
1831 output
[2] = ppi_code
>> 8;
1832 output
[3] = ppi_code
;
1834 move_code
|= 0xf800;
1838 /* Just a double data transfer. */
1839 output
= frag_more (2);
1842 if (! target_big_endian
)
1844 output
[1] = move_code
>> 8;
1845 output
[0] = move_code
;
1849 output
[0] = move_code
>> 8;
1850 output
[1] = move_code
;
1855 /* This is the guts of the machine-dependent assembler. STR points to a
1856 machine dependent instruction. This function is supposed to emit
1857 the frags/bytes it assembles to. */
1863 unsigned char *op_end
;
1864 sh_operand_info operand
[3];
1865 sh_opcode_info
*opcode
;
1868 opcode
= find_cooked_opcode (&str
);
1873 as_bad (_("unknown opcode"));
1878 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1880 /* Output a CODE reloc to tell the linker that the following
1881 bytes are instructions, not data. */
1882 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1884 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
1887 if (opcode
->nibbles
[0] == PPI
)
1889 size
= assemble_ppi (op_end
, opcode
);
1893 if (opcode
->arg
[0] == A_BDISP12
1894 || opcode
->arg
[0] == A_BDISP8
)
1896 parse_exp (op_end
+ 1, &operand
[0]);
1897 build_relax (opcode
, &operand
[0]);
1901 if (opcode
->arg
[0] == A_END
)
1903 /* Ignore trailing whitespace. If there is any, it has already
1904 been compressed to a single space. */
1910 op_end
= get_operands (opcode
, op_end
, operand
);
1912 opcode
= get_specific (opcode
, operand
);
1916 /* Couldn't find an opcode which matched the operands. */
1917 char *where
= frag_more (2);
1922 as_bad (_("invalid operands for opcode"));
1927 as_bad (_("excess operands: '%s'"), op_end
);
1929 size
= build_Mytes (opcode
, operand
);
1934 if (debug_type
== DEBUG_DWARF2
)
1938 /* First update the notion of the current source line. */
1939 dwarf2_where (&debug_line
);
1941 /* We want the offset of the start of this instruction within the
1942 the current frag. may be used later */
1943 addr
= frag_now
->fr_address
+ frag_now_fix () - size
;
1945 /* And record the information. */
1946 dwarf2_gen_line_info (addr
, &debug_line
);
1950 /* This routine is called each time a label definition is seen. It
1951 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1956 static fragS
*last_label_frag
;
1957 static int last_label_offset
;
1960 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1964 offset
= frag_now_fix ();
1965 if (frag_now
!= last_label_frag
1966 || offset
!= last_label_offset
)
1968 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
1969 last_label_frag
= frag_now
;
1970 last_label_offset
= offset
;
1975 /* This routine is called when the assembler is about to output some
1976 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1979 sh_flush_pending_output ()
1982 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1984 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1986 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
1991 md_undefined_symbol (name
)
1995 /* Under ELF we need to default _GLOBAL_OFFSET_TABLE. Otherwise we
1996 have no need to default values of symbols. */
1997 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
2001 if (symbol_find (name
))
2002 as_bad ("GOT already in the symbol table");
2004 GOT_symbol
= symbol_new (name
, undefined_section
,
2005 (valueT
)0, & zero_address_frag
);
2010 #endif /* OBJ_ELF */
2016 #ifndef BFD_ASSEMBLER
2019 tc_crawl_symbol_chain (headers
)
2020 object_headers
*headers
;
2022 printf (_("call to tc_crawl_symbol_chain \n"));
2026 tc_headers_hook (headers
)
2027 object_headers
*headers
;
2029 printf (_("call to tc_headers_hook \n"));
2035 /* Various routines to kill one day. */
2036 /* Equal to MAX_PRECISION in atof-ieee.c. */
2037 #define MAX_LITTLENUMS 6
2039 /* Turn a string in input_line_pointer into a floating point constant
2040 of type TYPE, and store the appropriate bytes in *LITP. The number
2041 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2042 returned, or NULL on OK. */
2045 md_atof (type
, litP
, sizeP
)
2051 LITTLENUM_TYPE words
[4];
2067 return _("bad call to md_atof");
2070 t
= atof_ieee (input_line_pointer
, type
, words
);
2072 input_line_pointer
= t
;
2076 if (! target_big_endian
)
2078 for (i
= prec
- 1; i
>= 0; i
--)
2080 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2086 for (i
= 0; i
< prec
; i
++)
2088 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2096 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2097 call instruction. It refers to a label of the instruction which
2098 loads the register which the call uses. We use it to generate a
2099 special reloc for the linker. */
2103 int ignore ATTRIBUTE_UNUSED
;
2108 as_warn (_(".uses pseudo-op seen when not relaxing"));
2112 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2114 as_bad (_("bad .uses format"));
2115 ignore_rest_of_line ();
2119 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2121 demand_empty_rest_of_line ();
2124 CONST
char *md_shortopts
= "";
2125 struct option md_longopts
[] =
2127 #define OPTION_RELAX (OPTION_MD_BASE)
2128 #define OPTION_LITTLE (OPTION_MD_BASE + 1)
2129 #define OPTION_SMALL (OPTION_LITTLE + 1)
2130 #define OPTION_DSP (OPTION_SMALL + 1)
2132 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2133 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2134 {"small", no_argument
, NULL
, OPTION_SMALL
},
2135 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2136 {NULL
, no_argument
, NULL
, 0}
2138 size_t md_longopts_size
= sizeof (md_longopts
);
2141 md_parse_option (c
, arg
)
2143 char *arg ATTRIBUTE_UNUSED
;
2153 target_big_endian
= 0;
2172 md_show_usage (stream
)
2175 fprintf (stream
, _("\
2177 -little generate little endian code\n\
2178 -relax alter jump instructions for long displacements\n\
2179 -small align sections to 4 byte boundaries, not 16\n\
2180 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
2184 tc_Nout_fix_to_chars ()
2186 printf (_("call to tc_Nout_fix_to_chars \n"));
2190 /* This struct is used to pass arguments to sh_count_relocs through
2191 bfd_map_over_sections. */
2193 struct sh_count_relocs
2195 /* Symbol we are looking for. */
2197 /* Count of relocs found. */
2201 /* Count the number of fixups in a section which refer to a particular
2202 symbol. When using BFD_ASSEMBLER, this is called via
2203 bfd_map_over_sections. */
2206 sh_count_relocs (abfd
, sec
, data
)
2207 bfd
*abfd ATTRIBUTE_UNUSED
;
2211 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
2212 segment_info_type
*seginfo
;
2216 seginfo
= seg_info (sec
);
2217 if (seginfo
== NULL
)
2221 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2223 if (fix
->fx_addsy
== sym
)
2231 /* Handle the count relocs for a particular section. When using
2232 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2235 sh_frob_section (abfd
, sec
, ignore
)
2236 bfd
*abfd ATTRIBUTE_UNUSED
;
2238 PTR ignore ATTRIBUTE_UNUSED
;
2240 segment_info_type
*seginfo
;
2243 seginfo
= seg_info (sec
);
2244 if (seginfo
== NULL
)
2247 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2252 struct sh_count_relocs info
;
2254 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2257 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2258 symbol in the same section. */
2259 sym
= fix
->fx_addsy
;
2261 || fix
->fx_subsy
!= NULL
2262 || fix
->fx_addnumber
!= 0
2263 || S_GET_SEGMENT (sym
) != sec
2264 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2265 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2267 || S_IS_EXTERNAL (sym
))
2269 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2270 _(".uses does not refer to a local symbol in the same section"));
2274 /* Look through the fixups again, this time looking for one
2275 at the same location as sym. */
2276 val
= S_GET_VALUE (sym
);
2277 for (fscan
= seginfo
->fix_root
;
2279 fscan
= fscan
->fx_next
)
2280 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2281 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2282 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2283 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2284 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2288 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2289 _("can't find fixup pointed to by .uses"));
2293 if (fscan
->fx_tcbit
)
2295 /* We've already done this one. */
2299 /* The variable fscan should also be a fixup to a local symbol
2300 in the same section. */
2301 sym
= fscan
->fx_addsy
;
2303 || fscan
->fx_subsy
!= NULL
2304 || fscan
->fx_addnumber
!= 0
2305 || S_GET_SEGMENT (sym
) != sec
2306 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2307 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2309 || S_IS_EXTERNAL (sym
))
2311 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2312 _(".uses target does not refer to a local symbol in the same section"));
2316 /* Now we look through all the fixups of all the sections,
2317 counting the number of times we find a reference to sym. */
2320 #ifdef BFD_ASSEMBLER
2321 bfd_map_over_sections (stdoutput
, sh_count_relocs
, (PTR
) &info
);
2326 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
2327 sh_count_relocs ((bfd
*) NULL
, iscan
, (PTR
) &info
);
2334 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2335 We have already adjusted the value of sym to include the
2336 fragment address, so we undo that adjustment here. */
2337 subseg_change (sec
, 0);
2338 fix_new (symbol_get_frag (sym
),
2339 S_GET_VALUE (sym
) - symbol_get_frag (sym
)->fr_address
,
2340 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2344 /* This function is called after the symbol table has been completed,
2345 but before the relocs or section contents have been written out.
2346 If we have seen any .uses pseudo-ops, they point to an instruction
2347 which loads a register with the address of a function. We look
2348 through the fixups to find where the function address is being
2349 loaded from. We then generate a COUNT reloc giving the number of
2350 times that function address is referred to. The linker uses this
2351 information when doing relaxing, to decide when it can eliminate
2352 the stored function address entirely. */
2360 #ifdef BFD_ASSEMBLER
2361 bfd_map_over_sections (stdoutput
, sh_frob_section
, (PTR
) NULL
);
2366 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2367 sh_frob_section ((bfd
*) NULL
, iseg
, (PTR
) NULL
);
2372 /* Called after relaxing. Set the correct sizes of the fragments, and
2373 create relocs so that md_apply_fix will fill in the correct values. */
2376 md_convert_frag (headers
, seg
, fragP
)
2377 #ifdef BFD_ASSEMBLER
2378 bfd
*headers ATTRIBUTE_UNUSED
;
2380 object_headers
*headers
;
2387 switch (fragP
->fr_subtype
)
2389 case C (COND_JUMP
, COND8
):
2390 case C (COND_JUMP_DELAY
, COND8
):
2391 subseg_change (seg
, 0);
2392 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2393 1, BFD_RELOC_SH_PCDISP8BY2
);
2398 case C (UNCOND_JUMP
, UNCOND12
):
2399 subseg_change (seg
, 0);
2400 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2401 1, BFD_RELOC_SH_PCDISP12BY2
);
2406 case C (UNCOND_JUMP
, UNCOND32
):
2407 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2408 if (fragP
->fr_symbol
== NULL
)
2409 as_bad (_("at 0x%lx, displacement overflows 12-bit field"),
2410 (unsigned long) fragP
->fr_address
);
2411 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2412 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"),
2413 (unsigned long) fragP
->fr_address
,
2414 S_GET_NAME (fragP
->fr_symbol
));
2416 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"),
2417 (unsigned long) fragP
->fr_address
,
2418 S_GET_NAME (fragP
->fr_symbol
));
2421 /* This code works, but generates poor code and the compiler
2422 should never produce a sequence that requires it to be used. */
2424 /* A jump wont fit in 12 bits, make code which looks like
2430 int t
= buffer
[0] & 0x10;
2432 buffer
[highbyte
] = 0xa0; /* branch over move and disp */
2433 buffer
[lowbyte
] = 3;
2434 buffer
[highbyte
+ 2] = 0xd0 | JREG
; /* Build mov insn */
2435 buffer
[lowbyte
+ 2] = 0x00;
2437 buffer
[highbyte
+ 4] = 0; /* space for 32 bit jump disp */
2438 buffer
[lowbyte
+ 4] = 0;
2439 buffer
[highbyte
+ 6] = 0;
2440 buffer
[lowbyte
+ 6] = 0;
2442 buffer
[highbyte
+ 8] = 0x40 | JREG
; /* Build jmp @JREG */
2443 buffer
[lowbyte
+ 8] = t
? 0xb : 0x2b;
2445 buffer
[highbyte
+ 10] = 0x20; /* build nop */
2446 buffer
[lowbyte
+ 10] = 0x0b;
2448 /* Make reloc for the long disp. */
2456 fragP
->fr_fix
+= UNCOND32_LENGTH
;
2463 case C (COND_JUMP
, COND12
):
2464 case C (COND_JUMP_DELAY
, COND12
):
2465 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2466 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2467 was due to gas incorrectly relaxing an out-of-range conditional
2468 branch with delay slot. It turned:
2469 bf.s L6 (slot mov.l r12,@(44,r0))
2472 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2474 32: 10 cb mov.l r12,@(44,r0)
2475 Therefore, branches with delay slots have to be handled
2476 differently from ones without delay slots. */
2478 unsigned char *buffer
=
2479 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2480 int highbyte
= target_big_endian
? 0 : 1;
2481 int lowbyte
= target_big_endian
? 1 : 0;
2482 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2484 /* Toggle the true/false bit of the bcond. */
2485 buffer
[highbyte
] ^= 0x2;
2487 /* If this is a dalayed branch, we may not put the the bra in the
2488 slot. So we change it to a non-delayed branch, like that:
2489 b! cond slot_label; bra disp; slot_label: slot_insn
2490 ??? We should try if swapping the conditional branch and
2491 its delay-slot insn already makes the branch reach. */
2493 /* Build a relocation to six / four bytes farther on. */
2494 subseg_change (seg
, 0);
2495 fix_new (fragP
, fragP
->fr_fix
, 2,
2496 #ifdef BFD_ASSEMBLER
2497 section_symbol (seg
),
2499 seg_info (seg
)->dot
,
2501 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2502 1, BFD_RELOC_SH_PCDISP8BY2
);
2504 /* Set up a jump instruction. */
2505 buffer
[highbyte
+ 2] = 0xa0;
2506 buffer
[lowbyte
+ 2] = 0;
2507 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2508 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2512 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2517 /* Fill in a NOP instruction. */
2518 buffer
[highbyte
+ 4] = 0x0;
2519 buffer
[lowbyte
+ 4] = 0x9;
2528 case C (COND_JUMP
, COND32
):
2529 case C (COND_JUMP_DELAY
, COND32
):
2530 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2531 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2532 if (fragP
->fr_symbol
== NULL
)
2533 as_bad (_("at 0x%lx, displacement overflows 8-bit field"),
2534 (unsigned long) fragP
->fr_address
);
2535 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2536 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "),
2537 (unsigned long) fragP
->fr_address
,
2538 S_GET_NAME (fragP
->fr_symbol
));
2540 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "),
2541 (unsigned long) fragP
->fr_address
,
2542 S_GET_NAME (fragP
->fr_symbol
));
2545 /* This code works, but generates poor code, and the compiler
2546 should never produce a sequence that requires it to be used. */
2548 /* A bcond won't fit and it won't go into a 12 bit
2549 displacement either, the code sequence looks like:
2558 buffer
[0] ^= 0x2; /* Toggle T/F bit */
2560 buffer
[1] = 5; /* branch over mov, jump, nop and ptr */
2561 buffer
[2] = 0xd0 | JREG
; /* Build mov insn */
2563 buffer
[4] = 0x40 | JREG
; /* Build jmp @JREG */
2565 buffer
[6] = 0x20; /* build nop */
2567 buffer
[8] = 0; /* space for 32 bit jump disp */
2573 /* Make reloc for the long disp */
2581 fragP
->fr_fix
+= COND32_LENGTH
;
2592 if (donerelax
&& !sh_relax
)
2593 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
2594 _("overflow in branch to %s; converted into longer instruction sequence"),
2595 (fragP
->fr_symbol
!= NULL
2596 ? S_GET_NAME (fragP
->fr_symbol
)
2601 md_section_align (seg
, size
)
2605 #ifdef BFD_ASSEMBLER
2608 #else /* ! OBJ_ELF */
2609 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
2610 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
2611 #endif /* ! OBJ_ELF */
2612 #else /* ! BFD_ASSEMBLER */
2613 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2614 & (-1 << section_alignment
[(int) seg
]));
2615 #endif /* ! BFD_ASSEMBLER */
2618 /* This static variable is set by s_uacons to tell sh_cons_align that
2619 the expession does not need to be aligned. */
2621 static int sh_no_align_cons
= 0;
2623 /* This handles the unaligned space allocation pseudo-ops, such as
2624 .uaword. .uaword is just like .word, but the value does not need
2631 /* Tell sh_cons_align not to align this value. */
2632 sh_no_align_cons
= 1;
2636 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2637 aligned correctly. Note that this can cause warnings to be issued
2638 when assembling initialized structured which were declared with the
2639 packed attribute. FIXME: Perhaps we should require an option to
2640 enable this warning? */
2643 sh_cons_align (nbytes
)
2649 if (sh_no_align_cons
)
2651 /* This is an unaligned pseudo-op. */
2652 sh_no_align_cons
= 0;
2657 while ((nbytes
& 1) == 0)
2666 if (now_seg
== absolute_section
)
2668 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
2669 as_warn (_("misaligned data"));
2673 p
= frag_var (rs_align_code
, 1, 1, (relax_substateT
) 0,
2674 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
2676 record_alignment (now_seg
, nalign
);
2679 /* When relaxing, we need to output a reloc for any .align directive
2680 that requests alignment to a four byte boundary or larger. This is
2681 also where we check for misaligned data. */
2684 sh_handle_align (frag
)
2688 && frag
->fr_type
== rs_align
2689 && frag
->fr_address
+ frag
->fr_fix
> 0
2690 && frag
->fr_offset
> 1
2691 && now_seg
!= bss_section
)
2692 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
2693 BFD_RELOC_SH_ALIGN
);
2695 if (frag
->fr_type
== rs_align_code
2696 && frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
!= 0)
2697 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
2700 /* This macro decides whether a particular reloc is an entry in a
2701 switch table. It is used when relaxing, because the linker needs
2702 to know about all such entries so that it can adjust them if
2705 #ifdef BFD_ASSEMBLER
2706 #define SWITCH_TABLE_CONS(fix) (0)
2708 #define SWITCH_TABLE_CONS(fix) \
2709 ((fix)->fx_r_type == 0 \
2710 && ((fix)->fx_size == 2 \
2711 || (fix)->fx_size == 1 \
2712 || (fix)->fx_size == 4))
2715 #define SWITCH_TABLE(fix) \
2716 ((fix)->fx_addsy != NULL \
2717 && (fix)->fx_subsy != NULL \
2718 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2719 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2720 && ((fix)->fx_r_type == BFD_RELOC_32 \
2721 || (fix)->fx_r_type == BFD_RELOC_16 \
2722 || (fix)->fx_r_type == BFD_RELOC_8 \
2723 || SWITCH_TABLE_CONS (fix)))
2725 /* See whether we need to force a relocation into the output file.
2726 This is used to force out switch and PC relative relocations when
2730 sh_force_relocation (fix
)
2734 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2735 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
2736 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
2737 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
)
2743 return (fix
->fx_pcrel
2744 || SWITCH_TABLE (fix
)
2745 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
2746 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
2747 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
2748 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2749 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
2754 sh_fix_adjustable (fixP
)
2758 if (fixP
->fx_addsy
== NULL
)
2761 if (fixP
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
2762 || fixP
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
2763 || fixP
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
2764 || fixP
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
2765 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
2766 || fixP
->fx_r_type
== BFD_RELOC_SH_SWITCH16
2767 || fixP
->fx_r_type
== BFD_RELOC_SH_SWITCH32
)
2770 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP
)
2771 || fixP
->fx_r_type
== BFD_RELOC_32_GOTOFF
2772 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
2775 /* We need the symbol name for the VTABLE entries */
2776 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2777 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2784 sh_elf_final_processing ()
2788 /* Set file-specific flags to indicate if this code needs
2789 a processor with the sh-dsp / sh3e ISA to execute. */
2790 if (valid_arch
& arch_sh1
)
2792 else if (valid_arch
& arch_sh2
)
2794 else if (valid_arch
& arch_sh_dsp
)
2796 else if (valid_arch
& arch_sh3
)
2798 else if (valid_arch
& arch_sh3_dsp
)
2800 else if (valid_arch
& arch_sh3e
)
2802 else if (valid_arch
& arch_sh4
)
2807 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
2808 elf_elfheader (stdoutput
)->e_flags
|= val
;
2812 /* Apply a fixup to the object file. */
2814 #ifdef BFD_ASSEMBLER
2816 md_apply_fix (fixP
, valp
)
2821 md_apply_fix (fixP
, val
)
2826 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2827 int lowbyte
= target_big_endian
? 1 : 0;
2828 int highbyte
= target_big_endian
? 0 : 1;
2829 #ifdef BFD_ASSEMBLER
2835 #ifdef BFD_ASSEMBLER
2836 /* A difference between two symbols, the second of which is in the
2837 current section, is transformed in a PC-relative relocation to
2838 the other symbol. We have to adjust the relocation type here. */
2841 switch (fixP
->fx_r_type
)
2847 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
2850 /* Currently, we only support 32-bit PCREL relocations.
2851 We'd need a new reloc type to handle 16_PCREL, and
2852 8_PCREL is already taken for R_SH_SWITCH8, which
2853 apparently does something completely different than what
2856 bfd_set_error (bfd_error_bad_value
);
2860 bfd_set_error (bfd_error_bad_value
);
2865 /* The function adjust_reloc_syms won't convert a reloc against a weak
2866 symbol into a reloc against a section, but bfd_install_relocation
2867 will screw up if the symbol is defined, so we have to adjust val here
2868 to avoid the screw up later. */
2869 if (fixP
->fx_addsy
!= NULL
2870 && S_IS_WEAK (fixP
->fx_addsy
))
2871 val
-= S_GET_VALUE (fixP
->fx_addsy
);
2874 #ifndef BFD_ASSEMBLER
2875 if (fixP
->fx_r_type
== 0)
2877 if (fixP
->fx_size
== 2)
2878 fixP
->fx_r_type
= BFD_RELOC_16
;
2879 else if (fixP
->fx_size
== 4)
2880 fixP
->fx_r_type
= BFD_RELOC_32
;
2881 else if (fixP
->fx_size
== 1)
2882 fixP
->fx_r_type
= BFD_RELOC_8
;
2890 switch (fixP
->fx_r_type
)
2892 case BFD_RELOC_SH_IMM4
:
2894 *buf
= (*buf
& 0xf0) | (val
& 0xf);
2897 case BFD_RELOC_SH_IMM4BY2
:
2900 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
2903 case BFD_RELOC_SH_IMM4BY4
:
2906 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
2909 case BFD_RELOC_SH_IMM8BY2
:
2915 case BFD_RELOC_SH_IMM8BY4
:
2922 case BFD_RELOC_SH_IMM8
:
2923 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2924 sometimes it is not (e.g., and). We permit any 8 bit value.
2925 Note that adding further restrictions may invalidate
2926 reasonable looking assembly code, such as ``and -0x1,r0''. */
2932 case BFD_RELOC_SH_PCRELIMM8BY4
:
2933 /* The lower two bits of the PC are cleared before the
2934 displacement is added in. We can assume that the destination
2935 is on a 4 byte bounday. If this instruction is also on a 4
2936 byte boundary, then we want
2938 and target - here is a multiple of 4.
2939 Otherwise, we are on a 2 byte boundary, and we want
2940 (target - (here - 2)) / 4
2941 and target - here is not a multiple of 4. Computing
2942 (target - (here - 2)) / 4 == (target - here + 2) / 4
2943 works for both cases, since in the first case the addition of
2944 2 will be removed by the division. target - here is in the
2946 val
= (val
+ 2) / 4;
2948 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2952 case BFD_RELOC_SH_PCRELIMM8BY2
:
2955 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2959 case BFD_RELOC_SH_PCDISP8BY2
:
2961 if (val
< -0x80 || val
> 0x7f)
2962 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2966 case BFD_RELOC_SH_PCDISP12BY2
:
2968 if (val
< -0x800 || val
>= 0x7ff)
2969 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2970 buf
[lowbyte
] = val
& 0xff;
2971 buf
[highbyte
] |= (val
>> 8) & 0xf;
2975 case BFD_RELOC_32_PCREL
:
2976 md_number_to_chars (buf
, val
, 4);
2980 md_number_to_chars (buf
, val
, 2);
2983 case BFD_RELOC_SH_USES
:
2984 /* Pass the value into sh_coff_reloc_mangle. */
2985 fixP
->fx_addnumber
= val
;
2988 case BFD_RELOC_SH_COUNT
:
2989 case BFD_RELOC_SH_ALIGN
:
2990 case BFD_RELOC_SH_CODE
:
2991 case BFD_RELOC_SH_DATA
:
2992 case BFD_RELOC_SH_LABEL
:
2993 /* Nothing to do here. */
2996 case BFD_RELOC_SH_LOOP_START
:
2997 case BFD_RELOC_SH_LOOP_END
:
2999 case BFD_RELOC_VTABLE_INHERIT
:
3000 case BFD_RELOC_VTABLE_ENTRY
:
3002 #ifdef BFD_ASSEMBLER
3009 case BFD_RELOC_32_PLT_PCREL
:
3010 /* Make the jump instruction point to the address of the operand. At
3011 runtime we merely add the offset to the actual PLT entry. */
3015 case BFD_RELOC_SH_GOTPC
:
3016 /* This is tough to explain. We end up with this one if we have
3017 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3018 The goal here is to obtain the absolute address of the GOT,
3019 and it is strongly preferable from a performance point of
3020 view to avoid using a runtime relocation for this. There are
3021 cases where you have something like:
3023 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3025 and here no correction would be required. Internally in the
3026 assembler we treat operands of this form as not being pcrel
3027 since the '.' is explicitly mentioned, and I wonder whether
3028 it would simplify matters to do it this way. Who knows. In
3029 earlier versions of the PIC patches, the pcrel_adjust field
3030 was used to store the correction, but since the expression is
3031 not pcrel, I felt it would be confusing to do it this way. */
3033 md_number_to_chars (buf
, val
, 4);
3036 case BFD_RELOC_32_GOT_PCREL
:
3037 *valp
= 0; /* Fully resolved at runtime. No addend. */
3038 md_number_to_chars (buf
, 0, 4);
3041 case BFD_RELOC_32_GOTOFF
:
3051 if ((val
& ((1 << shift
) - 1)) != 0)
3052 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3056 val
= ((val
>> shift
)
3057 | ((long) -1 & ~ ((long) -1 >> shift
)));
3059 if (max
!= 0 && (val
< min
|| val
> max
))
3060 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3062 #ifdef BFD_ASSEMBLER
3067 /* Called just before address relaxation. Return the length
3068 by which a fragment must grow to reach it's destination. */
3071 md_estimate_size_before_relax (fragP
, segment_type
)
3072 register fragS
*fragP
;
3073 register segT segment_type
;
3075 switch (fragP
->fr_subtype
)
3077 case C (UNCOND_JUMP
, UNDEF_DISP
):
3078 /* Used to be a branch to somewhere which was unknown. */
3079 if (!fragP
->fr_symbol
)
3081 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3082 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
3084 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3086 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3087 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
3091 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3092 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
3093 return md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
3099 case C (COND_JUMP
, UNDEF_DISP
):
3100 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3101 /* Used to be a branch to somewhere which was unknown. */
3102 if (fragP
->fr_symbol
3103 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3105 int what
= GET_WHAT (fragP
->fr_subtype
);
3106 /* Got a symbol and it's defined in this segment, become byte
3107 sized - maybe it will fix up. */
3108 fragP
->fr_subtype
= C (what
, COND8
);
3109 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
3111 else if (fragP
->fr_symbol
)
3113 int what
= GET_WHAT (fragP
->fr_subtype
);
3114 /* Its got a segment, but its not ours, so it will always be long. */
3115 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3116 fragP
->fr_var
= md_relax_table
[C (what
, COND32
)].rlx_length
;
3117 return md_relax_table
[C (what
, COND32
)].rlx_length
;
3121 int what
= GET_WHAT (fragP
->fr_subtype
);
3122 /* We know the abs value. */
3123 fragP
->fr_subtype
= C (what
, COND8
);
3124 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
3129 return fragP
->fr_var
;
3132 /* Put number into target byte order. */
3135 md_number_to_chars (ptr
, use
, nbytes
)
3140 if (! target_big_endian
)
3141 number_to_chars_littleendian (ptr
, use
, nbytes
);
3143 number_to_chars_bigendian (ptr
, use
, nbytes
);
3147 md_pcrel_from (fixP
)
3150 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
3156 tc_coff_sizemachdep (frag
)
3159 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
3162 #endif /* OBJ_COFF */
3164 /* When we align the .text section, insert the correct NOP pattern. */
3167 sh_do_align (n
, fill
, len
, max
)
3170 int len ATTRIBUTE_UNUSED
;
3174 && subseg_text_p (now_seg
)
3177 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3178 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3180 /* First align to a 2 byte boundary, in case there is an odd
3182 frag_align (1, 0, 0);
3183 if (target_big_endian
)
3184 frag_align_pattern (n
, big_nop_pattern
, sizeof big_nop_pattern
, max
);
3186 frag_align_pattern (n
, little_nop_pattern
, sizeof little_nop_pattern
,
3194 #ifndef BFD_ASSEMBLER
3197 /* Map BFD relocs to SH COFF relocs. */
3201 bfd_reloc_code_real_type bfd_reloc
;
3205 static const struct reloc_map coff_reloc_map
[] =
3207 { BFD_RELOC_32
, R_SH_IMM32
},
3208 { BFD_RELOC_16
, R_SH_IMM16
},
3209 { BFD_RELOC_8
, R_SH_IMM8
},
3210 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
3211 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
3212 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
3213 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
3214 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
3215 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
3216 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
3217 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
3218 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
3219 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
3220 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
3221 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
3222 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
3223 { BFD_RELOC_SH_USES
, R_SH_USES
},
3224 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
3225 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
3226 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
3227 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
3228 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
3229 { BFD_RELOC_UNUSED
, 0 }
3232 /* Adjust a reloc for the SH. This is similar to the generic code,
3233 but does some minor tweaking. */
3236 sh_coff_reloc_mangle (seg
, fix
, intr
, paddr
)
3237 segment_info_type
*seg
;
3239 struct internal_reloc
*intr
;
3242 symbolS
*symbol_ptr
= fix
->fx_addsy
;
3245 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
3247 if (! SWITCH_TABLE (fix
))
3249 const struct reloc_map
*rm
;
3251 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
3252 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
3254 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
3255 as_bad_where (fix
->fx_file
, fix
->fx_line
,
3256 _("Can not represent %s relocation in this object file format"),
3257 bfd_get_reloc_code_name (fix
->fx_r_type
));
3258 intr
->r_type
= rm
->sh_reloc
;
3265 if (fix
->fx_r_type
== BFD_RELOC_16
)
3266 intr
->r_type
= R_SH_SWITCH16
;
3267 else if (fix
->fx_r_type
== BFD_RELOC_8
)
3268 intr
->r_type
= R_SH_SWITCH8
;
3269 else if (fix
->fx_r_type
== BFD_RELOC_32
)
3270 intr
->r_type
= R_SH_SWITCH32
;
3274 /* For a switch reloc, we set r_offset to the difference between
3275 the reloc address and the subtrahend. When the linker is
3276 doing relaxing, it can use the determine the starting and
3277 ending points of the switch difference expression. */
3278 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
3281 /* PC relative relocs are always against the current section. */
3282 if (symbol_ptr
== NULL
)
3284 switch (fix
->fx_r_type
)
3286 case BFD_RELOC_SH_PCRELIMM8BY2
:
3287 case BFD_RELOC_SH_PCRELIMM8BY4
:
3288 case BFD_RELOC_SH_PCDISP8BY2
:
3289 case BFD_RELOC_SH_PCDISP12BY2
:
3290 case BFD_RELOC_SH_USES
:
3291 symbol_ptr
= seg
->dot
;
3298 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
3300 /* We can't store the offset in the object file, since this
3301 reloc does not take up any space, so we store it in r_offset.
3302 The fx_addnumber field was set in md_apply_fix. */
3303 intr
->r_offset
= fix
->fx_addnumber
;
3305 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
3307 /* We can't store the count in the object file, since this reloc
3308 does not take up any space, so we store it in r_offset. The
3309 fx_offset field was set when the fixup was created in
3310 sh_coff_frob_file. */
3311 intr
->r_offset
= fix
->fx_offset
;
3312 /* This reloc is always absolute. */
3315 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
3317 /* Store the alignment in the r_offset field. */
3318 intr
->r_offset
= fix
->fx_offset
;
3319 /* This reloc is always absolute. */
3322 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
3323 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3324 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
3326 /* These relocs are always absolute. */
3330 /* Turn the segment of the symbol into an offset. */
3331 if (symbol_ptr
!= NULL
)
3333 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
3335 intr
->r_symndx
= dot
->sy_number
;
3337 intr
->r_symndx
= symbol_ptr
->sy_number
;
3340 intr
->r_symndx
= -1;
3343 #endif /* OBJ_COFF */
3344 #endif /* ! BFD_ASSEMBLER */
3346 #ifdef BFD_ASSEMBLER
3348 /* Create a reloc. */
3351 tc_gen_reloc (section
, fixp
)
3352 asection
*section ATTRIBUTE_UNUSED
;
3356 bfd_reloc_code_real_type r_type
;
3358 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3359 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3360 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3361 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3363 r_type
= fixp
->fx_r_type
;
3365 if (SWITCH_TABLE (fixp
))
3367 rel
->addend
= rel
->address
- S_GET_VALUE (fixp
->fx_subsy
);
3368 if (r_type
== BFD_RELOC_16
)
3369 r_type
= BFD_RELOC_SH_SWITCH16
;
3370 else if (r_type
== BFD_RELOC_8
)
3371 r_type
= BFD_RELOC_8_PCREL
;
3372 else if (r_type
== BFD_RELOC_32
)
3373 r_type
= BFD_RELOC_SH_SWITCH32
;
3377 else if (r_type
== BFD_RELOC_SH_USES
)
3378 rel
->addend
= fixp
->fx_addnumber
;
3379 else if (r_type
== BFD_RELOC_SH_COUNT
)
3380 rel
->addend
= fixp
->fx_offset
;
3381 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3382 rel
->addend
= fixp
->fx_offset
;
3383 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3384 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3385 rel
->addend
= fixp
->fx_offset
;
3386 else if (r_type
== BFD_RELOC_SH_LOOP_START
3387 || r_type
== BFD_RELOC_SH_LOOP_END
)
3388 rel
->addend
= fixp
->fx_offset
;
3389 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3392 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3394 else if (fixp
->fx_pcrel
)
3395 rel
->addend
= fixp
->fx_addnumber
;
3396 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
3397 rel
->addend
= fixp
->fx_addnumber
;
3401 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3402 if (rel
->howto
== NULL
)
3404 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3405 _("Cannot represent relocation type %s"),
3406 bfd_get_reloc_code_name (r_type
));
3407 /* Set howto to a garbage value so that we can keep going. */
3408 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3409 assert (rel
->howto
!= NULL
);
3415 #endif /* BFD_ASSEMBLER */
3420 if (debug_type
== DEBUG_DWARF2
)