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Fix more fallout from multi-pass relaxation patch.
[binutils-gdb.git] / gas / config / tc-v850.c
1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include <stdio.h>
22 #include <ctype.h>
23 #include "as.h"
24 #include "subsegs.h"
25 #include "opcode/v850.h"
26 #include "dwarf2dbg.h"
27
28 #define AREA_ZDA 0
29 #define AREA_SDA 1
30 #define AREA_TDA 2
31
32 /* Sign-extend a 16-bit number. */
33 #define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
34
35 /* Temporarily holds the reloc in a cons expression. */
36 static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
37
38 /* Set to TRUE if we want to be pedantic about signed overflows. */
39 static boolean warn_signed_overflows = FALSE;
40 static boolean warn_unsigned_overflows = FALSE;
41
42 /* Indicates the target BFD machine number. */
43 static int machine = -1;
44
45 /* Indicates the target processor(s) for the assemble. */
46 static int processor_mask = -1;
47 \f
48 /* Structure to hold information about predefined registers. */
49 struct reg_name {
50 const char *name;
51 int value;
52 };
53
54 /* Generic assembler global variables which must be defined by all
55 targets. */
56
57 /* Characters which always start a comment. */
58 const char comment_chars[] = "#";
59
60 /* Characters which start a comment at the beginning of a line. */
61 const char line_comment_chars[] = ";#";
62
63 /* Characters which may be used to separate multiple commands on a
64 single line. */
65 const char line_separator_chars[] = ";";
66
67 /* Characters which are used to indicate an exponent in a floating
68 point number. */
69 const char EXP_CHARS[] = "eE";
70
71 /* Characters which mean that a number is a floating point constant,
72 as in 0d1.0. */
73 const char FLT_CHARS[] = "dD";
74 \f
75 const relax_typeS md_relax_table[] = {
76 /* Conditional branches. */
77 {0xff, -0x100, 2, 1},
78 {0x1fffff, -0x200000, 6, 0},
79 /* Unconditional branches. */
80 {0xff, -0x100, 2, 3},
81 {0x1fffff, -0x200000, 4, 0},
82 };
83
84 static segT sdata_section = NULL;
85 static segT tdata_section = NULL;
86 static segT zdata_section = NULL;
87 static segT sbss_section = NULL;
88 static segT tbss_section = NULL;
89 static segT zbss_section = NULL;
90 static segT rosdata_section = NULL;
91 static segT rozdata_section = NULL;
92 static segT scommon_section = NULL;
93 static segT tcommon_section = NULL;
94 static segT zcommon_section = NULL;
95 static segT call_table_data_section = NULL;
96 static segT call_table_text_section = NULL;
97
98 /* Fixups. */
99 #define MAX_INSN_FIXUPS (5)
100 struct v850_fixup {
101 expressionS exp;
102 int opindex;
103 bfd_reloc_code_real_type reloc;
104 };
105
106 struct v850_fixup fixups[MAX_INSN_FIXUPS];
107 static int fc;
108 \f
109 void
110 v850_sdata (int ignore ATTRIBUTE_UNUSED)
111 {
112 obj_elf_section_change_hook ();
113
114 subseg_set (sdata_section, (subsegT) get_absolute_expression ());
115
116 demand_empty_rest_of_line ();
117 }
118
119 void
120 v850_tdata (int ignore ATTRIBUTE_UNUSED)
121 {
122 obj_elf_section_change_hook ();
123
124 subseg_set (tdata_section, (subsegT) get_absolute_expression ());
125
126 demand_empty_rest_of_line ();
127 }
128
129 void
130 v850_zdata (int ignore ATTRIBUTE_UNUSED)
131 {
132 obj_elf_section_change_hook ();
133
134 subseg_set (zdata_section, (subsegT) get_absolute_expression ());
135
136 demand_empty_rest_of_line ();
137 }
138
139 void
140 v850_sbss (int ignore ATTRIBUTE_UNUSED)
141 {
142 obj_elf_section_change_hook ();
143
144 subseg_set (sbss_section, (subsegT) get_absolute_expression ());
145
146 demand_empty_rest_of_line ();
147 }
148
149 void
150 v850_tbss (int ignore ATTRIBUTE_UNUSED)
151 {
152 obj_elf_section_change_hook ();
153
154 subseg_set (tbss_section, (subsegT) get_absolute_expression ());
155
156 demand_empty_rest_of_line ();
157 }
158
159 void
160 v850_zbss (int ignore ATTRIBUTE_UNUSED)
161 {
162 obj_elf_section_change_hook ();
163
164 subseg_set (zbss_section, (subsegT) get_absolute_expression ());
165
166 demand_empty_rest_of_line ();
167 }
168
169 void
170 v850_rosdata (int ignore ATTRIBUTE_UNUSED)
171 {
172 obj_elf_section_change_hook ();
173
174 subseg_set (rosdata_section, (subsegT) get_absolute_expression ());
175
176 demand_empty_rest_of_line ();
177 }
178
179 void
180 v850_rozdata (int ignore ATTRIBUTE_UNUSED)
181 {
182 obj_elf_section_change_hook ();
183
184 subseg_set (rozdata_section, (subsegT) get_absolute_expression ());
185
186 demand_empty_rest_of_line ();
187 }
188
189 void
190 v850_call_table_data (int ignore ATTRIBUTE_UNUSED)
191 {
192 obj_elf_section_change_hook ();
193
194 subseg_set (call_table_data_section, (subsegT) get_absolute_expression ());
195
196 demand_empty_rest_of_line ();
197 }
198
199 void
200 v850_call_table_text (int ignore ATTRIBUTE_UNUSED)
201 {
202 obj_elf_section_change_hook ();
203
204 subseg_set (call_table_text_section, (subsegT) get_absolute_expression ());
205
206 demand_empty_rest_of_line ();
207 }
208
209 void
210 v850_bss (int ignore ATTRIBUTE_UNUSED)
211 {
212 register int temp = get_absolute_expression ();
213
214 obj_elf_section_change_hook ();
215
216 subseg_set (bss_section, (subsegT) temp);
217
218 demand_empty_rest_of_line ();
219 }
220
221 void
222 v850_offset (int ignore ATTRIBUTE_UNUSED)
223 {
224 int temp = get_absolute_expression ();
225
226 temp -= frag_now_fix ();
227
228 if (temp > 0)
229 (void) frag_more (temp);
230
231 demand_empty_rest_of_line ();
232 }
233
234 /* Copied from obj_elf_common() in gas/config/obj-elf.c. */
235
236 static void
237 v850_comm (area)
238 int area;
239 {
240 char *name;
241 char c;
242 char *p;
243 int temp;
244 unsigned int size;
245 symbolS *symbolP;
246 int have_align;
247
248 name = input_line_pointer;
249 c = get_symbol_end ();
250
251 /* Just after name is now '\0'. */
252 p = input_line_pointer;
253 *p = c;
254
255 SKIP_WHITESPACE ();
256
257 if (*input_line_pointer != ',')
258 {
259 as_bad (_("Expected comma after symbol-name"));
260 ignore_rest_of_line ();
261 return;
262 }
263
264 /* Skip ','. */
265 input_line_pointer++;
266
267 if ((temp = get_absolute_expression ()) < 0)
268 {
269 /* xgettext:c-format */
270 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
271 ignore_rest_of_line ();
272 return;
273 }
274
275 size = temp;
276 *p = 0;
277 symbolP = symbol_find_or_make (name);
278 *p = c;
279
280 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
281 {
282 as_bad (_("Ignoring attempt to re-define symbol"));
283 ignore_rest_of_line ();
284 return;
285 }
286
287 if (S_GET_VALUE (symbolP) != 0)
288 {
289 if (S_GET_VALUE (symbolP) != size)
290 {
291 /* xgettext:c-format */
292 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
293 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
294 }
295 }
296
297 know (symbol_get_frag (symbolP) == &zero_address_frag);
298
299 if (*input_line_pointer != ',')
300 have_align = 0;
301 else
302 {
303 have_align = 1;
304 input_line_pointer++;
305 SKIP_WHITESPACE ();
306 }
307
308 if (! have_align || *input_line_pointer != '"')
309 {
310 if (! have_align)
311 temp = 0;
312 else
313 {
314 temp = get_absolute_expression ();
315
316 if (temp < 0)
317 {
318 temp = 0;
319 as_warn (_("Common alignment negative; 0 assumed"));
320 }
321 }
322
323 if (symbol_get_obj (symbolP)->local)
324 {
325 segT old_sec;
326 int old_subsec;
327 char *pfrag;
328 int align;
329 flagword applicable;
330
331 old_sec = now_seg;
332 old_subsec = now_subseg;
333
334 applicable = bfd_applicable_section_flags (stdoutput);
335
336 applicable &= SEC_ALLOC;
337
338 switch (area)
339 {
340 case AREA_SDA:
341 if (sbss_section == NULL)
342 {
343 sbss_section = subseg_new (".sbss", 0);
344
345 bfd_set_section_flags (stdoutput, sbss_section, applicable);
346
347 seg_info (sbss_section)->bss = 1;
348 }
349 break;
350
351 case AREA_ZDA:
352 if (zbss_section == NULL)
353 {
354 zbss_section = subseg_new (".zbss", 0);
355
356 bfd_set_section_flags (stdoutput, sbss_section, applicable);
357
358 seg_info (zbss_section)->bss = 1;
359 }
360 break;
361
362 case AREA_TDA:
363 if (tbss_section == NULL)
364 {
365 tbss_section = subseg_new (".tbss", 0);
366
367 bfd_set_section_flags (stdoutput, tbss_section, applicable);
368
369 seg_info (tbss_section)->bss = 1;
370 }
371 break;
372 }
373
374 if (temp)
375 {
376 /* Convert to a power of 2 alignment. */
377 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
378 ;
379
380 if (temp != 1)
381 {
382 as_bad (_("Common alignment not a power of 2"));
383 ignore_rest_of_line ();
384 return;
385 }
386 }
387 else
388 align = 0;
389
390 switch (area)
391 {
392 case AREA_SDA:
393 record_alignment (sbss_section, align);
394 obj_elf_section_change_hook ();
395 subseg_set (sbss_section, 0);
396 break;
397
398 case AREA_ZDA:
399 record_alignment (zbss_section, align);
400 obj_elf_section_change_hook ();
401 subseg_set (zbss_section, 0);
402 break;
403
404 case AREA_TDA:
405 record_alignment (tbss_section, align);
406 obj_elf_section_change_hook ();
407 subseg_set (tbss_section, 0);
408 break;
409
410 default:
411 abort ();
412 }
413
414 if (align)
415 frag_align (align, 0, 0);
416
417 switch (area)
418 {
419 case AREA_SDA:
420 if (S_GET_SEGMENT (symbolP) == sbss_section)
421 symbol_get_frag (symbolP)->fr_symbol = 0;
422 break;
423
424 case AREA_ZDA:
425 if (S_GET_SEGMENT (symbolP) == zbss_section)
426 symbol_get_frag (symbolP)->fr_symbol = 0;
427 break;
428
429 case AREA_TDA:
430 if (S_GET_SEGMENT (symbolP) == tbss_section)
431 symbol_get_frag (symbolP)->fr_symbol = 0;
432 break;
433
434 default:
435 abort ();
436 }
437
438 symbol_set_frag (symbolP, frag_now);
439 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
440 (offsetT) size, (char *) 0);
441 *pfrag = 0;
442 S_SET_SIZE (symbolP, size);
443
444 switch (area)
445 {
446 case AREA_SDA:
447 S_SET_SEGMENT (symbolP, sbss_section);
448 break;
449
450 case AREA_ZDA:
451 S_SET_SEGMENT (symbolP, zbss_section);
452 break;
453
454 case AREA_TDA:
455 S_SET_SEGMENT (symbolP, tbss_section);
456 break;
457
458 default:
459 abort ();
460 }
461
462 S_CLEAR_EXTERNAL (symbolP);
463 obj_elf_section_change_hook ();
464 subseg_set (old_sec, old_subsec);
465 }
466 else
467 {
468 allocate_common:
469 S_SET_VALUE (symbolP, (valueT) size);
470 S_SET_ALIGN (symbolP, temp);
471 S_SET_EXTERNAL (symbolP);
472
473 switch (area)
474 {
475 case AREA_SDA:
476 if (scommon_section == NULL)
477 {
478 flagword applicable =
479 bfd_applicable_section_flags (stdoutput);
480
481 scommon_section = subseg_new (".scommon", 0);
482
483 bfd_set_section_flags (stdoutput, scommon_section,
484 (applicable
485 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
486 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
487 }
488 S_SET_SEGMENT (symbolP, scommon_section);
489 break;
490
491 case AREA_ZDA:
492 if (zcommon_section == NULL)
493 {
494 flagword applicable =
495 bfd_applicable_section_flags (stdoutput);
496
497 zcommon_section = subseg_new (".zcommon", 0);
498
499 bfd_set_section_flags (stdoutput, zcommon_section,
500 (applicable
501 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
502 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
503 }
504 S_SET_SEGMENT (symbolP, zcommon_section);
505 break;
506
507 case AREA_TDA:
508 if (tcommon_section == NULL)
509 {
510 flagword applicable =
511 bfd_applicable_section_flags (stdoutput);
512
513 tcommon_section = subseg_new (".tcommon", 0);
514
515 bfd_set_section_flags (stdoutput, tcommon_section,
516 ((applicable
517 & (SEC_ALLOC | SEC_LOAD
518 | SEC_RELOC | SEC_DATA
519 | SEC_HAS_CONTENTS))
520 | SEC_IS_COMMON));
521 }
522 S_SET_SEGMENT (symbolP, tcommon_section);
523 break;
524
525 default:
526 abort ();
527 }
528 }
529 }
530 else
531 {
532 input_line_pointer++;
533
534 /* @@ Some use the dot, some don't. Can we get some consistency?? */
535 if (*input_line_pointer == '.')
536 input_line_pointer++;
537
538 /* @@ Some say data, some say bss. */
539 if (strncmp (input_line_pointer, "bss\"", 4)
540 && strncmp (input_line_pointer, "data\"", 5))
541 {
542 while (*--input_line_pointer != '"')
543 ;
544 input_line_pointer--;
545 goto bad_common_segment;
546 }
547 while (*input_line_pointer++ != '"')
548 ;
549 goto allocate_common;
550 }
551
552 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
553
554 demand_empty_rest_of_line ();
555 return;
556
557 {
558 bad_common_segment:
559 p = input_line_pointer;
560 while (*p && *p != '\n')
561 p++;
562 c = *p;
563 *p = '\0';
564 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
565 *p = c;
566 input_line_pointer = p;
567 ignore_rest_of_line ();
568 return;
569 }
570 }
571
572 void
573 set_machine (int number)
574 {
575 machine = number;
576 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
577
578 switch (machine)
579 {
580 case 0: processor_mask = PROCESSOR_V850; break;
581 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
582 case bfd_mach_v850ea: processor_mask = PROCESSOR_V850EA; break;
583 }
584 }
585
586 /* The target specific pseudo-ops which we support. */
587 const pseudo_typeS md_pseudo_table[] = {
588 {"sdata", v850_sdata, 0},
589 {"tdata", v850_tdata, 0},
590 {"zdata", v850_zdata, 0},
591 {"sbss", v850_sbss, 0},
592 {"tbss", v850_tbss, 0},
593 {"zbss", v850_zbss, 0},
594 {"rosdata", v850_rosdata, 0},
595 {"rozdata", v850_rozdata, 0},
596 {"bss", v850_bss, 0},
597 {"offset", v850_offset, 0},
598 {"word", cons, 4},
599 {"zcomm", v850_comm, AREA_ZDA},
600 {"scomm", v850_comm, AREA_SDA},
601 {"tcomm", v850_comm, AREA_TDA},
602 {"v850", set_machine, 0},
603 {"call_table_data", v850_call_table_data, 0},
604 {"call_table_text", v850_call_table_text, 0},
605 {"v850e", set_machine, bfd_mach_v850e},
606 {"v850ea", set_machine, bfd_mach_v850ea},
607 {"file", dwarf2_directive_file, 0},
608 {"loc", dwarf2_directive_loc, 0},
609 { NULL, NULL, 0}
610 };
611
612 /* Opcode hash table. */
613 static struct hash_control *v850_hash;
614
615 /* This table is sorted. Suitable for searching by a binary search. */
616 static const struct reg_name pre_defined_registers[] = {
617 { "ep", 30 }, /* ep - element ptr */
618 { "gp", 4 }, /* gp - global ptr */
619 { "hp", 2 }, /* hp - handler stack ptr */
620 { "lp", 31 }, /* lp - link ptr */
621 { "r0", 0 },
622 { "r1", 1 },
623 { "r10", 10 },
624 { "r11", 11 },
625 { "r12", 12 },
626 { "r13", 13 },
627 { "r14", 14 },
628 { "r15", 15 },
629 { "r16", 16 },
630 { "r17", 17 },
631 { "r18", 18 },
632 { "r19", 19 },
633 { "r2", 2 },
634 { "r20", 20 },
635 { "r21", 21 },
636 { "r22", 22 },
637 { "r23", 23 },
638 { "r24", 24 },
639 { "r25", 25 },
640 { "r26", 26 },
641 { "r27", 27 },
642 { "r28", 28 },
643 { "r29", 29 },
644 { "r3", 3 },
645 { "r30", 30 },
646 { "r31", 31 },
647 { "r4", 4 },
648 { "r5", 5 },
649 { "r6", 6 },
650 { "r7", 7 },
651 { "r8", 8 },
652 { "r9", 9 },
653 { "sp", 3 }, /* sp - stack ptr */
654 { "tp", 5 }, /* tp - text ptr */
655 { "zero", 0 },
656 };
657
658 #define REG_NAME_CNT \
659 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
660
661 static const struct reg_name system_registers[] = {
662 { "ctbp", 20 },
663 { "ctpc", 16 },
664 { "ctpsw", 17 },
665 { "dbpc", 18 },
666 { "dbpsw", 19 },
667 { "ecr", 4 },
668 { "eipc", 0 },
669 { "eipsw", 1 },
670 { "fepc", 2 },
671 { "fepsw", 3 },
672 { "psw", 5 },
673 };
674
675 #define SYSREG_NAME_CNT \
676 (sizeof (system_registers) / sizeof (struct reg_name))
677
678 static const struct reg_name system_list_registers[] = {
679 {"PS", 5 },
680 {"SR", 0 + 1}
681 };
682
683 #define SYSREGLIST_NAME_CNT \
684 (sizeof (system_list_registers) / sizeof (struct reg_name))
685
686 static const struct reg_name cc_names[] = {
687 { "c", 0x1 },
688 { "e", 0x2 },
689 { "ge", 0xe },
690 { "gt", 0xf },
691 { "h", 0xb },
692 { "l", 0x1 },
693 { "le", 0x7 },
694 { "lt", 0x6 },
695 { "n", 0x4 },
696 { "nc", 0x9 },
697 { "ne", 0xa },
698 { "nh", 0x3 },
699 { "nl", 0x9 },
700 { "ns", 0xc },
701 { "nv", 0x8 },
702 { "nz", 0xa },
703 { "p", 0xc },
704 { "s", 0x4 },
705 { "sa", 0xd },
706 { "t", 0x5 },
707 { "v", 0x0 },
708 { "z", 0x2 },
709 };
710
711 #define CC_NAME_CNT \
712 (sizeof (cc_names) / sizeof (struct reg_name))
713
714 /* Do a binary search of the given register table to see if NAME is a
715 valid regiter name. Return the register number from the array on
716 success, or -1 on failure. */
717
718 static int
719 reg_name_search (regs, regcount, name, accept_numbers)
720 const struct reg_name *regs;
721 int regcount;
722 const char *name;
723 boolean accept_numbers;
724 {
725 int middle, low, high;
726 int cmp;
727 symbolS *symbolP;
728
729 /* If the register name is a symbol, then evaluate it. */
730 if ((symbolP = symbol_find (name)) != NULL)
731 {
732 /* If the symbol is an alias for another name then use that.
733 If the symbol is an alias for a number, then return the number. */
734 if (symbol_equated_p (symbolP))
735 {
736 name
737 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
738 }
739 else if (accept_numbers)
740 {
741 int reg = S_GET_VALUE (symbolP);
742
743 if (reg >= 0 && reg <= 31)
744 return reg;
745 }
746
747 /* Otherwise drop through and try parsing name normally. */
748 }
749
750 low = 0;
751 high = regcount - 1;
752
753 do
754 {
755 middle = (low + high) / 2;
756 cmp = strcasecmp (name, regs[middle].name);
757 if (cmp < 0)
758 high = middle - 1;
759 else if (cmp > 0)
760 low = middle + 1;
761 else
762 return regs[middle].value;
763 }
764 while (low <= high);
765 return -1;
766 }
767
768 /* Summary of register_name().
769 *
770 * in: Input_line_pointer points to 1st char of operand.
771 *
772 * out: A expressionS.
773 * The operand may have been a register: in this case, X_op == O_register,
774 * X_add_number is set to the register number, and truth is returned.
775 * Input_line_pointer->(next non-blank) char after operand, or is in
776 * its original state. */
777
778 static boolean
779 register_name (expressionP)
780 expressionS *expressionP;
781 {
782 int reg_number;
783 char *name;
784 char *start;
785 char c;
786
787 /* Find the spelling of the operand. */
788 start = name = input_line_pointer;
789
790 c = get_symbol_end ();
791
792 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
793 name, FALSE);
794
795 /* Put back the delimiting char. */
796 *input_line_pointer = c;
797
798 /* Look to see if it's in the register table. */
799 if (reg_number >= 0)
800 {
801 expressionP->X_op = O_register;
802 expressionP->X_add_number = reg_number;
803
804 /* Make the rest nice. */
805 expressionP->X_add_symbol = NULL;
806 expressionP->X_op_symbol = NULL;
807
808 return true;
809 }
810 else
811 {
812 /* Reset the line as if we had not done anything. */
813 input_line_pointer = start;
814
815 return false;
816 }
817 }
818
819 /* Summary of system_register_name().
820 *
821 * in: INPUT_LINE_POINTER points to 1st char of operand.
822 * EXPRESSIONP points to an expression structure to be filled in.
823 * ACCEPT_NUMBERS is true iff numerical register names may be used.
824 * ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
825 * accepted.
826 *
827 * out: A expressionS structure in expressionP.
828 * The operand may have been a register: in this case, X_op == O_register,
829 * X_add_number is set to the register number, and truth is returned.
830 * Input_line_pointer->(next non-blank) char after operand, or is in
831 * its original state. */
832
833 static boolean
834 system_register_name (expressionP, accept_numbers, accept_list_names)
835 expressionS *expressionP;
836 boolean accept_numbers;
837 boolean accept_list_names;
838 {
839 int reg_number;
840 char *name;
841 char *start;
842 char c;
843
844 /* Find the spelling of the operand. */
845 start = name = input_line_pointer;
846
847 c = get_symbol_end ();
848 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
849 accept_numbers);
850
851 /* Put back the delimiting char. */
852 *input_line_pointer = c;
853
854 if (reg_number < 0
855 && accept_numbers)
856 {
857 /* Reset input_line pointer. */
858 input_line_pointer = start;
859
860 if (isdigit (*input_line_pointer))
861 {
862 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
863
864 /* Make sure that the register number is allowable. */
865 if (reg_number < 0
866 || (reg_number > 5 && reg_number < 16)
867 || reg_number > 20)
868 {
869 reg_number = -1;
870 }
871 }
872 else if (accept_list_names)
873 {
874 c = get_symbol_end ();
875 reg_number = reg_name_search (system_list_registers,
876 SYSREGLIST_NAME_CNT, name, FALSE);
877
878 /* Put back the delimiting char. */
879 *input_line_pointer = c;
880 }
881 }
882
883 /* Look to see if it's in the register table. */
884 if (reg_number >= 0)
885 {
886 expressionP->X_op = O_register;
887 expressionP->X_add_number = reg_number;
888
889 /* Make the rest nice. */
890 expressionP->X_add_symbol = NULL;
891 expressionP->X_op_symbol = NULL;
892
893 return true;
894 }
895 else
896 {
897 /* Reset the line as if we had not done anything. */
898 input_line_pointer = start;
899
900 return false;
901 }
902 }
903
904 /* Summary of cc_name().
905 *
906 * in: INPUT_LINE_POINTER points to 1st char of operand.
907 *
908 * out: A expressionS.
909 * The operand may have been a register: in this case, X_op == O_register,
910 * X_add_number is set to the register number, and truth is returned.
911 * Input_line_pointer->(next non-blank) char after operand, or is in
912 * its original state. */
913
914 static boolean
915 cc_name (expressionP)
916 expressionS *expressionP;
917 {
918 int reg_number;
919 char *name;
920 char *start;
921 char c;
922
923 /* Find the spelling of the operand. */
924 start = name = input_line_pointer;
925
926 c = get_symbol_end ();
927 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
928
929 /* Put back the delimiting char. */
930 *input_line_pointer = c;
931
932 /* Look to see if it's in the register table. */
933 if (reg_number >= 0)
934 {
935 expressionP->X_op = O_constant;
936 expressionP->X_add_number = reg_number;
937
938 /* Make the rest nice. */
939 expressionP->X_add_symbol = NULL;
940 expressionP->X_op_symbol = NULL;
941
942 return true;
943 }
944 else
945 {
946 /* Reset the line as if we had not done anything. */
947 input_line_pointer = start;
948
949 return false;
950 }
951 }
952
953 static void
954 skip_white_space (void)
955 {
956 while (*input_line_pointer == ' '
957 || *input_line_pointer == '\t')
958 ++input_line_pointer;
959 }
960
961 /* Summary of parse_register_list ().
962 *
963 * in: INPUT_LINE_POINTER points to 1st char of a list of registers.
964 * INSN is the partially constructed instruction.
965 * OPERAND is the operand being inserted.
966 *
967 * out: NULL if the parse completed successfully, otherwise a
968 * pointer to an error message is returned. If the parse
969 * completes the correct bit fields in the instruction
970 * will be filled in.
971 *
972 * Parses register lists with the syntax:
973 *
974 * { rX }
975 * { rX, rY }
976 * { rX - rY }
977 * { rX - rY, rZ }
978 * etc
979 *
980 * and also parses constant epxressions whoes bits indicate the
981 * registers in the lists. The LSB in the expression refers to
982 * the lowest numbered permissable register in the register list,
983 * and so on upwards. System registers are considered to be very
984 * high numbers. */
985
986 static char *
987 parse_register_list (insn, operand)
988 unsigned long *insn;
989 const struct v850_operand *operand;
990 {
991 static int type1_regs[32] = {
992 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
993 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
994 };
995 static int type2_regs[32] = {
996 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
997 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
998 };
999 static int type3_regs[32] = {
1000 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1001 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
1002 };
1003 int *regs;
1004 expressionS exp;
1005
1006 /* Select a register array to parse. */
1007 switch (operand->shift)
1008 {
1009 case 0xffe00001: regs = type1_regs; break;
1010 case 0xfff8000f: regs = type2_regs; break;
1011 case 0xfff8001f: regs = type3_regs; break;
1012 default:
1013 as_bad (_("unknown operand shift: %x\n"), operand->shift);
1014 return _("internal failure in parse_register_list");
1015 }
1016
1017 skip_white_space ();
1018
1019 /* If the expression starts with a curly brace it is a register list.
1020 Otherwise it is a constant expression, whoes bits indicate which
1021 registers are to be included in the list. */
1022
1023 if (*input_line_pointer != '{')
1024 {
1025 int reg;
1026 int i;
1027
1028 expression (&exp);
1029
1030 if (exp.X_op != O_constant)
1031 return _("constant expression or register list expected");
1032
1033 if (regs == type1_regs)
1034 {
1035 if (exp.X_add_number & 0xFFFFF000)
1036 return _("high bits set in register list expression");
1037
1038 for (reg = 20; reg < 32; reg++)
1039 if (exp.X_add_number & (1 << (reg - 20)))
1040 {
1041 for (i = 0; i < 32; i++)
1042 if (regs[i] == reg)
1043 *insn |= (1 << i);
1044 }
1045 }
1046 else if (regs == type2_regs)
1047 {
1048 if (exp.X_add_number & 0xFFFE0000)
1049 return _("high bits set in register list expression");
1050
1051 for (reg = 1; reg < 16; reg++)
1052 if (exp.X_add_number & (1 << (reg - 1)))
1053 {
1054 for (i = 0; i < 32; i++)
1055 if (regs[i] == reg)
1056 *insn |= (1 << i);
1057 }
1058
1059 if (exp.X_add_number & (1 << 15))
1060 *insn |= (1 << 3);
1061
1062 if (exp.X_add_number & (1 << 16))
1063 *insn |= (1 << 19);
1064 }
1065 else /* regs == type3_regs */
1066 {
1067 if (exp.X_add_number & 0xFFFE0000)
1068 return _("high bits set in register list expression");
1069
1070 for (reg = 16; reg < 32; reg++)
1071 if (exp.X_add_number & (1 << (reg - 16)))
1072 {
1073 for (i = 0; i < 32; i++)
1074 if (regs[i] == reg)
1075 *insn |= (1 << i);
1076 }
1077
1078 if (exp.X_add_number & (1 << 16))
1079 *insn |= (1 << 19);
1080 }
1081
1082 return NULL;
1083 }
1084
1085 input_line_pointer++;
1086
1087 /* Parse the register list until a terminator (closing curly brace or
1088 new-line) is found. */
1089 for (;;)
1090 {
1091 if (register_name (&exp))
1092 {
1093 int i;
1094
1095 /* Locate the given register in the list, and if it is there,
1096 insert the corresponding bit into the instruction. */
1097 for (i = 0; i < 32; i++)
1098 {
1099 if (regs[i] == exp.X_add_number)
1100 {
1101 *insn |= (1 << i);
1102 break;
1103 }
1104 }
1105
1106 if (i == 32)
1107 {
1108 return _("illegal register included in list");
1109 }
1110 }
1111 else if (system_register_name (&exp, true, true))
1112 {
1113 if (regs == type1_regs)
1114 {
1115 return _("system registers cannot be included in list");
1116 }
1117 else if (exp.X_add_number == 5)
1118 {
1119 if (regs == type2_regs)
1120 return _("PSW cannot be included in list");
1121 else
1122 *insn |= 0x8;
1123 }
1124 else if (exp.X_add_number < 4)
1125 *insn |= 0x80000;
1126 else
1127 return _("High value system registers cannot be included in list");
1128 }
1129 else if (*input_line_pointer == '}')
1130 {
1131 input_line_pointer++;
1132 break;
1133 }
1134 else if (*input_line_pointer == ',')
1135 {
1136 input_line_pointer++;
1137 continue;
1138 }
1139 else if (*input_line_pointer == '-')
1140 {
1141 /* We have encountered a range of registers: rX - rY. */
1142 int j;
1143 expressionS exp2;
1144
1145 /* Skip the dash. */
1146 ++input_line_pointer;
1147
1148 /* Get the second register in the range. */
1149 if (! register_name (&exp2))
1150 {
1151 return _("second register should follow dash in register list");
1152 exp2.X_add_number = exp.X_add_number;
1153 }
1154
1155 /* Add the rest of the registers in the range. */
1156 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1157 {
1158 int i;
1159
1160 /* Locate the given register in the list, and if it is there,
1161 insert the corresponding bit into the instruction. */
1162 for (i = 0; i < 32; i++)
1163 {
1164 if (regs[i] == j)
1165 {
1166 *insn |= (1 << i);
1167 break;
1168 }
1169 }
1170
1171 if (i == 32)
1172 return _("illegal register included in list");
1173 }
1174 }
1175 else
1176 {
1177 break;
1178 }
1179
1180 skip_white_space ();
1181 }
1182
1183 return NULL;
1184 }
1185
1186 CONST char *md_shortopts = "m:";
1187
1188 struct option md_longopts[] = {
1189 {NULL, no_argument, NULL, 0}
1190 };
1191
1192 size_t md_longopts_size = sizeof (md_longopts);
1193
1194 void
1195 md_show_usage (stream)
1196 FILE *stream;
1197 {
1198 fprintf (stream, _(" V850 options:\n"));
1199 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1200 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1201 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1202 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1203 fprintf (stream, _(" -mv850ea The code is targeted at the v850ea\n"));
1204 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1205 }
1206
1207 int
1208 md_parse_option (c, arg)
1209 int c;
1210 char *arg;
1211 {
1212 if (c != 'm')
1213 {
1214 if (c != 'a')
1215 /* xgettext:c-format */
1216 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1217 return 0;
1218 }
1219
1220 if (strcmp (arg, "warn-signed-overflow") == 0)
1221 {
1222 warn_signed_overflows = TRUE;
1223 }
1224 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1225 {
1226 warn_unsigned_overflows = TRUE;
1227 }
1228 else if (strcmp (arg, "v850") == 0)
1229 {
1230 machine = 0;
1231 processor_mask = PROCESSOR_V850;
1232 }
1233 else if (strcmp (arg, "v850e") == 0)
1234 {
1235 machine = bfd_mach_v850e;
1236 processor_mask = PROCESSOR_V850E;
1237 }
1238 else if (strcmp (arg, "v850ea") == 0)
1239 {
1240 machine = bfd_mach_v850ea;
1241 processor_mask = PROCESSOR_V850EA;
1242 }
1243 else if (strcmp (arg, "v850any") == 0)
1244 {
1245 /* Tell the world that this is for any v850 chip. */
1246 machine = 0;
1247
1248 /* But support instructions for the extended versions. */
1249 processor_mask = PROCESSOR_V850EA;
1250 }
1251 else
1252 {
1253 /* xgettext:c-format */
1254 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1255 return 0;
1256 }
1257
1258 return 1;
1259 }
1260
1261 symbolS *
1262 md_undefined_symbol (name)
1263 char *name ATTRIBUTE_UNUSED;
1264 {
1265 return 0;
1266 }
1267
1268 char *
1269 md_atof (type, litp, sizep)
1270 int type;
1271 char *litp;
1272 int *sizep;
1273 {
1274 int prec;
1275 LITTLENUM_TYPE words[4];
1276 char *t;
1277 int i;
1278
1279 switch (type)
1280 {
1281 case 'f':
1282 prec = 2;
1283 break;
1284
1285 case 'd':
1286 prec = 4;
1287 break;
1288
1289 default:
1290 *sizep = 0;
1291 return _("bad call to md_atof");
1292 }
1293
1294 t = atof_ieee (input_line_pointer, type, words);
1295 if (t)
1296 input_line_pointer = t;
1297
1298 *sizep = prec * 2;
1299
1300 for (i = prec - 1; i >= 0; i--)
1301 {
1302 md_number_to_chars (litp, (valueT) words[i], 2);
1303 litp += 2;
1304 }
1305
1306 return NULL;
1307 }
1308
1309 /* Very gross. */
1310
1311 void
1312 md_convert_frag (abfd, sec, fragP)
1313 bfd *abfd ATTRIBUTE_UNUSED;
1314 asection *sec;
1315 fragS *fragP;
1316 {
1317 subseg_change (sec, 0);
1318
1319 /* In range conditional or unconditional branch. */
1320 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1321 {
1322 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1323 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1324 fragP->fr_fix += 2;
1325 }
1326 /* Out of range conditional branch. Emit a branch around a jump. */
1327 else if (fragP->fr_subtype == 1)
1328 {
1329 unsigned char *buffer =
1330 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1331
1332 /* Reverse the condition of the first branch. */
1333 buffer[0] ^= 0x08;
1334 /* Mask off all the displacement bits. */
1335 buffer[0] &= 0x8f;
1336 buffer[1] &= 0x07;
1337 /* Now set the displacement bits so that we branch
1338 around the unconditional branch. */
1339 buffer[0] |= 0x30;
1340
1341 /* Now create the unconditional branch + fixup to the final
1342 target. */
1343 md_number_to_chars (buffer + 2, 0x00000780, 4);
1344 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1345 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1346 (int) fragP->fr_opcode + 1);
1347 fragP->fr_fix += 6;
1348 }
1349 /* Out of range unconditional branch. Emit a jump. */
1350 else if (fragP->fr_subtype == 3)
1351 {
1352 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1353 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1354 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1355 (int) fragP->fr_opcode + 1);
1356 fragP->fr_fix += 4;
1357 }
1358 else
1359 abort ();
1360 }
1361
1362 valueT
1363 md_section_align (seg, addr)
1364 asection *seg;
1365 valueT addr;
1366 {
1367 int align = bfd_get_section_alignment (stdoutput, seg);
1368 return ((addr + (1 << align) - 1) & (-1 << align));
1369 }
1370
1371 void
1372 md_begin ()
1373 {
1374 char *prev_name = "";
1375 register const struct v850_opcode *op;
1376 flagword applicable;
1377
1378 if (strncmp (TARGET_CPU, "v850ea", 6) == 0)
1379 {
1380 if (machine == -1)
1381 machine = bfd_mach_v850ea;
1382
1383 if (processor_mask == -1)
1384 processor_mask = PROCESSOR_V850EA;
1385 }
1386 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1387 {
1388 if (machine == -1)
1389 machine = bfd_mach_v850e;
1390
1391 if (processor_mask == -1)
1392 processor_mask = PROCESSOR_V850E;
1393 }
1394 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
1395 {
1396 if (machine == -1)
1397 machine = 0;
1398
1399 if (processor_mask == -1)
1400 processor_mask = PROCESSOR_V850;
1401 }
1402 else
1403 /* xgettext:c-format */
1404 as_bad (_("Unable to determine default target processor from string: %s"),
1405 TARGET_CPU);
1406
1407 v850_hash = hash_new ();
1408
1409 /* Insert unique names into hash table. The V850 instruction set
1410 has many identical opcode names that have different opcodes based
1411 on the operands. This hash table then provides a quick index to
1412 the first opcode with a particular name in the opcode table. */
1413
1414 op = v850_opcodes;
1415 while (op->name)
1416 {
1417 if (strcmp (prev_name, op->name))
1418 {
1419 prev_name = (char *) op->name;
1420 hash_insert (v850_hash, op->name, (char *) op);
1421 }
1422 op++;
1423 }
1424
1425 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1426
1427 applicable = bfd_applicable_section_flags (stdoutput);
1428
1429 call_table_data_section = subseg_new (".call_table_data", 0);
1430 bfd_set_section_flags (stdoutput, call_table_data_section,
1431 applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC
1432 | SEC_DATA | SEC_HAS_CONTENTS));
1433
1434 call_table_text_section = subseg_new (".call_table_text", 0);
1435 bfd_set_section_flags (stdoutput, call_table_text_section,
1436 applicable & (SEC_ALLOC | SEC_LOAD | SEC_READONLY
1437 | SEC_CODE));
1438
1439 /* Restore text section as the current default. */
1440 subseg_set (text_section, 0);
1441 }
1442
1443 static bfd_reloc_code_real_type
1444 handle_ctoff (const struct v850_operand *operand)
1445 {
1446 if (operand == NULL)
1447 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1448
1449 if (operand->bits != 6
1450 || operand->shift != 0)
1451 {
1452 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1453 return BFD_RELOC_64; /* Used to indicate an error condition. */
1454 }
1455
1456 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1457 }
1458
1459 static bfd_reloc_code_real_type
1460 handle_sdaoff (const struct v850_operand *operand)
1461 {
1462 if (operand == NULL)
1463 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1464
1465 if (operand->bits == 15 && operand->shift == 17)
1466 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1467
1468 if (operand->bits == -1)
1469 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1470
1471 if (operand->bits != 16
1472 || operand->shift != 16)
1473 {
1474 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1475 return BFD_RELOC_64; /* Used to indicate an error condition. */
1476 }
1477
1478 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1479 }
1480
1481 static bfd_reloc_code_real_type
1482 handle_zdaoff (const struct v850_operand *operand)
1483 {
1484 if (operand == NULL)
1485 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1486
1487 if (operand->bits == 15 && operand->shift == 17)
1488 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1489
1490 if (operand->bits == -1)
1491 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1492
1493 if (operand->bits != 16
1494 || operand->shift != 16)
1495 {
1496 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
1497 /* Used to indicate an error condition. */
1498 return BFD_RELOC_64;
1499 }
1500
1501 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1502 }
1503
1504 static bfd_reloc_code_real_type
1505 handle_tdaoff (const struct v850_operand *operand)
1506 {
1507 if (operand == NULL)
1508 /* Data item, not an instruction. */
1509 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1510
1511 if (operand->bits == 6 && operand->shift == 1)
1512 /* sld.w/sst.w, operand: D8_6 */
1513 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1514
1515 if (operand->bits == 4 && operand->insert != NULL)
1516 /* sld.hu, operand: D5-4 */
1517 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1518
1519 if (operand->bits == 4 && operand->insert == NULL)
1520 /* sld.bu, operand: D4 */
1521 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1522
1523 if (operand->bits == 16 && operand->shift == 16)
1524 /* set1 & chums, operands: D16 */
1525 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1526
1527 if (operand->bits != 7)
1528 {
1529 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
1530 /* Used to indicate an error condition. */
1531 return BFD_RELOC_64;
1532 }
1533
1534 return operand->insert != NULL
1535 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1536 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
1537 }
1538
1539 /* Warning: The code in this function relies upon the definitions
1540 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1541 matching the hard coded values contained herein. */
1542
1543 static bfd_reloc_code_real_type
1544 v850_reloc_prefix (const struct v850_operand *operand)
1545 {
1546 boolean paren_skipped = false;
1547
1548 /* Skip leading opening parenthesis. */
1549 if (*input_line_pointer == '(')
1550 {
1551 ++input_line_pointer;
1552 paren_skipped = true;
1553 }
1554
1555 #define CHECK_(name, reloc) \
1556 if (strncmp (input_line_pointer, name##"(", strlen (name) + 1) == 0) \
1557 { \
1558 input_line_pointer += strlen (name); \
1559 return reloc; \
1560 }
1561
1562 CHECK_ ("hi0", BFD_RELOC_HI16 );
1563 CHECK_ ("hi", BFD_RELOC_HI16_S );
1564 CHECK_ ("lo", BFD_RELOC_LO16 );
1565 CHECK_ ("sdaoff", handle_sdaoff (operand));
1566 CHECK_ ("zdaoff", handle_zdaoff (operand));
1567 CHECK_ ("tdaoff", handle_tdaoff (operand));
1568 CHECK_ ("hilo", BFD_RELOC_32 );
1569 CHECK_ ("ctoff", handle_ctoff (operand) );
1570
1571 /* Restore skipped parenthesis. */
1572 if (paren_skipped)
1573 --input_line_pointer;
1574
1575 return BFD_RELOC_UNUSED;
1576 }
1577
1578 /* Insert an operand value into an instruction. */
1579
1580 static unsigned long
1581 v850_insert_operand (insn, operand, val, file, line, str)
1582 unsigned long insn;
1583 const struct v850_operand *operand;
1584 offsetT val;
1585 char *file;
1586 unsigned int line;
1587 char *str;
1588 {
1589 if (operand->insert)
1590 {
1591 const char *message = NULL;
1592
1593 insn = operand->insert (insn, val, &message);
1594 if (message != NULL)
1595 {
1596 if ((operand->flags & V850_OPERAND_SIGNED)
1597 && ! warn_signed_overflows
1598 && strstr (message, "out of range") != NULL)
1599 {
1600 /* Skip warning... */
1601 }
1602 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1603 && ! warn_unsigned_overflows
1604 && strstr (message, "out of range") != NULL)
1605 {
1606 /* Skip warning... */
1607 }
1608 else if (str)
1609 {
1610 if (file == (char *) NULL)
1611 as_warn ("%s: %s", str, message);
1612 else
1613 as_warn_where (file, line, "%s: %s", str, message);
1614 }
1615 else
1616 {
1617 if (file == (char *) NULL)
1618 as_warn (message);
1619 else
1620 as_warn_where (file, line, message);
1621 }
1622 }
1623 }
1624 else
1625 {
1626 if (operand->bits != 32)
1627 {
1628 long min, max;
1629
1630 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1631 {
1632 if (! warn_signed_overflows)
1633 max = (1 << operand->bits) - 1;
1634 else
1635 max = (1 << (operand->bits - 1)) - 1;
1636
1637 min = -(1 << (operand->bits - 1));
1638 }
1639 else
1640 {
1641 max = (1 << operand->bits) - 1;
1642
1643 if (! warn_unsigned_overflows)
1644 min = -(1 << (operand->bits - 1));
1645 else
1646 min = 0;
1647 }
1648
1649 if (val < (offsetT) min || val > (offsetT) max)
1650 {
1651 /* xgettext:c-format */
1652 const char *err =
1653 _("operand out of range (%s not between %ld and %ld)");
1654 char buf[100];
1655
1656 /* Restore min and mix to expected values for decimal ranges. */
1657 if ((operand->flags & V850_OPERAND_SIGNED)
1658 && ! warn_signed_overflows)
1659 max = (1 << (operand->bits - 1)) - 1;
1660
1661 if (! (operand->flags & V850_OPERAND_SIGNED)
1662 && ! warn_unsigned_overflows)
1663 min = 0;
1664
1665 if (str)
1666 {
1667 sprintf (buf, "%s: ", str);
1668
1669 sprint_value (buf + strlen (buf), val);
1670 }
1671 else
1672 sprint_value (buf, val);
1673
1674 if (file == (char *) NULL)
1675 as_warn (err, buf, min, max);
1676 else
1677 as_warn_where (file, line, err, buf, min, max);
1678 }
1679 }
1680
1681 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1682 }
1683
1684 return insn;
1685 }
1686 \f
1687 static char copy_of_instruction[128];
1688
1689 void
1690 md_assemble (str)
1691 char *str;
1692 {
1693 char *s;
1694 char *start_of_operands;
1695 struct v850_opcode *opcode;
1696 struct v850_opcode *next_opcode;
1697 const unsigned char *opindex_ptr;
1698 int next_opindex;
1699 int relaxable = 0;
1700 unsigned long insn;
1701 unsigned long insn_size;
1702 unsigned long total_insn_size = 0;
1703 char *f;
1704 int i;
1705 int match;
1706 boolean extra_data_after_insn = false;
1707 unsigned extra_data_len = 0;
1708 unsigned long extra_data = 0;
1709 char *saved_input_line_pointer;
1710
1711 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
1712
1713 /* Get the opcode. */
1714 for (s = str; *s != '\0' && ! isspace (*s); s++)
1715 continue;
1716
1717 if (*s != '\0')
1718 *s++ = '\0';
1719
1720 /* Find the first opcode with the proper name. */
1721 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1722 if (opcode == NULL)
1723 {
1724 /* xgettext:c-format */
1725 as_bad (_("Unrecognized opcode: `%s'"), str);
1726 ignore_rest_of_line ();
1727 return;
1728 }
1729
1730 str = s;
1731 while (isspace (*str))
1732 ++str;
1733
1734 start_of_operands = str;
1735
1736 saved_input_line_pointer = input_line_pointer;
1737
1738 for (;;)
1739 {
1740 const char *errmsg = NULL;
1741
1742 match = 0;
1743
1744 if ((opcode->processors & processor_mask) == 0)
1745 {
1746 errmsg = _("Target processor does not support this instruction.");
1747 goto error;
1748 }
1749
1750 relaxable = 0;
1751 fc = 0;
1752 next_opindex = 0;
1753 insn = opcode->opcode;
1754 extra_data_after_insn = false;
1755
1756 input_line_pointer = str = start_of_operands;
1757
1758 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1759 {
1760 const struct v850_operand *operand;
1761 char *hold;
1762 expressionS ex;
1763 bfd_reloc_code_real_type reloc;
1764
1765 if (next_opindex == 0)
1766 {
1767 operand = &v850_operands[*opindex_ptr];
1768 }
1769 else
1770 {
1771 operand = &v850_operands[next_opindex];
1772 next_opindex = 0;
1773 }
1774
1775 errmsg = NULL;
1776
1777 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1778 ++str;
1779
1780 if (operand->flags & V850_OPERAND_RELAX)
1781 relaxable = 1;
1782
1783 /* Gather the operand. */
1784 hold = input_line_pointer;
1785 input_line_pointer = str;
1786
1787 /* lo(), hi(), hi0(), etc... */
1788 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1789 {
1790 /* This is a fake reloc, used to indicate an error condition. */
1791 if (reloc == BFD_RELOC_64)
1792 {
1793 match = 1;
1794 goto error;
1795 }
1796
1797 expression (&ex);
1798
1799 if (ex.X_op == O_constant)
1800 {
1801 switch (reloc)
1802 {
1803 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1804 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1805 and the like. */
1806 /* Fall through. */
1807
1808 case BFD_RELOC_LO16:
1809 {
1810 /* Truncate, then sign extend the value. */
1811 ex.X_add_number = SEXT16 (ex.X_add_number);
1812 break;
1813 }
1814
1815 case BFD_RELOC_HI16:
1816 {
1817 /* Truncate, then sign extend the value. */
1818 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1819 break;
1820 }
1821
1822 case BFD_RELOC_HI16_S:
1823 {
1824 /* Truncate, then sign extend the value. */
1825 int temp = (ex.X_add_number >> 16) & 0xffff;
1826
1827 temp += (ex.X_add_number >> 15) & 1;
1828
1829 ex.X_add_number = SEXT16 (temp);
1830 break;
1831 }
1832
1833 case BFD_RELOC_32:
1834 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1835 {
1836 errmsg = _("immediate operand is too large");
1837 goto error;
1838 }
1839
1840 extra_data_after_insn = true;
1841 extra_data_len = 4;
1842 extra_data = ex.X_add_number;
1843 ex.X_add_number = 0;
1844 break;
1845
1846 default:
1847 fprintf (stderr, "reloc: %d\n", reloc);
1848 as_bad (_("AAARG -> unhandled constant reloc"));
1849 break;
1850 }
1851
1852 if (fc > MAX_INSN_FIXUPS)
1853 as_fatal (_("too many fixups"));
1854
1855 fixups[fc].exp = ex;
1856 fixups[fc].opindex = *opindex_ptr;
1857 fixups[fc].reloc = reloc;
1858 fc++;
1859 }
1860 else
1861 {
1862 if (reloc == BFD_RELOC_32)
1863 {
1864 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1865 {
1866 errmsg = _("immediate operand is too large");
1867 goto error;
1868 }
1869
1870 extra_data_after_insn = true;
1871 extra_data_len = 4;
1872 extra_data = ex.X_add_number;
1873 }
1874
1875 if (fc > MAX_INSN_FIXUPS)
1876 as_fatal (_("too many fixups"));
1877
1878 fixups[fc].exp = ex;
1879 fixups[fc].opindex = *opindex_ptr;
1880 fixups[fc].reloc = reloc;
1881 fc++;
1882 }
1883 }
1884 else
1885 {
1886 errmsg = NULL;
1887
1888 if ((operand->flags & V850_OPERAND_REG) != 0)
1889 {
1890 if (!register_name (&ex))
1891 {
1892 errmsg = _("invalid register name");
1893 }
1894 else if ((operand->flags & V850_NOT_R0)
1895 && ex.X_add_number == 0)
1896 {
1897 errmsg = _("register r0 cannot be used here");
1898
1899 /* Force an error message to be generated by
1900 skipping over any following potential matches
1901 for this opcode. */
1902 opcode += 3;
1903 }
1904 }
1905 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1906 {
1907 if (!system_register_name (&ex, true, false))
1908 {
1909 errmsg = _("invalid system register name");
1910 }
1911 }
1912 else if ((operand->flags & V850_OPERAND_EP) != 0)
1913 {
1914 char *start = input_line_pointer;
1915 char c = get_symbol_end ();
1916
1917 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1918 {
1919 /* Put things back the way we found them. */
1920 *input_line_pointer = c;
1921 input_line_pointer = start;
1922 errmsg = _("expected EP register");
1923 goto error;
1924 }
1925
1926 *input_line_pointer = c;
1927 str = input_line_pointer;
1928 input_line_pointer = hold;
1929
1930 while (*str == ' ' || *str == ','
1931 || *str == '[' || *str == ']')
1932 ++str;
1933 continue;
1934 }
1935 else if ((operand->flags & V850_OPERAND_CC) != 0)
1936 {
1937 if (!cc_name (&ex))
1938 {
1939 errmsg = _("invalid condition code name");
1940 }
1941 }
1942 else if (operand->flags & V850E_PUSH_POP)
1943 {
1944 errmsg = parse_register_list (&insn, operand);
1945
1946 /* The parse_register_list() function has already done
1947 everything, so fake a dummy expression. */
1948 ex.X_op = O_constant;
1949 ex.X_add_number = 0;
1950 }
1951 else if (operand->flags & V850E_IMMEDIATE16)
1952 {
1953 expression (&ex);
1954
1955 if (ex.X_op != O_constant)
1956 errmsg = _("constant expression expected");
1957 else if (ex.X_add_number & 0xffff0000)
1958 {
1959 if (ex.X_add_number & 0xffff)
1960 errmsg = _("constant too big to fit into instruction");
1961 else if ((insn & 0x001fffc0) == 0x00130780)
1962 ex.X_add_number >>= 16;
1963 else
1964 errmsg = _("constant too big to fit into instruction");
1965 }
1966
1967 extra_data_after_insn = true;
1968 extra_data_len = 2;
1969 extra_data = ex.X_add_number;
1970 ex.X_add_number = 0;
1971 }
1972 else if (operand->flags & V850E_IMMEDIATE32)
1973 {
1974 expression (&ex);
1975
1976 if (ex.X_op != O_constant)
1977 errmsg = _("constant expression expected");
1978
1979 extra_data_after_insn = true;
1980 extra_data_len = 4;
1981 extra_data = ex.X_add_number;
1982 ex.X_add_number = 0;
1983 }
1984 else if (register_name (&ex)
1985 && (operand->flags & V850_OPERAND_REG) == 0)
1986 {
1987 char c;
1988 int exists = 0;
1989
1990 /* It is possible that an alias has been defined that
1991 matches a register name. For example the code may
1992 include a ".set ZERO, 0" directive, which matches
1993 the register name "zero". Attempt to reparse the
1994 field as an expression, and only complain if we
1995 cannot generate a constant. */
1996
1997 input_line_pointer = str;
1998
1999 c = get_symbol_end ();
2000
2001 if (symbol_find (str) != NULL)
2002 exists = 1;
2003
2004 *input_line_pointer = c;
2005 input_line_pointer = str;
2006
2007 expression (&ex);
2008
2009 if (ex.X_op != O_constant)
2010 {
2011 /* If this register is actually occuring too early on
2012 the parsing of the instruction, (because another
2013 field is missing) then report this. */
2014 if (opindex_ptr[1] != 0
2015 && (v850_operands[opindex_ptr[1]].flags
2016 & V850_OPERAND_REG))
2017 errmsg = _("syntax error: value is missing before the register name");
2018 else
2019 errmsg = _("syntax error: register not expected");
2020
2021 /* If we created a symbol in the process of this
2022 test then delete it now, so that it will not
2023 be output with the real symbols... */
2024 if (exists == 0
2025 && ex.X_op == O_symbol)
2026 symbol_remove (ex.X_add_symbol,
2027 &symbol_rootP, &symbol_lastP);
2028 }
2029 }
2030 else if (system_register_name (&ex, false, false)
2031 && (operand->flags & V850_OPERAND_SRG) == 0)
2032 {
2033 errmsg = _("syntax error: system register not expected");
2034 }
2035 else if (cc_name (&ex)
2036 && (operand->flags & V850_OPERAND_CC) == 0)
2037 {
2038 errmsg = _("syntax error: condition code not expected");
2039 }
2040 else
2041 {
2042 expression (&ex);
2043 /* Special case:
2044 If we are assembling a MOV instruction (or a CALLT.... :-)
2045 and the immediate value does not fit into the bits
2046 available then create a fake error so that the next MOV
2047 instruction will be selected. This one has a 32 bit
2048 immediate field. */
2049
2050 if (((insn & 0x07e0) == 0x0200)
2051 && ex.X_op == O_constant
2052 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
2053 || ex.X_add_number > ((1 << operand->bits) - 1)))
2054 errmsg = _("immediate operand is too large");
2055 }
2056
2057 if (errmsg)
2058 goto error;
2059
2060 #if 0
2061 fprintf (stderr,
2062 " insn: %x, operand %d, op: %d, add_number: %d\n",
2063 insn, opindex_ptr - opcode->operands,
2064 ex.X_op, ex.X_add_number);
2065 #endif
2066
2067 switch (ex.X_op)
2068 {
2069 case O_illegal:
2070 errmsg = _("illegal operand");
2071 goto error;
2072 case O_absent:
2073 errmsg = _("missing operand");
2074 goto error;
2075 case O_register:
2076 if ((operand->flags
2077 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
2078 {
2079 errmsg = _("invalid operand");
2080 goto error;
2081 }
2082 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2083 (char *) NULL, 0,
2084 copy_of_instruction);
2085 break;
2086
2087 case O_constant:
2088 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2089 (char *) NULL, 0,
2090 copy_of_instruction);
2091 break;
2092
2093 default:
2094 /* We need to generate a fixup for this expression. */
2095 if (fc >= MAX_INSN_FIXUPS)
2096 as_fatal (_("too many fixups"));
2097
2098 fixups[fc].exp = ex;
2099 fixups[fc].opindex = *opindex_ptr;
2100 fixups[fc].reloc = BFD_RELOC_UNUSED;
2101 ++fc;
2102 break;
2103 }
2104 }
2105
2106 str = input_line_pointer;
2107 input_line_pointer = hold;
2108
2109 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2110 || *str == ')')
2111 ++str;
2112 }
2113 match = 1;
2114
2115 error:
2116 if (match == 0)
2117 {
2118 next_opcode = opcode + 1;
2119 if (next_opcode->name != NULL
2120 && strcmp (next_opcode->name, opcode->name) == 0)
2121 {
2122 opcode = next_opcode;
2123
2124 /* Skip versions that are not supported by the target
2125 processor. */
2126 if ((opcode->processors & processor_mask) == 0)
2127 goto error;
2128
2129 continue;
2130 }
2131
2132 as_bad ("%s: %s", copy_of_instruction, errmsg);
2133
2134 if (*input_line_pointer == ']')
2135 ++input_line_pointer;
2136
2137 ignore_rest_of_line ();
2138 input_line_pointer = saved_input_line_pointer;
2139 return;
2140 }
2141 break;
2142 }
2143
2144 while (isspace (*str))
2145 ++str;
2146
2147 if (*str != '\0')
2148 /* xgettext:c-format */
2149 as_bad (_("junk at end of line: `%s'"), str);
2150
2151 input_line_pointer = str;
2152
2153 /* Write out the instruction. */
2154
2155 if (relaxable && fc > 0)
2156 {
2157 insn_size = 2;
2158 fc = 0;
2159
2160 if (!strcmp (opcode->name, "br"))
2161 {
2162 f = frag_var (rs_machine_dependent, 4, 2, 2,
2163 fixups[0].exp.X_add_symbol,
2164 fixups[0].exp.X_add_number,
2165 (char *) fixups[0].opindex);
2166 md_number_to_chars (f, insn, insn_size);
2167 md_number_to_chars (f + 2, 0, 2);
2168 }
2169 else
2170 {
2171 f = frag_var (rs_machine_dependent, 6, 4, 0,
2172 fixups[0].exp.X_add_symbol,
2173 fixups[0].exp.X_add_number,
2174 (char *) fixups[0].opindex);
2175 md_number_to_chars (f, insn, insn_size);
2176 md_number_to_chars (f + 2, 0, 4);
2177 }
2178 total_insn_size = insn_size;
2179 }
2180 else
2181 {
2182 /* Four byte insns have an opcode with the two high bits on. */
2183 if ((insn & 0x0600) == 0x0600)
2184 insn_size = 4;
2185 else
2186 insn_size = 2;
2187
2188 /* Special case: 32 bit MOV. */
2189 if ((insn & 0xffe0) == 0x0620)
2190 insn_size = 2;
2191
2192 f = frag_more (insn_size);
2193 total_insn_size = insn_size;
2194
2195 md_number_to_chars (f, insn, insn_size);
2196
2197 if (extra_data_after_insn)
2198 {
2199 f = frag_more (extra_data_len);
2200 total_insn_size += extra_data_len;
2201
2202 md_number_to_chars (f, extra_data, extra_data_len);
2203
2204 extra_data_after_insn = false;
2205 }
2206 }
2207
2208 /* Create any fixups. At this point we do not use a
2209 bfd_reloc_code_real_type, but instead just use the
2210 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2211 handle fixups for any operand type, although that is admittedly
2212 not a very exciting feature. We pick a BFD reloc type in
2213 md_apply_fix. */
2214 for (i = 0; i < fc; i++)
2215 {
2216 const struct v850_operand *operand;
2217 bfd_reloc_code_real_type reloc;
2218
2219 operand = &v850_operands[fixups[i].opindex];
2220
2221 reloc = fixups[i].reloc;
2222
2223 if (reloc != BFD_RELOC_UNUSED)
2224 {
2225 reloc_howto_type *reloc_howto =
2226 bfd_reloc_type_lookup (stdoutput, reloc);
2227 int size;
2228 int address;
2229 fixS *fixP;
2230
2231 if (!reloc_howto)
2232 abort ();
2233
2234 size = bfd_get_reloc_size (reloc_howto);
2235
2236 /* XXX This will abort on an R_V850_8 reloc -
2237 is this reloc actually used? */
2238 if (size != 2 && size != 4)
2239 abort ();
2240
2241 address = (f - frag_now->fr_literal) + insn_size - size;
2242
2243 if (reloc == BFD_RELOC_32)
2244 address += 2;
2245
2246 fixP = fix_new_exp (frag_now, address, size,
2247 &fixups[i].exp,
2248 reloc_howto->pc_relative,
2249 reloc);
2250
2251 switch (reloc)
2252 {
2253 case BFD_RELOC_LO16:
2254 case BFD_RELOC_HI16:
2255 case BFD_RELOC_HI16_S:
2256 fixP->fx_no_overflow = 1;
2257 break;
2258 default:
2259 break;
2260 }
2261 }
2262 else
2263 {
2264 fix_new_exp (frag_now,
2265 f - frag_now->fr_literal, 4,
2266 & fixups[i].exp,
2267 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
2268 (bfd_reloc_code_real_type) (fixups[i].opindex
2269 + (int) BFD_RELOC_UNUSED));
2270 }
2271 }
2272
2273 input_line_pointer = saved_input_line_pointer;
2274
2275 dwarf2_emit_insn (total_insn_size);
2276 }
2277
2278 /* If while processing a fixup, a reloc really needs to be created
2279 then it is done here. */
2280
2281 arelent *
2282 tc_gen_reloc (seg, fixp)
2283 asection *seg ATTRIBUTE_UNUSED;
2284 fixS *fixp;
2285 {
2286 arelent *reloc;
2287
2288 reloc = (arelent *) xmalloc (sizeof (arelent));
2289 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2290 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2291 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2292 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2293
2294 if (reloc->howto == (reloc_howto_type *) NULL)
2295 {
2296 as_bad_where (fixp->fx_file, fixp->fx_line,
2297 /* xgettext:c-format */
2298 _("reloc %d not supported by object file format"),
2299 (int) fixp->fx_r_type);
2300
2301 xfree (reloc);
2302
2303 return NULL;
2304 }
2305
2306 if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2307 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
2308 reloc->addend = fixp->fx_offset;
2309 else
2310 reloc->addend = fixp->fx_addnumber;
2311
2312 return reloc;
2313 }
2314
2315 /* Return current size of variable part of frag. */
2316
2317 int
2318 md_estimate_size_before_relax (fragp, seg)
2319 fragS *fragp;
2320 asection *seg ATTRIBUTE_UNUSED;
2321 {
2322 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2323 abort ();
2324
2325 return md_relax_table[fragp->fr_subtype].rlx_length;
2326 }
2327
2328 long
2329 v850_pcrel_from_section (fixp, section)
2330 fixS *fixp;
2331 segT section;
2332 {
2333 /* If the symbol is undefined, or in a section other than our own,
2334 or it is weak (in which case it may well be in another section,
2335 then let the linker figure it out. */
2336 if (fixp->fx_addsy != (symbolS *) NULL
2337 && (! S_IS_DEFINED (fixp->fx_addsy)
2338 || S_IS_WEAK (fixp->fx_addsy)
2339 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
2340 return 0;
2341
2342 return fixp->fx_frag->fr_address + fixp->fx_where;
2343 }
2344
2345 int
2346 md_apply_fix3 (fixp, valuep, seg)
2347 fixS *fixp;
2348 valueT *valuep;
2349 segT seg ATTRIBUTE_UNUSED;
2350 {
2351 valueT value;
2352 char *where;
2353
2354 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2355 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2356 {
2357 fixp->fx_done = 0;
2358 return 1;
2359 }
2360
2361 if (fixp->fx_addsy == (symbolS *) NULL)
2362 {
2363 value = *valuep;
2364 fixp->fx_done = 1;
2365 }
2366 else if (fixp->fx_pcrel)
2367 value = *valuep;
2368 else
2369 {
2370 value = fixp->fx_offset;
2371 if (fixp->fx_subsy != (symbolS *) NULL)
2372 {
2373 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2374 value -= S_GET_VALUE (fixp->fx_subsy);
2375 else
2376 {
2377 /* We don't actually support subtracting a symbol. */
2378 as_bad_where (fixp->fx_file, fixp->fx_line,
2379 _("expression too complex"));
2380 }
2381 }
2382 }
2383
2384 if ((int) fixp->fx_r_type >= (int) BFD_RELOC_UNUSED)
2385 {
2386 int opindex;
2387 const struct v850_operand *operand;
2388 unsigned long insn;
2389
2390 opindex = (int) fixp->fx_r_type - (int) BFD_RELOC_UNUSED;
2391 operand = &v850_operands[opindex];
2392
2393 /* Fetch the instruction, insert the fully resolved operand
2394 value, and stuff the instruction back again.
2395
2396 Note the instruction has been stored in little endian
2397 format! */
2398 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2399
2400 insn = bfd_getl32 ((unsigned char *) where);
2401 insn = v850_insert_operand (insn, operand, (offsetT) value,
2402 fixp->fx_file, fixp->fx_line, NULL);
2403 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2404
2405 if (fixp->fx_done)
2406 {
2407 /* Nothing else to do here. */
2408 return 1;
2409 }
2410
2411 /* Determine a BFD reloc value based on the operand information.
2412 We are only prepared to turn a few of the operands into relocs. */
2413
2414 if (operand->bits == 22)
2415 fixp->fx_r_type = BFD_RELOC_V850_22_PCREL;
2416 else if (operand->bits == 9)
2417 fixp->fx_r_type = BFD_RELOC_V850_9_PCREL;
2418 else
2419 {
2420 #if 0
2421 fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
2422 #endif
2423
2424 as_bad_where (fixp->fx_file, fixp->fx_line,
2425 _("unresolved expression that must be resolved"));
2426 fixp->fx_done = 1;
2427 return 1;
2428 }
2429 }
2430 else if (fixp->fx_done)
2431 {
2432 /* We still have to insert the value into memory! */
2433 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2434
2435 if (fixp->fx_size == 1)
2436 *where = value & 0xff;
2437 else if (fixp->fx_size == 2)
2438 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2439 else if (fixp->fx_size == 4)
2440 bfd_putl32 (value, (unsigned char *) where);
2441 }
2442
2443 fixp->fx_addnumber = value;
2444 return 1;
2445 }
2446 \f
2447 /* Parse a cons expression. We have to handle hi(), lo(), etc
2448 on the v850. */
2449
2450 void
2451 parse_cons_expression_v850 (exp)
2452 expressionS *exp;
2453 {
2454 /* See if there's a reloc prefix like hi() we have to handle. */
2455 hold_cons_reloc = v850_reloc_prefix (NULL);
2456
2457 /* Do normal expression parsing. */
2458 expression (exp);
2459 }
2460
2461 /* Create a fixup for a cons expression. If parse_cons_expression_v850
2462 found a reloc prefix, then we use that reloc, else we choose an
2463 appropriate one based on the size of the expression. */
2464
2465 void
2466 cons_fix_new_v850 (frag, where, size, exp)
2467 fragS *frag;
2468 int where;
2469 int size;
2470 expressionS *exp;
2471 {
2472 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2473 {
2474 if (size == 4)
2475 hold_cons_reloc = BFD_RELOC_32;
2476 if (size == 2)
2477 hold_cons_reloc = BFD_RELOC_16;
2478 if (size == 1)
2479 hold_cons_reloc = BFD_RELOC_8;
2480 }
2481
2482 if (exp != NULL)
2483 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2484 else
2485 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2486
2487 hold_cons_reloc = BFD_RELOC_UNUSED;
2488 }
2489
2490 boolean
2491 v850_fix_adjustable (fixP)
2492 fixS *fixP;
2493 {
2494 if (fixP->fx_addsy == NULL)
2495 return 1;
2496
2497 /* Prevent all adjustments to global symbols. */
2498 if (S_IS_EXTERN (fixP->fx_addsy))
2499 return 0;
2500
2501 /* Similarly for weak symbols. */
2502 if (S_IS_WEAK (fixP->fx_addsy))
2503 return 0;
2504
2505 /* Don't adjust function names. */
2506 if (S_IS_FUNCTION (fixP->fx_addsy))
2507 return 0;
2508
2509 /* We need the symbol name for the VTABLE entries. */
2510 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2511 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2512 return 0;
2513
2514 return 1;
2515 }
2516
2517 int
2518 v850_force_relocation (fixP)
2519 struct fix *fixP;
2520 {
2521 if (fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy))
2522 return 1;
2523
2524 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2525 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2526 return 1;
2527
2528 return 0;
2529 }