gas/doc/c-avr.texi

   1 @c Copyright 2006
   2 @c Free Software Foundation, Inc.
   3 @c This is part of the GAS manual.
   4 @c For copying conditions, see the file as.texinfo.
   5
   6 @ifset GENERIC
   7 @page
   8 @node AVR-Dependent
   9 @chapter AVR Dependent Features
  10 @end ifset
  11
  12 @ifclear GENERIC
  13 @node Machine Dependencies
  14 @chapter AVR Dependent Features
  15 @end ifclear
  16
  17 @cindex AVR support
  18 @menu
  19 * AVR Options::              Options
  20 * AVR Syntax::               Syntax
  21 * AVR Opcodes::              Opcodes
  22 @end menu
  23
  24 @node AVR Options
  25 @section Options
  26 @cindex AVR options (none)
  27 @cindex options for AVR (none)
  28
  29 @table @code
  30
  31 @cindex @code{-mmcu=} command line option, AVR
  32 @item -mmcu=@var{mcu}
  33 Specify ATMEL AVR instruction set or MCU type.
  34
  35 Instruction set avr1 is for the minimal AVR core, not supported by the C
  36 compiler, only for assembler programs (MCU types: at90s1200,
  37 attiny11, attiny12, attiny15, attiny28).
  38
  39 Instruction set avr2 (default) is for the classic AVR core with up to
  40 8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
  41 attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
  42 at90s8535).
  43
  44 Instruction set avr25 is for the classic AVR core with up to 8K program memory
  45 space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
  46 attiny24, attiny44, attiny84, attiny25, attiny45, attiny85, attiny261,
  47 attiny461, attiny861, attiny87, attiny43u, attiny48, attiny88, at86rf401,
  48 ata6289).
  49
  50 Instruction set avr3 is for the classic AVR core with up to 128K program
  51 memory space (MCU types: at43usb355, at76c711).
  52
  53 Instruction set avr31 is for the classic AVR core with exactly 128K program
  54 memory space (MCU types: atmega103, at43usb320).
  55
  56 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
  57 instructions (MCU types: attiny167, attiny327, at90usb82, at90usb162).
  58
  59 Instruction set avr4 is for the enhanced AVR core with up to 8K program
  60 memory space (MCU types: atmega48, atmega48p,atmega8, atmega88, atmega88p,
  61 atmega8515, atmega8535, atmega8hva, atmega4hvd, atmega8hvd, at90pwm1,
  62 at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81).
  63
  64 Instruction set avr5 is for the enhanced AVR core with up to 128K program
  65 memory space (MCU types: atmega16, atmega161, atmega162, atmega163, atmega164p,
  66 atmega165, atmega165p, atmega168, atmega168p, atmega169, atmega169p, atmega32,
  67 atmega323, atmega324p, atmega325, atmega325p, atmega3250, atmega3250p,
  68 atmega328p, atmega329, atmega329p, atmega3290, atmega3290p, atmega406, atmega64,
  69 atmega640, atmega644, atmega644p, atmega645, atmega6450, atmega649, atmega6490,
  70 atmega16hva, atmega16hvb, atmega32hvb, at90can32, at90can64, at90pwm216,
  71 at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1, atmega64m1,
  72 atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at94k, at90scr100).
  73
  74 Instruction set avr51 is for the enhanced AVR core with exactly 128K program
  75 memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
  76 atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000f, m3000s, m3001b).
  77
  78 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
  79 atmega2560, atmega2561).
  80
  81 @cindex @code{-mall-opcodes} command line option, AVR
  82 @item -mall-opcodes
  83 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
  84
  85 @cindex @code{-mno-skip-bug} command line option, AVR
  86 @item -mno-skip-bug
  87 This option disable warnings for skipping two-word instructions.
  88
  89 @cindex @code{-mno-wrap} command line option, AVR
  90 @item -mno-wrap
  91 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
  92
  93 @end table
  94
  95
  96 @node AVR Syntax
  97 @section Syntax
  98 @menu
  99 * AVR-Chars::                Special Characters
 100 * AVR-Regs::                 Register Names
 101 * AVR-Modifiers::            Relocatable Expression Modifiers
 102 @end menu
 103
 104 @node AVR-Chars
 105 @subsection Special Characters
 106
 107 @cindex line comment character, AVR
 108 @cindex AVR line comment character
 109
 110 The presence of a @samp{;} on a line indicates the start of a comment
 111 that extends to the end of the current line.  If a @samp{#} appears as
 112 the first character of a line, the whole line is treated as a comment.
 113
 114 @cindex line separator, AVR
 115 @cindex statement separator, AVR
 116 @cindex AVR line separator
 117
 118 The @samp{$} character can be used instead of a newline to separate
 119 statements.
 120
 121 @node AVR-Regs
 122 @subsection Register Names
 123
 124 @cindex AVR register names
 125 @cindex register names, AVR
 126
 127 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
 128 @samp{r1}, ... @samp{r31}.
 129 Six of the 32 registers can be used as three 16-bit indirect address
 130 register pointers for Data Space addressing. One of the these address
 131 pointers can also be used as an address pointer for look up tables in
 132 Flash program memory. These added function registers are the 16-bit
 133 @samp{X}, @samp{Y} and @samp{Z} - registers.
 134
 135 @smallexample
 136 X = @r{r26:r27}
 137 Y = @r{r28:r29}
 138 Z = @r{r30:r31}
 139 @end smallexample
 140
 141 @node AVR-Modifiers
 142 @subsection Relocatable Expression Modifiers
 143
 144 @cindex AVR modifiers
 145 @cindex syntax, AVR
 146
 147 The assembler supports several modifiers when using relocatable addresses
 148 in AVR instruction operands.  The general syntax is the following:
 149
 150 @smallexample
 151 modifier(relocatable-expression)
 152 @end smallexample
 153
 154 @table @code
 155 @cindex symbol modifiers
 156
 157 @item lo8
 158
 159 This modifier allows you to use bits 0 through 7 of
 160 an address expression as 8 bit relocatable expression.
 161
 162 @item hi8
 163
 164 This modifier allows you to use bits 7 through 15 of an address expression
 165 as 8 bit relocatable expression.  This is useful with, for example, the
 166 AVR @samp{ldi} instruction and @samp{lo8} modifier.
 167
 168 For example
 169
 170 @smallexample
 171 ldi r26, lo8(sym+10)
 172 ldi r27, hi8(sym+10)
 173 @end smallexample
 174
 175 @item hh8
 176
 177 This modifier allows you to use bits 16 through 23 of
 178 an address expression as 8 bit relocatable expression.
 179 Also, can be useful for loading 32 bit constants.
 180
 181 @item hlo8
 182
 183 Synonym of @samp{hh8}.
 184
 185 @item hhi8
 186
 187 This modifier allows you to use bits 24 through 31 of
 188 an expression as 8 bit expression. This is useful with, for example, the
 189 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
 190 @samp{hhi8}, modifier.
 191
 192 For example
 193
 194 @smallexample
 195 ldi r26, lo8(285774925)
 196 ldi r27, hi8(285774925)
 197 ldi r28, hlo8(285774925)
 198 ldi r29, hhi8(285774925)
 199 ; r29,r28,r27,r26 = 285774925
 200 @end smallexample
 201
 202 @item pm_lo8
 203
 204 This modifier allows you to use bits 0 through 7 of
 205 an address expression as 8 bit relocatable expression.
 206 This modifier useful for addressing data or code from
 207 Flash/Program memory. The using of @samp{pm_lo8} similar
 208 to @samp{lo8}.
 209
 210 @item pm_hi8
 211
 212 This modifier allows you to use bits 8 through 15 of
 213 an address expression as 8 bit relocatable expression.
 214 This modifier useful for addressing data or code from
 215 Flash/Program memory.
 216
 217 @item pm_hh8
 218
 219 This modifier allows you to use bits 15 through 23 of
 220 an address expression as 8 bit relocatable expression.
 221 This modifier useful for addressing data or code from
 222 Flash/Program memory.
 223
 224 @end table
 225
 226 @node AVR Opcodes
 227 @section Opcodes
 228
 229 @cindex AVR opcode summary
 230 @cindex opcode summary, AVR
 231 @cindex mnemonics, AVR
 232 @cindex instruction summary, AVR
 233 For detailed information on the AVR machine instruction set, see
 234 @url{www.atmel.com/products/AVR}.
 235
 236 @code{@value{AS}} implements all the standard AVR opcodes.
 237 The following table summarizes the AVR opcodes, and their arguments.
 238
 239 @smallexample
 240 @i{Legend:}
 241    r   @r{any register}
 242    d   @r{`ldi' register (r16-r31)}
 243    v   @r{`movw' even register (r0, r2, ..., r28, r30)}
 244    a   @r{`fmul' register (r16-r23)}
 245    w   @r{`adiw' register (r24,r26,r28,r30)}
 246    e   @r{pointer registers (X,Y,Z)}
 247    b   @r{base pointer register and displacement ([YZ]+disp)}
 248    z   @r{Z pointer register (for [e]lpm Rd,Z[+])}
 249    M   @r{immediate value from 0 to 255}
 250    n   @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
 251    s   @r{immediate value from 0 to 7}
 252    P   @r{Port address value from 0 to 63. (in, out)}
 253    p   @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
 254    K   @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
 255    i   @r{immediate value}
 256    l   @r{signed pc relative offset from -64 to 63}
 257    L   @r{signed pc relative offset from -2048 to 2047}
 258    h   @r{absolute code address (call, jmp)}
 259    S   @r{immediate value from 0 to 7 (S = s << 4)}
 260    ?   @r{use this opcode entry if no parameters, else use next opcode entry}
 261
 262 1001010010001000   clc
 263 1001010011011000   clh
 264 1001010011111000   cli
 265 1001010010101000   cln
 266 1001010011001000   cls
 267 1001010011101000   clt
 268 1001010010111000   clv
 269 1001010010011000   clz
 270 1001010000001000   sec
 271 1001010001011000   seh
 272 1001010001111000   sei
 273 1001010000101000   sen
 274 1001010001001000   ses
 275 1001010001101000   set
 276 1001010000111000   sev
 277 1001010000011000   sez
 278 100101001SSS1000   bclr    S
 279 100101000SSS1000   bset    S
 280 1001010100001001   icall
 281 1001010000001001   ijmp
 282 1001010111001000   lpm     ?
 283 1001000ddddd010+   lpm     r,z
 284 1001010111011000   elpm    ?
 285 1001000ddddd011+   elpm    r,z
 286 0000000000000000   nop
 287 1001010100001000   ret
 288 1001010100011000   reti
 289 1001010110001000   sleep
 290 1001010110011000   break
 291 1001010110101000   wdr
 292 1001010111101000   spm
 293 000111rdddddrrrr   adc     r,r
 294 000011rdddddrrrr   add     r,r
 295 001000rdddddrrrr   and     r,r
 296 000101rdddddrrrr   cp      r,r
 297 000001rdddddrrrr   cpc     r,r
 298 000100rdddddrrrr   cpse    r,r
 299 001001rdddddrrrr   eor     r,r
 300 001011rdddddrrrr   mov     r,r
 301 100111rdddddrrrr   mul     r,r
 302 001010rdddddrrrr   or      r,r
 303 000010rdddddrrrr   sbc     r,r
 304 000110rdddddrrrr   sub     r,r
 305 001001rdddddrrrr   clr     r
 306 000011rdddddrrrr   lsl     r
 307 000111rdddddrrrr   rol     r
 308 001000rdddddrrrr   tst     r
 309 0111KKKKddddKKKK   andi    d,M
 310 0111KKKKddddKKKK   cbr     d,n
 311 1110KKKKddddKKKK   ldi     d,M
 312 11101111dddd1111   ser     d
 313 0110KKKKddddKKKK   ori     d,M
 314 0110KKKKddddKKKK   sbr     d,M
 315 0011KKKKddddKKKK   cpi     d,M
 316 0100KKKKddddKKKK   sbci    d,M
 317 0101KKKKddddKKKK   subi    d,M
 318 1111110rrrrr0sss   sbrc    r,s
 319 1111111rrrrr0sss   sbrs    r,s
 320 1111100ddddd0sss   bld     r,s
 321 1111101ddddd0sss   bst     r,s
 322 10110PPdddddPPPP   in      r,P
 323 10111PPrrrrrPPPP   out     P,r
 324 10010110KKddKKKK   adiw    w,K
 325 10010111KKddKKKK   sbiw    w,K
 326 10011000pppppsss   cbi     p,s
 327 10011010pppppsss   sbi     p,s
 328 10011001pppppsss   sbic    p,s
 329 10011011pppppsss   sbis    p,s
 330 111101lllllll000   brcc    l
 331 111100lllllll000   brcs    l
 332 111100lllllll001   breq    l
 333 111101lllllll100   brge    l
 334 111101lllllll101   brhc    l
 335 111100lllllll101   brhs    l
 336 111101lllllll111   brid    l
 337 111100lllllll111   brie    l
 338 111100lllllll000   brlo    l
 339 111100lllllll100   brlt    l
 340 111100lllllll010   brmi    l
 341 111101lllllll001   brne    l
 342 111101lllllll010   brpl    l
 343 111101lllllll000   brsh    l
 344 111101lllllll110   brtc    l
 345 111100lllllll110   brts    l
 346 111101lllllll011   brvc    l
 347 111100lllllll011   brvs    l
 348 111101lllllllsss   brbc    s,l
 349 111100lllllllsss   brbs    s,l
 350 1101LLLLLLLLLLLL   rcall   L
 351 1100LLLLLLLLLLLL   rjmp    L
 352 1001010hhhhh111h   call    h
 353 1001010hhhhh110h   jmp     h
 354 1001010rrrrr0101   asr     r
 355 1001010rrrrr0000   com     r
 356 1001010rrrrr1010   dec     r
 357 1001010rrrrr0011   inc     r
 358 1001010rrrrr0110   lsr     r
 359 1001010rrrrr0001   neg     r
 360 1001000rrrrr1111   pop     r
 361 1001001rrrrr1111   push    r
 362 1001010rrrrr0111   ror     r
 363 1001010rrrrr0010   swap    r
 364 00000001ddddrrrr   movw    v,v
 365 00000010ddddrrrr   muls    d,d
 366 000000110ddd0rrr   mulsu   a,a
 367 000000110ddd1rrr   fmul    a,a
 368 000000111ddd0rrr   fmuls   a,a
 369 000000111ddd1rrr   fmulsu  a,a
 370 1001001ddddd0000   sts     i,r
 371 1001000ddddd0000   lds     r,i
 372 10o0oo0dddddbooo   ldd     r,b
 373 100!000dddddee-+   ld      r,e
 374 10o0oo1rrrrrbooo   std     b,r
 375 100!001rrrrree-+   st      e,r
 376 1001010100011001   eicall
 377 1001010000011001   eijmp
 378 @end smallexample