gas/doc/c-avr.texi

   1 @c Copyright 2006, 2007, 2008, 2009, 2011
   2 @c Free Software Foundation, Inc.
   3 @c This is part of the GAS manual.
   4 @c For copying conditions, see the file as.texinfo.
   5
   6 @ifset GENERIC
   7 @page
   8 @node AVR-Dependent
   9 @chapter AVR Dependent Features
  10 @end ifset
  11
  12 @ifclear GENERIC
  13 @node Machine Dependencies
  14 @chapter AVR Dependent Features
  15 @end ifclear
  16
  17 @cindex AVR support
  18 @menu
  19 * AVR Options::              Options
  20 * AVR Syntax::               Syntax
  21 * AVR Opcodes::              Opcodes
  22 @end menu
  23
  24 @node AVR Options
  25 @section Options
  26 @cindex AVR options (none)
  27 @cindex options for AVR (none)
  28
  29 @table @code
  30
  31 @cindex @code{-mmcu=} command line option, AVR
  32 @item -mmcu=@var{mcu}
  33 Specify ATMEL AVR instruction set or MCU type.
  34
  35 Instruction set avr1 is for the minimal AVR core, not supported by the C
  36 compiler, only for assembler programs (MCU types: at90s1200,
  37 attiny11, attiny12, attiny15, attiny28).
  38
  39 Instruction set avr2 (default) is for the classic AVR core with up to
  40 8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
  41 attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
  42 at90s8535).
  43
  44 Instruction set avr25 is for the classic AVR core with up to 8K program memory
  45 space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
  46 attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84,
  47 attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461,
  48 attiny461a, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
  49 at86rf401, ata6289).
  50
  51 Instruction set avr3 is for the classic AVR core with up to 128K program
  52 memory space (MCU types: at43usb355, at76c711).
  53
  54 Instruction set avr31 is for the classic AVR core with exactly 128K program
  55 memory space (MCU types: atmega103, at43usb320).
  56
  57 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
  58 instructions (MCU types: attiny167, at90usb82, at90usb162, atmega8u2,
  59 atmega16u2, atmega32u2).
  60
  61 Instruction set avr4 is for the enhanced AVR core with up to 8K program
  62 memory space (MCU types: atmega48, atmega48a, atmega48p, atmega8, atmega88,
  63 atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535, atmega8hva, at90pwm1,
  64 at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81).
  65
  66 Instruction set avr5 is for the enhanced AVR core with up to 128K program
  67 memory space (MCU types: atmega16, atmega16a, atmega161, atmega162, atmega163,
  68 atmega164a, atmega164p, atmega165, atmega165a, atmega165p, atmega168,
  69 atmega168a, atmega168p, atmega169, atmega169a, atmega169p, atmega169pa,
  70 atmega32, atmega323, atmega324a, atmega324p, atmega325, atmega325a, atmega325p,
  71 atmega3250, atmega3250a, atmega3250p, atmega328, atmega328p, atmega329,
  72 atmega329a, atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p,
  73 atmega406, atmega64, atmega640, atmega644, atmega644a, atmega644p, atmega644pa,
  74 atmega645, atmega645a, atmega645p, atmega6450, atmega6450a, atmega6450p,
  75 atmega649, atmega649a, atmega649p, atmega6490, atmega6490a, atmega6490p,
  76 atmega16hva, atmega16hva2, atmega16hvb, atmega32hvb, atmega64hve, at90can32,
  77 at90can64, at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1,
  78 atmega32m1, atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646,
  79 at90usb647, at94k, at90scr100).
  80
  81 Instruction set avr51 is for the enhanced AVR core with exactly 128K program
  82 memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
  83 atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000).
  84
  85 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
  86 atmega2560, atmega2561).
  87
  88 Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K program
  89 memory space and less than 64K data space (MCU types: atxmega16a4, atxmega16d4,
  90 atxmega16x1, atxmega32a4, atxmega32d4, atxmega32x1).
  91
  92 Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K program
  93 memory space and greater than 64K data space (MCU types: none).
  94
  95 Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K program
  96 memory space and less than 64K data space (MCU types: atxmega64a3, atxmega64d3).
  97
  98 Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K program
  99 memory space and greater than 64K data space (MCU types: atxmega64a1,
 100 atxmega64a1u).
 101
 102 Instruction set avrxmega6 is for the XMEGA AVR core with up to 256K program
 103 memory space and less than 64K data space (MCU types: atxmega128a3,
 104 atxmega128d3, atxmega192a3, atxmega128b1, atxmega192d3, atxmega256a3,
 105 atxmega256a3b, atxmega256a3bu, atxmega192d3).
 106
 107 Instruction set avrxmega7 is for the XMEGA AVR core with up to 256K program
 108 memory space and greater than 64K data space (MCU types: atxmega128a1,
 109 atxmega128a1u).
 110
 111 @cindex @code{-mall-opcodes} command line option, AVR
 112 @item -mall-opcodes
 113 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
 114
 115 @cindex @code{-mno-skip-bug} command line option, AVR
 116 @item -mno-skip-bug
 117 This option disable warnings for skipping two-word instructions.
 118
 119 @cindex @code{-mno-wrap} command line option, AVR
 120 @item -mno-wrap
 121 This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
 122
 123 @end table
 124
 125
 126 @node AVR Syntax
 127 @section Syntax
 128 @menu
 129 * AVR-Chars::                Special Characters
 130 * AVR-Regs::                 Register Names
 131 * AVR-Modifiers::            Relocatable Expression Modifiers
 132 @end menu
 133
 134 @node AVR-Chars
 135 @subsection Special Characters
 136
 137 @cindex line comment character, AVR
 138 @cindex AVR line comment character
 139
 140 The presence of a @samp{;} anywhere on a line indicates the start of a
 141 comment that extends to the end of that line.
 142
 143 If a @samp{#} appears as the first character of a line, the whole line
 144 is treated as a comment, but in this case the line can also be a
 145 logical line number directive (@pxref{Comments}) or a preprocessor
 146 control command (@pxref{Preprocessing}).
 147
 148 @cindex line separator, AVR
 149 @cindex statement separator, AVR
 150 @cindex AVR line separator
 151
 152 The @samp{$} character can be used instead of a newline to separate
 153 statements.
 154
 155 @node AVR-Regs
 156 @subsection Register Names
 157
 158 @cindex AVR register names
 159 @cindex register names, AVR
 160
 161 The AVR has 32 x 8-bit general purpose working registers @samp{r0},
 162 @samp{r1}, ... @samp{r31}.
 163 Six of the 32 registers can be used as three 16-bit indirect address
 164 register pointers for Data Space addressing. One of the these address
 165 pointers can also be used as an address pointer for look up tables in
 166 Flash program memory. These added function registers are the 16-bit
 167 @samp{X}, @samp{Y} and @samp{Z} - registers.
 168
 169 @smallexample
 170 X = @r{r26:r27}
 171 Y = @r{r28:r29}
 172 Z = @r{r30:r31}
 173 @end smallexample
 174
 175 @node AVR-Modifiers
 176 @subsection Relocatable Expression Modifiers
 177
 178 @cindex AVR modifiers
 179 @cindex syntax, AVR
 180
 181 The assembler supports several modifiers when using relocatable addresses
 182 in AVR instruction operands.  The general syntax is the following:
 183
 184 @smallexample
 185 modifier(relocatable-expression)
 186 @end smallexample
 187
 188 @table @code
 189 @cindex symbol modifiers
 190
 191 @item lo8
 192
 193 This modifier allows you to use bits 0 through 7 of
 194 an address expression as 8 bit relocatable expression.
 195
 196 @item hi8
 197
 198 This modifier allows you to use bits 7 through 15 of an address expression
 199 as 8 bit relocatable expression.  This is useful with, for example, the
 200 AVR @samp{ldi} instruction and @samp{lo8} modifier.
 201
 202 For example
 203
 204 @smallexample
 205 ldi r26, lo8(sym+10)
 206 ldi r27, hi8(sym+10)
 207 @end smallexample
 208
 209 @item hh8
 210
 211 This modifier allows you to use bits 16 through 23 of
 212 an address expression as 8 bit relocatable expression.
 213 Also, can be useful for loading 32 bit constants.
 214
 215 @item hlo8
 216
 217 Synonym of @samp{hh8}.
 218
 219 @item hhi8
 220
 221 This modifier allows you to use bits 24 through 31 of
 222 an expression as 8 bit expression. This is useful with, for example, the
 223 AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
 224 @samp{hhi8}, modifier.
 225
 226 For example
 227
 228 @smallexample
 229 ldi r26, lo8(285774925)
 230 ldi r27, hi8(285774925)
 231 ldi r28, hlo8(285774925)
 232 ldi r29, hhi8(285774925)
 233 ; r29,r28,r27,r26 = 285774925
 234 @end smallexample
 235
 236 @item pm_lo8
 237
 238 This modifier allows you to use bits 0 through 7 of
 239 an address expression as 8 bit relocatable expression.
 240 This modifier useful for addressing data or code from
 241 Flash/Program memory. The using of @samp{pm_lo8} similar
 242 to @samp{lo8}.
 243
 244 @item pm_hi8
 245
 246 This modifier allows you to use bits 8 through 15 of
 247 an address expression as 8 bit relocatable expression.
 248 This modifier useful for addressing data or code from
 249 Flash/Program memory.
 250
 251 @item pm_hh8
 252
 253 This modifier allows you to use bits 15 through 23 of
 254 an address expression as 8 bit relocatable expression.
 255 This modifier useful for addressing data or code from
 256 Flash/Program memory.
 257
 258 @end table
 259
 260 @node AVR Opcodes
 261 @section Opcodes
 262
 263 @cindex AVR opcode summary
 264 @cindex opcode summary, AVR
 265 @cindex mnemonics, AVR
 266 @cindex instruction summary, AVR
 267 For detailed information on the AVR machine instruction set, see
 268 @url{www.atmel.com/products/AVR}.
 269
 270 @code{@value{AS}} implements all the standard AVR opcodes.
 271 The following table summarizes the AVR opcodes, and their arguments.
 272
 273 @smallexample
 274 @i{Legend:}
 275    r   @r{any register}
 276    d   @r{`ldi' register (r16-r31)}
 277    v   @r{`movw' even register (r0, r2, ..., r28, r30)}
 278    a   @r{`fmul' register (r16-r23)}
 279    w   @r{`adiw' register (r24,r26,r28,r30)}
 280    e   @r{pointer registers (X,Y,Z)}
 281    b   @r{base pointer register and displacement ([YZ]+disp)}
 282    z   @r{Z pointer register (for [e]lpm Rd,Z[+])}
 283    M   @r{immediate value from 0 to 255}
 284    n   @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
 285    s   @r{immediate value from 0 to 7}
 286    P   @r{Port address value from 0 to 63. (in, out)}
 287    p   @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
 288    K   @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
 289    i   @r{immediate value}
 290    l   @r{signed pc relative offset from -64 to 63}
 291    L   @r{signed pc relative offset from -2048 to 2047}
 292    h   @r{absolute code address (call, jmp)}
 293    S   @r{immediate value from 0 to 7 (S = s << 4)}
 294    ?   @r{use this opcode entry if no parameters, else use next opcode entry}
 295
 296 1001010010001000   clc
 297 1001010011011000   clh
 298 1001010011111000   cli
 299 1001010010101000   cln
 300 1001010011001000   cls
 301 1001010011101000   clt
 302 1001010010111000   clv
 303 1001010010011000   clz
 304 1001010000001000   sec
 305 1001010001011000   seh
 306 1001010001111000   sei
 307 1001010000101000   sen
 308 1001010001001000   ses
 309 1001010001101000   set
 310 1001010000111000   sev
 311 1001010000011000   sez
 312 100101001SSS1000   bclr    S
 313 100101000SSS1000   bset    S
 314 1001010100001001   icall
 315 1001010000001001   ijmp
 316 1001010111001000   lpm     ?
 317 1001000ddddd010+   lpm     r,z
 318 1001010111011000   elpm    ?
 319 1001000ddddd011+   elpm    r,z
 320 0000000000000000   nop
 321 1001010100001000   ret
 322 1001010100011000   reti
 323 1001010110001000   sleep
 324 1001010110011000   break
 325 1001010110101000   wdr
 326 1001010111101000   spm
 327 000111rdddddrrrr   adc     r,r
 328 000011rdddddrrrr   add     r,r
 329 001000rdddddrrrr   and     r,r
 330 000101rdddddrrrr   cp      r,r
 331 000001rdddddrrrr   cpc     r,r
 332 000100rdddddrrrr   cpse    r,r
 333 001001rdddddrrrr   eor     r,r
 334 001011rdddddrrrr   mov     r,r
 335 100111rdddddrrrr   mul     r,r
 336 001010rdddddrrrr   or      r,r
 337 000010rdddddrrrr   sbc     r,r
 338 000110rdddddrrrr   sub     r,r
 339 001001rdddddrrrr   clr     r
 340 000011rdddddrrrr   lsl     r
 341 000111rdddddrrrr   rol     r
 342 001000rdddddrrrr   tst     r
 343 0111KKKKddddKKKK   andi    d,M
 344 0111KKKKddddKKKK   cbr     d,n
 345 1110KKKKddddKKKK   ldi     d,M
 346 11101111dddd1111   ser     d
 347 0110KKKKddddKKKK   ori     d,M
 348 0110KKKKddddKKKK   sbr     d,M
 349 0011KKKKddddKKKK   cpi     d,M
 350 0100KKKKddddKKKK   sbci    d,M
 351 0101KKKKddddKKKK   subi    d,M
 352 1111110rrrrr0sss   sbrc    r,s
 353 1111111rrrrr0sss   sbrs    r,s
 354 1111100ddddd0sss   bld     r,s
 355 1111101ddddd0sss   bst     r,s
 356 10110PPdddddPPPP   in      r,P
 357 10111PPrrrrrPPPP   out     P,r
 358 10010110KKddKKKK   adiw    w,K
 359 10010111KKddKKKK   sbiw    w,K
 360 10011000pppppsss   cbi     p,s
 361 10011010pppppsss   sbi     p,s
 362 10011001pppppsss   sbic    p,s
 363 10011011pppppsss   sbis    p,s
 364 111101lllllll000   brcc    l
 365 111100lllllll000   brcs    l
 366 111100lllllll001   breq    l
 367 111101lllllll100   brge    l
 368 111101lllllll101   brhc    l
 369 111100lllllll101   brhs    l
 370 111101lllllll111   brid    l
 371 111100lllllll111   brie    l
 372 111100lllllll000   brlo    l
 373 111100lllllll100   brlt    l
 374 111100lllllll010   brmi    l
 375 111101lllllll001   brne    l
 376 111101lllllll010   brpl    l
 377 111101lllllll000   brsh    l
 378 111101lllllll110   brtc    l
 379 111100lllllll110   brts    l
 380 111101lllllll011   brvc    l
 381 111100lllllll011   brvs    l
 382 111101lllllllsss   brbc    s,l
 383 111100lllllllsss   brbs    s,l
 384 1101LLLLLLLLLLLL   rcall   L
 385 1100LLLLLLLLLLLL   rjmp    L
 386 1001010hhhhh111h   call    h
 387 1001010hhhhh110h   jmp     h
 388 1001010rrrrr0101   asr     r
 389 1001010rrrrr0000   com     r
 390 1001010rrrrr1010   dec     r
 391 1001010rrrrr0011   inc     r
 392 1001010rrrrr0110   lsr     r
 393 1001010rrrrr0001   neg     r
 394 1001000rrrrr1111   pop     r
 395 1001001rrrrr1111   push    r
 396 1001010rrrrr0111   ror     r
 397 1001010rrrrr0010   swap    r
 398 00000001ddddrrrr   movw    v,v
 399 00000010ddddrrrr   muls    d,d
 400 000000110ddd0rrr   mulsu   a,a
 401 000000110ddd1rrr   fmul    a,a
 402 000000111ddd0rrr   fmuls   a,a
 403 000000111ddd1rrr   fmulsu  a,a
 404 1001001ddddd0000   sts     i,r
 405 1001000ddddd0000   lds     r,i
 406 10o0oo0dddddbooo   ldd     r,b
 407 100!000dddddee-+   ld      r,e
 408 10o0oo1rrrrrbooo   std     b,r
 409 100!001rrrrree-+   st      e,r
 410 1001010100011001   eicall
 411 1001010000011001   eijmp
 412 @end smallexample