* doc/as.texinfo: Document .cfi_rel_offset.
[binutils-gdb.git] / gas / doc / c-h8300.texi
1 @c Copyright (C) 1991, 1992, 1993, 1994, 1995, 2003 Free Software Foundation, Inc.
2 @c This is part of the GAS manual.
3 @c For copying conditions, see the file as.texinfo.
4 @ifset GENERIC
5 @page
6 @end ifset
7 @node H8/300-Dependent
8 @chapter H8/300 Dependent Features
9
10 @cindex H8/300 support
11 @menu
12 * H8/300 Options:: Options
13 * H8/300 Syntax:: Syntax
14 * H8/300 Floating Point:: Floating Point
15 * H8/300 Directives:: H8/300 Machine Directives
16 * H8/300 Opcodes:: Opcodes
17 @end menu
18
19 @node H8/300 Options
20 @section Options
21
22 @cindex H8/300 options (none)
23 @cindex options, H8/300 (none)
24 @code{@value{AS}} has no additional command-line options for the
25 Renesas (formerly Hitachi) H8/300 family.
26
27 @node H8/300 Syntax
28 @section Syntax
29 @menu
30 * H8/300-Chars:: Special Characters
31 * H8/300-Regs:: Register Names
32 * H8/300-Addressing:: Addressing Modes
33 @end menu
34
35 @node H8/300-Chars
36 @subsection Special Characters
37
38 @cindex line comment character, H8/300
39 @cindex H8/300 line comment character
40 @samp{;} is the line comment character.
41
42 @cindex line separator, H8/300
43 @cindex statement separator, H8/300
44 @cindex H8/300 line separator
45 @samp{$} can be used instead of a newline to separate statements.
46 Therefore @emph{you may not use @samp{$} in symbol names} on the H8/300.
47
48 @node H8/300-Regs
49 @subsection Register Names
50
51 @cindex H8/300 registers
52 @cindex register names, H8/300
53 You can use predefined symbols of the form @samp{r@var{n}h} and
54 @samp{r@var{n}l} to refer to the H8/300 registers as sixteen 8-bit
55 general-purpose registers. @var{n} is a digit from @samp{0} to
56 @samp{7}); for instance, both @samp{r0h} and @samp{r7l} are valid
57 register names.
58
59 You can also use the eight predefined symbols @samp{r@var{n}} to refer
60 to the H8/300 registers as 16-bit registers (you must use this form for
61 addressing).
62
63 On the H8/300H, you can also use the eight predefined symbols
64 @samp{er@var{n}} (@samp{er0} @dots{} @samp{er7}) to refer to the 32-bit
65 general purpose registers.
66
67 The two control registers are called @code{pc} (program counter; a
68 16-bit register, except on the H8/300H where it is 24 bits) and
69 @code{ccr} (condition code register; an 8-bit register). @code{r7} is
70 used as the stack pointer, and can also be called @code{sp}.
71
72 @node H8/300-Addressing
73 @subsection Addressing Modes
74
75 @cindex addressing modes, H8/300
76 @cindex H8/300 addressing modes
77 @value{AS} understands the following addressing modes for the H8/300:
78 @table @code
79 @item r@var{n}
80 Register direct
81
82 @item @@r@var{n}
83 Register indirect
84
85 @need 1200
86 @item @@(@var{d}, r@var{n})
87 @itemx @@(@var{d}:16, r@var{n})
88 @itemx @@(@var{d}:24, r@var{n})
89 Register indirect: 16-bit or 24-bit displacement @var{d} from register
90 @var{n}. (24-bit displacements are only meaningful on the H8/300H.)
91
92 @item @@r@var{n}+
93 Register indirect with post-increment
94
95 @item @@-r@var{n}
96 Register indirect with pre-decrement
97
98 @item @code{@@}@var{aa}
99 @itemx @code{@@}@var{aa}:8
100 @itemx @code{@@}@var{aa}:16
101 @itemx @code{@@}@var{aa}:24
102 Absolute address @code{aa}. (The address size @samp{:24} only makes
103 sense on the H8/300H.)
104
105 @item #@var{xx}
106 @itemx #@var{xx}:8
107 @itemx #@var{xx}:16
108 @itemx #@var{xx}:32
109 Immediate data @var{xx}. You may specify the @samp{:8}, @samp{:16}, or
110 @samp{:32} for clarity, if you wish; but @code{@value{AS}} neither
111 requires this nor uses it---the data size required is taken from
112 context.
113
114 @item @code{@@}@code{@@}@var{aa}
115 @itemx @code{@@}@code{@@}@var{aa}:8
116 Memory indirect. You may specify the @samp{:8} for clarity, if you
117 wish; but @code{@value{AS}} neither requires this nor uses it.
118 @end table
119
120 @node H8/300 Floating Point
121 @section Floating Point
122
123 @cindex floating point, H8/300 (@sc{ieee})
124 @cindex H8/300 floating point (@sc{ieee})
125 The H8/300 family has no hardware floating point, but the @code{.float}
126 directive generates @sc{ieee} floating-point numbers for compatibility
127 with other development tools.
128
129 @page
130 @node H8/300 Directives
131 @section H8/300 Machine Directives
132
133 @cindex H8/300 machine directives (none)
134 @cindex machine directives, H8/300 (none)
135 @cindex @code{word} directive, H8/300
136 @cindex @code{int} directive, H8/300
137 @code{@value{AS}} has the following machine-dependent directives for
138 the H8/300:
139
140 @table @code
141 @cindex H8/300H, assembling for
142 @item .h8300h
143 Recognize and emit additional instructions for the H8/300H variant, and
144 also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
145 for the H8/300 family.
146
147 @item .h8300s
148 Recognize and emit additional instructions for the H8S variant, and
149 also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
150 for the H8/300 family.
151
152 @item .h8300hn
153 Recognize and emit additional instructions for the H8/300H variant in
154 normal mode, and also make @code{.int} emit 32-bit numbers rather than
155 the usual (16-bit) for the H8/300 family.
156
157 @item .h8300sn
158 Recognize and emit additional instructions for the H8S variant in
159 normal mode, and also make @code{.int} emit 32-bit numbers rather than
160 the usual (16-bit) for the H8/300 family.
161 @end table
162
163 On the H8/300 family (including the H8/300H) @samp{.word} directives
164 generate 16-bit numbers.
165
166 @node H8/300 Opcodes
167 @section Opcodes
168
169 @cindex H8/300 opcode summary
170 @cindex opcode summary, H8/300
171 @cindex mnemonics, H8/300
172 @cindex instruction summary, H8/300
173 For detailed information on the H8/300 machine instruction set, see
174 @cite{H8/300 Series Programming Manual}. For information specific to
175 the H8/300H, see @cite{H8/300H Series Programming Manual} (Renesas).
176
177 @code{@value{AS}} implements all the standard H8/300 opcodes. No additional
178 pseudo-instructions are needed on this family.
179
180 @ifset SMALL
181 @c this table, due to the multi-col faking and hardcoded order, looks silly
182 @c except in smallbook. See comments below "@set SMALL" near top of this file.
183
184 The following table summarizes the H8/300 opcodes, and their arguments.
185 Entries marked @samp{*} are opcodes used only on the H8/300H.
186
187 @smallexample
188 @c Using @group seems to use the normal baselineskip, not the smallexample
189 @c baselineskip; looks approx doublespaced.
190 @i{Legend:}
191 Rs @r{source register}
192 Rd @r{destination register}
193 abs @r{absolute address}
194 imm @r{immediate data}
195 disp:N @r{N-bit displacement from a register}
196 pcrel:N @r{N-bit displacement relative to program counter}
197
198 add.b #imm,rd * andc #imm,ccr
199 add.b rs,rd band #imm,rd
200 add.w rs,rd band #imm,@@rd
201 * add.w #imm,rd band #imm,@@abs:8
202 * add.l rs,rd bra pcrel:8
203 * add.l #imm,rd * bra pcrel:16
204 adds #imm,rd bt pcrel:8
205 addx #imm,rd * bt pcrel:16
206 addx rs,rd brn pcrel:8
207 and.b #imm,rd * brn pcrel:16
208 and.b rs,rd bf pcrel:8
209 * and.w rs,rd * bf pcrel:16
210 * and.w #imm,rd bhi pcrel:8
211 * and.l #imm,rd * bhi pcrel:16
212 * and.l rs,rd bls pcrel:8
213 @page
214 * bls pcrel:16 bld #imm,rd
215 bcc pcrel:8 bld #imm,@@rd
216 * bcc pcrel:16 bld #imm,@@abs:8
217 bhs pcrel:8 bnot #imm,rd
218 * bhs pcrel:16 bnot #imm,@@rd
219 bcs pcrel:8 bnot #imm,@@abs:8
220 * bcs pcrel:16 bnot rs,rd
221 blo pcrel:8 bnot rs,@@rd
222 * blo pcrel:16 bnot rs,@@abs:8
223 bne pcrel:8 bor #imm,rd
224 * bne pcrel:16 bor #imm,@@rd
225 beq pcrel:8 bor #imm,@@abs:8
226 * beq pcrel:16 bset #imm,rd
227 bvc pcrel:8 bset #imm,@@rd
228 * bvc pcrel:16 bset #imm,@@abs:8
229 bvs pcrel:8 bset rs,rd
230 * bvs pcrel:16 bset rs,@@rd
231 bpl pcrel:8 bset rs,@@abs:8
232 * bpl pcrel:16 bsr pcrel:8
233 bmi pcrel:8 bsr pcrel:16
234 * bmi pcrel:16 bst #imm,rd
235 bge pcrel:8 bst #imm,@@rd
236 * bge pcrel:16 bst #imm,@@abs:8
237 blt pcrel:8 btst #imm,rd
238 * blt pcrel:16 btst #imm,@@rd
239 bgt pcrel:8 btst #imm,@@abs:8
240 * bgt pcrel:16 btst rs,rd
241 ble pcrel:8 btst rs,@@rd
242 * ble pcrel:16 btst rs,@@abs:8
243 bclr #imm,rd bxor #imm,rd
244 bclr #imm,@@rd bxor #imm,@@rd
245 bclr #imm,@@abs:8 bxor #imm,@@abs:8
246 bclr rs,rd cmp.b #imm,rd
247 bclr rs,@@rd cmp.b rs,rd
248 bclr rs,@@abs:8 cmp.w rs,rd
249 biand #imm,rd cmp.w rs,rd
250 biand #imm,@@rd * cmp.w #imm,rd
251 biand #imm,@@abs:8 * cmp.l #imm,rd
252 bild #imm,rd * cmp.l rs,rd
253 bild #imm,@@rd daa rs
254 bild #imm,@@abs:8 das rs
255 bior #imm,rd dec.b rs
256 bior #imm,@@rd * dec.w #imm,rd
257 bior #imm,@@abs:8 * dec.l #imm,rd
258 bist #imm,rd divxu.b rs,rd
259 bist #imm,@@rd * divxu.w rs,rd
260 bist #imm,@@abs:8 * divxs.b rs,rd
261 bixor #imm,rd * divxs.w rs,rd
262 bixor #imm,@@rd eepmov
263 bixor #imm,@@abs:8 * eepmovw
264 @page
265 * exts.w rd mov.w rs,@@abs:16
266 * exts.l rd * mov.l #imm,rd
267 * extu.w rd * mov.l rs,rd
268 * extu.l rd * mov.l @@rs,rd
269 inc rs * mov.l @@(disp:16,rs),rd
270 * inc.w #imm,rd * mov.l @@(disp:24,rs),rd
271 * inc.l #imm,rd * mov.l @@rs+,rd
272 jmp @@rs * mov.l @@abs:16,rd
273 jmp abs * mov.l @@abs:24,rd
274 jmp @@@@abs:8 * mov.l rs,@@rd
275 jsr @@rs * mov.l rs,@@(disp:16,rd)
276 jsr abs * mov.l rs,@@(disp:24,rd)
277 jsr @@@@abs:8 * mov.l rs,@@-rd
278 ldc #imm,ccr * mov.l rs,@@abs:16
279 ldc rs,ccr * mov.l rs,@@abs:24
280 * ldc @@abs:16,ccr movfpe @@abs:16,rd
281 * ldc @@abs:24,ccr movtpe rs,@@abs:16
282 * ldc @@(disp:16,rs),ccr mulxu.b rs,rd
283 * ldc @@(disp:24,rs),ccr * mulxu.w rs,rd
284 * ldc @@rs+,ccr * mulxs.b rs,rd
285 * ldc @@rs,ccr * mulxs.w rs,rd
286 * mov.b @@(disp:24,rs),rd neg.b rs
287 * mov.b rs,@@(disp:24,rd) * neg.w rs
288 mov.b @@abs:16,rd * neg.l rs
289 mov.b rs,rd nop
290 mov.b @@abs:8,rd not.b rs
291 mov.b rs,@@abs:8 * not.w rs
292 mov.b rs,rd * not.l rs
293 mov.b #imm,rd or.b #imm,rd
294 mov.b @@rs,rd or.b rs,rd
295 mov.b @@(disp:16,rs),rd * or.w #imm,rd
296 mov.b @@rs+,rd * or.w rs,rd
297 mov.b @@abs:8,rd * or.l #imm,rd
298 mov.b rs,@@rd * or.l rs,rd
299 mov.b rs,@@(disp:16,rd) orc #imm,ccr
300 mov.b rs,@@-rd pop.w rs
301 mov.b rs,@@abs:8 * pop.l rs
302 mov.w rs,@@rd push.w rs
303 * mov.w @@(disp:24,rs),rd * push.l rs
304 * mov.w rs,@@(disp:24,rd) rotl.b rs
305 * mov.w @@abs:24,rd * rotl.w rs
306 * mov.w rs,@@abs:24 * rotl.l rs
307 mov.w rs,rd rotr.b rs
308 mov.w #imm,rd * rotr.w rs
309 mov.w @@rs,rd * rotr.l rs
310 mov.w @@(disp:16,rs),rd rotxl.b rs
311 mov.w @@rs+,rd * rotxl.w rs
312 mov.w @@abs:16,rd * rotxl.l rs
313 mov.w rs,@@(disp:16,rd) rotxr.b rs
314 mov.w rs,@@-rd * rotxr.w rs
315 @page
316 * rotxr.l rs * stc ccr,@@(disp:24,rd)
317 bpt * stc ccr,@@-rd
318 rte * stc ccr,@@abs:16
319 rts * stc ccr,@@abs:24
320 shal.b rs sub.b rs,rd
321 * shal.w rs sub.w rs,rd
322 * shal.l rs * sub.w #imm,rd
323 shar.b rs * sub.l rs,rd
324 * shar.w rs * sub.l #imm,rd
325 * shar.l rs subs #imm,rd
326 shll.b rs subx #imm,rd
327 * shll.w rs subx rs,rd
328 * shll.l rs * trapa #imm
329 shlr.b rs xor #imm,rd
330 * shlr.w rs xor rs,rd
331 * shlr.l rs * xor.w #imm,rd
332 sleep * xor.w rs,rd
333 stc ccr,rd * xor.l #imm,rd
334 * stc ccr,@@rs * xor.l rs,rd
335 * stc ccr,@@(disp:16,rd) xorc #imm,ccr
336 @end smallexample
337 @end ifset
338
339 @cindex size suffixes, H8/300
340 @cindex H8/300 size suffixes
341 Four H8/300 instructions (@code{add}, @code{cmp}, @code{mov},
342 @code{sub}) are defined with variants using the suffixes @samp{.b},
343 @samp{.w}, and @samp{.l} to specify the size of a memory operand.
344 @code{@value{AS}} supports these suffixes, but does not require them;
345 since one of the operands is always a register, @code{@value{AS}} can
346 deduce the correct size.
347
348 For example, since @code{r0} refers to a 16-bit register,
349 @example
350 mov r0,@@foo
351 @exdent is equivalent to
352 mov.w r0,@@foo
353 @end example
354
355 If you use the size suffixes, @code{@value{AS}} issues a warning when
356 the suffix and the register size do not match.