* doc/as.texinfo: Add support to generate man options for h8300.
[binutils-gdb.git] / gas / doc / c-h8300.texi
1 @c Copyright (C) 1991, 1992, 1993, 1994, 1995, 2003, 2008, 2011
2 @c Free Software Foundation, Inc.
3 @c This is part of the GAS manual.
4 @c For copying conditions, see the file as.texinfo.
5 @ifset GENERIC
6 @page
7 @end ifset
8 @node H8/300-Dependent
9 @chapter H8/300 Dependent Features
10
11 @cindex H8/300 support
12 @menu
13 * H8/300 Options:: Options
14 * H8/300 Syntax:: Syntax
15 * H8/300 Floating Point:: Floating Point
16 * H8/300 Directives:: H8/300 Machine Directives
17 * H8/300 Opcodes:: Opcodes
18 @end menu
19
20 @node H8/300 Options
21 @section Options
22
23 @cindex H8/300 options
24 @cindex options, H8/300
25 The Renesas H8/300 version of @code{@value{AS}} has one
26 machine-dependent option:
27
28 @c man begin OPTIONS
29 @table @gcctabopt
30 @item -h-tick-hex
31 Support H'00 style hex constants in addition to 0x00 style.
32
33 @end table
34 @c man end
35
36 @node H8/300 Syntax
37 @section Syntax
38 @menu
39 * H8/300-Chars:: Special Characters
40 * H8/300-Regs:: Register Names
41 * H8/300-Addressing:: Addressing Modes
42 @end menu
43
44 @node H8/300-Chars
45 @subsection Special Characters
46
47 @cindex line comment character, H8/300
48 @cindex H8/300 line comment character
49 @samp{;} is the line comment character.
50
51 @cindex line separator, H8/300
52 @cindex statement separator, H8/300
53 @cindex H8/300 line separator
54 @samp{$} can be used instead of a newline to separate statements.
55 Therefore @emph{you may not use @samp{$} in symbol names} on the H8/300.
56
57 @node H8/300-Regs
58 @subsection Register Names
59
60 @cindex H8/300 registers
61 @cindex register names, H8/300
62 You can use predefined symbols of the form @samp{r@var{n}h} and
63 @samp{r@var{n}l} to refer to the H8/300 registers as sixteen 8-bit
64 general-purpose registers. @var{n} is a digit from @samp{0} to
65 @samp{7}); for instance, both @samp{r0h} and @samp{r7l} are valid
66 register names.
67
68 You can also use the eight predefined symbols @samp{r@var{n}} to refer
69 to the H8/300 registers as 16-bit registers (you must use this form for
70 addressing).
71
72 On the H8/300H, you can also use the eight predefined symbols
73 @samp{er@var{n}} (@samp{er0} @dots{} @samp{er7}) to refer to the 32-bit
74 general purpose registers.
75
76 The two control registers are called @code{pc} (program counter; a
77 16-bit register, except on the H8/300H where it is 24 bits) and
78 @code{ccr} (condition code register; an 8-bit register). @code{r7} is
79 used as the stack pointer, and can also be called @code{sp}.
80
81 @node H8/300-Addressing
82 @subsection Addressing Modes
83
84 @cindex addressing modes, H8/300
85 @cindex H8/300 addressing modes
86 @value{AS} understands the following addressing modes for the H8/300:
87 @table @code
88 @item r@var{n}
89 Register direct
90
91 @item @@r@var{n}
92 Register indirect
93
94 @need 1200
95 @item @@(@var{d}, r@var{n})
96 @itemx @@(@var{d}:16, r@var{n})
97 @itemx @@(@var{d}:24, r@var{n})
98 Register indirect: 16-bit or 24-bit displacement @var{d} from register
99 @var{n}. (24-bit displacements are only meaningful on the H8/300H.)
100
101 @item @@r@var{n}+
102 Register indirect with post-increment
103
104 @item @@-r@var{n}
105 Register indirect with pre-decrement
106
107 @item @code{@@}@var{aa}
108 @itemx @code{@@}@var{aa}:8
109 @itemx @code{@@}@var{aa}:16
110 @itemx @code{@@}@var{aa}:24
111 Absolute address @code{aa}. (The address size @samp{:24} only makes
112 sense on the H8/300H.)
113
114 @item #@var{xx}
115 @itemx #@var{xx}:8
116 @itemx #@var{xx}:16
117 @itemx #@var{xx}:32
118 Immediate data @var{xx}. You may specify the @samp{:8}, @samp{:16}, or
119 @samp{:32} for clarity, if you wish; but @code{@value{AS}} neither
120 requires this nor uses it---the data size required is taken from
121 context.
122
123 @item @code{@@}@code{@@}@var{aa}
124 @itemx @code{@@}@code{@@}@var{aa}:8
125 Memory indirect. You may specify the @samp{:8} for clarity, if you
126 wish; but @code{@value{AS}} neither requires this nor uses it.
127 @end table
128
129 @node H8/300 Floating Point
130 @section Floating Point
131
132 @cindex floating point, H8/300 (@sc{ieee})
133 @cindex H8/300 floating point (@sc{ieee})
134 The H8/300 family has no hardware floating point, but the @code{.float}
135 directive generates @sc{ieee} floating-point numbers for compatibility
136 with other development tools.
137
138 @page
139 @node H8/300 Directives
140 @section H8/300 Machine Directives
141
142 @cindex H8/300 machine directives (none)
143 @cindex machine directives, H8/300 (none)
144 @cindex @code{word} directive, H8/300
145 @cindex @code{int} directive, H8/300
146 @code{@value{AS}} has the following machine-dependent directives for
147 the H8/300:
148
149 @table @code
150 @cindex H8/300H, assembling for
151 @item .h8300h
152 Recognize and emit additional instructions for the H8/300H variant, and
153 also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
154 for the H8/300 family.
155
156 @item .h8300s
157 Recognize and emit additional instructions for the H8S variant, and
158 also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
159 for the H8/300 family.
160
161 @item .h8300hn
162 Recognize and emit additional instructions for the H8/300H variant in
163 normal mode, and also make @code{.int} emit 32-bit numbers rather than
164 the usual (16-bit) for the H8/300 family.
165
166 @item .h8300sn
167 Recognize and emit additional instructions for the H8S variant in
168 normal mode, and also make @code{.int} emit 32-bit numbers rather than
169 the usual (16-bit) for the H8/300 family.
170 @end table
171
172 On the H8/300 family (including the H8/300H) @samp{.word} directives
173 generate 16-bit numbers.
174
175 @node H8/300 Opcodes
176 @section Opcodes
177
178 @cindex H8/300 opcode summary
179 @cindex opcode summary, H8/300
180 @cindex mnemonics, H8/300
181 @cindex instruction summary, H8/300
182 For detailed information on the H8/300 machine instruction set, see
183 @cite{H8/300 Series Programming Manual}. For information specific to
184 the H8/300H, see @cite{H8/300H Series Programming Manual} (Renesas).
185
186 @code{@value{AS}} implements all the standard H8/300 opcodes. No additional
187 pseudo-instructions are needed on this family.
188
189 @ifset SMALL
190 @c this table, due to the multi-col faking and hardcoded order, looks silly
191 @c except in smallbook. See comments below "@set SMALL" near top of this file.
192
193 The following table summarizes the H8/300 opcodes, and their arguments.
194 Entries marked @samp{*} are opcodes used only on the H8/300H.
195
196 @smallexample
197 @c Using @group seems to use the normal baselineskip, not the smallexample
198 @c baselineskip; looks approx doublespaced.
199 @i{Legend:}
200 Rs @r{source register}
201 Rd @r{destination register}
202 abs @r{absolute address}
203 imm @r{immediate data}
204 disp:N @r{N-bit displacement from a register}
205 pcrel:N @r{N-bit displacement relative to program counter}
206
207 add.b #imm,rd * andc #imm,ccr
208 add.b rs,rd band #imm,rd
209 add.w rs,rd band #imm,@@rd
210 * add.w #imm,rd band #imm,@@abs:8
211 * add.l rs,rd bra pcrel:8
212 * add.l #imm,rd * bra pcrel:16
213 adds #imm,rd bt pcrel:8
214 addx #imm,rd * bt pcrel:16
215 addx rs,rd brn pcrel:8
216 and.b #imm,rd * brn pcrel:16
217 and.b rs,rd bf pcrel:8
218 * and.w rs,rd * bf pcrel:16
219 * and.w #imm,rd bhi pcrel:8
220 * and.l #imm,rd * bhi pcrel:16
221 * and.l rs,rd bls pcrel:8
222 @page
223 * bls pcrel:16 bld #imm,rd
224 bcc pcrel:8 bld #imm,@@rd
225 * bcc pcrel:16 bld #imm,@@abs:8
226 bhs pcrel:8 bnot #imm,rd
227 * bhs pcrel:16 bnot #imm,@@rd
228 bcs pcrel:8 bnot #imm,@@abs:8
229 * bcs pcrel:16 bnot rs,rd
230 blo pcrel:8 bnot rs,@@rd
231 * blo pcrel:16 bnot rs,@@abs:8
232 bne pcrel:8 bor #imm,rd
233 * bne pcrel:16 bor #imm,@@rd
234 beq pcrel:8 bor #imm,@@abs:8
235 * beq pcrel:16 bset #imm,rd
236 bvc pcrel:8 bset #imm,@@rd
237 * bvc pcrel:16 bset #imm,@@abs:8
238 bvs pcrel:8 bset rs,rd
239 * bvs pcrel:16 bset rs,@@rd
240 bpl pcrel:8 bset rs,@@abs:8
241 * bpl pcrel:16 bsr pcrel:8
242 bmi pcrel:8 bsr pcrel:16
243 * bmi pcrel:16 bst #imm,rd
244 bge pcrel:8 bst #imm,@@rd
245 * bge pcrel:16 bst #imm,@@abs:8
246 blt pcrel:8 btst #imm,rd
247 * blt pcrel:16 btst #imm,@@rd
248 bgt pcrel:8 btst #imm,@@abs:8
249 * bgt pcrel:16 btst rs,rd
250 ble pcrel:8 btst rs,@@rd
251 * ble pcrel:16 btst rs,@@abs:8
252 bclr #imm,rd bxor #imm,rd
253 bclr #imm,@@rd bxor #imm,@@rd
254 bclr #imm,@@abs:8 bxor #imm,@@abs:8
255 bclr rs,rd cmp.b #imm,rd
256 bclr rs,@@rd cmp.b rs,rd
257 bclr rs,@@abs:8 cmp.w rs,rd
258 biand #imm,rd cmp.w rs,rd
259 biand #imm,@@rd * cmp.w #imm,rd
260 biand #imm,@@abs:8 * cmp.l #imm,rd
261 bild #imm,rd * cmp.l rs,rd
262 bild #imm,@@rd daa rs
263 bild #imm,@@abs:8 das rs
264 bior #imm,rd dec.b rs
265 bior #imm,@@rd * dec.w #imm,rd
266 bior #imm,@@abs:8 * dec.l #imm,rd
267 bist #imm,rd divxu.b rs,rd
268 bist #imm,@@rd * divxu.w rs,rd
269 bist #imm,@@abs:8 * divxs.b rs,rd
270 bixor #imm,rd * divxs.w rs,rd
271 bixor #imm,@@rd eepmov
272 bixor #imm,@@abs:8 * eepmovw
273 @page
274 * exts.w rd mov.w rs,@@abs:16
275 * exts.l rd * mov.l #imm,rd
276 * extu.w rd * mov.l rs,rd
277 * extu.l rd * mov.l @@rs,rd
278 inc rs * mov.l @@(disp:16,rs),rd
279 * inc.w #imm,rd * mov.l @@(disp:24,rs),rd
280 * inc.l #imm,rd * mov.l @@rs+,rd
281 jmp @@rs * mov.l @@abs:16,rd
282 jmp abs * mov.l @@abs:24,rd
283 jmp @@@@abs:8 * mov.l rs,@@rd
284 jsr @@rs * mov.l rs,@@(disp:16,rd)
285 jsr abs * mov.l rs,@@(disp:24,rd)
286 jsr @@@@abs:8 * mov.l rs,@@-rd
287 ldc #imm,ccr * mov.l rs,@@abs:16
288 ldc rs,ccr * mov.l rs,@@abs:24
289 * ldc @@abs:16,ccr movfpe @@abs:16,rd
290 * ldc @@abs:24,ccr movtpe rs,@@abs:16
291 * ldc @@(disp:16,rs),ccr mulxu.b rs,rd
292 * ldc @@(disp:24,rs),ccr * mulxu.w rs,rd
293 * ldc @@rs+,ccr * mulxs.b rs,rd
294 * ldc @@rs,ccr * mulxs.w rs,rd
295 * mov.b @@(disp:24,rs),rd neg.b rs
296 * mov.b rs,@@(disp:24,rd) * neg.w rs
297 mov.b @@abs:16,rd * neg.l rs
298 mov.b rs,rd nop
299 mov.b @@abs:8,rd not.b rs
300 mov.b rs,@@abs:8 * not.w rs
301 mov.b rs,rd * not.l rs
302 mov.b #imm,rd or.b #imm,rd
303 mov.b @@rs,rd or.b rs,rd
304 mov.b @@(disp:16,rs),rd * or.w #imm,rd
305 mov.b @@rs+,rd * or.w rs,rd
306 mov.b @@abs:8,rd * or.l #imm,rd
307 mov.b rs,@@rd * or.l rs,rd
308 mov.b rs,@@(disp:16,rd) orc #imm,ccr
309 mov.b rs,@@-rd pop.w rs
310 mov.b rs,@@abs:8 * pop.l rs
311 mov.w rs,@@rd push.w rs
312 * mov.w @@(disp:24,rs),rd * push.l rs
313 * mov.w rs,@@(disp:24,rd) rotl.b rs
314 * mov.w @@abs:24,rd * rotl.w rs
315 * mov.w rs,@@abs:24 * rotl.l rs
316 mov.w rs,rd rotr.b rs
317 mov.w #imm,rd * rotr.w rs
318 mov.w @@rs,rd * rotr.l rs
319 mov.w @@(disp:16,rs),rd rotxl.b rs
320 mov.w @@rs+,rd * rotxl.w rs
321 mov.w @@abs:16,rd * rotxl.l rs
322 mov.w rs,@@(disp:16,rd) rotxr.b rs
323 mov.w rs,@@-rd * rotxr.w rs
324 @page
325 * rotxr.l rs * stc ccr,@@(disp:24,rd)
326 bpt * stc ccr,@@-rd
327 rte * stc ccr,@@abs:16
328 rts * stc ccr,@@abs:24
329 shal.b rs sub.b rs,rd
330 * shal.w rs sub.w rs,rd
331 * shal.l rs * sub.w #imm,rd
332 shar.b rs * sub.l rs,rd
333 * shar.w rs * sub.l #imm,rd
334 * shar.l rs subs #imm,rd
335 shll.b rs subx #imm,rd
336 * shll.w rs subx rs,rd
337 * shll.l rs * trapa #imm
338 shlr.b rs xor #imm,rd
339 * shlr.w rs xor rs,rd
340 * shlr.l rs * xor.w #imm,rd
341 sleep * xor.w rs,rd
342 stc ccr,rd * xor.l #imm,rd
343 * stc ccr,@@rs * xor.l rs,rd
344 * stc ccr,@@(disp:16,rd) xorc #imm,ccr
345 @end smallexample
346 @end ifset
347
348 @cindex size suffixes, H8/300
349 @cindex H8/300 size suffixes
350 Four H8/300 instructions (@code{add}, @code{cmp}, @code{mov},
351 @code{sub}) are defined with variants using the suffixes @samp{.b},
352 @samp{.w}, and @samp{.l} to specify the size of a memory operand.
353 @code{@value{AS}} supports these suffixes, but does not require them;
354 since one of the operands is always a register, @code{@value{AS}} can
355 deduce the correct size.
356
357 For example, since @code{r0} refers to a 16-bit register,
358 @example
359 mov r0,@@foo
360 @exdent is equivalent to
361 mov.w r0,@@foo
362 @end example
363
364 If you use the size suffixes, @code{@value{AS}} issues a warning when
365 the suffix and the register size do not match.