gas/doc/c-m68k.texi

   1 @c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000
   2 @c Free Software Foundation, Inc.
   3 @c This is part of the GAS manual.
   4 @c For copying conditions, see the file as.texinfo.
   5 @ifset GENERIC
   6 @page
   7 @node M68K-Dependent
   8 @chapter M680x0 Dependent Features
   9 @end ifset
  10 @ifclear GENERIC
  11 @node Machine Dependencies
  12 @chapter M680x0 Dependent Features
  13 @end ifclear
  14
  15 @cindex M680x0 support
  16 @menu
  17 * M68K-Opts::                   M680x0 Options
  18 * M68K-Syntax::                 Syntax
  19 * M68K-Moto-Syntax::            Motorola Syntax
  20 * M68K-Float::                  Floating Point
  21 * M68K-Directives::             680x0 Machine Directives
  22 * M68K-opcodes::                Opcodes
  23 @end menu
  24
  25 @node M68K-Opts
  26 @section M680x0 Options
  27
  28 @cindex options, M680x0
  29 @cindex M680x0 options
  30 The Motorola 680x0 version of @code{@value{AS}} has a few machine
  31 dependent options:
  32
  33 @table @samp
  34
  35 @cindex @samp{-l} option, M680x0
  36 @item -l
  37 You can use the @samp{-l} option to shorten the size of references to undefined
  38 symbols.  If you do not use the @samp{-l} option, references to undefined
  39 symbols are wide enough for a full @code{long} (32 bits).  (Since
  40 @code{@value{AS}} cannot know where these symbols end up, @code{@value{AS}} can
  41 only allocate space for the linker to fill in later.  Since @code{@value{AS}}
  42 does not know how far away these symbols are, it allocates as much space as it
  43 can.)  If you use this option, the references are only one word wide (16 bits).
  44 This may be useful if you want the object file to be as small as possible, and
  45 you know that the relevant symbols are always less than 17 bits away.
  46
  47 @cindex @samp{--register-prefix-optional} option, M680x0
  48 @item --register-prefix-optional
  49 For some configurations, especially those where the compiler normally
  50 does not prepend an underscore to the names of user variables, the
  51 assembler requires a @samp{%} before any use of a register name.  This
  52 is intended to let the assembler distinguish between C variables and
  53 functions named @samp{a0} through @samp{a7}, and so on.  The @samp{%} is
  54 always accepted, but is not required for certain configurations, notably
  55 @samp{sun3}.  The @samp{--register-prefix-optional} option may be used
  56 to permit omitting the @samp{%} even for configurations for which it is
  57 normally required.  If this is done, it will generally be impossible to
  58 refer to C variables and functions with the same names as register
  59 names.
  60
  61 @cindex @samp{--bitwise-or} option, M680x0
  62 @item --bitwise-or
  63 Normally the character @samp{|} is treated as a comment character, which
  64 means that it can not be used in expressions.  The @samp{--bitwise-or}
  65 option turns @samp{|} into a normal character.  In this mode, you must
  66 either use C style comments, or start comments with a @samp{#} character
  67 at the beginning of a line.
  68
  69 @cindex @samp{--base-size-default-16}
  70 @cindex @samp{--base-size-default-32}
  71 @item --base-size-default-16  --base-size-default-32
  72 If you use an addressing mode with a base register without specifying
  73 the size, @code{@value{AS}} will normally use the full 32 bit value.
  74 For example, the addressing mode @samp{%a0@@(%d0)} is equivalent to
  75 @samp{%a0@@(%d0:l)}.  You may use the @samp{--base-size-default-16}
  76 option to tell @code{@value{AS}} to default to using the 16 bit value.
  77 In this case, @samp{%a0@@(%d0)} is equivalent to @samp{%a0@@(%d0:w)}.
  78 You may use the @samp{--base-size-default-32} option to restore the
  79 default behaviour.
  80
  81 @cindex @samp{--disp-size-default-16}
  82 @cindex @samp{--disp-size-default-32}
  83 @item --disp-size-default-16  --disp-size-default-32
  84 If you use an addressing mode with a displacement, and the value of the
  85 displacement is not known, @code{@value{AS}} will normally assume that
  86 the value is 32 bits.  For example, if the symbol @samp{disp} has not
  87 been defined, @code{@value{AS}} will assemble the addressing mode
  88 @samp{%a0@@(disp,%d0)} as though @samp{disp} is a 32 bit value.  You may
  89 use the @samp{--disp-size-default-16} option to tell @code{@value{AS}}
  90 to instead assume that the displacement is 16 bits.  In this case,
  91 @code{@value{AS}} will assemble @samp{%a0@@(disp,%d0)} as though
  92 @samp{disp} is a 16 bit value.  You may use the
  93 @samp{--disp-size-default-32} option to restore the default behaviour.
  94
  95 @cindex @samp{--pcrel}
  96 @item --pcrel
  97 Always keep branches PC-relative.  In the M680x0 architecture all branches
  98 are defined as PC-relative.  However, on some processors they are limited
  99 to word displacements maximum.  When @code{@value{AS}} needs a long branch
 100 that is not available, it normally emits an absolute jump instead.  This
 101 option disables this substitution.  When this option is given and no long
 102 branches are available, only word branches will be emitted.  An error
 103 message will be generated if a word branch cannot reach its target.  This
 104 option has no effect on 68020 and other processors that have long branches.
 105 @pxref{M68K-Branch,,Branch Improvement}.
 106
 107 @cindex @samp{-m68000} and related options
 108 @cindex architecture options, M680x0
 109 @cindex M680x0 architecture options
 110 @item -m68000
 111 @code{@value{AS}} can assemble code for several different members of the
 112 Motorola 680x0 family.  The default depends upon how @code{@value{AS}}
 113 was configured when it was built; normally, the default is to assemble
 114 code for the 68020 microprocessor.  The following options may be used to
 115 change the default.  These options control which instructions and
 116 addressing modes are permitted.  The members of the 680x0 family are
 117 very similar.  For detailed information about the differences, see the
 118 Motorola manuals.
 119
 120 @table @samp
 121 @item -m68000
 122 @itemx -m68ec000
 123 @itemx -m68hc000
 124 @itemx -m68hc001
 125 @itemx -m68008
 126 @itemx -m68302
 127 @itemx -m68306
 128 @itemx -m68307
 129 @itemx -m68322
 130 @itemx -m68356
 131 Assemble for the 68000. @samp{-m68008}, @samp{-m68302}, and so on are synonyms
 132 for @samp{-m68000}, since the chips are the same from the point of view
 133 of the assembler.
 134
 135 @item -m68010
 136 Assemble for the 68010.
 137
 138 @item -m68020
 139 @itemx -m68ec020
 140 Assemble for the 68020.  This is normally the default.
 141
 142 @item -m68030
 143 @itemx -m68ec030
 144 Assemble for the 68030.
 145
 146 @item -m68040
 147 @itemx -m68ec040
 148 Assemble for the 68040.
 149
 150 @item -m68060
 151 @itemx -m68ec060
 152 Assemble for the 68060.
 153
 154 @item -mcpu32
 155 @itemx -m68330
 156 @itemx -m68331
 157 @itemx -m68332
 158 @itemx -m68333
 159 @itemx -m68334
 160 @itemx -m68336
 161 @itemx -m68340
 162 @itemx -m68341
 163 @itemx -m68349
 164 @itemx -m68360
 165 Assemble for the CPU32 family of chips.
 166
 167 @item -m5200
 168 Assemble for the ColdFire family of chips.
 169
 170 @item -m68881
 171 @itemx -m68882
 172 Assemble 68881 floating point instructions.  This is the default for the
 173 68020, 68030, and the CPU32.  The 68040 and 68060 always support
 174 floating point instructions.
 175
 176 @item -mno-68881
 177 Do not assemble 68881 floating point instructions.  This is the default
 178 for 68000 and the 68010.  The 68040 and 68060 always support floating
 179 point instructions, even if this option is used.
 180
 181 @item -m68851
 182 Assemble 68851 MMU instructions.  This is the default for the 68020,
 183 68030, and 68060.  The 68040 accepts a somewhat different set of MMU
 184 instructions; @samp{-m68851} and @samp{-m68040} should not be used
 185 together.
 186
 187 @item -mno-68851
 188 Do not assemble 68851 MMU instructions.  This is the default for the
 189 68000, 68010, and the CPU32.  The 68040 accepts a somewhat different set
 190 of MMU instructions.
 191 @end table
 192 @end table
 193
 194 @node M68K-Syntax
 195 @section Syntax
 196
 197 @cindex @sc{mit}
 198 This syntax for the Motorola 680x0 was developed at @sc{mit}.
 199
 200 @cindex M680x0 syntax
 201 @cindex syntax, M680x0
 202 @cindex M680x0 size modifiers
 203 @cindex size modifiers, M680x0
 204 The 680x0 version of @code{@value{AS}} uses instructions names and
 205 syntax compatible with the Sun assembler.  Intervening periods are
 206 ignored; for example, @samp{movl} is equivalent to @samp{mov.l}.
 207
 208 In the following table @var{apc} stands for any of the address registers
 209 (@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the
 210 zero-address relative to the program counter (@samp{%zpc}), a suppressed
 211 address register (@samp{%za0} through @samp{%za7}), or it may be omitted
 212 entirely.  The use of @var{size} means one of @samp{w} or @samp{l}, and
 213 it may be omitted, along with the leading colon, unless a scale is also
 214 specified.  The use of @var{scale} means one of @samp{1}, @samp{2},
 215 @samp{4}, or @samp{8}, and it may always be omitted along with the
 216 leading colon.
 217
 218 @cindex M680x0 addressing modes
 219 @cindex addressing modes, M680x0
 220 The following addressing modes are understood:
 221 @table @dfn
 222 @item Immediate
 223 @samp{#@var{number}}
 224
 225 @item Data Register
 226 @samp{%d0} through @samp{%d7}
 227
 228 @item Address Register
 229 @samp{%a0} through @samp{%a7}@*
 230 @samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer.  @code{%a6}
 231 is also known as @samp{%fp}, the Frame Pointer.
 232
 233 @item Address Register Indirect
 234 @samp{%a0@@} through @samp{%a7@@}
 235
 236 @item Address Register Postincrement
 237 @samp{%a0@@+} through @samp{%a7@@+}
 238
 239 @item Address Register Predecrement
 240 @samp{%a0@@-} through @samp{%a7@@-}
 241
 242 @item Indirect Plus Offset
 243 @samp{@var{apc}@@(@var{number})}
 244
 245 @item Index
 246 @samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})}
 247
 248 The @var{number} may be omitted.
 249
 250 @item Postindex
 251 @samp{@var{apc}@@(@var{number})@@(@var{onumber},@var{register}:@var{size}:@var{scale})}
 252
 253 The @var{onumber} or the @var{register}, but not both, may be omitted.
 254
 255 @item Preindex
 256 @samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})@@(@var{onumber})}
 257
 258 The @var{number} may be omitted.  Omitting the @var{register} produces
 259 the Postindex addressing mode.
 260
 261 @item Absolute
 262 @samp{@var{symbol}}, or @samp{@var{digits}}, optionally followed by
 263 @samp{:b}, @samp{:w}, or @samp{:l}.
 264 @end table
 265
 266 @node M68K-Moto-Syntax
 267 @section Motorola Syntax
 268
 269 @cindex Motorola syntax for the 680x0
 270 @cindex alternate syntax for the 680x0
 271
 272 The standard Motorola syntax for this chip differs from the syntax
 273 already discussed (@pxref{M68K-Syntax,,Syntax}).  @code{@value{AS}} can
 274 accept Motorola syntax for operands, even if @sc{mit} syntax is used for
 275 other operands in the same instruction.  The two kinds of syntax are
 276 fully compatible.
 277
 278 In the following table @var{apc} stands for any of the address registers
 279 (@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the
 280 zero-address relative to the program counter (@samp{%zpc}), or a
 281 suppressed address register (@samp{%za0} through @samp{%za7}).  The use
 282 of @var{size} means one of @samp{w} or @samp{l}, and it may always be
 283 omitted along with the leading dot.  The use of @var{scale} means one of
 284 @samp{1}, @samp{2}, @samp{4}, or @samp{8}, and it may always be omitted
 285 along with the leading asterisk.
 286
 287 The following additional addressing modes are understood:
 288
 289 @table @dfn
 290 @item Address Register Indirect
 291 @samp{(%a0)} through @samp{(%a7)}@*
 292 @samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer.  @code{%a6}
 293 is also known as @samp{%fp}, the Frame Pointer.
 294
 295 @item Address Register Postincrement
 296 @samp{(%a0)+} through @samp{(%a7)+}
 297
 298 @item Address Register Predecrement
 299 @samp{-(%a0)} through @samp{-(%a7)}
 300
 301 @item Indirect Plus Offset
 302 @samp{@var{number}(@var{%a0})} through @samp{@var{number}(@var{%a7})},
 303 or @samp{@var{number}(@var{%pc})}.
 304
 305 The @var{number} may also appear within the parentheses, as in
 306 @samp{(@var{number},@var{%a0})}.  When used with the @var{pc}, the
 307 @var{number} may be omitted (with an address register, omitting the
 308 @var{number} produces Address Register Indirect mode).
 309
 310 @item Index
 311 @samp{@var{number}(@var{apc},@var{register}.@var{size}*@var{scale})}
 312
 313 The @var{number} may be omitted, or it may appear within the
 314 parentheses.  The @var{apc} may be omitted.  The @var{register} and the
 315 @var{apc} may appear in either order.  If both @var{apc} and
 316 @var{register} are address registers, and the @var{size} and @var{scale}
 317 are omitted, then the first register is taken as the base register, and
 318 the second as the index register.
 319
 320 @item Postindex
 321 @samp{([@var{number},@var{apc}],@var{register}.@var{size}*@var{scale},@var{onumber})}
 322
 323 The @var{onumber}, or the @var{register}, or both, may be omitted.
 324 Either the @var{number} or the @var{apc} may be omitted, but not both.
 325
 326 @item Preindex
 327 @samp{([@var{number},@var{apc},@var{register}.@var{size}*@var{scale}],@var{onumber})}
 328
 329 The @var{number}, or the @var{apc}, or the @var{register}, or any two of
 330 them, may be omitted.  The @var{onumber} may be omitted.  The
 331 @var{register} and the @var{apc} may appear in either order.  If both
 332 @var{apc} and @var{register} are address registers, and the @var{size}
 333 and @var{scale} are omitted, then the first register is taken as the
 334 base register, and the second as the index register.
 335 @end table
 336
 337 @node M68K-Float
 338 @section Floating Point
 339
 340 @cindex floating point, M680x0
 341 @cindex M680x0 floating point
 342 Packed decimal (P) format floating literals are not supported.
 343 Feel free to add the code!
 344
 345 The floating point formats generated by directives are these.
 346
 347 @table @code
 348 @cindex @code{float} directive, M680x0
 349 @item .float
 350 @code{Single} precision floating point constants.
 351
 352 @cindex @code{double} directive, M680x0
 353 @item .double
 354 @code{Double} precision floating point constants.
 355
 356 @cindex @code{extend} directive M680x0
 357 @cindex @code{ldouble} directive M680x0
 358 @item .extend
 359 @itemx .ldouble
 360 @code{Extended} precision (@code{long double}) floating point constants.
 361 @end table
 362
 363 @node M68K-Directives
 364 @section 680x0 Machine Directives
 365
 366 @cindex M680x0 directives
 367 @cindex directives, M680x0
 368 In order to be compatible with the Sun assembler the 680x0 assembler
 369 understands the following directives.
 370
 371 @table @code
 372 @cindex @code{data1} directive, M680x0
 373 @item .data1
 374 This directive is identical to a @code{.data 1} directive.
 375
 376 @cindex @code{data2} directive, M680x0
 377 @item .data2
 378 This directive is identical to a @code{.data 2} directive.
 379
 380 @cindex @code{even} directive, M680x0
 381 @item .even
 382 This directive is a special case of the @code{.align} directive; it
 383 aligns the output to an even byte boundary.
 384
 385 @cindex @code{skip} directive, M680x0
 386 @item .skip
 387 This directive is identical to a @code{.space} directive.
 388 @end table
 389
 390 @need 2000
 391 @node M68K-opcodes
 392 @section Opcodes
 393
 394 @cindex M680x0 opcodes
 395 @cindex opcodes, M680x0
 396 @cindex instruction set, M680x0
 397 @c doc@cygnus.com: I don't see any point in the following
 398 @c                   paragraph.  Bugs are bugs; how does saying this
 399 @c                   help anyone?
 400 @ignore
 401 Danger:  Several bugs have been found in the opcode table (and
 402 fixed).  More bugs may exist.  Be careful when using obscure
 403 instructions.
 404 @end ignore
 405
 406 @menu
 407 * M68K-Branch::                 Branch Improvement
 408 * M68K-Chars::                  Special Characters
 409 @end menu
 410
 411 @node M68K-Branch
 412 @subsection Branch Improvement
 413
 414 @cindex pseudo-opcodes, M680x0
 415 @cindex M680x0 pseudo-opcodes
 416 @cindex branch improvement, M680x0
 417 @cindex M680x0 branch improvement
 418 Certain pseudo opcodes are permitted for branch instructions.
 419 They expand to the shortest branch instruction that reach the
 420 target.  Generally these mnemonics are made by substituting @samp{j} for
 421 @samp{b} at the start of a Motorola mnemonic.
 422
 423 The following table summarizes the pseudo-operations.  A @code{*} flags
 424 cases that are more fully described after the table:
 425
 426 @smallexample
 427           Displacement
 428           +------------------------------------------------------------
 429           |                68020           68000/10, not PC-relative OK
 430 Pseudo-Op |BYTE    WORD    LONG            ABSOLUTE LONG JUMP    **
 431           +------------------------------------------------------------
 432      jbsr |bsrs    bsrw    bsrl            jsr
 433       jra |bras    braw    bral            jmp
 434 *     jXX |bXXs    bXXw    bXXl            bNXs;jmp
 435 *    dbXX | N/A    dbXXw   dbXX;bras;bral  dbXX;bras;jmp
 436      fjXX | N/A    fbXXw   fbXXl            N/A
 437
 438 XX: condition
 439 NX: negative of condition XX
 440
 441 @end smallexample
 442 @center @code{*}---see full description below
 443 @center @code{**}---this expansion mode is disallowed by @samp{--pcrel}
 444
 445 @table @code
 446 @item jbsr
 447 @itemx jra
 448 These are the simplest jump pseudo-operations; they always map to one
 449 particular machine instruction, depending on the displacement to the
 450 branch target.  This instruction will be a byte or word branch is that
 451 is sufficient.  Otherwise, a long branch will be emitted if available.
 452 If no long branches are available and the @samp{--pcrel} option is not
 453 given, an absolute long jump will be emitted instead.  If no long
 454 branches are available, the @samp{--pcrel} option is given, and a word
 455 branch cannot reach the target, an error message is generated.
 456
 457 In addition to standard branch operands, @code{@value{AS}} allows these
 458 pseudo-operations to have all operands that are allowed for jsr and jmp,
 459 substituting these instructions if the operand given is not valid for a
 460 branch instruction.
 461
 462 @item j@var{XX}
 463 Here, @samp{j@var{XX}} stands for an entire family of pseudo-operations,
 464 where @var{XX} is a conditional branch or condition-code test.  The full
 465 list of pseudo-ops in this family is:
 466 @smallexample
 467  jhi   jls   jcc   jcs   jne   jeq   jvc
 468  jvs   jpl   jmi   jge   jlt   jgt   jle
 469 @end smallexample
 470
 471 Usually, each of these pseudo-operations expands to a single branch
 472 instruction.  However, if a word branch is not sufficient, no long branches
 473 are available, and the @samp{--pcrel} option is not given, @code{@value{AS}}
 474 issues a longer code fragment in terms of @var{NX}, the opposite condition
 475 to @var{XX}.  For example, under these conditions:
 476 @smallexample
 477     j@var{XX} foo
 478 @end smallexample
 479 gives
 480 @smallexample
 481      b@var{NX}s oof
 482      jmp foo
 483  oof:
 484 @end smallexample
 485
 486 @item db@var{XX}
 487 The full family of pseudo-operations covered here is
 488 @smallexample
 489  dbhi   dbls   dbcc   dbcs   dbne   dbeq   dbvc
 490  dbvs   dbpl   dbmi   dbge   dblt   dbgt   dble
 491  dbf    dbra   dbt
 492 @end smallexample
 493
 494 Motorola @samp{db@var{XX}} instructions allow word displacements only.  When
 495 a word displacement is sufficient, each of these pseudo-operations expands
 496 to the corresponding Motorola instruction.  When a word displacement is not
 497 sufficient and long branches are available, when the source reads
 498 @samp{db@var{XX} foo}, @code{@value{AS}} emits
 499 @smallexample
 500      db@var{XX} oo1
 501      bras oo2
 502  oo1:bral foo
 503  oo2:
 504 @end smallexample
 505
 506 If, however, long branches are not available and the @samp{--pcrel} option is
 507 not given, @code{@value{AS}} emits
 508 @smallexample
 509      db@var{XX} oo1
 510      bras oo2
 511  oo1:jmp foo
 512  oo2:
 513 @end smallexample
 514
 515 @item fj@var{XX}
 516 This family includes
 517 @smallexample
 518  fjne   fjeq   fjge   fjlt   fjgt   fjle   fjf
 519  fjt    fjgl   fjgle  fjnge  fjngl  fjngle fjngt
 520  fjnle  fjnlt  fjoge  fjogl  fjogt  fjole  fjolt
 521  fjor   fjseq  fjsf   fjsne  fjst   fjueq  fjuge
 522  fjugt  fjule  fjult  fjun
 523 @end smallexample
 524
 525 Each of these pseudo-operations always expands to a single Motorola
 526 coprocessor branch instruction, word or long.  All Motorola coprocessor
 527 branch instructions allow both word and long displacements.
 528
 529 @end table
 530
 531 @node M68K-Chars
 532 @subsection Special Characters
 533
 534 @cindex special characters, M680x0
 535 @cindex M680x0 immediate character
 536 @cindex immediate character, M680x0
 537 @cindex M680x0 line comment character
 538 @cindex line comment character, M680x0
 539 @cindex comments, M680x0
 540 The immediate character is @samp{#} for Sun compatibility.  The
 541 line-comment character is @samp{|} (unless the @samp{--bitwise-or}
 542 option is used).  If a @samp{#} appears at the beginning of a line, it
 543 is treated as a comment unless it looks like @samp{# line file}, in
 544 which case it is treated normally.
 545