1 #as: -m32rx --no-warn-explicit-parallel-conflicts --hidden -O
7 Disassembly of section .text:
10 0: 78 00 f0 00 bcl 0 <bcl> \|\| nop
13 4: 79 ff f0 00 bncl 0 <bcl> \|\| nop
16 8: 00 7d f0 00 cmpz fp \|\| nop
19 c: 0d 6d f0 00 cmpeq fp,fp \|\| nop
22 10: 5d cd f0 00 maclh1 fp,fp \|\| nop
25 14: 5d dd f0 00 msblo fp,fp \|\| nop
28 18: 5d ad f0 00 mulwu1 fp,fp \|\| nop
31 1c: 5d bd f0 00 macwu1 fp,fp \|\| nop
34 20: 50 e4 f0 00 sadd \|\| nop
37 24: 8d 6d 03 00 satb fp,fp
40 28: 3d 8d f0 00 mulhi fp,fp,a1 \|\| nop
43 2c: 3d 1d f0 00 mullo fp,fp \|\| nop
46 30: 9d 0d 00 10 divh fp,fp
49 34: 3d cd f0 00 machi fp,fp,a1 \|\| nop
52 38: 3d 5d f0 00 maclo fp,fp \|\| nop
55 3c: 5d f4 f0 00 mvfachi fp,a1 \|\| nop
58 40: 5d f6 f0 00 mvfacmi fp,a1 \|\| nop
61 44: 5d f5 f0 00 mvfaclo fp,a1 \|\| nop
64 48: 5d 74 f0 00 mvtachi fp,a1 \|\| nop
67 4c: 5d 71 f0 00 mvtaclo fp \|\| nop
70 50: 54 90 f0 00 rac a1 \|\| nop
73 54: 54 90 f0 00 rac a1 \|\| nop
76 58: 50 94 f0 00 rac a0,a1 \|\| nop
79 5c: 54 80 f0 00 rach a1 \|\| nop
82 60: 50 84 f0 00 rach a0,a1 \|\| nop
85 64: 54 81 f0 00 rach a1,a0,#0x2 \|\| nop
88 68: 7c e6 8d ad bc 0 <bcl> \|\| add fp,fp
89 6c: 7c e5 0d ad bc 0 <bcl> -> add fp,fp
92 70: 78 e4 cd 4d bcl 0 <bcl> \|\| addi fp,#77
93 74: 78 e3 cd 4d bcl 0 <bcl> \|\| addi fp,#77
96 78: 7e e2 8d 8d bl 0 <bcl> \|\| addv fp,fp
97 7c: 7e e1 8d 8d bl 0 <bcl> \|\| addv fp,fp
100 80: 7d e0 8d 9d bnc 0 <bcl> \|\| addx fp,fp
101 84: 7d df 0d 9d bnc 0 <bcl> -> addx fp,fp
104 88: 79 de 8d cd bncl 0 <bcl> \|\| and fp,fp
105 8c: 0d cd 79 dd and fp,fp -> bncl 0 <bcl>
108 90: 7f dc 8d 4d bra 0 <bcl> \|\| cmp fp,fp
109 94: 7f db 8d 4d bra 0 <bcl> \|\| cmp fp,fp
112 98: 1e cd 8d 6d jl fp \|\| cmpeq fp,fp
113 9c: 1e cd 8d 6d jl fp \|\| cmpeq fp,fp
116 a0: 1f cd 8d 5d jmp fp \|\| cmpu fp,fp
117 a4: 1f cd 8d 5d jmp fp \|\| cmpu fp,fp
120 a8: 2d cd 80 71 ld fp,@fp \|\| cmpz r1
121 ac: 2d cd 80 71 ld fp,@fp \|\| cmpz r1
124 b0: 2d e1 e2 4d ld fp,@r1\+ \|\| ldi r2,#77
125 b4: 2d e1 e2 4d ld fp,@r1\+ \|\| ldi r2,#77
128 b8: 2d 8d 92 8d ldb fp,@fp \|\| mv r2,fp
129 bc: 2d 8d 12 8d ldb fp,@fp -> mv r2,fp
132 c0: 2d ad 82 3d ldh fp,@fp \|\| neg r2,fp
133 c4: 2d ad 02 3d ldh fp,@fp -> neg r2,fp
136 c8: 2d 9d f0 00 ldub fp,@fp \|\| nop
137 cc: 2d 9d f0 00 ldub fp,@fp \|\| nop
140 d0: 2d bd 82 bd lduh fp,@fp \|\| not r2,fp
141 d4: 2d bd 02 bd lduh fp,@fp -> not r2,fp
144 d8: 2d dd 82 ed lock fp,@fp \|\| or r2,fp
145 dc: 2d dd 02 ed lock fp,@fp -> or r2,fp
148 e0: 1d 91 82 2d mvfc fp,cbr \|\| sub r2,fp
149 e4: 1d 91 02 2d mvfc fp,cbr -> sub r2,fp
152 e8: 12 ad 82 0d mvtc fp,spi \|\| subv r2,fp
153 ec: 12 ad 82 0d mvtc fp,spi \|\| subv r2,fp
156 f0: 10 d6 82 2d rte \|\| sub r2,fp
157 f4: 10 d6 02 1d rte -> subx r2,fp
160 f8: 1d 41 82 dd sll fp,r1 \|\| xor r2,fp
161 fc: 1d 41 02 dd sll fp,r1 -> xor r2,fp
163 0+0100 <slli__machi>:
164 100: 5d 56 b2 4d slli fp,#0x16 \|\| machi r2,fp
165 104: 5d 56 32 4d slli fp,#0x16 -> machi r2,fp
167 0+0108 <sra__maclh1>:
168 108: 1d 2d d2 cd sra fp,fp \|\| maclh1 r2,fp
169 10c: 1d 2d 52 cd sra fp,fp -> maclh1 r2,fp
171 0+0110 <srai__maclo>:
172 110: 5d 36 b2 5d srai fp,#0x16 \|\| maclo r2,fp
173 114: 5d 36 32 5d srai fp,#0x16 -> maclo r2,fp
175 0+0118 <srl__macwhi>:
176 118: 1d 0d b2 6d srl fp,fp \|\| macwhi r2,fp
177 11c: 1d 0d 32 6d srl fp,fp -> macwhi r2,fp
179 0+0120 <srli__macwlo>:
180 120: 5d 16 b2 7d srli fp,#0x16 \|\| macwlo r2,fp
181 124: 5d 16 32 7d srli fp,#0x16 -> macwlo r2,fp
184 128: 2d 4d d2 bd st fp,@fp \|\| macwu1 r2,fp
185 12c: 2d 4d d2 bd st fp,@fp \|\| macwu1 r2,fp
188 130: 2d 6d d2 dd st fp,@\+fp \|\| msblo r2,fp
189 134: 2d 6d 52 dd st fp,@\+fp -> msblo r2,fp
192 138: 2d 7d 92 6d st fp,@-fp \|\| mul r2,fp
193 13c: 2d 7d 12 6d st fp,@-fp -> mul r2,fp
196 140: 2d 0d b2 0d stb fp,@fp \|\| mulhi r2,fp
197 144: 2d 0d b2 0d stb fp,@fp \|\| mulhi r2,fp
200 148: 2d 2d b2 1d sth fp,@fp \|\| mullo r2,fp
201 14c: 2d 2d b2 1d sth fp,@fp \|\| mullo r2,fp
203 0+0150 <trap__mulwhi>:
204 150: 10 f2 b2 2d trap #0x2 \|\| mulwhi r2,fp
205 154: 10 f2 f0 00 trap #0x2 \|\| nop
206 158: 32 2d f0 00 mulwhi r2,fp \|\| nop
208 0+015c <unlock__mulwlo>:
209 15c: 2d 5d b2 3d unlock fp,@fp \|\| mulwlo r2,fp
210 160: 2d 5d b2 3d unlock fp,@fp \|\| mulwlo r2,fp
212 0+0164 <add__mulwu1>:
213 164: 0d ad d2 ad add fp,fp \|\| mulwu1 r2,fp
214 168: 0d ad 52 ad add fp,fp -> mulwu1 r2,fp
216 0+016c <addi__mvfachi>:
217 16c: 4d 4d d2 f0 addi fp,#77 \|\| mvfachi r2
218 170: 4d 4d d2 f0 addi fp,#77 \|\| mvfachi r2
220 0+0174 <addv__mvfaclo>:
221 174: 0d 8d d2 f5 addv fp,fp \|\| mvfaclo r2,a1
222 178: 0d 8d d2 f5 addv fp,fp \|\| mvfaclo r2,a1
224 0+017c <addx__mvfacmi>:
225 17c: 0d 9d d2 f2 addx fp,fp \|\| mvfacmi r2
226 180: 0d 9d d2 f2 addx fp,fp \|\| mvfacmi r2
228 0+0184 <and__mvtachi>:
229 184: 0d cd d2 70 and fp,fp \|\| mvtachi r2
230 188: 0d cd d2 70 and fp,fp \|\| mvtachi r2
232 0+018c <cmp__mvtaclo>:
233 18c: 0d 4d d2 71 cmp fp,fp \|\| mvtaclo r2
234 190: 0d 4d d2 71 cmp fp,fp \|\| mvtaclo r2
237 194: 0d 6d d4 90 cmpeq fp,fp \|\| rac a1
238 198: 0d 6d d4 90 cmpeq fp,fp \|\| rac a1
241 19c: 0d 5d d0 84 cmpu fp,fp \|\| rach a0,a1
242 1a0: 0d 5d d4 84 cmpu fp,fp \|\| rach a1,a1
245 1a4: 00 7d d0 e4 cmpz fp \|\| sadd
246 1a8: 00 7d d0 e4 cmpz fp \|\| sadd
249 1ac: 74 01 d0 e4 sc \|\| sadd
252 1b0: 75 01 d0 e4 snc \|\| sadd
255 1b4: 1c cd f0 00 jc fp \|\| nop
258 1b8: 1d cd f0 00 jnc fp \|\| nop
261 1bc: 03 7d f0 00 pcmpbz fp \|\| nop
264 1c0: 8d 6d 00 00 sat fp,fp
267 1c4: 8d 6d 02 00 sath fp,fp
270 1c8: 1c cd 83 7d jc fp \|\| pcmpbz fp
271 1cc: 1c cd 03 7d jc fp -> pcmpbz fp
274 1d0: 1d cd ed 4d jnc fp \|\| ldi fp,#77
275 1d4: 1d cd 6d 4d jnc fp -> ldi fp,#77
278 1d8: 74 01 9d 82 sc \|\| mv fp,r2
279 1dc: 74 01 9d 82 sc \|\| mv fp,r2
282 1e0: 75 01 8d 32 snc \|\| neg fp,r2
283 1e4: 75 01 8d 32 snc \|\| neg fp,r2
286 1e8: 70 00 d0 e4 nop \|\| sadd
289 1ec: 70 00 d0 e4 nop \|\| sadd
291 0+01f0 <sadd__nop_reverse>:
292 1f0: 70 00 d0 e4 nop \|\| sadd
295 1f4: 00 a1 83 b5 add r0,r1 \|\| not r3,r5
297 0+01f8 <add__not_dest_clash>:
298 1f8: 03 a4 03 b5 add r3,r4 -> not r3,r5
300 0+01fc <add__not__src_clash>:
301 1fc: 03 a4 05 b3 add r3,r4 -> not r5,r3
303 0+0200 <add__not__no_clash>:
304 200: 03 a4 84 b5 add r3,r4 \|\| not r4,r5
307 204: 13 24 91 62 sra r3,r4 \|\| mul r1,r2
309 0+0208 <mul__sra__reverse_src_clash>:
310 208: 13 24 91 63 sra r3,r4 \|\| mul r1,r3
313 20c: 7c 04 01 a2 bc 21c <label> -> add r1,r2
316 210: 7c 03 83 a4 bc 21c <label> \|\| add r3,r4
318 0+0214 <bc__add__forced_parallel>:
319 214: 7c 02 85 a6 bc 21c <label> \|\| add r5,r6
321 0+0218 <add__bc__forced_parallel>:
322 218: 7c 01 87 a8 bc 21c <label> \|\| add r7,r8
325 21c: 70 00 f0 00 nop \|\| nop
328 220: 3d 2d 3d ad mulwhi fp,fp -> mulwhi fp,fp,a1
331 224: 3d 3d 3d bd mulwlo fp,fp -> mulwlo fp,fp,a1
334 228: 3d 6d 3d ed macwhi fp,fp -> macwhi fp,fp,a1
337 22c: 3d 7d 3d fd macwlo fp,fp -> macwlo fp,fp,a1