1 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
3 * config/visium/visium.md (nop): Tweak comment.
4 (hazard_nop): Likewise.
6 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
8 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
9 -mspeculate-indirect-jumps.
10 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
11 for -mno-speculate-indirect-jumps.
12 (*call_indirect_elfv2<mode>_nospec): New define_insn.
13 (*call_value_indirect_elfv2<mode>): Disable for
14 -mno-speculate-indirect-jumps.
15 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
16 (indirect_jump): Emit different RTL for
17 -mno-speculate-indirect-jumps.
18 (*indirect_jump<mode>): Disable for
19 -mno-speculate-indirect-jumps.
20 (*indirect_jump<mode>_nospec): New define_insn.
21 (tablejump): Emit different RTL for
22 -mno-speculate-indirect-jumps.
23 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
24 (tablejumpsi_nospec): New define_expand.
25 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
26 (tablejumpdi_nospec): New define_expand.
27 (*tablejump<mode>_internal1): Disable for
28 -mno-speculate-indirect-jumps.
29 (*tablejump<mode>_internal1_nospec): New define_insn.
30 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
33 2018-01-16 Artyom Skrobov tyomitch@gmail.com
35 * caller-save.c (insert_save): Drop unnecessary parameter. All
38 2018-01-16 Jakub Jelinek <jakub@redhat.com>
39 Richard Biener <rguenth@suse.de>
42 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
43 return early, inline manually is_gimple_sizepos. Make sure if we
44 call gimplify_expr we don't end up with a gimple constant.
45 * tree.c (variably_modified_type_p): Don't return true for
46 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
47 * gimplify.h (is_gimple_sizepos): Remove.
49 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
51 PR tree-optimization/83857
52 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
53 vectorizable_live_operation for pure SLP statements.
54 (vectorizable_live_operation): Handle PHIs.
56 2018-01-16 Richard Biener <rguenther@suse.de>
58 PR tree-optimization/83867
59 * tree-vect-stmts.c (vect_transform_stmt): Precompute
60 nested_in_vect_loop_p since the scalar stmt may get invalidated.
62 2018-01-16 Jakub Jelinek <jakub@redhat.com>
65 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
66 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
67 If off is not INTEGER_CST, issue a may not be aligned warning
68 rather than isn't aligned. Use isn%'t rather than isn't.
69 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
71 <case MULT_EXPR>: Improve the case when bottom and one of the
72 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
73 operand, in that case check if the other operand is multiple of
74 bottom divided by the INTEGER_CST operand.
76 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
79 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
80 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
81 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
82 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
83 * config/pa/pa.c (pa_function_arg_advance): Likewise.
84 (pa_function_arg, pa_arg_partial_bytes): Likewise.
85 (pa_function_arg_size): New function.
87 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
89 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
90 in a separate statement.
92 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
94 PR tree-optimization/83847
95 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
96 group gathers and scatters.
98 2018-01-16 Jakub Jelinek <jakub@redhat.com>
100 PR rtl-optimization/86620
101 * params.def (max-sched-ready-insns): Bump minimum value to 1.
103 PR rtl-optimization/83213
104 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
105 to last if both are JUMP_INSNs.
107 PR tree-optimization/83843
108 * gimple-ssa-store-merging.c
109 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
110 store_immediate_info for bswap/nop orig_stores.
112 2018-01-15 Andrew Waterman <andrew@sifive.com>
114 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
116 <UDIV>: Increase cost if !TARGET_DIV.
118 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
120 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
121 (define_attr "cr_logical_3op"): New.
122 (cceq_ior_compare): Adjust.
123 (cceq_ior_compare_complement): Adjust.
124 (*cceq_rev_compare): Adjust.
125 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
126 (is_cracked_insn): Adjust.
127 (insn_must_be_first_in_group): Adjust.
128 * config/rs6000/40x.md: Adjust.
129 * config/rs6000/440.md: Adjust.
130 * config/rs6000/476.md: Adjust.
131 * config/rs6000/601.md: Adjust.
132 * config/rs6000/603.md: Adjust.
133 * config/rs6000/6xx.md: Adjust.
134 * config/rs6000/7450.md: Adjust.
135 * config/rs6000/7xx.md: Adjust.
136 * config/rs6000/8540.md: Adjust.
137 * config/rs6000/cell.md: Adjust.
138 * config/rs6000/e300c2c3.md: Adjust.
139 * config/rs6000/e500mc.md: Adjust.
140 * config/rs6000/e500mc64.md: Adjust.
141 * config/rs6000/e5500.md: Adjust.
142 * config/rs6000/e6500.md: Adjust.
143 * config/rs6000/mpc.md: Adjust.
144 * config/rs6000/power4.md: Adjust.
145 * config/rs6000/power5.md: Adjust.
146 * config/rs6000/power6.md: Adjust.
147 * config/rs6000/power7.md: Adjust.
148 * config/rs6000/power8.md: Adjust.
149 * config/rs6000/power9.md: Adjust.
150 * config/rs6000/rs64.md: Adjust.
151 * config/rs6000/titan.md: Adjust.
153 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
155 * config/i386/predicates.md (indirect_branch_operand): Rewrite
156 ix86_indirect_branch_register logic.
158 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
160 * config/i386/constraints.md (Bs): Update
161 ix86_indirect_branch_register check. Don't check
162 ix86_indirect_branch_register with GOT_memory_operand.
164 * config/i386/predicates.md (GOT_memory_operand): Don't check
165 ix86_indirect_branch_register here.
166 (GOT32_symbol_operand): Likewise.
168 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
170 * config/i386/predicates.md (constant_call_address_operand):
171 Rewrite ix86_indirect_branch_register logic.
172 (sibcall_insn_operand): Likewise.
174 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
176 * config/i386/constraints.md (Bs): Replace
177 ix86_indirect_branch_thunk_register with
178 ix86_indirect_branch_register.
180 * config/i386/i386.md (indirect_jump): Likewise.
181 (tablejump): Likewise.
182 (*sibcall_memory): Likewise.
183 (*sibcall_value_memory): Likewise.
184 Peepholes of indirect call and jump via memory: Likewise.
185 * config/i386/i386.opt: Likewise.
186 * config/i386/predicates.md (indirect_branch_operand): Likewise.
187 (GOT_memory_operand): Likewise.
188 (call_insn_operand): Likewise.
189 (sibcall_insn_operand): Likewise.
190 (GOT32_symbol_operand): Likewise.
192 2018-01-15 Jakub Jelinek <jakub@redhat.com>
195 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
196 type rather than type addr's type points to.
197 (expand_omp_atomic_mutex): Likewise.
198 (expand_omp_atomic): Likewise.
200 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
203 * config/i386/i386.c (output_indirect_thunk_function): Use
204 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
205 for __x86_return_thunk.
207 2018-01-15 Richard Biener <rguenther@suse.de>
210 * expmed.c (extract_bit_field_1): Fix typo.
212 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
215 * config/arm/iterators.md (VF): New mode iterator.
216 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
217 Remove integer-related logic from pattern.
218 (neon_vabd<mode>_3): Likewise.
220 2018-01-15 Jakub Jelinek <jakub@redhat.com>
223 * common.opt (fstrict-overflow): No longer an alias.
224 (fwrapv-pointer): New option.
225 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
226 also for pointer types based on flag_wrapv_pointer.
227 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
228 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
229 opts->x_flag_wrapv got set.
230 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
231 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
232 POINTER_TYPE_OVERFLOW_UNDEFINED.
233 * match.pd: Likewise in address comparison pattern.
234 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
236 2018-01-15 Richard Biener <rguenther@suse.de>
239 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
240 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
241 Reset type names to their identifier if their TYPE_DECL doesn't
242 have linkage (and thus is used for ODR and devirt).
243 (save_debug_info_for_decl): Remove.
244 (save_debug_info_for_type): Likewise.
245 (add_tree_to_fld_list): Adjust.
246 * tree-pretty-print.c (dump_generic_node): Make dumping of
247 type names more robust.
249 2018-01-15 Richard Biener <rguenther@suse.de>
251 * BASE-VER: Bump to 8.0.1.
253 2018-01-14 Martin Sebor <msebor@redhat.com>
256 * builtins.c (check_access): Avoid warning when the no-warning bit
259 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
261 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
262 * ira-color (allocno_hard_regs_compare): Likewise.
264 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
267 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
268 Use .pushsection/.popsection.
270 2018-01-14 Martin Sebor <msebor@redhat.com>
273 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
275 2018-01-14 Jakub Jelinek <jakub@redhat.com>
277 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
278 entry from extra_headers.
279 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
280 extra_headers, make the list bitwise identical to the i?86-*-* one.
282 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
284 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
285 -mcmodel=large with -mindirect-branch=thunk,
286 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
287 -mfunction-return=thunk-extern.
288 * doc/invoke.texi: Document -mcmodel=large is incompatible with
289 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
290 -mfunction-return=thunk and -mfunction-return=thunk-extern.
292 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
294 * config/i386/i386.c (print_reg): Print the name of the full
295 integer register without '%'.
296 (ix86_print_operand): Handle 'V'.
297 * doc/extend.texi: Document 'V' modifier.
299 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
301 * config/i386/constraints.md (Bs): Disallow memory operand for
302 -mindirect-branch-register.
304 * config/i386/predicates.md (indirect_branch_operand): Likewise.
305 (GOT_memory_operand): Likewise.
306 (call_insn_operand): Likewise.
307 (sibcall_insn_operand): Likewise.
308 (GOT32_symbol_operand): Likewise.
309 * config/i386/i386.md (indirect_jump): Call convert_memory_address
310 for -mindirect-branch-register.
311 (tablejump): Likewise.
312 (*sibcall_memory): Likewise.
313 (*sibcall_value_memory): Likewise.
314 Disallow peepholes of indirect call and jump via memory for
315 -mindirect-branch-register.
316 (*call_pop): Replace m with Bw.
317 (*call_value_pop): Likewise.
318 (*sibcall_pop_memory): Replace m with Bs.
319 * config/i386/i386.opt (mindirect-branch-register): New option.
320 * doc/invoke.texi: Document -mindirect-branch-register option.
322 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
324 * config/i386/i386-protos.h (ix86_output_function_return): New.
325 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
326 set function_return_type.
327 (indirect_thunk_name): Add ret_p to indicate thunk for function
329 (output_indirect_thunk_function): Pass false to
331 (ix86_output_indirect_branch_via_reg): Likewise.
332 (ix86_output_indirect_branch_via_push): Likewise.
333 (output_indirect_thunk_function): Create alias for function
334 return thunk if regno < 0.
335 (ix86_output_function_return): New function.
336 (ix86_handle_fndecl_attribute): Handle function_return.
337 (ix86_attribute_table): Add function_return.
338 * config/i386/i386.h (machine_function): Add
339 function_return_type.
340 * config/i386/i386.md (simple_return_internal): Use
341 ix86_output_function_return.
342 (simple_return_internal_long): Likewise.
343 * config/i386/i386.opt (mfunction-return=): New option.
344 (indirect_branch): Mention -mfunction-return=.
345 * doc/extend.texi: Document function_return function attribute.
346 * doc/invoke.texi: Document -mfunction-return= option.
348 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
350 * config/i386/i386-opts.h (indirect_branch): New.
351 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
352 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
353 with local indirect jump when converting indirect call and jump.
354 (ix86_set_indirect_branch_type): New.
355 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
356 (indirectlabelno): New.
357 (indirect_thunk_needed): Likewise.
358 (indirect_thunk_bnd_needed): Likewise.
359 (indirect_thunks_used): Likewise.
360 (indirect_thunks_bnd_used): Likewise.
361 (INDIRECT_LABEL): Likewise.
362 (indirect_thunk_name): Likewise.
363 (output_indirect_thunk): Likewise.
364 (output_indirect_thunk_function): Likewise.
365 (ix86_output_indirect_branch_via_reg): Likewise.
366 (ix86_output_indirect_branch_via_push): Likewise.
367 (ix86_output_indirect_branch): Likewise.
368 (ix86_output_indirect_jmp): Likewise.
369 (ix86_code_end): Call output_indirect_thunk_function if needed.
370 (ix86_output_call_insn): Call ix86_output_indirect_branch if
372 (ix86_handle_fndecl_attribute): Handle indirect_branch.
373 (ix86_attribute_table): Add indirect_branch.
374 * config/i386/i386.h (machine_function): Add indirect_branch_type
375 and has_local_indirect_jump.
376 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
378 (tablejump): Likewise.
379 (*indirect_jump): Use ix86_output_indirect_jmp.
380 (*tablejump_1): Likewise.
381 (simple_return_indirect_internal): Likewise.
382 * config/i386/i386.opt (mindirect-branch=): New option.
383 (indirect_branch): New.
386 (thunk-inline): Likewise.
387 (thunk-extern): Likewise.
388 * doc/extend.texi: Document indirect_branch function attribute.
389 * doc/invoke.texi: Document -mindirect-branch= option.
391 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
394 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
396 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
398 * ipa-inline.c (want_inline_small_function_p): Return false if
399 inlining has already failed with CIF_FINAL_ERROR.
400 (update_caller_keys): Call want_inline_small_function_p before
402 (update_callee_keys): Likewise.
404 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
406 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
408 (rs6000_quadword_masked_address_p): Likewise.
409 (quad_aligned_load_p): Likewise.
410 (quad_aligned_store_p): Likewise.
411 (const_load_sequence_p): Add comment to describe the outer-most loop.
412 (mimic_memory_attributes_and_flags): New function.
413 (rs6000_gen_stvx): Likewise.
414 (replace_swapped_aligned_store): Likewise.
415 (rs6000_gen_lvx): Likewise.
416 (replace_swapped_aligned_load): Likewise.
417 (replace_swapped_load_constant): Capitalize argument name in
418 comment describing this function.
419 (rs6000_analyze_swaps): Add a third pass to search for vector loads
420 and stores that access quad-word aligned addresses and replace
421 with stvx or lvx instructions when appropriate.
422 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
423 New function prototype.
424 (rs6000_quadword_masked_address_p): Likewise.
425 (rs6000_gen_lvx): Likewise.
426 (rs6000_gen_stvx): Likewise.
427 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
428 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
429 when memory address is aligned.
430 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
431 this split to select lvx instruction when memory address is aligned.
432 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
433 instruction when memory address is aligned.
434 (*vsx_le_perm_load_v16qi): Likewise.
435 (four unnamed splitters): Modify to select the stvx instruction
436 when memory is aligned.
438 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
440 * predict.c (determine_unlikely_bbs): Handle correctly BBs
441 which appears in the queue multiple times.
443 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
444 Alan Hayward <alan.hayward@arm.com>
445 David Sherwood <david.sherwood@arm.com>
447 * tree-vectorizer.h (vec_lower_bound): New structure.
448 (_loop_vec_info): Add check_nonzero and lower_bounds.
449 (LOOP_VINFO_CHECK_NONZERO): New macro.
450 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
451 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
452 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
453 fields. Make seg_len the distance travelled, not including the
455 (dr_direction_indicator): Declare.
456 (dr_zero_step_indicator): Likewise.
457 (dr_known_forward_stride_p): Likewise.
458 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
460 (runtime_alias_check_p): Allow runtime alias checks with
462 (operator ==): Compare access_size and align.
463 (prune_runtime_alias_test_list): Rework for new distinction between
464 the access_size and seg_len.
465 (create_intersect_range_checks_index): Likewise. Cope with polynomial
467 (get_segment_min_max): New function.
468 (create_intersect_range_checks): Use it.
469 (dr_step_indicator): New function.
470 (dr_direction_indicator): Likewise.
471 (dr_zero_step_indicator): Likewise.
472 (dr_known_forward_stride_p): Likewise.
473 * tree-loop-distribution.c (data_ref_segment_size): Return
474 DR_STEP * (niters - 1).
475 (compute_alias_check_pairs): Update call to the dr_with_seg_len
477 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
478 (vect_preserves_scalar_order_p): New function, split out from...
479 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
480 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
481 (vect_vfa_access_size): New function.
482 (vect_vfa_align): Likewise.
483 (vect_compile_time_alias): Take access_size_a and access_b arguments.
484 (dump_lower_bound): New function.
485 (vect_check_lower_bound): Likewise.
486 (vect_small_gap_p): Likewise.
487 (vectorizable_with_step_bound_p): Likewise.
488 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
489 depencies if the vectorization factor is 1. Convert the checks
490 for nonzero steps into checks on the bounds of DR_STEP. Try using
491 a bunds check for variable steps if the minimum required step is
492 relatively small. Update calls to the dr_with_seg_len
493 constructor and to vect_compile_time_alias.
494 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
496 (vect_loop_versioning): Call it.
497 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
499 (vect_estimate_min_profitable_iters): Account for any bounds checks.
501 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
502 Alan Hayward <alan.hayward@arm.com>
503 David Sherwood <david.sherwood@arm.com>
505 * doc/sourcebuild.texi (vect_scatter_store): Document.
506 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
508 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
510 * genopinit.c (main): Add supports_vec_scatter_store and
511 supports_vec_scatter_store_cached to target_optabs.
512 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
513 IFN_MASK_SCATTER_STORE.
514 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
516 * internal-fn.h (internal_store_fn_p): Declare.
517 (internal_fn_stored_value_index): Likewise.
518 * internal-fn.c (scatter_store_direct): New macro.
519 (expand_scatter_store_optab_fn): New function.
520 (direct_scatter_store_optab_supported_p): New macro.
521 (internal_store_fn_p): New function.
522 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
523 IFN_MASK_SCATTER_STORE.
524 (internal_fn_mask_index): Likewise.
525 (internal_fn_stored_value_index): New function.
526 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
528 * optabs-query.h (supports_vec_scatter_store_p): Declare.
529 * optabs-query.c (supports_vec_scatter_store_p): New function.
530 * tree-vectorizer.h (vect_get_store_rhs): Declare.
531 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
532 true for scatter stores.
533 (vect_gather_scatter_fn_p): Handle scatter stores too.
534 (vect_check_gather_scatter): Consider using scatter stores if
535 supports_vec_scatter_store_p.
536 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
538 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
539 internal_fn_stored_value_index.
540 (check_load_store_masking): Handle scatter stores too.
541 (vect_get_store_rhs): Make public.
542 (vectorizable_call): Use internal_store_fn_p.
543 (vectorizable_store): Handle scatter store internal functions.
544 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
545 when deciding whether the end of the group has been reached.
546 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
547 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
548 (mask_scatter_store<mode>): New insns.
550 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
551 Alan Hayward <alan.hayward@arm.com>
552 David Sherwood <david.sherwood@arm.com>
554 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
555 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
556 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
558 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
559 Use vect_truncate_gather_scatter_offset if we can't treat the
560 operation as a normal gather load or scatter store.
561 (get_group_load_store_type): Take the gather_scatter_info
562 as argument. Try using a gather load or scatter store for
563 single-element groups.
564 (get_load_store_type): Update calls to get_group_load_store_type
565 and vect_use_strided_gather_scatters_p.
567 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
568 Alan Hayward <alan.hayward@arm.com>
569 David Sherwood <david.sherwood@arm.com>
571 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
572 optional tree argument.
573 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
575 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
576 but continue to use the current value as a fallback.
577 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
578 to compare the updates.
579 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
580 (get_load_store_type): Use it when handling a strided access.
581 (vect_get_strided_load_store_ops): New function.
582 (vect_get_data_ptr_increment): Likewise.
583 (vectorizable_load): Handle strided gather loads. Always pass
584 a step to vect_create_data_ref_ptr and bump_vector_ptr.
586 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
587 Alan Hayward <alan.hayward@arm.com>
588 David Sherwood <david.sherwood@arm.com>
590 * doc/md.texi (gather_load@var{m}): Document.
591 (mask_gather_load@var{m}): Likewise.
592 * genopinit.c (main): Add supports_vec_gather_load and
593 supports_vec_gather_load_cached to target_optabs.
594 * optabs-tree.c (init_tree_optimization_optabs): Use
595 ggc_cleared_alloc to allocate target_optabs.
596 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
597 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
599 * internal-fn.h (internal_load_fn_p): Declare.
600 (internal_gather_scatter_fn_p): Likewise.
601 (internal_fn_mask_index): Likewise.
602 (internal_gather_scatter_fn_supported_p): Likewise.
603 * internal-fn.c (gather_load_direct): New macro.
604 (expand_gather_load_optab_fn): New function.
605 (direct_gather_load_optab_supported_p): New macro.
606 (direct_internal_fn_optab): New function.
607 (internal_load_fn_p): Likewise.
608 (internal_gather_scatter_fn_p): Likewise.
609 (internal_fn_mask_index): Likewise.
610 (internal_gather_scatter_fn_supported_p): Likewise.
611 * optabs-query.c (supports_at_least_one_mode_p): New function.
612 (supports_vec_gather_load_p): Likewise.
613 * optabs-query.h (supports_vec_gather_load_p): Declare.
614 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
615 and memory_type field.
616 (NUM_PATTERNS): Bump to 15.
617 * tree-vect-data-refs.c: Include internal-fn.h.
618 (vect_gather_scatter_fn_p): New function.
619 (vect_describe_gather_scatter_call): Likewise.
620 (vect_check_gather_scatter): Try using internal functions for
621 gather loads. Recognize existing calls to a gather load function.
622 (vect_analyze_data_refs): Consider using gather loads if
623 supports_vec_gather_load_p.
624 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
625 (vect_get_gather_scatter_offset_type): Likewise.
626 (vect_convert_mask_for_vectype): Likewise.
627 (vect_add_conversion_to_patterm): Likewise.
628 (vect_try_gather_scatter_pattern): Likewise.
629 (vect_recog_gather_scatter_pattern): New pattern recognizer.
630 (vect_vect_recog_func_ptrs): Add it.
631 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
632 internal_fn_mask_index and internal_gather_scatter_fn_p.
633 (check_load_store_masking): Take the gather_scatter_info as an
634 argument and handle gather loads.
635 (vect_get_gather_scatter_ops): New function.
636 (vectorizable_call): Check internal_load_fn_p.
637 (vectorizable_load): Likewise. Handle gather load internal
639 (vectorizable_store): Update call to check_load_store_masking.
640 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
641 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
642 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
643 (aarch64_gather_scale_operand_d): New predicates.
644 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
645 (mask_gather_load<mode>): New insns.
647 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
648 Alan Hayward <alan.hayward@arm.com>
649 David Sherwood <david.sherwood@arm.com>
651 * optabs.def (fold_left_plus_optab): New optab.
652 * doc/md.texi (fold_left_plus_@var{m}): Document.
653 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
654 * internal-fn.c (fold_left_direct): Define.
655 (expand_fold_left_optab_fn): Likewise.
656 (direct_fold_left_optab_supported_p): Likewise.
657 * fold-const-call.c (fold_const_fold_left): New function.
658 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
659 * tree-parloops.c (valid_reduction_p): New function.
660 (gather_scalar_reductions): Use it.
661 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
662 (vect_finish_replace_stmt): Declare.
663 * tree-vect-loop.c (fold_left_reduction_fn): New function.
664 (needs_fold_left_reduction_p): New function, split out from...
665 (vect_is_simple_reduction): ...here. Accept reductions that
666 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
667 (vect_force_simple_reduction): Also store the reduction type in
668 the assignment's STMT_VINFO_REDUC_TYPE.
669 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
670 (merge_with_identity): New function.
671 (vect_expand_fold_left): Likewise.
672 (vectorize_fold_left_reduction): Likewise.
673 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
674 scalar phi in place for it. Check for target support and reject
675 cases that would reassociate the operation. Defer the transform
676 phase to vectorize_fold_left_reduction.
677 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
678 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
679 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
681 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
683 * tree-if-conv.c (predicate_mem_writes): Remove redundant
684 call to ifc_temp_var.
686 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
687 Alan Hayward <alan.hayward@arm.com>
688 David Sherwood <david.sherwood@arm.com>
690 * target.def (legitimize_address_displacement): Take the original
691 offset as a poly_int.
692 * targhooks.h (default_legitimize_address_displacement): Update
694 * targhooks.c (default_legitimize_address_displacement): Likewise.
695 * doc/tm.texi: Regenerate.
696 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
697 as an argument, moving assert of ad->disp == ad->disp_term to...
698 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
699 Try calling targetm.legitimize_address_displacement before expanding
700 the address rather than afterwards, and adjust for the new interface.
701 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
702 Match the new hook interface. Handle SVE addresses.
703 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
706 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
708 * Makefile.in (OBJS): Add early-remat.o.
709 * target.def (select_early_remat_modes): New hook.
710 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
711 * doc/tm.texi: Regenerate.
712 * targhooks.h (default_select_early_remat_modes): Declare.
713 * targhooks.c (default_select_early_remat_modes): New function.
714 * timevar.def (TV_EARLY_REMAT): New timevar.
715 * passes.def (pass_early_remat): New pass.
716 * tree-pass.h (make_pass_early_remat): Declare.
717 * early-remat.c: New file.
718 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
720 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
722 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
723 Alan Hayward <alan.hayward@arm.com>
724 David Sherwood <david.sherwood@arm.com>
726 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
727 vfm1 with a bound_epilog parameter.
728 (vect_do_peeling): Update calls accordingly, and move the prologue
729 call earlier in the function. Treat the base bound_epilog as 0 for
730 fully-masked loops and retain vf - 1 for other loops. Add 1 to
731 this base when peeling for gaps.
732 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
733 with fully-masked loops.
734 (vect_estimate_min_profitable_iters): Handle the single peeled
735 iteration in that case.
737 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
738 Alan Hayward <alan.hayward@arm.com>
739 David Sherwood <david.sherwood@arm.com>
741 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
742 single-element interleaving even if the size is not a power of 2.
743 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
744 accesses for single-element interleaving if the group size is
747 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
748 Alan Hayward <alan.hayward@arm.com>
749 David Sherwood <david.sherwood@arm.com>
751 * doc/md.texi (fold_extract_last_@var{m}): Document.
752 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
753 * optabs.def (fold_extract_last_optab): New optab.
754 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
755 * internal-fn.c (fold_extract_direct): New macro.
756 (expand_fold_extract_optab_fn): Likewise.
757 (direct_fold_extract_optab_supported_p): Likewise.
758 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
759 * tree-vect-loop.c (vect_model_reduction_cost): Handle
760 EXTRACT_LAST_REDUCTION.
761 (get_initial_def_for_reduction): Do not create an initial vector
762 for EXTRACT_LAST_REDUCTION reductions.
763 (vectorizable_reduction): Leave the scalar phi in place for
764 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
765 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
766 epilogue code for EXTRACT_LAST_REDUCTION and defer the
767 transform phase to vectorizable_condition.
768 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
770 (vect_finish_stmt_generation): ...here.
771 (vect_finish_replace_stmt): New function.
772 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
773 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
775 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
777 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
778 Alan Hayward <alan.hayward@arm.com>
779 David Sherwood <david.sherwood@arm.com>
781 * doc/md.texi (extract_last_@var{m}): Document.
782 * optabs.def (extract_last_optab): New optab.
783 * internal-fn.def (EXTRACT_LAST): New internal function.
784 * internal-fn.c (cond_unary_direct): New macro.
785 (expand_cond_unary_optab_fn): Likewise.
786 (direct_cond_unary_optab_supported_p): Likewise.
787 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
788 loops using EXTRACT_LAST.
789 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
790 (extract_last_<mode>): ...this optab.
791 (vec_extract<mode><Vel>): Update accordingly.
793 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
794 Alan Hayward <alan.hayward@arm.com>
795 David Sherwood <david.sherwood@arm.com>
797 * target.def (empty_mask_is_expensive): New hook.
798 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
799 * doc/tm.texi: Regenerate.
800 * targhooks.h (default_empty_mask_is_expensive): Declare.
801 * targhooks.c (default_empty_mask_is_expensive): New function.
802 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
803 if the target says that empty masks are expensive.
804 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
806 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
808 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
809 Alan Hayward <alan.hayward@arm.com>
810 David Sherwood <david.sherwood@arm.com>
812 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
813 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
814 (vect_use_loop_mask_for_alignment_p): New function.
815 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
816 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
817 niters_skip argument. Make sure that the first niters_skip elements
818 of the first iteration are inactive.
819 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
820 Update call to vect_set_loop_masks_directly.
821 (get_misalign_in_elems): New function, split out from...
822 (vect_gen_prolog_loop_niters): ...here.
823 (vect_update_init_of_dr): Take a code argument that specifies whether
824 the adjustment should be added or subtracted.
825 (vect_update_init_of_drs): Likewise.
826 (vect_prepare_for_masked_peels): New function.
827 (vect_do_peeling): Skip prologue peeling if we're using a mask
828 instead. Update call to vect_update_inits_of_drs.
829 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
831 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
832 alignment. Do not include the number of peeled iterations in
833 the minimum threshold in that case.
834 (vectorizable_induction): Adjust the start value down by
835 LOOP_VINFO_MASK_SKIP_NITERS iterations.
836 (vect_transform_loop): Call vect_prepare_for_masked_peels.
837 Take the number of skipped iterations into account when calculating
839 * tree-vect-stmts.c (vect_gen_while_not): New function.
841 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
842 Alan Hayward <alan.hayward@arm.com>
843 David Sherwood <david.sherwood@arm.com>
845 * doc/sourcebuild.texi (vect_fully_masked): Document.
846 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
848 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
850 (vect_analyze_loop_2): ...here. Don't check the vectorization
851 factor against the number of loop iterations if the loop is
854 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
855 Alan Hayward <alan.hayward@arm.com>
856 David Sherwood <david.sherwood@arm.com>
858 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
859 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
860 (dump_groups): Update accordingly.
861 (iv_use::mem_type): New member variable.
862 (address_p): New function.
863 (record_use): Add a mem_type argument and initialize the new
865 (record_group_use): Add a mem_type argument. Use address_p.
866 Remove obsolete null checks of base_object. Update call to record_use.
867 (find_interesting_uses_op): Update call to record_group_use.
868 (find_interesting_uses_cond): Likewise.
869 (find_interesting_uses_address): Likewise.
870 (get_mem_type_for_internal_fn): New function.
871 (find_address_like_use): Likewise.
872 (find_interesting_uses_stmt): Try find_address_like_use before
873 calling find_interesting_uses_op.
874 (addr_offset_valid_p): Use the iv mem_type field as the type
875 of the addressed memory.
876 (add_autoinc_candidates): Likewise.
877 (get_address_cost): Likewise.
878 (split_small_address_groups_p): Use address_p.
879 (split_address_groups): Likewise.
880 (add_iv_candidate_for_use): Likewise.
881 (autoinc_possible_for_pair): Likewise.
882 (rewrite_groups): Likewise.
883 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
884 (determine_group_iv_cost): Update after split of USE_ADDRESS.
885 (get_alias_ptr_type_for_ptr_address): New function.
886 (rewrite_use_address): Rewrite address uses in calls that were
887 identified by find_address_like_use.
889 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
890 Alan Hayward <alan.hayward@arm.com>
891 David Sherwood <david.sherwood@arm.com>
893 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
895 * gimple-expr.h (is_gimple_addressable: Likewise.
896 * gimple-expr.c (is_gimple_address): Likewise.
897 * internal-fn.c (expand_call_mem_ref): New function.
898 (expand_mask_load_optab_fn): Use it.
899 (expand_mask_store_optab_fn): Likewise.
901 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
902 Alan Hayward <alan.hayward@arm.com>
903 David Sherwood <david.sherwood@arm.com>
905 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
906 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
907 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
908 (cond_umax@var{mode}): Document.
909 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
910 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
911 (cond_umin_optab, cond_umax_optab): New optabs.
912 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
913 (COND_IOR, COND_XOR): New internal functions.
914 * internal-fn.h (get_conditional_internal_fn): Declare.
915 * internal-fn.c (cond_binary_direct): New macro.
916 (expand_cond_binary_optab_fn): Likewise.
917 (direct_cond_binary_optab_supported_p): Likewise.
918 (get_conditional_internal_fn): New function.
919 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
920 Cope with reduction statements that are vectorized as calls rather
922 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
923 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
924 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
925 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
926 (UNSPEC_COND_EOR): New unspecs.
927 (optab): Add mappings for them.
928 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
929 (sve_int_op, sve_fp_op): New int attributes.
931 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
932 Alan Hayward <alan.hayward@arm.com>
933 David Sherwood <david.sherwood@arm.com>
935 * optabs.def (while_ult_optab): New optab.
936 * doc/md.texi (while_ult@var{m}@var{n}): Document.
937 * internal-fn.def (WHILE_ULT): New internal function.
938 * internal-fn.h (direct_internal_fn_supported_p): New override
939 that takes two types as argument.
940 * internal-fn.c (while_direct): New macro.
941 (expand_while_optab_fn): New function.
942 (convert_optab_supported_p): Likewise.
943 (direct_while_optab_supported_p): New macro.
944 * wide-int.h (wi::udiv_ceil): New function.
945 * tree-vectorizer.h (rgroup_masks): New structure.
946 (vec_loop_masks): New typedef.
947 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
949 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
950 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
951 (vect_max_vf): New function.
952 (slpeel_make_loop_iterate_ntimes): Delete.
953 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
954 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
955 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
956 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
957 internal-fn.h, stor-layout.h and optabs-query.h.
958 (vect_set_loop_mask): New function.
959 (add_preheader_seq): Likewise.
960 (add_header_seq): Likewise.
961 (interleave_supported_p): Likewise.
962 (vect_maybe_permute_loop_masks): Likewise.
963 (vect_set_loop_masks_directly): Likewise.
964 (vect_set_loop_condition_masked): Likewise.
965 (vect_set_loop_condition_unmasked): New function, split out from
966 slpeel_make_loop_iterate_ntimes.
967 (slpeel_make_loop_iterate_ntimes): Rename to..
968 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
969 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
970 (vect_do_peeling): Update call accordingly.
971 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
973 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
974 mask_compare_type, can_fully_mask_p and fully_masked_p.
975 (release_vec_loop_masks): New function.
976 (_loop_vec_info): Use it to free the loop masks.
977 (can_produce_all_loop_masks_p): New function.
978 (vect_get_max_nscalars_per_iter): Likewise.
979 (vect_verify_full_masking): Likewise.
980 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
981 retries, and free the mask rgroups before retrying. Check loop-wide
982 reasons for disallowing fully-masked loops. Make the final decision
983 about whether use a fully-masked loop or not.
984 (vect_estimate_min_profitable_iters): Do not assume that peeling
985 for the number of iterations will be needed for fully-masked loops.
986 (vectorizable_reduction): Disable fully-masked loops.
987 (vectorizable_live_operation): Likewise.
988 (vect_halve_mask_nunits): New function.
989 (vect_double_mask_nunits): Likewise.
990 (vect_record_loop_mask): Likewise.
991 (vect_get_loop_mask): Likewise.
992 (vect_transform_loop): Handle the case in which the final loop
993 iteration might handle a partial vector. Call vect_set_loop_condition
994 instead of slpeel_make_loop_iterate_ntimes.
995 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
996 (check_load_store_masking): New function.
997 (prepare_load_store_mask): Likewise.
998 (vectorizable_store): Handle fully-masked loops.
999 (vectorizable_load): Likewise.
1000 (supportable_widening_operation): Use vect_halve_mask_nunits for
1002 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1003 (vect_gen_while): New function.
1004 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1005 (aarch64_uqdec<mode>): New insn.
1007 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1008 Alan Hayward <alan.hayward@arm.com>
1009 David Sherwood <david.sherwood@arm.com>
1011 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1012 (reduc_xor_scal_optab): New optabs.
1013 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1014 (reduc_xor_scal_@var{m}): Document.
1015 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1016 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1018 * fold-const-call.c (fold_const_call): Handle them.
1019 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1020 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1021 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1022 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1023 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1024 (UNSPEC_XORV): New unspecs.
1025 (optab): Add entries for them.
1026 (BITWISEV): New int iterator.
1027 (bit_reduc_op): New int attributes.
1029 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1030 Alan Hayward <alan.hayward@arm.com>
1031 David Sherwood <david.sherwood@arm.com>
1033 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1034 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1035 * optabs.def (vec_shl_insert_optab): New optab.
1036 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1037 (duplicate_and_interleave): Likewise.
1038 * tree-vect-loop.c: Include internal-fn.h.
1039 (neutral_op_for_slp_reduction): New function, split out from
1040 get_initial_defs_for_reduction.
1041 (get_initial_def_for_reduction): Handle option 2 for variable-length
1042 vectors by loading the neutral value into a vector and then shifting
1043 the initial value into element 0.
1044 (get_initial_defs_for_reduction): Replace the code argument with
1045 the neutral value calculated by neutral_op_for_slp_reduction.
1046 Use gimple_build_vector for constant-length vectors.
1047 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1048 but the first group_size elements have a neutral value.
1049 Use duplicate_and_interleave otherwise.
1050 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1051 Update call to get_initial_defs_for_reduction. Handle SLP
1052 reductions for variable-length vectors by creating one vector
1053 result for each scalar result, with the elements associated
1054 with other scalar results stubbed out with the neutral value.
1055 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1056 Require IFN_VEC_SHL_INSERT for double reductions on
1057 variable-length vectors, or SLP reductions that have
1058 a neutral value. Require can_duplicate_and_interleave_p
1059 support for variable-length unchained SLP reductions if there
1060 is no neutral value, such as for MIN/MAX reductions. Also require
1061 the number of vector elements to be a multiple of the number of
1062 SLP statements when doing variable-length unchained SLP reductions.
1063 Update call to vect_create_epilog_for_reduction.
1064 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1065 and remove initial values.
1066 (duplicate_and_interleave): Make public.
1067 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1068 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1070 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1071 Alan Hayward <alan.hayward@arm.com>
1072 David Sherwood <david.sherwood@arm.com>
1074 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1075 (can_duplicate_and_interleave_p): New function.
1076 (vect_get_and_check_slp_defs): Take the vector of statements
1077 rather than just the current one. Remove excess parentheses.
1078 Restriction rejectinon of vect_constant_def and vect_external_def
1079 for variable-length vectors to boolean types, or types for which
1080 can_duplicate_and_interleave_p is false.
1081 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1082 (duplicate_and_interleave): New function.
1083 (vect_get_constant_vectors): Use gimple_build_vector for
1084 constant-length vectors and suitable variable-length constant
1085 vectors. Use duplicate_and_interleave for other variable-length
1086 vectors. Don't defer the update when inserting new statements.
1088 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1089 Alan Hayward <alan.hayward@arm.com>
1090 David Sherwood <david.sherwood@arm.com>
1092 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1093 min_profitable_iters doesn't go negative.
1095 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1096 Alan Hayward <alan.hayward@arm.com>
1097 David Sherwood <david.sherwood@arm.com>
1099 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1100 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1101 * optabs.def (vec_mask_load_lanes_optab): New optab.
1102 (vec_mask_store_lanes_optab): Likewise.
1103 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1104 (MASK_STORE_LANES): Likewise.
1105 * internal-fn.c (mask_load_lanes_direct): New macro.
1106 (mask_store_lanes_direct): Likewise.
1107 (expand_mask_load_optab_fn): Handle masked operations.
1108 (expand_mask_load_lanes_optab_fn): New macro.
1109 (expand_mask_store_optab_fn): Handle masked operations.
1110 (expand_mask_store_lanes_optab_fn): New macro.
1111 (direct_mask_load_lanes_optab_supported_p): Likewise.
1112 (direct_mask_store_lanes_optab_supported_p): Likewise.
1113 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1115 (vect_load_lanes_supported): Likewise.
1116 * tree-vect-data-refs.c (strip_conversion): New function.
1117 (can_group_stmts_p): Likewise.
1118 (vect_analyze_data_ref_accesses): Use it instead of checking
1119 for a pair of assignments.
1120 (vect_store_lanes_supported): Take a masked_p parameter.
1121 (vect_load_lanes_supported): Likewise.
1122 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1123 vect_store_lanes_supported and vect_load_lanes_supported.
1124 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1125 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1126 parameter. Don't allow gaps for masked accesses.
1127 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1128 and vect_load_lanes_supported.
1129 (get_load_store_type): Take a masked_p parameter and update
1130 call to get_group_load_store_type.
1131 (vectorizable_store): Update call to get_load_store_type.
1132 Handle IFN_MASK_STORE_LANES.
1133 (vectorizable_load): Update call to get_load_store_type.
1134 Handle IFN_MASK_LOAD_LANES.
1136 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1137 Alan Hayward <alan.hayward@arm.com>
1138 David Sherwood <david.sherwood@arm.com>
1140 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1142 * config/aarch64/aarch64-protos.h
1143 (aarch64_sve_struct_memory_operand_p): Declare.
1144 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1145 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1146 (VPRED, vpred): Handle SVE structure modes.
1147 * config/aarch64/constraints.md (Utx): New constraint.
1148 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1149 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1150 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1151 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1152 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1153 structure modes. Split into pieces after RA.
1154 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1155 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1157 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1158 SVE structure modes.
1159 (aarch64_classify_address): Likewise.
1160 (sizetochar): Move earlier in file.
1161 (aarch64_print_operand): Handle SVE register lists.
1162 (aarch64_array_mode): New function.
1163 (aarch64_sve_struct_memory_operand_p): Likewise.
1164 (TARGET_ARRAY_MODE): Redefine.
1166 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1167 Alan Hayward <alan.hayward@arm.com>
1168 David Sherwood <david.sherwood@arm.com>
1170 * target.def (array_mode): New target hook.
1171 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1172 * doc/tm.texi: Regenerate.
1173 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1174 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1175 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1177 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1180 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1181 Alan Hayward <alan.hayward@arm.com>
1182 David Sherwood <david.sherwood@arm.com>
1184 * fold-const.c (fold_binary_loc): Check the argument types
1185 rather than the result type when testing for a vector operation.
1187 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1189 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1190 * doc/tm.texi: Regenerate.
1192 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1193 Alan Hayward <alan.hayward@arm.com>
1194 David Sherwood <david.sherwood@arm.com>
1196 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1197 (sve): Document new AArch64 extension.
1198 * doc/md.texi (w): Extend the description of the AArch64
1199 constraint to include SVE vectors.
1200 (Upl, Upa): Document new AArch64 predicate constraints.
1201 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1203 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1204 (msve-vector-bits=): New option.
1205 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1206 SVE when these are disabled.
1207 (sve): New extension.
1208 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1209 modes. Adjust their number of units based on aarch64_sve_vg.
1210 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1211 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1212 aarch64_addr_query_type.
1213 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1214 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1215 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1216 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1217 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1218 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1219 (aarch64_simd_imm_zero_p): Delete.
1220 (aarch64_check_zero_based_sve_index_immediate): Declare.
1221 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1222 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1223 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1224 (aarch64_sve_float_mul_immediate_p): Likewise.
1225 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1227 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1228 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1229 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1230 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1231 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1232 (aarch64_regmode_natural_size): Likewise.
1233 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1234 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1236 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1237 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1238 for VG and the SVE predicate registers.
1239 (V_ALIASES): Add a "z"-prefixed alias.
1240 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1241 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1242 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1243 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1244 (REG_CLASS_NAMES): Add entries for them.
1245 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1246 and the predicate registers.
1247 (aarch64_sve_vg): Declare.
1248 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1249 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1250 (REGMODE_NATURAL_SIZE): Define.
1251 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1253 * config/aarch64/aarch64.c: Include cfgrtl.h.
1254 (simd_immediate_info): Add a constructor for series vectors,
1255 and an associated step field.
1256 (aarch64_sve_vg): New variable.
1257 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1258 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1259 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1260 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1261 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1262 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1263 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1264 (aarch64_get_mask_mode): New functions.
1265 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1266 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1267 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1268 predicate modes and predicate registers. Explicitly restrict
1269 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1270 to store a vector mode if it is recognized by
1271 aarch64_classify_vector_mode.
1272 (aarch64_regmode_natural_size): New function.
1273 (aarch64_hard_regno_caller_save_mode): Return the original mode
1275 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1276 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1277 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1278 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1280 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1281 does not overlap dest if the function is frame-related. Handle
1283 (aarch64_split_add_offset): New function.
1284 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1285 them aarch64_add_offset.
1286 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1287 and update call to aarch64_sub_sp.
1288 (aarch64_add_cfa_expression): New function.
1289 (aarch64_expand_prologue): Pass extra temporary registers to the
1290 functions above. Handle the case in which we need to emit new
1291 DW_CFA_expressions for registers that were originally saved
1292 relative to the stack pointer, but now have to be expressed
1293 relative to the frame pointer.
1294 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1296 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1297 IP0 and IP1 values for SVE frames.
1298 (aarch64_expand_vec_series): New function.
1299 (aarch64_expand_sve_widened_duplicate): Likewise.
1300 (aarch64_expand_sve_const_vector): Likewise.
1301 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1302 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1303 into the register, rather than emitting a SET directly.
1304 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1305 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1306 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1307 (offset_9bit_signed_scaled_p): New functions.
1308 (aarch64_replicate_bitmask_imm): New function.
1309 (aarch64_bitmask_imm): Use it.
1310 (aarch64_cannot_force_const_mem): Reject expressions involving
1311 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1312 (aarch64_classify_index): Handle SVE indices, by requiring
1313 a plain register index with a scale that matches the element size.
1314 (aarch64_classify_address): Handle SVE addresses. Assert that
1315 the mode of the address is VOIDmode or an integer mode.
1316 Update call to aarch64_classify_symbol.
1317 (aarch64_classify_symbolic_expression): Update call to
1318 aarch64_classify_symbol.
1319 (aarch64_const_vec_all_in_range_p): New function.
1320 (aarch64_print_vector_float_operand): Likewise.
1321 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1322 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1323 and the FP immediates 1.0 and 0.5.
1324 (aarch64_print_address_internal): Handle SVE addresses.
1325 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1326 (aarch64_regno_regclass): Handle predicate registers.
1327 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1329 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1330 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1331 (aarch64_convert_sve_vector_bits): New function.
1332 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1333 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1335 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1336 Handle SVE vector and predicate modes. Accept VL-based constants
1337 that need only one temporary register, and VL offsets that require
1338 no temporary registers.
1339 (aarch64_conditional_register_usage): Mark the predicate registers
1340 as fixed if SVE isn't available.
1341 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1342 Return true for SVE vector and predicate modes.
1343 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1344 rather than an unsigned int. Handle SVE modes.
1345 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1347 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1349 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1350 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1351 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1352 (aarch64_sve_float_mul_immediate_p): New functions.
1353 (aarch64_sve_valid_immediate): New function.
1354 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1355 Explicitly reject structure modes. Check for INDEX constants.
1356 Handle PTRUE and PFALSE constants.
1357 (aarch64_check_zero_based_sve_index_immediate): New function.
1358 (aarch64_simd_imm_zero_p): Delete.
1359 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1360 vector modes. Accept constants in the range of CNT[BHWD].
1361 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1362 ask for an Advanced SIMD mode.
1363 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1364 (aarch64_simd_vector_alignment): Handle SVE predicates.
1365 (aarch64_vectorize_preferred_vector_alignment): New function.
1366 (aarch64_simd_vector_alignment_reachable): Use it instead of
1368 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1369 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1371 (MAX_VECT_LEN): Delete.
1372 (expand_vec_perm_d): Add a vec_flags field.
1373 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1374 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1375 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1377 (aarch64_evpc_rev): Rename to...
1378 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1379 (aarch64_evpc_rev_global): New function.
1380 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1381 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1383 (aarch64_evpc_sve_tbl): New function.
1384 (aarch64_expand_vec_perm_const_1): Update after rename of
1385 aarch64_evpc_rev. Handle SVE permutes too, trying
1386 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1387 than aarch64_evpc_tbl.
1388 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1389 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1390 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1391 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1392 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1393 (aarch64_expand_sve_vcond): New functions.
1394 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1395 of aarch64_vector_mode_p.
1396 (aarch64_dwarf_poly_indeterminate_value): New function.
1397 (aarch64_compute_pressure_classes): Likewise.
1398 (aarch64_can_change_mode_class): Likewise.
1399 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1400 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1401 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1402 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1403 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1404 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1405 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1406 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1408 (Dn, Dl, Dr): Accept const as well as const_vector.
1409 (Dz): Likewise. Compare against CONST0_RTX.
1410 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1411 of "vector" where appropriate.
1412 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1413 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1414 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1415 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1416 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1417 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1418 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1419 (v_int_equiv): Extend to SVE modes.
1420 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1422 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1423 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1424 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1425 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1426 (SVE_COND_FP_CMP): New int iterators.
1427 (perm_hilo): Handle the new unpack unspecs.
1428 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1430 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1431 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1432 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1433 (aarch64_equality_operator, aarch64_constant_vector_operand)
1434 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1435 (aarch64_sve_nonimmediate_operand): Likewise.
1436 (aarch64_sve_general_operand): Likewise.
1437 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1438 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1439 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1440 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1441 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1442 (aarch64_sve_float_arith_immediate): Likewise.
1443 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1444 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1445 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1446 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1447 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1448 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1449 (aarch64_sve_float_arith_operand): Likewise.
1450 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1451 (aarch64_sve_float_mul_operand): Likewise.
1452 (aarch64_sve_vec_perm_operand): Likewise.
1453 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1454 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1455 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1456 as well as const_vector.
1457 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1458 in file. Use CONST0_RTX and CONSTM1_RTX.
1459 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1460 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1461 Use aarch64_simd_imm_zero.
1462 * config/aarch64/aarch64-sve.md: New file.
1463 * config/aarch64/aarch64.md: Include it.
1464 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1465 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1466 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1467 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1468 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1469 (sve): New attribute.
1470 (enabled): Disable instructions with the sve attribute unless
1472 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1473 aarch64_expand_mov_immediate.
1474 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1475 CNT[BHSD] immediates.
1476 (movti): Split CONST_POLY_INT moves into two halves.
1477 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1478 Split additions that need a temporary here if the destination
1479 is the stack pointer.
1480 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1481 (*add<mode>3_poly_1): New instruction.
1482 (set_clobber_cc): New expander.
1484 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1486 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1487 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1488 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1489 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1490 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1491 Change innermode from fixed_mode_size to machine_mode.
1492 (simplify_subreg): Update call accordingly. Handle a constant-sized
1493 subreg of a variable-length CONST_VECTOR.
1495 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1496 Alan Hayward <alan.hayward@arm.com>
1497 David Sherwood <david.sherwood@arm.com>
1499 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1500 (add_offset_to_base): New function, split out from...
1501 (create_mem_ref): ...here. When handling a scale other than 1,
1502 check first whether the address is valid without the offset.
1503 Add it into the base if so, leaving the index and scale as-is.
1505 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1508 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1509 fold_for_warn before checking if arg2 is INTEGER_CST.
1511 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1513 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1514 (store_multiple_operation): Delete.
1515 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1516 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1517 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1518 guarded by TARGET_STRING.
1519 (rs6000_output_load_multiple): Delete.
1520 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1521 OPTION_MASK_STRING / TARGET_STRING handling.
1522 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1523 (const rs6000_opt_masks) <"string">: Change mask to 0.
1524 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1525 (MASK_STRING): Delete.
1526 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1528 (load_multiple): Delete.
1535 (store_multiple): Delete.
1542 (movmemsi_8reg): Delete.
1543 (corresponding unnamed define_insn): Delete.
1544 (movmemsi_6reg): Delete.
1545 (corresponding unnamed define_insn): Delete.
1546 (movmemsi_4reg): Delete.
1547 (corresponding unnamed define_insn): Delete.
1548 (movmemsi_2reg): Delete.
1549 (corresponding unnamed define_insn): Delete.
1550 (movmemsi_1reg): Delete.
1551 (corresponding unnamed define_insn): Delete.
1552 * config/rs6000/rs6000.opt (mno-string): New.
1553 (mstring): Replace by deprecation warning stub.
1554 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1556 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1558 * regrename.c (regrename_do_replace): If replacing the same
1559 reg multiple times, try to reuse last created gen_raw_REG.
1562 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1563 main to workaround a bug in GDB.
1565 2018-01-12 Tom de Vries <tom@codesourcery.com>
1568 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1570 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1572 PR rtl-optimization/80481
1573 * ira-color.c (get_cap_member): New function.
1574 (allocnos_conflict_by_live_ranges_p): Use it.
1575 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1576 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1578 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1581 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1582 (*saddl_se_1): Ditto.
1584 (*saddl_se_1): Ditto.
1586 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1588 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1589 rather than wi::to_widest for DR_INITs.
1590 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1591 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1592 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1594 (vect_analyze_group_access_1): Note that here.
1596 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1598 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1599 polynomial type sizes.
1601 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1603 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1604 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1605 (gimple_add_tmp_var): Likewise.
1607 2018-01-12 Martin Liska <mliska@suse.cz>
1609 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1610 (gimple_alloc_sizes): Likewise.
1611 (dump_gimple_statistics): Use PRIu64 in printf format.
1612 * gimple.h: Change uint64_t to int.
1614 2018-01-12 Martin Liska <mliska@suse.cz>
1616 * tree-core.h: Use uint64_t instead of int.
1617 * tree.c (tree_node_counts): Likewise.
1618 (tree_node_sizes): Likewise.
1619 (dump_tree_statistics): Use PRIu64 in printf format.
1621 2018-01-12 Martin Liska <mliska@suse.cz>
1623 * Makefile.in: As qsort_chk is implemented in vec.c, add
1624 vec.o to linkage of gencfn-macros.
1625 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1626 passing the info to record_node_allocation_statistics.
1627 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1629 * ggc-common.c (struct ggc_usage): Add operator== and use
1630 it in operator< and compare function.
1631 * mem-stats.h (struct mem_usage): Likewise.
1632 * vec.c (struct vec_usage): Remove operator< and compare
1633 function. Can be simply inherited.
1635 2018-01-12 Martin Jambor <mjambor@suse.cz>
1638 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1639 * tree-ssa-math-opts.c: Include domwalk.h.
1640 (convert_mult_to_fma_1): New function.
1641 (fma_transformation_info): New type.
1642 (fma_deferring_state): Likewise.
1643 (cancel_fma_deferring): New function.
1644 (result_of_phi): Likewise.
1645 (last_fma_candidate_feeds_initial_phi): Likewise.
1646 (convert_mult_to_fma): Added deferring logic, split actual
1647 transformation to convert_mult_to_fma_1.
1648 (math_opts_dom_walker): New type.
1649 (math_opts_dom_walker::after_dom_children): New method, body moved
1650 here from pass_optimize_widening_mul::execute, added deferring logic
1652 (pass_optimize_widening_mul::execute): Moved most of code to
1653 math_opts_dom_walker::after_dom_children.
1654 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1655 * config/i386/i386.c (ix86_option_override_internal): Added
1656 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1658 2018-01-12 Richard Biener <rguenther@suse.de>
1661 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1662 inline instance vars.
1664 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1667 * config/rx/rx.c (rx_is_restricted_memory_address):
1670 2018-01-12 Richard Biener <rguenther@suse.de>
1672 PR tree-optimization/80846
1673 * target.def (split_reduction): New target hook.
1674 * targhooks.c (default_split_reduction): New function.
1675 * targhooks.h (default_split_reduction): Declare.
1676 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1677 target requests first reduce vectors by combining low and high
1679 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1680 (get_vectype_for_scalar_type_and_size): Export.
1681 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1682 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1683 * doc/tm.texi: Regenerate.
1684 * config/i386/i386.c (ix86_split_reduction): Implement
1685 TARGET_VECTORIZE_SPLIT_REDUCTION.
1687 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1690 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1691 in PIC mode except for TARGET_VXWORKS_RTP.
1692 * config/sparc/sparc.c: Include cfgrtl.h.
1693 (TARGET_INIT_PIC_REG): Define.
1694 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1695 (sparc_pic_register_p): New predicate.
1696 (sparc_legitimate_address_p): Use it.
1697 (sparc_legitimize_pic_address): Likewise.
1698 (sparc_delegitimize_address): Likewise.
1699 (sparc_mode_dependent_address_p): Likewise.
1700 (gen_load_pcrel_sym): Remove 4th parameter.
1701 (load_got_register): Adjust call to above. Remove obsolete stuff.
1702 (sparc_expand_prologue): Do not call load_got_register here.
1703 (sparc_flat_expand_prologue): Likewise.
1704 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1705 (sparc_use_pseudo_pic_reg): New function.
1706 (sparc_init_pic_reg): Likewise.
1707 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1708 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1710 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1712 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1713 Add item for branch_cost.
1715 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1717 PR rtl-optimization/83565
1718 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1719 not extend the result to a larger mode for rotate operations.
1720 (num_sign_bit_copies1): Likewise.
1722 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1725 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1727 Use values-Xc.o for -pedantic.
1728 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1730 2018-01-12 Martin Liska <mliska@suse.cz>
1733 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1735 (possible_polymorphic_call_targets): Use it.
1736 (ipa_devirt): Likewise.
1738 2018-01-12 Martin Liska <mliska@suse.cz>
1740 * profile-count.h (enum profile_quality): Use 0 as invalid
1741 enum value of profile_quality.
1743 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1745 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1746 -mext-string options.
1748 2018-01-12 Richard Biener <rguenther@suse.de>
1750 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1751 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1752 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1754 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1756 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1758 * configure.ac (--with-long-double-format): Add support for the
1759 configuration option to change the default long double format on
1761 * config.gcc (powerpc*-linux*-*): Likewise.
1762 * configure: Regenerate.
1763 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1764 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1765 used without modification.
1767 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1769 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1770 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1771 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1772 MISC_BUILTIN_SPEC_BARRIER.
1773 (rs6000_init_builtins): Likewise.
1774 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1776 (speculation_barrier): New define_insn.
1777 * doc/extend.texi: Document __builtin_speculation_barrier.
1779 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1782 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1783 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1784 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1786 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1787 integral modes instead of "ss" and "sd".
1788 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1789 vectors with 32-bit and 64-bit elements.
1790 (vecdupssescalarmodesuffix): New mode attribute.
1791 (vec_dup<mode>): Use it.
1793 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1796 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1797 frame if argument is passed on stack.
1799 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1802 * ree.c (combine_reaching_defs): Optimize also
1803 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1804 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1806 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1809 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1811 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1814 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1815 after they are computed.
1817 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1819 PR tree-optimization/83695
1820 * gimple-loop-linterchange.cc
1821 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1822 reset cached scev information after interchange.
1823 (pass_linterchange::execute): Remove call to scev_reset_htab.
1825 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1827 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1828 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1829 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1830 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1831 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1832 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1833 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1834 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1835 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1836 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1837 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1838 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1839 (V_lane_reg): Likewise.
1840 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1842 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1843 (vfmal_lane_low<mode>_intrinsic,
1844 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1845 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1846 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1847 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1848 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1849 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1851 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1853 * config/arm/arm-cpus.in (fp16fml): New feature.
1854 (ALL_SIMD): Add fp16fml.
1855 (armv8.2-a): Add fp16fml as an option.
1856 (armv8.3-a): Likewise.
1857 (armv8.4-a): Add fp16fml as part of fp16.
1858 * config/arm/arm.h (TARGET_FP16FML): Define.
1859 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1861 * config/arm/arm-modes.def (V2HF): Define.
1862 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1863 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1864 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1865 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1866 vfmsl_low, vfmsl_high): New set of builtins.
1867 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1868 (vfml_op): New code attribute.
1869 (VFMLHALVES): New int iterator.
1870 (VFML, VFMLSEL): New mode attributes.
1871 (V_reg): Define mapping for V2HF.
1872 (V_hi, V_lo): New mode attributes.
1873 (VF_constraint): Likewise.
1874 (vfml_half, vfml_half_selector): New int attributes.
1875 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1877 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1878 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1880 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1881 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1882 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1883 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1885 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1886 Document new effective target and option set.
1888 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1890 * config/arm/arm-cpus.in (armv8_4): New feature.
1891 (ARMv8_4a): New fgroup.
1892 (armv8.4-a): New arch.
1893 * config/arm/arm-tables.opt: Regenerate.
1894 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1895 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1896 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1897 Add matching rules for -march=armv8.4-a and extensions.
1898 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1900 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1903 * config/rx/rx.md (BW): New mode attribute.
1904 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1906 2018-01-11 Richard Biener <rguenther@suse.de>
1908 PR tree-optimization/83435
1909 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1910 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1911 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1913 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1914 Alan Hayward <alan.hayward@arm.com>
1915 David Sherwood <david.sherwood@arm.com>
1917 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1919 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1920 (aarch64_print_address_internal): Use it to check for a zero offset.
1922 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1923 Alan Hayward <alan.hayward@arm.com>
1924 David Sherwood <david.sherwood@arm.com>
1926 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1927 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1928 Return a poly_int64 rather than a HOST_WIDE_INT.
1929 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1930 rather than a HOST_WIDE_INT.
1931 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1932 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1933 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1934 final_offset from HOST_WIDE_INT to poly_int64.
1935 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1936 to_constant when getting the number of units in an Advanced SIMD
1938 (aarch64_builtin_vectorized_function): Check for a constant number
1940 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1942 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1943 attribute instead of GET_MODE_NUNITS.
1944 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1945 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1946 GET_MODE_SIZE for fixed-size registers.
1947 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1948 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1949 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1950 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1951 (aarch64_print_operand, aarch64_print_address_internal)
1952 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1953 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1954 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1955 Handle polynomial GET_MODE_SIZE.
1956 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1957 wider than SImode without modification.
1958 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1959 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1960 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1961 passing and returning SVE modes.
1962 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1963 rather than GEN_INT.
1964 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1965 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1966 (aarch64_allocate_and_probe_stack_space): Likewise.
1967 (aarch64_layout_frame): Cope with polynomial offsets.
1968 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1969 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1971 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1972 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1973 poly_int64 rather than a HOST_WIDE_INT.
1974 (aarch64_get_separate_components, aarch64_process_components)
1975 (aarch64_expand_prologue, aarch64_expand_epilogue)
1976 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1977 (aarch64_anchor_offset): New function, split out from...
1978 (aarch64_legitimize_address): ...here.
1979 (aarch64_builtin_vectorization_cost): Handle polynomial
1980 TYPE_VECTOR_SUBPARTS.
1981 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1983 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1984 number of elements from the PARALLEL rather than the mode.
1985 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1986 rather than GET_MODE_BITSIZE.
1987 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1988 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1989 (aarch64_expand_vec_perm_const_1): Handle polynomial
1990 d->perm.length () and d->perm elements.
1991 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
1992 Apply to_constant to d->perm elements.
1993 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1994 polynomial CONST_VECTOR_NUNITS.
1995 (aarch64_move_pointer): Take amount as a poly_int64 rather
1997 (aarch64_progress_pointer): Avoid temporary variable.
1998 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1999 the mode attribute instead of GET_MODE.
2001 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2002 Alan Hayward <alan.hayward@arm.com>
2003 David Sherwood <david.sherwood@arm.com>
2005 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2006 x exists before using it.
2007 (aarch64_add_constant_internal): Rename to...
2008 (aarch64_add_offset_1): ...this. Replace regnum with separate
2009 src and dest rtxes. Handle the case in which they're different,
2010 including when the offset is zero. Replace scratchreg with an rtx.
2011 Use 2 additions if there is no spare register into which we can
2012 move a 16-bit constant.
2013 (aarch64_add_constant): Delete.
2014 (aarch64_add_offset): Replace reg with separate src and dest
2015 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2016 Use aarch64_add_offset_1.
2017 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2018 an rtx rather than an int. Take the delta as a poly_int64
2019 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2020 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2021 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2022 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2023 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2025 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2026 aarch64_add_constant.
2028 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2030 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2031 Use scalar_float_mode.
2033 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2035 * config/aarch64/aarch64-simd.md
2036 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2037 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2038 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2039 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2040 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2041 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2042 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2043 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2044 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2045 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2047 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2050 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2051 targ_options->x_arm_arch_string is non NULL.
2053 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2055 * config/aarch64/aarch64.h
2056 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2058 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2061 * expmed.c (emit_store_flag_force): Swap if const op0
2062 and change VOIDmode to mode of op0.
2064 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2066 PR rtl-optimization/83761
2067 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2068 than bytes to mode_for_size.
2070 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2073 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2074 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2077 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2080 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2081 when in layout mode.
2082 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2083 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2086 2018-01-10 Michael Collison <michael.collison@arm.com>
2088 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2089 * config/aarch64/aarch64-option-extension.def: Add
2090 AARCH64_OPT_EXTENSION of 'fp16fml'.
2091 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2092 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2093 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2094 * config/aarch64/constraints.md (Ui7): New constraint.
2095 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2096 (VFMLA_SEL_W): Ditto.
2099 (VFMLA16_LOW): New int iterator.
2100 (VFMLA16_HIGH): Ditto.
2101 (UNSPEC_FMLAL): New unspec.
2102 (UNSPEC_FMLSL): Ditto.
2103 (UNSPEC_FMLAL2): Ditto.
2104 (UNSPEC_FMLSL2): Ditto.
2105 (f16mac): New code attribute.
2106 * config/aarch64/aarch64-simd-builtins.def
2107 (aarch64_fmlal_lowv2sf): Ditto.
2108 (aarch64_fmlsl_lowv2sf): Ditto.
2109 (aarch64_fmlalq_lowv4sf): Ditto.
2110 (aarch64_fmlslq_lowv4sf): Ditto.
2111 (aarch64_fmlal_highv2sf): Ditto.
2112 (aarch64_fmlsl_highv2sf): Ditto.
2113 (aarch64_fmlalq_highv4sf): Ditto.
2114 (aarch64_fmlslq_highv4sf): Ditto.
2115 (aarch64_fmlal_lane_lowv2sf): Ditto.
2116 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2117 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2118 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2119 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2120 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2121 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2122 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2123 (aarch64_fmlal_lane_highv2sf): Ditto.
2124 (aarch64_fmlsl_lane_highv2sf): Ditto.
2125 (aarch64_fmlal_laneq_highv2sf): Ditto.
2126 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2127 (aarch64_fmlalq_lane_highv4sf): Ditto.
2128 (aarch64_fmlsl_lane_highv4sf): Ditto.
2129 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2130 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2131 * config/aarch64/aarch64-simd.md:
2132 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2133 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2134 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2135 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2136 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2137 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2138 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2139 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2140 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2141 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2142 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2143 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2144 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2145 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2146 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2147 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2148 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2149 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2150 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2151 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2152 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2153 (vfmlsl_low_u32): Ditto.
2154 (vfmlalq_low_u32): Ditto.
2155 (vfmlslq_low_u32): Ditto.
2156 (vfmlal_high_u32): Ditto.
2157 (vfmlsl_high_u32): Ditto.
2158 (vfmlalq_high_u32): Ditto.
2159 (vfmlslq_high_u32): Ditto.
2160 (vfmlal_lane_low_u32): Ditto.
2161 (vfmlsl_lane_low_u32): Ditto.
2162 (vfmlal_laneq_low_u32): Ditto.
2163 (vfmlsl_laneq_low_u32): Ditto.
2164 (vfmlalq_lane_low_u32): Ditto.
2165 (vfmlslq_lane_low_u32): Ditto.
2166 (vfmlalq_laneq_low_u32): Ditto.
2167 (vfmlslq_laneq_low_u32): Ditto.
2168 (vfmlal_lane_high_u32): Ditto.
2169 (vfmlsl_lane_high_u32): Ditto.
2170 (vfmlal_laneq_high_u32): Ditto.
2171 (vfmlsl_laneq_high_u32): Ditto.
2172 (vfmlalq_lane_high_u32): Ditto.
2173 (vfmlslq_lane_high_u32): Ditto.
2174 (vfmlalq_laneq_high_u32): Ditto.
2175 (vfmlslq_laneq_high_u32): Ditto.
2176 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2177 (AARCH64_FL_FOR_ARCH8_4): New.
2178 (AARCH64_ISA_F16FML): New ISA flag.
2179 (TARGET_F16FML): New feature flag for fp16fml.
2180 (doc/invoke.texi): Document new fp16fml option.
2182 2018-01-10 Michael Collison <michael.collison@arm.com>
2184 * config/aarch64/aarch64-builtins.c:
2185 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2186 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2187 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2188 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2189 (AARCH64_ISA_SHA3): New ISA flag.
2190 (TARGET_SHA3): New feature flag for sha3.
2191 * config/aarch64/iterators.md (sha512_op): New int attribute.
2192 (CRYPTO_SHA512): New int iterator.
2193 (UNSPEC_SHA512H): New unspec.
2194 (UNSPEC_SHA512H2): Ditto.
2195 (UNSPEC_SHA512SU0): Ditto.
2196 (UNSPEC_SHA512SU1): Ditto.
2197 * config/aarch64/aarch64-simd-builtins.def
2198 (aarch64_crypto_sha512hqv2di): New builtin.
2199 (aarch64_crypto_sha512h2qv2di): Ditto.
2200 (aarch64_crypto_sha512su0qv2di): Ditto.
2201 (aarch64_crypto_sha512su1qv2di): Ditto.
2202 (aarch64_eor3qv8hi): Ditto.
2203 (aarch64_rax1qv2di): Ditto.
2204 (aarch64_xarqv2di): Ditto.
2205 (aarch64_bcaxqv8hi): Ditto.
2206 * config/aarch64/aarch64-simd.md:
2207 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2208 (aarch64_crypto_sha512su0qv2di): Ditto.
2209 (aarch64_crypto_sha512su1qv2di): Ditto.
2210 (aarch64_eor3qv8hi): Ditto.
2211 (aarch64_rax1qv2di): Ditto.
2212 (aarch64_xarqv2di): Ditto.
2213 (aarch64_bcaxqv8hi): Ditto.
2214 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2215 (vsha512h2q_u64): Ditto.
2216 (vsha512su0q_u64): Ditto.
2217 (vsha512su1q_u64): Ditto.
2218 (veor3q_u16): Ditto.
2219 (vrax1q_u64): Ditto.
2221 (vbcaxq_u16): Ditto.
2222 * config/arm/types.md (crypto_sha512): New type attribute.
2223 (crypto_sha3): Ditto.
2224 (doc/invoke.texi): Document new sha3 option.
2226 2018-01-10 Michael Collison <michael.collison@arm.com>
2228 * config/aarch64/aarch64-builtins.c:
2229 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2230 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2231 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2232 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2233 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2234 (AARCH64_ISA_SM4): New ISA flag.
2235 (TARGET_SM4): New feature flag for sm4.
2236 * config/aarch64/aarch64-simd-builtins.def
2237 (aarch64_sm3ss1qv4si): Ditto.
2238 (aarch64_sm3tt1aq4si): Ditto.
2239 (aarch64_sm3tt1bq4si): Ditto.
2240 (aarch64_sm3tt2aq4si): Ditto.
2241 (aarch64_sm3tt2bq4si): Ditto.
2242 (aarch64_sm3partw1qv4si): Ditto.
2243 (aarch64_sm3partw2qv4si): Ditto.
2244 (aarch64_sm4eqv4si): Ditto.
2245 (aarch64_sm4ekeyqv4si): Ditto.
2246 * config/aarch64/aarch64-simd.md:
2247 (aarch64_sm3ss1qv4si): Ditto.
2248 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2249 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2250 (aarch64_sm4eqv4si): Ditto.
2251 (aarch64_sm4ekeyqv4si): Ditto.
2252 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2253 (sm3part_op): Ditto.
2254 (CRYPTO_SM3TT): Ditto.
2255 (CRYPTO_SM3PART): Ditto.
2256 (UNSPEC_SM3SS1): New unspec.
2257 (UNSPEC_SM3TT1A): Ditto.
2258 (UNSPEC_SM3TT1B): Ditto.
2259 (UNSPEC_SM3TT2A): Ditto.
2260 (UNSPEC_SM3TT2B): Ditto.
2261 (UNSPEC_SM3PARTW1): Ditto.
2262 (UNSPEC_SM3PARTW2): Ditto.
2263 (UNSPEC_SM4E): Ditto.
2264 (UNSPEC_SM4EKEY): Ditto.
2265 * config/aarch64/constraints.md (Ui2): New constraint.
2266 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2267 * config/arm/types.md (crypto_sm3): New type attribute.
2268 (crypto_sm4): Ditto.
2269 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2270 (vsm3tt1aq_u32): Ditto.
2271 (vsm3tt1bq_u32): Ditto.
2272 (vsm3tt2aq_u32): Ditto.
2273 (vsm3tt2bq_u32): Ditto.
2274 (vsm3partw1q_u32): Ditto.
2275 (vsm3partw2q_u32): Ditto.
2276 (vsm4eq_u32): Ditto.
2277 (vsm4ekeyq_u32): Ditto.
2278 (doc/invoke.texi): Document new sm4 option.
2280 2018-01-10 Michael Collison <michael.collison@arm.com>
2282 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2283 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2284 (AARCH64_FL_FOR_ARCH8_4): New.
2285 (AARCH64_FL_V8_4): New flag.
2286 (doc/invoke.texi): Document new armv8.4-a option.
2288 2018-01-10 Michael Collison <michael.collison@arm.com>
2290 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2291 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2292 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2293 * config/aarch64/aarch64-option-extension.def: Add
2294 AARCH64_OPT_EXTENSION of 'sha2'.
2295 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2296 (crypto): Disable sha2 and aes if crypto disabled.
2297 (crypto): Enable aes and sha2 if enabled.
2298 (simd): Disable sha2 and aes if simd disabled.
2299 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2301 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2302 (TARGET_SHA2): New feature flag for sha2.
2303 (TARGET_AES): New feature flag for aes.
2304 * config/aarch64/aarch64-simd.md:
2305 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2306 conditional on TARGET_AES.
2307 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2308 (aarch64_crypto_sha1hsi): Make pattern conditional
2310 (aarch64_crypto_sha1hv4si): Ditto.
2311 (aarch64_be_crypto_sha1hv4si): Ditto.
2312 (aarch64_crypto_sha1su1v4si): Ditto.
2313 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2314 (aarch64_crypto_sha1su0v4si): Ditto.
2315 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2316 (aarch64_crypto_sha256su0v4si): Ditto.
2317 (aarch64_crypto_sha256su1v4si): Ditto.
2318 (doc/invoke.texi): Document new aes and sha2 options.
2320 2018-01-10 Martin Sebor <msebor@redhat.com>
2322 PR tree-optimization/83781
2323 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2326 2018-01-11 Martin Sebor <msebor@gmail.com>
2327 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2329 PR tree-optimization/83501
2330 PR tree-optimization/81703
2332 * tree-ssa-strlen.c (get_string_cst): Rename...
2333 (get_string_len): ...to this. Handle global constants.
2334 (handle_char_store): Adjust.
2336 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2337 Jim Wilson <jimw@sifive.com>
2339 * config/riscv/riscv-protos.h (riscv_output_return): New.
2340 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2341 (riscv_attribute_table, riscv_output_return),
2342 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2343 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2344 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2346 (riscv_expand_prologue): Add early return for naked function.
2347 (riscv_expand_epilogue): Likewise.
2348 (riscv_function_ok_for_sibcall): Return false for naked function.
2349 (riscv_set_current_function): New.
2350 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2351 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2352 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2353 * doc/extend.texi (RISC-V Function Attributes): New.
2355 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2357 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2358 check for 128-bit long double before checking TCmode.
2359 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2360 128-bit long doubles before checking TFmode or TCmode.
2361 (FLOAT128_IBM_P): Likewise.
2363 2018-01-10 Martin Sebor <msebor@redhat.com>
2365 PR tree-optimization/83671
2366 * builtins.c (c_strlen): Unconditionally return zero for the empty
2368 Use -Warray-bounds for warnings.
2369 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2370 for non-constant array indices with COMPONENT_REF, arrays of
2371 arrays, and pointers to arrays.
2372 (gimple_fold_builtin_strlen): Determine and set length range for
2373 non-constant character arrays.
2375 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2378 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2381 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2383 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2385 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2388 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2389 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2390 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2391 indexed_or_indirect_operand predicate.
2392 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2393 (*vsx_le_perm_load_v8hi): Likewise.
2394 (*vsx_le_perm_load_v16qi): Likewise.
2395 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2396 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2397 (*vsx_le_perm_store_v8hi): Likewise.
2398 (*vsx_le_perm_store_v16qi): Likewise.
2399 (eight unnamed splitters): Likewise.
2401 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2403 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2404 * config/rs6000/emmintrin.h: Likewise.
2405 * config/rs6000/mmintrin.h: Likewise.
2406 * config/rs6000/xmmintrin.h: Likewise.
2408 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2411 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2413 * tree.c (tree_nop_conversion): Return true for location wrapper
2415 (maybe_wrap_with_location): New function.
2416 (selftest::check_strip_nops): New function.
2417 (selftest::test_location_wrappers): New function.
2418 (selftest::tree_c_tests): Call it.
2419 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2420 (maybe_wrap_with_location): New decl.
2421 (EXPR_LOCATION_WRAPPER_P): New macro.
2422 (location_wrapper_p): New inline function.
2423 (tree_strip_any_location_wrapper): New inline function.
2425 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2428 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2429 stack_realign_offset for the largest alignment of stack slot
2431 (ix86_find_max_used_stack_alignment): New function.
2432 (ix86_finalize_stack_frame_flags): Use it. Set
2433 max_used_stack_alignment if we don't realign stack.
2434 * config/i386/i386.h (machine_function): Add
2435 max_used_stack_alignment.
2437 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2439 * config/arm/arm.opt (-mbranch-cost): New option.
2440 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2443 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2446 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2447 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2449 2018-01-10 Richard Biener <rguenther@suse.de>
2452 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2453 early out so it also covers the case where we have a non-NULL
2456 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2458 PR tree-optimization/83753
2459 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2460 for non-strided grouped accesses if the number of elements is 1.
2462 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2465 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2466 * i386.h (TARGET_USE_GATHER): Define.
2467 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2469 2018-01-10 Martin Liska <mliska@suse.cz>
2472 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2473 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2475 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2476 CLEANUP_NO_PARTITIONING is not set.
2478 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2480 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2481 for vectors, as a partial revert of r254296.
2482 * rtl.h (const_vec_p): Delete.
2483 (const_vec_duplicate_p): Don't test for vector CONSTs.
2484 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2485 * expmed.c (make_tree): Likewise.
2488 * common.md (E, F): Use CONSTANT_P instead of checking for
2490 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2491 checking for CONST_VECTOR.
2493 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2496 * predict.c (force_edge_cold): Handle in more sane way edges
2499 2018-01-09 Carl Love <cel@us.ibm.com>
2501 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2503 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2504 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2505 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2506 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2507 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2508 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2509 * config/rs6000/rs6000-protos.h: Add extern defition for
2510 rs6000_generate_float2_double_code.
2511 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2513 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2514 (float2_v2df): Add define_expand.
2516 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2519 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2520 op_mode in the force_to_mode call.
2522 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2524 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2525 instead of checking each element individually.
2526 (aarch64_evpc_uzp): Likewise.
2527 (aarch64_evpc_zip): Likewise.
2528 (aarch64_evpc_ext): Likewise.
2529 (aarch64_evpc_rev): Likewise.
2530 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2531 instead of checking each element individually. Return true without
2533 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2534 whether all selected elements come from the same input, instead of
2535 checking each element individually. Remove calls to gen_rtx_REG,
2536 start_sequence and end_sequence and instead assert that no rtl is
2539 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2541 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2542 order of HIGH and CONST checks.
2544 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2546 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2547 if the destination isn't an SSA_NAME.
2549 2018-01-09 Richard Biener <rguenther@suse.de>
2551 PR tree-optimization/83668
2552 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2554 (canonicalize_loop_form): ... here, renamed from ...
2555 (canonicalize_loop_closed_ssa_form): ... this and amended to
2556 swap successor edges for loop exit blocks to make us use
2557 the RPO order we need for initial schedule generation.
2559 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2561 PR tree-optimization/64811
2562 * match.pd: When optimizing comparisons with Inf, avoid
2563 introducing or losing exceptions from comparisons with NaN.
2565 2018-01-09 Martin Liska <mliska@suse.cz>
2568 * asan.c (shadow_mem_size): Add gcc_assert.
2570 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2572 Don't save registers in main().
2575 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2576 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2577 * config/avr/avr.c (avr_set_current_function): Don't error if
2578 naked, OS_task or OS_main are specified at the same time.
2579 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2581 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2583 * common/config/avr/avr-common.c (avr_option_optimization_table):
2584 Switch on -mmain-is-OS_task for optimizing compilations.
2586 2018-01-09 Richard Biener <rguenther@suse.de>
2588 PR tree-optimization/83572
2589 * graphite.c: Include cfganal.h.
2590 (graphite_transform_loops): Connect infinite loops to exit
2591 and remove fake edges at the end.
2593 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2595 * ipa-inline.c (edge_badness): Revert accidental checkin.
2597 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2600 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2601 symbols; not inline clones.
2603 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2606 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2607 hard registers. Formatting fixes.
2609 PR preprocessor/83722
2610 * gcc.c (try_generate_repro): Pass
2611 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2612 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2615 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2616 Kito Cheng <kito.cheng@gmail.com>
2618 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2619 (riscv_leaf_function_p): Delete.
2620 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2622 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2624 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2626 (do_ifelse): New function.
2627 (do_isel): New function.
2628 (do_sub3): New function.
2629 (do_add3): New function.
2630 (do_load_mask_compare): New function.
2631 (do_overlap_load_compare): New function.
2632 (expand_compare_loop): New function.
2633 (expand_block_compare): Call expand_compare_loop() when appropriate.
2634 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2636 (-mblock-compare-inline-loop-limit): New option.
2638 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2641 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2642 Reverse order of second and third operands in first alternative.
2643 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2644 of first and second elements in UNSPEC_VPERMR vector.
2645 (altivec_expand_vec_perm_le): Likewise.
2647 2017-01-08 Jeff Law <law@redhat.com>
2649 PR rtl-optimizatin/81308
2650 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2651 (process_switch): If group_case_labels makes a change, then set
2653 (pass_convert_switch::execute): If a switch is converted, then
2654 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2656 PR rtl-optimization/81308
2657 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2660 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2662 PR target/83663 - Revert r255946
2663 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2664 generation for cases where splatting a value is not useful.
2665 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2666 across a vec_duplicate and a paradoxical subreg forming a vector
2667 mode to a vec_concat.
2669 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2671 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2672 -march=armv8.3-a variants.
2673 * config/arm/t-multilib: Likewise.
2674 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2676 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2678 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2680 (cceq_ior_compare_complement): Give it a name so I can use it, and
2681 change boolean_or_operator predicate to boolean_operator so it can
2682 be used to generate a crand.
2683 (eqne): New code iterator.
2684 (bd/bd_neg): New code_attrs.
2685 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2686 a single define_insn.
2687 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2688 decrement (bdnzt/bdnzf/bdzt/bdzf).
2689 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2690 with the new names of the branch decrement patterns, and added the
2691 names of the branch decrement conditional patterns.
2693 2018-01-08 Richard Biener <rguenther@suse.de>
2695 PR tree-optimization/83563
2696 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2699 2018-01-08 Richard Biener <rguenther@suse.de>
2702 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2704 2018-01-08 Richard Biener <rguenther@suse.de>
2706 PR tree-optimization/83685
2707 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2708 references to abnormals.
2710 2018-01-08 Richard Biener <rguenther@suse.de>
2713 * dwarf2out.c (output_indirect_strings): Handle empty
2714 skeleton_debug_str_hash.
2715 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2717 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2719 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2720 (emit_store_direct): Likewise.
2721 (arc_trampoline_adjust_address): Likewise.
2722 (arc_asm_trampoline_template): New function.
2723 (arc_initialize_trampoline): Use asm_trampoline_template.
2724 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2725 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2726 * config/arc/arc.md (flush_icache): Delete pattern.
2728 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2730 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2731 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2734 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2737 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2738 by not USED_FOR_TARGET.
2739 (make_pass_resolve_sw_modes): Likewise.
2741 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2743 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2746 2018-01-08 Richard Biener <rguenther@suse.de>
2749 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2751 2018-01-08 Richard Biener <rguenther@suse.de>
2754 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2756 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2759 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2760 basic blocks with a small number of successors.
2761 (convert_control_dep_chain_into_preds): Improve handling of
2763 (dump_predicates): Split apart into...
2764 (dump_pred_chain): ...here...
2765 (dump_pred_info): ...and here.
2766 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2767 (can_chain_union_be_invalidated_p): Improve check for invalidation
2769 (uninit_uses_cannot_happen): Avoid unnecessary if
2770 convert_control_dep_chain_into_preds yielded nothing.
2772 2018-01-06 Martin Sebor <msebor@redhat.com>
2774 PR tree-optimization/83640
2775 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2776 subtracting negative offset from size.
2777 (builtin_access::overlap): Adjust offset bounds of the access to fall
2778 within the size of the object if possible.
2780 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2782 PR rtl-optimization/83699
2783 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2784 extract_bit_field_as_subreg to cases in which the extracted
2785 value is also a vector.
2787 * lra-constraints.c (process_alt_operands): Test for the equivalence
2788 substitutions when detecting a possible reload cycle.
2790 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2793 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2794 by default if flag_selective_schedling{,2}. Formatting fixes.
2796 PR rtl-optimization/83682
2797 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2798 if it has non-VECTOR_MODE element mode.
2799 (vec_duplicate_p): Likewise.
2802 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2803 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2805 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2808 * config/i386/i386-builtin.def
2809 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2810 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2811 Require also OPTION_MASK_ISA_AVX512F in addition to
2812 OPTION_MASK_ISA_GFNI.
2813 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2814 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2815 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2816 to OPTION_MASK_ISA_GFNI.
2817 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2818 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2819 OPTION_MASK_ISA_AVX512BW.
2820 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2821 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2822 addition to OPTION_MASK_ISA_GFNI.
2823 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2824 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2825 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2826 to OPTION_MASK_ISA_GFNI.
2827 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2828 a requirement for all ISAs rather than any of them with a few
2830 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2832 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2833 bitmasks to be enabled with 3 exceptions, instead of requiring any
2834 enabled ISA with lots of exceptions.
2835 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2836 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2837 Change avx512bw in isa attribute to avx512f.
2838 * config/i386/sgxintrin.h: Add license boilerplate.
2839 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2840 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2841 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2842 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2844 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2845 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2846 temporarily sse2 rather than sse if not enabled already.
2849 * config/i386/sse.md (VI248_VLBW): Rename to ...
2850 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2851 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2852 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2853 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2854 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2855 mode iterator instead of VI248_VLBW.
2857 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2859 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2860 (record_modified): Skip clobbers; add debug output.
2861 (param_change_prob): Use sreal frequencies.
2863 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2865 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2866 punt for user-aligned variables.
2868 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2870 * tree-chrec.c (chrec_contains_symbols): Return true for
2873 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2876 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2877 of (x|y) == x for BICS pattern.
2879 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2881 PR tree-optimization/83605
2882 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2883 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2886 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2888 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2889 * config/epiphany/rtems.h: New file.
2891 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2892 Uros Bizjak <ubizjak@gmail.com>
2895 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2896 QIreg_operand instead of register_operand predicate.
2897 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2898 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2899 comments instead of -fmitigate[-_]rop.
2901 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2904 * cgraphunit.c (symbol_table::compile): Switch to text_section
2905 before calling assembly_start debug hook.
2906 * run-rtl-passes.c (run_rtl_passes): Likewise.
2909 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2911 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2912 range_int_cst_p rather than !symbolic_range_p before calling
2913 extract_range_from_multiplicative_op_1.
2915 2017-01-04 Jeff Law <law@redhat.com>
2917 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2918 redundant test in assertion.
2920 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2922 * doc/rtl.texi: Document machine_mode wrapper classes.
2924 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2926 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2929 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2931 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2932 the VEC_PERM_EXPR fold to fail.
2934 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2937 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2938 to switched_sections.
2940 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2943 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2946 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2949 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2950 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2952 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2955 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2956 is BLKmode and bitpos not zero or mode change is needed.
2958 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2961 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2964 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2967 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2968 instead of MULT rtx. Update all corresponding splitters.
2970 (*ssub<modesuffix>): Ditto.
2972 (*cmp_sadd_di): Update split patterns.
2973 (*cmp_sadd_si): Ditto.
2974 (*cmp_sadd_sidi): Ditto.
2975 (*cmp_ssub_di): Ditto.
2976 (*cmp_ssub_si): Ditto.
2977 (*cmp_ssub_sidi): Ditto.
2978 * config/alpha/predicates.md (const23_operand): New predicate.
2979 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2980 Look for ASHIFT, not MULT inner operand.
2981 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2983 2018-01-04 Martin Liska <mliska@suse.cz>
2985 PR gcov-profile/83669
2986 * gcov.c (output_intermediate_file): Add version to intermediate
2988 * doc/gcov.texi: Document new field 'version' in intermediate
2989 file format. Fix location of '-k' option of gcov command.
2991 2018-01-04 Martin Liska <mliska@suse.cz>
2994 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2996 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2998 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3000 2018-01-03 Martin Sebor <msebor@redhat.com>
3002 PR tree-optimization/83655
3003 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3004 checking calls with invalid arguments.
3006 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3008 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3009 (vectorizable_mask_load_store): Delete.
3010 (vectorizable_call): Return false for masked loads and stores.
3011 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3012 instead of gimple_assign_rhs1.
3013 (vectorizable_load): Handle IFN_MASK_LOAD.
3014 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3016 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3018 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3020 (vectorizable_mask_load_store): ...here.
3021 (vectorizable_load): ...and here.
3023 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3025 * tree-vect-stmts.c (vect_build_all_ones_mask)
3026 (vect_build_zero_merge_argument): New functions, split out from...
3027 (vectorizable_load): ...here.
3029 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3031 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3033 (vectorizable_mask_load_store): ...here.
3034 (vectorizable_store): ...and here.
3036 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3038 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3040 (vectorizable_mask_load_store): ...here.
3042 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3044 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3045 (vect_model_store_cost): Take a vec_load_store_type instead of a
3047 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3048 (vect_model_store_cost): Take a vec_load_store_type instead of a
3050 (vectorizable_mask_load_store): Update accordingly.
3051 (vectorizable_store): Likewise.
3052 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3054 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3056 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3057 IFN_MASK_LOAD calls here rather than...
3058 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3060 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3061 Alan Hayward <alan.hayward@arm.com>
3062 David Sherwood <david.sherwood@arm.com>
3064 * expmed.c (extract_bit_field_1): For vector extracts,
3065 fall back to extract_bit_field_as_subreg if vec_extract
3068 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3069 Alan Hayward <alan.hayward@arm.com>
3070 David Sherwood <david.sherwood@arm.com>
3072 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3073 they are variable or constant sized.
3074 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3075 slots for constant-sized data.
3077 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3078 Alan Hayward <alan.hayward@arm.com>
3079 David Sherwood <david.sherwood@arm.com>
3081 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3082 handling COND_EXPRs with boolean comparisons, try to find a better
3083 basis for the mask type than the boolean itself.
3085 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3087 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3088 is calculated and how it can be overridden.
3089 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3090 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3092 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3095 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3096 Alan Hayward <alan.hayward@arm.com>
3097 David Sherwood <david.sherwood@arm.com>
3099 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3100 Remove the mode argument.
3101 (aarch64_simd_valid_immediate): Remove the mode and inverse
3103 * config/aarch64/iterators.md (bitsize): New iterator.
3104 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3105 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3106 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3107 aarch64_simd_valid_immediate.
3108 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3109 (aarch64_reg_or_bic_imm): Likewise.
3110 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3111 with an insn_type enum and msl with a modifier_type enum.
3112 Replace element_width with a scalar_mode. Change the shift
3113 to unsigned int. Add constructors for scalar_float_mode and
3114 scalar_int_mode elements.
3115 (aarch64_vect_float_const_representable_p): Delete.
3116 (aarch64_can_const_movi_rtx_p)
3117 (aarch64_simd_scalar_immediate_valid_for_move)
3118 (aarch64_simd_make_constant): Update call to
3119 aarch64_simd_valid_immediate.
3120 (aarch64_advsimd_valid_immediate_hs): New function.
3121 (aarch64_advsimd_valid_immediate): Likewise.
3122 (aarch64_simd_valid_immediate): Remove mode and inverse
3123 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3124 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3125 and aarch64_float_const_representable_p on the result.
3126 (aarch64_output_simd_mov_immediate): Remove mode argument.
3127 Update call to aarch64_simd_valid_immediate and use of
3128 simd_immediate_info.
3129 (aarch64_output_scalar_simd_mov_immediate): Update call
3132 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3133 Alan Hayward <alan.hayward@arm.com>
3134 David Sherwood <david.sherwood@arm.com>
3136 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3137 (mode_nunits): Likewise CONST_MODE_NUNITS.
3138 * machmode.def (ADJUST_NUNITS): Document.
3139 * genmodes.c (mode_data::need_nunits_adj): New field.
3140 (blank_mode): Update accordingly.
3141 (adj_nunits): New variable.
3142 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3144 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3145 listed in adj_nunits.
3146 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3147 listed in adj_nunits. Don't emit case statements for such modes.
3148 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3149 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3150 nothing if adj_nunits is nonnull.
3151 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3152 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3153 (emit_mode_fbit): Update use of print_maybe_const_decl.
3154 (emit_move_size): Likewise. Treat the array as non-const
3156 (emit_mode_adjustments): Handle adj_nunits.
3158 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3160 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3161 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3162 (VECTOR_MODES): Use it.
3163 (make_vector_modes): Take the prefix as an argument.
3165 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3166 Alan Hayward <alan.hayward@arm.com>
3167 David Sherwood <david.sherwood@arm.com>
3169 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3170 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3171 for MODE_VECTOR_BOOL.
3172 * machmode.def (VECTOR_BOOL_MODE): Document.
3173 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3174 (make_vector_bool_mode): New function.
3175 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3177 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3178 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3180 * stor-layout.c (int_mode_for_mode): Likewise.
3181 * tree.c (build_vector_type_for_mode): Likewise.
3182 * varasm.c (output_constant_pool_2): Likewise.
3183 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3184 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3185 for MODE_VECTOR_BOOL.
3186 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3187 of mode class checks.
3188 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3189 instead of a list of mode class checks.
3190 (expand_vector_scalar_condition): Likewise.
3191 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3193 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3194 Alan Hayward <alan.hayward@arm.com>
3195 David Sherwood <david.sherwood@arm.com>
3197 * machmode.h (mode_size): Change from unsigned short to
3199 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3200 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3201 or if measurement_type is not polynomial.
3202 (fixed_size_mode::includes_p): Check for constant-sized modes.
3203 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3204 return a poly_uint16 rather than an unsigned short.
3205 (emit_mode_size): Change the type of mode_size from unsigned short
3206 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3207 (emit_mode_adjustments): Cope with polynomial vector sizes.
3208 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3210 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3212 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3213 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3214 * caller-save.c (setup_save_areas): Likewise.
3215 (replace_reg_with_saved_mem): Likewise.
3216 * calls.c (emit_library_call_value_1): Likewise.
3217 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3218 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3219 (gen_lowpart_for_combine): Likewise.
3220 * convert.c (convert_to_integer_1): Likewise.
3221 * cse.c (equiv_constant, cse_insn): Likewise.
3222 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3223 (cselib_subst_to_values): Likewise.
3224 * dce.c (word_dce_process_block): Likewise.
3225 * df-problems.c (df_word_lr_mark_ref): Likewise.
3226 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3227 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3228 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3229 (rtl_for_decl_location): Likewise.
3230 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3231 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3232 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3233 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3234 (expand_expr_real_1): Likewise.
3235 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3236 (pad_below): Likewise.
3237 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3238 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3239 * ira.c (get_subreg_tracking_sizes): Likewise.
3240 * ira-build.c (ira_create_allocno_objects): Likewise.
3241 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3242 (ira_sort_regnos_for_alter_reg): Likewise.
3243 * ira-costs.c (record_operand_costs): Likewise.
3244 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3245 (resolve_simple_move): Likewise.
3246 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3247 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3248 (lra_constraints): Likewise.
3249 (CONST_POOL_OK_P): Reject variable-sized modes.
3250 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3251 (add_pseudo_to_slot, lra_spill): Likewise.
3252 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3253 * optabs-query.c (get_best_extraction_insn): Likewise.
3254 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3255 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3256 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3257 * recog.c (offsettable_address_addr_space_p): Likewise.
3258 * regcprop.c (maybe_mode_change): Likewise.
3259 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3260 * regrename.c (build_def_use): Likewise.
3261 * regstat.c (dump_reg_info): Likewise.
3262 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3263 (find_reloads, find_reloads_subreg_address): Likewise.
3264 * reload1.c (eliminate_regs_1): Likewise.
3265 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3266 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3267 (simplify_binary_operation_1, simplify_subreg): Likewise.
3268 * targhooks.c (default_function_arg_padding): Likewise.
3269 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3270 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3271 (verify_gimple_assign_ternary): Likewise.
3272 * tree-inline.c (estimate_move_cost): Likewise.
3273 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3274 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3275 (get_address_cost_ainc): Likewise.
3276 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3277 (vect_supportable_dr_alignment): Likewise.
3278 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3279 (vectorizable_reduction): Likewise.
3280 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3281 (vectorizable_operation, vectorizable_load): Likewise.
3282 * tree.c (build_same_sized_truth_vector_type): Likewise.
3283 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3284 * var-tracking.c (emit_note_insn_var_location): Likewise.
3285 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3286 (ADDR_VEC_ALIGN): Likewise.
3288 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3289 Alan Hayward <alan.hayward@arm.com>
3290 David Sherwood <david.sherwood@arm.com>
3292 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3294 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3295 or if measurement_type is polynomial.
3296 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3297 * combine.c (make_extraction): Likewise.
3298 * dse.c (find_shift_sequence): Likewise.
3299 * dwarf2out.c (mem_loc_descriptor): Likewise.
3300 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3301 (extract_bit_field, extract_low_bits): Likewise.
3302 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3303 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3304 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3305 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3306 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3307 * reload.c (find_reloads): Likewise.
3308 * reload1.c (alter_reg): Likewise.
3309 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3310 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3311 * tree-if-conv.c (predicate_mem_writes): Likewise.
3312 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3313 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3314 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3315 * valtrack.c (dead_debug_insert_temp): Likewise.
3316 * varasm.c (mergeable_constant_section): Likewise.
3317 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3319 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3320 Alan Hayward <alan.hayward@arm.com>
3321 David Sherwood <david.sherwood@arm.com>
3323 * expr.c (expand_assignment): Cope with polynomial mode sizes
3324 when assigning to a CONCAT.
3326 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3327 Alan Hayward <alan.hayward@arm.com>
3328 David Sherwood <david.sherwood@arm.com>
3330 * machmode.h (mode_precision): Change from unsigned short to
3332 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3334 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3335 or if measurement_type is not polynomial.
3336 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3337 in which the mode is already known to be a scalar_int_mode.
3338 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3339 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3341 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3342 for GET_MODE_PRECISION.
3343 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3344 for GET_MODE_PRECISION.
3345 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3347 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3348 (expand_field_assignment, make_extraction): Likewise.
3349 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3350 (get_last_value): Likewise.
3351 * convert.c (convert_to_integer_1): Likewise.
3352 * cse.c (cse_insn): Likewise.
3353 * expr.c (expand_expr_real_1): Likewise.
3354 * lra-constraints.c (simplify_operand_subreg): Likewise.
3355 * optabs-query.c (can_atomic_load_p): Likewise.
3356 * optabs.c (expand_atomic_load): Likewise.
3357 (expand_atomic_store): Likewise.
3358 * ree.c (combine_reaching_defs): Likewise.
3359 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3360 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3361 * tree.h (type_has_mode_precision_p): Likewise.
3362 * ubsan.c (instrument_si_overflow): Likewise.
3364 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3365 Alan Hayward <alan.hayward@arm.com>
3366 David Sherwood <david.sherwood@arm.com>
3368 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3369 polynomial numbers of units.
3370 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3371 (valid_vector_subparts_p): New function.
3372 (build_vector_type): Remove temporary shim and take the number
3373 of units as a poly_uint64 rather than an int.
3374 (build_opaque_vector_type): Take the number of units as a
3375 poly_uint64 rather than an int.
3376 * tree.c (build_vector_from_ctor): Handle polynomial
3377 TYPE_VECTOR_SUBPARTS.
3378 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3379 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3380 (build_vector_from_val): If the number of units is variable,
3381 use build_vec_duplicate_cst for constant operands and
3382 VEC_DUPLICATE_EXPR otherwise.
3383 (make_vector_type): Remove temporary is_constant ().
3384 (build_vector_type, build_opaque_vector_type): Take the number of
3385 units as a poly_uint64 rather than an int.
3386 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3388 * cfgexpand.c (expand_debug_expr): Likewise.
3389 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3390 (store_constructor, expand_expr_real_1): Likewise.
3391 (const_scalar_mask_from_tree): Likewise.
3392 * fold-const-call.c (fold_const_reduction): Likewise.
3393 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3394 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3395 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3396 (fold_relational_const): Likewise.
3397 (native_interpret_vector): Likewise. Change the size from an
3398 int to an unsigned int.
3399 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3400 TYPE_VECTOR_SUBPARTS.
3401 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3402 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3403 duplicating a non-constant operand into a variable-length vector.
3404 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3405 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3406 * ipa-icf.c (sem_variable::equals): Likewise.
3407 * match.pd: Likewise.
3408 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3409 * print-tree.c (print_node): Likewise.
3410 * stor-layout.c (layout_type): Likewise.
3411 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3412 * tree-cfg.c (verify_gimple_comparison): Likewise.
3413 (verify_gimple_assign_binary): Likewise.
3414 (verify_gimple_assign_ternary): Likewise.
3415 (verify_gimple_assign_single): Likewise.
3416 * tree-pretty-print.c (dump_generic_node): Likewise.
3417 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3418 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3419 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3420 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3421 (vect_shift_permute_load_chain): Likewise.
3422 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3423 (expand_vector_condition, optimize_vector_constructor): Likewise.
3424 (lower_vec_perm, get_compute_type): Likewise.
3425 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3426 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3427 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3428 (vect_recog_mask_conversion_pattern): Likewise.
3429 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3430 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3431 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3432 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3433 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3434 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3435 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3436 (supportable_widening_operation): Likewise.
3437 (supportable_narrowing_operation): Likewise.
3438 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3440 * varasm.c (output_constant): Likewise.
3442 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3443 Alan Hayward <alan.hayward@arm.com>
3444 David Sherwood <david.sherwood@arm.com>
3446 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3447 so that both the length == 3 and length != 3 cases set up their
3448 own permute vectors. Add comments explaining why we know the
3449 number of elements is constant.
3450 (vect_permute_load_chain): Likewise.
3452 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3453 Alan Hayward <alan.hayward@arm.com>
3454 David Sherwood <david.sherwood@arm.com>
3456 * machmode.h (mode_nunits): Change from unsigned char to
3458 (ONLY_FIXED_SIZE_MODES): New macro.
3459 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3460 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3461 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3463 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3464 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3465 or if measurement_type is not polynomial.
3466 * genmodes.c (ZERO_COEFFS): New macro.
3467 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3469 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3470 Use ZERO_COEFFS when emitting initializers.
3471 * data-streamer.h (bp_pack_poly_value): New function.
3472 (bp_unpack_poly_value): Likewise.
3473 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3474 for GET_MODE_NUNITS.
3475 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3476 for GET_MODE_NUNITS.
3477 * tree.c (make_vector_type): Remove temporary shim and make
3478 the real function take the number of units as a poly_uint64
3480 (build_vector_type_for_mode): Handle polynomial nunits.
3481 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3482 * emit-rtl.c (const_vec_series_p_1): Likewise.
3483 (gen_rtx_CONST_VECTOR): Likewise.
3484 * fold-const.c (test_vec_duplicate_folding): Likewise.
3485 * genrecog.c (validate_pattern): Likewise.
3486 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3487 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3488 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3489 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3490 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3491 * rtlanal.c (subreg_get_info): Likewise.
3492 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3493 (vect_grouped_load_supported): Likewise.
3494 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3495 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3496 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3497 (simplify_const_unary_operation, simplify_binary_operation_1)
3498 (simplify_const_binary_operation, simplify_ternary_operation)
3499 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3500 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3501 instead of CONST_VECTOR_NUNITS.
3502 * varasm.c (output_constant_pool_2): Likewise.
3503 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3504 explicit-encoded elements in the XVEC for variable-length vectors.
3506 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3508 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3510 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3511 Alan Hayward <alan.hayward@arm.com>
3512 David Sherwood <david.sherwood@arm.com>
3514 * coretypes.h (fixed_size_mode): Declare.
3515 (fixed_size_mode_pod): New typedef.
3516 * builtins.h (target_builtins::x_apply_args_mode)
3517 (target_builtins::x_apply_result_mode): Change type to
3518 fixed_size_mode_pod.
3519 * builtins.c (apply_args_size, apply_result_size, result_vector)
3520 (expand_builtin_apply_args_1, expand_builtin_apply)
3521 (expand_builtin_return): Update accordingly.
3523 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3525 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3526 * cselib.c (cselib_hash_rtx): Likewise.
3527 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3528 CONST_VECTOR encoding.
3530 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3531 Jeff Law <law@redhat.com>
3534 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3535 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3536 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3537 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3540 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3541 explicitly probe *sp in a noreturn function if there were any callee
3542 register saves or frame pointer is needed.
3544 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3547 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3548 BLKmode for ternary, binary or unary expressions.
3551 * var-tracking.c (delete_vta_debug_insn): New inline function.
3552 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3553 insns from get_insns () to NULL instead of each bb separately.
3554 Use delete_vta_debug_insn. No longer static.
3555 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3556 delete_vta_debug_insns callers.
3557 * rtl.h (delete_vta_debug_insns): Declare.
3558 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3559 instead of variable_tracking_main.
3561 2018-01-03 Martin Sebor <msebor@redhat.com>
3563 PR tree-optimization/83603
3564 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3565 arguments past the endof the argument list in functions declared
3566 without a prototype.
3567 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3568 Avoid checking when arguments are null.
3570 2018-01-03 Martin Sebor <msebor@redhat.com>
3573 * doc/extend.texi (attribute const): Fix a typo.
3574 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3575 issuing -Wsuggest-attribute for void functions.
3577 2018-01-03 Martin Sebor <msebor@redhat.com>
3579 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3580 offset_int::from instead of wide_int::to_shwi.
3581 (maybe_diag_overlap): Remove assertion.
3582 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3583 * gimple-ssa-sprintf.c (format_directive): Same.
3584 (parse_directive): Same.
3585 (sprintf_dom_walker::compute_format_length): Same.
3586 (try_substitute_return_value): Same.
3588 2017-01-03 Jeff Law <law@redhat.com>
3591 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3592 non-constant residual for zero at runtime and avoid probing in
3593 that case. Reorganize code for trailing problem to mirror handling
3596 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3598 PR tree-optimization/83501
3599 * tree-ssa-strlen.c (get_string_cst): New.
3600 (handle_char_store): Call get_string_cst.
3602 2018-01-03 Martin Liska <mliska@suse.cz>
3604 PR tree-optimization/83593
3605 * tree-ssa-strlen.c: Include tree-cfg.h.
3606 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3607 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3608 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3610 (strlen_dom_walker::before_dom_children): Call
3611 gimple_purge_dead_eh_edges. Dump tranformation with details
3613 (strlen_dom_walker::before_dom_children): Update call by adding
3614 new argument cleanup_eh.
3615 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3617 2018-01-03 Martin Liska <mliska@suse.cz>
3620 * cif-code.def (VARIADIC_THUNK): New enum value.
3621 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3624 2018-01-03 Jan Beulich <jbeulich@suse.com>
3626 * sse.md (mov<mode>_internal): Tighten condition for when to use
3627 vmovdqu<ssescalarsize> for TI and OI modes.
3629 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3631 Update copyright years.
3633 2018-01-03 Martin Liska <mliska@suse.cz>
3636 * ipa-visibility.c (function_and_variable_visibility): Skip
3637 functions with noipa attribure.
3639 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3641 * gcc.c (process_command): Update copyright notice dates.
3642 * gcov-dump.c (print_version): Ditto.
3643 * gcov.c (print_version): Ditto.
3644 * gcov-tool.c (print_version): Ditto.
3645 * gengtype.c (create_file): Ditto.
3646 * doc/cpp.texi: Bump @copying's copyright year.
3647 * doc/cppinternals.texi: Ditto.
3648 * doc/gcc.texi: Ditto.
3649 * doc/gccint.texi: Ditto.
3650 * doc/gcov.texi: Ditto.
3651 * doc/install.texi: Ditto.
3652 * doc/invoke.texi: Ditto.
3654 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3656 * vector-builder.h (vector_builder::m_full_nelts): Change from
3657 unsigned int to poly_uint64.
3658 (vector_builder::full_nelts): Update prototype accordingly.
3659 (vector_builder::new_vector): Likewise.
3660 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3661 (vector_builder::operator ==): Likewise.
3662 (vector_builder::finalize): Likewise.
3663 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3664 Take the number of elements as a poly_uint64 rather than an
3666 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3667 from unsigned int to poly_uint64.
3668 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3669 (vec_perm_indices::new_vector): Likewise.
3670 (vec_perm_indices::length): Likewise.
3671 (vec_perm_indices::nelts_per_input): Likewise.
3672 (vec_perm_indices::input_nelts): Likewise.
3673 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3674 number of elements per input as a poly_uint64 rather than an
3675 unsigned int. Use the original encoding for variable-length
3676 vectors, rather than clamping each individual element.
3677 For the second and subsequent elements in each pattern,
3678 clamp the step and base before clamping their sum.
3679 (vec_perm_indices::series_p): Handle polynomial element counts.
3680 (vec_perm_indices::all_in_range_p): Likewise.
3681 (vec_perm_indices_to_tree): Likewise.
3682 (vec_perm_indices_to_rtx): Likewise.
3683 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3684 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3685 (tree_vector_builder::new_binary_operation): Handle polynomial
3686 element counts. Return false if we need to know the number
3687 of elements at compile time.
3688 * fold-const.c (fold_vec_perm): Punt if the number of elements
3689 isn't known at compile time.
3691 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3693 * vec-perm-indices.h (vec_perm_builder): Change element type
3694 from HOST_WIDE_INT to poly_int64.
3695 (vec_perm_indices::element_type): Update accordingly.
3696 (vec_perm_indices::clamp): Handle polynomial element_types.
3697 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3698 (vec_perm_indices::all_in_range_p): Likewise.
3699 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3701 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3702 polynomial vec_perm_indices element types.
3703 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3704 * fold-const.c (fold_vec_perm): Likewise.
3705 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3706 * tree-vect-generic.c (lower_vec_perm): Likewise.
3707 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3708 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3709 element type to HOST_WIDE_INT.
3711 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3712 Alan Hayward <alan.hayward@arm.com>
3713 David Sherwood <david.sherwood@arm.com>
3715 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3716 rather than an int. Use plus_constant.
3717 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3718 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3720 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3721 Alan Hayward <alan.hayward@arm.com>
3722 David Sherwood <david.sherwood@arm.com>
3724 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3725 a HOST_WIDE_INT to a poly_int64.
3727 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3728 Alan Hayward <alan.hayward@arm.com>
3729 David Sherwood <david.sherwood@arm.com>
3731 * calls.c (load_register_parameters): Cope with polynomial
3732 mode sizes. Require a constant size for BLKmode parameters
3733 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3734 forces a parameter to be padded at the lsb end in order to
3735 fill a complete number of words, require the parameter size
3736 to be ordered wrt UNITS_PER_WORD.
3738 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3739 Alan Hayward <alan.hayward@arm.com>
3740 David Sherwood <david.sherwood@arm.com>
3742 * reload1.c (spill_stack_slot_width): Change element type
3743 from unsigned int to poly_uint64_pod.
3744 (alter_reg): Treat mode sizes as polynomial.
3746 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3747 Alan Hayward <alan.hayward@arm.com>
3748 David Sherwood <david.sherwood@arm.com>
3750 * reload.c (complex_word_subreg_p): New function.
3751 (reload_inner_reg_of_subreg, push_reload): Use it.
3753 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3754 Alan Hayward <alan.hayward@arm.com>
3755 David Sherwood <david.sherwood@arm.com>
3757 * lra-constraints.c (process_alt_operands): Reject matched
3758 operands whose sizes aren't ordered.
3759 (match_reload): Refer to this check here.
3761 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3762 Alan Hayward <alan.hayward@arm.com>
3763 David Sherwood <david.sherwood@arm.com>
3765 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3766 that the mode size is in the set {1, 2, 4, 8, 16}.
3768 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3769 Alan Hayward <alan.hayward@arm.com>
3770 David Sherwood <david.sherwood@arm.com>
3772 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3773 Use plus_constant instead of gen_rtx_PLUS.
3775 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3776 Alan Hayward <alan.hayward@arm.com>
3777 David Sherwood <david.sherwood@arm.com>
3779 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3780 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3781 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3782 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3783 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3784 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3785 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3786 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3787 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3788 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3790 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3791 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3792 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3793 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3794 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3795 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3796 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3797 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3798 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3799 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3801 * expr.c (emit_move_resolve_push): Treat the input and result
3802 of PUSH_ROUNDING as a poly_int64.
3803 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3804 (emit_push_insn): Likewise.
3805 * lra-eliminations.c (mark_not_eliminable): Likewise.
3806 * recog.c (push_operand): Likewise.
3807 * reload1.c (elimination_effects): Likewise.
3808 * rtlanal.c (nonzero_bits1): Likewise.
3809 * calls.c (store_one_arg): Likewise. Require the padding to be
3810 known at compile time.
3812 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3813 Alan Hayward <alan.hayward@arm.com>
3814 David Sherwood <david.sherwood@arm.com>
3816 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3817 Use plus_constant instead of gen_rtx_PLUS.
3819 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3820 Alan Hayward <alan.hayward@arm.com>
3821 David Sherwood <david.sherwood@arm.com>
3823 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3826 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3827 Alan Hayward <alan.hayward@arm.com>
3828 David Sherwood <david.sherwood@arm.com>
3830 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3831 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3832 via stack temporaries. Treat the mode size as polynomial too.
3834 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3835 Alan Hayward <alan.hayward@arm.com>
3836 David Sherwood <david.sherwood@arm.com>
3838 * expr.c (expand_expr_real_2): When handling conversions involving
3839 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3840 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3841 as a poly_uint64 too.
3843 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3844 Alan Hayward <alan.hayward@arm.com>
3845 David Sherwood <david.sherwood@arm.com>
3847 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3849 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3850 Alan Hayward <alan.hayward@arm.com>
3851 David Sherwood <david.sherwood@arm.com>
3853 * combine.c (can_change_dest_mode): Handle polynomial
3854 REGMODE_NATURAL_SIZE.
3855 * expmed.c (store_bit_field_1): Likewise.
3856 * expr.c (store_constructor): Likewise.
3857 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3858 and polynomial REGMODE_NATURAL_SIZE.
3859 (gen_lowpart_common): Likewise.
3860 * reginfo.c (record_subregs_of_mode): Likewise.
3861 * rtlanal.c (read_modify_subreg_p): Likewise.
3863 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3864 Alan Hayward <alan.hayward@arm.com>
3865 David Sherwood <david.sherwood@arm.com>
3867 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3868 numbers of elements.
3870 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3871 Alan Hayward <alan.hayward@arm.com>
3872 David Sherwood <david.sherwood@arm.com>
3874 * match.pd: Cope with polynomial numbers of vector elements.
3876 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3877 Alan Hayward <alan.hayward@arm.com>
3878 David Sherwood <david.sherwood@arm.com>
3880 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3881 in a POINTER_PLUS_EXPR.
3883 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3884 Alan Hayward <alan.hayward@arm.com>
3885 David Sherwood <david.sherwood@arm.com>
3887 * omp-simd-clone.c (simd_clone_subparts): New function.
3888 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3889 (ipa_simd_modify_function_body): Likewise.
3891 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3892 Alan Hayward <alan.hayward@arm.com>
3893 David Sherwood <david.sherwood@arm.com>
3895 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3896 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3897 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3898 (expand_vector_condition, vector_element): Likewise.
3899 (subparts_gt): New function.
3900 (get_compute_type): Use subparts_gt.
3901 (count_type_subparts): Delete.
3902 (expand_vector_operations_1): Use subparts_gt instead of
3903 count_type_subparts.
3905 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3906 Alan Hayward <alan.hayward@arm.com>
3907 David Sherwood <david.sherwood@arm.com>
3909 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3910 (vect_compile_time_alias): ...this new function. Do the calculation
3911 on poly_ints rather than trees.
3912 (vect_prune_runtime_alias_test_list): Update call accordingly.
3914 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3915 Alan Hayward <alan.hayward@arm.com>
3916 David Sherwood <david.sherwood@arm.com>
3918 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3920 (vect_schedule_slp_instance): Likewise.
3922 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3923 Alan Hayward <alan.hayward@arm.com>
3924 David Sherwood <david.sherwood@arm.com>
3926 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3927 constant and extern definitions for variable-length vectors.
3928 (vect_get_constant_vectors): Note that the number of units
3929 is known to be constant.
3931 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3932 Alan Hayward <alan.hayward@arm.com>
3933 David Sherwood <david.sherwood@arm.com>
3935 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3936 of units as polynomial. Choose between WIDE and NARROW based
3939 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3940 Alan Hayward <alan.hayward@arm.com>
3941 David Sherwood <david.sherwood@arm.com>
3943 * tree-vect-stmts.c (simd_clone_subparts): New function.
3944 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3946 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3947 Alan Hayward <alan.hayward@arm.com>
3948 David Sherwood <david.sherwood@arm.com>
3950 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3951 vectors as polynomial. Use build_index_vector for
3954 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3955 Alan Hayward <alan.hayward@arm.com>
3956 David Sherwood <david.sherwood@arm.com>
3958 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3959 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3960 for variable-length vectors.
3961 (vectorizable_mask_load_store): Treat the number of units as
3962 polynomial, asserting that it is constant if the condition has
3963 already been enforced.
3964 (vectorizable_store, vectorizable_load): Likewise.
3966 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3967 Alan Hayward <alan.hayward@arm.com>
3968 David Sherwood <david.sherwood@arm.com>
3970 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3971 of units as polynomial. Punt if we can't tell at compile time
3972 which vector contains the final result.
3974 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3975 Alan Hayward <alan.hayward@arm.com>
3976 David Sherwood <david.sherwood@arm.com>
3978 * tree-vect-loop.c (vectorizable_induction): Treat the number
3979 of units as polynomial. Punt on SLP inductions. Use an integer
3980 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3981 cast of such a series for variable-length floating-point
3984 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3985 Alan Hayward <alan.hayward@arm.com>
3986 David Sherwood <david.sherwood@arm.com>
3988 * tree.h (build_index_vector): Declare.
3989 * tree.c (build_index_vector): New function.
3990 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3991 of units as polynomial, forcibly converting it to a constant if
3992 vectorizable_reduction has already enforced the condition.
3993 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
3994 to create a {1,2,3,...} vector.
3995 (vectorizable_reduction): Treat the number of units as polynomial.
3996 Choose vectype_in based on the largest scalar element size rather
3997 than the smallest number of units. Enforce the restrictions
4000 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4001 Alan Hayward <alan.hayward@arm.com>
4002 David Sherwood <david.sherwood@arm.com>
4004 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4005 number of units as polynomial.
4007 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4008 Alan Hayward <alan.hayward@arm.com>
4009 David Sherwood <david.sherwood@arm.com>
4011 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4012 * target.def (autovectorize_vector_sizes): Return the vector sizes
4013 by pointer, using vector_sizes rather than a bitmask.
4014 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4015 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4016 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4018 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4019 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4020 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4021 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4022 * omp-general.c (omp_max_vf): Likewise.
4023 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4024 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4025 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4026 * tree-vect-slp.c (vect_slp_bb): Likewise.
4027 * doc/tm.texi: Regenerate.
4028 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4030 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4031 the vector size as a poly_uint64 rather than an unsigned int.
4032 (current_vector_size): Change from an unsigned int to a poly_uint64.
4033 (get_vectype_for_scalar_type): Update accordingly.
4034 * tree.h (build_truth_vector_type): Take the size and number of
4035 units as a poly_uint64 rather than an unsigned int.
4036 (build_vector_type): Add a temporary overload that takes
4037 the number of units as a poly_uint64 rather than an unsigned int.
4038 * tree.c (make_vector_type): Likewise.
4039 (build_truth_vector_type): Take the number of units as a poly_uint64
4040 rather than an unsigned int.
4042 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4043 Alan Hayward <alan.hayward@arm.com>
4044 David Sherwood <david.sherwood@arm.com>
4046 * target.def (get_mask_mode): Take the number of units and length
4047 as poly_uint64s rather than unsigned ints.
4048 * targhooks.h (default_get_mask_mode): Update accordingly.
4049 * targhooks.c (default_get_mask_mode): Likewise.
4050 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4051 * doc/tm.texi: Regenerate.
4053 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4054 Alan Hayward <alan.hayward@arm.com>
4055 David Sherwood <david.sherwood@arm.com>
4057 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4058 * omp-general.c (omp_max_vf): Likewise.
4059 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4060 (expand_omp_simd): Handle polynomial safelen.
4061 * omp-low.c (omplow_simd_context): Add a default constructor.
4062 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4063 (lower_rec_simd_input_clauses): Update accordingly.
4064 (lower_rec_input_clauses): Likewise.
4066 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4067 Alan Hayward <alan.hayward@arm.com>
4068 David Sherwood <david.sherwood@arm.com>
4070 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4071 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4072 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4073 (vect_analyze_slp_cost): Likewise.
4074 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4075 (vect_model_load_cost): Likewise.
4077 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4078 Alan Hayward <alan.hayward@arm.com>
4079 David Sherwood <david.sherwood@arm.com>
4081 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4082 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4083 from an unsigned int * to a poly_uint64_pod *.
4084 (calculate_unrolling_factor): New function.
4085 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4087 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4088 Alan Hayward <alan.hayward@arm.com>
4089 David Sherwood <david.sherwood@arm.com>
4091 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4092 from an unsigned int to a poly_uint64.
4093 (_loop_vec_info::slp_unrolling_factor): Likewise.
4094 (_loop_vec_info::vectorization_factor): Change from an int
4096 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4097 (vect_get_num_vectors): New function.
4098 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4099 (vect_get_num_copies): Use vect_get_num_vectors.
4100 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4101 to an unsigned int *.
4102 (vect_analyze_data_refs): Change min_vf from an int * to a
4104 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4105 than an unsigned HOST_WIDE_INT.
4106 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4107 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4108 to an unsigned int *.
4109 (vect_analyze_data_ref_dependences): Likewise.
4110 (vect_compute_data_ref_alignment): Handle polynomial vf.
4111 (vect_enhance_data_refs_alignment): Likewise.
4112 (vect_prune_runtime_alias_test_list): Likewise.
4113 (vect_shift_permute_load_chain): Likewise.
4114 (vect_supportable_dr_alignment): Likewise.
4115 (dependence_distance_ge_vf): Take the vectorization factor as a
4116 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4117 (vect_analyze_data_refs): Change min_vf from an int * to a
4119 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4120 vfm1 as a poly_uint64 rather than an int. Make the same change
4121 for the returned bound_scalar.
4122 (vect_gen_vector_loop_niters): Handle polynomial vf.
4123 (vect_do_peeling): Likewise. Update call to
4124 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4125 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4127 * tree-vect-loop.c (vect_determine_vectorization_factor)
4128 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4129 (vect_get_known_peeling_cost): Likewise.
4130 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4131 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4132 (vect_transform_loop): Likewise. Use the lowest possible VF when
4133 updating the upper bounds of the loop.
4134 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4136 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4137 polynomial unroll factors.
4138 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4139 (vect_make_slp_decision): Likewise.
4140 (vect_supported_load_permutation_p): Likewise, and polynomial
4142 (vect_analyze_slp_cost): Handle polynomial vf.
4143 (vect_slp_analyze_node_operations): Likewise.
4144 (vect_slp_analyze_bb_1): Likewise.
4145 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4146 than an unsigned HOST_WIDE_INT.
4147 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4148 (vectorizable_load): Handle polynomial vf.
4149 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4151 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4153 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4154 Alan Hayward <alan.hayward@arm.com>
4155 David Sherwood <david.sherwood@arm.com>
4157 * match.pd: Handle bit operations involving three constants
4158 and try to fold one pair.
4160 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4162 * tree-vect-loop-manip.c: Include gimple-fold.h.
4163 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4164 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4165 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4166 Add a path that uses a step of VF instead of 1, but disable it
4168 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4169 and niters_no_overflow parameters. Update calls to
4170 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4171 Create a new SSA name if the latter choses to use a ste other
4172 than zero, and return it via niters_vector_mult_vf_var.
4173 * tree-vect-loop.c (vect_transform_loop): Update calls to
4174 vect_do_peeling, vect_gen_vector_loop_niters and
4175 slpeel_make_loop_iterate_ntimes.
4176 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4177 (vect_gen_vector_loop_niters): Update declarations after above changes.
4179 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4181 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4182 128-bit round to integer instructions.
4183 (ceil<mode>2): Likewise.
4184 (btrunc<mode>2): Likewise.
4185 (round<mode>2): Likewise.
4187 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4189 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4190 unaligned VSX load/store on P8/P9.
4191 (expand_block_clear): Allow the use of unaligned VSX
4192 load/store on P8/P9.
4194 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4196 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4198 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4199 swap associated with both a load and a store.
4201 2018-01-02 Andrew Waterman <andrew@sifive.com>
4203 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4204 * config/riscv/riscv.md (clear_cache): Use it.
4206 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4208 * web.c: Remove out-of-date comment.
4210 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4212 * expr.c (fixup_args_size_notes): Check that any existing
4213 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4214 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4215 (emit_single_push_insn): ...here.
4217 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4219 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4220 (const_vector_encoded_nelts): New function.
4221 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4222 (const_vector_int_elt, const_vector_elt): Declare.
4223 * emit-rtl.c (const_vector_int_elt_1): New function.
4224 (const_vector_elt): Likewise.
4225 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4226 of CONST_VECTOR_ELT.
4228 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4230 * expr.c: Include rtx-vector-builder.h.
4231 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4232 directly on the tree encoding.
4233 (const_vector_from_tree): Likewise.
4234 * optabs.c: Include rtx-vector-builder.h.
4235 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4236 sequence of "u" values.
4237 * vec-perm-indices.c: Include rtx-vector-builder.h.
4238 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4239 directly on the vec_perm_indices encoding.
4241 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4243 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4244 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4245 * rtx-vector-builder.h: New file.
4246 * rtx-vector-builder.c: Likewise.
4247 * rtl.h (rtx_def::u2): Add a const_vector field.
4248 (CONST_VECTOR_NPATTERNS): New macro.
4249 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4250 (CONST_VECTOR_DUPLICATE_P): Likewise.
4251 (CONST_VECTOR_STEPPED_P): Likewise.
4252 (CONST_VECTOR_ENCODED_ELT): Likewise.
4253 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4254 (unwrap_const_vec_duplicate): Likewise.
4255 (const_vec_series_p): Check for a non-duplicated vector encoding.
4256 Say that the function only returns true for integer vectors.
4257 * emit-rtl.c: Include rtx-vector-builder.h.
4258 (gen_const_vec_duplicate_1): Delete.
4259 (gen_const_vector): Call gen_const_vec_duplicate instead of
4260 gen_const_vec_duplicate_1.
4261 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4262 (gen_const_vec_duplicate): Use rtx_vector_builder.
4263 (gen_const_vec_series): Likewise.
4264 (gen_rtx_CONST_VECTOR): Likewise.
4265 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4266 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4267 Build a new vector rather than modifying a CONST_VECTOR in-place.
4268 (handle_special_swappables): Update call accordingly.
4269 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4270 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4271 Build a new vector rather than modifying a CONST_VECTOR in-place.
4272 (handle_special_swappables): Update call accordingly.
4274 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4276 * simplify-rtx.c (simplify_const_binary_operation): Use
4277 CONST_VECTOR_ELT instead of XVECEXP.
4279 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4281 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4282 the selector elements to be different from the data elements
4283 if the selector is a VECTOR_CST.
4284 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4285 ssizetype for the selector.
4287 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4289 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4290 before testing each element individually.
4291 * tree-vect-generic.c (lower_vec_perm): Likewise.
4293 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4295 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4296 * selftest-run-tests.c (selftest::run_tests): Call it.
4297 * vector-builder.h (vector_builder::operator ==): New function.
4298 (vector_builder::operator !=): Likewise.
4299 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4300 (vec_perm_indices::all_from_input_p): New function.
4301 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4302 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4303 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4304 instead of reading the VECTOR_CST directly. Detect whether both
4305 vector inputs are the same before constructing the vec_perm_indices,
4306 and update the number of inputs argument accordingly. Use the
4307 utility functions added above. Only construct sel2 if we need to.
4309 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4311 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4312 the broadcast of the low byte.
4313 (expand_mult_highpart): Use an explicit encoding for the permutes.
4314 * optabs-query.c (can_mult_highpart_p): Likewise.
4315 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4316 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4317 (vectorizable_bswap): Likewise.
4318 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4319 explicit encoding for the power-of-2 permutes.
4320 (vect_permute_store_chain): Likewise.
4321 (vect_grouped_load_supported): Likewise.
4322 (vect_permute_load_chain): Likewise.
4324 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4326 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4327 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4328 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4329 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4330 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4331 (vect_gen_perm_mask_any): Likewise.
4333 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4335 * int-vector-builder.h: New file.
4336 * vec-perm-indices.h: Include int-vector-builder.h.
4337 (vec_perm_indices): Redefine as an int_vector_builder.
4338 (auto_vec_perm_indices): Delete.
4339 (vec_perm_builder): Redefine as a stand-alone class.
4340 (vec_perm_indices::vec_perm_indices): New function.
4341 (vec_perm_indices::clamp): Likewise.
4342 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4343 (vec_perm_indices::new_vector): New function.
4344 (vec_perm_indices::new_expanded_vector): Update for new
4345 vec_perm_indices class.
4346 (vec_perm_indices::rotate_inputs): New function.
4347 (vec_perm_indices::all_in_range_p): Operate directly on the
4348 encoded form, without computing elided elements.
4349 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4350 encoding. Update for new vec_perm_indices class.
4351 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4352 the given vec_perm_builder.
4353 (expand_vec_perm_var): Update vec_perm_builder constructor.
4354 (expand_mult_highpart): Use vec_perm_builder instead of
4355 auto_vec_perm_indices.
4356 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4357 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4358 or double series encoding as appropriate.
4359 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4360 vec_perm_indices instead of auto_vec_perm_indices.
4361 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4362 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4363 (vect_permute_store_chain): Likewise.
4364 (vect_grouped_load_supported): Likewise.
4365 (vect_permute_load_chain): Likewise.
4366 (vect_shift_permute_load_chain): Likewise.
4367 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4368 (vect_transform_slp_perm_load): Likewise.
4369 (vect_schedule_slp_instance): Likewise.
4370 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4371 (vectorizable_mask_load_store): Likewise.
4372 (vectorizable_bswap): Likewise.
4373 (vectorizable_store): Likewise.
4374 (vectorizable_load): Likewise.
4375 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4376 vec_perm_indices instead of auto_vec_perm_indices. Use
4377 tree_to_vec_perm_builder to read the vector from a tree.
4378 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4379 vec_perm_builder instead of a vec_perm_indices.
4380 (have_whole_vector_shift): Use vec_perm_builder and
4381 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4382 truncation to calc_vec_perm_mask_for_shift.
4383 (vect_create_epilog_for_reduction): Likewise.
4384 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4385 from auto_vec_perm_indices to vec_perm_indices.
4386 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4387 instead of changing individual elements.
4388 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4389 the vector in d.perm.
4390 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4391 from auto_vec_perm_indices to vec_perm_indices.
4392 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4393 instead of changing individual elements.
4394 (arm_vectorize_vec_perm_const): Use new_vector to install
4395 the vector in d.perm.
4396 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4397 Update vec_perm_builder constructor.
4398 (rs6000_expand_interleave): Likewise.
4399 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4400 (rs6000_expand_interleave): Likewise.
4402 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4404 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4405 to qimode could truncate the indices.
4406 * optabs.c (expand_vec_perm_var): Likewise.
4408 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4410 * Makefile.in (OBJS): Add vec-perm-indices.o.
4411 * vec-perm-indices.h: New file.
4412 * vec-perm-indices.c: Likewise.
4413 * target.h (vec_perm_indices): Replace with a forward class
4415 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4416 * optabs.h: Include vec-perm-indices.h.
4417 (expand_vec_perm): Delete.
4418 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4419 (expand_vec_perm_const): Declare.
4420 * target.def (vec_perm_const_ok): Replace with...
4421 (vec_perm_const): ...this new hook.
4422 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4423 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4424 * doc/tm.texi: Regenerate.
4425 * optabs.def (vec_perm_const): Delete.
4426 * doc/md.texi (vec_perm_const): Likewise.
4427 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4428 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4429 expand_vec_perm for constant permutation vectors. Assert that
4430 the mode of variable permutation vectors is the integer equivalent
4431 of the mode that is being permuted.
4432 * optabs-query.h (selector_fits_mode_p): Declare.
4433 * optabs-query.c: Include vec-perm-indices.h.
4434 (selector_fits_mode_p): New function.
4435 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4436 is defined, instead of checking whether the vec_perm_const_optab
4437 exists. Use targetm.vectorize.vec_perm_const instead of
4438 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4439 fit in the vector mode before using a variable permute.
4440 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4441 vec_perm_indices instead of an rtx.
4442 (expand_vec_perm): Replace with...
4443 (expand_vec_perm_const): ...this new function. Take the selector
4444 as a vec_perm_indices rather than an rtx. Also take the mode of
4445 the selector. Update call to shift_amt_for_vec_perm_mask.
4446 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4447 Use vec_perm_indices::new_expanded_vector to expand the original
4448 selector into bytes. Check whether the indices fit in the vector
4449 mode before using a variable permute.
4450 (expand_vec_perm_var): Make global.
4451 (expand_mult_highpart): Use expand_vec_perm_const.
4452 * fold-const.c: Includes vec-perm-indices.h.
4453 * tree-ssa-forwprop.c: Likewise.
4454 * tree-vect-data-refs.c: Likewise.
4455 * tree-vect-generic.c: Likewise.
4456 * tree-vect-loop.c: Likewise.
4457 * tree-vect-slp.c: Likewise.
4458 * tree-vect-stmts.c: Likewise.
4459 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4461 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4462 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4463 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4464 (aarch64_vectorize_vec_perm_const): ...this new function.
4465 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4466 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4467 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4468 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4469 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4470 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4471 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4473 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4474 check for NEON modes.
4475 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4476 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4477 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4478 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4480 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4481 the old VEC_PERM_CONST conditions.
4482 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4483 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4484 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4485 (ia64_vectorize_vec_perm_const_ok): Merge into...
4486 (ia64_vectorize_vec_perm_const): ...this new function.
4487 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4488 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4489 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4490 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4491 * config/mips/mips.c (mips_expand_vec_perm_const)
4492 (mips_vectorize_vec_perm_const_ok): Merge into...
4493 (mips_vectorize_vec_perm_const): ...this new function.
4494 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4495 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4496 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4497 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4498 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4499 (rs6000_expand_vec_perm_const): Delete.
4500 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4502 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4503 (altivec_expand_vec_perm_const_le): Take each operand individually.
4504 Operate on constant selectors rather than rtxes.
4505 (altivec_expand_vec_perm_const): Likewise. Update call to
4506 altivec_expand_vec_perm_const_le.
4507 (rs6000_expand_vec_perm_const): Delete.
4508 (rs6000_vectorize_vec_perm_const_ok): Delete.
4509 (rs6000_vectorize_vec_perm_const): New function.
4510 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4511 an element count and rtx array.
4512 (rs6000_expand_extract_even): Update call accordingly.
4513 (rs6000_expand_interleave): Likewise.
4514 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4515 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4516 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4517 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4518 (rs6000_expand_vec_perm_const): Delete.
4519 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4520 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4521 (altivec_expand_vec_perm_const_le): Take each operand individually.
4522 Operate on constant selectors rather than rtxes.
4523 (altivec_expand_vec_perm_const): Likewise. Update call to
4524 altivec_expand_vec_perm_const_le.
4525 (rs6000_expand_vec_perm_const): Delete.
4526 (rs6000_vectorize_vec_perm_const_ok): Delete.
4527 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4528 reference to the SPE evmerge intructions.
4529 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4530 an element count and rtx array.
4531 (rs6000_expand_extract_even): Update call accordingly.
4532 (rs6000_expand_interleave): Likewise.
4533 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4534 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4536 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4538 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4540 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4541 vector mode and that that mode matches the mode of the data
4543 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4544 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4545 directly using expand_vec_perm_1 when forcing selectors into
4547 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4549 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4551 * optabs-query.h (can_vec_perm_p): Delete.
4552 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4553 * optabs-query.c (can_vec_perm_p): Split into...
4554 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4555 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4556 particular selector is valid.
4557 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4558 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4559 (vect_grouped_load_supported): Likewise.
4560 (vect_shift_permute_load_chain): Likewise.
4561 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4562 (vect_transform_slp_perm_load): Likewise.
4563 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4564 (vectorizable_bswap): Likewise.
4565 (vect_gen_perm_mask_checked): Likewise.
4566 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4567 implementations of variable permutation vectors into account
4568 when deciding which selector to use.
4569 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4570 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4571 with a false third argument.
4572 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4573 to test whether the constant selector is valid and can_vec_perm_var_p
4574 to test whether a variable selector is valid.
4576 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4578 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4579 * optabs-query.c (can_vec_perm_p): Likewise.
4580 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4581 instead of vec_perm_indices.
4582 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4583 (vect_gen_perm_mask_checked): Likewise,
4584 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4585 (vect_gen_perm_mask_checked): Likewise,
4587 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4589 * optabs-query.h (qimode_for_vec_perm): Declare.
4590 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4591 (qimode_for_vec_perm): ...this new function.
4592 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4594 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4596 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4597 does not have a conditional at the top.
4599 2018-01-02 Richard Biener <rguenther@suse.de>
4601 * ipa-inline.c (big_speedup_p): Fix expression.
4603 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4606 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4609 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4613 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4614 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4615 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4616 cond_taken_branch_cost 3->4.
4618 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4620 PR tree-optimization/83581
4621 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4622 TODO_cleanup_cfg if any changes have been made.
4625 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4626 convert_modes if target mode has the right side, but different mode
4630 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4631 last argument when extracting from CONCAT. If either from_real or
4632 from_imag is NULL, use expansion through memory. If result is not
4633 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4634 the parts directly to inner mode, if even that fails, use expansion
4638 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4639 check for bswap in mode rather than HImode and use that in expand_unop
4642 Copyright (C) 2018 Free Software Foundation, Inc.
4644 Copying and distribution of this file, with or without modification,
4645 are permitted in any medium without royalty provided the copyright
4646 notice and this notice are preserved.