1 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
2 Alan Hayward <alan.hayward@arm.com>
3 David Sherwood <david.sherwood@arm.com>
5 * tree-vectorizer.h (vec_lower_bound): New structure.
6 (_loop_vec_info): Add check_nonzero and lower_bounds.
7 (LOOP_VINFO_CHECK_NONZERO): New macro.
8 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
9 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
10 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
11 fields. Make seg_len the distance travelled, not including the
13 (dr_direction_indicator): Declare.
14 (dr_zero_step_indicator): Likewise.
15 (dr_known_forward_stride_p): Likewise.
16 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
18 (runtime_alias_check_p): Allow runtime alias checks with
20 (operator ==): Compare access_size and align.
21 (prune_runtime_alias_test_list): Rework for new distinction between
22 the access_size and seg_len.
23 (create_intersect_range_checks_index): Likewise. Cope with polynomial
25 (get_segment_min_max): New function.
26 (create_intersect_range_checks): Use it.
27 (dr_step_indicator): New function.
28 (dr_direction_indicator): Likewise.
29 (dr_zero_step_indicator): Likewise.
30 (dr_known_forward_stride_p): Likewise.
31 * tree-loop-distribution.c (data_ref_segment_size): Return
32 DR_STEP * (niters - 1).
33 (compute_alias_check_pairs): Update call to the dr_with_seg_len
35 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
36 (vect_preserves_scalar_order_p): New function, split out from...
37 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
38 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
39 (vect_vfa_access_size): New function.
40 (vect_vfa_align): Likewise.
41 (vect_compile_time_alias): Take access_size_a and access_b arguments.
42 (dump_lower_bound): New function.
43 (vect_check_lower_bound): Likewise.
44 (vect_small_gap_p): Likewise.
45 (vectorizable_with_step_bound_p): Likewise.
46 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
47 depencies if the vectorization factor is 1. Convert the checks
48 for nonzero steps into checks on the bounds of DR_STEP. Try using
49 a bunds check for variable steps if the minimum required step is
50 relatively small. Update calls to the dr_with_seg_len
51 constructor and to vect_compile_time_alias.
52 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
54 (vect_loop_versioning): Call it.
55 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
57 (vect_estimate_min_profitable_iters): Account for any bounds checks.
59 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
60 Alan Hayward <alan.hayward@arm.com>
61 David Sherwood <david.sherwood@arm.com>
63 * doc/sourcebuild.texi (vect_scatter_store): Document.
64 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
66 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
68 * genopinit.c (main): Add supports_vec_scatter_store and
69 supports_vec_scatter_store_cached to target_optabs.
70 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
71 IFN_MASK_SCATTER_STORE.
72 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
74 * internal-fn.h (internal_store_fn_p): Declare.
75 (internal_fn_stored_value_index): Likewise.
76 * internal-fn.c (scatter_store_direct): New macro.
77 (expand_scatter_store_optab_fn): New function.
78 (direct_scatter_store_optab_supported_p): New macro.
79 (internal_store_fn_p): New function.
80 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
81 IFN_MASK_SCATTER_STORE.
82 (internal_fn_mask_index): Likewise.
83 (internal_fn_stored_value_index): New function.
84 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
86 * optabs-query.h (supports_vec_scatter_store_p): Declare.
87 * optabs-query.c (supports_vec_scatter_store_p): New function.
88 * tree-vectorizer.h (vect_get_store_rhs): Declare.
89 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
90 true for scatter stores.
91 (vect_gather_scatter_fn_p): Handle scatter stores too.
92 (vect_check_gather_scatter): Consider using scatter stores if
93 supports_vec_scatter_store_p.
94 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
96 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
97 internal_fn_stored_value_index.
98 (check_load_store_masking): Handle scatter stores too.
99 (vect_get_store_rhs): Make public.
100 (vectorizable_call): Use internal_store_fn_p.
101 (vectorizable_store): Handle scatter store internal functions.
102 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
103 when deciding whether the end of the group has been reached.
104 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
105 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
106 (mask_scatter_store<mode>): New insns.
108 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
109 Alan Hayward <alan.hayward@arm.com>
110 David Sherwood <david.sherwood@arm.com>
112 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
113 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
114 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
116 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
117 Use vect_truncate_gather_scatter_offset if we can't treat the
118 operation as a normal gather load or scatter store.
119 (get_group_load_store_type): Take the gather_scatter_info
120 as argument. Try using a gather load or scatter store for
121 single-element groups.
122 (get_load_store_type): Update calls to get_group_load_store_type
123 and vect_use_strided_gather_scatters_p.
125 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
126 Alan Hayward <alan.hayward@arm.com>
127 David Sherwood <david.sherwood@arm.com>
129 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
130 optional tree argument.
131 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
133 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
134 but continue to use the current value as a fallback.
135 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
136 to compare the updates.
137 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
138 (get_load_store_type): Use it when handling a strided access.
139 (vect_get_strided_load_store_ops): New function.
140 (vect_get_data_ptr_increment): Likewise.
141 (vectorizable_load): Handle strided gather loads. Always pass
142 a step to vect_create_data_ref_ptr and bump_vector_ptr.
144 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
145 Alan Hayward <alan.hayward@arm.com>
146 David Sherwood <david.sherwood@arm.com>
148 * doc/md.texi (gather_load@var{m}): Document.
149 (mask_gather_load@var{m}): Likewise.
150 * genopinit.c (main): Add supports_vec_gather_load and
151 supports_vec_gather_load_cached to target_optabs.
152 * optabs-tree.c (init_tree_optimization_optabs): Use
153 ggc_cleared_alloc to allocate target_optabs.
154 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
155 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
157 * internal-fn.h (internal_load_fn_p): Declare.
158 (internal_gather_scatter_fn_p): Likewise.
159 (internal_fn_mask_index): Likewise.
160 (internal_gather_scatter_fn_supported_p): Likewise.
161 * internal-fn.c (gather_load_direct): New macro.
162 (expand_gather_load_optab_fn): New function.
163 (direct_gather_load_optab_supported_p): New macro.
164 (direct_internal_fn_optab): New function.
165 (internal_load_fn_p): Likewise.
166 (internal_gather_scatter_fn_p): Likewise.
167 (internal_fn_mask_index): Likewise.
168 (internal_gather_scatter_fn_supported_p): Likewise.
169 * optabs-query.c (supports_at_least_one_mode_p): New function.
170 (supports_vec_gather_load_p): Likewise.
171 * optabs-query.h (supports_vec_gather_load_p): Declare.
172 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
173 and memory_type field.
174 (NUM_PATTERNS): Bump to 15.
175 * tree-vect-data-refs.c: Include internal-fn.h.
176 (vect_gather_scatter_fn_p): New function.
177 (vect_describe_gather_scatter_call): Likewise.
178 (vect_check_gather_scatter): Try using internal functions for
179 gather loads. Recognize existing calls to a gather load function.
180 (vect_analyze_data_refs): Consider using gather loads if
181 supports_vec_gather_load_p.
182 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
183 (vect_get_gather_scatter_offset_type): Likewise.
184 (vect_convert_mask_for_vectype): Likewise.
185 (vect_add_conversion_to_patterm): Likewise.
186 (vect_try_gather_scatter_pattern): Likewise.
187 (vect_recog_gather_scatter_pattern): New pattern recognizer.
188 (vect_vect_recog_func_ptrs): Add it.
189 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
190 internal_fn_mask_index and internal_gather_scatter_fn_p.
191 (check_load_store_masking): Take the gather_scatter_info as an
192 argument and handle gather loads.
193 (vect_get_gather_scatter_ops): New function.
194 (vectorizable_call): Check internal_load_fn_p.
195 (vectorizable_load): Likewise. Handle gather load internal
197 (vectorizable_store): Update call to check_load_store_masking.
198 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
199 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
200 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
201 (aarch64_gather_scale_operand_d): New predicates.
202 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
203 (mask_gather_load<mode>): New insns.
205 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
206 Alan Hayward <alan.hayward@arm.com>
207 David Sherwood <david.sherwood@arm.com>
209 * optabs.def (fold_left_plus_optab): New optab.
210 * doc/md.texi (fold_left_plus_@var{m}): Document.
211 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
212 * internal-fn.c (fold_left_direct): Define.
213 (expand_fold_left_optab_fn): Likewise.
214 (direct_fold_left_optab_supported_p): Likewise.
215 * fold-const-call.c (fold_const_fold_left): New function.
216 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
217 * tree-parloops.c (valid_reduction_p): New function.
218 (gather_scalar_reductions): Use it.
219 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
220 (vect_finish_replace_stmt): Declare.
221 * tree-vect-loop.c (fold_left_reduction_fn): New function.
222 (needs_fold_left_reduction_p): New function, split out from...
223 (vect_is_simple_reduction): ...here. Accept reductions that
224 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
225 (vect_force_simple_reduction): Also store the reduction type in
226 the assignment's STMT_VINFO_REDUC_TYPE.
227 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
228 (merge_with_identity): New function.
229 (vect_expand_fold_left): Likewise.
230 (vectorize_fold_left_reduction): Likewise.
231 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
232 scalar phi in place for it. Check for target support and reject
233 cases that would reassociate the operation. Defer the transform
234 phase to vectorize_fold_left_reduction.
235 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
236 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
237 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
239 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
241 * tree-if-conv.c (predicate_mem_writes): Remove redundant
242 call to ifc_temp_var.
244 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
245 Alan Hayward <alan.hayward@arm.com>
246 David Sherwood <david.sherwood@arm.com>
248 * target.def (legitimize_address_displacement): Take the original
249 offset as a poly_int.
250 * targhooks.h (default_legitimize_address_displacement): Update
252 * targhooks.c (default_legitimize_address_displacement): Likewise.
253 * doc/tm.texi: Regenerate.
254 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
255 as an argument, moving assert of ad->disp == ad->disp_term to...
256 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
257 Try calling targetm.legitimize_address_displacement before expanding
258 the address rather than afterwards, and adjust for the new interface.
259 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
260 Match the new hook interface. Handle SVE addresses.
261 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
264 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
266 * Makefile.in (OBJS): Add early-remat.o.
267 * target.def (select_early_remat_modes): New hook.
268 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
269 * doc/tm.texi: Regenerate.
270 * targhooks.h (default_select_early_remat_modes): Declare.
271 * targhooks.c (default_select_early_remat_modes): New function.
272 * timevar.def (TV_EARLY_REMAT): New timevar.
273 * passes.def (pass_early_remat): New pass.
274 * tree-pass.h (make_pass_early_remat): Declare.
275 * early-remat.c: New file.
276 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
278 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
280 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
281 Alan Hayward <alan.hayward@arm.com>
282 David Sherwood <david.sherwood@arm.com>
284 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
285 vfm1 with a bound_epilog parameter.
286 (vect_do_peeling): Update calls accordingly, and move the prologue
287 call earlier in the function. Treat the base bound_epilog as 0 for
288 fully-masked loops and retain vf - 1 for other loops. Add 1 to
289 this base when peeling for gaps.
290 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
291 with fully-masked loops.
292 (vect_estimate_min_profitable_iters): Handle the single peeled
293 iteration in that case.
295 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
296 Alan Hayward <alan.hayward@arm.com>
297 David Sherwood <david.sherwood@arm.com>
299 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
300 single-element interleaving even if the size is not a power of 2.
301 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
302 accesses for single-element interleaving if the group size is
305 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
306 Alan Hayward <alan.hayward@arm.com>
307 David Sherwood <david.sherwood@arm.com>
309 * doc/md.texi (fold_extract_last_@var{m}): Document.
310 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
311 * optabs.def (fold_extract_last_optab): New optab.
312 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
313 * internal-fn.c (fold_extract_direct): New macro.
314 (expand_fold_extract_optab_fn): Likewise.
315 (direct_fold_extract_optab_supported_p): Likewise.
316 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
317 * tree-vect-loop.c (vect_model_reduction_cost): Handle
318 EXTRACT_LAST_REDUCTION.
319 (get_initial_def_for_reduction): Do not create an initial vector
320 for EXTRACT_LAST_REDUCTION reductions.
321 (vectorizable_reduction): Leave the scalar phi in place for
322 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
323 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
324 epilogue code for EXTRACT_LAST_REDUCTION and defer the
325 transform phase to vectorizable_condition.
326 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
328 (vect_finish_stmt_generation): ...here.
329 (vect_finish_replace_stmt): New function.
330 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
331 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
333 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
335 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
336 Alan Hayward <alan.hayward@arm.com>
337 David Sherwood <david.sherwood@arm.com>
339 * doc/md.texi (extract_last_@var{m}): Document.
340 * optabs.def (extract_last_optab): New optab.
341 * internal-fn.def (EXTRACT_LAST): New internal function.
342 * internal-fn.c (cond_unary_direct): New macro.
343 (expand_cond_unary_optab_fn): Likewise.
344 (direct_cond_unary_optab_supported_p): Likewise.
345 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
346 loops using EXTRACT_LAST.
347 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
348 (extract_last_<mode>): ...this optab.
349 (vec_extract<mode><Vel>): Update accordingly.
351 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
352 Alan Hayward <alan.hayward@arm.com>
353 David Sherwood <david.sherwood@arm.com>
355 * target.def (empty_mask_is_expensive): New hook.
356 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
357 * doc/tm.texi: Regenerate.
358 * targhooks.h (default_empty_mask_is_expensive): Declare.
359 * targhooks.c (default_empty_mask_is_expensive): New function.
360 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
361 if the target says that empty masks are expensive.
362 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
364 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
366 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
367 Alan Hayward <alan.hayward@arm.com>
368 David Sherwood <david.sherwood@arm.com>
370 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
371 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
372 (vect_use_loop_mask_for_alignment_p): New function.
373 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
374 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
375 niters_skip argument. Make sure that the first niters_skip elements
376 of the first iteration are inactive.
377 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
378 Update call to vect_set_loop_masks_directly.
379 (get_misalign_in_elems): New function, split out from...
380 (vect_gen_prolog_loop_niters): ...here.
381 (vect_update_init_of_dr): Take a code argument that specifies whether
382 the adjustment should be added or subtracted.
383 (vect_update_init_of_drs): Likewise.
384 (vect_prepare_for_masked_peels): New function.
385 (vect_do_peeling): Skip prologue peeling if we're using a mask
386 instead. Update call to vect_update_inits_of_drs.
387 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
389 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
390 alignment. Do not include the number of peeled iterations in
391 the minimum threshold in that case.
392 (vectorizable_induction): Adjust the start value down by
393 LOOP_VINFO_MASK_SKIP_NITERS iterations.
394 (vect_transform_loop): Call vect_prepare_for_masked_peels.
395 Take the number of skipped iterations into account when calculating
397 * tree-vect-stmts.c (vect_gen_while_not): New function.
399 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
400 Alan Hayward <alan.hayward@arm.com>
401 David Sherwood <david.sherwood@arm.com>
403 * doc/sourcebuild.texi (vect_fully_masked): Document.
404 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
406 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
408 (vect_analyze_loop_2): ...here. Don't check the vectorization
409 factor against the number of loop iterations if the loop is
412 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
413 Alan Hayward <alan.hayward@arm.com>
414 David Sherwood <david.sherwood@arm.com>
416 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
417 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
418 (dump_groups): Update accordingly.
419 (iv_use::mem_type): New member variable.
420 (address_p): New function.
421 (record_use): Add a mem_type argument and initialize the new
423 (record_group_use): Add a mem_type argument. Use address_p.
424 Remove obsolete null checks of base_object. Update call to record_use.
425 (find_interesting_uses_op): Update call to record_group_use.
426 (find_interesting_uses_cond): Likewise.
427 (find_interesting_uses_address): Likewise.
428 (get_mem_type_for_internal_fn): New function.
429 (find_address_like_use): Likewise.
430 (find_interesting_uses_stmt): Try find_address_like_use before
431 calling find_interesting_uses_op.
432 (addr_offset_valid_p): Use the iv mem_type field as the type
433 of the addressed memory.
434 (add_autoinc_candidates): Likewise.
435 (get_address_cost): Likewise.
436 (split_small_address_groups_p): Use address_p.
437 (split_address_groups): Likewise.
438 (add_iv_candidate_for_use): Likewise.
439 (autoinc_possible_for_pair): Likewise.
440 (rewrite_groups): Likewise.
441 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
442 (determine_group_iv_cost): Update after split of USE_ADDRESS.
443 (get_alias_ptr_type_for_ptr_address): New function.
444 (rewrite_use_address): Rewrite address uses in calls that were
445 identified by find_address_like_use.
447 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
448 Alan Hayward <alan.hayward@arm.com>
449 David Sherwood <david.sherwood@arm.com>
451 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
453 * gimple-expr.h (is_gimple_addressable: Likewise.
454 * gimple-expr.c (is_gimple_address): Likewise.
455 * internal-fn.c (expand_call_mem_ref): New function.
456 (expand_mask_load_optab_fn): Use it.
457 (expand_mask_store_optab_fn): Likewise.
459 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
460 Alan Hayward <alan.hayward@arm.com>
461 David Sherwood <david.sherwood@arm.com>
463 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
464 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
465 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
466 (cond_umax@var{mode}): Document.
467 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
468 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
469 (cond_umin_optab, cond_umax_optab): New optabs.
470 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
471 (COND_IOR, COND_XOR): New internal functions.
472 * internal-fn.h (get_conditional_internal_fn): Declare.
473 * internal-fn.c (cond_binary_direct): New macro.
474 (expand_cond_binary_optab_fn): Likewise.
475 (direct_cond_binary_optab_supported_p): Likewise.
476 (get_conditional_internal_fn): New function.
477 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
478 Cope with reduction statements that are vectorized as calls rather
480 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
481 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
482 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
483 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
484 (UNSPEC_COND_EOR): New unspecs.
485 (optab): Add mappings for them.
486 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
487 (sve_int_op, sve_fp_op): New int attributes.
489 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
490 Alan Hayward <alan.hayward@arm.com>
491 David Sherwood <david.sherwood@arm.com>
493 * optabs.def (while_ult_optab): New optab.
494 * doc/md.texi (while_ult@var{m}@var{n}): Document.
495 * internal-fn.def (WHILE_ULT): New internal function.
496 * internal-fn.h (direct_internal_fn_supported_p): New override
497 that takes two types as argument.
498 * internal-fn.c (while_direct): New macro.
499 (expand_while_optab_fn): New function.
500 (convert_optab_supported_p): Likewise.
501 (direct_while_optab_supported_p): New macro.
502 * wide-int.h (wi::udiv_ceil): New function.
503 * tree-vectorizer.h (rgroup_masks): New structure.
504 (vec_loop_masks): New typedef.
505 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
507 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
508 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
509 (vect_max_vf): New function.
510 (slpeel_make_loop_iterate_ntimes): Delete.
511 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
512 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
513 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
514 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
515 internal-fn.h, stor-layout.h and optabs-query.h.
516 (vect_set_loop_mask): New function.
517 (add_preheader_seq): Likewise.
518 (add_header_seq): Likewise.
519 (interleave_supported_p): Likewise.
520 (vect_maybe_permute_loop_masks): Likewise.
521 (vect_set_loop_masks_directly): Likewise.
522 (vect_set_loop_condition_masked): Likewise.
523 (vect_set_loop_condition_unmasked): New function, split out from
524 slpeel_make_loop_iterate_ntimes.
525 (slpeel_make_loop_iterate_ntimes): Rename to..
526 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
527 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
528 (vect_do_peeling): Update call accordingly.
529 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
531 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
532 mask_compare_type, can_fully_mask_p and fully_masked_p.
533 (release_vec_loop_masks): New function.
534 (_loop_vec_info): Use it to free the loop masks.
535 (can_produce_all_loop_masks_p): New function.
536 (vect_get_max_nscalars_per_iter): Likewise.
537 (vect_verify_full_masking): Likewise.
538 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
539 retries, and free the mask rgroups before retrying. Check loop-wide
540 reasons for disallowing fully-masked loops. Make the final decision
541 about whether use a fully-masked loop or not.
542 (vect_estimate_min_profitable_iters): Do not assume that peeling
543 for the number of iterations will be needed for fully-masked loops.
544 (vectorizable_reduction): Disable fully-masked loops.
545 (vectorizable_live_operation): Likewise.
546 (vect_halve_mask_nunits): New function.
547 (vect_double_mask_nunits): Likewise.
548 (vect_record_loop_mask): Likewise.
549 (vect_get_loop_mask): Likewise.
550 (vect_transform_loop): Handle the case in which the final loop
551 iteration might handle a partial vector. Call vect_set_loop_condition
552 instead of slpeel_make_loop_iterate_ntimes.
553 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
554 (check_load_store_masking): New function.
555 (prepare_load_store_mask): Likewise.
556 (vectorizable_store): Handle fully-masked loops.
557 (vectorizable_load): Likewise.
558 (supportable_widening_operation): Use vect_halve_mask_nunits for
560 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
561 (vect_gen_while): New function.
562 * config/aarch64/aarch64.md (umax<mode>3): New expander.
563 (aarch64_uqdec<mode>): New insn.
565 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
566 Alan Hayward <alan.hayward@arm.com>
567 David Sherwood <david.sherwood@arm.com>
569 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
570 (reduc_xor_scal_optab): New optabs.
571 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
572 (reduc_xor_scal_@var{m}): Document.
573 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
574 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
576 * fold-const-call.c (fold_const_call): Handle them.
577 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
578 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
579 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
580 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
581 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
582 (UNSPEC_XORV): New unspecs.
583 (optab): Add entries for them.
584 (BITWISEV): New int iterator.
585 (bit_reduc_op): New int attributes.
587 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
588 Alan Hayward <alan.hayward@arm.com>
589 David Sherwood <david.sherwood@arm.com>
591 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
592 * internal-fn.def (VEC_SHL_INSERT): New internal function.
593 * optabs.def (vec_shl_insert_optab): New optab.
594 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
595 (duplicate_and_interleave): Likewise.
596 * tree-vect-loop.c: Include internal-fn.h.
597 (neutral_op_for_slp_reduction): New function, split out from
598 get_initial_defs_for_reduction.
599 (get_initial_def_for_reduction): Handle option 2 for variable-length
600 vectors by loading the neutral value into a vector and then shifting
601 the initial value into element 0.
602 (get_initial_defs_for_reduction): Replace the code argument with
603 the neutral value calculated by neutral_op_for_slp_reduction.
604 Use gimple_build_vector for constant-length vectors.
605 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
606 but the first group_size elements have a neutral value.
607 Use duplicate_and_interleave otherwise.
608 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
609 Update call to get_initial_defs_for_reduction. Handle SLP
610 reductions for variable-length vectors by creating one vector
611 result for each scalar result, with the elements associated
612 with other scalar results stubbed out with the neutral value.
613 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
614 Require IFN_VEC_SHL_INSERT for double reductions on
615 variable-length vectors, or SLP reductions that have
616 a neutral value. Require can_duplicate_and_interleave_p
617 support for variable-length unchained SLP reductions if there
618 is no neutral value, such as for MIN/MAX reductions. Also require
619 the number of vector elements to be a multiple of the number of
620 SLP statements when doing variable-length unchained SLP reductions.
621 Update call to vect_create_epilog_for_reduction.
622 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
623 and remove initial values.
624 (duplicate_and_interleave): Make public.
625 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
626 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
628 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
629 Alan Hayward <alan.hayward@arm.com>
630 David Sherwood <david.sherwood@arm.com>
632 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
633 (can_duplicate_and_interleave_p): New function.
634 (vect_get_and_check_slp_defs): Take the vector of statements
635 rather than just the current one. Remove excess parentheses.
636 Restriction rejectinon of vect_constant_def and vect_external_def
637 for variable-length vectors to boolean types, or types for which
638 can_duplicate_and_interleave_p is false.
639 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
640 (duplicate_and_interleave): New function.
641 (vect_get_constant_vectors): Use gimple_build_vector for
642 constant-length vectors and suitable variable-length constant
643 vectors. Use duplicate_and_interleave for other variable-length
644 vectors. Don't defer the update when inserting new statements.
646 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
647 Alan Hayward <alan.hayward@arm.com>
648 David Sherwood <david.sherwood@arm.com>
650 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
651 min_profitable_iters doesn't go negative.
653 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
654 Alan Hayward <alan.hayward@arm.com>
655 David Sherwood <david.sherwood@arm.com>
657 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
658 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
659 * optabs.def (vec_mask_load_lanes_optab): New optab.
660 (vec_mask_store_lanes_optab): Likewise.
661 * internal-fn.def (MASK_LOAD_LANES): New internal function.
662 (MASK_STORE_LANES): Likewise.
663 * internal-fn.c (mask_load_lanes_direct): New macro.
664 (mask_store_lanes_direct): Likewise.
665 (expand_mask_load_optab_fn): Handle masked operations.
666 (expand_mask_load_lanes_optab_fn): New macro.
667 (expand_mask_store_optab_fn): Handle masked operations.
668 (expand_mask_store_lanes_optab_fn): New macro.
669 (direct_mask_load_lanes_optab_supported_p): Likewise.
670 (direct_mask_store_lanes_optab_supported_p): Likewise.
671 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
673 (vect_load_lanes_supported): Likewise.
674 * tree-vect-data-refs.c (strip_conversion): New function.
675 (can_group_stmts_p): Likewise.
676 (vect_analyze_data_ref_accesses): Use it instead of checking
677 for a pair of assignments.
678 (vect_store_lanes_supported): Take a masked_p parameter.
679 (vect_load_lanes_supported): Likewise.
680 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
681 vect_store_lanes_supported and vect_load_lanes_supported.
682 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
683 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
684 parameter. Don't allow gaps for masked accesses.
685 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
686 and vect_load_lanes_supported.
687 (get_load_store_type): Take a masked_p parameter and update
688 call to get_group_load_store_type.
689 (vectorizable_store): Update call to get_load_store_type.
690 Handle IFN_MASK_STORE_LANES.
691 (vectorizable_load): Update call to get_load_store_type.
692 Handle IFN_MASK_LOAD_LANES.
694 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
695 Alan Hayward <alan.hayward@arm.com>
696 David Sherwood <david.sherwood@arm.com>
698 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
700 * config/aarch64/aarch64-protos.h
701 (aarch64_sve_struct_memory_operand_p): Declare.
702 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
703 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
704 (VPRED, vpred): Handle SVE structure modes.
705 * config/aarch64/constraints.md (Utx): New constraint.
706 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
707 (aarch64_sve_struct_nonimmediate_operand): New predicates.
708 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
709 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
710 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
711 structure modes. Split into pieces after RA.
712 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
713 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
715 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
717 (aarch64_classify_address): Likewise.
718 (sizetochar): Move earlier in file.
719 (aarch64_print_operand): Handle SVE register lists.
720 (aarch64_array_mode): New function.
721 (aarch64_sve_struct_memory_operand_p): Likewise.
722 (TARGET_ARRAY_MODE): Redefine.
724 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
725 Alan Hayward <alan.hayward@arm.com>
726 David Sherwood <david.sherwood@arm.com>
728 * target.def (array_mode): New target hook.
729 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
730 * doc/tm.texi: Regenerate.
731 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
732 * hooks.c (hook_optmode_mode_uhwi_none): New function.
733 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
735 * stor-layout.c (mode_for_array): Likewise. Support polynomial
738 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
739 Alan Hayward <alan.hayward@arm.com>
740 David Sherwood <david.sherwood@arm.com>
742 * fold-const.c (fold_binary_loc): Check the argument types
743 rather than the result type when testing for a vector operation.
745 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
747 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
748 * doc/tm.texi: Regenerate.
750 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
751 Alan Hayward <alan.hayward@arm.com>
752 David Sherwood <david.sherwood@arm.com>
754 * doc/invoke.texi (-msve-vector-bits=): Document new option.
755 (sve): Document new AArch64 extension.
756 * doc/md.texi (w): Extend the description of the AArch64
757 constraint to include SVE vectors.
758 (Upl, Upa): Document new AArch64 predicate constraints.
759 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
761 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
762 (msve-vector-bits=): New option.
763 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
764 SVE when these are disabled.
765 (sve): New extension.
766 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
767 modes. Adjust their number of units based on aarch64_sve_vg.
768 (MAX_BITSIZE_MODE_ANY_MODE): Define.
769 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
770 aarch64_addr_query_type.
771 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
772 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
773 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
774 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
775 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
776 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
777 (aarch64_simd_imm_zero_p): Delete.
778 (aarch64_check_zero_based_sve_index_immediate): Declare.
779 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
780 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
781 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
782 (aarch64_sve_float_mul_immediate_p): Likewise.
783 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
785 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
786 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
787 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
788 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
789 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
790 (aarch64_regmode_natural_size): Likewise.
791 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
792 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
794 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
795 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
796 for VG and the SVE predicate registers.
797 (V_ALIASES): Add a "z"-prefixed alias.
798 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
799 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
800 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
801 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
802 (REG_CLASS_NAMES): Add entries for them.
803 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
804 and the predicate registers.
805 (aarch64_sve_vg): Declare.
806 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
807 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
808 (REGMODE_NATURAL_SIZE): Define.
809 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
811 * config/aarch64/aarch64.c: Include cfgrtl.h.
812 (simd_immediate_info): Add a constructor for series vectors,
813 and an associated step field.
814 (aarch64_sve_vg): New variable.
815 (aarch64_dbx_register_number): Handle VG and the predicate registers.
816 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
817 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
818 (VEC_ANY_DATA, VEC_STRUCT): New constants.
819 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
820 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
821 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
822 (aarch64_get_mask_mode): New functions.
823 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
824 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
825 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
826 predicate modes and predicate registers. Explicitly restrict
827 GPRs to modes of 16 bytes or smaller. Only allow FP registers
828 to store a vector mode if it is recognized by
829 aarch64_classify_vector_mode.
830 (aarch64_regmode_natural_size): New function.
831 (aarch64_hard_regno_caller_save_mode): Return the original mode
833 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
834 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
835 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
836 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
838 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
839 does not overlap dest if the function is frame-related. Handle
841 (aarch64_split_add_offset): New function.
842 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
843 them aarch64_add_offset.
844 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
845 and update call to aarch64_sub_sp.
846 (aarch64_add_cfa_expression): New function.
847 (aarch64_expand_prologue): Pass extra temporary registers to the
848 functions above. Handle the case in which we need to emit new
849 DW_CFA_expressions for registers that were originally saved
850 relative to the stack pointer, but now have to be expressed
851 relative to the frame pointer.
852 (aarch64_output_mi_thunk): Pass extra temporary registers to the
854 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
855 IP0 and IP1 values for SVE frames.
856 (aarch64_expand_vec_series): New function.
857 (aarch64_expand_sve_widened_duplicate): Likewise.
858 (aarch64_expand_sve_const_vector): Likewise.
859 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
860 Handle SVE constants. Use emit_move_insn to move a force_const_mem
861 into the register, rather than emitting a SET directly.
862 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
863 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
864 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
865 (offset_9bit_signed_scaled_p): New functions.
866 (aarch64_replicate_bitmask_imm): New function.
867 (aarch64_bitmask_imm): Use it.
868 (aarch64_cannot_force_const_mem): Reject expressions involving
869 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
870 (aarch64_classify_index): Handle SVE indices, by requiring
871 a plain register index with a scale that matches the element size.
872 (aarch64_classify_address): Handle SVE addresses. Assert that
873 the mode of the address is VOIDmode or an integer mode.
874 Update call to aarch64_classify_symbol.
875 (aarch64_classify_symbolic_expression): Update call to
876 aarch64_classify_symbol.
877 (aarch64_const_vec_all_in_range_p): New function.
878 (aarch64_print_vector_float_operand): Likewise.
879 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
880 "vN" for FP registers with SVE modes. Handle (const ...) vectors
881 and the FP immediates 1.0 and 0.5.
882 (aarch64_print_address_internal): Handle SVE addresses.
883 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
884 (aarch64_regno_regclass): Handle predicate registers.
885 (aarch64_secondary_reload): Handle big-endian reloads of SVE
887 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
888 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
889 (aarch64_convert_sve_vector_bits): New function.
890 (aarch64_override_options): Use it to handle -msve-vector-bits=.
891 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
893 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
894 Handle SVE vector and predicate modes. Accept VL-based constants
895 that need only one temporary register, and VL offsets that require
896 no temporary registers.
897 (aarch64_conditional_register_usage): Mark the predicate registers
898 as fixed if SVE isn't available.
899 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
900 Return true for SVE vector and predicate modes.
901 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
902 rather than an unsigned int. Handle SVE modes.
903 (aarch64_preferred_simd_mode): Update call accordingly. Handle
905 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
907 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
908 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
909 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
910 (aarch64_sve_float_mul_immediate_p): New functions.
911 (aarch64_sve_valid_immediate): New function.
912 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
913 Explicitly reject structure modes. Check for INDEX constants.
914 Handle PTRUE and PFALSE constants.
915 (aarch64_check_zero_based_sve_index_immediate): New function.
916 (aarch64_simd_imm_zero_p): Delete.
917 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
918 vector modes. Accept constants in the range of CNT[BHWD].
919 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
920 ask for an Advanced SIMD mode.
921 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
922 (aarch64_simd_vector_alignment): Handle SVE predicates.
923 (aarch64_vectorize_preferred_vector_alignment): New function.
924 (aarch64_simd_vector_alignment_reachable): Use it instead of
926 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
927 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
929 (MAX_VECT_LEN): Delete.
930 (expand_vec_perm_d): Add a vec_flags field.
931 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
932 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
933 (aarch64_evpc_ext): Don't apply a big-endian lane correction
935 (aarch64_evpc_rev): Rename to...
936 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
937 (aarch64_evpc_rev_global): New function.
938 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
939 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
941 (aarch64_evpc_sve_tbl): New function.
942 (aarch64_expand_vec_perm_const_1): Update after rename of
943 aarch64_evpc_rev. Handle SVE permutes too, trying
944 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
945 than aarch64_evpc_tbl.
946 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
947 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
948 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
949 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
950 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
951 (aarch64_expand_sve_vcond): New functions.
952 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
953 of aarch64_vector_mode_p.
954 (aarch64_dwarf_poly_indeterminate_value): New function.
955 (aarch64_compute_pressure_classes): Likewise.
956 (aarch64_can_change_mode_class): Likewise.
957 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
958 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
959 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
960 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
961 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
962 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
963 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
964 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
966 (Dn, Dl, Dr): Accept const as well as const_vector.
967 (Dz): Likewise. Compare against CONST0_RTX.
968 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
969 of "vector" where appropriate.
970 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
971 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
972 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
973 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
974 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
975 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
976 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
977 (v_int_equiv): Extend to SVE modes.
978 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
980 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
981 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
982 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
983 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
984 (SVE_COND_FP_CMP): New int iterators.
985 (perm_hilo): Handle the new unpack unspecs.
986 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
988 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
989 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
990 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
991 (aarch64_equality_operator, aarch64_constant_vector_operand)
992 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
993 (aarch64_sve_nonimmediate_operand): Likewise.
994 (aarch64_sve_general_operand): Likewise.
995 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
996 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
997 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
998 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
999 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1000 (aarch64_sve_float_arith_immediate): Likewise.
1001 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1002 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1003 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1004 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1005 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1006 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1007 (aarch64_sve_float_arith_operand): Likewise.
1008 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1009 (aarch64_sve_float_mul_operand): Likewise.
1010 (aarch64_sve_vec_perm_operand): Likewise.
1011 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1012 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1013 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1014 as well as const_vector.
1015 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1016 in file. Use CONST0_RTX and CONSTM1_RTX.
1017 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1018 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1019 Use aarch64_simd_imm_zero.
1020 * config/aarch64/aarch64-sve.md: New file.
1021 * config/aarch64/aarch64.md: Include it.
1022 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1023 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1024 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1025 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1026 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1027 (sve): New attribute.
1028 (enabled): Disable instructions with the sve attribute unless
1030 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1031 aarch64_expand_mov_immediate.
1032 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1033 CNT[BHSD] immediates.
1034 (movti): Split CONST_POLY_INT moves into two halves.
1035 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1036 Split additions that need a temporary here if the destination
1037 is the stack pointer.
1038 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1039 (*add<mode>3_poly_1): New instruction.
1040 (set_clobber_cc): New expander.
1042 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1044 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1045 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1046 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1047 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1048 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1049 Change innermode from fixed_mode_size to machine_mode.
1050 (simplify_subreg): Update call accordingly. Handle a constant-sized
1051 subreg of a variable-length CONST_VECTOR.
1053 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1054 Alan Hayward <alan.hayward@arm.com>
1055 David Sherwood <david.sherwood@arm.com>
1057 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1058 (add_offset_to_base): New function, split out from...
1059 (create_mem_ref): ...here. When handling a scale other than 1,
1060 check first whether the address is valid without the offset.
1061 Add it into the base if so, leaving the index and scale as-is.
1063 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1066 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1067 fold_for_warn before checking if arg2 is INTEGER_CST.
1069 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1071 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1072 (store_multiple_operation): Delete.
1073 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1074 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1075 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1076 guarded by TARGET_STRING.
1077 (rs6000_output_load_multiple): Delete.
1078 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1079 OPTION_MASK_STRING / TARGET_STRING handling.
1080 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1081 (const rs6000_opt_masks) <"string">: Change mask to 0.
1082 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1083 (MASK_STRING): Delete.
1084 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1086 (load_multiple): Delete.
1093 (store_multiple): Delete.
1100 (movmemsi_8reg): Delete.
1101 (corresponding unnamed define_insn): Delete.
1102 (movmemsi_6reg): Delete.
1103 (corresponding unnamed define_insn): Delete.
1104 (movmemsi_4reg): Delete.
1105 (corresponding unnamed define_insn): Delete.
1106 (movmemsi_2reg): Delete.
1107 (corresponding unnamed define_insn): Delete.
1108 (movmemsi_1reg): Delete.
1109 (corresponding unnamed define_insn): Delete.
1110 * config/rs6000/rs6000.opt (mno-string): New.
1111 (mstring): Replace by deprecation warning stub.
1112 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1114 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1116 * regrename.c (regrename_do_replace): If replacing the same
1117 reg multiple times, try to reuse last created gen_raw_REG.
1120 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1121 main to workaround a bug in GDB.
1123 2018-01-12 Tom de Vries <tom@codesourcery.com>
1126 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1128 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1130 PR rtl-optimization/80481
1131 * ira-color.c (get_cap_member): New function.
1132 (allocnos_conflict_by_live_ranges_p): Use it.
1133 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1134 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1136 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1139 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1140 (*saddl_se_1): Ditto.
1142 (*saddl_se_1): Ditto.
1144 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1146 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1147 rather than wi::to_widest for DR_INITs.
1148 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1149 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1150 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1152 (vect_analyze_group_access_1): Note that here.
1154 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1156 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1157 polynomial type sizes.
1159 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1161 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1162 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1163 (gimple_add_tmp_var): Likewise.
1165 2018-01-12 Martin Liska <mliska@suse.cz>
1167 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1168 (gimple_alloc_sizes): Likewise.
1169 (dump_gimple_statistics): Use PRIu64 in printf format.
1170 * gimple.h: Change uint64_t to int.
1172 2018-01-12 Martin Liska <mliska@suse.cz>
1174 * tree-core.h: Use uint64_t instead of int.
1175 * tree.c (tree_node_counts): Likewise.
1176 (tree_node_sizes): Likewise.
1177 (dump_tree_statistics): Use PRIu64 in printf format.
1179 2018-01-12 Martin Liska <mliska@suse.cz>
1181 * Makefile.in: As qsort_chk is implemented in vec.c, add
1182 vec.o to linkage of gencfn-macros.
1183 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1184 passing the info to record_node_allocation_statistics.
1185 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1187 * ggc-common.c (struct ggc_usage): Add operator== and use
1188 it in operator< and compare function.
1189 * mem-stats.h (struct mem_usage): Likewise.
1190 * vec.c (struct vec_usage): Remove operator< and compare
1191 function. Can be simply inherited.
1193 2018-01-12 Martin Jambor <mjambor@suse.cz>
1196 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1197 * tree-ssa-math-opts.c: Include domwalk.h.
1198 (convert_mult_to_fma_1): New function.
1199 (fma_transformation_info): New type.
1200 (fma_deferring_state): Likewise.
1201 (cancel_fma_deferring): New function.
1202 (result_of_phi): Likewise.
1203 (last_fma_candidate_feeds_initial_phi): Likewise.
1204 (convert_mult_to_fma): Added deferring logic, split actual
1205 transformation to convert_mult_to_fma_1.
1206 (math_opts_dom_walker): New type.
1207 (math_opts_dom_walker::after_dom_children): New method, body moved
1208 here from pass_optimize_widening_mul::execute, added deferring logic
1210 (pass_optimize_widening_mul::execute): Moved most of code to
1211 math_opts_dom_walker::after_dom_children.
1212 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1213 * config/i386/i386.c (ix86_option_override_internal): Added
1214 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1216 2018-01-12 Richard Biener <rguenther@suse.de>
1219 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1220 inline instance vars.
1222 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1225 * config/rx/rx.c (rx_is_restricted_memory_address):
1228 2018-01-12 Richard Biener <rguenther@suse.de>
1230 PR tree-optimization/80846
1231 * target.def (split_reduction): New target hook.
1232 * targhooks.c (default_split_reduction): New function.
1233 * targhooks.h (default_split_reduction): Declare.
1234 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1235 target requests first reduce vectors by combining low and high
1237 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1238 (get_vectype_for_scalar_type_and_size): Export.
1239 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1240 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1241 * doc/tm.texi: Regenerate.
1242 * config/i386/i386.c (ix86_split_reduction): Implement
1243 TARGET_VECTORIZE_SPLIT_REDUCTION.
1245 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1248 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1249 in PIC mode except for TARGET_VXWORKS_RTP.
1250 * config/sparc/sparc.c: Include cfgrtl.h.
1251 (TARGET_INIT_PIC_REG): Define.
1252 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1253 (sparc_pic_register_p): New predicate.
1254 (sparc_legitimate_address_p): Use it.
1255 (sparc_legitimize_pic_address): Likewise.
1256 (sparc_delegitimize_address): Likewise.
1257 (sparc_mode_dependent_address_p): Likewise.
1258 (gen_load_pcrel_sym): Remove 4th parameter.
1259 (load_got_register): Adjust call to above. Remove obsolete stuff.
1260 (sparc_expand_prologue): Do not call load_got_register here.
1261 (sparc_flat_expand_prologue): Likewise.
1262 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1263 (sparc_use_pseudo_pic_reg): New function.
1264 (sparc_init_pic_reg): Likewise.
1265 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1266 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1268 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1270 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1271 Add item for branch_cost.
1273 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1275 PR rtl-optimization/83565
1276 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1277 not extend the result to a larger mode for rotate operations.
1278 (num_sign_bit_copies1): Likewise.
1280 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1283 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1285 Use values-Xc.o for -pedantic.
1286 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1288 2018-01-12 Martin Liska <mliska@suse.cz>
1291 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1293 (possible_polymorphic_call_targets): Use it.
1294 (ipa_devirt): Likewise.
1296 2018-01-12 Martin Liska <mliska@suse.cz>
1298 * profile-count.h (enum profile_quality): Use 0 as invalid
1299 enum value of profile_quality.
1301 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1303 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1304 -mext-string options.
1306 2018-01-12 Richard Biener <rguenther@suse.de>
1308 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1309 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1310 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1312 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1314 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1316 * configure.ac (--with-long-double-format): Add support for the
1317 configuration option to change the default long double format on
1319 * config.gcc (powerpc*-linux*-*): Likewise.
1320 * configure: Regenerate.
1321 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1322 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1323 used without modification.
1325 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1327 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1328 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1329 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1330 MISC_BUILTIN_SPEC_BARRIER.
1331 (rs6000_init_builtins): Likewise.
1332 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1334 (speculation_barrier): New define_insn.
1335 * doc/extend.texi: Document __builtin_speculation_barrier.
1337 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1340 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1341 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1342 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1344 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1345 integral modes instead of "ss" and "sd".
1346 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1347 vectors with 32-bit and 64-bit elements.
1348 (vecdupssescalarmodesuffix): New mode attribute.
1349 (vec_dup<mode>): Use it.
1351 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1354 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1355 frame if argument is passed on stack.
1357 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1360 * ree.c (combine_reaching_defs): Optimize also
1361 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1362 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1364 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1367 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1369 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1372 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1373 after they are computed.
1375 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1377 PR tree-optimization/83695
1378 * gimple-loop-linterchange.cc
1379 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1380 reset cached scev information after interchange.
1381 (pass_linterchange::execute): Remove call to scev_reset_htab.
1383 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1385 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1386 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1387 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1388 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1389 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1390 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1391 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1392 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1393 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1394 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1395 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1396 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1397 (V_lane_reg): Likewise.
1398 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1400 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1401 (vfmal_lane_low<mode>_intrinsic,
1402 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1403 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1404 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1405 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1406 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1407 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1409 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1411 * config/arm/arm-cpus.in (fp16fml): New feature.
1412 (ALL_SIMD): Add fp16fml.
1413 (armv8.2-a): Add fp16fml as an option.
1414 (armv8.3-a): Likewise.
1415 (armv8.4-a): Add fp16fml as part of fp16.
1416 * config/arm/arm.h (TARGET_FP16FML): Define.
1417 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1419 * config/arm/arm-modes.def (V2HF): Define.
1420 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1421 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1422 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1423 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1424 vfmsl_low, vfmsl_high): New set of builtins.
1425 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1426 (vfml_op): New code attribute.
1427 (VFMLHALVES): New int iterator.
1428 (VFML, VFMLSEL): New mode attributes.
1429 (V_reg): Define mapping for V2HF.
1430 (V_hi, V_lo): New mode attributes.
1431 (VF_constraint): Likewise.
1432 (vfml_half, vfml_half_selector): New int attributes.
1433 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1435 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1436 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1438 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1439 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1440 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1441 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1443 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1444 Document new effective target and option set.
1446 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1448 * config/arm/arm-cpus.in (armv8_4): New feature.
1449 (ARMv8_4a): New fgroup.
1450 (armv8.4-a): New arch.
1451 * config/arm/arm-tables.opt: Regenerate.
1452 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1453 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1454 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1455 Add matching rules for -march=armv8.4-a and extensions.
1456 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1458 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1461 * config/rx/rx.md (BW): New mode attribute.
1462 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1464 2018-01-11 Richard Biener <rguenther@suse.de>
1466 PR tree-optimization/83435
1467 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1468 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1469 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1471 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1472 Alan Hayward <alan.hayward@arm.com>
1473 David Sherwood <david.sherwood@arm.com>
1475 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1477 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1478 (aarch64_print_address_internal): Use it to check for a zero offset.
1480 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1481 Alan Hayward <alan.hayward@arm.com>
1482 David Sherwood <david.sherwood@arm.com>
1484 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1485 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1486 Return a poly_int64 rather than a HOST_WIDE_INT.
1487 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1488 rather than a HOST_WIDE_INT.
1489 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1490 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1491 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1492 final_offset from HOST_WIDE_INT to poly_int64.
1493 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1494 to_constant when getting the number of units in an Advanced SIMD
1496 (aarch64_builtin_vectorized_function): Check for a constant number
1498 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1500 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1501 attribute instead of GET_MODE_NUNITS.
1502 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1503 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1504 GET_MODE_SIZE for fixed-size registers.
1505 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1506 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1507 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1508 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1509 (aarch64_print_operand, aarch64_print_address_internal)
1510 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1511 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1512 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1513 Handle polynomial GET_MODE_SIZE.
1514 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1515 wider than SImode without modification.
1516 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1517 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1518 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1519 passing and returning SVE modes.
1520 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1521 rather than GEN_INT.
1522 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1523 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1524 (aarch64_allocate_and_probe_stack_space): Likewise.
1525 (aarch64_layout_frame): Cope with polynomial offsets.
1526 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1527 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1529 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1530 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1531 poly_int64 rather than a HOST_WIDE_INT.
1532 (aarch64_get_separate_components, aarch64_process_components)
1533 (aarch64_expand_prologue, aarch64_expand_epilogue)
1534 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1535 (aarch64_anchor_offset): New function, split out from...
1536 (aarch64_legitimize_address): ...here.
1537 (aarch64_builtin_vectorization_cost): Handle polynomial
1538 TYPE_VECTOR_SUBPARTS.
1539 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1541 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1542 number of elements from the PARALLEL rather than the mode.
1543 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1544 rather than GET_MODE_BITSIZE.
1545 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1546 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1547 (aarch64_expand_vec_perm_const_1): Handle polynomial
1548 d->perm.length () and d->perm elements.
1549 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
1550 Apply to_constant to d->perm elements.
1551 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1552 polynomial CONST_VECTOR_NUNITS.
1553 (aarch64_move_pointer): Take amount as a poly_int64 rather
1555 (aarch64_progress_pointer): Avoid temporary variable.
1556 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1557 the mode attribute instead of GET_MODE.
1559 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1560 Alan Hayward <alan.hayward@arm.com>
1561 David Sherwood <david.sherwood@arm.com>
1563 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1564 x exists before using it.
1565 (aarch64_add_constant_internal): Rename to...
1566 (aarch64_add_offset_1): ...this. Replace regnum with separate
1567 src and dest rtxes. Handle the case in which they're different,
1568 including when the offset is zero. Replace scratchreg with an rtx.
1569 Use 2 additions if there is no spare register into which we can
1570 move a 16-bit constant.
1571 (aarch64_add_constant): Delete.
1572 (aarch64_add_offset): Replace reg with separate src and dest
1573 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
1574 Use aarch64_add_offset_1.
1575 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1576 an rtx rather than an int. Take the delta as a poly_int64
1577 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
1578 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1579 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1580 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1581 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1583 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1584 aarch64_add_constant.
1586 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1588 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1589 Use scalar_float_mode.
1591 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1593 * config/aarch64/aarch64-simd.md
1594 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1595 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1596 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1597 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1598 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1599 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1600 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1601 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1602 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1603 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1605 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1608 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1609 targ_options->x_arm_arch_string is non NULL.
1611 2018-01-11 Tamar Christina <tamar.christina@arm.com>
1613 * config/aarch64/aarch64.h
1614 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
1616 2018-01-11 Sudakshina Das <sudi.das@arm.com>
1619 * expmed.c (emit_store_flag_force): Swap if const op0
1620 and change VOIDmode to mode of op0.
1622 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1624 PR rtl-optimization/83761
1625 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1626 than bytes to mode_for_size.
1628 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1631 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1632 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1635 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1638 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1639 when in layout mode.
1640 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1641 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1644 2018-01-10 Michael Collison <michael.collison@arm.com>
1646 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1647 * config/aarch64/aarch64-option-extension.def: Add
1648 AARCH64_OPT_EXTENSION of 'fp16fml'.
1649 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1650 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1651 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1652 * config/aarch64/constraints.md (Ui7): New constraint.
1653 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1654 (VFMLA_SEL_W): Ditto.
1657 (VFMLA16_LOW): New int iterator.
1658 (VFMLA16_HIGH): Ditto.
1659 (UNSPEC_FMLAL): New unspec.
1660 (UNSPEC_FMLSL): Ditto.
1661 (UNSPEC_FMLAL2): Ditto.
1662 (UNSPEC_FMLSL2): Ditto.
1663 (f16mac): New code attribute.
1664 * config/aarch64/aarch64-simd-builtins.def
1665 (aarch64_fmlal_lowv2sf): Ditto.
1666 (aarch64_fmlsl_lowv2sf): Ditto.
1667 (aarch64_fmlalq_lowv4sf): Ditto.
1668 (aarch64_fmlslq_lowv4sf): Ditto.
1669 (aarch64_fmlal_highv2sf): Ditto.
1670 (aarch64_fmlsl_highv2sf): Ditto.
1671 (aarch64_fmlalq_highv4sf): Ditto.
1672 (aarch64_fmlslq_highv4sf): Ditto.
1673 (aarch64_fmlal_lane_lowv2sf): Ditto.
1674 (aarch64_fmlsl_lane_lowv2sf): Ditto.
1675 (aarch64_fmlal_laneq_lowv2sf): Ditto.
1676 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
1677 (aarch64_fmlalq_lane_lowv4sf): Ditto.
1678 (aarch64_fmlsl_lane_lowv4sf): Ditto.
1679 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
1680 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
1681 (aarch64_fmlal_lane_highv2sf): Ditto.
1682 (aarch64_fmlsl_lane_highv2sf): Ditto.
1683 (aarch64_fmlal_laneq_highv2sf): Ditto.
1684 (aarch64_fmlsl_laneq_highv2sf): Ditto.
1685 (aarch64_fmlalq_lane_highv4sf): Ditto.
1686 (aarch64_fmlsl_lane_highv4sf): Ditto.
1687 (aarch64_fmlalq_laneq_highv4sf): Ditto.
1688 (aarch64_fmlsl_laneq_highv4sf): Ditto.
1689 * config/aarch64/aarch64-simd.md:
1690 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
1691 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1692 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1693 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1694 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1695 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1696 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1697 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1698 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1699 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1700 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1701 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1702 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1703 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1704 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1705 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1706 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1707 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1708 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1709 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1710 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1711 (vfmlsl_low_u32): Ditto.
1712 (vfmlalq_low_u32): Ditto.
1713 (vfmlslq_low_u32): Ditto.
1714 (vfmlal_high_u32): Ditto.
1715 (vfmlsl_high_u32): Ditto.
1716 (vfmlalq_high_u32): Ditto.
1717 (vfmlslq_high_u32): Ditto.
1718 (vfmlal_lane_low_u32): Ditto.
1719 (vfmlsl_lane_low_u32): Ditto.
1720 (vfmlal_laneq_low_u32): Ditto.
1721 (vfmlsl_laneq_low_u32): Ditto.
1722 (vfmlalq_lane_low_u32): Ditto.
1723 (vfmlslq_lane_low_u32): Ditto.
1724 (vfmlalq_laneq_low_u32): Ditto.
1725 (vfmlslq_laneq_low_u32): Ditto.
1726 (vfmlal_lane_high_u32): Ditto.
1727 (vfmlsl_lane_high_u32): Ditto.
1728 (vfmlal_laneq_high_u32): Ditto.
1729 (vfmlsl_laneq_high_u32): Ditto.
1730 (vfmlalq_lane_high_u32): Ditto.
1731 (vfmlslq_lane_high_u32): Ditto.
1732 (vfmlalq_laneq_high_u32): Ditto.
1733 (vfmlslq_laneq_high_u32): Ditto.
1734 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1735 (AARCH64_FL_FOR_ARCH8_4): New.
1736 (AARCH64_ISA_F16FML): New ISA flag.
1737 (TARGET_F16FML): New feature flag for fp16fml.
1738 (doc/invoke.texi): Document new fp16fml option.
1740 2018-01-10 Michael Collison <michael.collison@arm.com>
1742 * config/aarch64/aarch64-builtins.c:
1743 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1744 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1745 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1746 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1747 (AARCH64_ISA_SHA3): New ISA flag.
1748 (TARGET_SHA3): New feature flag for sha3.
1749 * config/aarch64/iterators.md (sha512_op): New int attribute.
1750 (CRYPTO_SHA512): New int iterator.
1751 (UNSPEC_SHA512H): New unspec.
1752 (UNSPEC_SHA512H2): Ditto.
1753 (UNSPEC_SHA512SU0): Ditto.
1754 (UNSPEC_SHA512SU1): Ditto.
1755 * config/aarch64/aarch64-simd-builtins.def
1756 (aarch64_crypto_sha512hqv2di): New builtin.
1757 (aarch64_crypto_sha512h2qv2di): Ditto.
1758 (aarch64_crypto_sha512su0qv2di): Ditto.
1759 (aarch64_crypto_sha512su1qv2di): Ditto.
1760 (aarch64_eor3qv8hi): Ditto.
1761 (aarch64_rax1qv2di): Ditto.
1762 (aarch64_xarqv2di): Ditto.
1763 (aarch64_bcaxqv8hi): Ditto.
1764 * config/aarch64/aarch64-simd.md:
1765 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
1766 (aarch64_crypto_sha512su0qv2di): Ditto.
1767 (aarch64_crypto_sha512su1qv2di): Ditto.
1768 (aarch64_eor3qv8hi): Ditto.
1769 (aarch64_rax1qv2di): Ditto.
1770 (aarch64_xarqv2di): Ditto.
1771 (aarch64_bcaxqv8hi): Ditto.
1772 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
1773 (vsha512h2q_u64): Ditto.
1774 (vsha512su0q_u64): Ditto.
1775 (vsha512su1q_u64): Ditto.
1776 (veor3q_u16): Ditto.
1777 (vrax1q_u64): Ditto.
1779 (vbcaxq_u16): Ditto.
1780 * config/arm/types.md (crypto_sha512): New type attribute.
1781 (crypto_sha3): Ditto.
1782 (doc/invoke.texi): Document new sha3 option.
1784 2018-01-10 Michael Collison <michael.collison@arm.com>
1786 * config/aarch64/aarch64-builtins.c:
1787 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
1788 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1789 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
1790 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
1791 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
1792 (AARCH64_ISA_SM4): New ISA flag.
1793 (TARGET_SM4): New feature flag for sm4.
1794 * config/aarch64/aarch64-simd-builtins.def
1795 (aarch64_sm3ss1qv4si): Ditto.
1796 (aarch64_sm3tt1aq4si): Ditto.
1797 (aarch64_sm3tt1bq4si): Ditto.
1798 (aarch64_sm3tt2aq4si): Ditto.
1799 (aarch64_sm3tt2bq4si): Ditto.
1800 (aarch64_sm3partw1qv4si): Ditto.
1801 (aarch64_sm3partw2qv4si): Ditto.
1802 (aarch64_sm4eqv4si): Ditto.
1803 (aarch64_sm4ekeyqv4si): Ditto.
1804 * config/aarch64/aarch64-simd.md:
1805 (aarch64_sm3ss1qv4si): Ditto.
1806 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
1807 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
1808 (aarch64_sm4eqv4si): Ditto.
1809 (aarch64_sm4ekeyqv4si): Ditto.
1810 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
1811 (sm3part_op): Ditto.
1812 (CRYPTO_SM3TT): Ditto.
1813 (CRYPTO_SM3PART): Ditto.
1814 (UNSPEC_SM3SS1): New unspec.
1815 (UNSPEC_SM3TT1A): Ditto.
1816 (UNSPEC_SM3TT1B): Ditto.
1817 (UNSPEC_SM3TT2A): Ditto.
1818 (UNSPEC_SM3TT2B): Ditto.
1819 (UNSPEC_SM3PARTW1): Ditto.
1820 (UNSPEC_SM3PARTW2): Ditto.
1821 (UNSPEC_SM4E): Ditto.
1822 (UNSPEC_SM4EKEY): Ditto.
1823 * config/aarch64/constraints.md (Ui2): New constraint.
1824 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
1825 * config/arm/types.md (crypto_sm3): New type attribute.
1826 (crypto_sm4): Ditto.
1827 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
1828 (vsm3tt1aq_u32): Ditto.
1829 (vsm3tt1bq_u32): Ditto.
1830 (vsm3tt2aq_u32): Ditto.
1831 (vsm3tt2bq_u32): Ditto.
1832 (vsm3partw1q_u32): Ditto.
1833 (vsm3partw2q_u32): Ditto.
1834 (vsm4eq_u32): Ditto.
1835 (vsm4ekeyq_u32): Ditto.
1836 (doc/invoke.texi): Document new sm4 option.
1838 2018-01-10 Michael Collison <michael.collison@arm.com>
1840 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
1841 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
1842 (AARCH64_FL_FOR_ARCH8_4): New.
1843 (AARCH64_FL_V8_4): New flag.
1844 (doc/invoke.texi): Document new armv8.4-a option.
1846 2018-01-10 Michael Collison <michael.collison@arm.com>
1848 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1849 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
1850 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
1851 * config/aarch64/aarch64-option-extension.def: Add
1852 AARCH64_OPT_EXTENSION of 'sha2'.
1853 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
1854 (crypto): Disable sha2 and aes if crypto disabled.
1855 (crypto): Enable aes and sha2 if enabled.
1856 (simd): Disable sha2 and aes if simd disabled.
1857 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
1859 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
1860 (TARGET_SHA2): New feature flag for sha2.
1861 (TARGET_AES): New feature flag for aes.
1862 * config/aarch64/aarch64-simd.md:
1863 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
1864 conditional on TARGET_AES.
1865 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
1866 (aarch64_crypto_sha1hsi): Make pattern conditional
1868 (aarch64_crypto_sha1hv4si): Ditto.
1869 (aarch64_be_crypto_sha1hv4si): Ditto.
1870 (aarch64_crypto_sha1su1v4si): Ditto.
1871 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
1872 (aarch64_crypto_sha1su0v4si): Ditto.
1873 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
1874 (aarch64_crypto_sha256su0v4si): Ditto.
1875 (aarch64_crypto_sha256su1v4si): Ditto.
1876 (doc/invoke.texi): Document new aes and sha2 options.
1878 2018-01-10 Martin Sebor <msebor@redhat.com>
1880 PR tree-optimization/83781
1881 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
1884 2018-01-11 Martin Sebor <msebor@gmail.com>
1885 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1887 PR tree-optimization/83501
1888 PR tree-optimization/81703
1890 * tree-ssa-strlen.c (get_string_cst): Rename...
1891 (get_string_len): ...to this. Handle global constants.
1892 (handle_char_store): Adjust.
1894 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
1895 Jim Wilson <jimw@sifive.com>
1897 * config/riscv/riscv-protos.h (riscv_output_return): New.
1898 * config/riscv/riscv.c (struct machine_function): New naked_p field.
1899 (riscv_attribute_table, riscv_output_return),
1900 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
1901 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
1902 (riscv_compute_frame_info): Only compute frame->mask if not a naked
1904 (riscv_expand_prologue): Add early return for naked function.
1905 (riscv_expand_epilogue): Likewise.
1906 (riscv_function_ok_for_sibcall): Return false for naked function.
1907 (riscv_set_current_function): New.
1908 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
1909 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
1910 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
1911 * doc/extend.texi (RISC-V Function Attributes): New.
1913 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
1915 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
1916 check for 128-bit long double before checking TCmode.
1917 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
1918 128-bit long doubles before checking TFmode or TCmode.
1919 (FLOAT128_IBM_P): Likewise.
1921 2018-01-10 Martin Sebor <msebor@redhat.com>
1923 PR tree-optimization/83671
1924 * builtins.c (c_strlen): Unconditionally return zero for the empty
1926 Use -Warray-bounds for warnings.
1927 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
1928 for non-constant array indices with COMPONENT_REF, arrays of
1929 arrays, and pointers to arrays.
1930 (gimple_fold_builtin_strlen): Determine and set length range for
1931 non-constant character arrays.
1933 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
1936 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
1939 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
1941 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
1943 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
1946 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
1947 VECTOR_MEM_ALTIVEC_OR_VSX_P.
1948 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
1949 indexed_or_indirect_operand predicate.
1950 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
1951 (*vsx_le_perm_load_v8hi): Likewise.
1952 (*vsx_le_perm_load_v16qi): Likewise.
1953 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
1954 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
1955 (*vsx_le_perm_store_v8hi): Likewise.
1956 (*vsx_le_perm_store_v16qi): Likewise.
1957 (eight unnamed splitters): Likewise.
1959 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
1961 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
1962 * config/rs6000/emmintrin.h: Likewise.
1963 * config/rs6000/mmintrin.h: Likewise.
1964 * config/rs6000/xmmintrin.h: Likewise.
1966 2018-01-10 David Malcolm <dmalcolm@redhat.com>
1969 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
1971 * tree.c (tree_nop_conversion): Return true for location wrapper
1973 (maybe_wrap_with_location): New function.
1974 (selftest::check_strip_nops): New function.
1975 (selftest::test_location_wrappers): New function.
1976 (selftest::tree_c_tests): Call it.
1977 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
1978 (maybe_wrap_with_location): New decl.
1979 (EXPR_LOCATION_WRAPPER_P): New macro.
1980 (location_wrapper_p): New inline function.
1981 (tree_strip_any_location_wrapper): New inline function.
1983 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
1986 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
1987 stack_realign_offset for the largest alignment of stack slot
1989 (ix86_find_max_used_stack_alignment): New function.
1990 (ix86_finalize_stack_frame_flags): Use it. Set
1991 max_used_stack_alignment if we don't realign stack.
1992 * config/i386/i386.h (machine_function): Add
1993 max_used_stack_alignment.
1995 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
1997 * config/arm/arm.opt (-mbranch-cost): New option.
1998 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2001 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2004 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2005 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2007 2018-01-10 Richard Biener <rguenther@suse.de>
2010 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2011 early out so it also covers the case where we have a non-NULL
2014 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2016 PR tree-optimization/83753
2017 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2018 for non-strided grouped accesses if the number of elements is 1.
2020 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2023 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2024 * i386.h (TARGET_USE_GATHER): Define.
2025 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2027 2018-01-10 Martin Liska <mliska@suse.cz>
2030 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2031 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2033 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2034 CLEANUP_NO_PARTITIONING is not set.
2036 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2038 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2039 for vectors, as a partial revert of r254296.
2040 * rtl.h (const_vec_p): Delete.
2041 (const_vec_duplicate_p): Don't test for vector CONSTs.
2042 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2043 * expmed.c (make_tree): Likewise.
2046 * common.md (E, F): Use CONSTANT_P instead of checking for
2048 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2049 checking for CONST_VECTOR.
2051 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2054 * predict.c (force_edge_cold): Handle in more sane way edges
2057 2018-01-09 Carl Love <cel@us.ibm.com>
2059 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2061 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2062 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2063 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2064 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2065 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2066 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2067 * config/rs6000/rs6000-protos.h: Add extern defition for
2068 rs6000_generate_float2_double_code.
2069 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2071 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2072 (float2_v2df): Add define_expand.
2074 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2077 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2078 op_mode in the force_to_mode call.
2080 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2082 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2083 instead of checking each element individually.
2084 (aarch64_evpc_uzp): Likewise.
2085 (aarch64_evpc_zip): Likewise.
2086 (aarch64_evpc_ext): Likewise.
2087 (aarch64_evpc_rev): Likewise.
2088 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2089 instead of checking each element individually. Return true without
2091 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2092 whether all selected elements come from the same input, instead of
2093 checking each element individually. Remove calls to gen_rtx_REG,
2094 start_sequence and end_sequence and instead assert that no rtl is
2097 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2099 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2100 order of HIGH and CONST checks.
2102 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2104 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2105 if the destination isn't an SSA_NAME.
2107 2018-01-09 Richard Biener <rguenther@suse.de>
2109 PR tree-optimization/83668
2110 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2112 (canonicalize_loop_form): ... here, renamed from ...
2113 (canonicalize_loop_closed_ssa_form): ... this and amended to
2114 swap successor edges for loop exit blocks to make us use
2115 the RPO order we need for initial schedule generation.
2117 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2119 PR tree-optimization/64811
2120 * match.pd: When optimizing comparisons with Inf, avoid
2121 introducing or losing exceptions from comparisons with NaN.
2123 2018-01-09 Martin Liska <mliska@suse.cz>
2126 * asan.c (shadow_mem_size): Add gcc_assert.
2128 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2130 Don't save registers in main().
2133 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2134 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2135 * config/avr/avr.c (avr_set_current_function): Don't error if
2136 naked, OS_task or OS_main are specified at the same time.
2137 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2139 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2141 * common/config/avr/avr-common.c (avr_option_optimization_table):
2142 Switch on -mmain-is-OS_task for optimizing compilations.
2144 2018-01-09 Richard Biener <rguenther@suse.de>
2146 PR tree-optimization/83572
2147 * graphite.c: Include cfganal.h.
2148 (graphite_transform_loops): Connect infinite loops to exit
2149 and remove fake edges at the end.
2151 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2153 * ipa-inline.c (edge_badness): Revert accidental checkin.
2155 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2158 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2159 symbols; not inline clones.
2161 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2164 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2165 hard registers. Formatting fixes.
2167 PR preprocessor/83722
2168 * gcc.c (try_generate_repro): Pass
2169 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2170 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2173 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2174 Kito Cheng <kito.cheng@gmail.com>
2176 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2177 (riscv_leaf_function_p): Delete.
2178 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2180 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2182 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2184 (do_ifelse): New function.
2185 (do_isel): New function.
2186 (do_sub3): New function.
2187 (do_add3): New function.
2188 (do_load_mask_compare): New function.
2189 (do_overlap_load_compare): New function.
2190 (expand_compare_loop): New function.
2191 (expand_block_compare): Call expand_compare_loop() when appropriate.
2192 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2194 (-mblock-compare-inline-loop-limit): New option.
2196 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2199 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2200 Reverse order of second and third operands in first alternative.
2201 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2202 of first and second elements in UNSPEC_VPERMR vector.
2203 (altivec_expand_vec_perm_le): Likewise.
2205 2017-01-08 Jeff Law <law@redhat.com>
2207 PR rtl-optimizatin/81308
2208 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2209 (process_switch): If group_case_labels makes a change, then set
2211 (pass_convert_switch::execute): If a switch is converted, then
2212 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2214 PR rtl-optimization/81308
2215 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2218 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2220 PR target/83663 - Revert r255946
2221 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2222 generation for cases where splatting a value is not useful.
2223 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2224 across a vec_duplicate and a paradoxical subreg forming a vector
2225 mode to a vec_concat.
2227 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2229 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2230 -march=armv8.3-a variants.
2231 * config/arm/t-multilib: Likewise.
2232 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2234 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2236 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2238 (cceq_ior_compare_complement): Give it a name so I can use it, and
2239 change boolean_or_operator predicate to boolean_operator so it can
2240 be used to generate a crand.
2241 (eqne): New code iterator.
2242 (bd/bd_neg): New code_attrs.
2243 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2244 a single define_insn.
2245 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2246 decrement (bdnzt/bdnzf/bdzt/bdzf).
2247 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2248 with the new names of the branch decrement patterns, and added the
2249 names of the branch decrement conditional patterns.
2251 2018-01-08 Richard Biener <rguenther@suse.de>
2253 PR tree-optimization/83563
2254 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2257 2018-01-08 Richard Biener <rguenther@suse.de>
2260 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2262 2018-01-08 Richard Biener <rguenther@suse.de>
2264 PR tree-optimization/83685
2265 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2266 references to abnormals.
2268 2018-01-08 Richard Biener <rguenther@suse.de>
2271 * dwarf2out.c (output_indirect_strings): Handle empty
2272 skeleton_debug_str_hash.
2273 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2275 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2277 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2278 (emit_store_direct): Likewise.
2279 (arc_trampoline_adjust_address): Likewise.
2280 (arc_asm_trampoline_template): New function.
2281 (arc_initialize_trampoline): Use asm_trampoline_template.
2282 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2283 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2284 * config/arc/arc.md (flush_icache): Delete pattern.
2286 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2288 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2289 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2292 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2295 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2296 by not USED_FOR_TARGET.
2297 (make_pass_resolve_sw_modes): Likewise.
2299 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2301 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2304 2018-01-08 Richard Biener <rguenther@suse.de>
2307 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2309 2018-01-08 Richard Biener <rguenther@suse.de>
2312 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2314 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2317 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2318 basic blocks with a small number of successors.
2319 (convert_control_dep_chain_into_preds): Improve handling of
2321 (dump_predicates): Split apart into...
2322 (dump_pred_chain): ...here...
2323 (dump_pred_info): ...and here.
2324 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2325 (can_chain_union_be_invalidated_p): Improve check for invalidation
2327 (uninit_uses_cannot_happen): Avoid unnecessary if
2328 convert_control_dep_chain_into_preds yielded nothing.
2330 2018-01-06 Martin Sebor <msebor@redhat.com>
2332 PR tree-optimization/83640
2333 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2334 subtracting negative offset from size.
2335 (builtin_access::overlap): Adjust offset bounds of the access to fall
2336 within the size of the object if possible.
2338 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2340 PR rtl-optimization/83699
2341 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2342 extract_bit_field_as_subreg to cases in which the extracted
2343 value is also a vector.
2345 * lra-constraints.c (process_alt_operands): Test for the equivalence
2346 substitutions when detecting a possible reload cycle.
2348 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2351 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2352 by default if flag_selective_schedling{,2}. Formatting fixes.
2354 PR rtl-optimization/83682
2355 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2356 if it has non-VECTOR_MODE element mode.
2357 (vec_duplicate_p): Likewise.
2360 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2361 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2363 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2366 * config/i386/i386-builtin.def
2367 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2368 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2369 Require also OPTION_MASK_ISA_AVX512F in addition to
2370 OPTION_MASK_ISA_GFNI.
2371 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2372 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2373 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2374 to OPTION_MASK_ISA_GFNI.
2375 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2376 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2377 OPTION_MASK_ISA_AVX512BW.
2378 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2379 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2380 addition to OPTION_MASK_ISA_GFNI.
2381 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2382 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2383 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2384 to OPTION_MASK_ISA_GFNI.
2385 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2386 a requirement for all ISAs rather than any of them with a few
2388 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2390 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2391 bitmasks to be enabled with 3 exceptions, instead of requiring any
2392 enabled ISA with lots of exceptions.
2393 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2394 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2395 Change avx512bw in isa attribute to avx512f.
2396 * config/i386/sgxintrin.h: Add license boilerplate.
2397 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2398 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2399 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2400 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2402 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2403 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2404 temporarily sse2 rather than sse if not enabled already.
2407 * config/i386/sse.md (VI248_VLBW): Rename to ...
2408 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2409 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2410 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2411 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2412 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2413 mode iterator instead of VI248_VLBW.
2415 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2417 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2418 (record_modified): Skip clobbers; add debug output.
2419 (param_change_prob): Use sreal frequencies.
2421 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2423 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2424 punt for user-aligned variables.
2426 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2428 * tree-chrec.c (chrec_contains_symbols): Return true for
2431 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2434 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2435 of (x|y) == x for BICS pattern.
2437 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2439 PR tree-optimization/83605
2440 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2441 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2444 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2446 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2447 * config/epiphany/rtems.h: New file.
2449 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2450 Uros Bizjak <ubizjak@gmail.com>
2453 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2454 QIreg_operand instead of register_operand predicate.
2455 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2456 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2457 comments instead of -fmitigate[-_]rop.
2459 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2462 * cgraphunit.c (symbol_table::compile): Switch to text_section
2463 before calling assembly_start debug hook.
2464 * run-rtl-passes.c (run_rtl_passes): Likewise.
2467 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2469 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2470 range_int_cst_p rather than !symbolic_range_p before calling
2471 extract_range_from_multiplicative_op_1.
2473 2017-01-04 Jeff Law <law@redhat.com>
2475 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2476 redundant test in assertion.
2478 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2480 * doc/rtl.texi: Document machine_mode wrapper classes.
2482 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2484 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2487 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2489 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2490 the VEC_PERM_EXPR fold to fail.
2492 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2495 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2496 to switched_sections.
2498 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2501 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2504 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2507 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2508 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2510 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2513 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2514 is BLKmode and bitpos not zero or mode change is needed.
2516 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2519 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2522 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2525 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2526 instead of MULT rtx. Update all corresponding splitters.
2528 (*ssub<modesuffix>): Ditto.
2530 (*cmp_sadd_di): Update split patterns.
2531 (*cmp_sadd_si): Ditto.
2532 (*cmp_sadd_sidi): Ditto.
2533 (*cmp_ssub_di): Ditto.
2534 (*cmp_ssub_si): Ditto.
2535 (*cmp_ssub_sidi): Ditto.
2536 * config/alpha/predicates.md (const23_operand): New predicate.
2537 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2538 Look for ASHIFT, not MULT inner operand.
2539 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2541 2018-01-04 Martin Liska <mliska@suse.cz>
2543 PR gcov-profile/83669
2544 * gcov.c (output_intermediate_file): Add version to intermediate
2546 * doc/gcov.texi: Document new field 'version' in intermediate
2547 file format. Fix location of '-k' option of gcov command.
2549 2018-01-04 Martin Liska <mliska@suse.cz>
2552 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2554 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2556 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2558 2018-01-03 Martin Sebor <msebor@redhat.com>
2560 PR tree-optimization/83655
2561 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2562 checking calls with invalid arguments.
2564 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2566 * tree-vect-stmts.c (vect_get_store_rhs): New function.
2567 (vectorizable_mask_load_store): Delete.
2568 (vectorizable_call): Return false for masked loads and stores.
2569 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
2570 instead of gimple_assign_rhs1.
2571 (vectorizable_load): Handle IFN_MASK_LOAD.
2572 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2574 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2576 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2578 (vectorizable_mask_load_store): ...here.
2579 (vectorizable_load): ...and here.
2581 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2583 * tree-vect-stmts.c (vect_build_all_ones_mask)
2584 (vect_build_zero_merge_argument): New functions, split out from...
2585 (vectorizable_load): ...here.
2587 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2589 * tree-vect-stmts.c (vect_check_store_rhs): New function,
2591 (vectorizable_mask_load_store): ...here.
2592 (vectorizable_store): ...and here.
2594 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2596 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2598 (vectorizable_mask_load_store): ...here.
2600 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2602 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2603 (vect_model_store_cost): Take a vec_load_store_type instead of a
2605 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2606 (vect_model_store_cost): Take a vec_load_store_type instead of a
2608 (vectorizable_mask_load_store): Update accordingly.
2609 (vectorizable_store): Likewise.
2610 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2612 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2614 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2615 IFN_MASK_LOAD calls here rather than...
2616 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2618 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2619 Alan Hayward <alan.hayward@arm.com>
2620 David Sherwood <david.sherwood@arm.com>
2622 * expmed.c (extract_bit_field_1): For vector extracts,
2623 fall back to extract_bit_field_as_subreg if vec_extract
2626 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2627 Alan Hayward <alan.hayward@arm.com>
2628 David Sherwood <david.sherwood@arm.com>
2630 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2631 they are variable or constant sized.
2632 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2633 slots for constant-sized data.
2635 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2636 Alan Hayward <alan.hayward@arm.com>
2637 David Sherwood <david.sherwood@arm.com>
2639 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2640 handling COND_EXPRs with boolean comparisons, try to find a better
2641 basis for the mask type than the boolean itself.
2643 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2645 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2646 is calculated and how it can be overridden.
2647 * genmodes.c (max_bitsize_mode_any_mode): New variable.
2648 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2650 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2653 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2654 Alan Hayward <alan.hayward@arm.com>
2655 David Sherwood <david.sherwood@arm.com>
2657 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
2658 Remove the mode argument.
2659 (aarch64_simd_valid_immediate): Remove the mode and inverse
2661 * config/aarch64/iterators.md (bitsize): New iterator.
2662 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
2663 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
2664 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
2665 aarch64_simd_valid_immediate.
2666 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
2667 (aarch64_reg_or_bic_imm): Likewise.
2668 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
2669 with an insn_type enum and msl with a modifier_type enum.
2670 Replace element_width with a scalar_mode. Change the shift
2671 to unsigned int. Add constructors for scalar_float_mode and
2672 scalar_int_mode elements.
2673 (aarch64_vect_float_const_representable_p): Delete.
2674 (aarch64_can_const_movi_rtx_p)
2675 (aarch64_simd_scalar_immediate_valid_for_move)
2676 (aarch64_simd_make_constant): Update call to
2677 aarch64_simd_valid_immediate.
2678 (aarch64_advsimd_valid_immediate_hs): New function.
2679 (aarch64_advsimd_valid_immediate): Likewise.
2680 (aarch64_simd_valid_immediate): Remove mode and inverse
2681 arguments. Rewrite to use the above. Use const_vec_duplicate_p
2682 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
2683 and aarch64_float_const_representable_p on the result.
2684 (aarch64_output_simd_mov_immediate): Remove mode argument.
2685 Update call to aarch64_simd_valid_immediate and use of
2686 simd_immediate_info.
2687 (aarch64_output_scalar_simd_mov_immediate): Update call
2690 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2691 Alan Hayward <alan.hayward@arm.com>
2692 David Sherwood <david.sherwood@arm.com>
2694 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2695 (mode_nunits): Likewise CONST_MODE_NUNITS.
2696 * machmode.def (ADJUST_NUNITS): Document.
2697 * genmodes.c (mode_data::need_nunits_adj): New field.
2698 (blank_mode): Update accordingly.
2699 (adj_nunits): New variable.
2700 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2702 (emit_mode_size_inline): Set need_bytesize_adj for all modes
2703 listed in adj_nunits.
2704 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2705 listed in adj_nunits. Don't emit case statements for such modes.
2706 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2707 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
2708 nothing if adj_nunits is nonnull.
2709 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2710 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2711 (emit_mode_fbit): Update use of print_maybe_const_decl.
2712 (emit_move_size): Likewise. Treat the array as non-const
2714 (emit_mode_adjustments): Handle adj_nunits.
2716 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2718 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2719 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2720 (VECTOR_MODES): Use it.
2721 (make_vector_modes): Take the prefix as an argument.
2723 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2724 Alan Hayward <alan.hayward@arm.com>
2725 David Sherwood <david.sherwood@arm.com>
2727 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2728 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2729 for MODE_VECTOR_BOOL.
2730 * machmode.def (VECTOR_BOOL_MODE): Document.
2731 * genmodes.c (VECTOR_BOOL_MODE): New macro.
2732 (make_vector_bool_mode): New function.
2733 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2735 * lto-streamer-in.c (lto_input_mode_table): Likewise.
2736 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2738 * stor-layout.c (int_mode_for_mode): Likewise.
2739 * tree.c (build_vector_type_for_mode): Likewise.
2740 * varasm.c (output_constant_pool_2): Likewise.
2741 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2742 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
2743 for MODE_VECTOR_BOOL.
2744 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2745 of mode class checks.
2746 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2747 instead of a list of mode class checks.
2748 (expand_vector_scalar_condition): Likewise.
2749 (type_for_widest_vector_mode): Handle BImode as an inner mode.
2751 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2752 Alan Hayward <alan.hayward@arm.com>
2753 David Sherwood <david.sherwood@arm.com>
2755 * machmode.h (mode_size): Change from unsigned short to
2757 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2758 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2759 or if measurement_type is not polynomial.
2760 (fixed_size_mode::includes_p): Check for constant-sized modes.
2761 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2762 return a poly_uint16 rather than an unsigned short.
2763 (emit_mode_size): Change the type of mode_size from unsigned short
2764 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
2765 (emit_mode_adjustments): Cope with polynomial vector sizes.
2766 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2768 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2770 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
2771 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
2772 * caller-save.c (setup_save_areas): Likewise.
2773 (replace_reg_with_saved_mem): Likewise.
2774 * calls.c (emit_library_call_value_1): Likewise.
2775 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
2776 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
2777 (gen_lowpart_for_combine): Likewise.
2778 * convert.c (convert_to_integer_1): Likewise.
2779 * cse.c (equiv_constant, cse_insn): Likewise.
2780 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
2781 (cselib_subst_to_values): Likewise.
2782 * dce.c (word_dce_process_block): Likewise.
2783 * df-problems.c (df_word_lr_mark_ref): Likewise.
2784 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
2785 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
2786 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
2787 (rtl_for_decl_location): Likewise.
2788 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
2789 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
2790 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
2791 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
2792 (expand_expr_real_1): Likewise.
2793 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
2794 (pad_below): Likewise.
2795 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2796 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
2797 * ira.c (get_subreg_tracking_sizes): Likewise.
2798 * ira-build.c (ira_create_allocno_objects): Likewise.
2799 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
2800 (ira_sort_regnos_for_alter_reg): Likewise.
2801 * ira-costs.c (record_operand_costs): Likewise.
2802 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
2803 (resolve_simple_move): Likewise.
2804 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
2805 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
2806 (lra_constraints): Likewise.
2807 (CONST_POOL_OK_P): Reject variable-sized modes.
2808 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
2809 (add_pseudo_to_slot, lra_spill): Likewise.
2810 * omp-low.c (omp_clause_aligned_alignment): Likewise.
2811 * optabs-query.c (get_best_extraction_insn): Likewise.
2812 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2813 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
2814 (expand_mult_highpart, valid_multiword_target_p): Likewise.
2815 * recog.c (offsettable_address_addr_space_p): Likewise.
2816 * regcprop.c (maybe_mode_change): Likewise.
2817 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
2818 * regrename.c (build_def_use): Likewise.
2819 * regstat.c (dump_reg_info): Likewise.
2820 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
2821 (find_reloads, find_reloads_subreg_address): Likewise.
2822 * reload1.c (eliminate_regs_1): Likewise.
2823 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
2824 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
2825 (simplify_binary_operation_1, simplify_subreg): Likewise.
2826 * targhooks.c (default_function_arg_padding): Likewise.
2827 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
2828 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
2829 (verify_gimple_assign_ternary): Likewise.
2830 * tree-inline.c (estimate_move_cost): Likewise.
2831 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2832 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
2833 (get_address_cost_ainc): Likewise.
2834 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
2835 (vect_supportable_dr_alignment): Likewise.
2836 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2837 (vectorizable_reduction): Likewise.
2838 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
2839 (vectorizable_operation, vectorizable_load): Likewise.
2840 * tree.c (build_same_sized_truth_vector_type): Likewise.
2841 * valtrack.c (cleanup_auto_inc_dec): Likewise.
2842 * var-tracking.c (emit_note_insn_var_location): Likewise.
2843 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
2844 (ADDR_VEC_ALIGN): Likewise.
2846 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2847 Alan Hayward <alan.hayward@arm.com>
2848 David Sherwood <david.sherwood@arm.com>
2850 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
2852 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2853 or if measurement_type is polynomial.
2854 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
2855 * combine.c (make_extraction): Likewise.
2856 * dse.c (find_shift_sequence): Likewise.
2857 * dwarf2out.c (mem_loc_descriptor): Likewise.
2858 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
2859 (extract_bit_field, extract_low_bits): Likewise.
2860 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
2861 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
2862 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
2863 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
2864 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2865 * reload.c (find_reloads): Likewise.
2866 * reload1.c (alter_reg): Likewise.
2867 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
2868 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
2869 * tree-if-conv.c (predicate_mem_writes): Likewise.
2870 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
2871 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
2872 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
2873 * valtrack.c (dead_debug_insert_temp): Likewise.
2874 * varasm.c (mergeable_constant_section): Likewise.
2875 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
2877 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2878 Alan Hayward <alan.hayward@arm.com>
2879 David Sherwood <david.sherwood@arm.com>
2881 * expr.c (expand_assignment): Cope with polynomial mode sizes
2882 when assigning to a CONCAT.
2884 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2885 Alan Hayward <alan.hayward@arm.com>
2886 David Sherwood <david.sherwood@arm.com>
2888 * machmode.h (mode_precision): Change from unsigned short to
2890 (mode_to_precision): Return a poly_uint16 rather than an unsigned
2892 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
2893 or if measurement_type is not polynomial.
2894 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
2895 in which the mode is already known to be a scalar_int_mode.
2896 * genmodes.c (emit_mode_precision): Change the type of mode_precision
2897 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
2899 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2900 for GET_MODE_PRECISION.
2901 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2902 for GET_MODE_PRECISION.
2903 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
2905 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
2906 (expand_field_assignment, make_extraction): Likewise.
2907 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
2908 (get_last_value): Likewise.
2909 * convert.c (convert_to_integer_1): Likewise.
2910 * cse.c (cse_insn): Likewise.
2911 * expr.c (expand_expr_real_1): Likewise.
2912 * lra-constraints.c (simplify_operand_subreg): Likewise.
2913 * optabs-query.c (can_atomic_load_p): Likewise.
2914 * optabs.c (expand_atomic_load): Likewise.
2915 (expand_atomic_store): Likewise.
2916 * ree.c (combine_reaching_defs): Likewise.
2917 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
2918 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
2919 * tree.h (type_has_mode_precision_p): Likewise.
2920 * ubsan.c (instrument_si_overflow): Likewise.
2922 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2923 Alan Hayward <alan.hayward@arm.com>
2924 David Sherwood <david.sherwood@arm.com>
2926 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
2927 polynomial numbers of units.
2928 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
2929 (valid_vector_subparts_p): New function.
2930 (build_vector_type): Remove temporary shim and take the number
2931 of units as a poly_uint64 rather than an int.
2932 (build_opaque_vector_type): Take the number of units as a
2933 poly_uint64 rather than an int.
2934 * tree.c (build_vector_from_ctor): Handle polynomial
2935 TYPE_VECTOR_SUBPARTS.
2936 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
2937 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
2938 (build_vector_from_val): If the number of units is variable,
2939 use build_vec_duplicate_cst for constant operands and
2940 VEC_DUPLICATE_EXPR otherwise.
2941 (make_vector_type): Remove temporary is_constant ().
2942 (build_vector_type, build_opaque_vector_type): Take the number of
2943 units as a poly_uint64 rather than an int.
2944 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
2946 * cfgexpand.c (expand_debug_expr): Likewise.
2947 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
2948 (store_constructor, expand_expr_real_1): Likewise.
2949 (const_scalar_mask_from_tree): Likewise.
2950 * fold-const-call.c (fold_const_reduction): Likewise.
2951 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
2952 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
2953 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
2954 (fold_relational_const): Likewise.
2955 (native_interpret_vector): Likewise. Change the size from an
2956 int to an unsigned int.
2957 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
2958 TYPE_VECTOR_SUBPARTS.
2959 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
2960 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
2961 duplicating a non-constant operand into a variable-length vector.
2962 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
2963 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
2964 * ipa-icf.c (sem_variable::equals): Likewise.
2965 * match.pd: Likewise.
2966 * omp-simd-clone.c (simd_clone_subparts): Likewise.
2967 * print-tree.c (print_node): Likewise.
2968 * stor-layout.c (layout_type): Likewise.
2969 * targhooks.c (default_builtin_vectorization_cost): Likewise.
2970 * tree-cfg.c (verify_gimple_comparison): Likewise.
2971 (verify_gimple_assign_binary): Likewise.
2972 (verify_gimple_assign_ternary): Likewise.
2973 (verify_gimple_assign_single): Likewise.
2974 * tree-pretty-print.c (dump_generic_node): Likewise.
2975 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2976 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
2977 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
2978 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
2979 (vect_shift_permute_load_chain): Likewise.
2980 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
2981 (expand_vector_condition, optimize_vector_constructor): Likewise.
2982 (lower_vec_perm, get_compute_type): Likewise.
2983 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2984 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
2985 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
2986 (vect_recog_mask_conversion_pattern): Likewise.
2987 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
2988 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
2989 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
2990 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
2991 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
2992 (vectorizable_shift, vectorizable_operation, vectorizable_store)
2993 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
2994 (supportable_widening_operation): Likewise.
2995 (supportable_narrowing_operation): Likewise.
2996 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
2998 * varasm.c (output_constant): Likewise.
3000 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3001 Alan Hayward <alan.hayward@arm.com>
3002 David Sherwood <david.sherwood@arm.com>
3004 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3005 so that both the length == 3 and length != 3 cases set up their
3006 own permute vectors. Add comments explaining why we know the
3007 number of elements is constant.
3008 (vect_permute_load_chain): Likewise.
3010 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3011 Alan Hayward <alan.hayward@arm.com>
3012 David Sherwood <david.sherwood@arm.com>
3014 * machmode.h (mode_nunits): Change from unsigned char to
3016 (ONLY_FIXED_SIZE_MODES): New macro.
3017 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3018 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3019 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3021 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3022 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3023 or if measurement_type is not polynomial.
3024 * genmodes.c (ZERO_COEFFS): New macro.
3025 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3027 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3028 Use ZERO_COEFFS when emitting initializers.
3029 * data-streamer.h (bp_pack_poly_value): New function.
3030 (bp_unpack_poly_value): Likewise.
3031 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3032 for GET_MODE_NUNITS.
3033 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3034 for GET_MODE_NUNITS.
3035 * tree.c (make_vector_type): Remove temporary shim and make
3036 the real function take the number of units as a poly_uint64
3038 (build_vector_type_for_mode): Handle polynomial nunits.
3039 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3040 * emit-rtl.c (const_vec_series_p_1): Likewise.
3041 (gen_rtx_CONST_VECTOR): Likewise.
3042 * fold-const.c (test_vec_duplicate_folding): Likewise.
3043 * genrecog.c (validate_pattern): Likewise.
3044 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3045 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3046 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3047 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3048 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3049 * rtlanal.c (subreg_get_info): Likewise.
3050 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3051 (vect_grouped_load_supported): Likewise.
3052 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3053 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3054 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3055 (simplify_const_unary_operation, simplify_binary_operation_1)
3056 (simplify_const_binary_operation, simplify_ternary_operation)
3057 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3058 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3059 instead of CONST_VECTOR_NUNITS.
3060 * varasm.c (output_constant_pool_2): Likewise.
3061 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3062 explicit-encoded elements in the XVEC for variable-length vectors.
3064 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3066 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3068 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3069 Alan Hayward <alan.hayward@arm.com>
3070 David Sherwood <david.sherwood@arm.com>
3072 * coretypes.h (fixed_size_mode): Declare.
3073 (fixed_size_mode_pod): New typedef.
3074 * builtins.h (target_builtins::x_apply_args_mode)
3075 (target_builtins::x_apply_result_mode): Change type to
3076 fixed_size_mode_pod.
3077 * builtins.c (apply_args_size, apply_result_size, result_vector)
3078 (expand_builtin_apply_args_1, expand_builtin_apply)
3079 (expand_builtin_return): Update accordingly.
3081 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3083 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3084 * cselib.c (cselib_hash_rtx): Likewise.
3085 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3086 CONST_VECTOR encoding.
3088 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3089 Jeff Law <law@redhat.com>
3092 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3093 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3094 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3095 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3098 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3099 explicitly probe *sp in a noreturn function if there were any callee
3100 register saves or frame pointer is needed.
3102 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3105 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3106 BLKmode for ternary, binary or unary expressions.
3109 * var-tracking.c (delete_vta_debug_insn): New inline function.
3110 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3111 insns from get_insns () to NULL instead of each bb separately.
3112 Use delete_vta_debug_insn. No longer static.
3113 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3114 delete_vta_debug_insns callers.
3115 * rtl.h (delete_vta_debug_insns): Declare.
3116 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3117 instead of variable_tracking_main.
3119 2018-01-03 Martin Sebor <msebor@redhat.com>
3121 PR tree-optimization/83603
3122 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3123 arguments past the endof the argument list in functions declared
3124 without a prototype.
3125 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3126 Avoid checking when arguments are null.
3128 2018-01-03 Martin Sebor <msebor@redhat.com>
3131 * doc/extend.texi (attribute const): Fix a typo.
3132 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3133 issuing -Wsuggest-attribute for void functions.
3135 2018-01-03 Martin Sebor <msebor@redhat.com>
3137 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3138 offset_int::from instead of wide_int::to_shwi.
3139 (maybe_diag_overlap): Remove assertion.
3140 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3141 * gimple-ssa-sprintf.c (format_directive): Same.
3142 (parse_directive): Same.
3143 (sprintf_dom_walker::compute_format_length): Same.
3144 (try_substitute_return_value): Same.
3146 2017-01-03 Jeff Law <law@redhat.com>
3149 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3150 non-constant residual for zero at runtime and avoid probing in
3151 that case. Reorganize code for trailing problem to mirror handling
3154 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3156 PR tree-optimization/83501
3157 * tree-ssa-strlen.c (get_string_cst): New.
3158 (handle_char_store): Call get_string_cst.
3160 2018-01-03 Martin Liska <mliska@suse.cz>
3162 PR tree-optimization/83593
3163 * tree-ssa-strlen.c: Include tree-cfg.h.
3164 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3165 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3166 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3168 (strlen_dom_walker::before_dom_children): Call
3169 gimple_purge_dead_eh_edges. Dump tranformation with details
3171 (strlen_dom_walker::before_dom_children): Update call by adding
3172 new argument cleanup_eh.
3173 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3175 2018-01-03 Martin Liska <mliska@suse.cz>
3178 * cif-code.def (VARIADIC_THUNK): New enum value.
3179 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3182 2018-01-03 Jan Beulich <jbeulich@suse.com>
3184 * sse.md (mov<mode>_internal): Tighten condition for when to use
3185 vmovdqu<ssescalarsize> for TI and OI modes.
3187 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3189 Update copyright years.
3191 2018-01-03 Martin Liska <mliska@suse.cz>
3194 * ipa-visibility.c (function_and_variable_visibility): Skip
3195 functions with noipa attribure.
3197 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3199 * gcc.c (process_command): Update copyright notice dates.
3200 * gcov-dump.c (print_version): Ditto.
3201 * gcov.c (print_version): Ditto.
3202 * gcov-tool.c (print_version): Ditto.
3203 * gengtype.c (create_file): Ditto.
3204 * doc/cpp.texi: Bump @copying's copyright year.
3205 * doc/cppinternals.texi: Ditto.
3206 * doc/gcc.texi: Ditto.
3207 * doc/gccint.texi: Ditto.
3208 * doc/gcov.texi: Ditto.
3209 * doc/install.texi: Ditto.
3210 * doc/invoke.texi: Ditto.
3212 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3214 * vector-builder.h (vector_builder::m_full_nelts): Change from
3215 unsigned int to poly_uint64.
3216 (vector_builder::full_nelts): Update prototype accordingly.
3217 (vector_builder::new_vector): Likewise.
3218 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3219 (vector_builder::operator ==): Likewise.
3220 (vector_builder::finalize): Likewise.
3221 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3222 Take the number of elements as a poly_uint64 rather than an
3224 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3225 from unsigned int to poly_uint64.
3226 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3227 (vec_perm_indices::new_vector): Likewise.
3228 (vec_perm_indices::length): Likewise.
3229 (vec_perm_indices::nelts_per_input): Likewise.
3230 (vec_perm_indices::input_nelts): Likewise.
3231 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3232 number of elements per input as a poly_uint64 rather than an
3233 unsigned int. Use the original encoding for variable-length
3234 vectors, rather than clamping each individual element.
3235 For the second and subsequent elements in each pattern,
3236 clamp the step and base before clamping their sum.
3237 (vec_perm_indices::series_p): Handle polynomial element counts.
3238 (vec_perm_indices::all_in_range_p): Likewise.
3239 (vec_perm_indices_to_tree): Likewise.
3240 (vec_perm_indices_to_rtx): Likewise.
3241 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3242 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3243 (tree_vector_builder::new_binary_operation): Handle polynomial
3244 element counts. Return false if we need to know the number
3245 of elements at compile time.
3246 * fold-const.c (fold_vec_perm): Punt if the number of elements
3247 isn't known at compile time.
3249 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3251 * vec-perm-indices.h (vec_perm_builder): Change element type
3252 from HOST_WIDE_INT to poly_int64.
3253 (vec_perm_indices::element_type): Update accordingly.
3254 (vec_perm_indices::clamp): Handle polynomial element_types.
3255 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3256 (vec_perm_indices::all_in_range_p): Likewise.
3257 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3259 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3260 polynomial vec_perm_indices element types.
3261 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3262 * fold-const.c (fold_vec_perm): Likewise.
3263 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3264 * tree-vect-generic.c (lower_vec_perm): Likewise.
3265 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3266 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3267 element type to HOST_WIDE_INT.
3269 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3270 Alan Hayward <alan.hayward@arm.com>
3271 David Sherwood <david.sherwood@arm.com>
3273 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3274 rather than an int. Use plus_constant.
3275 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3276 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3278 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3279 Alan Hayward <alan.hayward@arm.com>
3280 David Sherwood <david.sherwood@arm.com>
3282 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3283 a HOST_WIDE_INT to a poly_int64.
3285 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3286 Alan Hayward <alan.hayward@arm.com>
3287 David Sherwood <david.sherwood@arm.com>
3289 * calls.c (load_register_parameters): Cope with polynomial
3290 mode sizes. Require a constant size for BLKmode parameters
3291 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3292 forces a parameter to be padded at the lsb end in order to
3293 fill a complete number of words, require the parameter size
3294 to be ordered wrt UNITS_PER_WORD.
3296 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3297 Alan Hayward <alan.hayward@arm.com>
3298 David Sherwood <david.sherwood@arm.com>
3300 * reload1.c (spill_stack_slot_width): Change element type
3301 from unsigned int to poly_uint64_pod.
3302 (alter_reg): Treat mode sizes as polynomial.
3304 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3305 Alan Hayward <alan.hayward@arm.com>
3306 David Sherwood <david.sherwood@arm.com>
3308 * reload.c (complex_word_subreg_p): New function.
3309 (reload_inner_reg_of_subreg, push_reload): Use it.
3311 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3312 Alan Hayward <alan.hayward@arm.com>
3313 David Sherwood <david.sherwood@arm.com>
3315 * lra-constraints.c (process_alt_operands): Reject matched
3316 operands whose sizes aren't ordered.
3317 (match_reload): Refer to this check here.
3319 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3320 Alan Hayward <alan.hayward@arm.com>
3321 David Sherwood <david.sherwood@arm.com>
3323 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3324 that the mode size is in the set {1, 2, 4, 8, 16}.
3326 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3327 Alan Hayward <alan.hayward@arm.com>
3328 David Sherwood <david.sherwood@arm.com>
3330 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3331 Use plus_constant instead of gen_rtx_PLUS.
3333 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3334 Alan Hayward <alan.hayward@arm.com>
3335 David Sherwood <david.sherwood@arm.com>
3337 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3338 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3339 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3340 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3341 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3342 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3343 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3344 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3345 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3346 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3348 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3349 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3350 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3351 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3352 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3353 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3354 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3355 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3356 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3357 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3359 * expr.c (emit_move_resolve_push): Treat the input and result
3360 of PUSH_ROUNDING as a poly_int64.
3361 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3362 (emit_push_insn): Likewise.
3363 * lra-eliminations.c (mark_not_eliminable): Likewise.
3364 * recog.c (push_operand): Likewise.
3365 * reload1.c (elimination_effects): Likewise.
3366 * rtlanal.c (nonzero_bits1): Likewise.
3367 * calls.c (store_one_arg): Likewise. Require the padding to be
3368 known at compile time.
3370 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3371 Alan Hayward <alan.hayward@arm.com>
3372 David Sherwood <david.sherwood@arm.com>
3374 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3375 Use plus_constant instead of gen_rtx_PLUS.
3377 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3378 Alan Hayward <alan.hayward@arm.com>
3379 David Sherwood <david.sherwood@arm.com>
3381 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3384 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3385 Alan Hayward <alan.hayward@arm.com>
3386 David Sherwood <david.sherwood@arm.com>
3388 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3389 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3390 via stack temporaries. Treat the mode size as polynomial too.
3392 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3393 Alan Hayward <alan.hayward@arm.com>
3394 David Sherwood <david.sherwood@arm.com>
3396 * expr.c (expand_expr_real_2): When handling conversions involving
3397 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3398 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3399 as a poly_uint64 too.
3401 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3402 Alan Hayward <alan.hayward@arm.com>
3403 David Sherwood <david.sherwood@arm.com>
3405 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3407 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3408 Alan Hayward <alan.hayward@arm.com>
3409 David Sherwood <david.sherwood@arm.com>
3411 * combine.c (can_change_dest_mode): Handle polynomial
3412 REGMODE_NATURAL_SIZE.
3413 * expmed.c (store_bit_field_1): Likewise.
3414 * expr.c (store_constructor): Likewise.
3415 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3416 and polynomial REGMODE_NATURAL_SIZE.
3417 (gen_lowpart_common): Likewise.
3418 * reginfo.c (record_subregs_of_mode): Likewise.
3419 * rtlanal.c (read_modify_subreg_p): Likewise.
3421 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3422 Alan Hayward <alan.hayward@arm.com>
3423 David Sherwood <david.sherwood@arm.com>
3425 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3426 numbers of elements.
3428 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3429 Alan Hayward <alan.hayward@arm.com>
3430 David Sherwood <david.sherwood@arm.com>
3432 * match.pd: Cope with polynomial numbers of vector elements.
3434 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3435 Alan Hayward <alan.hayward@arm.com>
3436 David Sherwood <david.sherwood@arm.com>
3438 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3439 in a POINTER_PLUS_EXPR.
3441 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3442 Alan Hayward <alan.hayward@arm.com>
3443 David Sherwood <david.sherwood@arm.com>
3445 * omp-simd-clone.c (simd_clone_subparts): New function.
3446 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3447 (ipa_simd_modify_function_body): Likewise.
3449 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3450 Alan Hayward <alan.hayward@arm.com>
3451 David Sherwood <david.sherwood@arm.com>
3453 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3454 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3455 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3456 (expand_vector_condition, vector_element): Likewise.
3457 (subparts_gt): New function.
3458 (get_compute_type): Use subparts_gt.
3459 (count_type_subparts): Delete.
3460 (expand_vector_operations_1): Use subparts_gt instead of
3461 count_type_subparts.
3463 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3464 Alan Hayward <alan.hayward@arm.com>
3465 David Sherwood <david.sherwood@arm.com>
3467 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3468 (vect_compile_time_alias): ...this new function. Do the calculation
3469 on poly_ints rather than trees.
3470 (vect_prune_runtime_alias_test_list): Update call accordingly.
3472 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3473 Alan Hayward <alan.hayward@arm.com>
3474 David Sherwood <david.sherwood@arm.com>
3476 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3478 (vect_schedule_slp_instance): Likewise.
3480 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3481 Alan Hayward <alan.hayward@arm.com>
3482 David Sherwood <david.sherwood@arm.com>
3484 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3485 constant and extern definitions for variable-length vectors.
3486 (vect_get_constant_vectors): Note that the number of units
3487 is known to be constant.
3489 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3490 Alan Hayward <alan.hayward@arm.com>
3491 David Sherwood <david.sherwood@arm.com>
3493 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3494 of units as polynomial. Choose between WIDE and NARROW based
3497 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3498 Alan Hayward <alan.hayward@arm.com>
3499 David Sherwood <david.sherwood@arm.com>
3501 * tree-vect-stmts.c (simd_clone_subparts): New function.
3502 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3504 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3505 Alan Hayward <alan.hayward@arm.com>
3506 David Sherwood <david.sherwood@arm.com>
3508 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3509 vectors as polynomial. Use build_index_vector for
3512 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3513 Alan Hayward <alan.hayward@arm.com>
3514 David Sherwood <david.sherwood@arm.com>
3516 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3517 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3518 for variable-length vectors.
3519 (vectorizable_mask_load_store): Treat the number of units as
3520 polynomial, asserting that it is constant if the condition has
3521 already been enforced.
3522 (vectorizable_store, vectorizable_load): Likewise.
3524 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3525 Alan Hayward <alan.hayward@arm.com>
3526 David Sherwood <david.sherwood@arm.com>
3528 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3529 of units as polynomial. Punt if we can't tell at compile time
3530 which vector contains the final result.
3532 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3533 Alan Hayward <alan.hayward@arm.com>
3534 David Sherwood <david.sherwood@arm.com>
3536 * tree-vect-loop.c (vectorizable_induction): Treat the number
3537 of units as polynomial. Punt on SLP inductions. Use an integer
3538 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3539 cast of such a series for variable-length floating-point
3542 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3543 Alan Hayward <alan.hayward@arm.com>
3544 David Sherwood <david.sherwood@arm.com>
3546 * tree.h (build_index_vector): Declare.
3547 * tree.c (build_index_vector): New function.
3548 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3549 of units as polynomial, forcibly converting it to a constant if
3550 vectorizable_reduction has already enforced the condition.
3551 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
3552 to create a {1,2,3,...} vector.
3553 (vectorizable_reduction): Treat the number of units as polynomial.
3554 Choose vectype_in based on the largest scalar element size rather
3555 than the smallest number of units. Enforce the restrictions
3558 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3559 Alan Hayward <alan.hayward@arm.com>
3560 David Sherwood <david.sherwood@arm.com>
3562 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3563 number of units as polynomial.
3565 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3566 Alan Hayward <alan.hayward@arm.com>
3567 David Sherwood <david.sherwood@arm.com>
3569 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3570 * target.def (autovectorize_vector_sizes): Return the vector sizes
3571 by pointer, using vector_sizes rather than a bitmask.
3572 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3573 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3574 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3576 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3577 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3578 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3579 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3580 * omp-general.c (omp_max_vf): Likewise.
3581 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3582 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3583 * tree-vect-loop.c (vect_analyze_loop): Likewise.
3584 * tree-vect-slp.c (vect_slp_bb): Likewise.
3585 * doc/tm.texi: Regenerate.
3586 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3588 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3589 the vector size as a poly_uint64 rather than an unsigned int.
3590 (current_vector_size): Change from an unsigned int to a poly_uint64.
3591 (get_vectype_for_scalar_type): Update accordingly.
3592 * tree.h (build_truth_vector_type): Take the size and number of
3593 units as a poly_uint64 rather than an unsigned int.
3594 (build_vector_type): Add a temporary overload that takes
3595 the number of units as a poly_uint64 rather than an unsigned int.
3596 * tree.c (make_vector_type): Likewise.
3597 (build_truth_vector_type): Take the number of units as a poly_uint64
3598 rather than an unsigned int.
3600 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3601 Alan Hayward <alan.hayward@arm.com>
3602 David Sherwood <david.sherwood@arm.com>
3604 * target.def (get_mask_mode): Take the number of units and length
3605 as poly_uint64s rather than unsigned ints.
3606 * targhooks.h (default_get_mask_mode): Update accordingly.
3607 * targhooks.c (default_get_mask_mode): Likewise.
3608 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3609 * doc/tm.texi: Regenerate.
3611 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3612 Alan Hayward <alan.hayward@arm.com>
3613 David Sherwood <david.sherwood@arm.com>
3615 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3616 * omp-general.c (omp_max_vf): Likewise.
3617 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3618 (expand_omp_simd): Handle polynomial safelen.
3619 * omp-low.c (omplow_simd_context): Add a default constructor.
3620 (omplow_simd_context::max_vf): Change from int to poly_uint64.
3621 (lower_rec_simd_input_clauses): Update accordingly.
3622 (lower_rec_input_clauses): Likewise.
3624 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3625 Alan Hayward <alan.hayward@arm.com>
3626 David Sherwood <david.sherwood@arm.com>
3628 * tree-vectorizer.h (vect_nunits_for_cost): New function.
3629 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3630 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3631 (vect_analyze_slp_cost): Likewise.
3632 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3633 (vect_model_load_cost): Likewise.
3635 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3636 Alan Hayward <alan.hayward@arm.com>
3637 David Sherwood <david.sherwood@arm.com>
3639 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3640 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3641 from an unsigned int * to a poly_uint64_pod *.
3642 (calculate_unrolling_factor): New function.
3643 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
3645 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3646 Alan Hayward <alan.hayward@arm.com>
3647 David Sherwood <david.sherwood@arm.com>
3649 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3650 from an unsigned int to a poly_uint64.
3651 (_loop_vec_info::slp_unrolling_factor): Likewise.
3652 (_loop_vec_info::vectorization_factor): Change from an int
3654 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
3655 (vect_get_num_vectors): New function.
3656 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
3657 (vect_get_num_copies): Use vect_get_num_vectors.
3658 (vect_analyze_data_ref_dependences): Change max_vf from an int *
3659 to an unsigned int *.
3660 (vect_analyze_data_refs): Change min_vf from an int * to a
3662 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3663 than an unsigned HOST_WIDE_INT.
3664 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
3665 (vect_analyze_data_ref_dependence): Change max_vf from an int *
3666 to an unsigned int *.
3667 (vect_analyze_data_ref_dependences): Likewise.
3668 (vect_compute_data_ref_alignment): Handle polynomial vf.
3669 (vect_enhance_data_refs_alignment): Likewise.
3670 (vect_prune_runtime_alias_test_list): Likewise.
3671 (vect_shift_permute_load_chain): Likewise.
3672 (vect_supportable_dr_alignment): Likewise.
3673 (dependence_distance_ge_vf): Take the vectorization factor as a
3674 poly_uint64 rather than an unsigned HOST_WIDE_INT.
3675 (vect_analyze_data_refs): Change min_vf from an int * to a
3677 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
3678 vfm1 as a poly_uint64 rather than an int. Make the same change
3679 for the returned bound_scalar.
3680 (vect_gen_vector_loop_niters): Handle polynomial vf.
3681 (vect_do_peeling): Likewise. Update call to
3682 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
3683 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
3685 * tree-vect-loop.c (vect_determine_vectorization_factor)
3686 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
3687 (vect_get_known_peeling_cost): Likewise.
3688 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
3689 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
3690 (vect_transform_loop): Likewise. Use the lowest possible VF when
3691 updating the upper bounds of the loop.
3692 (vect_min_worthwhile_factor): Make static. Return an unsigned int
3694 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3695 polynomial unroll factors.
3696 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3697 (vect_make_slp_decision): Likewise.
3698 (vect_supported_load_permutation_p): Likewise, and polynomial
3700 (vect_analyze_slp_cost): Handle polynomial vf.
3701 (vect_slp_analyze_node_operations): Likewise.
3702 (vect_slp_analyze_bb_1): Likewise.
3703 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3704 than an unsigned HOST_WIDE_INT.
3705 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3706 (vectorizable_load): Handle polynomial vf.
3707 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3709 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3711 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3712 Alan Hayward <alan.hayward@arm.com>
3713 David Sherwood <david.sherwood@arm.com>
3715 * match.pd: Handle bit operations involving three constants
3716 and try to fold one pair.
3718 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3720 * tree-vect-loop-manip.c: Include gimple-fold.h.
3721 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3722 niters_maybe_zero parameters. Handle other cases besides a step of 1.
3723 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3724 Add a path that uses a step of VF instead of 1, but disable it
3726 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3727 and niters_no_overflow parameters. Update calls to
3728 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3729 Create a new SSA name if the latter choses to use a ste other
3730 than zero, and return it via niters_vector_mult_vf_var.
3731 * tree-vect-loop.c (vect_transform_loop): Update calls to
3732 vect_do_peeling, vect_gen_vector_loop_niters and
3733 slpeel_make_loop_iterate_ntimes.
3734 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3735 (vect_gen_vector_loop_niters): Update declarations after above changes.
3737 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
3739 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3740 128-bit round to integer instructions.
3741 (ceil<mode>2): Likewise.
3742 (btrunc<mode>2): Likewise.
3743 (round<mode>2): Likewise.
3745 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3747 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3748 unaligned VSX load/store on P8/P9.
3749 (expand_block_clear): Allow the use of unaligned VSX
3750 load/store on P8/P9.
3752 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3754 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3756 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3757 swap associated with both a load and a store.
3759 2018-01-02 Andrew Waterman <andrew@sifive.com>
3761 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3762 * config/riscv/riscv.md (clear_cache): Use it.
3764 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
3766 * web.c: Remove out-of-date comment.
3768 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3770 * expr.c (fixup_args_size_notes): Check that any existing
3771 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
3772 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
3773 (emit_single_push_insn): ...here.
3775 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3777 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
3778 (const_vector_encoded_nelts): New function.
3779 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
3780 (const_vector_int_elt, const_vector_elt): Declare.
3781 * emit-rtl.c (const_vector_int_elt_1): New function.
3782 (const_vector_elt): Likewise.
3783 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
3784 of CONST_VECTOR_ELT.
3786 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3788 * expr.c: Include rtx-vector-builder.h.
3789 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
3790 directly on the tree encoding.
3791 (const_vector_from_tree): Likewise.
3792 * optabs.c: Include rtx-vector-builder.h.
3793 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
3794 sequence of "u" values.
3795 * vec-perm-indices.c: Include rtx-vector-builder.h.
3796 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
3797 directly on the vec_perm_indices encoding.
3799 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3801 * doc/rtl.texi (const_vector): Describe new encoding scheme.
3802 * Makefile.in (OBJS): Add rtx-vector-builder.o.
3803 * rtx-vector-builder.h: New file.
3804 * rtx-vector-builder.c: Likewise.
3805 * rtl.h (rtx_def::u2): Add a const_vector field.
3806 (CONST_VECTOR_NPATTERNS): New macro.
3807 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
3808 (CONST_VECTOR_DUPLICATE_P): Likewise.
3809 (CONST_VECTOR_STEPPED_P): Likewise.
3810 (CONST_VECTOR_ENCODED_ELT): Likewise.
3811 (const_vec_duplicate_p): Check for a duplicated vector encoding.
3812 (unwrap_const_vec_duplicate): Likewise.
3813 (const_vec_series_p): Check for a non-duplicated vector encoding.
3814 Say that the function only returns true for integer vectors.
3815 * emit-rtl.c: Include rtx-vector-builder.h.
3816 (gen_const_vec_duplicate_1): Delete.
3817 (gen_const_vector): Call gen_const_vec_duplicate instead of
3818 gen_const_vec_duplicate_1.
3819 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
3820 (gen_const_vec_duplicate): Use rtx_vector_builder.
3821 (gen_const_vec_series): Likewise.
3822 (gen_rtx_CONST_VECTOR): Likewise.
3823 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
3824 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3825 Build a new vector rather than modifying a CONST_VECTOR in-place.
3826 (handle_special_swappables): Update call accordingly.
3827 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
3828 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3829 Build a new vector rather than modifying a CONST_VECTOR in-place.
3830 (handle_special_swappables): Update call accordingly.
3832 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3834 * simplify-rtx.c (simplify_const_binary_operation): Use
3835 CONST_VECTOR_ELT instead of XVECEXP.
3837 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3839 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
3840 the selector elements to be different from the data elements
3841 if the selector is a VECTOR_CST.
3842 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
3843 ssizetype for the selector.
3845 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3847 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
3848 before testing each element individually.
3849 * tree-vect-generic.c (lower_vec_perm): Likewise.
3851 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3853 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
3854 * selftest-run-tests.c (selftest::run_tests): Call it.
3855 * vector-builder.h (vector_builder::operator ==): New function.
3856 (vector_builder::operator !=): Likewise.
3857 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
3858 (vec_perm_indices::all_from_input_p): New function.
3859 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3860 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
3861 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
3862 instead of reading the VECTOR_CST directly. Detect whether both
3863 vector inputs are the same before constructing the vec_perm_indices,
3864 and update the number of inputs argument accordingly. Use the
3865 utility functions added above. Only construct sel2 if we need to.
3867 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3869 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
3870 the broadcast of the low byte.
3871 (expand_mult_highpart): Use an explicit encoding for the permutes.
3872 * optabs-query.c (can_mult_highpart_p): Likewise.
3873 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
3874 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3875 (vectorizable_bswap): Likewise.
3876 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
3877 explicit encoding for the power-of-2 permutes.
3878 (vect_permute_store_chain): Likewise.
3879 (vect_grouped_load_supported): Likewise.
3880 (vect_permute_load_chain): Likewise.
3882 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3884 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
3885 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
3886 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
3887 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3888 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
3889 (vect_gen_perm_mask_any): Likewise.
3891 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3893 * int-vector-builder.h: New file.
3894 * vec-perm-indices.h: Include int-vector-builder.h.
3895 (vec_perm_indices): Redefine as an int_vector_builder.
3896 (auto_vec_perm_indices): Delete.
3897 (vec_perm_builder): Redefine as a stand-alone class.
3898 (vec_perm_indices::vec_perm_indices): New function.
3899 (vec_perm_indices::clamp): Likewise.
3900 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
3901 (vec_perm_indices::new_vector): New function.
3902 (vec_perm_indices::new_expanded_vector): Update for new
3903 vec_perm_indices class.
3904 (vec_perm_indices::rotate_inputs): New function.
3905 (vec_perm_indices::all_in_range_p): Operate directly on the
3906 encoded form, without computing elided elements.
3907 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
3908 encoding. Update for new vec_perm_indices class.
3909 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
3910 the given vec_perm_builder.
3911 (expand_vec_perm_var): Update vec_perm_builder constructor.
3912 (expand_mult_highpart): Use vec_perm_builder instead of
3913 auto_vec_perm_indices.
3914 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
3915 vec_perm_indices instead of auto_vec_perm_indices. Use a single
3916 or double series encoding as appropriate.
3917 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
3918 vec_perm_indices instead of auto_vec_perm_indices.
3919 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3920 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3921 (vect_permute_store_chain): Likewise.
3922 (vect_grouped_load_supported): Likewise.
3923 (vect_permute_load_chain): Likewise.
3924 (vect_shift_permute_load_chain): Likewise.
3925 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3926 (vect_transform_slp_perm_load): Likewise.
3927 (vect_schedule_slp_instance): Likewise.
3928 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3929 (vectorizable_mask_load_store): Likewise.
3930 (vectorizable_bswap): Likewise.
3931 (vectorizable_store): Likewise.
3932 (vectorizable_load): Likewise.
3933 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
3934 vec_perm_indices instead of auto_vec_perm_indices. Use
3935 tree_to_vec_perm_builder to read the vector from a tree.
3936 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
3937 vec_perm_builder instead of a vec_perm_indices.
3938 (have_whole_vector_shift): Use vec_perm_builder and
3939 vec_perm_indices instead of auto_vec_perm_indices. Leave the
3940 truncation to calc_vec_perm_mask_for_shift.
3941 (vect_create_epilog_for_reduction): Likewise.
3942 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
3943 from auto_vec_perm_indices to vec_perm_indices.
3944 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3945 instead of changing individual elements.
3946 (aarch64_vectorize_vec_perm_const): Use new_vector to install
3947 the vector in d.perm.
3948 * config/arm/arm.c (expand_vec_perm_d::perm): Change
3949 from auto_vec_perm_indices to vec_perm_indices.
3950 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3951 instead of changing individual elements.
3952 (arm_vectorize_vec_perm_const): Use new_vector to install
3953 the vector in d.perm.
3954 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
3955 Update vec_perm_builder constructor.
3956 (rs6000_expand_interleave): Likewise.
3957 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
3958 (rs6000_expand_interleave): Likewise.
3960 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3962 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
3963 to qimode could truncate the indices.
3964 * optabs.c (expand_vec_perm_var): Likewise.
3966 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3968 * Makefile.in (OBJS): Add vec-perm-indices.o.
3969 * vec-perm-indices.h: New file.
3970 * vec-perm-indices.c: Likewise.
3971 * target.h (vec_perm_indices): Replace with a forward class
3973 (auto_vec_perm_indices): Move to vec-perm-indices.h.
3974 * optabs.h: Include vec-perm-indices.h.
3975 (expand_vec_perm): Delete.
3976 (selector_fits_mode_p, expand_vec_perm_var): Declare.
3977 (expand_vec_perm_const): Declare.
3978 * target.def (vec_perm_const_ok): Replace with...
3979 (vec_perm_const): ...this new hook.
3980 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
3981 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
3982 * doc/tm.texi: Regenerate.
3983 * optabs.def (vec_perm_const): Delete.
3984 * doc/md.texi (vec_perm_const): Likewise.
3985 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
3986 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
3987 expand_vec_perm for constant permutation vectors. Assert that
3988 the mode of variable permutation vectors is the integer equivalent
3989 of the mode that is being permuted.
3990 * optabs-query.h (selector_fits_mode_p): Declare.
3991 * optabs-query.c: Include vec-perm-indices.h.
3992 (selector_fits_mode_p): New function.
3993 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
3994 is defined, instead of checking whether the vec_perm_const_optab
3995 exists. Use targetm.vectorize.vec_perm_const instead of
3996 targetm.vectorize.vec_perm_const_ok. Check whether the indices
3997 fit in the vector mode before using a variable permute.
3998 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
3999 vec_perm_indices instead of an rtx.
4000 (expand_vec_perm): Replace with...
4001 (expand_vec_perm_const): ...this new function. Take the selector
4002 as a vec_perm_indices rather than an rtx. Also take the mode of
4003 the selector. Update call to shift_amt_for_vec_perm_mask.
4004 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4005 Use vec_perm_indices::new_expanded_vector to expand the original
4006 selector into bytes. Check whether the indices fit in the vector
4007 mode before using a variable permute.
4008 (expand_vec_perm_var): Make global.
4009 (expand_mult_highpart): Use expand_vec_perm_const.
4010 * fold-const.c: Includes vec-perm-indices.h.
4011 * tree-ssa-forwprop.c: Likewise.
4012 * tree-vect-data-refs.c: Likewise.
4013 * tree-vect-generic.c: Likewise.
4014 * tree-vect-loop.c: Likewise.
4015 * tree-vect-slp.c: Likewise.
4016 * tree-vect-stmts.c: Likewise.
4017 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4019 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4020 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4021 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4022 (aarch64_vectorize_vec_perm_const): ...this new function.
4023 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4024 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4025 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4026 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4027 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4028 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4029 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4031 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4032 check for NEON modes.
4033 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4034 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4035 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4036 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4038 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4039 the old VEC_PERM_CONST conditions.
4040 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4041 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4042 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4043 (ia64_vectorize_vec_perm_const_ok): Merge into...
4044 (ia64_vectorize_vec_perm_const): ...this new function.
4045 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4046 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4047 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4048 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4049 * config/mips/mips.c (mips_expand_vec_perm_const)
4050 (mips_vectorize_vec_perm_const_ok): Merge into...
4051 (mips_vectorize_vec_perm_const): ...this new function.
4052 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4053 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4054 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4055 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4056 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4057 (rs6000_expand_vec_perm_const): Delete.
4058 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4060 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4061 (altivec_expand_vec_perm_const_le): Take each operand individually.
4062 Operate on constant selectors rather than rtxes.
4063 (altivec_expand_vec_perm_const): Likewise. Update call to
4064 altivec_expand_vec_perm_const_le.
4065 (rs6000_expand_vec_perm_const): Delete.
4066 (rs6000_vectorize_vec_perm_const_ok): Delete.
4067 (rs6000_vectorize_vec_perm_const): New function.
4068 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4069 an element count and rtx array.
4070 (rs6000_expand_extract_even): Update call accordingly.
4071 (rs6000_expand_interleave): Likewise.
4072 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4073 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4074 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4075 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4076 (rs6000_expand_vec_perm_const): Delete.
4077 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4078 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4079 (altivec_expand_vec_perm_const_le): Take each operand individually.
4080 Operate on constant selectors rather than rtxes.
4081 (altivec_expand_vec_perm_const): Likewise. Update call to
4082 altivec_expand_vec_perm_const_le.
4083 (rs6000_expand_vec_perm_const): Delete.
4084 (rs6000_vectorize_vec_perm_const_ok): Delete.
4085 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4086 reference to the SPE evmerge intructions.
4087 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4088 an element count and rtx array.
4089 (rs6000_expand_extract_even): Update call accordingly.
4090 (rs6000_expand_interleave): Likewise.
4091 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4092 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4094 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4096 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4098 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4099 vector mode and that that mode matches the mode of the data
4101 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4102 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4103 directly using expand_vec_perm_1 when forcing selectors into
4105 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4107 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4109 * optabs-query.h (can_vec_perm_p): Delete.
4110 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4111 * optabs-query.c (can_vec_perm_p): Split into...
4112 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4113 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4114 particular selector is valid.
4115 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4116 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4117 (vect_grouped_load_supported): Likewise.
4118 (vect_shift_permute_load_chain): Likewise.
4119 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4120 (vect_transform_slp_perm_load): Likewise.
4121 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4122 (vectorizable_bswap): Likewise.
4123 (vect_gen_perm_mask_checked): Likewise.
4124 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4125 implementations of variable permutation vectors into account
4126 when deciding which selector to use.
4127 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4128 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4129 with a false third argument.
4130 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4131 to test whether the constant selector is valid and can_vec_perm_var_p
4132 to test whether a variable selector is valid.
4134 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4136 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4137 * optabs-query.c (can_vec_perm_p): Likewise.
4138 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4139 instead of vec_perm_indices.
4140 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4141 (vect_gen_perm_mask_checked): Likewise,
4142 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4143 (vect_gen_perm_mask_checked): Likewise,
4145 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4147 * optabs-query.h (qimode_for_vec_perm): Declare.
4148 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4149 (qimode_for_vec_perm): ...this new function.
4150 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4152 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4154 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4155 does not have a conditional at the top.
4157 2018-01-02 Richard Biener <rguenther@suse.de>
4159 * ipa-inline.c (big_speedup_p): Fix expression.
4161 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4164 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4167 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4171 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4172 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4173 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4174 cond_taken_branch_cost 3->4.
4176 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4178 PR tree-optimization/83581
4179 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4180 TODO_cleanup_cfg if any changes have been made.
4183 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4184 convert_modes if target mode has the right side, but different mode
4188 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4189 last argument when extracting from CONCAT. If either from_real or
4190 from_imag is NULL, use expansion through memory. If result is not
4191 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4192 the parts directly to inner mode, if even that fails, use expansion
4196 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4197 check for bswap in mode rather than HImode and use that in expand_unop
4200 Copyright (C) 2018 Free Software Foundation, Inc.
4202 Copying and distribution of this file, with or without modification,
4203 are permitted in any medium without royalty provided the copyright
4204 notice and this notice are preserved.