1 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
3 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
4 -mcmodel=large with -mindirect-branch=thunk,
5 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
6 -mfunction-return=thunk-extern.
7 * doc/invoke.texi: Document -mcmodel=large is incompatible with
8 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
9 -mfunction-return=thunk and -mfunction-return=thunk-extern.
11 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
13 * config/i386/i386.c (print_reg): Print the name of the full
14 integer register without '%'.
15 (ix86_print_operand): Handle 'V'.
16 * doc/extend.texi: Document 'V' modifier.
18 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
20 * config/i386/constraints.md (Bs): Disallow memory operand for
21 -mindirect-branch-register.
23 * config/i386/predicates.md (indirect_branch_operand): Likewise.
24 (GOT_memory_operand): Likewise.
25 (call_insn_operand): Likewise.
26 (sibcall_insn_operand): Likewise.
27 (GOT32_symbol_operand): Likewise.
28 * config/i386/i386.md (indirect_jump): Call convert_memory_address
29 for -mindirect-branch-register.
30 (tablejump): Likewise.
31 (*sibcall_memory): Likewise.
32 (*sibcall_value_memory): Likewise.
33 Disallow peepholes of indirect call and jump via memory for
34 -mindirect-branch-register.
35 (*call_pop): Replace m with Bw.
36 (*call_value_pop): Likewise.
37 (*sibcall_pop_memory): Replace m with Bs.
38 * config/i386/i386.opt (mindirect-branch-register): New option.
39 * doc/invoke.texi: Document -mindirect-branch-register option.
41 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
43 * config/i386/i386-protos.h (ix86_output_function_return): New.
44 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
45 set function_return_type.
46 (indirect_thunk_name): Add ret_p to indicate thunk for function
48 (output_indirect_thunk_function): Pass false to
50 (ix86_output_indirect_branch): Likewise.
51 (output_indirect_thunk_function): Create alias for function
52 return thunk if regno < 0.
53 (ix86_output_function_return): New function.
54 (ix86_handle_fndecl_attribute): Handle function_return.
55 (ix86_attribute_table): Add function_return.
56 * config/i386/i386.h (machine_function): Add
58 * config/i386/i386.md (simple_return_internal): Use
59 ix86_output_function_return.
60 (simple_return_internal_long): Likewise.
61 * config/i386/i386.opt (mfunction-return=): New option.
62 (indirect_branch): Mention -mfunction-return=.
63 * doc/extend.texi: Document function_return function attribute.
64 * doc/invoke.texi: Document -mfunction-return= option.
66 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
68 * config/i386/i386-opts.h (indirect_branch): New.
69 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
70 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
71 with local indirect jump when converting indirect call and jump.
72 (ix86_set_indirect_branch_type): New.
73 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
74 (indirectlabelno): New.
75 (indirect_thunk_needed): Likewise.
76 (indirect_thunk_bnd_needed): Likewise.
77 (indirect_thunks_used): Likewise.
78 (indirect_thunks_bnd_used): Likewise.
79 (INDIRECT_LABEL): Likewise.
80 (indirect_thunk_name): Likewise.
81 (output_indirect_thunk): Likewise.
82 (output_indirect_thunk_function): Likewise.
83 (ix86_output_indirect_branch): Likewise.
84 (ix86_output_indirect_jmp): Likewise.
85 (ix86_code_end): Call output_indirect_thunk_function if needed.
86 (ix86_output_call_insn): Call ix86_output_indirect_branch if
88 (ix86_handle_fndecl_attribute): Handle indirect_branch.
89 (ix86_attribute_table): Add indirect_branch.
90 * config/i386/i386.h (machine_function): Add indirect_branch_type
91 and has_local_indirect_jump.
92 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
94 (tablejump): Likewise.
95 (*indirect_jump): Use ix86_output_indirect_jmp.
96 (*tablejump_1): Likewise.
97 (simple_return_indirect_internal): Likewise.
98 * config/i386/i386.opt (mindirect-branch=): New option.
99 (indirect_branch): New.
102 (thunk-inline): Likewise.
103 (thunk-extern): Likewise.
104 * doc/extend.texi: Document indirect_branch function attribute.
105 * doc/invoke.texi: Document -mindirect-branch= option.
107 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
110 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
112 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
114 * ipa-inline.c (want_inline_small_function_p): Return false if
115 inlining has already failed with CIF_FINAL_ERROR.
116 (update_caller_keys): Call want_inline_small_function_p before
118 (update_callee_keys): Likewise.
120 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
122 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
124 (rs6000_quadword_masked_address_p): Likewise.
125 (quad_aligned_load_p): Likewise.
126 (quad_aligned_store_p): Likewise.
127 (const_load_sequence_p): Add comment to describe the outer-most loop.
128 (mimic_memory_attributes_and_flags): New function.
129 (rs6000_gen_stvx): Likewise.
130 (replace_swapped_aligned_store): Likewise.
131 (rs6000_gen_lvx): Likewise.
132 (replace_swapped_aligned_load): Likewise.
133 (replace_swapped_load_constant): Capitalize argument name in
134 comment describing this function.
135 (rs6000_analyze_swaps): Add a third pass to search for vector loads
136 and stores that access quad-word aligned addresses and replace
137 with stvx or lvx instructions when appropriate.
138 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
139 New function prototype.
140 (rs6000_quadword_masked_address_p): Likewise.
141 (rs6000_gen_lvx): Likewise.
142 (rs6000_gen_stvx): Likewise.
143 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
144 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
145 when memory address is aligned.
146 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
147 this split to select lvx instruction when memory address is aligned.
148 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
149 instruction when memory address is aligned.
150 (*vsx_le_perm_load_v16qi): Likewise.
151 (four unnamed splitters): Modify to select the stvx instruction
152 when memory is aligned.
154 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
156 * predict.c (determine_unlikely_bbs): Handle correctly BBs
157 which appears in the queue multiple times.
159 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
160 Alan Hayward <alan.hayward@arm.com>
161 David Sherwood <david.sherwood@arm.com>
163 * tree-vectorizer.h (vec_lower_bound): New structure.
164 (_loop_vec_info): Add check_nonzero and lower_bounds.
165 (LOOP_VINFO_CHECK_NONZERO): New macro.
166 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
167 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
168 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
169 fields. Make seg_len the distance travelled, not including the
171 (dr_direction_indicator): Declare.
172 (dr_zero_step_indicator): Likewise.
173 (dr_known_forward_stride_p): Likewise.
174 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
176 (runtime_alias_check_p): Allow runtime alias checks with
178 (operator ==): Compare access_size and align.
179 (prune_runtime_alias_test_list): Rework for new distinction between
180 the access_size and seg_len.
181 (create_intersect_range_checks_index): Likewise. Cope with polynomial
183 (get_segment_min_max): New function.
184 (create_intersect_range_checks): Use it.
185 (dr_step_indicator): New function.
186 (dr_direction_indicator): Likewise.
187 (dr_zero_step_indicator): Likewise.
188 (dr_known_forward_stride_p): Likewise.
189 * tree-loop-distribution.c (data_ref_segment_size): Return
190 DR_STEP * (niters - 1).
191 (compute_alias_check_pairs): Update call to the dr_with_seg_len
193 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
194 (vect_preserves_scalar_order_p): New function, split out from...
195 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
196 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
197 (vect_vfa_access_size): New function.
198 (vect_vfa_align): Likewise.
199 (vect_compile_time_alias): Take access_size_a and access_b arguments.
200 (dump_lower_bound): New function.
201 (vect_check_lower_bound): Likewise.
202 (vect_small_gap_p): Likewise.
203 (vectorizable_with_step_bound_p): Likewise.
204 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
205 depencies if the vectorization factor is 1. Convert the checks
206 for nonzero steps into checks on the bounds of DR_STEP. Try using
207 a bunds check for variable steps if the minimum required step is
208 relatively small. Update calls to the dr_with_seg_len
209 constructor and to vect_compile_time_alias.
210 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
212 (vect_loop_versioning): Call it.
213 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
215 (vect_estimate_min_profitable_iters): Account for any bounds checks.
217 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
218 Alan Hayward <alan.hayward@arm.com>
219 David Sherwood <david.sherwood@arm.com>
221 * doc/sourcebuild.texi (vect_scatter_store): Document.
222 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
224 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
226 * genopinit.c (main): Add supports_vec_scatter_store and
227 supports_vec_scatter_store_cached to target_optabs.
228 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
229 IFN_MASK_SCATTER_STORE.
230 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
232 * internal-fn.h (internal_store_fn_p): Declare.
233 (internal_fn_stored_value_index): Likewise.
234 * internal-fn.c (scatter_store_direct): New macro.
235 (expand_scatter_store_optab_fn): New function.
236 (direct_scatter_store_optab_supported_p): New macro.
237 (internal_store_fn_p): New function.
238 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
239 IFN_MASK_SCATTER_STORE.
240 (internal_fn_mask_index): Likewise.
241 (internal_fn_stored_value_index): New function.
242 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
244 * optabs-query.h (supports_vec_scatter_store_p): Declare.
245 * optabs-query.c (supports_vec_scatter_store_p): New function.
246 * tree-vectorizer.h (vect_get_store_rhs): Declare.
247 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
248 true for scatter stores.
249 (vect_gather_scatter_fn_p): Handle scatter stores too.
250 (vect_check_gather_scatter): Consider using scatter stores if
251 supports_vec_scatter_store_p.
252 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
254 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
255 internal_fn_stored_value_index.
256 (check_load_store_masking): Handle scatter stores too.
257 (vect_get_store_rhs): Make public.
258 (vectorizable_call): Use internal_store_fn_p.
259 (vectorizable_store): Handle scatter store internal functions.
260 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
261 when deciding whether the end of the group has been reached.
262 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
263 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
264 (mask_scatter_store<mode>): New insns.
266 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
267 Alan Hayward <alan.hayward@arm.com>
268 David Sherwood <david.sherwood@arm.com>
270 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
271 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
272 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
274 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
275 Use vect_truncate_gather_scatter_offset if we can't treat the
276 operation as a normal gather load or scatter store.
277 (get_group_load_store_type): Take the gather_scatter_info
278 as argument. Try using a gather load or scatter store for
279 single-element groups.
280 (get_load_store_type): Update calls to get_group_load_store_type
281 and vect_use_strided_gather_scatters_p.
283 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
284 Alan Hayward <alan.hayward@arm.com>
285 David Sherwood <david.sherwood@arm.com>
287 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
288 optional tree argument.
289 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
291 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
292 but continue to use the current value as a fallback.
293 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
294 to compare the updates.
295 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
296 (get_load_store_type): Use it when handling a strided access.
297 (vect_get_strided_load_store_ops): New function.
298 (vect_get_data_ptr_increment): Likewise.
299 (vectorizable_load): Handle strided gather loads. Always pass
300 a step to vect_create_data_ref_ptr and bump_vector_ptr.
302 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
303 Alan Hayward <alan.hayward@arm.com>
304 David Sherwood <david.sherwood@arm.com>
306 * doc/md.texi (gather_load@var{m}): Document.
307 (mask_gather_load@var{m}): Likewise.
308 * genopinit.c (main): Add supports_vec_gather_load and
309 supports_vec_gather_load_cached to target_optabs.
310 * optabs-tree.c (init_tree_optimization_optabs): Use
311 ggc_cleared_alloc to allocate target_optabs.
312 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
313 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
315 * internal-fn.h (internal_load_fn_p): Declare.
316 (internal_gather_scatter_fn_p): Likewise.
317 (internal_fn_mask_index): Likewise.
318 (internal_gather_scatter_fn_supported_p): Likewise.
319 * internal-fn.c (gather_load_direct): New macro.
320 (expand_gather_load_optab_fn): New function.
321 (direct_gather_load_optab_supported_p): New macro.
322 (direct_internal_fn_optab): New function.
323 (internal_load_fn_p): Likewise.
324 (internal_gather_scatter_fn_p): Likewise.
325 (internal_fn_mask_index): Likewise.
326 (internal_gather_scatter_fn_supported_p): Likewise.
327 * optabs-query.c (supports_at_least_one_mode_p): New function.
328 (supports_vec_gather_load_p): Likewise.
329 * optabs-query.h (supports_vec_gather_load_p): Declare.
330 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
331 and memory_type field.
332 (NUM_PATTERNS): Bump to 15.
333 * tree-vect-data-refs.c: Include internal-fn.h.
334 (vect_gather_scatter_fn_p): New function.
335 (vect_describe_gather_scatter_call): Likewise.
336 (vect_check_gather_scatter): Try using internal functions for
337 gather loads. Recognize existing calls to a gather load function.
338 (vect_analyze_data_refs): Consider using gather loads if
339 supports_vec_gather_load_p.
340 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
341 (vect_get_gather_scatter_offset_type): Likewise.
342 (vect_convert_mask_for_vectype): Likewise.
343 (vect_add_conversion_to_patterm): Likewise.
344 (vect_try_gather_scatter_pattern): Likewise.
345 (vect_recog_gather_scatter_pattern): New pattern recognizer.
346 (vect_vect_recog_func_ptrs): Add it.
347 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
348 internal_fn_mask_index and internal_gather_scatter_fn_p.
349 (check_load_store_masking): Take the gather_scatter_info as an
350 argument and handle gather loads.
351 (vect_get_gather_scatter_ops): New function.
352 (vectorizable_call): Check internal_load_fn_p.
353 (vectorizable_load): Likewise. Handle gather load internal
355 (vectorizable_store): Update call to check_load_store_masking.
356 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
357 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
358 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
359 (aarch64_gather_scale_operand_d): New predicates.
360 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
361 (mask_gather_load<mode>): New insns.
363 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
364 Alan Hayward <alan.hayward@arm.com>
365 David Sherwood <david.sherwood@arm.com>
367 * optabs.def (fold_left_plus_optab): New optab.
368 * doc/md.texi (fold_left_plus_@var{m}): Document.
369 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
370 * internal-fn.c (fold_left_direct): Define.
371 (expand_fold_left_optab_fn): Likewise.
372 (direct_fold_left_optab_supported_p): Likewise.
373 * fold-const-call.c (fold_const_fold_left): New function.
374 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
375 * tree-parloops.c (valid_reduction_p): New function.
376 (gather_scalar_reductions): Use it.
377 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
378 (vect_finish_replace_stmt): Declare.
379 * tree-vect-loop.c (fold_left_reduction_fn): New function.
380 (needs_fold_left_reduction_p): New function, split out from...
381 (vect_is_simple_reduction): ...here. Accept reductions that
382 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
383 (vect_force_simple_reduction): Also store the reduction type in
384 the assignment's STMT_VINFO_REDUC_TYPE.
385 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
386 (merge_with_identity): New function.
387 (vect_expand_fold_left): Likewise.
388 (vectorize_fold_left_reduction): Likewise.
389 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
390 scalar phi in place for it. Check for target support and reject
391 cases that would reassociate the operation. Defer the transform
392 phase to vectorize_fold_left_reduction.
393 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
394 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
395 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
397 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
399 * tree-if-conv.c (predicate_mem_writes): Remove redundant
400 call to ifc_temp_var.
402 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
403 Alan Hayward <alan.hayward@arm.com>
404 David Sherwood <david.sherwood@arm.com>
406 * target.def (legitimize_address_displacement): Take the original
407 offset as a poly_int.
408 * targhooks.h (default_legitimize_address_displacement): Update
410 * targhooks.c (default_legitimize_address_displacement): Likewise.
411 * doc/tm.texi: Regenerate.
412 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
413 as an argument, moving assert of ad->disp == ad->disp_term to...
414 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
415 Try calling targetm.legitimize_address_displacement before expanding
416 the address rather than afterwards, and adjust for the new interface.
417 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
418 Match the new hook interface. Handle SVE addresses.
419 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
422 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
424 * Makefile.in (OBJS): Add early-remat.o.
425 * target.def (select_early_remat_modes): New hook.
426 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
427 * doc/tm.texi: Regenerate.
428 * targhooks.h (default_select_early_remat_modes): Declare.
429 * targhooks.c (default_select_early_remat_modes): New function.
430 * timevar.def (TV_EARLY_REMAT): New timevar.
431 * passes.def (pass_early_remat): New pass.
432 * tree-pass.h (make_pass_early_remat): Declare.
433 * early-remat.c: New file.
434 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
436 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
438 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
439 Alan Hayward <alan.hayward@arm.com>
440 David Sherwood <david.sherwood@arm.com>
442 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
443 vfm1 with a bound_epilog parameter.
444 (vect_do_peeling): Update calls accordingly, and move the prologue
445 call earlier in the function. Treat the base bound_epilog as 0 for
446 fully-masked loops and retain vf - 1 for other loops. Add 1 to
447 this base when peeling for gaps.
448 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
449 with fully-masked loops.
450 (vect_estimate_min_profitable_iters): Handle the single peeled
451 iteration in that case.
453 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
454 Alan Hayward <alan.hayward@arm.com>
455 David Sherwood <david.sherwood@arm.com>
457 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
458 single-element interleaving even if the size is not a power of 2.
459 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
460 accesses for single-element interleaving if the group size is
463 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
464 Alan Hayward <alan.hayward@arm.com>
465 David Sherwood <david.sherwood@arm.com>
467 * doc/md.texi (fold_extract_last_@var{m}): Document.
468 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
469 * optabs.def (fold_extract_last_optab): New optab.
470 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
471 * internal-fn.c (fold_extract_direct): New macro.
472 (expand_fold_extract_optab_fn): Likewise.
473 (direct_fold_extract_optab_supported_p): Likewise.
474 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
475 * tree-vect-loop.c (vect_model_reduction_cost): Handle
476 EXTRACT_LAST_REDUCTION.
477 (get_initial_def_for_reduction): Do not create an initial vector
478 for EXTRACT_LAST_REDUCTION reductions.
479 (vectorizable_reduction): Leave the scalar phi in place for
480 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
481 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
482 epilogue code for EXTRACT_LAST_REDUCTION and defer the
483 transform phase to vectorizable_condition.
484 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
486 (vect_finish_stmt_generation): ...here.
487 (vect_finish_replace_stmt): New function.
488 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
489 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
491 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
493 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
494 Alan Hayward <alan.hayward@arm.com>
495 David Sherwood <david.sherwood@arm.com>
497 * doc/md.texi (extract_last_@var{m}): Document.
498 * optabs.def (extract_last_optab): New optab.
499 * internal-fn.def (EXTRACT_LAST): New internal function.
500 * internal-fn.c (cond_unary_direct): New macro.
501 (expand_cond_unary_optab_fn): Likewise.
502 (direct_cond_unary_optab_supported_p): Likewise.
503 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
504 loops using EXTRACT_LAST.
505 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
506 (extract_last_<mode>): ...this optab.
507 (vec_extract<mode><Vel>): Update accordingly.
509 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
510 Alan Hayward <alan.hayward@arm.com>
511 David Sherwood <david.sherwood@arm.com>
513 * target.def (empty_mask_is_expensive): New hook.
514 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
515 * doc/tm.texi: Regenerate.
516 * targhooks.h (default_empty_mask_is_expensive): Declare.
517 * targhooks.c (default_empty_mask_is_expensive): New function.
518 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
519 if the target says that empty masks are expensive.
520 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
522 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
524 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
525 Alan Hayward <alan.hayward@arm.com>
526 David Sherwood <david.sherwood@arm.com>
528 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
529 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
530 (vect_use_loop_mask_for_alignment_p): New function.
531 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
532 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
533 niters_skip argument. Make sure that the first niters_skip elements
534 of the first iteration are inactive.
535 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
536 Update call to vect_set_loop_masks_directly.
537 (get_misalign_in_elems): New function, split out from...
538 (vect_gen_prolog_loop_niters): ...here.
539 (vect_update_init_of_dr): Take a code argument that specifies whether
540 the adjustment should be added or subtracted.
541 (vect_update_init_of_drs): Likewise.
542 (vect_prepare_for_masked_peels): New function.
543 (vect_do_peeling): Skip prologue peeling if we're using a mask
544 instead. Update call to vect_update_inits_of_drs.
545 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
547 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
548 alignment. Do not include the number of peeled iterations in
549 the minimum threshold in that case.
550 (vectorizable_induction): Adjust the start value down by
551 LOOP_VINFO_MASK_SKIP_NITERS iterations.
552 (vect_transform_loop): Call vect_prepare_for_masked_peels.
553 Take the number of skipped iterations into account when calculating
555 * tree-vect-stmts.c (vect_gen_while_not): New function.
557 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
558 Alan Hayward <alan.hayward@arm.com>
559 David Sherwood <david.sherwood@arm.com>
561 * doc/sourcebuild.texi (vect_fully_masked): Document.
562 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
564 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
566 (vect_analyze_loop_2): ...here. Don't check the vectorization
567 factor against the number of loop iterations if the loop is
570 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
571 Alan Hayward <alan.hayward@arm.com>
572 David Sherwood <david.sherwood@arm.com>
574 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
575 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
576 (dump_groups): Update accordingly.
577 (iv_use::mem_type): New member variable.
578 (address_p): New function.
579 (record_use): Add a mem_type argument and initialize the new
581 (record_group_use): Add a mem_type argument. Use address_p.
582 Remove obsolete null checks of base_object. Update call to record_use.
583 (find_interesting_uses_op): Update call to record_group_use.
584 (find_interesting_uses_cond): Likewise.
585 (find_interesting_uses_address): Likewise.
586 (get_mem_type_for_internal_fn): New function.
587 (find_address_like_use): Likewise.
588 (find_interesting_uses_stmt): Try find_address_like_use before
589 calling find_interesting_uses_op.
590 (addr_offset_valid_p): Use the iv mem_type field as the type
591 of the addressed memory.
592 (add_autoinc_candidates): Likewise.
593 (get_address_cost): Likewise.
594 (split_small_address_groups_p): Use address_p.
595 (split_address_groups): Likewise.
596 (add_iv_candidate_for_use): Likewise.
597 (autoinc_possible_for_pair): Likewise.
598 (rewrite_groups): Likewise.
599 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
600 (determine_group_iv_cost): Update after split of USE_ADDRESS.
601 (get_alias_ptr_type_for_ptr_address): New function.
602 (rewrite_use_address): Rewrite address uses in calls that were
603 identified by find_address_like_use.
605 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
606 Alan Hayward <alan.hayward@arm.com>
607 David Sherwood <david.sherwood@arm.com>
609 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
611 * gimple-expr.h (is_gimple_addressable: Likewise.
612 * gimple-expr.c (is_gimple_address): Likewise.
613 * internal-fn.c (expand_call_mem_ref): New function.
614 (expand_mask_load_optab_fn): Use it.
615 (expand_mask_store_optab_fn): Likewise.
617 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
618 Alan Hayward <alan.hayward@arm.com>
619 David Sherwood <david.sherwood@arm.com>
621 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
622 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
623 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
624 (cond_umax@var{mode}): Document.
625 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
626 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
627 (cond_umin_optab, cond_umax_optab): New optabs.
628 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
629 (COND_IOR, COND_XOR): New internal functions.
630 * internal-fn.h (get_conditional_internal_fn): Declare.
631 * internal-fn.c (cond_binary_direct): New macro.
632 (expand_cond_binary_optab_fn): Likewise.
633 (direct_cond_binary_optab_supported_p): Likewise.
634 (get_conditional_internal_fn): New function.
635 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
636 Cope with reduction statements that are vectorized as calls rather
638 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
639 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
640 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
641 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
642 (UNSPEC_COND_EOR): New unspecs.
643 (optab): Add mappings for them.
644 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
645 (sve_int_op, sve_fp_op): New int attributes.
647 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
648 Alan Hayward <alan.hayward@arm.com>
649 David Sherwood <david.sherwood@arm.com>
651 * optabs.def (while_ult_optab): New optab.
652 * doc/md.texi (while_ult@var{m}@var{n}): Document.
653 * internal-fn.def (WHILE_ULT): New internal function.
654 * internal-fn.h (direct_internal_fn_supported_p): New override
655 that takes two types as argument.
656 * internal-fn.c (while_direct): New macro.
657 (expand_while_optab_fn): New function.
658 (convert_optab_supported_p): Likewise.
659 (direct_while_optab_supported_p): New macro.
660 * wide-int.h (wi::udiv_ceil): New function.
661 * tree-vectorizer.h (rgroup_masks): New structure.
662 (vec_loop_masks): New typedef.
663 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
665 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
666 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
667 (vect_max_vf): New function.
668 (slpeel_make_loop_iterate_ntimes): Delete.
669 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
670 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
671 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
672 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
673 internal-fn.h, stor-layout.h and optabs-query.h.
674 (vect_set_loop_mask): New function.
675 (add_preheader_seq): Likewise.
676 (add_header_seq): Likewise.
677 (interleave_supported_p): Likewise.
678 (vect_maybe_permute_loop_masks): Likewise.
679 (vect_set_loop_masks_directly): Likewise.
680 (vect_set_loop_condition_masked): Likewise.
681 (vect_set_loop_condition_unmasked): New function, split out from
682 slpeel_make_loop_iterate_ntimes.
683 (slpeel_make_loop_iterate_ntimes): Rename to..
684 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
685 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
686 (vect_do_peeling): Update call accordingly.
687 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
689 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
690 mask_compare_type, can_fully_mask_p and fully_masked_p.
691 (release_vec_loop_masks): New function.
692 (_loop_vec_info): Use it to free the loop masks.
693 (can_produce_all_loop_masks_p): New function.
694 (vect_get_max_nscalars_per_iter): Likewise.
695 (vect_verify_full_masking): Likewise.
696 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
697 retries, and free the mask rgroups before retrying. Check loop-wide
698 reasons for disallowing fully-masked loops. Make the final decision
699 about whether use a fully-masked loop or not.
700 (vect_estimate_min_profitable_iters): Do not assume that peeling
701 for the number of iterations will be needed for fully-masked loops.
702 (vectorizable_reduction): Disable fully-masked loops.
703 (vectorizable_live_operation): Likewise.
704 (vect_halve_mask_nunits): New function.
705 (vect_double_mask_nunits): Likewise.
706 (vect_record_loop_mask): Likewise.
707 (vect_get_loop_mask): Likewise.
708 (vect_transform_loop): Handle the case in which the final loop
709 iteration might handle a partial vector. Call vect_set_loop_condition
710 instead of slpeel_make_loop_iterate_ntimes.
711 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
712 (check_load_store_masking): New function.
713 (prepare_load_store_mask): Likewise.
714 (vectorizable_store): Handle fully-masked loops.
715 (vectorizable_load): Likewise.
716 (supportable_widening_operation): Use vect_halve_mask_nunits for
718 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
719 (vect_gen_while): New function.
720 * config/aarch64/aarch64.md (umax<mode>3): New expander.
721 (aarch64_uqdec<mode>): New insn.
723 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
724 Alan Hayward <alan.hayward@arm.com>
725 David Sherwood <david.sherwood@arm.com>
727 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
728 (reduc_xor_scal_optab): New optabs.
729 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
730 (reduc_xor_scal_@var{m}): Document.
731 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
732 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
734 * fold-const-call.c (fold_const_call): Handle them.
735 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
736 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
737 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
738 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
739 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
740 (UNSPEC_XORV): New unspecs.
741 (optab): Add entries for them.
742 (BITWISEV): New int iterator.
743 (bit_reduc_op): New int attributes.
745 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
746 Alan Hayward <alan.hayward@arm.com>
747 David Sherwood <david.sherwood@arm.com>
749 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
750 * internal-fn.def (VEC_SHL_INSERT): New internal function.
751 * optabs.def (vec_shl_insert_optab): New optab.
752 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
753 (duplicate_and_interleave): Likewise.
754 * tree-vect-loop.c: Include internal-fn.h.
755 (neutral_op_for_slp_reduction): New function, split out from
756 get_initial_defs_for_reduction.
757 (get_initial_def_for_reduction): Handle option 2 for variable-length
758 vectors by loading the neutral value into a vector and then shifting
759 the initial value into element 0.
760 (get_initial_defs_for_reduction): Replace the code argument with
761 the neutral value calculated by neutral_op_for_slp_reduction.
762 Use gimple_build_vector for constant-length vectors.
763 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
764 but the first group_size elements have a neutral value.
765 Use duplicate_and_interleave otherwise.
766 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
767 Update call to get_initial_defs_for_reduction. Handle SLP
768 reductions for variable-length vectors by creating one vector
769 result for each scalar result, with the elements associated
770 with other scalar results stubbed out with the neutral value.
771 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
772 Require IFN_VEC_SHL_INSERT for double reductions on
773 variable-length vectors, or SLP reductions that have
774 a neutral value. Require can_duplicate_and_interleave_p
775 support for variable-length unchained SLP reductions if there
776 is no neutral value, such as for MIN/MAX reductions. Also require
777 the number of vector elements to be a multiple of the number of
778 SLP statements when doing variable-length unchained SLP reductions.
779 Update call to vect_create_epilog_for_reduction.
780 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
781 and remove initial values.
782 (duplicate_and_interleave): Make public.
783 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
784 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
786 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
787 Alan Hayward <alan.hayward@arm.com>
788 David Sherwood <david.sherwood@arm.com>
790 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
791 (can_duplicate_and_interleave_p): New function.
792 (vect_get_and_check_slp_defs): Take the vector of statements
793 rather than just the current one. Remove excess parentheses.
794 Restriction rejectinon of vect_constant_def and vect_external_def
795 for variable-length vectors to boolean types, or types for which
796 can_duplicate_and_interleave_p is false.
797 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
798 (duplicate_and_interleave): New function.
799 (vect_get_constant_vectors): Use gimple_build_vector for
800 constant-length vectors and suitable variable-length constant
801 vectors. Use duplicate_and_interleave for other variable-length
802 vectors. Don't defer the update when inserting new statements.
804 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
805 Alan Hayward <alan.hayward@arm.com>
806 David Sherwood <david.sherwood@arm.com>
808 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
809 min_profitable_iters doesn't go negative.
811 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
812 Alan Hayward <alan.hayward@arm.com>
813 David Sherwood <david.sherwood@arm.com>
815 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
816 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
817 * optabs.def (vec_mask_load_lanes_optab): New optab.
818 (vec_mask_store_lanes_optab): Likewise.
819 * internal-fn.def (MASK_LOAD_LANES): New internal function.
820 (MASK_STORE_LANES): Likewise.
821 * internal-fn.c (mask_load_lanes_direct): New macro.
822 (mask_store_lanes_direct): Likewise.
823 (expand_mask_load_optab_fn): Handle masked operations.
824 (expand_mask_load_lanes_optab_fn): New macro.
825 (expand_mask_store_optab_fn): Handle masked operations.
826 (expand_mask_store_lanes_optab_fn): New macro.
827 (direct_mask_load_lanes_optab_supported_p): Likewise.
828 (direct_mask_store_lanes_optab_supported_p): Likewise.
829 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
831 (vect_load_lanes_supported): Likewise.
832 * tree-vect-data-refs.c (strip_conversion): New function.
833 (can_group_stmts_p): Likewise.
834 (vect_analyze_data_ref_accesses): Use it instead of checking
835 for a pair of assignments.
836 (vect_store_lanes_supported): Take a masked_p parameter.
837 (vect_load_lanes_supported): Likewise.
838 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
839 vect_store_lanes_supported and vect_load_lanes_supported.
840 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
841 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
842 parameter. Don't allow gaps for masked accesses.
843 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
844 and vect_load_lanes_supported.
845 (get_load_store_type): Take a masked_p parameter and update
846 call to get_group_load_store_type.
847 (vectorizable_store): Update call to get_load_store_type.
848 Handle IFN_MASK_STORE_LANES.
849 (vectorizable_load): Update call to get_load_store_type.
850 Handle IFN_MASK_LOAD_LANES.
852 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
853 Alan Hayward <alan.hayward@arm.com>
854 David Sherwood <david.sherwood@arm.com>
856 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
858 * config/aarch64/aarch64-protos.h
859 (aarch64_sve_struct_memory_operand_p): Declare.
860 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
861 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
862 (VPRED, vpred): Handle SVE structure modes.
863 * config/aarch64/constraints.md (Utx): New constraint.
864 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
865 (aarch64_sve_struct_nonimmediate_operand): New predicates.
866 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
867 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
868 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
869 structure modes. Split into pieces after RA.
870 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
871 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
873 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
875 (aarch64_classify_address): Likewise.
876 (sizetochar): Move earlier in file.
877 (aarch64_print_operand): Handle SVE register lists.
878 (aarch64_array_mode): New function.
879 (aarch64_sve_struct_memory_operand_p): Likewise.
880 (TARGET_ARRAY_MODE): Redefine.
882 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
883 Alan Hayward <alan.hayward@arm.com>
884 David Sherwood <david.sherwood@arm.com>
886 * target.def (array_mode): New target hook.
887 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
888 * doc/tm.texi: Regenerate.
889 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
890 * hooks.c (hook_optmode_mode_uhwi_none): New function.
891 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
893 * stor-layout.c (mode_for_array): Likewise. Support polynomial
896 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
897 Alan Hayward <alan.hayward@arm.com>
898 David Sherwood <david.sherwood@arm.com>
900 * fold-const.c (fold_binary_loc): Check the argument types
901 rather than the result type when testing for a vector operation.
903 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
905 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
906 * doc/tm.texi: Regenerate.
908 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
909 Alan Hayward <alan.hayward@arm.com>
910 David Sherwood <david.sherwood@arm.com>
912 * doc/invoke.texi (-msve-vector-bits=): Document new option.
913 (sve): Document new AArch64 extension.
914 * doc/md.texi (w): Extend the description of the AArch64
915 constraint to include SVE vectors.
916 (Upl, Upa): Document new AArch64 predicate constraints.
917 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
919 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
920 (msve-vector-bits=): New option.
921 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
922 SVE when these are disabled.
923 (sve): New extension.
924 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
925 modes. Adjust their number of units based on aarch64_sve_vg.
926 (MAX_BITSIZE_MODE_ANY_MODE): Define.
927 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
928 aarch64_addr_query_type.
929 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
930 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
931 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
932 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
933 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
934 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
935 (aarch64_simd_imm_zero_p): Delete.
936 (aarch64_check_zero_based_sve_index_immediate): Declare.
937 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
938 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
939 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
940 (aarch64_sve_float_mul_immediate_p): Likewise.
941 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
943 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
944 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
945 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
946 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
947 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
948 (aarch64_regmode_natural_size): Likewise.
949 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
950 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
952 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
953 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
954 for VG and the SVE predicate registers.
955 (V_ALIASES): Add a "z"-prefixed alias.
956 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
957 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
958 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
959 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
960 (REG_CLASS_NAMES): Add entries for them.
961 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
962 and the predicate registers.
963 (aarch64_sve_vg): Declare.
964 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
965 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
966 (REGMODE_NATURAL_SIZE): Define.
967 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
969 * config/aarch64/aarch64.c: Include cfgrtl.h.
970 (simd_immediate_info): Add a constructor for series vectors,
971 and an associated step field.
972 (aarch64_sve_vg): New variable.
973 (aarch64_dbx_register_number): Handle VG and the predicate registers.
974 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
975 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
976 (VEC_ANY_DATA, VEC_STRUCT): New constants.
977 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
978 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
979 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
980 (aarch64_get_mask_mode): New functions.
981 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
982 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
983 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
984 predicate modes and predicate registers. Explicitly restrict
985 GPRs to modes of 16 bytes or smaller. Only allow FP registers
986 to store a vector mode if it is recognized by
987 aarch64_classify_vector_mode.
988 (aarch64_regmode_natural_size): New function.
989 (aarch64_hard_regno_caller_save_mode): Return the original mode
991 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
992 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
993 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
994 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
996 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
997 does not overlap dest if the function is frame-related. Handle
999 (aarch64_split_add_offset): New function.
1000 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1001 them aarch64_add_offset.
1002 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1003 and update call to aarch64_sub_sp.
1004 (aarch64_add_cfa_expression): New function.
1005 (aarch64_expand_prologue): Pass extra temporary registers to the
1006 functions above. Handle the case in which we need to emit new
1007 DW_CFA_expressions for registers that were originally saved
1008 relative to the stack pointer, but now have to be expressed
1009 relative to the frame pointer.
1010 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1012 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1013 IP0 and IP1 values for SVE frames.
1014 (aarch64_expand_vec_series): New function.
1015 (aarch64_expand_sve_widened_duplicate): Likewise.
1016 (aarch64_expand_sve_const_vector): Likewise.
1017 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1018 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1019 into the register, rather than emitting a SET directly.
1020 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1021 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1022 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1023 (offset_9bit_signed_scaled_p): New functions.
1024 (aarch64_replicate_bitmask_imm): New function.
1025 (aarch64_bitmask_imm): Use it.
1026 (aarch64_cannot_force_const_mem): Reject expressions involving
1027 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1028 (aarch64_classify_index): Handle SVE indices, by requiring
1029 a plain register index with a scale that matches the element size.
1030 (aarch64_classify_address): Handle SVE addresses. Assert that
1031 the mode of the address is VOIDmode or an integer mode.
1032 Update call to aarch64_classify_symbol.
1033 (aarch64_classify_symbolic_expression): Update call to
1034 aarch64_classify_symbol.
1035 (aarch64_const_vec_all_in_range_p): New function.
1036 (aarch64_print_vector_float_operand): Likewise.
1037 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1038 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1039 and the FP immediates 1.0 and 0.5.
1040 (aarch64_print_address_internal): Handle SVE addresses.
1041 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1042 (aarch64_regno_regclass): Handle predicate registers.
1043 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1045 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1046 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1047 (aarch64_convert_sve_vector_bits): New function.
1048 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1049 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1051 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1052 Handle SVE vector and predicate modes. Accept VL-based constants
1053 that need only one temporary register, and VL offsets that require
1054 no temporary registers.
1055 (aarch64_conditional_register_usage): Mark the predicate registers
1056 as fixed if SVE isn't available.
1057 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1058 Return true for SVE vector and predicate modes.
1059 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1060 rather than an unsigned int. Handle SVE modes.
1061 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1063 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1065 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1066 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1067 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1068 (aarch64_sve_float_mul_immediate_p): New functions.
1069 (aarch64_sve_valid_immediate): New function.
1070 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1071 Explicitly reject structure modes. Check for INDEX constants.
1072 Handle PTRUE and PFALSE constants.
1073 (aarch64_check_zero_based_sve_index_immediate): New function.
1074 (aarch64_simd_imm_zero_p): Delete.
1075 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1076 vector modes. Accept constants in the range of CNT[BHWD].
1077 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1078 ask for an Advanced SIMD mode.
1079 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1080 (aarch64_simd_vector_alignment): Handle SVE predicates.
1081 (aarch64_vectorize_preferred_vector_alignment): New function.
1082 (aarch64_simd_vector_alignment_reachable): Use it instead of
1084 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1085 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1087 (MAX_VECT_LEN): Delete.
1088 (expand_vec_perm_d): Add a vec_flags field.
1089 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1090 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1091 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1093 (aarch64_evpc_rev): Rename to...
1094 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1095 (aarch64_evpc_rev_global): New function.
1096 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1097 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1099 (aarch64_evpc_sve_tbl): New function.
1100 (aarch64_expand_vec_perm_const_1): Update after rename of
1101 aarch64_evpc_rev. Handle SVE permutes too, trying
1102 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1103 than aarch64_evpc_tbl.
1104 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1105 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1106 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1107 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1108 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1109 (aarch64_expand_sve_vcond): New functions.
1110 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1111 of aarch64_vector_mode_p.
1112 (aarch64_dwarf_poly_indeterminate_value): New function.
1113 (aarch64_compute_pressure_classes): Likewise.
1114 (aarch64_can_change_mode_class): Likewise.
1115 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1116 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1117 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1118 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1119 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1120 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1121 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1122 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1124 (Dn, Dl, Dr): Accept const as well as const_vector.
1125 (Dz): Likewise. Compare against CONST0_RTX.
1126 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1127 of "vector" where appropriate.
1128 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1129 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1130 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1131 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1132 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1133 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1134 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1135 (v_int_equiv): Extend to SVE modes.
1136 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1138 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1139 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1140 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1141 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1142 (SVE_COND_FP_CMP): New int iterators.
1143 (perm_hilo): Handle the new unpack unspecs.
1144 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1146 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1147 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1148 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1149 (aarch64_equality_operator, aarch64_constant_vector_operand)
1150 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1151 (aarch64_sve_nonimmediate_operand): Likewise.
1152 (aarch64_sve_general_operand): Likewise.
1153 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1154 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1155 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1156 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1157 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1158 (aarch64_sve_float_arith_immediate): Likewise.
1159 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1160 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1161 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1162 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1163 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1164 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1165 (aarch64_sve_float_arith_operand): Likewise.
1166 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1167 (aarch64_sve_float_mul_operand): Likewise.
1168 (aarch64_sve_vec_perm_operand): Likewise.
1169 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1170 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1171 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1172 as well as const_vector.
1173 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1174 in file. Use CONST0_RTX and CONSTM1_RTX.
1175 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1176 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1177 Use aarch64_simd_imm_zero.
1178 * config/aarch64/aarch64-sve.md: New file.
1179 * config/aarch64/aarch64.md: Include it.
1180 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1181 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1182 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1183 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1184 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1185 (sve): New attribute.
1186 (enabled): Disable instructions with the sve attribute unless
1188 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1189 aarch64_expand_mov_immediate.
1190 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1191 CNT[BHSD] immediates.
1192 (movti): Split CONST_POLY_INT moves into two halves.
1193 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1194 Split additions that need a temporary here if the destination
1195 is the stack pointer.
1196 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1197 (*add<mode>3_poly_1): New instruction.
1198 (set_clobber_cc): New expander.
1200 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1202 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1203 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1204 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1205 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1206 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1207 Change innermode from fixed_mode_size to machine_mode.
1208 (simplify_subreg): Update call accordingly. Handle a constant-sized
1209 subreg of a variable-length CONST_VECTOR.
1211 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1212 Alan Hayward <alan.hayward@arm.com>
1213 David Sherwood <david.sherwood@arm.com>
1215 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1216 (add_offset_to_base): New function, split out from...
1217 (create_mem_ref): ...here. When handling a scale other than 1,
1218 check first whether the address is valid without the offset.
1219 Add it into the base if so, leaving the index and scale as-is.
1221 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1224 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1225 fold_for_warn before checking if arg2 is INTEGER_CST.
1227 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1229 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1230 (store_multiple_operation): Delete.
1231 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1232 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1233 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1234 guarded by TARGET_STRING.
1235 (rs6000_output_load_multiple): Delete.
1236 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1237 OPTION_MASK_STRING / TARGET_STRING handling.
1238 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1239 (const rs6000_opt_masks) <"string">: Change mask to 0.
1240 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1241 (MASK_STRING): Delete.
1242 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1244 (load_multiple): Delete.
1251 (store_multiple): Delete.
1258 (movmemsi_8reg): Delete.
1259 (corresponding unnamed define_insn): Delete.
1260 (movmemsi_6reg): Delete.
1261 (corresponding unnamed define_insn): Delete.
1262 (movmemsi_4reg): Delete.
1263 (corresponding unnamed define_insn): Delete.
1264 (movmemsi_2reg): Delete.
1265 (corresponding unnamed define_insn): Delete.
1266 (movmemsi_1reg): Delete.
1267 (corresponding unnamed define_insn): Delete.
1268 * config/rs6000/rs6000.opt (mno-string): New.
1269 (mstring): Replace by deprecation warning stub.
1270 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1272 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1274 * regrename.c (regrename_do_replace): If replacing the same
1275 reg multiple times, try to reuse last created gen_raw_REG.
1278 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1279 main to workaround a bug in GDB.
1281 2018-01-12 Tom de Vries <tom@codesourcery.com>
1284 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1286 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1288 PR rtl-optimization/80481
1289 * ira-color.c (get_cap_member): New function.
1290 (allocnos_conflict_by_live_ranges_p): Use it.
1291 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1292 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1294 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1297 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1298 (*saddl_se_1): Ditto.
1300 (*saddl_se_1): Ditto.
1302 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1304 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1305 rather than wi::to_widest for DR_INITs.
1306 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1307 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1308 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1310 (vect_analyze_group_access_1): Note that here.
1312 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1314 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1315 polynomial type sizes.
1317 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1319 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1320 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1321 (gimple_add_tmp_var): Likewise.
1323 2018-01-12 Martin Liska <mliska@suse.cz>
1325 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1326 (gimple_alloc_sizes): Likewise.
1327 (dump_gimple_statistics): Use PRIu64 in printf format.
1328 * gimple.h: Change uint64_t to int.
1330 2018-01-12 Martin Liska <mliska@suse.cz>
1332 * tree-core.h: Use uint64_t instead of int.
1333 * tree.c (tree_node_counts): Likewise.
1334 (tree_node_sizes): Likewise.
1335 (dump_tree_statistics): Use PRIu64 in printf format.
1337 2018-01-12 Martin Liska <mliska@suse.cz>
1339 * Makefile.in: As qsort_chk is implemented in vec.c, add
1340 vec.o to linkage of gencfn-macros.
1341 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1342 passing the info to record_node_allocation_statistics.
1343 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1345 * ggc-common.c (struct ggc_usage): Add operator== and use
1346 it in operator< and compare function.
1347 * mem-stats.h (struct mem_usage): Likewise.
1348 * vec.c (struct vec_usage): Remove operator< and compare
1349 function. Can be simply inherited.
1351 2018-01-12 Martin Jambor <mjambor@suse.cz>
1354 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1355 * tree-ssa-math-opts.c: Include domwalk.h.
1356 (convert_mult_to_fma_1): New function.
1357 (fma_transformation_info): New type.
1358 (fma_deferring_state): Likewise.
1359 (cancel_fma_deferring): New function.
1360 (result_of_phi): Likewise.
1361 (last_fma_candidate_feeds_initial_phi): Likewise.
1362 (convert_mult_to_fma): Added deferring logic, split actual
1363 transformation to convert_mult_to_fma_1.
1364 (math_opts_dom_walker): New type.
1365 (math_opts_dom_walker::after_dom_children): New method, body moved
1366 here from pass_optimize_widening_mul::execute, added deferring logic
1368 (pass_optimize_widening_mul::execute): Moved most of code to
1369 math_opts_dom_walker::after_dom_children.
1370 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1371 * config/i386/i386.c (ix86_option_override_internal): Added
1372 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1374 2018-01-12 Richard Biener <rguenther@suse.de>
1377 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1378 inline instance vars.
1380 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1383 * config/rx/rx.c (rx_is_restricted_memory_address):
1386 2018-01-12 Richard Biener <rguenther@suse.de>
1388 PR tree-optimization/80846
1389 * target.def (split_reduction): New target hook.
1390 * targhooks.c (default_split_reduction): New function.
1391 * targhooks.h (default_split_reduction): Declare.
1392 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1393 target requests first reduce vectors by combining low and high
1395 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1396 (get_vectype_for_scalar_type_and_size): Export.
1397 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1398 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1399 * doc/tm.texi: Regenerate.
1400 * config/i386/i386.c (ix86_split_reduction): Implement
1401 TARGET_VECTORIZE_SPLIT_REDUCTION.
1403 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1406 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1407 in PIC mode except for TARGET_VXWORKS_RTP.
1408 * config/sparc/sparc.c: Include cfgrtl.h.
1409 (TARGET_INIT_PIC_REG): Define.
1410 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1411 (sparc_pic_register_p): New predicate.
1412 (sparc_legitimate_address_p): Use it.
1413 (sparc_legitimize_pic_address): Likewise.
1414 (sparc_delegitimize_address): Likewise.
1415 (sparc_mode_dependent_address_p): Likewise.
1416 (gen_load_pcrel_sym): Remove 4th parameter.
1417 (load_got_register): Adjust call to above. Remove obsolete stuff.
1418 (sparc_expand_prologue): Do not call load_got_register here.
1419 (sparc_flat_expand_prologue): Likewise.
1420 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1421 (sparc_use_pseudo_pic_reg): New function.
1422 (sparc_init_pic_reg): Likewise.
1423 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1424 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1426 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1428 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1429 Add item for branch_cost.
1431 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1433 PR rtl-optimization/83565
1434 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1435 not extend the result to a larger mode for rotate operations.
1436 (num_sign_bit_copies1): Likewise.
1438 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1441 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1443 Use values-Xc.o for -pedantic.
1444 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1446 2018-01-12 Martin Liska <mliska@suse.cz>
1449 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1451 (possible_polymorphic_call_targets): Use it.
1452 (ipa_devirt): Likewise.
1454 2018-01-12 Martin Liska <mliska@suse.cz>
1456 * profile-count.h (enum profile_quality): Use 0 as invalid
1457 enum value of profile_quality.
1459 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1461 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1462 -mext-string options.
1464 2018-01-12 Richard Biener <rguenther@suse.de>
1466 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1467 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1468 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1470 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1472 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1474 * configure.ac (--with-long-double-format): Add support for the
1475 configuration option to change the default long double format on
1477 * config.gcc (powerpc*-linux*-*): Likewise.
1478 * configure: Regenerate.
1479 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1480 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1481 used without modification.
1483 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1485 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1486 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1487 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1488 MISC_BUILTIN_SPEC_BARRIER.
1489 (rs6000_init_builtins): Likewise.
1490 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1492 (speculation_barrier): New define_insn.
1493 * doc/extend.texi: Document __builtin_speculation_barrier.
1495 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1498 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1499 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1500 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1502 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1503 integral modes instead of "ss" and "sd".
1504 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1505 vectors with 32-bit and 64-bit elements.
1506 (vecdupssescalarmodesuffix): New mode attribute.
1507 (vec_dup<mode>): Use it.
1509 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1512 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1513 frame if argument is passed on stack.
1515 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1518 * ree.c (combine_reaching_defs): Optimize also
1519 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1520 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1522 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1525 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1527 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1530 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1531 after they are computed.
1533 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1535 PR tree-optimization/83695
1536 * gimple-loop-linterchange.cc
1537 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1538 reset cached scev information after interchange.
1539 (pass_linterchange::execute): Remove call to scev_reset_htab.
1541 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1543 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1544 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1545 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1546 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1547 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1548 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1549 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1550 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1551 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1552 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1553 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1554 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1555 (V_lane_reg): Likewise.
1556 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1558 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1559 (vfmal_lane_low<mode>_intrinsic,
1560 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1561 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1562 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1563 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1564 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1565 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1567 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1569 * config/arm/arm-cpus.in (fp16fml): New feature.
1570 (ALL_SIMD): Add fp16fml.
1571 (armv8.2-a): Add fp16fml as an option.
1572 (armv8.3-a): Likewise.
1573 (armv8.4-a): Add fp16fml as part of fp16.
1574 * config/arm/arm.h (TARGET_FP16FML): Define.
1575 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1577 * config/arm/arm-modes.def (V2HF): Define.
1578 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1579 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1580 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1581 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1582 vfmsl_low, vfmsl_high): New set of builtins.
1583 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1584 (vfml_op): New code attribute.
1585 (VFMLHALVES): New int iterator.
1586 (VFML, VFMLSEL): New mode attributes.
1587 (V_reg): Define mapping for V2HF.
1588 (V_hi, V_lo): New mode attributes.
1589 (VF_constraint): Likewise.
1590 (vfml_half, vfml_half_selector): New int attributes.
1591 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1593 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1594 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1596 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1597 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1598 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1599 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1601 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1602 Document new effective target and option set.
1604 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1606 * config/arm/arm-cpus.in (armv8_4): New feature.
1607 (ARMv8_4a): New fgroup.
1608 (armv8.4-a): New arch.
1609 * config/arm/arm-tables.opt: Regenerate.
1610 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1611 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1612 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1613 Add matching rules for -march=armv8.4-a and extensions.
1614 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1616 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1619 * config/rx/rx.md (BW): New mode attribute.
1620 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1622 2018-01-11 Richard Biener <rguenther@suse.de>
1624 PR tree-optimization/83435
1625 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1626 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1627 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1629 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1630 Alan Hayward <alan.hayward@arm.com>
1631 David Sherwood <david.sherwood@arm.com>
1633 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1635 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1636 (aarch64_print_address_internal): Use it to check for a zero offset.
1638 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1639 Alan Hayward <alan.hayward@arm.com>
1640 David Sherwood <david.sherwood@arm.com>
1642 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1643 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1644 Return a poly_int64 rather than a HOST_WIDE_INT.
1645 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1646 rather than a HOST_WIDE_INT.
1647 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1648 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1649 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1650 final_offset from HOST_WIDE_INT to poly_int64.
1651 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1652 to_constant when getting the number of units in an Advanced SIMD
1654 (aarch64_builtin_vectorized_function): Check for a constant number
1656 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1658 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1659 attribute instead of GET_MODE_NUNITS.
1660 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1661 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1662 GET_MODE_SIZE for fixed-size registers.
1663 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1664 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1665 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1666 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1667 (aarch64_print_operand, aarch64_print_address_internal)
1668 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1669 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1670 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1671 Handle polynomial GET_MODE_SIZE.
1672 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1673 wider than SImode without modification.
1674 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1675 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1676 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1677 passing and returning SVE modes.
1678 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1679 rather than GEN_INT.
1680 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1681 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1682 (aarch64_allocate_and_probe_stack_space): Likewise.
1683 (aarch64_layout_frame): Cope with polynomial offsets.
1684 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1685 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1687 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1688 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1689 poly_int64 rather than a HOST_WIDE_INT.
1690 (aarch64_get_separate_components, aarch64_process_components)
1691 (aarch64_expand_prologue, aarch64_expand_epilogue)
1692 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1693 (aarch64_anchor_offset): New function, split out from...
1694 (aarch64_legitimize_address): ...here.
1695 (aarch64_builtin_vectorization_cost): Handle polynomial
1696 TYPE_VECTOR_SUBPARTS.
1697 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1699 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1700 number of elements from the PARALLEL rather than the mode.
1701 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1702 rather than GET_MODE_BITSIZE.
1703 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1704 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1705 (aarch64_expand_vec_perm_const_1): Handle polynomial
1706 d->perm.length () and d->perm elements.
1707 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
1708 Apply to_constant to d->perm elements.
1709 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1710 polynomial CONST_VECTOR_NUNITS.
1711 (aarch64_move_pointer): Take amount as a poly_int64 rather
1713 (aarch64_progress_pointer): Avoid temporary variable.
1714 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1715 the mode attribute instead of GET_MODE.
1717 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1718 Alan Hayward <alan.hayward@arm.com>
1719 David Sherwood <david.sherwood@arm.com>
1721 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1722 x exists before using it.
1723 (aarch64_add_constant_internal): Rename to...
1724 (aarch64_add_offset_1): ...this. Replace regnum with separate
1725 src and dest rtxes. Handle the case in which they're different,
1726 including when the offset is zero. Replace scratchreg with an rtx.
1727 Use 2 additions if there is no spare register into which we can
1728 move a 16-bit constant.
1729 (aarch64_add_constant): Delete.
1730 (aarch64_add_offset): Replace reg with separate src and dest
1731 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
1732 Use aarch64_add_offset_1.
1733 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1734 an rtx rather than an int. Take the delta as a poly_int64
1735 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
1736 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1737 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1738 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1739 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1741 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1742 aarch64_add_constant.
1744 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1746 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1747 Use scalar_float_mode.
1749 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1751 * config/aarch64/aarch64-simd.md
1752 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1753 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1754 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1755 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1756 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1757 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1758 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1759 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1760 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1761 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1763 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1766 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1767 targ_options->x_arm_arch_string is non NULL.
1769 2018-01-11 Tamar Christina <tamar.christina@arm.com>
1771 * config/aarch64/aarch64.h
1772 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
1774 2018-01-11 Sudakshina Das <sudi.das@arm.com>
1777 * expmed.c (emit_store_flag_force): Swap if const op0
1778 and change VOIDmode to mode of op0.
1780 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1782 PR rtl-optimization/83761
1783 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1784 than bytes to mode_for_size.
1786 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1789 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1790 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1793 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1796 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1797 when in layout mode.
1798 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1799 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1802 2018-01-10 Michael Collison <michael.collison@arm.com>
1804 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1805 * config/aarch64/aarch64-option-extension.def: Add
1806 AARCH64_OPT_EXTENSION of 'fp16fml'.
1807 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1808 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1809 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1810 * config/aarch64/constraints.md (Ui7): New constraint.
1811 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1812 (VFMLA_SEL_W): Ditto.
1815 (VFMLA16_LOW): New int iterator.
1816 (VFMLA16_HIGH): Ditto.
1817 (UNSPEC_FMLAL): New unspec.
1818 (UNSPEC_FMLSL): Ditto.
1819 (UNSPEC_FMLAL2): Ditto.
1820 (UNSPEC_FMLSL2): Ditto.
1821 (f16mac): New code attribute.
1822 * config/aarch64/aarch64-simd-builtins.def
1823 (aarch64_fmlal_lowv2sf): Ditto.
1824 (aarch64_fmlsl_lowv2sf): Ditto.
1825 (aarch64_fmlalq_lowv4sf): Ditto.
1826 (aarch64_fmlslq_lowv4sf): Ditto.
1827 (aarch64_fmlal_highv2sf): Ditto.
1828 (aarch64_fmlsl_highv2sf): Ditto.
1829 (aarch64_fmlalq_highv4sf): Ditto.
1830 (aarch64_fmlslq_highv4sf): Ditto.
1831 (aarch64_fmlal_lane_lowv2sf): Ditto.
1832 (aarch64_fmlsl_lane_lowv2sf): Ditto.
1833 (aarch64_fmlal_laneq_lowv2sf): Ditto.
1834 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
1835 (aarch64_fmlalq_lane_lowv4sf): Ditto.
1836 (aarch64_fmlsl_lane_lowv4sf): Ditto.
1837 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
1838 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
1839 (aarch64_fmlal_lane_highv2sf): Ditto.
1840 (aarch64_fmlsl_lane_highv2sf): Ditto.
1841 (aarch64_fmlal_laneq_highv2sf): Ditto.
1842 (aarch64_fmlsl_laneq_highv2sf): Ditto.
1843 (aarch64_fmlalq_lane_highv4sf): Ditto.
1844 (aarch64_fmlsl_lane_highv4sf): Ditto.
1845 (aarch64_fmlalq_laneq_highv4sf): Ditto.
1846 (aarch64_fmlsl_laneq_highv4sf): Ditto.
1847 * config/aarch64/aarch64-simd.md:
1848 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
1849 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1850 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1851 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1852 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1853 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1854 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1855 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1856 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1857 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1858 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1859 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1860 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1861 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1862 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1863 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1864 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1865 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1866 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1867 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1868 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1869 (vfmlsl_low_u32): Ditto.
1870 (vfmlalq_low_u32): Ditto.
1871 (vfmlslq_low_u32): Ditto.
1872 (vfmlal_high_u32): Ditto.
1873 (vfmlsl_high_u32): Ditto.
1874 (vfmlalq_high_u32): Ditto.
1875 (vfmlslq_high_u32): Ditto.
1876 (vfmlal_lane_low_u32): Ditto.
1877 (vfmlsl_lane_low_u32): Ditto.
1878 (vfmlal_laneq_low_u32): Ditto.
1879 (vfmlsl_laneq_low_u32): Ditto.
1880 (vfmlalq_lane_low_u32): Ditto.
1881 (vfmlslq_lane_low_u32): Ditto.
1882 (vfmlalq_laneq_low_u32): Ditto.
1883 (vfmlslq_laneq_low_u32): Ditto.
1884 (vfmlal_lane_high_u32): Ditto.
1885 (vfmlsl_lane_high_u32): Ditto.
1886 (vfmlal_laneq_high_u32): Ditto.
1887 (vfmlsl_laneq_high_u32): Ditto.
1888 (vfmlalq_lane_high_u32): Ditto.
1889 (vfmlslq_lane_high_u32): Ditto.
1890 (vfmlalq_laneq_high_u32): Ditto.
1891 (vfmlslq_laneq_high_u32): Ditto.
1892 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1893 (AARCH64_FL_FOR_ARCH8_4): New.
1894 (AARCH64_ISA_F16FML): New ISA flag.
1895 (TARGET_F16FML): New feature flag for fp16fml.
1896 (doc/invoke.texi): Document new fp16fml option.
1898 2018-01-10 Michael Collison <michael.collison@arm.com>
1900 * config/aarch64/aarch64-builtins.c:
1901 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1902 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1903 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1904 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1905 (AARCH64_ISA_SHA3): New ISA flag.
1906 (TARGET_SHA3): New feature flag for sha3.
1907 * config/aarch64/iterators.md (sha512_op): New int attribute.
1908 (CRYPTO_SHA512): New int iterator.
1909 (UNSPEC_SHA512H): New unspec.
1910 (UNSPEC_SHA512H2): Ditto.
1911 (UNSPEC_SHA512SU0): Ditto.
1912 (UNSPEC_SHA512SU1): Ditto.
1913 * config/aarch64/aarch64-simd-builtins.def
1914 (aarch64_crypto_sha512hqv2di): New builtin.
1915 (aarch64_crypto_sha512h2qv2di): Ditto.
1916 (aarch64_crypto_sha512su0qv2di): Ditto.
1917 (aarch64_crypto_sha512su1qv2di): Ditto.
1918 (aarch64_eor3qv8hi): Ditto.
1919 (aarch64_rax1qv2di): Ditto.
1920 (aarch64_xarqv2di): Ditto.
1921 (aarch64_bcaxqv8hi): Ditto.
1922 * config/aarch64/aarch64-simd.md:
1923 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
1924 (aarch64_crypto_sha512su0qv2di): Ditto.
1925 (aarch64_crypto_sha512su1qv2di): Ditto.
1926 (aarch64_eor3qv8hi): Ditto.
1927 (aarch64_rax1qv2di): Ditto.
1928 (aarch64_xarqv2di): Ditto.
1929 (aarch64_bcaxqv8hi): Ditto.
1930 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
1931 (vsha512h2q_u64): Ditto.
1932 (vsha512su0q_u64): Ditto.
1933 (vsha512su1q_u64): Ditto.
1934 (veor3q_u16): Ditto.
1935 (vrax1q_u64): Ditto.
1937 (vbcaxq_u16): Ditto.
1938 * config/arm/types.md (crypto_sha512): New type attribute.
1939 (crypto_sha3): Ditto.
1940 (doc/invoke.texi): Document new sha3 option.
1942 2018-01-10 Michael Collison <michael.collison@arm.com>
1944 * config/aarch64/aarch64-builtins.c:
1945 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
1946 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1947 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
1948 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
1949 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
1950 (AARCH64_ISA_SM4): New ISA flag.
1951 (TARGET_SM4): New feature flag for sm4.
1952 * config/aarch64/aarch64-simd-builtins.def
1953 (aarch64_sm3ss1qv4si): Ditto.
1954 (aarch64_sm3tt1aq4si): Ditto.
1955 (aarch64_sm3tt1bq4si): Ditto.
1956 (aarch64_sm3tt2aq4si): Ditto.
1957 (aarch64_sm3tt2bq4si): Ditto.
1958 (aarch64_sm3partw1qv4si): Ditto.
1959 (aarch64_sm3partw2qv4si): Ditto.
1960 (aarch64_sm4eqv4si): Ditto.
1961 (aarch64_sm4ekeyqv4si): Ditto.
1962 * config/aarch64/aarch64-simd.md:
1963 (aarch64_sm3ss1qv4si): Ditto.
1964 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
1965 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
1966 (aarch64_sm4eqv4si): Ditto.
1967 (aarch64_sm4ekeyqv4si): Ditto.
1968 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
1969 (sm3part_op): Ditto.
1970 (CRYPTO_SM3TT): Ditto.
1971 (CRYPTO_SM3PART): Ditto.
1972 (UNSPEC_SM3SS1): New unspec.
1973 (UNSPEC_SM3TT1A): Ditto.
1974 (UNSPEC_SM3TT1B): Ditto.
1975 (UNSPEC_SM3TT2A): Ditto.
1976 (UNSPEC_SM3TT2B): Ditto.
1977 (UNSPEC_SM3PARTW1): Ditto.
1978 (UNSPEC_SM3PARTW2): Ditto.
1979 (UNSPEC_SM4E): Ditto.
1980 (UNSPEC_SM4EKEY): Ditto.
1981 * config/aarch64/constraints.md (Ui2): New constraint.
1982 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
1983 * config/arm/types.md (crypto_sm3): New type attribute.
1984 (crypto_sm4): Ditto.
1985 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
1986 (vsm3tt1aq_u32): Ditto.
1987 (vsm3tt1bq_u32): Ditto.
1988 (vsm3tt2aq_u32): Ditto.
1989 (vsm3tt2bq_u32): Ditto.
1990 (vsm3partw1q_u32): Ditto.
1991 (vsm3partw2q_u32): Ditto.
1992 (vsm4eq_u32): Ditto.
1993 (vsm4ekeyq_u32): Ditto.
1994 (doc/invoke.texi): Document new sm4 option.
1996 2018-01-10 Michael Collison <michael.collison@arm.com>
1998 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
1999 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2000 (AARCH64_FL_FOR_ARCH8_4): New.
2001 (AARCH64_FL_V8_4): New flag.
2002 (doc/invoke.texi): Document new armv8.4-a option.
2004 2018-01-10 Michael Collison <michael.collison@arm.com>
2006 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2007 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2008 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2009 * config/aarch64/aarch64-option-extension.def: Add
2010 AARCH64_OPT_EXTENSION of 'sha2'.
2011 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2012 (crypto): Disable sha2 and aes if crypto disabled.
2013 (crypto): Enable aes and sha2 if enabled.
2014 (simd): Disable sha2 and aes if simd disabled.
2015 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2017 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2018 (TARGET_SHA2): New feature flag for sha2.
2019 (TARGET_AES): New feature flag for aes.
2020 * config/aarch64/aarch64-simd.md:
2021 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2022 conditional on TARGET_AES.
2023 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2024 (aarch64_crypto_sha1hsi): Make pattern conditional
2026 (aarch64_crypto_sha1hv4si): Ditto.
2027 (aarch64_be_crypto_sha1hv4si): Ditto.
2028 (aarch64_crypto_sha1su1v4si): Ditto.
2029 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2030 (aarch64_crypto_sha1su0v4si): Ditto.
2031 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2032 (aarch64_crypto_sha256su0v4si): Ditto.
2033 (aarch64_crypto_sha256su1v4si): Ditto.
2034 (doc/invoke.texi): Document new aes and sha2 options.
2036 2018-01-10 Martin Sebor <msebor@redhat.com>
2038 PR tree-optimization/83781
2039 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2042 2018-01-11 Martin Sebor <msebor@gmail.com>
2043 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2045 PR tree-optimization/83501
2046 PR tree-optimization/81703
2048 * tree-ssa-strlen.c (get_string_cst): Rename...
2049 (get_string_len): ...to this. Handle global constants.
2050 (handle_char_store): Adjust.
2052 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2053 Jim Wilson <jimw@sifive.com>
2055 * config/riscv/riscv-protos.h (riscv_output_return): New.
2056 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2057 (riscv_attribute_table, riscv_output_return),
2058 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2059 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2060 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2062 (riscv_expand_prologue): Add early return for naked function.
2063 (riscv_expand_epilogue): Likewise.
2064 (riscv_function_ok_for_sibcall): Return false for naked function.
2065 (riscv_set_current_function): New.
2066 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2067 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2068 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2069 * doc/extend.texi (RISC-V Function Attributes): New.
2071 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2073 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2074 check for 128-bit long double before checking TCmode.
2075 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2076 128-bit long doubles before checking TFmode or TCmode.
2077 (FLOAT128_IBM_P): Likewise.
2079 2018-01-10 Martin Sebor <msebor@redhat.com>
2081 PR tree-optimization/83671
2082 * builtins.c (c_strlen): Unconditionally return zero for the empty
2084 Use -Warray-bounds for warnings.
2085 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2086 for non-constant array indices with COMPONENT_REF, arrays of
2087 arrays, and pointers to arrays.
2088 (gimple_fold_builtin_strlen): Determine and set length range for
2089 non-constant character arrays.
2091 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2094 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2097 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2099 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2101 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2104 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2105 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2106 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2107 indexed_or_indirect_operand predicate.
2108 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2109 (*vsx_le_perm_load_v8hi): Likewise.
2110 (*vsx_le_perm_load_v16qi): Likewise.
2111 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2112 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2113 (*vsx_le_perm_store_v8hi): Likewise.
2114 (*vsx_le_perm_store_v16qi): Likewise.
2115 (eight unnamed splitters): Likewise.
2117 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2119 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2120 * config/rs6000/emmintrin.h: Likewise.
2121 * config/rs6000/mmintrin.h: Likewise.
2122 * config/rs6000/xmmintrin.h: Likewise.
2124 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2127 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2129 * tree.c (tree_nop_conversion): Return true for location wrapper
2131 (maybe_wrap_with_location): New function.
2132 (selftest::check_strip_nops): New function.
2133 (selftest::test_location_wrappers): New function.
2134 (selftest::tree_c_tests): Call it.
2135 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2136 (maybe_wrap_with_location): New decl.
2137 (EXPR_LOCATION_WRAPPER_P): New macro.
2138 (location_wrapper_p): New inline function.
2139 (tree_strip_any_location_wrapper): New inline function.
2141 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2144 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2145 stack_realign_offset for the largest alignment of stack slot
2147 (ix86_find_max_used_stack_alignment): New function.
2148 (ix86_finalize_stack_frame_flags): Use it. Set
2149 max_used_stack_alignment if we don't realign stack.
2150 * config/i386/i386.h (machine_function): Add
2151 max_used_stack_alignment.
2153 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2155 * config/arm/arm.opt (-mbranch-cost): New option.
2156 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2159 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2162 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2163 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2165 2018-01-10 Richard Biener <rguenther@suse.de>
2168 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2169 early out so it also covers the case where we have a non-NULL
2172 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2174 PR tree-optimization/83753
2175 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2176 for non-strided grouped accesses if the number of elements is 1.
2178 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2181 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2182 * i386.h (TARGET_USE_GATHER): Define.
2183 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2185 2018-01-10 Martin Liska <mliska@suse.cz>
2188 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2189 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2191 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2192 CLEANUP_NO_PARTITIONING is not set.
2194 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2196 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2197 for vectors, as a partial revert of r254296.
2198 * rtl.h (const_vec_p): Delete.
2199 (const_vec_duplicate_p): Don't test for vector CONSTs.
2200 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2201 * expmed.c (make_tree): Likewise.
2204 * common.md (E, F): Use CONSTANT_P instead of checking for
2206 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2207 checking for CONST_VECTOR.
2209 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2212 * predict.c (force_edge_cold): Handle in more sane way edges
2215 2018-01-09 Carl Love <cel@us.ibm.com>
2217 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2219 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2220 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2221 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2222 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2223 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2224 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2225 * config/rs6000/rs6000-protos.h: Add extern defition for
2226 rs6000_generate_float2_double_code.
2227 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2229 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2230 (float2_v2df): Add define_expand.
2232 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2235 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2236 op_mode in the force_to_mode call.
2238 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2240 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2241 instead of checking each element individually.
2242 (aarch64_evpc_uzp): Likewise.
2243 (aarch64_evpc_zip): Likewise.
2244 (aarch64_evpc_ext): Likewise.
2245 (aarch64_evpc_rev): Likewise.
2246 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2247 instead of checking each element individually. Return true without
2249 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2250 whether all selected elements come from the same input, instead of
2251 checking each element individually. Remove calls to gen_rtx_REG,
2252 start_sequence and end_sequence and instead assert that no rtl is
2255 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2257 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2258 order of HIGH and CONST checks.
2260 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2262 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2263 if the destination isn't an SSA_NAME.
2265 2018-01-09 Richard Biener <rguenther@suse.de>
2267 PR tree-optimization/83668
2268 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2270 (canonicalize_loop_form): ... here, renamed from ...
2271 (canonicalize_loop_closed_ssa_form): ... this and amended to
2272 swap successor edges for loop exit blocks to make us use
2273 the RPO order we need for initial schedule generation.
2275 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2277 PR tree-optimization/64811
2278 * match.pd: When optimizing comparisons with Inf, avoid
2279 introducing or losing exceptions from comparisons with NaN.
2281 2018-01-09 Martin Liska <mliska@suse.cz>
2284 * asan.c (shadow_mem_size): Add gcc_assert.
2286 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2288 Don't save registers in main().
2291 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2292 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2293 * config/avr/avr.c (avr_set_current_function): Don't error if
2294 naked, OS_task or OS_main are specified at the same time.
2295 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2297 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2299 * common/config/avr/avr-common.c (avr_option_optimization_table):
2300 Switch on -mmain-is-OS_task for optimizing compilations.
2302 2018-01-09 Richard Biener <rguenther@suse.de>
2304 PR tree-optimization/83572
2305 * graphite.c: Include cfganal.h.
2306 (graphite_transform_loops): Connect infinite loops to exit
2307 and remove fake edges at the end.
2309 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2311 * ipa-inline.c (edge_badness): Revert accidental checkin.
2313 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2316 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2317 symbols; not inline clones.
2319 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2322 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2323 hard registers. Formatting fixes.
2325 PR preprocessor/83722
2326 * gcc.c (try_generate_repro): Pass
2327 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2328 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2331 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2332 Kito Cheng <kito.cheng@gmail.com>
2334 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2335 (riscv_leaf_function_p): Delete.
2336 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2338 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2340 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2342 (do_ifelse): New function.
2343 (do_isel): New function.
2344 (do_sub3): New function.
2345 (do_add3): New function.
2346 (do_load_mask_compare): New function.
2347 (do_overlap_load_compare): New function.
2348 (expand_compare_loop): New function.
2349 (expand_block_compare): Call expand_compare_loop() when appropriate.
2350 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2352 (-mblock-compare-inline-loop-limit): New option.
2354 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2357 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2358 Reverse order of second and third operands in first alternative.
2359 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2360 of first and second elements in UNSPEC_VPERMR vector.
2361 (altivec_expand_vec_perm_le): Likewise.
2363 2017-01-08 Jeff Law <law@redhat.com>
2365 PR rtl-optimizatin/81308
2366 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2367 (process_switch): If group_case_labels makes a change, then set
2369 (pass_convert_switch::execute): If a switch is converted, then
2370 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2372 PR rtl-optimization/81308
2373 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2376 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2378 PR target/83663 - Revert r255946
2379 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2380 generation for cases where splatting a value is not useful.
2381 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2382 across a vec_duplicate and a paradoxical subreg forming a vector
2383 mode to a vec_concat.
2385 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2387 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2388 -march=armv8.3-a variants.
2389 * config/arm/t-multilib: Likewise.
2390 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2392 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2394 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2396 (cceq_ior_compare_complement): Give it a name so I can use it, and
2397 change boolean_or_operator predicate to boolean_operator so it can
2398 be used to generate a crand.
2399 (eqne): New code iterator.
2400 (bd/bd_neg): New code_attrs.
2401 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2402 a single define_insn.
2403 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2404 decrement (bdnzt/bdnzf/bdzt/bdzf).
2405 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2406 with the new names of the branch decrement patterns, and added the
2407 names of the branch decrement conditional patterns.
2409 2018-01-08 Richard Biener <rguenther@suse.de>
2411 PR tree-optimization/83563
2412 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2415 2018-01-08 Richard Biener <rguenther@suse.de>
2418 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2420 2018-01-08 Richard Biener <rguenther@suse.de>
2422 PR tree-optimization/83685
2423 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2424 references to abnormals.
2426 2018-01-08 Richard Biener <rguenther@suse.de>
2429 * dwarf2out.c (output_indirect_strings): Handle empty
2430 skeleton_debug_str_hash.
2431 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2433 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2435 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2436 (emit_store_direct): Likewise.
2437 (arc_trampoline_adjust_address): Likewise.
2438 (arc_asm_trampoline_template): New function.
2439 (arc_initialize_trampoline): Use asm_trampoline_template.
2440 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2441 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2442 * config/arc/arc.md (flush_icache): Delete pattern.
2444 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2446 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2447 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2450 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2453 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2454 by not USED_FOR_TARGET.
2455 (make_pass_resolve_sw_modes): Likewise.
2457 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2459 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2462 2018-01-08 Richard Biener <rguenther@suse.de>
2465 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2467 2018-01-08 Richard Biener <rguenther@suse.de>
2470 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2472 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2475 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2476 basic blocks with a small number of successors.
2477 (convert_control_dep_chain_into_preds): Improve handling of
2479 (dump_predicates): Split apart into...
2480 (dump_pred_chain): ...here...
2481 (dump_pred_info): ...and here.
2482 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2483 (can_chain_union_be_invalidated_p): Improve check for invalidation
2485 (uninit_uses_cannot_happen): Avoid unnecessary if
2486 convert_control_dep_chain_into_preds yielded nothing.
2488 2018-01-06 Martin Sebor <msebor@redhat.com>
2490 PR tree-optimization/83640
2491 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2492 subtracting negative offset from size.
2493 (builtin_access::overlap): Adjust offset bounds of the access to fall
2494 within the size of the object if possible.
2496 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2498 PR rtl-optimization/83699
2499 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2500 extract_bit_field_as_subreg to cases in which the extracted
2501 value is also a vector.
2503 * lra-constraints.c (process_alt_operands): Test for the equivalence
2504 substitutions when detecting a possible reload cycle.
2506 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2509 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2510 by default if flag_selective_schedling{,2}. Formatting fixes.
2512 PR rtl-optimization/83682
2513 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2514 if it has non-VECTOR_MODE element mode.
2515 (vec_duplicate_p): Likewise.
2518 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2519 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2521 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2524 * config/i386/i386-builtin.def
2525 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2526 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2527 Require also OPTION_MASK_ISA_AVX512F in addition to
2528 OPTION_MASK_ISA_GFNI.
2529 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2530 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2531 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2532 to OPTION_MASK_ISA_GFNI.
2533 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2534 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2535 OPTION_MASK_ISA_AVX512BW.
2536 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2537 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2538 addition to OPTION_MASK_ISA_GFNI.
2539 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2540 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2541 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2542 to OPTION_MASK_ISA_GFNI.
2543 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2544 a requirement for all ISAs rather than any of them with a few
2546 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2548 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2549 bitmasks to be enabled with 3 exceptions, instead of requiring any
2550 enabled ISA with lots of exceptions.
2551 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2552 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2553 Change avx512bw in isa attribute to avx512f.
2554 * config/i386/sgxintrin.h: Add license boilerplate.
2555 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2556 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2557 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2558 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2560 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2561 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2562 temporarily sse2 rather than sse if not enabled already.
2565 * config/i386/sse.md (VI248_VLBW): Rename to ...
2566 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2567 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2568 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2569 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2570 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2571 mode iterator instead of VI248_VLBW.
2573 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2575 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2576 (record_modified): Skip clobbers; add debug output.
2577 (param_change_prob): Use sreal frequencies.
2579 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2581 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2582 punt for user-aligned variables.
2584 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2586 * tree-chrec.c (chrec_contains_symbols): Return true for
2589 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2592 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2593 of (x|y) == x for BICS pattern.
2595 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2597 PR tree-optimization/83605
2598 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2599 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2602 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2604 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2605 * config/epiphany/rtems.h: New file.
2607 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2608 Uros Bizjak <ubizjak@gmail.com>
2611 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2612 QIreg_operand instead of register_operand predicate.
2613 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2614 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2615 comments instead of -fmitigate[-_]rop.
2617 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2620 * cgraphunit.c (symbol_table::compile): Switch to text_section
2621 before calling assembly_start debug hook.
2622 * run-rtl-passes.c (run_rtl_passes): Likewise.
2625 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2627 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2628 range_int_cst_p rather than !symbolic_range_p before calling
2629 extract_range_from_multiplicative_op_1.
2631 2017-01-04 Jeff Law <law@redhat.com>
2633 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2634 redundant test in assertion.
2636 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2638 * doc/rtl.texi: Document machine_mode wrapper classes.
2640 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2642 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2645 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2647 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2648 the VEC_PERM_EXPR fold to fail.
2650 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2653 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2654 to switched_sections.
2656 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2659 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2662 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2665 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2666 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2668 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2671 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2672 is BLKmode and bitpos not zero or mode change is needed.
2674 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2677 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2680 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2683 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2684 instead of MULT rtx. Update all corresponding splitters.
2686 (*ssub<modesuffix>): Ditto.
2688 (*cmp_sadd_di): Update split patterns.
2689 (*cmp_sadd_si): Ditto.
2690 (*cmp_sadd_sidi): Ditto.
2691 (*cmp_ssub_di): Ditto.
2692 (*cmp_ssub_si): Ditto.
2693 (*cmp_ssub_sidi): Ditto.
2694 * config/alpha/predicates.md (const23_operand): New predicate.
2695 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2696 Look for ASHIFT, not MULT inner operand.
2697 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2699 2018-01-04 Martin Liska <mliska@suse.cz>
2701 PR gcov-profile/83669
2702 * gcov.c (output_intermediate_file): Add version to intermediate
2704 * doc/gcov.texi: Document new field 'version' in intermediate
2705 file format. Fix location of '-k' option of gcov command.
2707 2018-01-04 Martin Liska <mliska@suse.cz>
2710 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2712 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2714 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2716 2018-01-03 Martin Sebor <msebor@redhat.com>
2718 PR tree-optimization/83655
2719 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2720 checking calls with invalid arguments.
2722 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2724 * tree-vect-stmts.c (vect_get_store_rhs): New function.
2725 (vectorizable_mask_load_store): Delete.
2726 (vectorizable_call): Return false for masked loads and stores.
2727 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
2728 instead of gimple_assign_rhs1.
2729 (vectorizable_load): Handle IFN_MASK_LOAD.
2730 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2732 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2734 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2736 (vectorizable_mask_load_store): ...here.
2737 (vectorizable_load): ...and here.
2739 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2741 * tree-vect-stmts.c (vect_build_all_ones_mask)
2742 (vect_build_zero_merge_argument): New functions, split out from...
2743 (vectorizable_load): ...here.
2745 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2747 * tree-vect-stmts.c (vect_check_store_rhs): New function,
2749 (vectorizable_mask_load_store): ...here.
2750 (vectorizable_store): ...and here.
2752 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2754 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2756 (vectorizable_mask_load_store): ...here.
2758 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2760 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2761 (vect_model_store_cost): Take a vec_load_store_type instead of a
2763 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2764 (vect_model_store_cost): Take a vec_load_store_type instead of a
2766 (vectorizable_mask_load_store): Update accordingly.
2767 (vectorizable_store): Likewise.
2768 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2770 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2772 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2773 IFN_MASK_LOAD calls here rather than...
2774 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2776 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2777 Alan Hayward <alan.hayward@arm.com>
2778 David Sherwood <david.sherwood@arm.com>
2780 * expmed.c (extract_bit_field_1): For vector extracts,
2781 fall back to extract_bit_field_as_subreg if vec_extract
2784 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2785 Alan Hayward <alan.hayward@arm.com>
2786 David Sherwood <david.sherwood@arm.com>
2788 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2789 they are variable or constant sized.
2790 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2791 slots for constant-sized data.
2793 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2794 Alan Hayward <alan.hayward@arm.com>
2795 David Sherwood <david.sherwood@arm.com>
2797 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2798 handling COND_EXPRs with boolean comparisons, try to find a better
2799 basis for the mask type than the boolean itself.
2801 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2803 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2804 is calculated and how it can be overridden.
2805 * genmodes.c (max_bitsize_mode_any_mode): New variable.
2806 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2808 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2811 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2812 Alan Hayward <alan.hayward@arm.com>
2813 David Sherwood <david.sherwood@arm.com>
2815 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
2816 Remove the mode argument.
2817 (aarch64_simd_valid_immediate): Remove the mode and inverse
2819 * config/aarch64/iterators.md (bitsize): New iterator.
2820 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
2821 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
2822 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
2823 aarch64_simd_valid_immediate.
2824 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
2825 (aarch64_reg_or_bic_imm): Likewise.
2826 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
2827 with an insn_type enum and msl with a modifier_type enum.
2828 Replace element_width with a scalar_mode. Change the shift
2829 to unsigned int. Add constructors for scalar_float_mode and
2830 scalar_int_mode elements.
2831 (aarch64_vect_float_const_representable_p): Delete.
2832 (aarch64_can_const_movi_rtx_p)
2833 (aarch64_simd_scalar_immediate_valid_for_move)
2834 (aarch64_simd_make_constant): Update call to
2835 aarch64_simd_valid_immediate.
2836 (aarch64_advsimd_valid_immediate_hs): New function.
2837 (aarch64_advsimd_valid_immediate): Likewise.
2838 (aarch64_simd_valid_immediate): Remove mode and inverse
2839 arguments. Rewrite to use the above. Use const_vec_duplicate_p
2840 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
2841 and aarch64_float_const_representable_p on the result.
2842 (aarch64_output_simd_mov_immediate): Remove mode argument.
2843 Update call to aarch64_simd_valid_immediate and use of
2844 simd_immediate_info.
2845 (aarch64_output_scalar_simd_mov_immediate): Update call
2848 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2849 Alan Hayward <alan.hayward@arm.com>
2850 David Sherwood <david.sherwood@arm.com>
2852 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2853 (mode_nunits): Likewise CONST_MODE_NUNITS.
2854 * machmode.def (ADJUST_NUNITS): Document.
2855 * genmodes.c (mode_data::need_nunits_adj): New field.
2856 (blank_mode): Update accordingly.
2857 (adj_nunits): New variable.
2858 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2860 (emit_mode_size_inline): Set need_bytesize_adj for all modes
2861 listed in adj_nunits.
2862 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2863 listed in adj_nunits. Don't emit case statements for such modes.
2864 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2865 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
2866 nothing if adj_nunits is nonnull.
2867 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2868 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2869 (emit_mode_fbit): Update use of print_maybe_const_decl.
2870 (emit_move_size): Likewise. Treat the array as non-const
2872 (emit_mode_adjustments): Handle adj_nunits.
2874 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2876 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2877 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2878 (VECTOR_MODES): Use it.
2879 (make_vector_modes): Take the prefix as an argument.
2881 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2882 Alan Hayward <alan.hayward@arm.com>
2883 David Sherwood <david.sherwood@arm.com>
2885 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2886 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2887 for MODE_VECTOR_BOOL.
2888 * machmode.def (VECTOR_BOOL_MODE): Document.
2889 * genmodes.c (VECTOR_BOOL_MODE): New macro.
2890 (make_vector_bool_mode): New function.
2891 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2893 * lto-streamer-in.c (lto_input_mode_table): Likewise.
2894 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2896 * stor-layout.c (int_mode_for_mode): Likewise.
2897 * tree.c (build_vector_type_for_mode): Likewise.
2898 * varasm.c (output_constant_pool_2): Likewise.
2899 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2900 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
2901 for MODE_VECTOR_BOOL.
2902 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2903 of mode class checks.
2904 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2905 instead of a list of mode class checks.
2906 (expand_vector_scalar_condition): Likewise.
2907 (type_for_widest_vector_mode): Handle BImode as an inner mode.
2909 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2910 Alan Hayward <alan.hayward@arm.com>
2911 David Sherwood <david.sherwood@arm.com>
2913 * machmode.h (mode_size): Change from unsigned short to
2915 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2916 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2917 or if measurement_type is not polynomial.
2918 (fixed_size_mode::includes_p): Check for constant-sized modes.
2919 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2920 return a poly_uint16 rather than an unsigned short.
2921 (emit_mode_size): Change the type of mode_size from unsigned short
2922 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
2923 (emit_mode_adjustments): Cope with polynomial vector sizes.
2924 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2926 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2928 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
2929 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
2930 * caller-save.c (setup_save_areas): Likewise.
2931 (replace_reg_with_saved_mem): Likewise.
2932 * calls.c (emit_library_call_value_1): Likewise.
2933 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
2934 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
2935 (gen_lowpart_for_combine): Likewise.
2936 * convert.c (convert_to_integer_1): Likewise.
2937 * cse.c (equiv_constant, cse_insn): Likewise.
2938 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
2939 (cselib_subst_to_values): Likewise.
2940 * dce.c (word_dce_process_block): Likewise.
2941 * df-problems.c (df_word_lr_mark_ref): Likewise.
2942 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
2943 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
2944 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
2945 (rtl_for_decl_location): Likewise.
2946 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
2947 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
2948 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
2949 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
2950 (expand_expr_real_1): Likewise.
2951 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
2952 (pad_below): Likewise.
2953 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2954 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
2955 * ira.c (get_subreg_tracking_sizes): Likewise.
2956 * ira-build.c (ira_create_allocno_objects): Likewise.
2957 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
2958 (ira_sort_regnos_for_alter_reg): Likewise.
2959 * ira-costs.c (record_operand_costs): Likewise.
2960 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
2961 (resolve_simple_move): Likewise.
2962 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
2963 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
2964 (lra_constraints): Likewise.
2965 (CONST_POOL_OK_P): Reject variable-sized modes.
2966 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
2967 (add_pseudo_to_slot, lra_spill): Likewise.
2968 * omp-low.c (omp_clause_aligned_alignment): Likewise.
2969 * optabs-query.c (get_best_extraction_insn): Likewise.
2970 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2971 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
2972 (expand_mult_highpart, valid_multiword_target_p): Likewise.
2973 * recog.c (offsettable_address_addr_space_p): Likewise.
2974 * regcprop.c (maybe_mode_change): Likewise.
2975 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
2976 * regrename.c (build_def_use): Likewise.
2977 * regstat.c (dump_reg_info): Likewise.
2978 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
2979 (find_reloads, find_reloads_subreg_address): Likewise.
2980 * reload1.c (eliminate_regs_1): Likewise.
2981 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
2982 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
2983 (simplify_binary_operation_1, simplify_subreg): Likewise.
2984 * targhooks.c (default_function_arg_padding): Likewise.
2985 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
2986 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
2987 (verify_gimple_assign_ternary): Likewise.
2988 * tree-inline.c (estimate_move_cost): Likewise.
2989 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2990 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
2991 (get_address_cost_ainc): Likewise.
2992 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
2993 (vect_supportable_dr_alignment): Likewise.
2994 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2995 (vectorizable_reduction): Likewise.
2996 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
2997 (vectorizable_operation, vectorizable_load): Likewise.
2998 * tree.c (build_same_sized_truth_vector_type): Likewise.
2999 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3000 * var-tracking.c (emit_note_insn_var_location): Likewise.
3001 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3002 (ADDR_VEC_ALIGN): Likewise.
3004 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3005 Alan Hayward <alan.hayward@arm.com>
3006 David Sherwood <david.sherwood@arm.com>
3008 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3010 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3011 or if measurement_type is polynomial.
3012 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3013 * combine.c (make_extraction): Likewise.
3014 * dse.c (find_shift_sequence): Likewise.
3015 * dwarf2out.c (mem_loc_descriptor): Likewise.
3016 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3017 (extract_bit_field, extract_low_bits): Likewise.
3018 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3019 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3020 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3021 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3022 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3023 * reload.c (find_reloads): Likewise.
3024 * reload1.c (alter_reg): Likewise.
3025 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3026 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3027 * tree-if-conv.c (predicate_mem_writes): Likewise.
3028 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3029 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3030 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3031 * valtrack.c (dead_debug_insert_temp): Likewise.
3032 * varasm.c (mergeable_constant_section): Likewise.
3033 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3035 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3036 Alan Hayward <alan.hayward@arm.com>
3037 David Sherwood <david.sherwood@arm.com>
3039 * expr.c (expand_assignment): Cope with polynomial mode sizes
3040 when assigning to a CONCAT.
3042 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3043 Alan Hayward <alan.hayward@arm.com>
3044 David Sherwood <david.sherwood@arm.com>
3046 * machmode.h (mode_precision): Change from unsigned short to
3048 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3050 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3051 or if measurement_type is not polynomial.
3052 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3053 in which the mode is already known to be a scalar_int_mode.
3054 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3055 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3057 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3058 for GET_MODE_PRECISION.
3059 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3060 for GET_MODE_PRECISION.
3061 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3063 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3064 (expand_field_assignment, make_extraction): Likewise.
3065 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3066 (get_last_value): Likewise.
3067 * convert.c (convert_to_integer_1): Likewise.
3068 * cse.c (cse_insn): Likewise.
3069 * expr.c (expand_expr_real_1): Likewise.
3070 * lra-constraints.c (simplify_operand_subreg): Likewise.
3071 * optabs-query.c (can_atomic_load_p): Likewise.
3072 * optabs.c (expand_atomic_load): Likewise.
3073 (expand_atomic_store): Likewise.
3074 * ree.c (combine_reaching_defs): Likewise.
3075 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3076 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3077 * tree.h (type_has_mode_precision_p): Likewise.
3078 * ubsan.c (instrument_si_overflow): Likewise.
3080 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3081 Alan Hayward <alan.hayward@arm.com>
3082 David Sherwood <david.sherwood@arm.com>
3084 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3085 polynomial numbers of units.
3086 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3087 (valid_vector_subparts_p): New function.
3088 (build_vector_type): Remove temporary shim and take the number
3089 of units as a poly_uint64 rather than an int.
3090 (build_opaque_vector_type): Take the number of units as a
3091 poly_uint64 rather than an int.
3092 * tree.c (build_vector_from_ctor): Handle polynomial
3093 TYPE_VECTOR_SUBPARTS.
3094 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3095 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3096 (build_vector_from_val): If the number of units is variable,
3097 use build_vec_duplicate_cst for constant operands and
3098 VEC_DUPLICATE_EXPR otherwise.
3099 (make_vector_type): Remove temporary is_constant ().
3100 (build_vector_type, build_opaque_vector_type): Take the number of
3101 units as a poly_uint64 rather than an int.
3102 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3104 * cfgexpand.c (expand_debug_expr): Likewise.
3105 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3106 (store_constructor, expand_expr_real_1): Likewise.
3107 (const_scalar_mask_from_tree): Likewise.
3108 * fold-const-call.c (fold_const_reduction): Likewise.
3109 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3110 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3111 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3112 (fold_relational_const): Likewise.
3113 (native_interpret_vector): Likewise. Change the size from an
3114 int to an unsigned int.
3115 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3116 TYPE_VECTOR_SUBPARTS.
3117 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3118 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3119 duplicating a non-constant operand into a variable-length vector.
3120 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3121 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3122 * ipa-icf.c (sem_variable::equals): Likewise.
3123 * match.pd: Likewise.
3124 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3125 * print-tree.c (print_node): Likewise.
3126 * stor-layout.c (layout_type): Likewise.
3127 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3128 * tree-cfg.c (verify_gimple_comparison): Likewise.
3129 (verify_gimple_assign_binary): Likewise.
3130 (verify_gimple_assign_ternary): Likewise.
3131 (verify_gimple_assign_single): Likewise.
3132 * tree-pretty-print.c (dump_generic_node): Likewise.
3133 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3134 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3135 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3136 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3137 (vect_shift_permute_load_chain): Likewise.
3138 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3139 (expand_vector_condition, optimize_vector_constructor): Likewise.
3140 (lower_vec_perm, get_compute_type): Likewise.
3141 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3142 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3143 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3144 (vect_recog_mask_conversion_pattern): Likewise.
3145 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3146 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3147 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3148 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3149 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3150 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3151 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3152 (supportable_widening_operation): Likewise.
3153 (supportable_narrowing_operation): Likewise.
3154 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3156 * varasm.c (output_constant): Likewise.
3158 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3159 Alan Hayward <alan.hayward@arm.com>
3160 David Sherwood <david.sherwood@arm.com>
3162 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3163 so that both the length == 3 and length != 3 cases set up their
3164 own permute vectors. Add comments explaining why we know the
3165 number of elements is constant.
3166 (vect_permute_load_chain): Likewise.
3168 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3169 Alan Hayward <alan.hayward@arm.com>
3170 David Sherwood <david.sherwood@arm.com>
3172 * machmode.h (mode_nunits): Change from unsigned char to
3174 (ONLY_FIXED_SIZE_MODES): New macro.
3175 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3176 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3177 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3179 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3180 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3181 or if measurement_type is not polynomial.
3182 * genmodes.c (ZERO_COEFFS): New macro.
3183 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3185 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3186 Use ZERO_COEFFS when emitting initializers.
3187 * data-streamer.h (bp_pack_poly_value): New function.
3188 (bp_unpack_poly_value): Likewise.
3189 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3190 for GET_MODE_NUNITS.
3191 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3192 for GET_MODE_NUNITS.
3193 * tree.c (make_vector_type): Remove temporary shim and make
3194 the real function take the number of units as a poly_uint64
3196 (build_vector_type_for_mode): Handle polynomial nunits.
3197 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3198 * emit-rtl.c (const_vec_series_p_1): Likewise.
3199 (gen_rtx_CONST_VECTOR): Likewise.
3200 * fold-const.c (test_vec_duplicate_folding): Likewise.
3201 * genrecog.c (validate_pattern): Likewise.
3202 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3203 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3204 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3205 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3206 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3207 * rtlanal.c (subreg_get_info): Likewise.
3208 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3209 (vect_grouped_load_supported): Likewise.
3210 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3211 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3212 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3213 (simplify_const_unary_operation, simplify_binary_operation_1)
3214 (simplify_const_binary_operation, simplify_ternary_operation)
3215 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3216 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3217 instead of CONST_VECTOR_NUNITS.
3218 * varasm.c (output_constant_pool_2): Likewise.
3219 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3220 explicit-encoded elements in the XVEC for variable-length vectors.
3222 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3224 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3226 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3227 Alan Hayward <alan.hayward@arm.com>
3228 David Sherwood <david.sherwood@arm.com>
3230 * coretypes.h (fixed_size_mode): Declare.
3231 (fixed_size_mode_pod): New typedef.
3232 * builtins.h (target_builtins::x_apply_args_mode)
3233 (target_builtins::x_apply_result_mode): Change type to
3234 fixed_size_mode_pod.
3235 * builtins.c (apply_args_size, apply_result_size, result_vector)
3236 (expand_builtin_apply_args_1, expand_builtin_apply)
3237 (expand_builtin_return): Update accordingly.
3239 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3241 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3242 * cselib.c (cselib_hash_rtx): Likewise.
3243 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3244 CONST_VECTOR encoding.
3246 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3247 Jeff Law <law@redhat.com>
3250 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3251 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3252 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3253 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3256 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3257 explicitly probe *sp in a noreturn function if there were any callee
3258 register saves or frame pointer is needed.
3260 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3263 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3264 BLKmode for ternary, binary or unary expressions.
3267 * var-tracking.c (delete_vta_debug_insn): New inline function.
3268 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3269 insns from get_insns () to NULL instead of each bb separately.
3270 Use delete_vta_debug_insn. No longer static.
3271 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3272 delete_vta_debug_insns callers.
3273 * rtl.h (delete_vta_debug_insns): Declare.
3274 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3275 instead of variable_tracking_main.
3277 2018-01-03 Martin Sebor <msebor@redhat.com>
3279 PR tree-optimization/83603
3280 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3281 arguments past the endof the argument list in functions declared
3282 without a prototype.
3283 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3284 Avoid checking when arguments are null.
3286 2018-01-03 Martin Sebor <msebor@redhat.com>
3289 * doc/extend.texi (attribute const): Fix a typo.
3290 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3291 issuing -Wsuggest-attribute for void functions.
3293 2018-01-03 Martin Sebor <msebor@redhat.com>
3295 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3296 offset_int::from instead of wide_int::to_shwi.
3297 (maybe_diag_overlap): Remove assertion.
3298 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3299 * gimple-ssa-sprintf.c (format_directive): Same.
3300 (parse_directive): Same.
3301 (sprintf_dom_walker::compute_format_length): Same.
3302 (try_substitute_return_value): Same.
3304 2017-01-03 Jeff Law <law@redhat.com>
3307 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3308 non-constant residual for zero at runtime and avoid probing in
3309 that case. Reorganize code for trailing problem to mirror handling
3312 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3314 PR tree-optimization/83501
3315 * tree-ssa-strlen.c (get_string_cst): New.
3316 (handle_char_store): Call get_string_cst.
3318 2018-01-03 Martin Liska <mliska@suse.cz>
3320 PR tree-optimization/83593
3321 * tree-ssa-strlen.c: Include tree-cfg.h.
3322 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3323 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3324 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3326 (strlen_dom_walker::before_dom_children): Call
3327 gimple_purge_dead_eh_edges. Dump tranformation with details
3329 (strlen_dom_walker::before_dom_children): Update call by adding
3330 new argument cleanup_eh.
3331 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3333 2018-01-03 Martin Liska <mliska@suse.cz>
3336 * cif-code.def (VARIADIC_THUNK): New enum value.
3337 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3340 2018-01-03 Jan Beulich <jbeulich@suse.com>
3342 * sse.md (mov<mode>_internal): Tighten condition for when to use
3343 vmovdqu<ssescalarsize> for TI and OI modes.
3345 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3347 Update copyright years.
3349 2018-01-03 Martin Liska <mliska@suse.cz>
3352 * ipa-visibility.c (function_and_variable_visibility): Skip
3353 functions with noipa attribure.
3355 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3357 * gcc.c (process_command): Update copyright notice dates.
3358 * gcov-dump.c (print_version): Ditto.
3359 * gcov.c (print_version): Ditto.
3360 * gcov-tool.c (print_version): Ditto.
3361 * gengtype.c (create_file): Ditto.
3362 * doc/cpp.texi: Bump @copying's copyright year.
3363 * doc/cppinternals.texi: Ditto.
3364 * doc/gcc.texi: Ditto.
3365 * doc/gccint.texi: Ditto.
3366 * doc/gcov.texi: Ditto.
3367 * doc/install.texi: Ditto.
3368 * doc/invoke.texi: Ditto.
3370 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3372 * vector-builder.h (vector_builder::m_full_nelts): Change from
3373 unsigned int to poly_uint64.
3374 (vector_builder::full_nelts): Update prototype accordingly.
3375 (vector_builder::new_vector): Likewise.
3376 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3377 (vector_builder::operator ==): Likewise.
3378 (vector_builder::finalize): Likewise.
3379 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3380 Take the number of elements as a poly_uint64 rather than an
3382 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3383 from unsigned int to poly_uint64.
3384 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3385 (vec_perm_indices::new_vector): Likewise.
3386 (vec_perm_indices::length): Likewise.
3387 (vec_perm_indices::nelts_per_input): Likewise.
3388 (vec_perm_indices::input_nelts): Likewise.
3389 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3390 number of elements per input as a poly_uint64 rather than an
3391 unsigned int. Use the original encoding for variable-length
3392 vectors, rather than clamping each individual element.
3393 For the second and subsequent elements in each pattern,
3394 clamp the step and base before clamping their sum.
3395 (vec_perm_indices::series_p): Handle polynomial element counts.
3396 (vec_perm_indices::all_in_range_p): Likewise.
3397 (vec_perm_indices_to_tree): Likewise.
3398 (vec_perm_indices_to_rtx): Likewise.
3399 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3400 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3401 (tree_vector_builder::new_binary_operation): Handle polynomial
3402 element counts. Return false if we need to know the number
3403 of elements at compile time.
3404 * fold-const.c (fold_vec_perm): Punt if the number of elements
3405 isn't known at compile time.
3407 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3409 * vec-perm-indices.h (vec_perm_builder): Change element type
3410 from HOST_WIDE_INT to poly_int64.
3411 (vec_perm_indices::element_type): Update accordingly.
3412 (vec_perm_indices::clamp): Handle polynomial element_types.
3413 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3414 (vec_perm_indices::all_in_range_p): Likewise.
3415 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3417 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3418 polynomial vec_perm_indices element types.
3419 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3420 * fold-const.c (fold_vec_perm): Likewise.
3421 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3422 * tree-vect-generic.c (lower_vec_perm): Likewise.
3423 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3424 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3425 element type to HOST_WIDE_INT.
3427 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3428 Alan Hayward <alan.hayward@arm.com>
3429 David Sherwood <david.sherwood@arm.com>
3431 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3432 rather than an int. Use plus_constant.
3433 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3434 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3436 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3437 Alan Hayward <alan.hayward@arm.com>
3438 David Sherwood <david.sherwood@arm.com>
3440 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3441 a HOST_WIDE_INT to a poly_int64.
3443 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3444 Alan Hayward <alan.hayward@arm.com>
3445 David Sherwood <david.sherwood@arm.com>
3447 * calls.c (load_register_parameters): Cope with polynomial
3448 mode sizes. Require a constant size for BLKmode parameters
3449 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3450 forces a parameter to be padded at the lsb end in order to
3451 fill a complete number of words, require the parameter size
3452 to be ordered wrt UNITS_PER_WORD.
3454 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3455 Alan Hayward <alan.hayward@arm.com>
3456 David Sherwood <david.sherwood@arm.com>
3458 * reload1.c (spill_stack_slot_width): Change element type
3459 from unsigned int to poly_uint64_pod.
3460 (alter_reg): Treat mode sizes as polynomial.
3462 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3463 Alan Hayward <alan.hayward@arm.com>
3464 David Sherwood <david.sherwood@arm.com>
3466 * reload.c (complex_word_subreg_p): New function.
3467 (reload_inner_reg_of_subreg, push_reload): Use it.
3469 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3470 Alan Hayward <alan.hayward@arm.com>
3471 David Sherwood <david.sherwood@arm.com>
3473 * lra-constraints.c (process_alt_operands): Reject matched
3474 operands whose sizes aren't ordered.
3475 (match_reload): Refer to this check here.
3477 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3478 Alan Hayward <alan.hayward@arm.com>
3479 David Sherwood <david.sherwood@arm.com>
3481 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3482 that the mode size is in the set {1, 2, 4, 8, 16}.
3484 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3485 Alan Hayward <alan.hayward@arm.com>
3486 David Sherwood <david.sherwood@arm.com>
3488 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3489 Use plus_constant instead of gen_rtx_PLUS.
3491 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3492 Alan Hayward <alan.hayward@arm.com>
3493 David Sherwood <david.sherwood@arm.com>
3495 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3496 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3497 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3498 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3499 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3500 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3501 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3502 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3503 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3504 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3506 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3507 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3508 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3509 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3510 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3511 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3512 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3513 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3514 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3515 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3517 * expr.c (emit_move_resolve_push): Treat the input and result
3518 of PUSH_ROUNDING as a poly_int64.
3519 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3520 (emit_push_insn): Likewise.
3521 * lra-eliminations.c (mark_not_eliminable): Likewise.
3522 * recog.c (push_operand): Likewise.
3523 * reload1.c (elimination_effects): Likewise.
3524 * rtlanal.c (nonzero_bits1): Likewise.
3525 * calls.c (store_one_arg): Likewise. Require the padding to be
3526 known at compile time.
3528 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3529 Alan Hayward <alan.hayward@arm.com>
3530 David Sherwood <david.sherwood@arm.com>
3532 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3533 Use plus_constant instead of gen_rtx_PLUS.
3535 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3536 Alan Hayward <alan.hayward@arm.com>
3537 David Sherwood <david.sherwood@arm.com>
3539 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3542 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3543 Alan Hayward <alan.hayward@arm.com>
3544 David Sherwood <david.sherwood@arm.com>
3546 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3547 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3548 via stack temporaries. Treat the mode size as polynomial too.
3550 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3551 Alan Hayward <alan.hayward@arm.com>
3552 David Sherwood <david.sherwood@arm.com>
3554 * expr.c (expand_expr_real_2): When handling conversions involving
3555 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3556 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3557 as a poly_uint64 too.
3559 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3560 Alan Hayward <alan.hayward@arm.com>
3561 David Sherwood <david.sherwood@arm.com>
3563 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3565 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3566 Alan Hayward <alan.hayward@arm.com>
3567 David Sherwood <david.sherwood@arm.com>
3569 * combine.c (can_change_dest_mode): Handle polynomial
3570 REGMODE_NATURAL_SIZE.
3571 * expmed.c (store_bit_field_1): Likewise.
3572 * expr.c (store_constructor): Likewise.
3573 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3574 and polynomial REGMODE_NATURAL_SIZE.
3575 (gen_lowpart_common): Likewise.
3576 * reginfo.c (record_subregs_of_mode): Likewise.
3577 * rtlanal.c (read_modify_subreg_p): Likewise.
3579 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3580 Alan Hayward <alan.hayward@arm.com>
3581 David Sherwood <david.sherwood@arm.com>
3583 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3584 numbers of elements.
3586 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3587 Alan Hayward <alan.hayward@arm.com>
3588 David Sherwood <david.sherwood@arm.com>
3590 * match.pd: Cope with polynomial numbers of vector elements.
3592 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3593 Alan Hayward <alan.hayward@arm.com>
3594 David Sherwood <david.sherwood@arm.com>
3596 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3597 in a POINTER_PLUS_EXPR.
3599 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3600 Alan Hayward <alan.hayward@arm.com>
3601 David Sherwood <david.sherwood@arm.com>
3603 * omp-simd-clone.c (simd_clone_subparts): New function.
3604 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3605 (ipa_simd_modify_function_body): Likewise.
3607 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3608 Alan Hayward <alan.hayward@arm.com>
3609 David Sherwood <david.sherwood@arm.com>
3611 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3612 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3613 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3614 (expand_vector_condition, vector_element): Likewise.
3615 (subparts_gt): New function.
3616 (get_compute_type): Use subparts_gt.
3617 (count_type_subparts): Delete.
3618 (expand_vector_operations_1): Use subparts_gt instead of
3619 count_type_subparts.
3621 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3622 Alan Hayward <alan.hayward@arm.com>
3623 David Sherwood <david.sherwood@arm.com>
3625 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3626 (vect_compile_time_alias): ...this new function. Do the calculation
3627 on poly_ints rather than trees.
3628 (vect_prune_runtime_alias_test_list): Update call accordingly.
3630 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3631 Alan Hayward <alan.hayward@arm.com>
3632 David Sherwood <david.sherwood@arm.com>
3634 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3636 (vect_schedule_slp_instance): Likewise.
3638 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3639 Alan Hayward <alan.hayward@arm.com>
3640 David Sherwood <david.sherwood@arm.com>
3642 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3643 constant and extern definitions for variable-length vectors.
3644 (vect_get_constant_vectors): Note that the number of units
3645 is known to be constant.
3647 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3648 Alan Hayward <alan.hayward@arm.com>
3649 David Sherwood <david.sherwood@arm.com>
3651 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3652 of units as polynomial. Choose between WIDE and NARROW based
3655 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3656 Alan Hayward <alan.hayward@arm.com>
3657 David Sherwood <david.sherwood@arm.com>
3659 * tree-vect-stmts.c (simd_clone_subparts): New function.
3660 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3662 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3663 Alan Hayward <alan.hayward@arm.com>
3664 David Sherwood <david.sherwood@arm.com>
3666 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3667 vectors as polynomial. Use build_index_vector for
3670 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3671 Alan Hayward <alan.hayward@arm.com>
3672 David Sherwood <david.sherwood@arm.com>
3674 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3675 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3676 for variable-length vectors.
3677 (vectorizable_mask_load_store): Treat the number of units as
3678 polynomial, asserting that it is constant if the condition has
3679 already been enforced.
3680 (vectorizable_store, vectorizable_load): Likewise.
3682 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3683 Alan Hayward <alan.hayward@arm.com>
3684 David Sherwood <david.sherwood@arm.com>
3686 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3687 of units as polynomial. Punt if we can't tell at compile time
3688 which vector contains the final result.
3690 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3691 Alan Hayward <alan.hayward@arm.com>
3692 David Sherwood <david.sherwood@arm.com>
3694 * tree-vect-loop.c (vectorizable_induction): Treat the number
3695 of units as polynomial. Punt on SLP inductions. Use an integer
3696 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3697 cast of such a series for variable-length floating-point
3700 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3701 Alan Hayward <alan.hayward@arm.com>
3702 David Sherwood <david.sherwood@arm.com>
3704 * tree.h (build_index_vector): Declare.
3705 * tree.c (build_index_vector): New function.
3706 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3707 of units as polynomial, forcibly converting it to a constant if
3708 vectorizable_reduction has already enforced the condition.
3709 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
3710 to create a {1,2,3,...} vector.
3711 (vectorizable_reduction): Treat the number of units as polynomial.
3712 Choose vectype_in based on the largest scalar element size rather
3713 than the smallest number of units. Enforce the restrictions
3716 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3717 Alan Hayward <alan.hayward@arm.com>
3718 David Sherwood <david.sherwood@arm.com>
3720 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3721 number of units as polynomial.
3723 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3724 Alan Hayward <alan.hayward@arm.com>
3725 David Sherwood <david.sherwood@arm.com>
3727 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3728 * target.def (autovectorize_vector_sizes): Return the vector sizes
3729 by pointer, using vector_sizes rather than a bitmask.
3730 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3731 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3732 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3734 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3735 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3736 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3737 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3738 * omp-general.c (omp_max_vf): Likewise.
3739 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3740 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3741 * tree-vect-loop.c (vect_analyze_loop): Likewise.
3742 * tree-vect-slp.c (vect_slp_bb): Likewise.
3743 * doc/tm.texi: Regenerate.
3744 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3746 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3747 the vector size as a poly_uint64 rather than an unsigned int.
3748 (current_vector_size): Change from an unsigned int to a poly_uint64.
3749 (get_vectype_for_scalar_type): Update accordingly.
3750 * tree.h (build_truth_vector_type): Take the size and number of
3751 units as a poly_uint64 rather than an unsigned int.
3752 (build_vector_type): Add a temporary overload that takes
3753 the number of units as a poly_uint64 rather than an unsigned int.
3754 * tree.c (make_vector_type): Likewise.
3755 (build_truth_vector_type): Take the number of units as a poly_uint64
3756 rather than an unsigned int.
3758 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3759 Alan Hayward <alan.hayward@arm.com>
3760 David Sherwood <david.sherwood@arm.com>
3762 * target.def (get_mask_mode): Take the number of units and length
3763 as poly_uint64s rather than unsigned ints.
3764 * targhooks.h (default_get_mask_mode): Update accordingly.
3765 * targhooks.c (default_get_mask_mode): Likewise.
3766 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3767 * doc/tm.texi: Regenerate.
3769 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3770 Alan Hayward <alan.hayward@arm.com>
3771 David Sherwood <david.sherwood@arm.com>
3773 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3774 * omp-general.c (omp_max_vf): Likewise.
3775 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3776 (expand_omp_simd): Handle polynomial safelen.
3777 * omp-low.c (omplow_simd_context): Add a default constructor.
3778 (omplow_simd_context::max_vf): Change from int to poly_uint64.
3779 (lower_rec_simd_input_clauses): Update accordingly.
3780 (lower_rec_input_clauses): Likewise.
3782 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3783 Alan Hayward <alan.hayward@arm.com>
3784 David Sherwood <david.sherwood@arm.com>
3786 * tree-vectorizer.h (vect_nunits_for_cost): New function.
3787 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3788 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3789 (vect_analyze_slp_cost): Likewise.
3790 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3791 (vect_model_load_cost): Likewise.
3793 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3794 Alan Hayward <alan.hayward@arm.com>
3795 David Sherwood <david.sherwood@arm.com>
3797 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3798 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3799 from an unsigned int * to a poly_uint64_pod *.
3800 (calculate_unrolling_factor): New function.
3801 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
3803 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3804 Alan Hayward <alan.hayward@arm.com>
3805 David Sherwood <david.sherwood@arm.com>
3807 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3808 from an unsigned int to a poly_uint64.
3809 (_loop_vec_info::slp_unrolling_factor): Likewise.
3810 (_loop_vec_info::vectorization_factor): Change from an int
3812 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
3813 (vect_get_num_vectors): New function.
3814 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
3815 (vect_get_num_copies): Use vect_get_num_vectors.
3816 (vect_analyze_data_ref_dependences): Change max_vf from an int *
3817 to an unsigned int *.
3818 (vect_analyze_data_refs): Change min_vf from an int * to a
3820 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3821 than an unsigned HOST_WIDE_INT.
3822 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
3823 (vect_analyze_data_ref_dependence): Change max_vf from an int *
3824 to an unsigned int *.
3825 (vect_analyze_data_ref_dependences): Likewise.
3826 (vect_compute_data_ref_alignment): Handle polynomial vf.
3827 (vect_enhance_data_refs_alignment): Likewise.
3828 (vect_prune_runtime_alias_test_list): Likewise.
3829 (vect_shift_permute_load_chain): Likewise.
3830 (vect_supportable_dr_alignment): Likewise.
3831 (dependence_distance_ge_vf): Take the vectorization factor as a
3832 poly_uint64 rather than an unsigned HOST_WIDE_INT.
3833 (vect_analyze_data_refs): Change min_vf from an int * to a
3835 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
3836 vfm1 as a poly_uint64 rather than an int. Make the same change
3837 for the returned bound_scalar.
3838 (vect_gen_vector_loop_niters): Handle polynomial vf.
3839 (vect_do_peeling): Likewise. Update call to
3840 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
3841 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
3843 * tree-vect-loop.c (vect_determine_vectorization_factor)
3844 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
3845 (vect_get_known_peeling_cost): Likewise.
3846 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
3847 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
3848 (vect_transform_loop): Likewise. Use the lowest possible VF when
3849 updating the upper bounds of the loop.
3850 (vect_min_worthwhile_factor): Make static. Return an unsigned int
3852 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3853 polynomial unroll factors.
3854 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3855 (vect_make_slp_decision): Likewise.
3856 (vect_supported_load_permutation_p): Likewise, and polynomial
3858 (vect_analyze_slp_cost): Handle polynomial vf.
3859 (vect_slp_analyze_node_operations): Likewise.
3860 (vect_slp_analyze_bb_1): Likewise.
3861 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3862 than an unsigned HOST_WIDE_INT.
3863 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3864 (vectorizable_load): Handle polynomial vf.
3865 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3867 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3869 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3870 Alan Hayward <alan.hayward@arm.com>
3871 David Sherwood <david.sherwood@arm.com>
3873 * match.pd: Handle bit operations involving three constants
3874 and try to fold one pair.
3876 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3878 * tree-vect-loop-manip.c: Include gimple-fold.h.
3879 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3880 niters_maybe_zero parameters. Handle other cases besides a step of 1.
3881 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3882 Add a path that uses a step of VF instead of 1, but disable it
3884 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3885 and niters_no_overflow parameters. Update calls to
3886 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3887 Create a new SSA name if the latter choses to use a ste other
3888 than zero, and return it via niters_vector_mult_vf_var.
3889 * tree-vect-loop.c (vect_transform_loop): Update calls to
3890 vect_do_peeling, vect_gen_vector_loop_niters and
3891 slpeel_make_loop_iterate_ntimes.
3892 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3893 (vect_gen_vector_loop_niters): Update declarations after above changes.
3895 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
3897 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3898 128-bit round to integer instructions.
3899 (ceil<mode>2): Likewise.
3900 (btrunc<mode>2): Likewise.
3901 (round<mode>2): Likewise.
3903 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3905 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3906 unaligned VSX load/store on P8/P9.
3907 (expand_block_clear): Allow the use of unaligned VSX
3908 load/store on P8/P9.
3910 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3912 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3914 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3915 swap associated with both a load and a store.
3917 2018-01-02 Andrew Waterman <andrew@sifive.com>
3919 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3920 * config/riscv/riscv.md (clear_cache): Use it.
3922 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
3924 * web.c: Remove out-of-date comment.
3926 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3928 * expr.c (fixup_args_size_notes): Check that any existing
3929 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
3930 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
3931 (emit_single_push_insn): ...here.
3933 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3935 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
3936 (const_vector_encoded_nelts): New function.
3937 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
3938 (const_vector_int_elt, const_vector_elt): Declare.
3939 * emit-rtl.c (const_vector_int_elt_1): New function.
3940 (const_vector_elt): Likewise.
3941 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
3942 of CONST_VECTOR_ELT.
3944 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3946 * expr.c: Include rtx-vector-builder.h.
3947 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
3948 directly on the tree encoding.
3949 (const_vector_from_tree): Likewise.
3950 * optabs.c: Include rtx-vector-builder.h.
3951 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
3952 sequence of "u" values.
3953 * vec-perm-indices.c: Include rtx-vector-builder.h.
3954 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
3955 directly on the vec_perm_indices encoding.
3957 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3959 * doc/rtl.texi (const_vector): Describe new encoding scheme.
3960 * Makefile.in (OBJS): Add rtx-vector-builder.o.
3961 * rtx-vector-builder.h: New file.
3962 * rtx-vector-builder.c: Likewise.
3963 * rtl.h (rtx_def::u2): Add a const_vector field.
3964 (CONST_VECTOR_NPATTERNS): New macro.
3965 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
3966 (CONST_VECTOR_DUPLICATE_P): Likewise.
3967 (CONST_VECTOR_STEPPED_P): Likewise.
3968 (CONST_VECTOR_ENCODED_ELT): Likewise.
3969 (const_vec_duplicate_p): Check for a duplicated vector encoding.
3970 (unwrap_const_vec_duplicate): Likewise.
3971 (const_vec_series_p): Check for a non-duplicated vector encoding.
3972 Say that the function only returns true for integer vectors.
3973 * emit-rtl.c: Include rtx-vector-builder.h.
3974 (gen_const_vec_duplicate_1): Delete.
3975 (gen_const_vector): Call gen_const_vec_duplicate instead of
3976 gen_const_vec_duplicate_1.
3977 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
3978 (gen_const_vec_duplicate): Use rtx_vector_builder.
3979 (gen_const_vec_series): Likewise.
3980 (gen_rtx_CONST_VECTOR): Likewise.
3981 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
3982 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3983 Build a new vector rather than modifying a CONST_VECTOR in-place.
3984 (handle_special_swappables): Update call accordingly.
3985 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
3986 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3987 Build a new vector rather than modifying a CONST_VECTOR in-place.
3988 (handle_special_swappables): Update call accordingly.
3990 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3992 * simplify-rtx.c (simplify_const_binary_operation): Use
3993 CONST_VECTOR_ELT instead of XVECEXP.
3995 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3997 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
3998 the selector elements to be different from the data elements
3999 if the selector is a VECTOR_CST.
4000 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4001 ssizetype for the selector.
4003 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4005 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4006 before testing each element individually.
4007 * tree-vect-generic.c (lower_vec_perm): Likewise.
4009 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4011 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4012 * selftest-run-tests.c (selftest::run_tests): Call it.
4013 * vector-builder.h (vector_builder::operator ==): New function.
4014 (vector_builder::operator !=): Likewise.
4015 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4016 (vec_perm_indices::all_from_input_p): New function.
4017 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4018 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4019 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4020 instead of reading the VECTOR_CST directly. Detect whether both
4021 vector inputs are the same before constructing the vec_perm_indices,
4022 and update the number of inputs argument accordingly. Use the
4023 utility functions added above. Only construct sel2 if we need to.
4025 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4027 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4028 the broadcast of the low byte.
4029 (expand_mult_highpart): Use an explicit encoding for the permutes.
4030 * optabs-query.c (can_mult_highpart_p): Likewise.
4031 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4032 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4033 (vectorizable_bswap): Likewise.
4034 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4035 explicit encoding for the power-of-2 permutes.
4036 (vect_permute_store_chain): Likewise.
4037 (vect_grouped_load_supported): Likewise.
4038 (vect_permute_load_chain): Likewise.
4040 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4042 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4043 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4044 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4045 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4046 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4047 (vect_gen_perm_mask_any): Likewise.
4049 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4051 * int-vector-builder.h: New file.
4052 * vec-perm-indices.h: Include int-vector-builder.h.
4053 (vec_perm_indices): Redefine as an int_vector_builder.
4054 (auto_vec_perm_indices): Delete.
4055 (vec_perm_builder): Redefine as a stand-alone class.
4056 (vec_perm_indices::vec_perm_indices): New function.
4057 (vec_perm_indices::clamp): Likewise.
4058 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4059 (vec_perm_indices::new_vector): New function.
4060 (vec_perm_indices::new_expanded_vector): Update for new
4061 vec_perm_indices class.
4062 (vec_perm_indices::rotate_inputs): New function.
4063 (vec_perm_indices::all_in_range_p): Operate directly on the
4064 encoded form, without computing elided elements.
4065 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4066 encoding. Update for new vec_perm_indices class.
4067 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4068 the given vec_perm_builder.
4069 (expand_vec_perm_var): Update vec_perm_builder constructor.
4070 (expand_mult_highpart): Use vec_perm_builder instead of
4071 auto_vec_perm_indices.
4072 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4073 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4074 or double series encoding as appropriate.
4075 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4076 vec_perm_indices instead of auto_vec_perm_indices.
4077 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4078 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4079 (vect_permute_store_chain): Likewise.
4080 (vect_grouped_load_supported): Likewise.
4081 (vect_permute_load_chain): Likewise.
4082 (vect_shift_permute_load_chain): Likewise.
4083 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4084 (vect_transform_slp_perm_load): Likewise.
4085 (vect_schedule_slp_instance): Likewise.
4086 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4087 (vectorizable_mask_load_store): Likewise.
4088 (vectorizable_bswap): Likewise.
4089 (vectorizable_store): Likewise.
4090 (vectorizable_load): Likewise.
4091 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4092 vec_perm_indices instead of auto_vec_perm_indices. Use
4093 tree_to_vec_perm_builder to read the vector from a tree.
4094 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4095 vec_perm_builder instead of a vec_perm_indices.
4096 (have_whole_vector_shift): Use vec_perm_builder and
4097 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4098 truncation to calc_vec_perm_mask_for_shift.
4099 (vect_create_epilog_for_reduction): Likewise.
4100 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4101 from auto_vec_perm_indices to vec_perm_indices.
4102 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4103 instead of changing individual elements.
4104 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4105 the vector in d.perm.
4106 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4107 from auto_vec_perm_indices to vec_perm_indices.
4108 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4109 instead of changing individual elements.
4110 (arm_vectorize_vec_perm_const): Use new_vector to install
4111 the vector in d.perm.
4112 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4113 Update vec_perm_builder constructor.
4114 (rs6000_expand_interleave): Likewise.
4115 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4116 (rs6000_expand_interleave): Likewise.
4118 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4120 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4121 to qimode could truncate the indices.
4122 * optabs.c (expand_vec_perm_var): Likewise.
4124 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4126 * Makefile.in (OBJS): Add vec-perm-indices.o.
4127 * vec-perm-indices.h: New file.
4128 * vec-perm-indices.c: Likewise.
4129 * target.h (vec_perm_indices): Replace with a forward class
4131 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4132 * optabs.h: Include vec-perm-indices.h.
4133 (expand_vec_perm): Delete.
4134 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4135 (expand_vec_perm_const): Declare.
4136 * target.def (vec_perm_const_ok): Replace with...
4137 (vec_perm_const): ...this new hook.
4138 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4139 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4140 * doc/tm.texi: Regenerate.
4141 * optabs.def (vec_perm_const): Delete.
4142 * doc/md.texi (vec_perm_const): Likewise.
4143 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4144 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4145 expand_vec_perm for constant permutation vectors. Assert that
4146 the mode of variable permutation vectors is the integer equivalent
4147 of the mode that is being permuted.
4148 * optabs-query.h (selector_fits_mode_p): Declare.
4149 * optabs-query.c: Include vec-perm-indices.h.
4150 (selector_fits_mode_p): New function.
4151 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4152 is defined, instead of checking whether the vec_perm_const_optab
4153 exists. Use targetm.vectorize.vec_perm_const instead of
4154 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4155 fit in the vector mode before using a variable permute.
4156 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4157 vec_perm_indices instead of an rtx.
4158 (expand_vec_perm): Replace with...
4159 (expand_vec_perm_const): ...this new function. Take the selector
4160 as a vec_perm_indices rather than an rtx. Also take the mode of
4161 the selector. Update call to shift_amt_for_vec_perm_mask.
4162 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4163 Use vec_perm_indices::new_expanded_vector to expand the original
4164 selector into bytes. Check whether the indices fit in the vector
4165 mode before using a variable permute.
4166 (expand_vec_perm_var): Make global.
4167 (expand_mult_highpart): Use expand_vec_perm_const.
4168 * fold-const.c: Includes vec-perm-indices.h.
4169 * tree-ssa-forwprop.c: Likewise.
4170 * tree-vect-data-refs.c: Likewise.
4171 * tree-vect-generic.c: Likewise.
4172 * tree-vect-loop.c: Likewise.
4173 * tree-vect-slp.c: Likewise.
4174 * tree-vect-stmts.c: Likewise.
4175 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4177 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4178 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4179 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4180 (aarch64_vectorize_vec_perm_const): ...this new function.
4181 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4182 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4183 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4184 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4185 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4186 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4187 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4189 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4190 check for NEON modes.
4191 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4192 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4193 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4194 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4196 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4197 the old VEC_PERM_CONST conditions.
4198 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4199 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4200 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4201 (ia64_vectorize_vec_perm_const_ok): Merge into...
4202 (ia64_vectorize_vec_perm_const): ...this new function.
4203 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4204 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4205 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4206 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4207 * config/mips/mips.c (mips_expand_vec_perm_const)
4208 (mips_vectorize_vec_perm_const_ok): Merge into...
4209 (mips_vectorize_vec_perm_const): ...this new function.
4210 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4211 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4212 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4213 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4214 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4215 (rs6000_expand_vec_perm_const): Delete.
4216 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4218 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4219 (altivec_expand_vec_perm_const_le): Take each operand individually.
4220 Operate on constant selectors rather than rtxes.
4221 (altivec_expand_vec_perm_const): Likewise. Update call to
4222 altivec_expand_vec_perm_const_le.
4223 (rs6000_expand_vec_perm_const): Delete.
4224 (rs6000_vectorize_vec_perm_const_ok): Delete.
4225 (rs6000_vectorize_vec_perm_const): New function.
4226 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4227 an element count and rtx array.
4228 (rs6000_expand_extract_even): Update call accordingly.
4229 (rs6000_expand_interleave): Likewise.
4230 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4231 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4232 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4233 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4234 (rs6000_expand_vec_perm_const): Delete.
4235 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4236 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4237 (altivec_expand_vec_perm_const_le): Take each operand individually.
4238 Operate on constant selectors rather than rtxes.
4239 (altivec_expand_vec_perm_const): Likewise. Update call to
4240 altivec_expand_vec_perm_const_le.
4241 (rs6000_expand_vec_perm_const): Delete.
4242 (rs6000_vectorize_vec_perm_const_ok): Delete.
4243 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4244 reference to the SPE evmerge intructions.
4245 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4246 an element count and rtx array.
4247 (rs6000_expand_extract_even): Update call accordingly.
4248 (rs6000_expand_interleave): Likewise.
4249 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4250 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4252 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4254 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4256 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4257 vector mode and that that mode matches the mode of the data
4259 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4260 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4261 directly using expand_vec_perm_1 when forcing selectors into
4263 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4265 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4267 * optabs-query.h (can_vec_perm_p): Delete.
4268 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4269 * optabs-query.c (can_vec_perm_p): Split into...
4270 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4271 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4272 particular selector is valid.
4273 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4274 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4275 (vect_grouped_load_supported): Likewise.
4276 (vect_shift_permute_load_chain): Likewise.
4277 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4278 (vect_transform_slp_perm_load): Likewise.
4279 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4280 (vectorizable_bswap): Likewise.
4281 (vect_gen_perm_mask_checked): Likewise.
4282 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4283 implementations of variable permutation vectors into account
4284 when deciding which selector to use.
4285 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4286 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4287 with a false third argument.
4288 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4289 to test whether the constant selector is valid and can_vec_perm_var_p
4290 to test whether a variable selector is valid.
4292 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4294 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4295 * optabs-query.c (can_vec_perm_p): Likewise.
4296 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4297 instead of vec_perm_indices.
4298 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4299 (vect_gen_perm_mask_checked): Likewise,
4300 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4301 (vect_gen_perm_mask_checked): Likewise,
4303 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4305 * optabs-query.h (qimode_for_vec_perm): Declare.
4306 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4307 (qimode_for_vec_perm): ...this new function.
4308 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4310 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4312 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4313 does not have a conditional at the top.
4315 2018-01-02 Richard Biener <rguenther@suse.de>
4317 * ipa-inline.c (big_speedup_p): Fix expression.
4319 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4322 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4325 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4329 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4330 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4331 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4332 cond_taken_branch_cost 3->4.
4334 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4336 PR tree-optimization/83581
4337 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4338 TODO_cleanup_cfg if any changes have been made.
4341 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4342 convert_modes if target mode has the right side, but different mode
4346 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4347 last argument when extracting from CONCAT. If either from_real or
4348 from_imag is NULL, use expansion through memory. If result is not
4349 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4350 the parts directly to inner mode, if even that fails, use expansion
4354 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4355 check for bswap in mode rather than HImode and use that in expand_unop
4358 Copyright (C) 2018 Free Software Foundation, Inc.
4360 Copying and distribution of this file, with or without modification,
4361 are permitted in any medium without royalty provided the copyright
4362 notice and this notice are preserved.