1 2020-07-11 Roger Sayle <roger@nextmovesoftware.com>
3 * internal-fn.c (expand_mul_overflow): When checking for signed
4 overflow from a widening multiplication, we access the truncated
5 lowpart RES twice, so keep this value in a pseudo register.
7 2020-07-11 Richard Sandiford <richard.sandiford@arm.com>
9 PR tree-optimization/96146
10 * value-range.cc (value_range::set): Only decompose POLY_INT_CST
11 bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges
12 involving POLY_INT_CSTs.
14 2020-07-10 David Edelsohn <dje.gcc@gmail.com>
17 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
18 create named section for VAR_DECL or FUNCTION_DECL.
20 2020-07-10 Joseph Myers <joseph@codesourcery.com>
22 * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
25 2020-07-10 Alexander Popov <alex.popov@linux.com>
27 * shrink-wrap.c (try_shrink_wrapping): Improve debug output.
29 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
32 * expr.c (expand_expr_real_2): When reducing bit fields,
33 clear the target if it has a different mode from the expression.
34 (reduce_to_bit_field_precision): Don't do that here. Instead
35 assert that the target already has the correct mode.
37 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
41 * config/arm/arm.c (arm_attribute_table): Add
43 (arm_comp_type_attributes): Check that the "Advanced SIMD type"
45 * config/arm/arm-builtins.c: Include stringpool.h and
47 (arm_mangle_builtin_vector_type): Use the mangling recorded
48 in the "Advanced SIMD type" attribute.
49 (arm_init_simd_builtin_types): Add an "Advanced SIMD type"
50 attribute to each Advanced SIMD type, using the mangled type
51 as the attribute's single argument.
53 2020-07-10 Carl Love <cel@us.ibm.com>
55 * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator.
56 (VSX_MM4): New define_mode_iterator.
57 (vec_mtvsrbmi): New define_insn.
58 (vec_mtvsr_<mode>): New define_insn.
59 (vec_cntmb_<mode>): New define_insn.
60 (vec_extract_<mode>): New define_insn.
61 (vec_expand_<mode>): New define_insn.
62 (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
63 UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
64 * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
65 vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
67 * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
68 (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
69 mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
70 vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
71 (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
72 (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
73 mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
74 (BU_P10_OVERLOAD_2): Add defition for cntm.
75 * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
76 checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
77 CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
78 (altivec_overloaded_builtins): Add overloaded argument entries for
79 P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
80 P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
81 P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
82 P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
83 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
84 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
85 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
86 P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
87 P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
88 P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
89 (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
90 P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
91 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
92 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
93 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
94 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
95 P10_BUILTIN_VEXPANDMQ.
96 * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
97 entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
100 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)>
103 * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
104 (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
105 v16qi_ftype_pcvoid with correct number of parameters.
107 2020-07-10 H.J. Lu <hjl.tools@gmail.com>
110 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
111 TARGET_AVX512VL when enabling FMA.
113 2020-07-10 Andrea Corallo <andrea.corallo@arm.com>
114 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
115 Iain Apreotesei <iain.apreotesei@arm.com>
117 * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New
119 * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define.
120 (arm_invalid_within_doloop): Implement invalid_within_doloop hook.
121 (arm_target_insn_ok_for_lob): New function.
122 * config/arm/arm.h (TARGET_HAVE_LOB): Define macro.
123 * config/arm/thumb2.md (*doloop_end_internal, doloop_begin)
124 (dls_insn): Add new patterns.
125 (doloop_end): Modify to select LR when LOB is available.
126 * config/arm/unspecs.md: Add new unspec.
127 * doc/sourcebuild.texi (arm_v8_1_lob_ok)
128 (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports
131 2020-07-10 Richard Biener <rguenther@suse.de>
133 PR tree-optimization/96133
134 * gimple-fold.c (fold_array_ctor_reference): Do not
135 recurse to folding a CTOR that does not fully cover the
138 2020-07-10 Cui,Lili <lili.cui@intel.com>
140 * common/config/i386/cpuinfo.h
141 (get_intel_cpu): Handle sapphirerapids.
142 * common/config/i386/i386-common.c
143 (processor_names): Add sapphirerapids and alderlake.
144 (processor_alias_table): Add sapphirerapids and alderlake.
145 * common/config/i386/i386-cpuinfo.h
146 (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
147 INTEL_COREI7_ALDERLAKE.
148 * config.gcc: Add -march=sapphirerapids and alderlake.
149 * config/i386/driver-i386.c
150 (host_detect_local_cpu) Handle sapphirerapids and alderlake.
151 * config/i386/i386-c.c
152 (ix86_target_macros_internal): Handle sapphirerapids and alderlake.
153 * config/i386/i386-options.c
154 (m_SAPPHIRERAPIDS) : Define.
155 (m_ALDERLAKE): Ditto.
156 (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
157 (processor_cost_table): Add sapphirerapids and alderlake.
158 (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
159 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
161 (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
162 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
165 (PTA_CLDEMOTE): Ditto.
166 (PTA_SERIALIZE): Ditto.
168 (PTA_SAPPHIRERAPIDS): Ditto.
169 (PTA_ALDERLAKE): Ditto.
170 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
172 * doc/extend.texi: Add sapphirerapids and alderlake.
173 * doc/invoke.texi: Add sapphirerapids and alderlake.
175 2020-07-10 Martin Liska <mliska@suse.cz>
177 * dumpfile.c [profile-report]: Add new profile dump.
178 * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report.
179 * passes.c (pass_manager::dump_profile_report): Change stderr
182 2020-07-10 Kewen Lin <linkw@linux.ibm.com>
184 * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which
185 is adjusted by considering peeled prologue for non
186 vect_use_loop_mask_for_alignment_p cases.
188 2020-07-09 Peter Bergner <bergner@linux.ibm.com>
191 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA
192 specific types __vector_quad and __vector_pair, and initialize the
193 MMA built-ins if TARGET_EXTRA_BUILTINS is set.
194 (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask.
195 Remove now unneeded mask variable.
196 * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the
197 OPTION_MASK_MMA flag for power10 if not already set.
199 2020-07-09 Richard Biener <rguenther@suse.de>
201 PR tree-optimization/96133
202 * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p
203 status between stmts.
205 2020-07-09 H.J. Lu <hjl.tools@gmail.com>
208 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA.
209 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New.
210 (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256.
211 (rsqrtv16sf2): Removed.
213 2020-07-09 Richard Biener <rguenther@suse.de>
215 * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove.
216 (vect_slp_analyze_and_verify_instance_alignment): Rename to ...
217 (vect_slp_analyze_instance_alignment): ... this.
218 * tree-vect-data-refs.c (verify_data_ref_alignment): Remove.
219 (vect_verify_datarefs_alignment): Likewise.
220 (vect_enhance_data_refs_alignment): Do not call
221 vect_verify_datarefs_alignment.
222 (vect_slp_analyze_node_alignment): Rename from
223 vect_slp_analyze_and_verify_node_alignment and do not
224 call verify_data_ref_alignment.
225 (vect_slp_analyze_instance_alignment): Rename from
226 vect_slp_analyze_and_verify_instance_alignment.
227 * tree-vect-stmts.c (vectorizable_store): Dump when
228 we vectorize an unaligned access.
229 (vectorizable_load): Likewise.
230 * tree-vect-loop.c (vect_analyze_loop_2): Do not call
231 vect_verify_datarefs_alignment.
232 * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust.
234 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
236 PR tree-optimization/95804
237 * tree-loop-distribution.c (break_alias_scc_partitions): Force
238 negative post order to reduction partition.
240 2020-07-09 Jakub Jelinek <jakub@redhat.com>
242 * omp-general.h (struct omp_for_data): Add min_inner_iterations
244 * omp-general.c (omp_extract_for_data): Initialize them and remember
245 them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there.
246 * omp-expand.c (expand_omp_for_init_counts): Fix up computation of
247 counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST.
248 (expand_omp_for_init_vars): For
249 fd->first_nonrect + 1 == fd->last_nonrect loops with for now
250 INTEGER_CST fd->loop.n2 find quadratic equation roots instead of
251 using fallback method when possible.
253 2020-07-09 Omar Tahir <omar.tahir@arm.com>
255 * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
256 last_moveable_pseudo before returning.
258 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com>
260 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
261 __ARM_FEATURE_BTI_DEFAULT support.
263 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
265 * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
267 * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
268 stub registers class.
269 (aarch64_class_max_nregs): Likewise.
270 (aarch64_register_move_cost): Likewise.
271 (aarch64_sls_shared_thunks): Global array to store stub labels.
272 (aarch64_sls_emit_function_stub): New.
273 (aarch64_create_blr_label): New.
274 (aarch64_sls_emit_blr_function_thunks): New.
275 (aarch64_sls_emit_shared_blr_thunks): New.
276 (aarch64_asm_file_end): New.
277 (aarch64_indirect_call_asm): New.
278 (TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
279 (TARGET_ASM_FUNCTION_EPILOGUE): Use
280 aarch64_sls_emit_blr_function_thunks.
281 * config/aarch64/aarch64.h (STB_REGNUM_P): New.
282 (enum reg_class): Add STUB_REGS class.
283 (machine_function): Introduce `call_via` array for
284 function-local stub labels.
285 * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
286 aarch64_indirect_call_asm to emit code when hardening BLR
288 * config/aarch64/constraints.md (Ucr): New constraint
289 representing registers for indirect calls. Is GENERAL_REGS
290 usually, and STUB_REGS when hardening BLR instruction against
292 * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
293 is also a general register.
295 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
297 * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
298 * config/aarch64/aarch64.c (aarch64_output_casesi): Emit
299 speculation barrier after BR instruction if needs be.
300 (aarch64_trampoline_init): Handle ptr_mode value & adjust size
302 (aarch64_sls_barrier): New.
303 (aarch64_asm_trampoline_template): Add needed barriers.
304 * config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
306 (TRAMPOLINE_SIZE): Account for barrier.
307 * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
308 simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
309 Emit barrier if needs be, also account for possible barrier using
310 "sls_length" attribute.
311 (sls_length): New attribute.
312 (length): Determine default using any non-default sls_length
315 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
317 * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
319 (aarch64_harden_sls_blr_p): New.
320 * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
322 (aarch64_harden_sls_retbr_p): New.
323 (aarch64_harden_sls_blr_p): New.
324 (aarch64_validate_sls_mitigation): New.
325 (aarch64_override_options): Parse options for SLS mitigation.
326 * config/aarch64/aarch64.opt (-mharden-sls): New option.
327 * doc/invoke.texi: Document new option.
329 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
331 * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization
332 with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION
333 or nested-cycle reduction.
335 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
337 * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string
338 for fully masking to be more common.
340 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
342 * config/riscv/riscv.md (get_thread_pointer<mode>): New.
344 * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
345 Document __builtin_thread_pointer.
347 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
349 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
350 Abort if any arguments on stack.
352 2020-07-08 Eric Botcazou <ebotcazou@gcc.gnu.org>
354 * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if
355 either type has reverse scalar storage order.
356 * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through
357 a memory copy if either type has reverse scalar storage order.
359 2020-07-08 Tobias Burnus <tobias@codesourcery.com>
361 * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic
362 on to the native compiler, if used.
363 * config/nvptx/mkoffload.c (compile_native, main): Likewise.
365 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com>
367 * config/rs6000/altivec.h (vec_vmsumudm): New define.
368 * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
369 (altivec_vmsumudm): New define_insn.
370 * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
371 entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
372 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for
373 ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
374 * doc/extend.texi: Add document for vmsumudm behind vmsum.
376 2020-07-08 Richard Biener <rguenther@suse.de>
378 * tree-vect-stmts.c (get_group_load_store_type): Pass
379 in the SLP node and the alignment support scheme output.
381 (get_load_store_type): Likewise.
382 (vectorizable_store): Adjust.
383 (vectorizable_load): Likewise.
385 2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
388 * expr.c (expand_expr_real_2): Get the mode from the type rather
389 than the rtx, and assert that it is consistent with the mode of
390 the rtx (where known). Optimize all constant integers, not just
391 those that can be represented in poly_int64.
393 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
395 * config/rs6000/vsx.md (len_load_v16qi): New define_expand.
396 (len_store_v16qi): Likewise.
398 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
400 * doc/md.texi (len_load_@var{m}): Document.
401 (len_store_@var{m}): Likewise.
402 * internal-fn.c (len_load_direct): New macro.
403 (len_store_direct): Likewise.
404 (expand_len_load_optab_fn): Likewise.
405 (expand_len_store_optab_fn): Likewise.
406 (direct_len_load_optab_supported_p): Likewise.
407 (direct_len_store_optab_supported_p): Likewise.
408 (expand_mask_load_optab_fn): New macro. Original renamed to ...
409 (expand_partial_load_optab_fn): ... here. Add handlings for
411 (expand_mask_store_optab_fn): New macro. Original renamed to ...
412 (expand_partial_store_optab_fn): ... here. Add handlings for
414 (internal_load_fn_p): Handle IFN_LEN_LOAD.
415 (internal_store_fn_p): Handle IFN_LEN_STORE.
416 (internal_fn_stored_value_index): Handle IFN_LEN_STORE.
417 * internal-fn.def (LEN_LOAD): New internal function.
418 (LEN_STORE): Likewise.
419 * optabs.def (len_load_optab, len_store_optab): New optab.
421 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
423 * config/aarch64/aarch64.c (thunderx2t99_regmove_cost,
424 thunderx2t99_vector_cost): Likewise.
426 2020-07-07 Richard Biener <rguenther@suse.de>
428 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix
429 group overlap condition to allow negative step DR groups.
430 * tree-vect-stmts.c (get_group_load_store_type): For
431 multi element SLP groups force VMAT_STRIDED_SLP when the step
434 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com>
436 * doc/generic.texi: Fix typo.
438 2020-07-07 Richard Biener <rguenther@suse.de>
440 * lto-streamer-out.c (cmp_symbol_files): Use the computed
441 order map to sort symbols from the same sub-file together.
442 (lto_output): Compute a map of sub-file to an order number
443 it appears in the symbol output array.
445 2020-07-06 Richard Biener <rguenther@suse.de>
447 PR tree-optimization/96075
448 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
449 TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
450 for the misalignment calculation for negative step.
452 2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
454 * config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
455 (*vsub_addsi4): New instruction.
457 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
459 * config/cris/cris.md (movulsr): New peephole2.
461 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
463 * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"):
464 Correct gcc_assert of overlapping operands.
466 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
468 * config/cris/cris.c (cris_select_cc_mode): Always return
469 CC_NZmode for matching comparisons. Clarify comments.
470 * config/cris/cris-modes.def: Clarify mode comment.
471 * config/cris/cris.md (plusminus, plusminusumin, plusumin): New
473 (addsub, addsubbo, nd): New code iterator attributes.
474 ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code
475 iterator constructs instead of match_operator constructs.
476 ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from
477 "*extop<mode>si<setnz>".
478 ("*add<su>qihi_swap"): Similar from "*addxqihi_swap".
479 ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from
480 "*extop<mode>si<setnz>_swap".
482 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
484 * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap")
485 ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate.
487 2020-07-03 Eric Botcazou <ebotcazou@gcc.gnu.org>
489 * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that
490 were initially created for the assignment of a variable-sized
491 object and whose source is now a string constant.
492 * gimple-ssa-store-merging.c (struct merged_store_group): Document
493 STRING_CST for rhs_code field.
494 Add string_concatenation boolean field.
495 (merged_store_group::merged_store_group): Initialize it as well as
497 (merged_store_group::do_merge): Set it upon seeing a STRING_CST.
498 Also set bit_insertion here upon seeing a BIT_INSERT_EXPR.
499 (merged_store_group::apply_stores): Clear it for small regions.
500 Do not create a power-of-2-sized buffer if it is still true.
501 And do not set bit_insertion here again.
502 (encode_tree_to_bitpos): Deal with BLKmode for the expression.
503 (merged_store_group::can_be_merged_into): Deal with STRING_CST.
504 (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion
505 to true after changing MEM_REF stores into BIT_INSERT_EXPR stores.
506 (count_multiple_uses): Return 0 for STRING_CST.
507 (split_group): Do not split the group for a string concatenation.
508 (imm_store_chain_info::output_merged_store): Constify and rename
509 some local variables. Build an array type as destination type
510 for a string concatenation, as well as a zero mask, and call
511 build_string to build the source.
512 (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR.
513 (pass_store_merging::process_store): Accept STRING_CST on the RHS.
514 * gimple.h (gimple_call_alloca_for_var_p): New accessor function.
515 * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var.
516 * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY.
518 2020-07-03 Martin Jambor <mjambor@suse.cz>
521 * ipa-sra.c (all_callee_accesses_present_p): Do not accept type
524 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
526 * config/nvptx/nvptx.md (popcount<mode>2): New instructions.
527 (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions.
529 2020-07-03 Martin Liska <mliska@suse.cz>
530 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
533 * gcov-dump.c (tag_function): Use gcov_position_t
536 2020-07-03 Richard Biener <rguenther@suse.de>
538 PR tree-optimization/96037
539 * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def.
541 2020-07-03 Richard Biener <rguenther@suse.de>
543 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the
544 original non-pattern stmts, look at the pattern stmt
545 vectorization status.
547 2020-07-03 Andrew Stubbs <ams@codesourcery.com>
549 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
551 2020-07-03 Richard Biener <rguenther@suse.de>
553 * tree-vectorizer.h (vec_info::insert_on_entry): New.
554 (vec_info::insert_seq_on_entry): Likewise.
555 * tree-vectorizer.c (vec_info::insert_on_entry): Implement.
556 (vec_info::insert_seq_on_entry): Likewise.
557 * tree-vect-stmts.c (vect_init_vector_1): Use
558 vec_info::insert_on_entry.
559 (vect_finish_stmt_generation): Set modified bit after
561 * tree-vect-slp.c (vect_create_constant_vectors): Simplify
562 by using vec_info::insert_seq_on_entry and bypassing
564 (vect_schedule_slp_instance): Deal with all-constant
567 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
568 Tom de Vries <tdevries@suse.de>
571 * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi
572 to access TYPE_SIZE (type). Return at least the mode's alignment.
574 2020-07-02 Richard Biener <rguenther@suse.de>
576 PR tree-optimization/96028
577 * tree-vect-slp.c (vect_slp_convert_to_external): Make sure
578 we have scalar stmts to use.
579 (vect_slp_analyze_node_operations): When analyzing a child
580 failed try externalizing the parent node.
582 2020-07-02 Martin Jambor <mjambor@suse.cz>
585 * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust
586 argument index if necessary.
588 2020-07-02 Martin Liska <mliska@suse.cz>
591 * tree-vect-generic.c (expand_vector_condition): Forward declaration.
592 (expand_vector_comparison): Do not expand a comparison if all
593 uses are consumed by a VEC_COND_EXPR.
594 (expand_vector_operation): Change void return type to bool.
595 (expand_vector_operations_1): Pass dce_ssa_names.
597 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com>
600 * system.h (NULL): Redefine to nullptr.
602 2020-07-02 Jakub Jelinek <jakub@redhat.com>
604 PR tree-optimization/95857
605 * tree-cfg.c (group_case_labels_stmt): When removing an unreachable
606 base_bb, remember all forced and non-local labels on it and later
607 treat those as if they have NULL label_to_block. Formatting fix.
610 2020-07-02 Richard Biener <rguenther@suse.de>
612 PR tree-optimization/96022
613 * tree-vect-stmts.c (vectorizable_shift): Only use the
614 first vector stmt when extracting the scalar shift amount.
615 * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary
616 nodes with all-scalar children from scalars but not stores.
617 (vect_analyze_slp_instance): Mark the node not failed.
619 2020-07-02 Felix Yang <felix.yang@huawei.com>
621 PR tree-optimization/95961
622 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the
623 number of scalars instead of the number of vectors as an upper bound
624 for the loop saving info about DR in the hash table. Remove unused
627 2020-07-02 Jakub Jelinek <jakub@redhat.com>
629 * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with
630 invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid
631 OpenMP non-rectangular loops. Use XALLOCAVEC.
633 2020-07-02 Martin Liska <mliska@suse.cz>
635 PR gcov-profile/95348
636 * coverage.c (read_counts_file): Read only COUNTERS that are
638 * gcov-dump.c (tag_function): Change signature from unsigned to
640 (tag_blocks): Likewise.
641 (tag_arcs): Likewise.
642 (tag_lines): Likewise.
643 (tag_counters): Likewise.
644 (tag_summary): Likewise.
645 * gcov.c (read_count_file): Read all non-zero counters
648 2020-07-02 Kito Cheng <kito.cheng@sifive.com>
650 * config/riscv/multilib-generator (arch_canonicalize): Handle
651 multi-letter extension.
652 Using underline as separator between different extensions.
654 2020-07-01 Pip Cet <pipcet@gmail.com>
656 * spellcheck.c (test_data): Add problematic strings.
657 (test_metric_conditions): Don't test the triangle inequality
658 condition, which our distance function does not satisfy.
660 2020-07-01 Omar Tahir <omar.tahir@arm.com>
662 * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always
663 generate a BTI instruction.
665 2020-07-01 Jeff Law <law@redhat.com>
667 PR tree-optimization/94882
668 * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification.
670 2020-07-01 Jeff Law <law@redhat.com>
672 * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword.
673 (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise.
675 2020-07-01 Andrea Corallo <andrea.corallo@arm.com>
677 * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums
678 for 64bits fpsr/fpcr getter setters builtin variants.
679 (aarch64_init_fpsr_fpcr_builtins): New function.
680 (aarch64_general_init_builtins): Modify to make use of the later.
681 (aarch64_expand_fpsr_fpcr_setter): New function.
682 (aarch64_general_expand_builtin): Modify to make use of the later.
683 * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>)
684 (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and
685 generalizing 'get_fpcr', 'set_fpsr'.
686 * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int
688 (fpscr_name): New int attribute.
689 * doc/extend.texi (__builtin_aarch64_get_fpcr64)
690 (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64)
691 (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in
694 2020-07-01 Martin Liska <mliska@suse.cz>
696 * gcov.c (print_usage): Avoid trailing space for -j option.
698 2020-07-01 Richard Biener <rguenther@suse.de>
700 PR tree-optimization/95839
701 * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing
702 vectors are not uniform.
703 (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of
705 (vect_build_slp_tree_2): For groups of lane extracts
706 from a vector register generate a permute node
707 with a special child representing the pre-existing vector.
708 (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing.
709 (vect_slp_analyze_node_operations): Use SLP_TREE_LANES.
710 (vectorizable_slp_permutation): Do not generate or cost identity
712 (vect_schedule_slp_instance): Handle pre-existing vector
713 that are function arguments.
715 2020-07-01 Richard Biener <rguenther@suse.de>
717 * system.h (INCLUDE_ISL): New guarded include.
718 * graphite-dependences.c: Use it.
719 * graphite-isl-ast-to-gimple.c: Likewise.
720 * graphite-optimize-isl.c: Likewise.
721 * graphite-poly.c: Likewise.
722 * graphite-scop-detection.c: Likewise.
723 * graphite-sese-to-poly.c: Likewise.
724 * graphite.c: Likewise.
725 * graphite.h: Drop the includes here.
727 2020-07-01 Martin Liska <mliska@suse.cz>
729 * gcov.c (print_usage): Shorted option description for -j
732 2020-07-01 Martin Liska <mliska@suse.cz>
734 * doc/gcov.texi: Rename 2 options.
735 * gcov.c (print_usage): Rename -i,--json-format to
736 -j,--json-format and -j,--human-readable to -H,--human-readable.
737 (process_args): Fix up parsing. Document obsolete options and
738 how are they changed.
740 2020-07-01 Jeff Law <law@redhat.com>
742 * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword.
743 (pa_output_ascii): Likewise.
745 2020-07-01 Kito Cheng <kito.cheng@sifive.com>
747 * common/config/riscv/riscv-common.c (riscv_subset_t): New field
749 (riscv_subset_list::parsing_subset_version): Add parameter for
750 indicate explicitly version, and handle explicitly version.
751 (riscv_subset_list::handle_implied_ext): Ditto.
752 (riscv_subset_list::add): Ditto.
753 (riscv_subset_t::riscv_subset_t): Init new field.
754 (riscv_subset_list::to_string): Always output version info if version
755 explicitly specified.
756 (riscv_subset_list::parsing_subset_version): Handle explicitly
758 (riscv_subset_list::parse_std_ext): Ditto.
759 (riscv_subset_list::parse_multiletter_ext): Ditto.
761 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
765 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
766 "Advanced SIMD type".
767 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
768 attributes are equal.
769 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
771 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
772 in the "Advanced SIMD type" attribute.
773 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
774 attribute to each Advanced SIMD type, using the mangled type
775 as the attribute's single argument.
777 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
780 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
781 -mgeneral-regs-only is not used.
783 2020-06-30 Yang Yang <yangyang305@huawei.com>
785 PR tree-optimization/95855
786 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
787 checks to recognize a missed if-conversion opportunity when
788 judging whether to duplicate a block.
790 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
792 * doc/extend.texi: Change references to "future architecture" to
793 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
794 references to "future" (because the future is now).
796 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
798 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
800 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
802 * simplify-rtx.c (simplify_distributive_operation): New function
803 to un-distribute a binary operation of two binary operations.
804 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
805 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
807 (test_scalar_int_ops): New function for unit self-testing
808 scalar integer transformations in simplify-rtx.c.
809 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
810 (simplify_rtx_c_tests): Call test_scalar_ops.
812 2020-06-29 Richard Biener <rguenther@suse.de>
814 PR tree-optimization/95916
815 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
816 the case of not vectorized externals.
818 2020-06-29 Richard Biener <rguenther@suse.de>
820 * tree-vectorizer.h: Do not include <utility>.
822 2020-06-29 Martin Liska <mliska@suse.cz>
824 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
825 instead of gimple_stmt_iterator::bb.
826 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
827 * tree-vectorizer.h: Likewise.
829 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
831 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
832 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
833 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
834 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
835 (gcn_dwarf_register_number): New function.
836 (gcn_dwarf_register_span): New function.
837 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
839 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
841 PR tree-optimization/95854
842 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
843 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
844 unsigned HOST_WIDE_INT.
846 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
848 * config/sparc/sparc.c (epilogue_renumber): Remove register.
849 (sparc_print_operand_address): Likewise.
850 (sparc_type_code): Likewise.
851 (set_extends): Likewise.
853 2020-06-29 Martin Liska <mliska@suse.cz>
855 PR tree-optimization/92860
856 * optc-save-gen.awk: Add exceptions for arc target.
858 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
860 * doc/sourcebuild.texi: Describe globbing of the
861 dump file scanning commands "suffix" argument.
863 2020-06-28 Martin Sebor <msebor@redhat.com>
866 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
868 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
870 * tree.c (get_nonnull_args): Consider the this pointer implicitly
872 * var-tracking.c (deps_vec): New type.
873 (var_loc_dep_vec): New function.
874 (VAR_LOC_DEP_VEC): Use it.
876 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
878 * internal-fn.c (direct_mask_load_optab_supported_p): Use
879 convert_optab_supported_p instead of direct_optab_supported_p.
880 (direct_mask_store_optab_supported_p): Likewise.
882 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
884 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
885 simplify_using_ranges class.
886 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
887 field. Adjust all methods to use new field.
888 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
889 simplify_using_ranges class.
890 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
891 field. Adjust all methods to use new field.
892 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
893 (vrp_prop::vrp_finalize): New vrp_folder argument.
894 (execute_vrp): Pass folder to vrp_finalize. Use
895 simplify_using_ranges class.
896 Remove cleanup_edges_and_switches call.
897 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
898 value_range_equiv uses to value_range.
899 (simplify_using_ranges::op_with_boolean_value_range_p): Use
900 simplify_using_ranges class.
901 (check_for_binary_op_overflow): Make static.
902 (vr_values::extract_range_basic): Pass this to
903 check_for_binary_op_overflow.
904 (compare_range_with_value): Change value_range_equiv uses to
906 (vr_values::vr_values): Initialize simplifier field.
907 Remove uses of to_remove_edges and to_update_switch_stmts.
908 (vr_values::~vr_values): Remove uses of to_remove_edges and
909 to_update_switch_stmts.
910 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
912 (vr_values::compare_name_with_value): Same.
913 (vr_values::compare_names): Same.
914 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
915 (vr_values::vrp_evaluate_conditional): Same.
916 (vr_values::vrp_visit_cond_stmt): Same.
917 (find_case_label_ranges): Change value_range_equiv uses to
919 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
920 (vr_values::simplify_truth_ops_using_ranges): Move to
921 simplify_using_ranges class.
922 (vr_values::simplify_div_or_mod_using_ranges): Same.
923 (vr_values::simplify_min_or_max_using_ranges): Same.
924 (vr_values::simplify_abs_using_ranges): Same.
925 (vr_values::simplify_bit_ops_using_ranges): Same.
926 (test_for_singularity): Change value_range_equiv uses to
928 (range_fits_type_p): Same.
929 (vr_values::simplify_cond_using_ranges_1): Same.
930 (vr_values::simplify_cond_using_ranges_2): Make extern.
931 (vr_values::fold_cond): Move to simplify_using_ranges class.
932 (vr_values::simplify_switch_using_ranges): Same.
933 (vr_values::cleanup_edges_and_switches): Same.
934 (vr_values::simplify_float_conversion_using_ranges): Same.
935 (vr_values::simplify_internal_call_using_ranges): Same.
936 (vr_values::two_valued_val_range_p): Same.
937 (vr_values::simplify_stmt_using_ranges): Move to...
938 (simplify_using_ranges::simplify): ...here.
939 * vr-values.h (class vr_values): Move all the simplification of
940 statements using ranges methods and code from here...
941 (class simplify_using_ranges): ...to here.
942 (simplify_cond_using_ranges_2): New extern prototype.
944 2020-06-27 Jakub Jelinek <jakub@redhat.com>
946 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
947 member, move outer member.
948 (struct omp_for_data): Add first_nonrect and last_nonrect members.
949 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
950 last_nonrect and non_rect_referenced members.
951 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
953 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
954 non-rectangular loops.
955 (extract_omp_for_update_vars): Likewise.
956 (expand_omp_for_generic, expand_omp_for_static_nochunk,
957 expand_omp_for_static_chunk, expand_omp_simd,
958 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
959 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
960 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
963 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
966 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
968 * config/i386/i386.c (ix86_frame_pointer_required): Update
971 2020-06-26 Yichao Yu <yyc1992@gmail.com>
973 * multiple_target.c (redirect_to_specific_clone): Fix tests
974 to check individual attribute rather than an attribute list.
976 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
978 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
979 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
982 2020-06-26 Marek Polacek <polacek@redhat.com>
984 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
985 * doc/standards.texi (C Language): Correct the default dialect.
986 (C++ Language): Update the default for C++ to gnu++17.
988 2020-06-26 Eric Botcazou <ebotcazou@gcc.gnu.org>
990 * tree-ssa-reassoc.c (dump_range_entry): New function.
991 (debug_range_entry): New debug function.
992 (update_range_test): Invoke dump_range_entry for dumping.
993 (optimize_range_tests_to_bit_test): Merge the entry test in the
994 bit test when possible and lower the profitability threshold.
996 2020-06-26 Richard Biener <rguenther@suse.de>
998 PR tree-optimization/95897
999 * tree-vectorizer.h (vectorizable_induction): Remove
1000 unused gimple_stmt_iterator * parameter.
1001 * tree-vect-loop.c (vectorizable_induction): Likewise.
1002 (vect_analyze_loop_operations): Adjust.
1003 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
1004 (vect_transform_stmt): Likewise.
1005 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
1006 for fold-left reductions, clarify existing reduction case.
1008 2020-06-25 Nick Clifton <nickc@redhat.com>
1010 * config/m32r/m32r.md (movsicc): Disable pattern.
1012 2020-06-25 Richard Biener <rguenther@suse.de>
1014 PR tree-optimization/95839
1015 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
1016 check on the number of datarefs.
1018 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
1020 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
1021 the insn_data n_operands value to unsigned.
1023 2020-06-25 Richard Biener <rguenther@suse.de>
1025 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
1026 vector defs to determine insertion place.
1028 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
1031 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
1032 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
1033 (PTA_TIGERLAKE): Add PTA_CLWB.
1035 2020-06-25 Richard Biener <rguenther@suse.de>
1037 PR tree-optimization/95866
1038 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
1039 vectorized shift operands. For scalar shifts use lane zero
1040 of a vectorized shift operand.
1042 2020-06-25 Martin Liska <mliska@suse.cz>
1044 PR tree-optimization/95745
1046 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
1047 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
1049 * tree-vect-generic.c (expand_vector_condition): Remove dead
1050 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
1052 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
1055 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
1056 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
1057 (convert_4f32_8f16): New define_expand
1058 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
1060 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
1061 overloaded builtin entry.
1062 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
1063 (vsx_xvcvsphp): New define_insn.
1065 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
1066 Segher Boessenkool <segher@kernel.crashing.org>
1068 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
1070 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
1072 * simplify-rtx.c (simplify_unary_operation_1): Simplify
1073 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
1075 2020-06-24 Richard Biener <rguenther@suse.de>
1077 PR tree-optimization/95866
1078 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
1079 (vect_build_slp_tree_2): Properly reset matches[0],
1080 ignore uniform constants.
1082 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
1085 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
1086 (cpu_indicator_init): Likewise.
1087 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
1089 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
1092 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
1093 detection with AVX512BF16.
1095 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
1098 * common/config/i386/i386-isas.h: New file. Extracted from
1099 gcc/config/i386/i386-builtins.c.
1100 (_isa_names_table): Add option.
1101 (ISA_NAMES_TABLE_START): New.
1102 (ISA_NAMES_TABLE_END): Likewise.
1103 (ISA_NAMES_TABLE_ENTRY): Likewise.
1104 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
1105 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
1106 from enum processor_features.
1107 * config/i386/driver-i386.c: Include
1108 "common/config/i386/cpuinfo.h" and
1109 "common/config/i386/i386-isas.h".
1110 (has_feature): New macro.
1111 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
1112 features. Use has_feature to detect processor features. Call
1113 Call get_intel_cpu to get the newer Intel CPU name. Use
1114 isa_names_table to generate command-line options.
1115 * config/i386/i386-builtins.c: Include
1116 "common/config/i386/i386-isas.h".
1117 (_arch_names_table): Removed.
1118 (isa_names_table): Likewise.
1120 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
1123 * common/config/i386/cpuinfo.h: New file.
1124 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
1125 (__processor_model2): New.
1126 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
1127 (has_cpu_feature): New function.
1128 (set_cpu_feature): Likewise.
1129 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
1130 CHECK___builtin_cpu_is. Return AMD CPU name.
1131 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
1132 Use CHECK___builtin_cpu_is. Return Intel CPU name.
1133 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
1134 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
1135 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
1136 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
1137 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
1138 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
1139 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
1140 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
1141 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
1142 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
1143 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
1144 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
1145 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
1146 FEATURE_XSAVEOPT and FEATURE_XSAVES
1147 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
1148 Also update cpu_model2.
1149 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
1150 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
1151 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
1152 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
1153 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
1154 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
1155 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
1156 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
1157 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
1158 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
1159 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
1160 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
1161 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
1162 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
1163 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
1164 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
1165 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
1166 (SIZE_OF_CPU_FEATURES): New.
1167 * config/i386/i386-builtins.c (processor_features): Removed.
1168 (isa_names_table): Replace F_XXX with FEATURE_XXX.
1169 (fold_builtin_cpu): Change __cpu_features2 to an array.
1171 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
1174 * common/config/i386/i386-common.c (processor_alias_table): Add
1175 processor model and priority to each entry.
1176 (pta_size): Updated with -6.
1177 (num_arch_names): New.
1178 * common/config/i386/i386-cpuinfo.h: New file.
1179 * config/i386/i386-builtins.c (feature_priority): Removed.
1180 (processor_model): Likewise.
1181 (_arch_names_table): Likewise.
1182 (arch_names_table): Likewise.
1183 (_isa_names_table): Replace P_ZERO with P_NONE.
1184 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
1185 processor_alias_table.
1186 (fold_builtin_cpu): Replace arch_names_table with
1187 processor_alias_table.
1188 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
1189 (pta): Add model and priority.
1190 (num_arch_names): New.
1192 2020-06-24 Richard Biener <rguenther@suse.de>
1194 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
1196 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
1197 Simplify for new position of vectorized SLP loads.
1198 (vect_slp_analyze_node_dependences): Adjust for it.
1199 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
1200 for the first stmts dataref.
1201 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
1202 (vect_schedule_slp_instance): Emit loads before the
1204 * tree-vect-stmts.c (vectorizable_load): Do what the comment
1205 says and use vect_find_first_scalar_stmt_in_slp.
1207 2020-06-24 Richard Biener <rguenther@suse.de>
1209 PR tree-optimization/95856
1210 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
1213 2020-06-24 Jakub Jelinek <jakub@redhat.com>
1216 * fold-const.c (fold_cond_expr_with_comparison): Optimize
1217 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
1219 2020-06-24 Jakub Jelinek <jakub@redhat.com>
1221 * omp-low.c (lower_omp_for): Fix two pastos.
1223 2020-06-24 Martin Liska <mliska@suse.cz>
1225 * optc-save-gen.awk: Compare string options in cl_optimization_compare
1228 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
1230 * config.gcc: Identify power10 as a 64-bit processor and as valid
1231 for --with-cpu and --with-tune.
1233 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
1235 * Makefile.in (LANG_MAKEFRAGS): Same.
1236 (tmake_file): Use -include.
1239 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
1241 * REVISION: Delete file meant for a private branch.
1243 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
1246 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
1247 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
1249 2020-06-23 Alexandre Oliva <oliva@adacore.com>
1251 * collect-utils.h (dumppfx): New.
1252 * collect-utils.c (dumppfx): Likewise.
1253 * lto-wrapper.c (run_gcc): Set global dumppfx.
1254 (compile_offload_image): Pass a -dumpbase on to mkoffload.
1255 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
1256 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
1258 (compile_native): Pass -dumpbase et al to compiler.
1259 * config/gcn/mkoffload.c (gcn_dumpbase): New.
1260 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
1261 save_temps. Pass -dumpbase et al to offload target compiler.
1262 (compile_native): Pass -dumpbase et al to compiler.
1264 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
1266 * REVISION: New file.
1268 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
1270 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
1271 Update comment for ISA 3.1.
1272 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
1273 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
1274 on AIX, and -mpower10 elsewhere.
1275 * config/rs6000/future.md: Delete.
1276 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
1278 * config/rs6000/power10.md: New file.
1279 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
1280 PPC_PLATFORM_FUTURE.
1281 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
1282 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
1283 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
1284 Use BU_P10_* instead of BU_FUTURE_*.
1285 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
1286 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
1287 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
1288 FUTURE_BUILTIN_VEC_XXEVAL.
1289 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
1290 Update compiler messages.
1291 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
1292 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
1293 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
1295 * config/rs6000/rs6000-string.c: Ditto.
1296 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
1297 instead of "future", reorder it to right after "power9".
1298 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
1299 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
1300 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
1301 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
1302 not ISA_FUTURE_MASKS_SERVER.
1303 (rs6000_opt_masks): Use "power10" instead of "future".
1304 (rs6000_builtin_mask_names): Ditto.
1305 (rs6000_disable_incompatible_switches): Ditto.
1306 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
1307 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
1308 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
1309 not RS6000_BTM_FUTURE.
1310 * config/rs6000/rs6000.md: Use "power10", not "future". Use
1311 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
1313 * config/rs6000/rs6000.opt (mfuture): Delete.
1315 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
1316 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
1318 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
1320 * coretypes.h (first_type): Delete.
1321 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
1323 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1325 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
1326 (arm_mve_hw): Likewise.
1328 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
1331 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
1334 2020-06-22 Richard Biener <rguenther@suse.de>
1336 PR tree-optimization/95770
1337 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
1340 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
1342 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
1343 (gcn_return_in_memory): Return vectors in memory.
1345 2020-06-22 Jakub Jelinek <jakub@redhat.com>
1347 * omp-general.c (omp_extract_for_data): For triangular loops with
1348 all loop invariant expressions constant where the innermost loop is
1349 executed at least once compute number of iterations at compile time.
1351 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
1353 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
1354 (DRIVER_SELF_SPECS): New.
1356 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
1358 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
1359 (RISCV_FTYPE_ATYPES0): New.
1360 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
1361 * config/riscv/riscv-ftypes.def: Remove VOID argument.
1363 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
1365 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
1366 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
1369 (ASM_CPU_SPEC): Remove vsx and altivec options.
1370 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
1373 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
1374 (TARGET_DEFAULT): Only define if not BIARCH.
1375 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
1378 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
1381 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
1382 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
1384 (CPLUSPLUS_CPP_SPEC): Same.
1387 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
1388 * config/rs6000/defaultaix64.h: New file.
1389 * config/rs6000/t-aix64: New file.
1391 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
1393 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
1394 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
1395 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
1397 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
1398 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
1399 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
1400 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
1401 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
1402 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
1403 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
1404 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
1405 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
1406 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
1407 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
1408 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
1409 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
1410 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
1411 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
1412 Allow zero constants.
1413 (print_operand) <case 'A'>: New output modifier.
1414 (rs6000_split_multireg_move): Add support for inserting accumulator
1415 priming and depriming instructions. Add support for splitting an
1416 assemble accumulator pattern.
1417 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
1418 rs6000_gimple_fold_mma_builtin): New functions.
1419 (RS6000_BUILTIN_M): New macro.
1420 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
1421 (bdesc_mma): Add new MMA built-in support.
1422 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
1423 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
1425 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
1426 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
1427 and rs6000_gimple_fold_mma_builtin.
1428 (rs6000_expand_builtin): Call mma_expand_builtin.
1429 Use RS6000_BTC_OPND_MASK.
1430 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
1431 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
1432 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
1433 VSX_BUILTIN_XVCVBF16SP.
1434 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
1435 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
1436 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
1437 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
1438 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
1439 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
1440 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
1441 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
1442 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
1443 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
1444 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
1445 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
1446 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
1447 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
1448 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
1449 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
1450 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
1451 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
1452 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
1453 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
1454 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
1455 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
1456 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
1457 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
1458 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
1459 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
1460 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
1461 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
1462 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
1463 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
1464 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
1465 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
1466 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
1467 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
1468 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
1469 MMA_AVVI4I4I4): New define_int_iterator.
1470 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
1471 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
1472 avvi4i4i4): New define_int_attr.
1473 (*movpxi): Add zero constant alternative.
1474 (mma_assemble_pair, mma_assemble_acc): New define_expand.
1475 (*mma_assemble_acc): New define_insn_and_split.
1476 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
1477 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
1478 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
1479 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
1480 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
1481 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
1482 (UNSPEC_VSX_XVCVSPBF16): Likewise.
1483 (XVCVBF16): New define_int_iterator.
1484 (xvcvbf16): New define_int_attr.
1485 (vsx_<xvcvbf16>): New define_insn.
1486 * doc/extend.texi: Document the mma built-ins.
1488 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
1489 Michael Meissner <meissner@linux.ibm.com>
1491 * config/rs6000/mma.md: New file.
1492 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
1494 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
1495 for __vector_pair and __vector_quad types.
1496 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
1498 (POWERPC_MASKS): Likewise.
1499 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
1500 (POI, PXI): New partial integer modes.
1501 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
1502 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
1503 (rs6000_hard_regno_mode_ok_uncached): Likewise.
1504 Add support for POImode being allowed in VSX registers and PXImode
1505 being allowed in FP registers.
1506 (rs6000_modes_tieable_p): Adjust comment.
1507 Add support for POImode and PXImode.
1508 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
1509 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
1510 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
1511 Set up appropriate addr_masks for vector pair and vector quad addresses.
1512 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
1513 vector quad registers. Setup reload handlers for POImode and PXImode.
1514 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
1515 (rs6000_option_override_internal): Error if -mmma is specified
1516 without -mcpu=future.
1517 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
1518 (quad_address_p): Change size test to less than 16 bytes.
1519 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
1520 and vector quad instructions.
1521 (avoiding_indexed_address_p): Likewise.
1522 (rs6000_emit_move): Disallow POImode and PXImode moves involving
1524 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
1525 and FP registers for PXImode.
1526 (rs6000_split_multireg_move): Support splitting POImode and PXImode
1528 (rs6000_mangle_type): Adjust comment. Add support for mangling
1529 __vector_pair and __vector_quad types.
1530 (rs6000_opt_masks): Add entry for mma.
1531 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
1532 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
1533 (address_to_insn_form): Likewise.
1534 (reg_to_non_prefixed): Likewise.
1535 (rs6000_invalid_conversion): New function.
1536 * config/rs6000/rs6000.h (MASK_MMA): Define.
1537 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
1538 (VECTOR_ALIGNMENT_P): New helper macro.
1539 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
1540 (RS6000_BTM_MMA): Define.
1541 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
1542 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
1543 RS6000_BTI_vector_quad.
1544 (vector_pair_type_node): New.
1545 (vector_quad_type_node): New.
1546 * config/rs6000/rs6000.md: Include mma.md.
1547 (define_mode_iterator RELOAD): Add POI and PXI.
1548 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
1549 * config/rs6000/rs6000.opt (-mmma): New.
1550 * doc/invoke.texi: Document -mmma.
1552 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
1554 PR tree-optimization/95638
1555 * tree-loop-distribution.c (pg_edge_callback_data): New field.
1556 (loop_distribution::break_alias_scc_partitions): Record and restore
1557 postorder information. Fix memory leak.
1559 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
1561 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
1562 (output_file_start): Use const 'char *'.
1564 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
1566 PR tree-optimization/94880
1567 * match.pd (A | B) - B -> (A & ~B): New simplification.
1569 2020-06-19 Richard Biener <rguenther@suse.de>
1571 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
1572 for lane permutations.
1574 2020-06-19 Richard Biener <rguenther@suse.de>
1576 PR tree-optimization/95761
1577 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
1578 vectorized stmts for finding the last one.
1580 2020-06-18 Felix Yang <felix.yang@huawei.com>
1582 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
1583 vect_relevant_for_alignment_p to filter out data references in
1584 the loop whose alignment is irrelevant when trying loop peeling
1587 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
1589 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
1590 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
1591 mode iterator for the first operand of ZERO_EXTRACT RTX.
1592 Change ext_register_operand predicate to register_operand.
1593 Rename from *cmpqi_ext_1.
1594 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
1595 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
1596 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
1597 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
1598 (*extv<mode>): Use SWI24 mode iterator for the first operand
1599 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
1600 to register_operand.
1601 (*extzv<mode>): Use SWI248 mode iterator for the first operand
1602 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
1603 to register_operand.
1604 (*extzvqi): Use SWI248 mode iterator instead of SImode for
1605 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
1606 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
1608 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
1609 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
1610 mode iterator for the first operand of ZERO_EXTRACT RTX.
1611 Change ext_register_operand predicate to register_operand.
1612 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
1613 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
1615 (*insvqi_1): Use SWI248 mode iterator instead of SImode
1616 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
1617 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
1618 predicate to register_operand.
1621 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
1622 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
1623 mode iterator for the first operand of ZERO_EXTRACT RTX.
1624 Change ext_register_operand predicate to register_operand.
1625 (addqi_ext_1): New expander.
1626 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
1627 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
1628 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
1629 to register_operand. Rename from *addqi_ext_1.
1630 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
1631 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
1632 (udivmodqi4): Ditto.
1633 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
1634 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
1635 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
1636 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
1637 to register_operand. Rename from *testqi_ext_1.
1638 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
1639 (andqi_ext_1): New expander.
1640 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
1641 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
1642 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
1643 to register_operand. Rename from andqi_ext_1.
1644 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
1645 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
1646 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
1647 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
1648 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
1649 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
1650 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
1651 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
1652 to register_operand. Rename from *xorqi_ext_1_cc.
1653 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
1654 in mode, matching its first operand.
1655 (promote_duplicated_reg): Update for renamed insv<mode>_1.
1656 * config/i386/predicates.md (ext_register_operand): Remove predicate.
1658 2020-06-18 Martin Sebor <msebor@redhat.com>
1662 * builtins.c (compute_objsize): Remove call to
1663 compute_builtin_object_size and instead compute conservative sizes
1666 2020-06-18 Martin Liska <mliska@suse.cz>
1668 * coretypes.h (struct iterator_range): New type.
1669 * tree-vect-patterns.c (vect_determine_precisions): Use
1670 range-based iterator.
1671 (vect_pattern_recog): Likewise.
1672 * tree-vect-slp.c (_bb_vec_info): Likewise.
1673 (_bb_vec_info::~_bb_vec_info): Likewise.
1674 (vect_slp_check_for_constructors): Likewise.
1675 * tree-vectorizer.h:Add new iterators
1676 and functions that use it.
1678 2020-06-18 Martin Liska <mliska@suse.cz>
1680 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
1681 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
1682 of a VEC_COND_EXPR cannot be tcc_comparison and so that
1683 a SSA_NAME needs to be created before we use it for the first
1684 argument of the VEC_COND_EXPR.
1685 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
1687 2020-06-18 Richard Biener <rguenther@suse.de>
1690 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
1691 to the target if necessary.
1692 (expand_vect_cond_mask_optab_fn): Likewise.
1694 2020-06-18 Martin Liska <mliska@suse.cz>
1696 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
1697 vcond as we check for NULL pointer.
1699 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
1701 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
1702 silence empty-body warning with gcc_fallthrough.
1704 2020-06-18 Jakub Jelinek <jakub@redhat.com>
1706 PR tree-optimization/95699
1707 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
1708 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
1709 declarations to the statements that set them where possible.
1711 2020-06-18 Jakub Jelinek <jakub@redhat.com>
1714 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
1715 scalar mode halfvectype other than vector boolean for
1716 VEC_PACK_TRUNC_EXPR.
1718 2020-06-18 Richard Biener <rguenther@suse.de>
1720 * varasm.c (assemble_variable): Make sure to not
1721 defer output when outputting addressed constants.
1722 (output_constant_def_contents): Likewise.
1723 (add_constant_to_table): Take and pass on whether to
1725 (output_addressed_constants): Likewise.
1726 (output_constant_def): Pass on whether to defer output
1727 to add_constant_to_table.
1728 (tree_output_constant_def): Defer output of constants.
1730 2020-06-18 Richard Biener <rguenther@suse.de>
1732 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
1733 (_slp_tree::lane_permutation): New member.
1734 (_slp_tree::code): Likewise.
1735 (SLP_TREE_TWO_OPERATORS): Remove.
1736 (SLP_TREE_LANE_PERMUTATION): New.
1737 (SLP_TREE_CODE): Likewise.
1738 (vect_stmt_dominates_stmt_p): Declare.
1739 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
1740 * tree-vect-stmts.c (vect_model_simple_cost): Remove
1741 SLP_TREE_TWO_OPERATORS handling.
1742 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
1743 (_slp_tree::~_slp_tree): Likewise.
1744 (vect_two_operations_perm_ok_p): Remove.
1745 (vect_build_slp_tree_1): Remove verification of two-operator
1747 (vect_build_slp_tree_2): When we have two different operators
1748 build two computation SLP nodes and a blend.
1749 (vect_print_slp_tree): Print the lane permutation if it exists.
1750 (slp_copy_subtree): Copy it.
1751 (vect_slp_rearrange_stmts): Re-arrange it.
1752 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
1753 VEC_PERM_EXPR explicitely.
1754 (vect_schedule_slp_instance): Likewise. Remove old
1755 SLP_TREE_TWO_OPERATORS code.
1756 (vectorizable_slp_permutation): New function.
1758 2020-06-18 Martin Liska <mliska@suse.cz>
1760 * tree-vect-generic.c (expand_vector_condition): Check
1761 for gassign before inspecting RHS.
1763 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
1765 * gimplify.c (omp_notice_threadprivate_variable)
1766 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
1767 diagnostic. Adjust all users.
1769 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
1771 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
1772 NULL_TREE' check earlier.
1774 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
1776 * doc/extend.texi (attribute access): Fix a typo.
1778 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
1779 Kaipeng Zhou <zhoukaipeng3@huawei.com>
1781 PR tree-optimization/95199
1782 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
1783 strided load/store operations and remove redundant code.
1785 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
1787 * coretypes.h (first_type): New alias template.
1788 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
1789 Remove spurious “...” and split the function type out into a typedef.
1791 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
1793 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
1796 2020-06-17 Richard Biener <rguenther@suse.de>
1798 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
1799 in *vectype parameter.
1800 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
1801 vect_build_slp_tree_1 computed.
1802 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
1803 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
1804 (vect_schedule_slp_instance): Likewise.
1805 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
1806 from SLP_TREE_VECTYPE.
1808 2020-06-17 Richard Biener <rguenther@suse.de>
1810 PR tree-optimization/95717
1811 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
1812 Move BB SSA updating before exit/latch PHI current def copying.
1814 2020-06-17 Martin Liska <mliska@suse.cz>
1816 * Makefile.in: Add new file.
1817 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
1818 not meet this condition.
1819 (do_store_flag): Likewise.
1820 * gimplify.c (gimplify_expr): Gimplify first argument of
1821 VEC_COND_EXPR to be a SSA name.
1822 * internal-fn.c (vec_cond_mask_direct): New.
1823 (vec_cond_direct): Likewise.
1824 (vec_condu_direct): Likewise.
1825 (vec_condeq_direct): Likewise.
1826 (expand_vect_cond_optab_fn): New.
1827 (expand_vec_cond_optab_fn): Likewise.
1828 (expand_vec_condu_optab_fn): Likewise.
1829 (expand_vec_condeq_optab_fn): Likewise.
1830 (expand_vect_cond_mask_optab_fn): Likewise.
1831 (expand_vec_cond_mask_optab_fn): Likewise.
1832 (direct_vec_cond_mask_optab_supported_p): Likewise.
1833 (direct_vec_cond_optab_supported_p): Likewise.
1834 (direct_vec_condu_optab_supported_p): Likewise.
1835 (direct_vec_condeq_optab_supported_p): Likewise.
1836 * internal-fn.def (VCOND): New OPTAB.
1838 (VCONDEQ): Likewise.
1839 (VCOND_MASK): Likewise.
1840 * optabs.c (get_rtx_code): Make it global.
1841 (expand_vec_cond_mask_expr): Removed.
1842 (expand_vec_cond_expr): Removed.
1843 * optabs.h (expand_vec_cond_expr): Likewise.
1844 (vector_compare_rtx): Make it global.
1845 * passes.def: Add new pass_gimple_isel pass.
1846 * tree-cfg.c (verify_gimple_assign_ternary): Add check
1847 for VEC_COND_EXPR about first argument.
1848 * tree-pass.h (make_pass_gimple_isel): New.
1849 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
1850 propagation of the first argument of a VEC_COND_EXPR.
1851 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
1852 first argument of a VEC_COND_EXPR.
1853 (optimize_vec_cond_expr): Likewise.
1854 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
1855 for a first argument of created VEC_COND_EXPR.
1856 (expand_vector_condition): Fix coding style.
1857 * tree-vect-stmts.c (vectorizable_condition): Gimplify
1859 * gimple-isel.cc: New file.
1861 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
1863 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
1864 (BSS_SECTION_ASM_OP): Use ".bss".
1865 (ASM_SPEC): Remove "-mattr=-code-object-v3".
1866 (LINK_SPEC): Add "--export-dynamic".
1867 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
1868 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
1869 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
1870 (load_image): Remove obsolete relocation handling.
1871 Add ".kd" suffix to the symbol names.
1872 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
1873 (gcn_option_override): Update gcn_isa test.
1874 (gcn_kernel_arg_types): Update all the assembler directives.
1875 Remove the obsolete options.
1876 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
1877 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
1879 (output_file_start): Rework assembler file header.
1880 (gcn_hsa_declare_function_name): Rework kernel metadata.
1881 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
1882 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
1883 (PROCESSOR_VEGA10): New enum value.
1884 (PROCESSOR_VEGA20): New enum value.
1886 2020-06-17 Martin Liska <mliska@suse.cz>
1888 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
1890 * gcov-tool.c (print_version): Likewise.
1891 * gcov.c (print_version): Likewise.
1893 2020-06-17 liuhongt <hongtao.liu@intel.com>
1896 * config/i386/i386-expand.c
1897 (ix86_expand_vec_shift_qihi_constant): New function.
1898 * config/i386/i386-protos.h
1899 (ix86_expand_vec_shift_qihi_constant): Declare.
1900 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
1901 V*QImode by constant.
1903 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
1905 PR tree-optimization/95649
1906 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
1907 value is a constant.
1909 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1911 * config.in: Regenerate.
1912 * config/s390/s390.c (print_operand): Emit vector alignment hints
1913 for target z13, if AS accepts them. For other targets the logic
1915 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
1917 * configure: Regenerate.
1918 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
1920 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1922 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
1924 (__arm_vaddq_m_n_s32): Likewise.
1925 (__arm_vaddq_m_n_s16): Likewise.
1926 (__arm_vaddq_m_n_u8): Likewise.
1927 (__arm_vaddq_m_n_u32): Likewise.
1928 (__arm_vaddq_m_n_u16): Likewise.
1929 (__arm_vaddq_m): Modify polymorphic variant.
1931 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1933 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
1934 and constraint of all the operands.
1935 (mve_sqrshrl_sat<supf>_di): Likewise.
1936 (mve_uqrshl_si): Likewise.
1937 (mve_sqrshr_si): Likewise.
1938 (mve_uqshll_di): Likewise.
1939 (mve_urshrl_di): Likewise.
1940 (mve_uqshl_si): Likewise.
1941 (mve_urshr_si): Likewise.
1942 (mve_sqshl_si): Likewise.
1943 (mve_srshr_si): Likewise.
1944 (mve_srshrl_di): Likewise.
1945 (mve_sqshll_di): Likewise.
1946 * config/arm/predicates.md (arm_low_register_operand): Define.
1948 2020-06-16 Jakub Jelinek <jakub@redhat.com>
1950 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
1951 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
1952 or dist_schedule clause on non-rectangular loops. Handle
1953 gimplification of non-rectangular lb/b expressions. When changing
1954 iteration variable, adjust also non-rectangular lb/b expressions
1956 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
1958 (struct omp_for_data): Add non_rect member.
1959 * omp-general.c (omp_extract_for_data): Handle non-rectangular
1960 loops. Fill in non_rect, m1, m2 and outer.
1961 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
1962 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
1963 non-rectangular loop cases and assert for cases that can't be
1965 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
1966 (dump_omp_loop_non_rect_expr): New function.
1967 (dump_generic_node): Handle non-rectangular OpenMP loops.
1968 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
1969 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
1972 2020-06-16 Richard Biener <rguenther@suse.de>
1975 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
1977 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
1980 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
1981 assertion and turn it into a early exit check.
1983 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
1985 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
1986 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
1987 true and all elements are zero, then always clear. Return GS_ERROR
1988 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
1989 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
1990 the type is aggregate non-addressable, ask gimplify_init_constructor
1991 whether it can generate a single access to the target.
1993 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
1995 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
1996 access on the LHS is replaced with a scalar access, propagate the
1997 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
1999 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
2001 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
2002 TARGET_THREADPTR reference.
2003 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
2004 targetm.have_tls instead of TARGET_HAVE_TLS.
2005 (xtensa_option_override): Set targetm.have_tls to false in
2006 configurations without THREADPTR.
2008 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
2010 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
2012 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
2013 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
2014 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
2015 xtensa_windowed_abi if needed.
2016 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
2018 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
2019 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
2021 (mabi=call0, mabi=windowed): New options.
2022 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
2024 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
2026 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
2027 (TARGET_CAN_ELIMINATE): New macro.
2028 * config/xtensa/xtensa.h
2029 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
2030 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
2031 (HARD_FRAME_POINTER_REGNUM): Define using
2032 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
2033 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
2034 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
2035 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
2037 2020-06-15 Felix Yang <felix.yang@huawei.com>
2039 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
2040 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
2042 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
2044 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
2045 LOOP_VINFO_DATAREFS when possible.
2046 (update_epilogue_loop_vinfo): Likewise.
2048 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
2050 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
2052 (riscv_gpr_save_operation_p): Change type to unsigned for i and
2055 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
2058 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
2060 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
2061 * config/i386/sse.md (mul<mode>3): Drop mask_name since
2062 there's no real simd int8 multiplication instruction with
2063 mask. Also optimize it under TARGET_AVX512BW.
2064 (mulv8qi3): New expander.
2066 2020-06-12 Marco Elver <elver@google.com>
2068 * gimplify.c (gimplify_function_tree): Optimize and do not emit
2069 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
2070 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
2071 * tsan.c (instrument_memory_accesses): Make
2072 fentry_exit_instrument bool depend on new param.
2074 2020-06-12 Felix Yang <felix.yang@huawei.com>
2076 PR tree-optimization/95570
2077 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
2078 (vect_verify_datarefs_alignment): Call it to filter out data references
2079 in the loop whose alignment is irrelevant.
2080 (vect_get_peeling_costs_all_drs): Likewise.
2081 (vect_peeling_supportable): Likewise.
2082 (vect_enhance_data_refs_alignment): Likewise.
2084 2020-06-12 Richard Biener <rguenther@suse.de>
2086 PR tree-optimization/95633
2087 * tree-vect-stmts.c (vectorizable_condition): Properly
2088 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
2090 2020-06-12 Martin Liška <mliska@suse.cz>
2092 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
2093 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
2095 * lto-wrapper.c (merge_and_complain): Wrap option names.
2097 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
2099 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
2100 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
2101 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
2102 (vect_set_loop_condition_masked): Renamed to ...
2103 (vect_set_loop_condition_partial_vectors): ... this. Rename
2104 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
2105 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
2106 (vect_set_loop_condition_unmasked): Renamed to ...
2107 (vect_set_loop_condition_normal): ... this.
2108 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
2109 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
2110 to vect_set_loop_condition_partial_vectors.
2111 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
2112 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
2113 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
2115 (vect_analyze_loop_costing): ... this.
2116 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
2118 (vect_min_prec_for_max_niters): New, factored out from ...
2119 (vect_verify_full_masking): ... this. Rename
2120 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
2121 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
2122 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
2123 (vectorizable_reduction): Update some dumpings with partial
2124 vectors instead of fully-masked.
2125 (vectorizable_live_operation): Likewise.
2126 (vect_iv_limit_for_full_masking): Renamed to ...
2127 (vect_iv_limit_for_partial_vectors): ... this.
2128 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
2129 (check_load_store_for_partial_vectors): ... this. Update some
2130 dumpings with partial vectors instead of fully-masked.
2131 (vectorizable_store): Rename check_load_store_masking to
2132 check_load_store_for_partial_vectors.
2133 (vectorizable_load): Likewise.
2134 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
2135 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
2136 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
2137 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
2138 (vect_iv_limit_for_full_masking): Renamed to ...
2139 (vect_iv_limit_for_partial_vectors): this.
2140 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
2141 Rename iv_type to rgroup_iv_type.
2143 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
2145 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
2146 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
2147 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
2148 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
2149 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
2150 (insn_gen_fn::operator()): Replace overloaded definitions with
2151 a parameter-pack version.
2153 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
2156 * config/i386/i386-features.c (rest_of_insert_endbranch):
2158 (rest_of_insert_endbr_and_patchable_area): Change return type
2159 to void. Add need_endbr and patchable_area_size arguments.
2160 Don't call timevar_push nor timevar_pop. Replace
2161 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
2162 UNSPECV_PATCHABLE_AREA for patchable area.
2163 (pass_data_insert_endbranch): Renamed to ...
2164 (pass_data_insert_endbr_and_patchable_area): This. Change
2165 pass name to endbr_and_patchable_area.
2166 (pass_insert_endbranch): Renamed to ...
2167 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
2168 and patchable_area_size;.
2169 (pass_insert_endbr_and_patchable_area::gate): Set and check
2170 need_endbr and patchable_area_size.
2171 (pass_insert_endbr_and_patchable_area::execute): Call
2172 timevar_push and timevar_pop. Pass need_endbr and
2173 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
2174 (make_pass_insert_endbranch): Renamed to ...
2175 (make_pass_insert_endbr_and_patchable_area): This.
2176 * config/i386/i386-passes.def: Replace pass_insert_endbranch
2177 with pass_insert_endbr_and_patchable_area.
2178 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
2179 (make_pass_insert_endbranch): Renamed to ...
2180 (make_pass_insert_endbr_and_patchable_area): This.
2181 * config/i386/i386.c (ix86_asm_output_function_label): Set
2182 function_label_emitted to true.
2183 (ix86_print_patchable_function_entry): New function.
2184 (ix86_output_patchable_area): Likewise.
2185 (x86_function_profiler): Replace endbr_queued_at_entrance with
2186 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
2187 Call ix86_output_patchable_area to generate patchable area if
2189 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
2190 * config/i386/i386.h (queued_insn_type): New.
2191 (machine_function): Add function_label_emitted. Replace
2192 endbr_queued_at_entrance with insn_queued_at_entrance.
2193 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
2194 (patchable_area): New.
2196 2020-06-11 Martin Liska <mliska@suse.cz>
2198 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
2201 2020-06-11 Martin Liska <mliska@suse.cz>
2204 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
2207 2020-06-11 Martin Liska <mliska@suse.cz>
2208 Jakub Jelinek <jakub@redhat.com>
2211 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
2212 by using Pmode instead of ptr_mode.
2214 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
2216 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
2217 (vect_set_loop_control): ... this.
2218 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
2219 (vect_set_loop_masks_directly): Renamed to ...
2220 (vect_set_loop_controls_directly): ... this. Also rename some
2221 variables with ctrl instead of mask. Rename vect_set_loop_mask to
2222 vect_set_loop_control.
2223 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
2224 Also rename some variables with ctrl instead of mask.
2225 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
2226 (release_vec_loop_controls): ... this. Rename rgroup_masks related
2228 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
2229 release_vec_loop_controls.
2230 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
2231 (vect_get_max_nscalars_per_iter): Likewise.
2232 (vect_estimate_min_profitable_iters): Likewise.
2233 (vect_record_loop_mask): Likewise.
2234 (vect_get_loop_mask): Likewise.
2235 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
2236 (struct rgroup_controls): ... this. Also rename mask_type
2237 to type and rename masks to controls.
2239 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
2241 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
2242 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
2243 (vect_gen_vector_loop_niters): Likewise.
2244 (vect_do_peeling): Likewise.
2245 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
2246 fully_masked_p to using_partial_vectors_p.
2247 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
2248 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
2249 (determine_peel_for_niter): Likewise.
2250 (vect_estimate_min_profitable_iters): Likewise.
2251 (vect_transform_loop): Likewise.
2252 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
2253 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
2255 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
2257 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
2258 can_fully_mask_p to can_use_partial_vectors_p.
2259 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
2260 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
2261 to saved_can_use_partial_vectors_p.
2262 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
2263 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
2264 (vectorizable_live_operation): Likewise.
2265 * tree-vect-stmts.c (permute_vec_elements): Likewise.
2266 (check_load_store_masking): Likewise.
2267 (vectorizable_operation): Likewise.
2268 (vectorizable_store): Likewise.
2269 (vectorizable_load): Likewise.
2270 (vectorizable_condition): Likewise.
2271 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
2272 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
2273 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
2275 2020-06-11 Martin Liska <mliska@suse.cz>
2277 * optc-save-gen.awk: Quote error string.
2279 2020-06-11 Alexandre Oliva <oliva@adacore.com>
2281 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
2283 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
2285 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
2286 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
2288 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
2289 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
2291 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
2293 * config/riscv/predicates.md (gpr_save_operation): New.
2294 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
2295 (riscv_gpr_save_operation_p): Ditto.
2296 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
2297 Ignore USEs for gpr_save patter.
2298 * config/riscv/riscv.c (gpr_save_reg_order): New.
2299 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
2300 (riscv_gen_gpr_save_insn): New.
2301 (riscv_gpr_save_operation_p): Ditto.
2302 * config/riscv/riscv.md (S3_REGNUM): New.
2309 (S10_REGNUM): Ditto.
2310 (S11_REGNUM): Ditto.
2311 (gpr_save): Model USEs correctly.
2313 2020-06-10 Martin Sebor <msebor@redhat.com>
2317 * builtins.c (inform_access): New function.
2318 (check_access): Call it. Add argument.
2319 (addr_decl_size): Remove.
2320 (get_range): New function.
2321 (compute_objsize): New overload. Only use compute_builtin_object_size
2322 with raw memory function.
2323 (check_memop_access): Pass new argument to compute_objsize and
2325 (expand_builtin_memchr, expand_builtin_strcat): Same.
2326 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
2327 (expand_builtin_stpncpy, check_strncat_sizes): Same.
2328 (expand_builtin_strncat, expand_builtin_strncpy): Same.
2329 (expand_builtin_memcmp): Same.
2330 * builtins.h (check_nul_terminated_array): Declare extern.
2331 (check_access): Add argument.
2332 (struct access_ref, struct access_data): New structs.
2333 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
2334 (builtin_access::overlap): Call it.
2335 * tree-object-size.c (decl_init_size): Declare extern.
2336 (addr_object_size): Correct offset computation.
2337 * tree-object-size.h (decl_init_size): Declare.
2338 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
2339 to maybe_warn_overflow when assigning to an SSA_NAME.
2341 2020-06-10 Richard Biener <rguenther@suse.de>
2343 * tree-vect-loop.c (vect_determine_vectorization_factor):
2345 (_loop_vec_info::_loop_vec_info): Likewise.
2346 (vect_update_vf_for_slp): Likewise.
2347 (vect_analyze_loop_operations): Likewise.
2348 (update_epilogue_loop_vinfo): Likewise.
2349 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
2350 (vect_pattern_recog): Likewise.
2351 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
2352 (_bb_vec_info::_bb_vec_info): Likewise.
2353 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
2356 2020-06-10 Richard Biener <rguenther@suse.de>
2358 PR tree-optimization/95576
2359 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
2361 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
2364 * config/aarch64/aarch64-sve-builtins.h
2365 (sve_switcher::m_old_maximum_field_alignment): New member.
2366 * config/aarch64/aarch64-sve-builtins.cc
2367 (sve_switcher::sve_switcher): Save maximum_field_alignment in
2368 m_old_maximum_field_alignment and clear maximum_field_alignment.
2369 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
2371 2020-06-10 Richard Biener <rguenther@suse.de>
2373 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
2375 (_stmt_vec_info::vec_stmts): Likewise.
2376 (vec_info::stmt_vec_info_ro): New flag.
2377 (vect_finish_replace_stmt): Adjust declaration.
2378 (vect_finish_stmt_generation): Likewise.
2379 (vectorizable_induction): Likewise.
2380 (vect_transform_reduction): Likewise.
2381 (vectorizable_lc_phi): Likewise.
2382 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
2383 allocate stmt infos for increments.
2384 (vect_record_grouped_load_vectors): Adjust.
2385 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
2386 (vectorize_fold_left_reduction): Likewise.
2387 (vect_transform_reduction): Likewise.
2388 (vect_transform_cycle_phi): Likewise.
2389 (vectorizable_lc_phi): Likewise.
2390 (vectorizable_induction): Likewise.
2391 (vectorizable_live_operation): Likewise.
2392 (vect_transform_loop): Likewise.
2393 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
2394 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
2395 (vect_get_slp_defs): Likewise.
2396 (vect_transform_slp_perm_load): Likewise.
2397 (vect_schedule_slp_instance): Likewise.
2398 (vectorize_slp_instance_root_stmt): Likewise.
2399 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
2400 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
2401 (vect_finish_replace_stmt): Do not return anything.
2402 (vect_finish_stmt_generation): Likewise.
2403 (vect_build_gather_load_calls): Adjust.
2404 (vectorizable_bswap): Likewise.
2405 (vectorizable_call): Likewise.
2406 (vectorizable_simd_clone_call): Likewise.
2407 (vect_create_vectorized_demotion_stmts): Likewise.
2408 (vectorizable_conversion): Likewise.
2409 (vectorizable_assignment): Likewise.
2410 (vectorizable_shift): Likewise.
2411 (vectorizable_operation): Likewise.
2412 (vectorizable_scan_store): Likewise.
2413 (vectorizable_store): Likewise.
2414 (vectorizable_load): Likewise.
2415 (vectorizable_condition): Likewise.
2416 (vectorizable_comparison): Likewise.
2417 (vect_transform_stmt): Likewise.
2418 * tree-vectorizer.c (vec_info::vec_info): Initialize
2420 (vec_info::replace_stmt): Copy over stmt UID rather than
2421 unsetting/setting a stmt info allocating a new UID.
2422 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
2424 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
2426 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
2428 * gimple-ssa-evrp.c (class evrp_folder): New.
2429 (class evrp_dom_walker): Remove.
2430 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
2431 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
2432 * tree-ssa-copy.c (copy_folder::get_value): Same.
2433 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
2434 Pass stmt to get_value.
2435 (substitute_and_fold_engine::replace_phi_args_in): Same.
2436 (substitute_and_fold_dom_walker::after_dom_children): Call
2438 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
2439 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
2440 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
2441 call virtual functions for folding, pre_folding, and post folding.
2442 Call get_value with PHI. Tweak dump.
2443 * tree-ssa-propagate.h (class substitute_and_fold_engine):
2444 New argument to get_value.
2445 New virtual function pre_fold_bb.
2446 New virtual function post_fold_bb.
2447 New virtual function pre_fold_stmt.
2448 New virtual function post_new_stmt.
2449 New function propagate_into_phi_args.
2450 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
2451 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
2453 (vr_values::fold_cond): New.
2454 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
2455 * vr-values.h (class vr_values): Add
2456 simplify_cond_using_ranges_when_edge_is_known.
2458 2020-06-10 Martin Liska <mliska@suse.cz>
2461 * asan.c (asan_emit_stack_protection): Emit
2462 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
2465 2020-06-10 Tamar Christina <tamar.christina@arm.com>
2467 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
2469 2020-06-10 Richard Biener <rguenther@suse.de>
2471 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
2472 (vect_record_grouped_load_vectors): Likewise.
2473 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
2474 (vectorize_fold_left_reduction): Likewise.
2475 (vect_transform_reduction): Likewise.
2476 (vect_transform_cycle_phi): Likewise.
2477 (vectorizable_lc_phi): Likewise.
2478 (vectorizable_induction): Likewise.
2479 (vectorizable_live_operation): Likewise.
2480 (vect_transform_loop): Likewise.
2481 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
2483 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
2484 (vect_get_vec_def_for_operand): Likewise.
2485 (vect_get_vec_def_for_stmt_copy): Likewise.
2486 (vect_get_vec_defs_for_stmt_copy): Likewise.
2487 (vect_get_vec_defs_for_operand): New function.
2488 (vect_get_vec_defs): Likewise.
2489 (vect_build_gather_load_calls): Adjust.
2490 (vect_get_gather_scatter_ops): Likewise.
2491 (vectorizable_bswap): Likewise.
2492 (vectorizable_call): Likewise.
2493 (vectorizable_simd_clone_call): Likewise.
2494 (vect_get_loop_based_defs): Remove.
2495 (vect_create_vectorized_demotion_stmts): Adjust.
2496 (vectorizable_conversion): Likewise.
2497 (vectorizable_assignment): Likewise.
2498 (vectorizable_shift): Likewise.
2499 (vectorizable_operation): Likewise.
2500 (vectorizable_scan_store): Likewise.
2501 (vectorizable_store): Likewise.
2502 (vectorizable_load): Likewise.
2503 (vectorizable_condition): Likewise.
2504 (vectorizable_comparison): Likewise.
2505 (vect_transform_stmt): Adjust and remove no longer applicable
2507 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
2508 STMT_VINFO_VEC_STMTS.
2509 (vec_info::free_stmt_vec_info): Relase it.
2510 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
2511 (_stmt_vec_info::vec_stmts): Add.
2512 (STMT_VINFO_VEC_STMT): Remove.
2513 (STMT_VINFO_VEC_STMTS): New.
2514 (vect_get_vec_def_for_operand_1): Remove.
2515 (vect_get_vec_def_for_operand): Likewise.
2516 (vect_get_vec_defs_for_stmt_copy): Likewise.
2517 (vect_get_vec_def_for_stmt_copy): Likewise.
2518 (vect_get_vec_defs): New overloads.
2519 (vect_get_vec_defs_for_operand): New.
2520 (vect_get_slp_defs): Declare.
2522 2020-06-10 Qian Chao <qianchao9@huawei.com>
2524 PR tree-optimization/95569
2525 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
2527 2020-06-10 Martin Liska <mliska@suse.cz>
2529 PR tree-optimization/92860
2530 * optc-save-gen.awk: Generate new function cl_optimization_compare.
2531 * opth-gen.awk: Generate declaration of the function.
2533 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
2535 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
2536 'future' PowerPC platform.
2537 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
2538 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
2539 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
2541 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
2542 (rs6000_clone_map): Add 'future' system target_clones support.
2544 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
2546 * Makefile.in (ZSTD_INC): Define.
2547 (ZSTD_LIB): Include ZSTD_LDFLAGS.
2548 (CFLAGS-lto-compress.o): Add ZSTD_INC.
2549 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
2551 * configure: Rebuilt.
2553 2020-06-09 Jason Merrill <jason@redhat.com>
2556 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
2558 2020-06-09 Marco Elver <elver@google.com>
2560 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
2561 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
2562 builtin for volatile instrumentation of reads/writes.
2563 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
2564 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
2565 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
2566 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
2567 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
2568 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
2569 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
2570 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
2571 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
2572 * tsan.c (get_memory_access_decl): Argument if access is
2573 volatile. If param tsan-distinguish-volatile is non-zero, and
2574 access if volatile, return volatile instrumentation decl.
2575 (instrument_expr): Check if access is volatile.
2577 2020-06-09 Richard Biener <rguenther@suse.de>
2579 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
2581 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
2583 * omp-offload.c (add_decls_addresses_to_decl_constructor,
2584 omp_finish_file): With in_lto_p, stream out all offload-table
2585 items even if the symtab_node does not exist.
2587 2020-06-09 Richard Biener <rguenther@suse.de>
2589 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
2591 2020-06-09 Martin Liska <mliska@suse.cz>
2593 * gcov-dump.c (print_usage): Fix spacing for --raw option
2596 2020-06-09 Martin Liska <mliska@suse.cz>
2598 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
2599 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
2600 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
2601 Handle all sanitizer options.
2602 (can_inline_edge_p): Use renamed CIF_* enum value.
2604 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
2606 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
2608 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
2609 (@aarch64_bic<mode>): Enable unpacked BIC.
2610 (*bic<mode>3): Enable unpacked BIC.
2612 2020-06-09 Martin Liska <mliska@suse.cz>
2614 PR gcov-profile/95365
2615 * doc/gcov.texi: Compile and link one example in 2 steps.
2617 2020-06-09 Jakub Jelinek <jakub@redhat.com>
2619 PR tree-optimization/95527
2620 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
2622 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
2624 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
2625 'future' PowerPC platform.
2626 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
2627 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
2628 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
2630 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
2631 (rs6000_clone_map): Add 'future' system target_clones support.
2633 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
2637 * omp-offload.c (add_decls_addresses_to_decl_constructor,
2638 omp_finish_file): Skip removed items.
2639 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
2640 to this node for variables and functions.
2642 2020-06-08 Jason Merrill <jason@redhat.com>
2644 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
2645 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
2646 * configure: Regenerate.
2648 2020-06-08 Martin Sebor <msebor@redhat.com>
2650 * postreload.c (reload_cse_simplify_operands): Clear first array element
2651 before using it. Assert a precondition.
2653 2020-06-08 Jakub Jelinek <jakub@redhat.com>
2656 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
2657 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
2658 type is vector boolean.
2660 2020-06-08 Tamar Christina <tamar.christina@arm.com>
2662 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
2664 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
2666 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
2667 instead of VFP_REGS.
2669 2020-06-08 Martin Liska <mliska@suse.cz>
2671 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
2672 in all vcond* patterns.
2674 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
2676 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
2677 Define. No longer include <algorithm>.
2679 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
2681 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
2682 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
2683 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
2684 (parityhi2, parityqi2): New expanders.
2685 (parityhi2_cmp): Implement set parity flag with xorb insn.
2686 (parityqi2_cmp): Implement set parity flag with testb insn.
2687 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
2689 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
2692 * config/rs6000/rs6000.c (rs6000_option_override_internal):
2693 Override flag_cunroll_grow_size.
2695 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
2697 * common.opt (flag_cunroll_grow_size): New flag.
2698 * toplev.c (process_options): Set flag_cunroll_grow_size.
2699 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
2700 Use flag_cunroll_grow_size.
2702 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
2705 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
2706 (ipa_odr_summary_write): Update streaming.
2707 (ipa_odr_read_section): Update streaming.
2709 2020-06-06 Alexandre Oliva <oliva@adacore.com>
2712 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
2714 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
2715 Julian Brown <julian@codesourcery.com>
2717 * gimplify.c (gimplify_adjust_omp_clauses): Remove
2718 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
2720 2020-06-05 Richard Biener <rguenther@suse.de>
2722 PR tree-optimization/95539
2723 * tree-vect-data-refs.c
2724 (vect_slp_analyze_and_verify_instance_alignment): Use
2725 SLP_TREE_REPRESENTATIVE for the data-ref check.
2726 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
2727 back to the first scalar stmt rather than the
2728 SLP_TREE_REPRESENTATIVE to match previous behavior.
2730 2020-06-05 Felix Yang <felix.yang@huawei.com>
2733 * expr.c (emit_move_insn): Check src and dest of the copy to see
2734 if one or both of them are subregs, try to remove the subregs when
2735 innermode and outermode are equal in size and the mode change involves
2736 an implicit round trip through memory.
2738 2020-06-05 Jakub Jelinek <jakub@redhat.com>
2741 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
2742 define_insn_and_split patterns.
2743 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
2744 define_insn patterns.
2746 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
2748 * alloc-pool.h (object_allocator::remove_raw): New.
2749 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
2750 (occurrence::occurrence): Add.
2751 (occurrence::~occurrence): Likewise.
2752 (occurrence::new): Likewise.
2753 (occurrence::delete): Likewise.
2755 (insert_bb): Use new occurence (...) instead of occ_new.
2756 (register_division_in): Likewise.
2757 (free_bb): Use delete occ instead of manually removing
2760 2020-06-05 Richard Biener <rguenther@suse.de>
2763 * cfgexpand.c (expand_debug_expr): Avoid calling
2764 set_mem_attributes_minus_bitpos when we were expanding
2766 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
2767 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
2768 special-cases we do not want MEM_EXPRs for. Assert
2769 we end up with reasonable MEM_EXPRs.
2771 2020-06-05 Lili Cui <lili.cui@intel.com>
2774 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
2776 2020-06-04 Martin Sebor <msebor@redhat.com>
2780 * attribs.c (init_attr_rdwr_indices): Move function here.
2781 * attribs.h (rdwr_access_hash, rdwr_map): Define.
2782 (attr_access): Add 'none'.
2783 (init_attr_rdwr_indices): Declared function.
2784 * builtins.c (warn_for_access)): New function.
2785 (check_access): Call it.
2786 * builtins.h (checK-access): Add an optional argument.
2787 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
2788 (init_attr_rdwr_indices): Declare extern.
2789 (append_attrname): Handle attr_access::none.
2790 (maybe_warn_rdwr_sizes): Same.
2791 (initialize_argument_information): Update comments.
2792 * doc/extend.texi (attribute access): Document 'none'.
2793 * tree-ssa-uninit.c (struct wlimits): New.
2794 (maybe_warn_operand): New function.
2795 (maybe_warn_pass_by_reference): Same.
2796 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
2797 Also call for function calls.
2798 (pass_late_warn_uninitialized::execute): Adjust comments.
2799 (execute_early_warn_uninitialized): Same.
2801 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
2804 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
2805 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
2806 reload if the original insn has it too.
2808 2020-06-04 Richard Biener <rguenther@suse.de>
2810 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
2811 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
2813 2020-06-04 Martin Jambor <mjambor@suse.cz>
2816 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
2817 exceptions check to...
2818 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
2820 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
2821 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
2824 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2827 * config/arm/predicates.md (mve_scatter_memory): Define to
2828 match (mem (reg)) for scatter store memory.
2829 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
2830 define_insn to define_expand.
2831 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
2832 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
2833 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
2834 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
2835 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
2836 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
2837 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
2838 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
2839 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
2840 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
2841 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
2842 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
2843 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
2844 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
2845 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
2846 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
2847 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
2848 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
2849 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
2850 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
2851 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
2853 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
2854 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
2855 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
2856 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
2857 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
2858 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
2859 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
2860 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
2861 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
2862 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
2863 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
2864 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
2865 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
2866 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
2867 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
2868 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
2869 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
2870 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
2871 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
2872 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
2874 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2876 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
2878 (__arm_vbicq_n_s16): Likewise.
2879 (__arm_vbicq_n_u32): Likewise.
2880 (__arm_vbicq_n_s32): Likewise.
2881 (__arm_vbicq): Modify polymorphic variant.
2883 2020-06-04 Richard Biener <rguenther@suse.de>
2885 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
2886 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
2887 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
2888 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
2889 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
2891 (vect_get_slp_defs): ... here.
2892 (vect_get_slp_vect_def): New function.
2894 2020-06-04 Richard Biener <rguenther@suse.de>
2896 * tree-vectorizer.h (_slp_tree::lanes): New.
2897 (SLP_TREE_LANES): Likewise.
2898 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
2899 (vectorizable_reduction): Likewise.
2900 (vect_transform_cycle_phi): Likewise.
2901 (vectorizable_induction): Likewise.
2902 (vectorizable_live_operation): Likewise.
2903 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
2904 (vect_create_new_slp_node): Likewise.
2905 (slp_copy_subtree): Copy it.
2906 (vect_optimize_slp): Use it.
2907 (vect_slp_analyze_node_operations_1): Likewise.
2908 (vect_slp_convert_to_external): Likewise.
2909 (vect_bb_vectorization_profitable_p): Likewise.
2910 * tree-vect-stmts.c (vectorizable_load): Likewise.
2911 (get_vectype_for_scalar_type): Likewise.
2913 2020-06-04 Richard Biener <rguenther@suse.de>
2915 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
2916 (vect_build_slp_tree_2): Simplify building all external op
2918 (vect_slp_analyze_node_operations): Remove push/pop of
2919 STMT_VINFO_DEF_TYPE.
2920 (vect_schedule_slp_instance): Likewise.
2921 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
2922 stmt_info, use the vect_is_simple_use overload combining
2923 SLP and stmt_info analysis.
2924 (vect_is_simple_cond): Likewise.
2925 (vectorizable_store): Adjust.
2926 (vectorizable_condition): Likewise.
2927 (vect_is_simple_use): Fully handle invariant SLP nodes
2928 here. Amend stmt_info operand extraction with COND_EXPR
2930 * tree-vect-loop.c (vectorizable_reduction): Deal with
2931 COND_EXPR representation ugliness.
2933 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
2936 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
2937 Refine from *vcvtps2ph_store<mask_name>.
2938 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
2939 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
2940 (*vcvtps2ph256<merge_mask_name>): New define_insn.
2941 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
2942 * config/i386/subst.md (merge_mask): New define_subst.
2943 (merge_mask_name): New define_subst_attr.
2944 (merge_mask_operand3): Ditto.
2946 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
2948 PR tree-optimization/89430
2950 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
2951 remove ssa_name_ver, store, offset fields.
2952 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
2953 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
2954 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
2957 2020-06-04 Andreas Schwab <schwab@suse.de>
2960 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
2962 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
2964 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
2965 (trunc<mode><pmov_dst_3_lower>2): Refine from
2966 trunc<mode><pmov_dst_3>2.
2968 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
2970 * match.pd (tanh/sinh -> 1/cosh): New simplification.
2972 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
2975 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
2976 is_lfs_stfs_insn and make it recognize lfs as well.
2977 (prefixed_store_p): Use is_lfs_stfs_insn().
2978 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
2980 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
2982 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
2984 (odr_enums): New static var.
2985 (struct odr_enum_val): New struct.
2986 (class odr_enum): New struct.
2987 (odr_enum_map): New hashtable.
2988 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
2989 (add_type_duplicate): Likewise.
2990 (free_odr_warning_data): Do not free TYPE_VALUES.
2991 (register_odr_enum): New function.
2992 (ipa_odr_summary_write): New function.
2993 (ipa_odr_read_section): New function.
2994 (ipa_odr_summary_read): New function.
2995 (class pass_ipa_odr): New pass.
2996 (make_pass_ipa_odr): New function.
2997 * ipa-utils.h (register_odr_enum): Declare.
2998 * lto-section-in.c: (lto_section_name): Add odr_types section.
2999 * lto-streamer.h (enum lto_section_type): Add odr_types section.
3000 * passes.def: Add odr_types pass.
3001 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
3003 (hash_tree): Likewise.
3004 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
3006 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
3008 * timevar.def (TV_IPA_ODR): New timervar.
3009 * tree-pass.h (make_pass_ipa_odr): Declare.
3010 * tree.c (free_lang_data_in_type): Regiser ODR types.
3012 2020-06-03 Romain Naour <romain.naour@gmail.com>
3014 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
3017 2020-06-03 Richard Biener <rguenther@suse.de>
3019 PR tree-optimization/95487
3020 * tree-vect-stmts.c (vectorizable_store): Use a truth type
3021 for the scatter mask.
3023 2020-06-03 Richard Biener <rguenther@suse.de>
3025 PR tree-optimization/95495
3026 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
3027 SLP_TREE_REPRESENTATIVE in the shift assertion.
3029 2020-06-03 Tom Tromey <tromey@adacore.com>
3031 * spellcheck.c (CASE_COST): New define.
3032 (BASE_COST): New define.
3033 (get_edit_distance): Recognize case changes.
3034 (get_edit_distance_cutoff): Update.
3035 (test_edit_distances): Update.
3036 (get_old_cutoff): Update.
3037 (test_find_closest_string): Add case sensitivity test.
3039 2020-06-03 Richard Biener <rguenther@suse.de>
3041 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
3042 the cost vector to unset the visited flag on stmts.
3044 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
3046 * gimplify.c (omp_notice_variable): Use new hook.
3047 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
3048 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
3049 (LANG_HOOKS_DECLS): Add it.
3050 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
3051 (lhd_omp_predetermined_mapping): New.
3052 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
3054 2020-06-03 Jan Hubicka <jh@suse.cz>
3056 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
3057 add LTO_first_tree_tag and LTO_first_gimple_tag.
3058 (lto_tag_is_tree_code_p): Update.
3059 (lto_tag_is_gimple_code_p): Update.
3060 (lto_gimple_code_to_tag): Update.
3061 (lto_tag_to_gimple_code): Update.
3062 (lto_tree_code_to_tag): Update.
3063 (lto_tag_to_tree_code): Update.
3065 2020-06-02 Felix Yang <felix.yang@huawei.com>
3068 * config/aarch64/aarch64.c (aarch64_short_vector_p):
3069 Leave later code to report an error if SVE is disabled.
3071 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3073 * config/aarch64/aarch64-cores.def (zeus): Define.
3074 * config/aarch64/aarch64-tune.md: Regenerate.
3075 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
3077 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
3080 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
3082 (is_stfs_insn): New helper function.
3084 2020-06-02 Jan Hubicka <jh@suse.cz>
3086 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
3088 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
3090 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
3092 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
3093 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
3094 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
3096 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
3099 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
3100 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
3102 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3104 * config/s390/s390.c (print_operand): Emit vector alignment
3107 2020-06-02 Martin Liska <mliska@suse.cz>
3109 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
3110 as they have variable number of counters.
3111 * gcov-dump.c (main): Add new option -r.
3112 (print_usage): Likewise.
3113 (tag_counters): All new raw format.
3114 * gcov-io.h (struct gcov_kvp): New.
3115 (GCOV_TOPN_VALUES): Remove.
3116 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
3117 (GCOV_TOPN_MEM_COUNTERS): New.
3118 (GCOV_TOPN_DISK_COUNTERS): Likewise.
3119 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
3120 * ipa-profile.c (ipa_profile_generate_summary): Use
3121 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
3122 (ipa_profile_write_edge_summary): Likewise.
3123 (ipa_profile_read_edge_summary): Likewise.
3124 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
3125 * profile.c (sort_hist_values): Sort variable number
3127 (compute_value_histograms): Special case for TOP N counters
3128 that have dynamic number of key-value pairs.
3129 * value-prof.c (dump_histogram_value): Dump variable number
3131 (stream_in_histogram_value): Stream in variable number
3132 of key-value pairs for TOP N counter.
3133 (get_nth_most_common_value): Deal with variable number
3135 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
3137 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
3139 * doc/gcov-dump.texi: Document new -r option.
3141 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
3144 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
3146 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
3148 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
3149 returns (const_int 0) for the destination, then emit nothing.
3151 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
3153 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
3154 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
3155 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
3156 LTO_const_decl_ref, LTO_imported_decl_ref,
3157 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
3158 LTO_namelist_decl_ref; add LTO_global_stream_ref.
3159 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
3160 (lto_input_scc): Update.
3161 (lto_input_tree_1): Update.
3162 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
3163 * lto-streamer.c (lto_tag_name): Update.
3165 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
3167 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
3168 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
3169 * lto-cgraph.c (lto_output_node): Likewise.
3170 (lto_output_varpool_node): Likewise.
3171 (output_offload_tables): Likewise.
3172 (input_node): Likewise.
3173 (input_varpool_node): Likewise.
3174 (input_offload_tables): Likewise.
3175 * lto-streamer-in.c (lto_input_tree_ref): Declare.
3176 (lto_input_var_decl_ref): Declare.
3177 (lto_input_fn_decl_ref): Declare.
3178 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
3179 (lto_output_var_decl_index): Rename to ..
3180 (lto_output_var_decl_ref): ... this.
3181 (lto_output_fn_decl_index): Rename to ...
3182 (lto_output_fn_decl_ref): ... this.
3183 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
3184 (DEFINE_DECL_STREAM_FUNCS): Remove.
3185 (lto_output_var_decl_index): Remove.
3186 (lto_output_fn_decl_index): Remove.
3187 (lto_output_var_decl_ref): Declare.
3188 (lto_output_fn_decl_ref): Declare.
3189 (lto_input_var_decl_ref): Declare.
3190 (lto_input_fn_decl_ref): Declare.
3192 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
3194 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
3195 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
3196 dump infomation if there is no adjusted parameter.
3197 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
3199 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
3201 * Makefile.in (gimple-array-bounds.o): New.
3202 * tree-vrp.c: Move array bounds code...
3203 * gimple-array-bounds.cc: ...here...
3204 * gimple-array-bounds.h: ...and here.
3206 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
3208 * Makefile.in (OBJS): Add value-range-equiv.o.
3209 * tree-vrp.c (*value_range_equiv*): Move to...
3210 * value-range-equiv.cc: ...here.
3211 * tree-vrp.h (class value_range_equiv): Move to...
3212 * value-range-equiv.h: ...here.
3213 * vr-values.h: Include value-range-equiv.h.
3215 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
3218 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
3219 lattice for simple pass-through by-ref argument.
3221 2020-05-31 Jeff Law <law@redhat.com>
3223 * lra.c (add_auto_inc_notes): Remove function.
3224 * reload1.c (add_auto_inc_notes): Similarly. Move into...
3225 * rtlanal.c (add_auto_inc_notes): New function.
3226 * rtl.h (add_auto_inc_notes): Add prototype.
3227 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
3230 2020-05-31 Jan Hubicka <jh@suse.cz>
3232 * lto-section-out.c (lto_output_decl_index): Remove.
3233 (lto_output_field_decl_index): Move to lto-streamer-out.c
3234 (lto_output_fn_decl_index): Move to lto-streamer-out.c
3235 (lto_output_namespace_decl_index): Remove.
3236 (lto_output_var_decl_index): Remove.
3237 (lto_output_type_decl_index): Remove.
3238 (lto_output_type_ref_index): Remove.
3239 * lto-streamer-out.c (output_type_ref): Remove.
3240 (lto_get_index): New function.
3241 (lto_output_tree_ref): Remove.
3242 (lto_indexable_tree_ref): New function.
3243 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
3244 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
3245 (stream_write_tree_ref): Update.
3246 (lto_output_tree): Update.
3247 * lto-streamer.h (lto_output_decl_index): Remove prototype.
3248 (lto_output_field_decl_index): Remove prototype.
3249 (lto_output_namespace_decl_index): Remove prototype.
3250 (lto_output_type_decl_index): Remove prototype.
3251 (lto_output_type_ref_index): Remove prototype.
3252 (lto_output_var_decl_index): Move.
3253 (lto_output_fn_decl_index): Move
3255 2020-05-31 Jakub Jelinek <jakub@redhat.com>
3258 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
3261 2020-05-31 Jeff Law <law@redhat.com>
3263 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
3265 2020-05-31 Jim Wilson <jimw@sifive.com>
3267 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
3269 2020-05-30 Jonathan Yong <10walls@gmail.com>
3271 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
3272 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
3273 import library, but also contains some functions that invoke
3274 others in KERNEL32.DLL.
3276 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
3278 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
3279 (altivec_vmrglw_direct): Ditto.
3280 (altivec_vperm_<mode>_direct): Ditto.
3281 (altivec_vperm_v8hiv16qi): Ditto.
3282 (*altivec_vperm_<mode>_uns_internal): Ditto.
3283 (*altivec_vpermr_<mode>_internal): Ditto.
3284 (vperm_v8hiv4si): Ditto.
3285 (vperm_v16qiv8hi): Ditto.
3287 2020-05-29 Jan Hubicka <jh@suse.cz>
3289 * lto-streamer-in.c (streamer_read_chain): Move here from
3291 (stream_read_tree_ref): New.
3292 (lto_input_tree_1): Simplify.
3293 * lto-streamer-out.c (stream_write_tree_ref): New.
3294 (lto_write_tree_1): Simplify.
3295 (lto_output_tree_1): Simplify.
3296 (DFS::DFS_write_tree): Simplify.
3297 (streamer_write_chain): Move here from tree-stremaer-out.c.
3298 * lto-streamer.h (lto_output_tree_ref): Update prototype.
3299 (stream_read_tree_ref): Declare
3300 (stream_write_tree_ref): Declare
3301 * tree-streamer-in.c (streamer_read_chain): Update to use
3302 stream_read_tree_ref.
3303 (lto_input_ts_common_tree_pointers): Likewise.
3304 (lto_input_ts_vector_tree_pointers): Likewise.
3305 (lto_input_ts_poly_tree_pointers): Likewise.
3306 (lto_input_ts_complex_tree_pointers): Likewise.
3307 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
3308 (lto_input_ts_decl_common_tree_pointers): Likewise.
3309 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
3310 (lto_input_ts_field_decl_tree_pointers): Likewise.
3311 (lto_input_ts_function_decl_tree_pointers): Likewise.
3312 (lto_input_ts_type_common_tree_pointers): Likewise.
3313 (lto_input_ts_type_non_common_tree_pointers): Likewise.
3314 (lto_input_ts_list_tree_pointers): Likewise.
3315 (lto_input_ts_vec_tree_pointers): Likewise.
3316 (lto_input_ts_exp_tree_pointers): Likewise.
3317 (lto_input_ts_block_tree_pointers): Likewise.
3318 (lto_input_ts_binfo_tree_pointers): Likewise.
3319 (lto_input_ts_constructor_tree_pointers): Likewise.
3320 (lto_input_ts_omp_clause_tree_pointers): Likewise.
3321 * tree-streamer-out.c (streamer_write_chain): Update to use
3322 stream_write_tree_ref.
3323 (write_ts_common_tree_pointers): Likewise.
3324 (write_ts_vector_tree_pointers): Likewise.
3325 (write_ts_poly_tree_pointers): Likewise.
3326 (write_ts_complex_tree_pointers): Likewise.
3327 (write_ts_decl_minimal_tree_pointers): Likewise.
3328 (write_ts_decl_common_tree_pointers): Likewise.
3329 (write_ts_decl_non_common_tree_pointers): Likewise.
3330 (write_ts_decl_with_vis_tree_pointers): Likewise.
3331 (write_ts_field_decl_tree_pointers): Likewise.
3332 (write_ts_function_decl_tree_pointers): Likewise.
3333 (write_ts_type_common_tree_pointers): Likewise.
3334 (write_ts_type_non_common_tree_pointers): Likewise.
3335 (write_ts_list_tree_pointers): Likewise.
3336 (write_ts_vec_tree_pointers): Likewise.
3337 (write_ts_exp_tree_pointers): Likewise.
3338 (write_ts_block_tree_pointers): Likewise.
3339 (write_ts_binfo_tree_pointers): Likewise.
3340 (write_ts_constructor_tree_pointers): Likewise.
3341 (write_ts_omp_clause_tree_pointers): Likewise.
3342 (streamer_write_tree_body): Likewise.
3343 (streamer_write_integer_cst): Likewise.
3344 * tree-streamer.h (streamer_read_chain):Declare.
3345 (streamer_write_chain):Declare.
3346 (streamer_write_tree_body): Update prototype.
3347 (streamer_write_integer_cst): Update prototype.
3349 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
3352 * configure: Regenerated.
3354 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
3356 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
3357 (add<mode>3_vcc_zext_dup_exec): Likewise.
3358 (add<mode>3_vcc_zext_dup2): Likewise.
3359 (add<mode>3_vcc_zext_dup2_exec): Likewise.
3361 2020-05-29 Richard Biener <rguenther@suse.de>
3363 PR tree-optimization/95272
3364 * tree-vectorizer.h (_slp_tree::representative): Add.
3365 (SLP_TREE_REPRESENTATIVE): Likewise.
3366 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
3368 (vectorizable_live_operation): Use the representative to
3369 attach the reduction info to.
3370 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
3371 SLP_TREE_REPRESENTATIVE.
3372 (vect_create_new_slp_node): Likewise.
3373 (slp_copy_subtree): Copy it.
3374 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
3375 (vect_slp_analyze_node_operations_1): Pass the representative
3376 to vect_analyze_stmt.
3377 (vect_schedule_slp_instance): Pass the representative to
3378 vect_transform_stmt.
3380 2020-05-29 Richard Biener <rguenther@suse.de>
3382 PR tree-optimization/95356
3383 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
3384 node hacking during analysis.
3386 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
3389 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
3391 2020-05-29 Richard Biener <rguenther@suse.de>
3393 PR tree-optimization/95403
3394 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
3397 2020-05-29 Jakub Jelinek <jakub@redhat.com>
3400 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
3401 declare variant cgraph node removal callback.
3403 2020-05-29 Jakub Jelinek <jakub@redhat.com>
3406 * expr.c (store_expr): If expr_size is constant and significantly
3407 larger than TREE_STRING_LENGTH, set temp to just the
3408 TREE_STRING_LENGTH portion of the STRING_CST.
3410 2020-05-29 Richard Biener <rguenther@suse.de>
3412 PR tree-optimization/95393
3413 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
3414 to build the min/max expression so we simplify cases like
3415 MAX(0, s) immediately.
3417 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
3419 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
3420 for unpacked EOR, ORR, AND.
3422 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
3424 * Makefile.in: don't look for libiberty in the "pic" subdirectory
3425 when building for Mingw. Add dependency on xgcc with the proper
3428 2020-05-28 Jeff Law <law@redhat.com>
3430 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
3432 2020-05-28 Jeff Law <law@redhat.com>
3434 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
3435 make a nonzero adjustment to the memory offset.
3436 (b<ior,xor>hi_msx): Turn into a splitter.
3438 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
3440 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
3441 Fix off-by-one error.
3443 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
3445 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
3446 wb_candidate1 and wb_candidate2.
3447 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
3448 wb_candidate1 and wb_candidate2 if we decided not to use them.
3450 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
3453 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
3454 we have at least some CFI operations when using a frame pointer.
3455 Only redefine the CFA if we have CFI operations.
3457 2020-05-28 Richard Biener <rguenther@suse.de>
3459 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
3460 case for !SLP_TREE_VECTYPE.
3461 (vect_slp_analyze_node_operations): Adjust.
3463 2020-05-28 Richard Biener <rguenther@suse.de>
3465 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
3466 (SLP_TREE_VEC_DEFS): Likewise.
3467 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
3468 (_slp_tree::~_slp_tree): Likewise.
3469 (vect_mask_constant_operand_p): Remove unused function.
3470 (vect_get_constant_vectors): Rename to...
3471 (vect_create_constant_vectors): ... this. Take the
3472 invariant node as argument and code generate it. Remove
3473 dead code, remove temporary asserts. Pass a NULL stmt_info
3474 to vect_init_vector.
3475 (vect_get_slp_defs): Simplify.
3476 (vect_schedule_slp_instance): Code-generate externals and
3477 invariants using vect_create_constant_vectors.
3479 2020-05-28 Richard Biener <rguenther@suse.de>
3481 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
3482 Conditionalize stmt_info use, assert the new stmt cannot throw
3484 (vect_finish_stmt_generation): Adjust assert.
3486 2020-05-28 Richard Biener <rguenther@suse.de>
3488 PR tree-optimization/95273
3489 PR tree-optimization/95356
3490 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
3491 what we set the vector type of the shift operand SLP node
3494 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
3496 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
3499 2020-05-28 Martin Liska <mliska@suse.cz>
3502 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
3503 rename ipcp-unit-growth to ipa-cp-unit-growth.
3505 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
3507 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
3508 from *avx512vl_<code>v2div2qi_store and refine memory size of
3510 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
3511 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
3512 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
3513 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
3514 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
3515 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
3516 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
3517 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
3518 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
3519 (*avx512vl_<code>v2div2si2_store_1): Ditto.
3520 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
3521 (*avx512f_<code>v8div16qi2_store_1): Ditto.
3522 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
3523 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
3524 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
3525 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
3526 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
3527 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
3528 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
3529 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
3530 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
3531 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
3532 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
3533 (*avx512vl_<code>v2div2si2_store_2): Ditto.
3534 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
3535 (*avx512f_<code>v8div16qi2_store_2): Ditto.
3536 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
3537 * config/i386/i386-builtin-types.def: Adjust builtin type.
3538 * config/i386/i386-expand.c: Ditto.
3539 * config/i386/i386-builtin.def: Adjust builtin.
3540 * config/i386/avx512fintrin.h: Ditto.
3541 * config/i386/avx512vlbwintrin.h: Ditto.
3542 * config/i386/avx512vlintrin.h: Ditto.
3544 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
3546 PR gcov-profile/95332
3547 * gcov-io.c (gcov_var::endian): Move field.
3548 (from_file): Add IN_GCOV_TOOL check.
3549 * gcov-io.h (gcov_magic): Ditto.
3551 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
3553 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
3555 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
3557 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
3559 * builtin-types.def (BT_UINT128): New primitive type.
3560 (BT_FN_UINT128_UINT128): New function type.
3561 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
3562 * doc/extend.texi (__builtin_bswap128): Document it.
3563 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
3564 (is_inexpensive_builtin): Likewise.
3565 * fold-const-call.c (fold_const_call_ss): Likewise.
3566 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
3567 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
3568 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
3569 (vectorizable_call): Likewise.
3570 * optabs.c (expand_unop): Always use the double word path for it.
3571 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
3572 * tree.h (uint128_type_node): New global type.
3573 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
3575 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
3577 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
3578 (mmx_hsubv2sf3): Ditto.
3579 (mmx_haddsubv2sf3): New expander.
3580 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
3581 RTL template to model horizontal subtraction and addition.
3582 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
3585 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
3588 * config/i386/sse.md
3589 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
3590 Remove %q operand modifier from insn template.
3591 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
3593 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
3595 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
3596 Enable insn pattern for TARGET_MMX_WITH_SSE.
3597 (*mmx_movshdup): New insn pattern.
3598 (*mmx_movsldup): Ditto.
3599 (*mmx_movss): Ditto.
3600 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
3602 (expand_vec_perm_movs): Handle E_V2SFmode.
3603 (expand_vec_perm_even_odd): Ditto.
3604 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
3605 is already handled by standard shuffle patterns.
3607 2020-05-27 Richard Biener <rguenther@suse.de>
3609 PR tree-optimization/95295
3610 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
3611 merging stores from paths.
3613 2020-05-27 Richard Biener <rguenther@suse.de>
3615 PR tree-optimization/95356
3616 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
3617 type for the shift operand.
3619 2020-05-27 Richard Biener <rguenther@suse.de>
3621 PR tree-optimization/95335
3622 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
3623 lvisited for nodes made external.
3625 2020-05-27 Richard Biener <rguenther@suse.de>
3627 * dump-context.h (debug_dump_context): New class.
3628 (dump_context): Make it friend.
3629 * dumpfile.c (debug_dump_context::debug_dump_context):
3631 (debug_dump_context::~debug_dump_context): Likewise.
3632 * tree-vect-slp.c: Include dump-context.h.
3633 (vect_print_slp_tree): Dump a single SLP node.
3634 (debug): New overload for slp_tree.
3635 (vect_print_slp_graph): Rename from vect_print_slp_tree and
3637 (vect_analyze_slp_instance): Adjust.
3639 2020-05-27 Jakub Jelinek <jakub@redhat.com>
3642 * omp-general.c (omp_declare_variant_remove_hook): New function.
3643 (omp_resolve_declare_variant): Always return base if it is already
3644 declare_variant_alt magic decl itself. Register
3645 omp_declare_variant_remove_hook as cgraph node removal hook.
3647 2020-05-27 Jeff Law <law@redhat.com>
3649 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
3650 for the primary input operand.
3651 (tstsi_variable_bit_qi): Similarly.
3653 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
3655 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
3657 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
3660 * ipa-utils.h (odr_type_p): Also permit calls with
3661 only flag_generate_offload set.
3663 2020-05-26 Alexandre Oliva <oliva@adacore.com>
3665 * gcc.c (validate_switches): Add braced parameter. Adjust all
3666 callers. Expected and skip trailing brace only if braced.
3667 Return after handling one atom otherwise.
3668 (DUMPS_OPTIONS): New.
3669 (cpp_debug_options): Define in terms of it.
3671 2020-05-26 Richard Biener <rguenther@suse.de>
3673 PR tree-optimization/95327
3674 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
3675 when we are not using a scalar shift.
3677 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
3679 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
3680 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
3681 Handle E_V2SImode and E_V4HImode.
3682 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
3683 Assert that E_V2SImode is already handled.
3684 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
3685 is already handled by standard shuffle patterns.
3687 2020-05-26 Jan Hubicka <jh@suse.cz>
3689 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
3692 2020-05-26 Jakub Jelinek <jakub@redhat.com>
3695 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
3696 * omp-general.h (find_combined_omp_for): Declare.
3697 * omp-general.c: Include tree-iterator.h.
3698 (find_combined_omp_for): New function, moved from gimplify.c.
3700 2020-05-26 Alexandre Oliva <oliva@adacore.com>
3702 * common.opt (aux_base_name): Define.
3703 (dumpbase, dumpdir): Mark as Driver options.
3704 (-dumpbase, -dumpdir): Likewise.
3705 (dumpbase-ext, -dumpbase-ext): New.
3706 (auxbase, auxbase-strip): Drop.
3707 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
3709 (-o): Introduce the notion of primary output, mention it
3710 influences auxiliary and dump output names as well, add
3712 (-save-temps): Adjust, move examples into -dump*.
3713 (-save-temps=cwd, -save-temps=obj): Likewise.
3714 (-fdump-final-insns): Adjust.
3715 * dwarf2out.c (gen_producer_string): Drop auxbase and
3716 auxbase_strip; add dumpbase_ext.
3717 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
3718 (save_temps_prefix, save_temps_length): Drop.
3719 (save_temps_overrides_dumpdir): New.
3720 (dumpdir, dumpbase, dumpbase_ext): New.
3721 (dumpdir_length, dumpdir_trailing_dash_added): New.
3722 (outbase, outbase_length): New.
3723 (The Specs Language): Introduce %". Adjust %b and %B.
3724 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
3725 Precede object file with %w when it's the primary output.
3726 (cpp_debug_options): Do not pass on incoming -dumpdir,
3727 -dumpbase and -dumpbase-ext options; recompute them with
3729 (cc1_options): Drop auxbase with and without compare-debug;
3730 use cpp_debug_options instead of dumpbase. Mark asm output
3731 with %w when it's the primary output.
3732 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
3733 %:replace-exception. Add %:dumps.
3734 (driver_handle_option): Implement -save-temps=*/-dumpdir
3735 mutual overriding logic. Save dumpdir, dumpbase and
3736 dumpbase-ext options. Do not save output_file in
3738 (adds_single_suffix_p): New.
3739 (single_input_file_index): New.
3740 (process_command): Combine output dir, output base name, and
3741 dumpbase into dumpdir and outbase.
3742 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
3743 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
3744 and outbase instead of input_basename in %b, %B and in
3745 -save-temps aux files. Handle empty argument %".
3746 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
3747 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
3748 naming. Spec-quote the computed -fdump-final-insns file name.
3749 (debug_auxbase_opt): Drop.
3750 (compare_debug_self_opt_spec_function): Drop auxbase-strip
3752 (compare_debug_auxbase_opt_spec_function): Drop.
3753 (not_actual_file_p): New.
3754 (replace_extension_spec_func): Drop.
3755 (dumps_spec_func): New.
3756 (convert_white_space): Split-out parts into...
3757 (quote_string, whitespace_to_convert_p): ... these. New.
3758 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
3759 (driver::finalize): Release and reset new variables; drop
3761 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
3762 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
3763 empty string otherwise.
3764 (DUMPBASE_SUFFIX): Drop leading period.
3765 (debug_objcopy): Use concat.
3766 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
3767 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
3768 component. Simplify temp file names.
3769 * opts.c (finish_options): Drop aux base name handling.
3770 (common_handle_option): Drop auxbase-strip handling.
3771 * toplev.c (print_switch_values): Drop auxbase, add
3773 (process_options): Derive aux_base_name from dump_base_name
3775 (lang_dependent_init): Compute dump_base_ext along with
3776 dump_base_name. Disable stack usage and callgraph-info during
3777 lto generation and compare-debug recompilation.
3779 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
3780 Uroš Bizjak <ubizjak@gmail.com>
3784 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
3785 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
3786 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
3787 float<floatunssuffix>v2div2sf2.
3788 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
3789 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
3790 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
3791 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
3792 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
3793 * config/i386/i386-builtin.def: Ditto.
3794 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
3795 subregs when both omode and imode are vector mode and
3796 have the same inner mode.
3798 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
3800 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
3801 Only turn MEM_REFs into bit-field stores for small bit-field regions.
3802 (imm_store_chain_info::output_merged_store): Be prepared for sources
3803 with non-integral type in the bit-field insertion case.
3804 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
3805 the largest size for the bit-field case.
3807 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
3809 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
3810 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
3811 (*vec_dupv4hi): Redefine as define_insn.
3812 Remove alternative with general register input.
3813 (*vec_dupv2si): Ditto.
3815 2020-05-25 Richard Biener <rguenther@suse.de>
3817 PR tree-optimization/95309
3818 * tree-vect-slp.c (vect_get_constant_vectors): Move number
3819 of vector computation ...
3820 (vect_slp_analyze_node_operations): ... to analysis phase.
3822 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
3824 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
3825 * lto-streamer.h (streamer_debugging): New constant
3826 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
3827 streamer_debugging check.
3828 (streamer_get_pickled_tree): Likewise.
3829 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
3831 2020-05-25 Richard Biener <rguenther@suse.de>
3833 PR tree-optimization/95308
3834 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
3835 test for TARGET_MEM_REFs.
3837 2020-05-25 Richard Biener <rguenther@suse.de>
3839 PR tree-optimization/95295
3840 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
3841 RHSes and drop to full sm_other if they are not equal.
3843 2020-05-25 Richard Biener <rguenther@suse.de>
3845 PR tree-optimization/95271
3846 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
3847 children vector type.
3848 (vectorizable_call): Pass down slp ops.
3850 2020-05-25 Richard Biener <rguenther@suse.de>
3852 PR tree-optimization/95297
3853 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
3854 skip updating operand 1 vector type.
3856 2020-05-25 Richard Biener <rguenther@suse.de>
3858 PR tree-optimization/95284
3859 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
3862 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
3865 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
3866 (trunc<mode><sf2dfmode_lower>2) New expander.
3867 (extend<sf2dfmode_lower><mode>2): Ditto.
3869 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
3871 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
3872 ubsan_{data,type},ASAN symbols linker-visible.
3874 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3876 * lto-streamer-out.c (DFS::DFS): Silence warning.
3878 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
3881 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
3882 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
3884 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3886 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
3889 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3891 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
3892 * lto-streamer-out.c (create_output_block): Fix whitespace
3893 (lto_write_tree_1): Add (debug) dump.
3894 (DFS::DFS): Add dump.
3895 (DFS::DFS_write_tree_body): Do not dump here.
3896 (lto_output_tree): Improve dumping; do not stream ref when not needed.
3897 (produce_asm_for_decls): Fix whitespace.
3898 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
3899 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
3901 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
3904 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
3905 (truncv32hiv32qi2): Ditto.
3906 (trunc<ssedoublemodelower><mode>2): Ditto.
3907 (trunc<mode><pmov_dst_3>2): Ditto.
3908 (trunc<mode><pmov_dst_mode_4>2): Ditto.
3909 (truncv2div2si2): Ditto.
3910 (truncv8div8qi2): Ditto.
3911 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
3912 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
3913 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
3914 *avx512vl_<code><mode>v<ssescalarnum>qi2.
3916 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
3919 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
3922 2020-05-22 Richard Biener <rguenther@suse.de>
3924 PR tree-optimization/95268
3925 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
3928 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3930 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
3933 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3935 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
3936 (lto_input_scc): Optimize streaming of entry lengths.
3937 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
3938 (DFS::DFS): Optimize stremaing of entry lengths
3940 2020-05-22 Richard Biener <rguenther@suse.de>
3943 * doc/invoke.texi (flto): Document behavior of diagnostic
3946 2020-05-22 Richard Biener <rguenther@suse.de>
3948 * tree-vectorizer.h (vect_is_simple_use): New overload.
3949 (vect_maybe_update_slp_op_vectype): New.
3950 * tree-vect-stmts.c (vect_is_simple_use): New overload
3951 accessing operands of SLP vs. non-SLP operation transparently.
3952 (vect_maybe_update_slp_op_vectype): New function updating
3953 the possibly shared SLP operands vector type.
3954 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
3955 using the new vect_is_simple_use overload; update SLP invariant
3956 operand nodes vector type.
3957 (vectorizable_comparison): Likewise.
3958 (vectorizable_call): Likewise.
3959 (vectorizable_conversion): Likewise.
3960 (vectorizable_shift): Likewise.
3961 (vectorizable_store): Likewise.
3962 (vectorizable_condition): Likewise.
3963 (vectorizable_assignment): Likewise.
3964 * tree-vect-loop.c (vectorizable_reduction): Likewise.
3965 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
3966 present SLP_TREE_VECTYPE and check it matches previous
3969 2020-05-22 Richard Biener <rguenther@suse.de>
3971 PR tree-optimization/95248
3972 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
3974 2020-05-22 Richard Biener <rguenther@suse.de>
3976 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
3977 (_slp_tree::~_slp_tree): Likewise.
3978 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
3980 (_slp_tree::~_slp_tree): Implement.
3981 (vect_free_slp_tree): Simplify.
3982 (vect_create_new_slp_node): Likewise. Add nops parameter.
3983 (vect_build_slp_tree_2): Adjust.
3984 (vect_analyze_slp_instance): Likewise.
3986 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3988 * adjust-alignment.c: Include memmodel.h.
3990 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
3993 * config/i386/cpuid.h: Use hexadecimal in comments.
3995 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
3998 * config/i386/i386-builtins.c (processor_features): Move
3999 F_AVX512VP2INTERSECT after F_AVX512BF16.
4000 (isa_names_table): Likewise.
4002 2020-05-21 Martin Liska <mliska@suse.cz>
4004 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
4005 Handle OPT_moutline_atomics.
4006 * config/aarch64/aarch64.c: Add outline-atomics to
4008 * doc/extend.texi: Document the newly added target attribute.
4010 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
4014 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
4015 operands 1 and 2 commutative. Manually swap operands.
4016 (*mmx_nabsv2sf2): Ditto.
4019 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
4021 * config/i386/i386.md (*<code>tf2_1):
4022 Mark operands 1 and 2 commutative.
4023 (*nabstf2_1): Ditto.
4024 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
4025 commutative. Do not swap operands.
4026 (*nabs<mode>2): Ditto.
4028 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
4031 * config/i386/sse.md (<code>v8qiv8hi2): Use
4032 simplify_gen_subreg instead of simplify_subreg.
4033 (<code>v8qiv8si2): Ditto.
4034 (<code>v4qiv4si2): Ditto.
4035 (<code>v4hiv4si2): Ditto.
4036 (<code>v8qiv8di2): Ditto.
4037 (<code>v4qiv4di2): Ditto.
4038 (<code>v2qiv2di2): Ditto.
4039 (<code>v4hiv4di2): Ditto.
4040 (<code>v2hiv2di2): Ditto.
4041 (<code>v2siv2di2): Ditto.
4043 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
4046 * config/i386/i386.md (*pushsi2_rex64):
4047 Use "e" constraint instead of "i".
4049 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
4051 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
4052 (lto_input_tree_1): Strenghten sanity check.
4053 (lto_input_tree): Update call of lto_input_scc.
4054 * lto-streamer-out.c: Include ipa-utils.h
4055 (create_output_block): Initialize local_trees if merigng is going
4057 (destroy_output_block): Destroy local_trees.
4058 (DFS): Add max_local_entry.
4059 (local_tree_p): New function.
4060 (DFS::DFS): Initialize and maintain it.
4061 (DFS::DFS_write_tree): Decide on streaming format.
4062 (lto_output_tree): Stream inline singleton SCCs
4063 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
4064 (struct output_block): Add local_trees.
4065 (lto_input_scc): Update prototype.
4067 2020-05-20 Patrick Palka <ppalka@redhat.com>
4070 * hash-table.h (hash_table::find_with_hash): Move up the call to
4073 2020-05-20 Martin Liska <mliska@suse.cz>
4075 * lto-compress.c (lto_compression_zstd): Fill up
4076 num_compressed_il_bytes.
4077 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
4079 2020-05-20 Richard Biener <rguenther@suse.de>
4081 PR tree-optimization/95219
4082 * tree-vect-loop.c (vectorizable_induction): Reduce
4083 group_size before computing the number of required IVs.
4085 2020-05-20 Richard Biener <rguenther@suse.de>
4088 * tree-inline.c (remap_gimple_stmt): Revert adjusting
4089 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
4091 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4092 Andre Vieira <andre.simoesdiasvieira@arm.com>
4095 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
4097 (mve_vector_mem_operand): Likewise.
4098 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
4099 the load from memory to a core register is legitimate for give mode.
4100 (mve_vector_mem_operand): Define function.
4101 (arm_print_operand): Modify comment.
4102 (arm_mode_base_reg_class): Define.
4103 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
4104 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
4105 * config/arm/constraints.md (Ux): Likewise.
4107 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
4108 add support for missing Vector Store Register and Vector Load Register.
4109 Add a new alternative to support load from memory to PC (or label) in
4111 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
4112 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
4113 mve_memory_operand and also modify the MVE instructions to emit.
4114 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
4115 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
4116 mve_memory_operand and also modify the MVE instructions to emit.
4117 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
4118 mve_memory_operand and also modify the MVE instructions to emit.
4119 (mve_vldrhq_z_fv8hf): Likewise.
4120 (mve_vldrhq_z_<supf><mode>): Likewise.
4121 (mve_vldrwq_fv4sf): Likewise.
4122 (mve_vldrwq_<supf>v4si): Likewise.
4123 (mve_vldrwq_z_fv4sf): Likewise.
4124 (mve_vldrwq_z_<supf>v4si): Likewise.
4125 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
4126 (mve_vld1q_<supf><mode>): Likewise.
4127 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
4129 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
4130 mve_memory_operand and also modify the MVE instructions to emit.
4131 (mve_vstrhq_p_<supf><mode>): Likewise.
4132 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
4134 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
4135 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
4136 instructions to emit.
4137 (mve_vstrwq_p_<supf>v4si): Likewise.
4138 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
4139 * config/arm/predicates.md (mve_memory_operand): Define.
4141 2020-05-30 Richard Biener <rguenther@suse.de>
4144 * c-fold.c (c_fully_fold_internal): Enhance guard on
4147 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
4150 * Makefile.in (OBJS): Add adjust-alignment.o.
4151 * adjust-alignment.c (pass_data_adjust_alignment): New.
4152 (pass_adjust_alignment): New.
4153 (pass_adjust_alignment::execute): New.
4154 (make_pass_adjust_alignment): New.
4155 * tree-pass.h (make_pass_adjust_alignment): New.
4156 * passes.def: Add pass_adjust_alignment.
4158 2020-05-19 Alex Coplan <alex.coplan@arm.com>
4161 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
4162 identity permutation.
4164 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
4166 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
4167 msp430_small, msp430_large and size24plus DejaGNU effective
4169 Improve grammar in descriptions for size20plus and size32plus effective
4172 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
4174 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
4175 callee saved registers only in xBPF.
4176 (bpf_expand_prologue): Save callee saved registers only in xBPF.
4177 (bpf_expand_epilogue): Likewise for restoring.
4178 * doc/invoke.texi (eBPF Options): Document this is activated by
4181 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
4183 * config/bpf/bpf.opt (mxbpf): New option.
4184 * doc/invoke.texi (Option Summary): Add -mxbpf.
4185 (eBPF Options): Document -mxbbpf.
4187 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
4190 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
4191 (<code>v32qiv32hi2): Ditto.
4192 (<code>v8qiv8hi2): Ditto.
4193 (<code>v16qiv16si2): Ditto.
4194 (<code>v8qiv8si2): Ditto.
4195 (<code>v4qiv4si2): Ditto.
4196 (<code>v16hiv16si2): Ditto.
4197 (<code>v8hiv8si2): Ditto.
4198 (<code>v4hiv4si2): Ditto.
4199 (<code>v8qiv8di2): Ditto.
4200 (<code>v4qiv4di2): Ditto.
4201 (<code>v2qiv2di2): Ditto.
4202 (<code>v8hiv8di2): Ditto.
4203 (<code>v4hiv4di2): Ditto.
4204 (<code>v2hiv2di2): Ditto.
4205 (<code>v8siv8di2): Ditto.
4206 (<code>v4siv4di2): Ditto.
4207 (<code>v2siv2di2): Ditto.
4209 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
4211 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
4212 (riscv_implied_info): New.
4213 (riscv_subset_list): Add handle_implied_ext.
4214 (riscv_subset_list::to_string): New parameter version_p to
4215 control output format.
4216 (riscv_subset_list::handle_implied_ext): New.
4217 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
4218 (riscv_arch_str): New parameter version_p to control output format.
4219 (riscv_expand_arch): New.
4220 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
4222 * config/riscv/riscv.h (riscv_expand_arch): New,
4223 (EXTRA_SPEC_FUNCTIONS): Define.
4224 (ASM_SPEC): Transform -march= via riscv_expand_arch.
4226 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
4228 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
4229 parse_multiletter_ext.
4230 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
4231 adjust parsing order for 's' and 'x'.
4233 2020-05-19 Richard Biener <rguenther@suse.de>
4235 * tree-vectorizer.h (_slp_tree::vectype): Add field.
4236 (SLP_TREE_VECTYPE): New.
4237 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
4239 (vect_create_new_slp_node): Likewise.
4240 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
4242 (vect_slp_analyze_node_operations): Walk nodes children for
4244 (vect_get_constant_vectors): Use local scope op variable.
4245 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
4246 (vect_model_simple_cost): Adjust.
4247 (vect_model_store_cost): Likewise.
4248 (vectorizable_store): Likewise.
4250 2020-05-18 Martin Sebor <msebor@redhat.com>
4253 * tree-object-size.c (decl_init_size): New function.
4254 (addr_object_size): Call it.
4255 * tree.h (last_field): Declare.
4256 (first_field): Add attribute nonnull.
4258 2020-05-18 Martin Sebor <msebor@redhat.com>
4261 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
4262 * tree.c (component_ref_size): Correct the handling or array members
4264 Drop a pointless test.
4265 Rename a local variable.
4267 2020-05-18 Jason Merrill <jason@redhat.com>
4269 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
4270 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
4272 2020-05-14 Jason Merrill <jason@redhat.com>
4274 * doc/install.texi (Prerequisites): Update boostrap compiler
4275 requirement to C++11/GCC 4.8.
4277 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4279 PR tree-optimization/94952
4280 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
4281 Initialize variables bitpos, bitregion_start, and bitregion_end in
4282 order to silence warnings about use of uninitialized variables.
4284 2020-05-18 Carl Love <cel@us.ibm.com>
4287 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
4288 first_match_index_<mode>.
4289 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
4290 additional test cases with zero vector elements.
4292 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
4295 * config/i386/i386-expand.c (ix86_expand_int_movcc):
4296 Avoid reversing a non-trapping comparison to a trapping one.
4298 2020-05-18 Alex Coplan <alex.coplan@arm.com>
4300 * config/arm/arm.c (output_move_double): Fix codegen when loading into
4301 a register pair with an odd base register.
4303 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
4305 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
4306 Do not emit FLAGS_REG clobber for TFmode.
4307 * config/i386/i386.md (*<code>tf2_1): Rewrite as
4308 define_insn_and_split. Mark operands 1 and 2 commutative.
4309 (*nabstf2_1): Ditto.
4310 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
4311 Do not swap memory operands. Simplify RTX generation.
4312 (neg abs SSE splitter): Ditto.
4313 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
4314 commutative. Do not swap operands. Simplify RTX generation.
4315 (*nabs<mode>2): Ditto.
4317 2020-05-18 Richard Biener <rguenther@suse.de>
4319 * tree-vect-slp.c (vect_slp_bb): Start after labels.
4320 (vect_get_constant_vectors): Really place init stmt after scalar defs.
4321 * tree-vect-stmts.c (vect_init_vector_1): Insert before
4324 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
4326 * config/i386/driver-i386.c (host_detect_local_cpu): Support
4327 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
4330 2020-05-18 Richard Biener <rguenther@suse.de>
4333 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
4334 when inlining into a non-call EH function.
4336 2020-05-18 Richard Biener <rguenther@suse.de>
4338 PR tree-optimization/95172
4339 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
4340 eventually need the conditional processing.
4341 (execute_sm_exit): When processing an orderd sequence
4342 avoid doing any conditional processing.
4343 (hoist_memory_references): Pass down whether all edges
4344 have ordered processing for a ref to execute_sm.
4346 2020-05-17 Jeff Law <law@redhat.com>
4348 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
4349 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
4350 into a single pattern using pc_or_label_operand.
4351 * config/h8300/combiner.md (bit branch patterns): Likewise.
4352 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
4354 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
4357 * config/i386/i386-features.c (has_non_address_hard_reg):
4359 (pseudo_reg_set): This. Return the SET expression. Ignore
4360 pseudo register push.
4361 (general_scalar_to_vector_candidate_p): Combine single_set and
4362 has_non_address_hard_reg calls to pseudo_reg_set.
4363 (timode_scalar_to_vector_candidate_p): Likewise.
4364 * config/i386/i386.md (*pushv1ti2): New pattern.
4366 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
4369 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
4371 * tree-vrp.c (operand_less_p): Move to...
4372 * vr-values.c (operand_less_p): ...here.
4373 * tree-vrp.h (operand_less_p): Remove.
4375 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
4377 * tree-vrp.c (operand_less_p): Move to...
4378 * vr-values.c (operand_less_p): ...here.
4379 * tree-vrp.h (operand_less_p): Remove.
4381 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
4383 * tree-vrp.c (class vrp_insert): Remove prototype for
4386 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
4388 * tree-vrp.c (class live_names): New.
4389 (live_on_edge): Move into live_names.
4390 (build_assert_expr_for): Move into vrp_insert.
4391 (find_assert_locations_in_bb): Rename from
4392 find_assert_locations_1.
4393 (process_assert_insertions_for): Move into vrp_insert.
4394 (compare_assert_loc): Same.
4395 (remove_range_assertions): Same.
4396 (dump_asserts_for): Rename to vrp_insert::dump.
4397 (debug_asserts_for): Rename to vrp_insert::debug.
4398 (dump_all_asserts): Rename to vrp_insert::dump.
4399 (debug_all_asserts): Rename to vrp_insert::debug.
4401 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
4403 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
4404 check_array_ref, check_mem_ref, and search_for_addr_array
4406 (class array_bounds_checker): ...here.
4407 (class check_array_bounds_dom_walker): Adjust to use
4408 array_bounds_checker.
4409 (check_all_array_refs): Move into array_bounds_checker and rename
4411 (class vrp_folder): Make fold_predicate_in private.
4413 2020-05-15 Jeff Law <law@redhat.com>
4415 * config/h8300/h8300.md (SFI iterator): New iterator for
4417 * config/h8300/peepholes.md (memory comparison): Use mode
4418 iterator to consolidate 3 patterns into one.
4419 (stack allocation and stack store): Handle SFmode. Handle
4422 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
4424 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
4425 RS6000_BTM_POWERPC64.
4427 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
4429 * config/i386/i386.md (SWI48DWI): New mode iterator.
4430 (*push<mode>2): Allow XMM registers.
4431 (*pushdi2_rex64): Ditto.
4432 (*pushsi2_rex64): Ditto.
4434 (push XMM reg splitter): New splitter
4436 (*pushdf) Change "x" operand constraint to "v".
4437 (*pushsf_rex64): Ditto.
4440 2020-05-15 Richard Biener <rguenther@suse.de>
4442 PR tree-optimization/92260
4443 * tree-vect-slp.c (vect_get_constant_vectors): Compute
4444 the number of vector stmts in a canonical way.
4446 2020-05-15 Martin Liska <mliska@suse.cz>
4448 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
4451 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
4453 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
4455 2020-05-15 Richard Biener <rguenther@suse.de>
4457 PR tree-optimization/95133
4458 * gimple-ssa-split-paths.c
4459 (find_block_to_duplicate_for_splitting_paths): Check for
4462 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
4464 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
4466 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
4468 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
4471 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
4472 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
4475 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
4478 * config/i386/i386.md (isa): Add sse3_noavx.
4479 (enabled): Handle sse3_noavx.
4481 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
4482 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
4483 alternatives. Match commutative vec_select selector operands.
4484 (*mmx_haddv2sf3_low): New insn pattern.
4486 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
4487 (*mmx_hsubv2sf3_low): New insn pattern.
4489 2020-05-15 Richard Biener <rguenther@suse.de>
4491 PR tree-optimization/33315
4492 * tree-ssa-sink.c: Include tree-eh.h.
4493 (sink_stats): Add commoned member.
4494 (sink_common_stores_to_bb): New function implementing store
4495 commoning by sinking to the successor.
4496 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
4497 (pass_sink_code::execute): Likewise. Record commoned stores
4500 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
4502 PR rtl-optimization/37451, part of PR target/61837
4503 * loop-doloop.c (doloop_simplify_count): New function. Simplify
4504 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
4505 (doloop_modify): Call doloop_simplify_count.
4507 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
4510 * doc/sourcebuild.texi: Document effective target lgccjit.
4512 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
4514 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
4515 define_expand, and rename the original to ...
4516 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
4517 (add<mode>3_zext_dup_exec): Likewise, with ...
4518 (add<mode>3_vcc_zext_dup_exec): ... this.
4519 (add<mode>3_zext_dup2): Likewise, with ...
4520 (add<mode>3_zext_dup_exec): ... this.
4521 (add<mode>3_zext_dup2_exec): Likewise, with ...
4522 (add<mode>3_zext_dup2): ... this.
4523 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
4524 addv64di3_zext* calls to use addv64di3_vcc_zext*.
4526 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
4529 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
4530 (extendv2sfv2df2): Ditto.
4532 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
4534 * configure: Regenerated.
4536 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
4538 * config/arm/arm.c (reg_needs_saving_p): New function.
4539 (use_return_insn): Use reg_needs_saving_p.
4540 (arm_get_vfp_saved_size): Likewise.
4541 (arm_compute_frame_layout): Likewise.
4542 (arm_save_coproc_regs): Likewise.
4543 (thumb1_expand_epilogue): Likewise.
4544 (arm_expand_epilogue_apcs_frame): Likewise.
4545 (arm_expand_epilogue): Likewise.
4547 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
4549 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
4551 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
4554 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
4556 (floatv2siv2df2): New expander.
4557 (floatunsv2siv2df2): New insn pattern.
4559 (fix_truncv2dfv2si2): New expander.
4560 (fixuns_truncv2dfv2si2): New insn pattern.
4562 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
4565 * config/aarch64/aarch64-sve-builtins.cc
4566 (handle_arm_sve_vector_bits_attribute): Create a copy of the
4567 original type's TYPE_MAIN_VARIANT, then reapply all the differences
4568 between the original type and its main variant.
4570 2020-05-14 Richard Biener <rguenther@suse.de>
4573 * real.c (real_to_decimal_for_mode): Make sure we handle
4574 a zero with nonzero exponent.
4576 2020-05-14 Jakub Jelinek <jakub@redhat.com>
4578 * Makefile.in (GTFILES): Add omp-general.c.
4579 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
4580 calls_declare_variant_alt members and initialize them in the
4582 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
4583 calls to declare_variant_alt nodes.
4584 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
4585 and calls_declare_variant_alt.
4586 (input_overwrite_node): Read them back.
4587 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
4589 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
4591 (tree_function_versioning): Copy calls_declare_variant_alt bit.
4592 * omp-offload.c (execute_omp_device_lower): Call
4593 omp_resolve_declare_variant on direct function calls.
4594 (pass_omp_device_lower::gate): Also enable for
4595 calls_declare_variant_alt functions.
4596 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
4597 (omp_context_selector_matches): Handle the case when
4598 cfun->curr_properties has PROP_gimple_any bit set.
4599 (struct omp_declare_variant_entry): New type.
4600 (struct omp_declare_variant_base_entry): New type.
4601 (struct omp_declare_variant_hasher): New type.
4602 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
4604 (omp_declare_variants): New variable.
4605 (struct omp_declare_variant_alt_hasher): New type.
4606 (omp_declare_variant_alt_hasher::hash,
4607 omp_declare_variant_alt_hasher::equal): New methods.
4608 (omp_declare_variant_alt): New variables.
4609 (omp_resolve_late_declare_variant): New function.
4610 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
4611 when called late. Create a magic declare_variant_alt fndecl and
4612 cgraph node and return that if decision needs to be deferred until
4613 after gimplification.
4614 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
4618 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
4619 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
4620 entry block if info->after_stmt is NULL, otherwise add after that stmt
4621 and update it after adding each stmt.
4622 (ipa_simd_modify_function_body): Initialize info.after_stmt.
4624 * function.h (struct function): Add has_omp_target bit.
4625 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
4627 (omp_discover_declare_target_tgt_fn_r): ... this.
4628 (omp_discover_declare_target_var_r): Call
4629 omp_discover_declare_target_tgt_fn_r instead of
4630 omp_discover_declare_target_fn_r.
4631 (omp_discover_implicit_declare_target): Also queue functions with
4632 has_omp_target bit set, for those walk with
4633 omp_discover_declare_target_fn_r, for declare target to functions
4634 walk with omp_discover_declare_target_tgt_fn_r.
4636 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
4639 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
4640 Add SSE/AVX alternative. Change operand predicates from
4641 nonimmediate_operand to register_mmxmem_operand.
4642 Enable instruction pattern for TARGET_MMX_WITH_SSE.
4643 (fix_truncv2sfv2si2): New expander.
4644 (fixuns_truncv2sfv2si2): New insn pattern.
4646 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
4647 Add SSE/AVX alternative. Change operand predicates from
4648 nonimmediate_operand to register_mmxmem_operand.
4649 Enable instruction pattern for TARGET_MMX_WITH_SSE.
4650 (floatv2siv2sf2): New expander.
4651 (floatunsv2siv2sf2): New insn pattern.
4653 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
4655 (IX86_BUILTIN_PI2FD): Ditto.
4657 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
4659 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
4661 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
4664 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
4666 * config/s390/s390.c (allocate_stack_space): Add missing updates
4667 of last_probe_offset.
4669 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
4671 * config/s390/s390.md ("allocate_stack"): Call
4672 anti_adjust_stack_and_probe_stack_clash when stack clash
4673 protection is enabled.
4674 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
4675 prototype. Remove static.
4676 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
4679 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
4681 * config/rs6000/altivec.h (vec_extractl): New #define.
4682 (vec_extracth): Likewise.
4683 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
4684 (UNSPEC_EXTRACTR): Likewise.
4685 (vextractl<mode>): New expansion.
4686 (vextractl<mode>_internal): New insn.
4687 (vextractr<mode>): New expansion.
4688 (vextractr<mode>_internal): New insn.
4689 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
4690 New built-in function.
4691 (__builtin_altivec_vextduhvlx): Likewise.
4692 (__builtin_altivec_vextduwvlx): Likewise.
4693 (__builtin_altivec_vextddvlx): Likewise.
4694 (__builtin_altivec_vextdubvhx): Likewise.
4695 (__builtin_altivec_vextduhvhx): Likewise.
4696 (__builtin_altivec_vextduwvhx): Likewise.
4697 (__builtin_altivec_vextddvhx): Likewise.
4698 (__builtin_vec_extractl): New overloaded built-in function.
4699 (__builtin_vec_extracth): Likewise.
4700 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
4701 Define overloaded forms of __builtin_vec_extractl and
4702 __builtin_vec_extracth.
4703 (builtin_function_type): Add cases to mark arguments of new
4704 built-in functions as unsigned.
4705 (rs6000_common_init_builtins): Add
4706 opaque_ftype_opaque_opaque_opaque_opaque.
4707 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
4708 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4709 for a Future Architecture): Add description of vec_extractl and
4710 vec_extractr built-in functions.
4712 2020-05-13 Richard Biener <rguenther@suse.de>
4714 * target.def (add_stmt_cost): Add new vectype parameter.
4715 * targhooks.c (default_add_stmt_cost): Adjust.
4716 * targhooks.h (default_add_stmt_cost): Likewise.
4717 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
4719 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
4720 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
4721 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
4723 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
4724 (dump_stmt_cost): Add new vectype parameter.
4725 (add_stmt_cost): Likewise.
4726 (record_stmt_cost): Likewise.
4727 (record_stmt_cost): Add overload with old signature.
4728 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
4730 (vect_get_known_peeling_cost): Likewise.
4731 (vect_estimate_min_profitable_iters): Likewise.
4732 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
4733 * tree-vect-stmts.c (record_stmt_cost): Likewise.
4734 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
4735 and pass down correct vectype and NULL stmt_info.
4736 (vect_model_simple_cost): Adjust.
4737 (vect_model_store_cost): Likewise.
4739 2020-05-13 Richard Biener <rguenther@suse.de>
4741 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
4742 (_slp_instance::group_size): Likewise.
4743 * tree-vect-loop.c (vectorizable_reduction): The group size
4744 is the number of lanes in the node.
4745 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
4746 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
4747 verify it matches the instance trees number of lanes.
4748 (vect_slp_analyze_node_operations_1): Use the numer of lanes
4749 in the node as group size.
4750 (vect_bb_vectorization_profitable_p): Use the instance root
4751 number of lanes for the size of life.
4752 (vect_schedule_slp_instance): Use the number of lanes as
4754 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
4755 parameter. Use the number of lanes of the load for the group
4756 size in the gap adjustment code.
4757 (vect_analyze_stmt): Adjust.
4758 (vect_transform_stmt): Likewise.
4760 2020-05-13 Jakub Jelinek <jakub@redhat.com>
4763 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
4764 if the last insn is a note.
4766 PR tree-optimization/95060
4767 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
4768 if it is the single use of the FMA internal builtin.
4770 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
4772 PR tree-optimization/94969
4773 * tree-data-dependence.c (constant_access_functions): Rename to...
4774 (invariant_access_functions): ...this. Add parameter. Check for
4775 invariant access function, rather than constant.
4776 (build_classic_dist_vector): Call above function.
4777 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
4779 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
4782 * doc/extend.texi (x86Operandmodifiers): Document more x86
4784 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
4786 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
4788 * tree-vrp.c (class vrp_insert): New.
4789 (insert_range_assertions): Move to class vrp_insert.
4790 (dump_all_asserts): Same as above.
4791 (dump_asserts_for): Same as above.
4792 (live): Same as above.
4793 (need_assert_for): Same as above.
4794 (live_on_edge): Same as above.
4795 (finish_register_edge_assert_for): Same as above.
4796 (find_switch_asserts): Same as above.
4797 (find_assert_locations): Same as above.
4798 (find_assert_locations_1): Same as above.
4799 (find_conditional_asserts): Same as above.
4800 (process_assert_insertions): Same as above.
4801 (register_new_assert_for): Same as above.
4802 (vrp_prop): New variable fun.
4803 (vrp_initialize): New parameter.
4804 (identify_jump_threads): Same as above.
4805 (execute_vrp): Same as above.
4808 2020-05-12 Keith Packard <keith.packard@sifive.com>
4810 * config/riscv/riscv.c (riscv_unique_section): New.
4811 (TARGET_ASM_UNIQUE_SECTION): New.
4813 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
4815 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
4816 * config/riscv/riscv-passes.def: New file.
4817 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
4818 * config/riscv/riscv-shorten-memrefs.c: New file.
4819 * config/riscv/riscv.c (tree-pass.h): New include.
4820 (riscv_compressed_reg_p): New Function
4821 (riscv_compressed_lw_offset_p): Likewise.
4822 (riscv_compressed_lw_address_p): Likewise.
4823 (riscv_shorten_lw_offset): Likewise.
4824 (riscv_legitimize_address): Attempt to convert base + large_offset
4825 to compressible new_base + small_offset.
4826 (riscv_address_cost): Make anticipated compressed load/stores
4827 cheaper for code size than uncompressed load/stores.
4828 (riscv_register_priority): Move compressed register check to
4829 riscv_compressed_reg_p.
4830 * config/riscv/riscv.h (C_S_BITS): Define.
4831 (CSW_MAX_OFFSET): Define.
4832 * config/riscv/riscv.opt (mshorten-memefs): New option.
4833 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
4834 (PASSES_EXTRA): Add riscv-passes.def.
4835 * doc/invoke.texi: Document -mshorten-memrefs.
4837 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
4838 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
4839 * doc/tm.texi: Regenerate.
4840 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
4841 * sched-deps.c (attempt_change): Use old address if it is cheaper than
4843 * target.def (new_address_profitable_p): New hook.
4844 * targhooks.c (default_new_address_profitable_p): New function.
4845 * targhooks.h (default_new_address_profitable_p): Declare.
4847 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
4850 * config/i386/mmx.md (copysignv2sf3): New expander.
4851 (xorsignv2sf3): Ditto.
4852 (signbitv2sf3): Ditto.
4854 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
4857 * config/i386/mmx.md (fmav2sf4): New insn pattern.
4862 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
4864 * Makefile.in (CET_HOST_FLAGS): New.
4865 (COMPILER): Add $(CET_HOST_FLAGS).
4866 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
4867 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
4869 * aclocal.m4: Regenerated.
4870 * configure: Likewise.
4872 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
4875 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
4876 (*mmx_<code>v2sf2): New insn_and_split pattern.
4877 (*mmx_nabsv2sf2): Ditto.
4878 (*mmx_andnotv2sf3): New insn pattern.
4879 (*mmx_<code>v2sf3): Ditto.
4880 * config/i386/i386.md (absneg_op): New code attribute.
4881 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
4882 (ix86_build_signbit_mask): Ditto.
4884 2020-05-12 Richard Biener <rguenther@suse.de>
4886 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
4889 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
4891 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
4892 Update prototype to include "local" argument.
4893 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
4894 "local" argument. Handle local common decls.
4895 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
4896 msp430_output_aligned_decl_common call with 0 for "local" argument.
4897 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
4899 2020-05-12 Richard Biener <rguenther@suse.de>
4901 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
4903 2020-05-12 Martin Liska <mliska@suse.cz>
4907 * sanopt.c (sanitize_rewrite_addressable_params):
4908 Clear DECL_NOT_GIMPLE_REG_P for argument.
4910 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
4912 PR tree-optimization/94980
4913 * tree-vect-generic.c (expand_vector_comparison): Use
4914 vector_element_bits_tree to get the element size in bits,
4915 rather than using TYPE_SIZE.
4916 (expand_vector_condition, vector_element): Likewise.
4918 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
4920 PR tree-optimization/94980
4921 * tree-vect-generic.c (build_replicated_const): Take the number
4922 of bits as a parameter, instead of the type of the elements.
4923 (do_plus_minus): Update accordingly, using vector_element_bits
4924 to calculate the correct number of bits.
4925 (do_negate): Likewise.
4927 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
4929 PR tree-optimization/94980
4930 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
4931 * tree.c (vector_element_bits, vector_element_bits_tree): New.
4932 * match.pd: Use the new functions instead of determining the
4933 vector element size directly from TYPE_SIZE(_UNIT).
4934 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
4935 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
4936 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
4937 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
4938 (expand_vector_conversion): Likewise.
4939 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
4940 a divisor. Convert the dividend to bits to compensate.
4941 * tree-vect-loop.c (vectorizable_live_operation): Call
4942 vector_element_bits instead of open-coding it.
4944 2020-05-12 Jakub Jelinek <jakub@redhat.com>
4946 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
4947 * omp-offload.c: Include context.h.
4948 (omp_declare_target_fn_p, omp_declare_target_var_p,
4949 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
4950 omp_discover_implicit_declare_target): New functions.
4951 * cgraphunit.c (analyze_functions): Call
4952 omp_discover_implicit_declare_target.
4954 2020-05-12 Richard Biener <rguenther@suse.de>
4956 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
4957 literal constant &MEM[..] to a constant literal.
4959 2020-05-12 Richard Biener <rguenther@suse.de>
4961 PR tree-optimization/95045
4962 * dbgcnt.def (lim): Add debug-counter.
4963 * tree-ssa-loop-im.c: Include dbgcnt.h.
4964 (find_refs_for_sm): Use lim debug counter for store motion
4966 (do_store_motion): Rename form store_motion. Commit edge
4968 (store_motion_loop): ... here.
4969 (tree_ssa_lim): Adjust.
4971 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4973 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
4974 (vec_ctzm): Rename to vec_cnttzm.
4975 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
4976 Change fourth operand for vec_ternarylogic to require
4977 compatibility with unsigned SImode rather than unsigned QImode.
4978 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
4979 Remove overloaded forms of vec_gnb that are no longer needed.
4980 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4981 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
4982 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
4983 vec_gnb; move vec_ternarylogic documentation into this section
4984 and replace const unsigned char with const unsigned int as its
4987 2020-05-11 Carl Love <cel@us.ibm.com>
4989 * config/rs6000/altivec.h (vec_genpcvm): New #define.
4990 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
4992 (XXGENPCVM_V8HI): Likewise.
4993 (XXGENPCVM_V4SI): Likewise.
4994 (XXGENPCVM_V2DI): Likewise.
4995 (XXGENPCVM): New overloaded built-in instantiation.
4996 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
4997 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
4998 (altivec_expand_builtin): Add special handling for
4999 FUTURE_BUILTIN_VEC_XXGENPCVM.
5000 (builtin_function_type): Add handling for
5001 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
5002 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
5003 (UNSPEC_XXGENPCV): New constant.
5004 (xxgenpcvm_<mode>_internal): New insn.
5005 (xxgenpcvm_<mode>): New expansion.
5006 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
5008 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5010 * config/rs6000/altivec.h (vec_strir): New #define.
5011 (vec_stril): Likewise.
5012 (vec_strir_p): Likewise.
5013 (vec_stril_p): Likewise.
5014 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
5015 (UNSPEC_VSTRIL): Likewise.
5016 (vstrir_<mode>): New expansion.
5017 (vstrir_code_<mode>): New insn.
5018 (vstrir_p_<mode>): New expansion.
5019 (vstrir_p_code_<mode>): New insn.
5020 (vstril_<mode>): New expansion.
5021 (vstril_code_<mode>): New insn.
5022 (vstril_p_<mode>): New expansion.
5023 (vstril_p_code_<mode>): New insn.
5024 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
5025 New built-in function.
5026 (__builtin_altivec_vstrihr): Likewise.
5027 (__builtin_altivec_vstribl): Likewise.
5028 (__builtin_altivec_vstrihl): Likewise.
5029 (__builtin_altivec_vstribr_p): Likewise.
5030 (__builtin_altivec_vstrihr_p): Likewise.
5031 (__builtin_altivec_vstribl_p): Likewise.
5032 (__builtin_altivec_vstrihl_p): Likewise.
5033 (__builtin_vec_strir): New overloaded built-in function.
5034 (__builtin_vec_stril): Likewise.
5035 (__builtin_vec_strir_p): Likewise.
5036 (__builtin_vec_stril_p): Likewise.
5037 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
5038 Define overloaded forms of __builtin_vec_strir,
5039 __builtin_vec_stril, __builtin_vec_strir_p, and
5040 __builtin_vec_stril_p.
5041 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
5042 for a Future Architecture): Add description of vec_stril,
5043 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
5045 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
5047 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
5048 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
5050 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
5051 * config/rs6000/rs6000-builtin.def: Add handling of new macro
5053 (BU_FUTURE_V_4): New macro. Use it.
5054 (BU_FUTURE_OVERLOAD_4): Likewise.
5055 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
5056 handling for quaternary built-in functions.
5057 (altivec_resolve_overloaded_builtin): Add special-case handling
5058 for __builtin_vec_xxeval.
5059 * config/rs6000/rs6000-call.c: Add handling of new macro
5060 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
5061 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
5062 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
5063 (altivec_overloaded_builtins): Add definitions for
5064 FUTURE_BUILTIN_VEC_XXEVAL.
5065 (bdesc_4arg): New array.
5066 (htm_expand_builtin): Add handling for quaternary built-in
5068 (rs6000_expand_quaternop_builtin): New function.
5069 (rs6000_expand_builtin): Add handling for quaternary built-in
5071 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
5072 for unsigned QImode and unsigned HImode.
5073 (builtin_quaternary_function_type): New function.
5074 (rs6000_common_init_builtins): Add handling of quaternary
5076 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
5078 (RS6000_BTC_PREDICATE): Change value of constant.
5079 (RS6000_BTC_ABS): Likewise.
5080 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
5081 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
5082 for a Future Architecture): Add description of vec_ternarylogic
5085 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5087 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
5089 (__builtin_pextd): Likewise.
5090 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
5091 (UNSPEC_PEXTD): Likewise.
5094 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
5095 a Future Architecture): Add descriptions of __builtin_pdepd and
5096 __builtin_pextd functions.
5098 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5100 * config/rs6000/altivec.h (vec_clrl): New #define.
5101 (vec_clrr): Likewise.
5102 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
5103 (UNSPEC_VCLRRB): Likewise.
5106 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
5108 (__builtin_altivec_vclrrb): Likewise.
5109 (__builtin_vec_clrl): New overloaded built-in function.
5110 (__builtin_vec_clrr): Likewise.
5111 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
5112 Define overloaded forms of __builtin_vec_clrl and
5114 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
5115 for a Future Architecture): Add descriptions of vec_clrl and
5118 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5120 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
5121 built-in function definition.
5122 (__builtin_cnttzdm): Likewise.
5123 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
5124 (UNSPEC_CNTTZDM): Likewise.
5125 (cntlzdm): New insn.
5126 (cnttzdm): Likewise.
5127 * doc/extend.texi (Basic PowerPC Built-in Functions available for
5128 a Future Architecture): Add descriptions of __builtin_cntlzdm and
5129 __builtin_cnttzdm functions.
5131 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
5134 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
5136 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5138 * config/rs6000/altivec.h (vec_cfuge): New #define.
5139 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
5140 (vcfuged): New insn.
5141 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
5142 New built-in function.
5143 * config/rs6000/rs6000-call.c (builtin_function_type): Add
5144 handling for FUTURE_BUILTIN_VCFUGED case.
5145 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
5146 for a Future Architecture): Add description of vec_cfuge built-in
5149 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5151 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
5153 (BU_FUTURE_MISC_1): Likewise.
5154 (BU_FUTURE_MISC_2): Likewise.
5155 (BU_FUTURE_MISC_3): Likewise.
5156 (__builtin_cfuged): New built-in function definition.
5157 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
5159 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
5160 a Future Architecture): New subsubsection.
5162 2020-05-11 Richard Biener <rguenther@suse.de>
5164 PR tree-optimization/95049
5165 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
5166 between different constants.
5168 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
5170 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
5172 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5173 Bill Schmidt <wschmidt@linux.ibm.com>
5175 * config/rs6000/altivec.h (vec_gnb): New #define.
5176 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
5178 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
5180 (BU_FUTURE_OVERLOAD_2): Likewise.
5181 (BU_FUTURE_OVERLOAD_3): Likewise.
5182 (__builtin_altivec_gnb): New built-in function.
5183 (__buiiltin_vec_gnb): New overloaded built-in function.
5184 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
5185 Define overloaded forms of __builtin_vec_gnb.
5186 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
5187 of __builtin_vec_gnb.
5188 (builtin_function_type): Mark return value and arguments unsigned
5189 for FUTURE_BUILTIN_VGNB.
5190 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
5191 for a Future Architecture): Add description of vec_gnb built-in
5194 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5195 Bill Schmidt <wschmidt@linux.ibm.com>
5197 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
5199 (vec_pext): Likewise.
5200 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
5201 (UNSPEC_VPEXTD): Likewise.
5204 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
5206 (__builtin_altivec_vpextd): Likewise.
5207 * config/rs6000/rs6000-call.c (builtin_function_type): Add
5208 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
5210 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
5211 for a Future Architecture): Add description of vec_pdep and
5212 vec_pext built-in functions.
5214 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
5215 Bill Schmidt <wschmidt@linux.ibm.com>
5217 * config/rs6000/altivec.h (vec_clzm): New macro.
5218 (vec_ctzm): Likewise.
5219 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
5220 (UNSPEC_VCTZDM): Likewise.
5223 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
5224 (BU_FUTURE_V_1): Likewise.
5225 (BU_FUTURE_V_2): Likewise.
5226 (BU_FUTURE_V_3): Likewise.
5227 (__builtin_altivec_vclzdm): New builtin definition.
5228 (__builtin_altivec_vctzdm): Likewise.
5229 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
5230 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
5232 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
5233 value and parameter types to be unsigned for VCLZDM and VCTZDM.
5234 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
5235 support for TARGET_FUTURE flag.
5236 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
5237 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
5238 for a Future Architecture): New subsubsection.
5240 2020-05-11 Richard Biener <rguenther@suse.de>
5242 PR tree-optimization/94988
5243 PR tree-optimization/95025
5244 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
5245 (sm_seq_push_down): Take extra parameter denoting where we
5247 (execute_sm_exit): Re-issue sm_other stores in the correct
5249 (sm_seq_valid_bb): When always executed, allow sm_other to
5250 prevail inbetween sm_ord and record their stored value.
5251 (hoist_memory_references): Adjust refs_not_supported propagation
5252 and prune sm_other from the end of the ordered sequences.
5254 2020-05-11 Felix Yang <felix.yang@huawei.com>
5257 * config/aarch64/aarch64.md (mov<mode>):
5258 Bitcasts to the equivalent integer mode using gen_lowpart
5259 instead of doing FAIL for scalar floating point move.
5261 2020-05-11 Alex Coplan <alex.coplan@arm.com>
5263 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
5264 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
5265 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
5266 (*csinv3_uxtw_insn2): New.
5267 (*csinv3_uxtw_insn3): New.
5268 * config/aarch64/iterators.md (neg_not_cs): New.
5270 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
5273 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
5274 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
5275 (*mmx_addv2sf3): Ditto.
5276 (*mmx_subv2sf3): Ditto.
5277 (*mmx_mulv2sf3): Ditto.
5278 (*mmx_<code>v2sf3): Ditto.
5279 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
5281 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
5284 * config/i386/i386.c (ix86_vector_mode_supported_p):
5285 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
5286 * config/i386/mmx.md (*mov<mode>_internal): Do not set
5287 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
5289 (mmx_addv2sf3): Change operand predicates from
5290 nonimmediate_operand to register_mmxmem_operand.
5291 (addv2sf3): New expander.
5292 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
5293 predicates from nonimmediate_operand to register_mmxmem_operand.
5294 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5296 (mmx_subv2sf3): Change operand predicate from
5297 nonimmediate_operand to register_mmxmem_operand.
5298 (mmx_subrv2sf3): Ditto.
5299 (subv2sf3): New expander.
5300 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
5301 predicates from nonimmediate_operand to register_mmxmem_operand.
5302 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5304 (mmx_mulv2sf3): Change operand predicates from
5305 nonimmediate_operand to register_mmxmem_operand.
5306 (mulv2sf3): New expander.
5307 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
5308 predicates from nonimmediate_operand to register_mmxmem_operand.
5309 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5311 (mmx_<code>v2sf3): Change operand predicates from
5312 nonimmediate_operand to register_mmxmem_operand.
5313 (<code>v2sf3): New expander.
5314 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
5315 predicates from nonimmediate_operand to register_mmxmem_operand.
5316 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5317 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
5319 2020-05-11 Martin Liska <mliska@suse.cz>
5322 * common.opt: Fix typo in option description.
5324 2020-05-11 Martin Liska <mliska@suse.cz>
5326 PR gcov-profile/94928
5327 * gcov-io.h: Add caveat about coverage format parsing and
5328 possible outdated documentation.
5330 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
5332 PR tree-optimization/83403
5333 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
5334 determine_value_range, Add fold conversion of MULT_EXPR, fix the
5337 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
5339 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
5340 __ILP32__ for 32-bit targets.
5342 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
5344 * tree.h (expr_align): Delete.
5345 * tree.c (expr_align): Likewise.
5347 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
5349 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
5350 from end_of_function_needs.
5352 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
5353 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
5355 * config/cris/t-elfmulti: Remove crisv32 multilib.
5356 * config/cris: Remove shared-library and CRIS v32 support.
5358 Move trivially from cc0 to reg:CC model, removing most optimizations.
5359 * config/cris/cris.md: Remove all side-effect patterns and their
5360 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
5361 to all but post-reload control-flow and movem insns. Remove
5362 constraints on all modified expanders. Remove obsoleted cc0-related
5364 (attr "cc"): Remove alternative "rev".
5365 (mode_iterator BWDD, DI_, SI_): New.
5366 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
5367 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
5368 ("mstep_shift", "mstep_mul"): Remove patterns.
5369 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
5370 * config/cris/cris.c: Change all non-condition-code,
5371 non-control-flow emitted insns to add a parallel with clobber of
5372 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
5373 emit_insn to use of emit_move_insn, gen_add2_insn or
5374 cris_emit_insn, as convenient.
5375 (cris_reg_overlap_mentioned_p)
5376 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
5377 (cris_movem_load_rest_p): Don't assume all elements in a
5379 (cris_store_multiple_op_p): Ditto.
5380 (cris_emit_insn): New function.
5381 * cris/cris-protos.h (cris_emit_insn): Declare.
5384 * config/cris/cris.md (zcond): New code_iterator.
5385 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
5387 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
5389 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
5391 * config/cris/cris.md ("movsi"): For memory destination
5392 post-reload, generate clobberless variant. Similarly for a
5393 zero-source post-reload.
5394 ("*mov_tomem<mode>_split"): New split.
5395 ("*mov_tomem<mode>"): New insn.
5396 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
5397 "Q>m" for less-than-SImode.
5398 ("*mov_fromzero<mode>_split"): New split.
5399 ("*mov_fromzero<mode>"): New insn.
5401 Prepare for cmpelim pass to eliminate redundant compare insns.
5402 * config/cris/cris-modes.def: New file.
5403 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
5404 (cris_notice_update_cc): Remove left-over declaration.
5405 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
5406 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
5407 * config/cris/cris.h (SELECT_CC_MODE): Define.
5408 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
5410 (cond): New code_iterator.
5411 (nzcond): Replacement for incorrect ncond. All callers changed.
5412 (nzvccond): Replacement for ocond. All callers changed.
5413 (rnzcond): Replacement for rcond. All callers changed.
5414 (xCC): New code_attr.
5415 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
5417 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
5418 CCmode with iteration over NZVCSET.
5419 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
5421 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
5422 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
5423 ("*btst<mode>"): Similarly, from "*btst".
5424 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
5425 iterating over cond instead of matching the comparison with
5426 ordered_comparison_operator.
5427 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
5428 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
5430 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
5431 NZVCUSE. Remove FIXME.
5432 ("*b<nzcond:code>_reversed<mode>"): Similarly from
5433 "*b<ncond:code>_reversed", over NZUSE.
5434 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
5435 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
5436 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
5437 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
5438 depending on CC_NZmode vs. CCmode. Remove FIXME.
5439 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
5440 "*b<rcond:code>_reversed", over NZUSE.
5441 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
5442 iterating over cond instead of matching the comparison with
5443 ordered_comparison_operator.
5444 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
5445 iterating over NZUSE.
5446 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
5447 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
5448 depending on CC_NZmode vs. CCmode.
5449 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
5450 NZVCUSE. Remove FIXME.
5451 ("cc"): Comment on new use.
5452 ("cc_enabled"): New attribute.
5453 ("enabled"): Make default fall back to cc_enabled.
5454 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
5455 default_subst_attrs.
5456 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
5457 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
5458 "*movsi_internal". Correct contents of, and rename attribute
5459 "cc" to "cc<cccc><ccnz><ccnzvc>".
5460 ("anz", "anzvc", "acc"): New define_subst_attrs.
5461 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
5462 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
5463 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
5464 "movqi". Correct contents of, and rename "cc" attribute to
5465 "cc<cccc><ccnz><ccnzvc>".
5466 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
5467 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
5468 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
5469 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
5470 Rename from "extend<mode>si2".
5471 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
5472 Similar, from "zero_extend<mode>si2".
5473 ("*adddi3<setnz>"): Rename from "*adddi3".
5474 ("*subdi3<setnz>"): Similarly from "*subdi3".
5475 ("*addsi3<setnz>"): Similarly from "*addsi3".
5476 ("*subsi3<setnz>"): Similarly from "*subsi3".
5477 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
5478 "cc" attribute to "cc<ccnz>".
5479 ("*addqi3<setnz>"): Similarly from "*addqi3".
5480 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
5481 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
5483 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
5484 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
5485 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
5486 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
5487 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
5488 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
5489 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
5490 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
5492 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
5494 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
5496 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
5498 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
5500 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
5502 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
5503 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
5504 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
5505 (znnCC, rznnCC): New code_attrs.
5506 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
5507 obseolete comment. Add belt-and-suspenders mode-test to condition.
5508 Add fixme regarding remaining matched-but-not-generated case.
5509 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
5510 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
5511 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
5512 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
5513 Handle output of CC_ZnNmode.
5514 ("*b<nzcond:code>_reversed<mode>"): Ditto.
5516 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
5517 NEG too. Correct comment.
5518 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
5521 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
5523 * ira-color.c (update_costs_from_allocno): Remove
5524 conflict_cost_update_p argument. Propagate costs only along
5525 threads. Always do conflict cost update. Add printing debugging
5527 (update_costs_from_copies): Add printing debugging info.
5528 (restore_costs_from_copies): Ditto.
5529 (assign_hard_reg): Improve debug info.
5530 (push_only_colorable): Ditto. Call update_costs_from_prefs.
5531 (color_allocnos): Remove update_costs_from_prefs.
5533 2020-05-08 Richard Biener <rguenther@suse.de>
5535 * tree-vectorizer.h (vec_info::slp_loads): New.
5536 (vect_optimize_slp): Declare.
5537 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
5538 nothing when there are no loads.
5539 (vect_gather_slp_loads): Gather loads into a vector.
5540 (vect_supported_load_permutation_p): Remove.
5541 (vect_analyze_slp_instance): Do not verify permutation
5543 (vect_analyze_slp): Optimize permutations of reductions
5544 after all SLP instances have been gathered and gather
5546 (vect_optimize_slp): New function split out from
5547 vect_supported_load_permutation_p. Elide some permutations.
5548 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
5549 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
5550 * tree-vect-stmts.c (vectorizable_load): Check whether
5551 the load can be permuted. When generating code assert we can.
5553 2020-05-08 Richard Biener <rguenther@suse.de>
5555 * tree-ssa-sccvn.c (rpo_avail): Change type to
5556 eliminate_dom_walker *.
5557 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
5558 use the DOM walker availability.
5559 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
5560 with vn_valueize as valueization callback.
5561 (vn_reference_maybe_forwprop_address): Likewise.
5562 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
5563 array_ref_low_bound.
5565 2020-05-08 Jakub Jelinek <jakub@redhat.com>
5567 PR tree-optimization/94786
5568 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
5572 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
5576 * tree.c (get_narrower): Reuse the op temporary instead of
5579 PR tree-optimization/94783
5580 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
5583 PR tree-optimization/94956
5584 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
5585 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
5587 PR tree-optimization/94913
5588 * match.pd (A - B + -1 >= A to B >= A): New simplification.
5589 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
5590 true for TYPE_UNSIGNED integral types.
5593 PR rtl-optimization/94516
5594 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
5596 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
5597 Call df_notes_rescan if that argument is not true and returning true.
5598 * combine.c (adjust_for_new_dest): Pass true as second argument to
5599 remove_reg_equal_equiv_notes.
5600 * postreload.c (reload_combine_recognize_pattern): Don't call
5603 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
5605 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
5607 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
5608 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
5609 (*neg_ne_<mode>): Likewise.
5611 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
5613 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
5615 (*setbcr_<un>signed_<GPR:mode>): Likewise.
5616 (cstore<mode>4): Use setbc[r] if available.
5617 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
5618 (eq<mode>3): Use setbc for TARGET_FUTURE.
5619 (*eq<mode>3): Avoid for TARGET_FUTURE.
5620 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
5621 else for non-Pmode, use gen_eq and gen_xor.
5622 (*ne<mode>3): Avoid for TARGET_FUTURE.
5623 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
5625 2020-05-07 Jeff Law <law@redhat.com>
5627 * config/h8300/h8300.md: Move expanders and patterns into
5628 files based on functionality.
5629 * config/h8300/addsub.md: New file.
5630 * config/h8300/bitfield.md: New file
5631 * config/h8300/combiner.md: New file
5632 * config/h8300/divmod.md: New file
5633 * config/h8300/extensions.md: New file
5634 * config/h8300/jumpcall.md: New file
5635 * config/h8300/logical.md: New file
5636 * config/h8300/movepush.md: New file
5637 * config/h8300/multiply.md: New file
5638 * config/h8300/other.md: New file
5639 * config/h8300/proepi.md: New file
5640 * config/h8300/shiftrotate.md: New file
5641 * config/h8300/testcompare.md: New file
5643 * config/h8300/h8300.md (adds/subs splitters): Merge into single
5645 (negation expanders and patterns): Simplify and combine using
5647 (one_cmpl expanders and patterns): Likewise.
5648 (tablejump, indirect_jump patterns ): Likewise.
5649 (shift and rotate expanders and patterns): Likewise.
5650 (absolute value expander and pattern): Drop expander, rename pattern
5652 (peephole2 patterns): Move into...
5653 * config/h8300/peepholes.md: New file.
5655 * config/h8300/constraints.md (L and N): Simplify now that we're not
5656 longer supporting the original H8/300 chip.
5657 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
5658 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
5659 (shift_alg_hi, shift_alg_si): Similarly.
5660 (h8300_option_overrides): Similarly. Default to H8/300H. If
5661 compiling for H8/S, then turn off H8/300H. Do not update the
5662 shift_alg tables for H8/300 port.
5663 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
5665 (push, split_adds_subs, h8300_rtx_costs): Likewise.
5666 (h8300_print_operand, compute_mov_length): Likewise.
5667 (output_plussi, compute_plussi_length): Likewise.
5668 (compute_plussi_cc, output_logical_op): Likewise.
5669 (compute_logical_op_length, compute_logical_op_cc): Likewise.
5670 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
5671 (output_a_shift, compute_a_shift_length): Likewise.
5672 (output_a_rotate, compute_a_rotate_length): Likewise.
5673 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
5674 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
5675 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
5676 (attr_cpu, TARGET_H8300): Remove.
5677 (TARGET_DEFAULT): Update.
5678 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
5679 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
5680 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
5681 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
5682 * config/h8300/h8300.md: Simplify patterns throughout.
5683 * config/h8300/t-h8300: Update multilib configuration.
5685 * config/h8300/h8300.h (LINK_SPEC): Remove.
5686 (USER_LABEL_PREFIX): Likewise.
5688 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
5689 (h8300_option_override): Remove remnants of COFF support.
5691 2020-05-07 Alan Modra <amodra@gmail.com>
5693 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
5694 set_rtx_cost with set_src_cost.
5695 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
5697 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
5699 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
5700 redundant half vector handlings for no peeling gaps.
5702 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
5704 * tree-ssa-operands.c (operands_scanner): New class.
5705 (operands_bitmap_obstack): Remove.
5706 (n_initialized): Remove.
5707 (build_uses): Move to operands_scanner class.
5708 (build_vuse): Same as above.
5709 (build_vdef): Same as above.
5710 (verify_ssa_operands): Same as above.
5711 (finalize_ssa_uses): Same as above.
5712 (cleanup_build_arrays): Same as above.
5713 (finalize_ssa_stmt_operands): Same as above.
5714 (start_ssa_stmt_operands): Same as above.
5715 (append_use): Same as above.
5716 (append_vdef): Same as above.
5717 (add_virtual_operand): Same as above.
5718 (add_stmt_operand): Same as above.
5719 (get_mem_ref_operands): Same as above.
5720 (get_tmr_operands): Same as above.
5721 (maybe_add_call_vops): Same as above.
5722 (get_asm_stmt_operands): Same as above.
5723 (get_expr_operands): Same as above.
5724 (parse_ssa_operands): Same as above.
5725 (finalize_ssa_defs): Same as above.
5726 (build_ssa_operands): Same as above, plus create a C-like wrapper.
5727 (update_stmt_operands): Create an instance of operands_scanner.
5729 2020-05-07 Richard Biener <rguenther@suse.de>
5732 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
5733 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
5734 (refered_from_nonlocal_var): Likewise.
5735 (ipa_pta_execute): Likewise.
5737 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
5739 * gcc/tree-ssa-struct-alias.c: Fix comments
5741 2020-05-07 Martin Liska <mliska@suse.cz>
5743 * doc/invoke.texi: Fix 2 optindex entries.
5745 2020-05-07 Richard Biener <rguenther@suse.de>
5748 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
5749 (tree_decl_common::not_gimple_reg_flag): ... to this.
5750 * tree.h (DECL_GIMPLE_REG_P): Rename ...
5751 (DECL_NOT_GIMPLE_REG_P): ... to this.
5752 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
5753 (create_tmp_reg): Simplify.
5754 (create_tmp_reg_fn): Likewise.
5755 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
5756 * gimplify.c (create_tmp_from_val): Simplify.
5757 (gimplify_bind_expr): Likewise.
5758 (gimplify_compound_literal_expr): Likewise.
5759 (gimplify_function_tree): Likewise.
5760 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
5761 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
5762 (asan_add_global): Copy it.
5763 * cgraphunit.c (cgraph_node::expand_thunk): Force args
5765 * function.c (gimplify_parameters): Copy
5766 DECL_NOT_GIMPLE_REG_P.
5767 * ipa-param-manipulation.c
5768 (ipa_param_body_adjustments::common_initialization): Simplify.
5769 (ipa_param_body_adjustments::reset_debug_stmts): Copy
5770 DECL_NOT_GIMPLE_REG_P.
5771 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
5772 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
5773 * tree-cfg.c (make_blocks_1): Simplify.
5774 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
5775 * tree-eh.c (lower_eh_constructs_2): Simplify.
5776 * tree-inline.c (declare_return_variable): Adjust and
5778 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
5779 (copy_result_decl_to_var): Likewise.
5780 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
5781 * tree-nested.c (create_tmp_var_for): Simplify.
5782 * tree-parloops.c (separate_decls_in_region_name): Copy
5783 DECL_NOT_GIMPLE_REG_P.
5784 * tree-sra.c (create_access_replacement): Adjust and
5785 generalize partial def support.
5786 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
5787 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
5788 * tree-ssa.c (maybe_optimize_var): Handle clearing of
5789 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
5791 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
5792 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
5793 DECL_NOT_GIMPLE_REG_P.
5794 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
5795 * cfgexpand.c (avoid_type_punning_on_regs): New.
5796 (discover_nonconstant_array_refs): Call
5797 avoid_type_punning_on_regs to avoid unsupported mode punning.
5799 2020-05-07 Alex Coplan <alex.coplan@arm.com>
5801 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
5804 2020-05-07 Richard Biener <rguenther@suse.de>
5806 PR tree-optimization/57359
5807 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
5808 (in_mem_ref::dep_loop): Repurpose.
5809 (LOOP_DEP_BIT): Remove.
5810 (enum dep_kind): New.
5811 (enum dep_state): Likewise.
5812 (record_loop_dependence): New function to populate the
5814 (query_loop_dependence): New function to query the dependence
5816 (memory_accesses::refs_in_loop): Rename to ...
5817 (memory_accesses::refs_loaded_in_loop): ... this and change to
5819 (outermost_indep_loop): Adjust.
5820 (mem_ref_alloc): Likewise.
5821 (gather_mem_refs_stmt): Likewise.
5822 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
5823 (struct sm_aux): New.
5824 (execute_sm): Split code generation on exits, record state
5826 (enum sm_kind): New.
5827 (execute_sm_exit): Exit code generation part.
5828 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
5829 dependence checking on stores reached from exits.
5830 (sm_seq_valid_bb): New function gathering SM stores on exits.
5831 (hoist_memory_references): Re-implement.
5832 (refs_independent_p): Add tbaa_p parameter and pass it down.
5833 (record_dep_loop): Remove.
5834 (ref_indep_loop_p_1): Fold into ...
5835 (ref_indep_loop_p): ... this and generalize for three kinds
5836 of dependence queries.
5837 (can_sm_ref_p): Adjust according to hoist_memory_references
5839 (store_motion_loop): Don't do anything if the set of SM
5840 candidates is empty.
5841 (tree_ssa_lim_initialize): Adjust.
5842 (tree_ssa_lim_finalize): Likewise.
5844 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
5845 Pierre-Marie de Rodat <derodat@adacore.com>
5847 * dwarf2out.c (add_data_member_location_attribute): Take into account
5848 the variant part offset in the computation of the data bit offset.
5849 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
5850 in the call to field_byte_offset.
5851 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
5852 confusing assertion.
5853 (analyze_variant_discr): Deal with boolean subtypes.
5855 2020-05-07 Martin Liska <mliska@suse.cz>
5857 * lto-wrapper.c: Split arguments of MAKE environment
5860 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
5862 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
5863 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
5864 fenv_var and new_fenv_var.
5866 2020-05-06 Jakub Jelinek <jakub@redhat.com>
5869 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
5871 (avx512dq_vextract<shuffletype>64x2_1_maskm,
5872 avx512f_vextract<shuffletype>32x4_1_maskm,
5873 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
5874 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
5876 (*avx512dq_vextract<shuffletype>64x2_1,
5877 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
5878 define_insns. Even in the masked variant allow memory output but in
5879 that case use 0 rather than 0C constraint on the source of masked-out
5881 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
5883 (*avx512f_vextract<shuffletype>32x4_1,
5884 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
5885 Even in the masked variant allow memory output but in that case use
5886 0 rather than 0C constraint on the source of masked-out elts.
5887 (vec_extract_lo_<mode><mask_name>): Split into ...
5888 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
5889 define_insns. Even in the masked variant allow memory output but in
5890 that case use 0 rather than 0C constraint on the source of masked-out
5892 (vec_extract_hi_<mode><mask_name>): Split into ...
5893 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
5894 define_insns. Even in the masked variant allow memory output but in
5895 that case use 0 rather than 0C constraint on the source of masked-out
5898 2020-05-06 qing zhao <qing.zhao@oracle.com>
5901 * common.opt: Add -flarge-source-files.
5902 * doc/invoke.texi: Document it.
5903 * toplev.c (process_options): set line_table->default_range_bits
5904 to 0 when flag_large_source_files is true.
5906 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
5909 * config/i386/predicates.md (add_comparison_operator): New predicate.
5910 * config/i386/i386.md (compare->add splitter): New splitters.
5912 2020-05-06 Richard Biener <rguenther@suse.de>
5914 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
5915 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
5916 Remove slp_instance parameter, just iterate over all scalar stmts.
5917 (vect_slp_analyze_instance_dependence): Adjust and likewise.
5918 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
5920 (vect_schedule_slp): Just iterate over all scalar stmts.
5921 (vect_supported_load_permutation_p): Adjust.
5922 (vect_transform_slp_perm_load): Remove slp_instance parameter,
5923 instead use the number of lanes in the node as group size.
5924 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
5925 factor instead of slp_instance as parameter.
5926 (vectorizable_load): Adjust.
5928 2020-05-06 Andreas Schwab <schwab@suse.de>
5930 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
5931 (aarch64_get_extension_string_for_isa_flags): Don't declare.
5933 2020-05-06 Richard Biener <rguenther@suse.de>
5936 * cfgloopmanip.c (create_preheader): Require non-complex
5937 preheader edge for CP_SIMPLE_PREHEADERS.
5939 2020-05-06 Richard Biener <rguenther@suse.de>
5941 PR tree-optimization/94963
5942 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
5943 no-warning marking of the conditional store.
5944 (execute_sm): Instead mark the uninitialized state
5945 on loop entry to be not warned about.
5947 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
5949 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
5950 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
5951 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
5952 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
5954 * config/i386/i386-builtin.def: Add new builtins.
5955 * config/i386/i386-c.c (ix86_target_macros_internal): Define
5957 * config/i386/i386-options.c (ix86_target_string): Add
5959 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
5960 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
5962 * config/i386/i386.md (define_c_enum "unspec"): Add
5963 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
5964 (TSXLDTRK): New define_int_iterator.
5965 ("<tsxldtrk>"): New define_insn.
5966 * config/i386/i386.opt: Add -mtsxldtrk.
5967 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
5968 * config/i386/tsxldtrkintrin.h: New.
5969 * doc/invoke.texi: Document -mtsxldtrk.
5971 2020-05-06 Jakub Jelinek <jakub@redhat.com>
5973 PR tree-optimization/94921
5974 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
5977 2020-05-06 Richard Biener <rguenther@suse.de>
5979 PR tree-optimization/94965
5980 * tree-vect-stmts.c (vectorizable_load): Fix typo.
5982 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5984 * doc/install.texi: Replace Sun with Solaris as appropriate.
5985 (Tools/packages necessary for building GCC, Perl version between
5986 5.6.1 and 5.6.24): Remove Solaris 8 reference.
5987 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
5989 (Specific, i?86-*-solaris2*): Update version references for
5990 Solaris 11.3 and later. Remove gas 2.26 caveat.
5991 (Specific, *-*-solaris2*): Update version references for
5992 Solaris 11.3 and later. Remove boehm-gc reference.
5993 Document GMP, MPFR caveats on Solaris 11.3.
5994 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
5995 (Specific, sparc64-*-solaris2*): Likewise.
5996 Document --build requirement.
5998 2020-05-06 Jakub Jelinek <jakub@redhat.com>
6001 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
6002 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
6004 PR rtl-optimization/94873
6005 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
6006 note if SET_SRC (set) has side-effects.
6008 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
6009 Wei Xiao <wei3.xiao@intel.com>
6011 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
6012 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
6013 (ix86_handle_option): Handle -mserialize.
6014 * config.gcc (serializeintrin.h): New header file.
6015 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
6016 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
6018 * config/i386/i386-builtin.def: Add new builtin.
6019 * config/i386/i386-c.c (__SERIALIZE__): New macro.
6020 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
6022 * (ix86_valid_target_attribute_inner_p): Add target attribute
6024 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
6026 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
6027 (serialize): New define_insn.
6028 * config/i386/i386.opt (mserialize): New option
6029 * config/i386/immintrin.h: Include serailizeintrin.h.
6030 * config/i386/serializeintrin.h: New header file.
6031 * doc/invoke.texi: Add documents for -mserialize.
6033 2020-05-06 Richard Biener <rguenther@suse.de>
6035 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
6036 to/from pointer conversion checking.
6038 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
6040 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
6042 * config/rs6000/rs6000-c.c: Likewise.
6043 * config/rs6000/rs6000-call.c: Likewise.
6044 * config/rs6000/rs6000.c: Likewise.
6046 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
6048 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
6049 (RTEMS_ENDFILE_SPEC): Likewise.
6050 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
6051 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
6052 (LIB_SPECS): Support -nodefaultlibs option.
6053 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
6054 (RTEMS_ENDFILE_SPEC): Likewise.
6055 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
6056 (RTEMS_ENDFILE_SPEC): Likewise.
6057 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
6058 (RTEMS_ENDFILE_SPEC): Likewise.
6060 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
6062 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
6063 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
6065 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
6067 * config/pru/pru.h: Mark R3.w0 as caller saved.
6069 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
6071 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
6072 and gen_doloop_begin_internal.
6073 (pru_reorg_loop): Use gen_pruloop with mode.
6074 * config/pru/pru.md: Use new @insn syntax.
6076 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
6078 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
6080 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
6082 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
6083 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
6084 (addqi3_cconly_overflow): Ditto.
6085 (umulv<mode>4): Ditto.
6086 (<s>mul<mode>3_highpart): Ditto.
6087 (tls_global_dynamic_32): Ditto.
6088 (tls_local_dynamic_base_32): Ditto.
6095 (*adddi_4): Remove "m" constraint from scratch operand.
6096 (*add<mode>_4): Ditto.
6098 2020-05-05 Jakub Jelinek <jakub@redhat.com>
6100 PR rtl-optimization/94516
6101 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
6102 with sp = reg, add REG_EQUAL note with sp + const.
6103 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
6104 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
6105 postreload sp = sp + const to sp = reg optimization if needed and
6107 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
6108 reg = sp insn with sp + const REG_EQUAL note. Adjust
6109 try_apply_stack_adjustment caller, call
6110 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
6111 (combine_stack_adjustments): Allocate and free LIVE bitmap,
6112 adjust combine_stack_adjustments_for_block caller.
6114 2020-05-05 Martin Liska <mliska@suse.cz>
6116 PR gcov-profile/93623
6117 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
6120 2020-05-05 Martin Liska <mliska@suse.cz>
6122 * opt-functions.awk (opt_args_non_empty): New function.
6123 * opt-read.awk: Use the function for various option arguments.
6125 2020-05-05 Martin Liska <mliska@suse.cz>
6128 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
6129 report warning when the jobserver is not detected.
6131 2020-05-05 Martin Liska <mliska@suse.cz>
6133 PR gcov-profile/94636
6134 * gcov.c (main): Print total lines summary at the end.
6135 (generate_results): Expect file_name always being non-null.
6136 Print newline after intermediate file is printed in order to align with
6137 what we do for normal files.
6139 2020-05-05 Martin Liska <mliska@suse.cz>
6141 * dumpfile.c (dump_switch_p): Change return type
6142 and print option suggestion.
6143 * dumpfile.h: Change return type.
6144 * opts-global.c (handle_common_deferred_options):
6145 Move error into dump_switch_p function.
6147 2020-05-05 Martin Liska <mliska@suse.cz>
6150 * alloc-pool.h: Use const for some arguments.
6151 * bitmap.h: Likewise.
6152 * mem-stats.h: Likewise.
6153 * sese.h (get_entry_bb): Likewise.
6154 (get_exit_bb): Likewise.
6156 2020-05-05 Richard Biener <rguenther@suse.de>
6158 * tree-vect-slp.c (struct vdhs_data): New.
6159 (vect_detect_hybrid_slp): New walker.
6160 (vect_detect_hybrid_slp): Rewrite.
6162 2020-05-05 Richard Biener <rguenther@suse.de>
6165 * tree-ssa-structalias.c (ipa_pta_execute): Use
6166 varpool_node::externally_visible_p ().
6167 (refered_from_nonlocal_var): Likewise.
6169 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
6171 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
6172 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
6173 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
6175 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
6177 * gimplify.c (gimplify_init_constructor): Do not put the constructor
6178 into static memory if it is not complete.
6180 2020-05-05 Richard Biener <rguenther@suse.de>
6182 PR tree-optimization/94949
6183 * tree-ssa-loop-im.c (execute_sm): Check whether we use
6184 the multithreaded model or always compute the stored value
6185 before eliding a load.
6187 2020-05-05 Alex Coplan <alex.coplan@arm.com>
6189 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
6191 2020-05-05 Jakub Jelinek <jakub@redhat.com>
6193 PR tree-optimization/94800
6194 * match.pd (X + (X << C) to X * (1 + (1 << C)),
6195 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
6199 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
6201 PR tree-optimization/94914
6202 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
6205 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
6207 * config/i386/i386.md (*testqi_ext_3): Use
6208 int_nonimmediate_operand instead of manual mode checks.
6209 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
6210 Use int_nonimmediate_operand predicate. Rewrite
6211 define_insn_and_split pattern to a combine pass splitter.
6213 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
6215 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
6216 * configure: Regenerate.
6218 2020-05-05 Jakub Jelinek <jakub@redhat.com>
6221 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
6222 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
6223 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
6224 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
6226 2020-05-04 Clement Chigot <clement.chigot@atos.net>
6227 David Edelsohn <dje.gcc@gmail.com>
6229 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
6230 for fmodl, frexpl, ldexpl and modfl builtins.
6232 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
6235 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
6236 chosen lhs is different from the gcall lhs.
6237 (expand_mask_load_optab_fn): Likewise.
6238 (expand_gather_load_optab_fn): Likewise.
6240 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
6243 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
6244 (EQ compare->LTU compare splitter): New splitter.
6245 (NE compare->NEG splitter): Ditto.
6247 2020-05-04 Marek Polacek <polacek@redhat.com>
6250 2020-04-30 Marek Polacek <polacek@redhat.com>
6253 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
6254 (check_aligned_type): Check if TYPE_USER_ALIGN match.
6256 2020-05-04 Richard Biener <rguenther@suse.de>
6258 PR tree-optimization/93891
6259 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
6260 the original reference tree for assessing access alignment.
6262 2020-05-04 Richard Biener <rguenther@suse.de>
6264 PR tree-optimization/39612
6265 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
6266 (set_ref_loaded_in_loop): New.
6267 (mark_ref_loaded): Likewise.
6268 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
6269 (execute_sm): Avoid issueing a load when it was not there.
6270 (execute_sm_if_changed): Avoid issueing warnings for the
6273 2020-05-04 Martin Jambor <mjambor@suse.cz>
6276 * tree-inline.c (tree_function_versioning): Leave any type conversion
6277 of replacements to setup_one_parameter and its friend
6278 force_value_to_type.
6280 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
6283 * config/i386/predicates.md (shr_comparison_operator): New predicate.
6284 * config/i386/i386.md (compare->shr splitter): New splitters.
6286 2020-05-04 Jakub Jelinek <jakub@redhat.com>
6288 PR tree-optimization/94718
6289 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
6291 PR tree-optimization/94718
6292 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
6293 replace two nop conversions on bit_{and,ior,xor} argument
6294 and result with just one conversion on the result or another argument.
6296 PR tree-optimization/94718
6297 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
6298 -> (X ^ Y) & C eqne 0 optimization to ...
6299 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
6301 * opts.c (get_option_html_page): Instead of hardcoding a list of
6302 options common between C/C++ and Fortran only use gfortran/
6303 documentation for warnings that have CL_Fortran set but not
6306 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
6308 * config/i386/i386-expand.c (ix86_expand_int_movcc):
6309 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
6310 (emit_memmov): Ditto.
6311 (emit_memset): Ditto.
6312 (ix86_expand_strlensi_unroll_1): Ditto.
6313 (release_scratch_register_on_entry): Ditto.
6314 (gen_frame_set): Ditto.
6315 (ix86_emit_restore_reg_using_pop): Ditto.
6316 (ix86_emit_outlined_ms2sysv_restore): Ditto.
6317 (ix86_expand_epilogue): Ditto.
6318 (ix86_expand_split_stack_prologue): Ditto.
6319 * config/i386/i386.md (push immediate splitter): Ditto.
6323 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
6325 PR translation/93861
6326 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
6329 2020-05-02 Jakub Jelinek <jakub@redhat.com>
6331 * config/tilegx/tilegx.md
6332 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
6333 rather than just <n>.
6335 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
6338 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
6339 and crtl->patch_area_entry.
6340 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
6341 * opts.c (common_handle_option): Limit
6342 function_entry_patch_area_size and function_entry_patch_area_start
6343 to USHRT_MAX. Fix a typo in error message.
6344 * varasm.c (assemble_start_function): Use crtl->patch_area_size
6345 and crtl->patch_area_entry.
6346 * doc/invoke.texi: Document the maximum value for
6347 -fpatchable-function-entry.
6349 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
6351 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
6352 Override SUBTARGET_SHADOW_OFFSET macro.
6354 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
6356 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
6357 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
6358 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
6359 * config/i386/freebsd.h: Likewise.
6360 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
6361 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
6363 2020-04-30 Alexandre Oliva <oliva@adacore.com>
6365 * doc/sourcebuild.texi (Effective-Target Keywords): Document
6366 the newly-introduced fileio effective target.
6368 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
6370 PR rtl-optimization/94740
6371 * cse.c (cse_process_notes_1): Replace with...
6372 (cse_process_note_1): ...this new function, acting as a
6373 simplify_replace_fn_rtx callback to process_note. Handle only
6374 REGs and MEMs directly. Validate the MEM if cse_process_note
6375 changes its address.
6376 (cse_process_notes): Replace with...
6377 (cse_process_note): ...this new function.
6378 (cse_extended_basic_block): Update accordingly, iterating over
6379 the register notes and passing individual notes to cse_process_note.
6381 2020-04-30 Carl Love <cel@us.ibm.com>
6383 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
6385 2020-04-30 Martin Jambor <mjambor@suse.cz>
6388 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
6389 saved by the inliner and thunks which had their call inlined.
6390 * ipa-inline-transform.c (save_inline_function_body): Fill in
6391 former_clone_of of new body holders.
6393 2020-04-30 Jakub Jelinek <jakub@redhat.com>
6395 * BASE-VER: Set to 11.0.0.
6397 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
6399 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
6401 2020-04-30 Marek Polacek <polacek@redhat.com>
6404 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
6405 (check_aligned_type): Check if TYPE_USER_ALIGN match.
6407 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
6409 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
6410 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
6411 * doc/invoke.texi (moutline-atomics): Document as on by default.
6413 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
6416 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
6417 the check for NOTE_INSN_DELETED_LABEL.
6419 2020-04-30 Jakub Jelinek <jakub@redhat.com>
6421 * configure.ac (--with-documentation-root-url,
6422 --with-changes-root-url): Diagnose URL not ending with /,
6423 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
6424 * opts.h (get_changes_url): Remove.
6425 * opts.c (get_changes_url): Remove.
6426 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
6427 or -DCHANGES_ROOT_URL.
6428 * doc/install.texi (--with-documentation-root-url,
6429 --with-changes-root-url): Document.
6430 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
6431 get_changes_url and free, change url variable type to const char * and
6432 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
6433 * config/s390/s390.c (s390_function_arg_vector,
6434 s390_function_arg_float): Likewise.
6435 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
6437 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
6439 * config.in: Regenerate.
6440 * configure: Regenerate.
6442 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
6445 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
6447 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
6449 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
6450 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
6452 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
6454 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
6455 Change constraint for vlrl/vstrl to jb4.
6457 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6459 * var-tracking.c (vt_initialize): Move variables pre and post
6460 into inner block and initialize both in order to fix warning
6461 about uninitialized use. Remove unnecessary checks for
6462 frame_pointer_needed.
6464 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6466 * toplev.c (output_stack_usage_1): Ensure that first
6467 argument to fprintf is not null.
6469 2020-04-29 Jakub Jelinek <jakub@redhat.com>
6471 * configure.ac (-with-changes-root-url): New configure option,
6472 defaulting to https://gcc.gnu.org/.
6473 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
6475 * pretty-print.c (get_end_url_string): New function.
6476 (pp_format): Handle %{ and %} for URLs.
6477 (pp_begin_url): Use pp_string instead of pp_printf.
6478 (pp_end_url): Use get_end_url_string.
6479 * opts.h (get_changes_url): Declare.
6480 * opts.c (get_changes_url): New function.
6481 * config/rs6000/rs6000-call.c: Include opts.h.
6482 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
6483 of just in GCC 10.1 in diagnostics and add URL.
6484 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
6485 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
6487 * config/s390/s390.c (s390_function_arg_vector,
6488 s390_function_arg_float): Likewise.
6489 * configure: Regenerated.
6492 * config/s390/s390.c (s390_function_arg_vector,
6493 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
6494 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
6495 passed to the function rather than the type of the single element.
6496 Rename cxx17_empty_base_seen variable to empty_base_seen, change
6497 type to int, and adjust diagnostics depending on if the field
6498 has [[no_unique_attribute]] or not.
6501 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
6502 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
6503 used in casts into parens.
6504 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
6505 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
6506 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
6507 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
6508 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
6509 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
6510 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
6511 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
6512 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
6513 _mm256_mask_cmp_epu8_mask): Likewise.
6514 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
6515 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
6516 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
6517 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
6520 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
6521 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
6522 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
6523 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
6524 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
6525 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
6526 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
6527 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
6528 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
6529 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
6530 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
6531 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
6532 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
6534 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
6535 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
6536 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
6537 as mask vector containing -1.0 or -1.0f elts, but instead vector
6538 with all bits set using _mm*_cmpeq_p? with zero operands.
6539 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
6540 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
6541 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
6542 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
6543 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
6544 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
6545 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
6546 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
6547 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
6548 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
6549 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
6550 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
6551 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
6552 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
6553 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
6554 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
6555 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
6557 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
6558 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
6559 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
6560 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
6561 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
6562 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
6563 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
6564 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
6565 _mm512_mask_prefetch_i64scatter_ps): Likewise.
6566 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
6567 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
6568 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
6569 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
6570 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
6571 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
6572 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
6573 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
6574 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
6575 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
6576 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
6577 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
6578 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
6579 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
6580 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
6581 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
6582 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
6583 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
6584 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
6585 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
6586 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
6587 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
6588 _mm_mask_i64scatter_epi64): Likewise.
6590 2020-04-29 Jeff Law <law@redhat.com>
6592 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
6593 division instructions are 4 bytes long.
6595 2020-04-29 Jakub Jelinek <jakub@redhat.com>
6598 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
6599 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
6600 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
6601 take address of TARGET_EXPR of fenv_var with void_node initializer.
6604 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6606 PR tree-optimization/94774
6607 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
6610 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
6612 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
6613 * calls.c (cxx17_empty_base_field_p): New function. Check
6614 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
6617 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
6620 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
6621 Allow -fcf-protection with -mindirect-branch=thunk-extern and
6622 -mfunction-return=thunk-extern.
6623 * doc/invoke.texi: Update notes for -fcf-protection=branch with
6624 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
6626 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
6628 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
6630 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
6632 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
6633 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
6634 fenv_var and new_fenv_var.
6636 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
6638 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
6639 effective-target keyword.
6640 (arm_arch_v8a_hard_multilib): Likewise.
6641 (arm_arch_v8a_hard): Document new dg-add-options keyword.
6642 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
6643 code is deprecated and has not been updated to handle
6644 DECL_FIELD_ABI_IGNORED.
6645 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
6646 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
6647 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
6648 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
6649 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
6650 something actually is a HFA or HVA. Record whether we see a
6651 [[no_unique_address]] field that previous GCCs would not have
6652 ignored in this way.
6653 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
6654 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
6655 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
6656 diagnostic messages.
6657 (arm_needs_doubleword_align): Add a comment explaining why we
6658 consider even zero-sized fields.
6660 2020-04-29 Richard Biener <rguenther@suse.de>
6661 Li Zekun <lizekun1@huawei.com>
6664 * tree.c (component_ref_size): Guard against error_mark_node
6665 DECL_INITIAL as it happens with LTO.
6667 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
6669 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
6670 comment explaining why we consider even zero-sized fields.
6671 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
6672 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
6673 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
6674 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
6675 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
6676 something actually is a HFA or HVA. Record whether we see a
6677 [[no_unique_address]] field that previous GCCs would not have
6678 ignored in this way.
6679 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
6680 whether diagnostics should be suppressed. Update the calls to
6681 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
6682 [[no_unique_address]] case.
6683 (aarch64_return_in_msb): Update call accordingly, never silencing
6685 (aarch64_function_value): Likewise.
6686 (aarch64_return_in_memory_1): Likewise.
6687 (aarch64_init_cumulative_args): Likewise.
6688 (aarch64_gimplify_va_arg_expr): Likewise.
6689 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
6690 use it to decide whether arch64_vfp_is_call_or_return_candidate
6692 (aarch64_pass_by_reference): Update calls accordingly.
6693 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
6694 to decide whether arch64_vfp_is_call_or_return_candidate should be
6697 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
6700 * config/aarch64/aarch64-builtins.c
6701 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
6702 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
6705 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
6707 * configure.ac <$enable_offload_targets>: Do parsing as done
6709 * configure: Regenerate.
6711 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
6712 * configure: Regenerate.
6715 * rtlanal.c (set_noop_p): Handle non-constant selectors.
6718 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
6720 (TARGET_EXCEPT_UNWIND_INFO): Define.
6722 2020-04-29 Jakub Jelinek <jakub@redhat.com>
6725 * config/gcn/gcn.md (*mov<mode>_insn): Use
6726 'reg_overlap_mentioned_p' to check for overlap.
6729 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
6730 instead of cxx17_empty_base_field_p.
6733 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
6734 DECL_FIELD_ABI_IGNORED.
6735 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
6736 * calls.h (cxx17_empty_base_field_p): Change into a temporary
6737 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
6739 * calls.c (cxx17_empty_base_field_p): Remove.
6740 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
6741 DECL_FIELD_ABI_IGNORED.
6742 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
6743 * lto-streamer-out.c (hash_tree): Likewise.
6744 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
6745 cxx17_empty_base_seen to empty_base_seen, change type to int *,
6746 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
6747 cxx17_empty_base_field_p, if "no_unique_address" attribute is
6748 present, propagate that to the caller too.
6749 (rs6000_discover_homogeneous_aggregate): Adjust
6750 rs6000_aggregate_candidate caller, emit different diagnostics
6751 when c++17 empty base fields are present and when empty
6752 [[no_unique_address]] fields are present.
6753 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
6754 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
6757 2020-04-29 Richard Biener <rguenther@suse.de>
6759 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
6760 Just check whether the stmt stores.
6762 2020-04-28 Alexandre Oliva <oliva@adacore.com>
6765 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
6766 output operand in emulation. Don't overwrite pseudos.
6768 2020-04-28 Jeff Law <law@redhat.com>
6770 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
6771 multiply patterns are 4 bytes long.
6773 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
6775 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
6776 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
6778 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
6779 Jakub Jelinek <jakub@redhat.com>
6782 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
6783 base class artificial fields.
6784 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
6785 decision is different after this fix.
6787 2020-04-28 David Malcolm <dmalcolm@redhat.com>
6793 * doc/invoke.texi (Static Analyzer Options): Remove
6794 -Wanalyzer-use-of-uninitialized-value.
6795 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
6797 2020-04-28 Jakub Jelinek <jakub@redhat.com>
6799 PR tree-optimization/94809
6800 * tree.c (build_call_expr_internal_loc_array): Call
6801 process_call_operands.
6803 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
6805 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
6806 * config/aarch64/aarch64-tune.md: Regenerate.
6807 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
6808 (thunderx3t110_regmove_cost): Likewise.
6809 (thunderx3t110_vector_cost): Likewise.
6810 (thunderx3t110_prefetch_tune): Likewise.
6811 (thunderx3t110_tunings): Likewise.
6812 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
6814 * config/aarch64/thunderx3t110.md: New file.
6815 * config/aarch64/aarch64.md: Include thunderx3t110.md.
6816 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
6818 2020-04-28 Jakub Jelinek <jakub@redhat.com>
6821 * config/s390/s390.c (s390_function_arg_vector,
6822 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
6824 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
6826 PR tree-optimization/94727
6827 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
6828 operands are invariant booleans, use the mask type associated with the
6829 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
6830 (vectorizable_condition): Pass vectype unconditionally to
6831 vect_is_simple_cond.
6833 2020-04-27 Jakub Jelinek <jakub@redhat.com>
6836 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
6837 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
6838 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
6840 2020-04-27 David Malcolm <dmalcolm@redhat.com>
6843 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
6844 default value, so that it can by supplied by get_option_html_page.
6845 * configure: Regenerate.
6846 * opts.c: Include "selftest.h".
6847 (get_option_html_page): New function.
6848 (get_option_url): Use it. Reformat to place comments next to the
6849 expressions they refer to.
6850 (selftest::test_get_option_html_page): New.
6851 (selftest::opts_c_tests): New.
6852 * selftest-run-tests.c (selftest::run_tests): Call
6853 selftest::opts_c_tests.
6854 * selftest.h (selftest::opts_c_tests): New decl.
6856 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
6858 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
6859 UINTVAL to CONST_INTs.
6861 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6863 * config/arm/constraints.md (e): Remove constraint.
6864 (Te): Define constraint.
6865 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
6866 operand 0 from "e" to "Te".
6867 (vaddvaq_<supf><mode>): Likewise.
6868 (vaddvq_p_<supf><mode>): Likewise.
6869 (vmladavq_<supf><mode>): Likewise.
6870 (vmladavxq_s<mode>): Likewise.
6871 (vmlsdavq_s<mode>): Likewise.
6872 (vmlsdavxq_s<mode>): Likewise.
6873 (vaddvaq_p_<supf><mode>): Likewise.
6874 (vmladavaq_<supf><mode>): Likewise.
6875 (vmladavq_p_<supf><mode>): Likewise.
6876 (vmladavxq_p_s<mode>): Likewise.
6877 (vmlsdavq_p_s<mode>): Likewise.
6878 (vmlsdavxq_p_s<mode>): Likewise.
6879 (vmlsdavaxq_s<mode>): Likewise.
6880 (vmlsdavaq_s<mode>): Likewise.
6881 (vmladavaxq_s<mode>): Likewise.
6882 (vmladavaq_p_<supf><mode>): Likewise.
6883 (vmladavaxq_p_s<mode>): Likewise.
6884 (vmlsdavaq_p_s<mode>): Likewise.
6885 (vmlsdavaxq_p_s<mode>): Likewise.
6887 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
6889 * config/arm/arm.c (output_move_neon): Only get the first operand if
6892 2020-04-27 Felix Yang <felix.yang@huawei.com>
6894 PR tree-optimization/94784
6895 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
6896 assert around so that it checks that the two vectors have equal
6897 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
6898 types is a useless_type_conversion_p.
6900 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
6903 * dwarf2cfi.c (struct GTY): Add ra_mangled.
6904 (cfi_row_equal_p): Check ra_mangled.
6905 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
6906 this only handles the sparc logic now.
6907 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
6908 the aarch64 specific logic.
6909 (dwarf2out_frame_debug): Update to use the new subroutines.
6910 (change_cfi_row): Check ra_mangled.
6912 2020-04-27 Jakub Jelinek <jakub@redhat.com>
6915 * config/s390/s390.c (s390_function_arg_vector,
6916 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
6918 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
6920 * common/config/rs6000/rs6000-common.c
6921 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
6923 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
6926 2020-04-27 Martin Liska <mliska@suse.cz>
6929 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
6930 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
6932 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
6935 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
6937 (rs6000_emit_prologue_components):
6938 Check with frame_pointer_needed_indeed.
6939 (rs6000_emit_epilogue_components): Likewise.
6940 (rs6000_emit_prologue): Likewise.
6941 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
6943 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
6945 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
6946 stack frame when debugging and flag_compare_debug is enabled.
6948 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
6950 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
6951 enable PC-relative addressing for -mcpu=future.
6952 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
6953 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
6954 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
6955 suppress PC-relative addressing.
6956 (rs6000_option_override_internal): Split up error messages
6957 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
6960 2020-04-25 Jakub Jelinek <jakub@redhat.com>
6961 Richard Biener <rguenther@suse.de>
6963 PR tree-optimization/94734
6964 PR tree-optimization/89430
6965 * tree-ssa-phiopt.c: Include tree-eh.h.
6966 (cond_store_replacement): Return false if an automatic variable
6967 access could trap. If -fstore-data-races, don't return false
6968 just because an automatic variable is addressable.
6970 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
6972 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
6974 (add<mode>_sext_dup2_exec): Likewise.
6976 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
6979 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
6980 endian byteshift_val calculation.
6982 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
6984 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
6986 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
6988 * config/aarch64/arm_sve.h: Add a comment.
6990 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
6992 PR rtl-optimization/94708
6993 * combine.c (simplify_if_then_else): Add check for
6994 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
6996 2020-04-23 Martin Sebor <msebor@redhat.com>
6999 * common.opt (-Wno-frame-larger-than): New option.
7000 (-Wno-larger-than, -Wno-stack-usage): Same.
7002 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
7004 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
7006 (mov<mode>_exec): Likewise.
7007 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
7008 (<convop><mode><vndi>2_exec): Likewise.
7010 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
7012 PR tree-optimization/94717
7013 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
7014 of the stores doesn't have the same landing pad number as the first.
7015 (coalesce_immediate_stores): Do not try to coalesce the store using
7016 bswap if it doesn't have the same landing pad number as the first.
7018 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
7020 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
7021 Replace outdated link to ELFv2 ABI.
7023 2020-04-23 Jakub Jelinek <jakub@redhat.com>
7026 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
7030 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
7031 temporarily with non-final second operand and updating it later,
7032 push COMPOUND_EXPRs into a vector and process it in reverse,
7033 creating COMPOUND_EXPRs with the final operands.
7035 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
7038 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
7039 bti c and bti j handling.
7041 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
7042 Thomas Schwinge <thomas@codesourcery.com>
7046 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
7047 t_async and the wait arguments.
7049 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
7051 PR tree-optimization/94727
7052 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
7053 comparing invariant scalar booleans.
7055 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
7056 Jakub Jelinek <jakub@redhat.com>
7059 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
7060 empty base class artificial fields.
7061 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
7062 different after this fix.
7064 2020-04-23 Jakub Jelinek <jakub@redhat.com>
7067 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
7068 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
7069 if the same type has been diagnosed most recently already.
7071 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7073 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
7075 (__arm_vbicq_n_s16): Likewise.
7076 (__arm_vbicq_n_u32): Likewise.
7077 (__arm_vbicq_n_s32): Likewise.
7078 (__arm_vbicq): Likewise.
7079 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
7080 (__arm_vbicq_n_s32): Likewise.
7081 (__arm_vbicq_n_u16): Likewise.
7082 (__arm_vbicq_n_u32): Likewise.
7083 (__arm_vdupq_m_n_s8): Likewise.
7084 (__arm_vdupq_m_n_s16): Likewise.
7085 (__arm_vdupq_m_n_s32): Likewise.
7086 (__arm_vdupq_m_n_u8): Likewise.
7087 (__arm_vdupq_m_n_u16): Likewise.
7088 (__arm_vdupq_m_n_u32): Likewise.
7089 (__arm_vdupq_m_n_f16): Likewise.
7090 (__arm_vdupq_m_n_f32): Likewise.
7091 (__arm_vldrhq_gather_offset_s16): Likewise.
7092 (__arm_vldrhq_gather_offset_s32): Likewise.
7093 (__arm_vldrhq_gather_offset_u16): Likewise.
7094 (__arm_vldrhq_gather_offset_u32): Likewise.
7095 (__arm_vldrhq_gather_offset_f16): Likewise.
7096 (__arm_vldrhq_gather_offset_z_s16): Likewise.
7097 (__arm_vldrhq_gather_offset_z_s32): Likewise.
7098 (__arm_vldrhq_gather_offset_z_u16): Likewise.
7099 (__arm_vldrhq_gather_offset_z_u32): Likewise.
7100 (__arm_vldrhq_gather_offset_z_f16): Likewise.
7101 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
7102 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
7103 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
7104 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
7105 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
7106 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
7107 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
7108 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
7109 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
7110 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
7111 (__arm_vldrwq_gather_offset_s32): Likewise.
7112 (__arm_vldrwq_gather_offset_u32): Likewise.
7113 (__arm_vldrwq_gather_offset_f32): Likewise.
7114 (__arm_vldrwq_gather_offset_z_s32): Likewise.
7115 (__arm_vldrwq_gather_offset_z_u32): Likewise.
7116 (__arm_vldrwq_gather_offset_z_f32): Likewise.
7117 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
7118 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
7119 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
7120 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
7121 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
7122 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
7123 (__arm_vdwdupq_x_n_u8): Likewise.
7124 (__arm_vdwdupq_x_n_u16): Likewise.
7125 (__arm_vdwdupq_x_n_u32): Likewise.
7126 (__arm_viwdupq_x_n_u8): Likewise.
7127 (__arm_viwdupq_x_n_u16): Likewise.
7128 (__arm_viwdupq_x_n_u32): Likewise.
7129 (__arm_vidupq_x_n_u8): Likewise.
7130 (__arm_vddupq_x_n_u8): Likewise.
7131 (__arm_vidupq_x_n_u16): Likewise.
7132 (__arm_vddupq_x_n_u16): Likewise.
7133 (__arm_vidupq_x_n_u32): Likewise.
7134 (__arm_vddupq_x_n_u32): Likewise.
7135 (__arm_vldrdq_gather_offset_s64): Likewise.
7136 (__arm_vldrdq_gather_offset_u64): Likewise.
7137 (__arm_vldrdq_gather_offset_z_s64): Likewise.
7138 (__arm_vldrdq_gather_offset_z_u64): Likewise.
7139 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
7140 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
7141 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
7142 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
7143 (__arm_vidupq_m_n_u8): Likewise.
7144 (__arm_vidupq_m_n_u16): Likewise.
7145 (__arm_vidupq_m_n_u32): Likewise.
7146 (__arm_vddupq_m_n_u8): Likewise.
7147 (__arm_vddupq_m_n_u16): Likewise.
7148 (__arm_vddupq_m_n_u32): Likewise.
7149 (__arm_vidupq_n_u16): Likewise.
7150 (__arm_vidupq_n_u32): Likewise.
7151 (__arm_vidupq_n_u8): Likewise.
7152 (__arm_vddupq_n_u16): Likewise.
7153 (__arm_vddupq_n_u32): Likewise.
7154 (__arm_vddupq_n_u8): Likewise.
7156 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
7158 * doc/install.texi (D-Specific Options): Document
7159 --enable-libphobos-checking and --with-libphobos-druntime-only.
7161 2020-04-23 Jakub Jelinek <jakub@redhat.com>
7164 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
7165 cxx17_empty_base_seen argument. Pass it to recursive calls.
7166 Ignore cxx17_empty_base_field_p fields after setting
7167 *cxx17_empty_base_seen to true.
7168 (rs6000_discover_homogeneous_aggregate): Adjust
7169 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
7170 aggregates with C++17 empty base fields.
7173 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
7174 if last_decl is error_mark_node or has such a TREE_TYPE.
7177 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
7178 if last_decl is error_mark_node or has such a TREE_TYPE.
7180 2020-04-22 Felix Yang <felix.yang@huawei.com>
7183 * config/aarch64/aarch64.h (TARGET_SVE):
7184 Add && !TARGET_GENERAL_REGS_ONLY.
7185 (TARGET_SVE2): Add && TARGET_SVE.
7186 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
7187 TARGET_SVE2_SM4): Add && TARGET_SVE2.
7188 * config/aarch64/aarch64-sve-builtins.h
7189 (sve_switcher::m_old_general_regs_only): New member.
7190 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
7192 (reported_missing_registers_p): New variable.
7193 (check_required_extensions): Call check_required_registers before
7194 return if all required extenstions are present.
7195 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
7196 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
7197 global_options.x_target_flags.
7198 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
7199 global_options.x_target_flags if m_old_general_regs_only is true.
7201 2020-04-22 Zackery Spytz <zspytz@gmail.com>
7203 * doc/extend.exi: Add "free" to list of other builtin functions
7206 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
7209 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
7211 (store_quadpti): Ditto.
7212 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
7213 plq will be used and doesn't need it.
7214 (atomic_store<mode>): Ditto, for pstq.
7216 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
7218 * doc/invoke.texi: Update flags turned on by -O3.
7220 2020-04-22 Jakub Jelinek <jakub@redhat.com>
7223 * config/ia64/ia64.c (hfa_element_mode): Ignore
7224 cxx17_empty_base_field_p fields.
7227 * calls.h (cxx17_empty_base_field_p): Declare.
7228 * calls.c (cxx17_empty_base_field_p): Define.
7230 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
7232 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
7234 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
7235 Andre Vieira <andre.simoesdiasvieira@arm.com>
7236 Mihail Ionescu <mihail.ionescu@arm.com>
7238 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
7239 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
7240 (ALL_QUIRKS): Add quirk_no_asmcpu.
7241 (cortex-m55): Define new cpu.
7242 * config/arm/arm-tables.opt: Regenerate.
7243 * config/arm/arm-tune.md: Likewise.
7244 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
7246 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
7248 PR tree-optimization/94700
7249 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
7250 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
7251 of similarly-structured but distinct vector types.
7253 2020-04-21 Martin Sebor <msebor@redhat.com>
7256 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
7257 the computation of the lower bound of the source access size.
7258 (builtin_access::generic_overlap): Remove a hack for setting ranges
7261 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
7263 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
7264 (ASM_WEAKEN_DECL): New define.
7265 (HAVE_GAS_WEAKREF): Undefine.
7267 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
7269 PR tree-optimization/94683
7270 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
7271 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
7272 but distinct vector types.
7274 2020-04-21 Jakub Jelinek <jakub@redhat.com>
7277 * stor-layout.c (place_field, finalize_record_size): Don't emit
7278 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
7279 * ubsan.c (ubsan_get_type_descriptor_type,
7280 ubsan_get_source_location_type, ubsan_create_data): Set
7282 * asan.c (asan_global_struct): Likewise.
7284 2020-04-21 Duan bo <duanbo3@huawei.com>
7287 * config/aarch64/aarch64.c: Add an error message for option conflict.
7288 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
7289 incompatible with -fpic, -fPIC and -mabi=ilp32.
7291 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
7294 * omp-low.c (new_omp_context): Remove assignments to
7295 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
7297 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
7299 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
7300 ("popcountv2di2_vx"): Use simplify_gen_subreg.
7302 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
7305 * config/s390/s390-builtin-types.def: Add 3 new function modes.
7306 * config/s390/s390-builtins.def: Add mode dependent low-level
7307 builtin and map the overloaded builtins to these.
7308 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
7309 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
7311 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
7313 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
7314 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
7315 estimated VF and is no worse at double the estimated VF.
7317 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
7320 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
7321 order of arguments to rtx_vector_builder.
7322 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
7323 When extending the trailing constants to a full vector, replace any
7324 variables with zeros.
7326 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
7329 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
7332 2020-04-20 Martin Liska <mliska@suse.cz>
7334 * symtab.c (symtab_node::dump_references): Add space after
7336 (symtab_node::dump_referring): Likewise.
7338 2020-04-18 Jeff Law <law@redhat.com>
7341 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
7344 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
7346 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
7347 attributes): Document d_runtime_has_std_library.
7349 2020-04-17 Jeff Law <law@redhat.com>
7351 PR rtl-optimization/90275
7352 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
7353 when the destination has a REG_UNUSED note.
7355 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
7358 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
7361 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
7363 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
7364 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
7365 cost of load and store insns if one loop iteration has enough scalar
7366 elements to use an Advanced SIMD LDP or STP.
7367 (aarch64_add_stmt_cost): Update call accordingly.
7369 2020-04-17 Jakub Jelinek <jakub@redhat.com>
7370 Jeff Law <law@redhat.com>
7373 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
7374 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
7375 or pos + len >= 32, or pos + len is equal to operands[2] precision
7376 and operands[2] is not a register operand. During splitting perform
7377 SImode AND if operands[0] doesn't have CCZmode and pos + len is
7378 equal to mode precision.
7380 2020-04-17 Richard Biener <rguenther@suse.de>
7383 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
7385 * dwarf2out.c (dw_val_equal_p): Fix pasto in
7386 dw_val_class_vms_delta comparison.
7387 * optabs.c (expand_binop_directly): Fix pasto in commutation
7389 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
7392 2020-04-17 Jakub Jelinek <jakub@redhat.com>
7394 PR rtl-optimization/94618
7395 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
7396 insn is the BB_END of its block, but also when it is only followed
7397 by DEBUG_INSNs in its block.
7399 PR tree-optimization/94621
7400 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
7401 Move id->adjust_array_error_bounds check first in the condition.
7403 2020-04-17 Martin Liska <mliska@suse.cz>
7404 Jonathan Yong <10walls@gmail.com>
7406 PR gcov-profile/94570
7407 * coverage.c (coverage_init): Use separator properly.
7409 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
7411 PR rtl-optimization/93974
7412 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
7413 (rs6000_cannot_substitute_mem_equiv_p): New function.
7415 2020-04-16 Martin Jambor <mjambor@suse.cz>
7418 * ipa-inline.h (ipa_saved_clone_sources): Declare.
7419 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
7420 (save_inline_function_body): Link the new body holder with the
7422 * cgraph.c: Include ipa-inline.h.
7423 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
7424 the statement in ipa_saved_clone_sources.
7425 * cgraphunit.c: Include ipa-inline.h.
7426 (expand_all_functions): Free ipa_saved_clone_sources.
7428 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
7431 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
7432 the VNx16BI lowpart of the recursively-generated constant.
7434 2020-04-16 Martin Liska <mliska@suse.cz>
7435 Jakub Jelinek <jakub@redhat.com>
7438 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
7439 DECL_IS_REPLACEABLE_OPERATOR during cloning.
7440 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
7441 (propagate_necessity): Check operator names.
7443 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
7445 PR rtl-optimization/94605
7446 * early-remat.c (early_remat::process_block): Handle insns that
7447 set multiple candidate registers.
7448 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
7450 PR gcov-profile/93401
7451 * common.opt (profile-prefix-path): New option.
7452 * coverae.c: Include diagnostics.h.
7453 (coverage_init): Strip profile prefix path.
7454 * doc/invoke.texi (-fprofile-prefix-path): Document.
7456 2020-04-16 Richard Biener <rguenther@suse.de>
7459 * expr.c (emit_move_multi_word): Do not generate code when
7460 the destination part is undefined_operand_subword_p.
7461 * lower-subreg.c (resolve_clobber): Look through a paradoxica
7464 2020-04-16 Martin Jambor <mjambor@suse.cz>
7466 PR tree-optimization/94598
7467 * tree-sra.c (verify_sra_access_forest): Fix verification of total
7468 scalarization accesses under access to one-element arrays.
7470 2020-04-16 Jakub Jelinek <jakub@redhat.com>
7473 * function.c (assign_parm_find_data_types): Add workaround for
7474 BROKEN_VALUE_INITIALIZATION compilers.
7476 2020-04-16 Richard Biener <rguenther@suse.de>
7478 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
7481 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
7484 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
7485 Require OPTION_MASK_ISA_SSE2.
7487 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
7490 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
7491 Don't construct a dump_context temporary to call static method.
7493 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
7495 * config/aarch64/falkor-tag-collision-avoidance.c
7496 (valid_src_p): Check for aarch64_address_info type before
7497 accessing base field.
7499 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
7501 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
7502 (V_sz_elem2): Remove unused mode attribute.
7504 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
7506 * config/arm/arm.md (arm_movdi): Disallow for MVE.
7508 2020-04-15 Richard Biener <rguenther@suse.de>
7511 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
7512 alias_sets_conflict_p for pointers.
7514 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
7517 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
7518 (extendhisi2_internal): Add %v1 before the load instructions.
7520 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
7523 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
7524 use PC-relative addressing for TLS references.
7526 2020-04-14 Martin Jambor <mjambor@suse.cz>
7529 * ipa-sra.c: Include internal-fn.h.
7530 (enum isra_scan_context): Update comment.
7531 (scan_function): Treat calls to internal_functions like loads or stores.
7533 2020-04-14 Yang Yang <yangyang305@huawei.com>
7535 PR tree-optimization/94574
7536 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
7537 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
7539 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
7542 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
7544 2020-04-13 Martin Sebor <msebor@redhat.com>
7546 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
7547 -Wformat-truncation. Move -Wzero-length-bounds last.
7548 (-Wrestrict): Document positive form of option enabled by -Wall.
7550 2020-04-13 Zachary Spytz <zspytz@gmail.com>
7552 * doc/extend.texi: Add realloc to list of built-in functions
7553 are recognized by the compiler.
7555 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
7558 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
7559 pointer in word_mode for eh_return epilogues.
7561 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
7563 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
7564 memory references in %B, %C and %D operand selectors when the inner
7565 operand is a post increment address.
7567 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
7569 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
7570 reference by 4 bytes, and %D memory reference by 6 bytes.
7572 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
7575 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
7576 condition for V4SI, V8HI and V16QI modes.
7578 2020-04-11 Jakub Jelinek <jakub@redhat.com>
7582 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
7585 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
7589 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
7590 "#pragma omp declare target" has also been applied.
7592 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
7594 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
7595 when to emit the epilogue_helper insn.
7596 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
7599 2020-04-09 Jakub Jelinek <jakub@redhat.com>
7602 * cselib.h (cselib_record_sp_cfa_base_equiv,
7603 cselib_sp_derived_value_p): Declare.
7604 * cselib.c (cselib_record_sp_cfa_base_equiv,
7605 cselib_sp_derived_value_p): New functions.
7606 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
7607 cselib_sp_derived_value_p values.
7608 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
7609 start of extended basic blocks other than the first one
7610 for !frame_pointer_needed functions.
7612 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
7614 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
7615 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
7616 (aarch64_sve2048_hw): Document.
7617 * config/aarch64/aarch64-protos.h
7618 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
7619 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
7620 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
7621 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
7623 (find_type_suffix_for_scalar_type): Use it instead of comparing
7625 (function_resolver::infer_vector_or_tuple_type): Likewise.
7626 (function_resolver::require_vector_type): Likewise.
7627 (handle_arm_sve_vector_bits_attribute): New function.
7628 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
7629 (aarch64_attribute_table): Add arm_sve_vector_bits.
7630 (aarch64_return_in_memory_1):
7631 (pure_scalable_type_info::piece::get_rtx): New function.
7632 (pure_scalable_type_info::num_zr): Likewise.
7633 (pure_scalable_type_info::num_pr): Likewise.
7634 (pure_scalable_type_info::get_rtx): Likewise.
7635 (pure_scalable_type_info::analyze): Likewise.
7636 (pure_scalable_type_info::analyze_registers): Likewise.
7637 (pure_scalable_type_info::analyze_array): Likewise.
7638 (pure_scalable_type_info::analyze_record): Likewise.
7639 (pure_scalable_type_info::add_piece): Likewise.
7640 (aarch64_some_values_include_pst_objects_p): Likewise.
7641 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
7642 to analyze whether the type is returned in SVE registers.
7643 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
7644 is passed in SVE registers.
7645 (aarch64_pass_by_reference_1): New function, extracted from...
7646 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
7647 to analyze whether the type is a pure scalable type and, if so,
7648 whether it should be passed by reference.
7649 (aarch64_return_in_msb): Return false for pure scalable types.
7650 (aarch64_function_value_1): Fold back into...
7651 (aarch64_function_value): ...this function. Use
7652 pure_scalable_type_info to analyze whether the type is a pure
7653 scalable type and, if so, which registers it should use. Handle
7654 types that include pure scalable types but are not themselves
7655 pure scalable types.
7656 (aarch64_return_in_memory_1): New function, split out from...
7657 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
7658 to analyze whether the type is a pure scalable type and, if so,
7659 whether it should be returned by reference.
7660 (aarch64_layout_arg): Remove orig_mode argument. Use
7661 pure_scalable_type_info to analyze whether the type is a pure
7662 scalable type and, if so, which registers it should use. Handle
7663 types that include pure scalable types but are not themselves
7664 pure scalable types.
7665 (aarch64_function_arg): Update call accordingly.
7666 (aarch64_function_arg_advance): Likewise.
7667 (aarch64_pad_reg_upward): On big-endian targets, return false for
7668 pure scalable types that are smaller than 16 bytes.
7669 (aarch64_member_type_forces_blk): New function.
7670 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
7671 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
7672 correspond to built-in SVE types. Do not rely on a vector mode
7673 if the type includes an pure scalable type. When returning true,
7674 assert that the mode is not an SVE mode.
7675 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
7676 built-in types here. When returning true, assert that the type
7677 does not have an SVE mode.
7678 (aarch64_can_change_mode_class): Don't allow anything to change
7679 between a predicate mode and a non-predicate mode. Also don't
7680 allow changes between SVE vector modes and other modes that
7681 might be bigger than 128 bits.
7682 (aarch64_invalid_binary_op): Reject binary operations that mix
7683 SVE and GNU vector types.
7684 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
7686 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
7688 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
7689 "SVE sizeless type".
7690 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
7691 (sizeless_type_p): New functions.
7692 (register_builtin_types): Apply make_type_sizeless to the type.
7693 (register_tuple_type): Likewise.
7694 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
7696 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
7698 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
7701 2020-04-09 Martin Jambor <mjambor@suse.cz>
7702 Richard Biener <rguenther@suse.de>
7704 PR tree-optimization/94482
7705 * tree-sra.c (create_access_replacement): Dump new replacement with
7707 (sra_modify_expr): Fix handling of cases when the original EXPR writes
7708 to only part of the replacement.
7709 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
7710 the first operand of combinations into REAL/IMAGPART_EXPR and
7713 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
7715 * doc/sourcebuild.texi (check-function-bodies): Treat the third
7716 parameter as a list of option regexps and require each regexp
7719 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
7722 * config/aarch64/falkor-tag-collision-avoidance.c
7723 (valid_src_p): Fix missing rtx type check.
7725 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
7726 Richard Biener <rguenther@suse.de>
7728 PR tree-optimization/93674
7729 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
7730 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
7731 or non-mode precision type, add candidate in unsigned type with the
7734 2020-04-08 Clement Chigot <clement.chigot@atos.net>
7736 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
7737 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
7738 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
7740 2020-04-08 Jakub Jelinek <jakub@redhat.com>
7743 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
7745 * reload1.c (eliminate_regs_1): Avoid creating
7746 (plus (reg) (const_int 0)) in DEBUG_INSNs.
7748 PR tree-optimization/94524
7749 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
7750 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
7751 op1 rather than op1 itself at the end. Punt for signed modulo by
7752 most negative constant.
7753 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
7754 modulo by most negative constant.
7756 2020-04-08 Richard Biener <rguenther@suse.de>
7758 PR rtl-optimization/93946
7759 * cse.c (cse_insn): Record the tabled expression in
7760 src_related. Verify a redundant store removal is valid.
7762 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
7765 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
7766 ENDBR at function entry if function will be called indirectly.
7768 2020-04-08 Jakub Jelinek <jakub@redhat.com>
7771 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
7774 2020-04-08 Martin Liska <mliska@suse.cz>
7777 * gimple.c (gimple_call_operator_delete_p): Rename to...
7778 (gimple_call_replaceable_operator_delete_p): ... this.
7779 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
7780 * gimple.h (gimple_call_operator_delete_p): Rename to ...
7781 (gimple_call_replaceable_operator_delete_p): ... this.
7782 * tree-core.h (tree_function_decl): Add replaceable_operator
7784 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
7785 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
7786 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
7787 (eliminate_unnecessary_stmts): Likewise.
7788 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
7789 Pack DECL_IS_REPLACEABLE_OPERATOR.
7790 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
7791 Unpack the field here.
7792 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
7793 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
7794 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
7795 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
7796 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
7797 replaceable operator flags.
7799 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
7800 Matthew Malcomson <matthew.malcomson@arm.com>
7802 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
7803 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
7804 (CX_TERNARY_QUALIFIERS): Likewise.
7805 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
7806 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
7807 (arm_init_acle_builtins): Initialize CDE builtins.
7808 (arm_expand_acle_builtin): Check CDE constant operands.
7809 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
7810 of CDE constant operand.
7811 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
7813 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
7814 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
7815 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
7816 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
7817 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
7818 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
7819 * config/arm/arm_cde_builtins.def: New file.
7820 * config/arm/iterators.md (V_reg): New attribute of SI.
7821 * config/arm/predicates.md (const_int_coproc_operand): New.
7822 (const_int_vcde1_operand, const_int_vcde2_operand): New.
7823 (const_int_vcde3_operand): New.
7824 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
7825 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
7826 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
7827 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
7829 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
7831 * config.gcc: Add arm_cde.h.
7832 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
7833 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
7834 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
7835 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
7836 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
7837 * config/arm/arm.h (TARGET_CDE): New macro.
7838 * config/arm/arm_cde.h: New file.
7839 * doc/invoke.texi: Document CDE options +cdecp[0-7].
7840 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
7842 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
7844 2020-04-08 Jakub Jelinek <jakub@redhat.com>
7846 PR rtl-optimization/94516
7847 * postreload.c: Include rtl-iter.h.
7848 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
7849 looking for all MEMs with RTX_AUTOINC operand.
7850 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
7852 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
7854 * omp-grid.c (grid_eliminate_combined_simd_part): Use
7855 OMP_CLAUSE_CODE to access the omp clause code.
7857 2020-04-07 Jeff Law <law@redhat.com>
7859 PR rtl-optimization/92264
7860 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
7861 the destination is the stack pointer.
7863 2020-04-07 Jakub Jelinek <jakub@redhat.com>
7865 PR rtl-optimization/94291
7866 PR rtl-optimization/84169
7867 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
7868 must be a REG or SUBREG of REG; if it is not one of these, don't
7871 2020-04-07 Richard Biener <rguenther@suse.de>
7874 * gimplify.c (gimplify_addr_expr): Also consider generated
7877 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7879 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
7881 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7883 * config/arm/arm_mve.h: Cast some pointers to expected types.
7885 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7887 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
7888 same with '__arm_' prefix.
7890 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7892 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
7894 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7896 * config/arm/arm.c (arm_mve_immediate_check): Removed.
7897 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
7898 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
7899 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
7900 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
7901 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
7902 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
7904 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7906 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
7908 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7910 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
7911 * config/arm/mve/md: Fix v[id]wdup patterns.
7913 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7915 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
7916 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
7918 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7920 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
7921 and remove const_ptr enums.
7923 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7925 * config/arm/arm_mve.h (vsubq_n): Merge with...
7927 (vmulq_n): Merge with...
7929 (__ARM_mve_typeid): Simplify scalar and constant detection.
7931 2020-04-07 Jakub Jelinek <jakub@redhat.com>
7934 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
7935 for inter-lane permutation for 64-byte modes.
7938 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
7939 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
7940 Assume it is a REG after that instead of testing it and doing FAIL
7941 otherwise. Formatting fix.
7943 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
7945 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
7947 2020-04-07 Jakub Jelinek <jakub@redhat.com>
7950 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
7951 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
7953 2020-04-06 Jakub Jelinek <jakub@redhat.com>
7955 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
7956 + const0_rtx return the SP_DERIVED_VALUE_P.
7958 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
7960 PR rtl-optimization/92989
7961 * lra-lives.c (process_bb_lives): Do not treat eh_return data
7962 registers as being live at the beginning of the EH receiver.
7964 2020-04-05 Zachary Spytz <zspytz@gmail.com>
7966 * extend.texi: Add free to list of ISO C90 functions that
7967 are recognized by the compiler.
7969 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
7971 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
7974 * config/microblaze/microblaze.md (trap): Update output pattern.
7976 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
7977 Jakub Jelinek <jakub@redhat.com>
7980 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
7981 arrays, pointer-to-members, function types and qualifiers when
7982 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
7983 to emit type again on definition.
7985 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
7988 * ipa-fnsummary.c (vrp_will_run_p): New function.
7989 (fre_will_run_p): New function.
7990 (evaluate_properties_for_edge): Use it.
7991 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
7992 !optimize_debug to optimize_debug.
7994 2020-04-04 Jakub Jelinek <jakub@redhat.com>
7996 PR rtl-optimization/94468
7997 * cselib.c (references_value_p): Formatting fix.
7998 (cselib_useless_value_p): New function.
7999 (discard_useless_locs, discard_useless_values,
8000 cselib_invalidate_regno_val, cselib_invalidate_mem,
8001 cselib_record_set): Use it instead of
8002 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
8005 * tree-iterator.h (expr_single): Declare.
8006 * tree-iterator.c (expr_single): New function.
8007 * tree.h (protected_set_expr_location_if_unset): Declare.
8008 * tree.c (protected_set_expr_location): Use expr_single.
8009 (protected_set_expr_location_if_unset): New function.
8011 2020-04-03 Jeff Law <law@redhat.com>
8013 PR rtl-optimization/92264
8014 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
8015 reloading of auto-increment addressing modes.
8017 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
8020 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
8023 2020-04-03 Jeff Law <law@redhat.com>
8025 PR rtl-optimization/92264
8026 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
8027 post-increment addressing of source operands as well as residuals
8028 when computing any adjustments to the input pointer.
8030 2020-04-03 Jakub Jelinek <jakub@redhat.com>
8033 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
8034 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
8035 second half of first lane from first lane of second operand and
8036 first half of second lane from second lane of first operand.
8038 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
8040 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
8042 2020-04-03 Tamar Christina <tamar.christina@arm.com>
8045 * common/config/aarch64/aarch64-common.c
8046 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
8048 2020-04-03 Richard Biener <rguenther@suse.de>
8051 * tree.c (array_ref_low_bound): Deal with released SSA names
8054 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
8056 * config/gcn/gcn.c (print_operand): Handle unordered comparison
8058 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
8059 comparison operators.
8061 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
8063 PR tree-optimization/94443
8064 * tree-vect-loop.c (vectorizable_live_operation): Use
8065 gsi_insert_seq_before to replace gsi_insert_before.
8067 2020-04-03 Martin Liska <mliska@suse.cz>
8070 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
8071 Compare type attributes for gimple_call_fntypes.
8073 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
8075 * alias.c (get_alias_set): Fix comment typos.
8077 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
8080 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
8081 attribute checking used by TYPE.
8083 2020-04-02 Martin Jambor <mjambor@suse.cz>
8086 * ipa-sra.c (struct caller_issues): New fields candidate and
8087 call_from_outside_comdat.
8088 (check_for_caller_issues): Check for calls from outsied of
8089 candidate's same_comdat_group.
8090 (check_all_callers_for_issues): Set up issues.candidate, check result
8092 (mark_callers_calls_comdat_local): New function.
8093 (process_isra_node_results): Set calls_comdat_local of callers if
8096 2020-04-02 Richard Biener <rguenther@suse.de>
8099 * common.opt (ffinite-loops): Initialize to zero.
8100 * opts.c (default_options_table): Remove OPT_ffinite_loops
8102 * cfgloop.h (loop::finite_p): New member.
8103 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
8104 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
8106 * lto-streamer-in.c (input_cfg): Stream finite_p.
8107 * lto-streamer-out.c (output_cfg): Likewise.
8108 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
8109 from flag_finite_loops at CFG build time.
8110 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
8111 finite_p flag instead of flag_finite_loops.
8112 * doc/invoke.texi (ffinite-loops): Adjust documentation of
8115 2020-04-02 Richard Biener <rguenther@suse.de>
8118 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
8119 DW_TAG_imported_unit.
8121 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
8123 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
8124 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
8127 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
8129 PR tree-optimization/94401
8130 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
8131 access type when loading halves of vector to avoid peeling for gaps.
8133 2020-04-02 Jakub Jelinek <jakub@redhat.com>
8135 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
8136 between a string literal and MIPS_SYSVERSION_SPEC macro.
8138 2020-04-02 Martin Jambor <mjambor@suse.cz>
8140 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
8142 2020-04-02 Jakub Jelinek <jakub@redhat.com>
8144 PR rtl-optimization/92264
8145 * params.opt (-param=max-find-base-term-values=): Decrease default
8148 PR rtl-optimization/92264
8149 * rtl.h (struct rtx_def): Mention that call bit is used as
8150 SP_DERIVED_VALUE_P in cselib.c.
8151 * cselib.c (SP_DERIVED_VALUE_P): Define.
8152 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
8153 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
8154 val_rtx and sp based expression where offsets cancel each other.
8155 (preserve_constants_and_equivs): Formatting fix.
8156 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
8157 locs list for cfa_base_preserved_val if needed. Formatting fix.
8158 (autoinc_split): If the to be returned value is a REG, MEM or
8159 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
8160 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
8161 (rtx_equal_for_cselib_1): Call autoinc_split even if both
8162 expressions are PLUS in Pmode with CONST_INT second operands.
8163 Handle SP_DERIVED_VALUE_P cases.
8164 (cselib_hash_plus_const_int): New function.
8165 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
8166 second operand, as well as for PRE_DEC etc. that ought to be
8167 hashed the same way.
8168 (cselib_subst_to_values): Substitute PLUS with Pmode and
8169 CONST_INT operand if the first operand is a VALUE which has
8170 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
8171 SP_DERIVED_VALUE_P + adjusted offset.
8172 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
8173 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
8174 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
8175 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
8176 on the sp value before calling cselib_add_permanent_equiv on the
8178 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
8179 in the insn without REG_INC note.
8180 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
8181 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
8184 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
8185 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
8187 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8190 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
8191 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
8192 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
8193 intrinsic defintion by adding a new builtin call to writeback into base
8195 (__arm_vldrdq_gather_base_wb_u64): Likewise.
8196 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
8197 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
8198 (__arm_vldrwq_gather_base_wb_s32): Likewise.
8199 (__arm_vldrwq_gather_base_wb_u32): Likewise.
8200 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
8201 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
8202 (__arm_vldrwq_gather_base_wb_f32): Likewise.
8203 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
8204 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
8205 builtin's qualifier.
8206 (vldrdq_gather_base_wb_z_u): Likewise.
8207 (vldrwq_gather_base_wb_u): Likewise.
8208 (vldrdq_gather_base_wb_u): Likewise.
8209 (vldrwq_gather_base_wb_z_s): Likewise.
8210 (vldrwq_gather_base_wb_z_f): Likewise.
8211 (vldrdq_gather_base_wb_z_s): Likewise.
8212 (vldrwq_gather_base_wb_s): Likewise.
8213 (vldrwq_gather_base_wb_f): Likewise.
8214 (vldrdq_gather_base_wb_s): Likewise.
8215 (vldrwq_gather_base_nowb_z_u): Define builtin.
8216 (vldrdq_gather_base_nowb_z_u): Likewise.
8217 (vldrwq_gather_base_nowb_u): Likewise.
8218 (vldrdq_gather_base_nowb_u): Likewise.
8219 (vldrwq_gather_base_nowb_z_s): Likewise.
8220 (vldrwq_gather_base_nowb_z_f): Likewise.
8221 (vldrdq_gather_base_nowb_z_s): Likewise.
8222 (vldrwq_gather_base_nowb_s): Likewise.
8223 (vldrwq_gather_base_nowb_f): Likewise.
8224 (vldrdq_gather_base_nowb_s): Likewise.
8225 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
8227 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
8228 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
8229 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
8230 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
8231 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
8232 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
8233 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
8234 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
8235 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
8236 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
8237 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
8239 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
8241 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
8242 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
8243 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
8244 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
8245 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
8246 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
8247 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
8248 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
8249 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
8251 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
8252 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
8253 Remove constraints from expander.
8254 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
8255 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
8256 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
8257 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
8258 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
8259 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
8261 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
8263 PR rtl-optimization/94123
8264 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
8265 flag_split_wide_types_early.
8267 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
8269 * doc/extend.texi (Common Function Attributes): Fix typo.
8271 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
8274 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
8277 2020-04-01 Zackery Spytz <zspytz@gmail.com>
8279 * doc/extend.texi: Fix a typo in the documentation of the
8280 copy function attribute.
8282 2020-04-01 Jakub Jelinek <jakub@redhat.com>
8285 * tree-object-size.c (pass_object_sizes::execute): Don't call
8286 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
8287 call replace_call_with_value.
8289 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
8291 PR tree-optimization/94043
8292 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
8293 phi for vec_lhs and use it for lane extraction.
8295 2020-03-31 Felix Yang <felix.yang@huawei.com>
8297 PR tree-optimization/94398
8298 * tree-vect-stmts.c (vectorizable_store): Instead of calling
8299 vect_supportable_dr_alignment, set alignment_support_scheme to
8300 dr_unaligned_supported for gather-scatter accesses.
8301 (vectorizable_load): Likewise.
8303 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
8305 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
8307 (vnsi, VnSI, vndi, VnDI): New mode attributes.
8308 (mov<mode>): Use <VnDI> in place of V64DI.
8309 (mov<mode>_exec): Likewise.
8310 (mov<mode>_sgprbase): Likewise.
8311 (reload_out<mode>): Likewise.
8312 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
8313 (gather_load<mode>v64si): Rename to ...
8314 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
8315 and <VnDI> in place of V64DI.
8316 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
8317 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
8318 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
8319 (scatter_store<mode>v64si): Rename to ...
8320 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
8321 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
8322 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
8323 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
8324 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
8325 (ds_bpermute<mode>): Use <VnSI>.
8326 (addv64si3_vcc<exec_vcc>): Rename to ...
8327 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
8328 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
8329 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
8330 (addcv64si3<exec_vcc>): Rename to ...
8331 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
8332 (subv64si3_vcc<exec_vcc>): Rename to ...
8333 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
8334 (subcv64si3<exec_vcc>): Rename to ...
8335 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
8336 (addv64di3): Rename to ...
8337 (add<mode>3): ... this, and use V_DI.
8338 (addv64di3_exec): Rename to ...
8339 (add<mode>3_exec): ... this, and use V_DI.
8340 (subv64di3): Rename to ...
8341 (sub<mode>3): ... this, and use V_DI.
8342 (subv64di3_exec): Rename to ...
8343 (sub<mode>3_exec): ... this, and use V_DI.
8344 (addv64di3_zext): Rename to ...
8345 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
8346 (addv64di3_zext_exec): Rename to ...
8347 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
8348 (addv64di3_zext_dup): Rename to ...
8349 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
8350 (addv64di3_zext_dup_exec): Rename to ...
8351 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
8352 (addv64di3_zext_dup2): Rename to ...
8353 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
8354 (addv64di3_zext_dup2_exec): Rename to ...
8355 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
8356 (addv64di3_sext_dup2): Rename to ...
8357 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
8358 (addv64di3_sext_dup2_exec): Rename to ...
8359 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
8360 (<su>mulv64si3_highpart<exec>): Rename to ...
8361 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
8362 (mulv64di3): Rename to ...
8363 (mul<mode>3): ... this, and use V_DI and <VnSI>.
8364 (mulv64di3_exec): Rename to ...
8365 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
8366 (mulv64di3_zext): Rename to ...
8367 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
8368 (mulv64di3_zext_exec): Rename to ...
8369 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
8370 (mulv64di3_zext_dup2): Rename to ...
8371 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
8372 (mulv64di3_zext_dup2_exec): Rename to ...
8373 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
8374 (<expander>v64di3): Rename to ...
8375 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
8376 (<expander>v64di3_exec): Rename to ...
8377 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
8378 (<expander>v64si3<exec>): Rename to ...
8379 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
8380 (v<expander>v64si3<exec>): Rename to ...
8381 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
8382 (<expander>v64si3<exec>): Rename to ...
8383 (<expander><vnsi>3<exec>): ... this, and use V_SI.
8384 (subv64df3<exec>): Rename to ...
8385 (sub<mode>3<exec>): ... this, and use V_DF.
8386 (truncv64di<mode>2): Rename to ...
8387 (trunc<vndi><mode>2): ... this, and use <VnDI>.
8388 (truncv64di<mode>2_exec): Rename to ...
8389 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
8390 (<convop><mode>v64di2): Rename to ...
8391 (<convop><mode><vndi>2): ... this, and use <VnDI>.
8392 (<convop><mode>v64di2_exec): Rename to ...
8393 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
8394 (vec_cmp<u>v64qidi): Rename to ...
8395 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
8396 (vec_cmp<u>v64qidi_exec): Rename to ...
8397 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
8398 (vcond_mask_<mode>di): Use <VnDI>.
8399 (maskload<mode>di): Likewise.
8400 (maskstore<mode>di): Likewise.
8401 (mask_gather_load<mode>v64si): Rename to ...
8402 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
8403 (mask_scatter_store<mode>v64si): Rename to ...
8404 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
8405 (*<reduc_op>_dpp_shr_v64di): Rename to ...
8406 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
8407 (*plus_carry_in_dpp_shr_v64si): Rename to ...
8408 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
8409 (*plus_carry_dpp_shr_v64di): Rename to ...
8410 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
8411 (vec_seriesv64si): Rename to ...
8412 (vec_series<mode>): ... this, and use V_SI.
8413 (vec_seriesv64di): Rename to ...
8414 (vec_series<mode>): ... this, and use V_DI.
8416 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
8418 * config/arc/arc.c (arc_print_operand): Use
8419 HOST_WIDE_INT_PRINT_DEC macro.
8421 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
8423 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
8425 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8427 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
8429 (__arm_vbicq): Likewise.
8431 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
8433 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
8435 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8437 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
8438 common section of both MVE Integer and MVE Floating Point.
8440 (vaddlvq_p): Likewise.
8441 (vaddvaq): Likewise.
8442 (vaddvq_p): Likewise.
8443 (vcmpcsq): Likewise.
8444 (vmlsdavxq): Likewise.
8445 (vmlsdavq): Likewise.
8446 (vmladavxq): Likewise.
8447 (vmladavq): Likewise.
8449 (vminavq): Likewise.
8451 (vmaxavq): Likewise.
8452 (vmlaldavq): Likewise.
8453 (vcmphiq): Likewise.
8454 (vaddlvaq): Likewise.
8455 (vrmlaldavhq): Likewise.
8456 (vrmlaldavhxq): Likewise.
8457 (vrmlsldavhq): Likewise.
8458 (vrmlsldavhxq): Likewise.
8459 (vmlsldavxq): Likewise.
8460 (vmlsldavq): Likewise.
8462 (vrmlaldavhaq): Likewise.
8463 (vcmpgeq_m_n): Likewise.
8464 (vmlsdavxq_p): Likewise.
8465 (vmlsdavq_p): Likewise.
8466 (vmlsdavaxq): Likewise.
8467 (vmlsdavaq): Likewise.
8468 (vaddvaq_p): Likewise.
8469 (vcmpcsq_m_n): Likewise.
8470 (vcmpcsq_m): Likewise.
8471 (vmladavxq_p): Likewise.
8472 (vmladavq_p): Likewise.
8473 (vmladavaxq): Likewise.
8474 (vmladavaq): Likewise.
8475 (vminvq_p): Likewise.
8476 (vminavq_p): Likewise.
8477 (vmaxvq_p): Likewise.
8478 (vmaxavq_p): Likewise.
8479 (vcmphiq_m): Likewise.
8480 (vaddlvaq_p): Likewise.
8481 (vmlaldavaq): Likewise.
8482 (vmlaldavaxq): Likewise.
8483 (vmlaldavq_p): Likewise.
8484 (vmlaldavxq_p): Likewise.
8485 (vmlsldavaq): Likewise.
8486 (vmlsldavaxq): Likewise.
8487 (vmlsldavq_p): Likewise.
8488 (vmlsldavxq_p): Likewise.
8489 (vrmlaldavhaxq): Likewise.
8490 (vrmlaldavhq_p): Likewise.
8491 (vrmlaldavhxq_p): Likewise.
8492 (vrmlsldavhaq): Likewise.
8493 (vrmlsldavhaxq): Likewise.
8494 (vrmlsldavhq_p): Likewise.
8495 (vrmlsldavhxq_p): Likewise.
8496 (vabavq_p): Likewise.
8497 (vmladavaq_p): Likewise.
8498 (vstrbq_scatter_offset): Likewise.
8499 (vstrbq_p): Likewise.
8500 (vstrbq_scatter_offset_p): Likewise.
8501 (vstrdq_scatter_base_p): Likewise.
8502 (vstrdq_scatter_base): Likewise.
8503 (vstrdq_scatter_offset_p): Likewise.
8504 (vstrdq_scatter_offset): Likewise.
8505 (vstrdq_scatter_shifted_offset_p): Likewise.
8506 (vstrdq_scatter_shifted_offset): Likewise.
8507 (vmaxq_x): Likewise.
8508 (vminq_x): Likewise.
8509 (vmovlbq_x): Likewise.
8510 (vmovltq_x): Likewise.
8511 (vmulhq_x): Likewise.
8512 (vmullbq_int_x): Likewise.
8513 (vmullbq_poly_x): Likewise.
8514 (vmulltq_int_x): Likewise.
8515 (vmulltq_poly_x): Likewise.
8518 2020-03-31 Jakub Jelinek <jakub@redhat.com>
8521 * config/aarch64/constraints.md (Uph): New constraint.
8522 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
8523 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
8526 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
8527 Jakub Jelinek <jakub@redhat.com>
8530 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
8531 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
8533 2020-03-31 Jakub Jelinek <jakub@redhat.com>
8535 PR tree-optimization/94403
8536 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
8537 ENUMERAL_TYPE lhs_type.
8539 PR rtl-optimization/94344
8540 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
8541 conversions, either on both operands of |^+ or just one. Handle
8542 also extra same precision conversion on RSHIFT_EXPR first operand
8543 provided RSHIFT_EXPR is performed in unsigned type.
8545 2020-03-30 David Malcolm <dmalcolm@redhat.com>
8547 * lra.c (finish_insn_code_data_once): Set the array elements
8548 to NULL after freeing them.
8550 2020-03-30 Andreas Schwab <schwab@suse.de>
8552 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
8555 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
8557 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
8558 to skip defining builtins based on builtin_mask.
8560 2020-03-30 Jakub Jelinek <jakub@redhat.com>
8563 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
8564 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
8565 operand is a register. Don't enable masked variants for V*[QH]Imode.
8568 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
8569 <store_mask_constraint> instead of m in output operand constraint.
8570 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
8573 2020-03-30 Alan Modra <amodra@gmail.com>
8575 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
8576 (rs6000_indirect_call_template_1): Adjust to suit.
8577 * config/rs6000/rs6000.md (call_local): Merge call_local32,
8578 call_local64, and call_local_aix.
8579 (call_value_local): Simlarly.
8580 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
8581 and disable pattern when CALL_LONG.
8582 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
8583 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
8584 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
8586 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
8589 * doc/invoke.texi: Update -falign-functions, -falign-loops and
8590 -falign-jumps documentation.
8592 2020-03-29 Martin Liska <mliska@suse.cz>
8595 * cgraphunit.c (process_function_and_variable_attributes): Remove
8596 double 'attribute' words.
8598 2020-03-29 John David Anglin <dave.anglin@bell.net>
8600 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
8603 2020-03-28 Jakub Jelinek <jakub@redhat.com>
8606 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
8607 to true after setting size to integer_one_node.
8609 PR tree-optimization/94329
8610 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
8611 on the last stmt in a bb, make sure gsi_prev isn't done immediately
8614 2020-03-27 Alan Modra <amodra@gmail.com>
8617 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
8618 for PLT16_LO and PLT_PCREL.
8619 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
8620 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
8621 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
8623 2020-03-27 Martin Sebor <msebor@redhat.com>
8626 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
8628 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
8630 * config/gcn/gcn-valu.md:
8631 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
8632 (VEC_1REG_MODE): Delete.
8633 (VEC_1REG_ALT): Delete.
8634 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
8635 (VEC_1REG_INT_MODE): Delete.
8636 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
8637 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
8638 (VEC_2REG_MODE): Rename to V_2REG throughout.
8639 (VEC_REG_MODE): Rename to V_noHI throughout.
8640 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
8641 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
8642 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
8643 (VEC_INT_MODE): Delete.
8644 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
8645 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
8646 (FP_MODE): Delete and replace with FP throughout.
8647 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
8648 (VCMP_MODE): Rename to V_noQI throughout and move to top.
8649 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
8650 * config/gcn/gcn.md (FP): New mode iterator.
8651 (FP_1REG): New mode iterator.
8653 2020-03-27 David Malcolm <dmalcolm@redhat.com>
8655 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
8656 now emits two .dot files.
8657 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
8658 (graphviz_out::end_tr): Only close a TR, not a TD.
8659 (graphviz_out::begin_td): New.
8660 (graphviz_out::end_td): New.
8661 (graphviz_out::begin_trtd): New, replacing the old implementation
8662 of graphviz_out::begin_tr.
8663 (graphviz_out::end_tdtr): New, replacing the old implementation
8664 of graphviz_out::end_tr.
8665 * graphviz.h (graphviz_out::begin_td): New decl.
8666 (graphviz_out::end_td): New decl.
8667 (graphviz_out::begin_trtd): New decl.
8668 (graphviz_out::end_tdtr): New decl.
8670 2020-03-27 Richard Biener <rguenther@suse.de>
8673 * dwarf2out.c (should_emit_struct_debug): Return false for
8676 2020-03-27 Richard Biener <rguenther@suse.de>
8678 PR tree-optimization/94352
8679 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
8681 (ssa_propagation_engine::ssa_propagate): ... here after
8682 initializing curr_order.
8684 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
8686 PR tree-optimization/90332
8687 * tree-vect-stmts.c (vector_vector_composition_type): New function.
8688 (get_group_load_store_type): Adjust to call
8689 vector_vector_composition_type, extend it to construct with scalar
8691 (vectorizable_load): Likewise.
8693 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
8695 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
8696 (create_ddg_dep_no_link): Likewise.
8697 (add_cross_iteration_register_deps): Move debug instruction check.
8698 Other minor refactoring.
8699 (add_intra_loop_mem_dep): Do not check for debug instructions.
8700 (add_inter_loop_mem_dep): Likewise.
8701 (build_intra_loop_deps): Likewise.
8702 (create_ddg): Do not include debug insns into the graph.
8703 * ddg.h (struct ddg): Remove num_debug field.
8704 * modulo-sched.c (doloop_register_get): Adjust condition.
8705 (res_MII): Remove DDG num_debug field usage.
8706 (sms_schedule_by_order): Use assertion against debug insns.
8707 (ps_has_conflicts): Drop debug insn check.
8709 2020-03-26 Jakub Jelinek <jakub@redhat.com>
8712 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
8713 that contains exactly one non-DEBUG_BEGIN_STMT statement.
8716 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
8717 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
8718 a single non-debug stmt followed by one or more debug stmts.
8719 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
8720 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
8721 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
8722 gimple_seq_last to check if outer_stmt gbind could be reused and
8723 if yes and it is surrounded by any debug stmts, move them into the
8726 PR rtl-optimization/92264
8727 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
8728 for sp based values in !frame_pointer_needed
8729 && !ACCUMULATE_OUTGOING_ARGS functions.
8731 2020-03-26 Felix Yang <felix.yang@huawei.com>
8733 PR tree-optimization/94269
8734 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
8736 operation to single basic block.
8738 2020-03-25 Jeff Law <law@redhat.com>
8740 PR rtl-optimization/90275
8741 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
8744 2020-03-25 Jakub Jelinek <jakub@redhat.com>
8747 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
8748 mode rather than VOIDmode.
8750 2020-03-25 Martin Sebor <msebor@redhat.com>
8753 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
8754 even for alloca calls resulting from system macro expansion.
8755 Include inlining context in all warnings.
8757 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
8760 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
8761 FPRs to change between SDmode and DDmode.
8763 2020-03-25 Martin Sebor <msebor@redhat.com>
8765 PR tree-optimization/94131
8766 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
8768 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
8769 types have constant sizes.
8771 2020-03-25 Martin Liska <mliska@suse.cz>
8774 * configure.ac: Report error only when --with-zstd
8776 * configure: Regenerate.
8778 2020-03-25 Jakub Jelinek <jakub@redhat.com>
8781 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
8782 INSN_CODE (insn) to -1 when changing the pattern.
8784 2020-03-25 Martin Liska <mliska@suse.cz>
8788 * config/i386/i386-features.c (make_resolver_func): Drop
8789 public flag for resolver.
8790 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
8791 group for resolver and drop public flag if possible.
8792 * multiple_target.c (create_dispatcher_calls): Drop unique_name
8793 and resolution as we want to enable LTO privatization of the default
8796 2020-03-25 Martin Liska <mliska@suse.cz>
8799 * configure.ac: Respect --without-zstd and report
8800 error when we can't find header file with --with-zstd.
8801 * configure: Regenerate.
8803 2020-03-25 Jakub Jelinek <jakub@redhat.com>
8806 * varasm.c (output_constructor_array_range): If local->index
8807 RANGE_EXPR doesn't start at the current location in the constructor,
8808 skip needed number of bytes using assemble_zeros or assert we don't
8812 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
8813 counter instead of DECL_UID.
8815 PR tree-optimization/94300
8816 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
8817 is positive, make sure that off + size isn't larger than needed_len.
8819 2020-03-25 Richard Biener <rguenther@suse.de>
8820 Jakub Jelinek <jakub@redhat.com>
8823 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
8825 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
8827 * doc/sourcebuild.texi (ARM-specific attributes): Add
8829 (Features for dg-add-options): Add arm_fp_dp.
8831 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
8834 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
8836 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
8839 * omp-offload.c (omp_finish_file): Fix target-link handling if
8840 targetm_common.have_named_sections is false.
8842 2020-03-24 Jakub Jelinek <jakub@redhat.com>
8845 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
8849 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
8850 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
8851 If not after and at *incr_pos is a debug stmt, set stmt location to
8852 location of next non-debug stmt after it if any.
8855 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
8856 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
8857 worklist or set GF_PLF_2 just because it is used in a debug stmt in
8858 another bb. Formatting improvements.
8861 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
8862 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
8863 regardless of whether TREE_NO_WARNING is set on it or whether
8864 warn_unused_function is true or not.
8866 2020-03-23 Jeff Law <law@redhat.com>
8868 PR rtl-optimization/90275
8871 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
8872 (simplify_logical_relational_operation): Use it.
8874 2020-03-23 Jakub Jelinek <jakub@redhat.com>
8877 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
8878 ultimate rhs and if returned something different, reconstructing
8881 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
8883 * opts.c (print_filtered_help): Improve the help text for alias options.
8885 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8886 Andre Vieira <andre.simoesdiasvieira@arm.com>
8887 Mihail Ionescu <mihail.ionescu@arm.com>
8889 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
8890 (vshlcq_m_u8): Likewise.
8891 (vshlcq_m_s16): Likewise.
8892 (vshlcq_m_u16): Likewise.
8893 (vshlcq_m_s32): Likewise.
8894 (vshlcq_m_u32): Likewise.
8895 (__arm_vshlcq_m_s8): Define intrinsic.
8896 (__arm_vshlcq_m_u8): Likewise.
8897 (__arm_vshlcq_m_s16): Likewise.
8898 (__arm_vshlcq_m_u16): Likewise.
8899 (__arm_vshlcq_m_s32): Likewise.
8900 (__arm_vshlcq_m_u32): Likewise.
8901 (vshlcq_m): Define polymorphic variant.
8902 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
8903 Use builtin qualifier.
8904 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
8905 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
8906 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
8907 (mve_vshlcq_m_<supf><mode>): Likewise.
8909 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8911 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
8912 (UQSHL_QUALIFIERS): Likewise.
8913 (ASRL_QUALIFIERS): Likewise.
8914 (SQSHL_QUALIFIERS): Likewise.
8915 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
8917 (sqrshr): Define macro.
8918 (sqrshrl): Likewise.
8919 (sqrshrl_sat48): Likewise.
8925 (uqrshll): Likewise.
8926 (uqrshll_sat48): Likewise.
8933 (__arm_lsll): Define intrinsic.
8934 (__arm_asrl): Likewise.
8935 (__arm_uqrshll): Likewise.
8936 (__arm_uqrshll_sat48): Likewise.
8937 (__arm_sqrshrl): Likewise.
8938 (__arm_sqrshrl_sat48): Likewise.
8939 (__arm_uqshll): Likewise.
8940 (__arm_urshrl): Likewise.
8941 (__arm_srshrl): Likewise.
8942 (__arm_sqshll): Likewise.
8943 (__arm_uqrshl): Likewise.
8944 (__arm_sqrshr): Likewise.
8945 (__arm_uqshl): Likewise.
8946 (__arm_urshr): Likewise.
8947 (__arm_sqshl): Likewise.
8948 (__arm_srshr): Likewise.
8949 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
8951 (UQSHL_QUALIFIERS): Likewise.
8952 (ASRL_QUALIFIERS): Likewise.
8953 (SQSHL_QUALIFIERS): Likewise.
8954 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
8955 (mve_sqrshrl_sat<supf>_di): Likewise.
8956 (mve_uqrshl_si): Likewise.
8957 (mve_sqrshr_si): Likewise.
8958 (mve_uqshll_di): Likewise.
8959 (mve_urshrl_di): Likewise.
8960 (mve_uqshl_si): Likewise.
8961 (mve_urshr_si): Likewise.
8962 (mve_sqshl_si): Likewise.
8963 (mve_srshr_si): Likewise.
8964 (mve_srshrl_di): Likewise.
8965 (mve_sqshll_di): Likewise.
8967 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8968 Andre Vieira <andre.simoesdiasvieira@arm.com>
8969 Mihail Ionescu <mihail.ionescu@arm.com>
8971 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
8972 (vsetq_lane_f32): Likewise.
8973 (vsetq_lane_s16): Likewise.
8974 (vsetq_lane_s32): Likewise.
8975 (vsetq_lane_s8): Likewise.
8976 (vsetq_lane_s64): Likewise.
8977 (vsetq_lane_u8): Likewise.
8978 (vsetq_lane_u16): Likewise.
8979 (vsetq_lane_u32): Likewise.
8980 (vsetq_lane_u64): Likewise.
8981 (vgetq_lane_f16): Likewise.
8982 (vgetq_lane_f32): Likewise.
8983 (vgetq_lane_s16): Likewise.
8984 (vgetq_lane_s32): Likewise.
8985 (vgetq_lane_s8): Likewise.
8986 (vgetq_lane_s64): Likewise.
8987 (vgetq_lane_u8): Likewise.
8988 (vgetq_lane_u16): Likewise.
8989 (vgetq_lane_u32): Likewise.
8990 (vgetq_lane_u64): Likewise.
8991 (__ARM_NUM_LANES): Likewise.
8992 (__ARM_LANEQ): Likewise.
8993 (__ARM_CHECK_LANEQ): Likewise.
8994 (__arm_vsetq_lane_s16): Define intrinsic.
8995 (__arm_vsetq_lane_s32): Likewise.
8996 (__arm_vsetq_lane_s8): Likewise.
8997 (__arm_vsetq_lane_s64): Likewise.
8998 (__arm_vsetq_lane_u8): Likewise.
8999 (__arm_vsetq_lane_u16): Likewise.
9000 (__arm_vsetq_lane_u32): Likewise.
9001 (__arm_vsetq_lane_u64): Likewise.
9002 (__arm_vgetq_lane_s16): Likewise.
9003 (__arm_vgetq_lane_s32): Likewise.
9004 (__arm_vgetq_lane_s8): Likewise.
9005 (__arm_vgetq_lane_s64): Likewise.
9006 (__arm_vgetq_lane_u8): Likewise.
9007 (__arm_vgetq_lane_u16): Likewise.
9008 (__arm_vgetq_lane_u32): Likewise.
9009 (__arm_vgetq_lane_u64): Likewise.
9010 (__arm_vsetq_lane_f16): Likewise.
9011 (__arm_vsetq_lane_f32): Likewise.
9012 (__arm_vgetq_lane_f16): Likewise.
9013 (__arm_vgetq_lane_f32): Likewise.
9014 (vgetq_lane): Define polymorphic variant.
9015 (vsetq_lane): Likewise.
9016 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
9018 (mve_vec_extractv2didi): Likewise.
9019 (mve_vec_extract_sext_internal<mode>): Likewise.
9020 (mve_vec_extract_zext_internal<mode>): Likewise.
9021 (mve_vec_set<mode>_internal): Likewise.
9022 (mve_vec_setv2di_internal): Likewise.
9023 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
9025 (vec_extract<mode><V_elem_l>): Rename to
9026 "neon_vec_extract<mode><V_elem_l>".
9027 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
9028 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
9029 pattern common for MVE and NEON.
9030 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
9033 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
9035 * config/arm/mve.md (earlyclobber_32): New mode attribute.
9036 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
9037 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
9039 2020-03-23 Richard Biener <rguenther@suse.de>
9041 PR tree-optimization/94261
9042 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
9043 IL operand swapping code.
9044 (vect_slp_rearrange_stmts): Do not arrange isomorphic
9045 nodes that would need operation code adjustments.
9047 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
9049 * doc/install.texi (amdgcn-*-amdhsa): Renamed
9050 from amdgcn-unknown-amdhsa; change
9051 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
9053 2020-03-23 Richard Biener <rguenther@suse.de>
9056 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
9057 directly rather than also folding it via build_fold_addr_expr.
9059 2020-03-23 Richard Biener <rguenther@suse.de>
9061 PR tree-optimization/94266
9062 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
9063 addresses of TARGET_MEM_REFs.
9065 2020-03-23 Martin Liska <mliska@suse.cz>
9068 * symtab.c (symtab_node::clone_references): Save speculative_id
9069 as ref may be overwritten by create_reference.
9070 (symtab_node::clone_referring): Likewise.
9071 (symtab_node::clone_reference): Likewise.
9073 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
9075 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
9076 references to Darwin.
9077 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
9078 unconditionally and comment on why.
9080 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
9082 * config/darwin.c (darwin_mergeable_constant_section): Collect
9083 section anchor checks into the caller.
9084 (machopic_select_section): Collect section anchor checks into
9085 the determination of 'effective zero-size' objects. When the
9086 size is unknown, assume it is non-zero, and thus return the
9087 'generic' section for the DECL.
9089 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
9092 * config/darwin.opt: Amend options descriptions.
9094 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
9096 PR rtl-optimization/94052
9097 * lra-constraints.c (simplify_operand_subreg): Reload the inner
9098 register of a paradoxical subreg if simplify_subreg_regno fails
9099 to give a valid hard register for the outer mode.
9101 2020-03-20 Martin Jambor <mjambor@suse.cz>
9103 PR tree-optimization/93435
9104 * params.opt (sra-max-propagations): New parameter.
9105 * tree-sra.c (propagation_budget): New variable.
9106 (budget_for_propagation_access): New function.
9107 (propagate_subaccesses_from_rhs): Use it.
9108 (propagate_subaccesses_from_lhs): Likewise.
9109 (propagate_all_subaccesses): Set up and destroy propagation_budget.
9111 2020-03-20 Carl Love <cel@us.ibm.com>
9114 * config/rs6000/rs6000.c (rs6000_option_override_internal):
9115 Add check for TARGET_FPRND for Power 7 or newer.
9117 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
9120 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
9121 (cgraph_edge::redirect_callee): Move here; likewise.
9122 (cgraph_node::remove_callees): Update calls_comdat_local flag.
9123 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
9125 (cgraph_node::check_calls_comdat_local_p): New member function.
9126 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
9127 (cgraph_edge::redirect_callee): Move offline.
9128 * ipa-fnsummary.c (compute_fn_summary): Do not compute
9129 calls_comdat_local flag here.
9130 * ipa-inline-transform.c (inline_call): Fix updating of
9131 calls_comdat_local flag.
9132 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
9133 * symtab.c (symtab_node::add_to_same_comdat_group): Update
9134 calls_comdat_local flag.
9136 2020-03-20 Richard Biener <rguenther@suse.de>
9138 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
9139 from the possibly modified root.
9141 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9142 Andre Vieira <andre.simoesdiasvieira@arm.com>
9143 Mihail Ionescu <mihail.ionescu@arm.com>
9145 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
9146 (vst1q_p_s8): Likewise.
9147 (vst2q_s8): Likewise.
9148 (vst2q_u8): Likewise.
9149 (vld1q_z_u8): Likewise.
9150 (vld1q_z_s8): Likewise.
9151 (vld2q_s8): Likewise.
9152 (vld2q_u8): Likewise.
9153 (vld4q_s8): Likewise.
9154 (vld4q_u8): Likewise.
9155 (vst1q_p_u16): Likewise.
9156 (vst1q_p_s16): Likewise.
9157 (vst2q_s16): Likewise.
9158 (vst2q_u16): Likewise.
9159 (vld1q_z_u16): Likewise.
9160 (vld1q_z_s16): Likewise.
9161 (vld2q_s16): Likewise.
9162 (vld2q_u16): Likewise.
9163 (vld4q_s16): Likewise.
9164 (vld4q_u16): Likewise.
9165 (vst1q_p_u32): Likewise.
9166 (vst1q_p_s32): Likewise.
9167 (vst2q_s32): Likewise.
9168 (vst2q_u32): Likewise.
9169 (vld1q_z_u32): Likewise.
9170 (vld1q_z_s32): Likewise.
9171 (vld2q_s32): Likewise.
9172 (vld2q_u32): Likewise.
9173 (vld4q_s32): Likewise.
9174 (vld4q_u32): Likewise.
9175 (vld4q_f16): Likewise.
9176 (vld2q_f16): Likewise.
9177 (vld1q_z_f16): Likewise.
9178 (vst2q_f16): Likewise.
9179 (vst1q_p_f16): Likewise.
9180 (vld4q_f32): Likewise.
9181 (vld2q_f32): Likewise.
9182 (vld1q_z_f32): Likewise.
9183 (vst2q_f32): Likewise.
9184 (vst1q_p_f32): Likewise.
9185 (__arm_vst1q_p_u8): Define intrinsic.
9186 (__arm_vst1q_p_s8): Likewise.
9187 (__arm_vst2q_s8): Likewise.
9188 (__arm_vst2q_u8): Likewise.
9189 (__arm_vld1q_z_u8): Likewise.
9190 (__arm_vld1q_z_s8): Likewise.
9191 (__arm_vld2q_s8): Likewise.
9192 (__arm_vld2q_u8): Likewise.
9193 (__arm_vld4q_s8): Likewise.
9194 (__arm_vld4q_u8): Likewise.
9195 (__arm_vst1q_p_u16): Likewise.
9196 (__arm_vst1q_p_s16): Likewise.
9197 (__arm_vst2q_s16): Likewise.
9198 (__arm_vst2q_u16): Likewise.
9199 (__arm_vld1q_z_u16): Likewise.
9200 (__arm_vld1q_z_s16): Likewise.
9201 (__arm_vld2q_s16): Likewise.
9202 (__arm_vld2q_u16): Likewise.
9203 (__arm_vld4q_s16): Likewise.
9204 (__arm_vld4q_u16): Likewise.
9205 (__arm_vst1q_p_u32): Likewise.
9206 (__arm_vst1q_p_s32): Likewise.
9207 (__arm_vst2q_s32): Likewise.
9208 (__arm_vst2q_u32): Likewise.
9209 (__arm_vld1q_z_u32): Likewise.
9210 (__arm_vld1q_z_s32): Likewise.
9211 (__arm_vld2q_s32): Likewise.
9212 (__arm_vld2q_u32): Likewise.
9213 (__arm_vld4q_s32): Likewise.
9214 (__arm_vld4q_u32): Likewise.
9215 (__arm_vld4q_f16): Likewise.
9216 (__arm_vld2q_f16): Likewise.
9217 (__arm_vld1q_z_f16): Likewise.
9218 (__arm_vst2q_f16): Likewise.
9219 (__arm_vst1q_p_f16): Likewise.
9220 (__arm_vld4q_f32): Likewise.
9221 (__arm_vld2q_f32): Likewise.
9222 (__arm_vld1q_z_f32): Likewise.
9223 (__arm_vst2q_f32): Likewise.
9224 (__arm_vst1q_p_f32): Likewise.
9225 (vld1q_z): Define polymorphic variant.
9228 (vst1q_p): Likewise.
9230 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
9232 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
9233 (mve_vld2q<mode>): Likewise.
9234 (mve_vld4q<mode>): Likewise.
9236 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9237 Andre Vieira <andre.simoesdiasvieira@arm.com>
9238 Mihail Ionescu <mihail.ionescu@arm.com>
9240 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
9241 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
9242 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
9243 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
9244 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
9245 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
9246 * config/arm/arm_mve.h (vadciq_s32): Define macro.
9247 (vadciq_u32): Likewise.
9248 (vadciq_m_s32): Likewise.
9249 (vadciq_m_u32): Likewise.
9250 (vadcq_s32): Likewise.
9251 (vadcq_u32): Likewise.
9252 (vadcq_m_s32): Likewise.
9253 (vadcq_m_u32): Likewise.
9254 (vsbciq_s32): Likewise.
9255 (vsbciq_u32): Likewise.
9256 (vsbciq_m_s32): Likewise.
9257 (vsbciq_m_u32): Likewise.
9258 (vsbcq_s32): Likewise.
9259 (vsbcq_u32): Likewise.
9260 (vsbcq_m_s32): Likewise.
9261 (vsbcq_m_u32): Likewise.
9262 (__arm_vadciq_s32): Define intrinsic.
9263 (__arm_vadciq_u32): Likewise.
9264 (__arm_vadciq_m_s32): Likewise.
9265 (__arm_vadciq_m_u32): Likewise.
9266 (__arm_vadcq_s32): Likewise.
9267 (__arm_vadcq_u32): Likewise.
9268 (__arm_vadcq_m_s32): Likewise.
9269 (__arm_vadcq_m_u32): Likewise.
9270 (__arm_vsbciq_s32): Likewise.
9271 (__arm_vsbciq_u32): Likewise.
9272 (__arm_vsbciq_m_s32): Likewise.
9273 (__arm_vsbciq_m_u32): Likewise.
9274 (__arm_vsbcq_s32): Likewise.
9275 (__arm_vsbcq_u32): Likewise.
9276 (__arm_vsbcq_m_s32): Likewise.
9277 (__arm_vsbcq_m_u32): Likewise.
9278 (vadciq_m): Define polymorphic variant.
9280 (vadcq_m): Likewise.
9282 (vsbciq_m): Likewise.
9284 (vsbcq_m): Likewise.
9286 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
9288 (BINOP_UNONE_UNONE_UNONE): Likewise.
9289 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
9290 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
9291 * config/arm/mve.md (VADCIQ): Define iterator.
9292 (VADCIQ_M): Likewise.
9294 (VSBCQ_M): Likewise.
9296 (VSBCIQ_M): Likewise.
9298 (VADCQ_M): Likewise.
9299 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
9300 (mve_vadciq_<supf>v4si): Likewise.
9301 (mve_vadcq_m_<supf>v4si): Likewise.
9302 (mve_vadcq_<supf>v4si): Likewise.
9303 (mve_vsbciq_m_<supf>v4si): Likewise.
9304 (mve_vsbciq_<supf>v4si): Likewise.
9305 (mve_vsbcq_m_<supf>v4si): Likewise.
9306 (mve_vsbcq_<supf>v4si): Likewise.
9307 (get_fpscr_nzcvqc): Define isns.
9308 (set_fpscr_nzcvqc): Define isns.
9309 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
9310 (UNSPEC_SET_FPSCR_NZCVQC): Define.
9312 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9314 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
9315 (vddupq_x_n_u16): Likewise.
9316 (vddupq_x_n_u32): Likewise.
9317 (vddupq_x_wb_u8): Likewise.
9318 (vddupq_x_wb_u16): Likewise.
9319 (vddupq_x_wb_u32): Likewise.
9320 (vdwdupq_x_n_u8): Likewise.
9321 (vdwdupq_x_n_u16): Likewise.
9322 (vdwdupq_x_n_u32): Likewise.
9323 (vdwdupq_x_wb_u8): Likewise.
9324 (vdwdupq_x_wb_u16): Likewise.
9325 (vdwdupq_x_wb_u32): Likewise.
9326 (vidupq_x_n_u8): Likewise.
9327 (vidupq_x_n_u16): Likewise.
9328 (vidupq_x_n_u32): Likewise.
9329 (vidupq_x_wb_u8): Likewise.
9330 (vidupq_x_wb_u16): Likewise.
9331 (vidupq_x_wb_u32): Likewise.
9332 (viwdupq_x_n_u8): Likewise.
9333 (viwdupq_x_n_u16): Likewise.
9334 (viwdupq_x_n_u32): Likewise.
9335 (viwdupq_x_wb_u8): Likewise.
9336 (viwdupq_x_wb_u16): Likewise.
9337 (viwdupq_x_wb_u32): Likewise.
9338 (vdupq_x_n_s8): Likewise.
9339 (vdupq_x_n_s16): Likewise.
9340 (vdupq_x_n_s32): Likewise.
9341 (vdupq_x_n_u8): Likewise.
9342 (vdupq_x_n_u16): Likewise.
9343 (vdupq_x_n_u32): Likewise.
9344 (vminq_x_s8): Likewise.
9345 (vminq_x_s16): Likewise.
9346 (vminq_x_s32): Likewise.
9347 (vminq_x_u8): Likewise.
9348 (vminq_x_u16): Likewise.
9349 (vminq_x_u32): Likewise.
9350 (vmaxq_x_s8): Likewise.
9351 (vmaxq_x_s16): Likewise.
9352 (vmaxq_x_s32): Likewise.
9353 (vmaxq_x_u8): Likewise.
9354 (vmaxq_x_u16): Likewise.
9355 (vmaxq_x_u32): Likewise.
9356 (vabdq_x_s8): Likewise.
9357 (vabdq_x_s16): Likewise.
9358 (vabdq_x_s32): Likewise.
9359 (vabdq_x_u8): Likewise.
9360 (vabdq_x_u16): Likewise.
9361 (vabdq_x_u32): Likewise.
9362 (vabsq_x_s8): Likewise.
9363 (vabsq_x_s16): Likewise.
9364 (vabsq_x_s32): Likewise.
9365 (vaddq_x_s8): Likewise.
9366 (vaddq_x_s16): Likewise.
9367 (vaddq_x_s32): Likewise.
9368 (vaddq_x_n_s8): Likewise.
9369 (vaddq_x_n_s16): Likewise.
9370 (vaddq_x_n_s32): Likewise.
9371 (vaddq_x_u8): Likewise.
9372 (vaddq_x_u16): Likewise.
9373 (vaddq_x_u32): Likewise.
9374 (vaddq_x_n_u8): Likewise.
9375 (vaddq_x_n_u16): Likewise.
9376 (vaddq_x_n_u32): Likewise.
9377 (vclsq_x_s8): Likewise.
9378 (vclsq_x_s16): Likewise.
9379 (vclsq_x_s32): Likewise.
9380 (vclzq_x_s8): Likewise.
9381 (vclzq_x_s16): Likewise.
9382 (vclzq_x_s32): Likewise.
9383 (vclzq_x_u8): Likewise.
9384 (vclzq_x_u16): Likewise.
9385 (vclzq_x_u32): Likewise.
9386 (vnegq_x_s8): Likewise.
9387 (vnegq_x_s16): Likewise.
9388 (vnegq_x_s32): Likewise.
9389 (vmulhq_x_s8): Likewise.
9390 (vmulhq_x_s16): Likewise.
9391 (vmulhq_x_s32): Likewise.
9392 (vmulhq_x_u8): Likewise.
9393 (vmulhq_x_u16): Likewise.
9394 (vmulhq_x_u32): Likewise.
9395 (vmullbq_poly_x_p8): Likewise.
9396 (vmullbq_poly_x_p16): Likewise.
9397 (vmullbq_int_x_s8): Likewise.
9398 (vmullbq_int_x_s16): Likewise.
9399 (vmullbq_int_x_s32): Likewise.
9400 (vmullbq_int_x_u8): Likewise.
9401 (vmullbq_int_x_u16): Likewise.
9402 (vmullbq_int_x_u32): Likewise.
9403 (vmulltq_poly_x_p8): Likewise.
9404 (vmulltq_poly_x_p16): Likewise.
9405 (vmulltq_int_x_s8): Likewise.
9406 (vmulltq_int_x_s16): Likewise.
9407 (vmulltq_int_x_s32): Likewise.
9408 (vmulltq_int_x_u8): Likewise.
9409 (vmulltq_int_x_u16): Likewise.
9410 (vmulltq_int_x_u32): Likewise.
9411 (vmulq_x_s8): Likewise.
9412 (vmulq_x_s16): Likewise.
9413 (vmulq_x_s32): Likewise.
9414 (vmulq_x_n_s8): Likewise.
9415 (vmulq_x_n_s16): Likewise.
9416 (vmulq_x_n_s32): Likewise.
9417 (vmulq_x_u8): Likewise.
9418 (vmulq_x_u16): Likewise.
9419 (vmulq_x_u32): Likewise.
9420 (vmulq_x_n_u8): Likewise.
9421 (vmulq_x_n_u16): Likewise.
9422 (vmulq_x_n_u32): Likewise.
9423 (vsubq_x_s8): Likewise.
9424 (vsubq_x_s16): Likewise.
9425 (vsubq_x_s32): Likewise.
9426 (vsubq_x_n_s8): Likewise.
9427 (vsubq_x_n_s16): Likewise.
9428 (vsubq_x_n_s32): Likewise.
9429 (vsubq_x_u8): Likewise.
9430 (vsubq_x_u16): Likewise.
9431 (vsubq_x_u32): Likewise.
9432 (vsubq_x_n_u8): Likewise.
9433 (vsubq_x_n_u16): Likewise.
9434 (vsubq_x_n_u32): Likewise.
9435 (vcaddq_rot90_x_s8): Likewise.
9436 (vcaddq_rot90_x_s16): Likewise.
9437 (vcaddq_rot90_x_s32): Likewise.
9438 (vcaddq_rot90_x_u8): Likewise.
9439 (vcaddq_rot90_x_u16): Likewise.
9440 (vcaddq_rot90_x_u32): Likewise.
9441 (vcaddq_rot270_x_s8): Likewise.
9442 (vcaddq_rot270_x_s16): Likewise.
9443 (vcaddq_rot270_x_s32): Likewise.
9444 (vcaddq_rot270_x_u8): Likewise.
9445 (vcaddq_rot270_x_u16): Likewise.
9446 (vcaddq_rot270_x_u32): Likewise.
9447 (vhaddq_x_n_s8): Likewise.
9448 (vhaddq_x_n_s16): Likewise.
9449 (vhaddq_x_n_s32): Likewise.
9450 (vhaddq_x_n_u8): Likewise.
9451 (vhaddq_x_n_u16): Likewise.
9452 (vhaddq_x_n_u32): Likewise.
9453 (vhaddq_x_s8): Likewise.
9454 (vhaddq_x_s16): Likewise.
9455 (vhaddq_x_s32): Likewise.
9456 (vhaddq_x_u8): Likewise.
9457 (vhaddq_x_u16): Likewise.
9458 (vhaddq_x_u32): Likewise.
9459 (vhcaddq_rot90_x_s8): Likewise.
9460 (vhcaddq_rot90_x_s16): Likewise.
9461 (vhcaddq_rot90_x_s32): Likewise.
9462 (vhcaddq_rot270_x_s8): Likewise.
9463 (vhcaddq_rot270_x_s16): Likewise.
9464 (vhcaddq_rot270_x_s32): Likewise.
9465 (vhsubq_x_n_s8): Likewise.
9466 (vhsubq_x_n_s16): Likewise.
9467 (vhsubq_x_n_s32): Likewise.
9468 (vhsubq_x_n_u8): Likewise.
9469 (vhsubq_x_n_u16): Likewise.
9470 (vhsubq_x_n_u32): Likewise.
9471 (vhsubq_x_s8): Likewise.
9472 (vhsubq_x_s16): Likewise.
9473 (vhsubq_x_s32): Likewise.
9474 (vhsubq_x_u8): Likewise.
9475 (vhsubq_x_u16): Likewise.
9476 (vhsubq_x_u32): Likewise.
9477 (vrhaddq_x_s8): Likewise.
9478 (vrhaddq_x_s16): Likewise.
9479 (vrhaddq_x_s32): Likewise.
9480 (vrhaddq_x_u8): Likewise.
9481 (vrhaddq_x_u16): Likewise.
9482 (vrhaddq_x_u32): Likewise.
9483 (vrmulhq_x_s8): Likewise.
9484 (vrmulhq_x_s16): Likewise.
9485 (vrmulhq_x_s32): Likewise.
9486 (vrmulhq_x_u8): Likewise.
9487 (vrmulhq_x_u16): Likewise.
9488 (vrmulhq_x_u32): Likewise.
9489 (vandq_x_s8): Likewise.
9490 (vandq_x_s16): Likewise.
9491 (vandq_x_s32): Likewise.
9492 (vandq_x_u8): Likewise.
9493 (vandq_x_u16): Likewise.
9494 (vandq_x_u32): Likewise.
9495 (vbicq_x_s8): Likewise.
9496 (vbicq_x_s16): Likewise.
9497 (vbicq_x_s32): Likewise.
9498 (vbicq_x_u8): Likewise.
9499 (vbicq_x_u16): Likewise.
9500 (vbicq_x_u32): Likewise.
9501 (vbrsrq_x_n_s8): Likewise.
9502 (vbrsrq_x_n_s16): Likewise.
9503 (vbrsrq_x_n_s32): Likewise.
9504 (vbrsrq_x_n_u8): Likewise.
9505 (vbrsrq_x_n_u16): Likewise.
9506 (vbrsrq_x_n_u32): Likewise.
9507 (veorq_x_s8): Likewise.
9508 (veorq_x_s16): Likewise.
9509 (veorq_x_s32): Likewise.
9510 (veorq_x_u8): Likewise.
9511 (veorq_x_u16): Likewise.
9512 (veorq_x_u32): Likewise.
9513 (vmovlbq_x_s8): Likewise.
9514 (vmovlbq_x_s16): Likewise.
9515 (vmovlbq_x_u8): Likewise.
9516 (vmovlbq_x_u16): Likewise.
9517 (vmovltq_x_s8): Likewise.
9518 (vmovltq_x_s16): Likewise.
9519 (vmovltq_x_u8): Likewise.
9520 (vmovltq_x_u16): Likewise.
9521 (vmvnq_x_s8): Likewise.
9522 (vmvnq_x_s16): Likewise.
9523 (vmvnq_x_s32): Likewise.
9524 (vmvnq_x_u8): Likewise.
9525 (vmvnq_x_u16): Likewise.
9526 (vmvnq_x_u32): Likewise.
9527 (vmvnq_x_n_s16): Likewise.
9528 (vmvnq_x_n_s32): Likewise.
9529 (vmvnq_x_n_u16): Likewise.
9530 (vmvnq_x_n_u32): Likewise.
9531 (vornq_x_s8): Likewise.
9532 (vornq_x_s16): Likewise.
9533 (vornq_x_s32): Likewise.
9534 (vornq_x_u8): Likewise.
9535 (vornq_x_u16): Likewise.
9536 (vornq_x_u32): Likewise.
9537 (vorrq_x_s8): Likewise.
9538 (vorrq_x_s16): Likewise.
9539 (vorrq_x_s32): Likewise.
9540 (vorrq_x_u8): Likewise.
9541 (vorrq_x_u16): Likewise.
9542 (vorrq_x_u32): Likewise.
9543 (vrev16q_x_s8): Likewise.
9544 (vrev16q_x_u8): Likewise.
9545 (vrev32q_x_s8): Likewise.
9546 (vrev32q_x_s16): Likewise.
9547 (vrev32q_x_u8): Likewise.
9548 (vrev32q_x_u16): Likewise.
9549 (vrev64q_x_s8): Likewise.
9550 (vrev64q_x_s16): Likewise.
9551 (vrev64q_x_s32): Likewise.
9552 (vrev64q_x_u8): Likewise.
9553 (vrev64q_x_u16): Likewise.
9554 (vrev64q_x_u32): Likewise.
9555 (vrshlq_x_s8): Likewise.
9556 (vrshlq_x_s16): Likewise.
9557 (vrshlq_x_s32): Likewise.
9558 (vrshlq_x_u8): Likewise.
9559 (vrshlq_x_u16): Likewise.
9560 (vrshlq_x_u32): Likewise.
9561 (vshllbq_x_n_s8): Likewise.
9562 (vshllbq_x_n_s16): Likewise.
9563 (vshllbq_x_n_u8): Likewise.
9564 (vshllbq_x_n_u16): Likewise.
9565 (vshlltq_x_n_s8): Likewise.
9566 (vshlltq_x_n_s16): Likewise.
9567 (vshlltq_x_n_u8): Likewise.
9568 (vshlltq_x_n_u16): Likewise.
9569 (vshlq_x_s8): Likewise.
9570 (vshlq_x_s16): Likewise.
9571 (vshlq_x_s32): Likewise.
9572 (vshlq_x_u8): Likewise.
9573 (vshlq_x_u16): Likewise.
9574 (vshlq_x_u32): Likewise.
9575 (vshlq_x_n_s8): Likewise.
9576 (vshlq_x_n_s16): Likewise.
9577 (vshlq_x_n_s32): Likewise.
9578 (vshlq_x_n_u8): Likewise.
9579 (vshlq_x_n_u16): Likewise.
9580 (vshlq_x_n_u32): Likewise.
9581 (vrshrq_x_n_s8): Likewise.
9582 (vrshrq_x_n_s16): Likewise.
9583 (vrshrq_x_n_s32): Likewise.
9584 (vrshrq_x_n_u8): Likewise.
9585 (vrshrq_x_n_u16): Likewise.
9586 (vrshrq_x_n_u32): Likewise.
9587 (vshrq_x_n_s8): Likewise.
9588 (vshrq_x_n_s16): Likewise.
9589 (vshrq_x_n_s32): Likewise.
9590 (vshrq_x_n_u8): Likewise.
9591 (vshrq_x_n_u16): Likewise.
9592 (vshrq_x_n_u32): Likewise.
9593 (vdupq_x_n_f16): Likewise.
9594 (vdupq_x_n_f32): Likewise.
9595 (vminnmq_x_f16): Likewise.
9596 (vminnmq_x_f32): Likewise.
9597 (vmaxnmq_x_f16): Likewise.
9598 (vmaxnmq_x_f32): Likewise.
9599 (vabdq_x_f16): Likewise.
9600 (vabdq_x_f32): Likewise.
9601 (vabsq_x_f16): Likewise.
9602 (vabsq_x_f32): Likewise.
9603 (vaddq_x_f16): Likewise.
9604 (vaddq_x_f32): Likewise.
9605 (vaddq_x_n_f16): Likewise.
9606 (vaddq_x_n_f32): Likewise.
9607 (vnegq_x_f16): Likewise.
9608 (vnegq_x_f32): Likewise.
9609 (vmulq_x_f16): Likewise.
9610 (vmulq_x_f32): Likewise.
9611 (vmulq_x_n_f16): Likewise.
9612 (vmulq_x_n_f32): Likewise.
9613 (vsubq_x_f16): Likewise.
9614 (vsubq_x_f32): Likewise.
9615 (vsubq_x_n_f16): Likewise.
9616 (vsubq_x_n_f32): Likewise.
9617 (vcaddq_rot90_x_f16): Likewise.
9618 (vcaddq_rot90_x_f32): Likewise.
9619 (vcaddq_rot270_x_f16): Likewise.
9620 (vcaddq_rot270_x_f32): Likewise.
9621 (vcmulq_x_f16): Likewise.
9622 (vcmulq_x_f32): Likewise.
9623 (vcmulq_rot90_x_f16): Likewise.
9624 (vcmulq_rot90_x_f32): Likewise.
9625 (vcmulq_rot180_x_f16): Likewise.
9626 (vcmulq_rot180_x_f32): Likewise.
9627 (vcmulq_rot270_x_f16): Likewise.
9628 (vcmulq_rot270_x_f32): Likewise.
9629 (vcvtaq_x_s16_f16): Likewise.
9630 (vcvtaq_x_s32_f32): Likewise.
9631 (vcvtaq_x_u16_f16): Likewise.
9632 (vcvtaq_x_u32_f32): Likewise.
9633 (vcvtnq_x_s16_f16): Likewise.
9634 (vcvtnq_x_s32_f32): Likewise.
9635 (vcvtnq_x_u16_f16): Likewise.
9636 (vcvtnq_x_u32_f32): Likewise.
9637 (vcvtpq_x_s16_f16): Likewise.
9638 (vcvtpq_x_s32_f32): Likewise.
9639 (vcvtpq_x_u16_f16): Likewise.
9640 (vcvtpq_x_u32_f32): Likewise.
9641 (vcvtmq_x_s16_f16): Likewise.
9642 (vcvtmq_x_s32_f32): Likewise.
9643 (vcvtmq_x_u16_f16): Likewise.
9644 (vcvtmq_x_u32_f32): Likewise.
9645 (vcvtbq_x_f32_f16): Likewise.
9646 (vcvttq_x_f32_f16): Likewise.
9647 (vcvtq_x_f16_u16): Likewise.
9648 (vcvtq_x_f16_s16): Likewise.
9649 (vcvtq_x_f32_s32): Likewise.
9650 (vcvtq_x_f32_u32): Likewise.
9651 (vcvtq_x_n_f16_s16): Likewise.
9652 (vcvtq_x_n_f16_u16): Likewise.
9653 (vcvtq_x_n_f32_s32): Likewise.
9654 (vcvtq_x_n_f32_u32): Likewise.
9655 (vcvtq_x_s16_f16): Likewise.
9656 (vcvtq_x_s32_f32): Likewise.
9657 (vcvtq_x_u16_f16): Likewise.
9658 (vcvtq_x_u32_f32): Likewise.
9659 (vcvtq_x_n_s16_f16): Likewise.
9660 (vcvtq_x_n_s32_f32): Likewise.
9661 (vcvtq_x_n_u16_f16): Likewise.
9662 (vcvtq_x_n_u32_f32): Likewise.
9663 (vrndq_x_f16): Likewise.
9664 (vrndq_x_f32): Likewise.
9665 (vrndnq_x_f16): Likewise.
9666 (vrndnq_x_f32): Likewise.
9667 (vrndmq_x_f16): Likewise.
9668 (vrndmq_x_f32): Likewise.
9669 (vrndpq_x_f16): Likewise.
9670 (vrndpq_x_f32): Likewise.
9671 (vrndaq_x_f16): Likewise.
9672 (vrndaq_x_f32): Likewise.
9673 (vrndxq_x_f16): Likewise.
9674 (vrndxq_x_f32): Likewise.
9675 (vandq_x_f16): Likewise.
9676 (vandq_x_f32): Likewise.
9677 (vbicq_x_f16): Likewise.
9678 (vbicq_x_f32): Likewise.
9679 (vbrsrq_x_n_f16): Likewise.
9680 (vbrsrq_x_n_f32): Likewise.
9681 (veorq_x_f16): Likewise.
9682 (veorq_x_f32): Likewise.
9683 (vornq_x_f16): Likewise.
9684 (vornq_x_f32): Likewise.
9685 (vorrq_x_f16): Likewise.
9686 (vorrq_x_f32): Likewise.
9687 (vrev32q_x_f16): Likewise.
9688 (vrev64q_x_f16): Likewise.
9689 (vrev64q_x_f32): Likewise.
9690 (__arm_vddupq_x_n_u8): Define intrinsic.
9691 (__arm_vddupq_x_n_u16): Likewise.
9692 (__arm_vddupq_x_n_u32): Likewise.
9693 (__arm_vddupq_x_wb_u8): Likewise.
9694 (__arm_vddupq_x_wb_u16): Likewise.
9695 (__arm_vddupq_x_wb_u32): Likewise.
9696 (__arm_vdwdupq_x_n_u8): Likewise.
9697 (__arm_vdwdupq_x_n_u16): Likewise.
9698 (__arm_vdwdupq_x_n_u32): Likewise.
9699 (__arm_vdwdupq_x_wb_u8): Likewise.
9700 (__arm_vdwdupq_x_wb_u16): Likewise.
9701 (__arm_vdwdupq_x_wb_u32): Likewise.
9702 (__arm_vidupq_x_n_u8): Likewise.
9703 (__arm_vidupq_x_n_u16): Likewise.
9704 (__arm_vidupq_x_n_u32): Likewise.
9705 (__arm_vidupq_x_wb_u8): Likewise.
9706 (__arm_vidupq_x_wb_u16): Likewise.
9707 (__arm_vidupq_x_wb_u32): Likewise.
9708 (__arm_viwdupq_x_n_u8): Likewise.
9709 (__arm_viwdupq_x_n_u16): Likewise.
9710 (__arm_viwdupq_x_n_u32): Likewise.
9711 (__arm_viwdupq_x_wb_u8): Likewise.
9712 (__arm_viwdupq_x_wb_u16): Likewise.
9713 (__arm_viwdupq_x_wb_u32): Likewise.
9714 (__arm_vdupq_x_n_s8): Likewise.
9715 (__arm_vdupq_x_n_s16): Likewise.
9716 (__arm_vdupq_x_n_s32): Likewise.
9717 (__arm_vdupq_x_n_u8): Likewise.
9718 (__arm_vdupq_x_n_u16): Likewise.
9719 (__arm_vdupq_x_n_u32): Likewise.
9720 (__arm_vminq_x_s8): Likewise.
9721 (__arm_vminq_x_s16): Likewise.
9722 (__arm_vminq_x_s32): Likewise.
9723 (__arm_vminq_x_u8): Likewise.
9724 (__arm_vminq_x_u16): Likewise.
9725 (__arm_vminq_x_u32): Likewise.
9726 (__arm_vmaxq_x_s8): Likewise.
9727 (__arm_vmaxq_x_s16): Likewise.
9728 (__arm_vmaxq_x_s32): Likewise.
9729 (__arm_vmaxq_x_u8): Likewise.
9730 (__arm_vmaxq_x_u16): Likewise.
9731 (__arm_vmaxq_x_u32): Likewise.
9732 (__arm_vabdq_x_s8): Likewise.
9733 (__arm_vabdq_x_s16): Likewise.
9734 (__arm_vabdq_x_s32): Likewise.
9735 (__arm_vabdq_x_u8): Likewise.
9736 (__arm_vabdq_x_u16): Likewise.
9737 (__arm_vabdq_x_u32): Likewise.
9738 (__arm_vabsq_x_s8): Likewise.
9739 (__arm_vabsq_x_s16): Likewise.
9740 (__arm_vabsq_x_s32): Likewise.
9741 (__arm_vaddq_x_s8): Likewise.
9742 (__arm_vaddq_x_s16): Likewise.
9743 (__arm_vaddq_x_s32): Likewise.
9744 (__arm_vaddq_x_n_s8): Likewise.
9745 (__arm_vaddq_x_n_s16): Likewise.
9746 (__arm_vaddq_x_n_s32): Likewise.
9747 (__arm_vaddq_x_u8): Likewise.
9748 (__arm_vaddq_x_u16): Likewise.
9749 (__arm_vaddq_x_u32): Likewise.
9750 (__arm_vaddq_x_n_u8): Likewise.
9751 (__arm_vaddq_x_n_u16): Likewise.
9752 (__arm_vaddq_x_n_u32): Likewise.
9753 (__arm_vclsq_x_s8): Likewise.
9754 (__arm_vclsq_x_s16): Likewise.
9755 (__arm_vclsq_x_s32): Likewise.
9756 (__arm_vclzq_x_s8): Likewise.
9757 (__arm_vclzq_x_s16): Likewise.
9758 (__arm_vclzq_x_s32): Likewise.
9759 (__arm_vclzq_x_u8): Likewise.
9760 (__arm_vclzq_x_u16): Likewise.
9761 (__arm_vclzq_x_u32): Likewise.
9762 (__arm_vnegq_x_s8): Likewise.
9763 (__arm_vnegq_x_s16): Likewise.
9764 (__arm_vnegq_x_s32): Likewise.
9765 (__arm_vmulhq_x_s8): Likewise.
9766 (__arm_vmulhq_x_s16): Likewise.
9767 (__arm_vmulhq_x_s32): Likewise.
9768 (__arm_vmulhq_x_u8): Likewise.
9769 (__arm_vmulhq_x_u16): Likewise.
9770 (__arm_vmulhq_x_u32): Likewise.
9771 (__arm_vmullbq_poly_x_p8): Likewise.
9772 (__arm_vmullbq_poly_x_p16): Likewise.
9773 (__arm_vmullbq_int_x_s8): Likewise.
9774 (__arm_vmullbq_int_x_s16): Likewise.
9775 (__arm_vmullbq_int_x_s32): Likewise.
9776 (__arm_vmullbq_int_x_u8): Likewise.
9777 (__arm_vmullbq_int_x_u16): Likewise.
9778 (__arm_vmullbq_int_x_u32): Likewise.
9779 (__arm_vmulltq_poly_x_p8): Likewise.
9780 (__arm_vmulltq_poly_x_p16): Likewise.
9781 (__arm_vmulltq_int_x_s8): Likewise.
9782 (__arm_vmulltq_int_x_s16): Likewise.
9783 (__arm_vmulltq_int_x_s32): Likewise.
9784 (__arm_vmulltq_int_x_u8): Likewise.
9785 (__arm_vmulltq_int_x_u16): Likewise.
9786 (__arm_vmulltq_int_x_u32): Likewise.
9787 (__arm_vmulq_x_s8): Likewise.
9788 (__arm_vmulq_x_s16): Likewise.
9789 (__arm_vmulq_x_s32): Likewise.
9790 (__arm_vmulq_x_n_s8): Likewise.
9791 (__arm_vmulq_x_n_s16): Likewise.
9792 (__arm_vmulq_x_n_s32): Likewise.
9793 (__arm_vmulq_x_u8): Likewise.
9794 (__arm_vmulq_x_u16): Likewise.
9795 (__arm_vmulq_x_u32): Likewise.
9796 (__arm_vmulq_x_n_u8): Likewise.
9797 (__arm_vmulq_x_n_u16): Likewise.
9798 (__arm_vmulq_x_n_u32): Likewise.
9799 (__arm_vsubq_x_s8): Likewise.
9800 (__arm_vsubq_x_s16): Likewise.
9801 (__arm_vsubq_x_s32): Likewise.
9802 (__arm_vsubq_x_n_s8): Likewise.
9803 (__arm_vsubq_x_n_s16): Likewise.
9804 (__arm_vsubq_x_n_s32): Likewise.
9805 (__arm_vsubq_x_u8): Likewise.
9806 (__arm_vsubq_x_u16): Likewise.
9807 (__arm_vsubq_x_u32): Likewise.
9808 (__arm_vsubq_x_n_u8): Likewise.
9809 (__arm_vsubq_x_n_u16): Likewise.
9810 (__arm_vsubq_x_n_u32): Likewise.
9811 (__arm_vcaddq_rot90_x_s8): Likewise.
9812 (__arm_vcaddq_rot90_x_s16): Likewise.
9813 (__arm_vcaddq_rot90_x_s32): Likewise.
9814 (__arm_vcaddq_rot90_x_u8): Likewise.
9815 (__arm_vcaddq_rot90_x_u16): Likewise.
9816 (__arm_vcaddq_rot90_x_u32): Likewise.
9817 (__arm_vcaddq_rot270_x_s8): Likewise.
9818 (__arm_vcaddq_rot270_x_s16): Likewise.
9819 (__arm_vcaddq_rot270_x_s32): Likewise.
9820 (__arm_vcaddq_rot270_x_u8): Likewise.
9821 (__arm_vcaddq_rot270_x_u16): Likewise.
9822 (__arm_vcaddq_rot270_x_u32): Likewise.
9823 (__arm_vhaddq_x_n_s8): Likewise.
9824 (__arm_vhaddq_x_n_s16): Likewise.
9825 (__arm_vhaddq_x_n_s32): Likewise.
9826 (__arm_vhaddq_x_n_u8): Likewise.
9827 (__arm_vhaddq_x_n_u16): Likewise.
9828 (__arm_vhaddq_x_n_u32): Likewise.
9829 (__arm_vhaddq_x_s8): Likewise.
9830 (__arm_vhaddq_x_s16): Likewise.
9831 (__arm_vhaddq_x_s32): Likewise.
9832 (__arm_vhaddq_x_u8): Likewise.
9833 (__arm_vhaddq_x_u16): Likewise.
9834 (__arm_vhaddq_x_u32): Likewise.
9835 (__arm_vhcaddq_rot90_x_s8): Likewise.
9836 (__arm_vhcaddq_rot90_x_s16): Likewise.
9837 (__arm_vhcaddq_rot90_x_s32): Likewise.
9838 (__arm_vhcaddq_rot270_x_s8): Likewise.
9839 (__arm_vhcaddq_rot270_x_s16): Likewise.
9840 (__arm_vhcaddq_rot270_x_s32): Likewise.
9841 (__arm_vhsubq_x_n_s8): Likewise.
9842 (__arm_vhsubq_x_n_s16): Likewise.
9843 (__arm_vhsubq_x_n_s32): Likewise.
9844 (__arm_vhsubq_x_n_u8): Likewise.
9845 (__arm_vhsubq_x_n_u16): Likewise.
9846 (__arm_vhsubq_x_n_u32): Likewise.
9847 (__arm_vhsubq_x_s8): Likewise.
9848 (__arm_vhsubq_x_s16): Likewise.
9849 (__arm_vhsubq_x_s32): Likewise.
9850 (__arm_vhsubq_x_u8): Likewise.
9851 (__arm_vhsubq_x_u16): Likewise.
9852 (__arm_vhsubq_x_u32): Likewise.
9853 (__arm_vrhaddq_x_s8): Likewise.
9854 (__arm_vrhaddq_x_s16): Likewise.
9855 (__arm_vrhaddq_x_s32): Likewise.
9856 (__arm_vrhaddq_x_u8): Likewise.
9857 (__arm_vrhaddq_x_u16): Likewise.
9858 (__arm_vrhaddq_x_u32): Likewise.
9859 (__arm_vrmulhq_x_s8): Likewise.
9860 (__arm_vrmulhq_x_s16): Likewise.
9861 (__arm_vrmulhq_x_s32): Likewise.
9862 (__arm_vrmulhq_x_u8): Likewise.
9863 (__arm_vrmulhq_x_u16): Likewise.
9864 (__arm_vrmulhq_x_u32): Likewise.
9865 (__arm_vandq_x_s8): Likewise.
9866 (__arm_vandq_x_s16): Likewise.
9867 (__arm_vandq_x_s32): Likewise.
9868 (__arm_vandq_x_u8): Likewise.
9869 (__arm_vandq_x_u16): Likewise.
9870 (__arm_vandq_x_u32): Likewise.
9871 (__arm_vbicq_x_s8): Likewise.
9872 (__arm_vbicq_x_s16): Likewise.
9873 (__arm_vbicq_x_s32): Likewise.
9874 (__arm_vbicq_x_u8): Likewise.
9875 (__arm_vbicq_x_u16): Likewise.
9876 (__arm_vbicq_x_u32): Likewise.
9877 (__arm_vbrsrq_x_n_s8): Likewise.
9878 (__arm_vbrsrq_x_n_s16): Likewise.
9879 (__arm_vbrsrq_x_n_s32): Likewise.
9880 (__arm_vbrsrq_x_n_u8): Likewise.
9881 (__arm_vbrsrq_x_n_u16): Likewise.
9882 (__arm_vbrsrq_x_n_u32): Likewise.
9883 (__arm_veorq_x_s8): Likewise.
9884 (__arm_veorq_x_s16): Likewise.
9885 (__arm_veorq_x_s32): Likewise.
9886 (__arm_veorq_x_u8): Likewise.
9887 (__arm_veorq_x_u16): Likewise.
9888 (__arm_veorq_x_u32): Likewise.
9889 (__arm_vmovlbq_x_s8): Likewise.
9890 (__arm_vmovlbq_x_s16): Likewise.
9891 (__arm_vmovlbq_x_u8): Likewise.
9892 (__arm_vmovlbq_x_u16): Likewise.
9893 (__arm_vmovltq_x_s8): Likewise.
9894 (__arm_vmovltq_x_s16): Likewise.
9895 (__arm_vmovltq_x_u8): Likewise.
9896 (__arm_vmovltq_x_u16): Likewise.
9897 (__arm_vmvnq_x_s8): Likewise.
9898 (__arm_vmvnq_x_s16): Likewise.
9899 (__arm_vmvnq_x_s32): Likewise.
9900 (__arm_vmvnq_x_u8): Likewise.
9901 (__arm_vmvnq_x_u16): Likewise.
9902 (__arm_vmvnq_x_u32): Likewise.
9903 (__arm_vmvnq_x_n_s16): Likewise.
9904 (__arm_vmvnq_x_n_s32): Likewise.
9905 (__arm_vmvnq_x_n_u16): Likewise.
9906 (__arm_vmvnq_x_n_u32): Likewise.
9907 (__arm_vornq_x_s8): Likewise.
9908 (__arm_vornq_x_s16): Likewise.
9909 (__arm_vornq_x_s32): Likewise.
9910 (__arm_vornq_x_u8): Likewise.
9911 (__arm_vornq_x_u16): Likewise.
9912 (__arm_vornq_x_u32): Likewise.
9913 (__arm_vorrq_x_s8): Likewise.
9914 (__arm_vorrq_x_s16): Likewise.
9915 (__arm_vorrq_x_s32): Likewise.
9916 (__arm_vorrq_x_u8): Likewise.
9917 (__arm_vorrq_x_u16): Likewise.
9918 (__arm_vorrq_x_u32): Likewise.
9919 (__arm_vrev16q_x_s8): Likewise.
9920 (__arm_vrev16q_x_u8): Likewise.
9921 (__arm_vrev32q_x_s8): Likewise.
9922 (__arm_vrev32q_x_s16): Likewise.
9923 (__arm_vrev32q_x_u8): Likewise.
9924 (__arm_vrev32q_x_u16): Likewise.
9925 (__arm_vrev64q_x_s8): Likewise.
9926 (__arm_vrev64q_x_s16): Likewise.
9927 (__arm_vrev64q_x_s32): Likewise.
9928 (__arm_vrev64q_x_u8): Likewise.
9929 (__arm_vrev64q_x_u16): Likewise.
9930 (__arm_vrev64q_x_u32): Likewise.
9931 (__arm_vrshlq_x_s8): Likewise.
9932 (__arm_vrshlq_x_s16): Likewise.
9933 (__arm_vrshlq_x_s32): Likewise.
9934 (__arm_vrshlq_x_u8): Likewise.
9935 (__arm_vrshlq_x_u16): Likewise.
9936 (__arm_vrshlq_x_u32): Likewise.
9937 (__arm_vshllbq_x_n_s8): Likewise.
9938 (__arm_vshllbq_x_n_s16): Likewise.
9939 (__arm_vshllbq_x_n_u8): Likewise.
9940 (__arm_vshllbq_x_n_u16): Likewise.
9941 (__arm_vshlltq_x_n_s8): Likewise.
9942 (__arm_vshlltq_x_n_s16): Likewise.
9943 (__arm_vshlltq_x_n_u8): Likewise.
9944 (__arm_vshlltq_x_n_u16): Likewise.
9945 (__arm_vshlq_x_s8): Likewise.
9946 (__arm_vshlq_x_s16): Likewise.
9947 (__arm_vshlq_x_s32): Likewise.
9948 (__arm_vshlq_x_u8): Likewise.
9949 (__arm_vshlq_x_u16): Likewise.
9950 (__arm_vshlq_x_u32): Likewise.
9951 (__arm_vshlq_x_n_s8): Likewise.
9952 (__arm_vshlq_x_n_s16): Likewise.
9953 (__arm_vshlq_x_n_s32): Likewise.
9954 (__arm_vshlq_x_n_u8): Likewise.
9955 (__arm_vshlq_x_n_u16): Likewise.
9956 (__arm_vshlq_x_n_u32): Likewise.
9957 (__arm_vrshrq_x_n_s8): Likewise.
9958 (__arm_vrshrq_x_n_s16): Likewise.
9959 (__arm_vrshrq_x_n_s32): Likewise.
9960 (__arm_vrshrq_x_n_u8): Likewise.
9961 (__arm_vrshrq_x_n_u16): Likewise.
9962 (__arm_vrshrq_x_n_u32): Likewise.
9963 (__arm_vshrq_x_n_s8): Likewise.
9964 (__arm_vshrq_x_n_s16): Likewise.
9965 (__arm_vshrq_x_n_s32): Likewise.
9966 (__arm_vshrq_x_n_u8): Likewise.
9967 (__arm_vshrq_x_n_u16): Likewise.
9968 (__arm_vshrq_x_n_u32): Likewise.
9969 (__arm_vdupq_x_n_f16): Likewise.
9970 (__arm_vdupq_x_n_f32): Likewise.
9971 (__arm_vminnmq_x_f16): Likewise.
9972 (__arm_vminnmq_x_f32): Likewise.
9973 (__arm_vmaxnmq_x_f16): Likewise.
9974 (__arm_vmaxnmq_x_f32): Likewise.
9975 (__arm_vabdq_x_f16): Likewise.
9976 (__arm_vabdq_x_f32): Likewise.
9977 (__arm_vabsq_x_f16): Likewise.
9978 (__arm_vabsq_x_f32): Likewise.
9979 (__arm_vaddq_x_f16): Likewise.
9980 (__arm_vaddq_x_f32): Likewise.
9981 (__arm_vaddq_x_n_f16): Likewise.
9982 (__arm_vaddq_x_n_f32): Likewise.
9983 (__arm_vnegq_x_f16): Likewise.
9984 (__arm_vnegq_x_f32): Likewise.
9985 (__arm_vmulq_x_f16): Likewise.
9986 (__arm_vmulq_x_f32): Likewise.
9987 (__arm_vmulq_x_n_f16): Likewise.
9988 (__arm_vmulq_x_n_f32): Likewise.
9989 (__arm_vsubq_x_f16): Likewise.
9990 (__arm_vsubq_x_f32): Likewise.
9991 (__arm_vsubq_x_n_f16): Likewise.
9992 (__arm_vsubq_x_n_f32): Likewise.
9993 (__arm_vcaddq_rot90_x_f16): Likewise.
9994 (__arm_vcaddq_rot90_x_f32): Likewise.
9995 (__arm_vcaddq_rot270_x_f16): Likewise.
9996 (__arm_vcaddq_rot270_x_f32): Likewise.
9997 (__arm_vcmulq_x_f16): Likewise.
9998 (__arm_vcmulq_x_f32): Likewise.
9999 (__arm_vcmulq_rot90_x_f16): Likewise.
10000 (__arm_vcmulq_rot90_x_f32): Likewise.
10001 (__arm_vcmulq_rot180_x_f16): Likewise.
10002 (__arm_vcmulq_rot180_x_f32): Likewise.
10003 (__arm_vcmulq_rot270_x_f16): Likewise.
10004 (__arm_vcmulq_rot270_x_f32): Likewise.
10005 (__arm_vcvtaq_x_s16_f16): Likewise.
10006 (__arm_vcvtaq_x_s32_f32): Likewise.
10007 (__arm_vcvtaq_x_u16_f16): Likewise.
10008 (__arm_vcvtaq_x_u32_f32): Likewise.
10009 (__arm_vcvtnq_x_s16_f16): Likewise.
10010 (__arm_vcvtnq_x_s32_f32): Likewise.
10011 (__arm_vcvtnq_x_u16_f16): Likewise.
10012 (__arm_vcvtnq_x_u32_f32): Likewise.
10013 (__arm_vcvtpq_x_s16_f16): Likewise.
10014 (__arm_vcvtpq_x_s32_f32): Likewise.
10015 (__arm_vcvtpq_x_u16_f16): Likewise.
10016 (__arm_vcvtpq_x_u32_f32): Likewise.
10017 (__arm_vcvtmq_x_s16_f16): Likewise.
10018 (__arm_vcvtmq_x_s32_f32): Likewise.
10019 (__arm_vcvtmq_x_u16_f16): Likewise.
10020 (__arm_vcvtmq_x_u32_f32): Likewise.
10021 (__arm_vcvtbq_x_f32_f16): Likewise.
10022 (__arm_vcvttq_x_f32_f16): Likewise.
10023 (__arm_vcvtq_x_f16_u16): Likewise.
10024 (__arm_vcvtq_x_f16_s16): Likewise.
10025 (__arm_vcvtq_x_f32_s32): Likewise.
10026 (__arm_vcvtq_x_f32_u32): Likewise.
10027 (__arm_vcvtq_x_n_f16_s16): Likewise.
10028 (__arm_vcvtq_x_n_f16_u16): Likewise.
10029 (__arm_vcvtq_x_n_f32_s32): Likewise.
10030 (__arm_vcvtq_x_n_f32_u32): Likewise.
10031 (__arm_vcvtq_x_s16_f16): Likewise.
10032 (__arm_vcvtq_x_s32_f32): Likewise.
10033 (__arm_vcvtq_x_u16_f16): Likewise.
10034 (__arm_vcvtq_x_u32_f32): Likewise.
10035 (__arm_vcvtq_x_n_s16_f16): Likewise.
10036 (__arm_vcvtq_x_n_s32_f32): Likewise.
10037 (__arm_vcvtq_x_n_u16_f16): Likewise.
10038 (__arm_vcvtq_x_n_u32_f32): Likewise.
10039 (__arm_vrndq_x_f16): Likewise.
10040 (__arm_vrndq_x_f32): Likewise.
10041 (__arm_vrndnq_x_f16): Likewise.
10042 (__arm_vrndnq_x_f32): Likewise.
10043 (__arm_vrndmq_x_f16): Likewise.
10044 (__arm_vrndmq_x_f32): Likewise.
10045 (__arm_vrndpq_x_f16): Likewise.
10046 (__arm_vrndpq_x_f32): Likewise.
10047 (__arm_vrndaq_x_f16): Likewise.
10048 (__arm_vrndaq_x_f32): Likewise.
10049 (__arm_vrndxq_x_f16): Likewise.
10050 (__arm_vrndxq_x_f32): Likewise.
10051 (__arm_vandq_x_f16): Likewise.
10052 (__arm_vandq_x_f32): Likewise.
10053 (__arm_vbicq_x_f16): Likewise.
10054 (__arm_vbicq_x_f32): Likewise.
10055 (__arm_vbrsrq_x_n_f16): Likewise.
10056 (__arm_vbrsrq_x_n_f32): Likewise.
10057 (__arm_veorq_x_f16): Likewise.
10058 (__arm_veorq_x_f32): Likewise.
10059 (__arm_vornq_x_f16): Likewise.
10060 (__arm_vornq_x_f32): Likewise.
10061 (__arm_vorrq_x_f16): Likewise.
10062 (__arm_vorrq_x_f32): Likewise.
10063 (__arm_vrev32q_x_f16): Likewise.
10064 (__arm_vrev64q_x_f16): Likewise.
10065 (__arm_vrev64q_x_f32): Likewise.
10066 (vabdq_x): Define polymorphic variant.
10067 (vabsq_x): Likewise.
10068 (vaddq_x): Likewise.
10069 (vandq_x): Likewise.
10070 (vbicq_x): Likewise.
10071 (vbrsrq_x): Likewise.
10072 (vcaddq_rot270_x): Likewise.
10073 (vcaddq_rot90_x): Likewise.
10074 (vcmulq_rot180_x): Likewise.
10075 (vcmulq_rot270_x): Likewise.
10076 (vcmulq_x): Likewise.
10077 (vcvtq_x): Likewise.
10078 (vcvtq_x_n): Likewise.
10079 (vcvtnq_m): Likewise.
10080 (veorq_x): Likewise.
10081 (vmaxnmq_x): Likewise.
10082 (vminnmq_x): Likewise.
10083 (vmulq_x): Likewise.
10084 (vnegq_x): Likewise.
10085 (vornq_x): Likewise.
10086 (vorrq_x): Likewise.
10087 (vrev32q_x): Likewise.
10088 (vrev64q_x): Likewise.
10089 (vrndaq_x): Likewise.
10090 (vrndmq_x): Likewise.
10091 (vrndnq_x): Likewise.
10092 (vrndpq_x): Likewise.
10093 (vrndq_x): Likewise.
10094 (vrndxq_x): Likewise.
10095 (vsubq_x): Likewise.
10096 (vcmulq_rot90_x): Likewise.
10097 (vadciq): Likewise.
10098 (vclsq_x): Likewise.
10099 (vclzq_x): Likewise.
10100 (vhaddq_x): Likewise.
10101 (vhcaddq_rot270_x): Likewise.
10102 (vhcaddq_rot90_x): Likewise.
10103 (vhsubq_x): Likewise.
10104 (vmaxq_x): Likewise.
10105 (vminq_x): Likewise.
10106 (vmovlbq_x): Likewise.
10107 (vmovltq_x): Likewise.
10108 (vmulhq_x): Likewise.
10109 (vmullbq_int_x): Likewise.
10110 (vmullbq_poly_x): Likewise.
10111 (vmulltq_int_x): Likewise.
10112 (vmulltq_poly_x): Likewise.
10113 (vmvnq_x): Likewise.
10114 (vrev16q_x): Likewise.
10115 (vrhaddq_x): Likewise.
10116 (vrmulhq_x): Likewise.
10117 (vrshlq_x): Likewise.
10118 (vrshrq_x): Likewise.
10119 (vshllbq_x): Likewise.
10120 (vshlltq_x): Likewise.
10121 (vshlq_x_n): Likewise.
10122 (vshlq_x): Likewise.
10123 (vdwdupq_x_u8): Likewise.
10124 (vdwdupq_x_u16): Likewise.
10125 (vdwdupq_x_u32): Likewise.
10126 (viwdupq_x_u8): Likewise.
10127 (viwdupq_x_u16): Likewise.
10128 (viwdupq_x_u32): Likewise.
10129 (vidupq_x_u8): Likewise.
10130 (vddupq_x_u8): Likewise.
10131 (vidupq_x_u16): Likewise.
10132 (vddupq_x_u16): Likewise.
10133 (vidupq_x_u32): Likewise.
10134 (vddupq_x_u32): Likewise.
10135 (vshrq_x): Likewise.
10137 2020-03-20 Richard Biener <rguenther@suse.de>
10139 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
10140 to vectorize for CTOR defs.
10142 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10143 Andre Vieira <andre.simoesdiasvieira@arm.com>
10144 Mihail Ionescu <mihail.ionescu@arm.com>
10146 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
10148 (LDRGBWBU_QUALIFIERS): Likewise.
10149 (LDRGBWBS_Z_QUALIFIERS): Likewise.
10150 (LDRGBWBU_Z_QUALIFIERS): Likewise.
10151 (STRSBWBS_QUALIFIERS): Likewise.
10152 (STRSBWBU_QUALIFIERS): Likewise.
10153 (STRSBWBS_P_QUALIFIERS): Likewise.
10154 (STRSBWBU_P_QUALIFIERS): Likewise.
10155 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
10156 (vldrdq_gather_base_wb_u64): Likewise.
10157 (vldrdq_gather_base_wb_z_s64): Likewise.
10158 (vldrdq_gather_base_wb_z_u64): Likewise.
10159 (vldrwq_gather_base_wb_f32): Likewise.
10160 (vldrwq_gather_base_wb_s32): Likewise.
10161 (vldrwq_gather_base_wb_u32): Likewise.
10162 (vldrwq_gather_base_wb_z_f32): Likewise.
10163 (vldrwq_gather_base_wb_z_s32): Likewise.
10164 (vldrwq_gather_base_wb_z_u32): Likewise.
10165 (vstrdq_scatter_base_wb_p_s64): Likewise.
10166 (vstrdq_scatter_base_wb_p_u64): Likewise.
10167 (vstrdq_scatter_base_wb_s64): Likewise.
10168 (vstrdq_scatter_base_wb_u64): Likewise.
10169 (vstrwq_scatter_base_wb_p_s32): Likewise.
10170 (vstrwq_scatter_base_wb_p_f32): Likewise.
10171 (vstrwq_scatter_base_wb_p_u32): Likewise.
10172 (vstrwq_scatter_base_wb_s32): Likewise.
10173 (vstrwq_scatter_base_wb_u32): Likewise.
10174 (vstrwq_scatter_base_wb_f32): Likewise.
10175 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
10176 (__arm_vldrdq_gather_base_wb_u64): Likewise.
10177 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
10178 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
10179 (__arm_vldrwq_gather_base_wb_s32): Likewise.
10180 (__arm_vldrwq_gather_base_wb_u32): Likewise.
10181 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
10182 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
10183 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
10184 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
10185 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
10186 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
10187 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
10188 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
10189 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
10190 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
10191 (__arm_vldrwq_gather_base_wb_f32): Likewise.
10192 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
10193 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
10194 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
10195 (vstrwq_scatter_base_wb): Define polymorphic variant.
10196 (vstrwq_scatter_base_wb_p): Likewise.
10197 (vstrdq_scatter_base_wb_p): Likewise.
10198 (vstrdq_scatter_base_wb): Likewise.
10199 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
10201 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
10203 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
10204 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
10205 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
10206 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
10207 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
10208 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
10209 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
10210 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
10211 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
10212 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
10213 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
10214 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
10215 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
10216 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
10217 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
10218 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
10219 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
10220 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
10221 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
10222 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
10223 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
10224 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
10225 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
10226 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
10227 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
10228 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
10229 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
10230 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
10231 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
10233 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10234 Andre Vieira <andre.simoesdiasvieira@arm.com>
10235 Mihail Ionescu <mihail.ionescu@arm.com>
10237 * config/arm/arm-builtins.c
10238 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
10240 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
10241 (vddupq_m_n_u32): Likewise.
10242 (vddupq_m_n_u16): Likewise.
10243 (vddupq_m_wb_u8): Likewise.
10244 (vddupq_m_wb_u16): Likewise.
10245 (vddupq_m_wb_u32): Likewise.
10246 (vddupq_n_u8): Likewise.
10247 (vddupq_n_u32): Likewise.
10248 (vddupq_n_u16): Likewise.
10249 (vddupq_wb_u8): Likewise.
10250 (vddupq_wb_u16): Likewise.
10251 (vddupq_wb_u32): Likewise.
10252 (vdwdupq_m_n_u8): Likewise.
10253 (vdwdupq_m_n_u32): Likewise.
10254 (vdwdupq_m_n_u16): Likewise.
10255 (vdwdupq_m_wb_u8): Likewise.
10256 (vdwdupq_m_wb_u32): Likewise.
10257 (vdwdupq_m_wb_u16): Likewise.
10258 (vdwdupq_n_u8): Likewise.
10259 (vdwdupq_n_u32): Likewise.
10260 (vdwdupq_n_u16): Likewise.
10261 (vdwdupq_wb_u8): Likewise.
10262 (vdwdupq_wb_u32): Likewise.
10263 (vdwdupq_wb_u16): Likewise.
10264 (vidupq_m_n_u8): Likewise.
10265 (vidupq_m_n_u32): Likewise.
10266 (vidupq_m_n_u16): Likewise.
10267 (vidupq_m_wb_u8): Likewise.
10268 (vidupq_m_wb_u16): Likewise.
10269 (vidupq_m_wb_u32): Likewise.
10270 (vidupq_n_u8): Likewise.
10271 (vidupq_n_u32): Likewise.
10272 (vidupq_n_u16): Likewise.
10273 (vidupq_wb_u8): Likewise.
10274 (vidupq_wb_u16): Likewise.
10275 (vidupq_wb_u32): Likewise.
10276 (viwdupq_m_n_u8): Likewise.
10277 (viwdupq_m_n_u32): Likewise.
10278 (viwdupq_m_n_u16): Likewise.
10279 (viwdupq_m_wb_u8): Likewise.
10280 (viwdupq_m_wb_u32): Likewise.
10281 (viwdupq_m_wb_u16): Likewise.
10282 (viwdupq_n_u8): Likewise.
10283 (viwdupq_n_u32): Likewise.
10284 (viwdupq_n_u16): Likewise.
10285 (viwdupq_wb_u8): Likewise.
10286 (viwdupq_wb_u32): Likewise.
10287 (viwdupq_wb_u16): Likewise.
10288 (__arm_vddupq_m_n_u8): Define intrinsic.
10289 (__arm_vddupq_m_n_u32): Likewise.
10290 (__arm_vddupq_m_n_u16): Likewise.
10291 (__arm_vddupq_m_wb_u8): Likewise.
10292 (__arm_vddupq_m_wb_u16): Likewise.
10293 (__arm_vddupq_m_wb_u32): Likewise.
10294 (__arm_vddupq_n_u8): Likewise.
10295 (__arm_vddupq_n_u32): Likewise.
10296 (__arm_vddupq_n_u16): Likewise.
10297 (__arm_vdwdupq_m_n_u8): Likewise.
10298 (__arm_vdwdupq_m_n_u32): Likewise.
10299 (__arm_vdwdupq_m_n_u16): Likewise.
10300 (__arm_vdwdupq_m_wb_u8): Likewise.
10301 (__arm_vdwdupq_m_wb_u32): Likewise.
10302 (__arm_vdwdupq_m_wb_u16): Likewise.
10303 (__arm_vdwdupq_n_u8): Likewise.
10304 (__arm_vdwdupq_n_u32): Likewise.
10305 (__arm_vdwdupq_n_u16): Likewise.
10306 (__arm_vdwdupq_wb_u8): Likewise.
10307 (__arm_vdwdupq_wb_u32): Likewise.
10308 (__arm_vdwdupq_wb_u16): Likewise.
10309 (__arm_vidupq_m_n_u8): Likewise.
10310 (__arm_vidupq_m_n_u32): Likewise.
10311 (__arm_vidupq_m_n_u16): Likewise.
10312 (__arm_vidupq_n_u8): Likewise.
10313 (__arm_vidupq_m_wb_u8): Likewise.
10314 (__arm_vidupq_m_wb_u16): Likewise.
10315 (__arm_vidupq_m_wb_u32): Likewise.
10316 (__arm_vidupq_n_u32): Likewise.
10317 (__arm_vidupq_n_u16): Likewise.
10318 (__arm_vidupq_wb_u8): Likewise.
10319 (__arm_vidupq_wb_u16): Likewise.
10320 (__arm_vidupq_wb_u32): Likewise.
10321 (__arm_vddupq_wb_u8): Likewise.
10322 (__arm_vddupq_wb_u16): Likewise.
10323 (__arm_vddupq_wb_u32): Likewise.
10324 (__arm_viwdupq_m_n_u8): Likewise.
10325 (__arm_viwdupq_m_n_u32): Likewise.
10326 (__arm_viwdupq_m_n_u16): Likewise.
10327 (__arm_viwdupq_m_wb_u8): Likewise.
10328 (__arm_viwdupq_m_wb_u32): Likewise.
10329 (__arm_viwdupq_m_wb_u16): Likewise.
10330 (__arm_viwdupq_n_u8): Likewise.
10331 (__arm_viwdupq_n_u32): Likewise.
10332 (__arm_viwdupq_n_u16): Likewise.
10333 (__arm_viwdupq_wb_u8): Likewise.
10334 (__arm_viwdupq_wb_u32): Likewise.
10335 (__arm_viwdupq_wb_u16): Likewise.
10336 (vidupq_m): Define polymorphic variant.
10337 (vddupq_m): Likewise.
10338 (vidupq_u16): Likewise.
10339 (vidupq_u32): Likewise.
10340 (vidupq_u8): Likewise.
10341 (vddupq_u16): Likewise.
10342 (vddupq_u32): Likewise.
10343 (vddupq_u8): Likewise.
10344 (viwdupq_m): Likewise.
10345 (viwdupq_u16): Likewise.
10346 (viwdupq_u32): Likewise.
10347 (viwdupq_u8): Likewise.
10348 (vdwdupq_m): Likewise.
10349 (vdwdupq_u16): Likewise.
10350 (vdwdupq_u32): Likewise.
10351 (vdwdupq_u8): Likewise.
10352 * config/arm/arm_mve_builtins.def
10353 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
10355 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
10356 (mve_vidupq_u<mode>_insn): Likewise.
10357 (mve_vidupq_m_n_u<mode>): Likewise.
10358 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
10359 (mve_vddupq_n_u<mode>): Likewise.
10360 (mve_vddupq_u<mode>_insn): Likewise.
10361 (mve_vddupq_m_n_u<mode>): Likewise.
10362 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
10363 (mve_vdwdupq_n_u<mode>): Likewise.
10364 (mve_vdwdupq_wb_u<mode>): Likewise.
10365 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
10366 (mve_vdwdupq_m_n_u<mode>): Likewise.
10367 (mve_vdwdupq_m_wb_u<mode>): Likewise.
10368 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
10369 (mve_viwdupq_n_u<mode>): Likewise.
10370 (mve_viwdupq_wb_u<mode>): Likewise.
10371 (mve_viwdupq_wb_u<mode>_insn): Likewise.
10372 (mve_viwdupq_m_n_u<mode>): Likewise.
10373 (mve_viwdupq_m_wb_u<mode>): Likewise.
10374 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
10376 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10378 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
10379 (vreinterpretq_s16_s64): Likewise.
10380 (vreinterpretq_s16_s8): Likewise.
10381 (vreinterpretq_s16_u16): Likewise.
10382 (vreinterpretq_s16_u32): Likewise.
10383 (vreinterpretq_s16_u64): Likewise.
10384 (vreinterpretq_s16_u8): Likewise.
10385 (vreinterpretq_s32_s16): Likewise.
10386 (vreinterpretq_s32_s64): Likewise.
10387 (vreinterpretq_s32_s8): Likewise.
10388 (vreinterpretq_s32_u16): Likewise.
10389 (vreinterpretq_s32_u32): Likewise.
10390 (vreinterpretq_s32_u64): Likewise.
10391 (vreinterpretq_s32_u8): Likewise.
10392 (vreinterpretq_s64_s16): Likewise.
10393 (vreinterpretq_s64_s32): Likewise.
10394 (vreinterpretq_s64_s8): Likewise.
10395 (vreinterpretq_s64_u16): Likewise.
10396 (vreinterpretq_s64_u32): Likewise.
10397 (vreinterpretq_s64_u64): Likewise.
10398 (vreinterpretq_s64_u8): Likewise.
10399 (vreinterpretq_s8_s16): Likewise.
10400 (vreinterpretq_s8_s32): Likewise.
10401 (vreinterpretq_s8_s64): Likewise.
10402 (vreinterpretq_s8_u16): Likewise.
10403 (vreinterpretq_s8_u32): Likewise.
10404 (vreinterpretq_s8_u64): Likewise.
10405 (vreinterpretq_s8_u8): Likewise.
10406 (vreinterpretq_u16_s16): Likewise.
10407 (vreinterpretq_u16_s32): Likewise.
10408 (vreinterpretq_u16_s64): Likewise.
10409 (vreinterpretq_u16_s8): Likewise.
10410 (vreinterpretq_u16_u32): Likewise.
10411 (vreinterpretq_u16_u64): Likewise.
10412 (vreinterpretq_u16_u8): Likewise.
10413 (vreinterpretq_u32_s16): Likewise.
10414 (vreinterpretq_u32_s32): Likewise.
10415 (vreinterpretq_u32_s64): Likewise.
10416 (vreinterpretq_u32_s8): Likewise.
10417 (vreinterpretq_u32_u16): Likewise.
10418 (vreinterpretq_u32_u64): Likewise.
10419 (vreinterpretq_u32_u8): Likewise.
10420 (vreinterpretq_u64_s16): Likewise.
10421 (vreinterpretq_u64_s32): Likewise.
10422 (vreinterpretq_u64_s64): Likewise.
10423 (vreinterpretq_u64_s8): Likewise.
10424 (vreinterpretq_u64_u16): Likewise.
10425 (vreinterpretq_u64_u32): Likewise.
10426 (vreinterpretq_u64_u8): Likewise.
10427 (vreinterpretq_u8_s16): Likewise.
10428 (vreinterpretq_u8_s32): Likewise.
10429 (vreinterpretq_u8_s64): Likewise.
10430 (vreinterpretq_u8_s8): Likewise.
10431 (vreinterpretq_u8_u16): Likewise.
10432 (vreinterpretq_u8_u32): Likewise.
10433 (vreinterpretq_u8_u64): Likewise.
10434 (vreinterpretq_s32_f16): Likewise.
10435 (vreinterpretq_s32_f32): Likewise.
10436 (vreinterpretq_u16_f16): Likewise.
10437 (vreinterpretq_u16_f32): Likewise.
10438 (vreinterpretq_u32_f16): Likewise.
10439 (vreinterpretq_u32_f32): Likewise.
10440 (vreinterpretq_u64_f16): Likewise.
10441 (vreinterpretq_u64_f32): Likewise.
10442 (vreinterpretq_u8_f16): Likewise.
10443 (vreinterpretq_u8_f32): Likewise.
10444 (vreinterpretq_f16_f32): Likewise.
10445 (vreinterpretq_f16_s16): Likewise.
10446 (vreinterpretq_f16_s32): Likewise.
10447 (vreinterpretq_f16_s64): Likewise.
10448 (vreinterpretq_f16_s8): Likewise.
10449 (vreinterpretq_f16_u16): Likewise.
10450 (vreinterpretq_f16_u32): Likewise.
10451 (vreinterpretq_f16_u64): Likewise.
10452 (vreinterpretq_f16_u8): Likewise.
10453 (vreinterpretq_f32_f16): Likewise.
10454 (vreinterpretq_f32_s16): Likewise.
10455 (vreinterpretq_f32_s32): Likewise.
10456 (vreinterpretq_f32_s64): Likewise.
10457 (vreinterpretq_f32_s8): Likewise.
10458 (vreinterpretq_f32_u16): Likewise.
10459 (vreinterpretq_f32_u32): Likewise.
10460 (vreinterpretq_f32_u64): Likewise.
10461 (vreinterpretq_f32_u8): Likewise.
10462 (vreinterpretq_s16_f16): Likewise.
10463 (vreinterpretq_s16_f32): Likewise.
10464 (vreinterpretq_s64_f16): Likewise.
10465 (vreinterpretq_s64_f32): Likewise.
10466 (vreinterpretq_s8_f16): Likewise.
10467 (vreinterpretq_s8_f32): Likewise.
10468 (vuninitializedq_u8): Likewise.
10469 (vuninitializedq_u16): Likewise.
10470 (vuninitializedq_u32): Likewise.
10471 (vuninitializedq_u64): Likewise.
10472 (vuninitializedq_s8): Likewise.
10473 (vuninitializedq_s16): Likewise.
10474 (vuninitializedq_s32): Likewise.
10475 (vuninitializedq_s64): Likewise.
10476 (vuninitializedq_f16): Likewise.
10477 (vuninitializedq_f32): Likewise.
10478 (__arm_vuninitializedq_u8): Define intrinsic.
10479 (__arm_vuninitializedq_u16): Likewise.
10480 (__arm_vuninitializedq_u32): Likewise.
10481 (__arm_vuninitializedq_u64): Likewise.
10482 (__arm_vuninitializedq_s8): Likewise.
10483 (__arm_vuninitializedq_s16): Likewise.
10484 (__arm_vuninitializedq_s32): Likewise.
10485 (__arm_vuninitializedq_s64): Likewise.
10486 (__arm_vreinterpretq_s16_s32): Likewise.
10487 (__arm_vreinterpretq_s16_s64): Likewise.
10488 (__arm_vreinterpretq_s16_s8): Likewise.
10489 (__arm_vreinterpretq_s16_u16): Likewise.
10490 (__arm_vreinterpretq_s16_u32): Likewise.
10491 (__arm_vreinterpretq_s16_u64): Likewise.
10492 (__arm_vreinterpretq_s16_u8): Likewise.
10493 (__arm_vreinterpretq_s32_s16): Likewise.
10494 (__arm_vreinterpretq_s32_s64): Likewise.
10495 (__arm_vreinterpretq_s32_s8): Likewise.
10496 (__arm_vreinterpretq_s32_u16): Likewise.
10497 (__arm_vreinterpretq_s32_u32): Likewise.
10498 (__arm_vreinterpretq_s32_u64): Likewise.
10499 (__arm_vreinterpretq_s32_u8): Likewise.
10500 (__arm_vreinterpretq_s64_s16): Likewise.
10501 (__arm_vreinterpretq_s64_s32): Likewise.
10502 (__arm_vreinterpretq_s64_s8): Likewise.
10503 (__arm_vreinterpretq_s64_u16): Likewise.
10504 (__arm_vreinterpretq_s64_u32): Likewise.
10505 (__arm_vreinterpretq_s64_u64): Likewise.
10506 (__arm_vreinterpretq_s64_u8): Likewise.
10507 (__arm_vreinterpretq_s8_s16): Likewise.
10508 (__arm_vreinterpretq_s8_s32): Likewise.
10509 (__arm_vreinterpretq_s8_s64): Likewise.
10510 (__arm_vreinterpretq_s8_u16): Likewise.
10511 (__arm_vreinterpretq_s8_u32): Likewise.
10512 (__arm_vreinterpretq_s8_u64): Likewise.
10513 (__arm_vreinterpretq_s8_u8): Likewise.
10514 (__arm_vreinterpretq_u16_s16): Likewise.
10515 (__arm_vreinterpretq_u16_s32): Likewise.
10516 (__arm_vreinterpretq_u16_s64): Likewise.
10517 (__arm_vreinterpretq_u16_s8): Likewise.
10518 (__arm_vreinterpretq_u16_u32): Likewise.
10519 (__arm_vreinterpretq_u16_u64): Likewise.
10520 (__arm_vreinterpretq_u16_u8): Likewise.
10521 (__arm_vreinterpretq_u32_s16): Likewise.
10522 (__arm_vreinterpretq_u32_s32): Likewise.
10523 (__arm_vreinterpretq_u32_s64): Likewise.
10524 (__arm_vreinterpretq_u32_s8): Likewise.
10525 (__arm_vreinterpretq_u32_u16): Likewise.
10526 (__arm_vreinterpretq_u32_u64): Likewise.
10527 (__arm_vreinterpretq_u32_u8): Likewise.
10528 (__arm_vreinterpretq_u64_s16): Likewise.
10529 (__arm_vreinterpretq_u64_s32): Likewise.
10530 (__arm_vreinterpretq_u64_s64): Likewise.
10531 (__arm_vreinterpretq_u64_s8): Likewise.
10532 (__arm_vreinterpretq_u64_u16): Likewise.
10533 (__arm_vreinterpretq_u64_u32): Likewise.
10534 (__arm_vreinterpretq_u64_u8): Likewise.
10535 (__arm_vreinterpretq_u8_s16): Likewise.
10536 (__arm_vreinterpretq_u8_s32): Likewise.
10537 (__arm_vreinterpretq_u8_s64): Likewise.
10538 (__arm_vreinterpretq_u8_s8): Likewise.
10539 (__arm_vreinterpretq_u8_u16): Likewise.
10540 (__arm_vreinterpretq_u8_u32): Likewise.
10541 (__arm_vreinterpretq_u8_u64): Likewise.
10542 (__arm_vuninitializedq_f16): Likewise.
10543 (__arm_vuninitializedq_f32): Likewise.
10544 (__arm_vreinterpretq_s32_f16): Likewise.
10545 (__arm_vreinterpretq_s32_f32): Likewise.
10546 (__arm_vreinterpretq_s16_f16): Likewise.
10547 (__arm_vreinterpretq_s16_f32): Likewise.
10548 (__arm_vreinterpretq_s64_f16): Likewise.
10549 (__arm_vreinterpretq_s64_f32): Likewise.
10550 (__arm_vreinterpretq_s8_f16): Likewise.
10551 (__arm_vreinterpretq_s8_f32): Likewise.
10552 (__arm_vreinterpretq_u16_f16): Likewise.
10553 (__arm_vreinterpretq_u16_f32): Likewise.
10554 (__arm_vreinterpretq_u32_f16): Likewise.
10555 (__arm_vreinterpretq_u32_f32): Likewise.
10556 (__arm_vreinterpretq_u64_f16): Likewise.
10557 (__arm_vreinterpretq_u64_f32): Likewise.
10558 (__arm_vreinterpretq_u8_f16): Likewise.
10559 (__arm_vreinterpretq_u8_f32): Likewise.
10560 (__arm_vreinterpretq_f16_f32): Likewise.
10561 (__arm_vreinterpretq_f16_s16): Likewise.
10562 (__arm_vreinterpretq_f16_s32): Likewise.
10563 (__arm_vreinterpretq_f16_s64): Likewise.
10564 (__arm_vreinterpretq_f16_s8): Likewise.
10565 (__arm_vreinterpretq_f16_u16): Likewise.
10566 (__arm_vreinterpretq_f16_u32): Likewise.
10567 (__arm_vreinterpretq_f16_u64): Likewise.
10568 (__arm_vreinterpretq_f16_u8): Likewise.
10569 (__arm_vreinterpretq_f32_f16): Likewise.
10570 (__arm_vreinterpretq_f32_s16): Likewise.
10571 (__arm_vreinterpretq_f32_s32): Likewise.
10572 (__arm_vreinterpretq_f32_s64): Likewise.
10573 (__arm_vreinterpretq_f32_s8): Likewise.
10574 (__arm_vreinterpretq_f32_u16): Likewise.
10575 (__arm_vreinterpretq_f32_u32): Likewise.
10576 (__arm_vreinterpretq_f32_u64): Likewise.
10577 (__arm_vreinterpretq_f32_u8): Likewise.
10578 (vuninitializedq): Define polymorphic variant.
10579 (vreinterpretq_f16): Likewise.
10580 (vreinterpretq_f32): Likewise.
10581 (vreinterpretq_s16): Likewise.
10582 (vreinterpretq_s32): Likewise.
10583 (vreinterpretq_s64): Likewise.
10584 (vreinterpretq_s8): Likewise.
10585 (vreinterpretq_u16): Likewise.
10586 (vreinterpretq_u32): Likewise.
10587 (vreinterpretq_u64): Likewise.
10588 (vreinterpretq_u8): Likewise.
10590 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10591 Andre Vieira <andre.simoesdiasvieira@arm.com>
10592 Mihail Ionescu <mihail.ionescu@arm.com>
10594 * config/arm/arm_mve.h (vaddq_s8): Define macro.
10595 (vaddq_s16): Likewise.
10596 (vaddq_s32): Likewise.
10597 (vaddq_u8): Likewise.
10598 (vaddq_u16): Likewise.
10599 (vaddq_u32): Likewise.
10600 (vaddq_f16): Likewise.
10601 (vaddq_f32): Likewise.
10602 (__arm_vaddq_s8): Define intrinsic.
10603 (__arm_vaddq_s16): Likewise.
10604 (__arm_vaddq_s32): Likewise.
10605 (__arm_vaddq_u8): Likewise.
10606 (__arm_vaddq_u16): Likewise.
10607 (__arm_vaddq_u32): Likewise.
10608 (__arm_vaddq_f16): Likewise.
10609 (__arm_vaddq_f32): Likewise.
10610 (vaddq): Define polymorphic variant.
10611 * config/arm/iterators.md (VNIM): Define mode iterator for common types
10612 Neon, IWMMXT and MVE.
10613 (VNINOTM): Likewise.
10614 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
10615 (mve_vaddq_f<mode>): Define RTL pattern.
10616 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
10617 (addv8hf3_neon): Define RTL pattern.
10618 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
10620 (addv8hf3): Define standard RTL pattern for MVE and Neon.
10621 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
10623 2020-03-20 Martin Liska <mliska@suse.cz>
10626 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
10627 build_ref_for_offset function was used and it transforms off to bytes
10630 2020-03-20 Richard Biener <rguenther@suse.de>
10632 PR tree-optimization/94266
10633 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
10634 type of the underlying object to adjust for the containing
10635 field if available.
10637 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
10639 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
10640 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
10641 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
10643 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
10645 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
10647 2020-03-20 Jakub Jelinek <jakub@redhat.com>
10649 PR tree-optimization/94224
10650 * gimple-ssa-store-merging.c
10651 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
10652 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
10655 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
10657 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
10659 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
10662 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
10663 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
10665 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
10668 * cgraphunit.c (process_function_and_variable_attributes): warn
10669 for flatten attribute on alias.
10670 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
10672 2020-03-19 Martin Liska <mliska@suse.cz>
10674 * lto-section-in.c: Add ext_symtab.
10675 * lto-streamer-out.c (write_symbol_extension_info): New.
10676 (produce_symtab_extension): New.
10677 (produce_asm_for_decls): Stream also produce_symtab_extension.
10678 * lto-streamer.h (enum lto_section_type): New section.
10680 2020-03-19 Jakub Jelinek <jakub@redhat.com>
10682 PR tree-optimization/94211
10683 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
10684 instead of estimate_num_insns for bb_seq (middle_bb). Rename
10685 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
10688 2020-03-19 Richard Biener <rguenther@suse.de>
10691 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
10692 and build_ref_for_offset.
10694 2020-03-19 Richard Biener <rguenther@suse.de>
10696 PR middle-end/94216
10697 * fold-const.c (fold_binary_loc): Avoid using
10698 build_fold_addr_expr when we really want an ADDR_EXPR.
10700 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
10702 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
10705 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
10707 PR rtl-optimization/90275
10708 * cse.c (cse_insn): Delete no-op register moves too.
10710 2020-03-18 Martin Sebor <msebor@redhat.com>
10713 * cgraphunit.c (process_function_and_variable_attributes): Also
10714 complain about weakref function definitions and drop all effects
10717 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10718 Mihail Ionescu <mihail.ionescu@arm.com>
10719 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10721 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
10722 (vstrdq_scatter_base_p_u64): Likewise.
10723 (vstrdq_scatter_base_s64): Likewise.
10724 (vstrdq_scatter_base_u64): Likewise.
10725 (vstrdq_scatter_offset_p_s64): Likewise.
10726 (vstrdq_scatter_offset_p_u64): Likewise.
10727 (vstrdq_scatter_offset_s64): Likewise.
10728 (vstrdq_scatter_offset_u64): Likewise.
10729 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
10730 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
10731 (vstrdq_scatter_shifted_offset_s64): Likewise.
10732 (vstrdq_scatter_shifted_offset_u64): Likewise.
10733 (vstrhq_scatter_offset_f16): Likewise.
10734 (vstrhq_scatter_offset_p_f16): Likewise.
10735 (vstrhq_scatter_shifted_offset_f16): Likewise.
10736 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
10737 (vstrwq_scatter_base_f32): Likewise.
10738 (vstrwq_scatter_base_p_f32): Likewise.
10739 (vstrwq_scatter_offset_f32): Likewise.
10740 (vstrwq_scatter_offset_p_f32): Likewise.
10741 (vstrwq_scatter_offset_p_s32): Likewise.
10742 (vstrwq_scatter_offset_p_u32): Likewise.
10743 (vstrwq_scatter_offset_s32): Likewise.
10744 (vstrwq_scatter_offset_u32): Likewise.
10745 (vstrwq_scatter_shifted_offset_f32): Likewise.
10746 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
10747 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
10748 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
10749 (vstrwq_scatter_shifted_offset_s32): Likewise.
10750 (vstrwq_scatter_shifted_offset_u32): Likewise.
10751 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
10752 (__arm_vstrdq_scatter_base_p_u64): Likewise.
10753 (__arm_vstrdq_scatter_base_s64): Likewise.
10754 (__arm_vstrdq_scatter_base_u64): Likewise.
10755 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
10756 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
10757 (__arm_vstrdq_scatter_offset_s64): Likewise.
10758 (__arm_vstrdq_scatter_offset_u64): Likewise.
10759 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
10760 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
10761 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
10762 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
10763 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
10764 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
10765 (__arm_vstrwq_scatter_offset_s32): Likewise.
10766 (__arm_vstrwq_scatter_offset_u32): Likewise.
10767 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
10768 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
10769 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
10770 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
10771 (__arm_vstrhq_scatter_offset_f16): Likewise.
10772 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
10773 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
10774 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
10775 (__arm_vstrwq_scatter_base_f32): Likewise.
10776 (__arm_vstrwq_scatter_base_p_f32): Likewise.
10777 (__arm_vstrwq_scatter_offset_f32): Likewise.
10778 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
10779 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
10780 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
10781 (vstrhq_scatter_offset): Define polymorphic variant.
10782 (vstrhq_scatter_offset_p): Likewise.
10783 (vstrhq_scatter_shifted_offset): Likewise.
10784 (vstrhq_scatter_shifted_offset_p): Likewise.
10785 (vstrwq_scatter_base): Likewise.
10786 (vstrwq_scatter_base_p): Likewise.
10787 (vstrwq_scatter_offset): Likewise.
10788 (vstrwq_scatter_offset_p): Likewise.
10789 (vstrwq_scatter_shifted_offset): Likewise.
10790 (vstrwq_scatter_shifted_offset_p): Likewise.
10791 (vstrdq_scatter_base_p): Likewise.
10792 (vstrdq_scatter_base): Likewise.
10793 (vstrdq_scatter_offset_p): Likewise.
10794 (vstrdq_scatter_offset): Likewise.
10795 (vstrdq_scatter_shifted_offset_p): Likewise.
10796 (vstrdq_scatter_shifted_offset): Likewise.
10797 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
10798 (STRSBS_P): Likewise.
10799 (STRSBU): Likewise.
10800 (STRSBU_P): Likewise.
10802 (STRSS_P): Likewise.
10804 (STRSU_P): Likewise.
10805 * config/arm/constraints.md (Ri): Define.
10806 * config/arm/mve.md (VSTRDSBQ): Define iterator.
10807 (VSTRDSOQ): Likewise.
10808 (VSTRDSSOQ): Likewise.
10809 (VSTRWSOQ): Likewise.
10810 (VSTRWSSOQ): Likewise.
10811 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
10812 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
10813 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
10814 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
10815 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
10816 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
10817 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
10818 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
10819 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
10820 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
10821 (mve_vstrwq_scatter_base_fv4sf): Likewise.
10822 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
10823 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
10824 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
10825 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
10826 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
10827 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
10828 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
10829 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
10830 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
10831 * config/arm/predicates.md (Ri): Define predicate to check immediate
10832 is the range +/-1016 and multiple of 8.
10834 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10835 Mihail Ionescu <mihail.ionescu@arm.com>
10836 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10838 * config/arm/arm_mve.h (vst1q_f32): Define macro.
10839 (vst1q_f16): Likewise.
10840 (vst1q_s8): Likewise.
10841 (vst1q_s32): Likewise.
10842 (vst1q_s16): Likewise.
10843 (vst1q_u8): Likewise.
10844 (vst1q_u32): Likewise.
10845 (vst1q_u16): Likewise.
10846 (vstrhq_f16): Likewise.
10847 (vstrhq_scatter_offset_s32): Likewise.
10848 (vstrhq_scatter_offset_s16): Likewise.
10849 (vstrhq_scatter_offset_u32): Likewise.
10850 (vstrhq_scatter_offset_u16): Likewise.
10851 (vstrhq_scatter_offset_p_s32): Likewise.
10852 (vstrhq_scatter_offset_p_s16): Likewise.
10853 (vstrhq_scatter_offset_p_u32): Likewise.
10854 (vstrhq_scatter_offset_p_u16): Likewise.
10855 (vstrhq_scatter_shifted_offset_s32): Likewise.
10856 (vstrhq_scatter_shifted_offset_s16): Likewise.
10857 (vstrhq_scatter_shifted_offset_u32): Likewise.
10858 (vstrhq_scatter_shifted_offset_u16): Likewise.
10859 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
10860 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
10861 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
10862 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
10863 (vstrhq_s32): Likewise.
10864 (vstrhq_s16): Likewise.
10865 (vstrhq_u32): Likewise.
10866 (vstrhq_u16): Likewise.
10867 (vstrhq_p_f16): Likewise.
10868 (vstrhq_p_s32): Likewise.
10869 (vstrhq_p_s16): Likewise.
10870 (vstrhq_p_u32): Likewise.
10871 (vstrhq_p_u16): Likewise.
10872 (vstrwq_f32): Likewise.
10873 (vstrwq_s32): Likewise.
10874 (vstrwq_u32): Likewise.
10875 (vstrwq_p_f32): Likewise.
10876 (vstrwq_p_s32): Likewise.
10877 (vstrwq_p_u32): Likewise.
10878 (__arm_vst1q_s8): Define intrinsic.
10879 (__arm_vst1q_s32): Likewise.
10880 (__arm_vst1q_s16): Likewise.
10881 (__arm_vst1q_u8): Likewise.
10882 (__arm_vst1q_u32): Likewise.
10883 (__arm_vst1q_u16): Likewise.
10884 (__arm_vstrhq_scatter_offset_s32): Likewise.
10885 (__arm_vstrhq_scatter_offset_s16): Likewise.
10886 (__arm_vstrhq_scatter_offset_u32): Likewise.
10887 (__arm_vstrhq_scatter_offset_u16): Likewise.
10888 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
10889 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
10890 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
10891 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
10892 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
10893 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
10894 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
10895 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
10896 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
10897 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
10898 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
10899 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
10900 (__arm_vstrhq_s32): Likewise.
10901 (__arm_vstrhq_s16): Likewise.
10902 (__arm_vstrhq_u32): Likewise.
10903 (__arm_vstrhq_u16): Likewise.
10904 (__arm_vstrhq_p_s32): Likewise.
10905 (__arm_vstrhq_p_s16): Likewise.
10906 (__arm_vstrhq_p_u32): Likewise.
10907 (__arm_vstrhq_p_u16): Likewise.
10908 (__arm_vstrwq_s32): Likewise.
10909 (__arm_vstrwq_u32): Likewise.
10910 (__arm_vstrwq_p_s32): Likewise.
10911 (__arm_vstrwq_p_u32): Likewise.
10912 (__arm_vstrwq_p_f32): Likewise.
10913 (__arm_vstrwq_f32): Likewise.
10914 (__arm_vst1q_f32): Likewise.
10915 (__arm_vst1q_f16): Likewise.
10916 (__arm_vstrhq_f16): Likewise.
10917 (__arm_vstrhq_p_f16): Likewise.
10918 (vst1q): Define polymorphic variant.
10919 (vstrhq): Likewise.
10920 (vstrhq_p): Likewise.
10921 (vstrhq_scatter_offset_p): Likewise.
10922 (vstrhq_scatter_offset): Likewise.
10923 (vstrhq_scatter_shifted_offset_p): Likewise.
10924 (vstrhq_scatter_shifted_offset): Likewise.
10925 (vstrwq_p): Likewise.
10926 (vstrwq): Likewise.
10927 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
10928 (STRS_P): Likewise.
10930 (STRSS_P): Likewise.
10932 (STRSU_P): Likewise.
10934 (STRU_P): Likewise.
10935 * config/arm/mve.md (VST1Q): Define iterator.
10936 (VSTRHSOQ): Likewise.
10937 (VSTRHSSOQ): Likewise.
10938 (VSTRHQ): Likewise.
10939 (VSTRWQ): Likewise.
10940 (mve_vstrhq_fv8hf): Define RTL pattern.
10941 (mve_vstrhq_p_fv8hf): Likewise.
10942 (mve_vstrhq_p_<supf><mode>): Likewise.
10943 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
10944 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
10945 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
10946 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
10947 (mve_vstrhq_<supf><mode>): Likewise.
10948 (mve_vstrwq_fv4sf): Likewise.
10949 (mve_vstrwq_p_fv4sf): Likewise.
10950 (mve_vstrwq_p_<supf>v4si): Likewise.
10951 (mve_vstrwq_<supf>v4si): Likewise.
10952 (mve_vst1q_f<mode>): Define expand.
10953 (mve_vst1q_<supf><mode>): Likewise.
10955 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10956 Mihail Ionescu <mihail.ionescu@arm.com>
10957 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10959 * config/arm/arm_mve.h (vld1q_s8): Define macro.
10960 (vld1q_s32): Likewise.
10961 (vld1q_s16): Likewise.
10962 (vld1q_u8): Likewise.
10963 (vld1q_u32): Likewise.
10964 (vld1q_u16): Likewise.
10965 (vldrhq_gather_offset_s32): Likewise.
10966 (vldrhq_gather_offset_s16): Likewise.
10967 (vldrhq_gather_offset_u32): Likewise.
10968 (vldrhq_gather_offset_u16): Likewise.
10969 (vldrhq_gather_offset_z_s32): Likewise.
10970 (vldrhq_gather_offset_z_s16): Likewise.
10971 (vldrhq_gather_offset_z_u32): Likewise.
10972 (vldrhq_gather_offset_z_u16): Likewise.
10973 (vldrhq_gather_shifted_offset_s32): Likewise.
10974 (vldrhq_gather_shifted_offset_s16): Likewise.
10975 (vldrhq_gather_shifted_offset_u32): Likewise.
10976 (vldrhq_gather_shifted_offset_u16): Likewise.
10977 (vldrhq_gather_shifted_offset_z_s32): Likewise.
10978 (vldrhq_gather_shifted_offset_z_s16): Likewise.
10979 (vldrhq_gather_shifted_offset_z_u32): Likewise.
10980 (vldrhq_gather_shifted_offset_z_u16): Likewise.
10981 (vldrhq_s32): Likewise.
10982 (vldrhq_s16): Likewise.
10983 (vldrhq_u32): Likewise.
10984 (vldrhq_u16): Likewise.
10985 (vldrhq_z_s32): Likewise.
10986 (vldrhq_z_s16): Likewise.
10987 (vldrhq_z_u32): Likewise.
10988 (vldrhq_z_u16): Likewise.
10989 (vldrwq_s32): Likewise.
10990 (vldrwq_u32): Likewise.
10991 (vldrwq_z_s32): Likewise.
10992 (vldrwq_z_u32): Likewise.
10993 (vld1q_f32): Likewise.
10994 (vld1q_f16): Likewise.
10995 (vldrhq_f16): Likewise.
10996 (vldrhq_z_f16): Likewise.
10997 (vldrwq_f32): Likewise.
10998 (vldrwq_z_f32): Likewise.
10999 (__arm_vld1q_s8): Define intrinsic.
11000 (__arm_vld1q_s32): Likewise.
11001 (__arm_vld1q_s16): Likewise.
11002 (__arm_vld1q_u8): Likewise.
11003 (__arm_vld1q_u32): Likewise.
11004 (__arm_vld1q_u16): Likewise.
11005 (__arm_vldrhq_gather_offset_s32): Likewise.
11006 (__arm_vldrhq_gather_offset_s16): Likewise.
11007 (__arm_vldrhq_gather_offset_u32): Likewise.
11008 (__arm_vldrhq_gather_offset_u16): Likewise.
11009 (__arm_vldrhq_gather_offset_z_s32): Likewise.
11010 (__arm_vldrhq_gather_offset_z_s16): Likewise.
11011 (__arm_vldrhq_gather_offset_z_u32): Likewise.
11012 (__arm_vldrhq_gather_offset_z_u16): Likewise.
11013 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
11014 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
11015 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
11016 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
11017 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
11018 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
11019 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
11020 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
11021 (__arm_vldrhq_s32): Likewise.
11022 (__arm_vldrhq_s16): Likewise.
11023 (__arm_vldrhq_u32): Likewise.
11024 (__arm_vldrhq_u16): Likewise.
11025 (__arm_vldrhq_z_s32): Likewise.
11026 (__arm_vldrhq_z_s16): Likewise.
11027 (__arm_vldrhq_z_u32): Likewise.
11028 (__arm_vldrhq_z_u16): Likewise.
11029 (__arm_vldrwq_s32): Likewise.
11030 (__arm_vldrwq_u32): Likewise.
11031 (__arm_vldrwq_z_s32): Likewise.
11032 (__arm_vldrwq_z_u32): Likewise.
11033 (__arm_vld1q_f32): Likewise.
11034 (__arm_vld1q_f16): Likewise.
11035 (__arm_vldrwq_f32): Likewise.
11036 (__arm_vldrwq_z_f32): Likewise.
11037 (__arm_vldrhq_z_f16): Likewise.
11038 (__arm_vldrhq_f16): Likewise.
11039 (vld1q): Define polymorphic variant.
11040 (vldrhq_gather_offset): Likewise.
11041 (vldrhq_gather_offset_z): Likewise.
11042 (vldrhq_gather_shifted_offset): Likewise.
11043 (vldrhq_gather_shifted_offset_z): Likewise.
11044 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
11046 (LDRU_Z): Likewise.
11047 (LDRS_Z): Likewise.
11048 (LDRGU_Z): Likewise.
11050 (LDRGS_Z): Likewise.
11052 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
11053 (V_sz_elem1): Likewise.
11054 (VLD1Q): Define iterator.
11055 (VLDRHGOQ): Likewise.
11056 (VLDRHGSOQ): Likewise.
11057 (VLDRHQ): Likewise.
11058 (VLDRWQ): Likewise.
11059 (mve_vldrhq_fv8hf): Define RTL pattern.
11060 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
11061 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
11062 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
11063 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
11064 (mve_vldrhq_<supf><mode>): Likewise.
11065 (mve_vldrhq_z_fv8hf): Likewise.
11066 (mve_vldrhq_z_<supf><mode>): Likewise.
11067 (mve_vldrwq_fv4sf): Likewise.
11068 (mve_vldrwq_<supf>v4si): Likewise.
11069 (mve_vldrwq_z_fv4sf): Likewise.
11070 (mve_vldrwq_z_<supf>v4si): Likewise.
11071 (mve_vld1q_f<mode>): Define RTL expand pattern.
11072 (mve_vld1q_<supf><mode>): Likewise.
11074 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11075 Mihail Ionescu <mihail.ionescu@arm.com>
11076 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11078 * config/arm/arm_mve.h (vld1q_s8): Define macro.
11079 (vld1q_s32): Likewise.
11080 (vld1q_s16): Likewise.
11081 (vld1q_u8): Likewise.
11082 (vld1q_u32): Likewise.
11083 (vld1q_u16): Likewise.
11084 (vldrhq_gather_offset_s32): Likewise.
11085 (vldrhq_gather_offset_s16): Likewise.
11086 (vldrhq_gather_offset_u32): Likewise.
11087 (vldrhq_gather_offset_u16): Likewise.
11088 (vldrhq_gather_offset_z_s32): Likewise.
11089 (vldrhq_gather_offset_z_s16): Likewise.
11090 (vldrhq_gather_offset_z_u32): Likewise.
11091 (vldrhq_gather_offset_z_u16): Likewise.
11092 (vldrhq_gather_shifted_offset_s32): Likewise.
11093 (vldrhq_gather_shifted_offset_s16): Likewise.
11094 (vldrhq_gather_shifted_offset_u32): Likewise.
11095 (vldrhq_gather_shifted_offset_u16): Likewise.
11096 (vldrhq_gather_shifted_offset_z_s32): Likewise.
11097 (vldrhq_gather_shifted_offset_z_s16): Likewise.
11098 (vldrhq_gather_shifted_offset_z_u32): Likewise.
11099 (vldrhq_gather_shifted_offset_z_u16): Likewise.
11100 (vldrhq_s32): Likewise.
11101 (vldrhq_s16): Likewise.
11102 (vldrhq_u32): Likewise.
11103 (vldrhq_u16): Likewise.
11104 (vldrhq_z_s32): Likewise.
11105 (vldrhq_z_s16): Likewise.
11106 (vldrhq_z_u32): Likewise.
11107 (vldrhq_z_u16): Likewise.
11108 (vldrwq_s32): Likewise.
11109 (vldrwq_u32): Likewise.
11110 (vldrwq_z_s32): Likewise.
11111 (vldrwq_z_u32): Likewise.
11112 (vld1q_f32): Likewise.
11113 (vld1q_f16): Likewise.
11114 (vldrhq_f16): Likewise.
11115 (vldrhq_z_f16): Likewise.
11116 (vldrwq_f32): Likewise.
11117 (vldrwq_z_f32): Likewise.
11118 (__arm_vld1q_s8): Define intrinsic.
11119 (__arm_vld1q_s32): Likewise.
11120 (__arm_vld1q_s16): Likewise.
11121 (__arm_vld1q_u8): Likewise.
11122 (__arm_vld1q_u32): Likewise.
11123 (__arm_vld1q_u16): Likewise.
11124 (__arm_vldrhq_gather_offset_s32): Likewise.
11125 (__arm_vldrhq_gather_offset_s16): Likewise.
11126 (__arm_vldrhq_gather_offset_u32): Likewise.
11127 (__arm_vldrhq_gather_offset_u16): Likewise.
11128 (__arm_vldrhq_gather_offset_z_s32): Likewise.
11129 (__arm_vldrhq_gather_offset_z_s16): Likewise.
11130 (__arm_vldrhq_gather_offset_z_u32): Likewise.
11131 (__arm_vldrhq_gather_offset_z_u16): Likewise.
11132 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
11133 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
11134 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
11135 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
11136 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
11137 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
11138 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
11139 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
11140 (__arm_vldrhq_s32): Likewise.
11141 (__arm_vldrhq_s16): Likewise.
11142 (__arm_vldrhq_u32): Likewise.
11143 (__arm_vldrhq_u16): Likewise.
11144 (__arm_vldrhq_z_s32): Likewise.
11145 (__arm_vldrhq_z_s16): Likewise.
11146 (__arm_vldrhq_z_u32): Likewise.
11147 (__arm_vldrhq_z_u16): Likewise.
11148 (__arm_vldrwq_s32): Likewise.
11149 (__arm_vldrwq_u32): Likewise.
11150 (__arm_vldrwq_z_s32): Likewise.
11151 (__arm_vldrwq_z_u32): Likewise.
11152 (__arm_vld1q_f32): Likewise.
11153 (__arm_vld1q_f16): Likewise.
11154 (__arm_vldrwq_f32): Likewise.
11155 (__arm_vldrwq_z_f32): Likewise.
11156 (__arm_vldrhq_z_f16): Likewise.
11157 (__arm_vldrhq_f16): Likewise.
11158 (vld1q): Define polymorphic variant.
11159 (vldrhq_gather_offset): Likewise.
11160 (vldrhq_gather_offset_z): Likewise.
11161 (vldrhq_gather_shifted_offset): Likewise.
11162 (vldrhq_gather_shifted_offset_z): Likewise.
11163 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
11165 (LDRU_Z): Likewise.
11166 (LDRS_Z): Likewise.
11167 (LDRGU_Z): Likewise.
11169 (LDRGS_Z): Likewise.
11171 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
11172 (V_sz_elem1): Likewise.
11173 (VLD1Q): Define iterator.
11174 (VLDRHGOQ): Likewise.
11175 (VLDRHGSOQ): Likewise.
11176 (VLDRHQ): Likewise.
11177 (VLDRWQ): Likewise.
11178 (mve_vldrhq_fv8hf): Define RTL pattern.
11179 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
11180 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
11181 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
11182 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
11183 (mve_vldrhq_<supf><mode>): Likewise.
11184 (mve_vldrhq_z_fv8hf): Likewise.
11185 (mve_vldrhq_z_<supf><mode>): Likewise.
11186 (mve_vldrwq_fv4sf): Likewise.
11187 (mve_vldrwq_<supf>v4si): Likewise.
11188 (mve_vldrwq_z_fv4sf): Likewise.
11189 (mve_vldrwq_z_<supf>v4si): Likewise.
11190 (mve_vld1q_f<mode>): Define RTL expand pattern.
11191 (mve_vld1q_<supf><mode>): Likewise.
11193 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11194 Mihail Ionescu <mihail.ionescu@arm.com>
11195 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11197 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
11199 (LDRGBU_Z_QUALIFIERS): Likewise.
11200 (LDRGS_Z_QUALIFIERS): Likewise.
11201 (LDRGU_Z_QUALIFIERS): Likewise.
11202 (LDRS_Z_QUALIFIERS): Likewise.
11203 (LDRU_Z_QUALIFIERS): Likewise.
11204 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
11205 (vldrbq_gather_offset_z_u8): Likewise.
11206 (vldrbq_gather_offset_z_s32): Likewise.
11207 (vldrbq_gather_offset_z_u16): Likewise.
11208 (vldrbq_gather_offset_z_u32): Likewise.
11209 (vldrbq_gather_offset_z_s8): Likewise.
11210 (vldrbq_z_s16): Likewise.
11211 (vldrbq_z_u8): Likewise.
11212 (vldrbq_z_s8): Likewise.
11213 (vldrbq_z_s32): Likewise.
11214 (vldrbq_z_u16): Likewise.
11215 (vldrbq_z_u32): Likewise.
11216 (vldrwq_gather_base_z_u32): Likewise.
11217 (vldrwq_gather_base_z_s32): Likewise.
11218 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
11219 (__arm_vldrbq_gather_offset_z_s32): Likewise.
11220 (__arm_vldrbq_gather_offset_z_s16): Likewise.
11221 (__arm_vldrbq_gather_offset_z_u8): Likewise.
11222 (__arm_vldrbq_gather_offset_z_u32): Likewise.
11223 (__arm_vldrbq_gather_offset_z_u16): Likewise.
11224 (__arm_vldrbq_z_s8): Likewise.
11225 (__arm_vldrbq_z_s32): Likewise.
11226 (__arm_vldrbq_z_s16): Likewise.
11227 (__arm_vldrbq_z_u8): Likewise.
11228 (__arm_vldrbq_z_u32): Likewise.
11229 (__arm_vldrbq_z_u16): Likewise.
11230 (__arm_vldrwq_gather_base_z_s32): Likewise.
11231 (__arm_vldrwq_gather_base_z_u32): Likewise.
11232 (vldrbq_gather_offset_z): Define polymorphic variant.
11233 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
11235 (LDRGBU_Z_QUALIFIERS): Likewise.
11236 (LDRGS_Z_QUALIFIERS): Likewise.
11237 (LDRGU_Z_QUALIFIERS): Likewise.
11238 (LDRS_Z_QUALIFIERS): Likewise.
11239 (LDRU_Z_QUALIFIERS): Likewise.
11240 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
11242 (mve_vldrbq_z_<supf><mode>): Likewise.
11243 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
11245 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11246 Mihail Ionescu <mihail.ionescu@arm.com>
11247 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11249 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
11251 (STRU_P_QUALIFIERS): Likewise.
11252 (STRSU_P_QUALIFIERS): Likewise.
11253 (STRSS_P_QUALIFIERS): Likewise.
11254 (STRSBS_P_QUALIFIERS): Likewise.
11255 (STRSBU_P_QUALIFIERS): Likewise.
11256 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
11257 (vstrbq_p_s32): Likewise.
11258 (vstrbq_p_s16): Likewise.
11259 (vstrbq_p_u8): Likewise.
11260 (vstrbq_p_u32): Likewise.
11261 (vstrbq_p_u16): Likewise.
11262 (vstrbq_scatter_offset_p_s8): Likewise.
11263 (vstrbq_scatter_offset_p_s32): Likewise.
11264 (vstrbq_scatter_offset_p_s16): Likewise.
11265 (vstrbq_scatter_offset_p_u8): Likewise.
11266 (vstrbq_scatter_offset_p_u32): Likewise.
11267 (vstrbq_scatter_offset_p_u16): Likewise.
11268 (vstrwq_scatter_base_p_s32): Likewise.
11269 (vstrwq_scatter_base_p_u32): Likewise.
11270 (__arm_vstrbq_p_s8): Define intrinsic.
11271 (__arm_vstrbq_p_s32): Likewise.
11272 (__arm_vstrbq_p_s16): Likewise.
11273 (__arm_vstrbq_p_u8): Likewise.
11274 (__arm_vstrbq_p_u32): Likewise.
11275 (__arm_vstrbq_p_u16): Likewise.
11276 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
11277 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
11278 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
11279 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
11280 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
11281 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
11282 (__arm_vstrwq_scatter_base_p_s32): Likewise.
11283 (__arm_vstrwq_scatter_base_p_u32): Likewise.
11284 (vstrbq_p): Define polymorphic variant.
11285 (vstrbq_scatter_offset_p): Likewise.
11286 (vstrwq_scatter_base_p): Likewise.
11287 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
11289 (STRU_P_QUALIFIERS): Likewise.
11290 (STRSU_P_QUALIFIERS): Likewise.
11291 (STRSS_P_QUALIFIERS): Likewise.
11292 (STRSBS_P_QUALIFIERS): Likewise.
11293 (STRSBU_P_QUALIFIERS): Likewise.
11294 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
11296 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
11297 (mve_vstrbq_p_<supf><mode>): Likewise.
11299 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11300 Mihail Ionescu <mihail.ionescu@arm.com>
11301 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11303 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
11305 (LDRGS_QUALIFIERS): Likewise.
11306 (LDRS_QUALIFIERS): Likewise.
11307 (LDRU_QUALIFIERS): Likewise.
11308 (LDRGBS_QUALIFIERS): Likewise.
11309 (LDRGBU_QUALIFIERS): Likewise.
11310 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
11311 (vldrbq_gather_offset_s8): Likewise.
11312 (vldrbq_s8): Likewise.
11313 (vldrbq_u8): Likewise.
11314 (vldrbq_gather_offset_u16): Likewise.
11315 (vldrbq_gather_offset_s16): Likewise.
11316 (vldrbq_s16): Likewise.
11317 (vldrbq_u16): Likewise.
11318 (vldrbq_gather_offset_u32): Likewise.
11319 (vldrbq_gather_offset_s32): Likewise.
11320 (vldrbq_s32): Likewise.
11321 (vldrbq_u32): Likewise.
11322 (vldrwq_gather_base_s32): Likewise.
11323 (vldrwq_gather_base_u32): Likewise.
11324 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
11325 (__arm_vldrbq_gather_offset_s8): Likewise.
11326 (__arm_vldrbq_s8): Likewise.
11327 (__arm_vldrbq_u8): Likewise.
11328 (__arm_vldrbq_gather_offset_u16): Likewise.
11329 (__arm_vldrbq_gather_offset_s16): Likewise.
11330 (__arm_vldrbq_s16): Likewise.
11331 (__arm_vldrbq_u16): Likewise.
11332 (__arm_vldrbq_gather_offset_u32): Likewise.
11333 (__arm_vldrbq_gather_offset_s32): Likewise.
11334 (__arm_vldrbq_s32): Likewise.
11335 (__arm_vldrbq_u32): Likewise.
11336 (__arm_vldrwq_gather_base_s32): Likewise.
11337 (__arm_vldrwq_gather_base_u32): Likewise.
11338 (vldrbq_gather_offset): Define polymorphic variant.
11339 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
11341 (LDRGS_QUALIFIERS): Likewise.
11342 (LDRS_QUALIFIERS): Likewise.
11343 (LDRU_QUALIFIERS): Likewise.
11344 (LDRGBS_QUALIFIERS): Likewise.
11345 (LDRGBU_QUALIFIERS): Likewise.
11346 * config/arm/mve.md (VLDRBGOQ): Define iterator.
11347 (VLDRBQ): Likewise.
11348 (VLDRWGBQ): Likewise.
11349 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
11350 (mve_vldrbq_<supf><mode>): Likewise.
11351 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
11353 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11354 Mihail Ionescu <mihail.ionescu@arm.com>
11355 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11357 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
11358 (STRU_QUALIFIERS): Likewise.
11359 (STRSS_QUALIFIERS): Likewise.
11360 (STRSU_QUALIFIERS): Likewise.
11361 (STRSBS_QUALIFIERS): Likewise.
11362 (STRSBU_QUALIFIERS): Likewise.
11363 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
11364 (vstrbq_u8): Likewise.
11365 (vstrbq_u16): Likewise.
11366 (vstrbq_scatter_offset_s8): Likewise.
11367 (vstrbq_scatter_offset_u8): Likewise.
11368 (vstrbq_scatter_offset_u16): Likewise.
11369 (vstrbq_s16): Likewise.
11370 (vstrbq_u32): Likewise.
11371 (vstrbq_scatter_offset_s16): Likewise.
11372 (vstrbq_scatter_offset_u32): Likewise.
11373 (vstrbq_s32): Likewise.
11374 (vstrbq_scatter_offset_s32): Likewise.
11375 (vstrwq_scatter_base_s32): Likewise.
11376 (vstrwq_scatter_base_u32): Likewise.
11377 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
11378 (__arm_vstrbq_scatter_offset_s32): Likewise.
11379 (__arm_vstrbq_scatter_offset_s16): Likewise.
11380 (__arm_vstrbq_scatter_offset_u8): Likewise.
11381 (__arm_vstrbq_scatter_offset_u32): Likewise.
11382 (__arm_vstrbq_scatter_offset_u16): Likewise.
11383 (__arm_vstrbq_s8): Likewise.
11384 (__arm_vstrbq_s32): Likewise.
11385 (__arm_vstrbq_s16): Likewise.
11386 (__arm_vstrbq_u8): Likewise.
11387 (__arm_vstrbq_u32): Likewise.
11388 (__arm_vstrbq_u16): Likewise.
11389 (__arm_vstrwq_scatter_base_s32): Likewise.
11390 (__arm_vstrwq_scatter_base_u32): Likewise.
11391 (vstrbq): Define polymorphic variant.
11392 (vstrbq_scatter_offset): Likewise.
11393 (vstrwq_scatter_base): Likewise.
11394 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
11396 (STRU_QUALIFIERS): Likewise.
11397 (STRSS_QUALIFIERS): Likewise.
11398 (STRSU_QUALIFIERS): Likewise.
11399 (STRSBS_QUALIFIERS): Likewise.
11400 (STRSBU_QUALIFIERS): Likewise.
11401 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
11402 (VSTRWSBQ): Define iterators.
11403 (VSTRBSOQ): Likewise.
11404 (VSTRBQ): Likewise.
11405 (mve_vstrbq_<supf><mode>): Define RTL pattern.
11406 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
11407 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
11409 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11410 Mihail Ionescu <mihail.ionescu@arm.com>
11411 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11413 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
11414 (vabdq_m_f16): Likewise.
11415 (vaddq_m_f32): Likewise.
11416 (vaddq_m_f16): Likewise.
11417 (vaddq_m_n_f32): Likewise.
11418 (vaddq_m_n_f16): Likewise.
11419 (vandq_m_f32): Likewise.
11420 (vandq_m_f16): Likewise.
11421 (vbicq_m_f32): Likewise.
11422 (vbicq_m_f16): Likewise.
11423 (vbrsrq_m_n_f32): Likewise.
11424 (vbrsrq_m_n_f16): Likewise.
11425 (vcaddq_rot270_m_f32): Likewise.
11426 (vcaddq_rot270_m_f16): Likewise.
11427 (vcaddq_rot90_m_f32): Likewise.
11428 (vcaddq_rot90_m_f16): Likewise.
11429 (vcmlaq_m_f32): Likewise.
11430 (vcmlaq_m_f16): Likewise.
11431 (vcmlaq_rot180_m_f32): Likewise.
11432 (vcmlaq_rot180_m_f16): Likewise.
11433 (vcmlaq_rot270_m_f32): Likewise.
11434 (vcmlaq_rot270_m_f16): Likewise.
11435 (vcmlaq_rot90_m_f32): Likewise.
11436 (vcmlaq_rot90_m_f16): Likewise.
11437 (vcmulq_m_f32): Likewise.
11438 (vcmulq_m_f16): Likewise.
11439 (vcmulq_rot180_m_f32): Likewise.
11440 (vcmulq_rot180_m_f16): Likewise.
11441 (vcmulq_rot270_m_f32): Likewise.
11442 (vcmulq_rot270_m_f16): Likewise.
11443 (vcmulq_rot90_m_f32): Likewise.
11444 (vcmulq_rot90_m_f16): Likewise.
11445 (vcvtq_m_n_s32_f32): Likewise.
11446 (vcvtq_m_n_s16_f16): Likewise.
11447 (vcvtq_m_n_u32_f32): Likewise.
11448 (vcvtq_m_n_u16_f16): Likewise.
11449 (veorq_m_f32): Likewise.
11450 (veorq_m_f16): Likewise.
11451 (vfmaq_m_f32): Likewise.
11452 (vfmaq_m_f16): Likewise.
11453 (vfmaq_m_n_f32): Likewise.
11454 (vfmaq_m_n_f16): Likewise.
11455 (vfmasq_m_n_f32): Likewise.
11456 (vfmasq_m_n_f16): Likewise.
11457 (vfmsq_m_f32): Likewise.
11458 (vfmsq_m_f16): Likewise.
11459 (vmaxnmq_m_f32): Likewise.
11460 (vmaxnmq_m_f16): Likewise.
11461 (vminnmq_m_f32): Likewise.
11462 (vminnmq_m_f16): Likewise.
11463 (vmulq_m_f32): Likewise.
11464 (vmulq_m_f16): Likewise.
11465 (vmulq_m_n_f32): Likewise.
11466 (vmulq_m_n_f16): Likewise.
11467 (vornq_m_f32): Likewise.
11468 (vornq_m_f16): Likewise.
11469 (vorrq_m_f32): Likewise.
11470 (vorrq_m_f16): Likewise.
11471 (vsubq_m_f32): Likewise.
11472 (vsubq_m_f16): Likewise.
11473 (vsubq_m_n_f32): Likewise.
11474 (vsubq_m_n_f16): Likewise.
11475 (__attribute__): Likewise.
11476 (__arm_vabdq_m_f32): Likewise.
11477 (__arm_vabdq_m_f16): Likewise.
11478 (__arm_vaddq_m_f32): Likewise.
11479 (__arm_vaddq_m_f16): Likewise.
11480 (__arm_vaddq_m_n_f32): Likewise.
11481 (__arm_vaddq_m_n_f16): Likewise.
11482 (__arm_vandq_m_f32): Likewise.
11483 (__arm_vandq_m_f16): Likewise.
11484 (__arm_vbicq_m_f32): Likewise.
11485 (__arm_vbicq_m_f16): Likewise.
11486 (__arm_vbrsrq_m_n_f32): Likewise.
11487 (__arm_vbrsrq_m_n_f16): Likewise.
11488 (__arm_vcaddq_rot270_m_f32): Likewise.
11489 (__arm_vcaddq_rot270_m_f16): Likewise.
11490 (__arm_vcaddq_rot90_m_f32): Likewise.
11491 (__arm_vcaddq_rot90_m_f16): Likewise.
11492 (__arm_vcmlaq_m_f32): Likewise.
11493 (__arm_vcmlaq_m_f16): Likewise.
11494 (__arm_vcmlaq_rot180_m_f32): Likewise.
11495 (__arm_vcmlaq_rot180_m_f16): Likewise.
11496 (__arm_vcmlaq_rot270_m_f32): Likewise.
11497 (__arm_vcmlaq_rot270_m_f16): Likewise.
11498 (__arm_vcmlaq_rot90_m_f32): Likewise.
11499 (__arm_vcmlaq_rot90_m_f16): Likewise.
11500 (__arm_vcmulq_m_f32): Likewise.
11501 (__arm_vcmulq_m_f16): Likewise.
11502 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
11503 (__arm_vcmulq_rot180_m_f16): Likewise.
11504 (__arm_vcmulq_rot270_m_f32): Likewise.
11505 (__arm_vcmulq_rot270_m_f16): Likewise.
11506 (__arm_vcmulq_rot90_m_f32): Likewise.
11507 (__arm_vcmulq_rot90_m_f16): Likewise.
11508 (__arm_vcvtq_m_n_s32_f32): Likewise.
11509 (__arm_vcvtq_m_n_s16_f16): Likewise.
11510 (__arm_vcvtq_m_n_u32_f32): Likewise.
11511 (__arm_vcvtq_m_n_u16_f16): Likewise.
11512 (__arm_veorq_m_f32): Likewise.
11513 (__arm_veorq_m_f16): Likewise.
11514 (__arm_vfmaq_m_f32): Likewise.
11515 (__arm_vfmaq_m_f16): Likewise.
11516 (__arm_vfmaq_m_n_f32): Likewise.
11517 (__arm_vfmaq_m_n_f16): Likewise.
11518 (__arm_vfmasq_m_n_f32): Likewise.
11519 (__arm_vfmasq_m_n_f16): Likewise.
11520 (__arm_vfmsq_m_f32): Likewise.
11521 (__arm_vfmsq_m_f16): Likewise.
11522 (__arm_vmaxnmq_m_f32): Likewise.
11523 (__arm_vmaxnmq_m_f16): Likewise.
11524 (__arm_vminnmq_m_f32): Likewise.
11525 (__arm_vminnmq_m_f16): Likewise.
11526 (__arm_vmulq_m_f32): Likewise.
11527 (__arm_vmulq_m_f16): Likewise.
11528 (__arm_vmulq_m_n_f32): Likewise.
11529 (__arm_vmulq_m_n_f16): Likewise.
11530 (__arm_vornq_m_f32): Likewise.
11531 (__arm_vornq_m_f16): Likewise.
11532 (__arm_vorrq_m_f32): Likewise.
11533 (__arm_vorrq_m_f16): Likewise.
11534 (__arm_vsubq_m_f32): Likewise.
11535 (__arm_vsubq_m_f16): Likewise.
11536 (__arm_vsubq_m_n_f32): Likewise.
11537 (__arm_vsubq_m_n_f16): Likewise.
11538 (vabdq_m): Define polymorphic variant.
11539 (vaddq_m): Likewise.
11540 (vaddq_m_n): Likewise.
11541 (vandq_m): Likewise.
11542 (vbicq_m): Likewise.
11543 (vbrsrq_m_n): Likewise.
11544 (vcaddq_rot270_m): Likewise.
11545 (vcaddq_rot90_m): Likewise.
11546 (vcmlaq_m): Likewise.
11547 (vcmlaq_rot180_m): Likewise.
11548 (vcmlaq_rot270_m): Likewise.
11549 (vcmlaq_rot90_m): Likewise.
11550 (vcmulq_m): Likewise.
11551 (vcmulq_rot180_m): Likewise.
11552 (vcmulq_rot270_m): Likewise.
11553 (vcmulq_rot90_m): Likewise.
11554 (veorq_m): Likewise.
11555 (vfmaq_m): Likewise.
11556 (vfmaq_m_n): Likewise.
11557 (vfmasq_m_n): Likewise.
11558 (vfmsq_m): Likewise.
11559 (vmaxnmq_m): Likewise.
11560 (vminnmq_m): Likewise.
11561 (vmulq_m): Likewise.
11562 (vmulq_m_n): Likewise.
11563 (vornq_m): Likewise.
11564 (vsubq_m): Likewise.
11565 (vsubq_m_n): Likewise.
11566 (vorrq_m): Likewise.
11567 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
11569 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
11570 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
11571 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
11572 (mve_vaddq_m_f<mode>): Likewise.
11573 (mve_vaddq_m_n_f<mode>): Likewise.
11574 (mve_vandq_m_f<mode>): Likewise.
11575 (mve_vbicq_m_f<mode>): Likewise.
11576 (mve_vbrsrq_m_n_f<mode>): Likewise.
11577 (mve_vcaddq_rot270_m_f<mode>): Likewise.
11578 (mve_vcaddq_rot90_m_f<mode>): Likewise.
11579 (mve_vcmlaq_m_f<mode>): Likewise.
11580 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
11581 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
11582 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
11583 (mve_vcmulq_m_f<mode>): Likewise.
11584 (mve_vcmulq_rot180_m_f<mode>): Likewise.
11585 (mve_vcmulq_rot270_m_f<mode>): Likewise.
11586 (mve_vcmulq_rot90_m_f<mode>): Likewise.
11587 (mve_veorq_m_f<mode>): Likewise.
11588 (mve_vfmaq_m_f<mode>): Likewise.
11589 (mve_vfmaq_m_n_f<mode>): Likewise.
11590 (mve_vfmasq_m_n_f<mode>): Likewise.
11591 (mve_vfmsq_m_f<mode>): Likewise.
11592 (mve_vmaxnmq_m_f<mode>): Likewise.
11593 (mve_vminnmq_m_f<mode>): Likewise.
11594 (mve_vmulq_m_f<mode>): Likewise.
11595 (mve_vmulq_m_n_f<mode>): Likewise.
11596 (mve_vornq_m_f<mode>): Likewise.
11597 (mve_vorrq_m_f<mode>): Likewise.
11598 (mve_vsubq_m_f<mode>): Likewise.
11599 (mve_vsubq_m_n_f<mode>): Likewise.
11601 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11602 Mihail Ionescu <mihail.ionescu@arm.com>
11603 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11605 * config/arm/arm-protos.h (arm_mve_immediate_check):
11606 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
11607 mode and interger value.
11608 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
11609 (vmlaldavaq_p_s16): Likewise.
11610 (vmlaldavaq_p_u32): Likewise.
11611 (vmlaldavaq_p_u16): Likewise.
11612 (vmlaldavaxq_p_s32): Likewise.
11613 (vmlaldavaxq_p_s16): Likewise.
11614 (vmlaldavaxq_p_u32): Likewise.
11615 (vmlaldavaxq_p_u16): Likewise.
11616 (vmlsldavaq_p_s32): Likewise.
11617 (vmlsldavaq_p_s16): Likewise.
11618 (vmlsldavaxq_p_s32): Likewise.
11619 (vmlsldavaxq_p_s16): Likewise.
11620 (vmullbq_poly_m_p8): Likewise.
11621 (vmullbq_poly_m_p16): Likewise.
11622 (vmulltq_poly_m_p8): Likewise.
11623 (vmulltq_poly_m_p16): Likewise.
11624 (vqdmullbq_m_n_s32): Likewise.
11625 (vqdmullbq_m_n_s16): Likewise.
11626 (vqdmullbq_m_s32): Likewise.
11627 (vqdmullbq_m_s16): Likewise.
11628 (vqdmulltq_m_n_s32): Likewise.
11629 (vqdmulltq_m_n_s16): Likewise.
11630 (vqdmulltq_m_s32): Likewise.
11631 (vqdmulltq_m_s16): Likewise.
11632 (vqrshrnbq_m_n_s32): Likewise.
11633 (vqrshrnbq_m_n_s16): Likewise.
11634 (vqrshrnbq_m_n_u32): Likewise.
11635 (vqrshrnbq_m_n_u16): Likewise.
11636 (vqrshrntq_m_n_s32): Likewise.
11637 (vqrshrntq_m_n_s16): Likewise.
11638 (vqrshrntq_m_n_u32): Likewise.
11639 (vqrshrntq_m_n_u16): Likewise.
11640 (vqrshrunbq_m_n_s32): Likewise.
11641 (vqrshrunbq_m_n_s16): Likewise.
11642 (vqrshruntq_m_n_s32): Likewise.
11643 (vqrshruntq_m_n_s16): Likewise.
11644 (vqshrnbq_m_n_s32): Likewise.
11645 (vqshrnbq_m_n_s16): Likewise.
11646 (vqshrnbq_m_n_u32): Likewise.
11647 (vqshrnbq_m_n_u16): Likewise.
11648 (vqshrntq_m_n_s32): Likewise.
11649 (vqshrntq_m_n_s16): Likewise.
11650 (vqshrntq_m_n_u32): Likewise.
11651 (vqshrntq_m_n_u16): Likewise.
11652 (vqshrunbq_m_n_s32): Likewise.
11653 (vqshrunbq_m_n_s16): Likewise.
11654 (vqshruntq_m_n_s32): Likewise.
11655 (vqshruntq_m_n_s16): Likewise.
11656 (vrmlaldavhaq_p_s32): Likewise.
11657 (vrmlaldavhaq_p_u32): Likewise.
11658 (vrmlaldavhaxq_p_s32): Likewise.
11659 (vrmlsldavhaq_p_s32): Likewise.
11660 (vrmlsldavhaxq_p_s32): Likewise.
11661 (vrshrnbq_m_n_s32): Likewise.
11662 (vrshrnbq_m_n_s16): Likewise.
11663 (vrshrnbq_m_n_u32): Likewise.
11664 (vrshrnbq_m_n_u16): Likewise.
11665 (vrshrntq_m_n_s32): Likewise.
11666 (vrshrntq_m_n_s16): Likewise.
11667 (vrshrntq_m_n_u32): Likewise.
11668 (vrshrntq_m_n_u16): Likewise.
11669 (vshllbq_m_n_s8): Likewise.
11670 (vshllbq_m_n_s16): Likewise.
11671 (vshllbq_m_n_u8): Likewise.
11672 (vshllbq_m_n_u16): Likewise.
11673 (vshlltq_m_n_s8): Likewise.
11674 (vshlltq_m_n_s16): Likewise.
11675 (vshlltq_m_n_u8): Likewise.
11676 (vshlltq_m_n_u16): Likewise.
11677 (vshrnbq_m_n_s32): Likewise.
11678 (vshrnbq_m_n_s16): Likewise.
11679 (vshrnbq_m_n_u32): Likewise.
11680 (vshrnbq_m_n_u16): Likewise.
11681 (vshrntq_m_n_s32): Likewise.
11682 (vshrntq_m_n_s16): Likewise.
11683 (vshrntq_m_n_u32): Likewise.
11684 (vshrntq_m_n_u16): Likewise.
11685 (__arm_vmlaldavaq_p_s32): Define intrinsic.
11686 (__arm_vmlaldavaq_p_s16): Likewise.
11687 (__arm_vmlaldavaq_p_u32): Likewise.
11688 (__arm_vmlaldavaq_p_u16): Likewise.
11689 (__arm_vmlaldavaxq_p_s32): Likewise.
11690 (__arm_vmlaldavaxq_p_s16): Likewise.
11691 (__arm_vmlaldavaxq_p_u32): Likewise.
11692 (__arm_vmlaldavaxq_p_u16): Likewise.
11693 (__arm_vmlsldavaq_p_s32): Likewise.
11694 (__arm_vmlsldavaq_p_s16): Likewise.
11695 (__arm_vmlsldavaxq_p_s32): Likewise.
11696 (__arm_vmlsldavaxq_p_s16): Likewise.
11697 (__arm_vmullbq_poly_m_p8): Likewise.
11698 (__arm_vmullbq_poly_m_p16): Likewise.
11699 (__arm_vmulltq_poly_m_p8): Likewise.
11700 (__arm_vmulltq_poly_m_p16): Likewise.
11701 (__arm_vqdmullbq_m_n_s32): Likewise.
11702 (__arm_vqdmullbq_m_n_s16): Likewise.
11703 (__arm_vqdmullbq_m_s32): Likewise.
11704 (__arm_vqdmullbq_m_s16): Likewise.
11705 (__arm_vqdmulltq_m_n_s32): Likewise.
11706 (__arm_vqdmulltq_m_n_s16): Likewise.
11707 (__arm_vqdmulltq_m_s32): Likewise.
11708 (__arm_vqdmulltq_m_s16): Likewise.
11709 (__arm_vqrshrnbq_m_n_s32): Likewise.
11710 (__arm_vqrshrnbq_m_n_s16): Likewise.
11711 (__arm_vqrshrnbq_m_n_u32): Likewise.
11712 (__arm_vqrshrnbq_m_n_u16): Likewise.
11713 (__arm_vqrshrntq_m_n_s32): Likewise.
11714 (__arm_vqrshrntq_m_n_s16): Likewise.
11715 (__arm_vqrshrntq_m_n_u32): Likewise.
11716 (__arm_vqrshrntq_m_n_u16): Likewise.
11717 (__arm_vqrshrunbq_m_n_s32): Likewise.
11718 (__arm_vqrshrunbq_m_n_s16): Likewise.
11719 (__arm_vqrshruntq_m_n_s32): Likewise.
11720 (__arm_vqrshruntq_m_n_s16): Likewise.
11721 (__arm_vqshrnbq_m_n_s32): Likewise.
11722 (__arm_vqshrnbq_m_n_s16): Likewise.
11723 (__arm_vqshrnbq_m_n_u32): Likewise.
11724 (__arm_vqshrnbq_m_n_u16): Likewise.
11725 (__arm_vqshrntq_m_n_s32): Likewise.
11726 (__arm_vqshrntq_m_n_s16): Likewise.
11727 (__arm_vqshrntq_m_n_u32): Likewise.
11728 (__arm_vqshrntq_m_n_u16): Likewise.
11729 (__arm_vqshrunbq_m_n_s32): Likewise.
11730 (__arm_vqshrunbq_m_n_s16): Likewise.
11731 (__arm_vqshruntq_m_n_s32): Likewise.
11732 (__arm_vqshruntq_m_n_s16): Likewise.
11733 (__arm_vrmlaldavhaq_p_s32): Likewise.
11734 (__arm_vrmlaldavhaq_p_u32): Likewise.
11735 (__arm_vrmlaldavhaxq_p_s32): Likewise.
11736 (__arm_vrmlsldavhaq_p_s32): Likewise.
11737 (__arm_vrmlsldavhaxq_p_s32): Likewise.
11738 (__arm_vrshrnbq_m_n_s32): Likewise.
11739 (__arm_vrshrnbq_m_n_s16): Likewise.
11740 (__arm_vrshrnbq_m_n_u32): Likewise.
11741 (__arm_vrshrnbq_m_n_u16): Likewise.
11742 (__arm_vrshrntq_m_n_s32): Likewise.
11743 (__arm_vrshrntq_m_n_s16): Likewise.
11744 (__arm_vrshrntq_m_n_u32): Likewise.
11745 (__arm_vrshrntq_m_n_u16): Likewise.
11746 (__arm_vshllbq_m_n_s8): Likewise.
11747 (__arm_vshllbq_m_n_s16): Likewise.
11748 (__arm_vshllbq_m_n_u8): Likewise.
11749 (__arm_vshllbq_m_n_u16): Likewise.
11750 (__arm_vshlltq_m_n_s8): Likewise.
11751 (__arm_vshlltq_m_n_s16): Likewise.
11752 (__arm_vshlltq_m_n_u8): Likewise.
11753 (__arm_vshlltq_m_n_u16): Likewise.
11754 (__arm_vshrnbq_m_n_s32): Likewise.
11755 (__arm_vshrnbq_m_n_s16): Likewise.
11756 (__arm_vshrnbq_m_n_u32): Likewise.
11757 (__arm_vshrnbq_m_n_u16): Likewise.
11758 (__arm_vshrntq_m_n_s32): Likewise.
11759 (__arm_vshrntq_m_n_s16): Likewise.
11760 (__arm_vshrntq_m_n_u32): Likewise.
11761 (__arm_vshrntq_m_n_u16): Likewise.
11762 (vmullbq_poly_m): Define polymorphic variant.
11763 (vmulltq_poly_m): Likewise.
11764 (vshllbq_m): Likewise.
11765 (vshrntq_m_n): Likewise.
11766 (vshrnbq_m_n): Likewise.
11767 (vshlltq_m_n): Likewise.
11768 (vshllbq_m_n): Likewise.
11769 (vrshrntq_m_n): Likewise.
11770 (vrshrnbq_m_n): Likewise.
11771 (vqshruntq_m_n): Likewise.
11772 (vqshrunbq_m_n): Likewise.
11773 (vqdmullbq_m_n): Likewise.
11774 (vqdmullbq_m): Likewise.
11775 (vqdmulltq_m_n): Likewise.
11776 (vqdmulltq_m): Likewise.
11777 (vqrshrnbq_m_n): Likewise.
11778 (vqrshrntq_m_n): Likewise.
11779 (vqrshrunbq_m_n): Likewise.
11780 (vqrshruntq_m_n): Likewise.
11781 (vqshrnbq_m_n): Likewise.
11782 (vqshrntq_m_n): Likewise.
11783 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
11784 builtin qualifiers.
11785 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
11786 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
11787 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
11788 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
11789 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
11790 (VMLALDAVAXQ_P): Likewise.
11791 (VQRSHRNBQ_M_N): Likewise.
11792 (VQRSHRNTQ_M_N): Likewise.
11793 (VQSHRNBQ_M_N): Likewise.
11794 (VQSHRNTQ_M_N): Likewise.
11795 (VRSHRNBQ_M_N): Likewise.
11796 (VRSHRNTQ_M_N): Likewise.
11797 (VSHLLBQ_M_N): Likewise.
11798 (VSHLLTQ_M_N): Likewise.
11799 (VSHRNBQ_M_N): Likewise.
11800 (VSHRNTQ_M_N): Likewise.
11801 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
11802 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
11803 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
11804 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
11805 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
11806 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
11807 (mve_vrmlaldavhaq_p_sv4si): Likewise.
11808 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
11809 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
11810 (mve_vshllbq_m_n_<supf><mode>): Likewise.
11811 (mve_vshlltq_m_n_<supf><mode>): Likewise.
11812 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
11813 (mve_vshrntq_m_n_<supf><mode>): Likewise.
11814 (mve_vmlsldavaq_p_s<mode>): Likewise.
11815 (mve_vmlsldavaxq_p_s<mode>): Likewise.
11816 (mve_vmullbq_poly_m_p<mode>): Likewise.
11817 (mve_vmulltq_poly_m_p<mode>): Likewise.
11818 (mve_vqdmullbq_m_n_s<mode>): Likewise.
11819 (mve_vqdmullbq_m_s<mode>): Likewise.
11820 (mve_vqdmulltq_m_n_s<mode>): Likewise.
11821 (mve_vqdmulltq_m_s<mode>): Likewise.
11822 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
11823 (mve_vqrshruntq_m_n_s<mode>): Likewise.
11824 (mve_vqshrunbq_m_n_s<mode>): Likewise.
11825 (mve_vqshruntq_m_n_s<mode>): Likewise.
11826 (mve_vrmlaldavhaq_p_uv4si): Likewise.
11827 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
11828 (mve_vrmlsldavhaq_p_sv4si): Likewise.
11829 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
11831 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11832 Mihail Ionescu <mihail.ionescu@arm.com>
11833 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11835 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
11836 (vabdq_m_s32): Likewise.
11837 (vabdq_m_s16): Likewise.
11838 (vabdq_m_u8): Likewise.
11839 (vabdq_m_u32): Likewise.
11840 (vabdq_m_u16): Likewise.
11841 (vaddq_m_n_s8): Likewise.
11842 (vaddq_m_n_s32): Likewise.
11843 (vaddq_m_n_s16): Likewise.
11844 (vaddq_m_n_u8): Likewise.
11845 (vaddq_m_n_u32): Likewise.
11846 (vaddq_m_n_u16): Likewise.
11847 (vaddq_m_s8): Likewise.
11848 (vaddq_m_s32): Likewise.
11849 (vaddq_m_s16): Likewise.
11850 (vaddq_m_u8): Likewise.
11851 (vaddq_m_u32): Likewise.
11852 (vaddq_m_u16): Likewise.
11853 (vandq_m_s8): Likewise.
11854 (vandq_m_s32): Likewise.
11855 (vandq_m_s16): Likewise.
11856 (vandq_m_u8): Likewise.
11857 (vandq_m_u32): Likewise.
11858 (vandq_m_u16): Likewise.
11859 (vbicq_m_s8): Likewise.
11860 (vbicq_m_s32): Likewise.
11861 (vbicq_m_s16): Likewise.
11862 (vbicq_m_u8): Likewise.
11863 (vbicq_m_u32): Likewise.
11864 (vbicq_m_u16): Likewise.
11865 (vbrsrq_m_n_s8): Likewise.
11866 (vbrsrq_m_n_s32): Likewise.
11867 (vbrsrq_m_n_s16): Likewise.
11868 (vbrsrq_m_n_u8): Likewise.
11869 (vbrsrq_m_n_u32): Likewise.
11870 (vbrsrq_m_n_u16): Likewise.
11871 (vcaddq_rot270_m_s8): Likewise.
11872 (vcaddq_rot270_m_s32): Likewise.
11873 (vcaddq_rot270_m_s16): Likewise.
11874 (vcaddq_rot270_m_u8): Likewise.
11875 (vcaddq_rot270_m_u32): Likewise.
11876 (vcaddq_rot270_m_u16): Likewise.
11877 (vcaddq_rot90_m_s8): Likewise.
11878 (vcaddq_rot90_m_s32): Likewise.
11879 (vcaddq_rot90_m_s16): Likewise.
11880 (vcaddq_rot90_m_u8): Likewise.
11881 (vcaddq_rot90_m_u32): Likewise.
11882 (vcaddq_rot90_m_u16): Likewise.
11883 (veorq_m_s8): Likewise.
11884 (veorq_m_s32): Likewise.
11885 (veorq_m_s16): Likewise.
11886 (veorq_m_u8): Likewise.
11887 (veorq_m_u32): Likewise.
11888 (veorq_m_u16): Likewise.
11889 (vhaddq_m_n_s8): Likewise.
11890 (vhaddq_m_n_s32): Likewise.
11891 (vhaddq_m_n_s16): Likewise.
11892 (vhaddq_m_n_u8): Likewise.
11893 (vhaddq_m_n_u32): Likewise.
11894 (vhaddq_m_n_u16): Likewise.
11895 (vhaddq_m_s8): Likewise.
11896 (vhaddq_m_s32): Likewise.
11897 (vhaddq_m_s16): Likewise.
11898 (vhaddq_m_u8): Likewise.
11899 (vhaddq_m_u32): Likewise.
11900 (vhaddq_m_u16): Likewise.
11901 (vhcaddq_rot270_m_s8): Likewise.
11902 (vhcaddq_rot270_m_s32): Likewise.
11903 (vhcaddq_rot270_m_s16): Likewise.
11904 (vhcaddq_rot90_m_s8): Likewise.
11905 (vhcaddq_rot90_m_s32): Likewise.
11906 (vhcaddq_rot90_m_s16): Likewise.
11907 (vhsubq_m_n_s8): Likewise.
11908 (vhsubq_m_n_s32): Likewise.
11909 (vhsubq_m_n_s16): Likewise.
11910 (vhsubq_m_n_u8): Likewise.
11911 (vhsubq_m_n_u32): Likewise.
11912 (vhsubq_m_n_u16): Likewise.
11913 (vhsubq_m_s8): Likewise.
11914 (vhsubq_m_s32): Likewise.
11915 (vhsubq_m_s16): Likewise.
11916 (vhsubq_m_u8): Likewise.
11917 (vhsubq_m_u32): Likewise.
11918 (vhsubq_m_u16): Likewise.
11919 (vmaxq_m_s8): Likewise.
11920 (vmaxq_m_s32): Likewise.
11921 (vmaxq_m_s16): Likewise.
11922 (vmaxq_m_u8): Likewise.
11923 (vmaxq_m_u32): Likewise.
11924 (vmaxq_m_u16): Likewise.
11925 (vminq_m_s8): Likewise.
11926 (vminq_m_s32): Likewise.
11927 (vminq_m_s16): Likewise.
11928 (vminq_m_u8): Likewise.
11929 (vminq_m_u32): Likewise.
11930 (vminq_m_u16): Likewise.
11931 (vmladavaq_p_s8): Likewise.
11932 (vmladavaq_p_s32): Likewise.
11933 (vmladavaq_p_s16): Likewise.
11934 (vmladavaq_p_u8): Likewise.
11935 (vmladavaq_p_u32): Likewise.
11936 (vmladavaq_p_u16): Likewise.
11937 (vmladavaxq_p_s8): Likewise.
11938 (vmladavaxq_p_s32): Likewise.
11939 (vmladavaxq_p_s16): Likewise.
11940 (vmlaq_m_n_s8): Likewise.
11941 (vmlaq_m_n_s32): Likewise.
11942 (vmlaq_m_n_s16): Likewise.
11943 (vmlaq_m_n_u8): Likewise.
11944 (vmlaq_m_n_u32): Likewise.
11945 (vmlaq_m_n_u16): Likewise.
11946 (vmlasq_m_n_s8): Likewise.
11947 (vmlasq_m_n_s32): Likewise.
11948 (vmlasq_m_n_s16): Likewise.
11949 (vmlasq_m_n_u8): Likewise.
11950 (vmlasq_m_n_u32): Likewise.
11951 (vmlasq_m_n_u16): Likewise.
11952 (vmlsdavaq_p_s8): Likewise.
11953 (vmlsdavaq_p_s32): Likewise.
11954 (vmlsdavaq_p_s16): Likewise.
11955 (vmlsdavaxq_p_s8): Likewise.
11956 (vmlsdavaxq_p_s32): Likewise.
11957 (vmlsdavaxq_p_s16): Likewise.
11958 (vmulhq_m_s8): Likewise.
11959 (vmulhq_m_s32): Likewise.
11960 (vmulhq_m_s16): Likewise.
11961 (vmulhq_m_u8): Likewise.
11962 (vmulhq_m_u32): Likewise.
11963 (vmulhq_m_u16): Likewise.
11964 (vmullbq_int_m_s8): Likewise.
11965 (vmullbq_int_m_s32): Likewise.
11966 (vmullbq_int_m_s16): Likewise.
11967 (vmullbq_int_m_u8): Likewise.
11968 (vmullbq_int_m_u32): Likewise.
11969 (vmullbq_int_m_u16): Likewise.
11970 (vmulltq_int_m_s8): Likewise.
11971 (vmulltq_int_m_s32): Likewise.
11972 (vmulltq_int_m_s16): Likewise.
11973 (vmulltq_int_m_u8): Likewise.
11974 (vmulltq_int_m_u32): Likewise.
11975 (vmulltq_int_m_u16): Likewise.
11976 (vmulq_m_n_s8): Likewise.
11977 (vmulq_m_n_s32): Likewise.
11978 (vmulq_m_n_s16): Likewise.
11979 (vmulq_m_n_u8): Likewise.
11980 (vmulq_m_n_u32): Likewise.
11981 (vmulq_m_n_u16): Likewise.
11982 (vmulq_m_s8): Likewise.
11983 (vmulq_m_s32): Likewise.
11984 (vmulq_m_s16): Likewise.
11985 (vmulq_m_u8): Likewise.
11986 (vmulq_m_u32): Likewise.
11987 (vmulq_m_u16): Likewise.
11988 (vornq_m_s8): Likewise.
11989 (vornq_m_s32): Likewise.
11990 (vornq_m_s16): Likewise.
11991 (vornq_m_u8): Likewise.
11992 (vornq_m_u32): Likewise.
11993 (vornq_m_u16): Likewise.
11994 (vorrq_m_s8): Likewise.
11995 (vorrq_m_s32): Likewise.
11996 (vorrq_m_s16): Likewise.
11997 (vorrq_m_u8): Likewise.
11998 (vorrq_m_u32): Likewise.
11999 (vorrq_m_u16): Likewise.
12000 (vqaddq_m_n_s8): Likewise.
12001 (vqaddq_m_n_s32): Likewise.
12002 (vqaddq_m_n_s16): Likewise.
12003 (vqaddq_m_n_u8): Likewise.
12004 (vqaddq_m_n_u32): Likewise.
12005 (vqaddq_m_n_u16): Likewise.
12006 (vqaddq_m_s8): Likewise.
12007 (vqaddq_m_s32): Likewise.
12008 (vqaddq_m_s16): Likewise.
12009 (vqaddq_m_u8): Likewise.
12010 (vqaddq_m_u32): Likewise.
12011 (vqaddq_m_u16): Likewise.
12012 (vqdmladhq_m_s8): Likewise.
12013 (vqdmladhq_m_s32): Likewise.
12014 (vqdmladhq_m_s16): Likewise.
12015 (vqdmladhxq_m_s8): Likewise.
12016 (vqdmladhxq_m_s32): Likewise.
12017 (vqdmladhxq_m_s16): Likewise.
12018 (vqdmlahq_m_n_s8): Likewise.
12019 (vqdmlahq_m_n_s32): Likewise.
12020 (vqdmlahq_m_n_s16): Likewise.
12021 (vqdmlahq_m_n_u8): Likewise.
12022 (vqdmlahq_m_n_u32): Likewise.
12023 (vqdmlahq_m_n_u16): Likewise.
12024 (vqdmlsdhq_m_s8): Likewise.
12025 (vqdmlsdhq_m_s32): Likewise.
12026 (vqdmlsdhq_m_s16): Likewise.
12027 (vqdmlsdhxq_m_s8): Likewise.
12028 (vqdmlsdhxq_m_s32): Likewise.
12029 (vqdmlsdhxq_m_s16): Likewise.
12030 (vqdmulhq_m_n_s8): Likewise.
12031 (vqdmulhq_m_n_s32): Likewise.
12032 (vqdmulhq_m_n_s16): Likewise.
12033 (vqdmulhq_m_s8): Likewise.
12034 (vqdmulhq_m_s32): Likewise.
12035 (vqdmulhq_m_s16): Likewise.
12036 (vqrdmladhq_m_s8): Likewise.
12037 (vqrdmladhq_m_s32): Likewise.
12038 (vqrdmladhq_m_s16): Likewise.
12039 (vqrdmladhxq_m_s8): Likewise.
12040 (vqrdmladhxq_m_s32): Likewise.
12041 (vqrdmladhxq_m_s16): Likewise.
12042 (vqrdmlahq_m_n_s8): Likewise.
12043 (vqrdmlahq_m_n_s32): Likewise.
12044 (vqrdmlahq_m_n_s16): Likewise.
12045 (vqrdmlahq_m_n_u8): Likewise.
12046 (vqrdmlahq_m_n_u32): Likewise.
12047 (vqrdmlahq_m_n_u16): Likewise.
12048 (vqrdmlashq_m_n_s8): Likewise.
12049 (vqrdmlashq_m_n_s32): Likewise.
12050 (vqrdmlashq_m_n_s16): Likewise.
12051 (vqrdmlashq_m_n_u8): Likewise.
12052 (vqrdmlashq_m_n_u32): Likewise.
12053 (vqrdmlashq_m_n_u16): Likewise.
12054 (vqrdmlsdhq_m_s8): Likewise.
12055 (vqrdmlsdhq_m_s32): Likewise.
12056 (vqrdmlsdhq_m_s16): Likewise.
12057 (vqrdmlsdhxq_m_s8): Likewise.
12058 (vqrdmlsdhxq_m_s32): Likewise.
12059 (vqrdmlsdhxq_m_s16): Likewise.
12060 (vqrdmulhq_m_n_s8): Likewise.
12061 (vqrdmulhq_m_n_s32): Likewise.
12062 (vqrdmulhq_m_n_s16): Likewise.
12063 (vqrdmulhq_m_s8): Likewise.
12064 (vqrdmulhq_m_s32): Likewise.
12065 (vqrdmulhq_m_s16): Likewise.
12066 (vqrshlq_m_s8): Likewise.
12067 (vqrshlq_m_s32): Likewise.
12068 (vqrshlq_m_s16): Likewise.
12069 (vqrshlq_m_u8): Likewise.
12070 (vqrshlq_m_u32): Likewise.
12071 (vqrshlq_m_u16): Likewise.
12072 (vqshlq_m_n_s8): Likewise.
12073 (vqshlq_m_n_s32): Likewise.
12074 (vqshlq_m_n_s16): Likewise.
12075 (vqshlq_m_n_u8): Likewise.
12076 (vqshlq_m_n_u32): Likewise.
12077 (vqshlq_m_n_u16): Likewise.
12078 (vqshlq_m_s8): Likewise.
12079 (vqshlq_m_s32): Likewise.
12080 (vqshlq_m_s16): Likewise.
12081 (vqshlq_m_u8): Likewise.
12082 (vqshlq_m_u32): Likewise.
12083 (vqshlq_m_u16): Likewise.
12084 (vqsubq_m_n_s8): Likewise.
12085 (vqsubq_m_n_s32): Likewise.
12086 (vqsubq_m_n_s16): Likewise.
12087 (vqsubq_m_n_u8): Likewise.
12088 (vqsubq_m_n_u32): Likewise.
12089 (vqsubq_m_n_u16): Likewise.
12090 (vqsubq_m_s8): Likewise.
12091 (vqsubq_m_s32): Likewise.
12092 (vqsubq_m_s16): Likewise.
12093 (vqsubq_m_u8): Likewise.
12094 (vqsubq_m_u32): Likewise.
12095 (vqsubq_m_u16): Likewise.
12096 (vrhaddq_m_s8): Likewise.
12097 (vrhaddq_m_s32): Likewise.
12098 (vrhaddq_m_s16): Likewise.
12099 (vrhaddq_m_u8): Likewise.
12100 (vrhaddq_m_u32): Likewise.
12101 (vrhaddq_m_u16): Likewise.
12102 (vrmulhq_m_s8): Likewise.
12103 (vrmulhq_m_s32): Likewise.
12104 (vrmulhq_m_s16): Likewise.
12105 (vrmulhq_m_u8): Likewise.
12106 (vrmulhq_m_u32): Likewise.
12107 (vrmulhq_m_u16): Likewise.
12108 (vrshlq_m_s8): Likewise.
12109 (vrshlq_m_s32): Likewise.
12110 (vrshlq_m_s16): Likewise.
12111 (vrshlq_m_u8): Likewise.
12112 (vrshlq_m_u32): Likewise.
12113 (vrshlq_m_u16): Likewise.
12114 (vrshrq_m_n_s8): Likewise.
12115 (vrshrq_m_n_s32): Likewise.
12116 (vrshrq_m_n_s16): Likewise.
12117 (vrshrq_m_n_u8): Likewise.
12118 (vrshrq_m_n_u32): Likewise.
12119 (vrshrq_m_n_u16): Likewise.
12120 (vshlq_m_n_s8): Likewise.
12121 (vshlq_m_n_s32): Likewise.
12122 (vshlq_m_n_s16): Likewise.
12123 (vshlq_m_n_u8): Likewise.
12124 (vshlq_m_n_u32): Likewise.
12125 (vshlq_m_n_u16): Likewise.
12126 (vshrq_m_n_s8): Likewise.
12127 (vshrq_m_n_s32): Likewise.
12128 (vshrq_m_n_s16): Likewise.
12129 (vshrq_m_n_u8): Likewise.
12130 (vshrq_m_n_u32): Likewise.
12131 (vshrq_m_n_u16): Likewise.
12132 (vsliq_m_n_s8): Likewise.
12133 (vsliq_m_n_s32): Likewise.
12134 (vsliq_m_n_s16): Likewise.
12135 (vsliq_m_n_u8): Likewise.
12136 (vsliq_m_n_u32): Likewise.
12137 (vsliq_m_n_u16): Likewise.
12138 (vsubq_m_n_s8): Likewise.
12139 (vsubq_m_n_s32): Likewise.
12140 (vsubq_m_n_s16): Likewise.
12141 (vsubq_m_n_u8): Likewise.
12142 (vsubq_m_n_u32): Likewise.
12143 (vsubq_m_n_u16): Likewise.
12144 (__arm_vabdq_m_s8): Define intrinsic.
12145 (__arm_vabdq_m_s32): Likewise.
12146 (__arm_vabdq_m_s16): Likewise.
12147 (__arm_vabdq_m_u8): Likewise.
12148 (__arm_vabdq_m_u32): Likewise.
12149 (__arm_vabdq_m_u16): Likewise.
12150 (__arm_vaddq_m_n_s8): Likewise.
12151 (__arm_vaddq_m_n_s32): Likewise.
12152 (__arm_vaddq_m_n_s16): Likewise.
12153 (__arm_vaddq_m_n_u8): Likewise.
12154 (__arm_vaddq_m_n_u32): Likewise.
12155 (__arm_vaddq_m_n_u16): Likewise.
12156 (__arm_vaddq_m_s8): Likewise.
12157 (__arm_vaddq_m_s32): Likewise.
12158 (__arm_vaddq_m_s16): Likewise.
12159 (__arm_vaddq_m_u8): Likewise.
12160 (__arm_vaddq_m_u32): Likewise.
12161 (__arm_vaddq_m_u16): Likewise.
12162 (__arm_vandq_m_s8): Likewise.
12163 (__arm_vandq_m_s32): Likewise.
12164 (__arm_vandq_m_s16): Likewise.
12165 (__arm_vandq_m_u8): Likewise.
12166 (__arm_vandq_m_u32): Likewise.
12167 (__arm_vandq_m_u16): Likewise.
12168 (__arm_vbicq_m_s8): Likewise.
12169 (__arm_vbicq_m_s32): Likewise.
12170 (__arm_vbicq_m_s16): Likewise.
12171 (__arm_vbicq_m_u8): Likewise.
12172 (__arm_vbicq_m_u32): Likewise.
12173 (__arm_vbicq_m_u16): Likewise.
12174 (__arm_vbrsrq_m_n_s8): Likewise.
12175 (__arm_vbrsrq_m_n_s32): Likewise.
12176 (__arm_vbrsrq_m_n_s16): Likewise.
12177 (__arm_vbrsrq_m_n_u8): Likewise.
12178 (__arm_vbrsrq_m_n_u32): Likewise.
12179 (__arm_vbrsrq_m_n_u16): Likewise.
12180 (__arm_vcaddq_rot270_m_s8): Likewise.
12181 (__arm_vcaddq_rot270_m_s32): Likewise.
12182 (__arm_vcaddq_rot270_m_s16): Likewise.
12183 (__arm_vcaddq_rot270_m_u8): Likewise.
12184 (__arm_vcaddq_rot270_m_u32): Likewise.
12185 (__arm_vcaddq_rot270_m_u16): Likewise.
12186 (__arm_vcaddq_rot90_m_s8): Likewise.
12187 (__arm_vcaddq_rot90_m_s32): Likewise.
12188 (__arm_vcaddq_rot90_m_s16): Likewise.
12189 (__arm_vcaddq_rot90_m_u8): Likewise.
12190 (__arm_vcaddq_rot90_m_u32): Likewise.
12191 (__arm_vcaddq_rot90_m_u16): Likewise.
12192 (__arm_veorq_m_s8): Likewise.
12193 (__arm_veorq_m_s32): Likewise.
12194 (__arm_veorq_m_s16): Likewise.
12195 (__arm_veorq_m_u8): Likewise.
12196 (__arm_veorq_m_u32): Likewise.
12197 (__arm_veorq_m_u16): Likewise.
12198 (__arm_vhaddq_m_n_s8): Likewise.
12199 (__arm_vhaddq_m_n_s32): Likewise.
12200 (__arm_vhaddq_m_n_s16): Likewise.
12201 (__arm_vhaddq_m_n_u8): Likewise.
12202 (__arm_vhaddq_m_n_u32): Likewise.
12203 (__arm_vhaddq_m_n_u16): Likewise.
12204 (__arm_vhaddq_m_s8): Likewise.
12205 (__arm_vhaddq_m_s32): Likewise.
12206 (__arm_vhaddq_m_s16): Likewise.
12207 (__arm_vhaddq_m_u8): Likewise.
12208 (__arm_vhaddq_m_u32): Likewise.
12209 (__arm_vhaddq_m_u16): Likewise.
12210 (__arm_vhcaddq_rot270_m_s8): Likewise.
12211 (__arm_vhcaddq_rot270_m_s32): Likewise.
12212 (__arm_vhcaddq_rot270_m_s16): Likewise.
12213 (__arm_vhcaddq_rot90_m_s8): Likewise.
12214 (__arm_vhcaddq_rot90_m_s32): Likewise.
12215 (__arm_vhcaddq_rot90_m_s16): Likewise.
12216 (__arm_vhsubq_m_n_s8): Likewise.
12217 (__arm_vhsubq_m_n_s32): Likewise.
12218 (__arm_vhsubq_m_n_s16): Likewise.
12219 (__arm_vhsubq_m_n_u8): Likewise.
12220 (__arm_vhsubq_m_n_u32): Likewise.
12221 (__arm_vhsubq_m_n_u16): Likewise.
12222 (__arm_vhsubq_m_s8): Likewise.
12223 (__arm_vhsubq_m_s32): Likewise.
12224 (__arm_vhsubq_m_s16): Likewise.
12225 (__arm_vhsubq_m_u8): Likewise.
12226 (__arm_vhsubq_m_u32): Likewise.
12227 (__arm_vhsubq_m_u16): Likewise.
12228 (__arm_vmaxq_m_s8): Likewise.
12229 (__arm_vmaxq_m_s32): Likewise.
12230 (__arm_vmaxq_m_s16): Likewise.
12231 (__arm_vmaxq_m_u8): Likewise.
12232 (__arm_vmaxq_m_u32): Likewise.
12233 (__arm_vmaxq_m_u16): Likewise.
12234 (__arm_vminq_m_s8): Likewise.
12235 (__arm_vminq_m_s32): Likewise.
12236 (__arm_vminq_m_s16): Likewise.
12237 (__arm_vminq_m_u8): Likewise.
12238 (__arm_vminq_m_u32): Likewise.
12239 (__arm_vminq_m_u16): Likewise.
12240 (__arm_vmladavaq_p_s8): Likewise.
12241 (__arm_vmladavaq_p_s32): Likewise.
12242 (__arm_vmladavaq_p_s16): Likewise.
12243 (__arm_vmladavaq_p_u8): Likewise.
12244 (__arm_vmladavaq_p_u32): Likewise.
12245 (__arm_vmladavaq_p_u16): Likewise.
12246 (__arm_vmladavaxq_p_s8): Likewise.
12247 (__arm_vmladavaxq_p_s32): Likewise.
12248 (__arm_vmladavaxq_p_s16): Likewise.
12249 (__arm_vmlaq_m_n_s8): Likewise.
12250 (__arm_vmlaq_m_n_s32): Likewise.
12251 (__arm_vmlaq_m_n_s16): Likewise.
12252 (__arm_vmlaq_m_n_u8): Likewise.
12253 (__arm_vmlaq_m_n_u32): Likewise.
12254 (__arm_vmlaq_m_n_u16): Likewise.
12255 (__arm_vmlasq_m_n_s8): Likewise.
12256 (__arm_vmlasq_m_n_s32): Likewise.
12257 (__arm_vmlasq_m_n_s16): Likewise.
12258 (__arm_vmlasq_m_n_u8): Likewise.
12259 (__arm_vmlasq_m_n_u32): Likewise.
12260 (__arm_vmlasq_m_n_u16): Likewise.
12261 (__arm_vmlsdavaq_p_s8): Likewise.
12262 (__arm_vmlsdavaq_p_s32): Likewise.
12263 (__arm_vmlsdavaq_p_s16): Likewise.
12264 (__arm_vmlsdavaxq_p_s8): Likewise.
12265 (__arm_vmlsdavaxq_p_s32): Likewise.
12266 (__arm_vmlsdavaxq_p_s16): Likewise.
12267 (__arm_vmulhq_m_s8): Likewise.
12268 (__arm_vmulhq_m_s32): Likewise.
12269 (__arm_vmulhq_m_s16): Likewise.
12270 (__arm_vmulhq_m_u8): Likewise.
12271 (__arm_vmulhq_m_u32): Likewise.
12272 (__arm_vmulhq_m_u16): Likewise.
12273 (__arm_vmullbq_int_m_s8): Likewise.
12274 (__arm_vmullbq_int_m_s32): Likewise.
12275 (__arm_vmullbq_int_m_s16): Likewise.
12276 (__arm_vmullbq_int_m_u8): Likewise.
12277 (__arm_vmullbq_int_m_u32): Likewise.
12278 (__arm_vmullbq_int_m_u16): Likewise.
12279 (__arm_vmulltq_int_m_s8): Likewise.
12280 (__arm_vmulltq_int_m_s32): Likewise.
12281 (__arm_vmulltq_int_m_s16): Likewise.
12282 (__arm_vmulltq_int_m_u8): Likewise.
12283 (__arm_vmulltq_int_m_u32): Likewise.
12284 (__arm_vmulltq_int_m_u16): Likewise.
12285 (__arm_vmulq_m_n_s8): Likewise.
12286 (__arm_vmulq_m_n_s32): Likewise.
12287 (__arm_vmulq_m_n_s16): Likewise.
12288 (__arm_vmulq_m_n_u8): Likewise.
12289 (__arm_vmulq_m_n_u32): Likewise.
12290 (__arm_vmulq_m_n_u16): Likewise.
12291 (__arm_vmulq_m_s8): Likewise.
12292 (__arm_vmulq_m_s32): Likewise.
12293 (__arm_vmulq_m_s16): Likewise.
12294 (__arm_vmulq_m_u8): Likewise.
12295 (__arm_vmulq_m_u32): Likewise.
12296 (__arm_vmulq_m_u16): Likewise.
12297 (__arm_vornq_m_s8): Likewise.
12298 (__arm_vornq_m_s32): Likewise.
12299 (__arm_vornq_m_s16): Likewise.
12300 (__arm_vornq_m_u8): Likewise.
12301 (__arm_vornq_m_u32): Likewise.
12302 (__arm_vornq_m_u16): Likewise.
12303 (__arm_vorrq_m_s8): Likewise.
12304 (__arm_vorrq_m_s32): Likewise.
12305 (__arm_vorrq_m_s16): Likewise.
12306 (__arm_vorrq_m_u8): Likewise.
12307 (__arm_vorrq_m_u32): Likewise.
12308 (__arm_vorrq_m_u16): Likewise.
12309 (__arm_vqaddq_m_n_s8): Likewise.
12310 (__arm_vqaddq_m_n_s32): Likewise.
12311 (__arm_vqaddq_m_n_s16): Likewise.
12312 (__arm_vqaddq_m_n_u8): Likewise.
12313 (__arm_vqaddq_m_n_u32): Likewise.
12314 (__arm_vqaddq_m_n_u16): Likewise.
12315 (__arm_vqaddq_m_s8): Likewise.
12316 (__arm_vqaddq_m_s32): Likewise.
12317 (__arm_vqaddq_m_s16): Likewise.
12318 (__arm_vqaddq_m_u8): Likewise.
12319 (__arm_vqaddq_m_u32): Likewise.
12320 (__arm_vqaddq_m_u16): Likewise.
12321 (__arm_vqdmladhq_m_s8): Likewise.
12322 (__arm_vqdmladhq_m_s32): Likewise.
12323 (__arm_vqdmladhq_m_s16): Likewise.
12324 (__arm_vqdmladhxq_m_s8): Likewise.
12325 (__arm_vqdmladhxq_m_s32): Likewise.
12326 (__arm_vqdmladhxq_m_s16): Likewise.
12327 (__arm_vqdmlahq_m_n_s8): Likewise.
12328 (__arm_vqdmlahq_m_n_s32): Likewise.
12329 (__arm_vqdmlahq_m_n_s16): Likewise.
12330 (__arm_vqdmlahq_m_n_u8): Likewise.
12331 (__arm_vqdmlahq_m_n_u32): Likewise.
12332 (__arm_vqdmlahq_m_n_u16): Likewise.
12333 (__arm_vqdmlsdhq_m_s8): Likewise.
12334 (__arm_vqdmlsdhq_m_s32): Likewise.
12335 (__arm_vqdmlsdhq_m_s16): Likewise.
12336 (__arm_vqdmlsdhxq_m_s8): Likewise.
12337 (__arm_vqdmlsdhxq_m_s32): Likewise.
12338 (__arm_vqdmlsdhxq_m_s16): Likewise.
12339 (__arm_vqdmulhq_m_n_s8): Likewise.
12340 (__arm_vqdmulhq_m_n_s32): Likewise.
12341 (__arm_vqdmulhq_m_n_s16): Likewise.
12342 (__arm_vqdmulhq_m_s8): Likewise.
12343 (__arm_vqdmulhq_m_s32): Likewise.
12344 (__arm_vqdmulhq_m_s16): Likewise.
12345 (__arm_vqrdmladhq_m_s8): Likewise.
12346 (__arm_vqrdmladhq_m_s32): Likewise.
12347 (__arm_vqrdmladhq_m_s16): Likewise.
12348 (__arm_vqrdmladhxq_m_s8): Likewise.
12349 (__arm_vqrdmladhxq_m_s32): Likewise.
12350 (__arm_vqrdmladhxq_m_s16): Likewise.
12351 (__arm_vqrdmlahq_m_n_s8): Likewise.
12352 (__arm_vqrdmlahq_m_n_s32): Likewise.
12353 (__arm_vqrdmlahq_m_n_s16): Likewise.
12354 (__arm_vqrdmlahq_m_n_u8): Likewise.
12355 (__arm_vqrdmlahq_m_n_u32): Likewise.
12356 (__arm_vqrdmlahq_m_n_u16): Likewise.
12357 (__arm_vqrdmlashq_m_n_s8): Likewise.
12358 (__arm_vqrdmlashq_m_n_s32): Likewise.
12359 (__arm_vqrdmlashq_m_n_s16): Likewise.
12360 (__arm_vqrdmlashq_m_n_u8): Likewise.
12361 (__arm_vqrdmlashq_m_n_u32): Likewise.
12362 (__arm_vqrdmlashq_m_n_u16): Likewise.
12363 (__arm_vqrdmlsdhq_m_s8): Likewise.
12364 (__arm_vqrdmlsdhq_m_s32): Likewise.
12365 (__arm_vqrdmlsdhq_m_s16): Likewise.
12366 (__arm_vqrdmlsdhxq_m_s8): Likewise.
12367 (__arm_vqrdmlsdhxq_m_s32): Likewise.
12368 (__arm_vqrdmlsdhxq_m_s16): Likewise.
12369 (__arm_vqrdmulhq_m_n_s8): Likewise.
12370 (__arm_vqrdmulhq_m_n_s32): Likewise.
12371 (__arm_vqrdmulhq_m_n_s16): Likewise.
12372 (__arm_vqrdmulhq_m_s8): Likewise.
12373 (__arm_vqrdmulhq_m_s32): Likewise.
12374 (__arm_vqrdmulhq_m_s16): Likewise.
12375 (__arm_vqrshlq_m_s8): Likewise.
12376 (__arm_vqrshlq_m_s32): Likewise.
12377 (__arm_vqrshlq_m_s16): Likewise.
12378 (__arm_vqrshlq_m_u8): Likewise.
12379 (__arm_vqrshlq_m_u32): Likewise.
12380 (__arm_vqrshlq_m_u16): Likewise.
12381 (__arm_vqshlq_m_n_s8): Likewise.
12382 (__arm_vqshlq_m_n_s32): Likewise.
12383 (__arm_vqshlq_m_n_s16): Likewise.
12384 (__arm_vqshlq_m_n_u8): Likewise.
12385 (__arm_vqshlq_m_n_u32): Likewise.
12386 (__arm_vqshlq_m_n_u16): Likewise.
12387 (__arm_vqshlq_m_s8): Likewise.
12388 (__arm_vqshlq_m_s32): Likewise.
12389 (__arm_vqshlq_m_s16): Likewise.
12390 (__arm_vqshlq_m_u8): Likewise.
12391 (__arm_vqshlq_m_u32): Likewise.
12392 (__arm_vqshlq_m_u16): Likewise.
12393 (__arm_vqsubq_m_n_s8): Likewise.
12394 (__arm_vqsubq_m_n_s32): Likewise.
12395 (__arm_vqsubq_m_n_s16): Likewise.
12396 (__arm_vqsubq_m_n_u8): Likewise.
12397 (__arm_vqsubq_m_n_u32): Likewise.
12398 (__arm_vqsubq_m_n_u16): Likewise.
12399 (__arm_vqsubq_m_s8): Likewise.
12400 (__arm_vqsubq_m_s32): Likewise.
12401 (__arm_vqsubq_m_s16): Likewise.
12402 (__arm_vqsubq_m_u8): Likewise.
12403 (__arm_vqsubq_m_u32): Likewise.
12404 (__arm_vqsubq_m_u16): Likewise.
12405 (__arm_vrhaddq_m_s8): Likewise.
12406 (__arm_vrhaddq_m_s32): Likewise.
12407 (__arm_vrhaddq_m_s16): Likewise.
12408 (__arm_vrhaddq_m_u8): Likewise.
12409 (__arm_vrhaddq_m_u32): Likewise.
12410 (__arm_vrhaddq_m_u16): Likewise.
12411 (__arm_vrmulhq_m_s8): Likewise.
12412 (__arm_vrmulhq_m_s32): Likewise.
12413 (__arm_vrmulhq_m_s16): Likewise.
12414 (__arm_vrmulhq_m_u8): Likewise.
12415 (__arm_vrmulhq_m_u32): Likewise.
12416 (__arm_vrmulhq_m_u16): Likewise.
12417 (__arm_vrshlq_m_s8): Likewise.
12418 (__arm_vrshlq_m_s32): Likewise.
12419 (__arm_vrshlq_m_s16): Likewise.
12420 (__arm_vrshlq_m_u8): Likewise.
12421 (__arm_vrshlq_m_u32): Likewise.
12422 (__arm_vrshlq_m_u16): Likewise.
12423 (__arm_vrshrq_m_n_s8): Likewise.
12424 (__arm_vrshrq_m_n_s32): Likewise.
12425 (__arm_vrshrq_m_n_s16): Likewise.
12426 (__arm_vrshrq_m_n_u8): Likewise.
12427 (__arm_vrshrq_m_n_u32): Likewise.
12428 (__arm_vrshrq_m_n_u16): Likewise.
12429 (__arm_vshlq_m_n_s8): Likewise.
12430 (__arm_vshlq_m_n_s32): Likewise.
12431 (__arm_vshlq_m_n_s16): Likewise.
12432 (__arm_vshlq_m_n_u8): Likewise.
12433 (__arm_vshlq_m_n_u32): Likewise.
12434 (__arm_vshlq_m_n_u16): Likewise.
12435 (__arm_vshrq_m_n_s8): Likewise.
12436 (__arm_vshrq_m_n_s32): Likewise.
12437 (__arm_vshrq_m_n_s16): Likewise.
12438 (__arm_vshrq_m_n_u8): Likewise.
12439 (__arm_vshrq_m_n_u32): Likewise.
12440 (__arm_vshrq_m_n_u16): Likewise.
12441 (__arm_vsliq_m_n_s8): Likewise.
12442 (__arm_vsliq_m_n_s32): Likewise.
12443 (__arm_vsliq_m_n_s16): Likewise.
12444 (__arm_vsliq_m_n_u8): Likewise.
12445 (__arm_vsliq_m_n_u32): Likewise.
12446 (__arm_vsliq_m_n_u16): Likewise.
12447 (__arm_vsubq_m_n_s8): Likewise.
12448 (__arm_vsubq_m_n_s32): Likewise.
12449 (__arm_vsubq_m_n_s16): Likewise.
12450 (__arm_vsubq_m_n_u8): Likewise.
12451 (__arm_vsubq_m_n_u32): Likewise.
12452 (__arm_vsubq_m_n_u16): Likewise.
12453 (vqdmladhq_m): Define polymorphic variant.
12454 (vqdmladhxq_m): Likewise.
12455 (vqdmlsdhq_m): Likewise.
12456 (vqdmlsdhxq_m): Likewise.
12457 (vabdq_m): Likewise.
12458 (vandq_m): Likewise.
12459 (vbicq_m): Likewise.
12460 (vbrsrq_m_n): Likewise.
12461 (vcaddq_rot270_m): Likewise.
12462 (vcaddq_rot90_m): Likewise.
12463 (veorq_m): Likewise.
12464 (vmaxq_m): Likewise.
12465 (vminq_m): Likewise.
12466 (vmladavaq_p): Likewise.
12467 (vmlaq_m_n): Likewise.
12468 (vmlasq_m_n): Likewise.
12469 (vmulhq_m): Likewise.
12470 (vmullbq_int_m): Likewise.
12471 (vmulltq_int_m): Likewise.
12472 (vornq_m): Likewise.
12473 (vorrq_m): Likewise.
12474 (vqdmlahq_m_n): Likewise.
12475 (vqrdmlahq_m_n): Likewise.
12476 (vqrdmlashq_m_n): Likewise.
12477 (vqrshlq_m): Likewise.
12478 (vqshlq_m_n): Likewise.
12479 (vqshlq_m): Likewise.
12480 (vrhaddq_m): Likewise.
12481 (vrmulhq_m): Likewise.
12482 (vrshlq_m): Likewise.
12483 (vrshrq_m_n): Likewise.
12484 (vshlq_m_n): Likewise.
12485 (vshrq_m_n): Likewise.
12486 (vsliq_m): Likewise.
12487 (vaddq_m_n): Likewise.
12488 (vaddq_m): Likewise.
12489 (vhaddq_m_n): Likewise.
12490 (vhaddq_m): Likewise.
12491 (vhcaddq_rot270_m): Likewise.
12492 (vhcaddq_rot90_m): Likewise.
12493 (vhsubq_m): Likewise.
12494 (vhsubq_m_n): Likewise.
12495 (vmulq_m_n): Likewise.
12496 (vmulq_m): Likewise.
12497 (vqaddq_m_n): Likewise.
12498 (vqaddq_m): Likewise.
12499 (vqdmulhq_m_n): Likewise.
12500 (vqdmulhq_m): Likewise.
12501 (vsubq_m_n): Likewise.
12502 (vsliq_m_n): Likewise.
12503 (vqsubq_m_n): Likewise.
12504 (vqsubq_m): Likewise.
12505 (vqrdmulhq_m): Likewise.
12506 (vqrdmulhq_m_n): Likewise.
12507 (vqrdmlsdhxq_m): Likewise.
12508 (vqrdmlsdhq_m): Likewise.
12509 (vqrdmladhq_m): Likewise.
12510 (vqrdmladhxq_m): Likewise.
12511 (vmlsdavaxq_p): Likewise.
12512 (vmlsdavaq_p): Likewise.
12513 (vmladavaxq_p): Likewise.
12514 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
12516 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
12517 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
12518 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
12519 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
12520 * config/arm/mve.md (VHSUBQ_M): Define iterators.
12521 (VSLIQ_M_N): Likewise.
12522 (VQRDMLAHQ_M_N): Likewise.
12523 (VRSHLQ_M): Likewise.
12524 (VMINQ_M): Likewise.
12525 (VMULLBQ_INT_M): Likewise.
12526 (VMULHQ_M): Likewise.
12527 (VMULQ_M): Likewise.
12528 (VHSUBQ_M_N): Likewise.
12529 (VHADDQ_M_N): Likewise.
12530 (VORRQ_M): Likewise.
12531 (VRMULHQ_M): Likewise.
12532 (VQADDQ_M): Likewise.
12533 (VRSHRQ_M_N): Likewise.
12534 (VQSUBQ_M_N): Likewise.
12535 (VADDQ_M): Likewise.
12536 (VORNQ_M): Likewise.
12537 (VQDMLAHQ_M_N): Likewise.
12538 (VRHADDQ_M): Likewise.
12539 (VQSHLQ_M): Likewise.
12540 (VANDQ_M): Likewise.
12541 (VBICQ_M): Likewise.
12542 (VSHLQ_M_N): Likewise.
12543 (VCADDQ_ROT270_M): Likewise.
12544 (VQRSHLQ_M): Likewise.
12545 (VQADDQ_M_N): Likewise.
12546 (VADDQ_M_N): Likewise.
12547 (VMAXQ_M): Likewise.
12548 (VQSUBQ_M): Likewise.
12549 (VMLASQ_M_N): Likewise.
12550 (VMLADAVAQ_P): Likewise.
12551 (VBRSRQ_M_N): Likewise.
12552 (VMULQ_M_N): Likewise.
12553 (VCADDQ_ROT90_M): Likewise.
12554 (VMULLTQ_INT_M): Likewise.
12555 (VEORQ_M): Likewise.
12556 (VSHRQ_M_N): Likewise.
12557 (VSUBQ_M_N): Likewise.
12558 (VHADDQ_M): Likewise.
12559 (VABDQ_M): Likewise.
12560 (VQRDMLASHQ_M_N): Likewise.
12561 (VMLAQ_M_N): Likewise.
12562 (VQSHLQ_M_N): Likewise.
12563 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
12564 (mve_vaddq_m_n_<supf><mode>): Likewise.
12565 (mve_vaddq_m_<supf><mode>): Likewise.
12566 (mve_vandq_m_<supf><mode>): Likewise.
12567 (mve_vbicq_m_<supf><mode>): Likewise.
12568 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
12569 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
12570 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
12571 (mve_veorq_m_<supf><mode>): Likewise.
12572 (mve_vhaddq_m_n_<supf><mode>): Likewise.
12573 (mve_vhaddq_m_<supf><mode>): Likewise.
12574 (mve_vhsubq_m_n_<supf><mode>): Likewise.
12575 (mve_vhsubq_m_<supf><mode>): Likewise.
12576 (mve_vmaxq_m_<supf><mode>): Likewise.
12577 (mve_vminq_m_<supf><mode>): Likewise.
12578 (mve_vmladavaq_p_<supf><mode>): Likewise.
12579 (mve_vmlaq_m_n_<supf><mode>): Likewise.
12580 (mve_vmlasq_m_n_<supf><mode>): Likewise.
12581 (mve_vmulhq_m_<supf><mode>): Likewise.
12582 (mve_vmullbq_int_m_<supf><mode>): Likewise.
12583 (mve_vmulltq_int_m_<supf><mode>): Likewise.
12584 (mve_vmulq_m_n_<supf><mode>): Likewise.
12585 (mve_vmulq_m_<supf><mode>): Likewise.
12586 (mve_vornq_m_<supf><mode>): Likewise.
12587 (mve_vorrq_m_<supf><mode>): Likewise.
12588 (mve_vqaddq_m_n_<supf><mode>): Likewise.
12589 (mve_vqaddq_m_<supf><mode>): Likewise.
12590 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
12591 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
12592 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
12593 (mve_vqrshlq_m_<supf><mode>): Likewise.
12594 (mve_vqshlq_m_n_<supf><mode>): Likewise.
12595 (mve_vqshlq_m_<supf><mode>): Likewise.
12596 (mve_vqsubq_m_n_<supf><mode>): Likewise.
12597 (mve_vqsubq_m_<supf><mode>): Likewise.
12598 (mve_vrhaddq_m_<supf><mode>): Likewise.
12599 (mve_vrmulhq_m_<supf><mode>): Likewise.
12600 (mve_vrshlq_m_<supf><mode>): Likewise.
12601 (mve_vrshrq_m_n_<supf><mode>): Likewise.
12602 (mve_vshlq_m_n_<supf><mode>): Likewise.
12603 (mve_vshrq_m_n_<supf><mode>): Likewise.
12604 (mve_vsliq_m_n_<supf><mode>): Likewise.
12605 (mve_vsubq_m_n_<supf><mode>): Likewise.
12606 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
12607 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
12608 (mve_vmladavaxq_p_s<mode>): Likewise.
12609 (mve_vmlsdavaq_p_s<mode>): Likewise.
12610 (mve_vmlsdavaxq_p_s<mode>): Likewise.
12611 (mve_vqdmladhq_m_s<mode>): Likewise.
12612 (mve_vqdmladhxq_m_s<mode>): Likewise.
12613 (mve_vqdmlsdhq_m_s<mode>): Likewise.
12614 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
12615 (mve_vqdmulhq_m_n_s<mode>): Likewise.
12616 (mve_vqdmulhq_m_s<mode>): Likewise.
12617 (mve_vqrdmladhq_m_s<mode>): Likewise.
12618 (mve_vqrdmladhxq_m_s<mode>): Likewise.
12619 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
12620 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
12621 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
12622 (mve_vqrdmulhq_m_s<mode>): Likewise.
12624 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12625 Mihail Ionescu <mihail.ionescu@arm.com>
12626 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12628 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
12629 Define builtin qualifier.
12630 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12631 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
12632 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
12633 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
12634 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
12635 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
12636 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
12637 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
12638 (vsubq_m_s8): Likewise.
12639 (vcvtq_m_n_f16_u16): Likewise.
12640 (vqshluq_m_n_s8): Likewise.
12641 (vabavq_p_s8): Likewise.
12642 (vsriq_m_n_u8): Likewise.
12643 (vshlq_m_u8): Likewise.
12644 (vsubq_m_u8): Likewise.
12645 (vabavq_p_u8): Likewise.
12646 (vshlq_m_s8): Likewise.
12647 (vcvtq_m_n_f16_s16): Likewise.
12648 (vsriq_m_n_s16): Likewise.
12649 (vsubq_m_s16): Likewise.
12650 (vcvtq_m_n_f32_u32): Likewise.
12651 (vqshluq_m_n_s16): Likewise.
12652 (vabavq_p_s16): Likewise.
12653 (vsriq_m_n_u16): Likewise.
12654 (vshlq_m_u16): Likewise.
12655 (vsubq_m_u16): Likewise.
12656 (vabavq_p_u16): Likewise.
12657 (vshlq_m_s16): Likewise.
12658 (vcvtq_m_n_f32_s32): Likewise.
12659 (vsriq_m_n_s32): Likewise.
12660 (vsubq_m_s32): Likewise.
12661 (vqshluq_m_n_s32): Likewise.
12662 (vabavq_p_s32): Likewise.
12663 (vsriq_m_n_u32): Likewise.
12664 (vshlq_m_u32): Likewise.
12665 (vsubq_m_u32): Likewise.
12666 (vabavq_p_u32): Likewise.
12667 (vshlq_m_s32): Likewise.
12668 (__arm_vsriq_m_n_s8): Define intrinsic.
12669 (__arm_vsubq_m_s8): Likewise.
12670 (__arm_vqshluq_m_n_s8): Likewise.
12671 (__arm_vabavq_p_s8): Likewise.
12672 (__arm_vsriq_m_n_u8): Likewise.
12673 (__arm_vshlq_m_u8): Likewise.
12674 (__arm_vsubq_m_u8): Likewise.
12675 (__arm_vabavq_p_u8): Likewise.
12676 (__arm_vshlq_m_s8): Likewise.
12677 (__arm_vsriq_m_n_s16): Likewise.
12678 (__arm_vsubq_m_s16): Likewise.
12679 (__arm_vqshluq_m_n_s16): Likewise.
12680 (__arm_vabavq_p_s16): Likewise.
12681 (__arm_vsriq_m_n_u16): Likewise.
12682 (__arm_vshlq_m_u16): Likewise.
12683 (__arm_vsubq_m_u16): Likewise.
12684 (__arm_vabavq_p_u16): Likewise.
12685 (__arm_vshlq_m_s16): Likewise.
12686 (__arm_vsriq_m_n_s32): Likewise.
12687 (__arm_vsubq_m_s32): Likewise.
12688 (__arm_vqshluq_m_n_s32): Likewise.
12689 (__arm_vabavq_p_s32): Likewise.
12690 (__arm_vsriq_m_n_u32): Likewise.
12691 (__arm_vshlq_m_u32): Likewise.
12692 (__arm_vsubq_m_u32): Likewise.
12693 (__arm_vabavq_p_u32): Likewise.
12694 (__arm_vshlq_m_s32): Likewise.
12695 (__arm_vcvtq_m_n_f16_u16): Likewise.
12696 (__arm_vcvtq_m_n_f16_s16): Likewise.
12697 (__arm_vcvtq_m_n_f32_u32): Likewise.
12698 (__arm_vcvtq_m_n_f32_s32): Likewise.
12699 (vcvtq_m_n): Define polymorphic variant.
12700 (vqshluq_m_n): Likewise.
12701 (vshlq_m): Likewise.
12702 (vsriq_m_n): Likewise.
12703 (vsubq_m): Likewise.
12704 (vabavq_p): Likewise.
12705 * config/arm/arm_mve_builtins.def
12706 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
12707 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12708 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
12709 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
12710 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
12711 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
12712 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
12713 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
12714 * config/arm/mve.md (VABAVQ_P): Define iterator.
12715 (VSHLQ_M): Likewise.
12716 (VSRIQ_M_N): Likewise.
12717 (VSUBQ_M): Likewise.
12718 (VCVTQ_M_N_TO_F): Likewise.
12719 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
12720 (mve_vqshluq_m_n_s<mode>): Likewise.
12721 (mve_vshlq_m_<supf><mode>): Likewise.
12722 (mve_vsriq_m_n_<supf><mode>): Likewise.
12723 (mve_vsubq_m_<supf><mode>): Likewise.
12724 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
12726 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12727 Mihail Ionescu <mihail.ionescu@arm.com>
12728 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12730 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
12731 (vrmlsldavhaq_s32): Likewise.
12732 (vrmlsldavhaxq_s32): Likewise.
12733 (vaddlvaq_p_s32): Likewise.
12734 (vcvtbq_m_f16_f32): Likewise.
12735 (vcvtbq_m_f32_f16): Likewise.
12736 (vcvttq_m_f16_f32): Likewise.
12737 (vcvttq_m_f32_f16): Likewise.
12738 (vrev16q_m_s8): Likewise.
12739 (vrev32q_m_f16): Likewise.
12740 (vrmlaldavhq_p_s32): Likewise.
12741 (vrmlaldavhxq_p_s32): Likewise.
12742 (vrmlsldavhq_p_s32): Likewise.
12743 (vrmlsldavhxq_p_s32): Likewise.
12744 (vaddlvaq_p_u32): Likewise.
12745 (vrev16q_m_u8): Likewise.
12746 (vrmlaldavhq_p_u32): Likewise.
12747 (vmvnq_m_n_s16): Likewise.
12748 (vorrq_m_n_s16): Likewise.
12749 (vqrshrntq_n_s16): Likewise.
12750 (vqshrnbq_n_s16): Likewise.
12751 (vqshrntq_n_s16): Likewise.
12752 (vrshrnbq_n_s16): Likewise.
12753 (vrshrntq_n_s16): Likewise.
12754 (vshrnbq_n_s16): Likewise.
12755 (vshrntq_n_s16): Likewise.
12756 (vcmlaq_f16): Likewise.
12757 (vcmlaq_rot180_f16): Likewise.
12758 (vcmlaq_rot270_f16): Likewise.
12759 (vcmlaq_rot90_f16): Likewise.
12760 (vfmaq_f16): Likewise.
12761 (vfmaq_n_f16): Likewise.
12762 (vfmasq_n_f16): Likewise.
12763 (vfmsq_f16): Likewise.
12764 (vmlaldavaq_s16): Likewise.
12765 (vmlaldavaxq_s16): Likewise.
12766 (vmlsldavaq_s16): Likewise.
12767 (vmlsldavaxq_s16): Likewise.
12768 (vabsq_m_f16): Likewise.
12769 (vcvtmq_m_s16_f16): Likewise.
12770 (vcvtnq_m_s16_f16): Likewise.
12771 (vcvtpq_m_s16_f16): Likewise.
12772 (vcvtq_m_s16_f16): Likewise.
12773 (vdupq_m_n_f16): Likewise.
12774 (vmaxnmaq_m_f16): Likewise.
12775 (vmaxnmavq_p_f16): Likewise.
12776 (vmaxnmvq_p_f16): Likewise.
12777 (vminnmaq_m_f16): Likewise.
12778 (vminnmavq_p_f16): Likewise.
12779 (vminnmvq_p_f16): Likewise.
12780 (vmlaldavq_p_s16): Likewise.
12781 (vmlaldavxq_p_s16): Likewise.
12782 (vmlsldavq_p_s16): Likewise.
12783 (vmlsldavxq_p_s16): Likewise.
12784 (vmovlbq_m_s8): Likewise.
12785 (vmovltq_m_s8): Likewise.
12786 (vmovnbq_m_s16): Likewise.
12787 (vmovntq_m_s16): Likewise.
12788 (vnegq_m_f16): Likewise.
12789 (vpselq_f16): Likewise.
12790 (vqmovnbq_m_s16): Likewise.
12791 (vqmovntq_m_s16): Likewise.
12792 (vrev32q_m_s8): Likewise.
12793 (vrev64q_m_f16): Likewise.
12794 (vrndaq_m_f16): Likewise.
12795 (vrndmq_m_f16): Likewise.
12796 (vrndnq_m_f16): Likewise.
12797 (vrndpq_m_f16): Likewise.
12798 (vrndq_m_f16): Likewise.
12799 (vrndxq_m_f16): Likewise.
12800 (vcmpeqq_m_n_f16): Likewise.
12801 (vcmpgeq_m_f16): Likewise.
12802 (vcmpgeq_m_n_f16): Likewise.
12803 (vcmpgtq_m_f16): Likewise.
12804 (vcmpgtq_m_n_f16): Likewise.
12805 (vcmpleq_m_f16): Likewise.
12806 (vcmpleq_m_n_f16): Likewise.
12807 (vcmpltq_m_f16): Likewise.
12808 (vcmpltq_m_n_f16): Likewise.
12809 (vcmpneq_m_f16): Likewise.
12810 (vcmpneq_m_n_f16): Likewise.
12811 (vmvnq_m_n_u16): Likewise.
12812 (vorrq_m_n_u16): Likewise.
12813 (vqrshruntq_n_s16): Likewise.
12814 (vqshrunbq_n_s16): Likewise.
12815 (vqshruntq_n_s16): Likewise.
12816 (vcvtmq_m_u16_f16): Likewise.
12817 (vcvtnq_m_u16_f16): Likewise.
12818 (vcvtpq_m_u16_f16): Likewise.
12819 (vcvtq_m_u16_f16): Likewise.
12820 (vqmovunbq_m_s16): Likewise.
12821 (vqmovuntq_m_s16): Likewise.
12822 (vqrshrntq_n_u16): Likewise.
12823 (vqshrnbq_n_u16): Likewise.
12824 (vqshrntq_n_u16): Likewise.
12825 (vrshrnbq_n_u16): Likewise.
12826 (vrshrntq_n_u16): Likewise.
12827 (vshrnbq_n_u16): Likewise.
12828 (vshrntq_n_u16): Likewise.
12829 (vmlaldavaq_u16): Likewise.
12830 (vmlaldavaxq_u16): Likewise.
12831 (vmlaldavq_p_u16): Likewise.
12832 (vmlaldavxq_p_u16): Likewise.
12833 (vmovlbq_m_u8): Likewise.
12834 (vmovltq_m_u8): Likewise.
12835 (vmovnbq_m_u16): Likewise.
12836 (vmovntq_m_u16): Likewise.
12837 (vqmovnbq_m_u16): Likewise.
12838 (vqmovntq_m_u16): Likewise.
12839 (vrev32q_m_u8): Likewise.
12840 (vmvnq_m_n_s32): Likewise.
12841 (vorrq_m_n_s32): Likewise.
12842 (vqrshrntq_n_s32): Likewise.
12843 (vqshrnbq_n_s32): Likewise.
12844 (vqshrntq_n_s32): Likewise.
12845 (vrshrnbq_n_s32): Likewise.
12846 (vrshrntq_n_s32): Likewise.
12847 (vshrnbq_n_s32): Likewise.
12848 (vshrntq_n_s32): Likewise.
12849 (vcmlaq_f32): Likewise.
12850 (vcmlaq_rot180_f32): Likewise.
12851 (vcmlaq_rot270_f32): Likewise.
12852 (vcmlaq_rot90_f32): Likewise.
12853 (vfmaq_f32): Likewise.
12854 (vfmaq_n_f32): Likewise.
12855 (vfmasq_n_f32): Likewise.
12856 (vfmsq_f32): Likewise.
12857 (vmlaldavaq_s32): Likewise.
12858 (vmlaldavaxq_s32): Likewise.
12859 (vmlsldavaq_s32): Likewise.
12860 (vmlsldavaxq_s32): Likewise.
12861 (vabsq_m_f32): Likewise.
12862 (vcvtmq_m_s32_f32): Likewise.
12863 (vcvtnq_m_s32_f32): Likewise.
12864 (vcvtpq_m_s32_f32): Likewise.
12865 (vcvtq_m_s32_f32): Likewise.
12866 (vdupq_m_n_f32): Likewise.
12867 (vmaxnmaq_m_f32): Likewise.
12868 (vmaxnmavq_p_f32): Likewise.
12869 (vmaxnmvq_p_f32): Likewise.
12870 (vminnmaq_m_f32): Likewise.
12871 (vminnmavq_p_f32): Likewise.
12872 (vminnmvq_p_f32): Likewise.
12873 (vmlaldavq_p_s32): Likewise.
12874 (vmlaldavxq_p_s32): Likewise.
12875 (vmlsldavq_p_s32): Likewise.
12876 (vmlsldavxq_p_s32): Likewise.
12877 (vmovlbq_m_s16): Likewise.
12878 (vmovltq_m_s16): Likewise.
12879 (vmovnbq_m_s32): Likewise.
12880 (vmovntq_m_s32): Likewise.
12881 (vnegq_m_f32): Likewise.
12882 (vpselq_f32): Likewise.
12883 (vqmovnbq_m_s32): Likewise.
12884 (vqmovntq_m_s32): Likewise.
12885 (vrev32q_m_s16): Likewise.
12886 (vrev64q_m_f32): Likewise.
12887 (vrndaq_m_f32): Likewise.
12888 (vrndmq_m_f32): Likewise.
12889 (vrndnq_m_f32): Likewise.
12890 (vrndpq_m_f32): Likewise.
12891 (vrndq_m_f32): Likewise.
12892 (vrndxq_m_f32): Likewise.
12893 (vcmpeqq_m_n_f32): Likewise.
12894 (vcmpgeq_m_f32): Likewise.
12895 (vcmpgeq_m_n_f32): Likewise.
12896 (vcmpgtq_m_f32): Likewise.
12897 (vcmpgtq_m_n_f32): Likewise.
12898 (vcmpleq_m_f32): Likewise.
12899 (vcmpleq_m_n_f32): Likewise.
12900 (vcmpltq_m_f32): Likewise.
12901 (vcmpltq_m_n_f32): Likewise.
12902 (vcmpneq_m_f32): Likewise.
12903 (vcmpneq_m_n_f32): Likewise.
12904 (vmvnq_m_n_u32): Likewise.
12905 (vorrq_m_n_u32): Likewise.
12906 (vqrshruntq_n_s32): Likewise.
12907 (vqshrunbq_n_s32): Likewise.
12908 (vqshruntq_n_s32): Likewise.
12909 (vcvtmq_m_u32_f32): Likewise.
12910 (vcvtnq_m_u32_f32): Likewise.
12911 (vcvtpq_m_u32_f32): Likewise.
12912 (vcvtq_m_u32_f32): Likewise.
12913 (vqmovunbq_m_s32): Likewise.
12914 (vqmovuntq_m_s32): Likewise.
12915 (vqrshrntq_n_u32): Likewise.
12916 (vqshrnbq_n_u32): Likewise.
12917 (vqshrntq_n_u32): Likewise.
12918 (vrshrnbq_n_u32): Likewise.
12919 (vrshrntq_n_u32): Likewise.
12920 (vshrnbq_n_u32): Likewise.
12921 (vshrntq_n_u32): Likewise.
12922 (vmlaldavaq_u32): Likewise.
12923 (vmlaldavaxq_u32): Likewise.
12924 (vmlaldavq_p_u32): Likewise.
12925 (vmlaldavxq_p_u32): Likewise.
12926 (vmovlbq_m_u16): Likewise.
12927 (vmovltq_m_u16): Likewise.
12928 (vmovnbq_m_u32): Likewise.
12929 (vmovntq_m_u32): Likewise.
12930 (vqmovnbq_m_u32): Likewise.
12931 (vqmovntq_m_u32): Likewise.
12932 (vrev32q_m_u16): Likewise.
12933 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
12934 (__arm_vrmlsldavhaq_s32): Likewise.
12935 (__arm_vrmlsldavhaxq_s32): Likewise.
12936 (__arm_vaddlvaq_p_s32): Likewise.
12937 (__arm_vrev16q_m_s8): Likewise.
12938 (__arm_vrmlaldavhq_p_s32): Likewise.
12939 (__arm_vrmlaldavhxq_p_s32): Likewise.
12940 (__arm_vrmlsldavhq_p_s32): Likewise.
12941 (__arm_vrmlsldavhxq_p_s32): Likewise.
12942 (__arm_vaddlvaq_p_u32): Likewise.
12943 (__arm_vrev16q_m_u8): Likewise.
12944 (__arm_vrmlaldavhq_p_u32): Likewise.
12945 (__arm_vmvnq_m_n_s16): Likewise.
12946 (__arm_vorrq_m_n_s16): Likewise.
12947 (__arm_vqrshrntq_n_s16): Likewise.
12948 (__arm_vqshrnbq_n_s16): Likewise.
12949 (__arm_vqshrntq_n_s16): Likewise.
12950 (__arm_vrshrnbq_n_s16): Likewise.
12951 (__arm_vrshrntq_n_s16): Likewise.
12952 (__arm_vshrnbq_n_s16): Likewise.
12953 (__arm_vshrntq_n_s16): Likewise.
12954 (__arm_vmlaldavaq_s16): Likewise.
12955 (__arm_vmlaldavaxq_s16): Likewise.
12956 (__arm_vmlsldavaq_s16): Likewise.
12957 (__arm_vmlsldavaxq_s16): Likewise.
12958 (__arm_vmlaldavq_p_s16): Likewise.
12959 (__arm_vmlaldavxq_p_s16): Likewise.
12960 (__arm_vmlsldavq_p_s16): Likewise.
12961 (__arm_vmlsldavxq_p_s16): Likewise.
12962 (__arm_vmovlbq_m_s8): Likewise.
12963 (__arm_vmovltq_m_s8): Likewise.
12964 (__arm_vmovnbq_m_s16): Likewise.
12965 (__arm_vmovntq_m_s16): Likewise.
12966 (__arm_vqmovnbq_m_s16): Likewise.
12967 (__arm_vqmovntq_m_s16): Likewise.
12968 (__arm_vrev32q_m_s8): Likewise.
12969 (__arm_vmvnq_m_n_u16): Likewise.
12970 (__arm_vorrq_m_n_u16): Likewise.
12971 (__arm_vqrshruntq_n_s16): Likewise.
12972 (__arm_vqshrunbq_n_s16): Likewise.
12973 (__arm_vqshruntq_n_s16): Likewise.
12974 (__arm_vqmovunbq_m_s16): Likewise.
12975 (__arm_vqmovuntq_m_s16): Likewise.
12976 (__arm_vqrshrntq_n_u16): Likewise.
12977 (__arm_vqshrnbq_n_u16): Likewise.
12978 (__arm_vqshrntq_n_u16): Likewise.
12979 (__arm_vrshrnbq_n_u16): Likewise.
12980 (__arm_vrshrntq_n_u16): Likewise.
12981 (__arm_vshrnbq_n_u16): Likewise.
12982 (__arm_vshrntq_n_u16): Likewise.
12983 (__arm_vmlaldavaq_u16): Likewise.
12984 (__arm_vmlaldavaxq_u16): Likewise.
12985 (__arm_vmlaldavq_p_u16): Likewise.
12986 (__arm_vmlaldavxq_p_u16): Likewise.
12987 (__arm_vmovlbq_m_u8): Likewise.
12988 (__arm_vmovltq_m_u8): Likewise.
12989 (__arm_vmovnbq_m_u16): Likewise.
12990 (__arm_vmovntq_m_u16): Likewise.
12991 (__arm_vqmovnbq_m_u16): Likewise.
12992 (__arm_vqmovntq_m_u16): Likewise.
12993 (__arm_vrev32q_m_u8): Likewise.
12994 (__arm_vmvnq_m_n_s32): Likewise.
12995 (__arm_vorrq_m_n_s32): Likewise.
12996 (__arm_vqrshrntq_n_s32): Likewise.
12997 (__arm_vqshrnbq_n_s32): Likewise.
12998 (__arm_vqshrntq_n_s32): Likewise.
12999 (__arm_vrshrnbq_n_s32): Likewise.
13000 (__arm_vrshrntq_n_s32): Likewise.
13001 (__arm_vshrnbq_n_s32): Likewise.
13002 (__arm_vshrntq_n_s32): Likewise.
13003 (__arm_vmlaldavaq_s32): Likewise.
13004 (__arm_vmlaldavaxq_s32): Likewise.
13005 (__arm_vmlsldavaq_s32): Likewise.
13006 (__arm_vmlsldavaxq_s32): Likewise.
13007 (__arm_vmlaldavq_p_s32): Likewise.
13008 (__arm_vmlaldavxq_p_s32): Likewise.
13009 (__arm_vmlsldavq_p_s32): Likewise.
13010 (__arm_vmlsldavxq_p_s32): Likewise.
13011 (__arm_vmovlbq_m_s16): Likewise.
13012 (__arm_vmovltq_m_s16): Likewise.
13013 (__arm_vmovnbq_m_s32): Likewise.
13014 (__arm_vmovntq_m_s32): Likewise.
13015 (__arm_vqmovnbq_m_s32): Likewise.
13016 (__arm_vqmovntq_m_s32): Likewise.
13017 (__arm_vrev32q_m_s16): Likewise.
13018 (__arm_vmvnq_m_n_u32): Likewise.
13019 (__arm_vorrq_m_n_u32): Likewise.
13020 (__arm_vqrshruntq_n_s32): Likewise.
13021 (__arm_vqshrunbq_n_s32): Likewise.
13022 (__arm_vqshruntq_n_s32): Likewise.
13023 (__arm_vqmovunbq_m_s32): Likewise.
13024 (__arm_vqmovuntq_m_s32): Likewise.
13025 (__arm_vqrshrntq_n_u32): Likewise.
13026 (__arm_vqshrnbq_n_u32): Likewise.
13027 (__arm_vqshrntq_n_u32): Likewise.
13028 (__arm_vrshrnbq_n_u32): Likewise.
13029 (__arm_vrshrntq_n_u32): Likewise.
13030 (__arm_vshrnbq_n_u32): Likewise.
13031 (__arm_vshrntq_n_u32): Likewise.
13032 (__arm_vmlaldavaq_u32): Likewise.
13033 (__arm_vmlaldavaxq_u32): Likewise.
13034 (__arm_vmlaldavq_p_u32): Likewise.
13035 (__arm_vmlaldavxq_p_u32): Likewise.
13036 (__arm_vmovlbq_m_u16): Likewise.
13037 (__arm_vmovltq_m_u16): Likewise.
13038 (__arm_vmovnbq_m_u32): Likewise.
13039 (__arm_vmovntq_m_u32): Likewise.
13040 (__arm_vqmovnbq_m_u32): Likewise.
13041 (__arm_vqmovntq_m_u32): Likewise.
13042 (__arm_vrev32q_m_u16): Likewise.
13043 (__arm_vcvtbq_m_f16_f32): Likewise.
13044 (__arm_vcvtbq_m_f32_f16): Likewise.
13045 (__arm_vcvttq_m_f16_f32): Likewise.
13046 (__arm_vcvttq_m_f32_f16): Likewise.
13047 (__arm_vrev32q_m_f16): Likewise.
13048 (__arm_vcmlaq_f16): Likewise.
13049 (__arm_vcmlaq_rot180_f16): Likewise.
13050 (__arm_vcmlaq_rot270_f16): Likewise.
13051 (__arm_vcmlaq_rot90_f16): Likewise.
13052 (__arm_vfmaq_f16): Likewise.
13053 (__arm_vfmaq_n_f16): Likewise.
13054 (__arm_vfmasq_n_f16): Likewise.
13055 (__arm_vfmsq_f16): Likewise.
13056 (__arm_vabsq_m_f16): Likewise.
13057 (__arm_vcvtmq_m_s16_f16): Likewise.
13058 (__arm_vcvtnq_m_s16_f16): Likewise.
13059 (__arm_vcvtpq_m_s16_f16): Likewise.
13060 (__arm_vcvtq_m_s16_f16): Likewise.
13061 (__arm_vdupq_m_n_f16): Likewise.
13062 (__arm_vmaxnmaq_m_f16): Likewise.
13063 (__arm_vmaxnmavq_p_f16): Likewise.
13064 (__arm_vmaxnmvq_p_f16): Likewise.
13065 (__arm_vminnmaq_m_f16): Likewise.
13066 (__arm_vminnmavq_p_f16): Likewise.
13067 (__arm_vminnmvq_p_f16): Likewise.
13068 (__arm_vnegq_m_f16): Likewise.
13069 (__arm_vpselq_f16): Likewise.
13070 (__arm_vrev64q_m_f16): Likewise.
13071 (__arm_vrndaq_m_f16): Likewise.
13072 (__arm_vrndmq_m_f16): Likewise.
13073 (__arm_vrndnq_m_f16): Likewise.
13074 (__arm_vrndpq_m_f16): Likewise.
13075 (__arm_vrndq_m_f16): Likewise.
13076 (__arm_vrndxq_m_f16): Likewise.
13077 (__arm_vcmpeqq_m_n_f16): Likewise.
13078 (__arm_vcmpgeq_m_f16): Likewise.
13079 (__arm_vcmpgeq_m_n_f16): Likewise.
13080 (__arm_vcmpgtq_m_f16): Likewise.
13081 (__arm_vcmpgtq_m_n_f16): Likewise.
13082 (__arm_vcmpleq_m_f16): Likewise.
13083 (__arm_vcmpleq_m_n_f16): Likewise.
13084 (__arm_vcmpltq_m_f16): Likewise.
13085 (__arm_vcmpltq_m_n_f16): Likewise.
13086 (__arm_vcmpneq_m_f16): Likewise.
13087 (__arm_vcmpneq_m_n_f16): Likewise.
13088 (__arm_vcvtmq_m_u16_f16): Likewise.
13089 (__arm_vcvtnq_m_u16_f16): Likewise.
13090 (__arm_vcvtpq_m_u16_f16): Likewise.
13091 (__arm_vcvtq_m_u16_f16): Likewise.
13092 (__arm_vcmlaq_f32): Likewise.
13093 (__arm_vcmlaq_rot180_f32): Likewise.
13094 (__arm_vcmlaq_rot270_f32): Likewise.
13095 (__arm_vcmlaq_rot90_f32): Likewise.
13096 (__arm_vfmaq_f32): Likewise.
13097 (__arm_vfmaq_n_f32): Likewise.
13098 (__arm_vfmasq_n_f32): Likewise.
13099 (__arm_vfmsq_f32): Likewise.
13100 (__arm_vabsq_m_f32): Likewise.
13101 (__arm_vcvtmq_m_s32_f32): Likewise.
13102 (__arm_vcvtnq_m_s32_f32): Likewise.
13103 (__arm_vcvtpq_m_s32_f32): Likewise.
13104 (__arm_vcvtq_m_s32_f32): Likewise.
13105 (__arm_vdupq_m_n_f32): Likewise.
13106 (__arm_vmaxnmaq_m_f32): Likewise.
13107 (__arm_vmaxnmavq_p_f32): Likewise.
13108 (__arm_vmaxnmvq_p_f32): Likewise.
13109 (__arm_vminnmaq_m_f32): Likewise.
13110 (__arm_vminnmavq_p_f32): Likewise.
13111 (__arm_vminnmvq_p_f32): Likewise.
13112 (__arm_vnegq_m_f32): Likewise.
13113 (__arm_vpselq_f32): Likewise.
13114 (__arm_vrev64q_m_f32): Likewise.
13115 (__arm_vrndaq_m_f32): Likewise.
13116 (__arm_vrndmq_m_f32): Likewise.
13117 (__arm_vrndnq_m_f32): Likewise.
13118 (__arm_vrndpq_m_f32): Likewise.
13119 (__arm_vrndq_m_f32): Likewise.
13120 (__arm_vrndxq_m_f32): Likewise.
13121 (__arm_vcmpeqq_m_n_f32): Likewise.
13122 (__arm_vcmpgeq_m_f32): Likewise.
13123 (__arm_vcmpgeq_m_n_f32): Likewise.
13124 (__arm_vcmpgtq_m_f32): Likewise.
13125 (__arm_vcmpgtq_m_n_f32): Likewise.
13126 (__arm_vcmpleq_m_f32): Likewise.
13127 (__arm_vcmpleq_m_n_f32): Likewise.
13128 (__arm_vcmpltq_m_f32): Likewise.
13129 (__arm_vcmpltq_m_n_f32): Likewise.
13130 (__arm_vcmpneq_m_f32): Likewise.
13131 (__arm_vcmpneq_m_n_f32): Likewise.
13132 (__arm_vcvtmq_m_u32_f32): Likewise.
13133 (__arm_vcvtnq_m_u32_f32): Likewise.
13134 (__arm_vcvtpq_m_u32_f32): Likewise.
13135 (__arm_vcvtq_m_u32_f32): Likewise.
13136 (vcvtq_m): Define polymorphic variant.
13137 (vabsq_m): Likewise.
13138 (vcmlaq): Likewise.
13139 (vcmlaq_rot180): Likewise.
13140 (vcmlaq_rot270): Likewise.
13141 (vcmlaq_rot90): Likewise.
13142 (vcmpeqq_m_n): Likewise.
13143 (vcmpgeq_m_n): Likewise.
13144 (vrndxq_m): Likewise.
13145 (vrndq_m): Likewise.
13146 (vrndpq_m): Likewise.
13147 (vcmpgtq_m_n): Likewise.
13148 (vcmpgtq_m): Likewise.
13149 (vcmpleq_m): Likewise.
13150 (vcmpleq_m_n): Likewise.
13151 (vcmpltq_m_n): Likewise.
13152 (vcmpltq_m): Likewise.
13153 (vcmpneq_m): Likewise.
13154 (vcmpneq_m_n): Likewise.
13155 (vcvtbq_m): Likewise.
13156 (vcvttq_m): Likewise.
13157 (vcvtmq_m): Likewise.
13158 (vcvtnq_m): Likewise.
13159 (vcvtpq_m): Likewise.
13160 (vdupq_m_n): Likewise.
13161 (vfmaq_n): Likewise.
13163 (vfmasq_n): Likewise.
13165 (vmaxnmaq_m): Likewise.
13166 (vmaxnmavq_m): Likewise.
13167 (vmaxnmvq_m): Likewise.
13168 (vmaxnmavq_p): Likewise.
13169 (vmaxnmvq_p): Likewise.
13170 (vminnmaq_m): Likewise.
13171 (vminnmavq_p): Likewise.
13172 (vminnmvq_p): Likewise.
13173 (vrndnq_m): Likewise.
13174 (vrndaq_m): Likewise.
13175 (vrndmq_m): Likewise.
13176 (vrev64q_m): Likewise.
13177 (vrev32q_m): Likewise.
13178 (vpselq): Likewise.
13179 (vnegq_m): Likewise.
13180 (vcmpgeq_m): Likewise.
13181 (vshrntq_n): Likewise.
13182 (vrshrntq_n): Likewise.
13183 (vmovlbq_m): Likewise.
13184 (vmovnbq_m): Likewise.
13185 (vmovntq_m): Likewise.
13186 (vmvnq_m_n): Likewise.
13187 (vmvnq_m): Likewise.
13188 (vshrnbq_n): Likewise.
13189 (vrshrnbq_n): Likewise.
13190 (vqshruntq_n): Likewise.
13191 (vrev16q_m): Likewise.
13192 (vqshrunbq_n): Likewise.
13193 (vqshrntq_n): Likewise.
13194 (vqrshruntq_n): Likewise.
13195 (vqrshrntq_n): Likewise.
13196 (vqshrnbq_n): Likewise.
13197 (vqmovuntq_m): Likewise.
13198 (vqmovntq_m): Likewise.
13199 (vqmovnbq_m): Likewise.
13200 (vorrq_m_n): Likewise.
13201 (vmovltq_m): Likewise.
13202 (vqmovunbq_m): Likewise.
13203 (vaddlvaq_p): Likewise.
13204 (vmlaldavaq): Likewise.
13205 (vmlaldavaxq): Likewise.
13206 (vmlaldavq_p): Likewise.
13207 (vmlaldavxq_p): Likewise.
13208 (vmlsldavaq): Likewise.
13209 (vmlsldavaxq): Likewise.
13210 (vmlsldavq_p): Likewise.
13211 (vmlsldavxq_p): Likewise.
13212 (vrmlaldavhaxq): Likewise.
13213 (vrmlaldavhq_p): Likewise.
13214 (vrmlaldavhxq_p): Likewise.
13215 (vrmlsldavhaq): Likewise.
13216 (vrmlsldavhaxq): Likewise.
13217 (vrmlsldavhq_p): Likewise.
13218 (vrmlsldavhxq_p): Likewise.
13219 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
13221 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
13222 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
13223 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
13224 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
13225 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
13226 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
13227 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
13228 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
13229 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
13230 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
13231 (MVE_pred3): Likewise.
13232 (MVE_constraint1): Likewise.
13233 (MVE_pred1): Likewise.
13234 (VMLALDAVQ_P): Define iterator.
13235 (VQMOVNBQ_M): Likewise.
13236 (VMOVLTQ_M): Likewise.
13237 (VMOVNBQ_M): Likewise.
13238 (VRSHRNTQ_N): Likewise.
13239 (VORRQ_M_N): Likewise.
13240 (VREV32Q_M): Likewise.
13241 (VREV16Q_M): Likewise.
13242 (VQRSHRNTQ_N): Likewise.
13243 (VMOVNTQ_M): Likewise.
13244 (VMOVLBQ_M): Likewise.
13245 (VMLALDAVAQ): Likewise.
13246 (VQSHRNBQ_N): Likewise.
13247 (VSHRNBQ_N): Likewise.
13248 (VRSHRNBQ_N): Likewise.
13249 (VMLALDAVXQ_P): Likewise.
13250 (VQMOVNTQ_M): Likewise.
13251 (VMVNQ_M_N): Likewise.
13252 (VQSHRNTQ_N): Likewise.
13253 (VMLALDAVAXQ): Likewise.
13254 (VSHRNTQ_N): Likewise.
13255 (VCVTMQ_M): Likewise.
13256 (VCVTNQ_M): Likewise.
13257 (VCVTPQ_M): Likewise.
13258 (VCVTQ_M_N_FROM_F): Likewise.
13259 (VCVTQ_M_FROM_F): Likewise.
13260 (VRMLALDAVHQ_P): Likewise.
13261 (VADDLVAQ_P): Likewise.
13262 (mve_vrndq_m_f<mode>): Define RTL pattern.
13263 (mve_vabsq_m_f<mode>): Likewise.
13264 (mve_vaddlvaq_p_<supf>v4si): Likewise.
13265 (mve_vcmlaq_f<mode>): Likewise.
13266 (mve_vcmlaq_rot180_f<mode>): Likewise.
13267 (mve_vcmlaq_rot270_f<mode>): Likewise.
13268 (mve_vcmlaq_rot90_f<mode>): Likewise.
13269 (mve_vcmpeqq_m_n_f<mode>): Likewise.
13270 (mve_vcmpgeq_m_f<mode>): Likewise.
13271 (mve_vcmpgeq_m_n_f<mode>): Likewise.
13272 (mve_vcmpgtq_m_f<mode>): Likewise.
13273 (mve_vcmpgtq_m_n_f<mode>): Likewise.
13274 (mve_vcmpleq_m_f<mode>): Likewise.
13275 (mve_vcmpleq_m_n_f<mode>): Likewise.
13276 (mve_vcmpltq_m_f<mode>): Likewise.
13277 (mve_vcmpltq_m_n_f<mode>): Likewise.
13278 (mve_vcmpneq_m_f<mode>): Likewise.
13279 (mve_vcmpneq_m_n_f<mode>): Likewise.
13280 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
13281 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
13282 (mve_vcvttq_m_f16_f32v8hf): Likewise.
13283 (mve_vcvttq_m_f32_f16v4sf): Likewise.
13284 (mve_vdupq_m_n_f<mode>): Likewise.
13285 (mve_vfmaq_f<mode>): Likewise.
13286 (mve_vfmaq_n_f<mode>): Likewise.
13287 (mve_vfmasq_n_f<mode>): Likewise.
13288 (mve_vfmsq_f<mode>): Likewise.
13289 (mve_vmaxnmaq_m_f<mode>): Likewise.
13290 (mve_vmaxnmavq_p_f<mode>): Likewise.
13291 (mve_vmaxnmvq_p_f<mode>): Likewise.
13292 (mve_vminnmaq_m_f<mode>): Likewise.
13293 (mve_vminnmavq_p_f<mode>): Likewise.
13294 (mve_vminnmvq_p_f<mode>): Likewise.
13295 (mve_vmlaldavaq_<supf><mode>): Likewise.
13296 (mve_vmlaldavaxq_<supf><mode>): Likewise.
13297 (mve_vmlaldavq_p_<supf><mode>): Likewise.
13298 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
13299 (mve_vmlsldavaq_s<mode>): Likewise.
13300 (mve_vmlsldavaxq_s<mode>): Likewise.
13301 (mve_vmlsldavq_p_s<mode>): Likewise.
13302 (mve_vmlsldavxq_p_s<mode>): Likewise.
13303 (mve_vmovlbq_m_<supf><mode>): Likewise.
13304 (mve_vmovltq_m_<supf><mode>): Likewise.
13305 (mve_vmovnbq_m_<supf><mode>): Likewise.
13306 (mve_vmovntq_m_<supf><mode>): Likewise.
13307 (mve_vmvnq_m_n_<supf><mode>): Likewise.
13308 (mve_vnegq_m_f<mode>): Likewise.
13309 (mve_vorrq_m_n_<supf><mode>): Likewise.
13310 (mve_vpselq_f<mode>): Likewise.
13311 (mve_vqmovnbq_m_<supf><mode>): Likewise.
13312 (mve_vqmovntq_m_<supf><mode>): Likewise.
13313 (mve_vqmovunbq_m_s<mode>): Likewise.
13314 (mve_vqmovuntq_m_s<mode>): Likewise.
13315 (mve_vqrshrntq_n_<supf><mode>): Likewise.
13316 (mve_vqrshruntq_n_s<mode>): Likewise.
13317 (mve_vqshrnbq_n_<supf><mode>): Likewise.
13318 (mve_vqshrntq_n_<supf><mode>): Likewise.
13319 (mve_vqshrunbq_n_s<mode>): Likewise.
13320 (mve_vqshruntq_n_s<mode>): Likewise.
13321 (mve_vrev32q_m_fv8hf): Likewise.
13322 (mve_vrev32q_m_<supf><mode>): Likewise.
13323 (mve_vrev64q_m_f<mode>): Likewise.
13324 (mve_vrmlaldavhaxq_sv4si): Likewise.
13325 (mve_vrmlaldavhxq_p_sv4si): Likewise.
13326 (mve_vrmlsldavhaxq_sv4si): Likewise.
13327 (mve_vrmlsldavhq_p_sv4si): Likewise.
13328 (mve_vrmlsldavhxq_p_sv4si): Likewise.
13329 (mve_vrndaq_m_f<mode>): Likewise.
13330 (mve_vrndmq_m_f<mode>): Likewise.
13331 (mve_vrndnq_m_f<mode>): Likewise.
13332 (mve_vrndpq_m_f<mode>): Likewise.
13333 (mve_vrndxq_m_f<mode>): Likewise.
13334 (mve_vrshrnbq_n_<supf><mode>): Likewise.
13335 (mve_vrshrntq_n_<supf><mode>): Likewise.
13336 (mve_vshrnbq_n_<supf><mode>): Likewise.
13337 (mve_vshrntq_n_<supf><mode>): Likewise.
13338 (mve_vcvtmq_m_<supf><mode>): Likewise.
13339 (mve_vcvtpq_m_<supf><mode>): Likewise.
13340 (mve_vcvtnq_m_<supf><mode>): Likewise.
13341 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
13342 (mve_vrev16q_m_<supf>v16qi): Likewise.
13343 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
13344 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
13345 (mve_vrmlsldavhaq_sv4si): Likewise.
13347 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13348 Mihail Ionescu <mihail.ionescu@arm.com>
13349 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13351 * config/arm/arm_mve.h (vpselq_u8): Define macro.
13352 (vpselq_s8): Likewise.
13353 (vrev64q_m_u8): Likewise.
13354 (vqrdmlashq_n_u8): Likewise.
13355 (vqrdmlahq_n_u8): Likewise.
13356 (vqdmlahq_n_u8): Likewise.
13357 (vmvnq_m_u8): Likewise.
13358 (vmlasq_n_u8): Likewise.
13359 (vmlaq_n_u8): Likewise.
13360 (vmladavq_p_u8): Likewise.
13361 (vmladavaq_u8): Likewise.
13362 (vminvq_p_u8): Likewise.
13363 (vmaxvq_p_u8): Likewise.
13364 (vdupq_m_n_u8): Likewise.
13365 (vcmpneq_m_u8): Likewise.
13366 (vcmpneq_m_n_u8): Likewise.
13367 (vcmphiq_m_u8): Likewise.
13368 (vcmphiq_m_n_u8): Likewise.
13369 (vcmpeqq_m_u8): Likewise.
13370 (vcmpeqq_m_n_u8): Likewise.
13371 (vcmpcsq_m_u8): Likewise.
13372 (vcmpcsq_m_n_u8): Likewise.
13373 (vclzq_m_u8): Likewise.
13374 (vaddvaq_p_u8): Likewise.
13375 (vsriq_n_u8): Likewise.
13376 (vsliq_n_u8): Likewise.
13377 (vshlq_m_r_u8): Likewise.
13378 (vrshlq_m_n_u8): Likewise.
13379 (vqshlq_m_r_u8): Likewise.
13380 (vqrshlq_m_n_u8): Likewise.
13381 (vminavq_p_s8): Likewise.
13382 (vminaq_m_s8): Likewise.
13383 (vmaxavq_p_s8): Likewise.
13384 (vmaxaq_m_s8): Likewise.
13385 (vcmpneq_m_s8): Likewise.
13386 (vcmpneq_m_n_s8): Likewise.
13387 (vcmpltq_m_s8): Likewise.
13388 (vcmpltq_m_n_s8): Likewise.
13389 (vcmpleq_m_s8): Likewise.
13390 (vcmpleq_m_n_s8): Likewise.
13391 (vcmpgtq_m_s8): Likewise.
13392 (vcmpgtq_m_n_s8): Likewise.
13393 (vcmpgeq_m_s8): Likewise.
13394 (vcmpgeq_m_n_s8): Likewise.
13395 (vcmpeqq_m_s8): Likewise.
13396 (vcmpeqq_m_n_s8): Likewise.
13397 (vshlq_m_r_s8): Likewise.
13398 (vrshlq_m_n_s8): Likewise.
13399 (vrev64q_m_s8): Likewise.
13400 (vqshlq_m_r_s8): Likewise.
13401 (vqrshlq_m_n_s8): Likewise.
13402 (vqnegq_m_s8): Likewise.
13403 (vqabsq_m_s8): Likewise.
13404 (vnegq_m_s8): Likewise.
13405 (vmvnq_m_s8): Likewise.
13406 (vmlsdavxq_p_s8): Likewise.
13407 (vmlsdavq_p_s8): Likewise.
13408 (vmladavxq_p_s8): Likewise.
13409 (vmladavq_p_s8): Likewise.
13410 (vminvq_p_s8): Likewise.
13411 (vmaxvq_p_s8): Likewise.
13412 (vdupq_m_n_s8): Likewise.
13413 (vclzq_m_s8): Likewise.
13414 (vclsq_m_s8): Likewise.
13415 (vaddvaq_p_s8): Likewise.
13416 (vabsq_m_s8): Likewise.
13417 (vqrdmlsdhxq_s8): Likewise.
13418 (vqrdmlsdhq_s8): Likewise.
13419 (vqrdmlashq_n_s8): Likewise.
13420 (vqrdmlahq_n_s8): Likewise.
13421 (vqrdmladhxq_s8): Likewise.
13422 (vqrdmladhq_s8): Likewise.
13423 (vqdmlsdhxq_s8): Likewise.
13424 (vqdmlsdhq_s8): Likewise.
13425 (vqdmlahq_n_s8): Likewise.
13426 (vqdmladhxq_s8): Likewise.
13427 (vqdmladhq_s8): Likewise.
13428 (vmlsdavaxq_s8): Likewise.
13429 (vmlsdavaq_s8): Likewise.
13430 (vmlasq_n_s8): Likewise.
13431 (vmlaq_n_s8): Likewise.
13432 (vmladavaxq_s8): Likewise.
13433 (vmladavaq_s8): Likewise.
13434 (vsriq_n_s8): Likewise.
13435 (vsliq_n_s8): Likewise.
13436 (vpselq_u16): Likewise.
13437 (vpselq_s16): Likewise.
13438 (vrev64q_m_u16): Likewise.
13439 (vqrdmlashq_n_u16): Likewise.
13440 (vqrdmlahq_n_u16): Likewise.
13441 (vqdmlahq_n_u16): Likewise.
13442 (vmvnq_m_u16): Likewise.
13443 (vmlasq_n_u16): Likewise.
13444 (vmlaq_n_u16): Likewise.
13445 (vmladavq_p_u16): Likewise.
13446 (vmladavaq_u16): Likewise.
13447 (vminvq_p_u16): Likewise.
13448 (vmaxvq_p_u16): Likewise.
13449 (vdupq_m_n_u16): Likewise.
13450 (vcmpneq_m_u16): Likewise.
13451 (vcmpneq_m_n_u16): Likewise.
13452 (vcmphiq_m_u16): Likewise.
13453 (vcmphiq_m_n_u16): Likewise.
13454 (vcmpeqq_m_u16): Likewise.
13455 (vcmpeqq_m_n_u16): Likewise.
13456 (vcmpcsq_m_u16): Likewise.
13457 (vcmpcsq_m_n_u16): Likewise.
13458 (vclzq_m_u16): Likewise.
13459 (vaddvaq_p_u16): Likewise.
13460 (vsriq_n_u16): Likewise.
13461 (vsliq_n_u16): Likewise.
13462 (vshlq_m_r_u16): Likewise.
13463 (vrshlq_m_n_u16): Likewise.
13464 (vqshlq_m_r_u16): Likewise.
13465 (vqrshlq_m_n_u16): Likewise.
13466 (vminavq_p_s16): Likewise.
13467 (vminaq_m_s16): Likewise.
13468 (vmaxavq_p_s16): Likewise.
13469 (vmaxaq_m_s16): Likewise.
13470 (vcmpneq_m_s16): Likewise.
13471 (vcmpneq_m_n_s16): Likewise.
13472 (vcmpltq_m_s16): Likewise.
13473 (vcmpltq_m_n_s16): Likewise.
13474 (vcmpleq_m_s16): Likewise.
13475 (vcmpleq_m_n_s16): Likewise.
13476 (vcmpgtq_m_s16): Likewise.
13477 (vcmpgtq_m_n_s16): Likewise.
13478 (vcmpgeq_m_s16): Likewise.
13479 (vcmpgeq_m_n_s16): Likewise.
13480 (vcmpeqq_m_s16): Likewise.
13481 (vcmpeqq_m_n_s16): Likewise.
13482 (vshlq_m_r_s16): Likewise.
13483 (vrshlq_m_n_s16): Likewise.
13484 (vrev64q_m_s16): Likewise.
13485 (vqshlq_m_r_s16): Likewise.
13486 (vqrshlq_m_n_s16): Likewise.
13487 (vqnegq_m_s16): Likewise.
13488 (vqabsq_m_s16): Likewise.
13489 (vnegq_m_s16): Likewise.
13490 (vmvnq_m_s16): Likewise.
13491 (vmlsdavxq_p_s16): Likewise.
13492 (vmlsdavq_p_s16): Likewise.
13493 (vmladavxq_p_s16): Likewise.
13494 (vmladavq_p_s16): Likewise.
13495 (vminvq_p_s16): Likewise.
13496 (vmaxvq_p_s16): Likewise.
13497 (vdupq_m_n_s16): Likewise.
13498 (vclzq_m_s16): Likewise.
13499 (vclsq_m_s16): Likewise.
13500 (vaddvaq_p_s16): Likewise.
13501 (vabsq_m_s16): Likewise.
13502 (vqrdmlsdhxq_s16): Likewise.
13503 (vqrdmlsdhq_s16): Likewise.
13504 (vqrdmlashq_n_s16): Likewise.
13505 (vqrdmlahq_n_s16): Likewise.
13506 (vqrdmladhxq_s16): Likewise.
13507 (vqrdmladhq_s16): Likewise.
13508 (vqdmlsdhxq_s16): Likewise.
13509 (vqdmlsdhq_s16): Likewise.
13510 (vqdmlahq_n_s16): Likewise.
13511 (vqdmladhxq_s16): Likewise.
13512 (vqdmladhq_s16): Likewise.
13513 (vmlsdavaxq_s16): Likewise.
13514 (vmlsdavaq_s16): Likewise.
13515 (vmlasq_n_s16): Likewise.
13516 (vmlaq_n_s16): Likewise.
13517 (vmladavaxq_s16): Likewise.
13518 (vmladavaq_s16): Likewise.
13519 (vsriq_n_s16): Likewise.
13520 (vsliq_n_s16): Likewise.
13521 (vpselq_u32): Likewise.
13522 (vpselq_s32): Likewise.
13523 (vrev64q_m_u32): Likewise.
13524 (vqrdmlashq_n_u32): Likewise.
13525 (vqrdmlahq_n_u32): Likewise.
13526 (vqdmlahq_n_u32): Likewise.
13527 (vmvnq_m_u32): Likewise.
13528 (vmlasq_n_u32): Likewise.
13529 (vmlaq_n_u32): Likewise.
13530 (vmladavq_p_u32): Likewise.
13531 (vmladavaq_u32): Likewise.
13532 (vminvq_p_u32): Likewise.
13533 (vmaxvq_p_u32): Likewise.
13534 (vdupq_m_n_u32): Likewise.
13535 (vcmpneq_m_u32): Likewise.
13536 (vcmpneq_m_n_u32): Likewise.
13537 (vcmphiq_m_u32): Likewise.
13538 (vcmphiq_m_n_u32): Likewise.
13539 (vcmpeqq_m_u32): Likewise.
13540 (vcmpeqq_m_n_u32): Likewise.
13541 (vcmpcsq_m_u32): Likewise.
13542 (vcmpcsq_m_n_u32): Likewise.
13543 (vclzq_m_u32): Likewise.
13544 (vaddvaq_p_u32): Likewise.
13545 (vsriq_n_u32): Likewise.
13546 (vsliq_n_u32): Likewise.
13547 (vshlq_m_r_u32): Likewise.
13548 (vrshlq_m_n_u32): Likewise.
13549 (vqshlq_m_r_u32): Likewise.
13550 (vqrshlq_m_n_u32): Likewise.
13551 (vminavq_p_s32): Likewise.
13552 (vminaq_m_s32): Likewise.
13553 (vmaxavq_p_s32): Likewise.
13554 (vmaxaq_m_s32): Likewise.
13555 (vcmpneq_m_s32): Likewise.
13556 (vcmpneq_m_n_s32): Likewise.
13557 (vcmpltq_m_s32): Likewise.
13558 (vcmpltq_m_n_s32): Likewise.
13559 (vcmpleq_m_s32): Likewise.
13560 (vcmpleq_m_n_s32): Likewise.
13561 (vcmpgtq_m_s32): Likewise.
13562 (vcmpgtq_m_n_s32): Likewise.
13563 (vcmpgeq_m_s32): Likewise.
13564 (vcmpgeq_m_n_s32): Likewise.
13565 (vcmpeqq_m_s32): Likewise.
13566 (vcmpeqq_m_n_s32): Likewise.
13567 (vshlq_m_r_s32): Likewise.
13568 (vrshlq_m_n_s32): Likewise.
13569 (vrev64q_m_s32): Likewise.
13570 (vqshlq_m_r_s32): Likewise.
13571 (vqrshlq_m_n_s32): Likewise.
13572 (vqnegq_m_s32): Likewise.
13573 (vqabsq_m_s32): Likewise.
13574 (vnegq_m_s32): Likewise.
13575 (vmvnq_m_s32): Likewise.
13576 (vmlsdavxq_p_s32): Likewise.
13577 (vmlsdavq_p_s32): Likewise.
13578 (vmladavxq_p_s32): Likewise.
13579 (vmladavq_p_s32): Likewise.
13580 (vminvq_p_s32): Likewise.
13581 (vmaxvq_p_s32): Likewise.
13582 (vdupq_m_n_s32): Likewise.
13583 (vclzq_m_s32): Likewise.
13584 (vclsq_m_s32): Likewise.
13585 (vaddvaq_p_s32): Likewise.
13586 (vabsq_m_s32): Likewise.
13587 (vqrdmlsdhxq_s32): Likewise.
13588 (vqrdmlsdhq_s32): Likewise.
13589 (vqrdmlashq_n_s32): Likewise.
13590 (vqrdmlahq_n_s32): Likewise.
13591 (vqrdmladhxq_s32): Likewise.
13592 (vqrdmladhq_s32): Likewise.
13593 (vqdmlsdhxq_s32): Likewise.
13594 (vqdmlsdhq_s32): Likewise.
13595 (vqdmlahq_n_s32): Likewise.
13596 (vqdmladhxq_s32): Likewise.
13597 (vqdmladhq_s32): Likewise.
13598 (vmlsdavaxq_s32): Likewise.
13599 (vmlsdavaq_s32): Likewise.
13600 (vmlasq_n_s32): Likewise.
13601 (vmlaq_n_s32): Likewise.
13602 (vmladavaxq_s32): Likewise.
13603 (vmladavaq_s32): Likewise.
13604 (vsriq_n_s32): Likewise.
13605 (vsliq_n_s32): Likewise.
13606 (vpselq_u64): Likewise.
13607 (vpselq_s64): Likewise.
13608 (__arm_vpselq_u8): Define intrinsic.
13609 (__arm_vpselq_s8): Likewise.
13610 (__arm_vrev64q_m_u8): Likewise.
13611 (__arm_vqrdmlashq_n_u8): Likewise.
13612 (__arm_vqrdmlahq_n_u8): Likewise.
13613 (__arm_vqdmlahq_n_u8): Likewise.
13614 (__arm_vmvnq_m_u8): Likewise.
13615 (__arm_vmlasq_n_u8): Likewise.
13616 (__arm_vmlaq_n_u8): Likewise.
13617 (__arm_vmladavq_p_u8): Likewise.
13618 (__arm_vmladavaq_u8): Likewise.
13619 (__arm_vminvq_p_u8): Likewise.
13620 (__arm_vmaxvq_p_u8): Likewise.
13621 (__arm_vdupq_m_n_u8): Likewise.
13622 (__arm_vcmpneq_m_u8): Likewise.
13623 (__arm_vcmpneq_m_n_u8): Likewise.
13624 (__arm_vcmphiq_m_u8): Likewise.
13625 (__arm_vcmphiq_m_n_u8): Likewise.
13626 (__arm_vcmpeqq_m_u8): Likewise.
13627 (__arm_vcmpeqq_m_n_u8): Likewise.
13628 (__arm_vcmpcsq_m_u8): Likewise.
13629 (__arm_vcmpcsq_m_n_u8): Likewise.
13630 (__arm_vclzq_m_u8): Likewise.
13631 (__arm_vaddvaq_p_u8): Likewise.
13632 (__arm_vsriq_n_u8): Likewise.
13633 (__arm_vsliq_n_u8): Likewise.
13634 (__arm_vshlq_m_r_u8): Likewise.
13635 (__arm_vrshlq_m_n_u8): Likewise.
13636 (__arm_vqshlq_m_r_u8): Likewise.
13637 (__arm_vqrshlq_m_n_u8): Likewise.
13638 (__arm_vminavq_p_s8): Likewise.
13639 (__arm_vminaq_m_s8): Likewise.
13640 (__arm_vmaxavq_p_s8): Likewise.
13641 (__arm_vmaxaq_m_s8): Likewise.
13642 (__arm_vcmpneq_m_s8): Likewise.
13643 (__arm_vcmpneq_m_n_s8): Likewise.
13644 (__arm_vcmpltq_m_s8): Likewise.
13645 (__arm_vcmpltq_m_n_s8): Likewise.
13646 (__arm_vcmpleq_m_s8): Likewise.
13647 (__arm_vcmpleq_m_n_s8): Likewise.
13648 (__arm_vcmpgtq_m_s8): Likewise.
13649 (__arm_vcmpgtq_m_n_s8): Likewise.
13650 (__arm_vcmpgeq_m_s8): Likewise.
13651 (__arm_vcmpgeq_m_n_s8): Likewise.
13652 (__arm_vcmpeqq_m_s8): Likewise.
13653 (__arm_vcmpeqq_m_n_s8): Likewise.
13654 (__arm_vshlq_m_r_s8): Likewise.
13655 (__arm_vrshlq_m_n_s8): Likewise.
13656 (__arm_vrev64q_m_s8): Likewise.
13657 (__arm_vqshlq_m_r_s8): Likewise.
13658 (__arm_vqrshlq_m_n_s8): Likewise.
13659 (__arm_vqnegq_m_s8): Likewise.
13660 (__arm_vqabsq_m_s8): Likewise.
13661 (__arm_vnegq_m_s8): Likewise.
13662 (__arm_vmvnq_m_s8): Likewise.
13663 (__arm_vmlsdavxq_p_s8): Likewise.
13664 (__arm_vmlsdavq_p_s8): Likewise.
13665 (__arm_vmladavxq_p_s8): Likewise.
13666 (__arm_vmladavq_p_s8): Likewise.
13667 (__arm_vminvq_p_s8): Likewise.
13668 (__arm_vmaxvq_p_s8): Likewise.
13669 (__arm_vdupq_m_n_s8): Likewise.
13670 (__arm_vclzq_m_s8): Likewise.
13671 (__arm_vclsq_m_s8): Likewise.
13672 (__arm_vaddvaq_p_s8): Likewise.
13673 (__arm_vabsq_m_s8): Likewise.
13674 (__arm_vqrdmlsdhxq_s8): Likewise.
13675 (__arm_vqrdmlsdhq_s8): Likewise.
13676 (__arm_vqrdmlashq_n_s8): Likewise.
13677 (__arm_vqrdmlahq_n_s8): Likewise.
13678 (__arm_vqrdmladhxq_s8): Likewise.
13679 (__arm_vqrdmladhq_s8): Likewise.
13680 (__arm_vqdmlsdhxq_s8): Likewise.
13681 (__arm_vqdmlsdhq_s8): Likewise.
13682 (__arm_vqdmlahq_n_s8): Likewise.
13683 (__arm_vqdmladhxq_s8): Likewise.
13684 (__arm_vqdmladhq_s8): Likewise.
13685 (__arm_vmlsdavaxq_s8): Likewise.
13686 (__arm_vmlsdavaq_s8): Likewise.
13687 (__arm_vmlasq_n_s8): Likewise.
13688 (__arm_vmlaq_n_s8): Likewise.
13689 (__arm_vmladavaxq_s8): Likewise.
13690 (__arm_vmladavaq_s8): Likewise.
13691 (__arm_vsriq_n_s8): Likewise.
13692 (__arm_vsliq_n_s8): Likewise.
13693 (__arm_vpselq_u16): Likewise.
13694 (__arm_vpselq_s16): Likewise.
13695 (__arm_vrev64q_m_u16): Likewise.
13696 (__arm_vqrdmlashq_n_u16): Likewise.
13697 (__arm_vqrdmlahq_n_u16): Likewise.
13698 (__arm_vqdmlahq_n_u16): Likewise.
13699 (__arm_vmvnq_m_u16): Likewise.
13700 (__arm_vmlasq_n_u16): Likewise.
13701 (__arm_vmlaq_n_u16): Likewise.
13702 (__arm_vmladavq_p_u16): Likewise.
13703 (__arm_vmladavaq_u16): Likewise.
13704 (__arm_vminvq_p_u16): Likewise.
13705 (__arm_vmaxvq_p_u16): Likewise.
13706 (__arm_vdupq_m_n_u16): Likewise.
13707 (__arm_vcmpneq_m_u16): Likewise.
13708 (__arm_vcmpneq_m_n_u16): Likewise.
13709 (__arm_vcmphiq_m_u16): Likewise.
13710 (__arm_vcmphiq_m_n_u16): Likewise.
13711 (__arm_vcmpeqq_m_u16): Likewise.
13712 (__arm_vcmpeqq_m_n_u16): Likewise.
13713 (__arm_vcmpcsq_m_u16): Likewise.
13714 (__arm_vcmpcsq_m_n_u16): Likewise.
13715 (__arm_vclzq_m_u16): Likewise.
13716 (__arm_vaddvaq_p_u16): Likewise.
13717 (__arm_vsriq_n_u16): Likewise.
13718 (__arm_vsliq_n_u16): Likewise.
13719 (__arm_vshlq_m_r_u16): Likewise.
13720 (__arm_vrshlq_m_n_u16): Likewise.
13721 (__arm_vqshlq_m_r_u16): Likewise.
13722 (__arm_vqrshlq_m_n_u16): Likewise.
13723 (__arm_vminavq_p_s16): Likewise.
13724 (__arm_vminaq_m_s16): Likewise.
13725 (__arm_vmaxavq_p_s16): Likewise.
13726 (__arm_vmaxaq_m_s16): Likewise.
13727 (__arm_vcmpneq_m_s16): Likewise.
13728 (__arm_vcmpneq_m_n_s16): Likewise.
13729 (__arm_vcmpltq_m_s16): Likewise.
13730 (__arm_vcmpltq_m_n_s16): Likewise.
13731 (__arm_vcmpleq_m_s16): Likewise.
13732 (__arm_vcmpleq_m_n_s16): Likewise.
13733 (__arm_vcmpgtq_m_s16): Likewise.
13734 (__arm_vcmpgtq_m_n_s16): Likewise.
13735 (__arm_vcmpgeq_m_s16): Likewise.
13736 (__arm_vcmpgeq_m_n_s16): Likewise.
13737 (__arm_vcmpeqq_m_s16): Likewise.
13738 (__arm_vcmpeqq_m_n_s16): Likewise.
13739 (__arm_vshlq_m_r_s16): Likewise.
13740 (__arm_vrshlq_m_n_s16): Likewise.
13741 (__arm_vrev64q_m_s16): Likewise.
13742 (__arm_vqshlq_m_r_s16): Likewise.
13743 (__arm_vqrshlq_m_n_s16): Likewise.
13744 (__arm_vqnegq_m_s16): Likewise.
13745 (__arm_vqabsq_m_s16): Likewise.
13746 (__arm_vnegq_m_s16): Likewise.
13747 (__arm_vmvnq_m_s16): Likewise.
13748 (__arm_vmlsdavxq_p_s16): Likewise.
13749 (__arm_vmlsdavq_p_s16): Likewise.
13750 (__arm_vmladavxq_p_s16): Likewise.
13751 (__arm_vmladavq_p_s16): Likewise.
13752 (__arm_vminvq_p_s16): Likewise.
13753 (__arm_vmaxvq_p_s16): Likewise.
13754 (__arm_vdupq_m_n_s16): Likewise.
13755 (__arm_vclzq_m_s16): Likewise.
13756 (__arm_vclsq_m_s16): Likewise.
13757 (__arm_vaddvaq_p_s16): Likewise.
13758 (__arm_vabsq_m_s16): Likewise.
13759 (__arm_vqrdmlsdhxq_s16): Likewise.
13760 (__arm_vqrdmlsdhq_s16): Likewise.
13761 (__arm_vqrdmlashq_n_s16): Likewise.
13762 (__arm_vqrdmlahq_n_s16): Likewise.
13763 (__arm_vqrdmladhxq_s16): Likewise.
13764 (__arm_vqrdmladhq_s16): Likewise.
13765 (__arm_vqdmlsdhxq_s16): Likewise.
13766 (__arm_vqdmlsdhq_s16): Likewise.
13767 (__arm_vqdmlahq_n_s16): Likewise.
13768 (__arm_vqdmladhxq_s16): Likewise.
13769 (__arm_vqdmladhq_s16): Likewise.
13770 (__arm_vmlsdavaxq_s16): Likewise.
13771 (__arm_vmlsdavaq_s16): Likewise.
13772 (__arm_vmlasq_n_s16): Likewise.
13773 (__arm_vmlaq_n_s16): Likewise.
13774 (__arm_vmladavaxq_s16): Likewise.
13775 (__arm_vmladavaq_s16): Likewise.
13776 (__arm_vsriq_n_s16): Likewise.
13777 (__arm_vsliq_n_s16): Likewise.
13778 (__arm_vpselq_u32): Likewise.
13779 (__arm_vpselq_s32): Likewise.
13780 (__arm_vrev64q_m_u32): Likewise.
13781 (__arm_vqrdmlashq_n_u32): Likewise.
13782 (__arm_vqrdmlahq_n_u32): Likewise.
13783 (__arm_vqdmlahq_n_u32): Likewise.
13784 (__arm_vmvnq_m_u32): Likewise.
13785 (__arm_vmlasq_n_u32): Likewise.
13786 (__arm_vmlaq_n_u32): Likewise.
13787 (__arm_vmladavq_p_u32): Likewise.
13788 (__arm_vmladavaq_u32): Likewise.
13789 (__arm_vminvq_p_u32): Likewise.
13790 (__arm_vmaxvq_p_u32): Likewise.
13791 (__arm_vdupq_m_n_u32): Likewise.
13792 (__arm_vcmpneq_m_u32): Likewise.
13793 (__arm_vcmpneq_m_n_u32): Likewise.
13794 (__arm_vcmphiq_m_u32): Likewise.
13795 (__arm_vcmphiq_m_n_u32): Likewise.
13796 (__arm_vcmpeqq_m_u32): Likewise.
13797 (__arm_vcmpeqq_m_n_u32): Likewise.
13798 (__arm_vcmpcsq_m_u32): Likewise.
13799 (__arm_vcmpcsq_m_n_u32): Likewise.
13800 (__arm_vclzq_m_u32): Likewise.
13801 (__arm_vaddvaq_p_u32): Likewise.
13802 (__arm_vsriq_n_u32): Likewise.
13803 (__arm_vsliq_n_u32): Likewise.
13804 (__arm_vshlq_m_r_u32): Likewise.
13805 (__arm_vrshlq_m_n_u32): Likewise.
13806 (__arm_vqshlq_m_r_u32): Likewise.
13807 (__arm_vqrshlq_m_n_u32): Likewise.
13808 (__arm_vminavq_p_s32): Likewise.
13809 (__arm_vminaq_m_s32): Likewise.
13810 (__arm_vmaxavq_p_s32): Likewise.
13811 (__arm_vmaxaq_m_s32): Likewise.
13812 (__arm_vcmpneq_m_s32): Likewise.
13813 (__arm_vcmpneq_m_n_s32): Likewise.
13814 (__arm_vcmpltq_m_s32): Likewise.
13815 (__arm_vcmpltq_m_n_s32): Likewise.
13816 (__arm_vcmpleq_m_s32): Likewise.
13817 (__arm_vcmpleq_m_n_s32): Likewise.
13818 (__arm_vcmpgtq_m_s32): Likewise.
13819 (__arm_vcmpgtq_m_n_s32): Likewise.
13820 (__arm_vcmpgeq_m_s32): Likewise.
13821 (__arm_vcmpgeq_m_n_s32): Likewise.
13822 (__arm_vcmpeqq_m_s32): Likewise.
13823 (__arm_vcmpeqq_m_n_s32): Likewise.
13824 (__arm_vshlq_m_r_s32): Likewise.
13825 (__arm_vrshlq_m_n_s32): Likewise.
13826 (__arm_vrev64q_m_s32): Likewise.
13827 (__arm_vqshlq_m_r_s32): Likewise.
13828 (__arm_vqrshlq_m_n_s32): Likewise.
13829 (__arm_vqnegq_m_s32): Likewise.
13830 (__arm_vqabsq_m_s32): Likewise.
13831 (__arm_vnegq_m_s32): Likewise.
13832 (__arm_vmvnq_m_s32): Likewise.
13833 (__arm_vmlsdavxq_p_s32): Likewise.
13834 (__arm_vmlsdavq_p_s32): Likewise.
13835 (__arm_vmladavxq_p_s32): Likewise.
13836 (__arm_vmladavq_p_s32): Likewise.
13837 (__arm_vminvq_p_s32): Likewise.
13838 (__arm_vmaxvq_p_s32): Likewise.
13839 (__arm_vdupq_m_n_s32): Likewise.
13840 (__arm_vclzq_m_s32): Likewise.
13841 (__arm_vclsq_m_s32): Likewise.
13842 (__arm_vaddvaq_p_s32): Likewise.
13843 (__arm_vabsq_m_s32): Likewise.
13844 (__arm_vqrdmlsdhxq_s32): Likewise.
13845 (__arm_vqrdmlsdhq_s32): Likewise.
13846 (__arm_vqrdmlashq_n_s32): Likewise.
13847 (__arm_vqrdmlahq_n_s32): Likewise.
13848 (__arm_vqrdmladhxq_s32): Likewise.
13849 (__arm_vqrdmladhq_s32): Likewise.
13850 (__arm_vqdmlsdhxq_s32): Likewise.
13851 (__arm_vqdmlsdhq_s32): Likewise.
13852 (__arm_vqdmlahq_n_s32): Likewise.
13853 (__arm_vqdmladhxq_s32): Likewise.
13854 (__arm_vqdmladhq_s32): Likewise.
13855 (__arm_vmlsdavaxq_s32): Likewise.
13856 (__arm_vmlsdavaq_s32): Likewise.
13857 (__arm_vmlasq_n_s32): Likewise.
13858 (__arm_vmlaq_n_s32): Likewise.
13859 (__arm_vmladavaxq_s32): Likewise.
13860 (__arm_vmladavaq_s32): Likewise.
13861 (__arm_vsriq_n_s32): Likewise.
13862 (__arm_vsliq_n_s32): Likewise.
13863 (__arm_vpselq_u64): Likewise.
13864 (__arm_vpselq_s64): Likewise.
13865 (vcmpneq_m_n): Define polymorphic variant.
13866 (vcmpneq_m): Likewise.
13867 (vqrdmlsdhq): Likewise.
13868 (vqrdmlsdhxq): Likewise.
13869 (vqrshlq_m_n): Likewise.
13870 (vqshlq_m_r): Likewise.
13871 (vrev64q_m): Likewise.
13872 (vrshlq_m_n): Likewise.
13873 (vshlq_m_r): Likewise.
13874 (vsliq_n): Likewise.
13875 (vsriq_n): Likewise.
13876 (vqrdmlashq_n): Likewise.
13877 (vqrdmlahq): Likewise.
13878 (vqrdmladhxq): Likewise.
13879 (vqrdmladhq): Likewise.
13880 (vqnegq_m): Likewise.
13881 (vqdmlsdhxq): Likewise.
13882 (vabsq_m): Likewise.
13883 (vclsq_m): Likewise.
13884 (vclzq_m): Likewise.
13885 (vcmpgeq_m): Likewise.
13886 (vcmpgeq_m_n): Likewise.
13887 (vdupq_m_n): Likewise.
13888 (vmaxaq_m): Likewise.
13889 (vmlaq_n): Likewise.
13890 (vmlasq_n): Likewise.
13891 (vmvnq_m): Likewise.
13892 (vnegq_m): Likewise.
13893 (vpselq): Likewise.
13894 (vqdmlahq_n): Likewise.
13895 (vqrdmlahq_n): Likewise.
13896 (vqdmlsdhq): Likewise.
13897 (vqdmladhq): Likewise.
13898 (vqabsq_m): Likewise.
13899 (vminaq_m): Likewise.
13900 (vrmlaldavhaq): Likewise.
13901 (vmlsdavxq_p): Likewise.
13902 (vmlsdavq_p): Likewise.
13903 (vmlsdavaxq): Likewise.
13904 (vmlsdavaq): Likewise.
13905 (vaddvaq_p): Likewise.
13906 (vcmpcsq_m_n): Likewise.
13907 (vcmpcsq_m): Likewise.
13908 (vcmpeqq_m_n): Likewise.
13909 (vcmpeqq_m): Likewise.
13910 (vmladavxq_p): Likewise.
13911 (vmladavq_p): Likewise.
13912 (vmladavaxq): Likewise.
13913 (vmladavaq): Likewise.
13914 (vminvq_p): Likewise.
13915 (vminavq_p): Likewise.
13916 (vmaxvq_p): Likewise.
13917 (vmaxavq_p): Likewise.
13918 (vcmpltq_m_n): Likewise.
13919 (vcmpltq_m): Likewise.
13920 (vcmpleq_m): Likewise.
13921 (vcmpleq_m_n): Likewise.
13922 (vcmphiq_m_n): Likewise.
13923 (vcmphiq_m): Likewise.
13924 (vcmpgtq_m_n): Likewise.
13925 (vcmpgtq_m): Likewise.
13926 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
13928 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
13929 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
13930 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
13931 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
13932 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
13933 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
13934 * config/arm/constraints.md (Rc): Define constraint to check constant is
13935 in the range of 0 to 15.
13936 (Re): Define constraint to check constant is in the range of 0 to 31.
13937 * config/arm/mve.md (VADDVAQ_P): Define iterator.
13938 (VCLZQ_M): Likewise.
13939 (VCMPEQQ_M_N): Likewise.
13940 (VCMPEQQ_M): Likewise.
13941 (VCMPNEQ_M_N): Likewise.
13942 (VCMPNEQ_M): Likewise.
13943 (VDUPQ_M_N): Likewise.
13944 (VMAXVQ_P): Likewise.
13945 (VMINVQ_P): Likewise.
13946 (VMLADAVAQ): Likewise.
13947 (VMLADAVQ_P): Likewise.
13948 (VMLAQ_N): Likewise.
13949 (VMLASQ_N): Likewise.
13950 (VMVNQ_M): Likewise.
13951 (VPSELQ): Likewise.
13952 (VQDMLAHQ_N): Likewise.
13953 (VQRDMLAHQ_N): Likewise.
13954 (VQRDMLASHQ_N): Likewise.
13955 (VQRSHLQ_M_N): Likewise.
13956 (VQSHLQ_M_R): Likewise.
13957 (VREV64Q_M): Likewise.
13958 (VRSHLQ_M_N): Likewise.
13959 (VSHLQ_M_R): Likewise.
13960 (VSLIQ_N): Likewise.
13961 (VSRIQ_N): Likewise.
13962 (mve_vabsq_m_s<mode>): Define RTL pattern.
13963 (mve_vaddvaq_p_<supf><mode>): Likewise.
13964 (mve_vclsq_m_s<mode>): Likewise.
13965 (mve_vclzq_m_<supf><mode>): Likewise.
13966 (mve_vcmpcsq_m_n_u<mode>): Likewise.
13967 (mve_vcmpcsq_m_u<mode>): Likewise.
13968 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
13969 (mve_vcmpeqq_m_<supf><mode>): Likewise.
13970 (mve_vcmpgeq_m_n_s<mode>): Likewise.
13971 (mve_vcmpgeq_m_s<mode>): Likewise.
13972 (mve_vcmpgtq_m_n_s<mode>): Likewise.
13973 (mve_vcmpgtq_m_s<mode>): Likewise.
13974 (mve_vcmphiq_m_n_u<mode>): Likewise.
13975 (mve_vcmphiq_m_u<mode>): Likewise.
13976 (mve_vcmpleq_m_n_s<mode>): Likewise.
13977 (mve_vcmpleq_m_s<mode>): Likewise.
13978 (mve_vcmpltq_m_n_s<mode>): Likewise.
13979 (mve_vcmpltq_m_s<mode>): Likewise.
13980 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
13981 (mve_vcmpneq_m_<supf><mode>): Likewise.
13982 (mve_vdupq_m_n_<supf><mode>): Likewise.
13983 (mve_vmaxaq_m_s<mode>): Likewise.
13984 (mve_vmaxavq_p_s<mode>): Likewise.
13985 (mve_vmaxvq_p_<supf><mode>): Likewise.
13986 (mve_vminaq_m_s<mode>): Likewise.
13987 (mve_vminavq_p_s<mode>): Likewise.
13988 (mve_vminvq_p_<supf><mode>): Likewise.
13989 (mve_vmladavaq_<supf><mode>): Likewise.
13990 (mve_vmladavq_p_<supf><mode>): Likewise.
13991 (mve_vmladavxq_p_s<mode>): Likewise.
13992 (mve_vmlaq_n_<supf><mode>): Likewise.
13993 (mve_vmlasq_n_<supf><mode>): Likewise.
13994 (mve_vmlsdavq_p_s<mode>): Likewise.
13995 (mve_vmlsdavxq_p_s<mode>): Likewise.
13996 (mve_vmvnq_m_<supf><mode>): Likewise.
13997 (mve_vnegq_m_s<mode>): Likewise.
13998 (mve_vpselq_<supf><mode>): Likewise.
13999 (mve_vqabsq_m_s<mode>): Likewise.
14000 (mve_vqdmlahq_n_<supf><mode>): Likewise.
14001 (mve_vqnegq_m_s<mode>): Likewise.
14002 (mve_vqrdmladhq_s<mode>): Likewise.
14003 (mve_vqrdmladhxq_s<mode>): Likewise.
14004 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
14005 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
14006 (mve_vqrdmlsdhq_s<mode>): Likewise.
14007 (mve_vqrdmlsdhxq_s<mode>): Likewise.
14008 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
14009 (mve_vqshlq_m_r_<supf><mode>): Likewise.
14010 (mve_vrev64q_m_<supf><mode>): Likewise.
14011 (mve_vrshlq_m_n_<supf><mode>): Likewise.
14012 (mve_vshlq_m_r_<supf><mode>): Likewise.
14013 (mve_vsliq_n_<supf><mode>): Likewise.
14014 (mve_vsriq_n_<supf><mode>): Likewise.
14015 (mve_vqdmlsdhxq_s<mode>): Likewise.
14016 (mve_vqdmlsdhq_s<mode>): Likewise.
14017 (mve_vqdmladhxq_s<mode>): Likewise.
14018 (mve_vqdmladhq_s<mode>): Likewise.
14019 (mve_vmlsdavaxq_s<mode>): Likewise.
14020 (mve_vmlsdavaq_s<mode>): Likewise.
14021 (mve_vmladavaxq_s<mode>): Likewise.
14022 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
14023 matching constraint Rc.
14024 (mve_imm_31): Define predicate to check the matching constraint Re.
14026 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
14028 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
14029 (vec_cmp<mode>di_dup): Likewise.
14030 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
14032 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
14034 * config/gcn/gcn-valu.md (COND_MODE): Delete.
14035 (COND_INT_MODE): Delete.
14036 (cond_op): Add "mult".
14037 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
14038 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
14040 2020-03-18 Richard Biener <rguenther@suse.de>
14042 PR middle-end/94206
14043 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
14044 partial int modes or not mode-precision integer types for
14047 2020-03-18 Jakub Jelinek <jakub@redhat.com>
14049 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
14051 * config/arc/arc.c (frame_stack_add): Likewise.
14052 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
14054 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
14055 * tree-ssa-strlen.h (handle_printf_call): Likewise.
14056 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
14057 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
14059 2020-03-18 Duan bo <duanbo3@huawei.com>
14062 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
14063 (@ldr_got_tiny_<mode>): New pattern.
14064 (ldr_got_tiny_sidi): Likewise.
14065 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
14066 them to handle SYMBOL_TINY_GOT for ILP32.
14068 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
14070 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
14071 call-preserved for SVE PCS functions.
14072 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
14073 Optimize the case in which there are no following vector save slots.
14075 2020-03-18 Richard Biener <rguenther@suse.de>
14077 PR middle-end/94188
14078 * fold-const.c (build_fold_addr_expr): Convert address to
14080 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
14081 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
14082 to build the ADDR_EXPR which we don't really want to simplify.
14083 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
14084 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
14085 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
14086 (simplify_builtin_call): Strip useless type conversions.
14087 * tree-ssa-strlen.c (new_strinfo): Likewise.
14089 2020-03-17 Alexey Neyman <stilor@att.net>
14092 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
14093 the debug level is terse and the declaration is public. Do not
14094 generate type info.
14095 (dwarf2out_decl): Same.
14096 (add_type_attribute): Return immediately if debug level is
14099 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
14101 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
14103 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14104 Mihail Ionescu <mihail.ionescu@arm.com>
14105 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14107 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
14108 Define qualifier for ternary operands.
14109 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
14110 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14111 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14112 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
14113 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
14114 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14115 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14116 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
14117 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14118 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14119 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
14120 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14121 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
14122 * config/arm/arm_mve.h (vabavq_s8): Define macro.
14123 (vabavq_s16): Likewise.
14124 (vabavq_s32): Likewise.
14125 (vbicq_m_n_s16): Likewise.
14126 (vbicq_m_n_s32): Likewise.
14127 (vbicq_m_n_u16): Likewise.
14128 (vbicq_m_n_u32): Likewise.
14129 (vcmpeqq_m_f16): Likewise.
14130 (vcmpeqq_m_f32): Likewise.
14131 (vcvtaq_m_s16_f16): Likewise.
14132 (vcvtaq_m_u16_f16): Likewise.
14133 (vcvtaq_m_s32_f32): Likewise.
14134 (vcvtaq_m_u32_f32): Likewise.
14135 (vcvtq_m_f16_s16): Likewise.
14136 (vcvtq_m_f16_u16): Likewise.
14137 (vcvtq_m_f32_s32): Likewise.
14138 (vcvtq_m_f32_u32): Likewise.
14139 (vqrshrnbq_n_s16): Likewise.
14140 (vqrshrnbq_n_u16): Likewise.
14141 (vqrshrnbq_n_s32): Likewise.
14142 (vqrshrnbq_n_u32): Likewise.
14143 (vqrshrunbq_n_s16): Likewise.
14144 (vqrshrunbq_n_s32): Likewise.
14145 (vrmlaldavhaq_s32): Likewise.
14146 (vrmlaldavhaq_u32): Likewise.
14147 (vshlcq_s8): Likewise.
14148 (vshlcq_u8): Likewise.
14149 (vshlcq_s16): Likewise.
14150 (vshlcq_u16): Likewise.
14151 (vshlcq_s32): Likewise.
14152 (vshlcq_u32): Likewise.
14153 (vabavq_u8): Likewise.
14154 (vabavq_u16): Likewise.
14155 (vabavq_u32): Likewise.
14156 (__arm_vabavq_s8): Define intrinsic.
14157 (__arm_vabavq_s16): Likewise.
14158 (__arm_vabavq_s32): Likewise.
14159 (__arm_vabavq_u8): Likewise.
14160 (__arm_vabavq_u16): Likewise.
14161 (__arm_vabavq_u32): Likewise.
14162 (__arm_vbicq_m_n_s16): Likewise.
14163 (__arm_vbicq_m_n_s32): Likewise.
14164 (__arm_vbicq_m_n_u16): Likewise.
14165 (__arm_vbicq_m_n_u32): Likewise.
14166 (__arm_vqrshrnbq_n_s16): Likewise.
14167 (__arm_vqrshrnbq_n_u16): Likewise.
14168 (__arm_vqrshrnbq_n_s32): Likewise.
14169 (__arm_vqrshrnbq_n_u32): Likewise.
14170 (__arm_vqrshrunbq_n_s16): Likewise.
14171 (__arm_vqrshrunbq_n_s32): Likewise.
14172 (__arm_vrmlaldavhaq_s32): Likewise.
14173 (__arm_vrmlaldavhaq_u32): Likewise.
14174 (__arm_vshlcq_s8): Likewise.
14175 (__arm_vshlcq_u8): Likewise.
14176 (__arm_vshlcq_s16): Likewise.
14177 (__arm_vshlcq_u16): Likewise.
14178 (__arm_vshlcq_s32): Likewise.
14179 (__arm_vshlcq_u32): Likewise.
14180 (__arm_vcmpeqq_m_f16): Likewise.
14181 (__arm_vcmpeqq_m_f32): Likewise.
14182 (__arm_vcvtaq_m_s16_f16): Likewise.
14183 (__arm_vcvtaq_m_u16_f16): Likewise.
14184 (__arm_vcvtaq_m_s32_f32): Likewise.
14185 (__arm_vcvtaq_m_u32_f32): Likewise.
14186 (__arm_vcvtq_m_f16_s16): Likewise.
14187 (__arm_vcvtq_m_f16_u16): Likewise.
14188 (__arm_vcvtq_m_f32_s32): Likewise.
14189 (__arm_vcvtq_m_f32_u32): Likewise.
14190 (vcvtaq_m): Define polymorphic variant.
14191 (vcvtq_m): Likewise.
14192 (vabavq): Likewise.
14193 (vshlcq): Likewise.
14194 (vbicq_m_n): Likewise.
14195 (vqrshrnbq_n): Likewise.
14196 (vqrshrunbq_n): Likewise.
14197 * config/arm/arm_mve_builtins.def
14198 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
14199 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
14200 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14201 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14202 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
14203 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
14204 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14205 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14206 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
14207 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14208 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14209 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
14210 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14211 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
14212 * config/arm/mve.md (VBICQ_M_N): Define iterator.
14213 (VCVTAQ_M): Likewise.
14214 (VCVTQ_M_TO_F): Likewise.
14215 (VQRSHRNBQ_N): Likewise.
14216 (VABAVQ): Likewise.
14217 (VSHLCQ): Likewise.
14218 (VRMLALDAVHAQ): Likewise.
14219 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
14220 (mve_vcmpeqq_m_f<mode>): Likewise.
14221 (mve_vcvtaq_m_<supf><mode>): Likewise.
14222 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
14223 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
14224 (mve_vqrshrunbq_n_s<mode>): Likewise.
14225 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
14226 (mve_vabavq_<supf><mode>): Likewise.
14227 (mve_vshlcq_<supf><mode>): Likewise.
14228 (mve_vshlcq_<supf><mode>): Likewise.
14229 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
14230 (mve_vshlcq_carry_<supf><mode>): Likewise.
14232 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14233 Mihail Ionescu <mihail.ionescu@arm.com>
14234 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14236 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
14237 (vqmovnbq_u16): Likewise.
14238 (vmulltq_poly_p8): Likewise.
14239 (vmullbq_poly_p8): Likewise.
14240 (vmovntq_u16): Likewise.
14241 (vmovnbq_u16): Likewise.
14242 (vmlaldavxq_u16): Likewise.
14243 (vmlaldavq_u16): Likewise.
14244 (vqmovuntq_s16): Likewise.
14245 (vqmovunbq_s16): Likewise.
14246 (vshlltq_n_u8): Likewise.
14247 (vshllbq_n_u8): Likewise.
14248 (vorrq_n_u16): Likewise.
14249 (vbicq_n_u16): Likewise.
14250 (vcmpneq_n_f16): Likewise.
14251 (vcmpneq_f16): Likewise.
14252 (vcmpltq_n_f16): Likewise.
14253 (vcmpltq_f16): Likewise.
14254 (vcmpleq_n_f16): Likewise.
14255 (vcmpleq_f16): Likewise.
14256 (vcmpgtq_n_f16): Likewise.
14257 (vcmpgtq_f16): Likewise.
14258 (vcmpgeq_n_f16): Likewise.
14259 (vcmpgeq_f16): Likewise.
14260 (vcmpeqq_n_f16): Likewise.
14261 (vcmpeqq_f16): Likewise.
14262 (vsubq_f16): Likewise.
14263 (vqmovntq_s16): Likewise.
14264 (vqmovnbq_s16): Likewise.
14265 (vqdmulltq_s16): Likewise.
14266 (vqdmulltq_n_s16): Likewise.
14267 (vqdmullbq_s16): Likewise.
14268 (vqdmullbq_n_s16): Likewise.
14269 (vorrq_f16): Likewise.
14270 (vornq_f16): Likewise.
14271 (vmulq_n_f16): Likewise.
14272 (vmulq_f16): Likewise.
14273 (vmovntq_s16): Likewise.
14274 (vmovnbq_s16): Likewise.
14275 (vmlsldavxq_s16): Likewise.
14276 (vmlsldavq_s16): Likewise.
14277 (vmlaldavxq_s16): Likewise.
14278 (vmlaldavq_s16): Likewise.
14279 (vminnmvq_f16): Likewise.
14280 (vminnmq_f16): Likewise.
14281 (vminnmavq_f16): Likewise.
14282 (vminnmaq_f16): Likewise.
14283 (vmaxnmvq_f16): Likewise.
14284 (vmaxnmq_f16): Likewise.
14285 (vmaxnmavq_f16): Likewise.
14286 (vmaxnmaq_f16): Likewise.
14287 (veorq_f16): Likewise.
14288 (vcmulq_rot90_f16): Likewise.
14289 (vcmulq_rot270_f16): Likewise.
14290 (vcmulq_rot180_f16): Likewise.
14291 (vcmulq_f16): Likewise.
14292 (vcaddq_rot90_f16): Likewise.
14293 (vcaddq_rot270_f16): Likewise.
14294 (vbicq_f16): Likewise.
14295 (vandq_f16): Likewise.
14296 (vaddq_n_f16): Likewise.
14297 (vabdq_f16): Likewise.
14298 (vshlltq_n_s8): Likewise.
14299 (vshllbq_n_s8): Likewise.
14300 (vorrq_n_s16): Likewise.
14301 (vbicq_n_s16): Likewise.
14302 (vqmovntq_u32): Likewise.
14303 (vqmovnbq_u32): Likewise.
14304 (vmulltq_poly_p16): Likewise.
14305 (vmullbq_poly_p16): Likewise.
14306 (vmovntq_u32): Likewise.
14307 (vmovnbq_u32): Likewise.
14308 (vmlaldavxq_u32): Likewise.
14309 (vmlaldavq_u32): Likewise.
14310 (vqmovuntq_s32): Likewise.
14311 (vqmovunbq_s32): Likewise.
14312 (vshlltq_n_u16): Likewise.
14313 (vshllbq_n_u16): Likewise.
14314 (vorrq_n_u32): Likewise.
14315 (vbicq_n_u32): Likewise.
14316 (vcmpneq_n_f32): Likewise.
14317 (vcmpneq_f32): Likewise.
14318 (vcmpltq_n_f32): Likewise.
14319 (vcmpltq_f32): Likewise.
14320 (vcmpleq_n_f32): Likewise.
14321 (vcmpleq_f32): Likewise.
14322 (vcmpgtq_n_f32): Likewise.
14323 (vcmpgtq_f32): Likewise.
14324 (vcmpgeq_n_f32): Likewise.
14325 (vcmpgeq_f32): Likewise.
14326 (vcmpeqq_n_f32): Likewise.
14327 (vcmpeqq_f32): Likewise.
14328 (vsubq_f32): Likewise.
14329 (vqmovntq_s32): Likewise.
14330 (vqmovnbq_s32): Likewise.
14331 (vqdmulltq_s32): Likewise.
14332 (vqdmulltq_n_s32): Likewise.
14333 (vqdmullbq_s32): Likewise.
14334 (vqdmullbq_n_s32): Likewise.
14335 (vorrq_f32): Likewise.
14336 (vornq_f32): Likewise.
14337 (vmulq_n_f32): Likewise.
14338 (vmulq_f32): Likewise.
14339 (vmovntq_s32): Likewise.
14340 (vmovnbq_s32): Likewise.
14341 (vmlsldavxq_s32): Likewise.
14342 (vmlsldavq_s32): Likewise.
14343 (vmlaldavxq_s32): Likewise.
14344 (vmlaldavq_s32): Likewise.
14345 (vminnmvq_f32): Likewise.
14346 (vminnmq_f32): Likewise.
14347 (vminnmavq_f32): Likewise.
14348 (vminnmaq_f32): Likewise.
14349 (vmaxnmvq_f32): Likewise.
14350 (vmaxnmq_f32): Likewise.
14351 (vmaxnmavq_f32): Likewise.
14352 (vmaxnmaq_f32): Likewise.
14353 (veorq_f32): Likewise.
14354 (vcmulq_rot90_f32): Likewise.
14355 (vcmulq_rot270_f32): Likewise.
14356 (vcmulq_rot180_f32): Likewise.
14357 (vcmulq_f32): Likewise.
14358 (vcaddq_rot90_f32): Likewise.
14359 (vcaddq_rot270_f32): Likewise.
14360 (vbicq_f32): Likewise.
14361 (vandq_f32): Likewise.
14362 (vaddq_n_f32): Likewise.
14363 (vabdq_f32): Likewise.
14364 (vshlltq_n_s16): Likewise.
14365 (vshllbq_n_s16): Likewise.
14366 (vorrq_n_s32): Likewise.
14367 (vbicq_n_s32): Likewise.
14368 (vrmlaldavhq_u32): Likewise.
14369 (vctp8q_m): Likewise.
14370 (vctp64q_m): Likewise.
14371 (vctp32q_m): Likewise.
14372 (vctp16q_m): Likewise.
14373 (vaddlvaq_u32): Likewise.
14374 (vrmlsldavhxq_s32): Likewise.
14375 (vrmlsldavhq_s32): Likewise.
14376 (vrmlaldavhxq_s32): Likewise.
14377 (vrmlaldavhq_s32): Likewise.
14378 (vcvttq_f16_f32): Likewise.
14379 (vcvtbq_f16_f32): Likewise.
14380 (vaddlvaq_s32): Likewise.
14381 (__arm_vqmovntq_u16): Define intrinsic.
14382 (__arm_vqmovnbq_u16): Likewise.
14383 (__arm_vmulltq_poly_p8): Likewise.
14384 (__arm_vmullbq_poly_p8): Likewise.
14385 (__arm_vmovntq_u16): Likewise.
14386 (__arm_vmovnbq_u16): Likewise.
14387 (__arm_vmlaldavxq_u16): Likewise.
14388 (__arm_vmlaldavq_u16): Likewise.
14389 (__arm_vqmovuntq_s16): Likewise.
14390 (__arm_vqmovunbq_s16): Likewise.
14391 (__arm_vshlltq_n_u8): Likewise.
14392 (__arm_vshllbq_n_u8): Likewise.
14393 (__arm_vorrq_n_u16): Likewise.
14394 (__arm_vbicq_n_u16): Likewise.
14395 (__arm_vcmpneq_n_f16): Likewise.
14396 (__arm_vcmpneq_f16): Likewise.
14397 (__arm_vcmpltq_n_f16): Likewise.
14398 (__arm_vcmpltq_f16): Likewise.
14399 (__arm_vcmpleq_n_f16): Likewise.
14400 (__arm_vcmpleq_f16): Likewise.
14401 (__arm_vcmpgtq_n_f16): Likewise.
14402 (__arm_vcmpgtq_f16): Likewise.
14403 (__arm_vcmpgeq_n_f16): Likewise.
14404 (__arm_vcmpgeq_f16): Likewise.
14405 (__arm_vcmpeqq_n_f16): Likewise.
14406 (__arm_vcmpeqq_f16): Likewise.
14407 (__arm_vsubq_f16): Likewise.
14408 (__arm_vqmovntq_s16): Likewise.
14409 (__arm_vqmovnbq_s16): Likewise.
14410 (__arm_vqdmulltq_s16): Likewise.
14411 (__arm_vqdmulltq_n_s16): Likewise.
14412 (__arm_vqdmullbq_s16): Likewise.
14413 (__arm_vqdmullbq_n_s16): Likewise.
14414 (__arm_vorrq_f16): Likewise.
14415 (__arm_vornq_f16): Likewise.
14416 (__arm_vmulq_n_f16): Likewise.
14417 (__arm_vmulq_f16): Likewise.
14418 (__arm_vmovntq_s16): Likewise.
14419 (__arm_vmovnbq_s16): Likewise.
14420 (__arm_vmlsldavxq_s16): Likewise.
14421 (__arm_vmlsldavq_s16): Likewise.
14422 (__arm_vmlaldavxq_s16): Likewise.
14423 (__arm_vmlaldavq_s16): Likewise.
14424 (__arm_vminnmvq_f16): Likewise.
14425 (__arm_vminnmq_f16): Likewise.
14426 (__arm_vminnmavq_f16): Likewise.
14427 (__arm_vminnmaq_f16): Likewise.
14428 (__arm_vmaxnmvq_f16): Likewise.
14429 (__arm_vmaxnmq_f16): Likewise.
14430 (__arm_vmaxnmavq_f16): Likewise.
14431 (__arm_vmaxnmaq_f16): Likewise.
14432 (__arm_veorq_f16): Likewise.
14433 (__arm_vcmulq_rot90_f16): Likewise.
14434 (__arm_vcmulq_rot270_f16): Likewise.
14435 (__arm_vcmulq_rot180_f16): Likewise.
14436 (__arm_vcmulq_f16): Likewise.
14437 (__arm_vcaddq_rot90_f16): Likewise.
14438 (__arm_vcaddq_rot270_f16): Likewise.
14439 (__arm_vbicq_f16): Likewise.
14440 (__arm_vandq_f16): Likewise.
14441 (__arm_vaddq_n_f16): Likewise.
14442 (__arm_vabdq_f16): Likewise.
14443 (__arm_vshlltq_n_s8): Likewise.
14444 (__arm_vshllbq_n_s8): Likewise.
14445 (__arm_vorrq_n_s16): Likewise.
14446 (__arm_vbicq_n_s16): Likewise.
14447 (__arm_vqmovntq_u32): Likewise.
14448 (__arm_vqmovnbq_u32): Likewise.
14449 (__arm_vmulltq_poly_p16): Likewise.
14450 (__arm_vmullbq_poly_p16): Likewise.
14451 (__arm_vmovntq_u32): Likewise.
14452 (__arm_vmovnbq_u32): Likewise.
14453 (__arm_vmlaldavxq_u32): Likewise.
14454 (__arm_vmlaldavq_u32): Likewise.
14455 (__arm_vqmovuntq_s32): Likewise.
14456 (__arm_vqmovunbq_s32): Likewise.
14457 (__arm_vshlltq_n_u16): Likewise.
14458 (__arm_vshllbq_n_u16): Likewise.
14459 (__arm_vorrq_n_u32): Likewise.
14460 (__arm_vbicq_n_u32): Likewise.
14461 (__arm_vcmpneq_n_f32): Likewise.
14462 (__arm_vcmpneq_f32): Likewise.
14463 (__arm_vcmpltq_n_f32): Likewise.
14464 (__arm_vcmpltq_f32): Likewise.
14465 (__arm_vcmpleq_n_f32): Likewise.
14466 (__arm_vcmpleq_f32): Likewise.
14467 (__arm_vcmpgtq_n_f32): Likewise.
14468 (__arm_vcmpgtq_f32): Likewise.
14469 (__arm_vcmpgeq_n_f32): Likewise.
14470 (__arm_vcmpgeq_f32): Likewise.
14471 (__arm_vcmpeqq_n_f32): Likewise.
14472 (__arm_vcmpeqq_f32): Likewise.
14473 (__arm_vsubq_f32): Likewise.
14474 (__arm_vqmovntq_s32): Likewise.
14475 (__arm_vqmovnbq_s32): Likewise.
14476 (__arm_vqdmulltq_s32): Likewise.
14477 (__arm_vqdmulltq_n_s32): Likewise.
14478 (__arm_vqdmullbq_s32): Likewise.
14479 (__arm_vqdmullbq_n_s32): Likewise.
14480 (__arm_vorrq_f32): Likewise.
14481 (__arm_vornq_f32): Likewise.
14482 (__arm_vmulq_n_f32): Likewise.
14483 (__arm_vmulq_f32): Likewise.
14484 (__arm_vmovntq_s32): Likewise.
14485 (__arm_vmovnbq_s32): Likewise.
14486 (__arm_vmlsldavxq_s32): Likewise.
14487 (__arm_vmlsldavq_s32): Likewise.
14488 (__arm_vmlaldavxq_s32): Likewise.
14489 (__arm_vmlaldavq_s32): Likewise.
14490 (__arm_vminnmvq_f32): Likewise.
14491 (__arm_vminnmq_f32): Likewise.
14492 (__arm_vminnmavq_f32): Likewise.
14493 (__arm_vminnmaq_f32): Likewise.
14494 (__arm_vmaxnmvq_f32): Likewise.
14495 (__arm_vmaxnmq_f32): Likewise.
14496 (__arm_vmaxnmavq_f32): Likewise.
14497 (__arm_vmaxnmaq_f32): Likewise.
14498 (__arm_veorq_f32): Likewise.
14499 (__arm_vcmulq_rot90_f32): Likewise.
14500 (__arm_vcmulq_rot270_f32): Likewise.
14501 (__arm_vcmulq_rot180_f32): Likewise.
14502 (__arm_vcmulq_f32): Likewise.
14503 (__arm_vcaddq_rot90_f32): Likewise.
14504 (__arm_vcaddq_rot270_f32): Likewise.
14505 (__arm_vbicq_f32): Likewise.
14506 (__arm_vandq_f32): Likewise.
14507 (__arm_vaddq_n_f32): Likewise.
14508 (__arm_vabdq_f32): Likewise.
14509 (__arm_vshlltq_n_s16): Likewise.
14510 (__arm_vshllbq_n_s16): Likewise.
14511 (__arm_vorrq_n_s32): Likewise.
14512 (__arm_vbicq_n_s32): Likewise.
14513 (__arm_vrmlaldavhq_u32): Likewise.
14514 (__arm_vctp8q_m): Likewise.
14515 (__arm_vctp64q_m): Likewise.
14516 (__arm_vctp32q_m): Likewise.
14517 (__arm_vctp16q_m): Likewise.
14518 (__arm_vaddlvaq_u32): Likewise.
14519 (__arm_vrmlsldavhxq_s32): Likewise.
14520 (__arm_vrmlsldavhq_s32): Likewise.
14521 (__arm_vrmlaldavhxq_s32): Likewise.
14522 (__arm_vrmlaldavhq_s32): Likewise.
14523 (__arm_vcvttq_f16_f32): Likewise.
14524 (__arm_vcvtbq_f16_f32): Likewise.
14525 (__arm_vaddlvaq_s32): Likewise.
14526 (vst4q): Define polymorphic variant.
14527 (vrndxq): Likewise.
14529 (vrndpq): Likewise.
14530 (vrndnq): Likewise.
14531 (vrndmq): Likewise.
14532 (vrndaq): Likewise.
14533 (vrev64q): Likewise.
14535 (vdupq_n): Likewise.
14537 (vrev32q): Likewise.
14538 (vcvtbq_f32): Likewise.
14539 (vcvttq_f32): Likewise.
14541 (vsubq_n): Likewise.
14542 (vbrsrq_n): Likewise.
14543 (vcvtq_n): Likewise.
14547 (vaddq_n): Likewise.
14551 (vmulq_n): Likewise.
14553 (vcaddq_rot270): Likewise.
14554 (vcmpeqq_n): Likewise.
14555 (vcmpeqq): Likewise.
14556 (vcaddq_rot90): Likewise.
14557 (vcmpgeq_n): Likewise.
14558 (vcmpgeq): Likewise.
14559 (vcmpgtq_n): Likewise.
14560 (vcmpgtq): Likewise.
14561 (vcmpgtq): Likewise.
14562 (vcmpleq_n): Likewise.
14563 (vcmpleq_n): Likewise.
14564 (vcmpleq): Likewise.
14565 (vcmpleq): Likewise.
14566 (vcmpltq_n): Likewise.
14567 (vcmpltq_n): Likewise.
14568 (vcmpltq): Likewise.
14569 (vcmpltq): Likewise.
14570 (vcmpneq_n): Likewise.
14571 (vcmpneq_n): Likewise.
14572 (vcmpneq): Likewise.
14573 (vcmpneq): Likewise.
14574 (vcmulq): Likewise.
14575 (vcmulq): Likewise.
14576 (vcmulq_rot180): Likewise.
14577 (vcmulq_rot180): Likewise.
14578 (vcmulq_rot270): Likewise.
14579 (vcmulq_rot270): Likewise.
14580 (vcmulq_rot90): Likewise.
14581 (vcmulq_rot90): Likewise.
14584 (vmaxnmaq): Likewise.
14585 (vmaxnmaq): Likewise.
14586 (vmaxnmavq): Likewise.
14587 (vmaxnmavq): Likewise.
14588 (vmaxnmq): Likewise.
14589 (vmaxnmq): Likewise.
14590 (vmaxnmvq): Likewise.
14591 (vmaxnmvq): Likewise.
14592 (vminnmaq): Likewise.
14593 (vminnmaq): Likewise.
14594 (vminnmavq): Likewise.
14595 (vminnmavq): Likewise.
14596 (vminnmq): Likewise.
14597 (vminnmq): Likewise.
14598 (vminnmvq): Likewise.
14599 (vminnmvq): Likewise.
14600 (vbicq_n): Likewise.
14601 (vqmovntq): Likewise.
14602 (vqmovntq): Likewise.
14603 (vqmovnbq): Likewise.
14604 (vqmovnbq): Likewise.
14605 (vmulltq_poly): Likewise.
14606 (vmulltq_poly): Likewise.
14607 (vmullbq_poly): Likewise.
14608 (vmullbq_poly): Likewise.
14609 (vmovntq): Likewise.
14610 (vmovntq): Likewise.
14611 (vmovnbq): Likewise.
14612 (vmovnbq): Likewise.
14613 (vmlaldavxq): Likewise.
14614 (vmlaldavxq): Likewise.
14615 (vqmovuntq): Likewise.
14616 (vqmovuntq): Likewise.
14617 (vshlltq_n): Likewise.
14618 (vshlltq_n): Likewise.
14619 (vshllbq_n): Likewise.
14620 (vshllbq_n): Likewise.
14621 (vorrq_n): Likewise.
14622 (vorrq_n): Likewise.
14623 (vmlaldavq): Likewise.
14624 (vmlaldavq): Likewise.
14625 (vqmovunbq): Likewise.
14626 (vqmovunbq): Likewise.
14627 (vqdmulltq_n): Likewise.
14628 (vqdmulltq_n): Likewise.
14629 (vqdmulltq): Likewise.
14630 (vqdmulltq): Likewise.
14631 (vqdmullbq_n): Likewise.
14632 (vqdmullbq_n): Likewise.
14633 (vqdmullbq): Likewise.
14634 (vqdmullbq): Likewise.
14635 (vaddlvaq): Likewise.
14636 (vaddlvaq): Likewise.
14637 (vrmlaldavhq): Likewise.
14638 (vrmlaldavhq): Likewise.
14639 (vrmlaldavhxq): Likewise.
14640 (vrmlaldavhxq): Likewise.
14641 (vrmlsldavhq): Likewise.
14642 (vrmlsldavhq): Likewise.
14643 (vrmlsldavhxq): Likewise.
14644 (vrmlsldavhxq): Likewise.
14645 (vmlsldavxq): Likewise.
14646 (vmlsldavxq): Likewise.
14647 (vmlsldavq): Likewise.
14648 (vmlsldavq): Likewise.
14649 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
14650 (BINOP_NONE_NONE_NONE): Likewise.
14651 (BINOP_UNONE_NONE_NONE): Likewise.
14652 (BINOP_UNONE_UNONE_IMM): Likewise.
14653 (BINOP_UNONE_UNONE_NONE): Likewise.
14654 (BINOP_UNONE_UNONE_UNONE): Likewise.
14655 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
14656 (mve_vaddlvaq_<supf>v4si): Likewise.
14657 (mve_vaddq_n_f<mode>): Likewise.
14658 (mve_vandq_f<mode>): Likewise.
14659 (mve_vbicq_f<mode>): Likewise.
14660 (mve_vbicq_n_<supf><mode>): Likewise.
14661 (mve_vcaddq_rot270_f<mode>): Likewise.
14662 (mve_vcaddq_rot90_f<mode>): Likewise.
14663 (mve_vcmpeqq_f<mode>): Likewise.
14664 (mve_vcmpeqq_n_f<mode>): Likewise.
14665 (mve_vcmpgeq_f<mode>): Likewise.
14666 (mve_vcmpgeq_n_f<mode>): Likewise.
14667 (mve_vcmpgtq_f<mode>): Likewise.
14668 (mve_vcmpgtq_n_f<mode>): Likewise.
14669 (mve_vcmpleq_f<mode>): Likewise.
14670 (mve_vcmpleq_n_f<mode>): Likewise.
14671 (mve_vcmpltq_f<mode>): Likewise.
14672 (mve_vcmpltq_n_f<mode>): Likewise.
14673 (mve_vcmpneq_f<mode>): Likewise.
14674 (mve_vcmpneq_n_f<mode>): Likewise.
14675 (mve_vcmulq_f<mode>): Likewise.
14676 (mve_vcmulq_rot180_f<mode>): Likewise.
14677 (mve_vcmulq_rot270_f<mode>): Likewise.
14678 (mve_vcmulq_rot90_f<mode>): Likewise.
14679 (mve_vctp<mode1>q_mhi): Likewise.
14680 (mve_vcvtbq_f16_f32v8hf): Likewise.
14681 (mve_vcvttq_f16_f32v8hf): Likewise.
14682 (mve_veorq_f<mode>): Likewise.
14683 (mve_vmaxnmaq_f<mode>): Likewise.
14684 (mve_vmaxnmavq_f<mode>): Likewise.
14685 (mve_vmaxnmq_f<mode>): Likewise.
14686 (mve_vmaxnmvq_f<mode>): Likewise.
14687 (mve_vminnmaq_f<mode>): Likewise.
14688 (mve_vminnmavq_f<mode>): Likewise.
14689 (mve_vminnmq_f<mode>): Likewise.
14690 (mve_vminnmvq_f<mode>): Likewise.
14691 (mve_vmlaldavq_<supf><mode>): Likewise.
14692 (mve_vmlaldavxq_<supf><mode>): Likewise.
14693 (mve_vmlsldavq_s<mode>): Likewise.
14694 (mve_vmlsldavxq_s<mode>): Likewise.
14695 (mve_vmovnbq_<supf><mode>): Likewise.
14696 (mve_vmovntq_<supf><mode>): Likewise.
14697 (mve_vmulq_f<mode>): Likewise.
14698 (mve_vmulq_n_f<mode>): Likewise.
14699 (mve_vornq_f<mode>): Likewise.
14700 (mve_vorrq_f<mode>): Likewise.
14701 (mve_vorrq_n_<supf><mode>): Likewise.
14702 (mve_vqdmullbq_n_s<mode>): Likewise.
14703 (mve_vqdmullbq_s<mode>): Likewise.
14704 (mve_vqdmulltq_n_s<mode>): Likewise.
14705 (mve_vqdmulltq_s<mode>): Likewise.
14706 (mve_vqmovnbq_<supf><mode>): Likewise.
14707 (mve_vqmovntq_<supf><mode>): Likewise.
14708 (mve_vqmovunbq_s<mode>): Likewise.
14709 (mve_vqmovuntq_s<mode>): Likewise.
14710 (mve_vrmlaldavhxq_sv4si): Likewise.
14711 (mve_vrmlsldavhq_sv4si): Likewise.
14712 (mve_vrmlsldavhxq_sv4si): Likewise.
14713 (mve_vshllbq_n_<supf><mode>): Likewise.
14714 (mve_vshlltq_n_<supf><mode>): Likewise.
14715 (mve_vsubq_f<mode>): Likewise.
14716 (mve_vmulltq_poly_p<mode>): Likewise.
14717 (mve_vmullbq_poly_p<mode>): Likewise.
14718 (mve_vrmlaldavhq_<supf>v4si): Likewise.
14720 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14721 Mihail Ionescu <mihail.ionescu@arm.com>
14722 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14724 * config/arm/arm_mve.h (vsubq_u8): Define macro.
14725 (vsubq_n_u8): Likewise.
14726 (vrmulhq_u8): Likewise.
14727 (vrhaddq_u8): Likewise.
14728 (vqsubq_u8): Likewise.
14729 (vqsubq_n_u8): Likewise.
14730 (vqaddq_u8): Likewise.
14731 (vqaddq_n_u8): Likewise.
14732 (vorrq_u8): Likewise.
14733 (vornq_u8): Likewise.
14734 (vmulq_u8): Likewise.
14735 (vmulq_n_u8): Likewise.
14736 (vmulltq_int_u8): Likewise.
14737 (vmullbq_int_u8): Likewise.
14738 (vmulhq_u8): Likewise.
14739 (vmladavq_u8): Likewise.
14740 (vminvq_u8): Likewise.
14741 (vminq_u8): Likewise.
14742 (vmaxvq_u8): Likewise.
14743 (vmaxq_u8): Likewise.
14744 (vhsubq_u8): Likewise.
14745 (vhsubq_n_u8): Likewise.
14746 (vhaddq_u8): Likewise.
14747 (vhaddq_n_u8): Likewise.
14748 (veorq_u8): Likewise.
14749 (vcmpneq_n_u8): Likewise.
14750 (vcmphiq_u8): Likewise.
14751 (vcmphiq_n_u8): Likewise.
14752 (vcmpeqq_u8): Likewise.
14753 (vcmpeqq_n_u8): Likewise.
14754 (vcmpcsq_u8): Likewise.
14755 (vcmpcsq_n_u8): Likewise.
14756 (vcaddq_rot90_u8): Likewise.
14757 (vcaddq_rot270_u8): Likewise.
14758 (vbicq_u8): Likewise.
14759 (vandq_u8): Likewise.
14760 (vaddvq_p_u8): Likewise.
14761 (vaddvaq_u8): Likewise.
14762 (vaddq_n_u8): Likewise.
14763 (vabdq_u8): Likewise.
14764 (vshlq_r_u8): Likewise.
14765 (vrshlq_u8): Likewise.
14766 (vrshlq_n_u8): Likewise.
14767 (vqshlq_u8): Likewise.
14768 (vqshlq_r_u8): Likewise.
14769 (vqrshlq_u8): Likewise.
14770 (vqrshlq_n_u8): Likewise.
14771 (vminavq_s8): Likewise.
14772 (vminaq_s8): Likewise.
14773 (vmaxavq_s8): Likewise.
14774 (vmaxaq_s8): Likewise.
14775 (vbrsrq_n_u8): Likewise.
14776 (vshlq_n_u8): Likewise.
14777 (vrshrq_n_u8): Likewise.
14778 (vqshlq_n_u8): Likewise.
14779 (vcmpneq_n_s8): Likewise.
14780 (vcmpltq_s8): Likewise.
14781 (vcmpltq_n_s8): Likewise.
14782 (vcmpleq_s8): Likewise.
14783 (vcmpleq_n_s8): Likewise.
14784 (vcmpgtq_s8): Likewise.
14785 (vcmpgtq_n_s8): Likewise.
14786 (vcmpgeq_s8): Likewise.
14787 (vcmpgeq_n_s8): Likewise.
14788 (vcmpeqq_s8): Likewise.
14789 (vcmpeqq_n_s8): Likewise.
14790 (vqshluq_n_s8): Likewise.
14791 (vaddvq_p_s8): Likewise.
14792 (vsubq_s8): Likewise.
14793 (vsubq_n_s8): Likewise.
14794 (vshlq_r_s8): Likewise.
14795 (vrshlq_s8): Likewise.
14796 (vrshlq_n_s8): Likewise.
14797 (vrmulhq_s8): Likewise.
14798 (vrhaddq_s8): Likewise.
14799 (vqsubq_s8): Likewise.
14800 (vqsubq_n_s8): Likewise.
14801 (vqshlq_s8): Likewise.
14802 (vqshlq_r_s8): Likewise.
14803 (vqrshlq_s8): Likewise.
14804 (vqrshlq_n_s8): Likewise.
14805 (vqrdmulhq_s8): Likewise.
14806 (vqrdmulhq_n_s8): Likewise.
14807 (vqdmulhq_s8): Likewise.
14808 (vqdmulhq_n_s8): Likewise.
14809 (vqaddq_s8): Likewise.
14810 (vqaddq_n_s8): Likewise.
14811 (vorrq_s8): Likewise.
14812 (vornq_s8): Likewise.
14813 (vmulq_s8): Likewise.
14814 (vmulq_n_s8): Likewise.
14815 (vmulltq_int_s8): Likewise.
14816 (vmullbq_int_s8): Likewise.
14817 (vmulhq_s8): Likewise.
14818 (vmlsdavxq_s8): Likewise.
14819 (vmlsdavq_s8): Likewise.
14820 (vmladavxq_s8): Likewise.
14821 (vmladavq_s8): Likewise.
14822 (vminvq_s8): Likewise.
14823 (vminq_s8): Likewise.
14824 (vmaxvq_s8): Likewise.
14825 (vmaxq_s8): Likewise.
14826 (vhsubq_s8): Likewise.
14827 (vhsubq_n_s8): Likewise.
14828 (vhcaddq_rot90_s8): Likewise.
14829 (vhcaddq_rot270_s8): Likewise.
14830 (vhaddq_s8): Likewise.
14831 (vhaddq_n_s8): Likewise.
14832 (veorq_s8): Likewise.
14833 (vcaddq_rot90_s8): Likewise.
14834 (vcaddq_rot270_s8): Likewise.
14835 (vbrsrq_n_s8): Likewise.
14836 (vbicq_s8): Likewise.
14837 (vandq_s8): Likewise.
14838 (vaddvaq_s8): Likewise.
14839 (vaddq_n_s8): Likewise.
14840 (vabdq_s8): Likewise.
14841 (vshlq_n_s8): Likewise.
14842 (vrshrq_n_s8): Likewise.
14843 (vqshlq_n_s8): Likewise.
14844 (vsubq_u16): Likewise.
14845 (vsubq_n_u16): Likewise.
14846 (vrmulhq_u16): Likewise.
14847 (vrhaddq_u16): Likewise.
14848 (vqsubq_u16): Likewise.
14849 (vqsubq_n_u16): Likewise.
14850 (vqaddq_u16): Likewise.
14851 (vqaddq_n_u16): Likewise.
14852 (vorrq_u16): Likewise.
14853 (vornq_u16): Likewise.
14854 (vmulq_u16): Likewise.
14855 (vmulq_n_u16): Likewise.
14856 (vmulltq_int_u16): Likewise.
14857 (vmullbq_int_u16): Likewise.
14858 (vmulhq_u16): Likewise.
14859 (vmladavq_u16): Likewise.
14860 (vminvq_u16): Likewise.
14861 (vminq_u16): Likewise.
14862 (vmaxvq_u16): Likewise.
14863 (vmaxq_u16): Likewise.
14864 (vhsubq_u16): Likewise.
14865 (vhsubq_n_u16): Likewise.
14866 (vhaddq_u16): Likewise.
14867 (vhaddq_n_u16): Likewise.
14868 (veorq_u16): Likewise.
14869 (vcmpneq_n_u16): Likewise.
14870 (vcmphiq_u16): Likewise.
14871 (vcmphiq_n_u16): Likewise.
14872 (vcmpeqq_u16): Likewise.
14873 (vcmpeqq_n_u16): Likewise.
14874 (vcmpcsq_u16): Likewise.
14875 (vcmpcsq_n_u16): Likewise.
14876 (vcaddq_rot90_u16): Likewise.
14877 (vcaddq_rot270_u16): Likewise.
14878 (vbicq_u16): Likewise.
14879 (vandq_u16): Likewise.
14880 (vaddvq_p_u16): Likewise.
14881 (vaddvaq_u16): Likewise.
14882 (vaddq_n_u16): Likewise.
14883 (vabdq_u16): Likewise.
14884 (vshlq_r_u16): Likewise.
14885 (vrshlq_u16): Likewise.
14886 (vrshlq_n_u16): Likewise.
14887 (vqshlq_u16): Likewise.
14888 (vqshlq_r_u16): Likewise.
14889 (vqrshlq_u16): Likewise.
14890 (vqrshlq_n_u16): Likewise.
14891 (vminavq_s16): Likewise.
14892 (vminaq_s16): Likewise.
14893 (vmaxavq_s16): Likewise.
14894 (vmaxaq_s16): Likewise.
14895 (vbrsrq_n_u16): Likewise.
14896 (vshlq_n_u16): Likewise.
14897 (vrshrq_n_u16): Likewise.
14898 (vqshlq_n_u16): Likewise.
14899 (vcmpneq_n_s16): Likewise.
14900 (vcmpltq_s16): Likewise.
14901 (vcmpltq_n_s16): Likewise.
14902 (vcmpleq_s16): Likewise.
14903 (vcmpleq_n_s16): Likewise.
14904 (vcmpgtq_s16): Likewise.
14905 (vcmpgtq_n_s16): Likewise.
14906 (vcmpgeq_s16): Likewise.
14907 (vcmpgeq_n_s16): Likewise.
14908 (vcmpeqq_s16): Likewise.
14909 (vcmpeqq_n_s16): Likewise.
14910 (vqshluq_n_s16): Likewise.
14911 (vaddvq_p_s16): Likewise.
14912 (vsubq_s16): Likewise.
14913 (vsubq_n_s16): Likewise.
14914 (vshlq_r_s16): Likewise.
14915 (vrshlq_s16): Likewise.
14916 (vrshlq_n_s16): Likewise.
14917 (vrmulhq_s16): Likewise.
14918 (vrhaddq_s16): Likewise.
14919 (vqsubq_s16): Likewise.
14920 (vqsubq_n_s16): Likewise.
14921 (vqshlq_s16): Likewise.
14922 (vqshlq_r_s16): Likewise.
14923 (vqrshlq_s16): Likewise.
14924 (vqrshlq_n_s16): Likewise.
14925 (vqrdmulhq_s16): Likewise.
14926 (vqrdmulhq_n_s16): Likewise.
14927 (vqdmulhq_s16): Likewise.
14928 (vqdmulhq_n_s16): Likewise.
14929 (vqaddq_s16): Likewise.
14930 (vqaddq_n_s16): Likewise.
14931 (vorrq_s16): Likewise.
14932 (vornq_s16): Likewise.
14933 (vmulq_s16): Likewise.
14934 (vmulq_n_s16): Likewise.
14935 (vmulltq_int_s16): Likewise.
14936 (vmullbq_int_s16): Likewise.
14937 (vmulhq_s16): Likewise.
14938 (vmlsdavxq_s16): Likewise.
14939 (vmlsdavq_s16): Likewise.
14940 (vmladavxq_s16): Likewise.
14941 (vmladavq_s16): Likewise.
14942 (vminvq_s16): Likewise.
14943 (vminq_s16): Likewise.
14944 (vmaxvq_s16): Likewise.
14945 (vmaxq_s16): Likewise.
14946 (vhsubq_s16): Likewise.
14947 (vhsubq_n_s16): Likewise.
14948 (vhcaddq_rot90_s16): Likewise.
14949 (vhcaddq_rot270_s16): Likewise.
14950 (vhaddq_s16): Likewise.
14951 (vhaddq_n_s16): Likewise.
14952 (veorq_s16): Likewise.
14953 (vcaddq_rot90_s16): Likewise.
14954 (vcaddq_rot270_s16): Likewise.
14955 (vbrsrq_n_s16): Likewise.
14956 (vbicq_s16): Likewise.
14957 (vandq_s16): Likewise.
14958 (vaddvaq_s16): Likewise.
14959 (vaddq_n_s16): Likewise.
14960 (vabdq_s16): Likewise.
14961 (vshlq_n_s16): Likewise.
14962 (vrshrq_n_s16): Likewise.
14963 (vqshlq_n_s16): Likewise.
14964 (vsubq_u32): Likewise.
14965 (vsubq_n_u32): Likewise.
14966 (vrmulhq_u32): Likewise.
14967 (vrhaddq_u32): Likewise.
14968 (vqsubq_u32): Likewise.
14969 (vqsubq_n_u32): Likewise.
14970 (vqaddq_u32): Likewise.
14971 (vqaddq_n_u32): Likewise.
14972 (vorrq_u32): Likewise.
14973 (vornq_u32): Likewise.
14974 (vmulq_u32): Likewise.
14975 (vmulq_n_u32): Likewise.
14976 (vmulltq_int_u32): Likewise.
14977 (vmullbq_int_u32): Likewise.
14978 (vmulhq_u32): Likewise.
14979 (vmladavq_u32): Likewise.
14980 (vminvq_u32): Likewise.
14981 (vminq_u32): Likewise.
14982 (vmaxvq_u32): Likewise.
14983 (vmaxq_u32): Likewise.
14984 (vhsubq_u32): Likewise.
14985 (vhsubq_n_u32): Likewise.
14986 (vhaddq_u32): Likewise.
14987 (vhaddq_n_u32): Likewise.
14988 (veorq_u32): Likewise.
14989 (vcmpneq_n_u32): Likewise.
14990 (vcmphiq_u32): Likewise.
14991 (vcmphiq_n_u32): Likewise.
14992 (vcmpeqq_u32): Likewise.
14993 (vcmpeqq_n_u32): Likewise.
14994 (vcmpcsq_u32): Likewise.
14995 (vcmpcsq_n_u32): Likewise.
14996 (vcaddq_rot90_u32): Likewise.
14997 (vcaddq_rot270_u32): Likewise.
14998 (vbicq_u32): Likewise.
14999 (vandq_u32): Likewise.
15000 (vaddvq_p_u32): Likewise.
15001 (vaddvaq_u32): Likewise.
15002 (vaddq_n_u32): Likewise.
15003 (vabdq_u32): Likewise.
15004 (vshlq_r_u32): Likewise.
15005 (vrshlq_u32): Likewise.
15006 (vrshlq_n_u32): Likewise.
15007 (vqshlq_u32): Likewise.
15008 (vqshlq_r_u32): Likewise.
15009 (vqrshlq_u32): Likewise.
15010 (vqrshlq_n_u32): Likewise.
15011 (vminavq_s32): Likewise.
15012 (vminaq_s32): Likewise.
15013 (vmaxavq_s32): Likewise.
15014 (vmaxaq_s32): Likewise.
15015 (vbrsrq_n_u32): Likewise.
15016 (vshlq_n_u32): Likewise.
15017 (vrshrq_n_u32): Likewise.
15018 (vqshlq_n_u32): Likewise.
15019 (vcmpneq_n_s32): Likewise.
15020 (vcmpltq_s32): Likewise.
15021 (vcmpltq_n_s32): Likewise.
15022 (vcmpleq_s32): Likewise.
15023 (vcmpleq_n_s32): Likewise.
15024 (vcmpgtq_s32): Likewise.
15025 (vcmpgtq_n_s32): Likewise.
15026 (vcmpgeq_s32): Likewise.
15027 (vcmpgeq_n_s32): Likewise.
15028 (vcmpeqq_s32): Likewise.
15029 (vcmpeqq_n_s32): Likewise.
15030 (vqshluq_n_s32): Likewise.
15031 (vaddvq_p_s32): Likewise.
15032 (vsubq_s32): Likewise.
15033 (vsubq_n_s32): Likewise.
15034 (vshlq_r_s32): Likewise.
15035 (vrshlq_s32): Likewise.
15036 (vrshlq_n_s32): Likewise.
15037 (vrmulhq_s32): Likewise.
15038 (vrhaddq_s32): Likewise.
15039 (vqsubq_s32): Likewise.
15040 (vqsubq_n_s32): Likewise.
15041 (vqshlq_s32): Likewise.
15042 (vqshlq_r_s32): Likewise.
15043 (vqrshlq_s32): Likewise.
15044 (vqrshlq_n_s32): Likewise.
15045 (vqrdmulhq_s32): Likewise.
15046 (vqrdmulhq_n_s32): Likewise.
15047 (vqdmulhq_s32): Likewise.
15048 (vqdmulhq_n_s32): Likewise.
15049 (vqaddq_s32): Likewise.
15050 (vqaddq_n_s32): Likewise.
15051 (vorrq_s32): Likewise.
15052 (vornq_s32): Likewise.
15053 (vmulq_s32): Likewise.
15054 (vmulq_n_s32): Likewise.
15055 (vmulltq_int_s32): Likewise.
15056 (vmullbq_int_s32): Likewise.
15057 (vmulhq_s32): Likewise.
15058 (vmlsdavxq_s32): Likewise.
15059 (vmlsdavq_s32): Likewise.
15060 (vmladavxq_s32): Likewise.
15061 (vmladavq_s32): Likewise.
15062 (vminvq_s32): Likewise.
15063 (vminq_s32): Likewise.
15064 (vmaxvq_s32): Likewise.
15065 (vmaxq_s32): Likewise.
15066 (vhsubq_s32): Likewise.
15067 (vhsubq_n_s32): Likewise.
15068 (vhcaddq_rot90_s32): Likewise.
15069 (vhcaddq_rot270_s32): Likewise.
15070 (vhaddq_s32): Likewise.
15071 (vhaddq_n_s32): Likewise.
15072 (veorq_s32): Likewise.
15073 (vcaddq_rot90_s32): Likewise.
15074 (vcaddq_rot270_s32): Likewise.
15075 (vbrsrq_n_s32): Likewise.
15076 (vbicq_s32): Likewise.
15077 (vandq_s32): Likewise.
15078 (vaddvaq_s32): Likewise.
15079 (vaddq_n_s32): Likewise.
15080 (vabdq_s32): Likewise.
15081 (vshlq_n_s32): Likewise.
15082 (vrshrq_n_s32): Likewise.
15083 (vqshlq_n_s32): Likewise.
15084 (__arm_vsubq_u8): Define intrinsic.
15085 (__arm_vsubq_n_u8): Likewise.
15086 (__arm_vrmulhq_u8): Likewise.
15087 (__arm_vrhaddq_u8): Likewise.
15088 (__arm_vqsubq_u8): Likewise.
15089 (__arm_vqsubq_n_u8): Likewise.
15090 (__arm_vqaddq_u8): Likewise.
15091 (__arm_vqaddq_n_u8): Likewise.
15092 (__arm_vorrq_u8): Likewise.
15093 (__arm_vornq_u8): Likewise.
15094 (__arm_vmulq_u8): Likewise.
15095 (__arm_vmulq_n_u8): Likewise.
15096 (__arm_vmulltq_int_u8): Likewise.
15097 (__arm_vmullbq_int_u8): Likewise.
15098 (__arm_vmulhq_u8): Likewise.
15099 (__arm_vmladavq_u8): Likewise.
15100 (__arm_vminvq_u8): Likewise.
15101 (__arm_vminq_u8): Likewise.
15102 (__arm_vmaxvq_u8): Likewise.
15103 (__arm_vmaxq_u8): Likewise.
15104 (__arm_vhsubq_u8): Likewise.
15105 (__arm_vhsubq_n_u8): Likewise.
15106 (__arm_vhaddq_u8): Likewise.
15107 (__arm_vhaddq_n_u8): Likewise.
15108 (__arm_veorq_u8): Likewise.
15109 (__arm_vcmpneq_n_u8): Likewise.
15110 (__arm_vcmphiq_u8): Likewise.
15111 (__arm_vcmphiq_n_u8): Likewise.
15112 (__arm_vcmpeqq_u8): Likewise.
15113 (__arm_vcmpeqq_n_u8): Likewise.
15114 (__arm_vcmpcsq_u8): Likewise.
15115 (__arm_vcmpcsq_n_u8): Likewise.
15116 (__arm_vcaddq_rot90_u8): Likewise.
15117 (__arm_vcaddq_rot270_u8): Likewise.
15118 (__arm_vbicq_u8): Likewise.
15119 (__arm_vandq_u8): Likewise.
15120 (__arm_vaddvq_p_u8): Likewise.
15121 (__arm_vaddvaq_u8): Likewise.
15122 (__arm_vaddq_n_u8): Likewise.
15123 (__arm_vabdq_u8): Likewise.
15124 (__arm_vshlq_r_u8): Likewise.
15125 (__arm_vrshlq_u8): Likewise.
15126 (__arm_vrshlq_n_u8): Likewise.
15127 (__arm_vqshlq_u8): Likewise.
15128 (__arm_vqshlq_r_u8): Likewise.
15129 (__arm_vqrshlq_u8): Likewise.
15130 (__arm_vqrshlq_n_u8): Likewise.
15131 (__arm_vminavq_s8): Likewise.
15132 (__arm_vminaq_s8): Likewise.
15133 (__arm_vmaxavq_s8): Likewise.
15134 (__arm_vmaxaq_s8): Likewise.
15135 (__arm_vbrsrq_n_u8): Likewise.
15136 (__arm_vshlq_n_u8): Likewise.
15137 (__arm_vrshrq_n_u8): Likewise.
15138 (__arm_vqshlq_n_u8): Likewise.
15139 (__arm_vcmpneq_n_s8): Likewise.
15140 (__arm_vcmpltq_s8): Likewise.
15141 (__arm_vcmpltq_n_s8): Likewise.
15142 (__arm_vcmpleq_s8): Likewise.
15143 (__arm_vcmpleq_n_s8): Likewise.
15144 (__arm_vcmpgtq_s8): Likewise.
15145 (__arm_vcmpgtq_n_s8): Likewise.
15146 (__arm_vcmpgeq_s8): Likewise.
15147 (__arm_vcmpgeq_n_s8): Likewise.
15148 (__arm_vcmpeqq_s8): Likewise.
15149 (__arm_vcmpeqq_n_s8): Likewise.
15150 (__arm_vqshluq_n_s8): Likewise.
15151 (__arm_vaddvq_p_s8): Likewise.
15152 (__arm_vsubq_s8): Likewise.
15153 (__arm_vsubq_n_s8): Likewise.
15154 (__arm_vshlq_r_s8): Likewise.
15155 (__arm_vrshlq_s8): Likewise.
15156 (__arm_vrshlq_n_s8): Likewise.
15157 (__arm_vrmulhq_s8): Likewise.
15158 (__arm_vrhaddq_s8): Likewise.
15159 (__arm_vqsubq_s8): Likewise.
15160 (__arm_vqsubq_n_s8): Likewise.
15161 (__arm_vqshlq_s8): Likewise.
15162 (__arm_vqshlq_r_s8): Likewise.
15163 (__arm_vqrshlq_s8): Likewise.
15164 (__arm_vqrshlq_n_s8): Likewise.
15165 (__arm_vqrdmulhq_s8): Likewise.
15166 (__arm_vqrdmulhq_n_s8): Likewise.
15167 (__arm_vqdmulhq_s8): Likewise.
15168 (__arm_vqdmulhq_n_s8): Likewise.
15169 (__arm_vqaddq_s8): Likewise.
15170 (__arm_vqaddq_n_s8): Likewise.
15171 (__arm_vorrq_s8): Likewise.
15172 (__arm_vornq_s8): Likewise.
15173 (__arm_vmulq_s8): Likewise.
15174 (__arm_vmulq_n_s8): Likewise.
15175 (__arm_vmulltq_int_s8): Likewise.
15176 (__arm_vmullbq_int_s8): Likewise.
15177 (__arm_vmulhq_s8): Likewise.
15178 (__arm_vmlsdavxq_s8): Likewise.
15179 (__arm_vmlsdavq_s8): Likewise.
15180 (__arm_vmladavxq_s8): Likewise.
15181 (__arm_vmladavq_s8): Likewise.
15182 (__arm_vminvq_s8): Likewise.
15183 (__arm_vminq_s8): Likewise.
15184 (__arm_vmaxvq_s8): Likewise.
15185 (__arm_vmaxq_s8): Likewise.
15186 (__arm_vhsubq_s8): Likewise.
15187 (__arm_vhsubq_n_s8): Likewise.
15188 (__arm_vhcaddq_rot90_s8): Likewise.
15189 (__arm_vhcaddq_rot270_s8): Likewise.
15190 (__arm_vhaddq_s8): Likewise.
15191 (__arm_vhaddq_n_s8): Likewise.
15192 (__arm_veorq_s8): Likewise.
15193 (__arm_vcaddq_rot90_s8): Likewise.
15194 (__arm_vcaddq_rot270_s8): Likewise.
15195 (__arm_vbrsrq_n_s8): Likewise.
15196 (__arm_vbicq_s8): Likewise.
15197 (__arm_vandq_s8): Likewise.
15198 (__arm_vaddvaq_s8): Likewise.
15199 (__arm_vaddq_n_s8): Likewise.
15200 (__arm_vabdq_s8): Likewise.
15201 (__arm_vshlq_n_s8): Likewise.
15202 (__arm_vrshrq_n_s8): Likewise.
15203 (__arm_vqshlq_n_s8): Likewise.
15204 (__arm_vsubq_u16): Likewise.
15205 (__arm_vsubq_n_u16): Likewise.
15206 (__arm_vrmulhq_u16): Likewise.
15207 (__arm_vrhaddq_u16): Likewise.
15208 (__arm_vqsubq_u16): Likewise.
15209 (__arm_vqsubq_n_u16): Likewise.
15210 (__arm_vqaddq_u16): Likewise.
15211 (__arm_vqaddq_n_u16): Likewise.
15212 (__arm_vorrq_u16): Likewise.
15213 (__arm_vornq_u16): Likewise.
15214 (__arm_vmulq_u16): Likewise.
15215 (__arm_vmulq_n_u16): Likewise.
15216 (__arm_vmulltq_int_u16): Likewise.
15217 (__arm_vmullbq_int_u16): Likewise.
15218 (__arm_vmulhq_u16): Likewise.
15219 (__arm_vmladavq_u16): Likewise.
15220 (__arm_vminvq_u16): Likewise.
15221 (__arm_vminq_u16): Likewise.
15222 (__arm_vmaxvq_u16): Likewise.
15223 (__arm_vmaxq_u16): Likewise.
15224 (__arm_vhsubq_u16): Likewise.
15225 (__arm_vhsubq_n_u16): Likewise.
15226 (__arm_vhaddq_u16): Likewise.
15227 (__arm_vhaddq_n_u16): Likewise.
15228 (__arm_veorq_u16): Likewise.
15229 (__arm_vcmpneq_n_u16): Likewise.
15230 (__arm_vcmphiq_u16): Likewise.
15231 (__arm_vcmphiq_n_u16): Likewise.
15232 (__arm_vcmpeqq_u16): Likewise.
15233 (__arm_vcmpeqq_n_u16): Likewise.
15234 (__arm_vcmpcsq_u16): Likewise.
15235 (__arm_vcmpcsq_n_u16): Likewise.
15236 (__arm_vcaddq_rot90_u16): Likewise.
15237 (__arm_vcaddq_rot270_u16): Likewise.
15238 (__arm_vbicq_u16): Likewise.
15239 (__arm_vandq_u16): Likewise.
15240 (__arm_vaddvq_p_u16): Likewise.
15241 (__arm_vaddvaq_u16): Likewise.
15242 (__arm_vaddq_n_u16): Likewise.
15243 (__arm_vabdq_u16): Likewise.
15244 (__arm_vshlq_r_u16): Likewise.
15245 (__arm_vrshlq_u16): Likewise.
15246 (__arm_vrshlq_n_u16): Likewise.
15247 (__arm_vqshlq_u16): Likewise.
15248 (__arm_vqshlq_r_u16): Likewise.
15249 (__arm_vqrshlq_u16): Likewise.
15250 (__arm_vqrshlq_n_u16): Likewise.
15251 (__arm_vminavq_s16): Likewise.
15252 (__arm_vminaq_s16): Likewise.
15253 (__arm_vmaxavq_s16): Likewise.
15254 (__arm_vmaxaq_s16): Likewise.
15255 (__arm_vbrsrq_n_u16): Likewise.
15256 (__arm_vshlq_n_u16): Likewise.
15257 (__arm_vrshrq_n_u16): Likewise.
15258 (__arm_vqshlq_n_u16): Likewise.
15259 (__arm_vcmpneq_n_s16): Likewise.
15260 (__arm_vcmpltq_s16): Likewise.
15261 (__arm_vcmpltq_n_s16): Likewise.
15262 (__arm_vcmpleq_s16): Likewise.
15263 (__arm_vcmpleq_n_s16): Likewise.
15264 (__arm_vcmpgtq_s16): Likewise.
15265 (__arm_vcmpgtq_n_s16): Likewise.
15266 (__arm_vcmpgeq_s16): Likewise.
15267 (__arm_vcmpgeq_n_s16): Likewise.
15268 (__arm_vcmpeqq_s16): Likewise.
15269 (__arm_vcmpeqq_n_s16): Likewise.
15270 (__arm_vqshluq_n_s16): Likewise.
15271 (__arm_vaddvq_p_s16): Likewise.
15272 (__arm_vsubq_s16): Likewise.
15273 (__arm_vsubq_n_s16): Likewise.
15274 (__arm_vshlq_r_s16): Likewise.
15275 (__arm_vrshlq_s16): Likewise.
15276 (__arm_vrshlq_n_s16): Likewise.
15277 (__arm_vrmulhq_s16): Likewise.
15278 (__arm_vrhaddq_s16): Likewise.
15279 (__arm_vqsubq_s16): Likewise.
15280 (__arm_vqsubq_n_s16): Likewise.
15281 (__arm_vqshlq_s16): Likewise.
15282 (__arm_vqshlq_r_s16): Likewise.
15283 (__arm_vqrshlq_s16): Likewise.
15284 (__arm_vqrshlq_n_s16): Likewise.
15285 (__arm_vqrdmulhq_s16): Likewise.
15286 (__arm_vqrdmulhq_n_s16): Likewise.
15287 (__arm_vqdmulhq_s16): Likewise.
15288 (__arm_vqdmulhq_n_s16): Likewise.
15289 (__arm_vqaddq_s16): Likewise.
15290 (__arm_vqaddq_n_s16): Likewise.
15291 (__arm_vorrq_s16): Likewise.
15292 (__arm_vornq_s16): Likewise.
15293 (__arm_vmulq_s16): Likewise.
15294 (__arm_vmulq_n_s16): Likewise.
15295 (__arm_vmulltq_int_s16): Likewise.
15296 (__arm_vmullbq_int_s16): Likewise.
15297 (__arm_vmulhq_s16): Likewise.
15298 (__arm_vmlsdavxq_s16): Likewise.
15299 (__arm_vmlsdavq_s16): Likewise.
15300 (__arm_vmladavxq_s16): Likewise.
15301 (__arm_vmladavq_s16): Likewise.
15302 (__arm_vminvq_s16): Likewise.
15303 (__arm_vminq_s16): Likewise.
15304 (__arm_vmaxvq_s16): Likewise.
15305 (__arm_vmaxq_s16): Likewise.
15306 (__arm_vhsubq_s16): Likewise.
15307 (__arm_vhsubq_n_s16): Likewise.
15308 (__arm_vhcaddq_rot90_s16): Likewise.
15309 (__arm_vhcaddq_rot270_s16): Likewise.
15310 (__arm_vhaddq_s16): Likewise.
15311 (__arm_vhaddq_n_s16): Likewise.
15312 (__arm_veorq_s16): Likewise.
15313 (__arm_vcaddq_rot90_s16): Likewise.
15314 (__arm_vcaddq_rot270_s16): Likewise.
15315 (__arm_vbrsrq_n_s16): Likewise.
15316 (__arm_vbicq_s16): Likewise.
15317 (__arm_vandq_s16): Likewise.
15318 (__arm_vaddvaq_s16): Likewise.
15319 (__arm_vaddq_n_s16): Likewise.
15320 (__arm_vabdq_s16): Likewise.
15321 (__arm_vshlq_n_s16): Likewise.
15322 (__arm_vrshrq_n_s16): Likewise.
15323 (__arm_vqshlq_n_s16): Likewise.
15324 (__arm_vsubq_u32): Likewise.
15325 (__arm_vsubq_n_u32): Likewise.
15326 (__arm_vrmulhq_u32): Likewise.
15327 (__arm_vrhaddq_u32): Likewise.
15328 (__arm_vqsubq_u32): Likewise.
15329 (__arm_vqsubq_n_u32): Likewise.
15330 (__arm_vqaddq_u32): Likewise.
15331 (__arm_vqaddq_n_u32): Likewise.
15332 (__arm_vorrq_u32): Likewise.
15333 (__arm_vornq_u32): Likewise.
15334 (__arm_vmulq_u32): Likewise.
15335 (__arm_vmulq_n_u32): Likewise.
15336 (__arm_vmulltq_int_u32): Likewise.
15337 (__arm_vmullbq_int_u32): Likewise.
15338 (__arm_vmulhq_u32): Likewise.
15339 (__arm_vmladavq_u32): Likewise.
15340 (__arm_vminvq_u32): Likewise.
15341 (__arm_vminq_u32): Likewise.
15342 (__arm_vmaxvq_u32): Likewise.
15343 (__arm_vmaxq_u32): Likewise.
15344 (__arm_vhsubq_u32): Likewise.
15345 (__arm_vhsubq_n_u32): Likewise.
15346 (__arm_vhaddq_u32): Likewise.
15347 (__arm_vhaddq_n_u32): Likewise.
15348 (__arm_veorq_u32): Likewise.
15349 (__arm_vcmpneq_n_u32): Likewise.
15350 (__arm_vcmphiq_u32): Likewise.
15351 (__arm_vcmphiq_n_u32): Likewise.
15352 (__arm_vcmpeqq_u32): Likewise.
15353 (__arm_vcmpeqq_n_u32): Likewise.
15354 (__arm_vcmpcsq_u32): Likewise.
15355 (__arm_vcmpcsq_n_u32): Likewise.
15356 (__arm_vcaddq_rot90_u32): Likewise.
15357 (__arm_vcaddq_rot270_u32): Likewise.
15358 (__arm_vbicq_u32): Likewise.
15359 (__arm_vandq_u32): Likewise.
15360 (__arm_vaddvq_p_u32): Likewise.
15361 (__arm_vaddvaq_u32): Likewise.
15362 (__arm_vaddq_n_u32): Likewise.
15363 (__arm_vabdq_u32): Likewise.
15364 (__arm_vshlq_r_u32): Likewise.
15365 (__arm_vrshlq_u32): Likewise.
15366 (__arm_vrshlq_n_u32): Likewise.
15367 (__arm_vqshlq_u32): Likewise.
15368 (__arm_vqshlq_r_u32): Likewise.
15369 (__arm_vqrshlq_u32): Likewise.
15370 (__arm_vqrshlq_n_u32): Likewise.
15371 (__arm_vminavq_s32): Likewise.
15372 (__arm_vminaq_s32): Likewise.
15373 (__arm_vmaxavq_s32): Likewise.
15374 (__arm_vmaxaq_s32): Likewise.
15375 (__arm_vbrsrq_n_u32): Likewise.
15376 (__arm_vshlq_n_u32): Likewise.
15377 (__arm_vrshrq_n_u32): Likewise.
15378 (__arm_vqshlq_n_u32): Likewise.
15379 (__arm_vcmpneq_n_s32): Likewise.
15380 (__arm_vcmpltq_s32): Likewise.
15381 (__arm_vcmpltq_n_s32): Likewise.
15382 (__arm_vcmpleq_s32): Likewise.
15383 (__arm_vcmpleq_n_s32): Likewise.
15384 (__arm_vcmpgtq_s32): Likewise.
15385 (__arm_vcmpgtq_n_s32): Likewise.
15386 (__arm_vcmpgeq_s32): Likewise.
15387 (__arm_vcmpgeq_n_s32): Likewise.
15388 (__arm_vcmpeqq_s32): Likewise.
15389 (__arm_vcmpeqq_n_s32): Likewise.
15390 (__arm_vqshluq_n_s32): Likewise.
15391 (__arm_vaddvq_p_s32): Likewise.
15392 (__arm_vsubq_s32): Likewise.
15393 (__arm_vsubq_n_s32): Likewise.
15394 (__arm_vshlq_r_s32): Likewise.
15395 (__arm_vrshlq_s32): Likewise.
15396 (__arm_vrshlq_n_s32): Likewise.
15397 (__arm_vrmulhq_s32): Likewise.
15398 (__arm_vrhaddq_s32): Likewise.
15399 (__arm_vqsubq_s32): Likewise.
15400 (__arm_vqsubq_n_s32): Likewise.
15401 (__arm_vqshlq_s32): Likewise.
15402 (__arm_vqshlq_r_s32): Likewise.
15403 (__arm_vqrshlq_s32): Likewise.
15404 (__arm_vqrshlq_n_s32): Likewise.
15405 (__arm_vqrdmulhq_s32): Likewise.
15406 (__arm_vqrdmulhq_n_s32): Likewise.
15407 (__arm_vqdmulhq_s32): Likewise.
15408 (__arm_vqdmulhq_n_s32): Likewise.
15409 (__arm_vqaddq_s32): Likewise.
15410 (__arm_vqaddq_n_s32): Likewise.
15411 (__arm_vorrq_s32): Likewise.
15412 (__arm_vornq_s32): Likewise.
15413 (__arm_vmulq_s32): Likewise.
15414 (__arm_vmulq_n_s32): Likewise.
15415 (__arm_vmulltq_int_s32): Likewise.
15416 (__arm_vmullbq_int_s32): Likewise.
15417 (__arm_vmulhq_s32): Likewise.
15418 (__arm_vmlsdavxq_s32): Likewise.
15419 (__arm_vmlsdavq_s32): Likewise.
15420 (__arm_vmladavxq_s32): Likewise.
15421 (__arm_vmladavq_s32): Likewise.
15422 (__arm_vminvq_s32): Likewise.
15423 (__arm_vminq_s32): Likewise.
15424 (__arm_vmaxvq_s32): Likewise.
15425 (__arm_vmaxq_s32): Likewise.
15426 (__arm_vhsubq_s32): Likewise.
15427 (__arm_vhsubq_n_s32): Likewise.
15428 (__arm_vhcaddq_rot90_s32): Likewise.
15429 (__arm_vhcaddq_rot270_s32): Likewise.
15430 (__arm_vhaddq_s32): Likewise.
15431 (__arm_vhaddq_n_s32): Likewise.
15432 (__arm_veorq_s32): Likewise.
15433 (__arm_vcaddq_rot90_s32): Likewise.
15434 (__arm_vcaddq_rot270_s32): Likewise.
15435 (__arm_vbrsrq_n_s32): Likewise.
15436 (__arm_vbicq_s32): Likewise.
15437 (__arm_vandq_s32): Likewise.
15438 (__arm_vaddvaq_s32): Likewise.
15439 (__arm_vaddq_n_s32): Likewise.
15440 (__arm_vabdq_s32): Likewise.
15441 (__arm_vshlq_n_s32): Likewise.
15442 (__arm_vrshrq_n_s32): Likewise.
15443 (__arm_vqshlq_n_s32): Likewise.
15444 (vsubq): Define polymorphic variant.
15445 (vsubq_n): Likewise.
15446 (vshlq_r): Likewise.
15447 (vrshlq_n): Likewise.
15448 (vrshlq): Likewise.
15449 (vrmulhq): Likewise.
15450 (vrhaddq): Likewise.
15451 (vqsubq_n): Likewise.
15452 (vqsubq): Likewise.
15453 (vqshlq): Likewise.
15454 (vqshlq_r): Likewise.
15455 (vqshluq): Likewise.
15456 (vrshrq_n): Likewise.
15457 (vshlq_n): Likewise.
15458 (vqshluq_n): Likewise.
15459 (vqshlq_n): Likewise.
15460 (vqrshlq_n): Likewise.
15461 (vqrshlq): Likewise.
15462 (vqrdmulhq_n): Likewise.
15463 (vqrdmulhq): Likewise.
15464 (vqdmulhq_n): Likewise.
15465 (vqdmulhq): Likewise.
15466 (vqaddq_n): Likewise.
15467 (vqaddq): Likewise.
15468 (vorrq_n): Likewise.
15471 (vmulq_n): Likewise.
15473 (vmulltq_int): Likewise.
15474 (vmullbq_int): Likewise.
15475 (vmulhq): Likewise.
15477 (vminaq): Likewise.
15479 (vmaxaq): Likewise.
15480 (vhsubq_n): Likewise.
15481 (vhsubq): Likewise.
15482 (vhcaddq_rot90): Likewise.
15483 (vhcaddq_rot270): Likewise.
15484 (vhaddq_n): Likewise.
15485 (vhaddq): Likewise.
15487 (vcaddq_rot90): Likewise.
15488 (vcaddq_rot270): Likewise.
15489 (vbrsrq_n): Likewise.
15490 (vbicq_n): Likewise.
15493 (vaddq_n): Likewise.
15496 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
15497 (BINOP_NONE_NONE_NONE): Likewise.
15498 (BINOP_NONE_NONE_UNONE): Likewise.
15499 (BINOP_UNONE_NONE_IMM): Likewise.
15500 (BINOP_UNONE_NONE_NONE): Likewise.
15501 (BINOP_UNONE_UNONE_IMM): Likewise.
15502 (BINOP_UNONE_UNONE_NONE): Likewise.
15503 (BINOP_UNONE_UNONE_UNONE): Likewise.
15504 * config/arm/constraints.md (Ra): Define constraint to check constant is
15505 in the range of 0 to 7.
15506 (Rg): Define constriant to check the constant is one among 1, 2, 4
15508 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
15509 (mve_vaddq_n_<supf>): Likewise.
15510 (mve_vaddvaq_<supf>): Likewise.
15511 (mve_vaddvq_p_<supf>): Likewise.
15512 (mve_vandq_<supf>): Likewise.
15513 (mve_vbicq_<supf>): Likewise.
15514 (mve_vbrsrq_n_<supf>): Likewise.
15515 (mve_vcaddq_rot270_<supf>): Likewise.
15516 (mve_vcaddq_rot90_<supf>): Likewise.
15517 (mve_vcmpcsq_n_u): Likewise.
15518 (mve_vcmpcsq_u): Likewise.
15519 (mve_vcmpeqq_n_<supf>): Likewise.
15520 (mve_vcmpeqq_<supf>): Likewise.
15521 (mve_vcmpgeq_n_s): Likewise.
15522 (mve_vcmpgeq_s): Likewise.
15523 (mve_vcmpgtq_n_s): Likewise.
15524 (mve_vcmpgtq_s): Likewise.
15525 (mve_vcmphiq_n_u): Likewise.
15526 (mve_vcmphiq_u): Likewise.
15527 (mve_vcmpleq_n_s): Likewise.
15528 (mve_vcmpleq_s): Likewise.
15529 (mve_vcmpltq_n_s): Likewise.
15530 (mve_vcmpltq_s): Likewise.
15531 (mve_vcmpneq_n_<supf>): Likewise.
15532 (mve_vddupq_n_u): Likewise.
15533 (mve_veorq_<supf>): Likewise.
15534 (mve_vhaddq_n_<supf>): Likewise.
15535 (mve_vhaddq_<supf>): Likewise.
15536 (mve_vhcaddq_rot270_s): Likewise.
15537 (mve_vhcaddq_rot90_s): Likewise.
15538 (mve_vhsubq_n_<supf>): Likewise.
15539 (mve_vhsubq_<supf>): Likewise.
15540 (mve_vidupq_n_u): Likewise.
15541 (mve_vmaxaq_s): Likewise.
15542 (mve_vmaxavq_s): Likewise.
15543 (mve_vmaxq_<supf>): Likewise.
15544 (mve_vmaxvq_<supf>): Likewise.
15545 (mve_vminaq_s): Likewise.
15546 (mve_vminavq_s): Likewise.
15547 (mve_vminq_<supf>): Likewise.
15548 (mve_vminvq_<supf>): Likewise.
15549 (mve_vmladavq_<supf>): Likewise.
15550 (mve_vmladavxq_s): Likewise.
15551 (mve_vmlsdavq_s): Likewise.
15552 (mve_vmlsdavxq_s): Likewise.
15553 (mve_vmulhq_<supf>): Likewise.
15554 (mve_vmullbq_int_<supf>): Likewise.
15555 (mve_vmulltq_int_<supf>): Likewise.
15556 (mve_vmulq_n_<supf>): Likewise.
15557 (mve_vmulq_<supf>): Likewise.
15558 (mve_vornq_<supf>): Likewise.
15559 (mve_vorrq_<supf>): Likewise.
15560 (mve_vqaddq_n_<supf>): Likewise.
15561 (mve_vqaddq_<supf>): Likewise.
15562 (mve_vqdmulhq_n_s): Likewise.
15563 (mve_vqdmulhq_s): Likewise.
15564 (mve_vqrdmulhq_n_s): Likewise.
15565 (mve_vqrdmulhq_s): Likewise.
15566 (mve_vqrshlq_n_<supf>): Likewise.
15567 (mve_vqrshlq_<supf>): Likewise.
15568 (mve_vqshlq_n_<supf>): Likewise.
15569 (mve_vqshlq_r_<supf>): Likewise.
15570 (mve_vqshlq_<supf>): Likewise.
15571 (mve_vqshluq_n_s): Likewise.
15572 (mve_vqsubq_n_<supf>): Likewise.
15573 (mve_vqsubq_<supf>): Likewise.
15574 (mve_vrhaddq_<supf>): Likewise.
15575 (mve_vrmulhq_<supf>): Likewise.
15576 (mve_vrshlq_n_<supf>): Likewise.
15577 (mve_vrshlq_<supf>): Likewise.
15578 (mve_vrshrq_n_<supf>): Likewise.
15579 (mve_vshlq_n_<supf>): Likewise.
15580 (mve_vshlq_r_<supf>): Likewise.
15581 (mve_vsubq_n_<supf>): Likewise.
15582 (mve_vsubq_<supf>): Likewise.
15583 * config/arm/predicates.md (mve_imm_7): Define predicate to check
15584 the matching constraint Ra.
15585 (mve_imm_selective_upto_8): Define predicate to check the matching
15588 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15589 Mihail Ionescu <mihail.ionescu@arm.com>
15590 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15592 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
15593 qualifier for binary operands.
15594 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
15595 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
15596 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
15597 (vaddlvq_p_u32): Likewise.
15598 (vcmpneq_s8): Likewise.
15599 (vcmpneq_s16): Likewise.
15600 (vcmpneq_s32): Likewise.
15601 (vcmpneq_u8): Likewise.
15602 (vcmpneq_u16): Likewise.
15603 (vcmpneq_u32): Likewise.
15604 (vshlq_s8): Likewise.
15605 (vshlq_s16): Likewise.
15606 (vshlq_s32): Likewise.
15607 (vshlq_u8): Likewise.
15608 (vshlq_u16): Likewise.
15609 (vshlq_u32): Likewise.
15610 (__arm_vaddlvq_p_s32): Define intrinsic.
15611 (__arm_vaddlvq_p_u32): Likewise.
15612 (__arm_vcmpneq_s8): Likewise.
15613 (__arm_vcmpneq_s16): Likewise.
15614 (__arm_vcmpneq_s32): Likewise.
15615 (__arm_vcmpneq_u8): Likewise.
15616 (__arm_vcmpneq_u16): Likewise.
15617 (__arm_vcmpneq_u32): Likewise.
15618 (__arm_vshlq_s8): Likewise.
15619 (__arm_vshlq_s16): Likewise.
15620 (__arm_vshlq_s32): Likewise.
15621 (__arm_vshlq_u8): Likewise.
15622 (__arm_vshlq_u16): Likewise.
15623 (__arm_vshlq_u32): Likewise.
15624 (vaddlvq_p): Define polymorphic variant.
15625 (vcmpneq): Likewise.
15627 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
15629 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
15630 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
15631 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
15632 (mve_vcmpneq_<supf><mode>): Likewise.
15633 (mve_vshlq_<supf><mode>): Likewise.
15635 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15636 Mihail Ionescu <mihail.ionescu@arm.com>
15637 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15639 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
15640 qualifier for binary operands.
15641 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
15642 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
15643 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
15644 (vcvtq_n_s32_f32): Likewise.
15645 (vcvtq_n_u16_f16): Likewise.
15646 (vcvtq_n_u32_f32): Likewise.
15647 (vcreateq_u8): Likewise.
15648 (vcreateq_u16): Likewise.
15649 (vcreateq_u32): Likewise.
15650 (vcreateq_u64): Likewise.
15651 (vcreateq_s8): Likewise.
15652 (vcreateq_s16): Likewise.
15653 (vcreateq_s32): Likewise.
15654 (vcreateq_s64): Likewise.
15655 (vshrq_n_s8): Likewise.
15656 (vshrq_n_s16): Likewise.
15657 (vshrq_n_s32): Likewise.
15658 (vshrq_n_u8): Likewise.
15659 (vshrq_n_u16): Likewise.
15660 (vshrq_n_u32): Likewise.
15661 (__arm_vcreateq_u8): Define intrinsic.
15662 (__arm_vcreateq_u16): Likewise.
15663 (__arm_vcreateq_u32): Likewise.
15664 (__arm_vcreateq_u64): Likewise.
15665 (__arm_vcreateq_s8): Likewise.
15666 (__arm_vcreateq_s16): Likewise.
15667 (__arm_vcreateq_s32): Likewise.
15668 (__arm_vcreateq_s64): Likewise.
15669 (__arm_vshrq_n_s8): Likewise.
15670 (__arm_vshrq_n_s16): Likewise.
15671 (__arm_vshrq_n_s32): Likewise.
15672 (__arm_vshrq_n_u8): Likewise.
15673 (__arm_vshrq_n_u16): Likewise.
15674 (__arm_vshrq_n_u32): Likewise.
15675 (__arm_vcvtq_n_s16_f16): Likewise.
15676 (__arm_vcvtq_n_s32_f32): Likewise.
15677 (__arm_vcvtq_n_u16_f16): Likewise.
15678 (__arm_vcvtq_n_u32_f32): Likewise.
15679 (vshrq_n): Define polymorphic variant.
15680 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
15682 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
15683 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
15684 * config/arm/constraints.md (Rb): Define constraint to check constant is
15685 in the range of 1 to 8.
15686 (Rf): Define constraint to check constant is in the range of 1 to 32.
15687 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
15688 (mve_vshrq_n_<supf><mode>): Likewise.
15689 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
15690 * config/arm/predicates.md (mve_imm_8): Define predicate to check
15691 the matching constraint Rb.
15692 (mve_imm_32): Define predicate to check the matching constraint Rf.
15694 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15695 Mihail Ionescu <mihail.ionescu@arm.com>
15696 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15698 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
15699 qualifier for binary operands.
15700 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
15701 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
15702 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
15703 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
15704 (vsubq_n_f32): Likewise.
15705 (vbrsrq_n_f16): Likewise.
15706 (vbrsrq_n_f32): Likewise.
15707 (vcvtq_n_f16_s16): Likewise.
15708 (vcvtq_n_f32_s32): Likewise.
15709 (vcvtq_n_f16_u16): Likewise.
15710 (vcvtq_n_f32_u32): Likewise.
15711 (vcreateq_f16): Likewise.
15712 (vcreateq_f32): Likewise.
15713 (__arm_vsubq_n_f16): Define intrinsic.
15714 (__arm_vsubq_n_f32): Likewise.
15715 (__arm_vbrsrq_n_f16): Likewise.
15716 (__arm_vbrsrq_n_f32): Likewise.
15717 (__arm_vcvtq_n_f16_s16): Likewise.
15718 (__arm_vcvtq_n_f32_s32): Likewise.
15719 (__arm_vcvtq_n_f16_u16): Likewise.
15720 (__arm_vcvtq_n_f32_u32): Likewise.
15721 (__arm_vcreateq_f16): Likewise.
15722 (__arm_vcreateq_f32): Likewise.
15723 (vsubq): Define polymorphic variant.
15724 (vbrsrq): Likewise.
15725 (vcvtq_n): Likewise.
15726 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
15728 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
15729 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
15730 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
15731 * config/arm/constraints.md (Rd): Define constraint to check constant is
15732 in the range of 1 to 16.
15733 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
15734 mve_vbrsrq_n_f<mode>: Likewise.
15735 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
15736 mve_vcreateq_f<mode>: Likewise.
15737 * config/arm/predicates.md (mve_imm_16): Define predicate to check
15738 the matching constraint Rd.
15740 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15741 Mihail Ionescu <mihail.ionescu@arm.com>
15742 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15744 * config/arm/arm-builtins.c (hi_UP): Define mode.
15745 * config/arm/arm.h (IS_VPR_REGNUM): Move.
15746 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
15747 (APSRQ_REGNUM): Modify.
15748 (APSRGE_REGNUM): Modify.
15749 * config/arm/arm_mve.h (vctp16q): Define macro.
15750 (vctp32q): Likewise.
15751 (vctp64q): Likewise.
15752 (vctp8q): Likewise.
15754 (__arm_vctp16q): Define intrinsic.
15755 (__arm_vctp32q): Likewise.
15756 (__arm_vctp64q): Likewise.
15757 (__arm_vctp8q): Likewise.
15758 (__arm_vpnot): Likewise.
15759 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
15761 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
15762 (mve_vpnothi): Likewise.
15764 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15765 Mihail Ionescu <mihail.ionescu@arm.com>
15766 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15768 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
15769 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
15770 (vdupq_n_s16): Likewise.
15771 (vdupq_n_s32): Likewise.
15772 (vabsq_s8): Likewise.
15773 (vabsq_s16): Likewise.
15774 (vabsq_s32): Likewise.
15775 (vclsq_s8): Likewise.
15776 (vclsq_s16): Likewise.
15777 (vclsq_s32): Likewise.
15778 (vclzq_s8): Likewise.
15779 (vclzq_s16): Likewise.
15780 (vclzq_s32): Likewise.
15781 (vnegq_s8): Likewise.
15782 (vnegq_s16): Likewise.
15783 (vnegq_s32): Likewise.
15784 (vaddlvq_s32): Likewise.
15785 (vaddvq_s8): Likewise.
15786 (vaddvq_s16): Likewise.
15787 (vaddvq_s32): Likewise.
15788 (vmovlbq_s8): Likewise.
15789 (vmovlbq_s16): Likewise.
15790 (vmovltq_s8): Likewise.
15791 (vmovltq_s16): Likewise.
15792 (vmvnq_s8): Likewise.
15793 (vmvnq_s16): Likewise.
15794 (vmvnq_s32): Likewise.
15795 (vrev16q_s8): Likewise.
15796 (vrev32q_s8): Likewise.
15797 (vrev32q_s16): Likewise.
15798 (vqabsq_s8): Likewise.
15799 (vqabsq_s16): Likewise.
15800 (vqabsq_s32): Likewise.
15801 (vqnegq_s8): Likewise.
15802 (vqnegq_s16): Likewise.
15803 (vqnegq_s32): Likewise.
15804 (vcvtaq_s16_f16): Likewise.
15805 (vcvtaq_s32_f32): Likewise.
15806 (vcvtnq_s16_f16): Likewise.
15807 (vcvtnq_s32_f32): Likewise.
15808 (vcvtpq_s16_f16): Likewise.
15809 (vcvtpq_s32_f32): Likewise.
15810 (vcvtmq_s16_f16): Likewise.
15811 (vcvtmq_s32_f32): Likewise.
15812 (vmvnq_u8): Likewise.
15813 (vmvnq_u16): Likewise.
15814 (vmvnq_u32): Likewise.
15815 (vdupq_n_u8): Likewise.
15816 (vdupq_n_u16): Likewise.
15817 (vdupq_n_u32): Likewise.
15818 (vclzq_u8): Likewise.
15819 (vclzq_u16): Likewise.
15820 (vclzq_u32): Likewise.
15821 (vaddvq_u8): Likewise.
15822 (vaddvq_u16): Likewise.
15823 (vaddvq_u32): Likewise.
15824 (vrev32q_u8): Likewise.
15825 (vrev32q_u16): Likewise.
15826 (vmovltq_u8): Likewise.
15827 (vmovltq_u16): Likewise.
15828 (vmovlbq_u8): Likewise.
15829 (vmovlbq_u16): Likewise.
15830 (vrev16q_u8): Likewise.
15831 (vaddlvq_u32): Likewise.
15832 (vcvtpq_u16_f16): Likewise.
15833 (vcvtpq_u32_f32): Likewise.
15834 (vcvtnq_u16_f16): Likewise.
15835 (vcvtmq_u16_f16): Likewise.
15836 (vcvtmq_u32_f32): Likewise.
15837 (vcvtaq_u16_f16): Likewise.
15838 (vcvtaq_u32_f32): Likewise.
15839 (__arm_vdupq_n_s8): Define intrinsic.
15840 (__arm_vdupq_n_s16): Likewise.
15841 (__arm_vdupq_n_s32): Likewise.
15842 (__arm_vabsq_s8): Likewise.
15843 (__arm_vabsq_s16): Likewise.
15844 (__arm_vabsq_s32): Likewise.
15845 (__arm_vclsq_s8): Likewise.
15846 (__arm_vclsq_s16): Likewise.
15847 (__arm_vclsq_s32): Likewise.
15848 (__arm_vclzq_s8): Likewise.
15849 (__arm_vclzq_s16): Likewise.
15850 (__arm_vclzq_s32): Likewise.
15851 (__arm_vnegq_s8): Likewise.
15852 (__arm_vnegq_s16): Likewise.
15853 (__arm_vnegq_s32): Likewise.
15854 (__arm_vaddlvq_s32): Likewise.
15855 (__arm_vaddvq_s8): Likewise.
15856 (__arm_vaddvq_s16): Likewise.
15857 (__arm_vaddvq_s32): Likewise.
15858 (__arm_vmovlbq_s8): Likewise.
15859 (__arm_vmovlbq_s16): Likewise.
15860 (__arm_vmovltq_s8): Likewise.
15861 (__arm_vmovltq_s16): Likewise.
15862 (__arm_vmvnq_s8): Likewise.
15863 (__arm_vmvnq_s16): Likewise.
15864 (__arm_vmvnq_s32): Likewise.
15865 (__arm_vrev16q_s8): Likewise.
15866 (__arm_vrev32q_s8): Likewise.
15867 (__arm_vrev32q_s16): Likewise.
15868 (__arm_vqabsq_s8): Likewise.
15869 (__arm_vqabsq_s16): Likewise.
15870 (__arm_vqabsq_s32): Likewise.
15871 (__arm_vqnegq_s8): Likewise.
15872 (__arm_vqnegq_s16): Likewise.
15873 (__arm_vqnegq_s32): Likewise.
15874 (__arm_vmvnq_u8): Likewise.
15875 (__arm_vmvnq_u16): Likewise.
15876 (__arm_vmvnq_u32): Likewise.
15877 (__arm_vdupq_n_u8): Likewise.
15878 (__arm_vdupq_n_u16): Likewise.
15879 (__arm_vdupq_n_u32): Likewise.
15880 (__arm_vclzq_u8): Likewise.
15881 (__arm_vclzq_u16): Likewise.
15882 (__arm_vclzq_u32): Likewise.
15883 (__arm_vaddvq_u8): Likewise.
15884 (__arm_vaddvq_u16): Likewise.
15885 (__arm_vaddvq_u32): Likewise.
15886 (__arm_vrev32q_u8): Likewise.
15887 (__arm_vrev32q_u16): Likewise.
15888 (__arm_vmovltq_u8): Likewise.
15889 (__arm_vmovltq_u16): Likewise.
15890 (__arm_vmovlbq_u8): Likewise.
15891 (__arm_vmovlbq_u16): Likewise.
15892 (__arm_vrev16q_u8): Likewise.
15893 (__arm_vaddlvq_u32): Likewise.
15894 (__arm_vcvtpq_u16_f16): Likewise.
15895 (__arm_vcvtpq_u32_f32): Likewise.
15896 (__arm_vcvtnq_u16_f16): Likewise.
15897 (__arm_vcvtmq_u16_f16): Likewise.
15898 (__arm_vcvtmq_u32_f32): Likewise.
15899 (__arm_vcvtaq_u16_f16): Likewise.
15900 (__arm_vcvtaq_u32_f32): Likewise.
15901 (__arm_vcvtaq_s16_f16): Likewise.
15902 (__arm_vcvtaq_s32_f32): Likewise.
15903 (__arm_vcvtnq_s16_f16): Likewise.
15904 (__arm_vcvtnq_s32_f32): Likewise.
15905 (__arm_vcvtpq_s16_f16): Likewise.
15906 (__arm_vcvtpq_s32_f32): Likewise.
15907 (__arm_vcvtmq_s16_f16): Likewise.
15908 (__arm_vcvtmq_s32_f32): Likewise.
15909 (vdupq_n): Define polymorphic variant.
15914 (vaddlvq): Likewise.
15915 (vaddvq): Likewise.
15916 (vmovlbq): Likewise.
15917 (vmovltq): Likewise.
15919 (vrev16q): Likewise.
15920 (vrev32q): Likewise.
15921 (vqabsq): Likewise.
15922 (vqnegq): Likewise.
15923 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
15924 (UNOP_SNONE_NONE): Likewise.
15925 (UNOP_UNONE_UNONE): Likewise.
15926 (UNOP_UNONE_NONE): Likewise.
15927 * config/arm/constraints.md (e): Define new constriant to allow only
15929 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
15930 (mve_vnegq_s<mode>): Likewise.
15931 (mve_vmvnq_<supf><mode>): Likewise.
15932 (mve_vdupq_n_<supf><mode>): Likewise.
15933 (mve_vclzq_<supf><mode>): Likewise.
15934 (mve_vclsq_s<mode>): Likewise.
15935 (mve_vaddvq_<supf><mode>): Likewise.
15936 (mve_vabsq_s<mode>): Likewise.
15937 (mve_vrev32q_<supf><mode>): Likewise.
15938 (mve_vmovltq_<supf><mode>): Likewise.
15939 (mve_vmovlbq_<supf><mode>): Likewise.
15940 (mve_vcvtpq_<supf><mode>): Likewise.
15941 (mve_vcvtnq_<supf><mode>): Likewise.
15942 (mve_vcvtmq_<supf><mode>): Likewise.
15943 (mve_vcvtaq_<supf><mode>): Likewise.
15944 (mve_vrev16q_<supf>v16qi): Likewise.
15945 (mve_vaddlvq_<supf>v4si): Likewise.
15947 2020-03-17 Jakub Jelinek <jakub@redhat.com>
15949 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
15951 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
15953 * read-rtl-function.c (find_param_by_name,
15954 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
15956 * spellcheck.c (get_edit_distance_cutoff): Likewise.
15957 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
15958 * tree.def (SWITCH_EXPR): Likewise.
15959 * selftest.c (assert_str_contains): Likewise.
15960 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
15962 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
15963 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
15964 * langhooks.h (struct lang_hooks_for_decls): Likewise.
15965 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
15966 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
15968 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
15969 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
15970 * tree.c (component_ref_size): Likewise.
15971 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
15972 * gimple-ssa-sprintf.c (get_string_length, format_string,
15973 format_directive): Likewise.
15974 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
15975 * input.c (string_concat_db::get_string_concatenation,
15976 test_lexer_string_locations_ucn4): Likewise.
15977 * cfgexpand.c (pass_expand::execute): Likewise.
15978 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
15979 maybe_diag_overlap): Likewise.
15980 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
15981 * shrink-wrap.c (spread_components): Likewise.
15982 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
15984 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
15986 * dwarf2out.c (dwarf2out_early_finish): Likewise.
15987 * gimple-ssa-store-merging.c: Likewise.
15988 * ira-costs.c (record_operand_costs): Likewise.
15989 * tree-vect-loop.c (vectorizable_reduction): Likewise.
15990 * target.def (dispatch): Likewise.
15991 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
15992 in documentation text.
15993 * doc/tm.texi: Regenerated.
15994 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
15995 duplicated word issue in a comment.
15996 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
15997 * config/i386/i386-features.c (remove_partial_avx_dependency):
15999 * config/msp430/msp430.c (msp430_select_section): Likewise.
16000 * config/gcn/gcn-run.c (load_image): Likewise.
16001 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
16002 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
16003 * config/aarch64/falkor-tag-collision-avoidance.c
16004 (single_dest_per_chain): Likewise.
16005 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
16006 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
16007 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
16008 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
16010 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
16011 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
16012 * config/rs6000/rs6000-logue.c
16013 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
16014 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
16015 Fix various other issues in the comment.
16017 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
16019 * config/arm/t-rmprofile: create new multilib for
16020 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
16023 2020-03-17 Jakub Jelinek <jakub@redhat.com>
16025 PR tree-optimization/94015
16026 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
16027 function where EXP is address of the bytes being stored rather than
16028 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
16029 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
16030 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
16031 calling native_encode_expr if host or target doesn't have 8-bit
16032 chars. Formatting fixes.
16033 (count_nonzero_bytes_addr): New function.
16035 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16036 Mihail Ionescu <mihail.ionescu@arm.com>
16037 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16039 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
16040 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
16041 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
16042 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
16043 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
16044 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
16045 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
16046 (vmvnq_n_s32): Likewise.
16047 (vrev64q_s8): Likewise.
16048 (vrev64q_s16): Likewise.
16049 (vrev64q_s32): Likewise.
16050 (vcvtq_s16_f16): Likewise.
16051 (vcvtq_s32_f32): Likewise.
16052 (vrev64q_u8): Likewise.
16053 (vrev64q_u16): Likewise.
16054 (vrev64q_u32): Likewise.
16055 (vmvnq_n_u16): Likewise.
16056 (vmvnq_n_u32): Likewise.
16057 (vcvtq_u16_f16): Likewise.
16058 (vcvtq_u32_f32): Likewise.
16059 (__arm_vmvnq_n_s16): Define intrinsic.
16060 (__arm_vmvnq_n_s32): Likewise.
16061 (__arm_vrev64q_s8): Likewise.
16062 (__arm_vrev64q_s16): Likewise.
16063 (__arm_vrev64q_s32): Likewise.
16064 (__arm_vrev64q_u8): Likewise.
16065 (__arm_vrev64q_u16): Likewise.
16066 (__arm_vrev64q_u32): Likewise.
16067 (__arm_vmvnq_n_u16): Likewise.
16068 (__arm_vmvnq_n_u32): Likewise.
16069 (__arm_vcvtq_s16_f16): Likewise.
16070 (__arm_vcvtq_s32_f32): Likewise.
16071 (__arm_vcvtq_u16_f16): Likewise.
16072 (__arm_vcvtq_u32_f32): Likewise.
16073 (vrev64q): Define polymorphic variant.
16074 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
16075 (UNOP_SNONE_NONE): Likewise.
16076 (UNOP_SNONE_IMM): Likewise.
16077 (UNOP_UNONE_UNONE): Likewise.
16078 (UNOP_UNONE_NONE): Likewise.
16079 (UNOP_UNONE_IMM): Likewise.
16080 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
16081 (mve_vcvtq_from_f_<supf><mode>): Likewise.
16082 (mve_vmvnq_n_<supf><mode>): Likewise.
16084 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16085 Mihail Ionescu <mihail.ionescu@arm.com>
16086 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16088 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
16089 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
16090 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
16091 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
16092 (vrndxq_f32): Likewise.
16093 (vrndq_f16) Likewise.
16094 (vrndq_f32): Likewise.
16095 (vrndpq_f16): Likewise.
16096 (vrndpq_f32): Likewise.
16097 (vrndnq_f16): Likewise.
16098 (vrndnq_f32): Likewise.
16099 (vrndmq_f16): Likewise.
16100 (vrndmq_f32): Likewise.
16101 (vrndaq_f16): Likewise.
16102 (vrndaq_f32): Likewise.
16103 (vrev64q_f16): Likewise.
16104 (vrev64q_f32): Likewise.
16105 (vnegq_f16): Likewise.
16106 (vnegq_f32): Likewise.
16107 (vdupq_n_f16): Likewise.
16108 (vdupq_n_f32): Likewise.
16109 (vabsq_f16): Likewise.
16110 (vabsq_f32): Likewise.
16111 (vrev32q_f16): Likewise.
16112 (vcvttq_f32_f16): Likewise.
16113 (vcvtbq_f32_f16): Likewise.
16114 (vcvtq_f16_s16): Likewise.
16115 (vcvtq_f32_s32): Likewise.
16116 (vcvtq_f16_u16): Likewise.
16117 (vcvtq_f32_u32): Likewise.
16118 (__arm_vrndxq_f16): Define intrinsic.
16119 (__arm_vrndxq_f32): Likewise.
16120 (__arm_vrndq_f16): Likewise.
16121 (__arm_vrndq_f32): Likewise.
16122 (__arm_vrndpq_f16): Likewise.
16123 (__arm_vrndpq_f32): Likewise.
16124 (__arm_vrndnq_f16): Likewise.
16125 (__arm_vrndnq_f32): Likewise.
16126 (__arm_vrndmq_f16): Likewise.
16127 (__arm_vrndmq_f32): Likewise.
16128 (__arm_vrndaq_f16): Likewise.
16129 (__arm_vrndaq_f32): Likewise.
16130 (__arm_vrev64q_f16): Likewise.
16131 (__arm_vrev64q_f32): Likewise.
16132 (__arm_vnegq_f16): Likewise.
16133 (__arm_vnegq_f32): Likewise.
16134 (__arm_vdupq_n_f16): Likewise.
16135 (__arm_vdupq_n_f32): Likewise.
16136 (__arm_vabsq_f16): Likewise.
16137 (__arm_vabsq_f32): Likewise.
16138 (__arm_vrev32q_f16): Likewise.
16139 (__arm_vcvttq_f32_f16): Likewise.
16140 (__arm_vcvtbq_f32_f16): Likewise.
16141 (__arm_vcvtq_f16_s16): Likewise.
16142 (__arm_vcvtq_f32_s32): Likewise.
16143 (__arm_vcvtq_f16_u16): Likewise.
16144 (__arm_vcvtq_f32_u32): Likewise.
16145 (vrndxq): Define polymorphic variants.
16147 (vrndpq): Likewise.
16148 (vrndnq): Likewise.
16149 (vrndmq): Likewise.
16150 (vrndaq): Likewise.
16151 (vrev64q): Likewise.
16154 (vrev32q): Likewise.
16155 (vcvtbq_f32): Likewise.
16156 (vcvttq_f32): Likewise.
16158 * config/arm/arm_mve_builtins.def (VAR2): Define.
16160 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
16161 (mve_vrndq_f<mode>): Likewise.
16162 (mve_vrndpq_f<mode>): Likewise.
16163 (mve_vrndnq_f<mode>): Likewise.
16164 (mve_vrndmq_f<mode>): Likewise.
16165 (mve_vrndaq_f<mode>): Likewise.
16166 (mve_vrev64q_f<mode>): Likewise.
16167 (mve_vnegq_f<mode>): Likewise.
16168 (mve_vdupq_n_f<mode>): Likewise.
16169 (mve_vabsq_f<mode>): Likewise.
16170 (mve_vrev32q_fv8hf): Likewise.
16171 (mve_vcvttq_f32_f16v4sf): Likewise.
16172 (mve_vcvtbq_f32_f16v4sf): Likewise.
16173 (mve_vcvtq_to_f_<supf><mode>): Likewise.
16175 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
16176 Mihail Ionescu <mihail.ionescu@arm.com>
16177 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16179 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
16181 (ARM_BUILTIN_MVE_PATTERN_START): Define.
16182 (arm_init_mve_builtins): Define function.
16183 (arm_init_builtins): Add TARGET_HAVE_MVE check.
16184 (arm_expand_builtin_1): Check the range of fcode.
16185 (arm_expand_mve_builtin): Define function to expand MVE builtins.
16186 (arm_expand_builtin): Check the range of fcode.
16187 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
16189 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
16190 (vst4q_s8): Define macro.
16191 (vst4q_s16): Likewise.
16192 (vst4q_s32): Likewise.
16193 (vst4q_u8): Likewise.
16194 (vst4q_u16): Likewise.
16195 (vst4q_u32): Likewise.
16196 (vst4q_f16): Likewise.
16197 (vst4q_f32): Likewise.
16198 (__arm_vst4q_s8): Define inline builtin.
16199 (__arm_vst4q_s16): Likewise.
16200 (__arm_vst4q_s32): Likewise.
16201 (__arm_vst4q_u8): Likewise.
16202 (__arm_vst4q_u16): Likewise.
16203 (__arm_vst4q_u32): Likewise.
16204 (__arm_vst4q_f16): Likewise.
16205 (__arm_vst4q_f32): Likewise.
16206 (__ARM_mve_typeid): Define macro with MVE types.
16207 (__ARM_mve_coerce): Define macro with _Generic feature.
16208 (vst4q): Define polymorphic variant for different vst4q builtins.
16209 * config/arm/arm_mve_builtins.def: New file.
16210 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
16212 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
16213 (unspec): Define unspec.
16214 (mve_vst4q<mode>): Define RTL pattern.
16215 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
16217 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
16219 (define_split): Allow OI mode split for MVE after reload.
16220 (define_split): Allow XI mode split for MVE after reload.
16221 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
16222 (arm-builtins.o): Likewise.
16224 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
16226 * c-typeck.c (process_init_element): Handle constructor_type with
16227 type size represented by POLY_INT_CST.
16229 2020-03-17 Jakub Jelinek <jakub@redhat.com>
16231 PR tree-optimization/94187
16232 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
16233 nchars - offset < nbytes.
16235 PR middle-end/94189
16236 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
16237 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
16238 for code-generation.
16240 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
16243 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
16244 after changing memory subreg.
16246 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
16247 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16249 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
16250 emulator calls for dobule precision arithmetic operations for MVE.
16252 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
16253 Mihail Ionescu <mihail.ionescu@arm.com>
16254 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16256 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
16257 feature bit is on and -mfpu=auto is passed as compiler option, do not
16258 generate error on not finding any matching fpu. Because in this case
16259 fpu is not required.
16260 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
16261 enabled for MVE and also for all VFP extensions.
16262 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
16264 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
16265 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
16266 along with feature bits mve_float.
16267 (mve): Modify add options in armv8.1-m.main arch for MVE.
16268 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
16270 * config/arm/arm.c (use_return_insn): Replace the
16271 check with TARGET_VFP_BASE.
16272 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
16274 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
16275 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
16277 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
16278 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
16280 (arm_compute_frame_layout): Likewise.
16281 (arm_save_coproc_regs): Likewise.
16282 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
16284 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
16285 with equivalent macro TARGET_VFP_BASE.
16286 (arm_expand_epilogue_apcs_frame): Likewise.
16287 (arm_expand_epilogue): Likewise.
16288 (arm_conditional_register_usage): Likewise.
16289 (arm_declare_function_name): Add check to skip printing .fpu directive
16290 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
16292 * config/arm/arm.h (TARGET_VFP_BASE): Define.
16293 * config/arm/arm.md (arch): Add "mve" to arch.
16294 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
16295 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
16296 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
16297 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
16299 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
16300 to not allow for MVE.
16301 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
16303 (VUNSPEC_GET_FPSCR): Define.
16304 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
16305 instructions which move to general-purpose Register from Floating-point
16306 Special register and vice-versa.
16307 (thumb2_movhi_fp16): Likewise.
16308 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
16309 with MCR and MRC instructions which set and get Floating-point Status
16310 and Control Register (FPSCR).
16311 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
16313 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
16314 float move patterns in MVE.
16315 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
16316 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
16317 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
16318 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
16319 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
16320 TARGET_VFP_BASE check.
16321 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
16322 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
16324 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
16325 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
16329 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
16330 Mihail Ionescu <mihail.ionescu@arm.com>
16331 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16333 * config.gcc (arm_mve.h): Include mve intrinsics header file.
16334 * config/arm/aout.h (p0): Add new register name for MVE predicated
16336 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
16337 common to Neon and MVE.
16338 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
16339 (arm_init_simd_builtin_types): Disable poly types for MVE.
16340 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
16341 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
16342 ARM_BUILTIN_NEON_LANE_CHECK.
16343 (mve_dereference_pointer): Add function.
16344 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
16346 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
16347 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
16348 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
16349 with floating point enabled.
16350 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
16351 simd_immediate_valid_for_move.
16352 (simd_immediate_valid_for_move): Renamed from
16353 neon_immediate_valid_for_move function.
16354 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
16355 error if vfpv2 feature bit is disabled and mve feature bit is also
16356 disabled for HARD_FLOAT_ABI.
16357 (use_return_insn): Check to not push VFP regs for MVE.
16358 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
16360 (aapcs_vfp_allocate_return_reg): Likewise.
16361 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
16362 address operand for MVE.
16363 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
16364 (neon_valid_immediate): Rename to simd_valid_immediate.
16365 (simd_valid_immediate): Rename from neon_valid_immediate.
16366 (simd_valid_immediate): MVE check on size of vector is 128 bits.
16367 (neon_immediate_valid_for_move): Rename to
16368 simd_immediate_valid_for_move.
16369 (simd_immediate_valid_for_move): Rename from
16370 neon_immediate_valid_for_move.
16371 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
16373 (neon_make_constant): Modify call to neon_valid_immediate function.
16374 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
16376 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
16377 (arm_compute_frame_layout): Calculate space for saved VFP registers for
16379 (arm_save_coproc_regs): Save coproc registers for MVE.
16380 (arm_print_operand): Add case 'E' to print memory operands for MVE.
16381 (arm_print_operand_address): Check to print register number for MVE.
16382 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
16383 (arm_modes_tieable_p): Check to allow structure mode for MVE.
16384 (arm_regno_class): Add VPR_REGNUM check.
16385 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
16387 (arm_expand_epilogue): MVE check for enabling pop instructions in
16389 (arm_print_asm_arch_directives): Modify function to disable print of
16390 .arch_extension "mve" and "fp" for cases where MVE is enabled with
16392 (arm_vector_mode_supported_p): Check for modes available in MVE interger
16393 and MVE floating point.
16394 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
16396 (arm_conditional_register_usage): Enable usage of conditional regsiter
16398 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
16399 (arm_declare_function_name): Modify function to disable print of
16400 .arch_extension "mve" and "fp" for cases where MVE is enabled with
16402 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
16403 when target general registers are required.
16404 (TARGET_HAVE_MVE_FLOAT): Likewise.
16405 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
16407 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
16408 which indicate this is not available for across function calls.
16409 (FIRST_PSEUDO_REGISTER): Modify.
16410 (VALID_MVE_MODE): Define valid MVE mode.
16411 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
16412 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
16413 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
16414 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
16416 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
16417 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
16418 (enum reg_class): Add VPR_REG entry.
16419 (REG_CLASS_NAMES): Add VPR_REG entry.
16420 * config/arm/arm.md (VPR_REGNUM): Define.
16421 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
16422 "unconditional" instructions.
16423 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
16424 (movdf_soft_insn): Modify RTL to not allow for MVE.
16425 (vfp_pop_multiple_with_writeback): Enable for MVE.
16426 (include "mve.md"): Include mve.md file.
16427 * config/arm/arm_mve.h: Add MVE intrinsics head file.
16428 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
16429 for vector predicated operands.
16430 * config/arm/iterators.md (VNIM1): Define.
16431 (VNINOTM1): Define.
16432 (VHFBF_split): Define
16433 * config/arm/mve.md: New file.
16434 (mve_mov<mode>): Define RTL for move, store and load in MVE.
16435 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
16437 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
16438 simd_immediate_valid_for_move.
16439 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
16440 is common to MVE and NEON to vec-common.md file.
16441 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
16442 * config/arm/predicates.md (vpr_register_operand): Define.
16443 * config/arm/t-arm: Add mve.md file.
16444 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
16446 (mve_store): Add MVE instructions mve_store to attribute "type".
16447 (mve_load): Add MVE instructions mve_load to attribute "type".
16448 (is_mve_type): Define attribute.
16449 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
16450 standard move patterns in MVE along with NEON and IWMMXT with mode
16452 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
16453 and IWMMXT with mode iterator V8HF.
16454 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
16456 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
16457 simd_immediate_valid_for_move.
16460 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
16463 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
16464 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
16466 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
16468 2020-03-16 Jakub Jelinek <jakub@redhat.com>
16471 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
16474 PR tree-optimization/94166
16475 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
16476 as secondary comparison key.
16478 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
16480 PR tree-optimization/94125
16481 * tree-loop-distribution.c
16482 (loop_distribution::break_alias_scc_partitions): Update post order
16483 number for merged scc.
16485 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
16488 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
16490 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
16491 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
16492 and ext_sse_reg_operand check.
16494 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
16496 * common.opt: Avoid redundancy in the help text.
16497 * config/arc/arc.opt: Likewise.
16498 * config/cr16/cr16.opt: Likewise.
16500 2020-03-14 Jakub Jelinek <jakub@redhat.com>
16502 PR middle-end/93566
16503 * tree-nested.c (convert_nonlocal_omp_clauses,
16504 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
16505 with C/C++ array sections.
16507 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
16510 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
16511 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
16514 2020-03-14 Jakub Jelinek <jakub@redhat.com>
16516 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
16517 "a an" to "an" in a comment.
16518 * hsa-common.h (is_a_helper): Likewise.
16519 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
16520 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
16521 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
16523 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
16526 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
16527 64-bit value by 64 bits (UB).
16529 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
16531 PR rtl-optimization/92303
16532 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
16534 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
16536 PR rtl-optimization/94148
16537 PR rtl-optimization/94042
16538 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
16539 (df_worklist_propagate_forward): New parameter last_change_age, use
16540 that instead of bb->aux.
16541 (df_worklist_propagate_backward): Ditto.
16542 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
16544 2020-03-13 Richard Biener <rguenther@suse.de>
16546 PR tree-optimization/94163
16547 * tree-ssa-pre.c (create_expression_by_pieces): Check
16548 whether alignment would be zero.
16550 2020-03-13 Martin Liska <mliska@suse.cz>
16553 * lto-wrapper.c (run_gcc): Use concat for appending
16554 to collect_gcc_options.
16556 2020-03-13 Jakub Jelinek <jakub@redhat.com>
16559 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
16560 instead of GEN_INT.
16562 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
16565 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
16566 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
16567 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
16568 TARGET_AVX512VL and ext_sse_reg_operand check.
16570 2020-03-13 Bu Le <bule1@huawei.com>
16573 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
16574 (-param=aarch64-double-recp-precision=): New options.
16575 * doc/invoke.texi: Document them.
16576 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
16577 instead of hard-coding the choice of 1 for float and 2 for double.
16579 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
16581 PR rtl-optimization/94119
16582 * resource.h (clear_hashed_info_until_next_barrier): Declare.
16583 * resource.c (clear_hashed_info_until_next_barrier): New function.
16584 * reorg.c (add_to_delay_list): Fix formatting.
16585 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
16586 the next instruction after removing a BARRIER.
16588 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
16590 PR middle-end/92071
16591 * expmed.c (store_integral_bit_field): For fields larger than a word,
16592 call extract_bit_field on the value if the mode is BLKmode. Remove
16593 specific path for big-endian targets and tidy things up a little bit.
16595 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
16597 PR rtl-optimization/90275
16598 * cse.c (cse_insn): Delete no-op register moves too.
16600 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
16602 * config/rx/rx.md (CTRLREG_CPEN): Remove.
16603 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
16605 2020-03-12 Richard Biener <rguenther@suse.de>
16607 PR tree-optimization/94103
16608 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
16609 punning when the mode precision is not sufficient.
16611 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
16614 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
16615 MODE_V1DF and MODE_V2SF.
16616 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
16617 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
16620 2020-03-12 Jakub Jelinek <jakub@redhat.com>
16622 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
16623 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
16624 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
16625 * doc/tm.texi: Regenerated.
16627 PR tree-optimization/94130
16628 * tree-ssa-dse.c: Include gimplify.h.
16629 (increment_start_addr): If stmt has lhs, drop the lhs from call and
16630 set it after the call to the original value of the first argument.
16632 (decrement_count): Formatting fix.
16634 2020-03-11 Delia Burduv <delia.burduv@arm.com>
16636 * config/arm/arm-builtins.c
16637 (arm_init_simd_builtin_scalar_types): New.
16638 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
16639 (vld2q_bf16): Used new builtin type.
16640 (vld3_bf16): Used new builtin type.
16641 (vld3q_bf16): Used new builtin type.
16642 (vld4_bf16): Used new builtin type.
16643 (vld4q_bf16): Used new builtin type.
16644 (vld2_dup_bf16): Used new builtin type.
16645 (vld2q_dup_bf16): Used new builtin type.
16646 (vld3_dup_bf16): Used new builtin type.
16647 (vld3q_dup_bf16): Used new builtin type.
16648 (vld4_dup_bf16): Used new builtin type.
16649 (vld4q_dup_bf16): Used new builtin type.
16651 2020-03-11 Jakub Jelinek <jakub@redhat.com>
16654 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
16655 at the start to switch to data section. Don't print extra newline if
16656 .globl directive has not been emitted.
16658 2020-03-11 Richard Biener <rguenther@suse.de>
16660 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
16663 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
16665 PR middle-end/93961
16666 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
16667 whose type is a qualified union.
16669 2020-03-11 Jakub Jelinek <jakub@redhat.com>
16672 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
16673 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
16676 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
16678 (get_nth_most_common_value): Use abs_hwi instead of abs.
16680 PR middle-end/94111
16681 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
16682 is rvc_normal, otherwise use real_to_decimal to print the number to
16685 PR tree-optimization/94114
16686 * tree-loop-distribution.c (generate_memset_builtin): Call
16687 rewrite_to_non_trapping_overflow even on mem.
16688 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
16691 2020-03-10 Jeff Law <law@redhat.com>
16693 * config/bfin/bfin.md (movsi_insv): Add length attribute.
16695 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
16698 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
16699 NAN and SIGNED_ZEROR for smax/smin.
16701 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
16704 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
16705 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
16707 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
16709 * loop-iv.c (find_simple_exit): Make it static.
16710 * cfgloop.h: Remove the corresponding prototype.
16712 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
16714 * ddg.c (create_ddg): Fix intendation.
16715 (set_recurrence_length): Likewise.
16716 (create_ddg_all_sccs): Likewise.
16718 2020-03-10 Jakub Jelinek <jakub@redhat.com>
16721 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
16722 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
16725 2020-03-09 Jason Merrill <jason@redhat.com>
16727 * gdbinit.in (pgs): Fix typo in documentation.
16729 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
16733 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
16735 PR rtl-optimization/93564
16736 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
16737 do not honor reg alloc order.
16739 2020-03-09 Andrew Pinski <apinski@marvell.com>
16741 PR inline-asm/94095
16742 * doc/extend.texi (x86 Operand Modifiers): Fix column
16745 2020-03-09 Martin Liska <mliska@suse.cz>
16748 * config/rs6000/rs6000.c (rs6000_option_override_internal):
16749 Remove set of str_align_loops and str_align_jumps as these
16750 should be set in previous 2 conditions in the function.
16752 2020-03-09 Jakub Jelinek <jakub@redhat.com>
16754 PR rtl-optimization/94045
16755 * params.opt (-param=max-find-base-term-values=): New option.
16756 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
16757 in a single toplevel find_base_term call.
16759 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
16762 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
16763 * config/aarch64/aarch64-simd.md
16764 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
16765 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
16766 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
16767 * config/aarch64/arm_neon.h:
16768 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
16769 (vmlal_lane_u16): Likewise.
16770 (vmlal_lane_s32): Likewise.
16771 (vmlal_lane_u32): Likewise.
16772 (vmlal_laneq_s16): Likewise.
16773 (vmlal_laneq_u16): Likewise.
16774 (vmlal_laneq_s32): Likewise.
16775 (vmlal_laneq_u32): Likewise.
16776 (vmull_lane_s16): Likewise.
16777 (vmull_lane_u16): Likewise.
16778 (vmull_lane_s32): Likewise.
16779 (vmull_lane_u32): Likewise.
16780 (vmull_laneq_s16): Likewise.
16781 (vmull_laneq_u16): Likewise.
16782 (vmull_laneq_s32): Likewise.
16783 (vmull_laneq_u32): Likewise.
16784 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
16787 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
16789 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
16790 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
16791 (aarch64_mls_elt<mode>): Likewise.
16792 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
16793 (aarch64_fma4_elt<mode>): Likewise.
16794 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
16795 (aarch64_fma4_elt_to_64v2df): Likewise.
16796 (aarch64_fnma4_elt<mode>): Likewise.
16797 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
16798 (aarch64_fnma4_elt_to_64v2df): Likewise.
16800 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16802 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
16803 Specify movprfx attribute.
16804 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
16806 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
16809 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
16811 (TARGET_NO_FP_IN_TOC): Same.
16812 * config/rs6000/aix71.h: Same.
16813 * config/rs6000/aix72.h: Same.
16815 2020-03-06 Andrew Pinski <apinski@marvell.com>
16816 Jeff Law <law@redhat.com>
16818 PR rtl-optimization/93996
16819 * haifa-sched.c (remove_notes): Be more careful when adding
16822 2020-03-06 Delia Burduv <delia.burduv@arm.com>
16824 * config/arm/arm_neon.h (vld2_bf16): New.
16830 (vld2_dup_bf16): New.
16831 (vld2q_dup_bf16): New.
16832 (vld3_dup_bf16): New.
16833 (vld3q_dup_bf16): New.
16834 (vld4_dup_bf16): New.
16835 (vld4q_dup_bf16): New.
16836 * config/arm/arm_neon_builtins.def
16837 (vld2): Changed to VAR13 and added v4bf, v8bf
16838 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
16839 (vld3): Changed to VAR13 and added v4bf, v8bf
16840 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
16841 (vld4): Changed to VAR13 and added v4bf, v8bf
16842 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
16843 * config/arm/iterators.md (VDXBF2): New iterator.
16844 *config/arm/neon.md (neon_vld2): Use new iterators.
16845 (neon_vld2_dup<mode): Use new iterators.
16846 (neon_vld3<mode>): Likewise.
16847 (neon_vld3qa<mode>): Likewise.
16848 (neon_vld3qb<mode>): Likewise.
16849 (neon_vld3_dup<mode>): Likewise.
16850 (neon_vld4<mode>): Likewise.
16851 (neon_vld4qa<mode>): Likewise.
16852 (neon_vld4qb<mode>): Likewise.
16853 (neon_vld4_dup<mode>): Likewise.
16854 (neon_vld2_dupv8bf): New.
16855 (neon_vld3_dupv8bf): Likewise.
16856 (neon_vld4_dupv8bf): Likewise.
16858 2020-03-06 Delia Burduv <delia.burduv@arm.com>
16860 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
16861 (bfloat16x8x2_t): New typedef.
16862 (bfloat16x4x3_t): New typedef.
16863 (bfloat16x8x3_t): New typedef.
16864 (bfloat16x4x4_t): New typedef.
16865 (bfloat16x8x4_t): New typedef.
16872 * config/arm/arm-builtins.c (v2bf_UP): Define.
16874 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
16875 * config/arm/arm-modes.def (V2BF): New mode.
16876 * config/arm/arm-simd-builtin-types.def
16877 (Bfloat16x2_t): New entry.
16878 * config/arm/arm_neon_builtins.def
16879 (vst2): Changed to VAR13 and added v4bf, v8bf
16880 (vst3): Changed to VAR13 and added v4bf, v8bf
16881 (vst4): Changed to VAR13 and added v4bf, v8bf
16882 * config/arm/iterators.md (VDXBF): New iterator.
16883 (VQ2BF): New iterator.
16884 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
16885 (neon_vst2<mode>): Used new iterators.
16886 (neon_vst3<mode>): Used new iterators.
16887 (neon_vst3<mode>): Used new iterators.
16888 (neon_vst3qa<mode>): Used new iterators.
16889 (neon_vst3qb<mode>): Used new iterators.
16890 (neon_vst4<mode>): Used new iterators.
16891 (neon_vst4<mode>): Used new iterators.
16892 (neon_vst4qa<mode>): Used new iterators.
16893 (neon_vst4qb<mode>): Used new iterators.
16895 2020-03-06 Delia Burduv <delia.burduv@arm.com>
16897 * config/aarch64/aarch64-simd-builtins.def
16898 (bfcvtn): New built-in function.
16899 (bfcvtn_q): New built-in function.
16900 (bfcvtn2): New built-in function.
16901 (bfcvt): New built-in function.
16902 * config/aarch64/aarch64-simd.md
16903 (aarch64_bfcvtn<q><mode>): New pattern.
16904 (aarch64_bfcvtn2v8bf): New pattern.
16905 (aarch64_bfcvtbf): New pattern.
16906 * config/aarch64/arm_bf16.h (float32_t): New typedef.
16907 (vcvth_bf16_f32): New intrinsic.
16908 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
16909 (vcvtq_low_bf16_f32): New intrinsic.
16910 (vcvtq_high_bf16_f32): New intrinsic.
16911 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
16912 (UNSPEC_BFCVTN): New UNSPEC.
16913 (UNSPEC_BFCVTN2): New UNSPEC.
16914 (UNSPEC_BFCVT): New UNSPEC.
16915 * config/arm/types.md (bf_cvt): New type.
16917 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
16919 * config/s390/s390.md ("tabort"): Get rid of two consecutive
16920 blanks in format string.
16922 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
16926 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
16927 * config/i386/i386.c (ix86_get_ssemov): New function.
16928 (ix86_output_ssemov): Likewise.
16929 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
16930 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
16932 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
16933 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
16934 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
16935 (*movti_internal): Likewise.
16936 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
16938 2020-03-05 Jeff Law <law@redhat.com>
16940 PR tree-optimization/91890
16941 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
16942 Use gimple_or_expr_nonartificial_location.
16943 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
16944 Use gimple_or_expr_nonartificial_location.
16945 * gimple.c (gimple_or_expr_nonartificial_location): New function.
16946 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
16947 * tree-ssa-strlen.c (maybe_warn_overflow): Use
16948 gimple_or_expr_nonartificial_location.
16949 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
16950 (maybe_warn_pointless_strcmp): Likewise.
16952 2020-03-05 Jakub Jelinek <jakub@redhat.com>
16955 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
16956 SRC and MASK arguments to __m128 from __m128d.
16957 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
16959 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
16961 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
16962 argument to __m128i from __m128d.
16963 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
16965 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
16966 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
16969 2020-03-05 Delia Burduv <delia.burduv@arm.com>
16971 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
16972 (vbfmlalbq_f32): New.
16973 (vbfmlaltq_f32): New.
16974 (vbfmlalbq_lane_f32): New.
16975 (vbfmlaltq_lane_f32): New.
16976 (vbfmlalbq_laneq_f32): New.
16977 (vbfmlaltq_laneq_f32): New.
16978 * config/arm/arm_neon_builtins.def (vmmla): New.
16983 (vfmab_laneq): New.
16984 (vfmat_laneq): New.
16985 * config/arm/iterators.md (BF_MA): New int iterator.
16986 (bt): New int attribute.
16987 (VQXBF): Copy of VQX with V8BF.
16988 * config/arm/neon.md (neon_vmmlav8bf): New insn.
16989 (neon_vfma<bt>v8bf): New insn.
16990 (neon_vfma<bt>_lanev8bf): New insn.
16991 (neon_vfma<bt>_laneqv8bf): New expand.
16992 (neon_vget_high<mode>): Changed iterator to VQXBF.
16993 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
16994 (UNSPEC_BFMAB): New UNSPEC.
16995 (UNSPEC_BFMAT): New UNSPEC.
16997 2020-03-05 Jakub Jelinek <jakub@redhat.com>
16999 PR middle-end/93399
17000 * tree-pretty-print.h (pretty_print_string): Declare.
17001 * tree-pretty-print.c (pretty_print_string): Remove forward
17002 declaration, no longer static. Change nbytes parameter type
17003 from unsigned to size_t.
17004 * print-rtl.c (print_value) <case CONST_STRING>: Use
17005 pretty_print_string and for shrink way too long strings.
17007 2020-03-05 Richard Biener <rguenther@suse.de>
17008 Jakub Jelinek <jakub@redhat.com>
17010 PR tree-optimization/93582
17011 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
17012 last operand as signed when looking for memset offset. Formatting
17015 2020-03-04 Andrew Pinski <apinski@marvell.com>
17018 * value-prof.c (dump_histogram_value): Use std::abs.
17020 2020-03-04 Martin Sebor <msebor@redhat.com>
17022 PR tree-optimization/93986
17023 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
17024 operands to the same precision widest_int to avoid ICEs.
17026 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
17029 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
17030 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
17031 for OPTION_MASK_ALTIVEC.
17033 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
17035 * config.gcc: Include the glibc-stdint.h header for zTPF.
17037 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
17039 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
17040 direct FPR-GPR copies.
17041 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
17044 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
17046 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
17047 operands to the prologue_tpf expander.
17048 (s390_emit_epilogue): Likewise.
17049 (s390_option_override_internal): Do error checking and setup for
17051 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
17052 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
17053 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
17054 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
17055 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
17056 operands for the check flag and the branch target.
17057 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
17058 ("mtpf-trace-hook-prologue-target")
17059 ("mtpf-trace-hook-epilogue-check")
17060 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
17062 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
17063 options are for debugging purposes and will not be documented
17066 2020-03-04 Jakub Jelinek <jakub@redhat.com>
17069 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
17071 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
17072 argument. Change pd argument so that it can be modified. Turn
17073 constant non-CONSTRUCTOR store into non-constant if it is too large.
17074 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
17076 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
17079 2020-02-04 Richard Biener <rguenther@suse.de>
17081 PR tree-optimization/93964
17082 * graphite-isl-ast-to-gimple.c
17083 (gcc_expression_from_isl_ast_expr_id): Add intermediate
17084 conversion for pointer to integer converts.
17085 * graphite-scop-detection.c (assign_parameter_index_in_region):
17088 2020-03-04 Martin Liska <mliska@suse.cz>
17092 * doc/invoke.texi: Clarify --help=language and --help=common
17095 2020-03-04 Jakub Jelinek <jakub@redhat.com>
17097 PR tree-optimization/94001
17098 * tree-tailcall.c (process_assignment): Before comparing op1 to
17099 *ass_var, verify *ass_var is non-NULL.
17101 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
17104 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
17107 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
17109 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
17110 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
17111 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
17112 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
17113 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
17114 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
17115 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
17116 (V_bf_low, V_bf_cvt_m): New mode attributes.
17117 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
17118 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
17119 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
17120 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
17121 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
17123 2020-03-03 Jakub Jelinek <jakub@redhat.com>
17125 PR tree-optimization/93582
17126 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
17127 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
17128 members, initialize them in the constructor and if mask is non-NULL,
17129 artificially push_partial_def {} for the portions of the mask that
17131 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
17132 val and return (void *)-1. Formatting fix.
17133 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
17135 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
17136 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
17138 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
17140 (visit_stmt): Formatting fix.
17142 2020-03-03 Richard Biener <rguenther@suse.de>
17144 PR tree-optimization/93946
17145 * alias.h (refs_same_for_tbaa_p): Declare.
17146 * alias.c (refs_same_for_tbaa_p): New function.
17147 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
17149 * tree-ssa-scopedtables.h
17150 (avail_exprs_stack::lookup_avail_expr): Add output argument
17151 giving access to the hashtable entry.
17152 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
17154 * tree-ssa-dom.c: Include alias.h.
17155 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
17156 removing redundant store.
17157 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
17158 (ao_ref_init_from_vn_reference): Adjust prototype.
17159 (vn_reference_lookup_pieces): Likewise.
17160 (vn_reference_insert_pieces): Likewise.
17161 * tree-ssa-sccvn.c: Track base alias set in addition to alias
17163 (eliminate_dom_walker::eliminate_stmt): Also check base alias
17164 set when removing redundant stores.
17165 (visit_reference_op_store): Likewise.
17166 * dse.c (record_store): Adjust valdity check for redundant
17169 2020-03-03 Jakub Jelinek <jakub@redhat.com>
17172 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
17174 PR rtl-optimization/94002
17175 * explow.c (plus_constant): Punt if cst has VOIDmode and
17176 get_pool_mode is different from mode.
17178 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
17180 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
17181 address has an offset which fits the scalling constraint for a
17182 load/store operation.
17183 (legitimate_scaled_address_p): Update use
17184 leigitimate_small_data_address_p.
17185 (arc_print_operand): Likewise.
17186 (arc_legitimate_address_p): Likewise.
17187 (legitimate_small_data_address_p): Likewise.
17189 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
17191 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
17192 (fnmasf4_fpu): Likewise.
17194 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
17196 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
17198 (subdi3): Likewise.
17199 (adddi3_i): Remove pattern.
17200 (subdi3_i): Likewise.
17202 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
17204 * config/arc/arc.md (eh_return): Add length info.
17206 2020-03-02 David Malcolm <dmalcolm@redhat.com>
17208 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
17210 2020-03-02 David Malcolm <dmalcolm@redhat.com>
17212 * doc/invoke.texi (Static Analyzer Options): Add
17213 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
17216 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
17219 * config/i386/i386.md (movstrict<mode>): Allow only
17220 registers with VALID_INT_MODE_P modes.
17222 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
17224 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
17225 (reduc_insn): Use 'U' and 'B' operand codes.
17226 (reduc_<reduc_op>_scal_<mode>): Allow all types.
17227 (reduc_<reduc_op>_scal_v64di): Delete.
17228 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
17229 (*plus_carry_dpp_shr_v64si): Change to ...
17230 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
17231 (mov_from_lane63_v64di): Change to ...
17232 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
17233 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
17234 Support UNSPEC_MOV_DPP_SHR output formats.
17235 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
17236 Add "use_extends" reductions.
17237 (print_operand_address): Add 'I' and 'U' codes.
17238 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
17240 2020-03-02 Martin Liska <mliska@suse.cz>
17242 * lto-wrapper.c: Fix typo in comment about
17243 C++ standard version.
17245 2020-03-01 Martin Sebor <msebor@redhat.com>
17248 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
17250 2020-03-01 Martin Sebor <msebor@redhat.com>
17252 PR middle-end/93829
17253 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
17254 of a pointer in the outermost ADDR_EXPRs.
17256 2020-02-28 Jeff Law <law@redhat.com>
17258 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
17259 * config/v850/v850.c (v850_asm_trampoline_template): Update
17262 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
17265 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
17268 2020-02-28 Martin Liska <mliska@suse.cz>
17271 * configure.ac: Improve detection of ld_date by requiring
17272 either two dashes or none.
17273 * configure: Regenerate.
17275 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
17277 PR rtl-optimization/93564
17278 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
17279 do not honor reg alloc order.
17281 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
17284 * config/aarch64/aarch64.c (aarch64_override_options): Fix
17285 misleading warning string.
17287 2020-02-27 Martin Sebor <msebor@redhat.com>
17289 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
17291 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
17294 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
17295 Split the insn into two parts. This insn only does variable
17296 extract from a register.
17297 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
17298 variable extract from memory.
17299 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
17300 only does variable extract from a register.
17301 (vsx_extract_v4sf_var_load): New insn, do variable extract from
17303 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
17304 into two parts. This insn only does variable extract from a
17306 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
17307 do variable extract from memory.
17309 2020-02-27 Martin Jambor <mjambor@suse.cz>
17310 Feng Xue <fxue@os.amperecomputing.com>
17313 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
17314 new function calls_same_node_or_its_all_contexts_clone_p.
17315 (cgraph_edge_brings_value_p): Use it.
17316 (cgraph_edge_brings_value_p): Likewise.
17317 (self_recursive_pass_through_p): Return false if caller is a clone.
17318 (self_recursive_agg_pass_through_p): Likewise.
17320 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
17322 PR middle-end/92152
17323 * alias.c (ends_tbaa_access_path_p): Break out from ...
17324 (component_uses_parent_alias_set_from): ... here.
17325 * alias.h (ends_tbaa_access_path_p): Declare.
17326 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
17327 handle trailing arrays past end of tbaa access path.
17328 (aliasing_component_refs_p): ... here; likewise.
17329 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
17330 path; disambiguate also past end of it.
17331 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
17334 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
17336 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
17337 beginning of the file.
17338 (vcreate_bf16, vcombine_bf16): New.
17339 (vdup_n_bf16, vdupq_n_bf16): New.
17340 (vdup_lane_bf16, vdup_laneq_bf16): New.
17341 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
17342 (vduph_lane_bf16, vduph_laneq_bf16): New.
17343 (vset_lane_bf16, vsetq_lane_bf16): New.
17344 (vget_lane_bf16, vgetq_lane_bf16): New.
17345 (vget_high_bf16, vget_low_bf16): New.
17346 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
17347 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
17348 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
17349 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
17350 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
17351 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
17352 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
17353 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
17354 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
17355 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
17356 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
17357 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
17358 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
17359 (vreinterpretq_bf16_p128): New.
17360 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
17361 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
17362 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
17363 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
17364 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
17365 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
17366 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
17367 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
17368 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
17369 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
17370 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
17371 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
17372 (vreinterpretq_p128_bf16): New.
17373 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
17374 (V_elem): Likewise.
17375 (V_elem_l): Likewise.
17376 (VD_LANE): Likewise.
17378 (V_DOUBLE): Likewise.
17379 (VDQX): Add V4BF and V8BF.
17380 (V_two_elem, V_three_elem, V_four_elem): Likewise.
17382 (V_HALF): Likewise.
17383 (V_double_vector_mode): Likewise.
17384 (V_cmp_result): Likewise.
17385 (V_uf_sclr): Likewise.
17386 (V_sz_elem): Likewise.
17387 (Is_d_reg): Likewise.
17388 (V_mode_nunits): Likewise.
17389 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
17391 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
17393 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
17394 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
17395 (<expander><mode>3<exec>): Likewise.
17396 (<expander><mode>3): New.
17397 (v<expander><mode>3): New.
17398 (<expander><mode>3): New.
17399 (<expander><mode>3<exec>): Rename to ...
17400 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
17401 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
17403 2020-02-27 Alexandre Oliva <oliva@adacore.com>
17405 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
17408 2020-02-27 Richard Biener <rguenther@suse.de>
17410 PR tree-optimization/93508
17411 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
17412 non-_CHK variants. Valueize their length arguments.
17414 2020-02-27 Richard Biener <rguenther@suse.de>
17416 PR tree-optimization/93953
17417 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
17418 to the hash-map entry.
17420 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
17422 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
17424 2020-02-27 Mark Williams <mwilliams@fb.com>
17426 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
17427 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
17428 -ffile-prefix-map and -fmacro-prefix-map.
17429 * lto-streamer-out.c: Include file-prefix-map.h.
17430 (lto_output_location): Remap the file part of locations.
17432 2020-02-27 Jakub Jelinek <jakub@redhat.com>
17435 * gimplify.c (gimplify_init_constructor): Don't promote readonly
17436 DECL_REGISTER variables to TREE_STATIC.
17438 PR tree-optimization/93582
17439 PR tree-optimization/93945
17440 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
17441 non-zero INTEGER_CST second argument and ref->offset or ref->size
17442 not a multiple of BITS_PER_UNIT.
17444 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
17446 * doc/install.texi (Binaries): Update description of BullFreeware.
17448 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
17452 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
17453 C++ Language Options, Warning Options, and Static Analyzer
17454 Options lists. Document negative form of options enabled by
17455 default. Move some things around to more accurately sort
17456 warnings by category.
17457 (C++ Dialect Options, Warning Options, Static Analyzer
17458 Options): Document negative form of options when enabled by
17459 default. Move some things around to more accurately sort
17460 warnings by category. Add some missing index entries.
17461 Light copy-editing.
17463 2020-02-26 Carl Love <cel@us.ibm.com>
17466 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
17467 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
17468 for the vector unsigned short arguments. It is also listed as the
17469 name of the built-in for arguments vector unsigned short,
17470 vector unsigned int and vector unsigned long long built-ins. The
17471 name of the builtins for these arguments should be:
17472 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
17473 __builtin_crypto_vpmsumd respectively.
17475 2020-02-26 Richard Biener <rguenther@suse.de>
17477 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
17478 and load permutation.
17480 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
17482 PR middle-end/93843
17483 * optabs-tree.c (supportable_convert_operation): Reject types with
17486 2020-02-26 David Malcolm <dmalcolm@redhat.com>
17488 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
17490 2020-02-26 Jakub Jelinek <jakub@redhat.com>
17492 PR tree-optimization/93820
17493 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
17494 argument to ALL_INTEGER_CST_P boolean.
17495 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
17496 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
17497 adjacent INTEGER_CST store into merged_store->only_constants like
17500 2020-02-25 Jakub Jelinek <jakub@redhat.com>
17503 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
17505 * cfghooks.c (verify_flow_info): Likewise.
17506 * predict.c (combine_predictions_for_bb): Likewise.
17507 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
17508 sucessor -> successor.
17509 (find_traces_1_round): Fix comment typo, destinarion -> destination.
17510 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
17512 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
17513 message typo, sucessors -> successors.
17515 2020-02-25 Martin Sebor <msebor@redhat.com>
17517 * doc/extend.texi (attribute access): Correct an example.
17519 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
17521 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
17523 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
17524 (VAR15, VAR16): New.
17525 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
17526 (VD): Enable for V4BF.
17528 (VQ): Enable for V8BF.
17530 (VQ_NO2E): Likewise.
17531 (VDBL, Vdbl): Add V4BF.
17532 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
17533 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
17534 (bfloat16x8x2_t): Likewise.
17535 (bfloat16x4x3_t): Likewise.
17536 (bfloat16x8x3_t): Likewise.
17537 (bfloat16x4x4_t): Likewise.
17538 (bfloat16x8x4_t): Likewise.
17539 (vcombine_bf16): New.
17540 (vld1_bf16, vld1_bf16_x2): New.
17541 (vld1_bf16_x3, vld1_bf16_x4): New.
17542 (vld1q_bf16, vld1q_bf16_x2): New.
17543 (vld1q_bf16_x3, vld1q_bf16_x4): New.
17544 (vld1_lane_bf16): New.
17545 (vld1q_lane_bf16): New.
17546 (vld1_dup_bf16): New.
17547 (vld1q_dup_bf16): New.
17550 (vld2_dup_bf16): New.
17551 (vld2q_dup_bf16): New.
17554 (vld3_dup_bf16): New.
17555 (vld3q_dup_bf16): New.
17558 (vld4_dup_bf16): New.
17559 (vld4q_dup_bf16): New.
17560 (vst1_bf16, vst1_bf16_x2): New.
17561 (vst1_bf16_x3, vst1_bf16_x4): New.
17562 (vst1q_bf16, vst1q_bf16_x2): New.
17563 (vst1q_bf16_x3, vst1q_bf16_x4): New.
17564 (vst1_lane_bf16): New.
17565 (vst1q_lane_bf16): New.
17573 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
17575 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
17576 (VALL_F16): Likewise.
17577 (VALLDI_F16): Likewise.
17579 (Vetype): Likewise.
17580 (vswap_width_name): Likewise.
17581 (VSWAP_WIDTH): Likewise.
17585 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
17586 (vget_lane_bf16, vgetq_lane_bf16): New.
17587 (vcreate_bf16): New.
17588 (vdup_n_bf16, vdupq_n_bf16): New.
17589 (vdup_lane_bf16, vdup_laneq_bf16): New.
17590 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
17591 (vduph_lane_bf16, vduph_laneq_bf16): New.
17592 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
17593 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
17594 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
17595 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
17596 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
17597 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
17598 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
17599 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
17600 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
17601 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
17602 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
17603 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
17604 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
17605 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
17606 (vreinterpretq_bf16_p128): New.
17607 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
17608 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
17609 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
17610 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
17611 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
17612 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
17613 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
17614 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
17615 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
17616 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
17617 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
17618 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
17619 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
17620 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
17621 (vreinterpretq_p128_bf16): New.
17623 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
17625 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
17626 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
17627 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
17628 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
17629 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
17630 * config/arm/iterators.md (VSF2BF): New attribute.
17631 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
17632 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
17633 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
17635 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
17637 * config/arm/arm.md (required_for_purecode): New attribute.
17638 (enabled): Handle required_for_purecode.
17639 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
17640 work with -mpure-code.
17642 2020-02-25 Jakub Jelinek <jakub@redhat.com>
17644 PR rtl-optimization/93908
17645 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
17648 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
17650 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
17652 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
17654 * doc/install.texi (--enable-checking): Adjust wording.
17656 2020-02-25 Richard Biener <rguenther@suse.de>
17658 PR tree-optimization/93868
17659 * tree-vect-slp.c (slp_copy_subtree): New function.
17660 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
17661 re-arranging stmts in it.
17663 2020-02-25 Jakub Jelinek <jakub@redhat.com>
17665 PR middle-end/93874
17666 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
17667 dummy function and remove it at the end.
17669 PR translation/93864
17670 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
17671 paramter -> parameter.
17672 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
17673 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
17675 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
17677 * doc/install.texi (--enable-checking): Properly document current
17679 (--enable-stage1-checking): Minor clarification about bootstrap.
17681 2020-02-24 David Malcolm <dmalcolm@redhat.com>
17684 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
17685 -fanalyzer-checker=taint is also required.
17686 (-fanalyzer-checker=): Note that providing this option enables the
17687 given checker, and doing so may be required for checkers that are
17688 disabled by default.
17690 2020-02-24 David Malcolm <dmalcolm@redhat.com>
17692 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
17693 significant control flow events; add a "3" which shows all
17694 control flow events; the old "3" becomes "4".
17696 2020-02-24 Jakub Jelinek <jakub@redhat.com>
17698 PR tree-optimization/93582
17699 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
17700 pd.offset and pd.size to be counted in bits rather than bytes, add
17701 support for maxsizei that is not a multiple of BITS_PER_UNIT and
17702 handle bitfield stores and loads.
17703 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
17704 uncomparable quantities - bytes vs. bits. Allow push_partial_def
17705 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
17706 pd.offset/pd.size to be counted in bits rather than bytes.
17707 Formatting fix. Rename shadowed len variable to buflen.
17709 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
17710 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
17713 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
17714 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
17715 * opts-common.c (parse_options_from_collect_gcc_options): New function.
17716 (prepend_xassembler_to_collect_as_options): Likewise.
17717 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
17718 (prepend_xassembler_to_collect_as_options): Likewise.
17719 * lto-opts.c (lto_write_options): Stream assembler options
17720 in COLLECT_AS_OPTIONS.
17721 * lto-wrapper.c (xassembler_options_error): New static variable.
17722 (get_options_from_collect_gcc_options): Move parsing options code to
17723 parse_options_from_collect_gcc_options and call it.
17724 (merge_and_complain): Validate -Xassembler options.
17725 (append_compiler_options): Handle OPT_Xassembler.
17726 (run_gcc): Append command line -Xassembler options to
17727 collect_gcc_options.
17728 * doc/invoke.texi: Add documentation about using Xassembler
17731 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
17733 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
17735 (riscv_rtx_costs): Update cost model for LTGT.
17737 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
17739 PR rtl-optimization/93564
17740 * ira-color.c (struct update_cost_queue_elem): New member start.
17741 (queue_update_cost, get_next_update_cost): Add new arg start.
17742 (allocnos_conflict_p): New function.
17743 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
17744 Add checking conflicts with allocnos_conflict_p.
17745 (update_costs_from_prefs, restore_costs_from_copies): Adjust
17746 update_costs_from_allocno calls.
17747 (update_conflict_hard_regno_costs): Add checking conflicts with
17748 allocnos_conflict_p. Adjust calls of queue_update_cost and
17749 get_next_update_cost.
17750 (assign_hard_reg): Adjust calls of queue_update_cost. Add
17752 (bucket_allocno_compare_func): Restore previous version.
17754 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
17756 * config/pa/pa.c (pa_function_value): Fix check for word and
17757 double-word size when handling aggregate return values.
17758 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
17759 that homogeneous SFmode and DFmode aggregates are passed and returned
17760 in general registers.
17762 2020-02-21 Jakub Jelinek <jakub@redhat.com>
17764 PR translation/93759
17765 * opts.c (print_filtered_help): Translate help before appending
17766 messages to it rather than after that.
17768 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
17770 PR rtl-optimization/PR92989
17771 * lra-lives.c (process_bb_lives): Restore the original order
17772 of the bb liveness update. Call make_hard_regno_dead for each
17773 register clobbered at the start of an EH receiver.
17775 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
17778 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
17779 self-recursively generated.
17781 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
17784 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
17787 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
17789 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
17790 Document new target supports option.
17792 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
17794 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
17795 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
17796 * config/arm/iterators.md (MATMUL): New iterator.
17797 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
17798 (mmla_sfx): New attribute.
17799 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
17800 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
17801 (UNSPEC_MATMUL_US): New.
17803 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
17805 * config/arm/arm.md: Prevent scalar shifts from being used when big
17808 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
17809 Richard Biener <rguenther@suse.de>
17811 PR tree-optimization/93586
17812 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
17813 after mismatched array refs; do not sure type size information to
17814 recover from unmatched referneces with !flag_strict_aliasing_p.
17816 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
17818 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
17819 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
17820 (scatter_store<mode>): Rename to ...
17821 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
17822 (scatter<mode>_exec): Delete. Move contents ...
17823 (mask_scatter_store<mode>): ... here, and rename that to ...
17824 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
17825 Remove mode conversion.
17826 (mask_gather_load<mode>): Rename to ...
17827 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
17828 Remove mode conversion.
17829 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
17831 2020-02-21 Martin Jambor <mjambor@suse.cz>
17833 PR tree-optimization/93845
17834 * tree-sra.c (verify_sra_access_forest): Only test access size of
17837 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
17839 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
17840 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
17841 (addv64di3_exec): Likewise.
17842 (subv64di3): Likewise.
17843 (subv64di3_exec): Likewise.
17844 (addv64di3_zext): Likewise.
17845 (addv64di3_zext_exec): Likewise.
17846 (addv64di3_zext_dup): Likewise.
17847 (addv64di3_zext_dup_exec): Likewise.
17848 (addv64di3_zext_dup2): Likewise.
17849 (addv64di3_zext_dup2_exec): Likewise.
17850 (addv64di3_sext_dup2): Likewise.
17851 (addv64di3_sext_dup2_exec): Likewise.
17852 (<expander>v64di3): Likewise.
17853 (<expander>v64di3_exec): Likewise.
17854 (*<reduc_op>_dpp_shr_v64di): Likewise.
17855 (*plus_carry_dpp_shr_v64di): Likewise.
17856 * config/gcn/gcn.md (adddi3): Likewise.
17857 (addptrdi3): Likewise.
17858 (<expander>di3): Likewise.
17860 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
17862 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
17864 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17866 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
17867 support. Use aarch64_emit_mult instead of emitting multiplication
17868 instructions directly.
17869 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
17870 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
17872 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17874 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
17875 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
17876 instead of emitting multiplication instructions directly.
17877 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
17878 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
17879 (@aarch64_frecps<mode>): New expanders.
17881 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17883 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
17884 on and produce uint64_ts rather than ints.
17885 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
17886 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
17888 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17890 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
17891 an unused xmsk register when handling approximate rsqrt.
17893 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17895 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
17896 flag_finite_math_only condition.
17898 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
17901 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
17902 to destination operand for shufps alternative.
17903 (*vec_extractv2si_1): Ditto.
17905 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
17908 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
17911 2020-02-20 Martin Liska <mliska@suse.cz>
17913 PR translation/93831
17914 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
17916 2020-02-20 Martin Liska <mliska@suse.cz>
17918 PR translation/93830
17919 * common/config/avr/avr-common.c: Remote trailing "|".
17921 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
17923 * collect2.c (maybe_run_lto_and_relink): Fix typo in
17926 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
17928 PR tree-optimization/93767
17929 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
17930 access-size bias from the offset calculations for negative strides.
17932 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
17934 * collect2.c (c_file, o_file): Make const again.
17935 (ldout,lderrout, dump_ld_file): Remove.
17936 (tool_cleanup): Avoid calling not signal-safe functions.
17937 (maybe_run_lto_and_relink): Avoid possible signal handler
17938 access to unintialzed memory (lto_o_files).
17939 (main): Avoid leaking temp files in $TMPDIR.
17940 Initialize c_file/o_file with concat, which avoids exposing
17941 uninitialized memory to signal handler, which calls unlink(!).
17942 Avoid calling maybe_unlink when the main function returns,
17943 since the atexit handler is already doing this.
17944 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
17946 2020-02-19 Martin Jambor <mjambor@suse.cz>
17948 PR tree-optimization/93776
17949 * tree-sra.c (create_access): Do not create zero size accesses.
17950 (get_access_for_expr): Do not search for zero sized accesses.
17952 2020-02-19 Martin Jambor <mjambor@suse.cz>
17954 PR tree-optimization/93667
17955 * tree-sra.c (scalarizable_type_p): Return false if record fields
17956 do not follow wach other.
17958 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
17960 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
17961 rather than fmv.x.s/fmv.s.x.
17963 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
17965 * config/aarch64/aarch64-simd-builtins.def
17966 (intrinsic_vec_smult_lo_): New.
17967 (intrinsic_vec_umult_lo_): Likewise.
17968 (vec_widen_smult_hi_): Likewise.
17969 (vec_widen_umult_hi_): Likewise.
17970 * config/aarch64/aarch64-simd.md
17971 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
17972 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
17973 (vmull_high_s16): Likewise.
17974 (vmull_high_s32): Likewise.
17975 (vmull_high_u8): Likewise.
17976 (vmull_high_u16): Likewise.
17977 (vmull_high_u32): Likewise.
17978 (vmull_s8): Likewise.
17979 (vmull_s16): Likewise.
17980 (vmull_s32): Likewise.
17981 (vmull_u8): Likewise.
17982 (vmull_u16): Likewise.
17983 (vmull_u32): Likewise.
17985 2020-02-18 Martin Liska <mliska@suse.cz>
17987 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
17988 bootstrap by missing removal of invalid sanity check.
17990 2020-02-18 Martin Liska <mliska@suse.cz>
17993 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
17994 Always compare LHS of gimple_assign.
17996 2020-02-18 Martin Liska <mliska@suse.cz>
17999 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
18000 and return type of functions.
18001 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
18002 Drop MALLOC attribute for void functions.
18003 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
18004 malloc_state for a new VOID clone.
18006 2020-02-18 Martin Liska <mliska@suse.cz>
18009 * common.opt: Add -fprofile-reproducibility.
18010 * doc/invoke.texi: Document it.
18011 * value-prof.c (dump_histogram_value):
18012 Document and support behavior for counters[0]
18013 being a negative value.
18014 (get_nth_most_common_value): Handle negative
18015 counters[0] in respect to flag_profile_reproducible.
18017 2020-02-18 Jakub Jelinek <jakub@redhat.com>
18020 * cgraph.c (verify_speculative_call): Use speculative_id instead of
18021 speculative_uid in messages. Remove trailing whitespace from error
18022 message. Use num_speculative_call_targets instead of
18023 num_speculative_targets in a message.
18024 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
18025 edge messages and stmt instead of cal_stmt in reference message.
18027 PR tree-optimization/93780
18028 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
18029 before calling build_vector_type.
18030 (execute_update_addresses_taken): Likewise.
18033 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
18034 typo, functoin -> function.
18035 * tree.c (free_lang_data_in_decl): Fix comment typo,
18036 functoin -> function.
18037 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
18039 2020-02-17 David Malcolm <dmalcolm@redhat.com>
18041 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
18043 (print_option_information): Don't call get_option_url if URLs
18046 2020-02-17 Alexandre Oliva <oliva@adacore.com>
18048 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
18049 handling of register_common-less targets.
18051 2020-02-17 Martin Liska <mliska@suse.cz>
18054 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
18056 2020-02-17 Martin Liska <mliska@suse.cz>
18058 PR translation/93755
18059 * config/rs6000/rs6000.c (rs6000_option_override_internal):
18062 2020-02-17 Martin Liska <mliska@suse.cz>
18065 * config/rx/elf.opt: Fix typo.
18067 2020-02-17 Richard Biener <rguenther@suse.de>
18070 * opts-global.c (print_ignored_options): Use inform and
18073 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
18076 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
18078 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
18081 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
18082 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
18084 2020-02-15 Jason Merrill <jason@redhat.com>
18086 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
18088 2020-02-15 Jakub Jelinek <jakub@redhat.com>
18090 PR tree-optimization/93744
18091 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
18092 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
18093 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
18094 sure @2 in the first and @1 in the other patterns has no side-effects.
18096 2020-02-15 David Malcolm <dmalcolm@redhat.com>
18097 Bernd Edlinger <bernd.edlinger@hotmail.de>
18101 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
18102 * configure.ac (--with-diagnostics-urls): New configuration
18103 option, based on --with-diagnostics-color.
18104 (DIAGNOSTICS_URLS_DEFAULT): New define.
18105 * config.h: Regenerate.
18106 * configure: Regenerate.
18107 * diagnostic.c (diagnostic_urls_init): Handle -1 for
18108 DIAGNOSTICS_URLS_DEFAULT from configure-time
18109 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
18110 and TERM_URLS environment variable.
18111 * diagnostic-url.h (diagnostic_url_format): New enum type.
18112 (diagnostic_urls_enabled_p): rename to...
18113 (determine_url_format): ... this, and change return type.
18114 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
18115 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
18116 the linux console, and mingw.
18117 (diagnostic_urls_enabled_p): rename to...
18118 (determine_url_format): ... this, and adjust.
18119 * pretty-print.h (pretty_printer::show_urls): rename to...
18120 (pretty_printer::url_format): ... this, and change to enum.
18121 * pretty-print.c (pretty_printer::pretty_printer,
18122 pp_begin_url, pp_end_url, test_urls): Adjust.
18123 * doc/install.texi (--with-diagnostics-urls): Document the new
18124 configuration option.
18125 (--with-diagnostics-color): Document the existing interaction
18126 with GCC_COLORS better.
18127 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
18128 vindex reference. Update description of defaults based on the above.
18129 (-fdiagnostics-color): Update description of how -fdiagnostics-color
18130 interacts with GCC_COLORS.
18132 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
18135 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
18136 conjunction with TARGET_GNU_TLS in early return.
18138 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
18140 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
18141 the mode is not wider than UNITS_PER_WORD.
18143 2020-02-14 Martin Jambor <mjambor@suse.cz>
18145 PR tree-optimization/93516
18146 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
18147 access of the same type as the parent.
18148 (propagate_subaccesses_from_lhs): Likewise.
18150 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
18153 * config/i386/avx512vbmi2intrin.h
18154 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
18155 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
18156 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
18157 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
18158 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
18159 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
18160 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
18161 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
18162 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
18163 of lacking a closing parenthesis.
18164 * config/i386/avx512vbmi2vlintrin.h
18165 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
18166 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
18167 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
18168 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
18169 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
18170 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
18171 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
18172 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
18173 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
18174 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
18175 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
18176 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
18177 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
18178 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
18179 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
18180 _mm_shldi_epi32, _mm_mask_shldi_epi32,
18181 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
18182 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
18184 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
18187 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
18188 the target function entry.
18190 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
18192 * common/config/arc/arc-common.c (arc_option_optimization_table):
18193 Disable if-conversion step when optimized for size.
18195 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
18197 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
18198 R12-R15 are always in ARCOMPACT16_REGS register class.
18199 * config/arc/arc.opt (mq-class): Deprecate.
18200 * config/arc/constraint.md ("q"): Remove dependency on mq-class
18202 * doc/invoke.texi (mq-class): Update text.
18203 * common/config/arc/arc-common.c (arc_option_optimization_table):
18206 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
18208 * config/arc/arc.c (arc_insn_cost): New function.
18209 (TARGET_INSN_COST): Define.
18210 * config/arc/arc.md (cost): New attribute.
18211 (add_n): Use arc_nonmemory_operand.
18212 (ashlsi3_insn): Likewise, also update constraints.
18213 (ashrsi3_insn): Likewise.
18214 (rotrsi3): Likewise.
18215 (add_shift): Likewise.
18216 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
18218 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
18220 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
18222 (umulsidi_600): Likewise.
18224 2020-02-13 Jakub Jelinek <jakub@redhat.com>
18227 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
18228 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
18229 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
18230 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
18231 pass __A to the builtin followed by __W instead of __A followed by
18233 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
18234 _mm512_mask_popcnt_epi64): Likewise.
18235 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
18236 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
18237 _mm256_mask_popcnt_epi64): Likewise.
18239 PR tree-optimization/93582
18240 * fold-const.h (shift_bytes_in_array_left,
18241 shift_bytes_in_array_right): Declare.
18242 * fold-const.c (shift_bytes_in_array_left,
18243 shift_bytes_in_array_right): New function, moved from
18244 gimple-ssa-store-merging.c, no longer static.
18245 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
18246 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
18247 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
18248 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
18249 shift_bytes_in_array.
18250 (verify_shift_bytes_in_array): Rename to ...
18251 (verify_shift_bytes_in_array_left): ... this. Use
18252 shift_bytes_in_array_left instead of shift_bytes_in_array.
18253 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
18254 instead of verify_shift_bytes_in_array.
18255 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
18256 / native_interpret_expr where the store covers all needed bits,
18257 punt on PDP-endian, otherwise allow all involved offsets and sizes
18258 not to be byte-aligned.
18261 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
18262 use const_0_to_255_operand predicate instead of immediate_operand.
18263 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
18264 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
18265 vgf2p8affineinvqb_<mode><mask_name>,
18266 vgf2p8affineqb_<mode><mask_name>): Drop mode from
18267 const_0_to_255_operand predicated operands.
18269 2020-02-12 Jeff Law <law@redhat.com>
18271 * config/h8300/h8300.md (comparison shortening peepholes): Use
18272 a mode iterator to merge the HImode and SImode peepholes.
18274 2020-02-12 Jakub Jelinek <jakub@redhat.com>
18276 PR middle-end/93663
18277 * real.c (is_even): Make static. Function comment fix.
18278 (is_halfway_below): Make static, don't assert R is not inf/nan,
18279 instead return false for those. Small formatting fixes.
18281 2020-02-12 Martin Sebor <msebor@redhat.com>
18283 PR middle-end/93646
18284 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
18285 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
18286 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
18287 (strlen_check_and_optimize_call): Adjust callee name.
18289 2020-02-12 Jeff Law <law@redhat.com>
18291 * config/h8300/h8300.md (comparison shortening peepholes): Drop
18292 (and (xor)) variant. Combine other two into single peephole.
18294 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
18296 PR rtl-optimization/93565
18297 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
18299 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
18301 * config/aarch64/aarch64-simd.md
18302 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
18303 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
18304 generating separate ADDV and zero_extend patterns.
18305 * config/aarch64/iterators.md (VDQV_E): New iterator.
18307 2020-02-12 Jeff Law <law@redhat.com>
18309 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
18310 expanders, splits, etc.
18311 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
18312 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
18313 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
18314 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
18315 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
18316 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
18317 function prototype.
18318 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
18320 2020-02-12 Jakub Jelinek <jakub@redhat.com>
18323 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
18324 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
18325 TARGET_AVX512DQ from condition.
18326 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
18327 instead of <mask_mode512bit_condition> in condition. If
18328 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
18330 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
18333 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
18336 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
18338 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
18340 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
18341 where strlen is more legible.
18342 (rs6000_builtin_vectorized_libmass): Ditto.
18343 (rs6000_print_options_internal): Ditto.
18345 2020-02-11 Martin Sebor <msebor@redhat.com>
18347 PR tree-optimization/93683
18348 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
18350 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
18352 * config/rs6000/predicates.md (cint34_operand): Rename the
18353 -mprefixed-addr option to be -mprefixed.
18354 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
18355 the -mprefixed-addr option to be -mprefixed.
18356 (OTHER_FUTURE_MASKS): Likewise.
18357 (POWERPC_MASKS): Likewise.
18358 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
18359 the -mprefixed-addr option to be -mprefixed. Change error
18360 messages to refer to -mprefixed.
18361 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
18363 (rs6000_legitimate_offset_address_p): Likewise.
18364 (rs6000_mode_dependent_address): Likewise.
18365 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
18366 "-mprefixed" for target attributes and pragmas.
18367 (address_to_insn_form): Rename the -mprefixed-addr option to be
18369 (rs6000_adjust_insn_length): Likewise.
18370 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
18371 -mprefixed-addr option to be -mprefixed.
18372 (ASM_OUTPUT_OPCODE): Likewise.
18373 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
18374 -mprefixed-addr option to be -mprefixed.
18375 * config/rs6000/rs6000.opt (-mprefixed): Rename the
18376 -mprefixed-addr option to be prefixed. Change the option from
18377 being undocumented to being documented.
18378 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
18379 -mprefixed option. Update the -mpcrel documentation to mention
18382 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
18384 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
18385 including FIRST_PSEUDO_REGISTER - 1.
18386 * ira-color.c (print_hard_reg_set): Ditto.
18388 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18390 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
18391 (USTERNOP_QUALIFIERS): New define.
18392 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
18393 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
18394 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
18395 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
18396 * config/arm/arm_neon.h (vusdot_s32): New.
18397 (vusdot_lane_s32): New.
18398 (vusdotq_lane_s32): New.
18399 (vsudot_lane_s32): New.
18400 (vsudotq_lane_s32): New.
18401 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
18402 * config/arm/iterators.md (DOTPROD_I8MM): New.
18403 (sup, opsuffix): Add <us/su>.
18404 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
18405 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
18407 2020-02-11 Richard Biener <rguenther@suse.de>
18409 PR tree-optimization/93661
18410 PR tree-optimization/93662
18411 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
18412 tree_to_poly_int64.
18413 * tree-sra.c (get_access_for_expr): Likewise.
18415 2020-02-10 Jakub Jelinek <jakub@redhat.com>
18418 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
18419 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
18420 Change condition from TARGET_AVX2 to TARGET_AVX.
18422 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
18425 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
18426 argument of strncmp.
18428 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
18430 Try to generate zero-based comparisons.
18431 * config/cris/cris.c (cris_reduce_compare): New function.
18432 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
18433 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
18434 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
18436 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
18439 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
18440 in Thumb state and also as a destination in Arm state. Add T16
18443 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
18445 * md.texi (Define Subst): Match closing paren in example.
18447 2020-02-10 Jakub Jelinek <jakub@redhat.com>
18451 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
18452 arguments of strncmp.
18454 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
18457 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
18458 but different source value.
18459 (adjust_callers_for_value_intersection): New function.
18460 (gather_edges_for_value): Adjust order of callers to let a
18461 non-self-recursive caller be the first element.
18462 (self_recursive_pass_through_p): Add a new parameter "simple", and
18463 check generalized self-recursive pass-through jump function.
18464 (self_recursive_agg_pass_through_p): Likewise.
18465 (find_more_scalar_values_for_callers_subset): Compute value from
18466 pass-through jump function for self-recursive.
18467 (intersect_with_plats): Cleanup previous implementation code for value
18468 itersection with self-recursive call edge.
18469 (intersect_with_agg_replacements): Likewise.
18470 (intersect_aggregates_with_edge): Deduce value from pass-through jump
18471 function for self-recursive call edge. Cleanup previous implementation
18472 code for value intersection with self-recursive call edge.
18473 (decide_whether_version_node): Remove dead callers and adjust order
18474 to let a non-self-recursive caller be the first element.
18476 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
18478 * recog.c: Move pass_split_before_sched2 code in front of
18479 pass_split_before_regstack.
18480 (pass_data_split_before_sched2): Rename pass to split3 from split4.
18481 (pass_data_split_before_regstack): Rename pass to split4 from split3.
18482 (rest_of_handle_split_before_sched2): Remove.
18483 (pass_split_before_sched2::execute): Unconditionally call
18485 (enable_split_before_sched2): New function.
18486 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
18487 (pass_split_before_regstack::gate): Ditto.
18488 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
18489 Update name check for renamed split4 pass.
18490 * config/sh/sh.c (register_sh_passes): Update pass insertion
18491 point for renamed split4 pass.
18493 2020-02-09 Jakub Jelinek <jakub@redhat.com>
18495 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
18496 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
18497 copying them around between host and target.
18499 2020-02-08 Andrew Pinski <apinski@marvell.com>
18502 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
18503 STRICT_ALIGNMENT also.
18505 2020-02-08 Jim Wilson <jimw@sifive.com>
18508 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
18510 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
18511 Jakub Jelinek <jakub@redhat.com>
18514 * config/i386/i386.h (CALL_USED_REGISTERS): Make
18515 xmm16-xmm31 call-used even in 64-bit ms-abi.
18517 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
18519 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
18520 (simd_ummla, simd_usmmla): Likewise.
18521 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
18522 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
18523 (vusmmlaq_s32): New.
18525 2020-02-07 Richard Biener <rguenther@suse.de>
18527 PR middle-end/93519
18528 * tree-inline.c (fold_marked_statements): Do a PRE walk,
18529 skipping unreachable regions.
18530 (optimize_inline_calls): Skip folding stmts when we didn't
18533 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
18536 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
18537 Don't return aggregates with only SFmode and DFmode in SSE
18539 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
18541 2020-02-07 Jakub Jelinek <jakub@redhat.com>
18544 * config/rs6000/rs6000-logue.c
18545 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
18546 if it fails, move rs into end_addr and retry. Add
18547 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
18548 the insn pattern doesn't describe well what exactly happens to
18552 * config/i386/predicates.md (avx_identity_operand): Remove.
18553 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
18554 (avx_<castmode><avxsizesuffix>_<castmode>,
18555 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
18556 a VEC_CONCAT of the operand and UNSPEC_CAST.
18557 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
18558 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
18562 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
18563 recog_data.insn if distance_non_agu_define changed it.
18565 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
18568 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
18569 we only had X-FORM (reg+reg) addressing for vectors. Also before
18570 ISA 3.0, we only had X-FORM addressing for scalars in the
18571 traditional Altivec registers.
18573 2020-02-06 <zhongyunde@huawei.com>
18574 Vladimir Makarov <vmakarov@redhat.com>
18576 PR rtl-optimization/93561
18577 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
18578 hard register range.
18580 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
18582 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
18585 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
18587 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
18588 where the low and the high 32 bits are equal to each other specially,
18589 with an rldimi instruction.
18591 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
18593 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
18595 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
18597 * config/arm/arm-tables.opt: Regenerate.
18599 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
18602 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
18603 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
18604 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
18606 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
18608 PR rtl-optimization/87763
18609 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
18611 2020-02-06 Delia Burduv <delia.burduv@arm.com>
18613 * config/aarch64/aarch64-simd-builtins.def
18614 (bfmlaq): New built-in function.
18615 (bfmlalb): New built-in function.
18616 (bfmlalt): New built-in function.
18617 (bfmlalb_lane): New built-in function.
18618 (bfmlalt_lane): New built-in function.
18619 * config/aarch64/aarch64-simd.md
18620 (aarch64_bfmmlaqv4sf): New pattern.
18621 (aarch64_bfmlal<bt>v4sf): New pattern.
18622 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
18623 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
18624 (vbfmlalbq_f32): New intrinsic.
18625 (vbfmlaltq_f32): New intrinsic.
18626 (vbfmlalbq_lane_f32): New intrinsic.
18627 (vbfmlaltq_lane_f32): New intrinsic.
18628 (vbfmlalbq_laneq_f32): New intrinsic.
18629 (vbfmlaltq_laneq_f32): New intrinsic.
18630 * config/aarch64/iterators.md (BF_MLA): New int iterator.
18631 (bt): New int attribute.
18633 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
18635 * config/i386/i386.md (*pushtf): Emit "#" instead of
18636 calling gcc_unreachable in insn output.
18639 (*pushsf_rex64): Ditto for alternatives other than 1.
18640 (*pushsf): Ditto for alternatives other than 1.
18642 2020-02-06 Martin Liska <mliska@suse.cz>
18644 PR gcov-profile/91971
18645 PR gcov-profile/93466
18646 * coverage.c (coverage_init): Revert mangling of
18647 path into filename. It can lead to huge filename length.
18648 Creation of subfolders seem more natural.
18650 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18653 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
18654 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
18655 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
18657 2020-02-06 Jakub Jelinek <jakub@redhat.com>
18660 * config/i386/predicates.md (avx_identity_operand): New predicate.
18661 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
18662 define_insn_and_split.
18665 * omp-low.c (use_pointer_for_field): For nested constructs, also
18666 look for map clauses on target construct.
18667 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
18668 taskreg_nesting_level.
18671 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
18672 shared clause, call omp_notice_variable on outer context if any.
18674 2020-02-05 Jason Merrill <jason@redhat.com>
18677 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
18678 non-zero address even if weak and not yet defined.
18680 2020-02-05 Martin Sebor <msebor@redhat.com>
18682 PR tree-optimization/92765
18683 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
18684 * tree-ssa-strlen.c (compute_string_length): Remove.
18685 (determine_min_objsize): Remove.
18686 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
18687 Avoid using type size as the upper bound on string length.
18688 (handle_builtin_string_cmp): Add an argument. Adjust.
18689 (strlen_check_and_optimize_call): Pass additional argument to
18690 handle_builtin_string_cmp.
18692 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
18694 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
18695 (*pushdi2_rex64 peephole2): Unconditionally split after
18696 epilogue_completed.
18697 (*ashl<mode>3_doubleword): Ditto.
18698 (*<shift_insn><mode>3_doubleword): Ditto.
18700 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
18703 * config/rs6000/rs6000.c (get_vector_offset): Fix
18705 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
18707 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
18709 2020-02-05 David Malcolm <dmalcolm@redhat.com>
18711 * doc/analyzer.texi
18712 (Special Functions for Debugging the Analyzer): Update description
18713 of __analyzer_dump_exploded_nodes.
18715 2020-02-05 Jakub Jelinek <jakub@redhat.com>
18718 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
18719 include sets and not clobbers in the vzeroupper pattern.
18720 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
18721 the parallel has 17 (64-bit) or 9 (32-bit) elts.
18722 (*avx_vzeroupper_1): New define_insn_and_split.
18725 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
18726 don't run when !optimize.
18727 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
18730 2020-02-05 Richard Biener <rguenther@suse.de>
18732 PR middle-end/90648
18733 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
18734 checks before matching calls.
18736 2020-02-05 Jakub Jelinek <jakub@redhat.com>
18738 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
18739 function comment typo.
18741 PR middle-end/93555
18742 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
18743 simd_clone_create failed when i == 0, adjust clone->nargs by
18746 2020-02-05 Martin Liska <mliska@suse.cz>
18749 * doc/invoke.texi: Document that one should
18750 not combine ASLR and -fpch.
18752 2020-02-04 Richard Biener <rguenther@suse.de>
18754 PR tree-optimization/93538
18755 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
18757 2020-02-04 Richard Biener <rguenther@suse.de>
18759 PR tree-optimization/91123
18760 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
18761 (vn_walk_cb_data::last_vuse): New member.
18762 (vn_walk_cb_data::saved_operands): Likewsie.
18763 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
18764 (vn_walk_cb_data::push_partial_def): Use finish.
18765 (vn_reference_lookup_2): Update last_vuse and use finish if
18766 we've saved operands.
18767 (vn_reference_lookup_3): Use finish and update calls to
18768 push_partial_defs everywhere. When translating through
18769 memcpy or aggregate copies save off operands and alias-set.
18770 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
18771 operation for redundant store removal.
18773 2020-02-04 Richard Biener <rguenther@suse.de>
18775 PR tree-optimization/92819
18776 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
18777 generating more stmts than before.
18779 2020-02-04 Martin Liska <mliska@suse.cz>
18781 * config/arm/arm.c (arm_gen_far_branch): Move the function
18782 outside of selftests.
18784 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
18786 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
18787 function to adjust PC-relative vector addresses.
18788 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
18789 handle vectors with PC-relative addresses.
18791 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
18793 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
18795 (hard_reg_and_mode_to_addr_mask): Delete.
18796 (rs6000_adjust_vec_address): If the original vector address
18797 was REG+REG or REG+OFFSET and the element is not zero, do the add
18798 of the elements in the original address before adding the offset
18799 for the vector element. Use address_to_insn_form to validate the
18800 address using the register being loaded, rather than guessing
18801 whether the address is a DS-FORM or DQ-FORM address.
18803 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
18805 * config/rs6000/rs6000.c (get_vector_offset): New helper function
18806 to calculate the offset in memory from the start of a vector of a
18807 particular element. Add code to keep the element number in
18808 bounds if the element number is variable.
18809 (rs6000_adjust_vec_address): Move calculation of offset of the
18810 vector element to get_vector_offset.
18811 (rs6000_split_vec_extract_var): Do not do the initial AND of
18812 element here, move the code to get_vector_offset.
18814 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
18816 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
18819 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
18821 * config/rs6000/constraints.md: Improve documentation.
18823 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
18826 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
18827 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
18829 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
18831 * config.gcc: Remove "carrizo" support.
18832 * config/gcn/gcn-opts.h (processor_type): Likewise.
18833 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
18834 * config/gcn/gcn.opt (gpu_type): Likewise.
18835 * config/gcn/t-omp-device: Likewise.
18837 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18840 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
18841 * config/arm/arm.c (arm_gen_far_branch): New function
18842 arm_gen_far_branch.
18843 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
18845 2020-02-03 Julian Brown <julian@codesourcery.com>
18846 Tobias Burnus <tobias@codesourcery.com>
18848 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
18850 2020-02-03 Jakub Jelinek <jakub@redhat.com>
18853 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
18854 valid RTL to sum up the lowest and second lowest bytes of the popcnt
18857 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
18859 PR rtl-optimization/91333
18860 * ira-color.c (struct allocno_color_data): Add member
18862 (init_allocno_threads): Set the member up.
18863 (bucket_allocno_compare_func): Add compare hard reg
18866 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
18868 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
18870 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
18871 * config.in: Regenerated.
18872 * configure: Regenerated.
18873 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
18874 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
18875 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
18877 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
18879 * configure: Regenerate.
18881 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
18883 PR rtl-optimization/91333
18884 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
18885 reg preferences comparison up.
18887 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
18889 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
18890 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
18891 aarch64-sve-builtins-base.h.
18892 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
18893 aarch64-sve-builtins-base.cc.
18894 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
18895 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
18896 (svcvtnt): Declare.
18897 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
18898 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
18899 (svcvtnt): New functions.
18900 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
18901 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
18902 (svcvtnt): New functions.
18903 (svcvt): Add a form that converts f32 to bf16.
18904 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
18905 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
18907 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
18908 Treat B as bfloat16_t.
18909 (ternary_bfloat_lane_base): New class.
18910 (ternary_bfloat_def): Likewise.
18911 (ternary_bfloat): New shape.
18912 (ternary_bfloat_lane_def): New class.
18913 (ternary_bfloat_lane): New shape.
18914 (ternary_bfloat_lanex2_def): New class.
18915 (ternary_bfloat_lanex2): New shape.
18916 (ternary_bfloat_opt_n_def): New class.
18917 (ternary_bfloat_opt_n): New shape.
18918 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
18919 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
18920 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
18921 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
18922 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
18923 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
18924 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
18925 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
18926 the pattern off the narrow mode instead of the wider one.
18927 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
18928 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
18929 (sve_fp_op): Handle them.
18930 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
18931 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
18933 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
18935 * config/aarch64/arm_sve.h: Include arm_bf16.h.
18936 * config/aarch64/aarch64-modes.def (BF): Move definition before
18937 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
18938 (SVE_MODES): Handle BF modes.
18939 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
18941 (aarch64_full_sve_mode): Likewise.
18942 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
18944 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
18945 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
18946 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
18947 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
18949 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
18951 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
18952 (TYPES_all_data): Add bf16.
18953 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
18954 (register_tuple_type): Increase buffer size.
18955 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
18956 (bf16): New type suffix.
18957 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
18958 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
18959 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
18960 Change type from all_data to all_arith.
18961 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
18962 (svminp): Likewise.
18964 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
18965 Matthew Malcomson <matthew.malcomson@arm.com>
18966 Richard Sandiford <richard.sandiford@arm.com>
18968 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
18969 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
18970 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
18971 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
18972 __ARM_FEATURE_MATMUL_FP64.
18973 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
18974 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
18975 be disabled at the same time.
18976 (f32mm): New extension.
18977 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
18978 (AARCH64_FL_F64MM): Bump to the next bit up.
18979 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
18980 (TARGET_SVE_F64MM): New macros.
18981 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
18982 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
18983 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
18984 (UNSPEC_ZIP2Q): New unspeccs.
18985 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
18986 (optab, sur, perm_insn): Handle the new unspecs.
18987 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
18988 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
18989 TARGET_SVE_F64MM instead of separate tests.
18990 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
18991 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
18992 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
18993 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
18994 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
18995 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
18996 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
18997 (TYPES_s_signed): New macro.
18998 (TYPES_s_integer): Use it.
18999 (TYPES_d_float): New macro.
19000 (TYPES_d_data): Use it.
19001 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
19002 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
19003 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
19004 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
19005 (svmmla): New shape.
19006 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
19007 template parameters.
19008 (ternary_resize2_lane_base): Likewise.
19009 (ternary_resize2_base): New class.
19010 (ternary_qq_lane_base): Likewise.
19011 (ternary_intq_uintq_lane_def): Likewise.
19012 (ternary_intq_uintq_lane): New shape.
19013 (ternary_intq_uintq_opt_n_def): New class
19014 (ternary_intq_uintq_opt_n): New shape.
19015 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
19016 (ternary_uintq_intq_def): New class.
19017 (ternary_uintq_intq): New shape.
19018 (ternary_uintq_intq_lane_def): New class.
19019 (ternary_uintq_intq_lane): New shape.
19020 (ternary_uintq_intq_opt_n_def): New class.
19021 (ternary_uintq_intq_opt_n): New shape.
19022 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
19023 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
19024 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
19025 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
19027 (svdotprod_lane_impl): ...this new class.
19028 (svmmla_impl, svusdot_impl): New classes.
19029 (svdot_lane): Update to use svdotprod_lane_impl.
19030 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
19031 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
19033 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
19034 function, with no types defined.
19035 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
19036 AARCH64_FL_I8MM functions.
19037 (svmmla): New AARCH64_FL_F32MM function.
19038 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
19039 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
19040 AARCH64_FL_F64MM function.
19041 (REQUIRED_EXTENSIONS):
19043 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
19045 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
19048 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
19050 * config/i386/i386.md (*movoi_internal_avx): Do not check for
19051 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
19052 (*movti_internal): Do not check for
19053 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
19054 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
19055 just after check for TARGET_AVX.
19056 (*movdf_internal): Ditto.
19057 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
19058 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
19059 * config/i386/sse.md (mov<mode>_internal): Only check
19060 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
19061 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
19062 (<sse>_andnot<mode>3<mask_name>): Move check for
19063 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
19064 (<code><mode>3<mask_name>): Ditto.
19065 (*andnot<mode>3): Ditto.
19066 (*andnottf3): Ditto.
19067 (*<code><mode>3): Ditto.
19068 (*<code>tf3): Ditto.
19069 (*andnot<VI:mode>3): Remove
19070 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
19071 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
19072 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
19073 (sse4_1_blendv<ssemodesuffix>): Ditto.
19074 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
19075 Explain that tune applies to 128bit instructions only.
19077 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
19079 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
19080 to definition of hsa_kernel_description. Parse assembly to find SGPR
19081 and VGPR count of kernel and store in hsa_kernel_description.
19083 2020-01-31 Tamar Christina <tamar.christina@arm.com>
19085 PR rtl-optimization/91838
19086 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
19087 to truncate if allowed or reject combination.
19089 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
19091 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
19092 (find_inv_vars_cb): Likewise.
19094 2020-01-31 David Malcolm <dmalcolm@redhat.com>
19096 * calls.c (special_function_p): Split out the check for DECL_NAME
19097 being non-NULL and fndecl being extern at file scope into a
19098 new maybe_special_function_p and call it. Drop check for fndecl
19099 being non-NULL that was after a usage of DECL_NAME (fndecl).
19100 * tree.h (maybe_special_function_p): New inline function.
19102 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
19104 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
19105 (mask_gather_load<mode>): ... here, and zero-initialize the
19107 (maskload<mode>di): Zero-initialize the destination.
19108 * config/gcn/gcn.c:
19110 2020-01-30 David Malcolm <dmalcolm@redhat.com>
19113 * doc/analyzer.texi (Limitations): Note that constraints on
19114 floating-point values are currently ignored.
19116 2020-01-30 Jakub Jelinek <jakub@redhat.com>
19119 * symtab.c (symtab_node::noninterposable_alias): If localalias
19120 already exists, but is not usable, append numbers after it until
19121 a unique name is found. Formatting fix.
19123 PR middle-end/93505
19124 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
19127 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
19129 * config/gcn/gcn.c (print_operand): Handle LTGT.
19130 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
19132 2020-01-30 Richard Biener <rguenther@suse.de>
19134 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
19135 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
19137 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
19139 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
19140 without a DECL in .data.rel.ro.local.
19142 2020-01-30 Jakub Jelinek <jakub@redhat.com>
19145 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
19149 * config/i386/sse.md
19150 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
19151 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
19152 any_extend code iterator instead of always zero_extend.
19153 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
19154 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
19155 Use any_extend code iterator instead of always zero_extend.
19156 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
19157 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
19158 Use any_extend code iterator instead of always zero_extend.
19159 (*sse2_pmovmskb_ext): New define_insn.
19160 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
19163 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
19164 (*popcountsi2_zext_falsedep): New define_insn.
19166 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
19168 * config.in: Regenerated.
19169 * configure: Regenerated.
19171 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
19174 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
19175 LLVM's assembler changed the default in version 9.
19177 2020-01-24 Jeff Law <law@redhat.com>
19179 PR tree-optimization/89689
19180 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
19182 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
19186 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
19188 PR rtl-optimization/87763
19189 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
19190 simplification to handle subregs as well as bare regs.
19191 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
19193 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
19196 * ira.c (ira): Revert use of simplified LRA algorithm.
19198 2020-01-29 Martin Jambor <mjambor@suse.cz>
19200 PR tree-optimization/92706
19201 * tree-sra.c (struct access): Fields first_link, last_link,
19202 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
19203 next_rhs_queued and grp_rhs_queued respectively, new fields
19204 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
19205 (struct assign_link): Field next renamed to next_rhs, new field
19206 next_lhs. Updated comment.
19207 (work_queue_head): Renamed to rhs_work_queue_head.
19208 (lhs_work_queue_head): New variable.
19209 (add_link_to_lhs): New function.
19210 (relink_to_new_repr): Also relink LHS lists.
19211 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
19212 (add_access_to_lhs_work_queue): New function.
19213 (pop_access_from_work_queue): Renamed to
19214 pop_access_from_rhs_work_queue.
19215 (pop_access_from_lhs_work_queue): New function.
19216 (build_accesses_from_assign): Also add links to LHS lists and to LHS
19218 (child_would_conflict_in_lacc): Renamed to
19219 child_would_conflict_in_acc. Adjusted parameter names.
19220 (create_artificial_child_access): New parameter set_grp_read, use it.
19221 (subtree_mark_written_and_enqueue): Renamed to
19222 subtree_mark_written_and_rhs_enqueue.
19223 (propagate_subaccesses_across_link): Renamed to
19224 propagate_subaccesses_from_rhs.
19225 (propagate_subaccesses_from_lhs): New function.
19226 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
19229 2020-01-29 Martin Jambor <mjambor@suse.cz>
19231 PR tree-optimization/92706
19232 * tree-sra.c (struct access): Adjust comment of
19233 grp_total_scalarization.
19234 (find_access_in_subtree): Look for single children spanning an entire
19236 (scalarizable_type_p): Allow register accesses, adjust callers.
19237 (completely_scalarize): Remove function.
19238 (scalarize_elem): Likewise.
19239 (create_total_scalarization_access): Likewise.
19240 (sort_and_splice_var_accesses): Do not track total scalarization
19242 (analyze_access_subtree): New parameter totally, adjust to new meaning
19243 of grp_total_scalarization.
19244 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
19245 (can_totally_scalarize_forest_p): New function.
19246 (create_total_scalarization_access): Likewise.
19247 (create_total_access_and_reshape): Likewise.
19248 (total_should_skip_creating_access): Likewise.
19249 (totally_scalarize_subtree): Likewise.
19250 (analyze_all_variable_accesses): Perform total scalarization after
19251 subaccess propagation using the new functions above.
19252 (initialize_constant_pool_replacements): Output initializers by
19253 traversing the access tree.
19255 2020-01-29 Martin Jambor <mjambor@suse.cz>
19257 * tree-sra.c (verify_sra_access_forest): New function.
19258 (verify_all_sra_access_forests): Likewise.
19259 (create_artificial_child_access): Set parent.
19260 (analyze_all_variable_accesses): Call the verifier.
19262 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
19264 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
19265 if called on indirect edge.
19266 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
19267 speculative call if needed.
19269 2020-01-29 Richard Biener <rguenther@suse.de>
19271 PR tree-optimization/93428
19272 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
19273 permutation when the load node is created.
19274 (vect_analyze_slp_instance): Re-use it here.
19276 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
19278 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
19280 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
19282 PR rtl-optimization/93272
19283 * ira-lives.c (process_out_of_region_eh_regs): New function.
19284 (process_bb_node_lives): Call it.
19286 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
19288 * coverage.c (read_counts_file): Make error message lowercase.
19290 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
19292 * profile-count.c (profile_quality_display_names): Fix ordering.
19294 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
19297 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
19298 hash only when edge is first within the sequence.
19299 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
19300 (symbol_table::create_edge): Do not set target_prob.
19301 (cgraph_edge::remove_caller): Watch for speculative calls when updating
19302 the call site hash.
19303 (cgraph_edge::make_speculative): Drop target_prob parameter.
19304 (cgraph_edge::speculative_call_info): Remove.
19305 (cgraph_edge::first_speculative_call_target): New member function.
19306 (update_call_stmt_hash_for_removing_direct_edge): New function.
19307 (cgraph_edge::resolve_speculation): Rewrite to new API.
19308 (cgraph_edge::speculative_call_for_target): New member function.
19309 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
19310 multiple speculation targets.
19311 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
19313 (verify_speculative_call): Verify that targets form an interval.
19314 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
19315 (cgraph_edge::first_speculative_call_target): New member function.
19316 (cgraph_edge::next_speculative_call_target): New member function.
19317 (cgraph_edge::speculative_call_target_ref): New member function.
19318 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
19319 (cgraph_edge): Remove target_prob.
19320 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
19321 Fix handling of speculative calls.
19322 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
19323 * ipa-fnsummary.c (analyze_function_body): Likewise.
19324 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
19325 * ipa-profile.c (dump_histogram): Fix formating.
19326 (ipa_profile_generate_summary): Watch for overflows.
19327 (ipa_profile): Do not require probablity to be 1/2; update to new API.
19328 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
19329 (update_indirect_edges_after_inlining): Update to new API.
19330 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
19332 * profile-count.h: (profile_probability::adjusted): New.
19333 * tree-inline.c (copy_bb): Update to new speculative call API; fix
19334 updating of profile.
19335 * value-prof.c (gimple_ic_transform): Rename to ...
19336 (dump_ic_profile): ... this one; update dumping.
19337 (stream_in_histogram_value): Fix formating.
19338 (gimple_value_profile_transformations): Update.
19340 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
19343 * config/i386/i386.md (*movoi_internal_avx): Remove
19344 TARGET_SSE_TYPELESS_STORES check.
19345 (*movti_internal): Prefer TARGET_AVX over
19346 TARGET_SSE_TYPELESS_STORES.
19347 (*movtf_internal): Likewise.
19348 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
19349 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
19350 from TARGET_SSE_TYPELESS_STORES.
19352 2020-01-28 David Malcolm <dmalcolm@redhat.com>
19354 * diagnostic-core.h (warning_at): Rename overload to...
19355 (warning_meta): ...this.
19356 (emit_diagnostic_valist): Delete decl of overload taking
19357 diagnostic_metadata.
19358 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
19359 (warning_at): Rename overload taking diagnostic_metadata to...
19360 (warning_meta): ...this.
19362 2020-01-28 Richard Biener <rguenther@suse.de>
19364 PR tree-optimization/93439
19365 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
19366 * tree-cfg.c (move_sese_region_to_fn): ... here.
19367 (verify_types_in_gimple_reference): Verify used cliques are
19370 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
19373 * config/i386/i386-options.c (set_ix86_tune_features): Add an
19374 argument of a pointer to struct gcc_options and pass it to
19375 parse_mtune_ctrl_str.
19376 (ix86_function_specific_restore): Pass opts to
19377 set_ix86_tune_features.
19378 (ix86_option_override_internal): Likewise.
19379 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
19380 gcc_options and use it for x_ix86_tune_ctrl_string.
19382 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
19384 PR rtl-optimization/87763
19385 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
19386 simplification to handle subregs as well as bare regs.
19387 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
19389 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
19391 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
19392 for reduction chains that (now) include a call.
19394 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
19396 PR tree-optimization/92822
19397 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
19398 out the don't-care elements of a vector whose significant elements
19399 are duplicates, make the don't-care elements duplicates too.
19401 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
19403 PR tree-optimization/93434
19404 * tree-predcom.c (split_data_refs_to_components): Record which
19405 components have had aliasing loads removed. Prevent store-store
19406 commoning for all such components.
19408 2020-01-28 Jakub Jelinek <jakub@redhat.com>
19411 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
19412 -1 or is_vshift is true, use new_vector with number of elts npatterns
19413 rather than new_unary_operation.
19415 PR tree-optimization/93454
19416 * gimple-fold.c (fold_array_ctor_reference): Perform
19417 elt_size.to_uhwi () just once, instead of calling it in every
19418 iteration. Punt if that value is above size of the temporary
19419 buffer. Decrease third native_encode_expr argument when
19420 bufoff + elt_sz is above size of buf.
19422 2020-01-27 Joseph Myers <joseph@codesourcery.com>
19424 * config/mips/mips.c (mips_declare_object_name)
19425 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
19427 2020-01-27 Martin Liska <mliska@suse.cz>
19429 PR gcov-profile/93403
19430 * tree-profile.c (gimple_init_gcov_profiler): Generate
19431 both __gcov_indirect_call_profiler_v4 and
19432 __gcov_indirect_call_profiler_v4_atomic.
19434 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
19437 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
19439 (@aarch64_split_simd_mov<mode>): Use it.
19440 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
19441 Leave the vec_extract patterns to handle 2-element vectors.
19442 (aarch64_simd_mov_from_<mode>high): Likewise.
19443 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
19444 (vec_extractv2dfv1df): Likewise.
19446 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
19448 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
19449 jump conditions for *compare_condjump<GPI:mode>.
19451 2020-01-27 David Malcolm <dmalcolm@redhat.com>
19454 * digraph.cc (test_edge::test_edge): Specify template for base
19457 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
19459 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
19461 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
19463 * config/arc/arc-protos.h (gen_mlo): Remove.
19464 (gen_mhi): Likewise.
19465 * config/arc/arc.c (AUX_MULHI): Define.
19466 (arc_must_save_reister): Special handling for r58/59.
19467 (arc_compute_frame_size): Consider mlo/mhi registers.
19468 (arc_save_callee_saves): Emit fp/sp move only when emit_move
19470 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
19471 mlo/mhi name selection.
19472 (arc_restore_callee_saves): Don't early restore blink when ISR.
19473 (arc_expand_prologue): Add mlo/mhi saving.
19474 (arc_expand_epilogue): Add mlo/mhi restoring.
19477 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
19478 numbering when MUL64 option is used.
19479 (DWARF2_FRAME_REG_OUT): Define.
19480 * config/arc/arc.md (arc600_stall): New pattern.
19481 (VUNSPEC_ARC_ARC600_STALL): Define.
19482 (mulsi64): Use correct mlo/mhi registers.
19483 (mulsi_600): Clean it up.
19484 * config/arc/predicates.md (mlo_operand): Remove any dependency on
19486 (mhi_operand): Likewise.
19488 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
19489 Petro Karashchenko <petro.karashchenko@ring.com>
19491 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
19492 attributes if needed.
19493 (prepare_move_operands): Generate special unspec instruction for
19495 (arc_isuncached_mem_p): Propagate uncached attribute to each
19497 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
19498 (VUNSPEC_ARC_STDI): Likewise.
19499 (ALLI): New mode iterator.
19500 (mALLI): New mode attribute.
19501 (lddi): New instruction pattern.
19503 (stdidi_split): Split instruction for architectures which are not
19504 supporting ll64 option.
19505 (lddidi_split): Likewise.
19507 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
19509 PR rtl-optimization/92989
19510 * lra-lives.c (process_bb_lives): Update the live-in set before
19511 processing additional clobbers.
19513 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
19515 PR rtl-optimization/93170
19516 * cselib.c (cselib_invalidate_regno_val): New function, split out
19518 (cselib_invalidate_regno): ...here.
19519 (cselib_invalidated_by_call_p): New function.
19520 (cselib_process_insn): Iterate over all the hard-register entries in
19521 REG_VALUES and invalidate any that cross call-clobbered registers.
19523 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
19525 * dojump.c (split_comparison): Use HONOR_NANS rather than
19526 HONOR_SNANS when splitting LTGT.
19528 2020-01-27 Martin Liska <mliska@suse.cz>
19531 * opts.c (print_filtered_help): Exclude language-specific
19532 options from --help=common unless enabled in all FEs.
19534 2020-01-27 Martin Liska <mliska@suse.cz>
19536 * opts.c (print_help): Exclude params from
19537 all except --help=param.
19539 2020-01-27 Martin Liska <mliska@suse.cz>
19542 * config/i386/i386-features.c (make_resolver_func):
19543 Align the code with ppc64 target implementation.
19544 Do not generate a unique name for resolver function.
19546 2020-01-27 Richard Biener <rguenther@suse.de>
19548 PR tree-optimization/93397
19549 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
19550 converted reduction chain SLP graph adjustment.
19552 2020-01-26 Marek Polacek <polacek@redhat.com>
19555 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
19558 2020-01-26 Jason Merrill <jason@redhat.com>
19561 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
19564 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
19566 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
19567 (rx_setmem): Likewise.
19569 2020-01-26 Jakub Jelinek <jakub@redhat.com>
19572 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
19573 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
19574 drop <di> from constraint of last operand.
19577 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
19578 TARGET_AVX2 and V4DFmode not in the split condition, but in the
19579 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
19581 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
19584 * ipa-cp.c (get_info_about_necessary_edges): Remove value
19587 2020-01-24 Jeff Law <law@redhat.com>
19589 PR tree-optimization/92788
19590 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
19593 2020-01-24 Jakub Jelinek <jakub@redhat.com>
19596 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
19597 *avx_vperm_broadcast_<mode>,
19598 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
19599 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
19600 Move before avx2_perm<mode>/avx512f_perm<mode>.
19603 * simplify-rtx.c (simplify_const_unary_operation,
19604 simplify_const_binary_operation): Punt for mode precision above
19605 MAX_BITSIZE_MODE_ANY_INT.
19607 2020-01-24 Andrew Pinski <apinski@marvell.com>
19609 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
19610 alu.shift_reg to 0.
19612 2020-01-24 Jeff Law <law@redhat.com>
19615 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
19616 for REGs. Call output_operand_lossage to get more reasonable
19619 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
19621 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
19622 gcn_fp_compare_operator.
19623 (vec_cmpu<mode>di): Use gcn_compare_operator.
19624 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
19625 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
19626 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
19627 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
19628 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
19629 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
19630 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
19631 gcn_fp_compare_operator.
19632 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
19633 gcn_fp_compare_operator.
19634 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
19635 gcn_fp_compare_operator.
19636 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
19637 gcn_fp_compare_operator.
19639 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
19641 * doc/install.texi (Cross-Compiler-Specific Options): Document
19642 `--with-toolexeclibdir' option.
19644 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
19646 * target.def (flags_regnum): Also mention effect on delay slot filling.
19647 * doc/tm.texi: Regenerate.
19649 2020-01-23 Jeff Law <law@redhat.com>
19651 PR translation/90162
19652 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
19654 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
19657 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
19660 2020-01-23 Jakub Jelinek <jakub@redhat.com>
19662 PR rtl-optimization/93402
19663 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
19666 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
19668 * config.in: Regenerated.
19669 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
19670 for TARGET_LIBC_GNUSTACK.
19671 * configure: Regenerated.
19672 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
19673 found to be 2.31 or greater.
19675 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
19677 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
19679 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
19680 (mips_asm_file_end): New function. Delegate to
19681 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
19682 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
19684 2020-01-23 Jakub Jelinek <jakub@redhat.com>
19687 * config/i386/i386-modes.def (POImode): New mode.
19688 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
19689 * config/i386/i386.md (DPWI): New mode attribute.
19690 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
19691 (QWI): Rename to...
19692 (QPWI): ... this. Use POI instead of OI for TImode.
19693 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
19694 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
19697 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
19700 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
19702 (speculation_tracker_rev): New pattern.
19703 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
19704 Use speculation_tracker_rev to track the inverse condition.
19706 2020-01-23 Richard Biener <rguenther@suse.de>
19708 PR tree-optimization/93381
19709 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
19710 alias-set of the def as argument and record the first one.
19711 (vn_walk_cb_data::first_set): New member.
19712 (vn_reference_lookup_3): Pass the alias-set of the current def
19713 to push_partial_def. Fix alias-set used in the aggregate copy
19715 (vn_reference_lookup): Consistently set *last_vuse_ptr.
19716 * real.c (clear_significand_below): Fix out-of-bound access.
19718 2020-01-23 Jakub Jelinek <jakub@redhat.com>
19721 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
19722 New define_insn patterns.
19724 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
19726 * doc/sourcebuild.texi (check-function-bodies): Add an
19727 optional target/xfail selector.
19729 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
19731 PR rtl-optimization/93124
19732 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
19733 bare USE and CLOBBER insns.
19735 2020-01-22 Andrew Pinski <apinski@marvell.com>
19737 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
19739 2020-01-22 David Malcolm <dmalcolm@redhat.com>
19742 * gdbinit.in (break-on-saved-diagnostic): Update for move of
19743 diagnostic_manager into "ana" namespace.
19744 * selftest-run-tests.c (selftest::run_tests): Update for move of
19745 selftest::run_analyzer_selftests to
19746 ana::selftest::run_analyzer_selftests.
19748 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
19750 * cfgexpand.c (union_stack_vars): Update the size.
19752 2020-01-22 Richard Biener <rguenther@suse.de>
19754 PR tree-optimization/93381
19755 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
19756 throughout, handle all conversions the same.
19758 2020-01-22 Jakub Jelinek <jakub@redhat.com>
19761 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
19762 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
19763 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
19764 Call force_reg on high_in2 unconditionally.
19766 2020-01-22 Martin Liska <mliska@suse.cz>
19768 PR tree-optimization/92924
19769 * profile.c (compute_value_histograms): Divide
19770 all counter values.
19772 2020-01-22 Jakub Jelinek <jakub@redhat.com>
19775 * output.h (assemble_name_resolve): Declare.
19776 * varasm.c (assemble_name_resolve): New function.
19777 (assemble_name): Use it.
19778 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
19780 2020-01-22 Joseph Myers <joseph@codesourcery.com>
19782 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
19783 update_web_docs_git instead of update_web_docs_svn.
19785 2020-01-21 Andrew Pinski <apinski@marvell.com>
19788 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
19789 as PTR mode. Have operand 1 as being modeless, it can be P mode.
19790 (*tlsgd_small_<mode>): Likewise.
19791 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
19792 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
19793 register. Convert that register back to dest using convert_mode.
19795 2020-01-21 Jim Wilson <jimw@sifive.com>
19797 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
19800 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
19801 Uros Bizjak <ubizjak@gmail.com>
19804 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
19806 (legitimize_tls_address): Do GNU2 TLS address computation in
19807 ptr_mode and zero-extend result to Pmode.
19808 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
19809 :P with :PTR and Pmode with ptr_mode.
19810 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
19811 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
19812 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
19814 2020-01-21 Jakub Jelinek <jakub@redhat.com>
19817 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
19818 the last two operands are CONST_INT_P before using them as such.
19820 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
19822 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
19823 to get the integer element types.
19825 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
19827 * config/aarch64/aarch64-sve-builtins.h
19828 (function_expander::convert_to_pmode): Declare.
19829 * config/aarch64/aarch64-sve-builtins.cc
19830 (function_expander::convert_to_pmode): New function.
19831 (function_expander::get_contiguous_base): Use it.
19832 (function_expander::prepare_gather_address_operands): Likewise.
19833 * config/aarch64/aarch64-sve-builtins-sve2.cc
19834 (svwhilerw_svwhilewr_impl::expand): Likewise.
19836 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
19839 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
19840 cfun->machine->label_is_assembled.
19841 (aarch64_print_patchable_function_entry): New.
19842 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
19843 * config/aarch64/aarch64.h (struct machine_function): New field,
19844 label_is_assembled.
19846 2020-01-21 David Malcolm <dmalcolm@redhat.com>
19849 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
19852 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
19855 * cgraph.c (cgraph_edge::resolve_speculation,
19856 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
19857 call_stmt_site_hash.
19859 2020-01-21 Martin Liska <mliska@suse.cz>
19861 * config/rs6000/rs6000.c (common_mode_defined): Remove
19864 2020-01-21 Richard Biener <rguenther@suse.de>
19866 PR tree-optimization/92328
19867 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
19868 type when value-numbering same-sized store by inserting a
19870 (eliminate_dom_walker::eliminate_stmt): When eliminating
19871 a redundant store handle bit-reinterpretation of the same value.
19873 2020-01-21 Andrew Pinski <apinski@marvel.com>
19876 * tree-into-ssa.c (prepare_block_for_update_1): Split out
19878 (prepare_block_for_update): This. Use a worklist instead of
19881 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19883 * config/arm/arm.c (clear_operation_p):
19884 Initialise last_regno, skip first iteration
19885 based on the first_set value and use ints instead
19886 of the unnecessary HOST_WIDE_INTs.
19888 2020-01-21 Jakub Jelinek <jakub@redhat.com>
19891 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
19892 compare_mode other than SFmode or DFmode.
19894 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
19897 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
19898 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
19899 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
19901 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
19903 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
19905 2020-01-20 Andrew Pinski <apinski@marvell.com>
19907 PR middle-end/93242
19908 * targhooks.c (default_print_patchable_function_entry): Use
19909 output_asm_insn to emit the nop instruction.
19911 2020-01-20 Fangrui Song <maskray@google.com>
19913 PR middle-end/93194
19914 * targhooks.c (default_print_patchable_function_entry): Align to
19917 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
19920 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
19921 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
19922 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
19923 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
19924 (*tls_dynamic_gnu2_lea_64): Renamed to ...
19925 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
19926 Remove the {q} suffix from lea.
19927 (*tls_dynamic_gnu2_call_64): Renamed to ...
19928 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
19929 (*tls_dynamic_gnu2_combine_64): Renamed to ...
19930 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
19931 Pass Pmode to gen_tls_dynamic_gnu2_64.
19933 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
19935 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
19937 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
19939 * config/aarch64/aarch64-sve-builtins-base.cc
19940 (svld1ro_impl::memory_vector_mode): Remove parameter name.
19942 2020-01-20 Richard Biener <rguenther@suse.de>
19945 * dwarf2out.c (prune_unused_types): Unconditionally mark
19946 called function DIEs.
19948 2020-01-20 Martin Liska <mliska@suse.cz>
19950 PR tree-optimization/93199
19951 * tree-eh.c (struct leh_state): Add
19952 new field outer_non_cleanup.
19953 (cleanup_is_dead_in): Pass leh_state instead
19954 of eh_region. Add a checking that state->outer_non_cleanup
19955 points to outer non-clean up region.
19956 (lower_try_finally): Record outer_non_cleanup
19958 (lower_catch): Likewise.
19959 (lower_eh_filter): Likewise.
19960 (lower_eh_must_not_throw): Likewise.
19961 (lower_cleanup): Likewise.
19963 2020-01-20 Richard Biener <rguenther@suse.de>
19965 PR tree-optimization/93094
19966 * tree-vectorizer.h (vect_loop_versioning): Adjust.
19967 (vect_transform_loop): Likewise.
19968 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
19969 loop_vectorized_call to vect_transform_loop.
19970 * tree-vect-loop.c (vect_transform_loop): Pass down
19971 loop_vectorized_call to vect_loop_versioning.
19972 * tree-vect-loop-manip.c (vect_loop_versioning): Use
19973 the earlier discovered loop_vectorized_call.
19975 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
19977 * doc/contribute.texi: Update for SVN -> Git transition.
19978 * doc/install.texi: Likewise.
19980 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
19983 * cgraph.c (cgraph_edge::make_speculative): Increase number of
19984 speculative targets.
19985 (verify_speculative_call): New function
19986 (cgraph_node::verify_node): Use it.
19987 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
19990 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
19993 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
19994 (cgraph_edge::make_direct): Remove all indirect targets.
19995 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
19996 (cgraph_node::verify_node): Verify that only one call_stmt or
19997 lto_stmt_uid is set.
19998 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
20000 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
20001 (lto_output_ref): Simplify streaming of stmt.
20002 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
20004 2020-01-18 Tamar Christina <tamar.christina@arm.com>
20006 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
20007 Mark parameter unused.
20009 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
20011 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
20013 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
20015 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
20017 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
20019 * Makefile.in: Add coroutine-passes.o.
20020 * builtin-types.def (BT_CONST_SIZE): New.
20021 (BT_FN_BOOL_PTR): New.
20022 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
20023 * builtins.def (DEF_COROUTINE_BUILTIN): New.
20024 * coroutine-builtins.def: New file.
20025 * coroutine-passes.cc: New file.
20026 * function.h (struct GTY function): Add a bit to indicate that the
20027 function is a coroutine component.
20028 * internal-fn.c (expand_CO_FRAME): New.
20029 (expand_CO_YIELD): New.
20030 (expand_CO_SUSPN): New.
20031 (expand_CO_ACTOR): New.
20032 * internal-fn.def (CO_ACTOR): New.
20036 * passes.def: Add pass_coroutine_lower_builtins,
20037 pass_coroutine_early_expand_ifns.
20038 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
20039 (make_pass_coroutine_early_expand_ifns): New.
20040 * doc/invoke.texi: Document the fcoroutines command line
20043 2020-01-18 Jakub Jelinek <jakub@redhat.com>
20045 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
20048 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
20049 after checking the argument is a REG. Don't use REGNO (reg)
20050 again to set last_regno, reuse regno variable instead.
20052 2020-01-17 David Malcolm <dmalcolm@redhat.com>
20054 * doc/analyzer.texi (Limitations): Add note about NaN.
20056 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20057 Sudakshina Das <sudi.das@arm.com>
20059 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
20060 and valid immediate.
20061 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
20062 (lshrdi3): Generate thumb2_lsrl for valid immediates.
20063 * config/arm/constraints.md (Pg): New.
20064 * config/arm/predicates.md (long_shift_imm): New.
20065 (arm_reg_or_long_shift_imm): Likewise.
20066 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
20067 (thumb2_lsll): Likewise.
20068 (thumb2_lsrl): New.
20070 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20071 Sudakshina Das <sudi.das@arm.com>
20073 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
20074 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
20075 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
20076 register pairs for doubleword quantities for ARMv8.1M-Mainline.
20077 * config/arm/thumb2.md (thumb2_asrl): New.
20078 (thumb2_lsll): Likewise.
20080 2020-01-17 Jakub Jelinek <jakub@redhat.com>
20082 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
20085 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
20087 * gdbinit.in (help-gcc-hooks): New command.
20088 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
20089 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
20092 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
20094 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
20095 correct target macro.
20097 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
20099 * config/aarch64/aarch64-protos.h
20100 (aarch64_sve_ld1ro_operand_p): New.
20101 * config/aarch64/aarch64-sve-builtins-base.cc
20102 (class load_replicate): New.
20103 (class svld1ro_impl): New.
20104 (class svld1rq_impl): Change to inherit from load_replicate.
20105 (svld1ro): New sve intrinsic function base.
20106 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
20107 New DEF_SVE_FUNCTION.
20108 * config/aarch64/aarch64-sve-builtins-base.h
20109 (svld1ro): New decl.
20110 * config/aarch64/aarch64-sve-builtins.cc
20111 (function_expander::add_mem_operand): Modify assert to allow
20113 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
20115 * config/aarch64/aarch64.c
20116 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
20117 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
20118 (aarch64_sve_ld1ro_operand_p): New.
20119 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
20120 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
20121 * config/aarch64/predicates.md
20122 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
20124 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
20126 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
20127 Introduce this ACLE specified predefined macro.
20128 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
20129 (fp): Disabling this disables f64mm.
20130 (simd): Disabling this disables f64mm.
20131 (fp16): Disabling this disables f64mm.
20132 (sve): Disabling this disables f64mm.
20133 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
20134 (AARCH64_ISA_F64MM): New.
20135 (TARGET_F64MM): New.
20136 * doc/invoke.texi (f64mm): Document new option.
20138 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
20140 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
20141 (neoversen1_tunings): Likewise.
20143 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
20146 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
20147 Add assert to ensure prolog has been emitted.
20148 (aarch64_split_atomic_op): Likewise.
20149 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
20150 Use epilogue_completed rather than reload_completed.
20151 (aarch64_atomic_exchange<mode>): Likewise.
20152 (aarch64_atomic_<atomic_optab><mode>): Likewise.
20153 (atomic_nand<mode>): Likewise.
20154 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
20155 (atomic_fetch_nand<mode>): Likewise.
20156 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
20157 (atomic_nand_fetch<mode>): Likewise.
20159 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
20162 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
20164 (REVERSE_CONDITION): Delete.
20165 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
20166 (CCFP_CCFPE): Likewise.
20167 (e): New mode attribute.
20168 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
20169 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
20170 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
20171 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
20172 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
20173 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
20174 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
20175 name of generator from gen_ccmpdi to gen_ccmpccdi.
20176 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
20177 the previous comparison but aren't able to, use the new ccmp_rev
20180 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
20182 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
20183 than testing directly for INTEGER_CST.
20184 (gimplify_target_expr, gimplify_omp_depend): Likewise.
20186 2020-01-17 Jakub Jelinek <jakub@redhat.com>
20188 PR tree-optimization/93292
20189 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
20190 get_vectype_for_scalar_type returns NULL.
20192 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
20194 * params.opt (-param=max-predicted-iterations): Increase range from 0.
20195 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
20197 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
20199 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
20201 * params.opt: (max-predicted-iterations): Set bounds.
20202 * predict.c (real_almost_one, real_br_prob_base,
20203 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
20204 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
20205 probabilities; do not truncate to reg_br_prob_bases.
20206 (estimate_loops_at_level): Pass max_cyclic_prob.
20207 (estimate_loops): Compute max_cyclic_prob.
20208 (estimate_bb_frequencies): Do not initialize real_*; update calculation
20210 * profile-count.c (profile_probability::to_sreal): New.
20211 * profile-count.h (class sreal): Move up in file.
20212 (profile_probability::to_sreal): Declare.
20214 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20217 (arm_invalid_conversion): New function for target hook.
20218 (arm_invalid_unary_op): New function for target hook.
20219 (arm_invalid_binary_op): New function for target hook.
20221 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20223 * config.gcc: Add arm_bf16.h.
20224 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
20225 (arm_simd_builtin_std_type): Add BFmode.
20226 (arm_init_simd_builtin_types): Define element types for vector types.
20227 (arm_init_bf16_types): New function.
20228 (arm_init_builtins): Add arm_init_bf16_types function call.
20229 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
20230 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
20231 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
20232 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
20233 (arm_vector_mode_supported_p): Add V4BF, V8BF.
20234 (arm_mangle_type): Add __bf16.
20235 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
20236 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
20237 arm_bf16_ptr_type_node.
20238 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
20239 define_split between ARM registers.
20240 * config/arm/arm_bf16.h: New file.
20241 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
20242 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
20243 (VQXMOV): Add V8BF.
20244 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
20245 * config/arm/vfp.md: Add BFmode to movhf patterns.
20247 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
20248 Andre Vieira <andre.simoesdiasvieira@arm.com>
20250 * config/arm/arm-cpus.in (mve, mve_float): New features.
20251 (dsp, mve, mve.fp): New options.
20252 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
20253 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
20254 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
20256 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20257 Thomas Preud'homme <thomas.preudhomme@arm.com>
20259 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
20261 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
20262 error for using -mcmse when targeting Armv8.1-M Mainline.
20264 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20265 Thomas Preud'homme <thomas.preudhomme@arm.com>
20267 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
20268 address in r4 when targeting Armv8.1-M Mainline.
20269 (nonsecure_call_value_internal): Likewise.
20270 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
20271 a register match_operand again. Emit BLXNS when targeting
20272 Armv8.1-M Mainline.
20273 (nonsecure_call_value_reg_thumb2): Likewise.
20275 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20276 Thomas Preud'homme <thomas.preudhomme@arm.com>
20278 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
20279 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
20280 variable as true when floating-point ABI is not hard. Replace
20281 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
20282 Generate VLSTM and VLLDM instruction respectively before and
20283 after a function call to cmse_nonsecure_call function.
20284 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
20285 (VUNSPEC_VLLDM): Likewise.
20286 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
20287 (lazy_load_multiple_insn): Likewise.
20289 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20290 Thomas Preud'homme <thomas.preudhomme@arm.com>
20292 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
20293 (arm_emit_vfp_multi_reg_pop): Likewise.
20294 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
20295 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
20296 restore callee-saved VFP registers.
20298 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20299 Thomas Preud'homme <thomas.preudhomme@arm.com>
20301 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
20302 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
20303 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
20304 callee-saved GPRs as well as clear ip register before doing a nonsecure
20305 call then restore callee-saved GPRs after it when targeting
20306 Armv8.1-M Mainline.
20307 (arm_reorg): Adapt to function rename.
20309 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20310 Thomas Preud'homme <thomas.preudhomme@arm.com>
20312 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
20313 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
20314 clear_vfp_multiple pattern based on a new vfp parameter.
20315 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
20316 targeting Armv8.1-M Mainline.
20317 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
20318 unconditionally when targeting Armv8.1-M Mainline architecture. Check
20319 whether VFP registers are available before looking call_used_regs for a
20321 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
20322 of prototype of clear_operation_p.
20323 (clear_vfp_multiple_operation): New predicate.
20324 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
20325 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
20327 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20328 Thomas Preud'homme <thomas.preudhomme@arm.com>
20330 * config/arm/arm-protos.h (clear_operation_p): Declare.
20331 * config/arm/arm.c (clear_operation_p): New function.
20332 (cmse_clear_registers): Generate clear_multiple instruction pattern if
20333 targeting Armv8.1-M Mainline or successor.
20334 (output_return_instruction): Only output APSR register clearing if
20335 Armv8.1-M Mainline instructions not available.
20336 (thumb_exit): Likewise.
20337 * config/arm/predicates.md (clear_multiple_operation): New predicate.
20338 * config/arm/thumb2.md (clear_apsr): New define_insn.
20339 (clear_multiple): Likewise.
20340 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
20342 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20343 Thomas Preud'homme <thomas.preudhomme@arm.com>
20345 * config/arm/arm.c (fp_sysreg_names): Declare and define.
20346 (use_return_insn): Also return false for Armv8.1-M Mainline.
20347 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
20348 Mainline instructions are available.
20349 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
20350 when targeting Armv8.1-M Mainline Security Extensions.
20351 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
20352 Mainline entry function.
20353 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
20354 targeting Armv8.1-M Mainline or successor.
20355 (arm_expand_epilogue): Fix indentation of caller-saved register
20356 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
20358 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
20359 (FP_SYSREGS): Likewise.
20360 (enum vfp_sysregs_encoding): Define enum.
20361 (fp_sysreg_names): Declare.
20362 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
20363 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
20364 (pop_fpsysreg_insn): Likewise.
20366 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20367 Thomas Preud'homme <thomas.preudhomme@arm.com>
20369 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
20370 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
20371 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
20372 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
20373 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
20374 (ARMv8_1m_main): New feature group.
20375 (armv8.1-m.main): New architecture.
20376 * config/arm/arm-tables.opt: Regenerate.
20377 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
20378 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
20379 (arm_options_perform_arch_sanity_checks): Error out when targeting
20380 Armv8.1-M Mainline Security Extensions.
20381 * config/arm/arm.h (arm_arch8_1m_main): Declare.
20383 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20385 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
20386 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
20387 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
20388 aarch64_bfdot_laneq): New.
20389 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
20390 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
20391 vbfdotq_laneq_f32): New.
20392 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
20393 VBFMLA_W, VBF): New.
20394 (isquadop): Add V4BF, V8BF.
20396 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20398 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
20399 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
20400 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
20401 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
20402 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
20403 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
20404 usdot_laneq, sudot_lane,sudot_laneq): New.
20405 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
20406 (aarch64_<sur>dot_lane): New.
20407 * config/aarch64/arm_neon.h (vusdot_s32): New.
20408 (vusdotq_s32): New.
20409 (vusdot_lane_s32): New.
20410 (vsudot_lane_s32): New.
20411 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
20412 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
20414 2020-01-16 Martin Liska <mliska@suse.cz>
20416 * value-prof.c (dump_histogram_value): Fix
20417 obvious spacing issue.
20419 2020-01-16 Andrew Pinski <apinski@marvell.com>
20421 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
20422 !storage_order_barrier_p.
20424 2020-01-16 Andrew Pinski <apinski@marvell.com>
20426 * sched-int.h (_dep): Add unused bit-field field for the padding.
20427 * sched-deps.c (init_dep_1): Init unused field.
20429 2020-01-16 Andrew Pinski <apinski@marvell.com>
20431 * optabs.h (create_expand_operand): Initialize target field also.
20433 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20435 PR tree-optimization/92429
20436 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
20437 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
20439 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
20442 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
20444 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
20445 aarch64_sve_int_mode to each mode.
20447 2020-01-15 David Malcolm <dmalcolm@redhat.com>
20449 * doc/analyzer.texi (Overview): Add note about
20450 -fdump-ipa-analyzer.
20452 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
20454 PR tree-optimization/93231
20455 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
20456 input_type is unsigned. Use tree_to_shwi for shift constant.
20457 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
20458 (simplify_count_trailing_zeroes): Add test to handle known non-zero
20459 inputs more efficiently.
20461 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
20463 * config/i386/i386.md (*movsf_internal): Do not require
20464 SSE2 ISA for alternatives 14 and 15.
20466 2020-01-15 Richard Biener <rguenther@suse.de>
20468 PR middle-end/93273
20469 * tree-eh.c (sink_clobbers): If we already visited the destination
20470 block do not defer insertion.
20471 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
20472 the purpose of defered insertion.
20474 2020-01-15 Jakub Jelinek <jakub@redhat.com>
20476 * BASE-VER: Bump to 10.0.1.
20478 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
20480 PR tree-optimization/93247
20481 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
20482 type of the stmt that we're going to vectorize.
20484 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
20486 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
20487 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
20490 2020-01-15 Martin Liska <mliska@suse.cz>
20492 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
20493 2 calls of streamer_read_hwi in a function call.
20495 2020-01-15 Richard Biener <rguenther@suse.de>
20497 * alias.c (record_alias_subset): Avoid redundant work when
20498 subset is already recorded.
20500 2020-01-14 David Malcolm <dmalcolm@redhat.com>
20502 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
20503 the analyzer options provide CWE identifiers.
20505 2020-01-14 David Malcolm <dmalcolm@redhat.com>
20507 * tree-diagnostic-path.cc (path_summary::event_range::print):
20508 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
20509 using get_pure_location.
20511 2020-01-15 Jakub Jelinek <jakub@redhat.com>
20513 PR tree-optimization/93262
20514 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
20515 perform head trimming only if the last argument is constant,
20516 either all ones, or larger or equal to head trim, in the latter
20517 case decrease the last argument by head_trim.
20519 PR tree-optimization/93249
20520 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
20521 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
20522 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
20523 perform head trim unless we can prove there are no '\0' chars
20524 from the source among the first head_trim chars.
20526 2020-01-14 David Malcolm <dmalcolm@redhat.com>
20528 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
20530 2020-01-15 Jakub Jelinek <jakub@redhat.com>
20533 * config/i386/sse.md
20534 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
20535 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
20536 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
20537 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
20538 just a single alternative instead of two, make operands 1 and 2
20541 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
20544 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
20547 2020-01-14 David Malcolm <dmalcolm@redhat.com>
20549 * Makefile.in (lang_opt_files): Add analyzer.opt.
20550 (ANALYZER_OBJS): New.
20551 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
20552 tristate.o and ANALYZER_OBJS.
20553 (TEXI_GCCINT_FILES): Add analyzer.texi.
20554 * common.opt (-fanalyzer): New driver option.
20555 * config.in: Regenerate.
20556 * configure: Regenerate.
20557 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
20558 (gccdepdir): Also create depdir for "analyzer" subdir.
20559 * digraph.cc: New file.
20560 * digraph.h: New file.
20561 * doc/analyzer.texi: New file.
20562 * doc/gccint.texi ("Static Analyzer") New menu item.
20563 (analyzer.texi): Include it.
20564 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
20565 ("Warning Options"): Add static analysis warnings to the list.
20566 (-Wno-analyzer-double-fclose): New option.
20567 (-Wno-analyzer-double-free): New option.
20568 (-Wno-analyzer-exposure-through-output-file): New option.
20569 (-Wno-analyzer-file-leak): New option.
20570 (-Wno-analyzer-free-of-non-heap): New option.
20571 (-Wno-analyzer-malloc-leak): New option.
20572 (-Wno-analyzer-possible-null-argument): New option.
20573 (-Wno-analyzer-possible-null-dereference): New option.
20574 (-Wno-analyzer-null-argument): New option.
20575 (-Wno-analyzer-null-dereference): New option.
20576 (-Wno-analyzer-stale-setjmp-buffer): New option.
20577 (-Wno-analyzer-tainted-array-index): New option.
20578 (-Wno-analyzer-use-after-free): New option.
20579 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
20580 (-Wno-analyzer-use-of-uninitialized-value): New option.
20581 (-Wanalyzer-too-complex): New option.
20582 (-fanalyzer-call-summaries): New warning.
20583 (-fanalyzer-checker=): New warning.
20584 (-fanalyzer-fine-grained): New warning.
20585 (-fno-analyzer-state-merge): New warning.
20586 (-fno-analyzer-state-purge): New warning.
20587 (-fanalyzer-transitivity): New warning.
20588 (-fanalyzer-verbose-edges): New warning.
20589 (-fanalyzer-verbose-state-changes): New warning.
20590 (-fanalyzer-verbosity=): New warning.
20591 (-fdump-analyzer): New warning.
20592 (-fdump-analyzer-callgraph): New warning.
20593 (-fdump-analyzer-exploded-graph): New warning.
20594 (-fdump-analyzer-exploded-nodes): New warning.
20595 (-fdump-analyzer-exploded-nodes-2): New warning.
20596 (-fdump-analyzer-exploded-nodes-3): New warning.
20597 (-fdump-analyzer-supergraph): New warning.
20598 * doc/sourcebuild.texi (dg-require-dot): New.
20599 (dg-check-dot): New.
20600 * gdbinit.in (break-on-saved-diagnostic): New command.
20601 * graphviz.cc: New file.
20602 * graphviz.h: New file.
20603 * ordered-hash-map-tests.cc: New file.
20604 * ordered-hash-map.h: New file.
20605 * passes.def (pass_analyzer): Add before
20606 pass_ipa_whole_program_visibility.
20607 * selftest-run-tests.c (selftest::run_tests): Call
20608 selftest::ordered_hash_map_tests_cc_tests.
20609 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
20611 * shortest-paths.h: New file.
20612 * timevar.def (TV_ANALYZER): New timevar.
20613 (TV_ANALYZER_SUPERGRAPH): Likewise.
20614 (TV_ANALYZER_STATE_PURGE): Likewise.
20615 (TV_ANALYZER_PLAN): Likewise.
20616 (TV_ANALYZER_SCC): Likewise.
20617 (TV_ANALYZER_WORKLIST): Likewise.
20618 (TV_ANALYZER_DUMP): Likewise.
20619 (TV_ANALYZER_DIAGNOSTICS): Likewise.
20620 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
20621 * tree-pass.h (make_pass_analyzer): New decl.
20622 * tristate.cc: New file.
20623 * tristate.h: New file.
20625 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
20628 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
20629 alternatives 9 and 10.
20631 2020-01-14 David Malcolm <dmalcolm@redhat.com>
20633 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
20634 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
20635 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
20636 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
20637 (selftest::hash_map_tests_c_tests): Call it.
20638 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
20639 New static constant, using the value of = H::empty_zero_p.
20640 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
20641 from default_hash_traits <Value>.
20642 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
20644 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
20645 * hash-table.h (hash_table::alloc_entries): Guard the loop of
20646 calls to mark_empty with !Descriptor::empty_zero_p.
20647 (hash_table::empty_slow): Conditionalize the memset call with a
20648 check that Descriptor::empty_zero_p; otherwise, loop through the
20649 entries calling mark_empty on them.
20650 * hash-traits.h (int_hash::empty_zero_p): New static constant.
20651 (pointer_hash::empty_zero_p): Likewise.
20652 (pair_hash::empty_zero_p): Likewise.
20653 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
20655 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
20656 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
20657 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
20658 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
20659 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
20660 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
20661 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
20662 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
20663 * tree-vectorizer.h
20664 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
20667 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
20669 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
20670 fix typo on return value.
20672 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
20675 * cgraph.c (symbol_table::create_edge): Init speculative_id and
20677 (cgraph_edge::make_speculative): Add param for setting speculative_id
20679 (cgraph_edge::speculative_call_info): Update comments and find reference
20680 by speculative_id for multiple indirect targets.
20681 (cgraph_edge::resolve_speculation): Decrease the speculations
20682 for indirect edge, drop it's speculative if not direct target
20683 left. Update comments.
20684 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
20685 (cgraph_node::dump): Print num_speculative_call_targets.
20686 (cgraph_node::verify_node): Don't report error if speculative
20687 edge not include statement.
20688 (cgraph_edge::num_speculative_call_targets_p): New function.
20689 * cgraph.h (int common_target_id): Remove.
20690 (int common_target_probability): Remove.
20691 (num_speculative_call_targets): New variable.
20692 (make_speculative): Add param for setting speculative_id.
20693 (cgraph_edge::num_speculative_call_targets_p): New declare.
20694 (target_prob): New variable.
20695 (speculative_id): New variable.
20696 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
20697 call summaries for multiple speculative call targets.
20698 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
20699 * ipa-profile.c (struct speculative_call_target): New struct.
20700 (class speculative_call_summary): New class.
20701 (class speculative_call_summaries): New class.
20702 (call_sums): New variable.
20703 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
20704 (ipa_profile_write_edge_summary): New function.
20705 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
20706 (ipa_profile_dump_all_summaries): New function.
20707 (ipa_profile_read_edge_summary): New function.
20708 (ipa_profile_read_summary_section): New function.
20709 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
20710 (ipa_profile): Generate num_speculative_call_targets from
20712 * ipa-ref.h (speculative_id): New variable.
20713 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
20714 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
20715 common_target_probability. Stream out speculative_id and
20716 num_speculative_call_targets.
20717 (input_edge): Likewise.
20718 * predict.c (dump_prediction): Remove edges count assert to be
20720 * symtab.c (symtab_node::create_reference): Init speculative_id.
20721 (symtab_node::clone_references): Clone speculative_id.
20722 (symtab_node::clone_referring): Clone speculative_id.
20723 (symtab_node::clone_reference): Clone speculative_id.
20724 (symtab_node::clear_stmts_in_references): Clear speculative_id.
20725 * tree-inline.c (copy_bb): Duplicate all the speculative edges
20726 if indirect call contains multiple speculative targets.
20727 * value-prof.h (check_ic_target): Remove.
20728 * value-prof.c (gimple_value_profile_transformations):
20729 Use void function gimple_ic_transform.
20730 * value-prof.c (gimple_ic_transform): Handle topn case.
20731 Fix comment typos. Change it to a void function.
20733 2020-01-13 Andrew Pinski <apinski@marvell.com>
20735 * config/aarch64/aarch64-cores.def (octeontx2): New define.
20736 (octeontx2t98): New define.
20737 (octeontx2t96): New define.
20738 (octeontx2t93): New define.
20739 (octeontx2f95): New define.
20740 (octeontx2f95n): New define.
20741 (octeontx2f95mm): New define.
20742 * config/aarch64/aarch64-tune.md: Regenerate.
20743 * doc/invoke.texi (-mcpu=): Document the new cpu types.
20745 2020-01-13 Jason Merrill <jason@redhat.com>
20747 PR c++/33799 - destroy return value if local cleanup throws.
20748 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
20750 2020-01-13 Martin Liska <mliska@suse.cz>
20752 * ipa-cp.c (get_max_overall_size): Use newly
20753 renamed param param_ipa_cp_unit_growth.
20754 * params.opt: Remove legacy param name.
20756 2020-01-13 Martin Sebor <msebor@redhat.com>
20758 PR tree-optimization/93213
20759 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
20760 stores to be eliminated.
20762 2020-01-13 Martin Liska <mliska@suse.cz>
20764 * opts.c (print_help): Do not print CL_PARAM
20765 and CL_WARNING for CL_OPTIMIZATION.
20767 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
20770 * doc/invoke.texi (Warning Options): Add caveat about some warnings
20771 depending on optimization settings.
20773 2020-01-13 Jakub Jelinek <jakub@redhat.com>
20775 PR tree-optimization/90838
20776 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
20777 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
20778 argument rather than to initialize temporary for targets that
20779 don't use the mode argument at all. Initialize ctzval to avoid
20782 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
20784 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
20785 * tree-core.h: Document it.
20786 * gimplify.c (gimplify_omp_workshare): Set it.
20787 * omp-low.c (lower_omp_target): Use it.
20788 * tree-pretty-print.c (dump_omp_clause): Print it.
20790 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
20791 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
20793 2020-01-10 David Malcolm <dmalcolm@redhat.com>
20795 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
20796 * common.opt (fdiagnostics-path-format=): New option.
20797 (diagnostic_path_format): New enum.
20798 (fdiagnostics-show-path-depths): New option.
20799 * coretypes.h (diagnostic_event_id_t): New forward decl.
20800 * diagnostic-color.c (color_dict): Add "path".
20801 * diagnostic-event-id.h: New file.
20802 * diagnostic-format-json.cc (json_from_expanded_location): Make
20804 (json_end_diagnostic): Call context->make_json_for_path if it
20805 exists and the diagnostic has a path.
20806 (diagnostic_output_format_init): Clear context->print_path.
20807 * diagnostic-path.h: New file.
20808 * diagnostic-show-locus.c (colorizer::set_range): Special-case
20809 when printing a run of events in a diagnostic_path so that they
20810 all get the same color.
20811 (layout::m_diagnostic_path_p): New field.
20812 (layout::layout): Initialize it.
20813 (layout::print_any_labels): Don't colorize the label text for an
20814 event in a diagnostic_path.
20815 (gcc_rich_location::add_location_if_nearby): Add
20816 "restrict_to_current_line_spans" and "label" params. Pass the
20817 former to layout.maybe_add_location_range; pass the latter
20818 when calling add_range.
20819 * diagnostic.c: Include "diagnostic-path.h".
20820 (diagnostic_initialize): Initialize context->path_format and
20821 context->show_path_depths.
20822 (diagnostic_show_any_path): New function.
20823 (diagnostic_path::interprocedural_p): New function.
20824 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
20825 (simple_diagnostic_path::num_events): New function.
20826 (simple_diagnostic_path::get_event): New function.
20827 (simple_diagnostic_path::add_event): New function.
20828 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
20829 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
20830 (debug): New overload taking a diagnostic_path *.
20831 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
20832 * diagnostic.h (enum diagnostic_path_format): New enum.
20833 (json::value): New forward decl.
20834 (diagnostic_context::path_format): New field.
20835 (diagnostic_context::show_path_depths): New field.
20836 (diagnostic_context::print_path): New callback field.
20837 (diagnostic_context::make_json_for_path): New callback field.
20838 (diagnostic_show_any_path): New decl.
20839 (json_from_expanded_location): New decl.
20840 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
20841 (-fdiagnostics-show-path-depths): New option.
20842 (-fdiagnostics-color): Add "path" to description of default
20843 GCC_COLORS; describe it.
20844 (-fdiagnostics-format=json): Document how diagnostic paths are
20845 represented in the JSON output format.
20846 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
20847 Add optional params "restrict_to_current_line_spans" and "label".
20848 * opts.c (common_handle_option): Handle
20849 OPT_fdiagnostics_path_format_ and
20850 OPT_fdiagnostics_show_path_depths.
20851 * pretty-print.c: Include "diagnostic-event-id.h".
20852 (pp_format): Implement "%@" format code for printing
20853 diagnostic_event_id_t *.
20854 (selftest::test_pp_format): Add tests for "%@".
20855 * selftest-run-tests.c (selftest::run_tests): Call
20856 selftest::tree_diagnostic_path_cc_tests.
20857 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
20858 * toplev.c (general_init): Initialize global_dc->path_format and
20859 global_dc->show_path_depths.
20860 * tree-diagnostic-path.cc: New file.
20861 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
20862 non-static. Drop "diagnostic" param in favor of storing the
20863 original value of "where" and re-using it.
20864 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
20865 maybe_unwind_expanded_macro_loc.
20866 (tree_diagnostics_defaults): Initialize context->print_path and
20867 context->make_json_for_path.
20868 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
20870 (default_tree_make_json_for_path): New decl.
20871 (maybe_unwind_expanded_macro_loc): New decl.
20873 2020-01-10 Jakub Jelinek <jakub@redhat.com>
20875 PR tree-optimization/93210
20876 * fold-const.h (native_encode_initializer,
20877 can_native_interpret_type_p): Declare.
20878 * fold-const.c (native_encode_string): Fix up handling with off != -1,
20880 (native_encode_initializer): New function, moved from dwarf2out.c.
20881 Adjust to native_encode_expr compatible arguments, including dry-run
20882 and partial extraction modes. Don't handle STRING_CST.
20883 (can_native_interpret_type_p): No longer static.
20884 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
20885 offset / BITS_PER_UNIT fits into int and don't call it if
20886 can_native_interpret_type_p fails. If suboff is NULL and for
20887 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
20888 native_encode_initializer.
20889 (fold_const_aggregate_ref_1): Formatting fix.
20890 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
20891 (tree_add_const_value_attribute): Adjust caller.
20893 PR tree-optimization/90838
20894 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
20895 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
20896 CTZ_DEFINED_VALUE_AT_ZERO.
20898 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
20900 PR inline-asm/93027
20901 * lra-constraints.c (match_reload): Permit input operands have the
20902 same mode as output while other input operands have a different
20905 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
20907 PR tree-optimization/90838
20908 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
20909 (check_ctz_string): Likewise.
20910 (optimize_count_trailing_zeroes): Likewise.
20911 (simplify_count_trailing_zeroes): Likewise.
20912 (pass_forwprop::execute): Try ctz simplification.
20913 * match.pd: Add matching for ctz idioms.
20915 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20917 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
20919 (aarch64_invalid_unary_op): New function for target hook.
20920 (aarch64_invalid_binary_op): New function for target hook.
20922 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20924 * config.gcc: Add arm_bf16.h.
20925 * config/aarch64/aarch64-builtins.c
20926 (aarch64_simd_builtin_std_type): Add BFmode.
20927 (aarch64_init_simd_builtin_types): Define element types for vector
20929 (aarch64_init_bf16_types): New function.
20930 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
20931 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
20933 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
20934 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
20936 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
20937 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
20938 * config/aarch64/aarch64.c
20939 (aarch64_classify_vector_mode): Add support for BF types.
20940 (aarch64_gimplify_va_arg_expr): Add support for BF types.
20941 (aarch64_vq_mode): Add support for BF types.
20942 (aarch64_simd_container_mode): Add support for BF types.
20943 (aarch64_mangle_type): Add support for BF scalar type.
20944 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
20945 * config/aarch64/arm_bf16.h: New file.
20946 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
20947 * config/aarch64/iterators.md: Add BF types to mode attributes.
20948 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
20950 2020-01-10 Jason Merrill <jason@redhat.com>
20952 PR c++/93173 - incorrect tree sharing.
20953 * gimplify.c (copy_if_shared): No longer static.
20954 * gimplify.h: Declare it.
20956 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20958 * doc/invoke.texi (-msve-vector-bits=): Document that
20959 -msve-vector-bits=128 now generates VL-specific code for
20960 little-endian targets.
20961 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
20962 build_vector_type_for_mode to construct the data vector types.
20963 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
20964 VL-specific code for -msve-vector-bits=128 on little-endian targets.
20965 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
20966 for 128-bit vectors.
20968 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20970 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
20973 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20975 * config/aarch64/aarch64-builtins.c
20976 (aarch64_builtin_vectorized_function): Check for specific vector modes,
20977 rather than checking the number of elements and the element mode.
20979 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20981 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
20982 get_related_vectype_for_scalar_type rather than build_vector_type
20983 to create the index type for a conditional reduction.
20985 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20987 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
20988 for any type of gather or scatter, including strided accesses.
20990 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
20992 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
20995 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
20997 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
20998 get_dr_vinfo_offset
20999 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
21000 parameter and its use to reset DR_OFFSET's.
21001 (vect_transform_loop): Remove orig_drs_init argument.
21002 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
21003 member of dr_vec_info rather than the offset of the associated
21004 data_reference's innermost_loop_behavior.
21005 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
21006 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
21007 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
21008 get_dr_vinfo_offset.
21009 (vectorizable_store): Likewise.
21010 (vectorizable_load): Likewise.
21012 2020-01-10 Richard Biener <rguenther@suse.de>
21014 * gimple-ssa-store-merging
21015 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
21017 2020-01-10 Martin Liska <mliska@suse.cz>
21020 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
21021 encapsulation that was there before r280040.
21023 2020-01-10 Richard Biener <rguenther@suse.de>
21025 PR middle-end/93199
21026 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
21027 sequences to avoid walking them again for secondary opportunities.
21028 (pass_lower_eh_dispatch::execute): Instead actually insert
21031 2020-01-10 Richard Biener <rguenther@suse.de>
21033 PR middle-end/93199
21034 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
21035 (cleanup_all_empty_eh): Walk landing pads in reverse order to
21036 avoid quadraticness.
21038 2020-01-10 Martin Jambor <mjambor@suse.cz>
21040 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
21041 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
21042 to get param_ipa_sra_max_replacements.
21043 (param_splitting_across_edge): Pass the caller to
21044 pull_accesses_from_callee.
21046 2020-01-10 Martin Jambor <mjambor@suse.cz>
21048 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
21049 * ipa-cp.c (max_new_size): Removed.
21050 (orig_overall_size): New variable.
21051 (get_max_overall_size): New function.
21052 (estimate_local_effects): Use it. Adjust dump.
21053 (decide_about_value): Likewise.
21054 (ipcp_propagate_stage): Do not calculate max_new_size, just store
21055 orig_overall_size. Adjust dump.
21056 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
21058 2020-01-10 Martin Jambor <mjambor@suse.cz>
21060 * params.opt (param_ipa_max_agg_items): Mark as Optimization
21061 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
21062 instead of param_ipa_max_agg_items.
21063 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
21064 optimization info for the callee.
21066 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
21068 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
21069 markers if debug_inline_points is false.
21071 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21073 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
21075 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
21076 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
21077 aarch64-sve-builtins-sve2.h.
21078 (aarch64-sve-builtins-sve2.o): New rule.
21079 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
21080 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
21081 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
21082 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
21083 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
21084 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
21086 * config/aarch64/aarch64-sve.md: Update comments with SVE2
21087 instructions that are handled here.
21088 (@cond_asrd<mode>): Generalize to...
21089 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
21090 (*cond_asrd<mode>_2): Generalize to...
21091 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
21092 (*cond_asrd<mode>_z): Generalize to...
21093 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
21094 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
21095 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
21096 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
21097 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
21099 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
21100 (@aarch64_scatter_stnt<mode>): Likewise.
21101 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
21102 (@aarch64_mul_lane_<mode>): Likewise.
21103 (@aarch64_sve_suqadd<mode>_const): Likewise.
21104 (*<sur>h<addsub><mode>): Generalize to...
21105 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
21107 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
21108 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
21109 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
21110 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
21111 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
21112 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
21113 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
21114 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
21115 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
21116 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
21117 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
21118 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
21119 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
21120 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
21121 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
21122 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
21123 (@aarch64_sve2_xar<mode>): Likewise.
21124 (@aarch64_sve2_bcax<mode>): Likewise.
21125 (*aarch64_sve2_eor3<mode>): Rename to...
21126 (@aarch64_sve2_eor3<mode>): ...this.
21127 (@aarch64_sve2_bsl<mode>): New expander.
21128 (@aarch64_sve2_nbsl<mode>): Likewise.
21129 (@aarch64_sve2_bsl1n<mode>): Likewise.
21130 (@aarch64_sve2_bsl2n<mode>): Likewise.
21131 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
21132 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
21133 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
21134 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
21135 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
21136 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
21137 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
21138 (<su>mull<bt><Vwide>): Generalize to...
21139 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
21141 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
21142 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
21143 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
21144 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
21145 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
21146 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
21147 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
21148 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
21149 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
21150 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
21151 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
21152 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
21153 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
21154 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
21155 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
21156 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
21157 (<SHRNB:r>shrnb<mode>): Generalize to...
21158 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
21160 (<SHRNT:r>shrnt<mode>): Generalize to...
21161 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
21163 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
21164 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
21165 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
21166 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
21167 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
21168 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
21169 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
21170 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
21171 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
21172 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
21173 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
21174 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
21175 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
21176 (@aarch64_sve2_cvtnt<mode>): Likewise.
21177 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
21178 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
21179 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
21180 (@aarch64_sve2_cvtxnt<mode>): Likewise.
21181 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
21182 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
21183 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
21184 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
21185 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
21186 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
21187 (@aarch64_sve2_pmul<mode>): Likewise.
21188 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
21189 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
21190 (@aarch64_sve2_tbl2<mode>): Likewise.
21191 (@aarch64_sve2_tbx<mode>): Likewise.
21192 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
21193 (@aarch64_sve2_histcnt<mode>): Likewise.
21194 (@aarch64_sve2_histseg<mode>): Likewise.
21195 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
21196 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
21197 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
21198 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
21199 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
21200 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
21201 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
21202 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
21203 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
21204 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
21205 (SVE2_PMULL_PAIR_I): New mode iterators.
21206 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
21207 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
21208 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
21209 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
21210 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
21211 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
21212 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
21213 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
21214 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
21215 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
21216 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
21217 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
21218 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
21219 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
21220 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
21221 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
21222 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
21223 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
21224 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
21225 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
21226 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
21227 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
21228 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
21229 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
21230 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
21231 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
21232 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
21233 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
21234 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
21235 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
21236 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
21238 (VNARROW, Ventype): New mode attributes.
21239 (Vewtype): Handle VNx2DI. Fix typo in comment.
21240 (VDOUBLE): New mode attribute.
21241 (sve_lane_con): Handle VNx8HI.
21242 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
21243 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
21244 (sve_int_op, sve_int_op_rev): Handle the above codes.
21245 (sve_pred_int_rhs2_operand): Likewise.
21246 (MULLBT, SHRNB, SHRNT): Delete.
21247 (SVE_INT_SHIFT_IMM): New int iterator.
21248 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
21249 and UNSPEC_WHILEHS for TARGET_SVE2.
21250 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
21251 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
21252 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
21253 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
21254 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
21255 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
21256 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
21257 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
21258 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
21259 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
21260 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
21261 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
21262 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
21263 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
21264 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
21265 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
21266 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
21267 (optab): Handle the new unspecs.
21268 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
21270 (lr): Handle the new unspecs.
21272 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
21273 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
21274 (sve_int_qsub_op): New int attributes.
21275 (sve_fp_op, rot): Handle the new unspecs.
21276 * config/aarch64/aarch64-sve-builtins.h
21277 (function_resolver::require_matching_pointer_type): Declare.
21278 (function_resolver::resolve_unary): Add an optional boolean argument.
21279 (function_resolver::finish_opt_n_resolution): Add an optional
21280 type_suffix_index argument.
21281 (gimple_folder::redirect_call): Declare.
21282 (gimple_expander::prepare_gather_address_operands): Add an optional
21284 * config/aarch64/aarch64-sve-builtins.cc: Include
21285 aarch64-sve-builtins-sve2.h.
21286 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
21287 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
21288 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
21289 (TYPES_hsd_integer): Use TYPES_hsd_signed.
21290 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
21291 (TYPES_s_unsigned): Likewise.
21292 (TYPES_s_integer): Use TYPES_s_unsigned.
21293 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
21294 (TYPES_sd_integer): Use them.
21295 (TYPES_d_unsigned): New macro.
21296 (TYPES_d_integer): Use it.
21297 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
21298 (TYPES_cvt_narrow): Likewise.
21299 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
21300 (preds_mx): New variable.
21301 (function_builder::add_overloaded_function): Allow the new feature
21302 set to be more restrictive than the original one.
21303 (function_resolver::infer_pointer_type): Remove qualifiers from
21304 the pointer type before printing it.
21305 (function_resolver::require_matching_pointer_type): New function.
21306 (function_resolver::resolve_sv_displacement): Handle functions
21307 that don't support 32-bit vector indices or svint32_t vector offsets.
21308 (function_resolver::finish_opt_n_resolution): Take the inferred type
21309 as a separate argument.
21310 (function_resolver::resolve_unary): Optionally treat all forms in
21311 the same way as normal merging functions.
21312 (gimple_folder::redirect_call): New function.
21313 (function_expander::prepare_gather_address_operands): Add an argument
21314 that says whether scaled forms are available. If they aren't,
21315 handle scaling of vector indices and don't add the extension and
21317 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
21318 fall back to using cond_* instead.
21319 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
21320 Split out the member variables into...
21321 (rtx_code_function_base): ...this new base class.
21322 (rtx_code_function_rotated): Inherit rtx_code_function_base.
21323 (unspec_based_function): Split out the member variables into...
21324 (unspec_based_function_base): ...this new base class.
21325 (unspec_based_function_rotated): Inherit unspec_based_function_base.
21326 (unspec_based_function_exact_insn): New class.
21327 (unspec_based_add_function, unspec_based_add_lane_function)
21328 (unspec_based_lane_function, unspec_based_pred_function)
21329 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
21330 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
21331 (unspec_based_sub_function, unspec_based_sub_lane_function): New
21333 (unspec_based_fused_function): New class.
21334 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
21335 (unspec_based_fused_lane_function): New class.
21336 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
21338 (CODE_FOR_MODE1): New macro.
21339 (fixed_insn_function): New class.
21340 (while_comparison): Likewise.
21341 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
21342 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
21343 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
21344 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
21345 (load_gather_sv_restricted, shift_left_imm_long): Declare.
21346 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
21347 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
21348 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
21349 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
21350 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
21351 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
21352 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
21353 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
21354 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
21355 Also add an initial argument for unary_convert_narrowt, regardless
21356 of the predication type.
21357 (build_32_64): Allow loads and stores to specify MODE_none.
21358 (build_sv_index64, build_sv_uint_offset): New functions.
21359 (long_type_suffix): New function.
21360 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
21361 (binary_imm_long_base, load_gather_sv_base): Likewise.
21362 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
21363 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
21364 (unary_narrowb_base, unary_narrowt_base): Likewise.
21365 (binary_long_lane_def, binary_long_lane): New shape.
21366 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
21367 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
21368 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
21369 (binary_to_uint_def, binary_to_uint): Likewise.
21370 (binary_wide_def, binary_wide): Likewise.
21371 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
21372 (compare_def, compare): Likewise.
21373 (compare_ptr_def, compare_ptr): Likewise.
21374 (load_ext_gather_index_restricted_def,
21375 load_ext_gather_index_restricted): Likewise.
21376 (load_ext_gather_offset_restricted_def,
21377 load_ext_gather_offset_restricted): Likewise.
21378 (load_gather_sv_def): Inherit from load_gather_sv_base.
21379 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
21380 (shift_left_imm_def, shift_left_imm): Likewise.
21381 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
21382 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
21383 (store_scatter_index_restricted_def,
21384 store_scatter_index_restricted): Likewise.
21385 (store_scatter_offset_restricted_def,
21386 store_scatter_offset_restricted): Likewise.
21387 (tbl_tuple_def, tbl_tuple): Likewise.
21388 (ternary_long_lane_def, ternary_long_lane): Likewise.
21389 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
21390 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
21391 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
21392 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
21393 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
21394 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
21395 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
21396 (ternary_uint_def, ternary_uint): Likewise.
21397 (unary_convert): Fix typo in comment.
21398 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
21399 (unary_long_def, unary_long): Likewise.
21400 (unary_narrowb_def, unary_narrowb): Likewise.
21401 (unary_narrowt_def, unary_narrowt): Likewise.
21402 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
21403 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
21404 (unary_to_int_def, unary_to_int): Likewise.
21405 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
21406 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
21407 (svasrd_impl): Delete.
21408 (svcadd_impl::expand): Handle integer operations too.
21409 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
21410 new functions to derive the unspec numbers.
21411 (svmla_svmls_lane_impl): Replace with...
21412 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
21413 integer operations too.
21414 (svwhile_impl): Rename to...
21415 (svwhilelx_impl): ...this and inherit from while_comparison.
21416 (svasrd): Use unspec_based_function.
21417 (svmla_lane): Use svmla_lane_impl.
21418 (svmls_lane): Use svmls_lane_impl.
21419 (svrecpe, svrsqrte): Handle unsigned integer operations too.
21420 (svwhilele, svwhilelt): Use svwhilelx_impl.
21421 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
21422 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
21423 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
21424 * config/aarch64/aarch64-sve-builtins.def: Include
21425 aarch64-sve-builtins-sve2.def.
21427 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21429 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
21430 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
21431 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
21432 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
21433 immediates as well as vector ones.
21434 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
21435 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
21436 (aarch64_sve_qsub_immediate): Update calls accordingly.
21438 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21440 * config/aarch64/aarch64-sve2.md: Add banner comments.
21441 (<su>mulh<r>s<mode>3): Move further up file.
21442 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
21443 (*aarch64_sve2_sra<mode>): Move further down file.
21444 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
21446 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21448 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
21449 and UNSPEC_WHILEWR.
21450 (while_optab_cmp): Handle them.
21451 * config/aarch64/aarch64-sve.md
21452 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
21453 and add a "@" marker.
21454 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
21455 instead of gen_aarch64_sve2_while_ptest.
21456 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
21458 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21460 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
21461 (UNSPEC_WHILELE): ...this.
21462 (UNSPEC_WHILE_LO): Rename to...
21463 (UNSPEC_WHILELO): ...this.
21464 (UNSPEC_WHILE_LS): Rename to...
21465 (UNSPEC_WHILELS): ...this.
21466 (UNSPEC_WHILE_LT): Rename to...
21467 (UNSPEC_WHILELT): ...this.
21468 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
21469 (cmp_op, while_optab_cmp): Likewise.
21470 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
21471 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
21472 (svwhilelt): Likewise.
21474 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21476 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
21477 (unary_to_uint): Define.
21478 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
21479 (unary_count): Rename to...
21480 (unary_to_uint_def, unary_to_uint): ...this.
21481 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
21483 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21485 * config/aarch64/aarch64-sve-builtins-functions.h
21486 (code_for_mode_function): New class.
21487 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
21488 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
21489 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
21490 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
21491 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
21493 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21495 * config/aarch64/iterators.md (addsub): New code attribute.
21496 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
21498 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
21499 in the asm string and attributes. Fix indentation.
21500 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
21502 (@aarch64_sve_<optab><mode>): ...this.
21503 * config/aarch64/aarch64-sve-builtins.h
21504 (function_expander::expand_signed_unpred_op): Delete.
21505 * config/aarch64/aarch64-sve-builtins.cc
21506 (function_expander::expand_signed_unpred_op): Likewise.
21507 (function_expander::map_to_rtx_codes): If the optab isn't defined,
21508 try using code_for_aarch64_sve instead.
21509 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
21510 (svqsub_impl): Likewise.
21511 (svqadd, svqsub): Use rtx_code_function instead.
21513 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21515 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
21516 (HADDSUB, sur, addsub): Remove them.
21518 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21520 * tree-nrv.c (pass_return_slot::execute): Handle all internal
21521 functions the same way, rather than singling out those that
21522 aren't mapped directly to optabs.
21524 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
21526 * target.def (compatible_vector_types_p): New target hook.
21527 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
21528 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
21529 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
21530 * doc/tm.texi: Regenerate.
21531 * gimple-expr.c: Include target.h.
21532 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
21533 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
21535 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
21536 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
21537 Use the original predicate if it already has a suitable type.
21539 2020-01-09 Martin Jambor <mjambor@suse.cz>
21541 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
21542 resolve_speculation and redirect_call_stmt_to_callee static. Change
21543 return type of set_call_stmt to cgraph_edge *.
21544 * auto-profile.c (afdo_indirect_call): Adjust call to
21545 redirect_call_stmt_to_callee.
21546 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
21547 make the this pointer explicit, adjust self-recursive calls and the
21548 call top make_direct. Return the resulting edge.
21549 (cgraph_edge::remove): Make this pointer explicit.
21550 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
21551 (cgraph_edge::make_direct): Likewise, adjust call to
21552 resolve_speculation.
21553 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
21554 call to set_call_stmt.
21555 (cgraph_update_edges_for_call_stmt_node): Update call to
21556 set_call_stmt and remove.
21557 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
21558 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
21559 (cgraph_node::create_edge_including_clones): Moved "first" definition
21560 of edge to the block where it was used. Adjusted calls to
21562 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
21563 cgraph_edge::remove.
21564 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
21565 make_direct and redirect_call_stmt_to_callee.
21566 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
21567 resolve_speculation and make_direct.
21568 * ipa-inline-transform.c (inline_transform): Adjust call to
21569 redirect_call_stmt_to_callee.
21570 (check_speculations_1):: Adjust call to resolve_speculation.
21571 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
21572 resolve-speculation.
21573 (inline_small_functions): Adjust call to resolve_speculation.
21574 (ipa_inline): Likewise.
21575 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
21577 * ipa-visibility.c (function_and_variable_visibility): Make iteration
21578 safe with regards to edge removal, adjust calls to
21579 redirect_call_stmt_to_callee.
21580 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
21581 and redirect_call_stmt_to_callee.
21582 * multiple_target.c (create_dispatcher_calls): Adjust call to
21583 redirect_call_stmt_to_callee
21584 (redirect_to_specific_clone): Likewise.
21585 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
21586 Adjust calls to cgraph_edge::remove.
21587 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
21588 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
21589 (expand_call_inline): Adjust call to cgraph_edge::remove.
21591 2020-01-09 Martin Liska <mliska@suse.cz>
21593 * params.opt: Set Optimization for
21594 param_max_speculative_devirt_maydefs.
21596 2020-01-09 Martin Sebor <msebor@redhat.com>
21598 PR middle-end/93200
21600 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
21602 2020-01-09 Martin Liska <mliska@suse.cz>
21604 * auto-profile.c (auto_profile): Use opt_for_fn
21606 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
21607 (propagate_vals_across_arith_jfunc): Likewise.
21608 (hint_time_bonus): Likewise.
21609 (incorporate_penalties): Likewise.
21610 (good_cloning_opportunity_p): Likewise.
21611 (perform_estimation_of_a_value): Likewise.
21612 (estimate_local_effects): Likewise.
21613 (ipcp_propagate_stage): Likewise.
21614 * ipa-fnsummary.c (decompose_param_expr): Likewise.
21615 (set_switch_stmt_execution_predicate): Likewise.
21616 (analyze_function_body): Likewise.
21617 * ipa-inline-analysis.c (offline_size): Likewise.
21618 * ipa-inline.c (early_inliner): Likewise.
21619 * ipa-prop.c (ipa_analyze_node): Likewise.
21620 (ipcp_transform_function): Likewise.
21621 * ipa-sra.c (process_scan_results): Likewise.
21622 (ipa_sra_summarize_function): Likewise.
21623 * params.opt: Rename ipcp-unit-growth to
21624 ipa-cp-unit-growth. Add Optimization for various
21625 IPA-related parameters.
21627 2020-01-09 Richard Biener <rguenther@suse.de>
21629 PR middle-end/93054
21630 * gimplify.c (gimplify_expr): Deal with NOP definitions.
21632 2020-01-09 Richard Biener <rguenther@suse.de>
21634 PR tree-optimization/93040
21635 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
21637 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
21639 * common/config/avr/avr-common.c (avr_option_optimization_table)
21640 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
21642 2020-01-09 Martin Liska <mliska@suse.cz>
21644 * cgraphclones.c (symbol_table::materialize_all_clones):
21645 Use cgraph_node::dump_name.
21647 2020-01-09 Jakub Jelinek <jakub@redhat.com>
21649 PR inline-asm/93202
21650 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
21651 output_operand_lossage instead of gcc_unreachable.
21652 * doc/md.texi (riscv f constraint): Fix typo.
21655 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
21656 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
21657 CONST_SCALAR_INT_P instead of CONST_INT_P.
21658 (*subv<mode>4_1): Rename to ...
21659 (subv<mode>4_1): ... this.
21660 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
21661 define_insn_and_split patterns.
21662 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
21665 2020-01-08 David Malcolm <dmalcolm@redhat.com>
21667 * vec.c (class selftest::count_dtor): New class.
21668 (selftest::test_auto_delete_vec): New test.
21669 (selftest::vec_c_tests): Call it.
21670 * vec.h (class auto_delete_vec): New class template.
21671 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
21673 2020-01-08 David Malcolm <dmalcolm@redhat.com>
21675 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
21677 2020-01-08 Jim Wilson <jimw@sifive.com>
21679 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
21680 use of TLS_MODEL_LOCAL_EXEC when not pic.
21682 2020-01-08 David Malcolm <dmalcolm@redhat.com>
21684 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
21687 2020-01-08 Jakub Jelinek <jakub@redhat.com>
21690 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
21691 *stack_protect_set_3 peephole2): Also check that the second
21692 insns source is general_operand.
21695 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
21696 predicate for output operand instead of register_operand.
21697 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
21698 memory destination and non-memory operands[2].
21700 2020-01-08 Martin Liska <mliska@suse.cz>
21702 * cgraph.c (cgraph_node::dump): Use ::dump_name or
21703 ::dump_asm_name instead of (::name or ::asm_name).
21704 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
21705 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
21706 (analyze_functions): Likewise.
21707 (expand_all_functions): Likewise.
21708 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
21709 (propagate_bits_across_jump_function): Likewise.
21710 (dump_profile_updates): Likewise.
21711 (ipcp_store_bits_results): Likewise.
21712 (ipcp_store_vr_results): Likewise.
21713 * ipa-devirt.c (dump_targets): Likewise.
21714 * ipa-fnsummary.c (analyze_function_body): Likewise.
21715 * ipa-hsa.c (check_warn_node_versionable): Likewise.
21716 (process_hsa_functions): Likewise.
21717 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
21718 (set_alias_uids): Likewise.
21719 * ipa-inline-transform.c (save_inline_function_body): Likewise.
21720 * ipa-inline.c (recursive_inlining): Likewise.
21721 (inline_to_all_callers_1): Likewise.
21722 (ipa_inline): Likewise.
21723 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
21724 (ipa_propagate_frequency): Likewise.
21725 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
21726 (remove_described_reference): Likewise.
21727 * ipa-pure-const.c (worse_state): Likewise.
21728 (check_retval_uses): Likewise.
21729 (analyze_function): Likewise.
21730 (propagate_pure_const): Likewise.
21731 (propagate_nothrow): Likewise.
21732 (dump_malloc_lattice): Likewise.
21733 (propagate_malloc): Likewise.
21734 (pass_local_pure_const::execute): Likewise.
21735 * ipa-visibility.c (optimize_weakref): Likewise.
21736 (function_and_variable_visibility): Likewise.
21737 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
21738 (ipa_discover_variable_flags): Likewise.
21739 * lto-streamer-out.c (output_function): Likewise.
21740 (output_constructor): Likewise.
21741 * tree-inline.c (copy_bb): Likewise.
21742 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
21743 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
21745 2020-01-08 Richard Biener <rguenther@suse.de>
21747 PR middle-end/93199
21748 * tree-eh.c (sink_clobbers): Update virtual operands for
21749 the first and last stmt only. Add a dry-run capability.
21750 (pass_lower_eh_dispatch::execute): Perform clobber sinking
21751 after CFG manipulations and in RPO order to catch all
21752 secondary opportunities reliably.
21754 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
21757 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
21759 2019-01-08 Richard Biener <rguenther@suse.de>
21761 PR middle-end/93199
21762 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
21763 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
21764 virtual operand, also updating SSA use.
21765 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
21766 Update stmt after resetting virtual operand.
21767 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
21768 * gimple-iterator.c (gsi_remove): When not removing the stmt
21769 permanently do not delink immediate uses or mark the stmt modified.
21771 2020-01-08 Martin Liska <mliska@suse.cz>
21773 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
21774 (ipa_call_context::estimate_size_and_time): Likewise.
21775 (inline_analyze_function): Likewise.
21777 2020-01-08 Martin Liska <mliska@suse.cz>
21779 * cgraph.c (cgraph_node::dump): Use systematically
21782 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
21784 Add -nodevicespecs option for avr.
21787 * config/avr/avr.opt (-nodevicespecs): New driver option.
21788 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
21789 "-specs=device-specs/..." if that option is not set.
21790 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
21792 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
21794 Implement 64-bit double functions for avr.
21797 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
21798 --with-double-comparison.
21799 * doc/install.texi: Document them.
21800 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
21801 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
21802 <WITH_DOUBLE_COMPARISON>: New built-in defines.
21803 * doc/invoke.texi (AVR Built-in Macros): Document them.
21804 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
21805 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
21806 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
21808 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
21811 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
21812 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
21813 when only building rm-profile multilibs.
21815 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
21818 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
21819 lattice for a value to check.
21820 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
21821 finite propagation in self-recursive scc.
21823 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
21825 * ipa-inline.c (caller_growth_limits): Restore the AND.
21827 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
21829 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
21830 (VEC_ALLREG_ALT): New iterator.
21831 (VEC_ALLREG_INT_MODE): New iterator.
21832 (VCMP_MODE): New iterator.
21833 (VCMP_MODE_INT): New iterator.
21834 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
21835 (vec_cmp<u>v64qidi): New define_expand.
21836 (vec_cmp<mode>di_exec): Use VCMP_MODE.
21837 (vec_cmpu<mode>di_exec): New define_expand.
21838 (vec_cmp<u>v64qidi_exec): New define_expand.
21839 (vec_cmp<mode>di_dup): Use VCMP_MODE.
21840 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
21841 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
21842 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
21843 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
21844 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
21845 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
21846 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
21847 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
21848 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
21850 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
21851 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
21853 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
21855 * config/gcn/constraints.md (DA): Update description and match.
21857 (Db): New constraint.
21858 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
21860 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
21861 Implement 'Db' mixed immediate type.
21862 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
21863 (addcv64si3_dup<exec_vcc>): Delete.
21864 (subcv64si3<exec_vcc>): Rework constraints.
21865 (addv64di3): Rework constraints.
21866 (addv64di3_exec): Rework constraints.
21867 (subv64di3): Rework constraints.
21868 (addv64di3_dup): Delete.
21869 (addv64di3_dup_exec): Delete.
21870 (addv64di3_zext): Rework constraints.
21871 (addv64di3_zext_exec): Rework constraints.
21872 (addv64di3_zext_dup): Rework constraints.
21873 (addv64di3_zext_dup_exec): Rework constraints.
21874 (addv64di3_zext_dup2): Rework constraints.
21875 (addv64di3_zext_dup2_exec): Rework constraints.
21876 (addv64di3_sext_dup2): Rework constraints.
21877 (addv64di3_sext_dup2_exec): Rework constraints.
21879 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
21881 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
21882 existing target checks.
21884 2020-01-07 Richard Biener <rguenther@suse.de>
21886 * doc/install.texi: Bump minimal supported MPC version.
21888 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
21890 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
21891 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
21892 * langhooks.c: Include stor-layout.h.
21893 (lhd_simulate_enum_decl): New function.
21894 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
21895 handle_arm_sve_h for the LTO frontend.
21896 (register_vector_type): Cope with null returns from pushdecl.
21898 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
21900 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
21901 (aarch64_sve::nvectors_if_data_type): Replace with...
21902 (aarch64_sve::builtin_type_p): ...this.
21903 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
21904 (find_vector_type): Delete.
21905 (add_sve_type_attribute): New function.
21906 (lookup_sve_type_attribute): Likewise.
21907 (register_builtin_types): Add an "SVE type" attribute to each type.
21908 (register_tuple_type): Likewise.
21909 (svbool_type_p, nvectors_if_data_type): Delete.
21910 (mangle_builtin_type): Use lookup_sve_type_attribute.
21911 (builtin_type_p): Likewise. Add an overload that returns the
21912 number of constituent vector and predicate registers.
21913 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
21914 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
21915 instead of aarch64_sve_argument_p.
21916 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
21917 (aarch64_pass_by_reference): Likewise.
21918 (aarch64_function_value_1): Likewise.
21919 (aarch64_return_in_memory): Likewise.
21920 (aarch64_layout_arg): Likewise.
21922 2020-01-07 Jakub Jelinek <jakub@redhat.com>
21924 PR tree-optimization/93156
21925 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
21926 least significant bit is always clear.
21928 PR tree-optimization/93118
21929 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
21930 simplifier with two intermediate conversions.
21932 2020-01-07 Martin Liska <mliska@suse.cz>
21934 * params.opt: Add Optimization for various parameters.
21936 2020-01-07 Martin Liska <mliska@suse.cz>
21939 * doc/extend.texi: Explain cloning for target_clone
21942 2020-01-07 Martin Liska <mliska@suse.cz>
21944 PR tree-optimization/92860
21945 * common.opt: Make in Optimization option
21946 as it is affected by -O0, which is an Optimization
21948 * tree-inline.c (tree_inlinable_function_p):
21949 Use opt_for_fn for warn_inline.
21950 (expand_call_inline): Likewise.
21952 2020-01-07 Martin Liska <mliska@suse.cz>
21954 PR tree-optimization/92860
21955 * common.opt: Make flag_ree as optimization
21958 2020-01-07 Martin Liska <mliska@suse.cz>
21960 PR optimization/92860
21961 * params.opt: Mark param_min_crossjump_insns with Optimization
21964 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
21966 * ipa-inline-analysis.c (estimate_growth): Fix typo.
21967 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
21969 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
21971 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
21972 helper function to return the valid addressing formats for a given
21973 hard register and mode.
21974 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
21976 * config/rs6000/constraints.md (Q constraint): Update
21978 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
21981 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
21982 Use 'Q' for doing vector extract from memory.
21983 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
21985 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
21986 doing vector extract from memory.
21987 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
21988 extract from memory.
21990 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
21991 for the offset being 34-bits when -mcpu=future is used.
21993 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
21995 * config/pa/pa.md: Revert change to use ordered_comparison_operator
21996 instead of cmpib_comparison_operator in cmpib patterns.
21997 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
21998 of cmpib_comparison_operator. Revise comment.
22000 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
22002 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
22003 in an IFN_DIV_POW2 node to be equal.
22005 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
22007 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
22008 (vect_check_scalar_mask): ...this.
22009 (vectorizable_store, vectorizable_load): Update call accordingly.
22010 (vectorizable_call): Use vect_check_scalar_mask to check the mask
22011 argument in calls to conditional internal functions.
22013 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
22015 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
22016 '0' matching inputs.
22017 (subv64di3_exec): Likewise.
22019 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
22021 * config/mips/mips.c (vr4130_align_insns): Fix typo.
22022 * doc/md.texi (movstr): Likewise.
22024 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
22026 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
22029 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
22031 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
22033 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
22034 to a temporary file and use move-if-change to update the real
22035 file where necessary.
22037 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
22039 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
22040 rather than Upa for CPY /M.
22042 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
22044 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
22047 2020-01-06 Martin Liska <mliska@suse.cz>
22049 PR tree-optimization/92860
22050 * params.opt: Mark param_max_combine_insns with Optimization
22053 2020-01-05 Jakub Jelinek <jakub@redhat.com>
22056 * config/i386/i386.md (SWIDWI): New mode iterator.
22057 (DWI, dwi): Add TImode variants.
22058 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
22059 <general_hilo_operand> instead of <general_operand>. Use
22060 CONST_SCALAR_INT_P instead of CONST_INT_P.
22061 (*addv<mode>4_1): Rename to ...
22062 (addv<mode>4_1): ... this.
22063 (QWI): New mode attribute.
22064 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
22065 define_insn_and_split patterns.
22066 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
22068 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
22069 <general_hilo_operand> instead of <general_operand>.
22070 (*addcarry<mode>_1): New define_insn.
22071 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
22073 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
22075 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
22076 Use "call" instead of "set".
22078 2020-01-03 Martin Jambor <mjambor@suse.cz>
22081 * ipa-cp.c (print_all_lattices): Skip functions without info.
22083 2020-01-03 Jakub Jelinek <jakub@redhat.com>
22086 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
22087 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
22088 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
22089 for 'e' simd clones.
22092 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
22094 (mprefer-vector-width=): Add Save.
22095 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
22096 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
22097 (ix86_debug_options, ix86_function_specific_print): Adjust
22098 ix86_target_string callers.
22099 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
22100 (ix86_valid_target_attribute_tree): Likewise.
22101 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
22102 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
22103 ix86_target_string caller.
22106 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
22107 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
22108 instead of gen_int_shift_amount + convert_modes.
22110 PR rtl-optimization/93088
22111 * loop-iv.c (find_single_def_src): Punt after looking through
22112 128 reg copies for regs with single definitions. Move definitions
22115 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
22117 * config/arm/arm-c.c (arm_cpu_builtins): Define
22118 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
22119 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
22120 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
22121 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
22122 * config/arm/arm-tables.opt: Regenerated.
22123 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
22124 arm_arch_i8mm and arm_arch_bf16 when enabled.
22125 * config/arm/arm.h (TARGET_I8MM): New macro.
22126 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
22127 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
22128 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
22129 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
22130 (v8_6_a_simd_variants): New.
22131 (v8_*_a_simd_variants): Add i8mm and bf16.
22132 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
22134 2020-01-02 Jakub Jelinek <jakub@redhat.com>
22137 * predict.c (compute_function_frequency): Don't call
22138 warn_function_cold on functions that already have cold attribute.
22140 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
22143 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
22144 COMDAT group function labels in .data.rel.ro.local section.
22145 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
22148 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
22149 comparison_operator in B and S integer comparisons. Likewise, use
22150 ordered_comparison_operator instead of cmpib_comparison_operator in
22152 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
22154 2020-01-01 Jakub Jelinek <jakub@redhat.com>
22156 Update copyright years.
22158 * gcc.c (process_command): Update copyright notice dates.
22159 * gcov-dump.c (print_version): Ditto.
22160 * gcov.c (print_version): Ditto.
22161 * gcov-tool.c (print_version): Ditto.
22162 * gengtype.c (create_file): Ditto.
22163 * doc/cpp.texi: Bump @copying's copyright year.
22164 * doc/cppinternals.texi: Ditto.
22165 * doc/gcc.texi: Ditto.
22166 * doc/gccint.texi: Ditto.
22167 * doc/gcov.texi: Ditto.
22168 * doc/install.texi: Ditto.
22169 * doc/invoke.texi: Ditto.
22171 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
22173 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
22176 2020-01-01 Jakub Jelinek <jakub@redhat.com>
22178 PR tree-optimization/93098
22179 * match.pd (popcount): For shift amounts, use integer_onep
22180 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
22181 tests. Make sure that precision is power of two larger than or equal
22182 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
22183 instead of ULL suffixed constants. Formatting fixes.
22185 Copyright (C) 2020 Free Software Foundation, Inc.
22187 Copying and distribution of this file, with or without modification,
22188 are permitted in any medium without royalty provided the copyright
22189 notice and this notice are preserved.