e9456b524ef752b0ce5a20a1862a4a015d132fd9
[gcc.git] / gcc / ChangeLog
1 2021-01-18 Vladimir N. Makarov <vmakarov@redhat.com>
2
3 PR target/97847
4 * ira.c (ira): Skip abnormal critical edge splitting.
5
6 2021-01-18 Jakub Jelinek <jakub@redhat.com>
7
8 PR tree-optimization/98727
9 * tree-ssa-math-opts.c (match_arith_overflow): Fix up computation of
10 second .MUL_OVERFLOW operand for signed multiplication with overflow
11 checking if the second operand of multiplication is not constant.
12
13 2021-01-18 David Edelsohn <dje.gcc@gmail.com>
14
15 * doc/invoke.texi (-gdwarf): TPF defaults to version 2 and AIX
16 defaults to version 4.
17
18 2021-01-18 David Malcolm <dmalcolm@redhat.com>
19
20 * attribs.h (fndecl_dealloc_argno): New decl.
21 * builtins.c (call_dealloc_argno): Split out second half of
22 function into...
23 (fndecl_dealloc_argno): New.
24 * doc/extend.texi (Common Function Attributes): Document the
25 interaction between the analyzer and the malloc attribute.
26 * doc/invoke.texi (Static Analyzer Options): Likewise.
27
28 2021-01-17 David Edelsohn <dje.gcc@gmail.com>
29
30 * config/rs6000/aix71.h (SUBTARGET_OVERRIDE_OPTIONS): Override
31 dwarf_version to 4.
32 * config/rs6000/aix72.h (SUBTARGET_OVERRIDE_OPTIONS): Same.
33
34 2021-01-17 Martin Jambor <mjambor@suse.cz>
35
36 PR ipa/98222
37 * cgraph.c (clone_of_p): Check also former_clone_of as we climb
38 the clone tree.
39
40 2021-01-17 Mark Wielaard <mark@klomp.org>
41
42 * common.opt (gdwarf-): Init(5).
43 * doc/invoke.texi (-gdwarf): Document default to 5.
44
45 2021-01-16 Kwok Cheung Yeung <kcy@codesourcery.com>
46
47 * builtin-types.def
48 (BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT): Rename
49 to...
50 (BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR):
51 ...this. Add extra argument.
52 * gimplify.c (omp_default_clause): Ensure that event handle is
53 firstprivate in a task region.
54 (gimplify_scan_omp_clauses): Handle OMP_CLAUSE_DETACH.
55 (gimplify_adjust_omp_clauses): Likewise.
56 * omp-builtins.def (BUILT_IN_GOMP_TASK): Change function type to
57 BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR.
58 * omp-expand.c (expand_task_call): Add GOMP_TASK_FLAG_DETACH to flags
59 if detach clause specified. Add detach argument when generating
60 call to GOMP_task.
61 * omp-low.c (scan_sharing_clauses): Setup data environment for detach
62 clause.
63 (finish_taskreg_scan): Move field for variable containing the event
64 handle to the front of the struct.
65 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_DETACH. Fix
66 ordering.
67 * tree-nested.c (convert_nonlocal_omp_clauses): Handle
68 OMP_CLAUSE_DETACH clause.
69 (convert_local_omp_clauses): Handle OMP_CLAUSE_DETACH clause.
70 * tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE_DETACH.
71 * tree.c (omp_clause_num_ops): Add entry for OMP_CLAUSE_DETACH.
72 Fix ordering.
73 (omp_clause_code_name): Add entry for OMP_CLAUSE_DETACH. Fix
74 ordering.
75 (walk_tree_1): Handle OMP_CLAUSE_DETACH.
76
77 2021-01-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
78
79 * config/nios2/t-rtems: Reset all MULTILIB_* variables. Shorten
80 multilib directory names. Use MULTILIB_REQUIRED instead of
81 MULTILIB_EXCEPTIONS. Add -mhw-mul -mhw-mulx -mhw-div
82 -mcustom-fpu-cfg=fph2 multilib.
83
84 2021-01-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
85
86 * config/nios2/nios2.c (NIOS2_FPU_CONFIG_NUM): Adjust value.
87 (nios2_init_fpu_configs): Provide register values for new
88 -mcustom-fpu-cfg=fph2 option variant.
89 * doc/invoke.texi (-mcustom-fpu-cfg=fph2): Document new option
90 variant.
91
92 2021-01-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
93
94 * config/nios2/nios2.c (nios2_custom_check_insns): Remove
95 custom instruction warnings.
96
97 2021-01-16 Jakub Jelinek <jakub@redhat.com>
98
99 PR tree-optimization/96669
100 * match.pd ((CST << x) & 1 -> x == 0): New simplification.
101
102 2021-01-16 Jakub Jelinek <jakub@redhat.com>
103
104 PR tree-optimization/96271
105 * passes.def: Pass false argument to first two pass_cd_dce
106 instances and true to last instance. Add comment that
107 last instance rewrites no longer addressed locals.
108 * tree-ssa-dce.c (pass_cd_dce): Add update_address_taken_p member and
109 initialize it.
110 (pass_cd_dce::set_pass_param): New method.
111 (pass_cd_dce::execute): Return TODO_update_address_taken from
112 last cd_dce instance.
113
114 2021-01-15 Carl Love <cel@us.ibm.com>
115
116 * config/rs6000/altivec.h (vec_mulh, vec_div, vec_dive, vec_mod):
117 New defines.
118 * config/rs6000/altivec.md (VIlong): Move define to file vsx.md.
119 * config/rs6000/rs6000-builtin.def (DIVES_V4SI, DIVES_V2DI,
120 DIVEU_V4SI, DIVEU_V2DI, DIVS_V4SI, DIVS_V2DI, DIVU_V4SI,
121 DIVU_V2DI, MODS_V2DI, MODS_V4SI, MODU_V2DI, MODU_V4SI,
122 MULHS_V2DI, MULHS_V4SI, MULHU_V2DI, MULHU_V4SI, MULLD_V2DI):
123 Add builtin define.
124 (MULH, DIVE, MOD): Add new BU_P10_OVERLOAD_2 definitions.
125 * config/rs6000/rs6000-call.c (VSX_BUILTIN_VEC_DIV,
126 VSX_BUILTIN_VEC_DIVE, P10_BUILTIN_VEC_MOD, P10_BUILTIN_VEC_MULH):
127 New overloaded definitions.
128 (builtin_function_type) [P10V_BUILTIN_DIVEU_V4SI,
129 P10V_BUILTIN_DIVEU_V2DI, P10V_BUILTIN_DIVU_V4SI,
130 P10V_BUILTIN_DIVU_V2DI, P10V_BUILTIN_MODU_V2DI,
131 P10V_BUILTIN_MODU_V4SI, P10V_BUILTIN_MULHU_V2DI,
132 P10V_BUILTIN_MULHU_V4SI]: Add case
133 statement for builtins.
134 * config/rs6000/rs6000.md (bits): Add new attribute sizes V4SI, V2DI.
135 * config/rs6000/vsx.md (VIlong): Moved from config/rs6000/altivec.md.
136 (UNSPEC_VDIVES, UNSPEC_VDIVEU): New unspec definitions.
137 (vsx_mul_v2di): Add if TARGET_POWER10 statement.
138 (vsx_udiv_v2di): Add if TARGET_POWER10 statement.
139 (dives_<mode>, diveu_<mode>, div<mode>3, uvdiv<mode>3,
140 mods_<mode>, modu_<mode>, mulhs_<mode>, mulhu_<mode>, mulv2di3):
141 Add define_insn, mode is VIlong.
142 * doc/extend.texi (vec_mulh, vec_mul, vec_div, vec_dive, vec_mod):
143 Add builtin descriptions.
144
145 2021-01-15 Eric Botcazou <ebotcazou@adacore.com>
146
147 * final.c (final_start_function_1): Reset force_source_line.
148
149 2021-01-15 Jakub Jelinek <jakub@redhat.com>
150
151 PR tree-optimization/96669
152 * match.pd (((1 << A) & 1) != 0 -> A == 0,
153 ((1 << A) & 1) == 0 -> A != 0): Generalize for 1s replaced by
154 possibly different power of two constants and to right shift too.
155
156 2021-01-15 Jakub Jelinek <jakub@redhat.com>
157
158 PR tree-optimization/96681
159 * match.pd ((x < 0) ^ (y < 0) to (x ^ y) < 0): New simplification.
160 ((x >= 0) ^ (y >= 0) to (x ^ y) < 0): Likewise.
161 ((x < 0) ^ (y >= 0) to (x ^ y) >= 0): Likewise.
162 ((x >= 0) ^ (y < 0) to (x ^ y) >= 0): Likewise.
163
164 2021-01-15 Alexandre Oliva <oliva@adacore.com>
165
166 * opts.c (gen_command_line_string): Exclude -dumpbase-ext.
167
168 2021-01-15 Tamar Christina <tamar.christina@arm.com>
169
170 * config/aarch64/aarch64-simd.md (cml<fcmac1><conj_op><mode>4,
171 cmul<conj_op><mode>3): New.
172 * config/aarch64/iterators.md (UNSPEC_FCMUL,
173 UNSPEC_FCMUL180, UNSPEC_FCMLA_CONJ, UNSPEC_FCMLA180_CONJ,
174 UNSPEC_CMLA_CONJ, UNSPEC_CMLA180_CONJ, UNSPEC_CMUL, UNSPEC_CMUL180,
175 FCMLA_OP, FCMUL_OP, conj_op, rotsplit1, rotsplit2, fcmac1, sve_rot1,
176 sve_rot2, SVE2_INT_CMLA_OP, SVE2_INT_CMUL_OP, SVE2_INT_CADD_OP): New.
177 (rot): Add UNSPEC_FCMUL, UNSPEC_FCMUL180.
178 (rot_op): Renamed to conj_op.
179 * config/aarch64/aarch64-sve.md (cml<fcmac1><conj_op><mode>4,
180 cmul<conj_op><mode>3): New.
181 * config/aarch64/aarch64-sve2.md (cml<fcmac1><conj_op><mode>4,
182 cmul<conj_op><mode>3): New.
183
184 2021-01-15 David Malcolm <dmalcolm@redhat.com>
185
186 PR bootstrap/98696
187 * diagnostic.c
188 (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
189 Escape the tempfile name when constructing the expected output.
190
191 2021-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
192
193 * config/aarch64/aarch64-simd.md (*aarch64_<su>mlsl_hi<mode>):
194 Rename to...
195 (aarch64_<su>mlsl_hi<mode>): ... This.
196 (aarch64_<su>mlsl_hi<mode>): Define.
197 (*aarch64_<su>mlsl<mode): Rename to...
198 (aarch64_<su>mlsl<mode): ... This.
199 * config/aarch64/aarch64-simd-builtins.def (smlsl, umlsl,
200 smlsl_hi, umlsl_hi): Define builtins.
201 * config/aarch64/arm_neon.h (vmlsl_high_s8, vmlsl_high_s16,
202 vmlsl_high_s32, vmlsl_high_u8, vmlsl_high_u16, vmlsl_high_u32,
203 vmlsl_s8, vmlsl_s16, vmlsl_s32, vmlsl_u8,
204 vmlsl_u16, vmlsl_u32): Reimplement with builtins.
205
206 2021-01-15 Uroš Bizjak <ubizjak@gmail.com>
207
208 * config/i386/i386-c.c (ix86_target_macros):
209 Use cpp_define_formatted for __SIZEOF_FLOAT80__ definition.
210
211 2021-01-15 Richard Sandiford <richard.sandiford@arm.com>
212
213 PR target/88836
214 * config.gcc (aarch64*-*-*): Add aarch64-cc-fusion.o to extra_objs.
215 * Makefile.in (RTL_SSA_H): New variable.
216 * config/aarch64/t-aarch64 (aarch64-cc-fusion.o): New rule.
217 * config/aarch64/aarch64-protos.h (make_pass_cc_fusion): Declare.
218 * config/aarch64/aarch64-passes.def: Add pass_cc_fusion after
219 pass_combine.
220 * config/aarch64/aarch64-cc-fusion.cc: New file.
221
222 2021-01-15 Richard Sandiford <richard.sandiford@arm.com>
223
224 * recog.h (insn_change_watermark::~insn_change_watermark): Avoid
225 calling cancel_changes for changes that no longer exist.
226
227 2021-01-15 Richard Sandiford <richard.sandiford@arm.com>
228
229 * rtl-ssa/functions.h (function_info::ref_defs): Rename to...
230 (function_info::reg_defs): ...this.
231 * rtl-ssa/member-fns.inl (function_info::ref_defs): Rename to...
232 (function_info::reg_defs): ...this.
233
234 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
235
236 PR target/71233
237 * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
238
239 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
240
241 Revert:
242 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
243
244 PR target/71233
245 * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
246
247 2021-01-15 Richard Biener <rguenther@suse.de>
248
249 PR tree-optimization/96376
250 * tree-vect-stmts.c (get_load_store_type): Disregard alignment
251 for VMAT_INVARIANT.
252
253 2021-01-15 Martin Liska <mliska@suse.cz>
254
255 * doc/install.texi: Document that some tests need pytest module.
256 * doc/sourcebuild.texi: Likewise.
257
258 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
259
260 PR target/71233
261 * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
262
263 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
264
265 * config/arm/mve.md (mve_vshrq_n_s<mode>_imm): New entry.
266 (mve_vshrq_n_u<mode>_imm): Likewise.
267 * config/arm/neon.md (vashr<mode>3, vlshr<mode>3): Move to ...
268 * config/arm/vec-common.md: ... here.
269
270 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
271
272 * config/arm/mve.md (mve_vshlq_<supf><mode>): Move to
273 vec-commond.md.
274 * config/arm/neon.md (vashl<mode>3): Delete.
275 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): New.
276 (vasl<mode>3): New expander.
277
278 2021-01-15 Richard Biener <rguenther@suse.de>
279
280 PR tree-optimization/98685
281 * tree-vect-slp.c (vect_schedule_slp_node): Refactor handling
282 of vector extern defs.
283
284 2021-01-14 David Malcolm <dmalcolm@redhat.com>
285
286 PR jit/98586
287 * diagnostic.c (diagnostic_kind_text): Break out this array
288 from...
289 (diagnostic_build_prefix): ...here.
290 (fancy_abort): Detect when diagnostic_initialize has not yet been
291 called and fall back to a minimal implementation of printing the
292 ICE, rather than segfaulting in internal_error.
293
294 2021-01-14 David Malcolm <dmalcolm@redhat.com>
295
296 * diagnostic.c (diagnostic_initialize): Eliminate
297 parseable_fixits_p in favor of initializing extra_output_kind from
298 GCC_EXTRA_DIAGNOSTIC_OUTPUT.
299 (convert_column_unit): New function, split out from...
300 (diagnostic_converted_column): ...this.
301 (print_parseable_fixits): Add "column_unit" and "tabstop" params.
302 Use them to call convert_column_unit on the column values.
303 (diagnostic_report_diagnostic): Eliminate conditional on
304 parseable_fixits_p in favor of a switch statement on
305 extra_output_kind, passing the appropriate values to the new
306 params of print_parseable_fixits.
307 (selftest::test_print_parseable_fixits_none): Update for new
308 params of print_parseable_fixits.
309 (selftest::test_print_parseable_fixits_insert): Likewise.
310 (selftest::test_print_parseable_fixits_remove): Likewise.
311 (selftest::test_print_parseable_fixits_replace): Likewise.
312 (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
313 New.
314 (selftest::diagnostic_c_tests): Call it.
315 * diagnostic.h (enum diagnostics_extra_output_kind): New.
316 (diagnostic_context::parseable_fixits_p): Delete field in favor
317 of...
318 (diagnostic_context::extra_output_kind): ...this new field.
319 * doc/invoke.texi (Environment Variables): Add
320 GCC_EXTRA_DIAGNOSTIC_OUTPUT.
321 * opts.c (common_handle_option): Update handling of
322 OPT_fdiagnostics_parseable_fixits for change to diagnostic_context
323 fields.
324
325 2021-01-14 Tamar Christina <tamar.christina@arm.com>
326
327 * tree-vect-slp-patterns.c (class complex_operations_pattern,
328 complex_operations_pattern::matches,
329 complex_operations_pattern::recognize,
330 complex_operations_pattern::build): New.
331 (slp_patterns): Use it.
332
333 2021-01-14 Tamar Christina <tamar.christina@arm.com>
334
335 * internal-fn.def (COMPLEX_FMS, COMPLEX_FMS_CONJ): New.
336 * optabs.def (cmls_optab, cmls_conj_optab): New.
337 * doc/md.texi: Document them.
338 * tree-vect-slp-patterns.c (class complex_fms_pattern,
339 complex_fms_pattern::matches, complex_fms_pattern::recognize,
340 complex_fms_pattern::build): New.
341
342 2021-01-14 Tamar Christina <tamar.christina@arm.com>
343
344 * internal-fn.def (COMPLEX_FMA, COMPLEX_FMA_CONJ): New.
345 * optabs.def (cmla_optab, cmla_conj_optab): New.
346 * doc/md.texi: Document them.
347 * tree-vect-slp-patterns.c (vect_match_call_p,
348 class complex_fma_pattern, vect_slp_reset_pattern,
349 complex_fma_pattern::matches, complex_fma_pattern::recognize,
350 complex_fma_pattern::build): New.
351
352 2021-01-14 Tamar Christina <tamar.christina@arm.com>
353
354 * internal-fn.def (COMPLEX_MUL, COMPLEX_MUL_CONJ): New.
355 * optabs.def (cmul_optab, cmul_conj_optab): New.
356 * doc/md.texi: Document them.
357 * tree-vect-slp-patterns.c (vect_match_call_complex_mla,
358 vect_normalize_conj_loc, is_eq_or_top, vect_validate_multiplication,
359 vect_build_combine_node, class complex_mul_pattern,
360 complex_mul_pattern::matches, complex_mul_pattern::recognize,
361 complex_mul_pattern::build): New.
362
363 2021-01-14 Tamar Christina <tamar.christina@arm.com>
364
365 * tree-vect-slp.c (optimize_load_redistribution_1): New.
366 (optimize_load_redistribution, vect_is_slp_load_node): New.
367 (vect_match_slp_patterns): Use it.
368
369 2021-01-14 Tamar Christina <tamar.christina@arm.com>
370
371 * tree-vect-slp-patterns.c (complex_add_pattern::build):
372 Elide nodes.
373
374 2021-01-14 Thomas Schwinge <thomas@codesourcery.com>
375
376 * config/gcn/mkoffload.c (main): Create an offload image only in
377 64-bit configurations.
378
379 2021-01-14 H.J. Lu <hjl.tools@gmail.com>
380
381 PR target/98667
382 * config/i386/i386-options.c (ix86_option_override_internal):
383 Issue an error for -fcf-protection with CF_BRANCH when compiling
384 for 32-bit non-TARGET_CMOV targets.
385
386 2021-01-14 Uroš Bizjak <ubizjak@gmail.com>
387
388 PR target/98671
389 * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
390 Remove declaration and initialization of shadow variable "ret".
391 (ix86_option_override_internal): Remove delcaration of
392 shadow variable "i". Redeclare shadowed variable to unsigned.
393 * common/config/i386/i386-common.c (pta_size): Redeclare to unsigned.
394 * config/i386/i386-builtins.c (get_builtin_code_for_version):
395 Update for redeclaration.
396 * config/i386/i386.h (pta_size): Ditto.
397
398 2021-01-14 Richard Biener <rguenther@suse.de>
399
400 PR tree-optimization/98674
401 * tree-data-ref.c (base_supports_access_fn_components_p): New.
402 (initialize_data_dependence_relation): For two bases without
403 possible access fns resort to type size equality when determining
404 shape compatibility.
405
406 2021-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
407
408 PR target/66791
409 * config/arm/arm_neon.h: Replace calls to __builtin_vcge* by
410 <=, >= operators in vcle and vcge intrinsics respectively.
411 * config/arm/arm_neon_builtins.def: Remove entry for
412 vcge and vcgeu.
413
414 2021-01-14 Uroš Bizjak <ubizjak@gmail.com>
415
416 PR target/98671
417 * config/i386/i386-options.c (ix86_function_specific_save):
418 Remove redundant assignment to opts->x_ix86_branch_cost.
419 * config/i386/i386.c (ix86_prefetch_sse):
420 Rename from x86_prefetch_sse. Update all uses.
421 * config/i386/i386.h: Update for rename.
422 * config/i386/i386-options.h: Ditto.
423
424 2021-01-14 Jakub Jelinek <jakub@redhat.com>
425
426 PR target/98670
427 * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3,
428 *sse4_1_zero_extendv4hiv4si2_3, *sse4_1_zero_extendv2siv2di2_3):
429 Use Bm instead of m for non-avx. Add isa attribute.
430
431 2021-01-14 Jakub Jelinek <jakub@redhat.com>
432
433 PR tree-optimization/96688
434 * match.pd (~(X >> Y) -> ~X >> Y): New simplification if
435 ~X can be simplified.
436
437 2021-01-14 Richard Sandiford <richard.sandiford@arm.com>
438
439 * tree-vect-stmts.c (vect_model_load_cost): Account for unused
440 IFN_LOAD_LANES results.
441
442 2021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
443
444 * config/aarch64/aarch64-simd.md (aarch64_<su>xtl<mode>):
445 Define.
446 (aarch64_xtn<mode>): Likewise.
447 * config/aarch64/aarch64-simd-builtins.def (sxtl, uxtl, xtn):
448 Define
449 builtins.
450 * config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
451 builtin.
452 (vmovl_s16): Likewise.
453 (vmovl_s32): Likewise.
454 (vmovl_u8): Likewise.
455 (vmovl_u16): Likewise.
456 (vmovl_u32): Likewise.
457 (vmovn_s16): Likewise.
458 (vmovn_s32): Likewise.
459 (vmovn_s64): Likewise.
460 (vmovn_u16): Likewise.
461 (vmovn_u32): Likewise.
462 (vmovn_u64): Likewise.
463
464 2021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
465
466 * config/aarch64/aarch64-simd.md (aarch64_<su>qxtn2<mode>_le):
467 Define.
468 (aarch64_<su>qxtn2<mode>_be): Likewise.
469 (aarch64_<su>qxtn2<mode>): Likewise.
470 * config/aarch64/aarch64-simd-builtins.def (sqxtn2, uqxtn2):
471 Define builtins.
472 * config/aarch64/iterators.md (SAT_TRUNC): Define code_iterator.
473 (su): Handle ss_truncate and us_truncate.
474 * config/aarch64/arm_neon.h (vqmovn_high_s16): Reimplement using
475 builtin.
476 (vqmovn_high_s32): Likewise.
477 (vqmovn_high_s64): Likewise.
478 (vqmovn_high_u16): Likewise.
479 (vqmovn_high_u32): Likewise.
480 (vqmovn_high_u64): Likewise.
481
482 2021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
483
484 * config/aarch64/aarch64-simd.md (aarch64_xtn2<mode>_le):
485 Define.
486 (aarch64_xtn2<mode>_be): Likewise.
487 (aarch64_xtn2<mode>): Likewise.
488 * config/aarch64/aarch64-simd-builtins.def (xtn2): Define
489 builtins.
490 * config/aarch64/arm_neon.h (vmovn_high_s16): Reimplement using
491 builtins.
492 (vmovn_high_s32): Likewise.
493 (vmovn_high_s64): Likewise.
494 (vmovn_high_u16): Likewise.
495 (vmovn_high_u32): Likewise.
496 (vmovn_high_u64): Likewise.
497
498 2021-01-13 Stafford Horne <shorne@gmail.com>
499
500 * config/or1k/or1k.h (ASM_PREFERRED_EH_DATA_FORMAT): New macro.
501
502 2021-01-13 Stafford Horne <shorne@gmail.com>
503
504 * config/or1k/linux.h (TARGET_ASM_FILE_END): Define macro.
505
506 2021-01-13 Stafford Horne <shorne@gmail.com>
507
508 * config/or1k/or1k.h (TARGET_CPU_CPP_BUILTINS): Add builtin
509 define for __or1k_hard_float__.
510
511 2021-01-13 Stafford Horne <shorne@gmail.com>
512
513 * config/or1k/or1k.h (NO_PROFILE_COUNTERS): Define as 1.
514 (PROFILE_HOOK): Define to call _mcount.
515 (FUNCTION_PROFILER): Change from abort to no-op.
516
517 2021-01-13 Jakub Jelinek <jakub@redhat.com>
518
519 PR tree-optimization/96691
520 * match.pd ((~X | C) ^ D -> (X | C) ^ (~D ^ C),
521 (~X & C) ^ D -> (X & C) ^ (D ^ C)): New simplifications if
522 (~D ^ C) or (D ^ C) can be simplified.
523
524 2021-01-13 Richard Biener <rguenther@suse.de>
525
526 PR tree-optimization/92645
527 * match.pd (BIT_FIELD_REF to conversion): Delay canonicalization
528 until after vector lowering.
529
530 2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
531
532 * config/aarch64/aarch64-sve.md (fnma<mode>4): Extend from SVE_FULL_I
533 to SVE_I.
534 (@aarch64_pred_fnma<mode>, cond_fnma<mode>, *cond_fnma<mode>_2)
535 (*cond_fnma<mode>_4, *cond_fnma<mode>_any): Likewise.
536
537 2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
538
539 * config/aarch64/aarch64-sve.md (fma<mode>4): Extend from SVE_FULL_I
540 to SVE_I.
541 (@aarch64_pred_fma<mode>, cond_fma<mode>, *cond_fma<mode>_2)
542 (*cond_fma<mode>_4, *cond_fma<mode>_any): Likewise.
543
544 2021-01-13 Richard Biener <rguenther@suse.de>
545
546 PR tree-optimization/92645
547 * tree-vect-slp.c (vect_build_slp_tree_1): Relax supported
548 BIT_FIELD_REF argument.
549 (vect_build_slp_tree_2): Record the desired vector type
550 on the external vector def.
551 (vectorizable_slp_permutation): Handle required punning
552 of existing vector defs.
553
554 2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
555
556 * rtl-ssa/accesses.h (def_lookup): Fix order of comparison results.
557
558 2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
559
560 * config/sh/sh.md (movsf_ie): Remove operands[2] test.
561
562 2021-01-13 Samuel Thibault <samuel.thibault@ens-lyon.org>
563
564 * config.gcc [$target == *-*-gnu*]: Enable
565 'default_gnu_indirect_function'.
566
567 2021-01-13 Jakub Jelinek <jakub@redhat.com>
568
569 PR target/95905
570 * optabs.c (expand_vec_perm_const): Don't force v0 and v1 into
571 registers before calling targetm.vectorize.vec_perm_const, only after
572 that.
573 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const): Handle
574 two argument permutation when one operand is zero vector and only
575 after that force operands into registers.
576 * config/i386/sse.md (*avx2_zero_extendv16qiv16hi2_1): New
577 define_insn_and_split pattern.
578 (*avx512bw_zero_extendv32qiv32hi2_1): Likewise.
579 (*avx512f_zero_extendv16hiv16si2_1): Likewise.
580 (*avx2_zero_extendv8hiv8si2_1): Likewise.
581 (*avx512f_zero_extendv8siv8di2_1): Likewise.
582 (*avx2_zero_extendv4siv4di2_1): Likewise.
583 * config/mips/mips.c (mips_vectorize_vec_perm_const): Force operands
584 into registers.
585 * config/arm/arm.c (arm_vectorize_vec_perm_const): Likewise.
586 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Likewise.
587 * config/ia64/ia64.c (ia64_vectorize_vec_perm_const): Likewise.
588 * config/aarch64/aarch64.c (aarch64_vectorize_vec_perm_const): Likewise.
589 * config/rs6000/rs6000.c (rs6000_vectorize_vec_perm_const): Likewise.
590 * config/gcn/gcn.c (gcn_vectorize_vec_perm_const): Likewise. Use std::swap.
591
592 2021-01-13 Martin Liska <mliska@suse.cz>
593
594 PR tree-optimization/98455
595 * gimple-if-to-switch.cc (condition_info::record_phi_mapping):
596 Record also virtual PHIs.
597 (pass_if_to_switch::execute): Return TODO_cleanup_cfg only
598 conditionally.
599
600 2021-01-13 Jonathan Wakely <jwakely@redhat.com>
601
602 * doc/invoke.texi (C++ Modules): Fix typos.
603
604 2021-01-13 Richard Biener <rguenther@suse.de>
605
606 PR tree-optimization/98640
607 * tree-ssa-sccvn.c (visit_nary_op): Do not try to
608 handle plus or minus from a truncated operand to be
609 sign-extended.
610
611 2021-01-13 Jakub Jelinek <jakub@redhat.com>
612
613 PR target/96938
614 * config/i386/i386.md (*btr<mode>_1, *btr<mode>_2): New
615 define_insn_and_split patterns.
616 (splitter after *btr<mode>_2): New splitter.
617
618 2021-01-13 Martin Liska <mliska@suse.cz>
619
620 PR ipa/98652
621 * cgraphunit.c (analyze_functions): Remove dead code.
622
623 2021-01-13 Qian Jianhua <qianjh@cn.fujitsu.com>
624
625 * config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
626 * config/aarch64/aarch64.c (a64fx_addrcost_table): New.
627 (a64fx_regmove_cost, a64fx_vector_cost): New.
628 (a64fx_tunings): Use the new added cost tables.
629
630 2021-01-13 Jakub Jelinek <jakub@redhat.com>
631
632 PR target/95905
633 * config/i386/predicates.md (pmovzx_parallel): New predicate.
634 * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): New
635 define_insn_and_split pattern.
636 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
637 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
638
639 2021-01-13 Julian Brown <julian@codesourcery.com>
640
641 * config/gcn/gcn.c (gcn_conditional_register_usage): Remove dead code
642 to fix v0 register.
643
644 2021-01-13 Julian Brown <julian@codesourcery.com>
645
646 * config/gcn/gcn.c (gcn_md_reorg): Fix case where EXEC reg is live
647 on entry to a BB.
648
649 2021-01-13 Julian Brown <julian@codesourcery.com>
650
651 * config/gcn/gcn-valu.md (recip<mode>2<exec>, recip<mode>2): Use unspec
652 for reciprocal-approximation instructions.
653 (div<mode>3): Use fused multiply-accumulate operations for reciprocal
654 refinement and division result.
655 * config/gcn/gcn.md (UNSPEC_RCP): New unspec constant.
656
657 2021-01-13 Julian Brown <julian@codesourcery.com>
658
659 * config/gcn/gcn-valu.md (subdf): Rename to...
660 (subdf3): This.
661
662 2021-01-12 Martin Liska <mliska@suse.cz>
663
664 * gcov.c (source_info::debug): Fix printf format for 32-bit hosts.
665
666 2021-01-12 Andrea Corallo <andrea.corallo@arm.com>
667
668 * function-abi.h: Fix typo.
669
670 2021-01-12 Christophe Lyon <christophe.lyon@linaro.org>
671
672 PR target/97875
673 PR target/97875
674 * config/arm/arm.h (ARM_HAVE_NEON_V8QI_LDST): New macro.
675 (ARM_HAVE_NEON_V16QI_LDST, ARM_HAVE_NEON_V4HI_LDST): Likewise.
676 (ARM_HAVE_NEON_V8HI_LDST, ARM_HAVE_NEON_V2SI_LDST): Likewise.
677 (ARM_HAVE_NEON_V4SI_LDST, ARM_HAVE_NEON_V4HF_LDST): Likewise.
678 (ARM_HAVE_NEON_V8HF_LDST, ARM_HAVE_NEON_V4BF_LDST): Likewise.
679 (ARM_HAVE_NEON_V8BF_LDST, ARM_HAVE_NEON_V2SF_LDST): Likewise.
680 (ARM_HAVE_NEON_V4SF_LDST, ARM_HAVE_NEON_DI_LDST): Likewise.
681 (ARM_HAVE_NEON_V2DI_LDST): Likewise.
682 (ARM_HAVE_V8QI_LDST, ARM_HAVE_V16QI_LDST): Likewise.
683 (ARM_HAVE_V4HI_LDST, ARM_HAVE_V8HI_LDST): Likewise.
684 (ARM_HAVE_V2SI_LDST, ARM_HAVE_V4SI_LDST, ARM_HAVE_V4HF_LDST): Likewise.
685 (ARM_HAVE_V8HF_LDST, ARM_HAVE_V4BF_LDST, ARM_HAVE_V8BF_LDST): Likewise.
686 (ARM_HAVE_V2SF_LDST, ARM_HAVE_V4SF_LDST, ARM_HAVE_DI_LDST): Likewise.
687 (ARM_HAVE_V2DI_LDST): Likewise.
688 * config/arm/mve.md (*movmisalign<mode>_mve_store): New pattern.
689 (*movmisalign<mode>_mve_load): New pattern.
690 * config/arm/neon.md (movmisalign<mode>): Move to ...
691 * config/arm/vec-common.md: ... here.
692
693 2021-01-12 Vladimir N. Makarov <vmakarov@redhat.com>
694
695 PR target/97969
696 * lra-eliminations.c (eliminate_regs_in_insn): Add transformation
697 of pattern 'plus (plus (hard reg, const), pseudo)'.
698
699 2021-01-12 Richard Biener <rguenther@suse.de>
700
701 PR tree-optimization/98550
702 * tree-vect-slp.c (vect_record_max_nunits): Check whether
703 the group size is a multiple of the vector element count.
704 (vect_build_slp_tree_1): When we need to fail because
705 the vector type choosen causes unrolling do so lazily
706 without affecting matches only at the end to guide group splitting.
707
708 2021-01-12 Martin Liska <mliska@suse.cz>
709
710 PR c++/97284
711 * optc-save-gen.awk: Compare also n_target_save vars with
712 strcmp.
713
714 2021-01-12 Martin Liska <mliska@suse.cz>
715
716 * gcov.c (source_info::debug): New.
717 (print_usage): Add --debug (-D) option.
718 (process_args): Likewise.
719 (generate_results): Call src->debug after
720 accumulate_line_counts.
721 (read_graph_file): Properly assign id for EXIT_BLOCK.
722 * profile.c (branch_prob): Dump function body before it is
723 instrumented.
724
725 2021-01-12 Jakub Jelinek <jakub@redhat.com>
726
727 PR tree-optimization/98629
728 * tree-ssa-math-opts.c (arith_overflow_check_p): Don't update use_stmt
729 unless returning non-zero.
730
731 2021-01-12 Jakub Jelinek <jakub@redhat.com>
732
733 PR tree-optimization/95731
734 * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Also optimize
735 x < 0 && y < 0 && z < 0 into (x | y | z) < 0 for signed x, y, z.
736 (optimize_range_tests): Call optimize_range_tests_cmp_bitwise
737 only after optimize_range_tests_var_bound.
738
739 2021-01-12 Jakub Jelinek <jakub@redhat.com>
740
741 * configure.ac: Ensure c/Make-lang.in comes first in @all_lang_makefrags@.
742 * configure: Regenerated.
743
744 2021-01-12 liuhongt <hongtao.liu@intel.com>
745
746 PR target/98612
747 * config/i386/i386-builtins.h (BUILTIN_DESC_SWAP_OPERANDS):
748 Deleted.
749 * config/i386/i386-expand.c (ix86_expand_sse_comi): Delete
750 dead code.
751
752 2021-01-12 Alexandre Oliva <oliva@adacore.com>
753
754 * ssa-iterators.h (end_imm_use_stmt_traverse): Forward
755 declare.
756 (auto_end_imm_use_stmt_traverse): New struct.
757 (FOR_EACH_IMM_USE_STMT): Use it.
758 (BREAK_FROM_IMM_USE_STMT, RETURN_FROM_IMM_USE_STMT): Remove,
759 along with uses...
760 * gimple-ssa-strength-reduction.c: ... here, ...
761 * graphite-scop-detection.c: ... here, ...
762 * ipa-modref.c, ipa-pure-const.c, ipa-sra.c: ... here, ...
763 * tree-predcom.c, tree-ssa-ccp.c: ... here, ...
764 * tree-ssa-dce.c, tree-ssa-dse.c: ... here, ...
765 * tree-ssa-loop-ivopts.c, tree-ssa-math-opts.c: ... here, ...
766 * tree-ssa-phiprop.c, tree-ssa.c: ... here, ...
767 * tree-vect-slp.c: ... and here, ...
768 * doc/tree-ssa.texi: ... and the example here.
769
770 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
771
772 * config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3): Extend from
773 SVE_FULL_I to SVE_I. Generate an UNSPEC_PRED_X.
774 (*sdiv_pow2<mode>3): New pattern.
775 (@cond_<sve_int_op><mode>): Extend from SVE_FULL_I to SVE_I.
776 Wrap the ASRD in an UNSPEC_PRED_X.
777 (*cond_<sve_int_op><mode>_2): Likewise. Replace the UNSPEC_PRED_X
778 predicate with a constant PTRUE, if it isn't already.
779 (*cond_<sve_int_op><mode>_z): Replace with...
780 (*cond_<sve_int_op><mode>_any): ...this new pattern.
781
782 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
783
784 * config/aarch64/aarch64-sve.md (*cond_bic<mode>_2): Extend from
785 SVE_FULL_I to SVE_I.
786 (*cond_bic<mode>_any): Likewise.
787
788 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
789
790 * config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart)
791 (@aarch64_pred_<MUL_HIGHPART:optab><mode>): Extend from SVE_FULL_I
792 to SVE_I.
793
794 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
795
796 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Extend from
797 SVE_FULL_I to SVE_I.
798 (*aarch64_cond_<su>abd<mode>_2): Likewise.
799 (*aarch64_cond_<su>abd<mode>_any): Likewise.
800 (@aarch64_pred_<su>abd<mode>): Likewise. Use UNSPEC_PRED_X
801 for the max and min but not for the minus.
802 (*aarch64_cond_<su>abd<mode>_3): New pattern.
803
804 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
805
806 * config/aarch64/iterators.md (SVE_24I): New iterator.
807 * config/aarch64/aarch64-sve.md (*aarch64_adr<mode>_shift): Extend from
808 SVE_FULL_SDI to SVE_24I. Use containers rather than elements.
809
810 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
811
812 * config/aarch64/aarch64-sve.md (@cond_<SVE_INT_BINARY:optab><mode>)
813 (*cond_<SVE_INT_BINARY:optab><mode>_2): Extend from SVE_FULL_I
814 to SVE_I.
815 (*cond_<SVE_INT_BINARY:optab><mode>_3): Likewise.
816 (*cond_<SVE_INT_BINARY:optab><mode>_any): Likewise.
817 (*cond_<SVE_INT_BINARY:optab><mode>_2_const): Likewise.
818 (*cond_<SVE_INT_BINARY:optab><mode>_any_const): Likewise.
819
820 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
821
822 * config/aarch64/aarch64-sve.md (<SVE_INT_BINARY_IMM:optab><mode>3)
823 (@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>)
824 (*post_ra_<SVE_INT_BINARY_IMM:optab><mode>3): Extend from SVE_FULL_I
825 to SVE_I.
826
827 2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
828
829 * config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3)
830 (v<ASHIFT:optab><mode>3, @aarch64_pred_<optab><mode>)
831 (*post_ra_v<ASHIFT:optab><mode>3): Extend from SVE_FULL_I to SVE_I.
832
833 2021-01-11 Martin Liska <mliska@suse.cz>
834
835 PR jit/98615
836 * symtab-clones.h (clone_info::release): Release
837 symtab::m_clones with ggc_delete as it's a GGC memory.
838
839 2021-01-11 Matthias Klose <doko@ubuntu.com>
840
841 * Makefile.in (LINK_PROGRESS): Show the link target.
842
843 2021-01-11 Richard Biener <rguenther@suse.de>
844
845 PR tree-optimization/91403
846 * tree-vect-data-refs.c (vect_analyze_group_access_1): Cap
847 single-element interleaving group size at 4096 elements.
848
849 2021-01-11 Richard Biener <rguenther@suse.de>
850
851 PR tree-optimization/98526
852 * tree-vect-loop.c (vect_model_reduction_cost): Remove costing
853 of the actual reduction op for the regular case.
854 (vectorizable_reduction): Cost the stmts
855 vect_transform_reduction produces here.
856
857 2021-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
858
859 * tree-ssa-forwprop.c (simplify_vector_constructor): For
860 big-endian, use UNPACK[_FLOAT]_HI.
861
862 2021-01-11 Tamar Christina <tamar.christina@arm.com>
863
864 * tree-vect-slp-patterns.c (class complex_pattern,
865 class complex_add_pattern): Add parameters to matches.
866 (complex_add_pattern::build): Free memory.
867 (complex_add_pattern::matches): Move validation end of match.
868 (complex_add_pattern::recognize): Likewise.
869
870 2021-01-11 Tamar Christina <tamar.christina@arm.com>
871
872 * tree-vect-slp-patterns.c (linear_loads_p): Fix externals.
873
874 2021-01-11 Tamar Christina <tamar.christina@arm.com>
875
876 * tree-vect-slp-patterns.c (is_linear_load_p): Fix ambiguity.
877
878 2021-01-11 Jakub Jelinek <jakub@redhat.com>
879
880 PR tree-optimization/95867
881 * tree-ssa-math-opts.h: New header.
882 * tree-ssa-math-opts.c: Include tree-ssa-math-opts.h.
883 (powi_as_mults): No longer static. Use build_one_cst instead of
884 build_real. Formatting fix.
885 * tree-ssa-reassoc.c: Include tree-ssa-math-opts.h.
886 (attempt_builtin_powi): Handle multiplication reassociation without
887 powi_fndecl using powi_as_mults.
888 (reassociate_bb): For integral types don't require
889 -funsafe-math-optimizations to call attempt_builtin_powi.
890
891 2021-01-11 Jakub Jelinek <jakub@redhat.com>
892
893 PR tree-optimization/95852
894 * tree-ssa-math-opts.c (maybe_optimize_guarding_check): Change
895 mul_stmts parameter type to vec<gimple *> &. Before cond_stmt
896 allow in the bb any of the stmts in that vector, div_stmt and
897 up to 3 cast stmts.
898 (arith_cast_equal_p): New function.
899 (arith_overflow_check_p): Add cast_stmt argument, handle signed
900 multiply overflow checks.
901 (match_arith_overflow): Adjust caller. Handle signed multiply
902 overflow checks.
903
904 2021-01-11 Jakub Jelinek <jakub@redhat.com>
905
906 PR tree-optimization/95852
907 * tree-ssa-math-opts.c (maybe_optimize_guarding_check): New function.
908 (uaddsub_overflow_check_p): Renamed to ...
909 (arith_overflow_check_p): ... this. Handle also multiplication
910 with overflow check.
911 (match_uaddsub_overflow): Renamed to ...
912 (match_arith_overflow): ... this. Add cfg_changed argument. Handle
913 also multiplication with overflow check. Adjust function comment.
914 (math_opts_dom_walker::after_dom_children): Adjust callers. Call
915 match_arith_overflow also for MULT_EXPR.
916
917 2021-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
918
919 * config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
920 __builtin_convertvector.
921 (vmovl_s16): Likewise.
922 (vmovl_s32): Likewise.
923 (vmovl_u8): Likewise.
924 (vmovl_u16): Likewise.
925 (vmovl_u32): Likewise.
926 (vmovn_s16): Likewise.
927 (vmovn_s32): Likewise.
928 (vmovn_s64): Likewise.
929 (vmovn_u16): Likewise.
930 (vmovn_u32): Likewise.
931 (vmovn_u64): Likewise.
932
933 2021-01-11 Martin Liska <mliska@suse.cz>
934
935 * gimple-if-to-switch.cc (struct condition_info): Use auto_var.
936 (if_chain::is_beneficial): Delete clusters
937 (find_conditions): Make second argument of conditions_in_bbs a
938 pointer so that we control over it's lifetime.
939 (pass_if_to_switch::execute): Delete them.
940
941 2021-01-11 Kewen Lin <linkw@linux.ibm.com>
942
943 * ira.c (move_unallocated_pseudos): Check other_reg and skip if
944 it isn't set.
945
946 2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
947
948 * config/vax/vax.md (cc): Remove mode attribute.
949 (subst_<cc>, subst_f<cc>): Rename to...
950 (subst_<mode>, subst_f<VAXccnz:mode>): ... these respectively.
951 (*cbranch<VAXint:mode>4_<VAXcc:mode>): Update for `cc' removal.
952 (*cbranch<VAXfp:mode>4_<VAXccnz:mode>): Likewise.
953 (*branch_<mode>, *branch_<mode>_reversed): Likewise.
954
955 2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
956
957 * config/vax/vax.md (subst_f<cc>): Add mode to operands and
958 `const_double_zero'.
959
960 2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
961
962 * config/pdp11/pdp11.md (PDPfp): New mode iterator.
963 (fcc_cc, fcc_ccnz): Use it. Add mode to `const_double_zero' and
964 operands.
965
966 2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
967
968 * genemit.c (gen_exp) <CONST_DOUBLE>: Handle `const_double_zero'
969 rtx.
970 * read-rtl.c (rtx_reader::read_rtx_code): Handle machine mode
971 with `const_double_zero'.
972 * doc/rtl.texi (Constant Expression Types): Document it.
973
974 2021-01-09 Jakub Jelinek <jakub@redhat.com>
975
976 PR c++/98556
977 * tree-cfg.c (verify_gimple_assign_binary): Allow lhs of
978 POINTER_DIFF_EXPR to be any integral type.
979
980 2021-01-09 Jakub Jelinek <jakub@redhat.com>
981
982 PR rtl-optimization/98603
983 * function.c (instantiate_virtual_regs_in_insn): For asm goto
984 with impossible constraints, drop all SETs, CLOBBERs, drop PARALLEL
985 if any, set ASM_OPERANDS mode to VOIDmode and change
986 ASM_OPERANDS_OUTPUT_CONSTRAINT and ASM_OPERANDS_OUTPUT_IDX.
987
988 2021-01-09 Alexandre Oliva <oliva@gnu.org>
989
990 PR debug/97714
991 * final.c (notice_source_line): Narrow down the condition to
992 skip a line-0 marker.
993
994 2021-01-08 Sergei Trofimovich <siarheit@google.com>
995
996 * ipa-modref.c (merge_call_side_effects): Fix
997 linebreak split by reordering two print calls.
998
999 2021-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
1000
1001 * config/s390/vector.md (*tf_to_fprx2_0): Rename from
1002 "*mov_tf_to_fprx2_0" for consistency, fix constraint.
1003 (*tf_to_fprx2_1): Rename from "*mov_tf_to_fprx2_1" for
1004 consistency, fix constraint.
1005
1006 2021-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
1007
1008 * config/s390/s390-c.c (s390_def_or_undef_macro): Accept
1009 callables instead of mask values.
1010 (struct target_flag_set_p): New predicate.
1011 (s390_cpu_cpp_builtins_internal): Define or undefine
1012 __LONG_DOUBLE_VX__ macro.
1013
1014 2021-01-08 H.J. Lu <hjl.tools@gmail.com>
1015
1016 PR target/98482
1017 * config/i386/i386.c (x86_function_profiler): Use R10 and R11
1018 to call mcount in large model with PIC for NO_PROFILE_COUNTERS
1019 targets.
1020
1021 2021-01-08 Richard Biener <rguenther@suse.de>
1022
1023 * tree-ssa-sccvn.c (pass_fre::execute): Reset the SCEV hash table.
1024
1025 2021-01-08 Richard Biener <rguenther@suse.de>
1026
1027 * tree-vect-slp.c (scalar_stmts_to_slp_tree_map_t): Fix.
1028 (vect_build_slp_tree): On cache hit release the matched
1029 scalar stmts vector.
1030 * tree-vect-stmts.c (vectorizable_store): Properly free
1031 vec_oprnds before possibly gathering them again.
1032
1033 2021-01-08 Richard Biener <rguenther@suse.de>
1034
1035 PR tree-optimization/98544
1036 * tree-vect-slp.c (vect_optimize_slp): Always materialize
1037 permutes at a permute node.
1038
1039 2021-01-08 H.J. Lu <hjl.tools@gmail.com>
1040
1041 PR target/98482
1042 * config/i386/i386.c (x86_function_profiler): Use R10 to call
1043 mcount in large model. Sorry for large model with PIC.
1044
1045 2021-01-08 Jakub Jelinek <jakub@redhat.com>
1046
1047 PR target/98585
1048 * config/i386/i386.opt (ix86_cmodel, ix86_incoming_stack_boundary_arg,
1049 ix86_pmode, ix86_preferred_stack_boundary_arg, ix86_regparm,
1050 ix86_veclibabi_type): Remove x_ prefix, use TargetVariable instead of
1051 TargetSave and initialize for variables with enum types.
1052 (mfentry, mstack-protector-guard-reg=, mstack-protector-guard-offset=,
1053 mstack-protector-guard-symbol=): Add Save.
1054 * config/i386/i386-options.c (ix86_function_specific_save,
1055 ix86_function_specific_restore): Don't save or restore x_ix86_cmodel,
1056 x_ix86_incoming_stack_boundary_arg, x_ix86_pmode,
1057 x_ix86_preferred_stack_boundary_arg, x_ix86_regparm,
1058 x_ix86_veclibabi_type.
1059
1060 2021-01-08 Richard Sandiford <richard.sandiford@arm.com>
1061
1062 * config/aarch64/aarch64-sve.md (*cnot<mode>): Extend from
1063 SVE_FULL_I to SVE_I.
1064 (*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise.
1065
1066 2021-01-08 Richard Sandiford <richard.sandiford@arm.com>
1067
1068 * config/aarch64/aarch64-sve.md (*cond_uxt<mode>_2): Extend from
1069 SVE_FULL_I to SVE_I.
1070 (*cond_uxt<mode>_any): Likewise.
1071
1072 2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1073
1074 * config/aarch64/iterators.md (Vwhalf): New iterator.
1075 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>_3):
1076 Rename to...
1077 (aarch64_<sur>adalp<mode>): ... This. Make more
1078 builtin-friendly.
1079 (<sur>sadv16qi): Adjust callsite of the above.
1080 * config/aarch64/aarch64-simd-builtins.def (sadalp, uadalp): New
1081 builtins.
1082 * config/aarch64/arm_neon.h (vpadal_s8): Reimplement using
1083 builtins.
1084 (vpadal_s16): Likewise.
1085 (vpadal_u8): Likewise.
1086 (vpadal_u16): Likewise.
1087 (vpadalq_s8): Likewise.
1088 (vpadalq_s16): Likewise.
1089 (vpadalq_s32): Likewise.
1090 (vpadalq_u8): Likewise.
1091 (vpadalq_u16): Likewise.
1092 (vpadalq_u32): Likewise.
1093
1094 2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1095
1096 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>_3):
1097 Rename to...
1098 (aarch64_<su>abd<mode>): ... This.
1099 (<sur>sadv16qi): Adjust callsite of the above.
1100 * config/aarch64/aarch64-simd-builtins.def (sabd, uabd): Define
1101 builtins.
1102 * config/aarch64/arm_neon.h (vabd_s8): Reimplement using
1103 builtin.
1104 (vabd_s16): Likewise.
1105 (vabd_s32): Likewise.
1106 (vabd_u8): Likewise.
1107 (vabd_u16): Likewise.
1108 (vabd_u32): Likewise.
1109 (vabdq_s8): Likewise.
1110 (vabdq_s16): Likewise.
1111 (vabdq_s32): Likewise.
1112 (vabdq_u8): Likewise.
1113 (vabdq_u16): Likewise.
1114 (vabdq_u32): Likewise.
1115
1116 2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1117
1118 * config/aarch64/aarch64-simd-builtins.def (saba, uaba): Define
1119 builtins.
1120 * config/aarch64/arm_neon.h (vaba_s8): Implement using builtin.
1121 (vaba_s16): Likewise.
1122 (vaba_s32): Likewise.
1123 (vaba_u8): Likewise.
1124 (vaba_u16): Likewise.
1125 (vaba_u32): Likewise.
1126 (vabaq_s8): Likewise.
1127 (vabaq_s16): Likewise.
1128 (vabaq_s32): Likewise.
1129 (vabaq_u8): Likewise.
1130 (vabaq_u16): Likewise.
1131 (vabaq_u32): Likewise.
1132
1133 2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1134
1135 * config/aarch64/aarch64-simd.md (aba<mode>_3): Rename to...
1136 (aarch64_<su>aba<mode>): ... This. Handle uaba as well.
1137 Change RTL pattern to match.
1138
1139 2021-01-08 Kito Cheng <kito.cheng@sifive.com>
1140
1141 * common/config/riscv/riscv-common.c (riscv_current_subset_list): New.
1142 * config/riscv/riscv-c.c (riscv-subset.h): New.
1143 (INCLUDE_STRING): Define.
1144 (riscv_cpu_cpp_builtins): Add new style architecture extension
1145 test macros.
1146 * config/riscv/riscv-subset.h (riscv_subset_list::begin): New.
1147 (riscv_subset_list::end): New.
1148 (riscv_current_subset_list): New.
1149
1150 2021-01-08 Kito Cheng <kito.cheng@sifive.com>
1151
1152 * common/config/riscv/riscv-common.c (RISCV_DONT_CARE_VERSION):
1153 Move to riscv-subset.h.
1154 (struct riscv_subset_t): Ditto.
1155 (class riscv_subset_list): Ditto.
1156 * config/riscv/riscv-subset.h (RISCV_DONT_CARE_VERSION): Move
1157 from riscv-common.c.
1158 (struct riscv_subset_t): Ditto.
1159 (class riscv_subset_list): Ditto.
1160 * config/riscv/t-riscv ($(common_out_file)): Add file
1161 dependency.
1162
1163 2021-01-07 Jakub Jelinek <jakub@redhat.com>
1164
1165 PR target/98567
1166 * config/i386/i386.md (*bmi_blsi_<mode>_cmp, *bmi_blsi_<mode>_ccno):
1167 New define_insn patterns.
1168
1169 2021-01-07 Richard Sandiford <richard.sandiford@arm.com>
1170
1171 * config/aarch64/aarch64-sve.md (@cond_<SVE_INT_UNARY:optab><mode>)
1172 (*cond_<SVE_INT_UNARY:optab><mode>_2): Extend from SVE_FULL_I to SVE_I.
1173 (*cond_<SVE_INT_UNARY:optab><mode>_any): Likewise.
1174
1175 2021-01-07 Richard Sandiford <richard.sandiford@arm.com>
1176
1177 PR tree-optimization/98560
1178 * internal-fn.def (IFN_VCONDU, IFN_VCONDEQ): Use type vec_cond.
1179 * internal-fn.c (vec_cond_mask_direct): Get the data mode from
1180 argument 1.
1181 (vec_cond_direct): Likewise argument 2.
1182 (vec_condu_direct, vec_condeq_direct): Delete.
1183 (expand_vect_cond_optab_fn): Rename to...
1184 (expand_vec_cond_optab_fn): ...this, replacing old macro.
1185 (expand_vec_condu_optab_fn, expand_vec_condeq_optab_fn): Delete.
1186 (expand_vect_cond_mask_optab_fn): Rename to...
1187 (expand_vec_cond_mask_optab_fn): ...this, replacing old macro.
1188 (direct_vec_cond_mask_optab_supported_p): Treat the optab as a
1189 convert optab.
1190 (direct_vec_cond_optab_supported_p): Likewise.
1191 (direct_vec_condu_optab_supported_p): Delete.
1192 (direct_vec_condeq_optab_supported_p): Delete.
1193 * gimple-isel.cc: Include internal-fn.h.
1194 (gimple_expand_vec_cond_expr): Check that IFN_VCONDEQ is supported
1195 before using it.
1196
1197 2021-01-07 Richard Sandiford <richard.sandiford@arm.com>
1198
1199 PR tree-optimization/98560
1200 * gimple-isel.cc (gimple_expand_vec_cond_expr): If we fail to use
1201 IFN_VCOND{,U,EQ}, fall back on IFN_VCOND_MASK.
1202
1203 2021-01-07 Uroš Bizjak <ubizjak@gmail.com>
1204
1205 * config/i386/i386.md (insn): Merge from plusminus_insn, shift_insn,
1206 rotate_insn and optab code attributes.
1207 Update all uses to merged code attribute.
1208 * config/i386/sse.md: Update all uses to merged code attribute.
1209 * config/i386/mmx.md: Update all uses to merged code attribute.
1210
1211 2021-01-07 Jakub Jelinek <jakub@redhat.com>
1212
1213 PR tree-optimization/98568
1214 * gimple-ssa-store-merging.c (bswap_view_convert): New function.
1215 (bswap_replace): Use it.
1216
1217 2021-01-06 Vladimir N. Makarov <vmakarov@redhat.com>
1218
1219 PR rtl-optimization/97978
1220 * lra-int.h (lra_hard_reg_split_p): New external.
1221 * lra.c (lra_hard_reg_split_p): New global.
1222 (lra): Set up lra_hard_reg_split_p after splitting a hard reg.
1223 * lra-assigns.c (lra_assign): Don't check allocation correctness
1224 after hard reg splitting.
1225
1226 2021-01-06 Martin Sebor <msebor@redhat.com>
1227
1228 PR c++/98305
1229 * builtins.c (new_delete_mismatch_p): New overload.
1230 (new_delete_mismatch_p (tree, tree)): Call it.
1231
1232 2021-01-06 Alexandre Oliva <oliva@adacore.com>
1233
1234 * Makefile.in (T_GLIMITS_H): New.
1235 (stmp-int-hdrs): Depend on it, use it.
1236 * config/t-vxworks (T_GLIMITS_H): Override it.
1237 (vxw-glimits.h): New.
1238
1239 2021-01-06 Richard Biener <rguenther@suse.de>
1240
1241 PR tree-optimization/98513
1242 * value-range.cc (intersect_ranges): Compare the upper bounds
1243 for the expected relation.
1244
1245 2021-01-06 Gerald Pfeifer <gerald@pfeifer.com>
1246
1247 Revert:
1248 2020-12-28 Gerald Pfeifer <gerald@pfeifer.com>
1249
1250 * doc/standards.texi (HSAIL): Remove section.
1251
1252 2021-01-05 Samuel Thibault <samuel.thibault@ens-lyon.org>
1253
1254 * configure: Re-generate.
1255
1256 2021-01-05 Jakub Jelinek <jakub@redhat.com>
1257
1258 * doc/invoke.texi (-std=c++20): Adjust for the publication of
1259 ISO 14882:2020 standard.
1260 * doc/standards.texi: Likewise.
1261
1262 2021-01-05 Jakub Jelinek <jakub@redhat.com>
1263
1264 PR tree-optimization/94802
1265 * expr.h (maybe_optimize_sub_cmp_0): Declare.
1266 * expr.c: Include tree-pretty-print.h and flags.h.
1267 (maybe_optimize_sub_cmp_0): New function.
1268 (do_store_flag): Use it.
1269 * cfgexpand.c (expand_gimple_cond): Likewise.
1270
1271 2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
1272
1273 * mux-utils.h (pointer_mux::m_ptr): Tweak description of contents.
1274 * rtlanal.c (simple_regno_set): Tweak description to clarify the
1275 RMW condition.
1276
1277 2021-01-05 Richard Biener <rguenther@suse.de>
1278
1279 PR tree-optimization/98516
1280 * tree-vect-slp.c (vect_optimize_slp): Permute the incoming
1281 lanes when materializing on a VEC_PERM node.
1282 (vectorizable_slp_permutation): Dump the permute properly.
1283
1284 2021-01-05 Richard Biener <rguenther@suse.de>
1285
1286 * tree-vect-slp.c (vect_slp_region): Move debug counter
1287 to cover individual subgraphs.
1288
1289 2021-01-05 Richard Biener <rguenther@suse.de>
1290
1291 PR tree-optimization/98428
1292 * tree-vect-slp.c (vect_build_slp_tree_1): Properly reject
1293 vector lane extracts for loop vectorization.
1294
1295 2021-01-05 Jakub Jelinek <jakub@redhat.com>
1296
1297 PR tree-optimization/98514
1298 * tree-ssa-reassoc.c (bb_rank): Change type from long * to
1299 int64_t *.
1300 (operand_rank): Change type from hash_map<tree, long> to
1301 hash_map<tree, int64_t>.
1302 (phi_rank): Change return type from long to int64_t.
1303 (loop_carried_phi): Change block_rank variable type from long to
1304 int64_t.
1305 (propagate_rank): Change return type, rank parameter type and
1306 op_rank variable type from long to int64_t.
1307 (find_operand_rank): Change return type from long to int64_t
1308 and change slot variable type from long * to int64_t *.
1309 (insert_operand_rank): Change rank parameter type from long to
1310 int64_t.
1311 (get_rank): Change return type and rank variable type from long to
1312 int64_t. Use PRId64 instead of ld to print the rank.
1313 (init_reassoc): Change rank variable type from long to int64_t
1314 and adjust correspondingly bb_rank and operand_rank initialization.
1315
1316 2021-01-05 Jakub Jelinek <jakub@redhat.com>
1317
1318 PR tree-optimization/96928
1319 * tree-ssa-phiopt.c (xor_replacement): New function.
1320 (tree_ssa_phiopt_worker): Call it.
1321
1322 2021-01-05 Jakub Jelinek <jakub@redhat.com>
1323
1324 PR tree-optimization/96930
1325 * match.pd ((A / (1 << B)) -> (A >> B)): If A is extended
1326 from narrower value which has the same type as 1 << B, perform
1327 the right shift on the narrower value followed by extension.
1328
1329 2021-01-05 Jakub Jelinek <jakub@redhat.com>
1330
1331 PR tree-optimization/96239
1332 * gimple-ssa-store-merging.c (maybe_optimize_vector_constructor): New
1333 function.
1334 (get_status_for_store_merging): Don't return BB_INVALID for blocks
1335 with potential bswap optimizable CONSTRUCTORs.
1336 (pass_store_merging::execute): Optimize vector CONSTRUCTORs with bswap
1337 if possible.
1338
1339 2021-01-05 Richard Biener <rguenther@suse.de>
1340
1341 PR tree-optimization/98381
1342 * tree.c (vector_element_bits): Properly compute bool vector
1343 element size.
1344 * tree-vect-loop.c (vectorizable_live_operation): Properly
1345 compute the last lane bit offset.
1346
1347 2021-01-05 Uroš Bizjak <ubizjak@gmail.com>
1348
1349 PR target/98522
1350 * config/i386/sse.md (sse_cvtps2pi): Redefine as define_insn_and_split.
1351 Clear the top 64 bytes of the input XMM register.
1352 (sse_cvttps2pi): Ditto.
1353
1354 2021-01-05 Uroš Bizjak <ubizjak@gmail.com>
1355
1356 PR target/98521
1357 * config/i386/xopintrin.h (_mm256_cmov_si256): New.
1358
1359 2021-01-05 H.J. Lu <hjl.tools@gmail.com>
1360
1361 PR target/98495
1362 * config/i386/xmmintrin.h (_mm_extract_pi16): Cast to unsigned
1363 short first.
1364
1365 2021-01-05 Claudiu Zissulescu <claziss@synopsys.com>
1366
1367 * config/arc/arc.md (maddsidi4_split): Use ACC_REG_FIRST.
1368 (umaddsidi4_split): Likewise.
1369
1370 2021-01-05 liuhongt <hongtao.liu@intel.com>
1371
1372 PR target/98461
1373 * config/i386/sse.md (*sse2_pmovskb_zexthisi): New
1374 define_insn_and_split for zero_extend of subreg HI of pmovskb
1375 result.
1376 (*sse2_pmovskb_zexthisi): Add new combine splitters for
1377 zero_extend of not of subreg HI of pmovskb result.
1378
1379 2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
1380
1381 PR target/97269
1382 * explow.c (convert_memory_address_addr_space_1): Handle UNSPECs
1383 nested in CONSTs.
1384 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Use
1385 convert_memory_address to convert symbolic immediates to ptr_mode
1386 before forcing them to memory.
1387
1388 2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
1389
1390 PR rtl-optimization/97144
1391 * recog.c (constrain_operands): Initialize matching_operand
1392 for each alternative, rather than only doing it once.
1393
1394 2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
1395
1396 PR rtl-optimization/98403
1397 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Explain
1398 why we don't remove call clobbers.
1399 (function_info::apply_changes_to_insn): Don't attempt to add
1400 call clobbers here.
1401
1402 2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
1403
1404 PR tree-optimization/98371
1405 * tree-vect-loop.c (vect_reanalyze_as_main_loop): New function.
1406 (vect_analyze_loop): If an epilogue loop appears to be cheaper
1407 than the main loop, re-analyze it as a main loop before adopting
1408 it as a main loop.
1409
1410 2021-01-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1411
1412 PR c++/98316
1413 * configure.ac (NETLIBS): Determine using AX_LIB_SOCKET_NSL.
1414 * aclocal.m4, configure: Regenerate.
1415 * Makefile.in (NETLIBS): Define.
1416 (BACKEND): Remove $(CODYLIB).
1417
1418 2021-01-05 Jakub Jelinek <jakub@redhat.com>
1419
1420 PR rtl-optimization/98334
1421 * simplify-rtx.c (simplify_context::simplify_binary_operation_1):
1422 Optimize (X - 1) * Y + Y to X * Y or (X + 1) * Y - Y to X * Y.
1423
1424 2021-01-05 Bernd Edlinger <bernd.edlinger@hotmail.de>
1425
1426 * tree-inline.c (expand_call_inline): Restore input_location.
1427 Return result from recursive call.
1428
1429 2021-01-04 Richard Sandiford <richard.sandiford@arm.com>
1430
1431 PR tree-optimization/95401
1432 * config/aarch64/aarch64-sve-builtins.cc
1433 (gimple_folder::load_store_cookie): Use bits rather than bytes
1434 for the alignment argument to IFN_MASK_LOAD and IFN_MASK_STORE.
1435 * gimple-fold.c (gimple_fold_mask_load_store_mem_ref): Likewise.
1436 * tree-vect-stmts.c (vectorizable_store): Likewise.
1437 (vectorizable_load): Likewise.
1438
1439 2021-01-04 Richard Biener <rguenther@suse.de>
1440
1441 PR tree-optimization/98308
1442 * tree-vect-stmts.c (vectorizable_load): Set invariant mask
1443 SLP vectype.
1444
1445 2021-01-04 Jakub Jelinek <jakub@redhat.com>
1446
1447 PR tree-optimization/95771
1448 * tree-ssa-loop-niter.c (number_of_iterations_popcount): Handle types
1449 with precision smaller than int's precision and types with precision
1450 twice as large as long long. Formatting fixes.
1451
1452 2021-01-04 Richard Biener <rguenther@suse.de>
1453
1454 PR tree-optimization/98464
1455 * tree-ssa-sccvn.c (vn_valueize_for_srt): Rename from ...
1456 (vn_valueize_wrapper): ... this. Temporarily adjust vn_context_bb.
1457 (process_bb): Adjust.
1458
1459 2021-01-04 Matthew Malcomson <matthew.malcomson@arm.com>
1460
1461 PR other/98437
1462 * doc/invoke.texi (-fsanitize=address): Fix wording describing
1463 clash with -fsanitize=hwaddress.
1464
1465 2021-01-04 Richard Biener <rguenther@suse.de>
1466
1467 PR tree-optimization/98282
1468 * tree-ssa-sccvn.c (vn_get_stmt_kind): Classify tcc_reference on
1469 invariants as VN_NARY.
1470
1471 2021-01-04 Richard Sandiford <richard.sandiford@arm.com>
1472
1473 PR target/89057
1474 * config/aarch64/aarch64-simd.md (aarch64_combine<mode>): Accept
1475 aarch64_simd_reg_or_zero for operand 2. Use the combinez patterns
1476 to handle zero operands.
1477
1478 2021-01-04 Richard Sandiford <richard.sandiford@arm.com>
1479
1480 * config/aarch64/aarch64.c (offset_6bit_signed_scaled_p): New function.
1481 (offset_6bit_unsigned_scaled_p): Fix typo in comment.
1482 (aarch64_sve_prefetch_operand_p): Accept MUL VLs in the range
1483 [-32, 31].
1484
1485 2021-01-04 Richard Biener <rguenther@suse.de>
1486
1487 PR tree-optimization/98393
1488 * tree-vect-slp.c (vect_build_slp_tree): Properly zero matches
1489 when hitting the limit.
1490
1491 2021-01-04 Richard Biener <rguenther@suse.de>
1492
1493 PR tree-optimization/98291
1494 * tree-vect-loop.c (vectorizable_reduction): Bypass
1495 associativity check for SLP reductions with VF 1.
1496
1497 2021-01-04 Jakub Jelinek <jakub@redhat.com>
1498
1499 PR tree-optimization/96782
1500 * match.pd (x == ~x -> false, x != ~x -> true): New simplifications.
1501
1502 2021-01-04 Bernd Edlinger <bernd.edlinger@hotmail.de>
1503
1504 * collect-utils.c (collect_execute): Check dumppfx.
1505 * collect2.c (maybe_run_lto_and_relink, do_link): Pass atsuffix
1506 to collect_execute.
1507 (do_link): Add new parameter atsuffix.
1508 (main): Handle -dumpdir option. Skip one argument for
1509 -o, -isystem and -B options.
1510 * gcc.c (make_at_file): New helper function.
1511 (close_at_file): Use it.
1512
1513 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
1514
1515 * config/darwin.h (MIN_LD64_NO_COAL_SECTS): Adjust.
1516 Amend handling for LD64_VERSION fallback defaults.
1517
1518 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
1519
1520 * config.gcc: Compute default version information
1521 from the configured target. Likewise defaults for
1522 ld64.
1523 * config/darwin10.h: Removed.
1524 * config/darwin12.h: Removed.
1525 * config/darwin9.h: Removed.
1526 * config/rs6000/darwin8.h: Removed.
1527
1528 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
1529
1530 * config/darwin9.h (ASM_OUTPUT_ALIGNED_COMMON): Delete.
1531
1532 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
1533
1534 * config/darwin9.h (STACK_CHECK_STATIC_BUILTIN): Move from here..
1535 * config/darwin.h (STACK_CHECK_STATIC_BUILTIN): .. to here.
1536
1537 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
1538
1539 * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move from
1540 here...
1541 * config/darwin.h (LINK_GCC_C_SEQUENCE_SPEC): ... to here.
1542
1543 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
1544
1545 * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move the spec
1546 for the Darwin10 unwinder stub from here ...
1547 * config/darwin.h (LINK_COMMAND_SPEC_A): ... to here.
1548
1549 2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
1550
1551 * config/darwin.h (DSYMUTIL_SPEC): Default to DWARF
1552 (ASM_DEBUG_SPEC):Only define if the assembler supports
1553 stabs.
1554 (PREFERRED_DEBUGGING_TYPE): Default to DWARF.
1555 (DARWIN_PREFER_DWARF): Define.
1556 * config/darwin9.h (PREFERRED_DEBUGGING_TYPE): Remove.
1557 (DARWIN_PREFER_DWARF): Likewise
1558 (DSYMUTIL_SPEC): Likewise.
1559 (COLLECT_RUN_DSYMUTIL): Likewise.
1560 (ASM_DEBUG_SPEC): Likewise.
1561 (ASM_DEBUG_OPTION_SPEC): Likewise.
1562
1563 2021-01-02 Jan Hubicka <jh@suse.cz>
1564
1565 * cfg.c (free_block): ggc_free bb.
1566
1567 2021-01-01 Jakub Jelinek <jakub@redhat.com>
1568
1569 * gcc.c (process_command): Update copyright notice dates.
1570 * gcov-dump.c (print_version): Ditto.
1571 * gcov.c (print_version): Ditto.
1572 * gcov-tool.c (print_version): Ditto.
1573 * gengtype.c (create_file): Ditto.
1574 * doc/cpp.texi: Bump @copying's copyright year.
1575 * doc/cppinternals.texi: Ditto.
1576 * doc/gcc.texi: Ditto.
1577 * doc/gccint.texi: Ditto.
1578 * doc/gcov.texi: Ditto.
1579 * doc/install.texi: Ditto.
1580 * doc/invoke.texi: Ditto.
1581
1582 2021-01-01 Jakub Jelinek <jakub@redhat.com>
1583
1584 * ChangeLog-2020: Rotate ChangeLog. New file.
1585
1586 \f
1587 Copyright (C) 2021 Free Software Foundation, Inc.
1588
1589 Copying and distribution of this file, with or without modification,
1590 are permitted in any medium without royalty provided the copyright
1591 notice and this notice are preserved.