1 2020-08-25 H.J. Lu <hjl.tools@gmail.com>
4 * config/i386/i386.h (CTZ_DEFINED_VALUE_AT_ZERO): Return 0/2.
5 (CLZ_DEFINED_VALUE_AT_ZERO): Likewise.
7 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
10 * config/pa/pa.c (hppa_rtx_costs_shadd_p): New helper function
11 to check for coefficients supported by shNadd and shladd,l.
12 (hppa_rtx_costs): Rewrite to avoid using estimates based upon
13 FACTOR and enable recursing deeper into RTL expressions.
15 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
17 * config/pa/pa.md (ashldi3): Additionally, on !TARGET_64BIT
18 generate a two instruction shd/zdep sequence when shifting
19 registers by suitable constants.
20 (shd_internal): New define_expand to provide gen_shd_internal.
22 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
24 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Rename
25 __ARM_FEATURE_SVE_VECTOR_OPERATIONS to
26 __ARM_FEATURE_SVE_VECTOR_OPERATORS.
28 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
30 * config/aarch64/aarch64-sve-builtins.cc (add_sve_type_attribute):
31 Take the ACLE name of the type as a parameter and add it as fourth
32 argument to the "SVE type" attribute.
33 (register_builtin_types): Update call accordingly.
34 (register_tuple_type): Likewise. Construct the name of the type
35 earlier in order to do this.
36 (get_arm_sve_vector_bits_attributes): New function.
37 (handle_arm_sve_vector_bits_attribute): Report a more sensible
38 error message if the attribute is applied to an SVE tuple type.
39 Don't allow the attribute to be applied to an existing fixed-length
40 SVE type. Mangle the new type as __SVE_VLS<type, vector-bits>.
41 Add a dummy TYPE_DECL to the new type.
43 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
45 * config/aarch64/aarch64-sve-builtins.cc (DEF_SVE_TYPE): Add a
46 leading "u" to each mangled name.
48 2020-08-25 Richard Biener <rguenther@suse.de>
50 PR tree-optimization/96548
51 PR tree-optimization/96760
52 * tree-ssa-loop-im.c (tree_ssa_lim): Recompute RPO after
55 2020-08-25 Jakub Jelinek <jakub@redhat.com>
57 PR tree-optimization/96722
58 * gimple.c (infer_nonnull_range): Formatting fix.
59 (infer_nonnull_range_by_dereference): Return false for clobber stmts.
61 2020-08-25 Jakub Jelinek <jakub@redhat.com>
63 PR tree-optimization/96758
64 * tree-ssa-strlen.c (handle_builtin_string_cmp): If both cstlen1
65 and cstlen2 are set, set cmpsiz to their minimum, otherwise use the
66 one that is set. If bound is used and smaller than cmpsiz, set cmpsiz
67 to bound. If both cstlen1 and cstlen2 are set, perform the optimization.
69 2020-08-25 Martin Jambor <mjambor@suse.cz>
71 PR tree-optimization/96730
72 * tree-sra.c (create_access): Disqualify any aggregate with negative
74 (build_ref_for_model): Add assert that offset is non-negative.
76 2020-08-25 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
78 * rtl.def: Fix typo in comment.
80 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
82 PR tree-optimization/21137
83 * fold-const.c (fold_binary_loc) [NE_EXPR/EQ_EXPR]: Call
84 STRIP_NOPS when checking whether to simplify ((x>>C1)&C2) != 0.
86 2020-08-25 Andrew Pinski <apinski@marvell.com>
89 * config/mips/mips.md (builtin_longjmp): Restore the frame
90 pointer and stack pointer and gp.
92 2020-08-25 Richard Biener <rguenther@suse.de>
95 * dwarf2out.c (reference_to_unused): Make FUNCTION_DECL
96 processing more consistent with respect to
97 symtab->global_info_ready.
98 (tree_add_const_value_attribute): Unconditionally call
99 rtl_for_decl_init to do all mangling early but throw
100 away the result if early_dwarf.
102 2020-08-25 Hongtao Liu <hongtao.liu@intel.com>
105 * config/i386/sse.md: Correct the mode of NOT operands to
108 2020-08-25 Jakub Jelinek <jakub@redhat.com>
110 PR tree-optimization/96715
111 * match.pd (copysign(x,-x) -> -x): New simplification.
113 2020-08-25 Jakub Jelinek <jakub@redhat.com>
116 * fold-const.c (native_interpret_real): For MODE_COMPOSITE_P modes
117 punt if the to be returned REAL_CST does not encode to the bitwise
120 2020-08-24 Gerald Pfeifer <gerald@pfeifer.com>
122 * doc/install.texi (Configuration): Switch valgrind.com to https.
124 2020-08-24 Christophe Lyon <christophe.lyon@linaro.org>
128 * config/arm/thumb1.md: Disable set-constant splitter when
130 (thumb1_movsi_insn): Fix -mpure-code
133 2020-08-24 Martin Liska <mliska@suse.cz>
135 * tree-vect-data-refs.c (dr_group_sort_cmp): Work on
137 (vect_analyze_data_ref_accesses): Work on groups.
138 (vect_find_stmt_data_reference): Add group_id argument and fill
139 up dataref_groups vector.
140 * tree-vect-loop.c (vect_get_datarefs_in_loop): Pass new
142 (vect_analyze_loop_2): Likewise.
143 * tree-vect-slp.c (vect_slp_analyze_bb_1): Pass argument.
144 (vect_slp_bb_region): Likewise.
145 (vect_slp_region): Likewise.
146 (vect_slp_bb):Work on the entire BB.
147 * tree-vectorizer.h (vect_analyze_data_ref_accesses): Add new
149 (vect_find_stmt_data_reference): Likewise.
151 2020-08-24 Martin Liska <mliska@suse.cz>
153 PR tree-optimization/96597
154 * tree-ssa-sccvn.c (vn_reference_lookup_call): Add missing
155 initialization of ::punned.
156 (vn_reference_insert): Use consistently false instead of 0.
157 (vn_reference_insert_pieces): Likewise.
159 2020-08-24 Hans-Peter Nilsson <hp@axis.com>
162 * reorg.c (fill_slots_from_thread): Allow trial insns that clobber
163 TARGET_FLAGS_REGNUM as delay-slot fillers.
165 2020-08-23 H.J. Lu <hjl.tools@gmail.com>
168 * config/i386/i386-options.c (IX86_ATTR_IX86_YES): New.
169 (IX86_ATTR_IX86_NO): Likewise.
170 (ix86_opt_type): Add ix86_opt_ix86_yes and ix86_opt_ix86_no.
171 (ix86_valid_target_attribute_inner_p): Handle general-regs-only,
172 ix86_opt_ix86_yes and ix86_opt_ix86_no.
173 (ix86_option_override_internal): Check opts->x_ix86_target_flags
174 instead of opts->x_ix86_target_flags.
175 * doc/extend.texi: Document target("general-regs-only") function
178 2020-08-21 Richard Sandiford <richard.sandiford@arm.com>
180 * doc/extend.texi: Update links to Arm docs.
181 * doc/invoke.texi: Likewise.
183 2020-08-21 Hongtao Liu <hongtao.liu@intel.com>
186 * config/i386/i386-expand.c
187 (ix86_expand_vec_shift_qihi_constant): Refine.
189 2020-08-21 Alex Coplan <alex.coplan@arm.com>
192 * gcc.c (set_static_spec): New.
193 (set_static_spec_owned): New.
194 (set_static_spec_shared): New.
195 (driver::maybe_putenv_COLLECT_LTO_WRAPPER): Use
196 set_static_spec_owned() to take ownership of lto_wrapper_file
197 such that it gets freed in driver::finalize.
198 (driver::maybe_run_linker): Use set_static_spec_shared() to
199 ensure that we don't try and free() the static string "ld",
200 also ensuring that any previously-allocated string in
201 linker_name_spec is freed. Likewise with argv0.
202 (driver::finalize): Use set_static_spec_shared() when resetting
203 specs that previously had allocated strings; remove if(0)
204 around call to free().
206 2020-08-21 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
208 * emit-rtl.c (try_split): Call copy_frame_info_to_split_insn
209 to split certain RTX_FRAME_RELATED_P insns.
210 * recog.c (copy_frame_info_to_split_insn): New function.
211 (peep2_attempt): Split copying of frame related info of
212 RTX_FRAME_RELATED_P insns into above function and call it.
213 * recog.h (copy_frame_info_to_split_insn): Declare it.
215 2020-08-21 liuhongt <hongtao.liu@intel.com>
218 * config/i386/i386.c (ix86_preferred_reload_class): Allow
219 QImode data go into mask registers.
220 * config/i386/i386.md: (*movhi_internal): Adjust constraints
222 (*movqi_internal): Ditto.
223 (*anddi_1): Support mask register operations
224 (*and<mode>_1): Ditto.
226 (*andn<mode>_1): Ditto.
227 (*<code><mode>_1): Ditto.
228 (*<code>qi_1): Ditto.
229 (*one_cmpl<mode>2_1): Ditto.
230 (*one_cmplsi2_1_zext): Ditto.
231 (*one_cmplqi2_1): Ditto.
232 (define_peephole2): Move constant 0/-1 directly into mask
234 * config/i386/predicates.md (mask_reg_operand): New predicate.
235 * config/i386/sse.md (define_split): Add post-reload splitters
236 that would convert "generic" patterns to mask patterns.
237 (*knotsi_1_zext): New define_insn.
239 2020-08-21 liuhongt <hongtao.liu@intel.com>
241 * config/i386/x86-tune-costs.h (skylake_cost): Adjust cost
244 2020-08-21 liuhongt <hongtao.liu@intel.com>
246 * config/i386/i386.c (inline_secondary_memory_needed):
247 No memory is needed between mask regs and gpr.
248 (ix86_hard_regno_mode_ok): Add condition TARGET_AVX512F for
250 * config/i386/i386.h (enum reg_class): Add INT_MASK_REGS.
251 (REG_CLASS_NAMES): Ditto.
252 (REG_CLASS_CONTENTS): Ditto.
253 * config/i386/i386.md: Exclude mask register in
254 define_peephole2 which is avaiable only for gpr.
256 2020-08-21 H.J. Lu <hjl.tools@gmail.com>
259 * config/i386/i386.h (struct processor_costs): Add member
260 mask_to_integer, integer_to_mask, mask_load[3], mask_store[3],
262 * config/i386/x86-tune-costs.h (ix86_size_cost, i386_cost,
263 i386_cost, pentium_cost, lakemont_cost, pentiumpro_cost,
264 geode_cost, k6_cost, athlon_cost, k8_cost, amdfam10_cost,
265 bdver_cost, znver1_cost, znver2_cost, skylake_cost,
266 btver1_cost, btver2_cost, pentium4_cost, nocona_cost,
267 atom_cost, slm_cost, intel_cost, generic_cost, core_cost):
268 Initialize mask_load[3], mask_store[3], mask_move,
269 integer_to_mask, mask_to_integer for all target costs.
270 * config/i386/i386.c (ix86_register_move_cost): Using cost
271 model of mask registers.
272 (inline_memory_move_cost): Ditto.
273 (ix86_register_move_cost): Ditto.
275 2020-08-20 Iain Buclaw <ibuclaw@gdcproject.org>
277 * config/vxworks.h (VXWORKS_ADDITIONAL_CPP_SPEC): Don't include
278 VxWorks header files if -fself-test is used.
279 (STARTFILE_PREFIX_SPEC): Avoid using VSB_DIR if -fself-test is used.
281 2020-08-20 Joe Ramsay <Joe.Ramsay@arm.com>
284 * config/arm/mve.md (mve_vst1q_f<mode>): Require MVE memory operand for
286 (mve_vst1q_<supf><mode>): Likewise.
288 2020-08-19 2020-08-19 Carl Love <cel@us.ibm.com>
290 * config/rs6000/rs6000-builtin.def (BU_P10V_0, BU_P10V_1,
291 BU_P10V_2, BU_P10V_3): Rename BU_P10V_VSX_0, BU_P10V_VSX_1,
292 BU_P10V_VSX_2, BU_P10V_VSX_3 respectively.
294 (BU_P10V_AV_0, BU_P10V_AV_1, BU_P10V_AV_2, BU_P10V_AV_3, BU_P10V_AV_4):
295 New definitions for Power 10 Altivec macros.
296 (VSTRIBR, VSTRIHR, VSTRIBL, VSTRIHL, VSTRIBR_P, VSTRIHR_P,
297 VSTRIBL_P, VSTRIHL_P, MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM,
298 VEXPANDMB, VEXPANDMH, VEXPANDMW, VEXPANDMD, VEXPANDMQ, VEXTRACTMB,
299 VEXTRACTMH, VEXTRACTMW, VEXTRACTMD, VEXTRACTMQ): Replace macro
300 expansion BU_P10V_1 with BU_P10V_AV_1.
301 (VCLRLB, VCLRRB, VCFUGED, VCLZDM, VCTZDM, VPDEPD, VPEXTD, VGNB,
302 VCNTMBB, VCNTMBH, VCNTMBW, VCNTMBD): Replace macro expansion
303 BU_P10V_2 with BU_P10V_AV_2.
304 (VEXTRACTBL, VEXTRACTHL, VEXTRACTWL, VEXTRACTDL, VEXTRACTBR, VEXTRACTHR,
305 VEXTRACTWR, VEXTRACTDR, VINSERTGPRBL, VINSERTGPRHL, VINSERTGPRWL,
306 VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL, VINSERTGPRBR,
307 VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR, VINSERTVPRHR,
308 VINSERTVPRWR, VREPLACE_ELT_V4SI, VREPLACE_ELT_UV4SI, VREPLACE_ELT_V2DF,
309 VREPLACE_ELT_V4SF, VREPLACE_ELT_V2DI, VREPLACE_ELT_UV2DI, VREPLACE_UN_V4SI,
310 VREPLACE_UN_UV4SI, VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
311 VREPLACE_UN_V2DF, VSLDB_V16QI, VSLDB_V8HI, VSLDB_V4SI, VSLDB_V2DI,
312 VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI, VSRDB_V2DI): Replace macro expansion
313 BU_P10V_3 with BU_P10V_AV_3.
314 (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF, VXXSPLTID): Replace macro expansion
315 BU_P10V_1 with BU_P10V_AV_1.
316 (XXGENPCVM_V16QI, XXGENPCVM_V8HI, XXGENPCVM_V4SI, XXGENPCVM_V2DI):
317 Replace macro expansion BU_P10V_2 with BU_P10V_VSX_2.
318 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF, VXXBLEND_V16QI, VXXBLEND_V8HI,
319 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): Replace macor
320 expansion BU_P10V_3 with BU_P10V_VSX_3.
321 (XXEVAL, VXXPERMX): Replace macro expansion BU_P10V_4 with BU_P10V_VSX_4.
322 (XVCVBF16SP, XVCVSPBF16): Replace macro expansion BU_VSX_1 with
323 BU_P10V_VSX_1. Also change MISC to CONST.
324 * config/rs6000/rs6000-c.c: (P10_BUILTIN_VXXPERMX): Replace with
325 P10V_BUILTIN_VXXPERMX.
326 (P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRRB,
327 P10_BUILTIN_VGNB, P10_BUILTIN_XXEVAL, P10_BUILTIN_VXXPERMX,
328 P10_BUILTIN_VEXTRACTBL, P10_BUILTIN_VEXTRACTHL, P10_BUILTIN_VEXTRACTWL,
329 P10_BUILTIN_VEXTRACTDL, P10_BUILTIN_VINSERTGPRHL,
330 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
331 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
332 P10_BUILTIN_VEXTRACTBR, P10_BUILTIN_VEXTRACTHR,
333 P10_BUILTIN_VEXTRACTWR, P10_BUILTIN_VEXTRACTDR,
334 P10_BUILTIN_VINSERTGPRBR, P10_BUILTIN_VINSERTGPRHR,
335 P10_BUILTIN_VINSERTGPRWR, P10_BUILTIN_VINSERTGPRDR,
336 P10_BUILTIN_VINSERTVPRBR, P10_BUILTIN_VINSERTVPRHR,
337 P10_BUILTIN_VINSERTVPRWR, P10_BUILTIN_VREPLACE_ELT_UV4SI,
338 P10_BUILTIN_VREPLACE_ELT_V4SI, P10_BUILTIN_VREPLACE_ELT_UV2DI,
339 P10_BUILTIN_VREPLACE_ELT_V2DI, P10_BUILTIN_VREPLACE_ELT_V2DF,
340 P10_BUILTIN_VREPLACE_UN_UV4SI, P10_BUILTIN_VREPLACE_UN_V4SI,
341 P10_BUILTIN_VREPLACE_UN_V4SF, P10_BUILTIN_VREPLACE_UN_UV2DI,
342 P10_BUILTIN_VREPLACE_UN_V2DI, P10_BUILTIN_VREPLACE_UN_V2DF,
343 P10_BUILTIN_VSLDB_V16QI, P10_BUILTIN_VSLDB_V16QI,
344 P10_BUILTIN_VSLDB_V8HI, P10_BUILTIN_VSLDB_V4SI,
345 P10_BUILTIN_VSLDB_V2DI, P10_BUILTIN_VXXSPLTIW_V4SI,
346 P10_BUILTIN_VXXSPLTIW_V4SF, P10_BUILTIN_VXXSPLTID,
347 P10_BUILTIN_VXXSPLTI32DX_V4SI, P10_BUILTIN_VXXSPLTI32DX_V4SF,
348 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
349 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI,
350 P10_BUILTIN_VXXBLEND_V4SF, P10_BUILTIN_VXXBLEND_V2DF,
351 P10_BUILTIN_VSRDB_V16QI, P10_BUILTIN_VSRDB_V8HI,
352 P10_BUILTIN_VSRDB_V4SI, P10_BUILTIN_VSRDB_V2DI,
353 P10_BUILTIN_VSTRIBL, P10_BUILTIN_VSTRIHL,
354 P10_BUILTIN_VSTRIBL_P, P10_BUILTIN_VSTRIHL_P,
355 P10_BUILTIN_VSTRIBR, P10_BUILTIN_VSTRIHR,
356 P10_BUILTIN_VSTRIBR_P, P10_BUILTIN_VSTRIHR_P,
357 P10_BUILTIN_MTVSRBM, P10_BUILTIN_MTVSRHM,
358 P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
359 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB,
360 P10_BUILTIN_VCNTMBH, P10_BUILTIN_VCNTMBW,
361 P10_BUILTIN_VCNTMBD, P10_BUILTIN_VEXPANDMB,
362 P10_BUILTIN_VEXPANDMH, P10_BUILTIN_VEXPANDMW,
363 P10_BUILTIN_VEXPANDMD, P10_BUILTIN_VEXPANDMQ,
364 P10_BUILTIN_VEXTRACTMB, P10_BUILTIN_VEXTRACTMH,
365 P10_BUILTIN_VEXTRACTMW, P10_BUILTIN_VEXTRACTMD,
366 P10_BUILTIN_VEXTRACTMQ, P10_BUILTIN_XVTLSBB_ZEROS,
367 P10_BUILTIN_XVTLSBB_ONES): Replace with
368 P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRRB,
369 P10V_BUILTIN_VGNB, P10V_BUILTIN_XXEVAL, P10V_BUILTIN_VXXPERMX,
370 P10V_BUILTIN_VEXTRACTBL, P10V_BUILTIN_VEXTRACTHL, P10V_BUILTIN_VEXTRACTWL,
371 P10V_BUILTIN_VEXTRACTDL, P10V_BUILTIN_VINSERTGPRHL,
372 P10V_BUILTIN_VINSERTGPRWL, P10V_BUILTIN_VINSERTGPRDL,
373 P10V_BUILTIN_VINSERTVPRBL,P10V_BUILTIN_VINSERTVPRHL,
374 P10V_BUILTIN_VEXTRACTBR, P10V_BUILTIN_VEXTRACTHR
375 P10V_BUILTIN_VEXTRACTWR, P10V_BUILTIN_VEXTRACTDR,
376 P10V_BUILTIN_VINSERTGPRBR, P10V_BUILTIN_VINSERTGPRHR,
377 P10V_BUILTIN_VINSERTGPRWR, P10V_BUILTIN_VINSERTGPRDR,
378 P10V_BUILTIN_VINSERTVPRBR, P10V_BUILTIN_VINSERTVPRHR,
379 P10V_BUILTIN_VINSERTVPRWR, P10V_BUILTIN_VREPLACE_ELT_UV4SI,
380 P10V_BUILTIN_VREPLACE_ELT_V4SI, P10V_BUILTIN_VREPLACE_ELT_UV2DI,
381 P10V_BUILTIN_VREPLACE_ELT_V2DI, P10V_BUILTIN_VREPLACE_ELT_V2DF,
382 P10V_BUILTIN_VREPLACE_UN_UV4SI, P10V_BUILTIN_VREPLACE_UN_V4SI,
383 P10V_BUILTIN_VREPLACE_UN_V4SF, P10V_BUILTIN_VREPLACE_UN_UV2DI,
384 P10V_BUILTIN_VREPLACE_UN_V2DI, P10V_BUILTIN_VREPLACE_UN_V2DF,
385 P10V_BUILTIN_VSLDB_V16QI, P10V_BUILTIN_VSLDB_V16QI,
386 P10V_BUILTIN_VSLDB_V8HI, P10V_BUILTIN_VSLDB_V4SI,
387 P10V_BUILTIN_VSLDB_V2DI, P10V_BUILTIN_VXXSPLTIW_V4SI,
388 P10V_BUILTIN_VXXSPLTIW_V4SF, P10V_BUILTIN_VXXSPLTID,
389 P10V_BUILTIN_VXXSPLTI32DX_V4SI, P10V_BUILTIN_VXXSPLTI32DX_V4SF,
390 P10V_BUILTIN_VXXBLEND_V16QI, P10V_BUILTIN_VXXBLEND_V8HI,
391 P10V_BUILTIN_VXXBLEND_V4SI, P10V_BUILTIN_VXXBLEND_V2DI,
392 P10V_BUILTIN_VXXBLEND_V4SF, P10V_BUILTIN_VXXBLEND_V2DF,
393 P10V_BUILTIN_VSRDB_V16QI, P10V_BUILTIN_VSRDB_V8HI,
394 P10V_BUILTIN_VSRDB_V4SI, P10V_BUILTIN_VSRDB_V2DI,
395 P10V_BUILTIN_VSTRIBL, P10V_BUILTIN_VSTRIHL,
396 P10V_BUILTIN_VSTRIBL_P, P10V_BUILTIN_VSTRIHL_P,
397 P10V_BUILTIN_VSTRIBR, P10V_BUILTIN_VSTRIHR,
398 P10V_BUILTIN_VSTRIBR_P, P10V_BUILTIN_VSTRIHR_P,
399 P10V_BUILTIN_MTVSRBM, P10V_BUILTIN_MTVSRHM,
400 P10V_BUILTIN_MTVSRWM, P10V_BUILTIN_MTVSRDM,
401 P10V_BUILTIN_MTVSRQM, P10V_BUILTIN_VCNTMBB,
402 P10V_BUILTIN_VCNTMBH, P10V_BUILTIN_VCNTMBW,
403 P10V_BUILTIN_VCNTMBD, P10V_BUILTIN_VEXPANDMB,
404 P10V_BUILTIN_VEXPANDMH, P10V_BUILTIN_VEXPANDMW,
405 P10V_BUILTIN_VEXPANDMD, P10V_BUILTIN_VEXPANDMQ,
406 P10V_BUILTIN_VEXTRACTMB, P10V_BUILTIN_VEXTRACTMH,
407 P10V_BUILTIN_VEXTRACTMW, P10V_BUILTIN_VEXTRACTMD,
408 P10V_BUILTIN_VEXTRACTMQ, P10V_BUILTIN_XVTLSBB_ZEROS,
409 P10V_BUILTIN_XVTLSBB_ONES respectively.
410 * config/rs6000/rs6000-call.c: Ditto above, change P10_BUILTIN_name to
412 (P10_BUILTIN_XVCVSPBF16, P10_BUILTIN_XVCVBF16SP): Change to
413 P10V_BUILTIN_XVCVSPBF16, P10V_BUILTIN_XVCVBF16SP respectively.
415 2020-08-19 Bill Schmidt <wschmidt@linux.ibm.com>
417 * config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall):
418 Sibcalls are always legal when the caller doesn't preserve r2.
420 2020-08-19 Uroš Bizjak <ubizjak@gmail.com>
422 * config/i386/i386-expand.c (ix86_expand_builtin)
423 [case IX86_BUILTIN_ENQCMD, case IX86_BUILTIN_ENQCMDS]:
424 Rewrite expansion to use code_for_enqcmd.
425 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]:
426 Rewrite expansion to use code_for_wrss.
427 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
428 Rewrite expansion to use code_for_wrss.
430 2020-08-19 Feng Xue <fxue@os.amperecomputing.com>
432 PR tree-optimization/94234
433 * match.pd ((PTR_A + OFF) - (PTR_B + OFF)) -> (PTR_A - PTR_B): New
436 2020-08-19 H.J. Lu <hjl.tools@gmail.com>
438 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect Rocket
441 2020-08-19 Peixin Qiao <qiaopeixin@huawei.com>
443 * config/aarch64/aarch64.c (aarch64_init_cumulative_args): Remove
444 "fndecl && TREE_PUBLIC (fndecl)" check since it prevents the funtion
445 type check when calling via a function pointer or when calling a static
448 2020-08-19 Kewen Lin <linkw@linux.ibm.com>
450 * opts-global.c (decode_options): Call target_option_override_hook
451 before it prints for --help=*.
453 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
455 * config/rs6000/rs6000-builtin.def (BU_VSX_1): Rename xvcvbf16sp to
457 * config/rs6000/rs6000-call.c (builtin_function_type): Likewise.
458 * config/rs6000/vsx.md: Likewise.
459 * doc/extend.texi: Likewise.
461 2020-08-18 Aaron Sawdey <acsawdey@linux.ibm.com>
463 * config/rs6000/rs6000-string.c (gen_lxvl_stxvl_move):
465 (expand_block_move): Add lxvl/stxvl, vector pair, and
467 * config/rs6000/rs6000.c (rs6000_option_override_internal):
468 Default value for -mblock-ops-vector-pair.
469 * config/rs6000/rs6000.opt: Add -mblock-ops-vector-pair.
471 2020-08-18 Aldy Hernandez <aldyh@redhat.com>
473 * vr-values.c (check_for_binary_op_overflow): Change type of store
475 (vr_values::adjust_range_with_scev): Abstract most of the code...
476 (range_of_var_in_loop): ...here. Remove value_range_equiv uses.
477 (simplify_using_ranges::simplify_using_ranges): Change type of store
479 * vr-values.h (class range_query): New.
480 (class simplify_using_ranges): Use range_query.
481 (class vr_values): Add OVERRIDE to get_value_range.
482 (range_of_var_in_loop): New.
484 2020-08-18 Martin Sebor <msebor@redhat.com>
488 * expr.c (convert_to_bytes): Replace statically allocated buffer with
489 a dynamically allocated one of sufficient size.
491 2020-08-18 Martin Sebor <msebor@redhat.com>
493 PR tree-optimization/96670
495 * gimple-fold.c (gimple_fold_builtin_memchr): Call byte_representation
496 to get it, not string_constant.
498 2020-08-18 Hu Jiangping <hujiangping@cn.fujitsu.com>
500 * doc/gimple.texi (gimple_debug_begin_stmt_p): Add return type.
501 (gimple_debug_inline_entry_p, gimple_debug_nonbind_marker_p): Likewise.
503 2020-08-18 Martin Sebor <msebor@redhat.com>
505 * fold-const.c (native_encode_expr): Update comment.
507 2020-08-18 Uroš Bizjak <ubizjak@gmail.com>
510 * config/i386/i386.md (restore_stack_nonlocal): Add missing compare
511 RTX. Rewrite expander to use high-level functions in RTL construction.
513 2020-08-18 liuhongt <hongtao.liu@intel.com>
517 * config/i386/i386-expand.c (ix86_expand_pinsr): Don't use
519 (ix86_expand_pextr): Don't use pextr for TImode.
521 2020-08-17 Uroš Bizjak <ubizjak@gmail.com>
523 * config/i386/i386-builtin.def (__builtin_ia32_bextri_u32)
524 (__builtin_ia32_bextri_u64): Use CODE_FOR_nothing.
525 * config/i386/i386.md (@tbm_bextri_<mode>):
526 Implement as parametrized name pattern.
527 (@rdrand<mode>): Ditto.
528 (@rdseed<mode>): Ditto.
529 * config/i386/i386-expand.c (ix86_expand_builtin)
530 [case IX86_BUILTIN_BEXTRI32, case IX86_BUILTIN_BEXTRI64]:
531 Update for parameterized name patterns.
532 [case IX86_BUILTIN_RDRAND16_STEP, case IX86_BUILTIN_RDRAND32_STEP]
533 [case IX86_BUILTIN_RDRAND64_STEP]: Ditto.
534 [case IX86_BUILTIN_RDSEED16_STEP, case IX86_BUILTIN_RDSEED32_STEP]
535 [case IX86_BUILTIN_RDSEED64_STEP]: Ditto.
537 2020-08-17 Aldy Hernandez <aldyh@redhat.com>
539 * vr-values.c (vr_values::get_value_range): Add stmt param.
540 (vr_values::extract_range_from_comparison): Same.
541 (vr_values::extract_range_from_assignment): Pass stmt to
542 extract_range_from_comparison.
543 (vr_values::adjust_range_with_scev): Pass stmt to get_value_range.
544 (simplify_using_ranges::vrp_evaluate_conditional): Add stmt param.
545 Pass stmt to get_value_range.
546 (simplify_using_ranges::vrp_visit_cond_stmt): Pass stmt to
548 (simplify_using_ranges::simplify_abs_using_ranges): Same.
549 (simplify_using_ranges::simplify_div_or_mod_using_ranges): Same.
550 (simplify_using_ranges::simplify_bit_ops_using_ranges): Same.
551 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
552 (simplify_using_ranges::simplify_switch_using_ranges): Same.
553 (simplify_using_ranges::simplify_float_conversion_using_ranges): Same.
554 * vr-values.h (class vr_values): Add stmt arg to
555 vrp_evaluate_conditional_warnv_with_ops.
556 Add stmt arg to extract_range_from_comparison and get_value_range.
557 (simplify_using_ranges::get_value_range): Add stmt arg.
559 2020-08-17 liuhongt <hongtao.liu@intel.com>
562 * config/i386/i386.c (ix86_legitimate_constant_p): Return
563 false for ENDBR immediate.
564 (ix86_legitimate_address_p): Ditto.
565 * config/i386/predicates.md
566 (x86_64_immediate_operand): Exclude ENDBR immediate.
567 (x86_64_zext_immediate_operand): Ditto.
568 (x86_64_dwzext_immediate_operand): Ditto.
569 (ix86_endbr_immediate_operand): New predicate.
571 2020-08-16 Roger Sayle <roger@nextmovesoftware.com>
573 * simplify-rtx.c (simplify_unary_operation_1) [SIGN_EXTEND]:
574 Simplify (sign_extend:M (truncate:N (lshiftrt:M x C))) to
575 (ashiftrt:M x C) when the shift sets the high bits appropriately.
577 2020-08-14 Martin Sebor <msebor@redhat.com>
580 * builtins.c (expand_builtin_memory_copy_args): Rename called function.
581 (expand_builtin_stpcpy_1): Remove argument from call.
582 (expand_builtin_memcmp): Rename called function.
583 (inline_expand_builtin_bytecmp): Same.
584 * expr.c (convert_to_bytes): New function.
585 (constant_byte_string): New function (formerly string_constant).
586 (string_constant): Call constant_byte_string.
587 (byte_representation): New function.
588 * expr.h (byte_representation): Declare.
589 * fold-const-call.c (fold_const_call): Rename called function.
590 * fold-const.c (c_getstr): Remove an argument.
591 (getbyterep): Define a new function.
592 * fold-const.h (c_getstr): Remove an argument.
593 (getbyterep): Declare a new function.
594 * gimple-fold.c (gimple_fold_builtin_memory_op): Rename callee.
595 (gimple_fold_builtin_string_compare): Same.
596 (gimple_fold_builtin_memchr): Same.
598 2020-08-14 David Malcolm <dmalcolm@redhat.com>
600 * doc/analyzer.texi (Overview): Add tip about how to get a
601 gimple dump if the analyzer ICEs.
603 2020-08-14 Uroš Bizjak <ubizjak@gmail.com>
605 * config/i386/i386-builtin.def (__builtin_ia32_llwpcb)
606 (__builtin_ia32_slwpcb, __builtin_ia32_lwpval32)
607 (__builtin_ia32_lwpval64, __builtin_ia32_lwpins32)
608 (__builtin_ia32_lwpins64): Use CODE_FOR_nothing.
609 * config/i386/i386.md (@lwp_llwpcb<mode>):
610 Implement as parametrized name pattern.
611 (@lwp_slwpcb<mode>): Ditto.
612 (@lwp_lwpval<mode>): Ditto.
613 (@lwp_lwpins<mode>): Ditto.
614 * config/i386/i386-expand.c (ix86_expand_special_args_builtin)
615 [case VOID_FTYPE_UINT_UINT_UINT, case VOID_FTYPE_UINT64_UINT_UINT]
616 [case UCHAR_FTYPE_UINT_UINT_UINT, case UCHAR_FTYPE_UINT64_UINT_UINT]:
618 (ix86_expand_builtin)
619 [ case IX86_BUILTIN_LLWPCB, case IX86_BUILTIN_LLWPCB]:
620 Update for parameterized name patterns.
621 [case IX86_BUILTIN_LWPVAL32, case IX86_BUILTIN_LWPVAL64]
622 [case IX86_BUILTIN_LWPINS32, case IX86_BUILTIN_LWPINS64]: Expand here.
624 2020-08-14 Lewis Hyatt <lhyatt@gmail.com>
626 * common.opt: Add new option -fdiagnostics-plain-output.
627 * doc/invoke.texi: Document it.
628 * opts-common.c (decode_cmdline_options_to_array): Implement it.
629 (decode_cmdline_option): Add missing const qualifier to argv.
631 2020-08-14 Jakub Jelinek <jakub@redhat.com>
632 Jonathan Wakely <jwakely@redhat.com>
633 Jonathan Wakely <jwakely@redhat.com>
635 * system.h: Include type_traits.
636 * vec.h (vec<T, A, vl_embed>::embedded_size): Use offsetof and asserts
637 on vec_stdlayout, which is conditionally a vec (for standard layout T)
638 and otherwise vec_embedded.
640 2020-08-14 Jojo R <jiejie_rong@c-sky.com>
642 * config/csky/csky-elf.h (ASM_SPEC): Use mfloat-abi.
643 * config/csky/csky-linux-elf.h (ASM_SPEC): mfloat-abi.
645 2020-08-13 David Malcolm <dmalcolm@redhat.com>
661 * Makefile.in (ANALYZER_OBJS): Add analyzer/region.o,
662 analyzer/region-model-impl-calls.o,
663 analyzer/region-model-manager.o,
664 analyzer/region-model-reachability.o, analyzer/store.o, and
666 * doc/analyzer.texi: Update for changes to analyzer
668 * tristate.h (tristate::get_value): New accessor.
670 2020-08-13 Uroš Bizjak <ubizjak@gmail.com>
672 * config/i386/i386-builtin.def (CET_NORMAL): Merge to CET BDESC array.
673 (__builtin_ia32_rddspd, __builtin_ia32_rddspq, __builtin_ia32_incsspd)
674 (__builtin_ia32_incsspq, __builtin_ia32_wrssd, __builtin_ia32_wrssq)
675 (__builtin_ia32_wrussd, __builtin_ia32_wrussq): Use CODE_FOR_nothing.
676 * config/i386/i386-builtins.c: Remove handling of CET_NORMAL builtins.
677 * config/i386/i386.md (@rdssp<mode>): Implement as parametrized
678 name pattern. Use SWI48 mode iterator. Introduce input operand
679 and remove explicit XOR zeroing from insn template.
680 (@incssp<mode>): Implement as parametrized name pattern.
681 Use SWI48 mode iterator.
682 (@wrss<mode>): Ditto.
683 (@wruss<mode>): Ditto.
684 (rstorssp): Remove expander. Rename insn pattern from *rstorssp<mode>.
685 Use DImode memory operand.
686 (clrssbsy): Remove expander. Rename insn pattern from *clrssbsy<mode>.
687 Use DImode memory operand.
688 (save_stack_nonlocal): Update for parametrized name patterns.
689 Use cleared register as an argument to gen_rddsp.
690 (restore_stack_nonlocal): Update for parametrized name patterns.
691 * config/i386/i386-expand.c (ix86_expand_builtin):
692 [case IX86_BUILTIN_RDSSPD, case IX86_BUILTIN_RDSSPQ]: Expand here.
693 [case IX86_BUILTIN_INCSSPD, case IX86_BUILTIN_INCSSPQ]: Ditto.
694 [case IX86_BUILTIN_RSTORSSP, case IX86_BUILTIN_CLRSSBSY]:
695 Generate DImode memory operand.
696 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]
697 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
698 Update for parameterized name patterns.
700 2020-08-13 Peter Bergner <bergner@linux.ibm.com>
703 * config/rs6000/rs6000-call.c (rs6000_promote_function_mode): Disallow
704 MMA types as return values.
705 (rs6000_function_arg): Disallow MMA types as function arguments.
707 2020-08-13 Richard Sandiford <richard.sandiford@arm.com>
710 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
712 * config/aarch64/aarch64.c (aarch64_function_value): Add if
713 condition to check ag_mode after entering if condition of
714 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
715 set as false by -mgeneral-regs-only, report the diagnostic
716 information of -mgeneral-regs-only imcompatible with the use
717 of fp/simd register(s).
719 2020-08-13 Martin Liska <mliska@suse.cz>
722 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Mask m_value
725 2020-08-13 Jakub Jelinek <jakub@redhat.com>
727 * gimplify.c (gimplify_omp_taskloop_expr): New function.
728 (gimplify_omp_for): Use it. For OMP_FOR_NON_RECTANGULAR
729 loops adjust in outer taskloop the var-outer decls.
730 * omp-expand.c (expand_omp_taskloop_for_inner): Handle non-rectangular
732 (expand_omp_for): Don't reject non-rectangular taskloop.
733 * omp-general.c (omp_extract_for_data): Don't assert that
734 non-rectangular loops have static schedule, instead treat loop->m1
735 or loop->m2 as if loop->n1 or loop->n2 is non-constant.
737 2020-08-13 Hongtao Liu <hongtao.liu@intel.com>
740 * config/i386/sse.md (<avx512>_load<mode>_mask,
741 <avx512>_load<mode>_mask): Extend to generate blendm
743 (<avx512>_blendm<mode>, <avx512>_blendm<mode>): Change
744 define_insn to define_expand.
746 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
747 Uroš Bizjak <ubizjak@gmail.com>
750 * config/i386/i386.md (peephole2): Only reorder register clearing
751 instructions to allow use of xor for general registers.
753 2020-08-12 Martin Liska <mliska@suse.cz>
756 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Drop value bits
757 for bits that are unknown.
758 (ipcp_bits_lattice::set_to_constant): Likewise.
759 * tree-ssa-ccp.c (get_default_value): Add sanity check that
760 IPA CP bit info has all bits set to zero in bits that
763 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
765 * config/aarch64/aarch64.c (aarch64_function_value): Add if
766 condition to check ag_mode after entering if condition of
767 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
768 set as false by -mgeneral-regs-only, report the diagnostic
769 information of -mgeneral-regs-only imcompatible with the use
770 of fp/simd register(s).
772 2020-08-12 Jakub Jelinek <jakub@redhat.com>
774 PR tree-optimization/96535
775 * toplev.c (process_options): Move flag_unroll_loops and
776 flag_cunroll_grow_size handling from here to ...
777 * opts.c (finish_options): ... here. For flag_cunroll_grow_size,
778 don't check for AUTODETECT_VALUE, but instead check
779 opts_set->x_flag_cunroll_grow_size.
780 * common.opt (funroll-completely-grow-size): Default to 0.
781 * config/rs6000/rs6000.c (TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE):
783 (rs6000_override_options_after_change): New function.
784 (rs6000_option_override_internal): Call it. Move there the
785 flag_cunroll_grow_size, unroll_only_small_loops and
786 flag_rename_registers handling.
788 2020-08-12 Tom de Vries <tdevries@suse.de>
790 * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Make elt_size an
791 unsigned HOST_WIDE_INT. Print init_frag.remaining using
792 HOST_WIDE_INT_PRINT_UNSIGNED.
794 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
795 Uroš Bizjak <ubizjak@gmail.com>
797 * config/i386/i386.md (peephole2): Reduce unnecessary
798 register shuffling produced by register allocation.
800 2020-08-12 Aldy Hernandez <aldyh@redhat.com>
802 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use vec<>
803 instead of std::vector<>.
804 (evaluate_properties_for_edge): Same.
805 (ipa_fn_summary_t::duplicate): Same.
806 (estimate_ipcp_clone_size_and_time): Same.
807 * vec.h (<T, A, vl_embed>::embedded_size): Change vec_embedded
808 type to contain a char[].
810 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
813 * config/s390/s390.c (s390_cannot_force_const_mem): Reject an
814 unary minus for everything not being a numeric constant.
815 (legitimize_tls_address): Move a NEG out of the CONST rtx.
817 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
820 * config/s390/s390.h (TARGET_NONSIGNALING_VECTOR_COMPARE_OK): New
822 * config/s390/vector.md (vcond_comparison_operator): Use new macro
825 2020-08-11 Jakub Jelinek <jakub@redhat.com>
827 PR rtl-optimization/96539
828 * expr.c (emit_block_move_hints): Don't copy anything if x and y
829 are the same and neither is MEM_VOLATILE_P.
831 2020-08-11 Jakub Jelinek <jakub@redhat.com>
834 * tree.c (get_narrower): Use TREE_TYPE (ret) instead of
835 TREE_TYPE (win) for COMPOUND_EXPRs.
837 2020-08-11 Jan Hubicka <hubicka@ucw.cz>
839 * predict.c (not_loop_guard_equal_edge_p): New function.
840 (maybe_predict_edge): New function.
841 (predict_paths_for_bb): Use it.
842 (predict_paths_leading_to_edge): Use it.
844 2020-08-11 Martin Liska <mliska@suse.cz>
846 * dbgcnt.def (DEBUG_COUNTER): Add ipa_cp_bits.
847 * ipa-cp.c (ipcp_store_bits_results): Use it when we store known
850 2020-08-10 Marek Polacek <polacek@redhat.com>
852 * doc/sourcebuild.texi: Document dg-ice.
854 2020-08-10 Roger Sayle <roger@nextmovesoftware.com>
856 * config/i386/i386-expand.c (ix86_expand_int_movcc): Expand
857 signed MIN_EXPR against zero as "x < 0 ? x : 0" instead of
858 "x <= 0 ? x : 0" to enable sign_bit_compare_p optimizations.
860 2020-08-10 Aldy Hernandez <aldyh@redhat.com>
862 * value-range.h (gt_ggc_mx): Declare inline.
865 2020-08-10 Marc Glisse <marc.glisse@inria.fr>
867 PR tree-optimization/95433
868 * match.pd (X * C1 == C2): Handle wrapping overflow.
869 * expr.c (maybe_optimize_mod_cmp): Qualify call to mod_inv.
871 * wide-int.cc (mod_inv): ... here.
872 * wide-int.h (mod_inv): Declare it.
874 2020-08-10 Jan Hubicka <hubicka@ucw.cz>
876 * predict.c (filter_predictions): Document semantics of filter.
877 (equal_edge_p): Rename to ...
878 (not_equal_edge_p): ... this; reverse semantics.
879 (remove_predictions_associated_with_edge): Fix.
881 2020-08-10 Hongtao Liu <hongtao.liu@intel.com>
884 * config/i386/i386-expand.c (ix86_expand_sse_cmp): Refine for
886 (ix86_expand_mask_vec_cmp): Change prototype.
887 * config/i386/i386-protos.h (ix86_expand_mask_vec_cmp): Change prototype.
888 * config/i386/i386.c (ix86_print_operand): Remove operand
891 (*<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>): Deleted.
892 (*<avx512>_cmp<mode>3<mask_scalar_merge_name>): Ditto.
893 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>): Ditto.
894 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
895 avx512f_maskcmp<mode>3): Ditto.
897 2020-08-09 Roger Sayle <roger@nextmovesoftware.com>
899 * expmed.c (init_expmed_one_conv): Restore all->reg's mode.
900 (init_expmed_one_mode): Set all->reg to desired mode.
902 2020-08-08 Peter Bergner <bergner@linux.ibm.com>
905 * config/rs6000/rs6000.c (rs6000_invalid_conversion): Use canonical
906 types for type comparisons. Refactor code to simplify it.
908 2020-08-08 Jakub Jelinek <jakub@redhat.com>
911 * tree-nested.c (convert_nonlocal_omp_clauses): For
912 OMP_CLAUSE_REDUCTION, OMP_CLAUSE_LASTPRIVATE and OMP_CLAUSE_LINEAR
913 save info->new_local_var_chain around walks of the clause gimple
914 sequences and declare_vars if needed into the sequence.
916 2020-08-08 Jakub Jelinek <jakub@redhat.com>
918 PR tree-optimization/96424
919 * omp-expand.c: Include tree-eh.h.
920 (expand_omp_for_init_vars): Handle -fexceptions -fnon-call-exceptions
921 by forcing floating point comparison into a bool temporary.
923 2020-08-07 Marc Glisse <marc.glisse@inria.fr>
925 * generic-match-head.c (optimize_vectors_before_lowering_p): New
927 * gimple-match-head.c (optimize_vectors_before_lowering_p):
929 * match.pd ((v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Use it.
931 2020-08-07 Richard Biener <rguenther@suse.de>
933 PR tree-optimization/96514
934 * tree-if-conv.c (if_convertible_bb_p): If the last stmt
935 is a call that is control-altering, fail.
937 2020-08-07 Jose E. Marchesi <jose.marchesi@oracle.com>
939 * config/bpf/bpf.md: Remove trailing whitespaces.
940 * config/bpf/constraints.md: Likewise.
941 * config/bpf/predicates.md: Likewise.
943 2020-08-07 Michael Meissner <meissner@linux.ibm.com>
945 * config/rs6000/rs6000.md (bswaphi2_reg): Add ISA 3.1 support.
946 (bswapsi2_reg): Add ISA 3.1 support.
947 (bswapdi2): Rename bswapdi2_xxbrd to bswapdi2_brd.
948 (bswapdi2_brd,bswapdi2_xxbrd): Rename. Add ISA 3.1 support.
950 2020-08-07 Alan Modra <amodra@gmail.com>
953 * config/rs6000/predicates.md (current_file_function_operand): Don't
954 accept functions that differ in r2 usage.
956 2020-08-06 Hans-Peter Nilsson <hp@bitrange.com>
958 * config/mmix/mmix.md (MM): New mode_iterator.
959 ("mov<mode>"): New expander to expand for all MM-modes.
960 ("*movqi_expanded", "*movhi_expanded", "*movsi_expanded")
961 ("*movsf_expanded", "*movdf_expanded"): Rename from the
962 corresponding mov<M> named pattern. Add to the condition that
963 either operand must be a register_operand.
964 ("*movdi_expanded"): Similar, but also allow STCO in the condition.
966 2020-08-06 Richard Sandiford <richard.sandiford@arm.com>
969 * config/arm/arm.md (arm_stack_protect_test_insn): Zero out
971 * config/arm/thumb1.md (thumb1_stack_protect_test_insn): Likewise.
973 2020-08-06 Peter Bergner <bergner@linux.ibm.com>
976 * config/rs6000/mma.md (*movpxi): Add xxsetaccz generation.
977 Disable split for zero constant source operand.
978 (mma_xxsetaccz): Change to define_expand. Call gen_movpxi.
980 2020-08-06 Jakub Jelinek <jakub@redhat.com>
982 PR tree-optimization/96480
983 * tree-ssa-reassoc.c (suitable_cond_bb): Add TEST_SWAPPED_P argument.
984 If TEST_BB ends in cond and has one edge to *OTHER_BB and another
985 through an empty bb to that block too, if PHI args don't match, retry
986 them through the other path from TEST_BB.
987 (maybe_optimize_range_tests): Adjust callers. Handle such LAST_BB
988 through inversion of the condition.
990 2020-08-06 Jose E. Marchesi <jose.marchesi@oracle.com>
992 * config/bpf/bpf-helpers.h (KERNEL_HELPER): Define.
993 (KERNEL_VERSION): Remove.
994 * config/bpf/bpf-helpers.def: Delete.
995 * config/bpf/bpf.c (bpf_handle_fndecl_attribute): New function.
996 (bpf_attribute_table): Define.
997 (bpf_helper_names): Delete.
998 (bpf_helper_code): Likewise.
999 (enum bpf_builtins): Adjust to new helpers mechanism.
1000 (bpf_output_call): Likewise.
1001 (bpf_init_builtins): Likewise.
1002 (bpf_init_builtins): Likewise.
1003 * doc/extend.texi (BPF Function Attributes): New section.
1004 (BPF Kernel Helpers): Delete section.
1006 2020-08-06 Richard Biener <rguenther@suse.de>
1008 PR tree-optimization/96491
1009 * tree-ssa-sink.c (sink_common_stores_to_bb): Avoid
1010 sinking across abnormal edges.
1012 2020-08-06 Richard Biener <rguenther@suse.de>
1014 PR tree-optimization/96483
1015 * tree-ssa-pre.c (create_component_ref_by_pieces_1): Handle
1018 2020-08-06 Richard Biener <rguenther@suse.de>
1020 * graphite-isl-ast-to-gimple.c (ivs_params): Use hash_map instead
1022 (ivs_params_clear): Adjust.
1023 (gcc_expression_from_isl_ast_expr_id): Likewise.
1024 (graphite_create_new_loop): Likewise.
1025 (add_parameters_to_ivs_params): Likewise.
1027 2020-08-06 Roger Sayle <roger@nextmovesoftware.com>
1028 Uroš Bizjak <ubizjak@gmail.com>
1030 * config/i386/i386.md (MAXMIN_IMODE): No longer needed.
1031 (<maxmin><mode>3): Support SWI248 and general_operand for
1032 second operand, when TARGET_CMOVE.
1033 (<maxmin><mode>3_1 splitter): Optimize comparisons against
1034 0, 1 and -1 to use "test" instead of "cmp".
1035 (*<maxmin>di3_doubleword): Likewise, allow general_operand
1036 and enable on TARGET_CMOVE.
1037 (peephole2): Convert clearing a register after a flag setting
1038 instruction into an xor followed by the original flag setter.
1040 2020-08-06 Gerald Pfeifer <gerald@pfeifer.com>
1042 * ipa-fnsummary.c (INCLUDE_VECTOR): Define.
1043 Remove direct inclusion of <vector>.
1045 2020-08-06 Kewen Lin <linkw@gcc.gnu.org>
1047 * config/rs6000/rs6000.c (rs6000_adjust_vect_cost_per_loop): New
1049 (rs6000_finish_cost): Call rs6000_adjust_vect_cost_per_loop.
1050 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Add cost
1051 modeling for vector with length.
1052 (vect_rgroup_iv_might_wrap_p): New function, factored out from...
1053 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): ...this.
1054 Update function comment.
1055 * tree-vect-stmts.c (vect_gen_len): Update function comment.
1056 * tree-vectorizer.h (vect_rgroup_iv_might_wrap_p): New declare.
1058 2020-08-06 Kewen Lin <linkw@linux.ibm.com>
1060 * tree-vectorizer.c (try_vectorize_loop_1): Skip the epilogue loops
1063 2020-08-05 Marc Glisse <marc.glisse@inria.fr>
1065 PR tree-optimization/95906
1067 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
1068 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): New transformations.
1069 (op (c ? a : b)): Update to match the new transformations.
1071 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
1074 * config/aarch64/aarch64.md (stack_protect_test_<mode>): Set the
1075 CC register directly, instead of a GPR. Replace the original GPR
1076 destination with an extra scratch register. Zero out operand 3
1078 (stack_protect_test): Update accordingly.
1080 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
1082 * config/aarch64/aarch64.md (load_pair_sw_<SX:mode><SX2:mode>)
1083 (load_pair_dw_<DX:mode><DX2:mode>, load_pair_dw_tftf)
1084 (store_pair_sw_<SX:mode><SX2:mode>)
1085 (store_pair_dw_<DX:mode><DX2:mode>, store_pair_dw_tftf)
1086 (*load_pair_extendsidi2_aarch64)
1087 (*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand.
1088 * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>)
1089 (vec_store_pair<DREG:mode><DREG2:mode>, load_pair<VQ:mode><VQ2:mode>)
1090 (vec_store_pair<VQ:mode><VQ2:mode>): Likewise.
1092 2020-08-05 Richard Biener <rguenther@suse.de>
1094 * tree-ssa-loop-im.c (invariantness_dom_walker): Remove.
1095 (invariantness_dom_walker::before_dom_children): Move to ...
1096 (compute_invariantness): ... this function.
1097 (move_computations): Inline ...
1098 (tree_ssa_lim): ... here, share RPO order and avoid some
1100 (analyze_memory_references): Remove sorting of location
1101 lists, instead assert they are sorted already when checking.
1102 (prev_flag_edges): Remove.
1103 (execute_sm_if_changed): Pass down and adjust prev edge state.
1104 (execute_sm_exit): Likewise.
1105 (hoist_memory_references): Likewise. Commit edge insertions
1106 of each processed exit.
1107 (store_motion_loop): Do not commit edge insertions on all
1108 edges in the function.
1109 (tree_ssa_lim_initialize): Do not call alloc_aux_for_edges.
1110 (tree_ssa_lim_finalize): Do not call free_aux_for_edges.
1112 2020-08-05 Richard Biener <rguenther@suse.de>
1114 * genmatch.c (fail_label): New global.
1115 (expr::gen_transform): Branch to fail_label instead of
1116 returning. Fix indent of call argument checking.
1117 (dt_simplify::gen_1): Compute and emit fail_label, branch
1118 to it instead of returning early.
1120 2020-08-05 Jakub Jelinek <jakub@redhat.com>
1122 * omp-expand.c (expand_omp_for): Don't disallow combined non-rectangular
1125 2020-08-05 Jakub Jelinek <jakub@redhat.com>
1128 * omp-low.c (lower_omp_taskreg): Call lower_reduction_clauses even in
1131 2020-08-05 Jakub Jelinek <jakub@redhat.com>
1133 * omp-expand.c (expand_omp_for_init_counts): Remember
1134 first_inner_iterations, factor and n1o from the number of iterations
1136 (expand_omp_for_init_vars): Use more efficient logical iteration number
1137 to actual iterator values computation even for non-rectangular loops
1138 where number of loop iterations could not be computed at compile time.
1140 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1142 * config/rs6000/altivec.h (vec_blendv, vec_permx): Add define.
1143 * config/rs6000/altivec.md (UNSPEC_XXBLEND, UNSPEC_XXPERMX.): New
1145 (VM3): New define_mode.
1146 (VM3_char): New define_attr.
1147 (xxblend_<mode> mode VM3): New define_insn.
1148 (xxpermx): New define_expand.
1149 (xxpermx_inst): New define_insn.
1150 * config/rs6000/rs6000-builtin.def (VXXBLEND_V16QI, VXXBLEND_V8HI,
1151 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): New
1152 BU_P10V_3 definitions.
1153 (XXBLEND): New BU_P10_OVERLOAD_3 definition.
1154 (XXPERMX): New BU_P10_OVERLOAD_4 definition.
1155 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1156 (P10_BUILTIN_VXXPERMX): Add if statement.
1157 * config/rs6000/rs6000-call.c (P10_BUILTIN_VXXBLEND_V16QI,
1158 P10_BUILTIN_VXXBLEND_V8HI, P10_BUILTIN_VXXBLEND_V4SI,
1159 P10_BUILTIN_VXXBLEND_V2DI, P10_BUILTIN_VXXBLEND_V4SF,
1160 P10_BUILTIN_VXXBLEND_V2DF, P10_BUILTIN_VXXPERMX): Define
1161 overloaded arguments.
1162 (rs6000_expand_quaternop_builtin): Add if case for CODE_FOR_xxpermx.
1163 (builtin_quaternary_function_type): Add v16uqi_type and xxpermx_type
1164 variables, add case statement for P10_BUILTIN_VXXPERMX.
1165 (builtin_function_type): Add case statements for
1166 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
1167 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI.
1168 * doc/extend.texi: Add documentation for vec_blendv and vec_permx.
1170 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1172 * config/rs6000/altivec.h (vec_splati, vec_splatid, vec_splati_ins):
1174 * config/rs6000/altivec.md (UNSPEC_XXSPLTIW, UNSPEC_XXSPLTID,
1175 UNSPEC_XXSPLTI32DX): New.
1176 (vxxspltiw_v4si, vxxspltiw_v4sf_inst, vxxspltidp_v2df_inst,
1177 vxxsplti32dx_v4si_inst, vxxsplti32dx_v4sf_inst): New define_insn.
1178 (vxxspltiw_v4sf, vxxspltidp_v2df, vxxsplti32dx_v4si,
1179 vxxsplti32dx_v4sf.): New define_expands.
1180 * config/rs6000/predicates.md (u1bit_cint_operand,
1181 s32bit_cint_operand, c32bit_cint_operand): New predicates.
1182 * config/rs6000/rs6000-builtin.def (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF,
1183 VXXSPLTID): New definitions.
1184 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF): New BU_P10V_3
1186 (XXSPLTIW, XXSPLTID): New definitions.
1187 (XXSPLTI32DX): Add definitions.
1188 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XXSPLTIW,
1189 P10_BUILTIN_VEC_XXSPLTID, P10_BUILTIN_VEC_XXSPLTI32DX):
1191 * config/rs6000/rs6000-protos.h (rs6000_constF32toI32): New extern
1193 * config/rs6000/rs6000.c (rs6000_constF32toI32): New function.
1194 * doc/extend.texi: Add documentation for vec_splati,
1195 vec_splatid, and vec_splati_ins.
1197 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1199 * config/rs6000/altivec.h (vec_sldb, vec_srdb): New defines.
1200 * config/rs6000/altivec.md (UNSPEC_SLDB, UNSPEC_SRDB): New.
1201 (SLDB_lr): New attribute.
1202 (VSHIFT_DBL_LR): New iterator.
1203 (vs<SLDB_lr>db_<mode>): New define_insn.
1204 * config/rs6000/rs6000-builtin.def (VSLDB_V16QI, VSLDB_V8HI,
1205 VSLDB_V4SI, VSLDB_V2DI, VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI,
1206 VSRDB_V2DI): New BU_P10V_3 definitions.
1207 (SLDB, SRDB): New BU_P10_OVERLOAD_3 definitions.
1208 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_SLDB,
1209 P10_BUILTIN_VEC_SRDB): New definitions.
1210 (rs6000_expand_ternop_builtin) [CODE_FOR_vsldb_v16qi,
1211 CODE_FOR_vsldb_v8hi, CODE_FOR_vsldb_v4si, CODE_FOR_vsldb_v2di,
1212 CODE_FOR_vsrdb_v16qi, CODE_FOR_vsrdb_v8hi, CODE_FOR_vsrdb_v4si,
1213 CODE_FOR_vsrdb_v2di]: Add clauses.
1214 * doc/extend.texi: Add description for vec_sldb and vec_srdb.
1216 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1218 * config/rs6000/altivec.h: Add define for vec_replace_elt and
1219 vec_replace_unaligned.
1220 * config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New
1222 (REPLACE_ELT): New mode iterator.
1223 (REPLACE_ELT_char, REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes.
1224 (vreplace_un_<mode>, vreplace_elt_<mode>_inst): New.
1225 * config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI,
1226 VREPLACE_ELT_UV4SI, VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI,
1227 VREPLACE_ELT_V2DF, VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI,
1228 VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
1229 VREPLACE_UN_V2DF, (REPLACE_ELT, REPLACE_UN, VREPLACE_ELT_V2DI): New builtin
1231 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_REPLACE_ELT,
1232 P10_BUILTIN_VEC_REPLACE_UN): New builtin argument definitions.
1233 (rs6000_expand_quaternop_builtin): Add 3rd argument checks for
1234 CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf,
1235 CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf.
1236 (builtin_function_type) [P10_BUILTIN_VREPLACE_ELT_UV4SI,
1237 P10_BUILTIN_VREPLACE_ELT_UV2DI, P10_BUILTIN_VREPLACE_UN_UV4SI,
1238 P10_BUILTIN_VREPLACE_UN_UV2DI]: New cases.
1239 * doc/extend.texi: Add description for vec_replace_elt and
1240 vec_replace_unaligned builtins.
1242 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1244 * config/rs6000/altivec.h (vec_insertl, vec_inserth): New defines.
1245 * config/rs6000/rs6000-builtin.def (VINSERTGPRBL, VINSERTGPRHL,
1246 VINSERTGPRWL, VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL,
1247 VINSERTGPRBR, VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR,
1248 VINSERTVPRHR, VINSERTVPRWR): New builtins.
1249 (INSERTL, INSERTH): New builtins.
1250 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_INSERTL,
1251 P10_BUILTIN_VEC_INSERTH): New overloaded definitions.
1252 (P10_BUILTIN_VINSERTGPRBL, P10_BUILTIN_VINSERTGPRHL,
1253 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
1254 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
1255 P10_BUILTIN_VINSERTVPRWL): Add case entries.
1256 * config/rs6000/vsx.md (define_c_enum): Add UNSPEC_INSERTL,
1258 (define_expand): Add vinsertvl_<mode>, vinsertvr_<mode>,
1259 vinsertgl_<mode>, vinsertgr_<mode>, mode is VI2.
1260 (define_ins): vinsertvl_internal_<mode>, vinsertvr_internal_<mode>,
1261 vinsertgl_internal_<mode>, vinsertgr_internal_<mode>, mode VEC_I.
1262 * doc/extend.texi: Add documentation for vec_insertl, vec_inserth.
1264 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1266 * config/rs6000/altivec.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
1267 (vextractl<mode>, vextractr<mode>)
1268 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
1270 * config/rs6000/vsx.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
1271 (vextractl<mode>, vextractr<mode>)
1272 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
1274 * doc/extend.texi: Update documentation for vec_extractl.
1275 Replace builtin name vec_extractr with vec_extracth. Update
1276 description of vec_extracth.
1278 2020-08-04 Jim Wilson <jimw@sifive.com>
1280 * doc/invoke.texi (AArch64 Options): Delete duplicate
1281 -mstack-protector-guard docs.
1283 2020-08-04 Roger Sayle <roger@nextmovesoftware.com>
1285 * config/nvptx/nvptx.md (smulhi3_highpart, smulsi3_highpart)
1286 (umulhi3_highpart, umulsi3_highpart): New instructions.
1288 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
1290 * config/gcn/gcn-run.c (R_AMDGPU_NONE): Delete.
1291 (R_AMDGPU_ABS32_LO): Delete.
1292 (R_AMDGPU_ABS32_HI): Delete.
1293 (R_AMDGPU_ABS64): Delete.
1294 (R_AMDGPU_REL32): Delete.
1295 (R_AMDGPU_REL64): Delete.
1296 (R_AMDGPU_ABS32): Delete.
1297 (R_AMDGPU_GOTPCREL): Delete.
1298 (R_AMDGPU_GOTPCREL32_LO): Delete.
1299 (R_AMDGPU_GOTPCREL32_HI): Delete.
1300 (R_AMDGPU_REL32_LO): Delete.
1301 (R_AMDGPU_REL32_HI): Delete.
1303 (R_AMDGPU_RELATIVE64): Delete.
1305 2020-08-04 Omar Tahir <omar.tahir@arm.com>
1307 * config/arm/arm-cpus.in (armv8.1-m.main): Tune for Cortex-M55.
1309 2020-08-04 Hu Jiangping <hujiangping@cn.fujitsu.com>
1311 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Delete
1312 redundant extra_cost variable.
1314 2020-08-04 Zhiheng Xie <xiezhiheng@huawei.com>
1316 * config/aarch64/aarch64-builtins.c (aarch64_call_properties):
1317 Use FLOAT_MODE_P macro instead of enumerating all floating-point
1318 modes and add global flag FLAG_AUTO_FP.
1320 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1322 * doc/extend.texi (symver): Add @cindex for symver function attribute.
1324 2020-08-04 Marc Glisse <marc.glisse@inria.fr>
1326 PR tree-optimization/95433
1327 * match.pd (X * C1 == C2): New transformation.
1329 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1331 * gimple-ssa-sprintf.c (get_int_range): Adjust for irange API.
1332 (format_integer): Same.
1333 (handle_printf_call): Same.
1335 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
1337 * config/gcn/gcn.md ("<expander>ti3"): New.
1339 2020-08-04 Richard Biener <rguenther@suse.de>
1341 PR tree-optimization/88240
1342 * tree-ssa-sccvn.h (vn_reference_s::punned): New flag.
1343 * tree-ssa-sccvn.c (vn_reference_insert): Initialize punned.
1344 (vn_reference_insert_pieces): Likewise.
1345 (visit_reference_op_call): Likewise.
1346 (visit_reference_op_load): Track whether a ref was punned.
1347 * tree-ssa-pre.c (do_hoist_insertion): Refuse to perform hoist
1348 insertion on punned floating point loads.
1350 2020-08-04 Sudakshina Das <sudi.das@arm.com>
1352 * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case
1354 (aarch64_gen_load_pair): Likewise.
1355 (aarch64_copy_one_block_and_progress_pointers): Handle 256 bit copy.
1356 (aarch64_expand_cpymem): Expand copy_limit to 256bits where
1359 2020-08-04 Andrea Corallo <andrea.corallo@arm.com>
1361 * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing
1363 * doc/sourcebuild.texi (aarch64_fjcvtzs_hw) Document new
1364 target supports option.
1366 2020-08-04 Tom de Vries <tdevries@suse.de>
1369 * config/nvptx/nvptx.c (nvptx_gen_shuffle): Handle V2SI/V2DI.
1371 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1374 * tree-vect-generic.c (expand_vector_conversion): Replace .VEC_CONVERT
1375 call with GIMPLE_NOP if there is no lhs.
1377 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1380 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Add IS_DEBUG
1381 argument. Return false instead of gcc_unreachable if it is true and
1382 get_addr_base_and_unit_offset returns NULL.
1383 (fold_stmt_1) <case GIMPLE_DEBUG>: Adjust caller.
1385 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1387 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional):
1388 Call is_gimple_min_invariant dropped from previous patch.
1390 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1392 * omp-expand.c (expand_omp_for_init_counts): For triangular loops
1393 compute number of iterations at runtime more efficiently.
1394 (expand_omp_for_init_vars): Adjust immediate dominators.
1395 (extract_omp_for_update_vars): Likewise.
1397 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1399 * vr-values.c (simplify_using_ranges::two_valued_val_range_p):
1402 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1404 * vr-values.c (simplify_conversion_using_ranges): Convert to irange API.
1406 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1408 * vr-values.c (test_for_singularity): Use irange API.
1409 (simplify_using_ranges::simplify_cond_using_ranges_1): Do not
1410 special case VR_RANGE.
1412 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1414 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional): Adjust
1417 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1419 * vr-values.c (simplify_using_ranges::op_with_boolean_value_range_p): Adjust
1422 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1424 * tree-ssanames.c (get_range_info): Use irange instead of value_range.
1425 * tree-ssanames.h (get_range_info): Same.
1427 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1429 * fold-const.c (expr_not_equal_to): Adjust for irange API.
1431 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1433 * builtins.c (determine_block_size): Remove ad-hoc range canonicalization.
1435 2020-08-04 Xionghu Luo <luoxhu@linux.ibm.com>
1437 PR rtl-optimization/71309
1438 * dse.c (find_shift_sequence): Use subreg of shifted from high part
1439 register to avoid loading from address.
1441 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
1443 * doc/cpp.texi (Variadic Macros): Use the exact ... token in
1446 2020-08-03 Nathan Sidwell <nathan@acm.org>
1448 * doc/invoke.texi: Refer to c++20
1450 2020-08-03 Julian Brown <julian@codesourcery.com>
1451 Thomas Schwinge <thomas@codesourcery.com>
1453 * gimplify.c (gimplify_omp_target_update): Allow GOMP_MAP_TO_PSET
1454 without a preceding data-movement mapping.
1456 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
1458 * config/darwin.h (ASM_DECLARE_FUNCTION_NAME): UNDEF before
1460 (DEF_MIN_OSX_VERSION): Only define if there's no existing
1463 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
1465 * config/darwin.c (IN_TARGET_CODE): Remove.
1466 (darwin_mergeable_constant_section): Handle poly-int machine modes.
1467 (machopic_select_rtx_section): Likewise.
1469 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
1471 PR tree-optimization/96430
1472 * range-op.cc (operator_tests): Do not shift by 31 on targets with
1473 integer's smaller than 32 bits.
1475 2020-08-03 Martin Jambor <mjambor@suse.cz>
1477 * hsa-brig-format.h: Moved to brig/brigfrontend.
1478 * hsa-brig.c: Removed.
1479 * hsa-builtins.def: Likewise.
1480 * hsa-common.c: Likewise.
1481 * hsa-common.h: Likewise.
1482 * hsa-dump.c: Likewise.
1483 * hsa-gen.c: Likewise.
1484 * hsa-regalloc.c: Likewise.
1485 * ipa-hsa.c: Likewise.
1486 * omp-grid.c: Likewise.
1487 * omp-grid.h: Likewise.
1488 * Makefile.in (BUILTINS_DEF): Remove hsa-builtins.def.
1489 (OBJS): Remove hsa-common.o, hsa-gen.o, hsa-regalloc.o, hsa-brig.o,
1490 hsa-dump.o, ipa-hsa.c and omp-grid.o.
1491 (GTFILES): Removed hsa-common.c and omp-expand.c.
1492 * builtins.def: Remove processing of hsa-builtins.def.
1493 (DEF_HSA_BUILTIN): Remove.
1494 * common.opt (flag_disable_hsa): Remove.
1496 * config.in (ENABLE_HSA): Removed.
1497 * configure.ac: Removed handling configuration for hsa offloading.
1498 (ENABLE_HSA): Removed.
1499 * configure: Regenerated.
1500 * doc/install.texi (--enable-offload-targets): Remove hsa from the
1502 (--with-hsa-runtime): Reword to reference any HSA run-time, not
1503 specifically HSA offloading.
1504 * doc/invoke.texi (Option Summary): Remove -Whsa.
1505 (Warning Options): Likewise.
1506 (Optimize Options): Remove hsa-gen-debug-stores.
1507 * doc/passes.texi (Regular IPA passes): Remove section on IPA HSA
1509 * gimple-low.c (lower_stmt): Remove GIMPLE_OMP_GRID_BODY case.
1510 * gimple-pretty-print.c (dump_gimple_omp_for): Likewise.
1511 (dump_gimple_omp_block): Likewise.
1512 (pp_gimple_stmt_1): Likewise.
1513 * gimple-walk.c (walk_gimple_stmt): Likewise.
1514 * gimple.c (gimple_build_omp_grid_body): Removed function.
1515 (gimple_copy): Remove GIMPLE_OMP_GRID_BODY case.
1516 * gimple.def (GIMPLE_OMP_GRID_BODY): Removed.
1517 * gimple.h (gf_mask): Removed GF_OMP_PARALLEL_GRID_PHONY,
1518 OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY,
1519 GF_OMP_FOR_GRID_INTRA_GROUP, GF_OMP_FOR_GRID_GROUP_ITER and
1520 GF_OMP_TEAMS_GRID_PHONY. Renumbered GF_OMP_FOR_KIND_SIMD and
1522 (gimple_build_omp_grid_body): Removed declaration.
1523 (gimple_has_substatements): Remove GIMPLE_OMP_GRID_BODY case.
1524 (gimple_omp_for_grid_phony): Removed.
1525 (gimple_omp_for_set_grid_phony): Likewise.
1526 (gimple_omp_for_grid_intra_group): Likewise.
1527 (gimple_omp_for_grid_intra_group): Likewise.
1528 (gimple_omp_for_grid_group_iter): Likewise.
1529 (gimple_omp_for_set_grid_group_iter): Likewise.
1530 (gimple_omp_parallel_grid_phony): Likewise.
1531 (gimple_omp_parallel_set_grid_phony): Likewise.
1532 (gimple_omp_teams_grid_phony): Likewise.
1533 (gimple_omp_teams_set_grid_phony): Likewise.
1534 (CASE_GIMPLE_OMP): Remove GIMPLE_OMP_GRID_BODY case.
1535 * lto-section-in.c (lto_section_name): Removed hsa.
1536 * lto-streamer.h (lto_section_type): Removed LTO_section_ipa_hsa.
1537 * lto-wrapper.c (compile_images_for_offload_targets): Remove special
1539 * omp-expand.c: Do not include hsa-common.h and gt-omp-expand.h.
1540 (parallel_needs_hsa_kernel_p): Removed.
1541 (grid_launch_attributes_trees): Likewise.
1542 (grid_launch_attributes_trees): Likewise.
1543 (grid_create_kernel_launch_attr_types): Likewise.
1544 (grid_insert_store_range_dim): Likewise.
1545 (grid_get_kernel_launch_attributes): Likewise.
1546 (get_target_arguments): Remove code passing HSA grid sizes.
1547 (grid_expand_omp_for_loop): Remove.
1548 (grid_arg_decl_map): Likewise.
1549 (grid_remap_kernel_arg_accesses): Likewise.
1550 (grid_expand_target_grid_body): Likewise.
1551 (expand_omp): Remove call to grid_expand_target_grid_body.
1552 (omp_make_gimple_edges): Remove GIMPLE_OMP_GRID_BODY case.
1553 * omp-general.c: Do not include hsa-common.h.
1554 (omp_maybe_offloaded): Do not check for HSA offloading.
1555 (omp_context_selector_matches): Likewise.
1556 * omp-low.c: Do not include hsa-common.h and omp-grid.h.
1557 (build_outer_var_ref): Remove handling of GIMPLE_OMP_GRID_BODY.
1558 (scan_sharing_clauses): Remove handling of OMP_CLAUSE__GRIDDIM_.
1559 (scan_omp_parallel): Remove handling of the phoney variant.
1560 (check_omp_nesting_restrictions): Remove handling of
1561 GIMPLE_OMP_GRID_BODY and GF_OMP_FOR_KIND_GRID_LOOP.
1562 (scan_omp_1_stmt): Remove handling of GIMPLE_OMP_GRID_BODY.
1563 (lower_omp_for_lastprivate): Remove handling of gridified loops.
1564 (lower_omp_for): Remove phony loop handling.
1565 (lower_omp_taskreg): Remove phony construct handling.
1566 (lower_omp_teams): Likewise.
1567 (lower_omp_grid_body): Removed.
1568 (lower_omp_1): Remove GIMPLE_OMP_GRID_BODY case.
1569 (execute_lower_omp): Do not call omp_grid_gridify_all_targets.
1570 * opts.c (common_handle_option): Do not handle hsa when processing
1572 * params.opt (hsa-gen-debug-stores): Remove.
1573 * passes.def: Remove pass_ipa_hsa and pass_gen_hsail.
1574 * timevar.def: Remove TV_IPA_HSA.
1575 * toplev.c: Do not include hsa-common.h.
1576 (compile_file): Do not call hsa_output_brig.
1577 * tree-core.h (enum omp_clause_code): Remove OMP_CLAUSE__GRIDDIM_.
1578 (tree_omp_clause): Remove union field dimension.
1579 * tree-nested.c (convert_nonlocal_omp_clauses): Remove the
1580 OMP_CLAUSE__GRIDDIM_ case.
1581 (convert_local_omp_clauses): Likewise.
1582 * tree-pass.h (make_pass_gen_hsail): Remove declaration.
1583 (make_pass_ipa_hsa): Likewise.
1584 * tree-pretty-print.c (dump_omp_clause): Remove GIMPLE_OMP_GRID_BODY
1586 * tree.c (omp_clause_num_ops): Remove the element corresponding to
1587 OMP_CLAUSE__GRIDDIM_.
1588 (omp_clause_code_name): Likewise.
1589 (walk_tree_1): Remove GIMPLE_OMP_GRID_BODY case.
1590 * tree.h (OMP_CLAUSE__GRIDDIM__DIMENSION): Remove.
1591 (OMP_CLAUSE__GRIDDIM__SIZE): Likewise.
1592 (OMP_CLAUSE__GRIDDIM__GROUP): Likewise.
1594 2020-08-03 Bu Le <bule1@huawei.com>
1596 * config/aarch64/aarch64-sve.md (sub<mode>3): Add support for
1599 2020-08-03 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1601 * config/msp430/msp430.h (ASM_SPEC): Don't pass on "-md" option.
1603 2020-08-03 Yunde Zhong <zhongyunde@huawei.com>
1605 PR rtl-optimization/95696
1606 * regrename.c (regrename_analyze): New param include_all_block_p
1607 with default value TRUE. If set to false, avoid disrupting SMS
1609 * regrename.h (regrename_analyze): Adjust prototype.
1611 2020-08-03 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
1613 * doc/tm.texi.in (VECTOR_STORE_FLAG_VALUE): Fix a typo.
1614 * doc/tm.texi: Regenerate.
1616 2020-08-03 Richard Sandiford <richard.sandiford@arm.com>
1618 * doc/invoke.texi: Add missing comma after octeontx2f95mm entry.
1620 2020-08-03 Qian jianhua <qianjh@cn.fujitsu.com>
1622 * config/aarch64/aarch64-cores.def (a64fx): New core.
1623 * config/aarch64/aarch64-tune.md: Regenerated.
1624 * config/aarch64/aarch64.c (a64fx_prefetch_tune, a64fx_tunings): New.
1625 * doc/invoke.texi: Add a64fx to the list.
1627 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
1629 PR rtl-optimization/61494
1630 * simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't
1631 simplify x - 0.0 with -fsignaling-nans.
1633 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
1635 * genmatch.c (decision_tree::gen): Emit stub functions for
1636 tree code operand counts that have no simplifications.
1637 (main): Correct comment typo.
1639 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
1641 * gimple-ssa-sprintf.c: Fix typos in comments.
1643 2020-08-03 Tamar Christina <tamar.christina@arm.com>
1645 * config/aarch64/driver-aarch64.c (readline): Check return value fgets.
1647 2020-08-03 Richard Biener <rguenther@suse.de>
1649 * doc/match-and-simplify.texi: Amend accordingly.
1651 2020-08-03 Richard Biener <rguenther@suse.de>
1653 * genmatch.c (parser::gimple): New.
1654 (parser::parser): Initialize gimple flag member.
1655 (parser::parse_expr): Error on ! operator modifier when
1656 not targeting GIMPLE.
1657 (main): Pass down gimple flag to parser ctor.
1659 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
1661 * Makefile.in (GTFILES): Move value-range.h up.
1662 * gengtype-lex.l: Set yylval to handle GTY markers on templates.
1663 * ipa-cp.c (initialize_node_lattices): Call value_range
1665 (ipcp_propagate_stage): Use in-place new so value_range construct
1667 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use std
1668 vec instead of GCC's vec<>.
1669 (evaluate_properties_for_edge): Adjust for std vec.
1670 (ipa_fn_summary_t::duplicate): Same.
1671 (estimate_ipcp_clone_size_and_time): Same.
1672 * ipa-prop.c (ipa_get_value_range): Use in-place new for
1674 * ipa-prop.h (struct GTY): Remove class keyword for m_vr.
1675 * range-op.cc (empty_range_check): Rename to...
1676 (empty_range_varying): ...this and adjust for varying.
1677 (undefined_shift_range_check): Adjust for irange.
1678 (range_operator::wi_fold): Same.
1679 (range_operator::fold_range): Adjust for irange. Special case
1680 single pairs for performance.
1681 (range_operator::op1_range): Adjust for irange.
1682 (range_operator::op2_range): Same.
1683 (value_range_from_overflowed_bounds): Same.
1684 (value_range_with_overflow): Same.
1685 (create_possibly_reversed_range): Same.
1687 (range_false): Same.
1688 (range_true_and_false): Same.
1689 (get_bool_state): Adjust for irange and tweak for performance.
1690 (operator_equal::fold_range): Adjust for irange.
1691 (operator_equal::op1_range): Same.
1692 (operator_equal::op2_range): Same.
1693 (operator_not_equal::fold_range): Same.
1694 (operator_not_equal::op1_range): Same.
1695 (operator_not_equal::op2_range): Same.
1700 (operator_lt::fold_range): Same.
1701 (operator_lt::op1_range): Same.
1702 (operator_lt::op2_range): Same.
1703 (operator_le::fold_range): Same.
1704 (operator_le::op1_range): Same.
1705 (operator_le::op2_range): Same.
1706 (operator_gt::fold_range): Same.
1707 (operator_gt::op1_range): Same.
1708 (operator_gt::op2_range): Same.
1709 (operator_ge::fold_range): Same.
1710 (operator_ge::op1_range): Same.
1711 (operator_ge::op2_range): Same.
1712 (operator_plus::wi_fold): Same.
1713 (operator_plus::op1_range): Same.
1714 (operator_plus::op2_range): Same.
1715 (operator_minus::wi_fold): Same.
1716 (operator_minus::op1_range): Same.
1717 (operator_minus::op2_range): Same.
1718 (operator_min::wi_fold): Same.
1719 (operator_max::wi_fold): Same.
1720 (cross_product_operator::wi_cross_product): Same.
1721 (operator_mult::op1_range): New.
1722 (operator_mult::op2_range): New.
1723 (operator_mult::wi_fold): Adjust for irange.
1724 (operator_div::wi_fold): Same.
1725 (operator_exact_divide::op1_range): Same.
1726 (operator_lshift::fold_range): Same.
1727 (operator_lshift::wi_fold): Same.
1728 (operator_lshift::op1_range): New.
1729 (operator_rshift::op1_range): New.
1730 (operator_rshift::fold_range): Adjust for irange.
1731 (operator_rshift::wi_fold): Same.
1732 (operator_cast::truncating_cast_p): Abstract out from
1733 operator_cast::fold_range.
1734 (operator_cast::fold_range): Adjust for irange and tweak for
1736 (operator_cast::inside_domain_p): Abstract out from fold_range.
1737 (operator_cast::fold_pair): Same.
1738 (operator_cast::op1_range): Use abstracted methods above. Adjust
1739 for irange and tweak for performance.
1740 (operator_logical_and::fold_range): Adjust for irange.
1741 (operator_logical_and::op1_range): Same.
1742 (operator_logical_and::op2_range): Same.
1743 (unsigned_singleton_p): New.
1744 (operator_bitwise_and::remove_impossible_ranges): New.
1745 (operator_bitwise_and::fold_range): New.
1746 (wi_optimize_and_or): Adjust for irange.
1747 (operator_bitwise_and::wi_fold): Same.
1748 (set_nonzero_range_from_mask): New.
1749 (operator_bitwise_and::simple_op1_range_solver): New.
1750 (operator_bitwise_and::op1_range): Adjust for irange.
1751 (operator_bitwise_and::op2_range): Same.
1752 (operator_logical_or::fold_range): Same.
1753 (operator_logical_or::op1_range): Same.
1754 (operator_logical_or::op2_range): Same.
1755 (operator_bitwise_or::wi_fold): Same.
1756 (operator_bitwise_or::op1_range): Same.
1757 (operator_bitwise_or::op2_range): Same.
1758 (operator_bitwise_xor::wi_fold): Same.
1759 (operator_bitwise_xor::op1_range): New.
1760 (operator_bitwise_xor::op2_range): New.
1761 (operator_trunc_mod::wi_fold): Adjust for irange.
1762 (operator_logical_not::fold_range): Same.
1763 (operator_logical_not::op1_range): Same.
1764 (operator_bitwise_not::fold_range): Same.
1765 (operator_bitwise_not::op1_range): Same.
1766 (operator_cst::fold_range): Same.
1767 (operator_identity::fold_range): Same.
1768 (operator_identity::op1_range): Same.
1769 (class operator_unknown): New.
1770 (operator_unknown::fold_range): New.
1771 (class operator_abs): Adjust for irange.
1772 (operator_abs::wi_fold): Same.
1773 (operator_abs::op1_range): Same.
1774 (operator_absu::wi_fold): Same.
1775 (class operator_negate): Same.
1776 (operator_negate::fold_range): Same.
1777 (operator_negate::op1_range): Same.
1778 (operator_addr_expr::fold_range): Same.
1779 (operator_addr_expr::op1_range): Same.
1780 (pointer_plus_operator::wi_fold): Same.
1781 (pointer_min_max_operator::wi_fold): Same.
1782 (pointer_and_operator::wi_fold): Same.
1783 (pointer_or_operator::op1_range): New.
1784 (pointer_or_operator::op2_range): New.
1785 (pointer_or_operator::wi_fold): Adjust for irange.
1786 (integral_table::integral_table): Add entries for IMAGPART_EXPR
1787 and POINTER_DIFF_EXPR.
1788 (range_cast): Adjust for irange.
1789 (build_range3): New.
1790 (range3_tests): New.
1791 (widest_irange_tests): New.
1792 (multi_precision_range_tests): New.
1793 (operator_tests): New.
1795 * range-op.h (class range_operator): Adjust for irange.
1797 * tree-vrp.c (range_fold_binary_symbolics_p): Adjust for irange and
1798 tweak for performance.
1799 (range_fold_binary_expr): Same.
1800 (masked_increment): Change to extern.
1801 * tree-vrp.h (masked_increment): New.
1802 * tree.c (cache_wide_int_in_type_cache): New function abstracted
1803 out from wide_int_to_tree_1.
1804 (wide_int_to_tree_1): Cache 0, 1, and MAX for pointers.
1805 * value-range-equiv.cc (value_range_equiv::deep_copy): Use kind
1807 (value_range_equiv::move): Same.
1808 (value_range_equiv::check): Adjust for irange.
1809 (value_range_equiv::intersect): Same.
1810 (value_range_equiv::union_): Same.
1811 (value_range_equiv::dump): Same.
1812 * value-range.cc (irange::operator=): Same.
1813 (irange::maybe_anti_range): New.
1814 (irange::copy_legacy_range): New.
1815 (irange::set_undefined): Adjust for irange.
1816 (irange::swap_out_of_order_endpoints): Abstract out from set().
1817 (irange::set_varying): Adjust for irange.
1818 (irange::irange_set): New.
1819 (irange::irange_set_anti_range): New.
1820 (irange::set): Adjust for irange.
1821 (value_range::set_nonzero): Move to header file.
1822 (value_range::set_zero): Move to header file.
1823 (value_range::check): Rename to...
1824 (irange::verify_range): ...this.
1825 (value_range::num_pairs): Rename to...
1826 (irange::legacy_num_pairs): ...this, and adjust for irange.
1827 (value_range::lower_bound): Rename to...
1828 (irange::legacy_lower_bound): ...this, and adjust for irange.
1829 (value_range::upper_bound): Rename to...
1830 (irange::legacy_upper_bound): ...this, and adjust for irange.
1831 (value_range::equal_p): Rename to...
1832 (irange::legacy_equal_p): ...this.
1833 (value_range::operator==): Move to header file.
1834 (irange::equal_p): New.
1835 (irange::symbolic_p): Adjust for irange.
1836 (irange::constant_p): Same.
1837 (irange::singleton_p): Same.
1838 (irange::value_inside_range): Same.
1839 (irange::may_contain_p): Same.
1840 (irange::contains_p): Same.
1841 (irange::normalize_addresses): Same.
1842 (irange::normalize_symbolics): Same.
1843 (irange::legacy_intersect): Same.
1844 (irange::legacy_union): Same.
1845 (irange::union_): Same.
1846 (irange::intersect): Same.
1847 (irange::irange_union): New.
1848 (irange::irange_intersect): New.
1849 (subtract_one): New.
1850 (irange::invert): Adjust for irange.
1851 (dump_bound_with_infinite_markers): New.
1852 (irange::dump): Adjust for irange.
1853 (debug): Add irange versions.
1854 (range_has_numeric_bounds_p): Adjust for irange.
1855 (vrp_val_max): Move to header file.
1856 (vrp_val_min): Move to header file.
1857 (DEFINE_INT_RANGE_GC_STUBS): New.
1858 (DEFINE_INT_RANGE_INSTANCE): New.
1859 * value-range.h (class irange): New.
1860 (class int_range): New.
1861 (class value_range): Rename to a instantiation of int_range.
1862 (irange::legacy_mode_p): New.
1863 (value_range::value_range): Remove.
1864 (irange::kind): New.
1865 (irange::num_pairs): Adjust for irange.
1866 (irange::type): Adjust for irange.
1867 (irange::tree_lower_bound): New.
1868 (irange::tree_upper_bound): New.
1869 (irange::type): Adjust for irange.
1870 (irange::min): Same.
1871 (irange::max): Same.
1872 (irange::varying_p): Same.
1873 (irange::undefined_p): Same.
1874 (irange::zero_p): Same.
1875 (irange::nonzero_p): Same.
1876 (irange::supports_type_p): Same.
1877 (range_includes_zero_p): Same.
1880 (irange::irange): New.
1881 (int_range::int_range): New.
1882 (int_range::operator=): New.
1883 (irange::set): Moved from value-range.cc and adjusted for irange.
1884 (irange::set_undefined): Same.
1885 (irange::set_varying): Same.
1886 (irange::operator==): Same.
1887 (irange::lower_bound): Same.
1888 (irange::upper_bound): Same.
1889 (irange::union_): Same.
1890 (irange::intersect): Same.
1891 (irange::set_nonzero): Same.
1892 (irange::set_zero): Same.
1893 (irange::normalize_min_max): New.
1894 (vrp_val_max): Move from value-range.cc.
1895 (vrp_val_min): Same.
1896 * vr-values.c (vr_values::get_lattice_entry): Call value_range
1899 2020-08-02 Sergei Trofimovich <siarheit@google.com>
1902 * var-tracking.c (vt_find_locations): Fully initialize
1903 all 'in_pending' bits.
1905 2020-08-01 Jan Hubicka <jh@suse.cz>
1907 * symtab.c (symtab_node::verify_base): Verify order.
1908 (symtab_node::verify_symtab_nodes): Verify order.
1910 2020-08-01 Jan Hubicka <jh@suse.cz>
1912 * predict.c (estimate_bb_frequencies): Cap recursive calls by 90%.
1914 2020-08-01 Jojo R <jiejie_rong@c-sky.com>
1916 * config/csky/csky_opts.h (float_abi_type): New.
1917 * config/csky/csky.h (TARGET_SOFT_FLOAT): New.
1918 (TARGET_HARD_FLOAT): New.
1919 (TARGET_HARD_FLOAT_ABI): New.
1920 (OPTION_DEFAULT_SPECS): Use mfloat-abi.
1921 * config/csky/csky.opt (mfloat-abi): New.
1922 * doc/invoke.texi (C-SKY Options): Document -mfloat-abi=.
1924 2020-08-01 Cooper Qu <cooper.qu@linux.alibaba.com>
1926 * config/csky/t-csky-linux: Delete big endian CPUs' multilib.
1928 2020-07-31 Roger Sayle <roger@nextmovesoftware.com>
1929 Tom de Vries <tdevries@suse.de>
1932 * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement.
1933 (TARGET_TRULY_NOOP_TRUNCATION): Define.
1935 2020-07-31 Richard Biener <rguenther@suse.de>
1938 * langhooks-def.h (lhd_finalize_early_debug): Declare.
1939 (LANG_HOOKS_FINALIZE_EARLY_DEBUG): Define.
1940 (LANG_HOOKS_INITIALIZER): Amend.
1941 * langhooks.c: Include cgraph.h and debug.h.
1942 (lhd_finalize_early_debug): Default implementation from
1943 former code in finalize_compilation_unit.
1944 * langhooks.h (lang_hooks::finalize_early_debug): Add.
1945 * cgraphunit.c (symbol_table::finalize_compilation_unit):
1946 Call the finalize_early_debug langhook.
1948 2020-07-31 Richard Biener <rguenther@suse.de>
1950 * genmatch.c (expr::force_leaf): Add and initialize.
1951 (expr::gen_transform): Honor force_leaf by passing
1952 NULL as sequence argument to maybe_push_res_to_seq.
1953 (parser::parse_expr): Allow ! marker on result expression
1955 * doc/match-and-simplify.texi: Amend.
1957 2020-07-31 Kewen Lin <linkw@linux.ibm.com>
1959 * tree-vect-loop.c (vect_get_known_peeling_cost): Don't consider branch
1960 taken costs for prologue and epilogue if they don't exist.
1961 (vect_estimate_min_profitable_iters): Likewise.
1963 2020-07-31 Martin Liska <mliska@suse.cz>
1965 * cgraph.h: Remove leading empty lines.
1966 * cgraphunit.c (enum cgraph_order_sort_kind): Remove
1968 (struct cgraph_order_sort): Add constructors.
1969 (cgraph_order_sort::process): New.
1970 (cgraph_order_cmp): New.
1971 (output_in_order): Simplify and push nodes to vector.
1973 2020-07-31 Richard Biener <rguenther@suse.de>
1976 * fold-const.c (fold_range_test): Special-case constant
1977 LHS for short-circuiting operations.
1979 2020-07-31 Martin Liska <mliska@suse.cz>
1981 * gcov-io.h (GCOV_PREALLOCATED_KVP): New.
1983 2020-07-31 Zhiheng Xie <xiezhiheng@huawei.com>
1985 * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
1986 Add new argument ATTRS.
1987 (aarch64_call_properties): New function.
1988 (aarch64_modifies_global_state_p): Likewise.
1989 (aarch64_reads_global_state_p): Likewise.
1990 (aarch64_could_trap_p): Likewise.
1991 (aarch64_add_attribute): Likewise.
1992 (aarch64_get_attributes): Likewise.
1993 (aarch64_init_simd_builtins): Add attributes for each built-in function.
1995 2020-07-31 Richard Biener <rguenther@suse.de>
1998 * var-tracking.c (vt_find_locations): Use
1999 rev_post_order_and_mark_dfs_back_seme and separately iterate
2002 2020-07-31 Richard Biener <rguenther@suse.de>
2004 * cfganal.h (rev_post_order_and_mark_dfs_back_seme): Adjust
2006 * cfganal.c (rpoamdbs_bb_data): New struct with pre BB data.
2007 (tag_header): New helper.
2008 (cmp_edge_dest_pre): Likewise.
2009 (rev_post_order_and_mark_dfs_back_seme): Compute SCCs,
2010 find SCC exits and perform a DFS walk with extra edges to
2011 compute a RPO with adjacent SCC members when requesting an
2012 iteration optimized order and populate the toplevel SCC array.
2013 * tree-ssa-sccvn.c (do_rpo_vn): Remove ad-hoc computation
2014 of max_rpo and fill it in from SCC extent info instead.
2016 2020-07-30 Will Schmidt <will_schmidt@vnet.ibm.com>
2018 * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define.
2019 (vec_test_lsbb_all_zeros): New define.
2020 * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in
2022 (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines.
2023 (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads.
2024 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS,
2025 P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries.
2026 * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec.
2027 * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define.
2028 (xvtlsbbo, xvtlsbbz): New instruction expands.
2030 2020-07-30 Cooper Qu <cooper.qu@linux.alibaba.com>
2032 * config/riscv/riscv-opts.h (stack_protector_guard): New enum.
2033 * config/riscv/riscv.c (riscv_option_override): Handle
2035 * config/riscv/riscv.md (stack_protect_set): New pattern to handle
2036 flexible stack protector guard settings.
2037 (stack_protect_set_<mode>): Ditto.
2038 (stack_protect_test): Ditto.
2039 (stack_protect_test_<mode>): Ditto.
2040 * config/riscv/riscv.opt (mstack-protector-guard=,
2041 mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
2043 * doc/invoke.texi (Option Summary) [RISC-V Options]:
2044 Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
2045 -mstack-protector-guard-offset=.
2046 (RISC-V Options): Ditto.
2048 2020-07-30 H.J. Lu <hjl.tools@gmail.com>
2051 * configure: Regenerated.
2053 2020-07-30 Richard Biener <rguenther@suse.de>
2055 PR tree-optimization/96370
2056 * tree-ssa-reassoc.c (rewrite_expr_tree): Add operation
2057 code parameter and use it instead of picking it up from
2058 the stmt that is being rewritten.
2059 (reassociate_bb): Pass down the operation code.
2061 2020-07-30 Roger Sayle <roger@nextmovesoftware.com>
2062 Tom de Vries <tdevries@suse.de>
2064 * config/nvptx/nvptx.md (nvptx_vector_index_operand): New predicate.
2065 (VECELEM): New mode attribute for a vector's uppercase element mode.
2066 (Vecelem): New mode attribute for a vector's lowercase element mode.
2067 (*vec_set<mode>_0, *vec_set<mode>_1, *vec_set<mode>_2)
2068 (*vec_set<mode>_3): New instructions.
2069 (vec_set<mode>): New expander to generate one of the above insns.
2070 (vec_extract<mode><Vecelem>): New instruction.
2072 2020-07-30 Martin Liska <mliska@suse.cz>
2075 * config/i386/x86-tune-costs.h: Use libcall for large sizes for
2076 -m32. Start using libcall from 128+ bytes.
2078 2020-07-30 Martin Liska <mliska@suse.cz>
2080 * config/i386/x86-tune-costs.h: Change code formatting.
2082 2020-07-29 Roger Sayle <roger@nextmovesoftware.com>
2084 * config/nvptx/nvptx.md (recip<mode>2): New instruction.
2086 2020-07-29 Fangrui Song <maskray@google.com>
2089 * opts.c (common_handle_option): Don't make -gsplit-dwarf imply -g.
2090 * doc/invoke.texi (-gsplit-dwarf): Update documentation.
2092 2020-07-29 Joe Ramsay <joe.ramsay@arm.com>
2094 * config/arm/arm-protos.h (arm_coproc_mem_operand_no_writeback):
2096 (arm_mve_mode_and_operands_type_check): Declare prototype.
2097 * config/arm/arm.c (arm_coproc_mem_operand): Refactor to use
2098 _arm_coproc_mem_operand.
2099 (arm_coproc_mem_operand_wb): New function to cover full, limited
2101 (arm_coproc_mem_operand_no_writeback): New constraint for memory
2102 operand with no writeback.
2103 (arm_print_operand): Extend 'E' specifier for memory operand
2104 that does not support writeback.
2105 (arm_mve_mode_and_operands_type_check): New constraint check for
2106 MVE memory operands.
2107 * config/arm/constraints.md: Add Uj constraint for VFP vldr.16
2109 * config/arm/vfp.md (*mov_load_vfp_hf16): New pattern for
2111 (*mov_store_vfp_hf16): New pattern for vstr.16.
2112 (*mov<mode>_vfp_<mode>16): Remove MVE moves.
2114 2020-07-29 Richard Biener <rguenther@suse.de>
2116 PR tree-optimization/96349
2117 * tree-ssa-loop-split.c (stmt_semi_invariant_p_1): When the
2118 condition runs into a loop PHI with an abnormal entry value give up.
2120 2020-07-29 Richard Biener <rguenther@suse.de>
2122 * tree-vectorizer.c (vectorize_loops): Reset the SCEV
2123 cache if we removed any SIMD UID SSA defs.
2124 * gimple-loop-interchange.cc (pass_linterchange::execute):
2125 Reset the scev cache if we interchanged a loop.
2127 2020-07-29 Richard Biener <rguenther@suse.de>
2129 PR tree-optimization/95679
2130 * tree-ssa-propagate.h
2131 (substitute_and_fold_engine::propagate_into_phi_args): Return
2132 whether anything changed.
2133 * tree-ssa-propagate.c
2134 (substitute_and_fold_engine::propagate_into_phi_args): Likewise.
2135 (substitute_and_fold_dom_walker::before_dom_children): Update
2138 2020-07-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2140 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
2141 Ensure that loop variable npeel_tmp advances in each iteration.
2143 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
2145 * config/mmix/mmix.h (NO_FUNCTION_CSE): Define to 1.
2147 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
2149 * config/mmix/mmix.h (ASM_OUTPUT_EXTERNAL): Define to
2150 default_elf_asm_output_external.
2152 2020-07-28 Sergei Trofimovich <siarheit@google.com>
2155 * ipa-cp.c (has_undead_caller_from_outside_scc_p): Consider
2156 unoptimized callers as undead.
2158 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
2159 Richard Biener <rguenther@suse.de>
2161 * match.pd (popcount(x)&1 -> parity(x)): New simplification.
2162 (parity(~x) -> parity(x)): New simplification.
2163 (parity(x)^parity(y) -> parity(x^y)): New simplification.
2164 (parity(x&1) -> x&1): New simplification.
2165 (popcount(x) -> x>>C): New simplification.
2167 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
2168 Tom de Vries <tdevries@suse.de>
2170 * config/nvptx/nvptx.md (extendqihi2): New instruction.
2171 (ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode.
2173 2020-07-28 Jakub Jelinek <jakub@redhat.com>
2176 * calls.c (maybe_warn_rdwr_sizes): Add FNDECL and FNTYPE arguments,
2177 instead of trying to rediscover them in the body.
2178 (initialize_argument_information): Adjust caller.
2180 2020-07-28 Kewen Lin <linkw@linux.ibm.com>
2182 * tree-vect-loop.c (vect_get_known_peeling_cost): Factor out some code
2183 to determine peel_iters_epilogue to...
2184 (vect_get_peel_iters_epilogue): ...this new function.
2185 (vect_estimate_min_profitable_iters): Refactor cost calculation on
2186 peel_iters_prologue and peel_iters_epilogue.
2188 2020-07-27 Martin Sebor <msebor@redhat.com>
2190 PR tree-optimization/84079
2191 * gimple-array-bounds.cc (array_bounds_checker::check_addr_expr):
2192 Only allow just-past-the-end references for the most significant
2195 2020-07-27 Hu Jiangping <hujiangping@cn.fujitsu.com>
2198 * opts.c (check_alignment_argument): Set the -falign-Name
2199 on/off flag on and set the -falign-Name string value null,
2200 when the command-line specified argument is zero.
2202 2020-07-27 Martin Liska <mliska@suse.cz>
2204 PR tree-optimization/96058
2205 * expr.c (string_constant): Build string_constant only
2206 for a type that has same precision as char_type_node
2207 and is an integral type.
2209 2020-07-27 Richard Biener <rguenther@suse.de>
2211 * var-tracking.c (variable_tracking_main_1): Remove call
2212 to mark_dfs_back_edges.
2214 2020-07-27 Martin Liska <mliska@suse.cz>
2216 PR tree-optimization/96128
2217 * tree-vect-generic.c (expand_vector_comparison): Do not expand
2218 vector comparison with VEC_COND_EXPR.
2220 2020-07-27 H.J. Lu <hjl.tools@gmail.com>
2223 * common.opt: Add -fcf-protection=check.
2224 * flag-types.h (cf_protection_level): Add CF_CHECK.
2225 * lto-wrapper.c (merge_and_complain): Issue an error for
2226 mismatching -fcf-protection values with -fcf-protection=check.
2227 Otherwise, merge -fcf-protection values.
2228 * doc/invoke.texi: Document -fcf-protection=check.
2230 2020-07-27 Martin Liska <mliska@suse.cz>
2233 * symbol-summary.h: Call vec_safe_reserve before grow is called
2234 in order to grow to a reasonable size.
2235 * vec.h (vec_safe_reserve): Add missing function for vl_ptr
2238 2020-07-26 Hans-Peter Nilsson <hp@bitrange.com>
2240 * configure.ac (out-of-tree linker .hidden support): Don't turn off
2241 for mmix-knuth-mmixware.
2242 * configure: Regenerate.
2244 2020-07-26 Aaron Sawdey <acsawdey@linux.ibm.com>
2246 * config/rs6000/rs6000.c (rs6000_option_override_internal):
2247 Set the default value for -mblock-ops-unaligned-vsx.
2248 * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx.
2249 * doc/invoke.texi: Document -mblock-ops-unaligned-vsx.
2251 2020-07-25 Hans-Peter Nilsson <hp@bitrange.com>
2253 * config/mmix/mmix.c (TARGET_ASM_OUTPUT_IDENT): Override the default
2254 with default_asm_output_ident_directive.
2256 2020-07-25 Andrew Stubbs <ams@codesourcery.com>
2258 * config/gcn/gcn.c (gcn_scalar_mode_supported_p): New function.
2259 (TARGET_SCALAR_MODE_SUPPORTED_P): New define.
2261 2020-07-24 David Edelsohn <dje.gcc@gmail.com>
2262 Clement Chigot <clement.chigot@atos.net>
2264 * config.gcc (powerpc-ibm-aix7.1): Use t-aix64 and biarch64 for
2266 * config/rs6000/aix71.h (ASM_SPEC): Remove aix64 option.
2269 (ASM_CPU_SPEC): Remove vsx and altivec options.
2270 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
2273 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
2274 (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
2275 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
2278 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
2281 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
2282 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
2284 (CPLUSPLUS_CPP_SPEC): Same.
2287 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
2288 * config/rs6000/aix72.h (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
2289 * config/rs6000/defaultaix64.h: Delete.
2291 2020-07-24 Segher Boessenkool <segher@kernel.crashing.org>
2293 * config/rs6000/rs6000.opt: Delete -mpower10.
2295 2020-07-24 Alexandre Oliva <oliva@adacore.com>
2297 * config/i386/intelmic-mkoffload.c
2298 (generate_target_descr_file): Use dumppfx for save_temps
2299 files. Pass -dumpbase et al down to the compiler.
2300 (generate_target_offloadend_file): Likewise.
2301 (generate_host_descr_file): Likewise.
2302 (prepare_target_image): Likewise. Move out_obj_filename
2304 (main): ... here. Detect -dumpbase, set dumppfx too.
2306 2020-07-24 Alexandre Oliva <oliva@adacore.com>
2309 * gcc.c (process_command): Adjust and document conditions to
2312 2020-07-24 Matthias Klose <doko@ubuntu.com>
2314 * config/aarch64/aarch64.c (+aarch64_offload_options,
2315 TARGET_OFFLOAD_OPTIONS): New.
2317 2020-07-24 Uroš Bizjak <ubizjak@gmail.com>
2320 * config/i386/sync.md (mmem_thread_fence): Emit mfence_sse2 for -Os.
2322 2020-07-23 Roger Sayle <roger@nextmovesoftware.com>
2324 PR rtl-optimization/96298
2325 * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't
2326 distribute over xor, so (a^b)^(c^b) is not the same as (a^c)^b.
2328 2020-07-23 Dong JianQiang <dongjianqiang2@huawei.com>
2330 PR gcov-profile/96267
2331 * gcov-io.c (gcov_open): enable if IN_GCOV_TOOL.
2333 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
2335 * config/rs6000/rs6000.c (adjust_vectorization_cost): Renamed to ...
2336 (rs6000_adjust_vect_cost_per_stmt): ... here.
2337 (rs6000_add_stmt_cost): Rename adjust_vectorization_cost to
2338 rs6000_adjust_vect_cost_per_stmt.
2340 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
2342 * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
2343 IFN_LEN_LOAD and IFN_LEN_STORE.
2344 (get_alias_ptr_type_for_ptr_address): Likewise.
2346 2020-07-23 Kito Cheng <kito.cheng@sifive.com>
2349 * asan.c (asan_shadow_offset_set_p): New.
2350 * asan.h (asan_shadow_offset_set_p): Ditto.
2351 * toplev.c (process_options): Allow -fsanitize=kernel-address
2352 even TARGET_ASAN_SHADOW_OFFSET not implemented, only check when
2353 asan stack protection is enabled.
2355 2020-07-22 Peter Bergner <bergner@linux.ibm.com>
2358 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Handle
2359 little-endian memory ordering.
2361 2020-07-22 Nathan Sidwell <nathan@acm.org>
2363 * dumpfile.c (parse_dump_option): Deal with filenames
2366 2020-07-22 Nathan Sidwell <nathan@acm.org>
2368 * incpath.c (add_path): Avoid multiple strlen calls.
2370 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2372 * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag
2373 is not NULL_RTX before use.
2375 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2377 * expr.c (convert_modes): Allow a constant integer to be converted to
2378 any scalar int mode.
2380 2020-07-22 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
2382 * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector
2383 V2SI, V2SF, V2DI, V2DF load pair and store pair modes.
2384 * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
2385 Change mode parameter to machine_mode.
2386 (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to
2388 * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
2389 Change mode parameter to machine_mode.
2390 (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode.
2391 * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors.
2393 2020-07-22 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
2395 * doc/languages.texi: Fix “then”/“than” typo.
2397 2020-07-21 Sunil K Pandey <skpgkp2@gmail.com>
2400 * config/i386/i386-protos.h (ix86_local_alignment): Add
2401 another function parameter may_lower alignment. Default is
2403 * config/i386/i386.c (ix86_lower_local_decl_alignment): New
2405 (ix86_local_alignment): Amend ix86_local_alignment to accept
2406 another parameter may_lower. If may_lower is true, new align
2407 may be lower than incoming alignment. If may_lower is false,
2408 new align will be greater or equal to incoming alignment.
2409 (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define.
2410 * doc/tm.texi: Regenerate.
2411 * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New
2413 * target.def (lower_local_decl_alignment): New hook.
2415 2020-07-21 Uroš Bizjak <ubizjak@gmail.com>
2418 * config/i386/sync.md (mfence_sse2): Enable for
2419 TARGET_64BIT and TARGET_SSE2.
2420 (mfence_nosse): Always enable.
2422 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2424 * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps):
2426 * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise.
2427 * config/msp430/msp430.md (cbranchhi4_real): Remove special case for
2428 msp430_do_not_relax_short_jumps.
2430 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2432 * config/msp430/msp430.md: New "extendqipsi2" define_insn.
2434 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2436 * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and
2439 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com>
2441 PR rtl-optimization/89310
2442 * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split.
2444 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
2446 * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total
2447 allocated size and set current_function_static_stack_size, if
2448 flag_stack_usage_info.
2450 2020-07-20 Sergei Trofimovich <siarheit@google.com>
2453 * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC
2454 to get crtendS.o for !no-pie mode.
2455 * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
2457 2020-07-20 Yang Yang <yangyang305@huawei.com>
2459 * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
2460 VIEW_CONVERT_EXPRs if the arguments types and return type
2461 of simd clone function are distinct with the vectype of stmt.
2463 2020-07-20 Uroš Bizjak <ubizjak@gmail.com>
2466 * config/i386/i386.h (TARGET_AVOID_MFENCE):
2467 Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE.
2468 * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE.
2469 (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack
2470 referred memory in word_mode.
2471 (mem_thread_fence): Do not generate mfence_sse2 pattern when
2472 TARGET_AVOID_MFENCE is true.
2473 (atomic_store<mode>): Update for rename.
2474 * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE):
2475 Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE.
2477 2020-07-20 Martin Sebor <msebor@redhat.com>
2481 * builtins.c (inline_expand_builtin_string_cmp): Rename...
2482 (inline_expand_builtin_bytecmp): ...to this.
2483 (builtin_memcpy_read_str): Don't expect data to be nul-terminated.
2484 (expand_builtin_memory_copy_args): Handle object representations
2485 with embedded nul bytes.
2486 (expand_builtin_memcmp): Same.
2487 (expand_builtin_strcmp): Adjust call to naming change.
2488 (expand_builtin_strncmp): Same.
2489 * expr.c (string_constant): Create empty strings with nonzero size.
2490 * fold-const.c (c_getstr): Rename locals and update comments.
2491 * tree.c (build_string): Accept null pointer argument.
2492 (build_string_literal): Same.
2493 * tree.h (build_string): Provide a default.
2494 (build_string_literal): Same.
2496 2020-07-20 Richard Biener <rguenther@suse.de>
2498 * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove
2499 write-only post array.
2501 2020-07-20 Jakub Jelinek <jakub@redhat.com>
2504 * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF
2505 of a bitfield not aligned on byte boundaries try to
2506 fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and
2507 adjust it depending on endianity.
2509 2020-07-20 Jakub Jelinek <jakub@redhat.com>
2512 * fold-const.c (native_encode_initializer): Handle bit-fields.
2514 2020-07-20 Kewen Lin <linkw@linux.ibm.com>
2516 * config/rs6000/rs6000.c (rs6000_option_override_internal):
2517 Set param_vect_partial_vector_usage to 0 explicitly.
2518 * doc/invoke.texi (vect-partial-vector-usage): Document new option.
2519 * optabs-query.c (get_len_load_store_mode): New function.
2520 * optabs-query.h (get_len_load_store_mode): New declare.
2521 * params.opt (vect-partial-vector-usage): New.
2522 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the
2523 handlings for vectorization using length-based partial vectors, call
2524 vect_gen_len for length generation, and rename some variables with
2525 items instead of scalars.
2526 (vect_set_loop_condition_partial_vectors): Add the handlings for
2527 vectorization using length-based partial vectors.
2528 (vect_do_peeling): Allow remaining eiters less than epilogue vf for
2529 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
2530 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init
2531 epil_using_partial_vectors_p.
2532 (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls
2533 for lengths destruction.
2534 (vect_verify_loop_lens): New function.
2535 (vect_analyze_loop): Add handlings for epilogue of loop when it's
2536 marked to use vectorization using partial vectors.
2537 (vect_analyze_loop_2): Add the check to allow only one vectorization
2538 approach using partial vectorization at the same time. Check param
2539 vect-partial-vector-usage for partial vectors decision. Mark
2540 LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is
2541 considerable to use partial vectors. Call release_vec_loop_controls
2542 for lengths destruction.
2543 (vect_estimate_min_profitable_iters): Adjust for loop vectorization
2544 using length-based partial vectors.
2545 (vect_record_loop_mask): Init factor to 1 for vectorization using
2546 mask-based partial vectors.
2547 (vect_record_loop_len): New function.
2548 (vect_get_loop_len): Likewise.
2549 * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add
2550 checks for vectorization using length-based partial vectors. Factor
2551 some code to lambda function get_valid_nvectors.
2552 (vectorizable_store): Add handlings when using length-based partial
2554 (vectorizable_load): Likewise.
2555 (vect_gen_len): New function.
2556 * tree-vectorizer.h (struct rgroup_controls): Add field factor
2557 mainly for length-based partial vectors.
2558 (vec_loop_lens): New typedef.
2559 (_loop_vec_info): Add lens and epil_using_partial_vectors_p.
2560 (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro.
2561 (LOOP_VINFO_LENS): Likewise.
2562 (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise.
2563 (vect_record_loop_len): New declare.
2564 (vect_get_loop_len): Likewise.
2565 (vect_gen_len): Likewise.
2567 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
2569 * config/mmix/mmix.c (mmix_option_override): Reinstate default
2570 integer-emitting targetm.asm_out pseudos when dumping detailed
2572 (mmix_assemble_integer): Update comment.
2574 2020-07-19 H.J. Lu <hjl.tools@gmail.com>
2578 * config/i386/cpuid.h: Add include guard.
2581 2020-07-18 H.J. Lu <hjl.tools@gmail.com>
2584 * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
2586 2020-07-18 Peter Bergner <bergner@linux.ibm.com>
2589 * config/rs6000/dfp.md (trunctdsd2): New define_insn.
2590 * config/rs6000/rs6000.md (define_attr "isa"): Add p9.
2591 (define_attr "enabled"): Handle p9.
2593 2020-07-17 Roger Sayle <roger@nextmovesoftware.com>
2595 * function.c (assign_parm_setup_block): Use the macro
2596 TRULY_NOOP_TRUNCATION_MODES_P instead of calling
2597 targetm.truly_noop_truncation directly.
2599 2020-07-17 H.J. Lu <hjl.tools@gmail.com>
2603 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
2604 (VF1_AVX512ER_128_256): This. Drop DF vector modes.
2605 (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
2606 VF1_AVX512ER_128_256.
2608 2020-07-17 Tamar Christina <tamar.christina@arm.com>
2610 * doc/sourcebuild.texi (dg-set-compiler-env-var,
2611 dg-set-target-env-var): Document.
2613 2020-07-17 Tamar Christina <tamar.christina@arm.com>
2615 * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
2617 2020-07-17 Tamar Christina <tamar.christina@arm.com>
2619 * config/aarch64/driver-aarch64.c (host_detect_local_cpu):
2622 2020-07-17 Tamar Christina <tamar.christina@arm.com>
2624 * config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
2625 (parse_field): Use std::string.
2626 (split_words, readline, find_field): New.
2627 (host_detect_local_cpu): Fix truncation issues.
2629 2020-07-17 Andrew Stubbs <ams@codesourcery.com>
2631 * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining.
2632 (ELFOSABI_AMDGPU_HSA): Likewise.
2633 (ELFABIVERSION_AMDGPU_HSA): Likewise.
2634 (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise.
2635 (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise.
2636 (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise.
2639 2020-07-17 Andrew Pinski <apinksi@marvell.com>
2640 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
2643 * config/aarch64/aarch64.c (aarch64_evpc_ins): New function.
2644 (aarch64_expand_vec_perm_const_1): Call it.
2645 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make
2646 public, and add a "@" prefix.
2648 2020-07-17 Andrew Pinski <apinksi@marvell.com>
2649 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
2652 * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function.
2653 (aarch64_expand_vec_perm_const_1): Call it.
2655 2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com>
2657 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
2658 Add new field flags.
2659 (VAR1): Add new field FLAG in macro.
2675 (aarch64_general_fold_builtin): Likewise.
2676 (aarch64_general_gimple_fold_builtin): Likewise.
2677 * config/aarch64/aarch64-simd-builtins.def: Add default flag for
2678 each built-in function.
2679 * config/aarch64/geniterators.sh: Add new field in BUILTIN macro.
2681 2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com>
2684 * config/s390/s390.c (s390_expand_insv): Invoke the movstrict
2685 expanders to generate the pattern.
2686 * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the
2687 '*' to have callable expanders.
2689 2020-07-16 Hans-Peter Nilsson <hp@axis.com>
2690 Segher Boessenkool <segher@kernel.crashing.org>
2693 * combine.c (is_just_move): Take an rtx_insn* as argument. Use
2696 2020-07-16 Uroš Bizjak <ubizjak@gmail.com>
2699 * config/i386/sync.md
2700 (peephole2 to remove unneded compare after CMPXCHG):
2701 New pattern, also handle XOR zeroing and load of -1 by OR.
2703 2020-07-16 Eric Botcazou <ebotcazou@gcc.gnu.org>
2705 * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak.
2706 (ix86_adjust_stack_and_probe): Delete.
2707 (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add
2708 PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus
2709 a small dope beyond SIZE bytes.
2710 (ix86_emit_probe_stack_range): Use local variable.
2711 (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe
2712 and tidy up the stack checking code.
2713 * explow.c (get_stack_check_protect): Fix head comment.
2714 (anti_adjust_stack_and_probe_stack_clash): Likewise.
2715 (allocate_dynamic_stack_space): Add comment.
2716 * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and
2717 TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field.
2719 2020-07-16 Andrew Stubbs <ams@codesourcery.com>
2721 * config/gcn/mkoffload.c: Include simple-object.h and elf.h.
2722 (EM_AMDGPU): New macro.
2723 (ELFOSABI_AMDGPU_HSA): New macro.
2724 (ELFABIVERSION_AMDGPU_HSA): New macro.
2725 (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro.
2726 (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro.
2727 (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro.
2728 (R_AMDGPU_NONE): New macro.
2729 (R_AMDGPU_ABS32_LO): New macro.
2730 (R_AMDGPU_ABS32_HI): New macro.
2731 (R_AMDGPU_ABS64): New macro.
2732 (R_AMDGPU_REL32): New macro.
2733 (R_AMDGPU_REL64): New macro.
2734 (R_AMDGPU_ABS32): New macro.
2735 (R_AMDGPU_GOTPCREL): New macro.
2736 (R_AMDGPU_GOTPCREL32_LO): New macro.
2737 (R_AMDGPU_GOTPCREL32_HI): New macro.
2738 (R_AMDGPU_REL32_LO): New macro.
2739 (R_AMDGPU_REL32_HI): New macro.
2740 (reserved): New macro.
2741 (R_AMDGPU_RELATIVE64): New macro.
2742 (gcn_s1_name): Delete global variable.
2743 (gcn_s2_name): Delete global variable.
2744 (gcn_o_name): Delete global variable.
2745 (gcn_cfile_name): Delete global variable.
2746 (files_to_cleanup): New global variable.
2747 (offload_abi): New global variable.
2748 (tool_cleanup): Use files_to_cleanup, not explicit list.
2749 (copy_early_debug_info): New function.
2750 (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name,
2752 Create files_to_cleanup obstack.
2753 Recognize -march options.
2754 Copy early debug info from input .o files.
2756 2020-07-16 Andrea Corallo <andrea.corallo@arm.com>
2758 * Makefile.in (TAGS): Remove 'params.def'.
2760 2020-07-16 Roger Sayle <roger@nextmovesoftware.com>
2762 * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that
2763 targets that return false, indicating SUBREGs shouldn't be
2764 used, also need to provide a trunc?i?i2 optab that performs this
2766 * doc/tm.texi: Regenerate.
2768 2020-07-15 Uroš Bizjak <ubizjak@gmail.com>
2771 * config/i386/sync.md
2772 (peephole2 to remove unneded compare after CMPXCHG): New pattern.
2774 2020-07-15 Jakub Jelinek <jakub@redhat.com>
2777 * omp-general.h (struct omp_for_data): Rename min_inner_iterations
2778 member to first_inner_iterations, adjust comment.
2779 * omp-general.c (omp_extract_for_data): Adjust for the above change.
2780 Always use n1first and n2first to compute it, rather than depending
2781 on single_nonrect_cond_code. Similarly, always compute factor
2782 as (m2 - m1) * outer_step / inner_step rather than sometimes m1 - m2
2783 depending on single_nonrect_cond_code.
2784 * omp-expand.c (expand_omp_for_init_vars): Rename min_inner_iterations
2785 to first_inner_iterations and min_inner_iterationsd to
2786 first_inner_iterationsd.
2788 2020-07-15 Jakub Jelinek <jakub@redhat.com>
2791 * config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
2792 _mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask,
2793 _mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask,
2794 _mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask,
2795 _mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask,
2796 _mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask,
2797 _mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask,
2798 _mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask,
2799 _mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask,
2800 _mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask,
2801 _mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask,
2802 _mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask,
2803 _mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask,
2804 _mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask,
2805 _mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask,
2806 _mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask,
2807 _mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded
2810 2020-07-15 Jakub Jelinek <jakub@redhat.com>
2813 * builtins.c: Include gimple-ssa.h, tree-ssa-live.h and
2815 (expand_expr_force_mode): If exp is a SSA_NAME with different mode
2816 from MODE and get_gimple_for_ssa_name is a cast from MODE, use the
2819 2020-07-15 Jiufu Guo <guojiufu@cn.ibm.com>
2821 * config/rs6000/rs6000.c (rs6000_loop_unroll_adjust): Refine hook.
2823 2020-07-14 David Edelsohn <dje.gcc@gmail.com>
2825 * config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64
2827 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add
2828 TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case.
2830 2020-07-14 Lewis Hyatt <lhyatt@gmail.com>
2832 PR preprocessor/49973
2834 * common.opt: Handle -ftabstop here instead of in c-family
2835 options. Add -fdiagnostics-column-unit= and
2836 -fdiagnostics-column-origin= options.
2837 * opts.c (common_handle_option): Handle the new options.
2838 * diagnostic-format-json.cc (json_from_expanded_location): Add
2839 diagnostic_context argument. Use it to convert column numbers as per
2841 (json_from_location_range): Likewise.
2842 (json_from_fixit_hint): Likewise.
2843 (json_end_diagnostic): Pass the new context argument to helper
2844 functions above. Add "column-origin" field to the output.
2845 (test_unknown_location): Add the new context argument to calls to
2847 (test_bad_endpoints): Likewise.
2848 * diagnostic-show-locus.c
2849 (exploc_with_display_col::exploc_with_display_col): Support
2851 (layout_point::layout_point): Make use of class
2852 exploc_with_display_col.
2853 (layout_range::layout_range): Likewise.
2854 (struct line_bounds): Clarify that the units are now always
2855 display columns. Rename members accordingly. Add constructor.
2856 (layout::print_source_line): Add support for tab expansion.
2857 (make_range): Adapt to class layout_range changes.
2858 (layout::maybe_add_location_range): Likewise.
2859 (layout::layout): Adapt to class exploc_with_display_col changes.
2860 (layout::calculate_x_offset_display): Support tabstop parameter.
2861 (layout::print_annotation_line): Adapt to struct line_bounds changes.
2862 (layout::print_line): Likewise.
2863 (line_label::line_label): Add diagnostic_context argument.
2864 (get_affected_range): Likewise.
2865 (get_printed_columns): Likewise.
2866 (layout::print_any_labels): Adapt to struct line_label changes.
2867 (class correction): Add m_tabstop member.
2868 (correction::correction): Add tabstop argument.
2869 (correction::compute_display_cols): Use m_tabstop.
2870 (class line_corrections): Add m_context member.
2871 (line_corrections::line_corrections): Add diagnostic_context argument.
2872 (line_corrections::add_hint): Use m_context to handle tabstops.
2873 (layout::print_trailing_fixits): Adapt to class line_corrections
2875 (test_layout_x_offset_display_utf8): Support tabstop parameter.
2876 (test_layout_x_offset_display_tab): New selftest.
2877 (test_one_liner_colorized_utf8): Likewise.
2878 (test_tab_expansion): Likewise.
2879 (test_diagnostic_show_locus_one_liner_utf8): Call the new tests.
2880 (diagnostic_show_locus_c_tests): Likewise.
2881 (test_overlapped_fixit_printing): Adapt to helper class and
2883 (test_overlapped_fixit_printing_utf8): Likewise.
2884 (test_overlapped_fixit_printing_2): Likewise.
2885 * diagnostic.h (enum diagnostics_column_unit): New enum.
2886 (struct diagnostic_context): Add members for the new options.
2887 (diagnostic_converted_column): Declare.
2888 (json_from_expanded_location): Add new context argument.
2889 * diagnostic.c (diagnostic_initialize): Initialize new members.
2890 (diagnostic_converted_column): New function.
2891 (maybe_line_and_column): Be willing to output a column of 0.
2892 (diagnostic_get_location_text): Convert column number as per the new
2894 (diagnostic_report_current_module): Likewise.
2895 (assert_location_text): Add origin and column_unit arguments for
2896 testing the new functionality.
2897 (test_diagnostic_get_location_text): Test the new functionality.
2898 * doc/invoke.texi: Document the new options and behavior.
2899 * input.h (location_compute_display_column): Add tabstop argument.
2900 * input.c (location_compute_display_column): Likewise.
2901 (test_cpp_utf8): Add selftests for tab expansion.
2902 * tree-diagnostic-path.cc (default_tree_make_json_for_path): Pass the
2903 new context argument to json_from_expanded_location().
2905 2020-07-14 Jakub Jelinek <jakub@redhat.com>
2908 * expr.c (expand_constructor): Don't create temporary for store to
2909 volatile MEM if exp has an addressable type.
2911 2020-07-14 Nathan Sidwell <nathan@acm.org>
2913 * hash-map.h (hash_map::get): Note it is a pointer to value.
2914 * incpath.h (incpath_kind): Align comments.
2916 2020-07-14 Nathan Sidwell <nathan@acm.org>
2918 * tree-core.h (tree_decl_with_vis, tree_function_decl):
2919 Note additional padding on 64-bits
2920 * tree.c (cache_integer_cst): Note why no caching of enum literals.
2921 (get_tree_code_name): Robustify error case.
2923 2020-07-14 Nathan Sidwell <nathan@acm.org>
2925 * doc/gty.texi: Fic gt_cleare_cache name.
2926 * doc/invoke.texi: Remove duplicate opindex Wabi-tag.
2928 2020-07-14 Jakub Jelinek <jakub@redhat.com>
2930 * omp-general.h (struct omp_for_data): Add adjn1 member.
2931 * omp-general.c (omp_extract_for_data): For non-rect loop, punt on
2932 count computing if n1, n2 or step are not INTEGER_CST earlier.
2933 Narrow the outer iterator range if needed so that non-rect loop
2934 has at least one iteration for each outer range iteration. Compute
2936 * omp-expand.c (expand_omp_for_init_vars): Use adjn1 if non-NULL
2937 instead of the outer loop's n1.
2939 2020-07-14 Matthias Klose <doko@ubuntu.com>
2942 * lto-wrapper.c (merge_and_complain): Add decoded options as parameter,
2943 error on different values for -fcf-protection.
2944 (append_compiler_options): Pass -fcf-protection option.
2945 (find_and_merge_options): Add decoded options as parameter,
2946 pass decoded_options to merge_and_complain.
2947 (run_gcc): Pass decoded options to find_and_merge_options.
2948 * lto-opts.c (lto_write_options): Pass -fcf-protection option.
2950 2020-07-13 Alan Modra <amodra@gmail.com>
2952 * config/rs6000/rs6000.md (sibcall_local): Merge sibcall_local32
2953 and sibcall_local64.
2954 (sibcall_value_local): Similarly.
2956 2020-07-13 Nathan Sidwell <nathan@acm.org>
2958 * Makefile.in (distclean): Remove long gone cxxmain.c
2960 2020-07-13 H.J. Lu <hjl.tools@gmail.com>
2963 * config/i386/i386.md (cmpstrnsi): Pass a copy of the string
2964 length to cmpstrnqi patterns.
2966 2020-07-13 Jakub Jelinek <jakub@redhat.com>
2969 * ipa-fnsummary.c (analyze_function_body): Treat NULL bb->aux
2972 2020-07-13 Richard Biener <rguenther@suse.de>
2974 PR tree-optimization/96163
2975 * tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts
2976 at least after region begin.
2978 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2980 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
2981 __ARM_FEATURE_PAC_DEFAULT support.
2983 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2986 * doc/extend.texi: Update the text for __builtin_return_address.
2988 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2991 * config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
2992 Disable return address signing if __builtin_eh_return is used.
2994 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2998 * config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
2999 * config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
3000 (aarch64_return_addr): Use aarch64_return_addr_rtx.
3001 * config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
3003 2020-07-13 Richard Sandiford <richard.sandiford@arm.com>
3006 * tree.h (virtual_method_call_p): Add a default-false parameter
3007 that indicates whether the function is being called from dump
3009 (obj_type_ref_class): Likewise.
3010 * tree.c (virtual_method_call_p): Likewise.
3011 * ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR
3012 type information for the type when the parameter is false.
3013 * tree-pretty-print.c (dump_generic_node): Update calls to
3014 virtual_method_call_p and obj_type_ref_class accordingly.
3016 2020-07-13 Julian Brown <julian@codesourcery.com>
3017 Thomas Schwinge <thomas@codesourcery.com>
3019 * gimplify.c (gimplify_scan_omp_clauses): Do not strip
3020 GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data
3021 directives (see also PR92929).
3023 2020-07-13 Roger Sayle <roger@nextmovesoftware.com>
3025 * convert.c (convert_to_integer_1): Narrow integer operations
3026 even on targets that require explicit truncation instructions.
3028 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3031 * config/cris/cris-passes.def: New file.
3032 * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
3033 * config/cris/cris.c: Add infrastructure bits and pass execute
3034 function cris_postdbr_cmpelim.
3035 * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare.
3037 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3039 * config/cris/t-cris: Remove gt-cris.h-related excessive cargo.
3041 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3044 * config/cris/cris.md ("*add<mode>3_addi"): New splitter.
3045 ("*addi_b_<mode>"): New pattern.
3046 ("*addsi3<setnz>"): Remove stale %-related comment.
3048 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3050 * config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"):
3051 Use match_dup in output template, not match_operand.
3053 2020-07-13 Richard Biener <rguenther@suse.de>
3055 * var-tracking.c (bb_heap_node_t): Remove unused typedef.
3056 (vt_find_locations): Eliminate visited bitmap in favor of
3057 RPO order check. Dump statistics about the number of
3058 local BB dataflow computes.
3060 2020-07-13 Richard Biener <rguenther@suse.de>
3063 * expr.c (expand_constructor): Make a temporary also if we're
3064 storing to volatile memory.
3066 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
3068 * config/rs6000/rs6000.md (rotl_unspec): New
3069 define_insn_and_split.
3071 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
3073 * config/rs6000/rs6000.c (rs6000_expand_vector_init):
3074 Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
3076 2020-07-11 Roger Sayle <roger@nextmovesoftware.com>
3078 * internal-fn.c (expand_mul_overflow): When checking for signed
3079 overflow from a widening multiplication, we access the truncated
3080 lowpart RES twice, so keep this value in a pseudo register.
3082 2020-07-11 Richard Sandiford <richard.sandiford@arm.com>
3084 PR tree-optimization/96146
3085 * value-range.cc (value_range::set): Only decompose POLY_INT_CST
3086 bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges
3087 involving POLY_INT_CSTs.
3089 2020-07-10 David Edelsohn <dje.gcc@gmail.com>
3092 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
3093 create named section for VAR_DECL or FUNCTION_DECL.
3095 2020-07-10 Joseph Myers <joseph@codesourcery.com>
3097 * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
3100 2020-07-10 Alexander Popov <alex.popov@linux.com>
3102 * shrink-wrap.c (try_shrink_wrapping): Improve debug output.
3104 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
3107 * expr.c (expand_expr_real_2): When reducing bit fields,
3108 clear the target if it has a different mode from the expression.
3109 (reduce_to_bit_field_precision): Don't do that here. Instead
3110 assert that the target already has the correct mode.
3112 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
3116 * config/arm/arm.c (arm_attribute_table): Add
3117 "Advanced SIMD type".
3118 (arm_comp_type_attributes): Check that the "Advanced SIMD type"
3119 attributes are equal.
3120 * config/arm/arm-builtins.c: Include stringpool.h and
3122 (arm_mangle_builtin_vector_type): Use the mangling recorded
3123 in the "Advanced SIMD type" attribute.
3124 (arm_init_simd_builtin_types): Add an "Advanced SIMD type"
3125 attribute to each Advanced SIMD type, using the mangled type
3126 as the attribute's single argument.
3128 2020-07-10 Carl Love <cel@us.ibm.com>
3130 * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator.
3131 (VSX_MM4): New define_mode_iterator.
3132 (vec_mtvsrbmi): New define_insn.
3133 (vec_mtvsr_<mode>): New define_insn.
3134 (vec_cntmb_<mode>): New define_insn.
3135 (vec_extract_<mode>): New define_insn.
3136 (vec_expand_<mode>): New define_insn.
3137 (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
3138 UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
3139 * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
3140 vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
3142 * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
3143 (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
3144 mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
3145 vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
3146 (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
3147 (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
3148 mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
3149 (BU_P10_OVERLOAD_2): Add defition for cntm.
3150 * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
3151 checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
3152 CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
3153 (altivec_overloaded_builtins): Add overloaded argument entries for
3154 P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
3155 P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
3156 P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
3157 P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
3158 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
3159 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
3160 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
3161 P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
3162 P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
3163 P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
3164 (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
3165 P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
3166 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
3167 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
3168 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
3169 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
3170 P10_BUILTIN_VEXPANDMQ.
3171 * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
3172 entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
3173 VEXPANDM, VEXTRACTM.
3175 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)>
3178 * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
3179 (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
3180 v16qi_ftype_pcvoid with correct number of parameters.
3182 2020-07-10 H.J. Lu <hjl.tools@gmail.com>
3185 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
3186 TARGET_AVX512VL when enabling FMA.
3188 2020-07-10 Andrea Corallo <andrea.corallo@arm.com>
3189 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
3190 Iain Apreotesei <iain.apreotesei@arm.com>
3192 * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New
3194 * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define.
3195 (arm_invalid_within_doloop): Implement invalid_within_doloop hook.
3196 (arm_target_insn_ok_for_lob): New function.
3197 * config/arm/arm.h (TARGET_HAVE_LOB): Define macro.
3198 * config/arm/thumb2.md (*doloop_end_internal, doloop_begin)
3199 (dls_insn): Add new patterns.
3200 (doloop_end): Modify to select LR when LOB is available.
3201 * config/arm/unspecs.md: Add new unspec.
3202 * doc/sourcebuild.texi (arm_v8_1_lob_ok)
3203 (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports
3206 2020-07-10 Richard Biener <rguenther@suse.de>
3208 PR tree-optimization/96133
3209 * gimple-fold.c (fold_array_ctor_reference): Do not
3210 recurse to folding a CTOR that does not fully cover the
3213 2020-07-10 Cui,Lili <lili.cui@intel.com>
3215 * common/config/i386/cpuinfo.h
3216 (get_intel_cpu): Handle sapphirerapids.
3217 * common/config/i386/i386-common.c
3218 (processor_names): Add sapphirerapids and alderlake.
3219 (processor_alias_table): Add sapphirerapids and alderlake.
3220 * common/config/i386/i386-cpuinfo.h
3221 (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
3222 INTEL_COREI7_ALDERLAKE.
3223 * config.gcc: Add -march=sapphirerapids and alderlake.
3224 * config/i386/driver-i386.c
3225 (host_detect_local_cpu) Handle sapphirerapids and alderlake.
3226 * config/i386/i386-c.c
3227 (ix86_target_macros_internal): Handle sapphirerapids and alderlake.
3228 * config/i386/i386-options.c
3229 (m_SAPPHIRERAPIDS) : Define.
3230 (m_ALDERLAKE): Ditto.
3231 (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
3232 (processor_cost_table): Add sapphirerapids and alderlake.
3233 (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
3234 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
3235 * config/i386/i386.h
3236 (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
3237 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
3238 PROCESSOR_ALDERLAKE.
3240 (PTA_CLDEMOTE): Ditto.
3241 (PTA_SERIALIZE): Ditto.
3242 (PTA_TSXLDTRK): New.
3243 (PTA_SAPPHIRERAPIDS): Ditto.
3244 (PTA_ALDERLAKE): Ditto.
3245 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
3246 PROCESSOR_ALDERLAKE.
3247 * doc/extend.texi: Add sapphirerapids and alderlake.
3248 * doc/invoke.texi: Add sapphirerapids and alderlake.
3250 2020-07-10 Martin Liska <mliska@suse.cz>
3252 * dumpfile.c [profile-report]: Add new profile dump.
3253 * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report.
3254 * passes.c (pass_manager::dump_profile_report): Change stderr
3257 2020-07-10 Kewen Lin <linkw@linux.ibm.com>
3259 * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which
3260 is adjusted by considering peeled prologue for non
3261 vect_use_loop_mask_for_alignment_p cases.
3263 2020-07-09 Peter Bergner <bergner@linux.ibm.com>
3266 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA
3267 specific types __vector_quad and __vector_pair, and initialize the
3268 MMA built-ins if TARGET_EXTRA_BUILTINS is set.
3269 (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask.
3270 Remove now unneeded mask variable.
3271 * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the
3272 OPTION_MASK_MMA flag for power10 if not already set.
3274 2020-07-09 Richard Biener <rguenther@suse.de>
3276 PR tree-optimization/96133
3277 * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p
3278 status between stmts.
3280 2020-07-09 H.J. Lu <hjl.tools@gmail.com>
3283 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA.
3284 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New.
3285 (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256.
3286 (rsqrtv16sf2): Removed.
3288 2020-07-09 Richard Biener <rguenther@suse.de>
3290 * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove.
3291 (vect_slp_analyze_and_verify_instance_alignment): Rename to ...
3292 (vect_slp_analyze_instance_alignment): ... this.
3293 * tree-vect-data-refs.c (verify_data_ref_alignment): Remove.
3294 (vect_verify_datarefs_alignment): Likewise.
3295 (vect_enhance_data_refs_alignment): Do not call
3296 vect_verify_datarefs_alignment.
3297 (vect_slp_analyze_node_alignment): Rename from
3298 vect_slp_analyze_and_verify_node_alignment and do not
3299 call verify_data_ref_alignment.
3300 (vect_slp_analyze_instance_alignment): Rename from
3301 vect_slp_analyze_and_verify_instance_alignment.
3302 * tree-vect-stmts.c (vectorizable_store): Dump when
3303 we vectorize an unaligned access.
3304 (vectorizable_load): Likewise.
3305 * tree-vect-loop.c (vect_analyze_loop_2): Do not call
3306 vect_verify_datarefs_alignment.
3307 * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust.
3309 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
3311 PR tree-optimization/95804
3312 * tree-loop-distribution.c (break_alias_scc_partitions): Force
3313 negative post order to reduction partition.
3315 2020-07-09 Jakub Jelinek <jakub@redhat.com>
3317 * omp-general.h (struct omp_for_data): Add min_inner_iterations
3319 * omp-general.c (omp_extract_for_data): Initialize them and remember
3320 them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there.
3321 * omp-expand.c (expand_omp_for_init_counts): Fix up computation of
3322 counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST.
3323 (expand_omp_for_init_vars): For
3324 fd->first_nonrect + 1 == fd->last_nonrect loops with for now
3325 INTEGER_CST fd->loop.n2 find quadratic equation roots instead of
3326 using fallback method when possible.
3328 2020-07-09 Omar Tahir <omar.tahir@arm.com>
3330 * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
3331 last_moveable_pseudo before returning.
3333 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com>
3335 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
3336 __ARM_FEATURE_BTI_DEFAULT support.
3338 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
3340 * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
3342 * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
3343 stub registers class.
3344 (aarch64_class_max_nregs): Likewise.
3345 (aarch64_register_move_cost): Likewise.
3346 (aarch64_sls_shared_thunks): Global array to store stub labels.
3347 (aarch64_sls_emit_function_stub): New.
3348 (aarch64_create_blr_label): New.
3349 (aarch64_sls_emit_blr_function_thunks): New.
3350 (aarch64_sls_emit_shared_blr_thunks): New.
3351 (aarch64_asm_file_end): New.
3352 (aarch64_indirect_call_asm): New.
3353 (TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
3354 (TARGET_ASM_FUNCTION_EPILOGUE): Use
3355 aarch64_sls_emit_blr_function_thunks.
3356 * config/aarch64/aarch64.h (STB_REGNUM_P): New.
3357 (enum reg_class): Add STUB_REGS class.
3358 (machine_function): Introduce `call_via` array for
3359 function-local stub labels.
3360 * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
3361 aarch64_indirect_call_asm to emit code when hardening BLR
3363 * config/aarch64/constraints.md (Ucr): New constraint
3364 representing registers for indirect calls. Is GENERAL_REGS
3365 usually, and STUB_REGS when hardening BLR instruction against
3367 * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
3368 is also a general register.
3370 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
3372 * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
3373 * config/aarch64/aarch64.c (aarch64_output_casesi): Emit
3374 speculation barrier after BR instruction if needs be.
3375 (aarch64_trampoline_init): Handle ptr_mode value & adjust size
3377 (aarch64_sls_barrier): New.
3378 (aarch64_asm_trampoline_template): Add needed barriers.
3379 * config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
3381 (TRAMPOLINE_SIZE): Account for barrier.
3382 * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
3383 simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
3384 Emit barrier if needs be, also account for possible barrier using
3385 "sls_length" attribute.
3386 (sls_length): New attribute.
3387 (length): Determine default using any non-default sls_length
3390 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
3392 * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
3394 (aarch64_harden_sls_blr_p): New.
3395 * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
3397 (aarch64_harden_sls_retbr_p): New.
3398 (aarch64_harden_sls_blr_p): New.
3399 (aarch64_validate_sls_mitigation): New.
3400 (aarch64_override_options): Parse options for SLS mitigation.
3401 * config/aarch64/aarch64.opt (-mharden-sls): New option.
3402 * doc/invoke.texi: Document new option.
3404 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
3406 * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization
3407 with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION
3408 or nested-cycle reduction.
3410 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
3412 * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string
3413 for fully masking to be more common.
3415 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
3417 * config/riscv/riscv.md (get_thread_pointer<mode>): New.
3419 * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
3420 Document __builtin_thread_pointer.
3422 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
3424 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
3425 Abort if any arguments on stack.
3427 2020-07-08 Eric Botcazou <ebotcazou@gcc.gnu.org>
3429 * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if
3430 either type has reverse scalar storage order.
3431 * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through
3432 a memory copy if either type has reverse scalar storage order.
3434 2020-07-08 Tobias Burnus <tobias@codesourcery.com>
3436 * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic
3437 on to the native compiler, if used.
3438 * config/nvptx/mkoffload.c (compile_native, main): Likewise.
3440 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com>
3442 * config/rs6000/altivec.h (vec_vmsumudm): New define.
3443 * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
3444 (altivec_vmsumudm): New define_insn.
3445 * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
3446 entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
3447 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for
3448 ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
3449 * doc/extend.texi: Add document for vmsumudm behind vmsum.
3451 2020-07-08 Richard Biener <rguenther@suse.de>
3453 * tree-vect-stmts.c (get_group_load_store_type): Pass
3454 in the SLP node and the alignment support scheme output.
3456 (get_load_store_type): Likewise.
3457 (vectorizable_store): Adjust.
3458 (vectorizable_load): Likewise.
3460 2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
3463 * expr.c (expand_expr_real_2): Get the mode from the type rather
3464 than the rtx, and assert that it is consistent with the mode of
3465 the rtx (where known). Optimize all constant integers, not just
3466 those that can be represented in poly_int64.
3468 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
3470 * config/rs6000/vsx.md (len_load_v16qi): New define_expand.
3471 (len_store_v16qi): Likewise.
3473 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
3475 * doc/md.texi (len_load_@var{m}): Document.
3476 (len_store_@var{m}): Likewise.
3477 * internal-fn.c (len_load_direct): New macro.
3478 (len_store_direct): Likewise.
3479 (expand_len_load_optab_fn): Likewise.
3480 (expand_len_store_optab_fn): Likewise.
3481 (direct_len_load_optab_supported_p): Likewise.
3482 (direct_len_store_optab_supported_p): Likewise.
3483 (expand_mask_load_optab_fn): New macro. Original renamed to ...
3484 (expand_partial_load_optab_fn): ... here. Add handlings for
3486 (expand_mask_store_optab_fn): New macro. Original renamed to ...
3487 (expand_partial_store_optab_fn): ... here. Add handlings for
3489 (internal_load_fn_p): Handle IFN_LEN_LOAD.
3490 (internal_store_fn_p): Handle IFN_LEN_STORE.
3491 (internal_fn_stored_value_index): Handle IFN_LEN_STORE.
3492 * internal-fn.def (LEN_LOAD): New internal function.
3493 (LEN_STORE): Likewise.
3494 * optabs.def (len_load_optab, len_store_optab): New optab.
3496 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
3498 * config/aarch64/aarch64.c (thunderx2t99_regmove_cost,
3499 thunderx2t99_vector_cost): Likewise.
3501 2020-07-07 Richard Biener <rguenther@suse.de>
3503 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix
3504 group overlap condition to allow negative step DR groups.
3505 * tree-vect-stmts.c (get_group_load_store_type): For
3506 multi element SLP groups force VMAT_STRIDED_SLP when the step
3509 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com>
3511 * doc/generic.texi: Fix typo.
3513 2020-07-07 Richard Biener <rguenther@suse.de>
3515 * lto-streamer-out.c (cmp_symbol_files): Use the computed
3516 order map to sort symbols from the same sub-file together.
3517 (lto_output): Compute a map of sub-file to an order number
3518 it appears in the symbol output array.
3520 2020-07-06 Richard Biener <rguenther@suse.de>
3522 PR tree-optimization/96075
3523 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
3524 TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
3525 for the misalignment calculation for negative step.
3527 2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
3529 * config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
3530 (*vsub_addsi4): New instruction.
3532 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
3534 * config/cris/cris.md (movulsr): New peephole2.
3536 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
3538 * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"):
3539 Correct gcc_assert of overlapping operands.
3541 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
3543 * config/cris/cris.c (cris_select_cc_mode): Always return
3544 CC_NZmode for matching comparisons. Clarify comments.
3545 * config/cris/cris-modes.def: Clarify mode comment.
3546 * config/cris/cris.md (plusminus, plusminusumin, plusumin): New
3548 (addsub, addsubbo, nd): New code iterator attributes.
3549 ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code
3550 iterator constructs instead of match_operator constructs.
3551 ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from
3552 "*extop<mode>si<setnz>".
3553 ("*add<su>qihi_swap"): Similar from "*addxqihi_swap".
3554 ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from
3555 "*extop<mode>si<setnz>_swap".
3557 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
3559 * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap")
3560 ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate.
3562 2020-07-03 Eric Botcazou <ebotcazou@gcc.gnu.org>
3564 * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that
3565 were initially created for the assignment of a variable-sized
3566 object and whose source is now a string constant.
3567 * gimple-ssa-store-merging.c (struct merged_store_group): Document
3568 STRING_CST for rhs_code field.
3569 Add string_concatenation boolean field.
3570 (merged_store_group::merged_store_group): Initialize it as well as
3572 (merged_store_group::do_merge): Set it upon seeing a STRING_CST.
3573 Also set bit_insertion here upon seeing a BIT_INSERT_EXPR.
3574 (merged_store_group::apply_stores): Clear it for small regions.
3575 Do not create a power-of-2-sized buffer if it is still true.
3576 And do not set bit_insertion here again.
3577 (encode_tree_to_bitpos): Deal with BLKmode for the expression.
3578 (merged_store_group::can_be_merged_into): Deal with STRING_CST.
3579 (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion
3580 to true after changing MEM_REF stores into BIT_INSERT_EXPR stores.
3581 (count_multiple_uses): Return 0 for STRING_CST.
3582 (split_group): Do not split the group for a string concatenation.
3583 (imm_store_chain_info::output_merged_store): Constify and rename
3584 some local variables. Build an array type as destination type
3585 for a string concatenation, as well as a zero mask, and call
3586 build_string to build the source.
3587 (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR.
3588 (pass_store_merging::process_store): Accept STRING_CST on the RHS.
3589 * gimple.h (gimple_call_alloca_for_var_p): New accessor function.
3590 * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var.
3591 * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY.
3593 2020-07-03 Martin Jambor <mjambor@suse.cz>
3596 * ipa-sra.c (all_callee_accesses_present_p): Do not accept type
3597 mismatched accesses.
3599 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
3601 * config/nvptx/nvptx.md (popcount<mode>2): New instructions.
3602 (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions.
3604 2020-07-03 Martin Liska <mliska@suse.cz>
3605 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3608 * gcov-dump.c (tag_function): Use gcov_position_t
3611 2020-07-03 Richard Biener <rguenther@suse.de>
3613 PR tree-optimization/96037
3614 * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def.
3616 2020-07-03 Richard Biener <rguenther@suse.de>
3618 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the
3619 original non-pattern stmts, look at the pattern stmt
3620 vectorization status.
3622 2020-07-03 Andrew Stubbs <ams@codesourcery.com>
3624 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
3626 2020-07-03 Richard Biener <rguenther@suse.de>
3628 * tree-vectorizer.h (vec_info::insert_on_entry): New.
3629 (vec_info::insert_seq_on_entry): Likewise.
3630 * tree-vectorizer.c (vec_info::insert_on_entry): Implement.
3631 (vec_info::insert_seq_on_entry): Likewise.
3632 * tree-vect-stmts.c (vect_init_vector_1): Use
3633 vec_info::insert_on_entry.
3634 (vect_finish_stmt_generation): Set modified bit after
3636 * tree-vect-slp.c (vect_create_constant_vectors): Simplify
3637 by using vec_info::insert_seq_on_entry and bypassing
3639 (vect_schedule_slp_instance): Deal with all-constant
3642 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
3643 Tom de Vries <tdevries@suse.de>
3646 * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi
3647 to access TYPE_SIZE (type). Return at least the mode's alignment.
3649 2020-07-02 Richard Biener <rguenther@suse.de>
3651 PR tree-optimization/96028
3652 * tree-vect-slp.c (vect_slp_convert_to_external): Make sure
3653 we have scalar stmts to use.
3654 (vect_slp_analyze_node_operations): When analyzing a child
3655 failed try externalizing the parent node.
3657 2020-07-02 Martin Jambor <mjambor@suse.cz>
3660 * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust
3661 argument index if necessary.
3663 2020-07-02 Martin Liska <mliska@suse.cz>
3666 * tree-vect-generic.c (expand_vector_condition): Forward declaration.
3667 (expand_vector_comparison): Do not expand a comparison if all
3668 uses are consumed by a VEC_COND_EXPR.
3669 (expand_vector_operation): Change void return type to bool.
3670 (expand_vector_operations_1): Pass dce_ssa_names.
3672 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com>
3675 * system.h (NULL): Redefine to nullptr.
3677 2020-07-02 Jakub Jelinek <jakub@redhat.com>
3679 PR tree-optimization/95857
3680 * tree-cfg.c (group_case_labels_stmt): When removing an unreachable
3681 base_bb, remember all forced and non-local labels on it and later
3682 treat those as if they have NULL label_to_block. Formatting fix.
3685 2020-07-02 Richard Biener <rguenther@suse.de>
3687 PR tree-optimization/96022
3688 * tree-vect-stmts.c (vectorizable_shift): Only use the
3689 first vector stmt when extracting the scalar shift amount.
3690 * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary
3691 nodes with all-scalar children from scalars but not stores.
3692 (vect_analyze_slp_instance): Mark the node not failed.
3694 2020-07-02 Felix Yang <felix.yang@huawei.com>
3696 PR tree-optimization/95961
3697 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the
3698 number of scalars instead of the number of vectors as an upper bound
3699 for the loop saving info about DR in the hash table. Remove unused
3702 2020-07-02 Jakub Jelinek <jakub@redhat.com>
3704 * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with
3705 invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid
3706 OpenMP non-rectangular loops. Use XALLOCAVEC.
3708 2020-07-02 Martin Liska <mliska@suse.cz>
3710 PR gcov-profile/95348
3711 * coverage.c (read_counts_file): Read only COUNTERS that are
3713 * gcov-dump.c (tag_function): Change signature from unsigned to
3715 (tag_blocks): Likewise.
3716 (tag_arcs): Likewise.
3717 (tag_lines): Likewise.
3718 (tag_counters): Likewise.
3719 (tag_summary): Likewise.
3720 * gcov.c (read_count_file): Read all non-zero counters
3723 2020-07-02 Kito Cheng <kito.cheng@sifive.com>
3725 * config/riscv/multilib-generator (arch_canonicalize): Handle
3726 multi-letter extension.
3727 Using underline as separator between different extensions.
3729 2020-07-01 Pip Cet <pipcet@gmail.com>
3731 * spellcheck.c (test_data): Add problematic strings.
3732 (test_metric_conditions): Don't test the triangle inequality
3733 condition, which our distance function does not satisfy.
3735 2020-07-01 Omar Tahir <omar.tahir@arm.com>
3737 * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always
3738 generate a BTI instruction.
3740 2020-07-01 Jeff Law <law@redhat.com>
3742 PR tree-optimization/94882
3743 * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification.
3745 2020-07-01 Jeff Law <law@redhat.com>
3747 * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword.
3748 (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise.
3750 2020-07-01 Andrea Corallo <andrea.corallo@arm.com>
3752 * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums
3753 for 64bits fpsr/fpcr getter setters builtin variants.
3754 (aarch64_init_fpsr_fpcr_builtins): New function.
3755 (aarch64_general_init_builtins): Modify to make use of the later.
3756 (aarch64_expand_fpsr_fpcr_setter): New function.
3757 (aarch64_general_expand_builtin): Modify to make use of the later.
3758 * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>)
3759 (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and
3760 generalizing 'get_fpcr', 'set_fpsr'.
3761 * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int
3763 (fpscr_name): New int attribute.
3764 * doc/extend.texi (__builtin_aarch64_get_fpcr64)
3765 (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64)
3766 (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in
3769 2020-07-01 Martin Liska <mliska@suse.cz>
3771 * gcov.c (print_usage): Avoid trailing space for -j option.
3773 2020-07-01 Richard Biener <rguenther@suse.de>
3775 PR tree-optimization/95839
3776 * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing
3777 vectors are not uniform.
3778 (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of
3780 (vect_build_slp_tree_2): For groups of lane extracts
3781 from a vector register generate a permute node
3782 with a special child representing the pre-existing vector.
3783 (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing.
3784 (vect_slp_analyze_node_operations): Use SLP_TREE_LANES.
3785 (vectorizable_slp_permutation): Do not generate or cost identity
3787 (vect_schedule_slp_instance): Handle pre-existing vector
3788 that are function arguments.
3790 2020-07-01 Richard Biener <rguenther@suse.de>
3792 * system.h (INCLUDE_ISL): New guarded include.
3793 * graphite-dependences.c: Use it.
3794 * graphite-isl-ast-to-gimple.c: Likewise.
3795 * graphite-optimize-isl.c: Likewise.
3796 * graphite-poly.c: Likewise.
3797 * graphite-scop-detection.c: Likewise.
3798 * graphite-sese-to-poly.c: Likewise.
3799 * graphite.c: Likewise.
3800 * graphite.h: Drop the includes here.
3802 2020-07-01 Martin Liska <mliska@suse.cz>
3804 * gcov.c (print_usage): Shorted option description for -j
3807 2020-07-01 Martin Liska <mliska@suse.cz>
3809 * doc/gcov.texi: Rename 2 options.
3810 * gcov.c (print_usage): Rename -i,--json-format to
3811 -j,--json-format and -j,--human-readable to -H,--human-readable.
3812 (process_args): Fix up parsing. Document obsolete options and
3813 how are they changed.
3815 2020-07-01 Jeff Law <law@redhat.com>
3817 * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword.
3818 (pa_output_ascii): Likewise.
3820 2020-07-01 Kito Cheng <kito.cheng@sifive.com>
3822 * common/config/riscv/riscv-common.c (riscv_subset_t): New field
3824 (riscv_subset_list::parsing_subset_version): Add parameter for
3825 indicate explicitly version, and handle explicitly version.
3826 (riscv_subset_list::handle_implied_ext): Ditto.
3827 (riscv_subset_list::add): Ditto.
3828 (riscv_subset_t::riscv_subset_t): Init new field.
3829 (riscv_subset_list::to_string): Always output version info if version
3830 explicitly specified.
3831 (riscv_subset_list::parsing_subset_version): Handle explicitly
3833 (riscv_subset_list::parse_std_ext): Ditto.
3834 (riscv_subset_list::parse_multiletter_ext): Ditto.
3836 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
3840 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
3841 "Advanced SIMD type".
3842 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
3843 attributes are equal.
3844 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
3846 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
3847 in the "Advanced SIMD type" attribute.
3848 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
3849 attribute to each Advanced SIMD type, using the mangled type
3850 as the attribute's single argument.
3852 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
3855 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
3856 -mgeneral-regs-only is not used.
3858 2020-06-30 Yang Yang <yangyang305@huawei.com>
3860 PR tree-optimization/95855
3861 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
3862 checks to recognize a missed if-conversion opportunity when
3863 judging whether to duplicate a block.
3865 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
3867 * doc/extend.texi: Change references to "future architecture" to
3868 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
3869 references to "future" (because the future is now).
3871 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
3873 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
3875 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
3877 * simplify-rtx.c (simplify_distributive_operation): New function
3878 to un-distribute a binary operation of two binary operations.
3879 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
3880 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
3882 (test_scalar_int_ops): New function for unit self-testing
3883 scalar integer transformations in simplify-rtx.c.
3884 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
3885 (simplify_rtx_c_tests): Call test_scalar_ops.
3887 2020-06-29 Richard Biener <rguenther@suse.de>
3889 PR tree-optimization/95916
3890 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
3891 the case of not vectorized externals.
3893 2020-06-29 Richard Biener <rguenther@suse.de>
3895 * tree-vectorizer.h: Do not include <utility>.
3897 2020-06-29 Martin Liska <mliska@suse.cz>
3899 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
3900 instead of gimple_stmt_iterator::bb.
3901 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
3902 * tree-vectorizer.h: Likewise.
3904 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
3906 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
3907 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
3908 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
3909 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
3910 (gcn_dwarf_register_number): New function.
3911 (gcn_dwarf_register_span): New function.
3912 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
3914 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
3916 PR tree-optimization/95854
3917 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
3918 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
3919 unsigned HOST_WIDE_INT.
3921 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3923 * config/sparc/sparc.c (epilogue_renumber): Remove register.
3924 (sparc_print_operand_address): Likewise.
3925 (sparc_type_code): Likewise.
3926 (set_extends): Likewise.
3928 2020-06-29 Martin Liska <mliska@suse.cz>
3930 PR tree-optimization/92860
3931 * optc-save-gen.awk: Add exceptions for arc target.
3933 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
3935 * doc/sourcebuild.texi: Describe globbing of the
3936 dump file scanning commands "suffix" argument.
3938 2020-06-28 Martin Sebor <msebor@redhat.com>
3941 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
3943 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
3945 * tree.c (get_nonnull_args): Consider the this pointer implicitly
3947 * var-tracking.c (deps_vec): New type.
3948 (var_loc_dep_vec): New function.
3949 (VAR_LOC_DEP_VEC): Use it.
3951 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
3953 * internal-fn.c (direct_mask_load_optab_supported_p): Use
3954 convert_optab_supported_p instead of direct_optab_supported_p.
3955 (direct_mask_store_optab_supported_p): Likewise.
3957 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
3959 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
3960 simplify_using_ranges class.
3961 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
3962 field. Adjust all methods to use new field.
3963 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
3964 simplify_using_ranges class.
3965 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
3966 field. Adjust all methods to use new field.
3967 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
3968 (vrp_prop::vrp_finalize): New vrp_folder argument.
3969 (execute_vrp): Pass folder to vrp_finalize. Use
3970 simplify_using_ranges class.
3971 Remove cleanup_edges_and_switches call.
3972 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
3973 value_range_equiv uses to value_range.
3974 (simplify_using_ranges::op_with_boolean_value_range_p): Use
3975 simplify_using_ranges class.
3976 (check_for_binary_op_overflow): Make static.
3977 (vr_values::extract_range_basic): Pass this to
3978 check_for_binary_op_overflow.
3979 (compare_range_with_value): Change value_range_equiv uses to
3981 (vr_values::vr_values): Initialize simplifier field.
3982 Remove uses of to_remove_edges and to_update_switch_stmts.
3983 (vr_values::~vr_values): Remove uses of to_remove_edges and
3984 to_update_switch_stmts.
3985 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
3987 (vr_values::compare_name_with_value): Same.
3988 (vr_values::compare_names): Same.
3989 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
3990 (vr_values::vrp_evaluate_conditional): Same.
3991 (vr_values::vrp_visit_cond_stmt): Same.
3992 (find_case_label_ranges): Change value_range_equiv uses to
3994 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
3995 (vr_values::simplify_truth_ops_using_ranges): Move to
3996 simplify_using_ranges class.
3997 (vr_values::simplify_div_or_mod_using_ranges): Same.
3998 (vr_values::simplify_min_or_max_using_ranges): Same.
3999 (vr_values::simplify_abs_using_ranges): Same.
4000 (vr_values::simplify_bit_ops_using_ranges): Same.
4001 (test_for_singularity): Change value_range_equiv uses to
4003 (range_fits_type_p): Same.
4004 (vr_values::simplify_cond_using_ranges_1): Same.
4005 (vr_values::simplify_cond_using_ranges_2): Make extern.
4006 (vr_values::fold_cond): Move to simplify_using_ranges class.
4007 (vr_values::simplify_switch_using_ranges): Same.
4008 (vr_values::cleanup_edges_and_switches): Same.
4009 (vr_values::simplify_float_conversion_using_ranges): Same.
4010 (vr_values::simplify_internal_call_using_ranges): Same.
4011 (vr_values::two_valued_val_range_p): Same.
4012 (vr_values::simplify_stmt_using_ranges): Move to...
4013 (simplify_using_ranges::simplify): ...here.
4014 * vr-values.h (class vr_values): Move all the simplification of
4015 statements using ranges methods and code from here...
4016 (class simplify_using_ranges): ...to here.
4017 (simplify_cond_using_ranges_2): New extern prototype.
4019 2020-06-27 Jakub Jelinek <jakub@redhat.com>
4021 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
4022 member, move outer member.
4023 (struct omp_for_data): Add first_nonrect and last_nonrect members.
4024 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
4025 last_nonrect and non_rect_referenced members.
4026 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
4028 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
4029 non-rectangular loops.
4030 (extract_omp_for_update_vars): Likewise.
4031 (expand_omp_for_generic, expand_omp_for_static_nochunk,
4032 expand_omp_for_static_chunk, expand_omp_simd,
4033 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
4034 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
4035 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
4038 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
4041 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
4043 * config/i386/i386.c (ix86_frame_pointer_required): Update
4046 2020-06-26 Yichao Yu <yyc1992@gmail.com>
4048 * multiple_target.c (redirect_to_specific_clone): Fix tests
4049 to check individual attribute rather than an attribute list.
4051 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
4053 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
4054 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
4057 2020-06-26 Marek Polacek <polacek@redhat.com>
4059 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
4060 * doc/standards.texi (C Language): Correct the default dialect.
4061 (C++ Language): Update the default for C++ to gnu++17.
4063 2020-06-26 Eric Botcazou <ebotcazou@gcc.gnu.org>
4065 * tree-ssa-reassoc.c (dump_range_entry): New function.
4066 (debug_range_entry): New debug function.
4067 (update_range_test): Invoke dump_range_entry for dumping.
4068 (optimize_range_tests_to_bit_test): Merge the entry test in the
4069 bit test when possible and lower the profitability threshold.
4071 2020-06-26 Richard Biener <rguenther@suse.de>
4073 PR tree-optimization/95897
4074 * tree-vectorizer.h (vectorizable_induction): Remove
4075 unused gimple_stmt_iterator * parameter.
4076 * tree-vect-loop.c (vectorizable_induction): Likewise.
4077 (vect_analyze_loop_operations): Adjust.
4078 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
4079 (vect_transform_stmt): Likewise.
4080 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
4081 for fold-left reductions, clarify existing reduction case.
4083 2020-06-25 Nick Clifton <nickc@redhat.com>
4085 * config/m32r/m32r.md (movsicc): Disable pattern.
4087 2020-06-25 Richard Biener <rguenther@suse.de>
4089 PR tree-optimization/95839
4090 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
4091 check on the number of datarefs.
4093 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
4095 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
4096 the insn_data n_operands value to unsigned.
4098 2020-06-25 Richard Biener <rguenther@suse.de>
4100 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
4101 vector defs to determine insertion place.
4103 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
4106 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
4107 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
4108 (PTA_TIGERLAKE): Add PTA_CLWB.
4110 2020-06-25 Richard Biener <rguenther@suse.de>
4112 PR tree-optimization/95866
4113 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
4114 vectorized shift operands. For scalar shifts use lane zero
4115 of a vectorized shift operand.
4117 2020-06-25 Martin Liska <mliska@suse.cz>
4119 PR tree-optimization/95745
4121 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
4122 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
4124 * tree-vect-generic.c (expand_vector_condition): Remove dead
4125 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
4127 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
4130 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
4131 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
4132 (convert_4f32_8f16): New define_expand
4133 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
4135 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
4136 overloaded builtin entry.
4137 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
4138 (vsx_xvcvsphp): New define_insn.
4140 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
4141 Segher Boessenkool <segher@kernel.crashing.org>
4143 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
4145 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
4147 * simplify-rtx.c (simplify_unary_operation_1): Simplify
4148 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
4150 2020-06-24 Richard Biener <rguenther@suse.de>
4152 PR tree-optimization/95866
4153 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
4154 (vect_build_slp_tree_2): Properly reset matches[0],
4155 ignore uniform constants.
4157 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4160 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
4161 (cpu_indicator_init): Likewise.
4162 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
4164 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4167 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
4168 detection with AVX512BF16.
4170 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4173 * common/config/i386/i386-isas.h: New file. Extracted from
4174 gcc/config/i386/i386-builtins.c.
4175 (_isa_names_table): Add option.
4176 (ISA_NAMES_TABLE_START): New.
4177 (ISA_NAMES_TABLE_END): Likewise.
4178 (ISA_NAMES_TABLE_ENTRY): Likewise.
4179 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
4180 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
4181 from enum processor_features.
4182 * config/i386/driver-i386.c: Include
4183 "common/config/i386/cpuinfo.h" and
4184 "common/config/i386/i386-isas.h".
4185 (has_feature): New macro.
4186 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
4187 features. Use has_feature to detect processor features. Call
4188 Call get_intel_cpu to get the newer Intel CPU name. Use
4189 isa_names_table to generate command-line options.
4190 * config/i386/i386-builtins.c: Include
4191 "common/config/i386/i386-isas.h".
4192 (_arch_names_table): Removed.
4193 (isa_names_table): Likewise.
4195 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4198 * common/config/i386/cpuinfo.h: New file.
4199 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
4200 (__processor_model2): New.
4201 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
4202 (has_cpu_feature): New function.
4203 (set_cpu_feature): Likewise.
4204 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
4205 CHECK___builtin_cpu_is. Return AMD CPU name.
4206 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
4207 Use CHECK___builtin_cpu_is. Return Intel CPU name.
4208 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
4209 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
4210 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
4211 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
4212 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
4213 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
4214 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
4215 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
4216 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
4217 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
4218 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
4219 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
4220 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
4221 FEATURE_XSAVEOPT and FEATURE_XSAVES
4222 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
4223 Also update cpu_model2.
4224 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
4225 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
4226 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
4227 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
4228 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
4229 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
4230 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
4231 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
4232 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
4233 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
4234 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
4235 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
4236 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
4237 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
4238 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
4239 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
4240 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
4241 (SIZE_OF_CPU_FEATURES): New.
4242 * config/i386/i386-builtins.c (processor_features): Removed.
4243 (isa_names_table): Replace F_XXX with FEATURE_XXX.
4244 (fold_builtin_cpu): Change __cpu_features2 to an array.
4246 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4249 * common/config/i386/i386-common.c (processor_alias_table): Add
4250 processor model and priority to each entry.
4251 (pta_size): Updated with -6.
4252 (num_arch_names): New.
4253 * common/config/i386/i386-cpuinfo.h: New file.
4254 * config/i386/i386-builtins.c (feature_priority): Removed.
4255 (processor_model): Likewise.
4256 (_arch_names_table): Likewise.
4257 (arch_names_table): Likewise.
4258 (_isa_names_table): Replace P_ZERO with P_NONE.
4259 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
4260 processor_alias_table.
4261 (fold_builtin_cpu): Replace arch_names_table with
4262 processor_alias_table.
4263 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
4264 (pta): Add model and priority.
4265 (num_arch_names): New.
4267 2020-06-24 Richard Biener <rguenther@suse.de>
4269 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
4271 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
4272 Simplify for new position of vectorized SLP loads.
4273 (vect_slp_analyze_node_dependences): Adjust for it.
4274 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
4275 for the first stmts dataref.
4276 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
4277 (vect_schedule_slp_instance): Emit loads before the
4279 * tree-vect-stmts.c (vectorizable_load): Do what the comment
4280 says and use vect_find_first_scalar_stmt_in_slp.
4282 2020-06-24 Richard Biener <rguenther@suse.de>
4284 PR tree-optimization/95856
4285 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
4288 2020-06-24 Jakub Jelinek <jakub@redhat.com>
4291 * fold-const.c (fold_cond_expr_with_comparison): Optimize
4292 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
4294 2020-06-24 Jakub Jelinek <jakub@redhat.com>
4296 * omp-low.c (lower_omp_for): Fix two pastos.
4298 2020-06-24 Martin Liska <mliska@suse.cz>
4300 * optc-save-gen.awk: Compare string options in cl_optimization_compare
4303 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
4305 * config.gcc: Identify power10 as a 64-bit processor and as valid
4306 for --with-cpu and --with-tune.
4308 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
4310 * Makefile.in (LANG_MAKEFRAGS): Same.
4311 (tmake_file): Use -include.
4314 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
4316 * REVISION: Delete file meant for a private branch.
4318 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
4321 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
4322 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
4324 2020-06-23 Alexandre Oliva <oliva@adacore.com>
4326 * collect-utils.h (dumppfx): New.
4327 * collect-utils.c (dumppfx): Likewise.
4328 * lto-wrapper.c (run_gcc): Set global dumppfx.
4329 (compile_offload_image): Pass a -dumpbase on to mkoffload.
4330 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
4331 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
4333 (compile_native): Pass -dumpbase et al to compiler.
4334 * config/gcn/mkoffload.c (gcn_dumpbase): New.
4335 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
4336 save_temps. Pass -dumpbase et al to offload target compiler.
4337 (compile_native): Pass -dumpbase et al to compiler.
4339 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
4341 * REVISION: New file.
4343 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
4345 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
4346 Update comment for ISA 3.1.
4347 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
4348 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
4349 on AIX, and -mpower10 elsewhere.
4350 * config/rs6000/future.md: Delete.
4351 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
4353 * config/rs6000/power10.md: New file.
4354 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
4355 PPC_PLATFORM_FUTURE.
4356 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
4357 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
4358 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
4359 Use BU_P10_* instead of BU_FUTURE_*.
4360 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
4361 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
4362 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
4363 FUTURE_BUILTIN_VEC_XXEVAL.
4364 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
4365 Update compiler messages.
4366 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
4367 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
4368 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
4370 * config/rs6000/rs6000-string.c: Ditto.
4371 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
4372 instead of "future", reorder it to right after "power9".
4373 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
4374 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
4375 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
4376 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
4377 not ISA_FUTURE_MASKS_SERVER.
4378 (rs6000_opt_masks): Use "power10" instead of "future".
4379 (rs6000_builtin_mask_names): Ditto.
4380 (rs6000_disable_incompatible_switches): Ditto.
4381 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
4382 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
4383 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
4384 not RS6000_BTM_FUTURE.
4385 * config/rs6000/rs6000.md: Use "power10", not "future". Use
4386 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
4388 * config/rs6000/rs6000.opt (mfuture): Delete.
4390 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
4391 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
4393 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
4395 * coretypes.h (first_type): Delete.
4396 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
4398 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4400 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
4401 (arm_mve_hw): Likewise.
4403 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
4406 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
4409 2020-06-22 Richard Biener <rguenther@suse.de>
4411 PR tree-optimization/95770
4412 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
4415 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
4417 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
4418 (gcn_return_in_memory): Return vectors in memory.
4420 2020-06-22 Jakub Jelinek <jakub@redhat.com>
4422 * omp-general.c (omp_extract_for_data): For triangular loops with
4423 all loop invariant expressions constant where the innermost loop is
4424 executed at least once compute number of iterations at compile time.
4426 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
4428 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
4429 (DRIVER_SELF_SPECS): New.
4431 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
4433 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
4434 (RISCV_FTYPE_ATYPES0): New.
4435 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
4436 * config/riscv/riscv-ftypes.def: Remove VOID argument.
4438 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
4440 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
4441 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
4444 (ASM_CPU_SPEC): Remove vsx and altivec options.
4445 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
4448 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
4449 (TARGET_DEFAULT): Only define if not BIARCH.
4450 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
4453 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
4456 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
4457 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
4459 (CPLUSPLUS_CPP_SPEC): Same.
4462 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
4463 * config/rs6000/defaultaix64.h: New file.
4464 * config/rs6000/t-aix64: New file.
4466 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
4468 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
4469 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
4470 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
4472 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
4473 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
4474 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
4475 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
4476 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
4477 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
4478 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
4479 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
4480 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
4481 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
4482 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
4483 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
4484 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
4485 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
4486 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
4487 Allow zero constants.
4488 (print_operand) <case 'A'>: New output modifier.
4489 (rs6000_split_multireg_move): Add support for inserting accumulator
4490 priming and depriming instructions. Add support for splitting an
4491 assemble accumulator pattern.
4492 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
4493 rs6000_gimple_fold_mma_builtin): New functions.
4494 (RS6000_BUILTIN_M): New macro.
4495 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
4496 (bdesc_mma): Add new MMA built-in support.
4497 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
4498 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
4500 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
4501 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
4502 and rs6000_gimple_fold_mma_builtin.
4503 (rs6000_expand_builtin): Call mma_expand_builtin.
4504 Use RS6000_BTC_OPND_MASK.
4505 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
4506 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
4507 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
4508 VSX_BUILTIN_XVCVBF16SP.
4509 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
4510 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
4511 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
4512 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
4513 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
4514 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
4515 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
4516 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
4517 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
4518 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
4519 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
4520 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
4521 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
4522 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
4523 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
4524 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
4525 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
4526 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
4527 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
4528 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
4529 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
4530 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
4531 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
4532 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
4533 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
4534 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
4535 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
4536 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
4537 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
4538 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
4539 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
4540 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
4541 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
4542 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
4543 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
4544 MMA_AVVI4I4I4): New define_int_iterator.
4545 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
4546 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
4547 avvi4i4i4): New define_int_attr.
4548 (*movpxi): Add zero constant alternative.
4549 (mma_assemble_pair, mma_assemble_acc): New define_expand.
4550 (*mma_assemble_acc): New define_insn_and_split.
4551 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
4552 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
4553 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
4554 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
4555 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
4556 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
4557 (UNSPEC_VSX_XVCVSPBF16): Likewise.
4558 (XVCVBF16): New define_int_iterator.
4559 (xvcvbf16): New define_int_attr.
4560 (vsx_<xvcvbf16>): New define_insn.
4561 * doc/extend.texi: Document the mma built-ins.
4563 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
4564 Michael Meissner <meissner@linux.ibm.com>
4566 * config/rs6000/mma.md: New file.
4567 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
4569 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
4570 for __vector_pair and __vector_quad types.
4571 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
4573 (POWERPC_MASKS): Likewise.
4574 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
4575 (POI, PXI): New partial integer modes.
4576 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
4577 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
4578 (rs6000_hard_regno_mode_ok_uncached): Likewise.
4579 Add support for POImode being allowed in VSX registers and PXImode
4580 being allowed in FP registers.
4581 (rs6000_modes_tieable_p): Adjust comment.
4582 Add support for POImode and PXImode.
4583 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
4584 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
4585 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
4586 Set up appropriate addr_masks for vector pair and vector quad addresses.
4587 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
4588 vector quad registers. Setup reload handlers for POImode and PXImode.
4589 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
4590 (rs6000_option_override_internal): Error if -mmma is specified
4591 without -mcpu=future.
4592 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
4593 (quad_address_p): Change size test to less than 16 bytes.
4594 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
4595 and vector quad instructions.
4596 (avoiding_indexed_address_p): Likewise.
4597 (rs6000_emit_move): Disallow POImode and PXImode moves involving
4599 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
4600 and FP registers for PXImode.
4601 (rs6000_split_multireg_move): Support splitting POImode and PXImode
4603 (rs6000_mangle_type): Adjust comment. Add support for mangling
4604 __vector_pair and __vector_quad types.
4605 (rs6000_opt_masks): Add entry for mma.
4606 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
4607 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
4608 (address_to_insn_form): Likewise.
4609 (reg_to_non_prefixed): Likewise.
4610 (rs6000_invalid_conversion): New function.
4611 * config/rs6000/rs6000.h (MASK_MMA): Define.
4612 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
4613 (VECTOR_ALIGNMENT_P): New helper macro.
4614 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
4615 (RS6000_BTM_MMA): Define.
4616 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
4617 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
4618 RS6000_BTI_vector_quad.
4619 (vector_pair_type_node): New.
4620 (vector_quad_type_node): New.
4621 * config/rs6000/rs6000.md: Include mma.md.
4622 (define_mode_iterator RELOAD): Add POI and PXI.
4623 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
4624 * config/rs6000/rs6000.opt (-mmma): New.
4625 * doc/invoke.texi: Document -mmma.
4627 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
4629 PR tree-optimization/95638
4630 * tree-loop-distribution.c (pg_edge_callback_data): New field.
4631 (loop_distribution::break_alias_scc_partitions): Record and restore
4632 postorder information. Fix memory leak.
4634 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
4636 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
4637 (output_file_start): Use const 'char *'.
4639 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
4641 PR tree-optimization/94880
4642 * match.pd (A | B) - B -> (A & ~B): New simplification.
4644 2020-06-19 Richard Biener <rguenther@suse.de>
4646 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
4647 for lane permutations.
4649 2020-06-19 Richard Biener <rguenther@suse.de>
4651 PR tree-optimization/95761
4652 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
4653 vectorized stmts for finding the last one.
4655 2020-06-18 Felix Yang <felix.yang@huawei.com>
4657 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
4658 vect_relevant_for_alignment_p to filter out data references in
4659 the loop whose alignment is irrelevant when trying loop peeling
4662 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
4664 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
4665 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
4666 mode iterator for the first operand of ZERO_EXTRACT RTX.
4667 Change ext_register_operand predicate to register_operand.
4668 Rename from *cmpqi_ext_1.
4669 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
4670 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
4671 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
4672 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
4673 (*extv<mode>): Use SWI24 mode iterator for the first operand
4674 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
4675 to register_operand.
4676 (*extzv<mode>): Use SWI248 mode iterator for the first operand
4677 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
4678 to register_operand.
4679 (*extzvqi): Use SWI248 mode iterator instead of SImode for
4680 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
4681 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
4683 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
4684 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
4685 mode iterator for the first operand of ZERO_EXTRACT RTX.
4686 Change ext_register_operand predicate to register_operand.
4687 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
4688 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
4690 (*insvqi_1): Use SWI248 mode iterator instead of SImode
4691 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
4692 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
4693 predicate to register_operand.
4696 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
4697 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
4698 mode iterator for the first operand of ZERO_EXTRACT RTX.
4699 Change ext_register_operand predicate to register_operand.
4700 (addqi_ext_1): New expander.
4701 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
4702 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
4703 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
4704 to register_operand. Rename from *addqi_ext_1.
4705 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
4706 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
4707 (udivmodqi4): Ditto.
4708 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
4709 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
4710 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
4711 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
4712 to register_operand. Rename from *testqi_ext_1.
4713 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
4714 (andqi_ext_1): New expander.
4715 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
4716 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
4717 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
4718 to register_operand. Rename from andqi_ext_1.
4719 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
4720 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
4721 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
4722 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
4723 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
4724 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
4725 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
4726 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
4727 to register_operand. Rename from *xorqi_ext_1_cc.
4728 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
4729 in mode, matching its first operand.
4730 (promote_duplicated_reg): Update for renamed insv<mode>_1.
4731 * config/i386/predicates.md (ext_register_operand): Remove predicate.
4733 2020-06-18 Martin Sebor <msebor@redhat.com>
4737 * builtins.c (compute_objsize): Remove call to
4738 compute_builtin_object_size and instead compute conservative sizes
4741 2020-06-18 Martin Liska <mliska@suse.cz>
4743 * coretypes.h (struct iterator_range): New type.
4744 * tree-vect-patterns.c (vect_determine_precisions): Use
4745 range-based iterator.
4746 (vect_pattern_recog): Likewise.
4747 * tree-vect-slp.c (_bb_vec_info): Likewise.
4748 (_bb_vec_info::~_bb_vec_info): Likewise.
4749 (vect_slp_check_for_constructors): Likewise.
4750 * tree-vectorizer.h:Add new iterators
4751 and functions that use it.
4753 2020-06-18 Martin Liska <mliska@suse.cz>
4755 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
4756 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
4757 of a VEC_COND_EXPR cannot be tcc_comparison and so that
4758 a SSA_NAME needs to be created before we use it for the first
4759 argument of the VEC_COND_EXPR.
4760 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
4762 2020-06-18 Richard Biener <rguenther@suse.de>
4765 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
4766 to the target if necessary.
4767 (expand_vect_cond_mask_optab_fn): Likewise.
4769 2020-06-18 Martin Liska <mliska@suse.cz>
4771 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
4772 vcond as we check for NULL pointer.
4774 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
4776 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
4777 silence empty-body warning with gcc_fallthrough.
4779 2020-06-18 Jakub Jelinek <jakub@redhat.com>
4781 PR tree-optimization/95699
4782 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
4783 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
4784 declarations to the statements that set them where possible.
4786 2020-06-18 Jakub Jelinek <jakub@redhat.com>
4789 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
4790 scalar mode halfvectype other than vector boolean for
4791 VEC_PACK_TRUNC_EXPR.
4793 2020-06-18 Richard Biener <rguenther@suse.de>
4795 * varasm.c (assemble_variable): Make sure to not
4796 defer output when outputting addressed constants.
4797 (output_constant_def_contents): Likewise.
4798 (add_constant_to_table): Take and pass on whether to
4800 (output_addressed_constants): Likewise.
4801 (output_constant_def): Pass on whether to defer output
4802 to add_constant_to_table.
4803 (tree_output_constant_def): Defer output of constants.
4805 2020-06-18 Richard Biener <rguenther@suse.de>
4807 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
4808 (_slp_tree::lane_permutation): New member.
4809 (_slp_tree::code): Likewise.
4810 (SLP_TREE_TWO_OPERATORS): Remove.
4811 (SLP_TREE_LANE_PERMUTATION): New.
4812 (SLP_TREE_CODE): Likewise.
4813 (vect_stmt_dominates_stmt_p): Declare.
4814 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
4815 * tree-vect-stmts.c (vect_model_simple_cost): Remove
4816 SLP_TREE_TWO_OPERATORS handling.
4817 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
4818 (_slp_tree::~_slp_tree): Likewise.
4819 (vect_two_operations_perm_ok_p): Remove.
4820 (vect_build_slp_tree_1): Remove verification of two-operator
4822 (vect_build_slp_tree_2): When we have two different operators
4823 build two computation SLP nodes and a blend.
4824 (vect_print_slp_tree): Print the lane permutation if it exists.
4825 (slp_copy_subtree): Copy it.
4826 (vect_slp_rearrange_stmts): Re-arrange it.
4827 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
4828 VEC_PERM_EXPR explicitely.
4829 (vect_schedule_slp_instance): Likewise. Remove old
4830 SLP_TREE_TWO_OPERATORS code.
4831 (vectorizable_slp_permutation): New function.
4833 2020-06-18 Martin Liska <mliska@suse.cz>
4835 * tree-vect-generic.c (expand_vector_condition): Check
4836 for gassign before inspecting RHS.
4838 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
4840 * gimplify.c (omp_notice_threadprivate_variable)
4841 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
4842 diagnostic. Adjust all users.
4844 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
4846 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
4847 NULL_TREE' check earlier.
4849 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
4851 * doc/extend.texi (attribute access): Fix a typo.
4853 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
4854 Kaipeng Zhou <zhoukaipeng3@huawei.com>
4856 PR tree-optimization/95199
4857 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
4858 strided load/store operations and remove redundant code.
4860 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
4862 * coretypes.h (first_type): New alias template.
4863 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
4864 Remove spurious “...” and split the function type out into a typedef.
4866 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
4868 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
4871 2020-06-17 Richard Biener <rguenther@suse.de>
4873 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
4874 in *vectype parameter.
4875 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
4876 vect_build_slp_tree_1 computed.
4877 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
4878 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
4879 (vect_schedule_slp_instance): Likewise.
4880 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
4881 from SLP_TREE_VECTYPE.
4883 2020-06-17 Richard Biener <rguenther@suse.de>
4885 PR tree-optimization/95717
4886 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
4887 Move BB SSA updating before exit/latch PHI current def copying.
4889 2020-06-17 Martin Liska <mliska@suse.cz>
4891 * Makefile.in: Add new file.
4892 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
4893 not meet this condition.
4894 (do_store_flag): Likewise.
4895 * gimplify.c (gimplify_expr): Gimplify first argument of
4896 VEC_COND_EXPR to be a SSA name.
4897 * internal-fn.c (vec_cond_mask_direct): New.
4898 (vec_cond_direct): Likewise.
4899 (vec_condu_direct): Likewise.
4900 (vec_condeq_direct): Likewise.
4901 (expand_vect_cond_optab_fn): New.
4902 (expand_vec_cond_optab_fn): Likewise.
4903 (expand_vec_condu_optab_fn): Likewise.
4904 (expand_vec_condeq_optab_fn): Likewise.
4905 (expand_vect_cond_mask_optab_fn): Likewise.
4906 (expand_vec_cond_mask_optab_fn): Likewise.
4907 (direct_vec_cond_mask_optab_supported_p): Likewise.
4908 (direct_vec_cond_optab_supported_p): Likewise.
4909 (direct_vec_condu_optab_supported_p): Likewise.
4910 (direct_vec_condeq_optab_supported_p): Likewise.
4911 * internal-fn.def (VCOND): New OPTAB.
4913 (VCONDEQ): Likewise.
4914 (VCOND_MASK): Likewise.
4915 * optabs.c (get_rtx_code): Make it global.
4916 (expand_vec_cond_mask_expr): Removed.
4917 (expand_vec_cond_expr): Removed.
4918 * optabs.h (expand_vec_cond_expr): Likewise.
4919 (vector_compare_rtx): Make it global.
4920 * passes.def: Add new pass_gimple_isel pass.
4921 * tree-cfg.c (verify_gimple_assign_ternary): Add check
4922 for VEC_COND_EXPR about first argument.
4923 * tree-pass.h (make_pass_gimple_isel): New.
4924 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
4925 propagation of the first argument of a VEC_COND_EXPR.
4926 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
4927 first argument of a VEC_COND_EXPR.
4928 (optimize_vec_cond_expr): Likewise.
4929 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
4930 for a first argument of created VEC_COND_EXPR.
4931 (expand_vector_condition): Fix coding style.
4932 * tree-vect-stmts.c (vectorizable_condition): Gimplify
4934 * gimple-isel.cc: New file.
4936 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
4938 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
4939 (BSS_SECTION_ASM_OP): Use ".bss".
4940 (ASM_SPEC): Remove "-mattr=-code-object-v3".
4941 (LINK_SPEC): Add "--export-dynamic".
4942 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
4943 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
4944 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
4945 (load_image): Remove obsolete relocation handling.
4946 Add ".kd" suffix to the symbol names.
4947 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
4948 (gcn_option_override): Update gcn_isa test.
4949 (gcn_kernel_arg_types): Update all the assembler directives.
4950 Remove the obsolete options.
4951 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
4952 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
4954 (output_file_start): Rework assembler file header.
4955 (gcn_hsa_declare_function_name): Rework kernel metadata.
4956 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
4957 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
4958 (PROCESSOR_VEGA10): New enum value.
4959 (PROCESSOR_VEGA20): New enum value.
4961 2020-06-17 Martin Liska <mliska@suse.cz>
4963 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
4965 * gcov-tool.c (print_version): Likewise.
4966 * gcov.c (print_version): Likewise.
4968 2020-06-17 liuhongt <hongtao.liu@intel.com>
4971 * config/i386/i386-expand.c
4972 (ix86_expand_vec_shift_qihi_constant): New function.
4973 * config/i386/i386-protos.h
4974 (ix86_expand_vec_shift_qihi_constant): Declare.
4975 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
4976 V*QImode by constant.
4978 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
4980 PR tree-optimization/95649
4981 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
4982 value is a constant.
4984 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4986 * config.in: Regenerate.
4987 * config/s390/s390.c (print_operand): Emit vector alignment hints
4988 for target z13, if AS accepts them. For other targets the logic
4990 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
4992 * configure: Regenerate.
4993 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
4995 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4997 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
4999 (__arm_vaddq_m_n_s32): Likewise.
5000 (__arm_vaddq_m_n_s16): Likewise.
5001 (__arm_vaddq_m_n_u8): Likewise.
5002 (__arm_vaddq_m_n_u32): Likewise.
5003 (__arm_vaddq_m_n_u16): Likewise.
5004 (__arm_vaddq_m): Modify polymorphic variant.
5006 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5008 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
5009 and constraint of all the operands.
5010 (mve_sqrshrl_sat<supf>_di): Likewise.
5011 (mve_uqrshl_si): Likewise.
5012 (mve_sqrshr_si): Likewise.
5013 (mve_uqshll_di): Likewise.
5014 (mve_urshrl_di): Likewise.
5015 (mve_uqshl_si): Likewise.
5016 (mve_urshr_si): Likewise.
5017 (mve_sqshl_si): Likewise.
5018 (mve_srshr_si): Likewise.
5019 (mve_srshrl_di): Likewise.
5020 (mve_sqshll_di): Likewise.
5021 * config/arm/predicates.md (arm_low_register_operand): Define.
5023 2020-06-16 Jakub Jelinek <jakub@redhat.com>
5025 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
5026 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
5027 or dist_schedule clause on non-rectangular loops. Handle
5028 gimplification of non-rectangular lb/b expressions. When changing
5029 iteration variable, adjust also non-rectangular lb/b expressions
5031 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
5033 (struct omp_for_data): Add non_rect member.
5034 * omp-general.c (omp_extract_for_data): Handle non-rectangular
5035 loops. Fill in non_rect, m1, m2 and outer.
5036 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
5037 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
5038 non-rectangular loop cases and assert for cases that can't be
5040 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
5041 (dump_omp_loop_non_rect_expr): New function.
5042 (dump_generic_node): Handle non-rectangular OpenMP loops.
5043 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
5044 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
5047 2020-06-16 Richard Biener <rguenther@suse.de>
5050 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
5052 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
5055 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
5056 assertion and turn it into a early exit check.
5058 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
5060 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
5061 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
5062 true and all elements are zero, then always clear. Return GS_ERROR
5063 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
5064 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
5065 the type is aggregate non-addressable, ask gimplify_init_constructor
5066 whether it can generate a single access to the target.
5068 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
5070 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
5071 access on the LHS is replaced with a scalar access, propagate the
5072 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
5074 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
5076 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
5077 TARGET_THREADPTR reference.
5078 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
5079 targetm.have_tls instead of TARGET_HAVE_TLS.
5080 (xtensa_option_override): Set targetm.have_tls to false in
5081 configurations without THREADPTR.
5083 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
5085 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
5087 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
5088 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
5089 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
5090 xtensa_windowed_abi if needed.
5091 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
5093 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
5094 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
5096 (mabi=call0, mabi=windowed): New options.
5097 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
5099 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
5101 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
5102 (TARGET_CAN_ELIMINATE): New macro.
5103 * config/xtensa/xtensa.h
5104 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
5105 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
5106 (HARD_FRAME_POINTER_REGNUM): Define using
5107 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
5108 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
5109 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
5110 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
5112 2020-06-15 Felix Yang <felix.yang@huawei.com>
5114 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
5115 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
5117 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
5119 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
5120 LOOP_VINFO_DATAREFS when possible.
5121 (update_epilogue_loop_vinfo): Likewise.
5123 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
5125 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
5127 (riscv_gpr_save_operation_p): Change type to unsigned for i and
5130 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
5133 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
5135 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
5136 * config/i386/sse.md (mul<mode>3): Drop mask_name since
5137 there's no real simd int8 multiplication instruction with
5138 mask. Also optimize it under TARGET_AVX512BW.
5139 (mulv8qi3): New expander.
5141 2020-06-12 Marco Elver <elver@google.com>
5143 * gimplify.c (gimplify_function_tree): Optimize and do not emit
5144 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
5145 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
5146 * tsan.c (instrument_memory_accesses): Make
5147 fentry_exit_instrument bool depend on new param.
5149 2020-06-12 Felix Yang <felix.yang@huawei.com>
5151 PR tree-optimization/95570
5152 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
5153 (vect_verify_datarefs_alignment): Call it to filter out data references
5154 in the loop whose alignment is irrelevant.
5155 (vect_get_peeling_costs_all_drs): Likewise.
5156 (vect_peeling_supportable): Likewise.
5157 (vect_enhance_data_refs_alignment): Likewise.
5159 2020-06-12 Richard Biener <rguenther@suse.de>
5161 PR tree-optimization/95633
5162 * tree-vect-stmts.c (vectorizable_condition): Properly
5163 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
5165 2020-06-12 Martin Liška <mliska@suse.cz>
5167 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
5168 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
5170 * lto-wrapper.c (merge_and_complain): Wrap option names.
5172 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
5174 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
5175 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
5176 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
5177 (vect_set_loop_condition_masked): Renamed to ...
5178 (vect_set_loop_condition_partial_vectors): ... this. Rename
5179 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
5180 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
5181 (vect_set_loop_condition_unmasked): Renamed to ...
5182 (vect_set_loop_condition_normal): ... this.
5183 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
5184 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
5185 to vect_set_loop_condition_partial_vectors.
5186 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
5187 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
5188 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
5190 (vect_analyze_loop_costing): ... this.
5191 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
5193 (vect_min_prec_for_max_niters): New, factored out from ...
5194 (vect_verify_full_masking): ... this. Rename
5195 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
5196 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
5197 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
5198 (vectorizable_reduction): Update some dumpings with partial
5199 vectors instead of fully-masked.
5200 (vectorizable_live_operation): Likewise.
5201 (vect_iv_limit_for_full_masking): Renamed to ...
5202 (vect_iv_limit_for_partial_vectors): ... this.
5203 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
5204 (check_load_store_for_partial_vectors): ... this. Update some
5205 dumpings with partial vectors instead of fully-masked.
5206 (vectorizable_store): Rename check_load_store_masking to
5207 check_load_store_for_partial_vectors.
5208 (vectorizable_load): Likewise.
5209 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
5210 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
5211 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
5212 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
5213 (vect_iv_limit_for_full_masking): Renamed to ...
5214 (vect_iv_limit_for_partial_vectors): this.
5215 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
5216 Rename iv_type to rgroup_iv_type.
5218 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
5220 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
5221 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
5222 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
5223 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
5224 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
5225 (insn_gen_fn::operator()): Replace overloaded definitions with
5226 a parameter-pack version.
5228 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
5231 * config/i386/i386-features.c (rest_of_insert_endbranch):
5233 (rest_of_insert_endbr_and_patchable_area): Change return type
5234 to void. Add need_endbr and patchable_area_size arguments.
5235 Don't call timevar_push nor timevar_pop. Replace
5236 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
5237 UNSPECV_PATCHABLE_AREA for patchable area.
5238 (pass_data_insert_endbranch): Renamed to ...
5239 (pass_data_insert_endbr_and_patchable_area): This. Change
5240 pass name to endbr_and_patchable_area.
5241 (pass_insert_endbranch): Renamed to ...
5242 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
5243 and patchable_area_size;.
5244 (pass_insert_endbr_and_patchable_area::gate): Set and check
5245 need_endbr and patchable_area_size.
5246 (pass_insert_endbr_and_patchable_area::execute): Call
5247 timevar_push and timevar_pop. Pass need_endbr and
5248 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
5249 (make_pass_insert_endbranch): Renamed to ...
5250 (make_pass_insert_endbr_and_patchable_area): This.
5251 * config/i386/i386-passes.def: Replace pass_insert_endbranch
5252 with pass_insert_endbr_and_patchable_area.
5253 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
5254 (make_pass_insert_endbranch): Renamed to ...
5255 (make_pass_insert_endbr_and_patchable_area): This.
5256 * config/i386/i386.c (ix86_asm_output_function_label): Set
5257 function_label_emitted to true.
5258 (ix86_print_patchable_function_entry): New function.
5259 (ix86_output_patchable_area): Likewise.
5260 (x86_function_profiler): Replace endbr_queued_at_entrance with
5261 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
5262 Call ix86_output_patchable_area to generate patchable area if
5264 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
5265 * config/i386/i386.h (queued_insn_type): New.
5266 (machine_function): Add function_label_emitted. Replace
5267 endbr_queued_at_entrance with insn_queued_at_entrance.
5268 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
5269 (patchable_area): New.
5271 2020-06-11 Martin Liska <mliska@suse.cz>
5273 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
5276 2020-06-11 Martin Liska <mliska@suse.cz>
5279 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
5282 2020-06-11 Martin Liska <mliska@suse.cz>
5283 Jakub Jelinek <jakub@redhat.com>
5286 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
5287 by using Pmode instead of ptr_mode.
5289 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
5291 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
5292 (vect_set_loop_control): ... this.
5293 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
5294 (vect_set_loop_masks_directly): Renamed to ...
5295 (vect_set_loop_controls_directly): ... this. Also rename some
5296 variables with ctrl instead of mask. Rename vect_set_loop_mask to
5297 vect_set_loop_control.
5298 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
5299 Also rename some variables with ctrl instead of mask.
5300 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
5301 (release_vec_loop_controls): ... this. Rename rgroup_masks related
5303 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
5304 release_vec_loop_controls.
5305 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
5306 (vect_get_max_nscalars_per_iter): Likewise.
5307 (vect_estimate_min_profitable_iters): Likewise.
5308 (vect_record_loop_mask): Likewise.
5309 (vect_get_loop_mask): Likewise.
5310 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
5311 (struct rgroup_controls): ... this. Also rename mask_type
5312 to type and rename masks to controls.
5314 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
5316 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
5317 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
5318 (vect_gen_vector_loop_niters): Likewise.
5319 (vect_do_peeling): Likewise.
5320 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
5321 fully_masked_p to using_partial_vectors_p.
5322 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
5323 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
5324 (determine_peel_for_niter): Likewise.
5325 (vect_estimate_min_profitable_iters): Likewise.
5326 (vect_transform_loop): Likewise.
5327 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
5328 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
5330 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
5332 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
5333 can_fully_mask_p to can_use_partial_vectors_p.
5334 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
5335 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
5336 to saved_can_use_partial_vectors_p.
5337 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
5338 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
5339 (vectorizable_live_operation): Likewise.
5340 * tree-vect-stmts.c (permute_vec_elements): Likewise.
5341 (check_load_store_masking): Likewise.
5342 (vectorizable_operation): Likewise.
5343 (vectorizable_store): Likewise.
5344 (vectorizable_load): Likewise.
5345 (vectorizable_condition): Likewise.
5346 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
5347 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
5348 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
5350 2020-06-11 Martin Liska <mliska@suse.cz>
5352 * optc-save-gen.awk: Quote error string.
5354 2020-06-11 Alexandre Oliva <oliva@adacore.com>
5356 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
5358 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
5360 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
5361 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
5363 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
5364 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
5366 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
5368 * config/riscv/predicates.md (gpr_save_operation): New.
5369 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
5370 (riscv_gpr_save_operation_p): Ditto.
5371 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
5372 Ignore USEs for gpr_save patter.
5373 * config/riscv/riscv.c (gpr_save_reg_order): New.
5374 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
5375 (riscv_gen_gpr_save_insn): New.
5376 (riscv_gpr_save_operation_p): Ditto.
5377 * config/riscv/riscv.md (S3_REGNUM): New.
5384 (S10_REGNUM): Ditto.
5385 (S11_REGNUM): Ditto.
5386 (gpr_save): Model USEs correctly.
5388 2020-06-10 Martin Sebor <msebor@redhat.com>
5392 * builtins.c (inform_access): New function.
5393 (check_access): Call it. Add argument.
5394 (addr_decl_size): Remove.
5395 (get_range): New function.
5396 (compute_objsize): New overload. Only use compute_builtin_object_size
5397 with raw memory function.
5398 (check_memop_access): Pass new argument to compute_objsize and
5400 (expand_builtin_memchr, expand_builtin_strcat): Same.
5401 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
5402 (expand_builtin_stpncpy, check_strncat_sizes): Same.
5403 (expand_builtin_strncat, expand_builtin_strncpy): Same.
5404 (expand_builtin_memcmp): Same.
5405 * builtins.h (check_nul_terminated_array): Declare extern.
5406 (check_access): Add argument.
5407 (struct access_ref, struct access_data): New structs.
5408 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
5409 (builtin_access::overlap): Call it.
5410 * tree-object-size.c (decl_init_size): Declare extern.
5411 (addr_object_size): Correct offset computation.
5412 * tree-object-size.h (decl_init_size): Declare.
5413 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
5414 to maybe_warn_overflow when assigning to an SSA_NAME.
5416 2020-06-10 Richard Biener <rguenther@suse.de>
5418 * tree-vect-loop.c (vect_determine_vectorization_factor):
5420 (_loop_vec_info::_loop_vec_info): Likewise.
5421 (vect_update_vf_for_slp): Likewise.
5422 (vect_analyze_loop_operations): Likewise.
5423 (update_epilogue_loop_vinfo): Likewise.
5424 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
5425 (vect_pattern_recog): Likewise.
5426 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
5427 (_bb_vec_info::_bb_vec_info): Likewise.
5428 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
5431 2020-06-10 Richard Biener <rguenther@suse.de>
5433 PR tree-optimization/95576
5434 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
5436 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
5439 * config/aarch64/aarch64-sve-builtins.h
5440 (sve_switcher::m_old_maximum_field_alignment): New member.
5441 * config/aarch64/aarch64-sve-builtins.cc
5442 (sve_switcher::sve_switcher): Save maximum_field_alignment in
5443 m_old_maximum_field_alignment and clear maximum_field_alignment.
5444 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
5446 2020-06-10 Richard Biener <rguenther@suse.de>
5448 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
5450 (_stmt_vec_info::vec_stmts): Likewise.
5451 (vec_info::stmt_vec_info_ro): New flag.
5452 (vect_finish_replace_stmt): Adjust declaration.
5453 (vect_finish_stmt_generation): Likewise.
5454 (vectorizable_induction): Likewise.
5455 (vect_transform_reduction): Likewise.
5456 (vectorizable_lc_phi): Likewise.
5457 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
5458 allocate stmt infos for increments.
5459 (vect_record_grouped_load_vectors): Adjust.
5460 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
5461 (vectorize_fold_left_reduction): Likewise.
5462 (vect_transform_reduction): Likewise.
5463 (vect_transform_cycle_phi): Likewise.
5464 (vectorizable_lc_phi): Likewise.
5465 (vectorizable_induction): Likewise.
5466 (vectorizable_live_operation): Likewise.
5467 (vect_transform_loop): Likewise.
5468 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
5469 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
5470 (vect_get_slp_defs): Likewise.
5471 (vect_transform_slp_perm_load): Likewise.
5472 (vect_schedule_slp_instance): Likewise.
5473 (vectorize_slp_instance_root_stmt): Likewise.
5474 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
5475 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
5476 (vect_finish_replace_stmt): Do not return anything.
5477 (vect_finish_stmt_generation): Likewise.
5478 (vect_build_gather_load_calls): Adjust.
5479 (vectorizable_bswap): Likewise.
5480 (vectorizable_call): Likewise.
5481 (vectorizable_simd_clone_call): Likewise.
5482 (vect_create_vectorized_demotion_stmts): Likewise.
5483 (vectorizable_conversion): Likewise.
5484 (vectorizable_assignment): Likewise.
5485 (vectorizable_shift): Likewise.
5486 (vectorizable_operation): Likewise.
5487 (vectorizable_scan_store): Likewise.
5488 (vectorizable_store): Likewise.
5489 (vectorizable_load): Likewise.
5490 (vectorizable_condition): Likewise.
5491 (vectorizable_comparison): Likewise.
5492 (vect_transform_stmt): Likewise.
5493 * tree-vectorizer.c (vec_info::vec_info): Initialize
5495 (vec_info::replace_stmt): Copy over stmt UID rather than
5496 unsetting/setting a stmt info allocating a new UID.
5497 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
5499 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
5501 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
5503 * gimple-ssa-evrp.c (class evrp_folder): New.
5504 (class evrp_dom_walker): Remove.
5505 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
5506 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
5507 * tree-ssa-copy.c (copy_folder::get_value): Same.
5508 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
5509 Pass stmt to get_value.
5510 (substitute_and_fold_engine::replace_phi_args_in): Same.
5511 (substitute_and_fold_dom_walker::after_dom_children): Call
5513 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
5514 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
5515 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
5516 call virtual functions for folding, pre_folding, and post folding.
5517 Call get_value with PHI. Tweak dump.
5518 * tree-ssa-propagate.h (class substitute_and_fold_engine):
5519 New argument to get_value.
5520 New virtual function pre_fold_bb.
5521 New virtual function post_fold_bb.
5522 New virtual function pre_fold_stmt.
5523 New virtual function post_new_stmt.
5524 New function propagate_into_phi_args.
5525 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
5526 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
5528 (vr_values::fold_cond): New.
5529 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
5530 * vr-values.h (class vr_values): Add
5531 simplify_cond_using_ranges_when_edge_is_known.
5533 2020-06-10 Martin Liska <mliska@suse.cz>
5536 * asan.c (asan_emit_stack_protection): Emit
5537 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
5540 2020-06-10 Tamar Christina <tamar.christina@arm.com>
5542 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
5544 2020-06-10 Richard Biener <rguenther@suse.de>
5546 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
5547 (vect_record_grouped_load_vectors): Likewise.
5548 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
5549 (vectorize_fold_left_reduction): Likewise.
5550 (vect_transform_reduction): Likewise.
5551 (vect_transform_cycle_phi): Likewise.
5552 (vectorizable_lc_phi): Likewise.
5553 (vectorizable_induction): Likewise.
5554 (vectorizable_live_operation): Likewise.
5555 (vect_transform_loop): Likewise.
5556 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
5558 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
5559 (vect_get_vec_def_for_operand): Likewise.
5560 (vect_get_vec_def_for_stmt_copy): Likewise.
5561 (vect_get_vec_defs_for_stmt_copy): Likewise.
5562 (vect_get_vec_defs_for_operand): New function.
5563 (vect_get_vec_defs): Likewise.
5564 (vect_build_gather_load_calls): Adjust.
5565 (vect_get_gather_scatter_ops): Likewise.
5566 (vectorizable_bswap): Likewise.
5567 (vectorizable_call): Likewise.
5568 (vectorizable_simd_clone_call): Likewise.
5569 (vect_get_loop_based_defs): Remove.
5570 (vect_create_vectorized_demotion_stmts): Adjust.
5571 (vectorizable_conversion): Likewise.
5572 (vectorizable_assignment): Likewise.
5573 (vectorizable_shift): Likewise.
5574 (vectorizable_operation): Likewise.
5575 (vectorizable_scan_store): Likewise.
5576 (vectorizable_store): Likewise.
5577 (vectorizable_load): Likewise.
5578 (vectorizable_condition): Likewise.
5579 (vectorizable_comparison): Likewise.
5580 (vect_transform_stmt): Adjust and remove no longer applicable
5582 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
5583 STMT_VINFO_VEC_STMTS.
5584 (vec_info::free_stmt_vec_info): Relase it.
5585 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
5586 (_stmt_vec_info::vec_stmts): Add.
5587 (STMT_VINFO_VEC_STMT): Remove.
5588 (STMT_VINFO_VEC_STMTS): New.
5589 (vect_get_vec_def_for_operand_1): Remove.
5590 (vect_get_vec_def_for_operand): Likewise.
5591 (vect_get_vec_defs_for_stmt_copy): Likewise.
5592 (vect_get_vec_def_for_stmt_copy): Likewise.
5593 (vect_get_vec_defs): New overloads.
5594 (vect_get_vec_defs_for_operand): New.
5595 (vect_get_slp_defs): Declare.
5597 2020-06-10 Qian Chao <qianchao9@huawei.com>
5599 PR tree-optimization/95569
5600 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
5602 2020-06-10 Martin Liska <mliska@suse.cz>
5604 PR tree-optimization/92860
5605 * optc-save-gen.awk: Generate new function cl_optimization_compare.
5606 * opth-gen.awk: Generate declaration of the function.
5608 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
5610 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
5611 'future' PowerPC platform.
5612 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
5613 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
5614 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
5616 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
5617 (rs6000_clone_map): Add 'future' system target_clones support.
5619 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
5621 * Makefile.in (ZSTD_INC): Define.
5622 (ZSTD_LIB): Include ZSTD_LDFLAGS.
5623 (CFLAGS-lto-compress.o): Add ZSTD_INC.
5624 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
5626 * configure: Rebuilt.
5628 2020-06-09 Jason Merrill <jason@redhat.com>
5631 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
5633 2020-06-09 Marco Elver <elver@google.com>
5635 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
5636 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
5637 builtin for volatile instrumentation of reads/writes.
5638 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
5639 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
5640 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
5641 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
5642 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
5643 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
5644 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
5645 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
5646 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
5647 * tsan.c (get_memory_access_decl): Argument if access is
5648 volatile. If param tsan-distinguish-volatile is non-zero, and
5649 access if volatile, return volatile instrumentation decl.
5650 (instrument_expr): Check if access is volatile.
5652 2020-06-09 Richard Biener <rguenther@suse.de>
5654 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
5656 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
5658 * omp-offload.c (add_decls_addresses_to_decl_constructor,
5659 omp_finish_file): With in_lto_p, stream out all offload-table
5660 items even if the symtab_node does not exist.
5662 2020-06-09 Richard Biener <rguenther@suse.de>
5664 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
5666 2020-06-09 Martin Liska <mliska@suse.cz>
5668 * gcov-dump.c (print_usage): Fix spacing for --raw option
5671 2020-06-09 Martin Liska <mliska@suse.cz>
5673 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
5674 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
5675 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
5676 Handle all sanitizer options.
5677 (can_inline_edge_p): Use renamed CIF_* enum value.
5679 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
5681 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
5683 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
5684 (@aarch64_bic<mode>): Enable unpacked BIC.
5685 (*bic<mode>3): Enable unpacked BIC.
5687 2020-06-09 Martin Liska <mliska@suse.cz>
5689 PR gcov-profile/95365
5690 * doc/gcov.texi: Compile and link one example in 2 steps.
5692 2020-06-09 Jakub Jelinek <jakub@redhat.com>
5694 PR tree-optimization/95527
5695 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
5697 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
5699 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
5700 'future' PowerPC platform.
5701 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
5702 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
5703 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
5705 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
5706 (rs6000_clone_map): Add 'future' system target_clones support.
5708 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
5712 * omp-offload.c (add_decls_addresses_to_decl_constructor,
5713 omp_finish_file): Skip removed items.
5714 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
5715 to this node for variables and functions.
5717 2020-06-08 Jason Merrill <jason@redhat.com>
5719 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
5720 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
5721 * configure: Regenerate.
5723 2020-06-08 Martin Sebor <msebor@redhat.com>
5725 * postreload.c (reload_cse_simplify_operands): Clear first array element
5726 before using it. Assert a precondition.
5728 2020-06-08 Jakub Jelinek <jakub@redhat.com>
5731 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
5732 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
5733 type is vector boolean.
5735 2020-06-08 Tamar Christina <tamar.christina@arm.com>
5737 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
5739 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
5741 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
5742 instead of VFP_REGS.
5744 2020-06-08 Martin Liska <mliska@suse.cz>
5746 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
5747 in all vcond* patterns.
5749 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
5751 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
5752 Define. No longer include <algorithm>.
5754 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
5756 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
5757 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
5758 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
5759 (parityhi2, parityqi2): New expanders.
5760 (parityhi2_cmp): Implement set parity flag with xorb insn.
5761 (parityqi2_cmp): Implement set parity flag with testb insn.
5762 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
5764 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
5767 * config/rs6000/rs6000.c (rs6000_option_override_internal):
5768 Override flag_cunroll_grow_size.
5770 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
5772 * common.opt (flag_cunroll_grow_size): New flag.
5773 * toplev.c (process_options): Set flag_cunroll_grow_size.
5774 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
5775 Use flag_cunroll_grow_size.
5777 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
5780 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
5781 (ipa_odr_summary_write): Update streaming.
5782 (ipa_odr_read_section): Update streaming.
5784 2020-06-06 Alexandre Oliva <oliva@adacore.com>
5787 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
5789 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
5790 Julian Brown <julian@codesourcery.com>
5792 * gimplify.c (gimplify_adjust_omp_clauses): Remove
5793 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
5795 2020-06-05 Richard Biener <rguenther@suse.de>
5797 PR tree-optimization/95539
5798 * tree-vect-data-refs.c
5799 (vect_slp_analyze_and_verify_instance_alignment): Use
5800 SLP_TREE_REPRESENTATIVE for the data-ref check.
5801 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
5802 back to the first scalar stmt rather than the
5803 SLP_TREE_REPRESENTATIVE to match previous behavior.
5805 2020-06-05 Felix Yang <felix.yang@huawei.com>
5808 * expr.c (emit_move_insn): Check src and dest of the copy to see
5809 if one or both of them are subregs, try to remove the subregs when
5810 innermode and outermode are equal in size and the mode change involves
5811 an implicit round trip through memory.
5813 2020-06-05 Jakub Jelinek <jakub@redhat.com>
5816 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
5817 define_insn_and_split patterns.
5818 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
5819 define_insn patterns.
5821 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
5823 * alloc-pool.h (object_allocator::remove_raw): New.
5824 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
5825 (occurrence::occurrence): Add.
5826 (occurrence::~occurrence): Likewise.
5827 (occurrence::new): Likewise.
5828 (occurrence::delete): Likewise.
5830 (insert_bb): Use new occurence (...) instead of occ_new.
5831 (register_division_in): Likewise.
5832 (free_bb): Use delete occ instead of manually removing
5835 2020-06-05 Richard Biener <rguenther@suse.de>
5838 * cfgexpand.c (expand_debug_expr): Avoid calling
5839 set_mem_attributes_minus_bitpos when we were expanding
5841 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
5842 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
5843 special-cases we do not want MEM_EXPRs for. Assert
5844 we end up with reasonable MEM_EXPRs.
5846 2020-06-05 Lili Cui <lili.cui@intel.com>
5849 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
5851 2020-06-04 Martin Sebor <msebor@redhat.com>
5855 * attribs.c (init_attr_rdwr_indices): Move function here.
5856 * attribs.h (rdwr_access_hash, rdwr_map): Define.
5857 (attr_access): Add 'none'.
5858 (init_attr_rdwr_indices): Declared function.
5859 * builtins.c (warn_for_access)): New function.
5860 (check_access): Call it.
5861 * builtins.h (checK-access): Add an optional argument.
5862 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
5863 (init_attr_rdwr_indices): Declare extern.
5864 (append_attrname): Handle attr_access::none.
5865 (maybe_warn_rdwr_sizes): Same.
5866 (initialize_argument_information): Update comments.
5867 * doc/extend.texi (attribute access): Document 'none'.
5868 * tree-ssa-uninit.c (struct wlimits): New.
5869 (maybe_warn_operand): New function.
5870 (maybe_warn_pass_by_reference): Same.
5871 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
5872 Also call for function calls.
5873 (pass_late_warn_uninitialized::execute): Adjust comments.
5874 (execute_early_warn_uninitialized): Same.
5876 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
5879 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
5880 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
5881 reload if the original insn has it too.
5883 2020-06-04 Richard Biener <rguenther@suse.de>
5885 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
5886 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
5888 2020-06-04 Martin Jambor <mjambor@suse.cz>
5891 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
5892 exceptions check to...
5893 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
5895 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
5896 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
5899 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5902 * config/arm/predicates.md (mve_scatter_memory): Define to
5903 match (mem (reg)) for scatter store memory.
5904 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
5905 define_insn to define_expand.
5906 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
5907 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
5908 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
5909 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
5910 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
5911 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
5912 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
5913 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
5914 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
5915 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
5916 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
5917 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
5918 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
5919 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
5920 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
5921 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
5922 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
5923 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
5924 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
5925 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
5926 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
5928 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
5929 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
5930 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
5931 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
5932 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
5933 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
5934 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
5935 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
5936 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
5937 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
5938 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
5939 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
5940 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
5941 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
5942 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
5943 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
5944 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
5945 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
5946 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
5947 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
5949 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5951 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
5953 (__arm_vbicq_n_s16): Likewise.
5954 (__arm_vbicq_n_u32): Likewise.
5955 (__arm_vbicq_n_s32): Likewise.
5956 (__arm_vbicq): Modify polymorphic variant.
5958 2020-06-04 Richard Biener <rguenther@suse.de>
5960 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
5961 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
5962 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
5963 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
5964 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
5966 (vect_get_slp_defs): ... here.
5967 (vect_get_slp_vect_def): New function.
5969 2020-06-04 Richard Biener <rguenther@suse.de>
5971 * tree-vectorizer.h (_slp_tree::lanes): New.
5972 (SLP_TREE_LANES): Likewise.
5973 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
5974 (vectorizable_reduction): Likewise.
5975 (vect_transform_cycle_phi): Likewise.
5976 (vectorizable_induction): Likewise.
5977 (vectorizable_live_operation): Likewise.
5978 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
5979 (vect_create_new_slp_node): Likewise.
5980 (slp_copy_subtree): Copy it.
5981 (vect_optimize_slp): Use it.
5982 (vect_slp_analyze_node_operations_1): Likewise.
5983 (vect_slp_convert_to_external): Likewise.
5984 (vect_bb_vectorization_profitable_p): Likewise.
5985 * tree-vect-stmts.c (vectorizable_load): Likewise.
5986 (get_vectype_for_scalar_type): Likewise.
5988 2020-06-04 Richard Biener <rguenther@suse.de>
5990 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
5991 (vect_build_slp_tree_2): Simplify building all external op
5993 (vect_slp_analyze_node_operations): Remove push/pop of
5994 STMT_VINFO_DEF_TYPE.
5995 (vect_schedule_slp_instance): Likewise.
5996 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
5997 stmt_info, use the vect_is_simple_use overload combining
5998 SLP and stmt_info analysis.
5999 (vect_is_simple_cond): Likewise.
6000 (vectorizable_store): Adjust.
6001 (vectorizable_condition): Likewise.
6002 (vect_is_simple_use): Fully handle invariant SLP nodes
6003 here. Amend stmt_info operand extraction with COND_EXPR
6005 * tree-vect-loop.c (vectorizable_reduction): Deal with
6006 COND_EXPR representation ugliness.
6008 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
6011 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
6012 Refine from *vcvtps2ph_store<mask_name>.
6013 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
6014 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
6015 (*vcvtps2ph256<merge_mask_name>): New define_insn.
6016 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
6017 * config/i386/subst.md (merge_mask): New define_subst.
6018 (merge_mask_name): New define_subst_attr.
6019 (merge_mask_operand3): Ditto.
6021 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
6023 PR tree-optimization/89430
6025 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
6026 remove ssa_name_ver, store, offset fields.
6027 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
6028 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
6029 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
6032 2020-06-04 Andreas Schwab <schwab@suse.de>
6035 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
6037 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
6039 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
6040 (trunc<mode><pmov_dst_3_lower>2): Refine from
6041 trunc<mode><pmov_dst_3>2.
6043 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
6045 * match.pd (tanh/sinh -> 1/cosh): New simplification.
6047 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
6050 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
6051 is_lfs_stfs_insn and make it recognize lfs as well.
6052 (prefixed_store_p): Use is_lfs_stfs_insn().
6053 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
6055 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
6057 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
6059 (odr_enums): New static var.
6060 (struct odr_enum_val): New struct.
6061 (class odr_enum): New struct.
6062 (odr_enum_map): New hashtable.
6063 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
6064 (add_type_duplicate): Likewise.
6065 (free_odr_warning_data): Do not free TYPE_VALUES.
6066 (register_odr_enum): New function.
6067 (ipa_odr_summary_write): New function.
6068 (ipa_odr_read_section): New function.
6069 (ipa_odr_summary_read): New function.
6070 (class pass_ipa_odr): New pass.
6071 (make_pass_ipa_odr): New function.
6072 * ipa-utils.h (register_odr_enum): Declare.
6073 * lto-section-in.c: (lto_section_name): Add odr_types section.
6074 * lto-streamer.h (enum lto_section_type): Add odr_types section.
6075 * passes.def: Add odr_types pass.
6076 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
6078 (hash_tree): Likewise.
6079 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
6081 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
6083 * timevar.def (TV_IPA_ODR): New timervar.
6084 * tree-pass.h (make_pass_ipa_odr): Declare.
6085 * tree.c (free_lang_data_in_type): Regiser ODR types.
6087 2020-06-03 Romain Naour <romain.naour@gmail.com>
6089 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
6092 2020-06-03 Richard Biener <rguenther@suse.de>
6094 PR tree-optimization/95487
6095 * tree-vect-stmts.c (vectorizable_store): Use a truth type
6096 for the scatter mask.
6098 2020-06-03 Richard Biener <rguenther@suse.de>
6100 PR tree-optimization/95495
6101 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
6102 SLP_TREE_REPRESENTATIVE in the shift assertion.
6104 2020-06-03 Tom Tromey <tromey@adacore.com>
6106 * spellcheck.c (CASE_COST): New define.
6107 (BASE_COST): New define.
6108 (get_edit_distance): Recognize case changes.
6109 (get_edit_distance_cutoff): Update.
6110 (test_edit_distances): Update.
6111 (get_old_cutoff): Update.
6112 (test_find_closest_string): Add case sensitivity test.
6114 2020-06-03 Richard Biener <rguenther@suse.de>
6116 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
6117 the cost vector to unset the visited flag on stmts.
6119 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
6121 * gimplify.c (omp_notice_variable): Use new hook.
6122 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
6123 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
6124 (LANG_HOOKS_DECLS): Add it.
6125 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
6126 (lhd_omp_predetermined_mapping): New.
6127 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
6129 2020-06-03 Jan Hubicka <jh@suse.cz>
6131 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
6132 add LTO_first_tree_tag and LTO_first_gimple_tag.
6133 (lto_tag_is_tree_code_p): Update.
6134 (lto_tag_is_gimple_code_p): Update.
6135 (lto_gimple_code_to_tag): Update.
6136 (lto_tag_to_gimple_code): Update.
6137 (lto_tree_code_to_tag): Update.
6138 (lto_tag_to_tree_code): Update.
6140 2020-06-02 Felix Yang <felix.yang@huawei.com>
6143 * config/aarch64/aarch64.c (aarch64_short_vector_p):
6144 Leave later code to report an error if SVE is disabled.
6146 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
6148 * config/aarch64/aarch64-cores.def (zeus): Define.
6149 * config/aarch64/aarch64-tune.md: Regenerate.
6150 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
6152 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
6155 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
6157 (is_stfs_insn): New helper function.
6159 2020-06-02 Jan Hubicka <jh@suse.cz>
6161 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
6163 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
6165 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
6167 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
6168 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
6169 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
6171 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
6174 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
6175 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
6177 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6179 * config/s390/s390.c (print_operand): Emit vector alignment
6182 2020-06-02 Martin Liska <mliska@suse.cz>
6184 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
6185 as they have variable number of counters.
6186 * gcov-dump.c (main): Add new option -r.
6187 (print_usage): Likewise.
6188 (tag_counters): All new raw format.
6189 * gcov-io.h (struct gcov_kvp): New.
6190 (GCOV_TOPN_VALUES): Remove.
6191 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
6192 (GCOV_TOPN_MEM_COUNTERS): New.
6193 (GCOV_TOPN_DISK_COUNTERS): Likewise.
6194 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
6195 * ipa-profile.c (ipa_profile_generate_summary): Use
6196 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
6197 (ipa_profile_write_edge_summary): Likewise.
6198 (ipa_profile_read_edge_summary): Likewise.
6199 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
6200 * profile.c (sort_hist_values): Sort variable number
6202 (compute_value_histograms): Special case for TOP N counters
6203 that have dynamic number of key-value pairs.
6204 * value-prof.c (dump_histogram_value): Dump variable number
6206 (stream_in_histogram_value): Stream in variable number
6207 of key-value pairs for TOP N counter.
6208 (get_nth_most_common_value): Deal with variable number
6210 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
6212 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
6214 * doc/gcov-dump.texi: Document new -r option.
6216 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
6219 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
6221 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
6223 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
6224 returns (const_int 0) for the destination, then emit nothing.
6226 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
6228 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
6229 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
6230 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
6231 LTO_const_decl_ref, LTO_imported_decl_ref,
6232 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
6233 LTO_namelist_decl_ref; add LTO_global_stream_ref.
6234 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
6235 (lto_input_scc): Update.
6236 (lto_input_tree_1): Update.
6237 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
6238 * lto-streamer.c (lto_tag_name): Update.
6240 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
6242 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
6243 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
6244 * lto-cgraph.c (lto_output_node): Likewise.
6245 (lto_output_varpool_node): Likewise.
6246 (output_offload_tables): Likewise.
6247 (input_node): Likewise.
6248 (input_varpool_node): Likewise.
6249 (input_offload_tables): Likewise.
6250 * lto-streamer-in.c (lto_input_tree_ref): Declare.
6251 (lto_input_var_decl_ref): Declare.
6252 (lto_input_fn_decl_ref): Declare.
6253 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
6254 (lto_output_var_decl_index): Rename to ..
6255 (lto_output_var_decl_ref): ... this.
6256 (lto_output_fn_decl_index): Rename to ...
6257 (lto_output_fn_decl_ref): ... this.
6258 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
6259 (DEFINE_DECL_STREAM_FUNCS): Remove.
6260 (lto_output_var_decl_index): Remove.
6261 (lto_output_fn_decl_index): Remove.
6262 (lto_output_var_decl_ref): Declare.
6263 (lto_output_fn_decl_ref): Declare.
6264 (lto_input_var_decl_ref): Declare.
6265 (lto_input_fn_decl_ref): Declare.
6267 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
6269 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
6270 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
6271 dump infomation if there is no adjusted parameter.
6272 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
6274 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
6276 * Makefile.in (gimple-array-bounds.o): New.
6277 * tree-vrp.c: Move array bounds code...
6278 * gimple-array-bounds.cc: ...here...
6279 * gimple-array-bounds.h: ...and here.
6281 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
6283 * Makefile.in (OBJS): Add value-range-equiv.o.
6284 * tree-vrp.c (*value_range_equiv*): Move to...
6285 * value-range-equiv.cc: ...here.
6286 * tree-vrp.h (class value_range_equiv): Move to...
6287 * value-range-equiv.h: ...here.
6288 * vr-values.h: Include value-range-equiv.h.
6290 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
6293 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
6294 lattice for simple pass-through by-ref argument.
6296 2020-05-31 Jeff Law <law@redhat.com>
6298 * lra.c (add_auto_inc_notes): Remove function.
6299 * reload1.c (add_auto_inc_notes): Similarly. Move into...
6300 * rtlanal.c (add_auto_inc_notes): New function.
6301 * rtl.h (add_auto_inc_notes): Add prototype.
6302 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
6305 2020-05-31 Jan Hubicka <jh@suse.cz>
6307 * lto-section-out.c (lto_output_decl_index): Remove.
6308 (lto_output_field_decl_index): Move to lto-streamer-out.c
6309 (lto_output_fn_decl_index): Move to lto-streamer-out.c
6310 (lto_output_namespace_decl_index): Remove.
6311 (lto_output_var_decl_index): Remove.
6312 (lto_output_type_decl_index): Remove.
6313 (lto_output_type_ref_index): Remove.
6314 * lto-streamer-out.c (output_type_ref): Remove.
6315 (lto_get_index): New function.
6316 (lto_output_tree_ref): Remove.
6317 (lto_indexable_tree_ref): New function.
6318 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
6319 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
6320 (stream_write_tree_ref): Update.
6321 (lto_output_tree): Update.
6322 * lto-streamer.h (lto_output_decl_index): Remove prototype.
6323 (lto_output_field_decl_index): Remove prototype.
6324 (lto_output_namespace_decl_index): Remove prototype.
6325 (lto_output_type_decl_index): Remove prototype.
6326 (lto_output_type_ref_index): Remove prototype.
6327 (lto_output_var_decl_index): Move.
6328 (lto_output_fn_decl_index): Move
6330 2020-05-31 Jakub Jelinek <jakub@redhat.com>
6333 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
6336 2020-05-31 Jeff Law <law@redhat.com>
6338 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
6340 2020-05-31 Jim Wilson <jimw@sifive.com>
6342 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
6344 2020-05-30 Jonathan Yong <10walls@gmail.com>
6346 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
6347 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
6348 import library, but also contains some functions that invoke
6349 others in KERNEL32.DLL.
6351 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
6353 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
6354 (altivec_vmrglw_direct): Ditto.
6355 (altivec_vperm_<mode>_direct): Ditto.
6356 (altivec_vperm_v8hiv16qi): Ditto.
6357 (*altivec_vperm_<mode>_uns_internal): Ditto.
6358 (*altivec_vpermr_<mode>_internal): Ditto.
6359 (vperm_v8hiv4si): Ditto.
6360 (vperm_v16qiv8hi): Ditto.
6362 2020-05-29 Jan Hubicka <jh@suse.cz>
6364 * lto-streamer-in.c (streamer_read_chain): Move here from
6366 (stream_read_tree_ref): New.
6367 (lto_input_tree_1): Simplify.
6368 * lto-streamer-out.c (stream_write_tree_ref): New.
6369 (lto_write_tree_1): Simplify.
6370 (lto_output_tree_1): Simplify.
6371 (DFS::DFS_write_tree): Simplify.
6372 (streamer_write_chain): Move here from tree-stremaer-out.c.
6373 * lto-streamer.h (lto_output_tree_ref): Update prototype.
6374 (stream_read_tree_ref): Declare
6375 (stream_write_tree_ref): Declare
6376 * tree-streamer-in.c (streamer_read_chain): Update to use
6377 stream_read_tree_ref.
6378 (lto_input_ts_common_tree_pointers): Likewise.
6379 (lto_input_ts_vector_tree_pointers): Likewise.
6380 (lto_input_ts_poly_tree_pointers): Likewise.
6381 (lto_input_ts_complex_tree_pointers): Likewise.
6382 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
6383 (lto_input_ts_decl_common_tree_pointers): Likewise.
6384 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
6385 (lto_input_ts_field_decl_tree_pointers): Likewise.
6386 (lto_input_ts_function_decl_tree_pointers): Likewise.
6387 (lto_input_ts_type_common_tree_pointers): Likewise.
6388 (lto_input_ts_type_non_common_tree_pointers): Likewise.
6389 (lto_input_ts_list_tree_pointers): Likewise.
6390 (lto_input_ts_vec_tree_pointers): Likewise.
6391 (lto_input_ts_exp_tree_pointers): Likewise.
6392 (lto_input_ts_block_tree_pointers): Likewise.
6393 (lto_input_ts_binfo_tree_pointers): Likewise.
6394 (lto_input_ts_constructor_tree_pointers): Likewise.
6395 (lto_input_ts_omp_clause_tree_pointers): Likewise.
6396 * tree-streamer-out.c (streamer_write_chain): Update to use
6397 stream_write_tree_ref.
6398 (write_ts_common_tree_pointers): Likewise.
6399 (write_ts_vector_tree_pointers): Likewise.
6400 (write_ts_poly_tree_pointers): Likewise.
6401 (write_ts_complex_tree_pointers): Likewise.
6402 (write_ts_decl_minimal_tree_pointers): Likewise.
6403 (write_ts_decl_common_tree_pointers): Likewise.
6404 (write_ts_decl_non_common_tree_pointers): Likewise.
6405 (write_ts_decl_with_vis_tree_pointers): Likewise.
6406 (write_ts_field_decl_tree_pointers): Likewise.
6407 (write_ts_function_decl_tree_pointers): Likewise.
6408 (write_ts_type_common_tree_pointers): Likewise.
6409 (write_ts_type_non_common_tree_pointers): Likewise.
6410 (write_ts_list_tree_pointers): Likewise.
6411 (write_ts_vec_tree_pointers): Likewise.
6412 (write_ts_exp_tree_pointers): Likewise.
6413 (write_ts_block_tree_pointers): Likewise.
6414 (write_ts_binfo_tree_pointers): Likewise.
6415 (write_ts_constructor_tree_pointers): Likewise.
6416 (write_ts_omp_clause_tree_pointers): Likewise.
6417 (streamer_write_tree_body): Likewise.
6418 (streamer_write_integer_cst): Likewise.
6419 * tree-streamer.h (streamer_read_chain):Declare.
6420 (streamer_write_chain):Declare.
6421 (streamer_write_tree_body): Update prototype.
6422 (streamer_write_integer_cst): Update prototype.
6424 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
6427 * configure: Regenerated.
6429 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
6431 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
6432 (add<mode>3_vcc_zext_dup_exec): Likewise.
6433 (add<mode>3_vcc_zext_dup2): Likewise.
6434 (add<mode>3_vcc_zext_dup2_exec): Likewise.
6436 2020-05-29 Richard Biener <rguenther@suse.de>
6438 PR tree-optimization/95272
6439 * tree-vectorizer.h (_slp_tree::representative): Add.
6440 (SLP_TREE_REPRESENTATIVE): Likewise.
6441 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
6443 (vectorizable_live_operation): Use the representative to
6444 attach the reduction info to.
6445 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
6446 SLP_TREE_REPRESENTATIVE.
6447 (vect_create_new_slp_node): Likewise.
6448 (slp_copy_subtree): Copy it.
6449 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
6450 (vect_slp_analyze_node_operations_1): Pass the representative
6451 to vect_analyze_stmt.
6452 (vect_schedule_slp_instance): Pass the representative to
6453 vect_transform_stmt.
6455 2020-05-29 Richard Biener <rguenther@suse.de>
6457 PR tree-optimization/95356
6458 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
6459 node hacking during analysis.
6461 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
6464 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
6466 2020-05-29 Richard Biener <rguenther@suse.de>
6468 PR tree-optimization/95403
6469 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
6472 2020-05-29 Jakub Jelinek <jakub@redhat.com>
6475 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
6476 declare variant cgraph node removal callback.
6478 2020-05-29 Jakub Jelinek <jakub@redhat.com>
6481 * expr.c (store_expr): If expr_size is constant and significantly
6482 larger than TREE_STRING_LENGTH, set temp to just the
6483 TREE_STRING_LENGTH portion of the STRING_CST.
6485 2020-05-29 Richard Biener <rguenther@suse.de>
6487 PR tree-optimization/95393
6488 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
6489 to build the min/max expression so we simplify cases like
6490 MAX(0, s) immediately.
6492 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
6494 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
6495 for unpacked EOR, ORR, AND.
6497 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
6499 * Makefile.in: don't look for libiberty in the "pic" subdirectory
6500 when building for Mingw. Add dependency on xgcc with the proper
6503 2020-05-28 Jeff Law <law@redhat.com>
6505 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
6507 2020-05-28 Jeff Law <law@redhat.com>
6509 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
6510 make a nonzero adjustment to the memory offset.
6511 (b<ior,xor>hi_msx): Turn into a splitter.
6513 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
6515 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
6516 Fix off-by-one error.
6518 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
6520 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
6521 wb_candidate1 and wb_candidate2.
6522 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
6523 wb_candidate1 and wb_candidate2 if we decided not to use them.
6525 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
6528 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
6529 we have at least some CFI operations when using a frame pointer.
6530 Only redefine the CFA if we have CFI operations.
6532 2020-05-28 Richard Biener <rguenther@suse.de>
6534 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
6535 case for !SLP_TREE_VECTYPE.
6536 (vect_slp_analyze_node_operations): Adjust.
6538 2020-05-28 Richard Biener <rguenther@suse.de>
6540 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
6541 (SLP_TREE_VEC_DEFS): Likewise.
6542 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
6543 (_slp_tree::~_slp_tree): Likewise.
6544 (vect_mask_constant_operand_p): Remove unused function.
6545 (vect_get_constant_vectors): Rename to...
6546 (vect_create_constant_vectors): ... this. Take the
6547 invariant node as argument and code generate it. Remove
6548 dead code, remove temporary asserts. Pass a NULL stmt_info
6549 to vect_init_vector.
6550 (vect_get_slp_defs): Simplify.
6551 (vect_schedule_slp_instance): Code-generate externals and
6552 invariants using vect_create_constant_vectors.
6554 2020-05-28 Richard Biener <rguenther@suse.de>
6556 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
6557 Conditionalize stmt_info use, assert the new stmt cannot throw
6559 (vect_finish_stmt_generation): Adjust assert.
6561 2020-05-28 Richard Biener <rguenther@suse.de>
6563 PR tree-optimization/95273
6564 PR tree-optimization/95356
6565 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
6566 what we set the vector type of the shift operand SLP node
6569 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
6571 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
6574 2020-05-28 Martin Liska <mliska@suse.cz>
6577 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
6578 rename ipcp-unit-growth to ipa-cp-unit-growth.
6580 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
6582 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
6583 from *avx512vl_<code>v2div2qi_store and refine memory size of
6585 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
6586 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
6587 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
6588 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
6589 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
6590 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
6591 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
6592 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
6593 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
6594 (*avx512vl_<code>v2div2si2_store_1): Ditto.
6595 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
6596 (*avx512f_<code>v8div16qi2_store_1): Ditto.
6597 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
6598 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
6599 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
6600 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
6601 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
6602 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
6603 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
6604 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
6605 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
6606 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
6607 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
6608 (*avx512vl_<code>v2div2si2_store_2): Ditto.
6609 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
6610 (*avx512f_<code>v8div16qi2_store_2): Ditto.
6611 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
6612 * config/i386/i386-builtin-types.def: Adjust builtin type.
6613 * config/i386/i386-expand.c: Ditto.
6614 * config/i386/i386-builtin.def: Adjust builtin.
6615 * config/i386/avx512fintrin.h: Ditto.
6616 * config/i386/avx512vlbwintrin.h: Ditto.
6617 * config/i386/avx512vlintrin.h: Ditto.
6619 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
6621 PR gcov-profile/95332
6622 * gcov-io.c (gcov_var::endian): Move field.
6623 (from_file): Add IN_GCOV_TOOL check.
6624 * gcov-io.h (gcov_magic): Ditto.
6626 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
6628 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
6630 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
6632 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
6634 * builtin-types.def (BT_UINT128): New primitive type.
6635 (BT_FN_UINT128_UINT128): New function type.
6636 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
6637 * doc/extend.texi (__builtin_bswap128): Document it.
6638 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
6639 (is_inexpensive_builtin): Likewise.
6640 * fold-const-call.c (fold_const_call_ss): Likewise.
6641 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
6642 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
6643 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
6644 (vectorizable_call): Likewise.
6645 * optabs.c (expand_unop): Always use the double word path for it.
6646 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
6647 * tree.h (uint128_type_node): New global type.
6648 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
6650 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
6652 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
6653 (mmx_hsubv2sf3): Ditto.
6654 (mmx_haddsubv2sf3): New expander.
6655 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
6656 RTL template to model horizontal subtraction and addition.
6657 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
6660 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
6663 * config/i386/sse.md
6664 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
6665 Remove %q operand modifier from insn template.
6666 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
6668 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
6670 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
6671 Enable insn pattern for TARGET_MMX_WITH_SSE.
6672 (*mmx_movshdup): New insn pattern.
6673 (*mmx_movsldup): Ditto.
6674 (*mmx_movss): Ditto.
6675 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
6677 (expand_vec_perm_movs): Handle E_V2SFmode.
6678 (expand_vec_perm_even_odd): Ditto.
6679 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
6680 is already handled by standard shuffle patterns.
6682 2020-05-27 Richard Biener <rguenther@suse.de>
6684 PR tree-optimization/95295
6685 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
6686 merging stores from paths.
6688 2020-05-27 Richard Biener <rguenther@suse.de>
6690 PR tree-optimization/95356
6691 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
6692 type for the shift operand.
6694 2020-05-27 Richard Biener <rguenther@suse.de>
6696 PR tree-optimization/95335
6697 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
6698 lvisited for nodes made external.
6700 2020-05-27 Richard Biener <rguenther@suse.de>
6702 * dump-context.h (debug_dump_context): New class.
6703 (dump_context): Make it friend.
6704 * dumpfile.c (debug_dump_context::debug_dump_context):
6706 (debug_dump_context::~debug_dump_context): Likewise.
6707 * tree-vect-slp.c: Include dump-context.h.
6708 (vect_print_slp_tree): Dump a single SLP node.
6709 (debug): New overload for slp_tree.
6710 (vect_print_slp_graph): Rename from vect_print_slp_tree and
6712 (vect_analyze_slp_instance): Adjust.
6714 2020-05-27 Jakub Jelinek <jakub@redhat.com>
6717 * omp-general.c (omp_declare_variant_remove_hook): New function.
6718 (omp_resolve_declare_variant): Always return base if it is already
6719 declare_variant_alt magic decl itself. Register
6720 omp_declare_variant_remove_hook as cgraph node removal hook.
6722 2020-05-27 Jeff Law <law@redhat.com>
6724 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
6725 for the primary input operand.
6726 (tstsi_variable_bit_qi): Similarly.
6728 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
6730 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
6732 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
6735 * ipa-utils.h (odr_type_p): Also permit calls with
6736 only flag_generate_offload set.
6738 2020-05-26 Alexandre Oliva <oliva@adacore.com>
6740 * gcc.c (validate_switches): Add braced parameter. Adjust all
6741 callers. Expected and skip trailing brace only if braced.
6742 Return after handling one atom otherwise.
6743 (DUMPS_OPTIONS): New.
6744 (cpp_debug_options): Define in terms of it.
6746 2020-05-26 Richard Biener <rguenther@suse.de>
6748 PR tree-optimization/95327
6749 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
6750 when we are not using a scalar shift.
6752 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
6754 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
6755 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
6756 Handle E_V2SImode and E_V4HImode.
6757 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
6758 Assert that E_V2SImode is already handled.
6759 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
6760 is already handled by standard shuffle patterns.
6762 2020-05-26 Jan Hubicka <jh@suse.cz>
6764 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
6767 2020-05-26 Jakub Jelinek <jakub@redhat.com>
6770 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
6771 * omp-general.h (find_combined_omp_for): Declare.
6772 * omp-general.c: Include tree-iterator.h.
6773 (find_combined_omp_for): New function, moved from gimplify.c.
6775 2020-05-26 Alexandre Oliva <oliva@adacore.com>
6777 * common.opt (aux_base_name): Define.
6778 (dumpbase, dumpdir): Mark as Driver options.
6779 (-dumpbase, -dumpdir): Likewise.
6780 (dumpbase-ext, -dumpbase-ext): New.
6781 (auxbase, auxbase-strip): Drop.
6782 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
6784 (-o): Introduce the notion of primary output, mention it
6785 influences auxiliary and dump output names as well, add
6787 (-save-temps): Adjust, move examples into -dump*.
6788 (-save-temps=cwd, -save-temps=obj): Likewise.
6789 (-fdump-final-insns): Adjust.
6790 * dwarf2out.c (gen_producer_string): Drop auxbase and
6791 auxbase_strip; add dumpbase_ext.
6792 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
6793 (save_temps_prefix, save_temps_length): Drop.
6794 (save_temps_overrides_dumpdir): New.
6795 (dumpdir, dumpbase, dumpbase_ext): New.
6796 (dumpdir_length, dumpdir_trailing_dash_added): New.
6797 (outbase, outbase_length): New.
6798 (The Specs Language): Introduce %". Adjust %b and %B.
6799 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
6800 Precede object file with %w when it's the primary output.
6801 (cpp_debug_options): Do not pass on incoming -dumpdir,
6802 -dumpbase and -dumpbase-ext options; recompute them with
6804 (cc1_options): Drop auxbase with and without compare-debug;
6805 use cpp_debug_options instead of dumpbase. Mark asm output
6806 with %w when it's the primary output.
6807 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
6808 %:replace-exception. Add %:dumps.
6809 (driver_handle_option): Implement -save-temps=*/-dumpdir
6810 mutual overriding logic. Save dumpdir, dumpbase and
6811 dumpbase-ext options. Do not save output_file in
6813 (adds_single_suffix_p): New.
6814 (single_input_file_index): New.
6815 (process_command): Combine output dir, output base name, and
6816 dumpbase into dumpdir and outbase.
6817 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
6818 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
6819 and outbase instead of input_basename in %b, %B and in
6820 -save-temps aux files. Handle empty argument %".
6821 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
6822 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
6823 naming. Spec-quote the computed -fdump-final-insns file name.
6824 (debug_auxbase_opt): Drop.
6825 (compare_debug_self_opt_spec_function): Drop auxbase-strip
6827 (compare_debug_auxbase_opt_spec_function): Drop.
6828 (not_actual_file_p): New.
6829 (replace_extension_spec_func): Drop.
6830 (dumps_spec_func): New.
6831 (convert_white_space): Split-out parts into...
6832 (quote_string, whitespace_to_convert_p): ... these. New.
6833 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
6834 (driver::finalize): Release and reset new variables; drop
6836 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
6837 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
6838 empty string otherwise.
6839 (DUMPBASE_SUFFIX): Drop leading period.
6840 (debug_objcopy): Use concat.
6841 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
6842 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
6843 component. Simplify temp file names.
6844 * opts.c (finish_options): Drop aux base name handling.
6845 (common_handle_option): Drop auxbase-strip handling.
6846 * toplev.c (print_switch_values): Drop auxbase, add
6848 (process_options): Derive aux_base_name from dump_base_name
6850 (lang_dependent_init): Compute dump_base_ext along with
6851 dump_base_name. Disable stack usage and callgraph-info during
6852 lto generation and compare-debug recompilation.
6854 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
6855 Uroš Bizjak <ubizjak@gmail.com>
6859 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
6860 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
6861 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
6862 float<floatunssuffix>v2div2sf2.
6863 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
6864 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
6865 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
6866 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
6867 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
6868 * config/i386/i386-builtin.def: Ditto.
6869 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
6870 subregs when both omode and imode are vector mode and
6871 have the same inner mode.
6873 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
6875 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
6876 Only turn MEM_REFs into bit-field stores for small bit-field regions.
6877 (imm_store_chain_info::output_merged_store): Be prepared for sources
6878 with non-integral type in the bit-field insertion case.
6879 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
6880 the largest size for the bit-field case.
6882 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
6884 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
6885 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
6886 (*vec_dupv4hi): Redefine as define_insn.
6887 Remove alternative with general register input.
6888 (*vec_dupv2si): Ditto.
6890 2020-05-25 Richard Biener <rguenther@suse.de>
6892 PR tree-optimization/95309
6893 * tree-vect-slp.c (vect_get_constant_vectors): Move number
6894 of vector computation ...
6895 (vect_slp_analyze_node_operations): ... to analysis phase.
6897 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
6899 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
6900 * lto-streamer.h (streamer_debugging): New constant
6901 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
6902 streamer_debugging check.
6903 (streamer_get_pickled_tree): Likewise.
6904 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
6906 2020-05-25 Richard Biener <rguenther@suse.de>
6908 PR tree-optimization/95308
6909 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
6910 test for TARGET_MEM_REFs.
6912 2020-05-25 Richard Biener <rguenther@suse.de>
6914 PR tree-optimization/95295
6915 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
6916 RHSes and drop to full sm_other if they are not equal.
6918 2020-05-25 Richard Biener <rguenther@suse.de>
6920 PR tree-optimization/95271
6921 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
6922 children vector type.
6923 (vectorizable_call): Pass down slp ops.
6925 2020-05-25 Richard Biener <rguenther@suse.de>
6927 PR tree-optimization/95297
6928 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
6929 skip updating operand 1 vector type.
6931 2020-05-25 Richard Biener <rguenther@suse.de>
6933 PR tree-optimization/95284
6934 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
6937 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
6940 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
6941 (trunc<mode><sf2dfmode_lower>2) New expander.
6942 (extend<sf2dfmode_lower><mode>2): Ditto.
6944 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
6946 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
6947 ubsan_{data,type},ASAN symbols linker-visible.
6949 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6951 * lto-streamer-out.c (DFS::DFS): Silence warning.
6953 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
6956 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
6957 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
6959 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6961 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
6964 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6966 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
6967 * lto-streamer-out.c (create_output_block): Fix whitespace
6968 (lto_write_tree_1): Add (debug) dump.
6969 (DFS::DFS): Add dump.
6970 (DFS::DFS_write_tree_body): Do not dump here.
6971 (lto_output_tree): Improve dumping; do not stream ref when not needed.
6972 (produce_asm_for_decls): Fix whitespace.
6973 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
6974 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
6976 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
6979 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
6980 (truncv32hiv32qi2): Ditto.
6981 (trunc<ssedoublemodelower><mode>2): Ditto.
6982 (trunc<mode><pmov_dst_3>2): Ditto.
6983 (trunc<mode><pmov_dst_mode_4>2): Ditto.
6984 (truncv2div2si2): Ditto.
6985 (truncv8div8qi2): Ditto.
6986 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
6987 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
6988 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
6989 *avx512vl_<code><mode>v<ssescalarnum>qi2.
6991 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
6994 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
6997 2020-05-22 Richard Biener <rguenther@suse.de>
6999 PR tree-optimization/95268
7000 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
7003 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7005 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
7008 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7010 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
7011 (lto_input_scc): Optimize streaming of entry lengths.
7012 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
7013 (DFS::DFS): Optimize stremaing of entry lengths
7015 2020-05-22 Richard Biener <rguenther@suse.de>
7018 * doc/invoke.texi (flto): Document behavior of diagnostic
7021 2020-05-22 Richard Biener <rguenther@suse.de>
7023 * tree-vectorizer.h (vect_is_simple_use): New overload.
7024 (vect_maybe_update_slp_op_vectype): New.
7025 * tree-vect-stmts.c (vect_is_simple_use): New overload
7026 accessing operands of SLP vs. non-SLP operation transparently.
7027 (vect_maybe_update_slp_op_vectype): New function updating
7028 the possibly shared SLP operands vector type.
7029 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
7030 using the new vect_is_simple_use overload; update SLP invariant
7031 operand nodes vector type.
7032 (vectorizable_comparison): Likewise.
7033 (vectorizable_call): Likewise.
7034 (vectorizable_conversion): Likewise.
7035 (vectorizable_shift): Likewise.
7036 (vectorizable_store): Likewise.
7037 (vectorizable_condition): Likewise.
7038 (vectorizable_assignment): Likewise.
7039 * tree-vect-loop.c (vectorizable_reduction): Likewise.
7040 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
7041 present SLP_TREE_VECTYPE and check it matches previous
7044 2020-05-22 Richard Biener <rguenther@suse.de>
7046 PR tree-optimization/95248
7047 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
7049 2020-05-22 Richard Biener <rguenther@suse.de>
7051 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
7052 (_slp_tree::~_slp_tree): Likewise.
7053 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
7055 (_slp_tree::~_slp_tree): Implement.
7056 (vect_free_slp_tree): Simplify.
7057 (vect_create_new_slp_node): Likewise. Add nops parameter.
7058 (vect_build_slp_tree_2): Adjust.
7059 (vect_analyze_slp_instance): Likewise.
7061 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
7063 * adjust-alignment.c: Include memmodel.h.
7065 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
7068 * config/i386/cpuid.h: Use hexadecimal in comments.
7070 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
7073 * config/i386/i386-builtins.c (processor_features): Move
7074 F_AVX512VP2INTERSECT after F_AVX512BF16.
7075 (isa_names_table): Likewise.
7077 2020-05-21 Martin Liska <mliska@suse.cz>
7079 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
7080 Handle OPT_moutline_atomics.
7081 * config/aarch64/aarch64.c: Add outline-atomics to
7083 * doc/extend.texi: Document the newly added target attribute.
7085 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
7089 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
7090 operands 1 and 2 commutative. Manually swap operands.
7091 (*mmx_nabsv2sf2): Ditto.
7094 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
7096 * config/i386/i386.md (*<code>tf2_1):
7097 Mark operands 1 and 2 commutative.
7098 (*nabstf2_1): Ditto.
7099 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
7100 commutative. Do not swap operands.
7101 (*nabs<mode>2): Ditto.
7103 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
7106 * config/i386/sse.md (<code>v8qiv8hi2): Use
7107 simplify_gen_subreg instead of simplify_subreg.
7108 (<code>v8qiv8si2): Ditto.
7109 (<code>v4qiv4si2): Ditto.
7110 (<code>v4hiv4si2): Ditto.
7111 (<code>v8qiv8di2): Ditto.
7112 (<code>v4qiv4di2): Ditto.
7113 (<code>v2qiv2di2): Ditto.
7114 (<code>v4hiv4di2): Ditto.
7115 (<code>v2hiv2di2): Ditto.
7116 (<code>v2siv2di2): Ditto.
7118 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
7121 * config/i386/i386.md (*pushsi2_rex64):
7122 Use "e" constraint instead of "i".
7124 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
7126 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
7127 (lto_input_tree_1): Strenghten sanity check.
7128 (lto_input_tree): Update call of lto_input_scc.
7129 * lto-streamer-out.c: Include ipa-utils.h
7130 (create_output_block): Initialize local_trees if merigng is going
7132 (destroy_output_block): Destroy local_trees.
7133 (DFS): Add max_local_entry.
7134 (local_tree_p): New function.
7135 (DFS::DFS): Initialize and maintain it.
7136 (DFS::DFS_write_tree): Decide on streaming format.
7137 (lto_output_tree): Stream inline singleton SCCs
7138 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
7139 (struct output_block): Add local_trees.
7140 (lto_input_scc): Update prototype.
7142 2020-05-20 Patrick Palka <ppalka@redhat.com>
7145 * hash-table.h (hash_table::find_with_hash): Move up the call to
7148 2020-05-20 Martin Liska <mliska@suse.cz>
7150 * lto-compress.c (lto_compression_zstd): Fill up
7151 num_compressed_il_bytes.
7152 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
7154 2020-05-20 Richard Biener <rguenther@suse.de>
7156 PR tree-optimization/95219
7157 * tree-vect-loop.c (vectorizable_induction): Reduce
7158 group_size before computing the number of required IVs.
7160 2020-05-20 Richard Biener <rguenther@suse.de>
7163 * tree-inline.c (remap_gimple_stmt): Revert adjusting
7164 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
7166 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7167 Andre Vieira <andre.simoesdiasvieira@arm.com>
7170 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
7172 (mve_vector_mem_operand): Likewise.
7173 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
7174 the load from memory to a core register is legitimate for give mode.
7175 (mve_vector_mem_operand): Define function.
7176 (arm_print_operand): Modify comment.
7177 (arm_mode_base_reg_class): Define.
7178 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
7179 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
7180 * config/arm/constraints.md (Ux): Likewise.
7182 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
7183 add support for missing Vector Store Register and Vector Load Register.
7184 Add a new alternative to support load from memory to PC (or label) in
7186 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
7187 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
7188 mve_memory_operand and also modify the MVE instructions to emit.
7189 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
7190 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
7191 mve_memory_operand and also modify the MVE instructions to emit.
7192 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
7193 mve_memory_operand and also modify the MVE instructions to emit.
7194 (mve_vldrhq_z_fv8hf): Likewise.
7195 (mve_vldrhq_z_<supf><mode>): Likewise.
7196 (mve_vldrwq_fv4sf): Likewise.
7197 (mve_vldrwq_<supf>v4si): Likewise.
7198 (mve_vldrwq_z_fv4sf): Likewise.
7199 (mve_vldrwq_z_<supf>v4si): Likewise.
7200 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
7201 (mve_vld1q_<supf><mode>): Likewise.
7202 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
7204 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
7205 mve_memory_operand and also modify the MVE instructions to emit.
7206 (mve_vstrhq_p_<supf><mode>): Likewise.
7207 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
7209 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
7210 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
7211 instructions to emit.
7212 (mve_vstrwq_p_<supf>v4si): Likewise.
7213 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
7214 * config/arm/predicates.md (mve_memory_operand): Define.
7216 2020-05-30 Richard Biener <rguenther@suse.de>
7219 * c-fold.c (c_fully_fold_internal): Enhance guard on
7222 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
7225 * Makefile.in (OBJS): Add adjust-alignment.o.
7226 * adjust-alignment.c (pass_data_adjust_alignment): New.
7227 (pass_adjust_alignment): New.
7228 (pass_adjust_alignment::execute): New.
7229 (make_pass_adjust_alignment): New.
7230 * tree-pass.h (make_pass_adjust_alignment): New.
7231 * passes.def: Add pass_adjust_alignment.
7233 2020-05-19 Alex Coplan <alex.coplan@arm.com>
7236 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
7237 identity permutation.
7239 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
7241 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
7242 msp430_small, msp430_large and size24plus DejaGNU effective
7244 Improve grammar in descriptions for size20plus and size32plus effective
7247 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
7249 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
7250 callee saved registers only in xBPF.
7251 (bpf_expand_prologue): Save callee saved registers only in xBPF.
7252 (bpf_expand_epilogue): Likewise for restoring.
7253 * doc/invoke.texi (eBPF Options): Document this is activated by
7256 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
7258 * config/bpf/bpf.opt (mxbpf): New option.
7259 * doc/invoke.texi (Option Summary): Add -mxbpf.
7260 (eBPF Options): Document -mxbbpf.
7262 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
7265 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
7266 (<code>v32qiv32hi2): Ditto.
7267 (<code>v8qiv8hi2): Ditto.
7268 (<code>v16qiv16si2): Ditto.
7269 (<code>v8qiv8si2): Ditto.
7270 (<code>v4qiv4si2): Ditto.
7271 (<code>v16hiv16si2): Ditto.
7272 (<code>v8hiv8si2): Ditto.
7273 (<code>v4hiv4si2): Ditto.
7274 (<code>v8qiv8di2): Ditto.
7275 (<code>v4qiv4di2): Ditto.
7276 (<code>v2qiv2di2): Ditto.
7277 (<code>v8hiv8di2): Ditto.
7278 (<code>v4hiv4di2): Ditto.
7279 (<code>v2hiv2di2): Ditto.
7280 (<code>v8siv8di2): Ditto.
7281 (<code>v4siv4di2): Ditto.
7282 (<code>v2siv2di2): Ditto.
7284 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
7286 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
7287 (riscv_implied_info): New.
7288 (riscv_subset_list): Add handle_implied_ext.
7289 (riscv_subset_list::to_string): New parameter version_p to
7290 control output format.
7291 (riscv_subset_list::handle_implied_ext): New.
7292 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
7293 (riscv_arch_str): New parameter version_p to control output format.
7294 (riscv_expand_arch): New.
7295 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
7297 * config/riscv/riscv.h (riscv_expand_arch): New,
7298 (EXTRA_SPEC_FUNCTIONS): Define.
7299 (ASM_SPEC): Transform -march= via riscv_expand_arch.
7301 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
7303 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
7304 parse_multiletter_ext.
7305 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
7306 adjust parsing order for 's' and 'x'.
7308 2020-05-19 Richard Biener <rguenther@suse.de>
7310 * tree-vectorizer.h (_slp_tree::vectype): Add field.
7311 (SLP_TREE_VECTYPE): New.
7312 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
7314 (vect_create_new_slp_node): Likewise.
7315 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
7317 (vect_slp_analyze_node_operations): Walk nodes children for
7319 (vect_get_constant_vectors): Use local scope op variable.
7320 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
7321 (vect_model_simple_cost): Adjust.
7322 (vect_model_store_cost): Likewise.
7323 (vectorizable_store): Likewise.
7325 2020-05-18 Martin Sebor <msebor@redhat.com>
7328 * tree-object-size.c (decl_init_size): New function.
7329 (addr_object_size): Call it.
7330 * tree.h (last_field): Declare.
7331 (first_field): Add attribute nonnull.
7333 2020-05-18 Martin Sebor <msebor@redhat.com>
7336 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
7337 * tree.c (component_ref_size): Correct the handling or array members
7339 Drop a pointless test.
7340 Rename a local variable.
7342 2020-05-18 Jason Merrill <jason@redhat.com>
7344 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
7345 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
7347 2020-05-14 Jason Merrill <jason@redhat.com>
7349 * doc/install.texi (Prerequisites): Update boostrap compiler
7350 requirement to C++11/GCC 4.8.
7352 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7354 PR tree-optimization/94952
7355 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
7356 Initialize variables bitpos, bitregion_start, and bitregion_end in
7357 order to silence warnings about use of uninitialized variables.
7359 2020-05-18 Carl Love <cel@us.ibm.com>
7362 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
7363 first_match_index_<mode>.
7364 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
7365 additional test cases with zero vector elements.
7367 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
7370 * config/i386/i386-expand.c (ix86_expand_int_movcc):
7371 Avoid reversing a non-trapping comparison to a trapping one.
7373 2020-05-18 Alex Coplan <alex.coplan@arm.com>
7375 * config/arm/arm.c (output_move_double): Fix codegen when loading into
7376 a register pair with an odd base register.
7378 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
7380 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
7381 Do not emit FLAGS_REG clobber for TFmode.
7382 * config/i386/i386.md (*<code>tf2_1): Rewrite as
7383 define_insn_and_split. Mark operands 1 and 2 commutative.
7384 (*nabstf2_1): Ditto.
7385 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
7386 Do not swap memory operands. Simplify RTX generation.
7387 (neg abs SSE splitter): Ditto.
7388 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
7389 commutative. Do not swap operands. Simplify RTX generation.
7390 (*nabs<mode>2): Ditto.
7392 2020-05-18 Richard Biener <rguenther@suse.de>
7394 * tree-vect-slp.c (vect_slp_bb): Start after labels.
7395 (vect_get_constant_vectors): Really place init stmt after scalar defs.
7396 * tree-vect-stmts.c (vect_init_vector_1): Insert before
7399 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
7401 * config/i386/driver-i386.c (host_detect_local_cpu): Support
7402 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
7405 2020-05-18 Richard Biener <rguenther@suse.de>
7408 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
7409 when inlining into a non-call EH function.
7411 2020-05-18 Richard Biener <rguenther@suse.de>
7413 PR tree-optimization/95172
7414 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
7415 eventually need the conditional processing.
7416 (execute_sm_exit): When processing an orderd sequence
7417 avoid doing any conditional processing.
7418 (hoist_memory_references): Pass down whether all edges
7419 have ordered processing for a ref to execute_sm.
7421 2020-05-17 Jeff Law <law@redhat.com>
7423 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
7424 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
7425 into a single pattern using pc_or_label_operand.
7426 * config/h8300/combiner.md (bit branch patterns): Likewise.
7427 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
7429 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
7432 * config/i386/i386-features.c (has_non_address_hard_reg):
7434 (pseudo_reg_set): This. Return the SET expression. Ignore
7435 pseudo register push.
7436 (general_scalar_to_vector_candidate_p): Combine single_set and
7437 has_non_address_hard_reg calls to pseudo_reg_set.
7438 (timode_scalar_to_vector_candidate_p): Likewise.
7439 * config/i386/i386.md (*pushv1ti2): New pattern.
7441 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7444 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7446 * tree-vrp.c (operand_less_p): Move to...
7447 * vr-values.c (operand_less_p): ...here.
7448 * tree-vrp.h (operand_less_p): Remove.
7450 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7452 * tree-vrp.c (operand_less_p): Move to...
7453 * vr-values.c (operand_less_p): ...here.
7454 * tree-vrp.h (operand_less_p): Remove.
7456 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7458 * tree-vrp.c (class vrp_insert): Remove prototype for
7461 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7463 * tree-vrp.c (class live_names): New.
7464 (live_on_edge): Move into live_names.
7465 (build_assert_expr_for): Move into vrp_insert.
7466 (find_assert_locations_in_bb): Rename from
7467 find_assert_locations_1.
7468 (process_assert_insertions_for): Move into vrp_insert.
7469 (compare_assert_loc): Same.
7470 (remove_range_assertions): Same.
7471 (dump_asserts_for): Rename to vrp_insert::dump.
7472 (debug_asserts_for): Rename to vrp_insert::debug.
7473 (dump_all_asserts): Rename to vrp_insert::dump.
7474 (debug_all_asserts): Rename to vrp_insert::debug.
7476 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7478 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
7479 check_array_ref, check_mem_ref, and search_for_addr_array
7481 (class array_bounds_checker): ...here.
7482 (class check_array_bounds_dom_walker): Adjust to use
7483 array_bounds_checker.
7484 (check_all_array_refs): Move into array_bounds_checker and rename
7486 (class vrp_folder): Make fold_predicate_in private.
7488 2020-05-15 Jeff Law <law@redhat.com>
7490 * config/h8300/h8300.md (SFI iterator): New iterator for
7492 * config/h8300/peepholes.md (memory comparison): Use mode
7493 iterator to consolidate 3 patterns into one.
7494 (stack allocation and stack store): Handle SFmode. Handle
7497 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
7499 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
7500 RS6000_BTM_POWERPC64.
7502 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
7504 * config/i386/i386.md (SWI48DWI): New mode iterator.
7505 (*push<mode>2): Allow XMM registers.
7506 (*pushdi2_rex64): Ditto.
7507 (*pushsi2_rex64): Ditto.
7509 (push XMM reg splitter): New splitter
7511 (*pushdf) Change "x" operand constraint to "v".
7512 (*pushsf_rex64): Ditto.
7515 2020-05-15 Richard Biener <rguenther@suse.de>
7517 PR tree-optimization/92260
7518 * tree-vect-slp.c (vect_get_constant_vectors): Compute
7519 the number of vector stmts in a canonical way.
7521 2020-05-15 Martin Liska <mliska@suse.cz>
7523 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
7526 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
7528 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
7530 2020-05-15 Richard Biener <rguenther@suse.de>
7532 PR tree-optimization/95133
7533 * gimple-ssa-split-paths.c
7534 (find_block_to_duplicate_for_splitting_paths): Check for
7537 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
7539 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
7541 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
7543 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
7546 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
7547 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
7550 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
7553 * config/i386/i386.md (isa): Add sse3_noavx.
7554 (enabled): Handle sse3_noavx.
7556 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
7557 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
7558 alternatives. Match commutative vec_select selector operands.
7559 (*mmx_haddv2sf3_low): New insn pattern.
7561 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
7562 (*mmx_hsubv2sf3_low): New insn pattern.
7564 2020-05-15 Richard Biener <rguenther@suse.de>
7566 PR tree-optimization/33315
7567 * tree-ssa-sink.c: Include tree-eh.h.
7568 (sink_stats): Add commoned member.
7569 (sink_common_stores_to_bb): New function implementing store
7570 commoning by sinking to the successor.
7571 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
7572 (pass_sink_code::execute): Likewise. Record commoned stores
7575 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
7577 PR rtl-optimization/37451, part of PR target/61837
7578 * loop-doloop.c (doloop_simplify_count): New function. Simplify
7579 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
7580 (doloop_modify): Call doloop_simplify_count.
7582 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
7585 * doc/sourcebuild.texi: Document effective target lgccjit.
7587 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
7589 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
7590 define_expand, and rename the original to ...
7591 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
7592 (add<mode>3_zext_dup_exec): Likewise, with ...
7593 (add<mode>3_vcc_zext_dup_exec): ... this.
7594 (add<mode>3_zext_dup2): Likewise, with ...
7595 (add<mode>3_zext_dup_exec): ... this.
7596 (add<mode>3_zext_dup2_exec): Likewise, with ...
7597 (add<mode>3_zext_dup2): ... this.
7598 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
7599 addv64di3_zext* calls to use addv64di3_vcc_zext*.
7601 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
7604 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
7605 (extendv2sfv2df2): Ditto.
7607 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
7609 * configure: Regenerated.
7611 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
7613 * config/arm/arm.c (reg_needs_saving_p): New function.
7614 (use_return_insn): Use reg_needs_saving_p.
7615 (arm_get_vfp_saved_size): Likewise.
7616 (arm_compute_frame_layout): Likewise.
7617 (arm_save_coproc_regs): Likewise.
7618 (thumb1_expand_epilogue): Likewise.
7619 (arm_expand_epilogue_apcs_frame): Likewise.
7620 (arm_expand_epilogue): Likewise.
7622 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
7624 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
7626 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
7629 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
7631 (floatv2siv2df2): New expander.
7632 (floatunsv2siv2df2): New insn pattern.
7634 (fix_truncv2dfv2si2): New expander.
7635 (fixuns_truncv2dfv2si2): New insn pattern.
7637 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
7640 * config/aarch64/aarch64-sve-builtins.cc
7641 (handle_arm_sve_vector_bits_attribute): Create a copy of the
7642 original type's TYPE_MAIN_VARIANT, then reapply all the differences
7643 between the original type and its main variant.
7645 2020-05-14 Richard Biener <rguenther@suse.de>
7648 * real.c (real_to_decimal_for_mode): Make sure we handle
7649 a zero with nonzero exponent.
7651 2020-05-14 Jakub Jelinek <jakub@redhat.com>
7653 * Makefile.in (GTFILES): Add omp-general.c.
7654 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
7655 calls_declare_variant_alt members and initialize them in the
7657 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
7658 calls to declare_variant_alt nodes.
7659 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
7660 and calls_declare_variant_alt.
7661 (input_overwrite_node): Read them back.
7662 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
7664 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
7666 (tree_function_versioning): Copy calls_declare_variant_alt bit.
7667 * omp-offload.c (execute_omp_device_lower): Call
7668 omp_resolve_declare_variant on direct function calls.
7669 (pass_omp_device_lower::gate): Also enable for
7670 calls_declare_variant_alt functions.
7671 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
7672 (omp_context_selector_matches): Handle the case when
7673 cfun->curr_properties has PROP_gimple_any bit set.
7674 (struct omp_declare_variant_entry): New type.
7675 (struct omp_declare_variant_base_entry): New type.
7676 (struct omp_declare_variant_hasher): New type.
7677 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
7679 (omp_declare_variants): New variable.
7680 (struct omp_declare_variant_alt_hasher): New type.
7681 (omp_declare_variant_alt_hasher::hash,
7682 omp_declare_variant_alt_hasher::equal): New methods.
7683 (omp_declare_variant_alt): New variables.
7684 (omp_resolve_late_declare_variant): New function.
7685 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
7686 when called late. Create a magic declare_variant_alt fndecl and
7687 cgraph node and return that if decision needs to be deferred until
7688 after gimplification.
7689 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
7693 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
7694 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
7695 entry block if info->after_stmt is NULL, otherwise add after that stmt
7696 and update it after adding each stmt.
7697 (ipa_simd_modify_function_body): Initialize info.after_stmt.
7699 * function.h (struct function): Add has_omp_target bit.
7700 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
7702 (omp_discover_declare_target_tgt_fn_r): ... this.
7703 (omp_discover_declare_target_var_r): Call
7704 omp_discover_declare_target_tgt_fn_r instead of
7705 omp_discover_declare_target_fn_r.
7706 (omp_discover_implicit_declare_target): Also queue functions with
7707 has_omp_target bit set, for those walk with
7708 omp_discover_declare_target_fn_r, for declare target to functions
7709 walk with omp_discover_declare_target_tgt_fn_r.
7711 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
7714 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
7715 Add SSE/AVX alternative. Change operand predicates from
7716 nonimmediate_operand to register_mmxmem_operand.
7717 Enable instruction pattern for TARGET_MMX_WITH_SSE.
7718 (fix_truncv2sfv2si2): New expander.
7719 (fixuns_truncv2sfv2si2): New insn pattern.
7721 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
7722 Add SSE/AVX alternative. Change operand predicates from
7723 nonimmediate_operand to register_mmxmem_operand.
7724 Enable instruction pattern for TARGET_MMX_WITH_SSE.
7725 (floatv2siv2sf2): New expander.
7726 (floatunsv2siv2sf2): New insn pattern.
7728 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
7730 (IX86_BUILTIN_PI2FD): Ditto.
7732 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
7734 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
7736 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
7739 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
7741 * config/s390/s390.c (allocate_stack_space): Add missing updates
7742 of last_probe_offset.
7744 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
7746 * config/s390/s390.md ("allocate_stack"): Call
7747 anti_adjust_stack_and_probe_stack_clash when stack clash
7748 protection is enabled.
7749 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
7750 prototype. Remove static.
7751 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
7754 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
7756 * config/rs6000/altivec.h (vec_extractl): New #define.
7757 (vec_extracth): Likewise.
7758 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
7759 (UNSPEC_EXTRACTR): Likewise.
7760 (vextractl<mode>): New expansion.
7761 (vextractl<mode>_internal): New insn.
7762 (vextractr<mode>): New expansion.
7763 (vextractr<mode>_internal): New insn.
7764 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
7765 New built-in function.
7766 (__builtin_altivec_vextduhvlx): Likewise.
7767 (__builtin_altivec_vextduwvlx): Likewise.
7768 (__builtin_altivec_vextddvlx): Likewise.
7769 (__builtin_altivec_vextdubvhx): Likewise.
7770 (__builtin_altivec_vextduhvhx): Likewise.
7771 (__builtin_altivec_vextduwvhx): Likewise.
7772 (__builtin_altivec_vextddvhx): Likewise.
7773 (__builtin_vec_extractl): New overloaded built-in function.
7774 (__builtin_vec_extracth): Likewise.
7775 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
7776 Define overloaded forms of __builtin_vec_extractl and
7777 __builtin_vec_extracth.
7778 (builtin_function_type): Add cases to mark arguments of new
7779 built-in functions as unsigned.
7780 (rs6000_common_init_builtins): Add
7781 opaque_ftype_opaque_opaque_opaque_opaque.
7782 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
7783 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
7784 for a Future Architecture): Add description of vec_extractl and
7785 vec_extractr built-in functions.
7787 2020-05-13 Richard Biener <rguenther@suse.de>
7789 * target.def (add_stmt_cost): Add new vectype parameter.
7790 * targhooks.c (default_add_stmt_cost): Adjust.
7791 * targhooks.h (default_add_stmt_cost): Likewise.
7792 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
7794 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
7795 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
7796 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
7798 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
7799 (dump_stmt_cost): Add new vectype parameter.
7800 (add_stmt_cost): Likewise.
7801 (record_stmt_cost): Likewise.
7802 (record_stmt_cost): Add overload with old signature.
7803 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
7805 (vect_get_known_peeling_cost): Likewise.
7806 (vect_estimate_min_profitable_iters): Likewise.
7807 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
7808 * tree-vect-stmts.c (record_stmt_cost): Likewise.
7809 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
7810 and pass down correct vectype and NULL stmt_info.
7811 (vect_model_simple_cost): Adjust.
7812 (vect_model_store_cost): Likewise.
7814 2020-05-13 Richard Biener <rguenther@suse.de>
7816 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
7817 (_slp_instance::group_size): Likewise.
7818 * tree-vect-loop.c (vectorizable_reduction): The group size
7819 is the number of lanes in the node.
7820 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
7821 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
7822 verify it matches the instance trees number of lanes.
7823 (vect_slp_analyze_node_operations_1): Use the numer of lanes
7824 in the node as group size.
7825 (vect_bb_vectorization_profitable_p): Use the instance root
7826 number of lanes for the size of life.
7827 (vect_schedule_slp_instance): Use the number of lanes as
7829 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
7830 parameter. Use the number of lanes of the load for the group
7831 size in the gap adjustment code.
7832 (vect_analyze_stmt): Adjust.
7833 (vect_transform_stmt): Likewise.
7835 2020-05-13 Jakub Jelinek <jakub@redhat.com>
7838 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
7839 if the last insn is a note.
7841 PR tree-optimization/95060
7842 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
7843 if it is the single use of the FMA internal builtin.
7845 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
7847 PR tree-optimization/94969
7848 * tree-data-dependence.c (constant_access_functions): Rename to...
7849 (invariant_access_functions): ...this. Add parameter. Check for
7850 invariant access function, rather than constant.
7851 (build_classic_dist_vector): Call above function.
7852 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
7854 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
7857 * doc/extend.texi (x86Operandmodifiers): Document more x86
7859 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
7861 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
7863 * tree-vrp.c (class vrp_insert): New.
7864 (insert_range_assertions): Move to class vrp_insert.
7865 (dump_all_asserts): Same as above.
7866 (dump_asserts_for): Same as above.
7867 (live): Same as above.
7868 (need_assert_for): Same as above.
7869 (live_on_edge): Same as above.
7870 (finish_register_edge_assert_for): Same as above.
7871 (find_switch_asserts): Same as above.
7872 (find_assert_locations): Same as above.
7873 (find_assert_locations_1): Same as above.
7874 (find_conditional_asserts): Same as above.
7875 (process_assert_insertions): Same as above.
7876 (register_new_assert_for): Same as above.
7877 (vrp_prop): New variable fun.
7878 (vrp_initialize): New parameter.
7879 (identify_jump_threads): Same as above.
7880 (execute_vrp): Same as above.
7883 2020-05-12 Keith Packard <keith.packard@sifive.com>
7885 * config/riscv/riscv.c (riscv_unique_section): New.
7886 (TARGET_ASM_UNIQUE_SECTION): New.
7888 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
7890 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
7891 * config/riscv/riscv-passes.def: New file.
7892 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
7893 * config/riscv/riscv-shorten-memrefs.c: New file.
7894 * config/riscv/riscv.c (tree-pass.h): New include.
7895 (riscv_compressed_reg_p): New Function
7896 (riscv_compressed_lw_offset_p): Likewise.
7897 (riscv_compressed_lw_address_p): Likewise.
7898 (riscv_shorten_lw_offset): Likewise.
7899 (riscv_legitimize_address): Attempt to convert base + large_offset
7900 to compressible new_base + small_offset.
7901 (riscv_address_cost): Make anticipated compressed load/stores
7902 cheaper for code size than uncompressed load/stores.
7903 (riscv_register_priority): Move compressed register check to
7904 riscv_compressed_reg_p.
7905 * config/riscv/riscv.h (C_S_BITS): Define.
7906 (CSW_MAX_OFFSET): Define.
7907 * config/riscv/riscv.opt (mshorten-memefs): New option.
7908 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
7909 (PASSES_EXTRA): Add riscv-passes.def.
7910 * doc/invoke.texi: Document -mshorten-memrefs.
7912 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
7913 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
7914 * doc/tm.texi: Regenerate.
7915 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
7916 * sched-deps.c (attempt_change): Use old address if it is cheaper than
7918 * target.def (new_address_profitable_p): New hook.
7919 * targhooks.c (default_new_address_profitable_p): New function.
7920 * targhooks.h (default_new_address_profitable_p): Declare.
7922 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
7925 * config/i386/mmx.md (copysignv2sf3): New expander.
7926 (xorsignv2sf3): Ditto.
7927 (signbitv2sf3): Ditto.
7929 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
7932 * config/i386/mmx.md (fmav2sf4): New insn pattern.
7937 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
7939 * Makefile.in (CET_HOST_FLAGS): New.
7940 (COMPILER): Add $(CET_HOST_FLAGS).
7941 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
7942 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
7944 * aclocal.m4: Regenerated.
7945 * configure: Likewise.
7947 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
7950 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
7951 (*mmx_<code>v2sf2): New insn_and_split pattern.
7952 (*mmx_nabsv2sf2): Ditto.
7953 (*mmx_andnotv2sf3): New insn pattern.
7954 (*mmx_<code>v2sf3): Ditto.
7955 * config/i386/i386.md (absneg_op): New code attribute.
7956 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
7957 (ix86_build_signbit_mask): Ditto.
7959 2020-05-12 Richard Biener <rguenther@suse.de>
7961 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
7964 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
7966 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
7967 Update prototype to include "local" argument.
7968 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
7969 "local" argument. Handle local common decls.
7970 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
7971 msp430_output_aligned_decl_common call with 0 for "local" argument.
7972 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
7974 2020-05-12 Richard Biener <rguenther@suse.de>
7976 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
7978 2020-05-12 Martin Liska <mliska@suse.cz>
7982 * sanopt.c (sanitize_rewrite_addressable_params):
7983 Clear DECL_NOT_GIMPLE_REG_P for argument.
7985 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
7987 PR tree-optimization/94980
7988 * tree-vect-generic.c (expand_vector_comparison): Use
7989 vector_element_bits_tree to get the element size in bits,
7990 rather than using TYPE_SIZE.
7991 (expand_vector_condition, vector_element): Likewise.
7993 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
7995 PR tree-optimization/94980
7996 * tree-vect-generic.c (build_replicated_const): Take the number
7997 of bits as a parameter, instead of the type of the elements.
7998 (do_plus_minus): Update accordingly, using vector_element_bits
7999 to calculate the correct number of bits.
8000 (do_negate): Likewise.
8002 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
8004 PR tree-optimization/94980
8005 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
8006 * tree.c (vector_element_bits, vector_element_bits_tree): New.
8007 * match.pd: Use the new functions instead of determining the
8008 vector element size directly from TYPE_SIZE(_UNIT).
8009 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
8010 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
8011 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
8012 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
8013 (expand_vector_conversion): Likewise.
8014 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
8015 a divisor. Convert the dividend to bits to compensate.
8016 * tree-vect-loop.c (vectorizable_live_operation): Call
8017 vector_element_bits instead of open-coding it.
8019 2020-05-12 Jakub Jelinek <jakub@redhat.com>
8021 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
8022 * omp-offload.c: Include context.h.
8023 (omp_declare_target_fn_p, omp_declare_target_var_p,
8024 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
8025 omp_discover_implicit_declare_target): New functions.
8026 * cgraphunit.c (analyze_functions): Call
8027 omp_discover_implicit_declare_target.
8029 2020-05-12 Richard Biener <rguenther@suse.de>
8031 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
8032 literal constant &MEM[..] to a constant literal.
8034 2020-05-12 Richard Biener <rguenther@suse.de>
8036 PR tree-optimization/95045
8037 * dbgcnt.def (lim): Add debug-counter.
8038 * tree-ssa-loop-im.c: Include dbgcnt.h.
8039 (find_refs_for_sm): Use lim debug counter for store motion
8041 (do_store_motion): Rename form store_motion. Commit edge
8043 (store_motion_loop): ... here.
8044 (tree_ssa_lim): Adjust.
8046 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8048 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
8049 (vec_ctzm): Rename to vec_cnttzm.
8050 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
8051 Change fourth operand for vec_ternarylogic to require
8052 compatibility with unsigned SImode rather than unsigned QImode.
8053 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8054 Remove overloaded forms of vec_gnb that are no longer needed.
8055 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8056 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
8057 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
8058 vec_gnb; move vec_ternarylogic documentation into this section
8059 and replace const unsigned char with const unsigned int as its
8062 2020-05-11 Carl Love <cel@us.ibm.com>
8064 * config/rs6000/altivec.h (vec_genpcvm): New #define.
8065 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
8067 (XXGENPCVM_V8HI): Likewise.
8068 (XXGENPCVM_V4SI): Likewise.
8069 (XXGENPCVM_V2DI): Likewise.
8070 (XXGENPCVM): New overloaded built-in instantiation.
8071 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
8072 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
8073 (altivec_expand_builtin): Add special handling for
8074 FUTURE_BUILTIN_VEC_XXGENPCVM.
8075 (builtin_function_type): Add handling for
8076 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
8077 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
8078 (UNSPEC_XXGENPCV): New constant.
8079 (xxgenpcvm_<mode>_internal): New insn.
8080 (xxgenpcvm_<mode>): New expansion.
8081 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
8083 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8085 * config/rs6000/altivec.h (vec_strir): New #define.
8086 (vec_stril): Likewise.
8087 (vec_strir_p): Likewise.
8088 (vec_stril_p): Likewise.
8089 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
8090 (UNSPEC_VSTRIL): Likewise.
8091 (vstrir_<mode>): New expansion.
8092 (vstrir_code_<mode>): New insn.
8093 (vstrir_p_<mode>): New expansion.
8094 (vstrir_p_code_<mode>): New insn.
8095 (vstril_<mode>): New expansion.
8096 (vstril_code_<mode>): New insn.
8097 (vstril_p_<mode>): New expansion.
8098 (vstril_p_code_<mode>): New insn.
8099 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
8100 New built-in function.
8101 (__builtin_altivec_vstrihr): Likewise.
8102 (__builtin_altivec_vstribl): Likewise.
8103 (__builtin_altivec_vstrihl): Likewise.
8104 (__builtin_altivec_vstribr_p): Likewise.
8105 (__builtin_altivec_vstrihr_p): Likewise.
8106 (__builtin_altivec_vstribl_p): Likewise.
8107 (__builtin_altivec_vstrihl_p): Likewise.
8108 (__builtin_vec_strir): New overloaded built-in function.
8109 (__builtin_vec_stril): Likewise.
8110 (__builtin_vec_strir_p): Likewise.
8111 (__builtin_vec_stril_p): Likewise.
8112 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8113 Define overloaded forms of __builtin_vec_strir,
8114 __builtin_vec_stril, __builtin_vec_strir_p, and
8115 __builtin_vec_stril_p.
8116 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8117 for a Future Architecture): Add description of vec_stril,
8118 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
8120 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
8122 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
8123 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
8125 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
8126 * config/rs6000/rs6000-builtin.def: Add handling of new macro
8128 (BU_FUTURE_V_4): New macro. Use it.
8129 (BU_FUTURE_OVERLOAD_4): Likewise.
8130 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
8131 handling for quaternary built-in functions.
8132 (altivec_resolve_overloaded_builtin): Add special-case handling
8133 for __builtin_vec_xxeval.
8134 * config/rs6000/rs6000-call.c: Add handling of new macro
8135 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
8136 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
8137 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
8138 (altivec_overloaded_builtins): Add definitions for
8139 FUTURE_BUILTIN_VEC_XXEVAL.
8140 (bdesc_4arg): New array.
8141 (htm_expand_builtin): Add handling for quaternary built-in
8143 (rs6000_expand_quaternop_builtin): New function.
8144 (rs6000_expand_builtin): Add handling for quaternary built-in
8146 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
8147 for unsigned QImode and unsigned HImode.
8148 (builtin_quaternary_function_type): New function.
8149 (rs6000_common_init_builtins): Add handling of quaternary
8151 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
8153 (RS6000_BTC_PREDICATE): Change value of constant.
8154 (RS6000_BTC_ABS): Likewise.
8155 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
8156 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
8157 for a Future Architecture): Add description of vec_ternarylogic
8160 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8162 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
8164 (__builtin_pextd): Likewise.
8165 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
8166 (UNSPEC_PEXTD): Likewise.
8169 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
8170 a Future Architecture): Add descriptions of __builtin_pdepd and
8171 __builtin_pextd functions.
8173 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8175 * config/rs6000/altivec.h (vec_clrl): New #define.
8176 (vec_clrr): Likewise.
8177 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
8178 (UNSPEC_VCLRRB): Likewise.
8181 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
8183 (__builtin_altivec_vclrrb): Likewise.
8184 (__builtin_vec_clrl): New overloaded built-in function.
8185 (__builtin_vec_clrr): Likewise.
8186 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8187 Define overloaded forms of __builtin_vec_clrl and
8189 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8190 for a Future Architecture): Add descriptions of vec_clrl and
8193 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8195 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
8196 built-in function definition.
8197 (__builtin_cnttzdm): Likewise.
8198 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
8199 (UNSPEC_CNTTZDM): Likewise.
8200 (cntlzdm): New insn.
8201 (cnttzdm): Likewise.
8202 * doc/extend.texi (Basic PowerPC Built-in Functions available for
8203 a Future Architecture): Add descriptions of __builtin_cntlzdm and
8204 __builtin_cnttzdm functions.
8206 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
8209 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
8211 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8213 * config/rs6000/altivec.h (vec_cfuge): New #define.
8214 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
8215 (vcfuged): New insn.
8216 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
8217 New built-in function.
8218 * config/rs6000/rs6000-call.c (builtin_function_type): Add
8219 handling for FUTURE_BUILTIN_VCFUGED case.
8220 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8221 for a Future Architecture): Add description of vec_cfuge built-in
8224 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8226 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
8228 (BU_FUTURE_MISC_1): Likewise.
8229 (BU_FUTURE_MISC_2): Likewise.
8230 (BU_FUTURE_MISC_3): Likewise.
8231 (__builtin_cfuged): New built-in function definition.
8232 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
8234 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
8235 a Future Architecture): New subsubsection.
8237 2020-05-11 Richard Biener <rguenther@suse.de>
8239 PR tree-optimization/95049
8240 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
8241 between different constants.
8243 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
8245 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
8247 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8248 Bill Schmidt <wschmidt@linux.ibm.com>
8250 * config/rs6000/altivec.h (vec_gnb): New #define.
8251 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
8253 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
8255 (BU_FUTURE_OVERLOAD_2): Likewise.
8256 (BU_FUTURE_OVERLOAD_3): Likewise.
8257 (__builtin_altivec_gnb): New built-in function.
8258 (__buiiltin_vec_gnb): New overloaded built-in function.
8259 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8260 Define overloaded forms of __builtin_vec_gnb.
8261 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
8262 of __builtin_vec_gnb.
8263 (builtin_function_type): Mark return value and arguments unsigned
8264 for FUTURE_BUILTIN_VGNB.
8265 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8266 for a Future Architecture): Add description of vec_gnb built-in
8269 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8270 Bill Schmidt <wschmidt@linux.ibm.com>
8272 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
8274 (vec_pext): Likewise.
8275 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
8276 (UNSPEC_VPEXTD): Likewise.
8279 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
8281 (__builtin_altivec_vpextd): Likewise.
8282 * config/rs6000/rs6000-call.c (builtin_function_type): Add
8283 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
8285 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
8286 for a Future Architecture): Add description of vec_pdep and
8287 vec_pext built-in functions.
8289 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8290 Bill Schmidt <wschmidt@linux.ibm.com>
8292 * config/rs6000/altivec.h (vec_clzm): New macro.
8293 (vec_ctzm): Likewise.
8294 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
8295 (UNSPEC_VCTZDM): Likewise.
8298 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
8299 (BU_FUTURE_V_1): Likewise.
8300 (BU_FUTURE_V_2): Likewise.
8301 (BU_FUTURE_V_3): Likewise.
8302 (__builtin_altivec_vclzdm): New builtin definition.
8303 (__builtin_altivec_vctzdm): Likewise.
8304 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
8305 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
8307 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
8308 value and parameter types to be unsigned for VCLZDM and VCTZDM.
8309 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
8310 support for TARGET_FUTURE flag.
8311 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
8312 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
8313 for a Future Architecture): New subsubsection.
8315 2020-05-11 Richard Biener <rguenther@suse.de>
8317 PR tree-optimization/94988
8318 PR tree-optimization/95025
8319 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
8320 (sm_seq_push_down): Take extra parameter denoting where we
8322 (execute_sm_exit): Re-issue sm_other stores in the correct
8324 (sm_seq_valid_bb): When always executed, allow sm_other to
8325 prevail inbetween sm_ord and record their stored value.
8326 (hoist_memory_references): Adjust refs_not_supported propagation
8327 and prune sm_other from the end of the ordered sequences.
8329 2020-05-11 Felix Yang <felix.yang@huawei.com>
8332 * config/aarch64/aarch64.md (mov<mode>):
8333 Bitcasts to the equivalent integer mode using gen_lowpart
8334 instead of doing FAIL for scalar floating point move.
8336 2020-05-11 Alex Coplan <alex.coplan@arm.com>
8338 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
8339 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
8340 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
8341 (*csinv3_uxtw_insn2): New.
8342 (*csinv3_uxtw_insn3): New.
8343 * config/aarch64/iterators.md (neg_not_cs): New.
8345 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
8348 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
8349 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
8350 (*mmx_addv2sf3): Ditto.
8351 (*mmx_subv2sf3): Ditto.
8352 (*mmx_mulv2sf3): Ditto.
8353 (*mmx_<code>v2sf3): Ditto.
8354 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
8356 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
8359 * config/i386/i386.c (ix86_vector_mode_supported_p):
8360 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
8361 * config/i386/mmx.md (*mov<mode>_internal): Do not set
8362 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
8364 (mmx_addv2sf3): Change operand predicates from
8365 nonimmediate_operand to register_mmxmem_operand.
8366 (addv2sf3): New expander.
8367 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
8368 predicates from nonimmediate_operand to register_mmxmem_operand.
8369 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8371 (mmx_subv2sf3): Change operand predicate from
8372 nonimmediate_operand to register_mmxmem_operand.
8373 (mmx_subrv2sf3): Ditto.
8374 (subv2sf3): New expander.
8375 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
8376 predicates from nonimmediate_operand to register_mmxmem_operand.
8377 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8379 (mmx_mulv2sf3): Change operand predicates from
8380 nonimmediate_operand to register_mmxmem_operand.
8381 (mulv2sf3): New expander.
8382 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
8383 predicates from nonimmediate_operand to register_mmxmem_operand.
8384 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8386 (mmx_<code>v2sf3): Change operand predicates from
8387 nonimmediate_operand to register_mmxmem_operand.
8388 (<code>v2sf3): New expander.
8389 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
8390 predicates from nonimmediate_operand to register_mmxmem_operand.
8391 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8392 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
8394 2020-05-11 Martin Liska <mliska@suse.cz>
8397 * common.opt: Fix typo in option description.
8399 2020-05-11 Martin Liska <mliska@suse.cz>
8401 PR gcov-profile/94928
8402 * gcov-io.h: Add caveat about coverage format parsing and
8403 possible outdated documentation.
8405 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
8407 PR tree-optimization/83403
8408 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
8409 determine_value_range, Add fold conversion of MULT_EXPR, fix the
8412 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
8414 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
8415 __ILP32__ for 32-bit targets.
8417 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
8419 * tree.h (expr_align): Delete.
8420 * tree.c (expr_align): Likewise.
8422 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
8424 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
8425 from end_of_function_needs.
8427 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
8428 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
8430 * config/cris/t-elfmulti: Remove crisv32 multilib.
8431 * config/cris: Remove shared-library and CRIS v32 support.
8433 Move trivially from cc0 to reg:CC model, removing most optimizations.
8434 * config/cris/cris.md: Remove all side-effect patterns and their
8435 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
8436 to all but post-reload control-flow and movem insns. Remove
8437 constraints on all modified expanders. Remove obsoleted cc0-related
8439 (attr "cc"): Remove alternative "rev".
8440 (mode_iterator BWDD, DI_, SI_): New.
8441 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
8442 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
8443 ("mstep_shift", "mstep_mul"): Remove patterns.
8444 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
8445 * config/cris/cris.c: Change all non-condition-code,
8446 non-control-flow emitted insns to add a parallel with clobber of
8447 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
8448 emit_insn to use of emit_move_insn, gen_add2_insn or
8449 cris_emit_insn, as convenient.
8450 (cris_reg_overlap_mentioned_p)
8451 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
8452 (cris_movem_load_rest_p): Don't assume all elements in a
8454 (cris_store_multiple_op_p): Ditto.
8455 (cris_emit_insn): New function.
8456 * cris/cris-protos.h (cris_emit_insn): Declare.
8459 * config/cris/cris.md (zcond): New code_iterator.
8460 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
8462 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
8464 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
8466 * config/cris/cris.md ("movsi"): For memory destination
8467 post-reload, generate clobberless variant. Similarly for a
8468 zero-source post-reload.
8469 ("*mov_tomem<mode>_split"): New split.
8470 ("*mov_tomem<mode>"): New insn.
8471 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
8472 "Q>m" for less-than-SImode.
8473 ("*mov_fromzero<mode>_split"): New split.
8474 ("*mov_fromzero<mode>"): New insn.
8476 Prepare for cmpelim pass to eliminate redundant compare insns.
8477 * config/cris/cris-modes.def: New file.
8478 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
8479 (cris_notice_update_cc): Remove left-over declaration.
8480 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
8481 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
8482 * config/cris/cris.h (SELECT_CC_MODE): Define.
8483 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
8485 (cond): New code_iterator.
8486 (nzcond): Replacement for incorrect ncond. All callers changed.
8487 (nzvccond): Replacement for ocond. All callers changed.
8488 (rnzcond): Replacement for rcond. All callers changed.
8489 (xCC): New code_attr.
8490 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
8492 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
8493 CCmode with iteration over NZVCSET.
8494 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
8496 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
8497 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
8498 ("*btst<mode>"): Similarly, from "*btst".
8499 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
8500 iterating over cond instead of matching the comparison with
8501 ordered_comparison_operator.
8502 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
8503 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
8505 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
8506 NZVCUSE. Remove FIXME.
8507 ("*b<nzcond:code>_reversed<mode>"): Similarly from
8508 "*b<ncond:code>_reversed", over NZUSE.
8509 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
8510 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
8511 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
8512 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
8513 depending on CC_NZmode vs. CCmode. Remove FIXME.
8514 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
8515 "*b<rcond:code>_reversed", over NZUSE.
8516 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
8517 iterating over cond instead of matching the comparison with
8518 ordered_comparison_operator.
8519 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
8520 iterating over NZUSE.
8521 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
8522 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
8523 depending on CC_NZmode vs. CCmode.
8524 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
8525 NZVCUSE. Remove FIXME.
8526 ("cc"): Comment on new use.
8527 ("cc_enabled"): New attribute.
8528 ("enabled"): Make default fall back to cc_enabled.
8529 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
8530 default_subst_attrs.
8531 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
8532 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
8533 "*movsi_internal". Correct contents of, and rename attribute
8534 "cc" to "cc<cccc><ccnz><ccnzvc>".
8535 ("anz", "anzvc", "acc"): New define_subst_attrs.
8536 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
8537 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
8538 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
8539 "movqi". Correct contents of, and rename "cc" attribute to
8540 "cc<cccc><ccnz><ccnzvc>".
8541 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
8542 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
8543 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
8544 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
8545 Rename from "extend<mode>si2".
8546 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
8547 Similar, from "zero_extend<mode>si2".
8548 ("*adddi3<setnz>"): Rename from "*adddi3".
8549 ("*subdi3<setnz>"): Similarly from "*subdi3".
8550 ("*addsi3<setnz>"): Similarly from "*addsi3".
8551 ("*subsi3<setnz>"): Similarly from "*subsi3".
8552 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
8553 "cc" attribute to "cc<ccnz>".
8554 ("*addqi3<setnz>"): Similarly from "*addqi3".
8555 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
8556 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
8558 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
8559 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
8560 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
8561 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
8562 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
8563 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
8564 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
8565 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
8567 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
8569 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
8571 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
8573 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
8575 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
8577 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
8578 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
8579 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
8580 (znnCC, rznnCC): New code_attrs.
8581 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
8582 obseolete comment. Add belt-and-suspenders mode-test to condition.
8583 Add fixme regarding remaining matched-but-not-generated case.
8584 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
8585 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
8586 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
8587 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
8588 Handle output of CC_ZnNmode.
8589 ("*b<nzcond:code>_reversed<mode>"): Ditto.
8591 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
8592 NEG too. Correct comment.
8593 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
8596 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
8598 * ira-color.c (update_costs_from_allocno): Remove
8599 conflict_cost_update_p argument. Propagate costs only along
8600 threads. Always do conflict cost update. Add printing debugging
8602 (update_costs_from_copies): Add printing debugging info.
8603 (restore_costs_from_copies): Ditto.
8604 (assign_hard_reg): Improve debug info.
8605 (push_only_colorable): Ditto. Call update_costs_from_prefs.
8606 (color_allocnos): Remove update_costs_from_prefs.
8608 2020-05-08 Richard Biener <rguenther@suse.de>
8610 * tree-vectorizer.h (vec_info::slp_loads): New.
8611 (vect_optimize_slp): Declare.
8612 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
8613 nothing when there are no loads.
8614 (vect_gather_slp_loads): Gather loads into a vector.
8615 (vect_supported_load_permutation_p): Remove.
8616 (vect_analyze_slp_instance): Do not verify permutation
8618 (vect_analyze_slp): Optimize permutations of reductions
8619 after all SLP instances have been gathered and gather
8621 (vect_optimize_slp): New function split out from
8622 vect_supported_load_permutation_p. Elide some permutations.
8623 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
8624 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
8625 * tree-vect-stmts.c (vectorizable_load): Check whether
8626 the load can be permuted. When generating code assert we can.
8628 2020-05-08 Richard Biener <rguenther@suse.de>
8630 * tree-ssa-sccvn.c (rpo_avail): Change type to
8631 eliminate_dom_walker *.
8632 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
8633 use the DOM walker availability.
8634 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
8635 with vn_valueize as valueization callback.
8636 (vn_reference_maybe_forwprop_address): Likewise.
8637 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
8638 array_ref_low_bound.
8640 2020-05-08 Jakub Jelinek <jakub@redhat.com>
8642 PR tree-optimization/94786
8643 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
8647 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
8651 * tree.c (get_narrower): Reuse the op temporary instead of
8654 PR tree-optimization/94783
8655 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
8658 PR tree-optimization/94956
8659 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
8660 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
8662 PR tree-optimization/94913
8663 * match.pd (A - B + -1 >= A to B >= A): New simplification.
8664 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
8665 true for TYPE_UNSIGNED integral types.
8668 PR rtl-optimization/94516
8669 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
8671 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
8672 Call df_notes_rescan if that argument is not true and returning true.
8673 * combine.c (adjust_for_new_dest): Pass true as second argument to
8674 remove_reg_equal_equiv_notes.
8675 * postreload.c (reload_combine_recognize_pattern): Don't call
8678 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
8680 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
8682 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
8683 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
8684 (*neg_ne_<mode>): Likewise.
8686 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
8688 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
8690 (*setbcr_<un>signed_<GPR:mode>): Likewise.
8691 (cstore<mode>4): Use setbc[r] if available.
8692 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
8693 (eq<mode>3): Use setbc for TARGET_FUTURE.
8694 (*eq<mode>3): Avoid for TARGET_FUTURE.
8695 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
8696 else for non-Pmode, use gen_eq and gen_xor.
8697 (*ne<mode>3): Avoid for TARGET_FUTURE.
8698 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
8700 2020-05-07 Jeff Law <law@redhat.com>
8702 * config/h8300/h8300.md: Move expanders and patterns into
8703 files based on functionality.
8704 * config/h8300/addsub.md: New file.
8705 * config/h8300/bitfield.md: New file
8706 * config/h8300/combiner.md: New file
8707 * config/h8300/divmod.md: New file
8708 * config/h8300/extensions.md: New file
8709 * config/h8300/jumpcall.md: New file
8710 * config/h8300/logical.md: New file
8711 * config/h8300/movepush.md: New file
8712 * config/h8300/multiply.md: New file
8713 * config/h8300/other.md: New file
8714 * config/h8300/proepi.md: New file
8715 * config/h8300/shiftrotate.md: New file
8716 * config/h8300/testcompare.md: New file
8718 * config/h8300/h8300.md (adds/subs splitters): Merge into single
8720 (negation expanders and patterns): Simplify and combine using
8722 (one_cmpl expanders and patterns): Likewise.
8723 (tablejump, indirect_jump patterns ): Likewise.
8724 (shift and rotate expanders and patterns): Likewise.
8725 (absolute value expander and pattern): Drop expander, rename pattern
8727 (peephole2 patterns): Move into...
8728 * config/h8300/peepholes.md: New file.
8730 * config/h8300/constraints.md (L and N): Simplify now that we're not
8731 longer supporting the original H8/300 chip.
8732 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
8733 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
8734 (shift_alg_hi, shift_alg_si): Similarly.
8735 (h8300_option_overrides): Similarly. Default to H8/300H. If
8736 compiling for H8/S, then turn off H8/300H. Do not update the
8737 shift_alg tables for H8/300 port.
8738 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
8740 (push, split_adds_subs, h8300_rtx_costs): Likewise.
8741 (h8300_print_operand, compute_mov_length): Likewise.
8742 (output_plussi, compute_plussi_length): Likewise.
8743 (compute_plussi_cc, output_logical_op): Likewise.
8744 (compute_logical_op_length, compute_logical_op_cc): Likewise.
8745 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
8746 (output_a_shift, compute_a_shift_length): Likewise.
8747 (output_a_rotate, compute_a_rotate_length): Likewise.
8748 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
8749 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
8750 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
8751 (attr_cpu, TARGET_H8300): Remove.
8752 (TARGET_DEFAULT): Update.
8753 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
8754 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
8755 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
8756 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
8757 * config/h8300/h8300.md: Simplify patterns throughout.
8758 * config/h8300/t-h8300: Update multilib configuration.
8760 * config/h8300/h8300.h (LINK_SPEC): Remove.
8761 (USER_LABEL_PREFIX): Likewise.
8763 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
8764 (h8300_option_override): Remove remnants of COFF support.
8766 2020-05-07 Alan Modra <amodra@gmail.com>
8768 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
8769 set_rtx_cost with set_src_cost.
8770 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
8772 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
8774 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
8775 redundant half vector handlings for no peeling gaps.
8777 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
8779 * tree-ssa-operands.c (operands_scanner): New class.
8780 (operands_bitmap_obstack): Remove.
8781 (n_initialized): Remove.
8782 (build_uses): Move to operands_scanner class.
8783 (build_vuse): Same as above.
8784 (build_vdef): Same as above.
8785 (verify_ssa_operands): Same as above.
8786 (finalize_ssa_uses): Same as above.
8787 (cleanup_build_arrays): Same as above.
8788 (finalize_ssa_stmt_operands): Same as above.
8789 (start_ssa_stmt_operands): Same as above.
8790 (append_use): Same as above.
8791 (append_vdef): Same as above.
8792 (add_virtual_operand): Same as above.
8793 (add_stmt_operand): Same as above.
8794 (get_mem_ref_operands): Same as above.
8795 (get_tmr_operands): Same as above.
8796 (maybe_add_call_vops): Same as above.
8797 (get_asm_stmt_operands): Same as above.
8798 (get_expr_operands): Same as above.
8799 (parse_ssa_operands): Same as above.
8800 (finalize_ssa_defs): Same as above.
8801 (build_ssa_operands): Same as above, plus create a C-like wrapper.
8802 (update_stmt_operands): Create an instance of operands_scanner.
8804 2020-05-07 Richard Biener <rguenther@suse.de>
8807 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
8808 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
8809 (refered_from_nonlocal_var): Likewise.
8810 (ipa_pta_execute): Likewise.
8812 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
8814 * gcc/tree-ssa-struct-alias.c: Fix comments
8816 2020-05-07 Martin Liska <mliska@suse.cz>
8818 * doc/invoke.texi: Fix 2 optindex entries.
8820 2020-05-07 Richard Biener <rguenther@suse.de>
8823 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
8824 (tree_decl_common::not_gimple_reg_flag): ... to this.
8825 * tree.h (DECL_GIMPLE_REG_P): Rename ...
8826 (DECL_NOT_GIMPLE_REG_P): ... to this.
8827 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
8828 (create_tmp_reg): Simplify.
8829 (create_tmp_reg_fn): Likewise.
8830 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
8831 * gimplify.c (create_tmp_from_val): Simplify.
8832 (gimplify_bind_expr): Likewise.
8833 (gimplify_compound_literal_expr): Likewise.
8834 (gimplify_function_tree): Likewise.
8835 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
8836 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
8837 (asan_add_global): Copy it.
8838 * cgraphunit.c (cgraph_node::expand_thunk): Force args
8840 * function.c (gimplify_parameters): Copy
8841 DECL_NOT_GIMPLE_REG_P.
8842 * ipa-param-manipulation.c
8843 (ipa_param_body_adjustments::common_initialization): Simplify.
8844 (ipa_param_body_adjustments::reset_debug_stmts): Copy
8845 DECL_NOT_GIMPLE_REG_P.
8846 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
8847 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
8848 * tree-cfg.c (make_blocks_1): Simplify.
8849 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
8850 * tree-eh.c (lower_eh_constructs_2): Simplify.
8851 * tree-inline.c (declare_return_variable): Adjust and
8853 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
8854 (copy_result_decl_to_var): Likewise.
8855 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
8856 * tree-nested.c (create_tmp_var_for): Simplify.
8857 * tree-parloops.c (separate_decls_in_region_name): Copy
8858 DECL_NOT_GIMPLE_REG_P.
8859 * tree-sra.c (create_access_replacement): Adjust and
8860 generalize partial def support.
8861 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
8862 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
8863 * tree-ssa.c (maybe_optimize_var): Handle clearing of
8864 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
8866 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
8867 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
8868 DECL_NOT_GIMPLE_REG_P.
8869 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
8870 * cfgexpand.c (avoid_type_punning_on_regs): New.
8871 (discover_nonconstant_array_refs): Call
8872 avoid_type_punning_on_regs to avoid unsupported mode punning.
8874 2020-05-07 Alex Coplan <alex.coplan@arm.com>
8876 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
8879 2020-05-07 Richard Biener <rguenther@suse.de>
8881 PR tree-optimization/57359
8882 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
8883 (in_mem_ref::dep_loop): Repurpose.
8884 (LOOP_DEP_BIT): Remove.
8885 (enum dep_kind): New.
8886 (enum dep_state): Likewise.
8887 (record_loop_dependence): New function to populate the
8889 (query_loop_dependence): New function to query the dependence
8891 (memory_accesses::refs_in_loop): Rename to ...
8892 (memory_accesses::refs_loaded_in_loop): ... this and change to
8894 (outermost_indep_loop): Adjust.
8895 (mem_ref_alloc): Likewise.
8896 (gather_mem_refs_stmt): Likewise.
8897 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
8898 (struct sm_aux): New.
8899 (execute_sm): Split code generation on exits, record state
8901 (enum sm_kind): New.
8902 (execute_sm_exit): Exit code generation part.
8903 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
8904 dependence checking on stores reached from exits.
8905 (sm_seq_valid_bb): New function gathering SM stores on exits.
8906 (hoist_memory_references): Re-implement.
8907 (refs_independent_p): Add tbaa_p parameter and pass it down.
8908 (record_dep_loop): Remove.
8909 (ref_indep_loop_p_1): Fold into ...
8910 (ref_indep_loop_p): ... this and generalize for three kinds
8911 of dependence queries.
8912 (can_sm_ref_p): Adjust according to hoist_memory_references
8914 (store_motion_loop): Don't do anything if the set of SM
8915 candidates is empty.
8916 (tree_ssa_lim_initialize): Adjust.
8917 (tree_ssa_lim_finalize): Likewise.
8919 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
8920 Pierre-Marie de Rodat <derodat@adacore.com>
8922 * dwarf2out.c (add_data_member_location_attribute): Take into account
8923 the variant part offset in the computation of the data bit offset.
8924 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
8925 in the call to field_byte_offset.
8926 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
8927 confusing assertion.
8928 (analyze_variant_discr): Deal with boolean subtypes.
8930 2020-05-07 Martin Liska <mliska@suse.cz>
8932 * lto-wrapper.c: Split arguments of MAKE environment
8935 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
8937 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
8938 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
8939 fenv_var and new_fenv_var.
8941 2020-05-06 Jakub Jelinek <jakub@redhat.com>
8944 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
8946 (avx512dq_vextract<shuffletype>64x2_1_maskm,
8947 avx512f_vextract<shuffletype>32x4_1_maskm,
8948 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
8949 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
8951 (*avx512dq_vextract<shuffletype>64x2_1,
8952 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
8953 define_insns. Even in the masked variant allow memory output but in
8954 that case use 0 rather than 0C constraint on the source of masked-out
8956 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
8958 (*avx512f_vextract<shuffletype>32x4_1,
8959 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
8960 Even in the masked variant allow memory output but in that case use
8961 0 rather than 0C constraint on the source of masked-out elts.
8962 (vec_extract_lo_<mode><mask_name>): Split into ...
8963 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
8964 define_insns. Even in the masked variant allow memory output but in
8965 that case use 0 rather than 0C constraint on the source of masked-out
8967 (vec_extract_hi_<mode><mask_name>): Split into ...
8968 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
8969 define_insns. Even in the masked variant allow memory output but in
8970 that case use 0 rather than 0C constraint on the source of masked-out
8973 2020-05-06 qing zhao <qing.zhao@oracle.com>
8976 * common.opt: Add -flarge-source-files.
8977 * doc/invoke.texi: Document it.
8978 * toplev.c (process_options): set line_table->default_range_bits
8979 to 0 when flag_large_source_files is true.
8981 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
8984 * config/i386/predicates.md (add_comparison_operator): New predicate.
8985 * config/i386/i386.md (compare->add splitter): New splitters.
8987 2020-05-06 Richard Biener <rguenther@suse.de>
8989 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
8990 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
8991 Remove slp_instance parameter, just iterate over all scalar stmts.
8992 (vect_slp_analyze_instance_dependence): Adjust and likewise.
8993 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
8995 (vect_schedule_slp): Just iterate over all scalar stmts.
8996 (vect_supported_load_permutation_p): Adjust.
8997 (vect_transform_slp_perm_load): Remove slp_instance parameter,
8998 instead use the number of lanes in the node as group size.
8999 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
9000 factor instead of slp_instance as parameter.
9001 (vectorizable_load): Adjust.
9003 2020-05-06 Andreas Schwab <schwab@suse.de>
9005 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
9006 (aarch64_get_extension_string_for_isa_flags): Don't declare.
9008 2020-05-06 Richard Biener <rguenther@suse.de>
9011 * cfgloopmanip.c (create_preheader): Require non-complex
9012 preheader edge for CP_SIMPLE_PREHEADERS.
9014 2020-05-06 Richard Biener <rguenther@suse.de>
9016 PR tree-optimization/94963
9017 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
9018 no-warning marking of the conditional store.
9019 (execute_sm): Instead mark the uninitialized state
9020 on loop entry to be not warned about.
9022 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
9024 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
9025 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
9026 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
9027 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
9029 * config/i386/i386-builtin.def: Add new builtins.
9030 * config/i386/i386-c.c (ix86_target_macros_internal): Define
9032 * config/i386/i386-options.c (ix86_target_string): Add
9034 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
9035 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
9037 * config/i386/i386.md (define_c_enum "unspec"): Add
9038 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
9039 (TSXLDTRK): New define_int_iterator.
9040 ("<tsxldtrk>"): New define_insn.
9041 * config/i386/i386.opt: Add -mtsxldtrk.
9042 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
9043 * config/i386/tsxldtrkintrin.h: New.
9044 * doc/invoke.texi: Document -mtsxldtrk.
9046 2020-05-06 Jakub Jelinek <jakub@redhat.com>
9048 PR tree-optimization/94921
9049 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
9052 2020-05-06 Richard Biener <rguenther@suse.de>
9054 PR tree-optimization/94965
9055 * tree-vect-stmts.c (vectorizable_load): Fix typo.
9057 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
9059 * doc/install.texi: Replace Sun with Solaris as appropriate.
9060 (Tools/packages necessary for building GCC, Perl version between
9061 5.6.1 and 5.6.24): Remove Solaris 8 reference.
9062 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
9064 (Specific, i?86-*-solaris2*): Update version references for
9065 Solaris 11.3 and later. Remove gas 2.26 caveat.
9066 (Specific, *-*-solaris2*): Update version references for
9067 Solaris 11.3 and later. Remove boehm-gc reference.
9068 Document GMP, MPFR caveats on Solaris 11.3.
9069 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
9070 (Specific, sparc64-*-solaris2*): Likewise.
9071 Document --build requirement.
9073 2020-05-06 Jakub Jelinek <jakub@redhat.com>
9076 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
9077 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
9079 PR rtl-optimization/94873
9080 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
9081 note if SET_SRC (set) has side-effects.
9083 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
9084 Wei Xiao <wei3.xiao@intel.com>
9086 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
9087 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
9088 (ix86_handle_option): Handle -mserialize.
9089 * config.gcc (serializeintrin.h): New header file.
9090 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
9091 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
9093 * config/i386/i386-builtin.def: Add new builtin.
9094 * config/i386/i386-c.c (__SERIALIZE__): New macro.
9095 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
9097 * (ix86_valid_target_attribute_inner_p): Add target attribute
9099 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
9101 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
9102 (serialize): New define_insn.
9103 * config/i386/i386.opt (mserialize): New option
9104 * config/i386/immintrin.h: Include serailizeintrin.h.
9105 * config/i386/serializeintrin.h: New header file.
9106 * doc/invoke.texi: Add documents for -mserialize.
9108 2020-05-06 Richard Biener <rguenther@suse.de>
9110 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
9111 to/from pointer conversion checking.
9113 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
9115 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
9117 * config/rs6000/rs6000-c.c: Likewise.
9118 * config/rs6000/rs6000-call.c: Likewise.
9119 * config/rs6000/rs6000.c: Likewise.
9121 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
9123 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
9124 (RTEMS_ENDFILE_SPEC): Likewise.
9125 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
9126 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
9127 (LIB_SPECS): Support -nodefaultlibs option.
9128 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
9129 (RTEMS_ENDFILE_SPEC): Likewise.
9130 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
9131 (RTEMS_ENDFILE_SPEC): Likewise.
9132 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
9133 (RTEMS_ENDFILE_SPEC): Likewise.
9135 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9137 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
9138 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
9140 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9142 * config/pru/pru.h: Mark R3.w0 as caller saved.
9144 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9146 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
9147 and gen_doloop_begin_internal.
9148 (pru_reorg_loop): Use gen_pruloop with mode.
9149 * config/pru/pru.md: Use new @insn syntax.
9151 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9153 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
9155 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
9157 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
9158 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
9159 (addqi3_cconly_overflow): Ditto.
9160 (umulv<mode>4): Ditto.
9161 (<s>mul<mode>3_highpart): Ditto.
9162 (tls_global_dynamic_32): Ditto.
9163 (tls_local_dynamic_base_32): Ditto.
9170 (*adddi_4): Remove "m" constraint from scratch operand.
9171 (*add<mode>_4): Ditto.
9173 2020-05-05 Jakub Jelinek <jakub@redhat.com>
9175 PR rtl-optimization/94516
9176 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
9177 with sp = reg, add REG_EQUAL note with sp + const.
9178 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
9179 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
9180 postreload sp = sp + const to sp = reg optimization if needed and
9182 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
9183 reg = sp insn with sp + const REG_EQUAL note. Adjust
9184 try_apply_stack_adjustment caller, call
9185 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
9186 (combine_stack_adjustments): Allocate and free LIVE bitmap,
9187 adjust combine_stack_adjustments_for_block caller.
9189 2020-05-05 Martin Liska <mliska@suse.cz>
9191 PR gcov-profile/93623
9192 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
9195 2020-05-05 Martin Liska <mliska@suse.cz>
9197 * opt-functions.awk (opt_args_non_empty): New function.
9198 * opt-read.awk: Use the function for various option arguments.
9200 2020-05-05 Martin Liska <mliska@suse.cz>
9203 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
9204 report warning when the jobserver is not detected.
9206 2020-05-05 Martin Liska <mliska@suse.cz>
9208 PR gcov-profile/94636
9209 * gcov.c (main): Print total lines summary at the end.
9210 (generate_results): Expect file_name always being non-null.
9211 Print newline after intermediate file is printed in order to align with
9212 what we do for normal files.
9214 2020-05-05 Martin Liska <mliska@suse.cz>
9216 * dumpfile.c (dump_switch_p): Change return type
9217 and print option suggestion.
9218 * dumpfile.h: Change return type.
9219 * opts-global.c (handle_common_deferred_options):
9220 Move error into dump_switch_p function.
9222 2020-05-05 Martin Liska <mliska@suse.cz>
9225 * alloc-pool.h: Use const for some arguments.
9226 * bitmap.h: Likewise.
9227 * mem-stats.h: Likewise.
9228 * sese.h (get_entry_bb): Likewise.
9229 (get_exit_bb): Likewise.
9231 2020-05-05 Richard Biener <rguenther@suse.de>
9233 * tree-vect-slp.c (struct vdhs_data): New.
9234 (vect_detect_hybrid_slp): New walker.
9235 (vect_detect_hybrid_slp): Rewrite.
9237 2020-05-05 Richard Biener <rguenther@suse.de>
9240 * tree-ssa-structalias.c (ipa_pta_execute): Use
9241 varpool_node::externally_visible_p ().
9242 (refered_from_nonlocal_var): Likewise.
9244 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
9246 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
9247 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
9248 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
9250 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
9252 * gimplify.c (gimplify_init_constructor): Do not put the constructor
9253 into static memory if it is not complete.
9255 2020-05-05 Richard Biener <rguenther@suse.de>
9257 PR tree-optimization/94949
9258 * tree-ssa-loop-im.c (execute_sm): Check whether we use
9259 the multithreaded model or always compute the stored value
9260 before eliding a load.
9262 2020-05-05 Alex Coplan <alex.coplan@arm.com>
9264 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
9266 2020-05-05 Jakub Jelinek <jakub@redhat.com>
9268 PR tree-optimization/94800
9269 * match.pd (X + (X << C) to X * (1 + (1 << C)),
9270 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
9274 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
9276 PR tree-optimization/94914
9277 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
9280 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
9282 * config/i386/i386.md (*testqi_ext_3): Use
9283 int_nonimmediate_operand instead of manual mode checks.
9284 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
9285 Use int_nonimmediate_operand predicate. Rewrite
9286 define_insn_and_split pattern to a combine pass splitter.
9288 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
9290 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
9291 * configure: Regenerate.
9293 2020-05-05 Jakub Jelinek <jakub@redhat.com>
9296 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
9297 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
9298 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
9299 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
9301 2020-05-04 Clement Chigot <clement.chigot@atos.net>
9302 David Edelsohn <dje.gcc@gmail.com>
9304 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
9305 for fmodl, frexpl, ldexpl and modfl builtins.
9307 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
9310 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
9311 chosen lhs is different from the gcall lhs.
9312 (expand_mask_load_optab_fn): Likewise.
9313 (expand_gather_load_optab_fn): Likewise.
9315 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
9318 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
9319 (EQ compare->LTU compare splitter): New splitter.
9320 (NE compare->NEG splitter): Ditto.
9322 2020-05-04 Marek Polacek <polacek@redhat.com>
9325 2020-04-30 Marek Polacek <polacek@redhat.com>
9328 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
9329 (check_aligned_type): Check if TYPE_USER_ALIGN match.
9331 2020-05-04 Richard Biener <rguenther@suse.de>
9333 PR tree-optimization/93891
9334 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
9335 the original reference tree for assessing access alignment.
9337 2020-05-04 Richard Biener <rguenther@suse.de>
9339 PR tree-optimization/39612
9340 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
9341 (set_ref_loaded_in_loop): New.
9342 (mark_ref_loaded): Likewise.
9343 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
9344 (execute_sm): Avoid issueing a load when it was not there.
9345 (execute_sm_if_changed): Avoid issueing warnings for the
9348 2020-05-04 Martin Jambor <mjambor@suse.cz>
9351 * tree-inline.c (tree_function_versioning): Leave any type conversion
9352 of replacements to setup_one_parameter and its friend
9353 force_value_to_type.
9355 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
9358 * config/i386/predicates.md (shr_comparison_operator): New predicate.
9359 * config/i386/i386.md (compare->shr splitter): New splitters.
9361 2020-05-04 Jakub Jelinek <jakub@redhat.com>
9363 PR tree-optimization/94718
9364 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
9366 PR tree-optimization/94718
9367 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
9368 replace two nop conversions on bit_{and,ior,xor} argument
9369 and result with just one conversion on the result or another argument.
9371 PR tree-optimization/94718
9372 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
9373 -> (X ^ Y) & C eqne 0 optimization to ...
9374 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
9376 * opts.c (get_option_html_page): Instead of hardcoding a list of
9377 options common between C/C++ and Fortran only use gfortran/
9378 documentation for warnings that have CL_Fortran set but not
9381 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
9383 * config/i386/i386-expand.c (ix86_expand_int_movcc):
9384 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
9385 (emit_memmov): Ditto.
9386 (emit_memset): Ditto.
9387 (ix86_expand_strlensi_unroll_1): Ditto.
9388 (release_scratch_register_on_entry): Ditto.
9389 (gen_frame_set): Ditto.
9390 (ix86_emit_restore_reg_using_pop): Ditto.
9391 (ix86_emit_outlined_ms2sysv_restore): Ditto.
9392 (ix86_expand_epilogue): Ditto.
9393 (ix86_expand_split_stack_prologue): Ditto.
9394 * config/i386/i386.md (push immediate splitter): Ditto.
9398 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
9400 PR translation/93861
9401 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
9404 2020-05-02 Jakub Jelinek <jakub@redhat.com>
9406 * config/tilegx/tilegx.md
9407 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
9408 rather than just <n>.
9410 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
9413 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
9414 and crtl->patch_area_entry.
9415 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
9416 * opts.c (common_handle_option): Limit
9417 function_entry_patch_area_size and function_entry_patch_area_start
9418 to USHRT_MAX. Fix a typo in error message.
9419 * varasm.c (assemble_start_function): Use crtl->patch_area_size
9420 and crtl->patch_area_entry.
9421 * doc/invoke.texi: Document the maximum value for
9422 -fpatchable-function-entry.
9424 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
9426 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
9427 Override SUBTARGET_SHADOW_OFFSET macro.
9429 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
9431 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
9432 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
9433 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
9434 * config/i386/freebsd.h: Likewise.
9435 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
9436 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
9438 2020-04-30 Alexandre Oliva <oliva@adacore.com>
9440 * doc/sourcebuild.texi (Effective-Target Keywords): Document
9441 the newly-introduced fileio effective target.
9443 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
9445 PR rtl-optimization/94740
9446 * cse.c (cse_process_notes_1): Replace with...
9447 (cse_process_note_1): ...this new function, acting as a
9448 simplify_replace_fn_rtx callback to process_note. Handle only
9449 REGs and MEMs directly. Validate the MEM if cse_process_note
9450 changes its address.
9451 (cse_process_notes): Replace with...
9452 (cse_process_note): ...this new function.
9453 (cse_extended_basic_block): Update accordingly, iterating over
9454 the register notes and passing individual notes to cse_process_note.
9456 2020-04-30 Carl Love <cel@us.ibm.com>
9458 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
9460 2020-04-30 Martin Jambor <mjambor@suse.cz>
9463 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
9464 saved by the inliner and thunks which had their call inlined.
9465 * ipa-inline-transform.c (save_inline_function_body): Fill in
9466 former_clone_of of new body holders.
9468 2020-04-30 Jakub Jelinek <jakub@redhat.com>
9470 * BASE-VER: Set to 11.0.0.
9472 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
9474 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
9476 2020-04-30 Marek Polacek <polacek@redhat.com>
9479 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
9480 (check_aligned_type): Check if TYPE_USER_ALIGN match.
9482 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9484 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
9485 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
9486 * doc/invoke.texi (moutline-atomics): Document as on by default.
9488 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
9491 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
9492 the check for NOTE_INSN_DELETED_LABEL.
9494 2020-04-30 Jakub Jelinek <jakub@redhat.com>
9496 * configure.ac (--with-documentation-root-url,
9497 --with-changes-root-url): Diagnose URL not ending with /,
9498 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
9499 * opts.h (get_changes_url): Remove.
9500 * opts.c (get_changes_url): Remove.
9501 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
9502 or -DCHANGES_ROOT_URL.
9503 * doc/install.texi (--with-documentation-root-url,
9504 --with-changes-root-url): Document.
9505 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
9506 get_changes_url and free, change url variable type to const char * and
9507 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
9508 * config/s390/s390.c (s390_function_arg_vector,
9509 s390_function_arg_float): Likewise.
9510 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
9512 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
9514 * config.in: Regenerate.
9515 * configure: Regenerate.
9517 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
9520 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
9522 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
9524 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
9525 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
9527 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
9529 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
9530 Change constraint for vlrl/vstrl to jb4.
9532 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9534 * var-tracking.c (vt_initialize): Move variables pre and post
9535 into inner block and initialize both in order to fix warning
9536 about uninitialized use. Remove unnecessary checks for
9537 frame_pointer_needed.
9539 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9541 * toplev.c (output_stack_usage_1): Ensure that first
9542 argument to fprintf is not null.
9544 2020-04-29 Jakub Jelinek <jakub@redhat.com>
9546 * configure.ac (-with-changes-root-url): New configure option,
9547 defaulting to https://gcc.gnu.org/.
9548 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
9550 * pretty-print.c (get_end_url_string): New function.
9551 (pp_format): Handle %{ and %} for URLs.
9552 (pp_begin_url): Use pp_string instead of pp_printf.
9553 (pp_end_url): Use get_end_url_string.
9554 * opts.h (get_changes_url): Declare.
9555 * opts.c (get_changes_url): New function.
9556 * config/rs6000/rs6000-call.c: Include opts.h.
9557 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
9558 of just in GCC 10.1 in diagnostics and add URL.
9559 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
9560 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
9562 * config/s390/s390.c (s390_function_arg_vector,
9563 s390_function_arg_float): Likewise.
9564 * configure: Regenerated.
9567 * config/s390/s390.c (s390_function_arg_vector,
9568 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
9569 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
9570 passed to the function rather than the type of the single element.
9571 Rename cxx17_empty_base_seen variable to empty_base_seen, change
9572 type to int, and adjust diagnostics depending on if the field
9573 has [[no_unique_attribute]] or not.
9576 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
9577 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
9578 used in casts into parens.
9579 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
9580 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
9581 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
9582 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
9583 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
9584 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
9585 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
9586 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
9587 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
9588 _mm256_mask_cmp_epu8_mask): Likewise.
9589 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
9590 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
9591 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
9592 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
9595 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
9596 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
9597 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
9598 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
9599 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
9600 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
9601 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
9602 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
9603 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
9604 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
9605 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
9606 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
9607 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
9609 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
9610 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
9611 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
9612 as mask vector containing -1.0 or -1.0f elts, but instead vector
9613 with all bits set using _mm*_cmpeq_p? with zero operands.
9614 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
9615 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
9616 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
9617 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
9618 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
9619 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
9620 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
9621 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
9622 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
9623 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
9624 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
9625 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
9626 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
9627 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
9628 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
9629 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
9630 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
9632 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
9633 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
9634 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
9635 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
9636 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
9637 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
9638 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
9639 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
9640 _mm512_mask_prefetch_i64scatter_ps): Likewise.
9641 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
9642 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
9643 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
9644 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
9645 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
9646 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
9647 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
9648 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
9649 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
9650 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
9651 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
9652 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
9653 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
9654 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
9655 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
9656 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
9657 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
9658 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
9659 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
9660 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
9661 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
9662 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
9663 _mm_mask_i64scatter_epi64): Likewise.
9665 2020-04-29 Jeff Law <law@redhat.com>
9667 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
9668 division instructions are 4 bytes long.
9670 2020-04-29 Jakub Jelinek <jakub@redhat.com>
9673 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
9674 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
9675 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
9676 take address of TARGET_EXPR of fenv_var with void_node initializer.
9679 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9681 PR tree-optimization/94774
9682 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
9685 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
9687 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
9688 * calls.c (cxx17_empty_base_field_p): New function. Check
9689 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
9692 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
9695 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
9696 Allow -fcf-protection with -mindirect-branch=thunk-extern and
9697 -mfunction-return=thunk-extern.
9698 * doc/invoke.texi: Update notes for -fcf-protection=branch with
9699 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
9701 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
9703 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
9705 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
9707 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
9708 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
9709 fenv_var and new_fenv_var.
9711 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
9713 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
9714 effective-target keyword.
9715 (arm_arch_v8a_hard_multilib): Likewise.
9716 (arm_arch_v8a_hard): Document new dg-add-options keyword.
9717 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
9718 code is deprecated and has not been updated to handle
9719 DECL_FIELD_ABI_IGNORED.
9720 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
9721 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
9722 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
9723 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
9724 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
9725 something actually is a HFA or HVA. Record whether we see a
9726 [[no_unique_address]] field that previous GCCs would not have
9727 ignored in this way.
9728 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
9729 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
9730 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
9731 diagnostic messages.
9732 (arm_needs_doubleword_align): Add a comment explaining why we
9733 consider even zero-sized fields.
9735 2020-04-29 Richard Biener <rguenther@suse.de>
9736 Li Zekun <lizekun1@huawei.com>
9739 * tree.c (component_ref_size): Guard against error_mark_node
9740 DECL_INITIAL as it happens with LTO.
9742 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
9744 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
9745 comment explaining why we consider even zero-sized fields.
9746 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
9747 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
9748 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
9749 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
9750 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
9751 something actually is a HFA or HVA. Record whether we see a
9752 [[no_unique_address]] field that previous GCCs would not have
9753 ignored in this way.
9754 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
9755 whether diagnostics should be suppressed. Update the calls to
9756 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
9757 [[no_unique_address]] case.
9758 (aarch64_return_in_msb): Update call accordingly, never silencing
9760 (aarch64_function_value): Likewise.
9761 (aarch64_return_in_memory_1): Likewise.
9762 (aarch64_init_cumulative_args): Likewise.
9763 (aarch64_gimplify_va_arg_expr): Likewise.
9764 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
9765 use it to decide whether arch64_vfp_is_call_or_return_candidate
9767 (aarch64_pass_by_reference): Update calls accordingly.
9768 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
9769 to decide whether arch64_vfp_is_call_or_return_candidate should be
9772 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
9775 * config/aarch64/aarch64-builtins.c
9776 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
9777 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
9780 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
9782 * configure.ac <$enable_offload_targets>: Do parsing as done
9784 * configure: Regenerate.
9786 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
9787 * configure: Regenerate.
9790 * rtlanal.c (set_noop_p): Handle non-constant selectors.
9793 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
9795 (TARGET_EXCEPT_UNWIND_INFO): Define.
9797 2020-04-29 Jakub Jelinek <jakub@redhat.com>
9800 * config/gcn/gcn.md (*mov<mode>_insn): Use
9801 'reg_overlap_mentioned_p' to check for overlap.
9804 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
9805 instead of cxx17_empty_base_field_p.
9808 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
9809 DECL_FIELD_ABI_IGNORED.
9810 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
9811 * calls.h (cxx17_empty_base_field_p): Change into a temporary
9812 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
9814 * calls.c (cxx17_empty_base_field_p): Remove.
9815 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
9816 DECL_FIELD_ABI_IGNORED.
9817 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
9818 * lto-streamer-out.c (hash_tree): Likewise.
9819 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
9820 cxx17_empty_base_seen to empty_base_seen, change type to int *,
9821 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
9822 cxx17_empty_base_field_p, if "no_unique_address" attribute is
9823 present, propagate that to the caller too.
9824 (rs6000_discover_homogeneous_aggregate): Adjust
9825 rs6000_aggregate_candidate caller, emit different diagnostics
9826 when c++17 empty base fields are present and when empty
9827 [[no_unique_address]] fields are present.
9828 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
9829 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
9832 2020-04-29 Richard Biener <rguenther@suse.de>
9834 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
9835 Just check whether the stmt stores.
9837 2020-04-28 Alexandre Oliva <oliva@adacore.com>
9840 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
9841 output operand in emulation. Don't overwrite pseudos.
9843 2020-04-28 Jeff Law <law@redhat.com>
9845 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
9846 multiply patterns are 4 bytes long.
9848 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9850 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
9851 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
9853 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
9854 Jakub Jelinek <jakub@redhat.com>
9857 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
9858 base class artificial fields.
9859 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
9860 decision is different after this fix.
9862 2020-04-28 David Malcolm <dmalcolm@redhat.com>
9868 * doc/invoke.texi (Static Analyzer Options): Remove
9869 -Wanalyzer-use-of-uninitialized-value.
9870 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
9872 2020-04-28 Jakub Jelinek <jakub@redhat.com>
9874 PR tree-optimization/94809
9875 * tree.c (build_call_expr_internal_loc_array): Call
9876 process_call_operands.
9878 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
9880 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
9881 * config/aarch64/aarch64-tune.md: Regenerate.
9882 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
9883 (thunderx3t110_regmove_cost): Likewise.
9884 (thunderx3t110_vector_cost): Likewise.
9885 (thunderx3t110_prefetch_tune): Likewise.
9886 (thunderx3t110_tunings): Likewise.
9887 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
9889 * config/aarch64/thunderx3t110.md: New file.
9890 * config/aarch64/aarch64.md: Include thunderx3t110.md.
9891 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
9893 2020-04-28 Jakub Jelinek <jakub@redhat.com>
9896 * config/s390/s390.c (s390_function_arg_vector,
9897 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
9899 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
9901 PR tree-optimization/94727
9902 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
9903 operands are invariant booleans, use the mask type associated with the
9904 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
9905 (vectorizable_condition): Pass vectype unconditionally to
9906 vect_is_simple_cond.
9908 2020-04-27 Jakub Jelinek <jakub@redhat.com>
9911 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
9912 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
9913 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
9915 2020-04-27 David Malcolm <dmalcolm@redhat.com>
9918 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
9919 default value, so that it can by supplied by get_option_html_page.
9920 * configure: Regenerate.
9921 * opts.c: Include "selftest.h".
9922 (get_option_html_page): New function.
9923 (get_option_url): Use it. Reformat to place comments next to the
9924 expressions they refer to.
9925 (selftest::test_get_option_html_page): New.
9926 (selftest::opts_c_tests): New.
9927 * selftest-run-tests.c (selftest::run_tests): Call
9928 selftest::opts_c_tests.
9929 * selftest.h (selftest::opts_c_tests): New decl.
9931 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
9933 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
9934 UINTVAL to CONST_INTs.
9936 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9938 * config/arm/constraints.md (e): Remove constraint.
9939 (Te): Define constraint.
9940 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
9941 operand 0 from "e" to "Te".
9942 (vaddvaq_<supf><mode>): Likewise.
9943 (vaddvq_p_<supf><mode>): Likewise.
9944 (vmladavq_<supf><mode>): Likewise.
9945 (vmladavxq_s<mode>): Likewise.
9946 (vmlsdavq_s<mode>): Likewise.
9947 (vmlsdavxq_s<mode>): Likewise.
9948 (vaddvaq_p_<supf><mode>): Likewise.
9949 (vmladavaq_<supf><mode>): Likewise.
9950 (vmladavq_p_<supf><mode>): Likewise.
9951 (vmladavxq_p_s<mode>): Likewise.
9952 (vmlsdavq_p_s<mode>): Likewise.
9953 (vmlsdavxq_p_s<mode>): Likewise.
9954 (vmlsdavaxq_s<mode>): Likewise.
9955 (vmlsdavaq_s<mode>): Likewise.
9956 (vmladavaxq_s<mode>): Likewise.
9957 (vmladavaq_p_<supf><mode>): Likewise.
9958 (vmladavaxq_p_s<mode>): Likewise.
9959 (vmlsdavaq_p_s<mode>): Likewise.
9960 (vmlsdavaxq_p_s<mode>): Likewise.
9962 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
9964 * config/arm/arm.c (output_move_neon): Only get the first operand if
9967 2020-04-27 Felix Yang <felix.yang@huawei.com>
9969 PR tree-optimization/94784
9970 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
9971 assert around so that it checks that the two vectors have equal
9972 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
9973 types is a useless_type_conversion_p.
9975 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
9978 * dwarf2cfi.c (struct GTY): Add ra_mangled.
9979 (cfi_row_equal_p): Check ra_mangled.
9980 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
9981 this only handles the sparc logic now.
9982 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
9983 the aarch64 specific logic.
9984 (dwarf2out_frame_debug): Update to use the new subroutines.
9985 (change_cfi_row): Check ra_mangled.
9987 2020-04-27 Jakub Jelinek <jakub@redhat.com>
9990 * config/s390/s390.c (s390_function_arg_vector,
9991 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
9993 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
9995 * common/config/rs6000/rs6000-common.c
9996 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
9998 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
10001 2020-04-27 Martin Liska <mliska@suse.cz>
10004 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
10005 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
10007 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
10010 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
10012 (rs6000_emit_prologue_components):
10013 Check with frame_pointer_needed_indeed.
10014 (rs6000_emit_epilogue_components): Likewise.
10015 (rs6000_emit_prologue): Likewise.
10016 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
10018 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
10020 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
10021 stack frame when debugging and flag_compare_debug is enabled.
10023 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
10025 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
10026 enable PC-relative addressing for -mcpu=future.
10027 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
10028 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
10029 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
10030 suppress PC-relative addressing.
10031 (rs6000_option_override_internal): Split up error messages
10032 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
10033 system supports it.
10035 2020-04-25 Jakub Jelinek <jakub@redhat.com>
10036 Richard Biener <rguenther@suse.de>
10038 PR tree-optimization/94734
10039 PR tree-optimization/89430
10040 * tree-ssa-phiopt.c: Include tree-eh.h.
10041 (cond_store_replacement): Return false if an automatic variable
10042 access could trap. If -fstore-data-races, don't return false
10043 just because an automatic variable is addressable.
10045 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
10047 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
10049 (add<mode>_sext_dup2_exec): Likewise.
10051 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
10054 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
10055 endian byteshift_val calculation.
10057 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
10059 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
10061 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
10063 * config/aarch64/arm_sve.h: Add a comment.
10065 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
10067 PR rtl-optimization/94708
10068 * combine.c (simplify_if_then_else): Add check for
10069 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
10071 2020-04-23 Martin Sebor <msebor@redhat.com>
10074 * common.opt (-Wno-frame-larger-than): New option.
10075 (-Wno-larger-than, -Wno-stack-usage): Same.
10077 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
10079 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
10081 (mov<mode>_exec): Likewise.
10082 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
10083 (<convop><mode><vndi>2_exec): Likewise.
10085 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
10087 PR tree-optimization/94717
10088 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
10089 of the stores doesn't have the same landing pad number as the first.
10090 (coalesce_immediate_stores): Do not try to coalesce the store using
10091 bswap if it doesn't have the same landing pad number as the first.
10093 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
10095 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
10096 Replace outdated link to ELFv2 ABI.
10098 2020-04-23 Jakub Jelinek <jakub@redhat.com>
10101 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
10104 PR middle-end/94724
10105 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
10106 temporarily with non-final second operand and updating it later,
10107 push COMPOUND_EXPRs into a vector and process it in reverse,
10108 creating COMPOUND_EXPRs with the final operands.
10110 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
10113 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
10114 bti c and bti j handling.
10116 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
10117 Thomas Schwinge <thomas@codesourcery.com>
10119 PR middle-end/93488
10121 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
10122 t_async and the wait arguments.
10124 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
10126 PR tree-optimization/94727
10127 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
10128 comparing invariant scalar booleans.
10130 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
10131 Jakub Jelinek <jakub@redhat.com>
10134 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
10135 empty base class artificial fields.
10136 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
10137 different after this fix.
10139 2020-04-23 Jakub Jelinek <jakub@redhat.com>
10142 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
10143 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
10144 if the same type has been diagnosed most recently already.
10146 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10148 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
10150 (__arm_vbicq_n_s16): Likewise.
10151 (__arm_vbicq_n_u32): Likewise.
10152 (__arm_vbicq_n_s32): Likewise.
10153 (__arm_vbicq): Likewise.
10154 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
10155 (__arm_vbicq_n_s32): Likewise.
10156 (__arm_vbicq_n_u16): Likewise.
10157 (__arm_vbicq_n_u32): Likewise.
10158 (__arm_vdupq_m_n_s8): Likewise.
10159 (__arm_vdupq_m_n_s16): Likewise.
10160 (__arm_vdupq_m_n_s32): Likewise.
10161 (__arm_vdupq_m_n_u8): Likewise.
10162 (__arm_vdupq_m_n_u16): Likewise.
10163 (__arm_vdupq_m_n_u32): Likewise.
10164 (__arm_vdupq_m_n_f16): Likewise.
10165 (__arm_vdupq_m_n_f32): Likewise.
10166 (__arm_vldrhq_gather_offset_s16): Likewise.
10167 (__arm_vldrhq_gather_offset_s32): Likewise.
10168 (__arm_vldrhq_gather_offset_u16): Likewise.
10169 (__arm_vldrhq_gather_offset_u32): Likewise.
10170 (__arm_vldrhq_gather_offset_f16): Likewise.
10171 (__arm_vldrhq_gather_offset_z_s16): Likewise.
10172 (__arm_vldrhq_gather_offset_z_s32): Likewise.
10173 (__arm_vldrhq_gather_offset_z_u16): Likewise.
10174 (__arm_vldrhq_gather_offset_z_u32): Likewise.
10175 (__arm_vldrhq_gather_offset_z_f16): Likewise.
10176 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
10177 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
10178 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
10179 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
10180 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
10181 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
10182 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
10183 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
10184 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
10185 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
10186 (__arm_vldrwq_gather_offset_s32): Likewise.
10187 (__arm_vldrwq_gather_offset_u32): Likewise.
10188 (__arm_vldrwq_gather_offset_f32): Likewise.
10189 (__arm_vldrwq_gather_offset_z_s32): Likewise.
10190 (__arm_vldrwq_gather_offset_z_u32): Likewise.
10191 (__arm_vldrwq_gather_offset_z_f32): Likewise.
10192 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
10193 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
10194 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
10195 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
10196 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
10197 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
10198 (__arm_vdwdupq_x_n_u8): Likewise.
10199 (__arm_vdwdupq_x_n_u16): Likewise.
10200 (__arm_vdwdupq_x_n_u32): Likewise.
10201 (__arm_viwdupq_x_n_u8): Likewise.
10202 (__arm_viwdupq_x_n_u16): Likewise.
10203 (__arm_viwdupq_x_n_u32): Likewise.
10204 (__arm_vidupq_x_n_u8): Likewise.
10205 (__arm_vddupq_x_n_u8): Likewise.
10206 (__arm_vidupq_x_n_u16): Likewise.
10207 (__arm_vddupq_x_n_u16): Likewise.
10208 (__arm_vidupq_x_n_u32): Likewise.
10209 (__arm_vddupq_x_n_u32): Likewise.
10210 (__arm_vldrdq_gather_offset_s64): Likewise.
10211 (__arm_vldrdq_gather_offset_u64): Likewise.
10212 (__arm_vldrdq_gather_offset_z_s64): Likewise.
10213 (__arm_vldrdq_gather_offset_z_u64): Likewise.
10214 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
10215 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
10216 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
10217 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
10218 (__arm_vidupq_m_n_u8): Likewise.
10219 (__arm_vidupq_m_n_u16): Likewise.
10220 (__arm_vidupq_m_n_u32): Likewise.
10221 (__arm_vddupq_m_n_u8): Likewise.
10222 (__arm_vddupq_m_n_u16): Likewise.
10223 (__arm_vddupq_m_n_u32): Likewise.
10224 (__arm_vidupq_n_u16): Likewise.
10225 (__arm_vidupq_n_u32): Likewise.
10226 (__arm_vidupq_n_u8): Likewise.
10227 (__arm_vddupq_n_u16): Likewise.
10228 (__arm_vddupq_n_u32): Likewise.
10229 (__arm_vddupq_n_u8): Likewise.
10231 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
10233 * doc/install.texi (D-Specific Options): Document
10234 --enable-libphobos-checking and --with-libphobos-druntime-only.
10236 2020-04-23 Jakub Jelinek <jakub@redhat.com>
10239 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
10240 cxx17_empty_base_seen argument. Pass it to recursive calls.
10241 Ignore cxx17_empty_base_field_p fields after setting
10242 *cxx17_empty_base_seen to true.
10243 (rs6000_discover_homogeneous_aggregate): Adjust
10244 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
10245 aggregates with C++17 empty base fields.
10248 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
10249 if last_decl is error_mark_node or has such a TREE_TYPE.
10252 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
10253 if last_decl is error_mark_node or has such a TREE_TYPE.
10255 2020-04-22 Felix Yang <felix.yang@huawei.com>
10258 * config/aarch64/aarch64.h (TARGET_SVE):
10259 Add && !TARGET_GENERAL_REGS_ONLY.
10260 (TARGET_SVE2): Add && TARGET_SVE.
10261 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
10262 TARGET_SVE2_SM4): Add && TARGET_SVE2.
10263 * config/aarch64/aarch64-sve-builtins.h
10264 (sve_switcher::m_old_general_regs_only): New member.
10265 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
10267 (reported_missing_registers_p): New variable.
10268 (check_required_extensions): Call check_required_registers before
10269 return if all required extenstions are present.
10270 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
10271 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
10272 global_options.x_target_flags.
10273 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
10274 global_options.x_target_flags if m_old_general_regs_only is true.
10276 2020-04-22 Zackery Spytz <zspytz@gmail.com>
10278 * doc/extend.exi: Add "free" to list of other builtin functions
10281 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
10284 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
10285 if TARGET_PREFIXED.
10286 (store_quadpti): Ditto.
10287 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
10288 plq will be used and doesn't need it.
10289 (atomic_store<mode>): Ditto, for pstq.
10291 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
10293 * doc/invoke.texi: Update flags turned on by -O3.
10295 2020-04-22 Jakub Jelinek <jakub@redhat.com>
10298 * config/ia64/ia64.c (hfa_element_mode): Ignore
10299 cxx17_empty_base_field_p fields.
10302 * calls.h (cxx17_empty_base_field_p): Declare.
10303 * calls.c (cxx17_empty_base_field_p): Define.
10305 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
10307 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
10309 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10310 Andre Vieira <andre.simoesdiasvieira@arm.com>
10311 Mihail Ionescu <mihail.ionescu@arm.com>
10313 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
10314 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
10315 (ALL_QUIRKS): Add quirk_no_asmcpu.
10316 (cortex-m55): Define new cpu.
10317 * config/arm/arm-tables.opt: Regenerate.
10318 * config/arm/arm-tune.md: Likewise.
10319 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
10321 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
10323 PR tree-optimization/94700
10324 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
10325 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
10326 of similarly-structured but distinct vector types.
10328 2020-04-21 Martin Sebor <msebor@redhat.com>
10330 PR middle-end/94647
10331 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
10332 the computation of the lower bound of the source access size.
10333 (builtin_access::generic_overlap): Remove a hack for setting ranges
10334 of overlap offsets.
10336 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
10338 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
10339 (ASM_WEAKEN_DECL): New define.
10340 (HAVE_GAS_WEAKREF): Undefine.
10342 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
10344 PR tree-optimization/94683
10345 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
10346 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
10347 but distinct vector types.
10349 2020-04-21 Jakub Jelinek <jakub@redhat.com>
10352 * stor-layout.c (place_field, finalize_record_size): Don't emit
10353 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
10354 * ubsan.c (ubsan_get_type_descriptor_type,
10355 ubsan_get_source_location_type, ubsan_create_data): Set
10357 * asan.c (asan_global_struct): Likewise.
10359 2020-04-21 Duan bo <duanbo3@huawei.com>
10362 * config/aarch64/aarch64.c: Add an error message for option conflict.
10363 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
10364 incompatible with -fpic, -fPIC and -mabi=ilp32.
10366 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
10369 * omp-low.c (new_omp_context): Remove assignments to
10370 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
10372 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
10374 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
10375 ("popcountv2di2_vx"): Use simplify_gen_subreg.
10377 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
10380 * config/s390/s390-builtin-types.def: Add 3 new function modes.
10381 * config/s390/s390-builtins.def: Add mode dependent low-level
10382 builtin and map the overloaded builtins to these.
10383 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
10384 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
10386 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
10388 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
10389 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
10390 estimated VF and is no worse at double the estimated VF.
10392 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
10395 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
10396 order of arguments to rtx_vector_builder.
10397 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
10398 When extending the trailing constants to a full vector, replace any
10399 variables with zeros.
10401 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
10404 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
10407 2020-04-20 Martin Liska <mliska@suse.cz>
10409 * symtab.c (symtab_node::dump_references): Add space after
10411 (symtab_node::dump_referring): Likewise.
10413 2020-04-18 Jeff Law <law@redhat.com>
10416 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
10419 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
10421 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
10422 attributes): Document d_runtime_has_std_library.
10424 2020-04-17 Jeff Law <law@redhat.com>
10426 PR rtl-optimization/90275
10427 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
10428 when the destination has a REG_UNUSED note.
10430 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
10432 PR middle-end/94635
10433 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
10436 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
10438 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
10439 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
10440 cost of load and store insns if one loop iteration has enough scalar
10441 elements to use an Advanced SIMD LDP or STP.
10442 (aarch64_add_stmt_cost): Update call accordingly.
10444 2020-04-17 Jakub Jelinek <jakub@redhat.com>
10445 Jeff Law <law@redhat.com>
10448 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
10449 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
10450 or pos + len >= 32, or pos + len is equal to operands[2] precision
10451 and operands[2] is not a register operand. During splitting perform
10452 SImode AND if operands[0] doesn't have CCZmode and pos + len is
10453 equal to mode precision.
10455 2020-04-17 Richard Biener <rguenther@suse.de>
10458 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
10460 * dwarf2out.c (dw_val_equal_p): Fix pasto in
10461 dw_val_class_vms_delta comparison.
10462 * optabs.c (expand_binop_directly): Fix pasto in commutation
10464 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
10467 2020-04-17 Jakub Jelinek <jakub@redhat.com>
10469 PR rtl-optimization/94618
10470 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
10471 insn is the BB_END of its block, but also when it is only followed
10472 by DEBUG_INSNs in its block.
10474 PR tree-optimization/94621
10475 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
10476 Move id->adjust_array_error_bounds check first in the condition.
10478 2020-04-17 Martin Liska <mliska@suse.cz>
10479 Jonathan Yong <10walls@gmail.com>
10481 PR gcov-profile/94570
10482 * coverage.c (coverage_init): Use separator properly.
10484 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
10486 PR rtl-optimization/93974
10487 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
10488 (rs6000_cannot_substitute_mem_equiv_p): New function.
10490 2020-04-16 Martin Jambor <mjambor@suse.cz>
10493 * ipa-inline.h (ipa_saved_clone_sources): Declare.
10494 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
10495 (save_inline_function_body): Link the new body holder with the
10497 * cgraph.c: Include ipa-inline.h.
10498 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
10499 the statement in ipa_saved_clone_sources.
10500 * cgraphunit.c: Include ipa-inline.h.
10501 (expand_all_functions): Free ipa_saved_clone_sources.
10503 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
10506 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
10507 the VNx16BI lowpart of the recursively-generated constant.
10509 2020-04-16 Martin Liska <mliska@suse.cz>
10510 Jakub Jelinek <jakub@redhat.com>
10513 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
10514 DECL_IS_REPLACEABLE_OPERATOR during cloning.
10515 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
10516 (propagate_necessity): Check operator names.
10518 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
10520 PR rtl-optimization/94605
10521 * early-remat.c (early_remat::process_block): Handle insns that
10522 set multiple candidate registers.
10523 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
10525 PR gcov-profile/93401
10526 * common.opt (profile-prefix-path): New option.
10527 * coverae.c: Include diagnostics.h.
10528 (coverage_init): Strip profile prefix path.
10529 * doc/invoke.texi (-fprofile-prefix-path): Document.
10531 2020-04-16 Richard Biener <rguenther@suse.de>
10533 PR middle-end/94614
10534 * expr.c (emit_move_multi_word): Do not generate code when
10535 the destination part is undefined_operand_subword_p.
10536 * lower-subreg.c (resolve_clobber): Look through a paradoxica
10539 2020-04-16 Martin Jambor <mjambor@suse.cz>
10541 PR tree-optimization/94598
10542 * tree-sra.c (verify_sra_access_forest): Fix verification of total
10543 scalarization accesses under access to one-element arrays.
10545 2020-04-16 Jakub Jelinek <jakub@redhat.com>
10548 * function.c (assign_parm_find_data_types): Add workaround for
10549 BROKEN_VALUE_INITIALIZATION compilers.
10551 2020-04-16 Richard Biener <rguenther@suse.de>
10553 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
10556 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
10559 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
10560 Require OPTION_MASK_ISA_SSE2.
10562 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
10565 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
10566 Don't construct a dump_context temporary to call static method.
10568 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
10570 * config/aarch64/falkor-tag-collision-avoidance.c
10571 (valid_src_p): Check for aarch64_address_info type before
10572 accessing base field.
10574 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
10576 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
10577 (V_sz_elem2): Remove unused mode attribute.
10579 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
10581 * config/arm/arm.md (arm_movdi): Disallow for MVE.
10583 2020-04-15 Richard Biener <rguenther@suse.de>
10585 PR middle-end/94539
10586 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
10587 alias_sets_conflict_p for pointers.
10589 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
10592 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
10593 (extendhisi2_internal): Add %v1 before the load instructions.
10595 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
10598 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
10599 use PC-relative addressing for TLS references.
10601 2020-04-14 Martin Jambor <mjambor@suse.cz>
10604 * ipa-sra.c: Include internal-fn.h.
10605 (enum isra_scan_context): Update comment.
10606 (scan_function): Treat calls to internal_functions like loads or stores.
10608 2020-04-14 Yang Yang <yangyang305@huawei.com>
10610 PR tree-optimization/94574
10611 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
10612 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
10614 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
10617 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
10619 2020-04-13 Martin Sebor <msebor@redhat.com>
10621 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
10622 -Wformat-truncation. Move -Wzero-length-bounds last.
10623 (-Wrestrict): Document positive form of option enabled by -Wall.
10625 2020-04-13 Zachary Spytz <zspytz@gmail.com>
10627 * doc/extend.texi: Add realloc to list of built-in functions
10628 are recognized by the compiler.
10630 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
10633 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
10634 pointer in word_mode for eh_return epilogues.
10636 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
10638 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
10639 memory references in %B, %C and %D operand selectors when the inner
10640 operand is a post increment address.
10642 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
10644 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
10645 reference by 4 bytes, and %D memory reference by 6 bytes.
10647 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
10650 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
10651 condition for V4SI, V8HI and V16QI modes.
10653 2020-04-11 Jakub Jelinek <jakub@redhat.com>
10657 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
10660 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
10662 PR middle-end/89433
10663 PR middle-end/93465
10664 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
10665 "#pragma omp declare target" has also been applied.
10667 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
10669 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
10670 when to emit the epilogue_helper insn.
10671 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
10674 2020-04-09 Jakub Jelinek <jakub@redhat.com>
10677 * cselib.h (cselib_record_sp_cfa_base_equiv,
10678 cselib_sp_derived_value_p): Declare.
10679 * cselib.c (cselib_record_sp_cfa_base_equiv,
10680 cselib_sp_derived_value_p): New functions.
10681 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
10682 cselib_sp_derived_value_p values.
10683 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
10684 start of extended basic blocks other than the first one
10685 for !frame_pointer_needed functions.
10687 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
10689 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
10690 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
10691 (aarch64_sve2048_hw): Document.
10692 * config/aarch64/aarch64-protos.h
10693 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
10694 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
10695 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
10696 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
10698 (find_type_suffix_for_scalar_type): Use it instead of comparing
10699 TYPE_MAIN_VARIANTs.
10700 (function_resolver::infer_vector_or_tuple_type): Likewise.
10701 (function_resolver::require_vector_type): Likewise.
10702 (handle_arm_sve_vector_bits_attribute): New function.
10703 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
10704 (aarch64_attribute_table): Add arm_sve_vector_bits.
10705 (aarch64_return_in_memory_1):
10706 (pure_scalable_type_info::piece::get_rtx): New function.
10707 (pure_scalable_type_info::num_zr): Likewise.
10708 (pure_scalable_type_info::num_pr): Likewise.
10709 (pure_scalable_type_info::get_rtx): Likewise.
10710 (pure_scalable_type_info::analyze): Likewise.
10711 (pure_scalable_type_info::analyze_registers): Likewise.
10712 (pure_scalable_type_info::analyze_array): Likewise.
10713 (pure_scalable_type_info::analyze_record): Likewise.
10714 (pure_scalable_type_info::add_piece): Likewise.
10715 (aarch64_some_values_include_pst_objects_p): Likewise.
10716 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
10717 to analyze whether the type is returned in SVE registers.
10718 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
10719 is passed in SVE registers.
10720 (aarch64_pass_by_reference_1): New function, extracted from...
10721 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
10722 to analyze whether the type is a pure scalable type and, if so,
10723 whether it should be passed by reference.
10724 (aarch64_return_in_msb): Return false for pure scalable types.
10725 (aarch64_function_value_1): Fold back into...
10726 (aarch64_function_value): ...this function. Use
10727 pure_scalable_type_info to analyze whether the type is a pure
10728 scalable type and, if so, which registers it should use. Handle
10729 types that include pure scalable types but are not themselves
10730 pure scalable types.
10731 (aarch64_return_in_memory_1): New function, split out from...
10732 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
10733 to analyze whether the type is a pure scalable type and, if so,
10734 whether it should be returned by reference.
10735 (aarch64_layout_arg): Remove orig_mode argument. Use
10736 pure_scalable_type_info to analyze whether the type is a pure
10737 scalable type and, if so, which registers it should use. Handle
10738 types that include pure scalable types but are not themselves
10739 pure scalable types.
10740 (aarch64_function_arg): Update call accordingly.
10741 (aarch64_function_arg_advance): Likewise.
10742 (aarch64_pad_reg_upward): On big-endian targets, return false for
10743 pure scalable types that are smaller than 16 bytes.
10744 (aarch64_member_type_forces_blk): New function.
10745 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
10746 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
10747 correspond to built-in SVE types. Do not rely on a vector mode
10748 if the type includes an pure scalable type. When returning true,
10749 assert that the mode is not an SVE mode.
10750 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
10751 built-in types here. When returning true, assert that the type
10752 does not have an SVE mode.
10753 (aarch64_can_change_mode_class): Don't allow anything to change
10754 between a predicate mode and a non-predicate mode. Also don't
10755 allow changes between SVE vector modes and other modes that
10756 might be bigger than 128 bits.
10757 (aarch64_invalid_binary_op): Reject binary operations that mix
10758 SVE and GNU vector types.
10759 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
10761 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
10763 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
10764 "SVE sizeless type".
10765 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
10766 (sizeless_type_p): New functions.
10767 (register_builtin_types): Apply make_type_sizeless to the type.
10768 (register_tuple_type): Likewise.
10769 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
10771 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
10773 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
10776 2020-04-09 Martin Jambor <mjambor@suse.cz>
10777 Richard Biener <rguenther@suse.de>
10779 PR tree-optimization/94482
10780 * tree-sra.c (create_access_replacement): Dump new replacement with
10782 (sra_modify_expr): Fix handling of cases when the original EXPR writes
10783 to only part of the replacement.
10784 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
10785 the first operand of combinations into REAL/IMAGPART_EXPR and
10788 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
10790 * doc/sourcebuild.texi (check-function-bodies): Treat the third
10791 parameter as a list of option regexps and require each regexp
10794 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
10797 * config/aarch64/falkor-tag-collision-avoidance.c
10798 (valid_src_p): Fix missing rtx type check.
10800 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
10801 Richard Biener <rguenther@suse.de>
10803 PR tree-optimization/93674
10804 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
10805 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
10806 or non-mode precision type, add candidate in unsigned type with the
10809 2020-04-08 Clement Chigot <clement.chigot@atos.net>
10811 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
10812 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
10813 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
10815 2020-04-08 Jakub Jelinek <jakub@redhat.com>
10817 PR middle-end/94526
10818 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
10820 * reload1.c (eliminate_regs_1): Avoid creating
10821 (plus (reg) (const_int 0)) in DEBUG_INSNs.
10823 PR tree-optimization/94524
10824 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
10825 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
10826 op1 rather than op1 itself at the end. Punt for signed modulo by
10827 most negative constant.
10828 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
10829 modulo by most negative constant.
10831 2020-04-08 Richard Biener <rguenther@suse.de>
10833 PR rtl-optimization/93946
10834 * cse.c (cse_insn): Record the tabled expression in
10835 src_related. Verify a redundant store removal is valid.
10837 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
10840 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
10841 ENDBR at function entry if function will be called indirectly.
10843 2020-04-08 Jakub Jelinek <jakub@redhat.com>
10846 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
10849 2020-04-08 Martin Liska <mliska@suse.cz>
10852 * gimple.c (gimple_call_operator_delete_p): Rename to...
10853 (gimple_call_replaceable_operator_delete_p): ... this.
10854 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
10855 * gimple.h (gimple_call_operator_delete_p): Rename to ...
10856 (gimple_call_replaceable_operator_delete_p): ... this.
10857 * tree-core.h (tree_function_decl): Add replaceable_operator
10859 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
10860 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
10861 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
10862 (eliminate_unnecessary_stmts): Likewise.
10863 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
10864 Pack DECL_IS_REPLACEABLE_OPERATOR.
10865 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
10866 Unpack the field here.
10867 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
10868 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
10869 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
10870 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
10871 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
10872 replaceable operator flags.
10874 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
10875 Matthew Malcomson <matthew.malcomson@arm.com>
10877 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
10878 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
10879 (CX_TERNARY_QUALIFIERS): Likewise.
10880 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
10881 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
10882 (arm_init_acle_builtins): Initialize CDE builtins.
10883 (arm_expand_acle_builtin): Check CDE constant operands.
10884 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
10885 of CDE constant operand.
10886 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
10888 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
10889 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
10890 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
10891 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
10892 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
10893 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
10894 * config/arm/arm_cde_builtins.def: New file.
10895 * config/arm/iterators.md (V_reg): New attribute of SI.
10896 * config/arm/predicates.md (const_int_coproc_operand): New.
10897 (const_int_vcde1_operand, const_int_vcde2_operand): New.
10898 (const_int_vcde3_operand): New.
10899 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
10900 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
10901 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
10902 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
10904 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
10906 * config.gcc: Add arm_cde.h.
10907 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
10908 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
10909 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
10910 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
10911 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
10912 * config/arm/arm.h (TARGET_CDE): New macro.
10913 * config/arm/arm_cde.h: New file.
10914 * doc/invoke.texi: Document CDE options +cdecp[0-7].
10915 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
10917 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
10919 2020-04-08 Jakub Jelinek <jakub@redhat.com>
10921 PR rtl-optimization/94516
10922 * postreload.c: Include rtl-iter.h.
10923 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
10924 looking for all MEMs with RTX_AUTOINC operand.
10925 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
10927 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
10929 * omp-grid.c (grid_eliminate_combined_simd_part): Use
10930 OMP_CLAUSE_CODE to access the omp clause code.
10932 2020-04-07 Jeff Law <law@redhat.com>
10934 PR rtl-optimization/92264
10935 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
10936 the destination is the stack pointer.
10938 2020-04-07 Jakub Jelinek <jakub@redhat.com>
10940 PR rtl-optimization/94291
10941 PR rtl-optimization/84169
10942 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
10943 must be a REG or SUBREG of REG; if it is not one of these, don't
10946 2020-04-07 Richard Biener <rguenther@suse.de>
10948 PR middle-end/94479
10949 * gimplify.c (gimplify_addr_expr): Also consider generated
10952 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10954 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
10956 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10958 * config/arm/arm_mve.h: Cast some pointers to expected types.
10960 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10962 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
10963 same with '__arm_' prefix.
10965 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10967 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
10969 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10971 * config/arm/arm.c (arm_mve_immediate_check): Removed.
10972 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
10973 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
10974 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
10975 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
10976 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
10977 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
10979 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10981 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
10983 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10985 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
10986 * config/arm/mve/md: Fix v[id]wdup patterns.
10988 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10990 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
10991 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
10993 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10995 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
10996 and remove const_ptr enums.
10998 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11000 * config/arm/arm_mve.h (vsubq_n): Merge with...
11002 (vmulq_n): Merge with...
11004 (__ARM_mve_typeid): Simplify scalar and constant detection.
11006 2020-04-07 Jakub Jelinek <jakub@redhat.com>
11009 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
11010 for inter-lane permutation for 64-byte modes.
11013 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
11014 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
11015 Assume it is a REG after that instead of testing it and doing FAIL
11016 otherwise. Formatting fix.
11018 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
11020 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
11022 2020-04-07 Jakub Jelinek <jakub@redhat.com>
11025 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
11026 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
11028 2020-04-06 Jakub Jelinek <jakub@redhat.com>
11030 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
11031 + const0_rtx return the SP_DERIVED_VALUE_P.
11033 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
11035 PR rtl-optimization/92989
11036 * lra-lives.c (process_bb_lives): Do not treat eh_return data
11037 registers as being live at the beginning of the EH receiver.
11039 2020-04-05 Zachary Spytz <zspytz@gmail.com>
11041 * extend.texi: Add free to list of ISO C90 functions that
11042 are recognized by the compiler.
11044 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
11046 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
11047 for fast_interrupt.
11049 * config/microblaze/microblaze.md (trap): Update output pattern.
11051 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
11052 Jakub Jelinek <jakub@redhat.com>
11055 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
11056 arrays, pointer-to-members, function types and qualifiers when
11057 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
11058 to emit type again on definition.
11060 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
11063 * ipa-fnsummary.c (vrp_will_run_p): New function.
11064 (fre_will_run_p): New function.
11065 (evaluate_properties_for_edge): Use it.
11066 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
11067 !optimize_debug to optimize_debug.
11069 2020-04-04 Jakub Jelinek <jakub@redhat.com>
11071 PR rtl-optimization/94468
11072 * cselib.c (references_value_p): Formatting fix.
11073 (cselib_useless_value_p): New function.
11074 (discard_useless_locs, discard_useless_values,
11075 cselib_invalidate_regno_val, cselib_invalidate_mem,
11076 cselib_record_set): Use it instead of
11077 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
11080 * tree-iterator.h (expr_single): Declare.
11081 * tree-iterator.c (expr_single): New function.
11082 * tree.h (protected_set_expr_location_if_unset): Declare.
11083 * tree.c (protected_set_expr_location): Use expr_single.
11084 (protected_set_expr_location_if_unset): New function.
11086 2020-04-03 Jeff Law <law@redhat.com>
11088 PR rtl-optimization/92264
11089 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
11090 reloading of auto-increment addressing modes.
11092 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
11095 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
11098 2020-04-03 Jeff Law <law@redhat.com>
11100 PR rtl-optimization/92264
11101 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
11102 post-increment addressing of source operands as well as residuals
11103 when computing any adjustments to the input pointer.
11105 2020-04-03 Jakub Jelinek <jakub@redhat.com>
11108 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
11109 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
11110 second half of first lane from first lane of second operand and
11111 first half of second lane from second lane of first operand.
11113 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
11115 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
11117 2020-04-03 Tamar Christina <tamar.christina@arm.com>
11120 * common/config/aarch64/aarch64-common.c
11121 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
11123 2020-04-03 Richard Biener <rguenther@suse.de>
11125 PR middle-end/94465
11126 * tree.c (array_ref_low_bound): Deal with released SSA names
11129 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
11131 * config/gcn/gcn.c (print_operand): Handle unordered comparison
11133 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
11134 comparison operators.
11136 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
11138 PR tree-optimization/94443
11139 * tree-vect-loop.c (vectorizable_live_operation): Use
11140 gsi_insert_seq_before to replace gsi_insert_before.
11142 2020-04-03 Martin Liska <mliska@suse.cz>
11145 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
11146 Compare type attributes for gimple_call_fntypes.
11148 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
11150 * alias.c (get_alias_set): Fix comment typos.
11152 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
11155 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
11156 attribute checking used by TYPE.
11158 2020-04-02 Martin Jambor <mjambor@suse.cz>
11161 * ipa-sra.c (struct caller_issues): New fields candidate and
11162 call_from_outside_comdat.
11163 (check_for_caller_issues): Check for calls from outsied of
11164 candidate's same_comdat_group.
11165 (check_all_callers_for_issues): Set up issues.candidate, check result
11167 (mark_callers_calls_comdat_local): New function.
11168 (process_isra_node_results): Set calls_comdat_local of callers if
11171 2020-04-02 Richard Biener <rguenther@suse.de>
11174 * common.opt (ffinite-loops): Initialize to zero.
11175 * opts.c (default_options_table): Remove OPT_ffinite_loops
11177 * cfgloop.h (loop::finite_p): New member.
11178 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
11179 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
11181 * lto-streamer-in.c (input_cfg): Stream finite_p.
11182 * lto-streamer-out.c (output_cfg): Likewise.
11183 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
11184 from flag_finite_loops at CFG build time.
11185 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
11186 finite_p flag instead of flag_finite_loops.
11187 * doc/invoke.texi (ffinite-loops): Adjust documentation of
11190 2020-04-02 Richard Biener <rguenther@suse.de>
11193 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
11194 DW_TAG_imported_unit.
11196 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
11198 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
11199 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
11202 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
11204 PR tree-optimization/94401
11205 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
11206 access type when loading halves of vector to avoid peeling for gaps.
11208 2020-04-02 Jakub Jelinek <jakub@redhat.com>
11210 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
11211 between a string literal and MIPS_SYSVERSION_SPEC macro.
11213 2020-04-02 Martin Jambor <mjambor@suse.cz>
11215 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
11217 2020-04-02 Jakub Jelinek <jakub@redhat.com>
11219 PR rtl-optimization/92264
11220 * params.opt (-param=max-find-base-term-values=): Decrease default
11223 PR rtl-optimization/92264
11224 * rtl.h (struct rtx_def): Mention that call bit is used as
11225 SP_DERIVED_VALUE_P in cselib.c.
11226 * cselib.c (SP_DERIVED_VALUE_P): Define.
11227 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
11228 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
11229 val_rtx and sp based expression where offsets cancel each other.
11230 (preserve_constants_and_equivs): Formatting fix.
11231 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
11232 locs list for cfa_base_preserved_val if needed. Formatting fix.
11233 (autoinc_split): If the to be returned value is a REG, MEM or
11234 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
11235 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
11236 (rtx_equal_for_cselib_1): Call autoinc_split even if both
11237 expressions are PLUS in Pmode with CONST_INT second operands.
11238 Handle SP_DERIVED_VALUE_P cases.
11239 (cselib_hash_plus_const_int): New function.
11240 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
11241 second operand, as well as for PRE_DEC etc. that ought to be
11242 hashed the same way.
11243 (cselib_subst_to_values): Substitute PLUS with Pmode and
11244 CONST_INT operand if the first operand is a VALUE which has
11245 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
11246 SP_DERIVED_VALUE_P + adjusted offset.
11247 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
11248 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
11249 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
11250 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
11251 on the sp value before calling cselib_add_permanent_equiv on the
11253 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
11254 in the insn without REG_INC note.
11255 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
11256 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
11259 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
11260 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
11262 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11265 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
11266 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
11267 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
11268 intrinsic defintion by adding a new builtin call to writeback into base
11270 (__arm_vldrdq_gather_base_wb_u64): Likewise.
11271 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
11272 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
11273 (__arm_vldrwq_gather_base_wb_s32): Likewise.
11274 (__arm_vldrwq_gather_base_wb_u32): Likewise.
11275 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
11276 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
11277 (__arm_vldrwq_gather_base_wb_f32): Likewise.
11278 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
11279 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
11280 builtin's qualifier.
11281 (vldrdq_gather_base_wb_z_u): Likewise.
11282 (vldrwq_gather_base_wb_u): Likewise.
11283 (vldrdq_gather_base_wb_u): Likewise.
11284 (vldrwq_gather_base_wb_z_s): Likewise.
11285 (vldrwq_gather_base_wb_z_f): Likewise.
11286 (vldrdq_gather_base_wb_z_s): Likewise.
11287 (vldrwq_gather_base_wb_s): Likewise.
11288 (vldrwq_gather_base_wb_f): Likewise.
11289 (vldrdq_gather_base_wb_s): Likewise.
11290 (vldrwq_gather_base_nowb_z_u): Define builtin.
11291 (vldrdq_gather_base_nowb_z_u): Likewise.
11292 (vldrwq_gather_base_nowb_u): Likewise.
11293 (vldrdq_gather_base_nowb_u): Likewise.
11294 (vldrwq_gather_base_nowb_z_s): Likewise.
11295 (vldrwq_gather_base_nowb_z_f): Likewise.
11296 (vldrdq_gather_base_nowb_z_s): Likewise.
11297 (vldrwq_gather_base_nowb_s): Likewise.
11298 (vldrwq_gather_base_nowb_f): Likewise.
11299 (vldrdq_gather_base_nowb_s): Likewise.
11300 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
11302 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
11303 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
11304 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
11305 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
11306 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
11307 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
11308 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
11309 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
11310 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
11311 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
11312 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
11314 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
11316 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
11317 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
11318 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
11319 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
11320 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
11321 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
11322 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
11323 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
11324 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
11326 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
11327 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
11328 Remove constraints from expander.
11329 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
11330 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
11331 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
11332 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
11333 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
11334 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
11336 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
11338 PR rtl-optimization/94123
11339 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
11340 flag_split_wide_types_early.
11342 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
11344 * doc/extend.texi (Common Function Attributes): Fix typo.
11346 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
11349 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
11352 2020-04-01 Zackery Spytz <zspytz@gmail.com>
11354 * doc/extend.texi: Fix a typo in the documentation of the
11355 copy function attribute.
11357 2020-04-01 Jakub Jelinek <jakub@redhat.com>
11359 PR middle-end/94423
11360 * tree-object-size.c (pass_object_sizes::execute): Don't call
11361 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
11362 call replace_call_with_value.
11364 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
11366 PR tree-optimization/94043
11367 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
11368 phi for vec_lhs and use it for lane extraction.
11370 2020-03-31 Felix Yang <felix.yang@huawei.com>
11372 PR tree-optimization/94398
11373 * tree-vect-stmts.c (vectorizable_store): Instead of calling
11374 vect_supportable_dr_alignment, set alignment_support_scheme to
11375 dr_unaligned_supported for gather-scatter accesses.
11376 (vectorizable_load): Likewise.
11378 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
11380 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
11381 New mode iterators.
11382 (vnsi, VnSI, vndi, VnDI): New mode attributes.
11383 (mov<mode>): Use <VnDI> in place of V64DI.
11384 (mov<mode>_exec): Likewise.
11385 (mov<mode>_sgprbase): Likewise.
11386 (reload_out<mode>): Likewise.
11387 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
11388 (gather_load<mode>v64si): Rename to ...
11389 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
11390 and <VnDI> in place of V64DI.
11391 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
11392 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
11393 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
11394 (scatter_store<mode>v64si): Rename to ...
11395 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
11396 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
11397 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
11398 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
11399 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
11400 (ds_bpermute<mode>): Use <VnSI>.
11401 (addv64si3_vcc<exec_vcc>): Rename to ...
11402 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
11403 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
11404 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
11405 (addcv64si3<exec_vcc>): Rename to ...
11406 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
11407 (subv64si3_vcc<exec_vcc>): Rename to ...
11408 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
11409 (subcv64si3<exec_vcc>): Rename to ...
11410 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
11411 (addv64di3): Rename to ...
11412 (add<mode>3): ... this, and use V_DI.
11413 (addv64di3_exec): Rename to ...
11414 (add<mode>3_exec): ... this, and use V_DI.
11415 (subv64di3): Rename to ...
11416 (sub<mode>3): ... this, and use V_DI.
11417 (subv64di3_exec): Rename to ...
11418 (sub<mode>3_exec): ... this, and use V_DI.
11419 (addv64di3_zext): Rename to ...
11420 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
11421 (addv64di3_zext_exec): Rename to ...
11422 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
11423 (addv64di3_zext_dup): Rename to ...
11424 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
11425 (addv64di3_zext_dup_exec): Rename to ...
11426 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
11427 (addv64di3_zext_dup2): Rename to ...
11428 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
11429 (addv64di3_zext_dup2_exec): Rename to ...
11430 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
11431 (addv64di3_sext_dup2): Rename to ...
11432 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
11433 (addv64di3_sext_dup2_exec): Rename to ...
11434 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
11435 (<su>mulv64si3_highpart<exec>): Rename to ...
11436 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
11437 (mulv64di3): Rename to ...
11438 (mul<mode>3): ... this, and use V_DI and <VnSI>.
11439 (mulv64di3_exec): Rename to ...
11440 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
11441 (mulv64di3_zext): Rename to ...
11442 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
11443 (mulv64di3_zext_exec): Rename to ...
11444 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
11445 (mulv64di3_zext_dup2): Rename to ...
11446 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
11447 (mulv64di3_zext_dup2_exec): Rename to ...
11448 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
11449 (<expander>v64di3): Rename to ...
11450 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
11451 (<expander>v64di3_exec): Rename to ...
11452 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
11453 (<expander>v64si3<exec>): Rename to ...
11454 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
11455 (v<expander>v64si3<exec>): Rename to ...
11456 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
11457 (<expander>v64si3<exec>): Rename to ...
11458 (<expander><vnsi>3<exec>): ... this, and use V_SI.
11459 (subv64df3<exec>): Rename to ...
11460 (sub<mode>3<exec>): ... this, and use V_DF.
11461 (truncv64di<mode>2): Rename to ...
11462 (trunc<vndi><mode>2): ... this, and use <VnDI>.
11463 (truncv64di<mode>2_exec): Rename to ...
11464 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
11465 (<convop><mode>v64di2): Rename to ...
11466 (<convop><mode><vndi>2): ... this, and use <VnDI>.
11467 (<convop><mode>v64di2_exec): Rename to ...
11468 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
11469 (vec_cmp<u>v64qidi): Rename to ...
11470 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
11471 (vec_cmp<u>v64qidi_exec): Rename to ...
11472 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
11473 (vcond_mask_<mode>di): Use <VnDI>.
11474 (maskload<mode>di): Likewise.
11475 (maskstore<mode>di): Likewise.
11476 (mask_gather_load<mode>v64si): Rename to ...
11477 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
11478 (mask_scatter_store<mode>v64si): Rename to ...
11479 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
11480 (*<reduc_op>_dpp_shr_v64di): Rename to ...
11481 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
11482 (*plus_carry_in_dpp_shr_v64si): Rename to ...
11483 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
11484 (*plus_carry_dpp_shr_v64di): Rename to ...
11485 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
11486 (vec_seriesv64si): Rename to ...
11487 (vec_series<mode>): ... this, and use V_SI.
11488 (vec_seriesv64di): Rename to ...
11489 (vec_series<mode>): ... this, and use V_DI.
11491 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
11493 * config/arc/arc.c (arc_print_operand): Use
11494 HOST_WIDE_INT_PRINT_DEC macro.
11496 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
11498 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
11500 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11502 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
11504 (__arm_vbicq): Likewise.
11506 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
11508 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
11510 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11512 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
11513 common section of both MVE Integer and MVE Floating Point.
11514 (vaddvq): Likewise.
11515 (vaddlvq_p): Likewise.
11516 (vaddvaq): Likewise.
11517 (vaddvq_p): Likewise.
11518 (vcmpcsq): Likewise.
11519 (vmlsdavxq): Likewise.
11520 (vmlsdavq): Likewise.
11521 (vmladavxq): Likewise.
11522 (vmladavq): Likewise.
11523 (vminvq): Likewise.
11524 (vminavq): Likewise.
11525 (vmaxvq): Likewise.
11526 (vmaxavq): Likewise.
11527 (vmlaldavq): Likewise.
11528 (vcmphiq): Likewise.
11529 (vaddlvaq): Likewise.
11530 (vrmlaldavhq): Likewise.
11531 (vrmlaldavhxq): Likewise.
11532 (vrmlsldavhq): Likewise.
11533 (vrmlsldavhxq): Likewise.
11534 (vmlsldavxq): Likewise.
11535 (vmlsldavq): Likewise.
11536 (vabavq): Likewise.
11537 (vrmlaldavhaq): Likewise.
11538 (vcmpgeq_m_n): Likewise.
11539 (vmlsdavxq_p): Likewise.
11540 (vmlsdavq_p): Likewise.
11541 (vmlsdavaxq): Likewise.
11542 (vmlsdavaq): Likewise.
11543 (vaddvaq_p): Likewise.
11544 (vcmpcsq_m_n): Likewise.
11545 (vcmpcsq_m): Likewise.
11546 (vmladavxq_p): Likewise.
11547 (vmladavq_p): Likewise.
11548 (vmladavaxq): Likewise.
11549 (vmladavaq): Likewise.
11550 (vminvq_p): Likewise.
11551 (vminavq_p): Likewise.
11552 (vmaxvq_p): Likewise.
11553 (vmaxavq_p): Likewise.
11554 (vcmphiq_m): Likewise.
11555 (vaddlvaq_p): Likewise.
11556 (vmlaldavaq): Likewise.
11557 (vmlaldavaxq): Likewise.
11558 (vmlaldavq_p): Likewise.
11559 (vmlaldavxq_p): Likewise.
11560 (vmlsldavaq): Likewise.
11561 (vmlsldavaxq): Likewise.
11562 (vmlsldavq_p): Likewise.
11563 (vmlsldavxq_p): Likewise.
11564 (vrmlaldavhaxq): Likewise.
11565 (vrmlaldavhq_p): Likewise.
11566 (vrmlaldavhxq_p): Likewise.
11567 (vrmlsldavhaq): Likewise.
11568 (vrmlsldavhaxq): Likewise.
11569 (vrmlsldavhq_p): Likewise.
11570 (vrmlsldavhxq_p): Likewise.
11571 (vabavq_p): Likewise.
11572 (vmladavaq_p): Likewise.
11573 (vstrbq_scatter_offset): Likewise.
11574 (vstrbq_p): Likewise.
11575 (vstrbq_scatter_offset_p): Likewise.
11576 (vstrdq_scatter_base_p): Likewise.
11577 (vstrdq_scatter_base): Likewise.
11578 (vstrdq_scatter_offset_p): Likewise.
11579 (vstrdq_scatter_offset): Likewise.
11580 (vstrdq_scatter_shifted_offset_p): Likewise.
11581 (vstrdq_scatter_shifted_offset): Likewise.
11582 (vmaxq_x): Likewise.
11583 (vminq_x): Likewise.
11584 (vmovlbq_x): Likewise.
11585 (vmovltq_x): Likewise.
11586 (vmulhq_x): Likewise.
11587 (vmullbq_int_x): Likewise.
11588 (vmullbq_poly_x): Likewise.
11589 (vmulltq_int_x): Likewise.
11590 (vmulltq_poly_x): Likewise.
11591 (vstrbq): Likewise.
11593 2020-03-31 Jakub Jelinek <jakub@redhat.com>
11596 * config/aarch64/constraints.md (Uph): New constraint.
11597 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
11598 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
11601 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
11602 Jakub Jelinek <jakub@redhat.com>
11604 PR middle-end/94412
11605 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
11606 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
11608 2020-03-31 Jakub Jelinek <jakub@redhat.com>
11610 PR tree-optimization/94403
11611 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
11612 ENUMERAL_TYPE lhs_type.
11614 PR rtl-optimization/94344
11615 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
11616 conversions, either on both operands of |^+ or just one. Handle
11617 also extra same precision conversion on RSHIFT_EXPR first operand
11618 provided RSHIFT_EXPR is performed in unsigned type.
11620 2020-03-30 David Malcolm <dmalcolm@redhat.com>
11622 * lra.c (finish_insn_code_data_once): Set the array elements
11623 to NULL after freeing them.
11625 2020-03-30 Andreas Schwab <schwab@suse.de>
11627 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
11630 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
11632 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
11633 to skip defining builtins based on builtin_mask.
11635 2020-03-30 Jakub Jelinek <jakub@redhat.com>
11638 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
11639 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
11640 operand is a register. Don't enable masked variants for V*[QH]Imode.
11643 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
11644 <store_mask_constraint> instead of m in output operand constraint.
11645 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
11648 2020-03-30 Alan Modra <amodra@gmail.com>
11650 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
11651 (rs6000_indirect_call_template_1): Adjust to suit.
11652 * config/rs6000/rs6000.md (call_local): Merge call_local32,
11653 call_local64, and call_local_aix.
11654 (call_value_local): Simlarly.
11655 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
11656 and disable pattern when CALL_LONG.
11657 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
11658 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
11659 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
11661 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
11664 * doc/invoke.texi: Update -falign-functions, -falign-loops and
11665 -falign-jumps documentation.
11667 2020-03-29 Martin Liska <mliska@suse.cz>
11670 * cgraphunit.c (process_function_and_variable_attributes): Remove
11671 double 'attribute' words.
11673 2020-03-29 John David Anglin <dave.anglin@bell.net>
11675 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
11678 2020-03-28 Jakub Jelinek <jakub@redhat.com>
11681 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
11682 to true after setting size to integer_one_node.
11684 PR tree-optimization/94329
11685 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
11686 on the last stmt in a bb, make sure gsi_prev isn't done immediately
11689 2020-03-27 Alan Modra <amodra@gmail.com>
11692 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
11693 for PLT16_LO and PLT_PCREL.
11694 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
11695 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
11696 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
11698 2020-03-27 Martin Sebor <msebor@redhat.com>
11701 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
11703 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
11705 * config/gcn/gcn-valu.md:
11706 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
11707 (VEC_1REG_MODE): Delete.
11708 (VEC_1REG_ALT): Delete.
11709 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
11710 (VEC_1REG_INT_MODE): Delete.
11711 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
11712 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
11713 (VEC_2REG_MODE): Rename to V_2REG throughout.
11714 (VEC_REG_MODE): Rename to V_noHI throughout.
11715 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
11716 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
11717 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
11718 (VEC_INT_MODE): Delete.
11719 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
11720 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
11721 (FP_MODE): Delete and replace with FP throughout.
11722 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
11723 (VCMP_MODE): Rename to V_noQI throughout and move to top.
11724 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
11725 * config/gcn/gcn.md (FP): New mode iterator.
11726 (FP_1REG): New mode iterator.
11728 2020-03-27 David Malcolm <dmalcolm@redhat.com>
11730 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
11731 now emits two .dot files.
11732 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
11733 (graphviz_out::end_tr): Only close a TR, not a TD.
11734 (graphviz_out::begin_td): New.
11735 (graphviz_out::end_td): New.
11736 (graphviz_out::begin_trtd): New, replacing the old implementation
11737 of graphviz_out::begin_tr.
11738 (graphviz_out::end_tdtr): New, replacing the old implementation
11739 of graphviz_out::end_tr.
11740 * graphviz.h (graphviz_out::begin_td): New decl.
11741 (graphviz_out::end_td): New decl.
11742 (graphviz_out::begin_trtd): New decl.
11743 (graphviz_out::end_tdtr): New decl.
11745 2020-03-27 Richard Biener <rguenther@suse.de>
11748 * dwarf2out.c (should_emit_struct_debug): Return false for
11751 2020-03-27 Richard Biener <rguenther@suse.de>
11753 PR tree-optimization/94352
11754 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
11756 (ssa_propagation_engine::ssa_propagate): ... here after
11757 initializing curr_order.
11759 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
11761 PR tree-optimization/90332
11762 * tree-vect-stmts.c (vector_vector_composition_type): New function.
11763 (get_group_load_store_type): Adjust to call
11764 vector_vector_composition_type, extend it to construct with scalar
11766 (vectorizable_load): Likewise.
11768 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
11770 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
11771 (create_ddg_dep_no_link): Likewise.
11772 (add_cross_iteration_register_deps): Move debug instruction check.
11773 Other minor refactoring.
11774 (add_intra_loop_mem_dep): Do not check for debug instructions.
11775 (add_inter_loop_mem_dep): Likewise.
11776 (build_intra_loop_deps): Likewise.
11777 (create_ddg): Do not include debug insns into the graph.
11778 * ddg.h (struct ddg): Remove num_debug field.
11779 * modulo-sched.c (doloop_register_get): Adjust condition.
11780 (res_MII): Remove DDG num_debug field usage.
11781 (sms_schedule_by_order): Use assertion against debug insns.
11782 (ps_has_conflicts): Drop debug insn check.
11784 2020-03-26 Jakub Jelinek <jakub@redhat.com>
11787 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
11788 that contains exactly one non-DEBUG_BEGIN_STMT statement.
11791 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
11792 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
11793 a single non-debug stmt followed by one or more debug stmts.
11794 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
11795 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
11796 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
11797 gimple_seq_last to check if outer_stmt gbind could be reused and
11798 if yes and it is surrounded by any debug stmts, move them into the
11801 PR rtl-optimization/92264
11802 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
11803 for sp based values in !frame_pointer_needed
11804 && !ACCUMULATE_OUTGOING_ARGS functions.
11806 2020-03-26 Felix Yang <felix.yang@huawei.com>
11808 PR tree-optimization/94269
11809 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
11811 operation to single basic block.
11813 2020-03-25 Jeff Law <law@redhat.com>
11815 PR rtl-optimization/90275
11816 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
11819 2020-03-25 Jakub Jelinek <jakub@redhat.com>
11822 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
11823 mode rather than VOIDmode.
11825 2020-03-25 Martin Sebor <msebor@redhat.com>
11827 PR middle-end/94004
11828 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
11829 even for alloca calls resulting from system macro expansion.
11830 Include inlining context in all warnings.
11832 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
11835 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
11836 FPRs to change between SDmode and DDmode.
11838 2020-03-25 Martin Sebor <msebor@redhat.com>
11840 PR tree-optimization/94131
11841 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
11843 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
11844 types have constant sizes.
11846 2020-03-25 Martin Liska <mliska@suse.cz>
11849 * configure.ac: Report error only when --with-zstd
11851 * configure: Regenerate.
11853 2020-03-25 Jakub Jelinek <jakub@redhat.com>
11856 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
11857 INSN_CODE (insn) to -1 when changing the pattern.
11859 2020-03-25 Martin Liska <mliska@suse.cz>
11863 * config/i386/i386-features.c (make_resolver_func): Drop
11864 public flag for resolver.
11865 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
11866 group for resolver and drop public flag if possible.
11867 * multiple_target.c (create_dispatcher_calls): Drop unique_name
11868 and resolution as we want to enable LTO privatization of the default
11871 2020-03-25 Martin Liska <mliska@suse.cz>
11874 * configure.ac: Respect --without-zstd and report
11875 error when we can't find header file with --with-zstd.
11876 * configure: Regenerate.
11878 2020-03-25 Jakub Jelinek <jakub@redhat.com>
11880 PR middle-end/94303
11881 * varasm.c (output_constructor_array_range): If local->index
11882 RANGE_EXPR doesn't start at the current location in the constructor,
11883 skip needed number of bytes using assemble_zeros or assert we don't
11887 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
11888 counter instead of DECL_UID.
11890 PR tree-optimization/94300
11891 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
11892 is positive, make sure that off + size isn't larger than needed_len.
11894 2020-03-25 Richard Biener <rguenther@suse.de>
11895 Jakub Jelinek <jakub@redhat.com>
11898 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
11900 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
11902 * doc/sourcebuild.texi (ARM-specific attributes): Add
11904 (Features for dg-add-options): Add arm_fp_dp.
11906 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
11909 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
11911 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
11914 * omp-offload.c (omp_finish_file): Fix target-link handling if
11915 targetm_common.have_named_sections is false.
11917 2020-03-24 Jakub Jelinek <jakub@redhat.com>
11920 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
11921 instead of GEN_INT.
11924 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
11925 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
11926 If not after and at *incr_pos is a debug stmt, set stmt location to
11927 location of next non-debug stmt after it if any.
11930 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
11931 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
11932 worklist or set GF_PLF_2 just because it is used in a debug stmt in
11933 another bb. Formatting improvements.
11936 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
11937 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
11938 regardless of whether TREE_NO_WARNING is set on it or whether
11939 warn_unused_function is true or not.
11941 2020-03-23 Jeff Law <law@redhat.com>
11943 PR rtl-optimization/90275
11946 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
11947 (simplify_logical_relational_operation): Use it.
11949 2020-03-23 Jakub Jelinek <jakub@redhat.com>
11952 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
11953 ultimate rhs and if returned something different, reconstructing
11954 the COMPOUND_EXPRs.
11956 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
11958 * opts.c (print_filtered_help): Improve the help text for alias options.
11960 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11961 Andre Vieira <andre.simoesdiasvieira@arm.com>
11962 Mihail Ionescu <mihail.ionescu@arm.com>
11964 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
11965 (vshlcq_m_u8): Likewise.
11966 (vshlcq_m_s16): Likewise.
11967 (vshlcq_m_u16): Likewise.
11968 (vshlcq_m_s32): Likewise.
11969 (vshlcq_m_u32): Likewise.
11970 (__arm_vshlcq_m_s8): Define intrinsic.
11971 (__arm_vshlcq_m_u8): Likewise.
11972 (__arm_vshlcq_m_s16): Likewise.
11973 (__arm_vshlcq_m_u16): Likewise.
11974 (__arm_vshlcq_m_s32): Likewise.
11975 (__arm_vshlcq_m_u32): Likewise.
11976 (vshlcq_m): Define polymorphic variant.
11977 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
11978 Use builtin qualifier.
11979 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
11980 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
11981 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
11982 (mve_vshlcq_m_<supf><mode>): Likewise.
11984 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11986 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
11987 (UQSHL_QUALIFIERS): Likewise.
11988 (ASRL_QUALIFIERS): Likewise.
11989 (SQSHL_QUALIFIERS): Likewise.
11990 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
11992 (sqrshr): Define macro.
11993 (sqrshrl): Likewise.
11994 (sqrshrl_sat48): Likewise.
11996 (sqshll): Likewise.
11998 (srshrl): Likewise.
11999 (uqrshl): Likewise.
12000 (uqrshll): Likewise.
12001 (uqrshll_sat48): Likewise.
12003 (uqshll): Likewise.
12005 (urshrl): Likewise.
12008 (__arm_lsll): Define intrinsic.
12009 (__arm_asrl): Likewise.
12010 (__arm_uqrshll): Likewise.
12011 (__arm_uqrshll_sat48): Likewise.
12012 (__arm_sqrshrl): Likewise.
12013 (__arm_sqrshrl_sat48): Likewise.
12014 (__arm_uqshll): Likewise.
12015 (__arm_urshrl): Likewise.
12016 (__arm_srshrl): Likewise.
12017 (__arm_sqshll): Likewise.
12018 (__arm_uqrshl): Likewise.
12019 (__arm_sqrshr): Likewise.
12020 (__arm_uqshl): Likewise.
12021 (__arm_urshr): Likewise.
12022 (__arm_sqshl): Likewise.
12023 (__arm_srshr): Likewise.
12024 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
12026 (UQSHL_QUALIFIERS): Likewise.
12027 (ASRL_QUALIFIERS): Likewise.
12028 (SQSHL_QUALIFIERS): Likewise.
12029 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
12030 (mve_sqrshrl_sat<supf>_di): Likewise.
12031 (mve_uqrshl_si): Likewise.
12032 (mve_sqrshr_si): Likewise.
12033 (mve_uqshll_di): Likewise.
12034 (mve_urshrl_di): Likewise.
12035 (mve_uqshl_si): Likewise.
12036 (mve_urshr_si): Likewise.
12037 (mve_sqshl_si): Likewise.
12038 (mve_srshr_si): Likewise.
12039 (mve_srshrl_di): Likewise.
12040 (mve_sqshll_di): Likewise.
12042 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12043 Andre Vieira <andre.simoesdiasvieira@arm.com>
12044 Mihail Ionescu <mihail.ionescu@arm.com>
12046 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
12047 (vsetq_lane_f32): Likewise.
12048 (vsetq_lane_s16): Likewise.
12049 (vsetq_lane_s32): Likewise.
12050 (vsetq_lane_s8): Likewise.
12051 (vsetq_lane_s64): Likewise.
12052 (vsetq_lane_u8): Likewise.
12053 (vsetq_lane_u16): Likewise.
12054 (vsetq_lane_u32): Likewise.
12055 (vsetq_lane_u64): Likewise.
12056 (vgetq_lane_f16): Likewise.
12057 (vgetq_lane_f32): Likewise.
12058 (vgetq_lane_s16): Likewise.
12059 (vgetq_lane_s32): Likewise.
12060 (vgetq_lane_s8): Likewise.
12061 (vgetq_lane_s64): Likewise.
12062 (vgetq_lane_u8): Likewise.
12063 (vgetq_lane_u16): Likewise.
12064 (vgetq_lane_u32): Likewise.
12065 (vgetq_lane_u64): Likewise.
12066 (__ARM_NUM_LANES): Likewise.
12067 (__ARM_LANEQ): Likewise.
12068 (__ARM_CHECK_LANEQ): Likewise.
12069 (__arm_vsetq_lane_s16): Define intrinsic.
12070 (__arm_vsetq_lane_s32): Likewise.
12071 (__arm_vsetq_lane_s8): Likewise.
12072 (__arm_vsetq_lane_s64): Likewise.
12073 (__arm_vsetq_lane_u8): Likewise.
12074 (__arm_vsetq_lane_u16): Likewise.
12075 (__arm_vsetq_lane_u32): Likewise.
12076 (__arm_vsetq_lane_u64): Likewise.
12077 (__arm_vgetq_lane_s16): Likewise.
12078 (__arm_vgetq_lane_s32): Likewise.
12079 (__arm_vgetq_lane_s8): Likewise.
12080 (__arm_vgetq_lane_s64): Likewise.
12081 (__arm_vgetq_lane_u8): Likewise.
12082 (__arm_vgetq_lane_u16): Likewise.
12083 (__arm_vgetq_lane_u32): Likewise.
12084 (__arm_vgetq_lane_u64): Likewise.
12085 (__arm_vsetq_lane_f16): Likewise.
12086 (__arm_vsetq_lane_f32): Likewise.
12087 (__arm_vgetq_lane_f16): Likewise.
12088 (__arm_vgetq_lane_f32): Likewise.
12089 (vgetq_lane): Define polymorphic variant.
12090 (vsetq_lane): Likewise.
12091 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
12093 (mve_vec_extractv2didi): Likewise.
12094 (mve_vec_extract_sext_internal<mode>): Likewise.
12095 (mve_vec_extract_zext_internal<mode>): Likewise.
12096 (mve_vec_set<mode>_internal): Likewise.
12097 (mve_vec_setv2di_internal): Likewise.
12098 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
12100 (vec_extract<mode><V_elem_l>): Rename to
12101 "neon_vec_extract<mode><V_elem_l>".
12102 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
12103 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
12104 pattern common for MVE and NEON.
12105 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
12108 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
12110 * config/arm/mve.md (earlyclobber_32): New mode attribute.
12111 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
12112 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
12114 2020-03-23 Richard Biener <rguenther@suse.de>
12116 PR tree-optimization/94261
12117 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
12118 IL operand swapping code.
12119 (vect_slp_rearrange_stmts): Do not arrange isomorphic
12120 nodes that would need operation code adjustments.
12122 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
12124 * doc/install.texi (amdgcn-*-amdhsa): Renamed
12125 from amdgcn-unknown-amdhsa; change
12126 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
12128 2020-03-23 Richard Biener <rguenther@suse.de>
12131 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
12132 directly rather than also folding it via build_fold_addr_expr.
12134 2020-03-23 Richard Biener <rguenther@suse.de>
12136 PR tree-optimization/94266
12137 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
12138 addresses of TARGET_MEM_REFs.
12140 2020-03-23 Martin Liska <mliska@suse.cz>
12143 * symtab.c (symtab_node::clone_references): Save speculative_id
12144 as ref may be overwritten by create_reference.
12145 (symtab_node::clone_referring): Likewise.
12146 (symtab_node::clone_reference): Likewise.
12148 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
12150 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
12151 references to Darwin.
12152 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
12153 unconditionally and comment on why.
12155 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
12157 * config/darwin.c (darwin_mergeable_constant_section): Collect
12158 section anchor checks into the caller.
12159 (machopic_select_section): Collect section anchor checks into
12160 the determination of 'effective zero-size' objects. When the
12161 size is unknown, assume it is non-zero, and thus return the
12162 'generic' section for the DECL.
12164 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
12167 * config/darwin.opt: Amend options descriptions.
12169 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
12171 PR rtl-optimization/94052
12172 * lra-constraints.c (simplify_operand_subreg): Reload the inner
12173 register of a paradoxical subreg if simplify_subreg_regno fails
12174 to give a valid hard register for the outer mode.
12176 2020-03-20 Martin Jambor <mjambor@suse.cz>
12178 PR tree-optimization/93435
12179 * params.opt (sra-max-propagations): New parameter.
12180 * tree-sra.c (propagation_budget): New variable.
12181 (budget_for_propagation_access): New function.
12182 (propagate_subaccesses_from_rhs): Use it.
12183 (propagate_subaccesses_from_lhs): Likewise.
12184 (propagate_all_subaccesses): Set up and destroy propagation_budget.
12186 2020-03-20 Carl Love <cel@us.ibm.com>
12189 * config/rs6000/rs6000.c (rs6000_option_override_internal):
12190 Add check for TARGET_FPRND for Power 7 or newer.
12192 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
12195 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
12196 (cgraph_edge::redirect_callee): Move here; likewise.
12197 (cgraph_node::remove_callees): Update calls_comdat_local flag.
12198 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
12200 (cgraph_node::check_calls_comdat_local_p): New member function.
12201 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
12202 (cgraph_edge::redirect_callee): Move offline.
12203 * ipa-fnsummary.c (compute_fn_summary): Do not compute
12204 calls_comdat_local flag here.
12205 * ipa-inline-transform.c (inline_call): Fix updating of
12206 calls_comdat_local flag.
12207 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
12208 * symtab.c (symtab_node::add_to_same_comdat_group): Update
12209 calls_comdat_local flag.
12211 2020-03-20 Richard Biener <rguenther@suse.de>
12213 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
12214 from the possibly modified root.
12216 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12217 Andre Vieira <andre.simoesdiasvieira@arm.com>
12218 Mihail Ionescu <mihail.ionescu@arm.com>
12220 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
12221 (vst1q_p_s8): Likewise.
12222 (vst2q_s8): Likewise.
12223 (vst2q_u8): Likewise.
12224 (vld1q_z_u8): Likewise.
12225 (vld1q_z_s8): Likewise.
12226 (vld2q_s8): Likewise.
12227 (vld2q_u8): Likewise.
12228 (vld4q_s8): Likewise.
12229 (vld4q_u8): Likewise.
12230 (vst1q_p_u16): Likewise.
12231 (vst1q_p_s16): Likewise.
12232 (vst2q_s16): Likewise.
12233 (vst2q_u16): Likewise.
12234 (vld1q_z_u16): Likewise.
12235 (vld1q_z_s16): Likewise.
12236 (vld2q_s16): Likewise.
12237 (vld2q_u16): Likewise.
12238 (vld4q_s16): Likewise.
12239 (vld4q_u16): Likewise.
12240 (vst1q_p_u32): Likewise.
12241 (vst1q_p_s32): Likewise.
12242 (vst2q_s32): Likewise.
12243 (vst2q_u32): Likewise.
12244 (vld1q_z_u32): Likewise.
12245 (vld1q_z_s32): Likewise.
12246 (vld2q_s32): Likewise.
12247 (vld2q_u32): Likewise.
12248 (vld4q_s32): Likewise.
12249 (vld4q_u32): Likewise.
12250 (vld4q_f16): Likewise.
12251 (vld2q_f16): Likewise.
12252 (vld1q_z_f16): Likewise.
12253 (vst2q_f16): Likewise.
12254 (vst1q_p_f16): Likewise.
12255 (vld4q_f32): Likewise.
12256 (vld2q_f32): Likewise.
12257 (vld1q_z_f32): Likewise.
12258 (vst2q_f32): Likewise.
12259 (vst1q_p_f32): Likewise.
12260 (__arm_vst1q_p_u8): Define intrinsic.
12261 (__arm_vst1q_p_s8): Likewise.
12262 (__arm_vst2q_s8): Likewise.
12263 (__arm_vst2q_u8): Likewise.
12264 (__arm_vld1q_z_u8): Likewise.
12265 (__arm_vld1q_z_s8): Likewise.
12266 (__arm_vld2q_s8): Likewise.
12267 (__arm_vld2q_u8): Likewise.
12268 (__arm_vld4q_s8): Likewise.
12269 (__arm_vld4q_u8): Likewise.
12270 (__arm_vst1q_p_u16): Likewise.
12271 (__arm_vst1q_p_s16): Likewise.
12272 (__arm_vst2q_s16): Likewise.
12273 (__arm_vst2q_u16): Likewise.
12274 (__arm_vld1q_z_u16): Likewise.
12275 (__arm_vld1q_z_s16): Likewise.
12276 (__arm_vld2q_s16): Likewise.
12277 (__arm_vld2q_u16): Likewise.
12278 (__arm_vld4q_s16): Likewise.
12279 (__arm_vld4q_u16): Likewise.
12280 (__arm_vst1q_p_u32): Likewise.
12281 (__arm_vst1q_p_s32): Likewise.
12282 (__arm_vst2q_s32): Likewise.
12283 (__arm_vst2q_u32): Likewise.
12284 (__arm_vld1q_z_u32): Likewise.
12285 (__arm_vld1q_z_s32): Likewise.
12286 (__arm_vld2q_s32): Likewise.
12287 (__arm_vld2q_u32): Likewise.
12288 (__arm_vld4q_s32): Likewise.
12289 (__arm_vld4q_u32): Likewise.
12290 (__arm_vld4q_f16): Likewise.
12291 (__arm_vld2q_f16): Likewise.
12292 (__arm_vld1q_z_f16): Likewise.
12293 (__arm_vst2q_f16): Likewise.
12294 (__arm_vst1q_p_f16): Likewise.
12295 (__arm_vld4q_f32): Likewise.
12296 (__arm_vld2q_f32): Likewise.
12297 (__arm_vld1q_z_f32): Likewise.
12298 (__arm_vst2q_f32): Likewise.
12299 (__arm_vst1q_p_f32): Likewise.
12300 (vld1q_z): Define polymorphic variant.
12303 (vst1q_p): Likewise.
12305 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
12307 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
12308 (mve_vld2q<mode>): Likewise.
12309 (mve_vld4q<mode>): Likewise.
12311 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12312 Andre Vieira <andre.simoesdiasvieira@arm.com>
12313 Mihail Ionescu <mihail.ionescu@arm.com>
12315 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
12316 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
12317 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
12318 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
12319 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
12320 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
12321 * config/arm/arm_mve.h (vadciq_s32): Define macro.
12322 (vadciq_u32): Likewise.
12323 (vadciq_m_s32): Likewise.
12324 (vadciq_m_u32): Likewise.
12325 (vadcq_s32): Likewise.
12326 (vadcq_u32): Likewise.
12327 (vadcq_m_s32): Likewise.
12328 (vadcq_m_u32): Likewise.
12329 (vsbciq_s32): Likewise.
12330 (vsbciq_u32): Likewise.
12331 (vsbciq_m_s32): Likewise.
12332 (vsbciq_m_u32): Likewise.
12333 (vsbcq_s32): Likewise.
12334 (vsbcq_u32): Likewise.
12335 (vsbcq_m_s32): Likewise.
12336 (vsbcq_m_u32): Likewise.
12337 (__arm_vadciq_s32): Define intrinsic.
12338 (__arm_vadciq_u32): Likewise.
12339 (__arm_vadciq_m_s32): Likewise.
12340 (__arm_vadciq_m_u32): Likewise.
12341 (__arm_vadcq_s32): Likewise.
12342 (__arm_vadcq_u32): Likewise.
12343 (__arm_vadcq_m_s32): Likewise.
12344 (__arm_vadcq_m_u32): Likewise.
12345 (__arm_vsbciq_s32): Likewise.
12346 (__arm_vsbciq_u32): Likewise.
12347 (__arm_vsbciq_m_s32): Likewise.
12348 (__arm_vsbciq_m_u32): Likewise.
12349 (__arm_vsbcq_s32): Likewise.
12350 (__arm_vsbcq_u32): Likewise.
12351 (__arm_vsbcq_m_s32): Likewise.
12352 (__arm_vsbcq_m_u32): Likewise.
12353 (vadciq_m): Define polymorphic variant.
12354 (vadciq): Likewise.
12355 (vadcq_m): Likewise.
12357 (vsbciq_m): Likewise.
12358 (vsbciq): Likewise.
12359 (vsbcq_m): Likewise.
12361 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
12363 (BINOP_UNONE_UNONE_UNONE): Likewise.
12364 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
12365 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
12366 * config/arm/mve.md (VADCIQ): Define iterator.
12367 (VADCIQ_M): Likewise.
12369 (VSBCQ_M): Likewise.
12370 (VSBCIQ): Likewise.
12371 (VSBCIQ_M): Likewise.
12373 (VADCQ_M): Likewise.
12374 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
12375 (mve_vadciq_<supf>v4si): Likewise.
12376 (mve_vadcq_m_<supf>v4si): Likewise.
12377 (mve_vadcq_<supf>v4si): Likewise.
12378 (mve_vsbciq_m_<supf>v4si): Likewise.
12379 (mve_vsbciq_<supf>v4si): Likewise.
12380 (mve_vsbcq_m_<supf>v4si): Likewise.
12381 (mve_vsbcq_<supf>v4si): Likewise.
12382 (get_fpscr_nzcvqc): Define isns.
12383 (set_fpscr_nzcvqc): Define isns.
12384 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
12385 (UNSPEC_SET_FPSCR_NZCVQC): Define.
12387 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12389 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
12390 (vddupq_x_n_u16): Likewise.
12391 (vddupq_x_n_u32): Likewise.
12392 (vddupq_x_wb_u8): Likewise.
12393 (vddupq_x_wb_u16): Likewise.
12394 (vddupq_x_wb_u32): Likewise.
12395 (vdwdupq_x_n_u8): Likewise.
12396 (vdwdupq_x_n_u16): Likewise.
12397 (vdwdupq_x_n_u32): Likewise.
12398 (vdwdupq_x_wb_u8): Likewise.
12399 (vdwdupq_x_wb_u16): Likewise.
12400 (vdwdupq_x_wb_u32): Likewise.
12401 (vidupq_x_n_u8): Likewise.
12402 (vidupq_x_n_u16): Likewise.
12403 (vidupq_x_n_u32): Likewise.
12404 (vidupq_x_wb_u8): Likewise.
12405 (vidupq_x_wb_u16): Likewise.
12406 (vidupq_x_wb_u32): Likewise.
12407 (viwdupq_x_n_u8): Likewise.
12408 (viwdupq_x_n_u16): Likewise.
12409 (viwdupq_x_n_u32): Likewise.
12410 (viwdupq_x_wb_u8): Likewise.
12411 (viwdupq_x_wb_u16): Likewise.
12412 (viwdupq_x_wb_u32): Likewise.
12413 (vdupq_x_n_s8): Likewise.
12414 (vdupq_x_n_s16): Likewise.
12415 (vdupq_x_n_s32): Likewise.
12416 (vdupq_x_n_u8): Likewise.
12417 (vdupq_x_n_u16): Likewise.
12418 (vdupq_x_n_u32): Likewise.
12419 (vminq_x_s8): Likewise.
12420 (vminq_x_s16): Likewise.
12421 (vminq_x_s32): Likewise.
12422 (vminq_x_u8): Likewise.
12423 (vminq_x_u16): Likewise.
12424 (vminq_x_u32): Likewise.
12425 (vmaxq_x_s8): Likewise.
12426 (vmaxq_x_s16): Likewise.
12427 (vmaxq_x_s32): Likewise.
12428 (vmaxq_x_u8): Likewise.
12429 (vmaxq_x_u16): Likewise.
12430 (vmaxq_x_u32): Likewise.
12431 (vabdq_x_s8): Likewise.
12432 (vabdq_x_s16): Likewise.
12433 (vabdq_x_s32): Likewise.
12434 (vabdq_x_u8): Likewise.
12435 (vabdq_x_u16): Likewise.
12436 (vabdq_x_u32): Likewise.
12437 (vabsq_x_s8): Likewise.
12438 (vabsq_x_s16): Likewise.
12439 (vabsq_x_s32): Likewise.
12440 (vaddq_x_s8): Likewise.
12441 (vaddq_x_s16): Likewise.
12442 (vaddq_x_s32): Likewise.
12443 (vaddq_x_n_s8): Likewise.
12444 (vaddq_x_n_s16): Likewise.
12445 (vaddq_x_n_s32): Likewise.
12446 (vaddq_x_u8): Likewise.
12447 (vaddq_x_u16): Likewise.
12448 (vaddq_x_u32): Likewise.
12449 (vaddq_x_n_u8): Likewise.
12450 (vaddq_x_n_u16): Likewise.
12451 (vaddq_x_n_u32): Likewise.
12452 (vclsq_x_s8): Likewise.
12453 (vclsq_x_s16): Likewise.
12454 (vclsq_x_s32): Likewise.
12455 (vclzq_x_s8): Likewise.
12456 (vclzq_x_s16): Likewise.
12457 (vclzq_x_s32): Likewise.
12458 (vclzq_x_u8): Likewise.
12459 (vclzq_x_u16): Likewise.
12460 (vclzq_x_u32): Likewise.
12461 (vnegq_x_s8): Likewise.
12462 (vnegq_x_s16): Likewise.
12463 (vnegq_x_s32): Likewise.
12464 (vmulhq_x_s8): Likewise.
12465 (vmulhq_x_s16): Likewise.
12466 (vmulhq_x_s32): Likewise.
12467 (vmulhq_x_u8): Likewise.
12468 (vmulhq_x_u16): Likewise.
12469 (vmulhq_x_u32): Likewise.
12470 (vmullbq_poly_x_p8): Likewise.
12471 (vmullbq_poly_x_p16): Likewise.
12472 (vmullbq_int_x_s8): Likewise.
12473 (vmullbq_int_x_s16): Likewise.
12474 (vmullbq_int_x_s32): Likewise.
12475 (vmullbq_int_x_u8): Likewise.
12476 (vmullbq_int_x_u16): Likewise.
12477 (vmullbq_int_x_u32): Likewise.
12478 (vmulltq_poly_x_p8): Likewise.
12479 (vmulltq_poly_x_p16): Likewise.
12480 (vmulltq_int_x_s8): Likewise.
12481 (vmulltq_int_x_s16): Likewise.
12482 (vmulltq_int_x_s32): Likewise.
12483 (vmulltq_int_x_u8): Likewise.
12484 (vmulltq_int_x_u16): Likewise.
12485 (vmulltq_int_x_u32): Likewise.
12486 (vmulq_x_s8): Likewise.
12487 (vmulq_x_s16): Likewise.
12488 (vmulq_x_s32): Likewise.
12489 (vmulq_x_n_s8): Likewise.
12490 (vmulq_x_n_s16): Likewise.
12491 (vmulq_x_n_s32): Likewise.
12492 (vmulq_x_u8): Likewise.
12493 (vmulq_x_u16): Likewise.
12494 (vmulq_x_u32): Likewise.
12495 (vmulq_x_n_u8): Likewise.
12496 (vmulq_x_n_u16): Likewise.
12497 (vmulq_x_n_u32): Likewise.
12498 (vsubq_x_s8): Likewise.
12499 (vsubq_x_s16): Likewise.
12500 (vsubq_x_s32): Likewise.
12501 (vsubq_x_n_s8): Likewise.
12502 (vsubq_x_n_s16): Likewise.
12503 (vsubq_x_n_s32): Likewise.
12504 (vsubq_x_u8): Likewise.
12505 (vsubq_x_u16): Likewise.
12506 (vsubq_x_u32): Likewise.
12507 (vsubq_x_n_u8): Likewise.
12508 (vsubq_x_n_u16): Likewise.
12509 (vsubq_x_n_u32): Likewise.
12510 (vcaddq_rot90_x_s8): Likewise.
12511 (vcaddq_rot90_x_s16): Likewise.
12512 (vcaddq_rot90_x_s32): Likewise.
12513 (vcaddq_rot90_x_u8): Likewise.
12514 (vcaddq_rot90_x_u16): Likewise.
12515 (vcaddq_rot90_x_u32): Likewise.
12516 (vcaddq_rot270_x_s8): Likewise.
12517 (vcaddq_rot270_x_s16): Likewise.
12518 (vcaddq_rot270_x_s32): Likewise.
12519 (vcaddq_rot270_x_u8): Likewise.
12520 (vcaddq_rot270_x_u16): Likewise.
12521 (vcaddq_rot270_x_u32): Likewise.
12522 (vhaddq_x_n_s8): Likewise.
12523 (vhaddq_x_n_s16): Likewise.
12524 (vhaddq_x_n_s32): Likewise.
12525 (vhaddq_x_n_u8): Likewise.
12526 (vhaddq_x_n_u16): Likewise.
12527 (vhaddq_x_n_u32): Likewise.
12528 (vhaddq_x_s8): Likewise.
12529 (vhaddq_x_s16): Likewise.
12530 (vhaddq_x_s32): Likewise.
12531 (vhaddq_x_u8): Likewise.
12532 (vhaddq_x_u16): Likewise.
12533 (vhaddq_x_u32): Likewise.
12534 (vhcaddq_rot90_x_s8): Likewise.
12535 (vhcaddq_rot90_x_s16): Likewise.
12536 (vhcaddq_rot90_x_s32): Likewise.
12537 (vhcaddq_rot270_x_s8): Likewise.
12538 (vhcaddq_rot270_x_s16): Likewise.
12539 (vhcaddq_rot270_x_s32): Likewise.
12540 (vhsubq_x_n_s8): Likewise.
12541 (vhsubq_x_n_s16): Likewise.
12542 (vhsubq_x_n_s32): Likewise.
12543 (vhsubq_x_n_u8): Likewise.
12544 (vhsubq_x_n_u16): Likewise.
12545 (vhsubq_x_n_u32): Likewise.
12546 (vhsubq_x_s8): Likewise.
12547 (vhsubq_x_s16): Likewise.
12548 (vhsubq_x_s32): Likewise.
12549 (vhsubq_x_u8): Likewise.
12550 (vhsubq_x_u16): Likewise.
12551 (vhsubq_x_u32): Likewise.
12552 (vrhaddq_x_s8): Likewise.
12553 (vrhaddq_x_s16): Likewise.
12554 (vrhaddq_x_s32): Likewise.
12555 (vrhaddq_x_u8): Likewise.
12556 (vrhaddq_x_u16): Likewise.
12557 (vrhaddq_x_u32): Likewise.
12558 (vrmulhq_x_s8): Likewise.
12559 (vrmulhq_x_s16): Likewise.
12560 (vrmulhq_x_s32): Likewise.
12561 (vrmulhq_x_u8): Likewise.
12562 (vrmulhq_x_u16): Likewise.
12563 (vrmulhq_x_u32): Likewise.
12564 (vandq_x_s8): Likewise.
12565 (vandq_x_s16): Likewise.
12566 (vandq_x_s32): Likewise.
12567 (vandq_x_u8): Likewise.
12568 (vandq_x_u16): Likewise.
12569 (vandq_x_u32): Likewise.
12570 (vbicq_x_s8): Likewise.
12571 (vbicq_x_s16): Likewise.
12572 (vbicq_x_s32): Likewise.
12573 (vbicq_x_u8): Likewise.
12574 (vbicq_x_u16): Likewise.
12575 (vbicq_x_u32): Likewise.
12576 (vbrsrq_x_n_s8): Likewise.
12577 (vbrsrq_x_n_s16): Likewise.
12578 (vbrsrq_x_n_s32): Likewise.
12579 (vbrsrq_x_n_u8): Likewise.
12580 (vbrsrq_x_n_u16): Likewise.
12581 (vbrsrq_x_n_u32): Likewise.
12582 (veorq_x_s8): Likewise.
12583 (veorq_x_s16): Likewise.
12584 (veorq_x_s32): Likewise.
12585 (veorq_x_u8): Likewise.
12586 (veorq_x_u16): Likewise.
12587 (veorq_x_u32): Likewise.
12588 (vmovlbq_x_s8): Likewise.
12589 (vmovlbq_x_s16): Likewise.
12590 (vmovlbq_x_u8): Likewise.
12591 (vmovlbq_x_u16): Likewise.
12592 (vmovltq_x_s8): Likewise.
12593 (vmovltq_x_s16): Likewise.
12594 (vmovltq_x_u8): Likewise.
12595 (vmovltq_x_u16): Likewise.
12596 (vmvnq_x_s8): Likewise.
12597 (vmvnq_x_s16): Likewise.
12598 (vmvnq_x_s32): Likewise.
12599 (vmvnq_x_u8): Likewise.
12600 (vmvnq_x_u16): Likewise.
12601 (vmvnq_x_u32): Likewise.
12602 (vmvnq_x_n_s16): Likewise.
12603 (vmvnq_x_n_s32): Likewise.
12604 (vmvnq_x_n_u16): Likewise.
12605 (vmvnq_x_n_u32): Likewise.
12606 (vornq_x_s8): Likewise.
12607 (vornq_x_s16): Likewise.
12608 (vornq_x_s32): Likewise.
12609 (vornq_x_u8): Likewise.
12610 (vornq_x_u16): Likewise.
12611 (vornq_x_u32): Likewise.
12612 (vorrq_x_s8): Likewise.
12613 (vorrq_x_s16): Likewise.
12614 (vorrq_x_s32): Likewise.
12615 (vorrq_x_u8): Likewise.
12616 (vorrq_x_u16): Likewise.
12617 (vorrq_x_u32): Likewise.
12618 (vrev16q_x_s8): Likewise.
12619 (vrev16q_x_u8): Likewise.
12620 (vrev32q_x_s8): Likewise.
12621 (vrev32q_x_s16): Likewise.
12622 (vrev32q_x_u8): Likewise.
12623 (vrev32q_x_u16): Likewise.
12624 (vrev64q_x_s8): Likewise.
12625 (vrev64q_x_s16): Likewise.
12626 (vrev64q_x_s32): Likewise.
12627 (vrev64q_x_u8): Likewise.
12628 (vrev64q_x_u16): Likewise.
12629 (vrev64q_x_u32): Likewise.
12630 (vrshlq_x_s8): Likewise.
12631 (vrshlq_x_s16): Likewise.
12632 (vrshlq_x_s32): Likewise.
12633 (vrshlq_x_u8): Likewise.
12634 (vrshlq_x_u16): Likewise.
12635 (vrshlq_x_u32): Likewise.
12636 (vshllbq_x_n_s8): Likewise.
12637 (vshllbq_x_n_s16): Likewise.
12638 (vshllbq_x_n_u8): Likewise.
12639 (vshllbq_x_n_u16): Likewise.
12640 (vshlltq_x_n_s8): Likewise.
12641 (vshlltq_x_n_s16): Likewise.
12642 (vshlltq_x_n_u8): Likewise.
12643 (vshlltq_x_n_u16): Likewise.
12644 (vshlq_x_s8): Likewise.
12645 (vshlq_x_s16): Likewise.
12646 (vshlq_x_s32): Likewise.
12647 (vshlq_x_u8): Likewise.
12648 (vshlq_x_u16): Likewise.
12649 (vshlq_x_u32): Likewise.
12650 (vshlq_x_n_s8): Likewise.
12651 (vshlq_x_n_s16): Likewise.
12652 (vshlq_x_n_s32): Likewise.
12653 (vshlq_x_n_u8): Likewise.
12654 (vshlq_x_n_u16): Likewise.
12655 (vshlq_x_n_u32): Likewise.
12656 (vrshrq_x_n_s8): Likewise.
12657 (vrshrq_x_n_s16): Likewise.
12658 (vrshrq_x_n_s32): Likewise.
12659 (vrshrq_x_n_u8): Likewise.
12660 (vrshrq_x_n_u16): Likewise.
12661 (vrshrq_x_n_u32): Likewise.
12662 (vshrq_x_n_s8): Likewise.
12663 (vshrq_x_n_s16): Likewise.
12664 (vshrq_x_n_s32): Likewise.
12665 (vshrq_x_n_u8): Likewise.
12666 (vshrq_x_n_u16): Likewise.
12667 (vshrq_x_n_u32): Likewise.
12668 (vdupq_x_n_f16): Likewise.
12669 (vdupq_x_n_f32): Likewise.
12670 (vminnmq_x_f16): Likewise.
12671 (vminnmq_x_f32): Likewise.
12672 (vmaxnmq_x_f16): Likewise.
12673 (vmaxnmq_x_f32): Likewise.
12674 (vabdq_x_f16): Likewise.
12675 (vabdq_x_f32): Likewise.
12676 (vabsq_x_f16): Likewise.
12677 (vabsq_x_f32): Likewise.
12678 (vaddq_x_f16): Likewise.
12679 (vaddq_x_f32): Likewise.
12680 (vaddq_x_n_f16): Likewise.
12681 (vaddq_x_n_f32): Likewise.
12682 (vnegq_x_f16): Likewise.
12683 (vnegq_x_f32): Likewise.
12684 (vmulq_x_f16): Likewise.
12685 (vmulq_x_f32): Likewise.
12686 (vmulq_x_n_f16): Likewise.
12687 (vmulq_x_n_f32): Likewise.
12688 (vsubq_x_f16): Likewise.
12689 (vsubq_x_f32): Likewise.
12690 (vsubq_x_n_f16): Likewise.
12691 (vsubq_x_n_f32): Likewise.
12692 (vcaddq_rot90_x_f16): Likewise.
12693 (vcaddq_rot90_x_f32): Likewise.
12694 (vcaddq_rot270_x_f16): Likewise.
12695 (vcaddq_rot270_x_f32): Likewise.
12696 (vcmulq_x_f16): Likewise.
12697 (vcmulq_x_f32): Likewise.
12698 (vcmulq_rot90_x_f16): Likewise.
12699 (vcmulq_rot90_x_f32): Likewise.
12700 (vcmulq_rot180_x_f16): Likewise.
12701 (vcmulq_rot180_x_f32): Likewise.
12702 (vcmulq_rot270_x_f16): Likewise.
12703 (vcmulq_rot270_x_f32): Likewise.
12704 (vcvtaq_x_s16_f16): Likewise.
12705 (vcvtaq_x_s32_f32): Likewise.
12706 (vcvtaq_x_u16_f16): Likewise.
12707 (vcvtaq_x_u32_f32): Likewise.
12708 (vcvtnq_x_s16_f16): Likewise.
12709 (vcvtnq_x_s32_f32): Likewise.
12710 (vcvtnq_x_u16_f16): Likewise.
12711 (vcvtnq_x_u32_f32): Likewise.
12712 (vcvtpq_x_s16_f16): Likewise.
12713 (vcvtpq_x_s32_f32): Likewise.
12714 (vcvtpq_x_u16_f16): Likewise.
12715 (vcvtpq_x_u32_f32): Likewise.
12716 (vcvtmq_x_s16_f16): Likewise.
12717 (vcvtmq_x_s32_f32): Likewise.
12718 (vcvtmq_x_u16_f16): Likewise.
12719 (vcvtmq_x_u32_f32): Likewise.
12720 (vcvtbq_x_f32_f16): Likewise.
12721 (vcvttq_x_f32_f16): Likewise.
12722 (vcvtq_x_f16_u16): Likewise.
12723 (vcvtq_x_f16_s16): Likewise.
12724 (vcvtq_x_f32_s32): Likewise.
12725 (vcvtq_x_f32_u32): Likewise.
12726 (vcvtq_x_n_f16_s16): Likewise.
12727 (vcvtq_x_n_f16_u16): Likewise.
12728 (vcvtq_x_n_f32_s32): Likewise.
12729 (vcvtq_x_n_f32_u32): Likewise.
12730 (vcvtq_x_s16_f16): Likewise.
12731 (vcvtq_x_s32_f32): Likewise.
12732 (vcvtq_x_u16_f16): Likewise.
12733 (vcvtq_x_u32_f32): Likewise.
12734 (vcvtq_x_n_s16_f16): Likewise.
12735 (vcvtq_x_n_s32_f32): Likewise.
12736 (vcvtq_x_n_u16_f16): Likewise.
12737 (vcvtq_x_n_u32_f32): Likewise.
12738 (vrndq_x_f16): Likewise.
12739 (vrndq_x_f32): Likewise.
12740 (vrndnq_x_f16): Likewise.
12741 (vrndnq_x_f32): Likewise.
12742 (vrndmq_x_f16): Likewise.
12743 (vrndmq_x_f32): Likewise.
12744 (vrndpq_x_f16): Likewise.
12745 (vrndpq_x_f32): Likewise.
12746 (vrndaq_x_f16): Likewise.
12747 (vrndaq_x_f32): Likewise.
12748 (vrndxq_x_f16): Likewise.
12749 (vrndxq_x_f32): Likewise.
12750 (vandq_x_f16): Likewise.
12751 (vandq_x_f32): Likewise.
12752 (vbicq_x_f16): Likewise.
12753 (vbicq_x_f32): Likewise.
12754 (vbrsrq_x_n_f16): Likewise.
12755 (vbrsrq_x_n_f32): Likewise.
12756 (veorq_x_f16): Likewise.
12757 (veorq_x_f32): Likewise.
12758 (vornq_x_f16): Likewise.
12759 (vornq_x_f32): Likewise.
12760 (vorrq_x_f16): Likewise.
12761 (vorrq_x_f32): Likewise.
12762 (vrev32q_x_f16): Likewise.
12763 (vrev64q_x_f16): Likewise.
12764 (vrev64q_x_f32): Likewise.
12765 (__arm_vddupq_x_n_u8): Define intrinsic.
12766 (__arm_vddupq_x_n_u16): Likewise.
12767 (__arm_vddupq_x_n_u32): Likewise.
12768 (__arm_vddupq_x_wb_u8): Likewise.
12769 (__arm_vddupq_x_wb_u16): Likewise.
12770 (__arm_vddupq_x_wb_u32): Likewise.
12771 (__arm_vdwdupq_x_n_u8): Likewise.
12772 (__arm_vdwdupq_x_n_u16): Likewise.
12773 (__arm_vdwdupq_x_n_u32): Likewise.
12774 (__arm_vdwdupq_x_wb_u8): Likewise.
12775 (__arm_vdwdupq_x_wb_u16): Likewise.
12776 (__arm_vdwdupq_x_wb_u32): Likewise.
12777 (__arm_vidupq_x_n_u8): Likewise.
12778 (__arm_vidupq_x_n_u16): Likewise.
12779 (__arm_vidupq_x_n_u32): Likewise.
12780 (__arm_vidupq_x_wb_u8): Likewise.
12781 (__arm_vidupq_x_wb_u16): Likewise.
12782 (__arm_vidupq_x_wb_u32): Likewise.
12783 (__arm_viwdupq_x_n_u8): Likewise.
12784 (__arm_viwdupq_x_n_u16): Likewise.
12785 (__arm_viwdupq_x_n_u32): Likewise.
12786 (__arm_viwdupq_x_wb_u8): Likewise.
12787 (__arm_viwdupq_x_wb_u16): Likewise.
12788 (__arm_viwdupq_x_wb_u32): Likewise.
12789 (__arm_vdupq_x_n_s8): Likewise.
12790 (__arm_vdupq_x_n_s16): Likewise.
12791 (__arm_vdupq_x_n_s32): Likewise.
12792 (__arm_vdupq_x_n_u8): Likewise.
12793 (__arm_vdupq_x_n_u16): Likewise.
12794 (__arm_vdupq_x_n_u32): Likewise.
12795 (__arm_vminq_x_s8): Likewise.
12796 (__arm_vminq_x_s16): Likewise.
12797 (__arm_vminq_x_s32): Likewise.
12798 (__arm_vminq_x_u8): Likewise.
12799 (__arm_vminq_x_u16): Likewise.
12800 (__arm_vminq_x_u32): Likewise.
12801 (__arm_vmaxq_x_s8): Likewise.
12802 (__arm_vmaxq_x_s16): Likewise.
12803 (__arm_vmaxq_x_s32): Likewise.
12804 (__arm_vmaxq_x_u8): Likewise.
12805 (__arm_vmaxq_x_u16): Likewise.
12806 (__arm_vmaxq_x_u32): Likewise.
12807 (__arm_vabdq_x_s8): Likewise.
12808 (__arm_vabdq_x_s16): Likewise.
12809 (__arm_vabdq_x_s32): Likewise.
12810 (__arm_vabdq_x_u8): Likewise.
12811 (__arm_vabdq_x_u16): Likewise.
12812 (__arm_vabdq_x_u32): Likewise.
12813 (__arm_vabsq_x_s8): Likewise.
12814 (__arm_vabsq_x_s16): Likewise.
12815 (__arm_vabsq_x_s32): Likewise.
12816 (__arm_vaddq_x_s8): Likewise.
12817 (__arm_vaddq_x_s16): Likewise.
12818 (__arm_vaddq_x_s32): Likewise.
12819 (__arm_vaddq_x_n_s8): Likewise.
12820 (__arm_vaddq_x_n_s16): Likewise.
12821 (__arm_vaddq_x_n_s32): Likewise.
12822 (__arm_vaddq_x_u8): Likewise.
12823 (__arm_vaddq_x_u16): Likewise.
12824 (__arm_vaddq_x_u32): Likewise.
12825 (__arm_vaddq_x_n_u8): Likewise.
12826 (__arm_vaddq_x_n_u16): Likewise.
12827 (__arm_vaddq_x_n_u32): Likewise.
12828 (__arm_vclsq_x_s8): Likewise.
12829 (__arm_vclsq_x_s16): Likewise.
12830 (__arm_vclsq_x_s32): Likewise.
12831 (__arm_vclzq_x_s8): Likewise.
12832 (__arm_vclzq_x_s16): Likewise.
12833 (__arm_vclzq_x_s32): Likewise.
12834 (__arm_vclzq_x_u8): Likewise.
12835 (__arm_vclzq_x_u16): Likewise.
12836 (__arm_vclzq_x_u32): Likewise.
12837 (__arm_vnegq_x_s8): Likewise.
12838 (__arm_vnegq_x_s16): Likewise.
12839 (__arm_vnegq_x_s32): Likewise.
12840 (__arm_vmulhq_x_s8): Likewise.
12841 (__arm_vmulhq_x_s16): Likewise.
12842 (__arm_vmulhq_x_s32): Likewise.
12843 (__arm_vmulhq_x_u8): Likewise.
12844 (__arm_vmulhq_x_u16): Likewise.
12845 (__arm_vmulhq_x_u32): Likewise.
12846 (__arm_vmullbq_poly_x_p8): Likewise.
12847 (__arm_vmullbq_poly_x_p16): Likewise.
12848 (__arm_vmullbq_int_x_s8): Likewise.
12849 (__arm_vmullbq_int_x_s16): Likewise.
12850 (__arm_vmullbq_int_x_s32): Likewise.
12851 (__arm_vmullbq_int_x_u8): Likewise.
12852 (__arm_vmullbq_int_x_u16): Likewise.
12853 (__arm_vmullbq_int_x_u32): Likewise.
12854 (__arm_vmulltq_poly_x_p8): Likewise.
12855 (__arm_vmulltq_poly_x_p16): Likewise.
12856 (__arm_vmulltq_int_x_s8): Likewise.
12857 (__arm_vmulltq_int_x_s16): Likewise.
12858 (__arm_vmulltq_int_x_s32): Likewise.
12859 (__arm_vmulltq_int_x_u8): Likewise.
12860 (__arm_vmulltq_int_x_u16): Likewise.
12861 (__arm_vmulltq_int_x_u32): Likewise.
12862 (__arm_vmulq_x_s8): Likewise.
12863 (__arm_vmulq_x_s16): Likewise.
12864 (__arm_vmulq_x_s32): Likewise.
12865 (__arm_vmulq_x_n_s8): Likewise.
12866 (__arm_vmulq_x_n_s16): Likewise.
12867 (__arm_vmulq_x_n_s32): Likewise.
12868 (__arm_vmulq_x_u8): Likewise.
12869 (__arm_vmulq_x_u16): Likewise.
12870 (__arm_vmulq_x_u32): Likewise.
12871 (__arm_vmulq_x_n_u8): Likewise.
12872 (__arm_vmulq_x_n_u16): Likewise.
12873 (__arm_vmulq_x_n_u32): Likewise.
12874 (__arm_vsubq_x_s8): Likewise.
12875 (__arm_vsubq_x_s16): Likewise.
12876 (__arm_vsubq_x_s32): Likewise.
12877 (__arm_vsubq_x_n_s8): Likewise.
12878 (__arm_vsubq_x_n_s16): Likewise.
12879 (__arm_vsubq_x_n_s32): Likewise.
12880 (__arm_vsubq_x_u8): Likewise.
12881 (__arm_vsubq_x_u16): Likewise.
12882 (__arm_vsubq_x_u32): Likewise.
12883 (__arm_vsubq_x_n_u8): Likewise.
12884 (__arm_vsubq_x_n_u16): Likewise.
12885 (__arm_vsubq_x_n_u32): Likewise.
12886 (__arm_vcaddq_rot90_x_s8): Likewise.
12887 (__arm_vcaddq_rot90_x_s16): Likewise.
12888 (__arm_vcaddq_rot90_x_s32): Likewise.
12889 (__arm_vcaddq_rot90_x_u8): Likewise.
12890 (__arm_vcaddq_rot90_x_u16): Likewise.
12891 (__arm_vcaddq_rot90_x_u32): Likewise.
12892 (__arm_vcaddq_rot270_x_s8): Likewise.
12893 (__arm_vcaddq_rot270_x_s16): Likewise.
12894 (__arm_vcaddq_rot270_x_s32): Likewise.
12895 (__arm_vcaddq_rot270_x_u8): Likewise.
12896 (__arm_vcaddq_rot270_x_u16): Likewise.
12897 (__arm_vcaddq_rot270_x_u32): Likewise.
12898 (__arm_vhaddq_x_n_s8): Likewise.
12899 (__arm_vhaddq_x_n_s16): Likewise.
12900 (__arm_vhaddq_x_n_s32): Likewise.
12901 (__arm_vhaddq_x_n_u8): Likewise.
12902 (__arm_vhaddq_x_n_u16): Likewise.
12903 (__arm_vhaddq_x_n_u32): Likewise.
12904 (__arm_vhaddq_x_s8): Likewise.
12905 (__arm_vhaddq_x_s16): Likewise.
12906 (__arm_vhaddq_x_s32): Likewise.
12907 (__arm_vhaddq_x_u8): Likewise.
12908 (__arm_vhaddq_x_u16): Likewise.
12909 (__arm_vhaddq_x_u32): Likewise.
12910 (__arm_vhcaddq_rot90_x_s8): Likewise.
12911 (__arm_vhcaddq_rot90_x_s16): Likewise.
12912 (__arm_vhcaddq_rot90_x_s32): Likewise.
12913 (__arm_vhcaddq_rot270_x_s8): Likewise.
12914 (__arm_vhcaddq_rot270_x_s16): Likewise.
12915 (__arm_vhcaddq_rot270_x_s32): Likewise.
12916 (__arm_vhsubq_x_n_s8): Likewise.
12917 (__arm_vhsubq_x_n_s16): Likewise.
12918 (__arm_vhsubq_x_n_s32): Likewise.
12919 (__arm_vhsubq_x_n_u8): Likewise.
12920 (__arm_vhsubq_x_n_u16): Likewise.
12921 (__arm_vhsubq_x_n_u32): Likewise.
12922 (__arm_vhsubq_x_s8): Likewise.
12923 (__arm_vhsubq_x_s16): Likewise.
12924 (__arm_vhsubq_x_s32): Likewise.
12925 (__arm_vhsubq_x_u8): Likewise.
12926 (__arm_vhsubq_x_u16): Likewise.
12927 (__arm_vhsubq_x_u32): Likewise.
12928 (__arm_vrhaddq_x_s8): Likewise.
12929 (__arm_vrhaddq_x_s16): Likewise.
12930 (__arm_vrhaddq_x_s32): Likewise.
12931 (__arm_vrhaddq_x_u8): Likewise.
12932 (__arm_vrhaddq_x_u16): Likewise.
12933 (__arm_vrhaddq_x_u32): Likewise.
12934 (__arm_vrmulhq_x_s8): Likewise.
12935 (__arm_vrmulhq_x_s16): Likewise.
12936 (__arm_vrmulhq_x_s32): Likewise.
12937 (__arm_vrmulhq_x_u8): Likewise.
12938 (__arm_vrmulhq_x_u16): Likewise.
12939 (__arm_vrmulhq_x_u32): Likewise.
12940 (__arm_vandq_x_s8): Likewise.
12941 (__arm_vandq_x_s16): Likewise.
12942 (__arm_vandq_x_s32): Likewise.
12943 (__arm_vandq_x_u8): Likewise.
12944 (__arm_vandq_x_u16): Likewise.
12945 (__arm_vandq_x_u32): Likewise.
12946 (__arm_vbicq_x_s8): Likewise.
12947 (__arm_vbicq_x_s16): Likewise.
12948 (__arm_vbicq_x_s32): Likewise.
12949 (__arm_vbicq_x_u8): Likewise.
12950 (__arm_vbicq_x_u16): Likewise.
12951 (__arm_vbicq_x_u32): Likewise.
12952 (__arm_vbrsrq_x_n_s8): Likewise.
12953 (__arm_vbrsrq_x_n_s16): Likewise.
12954 (__arm_vbrsrq_x_n_s32): Likewise.
12955 (__arm_vbrsrq_x_n_u8): Likewise.
12956 (__arm_vbrsrq_x_n_u16): Likewise.
12957 (__arm_vbrsrq_x_n_u32): Likewise.
12958 (__arm_veorq_x_s8): Likewise.
12959 (__arm_veorq_x_s16): Likewise.
12960 (__arm_veorq_x_s32): Likewise.
12961 (__arm_veorq_x_u8): Likewise.
12962 (__arm_veorq_x_u16): Likewise.
12963 (__arm_veorq_x_u32): Likewise.
12964 (__arm_vmovlbq_x_s8): Likewise.
12965 (__arm_vmovlbq_x_s16): Likewise.
12966 (__arm_vmovlbq_x_u8): Likewise.
12967 (__arm_vmovlbq_x_u16): Likewise.
12968 (__arm_vmovltq_x_s8): Likewise.
12969 (__arm_vmovltq_x_s16): Likewise.
12970 (__arm_vmovltq_x_u8): Likewise.
12971 (__arm_vmovltq_x_u16): Likewise.
12972 (__arm_vmvnq_x_s8): Likewise.
12973 (__arm_vmvnq_x_s16): Likewise.
12974 (__arm_vmvnq_x_s32): Likewise.
12975 (__arm_vmvnq_x_u8): Likewise.
12976 (__arm_vmvnq_x_u16): Likewise.
12977 (__arm_vmvnq_x_u32): Likewise.
12978 (__arm_vmvnq_x_n_s16): Likewise.
12979 (__arm_vmvnq_x_n_s32): Likewise.
12980 (__arm_vmvnq_x_n_u16): Likewise.
12981 (__arm_vmvnq_x_n_u32): Likewise.
12982 (__arm_vornq_x_s8): Likewise.
12983 (__arm_vornq_x_s16): Likewise.
12984 (__arm_vornq_x_s32): Likewise.
12985 (__arm_vornq_x_u8): Likewise.
12986 (__arm_vornq_x_u16): Likewise.
12987 (__arm_vornq_x_u32): Likewise.
12988 (__arm_vorrq_x_s8): Likewise.
12989 (__arm_vorrq_x_s16): Likewise.
12990 (__arm_vorrq_x_s32): Likewise.
12991 (__arm_vorrq_x_u8): Likewise.
12992 (__arm_vorrq_x_u16): Likewise.
12993 (__arm_vorrq_x_u32): Likewise.
12994 (__arm_vrev16q_x_s8): Likewise.
12995 (__arm_vrev16q_x_u8): Likewise.
12996 (__arm_vrev32q_x_s8): Likewise.
12997 (__arm_vrev32q_x_s16): Likewise.
12998 (__arm_vrev32q_x_u8): Likewise.
12999 (__arm_vrev32q_x_u16): Likewise.
13000 (__arm_vrev64q_x_s8): Likewise.
13001 (__arm_vrev64q_x_s16): Likewise.
13002 (__arm_vrev64q_x_s32): Likewise.
13003 (__arm_vrev64q_x_u8): Likewise.
13004 (__arm_vrev64q_x_u16): Likewise.
13005 (__arm_vrev64q_x_u32): Likewise.
13006 (__arm_vrshlq_x_s8): Likewise.
13007 (__arm_vrshlq_x_s16): Likewise.
13008 (__arm_vrshlq_x_s32): Likewise.
13009 (__arm_vrshlq_x_u8): Likewise.
13010 (__arm_vrshlq_x_u16): Likewise.
13011 (__arm_vrshlq_x_u32): Likewise.
13012 (__arm_vshllbq_x_n_s8): Likewise.
13013 (__arm_vshllbq_x_n_s16): Likewise.
13014 (__arm_vshllbq_x_n_u8): Likewise.
13015 (__arm_vshllbq_x_n_u16): Likewise.
13016 (__arm_vshlltq_x_n_s8): Likewise.
13017 (__arm_vshlltq_x_n_s16): Likewise.
13018 (__arm_vshlltq_x_n_u8): Likewise.
13019 (__arm_vshlltq_x_n_u16): Likewise.
13020 (__arm_vshlq_x_s8): Likewise.
13021 (__arm_vshlq_x_s16): Likewise.
13022 (__arm_vshlq_x_s32): Likewise.
13023 (__arm_vshlq_x_u8): Likewise.
13024 (__arm_vshlq_x_u16): Likewise.
13025 (__arm_vshlq_x_u32): Likewise.
13026 (__arm_vshlq_x_n_s8): Likewise.
13027 (__arm_vshlq_x_n_s16): Likewise.
13028 (__arm_vshlq_x_n_s32): Likewise.
13029 (__arm_vshlq_x_n_u8): Likewise.
13030 (__arm_vshlq_x_n_u16): Likewise.
13031 (__arm_vshlq_x_n_u32): Likewise.
13032 (__arm_vrshrq_x_n_s8): Likewise.
13033 (__arm_vrshrq_x_n_s16): Likewise.
13034 (__arm_vrshrq_x_n_s32): Likewise.
13035 (__arm_vrshrq_x_n_u8): Likewise.
13036 (__arm_vrshrq_x_n_u16): Likewise.
13037 (__arm_vrshrq_x_n_u32): Likewise.
13038 (__arm_vshrq_x_n_s8): Likewise.
13039 (__arm_vshrq_x_n_s16): Likewise.
13040 (__arm_vshrq_x_n_s32): Likewise.
13041 (__arm_vshrq_x_n_u8): Likewise.
13042 (__arm_vshrq_x_n_u16): Likewise.
13043 (__arm_vshrq_x_n_u32): Likewise.
13044 (__arm_vdupq_x_n_f16): Likewise.
13045 (__arm_vdupq_x_n_f32): Likewise.
13046 (__arm_vminnmq_x_f16): Likewise.
13047 (__arm_vminnmq_x_f32): Likewise.
13048 (__arm_vmaxnmq_x_f16): Likewise.
13049 (__arm_vmaxnmq_x_f32): Likewise.
13050 (__arm_vabdq_x_f16): Likewise.
13051 (__arm_vabdq_x_f32): Likewise.
13052 (__arm_vabsq_x_f16): Likewise.
13053 (__arm_vabsq_x_f32): Likewise.
13054 (__arm_vaddq_x_f16): Likewise.
13055 (__arm_vaddq_x_f32): Likewise.
13056 (__arm_vaddq_x_n_f16): Likewise.
13057 (__arm_vaddq_x_n_f32): Likewise.
13058 (__arm_vnegq_x_f16): Likewise.
13059 (__arm_vnegq_x_f32): Likewise.
13060 (__arm_vmulq_x_f16): Likewise.
13061 (__arm_vmulq_x_f32): Likewise.
13062 (__arm_vmulq_x_n_f16): Likewise.
13063 (__arm_vmulq_x_n_f32): Likewise.
13064 (__arm_vsubq_x_f16): Likewise.
13065 (__arm_vsubq_x_f32): Likewise.
13066 (__arm_vsubq_x_n_f16): Likewise.
13067 (__arm_vsubq_x_n_f32): Likewise.
13068 (__arm_vcaddq_rot90_x_f16): Likewise.
13069 (__arm_vcaddq_rot90_x_f32): Likewise.
13070 (__arm_vcaddq_rot270_x_f16): Likewise.
13071 (__arm_vcaddq_rot270_x_f32): Likewise.
13072 (__arm_vcmulq_x_f16): Likewise.
13073 (__arm_vcmulq_x_f32): Likewise.
13074 (__arm_vcmulq_rot90_x_f16): Likewise.
13075 (__arm_vcmulq_rot90_x_f32): Likewise.
13076 (__arm_vcmulq_rot180_x_f16): Likewise.
13077 (__arm_vcmulq_rot180_x_f32): Likewise.
13078 (__arm_vcmulq_rot270_x_f16): Likewise.
13079 (__arm_vcmulq_rot270_x_f32): Likewise.
13080 (__arm_vcvtaq_x_s16_f16): Likewise.
13081 (__arm_vcvtaq_x_s32_f32): Likewise.
13082 (__arm_vcvtaq_x_u16_f16): Likewise.
13083 (__arm_vcvtaq_x_u32_f32): Likewise.
13084 (__arm_vcvtnq_x_s16_f16): Likewise.
13085 (__arm_vcvtnq_x_s32_f32): Likewise.
13086 (__arm_vcvtnq_x_u16_f16): Likewise.
13087 (__arm_vcvtnq_x_u32_f32): Likewise.
13088 (__arm_vcvtpq_x_s16_f16): Likewise.
13089 (__arm_vcvtpq_x_s32_f32): Likewise.
13090 (__arm_vcvtpq_x_u16_f16): Likewise.
13091 (__arm_vcvtpq_x_u32_f32): Likewise.
13092 (__arm_vcvtmq_x_s16_f16): Likewise.
13093 (__arm_vcvtmq_x_s32_f32): Likewise.
13094 (__arm_vcvtmq_x_u16_f16): Likewise.
13095 (__arm_vcvtmq_x_u32_f32): Likewise.
13096 (__arm_vcvtbq_x_f32_f16): Likewise.
13097 (__arm_vcvttq_x_f32_f16): Likewise.
13098 (__arm_vcvtq_x_f16_u16): Likewise.
13099 (__arm_vcvtq_x_f16_s16): Likewise.
13100 (__arm_vcvtq_x_f32_s32): Likewise.
13101 (__arm_vcvtq_x_f32_u32): Likewise.
13102 (__arm_vcvtq_x_n_f16_s16): Likewise.
13103 (__arm_vcvtq_x_n_f16_u16): Likewise.
13104 (__arm_vcvtq_x_n_f32_s32): Likewise.
13105 (__arm_vcvtq_x_n_f32_u32): Likewise.
13106 (__arm_vcvtq_x_s16_f16): Likewise.
13107 (__arm_vcvtq_x_s32_f32): Likewise.
13108 (__arm_vcvtq_x_u16_f16): Likewise.
13109 (__arm_vcvtq_x_u32_f32): Likewise.
13110 (__arm_vcvtq_x_n_s16_f16): Likewise.
13111 (__arm_vcvtq_x_n_s32_f32): Likewise.
13112 (__arm_vcvtq_x_n_u16_f16): Likewise.
13113 (__arm_vcvtq_x_n_u32_f32): Likewise.
13114 (__arm_vrndq_x_f16): Likewise.
13115 (__arm_vrndq_x_f32): Likewise.
13116 (__arm_vrndnq_x_f16): Likewise.
13117 (__arm_vrndnq_x_f32): Likewise.
13118 (__arm_vrndmq_x_f16): Likewise.
13119 (__arm_vrndmq_x_f32): Likewise.
13120 (__arm_vrndpq_x_f16): Likewise.
13121 (__arm_vrndpq_x_f32): Likewise.
13122 (__arm_vrndaq_x_f16): Likewise.
13123 (__arm_vrndaq_x_f32): Likewise.
13124 (__arm_vrndxq_x_f16): Likewise.
13125 (__arm_vrndxq_x_f32): Likewise.
13126 (__arm_vandq_x_f16): Likewise.
13127 (__arm_vandq_x_f32): Likewise.
13128 (__arm_vbicq_x_f16): Likewise.
13129 (__arm_vbicq_x_f32): Likewise.
13130 (__arm_vbrsrq_x_n_f16): Likewise.
13131 (__arm_vbrsrq_x_n_f32): Likewise.
13132 (__arm_veorq_x_f16): Likewise.
13133 (__arm_veorq_x_f32): Likewise.
13134 (__arm_vornq_x_f16): Likewise.
13135 (__arm_vornq_x_f32): Likewise.
13136 (__arm_vorrq_x_f16): Likewise.
13137 (__arm_vorrq_x_f32): Likewise.
13138 (__arm_vrev32q_x_f16): Likewise.
13139 (__arm_vrev64q_x_f16): Likewise.
13140 (__arm_vrev64q_x_f32): Likewise.
13141 (vabdq_x): Define polymorphic variant.
13142 (vabsq_x): Likewise.
13143 (vaddq_x): Likewise.
13144 (vandq_x): Likewise.
13145 (vbicq_x): Likewise.
13146 (vbrsrq_x): Likewise.
13147 (vcaddq_rot270_x): Likewise.
13148 (vcaddq_rot90_x): Likewise.
13149 (vcmulq_rot180_x): Likewise.
13150 (vcmulq_rot270_x): Likewise.
13151 (vcmulq_x): Likewise.
13152 (vcvtq_x): Likewise.
13153 (vcvtq_x_n): Likewise.
13154 (vcvtnq_m): Likewise.
13155 (veorq_x): Likewise.
13156 (vmaxnmq_x): Likewise.
13157 (vminnmq_x): Likewise.
13158 (vmulq_x): Likewise.
13159 (vnegq_x): Likewise.
13160 (vornq_x): Likewise.
13161 (vorrq_x): Likewise.
13162 (vrev32q_x): Likewise.
13163 (vrev64q_x): Likewise.
13164 (vrndaq_x): Likewise.
13165 (vrndmq_x): Likewise.
13166 (vrndnq_x): Likewise.
13167 (vrndpq_x): Likewise.
13168 (vrndq_x): Likewise.
13169 (vrndxq_x): Likewise.
13170 (vsubq_x): Likewise.
13171 (vcmulq_rot90_x): Likewise.
13172 (vadciq): Likewise.
13173 (vclsq_x): Likewise.
13174 (vclzq_x): Likewise.
13175 (vhaddq_x): Likewise.
13176 (vhcaddq_rot270_x): Likewise.
13177 (vhcaddq_rot90_x): Likewise.
13178 (vhsubq_x): Likewise.
13179 (vmaxq_x): Likewise.
13180 (vminq_x): Likewise.
13181 (vmovlbq_x): Likewise.
13182 (vmovltq_x): Likewise.
13183 (vmulhq_x): Likewise.
13184 (vmullbq_int_x): Likewise.
13185 (vmullbq_poly_x): Likewise.
13186 (vmulltq_int_x): Likewise.
13187 (vmulltq_poly_x): Likewise.
13188 (vmvnq_x): Likewise.
13189 (vrev16q_x): Likewise.
13190 (vrhaddq_x): Likewise.
13191 (vrmulhq_x): Likewise.
13192 (vrshlq_x): Likewise.
13193 (vrshrq_x): Likewise.
13194 (vshllbq_x): Likewise.
13195 (vshlltq_x): Likewise.
13196 (vshlq_x_n): Likewise.
13197 (vshlq_x): Likewise.
13198 (vdwdupq_x_u8): Likewise.
13199 (vdwdupq_x_u16): Likewise.
13200 (vdwdupq_x_u32): Likewise.
13201 (viwdupq_x_u8): Likewise.
13202 (viwdupq_x_u16): Likewise.
13203 (viwdupq_x_u32): Likewise.
13204 (vidupq_x_u8): Likewise.
13205 (vddupq_x_u8): Likewise.
13206 (vidupq_x_u16): Likewise.
13207 (vddupq_x_u16): Likewise.
13208 (vidupq_x_u32): Likewise.
13209 (vddupq_x_u32): Likewise.
13210 (vshrq_x): Likewise.
13212 2020-03-20 Richard Biener <rguenther@suse.de>
13214 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
13215 to vectorize for CTOR defs.
13217 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13218 Andre Vieira <andre.simoesdiasvieira@arm.com>
13219 Mihail Ionescu <mihail.ionescu@arm.com>
13221 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
13223 (LDRGBWBU_QUALIFIERS): Likewise.
13224 (LDRGBWBS_Z_QUALIFIERS): Likewise.
13225 (LDRGBWBU_Z_QUALIFIERS): Likewise.
13226 (STRSBWBS_QUALIFIERS): Likewise.
13227 (STRSBWBU_QUALIFIERS): Likewise.
13228 (STRSBWBS_P_QUALIFIERS): Likewise.
13229 (STRSBWBU_P_QUALIFIERS): Likewise.
13230 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
13231 (vldrdq_gather_base_wb_u64): Likewise.
13232 (vldrdq_gather_base_wb_z_s64): Likewise.
13233 (vldrdq_gather_base_wb_z_u64): Likewise.
13234 (vldrwq_gather_base_wb_f32): Likewise.
13235 (vldrwq_gather_base_wb_s32): Likewise.
13236 (vldrwq_gather_base_wb_u32): Likewise.
13237 (vldrwq_gather_base_wb_z_f32): Likewise.
13238 (vldrwq_gather_base_wb_z_s32): Likewise.
13239 (vldrwq_gather_base_wb_z_u32): Likewise.
13240 (vstrdq_scatter_base_wb_p_s64): Likewise.
13241 (vstrdq_scatter_base_wb_p_u64): Likewise.
13242 (vstrdq_scatter_base_wb_s64): Likewise.
13243 (vstrdq_scatter_base_wb_u64): Likewise.
13244 (vstrwq_scatter_base_wb_p_s32): Likewise.
13245 (vstrwq_scatter_base_wb_p_f32): Likewise.
13246 (vstrwq_scatter_base_wb_p_u32): Likewise.
13247 (vstrwq_scatter_base_wb_s32): Likewise.
13248 (vstrwq_scatter_base_wb_u32): Likewise.
13249 (vstrwq_scatter_base_wb_f32): Likewise.
13250 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
13251 (__arm_vldrdq_gather_base_wb_u64): Likewise.
13252 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
13253 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
13254 (__arm_vldrwq_gather_base_wb_s32): Likewise.
13255 (__arm_vldrwq_gather_base_wb_u32): Likewise.
13256 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
13257 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
13258 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
13259 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
13260 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
13261 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
13262 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
13263 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
13264 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
13265 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
13266 (__arm_vldrwq_gather_base_wb_f32): Likewise.
13267 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
13268 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
13269 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
13270 (vstrwq_scatter_base_wb): Define polymorphic variant.
13271 (vstrwq_scatter_base_wb_p): Likewise.
13272 (vstrdq_scatter_base_wb_p): Likewise.
13273 (vstrdq_scatter_base_wb): Likewise.
13274 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
13276 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
13278 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
13279 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
13280 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
13281 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
13282 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
13283 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
13284 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
13285 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
13286 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
13287 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
13288 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
13289 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
13290 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
13291 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
13292 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
13293 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
13294 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
13295 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
13296 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
13297 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
13298 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
13299 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
13300 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
13301 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
13302 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
13303 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
13304 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
13305 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
13306 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
13308 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13309 Andre Vieira <andre.simoesdiasvieira@arm.com>
13310 Mihail Ionescu <mihail.ionescu@arm.com>
13312 * config/arm/arm-builtins.c
13313 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
13315 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
13316 (vddupq_m_n_u32): Likewise.
13317 (vddupq_m_n_u16): Likewise.
13318 (vddupq_m_wb_u8): Likewise.
13319 (vddupq_m_wb_u16): Likewise.
13320 (vddupq_m_wb_u32): Likewise.
13321 (vddupq_n_u8): Likewise.
13322 (vddupq_n_u32): Likewise.
13323 (vddupq_n_u16): Likewise.
13324 (vddupq_wb_u8): Likewise.
13325 (vddupq_wb_u16): Likewise.
13326 (vddupq_wb_u32): Likewise.
13327 (vdwdupq_m_n_u8): Likewise.
13328 (vdwdupq_m_n_u32): Likewise.
13329 (vdwdupq_m_n_u16): Likewise.
13330 (vdwdupq_m_wb_u8): Likewise.
13331 (vdwdupq_m_wb_u32): Likewise.
13332 (vdwdupq_m_wb_u16): Likewise.
13333 (vdwdupq_n_u8): Likewise.
13334 (vdwdupq_n_u32): Likewise.
13335 (vdwdupq_n_u16): Likewise.
13336 (vdwdupq_wb_u8): Likewise.
13337 (vdwdupq_wb_u32): Likewise.
13338 (vdwdupq_wb_u16): Likewise.
13339 (vidupq_m_n_u8): Likewise.
13340 (vidupq_m_n_u32): Likewise.
13341 (vidupq_m_n_u16): Likewise.
13342 (vidupq_m_wb_u8): Likewise.
13343 (vidupq_m_wb_u16): Likewise.
13344 (vidupq_m_wb_u32): Likewise.
13345 (vidupq_n_u8): Likewise.
13346 (vidupq_n_u32): Likewise.
13347 (vidupq_n_u16): Likewise.
13348 (vidupq_wb_u8): Likewise.
13349 (vidupq_wb_u16): Likewise.
13350 (vidupq_wb_u32): Likewise.
13351 (viwdupq_m_n_u8): Likewise.
13352 (viwdupq_m_n_u32): Likewise.
13353 (viwdupq_m_n_u16): Likewise.
13354 (viwdupq_m_wb_u8): Likewise.
13355 (viwdupq_m_wb_u32): Likewise.
13356 (viwdupq_m_wb_u16): Likewise.
13357 (viwdupq_n_u8): Likewise.
13358 (viwdupq_n_u32): Likewise.
13359 (viwdupq_n_u16): Likewise.
13360 (viwdupq_wb_u8): Likewise.
13361 (viwdupq_wb_u32): Likewise.
13362 (viwdupq_wb_u16): Likewise.
13363 (__arm_vddupq_m_n_u8): Define intrinsic.
13364 (__arm_vddupq_m_n_u32): Likewise.
13365 (__arm_vddupq_m_n_u16): Likewise.
13366 (__arm_vddupq_m_wb_u8): Likewise.
13367 (__arm_vddupq_m_wb_u16): Likewise.
13368 (__arm_vddupq_m_wb_u32): Likewise.
13369 (__arm_vddupq_n_u8): Likewise.
13370 (__arm_vddupq_n_u32): Likewise.
13371 (__arm_vddupq_n_u16): Likewise.
13372 (__arm_vdwdupq_m_n_u8): Likewise.
13373 (__arm_vdwdupq_m_n_u32): Likewise.
13374 (__arm_vdwdupq_m_n_u16): Likewise.
13375 (__arm_vdwdupq_m_wb_u8): Likewise.
13376 (__arm_vdwdupq_m_wb_u32): Likewise.
13377 (__arm_vdwdupq_m_wb_u16): Likewise.
13378 (__arm_vdwdupq_n_u8): Likewise.
13379 (__arm_vdwdupq_n_u32): Likewise.
13380 (__arm_vdwdupq_n_u16): Likewise.
13381 (__arm_vdwdupq_wb_u8): Likewise.
13382 (__arm_vdwdupq_wb_u32): Likewise.
13383 (__arm_vdwdupq_wb_u16): Likewise.
13384 (__arm_vidupq_m_n_u8): Likewise.
13385 (__arm_vidupq_m_n_u32): Likewise.
13386 (__arm_vidupq_m_n_u16): Likewise.
13387 (__arm_vidupq_n_u8): Likewise.
13388 (__arm_vidupq_m_wb_u8): Likewise.
13389 (__arm_vidupq_m_wb_u16): Likewise.
13390 (__arm_vidupq_m_wb_u32): Likewise.
13391 (__arm_vidupq_n_u32): Likewise.
13392 (__arm_vidupq_n_u16): Likewise.
13393 (__arm_vidupq_wb_u8): Likewise.
13394 (__arm_vidupq_wb_u16): Likewise.
13395 (__arm_vidupq_wb_u32): Likewise.
13396 (__arm_vddupq_wb_u8): Likewise.
13397 (__arm_vddupq_wb_u16): Likewise.
13398 (__arm_vddupq_wb_u32): Likewise.
13399 (__arm_viwdupq_m_n_u8): Likewise.
13400 (__arm_viwdupq_m_n_u32): Likewise.
13401 (__arm_viwdupq_m_n_u16): Likewise.
13402 (__arm_viwdupq_m_wb_u8): Likewise.
13403 (__arm_viwdupq_m_wb_u32): Likewise.
13404 (__arm_viwdupq_m_wb_u16): Likewise.
13405 (__arm_viwdupq_n_u8): Likewise.
13406 (__arm_viwdupq_n_u32): Likewise.
13407 (__arm_viwdupq_n_u16): Likewise.
13408 (__arm_viwdupq_wb_u8): Likewise.
13409 (__arm_viwdupq_wb_u32): Likewise.
13410 (__arm_viwdupq_wb_u16): Likewise.
13411 (vidupq_m): Define polymorphic variant.
13412 (vddupq_m): Likewise.
13413 (vidupq_u16): Likewise.
13414 (vidupq_u32): Likewise.
13415 (vidupq_u8): Likewise.
13416 (vddupq_u16): Likewise.
13417 (vddupq_u32): Likewise.
13418 (vddupq_u8): Likewise.
13419 (viwdupq_m): Likewise.
13420 (viwdupq_u16): Likewise.
13421 (viwdupq_u32): Likewise.
13422 (viwdupq_u8): Likewise.
13423 (vdwdupq_m): Likewise.
13424 (vdwdupq_u16): Likewise.
13425 (vdwdupq_u32): Likewise.
13426 (vdwdupq_u8): Likewise.
13427 * config/arm/arm_mve_builtins.def
13428 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
13430 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
13431 (mve_vidupq_u<mode>_insn): Likewise.
13432 (mve_vidupq_m_n_u<mode>): Likewise.
13433 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
13434 (mve_vddupq_n_u<mode>): Likewise.
13435 (mve_vddupq_u<mode>_insn): Likewise.
13436 (mve_vddupq_m_n_u<mode>): Likewise.
13437 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
13438 (mve_vdwdupq_n_u<mode>): Likewise.
13439 (mve_vdwdupq_wb_u<mode>): Likewise.
13440 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
13441 (mve_vdwdupq_m_n_u<mode>): Likewise.
13442 (mve_vdwdupq_m_wb_u<mode>): Likewise.
13443 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
13444 (mve_viwdupq_n_u<mode>): Likewise.
13445 (mve_viwdupq_wb_u<mode>): Likewise.
13446 (mve_viwdupq_wb_u<mode>_insn): Likewise.
13447 (mve_viwdupq_m_n_u<mode>): Likewise.
13448 (mve_viwdupq_m_wb_u<mode>): Likewise.
13449 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
13451 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13453 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
13454 (vreinterpretq_s16_s64): Likewise.
13455 (vreinterpretq_s16_s8): Likewise.
13456 (vreinterpretq_s16_u16): Likewise.
13457 (vreinterpretq_s16_u32): Likewise.
13458 (vreinterpretq_s16_u64): Likewise.
13459 (vreinterpretq_s16_u8): Likewise.
13460 (vreinterpretq_s32_s16): Likewise.
13461 (vreinterpretq_s32_s64): Likewise.
13462 (vreinterpretq_s32_s8): Likewise.
13463 (vreinterpretq_s32_u16): Likewise.
13464 (vreinterpretq_s32_u32): Likewise.
13465 (vreinterpretq_s32_u64): Likewise.
13466 (vreinterpretq_s32_u8): Likewise.
13467 (vreinterpretq_s64_s16): Likewise.
13468 (vreinterpretq_s64_s32): Likewise.
13469 (vreinterpretq_s64_s8): Likewise.
13470 (vreinterpretq_s64_u16): Likewise.
13471 (vreinterpretq_s64_u32): Likewise.
13472 (vreinterpretq_s64_u64): Likewise.
13473 (vreinterpretq_s64_u8): Likewise.
13474 (vreinterpretq_s8_s16): Likewise.
13475 (vreinterpretq_s8_s32): Likewise.
13476 (vreinterpretq_s8_s64): Likewise.
13477 (vreinterpretq_s8_u16): Likewise.
13478 (vreinterpretq_s8_u32): Likewise.
13479 (vreinterpretq_s8_u64): Likewise.
13480 (vreinterpretq_s8_u8): Likewise.
13481 (vreinterpretq_u16_s16): Likewise.
13482 (vreinterpretq_u16_s32): Likewise.
13483 (vreinterpretq_u16_s64): Likewise.
13484 (vreinterpretq_u16_s8): Likewise.
13485 (vreinterpretq_u16_u32): Likewise.
13486 (vreinterpretq_u16_u64): Likewise.
13487 (vreinterpretq_u16_u8): Likewise.
13488 (vreinterpretq_u32_s16): Likewise.
13489 (vreinterpretq_u32_s32): Likewise.
13490 (vreinterpretq_u32_s64): Likewise.
13491 (vreinterpretq_u32_s8): Likewise.
13492 (vreinterpretq_u32_u16): Likewise.
13493 (vreinterpretq_u32_u64): Likewise.
13494 (vreinterpretq_u32_u8): Likewise.
13495 (vreinterpretq_u64_s16): Likewise.
13496 (vreinterpretq_u64_s32): Likewise.
13497 (vreinterpretq_u64_s64): Likewise.
13498 (vreinterpretq_u64_s8): Likewise.
13499 (vreinterpretq_u64_u16): Likewise.
13500 (vreinterpretq_u64_u32): Likewise.
13501 (vreinterpretq_u64_u8): Likewise.
13502 (vreinterpretq_u8_s16): Likewise.
13503 (vreinterpretq_u8_s32): Likewise.
13504 (vreinterpretq_u8_s64): Likewise.
13505 (vreinterpretq_u8_s8): Likewise.
13506 (vreinterpretq_u8_u16): Likewise.
13507 (vreinterpretq_u8_u32): Likewise.
13508 (vreinterpretq_u8_u64): Likewise.
13509 (vreinterpretq_s32_f16): Likewise.
13510 (vreinterpretq_s32_f32): Likewise.
13511 (vreinterpretq_u16_f16): Likewise.
13512 (vreinterpretq_u16_f32): Likewise.
13513 (vreinterpretq_u32_f16): Likewise.
13514 (vreinterpretq_u32_f32): Likewise.
13515 (vreinterpretq_u64_f16): Likewise.
13516 (vreinterpretq_u64_f32): Likewise.
13517 (vreinterpretq_u8_f16): Likewise.
13518 (vreinterpretq_u8_f32): Likewise.
13519 (vreinterpretq_f16_f32): Likewise.
13520 (vreinterpretq_f16_s16): Likewise.
13521 (vreinterpretq_f16_s32): Likewise.
13522 (vreinterpretq_f16_s64): Likewise.
13523 (vreinterpretq_f16_s8): Likewise.
13524 (vreinterpretq_f16_u16): Likewise.
13525 (vreinterpretq_f16_u32): Likewise.
13526 (vreinterpretq_f16_u64): Likewise.
13527 (vreinterpretq_f16_u8): Likewise.
13528 (vreinterpretq_f32_f16): Likewise.
13529 (vreinterpretq_f32_s16): Likewise.
13530 (vreinterpretq_f32_s32): Likewise.
13531 (vreinterpretq_f32_s64): Likewise.
13532 (vreinterpretq_f32_s8): Likewise.
13533 (vreinterpretq_f32_u16): Likewise.
13534 (vreinterpretq_f32_u32): Likewise.
13535 (vreinterpretq_f32_u64): Likewise.
13536 (vreinterpretq_f32_u8): Likewise.
13537 (vreinterpretq_s16_f16): Likewise.
13538 (vreinterpretq_s16_f32): Likewise.
13539 (vreinterpretq_s64_f16): Likewise.
13540 (vreinterpretq_s64_f32): Likewise.
13541 (vreinterpretq_s8_f16): Likewise.
13542 (vreinterpretq_s8_f32): Likewise.
13543 (vuninitializedq_u8): Likewise.
13544 (vuninitializedq_u16): Likewise.
13545 (vuninitializedq_u32): Likewise.
13546 (vuninitializedq_u64): Likewise.
13547 (vuninitializedq_s8): Likewise.
13548 (vuninitializedq_s16): Likewise.
13549 (vuninitializedq_s32): Likewise.
13550 (vuninitializedq_s64): Likewise.
13551 (vuninitializedq_f16): Likewise.
13552 (vuninitializedq_f32): Likewise.
13553 (__arm_vuninitializedq_u8): Define intrinsic.
13554 (__arm_vuninitializedq_u16): Likewise.
13555 (__arm_vuninitializedq_u32): Likewise.
13556 (__arm_vuninitializedq_u64): Likewise.
13557 (__arm_vuninitializedq_s8): Likewise.
13558 (__arm_vuninitializedq_s16): Likewise.
13559 (__arm_vuninitializedq_s32): Likewise.
13560 (__arm_vuninitializedq_s64): Likewise.
13561 (__arm_vreinterpretq_s16_s32): Likewise.
13562 (__arm_vreinterpretq_s16_s64): Likewise.
13563 (__arm_vreinterpretq_s16_s8): Likewise.
13564 (__arm_vreinterpretq_s16_u16): Likewise.
13565 (__arm_vreinterpretq_s16_u32): Likewise.
13566 (__arm_vreinterpretq_s16_u64): Likewise.
13567 (__arm_vreinterpretq_s16_u8): Likewise.
13568 (__arm_vreinterpretq_s32_s16): Likewise.
13569 (__arm_vreinterpretq_s32_s64): Likewise.
13570 (__arm_vreinterpretq_s32_s8): Likewise.
13571 (__arm_vreinterpretq_s32_u16): Likewise.
13572 (__arm_vreinterpretq_s32_u32): Likewise.
13573 (__arm_vreinterpretq_s32_u64): Likewise.
13574 (__arm_vreinterpretq_s32_u8): Likewise.
13575 (__arm_vreinterpretq_s64_s16): Likewise.
13576 (__arm_vreinterpretq_s64_s32): Likewise.
13577 (__arm_vreinterpretq_s64_s8): Likewise.
13578 (__arm_vreinterpretq_s64_u16): Likewise.
13579 (__arm_vreinterpretq_s64_u32): Likewise.
13580 (__arm_vreinterpretq_s64_u64): Likewise.
13581 (__arm_vreinterpretq_s64_u8): Likewise.
13582 (__arm_vreinterpretq_s8_s16): Likewise.
13583 (__arm_vreinterpretq_s8_s32): Likewise.
13584 (__arm_vreinterpretq_s8_s64): Likewise.
13585 (__arm_vreinterpretq_s8_u16): Likewise.
13586 (__arm_vreinterpretq_s8_u32): Likewise.
13587 (__arm_vreinterpretq_s8_u64): Likewise.
13588 (__arm_vreinterpretq_s8_u8): Likewise.
13589 (__arm_vreinterpretq_u16_s16): Likewise.
13590 (__arm_vreinterpretq_u16_s32): Likewise.
13591 (__arm_vreinterpretq_u16_s64): Likewise.
13592 (__arm_vreinterpretq_u16_s8): Likewise.
13593 (__arm_vreinterpretq_u16_u32): Likewise.
13594 (__arm_vreinterpretq_u16_u64): Likewise.
13595 (__arm_vreinterpretq_u16_u8): Likewise.
13596 (__arm_vreinterpretq_u32_s16): Likewise.
13597 (__arm_vreinterpretq_u32_s32): Likewise.
13598 (__arm_vreinterpretq_u32_s64): Likewise.
13599 (__arm_vreinterpretq_u32_s8): Likewise.
13600 (__arm_vreinterpretq_u32_u16): Likewise.
13601 (__arm_vreinterpretq_u32_u64): Likewise.
13602 (__arm_vreinterpretq_u32_u8): Likewise.
13603 (__arm_vreinterpretq_u64_s16): Likewise.
13604 (__arm_vreinterpretq_u64_s32): Likewise.
13605 (__arm_vreinterpretq_u64_s64): Likewise.
13606 (__arm_vreinterpretq_u64_s8): Likewise.
13607 (__arm_vreinterpretq_u64_u16): Likewise.
13608 (__arm_vreinterpretq_u64_u32): Likewise.
13609 (__arm_vreinterpretq_u64_u8): Likewise.
13610 (__arm_vreinterpretq_u8_s16): Likewise.
13611 (__arm_vreinterpretq_u8_s32): Likewise.
13612 (__arm_vreinterpretq_u8_s64): Likewise.
13613 (__arm_vreinterpretq_u8_s8): Likewise.
13614 (__arm_vreinterpretq_u8_u16): Likewise.
13615 (__arm_vreinterpretq_u8_u32): Likewise.
13616 (__arm_vreinterpretq_u8_u64): Likewise.
13617 (__arm_vuninitializedq_f16): Likewise.
13618 (__arm_vuninitializedq_f32): Likewise.
13619 (__arm_vreinterpretq_s32_f16): Likewise.
13620 (__arm_vreinterpretq_s32_f32): Likewise.
13621 (__arm_vreinterpretq_s16_f16): Likewise.
13622 (__arm_vreinterpretq_s16_f32): Likewise.
13623 (__arm_vreinterpretq_s64_f16): Likewise.
13624 (__arm_vreinterpretq_s64_f32): Likewise.
13625 (__arm_vreinterpretq_s8_f16): Likewise.
13626 (__arm_vreinterpretq_s8_f32): Likewise.
13627 (__arm_vreinterpretq_u16_f16): Likewise.
13628 (__arm_vreinterpretq_u16_f32): Likewise.
13629 (__arm_vreinterpretq_u32_f16): Likewise.
13630 (__arm_vreinterpretq_u32_f32): Likewise.
13631 (__arm_vreinterpretq_u64_f16): Likewise.
13632 (__arm_vreinterpretq_u64_f32): Likewise.
13633 (__arm_vreinterpretq_u8_f16): Likewise.
13634 (__arm_vreinterpretq_u8_f32): Likewise.
13635 (__arm_vreinterpretq_f16_f32): Likewise.
13636 (__arm_vreinterpretq_f16_s16): Likewise.
13637 (__arm_vreinterpretq_f16_s32): Likewise.
13638 (__arm_vreinterpretq_f16_s64): Likewise.
13639 (__arm_vreinterpretq_f16_s8): Likewise.
13640 (__arm_vreinterpretq_f16_u16): Likewise.
13641 (__arm_vreinterpretq_f16_u32): Likewise.
13642 (__arm_vreinterpretq_f16_u64): Likewise.
13643 (__arm_vreinterpretq_f16_u8): Likewise.
13644 (__arm_vreinterpretq_f32_f16): Likewise.
13645 (__arm_vreinterpretq_f32_s16): Likewise.
13646 (__arm_vreinterpretq_f32_s32): Likewise.
13647 (__arm_vreinterpretq_f32_s64): Likewise.
13648 (__arm_vreinterpretq_f32_s8): Likewise.
13649 (__arm_vreinterpretq_f32_u16): Likewise.
13650 (__arm_vreinterpretq_f32_u32): Likewise.
13651 (__arm_vreinterpretq_f32_u64): Likewise.
13652 (__arm_vreinterpretq_f32_u8): Likewise.
13653 (vuninitializedq): Define polymorphic variant.
13654 (vreinterpretq_f16): Likewise.
13655 (vreinterpretq_f32): Likewise.
13656 (vreinterpretq_s16): Likewise.
13657 (vreinterpretq_s32): Likewise.
13658 (vreinterpretq_s64): Likewise.
13659 (vreinterpretq_s8): Likewise.
13660 (vreinterpretq_u16): Likewise.
13661 (vreinterpretq_u32): Likewise.
13662 (vreinterpretq_u64): Likewise.
13663 (vreinterpretq_u8): Likewise.
13665 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13666 Andre Vieira <andre.simoesdiasvieira@arm.com>
13667 Mihail Ionescu <mihail.ionescu@arm.com>
13669 * config/arm/arm_mve.h (vaddq_s8): Define macro.
13670 (vaddq_s16): Likewise.
13671 (vaddq_s32): Likewise.
13672 (vaddq_u8): Likewise.
13673 (vaddq_u16): Likewise.
13674 (vaddq_u32): Likewise.
13675 (vaddq_f16): Likewise.
13676 (vaddq_f32): Likewise.
13677 (__arm_vaddq_s8): Define intrinsic.
13678 (__arm_vaddq_s16): Likewise.
13679 (__arm_vaddq_s32): Likewise.
13680 (__arm_vaddq_u8): Likewise.
13681 (__arm_vaddq_u16): Likewise.
13682 (__arm_vaddq_u32): Likewise.
13683 (__arm_vaddq_f16): Likewise.
13684 (__arm_vaddq_f32): Likewise.
13685 (vaddq): Define polymorphic variant.
13686 * config/arm/iterators.md (VNIM): Define mode iterator for common types
13687 Neon, IWMMXT and MVE.
13688 (VNINOTM): Likewise.
13689 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
13690 (mve_vaddq_f<mode>): Define RTL pattern.
13691 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
13692 (addv8hf3_neon): Define RTL pattern.
13693 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
13695 (addv8hf3): Define standard RTL pattern for MVE and Neon.
13696 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
13698 2020-03-20 Martin Liska <mliska@suse.cz>
13701 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
13702 build_ref_for_offset function was used and it transforms off to bytes
13705 2020-03-20 Richard Biener <rguenther@suse.de>
13707 PR tree-optimization/94266
13708 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
13709 type of the underlying object to adjust for the containing
13710 field if available.
13712 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
13714 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
13715 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
13716 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
13718 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
13720 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
13722 2020-03-20 Jakub Jelinek <jakub@redhat.com>
13724 PR tree-optimization/94224
13725 * gimple-ssa-store-merging.c
13726 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
13727 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
13730 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
13732 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
13734 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
13737 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
13738 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
13740 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
13743 * cgraphunit.c (process_function_and_variable_attributes): warn
13744 for flatten attribute on alias.
13745 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
13747 2020-03-19 Martin Liska <mliska@suse.cz>
13749 * lto-section-in.c: Add ext_symtab.
13750 * lto-streamer-out.c (write_symbol_extension_info): New.
13751 (produce_symtab_extension): New.
13752 (produce_asm_for_decls): Stream also produce_symtab_extension.
13753 * lto-streamer.h (enum lto_section_type): New section.
13755 2020-03-19 Jakub Jelinek <jakub@redhat.com>
13757 PR tree-optimization/94211
13758 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
13759 instead of estimate_num_insns for bb_seq (middle_bb). Rename
13760 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
13763 2020-03-19 Richard Biener <rguenther@suse.de>
13766 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
13767 and build_ref_for_offset.
13769 2020-03-19 Richard Biener <rguenther@suse.de>
13771 PR middle-end/94216
13772 * fold-const.c (fold_binary_loc): Avoid using
13773 build_fold_addr_expr when we really want an ADDR_EXPR.
13775 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
13777 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
13780 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
13782 PR rtl-optimization/90275
13783 * cse.c (cse_insn): Delete no-op register moves too.
13785 2020-03-18 Martin Sebor <msebor@redhat.com>
13788 * cgraphunit.c (process_function_and_variable_attributes): Also
13789 complain about weakref function definitions and drop all effects
13792 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13793 Mihail Ionescu <mihail.ionescu@arm.com>
13794 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13796 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
13797 (vstrdq_scatter_base_p_u64): Likewise.
13798 (vstrdq_scatter_base_s64): Likewise.
13799 (vstrdq_scatter_base_u64): Likewise.
13800 (vstrdq_scatter_offset_p_s64): Likewise.
13801 (vstrdq_scatter_offset_p_u64): Likewise.
13802 (vstrdq_scatter_offset_s64): Likewise.
13803 (vstrdq_scatter_offset_u64): Likewise.
13804 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
13805 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
13806 (vstrdq_scatter_shifted_offset_s64): Likewise.
13807 (vstrdq_scatter_shifted_offset_u64): Likewise.
13808 (vstrhq_scatter_offset_f16): Likewise.
13809 (vstrhq_scatter_offset_p_f16): Likewise.
13810 (vstrhq_scatter_shifted_offset_f16): Likewise.
13811 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
13812 (vstrwq_scatter_base_f32): Likewise.
13813 (vstrwq_scatter_base_p_f32): Likewise.
13814 (vstrwq_scatter_offset_f32): Likewise.
13815 (vstrwq_scatter_offset_p_f32): Likewise.
13816 (vstrwq_scatter_offset_p_s32): Likewise.
13817 (vstrwq_scatter_offset_p_u32): Likewise.
13818 (vstrwq_scatter_offset_s32): Likewise.
13819 (vstrwq_scatter_offset_u32): Likewise.
13820 (vstrwq_scatter_shifted_offset_f32): Likewise.
13821 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
13822 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
13823 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
13824 (vstrwq_scatter_shifted_offset_s32): Likewise.
13825 (vstrwq_scatter_shifted_offset_u32): Likewise.
13826 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
13827 (__arm_vstrdq_scatter_base_p_u64): Likewise.
13828 (__arm_vstrdq_scatter_base_s64): Likewise.
13829 (__arm_vstrdq_scatter_base_u64): Likewise.
13830 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
13831 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
13832 (__arm_vstrdq_scatter_offset_s64): Likewise.
13833 (__arm_vstrdq_scatter_offset_u64): Likewise.
13834 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
13835 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
13836 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
13837 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
13838 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
13839 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
13840 (__arm_vstrwq_scatter_offset_s32): Likewise.
13841 (__arm_vstrwq_scatter_offset_u32): Likewise.
13842 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
13843 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
13844 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
13845 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
13846 (__arm_vstrhq_scatter_offset_f16): Likewise.
13847 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
13848 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
13849 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
13850 (__arm_vstrwq_scatter_base_f32): Likewise.
13851 (__arm_vstrwq_scatter_base_p_f32): Likewise.
13852 (__arm_vstrwq_scatter_offset_f32): Likewise.
13853 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
13854 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
13855 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
13856 (vstrhq_scatter_offset): Define polymorphic variant.
13857 (vstrhq_scatter_offset_p): Likewise.
13858 (vstrhq_scatter_shifted_offset): Likewise.
13859 (vstrhq_scatter_shifted_offset_p): Likewise.
13860 (vstrwq_scatter_base): Likewise.
13861 (vstrwq_scatter_base_p): Likewise.
13862 (vstrwq_scatter_offset): Likewise.
13863 (vstrwq_scatter_offset_p): Likewise.
13864 (vstrwq_scatter_shifted_offset): Likewise.
13865 (vstrwq_scatter_shifted_offset_p): Likewise.
13866 (vstrdq_scatter_base_p): Likewise.
13867 (vstrdq_scatter_base): Likewise.
13868 (vstrdq_scatter_offset_p): Likewise.
13869 (vstrdq_scatter_offset): Likewise.
13870 (vstrdq_scatter_shifted_offset_p): Likewise.
13871 (vstrdq_scatter_shifted_offset): Likewise.
13872 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
13873 (STRSBS_P): Likewise.
13874 (STRSBU): Likewise.
13875 (STRSBU_P): Likewise.
13877 (STRSS_P): Likewise.
13879 (STRSU_P): Likewise.
13880 * config/arm/constraints.md (Ri): Define.
13881 * config/arm/mve.md (VSTRDSBQ): Define iterator.
13882 (VSTRDSOQ): Likewise.
13883 (VSTRDSSOQ): Likewise.
13884 (VSTRWSOQ): Likewise.
13885 (VSTRWSSOQ): Likewise.
13886 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
13887 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
13888 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
13889 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
13890 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
13891 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
13892 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
13893 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
13894 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
13895 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
13896 (mve_vstrwq_scatter_base_fv4sf): Likewise.
13897 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
13898 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
13899 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
13900 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
13901 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
13902 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
13903 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
13904 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
13905 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
13906 * config/arm/predicates.md (Ri): Define predicate to check immediate
13907 is the range +/-1016 and multiple of 8.
13909 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13910 Mihail Ionescu <mihail.ionescu@arm.com>
13911 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13913 * config/arm/arm_mve.h (vst1q_f32): Define macro.
13914 (vst1q_f16): Likewise.
13915 (vst1q_s8): Likewise.
13916 (vst1q_s32): Likewise.
13917 (vst1q_s16): Likewise.
13918 (vst1q_u8): Likewise.
13919 (vst1q_u32): Likewise.
13920 (vst1q_u16): Likewise.
13921 (vstrhq_f16): Likewise.
13922 (vstrhq_scatter_offset_s32): Likewise.
13923 (vstrhq_scatter_offset_s16): Likewise.
13924 (vstrhq_scatter_offset_u32): Likewise.
13925 (vstrhq_scatter_offset_u16): Likewise.
13926 (vstrhq_scatter_offset_p_s32): Likewise.
13927 (vstrhq_scatter_offset_p_s16): Likewise.
13928 (vstrhq_scatter_offset_p_u32): Likewise.
13929 (vstrhq_scatter_offset_p_u16): Likewise.
13930 (vstrhq_scatter_shifted_offset_s32): Likewise.
13931 (vstrhq_scatter_shifted_offset_s16): Likewise.
13932 (vstrhq_scatter_shifted_offset_u32): Likewise.
13933 (vstrhq_scatter_shifted_offset_u16): Likewise.
13934 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
13935 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
13936 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
13937 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
13938 (vstrhq_s32): Likewise.
13939 (vstrhq_s16): Likewise.
13940 (vstrhq_u32): Likewise.
13941 (vstrhq_u16): Likewise.
13942 (vstrhq_p_f16): Likewise.
13943 (vstrhq_p_s32): Likewise.
13944 (vstrhq_p_s16): Likewise.
13945 (vstrhq_p_u32): Likewise.
13946 (vstrhq_p_u16): Likewise.
13947 (vstrwq_f32): Likewise.
13948 (vstrwq_s32): Likewise.
13949 (vstrwq_u32): Likewise.
13950 (vstrwq_p_f32): Likewise.
13951 (vstrwq_p_s32): Likewise.
13952 (vstrwq_p_u32): Likewise.
13953 (__arm_vst1q_s8): Define intrinsic.
13954 (__arm_vst1q_s32): Likewise.
13955 (__arm_vst1q_s16): Likewise.
13956 (__arm_vst1q_u8): Likewise.
13957 (__arm_vst1q_u32): Likewise.
13958 (__arm_vst1q_u16): Likewise.
13959 (__arm_vstrhq_scatter_offset_s32): Likewise.
13960 (__arm_vstrhq_scatter_offset_s16): Likewise.
13961 (__arm_vstrhq_scatter_offset_u32): Likewise.
13962 (__arm_vstrhq_scatter_offset_u16): Likewise.
13963 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
13964 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
13965 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
13966 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
13967 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
13968 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
13969 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
13970 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
13971 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
13972 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
13973 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
13974 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
13975 (__arm_vstrhq_s32): Likewise.
13976 (__arm_vstrhq_s16): Likewise.
13977 (__arm_vstrhq_u32): Likewise.
13978 (__arm_vstrhq_u16): Likewise.
13979 (__arm_vstrhq_p_s32): Likewise.
13980 (__arm_vstrhq_p_s16): Likewise.
13981 (__arm_vstrhq_p_u32): Likewise.
13982 (__arm_vstrhq_p_u16): Likewise.
13983 (__arm_vstrwq_s32): Likewise.
13984 (__arm_vstrwq_u32): Likewise.
13985 (__arm_vstrwq_p_s32): Likewise.
13986 (__arm_vstrwq_p_u32): Likewise.
13987 (__arm_vstrwq_p_f32): Likewise.
13988 (__arm_vstrwq_f32): Likewise.
13989 (__arm_vst1q_f32): Likewise.
13990 (__arm_vst1q_f16): Likewise.
13991 (__arm_vstrhq_f16): Likewise.
13992 (__arm_vstrhq_p_f16): Likewise.
13993 (vst1q): Define polymorphic variant.
13994 (vstrhq): Likewise.
13995 (vstrhq_p): Likewise.
13996 (vstrhq_scatter_offset_p): Likewise.
13997 (vstrhq_scatter_offset): Likewise.
13998 (vstrhq_scatter_shifted_offset_p): Likewise.
13999 (vstrhq_scatter_shifted_offset): Likewise.
14000 (vstrwq_p): Likewise.
14001 (vstrwq): Likewise.
14002 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
14003 (STRS_P): Likewise.
14005 (STRSS_P): Likewise.
14007 (STRSU_P): Likewise.
14009 (STRU_P): Likewise.
14010 * config/arm/mve.md (VST1Q): Define iterator.
14011 (VSTRHSOQ): Likewise.
14012 (VSTRHSSOQ): Likewise.
14013 (VSTRHQ): Likewise.
14014 (VSTRWQ): Likewise.
14015 (mve_vstrhq_fv8hf): Define RTL pattern.
14016 (mve_vstrhq_p_fv8hf): Likewise.
14017 (mve_vstrhq_p_<supf><mode>): Likewise.
14018 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
14019 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
14020 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
14021 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
14022 (mve_vstrhq_<supf><mode>): Likewise.
14023 (mve_vstrwq_fv4sf): Likewise.
14024 (mve_vstrwq_p_fv4sf): Likewise.
14025 (mve_vstrwq_p_<supf>v4si): Likewise.
14026 (mve_vstrwq_<supf>v4si): Likewise.
14027 (mve_vst1q_f<mode>): Define expand.
14028 (mve_vst1q_<supf><mode>): Likewise.
14030 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14031 Mihail Ionescu <mihail.ionescu@arm.com>
14032 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14034 * config/arm/arm_mve.h (vld1q_s8): Define macro.
14035 (vld1q_s32): Likewise.
14036 (vld1q_s16): Likewise.
14037 (vld1q_u8): Likewise.
14038 (vld1q_u32): Likewise.
14039 (vld1q_u16): Likewise.
14040 (vldrhq_gather_offset_s32): Likewise.
14041 (vldrhq_gather_offset_s16): Likewise.
14042 (vldrhq_gather_offset_u32): Likewise.
14043 (vldrhq_gather_offset_u16): Likewise.
14044 (vldrhq_gather_offset_z_s32): Likewise.
14045 (vldrhq_gather_offset_z_s16): Likewise.
14046 (vldrhq_gather_offset_z_u32): Likewise.
14047 (vldrhq_gather_offset_z_u16): Likewise.
14048 (vldrhq_gather_shifted_offset_s32): Likewise.
14049 (vldrhq_gather_shifted_offset_s16): Likewise.
14050 (vldrhq_gather_shifted_offset_u32): Likewise.
14051 (vldrhq_gather_shifted_offset_u16): Likewise.
14052 (vldrhq_gather_shifted_offset_z_s32): Likewise.
14053 (vldrhq_gather_shifted_offset_z_s16): Likewise.
14054 (vldrhq_gather_shifted_offset_z_u32): Likewise.
14055 (vldrhq_gather_shifted_offset_z_u16): Likewise.
14056 (vldrhq_s32): Likewise.
14057 (vldrhq_s16): Likewise.
14058 (vldrhq_u32): Likewise.
14059 (vldrhq_u16): Likewise.
14060 (vldrhq_z_s32): Likewise.
14061 (vldrhq_z_s16): Likewise.
14062 (vldrhq_z_u32): Likewise.
14063 (vldrhq_z_u16): Likewise.
14064 (vldrwq_s32): Likewise.
14065 (vldrwq_u32): Likewise.
14066 (vldrwq_z_s32): Likewise.
14067 (vldrwq_z_u32): Likewise.
14068 (vld1q_f32): Likewise.
14069 (vld1q_f16): Likewise.
14070 (vldrhq_f16): Likewise.
14071 (vldrhq_z_f16): Likewise.
14072 (vldrwq_f32): Likewise.
14073 (vldrwq_z_f32): Likewise.
14074 (__arm_vld1q_s8): Define intrinsic.
14075 (__arm_vld1q_s32): Likewise.
14076 (__arm_vld1q_s16): Likewise.
14077 (__arm_vld1q_u8): Likewise.
14078 (__arm_vld1q_u32): Likewise.
14079 (__arm_vld1q_u16): Likewise.
14080 (__arm_vldrhq_gather_offset_s32): Likewise.
14081 (__arm_vldrhq_gather_offset_s16): Likewise.
14082 (__arm_vldrhq_gather_offset_u32): Likewise.
14083 (__arm_vldrhq_gather_offset_u16): Likewise.
14084 (__arm_vldrhq_gather_offset_z_s32): Likewise.
14085 (__arm_vldrhq_gather_offset_z_s16): Likewise.
14086 (__arm_vldrhq_gather_offset_z_u32): Likewise.
14087 (__arm_vldrhq_gather_offset_z_u16): Likewise.
14088 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
14089 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
14090 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
14091 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
14092 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
14093 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
14094 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
14095 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
14096 (__arm_vldrhq_s32): Likewise.
14097 (__arm_vldrhq_s16): Likewise.
14098 (__arm_vldrhq_u32): Likewise.
14099 (__arm_vldrhq_u16): Likewise.
14100 (__arm_vldrhq_z_s32): Likewise.
14101 (__arm_vldrhq_z_s16): Likewise.
14102 (__arm_vldrhq_z_u32): Likewise.
14103 (__arm_vldrhq_z_u16): Likewise.
14104 (__arm_vldrwq_s32): Likewise.
14105 (__arm_vldrwq_u32): Likewise.
14106 (__arm_vldrwq_z_s32): Likewise.
14107 (__arm_vldrwq_z_u32): Likewise.
14108 (__arm_vld1q_f32): Likewise.
14109 (__arm_vld1q_f16): Likewise.
14110 (__arm_vldrwq_f32): Likewise.
14111 (__arm_vldrwq_z_f32): Likewise.
14112 (__arm_vldrhq_z_f16): Likewise.
14113 (__arm_vldrhq_f16): Likewise.
14114 (vld1q): Define polymorphic variant.
14115 (vldrhq_gather_offset): Likewise.
14116 (vldrhq_gather_offset_z): Likewise.
14117 (vldrhq_gather_shifted_offset): Likewise.
14118 (vldrhq_gather_shifted_offset_z): Likewise.
14119 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
14121 (LDRU_Z): Likewise.
14122 (LDRS_Z): Likewise.
14123 (LDRGU_Z): Likewise.
14125 (LDRGS_Z): Likewise.
14127 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
14128 (V_sz_elem1): Likewise.
14129 (VLD1Q): Define iterator.
14130 (VLDRHGOQ): Likewise.
14131 (VLDRHGSOQ): Likewise.
14132 (VLDRHQ): Likewise.
14133 (VLDRWQ): Likewise.
14134 (mve_vldrhq_fv8hf): Define RTL pattern.
14135 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
14136 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
14137 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
14138 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
14139 (mve_vldrhq_<supf><mode>): Likewise.
14140 (mve_vldrhq_z_fv8hf): Likewise.
14141 (mve_vldrhq_z_<supf><mode>): Likewise.
14142 (mve_vldrwq_fv4sf): Likewise.
14143 (mve_vldrwq_<supf>v4si): Likewise.
14144 (mve_vldrwq_z_fv4sf): Likewise.
14145 (mve_vldrwq_z_<supf>v4si): Likewise.
14146 (mve_vld1q_f<mode>): Define RTL expand pattern.
14147 (mve_vld1q_<supf><mode>): Likewise.
14149 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14150 Mihail Ionescu <mihail.ionescu@arm.com>
14151 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14153 * config/arm/arm_mve.h (vld1q_s8): Define macro.
14154 (vld1q_s32): Likewise.
14155 (vld1q_s16): Likewise.
14156 (vld1q_u8): Likewise.
14157 (vld1q_u32): Likewise.
14158 (vld1q_u16): Likewise.
14159 (vldrhq_gather_offset_s32): Likewise.
14160 (vldrhq_gather_offset_s16): Likewise.
14161 (vldrhq_gather_offset_u32): Likewise.
14162 (vldrhq_gather_offset_u16): Likewise.
14163 (vldrhq_gather_offset_z_s32): Likewise.
14164 (vldrhq_gather_offset_z_s16): Likewise.
14165 (vldrhq_gather_offset_z_u32): Likewise.
14166 (vldrhq_gather_offset_z_u16): Likewise.
14167 (vldrhq_gather_shifted_offset_s32): Likewise.
14168 (vldrhq_gather_shifted_offset_s16): Likewise.
14169 (vldrhq_gather_shifted_offset_u32): Likewise.
14170 (vldrhq_gather_shifted_offset_u16): Likewise.
14171 (vldrhq_gather_shifted_offset_z_s32): Likewise.
14172 (vldrhq_gather_shifted_offset_z_s16): Likewise.
14173 (vldrhq_gather_shifted_offset_z_u32): Likewise.
14174 (vldrhq_gather_shifted_offset_z_u16): Likewise.
14175 (vldrhq_s32): Likewise.
14176 (vldrhq_s16): Likewise.
14177 (vldrhq_u32): Likewise.
14178 (vldrhq_u16): Likewise.
14179 (vldrhq_z_s32): Likewise.
14180 (vldrhq_z_s16): Likewise.
14181 (vldrhq_z_u32): Likewise.
14182 (vldrhq_z_u16): Likewise.
14183 (vldrwq_s32): Likewise.
14184 (vldrwq_u32): Likewise.
14185 (vldrwq_z_s32): Likewise.
14186 (vldrwq_z_u32): Likewise.
14187 (vld1q_f32): Likewise.
14188 (vld1q_f16): Likewise.
14189 (vldrhq_f16): Likewise.
14190 (vldrhq_z_f16): Likewise.
14191 (vldrwq_f32): Likewise.
14192 (vldrwq_z_f32): Likewise.
14193 (__arm_vld1q_s8): Define intrinsic.
14194 (__arm_vld1q_s32): Likewise.
14195 (__arm_vld1q_s16): Likewise.
14196 (__arm_vld1q_u8): Likewise.
14197 (__arm_vld1q_u32): Likewise.
14198 (__arm_vld1q_u16): Likewise.
14199 (__arm_vldrhq_gather_offset_s32): Likewise.
14200 (__arm_vldrhq_gather_offset_s16): Likewise.
14201 (__arm_vldrhq_gather_offset_u32): Likewise.
14202 (__arm_vldrhq_gather_offset_u16): Likewise.
14203 (__arm_vldrhq_gather_offset_z_s32): Likewise.
14204 (__arm_vldrhq_gather_offset_z_s16): Likewise.
14205 (__arm_vldrhq_gather_offset_z_u32): Likewise.
14206 (__arm_vldrhq_gather_offset_z_u16): Likewise.
14207 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
14208 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
14209 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
14210 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
14211 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
14212 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
14213 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
14214 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
14215 (__arm_vldrhq_s32): Likewise.
14216 (__arm_vldrhq_s16): Likewise.
14217 (__arm_vldrhq_u32): Likewise.
14218 (__arm_vldrhq_u16): Likewise.
14219 (__arm_vldrhq_z_s32): Likewise.
14220 (__arm_vldrhq_z_s16): Likewise.
14221 (__arm_vldrhq_z_u32): Likewise.
14222 (__arm_vldrhq_z_u16): Likewise.
14223 (__arm_vldrwq_s32): Likewise.
14224 (__arm_vldrwq_u32): Likewise.
14225 (__arm_vldrwq_z_s32): Likewise.
14226 (__arm_vldrwq_z_u32): Likewise.
14227 (__arm_vld1q_f32): Likewise.
14228 (__arm_vld1q_f16): Likewise.
14229 (__arm_vldrwq_f32): Likewise.
14230 (__arm_vldrwq_z_f32): Likewise.
14231 (__arm_vldrhq_z_f16): Likewise.
14232 (__arm_vldrhq_f16): Likewise.
14233 (vld1q): Define polymorphic variant.
14234 (vldrhq_gather_offset): Likewise.
14235 (vldrhq_gather_offset_z): Likewise.
14236 (vldrhq_gather_shifted_offset): Likewise.
14237 (vldrhq_gather_shifted_offset_z): Likewise.
14238 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
14240 (LDRU_Z): Likewise.
14241 (LDRS_Z): Likewise.
14242 (LDRGU_Z): Likewise.
14244 (LDRGS_Z): Likewise.
14246 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
14247 (V_sz_elem1): Likewise.
14248 (VLD1Q): Define iterator.
14249 (VLDRHGOQ): Likewise.
14250 (VLDRHGSOQ): Likewise.
14251 (VLDRHQ): Likewise.
14252 (VLDRWQ): Likewise.
14253 (mve_vldrhq_fv8hf): Define RTL pattern.
14254 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
14255 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
14256 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
14257 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
14258 (mve_vldrhq_<supf><mode>): Likewise.
14259 (mve_vldrhq_z_fv8hf): Likewise.
14260 (mve_vldrhq_z_<supf><mode>): Likewise.
14261 (mve_vldrwq_fv4sf): Likewise.
14262 (mve_vldrwq_<supf>v4si): Likewise.
14263 (mve_vldrwq_z_fv4sf): Likewise.
14264 (mve_vldrwq_z_<supf>v4si): Likewise.
14265 (mve_vld1q_f<mode>): Define RTL expand pattern.
14266 (mve_vld1q_<supf><mode>): Likewise.
14268 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14269 Mihail Ionescu <mihail.ionescu@arm.com>
14270 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14272 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
14274 (LDRGBU_Z_QUALIFIERS): Likewise.
14275 (LDRGS_Z_QUALIFIERS): Likewise.
14276 (LDRGU_Z_QUALIFIERS): Likewise.
14277 (LDRS_Z_QUALIFIERS): Likewise.
14278 (LDRU_Z_QUALIFIERS): Likewise.
14279 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
14280 (vldrbq_gather_offset_z_u8): Likewise.
14281 (vldrbq_gather_offset_z_s32): Likewise.
14282 (vldrbq_gather_offset_z_u16): Likewise.
14283 (vldrbq_gather_offset_z_u32): Likewise.
14284 (vldrbq_gather_offset_z_s8): Likewise.
14285 (vldrbq_z_s16): Likewise.
14286 (vldrbq_z_u8): Likewise.
14287 (vldrbq_z_s8): Likewise.
14288 (vldrbq_z_s32): Likewise.
14289 (vldrbq_z_u16): Likewise.
14290 (vldrbq_z_u32): Likewise.
14291 (vldrwq_gather_base_z_u32): Likewise.
14292 (vldrwq_gather_base_z_s32): Likewise.
14293 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
14294 (__arm_vldrbq_gather_offset_z_s32): Likewise.
14295 (__arm_vldrbq_gather_offset_z_s16): Likewise.
14296 (__arm_vldrbq_gather_offset_z_u8): Likewise.
14297 (__arm_vldrbq_gather_offset_z_u32): Likewise.
14298 (__arm_vldrbq_gather_offset_z_u16): Likewise.
14299 (__arm_vldrbq_z_s8): Likewise.
14300 (__arm_vldrbq_z_s32): Likewise.
14301 (__arm_vldrbq_z_s16): Likewise.
14302 (__arm_vldrbq_z_u8): Likewise.
14303 (__arm_vldrbq_z_u32): Likewise.
14304 (__arm_vldrbq_z_u16): Likewise.
14305 (__arm_vldrwq_gather_base_z_s32): Likewise.
14306 (__arm_vldrwq_gather_base_z_u32): Likewise.
14307 (vldrbq_gather_offset_z): Define polymorphic variant.
14308 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
14310 (LDRGBU_Z_QUALIFIERS): Likewise.
14311 (LDRGS_Z_QUALIFIERS): Likewise.
14312 (LDRGU_Z_QUALIFIERS): Likewise.
14313 (LDRS_Z_QUALIFIERS): Likewise.
14314 (LDRU_Z_QUALIFIERS): Likewise.
14315 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
14317 (mve_vldrbq_z_<supf><mode>): Likewise.
14318 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
14320 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14321 Mihail Ionescu <mihail.ionescu@arm.com>
14322 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14324 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
14326 (STRU_P_QUALIFIERS): Likewise.
14327 (STRSU_P_QUALIFIERS): Likewise.
14328 (STRSS_P_QUALIFIERS): Likewise.
14329 (STRSBS_P_QUALIFIERS): Likewise.
14330 (STRSBU_P_QUALIFIERS): Likewise.
14331 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
14332 (vstrbq_p_s32): Likewise.
14333 (vstrbq_p_s16): Likewise.
14334 (vstrbq_p_u8): Likewise.
14335 (vstrbq_p_u32): Likewise.
14336 (vstrbq_p_u16): Likewise.
14337 (vstrbq_scatter_offset_p_s8): Likewise.
14338 (vstrbq_scatter_offset_p_s32): Likewise.
14339 (vstrbq_scatter_offset_p_s16): Likewise.
14340 (vstrbq_scatter_offset_p_u8): Likewise.
14341 (vstrbq_scatter_offset_p_u32): Likewise.
14342 (vstrbq_scatter_offset_p_u16): Likewise.
14343 (vstrwq_scatter_base_p_s32): Likewise.
14344 (vstrwq_scatter_base_p_u32): Likewise.
14345 (__arm_vstrbq_p_s8): Define intrinsic.
14346 (__arm_vstrbq_p_s32): Likewise.
14347 (__arm_vstrbq_p_s16): Likewise.
14348 (__arm_vstrbq_p_u8): Likewise.
14349 (__arm_vstrbq_p_u32): Likewise.
14350 (__arm_vstrbq_p_u16): Likewise.
14351 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
14352 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
14353 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
14354 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
14355 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
14356 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
14357 (__arm_vstrwq_scatter_base_p_s32): Likewise.
14358 (__arm_vstrwq_scatter_base_p_u32): Likewise.
14359 (vstrbq_p): Define polymorphic variant.
14360 (vstrbq_scatter_offset_p): Likewise.
14361 (vstrwq_scatter_base_p): Likewise.
14362 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
14364 (STRU_P_QUALIFIERS): Likewise.
14365 (STRSU_P_QUALIFIERS): Likewise.
14366 (STRSS_P_QUALIFIERS): Likewise.
14367 (STRSBS_P_QUALIFIERS): Likewise.
14368 (STRSBU_P_QUALIFIERS): Likewise.
14369 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
14371 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
14372 (mve_vstrbq_p_<supf><mode>): Likewise.
14374 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14375 Mihail Ionescu <mihail.ionescu@arm.com>
14376 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14378 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
14380 (LDRGS_QUALIFIERS): Likewise.
14381 (LDRS_QUALIFIERS): Likewise.
14382 (LDRU_QUALIFIERS): Likewise.
14383 (LDRGBS_QUALIFIERS): Likewise.
14384 (LDRGBU_QUALIFIERS): Likewise.
14385 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
14386 (vldrbq_gather_offset_s8): Likewise.
14387 (vldrbq_s8): Likewise.
14388 (vldrbq_u8): Likewise.
14389 (vldrbq_gather_offset_u16): Likewise.
14390 (vldrbq_gather_offset_s16): Likewise.
14391 (vldrbq_s16): Likewise.
14392 (vldrbq_u16): Likewise.
14393 (vldrbq_gather_offset_u32): Likewise.
14394 (vldrbq_gather_offset_s32): Likewise.
14395 (vldrbq_s32): Likewise.
14396 (vldrbq_u32): Likewise.
14397 (vldrwq_gather_base_s32): Likewise.
14398 (vldrwq_gather_base_u32): Likewise.
14399 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
14400 (__arm_vldrbq_gather_offset_s8): Likewise.
14401 (__arm_vldrbq_s8): Likewise.
14402 (__arm_vldrbq_u8): Likewise.
14403 (__arm_vldrbq_gather_offset_u16): Likewise.
14404 (__arm_vldrbq_gather_offset_s16): Likewise.
14405 (__arm_vldrbq_s16): Likewise.
14406 (__arm_vldrbq_u16): Likewise.
14407 (__arm_vldrbq_gather_offset_u32): Likewise.
14408 (__arm_vldrbq_gather_offset_s32): Likewise.
14409 (__arm_vldrbq_s32): Likewise.
14410 (__arm_vldrbq_u32): Likewise.
14411 (__arm_vldrwq_gather_base_s32): Likewise.
14412 (__arm_vldrwq_gather_base_u32): Likewise.
14413 (vldrbq_gather_offset): Define polymorphic variant.
14414 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
14416 (LDRGS_QUALIFIERS): Likewise.
14417 (LDRS_QUALIFIERS): Likewise.
14418 (LDRU_QUALIFIERS): Likewise.
14419 (LDRGBS_QUALIFIERS): Likewise.
14420 (LDRGBU_QUALIFIERS): Likewise.
14421 * config/arm/mve.md (VLDRBGOQ): Define iterator.
14422 (VLDRBQ): Likewise.
14423 (VLDRWGBQ): Likewise.
14424 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
14425 (mve_vldrbq_<supf><mode>): Likewise.
14426 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
14428 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14429 Mihail Ionescu <mihail.ionescu@arm.com>
14430 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14432 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
14433 (STRU_QUALIFIERS): Likewise.
14434 (STRSS_QUALIFIERS): Likewise.
14435 (STRSU_QUALIFIERS): Likewise.
14436 (STRSBS_QUALIFIERS): Likewise.
14437 (STRSBU_QUALIFIERS): Likewise.
14438 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
14439 (vstrbq_u8): Likewise.
14440 (vstrbq_u16): Likewise.
14441 (vstrbq_scatter_offset_s8): Likewise.
14442 (vstrbq_scatter_offset_u8): Likewise.
14443 (vstrbq_scatter_offset_u16): Likewise.
14444 (vstrbq_s16): Likewise.
14445 (vstrbq_u32): Likewise.
14446 (vstrbq_scatter_offset_s16): Likewise.
14447 (vstrbq_scatter_offset_u32): Likewise.
14448 (vstrbq_s32): Likewise.
14449 (vstrbq_scatter_offset_s32): Likewise.
14450 (vstrwq_scatter_base_s32): Likewise.
14451 (vstrwq_scatter_base_u32): Likewise.
14452 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
14453 (__arm_vstrbq_scatter_offset_s32): Likewise.
14454 (__arm_vstrbq_scatter_offset_s16): Likewise.
14455 (__arm_vstrbq_scatter_offset_u8): Likewise.
14456 (__arm_vstrbq_scatter_offset_u32): Likewise.
14457 (__arm_vstrbq_scatter_offset_u16): Likewise.
14458 (__arm_vstrbq_s8): Likewise.
14459 (__arm_vstrbq_s32): Likewise.
14460 (__arm_vstrbq_s16): Likewise.
14461 (__arm_vstrbq_u8): Likewise.
14462 (__arm_vstrbq_u32): Likewise.
14463 (__arm_vstrbq_u16): Likewise.
14464 (__arm_vstrwq_scatter_base_s32): Likewise.
14465 (__arm_vstrwq_scatter_base_u32): Likewise.
14466 (vstrbq): Define polymorphic variant.
14467 (vstrbq_scatter_offset): Likewise.
14468 (vstrwq_scatter_base): Likewise.
14469 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
14471 (STRU_QUALIFIERS): Likewise.
14472 (STRSS_QUALIFIERS): Likewise.
14473 (STRSU_QUALIFIERS): Likewise.
14474 (STRSBS_QUALIFIERS): Likewise.
14475 (STRSBU_QUALIFIERS): Likewise.
14476 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
14477 (VSTRWSBQ): Define iterators.
14478 (VSTRBSOQ): Likewise.
14479 (VSTRBQ): Likewise.
14480 (mve_vstrbq_<supf><mode>): Define RTL pattern.
14481 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
14482 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
14484 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14485 Mihail Ionescu <mihail.ionescu@arm.com>
14486 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14488 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
14489 (vabdq_m_f16): Likewise.
14490 (vaddq_m_f32): Likewise.
14491 (vaddq_m_f16): Likewise.
14492 (vaddq_m_n_f32): Likewise.
14493 (vaddq_m_n_f16): Likewise.
14494 (vandq_m_f32): Likewise.
14495 (vandq_m_f16): Likewise.
14496 (vbicq_m_f32): Likewise.
14497 (vbicq_m_f16): Likewise.
14498 (vbrsrq_m_n_f32): Likewise.
14499 (vbrsrq_m_n_f16): Likewise.
14500 (vcaddq_rot270_m_f32): Likewise.
14501 (vcaddq_rot270_m_f16): Likewise.
14502 (vcaddq_rot90_m_f32): Likewise.
14503 (vcaddq_rot90_m_f16): Likewise.
14504 (vcmlaq_m_f32): Likewise.
14505 (vcmlaq_m_f16): Likewise.
14506 (vcmlaq_rot180_m_f32): Likewise.
14507 (vcmlaq_rot180_m_f16): Likewise.
14508 (vcmlaq_rot270_m_f32): Likewise.
14509 (vcmlaq_rot270_m_f16): Likewise.
14510 (vcmlaq_rot90_m_f32): Likewise.
14511 (vcmlaq_rot90_m_f16): Likewise.
14512 (vcmulq_m_f32): Likewise.
14513 (vcmulq_m_f16): Likewise.
14514 (vcmulq_rot180_m_f32): Likewise.
14515 (vcmulq_rot180_m_f16): Likewise.
14516 (vcmulq_rot270_m_f32): Likewise.
14517 (vcmulq_rot270_m_f16): Likewise.
14518 (vcmulq_rot90_m_f32): Likewise.
14519 (vcmulq_rot90_m_f16): Likewise.
14520 (vcvtq_m_n_s32_f32): Likewise.
14521 (vcvtq_m_n_s16_f16): Likewise.
14522 (vcvtq_m_n_u32_f32): Likewise.
14523 (vcvtq_m_n_u16_f16): Likewise.
14524 (veorq_m_f32): Likewise.
14525 (veorq_m_f16): Likewise.
14526 (vfmaq_m_f32): Likewise.
14527 (vfmaq_m_f16): Likewise.
14528 (vfmaq_m_n_f32): Likewise.
14529 (vfmaq_m_n_f16): Likewise.
14530 (vfmasq_m_n_f32): Likewise.
14531 (vfmasq_m_n_f16): Likewise.
14532 (vfmsq_m_f32): Likewise.
14533 (vfmsq_m_f16): Likewise.
14534 (vmaxnmq_m_f32): Likewise.
14535 (vmaxnmq_m_f16): Likewise.
14536 (vminnmq_m_f32): Likewise.
14537 (vminnmq_m_f16): Likewise.
14538 (vmulq_m_f32): Likewise.
14539 (vmulq_m_f16): Likewise.
14540 (vmulq_m_n_f32): Likewise.
14541 (vmulq_m_n_f16): Likewise.
14542 (vornq_m_f32): Likewise.
14543 (vornq_m_f16): Likewise.
14544 (vorrq_m_f32): Likewise.
14545 (vorrq_m_f16): Likewise.
14546 (vsubq_m_f32): Likewise.
14547 (vsubq_m_f16): Likewise.
14548 (vsubq_m_n_f32): Likewise.
14549 (vsubq_m_n_f16): Likewise.
14550 (__attribute__): Likewise.
14551 (__arm_vabdq_m_f32): Likewise.
14552 (__arm_vabdq_m_f16): Likewise.
14553 (__arm_vaddq_m_f32): Likewise.
14554 (__arm_vaddq_m_f16): Likewise.
14555 (__arm_vaddq_m_n_f32): Likewise.
14556 (__arm_vaddq_m_n_f16): Likewise.
14557 (__arm_vandq_m_f32): Likewise.
14558 (__arm_vandq_m_f16): Likewise.
14559 (__arm_vbicq_m_f32): Likewise.
14560 (__arm_vbicq_m_f16): Likewise.
14561 (__arm_vbrsrq_m_n_f32): Likewise.
14562 (__arm_vbrsrq_m_n_f16): Likewise.
14563 (__arm_vcaddq_rot270_m_f32): Likewise.
14564 (__arm_vcaddq_rot270_m_f16): Likewise.
14565 (__arm_vcaddq_rot90_m_f32): Likewise.
14566 (__arm_vcaddq_rot90_m_f16): Likewise.
14567 (__arm_vcmlaq_m_f32): Likewise.
14568 (__arm_vcmlaq_m_f16): Likewise.
14569 (__arm_vcmlaq_rot180_m_f32): Likewise.
14570 (__arm_vcmlaq_rot180_m_f16): Likewise.
14571 (__arm_vcmlaq_rot270_m_f32): Likewise.
14572 (__arm_vcmlaq_rot270_m_f16): Likewise.
14573 (__arm_vcmlaq_rot90_m_f32): Likewise.
14574 (__arm_vcmlaq_rot90_m_f16): Likewise.
14575 (__arm_vcmulq_m_f32): Likewise.
14576 (__arm_vcmulq_m_f16): Likewise.
14577 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
14578 (__arm_vcmulq_rot180_m_f16): Likewise.
14579 (__arm_vcmulq_rot270_m_f32): Likewise.
14580 (__arm_vcmulq_rot270_m_f16): Likewise.
14581 (__arm_vcmulq_rot90_m_f32): Likewise.
14582 (__arm_vcmulq_rot90_m_f16): Likewise.
14583 (__arm_vcvtq_m_n_s32_f32): Likewise.
14584 (__arm_vcvtq_m_n_s16_f16): Likewise.
14585 (__arm_vcvtq_m_n_u32_f32): Likewise.
14586 (__arm_vcvtq_m_n_u16_f16): Likewise.
14587 (__arm_veorq_m_f32): Likewise.
14588 (__arm_veorq_m_f16): Likewise.
14589 (__arm_vfmaq_m_f32): Likewise.
14590 (__arm_vfmaq_m_f16): Likewise.
14591 (__arm_vfmaq_m_n_f32): Likewise.
14592 (__arm_vfmaq_m_n_f16): Likewise.
14593 (__arm_vfmasq_m_n_f32): Likewise.
14594 (__arm_vfmasq_m_n_f16): Likewise.
14595 (__arm_vfmsq_m_f32): Likewise.
14596 (__arm_vfmsq_m_f16): Likewise.
14597 (__arm_vmaxnmq_m_f32): Likewise.
14598 (__arm_vmaxnmq_m_f16): Likewise.
14599 (__arm_vminnmq_m_f32): Likewise.
14600 (__arm_vminnmq_m_f16): Likewise.
14601 (__arm_vmulq_m_f32): Likewise.
14602 (__arm_vmulq_m_f16): Likewise.
14603 (__arm_vmulq_m_n_f32): Likewise.
14604 (__arm_vmulq_m_n_f16): Likewise.
14605 (__arm_vornq_m_f32): Likewise.
14606 (__arm_vornq_m_f16): Likewise.
14607 (__arm_vorrq_m_f32): Likewise.
14608 (__arm_vorrq_m_f16): Likewise.
14609 (__arm_vsubq_m_f32): Likewise.
14610 (__arm_vsubq_m_f16): Likewise.
14611 (__arm_vsubq_m_n_f32): Likewise.
14612 (__arm_vsubq_m_n_f16): Likewise.
14613 (vabdq_m): Define polymorphic variant.
14614 (vaddq_m): Likewise.
14615 (vaddq_m_n): Likewise.
14616 (vandq_m): Likewise.
14617 (vbicq_m): Likewise.
14618 (vbrsrq_m_n): Likewise.
14619 (vcaddq_rot270_m): Likewise.
14620 (vcaddq_rot90_m): Likewise.
14621 (vcmlaq_m): Likewise.
14622 (vcmlaq_rot180_m): Likewise.
14623 (vcmlaq_rot270_m): Likewise.
14624 (vcmlaq_rot90_m): Likewise.
14625 (vcmulq_m): Likewise.
14626 (vcmulq_rot180_m): Likewise.
14627 (vcmulq_rot270_m): Likewise.
14628 (vcmulq_rot90_m): Likewise.
14629 (veorq_m): Likewise.
14630 (vfmaq_m): Likewise.
14631 (vfmaq_m_n): Likewise.
14632 (vfmasq_m_n): Likewise.
14633 (vfmsq_m): Likewise.
14634 (vmaxnmq_m): Likewise.
14635 (vminnmq_m): Likewise.
14636 (vmulq_m): Likewise.
14637 (vmulq_m_n): Likewise.
14638 (vornq_m): Likewise.
14639 (vsubq_m): Likewise.
14640 (vsubq_m_n): Likewise.
14641 (vorrq_m): Likewise.
14642 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
14644 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
14645 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
14646 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
14647 (mve_vaddq_m_f<mode>): Likewise.
14648 (mve_vaddq_m_n_f<mode>): Likewise.
14649 (mve_vandq_m_f<mode>): Likewise.
14650 (mve_vbicq_m_f<mode>): Likewise.
14651 (mve_vbrsrq_m_n_f<mode>): Likewise.
14652 (mve_vcaddq_rot270_m_f<mode>): Likewise.
14653 (mve_vcaddq_rot90_m_f<mode>): Likewise.
14654 (mve_vcmlaq_m_f<mode>): Likewise.
14655 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
14656 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
14657 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
14658 (mve_vcmulq_m_f<mode>): Likewise.
14659 (mve_vcmulq_rot180_m_f<mode>): Likewise.
14660 (mve_vcmulq_rot270_m_f<mode>): Likewise.
14661 (mve_vcmulq_rot90_m_f<mode>): Likewise.
14662 (mve_veorq_m_f<mode>): Likewise.
14663 (mve_vfmaq_m_f<mode>): Likewise.
14664 (mve_vfmaq_m_n_f<mode>): Likewise.
14665 (mve_vfmasq_m_n_f<mode>): Likewise.
14666 (mve_vfmsq_m_f<mode>): Likewise.
14667 (mve_vmaxnmq_m_f<mode>): Likewise.
14668 (mve_vminnmq_m_f<mode>): Likewise.
14669 (mve_vmulq_m_f<mode>): Likewise.
14670 (mve_vmulq_m_n_f<mode>): Likewise.
14671 (mve_vornq_m_f<mode>): Likewise.
14672 (mve_vorrq_m_f<mode>): Likewise.
14673 (mve_vsubq_m_f<mode>): Likewise.
14674 (mve_vsubq_m_n_f<mode>): Likewise.
14676 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14677 Mihail Ionescu <mihail.ionescu@arm.com>
14678 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14680 * config/arm/arm-protos.h (arm_mve_immediate_check):
14681 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
14682 mode and interger value.
14683 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
14684 (vmlaldavaq_p_s16): Likewise.
14685 (vmlaldavaq_p_u32): Likewise.
14686 (vmlaldavaq_p_u16): Likewise.
14687 (vmlaldavaxq_p_s32): Likewise.
14688 (vmlaldavaxq_p_s16): Likewise.
14689 (vmlaldavaxq_p_u32): Likewise.
14690 (vmlaldavaxq_p_u16): Likewise.
14691 (vmlsldavaq_p_s32): Likewise.
14692 (vmlsldavaq_p_s16): Likewise.
14693 (vmlsldavaxq_p_s32): Likewise.
14694 (vmlsldavaxq_p_s16): Likewise.
14695 (vmullbq_poly_m_p8): Likewise.
14696 (vmullbq_poly_m_p16): Likewise.
14697 (vmulltq_poly_m_p8): Likewise.
14698 (vmulltq_poly_m_p16): Likewise.
14699 (vqdmullbq_m_n_s32): Likewise.
14700 (vqdmullbq_m_n_s16): Likewise.
14701 (vqdmullbq_m_s32): Likewise.
14702 (vqdmullbq_m_s16): Likewise.
14703 (vqdmulltq_m_n_s32): Likewise.
14704 (vqdmulltq_m_n_s16): Likewise.
14705 (vqdmulltq_m_s32): Likewise.
14706 (vqdmulltq_m_s16): Likewise.
14707 (vqrshrnbq_m_n_s32): Likewise.
14708 (vqrshrnbq_m_n_s16): Likewise.
14709 (vqrshrnbq_m_n_u32): Likewise.
14710 (vqrshrnbq_m_n_u16): Likewise.
14711 (vqrshrntq_m_n_s32): Likewise.
14712 (vqrshrntq_m_n_s16): Likewise.
14713 (vqrshrntq_m_n_u32): Likewise.
14714 (vqrshrntq_m_n_u16): Likewise.
14715 (vqrshrunbq_m_n_s32): Likewise.
14716 (vqrshrunbq_m_n_s16): Likewise.
14717 (vqrshruntq_m_n_s32): Likewise.
14718 (vqrshruntq_m_n_s16): Likewise.
14719 (vqshrnbq_m_n_s32): Likewise.
14720 (vqshrnbq_m_n_s16): Likewise.
14721 (vqshrnbq_m_n_u32): Likewise.
14722 (vqshrnbq_m_n_u16): Likewise.
14723 (vqshrntq_m_n_s32): Likewise.
14724 (vqshrntq_m_n_s16): Likewise.
14725 (vqshrntq_m_n_u32): Likewise.
14726 (vqshrntq_m_n_u16): Likewise.
14727 (vqshrunbq_m_n_s32): Likewise.
14728 (vqshrunbq_m_n_s16): Likewise.
14729 (vqshruntq_m_n_s32): Likewise.
14730 (vqshruntq_m_n_s16): Likewise.
14731 (vrmlaldavhaq_p_s32): Likewise.
14732 (vrmlaldavhaq_p_u32): Likewise.
14733 (vrmlaldavhaxq_p_s32): Likewise.
14734 (vrmlsldavhaq_p_s32): Likewise.
14735 (vrmlsldavhaxq_p_s32): Likewise.
14736 (vrshrnbq_m_n_s32): Likewise.
14737 (vrshrnbq_m_n_s16): Likewise.
14738 (vrshrnbq_m_n_u32): Likewise.
14739 (vrshrnbq_m_n_u16): Likewise.
14740 (vrshrntq_m_n_s32): Likewise.
14741 (vrshrntq_m_n_s16): Likewise.
14742 (vrshrntq_m_n_u32): Likewise.
14743 (vrshrntq_m_n_u16): Likewise.
14744 (vshllbq_m_n_s8): Likewise.
14745 (vshllbq_m_n_s16): Likewise.
14746 (vshllbq_m_n_u8): Likewise.
14747 (vshllbq_m_n_u16): Likewise.
14748 (vshlltq_m_n_s8): Likewise.
14749 (vshlltq_m_n_s16): Likewise.
14750 (vshlltq_m_n_u8): Likewise.
14751 (vshlltq_m_n_u16): Likewise.
14752 (vshrnbq_m_n_s32): Likewise.
14753 (vshrnbq_m_n_s16): Likewise.
14754 (vshrnbq_m_n_u32): Likewise.
14755 (vshrnbq_m_n_u16): Likewise.
14756 (vshrntq_m_n_s32): Likewise.
14757 (vshrntq_m_n_s16): Likewise.
14758 (vshrntq_m_n_u32): Likewise.
14759 (vshrntq_m_n_u16): Likewise.
14760 (__arm_vmlaldavaq_p_s32): Define intrinsic.
14761 (__arm_vmlaldavaq_p_s16): Likewise.
14762 (__arm_vmlaldavaq_p_u32): Likewise.
14763 (__arm_vmlaldavaq_p_u16): Likewise.
14764 (__arm_vmlaldavaxq_p_s32): Likewise.
14765 (__arm_vmlaldavaxq_p_s16): Likewise.
14766 (__arm_vmlaldavaxq_p_u32): Likewise.
14767 (__arm_vmlaldavaxq_p_u16): Likewise.
14768 (__arm_vmlsldavaq_p_s32): Likewise.
14769 (__arm_vmlsldavaq_p_s16): Likewise.
14770 (__arm_vmlsldavaxq_p_s32): Likewise.
14771 (__arm_vmlsldavaxq_p_s16): Likewise.
14772 (__arm_vmullbq_poly_m_p8): Likewise.
14773 (__arm_vmullbq_poly_m_p16): Likewise.
14774 (__arm_vmulltq_poly_m_p8): Likewise.
14775 (__arm_vmulltq_poly_m_p16): Likewise.
14776 (__arm_vqdmullbq_m_n_s32): Likewise.
14777 (__arm_vqdmullbq_m_n_s16): Likewise.
14778 (__arm_vqdmullbq_m_s32): Likewise.
14779 (__arm_vqdmullbq_m_s16): Likewise.
14780 (__arm_vqdmulltq_m_n_s32): Likewise.
14781 (__arm_vqdmulltq_m_n_s16): Likewise.
14782 (__arm_vqdmulltq_m_s32): Likewise.
14783 (__arm_vqdmulltq_m_s16): Likewise.
14784 (__arm_vqrshrnbq_m_n_s32): Likewise.
14785 (__arm_vqrshrnbq_m_n_s16): Likewise.
14786 (__arm_vqrshrnbq_m_n_u32): Likewise.
14787 (__arm_vqrshrnbq_m_n_u16): Likewise.
14788 (__arm_vqrshrntq_m_n_s32): Likewise.
14789 (__arm_vqrshrntq_m_n_s16): Likewise.
14790 (__arm_vqrshrntq_m_n_u32): Likewise.
14791 (__arm_vqrshrntq_m_n_u16): Likewise.
14792 (__arm_vqrshrunbq_m_n_s32): Likewise.
14793 (__arm_vqrshrunbq_m_n_s16): Likewise.
14794 (__arm_vqrshruntq_m_n_s32): Likewise.
14795 (__arm_vqrshruntq_m_n_s16): Likewise.
14796 (__arm_vqshrnbq_m_n_s32): Likewise.
14797 (__arm_vqshrnbq_m_n_s16): Likewise.
14798 (__arm_vqshrnbq_m_n_u32): Likewise.
14799 (__arm_vqshrnbq_m_n_u16): Likewise.
14800 (__arm_vqshrntq_m_n_s32): Likewise.
14801 (__arm_vqshrntq_m_n_s16): Likewise.
14802 (__arm_vqshrntq_m_n_u32): Likewise.
14803 (__arm_vqshrntq_m_n_u16): Likewise.
14804 (__arm_vqshrunbq_m_n_s32): Likewise.
14805 (__arm_vqshrunbq_m_n_s16): Likewise.
14806 (__arm_vqshruntq_m_n_s32): Likewise.
14807 (__arm_vqshruntq_m_n_s16): Likewise.
14808 (__arm_vrmlaldavhaq_p_s32): Likewise.
14809 (__arm_vrmlaldavhaq_p_u32): Likewise.
14810 (__arm_vrmlaldavhaxq_p_s32): Likewise.
14811 (__arm_vrmlsldavhaq_p_s32): Likewise.
14812 (__arm_vrmlsldavhaxq_p_s32): Likewise.
14813 (__arm_vrshrnbq_m_n_s32): Likewise.
14814 (__arm_vrshrnbq_m_n_s16): Likewise.
14815 (__arm_vrshrnbq_m_n_u32): Likewise.
14816 (__arm_vrshrnbq_m_n_u16): Likewise.
14817 (__arm_vrshrntq_m_n_s32): Likewise.
14818 (__arm_vrshrntq_m_n_s16): Likewise.
14819 (__arm_vrshrntq_m_n_u32): Likewise.
14820 (__arm_vrshrntq_m_n_u16): Likewise.
14821 (__arm_vshllbq_m_n_s8): Likewise.
14822 (__arm_vshllbq_m_n_s16): Likewise.
14823 (__arm_vshllbq_m_n_u8): Likewise.
14824 (__arm_vshllbq_m_n_u16): Likewise.
14825 (__arm_vshlltq_m_n_s8): Likewise.
14826 (__arm_vshlltq_m_n_s16): Likewise.
14827 (__arm_vshlltq_m_n_u8): Likewise.
14828 (__arm_vshlltq_m_n_u16): Likewise.
14829 (__arm_vshrnbq_m_n_s32): Likewise.
14830 (__arm_vshrnbq_m_n_s16): Likewise.
14831 (__arm_vshrnbq_m_n_u32): Likewise.
14832 (__arm_vshrnbq_m_n_u16): Likewise.
14833 (__arm_vshrntq_m_n_s32): Likewise.
14834 (__arm_vshrntq_m_n_s16): Likewise.
14835 (__arm_vshrntq_m_n_u32): Likewise.
14836 (__arm_vshrntq_m_n_u16): Likewise.
14837 (vmullbq_poly_m): Define polymorphic variant.
14838 (vmulltq_poly_m): Likewise.
14839 (vshllbq_m): Likewise.
14840 (vshrntq_m_n): Likewise.
14841 (vshrnbq_m_n): Likewise.
14842 (vshlltq_m_n): Likewise.
14843 (vshllbq_m_n): Likewise.
14844 (vrshrntq_m_n): Likewise.
14845 (vrshrnbq_m_n): Likewise.
14846 (vqshruntq_m_n): Likewise.
14847 (vqshrunbq_m_n): Likewise.
14848 (vqdmullbq_m_n): Likewise.
14849 (vqdmullbq_m): Likewise.
14850 (vqdmulltq_m_n): Likewise.
14851 (vqdmulltq_m): Likewise.
14852 (vqrshrnbq_m_n): Likewise.
14853 (vqrshrntq_m_n): Likewise.
14854 (vqrshrunbq_m_n): Likewise.
14855 (vqrshruntq_m_n): Likewise.
14856 (vqshrnbq_m_n): Likewise.
14857 (vqshrntq_m_n): Likewise.
14858 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
14859 builtin qualifiers.
14860 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
14861 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
14862 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
14863 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
14864 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
14865 (VMLALDAVAXQ_P): Likewise.
14866 (VQRSHRNBQ_M_N): Likewise.
14867 (VQRSHRNTQ_M_N): Likewise.
14868 (VQSHRNBQ_M_N): Likewise.
14869 (VQSHRNTQ_M_N): Likewise.
14870 (VRSHRNBQ_M_N): Likewise.
14871 (VRSHRNTQ_M_N): Likewise.
14872 (VSHLLBQ_M_N): Likewise.
14873 (VSHLLTQ_M_N): Likewise.
14874 (VSHRNBQ_M_N): Likewise.
14875 (VSHRNTQ_M_N): Likewise.
14876 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
14877 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
14878 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
14879 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
14880 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
14881 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
14882 (mve_vrmlaldavhaq_p_sv4si): Likewise.
14883 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
14884 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
14885 (mve_vshllbq_m_n_<supf><mode>): Likewise.
14886 (mve_vshlltq_m_n_<supf><mode>): Likewise.
14887 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
14888 (mve_vshrntq_m_n_<supf><mode>): Likewise.
14889 (mve_vmlsldavaq_p_s<mode>): Likewise.
14890 (mve_vmlsldavaxq_p_s<mode>): Likewise.
14891 (mve_vmullbq_poly_m_p<mode>): Likewise.
14892 (mve_vmulltq_poly_m_p<mode>): Likewise.
14893 (mve_vqdmullbq_m_n_s<mode>): Likewise.
14894 (mve_vqdmullbq_m_s<mode>): Likewise.
14895 (mve_vqdmulltq_m_n_s<mode>): Likewise.
14896 (mve_vqdmulltq_m_s<mode>): Likewise.
14897 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
14898 (mve_vqrshruntq_m_n_s<mode>): Likewise.
14899 (mve_vqshrunbq_m_n_s<mode>): Likewise.
14900 (mve_vqshruntq_m_n_s<mode>): Likewise.
14901 (mve_vrmlaldavhaq_p_uv4si): Likewise.
14902 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
14903 (mve_vrmlsldavhaq_p_sv4si): Likewise.
14904 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
14906 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14907 Mihail Ionescu <mihail.ionescu@arm.com>
14908 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14910 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
14911 (vabdq_m_s32): Likewise.
14912 (vabdq_m_s16): Likewise.
14913 (vabdq_m_u8): Likewise.
14914 (vabdq_m_u32): Likewise.
14915 (vabdq_m_u16): Likewise.
14916 (vaddq_m_n_s8): Likewise.
14917 (vaddq_m_n_s32): Likewise.
14918 (vaddq_m_n_s16): Likewise.
14919 (vaddq_m_n_u8): Likewise.
14920 (vaddq_m_n_u32): Likewise.
14921 (vaddq_m_n_u16): Likewise.
14922 (vaddq_m_s8): Likewise.
14923 (vaddq_m_s32): Likewise.
14924 (vaddq_m_s16): Likewise.
14925 (vaddq_m_u8): Likewise.
14926 (vaddq_m_u32): Likewise.
14927 (vaddq_m_u16): Likewise.
14928 (vandq_m_s8): Likewise.
14929 (vandq_m_s32): Likewise.
14930 (vandq_m_s16): Likewise.
14931 (vandq_m_u8): Likewise.
14932 (vandq_m_u32): Likewise.
14933 (vandq_m_u16): Likewise.
14934 (vbicq_m_s8): Likewise.
14935 (vbicq_m_s32): Likewise.
14936 (vbicq_m_s16): Likewise.
14937 (vbicq_m_u8): Likewise.
14938 (vbicq_m_u32): Likewise.
14939 (vbicq_m_u16): Likewise.
14940 (vbrsrq_m_n_s8): Likewise.
14941 (vbrsrq_m_n_s32): Likewise.
14942 (vbrsrq_m_n_s16): Likewise.
14943 (vbrsrq_m_n_u8): Likewise.
14944 (vbrsrq_m_n_u32): Likewise.
14945 (vbrsrq_m_n_u16): Likewise.
14946 (vcaddq_rot270_m_s8): Likewise.
14947 (vcaddq_rot270_m_s32): Likewise.
14948 (vcaddq_rot270_m_s16): Likewise.
14949 (vcaddq_rot270_m_u8): Likewise.
14950 (vcaddq_rot270_m_u32): Likewise.
14951 (vcaddq_rot270_m_u16): Likewise.
14952 (vcaddq_rot90_m_s8): Likewise.
14953 (vcaddq_rot90_m_s32): Likewise.
14954 (vcaddq_rot90_m_s16): Likewise.
14955 (vcaddq_rot90_m_u8): Likewise.
14956 (vcaddq_rot90_m_u32): Likewise.
14957 (vcaddq_rot90_m_u16): Likewise.
14958 (veorq_m_s8): Likewise.
14959 (veorq_m_s32): Likewise.
14960 (veorq_m_s16): Likewise.
14961 (veorq_m_u8): Likewise.
14962 (veorq_m_u32): Likewise.
14963 (veorq_m_u16): Likewise.
14964 (vhaddq_m_n_s8): Likewise.
14965 (vhaddq_m_n_s32): Likewise.
14966 (vhaddq_m_n_s16): Likewise.
14967 (vhaddq_m_n_u8): Likewise.
14968 (vhaddq_m_n_u32): Likewise.
14969 (vhaddq_m_n_u16): Likewise.
14970 (vhaddq_m_s8): Likewise.
14971 (vhaddq_m_s32): Likewise.
14972 (vhaddq_m_s16): Likewise.
14973 (vhaddq_m_u8): Likewise.
14974 (vhaddq_m_u32): Likewise.
14975 (vhaddq_m_u16): Likewise.
14976 (vhcaddq_rot270_m_s8): Likewise.
14977 (vhcaddq_rot270_m_s32): Likewise.
14978 (vhcaddq_rot270_m_s16): Likewise.
14979 (vhcaddq_rot90_m_s8): Likewise.
14980 (vhcaddq_rot90_m_s32): Likewise.
14981 (vhcaddq_rot90_m_s16): Likewise.
14982 (vhsubq_m_n_s8): Likewise.
14983 (vhsubq_m_n_s32): Likewise.
14984 (vhsubq_m_n_s16): Likewise.
14985 (vhsubq_m_n_u8): Likewise.
14986 (vhsubq_m_n_u32): Likewise.
14987 (vhsubq_m_n_u16): Likewise.
14988 (vhsubq_m_s8): Likewise.
14989 (vhsubq_m_s32): Likewise.
14990 (vhsubq_m_s16): Likewise.
14991 (vhsubq_m_u8): Likewise.
14992 (vhsubq_m_u32): Likewise.
14993 (vhsubq_m_u16): Likewise.
14994 (vmaxq_m_s8): Likewise.
14995 (vmaxq_m_s32): Likewise.
14996 (vmaxq_m_s16): Likewise.
14997 (vmaxq_m_u8): Likewise.
14998 (vmaxq_m_u32): Likewise.
14999 (vmaxq_m_u16): Likewise.
15000 (vminq_m_s8): Likewise.
15001 (vminq_m_s32): Likewise.
15002 (vminq_m_s16): Likewise.
15003 (vminq_m_u8): Likewise.
15004 (vminq_m_u32): Likewise.
15005 (vminq_m_u16): Likewise.
15006 (vmladavaq_p_s8): Likewise.
15007 (vmladavaq_p_s32): Likewise.
15008 (vmladavaq_p_s16): Likewise.
15009 (vmladavaq_p_u8): Likewise.
15010 (vmladavaq_p_u32): Likewise.
15011 (vmladavaq_p_u16): Likewise.
15012 (vmladavaxq_p_s8): Likewise.
15013 (vmladavaxq_p_s32): Likewise.
15014 (vmladavaxq_p_s16): Likewise.
15015 (vmlaq_m_n_s8): Likewise.
15016 (vmlaq_m_n_s32): Likewise.
15017 (vmlaq_m_n_s16): Likewise.
15018 (vmlaq_m_n_u8): Likewise.
15019 (vmlaq_m_n_u32): Likewise.
15020 (vmlaq_m_n_u16): Likewise.
15021 (vmlasq_m_n_s8): Likewise.
15022 (vmlasq_m_n_s32): Likewise.
15023 (vmlasq_m_n_s16): Likewise.
15024 (vmlasq_m_n_u8): Likewise.
15025 (vmlasq_m_n_u32): Likewise.
15026 (vmlasq_m_n_u16): Likewise.
15027 (vmlsdavaq_p_s8): Likewise.
15028 (vmlsdavaq_p_s32): Likewise.
15029 (vmlsdavaq_p_s16): Likewise.
15030 (vmlsdavaxq_p_s8): Likewise.
15031 (vmlsdavaxq_p_s32): Likewise.
15032 (vmlsdavaxq_p_s16): Likewise.
15033 (vmulhq_m_s8): Likewise.
15034 (vmulhq_m_s32): Likewise.
15035 (vmulhq_m_s16): Likewise.
15036 (vmulhq_m_u8): Likewise.
15037 (vmulhq_m_u32): Likewise.
15038 (vmulhq_m_u16): Likewise.
15039 (vmullbq_int_m_s8): Likewise.
15040 (vmullbq_int_m_s32): Likewise.
15041 (vmullbq_int_m_s16): Likewise.
15042 (vmullbq_int_m_u8): Likewise.
15043 (vmullbq_int_m_u32): Likewise.
15044 (vmullbq_int_m_u16): Likewise.
15045 (vmulltq_int_m_s8): Likewise.
15046 (vmulltq_int_m_s32): Likewise.
15047 (vmulltq_int_m_s16): Likewise.
15048 (vmulltq_int_m_u8): Likewise.
15049 (vmulltq_int_m_u32): Likewise.
15050 (vmulltq_int_m_u16): Likewise.
15051 (vmulq_m_n_s8): Likewise.
15052 (vmulq_m_n_s32): Likewise.
15053 (vmulq_m_n_s16): Likewise.
15054 (vmulq_m_n_u8): Likewise.
15055 (vmulq_m_n_u32): Likewise.
15056 (vmulq_m_n_u16): Likewise.
15057 (vmulq_m_s8): Likewise.
15058 (vmulq_m_s32): Likewise.
15059 (vmulq_m_s16): Likewise.
15060 (vmulq_m_u8): Likewise.
15061 (vmulq_m_u32): Likewise.
15062 (vmulq_m_u16): Likewise.
15063 (vornq_m_s8): Likewise.
15064 (vornq_m_s32): Likewise.
15065 (vornq_m_s16): Likewise.
15066 (vornq_m_u8): Likewise.
15067 (vornq_m_u32): Likewise.
15068 (vornq_m_u16): Likewise.
15069 (vorrq_m_s8): Likewise.
15070 (vorrq_m_s32): Likewise.
15071 (vorrq_m_s16): Likewise.
15072 (vorrq_m_u8): Likewise.
15073 (vorrq_m_u32): Likewise.
15074 (vorrq_m_u16): Likewise.
15075 (vqaddq_m_n_s8): Likewise.
15076 (vqaddq_m_n_s32): Likewise.
15077 (vqaddq_m_n_s16): Likewise.
15078 (vqaddq_m_n_u8): Likewise.
15079 (vqaddq_m_n_u32): Likewise.
15080 (vqaddq_m_n_u16): Likewise.
15081 (vqaddq_m_s8): Likewise.
15082 (vqaddq_m_s32): Likewise.
15083 (vqaddq_m_s16): Likewise.
15084 (vqaddq_m_u8): Likewise.
15085 (vqaddq_m_u32): Likewise.
15086 (vqaddq_m_u16): Likewise.
15087 (vqdmladhq_m_s8): Likewise.
15088 (vqdmladhq_m_s32): Likewise.
15089 (vqdmladhq_m_s16): Likewise.
15090 (vqdmladhxq_m_s8): Likewise.
15091 (vqdmladhxq_m_s32): Likewise.
15092 (vqdmladhxq_m_s16): Likewise.
15093 (vqdmlahq_m_n_s8): Likewise.
15094 (vqdmlahq_m_n_s32): Likewise.
15095 (vqdmlahq_m_n_s16): Likewise.
15096 (vqdmlahq_m_n_u8): Likewise.
15097 (vqdmlahq_m_n_u32): Likewise.
15098 (vqdmlahq_m_n_u16): Likewise.
15099 (vqdmlsdhq_m_s8): Likewise.
15100 (vqdmlsdhq_m_s32): Likewise.
15101 (vqdmlsdhq_m_s16): Likewise.
15102 (vqdmlsdhxq_m_s8): Likewise.
15103 (vqdmlsdhxq_m_s32): Likewise.
15104 (vqdmlsdhxq_m_s16): Likewise.
15105 (vqdmulhq_m_n_s8): Likewise.
15106 (vqdmulhq_m_n_s32): Likewise.
15107 (vqdmulhq_m_n_s16): Likewise.
15108 (vqdmulhq_m_s8): Likewise.
15109 (vqdmulhq_m_s32): Likewise.
15110 (vqdmulhq_m_s16): Likewise.
15111 (vqrdmladhq_m_s8): Likewise.
15112 (vqrdmladhq_m_s32): Likewise.
15113 (vqrdmladhq_m_s16): Likewise.
15114 (vqrdmladhxq_m_s8): Likewise.
15115 (vqrdmladhxq_m_s32): Likewise.
15116 (vqrdmladhxq_m_s16): Likewise.
15117 (vqrdmlahq_m_n_s8): Likewise.
15118 (vqrdmlahq_m_n_s32): Likewise.
15119 (vqrdmlahq_m_n_s16): Likewise.
15120 (vqrdmlahq_m_n_u8): Likewise.
15121 (vqrdmlahq_m_n_u32): Likewise.
15122 (vqrdmlahq_m_n_u16): Likewise.
15123 (vqrdmlashq_m_n_s8): Likewise.
15124 (vqrdmlashq_m_n_s32): Likewise.
15125 (vqrdmlashq_m_n_s16): Likewise.
15126 (vqrdmlashq_m_n_u8): Likewise.
15127 (vqrdmlashq_m_n_u32): Likewise.
15128 (vqrdmlashq_m_n_u16): Likewise.
15129 (vqrdmlsdhq_m_s8): Likewise.
15130 (vqrdmlsdhq_m_s32): Likewise.
15131 (vqrdmlsdhq_m_s16): Likewise.
15132 (vqrdmlsdhxq_m_s8): Likewise.
15133 (vqrdmlsdhxq_m_s32): Likewise.
15134 (vqrdmlsdhxq_m_s16): Likewise.
15135 (vqrdmulhq_m_n_s8): Likewise.
15136 (vqrdmulhq_m_n_s32): Likewise.
15137 (vqrdmulhq_m_n_s16): Likewise.
15138 (vqrdmulhq_m_s8): Likewise.
15139 (vqrdmulhq_m_s32): Likewise.
15140 (vqrdmulhq_m_s16): Likewise.
15141 (vqrshlq_m_s8): Likewise.
15142 (vqrshlq_m_s32): Likewise.
15143 (vqrshlq_m_s16): Likewise.
15144 (vqrshlq_m_u8): Likewise.
15145 (vqrshlq_m_u32): Likewise.
15146 (vqrshlq_m_u16): Likewise.
15147 (vqshlq_m_n_s8): Likewise.
15148 (vqshlq_m_n_s32): Likewise.
15149 (vqshlq_m_n_s16): Likewise.
15150 (vqshlq_m_n_u8): Likewise.
15151 (vqshlq_m_n_u32): Likewise.
15152 (vqshlq_m_n_u16): Likewise.
15153 (vqshlq_m_s8): Likewise.
15154 (vqshlq_m_s32): Likewise.
15155 (vqshlq_m_s16): Likewise.
15156 (vqshlq_m_u8): Likewise.
15157 (vqshlq_m_u32): Likewise.
15158 (vqshlq_m_u16): Likewise.
15159 (vqsubq_m_n_s8): Likewise.
15160 (vqsubq_m_n_s32): Likewise.
15161 (vqsubq_m_n_s16): Likewise.
15162 (vqsubq_m_n_u8): Likewise.
15163 (vqsubq_m_n_u32): Likewise.
15164 (vqsubq_m_n_u16): Likewise.
15165 (vqsubq_m_s8): Likewise.
15166 (vqsubq_m_s32): Likewise.
15167 (vqsubq_m_s16): Likewise.
15168 (vqsubq_m_u8): Likewise.
15169 (vqsubq_m_u32): Likewise.
15170 (vqsubq_m_u16): Likewise.
15171 (vrhaddq_m_s8): Likewise.
15172 (vrhaddq_m_s32): Likewise.
15173 (vrhaddq_m_s16): Likewise.
15174 (vrhaddq_m_u8): Likewise.
15175 (vrhaddq_m_u32): Likewise.
15176 (vrhaddq_m_u16): Likewise.
15177 (vrmulhq_m_s8): Likewise.
15178 (vrmulhq_m_s32): Likewise.
15179 (vrmulhq_m_s16): Likewise.
15180 (vrmulhq_m_u8): Likewise.
15181 (vrmulhq_m_u32): Likewise.
15182 (vrmulhq_m_u16): Likewise.
15183 (vrshlq_m_s8): Likewise.
15184 (vrshlq_m_s32): Likewise.
15185 (vrshlq_m_s16): Likewise.
15186 (vrshlq_m_u8): Likewise.
15187 (vrshlq_m_u32): Likewise.
15188 (vrshlq_m_u16): Likewise.
15189 (vrshrq_m_n_s8): Likewise.
15190 (vrshrq_m_n_s32): Likewise.
15191 (vrshrq_m_n_s16): Likewise.
15192 (vrshrq_m_n_u8): Likewise.
15193 (vrshrq_m_n_u32): Likewise.
15194 (vrshrq_m_n_u16): Likewise.
15195 (vshlq_m_n_s8): Likewise.
15196 (vshlq_m_n_s32): Likewise.
15197 (vshlq_m_n_s16): Likewise.
15198 (vshlq_m_n_u8): Likewise.
15199 (vshlq_m_n_u32): Likewise.
15200 (vshlq_m_n_u16): Likewise.
15201 (vshrq_m_n_s8): Likewise.
15202 (vshrq_m_n_s32): Likewise.
15203 (vshrq_m_n_s16): Likewise.
15204 (vshrq_m_n_u8): Likewise.
15205 (vshrq_m_n_u32): Likewise.
15206 (vshrq_m_n_u16): Likewise.
15207 (vsliq_m_n_s8): Likewise.
15208 (vsliq_m_n_s32): Likewise.
15209 (vsliq_m_n_s16): Likewise.
15210 (vsliq_m_n_u8): Likewise.
15211 (vsliq_m_n_u32): Likewise.
15212 (vsliq_m_n_u16): Likewise.
15213 (vsubq_m_n_s8): Likewise.
15214 (vsubq_m_n_s32): Likewise.
15215 (vsubq_m_n_s16): Likewise.
15216 (vsubq_m_n_u8): Likewise.
15217 (vsubq_m_n_u32): Likewise.
15218 (vsubq_m_n_u16): Likewise.
15219 (__arm_vabdq_m_s8): Define intrinsic.
15220 (__arm_vabdq_m_s32): Likewise.
15221 (__arm_vabdq_m_s16): Likewise.
15222 (__arm_vabdq_m_u8): Likewise.
15223 (__arm_vabdq_m_u32): Likewise.
15224 (__arm_vabdq_m_u16): Likewise.
15225 (__arm_vaddq_m_n_s8): Likewise.
15226 (__arm_vaddq_m_n_s32): Likewise.
15227 (__arm_vaddq_m_n_s16): Likewise.
15228 (__arm_vaddq_m_n_u8): Likewise.
15229 (__arm_vaddq_m_n_u32): Likewise.
15230 (__arm_vaddq_m_n_u16): Likewise.
15231 (__arm_vaddq_m_s8): Likewise.
15232 (__arm_vaddq_m_s32): Likewise.
15233 (__arm_vaddq_m_s16): Likewise.
15234 (__arm_vaddq_m_u8): Likewise.
15235 (__arm_vaddq_m_u32): Likewise.
15236 (__arm_vaddq_m_u16): Likewise.
15237 (__arm_vandq_m_s8): Likewise.
15238 (__arm_vandq_m_s32): Likewise.
15239 (__arm_vandq_m_s16): Likewise.
15240 (__arm_vandq_m_u8): Likewise.
15241 (__arm_vandq_m_u32): Likewise.
15242 (__arm_vandq_m_u16): Likewise.
15243 (__arm_vbicq_m_s8): Likewise.
15244 (__arm_vbicq_m_s32): Likewise.
15245 (__arm_vbicq_m_s16): Likewise.
15246 (__arm_vbicq_m_u8): Likewise.
15247 (__arm_vbicq_m_u32): Likewise.
15248 (__arm_vbicq_m_u16): Likewise.
15249 (__arm_vbrsrq_m_n_s8): Likewise.
15250 (__arm_vbrsrq_m_n_s32): Likewise.
15251 (__arm_vbrsrq_m_n_s16): Likewise.
15252 (__arm_vbrsrq_m_n_u8): Likewise.
15253 (__arm_vbrsrq_m_n_u32): Likewise.
15254 (__arm_vbrsrq_m_n_u16): Likewise.
15255 (__arm_vcaddq_rot270_m_s8): Likewise.
15256 (__arm_vcaddq_rot270_m_s32): Likewise.
15257 (__arm_vcaddq_rot270_m_s16): Likewise.
15258 (__arm_vcaddq_rot270_m_u8): Likewise.
15259 (__arm_vcaddq_rot270_m_u32): Likewise.
15260 (__arm_vcaddq_rot270_m_u16): Likewise.
15261 (__arm_vcaddq_rot90_m_s8): Likewise.
15262 (__arm_vcaddq_rot90_m_s32): Likewise.
15263 (__arm_vcaddq_rot90_m_s16): Likewise.
15264 (__arm_vcaddq_rot90_m_u8): Likewise.
15265 (__arm_vcaddq_rot90_m_u32): Likewise.
15266 (__arm_vcaddq_rot90_m_u16): Likewise.
15267 (__arm_veorq_m_s8): Likewise.
15268 (__arm_veorq_m_s32): Likewise.
15269 (__arm_veorq_m_s16): Likewise.
15270 (__arm_veorq_m_u8): Likewise.
15271 (__arm_veorq_m_u32): Likewise.
15272 (__arm_veorq_m_u16): Likewise.
15273 (__arm_vhaddq_m_n_s8): Likewise.
15274 (__arm_vhaddq_m_n_s32): Likewise.
15275 (__arm_vhaddq_m_n_s16): Likewise.
15276 (__arm_vhaddq_m_n_u8): Likewise.
15277 (__arm_vhaddq_m_n_u32): Likewise.
15278 (__arm_vhaddq_m_n_u16): Likewise.
15279 (__arm_vhaddq_m_s8): Likewise.
15280 (__arm_vhaddq_m_s32): Likewise.
15281 (__arm_vhaddq_m_s16): Likewise.
15282 (__arm_vhaddq_m_u8): Likewise.
15283 (__arm_vhaddq_m_u32): Likewise.
15284 (__arm_vhaddq_m_u16): Likewise.
15285 (__arm_vhcaddq_rot270_m_s8): Likewise.
15286 (__arm_vhcaddq_rot270_m_s32): Likewise.
15287 (__arm_vhcaddq_rot270_m_s16): Likewise.
15288 (__arm_vhcaddq_rot90_m_s8): Likewise.
15289 (__arm_vhcaddq_rot90_m_s32): Likewise.
15290 (__arm_vhcaddq_rot90_m_s16): Likewise.
15291 (__arm_vhsubq_m_n_s8): Likewise.
15292 (__arm_vhsubq_m_n_s32): Likewise.
15293 (__arm_vhsubq_m_n_s16): Likewise.
15294 (__arm_vhsubq_m_n_u8): Likewise.
15295 (__arm_vhsubq_m_n_u32): Likewise.
15296 (__arm_vhsubq_m_n_u16): Likewise.
15297 (__arm_vhsubq_m_s8): Likewise.
15298 (__arm_vhsubq_m_s32): Likewise.
15299 (__arm_vhsubq_m_s16): Likewise.
15300 (__arm_vhsubq_m_u8): Likewise.
15301 (__arm_vhsubq_m_u32): Likewise.
15302 (__arm_vhsubq_m_u16): Likewise.
15303 (__arm_vmaxq_m_s8): Likewise.
15304 (__arm_vmaxq_m_s32): Likewise.
15305 (__arm_vmaxq_m_s16): Likewise.
15306 (__arm_vmaxq_m_u8): Likewise.
15307 (__arm_vmaxq_m_u32): Likewise.
15308 (__arm_vmaxq_m_u16): Likewise.
15309 (__arm_vminq_m_s8): Likewise.
15310 (__arm_vminq_m_s32): Likewise.
15311 (__arm_vminq_m_s16): Likewise.
15312 (__arm_vminq_m_u8): Likewise.
15313 (__arm_vminq_m_u32): Likewise.
15314 (__arm_vminq_m_u16): Likewise.
15315 (__arm_vmladavaq_p_s8): Likewise.
15316 (__arm_vmladavaq_p_s32): Likewise.
15317 (__arm_vmladavaq_p_s16): Likewise.
15318 (__arm_vmladavaq_p_u8): Likewise.
15319 (__arm_vmladavaq_p_u32): Likewise.
15320 (__arm_vmladavaq_p_u16): Likewise.
15321 (__arm_vmladavaxq_p_s8): Likewise.
15322 (__arm_vmladavaxq_p_s32): Likewise.
15323 (__arm_vmladavaxq_p_s16): Likewise.
15324 (__arm_vmlaq_m_n_s8): Likewise.
15325 (__arm_vmlaq_m_n_s32): Likewise.
15326 (__arm_vmlaq_m_n_s16): Likewise.
15327 (__arm_vmlaq_m_n_u8): Likewise.
15328 (__arm_vmlaq_m_n_u32): Likewise.
15329 (__arm_vmlaq_m_n_u16): Likewise.
15330 (__arm_vmlasq_m_n_s8): Likewise.
15331 (__arm_vmlasq_m_n_s32): Likewise.
15332 (__arm_vmlasq_m_n_s16): Likewise.
15333 (__arm_vmlasq_m_n_u8): Likewise.
15334 (__arm_vmlasq_m_n_u32): Likewise.
15335 (__arm_vmlasq_m_n_u16): Likewise.
15336 (__arm_vmlsdavaq_p_s8): Likewise.
15337 (__arm_vmlsdavaq_p_s32): Likewise.
15338 (__arm_vmlsdavaq_p_s16): Likewise.
15339 (__arm_vmlsdavaxq_p_s8): Likewise.
15340 (__arm_vmlsdavaxq_p_s32): Likewise.
15341 (__arm_vmlsdavaxq_p_s16): Likewise.
15342 (__arm_vmulhq_m_s8): Likewise.
15343 (__arm_vmulhq_m_s32): Likewise.
15344 (__arm_vmulhq_m_s16): Likewise.
15345 (__arm_vmulhq_m_u8): Likewise.
15346 (__arm_vmulhq_m_u32): Likewise.
15347 (__arm_vmulhq_m_u16): Likewise.
15348 (__arm_vmullbq_int_m_s8): Likewise.
15349 (__arm_vmullbq_int_m_s32): Likewise.
15350 (__arm_vmullbq_int_m_s16): Likewise.
15351 (__arm_vmullbq_int_m_u8): Likewise.
15352 (__arm_vmullbq_int_m_u32): Likewise.
15353 (__arm_vmullbq_int_m_u16): Likewise.
15354 (__arm_vmulltq_int_m_s8): Likewise.
15355 (__arm_vmulltq_int_m_s32): Likewise.
15356 (__arm_vmulltq_int_m_s16): Likewise.
15357 (__arm_vmulltq_int_m_u8): Likewise.
15358 (__arm_vmulltq_int_m_u32): Likewise.
15359 (__arm_vmulltq_int_m_u16): Likewise.
15360 (__arm_vmulq_m_n_s8): Likewise.
15361 (__arm_vmulq_m_n_s32): Likewise.
15362 (__arm_vmulq_m_n_s16): Likewise.
15363 (__arm_vmulq_m_n_u8): Likewise.
15364 (__arm_vmulq_m_n_u32): Likewise.
15365 (__arm_vmulq_m_n_u16): Likewise.
15366 (__arm_vmulq_m_s8): Likewise.
15367 (__arm_vmulq_m_s32): Likewise.
15368 (__arm_vmulq_m_s16): Likewise.
15369 (__arm_vmulq_m_u8): Likewise.
15370 (__arm_vmulq_m_u32): Likewise.
15371 (__arm_vmulq_m_u16): Likewise.
15372 (__arm_vornq_m_s8): Likewise.
15373 (__arm_vornq_m_s32): Likewise.
15374 (__arm_vornq_m_s16): Likewise.
15375 (__arm_vornq_m_u8): Likewise.
15376 (__arm_vornq_m_u32): Likewise.
15377 (__arm_vornq_m_u16): Likewise.
15378 (__arm_vorrq_m_s8): Likewise.
15379 (__arm_vorrq_m_s32): Likewise.
15380 (__arm_vorrq_m_s16): Likewise.
15381 (__arm_vorrq_m_u8): Likewise.
15382 (__arm_vorrq_m_u32): Likewise.
15383 (__arm_vorrq_m_u16): Likewise.
15384 (__arm_vqaddq_m_n_s8): Likewise.
15385 (__arm_vqaddq_m_n_s32): Likewise.
15386 (__arm_vqaddq_m_n_s16): Likewise.
15387 (__arm_vqaddq_m_n_u8): Likewise.
15388 (__arm_vqaddq_m_n_u32): Likewise.
15389 (__arm_vqaddq_m_n_u16): Likewise.
15390 (__arm_vqaddq_m_s8): Likewise.
15391 (__arm_vqaddq_m_s32): Likewise.
15392 (__arm_vqaddq_m_s16): Likewise.
15393 (__arm_vqaddq_m_u8): Likewise.
15394 (__arm_vqaddq_m_u32): Likewise.
15395 (__arm_vqaddq_m_u16): Likewise.
15396 (__arm_vqdmladhq_m_s8): Likewise.
15397 (__arm_vqdmladhq_m_s32): Likewise.
15398 (__arm_vqdmladhq_m_s16): Likewise.
15399 (__arm_vqdmladhxq_m_s8): Likewise.
15400 (__arm_vqdmladhxq_m_s32): Likewise.
15401 (__arm_vqdmladhxq_m_s16): Likewise.
15402 (__arm_vqdmlahq_m_n_s8): Likewise.
15403 (__arm_vqdmlahq_m_n_s32): Likewise.
15404 (__arm_vqdmlahq_m_n_s16): Likewise.
15405 (__arm_vqdmlahq_m_n_u8): Likewise.
15406 (__arm_vqdmlahq_m_n_u32): Likewise.
15407 (__arm_vqdmlahq_m_n_u16): Likewise.
15408 (__arm_vqdmlsdhq_m_s8): Likewise.
15409 (__arm_vqdmlsdhq_m_s32): Likewise.
15410 (__arm_vqdmlsdhq_m_s16): Likewise.
15411 (__arm_vqdmlsdhxq_m_s8): Likewise.
15412 (__arm_vqdmlsdhxq_m_s32): Likewise.
15413 (__arm_vqdmlsdhxq_m_s16): Likewise.
15414 (__arm_vqdmulhq_m_n_s8): Likewise.
15415 (__arm_vqdmulhq_m_n_s32): Likewise.
15416 (__arm_vqdmulhq_m_n_s16): Likewise.
15417 (__arm_vqdmulhq_m_s8): Likewise.
15418 (__arm_vqdmulhq_m_s32): Likewise.
15419 (__arm_vqdmulhq_m_s16): Likewise.
15420 (__arm_vqrdmladhq_m_s8): Likewise.
15421 (__arm_vqrdmladhq_m_s32): Likewise.
15422 (__arm_vqrdmladhq_m_s16): Likewise.
15423 (__arm_vqrdmladhxq_m_s8): Likewise.
15424 (__arm_vqrdmladhxq_m_s32): Likewise.
15425 (__arm_vqrdmladhxq_m_s16): Likewise.
15426 (__arm_vqrdmlahq_m_n_s8): Likewise.
15427 (__arm_vqrdmlahq_m_n_s32): Likewise.
15428 (__arm_vqrdmlahq_m_n_s16): Likewise.
15429 (__arm_vqrdmlahq_m_n_u8): Likewise.
15430 (__arm_vqrdmlahq_m_n_u32): Likewise.
15431 (__arm_vqrdmlahq_m_n_u16): Likewise.
15432 (__arm_vqrdmlashq_m_n_s8): Likewise.
15433 (__arm_vqrdmlashq_m_n_s32): Likewise.
15434 (__arm_vqrdmlashq_m_n_s16): Likewise.
15435 (__arm_vqrdmlashq_m_n_u8): Likewise.
15436 (__arm_vqrdmlashq_m_n_u32): Likewise.
15437 (__arm_vqrdmlashq_m_n_u16): Likewise.
15438 (__arm_vqrdmlsdhq_m_s8): Likewise.
15439 (__arm_vqrdmlsdhq_m_s32): Likewise.
15440 (__arm_vqrdmlsdhq_m_s16): Likewise.
15441 (__arm_vqrdmlsdhxq_m_s8): Likewise.
15442 (__arm_vqrdmlsdhxq_m_s32): Likewise.
15443 (__arm_vqrdmlsdhxq_m_s16): Likewise.
15444 (__arm_vqrdmulhq_m_n_s8): Likewise.
15445 (__arm_vqrdmulhq_m_n_s32): Likewise.
15446 (__arm_vqrdmulhq_m_n_s16): Likewise.
15447 (__arm_vqrdmulhq_m_s8): Likewise.
15448 (__arm_vqrdmulhq_m_s32): Likewise.
15449 (__arm_vqrdmulhq_m_s16): Likewise.
15450 (__arm_vqrshlq_m_s8): Likewise.
15451 (__arm_vqrshlq_m_s32): Likewise.
15452 (__arm_vqrshlq_m_s16): Likewise.
15453 (__arm_vqrshlq_m_u8): Likewise.
15454 (__arm_vqrshlq_m_u32): Likewise.
15455 (__arm_vqrshlq_m_u16): Likewise.
15456 (__arm_vqshlq_m_n_s8): Likewise.
15457 (__arm_vqshlq_m_n_s32): Likewise.
15458 (__arm_vqshlq_m_n_s16): Likewise.
15459 (__arm_vqshlq_m_n_u8): Likewise.
15460 (__arm_vqshlq_m_n_u32): Likewise.
15461 (__arm_vqshlq_m_n_u16): Likewise.
15462 (__arm_vqshlq_m_s8): Likewise.
15463 (__arm_vqshlq_m_s32): Likewise.
15464 (__arm_vqshlq_m_s16): Likewise.
15465 (__arm_vqshlq_m_u8): Likewise.
15466 (__arm_vqshlq_m_u32): Likewise.
15467 (__arm_vqshlq_m_u16): Likewise.
15468 (__arm_vqsubq_m_n_s8): Likewise.
15469 (__arm_vqsubq_m_n_s32): Likewise.
15470 (__arm_vqsubq_m_n_s16): Likewise.
15471 (__arm_vqsubq_m_n_u8): Likewise.
15472 (__arm_vqsubq_m_n_u32): Likewise.
15473 (__arm_vqsubq_m_n_u16): Likewise.
15474 (__arm_vqsubq_m_s8): Likewise.
15475 (__arm_vqsubq_m_s32): Likewise.
15476 (__arm_vqsubq_m_s16): Likewise.
15477 (__arm_vqsubq_m_u8): Likewise.
15478 (__arm_vqsubq_m_u32): Likewise.
15479 (__arm_vqsubq_m_u16): Likewise.
15480 (__arm_vrhaddq_m_s8): Likewise.
15481 (__arm_vrhaddq_m_s32): Likewise.
15482 (__arm_vrhaddq_m_s16): Likewise.
15483 (__arm_vrhaddq_m_u8): Likewise.
15484 (__arm_vrhaddq_m_u32): Likewise.
15485 (__arm_vrhaddq_m_u16): Likewise.
15486 (__arm_vrmulhq_m_s8): Likewise.
15487 (__arm_vrmulhq_m_s32): Likewise.
15488 (__arm_vrmulhq_m_s16): Likewise.
15489 (__arm_vrmulhq_m_u8): Likewise.
15490 (__arm_vrmulhq_m_u32): Likewise.
15491 (__arm_vrmulhq_m_u16): Likewise.
15492 (__arm_vrshlq_m_s8): Likewise.
15493 (__arm_vrshlq_m_s32): Likewise.
15494 (__arm_vrshlq_m_s16): Likewise.
15495 (__arm_vrshlq_m_u8): Likewise.
15496 (__arm_vrshlq_m_u32): Likewise.
15497 (__arm_vrshlq_m_u16): Likewise.
15498 (__arm_vrshrq_m_n_s8): Likewise.
15499 (__arm_vrshrq_m_n_s32): Likewise.
15500 (__arm_vrshrq_m_n_s16): Likewise.
15501 (__arm_vrshrq_m_n_u8): Likewise.
15502 (__arm_vrshrq_m_n_u32): Likewise.
15503 (__arm_vrshrq_m_n_u16): Likewise.
15504 (__arm_vshlq_m_n_s8): Likewise.
15505 (__arm_vshlq_m_n_s32): Likewise.
15506 (__arm_vshlq_m_n_s16): Likewise.
15507 (__arm_vshlq_m_n_u8): Likewise.
15508 (__arm_vshlq_m_n_u32): Likewise.
15509 (__arm_vshlq_m_n_u16): Likewise.
15510 (__arm_vshrq_m_n_s8): Likewise.
15511 (__arm_vshrq_m_n_s32): Likewise.
15512 (__arm_vshrq_m_n_s16): Likewise.
15513 (__arm_vshrq_m_n_u8): Likewise.
15514 (__arm_vshrq_m_n_u32): Likewise.
15515 (__arm_vshrq_m_n_u16): Likewise.
15516 (__arm_vsliq_m_n_s8): Likewise.
15517 (__arm_vsliq_m_n_s32): Likewise.
15518 (__arm_vsliq_m_n_s16): Likewise.
15519 (__arm_vsliq_m_n_u8): Likewise.
15520 (__arm_vsliq_m_n_u32): Likewise.
15521 (__arm_vsliq_m_n_u16): Likewise.
15522 (__arm_vsubq_m_n_s8): Likewise.
15523 (__arm_vsubq_m_n_s32): Likewise.
15524 (__arm_vsubq_m_n_s16): Likewise.
15525 (__arm_vsubq_m_n_u8): Likewise.
15526 (__arm_vsubq_m_n_u32): Likewise.
15527 (__arm_vsubq_m_n_u16): Likewise.
15528 (vqdmladhq_m): Define polymorphic variant.
15529 (vqdmladhxq_m): Likewise.
15530 (vqdmlsdhq_m): Likewise.
15531 (vqdmlsdhxq_m): Likewise.
15532 (vabdq_m): Likewise.
15533 (vandq_m): Likewise.
15534 (vbicq_m): Likewise.
15535 (vbrsrq_m_n): Likewise.
15536 (vcaddq_rot270_m): Likewise.
15537 (vcaddq_rot90_m): Likewise.
15538 (veorq_m): Likewise.
15539 (vmaxq_m): Likewise.
15540 (vminq_m): Likewise.
15541 (vmladavaq_p): Likewise.
15542 (vmlaq_m_n): Likewise.
15543 (vmlasq_m_n): Likewise.
15544 (vmulhq_m): Likewise.
15545 (vmullbq_int_m): Likewise.
15546 (vmulltq_int_m): Likewise.
15547 (vornq_m): Likewise.
15548 (vorrq_m): Likewise.
15549 (vqdmlahq_m_n): Likewise.
15550 (vqrdmlahq_m_n): Likewise.
15551 (vqrdmlashq_m_n): Likewise.
15552 (vqrshlq_m): Likewise.
15553 (vqshlq_m_n): Likewise.
15554 (vqshlq_m): Likewise.
15555 (vrhaddq_m): Likewise.
15556 (vrmulhq_m): Likewise.
15557 (vrshlq_m): Likewise.
15558 (vrshrq_m_n): Likewise.
15559 (vshlq_m_n): Likewise.
15560 (vshrq_m_n): Likewise.
15561 (vsliq_m): Likewise.
15562 (vaddq_m_n): Likewise.
15563 (vaddq_m): Likewise.
15564 (vhaddq_m_n): Likewise.
15565 (vhaddq_m): Likewise.
15566 (vhcaddq_rot270_m): Likewise.
15567 (vhcaddq_rot90_m): Likewise.
15568 (vhsubq_m): Likewise.
15569 (vhsubq_m_n): Likewise.
15570 (vmulq_m_n): Likewise.
15571 (vmulq_m): Likewise.
15572 (vqaddq_m_n): Likewise.
15573 (vqaddq_m): Likewise.
15574 (vqdmulhq_m_n): Likewise.
15575 (vqdmulhq_m): Likewise.
15576 (vsubq_m_n): Likewise.
15577 (vsliq_m_n): Likewise.
15578 (vqsubq_m_n): Likewise.
15579 (vqsubq_m): Likewise.
15580 (vqrdmulhq_m): Likewise.
15581 (vqrdmulhq_m_n): Likewise.
15582 (vqrdmlsdhxq_m): Likewise.
15583 (vqrdmlsdhq_m): Likewise.
15584 (vqrdmladhq_m): Likewise.
15585 (vqrdmladhxq_m): Likewise.
15586 (vmlsdavaxq_p): Likewise.
15587 (vmlsdavaq_p): Likewise.
15588 (vmladavaxq_p): Likewise.
15589 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
15591 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
15592 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
15593 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
15594 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
15595 * config/arm/mve.md (VHSUBQ_M): Define iterators.
15596 (VSLIQ_M_N): Likewise.
15597 (VQRDMLAHQ_M_N): Likewise.
15598 (VRSHLQ_M): Likewise.
15599 (VMINQ_M): Likewise.
15600 (VMULLBQ_INT_M): Likewise.
15601 (VMULHQ_M): Likewise.
15602 (VMULQ_M): Likewise.
15603 (VHSUBQ_M_N): Likewise.
15604 (VHADDQ_M_N): Likewise.
15605 (VORRQ_M): Likewise.
15606 (VRMULHQ_M): Likewise.
15607 (VQADDQ_M): Likewise.
15608 (VRSHRQ_M_N): Likewise.
15609 (VQSUBQ_M_N): Likewise.
15610 (VADDQ_M): Likewise.
15611 (VORNQ_M): Likewise.
15612 (VQDMLAHQ_M_N): Likewise.
15613 (VRHADDQ_M): Likewise.
15614 (VQSHLQ_M): Likewise.
15615 (VANDQ_M): Likewise.
15616 (VBICQ_M): Likewise.
15617 (VSHLQ_M_N): Likewise.
15618 (VCADDQ_ROT270_M): Likewise.
15619 (VQRSHLQ_M): Likewise.
15620 (VQADDQ_M_N): Likewise.
15621 (VADDQ_M_N): Likewise.
15622 (VMAXQ_M): Likewise.
15623 (VQSUBQ_M): Likewise.
15624 (VMLASQ_M_N): Likewise.
15625 (VMLADAVAQ_P): Likewise.
15626 (VBRSRQ_M_N): Likewise.
15627 (VMULQ_M_N): Likewise.
15628 (VCADDQ_ROT90_M): Likewise.
15629 (VMULLTQ_INT_M): Likewise.
15630 (VEORQ_M): Likewise.
15631 (VSHRQ_M_N): Likewise.
15632 (VSUBQ_M_N): Likewise.
15633 (VHADDQ_M): Likewise.
15634 (VABDQ_M): Likewise.
15635 (VQRDMLASHQ_M_N): Likewise.
15636 (VMLAQ_M_N): Likewise.
15637 (VQSHLQ_M_N): Likewise.
15638 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
15639 (mve_vaddq_m_n_<supf><mode>): Likewise.
15640 (mve_vaddq_m_<supf><mode>): Likewise.
15641 (mve_vandq_m_<supf><mode>): Likewise.
15642 (mve_vbicq_m_<supf><mode>): Likewise.
15643 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
15644 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
15645 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
15646 (mve_veorq_m_<supf><mode>): Likewise.
15647 (mve_vhaddq_m_n_<supf><mode>): Likewise.
15648 (mve_vhaddq_m_<supf><mode>): Likewise.
15649 (mve_vhsubq_m_n_<supf><mode>): Likewise.
15650 (mve_vhsubq_m_<supf><mode>): Likewise.
15651 (mve_vmaxq_m_<supf><mode>): Likewise.
15652 (mve_vminq_m_<supf><mode>): Likewise.
15653 (mve_vmladavaq_p_<supf><mode>): Likewise.
15654 (mve_vmlaq_m_n_<supf><mode>): Likewise.
15655 (mve_vmlasq_m_n_<supf><mode>): Likewise.
15656 (mve_vmulhq_m_<supf><mode>): Likewise.
15657 (mve_vmullbq_int_m_<supf><mode>): Likewise.
15658 (mve_vmulltq_int_m_<supf><mode>): Likewise.
15659 (mve_vmulq_m_n_<supf><mode>): Likewise.
15660 (mve_vmulq_m_<supf><mode>): Likewise.
15661 (mve_vornq_m_<supf><mode>): Likewise.
15662 (mve_vorrq_m_<supf><mode>): Likewise.
15663 (mve_vqaddq_m_n_<supf><mode>): Likewise.
15664 (mve_vqaddq_m_<supf><mode>): Likewise.
15665 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
15666 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
15667 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
15668 (mve_vqrshlq_m_<supf><mode>): Likewise.
15669 (mve_vqshlq_m_n_<supf><mode>): Likewise.
15670 (mve_vqshlq_m_<supf><mode>): Likewise.
15671 (mve_vqsubq_m_n_<supf><mode>): Likewise.
15672 (mve_vqsubq_m_<supf><mode>): Likewise.
15673 (mve_vrhaddq_m_<supf><mode>): Likewise.
15674 (mve_vrmulhq_m_<supf><mode>): Likewise.
15675 (mve_vrshlq_m_<supf><mode>): Likewise.
15676 (mve_vrshrq_m_n_<supf><mode>): Likewise.
15677 (mve_vshlq_m_n_<supf><mode>): Likewise.
15678 (mve_vshrq_m_n_<supf><mode>): Likewise.
15679 (mve_vsliq_m_n_<supf><mode>): Likewise.
15680 (mve_vsubq_m_n_<supf><mode>): Likewise.
15681 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
15682 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
15683 (mve_vmladavaxq_p_s<mode>): Likewise.
15684 (mve_vmlsdavaq_p_s<mode>): Likewise.
15685 (mve_vmlsdavaxq_p_s<mode>): Likewise.
15686 (mve_vqdmladhq_m_s<mode>): Likewise.
15687 (mve_vqdmladhxq_m_s<mode>): Likewise.
15688 (mve_vqdmlsdhq_m_s<mode>): Likewise.
15689 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
15690 (mve_vqdmulhq_m_n_s<mode>): Likewise.
15691 (mve_vqdmulhq_m_s<mode>): Likewise.
15692 (mve_vqrdmladhq_m_s<mode>): Likewise.
15693 (mve_vqrdmladhxq_m_s<mode>): Likewise.
15694 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
15695 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
15696 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
15697 (mve_vqrdmulhq_m_s<mode>): Likewise.
15699 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15700 Mihail Ionescu <mihail.ionescu@arm.com>
15701 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15703 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
15704 Define builtin qualifier.
15705 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
15706 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
15707 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
15708 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
15709 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
15710 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
15711 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
15712 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
15713 (vsubq_m_s8): Likewise.
15714 (vcvtq_m_n_f16_u16): Likewise.
15715 (vqshluq_m_n_s8): Likewise.
15716 (vabavq_p_s8): Likewise.
15717 (vsriq_m_n_u8): Likewise.
15718 (vshlq_m_u8): Likewise.
15719 (vsubq_m_u8): Likewise.
15720 (vabavq_p_u8): Likewise.
15721 (vshlq_m_s8): Likewise.
15722 (vcvtq_m_n_f16_s16): Likewise.
15723 (vsriq_m_n_s16): Likewise.
15724 (vsubq_m_s16): Likewise.
15725 (vcvtq_m_n_f32_u32): Likewise.
15726 (vqshluq_m_n_s16): Likewise.
15727 (vabavq_p_s16): Likewise.
15728 (vsriq_m_n_u16): Likewise.
15729 (vshlq_m_u16): Likewise.
15730 (vsubq_m_u16): Likewise.
15731 (vabavq_p_u16): Likewise.
15732 (vshlq_m_s16): Likewise.
15733 (vcvtq_m_n_f32_s32): Likewise.
15734 (vsriq_m_n_s32): Likewise.
15735 (vsubq_m_s32): Likewise.
15736 (vqshluq_m_n_s32): Likewise.
15737 (vabavq_p_s32): Likewise.
15738 (vsriq_m_n_u32): Likewise.
15739 (vshlq_m_u32): Likewise.
15740 (vsubq_m_u32): Likewise.
15741 (vabavq_p_u32): Likewise.
15742 (vshlq_m_s32): Likewise.
15743 (__arm_vsriq_m_n_s8): Define intrinsic.
15744 (__arm_vsubq_m_s8): Likewise.
15745 (__arm_vqshluq_m_n_s8): Likewise.
15746 (__arm_vabavq_p_s8): Likewise.
15747 (__arm_vsriq_m_n_u8): Likewise.
15748 (__arm_vshlq_m_u8): Likewise.
15749 (__arm_vsubq_m_u8): Likewise.
15750 (__arm_vabavq_p_u8): Likewise.
15751 (__arm_vshlq_m_s8): Likewise.
15752 (__arm_vsriq_m_n_s16): Likewise.
15753 (__arm_vsubq_m_s16): Likewise.
15754 (__arm_vqshluq_m_n_s16): Likewise.
15755 (__arm_vabavq_p_s16): Likewise.
15756 (__arm_vsriq_m_n_u16): Likewise.
15757 (__arm_vshlq_m_u16): Likewise.
15758 (__arm_vsubq_m_u16): Likewise.
15759 (__arm_vabavq_p_u16): Likewise.
15760 (__arm_vshlq_m_s16): Likewise.
15761 (__arm_vsriq_m_n_s32): Likewise.
15762 (__arm_vsubq_m_s32): Likewise.
15763 (__arm_vqshluq_m_n_s32): Likewise.
15764 (__arm_vabavq_p_s32): Likewise.
15765 (__arm_vsriq_m_n_u32): Likewise.
15766 (__arm_vshlq_m_u32): Likewise.
15767 (__arm_vsubq_m_u32): Likewise.
15768 (__arm_vabavq_p_u32): Likewise.
15769 (__arm_vshlq_m_s32): Likewise.
15770 (__arm_vcvtq_m_n_f16_u16): Likewise.
15771 (__arm_vcvtq_m_n_f16_s16): Likewise.
15772 (__arm_vcvtq_m_n_f32_u32): Likewise.
15773 (__arm_vcvtq_m_n_f32_s32): Likewise.
15774 (vcvtq_m_n): Define polymorphic variant.
15775 (vqshluq_m_n): Likewise.
15776 (vshlq_m): Likewise.
15777 (vsriq_m_n): Likewise.
15778 (vsubq_m): Likewise.
15779 (vabavq_p): Likewise.
15780 * config/arm/arm_mve_builtins.def
15781 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
15782 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
15783 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
15784 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
15785 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
15786 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
15787 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
15788 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
15789 * config/arm/mve.md (VABAVQ_P): Define iterator.
15790 (VSHLQ_M): Likewise.
15791 (VSRIQ_M_N): Likewise.
15792 (VSUBQ_M): Likewise.
15793 (VCVTQ_M_N_TO_F): Likewise.
15794 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
15795 (mve_vqshluq_m_n_s<mode>): Likewise.
15796 (mve_vshlq_m_<supf><mode>): Likewise.
15797 (mve_vsriq_m_n_<supf><mode>): Likewise.
15798 (mve_vsubq_m_<supf><mode>): Likewise.
15799 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
15801 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15802 Mihail Ionescu <mihail.ionescu@arm.com>
15803 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15805 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
15806 (vrmlsldavhaq_s32): Likewise.
15807 (vrmlsldavhaxq_s32): Likewise.
15808 (vaddlvaq_p_s32): Likewise.
15809 (vcvtbq_m_f16_f32): Likewise.
15810 (vcvtbq_m_f32_f16): Likewise.
15811 (vcvttq_m_f16_f32): Likewise.
15812 (vcvttq_m_f32_f16): Likewise.
15813 (vrev16q_m_s8): Likewise.
15814 (vrev32q_m_f16): Likewise.
15815 (vrmlaldavhq_p_s32): Likewise.
15816 (vrmlaldavhxq_p_s32): Likewise.
15817 (vrmlsldavhq_p_s32): Likewise.
15818 (vrmlsldavhxq_p_s32): Likewise.
15819 (vaddlvaq_p_u32): Likewise.
15820 (vrev16q_m_u8): Likewise.
15821 (vrmlaldavhq_p_u32): Likewise.
15822 (vmvnq_m_n_s16): Likewise.
15823 (vorrq_m_n_s16): Likewise.
15824 (vqrshrntq_n_s16): Likewise.
15825 (vqshrnbq_n_s16): Likewise.
15826 (vqshrntq_n_s16): Likewise.
15827 (vrshrnbq_n_s16): Likewise.
15828 (vrshrntq_n_s16): Likewise.
15829 (vshrnbq_n_s16): Likewise.
15830 (vshrntq_n_s16): Likewise.
15831 (vcmlaq_f16): Likewise.
15832 (vcmlaq_rot180_f16): Likewise.
15833 (vcmlaq_rot270_f16): Likewise.
15834 (vcmlaq_rot90_f16): Likewise.
15835 (vfmaq_f16): Likewise.
15836 (vfmaq_n_f16): Likewise.
15837 (vfmasq_n_f16): Likewise.
15838 (vfmsq_f16): Likewise.
15839 (vmlaldavaq_s16): Likewise.
15840 (vmlaldavaxq_s16): Likewise.
15841 (vmlsldavaq_s16): Likewise.
15842 (vmlsldavaxq_s16): Likewise.
15843 (vabsq_m_f16): Likewise.
15844 (vcvtmq_m_s16_f16): Likewise.
15845 (vcvtnq_m_s16_f16): Likewise.
15846 (vcvtpq_m_s16_f16): Likewise.
15847 (vcvtq_m_s16_f16): Likewise.
15848 (vdupq_m_n_f16): Likewise.
15849 (vmaxnmaq_m_f16): Likewise.
15850 (vmaxnmavq_p_f16): Likewise.
15851 (vmaxnmvq_p_f16): Likewise.
15852 (vminnmaq_m_f16): Likewise.
15853 (vminnmavq_p_f16): Likewise.
15854 (vminnmvq_p_f16): Likewise.
15855 (vmlaldavq_p_s16): Likewise.
15856 (vmlaldavxq_p_s16): Likewise.
15857 (vmlsldavq_p_s16): Likewise.
15858 (vmlsldavxq_p_s16): Likewise.
15859 (vmovlbq_m_s8): Likewise.
15860 (vmovltq_m_s8): Likewise.
15861 (vmovnbq_m_s16): Likewise.
15862 (vmovntq_m_s16): Likewise.
15863 (vnegq_m_f16): Likewise.
15864 (vpselq_f16): Likewise.
15865 (vqmovnbq_m_s16): Likewise.
15866 (vqmovntq_m_s16): Likewise.
15867 (vrev32q_m_s8): Likewise.
15868 (vrev64q_m_f16): Likewise.
15869 (vrndaq_m_f16): Likewise.
15870 (vrndmq_m_f16): Likewise.
15871 (vrndnq_m_f16): Likewise.
15872 (vrndpq_m_f16): Likewise.
15873 (vrndq_m_f16): Likewise.
15874 (vrndxq_m_f16): Likewise.
15875 (vcmpeqq_m_n_f16): Likewise.
15876 (vcmpgeq_m_f16): Likewise.
15877 (vcmpgeq_m_n_f16): Likewise.
15878 (vcmpgtq_m_f16): Likewise.
15879 (vcmpgtq_m_n_f16): Likewise.
15880 (vcmpleq_m_f16): Likewise.
15881 (vcmpleq_m_n_f16): Likewise.
15882 (vcmpltq_m_f16): Likewise.
15883 (vcmpltq_m_n_f16): Likewise.
15884 (vcmpneq_m_f16): Likewise.
15885 (vcmpneq_m_n_f16): Likewise.
15886 (vmvnq_m_n_u16): Likewise.
15887 (vorrq_m_n_u16): Likewise.
15888 (vqrshruntq_n_s16): Likewise.
15889 (vqshrunbq_n_s16): Likewise.
15890 (vqshruntq_n_s16): Likewise.
15891 (vcvtmq_m_u16_f16): Likewise.
15892 (vcvtnq_m_u16_f16): Likewise.
15893 (vcvtpq_m_u16_f16): Likewise.
15894 (vcvtq_m_u16_f16): Likewise.
15895 (vqmovunbq_m_s16): Likewise.
15896 (vqmovuntq_m_s16): Likewise.
15897 (vqrshrntq_n_u16): Likewise.
15898 (vqshrnbq_n_u16): Likewise.
15899 (vqshrntq_n_u16): Likewise.
15900 (vrshrnbq_n_u16): Likewise.
15901 (vrshrntq_n_u16): Likewise.
15902 (vshrnbq_n_u16): Likewise.
15903 (vshrntq_n_u16): Likewise.
15904 (vmlaldavaq_u16): Likewise.
15905 (vmlaldavaxq_u16): Likewise.
15906 (vmlaldavq_p_u16): Likewise.
15907 (vmlaldavxq_p_u16): Likewise.
15908 (vmovlbq_m_u8): Likewise.
15909 (vmovltq_m_u8): Likewise.
15910 (vmovnbq_m_u16): Likewise.
15911 (vmovntq_m_u16): Likewise.
15912 (vqmovnbq_m_u16): Likewise.
15913 (vqmovntq_m_u16): Likewise.
15914 (vrev32q_m_u8): Likewise.
15915 (vmvnq_m_n_s32): Likewise.
15916 (vorrq_m_n_s32): Likewise.
15917 (vqrshrntq_n_s32): Likewise.
15918 (vqshrnbq_n_s32): Likewise.
15919 (vqshrntq_n_s32): Likewise.
15920 (vrshrnbq_n_s32): Likewise.
15921 (vrshrntq_n_s32): Likewise.
15922 (vshrnbq_n_s32): Likewise.
15923 (vshrntq_n_s32): Likewise.
15924 (vcmlaq_f32): Likewise.
15925 (vcmlaq_rot180_f32): Likewise.
15926 (vcmlaq_rot270_f32): Likewise.
15927 (vcmlaq_rot90_f32): Likewise.
15928 (vfmaq_f32): Likewise.
15929 (vfmaq_n_f32): Likewise.
15930 (vfmasq_n_f32): Likewise.
15931 (vfmsq_f32): Likewise.
15932 (vmlaldavaq_s32): Likewise.
15933 (vmlaldavaxq_s32): Likewise.
15934 (vmlsldavaq_s32): Likewise.
15935 (vmlsldavaxq_s32): Likewise.
15936 (vabsq_m_f32): Likewise.
15937 (vcvtmq_m_s32_f32): Likewise.
15938 (vcvtnq_m_s32_f32): Likewise.
15939 (vcvtpq_m_s32_f32): Likewise.
15940 (vcvtq_m_s32_f32): Likewise.
15941 (vdupq_m_n_f32): Likewise.
15942 (vmaxnmaq_m_f32): Likewise.
15943 (vmaxnmavq_p_f32): Likewise.
15944 (vmaxnmvq_p_f32): Likewise.
15945 (vminnmaq_m_f32): Likewise.
15946 (vminnmavq_p_f32): Likewise.
15947 (vminnmvq_p_f32): Likewise.
15948 (vmlaldavq_p_s32): Likewise.
15949 (vmlaldavxq_p_s32): Likewise.
15950 (vmlsldavq_p_s32): Likewise.
15951 (vmlsldavxq_p_s32): Likewise.
15952 (vmovlbq_m_s16): Likewise.
15953 (vmovltq_m_s16): Likewise.
15954 (vmovnbq_m_s32): Likewise.
15955 (vmovntq_m_s32): Likewise.
15956 (vnegq_m_f32): Likewise.
15957 (vpselq_f32): Likewise.
15958 (vqmovnbq_m_s32): Likewise.
15959 (vqmovntq_m_s32): Likewise.
15960 (vrev32q_m_s16): Likewise.
15961 (vrev64q_m_f32): Likewise.
15962 (vrndaq_m_f32): Likewise.
15963 (vrndmq_m_f32): Likewise.
15964 (vrndnq_m_f32): Likewise.
15965 (vrndpq_m_f32): Likewise.
15966 (vrndq_m_f32): Likewise.
15967 (vrndxq_m_f32): Likewise.
15968 (vcmpeqq_m_n_f32): Likewise.
15969 (vcmpgeq_m_f32): Likewise.
15970 (vcmpgeq_m_n_f32): Likewise.
15971 (vcmpgtq_m_f32): Likewise.
15972 (vcmpgtq_m_n_f32): Likewise.
15973 (vcmpleq_m_f32): Likewise.
15974 (vcmpleq_m_n_f32): Likewise.
15975 (vcmpltq_m_f32): Likewise.
15976 (vcmpltq_m_n_f32): Likewise.
15977 (vcmpneq_m_f32): Likewise.
15978 (vcmpneq_m_n_f32): Likewise.
15979 (vmvnq_m_n_u32): Likewise.
15980 (vorrq_m_n_u32): Likewise.
15981 (vqrshruntq_n_s32): Likewise.
15982 (vqshrunbq_n_s32): Likewise.
15983 (vqshruntq_n_s32): Likewise.
15984 (vcvtmq_m_u32_f32): Likewise.
15985 (vcvtnq_m_u32_f32): Likewise.
15986 (vcvtpq_m_u32_f32): Likewise.
15987 (vcvtq_m_u32_f32): Likewise.
15988 (vqmovunbq_m_s32): Likewise.
15989 (vqmovuntq_m_s32): Likewise.
15990 (vqrshrntq_n_u32): Likewise.
15991 (vqshrnbq_n_u32): Likewise.
15992 (vqshrntq_n_u32): Likewise.
15993 (vrshrnbq_n_u32): Likewise.
15994 (vrshrntq_n_u32): Likewise.
15995 (vshrnbq_n_u32): Likewise.
15996 (vshrntq_n_u32): Likewise.
15997 (vmlaldavaq_u32): Likewise.
15998 (vmlaldavaxq_u32): Likewise.
15999 (vmlaldavq_p_u32): Likewise.
16000 (vmlaldavxq_p_u32): Likewise.
16001 (vmovlbq_m_u16): Likewise.
16002 (vmovltq_m_u16): Likewise.
16003 (vmovnbq_m_u32): Likewise.
16004 (vmovntq_m_u32): Likewise.
16005 (vqmovnbq_m_u32): Likewise.
16006 (vqmovntq_m_u32): Likewise.
16007 (vrev32q_m_u16): Likewise.
16008 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
16009 (__arm_vrmlsldavhaq_s32): Likewise.
16010 (__arm_vrmlsldavhaxq_s32): Likewise.
16011 (__arm_vaddlvaq_p_s32): Likewise.
16012 (__arm_vrev16q_m_s8): Likewise.
16013 (__arm_vrmlaldavhq_p_s32): Likewise.
16014 (__arm_vrmlaldavhxq_p_s32): Likewise.
16015 (__arm_vrmlsldavhq_p_s32): Likewise.
16016 (__arm_vrmlsldavhxq_p_s32): Likewise.
16017 (__arm_vaddlvaq_p_u32): Likewise.
16018 (__arm_vrev16q_m_u8): Likewise.
16019 (__arm_vrmlaldavhq_p_u32): Likewise.
16020 (__arm_vmvnq_m_n_s16): Likewise.
16021 (__arm_vorrq_m_n_s16): Likewise.
16022 (__arm_vqrshrntq_n_s16): Likewise.
16023 (__arm_vqshrnbq_n_s16): Likewise.
16024 (__arm_vqshrntq_n_s16): Likewise.
16025 (__arm_vrshrnbq_n_s16): Likewise.
16026 (__arm_vrshrntq_n_s16): Likewise.
16027 (__arm_vshrnbq_n_s16): Likewise.
16028 (__arm_vshrntq_n_s16): Likewise.
16029 (__arm_vmlaldavaq_s16): Likewise.
16030 (__arm_vmlaldavaxq_s16): Likewise.
16031 (__arm_vmlsldavaq_s16): Likewise.
16032 (__arm_vmlsldavaxq_s16): Likewise.
16033 (__arm_vmlaldavq_p_s16): Likewise.
16034 (__arm_vmlaldavxq_p_s16): Likewise.
16035 (__arm_vmlsldavq_p_s16): Likewise.
16036 (__arm_vmlsldavxq_p_s16): Likewise.
16037 (__arm_vmovlbq_m_s8): Likewise.
16038 (__arm_vmovltq_m_s8): Likewise.
16039 (__arm_vmovnbq_m_s16): Likewise.
16040 (__arm_vmovntq_m_s16): Likewise.
16041 (__arm_vqmovnbq_m_s16): Likewise.
16042 (__arm_vqmovntq_m_s16): Likewise.
16043 (__arm_vrev32q_m_s8): Likewise.
16044 (__arm_vmvnq_m_n_u16): Likewise.
16045 (__arm_vorrq_m_n_u16): Likewise.
16046 (__arm_vqrshruntq_n_s16): Likewise.
16047 (__arm_vqshrunbq_n_s16): Likewise.
16048 (__arm_vqshruntq_n_s16): Likewise.
16049 (__arm_vqmovunbq_m_s16): Likewise.
16050 (__arm_vqmovuntq_m_s16): Likewise.
16051 (__arm_vqrshrntq_n_u16): Likewise.
16052 (__arm_vqshrnbq_n_u16): Likewise.
16053 (__arm_vqshrntq_n_u16): Likewise.
16054 (__arm_vrshrnbq_n_u16): Likewise.
16055 (__arm_vrshrntq_n_u16): Likewise.
16056 (__arm_vshrnbq_n_u16): Likewise.
16057 (__arm_vshrntq_n_u16): Likewise.
16058 (__arm_vmlaldavaq_u16): Likewise.
16059 (__arm_vmlaldavaxq_u16): Likewise.
16060 (__arm_vmlaldavq_p_u16): Likewise.
16061 (__arm_vmlaldavxq_p_u16): Likewise.
16062 (__arm_vmovlbq_m_u8): Likewise.
16063 (__arm_vmovltq_m_u8): Likewise.
16064 (__arm_vmovnbq_m_u16): Likewise.
16065 (__arm_vmovntq_m_u16): Likewise.
16066 (__arm_vqmovnbq_m_u16): Likewise.
16067 (__arm_vqmovntq_m_u16): Likewise.
16068 (__arm_vrev32q_m_u8): Likewise.
16069 (__arm_vmvnq_m_n_s32): Likewise.
16070 (__arm_vorrq_m_n_s32): Likewise.
16071 (__arm_vqrshrntq_n_s32): Likewise.
16072 (__arm_vqshrnbq_n_s32): Likewise.
16073 (__arm_vqshrntq_n_s32): Likewise.
16074 (__arm_vrshrnbq_n_s32): Likewise.
16075 (__arm_vrshrntq_n_s32): Likewise.
16076 (__arm_vshrnbq_n_s32): Likewise.
16077 (__arm_vshrntq_n_s32): Likewise.
16078 (__arm_vmlaldavaq_s32): Likewise.
16079 (__arm_vmlaldavaxq_s32): Likewise.
16080 (__arm_vmlsldavaq_s32): Likewise.
16081 (__arm_vmlsldavaxq_s32): Likewise.
16082 (__arm_vmlaldavq_p_s32): Likewise.
16083 (__arm_vmlaldavxq_p_s32): Likewise.
16084 (__arm_vmlsldavq_p_s32): Likewise.
16085 (__arm_vmlsldavxq_p_s32): Likewise.
16086 (__arm_vmovlbq_m_s16): Likewise.
16087 (__arm_vmovltq_m_s16): Likewise.
16088 (__arm_vmovnbq_m_s32): Likewise.
16089 (__arm_vmovntq_m_s32): Likewise.
16090 (__arm_vqmovnbq_m_s32): Likewise.
16091 (__arm_vqmovntq_m_s32): Likewise.
16092 (__arm_vrev32q_m_s16): Likewise.
16093 (__arm_vmvnq_m_n_u32): Likewise.
16094 (__arm_vorrq_m_n_u32): Likewise.
16095 (__arm_vqrshruntq_n_s32): Likewise.
16096 (__arm_vqshrunbq_n_s32): Likewise.
16097 (__arm_vqshruntq_n_s32): Likewise.
16098 (__arm_vqmovunbq_m_s32): Likewise.
16099 (__arm_vqmovuntq_m_s32): Likewise.
16100 (__arm_vqrshrntq_n_u32): Likewise.
16101 (__arm_vqshrnbq_n_u32): Likewise.
16102 (__arm_vqshrntq_n_u32): Likewise.
16103 (__arm_vrshrnbq_n_u32): Likewise.
16104 (__arm_vrshrntq_n_u32): Likewise.
16105 (__arm_vshrnbq_n_u32): Likewise.
16106 (__arm_vshrntq_n_u32): Likewise.
16107 (__arm_vmlaldavaq_u32): Likewise.
16108 (__arm_vmlaldavaxq_u32): Likewise.
16109 (__arm_vmlaldavq_p_u32): Likewise.
16110 (__arm_vmlaldavxq_p_u32): Likewise.
16111 (__arm_vmovlbq_m_u16): Likewise.
16112 (__arm_vmovltq_m_u16): Likewise.
16113 (__arm_vmovnbq_m_u32): Likewise.
16114 (__arm_vmovntq_m_u32): Likewise.
16115 (__arm_vqmovnbq_m_u32): Likewise.
16116 (__arm_vqmovntq_m_u32): Likewise.
16117 (__arm_vrev32q_m_u16): Likewise.
16118 (__arm_vcvtbq_m_f16_f32): Likewise.
16119 (__arm_vcvtbq_m_f32_f16): Likewise.
16120 (__arm_vcvttq_m_f16_f32): Likewise.
16121 (__arm_vcvttq_m_f32_f16): Likewise.
16122 (__arm_vrev32q_m_f16): Likewise.
16123 (__arm_vcmlaq_f16): Likewise.
16124 (__arm_vcmlaq_rot180_f16): Likewise.
16125 (__arm_vcmlaq_rot270_f16): Likewise.
16126 (__arm_vcmlaq_rot90_f16): Likewise.
16127 (__arm_vfmaq_f16): Likewise.
16128 (__arm_vfmaq_n_f16): Likewise.
16129 (__arm_vfmasq_n_f16): Likewise.
16130 (__arm_vfmsq_f16): Likewise.
16131 (__arm_vabsq_m_f16): Likewise.
16132 (__arm_vcvtmq_m_s16_f16): Likewise.
16133 (__arm_vcvtnq_m_s16_f16): Likewise.
16134 (__arm_vcvtpq_m_s16_f16): Likewise.
16135 (__arm_vcvtq_m_s16_f16): Likewise.
16136 (__arm_vdupq_m_n_f16): Likewise.
16137 (__arm_vmaxnmaq_m_f16): Likewise.
16138 (__arm_vmaxnmavq_p_f16): Likewise.
16139 (__arm_vmaxnmvq_p_f16): Likewise.
16140 (__arm_vminnmaq_m_f16): Likewise.
16141 (__arm_vminnmavq_p_f16): Likewise.
16142 (__arm_vminnmvq_p_f16): Likewise.
16143 (__arm_vnegq_m_f16): Likewise.
16144 (__arm_vpselq_f16): Likewise.
16145 (__arm_vrev64q_m_f16): Likewise.
16146 (__arm_vrndaq_m_f16): Likewise.
16147 (__arm_vrndmq_m_f16): Likewise.
16148 (__arm_vrndnq_m_f16): Likewise.
16149 (__arm_vrndpq_m_f16): Likewise.
16150 (__arm_vrndq_m_f16): Likewise.
16151 (__arm_vrndxq_m_f16): Likewise.
16152 (__arm_vcmpeqq_m_n_f16): Likewise.
16153 (__arm_vcmpgeq_m_f16): Likewise.
16154 (__arm_vcmpgeq_m_n_f16): Likewise.
16155 (__arm_vcmpgtq_m_f16): Likewise.
16156 (__arm_vcmpgtq_m_n_f16): Likewise.
16157 (__arm_vcmpleq_m_f16): Likewise.
16158 (__arm_vcmpleq_m_n_f16): Likewise.
16159 (__arm_vcmpltq_m_f16): Likewise.
16160 (__arm_vcmpltq_m_n_f16): Likewise.
16161 (__arm_vcmpneq_m_f16): Likewise.
16162 (__arm_vcmpneq_m_n_f16): Likewise.
16163 (__arm_vcvtmq_m_u16_f16): Likewise.
16164 (__arm_vcvtnq_m_u16_f16): Likewise.
16165 (__arm_vcvtpq_m_u16_f16): Likewise.
16166 (__arm_vcvtq_m_u16_f16): Likewise.
16167 (__arm_vcmlaq_f32): Likewise.
16168 (__arm_vcmlaq_rot180_f32): Likewise.
16169 (__arm_vcmlaq_rot270_f32): Likewise.
16170 (__arm_vcmlaq_rot90_f32): Likewise.
16171 (__arm_vfmaq_f32): Likewise.
16172 (__arm_vfmaq_n_f32): Likewise.
16173 (__arm_vfmasq_n_f32): Likewise.
16174 (__arm_vfmsq_f32): Likewise.
16175 (__arm_vabsq_m_f32): Likewise.
16176 (__arm_vcvtmq_m_s32_f32): Likewise.
16177 (__arm_vcvtnq_m_s32_f32): Likewise.
16178 (__arm_vcvtpq_m_s32_f32): Likewise.
16179 (__arm_vcvtq_m_s32_f32): Likewise.
16180 (__arm_vdupq_m_n_f32): Likewise.
16181 (__arm_vmaxnmaq_m_f32): Likewise.
16182 (__arm_vmaxnmavq_p_f32): Likewise.
16183 (__arm_vmaxnmvq_p_f32): Likewise.
16184 (__arm_vminnmaq_m_f32): Likewise.
16185 (__arm_vminnmavq_p_f32): Likewise.
16186 (__arm_vminnmvq_p_f32): Likewise.
16187 (__arm_vnegq_m_f32): Likewise.
16188 (__arm_vpselq_f32): Likewise.
16189 (__arm_vrev64q_m_f32): Likewise.
16190 (__arm_vrndaq_m_f32): Likewise.
16191 (__arm_vrndmq_m_f32): Likewise.
16192 (__arm_vrndnq_m_f32): Likewise.
16193 (__arm_vrndpq_m_f32): Likewise.
16194 (__arm_vrndq_m_f32): Likewise.
16195 (__arm_vrndxq_m_f32): Likewise.
16196 (__arm_vcmpeqq_m_n_f32): Likewise.
16197 (__arm_vcmpgeq_m_f32): Likewise.
16198 (__arm_vcmpgeq_m_n_f32): Likewise.
16199 (__arm_vcmpgtq_m_f32): Likewise.
16200 (__arm_vcmpgtq_m_n_f32): Likewise.
16201 (__arm_vcmpleq_m_f32): Likewise.
16202 (__arm_vcmpleq_m_n_f32): Likewise.
16203 (__arm_vcmpltq_m_f32): Likewise.
16204 (__arm_vcmpltq_m_n_f32): Likewise.
16205 (__arm_vcmpneq_m_f32): Likewise.
16206 (__arm_vcmpneq_m_n_f32): Likewise.
16207 (__arm_vcvtmq_m_u32_f32): Likewise.
16208 (__arm_vcvtnq_m_u32_f32): Likewise.
16209 (__arm_vcvtpq_m_u32_f32): Likewise.
16210 (__arm_vcvtq_m_u32_f32): Likewise.
16211 (vcvtq_m): Define polymorphic variant.
16212 (vabsq_m): Likewise.
16213 (vcmlaq): Likewise.
16214 (vcmlaq_rot180): Likewise.
16215 (vcmlaq_rot270): Likewise.
16216 (vcmlaq_rot90): Likewise.
16217 (vcmpeqq_m_n): Likewise.
16218 (vcmpgeq_m_n): Likewise.
16219 (vrndxq_m): Likewise.
16220 (vrndq_m): Likewise.
16221 (vrndpq_m): Likewise.
16222 (vcmpgtq_m_n): Likewise.
16223 (vcmpgtq_m): Likewise.
16224 (vcmpleq_m): Likewise.
16225 (vcmpleq_m_n): Likewise.
16226 (vcmpltq_m_n): Likewise.
16227 (vcmpltq_m): Likewise.
16228 (vcmpneq_m): Likewise.
16229 (vcmpneq_m_n): Likewise.
16230 (vcvtbq_m): Likewise.
16231 (vcvttq_m): Likewise.
16232 (vcvtmq_m): Likewise.
16233 (vcvtnq_m): Likewise.
16234 (vcvtpq_m): Likewise.
16235 (vdupq_m_n): Likewise.
16236 (vfmaq_n): Likewise.
16238 (vfmasq_n): Likewise.
16240 (vmaxnmaq_m): Likewise.
16241 (vmaxnmavq_m): Likewise.
16242 (vmaxnmvq_m): Likewise.
16243 (vmaxnmavq_p): Likewise.
16244 (vmaxnmvq_p): Likewise.
16245 (vminnmaq_m): Likewise.
16246 (vminnmavq_p): Likewise.
16247 (vminnmvq_p): Likewise.
16248 (vrndnq_m): Likewise.
16249 (vrndaq_m): Likewise.
16250 (vrndmq_m): Likewise.
16251 (vrev64q_m): Likewise.
16252 (vrev32q_m): Likewise.
16253 (vpselq): Likewise.
16254 (vnegq_m): Likewise.
16255 (vcmpgeq_m): Likewise.
16256 (vshrntq_n): Likewise.
16257 (vrshrntq_n): Likewise.
16258 (vmovlbq_m): Likewise.
16259 (vmovnbq_m): Likewise.
16260 (vmovntq_m): Likewise.
16261 (vmvnq_m_n): Likewise.
16262 (vmvnq_m): Likewise.
16263 (vshrnbq_n): Likewise.
16264 (vrshrnbq_n): Likewise.
16265 (vqshruntq_n): Likewise.
16266 (vrev16q_m): Likewise.
16267 (vqshrunbq_n): Likewise.
16268 (vqshrntq_n): Likewise.
16269 (vqrshruntq_n): Likewise.
16270 (vqrshrntq_n): Likewise.
16271 (vqshrnbq_n): Likewise.
16272 (vqmovuntq_m): Likewise.
16273 (vqmovntq_m): Likewise.
16274 (vqmovnbq_m): Likewise.
16275 (vorrq_m_n): Likewise.
16276 (vmovltq_m): Likewise.
16277 (vqmovunbq_m): Likewise.
16278 (vaddlvaq_p): Likewise.
16279 (vmlaldavaq): Likewise.
16280 (vmlaldavaxq): Likewise.
16281 (vmlaldavq_p): Likewise.
16282 (vmlaldavxq_p): Likewise.
16283 (vmlsldavaq): Likewise.
16284 (vmlsldavaxq): Likewise.
16285 (vmlsldavq_p): Likewise.
16286 (vmlsldavxq_p): Likewise.
16287 (vrmlaldavhaxq): Likewise.
16288 (vrmlaldavhq_p): Likewise.
16289 (vrmlaldavhxq_p): Likewise.
16290 (vrmlsldavhaq): Likewise.
16291 (vrmlsldavhaxq): Likewise.
16292 (vrmlsldavhq_p): Likewise.
16293 (vrmlsldavhxq_p): Likewise.
16294 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
16296 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
16297 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
16298 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
16299 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
16300 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
16301 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
16302 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
16303 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
16304 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
16305 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
16306 (MVE_pred3): Likewise.
16307 (MVE_constraint1): Likewise.
16308 (MVE_pred1): Likewise.
16309 (VMLALDAVQ_P): Define iterator.
16310 (VQMOVNBQ_M): Likewise.
16311 (VMOVLTQ_M): Likewise.
16312 (VMOVNBQ_M): Likewise.
16313 (VRSHRNTQ_N): Likewise.
16314 (VORRQ_M_N): Likewise.
16315 (VREV32Q_M): Likewise.
16316 (VREV16Q_M): Likewise.
16317 (VQRSHRNTQ_N): Likewise.
16318 (VMOVNTQ_M): Likewise.
16319 (VMOVLBQ_M): Likewise.
16320 (VMLALDAVAQ): Likewise.
16321 (VQSHRNBQ_N): Likewise.
16322 (VSHRNBQ_N): Likewise.
16323 (VRSHRNBQ_N): Likewise.
16324 (VMLALDAVXQ_P): Likewise.
16325 (VQMOVNTQ_M): Likewise.
16326 (VMVNQ_M_N): Likewise.
16327 (VQSHRNTQ_N): Likewise.
16328 (VMLALDAVAXQ): Likewise.
16329 (VSHRNTQ_N): Likewise.
16330 (VCVTMQ_M): Likewise.
16331 (VCVTNQ_M): Likewise.
16332 (VCVTPQ_M): Likewise.
16333 (VCVTQ_M_N_FROM_F): Likewise.
16334 (VCVTQ_M_FROM_F): Likewise.
16335 (VRMLALDAVHQ_P): Likewise.
16336 (VADDLVAQ_P): Likewise.
16337 (mve_vrndq_m_f<mode>): Define RTL pattern.
16338 (mve_vabsq_m_f<mode>): Likewise.
16339 (mve_vaddlvaq_p_<supf>v4si): Likewise.
16340 (mve_vcmlaq_f<mode>): Likewise.
16341 (mve_vcmlaq_rot180_f<mode>): Likewise.
16342 (mve_vcmlaq_rot270_f<mode>): Likewise.
16343 (mve_vcmlaq_rot90_f<mode>): Likewise.
16344 (mve_vcmpeqq_m_n_f<mode>): Likewise.
16345 (mve_vcmpgeq_m_f<mode>): Likewise.
16346 (mve_vcmpgeq_m_n_f<mode>): Likewise.
16347 (mve_vcmpgtq_m_f<mode>): Likewise.
16348 (mve_vcmpgtq_m_n_f<mode>): Likewise.
16349 (mve_vcmpleq_m_f<mode>): Likewise.
16350 (mve_vcmpleq_m_n_f<mode>): Likewise.
16351 (mve_vcmpltq_m_f<mode>): Likewise.
16352 (mve_vcmpltq_m_n_f<mode>): Likewise.
16353 (mve_vcmpneq_m_f<mode>): Likewise.
16354 (mve_vcmpneq_m_n_f<mode>): Likewise.
16355 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
16356 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
16357 (mve_vcvttq_m_f16_f32v8hf): Likewise.
16358 (mve_vcvttq_m_f32_f16v4sf): Likewise.
16359 (mve_vdupq_m_n_f<mode>): Likewise.
16360 (mve_vfmaq_f<mode>): Likewise.
16361 (mve_vfmaq_n_f<mode>): Likewise.
16362 (mve_vfmasq_n_f<mode>): Likewise.
16363 (mve_vfmsq_f<mode>): Likewise.
16364 (mve_vmaxnmaq_m_f<mode>): Likewise.
16365 (mve_vmaxnmavq_p_f<mode>): Likewise.
16366 (mve_vmaxnmvq_p_f<mode>): Likewise.
16367 (mve_vminnmaq_m_f<mode>): Likewise.
16368 (mve_vminnmavq_p_f<mode>): Likewise.
16369 (mve_vminnmvq_p_f<mode>): Likewise.
16370 (mve_vmlaldavaq_<supf><mode>): Likewise.
16371 (mve_vmlaldavaxq_<supf><mode>): Likewise.
16372 (mve_vmlaldavq_p_<supf><mode>): Likewise.
16373 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
16374 (mve_vmlsldavaq_s<mode>): Likewise.
16375 (mve_vmlsldavaxq_s<mode>): Likewise.
16376 (mve_vmlsldavq_p_s<mode>): Likewise.
16377 (mve_vmlsldavxq_p_s<mode>): Likewise.
16378 (mve_vmovlbq_m_<supf><mode>): Likewise.
16379 (mve_vmovltq_m_<supf><mode>): Likewise.
16380 (mve_vmovnbq_m_<supf><mode>): Likewise.
16381 (mve_vmovntq_m_<supf><mode>): Likewise.
16382 (mve_vmvnq_m_n_<supf><mode>): Likewise.
16383 (mve_vnegq_m_f<mode>): Likewise.
16384 (mve_vorrq_m_n_<supf><mode>): Likewise.
16385 (mve_vpselq_f<mode>): Likewise.
16386 (mve_vqmovnbq_m_<supf><mode>): Likewise.
16387 (mve_vqmovntq_m_<supf><mode>): Likewise.
16388 (mve_vqmovunbq_m_s<mode>): Likewise.
16389 (mve_vqmovuntq_m_s<mode>): Likewise.
16390 (mve_vqrshrntq_n_<supf><mode>): Likewise.
16391 (mve_vqrshruntq_n_s<mode>): Likewise.
16392 (mve_vqshrnbq_n_<supf><mode>): Likewise.
16393 (mve_vqshrntq_n_<supf><mode>): Likewise.
16394 (mve_vqshrunbq_n_s<mode>): Likewise.
16395 (mve_vqshruntq_n_s<mode>): Likewise.
16396 (mve_vrev32q_m_fv8hf): Likewise.
16397 (mve_vrev32q_m_<supf><mode>): Likewise.
16398 (mve_vrev64q_m_f<mode>): Likewise.
16399 (mve_vrmlaldavhaxq_sv4si): Likewise.
16400 (mve_vrmlaldavhxq_p_sv4si): Likewise.
16401 (mve_vrmlsldavhaxq_sv4si): Likewise.
16402 (mve_vrmlsldavhq_p_sv4si): Likewise.
16403 (mve_vrmlsldavhxq_p_sv4si): Likewise.
16404 (mve_vrndaq_m_f<mode>): Likewise.
16405 (mve_vrndmq_m_f<mode>): Likewise.
16406 (mve_vrndnq_m_f<mode>): Likewise.
16407 (mve_vrndpq_m_f<mode>): Likewise.
16408 (mve_vrndxq_m_f<mode>): Likewise.
16409 (mve_vrshrnbq_n_<supf><mode>): Likewise.
16410 (mve_vrshrntq_n_<supf><mode>): Likewise.
16411 (mve_vshrnbq_n_<supf><mode>): Likewise.
16412 (mve_vshrntq_n_<supf><mode>): Likewise.
16413 (mve_vcvtmq_m_<supf><mode>): Likewise.
16414 (mve_vcvtpq_m_<supf><mode>): Likewise.
16415 (mve_vcvtnq_m_<supf><mode>): Likewise.
16416 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
16417 (mve_vrev16q_m_<supf>v16qi): Likewise.
16418 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
16419 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
16420 (mve_vrmlsldavhaq_sv4si): Likewise.
16422 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16423 Mihail Ionescu <mihail.ionescu@arm.com>
16424 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16426 * config/arm/arm_mve.h (vpselq_u8): Define macro.
16427 (vpselq_s8): Likewise.
16428 (vrev64q_m_u8): Likewise.
16429 (vqrdmlashq_n_u8): Likewise.
16430 (vqrdmlahq_n_u8): Likewise.
16431 (vqdmlahq_n_u8): Likewise.
16432 (vmvnq_m_u8): Likewise.
16433 (vmlasq_n_u8): Likewise.
16434 (vmlaq_n_u8): Likewise.
16435 (vmladavq_p_u8): Likewise.
16436 (vmladavaq_u8): Likewise.
16437 (vminvq_p_u8): Likewise.
16438 (vmaxvq_p_u8): Likewise.
16439 (vdupq_m_n_u8): Likewise.
16440 (vcmpneq_m_u8): Likewise.
16441 (vcmpneq_m_n_u8): Likewise.
16442 (vcmphiq_m_u8): Likewise.
16443 (vcmphiq_m_n_u8): Likewise.
16444 (vcmpeqq_m_u8): Likewise.
16445 (vcmpeqq_m_n_u8): Likewise.
16446 (vcmpcsq_m_u8): Likewise.
16447 (vcmpcsq_m_n_u8): Likewise.
16448 (vclzq_m_u8): Likewise.
16449 (vaddvaq_p_u8): Likewise.
16450 (vsriq_n_u8): Likewise.
16451 (vsliq_n_u8): Likewise.
16452 (vshlq_m_r_u8): Likewise.
16453 (vrshlq_m_n_u8): Likewise.
16454 (vqshlq_m_r_u8): Likewise.
16455 (vqrshlq_m_n_u8): Likewise.
16456 (vminavq_p_s8): Likewise.
16457 (vminaq_m_s8): Likewise.
16458 (vmaxavq_p_s8): Likewise.
16459 (vmaxaq_m_s8): Likewise.
16460 (vcmpneq_m_s8): Likewise.
16461 (vcmpneq_m_n_s8): Likewise.
16462 (vcmpltq_m_s8): Likewise.
16463 (vcmpltq_m_n_s8): Likewise.
16464 (vcmpleq_m_s8): Likewise.
16465 (vcmpleq_m_n_s8): Likewise.
16466 (vcmpgtq_m_s8): Likewise.
16467 (vcmpgtq_m_n_s8): Likewise.
16468 (vcmpgeq_m_s8): Likewise.
16469 (vcmpgeq_m_n_s8): Likewise.
16470 (vcmpeqq_m_s8): Likewise.
16471 (vcmpeqq_m_n_s8): Likewise.
16472 (vshlq_m_r_s8): Likewise.
16473 (vrshlq_m_n_s8): Likewise.
16474 (vrev64q_m_s8): Likewise.
16475 (vqshlq_m_r_s8): Likewise.
16476 (vqrshlq_m_n_s8): Likewise.
16477 (vqnegq_m_s8): Likewise.
16478 (vqabsq_m_s8): Likewise.
16479 (vnegq_m_s8): Likewise.
16480 (vmvnq_m_s8): Likewise.
16481 (vmlsdavxq_p_s8): Likewise.
16482 (vmlsdavq_p_s8): Likewise.
16483 (vmladavxq_p_s8): Likewise.
16484 (vmladavq_p_s8): Likewise.
16485 (vminvq_p_s8): Likewise.
16486 (vmaxvq_p_s8): Likewise.
16487 (vdupq_m_n_s8): Likewise.
16488 (vclzq_m_s8): Likewise.
16489 (vclsq_m_s8): Likewise.
16490 (vaddvaq_p_s8): Likewise.
16491 (vabsq_m_s8): Likewise.
16492 (vqrdmlsdhxq_s8): Likewise.
16493 (vqrdmlsdhq_s8): Likewise.
16494 (vqrdmlashq_n_s8): Likewise.
16495 (vqrdmlahq_n_s8): Likewise.
16496 (vqrdmladhxq_s8): Likewise.
16497 (vqrdmladhq_s8): Likewise.
16498 (vqdmlsdhxq_s8): Likewise.
16499 (vqdmlsdhq_s8): Likewise.
16500 (vqdmlahq_n_s8): Likewise.
16501 (vqdmladhxq_s8): Likewise.
16502 (vqdmladhq_s8): Likewise.
16503 (vmlsdavaxq_s8): Likewise.
16504 (vmlsdavaq_s8): Likewise.
16505 (vmlasq_n_s8): Likewise.
16506 (vmlaq_n_s8): Likewise.
16507 (vmladavaxq_s8): Likewise.
16508 (vmladavaq_s8): Likewise.
16509 (vsriq_n_s8): Likewise.
16510 (vsliq_n_s8): Likewise.
16511 (vpselq_u16): Likewise.
16512 (vpselq_s16): Likewise.
16513 (vrev64q_m_u16): Likewise.
16514 (vqrdmlashq_n_u16): Likewise.
16515 (vqrdmlahq_n_u16): Likewise.
16516 (vqdmlahq_n_u16): Likewise.
16517 (vmvnq_m_u16): Likewise.
16518 (vmlasq_n_u16): Likewise.
16519 (vmlaq_n_u16): Likewise.
16520 (vmladavq_p_u16): Likewise.
16521 (vmladavaq_u16): Likewise.
16522 (vminvq_p_u16): Likewise.
16523 (vmaxvq_p_u16): Likewise.
16524 (vdupq_m_n_u16): Likewise.
16525 (vcmpneq_m_u16): Likewise.
16526 (vcmpneq_m_n_u16): Likewise.
16527 (vcmphiq_m_u16): Likewise.
16528 (vcmphiq_m_n_u16): Likewise.
16529 (vcmpeqq_m_u16): Likewise.
16530 (vcmpeqq_m_n_u16): Likewise.
16531 (vcmpcsq_m_u16): Likewise.
16532 (vcmpcsq_m_n_u16): Likewise.
16533 (vclzq_m_u16): Likewise.
16534 (vaddvaq_p_u16): Likewise.
16535 (vsriq_n_u16): Likewise.
16536 (vsliq_n_u16): Likewise.
16537 (vshlq_m_r_u16): Likewise.
16538 (vrshlq_m_n_u16): Likewise.
16539 (vqshlq_m_r_u16): Likewise.
16540 (vqrshlq_m_n_u16): Likewise.
16541 (vminavq_p_s16): Likewise.
16542 (vminaq_m_s16): Likewise.
16543 (vmaxavq_p_s16): Likewise.
16544 (vmaxaq_m_s16): Likewise.
16545 (vcmpneq_m_s16): Likewise.
16546 (vcmpneq_m_n_s16): Likewise.
16547 (vcmpltq_m_s16): Likewise.
16548 (vcmpltq_m_n_s16): Likewise.
16549 (vcmpleq_m_s16): Likewise.
16550 (vcmpleq_m_n_s16): Likewise.
16551 (vcmpgtq_m_s16): Likewise.
16552 (vcmpgtq_m_n_s16): Likewise.
16553 (vcmpgeq_m_s16): Likewise.
16554 (vcmpgeq_m_n_s16): Likewise.
16555 (vcmpeqq_m_s16): Likewise.
16556 (vcmpeqq_m_n_s16): Likewise.
16557 (vshlq_m_r_s16): Likewise.
16558 (vrshlq_m_n_s16): Likewise.
16559 (vrev64q_m_s16): Likewise.
16560 (vqshlq_m_r_s16): Likewise.
16561 (vqrshlq_m_n_s16): Likewise.
16562 (vqnegq_m_s16): Likewise.
16563 (vqabsq_m_s16): Likewise.
16564 (vnegq_m_s16): Likewise.
16565 (vmvnq_m_s16): Likewise.
16566 (vmlsdavxq_p_s16): Likewise.
16567 (vmlsdavq_p_s16): Likewise.
16568 (vmladavxq_p_s16): Likewise.
16569 (vmladavq_p_s16): Likewise.
16570 (vminvq_p_s16): Likewise.
16571 (vmaxvq_p_s16): Likewise.
16572 (vdupq_m_n_s16): Likewise.
16573 (vclzq_m_s16): Likewise.
16574 (vclsq_m_s16): Likewise.
16575 (vaddvaq_p_s16): Likewise.
16576 (vabsq_m_s16): Likewise.
16577 (vqrdmlsdhxq_s16): Likewise.
16578 (vqrdmlsdhq_s16): Likewise.
16579 (vqrdmlashq_n_s16): Likewise.
16580 (vqrdmlahq_n_s16): Likewise.
16581 (vqrdmladhxq_s16): Likewise.
16582 (vqrdmladhq_s16): Likewise.
16583 (vqdmlsdhxq_s16): Likewise.
16584 (vqdmlsdhq_s16): Likewise.
16585 (vqdmlahq_n_s16): Likewise.
16586 (vqdmladhxq_s16): Likewise.
16587 (vqdmladhq_s16): Likewise.
16588 (vmlsdavaxq_s16): Likewise.
16589 (vmlsdavaq_s16): Likewise.
16590 (vmlasq_n_s16): Likewise.
16591 (vmlaq_n_s16): Likewise.
16592 (vmladavaxq_s16): Likewise.
16593 (vmladavaq_s16): Likewise.
16594 (vsriq_n_s16): Likewise.
16595 (vsliq_n_s16): Likewise.
16596 (vpselq_u32): Likewise.
16597 (vpselq_s32): Likewise.
16598 (vrev64q_m_u32): Likewise.
16599 (vqrdmlashq_n_u32): Likewise.
16600 (vqrdmlahq_n_u32): Likewise.
16601 (vqdmlahq_n_u32): Likewise.
16602 (vmvnq_m_u32): Likewise.
16603 (vmlasq_n_u32): Likewise.
16604 (vmlaq_n_u32): Likewise.
16605 (vmladavq_p_u32): Likewise.
16606 (vmladavaq_u32): Likewise.
16607 (vminvq_p_u32): Likewise.
16608 (vmaxvq_p_u32): Likewise.
16609 (vdupq_m_n_u32): Likewise.
16610 (vcmpneq_m_u32): Likewise.
16611 (vcmpneq_m_n_u32): Likewise.
16612 (vcmphiq_m_u32): Likewise.
16613 (vcmphiq_m_n_u32): Likewise.
16614 (vcmpeqq_m_u32): Likewise.
16615 (vcmpeqq_m_n_u32): Likewise.
16616 (vcmpcsq_m_u32): Likewise.
16617 (vcmpcsq_m_n_u32): Likewise.
16618 (vclzq_m_u32): Likewise.
16619 (vaddvaq_p_u32): Likewise.
16620 (vsriq_n_u32): Likewise.
16621 (vsliq_n_u32): Likewise.
16622 (vshlq_m_r_u32): Likewise.
16623 (vrshlq_m_n_u32): Likewise.
16624 (vqshlq_m_r_u32): Likewise.
16625 (vqrshlq_m_n_u32): Likewise.
16626 (vminavq_p_s32): Likewise.
16627 (vminaq_m_s32): Likewise.
16628 (vmaxavq_p_s32): Likewise.
16629 (vmaxaq_m_s32): Likewise.
16630 (vcmpneq_m_s32): Likewise.
16631 (vcmpneq_m_n_s32): Likewise.
16632 (vcmpltq_m_s32): Likewise.
16633 (vcmpltq_m_n_s32): Likewise.
16634 (vcmpleq_m_s32): Likewise.
16635 (vcmpleq_m_n_s32): Likewise.
16636 (vcmpgtq_m_s32): Likewise.
16637 (vcmpgtq_m_n_s32): Likewise.
16638 (vcmpgeq_m_s32): Likewise.
16639 (vcmpgeq_m_n_s32): Likewise.
16640 (vcmpeqq_m_s32): Likewise.
16641 (vcmpeqq_m_n_s32): Likewise.
16642 (vshlq_m_r_s32): Likewise.
16643 (vrshlq_m_n_s32): Likewise.
16644 (vrev64q_m_s32): Likewise.
16645 (vqshlq_m_r_s32): Likewise.
16646 (vqrshlq_m_n_s32): Likewise.
16647 (vqnegq_m_s32): Likewise.
16648 (vqabsq_m_s32): Likewise.
16649 (vnegq_m_s32): Likewise.
16650 (vmvnq_m_s32): Likewise.
16651 (vmlsdavxq_p_s32): Likewise.
16652 (vmlsdavq_p_s32): Likewise.
16653 (vmladavxq_p_s32): Likewise.
16654 (vmladavq_p_s32): Likewise.
16655 (vminvq_p_s32): Likewise.
16656 (vmaxvq_p_s32): Likewise.
16657 (vdupq_m_n_s32): Likewise.
16658 (vclzq_m_s32): Likewise.
16659 (vclsq_m_s32): Likewise.
16660 (vaddvaq_p_s32): Likewise.
16661 (vabsq_m_s32): Likewise.
16662 (vqrdmlsdhxq_s32): Likewise.
16663 (vqrdmlsdhq_s32): Likewise.
16664 (vqrdmlashq_n_s32): Likewise.
16665 (vqrdmlahq_n_s32): Likewise.
16666 (vqrdmladhxq_s32): Likewise.
16667 (vqrdmladhq_s32): Likewise.
16668 (vqdmlsdhxq_s32): Likewise.
16669 (vqdmlsdhq_s32): Likewise.
16670 (vqdmlahq_n_s32): Likewise.
16671 (vqdmladhxq_s32): Likewise.
16672 (vqdmladhq_s32): Likewise.
16673 (vmlsdavaxq_s32): Likewise.
16674 (vmlsdavaq_s32): Likewise.
16675 (vmlasq_n_s32): Likewise.
16676 (vmlaq_n_s32): Likewise.
16677 (vmladavaxq_s32): Likewise.
16678 (vmladavaq_s32): Likewise.
16679 (vsriq_n_s32): Likewise.
16680 (vsliq_n_s32): Likewise.
16681 (vpselq_u64): Likewise.
16682 (vpselq_s64): Likewise.
16683 (__arm_vpselq_u8): Define intrinsic.
16684 (__arm_vpselq_s8): Likewise.
16685 (__arm_vrev64q_m_u8): Likewise.
16686 (__arm_vqrdmlashq_n_u8): Likewise.
16687 (__arm_vqrdmlahq_n_u8): Likewise.
16688 (__arm_vqdmlahq_n_u8): Likewise.
16689 (__arm_vmvnq_m_u8): Likewise.
16690 (__arm_vmlasq_n_u8): Likewise.
16691 (__arm_vmlaq_n_u8): Likewise.
16692 (__arm_vmladavq_p_u8): Likewise.
16693 (__arm_vmladavaq_u8): Likewise.
16694 (__arm_vminvq_p_u8): Likewise.
16695 (__arm_vmaxvq_p_u8): Likewise.
16696 (__arm_vdupq_m_n_u8): Likewise.
16697 (__arm_vcmpneq_m_u8): Likewise.
16698 (__arm_vcmpneq_m_n_u8): Likewise.
16699 (__arm_vcmphiq_m_u8): Likewise.
16700 (__arm_vcmphiq_m_n_u8): Likewise.
16701 (__arm_vcmpeqq_m_u8): Likewise.
16702 (__arm_vcmpeqq_m_n_u8): Likewise.
16703 (__arm_vcmpcsq_m_u8): Likewise.
16704 (__arm_vcmpcsq_m_n_u8): Likewise.
16705 (__arm_vclzq_m_u8): Likewise.
16706 (__arm_vaddvaq_p_u8): Likewise.
16707 (__arm_vsriq_n_u8): Likewise.
16708 (__arm_vsliq_n_u8): Likewise.
16709 (__arm_vshlq_m_r_u8): Likewise.
16710 (__arm_vrshlq_m_n_u8): Likewise.
16711 (__arm_vqshlq_m_r_u8): Likewise.
16712 (__arm_vqrshlq_m_n_u8): Likewise.
16713 (__arm_vminavq_p_s8): Likewise.
16714 (__arm_vminaq_m_s8): Likewise.
16715 (__arm_vmaxavq_p_s8): Likewise.
16716 (__arm_vmaxaq_m_s8): Likewise.
16717 (__arm_vcmpneq_m_s8): Likewise.
16718 (__arm_vcmpneq_m_n_s8): Likewise.
16719 (__arm_vcmpltq_m_s8): Likewise.
16720 (__arm_vcmpltq_m_n_s8): Likewise.
16721 (__arm_vcmpleq_m_s8): Likewise.
16722 (__arm_vcmpleq_m_n_s8): Likewise.
16723 (__arm_vcmpgtq_m_s8): Likewise.
16724 (__arm_vcmpgtq_m_n_s8): Likewise.
16725 (__arm_vcmpgeq_m_s8): Likewise.
16726 (__arm_vcmpgeq_m_n_s8): Likewise.
16727 (__arm_vcmpeqq_m_s8): Likewise.
16728 (__arm_vcmpeqq_m_n_s8): Likewise.
16729 (__arm_vshlq_m_r_s8): Likewise.
16730 (__arm_vrshlq_m_n_s8): Likewise.
16731 (__arm_vrev64q_m_s8): Likewise.
16732 (__arm_vqshlq_m_r_s8): Likewise.
16733 (__arm_vqrshlq_m_n_s8): Likewise.
16734 (__arm_vqnegq_m_s8): Likewise.
16735 (__arm_vqabsq_m_s8): Likewise.
16736 (__arm_vnegq_m_s8): Likewise.
16737 (__arm_vmvnq_m_s8): Likewise.
16738 (__arm_vmlsdavxq_p_s8): Likewise.
16739 (__arm_vmlsdavq_p_s8): Likewise.
16740 (__arm_vmladavxq_p_s8): Likewise.
16741 (__arm_vmladavq_p_s8): Likewise.
16742 (__arm_vminvq_p_s8): Likewise.
16743 (__arm_vmaxvq_p_s8): Likewise.
16744 (__arm_vdupq_m_n_s8): Likewise.
16745 (__arm_vclzq_m_s8): Likewise.
16746 (__arm_vclsq_m_s8): Likewise.
16747 (__arm_vaddvaq_p_s8): Likewise.
16748 (__arm_vabsq_m_s8): Likewise.
16749 (__arm_vqrdmlsdhxq_s8): Likewise.
16750 (__arm_vqrdmlsdhq_s8): Likewise.
16751 (__arm_vqrdmlashq_n_s8): Likewise.
16752 (__arm_vqrdmlahq_n_s8): Likewise.
16753 (__arm_vqrdmladhxq_s8): Likewise.
16754 (__arm_vqrdmladhq_s8): Likewise.
16755 (__arm_vqdmlsdhxq_s8): Likewise.
16756 (__arm_vqdmlsdhq_s8): Likewise.
16757 (__arm_vqdmlahq_n_s8): Likewise.
16758 (__arm_vqdmladhxq_s8): Likewise.
16759 (__arm_vqdmladhq_s8): Likewise.
16760 (__arm_vmlsdavaxq_s8): Likewise.
16761 (__arm_vmlsdavaq_s8): Likewise.
16762 (__arm_vmlasq_n_s8): Likewise.
16763 (__arm_vmlaq_n_s8): Likewise.
16764 (__arm_vmladavaxq_s8): Likewise.
16765 (__arm_vmladavaq_s8): Likewise.
16766 (__arm_vsriq_n_s8): Likewise.
16767 (__arm_vsliq_n_s8): Likewise.
16768 (__arm_vpselq_u16): Likewise.
16769 (__arm_vpselq_s16): Likewise.
16770 (__arm_vrev64q_m_u16): Likewise.
16771 (__arm_vqrdmlashq_n_u16): Likewise.
16772 (__arm_vqrdmlahq_n_u16): Likewise.
16773 (__arm_vqdmlahq_n_u16): Likewise.
16774 (__arm_vmvnq_m_u16): Likewise.
16775 (__arm_vmlasq_n_u16): Likewise.
16776 (__arm_vmlaq_n_u16): Likewise.
16777 (__arm_vmladavq_p_u16): Likewise.
16778 (__arm_vmladavaq_u16): Likewise.
16779 (__arm_vminvq_p_u16): Likewise.
16780 (__arm_vmaxvq_p_u16): Likewise.
16781 (__arm_vdupq_m_n_u16): Likewise.
16782 (__arm_vcmpneq_m_u16): Likewise.
16783 (__arm_vcmpneq_m_n_u16): Likewise.
16784 (__arm_vcmphiq_m_u16): Likewise.
16785 (__arm_vcmphiq_m_n_u16): Likewise.
16786 (__arm_vcmpeqq_m_u16): Likewise.
16787 (__arm_vcmpeqq_m_n_u16): Likewise.
16788 (__arm_vcmpcsq_m_u16): Likewise.
16789 (__arm_vcmpcsq_m_n_u16): Likewise.
16790 (__arm_vclzq_m_u16): Likewise.
16791 (__arm_vaddvaq_p_u16): Likewise.
16792 (__arm_vsriq_n_u16): Likewise.
16793 (__arm_vsliq_n_u16): Likewise.
16794 (__arm_vshlq_m_r_u16): Likewise.
16795 (__arm_vrshlq_m_n_u16): Likewise.
16796 (__arm_vqshlq_m_r_u16): Likewise.
16797 (__arm_vqrshlq_m_n_u16): Likewise.
16798 (__arm_vminavq_p_s16): Likewise.
16799 (__arm_vminaq_m_s16): Likewise.
16800 (__arm_vmaxavq_p_s16): Likewise.
16801 (__arm_vmaxaq_m_s16): Likewise.
16802 (__arm_vcmpneq_m_s16): Likewise.
16803 (__arm_vcmpneq_m_n_s16): Likewise.
16804 (__arm_vcmpltq_m_s16): Likewise.
16805 (__arm_vcmpltq_m_n_s16): Likewise.
16806 (__arm_vcmpleq_m_s16): Likewise.
16807 (__arm_vcmpleq_m_n_s16): Likewise.
16808 (__arm_vcmpgtq_m_s16): Likewise.
16809 (__arm_vcmpgtq_m_n_s16): Likewise.
16810 (__arm_vcmpgeq_m_s16): Likewise.
16811 (__arm_vcmpgeq_m_n_s16): Likewise.
16812 (__arm_vcmpeqq_m_s16): Likewise.
16813 (__arm_vcmpeqq_m_n_s16): Likewise.
16814 (__arm_vshlq_m_r_s16): Likewise.
16815 (__arm_vrshlq_m_n_s16): Likewise.
16816 (__arm_vrev64q_m_s16): Likewise.
16817 (__arm_vqshlq_m_r_s16): Likewise.
16818 (__arm_vqrshlq_m_n_s16): Likewise.
16819 (__arm_vqnegq_m_s16): Likewise.
16820 (__arm_vqabsq_m_s16): Likewise.
16821 (__arm_vnegq_m_s16): Likewise.
16822 (__arm_vmvnq_m_s16): Likewise.
16823 (__arm_vmlsdavxq_p_s16): Likewise.
16824 (__arm_vmlsdavq_p_s16): Likewise.
16825 (__arm_vmladavxq_p_s16): Likewise.
16826 (__arm_vmladavq_p_s16): Likewise.
16827 (__arm_vminvq_p_s16): Likewise.
16828 (__arm_vmaxvq_p_s16): Likewise.
16829 (__arm_vdupq_m_n_s16): Likewise.
16830 (__arm_vclzq_m_s16): Likewise.
16831 (__arm_vclsq_m_s16): Likewise.
16832 (__arm_vaddvaq_p_s16): Likewise.
16833 (__arm_vabsq_m_s16): Likewise.
16834 (__arm_vqrdmlsdhxq_s16): Likewise.
16835 (__arm_vqrdmlsdhq_s16): Likewise.
16836 (__arm_vqrdmlashq_n_s16): Likewise.
16837 (__arm_vqrdmlahq_n_s16): Likewise.
16838 (__arm_vqrdmladhxq_s16): Likewise.
16839 (__arm_vqrdmladhq_s16): Likewise.
16840 (__arm_vqdmlsdhxq_s16): Likewise.
16841 (__arm_vqdmlsdhq_s16): Likewise.
16842 (__arm_vqdmlahq_n_s16): Likewise.
16843 (__arm_vqdmladhxq_s16): Likewise.
16844 (__arm_vqdmladhq_s16): Likewise.
16845 (__arm_vmlsdavaxq_s16): Likewise.
16846 (__arm_vmlsdavaq_s16): Likewise.
16847 (__arm_vmlasq_n_s16): Likewise.
16848 (__arm_vmlaq_n_s16): Likewise.
16849 (__arm_vmladavaxq_s16): Likewise.
16850 (__arm_vmladavaq_s16): Likewise.
16851 (__arm_vsriq_n_s16): Likewise.
16852 (__arm_vsliq_n_s16): Likewise.
16853 (__arm_vpselq_u32): Likewise.
16854 (__arm_vpselq_s32): Likewise.
16855 (__arm_vrev64q_m_u32): Likewise.
16856 (__arm_vqrdmlashq_n_u32): Likewise.
16857 (__arm_vqrdmlahq_n_u32): Likewise.
16858 (__arm_vqdmlahq_n_u32): Likewise.
16859 (__arm_vmvnq_m_u32): Likewise.
16860 (__arm_vmlasq_n_u32): Likewise.
16861 (__arm_vmlaq_n_u32): Likewise.
16862 (__arm_vmladavq_p_u32): Likewise.
16863 (__arm_vmladavaq_u32): Likewise.
16864 (__arm_vminvq_p_u32): Likewise.
16865 (__arm_vmaxvq_p_u32): Likewise.
16866 (__arm_vdupq_m_n_u32): Likewise.
16867 (__arm_vcmpneq_m_u32): Likewise.
16868 (__arm_vcmpneq_m_n_u32): Likewise.
16869 (__arm_vcmphiq_m_u32): Likewise.
16870 (__arm_vcmphiq_m_n_u32): Likewise.
16871 (__arm_vcmpeqq_m_u32): Likewise.
16872 (__arm_vcmpeqq_m_n_u32): Likewise.
16873 (__arm_vcmpcsq_m_u32): Likewise.
16874 (__arm_vcmpcsq_m_n_u32): Likewise.
16875 (__arm_vclzq_m_u32): Likewise.
16876 (__arm_vaddvaq_p_u32): Likewise.
16877 (__arm_vsriq_n_u32): Likewise.
16878 (__arm_vsliq_n_u32): Likewise.
16879 (__arm_vshlq_m_r_u32): Likewise.
16880 (__arm_vrshlq_m_n_u32): Likewise.
16881 (__arm_vqshlq_m_r_u32): Likewise.
16882 (__arm_vqrshlq_m_n_u32): Likewise.
16883 (__arm_vminavq_p_s32): Likewise.
16884 (__arm_vminaq_m_s32): Likewise.
16885 (__arm_vmaxavq_p_s32): Likewise.
16886 (__arm_vmaxaq_m_s32): Likewise.
16887 (__arm_vcmpneq_m_s32): Likewise.
16888 (__arm_vcmpneq_m_n_s32): Likewise.
16889 (__arm_vcmpltq_m_s32): Likewise.
16890 (__arm_vcmpltq_m_n_s32): Likewise.
16891 (__arm_vcmpleq_m_s32): Likewise.
16892 (__arm_vcmpleq_m_n_s32): Likewise.
16893 (__arm_vcmpgtq_m_s32): Likewise.
16894 (__arm_vcmpgtq_m_n_s32): Likewise.
16895 (__arm_vcmpgeq_m_s32): Likewise.
16896 (__arm_vcmpgeq_m_n_s32): Likewise.
16897 (__arm_vcmpeqq_m_s32): Likewise.
16898 (__arm_vcmpeqq_m_n_s32): Likewise.
16899 (__arm_vshlq_m_r_s32): Likewise.
16900 (__arm_vrshlq_m_n_s32): Likewise.
16901 (__arm_vrev64q_m_s32): Likewise.
16902 (__arm_vqshlq_m_r_s32): Likewise.
16903 (__arm_vqrshlq_m_n_s32): Likewise.
16904 (__arm_vqnegq_m_s32): Likewise.
16905 (__arm_vqabsq_m_s32): Likewise.
16906 (__arm_vnegq_m_s32): Likewise.
16907 (__arm_vmvnq_m_s32): Likewise.
16908 (__arm_vmlsdavxq_p_s32): Likewise.
16909 (__arm_vmlsdavq_p_s32): Likewise.
16910 (__arm_vmladavxq_p_s32): Likewise.
16911 (__arm_vmladavq_p_s32): Likewise.
16912 (__arm_vminvq_p_s32): Likewise.
16913 (__arm_vmaxvq_p_s32): Likewise.
16914 (__arm_vdupq_m_n_s32): Likewise.
16915 (__arm_vclzq_m_s32): Likewise.
16916 (__arm_vclsq_m_s32): Likewise.
16917 (__arm_vaddvaq_p_s32): Likewise.
16918 (__arm_vabsq_m_s32): Likewise.
16919 (__arm_vqrdmlsdhxq_s32): Likewise.
16920 (__arm_vqrdmlsdhq_s32): Likewise.
16921 (__arm_vqrdmlashq_n_s32): Likewise.
16922 (__arm_vqrdmlahq_n_s32): Likewise.
16923 (__arm_vqrdmladhxq_s32): Likewise.
16924 (__arm_vqrdmladhq_s32): Likewise.
16925 (__arm_vqdmlsdhxq_s32): Likewise.
16926 (__arm_vqdmlsdhq_s32): Likewise.
16927 (__arm_vqdmlahq_n_s32): Likewise.
16928 (__arm_vqdmladhxq_s32): Likewise.
16929 (__arm_vqdmladhq_s32): Likewise.
16930 (__arm_vmlsdavaxq_s32): Likewise.
16931 (__arm_vmlsdavaq_s32): Likewise.
16932 (__arm_vmlasq_n_s32): Likewise.
16933 (__arm_vmlaq_n_s32): Likewise.
16934 (__arm_vmladavaxq_s32): Likewise.
16935 (__arm_vmladavaq_s32): Likewise.
16936 (__arm_vsriq_n_s32): Likewise.
16937 (__arm_vsliq_n_s32): Likewise.
16938 (__arm_vpselq_u64): Likewise.
16939 (__arm_vpselq_s64): Likewise.
16940 (vcmpneq_m_n): Define polymorphic variant.
16941 (vcmpneq_m): Likewise.
16942 (vqrdmlsdhq): Likewise.
16943 (vqrdmlsdhxq): Likewise.
16944 (vqrshlq_m_n): Likewise.
16945 (vqshlq_m_r): Likewise.
16946 (vrev64q_m): Likewise.
16947 (vrshlq_m_n): Likewise.
16948 (vshlq_m_r): Likewise.
16949 (vsliq_n): Likewise.
16950 (vsriq_n): Likewise.
16951 (vqrdmlashq_n): Likewise.
16952 (vqrdmlahq): Likewise.
16953 (vqrdmladhxq): Likewise.
16954 (vqrdmladhq): Likewise.
16955 (vqnegq_m): Likewise.
16956 (vqdmlsdhxq): Likewise.
16957 (vabsq_m): Likewise.
16958 (vclsq_m): Likewise.
16959 (vclzq_m): Likewise.
16960 (vcmpgeq_m): Likewise.
16961 (vcmpgeq_m_n): Likewise.
16962 (vdupq_m_n): Likewise.
16963 (vmaxaq_m): Likewise.
16964 (vmlaq_n): Likewise.
16965 (vmlasq_n): Likewise.
16966 (vmvnq_m): Likewise.
16967 (vnegq_m): Likewise.
16968 (vpselq): Likewise.
16969 (vqdmlahq_n): Likewise.
16970 (vqrdmlahq_n): Likewise.
16971 (vqdmlsdhq): Likewise.
16972 (vqdmladhq): Likewise.
16973 (vqabsq_m): Likewise.
16974 (vminaq_m): Likewise.
16975 (vrmlaldavhaq): Likewise.
16976 (vmlsdavxq_p): Likewise.
16977 (vmlsdavq_p): Likewise.
16978 (vmlsdavaxq): Likewise.
16979 (vmlsdavaq): Likewise.
16980 (vaddvaq_p): Likewise.
16981 (vcmpcsq_m_n): Likewise.
16982 (vcmpcsq_m): Likewise.
16983 (vcmpeqq_m_n): Likewise.
16984 (vcmpeqq_m): Likewise.
16985 (vmladavxq_p): Likewise.
16986 (vmladavq_p): Likewise.
16987 (vmladavaxq): Likewise.
16988 (vmladavaq): Likewise.
16989 (vminvq_p): Likewise.
16990 (vminavq_p): Likewise.
16991 (vmaxvq_p): Likewise.
16992 (vmaxavq_p): Likewise.
16993 (vcmpltq_m_n): Likewise.
16994 (vcmpltq_m): Likewise.
16995 (vcmpleq_m): Likewise.
16996 (vcmpleq_m_n): Likewise.
16997 (vcmphiq_m_n): Likewise.
16998 (vcmphiq_m): Likewise.
16999 (vcmpgtq_m_n): Likewise.
17000 (vcmpgtq_m): Likewise.
17001 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
17003 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
17004 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
17005 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
17006 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
17007 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
17008 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
17009 * config/arm/constraints.md (Rc): Define constraint to check constant is
17010 in the range of 0 to 15.
17011 (Re): Define constraint to check constant is in the range of 0 to 31.
17012 * config/arm/mve.md (VADDVAQ_P): Define iterator.
17013 (VCLZQ_M): Likewise.
17014 (VCMPEQQ_M_N): Likewise.
17015 (VCMPEQQ_M): Likewise.
17016 (VCMPNEQ_M_N): Likewise.
17017 (VCMPNEQ_M): Likewise.
17018 (VDUPQ_M_N): Likewise.
17019 (VMAXVQ_P): Likewise.
17020 (VMINVQ_P): Likewise.
17021 (VMLADAVAQ): Likewise.
17022 (VMLADAVQ_P): Likewise.
17023 (VMLAQ_N): Likewise.
17024 (VMLASQ_N): Likewise.
17025 (VMVNQ_M): Likewise.
17026 (VPSELQ): Likewise.
17027 (VQDMLAHQ_N): Likewise.
17028 (VQRDMLAHQ_N): Likewise.
17029 (VQRDMLASHQ_N): Likewise.
17030 (VQRSHLQ_M_N): Likewise.
17031 (VQSHLQ_M_R): Likewise.
17032 (VREV64Q_M): Likewise.
17033 (VRSHLQ_M_N): Likewise.
17034 (VSHLQ_M_R): Likewise.
17035 (VSLIQ_N): Likewise.
17036 (VSRIQ_N): Likewise.
17037 (mve_vabsq_m_s<mode>): Define RTL pattern.
17038 (mve_vaddvaq_p_<supf><mode>): Likewise.
17039 (mve_vclsq_m_s<mode>): Likewise.
17040 (mve_vclzq_m_<supf><mode>): Likewise.
17041 (mve_vcmpcsq_m_n_u<mode>): Likewise.
17042 (mve_vcmpcsq_m_u<mode>): Likewise.
17043 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
17044 (mve_vcmpeqq_m_<supf><mode>): Likewise.
17045 (mve_vcmpgeq_m_n_s<mode>): Likewise.
17046 (mve_vcmpgeq_m_s<mode>): Likewise.
17047 (mve_vcmpgtq_m_n_s<mode>): Likewise.
17048 (mve_vcmpgtq_m_s<mode>): Likewise.
17049 (mve_vcmphiq_m_n_u<mode>): Likewise.
17050 (mve_vcmphiq_m_u<mode>): Likewise.
17051 (mve_vcmpleq_m_n_s<mode>): Likewise.
17052 (mve_vcmpleq_m_s<mode>): Likewise.
17053 (mve_vcmpltq_m_n_s<mode>): Likewise.
17054 (mve_vcmpltq_m_s<mode>): Likewise.
17055 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
17056 (mve_vcmpneq_m_<supf><mode>): Likewise.
17057 (mve_vdupq_m_n_<supf><mode>): Likewise.
17058 (mve_vmaxaq_m_s<mode>): Likewise.
17059 (mve_vmaxavq_p_s<mode>): Likewise.
17060 (mve_vmaxvq_p_<supf><mode>): Likewise.
17061 (mve_vminaq_m_s<mode>): Likewise.
17062 (mve_vminavq_p_s<mode>): Likewise.
17063 (mve_vminvq_p_<supf><mode>): Likewise.
17064 (mve_vmladavaq_<supf><mode>): Likewise.
17065 (mve_vmladavq_p_<supf><mode>): Likewise.
17066 (mve_vmladavxq_p_s<mode>): Likewise.
17067 (mve_vmlaq_n_<supf><mode>): Likewise.
17068 (mve_vmlasq_n_<supf><mode>): Likewise.
17069 (mve_vmlsdavq_p_s<mode>): Likewise.
17070 (mve_vmlsdavxq_p_s<mode>): Likewise.
17071 (mve_vmvnq_m_<supf><mode>): Likewise.
17072 (mve_vnegq_m_s<mode>): Likewise.
17073 (mve_vpselq_<supf><mode>): Likewise.
17074 (mve_vqabsq_m_s<mode>): Likewise.
17075 (mve_vqdmlahq_n_<supf><mode>): Likewise.
17076 (mve_vqnegq_m_s<mode>): Likewise.
17077 (mve_vqrdmladhq_s<mode>): Likewise.
17078 (mve_vqrdmladhxq_s<mode>): Likewise.
17079 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
17080 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
17081 (mve_vqrdmlsdhq_s<mode>): Likewise.
17082 (mve_vqrdmlsdhxq_s<mode>): Likewise.
17083 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
17084 (mve_vqshlq_m_r_<supf><mode>): Likewise.
17085 (mve_vrev64q_m_<supf><mode>): Likewise.
17086 (mve_vrshlq_m_n_<supf><mode>): Likewise.
17087 (mve_vshlq_m_r_<supf><mode>): Likewise.
17088 (mve_vsliq_n_<supf><mode>): Likewise.
17089 (mve_vsriq_n_<supf><mode>): Likewise.
17090 (mve_vqdmlsdhxq_s<mode>): Likewise.
17091 (mve_vqdmlsdhq_s<mode>): Likewise.
17092 (mve_vqdmladhxq_s<mode>): Likewise.
17093 (mve_vqdmladhq_s<mode>): Likewise.
17094 (mve_vmlsdavaxq_s<mode>): Likewise.
17095 (mve_vmlsdavaq_s<mode>): Likewise.
17096 (mve_vmladavaxq_s<mode>): Likewise.
17097 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
17098 matching constraint Rc.
17099 (mve_imm_31): Define predicate to check the matching constraint Re.
17101 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
17103 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
17104 (vec_cmp<mode>di_dup): Likewise.
17105 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
17107 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
17109 * config/gcn/gcn-valu.md (COND_MODE): Delete.
17110 (COND_INT_MODE): Delete.
17111 (cond_op): Add "mult".
17112 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
17113 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
17115 2020-03-18 Richard Biener <rguenther@suse.de>
17117 PR middle-end/94206
17118 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
17119 partial int modes or not mode-precision integer types for
17122 2020-03-18 Jakub Jelinek <jakub@redhat.com>
17124 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
17126 * config/arc/arc.c (frame_stack_add): Likewise.
17127 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
17129 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
17130 * tree-ssa-strlen.h (handle_printf_call): Likewise.
17131 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
17132 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
17134 2020-03-18 Duan bo <duanbo3@huawei.com>
17137 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
17138 (@ldr_got_tiny_<mode>): New pattern.
17139 (ldr_got_tiny_sidi): Likewise.
17140 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
17141 them to handle SYMBOL_TINY_GOT for ILP32.
17143 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
17145 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
17146 call-preserved for SVE PCS functions.
17147 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
17148 Optimize the case in which there are no following vector save slots.
17150 2020-03-18 Richard Biener <rguenther@suse.de>
17152 PR middle-end/94188
17153 * fold-const.c (build_fold_addr_expr): Convert address to
17155 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
17156 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
17157 to build the ADDR_EXPR which we don't really want to simplify.
17158 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
17159 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
17160 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
17161 (simplify_builtin_call): Strip useless type conversions.
17162 * tree-ssa-strlen.c (new_strinfo): Likewise.
17164 2020-03-17 Alexey Neyman <stilor@att.net>
17167 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
17168 the debug level is terse and the declaration is public. Do not
17169 generate type info.
17170 (dwarf2out_decl): Same.
17171 (add_type_attribute): Return immediately if debug level is
17174 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
17176 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
17178 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17179 Mihail Ionescu <mihail.ionescu@arm.com>
17180 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17182 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
17183 Define qualifier for ternary operands.
17184 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
17185 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17186 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17187 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
17188 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
17189 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
17190 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17191 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
17192 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17193 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
17194 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
17195 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17196 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
17197 * config/arm/arm_mve.h (vabavq_s8): Define macro.
17198 (vabavq_s16): Likewise.
17199 (vabavq_s32): Likewise.
17200 (vbicq_m_n_s16): Likewise.
17201 (vbicq_m_n_s32): Likewise.
17202 (vbicq_m_n_u16): Likewise.
17203 (vbicq_m_n_u32): Likewise.
17204 (vcmpeqq_m_f16): Likewise.
17205 (vcmpeqq_m_f32): Likewise.
17206 (vcvtaq_m_s16_f16): Likewise.
17207 (vcvtaq_m_u16_f16): Likewise.
17208 (vcvtaq_m_s32_f32): Likewise.
17209 (vcvtaq_m_u32_f32): Likewise.
17210 (vcvtq_m_f16_s16): Likewise.
17211 (vcvtq_m_f16_u16): Likewise.
17212 (vcvtq_m_f32_s32): Likewise.
17213 (vcvtq_m_f32_u32): Likewise.
17214 (vqrshrnbq_n_s16): Likewise.
17215 (vqrshrnbq_n_u16): Likewise.
17216 (vqrshrnbq_n_s32): Likewise.
17217 (vqrshrnbq_n_u32): Likewise.
17218 (vqrshrunbq_n_s16): Likewise.
17219 (vqrshrunbq_n_s32): Likewise.
17220 (vrmlaldavhaq_s32): Likewise.
17221 (vrmlaldavhaq_u32): Likewise.
17222 (vshlcq_s8): Likewise.
17223 (vshlcq_u8): Likewise.
17224 (vshlcq_s16): Likewise.
17225 (vshlcq_u16): Likewise.
17226 (vshlcq_s32): Likewise.
17227 (vshlcq_u32): Likewise.
17228 (vabavq_u8): Likewise.
17229 (vabavq_u16): Likewise.
17230 (vabavq_u32): Likewise.
17231 (__arm_vabavq_s8): Define intrinsic.
17232 (__arm_vabavq_s16): Likewise.
17233 (__arm_vabavq_s32): Likewise.
17234 (__arm_vabavq_u8): Likewise.
17235 (__arm_vabavq_u16): Likewise.
17236 (__arm_vabavq_u32): Likewise.
17237 (__arm_vbicq_m_n_s16): Likewise.
17238 (__arm_vbicq_m_n_s32): Likewise.
17239 (__arm_vbicq_m_n_u16): Likewise.
17240 (__arm_vbicq_m_n_u32): Likewise.
17241 (__arm_vqrshrnbq_n_s16): Likewise.
17242 (__arm_vqrshrnbq_n_u16): Likewise.
17243 (__arm_vqrshrnbq_n_s32): Likewise.
17244 (__arm_vqrshrnbq_n_u32): Likewise.
17245 (__arm_vqrshrunbq_n_s16): Likewise.
17246 (__arm_vqrshrunbq_n_s32): Likewise.
17247 (__arm_vrmlaldavhaq_s32): Likewise.
17248 (__arm_vrmlaldavhaq_u32): Likewise.
17249 (__arm_vshlcq_s8): Likewise.
17250 (__arm_vshlcq_u8): Likewise.
17251 (__arm_vshlcq_s16): Likewise.
17252 (__arm_vshlcq_u16): Likewise.
17253 (__arm_vshlcq_s32): Likewise.
17254 (__arm_vshlcq_u32): Likewise.
17255 (__arm_vcmpeqq_m_f16): Likewise.
17256 (__arm_vcmpeqq_m_f32): Likewise.
17257 (__arm_vcvtaq_m_s16_f16): Likewise.
17258 (__arm_vcvtaq_m_u16_f16): Likewise.
17259 (__arm_vcvtaq_m_s32_f32): Likewise.
17260 (__arm_vcvtaq_m_u32_f32): Likewise.
17261 (__arm_vcvtq_m_f16_s16): Likewise.
17262 (__arm_vcvtq_m_f16_u16): Likewise.
17263 (__arm_vcvtq_m_f32_s32): Likewise.
17264 (__arm_vcvtq_m_f32_u32): Likewise.
17265 (vcvtaq_m): Define polymorphic variant.
17266 (vcvtq_m): Likewise.
17267 (vabavq): Likewise.
17268 (vshlcq): Likewise.
17269 (vbicq_m_n): Likewise.
17270 (vqrshrnbq_n): Likewise.
17271 (vqrshrunbq_n): Likewise.
17272 * config/arm/arm_mve_builtins.def
17273 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
17274 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
17275 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17276 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17277 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
17278 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
17279 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
17280 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17281 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
17282 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17283 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
17284 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
17285 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17286 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
17287 * config/arm/mve.md (VBICQ_M_N): Define iterator.
17288 (VCVTAQ_M): Likewise.
17289 (VCVTQ_M_TO_F): Likewise.
17290 (VQRSHRNBQ_N): Likewise.
17291 (VABAVQ): Likewise.
17292 (VSHLCQ): Likewise.
17293 (VRMLALDAVHAQ): Likewise.
17294 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
17295 (mve_vcmpeqq_m_f<mode>): Likewise.
17296 (mve_vcvtaq_m_<supf><mode>): Likewise.
17297 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
17298 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
17299 (mve_vqrshrunbq_n_s<mode>): Likewise.
17300 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
17301 (mve_vabavq_<supf><mode>): Likewise.
17302 (mve_vshlcq_<supf><mode>): Likewise.
17303 (mve_vshlcq_<supf><mode>): Likewise.
17304 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
17305 (mve_vshlcq_carry_<supf><mode>): Likewise.
17307 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17308 Mihail Ionescu <mihail.ionescu@arm.com>
17309 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17311 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
17312 (vqmovnbq_u16): Likewise.
17313 (vmulltq_poly_p8): Likewise.
17314 (vmullbq_poly_p8): Likewise.
17315 (vmovntq_u16): Likewise.
17316 (vmovnbq_u16): Likewise.
17317 (vmlaldavxq_u16): Likewise.
17318 (vmlaldavq_u16): Likewise.
17319 (vqmovuntq_s16): Likewise.
17320 (vqmovunbq_s16): Likewise.
17321 (vshlltq_n_u8): Likewise.
17322 (vshllbq_n_u8): Likewise.
17323 (vorrq_n_u16): Likewise.
17324 (vbicq_n_u16): Likewise.
17325 (vcmpneq_n_f16): Likewise.
17326 (vcmpneq_f16): Likewise.
17327 (vcmpltq_n_f16): Likewise.
17328 (vcmpltq_f16): Likewise.
17329 (vcmpleq_n_f16): Likewise.
17330 (vcmpleq_f16): Likewise.
17331 (vcmpgtq_n_f16): Likewise.
17332 (vcmpgtq_f16): Likewise.
17333 (vcmpgeq_n_f16): Likewise.
17334 (vcmpgeq_f16): Likewise.
17335 (vcmpeqq_n_f16): Likewise.
17336 (vcmpeqq_f16): Likewise.
17337 (vsubq_f16): Likewise.
17338 (vqmovntq_s16): Likewise.
17339 (vqmovnbq_s16): Likewise.
17340 (vqdmulltq_s16): Likewise.
17341 (vqdmulltq_n_s16): Likewise.
17342 (vqdmullbq_s16): Likewise.
17343 (vqdmullbq_n_s16): Likewise.
17344 (vorrq_f16): Likewise.
17345 (vornq_f16): Likewise.
17346 (vmulq_n_f16): Likewise.
17347 (vmulq_f16): Likewise.
17348 (vmovntq_s16): Likewise.
17349 (vmovnbq_s16): Likewise.
17350 (vmlsldavxq_s16): Likewise.
17351 (vmlsldavq_s16): Likewise.
17352 (vmlaldavxq_s16): Likewise.
17353 (vmlaldavq_s16): Likewise.
17354 (vminnmvq_f16): Likewise.
17355 (vminnmq_f16): Likewise.
17356 (vminnmavq_f16): Likewise.
17357 (vminnmaq_f16): Likewise.
17358 (vmaxnmvq_f16): Likewise.
17359 (vmaxnmq_f16): Likewise.
17360 (vmaxnmavq_f16): Likewise.
17361 (vmaxnmaq_f16): Likewise.
17362 (veorq_f16): Likewise.
17363 (vcmulq_rot90_f16): Likewise.
17364 (vcmulq_rot270_f16): Likewise.
17365 (vcmulq_rot180_f16): Likewise.
17366 (vcmulq_f16): Likewise.
17367 (vcaddq_rot90_f16): Likewise.
17368 (vcaddq_rot270_f16): Likewise.
17369 (vbicq_f16): Likewise.
17370 (vandq_f16): Likewise.
17371 (vaddq_n_f16): Likewise.
17372 (vabdq_f16): Likewise.
17373 (vshlltq_n_s8): Likewise.
17374 (vshllbq_n_s8): Likewise.
17375 (vorrq_n_s16): Likewise.
17376 (vbicq_n_s16): Likewise.
17377 (vqmovntq_u32): Likewise.
17378 (vqmovnbq_u32): Likewise.
17379 (vmulltq_poly_p16): Likewise.
17380 (vmullbq_poly_p16): Likewise.
17381 (vmovntq_u32): Likewise.
17382 (vmovnbq_u32): Likewise.
17383 (vmlaldavxq_u32): Likewise.
17384 (vmlaldavq_u32): Likewise.
17385 (vqmovuntq_s32): Likewise.
17386 (vqmovunbq_s32): Likewise.
17387 (vshlltq_n_u16): Likewise.
17388 (vshllbq_n_u16): Likewise.
17389 (vorrq_n_u32): Likewise.
17390 (vbicq_n_u32): Likewise.
17391 (vcmpneq_n_f32): Likewise.
17392 (vcmpneq_f32): Likewise.
17393 (vcmpltq_n_f32): Likewise.
17394 (vcmpltq_f32): Likewise.
17395 (vcmpleq_n_f32): Likewise.
17396 (vcmpleq_f32): Likewise.
17397 (vcmpgtq_n_f32): Likewise.
17398 (vcmpgtq_f32): Likewise.
17399 (vcmpgeq_n_f32): Likewise.
17400 (vcmpgeq_f32): Likewise.
17401 (vcmpeqq_n_f32): Likewise.
17402 (vcmpeqq_f32): Likewise.
17403 (vsubq_f32): Likewise.
17404 (vqmovntq_s32): Likewise.
17405 (vqmovnbq_s32): Likewise.
17406 (vqdmulltq_s32): Likewise.
17407 (vqdmulltq_n_s32): Likewise.
17408 (vqdmullbq_s32): Likewise.
17409 (vqdmullbq_n_s32): Likewise.
17410 (vorrq_f32): Likewise.
17411 (vornq_f32): Likewise.
17412 (vmulq_n_f32): Likewise.
17413 (vmulq_f32): Likewise.
17414 (vmovntq_s32): Likewise.
17415 (vmovnbq_s32): Likewise.
17416 (vmlsldavxq_s32): Likewise.
17417 (vmlsldavq_s32): Likewise.
17418 (vmlaldavxq_s32): Likewise.
17419 (vmlaldavq_s32): Likewise.
17420 (vminnmvq_f32): Likewise.
17421 (vminnmq_f32): Likewise.
17422 (vminnmavq_f32): Likewise.
17423 (vminnmaq_f32): Likewise.
17424 (vmaxnmvq_f32): Likewise.
17425 (vmaxnmq_f32): Likewise.
17426 (vmaxnmavq_f32): Likewise.
17427 (vmaxnmaq_f32): Likewise.
17428 (veorq_f32): Likewise.
17429 (vcmulq_rot90_f32): Likewise.
17430 (vcmulq_rot270_f32): Likewise.
17431 (vcmulq_rot180_f32): Likewise.
17432 (vcmulq_f32): Likewise.
17433 (vcaddq_rot90_f32): Likewise.
17434 (vcaddq_rot270_f32): Likewise.
17435 (vbicq_f32): Likewise.
17436 (vandq_f32): Likewise.
17437 (vaddq_n_f32): Likewise.
17438 (vabdq_f32): Likewise.
17439 (vshlltq_n_s16): Likewise.
17440 (vshllbq_n_s16): Likewise.
17441 (vorrq_n_s32): Likewise.
17442 (vbicq_n_s32): Likewise.
17443 (vrmlaldavhq_u32): Likewise.
17444 (vctp8q_m): Likewise.
17445 (vctp64q_m): Likewise.
17446 (vctp32q_m): Likewise.
17447 (vctp16q_m): Likewise.
17448 (vaddlvaq_u32): Likewise.
17449 (vrmlsldavhxq_s32): Likewise.
17450 (vrmlsldavhq_s32): Likewise.
17451 (vrmlaldavhxq_s32): Likewise.
17452 (vrmlaldavhq_s32): Likewise.
17453 (vcvttq_f16_f32): Likewise.
17454 (vcvtbq_f16_f32): Likewise.
17455 (vaddlvaq_s32): Likewise.
17456 (__arm_vqmovntq_u16): Define intrinsic.
17457 (__arm_vqmovnbq_u16): Likewise.
17458 (__arm_vmulltq_poly_p8): Likewise.
17459 (__arm_vmullbq_poly_p8): Likewise.
17460 (__arm_vmovntq_u16): Likewise.
17461 (__arm_vmovnbq_u16): Likewise.
17462 (__arm_vmlaldavxq_u16): Likewise.
17463 (__arm_vmlaldavq_u16): Likewise.
17464 (__arm_vqmovuntq_s16): Likewise.
17465 (__arm_vqmovunbq_s16): Likewise.
17466 (__arm_vshlltq_n_u8): Likewise.
17467 (__arm_vshllbq_n_u8): Likewise.
17468 (__arm_vorrq_n_u16): Likewise.
17469 (__arm_vbicq_n_u16): Likewise.
17470 (__arm_vcmpneq_n_f16): Likewise.
17471 (__arm_vcmpneq_f16): Likewise.
17472 (__arm_vcmpltq_n_f16): Likewise.
17473 (__arm_vcmpltq_f16): Likewise.
17474 (__arm_vcmpleq_n_f16): Likewise.
17475 (__arm_vcmpleq_f16): Likewise.
17476 (__arm_vcmpgtq_n_f16): Likewise.
17477 (__arm_vcmpgtq_f16): Likewise.
17478 (__arm_vcmpgeq_n_f16): Likewise.
17479 (__arm_vcmpgeq_f16): Likewise.
17480 (__arm_vcmpeqq_n_f16): Likewise.
17481 (__arm_vcmpeqq_f16): Likewise.
17482 (__arm_vsubq_f16): Likewise.
17483 (__arm_vqmovntq_s16): Likewise.
17484 (__arm_vqmovnbq_s16): Likewise.
17485 (__arm_vqdmulltq_s16): Likewise.
17486 (__arm_vqdmulltq_n_s16): Likewise.
17487 (__arm_vqdmullbq_s16): Likewise.
17488 (__arm_vqdmullbq_n_s16): Likewise.
17489 (__arm_vorrq_f16): Likewise.
17490 (__arm_vornq_f16): Likewise.
17491 (__arm_vmulq_n_f16): Likewise.
17492 (__arm_vmulq_f16): Likewise.
17493 (__arm_vmovntq_s16): Likewise.
17494 (__arm_vmovnbq_s16): Likewise.
17495 (__arm_vmlsldavxq_s16): Likewise.
17496 (__arm_vmlsldavq_s16): Likewise.
17497 (__arm_vmlaldavxq_s16): Likewise.
17498 (__arm_vmlaldavq_s16): Likewise.
17499 (__arm_vminnmvq_f16): Likewise.
17500 (__arm_vminnmq_f16): Likewise.
17501 (__arm_vminnmavq_f16): Likewise.
17502 (__arm_vminnmaq_f16): Likewise.
17503 (__arm_vmaxnmvq_f16): Likewise.
17504 (__arm_vmaxnmq_f16): Likewise.
17505 (__arm_vmaxnmavq_f16): Likewise.
17506 (__arm_vmaxnmaq_f16): Likewise.
17507 (__arm_veorq_f16): Likewise.
17508 (__arm_vcmulq_rot90_f16): Likewise.
17509 (__arm_vcmulq_rot270_f16): Likewise.
17510 (__arm_vcmulq_rot180_f16): Likewise.
17511 (__arm_vcmulq_f16): Likewise.
17512 (__arm_vcaddq_rot90_f16): Likewise.
17513 (__arm_vcaddq_rot270_f16): Likewise.
17514 (__arm_vbicq_f16): Likewise.
17515 (__arm_vandq_f16): Likewise.
17516 (__arm_vaddq_n_f16): Likewise.
17517 (__arm_vabdq_f16): Likewise.
17518 (__arm_vshlltq_n_s8): Likewise.
17519 (__arm_vshllbq_n_s8): Likewise.
17520 (__arm_vorrq_n_s16): Likewise.
17521 (__arm_vbicq_n_s16): Likewise.
17522 (__arm_vqmovntq_u32): Likewise.
17523 (__arm_vqmovnbq_u32): Likewise.
17524 (__arm_vmulltq_poly_p16): Likewise.
17525 (__arm_vmullbq_poly_p16): Likewise.
17526 (__arm_vmovntq_u32): Likewise.
17527 (__arm_vmovnbq_u32): Likewise.
17528 (__arm_vmlaldavxq_u32): Likewise.
17529 (__arm_vmlaldavq_u32): Likewise.
17530 (__arm_vqmovuntq_s32): Likewise.
17531 (__arm_vqmovunbq_s32): Likewise.
17532 (__arm_vshlltq_n_u16): Likewise.
17533 (__arm_vshllbq_n_u16): Likewise.
17534 (__arm_vorrq_n_u32): Likewise.
17535 (__arm_vbicq_n_u32): Likewise.
17536 (__arm_vcmpneq_n_f32): Likewise.
17537 (__arm_vcmpneq_f32): Likewise.
17538 (__arm_vcmpltq_n_f32): Likewise.
17539 (__arm_vcmpltq_f32): Likewise.
17540 (__arm_vcmpleq_n_f32): Likewise.
17541 (__arm_vcmpleq_f32): Likewise.
17542 (__arm_vcmpgtq_n_f32): Likewise.
17543 (__arm_vcmpgtq_f32): Likewise.
17544 (__arm_vcmpgeq_n_f32): Likewise.
17545 (__arm_vcmpgeq_f32): Likewise.
17546 (__arm_vcmpeqq_n_f32): Likewise.
17547 (__arm_vcmpeqq_f32): Likewise.
17548 (__arm_vsubq_f32): Likewise.
17549 (__arm_vqmovntq_s32): Likewise.
17550 (__arm_vqmovnbq_s32): Likewise.
17551 (__arm_vqdmulltq_s32): Likewise.
17552 (__arm_vqdmulltq_n_s32): Likewise.
17553 (__arm_vqdmullbq_s32): Likewise.
17554 (__arm_vqdmullbq_n_s32): Likewise.
17555 (__arm_vorrq_f32): Likewise.
17556 (__arm_vornq_f32): Likewise.
17557 (__arm_vmulq_n_f32): Likewise.
17558 (__arm_vmulq_f32): Likewise.
17559 (__arm_vmovntq_s32): Likewise.
17560 (__arm_vmovnbq_s32): Likewise.
17561 (__arm_vmlsldavxq_s32): Likewise.
17562 (__arm_vmlsldavq_s32): Likewise.
17563 (__arm_vmlaldavxq_s32): Likewise.
17564 (__arm_vmlaldavq_s32): Likewise.
17565 (__arm_vminnmvq_f32): Likewise.
17566 (__arm_vminnmq_f32): Likewise.
17567 (__arm_vminnmavq_f32): Likewise.
17568 (__arm_vminnmaq_f32): Likewise.
17569 (__arm_vmaxnmvq_f32): Likewise.
17570 (__arm_vmaxnmq_f32): Likewise.
17571 (__arm_vmaxnmavq_f32): Likewise.
17572 (__arm_vmaxnmaq_f32): Likewise.
17573 (__arm_veorq_f32): Likewise.
17574 (__arm_vcmulq_rot90_f32): Likewise.
17575 (__arm_vcmulq_rot270_f32): Likewise.
17576 (__arm_vcmulq_rot180_f32): Likewise.
17577 (__arm_vcmulq_f32): Likewise.
17578 (__arm_vcaddq_rot90_f32): Likewise.
17579 (__arm_vcaddq_rot270_f32): Likewise.
17580 (__arm_vbicq_f32): Likewise.
17581 (__arm_vandq_f32): Likewise.
17582 (__arm_vaddq_n_f32): Likewise.
17583 (__arm_vabdq_f32): Likewise.
17584 (__arm_vshlltq_n_s16): Likewise.
17585 (__arm_vshllbq_n_s16): Likewise.
17586 (__arm_vorrq_n_s32): Likewise.
17587 (__arm_vbicq_n_s32): Likewise.
17588 (__arm_vrmlaldavhq_u32): Likewise.
17589 (__arm_vctp8q_m): Likewise.
17590 (__arm_vctp64q_m): Likewise.
17591 (__arm_vctp32q_m): Likewise.
17592 (__arm_vctp16q_m): Likewise.
17593 (__arm_vaddlvaq_u32): Likewise.
17594 (__arm_vrmlsldavhxq_s32): Likewise.
17595 (__arm_vrmlsldavhq_s32): Likewise.
17596 (__arm_vrmlaldavhxq_s32): Likewise.
17597 (__arm_vrmlaldavhq_s32): Likewise.
17598 (__arm_vcvttq_f16_f32): Likewise.
17599 (__arm_vcvtbq_f16_f32): Likewise.
17600 (__arm_vaddlvaq_s32): Likewise.
17601 (vst4q): Define polymorphic variant.
17602 (vrndxq): Likewise.
17604 (vrndpq): Likewise.
17605 (vrndnq): Likewise.
17606 (vrndmq): Likewise.
17607 (vrndaq): Likewise.
17608 (vrev64q): Likewise.
17610 (vdupq_n): Likewise.
17612 (vrev32q): Likewise.
17613 (vcvtbq_f32): Likewise.
17614 (vcvttq_f32): Likewise.
17616 (vsubq_n): Likewise.
17617 (vbrsrq_n): Likewise.
17618 (vcvtq_n): Likewise.
17622 (vaddq_n): Likewise.
17626 (vmulq_n): Likewise.
17628 (vcaddq_rot270): Likewise.
17629 (vcmpeqq_n): Likewise.
17630 (vcmpeqq): Likewise.
17631 (vcaddq_rot90): Likewise.
17632 (vcmpgeq_n): Likewise.
17633 (vcmpgeq): Likewise.
17634 (vcmpgtq_n): Likewise.
17635 (vcmpgtq): Likewise.
17636 (vcmpgtq): Likewise.
17637 (vcmpleq_n): Likewise.
17638 (vcmpleq_n): Likewise.
17639 (vcmpleq): Likewise.
17640 (vcmpleq): Likewise.
17641 (vcmpltq_n): Likewise.
17642 (vcmpltq_n): Likewise.
17643 (vcmpltq): Likewise.
17644 (vcmpltq): Likewise.
17645 (vcmpneq_n): Likewise.
17646 (vcmpneq_n): Likewise.
17647 (vcmpneq): Likewise.
17648 (vcmpneq): Likewise.
17649 (vcmulq): Likewise.
17650 (vcmulq): Likewise.
17651 (vcmulq_rot180): Likewise.
17652 (vcmulq_rot180): Likewise.
17653 (vcmulq_rot270): Likewise.
17654 (vcmulq_rot270): Likewise.
17655 (vcmulq_rot90): Likewise.
17656 (vcmulq_rot90): Likewise.
17659 (vmaxnmaq): Likewise.
17660 (vmaxnmaq): Likewise.
17661 (vmaxnmavq): Likewise.
17662 (vmaxnmavq): Likewise.
17663 (vmaxnmq): Likewise.
17664 (vmaxnmq): Likewise.
17665 (vmaxnmvq): Likewise.
17666 (vmaxnmvq): Likewise.
17667 (vminnmaq): Likewise.
17668 (vminnmaq): Likewise.
17669 (vminnmavq): Likewise.
17670 (vminnmavq): Likewise.
17671 (vminnmq): Likewise.
17672 (vminnmq): Likewise.
17673 (vminnmvq): Likewise.
17674 (vminnmvq): Likewise.
17675 (vbicq_n): Likewise.
17676 (vqmovntq): Likewise.
17677 (vqmovntq): Likewise.
17678 (vqmovnbq): Likewise.
17679 (vqmovnbq): Likewise.
17680 (vmulltq_poly): Likewise.
17681 (vmulltq_poly): Likewise.
17682 (vmullbq_poly): Likewise.
17683 (vmullbq_poly): Likewise.
17684 (vmovntq): Likewise.
17685 (vmovntq): Likewise.
17686 (vmovnbq): Likewise.
17687 (vmovnbq): Likewise.
17688 (vmlaldavxq): Likewise.
17689 (vmlaldavxq): Likewise.
17690 (vqmovuntq): Likewise.
17691 (vqmovuntq): Likewise.
17692 (vshlltq_n): Likewise.
17693 (vshlltq_n): Likewise.
17694 (vshllbq_n): Likewise.
17695 (vshllbq_n): Likewise.
17696 (vorrq_n): Likewise.
17697 (vorrq_n): Likewise.
17698 (vmlaldavq): Likewise.
17699 (vmlaldavq): Likewise.
17700 (vqmovunbq): Likewise.
17701 (vqmovunbq): Likewise.
17702 (vqdmulltq_n): Likewise.
17703 (vqdmulltq_n): Likewise.
17704 (vqdmulltq): Likewise.
17705 (vqdmulltq): Likewise.
17706 (vqdmullbq_n): Likewise.
17707 (vqdmullbq_n): Likewise.
17708 (vqdmullbq): Likewise.
17709 (vqdmullbq): Likewise.
17710 (vaddlvaq): Likewise.
17711 (vaddlvaq): Likewise.
17712 (vrmlaldavhq): Likewise.
17713 (vrmlaldavhq): Likewise.
17714 (vrmlaldavhxq): Likewise.
17715 (vrmlaldavhxq): Likewise.
17716 (vrmlsldavhq): Likewise.
17717 (vrmlsldavhq): Likewise.
17718 (vrmlsldavhxq): Likewise.
17719 (vrmlsldavhxq): Likewise.
17720 (vmlsldavxq): Likewise.
17721 (vmlsldavxq): Likewise.
17722 (vmlsldavq): Likewise.
17723 (vmlsldavq): Likewise.
17724 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
17725 (BINOP_NONE_NONE_NONE): Likewise.
17726 (BINOP_UNONE_NONE_NONE): Likewise.
17727 (BINOP_UNONE_UNONE_IMM): Likewise.
17728 (BINOP_UNONE_UNONE_NONE): Likewise.
17729 (BINOP_UNONE_UNONE_UNONE): Likewise.
17730 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
17731 (mve_vaddlvaq_<supf>v4si): Likewise.
17732 (mve_vaddq_n_f<mode>): Likewise.
17733 (mve_vandq_f<mode>): Likewise.
17734 (mve_vbicq_f<mode>): Likewise.
17735 (mve_vbicq_n_<supf><mode>): Likewise.
17736 (mve_vcaddq_rot270_f<mode>): Likewise.
17737 (mve_vcaddq_rot90_f<mode>): Likewise.
17738 (mve_vcmpeqq_f<mode>): Likewise.
17739 (mve_vcmpeqq_n_f<mode>): Likewise.
17740 (mve_vcmpgeq_f<mode>): Likewise.
17741 (mve_vcmpgeq_n_f<mode>): Likewise.
17742 (mve_vcmpgtq_f<mode>): Likewise.
17743 (mve_vcmpgtq_n_f<mode>): Likewise.
17744 (mve_vcmpleq_f<mode>): Likewise.
17745 (mve_vcmpleq_n_f<mode>): Likewise.
17746 (mve_vcmpltq_f<mode>): Likewise.
17747 (mve_vcmpltq_n_f<mode>): Likewise.
17748 (mve_vcmpneq_f<mode>): Likewise.
17749 (mve_vcmpneq_n_f<mode>): Likewise.
17750 (mve_vcmulq_f<mode>): Likewise.
17751 (mve_vcmulq_rot180_f<mode>): Likewise.
17752 (mve_vcmulq_rot270_f<mode>): Likewise.
17753 (mve_vcmulq_rot90_f<mode>): Likewise.
17754 (mve_vctp<mode1>q_mhi): Likewise.
17755 (mve_vcvtbq_f16_f32v8hf): Likewise.
17756 (mve_vcvttq_f16_f32v8hf): Likewise.
17757 (mve_veorq_f<mode>): Likewise.
17758 (mve_vmaxnmaq_f<mode>): Likewise.
17759 (mve_vmaxnmavq_f<mode>): Likewise.
17760 (mve_vmaxnmq_f<mode>): Likewise.
17761 (mve_vmaxnmvq_f<mode>): Likewise.
17762 (mve_vminnmaq_f<mode>): Likewise.
17763 (mve_vminnmavq_f<mode>): Likewise.
17764 (mve_vminnmq_f<mode>): Likewise.
17765 (mve_vminnmvq_f<mode>): Likewise.
17766 (mve_vmlaldavq_<supf><mode>): Likewise.
17767 (mve_vmlaldavxq_<supf><mode>): Likewise.
17768 (mve_vmlsldavq_s<mode>): Likewise.
17769 (mve_vmlsldavxq_s<mode>): Likewise.
17770 (mve_vmovnbq_<supf><mode>): Likewise.
17771 (mve_vmovntq_<supf><mode>): Likewise.
17772 (mve_vmulq_f<mode>): Likewise.
17773 (mve_vmulq_n_f<mode>): Likewise.
17774 (mve_vornq_f<mode>): Likewise.
17775 (mve_vorrq_f<mode>): Likewise.
17776 (mve_vorrq_n_<supf><mode>): Likewise.
17777 (mve_vqdmullbq_n_s<mode>): Likewise.
17778 (mve_vqdmullbq_s<mode>): Likewise.
17779 (mve_vqdmulltq_n_s<mode>): Likewise.
17780 (mve_vqdmulltq_s<mode>): Likewise.
17781 (mve_vqmovnbq_<supf><mode>): Likewise.
17782 (mve_vqmovntq_<supf><mode>): Likewise.
17783 (mve_vqmovunbq_s<mode>): Likewise.
17784 (mve_vqmovuntq_s<mode>): Likewise.
17785 (mve_vrmlaldavhxq_sv4si): Likewise.
17786 (mve_vrmlsldavhq_sv4si): Likewise.
17787 (mve_vrmlsldavhxq_sv4si): Likewise.
17788 (mve_vshllbq_n_<supf><mode>): Likewise.
17789 (mve_vshlltq_n_<supf><mode>): Likewise.
17790 (mve_vsubq_f<mode>): Likewise.
17791 (mve_vmulltq_poly_p<mode>): Likewise.
17792 (mve_vmullbq_poly_p<mode>): Likewise.
17793 (mve_vrmlaldavhq_<supf>v4si): Likewise.
17795 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17796 Mihail Ionescu <mihail.ionescu@arm.com>
17797 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17799 * config/arm/arm_mve.h (vsubq_u8): Define macro.
17800 (vsubq_n_u8): Likewise.
17801 (vrmulhq_u8): Likewise.
17802 (vrhaddq_u8): Likewise.
17803 (vqsubq_u8): Likewise.
17804 (vqsubq_n_u8): Likewise.
17805 (vqaddq_u8): Likewise.
17806 (vqaddq_n_u8): Likewise.
17807 (vorrq_u8): Likewise.
17808 (vornq_u8): Likewise.
17809 (vmulq_u8): Likewise.
17810 (vmulq_n_u8): Likewise.
17811 (vmulltq_int_u8): Likewise.
17812 (vmullbq_int_u8): Likewise.
17813 (vmulhq_u8): Likewise.
17814 (vmladavq_u8): Likewise.
17815 (vminvq_u8): Likewise.
17816 (vminq_u8): Likewise.
17817 (vmaxvq_u8): Likewise.
17818 (vmaxq_u8): Likewise.
17819 (vhsubq_u8): Likewise.
17820 (vhsubq_n_u8): Likewise.
17821 (vhaddq_u8): Likewise.
17822 (vhaddq_n_u8): Likewise.
17823 (veorq_u8): Likewise.
17824 (vcmpneq_n_u8): Likewise.
17825 (vcmphiq_u8): Likewise.
17826 (vcmphiq_n_u8): Likewise.
17827 (vcmpeqq_u8): Likewise.
17828 (vcmpeqq_n_u8): Likewise.
17829 (vcmpcsq_u8): Likewise.
17830 (vcmpcsq_n_u8): Likewise.
17831 (vcaddq_rot90_u8): Likewise.
17832 (vcaddq_rot270_u8): Likewise.
17833 (vbicq_u8): Likewise.
17834 (vandq_u8): Likewise.
17835 (vaddvq_p_u8): Likewise.
17836 (vaddvaq_u8): Likewise.
17837 (vaddq_n_u8): Likewise.
17838 (vabdq_u8): Likewise.
17839 (vshlq_r_u8): Likewise.
17840 (vrshlq_u8): Likewise.
17841 (vrshlq_n_u8): Likewise.
17842 (vqshlq_u8): Likewise.
17843 (vqshlq_r_u8): Likewise.
17844 (vqrshlq_u8): Likewise.
17845 (vqrshlq_n_u8): Likewise.
17846 (vminavq_s8): Likewise.
17847 (vminaq_s8): Likewise.
17848 (vmaxavq_s8): Likewise.
17849 (vmaxaq_s8): Likewise.
17850 (vbrsrq_n_u8): Likewise.
17851 (vshlq_n_u8): Likewise.
17852 (vrshrq_n_u8): Likewise.
17853 (vqshlq_n_u8): Likewise.
17854 (vcmpneq_n_s8): Likewise.
17855 (vcmpltq_s8): Likewise.
17856 (vcmpltq_n_s8): Likewise.
17857 (vcmpleq_s8): Likewise.
17858 (vcmpleq_n_s8): Likewise.
17859 (vcmpgtq_s8): Likewise.
17860 (vcmpgtq_n_s8): Likewise.
17861 (vcmpgeq_s8): Likewise.
17862 (vcmpgeq_n_s8): Likewise.
17863 (vcmpeqq_s8): Likewise.
17864 (vcmpeqq_n_s8): Likewise.
17865 (vqshluq_n_s8): Likewise.
17866 (vaddvq_p_s8): Likewise.
17867 (vsubq_s8): Likewise.
17868 (vsubq_n_s8): Likewise.
17869 (vshlq_r_s8): Likewise.
17870 (vrshlq_s8): Likewise.
17871 (vrshlq_n_s8): Likewise.
17872 (vrmulhq_s8): Likewise.
17873 (vrhaddq_s8): Likewise.
17874 (vqsubq_s8): Likewise.
17875 (vqsubq_n_s8): Likewise.
17876 (vqshlq_s8): Likewise.
17877 (vqshlq_r_s8): Likewise.
17878 (vqrshlq_s8): Likewise.
17879 (vqrshlq_n_s8): Likewise.
17880 (vqrdmulhq_s8): Likewise.
17881 (vqrdmulhq_n_s8): Likewise.
17882 (vqdmulhq_s8): Likewise.
17883 (vqdmulhq_n_s8): Likewise.
17884 (vqaddq_s8): Likewise.
17885 (vqaddq_n_s8): Likewise.
17886 (vorrq_s8): Likewise.
17887 (vornq_s8): Likewise.
17888 (vmulq_s8): Likewise.
17889 (vmulq_n_s8): Likewise.
17890 (vmulltq_int_s8): Likewise.
17891 (vmullbq_int_s8): Likewise.
17892 (vmulhq_s8): Likewise.
17893 (vmlsdavxq_s8): Likewise.
17894 (vmlsdavq_s8): Likewise.
17895 (vmladavxq_s8): Likewise.
17896 (vmladavq_s8): Likewise.
17897 (vminvq_s8): Likewise.
17898 (vminq_s8): Likewise.
17899 (vmaxvq_s8): Likewise.
17900 (vmaxq_s8): Likewise.
17901 (vhsubq_s8): Likewise.
17902 (vhsubq_n_s8): Likewise.
17903 (vhcaddq_rot90_s8): Likewise.
17904 (vhcaddq_rot270_s8): Likewise.
17905 (vhaddq_s8): Likewise.
17906 (vhaddq_n_s8): Likewise.
17907 (veorq_s8): Likewise.
17908 (vcaddq_rot90_s8): Likewise.
17909 (vcaddq_rot270_s8): Likewise.
17910 (vbrsrq_n_s8): Likewise.
17911 (vbicq_s8): Likewise.
17912 (vandq_s8): Likewise.
17913 (vaddvaq_s8): Likewise.
17914 (vaddq_n_s8): Likewise.
17915 (vabdq_s8): Likewise.
17916 (vshlq_n_s8): Likewise.
17917 (vrshrq_n_s8): Likewise.
17918 (vqshlq_n_s8): Likewise.
17919 (vsubq_u16): Likewise.
17920 (vsubq_n_u16): Likewise.
17921 (vrmulhq_u16): Likewise.
17922 (vrhaddq_u16): Likewise.
17923 (vqsubq_u16): Likewise.
17924 (vqsubq_n_u16): Likewise.
17925 (vqaddq_u16): Likewise.
17926 (vqaddq_n_u16): Likewise.
17927 (vorrq_u16): Likewise.
17928 (vornq_u16): Likewise.
17929 (vmulq_u16): Likewise.
17930 (vmulq_n_u16): Likewise.
17931 (vmulltq_int_u16): Likewise.
17932 (vmullbq_int_u16): Likewise.
17933 (vmulhq_u16): Likewise.
17934 (vmladavq_u16): Likewise.
17935 (vminvq_u16): Likewise.
17936 (vminq_u16): Likewise.
17937 (vmaxvq_u16): Likewise.
17938 (vmaxq_u16): Likewise.
17939 (vhsubq_u16): Likewise.
17940 (vhsubq_n_u16): Likewise.
17941 (vhaddq_u16): Likewise.
17942 (vhaddq_n_u16): Likewise.
17943 (veorq_u16): Likewise.
17944 (vcmpneq_n_u16): Likewise.
17945 (vcmphiq_u16): Likewise.
17946 (vcmphiq_n_u16): Likewise.
17947 (vcmpeqq_u16): Likewise.
17948 (vcmpeqq_n_u16): Likewise.
17949 (vcmpcsq_u16): Likewise.
17950 (vcmpcsq_n_u16): Likewise.
17951 (vcaddq_rot90_u16): Likewise.
17952 (vcaddq_rot270_u16): Likewise.
17953 (vbicq_u16): Likewise.
17954 (vandq_u16): Likewise.
17955 (vaddvq_p_u16): Likewise.
17956 (vaddvaq_u16): Likewise.
17957 (vaddq_n_u16): Likewise.
17958 (vabdq_u16): Likewise.
17959 (vshlq_r_u16): Likewise.
17960 (vrshlq_u16): Likewise.
17961 (vrshlq_n_u16): Likewise.
17962 (vqshlq_u16): Likewise.
17963 (vqshlq_r_u16): Likewise.
17964 (vqrshlq_u16): Likewise.
17965 (vqrshlq_n_u16): Likewise.
17966 (vminavq_s16): Likewise.
17967 (vminaq_s16): Likewise.
17968 (vmaxavq_s16): Likewise.
17969 (vmaxaq_s16): Likewise.
17970 (vbrsrq_n_u16): Likewise.
17971 (vshlq_n_u16): Likewise.
17972 (vrshrq_n_u16): Likewise.
17973 (vqshlq_n_u16): Likewise.
17974 (vcmpneq_n_s16): Likewise.
17975 (vcmpltq_s16): Likewise.
17976 (vcmpltq_n_s16): Likewise.
17977 (vcmpleq_s16): Likewise.
17978 (vcmpleq_n_s16): Likewise.
17979 (vcmpgtq_s16): Likewise.
17980 (vcmpgtq_n_s16): Likewise.
17981 (vcmpgeq_s16): Likewise.
17982 (vcmpgeq_n_s16): Likewise.
17983 (vcmpeqq_s16): Likewise.
17984 (vcmpeqq_n_s16): Likewise.
17985 (vqshluq_n_s16): Likewise.
17986 (vaddvq_p_s16): Likewise.
17987 (vsubq_s16): Likewise.
17988 (vsubq_n_s16): Likewise.
17989 (vshlq_r_s16): Likewise.
17990 (vrshlq_s16): Likewise.
17991 (vrshlq_n_s16): Likewise.
17992 (vrmulhq_s16): Likewise.
17993 (vrhaddq_s16): Likewise.
17994 (vqsubq_s16): Likewise.
17995 (vqsubq_n_s16): Likewise.
17996 (vqshlq_s16): Likewise.
17997 (vqshlq_r_s16): Likewise.
17998 (vqrshlq_s16): Likewise.
17999 (vqrshlq_n_s16): Likewise.
18000 (vqrdmulhq_s16): Likewise.
18001 (vqrdmulhq_n_s16): Likewise.
18002 (vqdmulhq_s16): Likewise.
18003 (vqdmulhq_n_s16): Likewise.
18004 (vqaddq_s16): Likewise.
18005 (vqaddq_n_s16): Likewise.
18006 (vorrq_s16): Likewise.
18007 (vornq_s16): Likewise.
18008 (vmulq_s16): Likewise.
18009 (vmulq_n_s16): Likewise.
18010 (vmulltq_int_s16): Likewise.
18011 (vmullbq_int_s16): Likewise.
18012 (vmulhq_s16): Likewise.
18013 (vmlsdavxq_s16): Likewise.
18014 (vmlsdavq_s16): Likewise.
18015 (vmladavxq_s16): Likewise.
18016 (vmladavq_s16): Likewise.
18017 (vminvq_s16): Likewise.
18018 (vminq_s16): Likewise.
18019 (vmaxvq_s16): Likewise.
18020 (vmaxq_s16): Likewise.
18021 (vhsubq_s16): Likewise.
18022 (vhsubq_n_s16): Likewise.
18023 (vhcaddq_rot90_s16): Likewise.
18024 (vhcaddq_rot270_s16): Likewise.
18025 (vhaddq_s16): Likewise.
18026 (vhaddq_n_s16): Likewise.
18027 (veorq_s16): Likewise.
18028 (vcaddq_rot90_s16): Likewise.
18029 (vcaddq_rot270_s16): Likewise.
18030 (vbrsrq_n_s16): Likewise.
18031 (vbicq_s16): Likewise.
18032 (vandq_s16): Likewise.
18033 (vaddvaq_s16): Likewise.
18034 (vaddq_n_s16): Likewise.
18035 (vabdq_s16): Likewise.
18036 (vshlq_n_s16): Likewise.
18037 (vrshrq_n_s16): Likewise.
18038 (vqshlq_n_s16): Likewise.
18039 (vsubq_u32): Likewise.
18040 (vsubq_n_u32): Likewise.
18041 (vrmulhq_u32): Likewise.
18042 (vrhaddq_u32): Likewise.
18043 (vqsubq_u32): Likewise.
18044 (vqsubq_n_u32): Likewise.
18045 (vqaddq_u32): Likewise.
18046 (vqaddq_n_u32): Likewise.
18047 (vorrq_u32): Likewise.
18048 (vornq_u32): Likewise.
18049 (vmulq_u32): Likewise.
18050 (vmulq_n_u32): Likewise.
18051 (vmulltq_int_u32): Likewise.
18052 (vmullbq_int_u32): Likewise.
18053 (vmulhq_u32): Likewise.
18054 (vmladavq_u32): Likewise.
18055 (vminvq_u32): Likewise.
18056 (vminq_u32): Likewise.
18057 (vmaxvq_u32): Likewise.
18058 (vmaxq_u32): Likewise.
18059 (vhsubq_u32): Likewise.
18060 (vhsubq_n_u32): Likewise.
18061 (vhaddq_u32): Likewise.
18062 (vhaddq_n_u32): Likewise.
18063 (veorq_u32): Likewise.
18064 (vcmpneq_n_u32): Likewise.
18065 (vcmphiq_u32): Likewise.
18066 (vcmphiq_n_u32): Likewise.
18067 (vcmpeqq_u32): Likewise.
18068 (vcmpeqq_n_u32): Likewise.
18069 (vcmpcsq_u32): Likewise.
18070 (vcmpcsq_n_u32): Likewise.
18071 (vcaddq_rot90_u32): Likewise.
18072 (vcaddq_rot270_u32): Likewise.
18073 (vbicq_u32): Likewise.
18074 (vandq_u32): Likewise.
18075 (vaddvq_p_u32): Likewise.
18076 (vaddvaq_u32): Likewise.
18077 (vaddq_n_u32): Likewise.
18078 (vabdq_u32): Likewise.
18079 (vshlq_r_u32): Likewise.
18080 (vrshlq_u32): Likewise.
18081 (vrshlq_n_u32): Likewise.
18082 (vqshlq_u32): Likewise.
18083 (vqshlq_r_u32): Likewise.
18084 (vqrshlq_u32): Likewise.
18085 (vqrshlq_n_u32): Likewise.
18086 (vminavq_s32): Likewise.
18087 (vminaq_s32): Likewise.
18088 (vmaxavq_s32): Likewise.
18089 (vmaxaq_s32): Likewise.
18090 (vbrsrq_n_u32): Likewise.
18091 (vshlq_n_u32): Likewise.
18092 (vrshrq_n_u32): Likewise.
18093 (vqshlq_n_u32): Likewise.
18094 (vcmpneq_n_s32): Likewise.
18095 (vcmpltq_s32): Likewise.
18096 (vcmpltq_n_s32): Likewise.
18097 (vcmpleq_s32): Likewise.
18098 (vcmpleq_n_s32): Likewise.
18099 (vcmpgtq_s32): Likewise.
18100 (vcmpgtq_n_s32): Likewise.
18101 (vcmpgeq_s32): Likewise.
18102 (vcmpgeq_n_s32): Likewise.
18103 (vcmpeqq_s32): Likewise.
18104 (vcmpeqq_n_s32): Likewise.
18105 (vqshluq_n_s32): Likewise.
18106 (vaddvq_p_s32): Likewise.
18107 (vsubq_s32): Likewise.
18108 (vsubq_n_s32): Likewise.
18109 (vshlq_r_s32): Likewise.
18110 (vrshlq_s32): Likewise.
18111 (vrshlq_n_s32): Likewise.
18112 (vrmulhq_s32): Likewise.
18113 (vrhaddq_s32): Likewise.
18114 (vqsubq_s32): Likewise.
18115 (vqsubq_n_s32): Likewise.
18116 (vqshlq_s32): Likewise.
18117 (vqshlq_r_s32): Likewise.
18118 (vqrshlq_s32): Likewise.
18119 (vqrshlq_n_s32): Likewise.
18120 (vqrdmulhq_s32): Likewise.
18121 (vqrdmulhq_n_s32): Likewise.
18122 (vqdmulhq_s32): Likewise.
18123 (vqdmulhq_n_s32): Likewise.
18124 (vqaddq_s32): Likewise.
18125 (vqaddq_n_s32): Likewise.
18126 (vorrq_s32): Likewise.
18127 (vornq_s32): Likewise.
18128 (vmulq_s32): Likewise.
18129 (vmulq_n_s32): Likewise.
18130 (vmulltq_int_s32): Likewise.
18131 (vmullbq_int_s32): Likewise.
18132 (vmulhq_s32): Likewise.
18133 (vmlsdavxq_s32): Likewise.
18134 (vmlsdavq_s32): Likewise.
18135 (vmladavxq_s32): Likewise.
18136 (vmladavq_s32): Likewise.
18137 (vminvq_s32): Likewise.
18138 (vminq_s32): Likewise.
18139 (vmaxvq_s32): Likewise.
18140 (vmaxq_s32): Likewise.
18141 (vhsubq_s32): Likewise.
18142 (vhsubq_n_s32): Likewise.
18143 (vhcaddq_rot90_s32): Likewise.
18144 (vhcaddq_rot270_s32): Likewise.
18145 (vhaddq_s32): Likewise.
18146 (vhaddq_n_s32): Likewise.
18147 (veorq_s32): Likewise.
18148 (vcaddq_rot90_s32): Likewise.
18149 (vcaddq_rot270_s32): Likewise.
18150 (vbrsrq_n_s32): Likewise.
18151 (vbicq_s32): Likewise.
18152 (vandq_s32): Likewise.
18153 (vaddvaq_s32): Likewise.
18154 (vaddq_n_s32): Likewise.
18155 (vabdq_s32): Likewise.
18156 (vshlq_n_s32): Likewise.
18157 (vrshrq_n_s32): Likewise.
18158 (vqshlq_n_s32): Likewise.
18159 (__arm_vsubq_u8): Define intrinsic.
18160 (__arm_vsubq_n_u8): Likewise.
18161 (__arm_vrmulhq_u8): Likewise.
18162 (__arm_vrhaddq_u8): Likewise.
18163 (__arm_vqsubq_u8): Likewise.
18164 (__arm_vqsubq_n_u8): Likewise.
18165 (__arm_vqaddq_u8): Likewise.
18166 (__arm_vqaddq_n_u8): Likewise.
18167 (__arm_vorrq_u8): Likewise.
18168 (__arm_vornq_u8): Likewise.
18169 (__arm_vmulq_u8): Likewise.
18170 (__arm_vmulq_n_u8): Likewise.
18171 (__arm_vmulltq_int_u8): Likewise.
18172 (__arm_vmullbq_int_u8): Likewise.
18173 (__arm_vmulhq_u8): Likewise.
18174 (__arm_vmladavq_u8): Likewise.
18175 (__arm_vminvq_u8): Likewise.
18176 (__arm_vminq_u8): Likewise.
18177 (__arm_vmaxvq_u8): Likewise.
18178 (__arm_vmaxq_u8): Likewise.
18179 (__arm_vhsubq_u8): Likewise.
18180 (__arm_vhsubq_n_u8): Likewise.
18181 (__arm_vhaddq_u8): Likewise.
18182 (__arm_vhaddq_n_u8): Likewise.
18183 (__arm_veorq_u8): Likewise.
18184 (__arm_vcmpneq_n_u8): Likewise.
18185 (__arm_vcmphiq_u8): Likewise.
18186 (__arm_vcmphiq_n_u8): Likewise.
18187 (__arm_vcmpeqq_u8): Likewise.
18188 (__arm_vcmpeqq_n_u8): Likewise.
18189 (__arm_vcmpcsq_u8): Likewise.
18190 (__arm_vcmpcsq_n_u8): Likewise.
18191 (__arm_vcaddq_rot90_u8): Likewise.
18192 (__arm_vcaddq_rot270_u8): Likewise.
18193 (__arm_vbicq_u8): Likewise.
18194 (__arm_vandq_u8): Likewise.
18195 (__arm_vaddvq_p_u8): Likewise.
18196 (__arm_vaddvaq_u8): Likewise.
18197 (__arm_vaddq_n_u8): Likewise.
18198 (__arm_vabdq_u8): Likewise.
18199 (__arm_vshlq_r_u8): Likewise.
18200 (__arm_vrshlq_u8): Likewise.
18201 (__arm_vrshlq_n_u8): Likewise.
18202 (__arm_vqshlq_u8): Likewise.
18203 (__arm_vqshlq_r_u8): Likewise.
18204 (__arm_vqrshlq_u8): Likewise.
18205 (__arm_vqrshlq_n_u8): Likewise.
18206 (__arm_vminavq_s8): Likewise.
18207 (__arm_vminaq_s8): Likewise.
18208 (__arm_vmaxavq_s8): Likewise.
18209 (__arm_vmaxaq_s8): Likewise.
18210 (__arm_vbrsrq_n_u8): Likewise.
18211 (__arm_vshlq_n_u8): Likewise.
18212 (__arm_vrshrq_n_u8): Likewise.
18213 (__arm_vqshlq_n_u8): Likewise.
18214 (__arm_vcmpneq_n_s8): Likewise.
18215 (__arm_vcmpltq_s8): Likewise.
18216 (__arm_vcmpltq_n_s8): Likewise.
18217 (__arm_vcmpleq_s8): Likewise.
18218 (__arm_vcmpleq_n_s8): Likewise.
18219 (__arm_vcmpgtq_s8): Likewise.
18220 (__arm_vcmpgtq_n_s8): Likewise.
18221 (__arm_vcmpgeq_s8): Likewise.
18222 (__arm_vcmpgeq_n_s8): Likewise.
18223 (__arm_vcmpeqq_s8): Likewise.
18224 (__arm_vcmpeqq_n_s8): Likewise.
18225 (__arm_vqshluq_n_s8): Likewise.
18226 (__arm_vaddvq_p_s8): Likewise.
18227 (__arm_vsubq_s8): Likewise.
18228 (__arm_vsubq_n_s8): Likewise.
18229 (__arm_vshlq_r_s8): Likewise.
18230 (__arm_vrshlq_s8): Likewise.
18231 (__arm_vrshlq_n_s8): Likewise.
18232 (__arm_vrmulhq_s8): Likewise.
18233 (__arm_vrhaddq_s8): Likewise.
18234 (__arm_vqsubq_s8): Likewise.
18235 (__arm_vqsubq_n_s8): Likewise.
18236 (__arm_vqshlq_s8): Likewise.
18237 (__arm_vqshlq_r_s8): Likewise.
18238 (__arm_vqrshlq_s8): Likewise.
18239 (__arm_vqrshlq_n_s8): Likewise.
18240 (__arm_vqrdmulhq_s8): Likewise.
18241 (__arm_vqrdmulhq_n_s8): Likewise.
18242 (__arm_vqdmulhq_s8): Likewise.
18243 (__arm_vqdmulhq_n_s8): Likewise.
18244 (__arm_vqaddq_s8): Likewise.
18245 (__arm_vqaddq_n_s8): Likewise.
18246 (__arm_vorrq_s8): Likewise.
18247 (__arm_vornq_s8): Likewise.
18248 (__arm_vmulq_s8): Likewise.
18249 (__arm_vmulq_n_s8): Likewise.
18250 (__arm_vmulltq_int_s8): Likewise.
18251 (__arm_vmullbq_int_s8): Likewise.
18252 (__arm_vmulhq_s8): Likewise.
18253 (__arm_vmlsdavxq_s8): Likewise.
18254 (__arm_vmlsdavq_s8): Likewise.
18255 (__arm_vmladavxq_s8): Likewise.
18256 (__arm_vmladavq_s8): Likewise.
18257 (__arm_vminvq_s8): Likewise.
18258 (__arm_vminq_s8): Likewise.
18259 (__arm_vmaxvq_s8): Likewise.
18260 (__arm_vmaxq_s8): Likewise.
18261 (__arm_vhsubq_s8): Likewise.
18262 (__arm_vhsubq_n_s8): Likewise.
18263 (__arm_vhcaddq_rot90_s8): Likewise.
18264 (__arm_vhcaddq_rot270_s8): Likewise.
18265 (__arm_vhaddq_s8): Likewise.
18266 (__arm_vhaddq_n_s8): Likewise.
18267 (__arm_veorq_s8): Likewise.
18268 (__arm_vcaddq_rot90_s8): Likewise.
18269 (__arm_vcaddq_rot270_s8): Likewise.
18270 (__arm_vbrsrq_n_s8): Likewise.
18271 (__arm_vbicq_s8): Likewise.
18272 (__arm_vandq_s8): Likewise.
18273 (__arm_vaddvaq_s8): Likewise.
18274 (__arm_vaddq_n_s8): Likewise.
18275 (__arm_vabdq_s8): Likewise.
18276 (__arm_vshlq_n_s8): Likewise.
18277 (__arm_vrshrq_n_s8): Likewise.
18278 (__arm_vqshlq_n_s8): Likewise.
18279 (__arm_vsubq_u16): Likewise.
18280 (__arm_vsubq_n_u16): Likewise.
18281 (__arm_vrmulhq_u16): Likewise.
18282 (__arm_vrhaddq_u16): Likewise.
18283 (__arm_vqsubq_u16): Likewise.
18284 (__arm_vqsubq_n_u16): Likewise.
18285 (__arm_vqaddq_u16): Likewise.
18286 (__arm_vqaddq_n_u16): Likewise.
18287 (__arm_vorrq_u16): Likewise.
18288 (__arm_vornq_u16): Likewise.
18289 (__arm_vmulq_u16): Likewise.
18290 (__arm_vmulq_n_u16): Likewise.
18291 (__arm_vmulltq_int_u16): Likewise.
18292 (__arm_vmullbq_int_u16): Likewise.
18293 (__arm_vmulhq_u16): Likewise.
18294 (__arm_vmladavq_u16): Likewise.
18295 (__arm_vminvq_u16): Likewise.
18296 (__arm_vminq_u16): Likewise.
18297 (__arm_vmaxvq_u16): Likewise.
18298 (__arm_vmaxq_u16): Likewise.
18299 (__arm_vhsubq_u16): Likewise.
18300 (__arm_vhsubq_n_u16): Likewise.
18301 (__arm_vhaddq_u16): Likewise.
18302 (__arm_vhaddq_n_u16): Likewise.
18303 (__arm_veorq_u16): Likewise.
18304 (__arm_vcmpneq_n_u16): Likewise.
18305 (__arm_vcmphiq_u16): Likewise.
18306 (__arm_vcmphiq_n_u16): Likewise.
18307 (__arm_vcmpeqq_u16): Likewise.
18308 (__arm_vcmpeqq_n_u16): Likewise.
18309 (__arm_vcmpcsq_u16): Likewise.
18310 (__arm_vcmpcsq_n_u16): Likewise.
18311 (__arm_vcaddq_rot90_u16): Likewise.
18312 (__arm_vcaddq_rot270_u16): Likewise.
18313 (__arm_vbicq_u16): Likewise.
18314 (__arm_vandq_u16): Likewise.
18315 (__arm_vaddvq_p_u16): Likewise.
18316 (__arm_vaddvaq_u16): Likewise.
18317 (__arm_vaddq_n_u16): Likewise.
18318 (__arm_vabdq_u16): Likewise.
18319 (__arm_vshlq_r_u16): Likewise.
18320 (__arm_vrshlq_u16): Likewise.
18321 (__arm_vrshlq_n_u16): Likewise.
18322 (__arm_vqshlq_u16): Likewise.
18323 (__arm_vqshlq_r_u16): Likewise.
18324 (__arm_vqrshlq_u16): Likewise.
18325 (__arm_vqrshlq_n_u16): Likewise.
18326 (__arm_vminavq_s16): Likewise.
18327 (__arm_vminaq_s16): Likewise.
18328 (__arm_vmaxavq_s16): Likewise.
18329 (__arm_vmaxaq_s16): Likewise.
18330 (__arm_vbrsrq_n_u16): Likewise.
18331 (__arm_vshlq_n_u16): Likewise.
18332 (__arm_vrshrq_n_u16): Likewise.
18333 (__arm_vqshlq_n_u16): Likewise.
18334 (__arm_vcmpneq_n_s16): Likewise.
18335 (__arm_vcmpltq_s16): Likewise.
18336 (__arm_vcmpltq_n_s16): Likewise.
18337 (__arm_vcmpleq_s16): Likewise.
18338 (__arm_vcmpleq_n_s16): Likewise.
18339 (__arm_vcmpgtq_s16): Likewise.
18340 (__arm_vcmpgtq_n_s16): Likewise.
18341 (__arm_vcmpgeq_s16): Likewise.
18342 (__arm_vcmpgeq_n_s16): Likewise.
18343 (__arm_vcmpeqq_s16): Likewise.
18344 (__arm_vcmpeqq_n_s16): Likewise.
18345 (__arm_vqshluq_n_s16): Likewise.
18346 (__arm_vaddvq_p_s16): Likewise.
18347 (__arm_vsubq_s16): Likewise.
18348 (__arm_vsubq_n_s16): Likewise.
18349 (__arm_vshlq_r_s16): Likewise.
18350 (__arm_vrshlq_s16): Likewise.
18351 (__arm_vrshlq_n_s16): Likewise.
18352 (__arm_vrmulhq_s16): Likewise.
18353 (__arm_vrhaddq_s16): Likewise.
18354 (__arm_vqsubq_s16): Likewise.
18355 (__arm_vqsubq_n_s16): Likewise.
18356 (__arm_vqshlq_s16): Likewise.
18357 (__arm_vqshlq_r_s16): Likewise.
18358 (__arm_vqrshlq_s16): Likewise.
18359 (__arm_vqrshlq_n_s16): Likewise.
18360 (__arm_vqrdmulhq_s16): Likewise.
18361 (__arm_vqrdmulhq_n_s16): Likewise.
18362 (__arm_vqdmulhq_s16): Likewise.
18363 (__arm_vqdmulhq_n_s16): Likewise.
18364 (__arm_vqaddq_s16): Likewise.
18365 (__arm_vqaddq_n_s16): Likewise.
18366 (__arm_vorrq_s16): Likewise.
18367 (__arm_vornq_s16): Likewise.
18368 (__arm_vmulq_s16): Likewise.
18369 (__arm_vmulq_n_s16): Likewise.
18370 (__arm_vmulltq_int_s16): Likewise.
18371 (__arm_vmullbq_int_s16): Likewise.
18372 (__arm_vmulhq_s16): Likewise.
18373 (__arm_vmlsdavxq_s16): Likewise.
18374 (__arm_vmlsdavq_s16): Likewise.
18375 (__arm_vmladavxq_s16): Likewise.
18376 (__arm_vmladavq_s16): Likewise.
18377 (__arm_vminvq_s16): Likewise.
18378 (__arm_vminq_s16): Likewise.
18379 (__arm_vmaxvq_s16): Likewise.
18380 (__arm_vmaxq_s16): Likewise.
18381 (__arm_vhsubq_s16): Likewise.
18382 (__arm_vhsubq_n_s16): Likewise.
18383 (__arm_vhcaddq_rot90_s16): Likewise.
18384 (__arm_vhcaddq_rot270_s16): Likewise.
18385 (__arm_vhaddq_s16): Likewise.
18386 (__arm_vhaddq_n_s16): Likewise.
18387 (__arm_veorq_s16): Likewise.
18388 (__arm_vcaddq_rot90_s16): Likewise.
18389 (__arm_vcaddq_rot270_s16): Likewise.
18390 (__arm_vbrsrq_n_s16): Likewise.
18391 (__arm_vbicq_s16): Likewise.
18392 (__arm_vandq_s16): Likewise.
18393 (__arm_vaddvaq_s16): Likewise.
18394 (__arm_vaddq_n_s16): Likewise.
18395 (__arm_vabdq_s16): Likewise.
18396 (__arm_vshlq_n_s16): Likewise.
18397 (__arm_vrshrq_n_s16): Likewise.
18398 (__arm_vqshlq_n_s16): Likewise.
18399 (__arm_vsubq_u32): Likewise.
18400 (__arm_vsubq_n_u32): Likewise.
18401 (__arm_vrmulhq_u32): Likewise.
18402 (__arm_vrhaddq_u32): Likewise.
18403 (__arm_vqsubq_u32): Likewise.
18404 (__arm_vqsubq_n_u32): Likewise.
18405 (__arm_vqaddq_u32): Likewise.
18406 (__arm_vqaddq_n_u32): Likewise.
18407 (__arm_vorrq_u32): Likewise.
18408 (__arm_vornq_u32): Likewise.
18409 (__arm_vmulq_u32): Likewise.
18410 (__arm_vmulq_n_u32): Likewise.
18411 (__arm_vmulltq_int_u32): Likewise.
18412 (__arm_vmullbq_int_u32): Likewise.
18413 (__arm_vmulhq_u32): Likewise.
18414 (__arm_vmladavq_u32): Likewise.
18415 (__arm_vminvq_u32): Likewise.
18416 (__arm_vminq_u32): Likewise.
18417 (__arm_vmaxvq_u32): Likewise.
18418 (__arm_vmaxq_u32): Likewise.
18419 (__arm_vhsubq_u32): Likewise.
18420 (__arm_vhsubq_n_u32): Likewise.
18421 (__arm_vhaddq_u32): Likewise.
18422 (__arm_vhaddq_n_u32): Likewise.
18423 (__arm_veorq_u32): Likewise.
18424 (__arm_vcmpneq_n_u32): Likewise.
18425 (__arm_vcmphiq_u32): Likewise.
18426 (__arm_vcmphiq_n_u32): Likewise.
18427 (__arm_vcmpeqq_u32): Likewise.
18428 (__arm_vcmpeqq_n_u32): Likewise.
18429 (__arm_vcmpcsq_u32): Likewise.
18430 (__arm_vcmpcsq_n_u32): Likewise.
18431 (__arm_vcaddq_rot90_u32): Likewise.
18432 (__arm_vcaddq_rot270_u32): Likewise.
18433 (__arm_vbicq_u32): Likewise.
18434 (__arm_vandq_u32): Likewise.
18435 (__arm_vaddvq_p_u32): Likewise.
18436 (__arm_vaddvaq_u32): Likewise.
18437 (__arm_vaddq_n_u32): Likewise.
18438 (__arm_vabdq_u32): Likewise.
18439 (__arm_vshlq_r_u32): Likewise.
18440 (__arm_vrshlq_u32): Likewise.
18441 (__arm_vrshlq_n_u32): Likewise.
18442 (__arm_vqshlq_u32): Likewise.
18443 (__arm_vqshlq_r_u32): Likewise.
18444 (__arm_vqrshlq_u32): Likewise.
18445 (__arm_vqrshlq_n_u32): Likewise.
18446 (__arm_vminavq_s32): Likewise.
18447 (__arm_vminaq_s32): Likewise.
18448 (__arm_vmaxavq_s32): Likewise.
18449 (__arm_vmaxaq_s32): Likewise.
18450 (__arm_vbrsrq_n_u32): Likewise.
18451 (__arm_vshlq_n_u32): Likewise.
18452 (__arm_vrshrq_n_u32): Likewise.
18453 (__arm_vqshlq_n_u32): Likewise.
18454 (__arm_vcmpneq_n_s32): Likewise.
18455 (__arm_vcmpltq_s32): Likewise.
18456 (__arm_vcmpltq_n_s32): Likewise.
18457 (__arm_vcmpleq_s32): Likewise.
18458 (__arm_vcmpleq_n_s32): Likewise.
18459 (__arm_vcmpgtq_s32): Likewise.
18460 (__arm_vcmpgtq_n_s32): Likewise.
18461 (__arm_vcmpgeq_s32): Likewise.
18462 (__arm_vcmpgeq_n_s32): Likewise.
18463 (__arm_vcmpeqq_s32): Likewise.
18464 (__arm_vcmpeqq_n_s32): Likewise.
18465 (__arm_vqshluq_n_s32): Likewise.
18466 (__arm_vaddvq_p_s32): Likewise.
18467 (__arm_vsubq_s32): Likewise.
18468 (__arm_vsubq_n_s32): Likewise.
18469 (__arm_vshlq_r_s32): Likewise.
18470 (__arm_vrshlq_s32): Likewise.
18471 (__arm_vrshlq_n_s32): Likewise.
18472 (__arm_vrmulhq_s32): Likewise.
18473 (__arm_vrhaddq_s32): Likewise.
18474 (__arm_vqsubq_s32): Likewise.
18475 (__arm_vqsubq_n_s32): Likewise.
18476 (__arm_vqshlq_s32): Likewise.
18477 (__arm_vqshlq_r_s32): Likewise.
18478 (__arm_vqrshlq_s32): Likewise.
18479 (__arm_vqrshlq_n_s32): Likewise.
18480 (__arm_vqrdmulhq_s32): Likewise.
18481 (__arm_vqrdmulhq_n_s32): Likewise.
18482 (__arm_vqdmulhq_s32): Likewise.
18483 (__arm_vqdmulhq_n_s32): Likewise.
18484 (__arm_vqaddq_s32): Likewise.
18485 (__arm_vqaddq_n_s32): Likewise.
18486 (__arm_vorrq_s32): Likewise.
18487 (__arm_vornq_s32): Likewise.
18488 (__arm_vmulq_s32): Likewise.
18489 (__arm_vmulq_n_s32): Likewise.
18490 (__arm_vmulltq_int_s32): Likewise.
18491 (__arm_vmullbq_int_s32): Likewise.
18492 (__arm_vmulhq_s32): Likewise.
18493 (__arm_vmlsdavxq_s32): Likewise.
18494 (__arm_vmlsdavq_s32): Likewise.
18495 (__arm_vmladavxq_s32): Likewise.
18496 (__arm_vmladavq_s32): Likewise.
18497 (__arm_vminvq_s32): Likewise.
18498 (__arm_vminq_s32): Likewise.
18499 (__arm_vmaxvq_s32): Likewise.
18500 (__arm_vmaxq_s32): Likewise.
18501 (__arm_vhsubq_s32): Likewise.
18502 (__arm_vhsubq_n_s32): Likewise.
18503 (__arm_vhcaddq_rot90_s32): Likewise.
18504 (__arm_vhcaddq_rot270_s32): Likewise.
18505 (__arm_vhaddq_s32): Likewise.
18506 (__arm_vhaddq_n_s32): Likewise.
18507 (__arm_veorq_s32): Likewise.
18508 (__arm_vcaddq_rot90_s32): Likewise.
18509 (__arm_vcaddq_rot270_s32): Likewise.
18510 (__arm_vbrsrq_n_s32): Likewise.
18511 (__arm_vbicq_s32): Likewise.
18512 (__arm_vandq_s32): Likewise.
18513 (__arm_vaddvaq_s32): Likewise.
18514 (__arm_vaddq_n_s32): Likewise.
18515 (__arm_vabdq_s32): Likewise.
18516 (__arm_vshlq_n_s32): Likewise.
18517 (__arm_vrshrq_n_s32): Likewise.
18518 (__arm_vqshlq_n_s32): Likewise.
18519 (vsubq): Define polymorphic variant.
18520 (vsubq_n): Likewise.
18521 (vshlq_r): Likewise.
18522 (vrshlq_n): Likewise.
18523 (vrshlq): Likewise.
18524 (vrmulhq): Likewise.
18525 (vrhaddq): Likewise.
18526 (vqsubq_n): Likewise.
18527 (vqsubq): Likewise.
18528 (vqshlq): Likewise.
18529 (vqshlq_r): Likewise.
18530 (vqshluq): Likewise.
18531 (vrshrq_n): Likewise.
18532 (vshlq_n): Likewise.
18533 (vqshluq_n): Likewise.
18534 (vqshlq_n): Likewise.
18535 (vqrshlq_n): Likewise.
18536 (vqrshlq): Likewise.
18537 (vqrdmulhq_n): Likewise.
18538 (vqrdmulhq): Likewise.
18539 (vqdmulhq_n): Likewise.
18540 (vqdmulhq): Likewise.
18541 (vqaddq_n): Likewise.
18542 (vqaddq): Likewise.
18543 (vorrq_n): Likewise.
18546 (vmulq_n): Likewise.
18548 (vmulltq_int): Likewise.
18549 (vmullbq_int): Likewise.
18550 (vmulhq): Likewise.
18552 (vminaq): Likewise.
18554 (vmaxaq): Likewise.
18555 (vhsubq_n): Likewise.
18556 (vhsubq): Likewise.
18557 (vhcaddq_rot90): Likewise.
18558 (vhcaddq_rot270): Likewise.
18559 (vhaddq_n): Likewise.
18560 (vhaddq): Likewise.
18562 (vcaddq_rot90): Likewise.
18563 (vcaddq_rot270): Likewise.
18564 (vbrsrq_n): Likewise.
18565 (vbicq_n): Likewise.
18568 (vaddq_n): Likewise.
18571 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
18572 (BINOP_NONE_NONE_NONE): Likewise.
18573 (BINOP_NONE_NONE_UNONE): Likewise.
18574 (BINOP_UNONE_NONE_IMM): Likewise.
18575 (BINOP_UNONE_NONE_NONE): Likewise.
18576 (BINOP_UNONE_UNONE_IMM): Likewise.
18577 (BINOP_UNONE_UNONE_NONE): Likewise.
18578 (BINOP_UNONE_UNONE_UNONE): Likewise.
18579 * config/arm/constraints.md (Ra): Define constraint to check constant is
18580 in the range of 0 to 7.
18581 (Rg): Define constriant to check the constant is one among 1, 2, 4
18583 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
18584 (mve_vaddq_n_<supf>): Likewise.
18585 (mve_vaddvaq_<supf>): Likewise.
18586 (mve_vaddvq_p_<supf>): Likewise.
18587 (mve_vandq_<supf>): Likewise.
18588 (mve_vbicq_<supf>): Likewise.
18589 (mve_vbrsrq_n_<supf>): Likewise.
18590 (mve_vcaddq_rot270_<supf>): Likewise.
18591 (mve_vcaddq_rot90_<supf>): Likewise.
18592 (mve_vcmpcsq_n_u): Likewise.
18593 (mve_vcmpcsq_u): Likewise.
18594 (mve_vcmpeqq_n_<supf>): Likewise.
18595 (mve_vcmpeqq_<supf>): Likewise.
18596 (mve_vcmpgeq_n_s): Likewise.
18597 (mve_vcmpgeq_s): Likewise.
18598 (mve_vcmpgtq_n_s): Likewise.
18599 (mve_vcmpgtq_s): Likewise.
18600 (mve_vcmphiq_n_u): Likewise.
18601 (mve_vcmphiq_u): Likewise.
18602 (mve_vcmpleq_n_s): Likewise.
18603 (mve_vcmpleq_s): Likewise.
18604 (mve_vcmpltq_n_s): Likewise.
18605 (mve_vcmpltq_s): Likewise.
18606 (mve_vcmpneq_n_<supf>): Likewise.
18607 (mve_vddupq_n_u): Likewise.
18608 (mve_veorq_<supf>): Likewise.
18609 (mve_vhaddq_n_<supf>): Likewise.
18610 (mve_vhaddq_<supf>): Likewise.
18611 (mve_vhcaddq_rot270_s): Likewise.
18612 (mve_vhcaddq_rot90_s): Likewise.
18613 (mve_vhsubq_n_<supf>): Likewise.
18614 (mve_vhsubq_<supf>): Likewise.
18615 (mve_vidupq_n_u): Likewise.
18616 (mve_vmaxaq_s): Likewise.
18617 (mve_vmaxavq_s): Likewise.
18618 (mve_vmaxq_<supf>): Likewise.
18619 (mve_vmaxvq_<supf>): Likewise.
18620 (mve_vminaq_s): Likewise.
18621 (mve_vminavq_s): Likewise.
18622 (mve_vminq_<supf>): Likewise.
18623 (mve_vminvq_<supf>): Likewise.
18624 (mve_vmladavq_<supf>): Likewise.
18625 (mve_vmladavxq_s): Likewise.
18626 (mve_vmlsdavq_s): Likewise.
18627 (mve_vmlsdavxq_s): Likewise.
18628 (mve_vmulhq_<supf>): Likewise.
18629 (mve_vmullbq_int_<supf>): Likewise.
18630 (mve_vmulltq_int_<supf>): Likewise.
18631 (mve_vmulq_n_<supf>): Likewise.
18632 (mve_vmulq_<supf>): Likewise.
18633 (mve_vornq_<supf>): Likewise.
18634 (mve_vorrq_<supf>): Likewise.
18635 (mve_vqaddq_n_<supf>): Likewise.
18636 (mve_vqaddq_<supf>): Likewise.
18637 (mve_vqdmulhq_n_s): Likewise.
18638 (mve_vqdmulhq_s): Likewise.
18639 (mve_vqrdmulhq_n_s): Likewise.
18640 (mve_vqrdmulhq_s): Likewise.
18641 (mve_vqrshlq_n_<supf>): Likewise.
18642 (mve_vqrshlq_<supf>): Likewise.
18643 (mve_vqshlq_n_<supf>): Likewise.
18644 (mve_vqshlq_r_<supf>): Likewise.
18645 (mve_vqshlq_<supf>): Likewise.
18646 (mve_vqshluq_n_s): Likewise.
18647 (mve_vqsubq_n_<supf>): Likewise.
18648 (mve_vqsubq_<supf>): Likewise.
18649 (mve_vrhaddq_<supf>): Likewise.
18650 (mve_vrmulhq_<supf>): Likewise.
18651 (mve_vrshlq_n_<supf>): Likewise.
18652 (mve_vrshlq_<supf>): Likewise.
18653 (mve_vrshrq_n_<supf>): Likewise.
18654 (mve_vshlq_n_<supf>): Likewise.
18655 (mve_vshlq_r_<supf>): Likewise.
18656 (mve_vsubq_n_<supf>): Likewise.
18657 (mve_vsubq_<supf>): Likewise.
18658 * config/arm/predicates.md (mve_imm_7): Define predicate to check
18659 the matching constraint Ra.
18660 (mve_imm_selective_upto_8): Define predicate to check the matching
18663 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18664 Mihail Ionescu <mihail.ionescu@arm.com>
18665 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18667 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
18668 qualifier for binary operands.
18669 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
18670 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
18671 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
18672 (vaddlvq_p_u32): Likewise.
18673 (vcmpneq_s8): Likewise.
18674 (vcmpneq_s16): Likewise.
18675 (vcmpneq_s32): Likewise.
18676 (vcmpneq_u8): Likewise.
18677 (vcmpneq_u16): Likewise.
18678 (vcmpneq_u32): Likewise.
18679 (vshlq_s8): Likewise.
18680 (vshlq_s16): Likewise.
18681 (vshlq_s32): Likewise.
18682 (vshlq_u8): Likewise.
18683 (vshlq_u16): Likewise.
18684 (vshlq_u32): Likewise.
18685 (__arm_vaddlvq_p_s32): Define intrinsic.
18686 (__arm_vaddlvq_p_u32): Likewise.
18687 (__arm_vcmpneq_s8): Likewise.
18688 (__arm_vcmpneq_s16): Likewise.
18689 (__arm_vcmpneq_s32): Likewise.
18690 (__arm_vcmpneq_u8): Likewise.
18691 (__arm_vcmpneq_u16): Likewise.
18692 (__arm_vcmpneq_u32): Likewise.
18693 (__arm_vshlq_s8): Likewise.
18694 (__arm_vshlq_s16): Likewise.
18695 (__arm_vshlq_s32): Likewise.
18696 (__arm_vshlq_u8): Likewise.
18697 (__arm_vshlq_u16): Likewise.
18698 (__arm_vshlq_u32): Likewise.
18699 (vaddlvq_p): Define polymorphic variant.
18700 (vcmpneq): Likewise.
18702 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
18704 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
18705 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
18706 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
18707 (mve_vcmpneq_<supf><mode>): Likewise.
18708 (mve_vshlq_<supf><mode>): Likewise.
18710 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18711 Mihail Ionescu <mihail.ionescu@arm.com>
18712 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18714 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
18715 qualifier for binary operands.
18716 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
18717 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
18718 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
18719 (vcvtq_n_s32_f32): Likewise.
18720 (vcvtq_n_u16_f16): Likewise.
18721 (vcvtq_n_u32_f32): Likewise.
18722 (vcreateq_u8): Likewise.
18723 (vcreateq_u16): Likewise.
18724 (vcreateq_u32): Likewise.
18725 (vcreateq_u64): Likewise.
18726 (vcreateq_s8): Likewise.
18727 (vcreateq_s16): Likewise.
18728 (vcreateq_s32): Likewise.
18729 (vcreateq_s64): Likewise.
18730 (vshrq_n_s8): Likewise.
18731 (vshrq_n_s16): Likewise.
18732 (vshrq_n_s32): Likewise.
18733 (vshrq_n_u8): Likewise.
18734 (vshrq_n_u16): Likewise.
18735 (vshrq_n_u32): Likewise.
18736 (__arm_vcreateq_u8): Define intrinsic.
18737 (__arm_vcreateq_u16): Likewise.
18738 (__arm_vcreateq_u32): Likewise.
18739 (__arm_vcreateq_u64): Likewise.
18740 (__arm_vcreateq_s8): Likewise.
18741 (__arm_vcreateq_s16): Likewise.
18742 (__arm_vcreateq_s32): Likewise.
18743 (__arm_vcreateq_s64): Likewise.
18744 (__arm_vshrq_n_s8): Likewise.
18745 (__arm_vshrq_n_s16): Likewise.
18746 (__arm_vshrq_n_s32): Likewise.
18747 (__arm_vshrq_n_u8): Likewise.
18748 (__arm_vshrq_n_u16): Likewise.
18749 (__arm_vshrq_n_u32): Likewise.
18750 (__arm_vcvtq_n_s16_f16): Likewise.
18751 (__arm_vcvtq_n_s32_f32): Likewise.
18752 (__arm_vcvtq_n_u16_f16): Likewise.
18753 (__arm_vcvtq_n_u32_f32): Likewise.
18754 (vshrq_n): Define polymorphic variant.
18755 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
18757 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
18758 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
18759 * config/arm/constraints.md (Rb): Define constraint to check constant is
18760 in the range of 1 to 8.
18761 (Rf): Define constraint to check constant is in the range of 1 to 32.
18762 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
18763 (mve_vshrq_n_<supf><mode>): Likewise.
18764 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
18765 * config/arm/predicates.md (mve_imm_8): Define predicate to check
18766 the matching constraint Rb.
18767 (mve_imm_32): Define predicate to check the matching constraint Rf.
18769 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18770 Mihail Ionescu <mihail.ionescu@arm.com>
18771 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18773 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
18774 qualifier for binary operands.
18775 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
18776 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18777 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
18778 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
18779 (vsubq_n_f32): Likewise.
18780 (vbrsrq_n_f16): Likewise.
18781 (vbrsrq_n_f32): Likewise.
18782 (vcvtq_n_f16_s16): Likewise.
18783 (vcvtq_n_f32_s32): Likewise.
18784 (vcvtq_n_f16_u16): Likewise.
18785 (vcvtq_n_f32_u32): Likewise.
18786 (vcreateq_f16): Likewise.
18787 (vcreateq_f32): Likewise.
18788 (__arm_vsubq_n_f16): Define intrinsic.
18789 (__arm_vsubq_n_f32): Likewise.
18790 (__arm_vbrsrq_n_f16): Likewise.
18791 (__arm_vbrsrq_n_f32): Likewise.
18792 (__arm_vcvtq_n_f16_s16): Likewise.
18793 (__arm_vcvtq_n_f32_s32): Likewise.
18794 (__arm_vcvtq_n_f16_u16): Likewise.
18795 (__arm_vcvtq_n_f32_u32): Likewise.
18796 (__arm_vcreateq_f16): Likewise.
18797 (__arm_vcreateq_f32): Likewise.
18798 (vsubq): Define polymorphic variant.
18799 (vbrsrq): Likewise.
18800 (vcvtq_n): Likewise.
18801 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
18803 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
18804 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18805 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
18806 * config/arm/constraints.md (Rd): Define constraint to check constant is
18807 in the range of 1 to 16.
18808 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
18809 mve_vbrsrq_n_f<mode>: Likewise.
18810 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
18811 mve_vcreateq_f<mode>: Likewise.
18812 * config/arm/predicates.md (mve_imm_16): Define predicate to check
18813 the matching constraint Rd.
18815 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18816 Mihail Ionescu <mihail.ionescu@arm.com>
18817 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18819 * config/arm/arm-builtins.c (hi_UP): Define mode.
18820 * config/arm/arm.h (IS_VPR_REGNUM): Move.
18821 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
18822 (APSRQ_REGNUM): Modify.
18823 (APSRGE_REGNUM): Modify.
18824 * config/arm/arm_mve.h (vctp16q): Define macro.
18825 (vctp32q): Likewise.
18826 (vctp64q): Likewise.
18827 (vctp8q): Likewise.
18829 (__arm_vctp16q): Define intrinsic.
18830 (__arm_vctp32q): Likewise.
18831 (__arm_vctp64q): Likewise.
18832 (__arm_vctp8q): Likewise.
18833 (__arm_vpnot): Likewise.
18834 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
18836 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
18837 (mve_vpnothi): Likewise.
18839 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18840 Mihail Ionescu <mihail.ionescu@arm.com>
18841 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18843 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
18844 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
18845 (vdupq_n_s16): Likewise.
18846 (vdupq_n_s32): Likewise.
18847 (vabsq_s8): Likewise.
18848 (vabsq_s16): Likewise.
18849 (vabsq_s32): Likewise.
18850 (vclsq_s8): Likewise.
18851 (vclsq_s16): Likewise.
18852 (vclsq_s32): Likewise.
18853 (vclzq_s8): Likewise.
18854 (vclzq_s16): Likewise.
18855 (vclzq_s32): Likewise.
18856 (vnegq_s8): Likewise.
18857 (vnegq_s16): Likewise.
18858 (vnegq_s32): Likewise.
18859 (vaddlvq_s32): Likewise.
18860 (vaddvq_s8): Likewise.
18861 (vaddvq_s16): Likewise.
18862 (vaddvq_s32): Likewise.
18863 (vmovlbq_s8): Likewise.
18864 (vmovlbq_s16): Likewise.
18865 (vmovltq_s8): Likewise.
18866 (vmovltq_s16): Likewise.
18867 (vmvnq_s8): Likewise.
18868 (vmvnq_s16): Likewise.
18869 (vmvnq_s32): Likewise.
18870 (vrev16q_s8): Likewise.
18871 (vrev32q_s8): Likewise.
18872 (vrev32q_s16): Likewise.
18873 (vqabsq_s8): Likewise.
18874 (vqabsq_s16): Likewise.
18875 (vqabsq_s32): Likewise.
18876 (vqnegq_s8): Likewise.
18877 (vqnegq_s16): Likewise.
18878 (vqnegq_s32): Likewise.
18879 (vcvtaq_s16_f16): Likewise.
18880 (vcvtaq_s32_f32): Likewise.
18881 (vcvtnq_s16_f16): Likewise.
18882 (vcvtnq_s32_f32): Likewise.
18883 (vcvtpq_s16_f16): Likewise.
18884 (vcvtpq_s32_f32): Likewise.
18885 (vcvtmq_s16_f16): Likewise.
18886 (vcvtmq_s32_f32): Likewise.
18887 (vmvnq_u8): Likewise.
18888 (vmvnq_u16): Likewise.
18889 (vmvnq_u32): Likewise.
18890 (vdupq_n_u8): Likewise.
18891 (vdupq_n_u16): Likewise.
18892 (vdupq_n_u32): Likewise.
18893 (vclzq_u8): Likewise.
18894 (vclzq_u16): Likewise.
18895 (vclzq_u32): Likewise.
18896 (vaddvq_u8): Likewise.
18897 (vaddvq_u16): Likewise.
18898 (vaddvq_u32): Likewise.
18899 (vrev32q_u8): Likewise.
18900 (vrev32q_u16): Likewise.
18901 (vmovltq_u8): Likewise.
18902 (vmovltq_u16): Likewise.
18903 (vmovlbq_u8): Likewise.
18904 (vmovlbq_u16): Likewise.
18905 (vrev16q_u8): Likewise.
18906 (vaddlvq_u32): Likewise.
18907 (vcvtpq_u16_f16): Likewise.
18908 (vcvtpq_u32_f32): Likewise.
18909 (vcvtnq_u16_f16): Likewise.
18910 (vcvtmq_u16_f16): Likewise.
18911 (vcvtmq_u32_f32): Likewise.
18912 (vcvtaq_u16_f16): Likewise.
18913 (vcvtaq_u32_f32): Likewise.
18914 (__arm_vdupq_n_s8): Define intrinsic.
18915 (__arm_vdupq_n_s16): Likewise.
18916 (__arm_vdupq_n_s32): Likewise.
18917 (__arm_vabsq_s8): Likewise.
18918 (__arm_vabsq_s16): Likewise.
18919 (__arm_vabsq_s32): Likewise.
18920 (__arm_vclsq_s8): Likewise.
18921 (__arm_vclsq_s16): Likewise.
18922 (__arm_vclsq_s32): Likewise.
18923 (__arm_vclzq_s8): Likewise.
18924 (__arm_vclzq_s16): Likewise.
18925 (__arm_vclzq_s32): Likewise.
18926 (__arm_vnegq_s8): Likewise.
18927 (__arm_vnegq_s16): Likewise.
18928 (__arm_vnegq_s32): Likewise.
18929 (__arm_vaddlvq_s32): Likewise.
18930 (__arm_vaddvq_s8): Likewise.
18931 (__arm_vaddvq_s16): Likewise.
18932 (__arm_vaddvq_s32): Likewise.
18933 (__arm_vmovlbq_s8): Likewise.
18934 (__arm_vmovlbq_s16): Likewise.
18935 (__arm_vmovltq_s8): Likewise.
18936 (__arm_vmovltq_s16): Likewise.
18937 (__arm_vmvnq_s8): Likewise.
18938 (__arm_vmvnq_s16): Likewise.
18939 (__arm_vmvnq_s32): Likewise.
18940 (__arm_vrev16q_s8): Likewise.
18941 (__arm_vrev32q_s8): Likewise.
18942 (__arm_vrev32q_s16): Likewise.
18943 (__arm_vqabsq_s8): Likewise.
18944 (__arm_vqabsq_s16): Likewise.
18945 (__arm_vqabsq_s32): Likewise.
18946 (__arm_vqnegq_s8): Likewise.
18947 (__arm_vqnegq_s16): Likewise.
18948 (__arm_vqnegq_s32): Likewise.
18949 (__arm_vmvnq_u8): Likewise.
18950 (__arm_vmvnq_u16): Likewise.
18951 (__arm_vmvnq_u32): Likewise.
18952 (__arm_vdupq_n_u8): Likewise.
18953 (__arm_vdupq_n_u16): Likewise.
18954 (__arm_vdupq_n_u32): Likewise.
18955 (__arm_vclzq_u8): Likewise.
18956 (__arm_vclzq_u16): Likewise.
18957 (__arm_vclzq_u32): Likewise.
18958 (__arm_vaddvq_u8): Likewise.
18959 (__arm_vaddvq_u16): Likewise.
18960 (__arm_vaddvq_u32): Likewise.
18961 (__arm_vrev32q_u8): Likewise.
18962 (__arm_vrev32q_u16): Likewise.
18963 (__arm_vmovltq_u8): Likewise.
18964 (__arm_vmovltq_u16): Likewise.
18965 (__arm_vmovlbq_u8): Likewise.
18966 (__arm_vmovlbq_u16): Likewise.
18967 (__arm_vrev16q_u8): Likewise.
18968 (__arm_vaddlvq_u32): Likewise.
18969 (__arm_vcvtpq_u16_f16): Likewise.
18970 (__arm_vcvtpq_u32_f32): Likewise.
18971 (__arm_vcvtnq_u16_f16): Likewise.
18972 (__arm_vcvtmq_u16_f16): Likewise.
18973 (__arm_vcvtmq_u32_f32): Likewise.
18974 (__arm_vcvtaq_u16_f16): Likewise.
18975 (__arm_vcvtaq_u32_f32): Likewise.
18976 (__arm_vcvtaq_s16_f16): Likewise.
18977 (__arm_vcvtaq_s32_f32): Likewise.
18978 (__arm_vcvtnq_s16_f16): Likewise.
18979 (__arm_vcvtnq_s32_f32): Likewise.
18980 (__arm_vcvtpq_s16_f16): Likewise.
18981 (__arm_vcvtpq_s32_f32): Likewise.
18982 (__arm_vcvtmq_s16_f16): Likewise.
18983 (__arm_vcvtmq_s32_f32): Likewise.
18984 (vdupq_n): Define polymorphic variant.
18989 (vaddlvq): Likewise.
18990 (vaddvq): Likewise.
18991 (vmovlbq): Likewise.
18992 (vmovltq): Likewise.
18994 (vrev16q): Likewise.
18995 (vrev32q): Likewise.
18996 (vqabsq): Likewise.
18997 (vqnegq): Likewise.
18998 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
18999 (UNOP_SNONE_NONE): Likewise.
19000 (UNOP_UNONE_UNONE): Likewise.
19001 (UNOP_UNONE_NONE): Likewise.
19002 * config/arm/constraints.md (e): Define new constriant to allow only
19004 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
19005 (mve_vnegq_s<mode>): Likewise.
19006 (mve_vmvnq_<supf><mode>): Likewise.
19007 (mve_vdupq_n_<supf><mode>): Likewise.
19008 (mve_vclzq_<supf><mode>): Likewise.
19009 (mve_vclsq_s<mode>): Likewise.
19010 (mve_vaddvq_<supf><mode>): Likewise.
19011 (mve_vabsq_s<mode>): Likewise.
19012 (mve_vrev32q_<supf><mode>): Likewise.
19013 (mve_vmovltq_<supf><mode>): Likewise.
19014 (mve_vmovlbq_<supf><mode>): Likewise.
19015 (mve_vcvtpq_<supf><mode>): Likewise.
19016 (mve_vcvtnq_<supf><mode>): Likewise.
19017 (mve_vcvtmq_<supf><mode>): Likewise.
19018 (mve_vcvtaq_<supf><mode>): Likewise.
19019 (mve_vrev16q_<supf>v16qi): Likewise.
19020 (mve_vaddlvq_<supf>v4si): Likewise.
19022 2020-03-17 Jakub Jelinek <jakub@redhat.com>
19024 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
19026 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
19028 * read-rtl-function.c (find_param_by_name,
19029 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
19031 * spellcheck.c (get_edit_distance_cutoff): Likewise.
19032 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
19033 * tree.def (SWITCH_EXPR): Likewise.
19034 * selftest.c (assert_str_contains): Likewise.
19035 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
19037 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
19038 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
19039 * langhooks.h (struct lang_hooks_for_decls): Likewise.
19040 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
19041 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
19043 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
19044 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
19045 * tree.c (component_ref_size): Likewise.
19046 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
19047 * gimple-ssa-sprintf.c (get_string_length, format_string,
19048 format_directive): Likewise.
19049 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
19050 * input.c (string_concat_db::get_string_concatenation,
19051 test_lexer_string_locations_ucn4): Likewise.
19052 * cfgexpand.c (pass_expand::execute): Likewise.
19053 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
19054 maybe_diag_overlap): Likewise.
19055 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
19056 * shrink-wrap.c (spread_components): Likewise.
19057 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
19059 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
19061 * dwarf2out.c (dwarf2out_early_finish): Likewise.
19062 * gimple-ssa-store-merging.c: Likewise.
19063 * ira-costs.c (record_operand_costs): Likewise.
19064 * tree-vect-loop.c (vectorizable_reduction): Likewise.
19065 * target.def (dispatch): Likewise.
19066 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
19067 in documentation text.
19068 * doc/tm.texi: Regenerated.
19069 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
19070 duplicated word issue in a comment.
19071 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
19072 * config/i386/i386-features.c (remove_partial_avx_dependency):
19074 * config/msp430/msp430.c (msp430_select_section): Likewise.
19075 * config/gcn/gcn-run.c (load_image): Likewise.
19076 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
19077 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
19078 * config/aarch64/falkor-tag-collision-avoidance.c
19079 (single_dest_per_chain): Likewise.
19080 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
19081 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
19082 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
19083 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
19085 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
19086 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
19087 * config/rs6000/rs6000-logue.c
19088 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
19089 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
19090 Fix various other issues in the comment.
19092 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
19094 * config/arm/t-rmprofile: create new multilib for
19095 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
19098 2020-03-17 Jakub Jelinek <jakub@redhat.com>
19100 PR tree-optimization/94015
19101 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
19102 function where EXP is address of the bytes being stored rather than
19103 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
19104 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
19105 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
19106 calling native_encode_expr if host or target doesn't have 8-bit
19107 chars. Formatting fixes.
19108 (count_nonzero_bytes_addr): New function.
19110 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19111 Mihail Ionescu <mihail.ionescu@arm.com>
19112 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19114 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
19115 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
19116 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
19117 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
19118 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
19119 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
19120 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
19121 (vmvnq_n_s32): Likewise.
19122 (vrev64q_s8): Likewise.
19123 (vrev64q_s16): Likewise.
19124 (vrev64q_s32): Likewise.
19125 (vcvtq_s16_f16): Likewise.
19126 (vcvtq_s32_f32): Likewise.
19127 (vrev64q_u8): Likewise.
19128 (vrev64q_u16): Likewise.
19129 (vrev64q_u32): Likewise.
19130 (vmvnq_n_u16): Likewise.
19131 (vmvnq_n_u32): Likewise.
19132 (vcvtq_u16_f16): Likewise.
19133 (vcvtq_u32_f32): Likewise.
19134 (__arm_vmvnq_n_s16): Define intrinsic.
19135 (__arm_vmvnq_n_s32): Likewise.
19136 (__arm_vrev64q_s8): Likewise.
19137 (__arm_vrev64q_s16): Likewise.
19138 (__arm_vrev64q_s32): Likewise.
19139 (__arm_vrev64q_u8): Likewise.
19140 (__arm_vrev64q_u16): Likewise.
19141 (__arm_vrev64q_u32): Likewise.
19142 (__arm_vmvnq_n_u16): Likewise.
19143 (__arm_vmvnq_n_u32): Likewise.
19144 (__arm_vcvtq_s16_f16): Likewise.
19145 (__arm_vcvtq_s32_f32): Likewise.
19146 (__arm_vcvtq_u16_f16): Likewise.
19147 (__arm_vcvtq_u32_f32): Likewise.
19148 (vrev64q): Define polymorphic variant.
19149 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
19150 (UNOP_SNONE_NONE): Likewise.
19151 (UNOP_SNONE_IMM): Likewise.
19152 (UNOP_UNONE_UNONE): Likewise.
19153 (UNOP_UNONE_NONE): Likewise.
19154 (UNOP_UNONE_IMM): Likewise.
19155 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
19156 (mve_vcvtq_from_f_<supf><mode>): Likewise.
19157 (mve_vmvnq_n_<supf><mode>): Likewise.
19159 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19160 Mihail Ionescu <mihail.ionescu@arm.com>
19161 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19163 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
19164 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
19165 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
19166 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
19167 (vrndxq_f32): Likewise.
19168 (vrndq_f16) Likewise.
19169 (vrndq_f32): Likewise.
19170 (vrndpq_f16): Likewise.
19171 (vrndpq_f32): Likewise.
19172 (vrndnq_f16): Likewise.
19173 (vrndnq_f32): Likewise.
19174 (vrndmq_f16): Likewise.
19175 (vrndmq_f32): Likewise.
19176 (vrndaq_f16): Likewise.
19177 (vrndaq_f32): Likewise.
19178 (vrev64q_f16): Likewise.
19179 (vrev64q_f32): Likewise.
19180 (vnegq_f16): Likewise.
19181 (vnegq_f32): Likewise.
19182 (vdupq_n_f16): Likewise.
19183 (vdupq_n_f32): Likewise.
19184 (vabsq_f16): Likewise.
19185 (vabsq_f32): Likewise.
19186 (vrev32q_f16): Likewise.
19187 (vcvttq_f32_f16): Likewise.
19188 (vcvtbq_f32_f16): Likewise.
19189 (vcvtq_f16_s16): Likewise.
19190 (vcvtq_f32_s32): Likewise.
19191 (vcvtq_f16_u16): Likewise.
19192 (vcvtq_f32_u32): Likewise.
19193 (__arm_vrndxq_f16): Define intrinsic.
19194 (__arm_vrndxq_f32): Likewise.
19195 (__arm_vrndq_f16): Likewise.
19196 (__arm_vrndq_f32): Likewise.
19197 (__arm_vrndpq_f16): Likewise.
19198 (__arm_vrndpq_f32): Likewise.
19199 (__arm_vrndnq_f16): Likewise.
19200 (__arm_vrndnq_f32): Likewise.
19201 (__arm_vrndmq_f16): Likewise.
19202 (__arm_vrndmq_f32): Likewise.
19203 (__arm_vrndaq_f16): Likewise.
19204 (__arm_vrndaq_f32): Likewise.
19205 (__arm_vrev64q_f16): Likewise.
19206 (__arm_vrev64q_f32): Likewise.
19207 (__arm_vnegq_f16): Likewise.
19208 (__arm_vnegq_f32): Likewise.
19209 (__arm_vdupq_n_f16): Likewise.
19210 (__arm_vdupq_n_f32): Likewise.
19211 (__arm_vabsq_f16): Likewise.
19212 (__arm_vabsq_f32): Likewise.
19213 (__arm_vrev32q_f16): Likewise.
19214 (__arm_vcvttq_f32_f16): Likewise.
19215 (__arm_vcvtbq_f32_f16): Likewise.
19216 (__arm_vcvtq_f16_s16): Likewise.
19217 (__arm_vcvtq_f32_s32): Likewise.
19218 (__arm_vcvtq_f16_u16): Likewise.
19219 (__arm_vcvtq_f32_u32): Likewise.
19220 (vrndxq): Define polymorphic variants.
19222 (vrndpq): Likewise.
19223 (vrndnq): Likewise.
19224 (vrndmq): Likewise.
19225 (vrndaq): Likewise.
19226 (vrev64q): Likewise.
19229 (vrev32q): Likewise.
19230 (vcvtbq_f32): Likewise.
19231 (vcvttq_f32): Likewise.
19233 * config/arm/arm_mve_builtins.def (VAR2): Define.
19235 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
19236 (mve_vrndq_f<mode>): Likewise.
19237 (mve_vrndpq_f<mode>): Likewise.
19238 (mve_vrndnq_f<mode>): Likewise.
19239 (mve_vrndmq_f<mode>): Likewise.
19240 (mve_vrndaq_f<mode>): Likewise.
19241 (mve_vrev64q_f<mode>): Likewise.
19242 (mve_vnegq_f<mode>): Likewise.
19243 (mve_vdupq_n_f<mode>): Likewise.
19244 (mve_vabsq_f<mode>): Likewise.
19245 (mve_vrev32q_fv8hf): Likewise.
19246 (mve_vcvttq_f32_f16v4sf): Likewise.
19247 (mve_vcvtbq_f32_f16v4sf): Likewise.
19248 (mve_vcvtq_to_f_<supf><mode>): Likewise.
19250 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19251 Mihail Ionescu <mihail.ionescu@arm.com>
19252 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19254 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
19256 (ARM_BUILTIN_MVE_PATTERN_START): Define.
19257 (arm_init_mve_builtins): Define function.
19258 (arm_init_builtins): Add TARGET_HAVE_MVE check.
19259 (arm_expand_builtin_1): Check the range of fcode.
19260 (arm_expand_mve_builtin): Define function to expand MVE builtins.
19261 (arm_expand_builtin): Check the range of fcode.
19262 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
19264 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
19265 (vst4q_s8): Define macro.
19266 (vst4q_s16): Likewise.
19267 (vst4q_s32): Likewise.
19268 (vst4q_u8): Likewise.
19269 (vst4q_u16): Likewise.
19270 (vst4q_u32): Likewise.
19271 (vst4q_f16): Likewise.
19272 (vst4q_f32): Likewise.
19273 (__arm_vst4q_s8): Define inline builtin.
19274 (__arm_vst4q_s16): Likewise.
19275 (__arm_vst4q_s32): Likewise.
19276 (__arm_vst4q_u8): Likewise.
19277 (__arm_vst4q_u16): Likewise.
19278 (__arm_vst4q_u32): Likewise.
19279 (__arm_vst4q_f16): Likewise.
19280 (__arm_vst4q_f32): Likewise.
19281 (__ARM_mve_typeid): Define macro with MVE types.
19282 (__ARM_mve_coerce): Define macro with _Generic feature.
19283 (vst4q): Define polymorphic variant for different vst4q builtins.
19284 * config/arm/arm_mve_builtins.def: New file.
19285 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
19287 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
19288 (unspec): Define unspec.
19289 (mve_vst4q<mode>): Define RTL pattern.
19290 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
19292 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
19294 (define_split): Allow OI mode split for MVE after reload.
19295 (define_split): Allow XI mode split for MVE after reload.
19296 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
19297 (arm-builtins.o): Likewise.
19299 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
19301 * c-typeck.c (process_init_element): Handle constructor_type with
19302 type size represented by POLY_INT_CST.
19304 2020-03-17 Jakub Jelinek <jakub@redhat.com>
19306 PR tree-optimization/94187
19307 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
19308 nchars - offset < nbytes.
19310 PR middle-end/94189
19311 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
19312 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
19313 for code-generation.
19315 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
19318 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
19319 after changing memory subreg.
19321 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19322 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19324 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
19325 emulator calls for dobule precision arithmetic operations for MVE.
19327 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19328 Mihail Ionescu <mihail.ionescu@arm.com>
19329 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19331 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
19332 feature bit is on and -mfpu=auto is passed as compiler option, do not
19333 generate error on not finding any matching fpu. Because in this case
19334 fpu is not required.
19335 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
19336 enabled for MVE and also for all VFP extensions.
19337 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
19339 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
19340 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
19341 along with feature bits mve_float.
19342 (mve): Modify add options in armv8.1-m.main arch for MVE.
19343 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
19345 * config/arm/arm.c (use_return_insn): Replace the
19346 check with TARGET_VFP_BASE.
19347 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
19349 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
19350 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
19352 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
19353 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
19355 (arm_compute_frame_layout): Likewise.
19356 (arm_save_coproc_regs): Likewise.
19357 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
19359 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
19360 with equivalent macro TARGET_VFP_BASE.
19361 (arm_expand_epilogue_apcs_frame): Likewise.
19362 (arm_expand_epilogue): Likewise.
19363 (arm_conditional_register_usage): Likewise.
19364 (arm_declare_function_name): Add check to skip printing .fpu directive
19365 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
19367 * config/arm/arm.h (TARGET_VFP_BASE): Define.
19368 * config/arm/arm.md (arch): Add "mve" to arch.
19369 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
19370 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
19371 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
19372 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
19374 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
19375 to not allow for MVE.
19376 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
19378 (VUNSPEC_GET_FPSCR): Define.
19379 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
19380 instructions which move to general-purpose Register from Floating-point
19381 Special register and vice-versa.
19382 (thumb2_movhi_fp16): Likewise.
19383 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
19384 with MCR and MRC instructions which set and get Floating-point Status
19385 and Control Register (FPSCR).
19386 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
19388 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
19389 float move patterns in MVE.
19390 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
19391 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
19392 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
19393 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
19394 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
19395 TARGET_VFP_BASE check.
19396 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
19397 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
19399 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
19400 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
19404 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19405 Mihail Ionescu <mihail.ionescu@arm.com>
19406 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19408 * config.gcc (arm_mve.h): Include mve intrinsics header file.
19409 * config/arm/aout.h (p0): Add new register name for MVE predicated
19411 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
19412 common to Neon and MVE.
19413 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
19414 (arm_init_simd_builtin_types): Disable poly types for MVE.
19415 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
19416 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
19417 ARM_BUILTIN_NEON_LANE_CHECK.
19418 (mve_dereference_pointer): Add function.
19419 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
19421 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
19422 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
19423 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
19424 with floating point enabled.
19425 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
19426 simd_immediate_valid_for_move.
19427 (simd_immediate_valid_for_move): Renamed from
19428 neon_immediate_valid_for_move function.
19429 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
19430 error if vfpv2 feature bit is disabled and mve feature bit is also
19431 disabled for HARD_FLOAT_ABI.
19432 (use_return_insn): Check to not push VFP regs for MVE.
19433 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
19435 (aapcs_vfp_allocate_return_reg): Likewise.
19436 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
19437 address operand for MVE.
19438 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
19439 (neon_valid_immediate): Rename to simd_valid_immediate.
19440 (simd_valid_immediate): Rename from neon_valid_immediate.
19441 (simd_valid_immediate): MVE check on size of vector is 128 bits.
19442 (neon_immediate_valid_for_move): Rename to
19443 simd_immediate_valid_for_move.
19444 (simd_immediate_valid_for_move): Rename from
19445 neon_immediate_valid_for_move.
19446 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
19448 (neon_make_constant): Modify call to neon_valid_immediate function.
19449 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
19451 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
19452 (arm_compute_frame_layout): Calculate space for saved VFP registers for
19454 (arm_save_coproc_regs): Save coproc registers for MVE.
19455 (arm_print_operand): Add case 'E' to print memory operands for MVE.
19456 (arm_print_operand_address): Check to print register number for MVE.
19457 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
19458 (arm_modes_tieable_p): Check to allow structure mode for MVE.
19459 (arm_regno_class): Add VPR_REGNUM check.
19460 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
19462 (arm_expand_epilogue): MVE check for enabling pop instructions in
19464 (arm_print_asm_arch_directives): Modify function to disable print of
19465 .arch_extension "mve" and "fp" for cases where MVE is enabled with
19467 (arm_vector_mode_supported_p): Check for modes available in MVE interger
19468 and MVE floating point.
19469 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
19471 (arm_conditional_register_usage): Enable usage of conditional regsiter
19473 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
19474 (arm_declare_function_name): Modify function to disable print of
19475 .arch_extension "mve" and "fp" for cases where MVE is enabled with
19477 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
19478 when target general registers are required.
19479 (TARGET_HAVE_MVE_FLOAT): Likewise.
19480 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
19482 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
19483 which indicate this is not available for across function calls.
19484 (FIRST_PSEUDO_REGISTER): Modify.
19485 (VALID_MVE_MODE): Define valid MVE mode.
19486 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
19487 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
19488 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
19489 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
19491 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
19492 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
19493 (enum reg_class): Add VPR_REG entry.
19494 (REG_CLASS_NAMES): Add VPR_REG entry.
19495 * config/arm/arm.md (VPR_REGNUM): Define.
19496 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
19497 "unconditional" instructions.
19498 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
19499 (movdf_soft_insn): Modify RTL to not allow for MVE.
19500 (vfp_pop_multiple_with_writeback): Enable for MVE.
19501 (include "mve.md"): Include mve.md file.
19502 * config/arm/arm_mve.h: Add MVE intrinsics head file.
19503 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
19504 for vector predicated operands.
19505 * config/arm/iterators.md (VNIM1): Define.
19506 (VNINOTM1): Define.
19507 (VHFBF_split): Define
19508 * config/arm/mve.md: New file.
19509 (mve_mov<mode>): Define RTL for move, store and load in MVE.
19510 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
19512 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
19513 simd_immediate_valid_for_move.
19514 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
19515 is common to MVE and NEON to vec-common.md file.
19516 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
19517 * config/arm/predicates.md (vpr_register_operand): Define.
19518 * config/arm/t-arm: Add mve.md file.
19519 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
19521 (mve_store): Add MVE instructions mve_store to attribute "type".
19522 (mve_load): Add MVE instructions mve_load to attribute "type".
19523 (is_mve_type): Define attribute.
19524 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
19525 standard move patterns in MVE along with NEON and IWMMXT with mode
19527 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
19528 and IWMMXT with mode iterator V8HF.
19529 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
19531 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
19532 simd_immediate_valid_for_move.
19535 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
19538 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
19539 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
19541 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
19543 2020-03-16 Jakub Jelinek <jakub@redhat.com>
19546 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
19549 PR tree-optimization/94166
19550 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
19551 as secondary comparison key.
19553 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
19555 PR tree-optimization/94125
19556 * tree-loop-distribution.c
19557 (loop_distribution::break_alias_scc_partitions): Update post order
19558 number for merged scc.
19560 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
19563 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
19565 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
19566 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
19567 and ext_sse_reg_operand check.
19569 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
19571 * common.opt: Avoid redundancy in the help text.
19572 * config/arc/arc.opt: Likewise.
19573 * config/cr16/cr16.opt: Likewise.
19575 2020-03-14 Jakub Jelinek <jakub@redhat.com>
19577 PR middle-end/93566
19578 * tree-nested.c (convert_nonlocal_omp_clauses,
19579 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
19580 with C/C++ array sections.
19582 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
19585 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
19586 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
19589 2020-03-14 Jakub Jelinek <jakub@redhat.com>
19591 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
19592 "a an" to "an" in a comment.
19593 * hsa-common.h (is_a_helper): Likewise.
19594 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
19595 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
19596 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
19598 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
19601 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
19602 64-bit value by 64 bits (UB).
19604 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
19606 PR rtl-optimization/92303
19607 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
19609 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
19611 PR rtl-optimization/94148
19612 PR rtl-optimization/94042
19613 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
19614 (df_worklist_propagate_forward): New parameter last_change_age, use
19615 that instead of bb->aux.
19616 (df_worklist_propagate_backward): Ditto.
19617 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
19619 2020-03-13 Richard Biener <rguenther@suse.de>
19621 PR tree-optimization/94163
19622 * tree-ssa-pre.c (create_expression_by_pieces): Check
19623 whether alignment would be zero.
19625 2020-03-13 Martin Liska <mliska@suse.cz>
19628 * lto-wrapper.c (run_gcc): Use concat for appending
19629 to collect_gcc_options.
19631 2020-03-13 Jakub Jelinek <jakub@redhat.com>
19634 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
19635 instead of GEN_INT.
19637 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
19640 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
19641 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
19642 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
19643 TARGET_AVX512VL and ext_sse_reg_operand check.
19645 2020-03-13 Bu Le <bule1@huawei.com>
19648 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
19649 (-param=aarch64-double-recp-precision=): New options.
19650 * doc/invoke.texi: Document them.
19651 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
19652 instead of hard-coding the choice of 1 for float and 2 for double.
19654 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
19656 PR rtl-optimization/94119
19657 * resource.h (clear_hashed_info_until_next_barrier): Declare.
19658 * resource.c (clear_hashed_info_until_next_barrier): New function.
19659 * reorg.c (add_to_delay_list): Fix formatting.
19660 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
19661 the next instruction after removing a BARRIER.
19663 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
19665 PR middle-end/92071
19666 * expmed.c (store_integral_bit_field): For fields larger than a word,
19667 call extract_bit_field on the value if the mode is BLKmode. Remove
19668 specific path for big-endian targets and tidy things up a little bit.
19670 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
19672 PR rtl-optimization/90275
19673 * cse.c (cse_insn): Delete no-op register moves too.
19675 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
19677 * config/rx/rx.md (CTRLREG_CPEN): Remove.
19678 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
19680 2020-03-12 Richard Biener <rguenther@suse.de>
19682 PR tree-optimization/94103
19683 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
19684 punning when the mode precision is not sufficient.
19686 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
19689 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
19690 MODE_V1DF and MODE_V2SF.
19691 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
19692 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
19695 2020-03-12 Jakub Jelinek <jakub@redhat.com>
19697 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
19698 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
19699 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
19700 * doc/tm.texi: Regenerated.
19702 PR tree-optimization/94130
19703 * tree-ssa-dse.c: Include gimplify.h.
19704 (increment_start_addr): If stmt has lhs, drop the lhs from call and
19705 set it after the call to the original value of the first argument.
19707 (decrement_count): Formatting fix.
19709 2020-03-11 Delia Burduv <delia.burduv@arm.com>
19711 * config/arm/arm-builtins.c
19712 (arm_init_simd_builtin_scalar_types): New.
19713 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
19714 (vld2q_bf16): Used new builtin type.
19715 (vld3_bf16): Used new builtin type.
19716 (vld3q_bf16): Used new builtin type.
19717 (vld4_bf16): Used new builtin type.
19718 (vld4q_bf16): Used new builtin type.
19719 (vld2_dup_bf16): Used new builtin type.
19720 (vld2q_dup_bf16): Used new builtin type.
19721 (vld3_dup_bf16): Used new builtin type.
19722 (vld3q_dup_bf16): Used new builtin type.
19723 (vld4_dup_bf16): Used new builtin type.
19724 (vld4q_dup_bf16): Used new builtin type.
19726 2020-03-11 Jakub Jelinek <jakub@redhat.com>
19729 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
19730 at the start to switch to data section. Don't print extra newline if
19731 .globl directive has not been emitted.
19733 2020-03-11 Richard Biener <rguenther@suse.de>
19735 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
19738 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
19740 PR middle-end/93961
19741 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
19742 whose type is a qualified union.
19744 2020-03-11 Jakub Jelinek <jakub@redhat.com>
19747 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
19748 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
19751 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
19753 (get_nth_most_common_value): Use abs_hwi instead of abs.
19755 PR middle-end/94111
19756 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
19757 is rvc_normal, otherwise use real_to_decimal to print the number to
19760 PR tree-optimization/94114
19761 * tree-loop-distribution.c (generate_memset_builtin): Call
19762 rewrite_to_non_trapping_overflow even on mem.
19763 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
19766 2020-03-10 Jeff Law <law@redhat.com>
19768 * config/bfin/bfin.md (movsi_insv): Add length attribute.
19770 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
19773 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
19774 NAN and SIGNED_ZEROR for smax/smin.
19776 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
19779 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
19780 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
19782 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
19784 * loop-iv.c (find_simple_exit): Make it static.
19785 * cfgloop.h: Remove the corresponding prototype.
19787 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
19789 * ddg.c (create_ddg): Fix intendation.
19790 (set_recurrence_length): Likewise.
19791 (create_ddg_all_sccs): Likewise.
19793 2020-03-10 Jakub Jelinek <jakub@redhat.com>
19796 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
19797 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
19800 2020-03-09 Jason Merrill <jason@redhat.com>
19802 * gdbinit.in (pgs): Fix typo in documentation.
19804 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
19808 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
19810 PR rtl-optimization/93564
19811 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
19812 do not honor reg alloc order.
19814 2020-03-09 Andrew Pinski <apinski@marvell.com>
19816 PR inline-asm/94095
19817 * doc/extend.texi (x86 Operand Modifiers): Fix column
19820 2020-03-09 Martin Liska <mliska@suse.cz>
19823 * config/rs6000/rs6000.c (rs6000_option_override_internal):
19824 Remove set of str_align_loops and str_align_jumps as these
19825 should be set in previous 2 conditions in the function.
19827 2020-03-09 Jakub Jelinek <jakub@redhat.com>
19829 PR rtl-optimization/94045
19830 * params.opt (-param=max-find-base-term-values=): New option.
19831 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
19832 in a single toplevel find_base_term call.
19834 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
19837 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
19838 * config/aarch64/aarch64-simd.md
19839 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
19840 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
19841 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
19842 * config/aarch64/arm_neon.h:
19843 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
19844 (vmlal_lane_u16): Likewise.
19845 (vmlal_lane_s32): Likewise.
19846 (vmlal_lane_u32): Likewise.
19847 (vmlal_laneq_s16): Likewise.
19848 (vmlal_laneq_u16): Likewise.
19849 (vmlal_laneq_s32): Likewise.
19850 (vmlal_laneq_u32): Likewise.
19851 (vmull_lane_s16): Likewise.
19852 (vmull_lane_u16): Likewise.
19853 (vmull_lane_s32): Likewise.
19854 (vmull_lane_u32): Likewise.
19855 (vmull_laneq_s16): Likewise.
19856 (vmull_laneq_u16): Likewise.
19857 (vmull_laneq_s32): Likewise.
19858 (vmull_laneq_u32): Likewise.
19859 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
19862 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
19864 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
19865 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
19866 (aarch64_mls_elt<mode>): Likewise.
19867 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
19868 (aarch64_fma4_elt<mode>): Likewise.
19869 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
19870 (aarch64_fma4_elt_to_64v2df): Likewise.
19871 (aarch64_fnma4_elt<mode>): Likewise.
19872 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
19873 (aarch64_fnma4_elt_to_64v2df): Likewise.
19875 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19877 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
19878 Specify movprfx attribute.
19879 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
19881 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
19884 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
19886 (TARGET_NO_FP_IN_TOC): Same.
19887 * config/rs6000/aix71.h: Same.
19888 * config/rs6000/aix72.h: Same.
19890 2020-03-06 Andrew Pinski <apinski@marvell.com>
19891 Jeff Law <law@redhat.com>
19893 PR rtl-optimization/93996
19894 * haifa-sched.c (remove_notes): Be more careful when adding
19897 2020-03-06 Delia Burduv <delia.burduv@arm.com>
19899 * config/arm/arm_neon.h (vld2_bf16): New.
19905 (vld2_dup_bf16): New.
19906 (vld2q_dup_bf16): New.
19907 (vld3_dup_bf16): New.
19908 (vld3q_dup_bf16): New.
19909 (vld4_dup_bf16): New.
19910 (vld4q_dup_bf16): New.
19911 * config/arm/arm_neon_builtins.def
19912 (vld2): Changed to VAR13 and added v4bf, v8bf
19913 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
19914 (vld3): Changed to VAR13 and added v4bf, v8bf
19915 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
19916 (vld4): Changed to VAR13 and added v4bf, v8bf
19917 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
19918 * config/arm/iterators.md (VDXBF2): New iterator.
19919 *config/arm/neon.md (neon_vld2): Use new iterators.
19920 (neon_vld2_dup<mode): Use new iterators.
19921 (neon_vld3<mode>): Likewise.
19922 (neon_vld3qa<mode>): Likewise.
19923 (neon_vld3qb<mode>): Likewise.
19924 (neon_vld3_dup<mode>): Likewise.
19925 (neon_vld4<mode>): Likewise.
19926 (neon_vld4qa<mode>): Likewise.
19927 (neon_vld4qb<mode>): Likewise.
19928 (neon_vld4_dup<mode>): Likewise.
19929 (neon_vld2_dupv8bf): New.
19930 (neon_vld3_dupv8bf): Likewise.
19931 (neon_vld4_dupv8bf): Likewise.
19933 2020-03-06 Delia Burduv <delia.burduv@arm.com>
19935 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
19936 (bfloat16x8x2_t): New typedef.
19937 (bfloat16x4x3_t): New typedef.
19938 (bfloat16x8x3_t): New typedef.
19939 (bfloat16x4x4_t): New typedef.
19940 (bfloat16x8x4_t): New typedef.
19947 * config/arm/arm-builtins.c (v2bf_UP): Define.
19949 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
19950 * config/arm/arm-modes.def (V2BF): New mode.
19951 * config/arm/arm-simd-builtin-types.def
19952 (Bfloat16x2_t): New entry.
19953 * config/arm/arm_neon_builtins.def
19954 (vst2): Changed to VAR13 and added v4bf, v8bf
19955 (vst3): Changed to VAR13 and added v4bf, v8bf
19956 (vst4): Changed to VAR13 and added v4bf, v8bf
19957 * config/arm/iterators.md (VDXBF): New iterator.
19958 (VQ2BF): New iterator.
19959 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
19960 (neon_vst2<mode>): Used new iterators.
19961 (neon_vst3<mode>): Used new iterators.
19962 (neon_vst3<mode>): Used new iterators.
19963 (neon_vst3qa<mode>): Used new iterators.
19964 (neon_vst3qb<mode>): Used new iterators.
19965 (neon_vst4<mode>): Used new iterators.
19966 (neon_vst4<mode>): Used new iterators.
19967 (neon_vst4qa<mode>): Used new iterators.
19968 (neon_vst4qb<mode>): Used new iterators.
19970 2020-03-06 Delia Burduv <delia.burduv@arm.com>
19972 * config/aarch64/aarch64-simd-builtins.def
19973 (bfcvtn): New built-in function.
19974 (bfcvtn_q): New built-in function.
19975 (bfcvtn2): New built-in function.
19976 (bfcvt): New built-in function.
19977 * config/aarch64/aarch64-simd.md
19978 (aarch64_bfcvtn<q><mode>): New pattern.
19979 (aarch64_bfcvtn2v8bf): New pattern.
19980 (aarch64_bfcvtbf): New pattern.
19981 * config/aarch64/arm_bf16.h (float32_t): New typedef.
19982 (vcvth_bf16_f32): New intrinsic.
19983 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
19984 (vcvtq_low_bf16_f32): New intrinsic.
19985 (vcvtq_high_bf16_f32): New intrinsic.
19986 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
19987 (UNSPEC_BFCVTN): New UNSPEC.
19988 (UNSPEC_BFCVTN2): New UNSPEC.
19989 (UNSPEC_BFCVT): New UNSPEC.
19990 * config/arm/types.md (bf_cvt): New type.
19992 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
19994 * config/s390/s390.md ("tabort"): Get rid of two consecutive
19995 blanks in format string.
19997 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
20001 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
20002 * config/i386/i386.c (ix86_get_ssemov): New function.
20003 (ix86_output_ssemov): Likewise.
20004 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
20005 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
20007 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
20008 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
20009 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
20010 (*movti_internal): Likewise.
20011 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
20013 2020-03-05 Jeff Law <law@redhat.com>
20015 PR tree-optimization/91890
20016 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
20017 Use gimple_or_expr_nonartificial_location.
20018 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
20019 Use gimple_or_expr_nonartificial_location.
20020 * gimple.c (gimple_or_expr_nonartificial_location): New function.
20021 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
20022 * tree-ssa-strlen.c (maybe_warn_overflow): Use
20023 gimple_or_expr_nonartificial_location.
20024 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
20025 (maybe_warn_pointless_strcmp): Likewise.
20027 2020-03-05 Jakub Jelinek <jakub@redhat.com>
20030 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
20031 SRC and MASK arguments to __m128 from __m128d.
20032 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
20034 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
20036 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
20037 argument to __m128i from __m128d.
20038 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
20040 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
20041 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
20044 2020-03-05 Delia Burduv <delia.burduv@arm.com>
20046 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
20047 (vbfmlalbq_f32): New.
20048 (vbfmlaltq_f32): New.
20049 (vbfmlalbq_lane_f32): New.
20050 (vbfmlaltq_lane_f32): New.
20051 (vbfmlalbq_laneq_f32): New.
20052 (vbfmlaltq_laneq_f32): New.
20053 * config/arm/arm_neon_builtins.def (vmmla): New.
20058 (vfmab_laneq): New.
20059 (vfmat_laneq): New.
20060 * config/arm/iterators.md (BF_MA): New int iterator.
20061 (bt): New int attribute.
20062 (VQXBF): Copy of VQX with V8BF.
20063 * config/arm/neon.md (neon_vmmlav8bf): New insn.
20064 (neon_vfma<bt>v8bf): New insn.
20065 (neon_vfma<bt>_lanev8bf): New insn.
20066 (neon_vfma<bt>_laneqv8bf): New expand.
20067 (neon_vget_high<mode>): Changed iterator to VQXBF.
20068 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
20069 (UNSPEC_BFMAB): New UNSPEC.
20070 (UNSPEC_BFMAT): New UNSPEC.
20072 2020-03-05 Jakub Jelinek <jakub@redhat.com>
20074 PR middle-end/93399
20075 * tree-pretty-print.h (pretty_print_string): Declare.
20076 * tree-pretty-print.c (pretty_print_string): Remove forward
20077 declaration, no longer static. Change nbytes parameter type
20078 from unsigned to size_t.
20079 * print-rtl.c (print_value) <case CONST_STRING>: Use
20080 pretty_print_string and for shrink way too long strings.
20082 2020-03-05 Richard Biener <rguenther@suse.de>
20083 Jakub Jelinek <jakub@redhat.com>
20085 PR tree-optimization/93582
20086 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
20087 last operand as signed when looking for memset offset. Formatting
20090 2020-03-04 Andrew Pinski <apinski@marvell.com>
20093 * value-prof.c (dump_histogram_value): Use std::abs.
20095 2020-03-04 Martin Sebor <msebor@redhat.com>
20097 PR tree-optimization/93986
20098 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
20099 operands to the same precision widest_int to avoid ICEs.
20101 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
20104 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
20105 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
20106 for OPTION_MASK_ALTIVEC.
20108 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
20110 * config.gcc: Include the glibc-stdint.h header for zTPF.
20112 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
20114 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
20115 direct FPR-GPR copies.
20116 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
20119 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
20121 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
20122 operands to the prologue_tpf expander.
20123 (s390_emit_epilogue): Likewise.
20124 (s390_option_override_internal): Do error checking and setup for
20126 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
20127 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
20128 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
20129 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
20130 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
20131 operands for the check flag and the branch target.
20132 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
20133 ("mtpf-trace-hook-prologue-target")
20134 ("mtpf-trace-hook-epilogue-check")
20135 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
20137 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
20138 options are for debugging purposes and will not be documented
20141 2020-03-04 Jakub Jelinek <jakub@redhat.com>
20144 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
20146 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
20147 argument. Change pd argument so that it can be modified. Turn
20148 constant non-CONSTRUCTOR store into non-constant if it is too large.
20149 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
20151 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
20154 2020-02-04 Richard Biener <rguenther@suse.de>
20156 PR tree-optimization/93964
20157 * graphite-isl-ast-to-gimple.c
20158 (gcc_expression_from_isl_ast_expr_id): Add intermediate
20159 conversion for pointer to integer converts.
20160 * graphite-scop-detection.c (assign_parameter_index_in_region):
20163 2020-03-04 Martin Liska <mliska@suse.cz>
20167 * doc/invoke.texi: Clarify --help=language and --help=common
20170 2020-03-04 Jakub Jelinek <jakub@redhat.com>
20172 PR tree-optimization/94001
20173 * tree-tailcall.c (process_assignment): Before comparing op1 to
20174 *ass_var, verify *ass_var is non-NULL.
20176 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
20179 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
20182 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
20184 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
20185 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
20186 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
20187 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
20188 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
20189 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
20190 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
20191 (V_bf_low, V_bf_cvt_m): New mode attributes.
20192 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
20193 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
20194 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
20195 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
20196 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
20198 2020-03-03 Jakub Jelinek <jakub@redhat.com>
20200 PR tree-optimization/93582
20201 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
20202 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
20203 members, initialize them in the constructor and if mask is non-NULL,
20204 artificially push_partial_def {} for the portions of the mask that
20206 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
20207 val and return (void *)-1. Formatting fix.
20208 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
20210 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
20211 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
20213 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
20215 (visit_stmt): Formatting fix.
20217 2020-03-03 Richard Biener <rguenther@suse.de>
20219 PR tree-optimization/93946
20220 * alias.h (refs_same_for_tbaa_p): Declare.
20221 * alias.c (refs_same_for_tbaa_p): New function.
20222 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
20224 * tree-ssa-scopedtables.h
20225 (avail_exprs_stack::lookup_avail_expr): Add output argument
20226 giving access to the hashtable entry.
20227 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
20229 * tree-ssa-dom.c: Include alias.h.
20230 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
20231 removing redundant store.
20232 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
20233 (ao_ref_init_from_vn_reference): Adjust prototype.
20234 (vn_reference_lookup_pieces): Likewise.
20235 (vn_reference_insert_pieces): Likewise.
20236 * tree-ssa-sccvn.c: Track base alias set in addition to alias
20238 (eliminate_dom_walker::eliminate_stmt): Also check base alias
20239 set when removing redundant stores.
20240 (visit_reference_op_store): Likewise.
20241 * dse.c (record_store): Adjust valdity check for redundant
20244 2020-03-03 Jakub Jelinek <jakub@redhat.com>
20247 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
20249 PR rtl-optimization/94002
20250 * explow.c (plus_constant): Punt if cst has VOIDmode and
20251 get_pool_mode is different from mode.
20253 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20255 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
20256 address has an offset which fits the scalling constraint for a
20257 load/store operation.
20258 (legitimate_scaled_address_p): Update use
20259 leigitimate_small_data_address_p.
20260 (arc_print_operand): Likewise.
20261 (arc_legitimate_address_p): Likewise.
20262 (legitimate_small_data_address_p): Likewise.
20264 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20266 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
20267 (fnmasf4_fpu): Likewise.
20269 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20271 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
20273 (subdi3): Likewise.
20274 (adddi3_i): Remove pattern.
20275 (subdi3_i): Likewise.
20277 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20279 * config/arc/arc.md (eh_return): Add length info.
20281 2020-03-02 David Malcolm <dmalcolm@redhat.com>
20283 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
20285 2020-03-02 David Malcolm <dmalcolm@redhat.com>
20287 * doc/invoke.texi (Static Analyzer Options): Add
20288 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
20291 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
20294 * config/i386/i386.md (movstrict<mode>): Allow only
20295 registers with VALID_INT_MODE_P modes.
20297 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
20299 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
20300 (reduc_insn): Use 'U' and 'B' operand codes.
20301 (reduc_<reduc_op>_scal_<mode>): Allow all types.
20302 (reduc_<reduc_op>_scal_v64di): Delete.
20303 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
20304 (*plus_carry_dpp_shr_v64si): Change to ...
20305 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
20306 (mov_from_lane63_v64di): Change to ...
20307 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
20308 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
20309 Support UNSPEC_MOV_DPP_SHR output formats.
20310 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
20311 Add "use_extends" reductions.
20312 (print_operand_address): Add 'I' and 'U' codes.
20313 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
20315 2020-03-02 Martin Liska <mliska@suse.cz>
20317 * lto-wrapper.c: Fix typo in comment about
20318 C++ standard version.
20320 2020-03-01 Martin Sebor <msebor@redhat.com>
20323 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
20325 2020-03-01 Martin Sebor <msebor@redhat.com>
20327 PR middle-end/93829
20328 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
20329 of a pointer in the outermost ADDR_EXPRs.
20331 2020-02-28 Jeff Law <law@redhat.com>
20333 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
20334 * config/v850/v850.c (v850_asm_trampoline_template): Update
20337 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
20340 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
20343 2020-02-28 Martin Liska <mliska@suse.cz>
20346 * configure.ac: Improve detection of ld_date by requiring
20347 either two dashes or none.
20348 * configure: Regenerate.
20350 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
20352 PR rtl-optimization/93564
20353 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
20354 do not honor reg alloc order.
20356 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
20359 * config/aarch64/aarch64.c (aarch64_override_options): Fix
20360 misleading warning string.
20362 2020-02-27 Martin Sebor <msebor@redhat.com>
20364 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
20366 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
20369 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
20370 Split the insn into two parts. This insn only does variable
20371 extract from a register.
20372 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
20373 variable extract from memory.
20374 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
20375 only does variable extract from a register.
20376 (vsx_extract_v4sf_var_load): New insn, do variable extract from
20378 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
20379 into two parts. This insn only does variable extract from a
20381 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
20382 do variable extract from memory.
20384 2020-02-27 Martin Jambor <mjambor@suse.cz>
20385 Feng Xue <fxue@os.amperecomputing.com>
20388 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
20389 new function calls_same_node_or_its_all_contexts_clone_p.
20390 (cgraph_edge_brings_value_p): Use it.
20391 (cgraph_edge_brings_value_p): Likewise.
20392 (self_recursive_pass_through_p): Return false if caller is a clone.
20393 (self_recursive_agg_pass_through_p): Likewise.
20395 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
20397 PR middle-end/92152
20398 * alias.c (ends_tbaa_access_path_p): Break out from ...
20399 (component_uses_parent_alias_set_from): ... here.
20400 * alias.h (ends_tbaa_access_path_p): Declare.
20401 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
20402 handle trailing arrays past end of tbaa access path.
20403 (aliasing_component_refs_p): ... here; likewise.
20404 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
20405 path; disambiguate also past end of it.
20406 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
20409 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
20411 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
20412 beginning of the file.
20413 (vcreate_bf16, vcombine_bf16): New.
20414 (vdup_n_bf16, vdupq_n_bf16): New.
20415 (vdup_lane_bf16, vdup_laneq_bf16): New.
20416 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
20417 (vduph_lane_bf16, vduph_laneq_bf16): New.
20418 (vset_lane_bf16, vsetq_lane_bf16): New.
20419 (vget_lane_bf16, vgetq_lane_bf16): New.
20420 (vget_high_bf16, vget_low_bf16): New.
20421 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
20422 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
20423 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
20424 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
20425 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
20426 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
20427 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
20428 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
20429 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
20430 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
20431 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
20432 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
20433 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
20434 (vreinterpretq_bf16_p128): New.
20435 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
20436 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
20437 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
20438 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
20439 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
20440 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
20441 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
20442 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
20443 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
20444 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
20445 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
20446 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
20447 (vreinterpretq_p128_bf16): New.
20448 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
20449 (V_elem): Likewise.
20450 (V_elem_l): Likewise.
20451 (VD_LANE): Likewise.
20453 (V_DOUBLE): Likewise.
20454 (VDQX): Add V4BF and V8BF.
20455 (V_two_elem, V_three_elem, V_four_elem): Likewise.
20457 (V_HALF): Likewise.
20458 (V_double_vector_mode): Likewise.
20459 (V_cmp_result): Likewise.
20460 (V_uf_sclr): Likewise.
20461 (V_sz_elem): Likewise.
20462 (Is_d_reg): Likewise.
20463 (V_mode_nunits): Likewise.
20464 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
20466 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
20468 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
20469 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
20470 (<expander><mode>3<exec>): Likewise.
20471 (<expander><mode>3): New.
20472 (v<expander><mode>3): New.
20473 (<expander><mode>3): New.
20474 (<expander><mode>3<exec>): Rename to ...
20475 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
20476 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
20478 2020-02-27 Alexandre Oliva <oliva@adacore.com>
20480 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
20483 2020-02-27 Richard Biener <rguenther@suse.de>
20485 PR tree-optimization/93508
20486 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
20487 non-_CHK variants. Valueize their length arguments.
20489 2020-02-27 Richard Biener <rguenther@suse.de>
20491 PR tree-optimization/93953
20492 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
20493 to the hash-map entry.
20495 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
20497 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
20499 2020-02-27 Mark Williams <mwilliams@fb.com>
20501 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
20502 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
20503 -ffile-prefix-map and -fmacro-prefix-map.
20504 * lto-streamer-out.c: Include file-prefix-map.h.
20505 (lto_output_location): Remap the file part of locations.
20507 2020-02-27 Jakub Jelinek <jakub@redhat.com>
20510 * gimplify.c (gimplify_init_constructor): Don't promote readonly
20511 DECL_REGISTER variables to TREE_STATIC.
20513 PR tree-optimization/93582
20514 PR tree-optimization/93945
20515 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
20516 non-zero INTEGER_CST second argument and ref->offset or ref->size
20517 not a multiple of BITS_PER_UNIT.
20519 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
20521 * doc/install.texi (Binaries): Update description of BullFreeware.
20523 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
20527 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
20528 C++ Language Options, Warning Options, and Static Analyzer
20529 Options lists. Document negative form of options enabled by
20530 default. Move some things around to more accurately sort
20531 warnings by category.
20532 (C++ Dialect Options, Warning Options, Static Analyzer
20533 Options): Document negative form of options when enabled by
20534 default. Move some things around to more accurately sort
20535 warnings by category. Add some missing index entries.
20536 Light copy-editing.
20538 2020-02-26 Carl Love <cel@us.ibm.com>
20541 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
20542 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
20543 for the vector unsigned short arguments. It is also listed as the
20544 name of the built-in for arguments vector unsigned short,
20545 vector unsigned int and vector unsigned long long built-ins. The
20546 name of the builtins for these arguments should be:
20547 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
20548 __builtin_crypto_vpmsumd respectively.
20550 2020-02-26 Richard Biener <rguenther@suse.de>
20552 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
20553 and load permutation.
20555 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
20557 PR middle-end/93843
20558 * optabs-tree.c (supportable_convert_operation): Reject types with
20561 2020-02-26 David Malcolm <dmalcolm@redhat.com>
20563 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
20565 2020-02-26 Jakub Jelinek <jakub@redhat.com>
20567 PR tree-optimization/93820
20568 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
20569 argument to ALL_INTEGER_CST_P boolean.
20570 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
20571 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
20572 adjacent INTEGER_CST store into merged_store->only_constants like
20575 2020-02-25 Jakub Jelinek <jakub@redhat.com>
20578 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
20580 * cfghooks.c (verify_flow_info): Likewise.
20581 * predict.c (combine_predictions_for_bb): Likewise.
20582 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
20583 sucessor -> successor.
20584 (find_traces_1_round): Fix comment typo, destinarion -> destination.
20585 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
20587 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
20588 message typo, sucessors -> successors.
20590 2020-02-25 Martin Sebor <msebor@redhat.com>
20592 * doc/extend.texi (attribute access): Correct an example.
20594 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
20596 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
20598 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
20599 (VAR15, VAR16): New.
20600 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
20601 (VD): Enable for V4BF.
20603 (VQ): Enable for V8BF.
20605 (VQ_NO2E): Likewise.
20606 (VDBL, Vdbl): Add V4BF.
20607 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
20608 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
20609 (bfloat16x8x2_t): Likewise.
20610 (bfloat16x4x3_t): Likewise.
20611 (bfloat16x8x3_t): Likewise.
20612 (bfloat16x4x4_t): Likewise.
20613 (bfloat16x8x4_t): Likewise.
20614 (vcombine_bf16): New.
20615 (vld1_bf16, vld1_bf16_x2): New.
20616 (vld1_bf16_x3, vld1_bf16_x4): New.
20617 (vld1q_bf16, vld1q_bf16_x2): New.
20618 (vld1q_bf16_x3, vld1q_bf16_x4): New.
20619 (vld1_lane_bf16): New.
20620 (vld1q_lane_bf16): New.
20621 (vld1_dup_bf16): New.
20622 (vld1q_dup_bf16): New.
20625 (vld2_dup_bf16): New.
20626 (vld2q_dup_bf16): New.
20629 (vld3_dup_bf16): New.
20630 (vld3q_dup_bf16): New.
20633 (vld4_dup_bf16): New.
20634 (vld4q_dup_bf16): New.
20635 (vst1_bf16, vst1_bf16_x2): New.
20636 (vst1_bf16_x3, vst1_bf16_x4): New.
20637 (vst1q_bf16, vst1q_bf16_x2): New.
20638 (vst1q_bf16_x3, vst1q_bf16_x4): New.
20639 (vst1_lane_bf16): New.
20640 (vst1q_lane_bf16): New.
20648 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
20650 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
20651 (VALL_F16): Likewise.
20652 (VALLDI_F16): Likewise.
20654 (Vetype): Likewise.
20655 (vswap_width_name): Likewise.
20656 (VSWAP_WIDTH): Likewise.
20660 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
20661 (vget_lane_bf16, vgetq_lane_bf16): New.
20662 (vcreate_bf16): New.
20663 (vdup_n_bf16, vdupq_n_bf16): New.
20664 (vdup_lane_bf16, vdup_laneq_bf16): New.
20665 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
20666 (vduph_lane_bf16, vduph_laneq_bf16): New.
20667 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
20668 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
20669 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
20670 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
20671 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
20672 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
20673 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
20674 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
20675 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
20676 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
20677 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
20678 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
20679 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
20680 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
20681 (vreinterpretq_bf16_p128): New.
20682 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
20683 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
20684 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
20685 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
20686 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
20687 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
20688 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
20689 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
20690 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
20691 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
20692 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
20693 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
20694 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
20695 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
20696 (vreinterpretq_p128_bf16): New.
20698 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
20700 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
20701 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
20702 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
20703 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
20704 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
20705 * config/arm/iterators.md (VSF2BF): New attribute.
20706 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
20707 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
20708 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
20710 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
20712 * config/arm/arm.md (required_for_purecode): New attribute.
20713 (enabled): Handle required_for_purecode.
20714 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
20715 work with -mpure-code.
20717 2020-02-25 Jakub Jelinek <jakub@redhat.com>
20719 PR rtl-optimization/93908
20720 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
20723 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
20725 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
20727 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
20729 * doc/install.texi (--enable-checking): Adjust wording.
20731 2020-02-25 Richard Biener <rguenther@suse.de>
20733 PR tree-optimization/93868
20734 * tree-vect-slp.c (slp_copy_subtree): New function.
20735 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
20736 re-arranging stmts in it.
20738 2020-02-25 Jakub Jelinek <jakub@redhat.com>
20740 PR middle-end/93874
20741 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
20742 dummy function and remove it at the end.
20744 PR translation/93864
20745 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
20746 paramter -> parameter.
20747 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
20748 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
20750 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
20752 * doc/install.texi (--enable-checking): Properly document current
20754 (--enable-stage1-checking): Minor clarification about bootstrap.
20756 2020-02-24 David Malcolm <dmalcolm@redhat.com>
20759 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
20760 -fanalyzer-checker=taint is also required.
20761 (-fanalyzer-checker=): Note that providing this option enables the
20762 given checker, and doing so may be required for checkers that are
20763 disabled by default.
20765 2020-02-24 David Malcolm <dmalcolm@redhat.com>
20767 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
20768 significant control flow events; add a "3" which shows all
20769 control flow events; the old "3" becomes "4".
20771 2020-02-24 Jakub Jelinek <jakub@redhat.com>
20773 PR tree-optimization/93582
20774 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
20775 pd.offset and pd.size to be counted in bits rather than bytes, add
20776 support for maxsizei that is not a multiple of BITS_PER_UNIT and
20777 handle bitfield stores and loads.
20778 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
20779 uncomparable quantities - bytes vs. bits. Allow push_partial_def
20780 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
20781 pd.offset/pd.size to be counted in bits rather than bytes.
20782 Formatting fix. Rename shadowed len variable to buflen.
20784 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
20785 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
20788 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
20789 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
20790 * opts-common.c (parse_options_from_collect_gcc_options): New function.
20791 (prepend_xassembler_to_collect_as_options): Likewise.
20792 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
20793 (prepend_xassembler_to_collect_as_options): Likewise.
20794 * lto-opts.c (lto_write_options): Stream assembler options
20795 in COLLECT_AS_OPTIONS.
20796 * lto-wrapper.c (xassembler_options_error): New static variable.
20797 (get_options_from_collect_gcc_options): Move parsing options code to
20798 parse_options_from_collect_gcc_options and call it.
20799 (merge_and_complain): Validate -Xassembler options.
20800 (append_compiler_options): Handle OPT_Xassembler.
20801 (run_gcc): Append command line -Xassembler options to
20802 collect_gcc_options.
20803 * doc/invoke.texi: Add documentation about using Xassembler
20806 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
20808 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
20810 (riscv_rtx_costs): Update cost model for LTGT.
20812 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
20814 PR rtl-optimization/93564
20815 * ira-color.c (struct update_cost_queue_elem): New member start.
20816 (queue_update_cost, get_next_update_cost): Add new arg start.
20817 (allocnos_conflict_p): New function.
20818 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
20819 Add checking conflicts with allocnos_conflict_p.
20820 (update_costs_from_prefs, restore_costs_from_copies): Adjust
20821 update_costs_from_allocno calls.
20822 (update_conflict_hard_regno_costs): Add checking conflicts with
20823 allocnos_conflict_p. Adjust calls of queue_update_cost and
20824 get_next_update_cost.
20825 (assign_hard_reg): Adjust calls of queue_update_cost. Add
20827 (bucket_allocno_compare_func): Restore previous version.
20829 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
20831 * config/pa/pa.c (pa_function_value): Fix check for word and
20832 double-word size when handling aggregate return values.
20833 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
20834 that homogeneous SFmode and DFmode aggregates are passed and returned
20835 in general registers.
20837 2020-02-21 Jakub Jelinek <jakub@redhat.com>
20839 PR translation/93759
20840 * opts.c (print_filtered_help): Translate help before appending
20841 messages to it rather than after that.
20843 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
20845 PR rtl-optimization/PR92989
20846 * lra-lives.c (process_bb_lives): Restore the original order
20847 of the bb liveness update. Call make_hard_regno_dead for each
20848 register clobbered at the start of an EH receiver.
20850 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
20853 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
20854 self-recursively generated.
20856 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
20859 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
20862 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
20864 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
20865 Document new target supports option.
20867 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
20869 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
20870 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
20871 * config/arm/iterators.md (MATMUL): New iterator.
20872 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
20873 (mmla_sfx): New attribute.
20874 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
20875 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
20876 (UNSPEC_MATMUL_US): New.
20878 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
20880 * config/arm/arm.md: Prevent scalar shifts from being used when big
20883 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
20884 Richard Biener <rguenther@suse.de>
20886 PR tree-optimization/93586
20887 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
20888 after mismatched array refs; do not sure type size information to
20889 recover from unmatched referneces with !flag_strict_aliasing_p.
20891 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
20893 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
20894 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
20895 (scatter_store<mode>): Rename to ...
20896 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
20897 (scatter<mode>_exec): Delete. Move contents ...
20898 (mask_scatter_store<mode>): ... here, and rename that to ...
20899 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
20900 Remove mode conversion.
20901 (mask_gather_load<mode>): Rename to ...
20902 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
20903 Remove mode conversion.
20904 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
20906 2020-02-21 Martin Jambor <mjambor@suse.cz>
20908 PR tree-optimization/93845
20909 * tree-sra.c (verify_sra_access_forest): Only test access size of
20912 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
20914 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
20915 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
20916 (addv64di3_exec): Likewise.
20917 (subv64di3): Likewise.
20918 (subv64di3_exec): Likewise.
20919 (addv64di3_zext): Likewise.
20920 (addv64di3_zext_exec): Likewise.
20921 (addv64di3_zext_dup): Likewise.
20922 (addv64di3_zext_dup_exec): Likewise.
20923 (addv64di3_zext_dup2): Likewise.
20924 (addv64di3_zext_dup2_exec): Likewise.
20925 (addv64di3_sext_dup2): Likewise.
20926 (addv64di3_sext_dup2_exec): Likewise.
20927 (<expander>v64di3): Likewise.
20928 (<expander>v64di3_exec): Likewise.
20929 (*<reduc_op>_dpp_shr_v64di): Likewise.
20930 (*plus_carry_dpp_shr_v64di): Likewise.
20931 * config/gcn/gcn.md (adddi3): Likewise.
20932 (addptrdi3): Likewise.
20933 (<expander>di3): Likewise.
20935 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
20937 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
20939 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20941 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
20942 support. Use aarch64_emit_mult instead of emitting multiplication
20943 instructions directly.
20944 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
20945 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
20947 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20949 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
20950 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
20951 instead of emitting multiplication instructions directly.
20952 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
20953 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
20954 (@aarch64_frecps<mode>): New expanders.
20956 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20958 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
20959 on and produce uint64_ts rather than ints.
20960 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
20961 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
20963 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20965 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
20966 an unused xmsk register when handling approximate rsqrt.
20968 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20970 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
20971 flag_finite_math_only condition.
20973 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
20976 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
20977 to destination operand for shufps alternative.
20978 (*vec_extractv2si_1): Ditto.
20980 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
20983 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
20986 2020-02-20 Martin Liska <mliska@suse.cz>
20988 PR translation/93831
20989 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
20991 2020-02-20 Martin Liska <mliska@suse.cz>
20993 PR translation/93830
20994 * common/config/avr/avr-common.c: Remote trailing "|".
20996 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
20998 * collect2.c (maybe_run_lto_and_relink): Fix typo in
21001 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
21003 PR tree-optimization/93767
21004 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
21005 access-size bias from the offset calculations for negative strides.
21007 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
21009 * collect2.c (c_file, o_file): Make const again.
21010 (ldout,lderrout, dump_ld_file): Remove.
21011 (tool_cleanup): Avoid calling not signal-safe functions.
21012 (maybe_run_lto_and_relink): Avoid possible signal handler
21013 access to unintialzed memory (lto_o_files).
21014 (main): Avoid leaking temp files in $TMPDIR.
21015 Initialize c_file/o_file with concat, which avoids exposing
21016 uninitialized memory to signal handler, which calls unlink(!).
21017 Avoid calling maybe_unlink when the main function returns,
21018 since the atexit handler is already doing this.
21019 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
21021 2020-02-19 Martin Jambor <mjambor@suse.cz>
21023 PR tree-optimization/93776
21024 * tree-sra.c (create_access): Do not create zero size accesses.
21025 (get_access_for_expr): Do not search for zero sized accesses.
21027 2020-02-19 Martin Jambor <mjambor@suse.cz>
21029 PR tree-optimization/93667
21030 * tree-sra.c (scalarizable_type_p): Return false if record fields
21031 do not follow wach other.
21033 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
21035 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
21036 rather than fmv.x.s/fmv.s.x.
21038 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
21040 * config/aarch64/aarch64-simd-builtins.def
21041 (intrinsic_vec_smult_lo_): New.
21042 (intrinsic_vec_umult_lo_): Likewise.
21043 (vec_widen_smult_hi_): Likewise.
21044 (vec_widen_umult_hi_): Likewise.
21045 * config/aarch64/aarch64-simd.md
21046 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
21047 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
21048 (vmull_high_s16): Likewise.
21049 (vmull_high_s32): Likewise.
21050 (vmull_high_u8): Likewise.
21051 (vmull_high_u16): Likewise.
21052 (vmull_high_u32): Likewise.
21053 (vmull_s8): Likewise.
21054 (vmull_s16): Likewise.
21055 (vmull_s32): Likewise.
21056 (vmull_u8): Likewise.
21057 (vmull_u16): Likewise.
21058 (vmull_u32): Likewise.
21060 2020-02-18 Martin Liska <mliska@suse.cz>
21062 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
21063 bootstrap by missing removal of invalid sanity check.
21065 2020-02-18 Martin Liska <mliska@suse.cz>
21068 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
21069 Always compare LHS of gimple_assign.
21071 2020-02-18 Martin Liska <mliska@suse.cz>
21074 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
21075 and return type of functions.
21076 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
21077 Drop MALLOC attribute for void functions.
21078 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
21079 malloc_state for a new VOID clone.
21081 2020-02-18 Martin Liska <mliska@suse.cz>
21084 * common.opt: Add -fprofile-reproducibility.
21085 * doc/invoke.texi: Document it.
21086 * value-prof.c (dump_histogram_value):
21087 Document and support behavior for counters[0]
21088 being a negative value.
21089 (get_nth_most_common_value): Handle negative
21090 counters[0] in respect to flag_profile_reproducible.
21092 2020-02-18 Jakub Jelinek <jakub@redhat.com>
21095 * cgraph.c (verify_speculative_call): Use speculative_id instead of
21096 speculative_uid in messages. Remove trailing whitespace from error
21097 message. Use num_speculative_call_targets instead of
21098 num_speculative_targets in a message.
21099 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
21100 edge messages and stmt instead of cal_stmt in reference message.
21102 PR tree-optimization/93780
21103 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
21104 before calling build_vector_type.
21105 (execute_update_addresses_taken): Likewise.
21108 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
21109 typo, functoin -> function.
21110 * tree.c (free_lang_data_in_decl): Fix comment typo,
21111 functoin -> function.
21112 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
21114 2020-02-17 David Malcolm <dmalcolm@redhat.com>
21116 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
21118 (print_option_information): Don't call get_option_url if URLs
21121 2020-02-17 Alexandre Oliva <oliva@adacore.com>
21123 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
21124 handling of register_common-less targets.
21126 2020-02-17 Martin Liska <mliska@suse.cz>
21129 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
21131 2020-02-17 Martin Liska <mliska@suse.cz>
21133 PR translation/93755
21134 * config/rs6000/rs6000.c (rs6000_option_override_internal):
21137 2020-02-17 Martin Liska <mliska@suse.cz>
21140 * config/rx/elf.opt: Fix typo.
21142 2020-02-17 Richard Biener <rguenther@suse.de>
21145 * opts-global.c (print_ignored_options): Use inform and
21148 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
21151 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
21153 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
21156 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
21157 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
21159 2020-02-15 Jason Merrill <jason@redhat.com>
21161 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
21163 2020-02-15 Jakub Jelinek <jakub@redhat.com>
21165 PR tree-optimization/93744
21166 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
21167 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
21168 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
21169 sure @2 in the first and @1 in the other patterns has no side-effects.
21171 2020-02-15 David Malcolm <dmalcolm@redhat.com>
21172 Bernd Edlinger <bernd.edlinger@hotmail.de>
21176 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
21177 * configure.ac (--with-diagnostics-urls): New configuration
21178 option, based on --with-diagnostics-color.
21179 (DIAGNOSTICS_URLS_DEFAULT): New define.
21180 * config.h: Regenerate.
21181 * configure: Regenerate.
21182 * diagnostic.c (diagnostic_urls_init): Handle -1 for
21183 DIAGNOSTICS_URLS_DEFAULT from configure-time
21184 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
21185 and TERM_URLS environment variable.
21186 * diagnostic-url.h (diagnostic_url_format): New enum type.
21187 (diagnostic_urls_enabled_p): rename to...
21188 (determine_url_format): ... this, and change return type.
21189 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
21190 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
21191 the linux console, and mingw.
21192 (diagnostic_urls_enabled_p): rename to...
21193 (determine_url_format): ... this, and adjust.
21194 * pretty-print.h (pretty_printer::show_urls): rename to...
21195 (pretty_printer::url_format): ... this, and change to enum.
21196 * pretty-print.c (pretty_printer::pretty_printer,
21197 pp_begin_url, pp_end_url, test_urls): Adjust.
21198 * doc/install.texi (--with-diagnostics-urls): Document the new
21199 configuration option.
21200 (--with-diagnostics-color): Document the existing interaction
21201 with GCC_COLORS better.
21202 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
21203 vindex reference. Update description of defaults based on the above.
21204 (-fdiagnostics-color): Update description of how -fdiagnostics-color
21205 interacts with GCC_COLORS.
21207 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
21210 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
21211 conjunction with TARGET_GNU_TLS in early return.
21213 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
21215 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
21216 the mode is not wider than UNITS_PER_WORD.
21218 2020-02-14 Martin Jambor <mjambor@suse.cz>
21220 PR tree-optimization/93516
21221 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
21222 access of the same type as the parent.
21223 (propagate_subaccesses_from_lhs): Likewise.
21225 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
21228 * config/i386/avx512vbmi2intrin.h
21229 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
21230 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
21231 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
21232 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
21233 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
21234 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
21235 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
21236 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
21237 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
21238 of lacking a closing parenthesis.
21239 * config/i386/avx512vbmi2vlintrin.h
21240 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
21241 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
21242 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
21243 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
21244 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
21245 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
21246 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
21247 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
21248 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
21249 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
21250 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
21251 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
21252 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
21253 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
21254 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
21255 _mm_shldi_epi32, _mm_mask_shldi_epi32,
21256 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
21257 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
21259 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
21262 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
21263 the target function entry.
21265 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21267 * common/config/arc/arc-common.c (arc_option_optimization_table):
21268 Disable if-conversion step when optimized for size.
21270 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21272 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
21273 R12-R15 are always in ARCOMPACT16_REGS register class.
21274 * config/arc/arc.opt (mq-class): Deprecate.
21275 * config/arc/constraint.md ("q"): Remove dependency on mq-class
21277 * doc/invoke.texi (mq-class): Update text.
21278 * common/config/arc/arc-common.c (arc_option_optimization_table):
21281 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21283 * config/arc/arc.c (arc_insn_cost): New function.
21284 (TARGET_INSN_COST): Define.
21285 * config/arc/arc.md (cost): New attribute.
21286 (add_n): Use arc_nonmemory_operand.
21287 (ashlsi3_insn): Likewise, also update constraints.
21288 (ashrsi3_insn): Likewise.
21289 (rotrsi3): Likewise.
21290 (add_shift): Likewise.
21291 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
21293 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21295 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
21297 (umulsidi_600): Likewise.
21299 2020-02-13 Jakub Jelinek <jakub@redhat.com>
21302 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
21303 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
21304 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
21305 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
21306 pass __A to the builtin followed by __W instead of __A followed by
21308 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
21309 _mm512_mask_popcnt_epi64): Likewise.
21310 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
21311 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
21312 _mm256_mask_popcnt_epi64): Likewise.
21314 PR tree-optimization/93582
21315 * fold-const.h (shift_bytes_in_array_left,
21316 shift_bytes_in_array_right): Declare.
21317 * fold-const.c (shift_bytes_in_array_left,
21318 shift_bytes_in_array_right): New function, moved from
21319 gimple-ssa-store-merging.c, no longer static.
21320 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
21321 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
21322 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
21323 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
21324 shift_bytes_in_array.
21325 (verify_shift_bytes_in_array): Rename to ...
21326 (verify_shift_bytes_in_array_left): ... this. Use
21327 shift_bytes_in_array_left instead of shift_bytes_in_array.
21328 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
21329 instead of verify_shift_bytes_in_array.
21330 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
21331 / native_interpret_expr where the store covers all needed bits,
21332 punt on PDP-endian, otherwise allow all involved offsets and sizes
21333 not to be byte-aligned.
21336 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
21337 use const_0_to_255_operand predicate instead of immediate_operand.
21338 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
21339 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
21340 vgf2p8affineinvqb_<mode><mask_name>,
21341 vgf2p8affineqb_<mode><mask_name>): Drop mode from
21342 const_0_to_255_operand predicated operands.
21344 2020-02-12 Jeff Law <law@redhat.com>
21346 * config/h8300/h8300.md (comparison shortening peepholes): Use
21347 a mode iterator to merge the HImode and SImode peepholes.
21349 2020-02-12 Jakub Jelinek <jakub@redhat.com>
21351 PR middle-end/93663
21352 * real.c (is_even): Make static. Function comment fix.
21353 (is_halfway_below): Make static, don't assert R is not inf/nan,
21354 instead return false for those. Small formatting fixes.
21356 2020-02-12 Martin Sebor <msebor@redhat.com>
21358 PR middle-end/93646
21359 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
21360 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
21361 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
21362 (strlen_check_and_optimize_call): Adjust callee name.
21364 2020-02-12 Jeff Law <law@redhat.com>
21366 * config/h8300/h8300.md (comparison shortening peepholes): Drop
21367 (and (xor)) variant. Combine other two into single peephole.
21369 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
21371 PR rtl-optimization/93565
21372 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
21374 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
21376 * config/aarch64/aarch64-simd.md
21377 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
21378 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
21379 generating separate ADDV and zero_extend patterns.
21380 * config/aarch64/iterators.md (VDQV_E): New iterator.
21382 2020-02-12 Jeff Law <law@redhat.com>
21384 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
21385 expanders, splits, etc.
21386 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
21387 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
21388 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
21389 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
21390 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
21391 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
21392 function prototype.
21393 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
21395 2020-02-12 Jakub Jelinek <jakub@redhat.com>
21398 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
21399 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
21400 TARGET_AVX512DQ from condition.
21401 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
21402 instead of <mask_mode512bit_condition> in condition. If
21403 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
21405 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
21408 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
21411 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
21413 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
21415 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
21416 where strlen is more legible.
21417 (rs6000_builtin_vectorized_libmass): Ditto.
21418 (rs6000_print_options_internal): Ditto.
21420 2020-02-11 Martin Sebor <msebor@redhat.com>
21422 PR tree-optimization/93683
21423 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
21425 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
21427 * config/rs6000/predicates.md (cint34_operand): Rename the
21428 -mprefixed-addr option to be -mprefixed.
21429 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
21430 the -mprefixed-addr option to be -mprefixed.
21431 (OTHER_FUTURE_MASKS): Likewise.
21432 (POWERPC_MASKS): Likewise.
21433 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
21434 the -mprefixed-addr option to be -mprefixed. Change error
21435 messages to refer to -mprefixed.
21436 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
21438 (rs6000_legitimate_offset_address_p): Likewise.
21439 (rs6000_mode_dependent_address): Likewise.
21440 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
21441 "-mprefixed" for target attributes and pragmas.
21442 (address_to_insn_form): Rename the -mprefixed-addr option to be
21444 (rs6000_adjust_insn_length): Likewise.
21445 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
21446 -mprefixed-addr option to be -mprefixed.
21447 (ASM_OUTPUT_OPCODE): Likewise.
21448 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
21449 -mprefixed-addr option to be -mprefixed.
21450 * config/rs6000/rs6000.opt (-mprefixed): Rename the
21451 -mprefixed-addr option to be prefixed. Change the option from
21452 being undocumented to being documented.
21453 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
21454 -mprefixed option. Update the -mpcrel documentation to mention
21457 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
21459 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
21460 including FIRST_PSEUDO_REGISTER - 1.
21461 * ira-color.c (print_hard_reg_set): Ditto.
21463 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21465 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
21466 (USTERNOP_QUALIFIERS): New define.
21467 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
21468 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
21469 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
21470 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
21471 * config/arm/arm_neon.h (vusdot_s32): New.
21472 (vusdot_lane_s32): New.
21473 (vusdotq_lane_s32): New.
21474 (vsudot_lane_s32): New.
21475 (vsudotq_lane_s32): New.
21476 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
21477 * config/arm/iterators.md (DOTPROD_I8MM): New.
21478 (sup, opsuffix): Add <us/su>.
21479 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
21480 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
21482 2020-02-11 Richard Biener <rguenther@suse.de>
21484 PR tree-optimization/93661
21485 PR tree-optimization/93662
21486 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
21487 tree_to_poly_int64.
21488 * tree-sra.c (get_access_for_expr): Likewise.
21490 2020-02-10 Jakub Jelinek <jakub@redhat.com>
21493 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
21494 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
21495 Change condition from TARGET_AVX2 to TARGET_AVX.
21497 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
21500 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
21501 argument of strncmp.
21503 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
21505 Try to generate zero-based comparisons.
21506 * config/cris/cris.c (cris_reduce_compare): New function.
21507 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
21508 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
21509 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
21511 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
21514 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
21515 in Thumb state and also as a destination in Arm state. Add T16
21518 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
21520 * md.texi (Define Subst): Match closing paren in example.
21522 2020-02-10 Jakub Jelinek <jakub@redhat.com>
21526 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
21527 arguments of strncmp.
21529 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
21532 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
21533 but different source value.
21534 (adjust_callers_for_value_intersection): New function.
21535 (gather_edges_for_value): Adjust order of callers to let a
21536 non-self-recursive caller be the first element.
21537 (self_recursive_pass_through_p): Add a new parameter "simple", and
21538 check generalized self-recursive pass-through jump function.
21539 (self_recursive_agg_pass_through_p): Likewise.
21540 (find_more_scalar_values_for_callers_subset): Compute value from
21541 pass-through jump function for self-recursive.
21542 (intersect_with_plats): Cleanup previous implementation code for value
21543 itersection with self-recursive call edge.
21544 (intersect_with_agg_replacements): Likewise.
21545 (intersect_aggregates_with_edge): Deduce value from pass-through jump
21546 function for self-recursive call edge. Cleanup previous implementation
21547 code for value intersection with self-recursive call edge.
21548 (decide_whether_version_node): Remove dead callers and adjust order
21549 to let a non-self-recursive caller be the first element.
21551 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
21553 * recog.c: Move pass_split_before_sched2 code in front of
21554 pass_split_before_regstack.
21555 (pass_data_split_before_sched2): Rename pass to split3 from split4.
21556 (pass_data_split_before_regstack): Rename pass to split4 from split3.
21557 (rest_of_handle_split_before_sched2): Remove.
21558 (pass_split_before_sched2::execute): Unconditionally call
21560 (enable_split_before_sched2): New function.
21561 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
21562 (pass_split_before_regstack::gate): Ditto.
21563 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
21564 Update name check for renamed split4 pass.
21565 * config/sh/sh.c (register_sh_passes): Update pass insertion
21566 point for renamed split4 pass.
21568 2020-02-09 Jakub Jelinek <jakub@redhat.com>
21570 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
21571 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
21572 copying them around between host and target.
21574 2020-02-08 Andrew Pinski <apinski@marvell.com>
21577 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
21578 STRICT_ALIGNMENT also.
21580 2020-02-08 Jim Wilson <jimw@sifive.com>
21583 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
21585 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
21586 Jakub Jelinek <jakub@redhat.com>
21589 * config/i386/i386.h (CALL_USED_REGISTERS): Make
21590 xmm16-xmm31 call-used even in 64-bit ms-abi.
21592 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
21594 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
21595 (simd_ummla, simd_usmmla): Likewise.
21596 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
21597 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
21598 (vusmmlaq_s32): New.
21600 2020-02-07 Richard Biener <rguenther@suse.de>
21602 PR middle-end/93519
21603 * tree-inline.c (fold_marked_statements): Do a PRE walk,
21604 skipping unreachable regions.
21605 (optimize_inline_calls): Skip folding stmts when we didn't
21608 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
21611 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
21612 Don't return aggregates with only SFmode and DFmode in SSE
21614 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
21616 2020-02-07 Jakub Jelinek <jakub@redhat.com>
21619 * config/rs6000/rs6000-logue.c
21620 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
21621 if it fails, move rs into end_addr and retry. Add
21622 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
21623 the insn pattern doesn't describe well what exactly happens to
21627 * config/i386/predicates.md (avx_identity_operand): Remove.
21628 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
21629 (avx_<castmode><avxsizesuffix>_<castmode>,
21630 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
21631 a VEC_CONCAT of the operand and UNSPEC_CAST.
21632 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
21633 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
21637 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
21638 recog_data.insn if distance_non_agu_define changed it.
21640 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
21643 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
21644 we only had X-FORM (reg+reg) addressing for vectors. Also before
21645 ISA 3.0, we only had X-FORM addressing for scalars in the
21646 traditional Altivec registers.
21648 2020-02-06 <zhongyunde@huawei.com>
21649 Vladimir Makarov <vmakarov@redhat.com>
21651 PR rtl-optimization/93561
21652 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
21653 hard register range.
21655 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
21657 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
21660 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
21662 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
21663 where the low and the high 32 bits are equal to each other specially,
21664 with an rldimi instruction.
21666 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
21668 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
21670 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
21672 * config/arm/arm-tables.opt: Regenerate.
21674 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
21677 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
21678 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
21679 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
21681 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
21683 PR rtl-optimization/87763
21684 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
21686 2020-02-06 Delia Burduv <delia.burduv@arm.com>
21688 * config/aarch64/aarch64-simd-builtins.def
21689 (bfmlaq): New built-in function.
21690 (bfmlalb): New built-in function.
21691 (bfmlalt): New built-in function.
21692 (bfmlalb_lane): New built-in function.
21693 (bfmlalt_lane): New built-in function.
21694 * config/aarch64/aarch64-simd.md
21695 (aarch64_bfmmlaqv4sf): New pattern.
21696 (aarch64_bfmlal<bt>v4sf): New pattern.
21697 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
21698 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
21699 (vbfmlalbq_f32): New intrinsic.
21700 (vbfmlaltq_f32): New intrinsic.
21701 (vbfmlalbq_lane_f32): New intrinsic.
21702 (vbfmlaltq_lane_f32): New intrinsic.
21703 (vbfmlalbq_laneq_f32): New intrinsic.
21704 (vbfmlaltq_laneq_f32): New intrinsic.
21705 * config/aarch64/iterators.md (BF_MLA): New int iterator.
21706 (bt): New int attribute.
21708 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
21710 * config/i386/i386.md (*pushtf): Emit "#" instead of
21711 calling gcc_unreachable in insn output.
21714 (*pushsf_rex64): Ditto for alternatives other than 1.
21715 (*pushsf): Ditto for alternatives other than 1.
21717 2020-02-06 Martin Liska <mliska@suse.cz>
21719 PR gcov-profile/91971
21720 PR gcov-profile/93466
21721 * coverage.c (coverage_init): Revert mangling of
21722 path into filename. It can lead to huge filename length.
21723 Creation of subfolders seem more natural.
21725 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21728 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
21729 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
21730 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
21732 2020-02-06 Jakub Jelinek <jakub@redhat.com>
21735 * config/i386/predicates.md (avx_identity_operand): New predicate.
21736 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
21737 define_insn_and_split.
21740 * omp-low.c (use_pointer_for_field): For nested constructs, also
21741 look for map clauses on target construct.
21742 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
21743 taskreg_nesting_level.
21746 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
21747 shared clause, call omp_notice_variable on outer context if any.
21749 2020-02-05 Jason Merrill <jason@redhat.com>
21752 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
21753 non-zero address even if weak and not yet defined.
21755 2020-02-05 Martin Sebor <msebor@redhat.com>
21757 PR tree-optimization/92765
21758 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
21759 * tree-ssa-strlen.c (compute_string_length): Remove.
21760 (determine_min_objsize): Remove.
21761 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
21762 Avoid using type size as the upper bound on string length.
21763 (handle_builtin_string_cmp): Add an argument. Adjust.
21764 (strlen_check_and_optimize_call): Pass additional argument to
21765 handle_builtin_string_cmp.
21767 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
21769 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
21770 (*pushdi2_rex64 peephole2): Unconditionally split after
21771 epilogue_completed.
21772 (*ashl<mode>3_doubleword): Ditto.
21773 (*<shift_insn><mode>3_doubleword): Ditto.
21775 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
21778 * config/rs6000/rs6000.c (get_vector_offset): Fix
21780 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
21782 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
21784 2020-02-05 David Malcolm <dmalcolm@redhat.com>
21786 * doc/analyzer.texi
21787 (Special Functions for Debugging the Analyzer): Update description
21788 of __analyzer_dump_exploded_nodes.
21790 2020-02-05 Jakub Jelinek <jakub@redhat.com>
21793 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
21794 include sets and not clobbers in the vzeroupper pattern.
21795 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
21796 the parallel has 17 (64-bit) or 9 (32-bit) elts.
21797 (*avx_vzeroupper_1): New define_insn_and_split.
21800 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
21801 don't run when !optimize.
21802 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
21805 2020-02-05 Richard Biener <rguenther@suse.de>
21807 PR middle-end/90648
21808 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
21809 checks before matching calls.
21811 2020-02-05 Jakub Jelinek <jakub@redhat.com>
21813 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
21814 function comment typo.
21816 PR middle-end/93555
21817 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
21818 simd_clone_create failed when i == 0, adjust clone->nargs by
21821 2020-02-05 Martin Liska <mliska@suse.cz>
21824 * doc/invoke.texi: Document that one should
21825 not combine ASLR and -fpch.
21827 2020-02-04 Richard Biener <rguenther@suse.de>
21829 PR tree-optimization/93538
21830 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
21832 2020-02-04 Richard Biener <rguenther@suse.de>
21834 PR tree-optimization/91123
21835 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
21836 (vn_walk_cb_data::last_vuse): New member.
21837 (vn_walk_cb_data::saved_operands): Likewsie.
21838 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
21839 (vn_walk_cb_data::push_partial_def): Use finish.
21840 (vn_reference_lookup_2): Update last_vuse and use finish if
21841 we've saved operands.
21842 (vn_reference_lookup_3): Use finish and update calls to
21843 push_partial_defs everywhere. When translating through
21844 memcpy or aggregate copies save off operands and alias-set.
21845 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
21846 operation for redundant store removal.
21848 2020-02-04 Richard Biener <rguenther@suse.de>
21850 PR tree-optimization/92819
21851 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
21852 generating more stmts than before.
21854 2020-02-04 Martin Liska <mliska@suse.cz>
21856 * config/arm/arm.c (arm_gen_far_branch): Move the function
21857 outside of selftests.
21859 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
21861 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
21862 function to adjust PC-relative vector addresses.
21863 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
21864 handle vectors with PC-relative addresses.
21866 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
21868 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
21870 (hard_reg_and_mode_to_addr_mask): Delete.
21871 (rs6000_adjust_vec_address): If the original vector address
21872 was REG+REG or REG+OFFSET and the element is not zero, do the add
21873 of the elements in the original address before adding the offset
21874 for the vector element. Use address_to_insn_form to validate the
21875 address using the register being loaded, rather than guessing
21876 whether the address is a DS-FORM or DQ-FORM address.
21878 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
21880 * config/rs6000/rs6000.c (get_vector_offset): New helper function
21881 to calculate the offset in memory from the start of a vector of a
21882 particular element. Add code to keep the element number in
21883 bounds if the element number is variable.
21884 (rs6000_adjust_vec_address): Move calculation of offset of the
21885 vector element to get_vector_offset.
21886 (rs6000_split_vec_extract_var): Do not do the initial AND of
21887 element here, move the code to get_vector_offset.
21889 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
21891 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
21894 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
21896 * config/rs6000/constraints.md: Improve documentation.
21898 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
21901 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
21902 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
21904 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
21906 * config.gcc: Remove "carrizo" support.
21907 * config/gcn/gcn-opts.h (processor_type): Likewise.
21908 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
21909 * config/gcn/gcn.opt (gpu_type): Likewise.
21910 * config/gcn/t-omp-device: Likewise.
21912 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21915 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
21916 * config/arm/arm.c (arm_gen_far_branch): New function
21917 arm_gen_far_branch.
21918 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
21920 2020-02-03 Julian Brown <julian@codesourcery.com>
21921 Tobias Burnus <tobias@codesourcery.com>
21923 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
21925 2020-02-03 Jakub Jelinek <jakub@redhat.com>
21928 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
21929 valid RTL to sum up the lowest and second lowest bytes of the popcnt
21932 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
21934 PR rtl-optimization/91333
21935 * ira-color.c (struct allocno_color_data): Add member
21937 (init_allocno_threads): Set the member up.
21938 (bucket_allocno_compare_func): Add compare hard reg
21941 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
21943 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
21945 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
21946 * config.in: Regenerated.
21947 * configure: Regenerated.
21948 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
21949 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
21950 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
21952 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
21954 * configure: Regenerate.
21956 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
21958 PR rtl-optimization/91333
21959 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
21960 reg preferences comparison up.
21962 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
21964 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
21965 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
21966 aarch64-sve-builtins-base.h.
21967 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
21968 aarch64-sve-builtins-base.cc.
21969 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
21970 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
21971 (svcvtnt): Declare.
21972 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
21973 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
21974 (svcvtnt): New functions.
21975 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
21976 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
21977 (svcvtnt): New functions.
21978 (svcvt): Add a form that converts f32 to bf16.
21979 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
21980 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
21982 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
21983 Treat B as bfloat16_t.
21984 (ternary_bfloat_lane_base): New class.
21985 (ternary_bfloat_def): Likewise.
21986 (ternary_bfloat): New shape.
21987 (ternary_bfloat_lane_def): New class.
21988 (ternary_bfloat_lane): New shape.
21989 (ternary_bfloat_lanex2_def): New class.
21990 (ternary_bfloat_lanex2): New shape.
21991 (ternary_bfloat_opt_n_def): New class.
21992 (ternary_bfloat_opt_n): New shape.
21993 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
21994 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
21995 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
21996 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
21997 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
21998 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
21999 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
22000 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
22001 the pattern off the narrow mode instead of the wider one.
22002 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
22003 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
22004 (sve_fp_op): Handle them.
22005 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
22006 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
22008 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
22010 * config/aarch64/arm_sve.h: Include arm_bf16.h.
22011 * config/aarch64/aarch64-modes.def (BF): Move definition before
22012 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
22013 (SVE_MODES): Handle BF modes.
22014 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
22016 (aarch64_full_sve_mode): Likewise.
22017 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
22019 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
22020 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
22021 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
22022 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
22024 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
22026 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
22027 (TYPES_all_data): Add bf16.
22028 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
22029 (register_tuple_type): Increase buffer size.
22030 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
22031 (bf16): New type suffix.
22032 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
22033 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
22034 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
22035 Change type from all_data to all_arith.
22036 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
22037 (svminp): Likewise.
22039 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
22040 Matthew Malcomson <matthew.malcomson@arm.com>
22041 Richard Sandiford <richard.sandiford@arm.com>
22043 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
22044 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
22045 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
22046 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
22047 __ARM_FEATURE_MATMUL_FP64.
22048 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
22049 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
22050 be disabled at the same time.
22051 (f32mm): New extension.
22052 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
22053 (AARCH64_FL_F64MM): Bump to the next bit up.
22054 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
22055 (TARGET_SVE_F64MM): New macros.
22056 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
22057 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
22058 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
22059 (UNSPEC_ZIP2Q): New unspeccs.
22060 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
22061 (optab, sur, perm_insn): Handle the new unspecs.
22062 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
22063 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
22064 TARGET_SVE_F64MM instead of separate tests.
22065 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
22066 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
22067 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
22068 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
22069 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
22070 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
22071 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
22072 (TYPES_s_signed): New macro.
22073 (TYPES_s_integer): Use it.
22074 (TYPES_d_float): New macro.
22075 (TYPES_d_data): Use it.
22076 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
22077 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
22078 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
22079 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
22080 (svmmla): New shape.
22081 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
22082 template parameters.
22083 (ternary_resize2_lane_base): Likewise.
22084 (ternary_resize2_base): New class.
22085 (ternary_qq_lane_base): Likewise.
22086 (ternary_intq_uintq_lane_def): Likewise.
22087 (ternary_intq_uintq_lane): New shape.
22088 (ternary_intq_uintq_opt_n_def): New class
22089 (ternary_intq_uintq_opt_n): New shape.
22090 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
22091 (ternary_uintq_intq_def): New class.
22092 (ternary_uintq_intq): New shape.
22093 (ternary_uintq_intq_lane_def): New class.
22094 (ternary_uintq_intq_lane): New shape.
22095 (ternary_uintq_intq_opt_n_def): New class.
22096 (ternary_uintq_intq_opt_n): New shape.
22097 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
22098 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
22099 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
22100 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
22102 (svdotprod_lane_impl): ...this new class.
22103 (svmmla_impl, svusdot_impl): New classes.
22104 (svdot_lane): Update to use svdotprod_lane_impl.
22105 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
22106 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
22108 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
22109 function, with no types defined.
22110 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
22111 AARCH64_FL_I8MM functions.
22112 (svmmla): New AARCH64_FL_F32MM function.
22113 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
22114 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
22115 AARCH64_FL_F64MM function.
22116 (REQUIRED_EXTENSIONS):
22118 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
22120 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
22123 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
22125 * config/i386/i386.md (*movoi_internal_avx): Do not check for
22126 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
22127 (*movti_internal): Do not check for
22128 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
22129 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
22130 just after check for TARGET_AVX.
22131 (*movdf_internal): Ditto.
22132 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
22133 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
22134 * config/i386/sse.md (mov<mode>_internal): Only check
22135 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
22136 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
22137 (<sse>_andnot<mode>3<mask_name>): Move check for
22138 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
22139 (<code><mode>3<mask_name>): Ditto.
22140 (*andnot<mode>3): Ditto.
22141 (*andnottf3): Ditto.
22142 (*<code><mode>3): Ditto.
22143 (*<code>tf3): Ditto.
22144 (*andnot<VI:mode>3): Remove
22145 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
22146 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
22147 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
22148 (sse4_1_blendv<ssemodesuffix>): Ditto.
22149 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
22150 Explain that tune applies to 128bit instructions only.
22152 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
22154 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
22155 to definition of hsa_kernel_description. Parse assembly to find SGPR
22156 and VGPR count of kernel and store in hsa_kernel_description.
22158 2020-01-31 Tamar Christina <tamar.christina@arm.com>
22160 PR rtl-optimization/91838
22161 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
22162 to truncate if allowed or reject combination.
22164 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
22166 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
22167 (find_inv_vars_cb): Likewise.
22169 2020-01-31 David Malcolm <dmalcolm@redhat.com>
22171 * calls.c (special_function_p): Split out the check for DECL_NAME
22172 being non-NULL and fndecl being extern at file scope into a
22173 new maybe_special_function_p and call it. Drop check for fndecl
22174 being non-NULL that was after a usage of DECL_NAME (fndecl).
22175 * tree.h (maybe_special_function_p): New inline function.
22177 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
22179 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
22180 (mask_gather_load<mode>): ... here, and zero-initialize the
22182 (maskload<mode>di): Zero-initialize the destination.
22183 * config/gcn/gcn.c:
22185 2020-01-30 David Malcolm <dmalcolm@redhat.com>
22188 * doc/analyzer.texi (Limitations): Note that constraints on
22189 floating-point values are currently ignored.
22191 2020-01-30 Jakub Jelinek <jakub@redhat.com>
22194 * symtab.c (symtab_node::noninterposable_alias): If localalias
22195 already exists, but is not usable, append numbers after it until
22196 a unique name is found. Formatting fix.
22198 PR middle-end/93505
22199 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
22202 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
22204 * config/gcn/gcn.c (print_operand): Handle LTGT.
22205 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
22207 2020-01-30 Richard Biener <rguenther@suse.de>
22209 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
22210 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
22212 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
22214 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
22215 without a DECL in .data.rel.ro.local.
22217 2020-01-30 Jakub Jelinek <jakub@redhat.com>
22220 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
22224 * config/i386/sse.md
22225 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
22226 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
22227 any_extend code iterator instead of always zero_extend.
22228 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
22229 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
22230 Use any_extend code iterator instead of always zero_extend.
22231 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
22232 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
22233 Use any_extend code iterator instead of always zero_extend.
22234 (*sse2_pmovmskb_ext): New define_insn.
22235 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
22238 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
22239 (*popcountsi2_zext_falsedep): New define_insn.
22241 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
22243 * config.in: Regenerated.
22244 * configure: Regenerated.
22246 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
22249 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
22250 LLVM's assembler changed the default in version 9.
22252 2020-01-24 Jeff Law <law@redhat.com>
22254 PR tree-optimization/89689
22255 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
22257 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
22261 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
22263 PR rtl-optimization/87763
22264 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
22265 simplification to handle subregs as well as bare regs.
22266 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
22268 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
22271 * ira.c (ira): Revert use of simplified LRA algorithm.
22273 2020-01-29 Martin Jambor <mjambor@suse.cz>
22275 PR tree-optimization/92706
22276 * tree-sra.c (struct access): Fields first_link, last_link,
22277 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
22278 next_rhs_queued and grp_rhs_queued respectively, new fields
22279 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
22280 (struct assign_link): Field next renamed to next_rhs, new field
22281 next_lhs. Updated comment.
22282 (work_queue_head): Renamed to rhs_work_queue_head.
22283 (lhs_work_queue_head): New variable.
22284 (add_link_to_lhs): New function.
22285 (relink_to_new_repr): Also relink LHS lists.
22286 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
22287 (add_access_to_lhs_work_queue): New function.
22288 (pop_access_from_work_queue): Renamed to
22289 pop_access_from_rhs_work_queue.
22290 (pop_access_from_lhs_work_queue): New function.
22291 (build_accesses_from_assign): Also add links to LHS lists and to LHS
22293 (child_would_conflict_in_lacc): Renamed to
22294 child_would_conflict_in_acc. Adjusted parameter names.
22295 (create_artificial_child_access): New parameter set_grp_read, use it.
22296 (subtree_mark_written_and_enqueue): Renamed to
22297 subtree_mark_written_and_rhs_enqueue.
22298 (propagate_subaccesses_across_link): Renamed to
22299 propagate_subaccesses_from_rhs.
22300 (propagate_subaccesses_from_lhs): New function.
22301 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
22304 2020-01-29 Martin Jambor <mjambor@suse.cz>
22306 PR tree-optimization/92706
22307 * tree-sra.c (struct access): Adjust comment of
22308 grp_total_scalarization.
22309 (find_access_in_subtree): Look for single children spanning an entire
22311 (scalarizable_type_p): Allow register accesses, adjust callers.
22312 (completely_scalarize): Remove function.
22313 (scalarize_elem): Likewise.
22314 (create_total_scalarization_access): Likewise.
22315 (sort_and_splice_var_accesses): Do not track total scalarization
22317 (analyze_access_subtree): New parameter totally, adjust to new meaning
22318 of grp_total_scalarization.
22319 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
22320 (can_totally_scalarize_forest_p): New function.
22321 (create_total_scalarization_access): Likewise.
22322 (create_total_access_and_reshape): Likewise.
22323 (total_should_skip_creating_access): Likewise.
22324 (totally_scalarize_subtree): Likewise.
22325 (analyze_all_variable_accesses): Perform total scalarization after
22326 subaccess propagation using the new functions above.
22327 (initialize_constant_pool_replacements): Output initializers by
22328 traversing the access tree.
22330 2020-01-29 Martin Jambor <mjambor@suse.cz>
22332 * tree-sra.c (verify_sra_access_forest): New function.
22333 (verify_all_sra_access_forests): Likewise.
22334 (create_artificial_child_access): Set parent.
22335 (analyze_all_variable_accesses): Call the verifier.
22337 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22339 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
22340 if called on indirect edge.
22341 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
22342 speculative call if needed.
22344 2020-01-29 Richard Biener <rguenther@suse.de>
22346 PR tree-optimization/93428
22347 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
22348 permutation when the load node is created.
22349 (vect_analyze_slp_instance): Re-use it here.
22351 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22353 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
22355 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
22357 PR rtl-optimization/93272
22358 * ira-lives.c (process_out_of_region_eh_regs): New function.
22359 (process_bb_node_lives): Call it.
22361 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22363 * coverage.c (read_counts_file): Make error message lowercase.
22365 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22367 * profile-count.c (profile_quality_display_names): Fix ordering.
22369 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22372 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
22373 hash only when edge is first within the sequence.
22374 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
22375 (symbol_table::create_edge): Do not set target_prob.
22376 (cgraph_edge::remove_caller): Watch for speculative calls when updating
22377 the call site hash.
22378 (cgraph_edge::make_speculative): Drop target_prob parameter.
22379 (cgraph_edge::speculative_call_info): Remove.
22380 (cgraph_edge::first_speculative_call_target): New member function.
22381 (update_call_stmt_hash_for_removing_direct_edge): New function.
22382 (cgraph_edge::resolve_speculation): Rewrite to new API.
22383 (cgraph_edge::speculative_call_for_target): New member function.
22384 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
22385 multiple speculation targets.
22386 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
22388 (verify_speculative_call): Verify that targets form an interval.
22389 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
22390 (cgraph_edge::first_speculative_call_target): New member function.
22391 (cgraph_edge::next_speculative_call_target): New member function.
22392 (cgraph_edge::speculative_call_target_ref): New member function.
22393 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
22394 (cgraph_edge): Remove target_prob.
22395 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
22396 Fix handling of speculative calls.
22397 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
22398 * ipa-fnsummary.c (analyze_function_body): Likewise.
22399 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
22400 * ipa-profile.c (dump_histogram): Fix formating.
22401 (ipa_profile_generate_summary): Watch for overflows.
22402 (ipa_profile): Do not require probablity to be 1/2; update to new API.
22403 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
22404 (update_indirect_edges_after_inlining): Update to new API.
22405 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
22407 * profile-count.h: (profile_probability::adjusted): New.
22408 * tree-inline.c (copy_bb): Update to new speculative call API; fix
22409 updating of profile.
22410 * value-prof.c (gimple_ic_transform): Rename to ...
22411 (dump_ic_profile): ... this one; update dumping.
22412 (stream_in_histogram_value): Fix formating.
22413 (gimple_value_profile_transformations): Update.
22415 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
22418 * config/i386/i386.md (*movoi_internal_avx): Remove
22419 TARGET_SSE_TYPELESS_STORES check.
22420 (*movti_internal): Prefer TARGET_AVX over
22421 TARGET_SSE_TYPELESS_STORES.
22422 (*movtf_internal): Likewise.
22423 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
22424 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
22425 from TARGET_SSE_TYPELESS_STORES.
22427 2020-01-28 David Malcolm <dmalcolm@redhat.com>
22429 * diagnostic-core.h (warning_at): Rename overload to...
22430 (warning_meta): ...this.
22431 (emit_diagnostic_valist): Delete decl of overload taking
22432 diagnostic_metadata.
22433 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
22434 (warning_at): Rename overload taking diagnostic_metadata to...
22435 (warning_meta): ...this.
22437 2020-01-28 Richard Biener <rguenther@suse.de>
22439 PR tree-optimization/93439
22440 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
22441 * tree-cfg.c (move_sese_region_to_fn): ... here.
22442 (verify_types_in_gimple_reference): Verify used cliques are
22445 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
22448 * config/i386/i386-options.c (set_ix86_tune_features): Add an
22449 argument of a pointer to struct gcc_options and pass it to
22450 parse_mtune_ctrl_str.
22451 (ix86_function_specific_restore): Pass opts to
22452 set_ix86_tune_features.
22453 (ix86_option_override_internal): Likewise.
22454 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
22455 gcc_options and use it for x_ix86_tune_ctrl_string.
22457 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
22459 PR rtl-optimization/87763
22460 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
22461 simplification to handle subregs as well as bare regs.
22462 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
22464 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
22466 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
22467 for reduction chains that (now) include a call.
22469 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
22471 PR tree-optimization/92822
22472 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
22473 out the don't-care elements of a vector whose significant elements
22474 are duplicates, make the don't-care elements duplicates too.
22476 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
22478 PR tree-optimization/93434
22479 * tree-predcom.c (split_data_refs_to_components): Record which
22480 components have had aliasing loads removed. Prevent store-store
22481 commoning for all such components.
22483 2020-01-28 Jakub Jelinek <jakub@redhat.com>
22486 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
22487 -1 or is_vshift is true, use new_vector with number of elts npatterns
22488 rather than new_unary_operation.
22490 PR tree-optimization/93454
22491 * gimple-fold.c (fold_array_ctor_reference): Perform
22492 elt_size.to_uhwi () just once, instead of calling it in every
22493 iteration. Punt if that value is above size of the temporary
22494 buffer. Decrease third native_encode_expr argument when
22495 bufoff + elt_sz is above size of buf.
22497 2020-01-27 Joseph Myers <joseph@codesourcery.com>
22499 * config/mips/mips.c (mips_declare_object_name)
22500 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
22502 2020-01-27 Martin Liska <mliska@suse.cz>
22504 PR gcov-profile/93403
22505 * tree-profile.c (gimple_init_gcov_profiler): Generate
22506 both __gcov_indirect_call_profiler_v4 and
22507 __gcov_indirect_call_profiler_v4_atomic.
22509 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
22512 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
22514 (@aarch64_split_simd_mov<mode>): Use it.
22515 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
22516 Leave the vec_extract patterns to handle 2-element vectors.
22517 (aarch64_simd_mov_from_<mode>high): Likewise.
22518 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
22519 (vec_extractv2dfv1df): Likewise.
22521 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
22523 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
22524 jump conditions for *compare_condjump<GPI:mode>.
22526 2020-01-27 David Malcolm <dmalcolm@redhat.com>
22529 * digraph.cc (test_edge::test_edge): Specify template for base
22532 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
22534 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
22536 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
22538 * config/arc/arc-protos.h (gen_mlo): Remove.
22539 (gen_mhi): Likewise.
22540 * config/arc/arc.c (AUX_MULHI): Define.
22541 (arc_must_save_reister): Special handling for r58/59.
22542 (arc_compute_frame_size): Consider mlo/mhi registers.
22543 (arc_save_callee_saves): Emit fp/sp move only when emit_move
22545 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
22546 mlo/mhi name selection.
22547 (arc_restore_callee_saves): Don't early restore blink when ISR.
22548 (arc_expand_prologue): Add mlo/mhi saving.
22549 (arc_expand_epilogue): Add mlo/mhi restoring.
22552 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
22553 numbering when MUL64 option is used.
22554 (DWARF2_FRAME_REG_OUT): Define.
22555 * config/arc/arc.md (arc600_stall): New pattern.
22556 (VUNSPEC_ARC_ARC600_STALL): Define.
22557 (mulsi64): Use correct mlo/mhi registers.
22558 (mulsi_600): Clean it up.
22559 * config/arc/predicates.md (mlo_operand): Remove any dependency on
22561 (mhi_operand): Likewise.
22563 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
22564 Petro Karashchenko <petro.karashchenko@ring.com>
22566 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
22567 attributes if needed.
22568 (prepare_move_operands): Generate special unspec instruction for
22570 (arc_isuncached_mem_p): Propagate uncached attribute to each
22572 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
22573 (VUNSPEC_ARC_STDI): Likewise.
22574 (ALLI): New mode iterator.
22575 (mALLI): New mode attribute.
22576 (lddi): New instruction pattern.
22578 (stdidi_split): Split instruction for architectures which are not
22579 supporting ll64 option.
22580 (lddidi_split): Likewise.
22582 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
22584 PR rtl-optimization/92989
22585 * lra-lives.c (process_bb_lives): Update the live-in set before
22586 processing additional clobbers.
22588 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
22590 PR rtl-optimization/93170
22591 * cselib.c (cselib_invalidate_regno_val): New function, split out
22593 (cselib_invalidate_regno): ...here.
22594 (cselib_invalidated_by_call_p): New function.
22595 (cselib_process_insn): Iterate over all the hard-register entries in
22596 REG_VALUES and invalidate any that cross call-clobbered registers.
22598 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
22600 * dojump.c (split_comparison): Use HONOR_NANS rather than
22601 HONOR_SNANS when splitting LTGT.
22603 2020-01-27 Martin Liska <mliska@suse.cz>
22606 * opts.c (print_filtered_help): Exclude language-specific
22607 options from --help=common unless enabled in all FEs.
22609 2020-01-27 Martin Liska <mliska@suse.cz>
22611 * opts.c (print_help): Exclude params from
22612 all except --help=param.
22614 2020-01-27 Martin Liska <mliska@suse.cz>
22617 * config/i386/i386-features.c (make_resolver_func):
22618 Align the code with ppc64 target implementation.
22619 Do not generate a unique name for resolver function.
22621 2020-01-27 Richard Biener <rguenther@suse.de>
22623 PR tree-optimization/93397
22624 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
22625 converted reduction chain SLP graph adjustment.
22627 2020-01-26 Marek Polacek <polacek@redhat.com>
22630 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
22633 2020-01-26 Jason Merrill <jason@redhat.com>
22636 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
22639 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
22641 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
22642 (rx_setmem): Likewise.
22644 2020-01-26 Jakub Jelinek <jakub@redhat.com>
22647 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
22648 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
22649 drop <di> from constraint of last operand.
22652 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
22653 TARGET_AVX2 and V4DFmode not in the split condition, but in the
22654 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
22656 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
22659 * ipa-cp.c (get_info_about_necessary_edges): Remove value
22662 2020-01-24 Jeff Law <law@redhat.com>
22664 PR tree-optimization/92788
22665 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
22668 2020-01-24 Jakub Jelinek <jakub@redhat.com>
22671 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
22672 *avx_vperm_broadcast_<mode>,
22673 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
22674 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
22675 Move before avx2_perm<mode>/avx512f_perm<mode>.
22678 * simplify-rtx.c (simplify_const_unary_operation,
22679 simplify_const_binary_operation): Punt for mode precision above
22680 MAX_BITSIZE_MODE_ANY_INT.
22682 2020-01-24 Andrew Pinski <apinski@marvell.com>
22684 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
22685 alu.shift_reg to 0.
22687 2020-01-24 Jeff Law <law@redhat.com>
22690 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
22691 for REGs. Call output_operand_lossage to get more reasonable
22694 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
22696 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
22697 gcn_fp_compare_operator.
22698 (vec_cmpu<mode>di): Use gcn_compare_operator.
22699 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
22700 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
22701 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
22702 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
22703 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
22704 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
22705 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
22706 gcn_fp_compare_operator.
22707 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
22708 gcn_fp_compare_operator.
22709 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
22710 gcn_fp_compare_operator.
22711 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
22712 gcn_fp_compare_operator.
22714 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
22716 * doc/install.texi (Cross-Compiler-Specific Options): Document
22717 `--with-toolexeclibdir' option.
22719 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
22721 * target.def (flags_regnum): Also mention effect on delay slot filling.
22722 * doc/tm.texi: Regenerate.
22724 2020-01-23 Jeff Law <law@redhat.com>
22726 PR translation/90162
22727 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
22729 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
22732 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
22735 2020-01-23 Jakub Jelinek <jakub@redhat.com>
22737 PR rtl-optimization/93402
22738 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
22741 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
22743 * config.in: Regenerated.
22744 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
22745 for TARGET_LIBC_GNUSTACK.
22746 * configure: Regenerated.
22747 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
22748 found to be 2.31 or greater.
22750 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
22752 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
22754 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
22755 (mips_asm_file_end): New function. Delegate to
22756 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
22757 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
22759 2020-01-23 Jakub Jelinek <jakub@redhat.com>
22762 * config/i386/i386-modes.def (POImode): New mode.
22763 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
22764 * config/i386/i386.md (DPWI): New mode attribute.
22765 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
22766 (QWI): Rename to...
22767 (QPWI): ... this. Use POI instead of OI for TImode.
22768 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
22769 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
22772 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
22775 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
22777 (speculation_tracker_rev): New pattern.
22778 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
22779 Use speculation_tracker_rev to track the inverse condition.
22781 2020-01-23 Richard Biener <rguenther@suse.de>
22783 PR tree-optimization/93381
22784 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
22785 alias-set of the def as argument and record the first one.
22786 (vn_walk_cb_data::first_set): New member.
22787 (vn_reference_lookup_3): Pass the alias-set of the current def
22788 to push_partial_def. Fix alias-set used in the aggregate copy
22790 (vn_reference_lookup): Consistently set *last_vuse_ptr.
22791 * real.c (clear_significand_below): Fix out-of-bound access.
22793 2020-01-23 Jakub Jelinek <jakub@redhat.com>
22796 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
22797 New define_insn patterns.
22799 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
22801 * doc/sourcebuild.texi (check-function-bodies): Add an
22802 optional target/xfail selector.
22804 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
22806 PR rtl-optimization/93124
22807 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
22808 bare USE and CLOBBER insns.
22810 2020-01-22 Andrew Pinski <apinski@marvell.com>
22812 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
22814 2020-01-22 David Malcolm <dmalcolm@redhat.com>
22817 * gdbinit.in (break-on-saved-diagnostic): Update for move of
22818 diagnostic_manager into "ana" namespace.
22819 * selftest-run-tests.c (selftest::run_tests): Update for move of
22820 selftest::run_analyzer_selftests to
22821 ana::selftest::run_analyzer_selftests.
22823 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
22825 * cfgexpand.c (union_stack_vars): Update the size.
22827 2020-01-22 Richard Biener <rguenther@suse.de>
22829 PR tree-optimization/93381
22830 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
22831 throughout, handle all conversions the same.
22833 2020-01-22 Jakub Jelinek <jakub@redhat.com>
22836 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
22837 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
22838 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
22839 Call force_reg on high_in2 unconditionally.
22841 2020-01-22 Martin Liska <mliska@suse.cz>
22843 PR tree-optimization/92924
22844 * profile.c (compute_value_histograms): Divide
22845 all counter values.
22847 2020-01-22 Jakub Jelinek <jakub@redhat.com>
22850 * output.h (assemble_name_resolve): Declare.
22851 * varasm.c (assemble_name_resolve): New function.
22852 (assemble_name): Use it.
22853 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
22855 2020-01-22 Joseph Myers <joseph@codesourcery.com>
22857 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
22858 update_web_docs_git instead of update_web_docs_svn.
22860 2020-01-21 Andrew Pinski <apinski@marvell.com>
22863 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
22864 as PTR mode. Have operand 1 as being modeless, it can be P mode.
22865 (*tlsgd_small_<mode>): Likewise.
22866 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
22867 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
22868 register. Convert that register back to dest using convert_mode.
22870 2020-01-21 Jim Wilson <jimw@sifive.com>
22872 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
22875 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
22876 Uros Bizjak <ubizjak@gmail.com>
22879 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
22881 (legitimize_tls_address): Do GNU2 TLS address computation in
22882 ptr_mode and zero-extend result to Pmode.
22883 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
22884 :P with :PTR and Pmode with ptr_mode.
22885 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
22886 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
22887 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
22889 2020-01-21 Jakub Jelinek <jakub@redhat.com>
22892 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
22893 the last two operands are CONST_INT_P before using them as such.
22895 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
22897 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
22898 to get the integer element types.
22900 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
22902 * config/aarch64/aarch64-sve-builtins.h
22903 (function_expander::convert_to_pmode): Declare.
22904 * config/aarch64/aarch64-sve-builtins.cc
22905 (function_expander::convert_to_pmode): New function.
22906 (function_expander::get_contiguous_base): Use it.
22907 (function_expander::prepare_gather_address_operands): Likewise.
22908 * config/aarch64/aarch64-sve-builtins-sve2.cc
22909 (svwhilerw_svwhilewr_impl::expand): Likewise.
22911 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
22914 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
22915 cfun->machine->label_is_assembled.
22916 (aarch64_print_patchable_function_entry): New.
22917 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
22918 * config/aarch64/aarch64.h (struct machine_function): New field,
22919 label_is_assembled.
22921 2020-01-21 David Malcolm <dmalcolm@redhat.com>
22924 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
22927 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
22930 * cgraph.c (cgraph_edge::resolve_speculation,
22931 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
22932 call_stmt_site_hash.
22934 2020-01-21 Martin Liska <mliska@suse.cz>
22936 * config/rs6000/rs6000.c (common_mode_defined): Remove
22939 2020-01-21 Richard Biener <rguenther@suse.de>
22941 PR tree-optimization/92328
22942 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
22943 type when value-numbering same-sized store by inserting a
22945 (eliminate_dom_walker::eliminate_stmt): When eliminating
22946 a redundant store handle bit-reinterpretation of the same value.
22948 2020-01-21 Andrew Pinski <apinski@marvel.com>
22951 * tree-into-ssa.c (prepare_block_for_update_1): Split out
22953 (prepare_block_for_update): This. Use a worklist instead of
22956 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22958 * config/arm/arm.c (clear_operation_p):
22959 Initialise last_regno, skip first iteration
22960 based on the first_set value and use ints instead
22961 of the unnecessary HOST_WIDE_INTs.
22963 2020-01-21 Jakub Jelinek <jakub@redhat.com>
22966 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
22967 compare_mode other than SFmode or DFmode.
22969 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
22972 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
22973 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
22974 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
22976 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
22978 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
22980 2020-01-20 Andrew Pinski <apinski@marvell.com>
22982 PR middle-end/93242
22983 * targhooks.c (default_print_patchable_function_entry): Use
22984 output_asm_insn to emit the nop instruction.
22986 2020-01-20 Fangrui Song <maskray@google.com>
22988 PR middle-end/93194
22989 * targhooks.c (default_print_patchable_function_entry): Align to
22992 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
22995 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
22996 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
22997 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
22998 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
22999 (*tls_dynamic_gnu2_lea_64): Renamed to ...
23000 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
23001 Remove the {q} suffix from lea.
23002 (*tls_dynamic_gnu2_call_64): Renamed to ...
23003 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
23004 (*tls_dynamic_gnu2_combine_64): Renamed to ...
23005 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
23006 Pass Pmode to gen_tls_dynamic_gnu2_64.
23008 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
23010 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
23012 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
23014 * config/aarch64/aarch64-sve-builtins-base.cc
23015 (svld1ro_impl::memory_vector_mode): Remove parameter name.
23017 2020-01-20 Richard Biener <rguenther@suse.de>
23020 * dwarf2out.c (prune_unused_types): Unconditionally mark
23021 called function DIEs.
23023 2020-01-20 Martin Liska <mliska@suse.cz>
23025 PR tree-optimization/93199
23026 * tree-eh.c (struct leh_state): Add
23027 new field outer_non_cleanup.
23028 (cleanup_is_dead_in): Pass leh_state instead
23029 of eh_region. Add a checking that state->outer_non_cleanup
23030 points to outer non-clean up region.
23031 (lower_try_finally): Record outer_non_cleanup
23033 (lower_catch): Likewise.
23034 (lower_eh_filter): Likewise.
23035 (lower_eh_must_not_throw): Likewise.
23036 (lower_cleanup): Likewise.
23038 2020-01-20 Richard Biener <rguenther@suse.de>
23040 PR tree-optimization/93094
23041 * tree-vectorizer.h (vect_loop_versioning): Adjust.
23042 (vect_transform_loop): Likewise.
23043 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
23044 loop_vectorized_call to vect_transform_loop.
23045 * tree-vect-loop.c (vect_transform_loop): Pass down
23046 loop_vectorized_call to vect_loop_versioning.
23047 * tree-vect-loop-manip.c (vect_loop_versioning): Use
23048 the earlier discovered loop_vectorized_call.
23050 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
23052 * doc/contribute.texi: Update for SVN -> Git transition.
23053 * doc/install.texi: Likewise.
23055 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
23058 * cgraph.c (cgraph_edge::make_speculative): Increase number of
23059 speculative targets.
23060 (verify_speculative_call): New function
23061 (cgraph_node::verify_node): Use it.
23062 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
23065 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
23068 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
23069 (cgraph_edge::make_direct): Remove all indirect targets.
23070 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
23071 (cgraph_node::verify_node): Verify that only one call_stmt or
23072 lto_stmt_uid is set.
23073 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
23075 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
23076 (lto_output_ref): Simplify streaming of stmt.
23077 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
23079 2020-01-18 Tamar Christina <tamar.christina@arm.com>
23081 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
23082 Mark parameter unused.
23084 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
23086 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
23088 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
23090 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
23092 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
23094 * Makefile.in: Add coroutine-passes.o.
23095 * builtin-types.def (BT_CONST_SIZE): New.
23096 (BT_FN_BOOL_PTR): New.
23097 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
23098 * builtins.def (DEF_COROUTINE_BUILTIN): New.
23099 * coroutine-builtins.def: New file.
23100 * coroutine-passes.cc: New file.
23101 * function.h (struct GTY function): Add a bit to indicate that the
23102 function is a coroutine component.
23103 * internal-fn.c (expand_CO_FRAME): New.
23104 (expand_CO_YIELD): New.
23105 (expand_CO_SUSPN): New.
23106 (expand_CO_ACTOR): New.
23107 * internal-fn.def (CO_ACTOR): New.
23111 * passes.def: Add pass_coroutine_lower_builtins,
23112 pass_coroutine_early_expand_ifns.
23113 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
23114 (make_pass_coroutine_early_expand_ifns): New.
23115 * doc/invoke.texi: Document the fcoroutines command line
23118 2020-01-18 Jakub Jelinek <jakub@redhat.com>
23120 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
23123 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
23124 after checking the argument is a REG. Don't use REGNO (reg)
23125 again to set last_regno, reuse regno variable instead.
23127 2020-01-17 David Malcolm <dmalcolm@redhat.com>
23129 * doc/analyzer.texi (Limitations): Add note about NaN.
23131 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23132 Sudakshina Das <sudi.das@arm.com>
23134 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
23135 and valid immediate.
23136 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
23137 (lshrdi3): Generate thumb2_lsrl for valid immediates.
23138 * config/arm/constraints.md (Pg): New.
23139 * config/arm/predicates.md (long_shift_imm): New.
23140 (arm_reg_or_long_shift_imm): Likewise.
23141 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
23142 (thumb2_lsll): Likewise.
23143 (thumb2_lsrl): New.
23145 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23146 Sudakshina Das <sudi.das@arm.com>
23148 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
23149 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
23150 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
23151 register pairs for doubleword quantities for ARMv8.1M-Mainline.
23152 * config/arm/thumb2.md (thumb2_asrl): New.
23153 (thumb2_lsll): Likewise.
23155 2020-01-17 Jakub Jelinek <jakub@redhat.com>
23157 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
23160 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
23162 * gdbinit.in (help-gcc-hooks): New command.
23163 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
23164 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
23167 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
23169 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
23170 correct target macro.
23172 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
23174 * config/aarch64/aarch64-protos.h
23175 (aarch64_sve_ld1ro_operand_p): New.
23176 * config/aarch64/aarch64-sve-builtins-base.cc
23177 (class load_replicate): New.
23178 (class svld1ro_impl): New.
23179 (class svld1rq_impl): Change to inherit from load_replicate.
23180 (svld1ro): New sve intrinsic function base.
23181 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
23182 New DEF_SVE_FUNCTION.
23183 * config/aarch64/aarch64-sve-builtins-base.h
23184 (svld1ro): New decl.
23185 * config/aarch64/aarch64-sve-builtins.cc
23186 (function_expander::add_mem_operand): Modify assert to allow
23188 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
23190 * config/aarch64/aarch64.c
23191 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
23192 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
23193 (aarch64_sve_ld1ro_operand_p): New.
23194 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
23195 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
23196 * config/aarch64/predicates.md
23197 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
23199 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
23201 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
23202 Introduce this ACLE specified predefined macro.
23203 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
23204 (fp): Disabling this disables f64mm.
23205 (simd): Disabling this disables f64mm.
23206 (fp16): Disabling this disables f64mm.
23207 (sve): Disabling this disables f64mm.
23208 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
23209 (AARCH64_ISA_F64MM): New.
23210 (TARGET_F64MM): New.
23211 * doc/invoke.texi (f64mm): Document new option.
23213 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
23215 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
23216 (neoversen1_tunings): Likewise.
23218 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
23221 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
23222 Add assert to ensure prolog has been emitted.
23223 (aarch64_split_atomic_op): Likewise.
23224 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
23225 Use epilogue_completed rather than reload_completed.
23226 (aarch64_atomic_exchange<mode>): Likewise.
23227 (aarch64_atomic_<atomic_optab><mode>): Likewise.
23228 (atomic_nand<mode>): Likewise.
23229 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
23230 (atomic_fetch_nand<mode>): Likewise.
23231 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
23232 (atomic_nand_fetch<mode>): Likewise.
23234 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
23237 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
23239 (REVERSE_CONDITION): Delete.
23240 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
23241 (CCFP_CCFPE): Likewise.
23242 (e): New mode attribute.
23243 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
23244 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
23245 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
23246 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
23247 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
23248 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
23249 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
23250 name of generator from gen_ccmpdi to gen_ccmpccdi.
23251 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
23252 the previous comparison but aren't able to, use the new ccmp_rev
23255 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
23257 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
23258 than testing directly for INTEGER_CST.
23259 (gimplify_target_expr, gimplify_omp_depend): Likewise.
23261 2020-01-17 Jakub Jelinek <jakub@redhat.com>
23263 PR tree-optimization/93292
23264 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
23265 get_vectype_for_scalar_type returns NULL.
23267 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
23269 * params.opt (-param=max-predicted-iterations): Increase range from 0.
23270 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
23272 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
23274 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
23276 * params.opt: (max-predicted-iterations): Set bounds.
23277 * predict.c (real_almost_one, real_br_prob_base,
23278 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
23279 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
23280 probabilities; do not truncate to reg_br_prob_bases.
23281 (estimate_loops_at_level): Pass max_cyclic_prob.
23282 (estimate_loops): Compute max_cyclic_prob.
23283 (estimate_bb_frequencies): Do not initialize real_*; update calculation
23285 * profile-count.c (profile_probability::to_sreal): New.
23286 * profile-count.h (class sreal): Move up in file.
23287 (profile_probability::to_sreal): Declare.
23289 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23292 (arm_invalid_conversion): New function for target hook.
23293 (arm_invalid_unary_op): New function for target hook.
23294 (arm_invalid_binary_op): New function for target hook.
23296 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23298 * config.gcc: Add arm_bf16.h.
23299 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
23300 (arm_simd_builtin_std_type): Add BFmode.
23301 (arm_init_simd_builtin_types): Define element types for vector types.
23302 (arm_init_bf16_types): New function.
23303 (arm_init_builtins): Add arm_init_bf16_types function call.
23304 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
23305 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
23306 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
23307 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
23308 (arm_vector_mode_supported_p): Add V4BF, V8BF.
23309 (arm_mangle_type): Add __bf16.
23310 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
23311 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
23312 arm_bf16_ptr_type_node.
23313 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
23314 define_split between ARM registers.
23315 * config/arm/arm_bf16.h: New file.
23316 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
23317 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
23318 (VQXMOV): Add V8BF.
23319 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
23320 * config/arm/vfp.md: Add BFmode to movhf patterns.
23322 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
23323 Andre Vieira <andre.simoesdiasvieira@arm.com>
23325 * config/arm/arm-cpus.in (mve, mve_float): New features.
23326 (dsp, mve, mve.fp): New options.
23327 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
23328 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
23329 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
23331 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23332 Thomas Preud'homme <thomas.preudhomme@arm.com>
23334 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
23336 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
23337 error for using -mcmse when targeting Armv8.1-M Mainline.
23339 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23340 Thomas Preud'homme <thomas.preudhomme@arm.com>
23342 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
23343 address in r4 when targeting Armv8.1-M Mainline.
23344 (nonsecure_call_value_internal): Likewise.
23345 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
23346 a register match_operand again. Emit BLXNS when targeting
23347 Armv8.1-M Mainline.
23348 (nonsecure_call_value_reg_thumb2): Likewise.
23350 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23351 Thomas Preud'homme <thomas.preudhomme@arm.com>
23353 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
23354 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
23355 variable as true when floating-point ABI is not hard. Replace
23356 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
23357 Generate VLSTM and VLLDM instruction respectively before and
23358 after a function call to cmse_nonsecure_call function.
23359 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
23360 (VUNSPEC_VLLDM): Likewise.
23361 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
23362 (lazy_load_multiple_insn): Likewise.
23364 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23365 Thomas Preud'homme <thomas.preudhomme@arm.com>
23367 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
23368 (arm_emit_vfp_multi_reg_pop): Likewise.
23369 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
23370 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
23371 restore callee-saved VFP registers.
23373 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23374 Thomas Preud'homme <thomas.preudhomme@arm.com>
23376 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
23377 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
23378 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
23379 callee-saved GPRs as well as clear ip register before doing a nonsecure
23380 call then restore callee-saved GPRs after it when targeting
23381 Armv8.1-M Mainline.
23382 (arm_reorg): Adapt to function rename.
23384 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23385 Thomas Preud'homme <thomas.preudhomme@arm.com>
23387 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
23388 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
23389 clear_vfp_multiple pattern based on a new vfp parameter.
23390 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
23391 targeting Armv8.1-M Mainline.
23392 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
23393 unconditionally when targeting Armv8.1-M Mainline architecture. Check
23394 whether VFP registers are available before looking call_used_regs for a
23396 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
23397 of prototype of clear_operation_p.
23398 (clear_vfp_multiple_operation): New predicate.
23399 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
23400 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
23402 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23403 Thomas Preud'homme <thomas.preudhomme@arm.com>
23405 * config/arm/arm-protos.h (clear_operation_p): Declare.
23406 * config/arm/arm.c (clear_operation_p): New function.
23407 (cmse_clear_registers): Generate clear_multiple instruction pattern if
23408 targeting Armv8.1-M Mainline or successor.
23409 (output_return_instruction): Only output APSR register clearing if
23410 Armv8.1-M Mainline instructions not available.
23411 (thumb_exit): Likewise.
23412 * config/arm/predicates.md (clear_multiple_operation): New predicate.
23413 * config/arm/thumb2.md (clear_apsr): New define_insn.
23414 (clear_multiple): Likewise.
23415 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
23417 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23418 Thomas Preud'homme <thomas.preudhomme@arm.com>
23420 * config/arm/arm.c (fp_sysreg_names): Declare and define.
23421 (use_return_insn): Also return false for Armv8.1-M Mainline.
23422 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
23423 Mainline instructions are available.
23424 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
23425 when targeting Armv8.1-M Mainline Security Extensions.
23426 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
23427 Mainline entry function.
23428 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
23429 targeting Armv8.1-M Mainline or successor.
23430 (arm_expand_epilogue): Fix indentation of caller-saved register
23431 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
23433 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
23434 (FP_SYSREGS): Likewise.
23435 (enum vfp_sysregs_encoding): Define enum.
23436 (fp_sysreg_names): Declare.
23437 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
23438 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
23439 (pop_fpsysreg_insn): Likewise.
23441 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23442 Thomas Preud'homme <thomas.preudhomme@arm.com>
23444 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
23445 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
23446 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
23447 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
23448 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
23449 (ARMv8_1m_main): New feature group.
23450 (armv8.1-m.main): New architecture.
23451 * config/arm/arm-tables.opt: Regenerate.
23452 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
23453 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
23454 (arm_options_perform_arch_sanity_checks): Error out when targeting
23455 Armv8.1-M Mainline Security Extensions.
23456 * config/arm/arm.h (arm_arch8_1m_main): Declare.
23458 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23460 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
23461 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
23462 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
23463 aarch64_bfdot_laneq): New.
23464 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
23465 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
23466 vbfdotq_laneq_f32): New.
23467 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
23468 VBFMLA_W, VBF): New.
23469 (isquadop): Add V4BF, V8BF.
23471 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23473 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
23474 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
23475 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
23476 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
23477 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
23478 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
23479 usdot_laneq, sudot_lane,sudot_laneq): New.
23480 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
23481 (aarch64_<sur>dot_lane): New.
23482 * config/aarch64/arm_neon.h (vusdot_s32): New.
23483 (vusdotq_s32): New.
23484 (vusdot_lane_s32): New.
23485 (vsudot_lane_s32): New.
23486 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
23487 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
23489 2020-01-16 Martin Liska <mliska@suse.cz>
23491 * value-prof.c (dump_histogram_value): Fix
23492 obvious spacing issue.
23494 2020-01-16 Andrew Pinski <apinski@marvell.com>
23496 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
23497 !storage_order_barrier_p.
23499 2020-01-16 Andrew Pinski <apinski@marvell.com>
23501 * sched-int.h (_dep): Add unused bit-field field for the padding.
23502 * sched-deps.c (init_dep_1): Init unused field.
23504 2020-01-16 Andrew Pinski <apinski@marvell.com>
23506 * optabs.h (create_expand_operand): Initialize target field also.
23508 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
23510 PR tree-optimization/92429
23511 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
23512 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
23514 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
23517 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
23519 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
23520 aarch64_sve_int_mode to each mode.
23522 2020-01-15 David Malcolm <dmalcolm@redhat.com>
23524 * doc/analyzer.texi (Overview): Add note about
23525 -fdump-ipa-analyzer.
23527 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
23529 PR tree-optimization/93231
23530 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
23531 input_type is unsigned. Use tree_to_shwi for shift constant.
23532 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
23533 (simplify_count_trailing_zeroes): Add test to handle known non-zero
23534 inputs more efficiently.
23536 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
23538 * config/i386/i386.md (*movsf_internal): Do not require
23539 SSE2 ISA for alternatives 14 and 15.
23541 2020-01-15 Richard Biener <rguenther@suse.de>
23543 PR middle-end/93273
23544 * tree-eh.c (sink_clobbers): If we already visited the destination
23545 block do not defer insertion.
23546 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
23547 the purpose of defered insertion.
23549 2020-01-15 Jakub Jelinek <jakub@redhat.com>
23551 * BASE-VER: Bump to 10.0.1.
23553 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
23555 PR tree-optimization/93247
23556 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
23557 type of the stmt that we're going to vectorize.
23559 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
23561 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
23562 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
23565 2020-01-15 Martin Liska <mliska@suse.cz>
23567 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
23568 2 calls of streamer_read_hwi in a function call.
23570 2020-01-15 Richard Biener <rguenther@suse.de>
23572 * alias.c (record_alias_subset): Avoid redundant work when
23573 subset is already recorded.
23575 2020-01-14 David Malcolm <dmalcolm@redhat.com>
23577 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
23578 the analyzer options provide CWE identifiers.
23580 2020-01-14 David Malcolm <dmalcolm@redhat.com>
23582 * tree-diagnostic-path.cc (path_summary::event_range::print):
23583 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
23584 using get_pure_location.
23586 2020-01-15 Jakub Jelinek <jakub@redhat.com>
23588 PR tree-optimization/93262
23589 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
23590 perform head trimming only if the last argument is constant,
23591 either all ones, or larger or equal to head trim, in the latter
23592 case decrease the last argument by head_trim.
23594 PR tree-optimization/93249
23595 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
23596 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
23597 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
23598 perform head trim unless we can prove there are no '\0' chars
23599 from the source among the first head_trim chars.
23601 2020-01-14 David Malcolm <dmalcolm@redhat.com>
23603 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
23605 2020-01-15 Jakub Jelinek <jakub@redhat.com>
23608 * config/i386/sse.md
23609 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
23610 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
23611 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
23612 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
23613 just a single alternative instead of two, make operands 1 and 2
23616 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
23619 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
23622 2020-01-14 David Malcolm <dmalcolm@redhat.com>
23624 * Makefile.in (lang_opt_files): Add analyzer.opt.
23625 (ANALYZER_OBJS): New.
23626 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
23627 tristate.o and ANALYZER_OBJS.
23628 (TEXI_GCCINT_FILES): Add analyzer.texi.
23629 * common.opt (-fanalyzer): New driver option.
23630 * config.in: Regenerate.
23631 * configure: Regenerate.
23632 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
23633 (gccdepdir): Also create depdir for "analyzer" subdir.
23634 * digraph.cc: New file.
23635 * digraph.h: New file.
23636 * doc/analyzer.texi: New file.
23637 * doc/gccint.texi ("Static Analyzer") New menu item.
23638 (analyzer.texi): Include it.
23639 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
23640 ("Warning Options"): Add static analysis warnings to the list.
23641 (-Wno-analyzer-double-fclose): New option.
23642 (-Wno-analyzer-double-free): New option.
23643 (-Wno-analyzer-exposure-through-output-file): New option.
23644 (-Wno-analyzer-file-leak): New option.
23645 (-Wno-analyzer-free-of-non-heap): New option.
23646 (-Wno-analyzer-malloc-leak): New option.
23647 (-Wno-analyzer-possible-null-argument): New option.
23648 (-Wno-analyzer-possible-null-dereference): New option.
23649 (-Wno-analyzer-null-argument): New option.
23650 (-Wno-analyzer-null-dereference): New option.
23651 (-Wno-analyzer-stale-setjmp-buffer): New option.
23652 (-Wno-analyzer-tainted-array-index): New option.
23653 (-Wno-analyzer-use-after-free): New option.
23654 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
23655 (-Wno-analyzer-use-of-uninitialized-value): New option.
23656 (-Wanalyzer-too-complex): New option.
23657 (-fanalyzer-call-summaries): New warning.
23658 (-fanalyzer-checker=): New warning.
23659 (-fanalyzer-fine-grained): New warning.
23660 (-fno-analyzer-state-merge): New warning.
23661 (-fno-analyzer-state-purge): New warning.
23662 (-fanalyzer-transitivity): New warning.
23663 (-fanalyzer-verbose-edges): New warning.
23664 (-fanalyzer-verbose-state-changes): New warning.
23665 (-fanalyzer-verbosity=): New warning.
23666 (-fdump-analyzer): New warning.
23667 (-fdump-analyzer-callgraph): New warning.
23668 (-fdump-analyzer-exploded-graph): New warning.
23669 (-fdump-analyzer-exploded-nodes): New warning.
23670 (-fdump-analyzer-exploded-nodes-2): New warning.
23671 (-fdump-analyzer-exploded-nodes-3): New warning.
23672 (-fdump-analyzer-supergraph): New warning.
23673 * doc/sourcebuild.texi (dg-require-dot): New.
23674 (dg-check-dot): New.
23675 * gdbinit.in (break-on-saved-diagnostic): New command.
23676 * graphviz.cc: New file.
23677 * graphviz.h: New file.
23678 * ordered-hash-map-tests.cc: New file.
23679 * ordered-hash-map.h: New file.
23680 * passes.def (pass_analyzer): Add before
23681 pass_ipa_whole_program_visibility.
23682 * selftest-run-tests.c (selftest::run_tests): Call
23683 selftest::ordered_hash_map_tests_cc_tests.
23684 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
23686 * shortest-paths.h: New file.
23687 * timevar.def (TV_ANALYZER): New timevar.
23688 (TV_ANALYZER_SUPERGRAPH): Likewise.
23689 (TV_ANALYZER_STATE_PURGE): Likewise.
23690 (TV_ANALYZER_PLAN): Likewise.
23691 (TV_ANALYZER_SCC): Likewise.
23692 (TV_ANALYZER_WORKLIST): Likewise.
23693 (TV_ANALYZER_DUMP): Likewise.
23694 (TV_ANALYZER_DIAGNOSTICS): Likewise.
23695 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
23696 * tree-pass.h (make_pass_analyzer): New decl.
23697 * tristate.cc: New file.
23698 * tristate.h: New file.
23700 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
23703 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
23704 alternatives 9 and 10.
23706 2020-01-14 David Malcolm <dmalcolm@redhat.com>
23708 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
23709 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
23710 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
23711 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
23712 (selftest::hash_map_tests_c_tests): Call it.
23713 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
23714 New static constant, using the value of = H::empty_zero_p.
23715 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
23716 from default_hash_traits <Value>.
23717 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
23719 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
23720 * hash-table.h (hash_table::alloc_entries): Guard the loop of
23721 calls to mark_empty with !Descriptor::empty_zero_p.
23722 (hash_table::empty_slow): Conditionalize the memset call with a
23723 check that Descriptor::empty_zero_p; otherwise, loop through the
23724 entries calling mark_empty on them.
23725 * hash-traits.h (int_hash::empty_zero_p): New static constant.
23726 (pointer_hash::empty_zero_p): Likewise.
23727 (pair_hash::empty_zero_p): Likewise.
23728 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
23730 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
23731 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
23732 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
23733 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
23734 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
23735 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
23736 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
23737 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
23738 * tree-vectorizer.h
23739 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
23742 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
23744 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
23745 fix typo on return value.
23747 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
23750 * cgraph.c (symbol_table::create_edge): Init speculative_id and
23752 (cgraph_edge::make_speculative): Add param for setting speculative_id
23754 (cgraph_edge::speculative_call_info): Update comments and find reference
23755 by speculative_id for multiple indirect targets.
23756 (cgraph_edge::resolve_speculation): Decrease the speculations
23757 for indirect edge, drop it's speculative if not direct target
23758 left. Update comments.
23759 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
23760 (cgraph_node::dump): Print num_speculative_call_targets.
23761 (cgraph_node::verify_node): Don't report error if speculative
23762 edge not include statement.
23763 (cgraph_edge::num_speculative_call_targets_p): New function.
23764 * cgraph.h (int common_target_id): Remove.
23765 (int common_target_probability): Remove.
23766 (num_speculative_call_targets): New variable.
23767 (make_speculative): Add param for setting speculative_id.
23768 (cgraph_edge::num_speculative_call_targets_p): New declare.
23769 (target_prob): New variable.
23770 (speculative_id): New variable.
23771 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
23772 call summaries for multiple speculative call targets.
23773 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
23774 * ipa-profile.c (struct speculative_call_target): New struct.
23775 (class speculative_call_summary): New class.
23776 (class speculative_call_summaries): New class.
23777 (call_sums): New variable.
23778 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
23779 (ipa_profile_write_edge_summary): New function.
23780 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
23781 (ipa_profile_dump_all_summaries): New function.
23782 (ipa_profile_read_edge_summary): New function.
23783 (ipa_profile_read_summary_section): New function.
23784 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
23785 (ipa_profile): Generate num_speculative_call_targets from
23787 * ipa-ref.h (speculative_id): New variable.
23788 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
23789 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
23790 common_target_probability. Stream out speculative_id and
23791 num_speculative_call_targets.
23792 (input_edge): Likewise.
23793 * predict.c (dump_prediction): Remove edges count assert to be
23795 * symtab.c (symtab_node::create_reference): Init speculative_id.
23796 (symtab_node::clone_references): Clone speculative_id.
23797 (symtab_node::clone_referring): Clone speculative_id.
23798 (symtab_node::clone_reference): Clone speculative_id.
23799 (symtab_node::clear_stmts_in_references): Clear speculative_id.
23800 * tree-inline.c (copy_bb): Duplicate all the speculative edges
23801 if indirect call contains multiple speculative targets.
23802 * value-prof.h (check_ic_target): Remove.
23803 * value-prof.c (gimple_value_profile_transformations):
23804 Use void function gimple_ic_transform.
23805 * value-prof.c (gimple_ic_transform): Handle topn case.
23806 Fix comment typos. Change it to a void function.
23808 2020-01-13 Andrew Pinski <apinski@marvell.com>
23810 * config/aarch64/aarch64-cores.def (octeontx2): New define.
23811 (octeontx2t98): New define.
23812 (octeontx2t96): New define.
23813 (octeontx2t93): New define.
23814 (octeontx2f95): New define.
23815 (octeontx2f95n): New define.
23816 (octeontx2f95mm): New define.
23817 * config/aarch64/aarch64-tune.md: Regenerate.
23818 * doc/invoke.texi (-mcpu=): Document the new cpu types.
23820 2020-01-13 Jason Merrill <jason@redhat.com>
23822 PR c++/33799 - destroy return value if local cleanup throws.
23823 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
23825 2020-01-13 Martin Liska <mliska@suse.cz>
23827 * ipa-cp.c (get_max_overall_size): Use newly
23828 renamed param param_ipa_cp_unit_growth.
23829 * params.opt: Remove legacy param name.
23831 2020-01-13 Martin Sebor <msebor@redhat.com>
23833 PR tree-optimization/93213
23834 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
23835 stores to be eliminated.
23837 2020-01-13 Martin Liska <mliska@suse.cz>
23839 * opts.c (print_help): Do not print CL_PARAM
23840 and CL_WARNING for CL_OPTIMIZATION.
23842 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
23845 * doc/invoke.texi (Warning Options): Add caveat about some warnings
23846 depending on optimization settings.
23848 2020-01-13 Jakub Jelinek <jakub@redhat.com>
23850 PR tree-optimization/90838
23851 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
23852 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
23853 argument rather than to initialize temporary for targets that
23854 don't use the mode argument at all. Initialize ctzval to avoid
23857 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
23859 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
23860 * tree-core.h: Document it.
23861 * gimplify.c (gimplify_omp_workshare): Set it.
23862 * omp-low.c (lower_omp_target): Use it.
23863 * tree-pretty-print.c (dump_omp_clause): Print it.
23865 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
23866 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
23868 2020-01-10 David Malcolm <dmalcolm@redhat.com>
23870 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
23871 * common.opt (fdiagnostics-path-format=): New option.
23872 (diagnostic_path_format): New enum.
23873 (fdiagnostics-show-path-depths): New option.
23874 * coretypes.h (diagnostic_event_id_t): New forward decl.
23875 * diagnostic-color.c (color_dict): Add "path".
23876 * diagnostic-event-id.h: New file.
23877 * diagnostic-format-json.cc (json_from_expanded_location): Make
23879 (json_end_diagnostic): Call context->make_json_for_path if it
23880 exists and the diagnostic has a path.
23881 (diagnostic_output_format_init): Clear context->print_path.
23882 * diagnostic-path.h: New file.
23883 * diagnostic-show-locus.c (colorizer::set_range): Special-case
23884 when printing a run of events in a diagnostic_path so that they
23885 all get the same color.
23886 (layout::m_diagnostic_path_p): New field.
23887 (layout::layout): Initialize it.
23888 (layout::print_any_labels): Don't colorize the label text for an
23889 event in a diagnostic_path.
23890 (gcc_rich_location::add_location_if_nearby): Add
23891 "restrict_to_current_line_spans" and "label" params. Pass the
23892 former to layout.maybe_add_location_range; pass the latter
23893 when calling add_range.
23894 * diagnostic.c: Include "diagnostic-path.h".
23895 (diagnostic_initialize): Initialize context->path_format and
23896 context->show_path_depths.
23897 (diagnostic_show_any_path): New function.
23898 (diagnostic_path::interprocedural_p): New function.
23899 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
23900 (simple_diagnostic_path::num_events): New function.
23901 (simple_diagnostic_path::get_event): New function.
23902 (simple_diagnostic_path::add_event): New function.
23903 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
23904 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
23905 (debug): New overload taking a diagnostic_path *.
23906 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
23907 * diagnostic.h (enum diagnostic_path_format): New enum.
23908 (json::value): New forward decl.
23909 (diagnostic_context::path_format): New field.
23910 (diagnostic_context::show_path_depths): New field.
23911 (diagnostic_context::print_path): New callback field.
23912 (diagnostic_context::make_json_for_path): New callback field.
23913 (diagnostic_show_any_path): New decl.
23914 (json_from_expanded_location): New decl.
23915 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
23916 (-fdiagnostics-show-path-depths): New option.
23917 (-fdiagnostics-color): Add "path" to description of default
23918 GCC_COLORS; describe it.
23919 (-fdiagnostics-format=json): Document how diagnostic paths are
23920 represented in the JSON output format.
23921 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
23922 Add optional params "restrict_to_current_line_spans" and "label".
23923 * opts.c (common_handle_option): Handle
23924 OPT_fdiagnostics_path_format_ and
23925 OPT_fdiagnostics_show_path_depths.
23926 * pretty-print.c: Include "diagnostic-event-id.h".
23927 (pp_format): Implement "%@" format code for printing
23928 diagnostic_event_id_t *.
23929 (selftest::test_pp_format): Add tests for "%@".
23930 * selftest-run-tests.c (selftest::run_tests): Call
23931 selftest::tree_diagnostic_path_cc_tests.
23932 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
23933 * toplev.c (general_init): Initialize global_dc->path_format and
23934 global_dc->show_path_depths.
23935 * tree-diagnostic-path.cc: New file.
23936 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
23937 non-static. Drop "diagnostic" param in favor of storing the
23938 original value of "where" and re-using it.
23939 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
23940 maybe_unwind_expanded_macro_loc.
23941 (tree_diagnostics_defaults): Initialize context->print_path and
23942 context->make_json_for_path.
23943 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
23945 (default_tree_make_json_for_path): New decl.
23946 (maybe_unwind_expanded_macro_loc): New decl.
23948 2020-01-10 Jakub Jelinek <jakub@redhat.com>
23950 PR tree-optimization/93210
23951 * fold-const.h (native_encode_initializer,
23952 can_native_interpret_type_p): Declare.
23953 * fold-const.c (native_encode_string): Fix up handling with off != -1,
23955 (native_encode_initializer): New function, moved from dwarf2out.c.
23956 Adjust to native_encode_expr compatible arguments, including dry-run
23957 and partial extraction modes. Don't handle STRING_CST.
23958 (can_native_interpret_type_p): No longer static.
23959 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
23960 offset / BITS_PER_UNIT fits into int and don't call it if
23961 can_native_interpret_type_p fails. If suboff is NULL and for
23962 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
23963 native_encode_initializer.
23964 (fold_const_aggregate_ref_1): Formatting fix.
23965 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
23966 (tree_add_const_value_attribute): Adjust caller.
23968 PR tree-optimization/90838
23969 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
23970 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
23971 CTZ_DEFINED_VALUE_AT_ZERO.
23973 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
23975 PR inline-asm/93027
23976 * lra-constraints.c (match_reload): Permit input operands have the
23977 same mode as output while other input operands have a different
23980 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
23982 PR tree-optimization/90838
23983 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
23984 (check_ctz_string): Likewise.
23985 (optimize_count_trailing_zeroes): Likewise.
23986 (simplify_count_trailing_zeroes): Likewise.
23987 (pass_forwprop::execute): Try ctz simplification.
23988 * match.pd: Add matching for ctz idioms.
23990 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23992 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
23994 (aarch64_invalid_unary_op): New function for target hook.
23995 (aarch64_invalid_binary_op): New function for target hook.
23997 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23999 * config.gcc: Add arm_bf16.h.
24000 * config/aarch64/aarch64-builtins.c
24001 (aarch64_simd_builtin_std_type): Add BFmode.
24002 (aarch64_init_simd_builtin_types): Define element types for vector
24004 (aarch64_init_bf16_types): New function.
24005 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
24006 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
24008 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
24009 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
24011 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
24012 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
24013 * config/aarch64/aarch64.c
24014 (aarch64_classify_vector_mode): Add support for BF types.
24015 (aarch64_gimplify_va_arg_expr): Add support for BF types.
24016 (aarch64_vq_mode): Add support for BF types.
24017 (aarch64_simd_container_mode): Add support for BF types.
24018 (aarch64_mangle_type): Add support for BF scalar type.
24019 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
24020 * config/aarch64/arm_bf16.h: New file.
24021 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
24022 * config/aarch64/iterators.md: Add BF types to mode attributes.
24023 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
24025 2020-01-10 Jason Merrill <jason@redhat.com>
24027 PR c++/93173 - incorrect tree sharing.
24028 * gimplify.c (copy_if_shared): No longer static.
24029 * gimplify.h: Declare it.
24031 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24033 * doc/invoke.texi (-msve-vector-bits=): Document that
24034 -msve-vector-bits=128 now generates VL-specific code for
24035 little-endian targets.
24036 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
24037 build_vector_type_for_mode to construct the data vector types.
24038 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
24039 VL-specific code for -msve-vector-bits=128 on little-endian targets.
24040 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
24041 for 128-bit vectors.
24043 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24045 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
24048 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24050 * config/aarch64/aarch64-builtins.c
24051 (aarch64_builtin_vectorized_function): Check for specific vector modes,
24052 rather than checking the number of elements and the element mode.
24054 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24056 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
24057 get_related_vectype_for_scalar_type rather than build_vector_type
24058 to create the index type for a conditional reduction.
24060 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24062 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
24063 for any type of gather or scatter, including strided accesses.
24065 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
24067 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
24070 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
24072 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
24073 get_dr_vinfo_offset
24074 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
24075 parameter and its use to reset DR_OFFSET's.
24076 (vect_transform_loop): Remove orig_drs_init argument.
24077 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
24078 member of dr_vec_info rather than the offset of the associated
24079 data_reference's innermost_loop_behavior.
24080 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
24081 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
24082 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
24083 get_dr_vinfo_offset.
24084 (vectorizable_store): Likewise.
24085 (vectorizable_load): Likewise.
24087 2020-01-10 Richard Biener <rguenther@suse.de>
24089 * gimple-ssa-store-merging
24090 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
24092 2020-01-10 Martin Liska <mliska@suse.cz>
24095 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
24096 encapsulation that was there before r280040.
24098 2020-01-10 Richard Biener <rguenther@suse.de>
24100 PR middle-end/93199
24101 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
24102 sequences to avoid walking them again for secondary opportunities.
24103 (pass_lower_eh_dispatch::execute): Instead actually insert
24106 2020-01-10 Richard Biener <rguenther@suse.de>
24108 PR middle-end/93199
24109 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
24110 (cleanup_all_empty_eh): Walk landing pads in reverse order to
24111 avoid quadraticness.
24113 2020-01-10 Martin Jambor <mjambor@suse.cz>
24115 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
24116 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
24117 to get param_ipa_sra_max_replacements.
24118 (param_splitting_across_edge): Pass the caller to
24119 pull_accesses_from_callee.
24121 2020-01-10 Martin Jambor <mjambor@suse.cz>
24123 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
24124 * ipa-cp.c (max_new_size): Removed.
24125 (orig_overall_size): New variable.
24126 (get_max_overall_size): New function.
24127 (estimate_local_effects): Use it. Adjust dump.
24128 (decide_about_value): Likewise.
24129 (ipcp_propagate_stage): Do not calculate max_new_size, just store
24130 orig_overall_size. Adjust dump.
24131 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
24133 2020-01-10 Martin Jambor <mjambor@suse.cz>
24135 * params.opt (param_ipa_max_agg_items): Mark as Optimization
24136 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
24137 instead of param_ipa_max_agg_items.
24138 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
24139 optimization info for the callee.
24141 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
24143 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
24144 markers if debug_inline_points is false.
24146 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24148 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
24150 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
24151 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
24152 aarch64-sve-builtins-sve2.h.
24153 (aarch64-sve-builtins-sve2.o): New rule.
24154 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
24155 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
24156 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
24157 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
24158 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
24159 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
24161 * config/aarch64/aarch64-sve.md: Update comments with SVE2
24162 instructions that are handled here.
24163 (@cond_asrd<mode>): Generalize to...
24164 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
24165 (*cond_asrd<mode>_2): Generalize to...
24166 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
24167 (*cond_asrd<mode>_z): Generalize to...
24168 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
24169 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
24170 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
24171 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
24172 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
24174 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
24175 (@aarch64_scatter_stnt<mode>): Likewise.
24176 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
24177 (@aarch64_mul_lane_<mode>): Likewise.
24178 (@aarch64_sve_suqadd<mode>_const): Likewise.
24179 (*<sur>h<addsub><mode>): Generalize to...
24180 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
24182 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
24183 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
24184 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
24185 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
24186 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
24187 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
24188 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
24189 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
24190 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
24191 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
24192 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
24193 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
24194 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
24195 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
24196 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
24197 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
24198 (@aarch64_sve2_xar<mode>): Likewise.
24199 (@aarch64_sve2_bcax<mode>): Likewise.
24200 (*aarch64_sve2_eor3<mode>): Rename to...
24201 (@aarch64_sve2_eor3<mode>): ...this.
24202 (@aarch64_sve2_bsl<mode>): New expander.
24203 (@aarch64_sve2_nbsl<mode>): Likewise.
24204 (@aarch64_sve2_bsl1n<mode>): Likewise.
24205 (@aarch64_sve2_bsl2n<mode>): Likewise.
24206 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
24207 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
24208 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
24209 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
24210 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
24211 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
24212 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
24213 (<su>mull<bt><Vwide>): Generalize to...
24214 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
24216 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
24217 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
24218 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
24219 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24220 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
24221 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24222 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
24223 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24224 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
24225 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24226 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
24227 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
24228 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
24229 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
24230 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
24231 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
24232 (<SHRNB:r>shrnb<mode>): Generalize to...
24233 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
24235 (<SHRNT:r>shrnt<mode>): Generalize to...
24236 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
24238 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
24239 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
24240 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
24241 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
24242 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
24243 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
24244 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
24245 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
24246 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
24247 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
24248 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
24249 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
24250 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
24251 (@aarch64_sve2_cvtnt<mode>): Likewise.
24252 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
24253 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
24254 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
24255 (@aarch64_sve2_cvtxnt<mode>): Likewise.
24256 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
24257 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
24258 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
24259 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
24260 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
24261 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
24262 (@aarch64_sve2_pmul<mode>): Likewise.
24263 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
24264 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
24265 (@aarch64_sve2_tbl2<mode>): Likewise.
24266 (@aarch64_sve2_tbx<mode>): Likewise.
24267 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
24268 (@aarch64_sve2_histcnt<mode>): Likewise.
24269 (@aarch64_sve2_histseg<mode>): Likewise.
24270 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
24271 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
24272 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
24273 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
24274 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
24275 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
24276 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
24277 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
24278 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
24279 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
24280 (SVE2_PMULL_PAIR_I): New mode iterators.
24281 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
24282 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
24283 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
24284 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
24285 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
24286 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
24287 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
24288 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
24289 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
24290 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
24291 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
24292 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
24293 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
24294 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
24295 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
24296 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
24297 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
24298 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
24299 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
24300 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
24301 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
24302 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
24303 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
24304 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
24305 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
24306 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
24307 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
24308 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
24309 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
24310 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
24311 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
24313 (VNARROW, Ventype): New mode attributes.
24314 (Vewtype): Handle VNx2DI. Fix typo in comment.
24315 (VDOUBLE): New mode attribute.
24316 (sve_lane_con): Handle VNx8HI.
24317 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
24318 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
24319 (sve_int_op, sve_int_op_rev): Handle the above codes.
24320 (sve_pred_int_rhs2_operand): Likewise.
24321 (MULLBT, SHRNB, SHRNT): Delete.
24322 (SVE_INT_SHIFT_IMM): New int iterator.
24323 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
24324 and UNSPEC_WHILEHS for TARGET_SVE2.
24325 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
24326 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
24327 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
24328 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
24329 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
24330 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
24331 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
24332 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
24333 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
24334 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
24335 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
24336 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
24337 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
24338 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
24339 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
24340 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
24341 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
24342 (optab): Handle the new unspecs.
24343 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
24345 (lr): Handle the new unspecs.
24347 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
24348 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
24349 (sve_int_qsub_op): New int attributes.
24350 (sve_fp_op, rot): Handle the new unspecs.
24351 * config/aarch64/aarch64-sve-builtins.h
24352 (function_resolver::require_matching_pointer_type): Declare.
24353 (function_resolver::resolve_unary): Add an optional boolean argument.
24354 (function_resolver::finish_opt_n_resolution): Add an optional
24355 type_suffix_index argument.
24356 (gimple_folder::redirect_call): Declare.
24357 (gimple_expander::prepare_gather_address_operands): Add an optional
24359 * config/aarch64/aarch64-sve-builtins.cc: Include
24360 aarch64-sve-builtins-sve2.h.
24361 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
24362 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
24363 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
24364 (TYPES_hsd_integer): Use TYPES_hsd_signed.
24365 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
24366 (TYPES_s_unsigned): Likewise.
24367 (TYPES_s_integer): Use TYPES_s_unsigned.
24368 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
24369 (TYPES_sd_integer): Use them.
24370 (TYPES_d_unsigned): New macro.
24371 (TYPES_d_integer): Use it.
24372 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
24373 (TYPES_cvt_narrow): Likewise.
24374 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
24375 (preds_mx): New variable.
24376 (function_builder::add_overloaded_function): Allow the new feature
24377 set to be more restrictive than the original one.
24378 (function_resolver::infer_pointer_type): Remove qualifiers from
24379 the pointer type before printing it.
24380 (function_resolver::require_matching_pointer_type): New function.
24381 (function_resolver::resolve_sv_displacement): Handle functions
24382 that don't support 32-bit vector indices or svint32_t vector offsets.
24383 (function_resolver::finish_opt_n_resolution): Take the inferred type
24384 as a separate argument.
24385 (function_resolver::resolve_unary): Optionally treat all forms in
24386 the same way as normal merging functions.
24387 (gimple_folder::redirect_call): New function.
24388 (function_expander::prepare_gather_address_operands): Add an argument
24389 that says whether scaled forms are available. If they aren't,
24390 handle scaling of vector indices and don't add the extension and
24392 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
24393 fall back to using cond_* instead.
24394 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
24395 Split out the member variables into...
24396 (rtx_code_function_base): ...this new base class.
24397 (rtx_code_function_rotated): Inherit rtx_code_function_base.
24398 (unspec_based_function): Split out the member variables into...
24399 (unspec_based_function_base): ...this new base class.
24400 (unspec_based_function_rotated): Inherit unspec_based_function_base.
24401 (unspec_based_function_exact_insn): New class.
24402 (unspec_based_add_function, unspec_based_add_lane_function)
24403 (unspec_based_lane_function, unspec_based_pred_function)
24404 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
24405 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
24406 (unspec_based_sub_function, unspec_based_sub_lane_function): New
24408 (unspec_based_fused_function): New class.
24409 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
24410 (unspec_based_fused_lane_function): New class.
24411 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
24413 (CODE_FOR_MODE1): New macro.
24414 (fixed_insn_function): New class.
24415 (while_comparison): Likewise.
24416 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
24417 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
24418 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
24419 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
24420 (load_gather_sv_restricted, shift_left_imm_long): Declare.
24421 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
24422 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
24423 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
24424 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
24425 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
24426 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
24427 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
24428 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
24429 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
24430 Also add an initial argument for unary_convert_narrowt, regardless
24431 of the predication type.
24432 (build_32_64): Allow loads and stores to specify MODE_none.
24433 (build_sv_index64, build_sv_uint_offset): New functions.
24434 (long_type_suffix): New function.
24435 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
24436 (binary_imm_long_base, load_gather_sv_base): Likewise.
24437 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
24438 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
24439 (unary_narrowb_base, unary_narrowt_base): Likewise.
24440 (binary_long_lane_def, binary_long_lane): New shape.
24441 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
24442 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
24443 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
24444 (binary_to_uint_def, binary_to_uint): Likewise.
24445 (binary_wide_def, binary_wide): Likewise.
24446 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
24447 (compare_def, compare): Likewise.
24448 (compare_ptr_def, compare_ptr): Likewise.
24449 (load_ext_gather_index_restricted_def,
24450 load_ext_gather_index_restricted): Likewise.
24451 (load_ext_gather_offset_restricted_def,
24452 load_ext_gather_offset_restricted): Likewise.
24453 (load_gather_sv_def): Inherit from load_gather_sv_base.
24454 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
24455 (shift_left_imm_def, shift_left_imm): Likewise.
24456 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
24457 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
24458 (store_scatter_index_restricted_def,
24459 store_scatter_index_restricted): Likewise.
24460 (store_scatter_offset_restricted_def,
24461 store_scatter_offset_restricted): Likewise.
24462 (tbl_tuple_def, tbl_tuple): Likewise.
24463 (ternary_long_lane_def, ternary_long_lane): Likewise.
24464 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
24465 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
24466 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
24467 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
24468 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
24469 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
24470 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
24471 (ternary_uint_def, ternary_uint): Likewise.
24472 (unary_convert): Fix typo in comment.
24473 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
24474 (unary_long_def, unary_long): Likewise.
24475 (unary_narrowb_def, unary_narrowb): Likewise.
24476 (unary_narrowt_def, unary_narrowt): Likewise.
24477 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
24478 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
24479 (unary_to_int_def, unary_to_int): Likewise.
24480 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
24481 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
24482 (svasrd_impl): Delete.
24483 (svcadd_impl::expand): Handle integer operations too.
24484 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
24485 new functions to derive the unspec numbers.
24486 (svmla_svmls_lane_impl): Replace with...
24487 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
24488 integer operations too.
24489 (svwhile_impl): Rename to...
24490 (svwhilelx_impl): ...this and inherit from while_comparison.
24491 (svasrd): Use unspec_based_function.
24492 (svmla_lane): Use svmla_lane_impl.
24493 (svmls_lane): Use svmls_lane_impl.
24494 (svrecpe, svrsqrte): Handle unsigned integer operations too.
24495 (svwhilele, svwhilelt): Use svwhilelx_impl.
24496 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
24497 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
24498 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
24499 * config/aarch64/aarch64-sve-builtins.def: Include
24500 aarch64-sve-builtins-sve2.def.
24502 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24504 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
24505 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
24506 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
24507 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
24508 immediates as well as vector ones.
24509 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
24510 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
24511 (aarch64_sve_qsub_immediate): Update calls accordingly.
24513 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24515 * config/aarch64/aarch64-sve2.md: Add banner comments.
24516 (<su>mulh<r>s<mode>3): Move further up file.
24517 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
24518 (*aarch64_sve2_sra<mode>): Move further down file.
24519 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
24521 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24523 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
24524 and UNSPEC_WHILEWR.
24525 (while_optab_cmp): Handle them.
24526 * config/aarch64/aarch64-sve.md
24527 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
24528 and add a "@" marker.
24529 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
24530 instead of gen_aarch64_sve2_while_ptest.
24531 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
24533 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24535 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
24536 (UNSPEC_WHILELE): ...this.
24537 (UNSPEC_WHILE_LO): Rename to...
24538 (UNSPEC_WHILELO): ...this.
24539 (UNSPEC_WHILE_LS): Rename to...
24540 (UNSPEC_WHILELS): ...this.
24541 (UNSPEC_WHILE_LT): Rename to...
24542 (UNSPEC_WHILELT): ...this.
24543 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
24544 (cmp_op, while_optab_cmp): Likewise.
24545 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
24546 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
24547 (svwhilelt): Likewise.
24549 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24551 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
24552 (unary_to_uint): Define.
24553 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
24554 (unary_count): Rename to...
24555 (unary_to_uint_def, unary_to_uint): ...this.
24556 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
24558 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24560 * config/aarch64/aarch64-sve-builtins-functions.h
24561 (code_for_mode_function): New class.
24562 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
24563 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
24564 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
24565 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
24566 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
24568 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24570 * config/aarch64/iterators.md (addsub): New code attribute.
24571 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
24573 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
24574 in the asm string and attributes. Fix indentation.
24575 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
24577 (@aarch64_sve_<optab><mode>): ...this.
24578 * config/aarch64/aarch64-sve-builtins.h
24579 (function_expander::expand_signed_unpred_op): Delete.
24580 * config/aarch64/aarch64-sve-builtins.cc
24581 (function_expander::expand_signed_unpred_op): Likewise.
24582 (function_expander::map_to_rtx_codes): If the optab isn't defined,
24583 try using code_for_aarch64_sve instead.
24584 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
24585 (svqsub_impl): Likewise.
24586 (svqadd, svqsub): Use rtx_code_function instead.
24588 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24590 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
24591 (HADDSUB, sur, addsub): Remove them.
24593 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24595 * tree-nrv.c (pass_return_slot::execute): Handle all internal
24596 functions the same way, rather than singling out those that
24597 aren't mapped directly to optabs.
24599 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24601 * target.def (compatible_vector_types_p): New target hook.
24602 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
24603 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
24604 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
24605 * doc/tm.texi: Regenerate.
24606 * gimple-expr.c: Include target.h.
24607 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
24608 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
24610 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
24611 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
24612 Use the original predicate if it already has a suitable type.
24614 2020-01-09 Martin Jambor <mjambor@suse.cz>
24616 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
24617 resolve_speculation and redirect_call_stmt_to_callee static. Change
24618 return type of set_call_stmt to cgraph_edge *.
24619 * auto-profile.c (afdo_indirect_call): Adjust call to
24620 redirect_call_stmt_to_callee.
24621 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
24622 make the this pointer explicit, adjust self-recursive calls and the
24623 call top make_direct. Return the resulting edge.
24624 (cgraph_edge::remove): Make this pointer explicit.
24625 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
24626 (cgraph_edge::make_direct): Likewise, adjust call to
24627 resolve_speculation.
24628 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
24629 call to set_call_stmt.
24630 (cgraph_update_edges_for_call_stmt_node): Update call to
24631 set_call_stmt and remove.
24632 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
24633 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
24634 (cgraph_node::create_edge_including_clones): Moved "first" definition
24635 of edge to the block where it was used. Adjusted calls to
24637 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
24638 cgraph_edge::remove.
24639 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
24640 make_direct and redirect_call_stmt_to_callee.
24641 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
24642 resolve_speculation and make_direct.
24643 * ipa-inline-transform.c (inline_transform): Adjust call to
24644 redirect_call_stmt_to_callee.
24645 (check_speculations_1):: Adjust call to resolve_speculation.
24646 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
24647 resolve-speculation.
24648 (inline_small_functions): Adjust call to resolve_speculation.
24649 (ipa_inline): Likewise.
24650 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
24652 * ipa-visibility.c (function_and_variable_visibility): Make iteration
24653 safe with regards to edge removal, adjust calls to
24654 redirect_call_stmt_to_callee.
24655 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
24656 and redirect_call_stmt_to_callee.
24657 * multiple_target.c (create_dispatcher_calls): Adjust call to
24658 redirect_call_stmt_to_callee
24659 (redirect_to_specific_clone): Likewise.
24660 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
24661 Adjust calls to cgraph_edge::remove.
24662 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
24663 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
24664 (expand_call_inline): Adjust call to cgraph_edge::remove.
24666 2020-01-09 Martin Liska <mliska@suse.cz>
24668 * params.opt: Set Optimization for
24669 param_max_speculative_devirt_maydefs.
24671 2020-01-09 Martin Sebor <msebor@redhat.com>
24673 PR middle-end/93200
24675 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
24677 2020-01-09 Martin Liska <mliska@suse.cz>
24679 * auto-profile.c (auto_profile): Use opt_for_fn
24681 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
24682 (propagate_vals_across_arith_jfunc): Likewise.
24683 (hint_time_bonus): Likewise.
24684 (incorporate_penalties): Likewise.
24685 (good_cloning_opportunity_p): Likewise.
24686 (perform_estimation_of_a_value): Likewise.
24687 (estimate_local_effects): Likewise.
24688 (ipcp_propagate_stage): Likewise.
24689 * ipa-fnsummary.c (decompose_param_expr): Likewise.
24690 (set_switch_stmt_execution_predicate): Likewise.
24691 (analyze_function_body): Likewise.
24692 * ipa-inline-analysis.c (offline_size): Likewise.
24693 * ipa-inline.c (early_inliner): Likewise.
24694 * ipa-prop.c (ipa_analyze_node): Likewise.
24695 (ipcp_transform_function): Likewise.
24696 * ipa-sra.c (process_scan_results): Likewise.
24697 (ipa_sra_summarize_function): Likewise.
24698 * params.opt: Rename ipcp-unit-growth to
24699 ipa-cp-unit-growth. Add Optimization for various
24700 IPA-related parameters.
24702 2020-01-09 Richard Biener <rguenther@suse.de>
24704 PR middle-end/93054
24705 * gimplify.c (gimplify_expr): Deal with NOP definitions.
24707 2020-01-09 Richard Biener <rguenther@suse.de>
24709 PR tree-optimization/93040
24710 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
24712 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
24714 * common/config/avr/avr-common.c (avr_option_optimization_table)
24715 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
24717 2020-01-09 Martin Liska <mliska@suse.cz>
24719 * cgraphclones.c (symbol_table::materialize_all_clones):
24720 Use cgraph_node::dump_name.
24722 2020-01-09 Jakub Jelinek <jakub@redhat.com>
24724 PR inline-asm/93202
24725 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
24726 output_operand_lossage instead of gcc_unreachable.
24727 * doc/md.texi (riscv f constraint): Fix typo.
24730 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
24731 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
24732 CONST_SCALAR_INT_P instead of CONST_INT_P.
24733 (*subv<mode>4_1): Rename to ...
24734 (subv<mode>4_1): ... this.
24735 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
24736 define_insn_and_split patterns.
24737 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
24740 2020-01-08 David Malcolm <dmalcolm@redhat.com>
24742 * vec.c (class selftest::count_dtor): New class.
24743 (selftest::test_auto_delete_vec): New test.
24744 (selftest::vec_c_tests): Call it.
24745 * vec.h (class auto_delete_vec): New class template.
24746 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
24748 2020-01-08 David Malcolm <dmalcolm@redhat.com>
24750 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
24752 2020-01-08 Jim Wilson <jimw@sifive.com>
24754 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
24755 use of TLS_MODEL_LOCAL_EXEC when not pic.
24757 2020-01-08 David Malcolm <dmalcolm@redhat.com>
24759 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
24762 2020-01-08 Jakub Jelinek <jakub@redhat.com>
24765 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
24766 *stack_protect_set_3 peephole2): Also check that the second
24767 insns source is general_operand.
24770 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
24771 predicate for output operand instead of register_operand.
24772 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
24773 memory destination and non-memory operands[2].
24775 2020-01-08 Martin Liska <mliska@suse.cz>
24777 * cgraph.c (cgraph_node::dump): Use ::dump_name or
24778 ::dump_asm_name instead of (::name or ::asm_name).
24779 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
24780 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
24781 (analyze_functions): Likewise.
24782 (expand_all_functions): Likewise.
24783 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
24784 (propagate_bits_across_jump_function): Likewise.
24785 (dump_profile_updates): Likewise.
24786 (ipcp_store_bits_results): Likewise.
24787 (ipcp_store_vr_results): Likewise.
24788 * ipa-devirt.c (dump_targets): Likewise.
24789 * ipa-fnsummary.c (analyze_function_body): Likewise.
24790 * ipa-hsa.c (check_warn_node_versionable): Likewise.
24791 (process_hsa_functions): Likewise.
24792 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
24793 (set_alias_uids): Likewise.
24794 * ipa-inline-transform.c (save_inline_function_body): Likewise.
24795 * ipa-inline.c (recursive_inlining): Likewise.
24796 (inline_to_all_callers_1): Likewise.
24797 (ipa_inline): Likewise.
24798 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
24799 (ipa_propagate_frequency): Likewise.
24800 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
24801 (remove_described_reference): Likewise.
24802 * ipa-pure-const.c (worse_state): Likewise.
24803 (check_retval_uses): Likewise.
24804 (analyze_function): Likewise.
24805 (propagate_pure_const): Likewise.
24806 (propagate_nothrow): Likewise.
24807 (dump_malloc_lattice): Likewise.
24808 (propagate_malloc): Likewise.
24809 (pass_local_pure_const::execute): Likewise.
24810 * ipa-visibility.c (optimize_weakref): Likewise.
24811 (function_and_variable_visibility): Likewise.
24812 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
24813 (ipa_discover_variable_flags): Likewise.
24814 * lto-streamer-out.c (output_function): Likewise.
24815 (output_constructor): Likewise.
24816 * tree-inline.c (copy_bb): Likewise.
24817 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
24818 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
24820 2020-01-08 Richard Biener <rguenther@suse.de>
24822 PR middle-end/93199
24823 * tree-eh.c (sink_clobbers): Update virtual operands for
24824 the first and last stmt only. Add a dry-run capability.
24825 (pass_lower_eh_dispatch::execute): Perform clobber sinking
24826 after CFG manipulations and in RPO order to catch all
24827 secondary opportunities reliably.
24829 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
24832 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
24834 2019-01-08 Richard Biener <rguenther@suse.de>
24836 PR middle-end/93199
24837 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
24838 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
24839 virtual operand, also updating SSA use.
24840 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
24841 Update stmt after resetting virtual operand.
24842 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
24843 * gimple-iterator.c (gsi_remove): When not removing the stmt
24844 permanently do not delink immediate uses or mark the stmt modified.
24846 2020-01-08 Martin Liska <mliska@suse.cz>
24848 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
24849 (ipa_call_context::estimate_size_and_time): Likewise.
24850 (inline_analyze_function): Likewise.
24852 2020-01-08 Martin Liska <mliska@suse.cz>
24854 * cgraph.c (cgraph_node::dump): Use systematically
24857 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
24859 Add -nodevicespecs option for avr.
24862 * config/avr/avr.opt (-nodevicespecs): New driver option.
24863 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
24864 "-specs=device-specs/..." if that option is not set.
24865 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
24867 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
24869 Implement 64-bit double functions for avr.
24872 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
24873 --with-double-comparison.
24874 * doc/install.texi: Document them.
24875 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
24876 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
24877 <WITH_DOUBLE_COMPARISON>: New built-in defines.
24878 * doc/invoke.texi (AVR Built-in Macros): Document them.
24879 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
24880 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
24881 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
24883 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
24886 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
24887 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
24888 when only building rm-profile multilibs.
24890 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
24893 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
24894 lattice for a value to check.
24895 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
24896 finite propagation in self-recursive scc.
24898 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
24900 * ipa-inline.c (caller_growth_limits): Restore the AND.
24902 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
24904 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
24905 (VEC_ALLREG_ALT): New iterator.
24906 (VEC_ALLREG_INT_MODE): New iterator.
24907 (VCMP_MODE): New iterator.
24908 (VCMP_MODE_INT): New iterator.
24909 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
24910 (vec_cmp<u>v64qidi): New define_expand.
24911 (vec_cmp<mode>di_exec): Use VCMP_MODE.
24912 (vec_cmpu<mode>di_exec): New define_expand.
24913 (vec_cmp<u>v64qidi_exec): New define_expand.
24914 (vec_cmp<mode>di_dup): Use VCMP_MODE.
24915 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
24916 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
24917 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
24918 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
24919 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
24920 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
24921 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
24922 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
24923 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
24925 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
24926 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
24928 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
24930 * config/gcn/constraints.md (DA): Update description and match.
24932 (Db): New constraint.
24933 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
24935 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
24936 Implement 'Db' mixed immediate type.
24937 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
24938 (addcv64si3_dup<exec_vcc>): Delete.
24939 (subcv64si3<exec_vcc>): Rework constraints.
24940 (addv64di3): Rework constraints.
24941 (addv64di3_exec): Rework constraints.
24942 (subv64di3): Rework constraints.
24943 (addv64di3_dup): Delete.
24944 (addv64di3_dup_exec): Delete.
24945 (addv64di3_zext): Rework constraints.
24946 (addv64di3_zext_exec): Rework constraints.
24947 (addv64di3_zext_dup): Rework constraints.
24948 (addv64di3_zext_dup_exec): Rework constraints.
24949 (addv64di3_zext_dup2): Rework constraints.
24950 (addv64di3_zext_dup2_exec): Rework constraints.
24951 (addv64di3_sext_dup2): Rework constraints.
24952 (addv64di3_sext_dup2_exec): Rework constraints.
24954 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
24956 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
24957 existing target checks.
24959 2020-01-07 Richard Biener <rguenther@suse.de>
24961 * doc/install.texi: Bump minimal supported MPC version.
24963 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
24965 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
24966 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
24967 * langhooks.c: Include stor-layout.h.
24968 (lhd_simulate_enum_decl): New function.
24969 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
24970 handle_arm_sve_h for the LTO frontend.
24971 (register_vector_type): Cope with null returns from pushdecl.
24973 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
24975 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
24976 (aarch64_sve::nvectors_if_data_type): Replace with...
24977 (aarch64_sve::builtin_type_p): ...this.
24978 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
24979 (find_vector_type): Delete.
24980 (add_sve_type_attribute): New function.
24981 (lookup_sve_type_attribute): Likewise.
24982 (register_builtin_types): Add an "SVE type" attribute to each type.
24983 (register_tuple_type): Likewise.
24984 (svbool_type_p, nvectors_if_data_type): Delete.
24985 (mangle_builtin_type): Use lookup_sve_type_attribute.
24986 (builtin_type_p): Likewise. Add an overload that returns the
24987 number of constituent vector and predicate registers.
24988 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
24989 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
24990 instead of aarch64_sve_argument_p.
24991 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
24992 (aarch64_pass_by_reference): Likewise.
24993 (aarch64_function_value_1): Likewise.
24994 (aarch64_return_in_memory): Likewise.
24995 (aarch64_layout_arg): Likewise.
24997 2020-01-07 Jakub Jelinek <jakub@redhat.com>
24999 PR tree-optimization/93156
25000 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
25001 least significant bit is always clear.
25003 PR tree-optimization/93118
25004 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
25005 simplifier with two intermediate conversions.
25007 2020-01-07 Martin Liska <mliska@suse.cz>
25009 * params.opt: Add Optimization for various parameters.
25011 2020-01-07 Martin Liska <mliska@suse.cz>
25014 * doc/extend.texi: Explain cloning for target_clone
25017 2020-01-07 Martin Liska <mliska@suse.cz>
25019 PR tree-optimization/92860
25020 * common.opt: Make in Optimization option
25021 as it is affected by -O0, which is an Optimization
25023 * tree-inline.c (tree_inlinable_function_p):
25024 Use opt_for_fn for warn_inline.
25025 (expand_call_inline): Likewise.
25027 2020-01-07 Martin Liska <mliska@suse.cz>
25029 PR tree-optimization/92860
25030 * common.opt: Make flag_ree as optimization
25033 2020-01-07 Martin Liska <mliska@suse.cz>
25035 PR optimization/92860
25036 * params.opt: Mark param_min_crossjump_insns with Optimization
25039 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
25041 * ipa-inline-analysis.c (estimate_growth): Fix typo.
25042 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
25044 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
25046 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
25047 helper function to return the valid addressing formats for a given
25048 hard register and mode.
25049 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
25051 * config/rs6000/constraints.md (Q constraint): Update
25053 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
25056 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
25057 Use 'Q' for doing vector extract from memory.
25058 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
25060 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
25061 doing vector extract from memory.
25062 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
25063 extract from memory.
25065 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
25066 for the offset being 34-bits when -mcpu=future is used.
25068 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
25070 * config/pa/pa.md: Revert change to use ordered_comparison_operator
25071 instead of cmpib_comparison_operator in cmpib patterns.
25072 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
25073 of cmpib_comparison_operator. Revise comment.
25075 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25077 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
25078 in an IFN_DIV_POW2 node to be equal.
25080 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25082 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
25083 (vect_check_scalar_mask): ...this.
25084 (vectorizable_store, vectorizable_load): Update call accordingly.
25085 (vectorizable_call): Use vect_check_scalar_mask to check the mask
25086 argument in calls to conditional internal functions.
25088 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
25090 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
25091 '0' matching inputs.
25092 (subv64di3_exec): Likewise.
25094 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
25096 * config/mips/mips.c (vr4130_align_insns): Fix typo.
25097 * doc/md.texi (movstr): Likewise.
25099 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
25101 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
25104 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25106 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
25108 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
25109 to a temporary file and use move-if-change to update the real
25110 file where necessary.
25112 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25114 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
25115 rather than Upa for CPY /M.
25117 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
25119 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
25122 2020-01-06 Martin Liska <mliska@suse.cz>
25124 PR tree-optimization/92860
25125 * params.opt: Mark param_max_combine_insns with Optimization
25128 2020-01-05 Jakub Jelinek <jakub@redhat.com>
25131 * config/i386/i386.md (SWIDWI): New mode iterator.
25132 (DWI, dwi): Add TImode variants.
25133 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
25134 <general_hilo_operand> instead of <general_operand>. Use
25135 CONST_SCALAR_INT_P instead of CONST_INT_P.
25136 (*addv<mode>4_1): Rename to ...
25137 (addv<mode>4_1): ... this.
25138 (QWI): New mode attribute.
25139 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
25140 define_insn_and_split patterns.
25141 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
25143 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
25144 <general_hilo_operand> instead of <general_operand>.
25145 (*addcarry<mode>_1): New define_insn.
25146 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
25148 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
25150 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
25151 Use "call" instead of "set".
25153 2020-01-03 Martin Jambor <mjambor@suse.cz>
25156 * ipa-cp.c (print_all_lattices): Skip functions without info.
25158 2020-01-03 Jakub Jelinek <jakub@redhat.com>
25161 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
25162 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
25163 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
25164 for 'e' simd clones.
25167 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
25169 (mprefer-vector-width=): Add Save.
25170 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
25171 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
25172 (ix86_debug_options, ix86_function_specific_print): Adjust
25173 ix86_target_string callers.
25174 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
25175 (ix86_valid_target_attribute_tree): Likewise.
25176 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
25177 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
25178 ix86_target_string caller.
25181 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
25182 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
25183 instead of gen_int_shift_amount + convert_modes.
25185 PR rtl-optimization/93088
25186 * loop-iv.c (find_single_def_src): Punt after looking through
25187 128 reg copies for regs with single definitions. Move definitions
25190 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
25192 * config/arm/arm-c.c (arm_cpu_builtins): Define
25193 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
25194 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
25195 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
25196 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
25197 * config/arm/arm-tables.opt: Regenerated.
25198 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
25199 arm_arch_i8mm and arm_arch_bf16 when enabled.
25200 * config/arm/arm.h (TARGET_I8MM): New macro.
25201 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
25202 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
25203 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
25204 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
25205 (v8_6_a_simd_variants): New.
25206 (v8_*_a_simd_variants): Add i8mm and bf16.
25207 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
25209 2020-01-02 Jakub Jelinek <jakub@redhat.com>
25212 * predict.c (compute_function_frequency): Don't call
25213 warn_function_cold on functions that already have cold attribute.
25215 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
25218 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
25219 COMDAT group function labels in .data.rel.ro.local section.
25220 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
25223 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
25224 comparison_operator in B and S integer comparisons. Likewise, use
25225 ordered_comparison_operator instead of cmpib_comparison_operator in
25227 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
25229 2020-01-01 Jakub Jelinek <jakub@redhat.com>
25231 Update copyright years.
25233 * gcc.c (process_command): Update copyright notice dates.
25234 * gcov-dump.c (print_version): Ditto.
25235 * gcov.c (print_version): Ditto.
25236 * gcov-tool.c (print_version): Ditto.
25237 * gengtype.c (create_file): Ditto.
25238 * doc/cpp.texi: Bump @copying's copyright year.
25239 * doc/cppinternals.texi: Ditto.
25240 * doc/gcc.texi: Ditto.
25241 * doc/gccint.texi: Ditto.
25242 * doc/gcov.texi: Ditto.
25243 * doc/install.texi: Ditto.
25244 * doc/invoke.texi: Ditto.
25246 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
25248 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
25251 2020-01-01 Jakub Jelinek <jakub@redhat.com>
25253 PR tree-optimization/93098
25254 * match.pd (popcount): For shift amounts, use integer_onep
25255 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
25256 tests. Make sure that precision is power of two larger than or equal
25257 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
25258 instead of ULL suffixed constants. Formatting fixes.
25260 Copyright (C) 2020 Free Software Foundation, Inc.
25262 Copying and distribution of this file, with or without modification,
25263 are permitted in any medium without royalty provided the copyright
25264 notice and this notice are preserved.