1 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
3 * doc/extend.texi: Change references to "future architecture" to
4 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
5 references to "future" (because the future is now).
7 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
9 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
11 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
13 * simplify-rtx.c (simplify_distributive_operation): New function
14 to un-distribute a binary operation of two binary operations.
15 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
16 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
18 (test_scalar_int_ops): New function for unit self-testing
19 scalar integer transformations in simplify-rtx.c.
20 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
21 (simplify_rtx_c_tests): Call test_scalar_ops.
23 2020-06-29 Richard Biener <rguenther@suse.de>
25 PR tree-optimization/95916
26 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
27 the case of not vectorized externals.
29 2020-06-29 Richard Biener <rguenther@suse.de>
31 * tree-vectorizer.h: Do not include <utility>.
33 2020-06-29 Martin Liska <mliska@suse.cz>
35 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
36 instead of gimple_stmt_iterator::bb.
37 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
38 * tree-vectorizer.h: Likewise.
40 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
42 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
43 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
44 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
45 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
46 (gcn_dwarf_register_number): New function.
47 (gcn_dwarf_register_span): New function.
48 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
50 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
52 PR tree-optimization/95854
53 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
54 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
55 unsigned HOST_WIDE_INT.
57 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
59 * config/sparc/sparc.c (epilogue_renumber): Remove register.
60 (sparc_print_operand_address): Likewise.
61 (sparc_type_code): Likewise.
62 (set_extends): Likewise.
64 2020-06-29 Martin Liska <mliska@suse.cz>
66 PR tree-optimization/92860
67 * optc-save-gen.awk: Add exceptions for arc target.
69 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
71 * doc/sourcebuild.texi: Describe globbing of the
72 dump file scanning commands "suffix" argument.
74 2020-06-28 Martin Sebor <msebor@redhat.com>
77 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
79 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
81 * tree.c (get_nonnull_args): Consider the this pointer implicitly
83 * var-tracking.c (deps_vec): New type.
84 (var_loc_dep_vec): New function.
85 (VAR_LOC_DEP_VEC): Use it.
87 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
89 * internal-fn.c (direct_mask_load_optab_supported_p): Use
90 convert_optab_supported_p instead of direct_optab_supported_p.
91 (direct_mask_store_optab_supported_p): Likewise.
93 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
95 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
96 simplify_using_ranges class.
97 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
98 field. Adjust all methods to use new field.
99 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
100 simplify_using_ranges class.
101 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
102 field. Adjust all methods to use new field.
103 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
104 (vrp_prop::vrp_finalize): New vrp_folder argument.
105 (execute_vrp): Pass folder to vrp_finalize. Use
106 simplify_using_ranges class.
107 Remove cleanup_edges_and_switches call.
108 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
109 value_range_equiv uses to value_range.
110 (simplify_using_ranges::op_with_boolean_value_range_p): Use
111 simplify_using_ranges class.
112 (check_for_binary_op_overflow): Make static.
113 (vr_values::extract_range_basic): Pass this to
114 check_for_binary_op_overflow.
115 (compare_range_with_value): Change value_range_equiv uses to
117 (vr_values::vr_values): Initialize simplifier field.
118 Remove uses of to_remove_edges and to_update_switch_stmts.
119 (vr_values::~vr_values): Remove uses of to_remove_edges and
120 to_update_switch_stmts.
121 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
123 (vr_values::compare_name_with_value): Same.
124 (vr_values::compare_names): Same.
125 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
126 (vr_values::vrp_evaluate_conditional): Same.
127 (vr_values::vrp_visit_cond_stmt): Same.
128 (find_case_label_ranges): Change value_range_equiv uses to
130 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
131 (vr_values::simplify_truth_ops_using_ranges): Move to
132 simplify_using_ranges class.
133 (vr_values::simplify_div_or_mod_using_ranges): Same.
134 (vr_values::simplify_min_or_max_using_ranges): Same.
135 (vr_values::simplify_abs_using_ranges): Same.
136 (vr_values::simplify_bit_ops_using_ranges): Same.
137 (test_for_singularity): Change value_range_equiv uses to
139 (range_fits_type_p): Same.
140 (vr_values::simplify_cond_using_ranges_1): Same.
141 (vr_values::simplify_cond_using_ranges_2): Make extern.
142 (vr_values::fold_cond): Move to simplify_using_ranges class.
143 (vr_values::simplify_switch_using_ranges): Same.
144 (vr_values::cleanup_edges_and_switches): Same.
145 (vr_values::simplify_float_conversion_using_ranges): Same.
146 (vr_values::simplify_internal_call_using_ranges): Same.
147 (vr_values::two_valued_val_range_p): Same.
148 (vr_values::simplify_stmt_using_ranges): Move to...
149 (simplify_using_ranges::simplify): ...here.
150 * vr-values.h (class vr_values): Move all the simplification of
151 statements using ranges methods and code from here...
152 (class simplify_using_ranges): ...to here.
153 (simplify_cond_using_ranges_2): New extern prototype.
155 2020-06-27 Jakub Jelinek <jakub@redhat.com>
157 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
158 member, move outer member.
159 (struct omp_for_data): Add first_nonrect and last_nonrect members.
160 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
161 last_nonrect and non_rect_referenced members.
162 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
164 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
165 non-rectangular loops.
166 (extract_omp_for_update_vars): Likewise.
167 (expand_omp_for_generic, expand_omp_for_static_nochunk,
168 expand_omp_for_static_chunk, expand_omp_simd,
169 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
170 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
171 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
174 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
177 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
179 * config/i386/i386.c (ix86_frame_pointer_required): Update
182 2020-06-26 Yichao Yu <yyc1992@gmail.com>
184 * multiple_target.c (redirect_to_specific_clone): Fix tests
185 to check individual attribute rather than an attribute list.
187 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
189 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
190 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
193 2020-06-26 Marek Polacek <polacek@redhat.com>
195 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
196 * doc/standards.texi (C Language): Correct the default dialect.
197 (C++ Language): Update the default for C++ to gnu++17.
199 2020-06-26 Eric Botcazou <ebotcazou@gcc.gnu.org>
201 * tree-ssa-reassoc.c (dump_range_entry): New function.
202 (debug_range_entry): New debug function.
203 (update_range_test): Invoke dump_range_entry for dumping.
204 (optimize_range_tests_to_bit_test): Merge the entry test in the
205 bit test when possible and lower the profitability threshold.
207 2020-06-26 Richard Biener <rguenther@suse.de>
209 PR tree-optimization/95897
210 * tree-vectorizer.h (vectorizable_induction): Remove
211 unused gimple_stmt_iterator * parameter.
212 * tree-vect-loop.c (vectorizable_induction): Likewise.
213 (vect_analyze_loop_operations): Adjust.
214 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
215 (vect_transform_stmt): Likewise.
216 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
217 for fold-left reductions, clarify existing reduction case.
219 2020-06-25 Nick Clifton <nickc@redhat.com>
221 * config/m32r/m32r.md (movsicc): Disable pattern.
223 2020-06-25 Richard Biener <rguenther@suse.de>
225 PR tree-optimization/95839
226 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
227 check on the number of datarefs.
229 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
231 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
232 the insn_data n_operands value to unsigned.
234 2020-06-25 Richard Biener <rguenther@suse.de>
236 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
237 vector defs to determine insertion place.
239 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
242 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
243 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
244 (PTA_TIGERLAKE): Add PTA_CLWB.
246 2020-06-25 Richard Biener <rguenther@suse.de>
248 PR tree-optimization/95866
249 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
250 vectorized shift operands. For scalar shifts use lane zero
251 of a vectorized shift operand.
253 2020-06-25 Martin Liska <mliska@suse.cz>
255 PR tree-optimization/95745
257 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
258 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
260 * tree-vect-generic.c (expand_vector_condition): Remove dead
261 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
263 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
266 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
267 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
268 (convert_4f32_8f16): New define_expand
269 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
271 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
272 overloaded builtin entry.
273 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
274 (vsx_xvcvsphp): New define_insn.
276 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
277 Segher Boessenkool <segher@kernel.crashing.org>
279 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
281 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
283 * simplify-rtx.c (simplify_unary_operation_1): Simplify
284 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
286 2020-06-24 Richard Biener <rguenther@suse.de>
288 PR tree-optimization/95866
289 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
290 (vect_build_slp_tree_2): Properly reset matches[0],
291 ignore uniform constants.
293 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
296 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
297 (cpu_indicator_init): Likewise.
298 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
300 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
303 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
304 detection with AVX512BF16.
306 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
309 * common/config/i386/i386-isas.h: New file. Extracted from
310 gcc/config/i386/i386-builtins.c.
311 (_isa_names_table): Add option.
312 (ISA_NAMES_TABLE_START): New.
313 (ISA_NAMES_TABLE_END): Likewise.
314 (ISA_NAMES_TABLE_ENTRY): Likewise.
315 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
316 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
317 from enum processor_features.
318 * config/i386/driver-i386.c: Include
319 "common/config/i386/cpuinfo.h" and
320 "common/config/i386/i386-isas.h".
321 (has_feature): New macro.
322 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
323 features. Use has_feature to detect processor features. Call
324 Call get_intel_cpu to get the newer Intel CPU name. Use
325 isa_names_table to generate command-line options.
326 * config/i386/i386-builtins.c: Include
327 "common/config/i386/i386-isas.h".
328 (_arch_names_table): Removed.
329 (isa_names_table): Likewise.
331 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
334 * common/config/i386/cpuinfo.h: New file.
335 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
336 (__processor_model2): New.
337 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
338 (has_cpu_feature): New function.
339 (set_cpu_feature): Likewise.
340 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
341 CHECK___builtin_cpu_is. Return AMD CPU name.
342 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
343 Use CHECK___builtin_cpu_is. Return Intel CPU name.
344 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
345 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
346 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
347 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
348 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
349 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
350 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
351 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
352 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
353 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
354 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
355 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
356 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
357 FEATURE_XSAVEOPT and FEATURE_XSAVES
358 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
359 Also update cpu_model2.
360 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
361 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
362 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
363 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
364 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
365 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
366 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
367 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
368 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
369 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
370 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
371 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
372 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
373 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
374 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
375 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
376 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
377 (SIZE_OF_CPU_FEATURES): New.
378 * config/i386/i386-builtins.c (processor_features): Removed.
379 (isa_names_table): Replace F_XXX with FEATURE_XXX.
380 (fold_builtin_cpu): Change __cpu_features2 to an array.
382 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
385 * common/config/i386/i386-common.c (processor_alias_table): Add
386 processor model and priority to each entry.
387 (pta_size): Updated with -6.
388 (num_arch_names): New.
389 * common/config/i386/i386-cpuinfo.h: New file.
390 * config/i386/i386-builtins.c (feature_priority): Removed.
391 (processor_model): Likewise.
392 (_arch_names_table): Likewise.
393 (arch_names_table): Likewise.
394 (_isa_names_table): Replace P_ZERO with P_NONE.
395 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
396 processor_alias_table.
397 (fold_builtin_cpu): Replace arch_names_table with
398 processor_alias_table.
399 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
400 (pta): Add model and priority.
401 (num_arch_names): New.
403 2020-06-24 Richard Biener <rguenther@suse.de>
405 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
407 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
408 Simplify for new position of vectorized SLP loads.
409 (vect_slp_analyze_node_dependences): Adjust for it.
410 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
411 for the first stmts dataref.
412 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
413 (vect_schedule_slp_instance): Emit loads before the
415 * tree-vect-stmts.c (vectorizable_load): Do what the comment
416 says and use vect_find_first_scalar_stmt_in_slp.
418 2020-06-24 Richard Biener <rguenther@suse.de>
420 PR tree-optimization/95856
421 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
424 2020-06-24 Jakub Jelinek <jakub@redhat.com>
427 * fold-const.c (fold_cond_expr_with_comparison): Optimize
428 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
430 2020-06-24 Jakub Jelinek <jakub@redhat.com>
432 * omp-low.c (lower_omp_for): Fix two pastos.
434 2020-06-24 Martin Liska <mliska@suse.cz>
436 * optc-save-gen.awk: Compare string options in cl_optimization_compare
439 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
441 * config.gcc: Identify power10 as a 64-bit processor and as valid
442 for --with-cpu and --with-tune.
444 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
446 * Makefile.in (LANG_MAKEFRAGS): Same.
447 (tmake_file): Use -include.
450 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
452 * REVISION: Delete file meant for a private branch.
454 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
457 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
458 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
460 2020-06-23 Alexandre Oliva <oliva@adacore.com>
462 * collect-utils.h (dumppfx): New.
463 * collect-utils.c (dumppfx): Likewise.
464 * lto-wrapper.c (run_gcc): Set global dumppfx.
465 (compile_offload_image): Pass a -dumpbase on to mkoffload.
466 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
467 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
469 (compile_native): Pass -dumpbase et al to compiler.
470 * config/gcn/mkoffload.c (gcn_dumpbase): New.
471 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
472 save_temps. Pass -dumpbase et al to offload target compiler.
473 (compile_native): Pass -dumpbase et al to compiler.
475 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
477 * REVISION: New file.
479 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
481 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
482 Update comment for ISA 3.1.
483 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
484 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
485 on AIX, and -mpower10 elsewhere.
486 * config/rs6000/future.md: Delete.
487 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
489 * config/rs6000/power10.md: New file.
490 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
492 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
493 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
494 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
495 Use BU_P10_* instead of BU_FUTURE_*.
496 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
497 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
498 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
499 FUTURE_BUILTIN_VEC_XXEVAL.
500 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
501 Update compiler messages.
502 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
503 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
504 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
506 * config/rs6000/rs6000-string.c: Ditto.
507 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
508 instead of "future", reorder it to right after "power9".
509 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
510 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
511 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
512 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
513 not ISA_FUTURE_MASKS_SERVER.
514 (rs6000_opt_masks): Use "power10" instead of "future".
515 (rs6000_builtin_mask_names): Ditto.
516 (rs6000_disable_incompatible_switches): Ditto.
517 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
518 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
519 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
520 not RS6000_BTM_FUTURE.
521 * config/rs6000/rs6000.md: Use "power10", not "future". Use
522 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
524 * config/rs6000/rs6000.opt (mfuture): Delete.
526 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
527 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
529 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
531 * coretypes.h (first_type): Delete.
532 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
534 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
536 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
537 (arm_mve_hw): Likewise.
539 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
542 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
545 2020-06-22 Richard Biener <rguenther@suse.de>
547 PR tree-optimization/95770
548 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
551 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
553 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
554 (gcn_return_in_memory): Return vectors in memory.
556 2020-06-22 Jakub Jelinek <jakub@redhat.com>
558 * omp-general.c (omp_extract_for_data): For triangular loops with
559 all loop invariant expressions constant where the innermost loop is
560 executed at least once compute number of iterations at compile time.
562 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
564 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
565 (DRIVER_SELF_SPECS): New.
567 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
569 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
570 (RISCV_FTYPE_ATYPES0): New.
571 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
572 * config/riscv/riscv-ftypes.def: Remove VOID argument.
574 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
576 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
577 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
580 (ASM_CPU_SPEC): Remove vsx and altivec options.
581 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
584 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
585 (TARGET_DEFAULT): Only define if not BIARCH.
586 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
589 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
592 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
593 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
595 (CPLUSPLUS_CPP_SPEC): Same.
598 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
599 * config/rs6000/defaultaix64.h: New file.
600 * config/rs6000/t-aix64: New file.
602 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
604 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
605 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
606 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
608 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
609 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
610 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
611 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
612 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
613 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
614 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
615 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
616 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
617 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
618 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
619 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
620 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
621 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
622 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
623 Allow zero constants.
624 (print_operand) <case 'A'>: New output modifier.
625 (rs6000_split_multireg_move): Add support for inserting accumulator
626 priming and depriming instructions. Add support for splitting an
627 assemble accumulator pattern.
628 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
629 rs6000_gimple_fold_mma_builtin): New functions.
630 (RS6000_BUILTIN_M): New macro.
631 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
632 (bdesc_mma): Add new MMA built-in support.
633 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
634 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
636 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
637 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
638 and rs6000_gimple_fold_mma_builtin.
639 (rs6000_expand_builtin): Call mma_expand_builtin.
640 Use RS6000_BTC_OPND_MASK.
641 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
642 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
643 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
644 VSX_BUILTIN_XVCVBF16SP.
645 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
646 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
647 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
648 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
649 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
650 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
651 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
652 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
653 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
654 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
655 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
656 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
657 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
658 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
659 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
660 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
661 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
662 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
663 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
664 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
665 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
666 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
667 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
668 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
669 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
670 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
671 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
672 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
673 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
674 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
675 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
676 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
677 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
678 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
679 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
680 MMA_AVVI4I4I4): New define_int_iterator.
681 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
682 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
683 avvi4i4i4): New define_int_attr.
684 (*movpxi): Add zero constant alternative.
685 (mma_assemble_pair, mma_assemble_acc): New define_expand.
686 (*mma_assemble_acc): New define_insn_and_split.
687 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
688 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
689 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
690 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
691 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
692 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
693 (UNSPEC_VSX_XVCVSPBF16): Likewise.
694 (XVCVBF16): New define_int_iterator.
695 (xvcvbf16): New define_int_attr.
696 (vsx_<xvcvbf16>): New define_insn.
697 * doc/extend.texi: Document the mma built-ins.
699 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
700 Michael Meissner <meissner@linux.ibm.com>
702 * config/rs6000/mma.md: New file.
703 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
705 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
706 for __vector_pair and __vector_quad types.
707 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
709 (POWERPC_MASKS): Likewise.
710 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
711 (POI, PXI): New partial integer modes.
712 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
713 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
714 (rs6000_hard_regno_mode_ok_uncached): Likewise.
715 Add support for POImode being allowed in VSX registers and PXImode
716 being allowed in FP registers.
717 (rs6000_modes_tieable_p): Adjust comment.
718 Add support for POImode and PXImode.
719 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
720 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
721 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
722 Set up appropriate addr_masks for vector pair and vector quad addresses.
723 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
724 vector quad registers. Setup reload handlers for POImode and PXImode.
725 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
726 (rs6000_option_override_internal): Error if -mmma is specified
727 without -mcpu=future.
728 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
729 (quad_address_p): Change size test to less than 16 bytes.
730 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
731 and vector quad instructions.
732 (avoiding_indexed_address_p): Likewise.
733 (rs6000_emit_move): Disallow POImode and PXImode moves involving
735 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
736 and FP registers for PXImode.
737 (rs6000_split_multireg_move): Support splitting POImode and PXImode
739 (rs6000_mangle_type): Adjust comment. Add support for mangling
740 __vector_pair and __vector_quad types.
741 (rs6000_opt_masks): Add entry for mma.
742 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
743 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
744 (address_to_insn_form): Likewise.
745 (reg_to_non_prefixed): Likewise.
746 (rs6000_invalid_conversion): New function.
747 * config/rs6000/rs6000.h (MASK_MMA): Define.
748 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
749 (VECTOR_ALIGNMENT_P): New helper macro.
750 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
751 (RS6000_BTM_MMA): Define.
752 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
753 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
754 RS6000_BTI_vector_quad.
755 (vector_pair_type_node): New.
756 (vector_quad_type_node): New.
757 * config/rs6000/rs6000.md: Include mma.md.
758 (define_mode_iterator RELOAD): Add POI and PXI.
759 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
760 * config/rs6000/rs6000.opt (-mmma): New.
761 * doc/invoke.texi: Document -mmma.
763 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
765 PR tree-optimization/95638
766 * tree-loop-distribution.c (pg_edge_callback_data): New field.
767 (loop_distribution::break_alias_scc_partitions): Record and restore
768 postorder information. Fix memory leak.
770 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
772 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
773 (output_file_start): Use const 'char *'.
775 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
777 PR tree-optimization/94880
778 * match.pd (A | B) - B -> (A & ~B): New simplification.
780 2020-06-19 Richard Biener <rguenther@suse.de>
782 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
783 for lane permutations.
785 2020-06-19 Richard Biener <rguenther@suse.de>
787 PR tree-optimization/95761
788 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
789 vectorized stmts for finding the last one.
791 2020-06-18 Felix Yang <felix.yang@huawei.com>
793 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
794 vect_relevant_for_alignment_p to filter out data references in
795 the loop whose alignment is irrelevant when trying loop peeling
798 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
800 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
801 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
802 mode iterator for the first operand of ZERO_EXTRACT RTX.
803 Change ext_register_operand predicate to register_operand.
804 Rename from *cmpqi_ext_1.
805 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
806 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
807 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
808 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
809 (*extv<mode>): Use SWI24 mode iterator for the first operand
810 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
812 (*extzv<mode>): Use SWI248 mode iterator for the first operand
813 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
815 (*extzvqi): Use SWI248 mode iterator instead of SImode for
816 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
817 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
819 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
820 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
821 mode iterator for the first operand of ZERO_EXTRACT RTX.
822 Change ext_register_operand predicate to register_operand.
823 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
824 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
826 (*insvqi_1): Use SWI248 mode iterator instead of SImode
827 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
828 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
829 predicate to register_operand.
832 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
833 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
834 mode iterator for the first operand of ZERO_EXTRACT RTX.
835 Change ext_register_operand predicate to register_operand.
836 (addqi_ext_1): New expander.
837 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
838 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
839 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
840 to register_operand. Rename from *addqi_ext_1.
841 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
842 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
844 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
845 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
846 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
847 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
848 to register_operand. Rename from *testqi_ext_1.
849 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
850 (andqi_ext_1): New expander.
851 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
852 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
853 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
854 to register_operand. Rename from andqi_ext_1.
855 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
856 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
857 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
858 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
859 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
860 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
861 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
862 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
863 to register_operand. Rename from *xorqi_ext_1_cc.
864 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
865 in mode, matching its first operand.
866 (promote_duplicated_reg): Update for renamed insv<mode>_1.
867 * config/i386/predicates.md (ext_register_operand): Remove predicate.
869 2020-06-18 Martin Sebor <msebor@redhat.com>
873 * builtins.c (compute_objsize): Remove call to
874 compute_builtin_object_size and instead compute conservative sizes
877 2020-06-18 Martin Liska <mliska@suse.cz>
879 * coretypes.h (struct iterator_range): New type.
880 * tree-vect-patterns.c (vect_determine_precisions): Use
881 range-based iterator.
882 (vect_pattern_recog): Likewise.
883 * tree-vect-slp.c (_bb_vec_info): Likewise.
884 (_bb_vec_info::~_bb_vec_info): Likewise.
885 (vect_slp_check_for_constructors): Likewise.
886 * tree-vectorizer.h:Add new iterators
887 and functions that use it.
889 2020-06-18 Martin Liska <mliska@suse.cz>
891 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
892 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
893 of a VEC_COND_EXPR cannot be tcc_comparison and so that
894 a SSA_NAME needs to be created before we use it for the first
895 argument of the VEC_COND_EXPR.
896 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
898 2020-06-18 Richard Biener <rguenther@suse.de>
901 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
902 to the target if necessary.
903 (expand_vect_cond_mask_optab_fn): Likewise.
905 2020-06-18 Martin Liska <mliska@suse.cz>
907 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
908 vcond as we check for NULL pointer.
910 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
912 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
913 silence empty-body warning with gcc_fallthrough.
915 2020-06-18 Jakub Jelinek <jakub@redhat.com>
917 PR tree-optimization/95699
918 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
919 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
920 declarations to the statements that set them where possible.
922 2020-06-18 Jakub Jelinek <jakub@redhat.com>
925 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
926 scalar mode halfvectype other than vector boolean for
929 2020-06-18 Richard Biener <rguenther@suse.de>
931 * varasm.c (assemble_variable): Make sure to not
932 defer output when outputting addressed constants.
933 (output_constant_def_contents): Likewise.
934 (add_constant_to_table): Take and pass on whether to
936 (output_addressed_constants): Likewise.
937 (output_constant_def): Pass on whether to defer output
938 to add_constant_to_table.
939 (tree_output_constant_def): Defer output of constants.
941 2020-06-18 Richard Biener <rguenther@suse.de>
943 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
944 (_slp_tree::lane_permutation): New member.
945 (_slp_tree::code): Likewise.
946 (SLP_TREE_TWO_OPERATORS): Remove.
947 (SLP_TREE_LANE_PERMUTATION): New.
948 (SLP_TREE_CODE): Likewise.
949 (vect_stmt_dominates_stmt_p): Declare.
950 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
951 * tree-vect-stmts.c (vect_model_simple_cost): Remove
952 SLP_TREE_TWO_OPERATORS handling.
953 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
954 (_slp_tree::~_slp_tree): Likewise.
955 (vect_two_operations_perm_ok_p): Remove.
956 (vect_build_slp_tree_1): Remove verification of two-operator
958 (vect_build_slp_tree_2): When we have two different operators
959 build two computation SLP nodes and a blend.
960 (vect_print_slp_tree): Print the lane permutation if it exists.
961 (slp_copy_subtree): Copy it.
962 (vect_slp_rearrange_stmts): Re-arrange it.
963 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
964 VEC_PERM_EXPR explicitely.
965 (vect_schedule_slp_instance): Likewise. Remove old
966 SLP_TREE_TWO_OPERATORS code.
967 (vectorizable_slp_permutation): New function.
969 2020-06-18 Martin Liska <mliska@suse.cz>
971 * tree-vect-generic.c (expand_vector_condition): Check
972 for gassign before inspecting RHS.
974 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
976 * gimplify.c (omp_notice_threadprivate_variable)
977 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
978 diagnostic. Adjust all users.
980 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
982 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
983 NULL_TREE' check earlier.
985 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
987 * doc/extend.texi (attribute access): Fix a typo.
989 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
990 Kaipeng Zhou <zhoukaipeng3@huawei.com>
992 PR tree-optimization/95199
993 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
994 strided load/store operations and remove redundant code.
996 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
998 * coretypes.h (first_type): New alias template.
999 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
1000 Remove spurious “...” and split the function type out into a typedef.
1002 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
1004 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
1007 2020-06-17 Richard Biener <rguenther@suse.de>
1009 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
1010 in *vectype parameter.
1011 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
1012 vect_build_slp_tree_1 computed.
1013 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
1014 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
1015 (vect_schedule_slp_instance): Likewise.
1016 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
1017 from SLP_TREE_VECTYPE.
1019 2020-06-17 Richard Biener <rguenther@suse.de>
1021 PR tree-optimization/95717
1022 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
1023 Move BB SSA updating before exit/latch PHI current def copying.
1025 2020-06-17 Martin Liska <mliska@suse.cz>
1027 * Makefile.in: Add new file.
1028 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
1029 not meet this condition.
1030 (do_store_flag): Likewise.
1031 * gimplify.c (gimplify_expr): Gimplify first argument of
1032 VEC_COND_EXPR to be a SSA name.
1033 * internal-fn.c (vec_cond_mask_direct): New.
1034 (vec_cond_direct): Likewise.
1035 (vec_condu_direct): Likewise.
1036 (vec_condeq_direct): Likewise.
1037 (expand_vect_cond_optab_fn): New.
1038 (expand_vec_cond_optab_fn): Likewise.
1039 (expand_vec_condu_optab_fn): Likewise.
1040 (expand_vec_condeq_optab_fn): Likewise.
1041 (expand_vect_cond_mask_optab_fn): Likewise.
1042 (expand_vec_cond_mask_optab_fn): Likewise.
1043 (direct_vec_cond_mask_optab_supported_p): Likewise.
1044 (direct_vec_cond_optab_supported_p): Likewise.
1045 (direct_vec_condu_optab_supported_p): Likewise.
1046 (direct_vec_condeq_optab_supported_p): Likewise.
1047 * internal-fn.def (VCOND): New OPTAB.
1049 (VCONDEQ): Likewise.
1050 (VCOND_MASK): Likewise.
1051 * optabs.c (get_rtx_code): Make it global.
1052 (expand_vec_cond_mask_expr): Removed.
1053 (expand_vec_cond_expr): Removed.
1054 * optabs.h (expand_vec_cond_expr): Likewise.
1055 (vector_compare_rtx): Make it global.
1056 * passes.def: Add new pass_gimple_isel pass.
1057 * tree-cfg.c (verify_gimple_assign_ternary): Add check
1058 for VEC_COND_EXPR about first argument.
1059 * tree-pass.h (make_pass_gimple_isel): New.
1060 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
1061 propagation of the first argument of a VEC_COND_EXPR.
1062 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
1063 first argument of a VEC_COND_EXPR.
1064 (optimize_vec_cond_expr): Likewise.
1065 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
1066 for a first argument of created VEC_COND_EXPR.
1067 (expand_vector_condition): Fix coding style.
1068 * tree-vect-stmts.c (vectorizable_condition): Gimplify
1070 * gimple-isel.cc: New file.
1072 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
1074 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
1075 (BSS_SECTION_ASM_OP): Use ".bss".
1076 (ASM_SPEC): Remove "-mattr=-code-object-v3".
1077 (LINK_SPEC): Add "--export-dynamic".
1078 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
1079 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
1080 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
1081 (load_image): Remove obsolete relocation handling.
1082 Add ".kd" suffix to the symbol names.
1083 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
1084 (gcn_option_override): Update gcn_isa test.
1085 (gcn_kernel_arg_types): Update all the assembler directives.
1086 Remove the obsolete options.
1087 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
1088 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
1090 (output_file_start): Rework assembler file header.
1091 (gcn_hsa_declare_function_name): Rework kernel metadata.
1092 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
1093 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
1094 (PROCESSOR_VEGA10): New enum value.
1095 (PROCESSOR_VEGA20): New enum value.
1097 2020-06-17 Martin Liska <mliska@suse.cz>
1099 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
1101 * gcov-tool.c (print_version): Likewise.
1102 * gcov.c (print_version): Likewise.
1104 2020-06-17 liuhongt <hongtao.liu@intel.com>
1107 * config/i386/i386-expand.c
1108 (ix86_expand_vec_shift_qihi_constant): New function.
1109 * config/i386/i386-protos.h
1110 (ix86_expand_vec_shift_qihi_constant): Declare.
1111 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
1112 V*QImode by constant.
1114 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
1116 PR tree-optimization/95649
1117 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
1118 value is a constant.
1120 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1122 * config.in: Regenerate.
1123 * config/s390/s390.c (print_operand): Emit vector alignment hints
1124 for target z13, if AS accepts them. For other targets the logic
1126 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
1128 * configure: Regenerate.
1129 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
1131 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1133 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
1135 (__arm_vaddq_m_n_s32): Likewise.
1136 (__arm_vaddq_m_n_s16): Likewise.
1137 (__arm_vaddq_m_n_u8): Likewise.
1138 (__arm_vaddq_m_n_u32): Likewise.
1139 (__arm_vaddq_m_n_u16): Likewise.
1140 (__arm_vaddq_m): Modify polymorphic variant.
1142 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1144 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
1145 and constraint of all the operands.
1146 (mve_sqrshrl_sat<supf>_di): Likewise.
1147 (mve_uqrshl_si): Likewise.
1148 (mve_sqrshr_si): Likewise.
1149 (mve_uqshll_di): Likewise.
1150 (mve_urshrl_di): Likewise.
1151 (mve_uqshl_si): Likewise.
1152 (mve_urshr_si): Likewise.
1153 (mve_sqshl_si): Likewise.
1154 (mve_srshr_si): Likewise.
1155 (mve_srshrl_di): Likewise.
1156 (mve_sqshll_di): Likewise.
1157 * config/arm/predicates.md (arm_low_register_operand): Define.
1159 2020-06-16 Jakub Jelinek <jakub@redhat.com>
1161 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
1162 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
1163 or dist_schedule clause on non-rectangular loops. Handle
1164 gimplification of non-rectangular lb/b expressions. When changing
1165 iteration variable, adjust also non-rectangular lb/b expressions
1167 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
1169 (struct omp_for_data): Add non_rect member.
1170 * omp-general.c (omp_extract_for_data): Handle non-rectangular
1171 loops. Fill in non_rect, m1, m2 and outer.
1172 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
1173 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
1174 non-rectangular loop cases and assert for cases that can't be
1176 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
1177 (dump_omp_loop_non_rect_expr): New function.
1178 (dump_generic_node): Handle non-rectangular OpenMP loops.
1179 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
1180 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
1183 2020-06-16 Richard Biener <rguenther@suse.de>
1186 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
1188 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
1191 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
1192 assertion and turn it into a early exit check.
1194 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
1196 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
1197 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
1198 true and all elements are zero, then always clear. Return GS_ERROR
1199 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
1200 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
1201 the type is aggregate non-addressable, ask gimplify_init_constructor
1202 whether it can generate a single access to the target.
1204 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
1206 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
1207 access on the LHS is replaced with a scalar access, propagate the
1208 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
1210 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
1212 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
1213 TARGET_THREADPTR reference.
1214 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
1215 targetm.have_tls instead of TARGET_HAVE_TLS.
1216 (xtensa_option_override): Set targetm.have_tls to false in
1217 configurations without THREADPTR.
1219 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
1221 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
1223 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
1224 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
1225 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
1226 xtensa_windowed_abi if needed.
1227 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
1229 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
1230 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
1232 (mabi=call0, mabi=windowed): New options.
1233 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
1235 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
1237 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
1238 (TARGET_CAN_ELIMINATE): New macro.
1239 * config/xtensa/xtensa.h
1240 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
1241 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
1242 (HARD_FRAME_POINTER_REGNUM): Define using
1243 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
1244 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
1245 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
1246 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
1248 2020-06-15 Felix Yang <felix.yang@huawei.com>
1250 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
1251 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
1253 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
1255 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
1256 LOOP_VINFO_DATAREFS when possible.
1257 (update_epilogue_loop_vinfo): Likewise.
1259 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
1261 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
1263 (riscv_gpr_save_operation_p): Change type to unsigned for i and
1266 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
1269 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
1271 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
1272 * config/i386/sse.md (mul<mode>3): Drop mask_name since
1273 there's no real simd int8 multiplication instruction with
1274 mask. Also optimize it under TARGET_AVX512BW.
1275 (mulv8qi3): New expander.
1277 2020-06-12 Marco Elver <elver@google.com>
1279 * gimplify.c (gimplify_function_tree): Optimize and do not emit
1280 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
1281 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
1282 * tsan.c (instrument_memory_accesses): Make
1283 fentry_exit_instrument bool depend on new param.
1285 2020-06-12 Felix Yang <felix.yang@huawei.com>
1287 PR tree-optimization/95570
1288 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
1289 (vect_verify_datarefs_alignment): Call it to filter out data references
1290 in the loop whose alignment is irrelevant.
1291 (vect_get_peeling_costs_all_drs): Likewise.
1292 (vect_peeling_supportable): Likewise.
1293 (vect_enhance_data_refs_alignment): Likewise.
1295 2020-06-12 Richard Biener <rguenther@suse.de>
1297 PR tree-optimization/95633
1298 * tree-vect-stmts.c (vectorizable_condition): Properly
1299 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
1301 2020-06-12 Martin Liška <mliska@suse.cz>
1303 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
1304 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
1306 * lto-wrapper.c (merge_and_complain): Wrap option names.
1308 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
1310 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
1311 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
1312 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
1313 (vect_set_loop_condition_masked): Renamed to ...
1314 (vect_set_loop_condition_partial_vectors): ... this. Rename
1315 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
1316 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
1317 (vect_set_loop_condition_unmasked): Renamed to ...
1318 (vect_set_loop_condition_normal): ... this.
1319 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
1320 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
1321 to vect_set_loop_condition_partial_vectors.
1322 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
1323 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
1324 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
1326 (vect_analyze_loop_costing): ... this.
1327 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
1329 (vect_min_prec_for_max_niters): New, factored out from ...
1330 (vect_verify_full_masking): ... this. Rename
1331 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
1332 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
1333 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
1334 (vectorizable_reduction): Update some dumpings with partial
1335 vectors instead of fully-masked.
1336 (vectorizable_live_operation): Likewise.
1337 (vect_iv_limit_for_full_masking): Renamed to ...
1338 (vect_iv_limit_for_partial_vectors): ... this.
1339 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
1340 (check_load_store_for_partial_vectors): ... this. Update some
1341 dumpings with partial vectors instead of fully-masked.
1342 (vectorizable_store): Rename check_load_store_masking to
1343 check_load_store_for_partial_vectors.
1344 (vectorizable_load): Likewise.
1345 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
1346 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
1347 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
1348 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
1349 (vect_iv_limit_for_full_masking): Renamed to ...
1350 (vect_iv_limit_for_partial_vectors): this.
1351 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
1352 Rename iv_type to rgroup_iv_type.
1354 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
1356 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
1357 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
1358 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
1359 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
1360 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
1361 (insn_gen_fn::operator()): Replace overloaded definitions with
1362 a parameter-pack version.
1364 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
1367 * config/i386/i386-features.c (rest_of_insert_endbranch):
1369 (rest_of_insert_endbr_and_patchable_area): Change return type
1370 to void. Add need_endbr and patchable_area_size arguments.
1371 Don't call timevar_push nor timevar_pop. Replace
1372 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
1373 UNSPECV_PATCHABLE_AREA for patchable area.
1374 (pass_data_insert_endbranch): Renamed to ...
1375 (pass_data_insert_endbr_and_patchable_area): This. Change
1376 pass name to endbr_and_patchable_area.
1377 (pass_insert_endbranch): Renamed to ...
1378 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
1379 and patchable_area_size;.
1380 (pass_insert_endbr_and_patchable_area::gate): Set and check
1381 need_endbr and patchable_area_size.
1382 (pass_insert_endbr_and_patchable_area::execute): Call
1383 timevar_push and timevar_pop. Pass need_endbr and
1384 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
1385 (make_pass_insert_endbranch): Renamed to ...
1386 (make_pass_insert_endbr_and_patchable_area): This.
1387 * config/i386/i386-passes.def: Replace pass_insert_endbranch
1388 with pass_insert_endbr_and_patchable_area.
1389 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
1390 (make_pass_insert_endbranch): Renamed to ...
1391 (make_pass_insert_endbr_and_patchable_area): This.
1392 * config/i386/i386.c (ix86_asm_output_function_label): Set
1393 function_label_emitted to true.
1394 (ix86_print_patchable_function_entry): New function.
1395 (ix86_output_patchable_area): Likewise.
1396 (x86_function_profiler): Replace endbr_queued_at_entrance with
1397 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
1398 Call ix86_output_patchable_area to generate patchable area if
1400 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
1401 * config/i386/i386.h (queued_insn_type): New.
1402 (machine_function): Add function_label_emitted. Replace
1403 endbr_queued_at_entrance with insn_queued_at_entrance.
1404 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
1405 (patchable_area): New.
1407 2020-06-11 Martin Liska <mliska@suse.cz>
1409 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
1412 2020-06-11 Martin Liska <mliska@suse.cz>
1415 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
1418 2020-06-11 Martin Liska <mliska@suse.cz>
1419 Jakub Jelinek <jakub@redhat.com>
1422 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
1423 by using Pmode instead of ptr_mode.
1425 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
1427 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
1428 (vect_set_loop_control): ... this.
1429 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
1430 (vect_set_loop_masks_directly): Renamed to ...
1431 (vect_set_loop_controls_directly): ... this. Also rename some
1432 variables with ctrl instead of mask. Rename vect_set_loop_mask to
1433 vect_set_loop_control.
1434 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
1435 Also rename some variables with ctrl instead of mask.
1436 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
1437 (release_vec_loop_controls): ... this. Rename rgroup_masks related
1439 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
1440 release_vec_loop_controls.
1441 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
1442 (vect_get_max_nscalars_per_iter): Likewise.
1443 (vect_estimate_min_profitable_iters): Likewise.
1444 (vect_record_loop_mask): Likewise.
1445 (vect_get_loop_mask): Likewise.
1446 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
1447 (struct rgroup_controls): ... this. Also rename mask_type
1448 to type and rename masks to controls.
1450 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
1452 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
1453 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
1454 (vect_gen_vector_loop_niters): Likewise.
1455 (vect_do_peeling): Likewise.
1456 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
1457 fully_masked_p to using_partial_vectors_p.
1458 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
1459 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
1460 (determine_peel_for_niter): Likewise.
1461 (vect_estimate_min_profitable_iters): Likewise.
1462 (vect_transform_loop): Likewise.
1463 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
1464 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
1466 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
1468 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
1469 can_fully_mask_p to can_use_partial_vectors_p.
1470 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
1471 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
1472 to saved_can_use_partial_vectors_p.
1473 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
1474 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
1475 (vectorizable_live_operation): Likewise.
1476 * tree-vect-stmts.c (permute_vec_elements): Likewise.
1477 (check_load_store_masking): Likewise.
1478 (vectorizable_operation): Likewise.
1479 (vectorizable_store): Likewise.
1480 (vectorizable_load): Likewise.
1481 (vectorizable_condition): Likewise.
1482 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
1483 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
1484 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
1486 2020-06-11 Martin Liska <mliska@suse.cz>
1488 * optc-save-gen.awk: Quote error string.
1490 2020-06-11 Alexandre Oliva <oliva@adacore.com>
1492 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
1494 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
1496 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
1497 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
1499 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
1500 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
1502 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
1504 * config/riscv/predicates.md (gpr_save_operation): New.
1505 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
1506 (riscv_gpr_save_operation_p): Ditto.
1507 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
1508 Ignore USEs for gpr_save patter.
1509 * config/riscv/riscv.c (gpr_save_reg_order): New.
1510 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
1511 (riscv_gen_gpr_save_insn): New.
1512 (riscv_gpr_save_operation_p): Ditto.
1513 * config/riscv/riscv.md (S3_REGNUM): New.
1520 (S10_REGNUM): Ditto.
1521 (S11_REGNUM): Ditto.
1522 (gpr_save): Model USEs correctly.
1524 2020-06-10 Martin Sebor <msebor@redhat.com>
1528 * builtins.c (inform_access): New function.
1529 (check_access): Call it. Add argument.
1530 (addr_decl_size): Remove.
1531 (get_range): New function.
1532 (compute_objsize): New overload. Only use compute_builtin_object_size
1533 with raw memory function.
1534 (check_memop_access): Pass new argument to compute_objsize and
1536 (expand_builtin_memchr, expand_builtin_strcat): Same.
1537 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
1538 (expand_builtin_stpncpy, check_strncat_sizes): Same.
1539 (expand_builtin_strncat, expand_builtin_strncpy): Same.
1540 (expand_builtin_memcmp): Same.
1541 * builtins.h (check_nul_terminated_array): Declare extern.
1542 (check_access): Add argument.
1543 (struct access_ref, struct access_data): New structs.
1544 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
1545 (builtin_access::overlap): Call it.
1546 * tree-object-size.c (decl_init_size): Declare extern.
1547 (addr_object_size): Correct offset computation.
1548 * tree-object-size.h (decl_init_size): Declare.
1549 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
1550 to maybe_warn_overflow when assigning to an SSA_NAME.
1552 2020-06-10 Richard Biener <rguenther@suse.de>
1554 * tree-vect-loop.c (vect_determine_vectorization_factor):
1556 (_loop_vec_info::_loop_vec_info): Likewise.
1557 (vect_update_vf_for_slp): Likewise.
1558 (vect_analyze_loop_operations): Likewise.
1559 (update_epilogue_loop_vinfo): Likewise.
1560 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
1561 (vect_pattern_recog): Likewise.
1562 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
1563 (_bb_vec_info::_bb_vec_info): Likewise.
1564 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
1567 2020-06-10 Richard Biener <rguenther@suse.de>
1569 PR tree-optimization/95576
1570 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
1572 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
1575 * config/aarch64/aarch64-sve-builtins.h
1576 (sve_switcher::m_old_maximum_field_alignment): New member.
1577 * config/aarch64/aarch64-sve-builtins.cc
1578 (sve_switcher::sve_switcher): Save maximum_field_alignment in
1579 m_old_maximum_field_alignment and clear maximum_field_alignment.
1580 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
1582 2020-06-10 Richard Biener <rguenther@suse.de>
1584 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
1586 (_stmt_vec_info::vec_stmts): Likewise.
1587 (vec_info::stmt_vec_info_ro): New flag.
1588 (vect_finish_replace_stmt): Adjust declaration.
1589 (vect_finish_stmt_generation): Likewise.
1590 (vectorizable_induction): Likewise.
1591 (vect_transform_reduction): Likewise.
1592 (vectorizable_lc_phi): Likewise.
1593 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
1594 allocate stmt infos for increments.
1595 (vect_record_grouped_load_vectors): Adjust.
1596 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
1597 (vectorize_fold_left_reduction): Likewise.
1598 (vect_transform_reduction): Likewise.
1599 (vect_transform_cycle_phi): Likewise.
1600 (vectorizable_lc_phi): Likewise.
1601 (vectorizable_induction): Likewise.
1602 (vectorizable_live_operation): Likewise.
1603 (vect_transform_loop): Likewise.
1604 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
1605 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
1606 (vect_get_slp_defs): Likewise.
1607 (vect_transform_slp_perm_load): Likewise.
1608 (vect_schedule_slp_instance): Likewise.
1609 (vectorize_slp_instance_root_stmt): Likewise.
1610 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
1611 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
1612 (vect_finish_replace_stmt): Do not return anything.
1613 (vect_finish_stmt_generation): Likewise.
1614 (vect_build_gather_load_calls): Adjust.
1615 (vectorizable_bswap): Likewise.
1616 (vectorizable_call): Likewise.
1617 (vectorizable_simd_clone_call): Likewise.
1618 (vect_create_vectorized_demotion_stmts): Likewise.
1619 (vectorizable_conversion): Likewise.
1620 (vectorizable_assignment): Likewise.
1621 (vectorizable_shift): Likewise.
1622 (vectorizable_operation): Likewise.
1623 (vectorizable_scan_store): Likewise.
1624 (vectorizable_store): Likewise.
1625 (vectorizable_load): Likewise.
1626 (vectorizable_condition): Likewise.
1627 (vectorizable_comparison): Likewise.
1628 (vect_transform_stmt): Likewise.
1629 * tree-vectorizer.c (vec_info::vec_info): Initialize
1631 (vec_info::replace_stmt): Copy over stmt UID rather than
1632 unsetting/setting a stmt info allocating a new UID.
1633 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
1635 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
1637 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
1639 * gimple-ssa-evrp.c (class evrp_folder): New.
1640 (class evrp_dom_walker): Remove.
1641 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
1642 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
1643 * tree-ssa-copy.c (copy_folder::get_value): Same.
1644 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
1645 Pass stmt to get_value.
1646 (substitute_and_fold_engine::replace_phi_args_in): Same.
1647 (substitute_and_fold_dom_walker::after_dom_children): Call
1649 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
1650 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
1651 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
1652 call virtual functions for folding, pre_folding, and post folding.
1653 Call get_value with PHI. Tweak dump.
1654 * tree-ssa-propagate.h (class substitute_and_fold_engine):
1655 New argument to get_value.
1656 New virtual function pre_fold_bb.
1657 New virtual function post_fold_bb.
1658 New virtual function pre_fold_stmt.
1659 New virtual function post_new_stmt.
1660 New function propagate_into_phi_args.
1661 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
1662 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
1664 (vr_values::fold_cond): New.
1665 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
1666 * vr-values.h (class vr_values): Add
1667 simplify_cond_using_ranges_when_edge_is_known.
1669 2020-06-10 Martin Liska <mliska@suse.cz>
1672 * asan.c (asan_emit_stack_protection): Emit
1673 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
1676 2020-06-10 Tamar Christina <tamar.christina@arm.com>
1678 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
1680 2020-06-10 Richard Biener <rguenther@suse.de>
1682 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
1683 (vect_record_grouped_load_vectors): Likewise.
1684 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
1685 (vectorize_fold_left_reduction): Likewise.
1686 (vect_transform_reduction): Likewise.
1687 (vect_transform_cycle_phi): Likewise.
1688 (vectorizable_lc_phi): Likewise.
1689 (vectorizable_induction): Likewise.
1690 (vectorizable_live_operation): Likewise.
1691 (vect_transform_loop): Likewise.
1692 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
1694 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
1695 (vect_get_vec_def_for_operand): Likewise.
1696 (vect_get_vec_def_for_stmt_copy): Likewise.
1697 (vect_get_vec_defs_for_stmt_copy): Likewise.
1698 (vect_get_vec_defs_for_operand): New function.
1699 (vect_get_vec_defs): Likewise.
1700 (vect_build_gather_load_calls): Adjust.
1701 (vect_get_gather_scatter_ops): Likewise.
1702 (vectorizable_bswap): Likewise.
1703 (vectorizable_call): Likewise.
1704 (vectorizable_simd_clone_call): Likewise.
1705 (vect_get_loop_based_defs): Remove.
1706 (vect_create_vectorized_demotion_stmts): Adjust.
1707 (vectorizable_conversion): Likewise.
1708 (vectorizable_assignment): Likewise.
1709 (vectorizable_shift): Likewise.
1710 (vectorizable_operation): Likewise.
1711 (vectorizable_scan_store): Likewise.
1712 (vectorizable_store): Likewise.
1713 (vectorizable_load): Likewise.
1714 (vectorizable_condition): Likewise.
1715 (vectorizable_comparison): Likewise.
1716 (vect_transform_stmt): Adjust and remove no longer applicable
1718 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
1719 STMT_VINFO_VEC_STMTS.
1720 (vec_info::free_stmt_vec_info): Relase it.
1721 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
1722 (_stmt_vec_info::vec_stmts): Add.
1723 (STMT_VINFO_VEC_STMT): Remove.
1724 (STMT_VINFO_VEC_STMTS): New.
1725 (vect_get_vec_def_for_operand_1): Remove.
1726 (vect_get_vec_def_for_operand): Likewise.
1727 (vect_get_vec_defs_for_stmt_copy): Likewise.
1728 (vect_get_vec_def_for_stmt_copy): Likewise.
1729 (vect_get_vec_defs): New overloads.
1730 (vect_get_vec_defs_for_operand): New.
1731 (vect_get_slp_defs): Declare.
1733 2020-06-10 Qian Chao <qianchao9@huawei.com>
1735 PR tree-optimization/95569
1736 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
1738 2020-06-10 Martin Liska <mliska@suse.cz>
1740 PR tree-optimization/92860
1741 * optc-save-gen.awk: Generate new function cl_optimization_compare.
1742 * opth-gen.awk: Generate declaration of the function.
1744 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
1746 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
1747 'future' PowerPC platform.
1748 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
1749 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
1750 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
1752 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
1753 (rs6000_clone_map): Add 'future' system target_clones support.
1755 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
1757 * Makefile.in (ZSTD_INC): Define.
1758 (ZSTD_LIB): Include ZSTD_LDFLAGS.
1759 (CFLAGS-lto-compress.o): Add ZSTD_INC.
1760 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
1762 * configure: Rebuilt.
1764 2020-06-09 Jason Merrill <jason@redhat.com>
1767 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
1769 2020-06-09 Marco Elver <elver@google.com>
1771 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
1772 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
1773 builtin for volatile instrumentation of reads/writes.
1774 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
1775 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
1776 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
1777 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
1778 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
1779 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
1780 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
1781 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
1782 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
1783 * tsan.c (get_memory_access_decl): Argument if access is
1784 volatile. If param tsan-distinguish-volatile is non-zero, and
1785 access if volatile, return volatile instrumentation decl.
1786 (instrument_expr): Check if access is volatile.
1788 2020-06-09 Richard Biener <rguenther@suse.de>
1790 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
1792 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
1794 * omp-offload.c (add_decls_addresses_to_decl_constructor,
1795 omp_finish_file): With in_lto_p, stream out all offload-table
1796 items even if the symtab_node does not exist.
1798 2020-06-09 Richard Biener <rguenther@suse.de>
1800 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
1802 2020-06-09 Martin Liska <mliska@suse.cz>
1804 * gcov-dump.c (print_usage): Fix spacing for --raw option
1807 2020-06-09 Martin Liska <mliska@suse.cz>
1809 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
1810 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
1811 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
1812 Handle all sanitizer options.
1813 (can_inline_edge_p): Use renamed CIF_* enum value.
1815 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
1817 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
1819 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
1820 (@aarch64_bic<mode>): Enable unpacked BIC.
1821 (*bic<mode>3): Enable unpacked BIC.
1823 2020-06-09 Martin Liska <mliska@suse.cz>
1825 PR gcov-profile/95365
1826 * doc/gcov.texi: Compile and link one example in 2 steps.
1828 2020-06-09 Jakub Jelinek <jakub@redhat.com>
1830 PR tree-optimization/95527
1831 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
1833 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
1835 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
1836 'future' PowerPC platform.
1837 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
1838 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
1839 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
1841 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
1842 (rs6000_clone_map): Add 'future' system target_clones support.
1844 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
1848 * omp-offload.c (add_decls_addresses_to_decl_constructor,
1849 omp_finish_file): Skip removed items.
1850 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
1851 to this node for variables and functions.
1853 2020-06-08 Jason Merrill <jason@redhat.com>
1855 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
1856 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
1857 * configure: Regenerate.
1859 2020-06-08 Martin Sebor <msebor@redhat.com>
1861 * postreload.c (reload_cse_simplify_operands): Clear first array element
1862 before using it. Assert a precondition.
1864 2020-06-08 Jakub Jelinek <jakub@redhat.com>
1867 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
1868 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
1869 type is vector boolean.
1871 2020-06-08 Tamar Christina <tamar.christina@arm.com>
1873 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
1875 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
1877 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
1878 instead of VFP_REGS.
1880 2020-06-08 Martin Liska <mliska@suse.cz>
1882 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
1883 in all vcond* patterns.
1885 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
1887 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
1888 Define. No longer include <algorithm>.
1890 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
1892 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
1893 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
1894 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
1895 (parityhi2, parityqi2): New expanders.
1896 (parityhi2_cmp): Implement set parity flag with xorb insn.
1897 (parityqi2_cmp): Implement set parity flag with testb insn.
1898 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
1900 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
1903 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1904 Override flag_cunroll_grow_size.
1906 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
1908 * common.opt (flag_cunroll_grow_size): New flag.
1909 * toplev.c (process_options): Set flag_cunroll_grow_size.
1910 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
1911 Use flag_cunroll_grow_size.
1913 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
1916 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
1917 (ipa_odr_summary_write): Update streaming.
1918 (ipa_odr_read_section): Update streaming.
1920 2020-06-06 Alexandre Oliva <oliva@adacore.com>
1923 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
1925 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
1926 Julian Brown <julian@codesourcery.com>
1928 * gimplify.c (gimplify_adjust_omp_clauses): Remove
1929 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
1931 2020-06-05 Richard Biener <rguenther@suse.de>
1933 PR tree-optimization/95539
1934 * tree-vect-data-refs.c
1935 (vect_slp_analyze_and_verify_instance_alignment): Use
1936 SLP_TREE_REPRESENTATIVE for the data-ref check.
1937 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
1938 back to the first scalar stmt rather than the
1939 SLP_TREE_REPRESENTATIVE to match previous behavior.
1941 2020-06-05 Felix Yang <felix.yang@huawei.com>
1944 * expr.c (emit_move_insn): Check src and dest of the copy to see
1945 if one or both of them are subregs, try to remove the subregs when
1946 innermode and outermode are equal in size and the mode change involves
1947 an implicit round trip through memory.
1949 2020-06-05 Jakub Jelinek <jakub@redhat.com>
1952 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
1953 define_insn_and_split patterns.
1954 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
1955 define_insn patterns.
1957 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
1959 * alloc-pool.h (object_allocator::remove_raw): New.
1960 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
1961 (occurrence::occurrence): Add.
1962 (occurrence::~occurrence): Likewise.
1963 (occurrence::new): Likewise.
1964 (occurrence::delete): Likewise.
1966 (insert_bb): Use new occurence (...) instead of occ_new.
1967 (register_division_in): Likewise.
1968 (free_bb): Use delete occ instead of manually removing
1971 2020-06-05 Richard Biener <rguenther@suse.de>
1974 * cfgexpand.c (expand_debug_expr): Avoid calling
1975 set_mem_attributes_minus_bitpos when we were expanding
1977 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
1978 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
1979 special-cases we do not want MEM_EXPRs for. Assert
1980 we end up with reasonable MEM_EXPRs.
1982 2020-06-05 Lili Cui <lili.cui@intel.com>
1985 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
1987 2020-06-04 Martin Sebor <msebor@redhat.com>
1991 * attribs.c (init_attr_rdwr_indices): Move function here.
1992 * attribs.h (rdwr_access_hash, rdwr_map): Define.
1993 (attr_access): Add 'none'.
1994 (init_attr_rdwr_indices): Declared function.
1995 * builtins.c (warn_for_access)): New function.
1996 (check_access): Call it.
1997 * builtins.h (checK-access): Add an optional argument.
1998 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
1999 (init_attr_rdwr_indices): Declare extern.
2000 (append_attrname): Handle attr_access::none.
2001 (maybe_warn_rdwr_sizes): Same.
2002 (initialize_argument_information): Update comments.
2003 * doc/extend.texi (attribute access): Document 'none'.
2004 * tree-ssa-uninit.c (struct wlimits): New.
2005 (maybe_warn_operand): New function.
2006 (maybe_warn_pass_by_reference): Same.
2007 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
2008 Also call for function calls.
2009 (pass_late_warn_uninitialized::execute): Adjust comments.
2010 (execute_early_warn_uninitialized): Same.
2012 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
2015 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
2016 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
2017 reload if the original insn has it too.
2019 2020-06-04 Richard Biener <rguenther@suse.de>
2021 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
2022 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
2024 2020-06-04 Martin Jambor <mjambor@suse.cz>
2027 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
2028 exceptions check to...
2029 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
2031 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
2032 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
2035 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2038 * config/arm/predicates.md (mve_scatter_memory): Define to
2039 match (mem (reg)) for scatter store memory.
2040 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
2041 define_insn to define_expand.
2042 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
2043 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
2044 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
2045 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
2046 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
2047 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
2048 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
2049 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
2050 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
2051 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
2052 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
2053 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
2054 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
2055 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
2056 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
2057 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
2058 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
2059 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
2060 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
2061 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
2062 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
2064 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
2065 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
2066 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
2067 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
2068 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
2069 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
2070 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
2071 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
2072 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
2073 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
2074 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
2075 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
2076 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
2077 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
2078 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
2079 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
2080 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
2081 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
2082 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
2083 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
2085 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2087 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
2089 (__arm_vbicq_n_s16): Likewise.
2090 (__arm_vbicq_n_u32): Likewise.
2091 (__arm_vbicq_n_s32): Likewise.
2092 (__arm_vbicq): Modify polymorphic variant.
2094 2020-06-04 Richard Biener <rguenther@suse.de>
2096 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
2097 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
2098 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
2099 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
2100 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
2102 (vect_get_slp_defs): ... here.
2103 (vect_get_slp_vect_def): New function.
2105 2020-06-04 Richard Biener <rguenther@suse.de>
2107 * tree-vectorizer.h (_slp_tree::lanes): New.
2108 (SLP_TREE_LANES): Likewise.
2109 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
2110 (vectorizable_reduction): Likewise.
2111 (vect_transform_cycle_phi): Likewise.
2112 (vectorizable_induction): Likewise.
2113 (vectorizable_live_operation): Likewise.
2114 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
2115 (vect_create_new_slp_node): Likewise.
2116 (slp_copy_subtree): Copy it.
2117 (vect_optimize_slp): Use it.
2118 (vect_slp_analyze_node_operations_1): Likewise.
2119 (vect_slp_convert_to_external): Likewise.
2120 (vect_bb_vectorization_profitable_p): Likewise.
2121 * tree-vect-stmts.c (vectorizable_load): Likewise.
2122 (get_vectype_for_scalar_type): Likewise.
2124 2020-06-04 Richard Biener <rguenther@suse.de>
2126 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
2127 (vect_build_slp_tree_2): Simplify building all external op
2129 (vect_slp_analyze_node_operations): Remove push/pop of
2130 STMT_VINFO_DEF_TYPE.
2131 (vect_schedule_slp_instance): Likewise.
2132 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
2133 stmt_info, use the vect_is_simple_use overload combining
2134 SLP and stmt_info analysis.
2135 (vect_is_simple_cond): Likewise.
2136 (vectorizable_store): Adjust.
2137 (vectorizable_condition): Likewise.
2138 (vect_is_simple_use): Fully handle invariant SLP nodes
2139 here. Amend stmt_info operand extraction with COND_EXPR
2141 * tree-vect-loop.c (vectorizable_reduction): Deal with
2142 COND_EXPR representation ugliness.
2144 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
2147 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
2148 Refine from *vcvtps2ph_store<mask_name>.
2149 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
2150 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
2151 (*vcvtps2ph256<merge_mask_name>): New define_insn.
2152 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
2153 * config/i386/subst.md (merge_mask): New define_subst.
2154 (merge_mask_name): New define_subst_attr.
2155 (merge_mask_operand3): Ditto.
2157 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
2159 PR tree-optimization/89430
2161 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
2162 remove ssa_name_ver, store, offset fields.
2163 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
2164 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
2165 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
2168 2020-06-04 Andreas Schwab <schwab@suse.de>
2171 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
2173 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
2175 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
2176 (trunc<mode><pmov_dst_3_lower>2): Refine from
2177 trunc<mode><pmov_dst_3>2.
2179 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
2181 * match.pd (tanh/sinh -> 1/cosh): New simplification.
2183 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
2186 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
2187 is_lfs_stfs_insn and make it recognize lfs as well.
2188 (prefixed_store_p): Use is_lfs_stfs_insn().
2189 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
2191 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
2193 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
2195 (odr_enums): New static var.
2196 (struct odr_enum_val): New struct.
2197 (class odr_enum): New struct.
2198 (odr_enum_map): New hashtable.
2199 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
2200 (add_type_duplicate): Likewise.
2201 (free_odr_warning_data): Do not free TYPE_VALUES.
2202 (register_odr_enum): New function.
2203 (ipa_odr_summary_write): New function.
2204 (ipa_odr_read_section): New function.
2205 (ipa_odr_summary_read): New function.
2206 (class pass_ipa_odr): New pass.
2207 (make_pass_ipa_odr): New function.
2208 * ipa-utils.h (register_odr_enum): Declare.
2209 * lto-section-in.c: (lto_section_name): Add odr_types section.
2210 * lto-streamer.h (enum lto_section_type): Add odr_types section.
2211 * passes.def: Add odr_types pass.
2212 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
2214 (hash_tree): Likewise.
2215 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
2217 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
2219 * timevar.def (TV_IPA_ODR): New timervar.
2220 * tree-pass.h (make_pass_ipa_odr): Declare.
2221 * tree.c (free_lang_data_in_type): Regiser ODR types.
2223 2020-06-03 Romain Naour <romain.naour@gmail.com>
2225 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
2228 2020-06-03 Richard Biener <rguenther@suse.de>
2230 PR tree-optimization/95487
2231 * tree-vect-stmts.c (vectorizable_store): Use a truth type
2232 for the scatter mask.
2234 2020-06-03 Richard Biener <rguenther@suse.de>
2236 PR tree-optimization/95495
2237 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
2238 SLP_TREE_REPRESENTATIVE in the shift assertion.
2240 2020-06-03 Tom Tromey <tromey@adacore.com>
2242 * spellcheck.c (CASE_COST): New define.
2243 (BASE_COST): New define.
2244 (get_edit_distance): Recognize case changes.
2245 (get_edit_distance_cutoff): Update.
2246 (test_edit_distances): Update.
2247 (get_old_cutoff): Update.
2248 (test_find_closest_string): Add case sensitivity test.
2250 2020-06-03 Richard Biener <rguenther@suse.de>
2252 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
2253 the cost vector to unset the visited flag on stmts.
2255 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
2257 * gimplify.c (omp_notice_variable): Use new hook.
2258 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
2259 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
2260 (LANG_HOOKS_DECLS): Add it.
2261 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
2262 (lhd_omp_predetermined_mapping): New.
2263 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
2265 2020-06-03 Jan Hubicka <jh@suse.cz>
2267 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
2268 add LTO_first_tree_tag and LTO_first_gimple_tag.
2269 (lto_tag_is_tree_code_p): Update.
2270 (lto_tag_is_gimple_code_p): Update.
2271 (lto_gimple_code_to_tag): Update.
2272 (lto_tag_to_gimple_code): Update.
2273 (lto_tree_code_to_tag): Update.
2274 (lto_tag_to_tree_code): Update.
2276 2020-06-02 Felix Yang <felix.yang@huawei.com>
2279 * config/aarch64/aarch64.c (aarch64_short_vector_p):
2280 Leave later code to report an error if SVE is disabled.
2282 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2284 * config/aarch64/aarch64-cores.def (zeus): Define.
2285 * config/aarch64/aarch64-tune.md: Regenerate.
2286 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
2288 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
2291 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
2293 (is_stfs_insn): New helper function.
2295 2020-06-02 Jan Hubicka <jh@suse.cz>
2297 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
2299 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
2301 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
2303 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
2304 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
2305 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
2307 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
2310 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
2311 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
2313 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2315 * config/s390/s390.c (print_operand): Emit vector alignment
2318 2020-06-02 Martin Liska <mliska@suse.cz>
2320 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
2321 as they have variable number of counters.
2322 * gcov-dump.c (main): Add new option -r.
2323 (print_usage): Likewise.
2324 (tag_counters): All new raw format.
2325 * gcov-io.h (struct gcov_kvp): New.
2326 (GCOV_TOPN_VALUES): Remove.
2327 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
2328 (GCOV_TOPN_MEM_COUNTERS): New.
2329 (GCOV_TOPN_DISK_COUNTERS): Likewise.
2330 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
2331 * ipa-profile.c (ipa_profile_generate_summary): Use
2332 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
2333 (ipa_profile_write_edge_summary): Likewise.
2334 (ipa_profile_read_edge_summary): Likewise.
2335 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
2336 * profile.c (sort_hist_values): Sort variable number
2338 (compute_value_histograms): Special case for TOP N counters
2339 that have dynamic number of key-value pairs.
2340 * value-prof.c (dump_histogram_value): Dump variable number
2342 (stream_in_histogram_value): Stream in variable number
2343 of key-value pairs for TOP N counter.
2344 (get_nth_most_common_value): Deal with variable number
2346 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
2348 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
2350 * doc/gcov-dump.texi: Document new -r option.
2352 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
2355 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
2357 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
2359 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
2360 returns (const_int 0) for the destination, then emit nothing.
2362 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
2364 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
2365 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
2366 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
2367 LTO_const_decl_ref, LTO_imported_decl_ref,
2368 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
2369 LTO_namelist_decl_ref; add LTO_global_stream_ref.
2370 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
2371 (lto_input_scc): Update.
2372 (lto_input_tree_1): Update.
2373 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
2374 * lto-streamer.c (lto_tag_name): Update.
2376 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
2378 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
2379 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
2380 * lto-cgraph.c (lto_output_node): Likewise.
2381 (lto_output_varpool_node): Likewise.
2382 (output_offload_tables): Likewise.
2383 (input_node): Likewise.
2384 (input_varpool_node): Likewise.
2385 (input_offload_tables): Likewise.
2386 * lto-streamer-in.c (lto_input_tree_ref): Declare.
2387 (lto_input_var_decl_ref): Declare.
2388 (lto_input_fn_decl_ref): Declare.
2389 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
2390 (lto_output_var_decl_index): Rename to ..
2391 (lto_output_var_decl_ref): ... this.
2392 (lto_output_fn_decl_index): Rename to ...
2393 (lto_output_fn_decl_ref): ... this.
2394 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
2395 (DEFINE_DECL_STREAM_FUNCS): Remove.
2396 (lto_output_var_decl_index): Remove.
2397 (lto_output_fn_decl_index): Remove.
2398 (lto_output_var_decl_ref): Declare.
2399 (lto_output_fn_decl_ref): Declare.
2400 (lto_input_var_decl_ref): Declare.
2401 (lto_input_fn_decl_ref): Declare.
2403 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
2405 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
2406 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
2407 dump infomation if there is no adjusted parameter.
2408 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
2410 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
2412 * Makefile.in (gimple-array-bounds.o): New.
2413 * tree-vrp.c: Move array bounds code...
2414 * gimple-array-bounds.cc: ...here...
2415 * gimple-array-bounds.h: ...and here.
2417 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
2419 * Makefile.in (OBJS): Add value-range-equiv.o.
2420 * tree-vrp.c (*value_range_equiv*): Move to...
2421 * value-range-equiv.cc: ...here.
2422 * tree-vrp.h (class value_range_equiv): Move to...
2423 * value-range-equiv.h: ...here.
2424 * vr-values.h: Include value-range-equiv.h.
2426 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
2429 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
2430 lattice for simple pass-through by-ref argument.
2432 2020-05-31 Jeff Law <law@redhat.com>
2434 * lra.c (add_auto_inc_notes): Remove function.
2435 * reload1.c (add_auto_inc_notes): Similarly. Move into...
2436 * rtlanal.c (add_auto_inc_notes): New function.
2437 * rtl.h (add_auto_inc_notes): Add prototype.
2438 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
2441 2020-05-31 Jan Hubicka <jh@suse.cz>
2443 * lto-section-out.c (lto_output_decl_index): Remove.
2444 (lto_output_field_decl_index): Move to lto-streamer-out.c
2445 (lto_output_fn_decl_index): Move to lto-streamer-out.c
2446 (lto_output_namespace_decl_index): Remove.
2447 (lto_output_var_decl_index): Remove.
2448 (lto_output_type_decl_index): Remove.
2449 (lto_output_type_ref_index): Remove.
2450 * lto-streamer-out.c (output_type_ref): Remove.
2451 (lto_get_index): New function.
2452 (lto_output_tree_ref): Remove.
2453 (lto_indexable_tree_ref): New function.
2454 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
2455 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
2456 (stream_write_tree_ref): Update.
2457 (lto_output_tree): Update.
2458 * lto-streamer.h (lto_output_decl_index): Remove prototype.
2459 (lto_output_field_decl_index): Remove prototype.
2460 (lto_output_namespace_decl_index): Remove prototype.
2461 (lto_output_type_decl_index): Remove prototype.
2462 (lto_output_type_ref_index): Remove prototype.
2463 (lto_output_var_decl_index): Move.
2464 (lto_output_fn_decl_index): Move
2466 2020-05-31 Jakub Jelinek <jakub@redhat.com>
2469 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
2472 2020-05-31 Jeff Law <law@redhat.com>
2474 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
2476 2020-05-31 Jim Wilson <jimw@sifive.com>
2478 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
2480 2020-05-30 Jonathan Yong <10walls@gmail.com>
2482 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
2483 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
2484 import library, but also contains some functions that invoke
2485 others in KERNEL32.DLL.
2487 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
2489 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
2490 (altivec_vmrglw_direct): Ditto.
2491 (altivec_vperm_<mode>_direct): Ditto.
2492 (altivec_vperm_v8hiv16qi): Ditto.
2493 (*altivec_vperm_<mode>_uns_internal): Ditto.
2494 (*altivec_vpermr_<mode>_internal): Ditto.
2495 (vperm_v8hiv4si): Ditto.
2496 (vperm_v16qiv8hi): Ditto.
2498 2020-05-29 Jan Hubicka <jh@suse.cz>
2500 * lto-streamer-in.c (streamer_read_chain): Move here from
2502 (stream_read_tree_ref): New.
2503 (lto_input_tree_1): Simplify.
2504 * lto-streamer-out.c (stream_write_tree_ref): New.
2505 (lto_write_tree_1): Simplify.
2506 (lto_output_tree_1): Simplify.
2507 (DFS::DFS_write_tree): Simplify.
2508 (streamer_write_chain): Move here from tree-stremaer-out.c.
2509 * lto-streamer.h (lto_output_tree_ref): Update prototype.
2510 (stream_read_tree_ref): Declare
2511 (stream_write_tree_ref): Declare
2512 * tree-streamer-in.c (streamer_read_chain): Update to use
2513 stream_read_tree_ref.
2514 (lto_input_ts_common_tree_pointers): Likewise.
2515 (lto_input_ts_vector_tree_pointers): Likewise.
2516 (lto_input_ts_poly_tree_pointers): Likewise.
2517 (lto_input_ts_complex_tree_pointers): Likewise.
2518 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
2519 (lto_input_ts_decl_common_tree_pointers): Likewise.
2520 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
2521 (lto_input_ts_field_decl_tree_pointers): Likewise.
2522 (lto_input_ts_function_decl_tree_pointers): Likewise.
2523 (lto_input_ts_type_common_tree_pointers): Likewise.
2524 (lto_input_ts_type_non_common_tree_pointers): Likewise.
2525 (lto_input_ts_list_tree_pointers): Likewise.
2526 (lto_input_ts_vec_tree_pointers): Likewise.
2527 (lto_input_ts_exp_tree_pointers): Likewise.
2528 (lto_input_ts_block_tree_pointers): Likewise.
2529 (lto_input_ts_binfo_tree_pointers): Likewise.
2530 (lto_input_ts_constructor_tree_pointers): Likewise.
2531 (lto_input_ts_omp_clause_tree_pointers): Likewise.
2532 * tree-streamer-out.c (streamer_write_chain): Update to use
2533 stream_write_tree_ref.
2534 (write_ts_common_tree_pointers): Likewise.
2535 (write_ts_vector_tree_pointers): Likewise.
2536 (write_ts_poly_tree_pointers): Likewise.
2537 (write_ts_complex_tree_pointers): Likewise.
2538 (write_ts_decl_minimal_tree_pointers): Likewise.
2539 (write_ts_decl_common_tree_pointers): Likewise.
2540 (write_ts_decl_non_common_tree_pointers): Likewise.
2541 (write_ts_decl_with_vis_tree_pointers): Likewise.
2542 (write_ts_field_decl_tree_pointers): Likewise.
2543 (write_ts_function_decl_tree_pointers): Likewise.
2544 (write_ts_type_common_tree_pointers): Likewise.
2545 (write_ts_type_non_common_tree_pointers): Likewise.
2546 (write_ts_list_tree_pointers): Likewise.
2547 (write_ts_vec_tree_pointers): Likewise.
2548 (write_ts_exp_tree_pointers): Likewise.
2549 (write_ts_block_tree_pointers): Likewise.
2550 (write_ts_binfo_tree_pointers): Likewise.
2551 (write_ts_constructor_tree_pointers): Likewise.
2552 (write_ts_omp_clause_tree_pointers): Likewise.
2553 (streamer_write_tree_body): Likewise.
2554 (streamer_write_integer_cst): Likewise.
2555 * tree-streamer.h (streamer_read_chain):Declare.
2556 (streamer_write_chain):Declare.
2557 (streamer_write_tree_body): Update prototype.
2558 (streamer_write_integer_cst): Update prototype.
2560 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
2563 * configure: Regenerated.
2565 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
2567 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
2568 (add<mode>3_vcc_zext_dup_exec): Likewise.
2569 (add<mode>3_vcc_zext_dup2): Likewise.
2570 (add<mode>3_vcc_zext_dup2_exec): Likewise.
2572 2020-05-29 Richard Biener <rguenther@suse.de>
2574 PR tree-optimization/95272
2575 * tree-vectorizer.h (_slp_tree::representative): Add.
2576 (SLP_TREE_REPRESENTATIVE): Likewise.
2577 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
2579 (vectorizable_live_operation): Use the representative to
2580 attach the reduction info to.
2581 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
2582 SLP_TREE_REPRESENTATIVE.
2583 (vect_create_new_slp_node): Likewise.
2584 (slp_copy_subtree): Copy it.
2585 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
2586 (vect_slp_analyze_node_operations_1): Pass the representative
2587 to vect_analyze_stmt.
2588 (vect_schedule_slp_instance): Pass the representative to
2589 vect_transform_stmt.
2591 2020-05-29 Richard Biener <rguenther@suse.de>
2593 PR tree-optimization/95356
2594 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
2595 node hacking during analysis.
2597 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
2600 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
2602 2020-05-29 Richard Biener <rguenther@suse.de>
2604 PR tree-optimization/95403
2605 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
2608 2020-05-29 Jakub Jelinek <jakub@redhat.com>
2611 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
2612 declare variant cgraph node removal callback.
2614 2020-05-29 Jakub Jelinek <jakub@redhat.com>
2617 * expr.c (store_expr): If expr_size is constant and significantly
2618 larger than TREE_STRING_LENGTH, set temp to just the
2619 TREE_STRING_LENGTH portion of the STRING_CST.
2621 2020-05-29 Richard Biener <rguenther@suse.de>
2623 PR tree-optimization/95393
2624 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
2625 to build the min/max expression so we simplify cases like
2626 MAX(0, s) immediately.
2628 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
2630 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
2631 for unpacked EOR, ORR, AND.
2633 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
2635 * Makefile.in: don't look for libiberty in the "pic" subdirectory
2636 when building for Mingw. Add dependency on xgcc with the proper
2639 2020-05-28 Jeff Law <law@redhat.com>
2641 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
2643 2020-05-28 Jeff Law <law@redhat.com>
2645 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
2646 make a nonzero adjustment to the memory offset.
2647 (b<ior,xor>hi_msx): Turn into a splitter.
2649 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
2651 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
2652 Fix off-by-one error.
2654 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
2656 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
2657 wb_candidate1 and wb_candidate2.
2658 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
2659 wb_candidate1 and wb_candidate2 if we decided not to use them.
2661 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
2664 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
2665 we have at least some CFI operations when using a frame pointer.
2666 Only redefine the CFA if we have CFI operations.
2668 2020-05-28 Richard Biener <rguenther@suse.de>
2670 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
2671 case for !SLP_TREE_VECTYPE.
2672 (vect_slp_analyze_node_operations): Adjust.
2674 2020-05-28 Richard Biener <rguenther@suse.de>
2676 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
2677 (SLP_TREE_VEC_DEFS): Likewise.
2678 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
2679 (_slp_tree::~_slp_tree): Likewise.
2680 (vect_mask_constant_operand_p): Remove unused function.
2681 (vect_get_constant_vectors): Rename to...
2682 (vect_create_constant_vectors): ... this. Take the
2683 invariant node as argument and code generate it. Remove
2684 dead code, remove temporary asserts. Pass a NULL stmt_info
2685 to vect_init_vector.
2686 (vect_get_slp_defs): Simplify.
2687 (vect_schedule_slp_instance): Code-generate externals and
2688 invariants using vect_create_constant_vectors.
2690 2020-05-28 Richard Biener <rguenther@suse.de>
2692 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
2693 Conditionalize stmt_info use, assert the new stmt cannot throw
2695 (vect_finish_stmt_generation): Adjust assert.
2697 2020-05-28 Richard Biener <rguenther@suse.de>
2699 PR tree-optimization/95273
2700 PR tree-optimization/95356
2701 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
2702 what we set the vector type of the shift operand SLP node
2705 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
2707 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
2710 2020-05-28 Martin Liska <mliska@suse.cz>
2713 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
2714 rename ipcp-unit-growth to ipa-cp-unit-growth.
2716 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
2718 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
2719 from *avx512vl_<code>v2div2qi_store and refine memory size of
2721 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
2722 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
2723 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
2724 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
2725 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
2726 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
2727 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
2728 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
2729 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
2730 (*avx512vl_<code>v2div2si2_store_1): Ditto.
2731 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
2732 (*avx512f_<code>v8div16qi2_store_1): Ditto.
2733 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
2734 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
2735 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
2736 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
2737 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
2738 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
2739 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
2740 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
2741 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
2742 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
2743 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
2744 (*avx512vl_<code>v2div2si2_store_2): Ditto.
2745 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
2746 (*avx512f_<code>v8div16qi2_store_2): Ditto.
2747 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
2748 * config/i386/i386-builtin-types.def: Adjust builtin type.
2749 * config/i386/i386-expand.c: Ditto.
2750 * config/i386/i386-builtin.def: Adjust builtin.
2751 * config/i386/avx512fintrin.h: Ditto.
2752 * config/i386/avx512vlbwintrin.h: Ditto.
2753 * config/i386/avx512vlintrin.h: Ditto.
2755 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
2757 PR gcov-profile/95332
2758 * gcov-io.c (gcov_var::endian): Move field.
2759 (from_file): Add IN_GCOV_TOOL check.
2760 * gcov-io.h (gcov_magic): Ditto.
2762 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
2764 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
2766 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
2768 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
2770 * builtin-types.def (BT_UINT128): New primitive type.
2771 (BT_FN_UINT128_UINT128): New function type.
2772 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
2773 * doc/extend.texi (__builtin_bswap128): Document it.
2774 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
2775 (is_inexpensive_builtin): Likewise.
2776 * fold-const-call.c (fold_const_call_ss): Likewise.
2777 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
2778 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
2779 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
2780 (vectorizable_call): Likewise.
2781 * optabs.c (expand_unop): Always use the double word path for it.
2782 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
2783 * tree.h (uint128_type_node): New global type.
2784 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
2786 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
2788 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
2789 (mmx_hsubv2sf3): Ditto.
2790 (mmx_haddsubv2sf3): New expander.
2791 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
2792 RTL template to model horizontal subtraction and addition.
2793 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
2796 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
2799 * config/i386/sse.md
2800 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
2801 Remove %q operand modifier from insn template.
2802 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
2804 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
2806 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
2807 Enable insn pattern for TARGET_MMX_WITH_SSE.
2808 (*mmx_movshdup): New insn pattern.
2809 (*mmx_movsldup): Ditto.
2810 (*mmx_movss): Ditto.
2811 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
2813 (expand_vec_perm_movs): Handle E_V2SFmode.
2814 (expand_vec_perm_even_odd): Ditto.
2815 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
2816 is already handled by standard shuffle patterns.
2818 2020-05-27 Richard Biener <rguenther@suse.de>
2820 PR tree-optimization/95295
2821 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
2822 merging stores from paths.
2824 2020-05-27 Richard Biener <rguenther@suse.de>
2826 PR tree-optimization/95356
2827 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
2828 type for the shift operand.
2830 2020-05-27 Richard Biener <rguenther@suse.de>
2832 PR tree-optimization/95335
2833 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
2834 lvisited for nodes made external.
2836 2020-05-27 Richard Biener <rguenther@suse.de>
2838 * dump-context.h (debug_dump_context): New class.
2839 (dump_context): Make it friend.
2840 * dumpfile.c (debug_dump_context::debug_dump_context):
2842 (debug_dump_context::~debug_dump_context): Likewise.
2843 * tree-vect-slp.c: Include dump-context.h.
2844 (vect_print_slp_tree): Dump a single SLP node.
2845 (debug): New overload for slp_tree.
2846 (vect_print_slp_graph): Rename from vect_print_slp_tree and
2848 (vect_analyze_slp_instance): Adjust.
2850 2020-05-27 Jakub Jelinek <jakub@redhat.com>
2853 * omp-general.c (omp_declare_variant_remove_hook): New function.
2854 (omp_resolve_declare_variant): Always return base if it is already
2855 declare_variant_alt magic decl itself. Register
2856 omp_declare_variant_remove_hook as cgraph node removal hook.
2858 2020-05-27 Jeff Law <law@redhat.com>
2860 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
2861 for the primary input operand.
2862 (tstsi_variable_bit_qi): Similarly.
2864 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
2866 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
2868 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
2871 * ipa-utils.h (odr_type_p): Also permit calls with
2872 only flag_generate_offload set.
2874 2020-05-26 Alexandre Oliva <oliva@adacore.com>
2876 * gcc.c (validate_switches): Add braced parameter. Adjust all
2877 callers. Expected and skip trailing brace only if braced.
2878 Return after handling one atom otherwise.
2879 (DUMPS_OPTIONS): New.
2880 (cpp_debug_options): Define in terms of it.
2882 2020-05-26 Richard Biener <rguenther@suse.de>
2884 PR tree-optimization/95327
2885 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
2886 when we are not using a scalar shift.
2888 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
2890 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
2891 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
2892 Handle E_V2SImode and E_V4HImode.
2893 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
2894 Assert that E_V2SImode is already handled.
2895 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
2896 is already handled by standard shuffle patterns.
2898 2020-05-26 Jan Hubicka <jh@suse.cz>
2900 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
2903 2020-05-26 Jakub Jelinek <jakub@redhat.com>
2906 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
2907 * omp-general.h (find_combined_omp_for): Declare.
2908 * omp-general.c: Include tree-iterator.h.
2909 (find_combined_omp_for): New function, moved from gimplify.c.
2911 2020-05-26 Alexandre Oliva <oliva@adacore.com>
2913 * common.opt (aux_base_name): Define.
2914 (dumpbase, dumpdir): Mark as Driver options.
2915 (-dumpbase, -dumpdir): Likewise.
2916 (dumpbase-ext, -dumpbase-ext): New.
2917 (auxbase, auxbase-strip): Drop.
2918 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
2920 (-o): Introduce the notion of primary output, mention it
2921 influences auxiliary and dump output names as well, add
2923 (-save-temps): Adjust, move examples into -dump*.
2924 (-save-temps=cwd, -save-temps=obj): Likewise.
2925 (-fdump-final-insns): Adjust.
2926 * dwarf2out.c (gen_producer_string): Drop auxbase and
2927 auxbase_strip; add dumpbase_ext.
2928 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
2929 (save_temps_prefix, save_temps_length): Drop.
2930 (save_temps_overrides_dumpdir): New.
2931 (dumpdir, dumpbase, dumpbase_ext): New.
2932 (dumpdir_length, dumpdir_trailing_dash_added): New.
2933 (outbase, outbase_length): New.
2934 (The Specs Language): Introduce %". Adjust %b and %B.
2935 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
2936 Precede object file with %w when it's the primary output.
2937 (cpp_debug_options): Do not pass on incoming -dumpdir,
2938 -dumpbase and -dumpbase-ext options; recompute them with
2940 (cc1_options): Drop auxbase with and without compare-debug;
2941 use cpp_debug_options instead of dumpbase. Mark asm output
2942 with %w when it's the primary output.
2943 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
2944 %:replace-exception. Add %:dumps.
2945 (driver_handle_option): Implement -save-temps=*/-dumpdir
2946 mutual overriding logic. Save dumpdir, dumpbase and
2947 dumpbase-ext options. Do not save output_file in
2949 (adds_single_suffix_p): New.
2950 (single_input_file_index): New.
2951 (process_command): Combine output dir, output base name, and
2952 dumpbase into dumpdir and outbase.
2953 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
2954 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
2955 and outbase instead of input_basename in %b, %B and in
2956 -save-temps aux files. Handle empty argument %".
2957 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
2958 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
2959 naming. Spec-quote the computed -fdump-final-insns file name.
2960 (debug_auxbase_opt): Drop.
2961 (compare_debug_self_opt_spec_function): Drop auxbase-strip
2963 (compare_debug_auxbase_opt_spec_function): Drop.
2964 (not_actual_file_p): New.
2965 (replace_extension_spec_func): Drop.
2966 (dumps_spec_func): New.
2967 (convert_white_space): Split-out parts into...
2968 (quote_string, whitespace_to_convert_p): ... these. New.
2969 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
2970 (driver::finalize): Release and reset new variables; drop
2972 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
2973 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
2974 empty string otherwise.
2975 (DUMPBASE_SUFFIX): Drop leading period.
2976 (debug_objcopy): Use concat.
2977 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
2978 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
2979 component. Simplify temp file names.
2980 * opts.c (finish_options): Drop aux base name handling.
2981 (common_handle_option): Drop auxbase-strip handling.
2982 * toplev.c (print_switch_values): Drop auxbase, add
2984 (process_options): Derive aux_base_name from dump_base_name
2986 (lang_dependent_init): Compute dump_base_ext along with
2987 dump_base_name. Disable stack usage and callgraph-info during
2988 lto generation and compare-debug recompilation.
2990 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
2991 Uroš Bizjak <ubizjak@gmail.com>
2995 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
2996 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
2997 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
2998 float<floatunssuffix>v2div2sf2.
2999 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
3000 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
3001 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
3002 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
3003 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
3004 * config/i386/i386-builtin.def: Ditto.
3005 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
3006 subregs when both omode and imode are vector mode and
3007 have the same inner mode.
3009 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
3011 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
3012 Only turn MEM_REFs into bit-field stores for small bit-field regions.
3013 (imm_store_chain_info::output_merged_store): Be prepared for sources
3014 with non-integral type in the bit-field insertion case.
3015 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
3016 the largest size for the bit-field case.
3018 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
3020 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
3021 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
3022 (*vec_dupv4hi): Redefine as define_insn.
3023 Remove alternative with general register input.
3024 (*vec_dupv2si): Ditto.
3026 2020-05-25 Richard Biener <rguenther@suse.de>
3028 PR tree-optimization/95309
3029 * tree-vect-slp.c (vect_get_constant_vectors): Move number
3030 of vector computation ...
3031 (vect_slp_analyze_node_operations): ... to analysis phase.
3033 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
3035 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
3036 * lto-streamer.h (streamer_debugging): New constant
3037 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
3038 streamer_debugging check.
3039 (streamer_get_pickled_tree): Likewise.
3040 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
3042 2020-05-25 Richard Biener <rguenther@suse.de>
3044 PR tree-optimization/95308
3045 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
3046 test for TARGET_MEM_REFs.
3048 2020-05-25 Richard Biener <rguenther@suse.de>
3050 PR tree-optimization/95295
3051 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
3052 RHSes and drop to full sm_other if they are not equal.
3054 2020-05-25 Richard Biener <rguenther@suse.de>
3056 PR tree-optimization/95271
3057 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
3058 children vector type.
3059 (vectorizable_call): Pass down slp ops.
3061 2020-05-25 Richard Biener <rguenther@suse.de>
3063 PR tree-optimization/95297
3064 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
3065 skip updating operand 1 vector type.
3067 2020-05-25 Richard Biener <rguenther@suse.de>
3069 PR tree-optimization/95284
3070 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
3073 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
3076 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
3077 (trunc<mode><sf2dfmode_lower>2) New expander.
3078 (extend<sf2dfmode_lower><mode>2): Ditto.
3080 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
3082 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
3083 ubsan_{data,type},ASAN symbols linker-visible.
3085 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3087 * lto-streamer-out.c (DFS::DFS): Silence warning.
3089 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
3092 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
3093 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
3095 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3097 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
3100 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3102 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
3103 * lto-streamer-out.c (create_output_block): Fix whitespace
3104 (lto_write_tree_1): Add (debug) dump.
3105 (DFS::DFS): Add dump.
3106 (DFS::DFS_write_tree_body): Do not dump here.
3107 (lto_output_tree): Improve dumping; do not stream ref when not needed.
3108 (produce_asm_for_decls): Fix whitespace.
3109 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
3110 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
3112 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
3115 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
3116 (truncv32hiv32qi2): Ditto.
3117 (trunc<ssedoublemodelower><mode>2): Ditto.
3118 (trunc<mode><pmov_dst_3>2): Ditto.
3119 (trunc<mode><pmov_dst_mode_4>2): Ditto.
3120 (truncv2div2si2): Ditto.
3121 (truncv8div8qi2): Ditto.
3122 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
3123 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
3124 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
3125 *avx512vl_<code><mode>v<ssescalarnum>qi2.
3127 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
3130 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
3133 2020-05-22 Richard Biener <rguenther@suse.de>
3135 PR tree-optimization/95268
3136 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
3139 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3141 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
3144 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
3146 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
3147 (lto_input_scc): Optimize streaming of entry lengths.
3148 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
3149 (DFS::DFS): Optimize stremaing of entry lengths
3151 2020-05-22 Richard Biener <rguenther@suse.de>
3154 * doc/invoke.texi (flto): Document behavior of diagnostic
3157 2020-05-22 Richard Biener <rguenther@suse.de>
3159 * tree-vectorizer.h (vect_is_simple_use): New overload.
3160 (vect_maybe_update_slp_op_vectype): New.
3161 * tree-vect-stmts.c (vect_is_simple_use): New overload
3162 accessing operands of SLP vs. non-SLP operation transparently.
3163 (vect_maybe_update_slp_op_vectype): New function updating
3164 the possibly shared SLP operands vector type.
3165 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
3166 using the new vect_is_simple_use overload; update SLP invariant
3167 operand nodes vector type.
3168 (vectorizable_comparison): Likewise.
3169 (vectorizable_call): Likewise.
3170 (vectorizable_conversion): Likewise.
3171 (vectorizable_shift): Likewise.
3172 (vectorizable_store): Likewise.
3173 (vectorizable_condition): Likewise.
3174 (vectorizable_assignment): Likewise.
3175 * tree-vect-loop.c (vectorizable_reduction): Likewise.
3176 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
3177 present SLP_TREE_VECTYPE and check it matches previous
3180 2020-05-22 Richard Biener <rguenther@suse.de>
3182 PR tree-optimization/95248
3183 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
3185 2020-05-22 Richard Biener <rguenther@suse.de>
3187 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
3188 (_slp_tree::~_slp_tree): Likewise.
3189 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
3191 (_slp_tree::~_slp_tree): Implement.
3192 (vect_free_slp_tree): Simplify.
3193 (vect_create_new_slp_node): Likewise. Add nops parameter.
3194 (vect_build_slp_tree_2): Adjust.
3195 (vect_analyze_slp_instance): Likewise.
3197 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3199 * adjust-alignment.c: Include memmodel.h.
3201 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
3204 * config/i386/cpuid.h: Use hexadecimal in comments.
3206 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
3209 * config/i386/i386-builtins.c (processor_features): Move
3210 F_AVX512VP2INTERSECT after F_AVX512BF16.
3211 (isa_names_table): Likewise.
3213 2020-05-21 Martin Liska <mliska@suse.cz>
3215 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
3216 Handle OPT_moutline_atomics.
3217 * config/aarch64/aarch64.c: Add outline-atomics to
3219 * doc/extend.texi: Document the newly added target attribute.
3221 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
3225 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
3226 operands 1 and 2 commutative. Manually swap operands.
3227 (*mmx_nabsv2sf2): Ditto.
3230 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
3232 * config/i386/i386.md (*<code>tf2_1):
3233 Mark operands 1 and 2 commutative.
3234 (*nabstf2_1): Ditto.
3235 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
3236 commutative. Do not swap operands.
3237 (*nabs<mode>2): Ditto.
3239 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
3242 * config/i386/sse.md (<code>v8qiv8hi2): Use
3243 simplify_gen_subreg instead of simplify_subreg.
3244 (<code>v8qiv8si2): Ditto.
3245 (<code>v4qiv4si2): Ditto.
3246 (<code>v4hiv4si2): Ditto.
3247 (<code>v8qiv8di2): Ditto.
3248 (<code>v4qiv4di2): Ditto.
3249 (<code>v2qiv2di2): Ditto.
3250 (<code>v4hiv4di2): Ditto.
3251 (<code>v2hiv2di2): Ditto.
3252 (<code>v2siv2di2): Ditto.
3254 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
3257 * config/i386/i386.md (*pushsi2_rex64):
3258 Use "e" constraint instead of "i".
3260 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
3262 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
3263 (lto_input_tree_1): Strenghten sanity check.
3264 (lto_input_tree): Update call of lto_input_scc.
3265 * lto-streamer-out.c: Include ipa-utils.h
3266 (create_output_block): Initialize local_trees if merigng is going
3268 (destroy_output_block): Destroy local_trees.
3269 (DFS): Add max_local_entry.
3270 (local_tree_p): New function.
3271 (DFS::DFS): Initialize and maintain it.
3272 (DFS::DFS_write_tree): Decide on streaming format.
3273 (lto_output_tree): Stream inline singleton SCCs
3274 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
3275 (struct output_block): Add local_trees.
3276 (lto_input_scc): Update prototype.
3278 2020-05-20 Patrick Palka <ppalka@redhat.com>
3281 * hash-table.h (hash_table::find_with_hash): Move up the call to
3284 2020-05-20 Martin Liska <mliska@suse.cz>
3286 * lto-compress.c (lto_compression_zstd): Fill up
3287 num_compressed_il_bytes.
3288 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
3290 2020-05-20 Richard Biener <rguenther@suse.de>
3292 PR tree-optimization/95219
3293 * tree-vect-loop.c (vectorizable_induction): Reduce
3294 group_size before computing the number of required IVs.
3296 2020-05-20 Richard Biener <rguenther@suse.de>
3299 * tree-inline.c (remap_gimple_stmt): Revert adjusting
3300 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
3302 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3303 Andre Vieira <andre.simoesdiasvieira@arm.com>
3306 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
3308 (mve_vector_mem_operand): Likewise.
3309 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
3310 the load from memory to a core register is legitimate for give mode.
3311 (mve_vector_mem_operand): Define function.
3312 (arm_print_operand): Modify comment.
3313 (arm_mode_base_reg_class): Define.
3314 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
3315 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
3316 * config/arm/constraints.md (Ux): Likewise.
3318 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
3319 add support for missing Vector Store Register and Vector Load Register.
3320 Add a new alternative to support load from memory to PC (or label) in
3322 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
3323 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
3324 mve_memory_operand and also modify the MVE instructions to emit.
3325 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
3326 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
3327 mve_memory_operand and also modify the MVE instructions to emit.
3328 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
3329 mve_memory_operand and also modify the MVE instructions to emit.
3330 (mve_vldrhq_z_fv8hf): Likewise.
3331 (mve_vldrhq_z_<supf><mode>): Likewise.
3332 (mve_vldrwq_fv4sf): Likewise.
3333 (mve_vldrwq_<supf>v4si): Likewise.
3334 (mve_vldrwq_z_fv4sf): Likewise.
3335 (mve_vldrwq_z_<supf>v4si): Likewise.
3336 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
3337 (mve_vld1q_<supf><mode>): Likewise.
3338 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
3340 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
3341 mve_memory_operand and also modify the MVE instructions to emit.
3342 (mve_vstrhq_p_<supf><mode>): Likewise.
3343 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
3345 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
3346 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
3347 instructions to emit.
3348 (mve_vstrwq_p_<supf>v4si): Likewise.
3349 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
3350 * config/arm/predicates.md (mve_memory_operand): Define.
3352 2020-05-30 Richard Biener <rguenther@suse.de>
3355 * c-fold.c (c_fully_fold_internal): Enhance guard on
3358 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
3361 * Makefile.in (OBJS): Add adjust-alignment.o.
3362 * adjust-alignment.c (pass_data_adjust_alignment): New.
3363 (pass_adjust_alignment): New.
3364 (pass_adjust_alignment::execute): New.
3365 (make_pass_adjust_alignment): New.
3366 * tree-pass.h (make_pass_adjust_alignment): New.
3367 * passes.def: Add pass_adjust_alignment.
3369 2020-05-19 Alex Coplan <alex.coplan@arm.com>
3372 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
3373 identity permutation.
3375 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3377 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
3378 msp430_small, msp430_large and size24plus DejaGNU effective
3380 Improve grammar in descriptions for size20plus and size32plus effective
3383 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
3385 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
3386 callee saved registers only in xBPF.
3387 (bpf_expand_prologue): Save callee saved registers only in xBPF.
3388 (bpf_expand_epilogue): Likewise for restoring.
3389 * doc/invoke.texi (eBPF Options): Document this is activated by
3392 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
3394 * config/bpf/bpf.opt (mxbpf): New option.
3395 * doc/invoke.texi (Option Summary): Add -mxbpf.
3396 (eBPF Options): Document -mxbbpf.
3398 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
3401 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
3402 (<code>v32qiv32hi2): Ditto.
3403 (<code>v8qiv8hi2): Ditto.
3404 (<code>v16qiv16si2): Ditto.
3405 (<code>v8qiv8si2): Ditto.
3406 (<code>v4qiv4si2): Ditto.
3407 (<code>v16hiv16si2): Ditto.
3408 (<code>v8hiv8si2): Ditto.
3409 (<code>v4hiv4si2): Ditto.
3410 (<code>v8qiv8di2): Ditto.
3411 (<code>v4qiv4di2): Ditto.
3412 (<code>v2qiv2di2): Ditto.
3413 (<code>v8hiv8di2): Ditto.
3414 (<code>v4hiv4di2): Ditto.
3415 (<code>v2hiv2di2): Ditto.
3416 (<code>v8siv8di2): Ditto.
3417 (<code>v4siv4di2): Ditto.
3418 (<code>v2siv2di2): Ditto.
3420 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
3422 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
3423 (riscv_implied_info): New.
3424 (riscv_subset_list): Add handle_implied_ext.
3425 (riscv_subset_list::to_string): New parameter version_p to
3426 control output format.
3427 (riscv_subset_list::handle_implied_ext): New.
3428 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
3429 (riscv_arch_str): New parameter version_p to control output format.
3430 (riscv_expand_arch): New.
3431 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
3433 * config/riscv/riscv.h (riscv_expand_arch): New,
3434 (EXTRA_SPEC_FUNCTIONS): Define.
3435 (ASM_SPEC): Transform -march= via riscv_expand_arch.
3437 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
3439 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
3440 parse_multiletter_ext.
3441 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
3442 adjust parsing order for 's' and 'x'.
3444 2020-05-19 Richard Biener <rguenther@suse.de>
3446 * tree-vectorizer.h (_slp_tree::vectype): Add field.
3447 (SLP_TREE_VECTYPE): New.
3448 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
3450 (vect_create_new_slp_node): Likewise.
3451 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
3453 (vect_slp_analyze_node_operations): Walk nodes children for
3455 (vect_get_constant_vectors): Use local scope op variable.
3456 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
3457 (vect_model_simple_cost): Adjust.
3458 (vect_model_store_cost): Likewise.
3459 (vectorizable_store): Likewise.
3461 2020-05-18 Martin Sebor <msebor@redhat.com>
3464 * tree-object-size.c (decl_init_size): New function.
3465 (addr_object_size): Call it.
3466 * tree.h (last_field): Declare.
3467 (first_field): Add attribute nonnull.
3469 2020-05-18 Martin Sebor <msebor@redhat.com>
3472 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
3473 * tree.c (component_ref_size): Correct the handling or array members
3475 Drop a pointless test.
3476 Rename a local variable.
3478 2020-05-18 Jason Merrill <jason@redhat.com>
3480 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
3481 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
3483 2020-05-14 Jason Merrill <jason@redhat.com>
3485 * doc/install.texi (Prerequisites): Update boostrap compiler
3486 requirement to C++11/GCC 4.8.
3488 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3490 PR tree-optimization/94952
3491 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
3492 Initialize variables bitpos, bitregion_start, and bitregion_end in
3493 order to silence warnings about use of uninitialized variables.
3495 2020-05-18 Carl Love <cel@us.ibm.com>
3498 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
3499 first_match_index_<mode>.
3500 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
3501 additional test cases with zero vector elements.
3503 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
3506 * config/i386/i386-expand.c (ix86_expand_int_movcc):
3507 Avoid reversing a non-trapping comparison to a trapping one.
3509 2020-05-18 Alex Coplan <alex.coplan@arm.com>
3511 * config/arm/arm.c (output_move_double): Fix codegen when loading into
3512 a register pair with an odd base register.
3514 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
3516 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
3517 Do not emit FLAGS_REG clobber for TFmode.
3518 * config/i386/i386.md (*<code>tf2_1): Rewrite as
3519 define_insn_and_split. Mark operands 1 and 2 commutative.
3520 (*nabstf2_1): Ditto.
3521 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
3522 Do not swap memory operands. Simplify RTX generation.
3523 (neg abs SSE splitter): Ditto.
3524 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
3525 commutative. Do not swap operands. Simplify RTX generation.
3526 (*nabs<mode>2): Ditto.
3528 2020-05-18 Richard Biener <rguenther@suse.de>
3530 * tree-vect-slp.c (vect_slp_bb): Start after labels.
3531 (vect_get_constant_vectors): Really place init stmt after scalar defs.
3532 * tree-vect-stmts.c (vect_init_vector_1): Insert before
3535 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
3537 * config/i386/driver-i386.c (host_detect_local_cpu): Support
3538 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
3541 2020-05-18 Richard Biener <rguenther@suse.de>
3544 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
3545 when inlining into a non-call EH function.
3547 2020-05-18 Richard Biener <rguenther@suse.de>
3549 PR tree-optimization/95172
3550 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
3551 eventually need the conditional processing.
3552 (execute_sm_exit): When processing an orderd sequence
3553 avoid doing any conditional processing.
3554 (hoist_memory_references): Pass down whether all edges
3555 have ordered processing for a ref to execute_sm.
3557 2020-05-17 Jeff Law <law@redhat.com>
3559 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
3560 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
3561 into a single pattern using pc_or_label_operand.
3562 * config/h8300/combiner.md (bit branch patterns): Likewise.
3563 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
3565 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
3568 * config/i386/i386-features.c (has_non_address_hard_reg):
3570 (pseudo_reg_set): This. Return the SET expression. Ignore
3571 pseudo register push.
3572 (general_scalar_to_vector_candidate_p): Combine single_set and
3573 has_non_address_hard_reg calls to pseudo_reg_set.
3574 (timode_scalar_to_vector_candidate_p): Likewise.
3575 * config/i386/i386.md (*pushv1ti2): New pattern.
3577 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3580 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3582 * tree-vrp.c (operand_less_p): Move to...
3583 * vr-values.c (operand_less_p): ...here.
3584 * tree-vrp.h (operand_less_p): Remove.
3586 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3588 * tree-vrp.c (operand_less_p): Move to...
3589 * vr-values.c (operand_less_p): ...here.
3590 * tree-vrp.h (operand_less_p): Remove.
3592 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3594 * tree-vrp.c (class vrp_insert): Remove prototype for
3597 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3599 * tree-vrp.c (class live_names): New.
3600 (live_on_edge): Move into live_names.
3601 (build_assert_expr_for): Move into vrp_insert.
3602 (find_assert_locations_in_bb): Rename from
3603 find_assert_locations_1.
3604 (process_assert_insertions_for): Move into vrp_insert.
3605 (compare_assert_loc): Same.
3606 (remove_range_assertions): Same.
3607 (dump_asserts_for): Rename to vrp_insert::dump.
3608 (debug_asserts_for): Rename to vrp_insert::debug.
3609 (dump_all_asserts): Rename to vrp_insert::dump.
3610 (debug_all_asserts): Rename to vrp_insert::debug.
3612 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
3614 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
3615 check_array_ref, check_mem_ref, and search_for_addr_array
3617 (class array_bounds_checker): ...here.
3618 (class check_array_bounds_dom_walker): Adjust to use
3619 array_bounds_checker.
3620 (check_all_array_refs): Move into array_bounds_checker and rename
3622 (class vrp_folder): Make fold_predicate_in private.
3624 2020-05-15 Jeff Law <law@redhat.com>
3626 * config/h8300/h8300.md (SFI iterator): New iterator for
3628 * config/h8300/peepholes.md (memory comparison): Use mode
3629 iterator to consolidate 3 patterns into one.
3630 (stack allocation and stack store): Handle SFmode. Handle
3633 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
3635 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
3636 RS6000_BTM_POWERPC64.
3638 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
3640 * config/i386/i386.md (SWI48DWI): New mode iterator.
3641 (*push<mode>2): Allow XMM registers.
3642 (*pushdi2_rex64): Ditto.
3643 (*pushsi2_rex64): Ditto.
3645 (push XMM reg splitter): New splitter
3647 (*pushdf) Change "x" operand constraint to "v".
3648 (*pushsf_rex64): Ditto.
3651 2020-05-15 Richard Biener <rguenther@suse.de>
3653 PR tree-optimization/92260
3654 * tree-vect-slp.c (vect_get_constant_vectors): Compute
3655 the number of vector stmts in a canonical way.
3657 2020-05-15 Martin Liska <mliska@suse.cz>
3659 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
3662 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
3664 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
3666 2020-05-15 Richard Biener <rguenther@suse.de>
3668 PR tree-optimization/95133
3669 * gimple-ssa-split-paths.c
3670 (find_block_to_duplicate_for_splitting_paths): Check for
3673 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
3675 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
3677 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
3679 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
3682 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
3683 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
3686 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
3689 * config/i386/i386.md (isa): Add sse3_noavx.
3690 (enabled): Handle sse3_noavx.
3692 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
3693 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
3694 alternatives. Match commutative vec_select selector operands.
3695 (*mmx_haddv2sf3_low): New insn pattern.
3697 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
3698 (*mmx_hsubv2sf3_low): New insn pattern.
3700 2020-05-15 Richard Biener <rguenther@suse.de>
3702 PR tree-optimization/33315
3703 * tree-ssa-sink.c: Include tree-eh.h.
3704 (sink_stats): Add commoned member.
3705 (sink_common_stores_to_bb): New function implementing store
3706 commoning by sinking to the successor.
3707 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
3708 (pass_sink_code::execute): Likewise. Record commoned stores
3711 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
3713 PR rtl-optimization/37451, part of PR target/61837
3714 * loop-doloop.c (doloop_simplify_count): New function. Simplify
3715 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
3716 (doloop_modify): Call doloop_simplify_count.
3718 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
3721 * doc/sourcebuild.texi: Document effective target lgccjit.
3723 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
3725 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
3726 define_expand, and rename the original to ...
3727 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
3728 (add<mode>3_zext_dup_exec): Likewise, with ...
3729 (add<mode>3_vcc_zext_dup_exec): ... this.
3730 (add<mode>3_zext_dup2): Likewise, with ...
3731 (add<mode>3_zext_dup_exec): ... this.
3732 (add<mode>3_zext_dup2_exec): Likewise, with ...
3733 (add<mode>3_zext_dup2): ... this.
3734 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
3735 addv64di3_zext* calls to use addv64di3_vcc_zext*.
3737 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
3740 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
3741 (extendv2sfv2df2): Ditto.
3743 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
3745 * configure: Regenerated.
3747 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
3749 * config/arm/arm.c (reg_needs_saving_p): New function.
3750 (use_return_insn): Use reg_needs_saving_p.
3751 (arm_get_vfp_saved_size): Likewise.
3752 (arm_compute_frame_layout): Likewise.
3753 (arm_save_coproc_regs): Likewise.
3754 (thumb1_expand_epilogue): Likewise.
3755 (arm_expand_epilogue_apcs_frame): Likewise.
3756 (arm_expand_epilogue): Likewise.
3758 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
3760 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
3762 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
3765 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
3767 (floatv2siv2df2): New expander.
3768 (floatunsv2siv2df2): New insn pattern.
3770 (fix_truncv2dfv2si2): New expander.
3771 (fixuns_truncv2dfv2si2): New insn pattern.
3773 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
3776 * config/aarch64/aarch64-sve-builtins.cc
3777 (handle_arm_sve_vector_bits_attribute): Create a copy of the
3778 original type's TYPE_MAIN_VARIANT, then reapply all the differences
3779 between the original type and its main variant.
3781 2020-05-14 Richard Biener <rguenther@suse.de>
3784 * real.c (real_to_decimal_for_mode): Make sure we handle
3785 a zero with nonzero exponent.
3787 2020-05-14 Jakub Jelinek <jakub@redhat.com>
3789 * Makefile.in (GTFILES): Add omp-general.c.
3790 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
3791 calls_declare_variant_alt members and initialize them in the
3793 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
3794 calls to declare_variant_alt nodes.
3795 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
3796 and calls_declare_variant_alt.
3797 (input_overwrite_node): Read them back.
3798 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
3800 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
3802 (tree_function_versioning): Copy calls_declare_variant_alt bit.
3803 * omp-offload.c (execute_omp_device_lower): Call
3804 omp_resolve_declare_variant on direct function calls.
3805 (pass_omp_device_lower::gate): Also enable for
3806 calls_declare_variant_alt functions.
3807 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
3808 (omp_context_selector_matches): Handle the case when
3809 cfun->curr_properties has PROP_gimple_any bit set.
3810 (struct omp_declare_variant_entry): New type.
3811 (struct omp_declare_variant_base_entry): New type.
3812 (struct omp_declare_variant_hasher): New type.
3813 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
3815 (omp_declare_variants): New variable.
3816 (struct omp_declare_variant_alt_hasher): New type.
3817 (omp_declare_variant_alt_hasher::hash,
3818 omp_declare_variant_alt_hasher::equal): New methods.
3819 (omp_declare_variant_alt): New variables.
3820 (omp_resolve_late_declare_variant): New function.
3821 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
3822 when called late. Create a magic declare_variant_alt fndecl and
3823 cgraph node and return that if decision needs to be deferred until
3824 after gimplification.
3825 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
3829 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
3830 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
3831 entry block if info->after_stmt is NULL, otherwise add after that stmt
3832 and update it after adding each stmt.
3833 (ipa_simd_modify_function_body): Initialize info.after_stmt.
3835 * function.h (struct function): Add has_omp_target bit.
3836 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
3838 (omp_discover_declare_target_tgt_fn_r): ... this.
3839 (omp_discover_declare_target_var_r): Call
3840 omp_discover_declare_target_tgt_fn_r instead of
3841 omp_discover_declare_target_fn_r.
3842 (omp_discover_implicit_declare_target): Also queue functions with
3843 has_omp_target bit set, for those walk with
3844 omp_discover_declare_target_fn_r, for declare target to functions
3845 walk with omp_discover_declare_target_tgt_fn_r.
3847 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
3850 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
3851 Add SSE/AVX alternative. Change operand predicates from
3852 nonimmediate_operand to register_mmxmem_operand.
3853 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3854 (fix_truncv2sfv2si2): New expander.
3855 (fixuns_truncv2sfv2si2): New insn pattern.
3857 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
3858 Add SSE/AVX alternative. Change operand predicates from
3859 nonimmediate_operand to register_mmxmem_operand.
3860 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3861 (floatv2siv2sf2): New expander.
3862 (floatunsv2siv2sf2): New insn pattern.
3864 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
3866 (IX86_BUILTIN_PI2FD): Ditto.
3868 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
3870 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
3872 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
3875 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
3877 * config/s390/s390.c (allocate_stack_space): Add missing updates
3878 of last_probe_offset.
3880 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
3882 * config/s390/s390.md ("allocate_stack"): Call
3883 anti_adjust_stack_and_probe_stack_clash when stack clash
3884 protection is enabled.
3885 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
3886 prototype. Remove static.
3887 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
3890 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
3892 * config/rs6000/altivec.h (vec_extractl): New #define.
3893 (vec_extracth): Likewise.
3894 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
3895 (UNSPEC_EXTRACTR): Likewise.
3896 (vextractl<mode>): New expansion.
3897 (vextractl<mode>_internal): New insn.
3898 (vextractr<mode>): New expansion.
3899 (vextractr<mode>_internal): New insn.
3900 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
3901 New built-in function.
3902 (__builtin_altivec_vextduhvlx): Likewise.
3903 (__builtin_altivec_vextduwvlx): Likewise.
3904 (__builtin_altivec_vextddvlx): Likewise.
3905 (__builtin_altivec_vextdubvhx): Likewise.
3906 (__builtin_altivec_vextduhvhx): Likewise.
3907 (__builtin_altivec_vextduwvhx): Likewise.
3908 (__builtin_altivec_vextddvhx): Likewise.
3909 (__builtin_vec_extractl): New overloaded built-in function.
3910 (__builtin_vec_extracth): Likewise.
3911 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
3912 Define overloaded forms of __builtin_vec_extractl and
3913 __builtin_vec_extracth.
3914 (builtin_function_type): Add cases to mark arguments of new
3915 built-in functions as unsigned.
3916 (rs6000_common_init_builtins): Add
3917 opaque_ftype_opaque_opaque_opaque_opaque.
3918 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
3919 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
3920 for a Future Architecture): Add description of vec_extractl and
3921 vec_extractr built-in functions.
3923 2020-05-13 Richard Biener <rguenther@suse.de>
3925 * target.def (add_stmt_cost): Add new vectype parameter.
3926 * targhooks.c (default_add_stmt_cost): Adjust.
3927 * targhooks.h (default_add_stmt_cost): Likewise.
3928 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
3930 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
3931 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
3932 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
3934 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
3935 (dump_stmt_cost): Add new vectype parameter.
3936 (add_stmt_cost): Likewise.
3937 (record_stmt_cost): Likewise.
3938 (record_stmt_cost): Add overload with old signature.
3939 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
3941 (vect_get_known_peeling_cost): Likewise.
3942 (vect_estimate_min_profitable_iters): Likewise.
3943 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
3944 * tree-vect-stmts.c (record_stmt_cost): Likewise.
3945 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
3946 and pass down correct vectype and NULL stmt_info.
3947 (vect_model_simple_cost): Adjust.
3948 (vect_model_store_cost): Likewise.
3950 2020-05-13 Richard Biener <rguenther@suse.de>
3952 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
3953 (_slp_instance::group_size): Likewise.
3954 * tree-vect-loop.c (vectorizable_reduction): The group size
3955 is the number of lanes in the node.
3956 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
3957 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
3958 verify it matches the instance trees number of lanes.
3959 (vect_slp_analyze_node_operations_1): Use the numer of lanes
3960 in the node as group size.
3961 (vect_bb_vectorization_profitable_p): Use the instance root
3962 number of lanes for the size of life.
3963 (vect_schedule_slp_instance): Use the number of lanes as
3965 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
3966 parameter. Use the number of lanes of the load for the group
3967 size in the gap adjustment code.
3968 (vect_analyze_stmt): Adjust.
3969 (vect_transform_stmt): Likewise.
3971 2020-05-13 Jakub Jelinek <jakub@redhat.com>
3974 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
3975 if the last insn is a note.
3977 PR tree-optimization/95060
3978 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
3979 if it is the single use of the FMA internal builtin.
3981 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
3983 PR tree-optimization/94969
3984 * tree-data-dependence.c (constant_access_functions): Rename to...
3985 (invariant_access_functions): ...this. Add parameter. Check for
3986 invariant access function, rather than constant.
3987 (build_classic_dist_vector): Call above function.
3988 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
3990 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
3993 * doc/extend.texi (x86Operandmodifiers): Document more x86
3995 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
3997 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
3999 * tree-vrp.c (class vrp_insert): New.
4000 (insert_range_assertions): Move to class vrp_insert.
4001 (dump_all_asserts): Same as above.
4002 (dump_asserts_for): Same as above.
4003 (live): Same as above.
4004 (need_assert_for): Same as above.
4005 (live_on_edge): Same as above.
4006 (finish_register_edge_assert_for): Same as above.
4007 (find_switch_asserts): Same as above.
4008 (find_assert_locations): Same as above.
4009 (find_assert_locations_1): Same as above.
4010 (find_conditional_asserts): Same as above.
4011 (process_assert_insertions): Same as above.
4012 (register_new_assert_for): Same as above.
4013 (vrp_prop): New variable fun.
4014 (vrp_initialize): New parameter.
4015 (identify_jump_threads): Same as above.
4016 (execute_vrp): Same as above.
4019 2020-05-12 Keith Packard <keith.packard@sifive.com>
4021 * config/riscv/riscv.c (riscv_unique_section): New.
4022 (TARGET_ASM_UNIQUE_SECTION): New.
4024 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
4026 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
4027 * config/riscv/riscv-passes.def: New file.
4028 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
4029 * config/riscv/riscv-shorten-memrefs.c: New file.
4030 * config/riscv/riscv.c (tree-pass.h): New include.
4031 (riscv_compressed_reg_p): New Function
4032 (riscv_compressed_lw_offset_p): Likewise.
4033 (riscv_compressed_lw_address_p): Likewise.
4034 (riscv_shorten_lw_offset): Likewise.
4035 (riscv_legitimize_address): Attempt to convert base + large_offset
4036 to compressible new_base + small_offset.
4037 (riscv_address_cost): Make anticipated compressed load/stores
4038 cheaper for code size than uncompressed load/stores.
4039 (riscv_register_priority): Move compressed register check to
4040 riscv_compressed_reg_p.
4041 * config/riscv/riscv.h (C_S_BITS): Define.
4042 (CSW_MAX_OFFSET): Define.
4043 * config/riscv/riscv.opt (mshorten-memefs): New option.
4044 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
4045 (PASSES_EXTRA): Add riscv-passes.def.
4046 * doc/invoke.texi: Document -mshorten-memrefs.
4048 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
4049 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
4050 * doc/tm.texi: Regenerate.
4051 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
4052 * sched-deps.c (attempt_change): Use old address if it is cheaper than
4054 * target.def (new_address_profitable_p): New hook.
4055 * targhooks.c (default_new_address_profitable_p): New function.
4056 * targhooks.h (default_new_address_profitable_p): Declare.
4058 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
4061 * config/i386/mmx.md (copysignv2sf3): New expander.
4062 (xorsignv2sf3): Ditto.
4063 (signbitv2sf3): Ditto.
4065 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
4068 * config/i386/mmx.md (fmav2sf4): New insn pattern.
4073 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
4075 * Makefile.in (CET_HOST_FLAGS): New.
4076 (COMPILER): Add $(CET_HOST_FLAGS).
4077 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
4078 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
4080 * aclocal.m4: Regenerated.
4081 * configure: Likewise.
4083 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
4086 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
4087 (*mmx_<code>v2sf2): New insn_and_split pattern.
4088 (*mmx_nabsv2sf2): Ditto.
4089 (*mmx_andnotv2sf3): New insn pattern.
4090 (*mmx_<code>v2sf3): Ditto.
4091 * config/i386/i386.md (absneg_op): New code attribute.
4092 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
4093 (ix86_build_signbit_mask): Ditto.
4095 2020-05-12 Richard Biener <rguenther@suse.de>
4097 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
4100 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
4102 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
4103 Update prototype to include "local" argument.
4104 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
4105 "local" argument. Handle local common decls.
4106 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
4107 msp430_output_aligned_decl_common call with 0 for "local" argument.
4108 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
4110 2020-05-12 Richard Biener <rguenther@suse.de>
4112 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
4114 2020-05-12 Martin Liska <mliska@suse.cz>
4118 * sanopt.c (sanitize_rewrite_addressable_params):
4119 Clear DECL_NOT_GIMPLE_REG_P for argument.
4121 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
4123 PR tree-optimization/94980
4124 * tree-vect-generic.c (expand_vector_comparison): Use
4125 vector_element_bits_tree to get the element size in bits,
4126 rather than using TYPE_SIZE.
4127 (expand_vector_condition, vector_element): Likewise.
4129 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
4131 PR tree-optimization/94980
4132 * tree-vect-generic.c (build_replicated_const): Take the number
4133 of bits as a parameter, instead of the type of the elements.
4134 (do_plus_minus): Update accordingly, using vector_element_bits
4135 to calculate the correct number of bits.
4136 (do_negate): Likewise.
4138 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
4140 PR tree-optimization/94980
4141 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
4142 * tree.c (vector_element_bits, vector_element_bits_tree): New.
4143 * match.pd: Use the new functions instead of determining the
4144 vector element size directly from TYPE_SIZE(_UNIT).
4145 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
4146 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
4147 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
4148 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
4149 (expand_vector_conversion): Likewise.
4150 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
4151 a divisor. Convert the dividend to bits to compensate.
4152 * tree-vect-loop.c (vectorizable_live_operation): Call
4153 vector_element_bits instead of open-coding it.
4155 2020-05-12 Jakub Jelinek <jakub@redhat.com>
4157 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
4158 * omp-offload.c: Include context.h.
4159 (omp_declare_target_fn_p, omp_declare_target_var_p,
4160 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
4161 omp_discover_implicit_declare_target): New functions.
4162 * cgraphunit.c (analyze_functions): Call
4163 omp_discover_implicit_declare_target.
4165 2020-05-12 Richard Biener <rguenther@suse.de>
4167 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
4168 literal constant &MEM[..] to a constant literal.
4170 2020-05-12 Richard Biener <rguenther@suse.de>
4172 PR tree-optimization/95045
4173 * dbgcnt.def (lim): Add debug-counter.
4174 * tree-ssa-loop-im.c: Include dbgcnt.h.
4175 (find_refs_for_sm): Use lim debug counter for store motion
4177 (do_store_motion): Rename form store_motion. Commit edge
4179 (store_motion_loop): ... here.
4180 (tree_ssa_lim): Adjust.
4182 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4184 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
4185 (vec_ctzm): Rename to vec_cnttzm.
4186 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
4187 Change fourth operand for vec_ternarylogic to require
4188 compatibility with unsigned SImode rather than unsigned QImode.
4189 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
4190 Remove overloaded forms of vec_gnb that are no longer needed.
4191 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4192 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
4193 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
4194 vec_gnb; move vec_ternarylogic documentation into this section
4195 and replace const unsigned char with const unsigned int as its
4198 2020-05-11 Carl Love <cel@us.ibm.com>
4200 * config/rs6000/altivec.h (vec_genpcvm): New #define.
4201 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
4203 (XXGENPCVM_V8HI): Likewise.
4204 (XXGENPCVM_V4SI): Likewise.
4205 (XXGENPCVM_V2DI): Likewise.
4206 (XXGENPCVM): New overloaded built-in instantiation.
4207 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
4208 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
4209 (altivec_expand_builtin): Add special handling for
4210 FUTURE_BUILTIN_VEC_XXGENPCVM.
4211 (builtin_function_type): Add handling for
4212 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
4213 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
4214 (UNSPEC_XXGENPCV): New constant.
4215 (xxgenpcvm_<mode>_internal): New insn.
4216 (xxgenpcvm_<mode>): New expansion.
4217 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
4219 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4221 * config/rs6000/altivec.h (vec_strir): New #define.
4222 (vec_stril): Likewise.
4223 (vec_strir_p): Likewise.
4224 (vec_stril_p): Likewise.
4225 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
4226 (UNSPEC_VSTRIL): Likewise.
4227 (vstrir_<mode>): New expansion.
4228 (vstrir_code_<mode>): New insn.
4229 (vstrir_p_<mode>): New expansion.
4230 (vstrir_p_code_<mode>): New insn.
4231 (vstril_<mode>): New expansion.
4232 (vstril_code_<mode>): New insn.
4233 (vstril_p_<mode>): New expansion.
4234 (vstril_p_code_<mode>): New insn.
4235 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
4236 New built-in function.
4237 (__builtin_altivec_vstrihr): Likewise.
4238 (__builtin_altivec_vstribl): Likewise.
4239 (__builtin_altivec_vstrihl): Likewise.
4240 (__builtin_altivec_vstribr_p): Likewise.
4241 (__builtin_altivec_vstrihr_p): Likewise.
4242 (__builtin_altivec_vstribl_p): Likewise.
4243 (__builtin_altivec_vstrihl_p): Likewise.
4244 (__builtin_vec_strir): New overloaded built-in function.
4245 (__builtin_vec_stril): Likewise.
4246 (__builtin_vec_strir_p): Likewise.
4247 (__builtin_vec_stril_p): Likewise.
4248 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
4249 Define overloaded forms of __builtin_vec_strir,
4250 __builtin_vec_stril, __builtin_vec_strir_p, and
4251 __builtin_vec_stril_p.
4252 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4253 for a Future Architecture): Add description of vec_stril,
4254 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
4256 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
4258 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
4259 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
4261 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
4262 * config/rs6000/rs6000-builtin.def: Add handling of new macro
4264 (BU_FUTURE_V_4): New macro. Use it.
4265 (BU_FUTURE_OVERLOAD_4): Likewise.
4266 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
4267 handling for quaternary built-in functions.
4268 (altivec_resolve_overloaded_builtin): Add special-case handling
4269 for __builtin_vec_xxeval.
4270 * config/rs6000/rs6000-call.c: Add handling of new macro
4271 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
4272 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
4273 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
4274 (altivec_overloaded_builtins): Add definitions for
4275 FUTURE_BUILTIN_VEC_XXEVAL.
4276 (bdesc_4arg): New array.
4277 (htm_expand_builtin): Add handling for quaternary built-in
4279 (rs6000_expand_quaternop_builtin): New function.
4280 (rs6000_expand_builtin): Add handling for quaternary built-in
4282 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
4283 for unsigned QImode and unsigned HImode.
4284 (builtin_quaternary_function_type): New function.
4285 (rs6000_common_init_builtins): Add handling of quaternary
4287 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
4289 (RS6000_BTC_PREDICATE): Change value of constant.
4290 (RS6000_BTC_ABS): Likewise.
4291 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
4292 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
4293 for a Future Architecture): Add description of vec_ternarylogic
4296 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4298 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
4300 (__builtin_pextd): Likewise.
4301 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
4302 (UNSPEC_PEXTD): Likewise.
4305 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
4306 a Future Architecture): Add descriptions of __builtin_pdepd and
4307 __builtin_pextd functions.
4309 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4311 * config/rs6000/altivec.h (vec_clrl): New #define.
4312 (vec_clrr): Likewise.
4313 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
4314 (UNSPEC_VCLRRB): Likewise.
4317 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
4319 (__builtin_altivec_vclrrb): Likewise.
4320 (__builtin_vec_clrl): New overloaded built-in function.
4321 (__builtin_vec_clrr): Likewise.
4322 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
4323 Define overloaded forms of __builtin_vec_clrl and
4325 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4326 for a Future Architecture): Add descriptions of vec_clrl and
4329 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4331 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
4332 built-in function definition.
4333 (__builtin_cnttzdm): Likewise.
4334 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
4335 (UNSPEC_CNTTZDM): Likewise.
4336 (cntlzdm): New insn.
4337 (cnttzdm): Likewise.
4338 * doc/extend.texi (Basic PowerPC Built-in Functions available for
4339 a Future Architecture): Add descriptions of __builtin_cntlzdm and
4340 __builtin_cnttzdm functions.
4342 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
4345 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
4347 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4349 * config/rs6000/altivec.h (vec_cfuge): New #define.
4350 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
4351 (vcfuged): New insn.
4352 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
4353 New built-in function.
4354 * config/rs6000/rs6000-call.c (builtin_function_type): Add
4355 handling for FUTURE_BUILTIN_VCFUGED case.
4356 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4357 for a Future Architecture): Add description of vec_cfuge built-in
4360 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4362 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
4364 (BU_FUTURE_MISC_1): Likewise.
4365 (BU_FUTURE_MISC_2): Likewise.
4366 (BU_FUTURE_MISC_3): Likewise.
4367 (__builtin_cfuged): New built-in function definition.
4368 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
4370 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
4371 a Future Architecture): New subsubsection.
4373 2020-05-11 Richard Biener <rguenther@suse.de>
4375 PR tree-optimization/95049
4376 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
4377 between different constants.
4379 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
4381 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
4383 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4384 Bill Schmidt <wschmidt@linux.ibm.com>
4386 * config/rs6000/altivec.h (vec_gnb): New #define.
4387 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
4389 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
4391 (BU_FUTURE_OVERLOAD_2): Likewise.
4392 (BU_FUTURE_OVERLOAD_3): Likewise.
4393 (__builtin_altivec_gnb): New built-in function.
4394 (__buiiltin_vec_gnb): New overloaded built-in function.
4395 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
4396 Define overloaded forms of __builtin_vec_gnb.
4397 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
4398 of __builtin_vec_gnb.
4399 (builtin_function_type): Mark return value and arguments unsigned
4400 for FUTURE_BUILTIN_VGNB.
4401 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
4402 for a Future Architecture): Add description of vec_gnb built-in
4405 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4406 Bill Schmidt <wschmidt@linux.ibm.com>
4408 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
4410 (vec_pext): Likewise.
4411 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
4412 (UNSPEC_VPEXTD): Likewise.
4415 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
4417 (__builtin_altivec_vpextd): Likewise.
4418 * config/rs6000/rs6000-call.c (builtin_function_type): Add
4419 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
4421 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
4422 for a Future Architecture): Add description of vec_pdep and
4423 vec_pext built-in functions.
4425 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
4426 Bill Schmidt <wschmidt@linux.ibm.com>
4428 * config/rs6000/altivec.h (vec_clzm): New macro.
4429 (vec_ctzm): Likewise.
4430 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
4431 (UNSPEC_VCTZDM): Likewise.
4434 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
4435 (BU_FUTURE_V_1): Likewise.
4436 (BU_FUTURE_V_2): Likewise.
4437 (BU_FUTURE_V_3): Likewise.
4438 (__builtin_altivec_vclzdm): New builtin definition.
4439 (__builtin_altivec_vctzdm): Likewise.
4440 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
4441 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
4443 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
4444 value and parameter types to be unsigned for VCLZDM and VCTZDM.
4445 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
4446 support for TARGET_FUTURE flag.
4447 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
4448 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
4449 for a Future Architecture): New subsubsection.
4451 2020-05-11 Richard Biener <rguenther@suse.de>
4453 PR tree-optimization/94988
4454 PR tree-optimization/95025
4455 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
4456 (sm_seq_push_down): Take extra parameter denoting where we
4458 (execute_sm_exit): Re-issue sm_other stores in the correct
4460 (sm_seq_valid_bb): When always executed, allow sm_other to
4461 prevail inbetween sm_ord and record their stored value.
4462 (hoist_memory_references): Adjust refs_not_supported propagation
4463 and prune sm_other from the end of the ordered sequences.
4465 2020-05-11 Felix Yang <felix.yang@huawei.com>
4468 * config/aarch64/aarch64.md (mov<mode>):
4469 Bitcasts to the equivalent integer mode using gen_lowpart
4470 instead of doing FAIL for scalar floating point move.
4472 2020-05-11 Alex Coplan <alex.coplan@arm.com>
4474 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
4475 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
4476 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
4477 (*csinv3_uxtw_insn2): New.
4478 (*csinv3_uxtw_insn3): New.
4479 * config/aarch64/iterators.md (neg_not_cs): New.
4481 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
4484 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
4485 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
4486 (*mmx_addv2sf3): Ditto.
4487 (*mmx_subv2sf3): Ditto.
4488 (*mmx_mulv2sf3): Ditto.
4489 (*mmx_<code>v2sf3): Ditto.
4490 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
4492 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
4495 * config/i386/i386.c (ix86_vector_mode_supported_p):
4496 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
4497 * config/i386/mmx.md (*mov<mode>_internal): Do not set
4498 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
4500 (mmx_addv2sf3): Change operand predicates from
4501 nonimmediate_operand to register_mmxmem_operand.
4502 (addv2sf3): New expander.
4503 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
4504 predicates from nonimmediate_operand to register_mmxmem_operand.
4505 Enable instruction pattern for TARGET_MMX_WITH_SSE.
4507 (mmx_subv2sf3): Change operand predicate from
4508 nonimmediate_operand to register_mmxmem_operand.
4509 (mmx_subrv2sf3): Ditto.
4510 (subv2sf3): New expander.
4511 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
4512 predicates from nonimmediate_operand to register_mmxmem_operand.
4513 Enable instruction pattern for TARGET_MMX_WITH_SSE.
4515 (mmx_mulv2sf3): Change operand predicates from
4516 nonimmediate_operand to register_mmxmem_operand.
4517 (mulv2sf3): New expander.
4518 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
4519 predicates from nonimmediate_operand to register_mmxmem_operand.
4520 Enable instruction pattern for TARGET_MMX_WITH_SSE.
4522 (mmx_<code>v2sf3): Change operand predicates from
4523 nonimmediate_operand to register_mmxmem_operand.
4524 (<code>v2sf3): New expander.
4525 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
4526 predicates from nonimmediate_operand to register_mmxmem_operand.
4527 Enable instruction pattern for TARGET_MMX_WITH_SSE.
4528 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
4530 2020-05-11 Martin Liska <mliska@suse.cz>
4533 * common.opt: Fix typo in option description.
4535 2020-05-11 Martin Liska <mliska@suse.cz>
4537 PR gcov-profile/94928
4538 * gcov-io.h: Add caveat about coverage format parsing and
4539 possible outdated documentation.
4541 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
4543 PR tree-optimization/83403
4544 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
4545 determine_value_range, Add fold conversion of MULT_EXPR, fix the
4548 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
4550 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
4551 __ILP32__ for 32-bit targets.
4553 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
4555 * tree.h (expr_align): Delete.
4556 * tree.c (expr_align): Likewise.
4558 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
4560 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
4561 from end_of_function_needs.
4563 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
4564 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
4566 * config/cris/t-elfmulti: Remove crisv32 multilib.
4567 * config/cris: Remove shared-library and CRIS v32 support.
4569 Move trivially from cc0 to reg:CC model, removing most optimizations.
4570 * config/cris/cris.md: Remove all side-effect patterns and their
4571 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
4572 to all but post-reload control-flow and movem insns. Remove
4573 constraints on all modified expanders. Remove obsoleted cc0-related
4575 (attr "cc"): Remove alternative "rev".
4576 (mode_iterator BWDD, DI_, SI_): New.
4577 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
4578 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
4579 ("mstep_shift", "mstep_mul"): Remove patterns.
4580 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
4581 * config/cris/cris.c: Change all non-condition-code,
4582 non-control-flow emitted insns to add a parallel with clobber of
4583 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
4584 emit_insn to use of emit_move_insn, gen_add2_insn or
4585 cris_emit_insn, as convenient.
4586 (cris_reg_overlap_mentioned_p)
4587 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
4588 (cris_movem_load_rest_p): Don't assume all elements in a
4590 (cris_store_multiple_op_p): Ditto.
4591 (cris_emit_insn): New function.
4592 * cris/cris-protos.h (cris_emit_insn): Declare.
4595 * config/cris/cris.md (zcond): New code_iterator.
4596 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
4598 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
4600 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
4602 * config/cris/cris.md ("movsi"): For memory destination
4603 post-reload, generate clobberless variant. Similarly for a
4604 zero-source post-reload.
4605 ("*mov_tomem<mode>_split"): New split.
4606 ("*mov_tomem<mode>"): New insn.
4607 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
4608 "Q>m" for less-than-SImode.
4609 ("*mov_fromzero<mode>_split"): New split.
4610 ("*mov_fromzero<mode>"): New insn.
4612 Prepare for cmpelim pass to eliminate redundant compare insns.
4613 * config/cris/cris-modes.def: New file.
4614 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
4615 (cris_notice_update_cc): Remove left-over declaration.
4616 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
4617 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
4618 * config/cris/cris.h (SELECT_CC_MODE): Define.
4619 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
4621 (cond): New code_iterator.
4622 (nzcond): Replacement for incorrect ncond. All callers changed.
4623 (nzvccond): Replacement for ocond. All callers changed.
4624 (rnzcond): Replacement for rcond. All callers changed.
4625 (xCC): New code_attr.
4626 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
4628 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
4629 CCmode with iteration over NZVCSET.
4630 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
4632 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
4633 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
4634 ("*btst<mode>"): Similarly, from "*btst".
4635 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
4636 iterating over cond instead of matching the comparison with
4637 ordered_comparison_operator.
4638 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
4639 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
4641 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
4642 NZVCUSE. Remove FIXME.
4643 ("*b<nzcond:code>_reversed<mode>"): Similarly from
4644 "*b<ncond:code>_reversed", over NZUSE.
4645 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
4646 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
4647 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
4648 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
4649 depending on CC_NZmode vs. CCmode. Remove FIXME.
4650 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
4651 "*b<rcond:code>_reversed", over NZUSE.
4652 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
4653 iterating over cond instead of matching the comparison with
4654 ordered_comparison_operator.
4655 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
4656 iterating over NZUSE.
4657 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
4658 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
4659 depending on CC_NZmode vs. CCmode.
4660 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
4661 NZVCUSE. Remove FIXME.
4662 ("cc"): Comment on new use.
4663 ("cc_enabled"): New attribute.
4664 ("enabled"): Make default fall back to cc_enabled.
4665 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
4666 default_subst_attrs.
4667 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
4668 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
4669 "*movsi_internal". Correct contents of, and rename attribute
4670 "cc" to "cc<cccc><ccnz><ccnzvc>".
4671 ("anz", "anzvc", "acc"): New define_subst_attrs.
4672 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
4673 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
4674 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
4675 "movqi". Correct contents of, and rename "cc" attribute to
4676 "cc<cccc><ccnz><ccnzvc>".
4677 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
4678 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
4679 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
4680 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
4681 Rename from "extend<mode>si2".
4682 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
4683 Similar, from "zero_extend<mode>si2".
4684 ("*adddi3<setnz>"): Rename from "*adddi3".
4685 ("*subdi3<setnz>"): Similarly from "*subdi3".
4686 ("*addsi3<setnz>"): Similarly from "*addsi3".
4687 ("*subsi3<setnz>"): Similarly from "*subsi3".
4688 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
4689 "cc" attribute to "cc<ccnz>".
4690 ("*addqi3<setnz>"): Similarly from "*addqi3".
4691 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
4692 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
4694 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
4695 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
4696 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
4697 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
4698 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
4699 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
4700 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
4701 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
4703 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
4705 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
4707 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
4709 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
4711 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
4713 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
4714 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
4715 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
4716 (znnCC, rznnCC): New code_attrs.
4717 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
4718 obseolete comment. Add belt-and-suspenders mode-test to condition.
4719 Add fixme regarding remaining matched-but-not-generated case.
4720 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
4721 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
4722 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
4723 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
4724 Handle output of CC_ZnNmode.
4725 ("*b<nzcond:code>_reversed<mode>"): Ditto.
4727 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
4728 NEG too. Correct comment.
4729 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
4732 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
4734 * ira-color.c (update_costs_from_allocno): Remove
4735 conflict_cost_update_p argument. Propagate costs only along
4736 threads. Always do conflict cost update. Add printing debugging
4738 (update_costs_from_copies): Add printing debugging info.
4739 (restore_costs_from_copies): Ditto.
4740 (assign_hard_reg): Improve debug info.
4741 (push_only_colorable): Ditto. Call update_costs_from_prefs.
4742 (color_allocnos): Remove update_costs_from_prefs.
4744 2020-05-08 Richard Biener <rguenther@suse.de>
4746 * tree-vectorizer.h (vec_info::slp_loads): New.
4747 (vect_optimize_slp): Declare.
4748 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
4749 nothing when there are no loads.
4750 (vect_gather_slp_loads): Gather loads into a vector.
4751 (vect_supported_load_permutation_p): Remove.
4752 (vect_analyze_slp_instance): Do not verify permutation
4754 (vect_analyze_slp): Optimize permutations of reductions
4755 after all SLP instances have been gathered and gather
4757 (vect_optimize_slp): New function split out from
4758 vect_supported_load_permutation_p. Elide some permutations.
4759 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
4760 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
4761 * tree-vect-stmts.c (vectorizable_load): Check whether
4762 the load can be permuted. When generating code assert we can.
4764 2020-05-08 Richard Biener <rguenther@suse.de>
4766 * tree-ssa-sccvn.c (rpo_avail): Change type to
4767 eliminate_dom_walker *.
4768 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
4769 use the DOM walker availability.
4770 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
4771 with vn_valueize as valueization callback.
4772 (vn_reference_maybe_forwprop_address): Likewise.
4773 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
4774 array_ref_low_bound.
4776 2020-05-08 Jakub Jelinek <jakub@redhat.com>
4778 PR tree-optimization/94786
4779 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
4783 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
4787 * tree.c (get_narrower): Reuse the op temporary instead of
4790 PR tree-optimization/94783
4791 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
4794 PR tree-optimization/94956
4795 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
4796 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
4798 PR tree-optimization/94913
4799 * match.pd (A - B + -1 >= A to B >= A): New simplification.
4800 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
4801 true for TYPE_UNSIGNED integral types.
4804 PR rtl-optimization/94516
4805 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
4807 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
4808 Call df_notes_rescan if that argument is not true and returning true.
4809 * combine.c (adjust_for_new_dest): Pass true as second argument to
4810 remove_reg_equal_equiv_notes.
4811 * postreload.c (reload_combine_recognize_pattern): Don't call
4814 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
4816 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
4818 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
4819 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
4820 (*neg_ne_<mode>): Likewise.
4822 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
4824 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
4826 (*setbcr_<un>signed_<GPR:mode>): Likewise.
4827 (cstore<mode>4): Use setbc[r] if available.
4828 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
4829 (eq<mode>3): Use setbc for TARGET_FUTURE.
4830 (*eq<mode>3): Avoid for TARGET_FUTURE.
4831 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
4832 else for non-Pmode, use gen_eq and gen_xor.
4833 (*ne<mode>3): Avoid for TARGET_FUTURE.
4834 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
4836 2020-05-07 Jeff Law <law@redhat.com>
4838 * config/h8300/h8300.md: Move expanders and patterns into
4839 files based on functionality.
4840 * config/h8300/addsub.md: New file.
4841 * config/h8300/bitfield.md: New file
4842 * config/h8300/combiner.md: New file
4843 * config/h8300/divmod.md: New file
4844 * config/h8300/extensions.md: New file
4845 * config/h8300/jumpcall.md: New file
4846 * config/h8300/logical.md: New file
4847 * config/h8300/movepush.md: New file
4848 * config/h8300/multiply.md: New file
4849 * config/h8300/other.md: New file
4850 * config/h8300/proepi.md: New file
4851 * config/h8300/shiftrotate.md: New file
4852 * config/h8300/testcompare.md: New file
4854 * config/h8300/h8300.md (adds/subs splitters): Merge into single
4856 (negation expanders and patterns): Simplify and combine using
4858 (one_cmpl expanders and patterns): Likewise.
4859 (tablejump, indirect_jump patterns ): Likewise.
4860 (shift and rotate expanders and patterns): Likewise.
4861 (absolute value expander and pattern): Drop expander, rename pattern
4863 (peephole2 patterns): Move into...
4864 * config/h8300/peepholes.md: New file.
4866 * config/h8300/constraints.md (L and N): Simplify now that we're not
4867 longer supporting the original H8/300 chip.
4868 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
4869 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
4870 (shift_alg_hi, shift_alg_si): Similarly.
4871 (h8300_option_overrides): Similarly. Default to H8/300H. If
4872 compiling for H8/S, then turn off H8/300H. Do not update the
4873 shift_alg tables for H8/300 port.
4874 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
4876 (push, split_adds_subs, h8300_rtx_costs): Likewise.
4877 (h8300_print_operand, compute_mov_length): Likewise.
4878 (output_plussi, compute_plussi_length): Likewise.
4879 (compute_plussi_cc, output_logical_op): Likewise.
4880 (compute_logical_op_length, compute_logical_op_cc): Likewise.
4881 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
4882 (output_a_shift, compute_a_shift_length): Likewise.
4883 (output_a_rotate, compute_a_rotate_length): Likewise.
4884 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
4885 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
4886 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
4887 (attr_cpu, TARGET_H8300): Remove.
4888 (TARGET_DEFAULT): Update.
4889 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
4890 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
4891 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
4892 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
4893 * config/h8300/h8300.md: Simplify patterns throughout.
4894 * config/h8300/t-h8300: Update multilib configuration.
4896 * config/h8300/h8300.h (LINK_SPEC): Remove.
4897 (USER_LABEL_PREFIX): Likewise.
4899 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
4900 (h8300_option_override): Remove remnants of COFF support.
4902 2020-05-07 Alan Modra <amodra@gmail.com>
4904 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
4905 set_rtx_cost with set_src_cost.
4906 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
4908 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
4910 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
4911 redundant half vector handlings for no peeling gaps.
4913 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
4915 * tree-ssa-operands.c (operands_scanner): New class.
4916 (operands_bitmap_obstack): Remove.
4917 (n_initialized): Remove.
4918 (build_uses): Move to operands_scanner class.
4919 (build_vuse): Same as above.
4920 (build_vdef): Same as above.
4921 (verify_ssa_operands): Same as above.
4922 (finalize_ssa_uses): Same as above.
4923 (cleanup_build_arrays): Same as above.
4924 (finalize_ssa_stmt_operands): Same as above.
4925 (start_ssa_stmt_operands): Same as above.
4926 (append_use): Same as above.
4927 (append_vdef): Same as above.
4928 (add_virtual_operand): Same as above.
4929 (add_stmt_operand): Same as above.
4930 (get_mem_ref_operands): Same as above.
4931 (get_tmr_operands): Same as above.
4932 (maybe_add_call_vops): Same as above.
4933 (get_asm_stmt_operands): Same as above.
4934 (get_expr_operands): Same as above.
4935 (parse_ssa_operands): Same as above.
4936 (finalize_ssa_defs): Same as above.
4937 (build_ssa_operands): Same as above, plus create a C-like wrapper.
4938 (update_stmt_operands): Create an instance of operands_scanner.
4940 2020-05-07 Richard Biener <rguenther@suse.de>
4943 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
4944 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
4945 (refered_from_nonlocal_var): Likewise.
4946 (ipa_pta_execute): Likewise.
4948 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
4950 * gcc/tree-ssa-struct-alias.c: Fix comments
4952 2020-05-07 Martin Liska <mliska@suse.cz>
4954 * doc/invoke.texi: Fix 2 optindex entries.
4956 2020-05-07 Richard Biener <rguenther@suse.de>
4959 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
4960 (tree_decl_common::not_gimple_reg_flag): ... to this.
4961 * tree.h (DECL_GIMPLE_REG_P): Rename ...
4962 (DECL_NOT_GIMPLE_REG_P): ... to this.
4963 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
4964 (create_tmp_reg): Simplify.
4965 (create_tmp_reg_fn): Likewise.
4966 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
4967 * gimplify.c (create_tmp_from_val): Simplify.
4968 (gimplify_bind_expr): Likewise.
4969 (gimplify_compound_literal_expr): Likewise.
4970 (gimplify_function_tree): Likewise.
4971 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
4972 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
4973 (asan_add_global): Copy it.
4974 * cgraphunit.c (cgraph_node::expand_thunk): Force args
4976 * function.c (gimplify_parameters): Copy
4977 DECL_NOT_GIMPLE_REG_P.
4978 * ipa-param-manipulation.c
4979 (ipa_param_body_adjustments::common_initialization): Simplify.
4980 (ipa_param_body_adjustments::reset_debug_stmts): Copy
4981 DECL_NOT_GIMPLE_REG_P.
4982 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
4983 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
4984 * tree-cfg.c (make_blocks_1): Simplify.
4985 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
4986 * tree-eh.c (lower_eh_constructs_2): Simplify.
4987 * tree-inline.c (declare_return_variable): Adjust and
4989 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
4990 (copy_result_decl_to_var): Likewise.
4991 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
4992 * tree-nested.c (create_tmp_var_for): Simplify.
4993 * tree-parloops.c (separate_decls_in_region_name): Copy
4994 DECL_NOT_GIMPLE_REG_P.
4995 * tree-sra.c (create_access_replacement): Adjust and
4996 generalize partial def support.
4997 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
4998 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
4999 * tree-ssa.c (maybe_optimize_var): Handle clearing of
5000 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
5002 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
5003 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
5004 DECL_NOT_GIMPLE_REG_P.
5005 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
5006 * cfgexpand.c (avoid_type_punning_on_regs): New.
5007 (discover_nonconstant_array_refs): Call
5008 avoid_type_punning_on_regs to avoid unsupported mode punning.
5010 2020-05-07 Alex Coplan <alex.coplan@arm.com>
5012 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
5015 2020-05-07 Richard Biener <rguenther@suse.de>
5017 PR tree-optimization/57359
5018 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
5019 (in_mem_ref::dep_loop): Repurpose.
5020 (LOOP_DEP_BIT): Remove.
5021 (enum dep_kind): New.
5022 (enum dep_state): Likewise.
5023 (record_loop_dependence): New function to populate the
5025 (query_loop_dependence): New function to query the dependence
5027 (memory_accesses::refs_in_loop): Rename to ...
5028 (memory_accesses::refs_loaded_in_loop): ... this and change to
5030 (outermost_indep_loop): Adjust.
5031 (mem_ref_alloc): Likewise.
5032 (gather_mem_refs_stmt): Likewise.
5033 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
5034 (struct sm_aux): New.
5035 (execute_sm): Split code generation on exits, record state
5037 (enum sm_kind): New.
5038 (execute_sm_exit): Exit code generation part.
5039 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
5040 dependence checking on stores reached from exits.
5041 (sm_seq_valid_bb): New function gathering SM stores on exits.
5042 (hoist_memory_references): Re-implement.
5043 (refs_independent_p): Add tbaa_p parameter and pass it down.
5044 (record_dep_loop): Remove.
5045 (ref_indep_loop_p_1): Fold into ...
5046 (ref_indep_loop_p): ... this and generalize for three kinds
5047 of dependence queries.
5048 (can_sm_ref_p): Adjust according to hoist_memory_references
5050 (store_motion_loop): Don't do anything if the set of SM
5051 candidates is empty.
5052 (tree_ssa_lim_initialize): Adjust.
5053 (tree_ssa_lim_finalize): Likewise.
5055 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
5056 Pierre-Marie de Rodat <derodat@adacore.com>
5058 * dwarf2out.c (add_data_member_location_attribute): Take into account
5059 the variant part offset in the computation of the data bit offset.
5060 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
5061 in the call to field_byte_offset.
5062 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
5063 confusing assertion.
5064 (analyze_variant_discr): Deal with boolean subtypes.
5066 2020-05-07 Martin Liska <mliska@suse.cz>
5068 * lto-wrapper.c: Split arguments of MAKE environment
5071 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
5073 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
5074 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
5075 fenv_var and new_fenv_var.
5077 2020-05-06 Jakub Jelinek <jakub@redhat.com>
5080 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
5082 (avx512dq_vextract<shuffletype>64x2_1_maskm,
5083 avx512f_vextract<shuffletype>32x4_1_maskm,
5084 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
5085 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
5087 (*avx512dq_vextract<shuffletype>64x2_1,
5088 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
5089 define_insns. Even in the masked variant allow memory output but in
5090 that case use 0 rather than 0C constraint on the source of masked-out
5092 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
5094 (*avx512f_vextract<shuffletype>32x4_1,
5095 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
5096 Even in the masked variant allow memory output but in that case use
5097 0 rather than 0C constraint on the source of masked-out elts.
5098 (vec_extract_lo_<mode><mask_name>): Split into ...
5099 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
5100 define_insns. Even in the masked variant allow memory output but in
5101 that case use 0 rather than 0C constraint on the source of masked-out
5103 (vec_extract_hi_<mode><mask_name>): Split into ...
5104 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
5105 define_insns. Even in the masked variant allow memory output but in
5106 that case use 0 rather than 0C constraint on the source of masked-out
5109 2020-05-06 qing zhao <qing.zhao@oracle.com>
5112 * common.opt: Add -flarge-source-files.
5113 * doc/invoke.texi: Document it.
5114 * toplev.c (process_options): set line_table->default_range_bits
5115 to 0 when flag_large_source_files is true.
5117 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
5120 * config/i386/predicates.md (add_comparison_operator): New predicate.
5121 * config/i386/i386.md (compare->add splitter): New splitters.
5123 2020-05-06 Richard Biener <rguenther@suse.de>
5125 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
5126 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
5127 Remove slp_instance parameter, just iterate over all scalar stmts.
5128 (vect_slp_analyze_instance_dependence): Adjust and likewise.
5129 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
5131 (vect_schedule_slp): Just iterate over all scalar stmts.
5132 (vect_supported_load_permutation_p): Adjust.
5133 (vect_transform_slp_perm_load): Remove slp_instance parameter,
5134 instead use the number of lanes in the node as group size.
5135 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
5136 factor instead of slp_instance as parameter.
5137 (vectorizable_load): Adjust.
5139 2020-05-06 Andreas Schwab <schwab@suse.de>
5141 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
5142 (aarch64_get_extension_string_for_isa_flags): Don't declare.
5144 2020-05-06 Richard Biener <rguenther@suse.de>
5147 * cfgloopmanip.c (create_preheader): Require non-complex
5148 preheader edge for CP_SIMPLE_PREHEADERS.
5150 2020-05-06 Richard Biener <rguenther@suse.de>
5152 PR tree-optimization/94963
5153 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
5154 no-warning marking of the conditional store.
5155 (execute_sm): Instead mark the uninitialized state
5156 on loop entry to be not warned about.
5158 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
5160 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
5161 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
5162 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
5163 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
5165 * config/i386/i386-builtin.def: Add new builtins.
5166 * config/i386/i386-c.c (ix86_target_macros_internal): Define
5168 * config/i386/i386-options.c (ix86_target_string): Add
5170 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
5171 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
5173 * config/i386/i386.md (define_c_enum "unspec"): Add
5174 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
5175 (TSXLDTRK): New define_int_iterator.
5176 ("<tsxldtrk>"): New define_insn.
5177 * config/i386/i386.opt: Add -mtsxldtrk.
5178 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
5179 * config/i386/tsxldtrkintrin.h: New.
5180 * doc/invoke.texi: Document -mtsxldtrk.
5182 2020-05-06 Jakub Jelinek <jakub@redhat.com>
5184 PR tree-optimization/94921
5185 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
5188 2020-05-06 Richard Biener <rguenther@suse.de>
5190 PR tree-optimization/94965
5191 * tree-vect-stmts.c (vectorizable_load): Fix typo.
5193 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5195 * doc/install.texi: Replace Sun with Solaris as appropriate.
5196 (Tools/packages necessary for building GCC, Perl version between
5197 5.6.1 and 5.6.24): Remove Solaris 8 reference.
5198 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
5200 (Specific, i?86-*-solaris2*): Update version references for
5201 Solaris 11.3 and later. Remove gas 2.26 caveat.
5202 (Specific, *-*-solaris2*): Update version references for
5203 Solaris 11.3 and later. Remove boehm-gc reference.
5204 Document GMP, MPFR caveats on Solaris 11.3.
5205 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
5206 (Specific, sparc64-*-solaris2*): Likewise.
5207 Document --build requirement.
5209 2020-05-06 Jakub Jelinek <jakub@redhat.com>
5212 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
5213 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
5215 PR rtl-optimization/94873
5216 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
5217 note if SET_SRC (set) has side-effects.
5219 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
5220 Wei Xiao <wei3.xiao@intel.com>
5222 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
5223 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
5224 (ix86_handle_option): Handle -mserialize.
5225 * config.gcc (serializeintrin.h): New header file.
5226 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
5227 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
5229 * config/i386/i386-builtin.def: Add new builtin.
5230 * config/i386/i386-c.c (__SERIALIZE__): New macro.
5231 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
5233 * (ix86_valid_target_attribute_inner_p): Add target attribute
5235 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
5237 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
5238 (serialize): New define_insn.
5239 * config/i386/i386.opt (mserialize): New option
5240 * config/i386/immintrin.h: Include serailizeintrin.h.
5241 * config/i386/serializeintrin.h: New header file.
5242 * doc/invoke.texi: Add documents for -mserialize.
5244 2020-05-06 Richard Biener <rguenther@suse.de>
5246 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
5247 to/from pointer conversion checking.
5249 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
5251 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
5253 * config/rs6000/rs6000-c.c: Likewise.
5254 * config/rs6000/rs6000-call.c: Likewise.
5255 * config/rs6000/rs6000.c: Likewise.
5257 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
5259 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
5260 (RTEMS_ENDFILE_SPEC): Likewise.
5261 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
5262 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
5263 (LIB_SPECS): Support -nodefaultlibs option.
5264 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
5265 (RTEMS_ENDFILE_SPEC): Likewise.
5266 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
5267 (RTEMS_ENDFILE_SPEC): Likewise.
5268 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
5269 (RTEMS_ENDFILE_SPEC): Likewise.
5271 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
5273 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
5274 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
5276 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
5278 * config/pru/pru.h: Mark R3.w0 as caller saved.
5280 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
5282 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
5283 and gen_doloop_begin_internal.
5284 (pru_reorg_loop): Use gen_pruloop with mode.
5285 * config/pru/pru.md: Use new @insn syntax.
5287 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
5289 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
5291 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
5293 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
5294 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
5295 (addqi3_cconly_overflow): Ditto.
5296 (umulv<mode>4): Ditto.
5297 (<s>mul<mode>3_highpart): Ditto.
5298 (tls_global_dynamic_32): Ditto.
5299 (tls_local_dynamic_base_32): Ditto.
5306 (*adddi_4): Remove "m" constraint from scratch operand.
5307 (*add<mode>_4): Ditto.
5309 2020-05-05 Jakub Jelinek <jakub@redhat.com>
5311 PR rtl-optimization/94516
5312 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
5313 with sp = reg, add REG_EQUAL note with sp + const.
5314 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
5315 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
5316 postreload sp = sp + const to sp = reg optimization if needed and
5318 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
5319 reg = sp insn with sp + const REG_EQUAL note. Adjust
5320 try_apply_stack_adjustment caller, call
5321 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
5322 (combine_stack_adjustments): Allocate and free LIVE bitmap,
5323 adjust combine_stack_adjustments_for_block caller.
5325 2020-05-05 Martin Liska <mliska@suse.cz>
5327 PR gcov-profile/93623
5328 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
5331 2020-05-05 Martin Liska <mliska@suse.cz>
5333 * opt-functions.awk (opt_args_non_empty): New function.
5334 * opt-read.awk: Use the function for various option arguments.
5336 2020-05-05 Martin Liska <mliska@suse.cz>
5339 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
5340 report warning when the jobserver is not detected.
5342 2020-05-05 Martin Liska <mliska@suse.cz>
5344 PR gcov-profile/94636
5345 * gcov.c (main): Print total lines summary at the end.
5346 (generate_results): Expect file_name always being non-null.
5347 Print newline after intermediate file is printed in order to align with
5348 what we do for normal files.
5350 2020-05-05 Martin Liska <mliska@suse.cz>
5352 * dumpfile.c (dump_switch_p): Change return type
5353 and print option suggestion.
5354 * dumpfile.h: Change return type.
5355 * opts-global.c (handle_common_deferred_options):
5356 Move error into dump_switch_p function.
5358 2020-05-05 Martin Liska <mliska@suse.cz>
5361 * alloc-pool.h: Use const for some arguments.
5362 * bitmap.h: Likewise.
5363 * mem-stats.h: Likewise.
5364 * sese.h (get_entry_bb): Likewise.
5365 (get_exit_bb): Likewise.
5367 2020-05-05 Richard Biener <rguenther@suse.de>
5369 * tree-vect-slp.c (struct vdhs_data): New.
5370 (vect_detect_hybrid_slp): New walker.
5371 (vect_detect_hybrid_slp): Rewrite.
5373 2020-05-05 Richard Biener <rguenther@suse.de>
5376 * tree-ssa-structalias.c (ipa_pta_execute): Use
5377 varpool_node::externally_visible_p ().
5378 (refered_from_nonlocal_var): Likewise.
5380 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
5382 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
5383 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
5384 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
5386 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
5388 * gimplify.c (gimplify_init_constructor): Do not put the constructor
5389 into static memory if it is not complete.
5391 2020-05-05 Richard Biener <rguenther@suse.de>
5393 PR tree-optimization/94949
5394 * tree-ssa-loop-im.c (execute_sm): Check whether we use
5395 the multithreaded model or always compute the stored value
5396 before eliding a load.
5398 2020-05-05 Alex Coplan <alex.coplan@arm.com>
5400 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
5402 2020-05-05 Jakub Jelinek <jakub@redhat.com>
5404 PR tree-optimization/94800
5405 * match.pd (X + (X << C) to X * (1 + (1 << C)),
5406 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
5410 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
5412 PR tree-optimization/94914
5413 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
5416 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
5418 * config/i386/i386.md (*testqi_ext_3): Use
5419 int_nonimmediate_operand instead of manual mode checks.
5420 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
5421 Use int_nonimmediate_operand predicate. Rewrite
5422 define_insn_and_split pattern to a combine pass splitter.
5424 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5426 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
5427 * configure: Regenerate.
5429 2020-05-05 Jakub Jelinek <jakub@redhat.com>
5432 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
5433 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
5434 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
5435 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
5437 2020-05-04 Clement Chigot <clement.chigot@atos.net>
5438 David Edelsohn <dje.gcc@gmail.com>
5440 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
5441 for fmodl, frexpl, ldexpl and modfl builtins.
5443 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
5446 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
5447 chosen lhs is different from the gcall lhs.
5448 (expand_mask_load_optab_fn): Likewise.
5449 (expand_gather_load_optab_fn): Likewise.
5451 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
5454 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
5455 (EQ compare->LTU compare splitter): New splitter.
5456 (NE compare->NEG splitter): Ditto.
5458 2020-05-04 Marek Polacek <polacek@redhat.com>
5461 2020-04-30 Marek Polacek <polacek@redhat.com>
5464 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
5465 (check_aligned_type): Check if TYPE_USER_ALIGN match.
5467 2020-05-04 Richard Biener <rguenther@suse.de>
5469 PR tree-optimization/93891
5470 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
5471 the original reference tree for assessing access alignment.
5473 2020-05-04 Richard Biener <rguenther@suse.de>
5475 PR tree-optimization/39612
5476 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
5477 (set_ref_loaded_in_loop): New.
5478 (mark_ref_loaded): Likewise.
5479 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
5480 (execute_sm): Avoid issueing a load when it was not there.
5481 (execute_sm_if_changed): Avoid issueing warnings for the
5484 2020-05-04 Martin Jambor <mjambor@suse.cz>
5487 * tree-inline.c (tree_function_versioning): Leave any type conversion
5488 of replacements to setup_one_parameter and its friend
5489 force_value_to_type.
5491 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
5494 * config/i386/predicates.md (shr_comparison_operator): New predicate.
5495 * config/i386/i386.md (compare->shr splitter): New splitters.
5497 2020-05-04 Jakub Jelinek <jakub@redhat.com>
5499 PR tree-optimization/94718
5500 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
5502 PR tree-optimization/94718
5503 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
5504 replace two nop conversions on bit_{and,ior,xor} argument
5505 and result with just one conversion on the result or another argument.
5507 PR tree-optimization/94718
5508 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
5509 -> (X ^ Y) & C eqne 0 optimization to ...
5510 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
5512 * opts.c (get_option_html_page): Instead of hardcoding a list of
5513 options common between C/C++ and Fortran only use gfortran/
5514 documentation for warnings that have CL_Fortran set but not
5517 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
5519 * config/i386/i386-expand.c (ix86_expand_int_movcc):
5520 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
5521 (emit_memmov): Ditto.
5522 (emit_memset): Ditto.
5523 (ix86_expand_strlensi_unroll_1): Ditto.
5524 (release_scratch_register_on_entry): Ditto.
5525 (gen_frame_set): Ditto.
5526 (ix86_emit_restore_reg_using_pop): Ditto.
5527 (ix86_emit_outlined_ms2sysv_restore): Ditto.
5528 (ix86_expand_epilogue): Ditto.
5529 (ix86_expand_split_stack_prologue): Ditto.
5530 * config/i386/i386.md (push immediate splitter): Ditto.
5534 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
5536 PR translation/93861
5537 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
5540 2020-05-02 Jakub Jelinek <jakub@redhat.com>
5542 * config/tilegx/tilegx.md
5543 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
5544 rather than just <n>.
5546 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
5549 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
5550 and crtl->patch_area_entry.
5551 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
5552 * opts.c (common_handle_option): Limit
5553 function_entry_patch_area_size and function_entry_patch_area_start
5554 to USHRT_MAX. Fix a typo in error message.
5555 * varasm.c (assemble_start_function): Use crtl->patch_area_size
5556 and crtl->patch_area_entry.
5557 * doc/invoke.texi: Document the maximum value for
5558 -fpatchable-function-entry.
5560 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
5562 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
5563 Override SUBTARGET_SHADOW_OFFSET macro.
5565 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
5567 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
5568 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
5569 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
5570 * config/i386/freebsd.h: Likewise.
5571 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
5572 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
5574 2020-04-30 Alexandre Oliva <oliva@adacore.com>
5576 * doc/sourcebuild.texi (Effective-Target Keywords): Document
5577 the newly-introduced fileio effective target.
5579 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
5581 PR rtl-optimization/94740
5582 * cse.c (cse_process_notes_1): Replace with...
5583 (cse_process_note_1): ...this new function, acting as a
5584 simplify_replace_fn_rtx callback to process_note. Handle only
5585 REGs and MEMs directly. Validate the MEM if cse_process_note
5586 changes its address.
5587 (cse_process_notes): Replace with...
5588 (cse_process_note): ...this new function.
5589 (cse_extended_basic_block): Update accordingly, iterating over
5590 the register notes and passing individual notes to cse_process_note.
5592 2020-04-30 Carl Love <cel@us.ibm.com>
5594 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
5596 2020-04-30 Martin Jambor <mjambor@suse.cz>
5599 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
5600 saved by the inliner and thunks which had their call inlined.
5601 * ipa-inline-transform.c (save_inline_function_body): Fill in
5602 former_clone_of of new body holders.
5604 2020-04-30 Jakub Jelinek <jakub@redhat.com>
5606 * BASE-VER: Set to 11.0.0.
5608 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
5610 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
5612 2020-04-30 Marek Polacek <polacek@redhat.com>
5615 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
5616 (check_aligned_type): Check if TYPE_USER_ALIGN match.
5618 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
5620 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
5621 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
5622 * doc/invoke.texi (moutline-atomics): Document as on by default.
5624 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
5627 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
5628 the check for NOTE_INSN_DELETED_LABEL.
5630 2020-04-30 Jakub Jelinek <jakub@redhat.com>
5632 * configure.ac (--with-documentation-root-url,
5633 --with-changes-root-url): Diagnose URL not ending with /,
5634 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
5635 * opts.h (get_changes_url): Remove.
5636 * opts.c (get_changes_url): Remove.
5637 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
5638 or -DCHANGES_ROOT_URL.
5639 * doc/install.texi (--with-documentation-root-url,
5640 --with-changes-root-url): Document.
5641 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
5642 get_changes_url and free, change url variable type to const char * and
5643 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
5644 * config/s390/s390.c (s390_function_arg_vector,
5645 s390_function_arg_float): Likewise.
5646 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
5648 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
5650 * config.in: Regenerate.
5651 * configure: Regenerate.
5653 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
5656 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
5658 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
5660 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
5661 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
5663 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
5665 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
5666 Change constraint for vlrl/vstrl to jb4.
5668 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5670 * var-tracking.c (vt_initialize): Move variables pre and post
5671 into inner block and initialize both in order to fix warning
5672 about uninitialized use. Remove unnecessary checks for
5673 frame_pointer_needed.
5675 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5677 * toplev.c (output_stack_usage_1): Ensure that first
5678 argument to fprintf is not null.
5680 2020-04-29 Jakub Jelinek <jakub@redhat.com>
5682 * configure.ac (-with-changes-root-url): New configure option,
5683 defaulting to https://gcc.gnu.org/.
5684 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
5686 * pretty-print.c (get_end_url_string): New function.
5687 (pp_format): Handle %{ and %} for URLs.
5688 (pp_begin_url): Use pp_string instead of pp_printf.
5689 (pp_end_url): Use get_end_url_string.
5690 * opts.h (get_changes_url): Declare.
5691 * opts.c (get_changes_url): New function.
5692 * config/rs6000/rs6000-call.c: Include opts.h.
5693 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
5694 of just in GCC 10.1 in diagnostics and add URL.
5695 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
5696 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
5698 * config/s390/s390.c (s390_function_arg_vector,
5699 s390_function_arg_float): Likewise.
5700 * configure: Regenerated.
5703 * config/s390/s390.c (s390_function_arg_vector,
5704 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
5705 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
5706 passed to the function rather than the type of the single element.
5707 Rename cxx17_empty_base_seen variable to empty_base_seen, change
5708 type to int, and adjust diagnostics depending on if the field
5709 has [[no_unique_attribute]] or not.
5712 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
5713 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
5714 used in casts into parens.
5715 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
5716 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
5717 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
5718 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
5719 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
5720 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
5721 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
5722 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
5723 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
5724 _mm256_mask_cmp_epu8_mask): Likewise.
5725 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
5726 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
5727 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
5728 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
5731 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
5732 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
5733 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
5734 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
5735 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
5736 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
5737 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
5738 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
5739 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
5740 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
5741 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
5742 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
5743 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
5745 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
5746 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
5747 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
5748 as mask vector containing -1.0 or -1.0f elts, but instead vector
5749 with all bits set using _mm*_cmpeq_p? with zero operands.
5750 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
5751 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
5752 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
5753 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
5754 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
5755 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
5756 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
5757 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
5758 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
5759 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
5760 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
5761 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
5762 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
5763 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
5764 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
5765 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
5766 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
5768 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
5769 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
5770 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
5771 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
5772 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
5773 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
5774 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
5775 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
5776 _mm512_mask_prefetch_i64scatter_ps): Likewise.
5777 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
5778 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
5779 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
5780 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
5781 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
5782 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
5783 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
5784 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
5785 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
5786 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
5787 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
5788 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
5789 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
5790 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
5791 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
5792 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
5793 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
5794 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
5795 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
5796 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
5797 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
5798 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
5799 _mm_mask_i64scatter_epi64): Likewise.
5801 2020-04-29 Jeff Law <law@redhat.com>
5803 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
5804 division instructions are 4 bytes long.
5806 2020-04-29 Jakub Jelinek <jakub@redhat.com>
5809 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
5810 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
5811 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
5812 take address of TARGET_EXPR of fenv_var with void_node initializer.
5815 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5817 PR tree-optimization/94774
5818 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
5821 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5823 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
5824 * calls.c (cxx17_empty_base_field_p): New function. Check
5825 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
5828 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
5831 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
5832 Allow -fcf-protection with -mindirect-branch=thunk-extern and
5833 -mfunction-return=thunk-extern.
5834 * doc/invoke.texi: Update notes for -fcf-protection=branch with
5835 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
5837 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5839 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
5841 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5843 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
5844 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
5845 fenv_var and new_fenv_var.
5847 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5849 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
5850 effective-target keyword.
5851 (arm_arch_v8a_hard_multilib): Likewise.
5852 (arm_arch_v8a_hard): Document new dg-add-options keyword.
5853 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
5854 code is deprecated and has not been updated to handle
5855 DECL_FIELD_ABI_IGNORED.
5856 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
5857 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
5858 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
5859 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
5860 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
5861 something actually is a HFA or HVA. Record whether we see a
5862 [[no_unique_address]] field that previous GCCs would not have
5863 ignored in this way.
5864 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
5865 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
5866 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
5867 diagnostic messages.
5868 (arm_needs_doubleword_align): Add a comment explaining why we
5869 consider even zero-sized fields.
5871 2020-04-29 Richard Biener <rguenther@suse.de>
5872 Li Zekun <lizekun1@huawei.com>
5875 * tree.c (component_ref_size): Guard against error_mark_node
5876 DECL_INITIAL as it happens with LTO.
5878 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5880 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
5881 comment explaining why we consider even zero-sized fields.
5882 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
5883 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
5884 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
5885 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
5886 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
5887 something actually is a HFA or HVA. Record whether we see a
5888 [[no_unique_address]] field that previous GCCs would not have
5889 ignored in this way.
5890 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
5891 whether diagnostics should be suppressed. Update the calls to
5892 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
5893 [[no_unique_address]] case.
5894 (aarch64_return_in_msb): Update call accordingly, never silencing
5896 (aarch64_function_value): Likewise.
5897 (aarch64_return_in_memory_1): Likewise.
5898 (aarch64_init_cumulative_args): Likewise.
5899 (aarch64_gimplify_va_arg_expr): Likewise.
5900 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
5901 use it to decide whether arch64_vfp_is_call_or_return_candidate
5903 (aarch64_pass_by_reference): Update calls accordingly.
5904 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
5905 to decide whether arch64_vfp_is_call_or_return_candidate should be
5908 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
5911 * config/aarch64/aarch64-builtins.c
5912 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
5913 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
5916 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
5918 * configure.ac <$enable_offload_targets>: Do parsing as done
5920 * configure: Regenerate.
5922 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
5923 * configure: Regenerate.
5926 * rtlanal.c (set_noop_p): Handle non-constant selectors.
5929 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
5931 (TARGET_EXCEPT_UNWIND_INFO): Define.
5933 2020-04-29 Jakub Jelinek <jakub@redhat.com>
5936 * config/gcn/gcn.md (*mov<mode>_insn): Use
5937 'reg_overlap_mentioned_p' to check for overlap.
5940 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
5941 instead of cxx17_empty_base_field_p.
5944 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
5945 DECL_FIELD_ABI_IGNORED.
5946 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
5947 * calls.h (cxx17_empty_base_field_p): Change into a temporary
5948 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
5950 * calls.c (cxx17_empty_base_field_p): Remove.
5951 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
5952 DECL_FIELD_ABI_IGNORED.
5953 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
5954 * lto-streamer-out.c (hash_tree): Likewise.
5955 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
5956 cxx17_empty_base_seen to empty_base_seen, change type to int *,
5957 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
5958 cxx17_empty_base_field_p, if "no_unique_address" attribute is
5959 present, propagate that to the caller too.
5960 (rs6000_discover_homogeneous_aggregate): Adjust
5961 rs6000_aggregate_candidate caller, emit different diagnostics
5962 when c++17 empty base fields are present and when empty
5963 [[no_unique_address]] fields are present.
5964 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
5965 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
5968 2020-04-29 Richard Biener <rguenther@suse.de>
5970 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
5971 Just check whether the stmt stores.
5973 2020-04-28 Alexandre Oliva <oliva@adacore.com>
5976 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
5977 output operand in emulation. Don't overwrite pseudos.
5979 2020-04-28 Jeff Law <law@redhat.com>
5981 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
5982 multiply patterns are 4 bytes long.
5984 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
5986 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
5987 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
5989 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
5990 Jakub Jelinek <jakub@redhat.com>
5993 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
5994 base class artificial fields.
5995 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
5996 decision is different after this fix.
5998 2020-04-28 David Malcolm <dmalcolm@redhat.com>
6004 * doc/invoke.texi (Static Analyzer Options): Remove
6005 -Wanalyzer-use-of-uninitialized-value.
6006 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
6008 2020-04-28 Jakub Jelinek <jakub@redhat.com>
6010 PR tree-optimization/94809
6011 * tree.c (build_call_expr_internal_loc_array): Call
6012 process_call_operands.
6014 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
6016 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
6017 * config/aarch64/aarch64-tune.md: Regenerate.
6018 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
6019 (thunderx3t110_regmove_cost): Likewise.
6020 (thunderx3t110_vector_cost): Likewise.
6021 (thunderx3t110_prefetch_tune): Likewise.
6022 (thunderx3t110_tunings): Likewise.
6023 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
6025 * config/aarch64/thunderx3t110.md: New file.
6026 * config/aarch64/aarch64.md: Include thunderx3t110.md.
6027 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
6029 2020-04-28 Jakub Jelinek <jakub@redhat.com>
6032 * config/s390/s390.c (s390_function_arg_vector,
6033 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
6035 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
6037 PR tree-optimization/94727
6038 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
6039 operands are invariant booleans, use the mask type associated with the
6040 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
6041 (vectorizable_condition): Pass vectype unconditionally to
6042 vect_is_simple_cond.
6044 2020-04-27 Jakub Jelinek <jakub@redhat.com>
6047 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
6048 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
6049 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
6051 2020-04-27 David Malcolm <dmalcolm@redhat.com>
6054 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
6055 default value, so that it can by supplied by get_option_html_page.
6056 * configure: Regenerate.
6057 * opts.c: Include "selftest.h".
6058 (get_option_html_page): New function.
6059 (get_option_url): Use it. Reformat to place comments next to the
6060 expressions they refer to.
6061 (selftest::test_get_option_html_page): New.
6062 (selftest::opts_c_tests): New.
6063 * selftest-run-tests.c (selftest::run_tests): Call
6064 selftest::opts_c_tests.
6065 * selftest.h (selftest::opts_c_tests): New decl.
6067 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
6069 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
6070 UINTVAL to CONST_INTs.
6072 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6074 * config/arm/constraints.md (e): Remove constraint.
6075 (Te): Define constraint.
6076 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
6077 operand 0 from "e" to "Te".
6078 (vaddvaq_<supf><mode>): Likewise.
6079 (vaddvq_p_<supf><mode>): Likewise.
6080 (vmladavq_<supf><mode>): Likewise.
6081 (vmladavxq_s<mode>): Likewise.
6082 (vmlsdavq_s<mode>): Likewise.
6083 (vmlsdavxq_s<mode>): Likewise.
6084 (vaddvaq_p_<supf><mode>): Likewise.
6085 (vmladavaq_<supf><mode>): Likewise.
6086 (vmladavq_p_<supf><mode>): Likewise.
6087 (vmladavxq_p_s<mode>): Likewise.
6088 (vmlsdavq_p_s<mode>): Likewise.
6089 (vmlsdavxq_p_s<mode>): Likewise.
6090 (vmlsdavaxq_s<mode>): Likewise.
6091 (vmlsdavaq_s<mode>): Likewise.
6092 (vmladavaxq_s<mode>): Likewise.
6093 (vmladavaq_p_<supf><mode>): Likewise.
6094 (vmladavaxq_p_s<mode>): Likewise.
6095 (vmlsdavaq_p_s<mode>): Likewise.
6096 (vmlsdavaxq_p_s<mode>): Likewise.
6098 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
6100 * config/arm/arm.c (output_move_neon): Only get the first operand if
6103 2020-04-27 Felix Yang <felix.yang@huawei.com>
6105 PR tree-optimization/94784
6106 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
6107 assert around so that it checks that the two vectors have equal
6108 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
6109 types is a useless_type_conversion_p.
6111 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
6114 * dwarf2cfi.c (struct GTY): Add ra_mangled.
6115 (cfi_row_equal_p): Check ra_mangled.
6116 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
6117 this only handles the sparc logic now.
6118 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
6119 the aarch64 specific logic.
6120 (dwarf2out_frame_debug): Update to use the new subroutines.
6121 (change_cfi_row): Check ra_mangled.
6123 2020-04-27 Jakub Jelinek <jakub@redhat.com>
6126 * config/s390/s390.c (s390_function_arg_vector,
6127 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
6129 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
6131 * common/config/rs6000/rs6000-common.c
6132 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
6134 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
6137 2020-04-27 Martin Liska <mliska@suse.cz>
6140 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
6141 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
6143 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
6146 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
6148 (rs6000_emit_prologue_components):
6149 Check with frame_pointer_needed_indeed.
6150 (rs6000_emit_epilogue_components): Likewise.
6151 (rs6000_emit_prologue): Likewise.
6152 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
6154 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
6156 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
6157 stack frame when debugging and flag_compare_debug is enabled.
6159 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
6161 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
6162 enable PC-relative addressing for -mcpu=future.
6163 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
6164 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
6165 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
6166 suppress PC-relative addressing.
6167 (rs6000_option_override_internal): Split up error messages
6168 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
6171 2020-04-25 Jakub Jelinek <jakub@redhat.com>
6172 Richard Biener <rguenther@suse.de>
6174 PR tree-optimization/94734
6175 PR tree-optimization/89430
6176 * tree-ssa-phiopt.c: Include tree-eh.h.
6177 (cond_store_replacement): Return false if an automatic variable
6178 access could trap. If -fstore-data-races, don't return false
6179 just because an automatic variable is addressable.
6181 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
6183 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
6185 (add<mode>_sext_dup2_exec): Likewise.
6187 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
6190 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
6191 endian byteshift_val calculation.
6193 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
6195 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
6197 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
6199 * config/aarch64/arm_sve.h: Add a comment.
6201 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
6203 PR rtl-optimization/94708
6204 * combine.c (simplify_if_then_else): Add check for
6205 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
6207 2020-04-23 Martin Sebor <msebor@redhat.com>
6210 * common.opt (-Wno-frame-larger-than): New option.
6211 (-Wno-larger-than, -Wno-stack-usage): Same.
6213 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
6215 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
6217 (mov<mode>_exec): Likewise.
6218 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
6219 (<convop><mode><vndi>2_exec): Likewise.
6221 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
6223 PR tree-optimization/94717
6224 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
6225 of the stores doesn't have the same landing pad number as the first.
6226 (coalesce_immediate_stores): Do not try to coalesce the store using
6227 bswap if it doesn't have the same landing pad number as the first.
6229 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
6231 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
6232 Replace outdated link to ELFv2 ABI.
6234 2020-04-23 Jakub Jelinek <jakub@redhat.com>
6237 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
6241 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
6242 temporarily with non-final second operand and updating it later,
6243 push COMPOUND_EXPRs into a vector and process it in reverse,
6244 creating COMPOUND_EXPRs with the final operands.
6246 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
6249 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
6250 bti c and bti j handling.
6252 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
6253 Thomas Schwinge <thomas@codesourcery.com>
6257 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
6258 t_async and the wait arguments.
6260 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
6262 PR tree-optimization/94727
6263 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
6264 comparing invariant scalar booleans.
6266 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
6267 Jakub Jelinek <jakub@redhat.com>
6270 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
6271 empty base class artificial fields.
6272 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
6273 different after this fix.
6275 2020-04-23 Jakub Jelinek <jakub@redhat.com>
6278 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
6279 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
6280 if the same type has been diagnosed most recently already.
6282 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6284 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
6286 (__arm_vbicq_n_s16): Likewise.
6287 (__arm_vbicq_n_u32): Likewise.
6288 (__arm_vbicq_n_s32): Likewise.
6289 (__arm_vbicq): Likewise.
6290 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
6291 (__arm_vbicq_n_s32): Likewise.
6292 (__arm_vbicq_n_u16): Likewise.
6293 (__arm_vbicq_n_u32): Likewise.
6294 (__arm_vdupq_m_n_s8): Likewise.
6295 (__arm_vdupq_m_n_s16): Likewise.
6296 (__arm_vdupq_m_n_s32): Likewise.
6297 (__arm_vdupq_m_n_u8): Likewise.
6298 (__arm_vdupq_m_n_u16): Likewise.
6299 (__arm_vdupq_m_n_u32): Likewise.
6300 (__arm_vdupq_m_n_f16): Likewise.
6301 (__arm_vdupq_m_n_f32): Likewise.
6302 (__arm_vldrhq_gather_offset_s16): Likewise.
6303 (__arm_vldrhq_gather_offset_s32): Likewise.
6304 (__arm_vldrhq_gather_offset_u16): Likewise.
6305 (__arm_vldrhq_gather_offset_u32): Likewise.
6306 (__arm_vldrhq_gather_offset_f16): Likewise.
6307 (__arm_vldrhq_gather_offset_z_s16): Likewise.
6308 (__arm_vldrhq_gather_offset_z_s32): Likewise.
6309 (__arm_vldrhq_gather_offset_z_u16): Likewise.
6310 (__arm_vldrhq_gather_offset_z_u32): Likewise.
6311 (__arm_vldrhq_gather_offset_z_f16): Likewise.
6312 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
6313 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
6314 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
6315 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
6316 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
6317 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
6318 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
6319 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
6320 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
6321 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
6322 (__arm_vldrwq_gather_offset_s32): Likewise.
6323 (__arm_vldrwq_gather_offset_u32): Likewise.
6324 (__arm_vldrwq_gather_offset_f32): Likewise.
6325 (__arm_vldrwq_gather_offset_z_s32): Likewise.
6326 (__arm_vldrwq_gather_offset_z_u32): Likewise.
6327 (__arm_vldrwq_gather_offset_z_f32): Likewise.
6328 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
6329 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
6330 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
6331 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
6332 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
6333 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
6334 (__arm_vdwdupq_x_n_u8): Likewise.
6335 (__arm_vdwdupq_x_n_u16): Likewise.
6336 (__arm_vdwdupq_x_n_u32): Likewise.
6337 (__arm_viwdupq_x_n_u8): Likewise.
6338 (__arm_viwdupq_x_n_u16): Likewise.
6339 (__arm_viwdupq_x_n_u32): Likewise.
6340 (__arm_vidupq_x_n_u8): Likewise.
6341 (__arm_vddupq_x_n_u8): Likewise.
6342 (__arm_vidupq_x_n_u16): Likewise.
6343 (__arm_vddupq_x_n_u16): Likewise.
6344 (__arm_vidupq_x_n_u32): Likewise.
6345 (__arm_vddupq_x_n_u32): Likewise.
6346 (__arm_vldrdq_gather_offset_s64): Likewise.
6347 (__arm_vldrdq_gather_offset_u64): Likewise.
6348 (__arm_vldrdq_gather_offset_z_s64): Likewise.
6349 (__arm_vldrdq_gather_offset_z_u64): Likewise.
6350 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
6351 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
6352 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
6353 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
6354 (__arm_vidupq_m_n_u8): Likewise.
6355 (__arm_vidupq_m_n_u16): Likewise.
6356 (__arm_vidupq_m_n_u32): Likewise.
6357 (__arm_vddupq_m_n_u8): Likewise.
6358 (__arm_vddupq_m_n_u16): Likewise.
6359 (__arm_vddupq_m_n_u32): Likewise.
6360 (__arm_vidupq_n_u16): Likewise.
6361 (__arm_vidupq_n_u32): Likewise.
6362 (__arm_vidupq_n_u8): Likewise.
6363 (__arm_vddupq_n_u16): Likewise.
6364 (__arm_vddupq_n_u32): Likewise.
6365 (__arm_vddupq_n_u8): Likewise.
6367 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
6369 * doc/install.texi (D-Specific Options): Document
6370 --enable-libphobos-checking and --with-libphobos-druntime-only.
6372 2020-04-23 Jakub Jelinek <jakub@redhat.com>
6375 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
6376 cxx17_empty_base_seen argument. Pass it to recursive calls.
6377 Ignore cxx17_empty_base_field_p fields after setting
6378 *cxx17_empty_base_seen to true.
6379 (rs6000_discover_homogeneous_aggregate): Adjust
6380 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
6381 aggregates with C++17 empty base fields.
6384 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
6385 if last_decl is error_mark_node or has such a TREE_TYPE.
6388 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
6389 if last_decl is error_mark_node or has such a TREE_TYPE.
6391 2020-04-22 Felix Yang <felix.yang@huawei.com>
6394 * config/aarch64/aarch64.h (TARGET_SVE):
6395 Add && !TARGET_GENERAL_REGS_ONLY.
6396 (TARGET_SVE2): Add && TARGET_SVE.
6397 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
6398 TARGET_SVE2_SM4): Add && TARGET_SVE2.
6399 * config/aarch64/aarch64-sve-builtins.h
6400 (sve_switcher::m_old_general_regs_only): New member.
6401 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
6403 (reported_missing_registers_p): New variable.
6404 (check_required_extensions): Call check_required_registers before
6405 return if all required extenstions are present.
6406 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
6407 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
6408 global_options.x_target_flags.
6409 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
6410 global_options.x_target_flags if m_old_general_regs_only is true.
6412 2020-04-22 Zackery Spytz <zspytz@gmail.com>
6414 * doc/extend.exi: Add "free" to list of other builtin functions
6417 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
6420 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
6422 (store_quadpti): Ditto.
6423 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
6424 plq will be used and doesn't need it.
6425 (atomic_store<mode>): Ditto, for pstq.
6427 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
6429 * doc/invoke.texi: Update flags turned on by -O3.
6431 2020-04-22 Jakub Jelinek <jakub@redhat.com>
6434 * config/ia64/ia64.c (hfa_element_mode): Ignore
6435 cxx17_empty_base_field_p fields.
6438 * calls.h (cxx17_empty_base_field_p): Declare.
6439 * calls.c (cxx17_empty_base_field_p): Define.
6441 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
6443 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
6445 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
6446 Andre Vieira <andre.simoesdiasvieira@arm.com>
6447 Mihail Ionescu <mihail.ionescu@arm.com>
6449 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
6450 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
6451 (ALL_QUIRKS): Add quirk_no_asmcpu.
6452 (cortex-m55): Define new cpu.
6453 * config/arm/arm-tables.opt: Regenerate.
6454 * config/arm/arm-tune.md: Likewise.
6455 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
6457 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
6459 PR tree-optimization/94700
6460 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
6461 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
6462 of similarly-structured but distinct vector types.
6464 2020-04-21 Martin Sebor <msebor@redhat.com>
6467 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
6468 the computation of the lower bound of the source access size.
6469 (builtin_access::generic_overlap): Remove a hack for setting ranges
6472 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
6474 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
6475 (ASM_WEAKEN_DECL): New define.
6476 (HAVE_GAS_WEAKREF): Undefine.
6478 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
6480 PR tree-optimization/94683
6481 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
6482 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
6483 but distinct vector types.
6485 2020-04-21 Jakub Jelinek <jakub@redhat.com>
6488 * stor-layout.c (place_field, finalize_record_size): Don't emit
6489 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
6490 * ubsan.c (ubsan_get_type_descriptor_type,
6491 ubsan_get_source_location_type, ubsan_create_data): Set
6493 * asan.c (asan_global_struct): Likewise.
6495 2020-04-21 Duan bo <duanbo3@huawei.com>
6498 * config/aarch64/aarch64.c: Add an error message for option conflict.
6499 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
6500 incompatible with -fpic, -fPIC and -mabi=ilp32.
6502 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
6505 * omp-low.c (new_omp_context): Remove assignments to
6506 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
6508 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
6510 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
6511 ("popcountv2di2_vx"): Use simplify_gen_subreg.
6513 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
6516 * config/s390/s390-builtin-types.def: Add 3 new function modes.
6517 * config/s390/s390-builtins.def: Add mode dependent low-level
6518 builtin and map the overloaded builtins to these.
6519 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
6520 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
6522 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
6524 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
6525 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
6526 estimated VF and is no worse at double the estimated VF.
6528 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
6531 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
6532 order of arguments to rtx_vector_builder.
6533 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
6534 When extending the trailing constants to a full vector, replace any
6535 variables with zeros.
6537 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
6540 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
6543 2020-04-20 Martin Liska <mliska@suse.cz>
6545 * symtab.c (symtab_node::dump_references): Add space after
6547 (symtab_node::dump_referring): Likewise.
6549 2020-04-18 Jeff Law <law@redhat.com>
6552 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
6555 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
6557 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
6558 attributes): Document d_runtime_has_std_library.
6560 2020-04-17 Jeff Law <law@redhat.com>
6562 PR rtl-optimization/90275
6563 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
6564 when the destination has a REG_UNUSED note.
6566 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
6569 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
6572 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
6574 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
6575 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
6576 cost of load and store insns if one loop iteration has enough scalar
6577 elements to use an Advanced SIMD LDP or STP.
6578 (aarch64_add_stmt_cost): Update call accordingly.
6580 2020-04-17 Jakub Jelinek <jakub@redhat.com>
6581 Jeff Law <law@redhat.com>
6584 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
6585 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
6586 or pos + len >= 32, or pos + len is equal to operands[2] precision
6587 and operands[2] is not a register operand. During splitting perform
6588 SImode AND if operands[0] doesn't have CCZmode and pos + len is
6589 equal to mode precision.
6591 2020-04-17 Richard Biener <rguenther@suse.de>
6594 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
6596 * dwarf2out.c (dw_val_equal_p): Fix pasto in
6597 dw_val_class_vms_delta comparison.
6598 * optabs.c (expand_binop_directly): Fix pasto in commutation
6600 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
6603 2020-04-17 Jakub Jelinek <jakub@redhat.com>
6605 PR rtl-optimization/94618
6606 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
6607 insn is the BB_END of its block, but also when it is only followed
6608 by DEBUG_INSNs in its block.
6610 PR tree-optimization/94621
6611 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
6612 Move id->adjust_array_error_bounds check first in the condition.
6614 2020-04-17 Martin Liska <mliska@suse.cz>
6615 Jonathan Yong <10walls@gmail.com>
6617 PR gcov-profile/94570
6618 * coverage.c (coverage_init): Use separator properly.
6620 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
6622 PR rtl-optimization/93974
6623 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
6624 (rs6000_cannot_substitute_mem_equiv_p): New function.
6626 2020-04-16 Martin Jambor <mjambor@suse.cz>
6629 * ipa-inline.h (ipa_saved_clone_sources): Declare.
6630 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
6631 (save_inline_function_body): Link the new body holder with the
6633 * cgraph.c: Include ipa-inline.h.
6634 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
6635 the statement in ipa_saved_clone_sources.
6636 * cgraphunit.c: Include ipa-inline.h.
6637 (expand_all_functions): Free ipa_saved_clone_sources.
6639 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
6642 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
6643 the VNx16BI lowpart of the recursively-generated constant.
6645 2020-04-16 Martin Liska <mliska@suse.cz>
6646 Jakub Jelinek <jakub@redhat.com>
6649 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
6650 DECL_IS_REPLACEABLE_OPERATOR during cloning.
6651 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
6652 (propagate_necessity): Check operator names.
6654 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
6656 PR rtl-optimization/94605
6657 * early-remat.c (early_remat::process_block): Handle insns that
6658 set multiple candidate registers.
6659 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
6661 PR gcov-profile/93401
6662 * common.opt (profile-prefix-path): New option.
6663 * coverae.c: Include diagnostics.h.
6664 (coverage_init): Strip profile prefix path.
6665 * doc/invoke.texi (-fprofile-prefix-path): Document.
6667 2020-04-16 Richard Biener <rguenther@suse.de>
6670 * expr.c (emit_move_multi_word): Do not generate code when
6671 the destination part is undefined_operand_subword_p.
6672 * lower-subreg.c (resolve_clobber): Look through a paradoxica
6675 2020-04-16 Martin Jambor <mjambor@suse.cz>
6677 PR tree-optimization/94598
6678 * tree-sra.c (verify_sra_access_forest): Fix verification of total
6679 scalarization accesses under access to one-element arrays.
6681 2020-04-16 Jakub Jelinek <jakub@redhat.com>
6684 * function.c (assign_parm_find_data_types): Add workaround for
6685 BROKEN_VALUE_INITIALIZATION compilers.
6687 2020-04-16 Richard Biener <rguenther@suse.de>
6689 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
6692 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
6695 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
6696 Require OPTION_MASK_ISA_SSE2.
6698 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
6701 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
6702 Don't construct a dump_context temporary to call static method.
6704 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
6706 * config/aarch64/falkor-tag-collision-avoidance.c
6707 (valid_src_p): Check for aarch64_address_info type before
6708 accessing base field.
6710 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
6712 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
6713 (V_sz_elem2): Remove unused mode attribute.
6715 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
6717 * config/arm/arm.md (arm_movdi): Disallow for MVE.
6719 2020-04-15 Richard Biener <rguenther@suse.de>
6722 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
6723 alias_sets_conflict_p for pointers.
6725 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
6728 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
6729 (extendhisi2_internal): Add %v1 before the load instructions.
6731 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
6734 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
6735 use PC-relative addressing for TLS references.
6737 2020-04-14 Martin Jambor <mjambor@suse.cz>
6740 * ipa-sra.c: Include internal-fn.h.
6741 (enum isra_scan_context): Update comment.
6742 (scan_function): Treat calls to internal_functions like loads or stores.
6744 2020-04-14 Yang Yang <yangyang305@huawei.com>
6746 PR tree-optimization/94574
6747 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
6748 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
6750 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
6753 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
6755 2020-04-13 Martin Sebor <msebor@redhat.com>
6757 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
6758 -Wformat-truncation. Move -Wzero-length-bounds last.
6759 (-Wrestrict): Document positive form of option enabled by -Wall.
6761 2020-04-13 Zachary Spytz <zspytz@gmail.com>
6763 * doc/extend.texi: Add realloc to list of built-in functions
6764 are recognized by the compiler.
6766 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
6769 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
6770 pointer in word_mode for eh_return epilogues.
6772 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6774 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
6775 memory references in %B, %C and %D operand selectors when the inner
6776 operand is a post increment address.
6778 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6780 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
6781 reference by 4 bytes, and %D memory reference by 6 bytes.
6783 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
6786 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
6787 condition for V4SI, V8HI and V16QI modes.
6789 2020-04-11 Jakub Jelinek <jakub@redhat.com>
6793 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
6796 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
6800 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
6801 "#pragma omp declare target" has also been applied.
6803 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6805 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
6806 when to emit the epilogue_helper insn.
6807 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
6810 2020-04-09 Jakub Jelinek <jakub@redhat.com>
6813 * cselib.h (cselib_record_sp_cfa_base_equiv,
6814 cselib_sp_derived_value_p): Declare.
6815 * cselib.c (cselib_record_sp_cfa_base_equiv,
6816 cselib_sp_derived_value_p): New functions.
6817 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
6818 cselib_sp_derived_value_p values.
6819 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
6820 start of extended basic blocks other than the first one
6821 for !frame_pointer_needed functions.
6823 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
6825 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
6826 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
6827 (aarch64_sve2048_hw): Document.
6828 * config/aarch64/aarch64-protos.h
6829 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
6830 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
6831 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
6832 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
6834 (find_type_suffix_for_scalar_type): Use it instead of comparing
6836 (function_resolver::infer_vector_or_tuple_type): Likewise.
6837 (function_resolver::require_vector_type): Likewise.
6838 (handle_arm_sve_vector_bits_attribute): New function.
6839 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
6840 (aarch64_attribute_table): Add arm_sve_vector_bits.
6841 (aarch64_return_in_memory_1):
6842 (pure_scalable_type_info::piece::get_rtx): New function.
6843 (pure_scalable_type_info::num_zr): Likewise.
6844 (pure_scalable_type_info::num_pr): Likewise.
6845 (pure_scalable_type_info::get_rtx): Likewise.
6846 (pure_scalable_type_info::analyze): Likewise.
6847 (pure_scalable_type_info::analyze_registers): Likewise.
6848 (pure_scalable_type_info::analyze_array): Likewise.
6849 (pure_scalable_type_info::analyze_record): Likewise.
6850 (pure_scalable_type_info::add_piece): Likewise.
6851 (aarch64_some_values_include_pst_objects_p): Likewise.
6852 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
6853 to analyze whether the type is returned in SVE registers.
6854 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
6855 is passed in SVE registers.
6856 (aarch64_pass_by_reference_1): New function, extracted from...
6857 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
6858 to analyze whether the type is a pure scalable type and, if so,
6859 whether it should be passed by reference.
6860 (aarch64_return_in_msb): Return false for pure scalable types.
6861 (aarch64_function_value_1): Fold back into...
6862 (aarch64_function_value): ...this function. Use
6863 pure_scalable_type_info to analyze whether the type is a pure
6864 scalable type and, if so, which registers it should use. Handle
6865 types that include pure scalable types but are not themselves
6866 pure scalable types.
6867 (aarch64_return_in_memory_1): New function, split out from...
6868 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
6869 to analyze whether the type is a pure scalable type and, if so,
6870 whether it should be returned by reference.
6871 (aarch64_layout_arg): Remove orig_mode argument. Use
6872 pure_scalable_type_info to analyze whether the type is a pure
6873 scalable type and, if so, which registers it should use. Handle
6874 types that include pure scalable types but are not themselves
6875 pure scalable types.
6876 (aarch64_function_arg): Update call accordingly.
6877 (aarch64_function_arg_advance): Likewise.
6878 (aarch64_pad_reg_upward): On big-endian targets, return false for
6879 pure scalable types that are smaller than 16 bytes.
6880 (aarch64_member_type_forces_blk): New function.
6881 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
6882 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
6883 correspond to built-in SVE types. Do not rely on a vector mode
6884 if the type includes an pure scalable type. When returning true,
6885 assert that the mode is not an SVE mode.
6886 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
6887 built-in types here. When returning true, assert that the type
6888 does not have an SVE mode.
6889 (aarch64_can_change_mode_class): Don't allow anything to change
6890 between a predicate mode and a non-predicate mode. Also don't
6891 allow changes between SVE vector modes and other modes that
6892 might be bigger than 128 bits.
6893 (aarch64_invalid_binary_op): Reject binary operations that mix
6894 SVE and GNU vector types.
6895 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
6897 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
6899 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
6900 "SVE sizeless type".
6901 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
6902 (sizeless_type_p): New functions.
6903 (register_builtin_types): Apply make_type_sizeless to the type.
6904 (register_tuple_type): Likewise.
6905 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
6907 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
6909 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
6912 2020-04-09 Martin Jambor <mjambor@suse.cz>
6913 Richard Biener <rguenther@suse.de>
6915 PR tree-optimization/94482
6916 * tree-sra.c (create_access_replacement): Dump new replacement with
6918 (sra_modify_expr): Fix handling of cases when the original EXPR writes
6919 to only part of the replacement.
6920 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
6921 the first operand of combinations into REAL/IMAGPART_EXPR and
6924 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
6926 * doc/sourcebuild.texi (check-function-bodies): Treat the third
6927 parameter as a list of option regexps and require each regexp
6930 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
6933 * config/aarch64/falkor-tag-collision-avoidance.c
6934 (valid_src_p): Fix missing rtx type check.
6936 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
6937 Richard Biener <rguenther@suse.de>
6939 PR tree-optimization/93674
6940 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
6941 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
6942 or non-mode precision type, add candidate in unsigned type with the
6945 2020-04-08 Clement Chigot <clement.chigot@atos.net>
6947 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
6948 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
6949 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
6951 2020-04-08 Jakub Jelinek <jakub@redhat.com>
6954 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
6956 * reload1.c (eliminate_regs_1): Avoid creating
6957 (plus (reg) (const_int 0)) in DEBUG_INSNs.
6959 PR tree-optimization/94524
6960 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
6961 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
6962 op1 rather than op1 itself at the end. Punt for signed modulo by
6963 most negative constant.
6964 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
6965 modulo by most negative constant.
6967 2020-04-08 Richard Biener <rguenther@suse.de>
6969 PR rtl-optimization/93946
6970 * cse.c (cse_insn): Record the tabled expression in
6971 src_related. Verify a redundant store removal is valid.
6973 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
6976 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
6977 ENDBR at function entry if function will be called indirectly.
6979 2020-04-08 Jakub Jelinek <jakub@redhat.com>
6982 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
6985 2020-04-08 Martin Liska <mliska@suse.cz>
6988 * gimple.c (gimple_call_operator_delete_p): Rename to...
6989 (gimple_call_replaceable_operator_delete_p): ... this.
6990 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
6991 * gimple.h (gimple_call_operator_delete_p): Rename to ...
6992 (gimple_call_replaceable_operator_delete_p): ... this.
6993 * tree-core.h (tree_function_decl): Add replaceable_operator
6995 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
6996 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
6997 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
6998 (eliminate_unnecessary_stmts): Likewise.
6999 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
7000 Pack DECL_IS_REPLACEABLE_OPERATOR.
7001 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
7002 Unpack the field here.
7003 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
7004 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
7005 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
7006 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
7007 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
7008 replaceable operator flags.
7010 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
7011 Matthew Malcomson <matthew.malcomson@arm.com>
7013 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
7014 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
7015 (CX_TERNARY_QUALIFIERS): Likewise.
7016 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
7017 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
7018 (arm_init_acle_builtins): Initialize CDE builtins.
7019 (arm_expand_acle_builtin): Check CDE constant operands.
7020 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
7021 of CDE constant operand.
7022 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
7024 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
7025 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
7026 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
7027 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
7028 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
7029 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
7030 * config/arm/arm_cde_builtins.def: New file.
7031 * config/arm/iterators.md (V_reg): New attribute of SI.
7032 * config/arm/predicates.md (const_int_coproc_operand): New.
7033 (const_int_vcde1_operand, const_int_vcde2_operand): New.
7034 (const_int_vcde3_operand): New.
7035 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
7036 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
7037 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
7038 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
7040 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
7042 * config.gcc: Add arm_cde.h.
7043 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
7044 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
7045 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
7046 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
7047 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
7048 * config/arm/arm.h (TARGET_CDE): New macro.
7049 * config/arm/arm_cde.h: New file.
7050 * doc/invoke.texi: Document CDE options +cdecp[0-7].
7051 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
7053 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
7055 2020-04-08 Jakub Jelinek <jakub@redhat.com>
7057 PR rtl-optimization/94516
7058 * postreload.c: Include rtl-iter.h.
7059 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
7060 looking for all MEMs with RTX_AUTOINC operand.
7061 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
7063 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
7065 * omp-grid.c (grid_eliminate_combined_simd_part): Use
7066 OMP_CLAUSE_CODE to access the omp clause code.
7068 2020-04-07 Jeff Law <law@redhat.com>
7070 PR rtl-optimization/92264
7071 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
7072 the destination is the stack pointer.
7074 2020-04-07 Jakub Jelinek <jakub@redhat.com>
7076 PR rtl-optimization/94291
7077 PR rtl-optimization/84169
7078 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
7079 must be a REG or SUBREG of REG; if it is not one of these, don't
7082 2020-04-07 Richard Biener <rguenther@suse.de>
7085 * gimplify.c (gimplify_addr_expr): Also consider generated
7088 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7090 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
7092 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7094 * config/arm/arm_mve.h: Cast some pointers to expected types.
7096 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7098 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
7099 same with '__arm_' prefix.
7101 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7103 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
7105 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7107 * config/arm/arm.c (arm_mve_immediate_check): Removed.
7108 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
7109 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
7110 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
7111 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
7112 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
7113 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
7115 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7117 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
7119 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7121 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
7122 * config/arm/mve/md: Fix v[id]wdup patterns.
7124 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7126 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
7127 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
7129 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7131 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
7132 and remove const_ptr enums.
7134 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
7136 * config/arm/arm_mve.h (vsubq_n): Merge with...
7138 (vmulq_n): Merge with...
7140 (__ARM_mve_typeid): Simplify scalar and constant detection.
7142 2020-04-07 Jakub Jelinek <jakub@redhat.com>
7145 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
7146 for inter-lane permutation for 64-byte modes.
7149 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
7150 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
7151 Assume it is a REG after that instead of testing it and doing FAIL
7152 otherwise. Formatting fix.
7154 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
7156 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
7158 2020-04-07 Jakub Jelinek <jakub@redhat.com>
7161 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
7162 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
7164 2020-04-06 Jakub Jelinek <jakub@redhat.com>
7166 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
7167 + const0_rtx return the SP_DERIVED_VALUE_P.
7169 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
7171 PR rtl-optimization/92989
7172 * lra-lives.c (process_bb_lives): Do not treat eh_return data
7173 registers as being live at the beginning of the EH receiver.
7175 2020-04-05 Zachary Spytz <zspytz@gmail.com>
7177 * extend.texi: Add free to list of ISO C90 functions that
7178 are recognized by the compiler.
7180 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
7182 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
7185 * config/microblaze/microblaze.md (trap): Update output pattern.
7187 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
7188 Jakub Jelinek <jakub@redhat.com>
7191 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
7192 arrays, pointer-to-members, function types and qualifiers when
7193 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
7194 to emit type again on definition.
7196 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
7199 * ipa-fnsummary.c (vrp_will_run_p): New function.
7200 (fre_will_run_p): New function.
7201 (evaluate_properties_for_edge): Use it.
7202 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
7203 !optimize_debug to optimize_debug.
7205 2020-04-04 Jakub Jelinek <jakub@redhat.com>
7207 PR rtl-optimization/94468
7208 * cselib.c (references_value_p): Formatting fix.
7209 (cselib_useless_value_p): New function.
7210 (discard_useless_locs, discard_useless_values,
7211 cselib_invalidate_regno_val, cselib_invalidate_mem,
7212 cselib_record_set): Use it instead of
7213 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
7216 * tree-iterator.h (expr_single): Declare.
7217 * tree-iterator.c (expr_single): New function.
7218 * tree.h (protected_set_expr_location_if_unset): Declare.
7219 * tree.c (protected_set_expr_location): Use expr_single.
7220 (protected_set_expr_location_if_unset): New function.
7222 2020-04-03 Jeff Law <law@redhat.com>
7224 PR rtl-optimization/92264
7225 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
7226 reloading of auto-increment addressing modes.
7228 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
7231 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
7234 2020-04-03 Jeff Law <law@redhat.com>
7236 PR rtl-optimization/92264
7237 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
7238 post-increment addressing of source operands as well as residuals
7239 when computing any adjustments to the input pointer.
7241 2020-04-03 Jakub Jelinek <jakub@redhat.com>
7244 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
7245 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
7246 second half of first lane from first lane of second operand and
7247 first half of second lane from second lane of first operand.
7249 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
7251 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
7253 2020-04-03 Tamar Christina <tamar.christina@arm.com>
7256 * common/config/aarch64/aarch64-common.c
7257 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
7259 2020-04-03 Richard Biener <rguenther@suse.de>
7262 * tree.c (array_ref_low_bound): Deal with released SSA names
7265 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
7267 * config/gcn/gcn.c (print_operand): Handle unordered comparison
7269 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
7270 comparison operators.
7272 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
7274 PR tree-optimization/94443
7275 * tree-vect-loop.c (vectorizable_live_operation): Use
7276 gsi_insert_seq_before to replace gsi_insert_before.
7278 2020-04-03 Martin Liska <mliska@suse.cz>
7281 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
7282 Compare type attributes for gimple_call_fntypes.
7284 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
7286 * alias.c (get_alias_set): Fix comment typos.
7288 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
7291 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
7292 attribute checking used by TYPE.
7294 2020-04-02 Martin Jambor <mjambor@suse.cz>
7297 * ipa-sra.c (struct caller_issues): New fields candidate and
7298 call_from_outside_comdat.
7299 (check_for_caller_issues): Check for calls from outsied of
7300 candidate's same_comdat_group.
7301 (check_all_callers_for_issues): Set up issues.candidate, check result
7303 (mark_callers_calls_comdat_local): New function.
7304 (process_isra_node_results): Set calls_comdat_local of callers if
7307 2020-04-02 Richard Biener <rguenther@suse.de>
7310 * common.opt (ffinite-loops): Initialize to zero.
7311 * opts.c (default_options_table): Remove OPT_ffinite_loops
7313 * cfgloop.h (loop::finite_p): New member.
7314 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
7315 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
7317 * lto-streamer-in.c (input_cfg): Stream finite_p.
7318 * lto-streamer-out.c (output_cfg): Likewise.
7319 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
7320 from flag_finite_loops at CFG build time.
7321 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
7322 finite_p flag instead of flag_finite_loops.
7323 * doc/invoke.texi (ffinite-loops): Adjust documentation of
7326 2020-04-02 Richard Biener <rguenther@suse.de>
7329 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
7330 DW_TAG_imported_unit.
7332 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
7334 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
7335 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
7338 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
7340 PR tree-optimization/94401
7341 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
7342 access type when loading halves of vector to avoid peeling for gaps.
7344 2020-04-02 Jakub Jelinek <jakub@redhat.com>
7346 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
7347 between a string literal and MIPS_SYSVERSION_SPEC macro.
7349 2020-04-02 Martin Jambor <mjambor@suse.cz>
7351 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
7353 2020-04-02 Jakub Jelinek <jakub@redhat.com>
7355 PR rtl-optimization/92264
7356 * params.opt (-param=max-find-base-term-values=): Decrease default
7359 PR rtl-optimization/92264
7360 * rtl.h (struct rtx_def): Mention that call bit is used as
7361 SP_DERIVED_VALUE_P in cselib.c.
7362 * cselib.c (SP_DERIVED_VALUE_P): Define.
7363 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
7364 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
7365 val_rtx and sp based expression where offsets cancel each other.
7366 (preserve_constants_and_equivs): Formatting fix.
7367 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
7368 locs list for cfa_base_preserved_val if needed. Formatting fix.
7369 (autoinc_split): If the to be returned value is a REG, MEM or
7370 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
7371 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
7372 (rtx_equal_for_cselib_1): Call autoinc_split even if both
7373 expressions are PLUS in Pmode with CONST_INT second operands.
7374 Handle SP_DERIVED_VALUE_P cases.
7375 (cselib_hash_plus_const_int): New function.
7376 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
7377 second operand, as well as for PRE_DEC etc. that ought to be
7378 hashed the same way.
7379 (cselib_subst_to_values): Substitute PLUS with Pmode and
7380 CONST_INT operand if the first operand is a VALUE which has
7381 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
7382 SP_DERIVED_VALUE_P + adjusted offset.
7383 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
7384 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
7385 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
7386 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
7387 on the sp value before calling cselib_add_permanent_equiv on the
7389 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
7390 in the insn without REG_INC note.
7391 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
7392 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
7395 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
7396 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
7398 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7401 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
7402 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
7403 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
7404 intrinsic defintion by adding a new builtin call to writeback into base
7406 (__arm_vldrdq_gather_base_wb_u64): Likewise.
7407 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
7408 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
7409 (__arm_vldrwq_gather_base_wb_s32): Likewise.
7410 (__arm_vldrwq_gather_base_wb_u32): Likewise.
7411 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
7412 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
7413 (__arm_vldrwq_gather_base_wb_f32): Likewise.
7414 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
7415 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
7416 builtin's qualifier.
7417 (vldrdq_gather_base_wb_z_u): Likewise.
7418 (vldrwq_gather_base_wb_u): Likewise.
7419 (vldrdq_gather_base_wb_u): Likewise.
7420 (vldrwq_gather_base_wb_z_s): Likewise.
7421 (vldrwq_gather_base_wb_z_f): Likewise.
7422 (vldrdq_gather_base_wb_z_s): Likewise.
7423 (vldrwq_gather_base_wb_s): Likewise.
7424 (vldrwq_gather_base_wb_f): Likewise.
7425 (vldrdq_gather_base_wb_s): Likewise.
7426 (vldrwq_gather_base_nowb_z_u): Define builtin.
7427 (vldrdq_gather_base_nowb_z_u): Likewise.
7428 (vldrwq_gather_base_nowb_u): Likewise.
7429 (vldrdq_gather_base_nowb_u): Likewise.
7430 (vldrwq_gather_base_nowb_z_s): Likewise.
7431 (vldrwq_gather_base_nowb_z_f): Likewise.
7432 (vldrdq_gather_base_nowb_z_s): Likewise.
7433 (vldrwq_gather_base_nowb_s): Likewise.
7434 (vldrwq_gather_base_nowb_f): Likewise.
7435 (vldrdq_gather_base_nowb_s): Likewise.
7436 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
7438 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
7439 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
7440 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
7441 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
7442 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
7443 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
7444 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
7445 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
7446 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
7447 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
7448 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
7450 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
7452 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
7453 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
7454 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
7455 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
7456 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
7457 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
7458 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
7459 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
7460 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
7462 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
7463 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
7464 Remove constraints from expander.
7465 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
7466 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
7467 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
7468 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
7469 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
7470 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
7472 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
7474 PR rtl-optimization/94123
7475 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
7476 flag_split_wide_types_early.
7478 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
7480 * doc/extend.texi (Common Function Attributes): Fix typo.
7482 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
7485 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
7488 2020-04-01 Zackery Spytz <zspytz@gmail.com>
7490 * doc/extend.texi: Fix a typo in the documentation of the
7491 copy function attribute.
7493 2020-04-01 Jakub Jelinek <jakub@redhat.com>
7496 * tree-object-size.c (pass_object_sizes::execute): Don't call
7497 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
7498 call replace_call_with_value.
7500 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
7502 PR tree-optimization/94043
7503 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
7504 phi for vec_lhs and use it for lane extraction.
7506 2020-03-31 Felix Yang <felix.yang@huawei.com>
7508 PR tree-optimization/94398
7509 * tree-vect-stmts.c (vectorizable_store): Instead of calling
7510 vect_supportable_dr_alignment, set alignment_support_scheme to
7511 dr_unaligned_supported for gather-scatter accesses.
7512 (vectorizable_load): Likewise.
7514 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
7516 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
7518 (vnsi, VnSI, vndi, VnDI): New mode attributes.
7519 (mov<mode>): Use <VnDI> in place of V64DI.
7520 (mov<mode>_exec): Likewise.
7521 (mov<mode>_sgprbase): Likewise.
7522 (reload_out<mode>): Likewise.
7523 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
7524 (gather_load<mode>v64si): Rename to ...
7525 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
7526 and <VnDI> in place of V64DI.
7527 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
7528 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
7529 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
7530 (scatter_store<mode>v64si): Rename to ...
7531 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
7532 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
7533 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
7534 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
7535 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
7536 (ds_bpermute<mode>): Use <VnSI>.
7537 (addv64si3_vcc<exec_vcc>): Rename to ...
7538 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
7539 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
7540 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
7541 (addcv64si3<exec_vcc>): Rename to ...
7542 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
7543 (subv64si3_vcc<exec_vcc>): Rename to ...
7544 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
7545 (subcv64si3<exec_vcc>): Rename to ...
7546 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
7547 (addv64di3): Rename to ...
7548 (add<mode>3): ... this, and use V_DI.
7549 (addv64di3_exec): Rename to ...
7550 (add<mode>3_exec): ... this, and use V_DI.
7551 (subv64di3): Rename to ...
7552 (sub<mode>3): ... this, and use V_DI.
7553 (subv64di3_exec): Rename to ...
7554 (sub<mode>3_exec): ... this, and use V_DI.
7555 (addv64di3_zext): Rename to ...
7556 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
7557 (addv64di3_zext_exec): Rename to ...
7558 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
7559 (addv64di3_zext_dup): Rename to ...
7560 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
7561 (addv64di3_zext_dup_exec): Rename to ...
7562 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
7563 (addv64di3_zext_dup2): Rename to ...
7564 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
7565 (addv64di3_zext_dup2_exec): Rename to ...
7566 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
7567 (addv64di3_sext_dup2): Rename to ...
7568 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
7569 (addv64di3_sext_dup2_exec): Rename to ...
7570 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
7571 (<su>mulv64si3_highpart<exec>): Rename to ...
7572 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
7573 (mulv64di3): Rename to ...
7574 (mul<mode>3): ... this, and use V_DI and <VnSI>.
7575 (mulv64di3_exec): Rename to ...
7576 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
7577 (mulv64di3_zext): Rename to ...
7578 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
7579 (mulv64di3_zext_exec): Rename to ...
7580 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
7581 (mulv64di3_zext_dup2): Rename to ...
7582 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
7583 (mulv64di3_zext_dup2_exec): Rename to ...
7584 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
7585 (<expander>v64di3): Rename to ...
7586 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
7587 (<expander>v64di3_exec): Rename to ...
7588 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
7589 (<expander>v64si3<exec>): Rename to ...
7590 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
7591 (v<expander>v64si3<exec>): Rename to ...
7592 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
7593 (<expander>v64si3<exec>): Rename to ...
7594 (<expander><vnsi>3<exec>): ... this, and use V_SI.
7595 (subv64df3<exec>): Rename to ...
7596 (sub<mode>3<exec>): ... this, and use V_DF.
7597 (truncv64di<mode>2): Rename to ...
7598 (trunc<vndi><mode>2): ... this, and use <VnDI>.
7599 (truncv64di<mode>2_exec): Rename to ...
7600 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
7601 (<convop><mode>v64di2): Rename to ...
7602 (<convop><mode><vndi>2): ... this, and use <VnDI>.
7603 (<convop><mode>v64di2_exec): Rename to ...
7604 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
7605 (vec_cmp<u>v64qidi): Rename to ...
7606 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
7607 (vec_cmp<u>v64qidi_exec): Rename to ...
7608 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
7609 (vcond_mask_<mode>di): Use <VnDI>.
7610 (maskload<mode>di): Likewise.
7611 (maskstore<mode>di): Likewise.
7612 (mask_gather_load<mode>v64si): Rename to ...
7613 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
7614 (mask_scatter_store<mode>v64si): Rename to ...
7615 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
7616 (*<reduc_op>_dpp_shr_v64di): Rename to ...
7617 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
7618 (*plus_carry_in_dpp_shr_v64si): Rename to ...
7619 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
7620 (*plus_carry_dpp_shr_v64di): Rename to ...
7621 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
7622 (vec_seriesv64si): Rename to ...
7623 (vec_series<mode>): ... this, and use V_SI.
7624 (vec_seriesv64di): Rename to ...
7625 (vec_series<mode>): ... this, and use V_DI.
7627 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
7629 * config/arc/arc.c (arc_print_operand): Use
7630 HOST_WIDE_INT_PRINT_DEC macro.
7632 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
7634 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
7636 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7638 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
7640 (__arm_vbicq): Likewise.
7642 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
7644 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
7646 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7648 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
7649 common section of both MVE Integer and MVE Floating Point.
7651 (vaddlvq_p): Likewise.
7652 (vaddvaq): Likewise.
7653 (vaddvq_p): Likewise.
7654 (vcmpcsq): Likewise.
7655 (vmlsdavxq): Likewise.
7656 (vmlsdavq): Likewise.
7657 (vmladavxq): Likewise.
7658 (vmladavq): Likewise.
7660 (vminavq): Likewise.
7662 (vmaxavq): Likewise.
7663 (vmlaldavq): Likewise.
7664 (vcmphiq): Likewise.
7665 (vaddlvaq): Likewise.
7666 (vrmlaldavhq): Likewise.
7667 (vrmlaldavhxq): Likewise.
7668 (vrmlsldavhq): Likewise.
7669 (vrmlsldavhxq): Likewise.
7670 (vmlsldavxq): Likewise.
7671 (vmlsldavq): Likewise.
7673 (vrmlaldavhaq): Likewise.
7674 (vcmpgeq_m_n): Likewise.
7675 (vmlsdavxq_p): Likewise.
7676 (vmlsdavq_p): Likewise.
7677 (vmlsdavaxq): Likewise.
7678 (vmlsdavaq): Likewise.
7679 (vaddvaq_p): Likewise.
7680 (vcmpcsq_m_n): Likewise.
7681 (vcmpcsq_m): Likewise.
7682 (vmladavxq_p): Likewise.
7683 (vmladavq_p): Likewise.
7684 (vmladavaxq): Likewise.
7685 (vmladavaq): Likewise.
7686 (vminvq_p): Likewise.
7687 (vminavq_p): Likewise.
7688 (vmaxvq_p): Likewise.
7689 (vmaxavq_p): Likewise.
7690 (vcmphiq_m): Likewise.
7691 (vaddlvaq_p): Likewise.
7692 (vmlaldavaq): Likewise.
7693 (vmlaldavaxq): Likewise.
7694 (vmlaldavq_p): Likewise.
7695 (vmlaldavxq_p): Likewise.
7696 (vmlsldavaq): Likewise.
7697 (vmlsldavaxq): Likewise.
7698 (vmlsldavq_p): Likewise.
7699 (vmlsldavxq_p): Likewise.
7700 (vrmlaldavhaxq): Likewise.
7701 (vrmlaldavhq_p): Likewise.
7702 (vrmlaldavhxq_p): Likewise.
7703 (vrmlsldavhaq): Likewise.
7704 (vrmlsldavhaxq): Likewise.
7705 (vrmlsldavhq_p): Likewise.
7706 (vrmlsldavhxq_p): Likewise.
7707 (vabavq_p): Likewise.
7708 (vmladavaq_p): Likewise.
7709 (vstrbq_scatter_offset): Likewise.
7710 (vstrbq_p): Likewise.
7711 (vstrbq_scatter_offset_p): Likewise.
7712 (vstrdq_scatter_base_p): Likewise.
7713 (vstrdq_scatter_base): Likewise.
7714 (vstrdq_scatter_offset_p): Likewise.
7715 (vstrdq_scatter_offset): Likewise.
7716 (vstrdq_scatter_shifted_offset_p): Likewise.
7717 (vstrdq_scatter_shifted_offset): Likewise.
7718 (vmaxq_x): Likewise.
7719 (vminq_x): Likewise.
7720 (vmovlbq_x): Likewise.
7721 (vmovltq_x): Likewise.
7722 (vmulhq_x): Likewise.
7723 (vmullbq_int_x): Likewise.
7724 (vmullbq_poly_x): Likewise.
7725 (vmulltq_int_x): Likewise.
7726 (vmulltq_poly_x): Likewise.
7729 2020-03-31 Jakub Jelinek <jakub@redhat.com>
7732 * config/aarch64/constraints.md (Uph): New constraint.
7733 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
7734 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
7737 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
7738 Jakub Jelinek <jakub@redhat.com>
7741 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
7742 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
7744 2020-03-31 Jakub Jelinek <jakub@redhat.com>
7746 PR tree-optimization/94403
7747 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
7748 ENUMERAL_TYPE lhs_type.
7750 PR rtl-optimization/94344
7751 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
7752 conversions, either on both operands of |^+ or just one. Handle
7753 also extra same precision conversion on RSHIFT_EXPR first operand
7754 provided RSHIFT_EXPR is performed in unsigned type.
7756 2020-03-30 David Malcolm <dmalcolm@redhat.com>
7758 * lra.c (finish_insn_code_data_once): Set the array elements
7759 to NULL after freeing them.
7761 2020-03-30 Andreas Schwab <schwab@suse.de>
7763 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
7766 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
7768 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
7769 to skip defining builtins based on builtin_mask.
7771 2020-03-30 Jakub Jelinek <jakub@redhat.com>
7774 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
7775 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
7776 operand is a register. Don't enable masked variants for V*[QH]Imode.
7779 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
7780 <store_mask_constraint> instead of m in output operand constraint.
7781 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
7784 2020-03-30 Alan Modra <amodra@gmail.com>
7786 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
7787 (rs6000_indirect_call_template_1): Adjust to suit.
7788 * config/rs6000/rs6000.md (call_local): Merge call_local32,
7789 call_local64, and call_local_aix.
7790 (call_value_local): Simlarly.
7791 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
7792 and disable pattern when CALL_LONG.
7793 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
7794 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
7795 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
7797 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
7800 * doc/invoke.texi: Update -falign-functions, -falign-loops and
7801 -falign-jumps documentation.
7803 2020-03-29 Martin Liska <mliska@suse.cz>
7806 * cgraphunit.c (process_function_and_variable_attributes): Remove
7807 double 'attribute' words.
7809 2020-03-29 John David Anglin <dave.anglin@bell.net>
7811 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
7814 2020-03-28 Jakub Jelinek <jakub@redhat.com>
7817 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
7818 to true after setting size to integer_one_node.
7820 PR tree-optimization/94329
7821 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
7822 on the last stmt in a bb, make sure gsi_prev isn't done immediately
7825 2020-03-27 Alan Modra <amodra@gmail.com>
7828 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
7829 for PLT16_LO and PLT_PCREL.
7830 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
7831 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
7832 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
7834 2020-03-27 Martin Sebor <msebor@redhat.com>
7837 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
7839 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
7841 * config/gcn/gcn-valu.md:
7842 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
7843 (VEC_1REG_MODE): Delete.
7844 (VEC_1REG_ALT): Delete.
7845 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
7846 (VEC_1REG_INT_MODE): Delete.
7847 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
7848 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
7849 (VEC_2REG_MODE): Rename to V_2REG throughout.
7850 (VEC_REG_MODE): Rename to V_noHI throughout.
7851 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
7852 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
7853 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
7854 (VEC_INT_MODE): Delete.
7855 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
7856 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
7857 (FP_MODE): Delete and replace with FP throughout.
7858 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
7859 (VCMP_MODE): Rename to V_noQI throughout and move to top.
7860 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
7861 * config/gcn/gcn.md (FP): New mode iterator.
7862 (FP_1REG): New mode iterator.
7864 2020-03-27 David Malcolm <dmalcolm@redhat.com>
7866 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
7867 now emits two .dot files.
7868 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
7869 (graphviz_out::end_tr): Only close a TR, not a TD.
7870 (graphviz_out::begin_td): New.
7871 (graphviz_out::end_td): New.
7872 (graphviz_out::begin_trtd): New, replacing the old implementation
7873 of graphviz_out::begin_tr.
7874 (graphviz_out::end_tdtr): New, replacing the old implementation
7875 of graphviz_out::end_tr.
7876 * graphviz.h (graphviz_out::begin_td): New decl.
7877 (graphviz_out::end_td): New decl.
7878 (graphviz_out::begin_trtd): New decl.
7879 (graphviz_out::end_tdtr): New decl.
7881 2020-03-27 Richard Biener <rguenther@suse.de>
7884 * dwarf2out.c (should_emit_struct_debug): Return false for
7887 2020-03-27 Richard Biener <rguenther@suse.de>
7889 PR tree-optimization/94352
7890 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
7892 (ssa_propagation_engine::ssa_propagate): ... here after
7893 initializing curr_order.
7895 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
7897 PR tree-optimization/90332
7898 * tree-vect-stmts.c (vector_vector_composition_type): New function.
7899 (get_group_load_store_type): Adjust to call
7900 vector_vector_composition_type, extend it to construct with scalar
7902 (vectorizable_load): Likewise.
7904 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
7906 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
7907 (create_ddg_dep_no_link): Likewise.
7908 (add_cross_iteration_register_deps): Move debug instruction check.
7909 Other minor refactoring.
7910 (add_intra_loop_mem_dep): Do not check for debug instructions.
7911 (add_inter_loop_mem_dep): Likewise.
7912 (build_intra_loop_deps): Likewise.
7913 (create_ddg): Do not include debug insns into the graph.
7914 * ddg.h (struct ddg): Remove num_debug field.
7915 * modulo-sched.c (doloop_register_get): Adjust condition.
7916 (res_MII): Remove DDG num_debug field usage.
7917 (sms_schedule_by_order): Use assertion against debug insns.
7918 (ps_has_conflicts): Drop debug insn check.
7920 2020-03-26 Jakub Jelinek <jakub@redhat.com>
7923 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
7924 that contains exactly one non-DEBUG_BEGIN_STMT statement.
7927 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
7928 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
7929 a single non-debug stmt followed by one or more debug stmts.
7930 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
7931 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
7932 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
7933 gimple_seq_last to check if outer_stmt gbind could be reused and
7934 if yes and it is surrounded by any debug stmts, move them into the
7937 PR rtl-optimization/92264
7938 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
7939 for sp based values in !frame_pointer_needed
7940 && !ACCUMULATE_OUTGOING_ARGS functions.
7942 2020-03-26 Felix Yang <felix.yang@huawei.com>
7944 PR tree-optimization/94269
7945 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
7947 operation to single basic block.
7949 2020-03-25 Jeff Law <law@redhat.com>
7951 PR rtl-optimization/90275
7952 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
7955 2020-03-25 Jakub Jelinek <jakub@redhat.com>
7958 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
7959 mode rather than VOIDmode.
7961 2020-03-25 Martin Sebor <msebor@redhat.com>
7964 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
7965 even for alloca calls resulting from system macro expansion.
7966 Include inlining context in all warnings.
7968 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
7971 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
7972 FPRs to change between SDmode and DDmode.
7974 2020-03-25 Martin Sebor <msebor@redhat.com>
7976 PR tree-optimization/94131
7977 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
7979 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
7980 types have constant sizes.
7982 2020-03-25 Martin Liska <mliska@suse.cz>
7985 * configure.ac: Report error only when --with-zstd
7987 * configure: Regenerate.
7989 2020-03-25 Jakub Jelinek <jakub@redhat.com>
7992 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
7993 INSN_CODE (insn) to -1 when changing the pattern.
7995 2020-03-25 Martin Liska <mliska@suse.cz>
7999 * config/i386/i386-features.c (make_resolver_func): Drop
8000 public flag for resolver.
8001 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
8002 group for resolver and drop public flag if possible.
8003 * multiple_target.c (create_dispatcher_calls): Drop unique_name
8004 and resolution as we want to enable LTO privatization of the default
8007 2020-03-25 Martin Liska <mliska@suse.cz>
8010 * configure.ac: Respect --without-zstd and report
8011 error when we can't find header file with --with-zstd.
8012 * configure: Regenerate.
8014 2020-03-25 Jakub Jelinek <jakub@redhat.com>
8017 * varasm.c (output_constructor_array_range): If local->index
8018 RANGE_EXPR doesn't start at the current location in the constructor,
8019 skip needed number of bytes using assemble_zeros or assert we don't
8023 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
8024 counter instead of DECL_UID.
8026 PR tree-optimization/94300
8027 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
8028 is positive, make sure that off + size isn't larger than needed_len.
8030 2020-03-25 Richard Biener <rguenther@suse.de>
8031 Jakub Jelinek <jakub@redhat.com>
8034 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
8036 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
8038 * doc/sourcebuild.texi (ARM-specific attributes): Add
8040 (Features for dg-add-options): Add arm_fp_dp.
8042 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
8045 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
8047 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
8050 * omp-offload.c (omp_finish_file): Fix target-link handling if
8051 targetm_common.have_named_sections is false.
8053 2020-03-24 Jakub Jelinek <jakub@redhat.com>
8056 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
8060 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
8061 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
8062 If not after and at *incr_pos is a debug stmt, set stmt location to
8063 location of next non-debug stmt after it if any.
8066 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
8067 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
8068 worklist or set GF_PLF_2 just because it is used in a debug stmt in
8069 another bb. Formatting improvements.
8072 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
8073 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
8074 regardless of whether TREE_NO_WARNING is set on it or whether
8075 warn_unused_function is true or not.
8077 2020-03-23 Jeff Law <law@redhat.com>
8079 PR rtl-optimization/90275
8082 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
8083 (simplify_logical_relational_operation): Use it.
8085 2020-03-23 Jakub Jelinek <jakub@redhat.com>
8088 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
8089 ultimate rhs and if returned something different, reconstructing
8092 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
8094 * opts.c (print_filtered_help): Improve the help text for alias options.
8096 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8097 Andre Vieira <andre.simoesdiasvieira@arm.com>
8098 Mihail Ionescu <mihail.ionescu@arm.com>
8100 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
8101 (vshlcq_m_u8): Likewise.
8102 (vshlcq_m_s16): Likewise.
8103 (vshlcq_m_u16): Likewise.
8104 (vshlcq_m_s32): Likewise.
8105 (vshlcq_m_u32): Likewise.
8106 (__arm_vshlcq_m_s8): Define intrinsic.
8107 (__arm_vshlcq_m_u8): Likewise.
8108 (__arm_vshlcq_m_s16): Likewise.
8109 (__arm_vshlcq_m_u16): Likewise.
8110 (__arm_vshlcq_m_s32): Likewise.
8111 (__arm_vshlcq_m_u32): Likewise.
8112 (vshlcq_m): Define polymorphic variant.
8113 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
8114 Use builtin qualifier.
8115 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
8116 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
8117 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
8118 (mve_vshlcq_m_<supf><mode>): Likewise.
8120 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8122 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
8123 (UQSHL_QUALIFIERS): Likewise.
8124 (ASRL_QUALIFIERS): Likewise.
8125 (SQSHL_QUALIFIERS): Likewise.
8126 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
8128 (sqrshr): Define macro.
8129 (sqrshrl): Likewise.
8130 (sqrshrl_sat48): Likewise.
8136 (uqrshll): Likewise.
8137 (uqrshll_sat48): Likewise.
8144 (__arm_lsll): Define intrinsic.
8145 (__arm_asrl): Likewise.
8146 (__arm_uqrshll): Likewise.
8147 (__arm_uqrshll_sat48): Likewise.
8148 (__arm_sqrshrl): Likewise.
8149 (__arm_sqrshrl_sat48): Likewise.
8150 (__arm_uqshll): Likewise.
8151 (__arm_urshrl): Likewise.
8152 (__arm_srshrl): Likewise.
8153 (__arm_sqshll): Likewise.
8154 (__arm_uqrshl): Likewise.
8155 (__arm_sqrshr): Likewise.
8156 (__arm_uqshl): Likewise.
8157 (__arm_urshr): Likewise.
8158 (__arm_sqshl): Likewise.
8159 (__arm_srshr): Likewise.
8160 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
8162 (UQSHL_QUALIFIERS): Likewise.
8163 (ASRL_QUALIFIERS): Likewise.
8164 (SQSHL_QUALIFIERS): Likewise.
8165 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
8166 (mve_sqrshrl_sat<supf>_di): Likewise.
8167 (mve_uqrshl_si): Likewise.
8168 (mve_sqrshr_si): Likewise.
8169 (mve_uqshll_di): Likewise.
8170 (mve_urshrl_di): Likewise.
8171 (mve_uqshl_si): Likewise.
8172 (mve_urshr_si): Likewise.
8173 (mve_sqshl_si): Likewise.
8174 (mve_srshr_si): Likewise.
8175 (mve_srshrl_di): Likewise.
8176 (mve_sqshll_di): Likewise.
8178 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8179 Andre Vieira <andre.simoesdiasvieira@arm.com>
8180 Mihail Ionescu <mihail.ionescu@arm.com>
8182 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
8183 (vsetq_lane_f32): Likewise.
8184 (vsetq_lane_s16): Likewise.
8185 (vsetq_lane_s32): Likewise.
8186 (vsetq_lane_s8): Likewise.
8187 (vsetq_lane_s64): Likewise.
8188 (vsetq_lane_u8): Likewise.
8189 (vsetq_lane_u16): Likewise.
8190 (vsetq_lane_u32): Likewise.
8191 (vsetq_lane_u64): Likewise.
8192 (vgetq_lane_f16): Likewise.
8193 (vgetq_lane_f32): Likewise.
8194 (vgetq_lane_s16): Likewise.
8195 (vgetq_lane_s32): Likewise.
8196 (vgetq_lane_s8): Likewise.
8197 (vgetq_lane_s64): Likewise.
8198 (vgetq_lane_u8): Likewise.
8199 (vgetq_lane_u16): Likewise.
8200 (vgetq_lane_u32): Likewise.
8201 (vgetq_lane_u64): Likewise.
8202 (__ARM_NUM_LANES): Likewise.
8203 (__ARM_LANEQ): Likewise.
8204 (__ARM_CHECK_LANEQ): Likewise.
8205 (__arm_vsetq_lane_s16): Define intrinsic.
8206 (__arm_vsetq_lane_s32): Likewise.
8207 (__arm_vsetq_lane_s8): Likewise.
8208 (__arm_vsetq_lane_s64): Likewise.
8209 (__arm_vsetq_lane_u8): Likewise.
8210 (__arm_vsetq_lane_u16): Likewise.
8211 (__arm_vsetq_lane_u32): Likewise.
8212 (__arm_vsetq_lane_u64): Likewise.
8213 (__arm_vgetq_lane_s16): Likewise.
8214 (__arm_vgetq_lane_s32): Likewise.
8215 (__arm_vgetq_lane_s8): Likewise.
8216 (__arm_vgetq_lane_s64): Likewise.
8217 (__arm_vgetq_lane_u8): Likewise.
8218 (__arm_vgetq_lane_u16): Likewise.
8219 (__arm_vgetq_lane_u32): Likewise.
8220 (__arm_vgetq_lane_u64): Likewise.
8221 (__arm_vsetq_lane_f16): Likewise.
8222 (__arm_vsetq_lane_f32): Likewise.
8223 (__arm_vgetq_lane_f16): Likewise.
8224 (__arm_vgetq_lane_f32): Likewise.
8225 (vgetq_lane): Define polymorphic variant.
8226 (vsetq_lane): Likewise.
8227 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
8229 (mve_vec_extractv2didi): Likewise.
8230 (mve_vec_extract_sext_internal<mode>): Likewise.
8231 (mve_vec_extract_zext_internal<mode>): Likewise.
8232 (mve_vec_set<mode>_internal): Likewise.
8233 (mve_vec_setv2di_internal): Likewise.
8234 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
8236 (vec_extract<mode><V_elem_l>): Rename to
8237 "neon_vec_extract<mode><V_elem_l>".
8238 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
8239 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
8240 pattern common for MVE and NEON.
8241 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
8244 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
8246 * config/arm/mve.md (earlyclobber_32): New mode attribute.
8247 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
8248 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
8250 2020-03-23 Richard Biener <rguenther@suse.de>
8252 PR tree-optimization/94261
8253 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
8254 IL operand swapping code.
8255 (vect_slp_rearrange_stmts): Do not arrange isomorphic
8256 nodes that would need operation code adjustments.
8258 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
8260 * doc/install.texi (amdgcn-*-amdhsa): Renamed
8261 from amdgcn-unknown-amdhsa; change
8262 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
8264 2020-03-23 Richard Biener <rguenther@suse.de>
8267 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
8268 directly rather than also folding it via build_fold_addr_expr.
8270 2020-03-23 Richard Biener <rguenther@suse.de>
8272 PR tree-optimization/94266
8273 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
8274 addresses of TARGET_MEM_REFs.
8276 2020-03-23 Martin Liska <mliska@suse.cz>
8279 * symtab.c (symtab_node::clone_references): Save speculative_id
8280 as ref may be overwritten by create_reference.
8281 (symtab_node::clone_referring): Likewise.
8282 (symtab_node::clone_reference): Likewise.
8284 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
8286 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
8287 references to Darwin.
8288 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
8289 unconditionally and comment on why.
8291 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
8293 * config/darwin.c (darwin_mergeable_constant_section): Collect
8294 section anchor checks into the caller.
8295 (machopic_select_section): Collect section anchor checks into
8296 the determination of 'effective zero-size' objects. When the
8297 size is unknown, assume it is non-zero, and thus return the
8298 'generic' section for the DECL.
8300 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
8303 * config/darwin.opt: Amend options descriptions.
8305 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
8307 PR rtl-optimization/94052
8308 * lra-constraints.c (simplify_operand_subreg): Reload the inner
8309 register of a paradoxical subreg if simplify_subreg_regno fails
8310 to give a valid hard register for the outer mode.
8312 2020-03-20 Martin Jambor <mjambor@suse.cz>
8314 PR tree-optimization/93435
8315 * params.opt (sra-max-propagations): New parameter.
8316 * tree-sra.c (propagation_budget): New variable.
8317 (budget_for_propagation_access): New function.
8318 (propagate_subaccesses_from_rhs): Use it.
8319 (propagate_subaccesses_from_lhs): Likewise.
8320 (propagate_all_subaccesses): Set up and destroy propagation_budget.
8322 2020-03-20 Carl Love <cel@us.ibm.com>
8325 * config/rs6000/rs6000.c (rs6000_option_override_internal):
8326 Add check for TARGET_FPRND for Power 7 or newer.
8328 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
8331 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
8332 (cgraph_edge::redirect_callee): Move here; likewise.
8333 (cgraph_node::remove_callees): Update calls_comdat_local flag.
8334 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
8336 (cgraph_node::check_calls_comdat_local_p): New member function.
8337 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
8338 (cgraph_edge::redirect_callee): Move offline.
8339 * ipa-fnsummary.c (compute_fn_summary): Do not compute
8340 calls_comdat_local flag here.
8341 * ipa-inline-transform.c (inline_call): Fix updating of
8342 calls_comdat_local flag.
8343 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
8344 * symtab.c (symtab_node::add_to_same_comdat_group): Update
8345 calls_comdat_local flag.
8347 2020-03-20 Richard Biener <rguenther@suse.de>
8349 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
8350 from the possibly modified root.
8352 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8353 Andre Vieira <andre.simoesdiasvieira@arm.com>
8354 Mihail Ionescu <mihail.ionescu@arm.com>
8356 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
8357 (vst1q_p_s8): Likewise.
8358 (vst2q_s8): Likewise.
8359 (vst2q_u8): Likewise.
8360 (vld1q_z_u8): Likewise.
8361 (vld1q_z_s8): Likewise.
8362 (vld2q_s8): Likewise.
8363 (vld2q_u8): Likewise.
8364 (vld4q_s8): Likewise.
8365 (vld4q_u8): Likewise.
8366 (vst1q_p_u16): Likewise.
8367 (vst1q_p_s16): Likewise.
8368 (vst2q_s16): Likewise.
8369 (vst2q_u16): Likewise.
8370 (vld1q_z_u16): Likewise.
8371 (vld1q_z_s16): Likewise.
8372 (vld2q_s16): Likewise.
8373 (vld2q_u16): Likewise.
8374 (vld4q_s16): Likewise.
8375 (vld4q_u16): Likewise.
8376 (vst1q_p_u32): Likewise.
8377 (vst1q_p_s32): Likewise.
8378 (vst2q_s32): Likewise.
8379 (vst2q_u32): Likewise.
8380 (vld1q_z_u32): Likewise.
8381 (vld1q_z_s32): Likewise.
8382 (vld2q_s32): Likewise.
8383 (vld2q_u32): Likewise.
8384 (vld4q_s32): Likewise.
8385 (vld4q_u32): Likewise.
8386 (vld4q_f16): Likewise.
8387 (vld2q_f16): Likewise.
8388 (vld1q_z_f16): Likewise.
8389 (vst2q_f16): Likewise.
8390 (vst1q_p_f16): Likewise.
8391 (vld4q_f32): Likewise.
8392 (vld2q_f32): Likewise.
8393 (vld1q_z_f32): Likewise.
8394 (vst2q_f32): Likewise.
8395 (vst1q_p_f32): Likewise.
8396 (__arm_vst1q_p_u8): Define intrinsic.
8397 (__arm_vst1q_p_s8): Likewise.
8398 (__arm_vst2q_s8): Likewise.
8399 (__arm_vst2q_u8): Likewise.
8400 (__arm_vld1q_z_u8): Likewise.
8401 (__arm_vld1q_z_s8): Likewise.
8402 (__arm_vld2q_s8): Likewise.
8403 (__arm_vld2q_u8): Likewise.
8404 (__arm_vld4q_s8): Likewise.
8405 (__arm_vld4q_u8): Likewise.
8406 (__arm_vst1q_p_u16): Likewise.
8407 (__arm_vst1q_p_s16): Likewise.
8408 (__arm_vst2q_s16): Likewise.
8409 (__arm_vst2q_u16): Likewise.
8410 (__arm_vld1q_z_u16): Likewise.
8411 (__arm_vld1q_z_s16): Likewise.
8412 (__arm_vld2q_s16): Likewise.
8413 (__arm_vld2q_u16): Likewise.
8414 (__arm_vld4q_s16): Likewise.
8415 (__arm_vld4q_u16): Likewise.
8416 (__arm_vst1q_p_u32): Likewise.
8417 (__arm_vst1q_p_s32): Likewise.
8418 (__arm_vst2q_s32): Likewise.
8419 (__arm_vst2q_u32): Likewise.
8420 (__arm_vld1q_z_u32): Likewise.
8421 (__arm_vld1q_z_s32): Likewise.
8422 (__arm_vld2q_s32): Likewise.
8423 (__arm_vld2q_u32): Likewise.
8424 (__arm_vld4q_s32): Likewise.
8425 (__arm_vld4q_u32): Likewise.
8426 (__arm_vld4q_f16): Likewise.
8427 (__arm_vld2q_f16): Likewise.
8428 (__arm_vld1q_z_f16): Likewise.
8429 (__arm_vst2q_f16): Likewise.
8430 (__arm_vst1q_p_f16): Likewise.
8431 (__arm_vld4q_f32): Likewise.
8432 (__arm_vld2q_f32): Likewise.
8433 (__arm_vld1q_z_f32): Likewise.
8434 (__arm_vst2q_f32): Likewise.
8435 (__arm_vst1q_p_f32): Likewise.
8436 (vld1q_z): Define polymorphic variant.
8439 (vst1q_p): Likewise.
8441 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
8443 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
8444 (mve_vld2q<mode>): Likewise.
8445 (mve_vld4q<mode>): Likewise.
8447 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8448 Andre Vieira <andre.simoesdiasvieira@arm.com>
8449 Mihail Ionescu <mihail.ionescu@arm.com>
8451 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
8452 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
8453 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
8454 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
8455 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
8456 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
8457 * config/arm/arm_mve.h (vadciq_s32): Define macro.
8458 (vadciq_u32): Likewise.
8459 (vadciq_m_s32): Likewise.
8460 (vadciq_m_u32): Likewise.
8461 (vadcq_s32): Likewise.
8462 (vadcq_u32): Likewise.
8463 (vadcq_m_s32): Likewise.
8464 (vadcq_m_u32): Likewise.
8465 (vsbciq_s32): Likewise.
8466 (vsbciq_u32): Likewise.
8467 (vsbciq_m_s32): Likewise.
8468 (vsbciq_m_u32): Likewise.
8469 (vsbcq_s32): Likewise.
8470 (vsbcq_u32): Likewise.
8471 (vsbcq_m_s32): Likewise.
8472 (vsbcq_m_u32): Likewise.
8473 (__arm_vadciq_s32): Define intrinsic.
8474 (__arm_vadciq_u32): Likewise.
8475 (__arm_vadciq_m_s32): Likewise.
8476 (__arm_vadciq_m_u32): Likewise.
8477 (__arm_vadcq_s32): Likewise.
8478 (__arm_vadcq_u32): Likewise.
8479 (__arm_vadcq_m_s32): Likewise.
8480 (__arm_vadcq_m_u32): Likewise.
8481 (__arm_vsbciq_s32): Likewise.
8482 (__arm_vsbciq_u32): Likewise.
8483 (__arm_vsbciq_m_s32): Likewise.
8484 (__arm_vsbciq_m_u32): Likewise.
8485 (__arm_vsbcq_s32): Likewise.
8486 (__arm_vsbcq_u32): Likewise.
8487 (__arm_vsbcq_m_s32): Likewise.
8488 (__arm_vsbcq_m_u32): Likewise.
8489 (vadciq_m): Define polymorphic variant.
8491 (vadcq_m): Likewise.
8493 (vsbciq_m): Likewise.
8495 (vsbcq_m): Likewise.
8497 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
8499 (BINOP_UNONE_UNONE_UNONE): Likewise.
8500 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
8501 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
8502 * config/arm/mve.md (VADCIQ): Define iterator.
8503 (VADCIQ_M): Likewise.
8505 (VSBCQ_M): Likewise.
8507 (VSBCIQ_M): Likewise.
8509 (VADCQ_M): Likewise.
8510 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
8511 (mve_vadciq_<supf>v4si): Likewise.
8512 (mve_vadcq_m_<supf>v4si): Likewise.
8513 (mve_vadcq_<supf>v4si): Likewise.
8514 (mve_vsbciq_m_<supf>v4si): Likewise.
8515 (mve_vsbciq_<supf>v4si): Likewise.
8516 (mve_vsbcq_m_<supf>v4si): Likewise.
8517 (mve_vsbcq_<supf>v4si): Likewise.
8518 (get_fpscr_nzcvqc): Define isns.
8519 (set_fpscr_nzcvqc): Define isns.
8520 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
8521 (UNSPEC_SET_FPSCR_NZCVQC): Define.
8523 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8525 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
8526 (vddupq_x_n_u16): Likewise.
8527 (vddupq_x_n_u32): Likewise.
8528 (vddupq_x_wb_u8): Likewise.
8529 (vddupq_x_wb_u16): Likewise.
8530 (vddupq_x_wb_u32): Likewise.
8531 (vdwdupq_x_n_u8): Likewise.
8532 (vdwdupq_x_n_u16): Likewise.
8533 (vdwdupq_x_n_u32): Likewise.
8534 (vdwdupq_x_wb_u8): Likewise.
8535 (vdwdupq_x_wb_u16): Likewise.
8536 (vdwdupq_x_wb_u32): Likewise.
8537 (vidupq_x_n_u8): Likewise.
8538 (vidupq_x_n_u16): Likewise.
8539 (vidupq_x_n_u32): Likewise.
8540 (vidupq_x_wb_u8): Likewise.
8541 (vidupq_x_wb_u16): Likewise.
8542 (vidupq_x_wb_u32): Likewise.
8543 (viwdupq_x_n_u8): Likewise.
8544 (viwdupq_x_n_u16): Likewise.
8545 (viwdupq_x_n_u32): Likewise.
8546 (viwdupq_x_wb_u8): Likewise.
8547 (viwdupq_x_wb_u16): Likewise.
8548 (viwdupq_x_wb_u32): Likewise.
8549 (vdupq_x_n_s8): Likewise.
8550 (vdupq_x_n_s16): Likewise.
8551 (vdupq_x_n_s32): Likewise.
8552 (vdupq_x_n_u8): Likewise.
8553 (vdupq_x_n_u16): Likewise.
8554 (vdupq_x_n_u32): Likewise.
8555 (vminq_x_s8): Likewise.
8556 (vminq_x_s16): Likewise.
8557 (vminq_x_s32): Likewise.
8558 (vminq_x_u8): Likewise.
8559 (vminq_x_u16): Likewise.
8560 (vminq_x_u32): Likewise.
8561 (vmaxq_x_s8): Likewise.
8562 (vmaxq_x_s16): Likewise.
8563 (vmaxq_x_s32): Likewise.
8564 (vmaxq_x_u8): Likewise.
8565 (vmaxq_x_u16): Likewise.
8566 (vmaxq_x_u32): Likewise.
8567 (vabdq_x_s8): Likewise.
8568 (vabdq_x_s16): Likewise.
8569 (vabdq_x_s32): Likewise.
8570 (vabdq_x_u8): Likewise.
8571 (vabdq_x_u16): Likewise.
8572 (vabdq_x_u32): Likewise.
8573 (vabsq_x_s8): Likewise.
8574 (vabsq_x_s16): Likewise.
8575 (vabsq_x_s32): Likewise.
8576 (vaddq_x_s8): Likewise.
8577 (vaddq_x_s16): Likewise.
8578 (vaddq_x_s32): Likewise.
8579 (vaddq_x_n_s8): Likewise.
8580 (vaddq_x_n_s16): Likewise.
8581 (vaddq_x_n_s32): Likewise.
8582 (vaddq_x_u8): Likewise.
8583 (vaddq_x_u16): Likewise.
8584 (vaddq_x_u32): Likewise.
8585 (vaddq_x_n_u8): Likewise.
8586 (vaddq_x_n_u16): Likewise.
8587 (vaddq_x_n_u32): Likewise.
8588 (vclsq_x_s8): Likewise.
8589 (vclsq_x_s16): Likewise.
8590 (vclsq_x_s32): Likewise.
8591 (vclzq_x_s8): Likewise.
8592 (vclzq_x_s16): Likewise.
8593 (vclzq_x_s32): Likewise.
8594 (vclzq_x_u8): Likewise.
8595 (vclzq_x_u16): Likewise.
8596 (vclzq_x_u32): Likewise.
8597 (vnegq_x_s8): Likewise.
8598 (vnegq_x_s16): Likewise.
8599 (vnegq_x_s32): Likewise.
8600 (vmulhq_x_s8): Likewise.
8601 (vmulhq_x_s16): Likewise.
8602 (vmulhq_x_s32): Likewise.
8603 (vmulhq_x_u8): Likewise.
8604 (vmulhq_x_u16): Likewise.
8605 (vmulhq_x_u32): Likewise.
8606 (vmullbq_poly_x_p8): Likewise.
8607 (vmullbq_poly_x_p16): Likewise.
8608 (vmullbq_int_x_s8): Likewise.
8609 (vmullbq_int_x_s16): Likewise.
8610 (vmullbq_int_x_s32): Likewise.
8611 (vmullbq_int_x_u8): Likewise.
8612 (vmullbq_int_x_u16): Likewise.
8613 (vmullbq_int_x_u32): Likewise.
8614 (vmulltq_poly_x_p8): Likewise.
8615 (vmulltq_poly_x_p16): Likewise.
8616 (vmulltq_int_x_s8): Likewise.
8617 (vmulltq_int_x_s16): Likewise.
8618 (vmulltq_int_x_s32): Likewise.
8619 (vmulltq_int_x_u8): Likewise.
8620 (vmulltq_int_x_u16): Likewise.
8621 (vmulltq_int_x_u32): Likewise.
8622 (vmulq_x_s8): Likewise.
8623 (vmulq_x_s16): Likewise.
8624 (vmulq_x_s32): Likewise.
8625 (vmulq_x_n_s8): Likewise.
8626 (vmulq_x_n_s16): Likewise.
8627 (vmulq_x_n_s32): Likewise.
8628 (vmulq_x_u8): Likewise.
8629 (vmulq_x_u16): Likewise.
8630 (vmulq_x_u32): Likewise.
8631 (vmulq_x_n_u8): Likewise.
8632 (vmulq_x_n_u16): Likewise.
8633 (vmulq_x_n_u32): Likewise.
8634 (vsubq_x_s8): Likewise.
8635 (vsubq_x_s16): Likewise.
8636 (vsubq_x_s32): Likewise.
8637 (vsubq_x_n_s8): Likewise.
8638 (vsubq_x_n_s16): Likewise.
8639 (vsubq_x_n_s32): Likewise.
8640 (vsubq_x_u8): Likewise.
8641 (vsubq_x_u16): Likewise.
8642 (vsubq_x_u32): Likewise.
8643 (vsubq_x_n_u8): Likewise.
8644 (vsubq_x_n_u16): Likewise.
8645 (vsubq_x_n_u32): Likewise.
8646 (vcaddq_rot90_x_s8): Likewise.
8647 (vcaddq_rot90_x_s16): Likewise.
8648 (vcaddq_rot90_x_s32): Likewise.
8649 (vcaddq_rot90_x_u8): Likewise.
8650 (vcaddq_rot90_x_u16): Likewise.
8651 (vcaddq_rot90_x_u32): Likewise.
8652 (vcaddq_rot270_x_s8): Likewise.
8653 (vcaddq_rot270_x_s16): Likewise.
8654 (vcaddq_rot270_x_s32): Likewise.
8655 (vcaddq_rot270_x_u8): Likewise.
8656 (vcaddq_rot270_x_u16): Likewise.
8657 (vcaddq_rot270_x_u32): Likewise.
8658 (vhaddq_x_n_s8): Likewise.
8659 (vhaddq_x_n_s16): Likewise.
8660 (vhaddq_x_n_s32): Likewise.
8661 (vhaddq_x_n_u8): Likewise.
8662 (vhaddq_x_n_u16): Likewise.
8663 (vhaddq_x_n_u32): Likewise.
8664 (vhaddq_x_s8): Likewise.
8665 (vhaddq_x_s16): Likewise.
8666 (vhaddq_x_s32): Likewise.
8667 (vhaddq_x_u8): Likewise.
8668 (vhaddq_x_u16): Likewise.
8669 (vhaddq_x_u32): Likewise.
8670 (vhcaddq_rot90_x_s8): Likewise.
8671 (vhcaddq_rot90_x_s16): Likewise.
8672 (vhcaddq_rot90_x_s32): Likewise.
8673 (vhcaddq_rot270_x_s8): Likewise.
8674 (vhcaddq_rot270_x_s16): Likewise.
8675 (vhcaddq_rot270_x_s32): Likewise.
8676 (vhsubq_x_n_s8): Likewise.
8677 (vhsubq_x_n_s16): Likewise.
8678 (vhsubq_x_n_s32): Likewise.
8679 (vhsubq_x_n_u8): Likewise.
8680 (vhsubq_x_n_u16): Likewise.
8681 (vhsubq_x_n_u32): Likewise.
8682 (vhsubq_x_s8): Likewise.
8683 (vhsubq_x_s16): Likewise.
8684 (vhsubq_x_s32): Likewise.
8685 (vhsubq_x_u8): Likewise.
8686 (vhsubq_x_u16): Likewise.
8687 (vhsubq_x_u32): Likewise.
8688 (vrhaddq_x_s8): Likewise.
8689 (vrhaddq_x_s16): Likewise.
8690 (vrhaddq_x_s32): Likewise.
8691 (vrhaddq_x_u8): Likewise.
8692 (vrhaddq_x_u16): Likewise.
8693 (vrhaddq_x_u32): Likewise.
8694 (vrmulhq_x_s8): Likewise.
8695 (vrmulhq_x_s16): Likewise.
8696 (vrmulhq_x_s32): Likewise.
8697 (vrmulhq_x_u8): Likewise.
8698 (vrmulhq_x_u16): Likewise.
8699 (vrmulhq_x_u32): Likewise.
8700 (vandq_x_s8): Likewise.
8701 (vandq_x_s16): Likewise.
8702 (vandq_x_s32): Likewise.
8703 (vandq_x_u8): Likewise.
8704 (vandq_x_u16): Likewise.
8705 (vandq_x_u32): Likewise.
8706 (vbicq_x_s8): Likewise.
8707 (vbicq_x_s16): Likewise.
8708 (vbicq_x_s32): Likewise.
8709 (vbicq_x_u8): Likewise.
8710 (vbicq_x_u16): Likewise.
8711 (vbicq_x_u32): Likewise.
8712 (vbrsrq_x_n_s8): Likewise.
8713 (vbrsrq_x_n_s16): Likewise.
8714 (vbrsrq_x_n_s32): Likewise.
8715 (vbrsrq_x_n_u8): Likewise.
8716 (vbrsrq_x_n_u16): Likewise.
8717 (vbrsrq_x_n_u32): Likewise.
8718 (veorq_x_s8): Likewise.
8719 (veorq_x_s16): Likewise.
8720 (veorq_x_s32): Likewise.
8721 (veorq_x_u8): Likewise.
8722 (veorq_x_u16): Likewise.
8723 (veorq_x_u32): Likewise.
8724 (vmovlbq_x_s8): Likewise.
8725 (vmovlbq_x_s16): Likewise.
8726 (vmovlbq_x_u8): Likewise.
8727 (vmovlbq_x_u16): Likewise.
8728 (vmovltq_x_s8): Likewise.
8729 (vmovltq_x_s16): Likewise.
8730 (vmovltq_x_u8): Likewise.
8731 (vmovltq_x_u16): Likewise.
8732 (vmvnq_x_s8): Likewise.
8733 (vmvnq_x_s16): Likewise.
8734 (vmvnq_x_s32): Likewise.
8735 (vmvnq_x_u8): Likewise.
8736 (vmvnq_x_u16): Likewise.
8737 (vmvnq_x_u32): Likewise.
8738 (vmvnq_x_n_s16): Likewise.
8739 (vmvnq_x_n_s32): Likewise.
8740 (vmvnq_x_n_u16): Likewise.
8741 (vmvnq_x_n_u32): Likewise.
8742 (vornq_x_s8): Likewise.
8743 (vornq_x_s16): Likewise.
8744 (vornq_x_s32): Likewise.
8745 (vornq_x_u8): Likewise.
8746 (vornq_x_u16): Likewise.
8747 (vornq_x_u32): Likewise.
8748 (vorrq_x_s8): Likewise.
8749 (vorrq_x_s16): Likewise.
8750 (vorrq_x_s32): Likewise.
8751 (vorrq_x_u8): Likewise.
8752 (vorrq_x_u16): Likewise.
8753 (vorrq_x_u32): Likewise.
8754 (vrev16q_x_s8): Likewise.
8755 (vrev16q_x_u8): Likewise.
8756 (vrev32q_x_s8): Likewise.
8757 (vrev32q_x_s16): Likewise.
8758 (vrev32q_x_u8): Likewise.
8759 (vrev32q_x_u16): Likewise.
8760 (vrev64q_x_s8): Likewise.
8761 (vrev64q_x_s16): Likewise.
8762 (vrev64q_x_s32): Likewise.
8763 (vrev64q_x_u8): Likewise.
8764 (vrev64q_x_u16): Likewise.
8765 (vrev64q_x_u32): Likewise.
8766 (vrshlq_x_s8): Likewise.
8767 (vrshlq_x_s16): Likewise.
8768 (vrshlq_x_s32): Likewise.
8769 (vrshlq_x_u8): Likewise.
8770 (vrshlq_x_u16): Likewise.
8771 (vrshlq_x_u32): Likewise.
8772 (vshllbq_x_n_s8): Likewise.
8773 (vshllbq_x_n_s16): Likewise.
8774 (vshllbq_x_n_u8): Likewise.
8775 (vshllbq_x_n_u16): Likewise.
8776 (vshlltq_x_n_s8): Likewise.
8777 (vshlltq_x_n_s16): Likewise.
8778 (vshlltq_x_n_u8): Likewise.
8779 (vshlltq_x_n_u16): Likewise.
8780 (vshlq_x_s8): Likewise.
8781 (vshlq_x_s16): Likewise.
8782 (vshlq_x_s32): Likewise.
8783 (vshlq_x_u8): Likewise.
8784 (vshlq_x_u16): Likewise.
8785 (vshlq_x_u32): Likewise.
8786 (vshlq_x_n_s8): Likewise.
8787 (vshlq_x_n_s16): Likewise.
8788 (vshlq_x_n_s32): Likewise.
8789 (vshlq_x_n_u8): Likewise.
8790 (vshlq_x_n_u16): Likewise.
8791 (vshlq_x_n_u32): Likewise.
8792 (vrshrq_x_n_s8): Likewise.
8793 (vrshrq_x_n_s16): Likewise.
8794 (vrshrq_x_n_s32): Likewise.
8795 (vrshrq_x_n_u8): Likewise.
8796 (vrshrq_x_n_u16): Likewise.
8797 (vrshrq_x_n_u32): Likewise.
8798 (vshrq_x_n_s8): Likewise.
8799 (vshrq_x_n_s16): Likewise.
8800 (vshrq_x_n_s32): Likewise.
8801 (vshrq_x_n_u8): Likewise.
8802 (vshrq_x_n_u16): Likewise.
8803 (vshrq_x_n_u32): Likewise.
8804 (vdupq_x_n_f16): Likewise.
8805 (vdupq_x_n_f32): Likewise.
8806 (vminnmq_x_f16): Likewise.
8807 (vminnmq_x_f32): Likewise.
8808 (vmaxnmq_x_f16): Likewise.
8809 (vmaxnmq_x_f32): Likewise.
8810 (vabdq_x_f16): Likewise.
8811 (vabdq_x_f32): Likewise.
8812 (vabsq_x_f16): Likewise.
8813 (vabsq_x_f32): Likewise.
8814 (vaddq_x_f16): Likewise.
8815 (vaddq_x_f32): Likewise.
8816 (vaddq_x_n_f16): Likewise.
8817 (vaddq_x_n_f32): Likewise.
8818 (vnegq_x_f16): Likewise.
8819 (vnegq_x_f32): Likewise.
8820 (vmulq_x_f16): Likewise.
8821 (vmulq_x_f32): Likewise.
8822 (vmulq_x_n_f16): Likewise.
8823 (vmulq_x_n_f32): Likewise.
8824 (vsubq_x_f16): Likewise.
8825 (vsubq_x_f32): Likewise.
8826 (vsubq_x_n_f16): Likewise.
8827 (vsubq_x_n_f32): Likewise.
8828 (vcaddq_rot90_x_f16): Likewise.
8829 (vcaddq_rot90_x_f32): Likewise.
8830 (vcaddq_rot270_x_f16): Likewise.
8831 (vcaddq_rot270_x_f32): Likewise.
8832 (vcmulq_x_f16): Likewise.
8833 (vcmulq_x_f32): Likewise.
8834 (vcmulq_rot90_x_f16): Likewise.
8835 (vcmulq_rot90_x_f32): Likewise.
8836 (vcmulq_rot180_x_f16): Likewise.
8837 (vcmulq_rot180_x_f32): Likewise.
8838 (vcmulq_rot270_x_f16): Likewise.
8839 (vcmulq_rot270_x_f32): Likewise.
8840 (vcvtaq_x_s16_f16): Likewise.
8841 (vcvtaq_x_s32_f32): Likewise.
8842 (vcvtaq_x_u16_f16): Likewise.
8843 (vcvtaq_x_u32_f32): Likewise.
8844 (vcvtnq_x_s16_f16): Likewise.
8845 (vcvtnq_x_s32_f32): Likewise.
8846 (vcvtnq_x_u16_f16): Likewise.
8847 (vcvtnq_x_u32_f32): Likewise.
8848 (vcvtpq_x_s16_f16): Likewise.
8849 (vcvtpq_x_s32_f32): Likewise.
8850 (vcvtpq_x_u16_f16): Likewise.
8851 (vcvtpq_x_u32_f32): Likewise.
8852 (vcvtmq_x_s16_f16): Likewise.
8853 (vcvtmq_x_s32_f32): Likewise.
8854 (vcvtmq_x_u16_f16): Likewise.
8855 (vcvtmq_x_u32_f32): Likewise.
8856 (vcvtbq_x_f32_f16): Likewise.
8857 (vcvttq_x_f32_f16): Likewise.
8858 (vcvtq_x_f16_u16): Likewise.
8859 (vcvtq_x_f16_s16): Likewise.
8860 (vcvtq_x_f32_s32): Likewise.
8861 (vcvtq_x_f32_u32): Likewise.
8862 (vcvtq_x_n_f16_s16): Likewise.
8863 (vcvtq_x_n_f16_u16): Likewise.
8864 (vcvtq_x_n_f32_s32): Likewise.
8865 (vcvtq_x_n_f32_u32): Likewise.
8866 (vcvtq_x_s16_f16): Likewise.
8867 (vcvtq_x_s32_f32): Likewise.
8868 (vcvtq_x_u16_f16): Likewise.
8869 (vcvtq_x_u32_f32): Likewise.
8870 (vcvtq_x_n_s16_f16): Likewise.
8871 (vcvtq_x_n_s32_f32): Likewise.
8872 (vcvtq_x_n_u16_f16): Likewise.
8873 (vcvtq_x_n_u32_f32): Likewise.
8874 (vrndq_x_f16): Likewise.
8875 (vrndq_x_f32): Likewise.
8876 (vrndnq_x_f16): Likewise.
8877 (vrndnq_x_f32): Likewise.
8878 (vrndmq_x_f16): Likewise.
8879 (vrndmq_x_f32): Likewise.
8880 (vrndpq_x_f16): Likewise.
8881 (vrndpq_x_f32): Likewise.
8882 (vrndaq_x_f16): Likewise.
8883 (vrndaq_x_f32): Likewise.
8884 (vrndxq_x_f16): Likewise.
8885 (vrndxq_x_f32): Likewise.
8886 (vandq_x_f16): Likewise.
8887 (vandq_x_f32): Likewise.
8888 (vbicq_x_f16): Likewise.
8889 (vbicq_x_f32): Likewise.
8890 (vbrsrq_x_n_f16): Likewise.
8891 (vbrsrq_x_n_f32): Likewise.
8892 (veorq_x_f16): Likewise.
8893 (veorq_x_f32): Likewise.
8894 (vornq_x_f16): Likewise.
8895 (vornq_x_f32): Likewise.
8896 (vorrq_x_f16): Likewise.
8897 (vorrq_x_f32): Likewise.
8898 (vrev32q_x_f16): Likewise.
8899 (vrev64q_x_f16): Likewise.
8900 (vrev64q_x_f32): Likewise.
8901 (__arm_vddupq_x_n_u8): Define intrinsic.
8902 (__arm_vddupq_x_n_u16): Likewise.
8903 (__arm_vddupq_x_n_u32): Likewise.
8904 (__arm_vddupq_x_wb_u8): Likewise.
8905 (__arm_vddupq_x_wb_u16): Likewise.
8906 (__arm_vddupq_x_wb_u32): Likewise.
8907 (__arm_vdwdupq_x_n_u8): Likewise.
8908 (__arm_vdwdupq_x_n_u16): Likewise.
8909 (__arm_vdwdupq_x_n_u32): Likewise.
8910 (__arm_vdwdupq_x_wb_u8): Likewise.
8911 (__arm_vdwdupq_x_wb_u16): Likewise.
8912 (__arm_vdwdupq_x_wb_u32): Likewise.
8913 (__arm_vidupq_x_n_u8): Likewise.
8914 (__arm_vidupq_x_n_u16): Likewise.
8915 (__arm_vidupq_x_n_u32): Likewise.
8916 (__arm_vidupq_x_wb_u8): Likewise.
8917 (__arm_vidupq_x_wb_u16): Likewise.
8918 (__arm_vidupq_x_wb_u32): Likewise.
8919 (__arm_viwdupq_x_n_u8): Likewise.
8920 (__arm_viwdupq_x_n_u16): Likewise.
8921 (__arm_viwdupq_x_n_u32): Likewise.
8922 (__arm_viwdupq_x_wb_u8): Likewise.
8923 (__arm_viwdupq_x_wb_u16): Likewise.
8924 (__arm_viwdupq_x_wb_u32): Likewise.
8925 (__arm_vdupq_x_n_s8): Likewise.
8926 (__arm_vdupq_x_n_s16): Likewise.
8927 (__arm_vdupq_x_n_s32): Likewise.
8928 (__arm_vdupq_x_n_u8): Likewise.
8929 (__arm_vdupq_x_n_u16): Likewise.
8930 (__arm_vdupq_x_n_u32): Likewise.
8931 (__arm_vminq_x_s8): Likewise.
8932 (__arm_vminq_x_s16): Likewise.
8933 (__arm_vminq_x_s32): Likewise.
8934 (__arm_vminq_x_u8): Likewise.
8935 (__arm_vminq_x_u16): Likewise.
8936 (__arm_vminq_x_u32): Likewise.
8937 (__arm_vmaxq_x_s8): Likewise.
8938 (__arm_vmaxq_x_s16): Likewise.
8939 (__arm_vmaxq_x_s32): Likewise.
8940 (__arm_vmaxq_x_u8): Likewise.
8941 (__arm_vmaxq_x_u16): Likewise.
8942 (__arm_vmaxq_x_u32): Likewise.
8943 (__arm_vabdq_x_s8): Likewise.
8944 (__arm_vabdq_x_s16): Likewise.
8945 (__arm_vabdq_x_s32): Likewise.
8946 (__arm_vabdq_x_u8): Likewise.
8947 (__arm_vabdq_x_u16): Likewise.
8948 (__arm_vabdq_x_u32): Likewise.
8949 (__arm_vabsq_x_s8): Likewise.
8950 (__arm_vabsq_x_s16): Likewise.
8951 (__arm_vabsq_x_s32): Likewise.
8952 (__arm_vaddq_x_s8): Likewise.
8953 (__arm_vaddq_x_s16): Likewise.
8954 (__arm_vaddq_x_s32): Likewise.
8955 (__arm_vaddq_x_n_s8): Likewise.
8956 (__arm_vaddq_x_n_s16): Likewise.
8957 (__arm_vaddq_x_n_s32): Likewise.
8958 (__arm_vaddq_x_u8): Likewise.
8959 (__arm_vaddq_x_u16): Likewise.
8960 (__arm_vaddq_x_u32): Likewise.
8961 (__arm_vaddq_x_n_u8): Likewise.
8962 (__arm_vaddq_x_n_u16): Likewise.
8963 (__arm_vaddq_x_n_u32): Likewise.
8964 (__arm_vclsq_x_s8): Likewise.
8965 (__arm_vclsq_x_s16): Likewise.
8966 (__arm_vclsq_x_s32): Likewise.
8967 (__arm_vclzq_x_s8): Likewise.
8968 (__arm_vclzq_x_s16): Likewise.
8969 (__arm_vclzq_x_s32): Likewise.
8970 (__arm_vclzq_x_u8): Likewise.
8971 (__arm_vclzq_x_u16): Likewise.
8972 (__arm_vclzq_x_u32): Likewise.
8973 (__arm_vnegq_x_s8): Likewise.
8974 (__arm_vnegq_x_s16): Likewise.
8975 (__arm_vnegq_x_s32): Likewise.
8976 (__arm_vmulhq_x_s8): Likewise.
8977 (__arm_vmulhq_x_s16): Likewise.
8978 (__arm_vmulhq_x_s32): Likewise.
8979 (__arm_vmulhq_x_u8): Likewise.
8980 (__arm_vmulhq_x_u16): Likewise.
8981 (__arm_vmulhq_x_u32): Likewise.
8982 (__arm_vmullbq_poly_x_p8): Likewise.
8983 (__arm_vmullbq_poly_x_p16): Likewise.
8984 (__arm_vmullbq_int_x_s8): Likewise.
8985 (__arm_vmullbq_int_x_s16): Likewise.
8986 (__arm_vmullbq_int_x_s32): Likewise.
8987 (__arm_vmullbq_int_x_u8): Likewise.
8988 (__arm_vmullbq_int_x_u16): Likewise.
8989 (__arm_vmullbq_int_x_u32): Likewise.
8990 (__arm_vmulltq_poly_x_p8): Likewise.
8991 (__arm_vmulltq_poly_x_p16): Likewise.
8992 (__arm_vmulltq_int_x_s8): Likewise.
8993 (__arm_vmulltq_int_x_s16): Likewise.
8994 (__arm_vmulltq_int_x_s32): Likewise.
8995 (__arm_vmulltq_int_x_u8): Likewise.
8996 (__arm_vmulltq_int_x_u16): Likewise.
8997 (__arm_vmulltq_int_x_u32): Likewise.
8998 (__arm_vmulq_x_s8): Likewise.
8999 (__arm_vmulq_x_s16): Likewise.
9000 (__arm_vmulq_x_s32): Likewise.
9001 (__arm_vmulq_x_n_s8): Likewise.
9002 (__arm_vmulq_x_n_s16): Likewise.
9003 (__arm_vmulq_x_n_s32): Likewise.
9004 (__arm_vmulq_x_u8): Likewise.
9005 (__arm_vmulq_x_u16): Likewise.
9006 (__arm_vmulq_x_u32): Likewise.
9007 (__arm_vmulq_x_n_u8): Likewise.
9008 (__arm_vmulq_x_n_u16): Likewise.
9009 (__arm_vmulq_x_n_u32): Likewise.
9010 (__arm_vsubq_x_s8): Likewise.
9011 (__arm_vsubq_x_s16): Likewise.
9012 (__arm_vsubq_x_s32): Likewise.
9013 (__arm_vsubq_x_n_s8): Likewise.
9014 (__arm_vsubq_x_n_s16): Likewise.
9015 (__arm_vsubq_x_n_s32): Likewise.
9016 (__arm_vsubq_x_u8): Likewise.
9017 (__arm_vsubq_x_u16): Likewise.
9018 (__arm_vsubq_x_u32): Likewise.
9019 (__arm_vsubq_x_n_u8): Likewise.
9020 (__arm_vsubq_x_n_u16): Likewise.
9021 (__arm_vsubq_x_n_u32): Likewise.
9022 (__arm_vcaddq_rot90_x_s8): Likewise.
9023 (__arm_vcaddq_rot90_x_s16): Likewise.
9024 (__arm_vcaddq_rot90_x_s32): Likewise.
9025 (__arm_vcaddq_rot90_x_u8): Likewise.
9026 (__arm_vcaddq_rot90_x_u16): Likewise.
9027 (__arm_vcaddq_rot90_x_u32): Likewise.
9028 (__arm_vcaddq_rot270_x_s8): Likewise.
9029 (__arm_vcaddq_rot270_x_s16): Likewise.
9030 (__arm_vcaddq_rot270_x_s32): Likewise.
9031 (__arm_vcaddq_rot270_x_u8): Likewise.
9032 (__arm_vcaddq_rot270_x_u16): Likewise.
9033 (__arm_vcaddq_rot270_x_u32): Likewise.
9034 (__arm_vhaddq_x_n_s8): Likewise.
9035 (__arm_vhaddq_x_n_s16): Likewise.
9036 (__arm_vhaddq_x_n_s32): Likewise.
9037 (__arm_vhaddq_x_n_u8): Likewise.
9038 (__arm_vhaddq_x_n_u16): Likewise.
9039 (__arm_vhaddq_x_n_u32): Likewise.
9040 (__arm_vhaddq_x_s8): Likewise.
9041 (__arm_vhaddq_x_s16): Likewise.
9042 (__arm_vhaddq_x_s32): Likewise.
9043 (__arm_vhaddq_x_u8): Likewise.
9044 (__arm_vhaddq_x_u16): Likewise.
9045 (__arm_vhaddq_x_u32): Likewise.
9046 (__arm_vhcaddq_rot90_x_s8): Likewise.
9047 (__arm_vhcaddq_rot90_x_s16): Likewise.
9048 (__arm_vhcaddq_rot90_x_s32): Likewise.
9049 (__arm_vhcaddq_rot270_x_s8): Likewise.
9050 (__arm_vhcaddq_rot270_x_s16): Likewise.
9051 (__arm_vhcaddq_rot270_x_s32): Likewise.
9052 (__arm_vhsubq_x_n_s8): Likewise.
9053 (__arm_vhsubq_x_n_s16): Likewise.
9054 (__arm_vhsubq_x_n_s32): Likewise.
9055 (__arm_vhsubq_x_n_u8): Likewise.
9056 (__arm_vhsubq_x_n_u16): Likewise.
9057 (__arm_vhsubq_x_n_u32): Likewise.
9058 (__arm_vhsubq_x_s8): Likewise.
9059 (__arm_vhsubq_x_s16): Likewise.
9060 (__arm_vhsubq_x_s32): Likewise.
9061 (__arm_vhsubq_x_u8): Likewise.
9062 (__arm_vhsubq_x_u16): Likewise.
9063 (__arm_vhsubq_x_u32): Likewise.
9064 (__arm_vrhaddq_x_s8): Likewise.
9065 (__arm_vrhaddq_x_s16): Likewise.
9066 (__arm_vrhaddq_x_s32): Likewise.
9067 (__arm_vrhaddq_x_u8): Likewise.
9068 (__arm_vrhaddq_x_u16): Likewise.
9069 (__arm_vrhaddq_x_u32): Likewise.
9070 (__arm_vrmulhq_x_s8): Likewise.
9071 (__arm_vrmulhq_x_s16): Likewise.
9072 (__arm_vrmulhq_x_s32): Likewise.
9073 (__arm_vrmulhq_x_u8): Likewise.
9074 (__arm_vrmulhq_x_u16): Likewise.
9075 (__arm_vrmulhq_x_u32): Likewise.
9076 (__arm_vandq_x_s8): Likewise.
9077 (__arm_vandq_x_s16): Likewise.
9078 (__arm_vandq_x_s32): Likewise.
9079 (__arm_vandq_x_u8): Likewise.
9080 (__arm_vandq_x_u16): Likewise.
9081 (__arm_vandq_x_u32): Likewise.
9082 (__arm_vbicq_x_s8): Likewise.
9083 (__arm_vbicq_x_s16): Likewise.
9084 (__arm_vbicq_x_s32): Likewise.
9085 (__arm_vbicq_x_u8): Likewise.
9086 (__arm_vbicq_x_u16): Likewise.
9087 (__arm_vbicq_x_u32): Likewise.
9088 (__arm_vbrsrq_x_n_s8): Likewise.
9089 (__arm_vbrsrq_x_n_s16): Likewise.
9090 (__arm_vbrsrq_x_n_s32): Likewise.
9091 (__arm_vbrsrq_x_n_u8): Likewise.
9092 (__arm_vbrsrq_x_n_u16): Likewise.
9093 (__arm_vbrsrq_x_n_u32): Likewise.
9094 (__arm_veorq_x_s8): Likewise.
9095 (__arm_veorq_x_s16): Likewise.
9096 (__arm_veorq_x_s32): Likewise.
9097 (__arm_veorq_x_u8): Likewise.
9098 (__arm_veorq_x_u16): Likewise.
9099 (__arm_veorq_x_u32): Likewise.
9100 (__arm_vmovlbq_x_s8): Likewise.
9101 (__arm_vmovlbq_x_s16): Likewise.
9102 (__arm_vmovlbq_x_u8): Likewise.
9103 (__arm_vmovlbq_x_u16): Likewise.
9104 (__arm_vmovltq_x_s8): Likewise.
9105 (__arm_vmovltq_x_s16): Likewise.
9106 (__arm_vmovltq_x_u8): Likewise.
9107 (__arm_vmovltq_x_u16): Likewise.
9108 (__arm_vmvnq_x_s8): Likewise.
9109 (__arm_vmvnq_x_s16): Likewise.
9110 (__arm_vmvnq_x_s32): Likewise.
9111 (__arm_vmvnq_x_u8): Likewise.
9112 (__arm_vmvnq_x_u16): Likewise.
9113 (__arm_vmvnq_x_u32): Likewise.
9114 (__arm_vmvnq_x_n_s16): Likewise.
9115 (__arm_vmvnq_x_n_s32): Likewise.
9116 (__arm_vmvnq_x_n_u16): Likewise.
9117 (__arm_vmvnq_x_n_u32): Likewise.
9118 (__arm_vornq_x_s8): Likewise.
9119 (__arm_vornq_x_s16): Likewise.
9120 (__arm_vornq_x_s32): Likewise.
9121 (__arm_vornq_x_u8): Likewise.
9122 (__arm_vornq_x_u16): Likewise.
9123 (__arm_vornq_x_u32): Likewise.
9124 (__arm_vorrq_x_s8): Likewise.
9125 (__arm_vorrq_x_s16): Likewise.
9126 (__arm_vorrq_x_s32): Likewise.
9127 (__arm_vorrq_x_u8): Likewise.
9128 (__arm_vorrq_x_u16): Likewise.
9129 (__arm_vorrq_x_u32): Likewise.
9130 (__arm_vrev16q_x_s8): Likewise.
9131 (__arm_vrev16q_x_u8): Likewise.
9132 (__arm_vrev32q_x_s8): Likewise.
9133 (__arm_vrev32q_x_s16): Likewise.
9134 (__arm_vrev32q_x_u8): Likewise.
9135 (__arm_vrev32q_x_u16): Likewise.
9136 (__arm_vrev64q_x_s8): Likewise.
9137 (__arm_vrev64q_x_s16): Likewise.
9138 (__arm_vrev64q_x_s32): Likewise.
9139 (__arm_vrev64q_x_u8): Likewise.
9140 (__arm_vrev64q_x_u16): Likewise.
9141 (__arm_vrev64q_x_u32): Likewise.
9142 (__arm_vrshlq_x_s8): Likewise.
9143 (__arm_vrshlq_x_s16): Likewise.
9144 (__arm_vrshlq_x_s32): Likewise.
9145 (__arm_vrshlq_x_u8): Likewise.
9146 (__arm_vrshlq_x_u16): Likewise.
9147 (__arm_vrshlq_x_u32): Likewise.
9148 (__arm_vshllbq_x_n_s8): Likewise.
9149 (__arm_vshllbq_x_n_s16): Likewise.
9150 (__arm_vshllbq_x_n_u8): Likewise.
9151 (__arm_vshllbq_x_n_u16): Likewise.
9152 (__arm_vshlltq_x_n_s8): Likewise.
9153 (__arm_vshlltq_x_n_s16): Likewise.
9154 (__arm_vshlltq_x_n_u8): Likewise.
9155 (__arm_vshlltq_x_n_u16): Likewise.
9156 (__arm_vshlq_x_s8): Likewise.
9157 (__arm_vshlq_x_s16): Likewise.
9158 (__arm_vshlq_x_s32): Likewise.
9159 (__arm_vshlq_x_u8): Likewise.
9160 (__arm_vshlq_x_u16): Likewise.
9161 (__arm_vshlq_x_u32): Likewise.
9162 (__arm_vshlq_x_n_s8): Likewise.
9163 (__arm_vshlq_x_n_s16): Likewise.
9164 (__arm_vshlq_x_n_s32): Likewise.
9165 (__arm_vshlq_x_n_u8): Likewise.
9166 (__arm_vshlq_x_n_u16): Likewise.
9167 (__arm_vshlq_x_n_u32): Likewise.
9168 (__arm_vrshrq_x_n_s8): Likewise.
9169 (__arm_vrshrq_x_n_s16): Likewise.
9170 (__arm_vrshrq_x_n_s32): Likewise.
9171 (__arm_vrshrq_x_n_u8): Likewise.
9172 (__arm_vrshrq_x_n_u16): Likewise.
9173 (__arm_vrshrq_x_n_u32): Likewise.
9174 (__arm_vshrq_x_n_s8): Likewise.
9175 (__arm_vshrq_x_n_s16): Likewise.
9176 (__arm_vshrq_x_n_s32): Likewise.
9177 (__arm_vshrq_x_n_u8): Likewise.
9178 (__arm_vshrq_x_n_u16): Likewise.
9179 (__arm_vshrq_x_n_u32): Likewise.
9180 (__arm_vdupq_x_n_f16): Likewise.
9181 (__arm_vdupq_x_n_f32): Likewise.
9182 (__arm_vminnmq_x_f16): Likewise.
9183 (__arm_vminnmq_x_f32): Likewise.
9184 (__arm_vmaxnmq_x_f16): Likewise.
9185 (__arm_vmaxnmq_x_f32): Likewise.
9186 (__arm_vabdq_x_f16): Likewise.
9187 (__arm_vabdq_x_f32): Likewise.
9188 (__arm_vabsq_x_f16): Likewise.
9189 (__arm_vabsq_x_f32): Likewise.
9190 (__arm_vaddq_x_f16): Likewise.
9191 (__arm_vaddq_x_f32): Likewise.
9192 (__arm_vaddq_x_n_f16): Likewise.
9193 (__arm_vaddq_x_n_f32): Likewise.
9194 (__arm_vnegq_x_f16): Likewise.
9195 (__arm_vnegq_x_f32): Likewise.
9196 (__arm_vmulq_x_f16): Likewise.
9197 (__arm_vmulq_x_f32): Likewise.
9198 (__arm_vmulq_x_n_f16): Likewise.
9199 (__arm_vmulq_x_n_f32): Likewise.
9200 (__arm_vsubq_x_f16): Likewise.
9201 (__arm_vsubq_x_f32): Likewise.
9202 (__arm_vsubq_x_n_f16): Likewise.
9203 (__arm_vsubq_x_n_f32): Likewise.
9204 (__arm_vcaddq_rot90_x_f16): Likewise.
9205 (__arm_vcaddq_rot90_x_f32): Likewise.
9206 (__arm_vcaddq_rot270_x_f16): Likewise.
9207 (__arm_vcaddq_rot270_x_f32): Likewise.
9208 (__arm_vcmulq_x_f16): Likewise.
9209 (__arm_vcmulq_x_f32): Likewise.
9210 (__arm_vcmulq_rot90_x_f16): Likewise.
9211 (__arm_vcmulq_rot90_x_f32): Likewise.
9212 (__arm_vcmulq_rot180_x_f16): Likewise.
9213 (__arm_vcmulq_rot180_x_f32): Likewise.
9214 (__arm_vcmulq_rot270_x_f16): Likewise.
9215 (__arm_vcmulq_rot270_x_f32): Likewise.
9216 (__arm_vcvtaq_x_s16_f16): Likewise.
9217 (__arm_vcvtaq_x_s32_f32): Likewise.
9218 (__arm_vcvtaq_x_u16_f16): Likewise.
9219 (__arm_vcvtaq_x_u32_f32): Likewise.
9220 (__arm_vcvtnq_x_s16_f16): Likewise.
9221 (__arm_vcvtnq_x_s32_f32): Likewise.
9222 (__arm_vcvtnq_x_u16_f16): Likewise.
9223 (__arm_vcvtnq_x_u32_f32): Likewise.
9224 (__arm_vcvtpq_x_s16_f16): Likewise.
9225 (__arm_vcvtpq_x_s32_f32): Likewise.
9226 (__arm_vcvtpq_x_u16_f16): Likewise.
9227 (__arm_vcvtpq_x_u32_f32): Likewise.
9228 (__arm_vcvtmq_x_s16_f16): Likewise.
9229 (__arm_vcvtmq_x_s32_f32): Likewise.
9230 (__arm_vcvtmq_x_u16_f16): Likewise.
9231 (__arm_vcvtmq_x_u32_f32): Likewise.
9232 (__arm_vcvtbq_x_f32_f16): Likewise.
9233 (__arm_vcvttq_x_f32_f16): Likewise.
9234 (__arm_vcvtq_x_f16_u16): Likewise.
9235 (__arm_vcvtq_x_f16_s16): Likewise.
9236 (__arm_vcvtq_x_f32_s32): Likewise.
9237 (__arm_vcvtq_x_f32_u32): Likewise.
9238 (__arm_vcvtq_x_n_f16_s16): Likewise.
9239 (__arm_vcvtq_x_n_f16_u16): Likewise.
9240 (__arm_vcvtq_x_n_f32_s32): Likewise.
9241 (__arm_vcvtq_x_n_f32_u32): Likewise.
9242 (__arm_vcvtq_x_s16_f16): Likewise.
9243 (__arm_vcvtq_x_s32_f32): Likewise.
9244 (__arm_vcvtq_x_u16_f16): Likewise.
9245 (__arm_vcvtq_x_u32_f32): Likewise.
9246 (__arm_vcvtq_x_n_s16_f16): Likewise.
9247 (__arm_vcvtq_x_n_s32_f32): Likewise.
9248 (__arm_vcvtq_x_n_u16_f16): Likewise.
9249 (__arm_vcvtq_x_n_u32_f32): Likewise.
9250 (__arm_vrndq_x_f16): Likewise.
9251 (__arm_vrndq_x_f32): Likewise.
9252 (__arm_vrndnq_x_f16): Likewise.
9253 (__arm_vrndnq_x_f32): Likewise.
9254 (__arm_vrndmq_x_f16): Likewise.
9255 (__arm_vrndmq_x_f32): Likewise.
9256 (__arm_vrndpq_x_f16): Likewise.
9257 (__arm_vrndpq_x_f32): Likewise.
9258 (__arm_vrndaq_x_f16): Likewise.
9259 (__arm_vrndaq_x_f32): Likewise.
9260 (__arm_vrndxq_x_f16): Likewise.
9261 (__arm_vrndxq_x_f32): Likewise.
9262 (__arm_vandq_x_f16): Likewise.
9263 (__arm_vandq_x_f32): Likewise.
9264 (__arm_vbicq_x_f16): Likewise.
9265 (__arm_vbicq_x_f32): Likewise.
9266 (__arm_vbrsrq_x_n_f16): Likewise.
9267 (__arm_vbrsrq_x_n_f32): Likewise.
9268 (__arm_veorq_x_f16): Likewise.
9269 (__arm_veorq_x_f32): Likewise.
9270 (__arm_vornq_x_f16): Likewise.
9271 (__arm_vornq_x_f32): Likewise.
9272 (__arm_vorrq_x_f16): Likewise.
9273 (__arm_vorrq_x_f32): Likewise.
9274 (__arm_vrev32q_x_f16): Likewise.
9275 (__arm_vrev64q_x_f16): Likewise.
9276 (__arm_vrev64q_x_f32): Likewise.
9277 (vabdq_x): Define polymorphic variant.
9278 (vabsq_x): Likewise.
9279 (vaddq_x): Likewise.
9280 (vandq_x): Likewise.
9281 (vbicq_x): Likewise.
9282 (vbrsrq_x): Likewise.
9283 (vcaddq_rot270_x): Likewise.
9284 (vcaddq_rot90_x): Likewise.
9285 (vcmulq_rot180_x): Likewise.
9286 (vcmulq_rot270_x): Likewise.
9287 (vcmulq_x): Likewise.
9288 (vcvtq_x): Likewise.
9289 (vcvtq_x_n): Likewise.
9290 (vcvtnq_m): Likewise.
9291 (veorq_x): Likewise.
9292 (vmaxnmq_x): Likewise.
9293 (vminnmq_x): Likewise.
9294 (vmulq_x): Likewise.
9295 (vnegq_x): Likewise.
9296 (vornq_x): Likewise.
9297 (vorrq_x): Likewise.
9298 (vrev32q_x): Likewise.
9299 (vrev64q_x): Likewise.
9300 (vrndaq_x): Likewise.
9301 (vrndmq_x): Likewise.
9302 (vrndnq_x): Likewise.
9303 (vrndpq_x): Likewise.
9304 (vrndq_x): Likewise.
9305 (vrndxq_x): Likewise.
9306 (vsubq_x): Likewise.
9307 (vcmulq_rot90_x): Likewise.
9309 (vclsq_x): Likewise.
9310 (vclzq_x): Likewise.
9311 (vhaddq_x): Likewise.
9312 (vhcaddq_rot270_x): Likewise.
9313 (vhcaddq_rot90_x): Likewise.
9314 (vhsubq_x): Likewise.
9315 (vmaxq_x): Likewise.
9316 (vminq_x): Likewise.
9317 (vmovlbq_x): Likewise.
9318 (vmovltq_x): Likewise.
9319 (vmulhq_x): Likewise.
9320 (vmullbq_int_x): Likewise.
9321 (vmullbq_poly_x): Likewise.
9322 (vmulltq_int_x): Likewise.
9323 (vmulltq_poly_x): Likewise.
9324 (vmvnq_x): Likewise.
9325 (vrev16q_x): Likewise.
9326 (vrhaddq_x): Likewise.
9327 (vrmulhq_x): Likewise.
9328 (vrshlq_x): Likewise.
9329 (vrshrq_x): Likewise.
9330 (vshllbq_x): Likewise.
9331 (vshlltq_x): Likewise.
9332 (vshlq_x_n): Likewise.
9333 (vshlq_x): Likewise.
9334 (vdwdupq_x_u8): Likewise.
9335 (vdwdupq_x_u16): Likewise.
9336 (vdwdupq_x_u32): Likewise.
9337 (viwdupq_x_u8): Likewise.
9338 (viwdupq_x_u16): Likewise.
9339 (viwdupq_x_u32): Likewise.
9340 (vidupq_x_u8): Likewise.
9341 (vddupq_x_u8): Likewise.
9342 (vidupq_x_u16): Likewise.
9343 (vddupq_x_u16): Likewise.
9344 (vidupq_x_u32): Likewise.
9345 (vddupq_x_u32): Likewise.
9346 (vshrq_x): Likewise.
9348 2020-03-20 Richard Biener <rguenther@suse.de>
9350 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
9351 to vectorize for CTOR defs.
9353 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9354 Andre Vieira <andre.simoesdiasvieira@arm.com>
9355 Mihail Ionescu <mihail.ionescu@arm.com>
9357 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
9359 (LDRGBWBU_QUALIFIERS): Likewise.
9360 (LDRGBWBS_Z_QUALIFIERS): Likewise.
9361 (LDRGBWBU_Z_QUALIFIERS): Likewise.
9362 (STRSBWBS_QUALIFIERS): Likewise.
9363 (STRSBWBU_QUALIFIERS): Likewise.
9364 (STRSBWBS_P_QUALIFIERS): Likewise.
9365 (STRSBWBU_P_QUALIFIERS): Likewise.
9366 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
9367 (vldrdq_gather_base_wb_u64): Likewise.
9368 (vldrdq_gather_base_wb_z_s64): Likewise.
9369 (vldrdq_gather_base_wb_z_u64): Likewise.
9370 (vldrwq_gather_base_wb_f32): Likewise.
9371 (vldrwq_gather_base_wb_s32): Likewise.
9372 (vldrwq_gather_base_wb_u32): Likewise.
9373 (vldrwq_gather_base_wb_z_f32): Likewise.
9374 (vldrwq_gather_base_wb_z_s32): Likewise.
9375 (vldrwq_gather_base_wb_z_u32): Likewise.
9376 (vstrdq_scatter_base_wb_p_s64): Likewise.
9377 (vstrdq_scatter_base_wb_p_u64): Likewise.
9378 (vstrdq_scatter_base_wb_s64): Likewise.
9379 (vstrdq_scatter_base_wb_u64): Likewise.
9380 (vstrwq_scatter_base_wb_p_s32): Likewise.
9381 (vstrwq_scatter_base_wb_p_f32): Likewise.
9382 (vstrwq_scatter_base_wb_p_u32): Likewise.
9383 (vstrwq_scatter_base_wb_s32): Likewise.
9384 (vstrwq_scatter_base_wb_u32): Likewise.
9385 (vstrwq_scatter_base_wb_f32): Likewise.
9386 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
9387 (__arm_vldrdq_gather_base_wb_u64): Likewise.
9388 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
9389 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
9390 (__arm_vldrwq_gather_base_wb_s32): Likewise.
9391 (__arm_vldrwq_gather_base_wb_u32): Likewise.
9392 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
9393 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
9394 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
9395 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
9396 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
9397 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
9398 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
9399 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
9400 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
9401 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
9402 (__arm_vldrwq_gather_base_wb_f32): Likewise.
9403 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
9404 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
9405 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
9406 (vstrwq_scatter_base_wb): Define polymorphic variant.
9407 (vstrwq_scatter_base_wb_p): Likewise.
9408 (vstrdq_scatter_base_wb_p): Likewise.
9409 (vstrdq_scatter_base_wb): Likewise.
9410 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
9412 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
9414 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
9415 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
9416 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
9417 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
9418 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
9419 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
9420 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
9421 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
9422 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
9423 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
9424 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
9425 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
9426 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
9427 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
9428 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
9429 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
9430 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
9431 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
9432 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
9433 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
9434 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
9435 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
9436 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
9437 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
9438 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
9439 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
9440 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
9441 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
9442 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
9444 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9445 Andre Vieira <andre.simoesdiasvieira@arm.com>
9446 Mihail Ionescu <mihail.ionescu@arm.com>
9448 * config/arm/arm-builtins.c
9449 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
9451 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
9452 (vddupq_m_n_u32): Likewise.
9453 (vddupq_m_n_u16): Likewise.
9454 (vddupq_m_wb_u8): Likewise.
9455 (vddupq_m_wb_u16): Likewise.
9456 (vddupq_m_wb_u32): Likewise.
9457 (vddupq_n_u8): Likewise.
9458 (vddupq_n_u32): Likewise.
9459 (vddupq_n_u16): Likewise.
9460 (vddupq_wb_u8): Likewise.
9461 (vddupq_wb_u16): Likewise.
9462 (vddupq_wb_u32): Likewise.
9463 (vdwdupq_m_n_u8): Likewise.
9464 (vdwdupq_m_n_u32): Likewise.
9465 (vdwdupq_m_n_u16): Likewise.
9466 (vdwdupq_m_wb_u8): Likewise.
9467 (vdwdupq_m_wb_u32): Likewise.
9468 (vdwdupq_m_wb_u16): Likewise.
9469 (vdwdupq_n_u8): Likewise.
9470 (vdwdupq_n_u32): Likewise.
9471 (vdwdupq_n_u16): Likewise.
9472 (vdwdupq_wb_u8): Likewise.
9473 (vdwdupq_wb_u32): Likewise.
9474 (vdwdupq_wb_u16): Likewise.
9475 (vidupq_m_n_u8): Likewise.
9476 (vidupq_m_n_u32): Likewise.
9477 (vidupq_m_n_u16): Likewise.
9478 (vidupq_m_wb_u8): Likewise.
9479 (vidupq_m_wb_u16): Likewise.
9480 (vidupq_m_wb_u32): Likewise.
9481 (vidupq_n_u8): Likewise.
9482 (vidupq_n_u32): Likewise.
9483 (vidupq_n_u16): Likewise.
9484 (vidupq_wb_u8): Likewise.
9485 (vidupq_wb_u16): Likewise.
9486 (vidupq_wb_u32): Likewise.
9487 (viwdupq_m_n_u8): Likewise.
9488 (viwdupq_m_n_u32): Likewise.
9489 (viwdupq_m_n_u16): Likewise.
9490 (viwdupq_m_wb_u8): Likewise.
9491 (viwdupq_m_wb_u32): Likewise.
9492 (viwdupq_m_wb_u16): Likewise.
9493 (viwdupq_n_u8): Likewise.
9494 (viwdupq_n_u32): Likewise.
9495 (viwdupq_n_u16): Likewise.
9496 (viwdupq_wb_u8): Likewise.
9497 (viwdupq_wb_u32): Likewise.
9498 (viwdupq_wb_u16): Likewise.
9499 (__arm_vddupq_m_n_u8): Define intrinsic.
9500 (__arm_vddupq_m_n_u32): Likewise.
9501 (__arm_vddupq_m_n_u16): Likewise.
9502 (__arm_vddupq_m_wb_u8): Likewise.
9503 (__arm_vddupq_m_wb_u16): Likewise.
9504 (__arm_vddupq_m_wb_u32): Likewise.
9505 (__arm_vddupq_n_u8): Likewise.
9506 (__arm_vddupq_n_u32): Likewise.
9507 (__arm_vddupq_n_u16): Likewise.
9508 (__arm_vdwdupq_m_n_u8): Likewise.
9509 (__arm_vdwdupq_m_n_u32): Likewise.
9510 (__arm_vdwdupq_m_n_u16): Likewise.
9511 (__arm_vdwdupq_m_wb_u8): Likewise.
9512 (__arm_vdwdupq_m_wb_u32): Likewise.
9513 (__arm_vdwdupq_m_wb_u16): Likewise.
9514 (__arm_vdwdupq_n_u8): Likewise.
9515 (__arm_vdwdupq_n_u32): Likewise.
9516 (__arm_vdwdupq_n_u16): Likewise.
9517 (__arm_vdwdupq_wb_u8): Likewise.
9518 (__arm_vdwdupq_wb_u32): Likewise.
9519 (__arm_vdwdupq_wb_u16): Likewise.
9520 (__arm_vidupq_m_n_u8): Likewise.
9521 (__arm_vidupq_m_n_u32): Likewise.
9522 (__arm_vidupq_m_n_u16): Likewise.
9523 (__arm_vidupq_n_u8): Likewise.
9524 (__arm_vidupq_m_wb_u8): Likewise.
9525 (__arm_vidupq_m_wb_u16): Likewise.
9526 (__arm_vidupq_m_wb_u32): Likewise.
9527 (__arm_vidupq_n_u32): Likewise.
9528 (__arm_vidupq_n_u16): Likewise.
9529 (__arm_vidupq_wb_u8): Likewise.
9530 (__arm_vidupq_wb_u16): Likewise.
9531 (__arm_vidupq_wb_u32): Likewise.
9532 (__arm_vddupq_wb_u8): Likewise.
9533 (__arm_vddupq_wb_u16): Likewise.
9534 (__arm_vddupq_wb_u32): Likewise.
9535 (__arm_viwdupq_m_n_u8): Likewise.
9536 (__arm_viwdupq_m_n_u32): Likewise.
9537 (__arm_viwdupq_m_n_u16): Likewise.
9538 (__arm_viwdupq_m_wb_u8): Likewise.
9539 (__arm_viwdupq_m_wb_u32): Likewise.
9540 (__arm_viwdupq_m_wb_u16): Likewise.
9541 (__arm_viwdupq_n_u8): Likewise.
9542 (__arm_viwdupq_n_u32): Likewise.
9543 (__arm_viwdupq_n_u16): Likewise.
9544 (__arm_viwdupq_wb_u8): Likewise.
9545 (__arm_viwdupq_wb_u32): Likewise.
9546 (__arm_viwdupq_wb_u16): Likewise.
9547 (vidupq_m): Define polymorphic variant.
9548 (vddupq_m): Likewise.
9549 (vidupq_u16): Likewise.
9550 (vidupq_u32): Likewise.
9551 (vidupq_u8): Likewise.
9552 (vddupq_u16): Likewise.
9553 (vddupq_u32): Likewise.
9554 (vddupq_u8): Likewise.
9555 (viwdupq_m): Likewise.
9556 (viwdupq_u16): Likewise.
9557 (viwdupq_u32): Likewise.
9558 (viwdupq_u8): Likewise.
9559 (vdwdupq_m): Likewise.
9560 (vdwdupq_u16): Likewise.
9561 (vdwdupq_u32): Likewise.
9562 (vdwdupq_u8): Likewise.
9563 * config/arm/arm_mve_builtins.def
9564 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
9566 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
9567 (mve_vidupq_u<mode>_insn): Likewise.
9568 (mve_vidupq_m_n_u<mode>): Likewise.
9569 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
9570 (mve_vddupq_n_u<mode>): Likewise.
9571 (mve_vddupq_u<mode>_insn): Likewise.
9572 (mve_vddupq_m_n_u<mode>): Likewise.
9573 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
9574 (mve_vdwdupq_n_u<mode>): Likewise.
9575 (mve_vdwdupq_wb_u<mode>): Likewise.
9576 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
9577 (mve_vdwdupq_m_n_u<mode>): Likewise.
9578 (mve_vdwdupq_m_wb_u<mode>): Likewise.
9579 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
9580 (mve_viwdupq_n_u<mode>): Likewise.
9581 (mve_viwdupq_wb_u<mode>): Likewise.
9582 (mve_viwdupq_wb_u<mode>_insn): Likewise.
9583 (mve_viwdupq_m_n_u<mode>): Likewise.
9584 (mve_viwdupq_m_wb_u<mode>): Likewise.
9585 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
9587 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9589 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
9590 (vreinterpretq_s16_s64): Likewise.
9591 (vreinterpretq_s16_s8): Likewise.
9592 (vreinterpretq_s16_u16): Likewise.
9593 (vreinterpretq_s16_u32): Likewise.
9594 (vreinterpretq_s16_u64): Likewise.
9595 (vreinterpretq_s16_u8): Likewise.
9596 (vreinterpretq_s32_s16): Likewise.
9597 (vreinterpretq_s32_s64): Likewise.
9598 (vreinterpretq_s32_s8): Likewise.
9599 (vreinterpretq_s32_u16): Likewise.
9600 (vreinterpretq_s32_u32): Likewise.
9601 (vreinterpretq_s32_u64): Likewise.
9602 (vreinterpretq_s32_u8): Likewise.
9603 (vreinterpretq_s64_s16): Likewise.
9604 (vreinterpretq_s64_s32): Likewise.
9605 (vreinterpretq_s64_s8): Likewise.
9606 (vreinterpretq_s64_u16): Likewise.
9607 (vreinterpretq_s64_u32): Likewise.
9608 (vreinterpretq_s64_u64): Likewise.
9609 (vreinterpretq_s64_u8): Likewise.
9610 (vreinterpretq_s8_s16): Likewise.
9611 (vreinterpretq_s8_s32): Likewise.
9612 (vreinterpretq_s8_s64): Likewise.
9613 (vreinterpretq_s8_u16): Likewise.
9614 (vreinterpretq_s8_u32): Likewise.
9615 (vreinterpretq_s8_u64): Likewise.
9616 (vreinterpretq_s8_u8): Likewise.
9617 (vreinterpretq_u16_s16): Likewise.
9618 (vreinterpretq_u16_s32): Likewise.
9619 (vreinterpretq_u16_s64): Likewise.
9620 (vreinterpretq_u16_s8): Likewise.
9621 (vreinterpretq_u16_u32): Likewise.
9622 (vreinterpretq_u16_u64): Likewise.
9623 (vreinterpretq_u16_u8): Likewise.
9624 (vreinterpretq_u32_s16): Likewise.
9625 (vreinterpretq_u32_s32): Likewise.
9626 (vreinterpretq_u32_s64): Likewise.
9627 (vreinterpretq_u32_s8): Likewise.
9628 (vreinterpretq_u32_u16): Likewise.
9629 (vreinterpretq_u32_u64): Likewise.
9630 (vreinterpretq_u32_u8): Likewise.
9631 (vreinterpretq_u64_s16): Likewise.
9632 (vreinterpretq_u64_s32): Likewise.
9633 (vreinterpretq_u64_s64): Likewise.
9634 (vreinterpretq_u64_s8): Likewise.
9635 (vreinterpretq_u64_u16): Likewise.
9636 (vreinterpretq_u64_u32): Likewise.
9637 (vreinterpretq_u64_u8): Likewise.
9638 (vreinterpretq_u8_s16): Likewise.
9639 (vreinterpretq_u8_s32): Likewise.
9640 (vreinterpretq_u8_s64): Likewise.
9641 (vreinterpretq_u8_s8): Likewise.
9642 (vreinterpretq_u8_u16): Likewise.
9643 (vreinterpretq_u8_u32): Likewise.
9644 (vreinterpretq_u8_u64): Likewise.
9645 (vreinterpretq_s32_f16): Likewise.
9646 (vreinterpretq_s32_f32): Likewise.
9647 (vreinterpretq_u16_f16): Likewise.
9648 (vreinterpretq_u16_f32): Likewise.
9649 (vreinterpretq_u32_f16): Likewise.
9650 (vreinterpretq_u32_f32): Likewise.
9651 (vreinterpretq_u64_f16): Likewise.
9652 (vreinterpretq_u64_f32): Likewise.
9653 (vreinterpretq_u8_f16): Likewise.
9654 (vreinterpretq_u8_f32): Likewise.
9655 (vreinterpretq_f16_f32): Likewise.
9656 (vreinterpretq_f16_s16): Likewise.
9657 (vreinterpretq_f16_s32): Likewise.
9658 (vreinterpretq_f16_s64): Likewise.
9659 (vreinterpretq_f16_s8): Likewise.
9660 (vreinterpretq_f16_u16): Likewise.
9661 (vreinterpretq_f16_u32): Likewise.
9662 (vreinterpretq_f16_u64): Likewise.
9663 (vreinterpretq_f16_u8): Likewise.
9664 (vreinterpretq_f32_f16): Likewise.
9665 (vreinterpretq_f32_s16): Likewise.
9666 (vreinterpretq_f32_s32): Likewise.
9667 (vreinterpretq_f32_s64): Likewise.
9668 (vreinterpretq_f32_s8): Likewise.
9669 (vreinterpretq_f32_u16): Likewise.
9670 (vreinterpretq_f32_u32): Likewise.
9671 (vreinterpretq_f32_u64): Likewise.
9672 (vreinterpretq_f32_u8): Likewise.
9673 (vreinterpretq_s16_f16): Likewise.
9674 (vreinterpretq_s16_f32): Likewise.
9675 (vreinterpretq_s64_f16): Likewise.
9676 (vreinterpretq_s64_f32): Likewise.
9677 (vreinterpretq_s8_f16): Likewise.
9678 (vreinterpretq_s8_f32): Likewise.
9679 (vuninitializedq_u8): Likewise.
9680 (vuninitializedq_u16): Likewise.
9681 (vuninitializedq_u32): Likewise.
9682 (vuninitializedq_u64): Likewise.
9683 (vuninitializedq_s8): Likewise.
9684 (vuninitializedq_s16): Likewise.
9685 (vuninitializedq_s32): Likewise.
9686 (vuninitializedq_s64): Likewise.
9687 (vuninitializedq_f16): Likewise.
9688 (vuninitializedq_f32): Likewise.
9689 (__arm_vuninitializedq_u8): Define intrinsic.
9690 (__arm_vuninitializedq_u16): Likewise.
9691 (__arm_vuninitializedq_u32): Likewise.
9692 (__arm_vuninitializedq_u64): Likewise.
9693 (__arm_vuninitializedq_s8): Likewise.
9694 (__arm_vuninitializedq_s16): Likewise.
9695 (__arm_vuninitializedq_s32): Likewise.
9696 (__arm_vuninitializedq_s64): Likewise.
9697 (__arm_vreinterpretq_s16_s32): Likewise.
9698 (__arm_vreinterpretq_s16_s64): Likewise.
9699 (__arm_vreinterpretq_s16_s8): Likewise.
9700 (__arm_vreinterpretq_s16_u16): Likewise.
9701 (__arm_vreinterpretq_s16_u32): Likewise.
9702 (__arm_vreinterpretq_s16_u64): Likewise.
9703 (__arm_vreinterpretq_s16_u8): Likewise.
9704 (__arm_vreinterpretq_s32_s16): Likewise.
9705 (__arm_vreinterpretq_s32_s64): Likewise.
9706 (__arm_vreinterpretq_s32_s8): Likewise.
9707 (__arm_vreinterpretq_s32_u16): Likewise.
9708 (__arm_vreinterpretq_s32_u32): Likewise.
9709 (__arm_vreinterpretq_s32_u64): Likewise.
9710 (__arm_vreinterpretq_s32_u8): Likewise.
9711 (__arm_vreinterpretq_s64_s16): Likewise.
9712 (__arm_vreinterpretq_s64_s32): Likewise.
9713 (__arm_vreinterpretq_s64_s8): Likewise.
9714 (__arm_vreinterpretq_s64_u16): Likewise.
9715 (__arm_vreinterpretq_s64_u32): Likewise.
9716 (__arm_vreinterpretq_s64_u64): Likewise.
9717 (__arm_vreinterpretq_s64_u8): Likewise.
9718 (__arm_vreinterpretq_s8_s16): Likewise.
9719 (__arm_vreinterpretq_s8_s32): Likewise.
9720 (__arm_vreinterpretq_s8_s64): Likewise.
9721 (__arm_vreinterpretq_s8_u16): Likewise.
9722 (__arm_vreinterpretq_s8_u32): Likewise.
9723 (__arm_vreinterpretq_s8_u64): Likewise.
9724 (__arm_vreinterpretq_s8_u8): Likewise.
9725 (__arm_vreinterpretq_u16_s16): Likewise.
9726 (__arm_vreinterpretq_u16_s32): Likewise.
9727 (__arm_vreinterpretq_u16_s64): Likewise.
9728 (__arm_vreinterpretq_u16_s8): Likewise.
9729 (__arm_vreinterpretq_u16_u32): Likewise.
9730 (__arm_vreinterpretq_u16_u64): Likewise.
9731 (__arm_vreinterpretq_u16_u8): Likewise.
9732 (__arm_vreinterpretq_u32_s16): Likewise.
9733 (__arm_vreinterpretq_u32_s32): Likewise.
9734 (__arm_vreinterpretq_u32_s64): Likewise.
9735 (__arm_vreinterpretq_u32_s8): Likewise.
9736 (__arm_vreinterpretq_u32_u16): Likewise.
9737 (__arm_vreinterpretq_u32_u64): Likewise.
9738 (__arm_vreinterpretq_u32_u8): Likewise.
9739 (__arm_vreinterpretq_u64_s16): Likewise.
9740 (__arm_vreinterpretq_u64_s32): Likewise.
9741 (__arm_vreinterpretq_u64_s64): Likewise.
9742 (__arm_vreinterpretq_u64_s8): Likewise.
9743 (__arm_vreinterpretq_u64_u16): Likewise.
9744 (__arm_vreinterpretq_u64_u32): Likewise.
9745 (__arm_vreinterpretq_u64_u8): Likewise.
9746 (__arm_vreinterpretq_u8_s16): Likewise.
9747 (__arm_vreinterpretq_u8_s32): Likewise.
9748 (__arm_vreinterpretq_u8_s64): Likewise.
9749 (__arm_vreinterpretq_u8_s8): Likewise.
9750 (__arm_vreinterpretq_u8_u16): Likewise.
9751 (__arm_vreinterpretq_u8_u32): Likewise.
9752 (__arm_vreinterpretq_u8_u64): Likewise.
9753 (__arm_vuninitializedq_f16): Likewise.
9754 (__arm_vuninitializedq_f32): Likewise.
9755 (__arm_vreinterpretq_s32_f16): Likewise.
9756 (__arm_vreinterpretq_s32_f32): Likewise.
9757 (__arm_vreinterpretq_s16_f16): Likewise.
9758 (__arm_vreinterpretq_s16_f32): Likewise.
9759 (__arm_vreinterpretq_s64_f16): Likewise.
9760 (__arm_vreinterpretq_s64_f32): Likewise.
9761 (__arm_vreinterpretq_s8_f16): Likewise.
9762 (__arm_vreinterpretq_s8_f32): Likewise.
9763 (__arm_vreinterpretq_u16_f16): Likewise.
9764 (__arm_vreinterpretq_u16_f32): Likewise.
9765 (__arm_vreinterpretq_u32_f16): Likewise.
9766 (__arm_vreinterpretq_u32_f32): Likewise.
9767 (__arm_vreinterpretq_u64_f16): Likewise.
9768 (__arm_vreinterpretq_u64_f32): Likewise.
9769 (__arm_vreinterpretq_u8_f16): Likewise.
9770 (__arm_vreinterpretq_u8_f32): Likewise.
9771 (__arm_vreinterpretq_f16_f32): Likewise.
9772 (__arm_vreinterpretq_f16_s16): Likewise.
9773 (__arm_vreinterpretq_f16_s32): Likewise.
9774 (__arm_vreinterpretq_f16_s64): Likewise.
9775 (__arm_vreinterpretq_f16_s8): Likewise.
9776 (__arm_vreinterpretq_f16_u16): Likewise.
9777 (__arm_vreinterpretq_f16_u32): Likewise.
9778 (__arm_vreinterpretq_f16_u64): Likewise.
9779 (__arm_vreinterpretq_f16_u8): Likewise.
9780 (__arm_vreinterpretq_f32_f16): Likewise.
9781 (__arm_vreinterpretq_f32_s16): Likewise.
9782 (__arm_vreinterpretq_f32_s32): Likewise.
9783 (__arm_vreinterpretq_f32_s64): Likewise.
9784 (__arm_vreinterpretq_f32_s8): Likewise.
9785 (__arm_vreinterpretq_f32_u16): Likewise.
9786 (__arm_vreinterpretq_f32_u32): Likewise.
9787 (__arm_vreinterpretq_f32_u64): Likewise.
9788 (__arm_vreinterpretq_f32_u8): Likewise.
9789 (vuninitializedq): Define polymorphic variant.
9790 (vreinterpretq_f16): Likewise.
9791 (vreinterpretq_f32): Likewise.
9792 (vreinterpretq_s16): Likewise.
9793 (vreinterpretq_s32): Likewise.
9794 (vreinterpretq_s64): Likewise.
9795 (vreinterpretq_s8): Likewise.
9796 (vreinterpretq_u16): Likewise.
9797 (vreinterpretq_u32): Likewise.
9798 (vreinterpretq_u64): Likewise.
9799 (vreinterpretq_u8): Likewise.
9801 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9802 Andre Vieira <andre.simoesdiasvieira@arm.com>
9803 Mihail Ionescu <mihail.ionescu@arm.com>
9805 * config/arm/arm_mve.h (vaddq_s8): Define macro.
9806 (vaddq_s16): Likewise.
9807 (vaddq_s32): Likewise.
9808 (vaddq_u8): Likewise.
9809 (vaddq_u16): Likewise.
9810 (vaddq_u32): Likewise.
9811 (vaddq_f16): Likewise.
9812 (vaddq_f32): Likewise.
9813 (__arm_vaddq_s8): Define intrinsic.
9814 (__arm_vaddq_s16): Likewise.
9815 (__arm_vaddq_s32): Likewise.
9816 (__arm_vaddq_u8): Likewise.
9817 (__arm_vaddq_u16): Likewise.
9818 (__arm_vaddq_u32): Likewise.
9819 (__arm_vaddq_f16): Likewise.
9820 (__arm_vaddq_f32): Likewise.
9821 (vaddq): Define polymorphic variant.
9822 * config/arm/iterators.md (VNIM): Define mode iterator for common types
9823 Neon, IWMMXT and MVE.
9824 (VNINOTM): Likewise.
9825 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
9826 (mve_vaddq_f<mode>): Define RTL pattern.
9827 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
9828 (addv8hf3_neon): Define RTL pattern.
9829 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
9831 (addv8hf3): Define standard RTL pattern for MVE and Neon.
9832 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
9834 2020-03-20 Martin Liska <mliska@suse.cz>
9837 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
9838 build_ref_for_offset function was used and it transforms off to bytes
9841 2020-03-20 Richard Biener <rguenther@suse.de>
9843 PR tree-optimization/94266
9844 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
9845 type of the underlying object to adjust for the containing
9848 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
9850 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
9851 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
9852 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
9854 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
9856 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
9858 2020-03-20 Jakub Jelinek <jakub@redhat.com>
9860 PR tree-optimization/94224
9861 * gimple-ssa-store-merging.c
9862 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
9863 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
9866 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
9868 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
9870 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
9873 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
9874 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
9876 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
9879 * cgraphunit.c (process_function_and_variable_attributes): warn
9880 for flatten attribute on alias.
9881 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
9883 2020-03-19 Martin Liska <mliska@suse.cz>
9885 * lto-section-in.c: Add ext_symtab.
9886 * lto-streamer-out.c (write_symbol_extension_info): New.
9887 (produce_symtab_extension): New.
9888 (produce_asm_for_decls): Stream also produce_symtab_extension.
9889 * lto-streamer.h (enum lto_section_type): New section.
9891 2020-03-19 Jakub Jelinek <jakub@redhat.com>
9893 PR tree-optimization/94211
9894 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
9895 instead of estimate_num_insns for bb_seq (middle_bb). Rename
9896 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
9899 2020-03-19 Richard Biener <rguenther@suse.de>
9902 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
9903 and build_ref_for_offset.
9905 2020-03-19 Richard Biener <rguenther@suse.de>
9908 * fold-const.c (fold_binary_loc): Avoid using
9909 build_fold_addr_expr when we really want an ADDR_EXPR.
9911 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
9913 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
9916 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
9918 PR rtl-optimization/90275
9919 * cse.c (cse_insn): Delete no-op register moves too.
9921 2020-03-18 Martin Sebor <msebor@redhat.com>
9924 * cgraphunit.c (process_function_and_variable_attributes): Also
9925 complain about weakref function definitions and drop all effects
9928 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9929 Mihail Ionescu <mihail.ionescu@arm.com>
9930 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9932 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
9933 (vstrdq_scatter_base_p_u64): Likewise.
9934 (vstrdq_scatter_base_s64): Likewise.
9935 (vstrdq_scatter_base_u64): Likewise.
9936 (vstrdq_scatter_offset_p_s64): Likewise.
9937 (vstrdq_scatter_offset_p_u64): Likewise.
9938 (vstrdq_scatter_offset_s64): Likewise.
9939 (vstrdq_scatter_offset_u64): Likewise.
9940 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
9941 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
9942 (vstrdq_scatter_shifted_offset_s64): Likewise.
9943 (vstrdq_scatter_shifted_offset_u64): Likewise.
9944 (vstrhq_scatter_offset_f16): Likewise.
9945 (vstrhq_scatter_offset_p_f16): Likewise.
9946 (vstrhq_scatter_shifted_offset_f16): Likewise.
9947 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
9948 (vstrwq_scatter_base_f32): Likewise.
9949 (vstrwq_scatter_base_p_f32): Likewise.
9950 (vstrwq_scatter_offset_f32): Likewise.
9951 (vstrwq_scatter_offset_p_f32): Likewise.
9952 (vstrwq_scatter_offset_p_s32): Likewise.
9953 (vstrwq_scatter_offset_p_u32): Likewise.
9954 (vstrwq_scatter_offset_s32): Likewise.
9955 (vstrwq_scatter_offset_u32): Likewise.
9956 (vstrwq_scatter_shifted_offset_f32): Likewise.
9957 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
9958 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
9959 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
9960 (vstrwq_scatter_shifted_offset_s32): Likewise.
9961 (vstrwq_scatter_shifted_offset_u32): Likewise.
9962 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
9963 (__arm_vstrdq_scatter_base_p_u64): Likewise.
9964 (__arm_vstrdq_scatter_base_s64): Likewise.
9965 (__arm_vstrdq_scatter_base_u64): Likewise.
9966 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
9967 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
9968 (__arm_vstrdq_scatter_offset_s64): Likewise.
9969 (__arm_vstrdq_scatter_offset_u64): Likewise.
9970 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
9971 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
9972 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
9973 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
9974 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
9975 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
9976 (__arm_vstrwq_scatter_offset_s32): Likewise.
9977 (__arm_vstrwq_scatter_offset_u32): Likewise.
9978 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
9979 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
9980 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
9981 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
9982 (__arm_vstrhq_scatter_offset_f16): Likewise.
9983 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
9984 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
9985 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
9986 (__arm_vstrwq_scatter_base_f32): Likewise.
9987 (__arm_vstrwq_scatter_base_p_f32): Likewise.
9988 (__arm_vstrwq_scatter_offset_f32): Likewise.
9989 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
9990 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
9991 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
9992 (vstrhq_scatter_offset): Define polymorphic variant.
9993 (vstrhq_scatter_offset_p): Likewise.
9994 (vstrhq_scatter_shifted_offset): Likewise.
9995 (vstrhq_scatter_shifted_offset_p): Likewise.
9996 (vstrwq_scatter_base): Likewise.
9997 (vstrwq_scatter_base_p): Likewise.
9998 (vstrwq_scatter_offset): Likewise.
9999 (vstrwq_scatter_offset_p): Likewise.
10000 (vstrwq_scatter_shifted_offset): Likewise.
10001 (vstrwq_scatter_shifted_offset_p): Likewise.
10002 (vstrdq_scatter_base_p): Likewise.
10003 (vstrdq_scatter_base): Likewise.
10004 (vstrdq_scatter_offset_p): Likewise.
10005 (vstrdq_scatter_offset): Likewise.
10006 (vstrdq_scatter_shifted_offset_p): Likewise.
10007 (vstrdq_scatter_shifted_offset): Likewise.
10008 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
10009 (STRSBS_P): Likewise.
10010 (STRSBU): Likewise.
10011 (STRSBU_P): Likewise.
10013 (STRSS_P): Likewise.
10015 (STRSU_P): Likewise.
10016 * config/arm/constraints.md (Ri): Define.
10017 * config/arm/mve.md (VSTRDSBQ): Define iterator.
10018 (VSTRDSOQ): Likewise.
10019 (VSTRDSSOQ): Likewise.
10020 (VSTRWSOQ): Likewise.
10021 (VSTRWSSOQ): Likewise.
10022 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
10023 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
10024 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
10025 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
10026 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
10027 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
10028 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
10029 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
10030 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
10031 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
10032 (mve_vstrwq_scatter_base_fv4sf): Likewise.
10033 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
10034 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
10035 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
10036 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
10037 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
10038 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
10039 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
10040 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
10041 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
10042 * config/arm/predicates.md (Ri): Define predicate to check immediate
10043 is the range +/-1016 and multiple of 8.
10045 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10046 Mihail Ionescu <mihail.ionescu@arm.com>
10047 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10049 * config/arm/arm_mve.h (vst1q_f32): Define macro.
10050 (vst1q_f16): Likewise.
10051 (vst1q_s8): Likewise.
10052 (vst1q_s32): Likewise.
10053 (vst1q_s16): Likewise.
10054 (vst1q_u8): Likewise.
10055 (vst1q_u32): Likewise.
10056 (vst1q_u16): Likewise.
10057 (vstrhq_f16): Likewise.
10058 (vstrhq_scatter_offset_s32): Likewise.
10059 (vstrhq_scatter_offset_s16): Likewise.
10060 (vstrhq_scatter_offset_u32): Likewise.
10061 (vstrhq_scatter_offset_u16): Likewise.
10062 (vstrhq_scatter_offset_p_s32): Likewise.
10063 (vstrhq_scatter_offset_p_s16): Likewise.
10064 (vstrhq_scatter_offset_p_u32): Likewise.
10065 (vstrhq_scatter_offset_p_u16): Likewise.
10066 (vstrhq_scatter_shifted_offset_s32): Likewise.
10067 (vstrhq_scatter_shifted_offset_s16): Likewise.
10068 (vstrhq_scatter_shifted_offset_u32): Likewise.
10069 (vstrhq_scatter_shifted_offset_u16): Likewise.
10070 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
10071 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
10072 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
10073 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
10074 (vstrhq_s32): Likewise.
10075 (vstrhq_s16): Likewise.
10076 (vstrhq_u32): Likewise.
10077 (vstrhq_u16): Likewise.
10078 (vstrhq_p_f16): Likewise.
10079 (vstrhq_p_s32): Likewise.
10080 (vstrhq_p_s16): Likewise.
10081 (vstrhq_p_u32): Likewise.
10082 (vstrhq_p_u16): Likewise.
10083 (vstrwq_f32): Likewise.
10084 (vstrwq_s32): Likewise.
10085 (vstrwq_u32): Likewise.
10086 (vstrwq_p_f32): Likewise.
10087 (vstrwq_p_s32): Likewise.
10088 (vstrwq_p_u32): Likewise.
10089 (__arm_vst1q_s8): Define intrinsic.
10090 (__arm_vst1q_s32): Likewise.
10091 (__arm_vst1q_s16): Likewise.
10092 (__arm_vst1q_u8): Likewise.
10093 (__arm_vst1q_u32): Likewise.
10094 (__arm_vst1q_u16): Likewise.
10095 (__arm_vstrhq_scatter_offset_s32): Likewise.
10096 (__arm_vstrhq_scatter_offset_s16): Likewise.
10097 (__arm_vstrhq_scatter_offset_u32): Likewise.
10098 (__arm_vstrhq_scatter_offset_u16): Likewise.
10099 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
10100 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
10101 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
10102 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
10103 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
10104 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
10105 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
10106 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
10107 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
10108 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
10109 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
10110 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
10111 (__arm_vstrhq_s32): Likewise.
10112 (__arm_vstrhq_s16): Likewise.
10113 (__arm_vstrhq_u32): Likewise.
10114 (__arm_vstrhq_u16): Likewise.
10115 (__arm_vstrhq_p_s32): Likewise.
10116 (__arm_vstrhq_p_s16): Likewise.
10117 (__arm_vstrhq_p_u32): Likewise.
10118 (__arm_vstrhq_p_u16): Likewise.
10119 (__arm_vstrwq_s32): Likewise.
10120 (__arm_vstrwq_u32): Likewise.
10121 (__arm_vstrwq_p_s32): Likewise.
10122 (__arm_vstrwq_p_u32): Likewise.
10123 (__arm_vstrwq_p_f32): Likewise.
10124 (__arm_vstrwq_f32): Likewise.
10125 (__arm_vst1q_f32): Likewise.
10126 (__arm_vst1q_f16): Likewise.
10127 (__arm_vstrhq_f16): Likewise.
10128 (__arm_vstrhq_p_f16): Likewise.
10129 (vst1q): Define polymorphic variant.
10130 (vstrhq): Likewise.
10131 (vstrhq_p): Likewise.
10132 (vstrhq_scatter_offset_p): Likewise.
10133 (vstrhq_scatter_offset): Likewise.
10134 (vstrhq_scatter_shifted_offset_p): Likewise.
10135 (vstrhq_scatter_shifted_offset): Likewise.
10136 (vstrwq_p): Likewise.
10137 (vstrwq): Likewise.
10138 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
10139 (STRS_P): Likewise.
10141 (STRSS_P): Likewise.
10143 (STRSU_P): Likewise.
10145 (STRU_P): Likewise.
10146 * config/arm/mve.md (VST1Q): Define iterator.
10147 (VSTRHSOQ): Likewise.
10148 (VSTRHSSOQ): Likewise.
10149 (VSTRHQ): Likewise.
10150 (VSTRWQ): Likewise.
10151 (mve_vstrhq_fv8hf): Define RTL pattern.
10152 (mve_vstrhq_p_fv8hf): Likewise.
10153 (mve_vstrhq_p_<supf><mode>): Likewise.
10154 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
10155 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
10156 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
10157 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
10158 (mve_vstrhq_<supf><mode>): Likewise.
10159 (mve_vstrwq_fv4sf): Likewise.
10160 (mve_vstrwq_p_fv4sf): Likewise.
10161 (mve_vstrwq_p_<supf>v4si): Likewise.
10162 (mve_vstrwq_<supf>v4si): Likewise.
10163 (mve_vst1q_f<mode>): Define expand.
10164 (mve_vst1q_<supf><mode>): Likewise.
10166 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10167 Mihail Ionescu <mihail.ionescu@arm.com>
10168 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10170 * config/arm/arm_mve.h (vld1q_s8): Define macro.
10171 (vld1q_s32): Likewise.
10172 (vld1q_s16): Likewise.
10173 (vld1q_u8): Likewise.
10174 (vld1q_u32): Likewise.
10175 (vld1q_u16): Likewise.
10176 (vldrhq_gather_offset_s32): Likewise.
10177 (vldrhq_gather_offset_s16): Likewise.
10178 (vldrhq_gather_offset_u32): Likewise.
10179 (vldrhq_gather_offset_u16): Likewise.
10180 (vldrhq_gather_offset_z_s32): Likewise.
10181 (vldrhq_gather_offset_z_s16): Likewise.
10182 (vldrhq_gather_offset_z_u32): Likewise.
10183 (vldrhq_gather_offset_z_u16): Likewise.
10184 (vldrhq_gather_shifted_offset_s32): Likewise.
10185 (vldrhq_gather_shifted_offset_s16): Likewise.
10186 (vldrhq_gather_shifted_offset_u32): Likewise.
10187 (vldrhq_gather_shifted_offset_u16): Likewise.
10188 (vldrhq_gather_shifted_offset_z_s32): Likewise.
10189 (vldrhq_gather_shifted_offset_z_s16): Likewise.
10190 (vldrhq_gather_shifted_offset_z_u32): Likewise.
10191 (vldrhq_gather_shifted_offset_z_u16): Likewise.
10192 (vldrhq_s32): Likewise.
10193 (vldrhq_s16): Likewise.
10194 (vldrhq_u32): Likewise.
10195 (vldrhq_u16): Likewise.
10196 (vldrhq_z_s32): Likewise.
10197 (vldrhq_z_s16): Likewise.
10198 (vldrhq_z_u32): Likewise.
10199 (vldrhq_z_u16): Likewise.
10200 (vldrwq_s32): Likewise.
10201 (vldrwq_u32): Likewise.
10202 (vldrwq_z_s32): Likewise.
10203 (vldrwq_z_u32): Likewise.
10204 (vld1q_f32): Likewise.
10205 (vld1q_f16): Likewise.
10206 (vldrhq_f16): Likewise.
10207 (vldrhq_z_f16): Likewise.
10208 (vldrwq_f32): Likewise.
10209 (vldrwq_z_f32): Likewise.
10210 (__arm_vld1q_s8): Define intrinsic.
10211 (__arm_vld1q_s32): Likewise.
10212 (__arm_vld1q_s16): Likewise.
10213 (__arm_vld1q_u8): Likewise.
10214 (__arm_vld1q_u32): Likewise.
10215 (__arm_vld1q_u16): Likewise.
10216 (__arm_vldrhq_gather_offset_s32): Likewise.
10217 (__arm_vldrhq_gather_offset_s16): Likewise.
10218 (__arm_vldrhq_gather_offset_u32): Likewise.
10219 (__arm_vldrhq_gather_offset_u16): Likewise.
10220 (__arm_vldrhq_gather_offset_z_s32): Likewise.
10221 (__arm_vldrhq_gather_offset_z_s16): Likewise.
10222 (__arm_vldrhq_gather_offset_z_u32): Likewise.
10223 (__arm_vldrhq_gather_offset_z_u16): Likewise.
10224 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
10225 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
10226 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
10227 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
10228 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
10229 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
10230 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
10231 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
10232 (__arm_vldrhq_s32): Likewise.
10233 (__arm_vldrhq_s16): Likewise.
10234 (__arm_vldrhq_u32): Likewise.
10235 (__arm_vldrhq_u16): Likewise.
10236 (__arm_vldrhq_z_s32): Likewise.
10237 (__arm_vldrhq_z_s16): Likewise.
10238 (__arm_vldrhq_z_u32): Likewise.
10239 (__arm_vldrhq_z_u16): Likewise.
10240 (__arm_vldrwq_s32): Likewise.
10241 (__arm_vldrwq_u32): Likewise.
10242 (__arm_vldrwq_z_s32): Likewise.
10243 (__arm_vldrwq_z_u32): Likewise.
10244 (__arm_vld1q_f32): Likewise.
10245 (__arm_vld1q_f16): Likewise.
10246 (__arm_vldrwq_f32): Likewise.
10247 (__arm_vldrwq_z_f32): Likewise.
10248 (__arm_vldrhq_z_f16): Likewise.
10249 (__arm_vldrhq_f16): Likewise.
10250 (vld1q): Define polymorphic variant.
10251 (vldrhq_gather_offset): Likewise.
10252 (vldrhq_gather_offset_z): Likewise.
10253 (vldrhq_gather_shifted_offset): Likewise.
10254 (vldrhq_gather_shifted_offset_z): Likewise.
10255 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
10257 (LDRU_Z): Likewise.
10258 (LDRS_Z): Likewise.
10259 (LDRGU_Z): Likewise.
10261 (LDRGS_Z): Likewise.
10263 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
10264 (V_sz_elem1): Likewise.
10265 (VLD1Q): Define iterator.
10266 (VLDRHGOQ): Likewise.
10267 (VLDRHGSOQ): Likewise.
10268 (VLDRHQ): Likewise.
10269 (VLDRWQ): Likewise.
10270 (mve_vldrhq_fv8hf): Define RTL pattern.
10271 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
10272 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
10273 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
10274 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
10275 (mve_vldrhq_<supf><mode>): Likewise.
10276 (mve_vldrhq_z_fv8hf): Likewise.
10277 (mve_vldrhq_z_<supf><mode>): Likewise.
10278 (mve_vldrwq_fv4sf): Likewise.
10279 (mve_vldrwq_<supf>v4si): Likewise.
10280 (mve_vldrwq_z_fv4sf): Likewise.
10281 (mve_vldrwq_z_<supf>v4si): Likewise.
10282 (mve_vld1q_f<mode>): Define RTL expand pattern.
10283 (mve_vld1q_<supf><mode>): Likewise.
10285 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10286 Mihail Ionescu <mihail.ionescu@arm.com>
10287 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10289 * config/arm/arm_mve.h (vld1q_s8): Define macro.
10290 (vld1q_s32): Likewise.
10291 (vld1q_s16): Likewise.
10292 (vld1q_u8): Likewise.
10293 (vld1q_u32): Likewise.
10294 (vld1q_u16): Likewise.
10295 (vldrhq_gather_offset_s32): Likewise.
10296 (vldrhq_gather_offset_s16): Likewise.
10297 (vldrhq_gather_offset_u32): Likewise.
10298 (vldrhq_gather_offset_u16): Likewise.
10299 (vldrhq_gather_offset_z_s32): Likewise.
10300 (vldrhq_gather_offset_z_s16): Likewise.
10301 (vldrhq_gather_offset_z_u32): Likewise.
10302 (vldrhq_gather_offset_z_u16): Likewise.
10303 (vldrhq_gather_shifted_offset_s32): Likewise.
10304 (vldrhq_gather_shifted_offset_s16): Likewise.
10305 (vldrhq_gather_shifted_offset_u32): Likewise.
10306 (vldrhq_gather_shifted_offset_u16): Likewise.
10307 (vldrhq_gather_shifted_offset_z_s32): Likewise.
10308 (vldrhq_gather_shifted_offset_z_s16): Likewise.
10309 (vldrhq_gather_shifted_offset_z_u32): Likewise.
10310 (vldrhq_gather_shifted_offset_z_u16): Likewise.
10311 (vldrhq_s32): Likewise.
10312 (vldrhq_s16): Likewise.
10313 (vldrhq_u32): Likewise.
10314 (vldrhq_u16): Likewise.
10315 (vldrhq_z_s32): Likewise.
10316 (vldrhq_z_s16): Likewise.
10317 (vldrhq_z_u32): Likewise.
10318 (vldrhq_z_u16): Likewise.
10319 (vldrwq_s32): Likewise.
10320 (vldrwq_u32): Likewise.
10321 (vldrwq_z_s32): Likewise.
10322 (vldrwq_z_u32): Likewise.
10323 (vld1q_f32): Likewise.
10324 (vld1q_f16): Likewise.
10325 (vldrhq_f16): Likewise.
10326 (vldrhq_z_f16): Likewise.
10327 (vldrwq_f32): Likewise.
10328 (vldrwq_z_f32): Likewise.
10329 (__arm_vld1q_s8): Define intrinsic.
10330 (__arm_vld1q_s32): Likewise.
10331 (__arm_vld1q_s16): Likewise.
10332 (__arm_vld1q_u8): Likewise.
10333 (__arm_vld1q_u32): Likewise.
10334 (__arm_vld1q_u16): Likewise.
10335 (__arm_vldrhq_gather_offset_s32): Likewise.
10336 (__arm_vldrhq_gather_offset_s16): Likewise.
10337 (__arm_vldrhq_gather_offset_u32): Likewise.
10338 (__arm_vldrhq_gather_offset_u16): Likewise.
10339 (__arm_vldrhq_gather_offset_z_s32): Likewise.
10340 (__arm_vldrhq_gather_offset_z_s16): Likewise.
10341 (__arm_vldrhq_gather_offset_z_u32): Likewise.
10342 (__arm_vldrhq_gather_offset_z_u16): Likewise.
10343 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
10344 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
10345 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
10346 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
10347 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
10348 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
10349 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
10350 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
10351 (__arm_vldrhq_s32): Likewise.
10352 (__arm_vldrhq_s16): Likewise.
10353 (__arm_vldrhq_u32): Likewise.
10354 (__arm_vldrhq_u16): Likewise.
10355 (__arm_vldrhq_z_s32): Likewise.
10356 (__arm_vldrhq_z_s16): Likewise.
10357 (__arm_vldrhq_z_u32): Likewise.
10358 (__arm_vldrhq_z_u16): Likewise.
10359 (__arm_vldrwq_s32): Likewise.
10360 (__arm_vldrwq_u32): Likewise.
10361 (__arm_vldrwq_z_s32): Likewise.
10362 (__arm_vldrwq_z_u32): Likewise.
10363 (__arm_vld1q_f32): Likewise.
10364 (__arm_vld1q_f16): Likewise.
10365 (__arm_vldrwq_f32): Likewise.
10366 (__arm_vldrwq_z_f32): Likewise.
10367 (__arm_vldrhq_z_f16): Likewise.
10368 (__arm_vldrhq_f16): Likewise.
10369 (vld1q): Define polymorphic variant.
10370 (vldrhq_gather_offset): Likewise.
10371 (vldrhq_gather_offset_z): Likewise.
10372 (vldrhq_gather_shifted_offset): Likewise.
10373 (vldrhq_gather_shifted_offset_z): Likewise.
10374 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
10376 (LDRU_Z): Likewise.
10377 (LDRS_Z): Likewise.
10378 (LDRGU_Z): Likewise.
10380 (LDRGS_Z): Likewise.
10382 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
10383 (V_sz_elem1): Likewise.
10384 (VLD1Q): Define iterator.
10385 (VLDRHGOQ): Likewise.
10386 (VLDRHGSOQ): Likewise.
10387 (VLDRHQ): Likewise.
10388 (VLDRWQ): Likewise.
10389 (mve_vldrhq_fv8hf): Define RTL pattern.
10390 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
10391 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
10392 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
10393 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
10394 (mve_vldrhq_<supf><mode>): Likewise.
10395 (mve_vldrhq_z_fv8hf): Likewise.
10396 (mve_vldrhq_z_<supf><mode>): Likewise.
10397 (mve_vldrwq_fv4sf): Likewise.
10398 (mve_vldrwq_<supf>v4si): Likewise.
10399 (mve_vldrwq_z_fv4sf): Likewise.
10400 (mve_vldrwq_z_<supf>v4si): Likewise.
10401 (mve_vld1q_f<mode>): Define RTL expand pattern.
10402 (mve_vld1q_<supf><mode>): Likewise.
10404 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10405 Mihail Ionescu <mihail.ionescu@arm.com>
10406 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10408 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
10410 (LDRGBU_Z_QUALIFIERS): Likewise.
10411 (LDRGS_Z_QUALIFIERS): Likewise.
10412 (LDRGU_Z_QUALIFIERS): Likewise.
10413 (LDRS_Z_QUALIFIERS): Likewise.
10414 (LDRU_Z_QUALIFIERS): Likewise.
10415 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
10416 (vldrbq_gather_offset_z_u8): Likewise.
10417 (vldrbq_gather_offset_z_s32): Likewise.
10418 (vldrbq_gather_offset_z_u16): Likewise.
10419 (vldrbq_gather_offset_z_u32): Likewise.
10420 (vldrbq_gather_offset_z_s8): Likewise.
10421 (vldrbq_z_s16): Likewise.
10422 (vldrbq_z_u8): Likewise.
10423 (vldrbq_z_s8): Likewise.
10424 (vldrbq_z_s32): Likewise.
10425 (vldrbq_z_u16): Likewise.
10426 (vldrbq_z_u32): Likewise.
10427 (vldrwq_gather_base_z_u32): Likewise.
10428 (vldrwq_gather_base_z_s32): Likewise.
10429 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
10430 (__arm_vldrbq_gather_offset_z_s32): Likewise.
10431 (__arm_vldrbq_gather_offset_z_s16): Likewise.
10432 (__arm_vldrbq_gather_offset_z_u8): Likewise.
10433 (__arm_vldrbq_gather_offset_z_u32): Likewise.
10434 (__arm_vldrbq_gather_offset_z_u16): Likewise.
10435 (__arm_vldrbq_z_s8): Likewise.
10436 (__arm_vldrbq_z_s32): Likewise.
10437 (__arm_vldrbq_z_s16): Likewise.
10438 (__arm_vldrbq_z_u8): Likewise.
10439 (__arm_vldrbq_z_u32): Likewise.
10440 (__arm_vldrbq_z_u16): Likewise.
10441 (__arm_vldrwq_gather_base_z_s32): Likewise.
10442 (__arm_vldrwq_gather_base_z_u32): Likewise.
10443 (vldrbq_gather_offset_z): Define polymorphic variant.
10444 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
10446 (LDRGBU_Z_QUALIFIERS): Likewise.
10447 (LDRGS_Z_QUALIFIERS): Likewise.
10448 (LDRGU_Z_QUALIFIERS): Likewise.
10449 (LDRS_Z_QUALIFIERS): Likewise.
10450 (LDRU_Z_QUALIFIERS): Likewise.
10451 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
10453 (mve_vldrbq_z_<supf><mode>): Likewise.
10454 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
10456 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10457 Mihail Ionescu <mihail.ionescu@arm.com>
10458 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10460 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
10462 (STRU_P_QUALIFIERS): Likewise.
10463 (STRSU_P_QUALIFIERS): Likewise.
10464 (STRSS_P_QUALIFIERS): Likewise.
10465 (STRSBS_P_QUALIFIERS): Likewise.
10466 (STRSBU_P_QUALIFIERS): Likewise.
10467 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
10468 (vstrbq_p_s32): Likewise.
10469 (vstrbq_p_s16): Likewise.
10470 (vstrbq_p_u8): Likewise.
10471 (vstrbq_p_u32): Likewise.
10472 (vstrbq_p_u16): Likewise.
10473 (vstrbq_scatter_offset_p_s8): Likewise.
10474 (vstrbq_scatter_offset_p_s32): Likewise.
10475 (vstrbq_scatter_offset_p_s16): Likewise.
10476 (vstrbq_scatter_offset_p_u8): Likewise.
10477 (vstrbq_scatter_offset_p_u32): Likewise.
10478 (vstrbq_scatter_offset_p_u16): Likewise.
10479 (vstrwq_scatter_base_p_s32): Likewise.
10480 (vstrwq_scatter_base_p_u32): Likewise.
10481 (__arm_vstrbq_p_s8): Define intrinsic.
10482 (__arm_vstrbq_p_s32): Likewise.
10483 (__arm_vstrbq_p_s16): Likewise.
10484 (__arm_vstrbq_p_u8): Likewise.
10485 (__arm_vstrbq_p_u32): Likewise.
10486 (__arm_vstrbq_p_u16): Likewise.
10487 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
10488 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
10489 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
10490 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
10491 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
10492 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
10493 (__arm_vstrwq_scatter_base_p_s32): Likewise.
10494 (__arm_vstrwq_scatter_base_p_u32): Likewise.
10495 (vstrbq_p): Define polymorphic variant.
10496 (vstrbq_scatter_offset_p): Likewise.
10497 (vstrwq_scatter_base_p): Likewise.
10498 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
10500 (STRU_P_QUALIFIERS): Likewise.
10501 (STRSU_P_QUALIFIERS): Likewise.
10502 (STRSS_P_QUALIFIERS): Likewise.
10503 (STRSBS_P_QUALIFIERS): Likewise.
10504 (STRSBU_P_QUALIFIERS): Likewise.
10505 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
10507 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
10508 (mve_vstrbq_p_<supf><mode>): Likewise.
10510 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10511 Mihail Ionescu <mihail.ionescu@arm.com>
10512 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10514 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
10516 (LDRGS_QUALIFIERS): Likewise.
10517 (LDRS_QUALIFIERS): Likewise.
10518 (LDRU_QUALIFIERS): Likewise.
10519 (LDRGBS_QUALIFIERS): Likewise.
10520 (LDRGBU_QUALIFIERS): Likewise.
10521 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
10522 (vldrbq_gather_offset_s8): Likewise.
10523 (vldrbq_s8): Likewise.
10524 (vldrbq_u8): Likewise.
10525 (vldrbq_gather_offset_u16): Likewise.
10526 (vldrbq_gather_offset_s16): Likewise.
10527 (vldrbq_s16): Likewise.
10528 (vldrbq_u16): Likewise.
10529 (vldrbq_gather_offset_u32): Likewise.
10530 (vldrbq_gather_offset_s32): Likewise.
10531 (vldrbq_s32): Likewise.
10532 (vldrbq_u32): Likewise.
10533 (vldrwq_gather_base_s32): Likewise.
10534 (vldrwq_gather_base_u32): Likewise.
10535 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
10536 (__arm_vldrbq_gather_offset_s8): Likewise.
10537 (__arm_vldrbq_s8): Likewise.
10538 (__arm_vldrbq_u8): Likewise.
10539 (__arm_vldrbq_gather_offset_u16): Likewise.
10540 (__arm_vldrbq_gather_offset_s16): Likewise.
10541 (__arm_vldrbq_s16): Likewise.
10542 (__arm_vldrbq_u16): Likewise.
10543 (__arm_vldrbq_gather_offset_u32): Likewise.
10544 (__arm_vldrbq_gather_offset_s32): Likewise.
10545 (__arm_vldrbq_s32): Likewise.
10546 (__arm_vldrbq_u32): Likewise.
10547 (__arm_vldrwq_gather_base_s32): Likewise.
10548 (__arm_vldrwq_gather_base_u32): Likewise.
10549 (vldrbq_gather_offset): Define polymorphic variant.
10550 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
10552 (LDRGS_QUALIFIERS): Likewise.
10553 (LDRS_QUALIFIERS): Likewise.
10554 (LDRU_QUALIFIERS): Likewise.
10555 (LDRGBS_QUALIFIERS): Likewise.
10556 (LDRGBU_QUALIFIERS): Likewise.
10557 * config/arm/mve.md (VLDRBGOQ): Define iterator.
10558 (VLDRBQ): Likewise.
10559 (VLDRWGBQ): Likewise.
10560 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
10561 (mve_vldrbq_<supf><mode>): Likewise.
10562 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
10564 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10565 Mihail Ionescu <mihail.ionescu@arm.com>
10566 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10568 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
10569 (STRU_QUALIFIERS): Likewise.
10570 (STRSS_QUALIFIERS): Likewise.
10571 (STRSU_QUALIFIERS): Likewise.
10572 (STRSBS_QUALIFIERS): Likewise.
10573 (STRSBU_QUALIFIERS): Likewise.
10574 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
10575 (vstrbq_u8): Likewise.
10576 (vstrbq_u16): Likewise.
10577 (vstrbq_scatter_offset_s8): Likewise.
10578 (vstrbq_scatter_offset_u8): Likewise.
10579 (vstrbq_scatter_offset_u16): Likewise.
10580 (vstrbq_s16): Likewise.
10581 (vstrbq_u32): Likewise.
10582 (vstrbq_scatter_offset_s16): Likewise.
10583 (vstrbq_scatter_offset_u32): Likewise.
10584 (vstrbq_s32): Likewise.
10585 (vstrbq_scatter_offset_s32): Likewise.
10586 (vstrwq_scatter_base_s32): Likewise.
10587 (vstrwq_scatter_base_u32): Likewise.
10588 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
10589 (__arm_vstrbq_scatter_offset_s32): Likewise.
10590 (__arm_vstrbq_scatter_offset_s16): Likewise.
10591 (__arm_vstrbq_scatter_offset_u8): Likewise.
10592 (__arm_vstrbq_scatter_offset_u32): Likewise.
10593 (__arm_vstrbq_scatter_offset_u16): Likewise.
10594 (__arm_vstrbq_s8): Likewise.
10595 (__arm_vstrbq_s32): Likewise.
10596 (__arm_vstrbq_s16): Likewise.
10597 (__arm_vstrbq_u8): Likewise.
10598 (__arm_vstrbq_u32): Likewise.
10599 (__arm_vstrbq_u16): Likewise.
10600 (__arm_vstrwq_scatter_base_s32): Likewise.
10601 (__arm_vstrwq_scatter_base_u32): Likewise.
10602 (vstrbq): Define polymorphic variant.
10603 (vstrbq_scatter_offset): Likewise.
10604 (vstrwq_scatter_base): Likewise.
10605 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
10607 (STRU_QUALIFIERS): Likewise.
10608 (STRSS_QUALIFIERS): Likewise.
10609 (STRSU_QUALIFIERS): Likewise.
10610 (STRSBS_QUALIFIERS): Likewise.
10611 (STRSBU_QUALIFIERS): Likewise.
10612 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
10613 (VSTRWSBQ): Define iterators.
10614 (VSTRBSOQ): Likewise.
10615 (VSTRBQ): Likewise.
10616 (mve_vstrbq_<supf><mode>): Define RTL pattern.
10617 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
10618 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
10620 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10621 Mihail Ionescu <mihail.ionescu@arm.com>
10622 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10624 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
10625 (vabdq_m_f16): Likewise.
10626 (vaddq_m_f32): Likewise.
10627 (vaddq_m_f16): Likewise.
10628 (vaddq_m_n_f32): Likewise.
10629 (vaddq_m_n_f16): Likewise.
10630 (vandq_m_f32): Likewise.
10631 (vandq_m_f16): Likewise.
10632 (vbicq_m_f32): Likewise.
10633 (vbicq_m_f16): Likewise.
10634 (vbrsrq_m_n_f32): Likewise.
10635 (vbrsrq_m_n_f16): Likewise.
10636 (vcaddq_rot270_m_f32): Likewise.
10637 (vcaddq_rot270_m_f16): Likewise.
10638 (vcaddq_rot90_m_f32): Likewise.
10639 (vcaddq_rot90_m_f16): Likewise.
10640 (vcmlaq_m_f32): Likewise.
10641 (vcmlaq_m_f16): Likewise.
10642 (vcmlaq_rot180_m_f32): Likewise.
10643 (vcmlaq_rot180_m_f16): Likewise.
10644 (vcmlaq_rot270_m_f32): Likewise.
10645 (vcmlaq_rot270_m_f16): Likewise.
10646 (vcmlaq_rot90_m_f32): Likewise.
10647 (vcmlaq_rot90_m_f16): Likewise.
10648 (vcmulq_m_f32): Likewise.
10649 (vcmulq_m_f16): Likewise.
10650 (vcmulq_rot180_m_f32): Likewise.
10651 (vcmulq_rot180_m_f16): Likewise.
10652 (vcmulq_rot270_m_f32): Likewise.
10653 (vcmulq_rot270_m_f16): Likewise.
10654 (vcmulq_rot90_m_f32): Likewise.
10655 (vcmulq_rot90_m_f16): Likewise.
10656 (vcvtq_m_n_s32_f32): Likewise.
10657 (vcvtq_m_n_s16_f16): Likewise.
10658 (vcvtq_m_n_u32_f32): Likewise.
10659 (vcvtq_m_n_u16_f16): Likewise.
10660 (veorq_m_f32): Likewise.
10661 (veorq_m_f16): Likewise.
10662 (vfmaq_m_f32): Likewise.
10663 (vfmaq_m_f16): Likewise.
10664 (vfmaq_m_n_f32): Likewise.
10665 (vfmaq_m_n_f16): Likewise.
10666 (vfmasq_m_n_f32): Likewise.
10667 (vfmasq_m_n_f16): Likewise.
10668 (vfmsq_m_f32): Likewise.
10669 (vfmsq_m_f16): Likewise.
10670 (vmaxnmq_m_f32): Likewise.
10671 (vmaxnmq_m_f16): Likewise.
10672 (vminnmq_m_f32): Likewise.
10673 (vminnmq_m_f16): Likewise.
10674 (vmulq_m_f32): Likewise.
10675 (vmulq_m_f16): Likewise.
10676 (vmulq_m_n_f32): Likewise.
10677 (vmulq_m_n_f16): Likewise.
10678 (vornq_m_f32): Likewise.
10679 (vornq_m_f16): Likewise.
10680 (vorrq_m_f32): Likewise.
10681 (vorrq_m_f16): Likewise.
10682 (vsubq_m_f32): Likewise.
10683 (vsubq_m_f16): Likewise.
10684 (vsubq_m_n_f32): Likewise.
10685 (vsubq_m_n_f16): Likewise.
10686 (__attribute__): Likewise.
10687 (__arm_vabdq_m_f32): Likewise.
10688 (__arm_vabdq_m_f16): Likewise.
10689 (__arm_vaddq_m_f32): Likewise.
10690 (__arm_vaddq_m_f16): Likewise.
10691 (__arm_vaddq_m_n_f32): Likewise.
10692 (__arm_vaddq_m_n_f16): Likewise.
10693 (__arm_vandq_m_f32): Likewise.
10694 (__arm_vandq_m_f16): Likewise.
10695 (__arm_vbicq_m_f32): Likewise.
10696 (__arm_vbicq_m_f16): Likewise.
10697 (__arm_vbrsrq_m_n_f32): Likewise.
10698 (__arm_vbrsrq_m_n_f16): Likewise.
10699 (__arm_vcaddq_rot270_m_f32): Likewise.
10700 (__arm_vcaddq_rot270_m_f16): Likewise.
10701 (__arm_vcaddq_rot90_m_f32): Likewise.
10702 (__arm_vcaddq_rot90_m_f16): Likewise.
10703 (__arm_vcmlaq_m_f32): Likewise.
10704 (__arm_vcmlaq_m_f16): Likewise.
10705 (__arm_vcmlaq_rot180_m_f32): Likewise.
10706 (__arm_vcmlaq_rot180_m_f16): Likewise.
10707 (__arm_vcmlaq_rot270_m_f32): Likewise.
10708 (__arm_vcmlaq_rot270_m_f16): Likewise.
10709 (__arm_vcmlaq_rot90_m_f32): Likewise.
10710 (__arm_vcmlaq_rot90_m_f16): Likewise.
10711 (__arm_vcmulq_m_f32): Likewise.
10712 (__arm_vcmulq_m_f16): Likewise.
10713 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
10714 (__arm_vcmulq_rot180_m_f16): Likewise.
10715 (__arm_vcmulq_rot270_m_f32): Likewise.
10716 (__arm_vcmulq_rot270_m_f16): Likewise.
10717 (__arm_vcmulq_rot90_m_f32): Likewise.
10718 (__arm_vcmulq_rot90_m_f16): Likewise.
10719 (__arm_vcvtq_m_n_s32_f32): Likewise.
10720 (__arm_vcvtq_m_n_s16_f16): Likewise.
10721 (__arm_vcvtq_m_n_u32_f32): Likewise.
10722 (__arm_vcvtq_m_n_u16_f16): Likewise.
10723 (__arm_veorq_m_f32): Likewise.
10724 (__arm_veorq_m_f16): Likewise.
10725 (__arm_vfmaq_m_f32): Likewise.
10726 (__arm_vfmaq_m_f16): Likewise.
10727 (__arm_vfmaq_m_n_f32): Likewise.
10728 (__arm_vfmaq_m_n_f16): Likewise.
10729 (__arm_vfmasq_m_n_f32): Likewise.
10730 (__arm_vfmasq_m_n_f16): Likewise.
10731 (__arm_vfmsq_m_f32): Likewise.
10732 (__arm_vfmsq_m_f16): Likewise.
10733 (__arm_vmaxnmq_m_f32): Likewise.
10734 (__arm_vmaxnmq_m_f16): Likewise.
10735 (__arm_vminnmq_m_f32): Likewise.
10736 (__arm_vminnmq_m_f16): Likewise.
10737 (__arm_vmulq_m_f32): Likewise.
10738 (__arm_vmulq_m_f16): Likewise.
10739 (__arm_vmulq_m_n_f32): Likewise.
10740 (__arm_vmulq_m_n_f16): Likewise.
10741 (__arm_vornq_m_f32): Likewise.
10742 (__arm_vornq_m_f16): Likewise.
10743 (__arm_vorrq_m_f32): Likewise.
10744 (__arm_vorrq_m_f16): Likewise.
10745 (__arm_vsubq_m_f32): Likewise.
10746 (__arm_vsubq_m_f16): Likewise.
10747 (__arm_vsubq_m_n_f32): Likewise.
10748 (__arm_vsubq_m_n_f16): Likewise.
10749 (vabdq_m): Define polymorphic variant.
10750 (vaddq_m): Likewise.
10751 (vaddq_m_n): Likewise.
10752 (vandq_m): Likewise.
10753 (vbicq_m): Likewise.
10754 (vbrsrq_m_n): Likewise.
10755 (vcaddq_rot270_m): Likewise.
10756 (vcaddq_rot90_m): Likewise.
10757 (vcmlaq_m): Likewise.
10758 (vcmlaq_rot180_m): Likewise.
10759 (vcmlaq_rot270_m): Likewise.
10760 (vcmlaq_rot90_m): Likewise.
10761 (vcmulq_m): Likewise.
10762 (vcmulq_rot180_m): Likewise.
10763 (vcmulq_rot270_m): Likewise.
10764 (vcmulq_rot90_m): Likewise.
10765 (veorq_m): Likewise.
10766 (vfmaq_m): Likewise.
10767 (vfmaq_m_n): Likewise.
10768 (vfmasq_m_n): Likewise.
10769 (vfmsq_m): Likewise.
10770 (vmaxnmq_m): Likewise.
10771 (vminnmq_m): Likewise.
10772 (vmulq_m): Likewise.
10773 (vmulq_m_n): Likewise.
10774 (vornq_m): Likewise.
10775 (vsubq_m): Likewise.
10776 (vsubq_m_n): Likewise.
10777 (vorrq_m): Likewise.
10778 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
10780 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
10781 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
10782 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
10783 (mve_vaddq_m_f<mode>): Likewise.
10784 (mve_vaddq_m_n_f<mode>): Likewise.
10785 (mve_vandq_m_f<mode>): Likewise.
10786 (mve_vbicq_m_f<mode>): Likewise.
10787 (mve_vbrsrq_m_n_f<mode>): Likewise.
10788 (mve_vcaddq_rot270_m_f<mode>): Likewise.
10789 (mve_vcaddq_rot90_m_f<mode>): Likewise.
10790 (mve_vcmlaq_m_f<mode>): Likewise.
10791 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
10792 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
10793 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
10794 (mve_vcmulq_m_f<mode>): Likewise.
10795 (mve_vcmulq_rot180_m_f<mode>): Likewise.
10796 (mve_vcmulq_rot270_m_f<mode>): Likewise.
10797 (mve_vcmulq_rot90_m_f<mode>): Likewise.
10798 (mve_veorq_m_f<mode>): Likewise.
10799 (mve_vfmaq_m_f<mode>): Likewise.
10800 (mve_vfmaq_m_n_f<mode>): Likewise.
10801 (mve_vfmasq_m_n_f<mode>): Likewise.
10802 (mve_vfmsq_m_f<mode>): Likewise.
10803 (mve_vmaxnmq_m_f<mode>): Likewise.
10804 (mve_vminnmq_m_f<mode>): Likewise.
10805 (mve_vmulq_m_f<mode>): Likewise.
10806 (mve_vmulq_m_n_f<mode>): Likewise.
10807 (mve_vornq_m_f<mode>): Likewise.
10808 (mve_vorrq_m_f<mode>): Likewise.
10809 (mve_vsubq_m_f<mode>): Likewise.
10810 (mve_vsubq_m_n_f<mode>): Likewise.
10812 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10813 Mihail Ionescu <mihail.ionescu@arm.com>
10814 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10816 * config/arm/arm-protos.h (arm_mve_immediate_check):
10817 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
10818 mode and interger value.
10819 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
10820 (vmlaldavaq_p_s16): Likewise.
10821 (vmlaldavaq_p_u32): Likewise.
10822 (vmlaldavaq_p_u16): Likewise.
10823 (vmlaldavaxq_p_s32): Likewise.
10824 (vmlaldavaxq_p_s16): Likewise.
10825 (vmlaldavaxq_p_u32): Likewise.
10826 (vmlaldavaxq_p_u16): Likewise.
10827 (vmlsldavaq_p_s32): Likewise.
10828 (vmlsldavaq_p_s16): Likewise.
10829 (vmlsldavaxq_p_s32): Likewise.
10830 (vmlsldavaxq_p_s16): Likewise.
10831 (vmullbq_poly_m_p8): Likewise.
10832 (vmullbq_poly_m_p16): Likewise.
10833 (vmulltq_poly_m_p8): Likewise.
10834 (vmulltq_poly_m_p16): Likewise.
10835 (vqdmullbq_m_n_s32): Likewise.
10836 (vqdmullbq_m_n_s16): Likewise.
10837 (vqdmullbq_m_s32): Likewise.
10838 (vqdmullbq_m_s16): Likewise.
10839 (vqdmulltq_m_n_s32): Likewise.
10840 (vqdmulltq_m_n_s16): Likewise.
10841 (vqdmulltq_m_s32): Likewise.
10842 (vqdmulltq_m_s16): Likewise.
10843 (vqrshrnbq_m_n_s32): Likewise.
10844 (vqrshrnbq_m_n_s16): Likewise.
10845 (vqrshrnbq_m_n_u32): Likewise.
10846 (vqrshrnbq_m_n_u16): Likewise.
10847 (vqrshrntq_m_n_s32): Likewise.
10848 (vqrshrntq_m_n_s16): Likewise.
10849 (vqrshrntq_m_n_u32): Likewise.
10850 (vqrshrntq_m_n_u16): Likewise.
10851 (vqrshrunbq_m_n_s32): Likewise.
10852 (vqrshrunbq_m_n_s16): Likewise.
10853 (vqrshruntq_m_n_s32): Likewise.
10854 (vqrshruntq_m_n_s16): Likewise.
10855 (vqshrnbq_m_n_s32): Likewise.
10856 (vqshrnbq_m_n_s16): Likewise.
10857 (vqshrnbq_m_n_u32): Likewise.
10858 (vqshrnbq_m_n_u16): Likewise.
10859 (vqshrntq_m_n_s32): Likewise.
10860 (vqshrntq_m_n_s16): Likewise.
10861 (vqshrntq_m_n_u32): Likewise.
10862 (vqshrntq_m_n_u16): Likewise.
10863 (vqshrunbq_m_n_s32): Likewise.
10864 (vqshrunbq_m_n_s16): Likewise.
10865 (vqshruntq_m_n_s32): Likewise.
10866 (vqshruntq_m_n_s16): Likewise.
10867 (vrmlaldavhaq_p_s32): Likewise.
10868 (vrmlaldavhaq_p_u32): Likewise.
10869 (vrmlaldavhaxq_p_s32): Likewise.
10870 (vrmlsldavhaq_p_s32): Likewise.
10871 (vrmlsldavhaxq_p_s32): Likewise.
10872 (vrshrnbq_m_n_s32): Likewise.
10873 (vrshrnbq_m_n_s16): Likewise.
10874 (vrshrnbq_m_n_u32): Likewise.
10875 (vrshrnbq_m_n_u16): Likewise.
10876 (vrshrntq_m_n_s32): Likewise.
10877 (vrshrntq_m_n_s16): Likewise.
10878 (vrshrntq_m_n_u32): Likewise.
10879 (vrshrntq_m_n_u16): Likewise.
10880 (vshllbq_m_n_s8): Likewise.
10881 (vshllbq_m_n_s16): Likewise.
10882 (vshllbq_m_n_u8): Likewise.
10883 (vshllbq_m_n_u16): Likewise.
10884 (vshlltq_m_n_s8): Likewise.
10885 (vshlltq_m_n_s16): Likewise.
10886 (vshlltq_m_n_u8): Likewise.
10887 (vshlltq_m_n_u16): Likewise.
10888 (vshrnbq_m_n_s32): Likewise.
10889 (vshrnbq_m_n_s16): Likewise.
10890 (vshrnbq_m_n_u32): Likewise.
10891 (vshrnbq_m_n_u16): Likewise.
10892 (vshrntq_m_n_s32): Likewise.
10893 (vshrntq_m_n_s16): Likewise.
10894 (vshrntq_m_n_u32): Likewise.
10895 (vshrntq_m_n_u16): Likewise.
10896 (__arm_vmlaldavaq_p_s32): Define intrinsic.
10897 (__arm_vmlaldavaq_p_s16): Likewise.
10898 (__arm_vmlaldavaq_p_u32): Likewise.
10899 (__arm_vmlaldavaq_p_u16): Likewise.
10900 (__arm_vmlaldavaxq_p_s32): Likewise.
10901 (__arm_vmlaldavaxq_p_s16): Likewise.
10902 (__arm_vmlaldavaxq_p_u32): Likewise.
10903 (__arm_vmlaldavaxq_p_u16): Likewise.
10904 (__arm_vmlsldavaq_p_s32): Likewise.
10905 (__arm_vmlsldavaq_p_s16): Likewise.
10906 (__arm_vmlsldavaxq_p_s32): Likewise.
10907 (__arm_vmlsldavaxq_p_s16): Likewise.
10908 (__arm_vmullbq_poly_m_p8): Likewise.
10909 (__arm_vmullbq_poly_m_p16): Likewise.
10910 (__arm_vmulltq_poly_m_p8): Likewise.
10911 (__arm_vmulltq_poly_m_p16): Likewise.
10912 (__arm_vqdmullbq_m_n_s32): Likewise.
10913 (__arm_vqdmullbq_m_n_s16): Likewise.
10914 (__arm_vqdmullbq_m_s32): Likewise.
10915 (__arm_vqdmullbq_m_s16): Likewise.
10916 (__arm_vqdmulltq_m_n_s32): Likewise.
10917 (__arm_vqdmulltq_m_n_s16): Likewise.
10918 (__arm_vqdmulltq_m_s32): Likewise.
10919 (__arm_vqdmulltq_m_s16): Likewise.
10920 (__arm_vqrshrnbq_m_n_s32): Likewise.
10921 (__arm_vqrshrnbq_m_n_s16): Likewise.
10922 (__arm_vqrshrnbq_m_n_u32): Likewise.
10923 (__arm_vqrshrnbq_m_n_u16): Likewise.
10924 (__arm_vqrshrntq_m_n_s32): Likewise.
10925 (__arm_vqrshrntq_m_n_s16): Likewise.
10926 (__arm_vqrshrntq_m_n_u32): Likewise.
10927 (__arm_vqrshrntq_m_n_u16): Likewise.
10928 (__arm_vqrshrunbq_m_n_s32): Likewise.
10929 (__arm_vqrshrunbq_m_n_s16): Likewise.
10930 (__arm_vqrshruntq_m_n_s32): Likewise.
10931 (__arm_vqrshruntq_m_n_s16): Likewise.
10932 (__arm_vqshrnbq_m_n_s32): Likewise.
10933 (__arm_vqshrnbq_m_n_s16): Likewise.
10934 (__arm_vqshrnbq_m_n_u32): Likewise.
10935 (__arm_vqshrnbq_m_n_u16): Likewise.
10936 (__arm_vqshrntq_m_n_s32): Likewise.
10937 (__arm_vqshrntq_m_n_s16): Likewise.
10938 (__arm_vqshrntq_m_n_u32): Likewise.
10939 (__arm_vqshrntq_m_n_u16): Likewise.
10940 (__arm_vqshrunbq_m_n_s32): Likewise.
10941 (__arm_vqshrunbq_m_n_s16): Likewise.
10942 (__arm_vqshruntq_m_n_s32): Likewise.
10943 (__arm_vqshruntq_m_n_s16): Likewise.
10944 (__arm_vrmlaldavhaq_p_s32): Likewise.
10945 (__arm_vrmlaldavhaq_p_u32): Likewise.
10946 (__arm_vrmlaldavhaxq_p_s32): Likewise.
10947 (__arm_vrmlsldavhaq_p_s32): Likewise.
10948 (__arm_vrmlsldavhaxq_p_s32): Likewise.
10949 (__arm_vrshrnbq_m_n_s32): Likewise.
10950 (__arm_vrshrnbq_m_n_s16): Likewise.
10951 (__arm_vrshrnbq_m_n_u32): Likewise.
10952 (__arm_vrshrnbq_m_n_u16): Likewise.
10953 (__arm_vrshrntq_m_n_s32): Likewise.
10954 (__arm_vrshrntq_m_n_s16): Likewise.
10955 (__arm_vrshrntq_m_n_u32): Likewise.
10956 (__arm_vrshrntq_m_n_u16): Likewise.
10957 (__arm_vshllbq_m_n_s8): Likewise.
10958 (__arm_vshllbq_m_n_s16): Likewise.
10959 (__arm_vshllbq_m_n_u8): Likewise.
10960 (__arm_vshllbq_m_n_u16): Likewise.
10961 (__arm_vshlltq_m_n_s8): Likewise.
10962 (__arm_vshlltq_m_n_s16): Likewise.
10963 (__arm_vshlltq_m_n_u8): Likewise.
10964 (__arm_vshlltq_m_n_u16): Likewise.
10965 (__arm_vshrnbq_m_n_s32): Likewise.
10966 (__arm_vshrnbq_m_n_s16): Likewise.
10967 (__arm_vshrnbq_m_n_u32): Likewise.
10968 (__arm_vshrnbq_m_n_u16): Likewise.
10969 (__arm_vshrntq_m_n_s32): Likewise.
10970 (__arm_vshrntq_m_n_s16): Likewise.
10971 (__arm_vshrntq_m_n_u32): Likewise.
10972 (__arm_vshrntq_m_n_u16): Likewise.
10973 (vmullbq_poly_m): Define polymorphic variant.
10974 (vmulltq_poly_m): Likewise.
10975 (vshllbq_m): Likewise.
10976 (vshrntq_m_n): Likewise.
10977 (vshrnbq_m_n): Likewise.
10978 (vshlltq_m_n): Likewise.
10979 (vshllbq_m_n): Likewise.
10980 (vrshrntq_m_n): Likewise.
10981 (vrshrnbq_m_n): Likewise.
10982 (vqshruntq_m_n): Likewise.
10983 (vqshrunbq_m_n): Likewise.
10984 (vqdmullbq_m_n): Likewise.
10985 (vqdmullbq_m): Likewise.
10986 (vqdmulltq_m_n): Likewise.
10987 (vqdmulltq_m): Likewise.
10988 (vqrshrnbq_m_n): Likewise.
10989 (vqrshrntq_m_n): Likewise.
10990 (vqrshrunbq_m_n): Likewise.
10991 (vqrshruntq_m_n): Likewise.
10992 (vqshrnbq_m_n): Likewise.
10993 (vqshrntq_m_n): Likewise.
10994 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
10995 builtin qualifiers.
10996 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
10997 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
10998 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
10999 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
11000 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
11001 (VMLALDAVAXQ_P): Likewise.
11002 (VQRSHRNBQ_M_N): Likewise.
11003 (VQRSHRNTQ_M_N): Likewise.
11004 (VQSHRNBQ_M_N): Likewise.
11005 (VQSHRNTQ_M_N): Likewise.
11006 (VRSHRNBQ_M_N): Likewise.
11007 (VRSHRNTQ_M_N): Likewise.
11008 (VSHLLBQ_M_N): Likewise.
11009 (VSHLLTQ_M_N): Likewise.
11010 (VSHRNBQ_M_N): Likewise.
11011 (VSHRNTQ_M_N): Likewise.
11012 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
11013 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
11014 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
11015 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
11016 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
11017 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
11018 (mve_vrmlaldavhaq_p_sv4si): Likewise.
11019 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
11020 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
11021 (mve_vshllbq_m_n_<supf><mode>): Likewise.
11022 (mve_vshlltq_m_n_<supf><mode>): Likewise.
11023 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
11024 (mve_vshrntq_m_n_<supf><mode>): Likewise.
11025 (mve_vmlsldavaq_p_s<mode>): Likewise.
11026 (mve_vmlsldavaxq_p_s<mode>): Likewise.
11027 (mve_vmullbq_poly_m_p<mode>): Likewise.
11028 (mve_vmulltq_poly_m_p<mode>): Likewise.
11029 (mve_vqdmullbq_m_n_s<mode>): Likewise.
11030 (mve_vqdmullbq_m_s<mode>): Likewise.
11031 (mve_vqdmulltq_m_n_s<mode>): Likewise.
11032 (mve_vqdmulltq_m_s<mode>): Likewise.
11033 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
11034 (mve_vqrshruntq_m_n_s<mode>): Likewise.
11035 (mve_vqshrunbq_m_n_s<mode>): Likewise.
11036 (mve_vqshruntq_m_n_s<mode>): Likewise.
11037 (mve_vrmlaldavhaq_p_uv4si): Likewise.
11038 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
11039 (mve_vrmlsldavhaq_p_sv4si): Likewise.
11040 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
11042 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11043 Mihail Ionescu <mihail.ionescu@arm.com>
11044 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11046 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
11047 (vabdq_m_s32): Likewise.
11048 (vabdq_m_s16): Likewise.
11049 (vabdq_m_u8): Likewise.
11050 (vabdq_m_u32): Likewise.
11051 (vabdq_m_u16): Likewise.
11052 (vaddq_m_n_s8): Likewise.
11053 (vaddq_m_n_s32): Likewise.
11054 (vaddq_m_n_s16): Likewise.
11055 (vaddq_m_n_u8): Likewise.
11056 (vaddq_m_n_u32): Likewise.
11057 (vaddq_m_n_u16): Likewise.
11058 (vaddq_m_s8): Likewise.
11059 (vaddq_m_s32): Likewise.
11060 (vaddq_m_s16): Likewise.
11061 (vaddq_m_u8): Likewise.
11062 (vaddq_m_u32): Likewise.
11063 (vaddq_m_u16): Likewise.
11064 (vandq_m_s8): Likewise.
11065 (vandq_m_s32): Likewise.
11066 (vandq_m_s16): Likewise.
11067 (vandq_m_u8): Likewise.
11068 (vandq_m_u32): Likewise.
11069 (vandq_m_u16): Likewise.
11070 (vbicq_m_s8): Likewise.
11071 (vbicq_m_s32): Likewise.
11072 (vbicq_m_s16): Likewise.
11073 (vbicq_m_u8): Likewise.
11074 (vbicq_m_u32): Likewise.
11075 (vbicq_m_u16): Likewise.
11076 (vbrsrq_m_n_s8): Likewise.
11077 (vbrsrq_m_n_s32): Likewise.
11078 (vbrsrq_m_n_s16): Likewise.
11079 (vbrsrq_m_n_u8): Likewise.
11080 (vbrsrq_m_n_u32): Likewise.
11081 (vbrsrq_m_n_u16): Likewise.
11082 (vcaddq_rot270_m_s8): Likewise.
11083 (vcaddq_rot270_m_s32): Likewise.
11084 (vcaddq_rot270_m_s16): Likewise.
11085 (vcaddq_rot270_m_u8): Likewise.
11086 (vcaddq_rot270_m_u32): Likewise.
11087 (vcaddq_rot270_m_u16): Likewise.
11088 (vcaddq_rot90_m_s8): Likewise.
11089 (vcaddq_rot90_m_s32): Likewise.
11090 (vcaddq_rot90_m_s16): Likewise.
11091 (vcaddq_rot90_m_u8): Likewise.
11092 (vcaddq_rot90_m_u32): Likewise.
11093 (vcaddq_rot90_m_u16): Likewise.
11094 (veorq_m_s8): Likewise.
11095 (veorq_m_s32): Likewise.
11096 (veorq_m_s16): Likewise.
11097 (veorq_m_u8): Likewise.
11098 (veorq_m_u32): Likewise.
11099 (veorq_m_u16): Likewise.
11100 (vhaddq_m_n_s8): Likewise.
11101 (vhaddq_m_n_s32): Likewise.
11102 (vhaddq_m_n_s16): Likewise.
11103 (vhaddq_m_n_u8): Likewise.
11104 (vhaddq_m_n_u32): Likewise.
11105 (vhaddq_m_n_u16): Likewise.
11106 (vhaddq_m_s8): Likewise.
11107 (vhaddq_m_s32): Likewise.
11108 (vhaddq_m_s16): Likewise.
11109 (vhaddq_m_u8): Likewise.
11110 (vhaddq_m_u32): Likewise.
11111 (vhaddq_m_u16): Likewise.
11112 (vhcaddq_rot270_m_s8): Likewise.
11113 (vhcaddq_rot270_m_s32): Likewise.
11114 (vhcaddq_rot270_m_s16): Likewise.
11115 (vhcaddq_rot90_m_s8): Likewise.
11116 (vhcaddq_rot90_m_s32): Likewise.
11117 (vhcaddq_rot90_m_s16): Likewise.
11118 (vhsubq_m_n_s8): Likewise.
11119 (vhsubq_m_n_s32): Likewise.
11120 (vhsubq_m_n_s16): Likewise.
11121 (vhsubq_m_n_u8): Likewise.
11122 (vhsubq_m_n_u32): Likewise.
11123 (vhsubq_m_n_u16): Likewise.
11124 (vhsubq_m_s8): Likewise.
11125 (vhsubq_m_s32): Likewise.
11126 (vhsubq_m_s16): Likewise.
11127 (vhsubq_m_u8): Likewise.
11128 (vhsubq_m_u32): Likewise.
11129 (vhsubq_m_u16): Likewise.
11130 (vmaxq_m_s8): Likewise.
11131 (vmaxq_m_s32): Likewise.
11132 (vmaxq_m_s16): Likewise.
11133 (vmaxq_m_u8): Likewise.
11134 (vmaxq_m_u32): Likewise.
11135 (vmaxq_m_u16): Likewise.
11136 (vminq_m_s8): Likewise.
11137 (vminq_m_s32): Likewise.
11138 (vminq_m_s16): Likewise.
11139 (vminq_m_u8): Likewise.
11140 (vminq_m_u32): Likewise.
11141 (vminq_m_u16): Likewise.
11142 (vmladavaq_p_s8): Likewise.
11143 (vmladavaq_p_s32): Likewise.
11144 (vmladavaq_p_s16): Likewise.
11145 (vmladavaq_p_u8): Likewise.
11146 (vmladavaq_p_u32): Likewise.
11147 (vmladavaq_p_u16): Likewise.
11148 (vmladavaxq_p_s8): Likewise.
11149 (vmladavaxq_p_s32): Likewise.
11150 (vmladavaxq_p_s16): Likewise.
11151 (vmlaq_m_n_s8): Likewise.
11152 (vmlaq_m_n_s32): Likewise.
11153 (vmlaq_m_n_s16): Likewise.
11154 (vmlaq_m_n_u8): Likewise.
11155 (vmlaq_m_n_u32): Likewise.
11156 (vmlaq_m_n_u16): Likewise.
11157 (vmlasq_m_n_s8): Likewise.
11158 (vmlasq_m_n_s32): Likewise.
11159 (vmlasq_m_n_s16): Likewise.
11160 (vmlasq_m_n_u8): Likewise.
11161 (vmlasq_m_n_u32): Likewise.
11162 (vmlasq_m_n_u16): Likewise.
11163 (vmlsdavaq_p_s8): Likewise.
11164 (vmlsdavaq_p_s32): Likewise.
11165 (vmlsdavaq_p_s16): Likewise.
11166 (vmlsdavaxq_p_s8): Likewise.
11167 (vmlsdavaxq_p_s32): Likewise.
11168 (vmlsdavaxq_p_s16): Likewise.
11169 (vmulhq_m_s8): Likewise.
11170 (vmulhq_m_s32): Likewise.
11171 (vmulhq_m_s16): Likewise.
11172 (vmulhq_m_u8): Likewise.
11173 (vmulhq_m_u32): Likewise.
11174 (vmulhq_m_u16): Likewise.
11175 (vmullbq_int_m_s8): Likewise.
11176 (vmullbq_int_m_s32): Likewise.
11177 (vmullbq_int_m_s16): Likewise.
11178 (vmullbq_int_m_u8): Likewise.
11179 (vmullbq_int_m_u32): Likewise.
11180 (vmullbq_int_m_u16): Likewise.
11181 (vmulltq_int_m_s8): Likewise.
11182 (vmulltq_int_m_s32): Likewise.
11183 (vmulltq_int_m_s16): Likewise.
11184 (vmulltq_int_m_u8): Likewise.
11185 (vmulltq_int_m_u32): Likewise.
11186 (vmulltq_int_m_u16): Likewise.
11187 (vmulq_m_n_s8): Likewise.
11188 (vmulq_m_n_s32): Likewise.
11189 (vmulq_m_n_s16): Likewise.
11190 (vmulq_m_n_u8): Likewise.
11191 (vmulq_m_n_u32): Likewise.
11192 (vmulq_m_n_u16): Likewise.
11193 (vmulq_m_s8): Likewise.
11194 (vmulq_m_s32): Likewise.
11195 (vmulq_m_s16): Likewise.
11196 (vmulq_m_u8): Likewise.
11197 (vmulq_m_u32): Likewise.
11198 (vmulq_m_u16): Likewise.
11199 (vornq_m_s8): Likewise.
11200 (vornq_m_s32): Likewise.
11201 (vornq_m_s16): Likewise.
11202 (vornq_m_u8): Likewise.
11203 (vornq_m_u32): Likewise.
11204 (vornq_m_u16): Likewise.
11205 (vorrq_m_s8): Likewise.
11206 (vorrq_m_s32): Likewise.
11207 (vorrq_m_s16): Likewise.
11208 (vorrq_m_u8): Likewise.
11209 (vorrq_m_u32): Likewise.
11210 (vorrq_m_u16): Likewise.
11211 (vqaddq_m_n_s8): Likewise.
11212 (vqaddq_m_n_s32): Likewise.
11213 (vqaddq_m_n_s16): Likewise.
11214 (vqaddq_m_n_u8): Likewise.
11215 (vqaddq_m_n_u32): Likewise.
11216 (vqaddq_m_n_u16): Likewise.
11217 (vqaddq_m_s8): Likewise.
11218 (vqaddq_m_s32): Likewise.
11219 (vqaddq_m_s16): Likewise.
11220 (vqaddq_m_u8): Likewise.
11221 (vqaddq_m_u32): Likewise.
11222 (vqaddq_m_u16): Likewise.
11223 (vqdmladhq_m_s8): Likewise.
11224 (vqdmladhq_m_s32): Likewise.
11225 (vqdmladhq_m_s16): Likewise.
11226 (vqdmladhxq_m_s8): Likewise.
11227 (vqdmladhxq_m_s32): Likewise.
11228 (vqdmladhxq_m_s16): Likewise.
11229 (vqdmlahq_m_n_s8): Likewise.
11230 (vqdmlahq_m_n_s32): Likewise.
11231 (vqdmlahq_m_n_s16): Likewise.
11232 (vqdmlahq_m_n_u8): Likewise.
11233 (vqdmlahq_m_n_u32): Likewise.
11234 (vqdmlahq_m_n_u16): Likewise.
11235 (vqdmlsdhq_m_s8): Likewise.
11236 (vqdmlsdhq_m_s32): Likewise.
11237 (vqdmlsdhq_m_s16): Likewise.
11238 (vqdmlsdhxq_m_s8): Likewise.
11239 (vqdmlsdhxq_m_s32): Likewise.
11240 (vqdmlsdhxq_m_s16): Likewise.
11241 (vqdmulhq_m_n_s8): Likewise.
11242 (vqdmulhq_m_n_s32): Likewise.
11243 (vqdmulhq_m_n_s16): Likewise.
11244 (vqdmulhq_m_s8): Likewise.
11245 (vqdmulhq_m_s32): Likewise.
11246 (vqdmulhq_m_s16): Likewise.
11247 (vqrdmladhq_m_s8): Likewise.
11248 (vqrdmladhq_m_s32): Likewise.
11249 (vqrdmladhq_m_s16): Likewise.
11250 (vqrdmladhxq_m_s8): Likewise.
11251 (vqrdmladhxq_m_s32): Likewise.
11252 (vqrdmladhxq_m_s16): Likewise.
11253 (vqrdmlahq_m_n_s8): Likewise.
11254 (vqrdmlahq_m_n_s32): Likewise.
11255 (vqrdmlahq_m_n_s16): Likewise.
11256 (vqrdmlahq_m_n_u8): Likewise.
11257 (vqrdmlahq_m_n_u32): Likewise.
11258 (vqrdmlahq_m_n_u16): Likewise.
11259 (vqrdmlashq_m_n_s8): Likewise.
11260 (vqrdmlashq_m_n_s32): Likewise.
11261 (vqrdmlashq_m_n_s16): Likewise.
11262 (vqrdmlashq_m_n_u8): Likewise.
11263 (vqrdmlashq_m_n_u32): Likewise.
11264 (vqrdmlashq_m_n_u16): Likewise.
11265 (vqrdmlsdhq_m_s8): Likewise.
11266 (vqrdmlsdhq_m_s32): Likewise.
11267 (vqrdmlsdhq_m_s16): Likewise.
11268 (vqrdmlsdhxq_m_s8): Likewise.
11269 (vqrdmlsdhxq_m_s32): Likewise.
11270 (vqrdmlsdhxq_m_s16): Likewise.
11271 (vqrdmulhq_m_n_s8): Likewise.
11272 (vqrdmulhq_m_n_s32): Likewise.
11273 (vqrdmulhq_m_n_s16): Likewise.
11274 (vqrdmulhq_m_s8): Likewise.
11275 (vqrdmulhq_m_s32): Likewise.
11276 (vqrdmulhq_m_s16): Likewise.
11277 (vqrshlq_m_s8): Likewise.
11278 (vqrshlq_m_s32): Likewise.
11279 (vqrshlq_m_s16): Likewise.
11280 (vqrshlq_m_u8): Likewise.
11281 (vqrshlq_m_u32): Likewise.
11282 (vqrshlq_m_u16): Likewise.
11283 (vqshlq_m_n_s8): Likewise.
11284 (vqshlq_m_n_s32): Likewise.
11285 (vqshlq_m_n_s16): Likewise.
11286 (vqshlq_m_n_u8): Likewise.
11287 (vqshlq_m_n_u32): Likewise.
11288 (vqshlq_m_n_u16): Likewise.
11289 (vqshlq_m_s8): Likewise.
11290 (vqshlq_m_s32): Likewise.
11291 (vqshlq_m_s16): Likewise.
11292 (vqshlq_m_u8): Likewise.
11293 (vqshlq_m_u32): Likewise.
11294 (vqshlq_m_u16): Likewise.
11295 (vqsubq_m_n_s8): Likewise.
11296 (vqsubq_m_n_s32): Likewise.
11297 (vqsubq_m_n_s16): Likewise.
11298 (vqsubq_m_n_u8): Likewise.
11299 (vqsubq_m_n_u32): Likewise.
11300 (vqsubq_m_n_u16): Likewise.
11301 (vqsubq_m_s8): Likewise.
11302 (vqsubq_m_s32): Likewise.
11303 (vqsubq_m_s16): Likewise.
11304 (vqsubq_m_u8): Likewise.
11305 (vqsubq_m_u32): Likewise.
11306 (vqsubq_m_u16): Likewise.
11307 (vrhaddq_m_s8): Likewise.
11308 (vrhaddq_m_s32): Likewise.
11309 (vrhaddq_m_s16): Likewise.
11310 (vrhaddq_m_u8): Likewise.
11311 (vrhaddq_m_u32): Likewise.
11312 (vrhaddq_m_u16): Likewise.
11313 (vrmulhq_m_s8): Likewise.
11314 (vrmulhq_m_s32): Likewise.
11315 (vrmulhq_m_s16): Likewise.
11316 (vrmulhq_m_u8): Likewise.
11317 (vrmulhq_m_u32): Likewise.
11318 (vrmulhq_m_u16): Likewise.
11319 (vrshlq_m_s8): Likewise.
11320 (vrshlq_m_s32): Likewise.
11321 (vrshlq_m_s16): Likewise.
11322 (vrshlq_m_u8): Likewise.
11323 (vrshlq_m_u32): Likewise.
11324 (vrshlq_m_u16): Likewise.
11325 (vrshrq_m_n_s8): Likewise.
11326 (vrshrq_m_n_s32): Likewise.
11327 (vrshrq_m_n_s16): Likewise.
11328 (vrshrq_m_n_u8): Likewise.
11329 (vrshrq_m_n_u32): Likewise.
11330 (vrshrq_m_n_u16): Likewise.
11331 (vshlq_m_n_s8): Likewise.
11332 (vshlq_m_n_s32): Likewise.
11333 (vshlq_m_n_s16): Likewise.
11334 (vshlq_m_n_u8): Likewise.
11335 (vshlq_m_n_u32): Likewise.
11336 (vshlq_m_n_u16): Likewise.
11337 (vshrq_m_n_s8): Likewise.
11338 (vshrq_m_n_s32): Likewise.
11339 (vshrq_m_n_s16): Likewise.
11340 (vshrq_m_n_u8): Likewise.
11341 (vshrq_m_n_u32): Likewise.
11342 (vshrq_m_n_u16): Likewise.
11343 (vsliq_m_n_s8): Likewise.
11344 (vsliq_m_n_s32): Likewise.
11345 (vsliq_m_n_s16): Likewise.
11346 (vsliq_m_n_u8): Likewise.
11347 (vsliq_m_n_u32): Likewise.
11348 (vsliq_m_n_u16): Likewise.
11349 (vsubq_m_n_s8): Likewise.
11350 (vsubq_m_n_s32): Likewise.
11351 (vsubq_m_n_s16): Likewise.
11352 (vsubq_m_n_u8): Likewise.
11353 (vsubq_m_n_u32): Likewise.
11354 (vsubq_m_n_u16): Likewise.
11355 (__arm_vabdq_m_s8): Define intrinsic.
11356 (__arm_vabdq_m_s32): Likewise.
11357 (__arm_vabdq_m_s16): Likewise.
11358 (__arm_vabdq_m_u8): Likewise.
11359 (__arm_vabdq_m_u32): Likewise.
11360 (__arm_vabdq_m_u16): Likewise.
11361 (__arm_vaddq_m_n_s8): Likewise.
11362 (__arm_vaddq_m_n_s32): Likewise.
11363 (__arm_vaddq_m_n_s16): Likewise.
11364 (__arm_vaddq_m_n_u8): Likewise.
11365 (__arm_vaddq_m_n_u32): Likewise.
11366 (__arm_vaddq_m_n_u16): Likewise.
11367 (__arm_vaddq_m_s8): Likewise.
11368 (__arm_vaddq_m_s32): Likewise.
11369 (__arm_vaddq_m_s16): Likewise.
11370 (__arm_vaddq_m_u8): Likewise.
11371 (__arm_vaddq_m_u32): Likewise.
11372 (__arm_vaddq_m_u16): Likewise.
11373 (__arm_vandq_m_s8): Likewise.
11374 (__arm_vandq_m_s32): Likewise.
11375 (__arm_vandq_m_s16): Likewise.
11376 (__arm_vandq_m_u8): Likewise.
11377 (__arm_vandq_m_u32): Likewise.
11378 (__arm_vandq_m_u16): Likewise.
11379 (__arm_vbicq_m_s8): Likewise.
11380 (__arm_vbicq_m_s32): Likewise.
11381 (__arm_vbicq_m_s16): Likewise.
11382 (__arm_vbicq_m_u8): Likewise.
11383 (__arm_vbicq_m_u32): Likewise.
11384 (__arm_vbicq_m_u16): Likewise.
11385 (__arm_vbrsrq_m_n_s8): Likewise.
11386 (__arm_vbrsrq_m_n_s32): Likewise.
11387 (__arm_vbrsrq_m_n_s16): Likewise.
11388 (__arm_vbrsrq_m_n_u8): Likewise.
11389 (__arm_vbrsrq_m_n_u32): Likewise.
11390 (__arm_vbrsrq_m_n_u16): Likewise.
11391 (__arm_vcaddq_rot270_m_s8): Likewise.
11392 (__arm_vcaddq_rot270_m_s32): Likewise.
11393 (__arm_vcaddq_rot270_m_s16): Likewise.
11394 (__arm_vcaddq_rot270_m_u8): Likewise.
11395 (__arm_vcaddq_rot270_m_u32): Likewise.
11396 (__arm_vcaddq_rot270_m_u16): Likewise.
11397 (__arm_vcaddq_rot90_m_s8): Likewise.
11398 (__arm_vcaddq_rot90_m_s32): Likewise.
11399 (__arm_vcaddq_rot90_m_s16): Likewise.
11400 (__arm_vcaddq_rot90_m_u8): Likewise.
11401 (__arm_vcaddq_rot90_m_u32): Likewise.
11402 (__arm_vcaddq_rot90_m_u16): Likewise.
11403 (__arm_veorq_m_s8): Likewise.
11404 (__arm_veorq_m_s32): Likewise.
11405 (__arm_veorq_m_s16): Likewise.
11406 (__arm_veorq_m_u8): Likewise.
11407 (__arm_veorq_m_u32): Likewise.
11408 (__arm_veorq_m_u16): Likewise.
11409 (__arm_vhaddq_m_n_s8): Likewise.
11410 (__arm_vhaddq_m_n_s32): Likewise.
11411 (__arm_vhaddq_m_n_s16): Likewise.
11412 (__arm_vhaddq_m_n_u8): Likewise.
11413 (__arm_vhaddq_m_n_u32): Likewise.
11414 (__arm_vhaddq_m_n_u16): Likewise.
11415 (__arm_vhaddq_m_s8): Likewise.
11416 (__arm_vhaddq_m_s32): Likewise.
11417 (__arm_vhaddq_m_s16): Likewise.
11418 (__arm_vhaddq_m_u8): Likewise.
11419 (__arm_vhaddq_m_u32): Likewise.
11420 (__arm_vhaddq_m_u16): Likewise.
11421 (__arm_vhcaddq_rot270_m_s8): Likewise.
11422 (__arm_vhcaddq_rot270_m_s32): Likewise.
11423 (__arm_vhcaddq_rot270_m_s16): Likewise.
11424 (__arm_vhcaddq_rot90_m_s8): Likewise.
11425 (__arm_vhcaddq_rot90_m_s32): Likewise.
11426 (__arm_vhcaddq_rot90_m_s16): Likewise.
11427 (__arm_vhsubq_m_n_s8): Likewise.
11428 (__arm_vhsubq_m_n_s32): Likewise.
11429 (__arm_vhsubq_m_n_s16): Likewise.
11430 (__arm_vhsubq_m_n_u8): Likewise.
11431 (__arm_vhsubq_m_n_u32): Likewise.
11432 (__arm_vhsubq_m_n_u16): Likewise.
11433 (__arm_vhsubq_m_s8): Likewise.
11434 (__arm_vhsubq_m_s32): Likewise.
11435 (__arm_vhsubq_m_s16): Likewise.
11436 (__arm_vhsubq_m_u8): Likewise.
11437 (__arm_vhsubq_m_u32): Likewise.
11438 (__arm_vhsubq_m_u16): Likewise.
11439 (__arm_vmaxq_m_s8): Likewise.
11440 (__arm_vmaxq_m_s32): Likewise.
11441 (__arm_vmaxq_m_s16): Likewise.
11442 (__arm_vmaxq_m_u8): Likewise.
11443 (__arm_vmaxq_m_u32): Likewise.
11444 (__arm_vmaxq_m_u16): Likewise.
11445 (__arm_vminq_m_s8): Likewise.
11446 (__arm_vminq_m_s32): Likewise.
11447 (__arm_vminq_m_s16): Likewise.
11448 (__arm_vminq_m_u8): Likewise.
11449 (__arm_vminq_m_u32): Likewise.
11450 (__arm_vminq_m_u16): Likewise.
11451 (__arm_vmladavaq_p_s8): Likewise.
11452 (__arm_vmladavaq_p_s32): Likewise.
11453 (__arm_vmladavaq_p_s16): Likewise.
11454 (__arm_vmladavaq_p_u8): Likewise.
11455 (__arm_vmladavaq_p_u32): Likewise.
11456 (__arm_vmladavaq_p_u16): Likewise.
11457 (__arm_vmladavaxq_p_s8): Likewise.
11458 (__arm_vmladavaxq_p_s32): Likewise.
11459 (__arm_vmladavaxq_p_s16): Likewise.
11460 (__arm_vmlaq_m_n_s8): Likewise.
11461 (__arm_vmlaq_m_n_s32): Likewise.
11462 (__arm_vmlaq_m_n_s16): Likewise.
11463 (__arm_vmlaq_m_n_u8): Likewise.
11464 (__arm_vmlaq_m_n_u32): Likewise.
11465 (__arm_vmlaq_m_n_u16): Likewise.
11466 (__arm_vmlasq_m_n_s8): Likewise.
11467 (__arm_vmlasq_m_n_s32): Likewise.
11468 (__arm_vmlasq_m_n_s16): Likewise.
11469 (__arm_vmlasq_m_n_u8): Likewise.
11470 (__arm_vmlasq_m_n_u32): Likewise.
11471 (__arm_vmlasq_m_n_u16): Likewise.
11472 (__arm_vmlsdavaq_p_s8): Likewise.
11473 (__arm_vmlsdavaq_p_s32): Likewise.
11474 (__arm_vmlsdavaq_p_s16): Likewise.
11475 (__arm_vmlsdavaxq_p_s8): Likewise.
11476 (__arm_vmlsdavaxq_p_s32): Likewise.
11477 (__arm_vmlsdavaxq_p_s16): Likewise.
11478 (__arm_vmulhq_m_s8): Likewise.
11479 (__arm_vmulhq_m_s32): Likewise.
11480 (__arm_vmulhq_m_s16): Likewise.
11481 (__arm_vmulhq_m_u8): Likewise.
11482 (__arm_vmulhq_m_u32): Likewise.
11483 (__arm_vmulhq_m_u16): Likewise.
11484 (__arm_vmullbq_int_m_s8): Likewise.
11485 (__arm_vmullbq_int_m_s32): Likewise.
11486 (__arm_vmullbq_int_m_s16): Likewise.
11487 (__arm_vmullbq_int_m_u8): Likewise.
11488 (__arm_vmullbq_int_m_u32): Likewise.
11489 (__arm_vmullbq_int_m_u16): Likewise.
11490 (__arm_vmulltq_int_m_s8): Likewise.
11491 (__arm_vmulltq_int_m_s32): Likewise.
11492 (__arm_vmulltq_int_m_s16): Likewise.
11493 (__arm_vmulltq_int_m_u8): Likewise.
11494 (__arm_vmulltq_int_m_u32): Likewise.
11495 (__arm_vmulltq_int_m_u16): Likewise.
11496 (__arm_vmulq_m_n_s8): Likewise.
11497 (__arm_vmulq_m_n_s32): Likewise.
11498 (__arm_vmulq_m_n_s16): Likewise.
11499 (__arm_vmulq_m_n_u8): Likewise.
11500 (__arm_vmulq_m_n_u32): Likewise.
11501 (__arm_vmulq_m_n_u16): Likewise.
11502 (__arm_vmulq_m_s8): Likewise.
11503 (__arm_vmulq_m_s32): Likewise.
11504 (__arm_vmulq_m_s16): Likewise.
11505 (__arm_vmulq_m_u8): Likewise.
11506 (__arm_vmulq_m_u32): Likewise.
11507 (__arm_vmulq_m_u16): Likewise.
11508 (__arm_vornq_m_s8): Likewise.
11509 (__arm_vornq_m_s32): Likewise.
11510 (__arm_vornq_m_s16): Likewise.
11511 (__arm_vornq_m_u8): Likewise.
11512 (__arm_vornq_m_u32): Likewise.
11513 (__arm_vornq_m_u16): Likewise.
11514 (__arm_vorrq_m_s8): Likewise.
11515 (__arm_vorrq_m_s32): Likewise.
11516 (__arm_vorrq_m_s16): Likewise.
11517 (__arm_vorrq_m_u8): Likewise.
11518 (__arm_vorrq_m_u32): Likewise.
11519 (__arm_vorrq_m_u16): Likewise.
11520 (__arm_vqaddq_m_n_s8): Likewise.
11521 (__arm_vqaddq_m_n_s32): Likewise.
11522 (__arm_vqaddq_m_n_s16): Likewise.
11523 (__arm_vqaddq_m_n_u8): Likewise.
11524 (__arm_vqaddq_m_n_u32): Likewise.
11525 (__arm_vqaddq_m_n_u16): Likewise.
11526 (__arm_vqaddq_m_s8): Likewise.
11527 (__arm_vqaddq_m_s32): Likewise.
11528 (__arm_vqaddq_m_s16): Likewise.
11529 (__arm_vqaddq_m_u8): Likewise.
11530 (__arm_vqaddq_m_u32): Likewise.
11531 (__arm_vqaddq_m_u16): Likewise.
11532 (__arm_vqdmladhq_m_s8): Likewise.
11533 (__arm_vqdmladhq_m_s32): Likewise.
11534 (__arm_vqdmladhq_m_s16): Likewise.
11535 (__arm_vqdmladhxq_m_s8): Likewise.
11536 (__arm_vqdmladhxq_m_s32): Likewise.
11537 (__arm_vqdmladhxq_m_s16): Likewise.
11538 (__arm_vqdmlahq_m_n_s8): Likewise.
11539 (__arm_vqdmlahq_m_n_s32): Likewise.
11540 (__arm_vqdmlahq_m_n_s16): Likewise.
11541 (__arm_vqdmlahq_m_n_u8): Likewise.
11542 (__arm_vqdmlahq_m_n_u32): Likewise.
11543 (__arm_vqdmlahq_m_n_u16): Likewise.
11544 (__arm_vqdmlsdhq_m_s8): Likewise.
11545 (__arm_vqdmlsdhq_m_s32): Likewise.
11546 (__arm_vqdmlsdhq_m_s16): Likewise.
11547 (__arm_vqdmlsdhxq_m_s8): Likewise.
11548 (__arm_vqdmlsdhxq_m_s32): Likewise.
11549 (__arm_vqdmlsdhxq_m_s16): Likewise.
11550 (__arm_vqdmulhq_m_n_s8): Likewise.
11551 (__arm_vqdmulhq_m_n_s32): Likewise.
11552 (__arm_vqdmulhq_m_n_s16): Likewise.
11553 (__arm_vqdmulhq_m_s8): Likewise.
11554 (__arm_vqdmulhq_m_s32): Likewise.
11555 (__arm_vqdmulhq_m_s16): Likewise.
11556 (__arm_vqrdmladhq_m_s8): Likewise.
11557 (__arm_vqrdmladhq_m_s32): Likewise.
11558 (__arm_vqrdmladhq_m_s16): Likewise.
11559 (__arm_vqrdmladhxq_m_s8): Likewise.
11560 (__arm_vqrdmladhxq_m_s32): Likewise.
11561 (__arm_vqrdmladhxq_m_s16): Likewise.
11562 (__arm_vqrdmlahq_m_n_s8): Likewise.
11563 (__arm_vqrdmlahq_m_n_s32): Likewise.
11564 (__arm_vqrdmlahq_m_n_s16): Likewise.
11565 (__arm_vqrdmlahq_m_n_u8): Likewise.
11566 (__arm_vqrdmlahq_m_n_u32): Likewise.
11567 (__arm_vqrdmlahq_m_n_u16): Likewise.
11568 (__arm_vqrdmlashq_m_n_s8): Likewise.
11569 (__arm_vqrdmlashq_m_n_s32): Likewise.
11570 (__arm_vqrdmlashq_m_n_s16): Likewise.
11571 (__arm_vqrdmlashq_m_n_u8): Likewise.
11572 (__arm_vqrdmlashq_m_n_u32): Likewise.
11573 (__arm_vqrdmlashq_m_n_u16): Likewise.
11574 (__arm_vqrdmlsdhq_m_s8): Likewise.
11575 (__arm_vqrdmlsdhq_m_s32): Likewise.
11576 (__arm_vqrdmlsdhq_m_s16): Likewise.
11577 (__arm_vqrdmlsdhxq_m_s8): Likewise.
11578 (__arm_vqrdmlsdhxq_m_s32): Likewise.
11579 (__arm_vqrdmlsdhxq_m_s16): Likewise.
11580 (__arm_vqrdmulhq_m_n_s8): Likewise.
11581 (__arm_vqrdmulhq_m_n_s32): Likewise.
11582 (__arm_vqrdmulhq_m_n_s16): Likewise.
11583 (__arm_vqrdmulhq_m_s8): Likewise.
11584 (__arm_vqrdmulhq_m_s32): Likewise.
11585 (__arm_vqrdmulhq_m_s16): Likewise.
11586 (__arm_vqrshlq_m_s8): Likewise.
11587 (__arm_vqrshlq_m_s32): Likewise.
11588 (__arm_vqrshlq_m_s16): Likewise.
11589 (__arm_vqrshlq_m_u8): Likewise.
11590 (__arm_vqrshlq_m_u32): Likewise.
11591 (__arm_vqrshlq_m_u16): Likewise.
11592 (__arm_vqshlq_m_n_s8): Likewise.
11593 (__arm_vqshlq_m_n_s32): Likewise.
11594 (__arm_vqshlq_m_n_s16): Likewise.
11595 (__arm_vqshlq_m_n_u8): Likewise.
11596 (__arm_vqshlq_m_n_u32): Likewise.
11597 (__arm_vqshlq_m_n_u16): Likewise.
11598 (__arm_vqshlq_m_s8): Likewise.
11599 (__arm_vqshlq_m_s32): Likewise.
11600 (__arm_vqshlq_m_s16): Likewise.
11601 (__arm_vqshlq_m_u8): Likewise.
11602 (__arm_vqshlq_m_u32): Likewise.
11603 (__arm_vqshlq_m_u16): Likewise.
11604 (__arm_vqsubq_m_n_s8): Likewise.
11605 (__arm_vqsubq_m_n_s32): Likewise.
11606 (__arm_vqsubq_m_n_s16): Likewise.
11607 (__arm_vqsubq_m_n_u8): Likewise.
11608 (__arm_vqsubq_m_n_u32): Likewise.
11609 (__arm_vqsubq_m_n_u16): Likewise.
11610 (__arm_vqsubq_m_s8): Likewise.
11611 (__arm_vqsubq_m_s32): Likewise.
11612 (__arm_vqsubq_m_s16): Likewise.
11613 (__arm_vqsubq_m_u8): Likewise.
11614 (__arm_vqsubq_m_u32): Likewise.
11615 (__arm_vqsubq_m_u16): Likewise.
11616 (__arm_vrhaddq_m_s8): Likewise.
11617 (__arm_vrhaddq_m_s32): Likewise.
11618 (__arm_vrhaddq_m_s16): Likewise.
11619 (__arm_vrhaddq_m_u8): Likewise.
11620 (__arm_vrhaddq_m_u32): Likewise.
11621 (__arm_vrhaddq_m_u16): Likewise.
11622 (__arm_vrmulhq_m_s8): Likewise.
11623 (__arm_vrmulhq_m_s32): Likewise.
11624 (__arm_vrmulhq_m_s16): Likewise.
11625 (__arm_vrmulhq_m_u8): Likewise.
11626 (__arm_vrmulhq_m_u32): Likewise.
11627 (__arm_vrmulhq_m_u16): Likewise.
11628 (__arm_vrshlq_m_s8): Likewise.
11629 (__arm_vrshlq_m_s32): Likewise.
11630 (__arm_vrshlq_m_s16): Likewise.
11631 (__arm_vrshlq_m_u8): Likewise.
11632 (__arm_vrshlq_m_u32): Likewise.
11633 (__arm_vrshlq_m_u16): Likewise.
11634 (__arm_vrshrq_m_n_s8): Likewise.
11635 (__arm_vrshrq_m_n_s32): Likewise.
11636 (__arm_vrshrq_m_n_s16): Likewise.
11637 (__arm_vrshrq_m_n_u8): Likewise.
11638 (__arm_vrshrq_m_n_u32): Likewise.
11639 (__arm_vrshrq_m_n_u16): Likewise.
11640 (__arm_vshlq_m_n_s8): Likewise.
11641 (__arm_vshlq_m_n_s32): Likewise.
11642 (__arm_vshlq_m_n_s16): Likewise.
11643 (__arm_vshlq_m_n_u8): Likewise.
11644 (__arm_vshlq_m_n_u32): Likewise.
11645 (__arm_vshlq_m_n_u16): Likewise.
11646 (__arm_vshrq_m_n_s8): Likewise.
11647 (__arm_vshrq_m_n_s32): Likewise.
11648 (__arm_vshrq_m_n_s16): Likewise.
11649 (__arm_vshrq_m_n_u8): Likewise.
11650 (__arm_vshrq_m_n_u32): Likewise.
11651 (__arm_vshrq_m_n_u16): Likewise.
11652 (__arm_vsliq_m_n_s8): Likewise.
11653 (__arm_vsliq_m_n_s32): Likewise.
11654 (__arm_vsliq_m_n_s16): Likewise.
11655 (__arm_vsliq_m_n_u8): Likewise.
11656 (__arm_vsliq_m_n_u32): Likewise.
11657 (__arm_vsliq_m_n_u16): Likewise.
11658 (__arm_vsubq_m_n_s8): Likewise.
11659 (__arm_vsubq_m_n_s32): Likewise.
11660 (__arm_vsubq_m_n_s16): Likewise.
11661 (__arm_vsubq_m_n_u8): Likewise.
11662 (__arm_vsubq_m_n_u32): Likewise.
11663 (__arm_vsubq_m_n_u16): Likewise.
11664 (vqdmladhq_m): Define polymorphic variant.
11665 (vqdmladhxq_m): Likewise.
11666 (vqdmlsdhq_m): Likewise.
11667 (vqdmlsdhxq_m): Likewise.
11668 (vabdq_m): Likewise.
11669 (vandq_m): Likewise.
11670 (vbicq_m): Likewise.
11671 (vbrsrq_m_n): Likewise.
11672 (vcaddq_rot270_m): Likewise.
11673 (vcaddq_rot90_m): Likewise.
11674 (veorq_m): Likewise.
11675 (vmaxq_m): Likewise.
11676 (vminq_m): Likewise.
11677 (vmladavaq_p): Likewise.
11678 (vmlaq_m_n): Likewise.
11679 (vmlasq_m_n): Likewise.
11680 (vmulhq_m): Likewise.
11681 (vmullbq_int_m): Likewise.
11682 (vmulltq_int_m): Likewise.
11683 (vornq_m): Likewise.
11684 (vorrq_m): Likewise.
11685 (vqdmlahq_m_n): Likewise.
11686 (vqrdmlahq_m_n): Likewise.
11687 (vqrdmlashq_m_n): Likewise.
11688 (vqrshlq_m): Likewise.
11689 (vqshlq_m_n): Likewise.
11690 (vqshlq_m): Likewise.
11691 (vrhaddq_m): Likewise.
11692 (vrmulhq_m): Likewise.
11693 (vrshlq_m): Likewise.
11694 (vrshrq_m_n): Likewise.
11695 (vshlq_m_n): Likewise.
11696 (vshrq_m_n): Likewise.
11697 (vsliq_m): Likewise.
11698 (vaddq_m_n): Likewise.
11699 (vaddq_m): Likewise.
11700 (vhaddq_m_n): Likewise.
11701 (vhaddq_m): Likewise.
11702 (vhcaddq_rot270_m): Likewise.
11703 (vhcaddq_rot90_m): Likewise.
11704 (vhsubq_m): Likewise.
11705 (vhsubq_m_n): Likewise.
11706 (vmulq_m_n): Likewise.
11707 (vmulq_m): Likewise.
11708 (vqaddq_m_n): Likewise.
11709 (vqaddq_m): Likewise.
11710 (vqdmulhq_m_n): Likewise.
11711 (vqdmulhq_m): Likewise.
11712 (vsubq_m_n): Likewise.
11713 (vsliq_m_n): Likewise.
11714 (vqsubq_m_n): Likewise.
11715 (vqsubq_m): Likewise.
11716 (vqrdmulhq_m): Likewise.
11717 (vqrdmulhq_m_n): Likewise.
11718 (vqrdmlsdhxq_m): Likewise.
11719 (vqrdmlsdhq_m): Likewise.
11720 (vqrdmladhq_m): Likewise.
11721 (vqrdmladhxq_m): Likewise.
11722 (vmlsdavaxq_p): Likewise.
11723 (vmlsdavaq_p): Likewise.
11724 (vmladavaxq_p): Likewise.
11725 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
11727 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
11728 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
11729 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
11730 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
11731 * config/arm/mve.md (VHSUBQ_M): Define iterators.
11732 (VSLIQ_M_N): Likewise.
11733 (VQRDMLAHQ_M_N): Likewise.
11734 (VRSHLQ_M): Likewise.
11735 (VMINQ_M): Likewise.
11736 (VMULLBQ_INT_M): Likewise.
11737 (VMULHQ_M): Likewise.
11738 (VMULQ_M): Likewise.
11739 (VHSUBQ_M_N): Likewise.
11740 (VHADDQ_M_N): Likewise.
11741 (VORRQ_M): Likewise.
11742 (VRMULHQ_M): Likewise.
11743 (VQADDQ_M): Likewise.
11744 (VRSHRQ_M_N): Likewise.
11745 (VQSUBQ_M_N): Likewise.
11746 (VADDQ_M): Likewise.
11747 (VORNQ_M): Likewise.
11748 (VQDMLAHQ_M_N): Likewise.
11749 (VRHADDQ_M): Likewise.
11750 (VQSHLQ_M): Likewise.
11751 (VANDQ_M): Likewise.
11752 (VBICQ_M): Likewise.
11753 (VSHLQ_M_N): Likewise.
11754 (VCADDQ_ROT270_M): Likewise.
11755 (VQRSHLQ_M): Likewise.
11756 (VQADDQ_M_N): Likewise.
11757 (VADDQ_M_N): Likewise.
11758 (VMAXQ_M): Likewise.
11759 (VQSUBQ_M): Likewise.
11760 (VMLASQ_M_N): Likewise.
11761 (VMLADAVAQ_P): Likewise.
11762 (VBRSRQ_M_N): Likewise.
11763 (VMULQ_M_N): Likewise.
11764 (VCADDQ_ROT90_M): Likewise.
11765 (VMULLTQ_INT_M): Likewise.
11766 (VEORQ_M): Likewise.
11767 (VSHRQ_M_N): Likewise.
11768 (VSUBQ_M_N): Likewise.
11769 (VHADDQ_M): Likewise.
11770 (VABDQ_M): Likewise.
11771 (VQRDMLASHQ_M_N): Likewise.
11772 (VMLAQ_M_N): Likewise.
11773 (VQSHLQ_M_N): Likewise.
11774 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
11775 (mve_vaddq_m_n_<supf><mode>): Likewise.
11776 (mve_vaddq_m_<supf><mode>): Likewise.
11777 (mve_vandq_m_<supf><mode>): Likewise.
11778 (mve_vbicq_m_<supf><mode>): Likewise.
11779 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
11780 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
11781 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
11782 (mve_veorq_m_<supf><mode>): Likewise.
11783 (mve_vhaddq_m_n_<supf><mode>): Likewise.
11784 (mve_vhaddq_m_<supf><mode>): Likewise.
11785 (mve_vhsubq_m_n_<supf><mode>): Likewise.
11786 (mve_vhsubq_m_<supf><mode>): Likewise.
11787 (mve_vmaxq_m_<supf><mode>): Likewise.
11788 (mve_vminq_m_<supf><mode>): Likewise.
11789 (mve_vmladavaq_p_<supf><mode>): Likewise.
11790 (mve_vmlaq_m_n_<supf><mode>): Likewise.
11791 (mve_vmlasq_m_n_<supf><mode>): Likewise.
11792 (mve_vmulhq_m_<supf><mode>): Likewise.
11793 (mve_vmullbq_int_m_<supf><mode>): Likewise.
11794 (mve_vmulltq_int_m_<supf><mode>): Likewise.
11795 (mve_vmulq_m_n_<supf><mode>): Likewise.
11796 (mve_vmulq_m_<supf><mode>): Likewise.
11797 (mve_vornq_m_<supf><mode>): Likewise.
11798 (mve_vorrq_m_<supf><mode>): Likewise.
11799 (mve_vqaddq_m_n_<supf><mode>): Likewise.
11800 (mve_vqaddq_m_<supf><mode>): Likewise.
11801 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
11802 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
11803 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
11804 (mve_vqrshlq_m_<supf><mode>): Likewise.
11805 (mve_vqshlq_m_n_<supf><mode>): Likewise.
11806 (mve_vqshlq_m_<supf><mode>): Likewise.
11807 (mve_vqsubq_m_n_<supf><mode>): Likewise.
11808 (mve_vqsubq_m_<supf><mode>): Likewise.
11809 (mve_vrhaddq_m_<supf><mode>): Likewise.
11810 (mve_vrmulhq_m_<supf><mode>): Likewise.
11811 (mve_vrshlq_m_<supf><mode>): Likewise.
11812 (mve_vrshrq_m_n_<supf><mode>): Likewise.
11813 (mve_vshlq_m_n_<supf><mode>): Likewise.
11814 (mve_vshrq_m_n_<supf><mode>): Likewise.
11815 (mve_vsliq_m_n_<supf><mode>): Likewise.
11816 (mve_vsubq_m_n_<supf><mode>): Likewise.
11817 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
11818 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
11819 (mve_vmladavaxq_p_s<mode>): Likewise.
11820 (mve_vmlsdavaq_p_s<mode>): Likewise.
11821 (mve_vmlsdavaxq_p_s<mode>): Likewise.
11822 (mve_vqdmladhq_m_s<mode>): Likewise.
11823 (mve_vqdmladhxq_m_s<mode>): Likewise.
11824 (mve_vqdmlsdhq_m_s<mode>): Likewise.
11825 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
11826 (mve_vqdmulhq_m_n_s<mode>): Likewise.
11827 (mve_vqdmulhq_m_s<mode>): Likewise.
11828 (mve_vqrdmladhq_m_s<mode>): Likewise.
11829 (mve_vqrdmladhxq_m_s<mode>): Likewise.
11830 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
11831 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
11832 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
11833 (mve_vqrdmulhq_m_s<mode>): Likewise.
11835 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11836 Mihail Ionescu <mihail.ionescu@arm.com>
11837 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11839 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
11840 Define builtin qualifier.
11841 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
11842 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11843 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11844 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11845 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11846 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11847 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
11848 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
11849 (vsubq_m_s8): Likewise.
11850 (vcvtq_m_n_f16_u16): Likewise.
11851 (vqshluq_m_n_s8): Likewise.
11852 (vabavq_p_s8): Likewise.
11853 (vsriq_m_n_u8): Likewise.
11854 (vshlq_m_u8): Likewise.
11855 (vsubq_m_u8): Likewise.
11856 (vabavq_p_u8): Likewise.
11857 (vshlq_m_s8): Likewise.
11858 (vcvtq_m_n_f16_s16): Likewise.
11859 (vsriq_m_n_s16): Likewise.
11860 (vsubq_m_s16): Likewise.
11861 (vcvtq_m_n_f32_u32): Likewise.
11862 (vqshluq_m_n_s16): Likewise.
11863 (vabavq_p_s16): Likewise.
11864 (vsriq_m_n_u16): Likewise.
11865 (vshlq_m_u16): Likewise.
11866 (vsubq_m_u16): Likewise.
11867 (vabavq_p_u16): Likewise.
11868 (vshlq_m_s16): Likewise.
11869 (vcvtq_m_n_f32_s32): Likewise.
11870 (vsriq_m_n_s32): Likewise.
11871 (vsubq_m_s32): Likewise.
11872 (vqshluq_m_n_s32): Likewise.
11873 (vabavq_p_s32): Likewise.
11874 (vsriq_m_n_u32): Likewise.
11875 (vshlq_m_u32): Likewise.
11876 (vsubq_m_u32): Likewise.
11877 (vabavq_p_u32): Likewise.
11878 (vshlq_m_s32): Likewise.
11879 (__arm_vsriq_m_n_s8): Define intrinsic.
11880 (__arm_vsubq_m_s8): Likewise.
11881 (__arm_vqshluq_m_n_s8): Likewise.
11882 (__arm_vabavq_p_s8): Likewise.
11883 (__arm_vsriq_m_n_u8): Likewise.
11884 (__arm_vshlq_m_u8): Likewise.
11885 (__arm_vsubq_m_u8): Likewise.
11886 (__arm_vabavq_p_u8): Likewise.
11887 (__arm_vshlq_m_s8): Likewise.
11888 (__arm_vsriq_m_n_s16): Likewise.
11889 (__arm_vsubq_m_s16): Likewise.
11890 (__arm_vqshluq_m_n_s16): Likewise.
11891 (__arm_vabavq_p_s16): Likewise.
11892 (__arm_vsriq_m_n_u16): Likewise.
11893 (__arm_vshlq_m_u16): Likewise.
11894 (__arm_vsubq_m_u16): Likewise.
11895 (__arm_vabavq_p_u16): Likewise.
11896 (__arm_vshlq_m_s16): Likewise.
11897 (__arm_vsriq_m_n_s32): Likewise.
11898 (__arm_vsubq_m_s32): Likewise.
11899 (__arm_vqshluq_m_n_s32): Likewise.
11900 (__arm_vabavq_p_s32): Likewise.
11901 (__arm_vsriq_m_n_u32): Likewise.
11902 (__arm_vshlq_m_u32): Likewise.
11903 (__arm_vsubq_m_u32): Likewise.
11904 (__arm_vabavq_p_u32): Likewise.
11905 (__arm_vshlq_m_s32): Likewise.
11906 (__arm_vcvtq_m_n_f16_u16): Likewise.
11907 (__arm_vcvtq_m_n_f16_s16): Likewise.
11908 (__arm_vcvtq_m_n_f32_u32): Likewise.
11909 (__arm_vcvtq_m_n_f32_s32): Likewise.
11910 (vcvtq_m_n): Define polymorphic variant.
11911 (vqshluq_m_n): Likewise.
11912 (vshlq_m): Likewise.
11913 (vsriq_m_n): Likewise.
11914 (vsubq_m): Likewise.
11915 (vabavq_p): Likewise.
11916 * config/arm/arm_mve_builtins.def
11917 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
11918 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
11919 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11920 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11921 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11922 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11923 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11924 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
11925 * config/arm/mve.md (VABAVQ_P): Define iterator.
11926 (VSHLQ_M): Likewise.
11927 (VSRIQ_M_N): Likewise.
11928 (VSUBQ_M): Likewise.
11929 (VCVTQ_M_N_TO_F): Likewise.
11930 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
11931 (mve_vqshluq_m_n_s<mode>): Likewise.
11932 (mve_vshlq_m_<supf><mode>): Likewise.
11933 (mve_vsriq_m_n_<supf><mode>): Likewise.
11934 (mve_vsubq_m_<supf><mode>): Likewise.
11935 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
11937 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11938 Mihail Ionescu <mihail.ionescu@arm.com>
11939 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11941 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
11942 (vrmlsldavhaq_s32): Likewise.
11943 (vrmlsldavhaxq_s32): Likewise.
11944 (vaddlvaq_p_s32): Likewise.
11945 (vcvtbq_m_f16_f32): Likewise.
11946 (vcvtbq_m_f32_f16): Likewise.
11947 (vcvttq_m_f16_f32): Likewise.
11948 (vcvttq_m_f32_f16): Likewise.
11949 (vrev16q_m_s8): Likewise.
11950 (vrev32q_m_f16): Likewise.
11951 (vrmlaldavhq_p_s32): Likewise.
11952 (vrmlaldavhxq_p_s32): Likewise.
11953 (vrmlsldavhq_p_s32): Likewise.
11954 (vrmlsldavhxq_p_s32): Likewise.
11955 (vaddlvaq_p_u32): Likewise.
11956 (vrev16q_m_u8): Likewise.
11957 (vrmlaldavhq_p_u32): Likewise.
11958 (vmvnq_m_n_s16): Likewise.
11959 (vorrq_m_n_s16): Likewise.
11960 (vqrshrntq_n_s16): Likewise.
11961 (vqshrnbq_n_s16): Likewise.
11962 (vqshrntq_n_s16): Likewise.
11963 (vrshrnbq_n_s16): Likewise.
11964 (vrshrntq_n_s16): Likewise.
11965 (vshrnbq_n_s16): Likewise.
11966 (vshrntq_n_s16): Likewise.
11967 (vcmlaq_f16): Likewise.
11968 (vcmlaq_rot180_f16): Likewise.
11969 (vcmlaq_rot270_f16): Likewise.
11970 (vcmlaq_rot90_f16): Likewise.
11971 (vfmaq_f16): Likewise.
11972 (vfmaq_n_f16): Likewise.
11973 (vfmasq_n_f16): Likewise.
11974 (vfmsq_f16): Likewise.
11975 (vmlaldavaq_s16): Likewise.
11976 (vmlaldavaxq_s16): Likewise.
11977 (vmlsldavaq_s16): Likewise.
11978 (vmlsldavaxq_s16): Likewise.
11979 (vabsq_m_f16): Likewise.
11980 (vcvtmq_m_s16_f16): Likewise.
11981 (vcvtnq_m_s16_f16): Likewise.
11982 (vcvtpq_m_s16_f16): Likewise.
11983 (vcvtq_m_s16_f16): Likewise.
11984 (vdupq_m_n_f16): Likewise.
11985 (vmaxnmaq_m_f16): Likewise.
11986 (vmaxnmavq_p_f16): Likewise.
11987 (vmaxnmvq_p_f16): Likewise.
11988 (vminnmaq_m_f16): Likewise.
11989 (vminnmavq_p_f16): Likewise.
11990 (vminnmvq_p_f16): Likewise.
11991 (vmlaldavq_p_s16): Likewise.
11992 (vmlaldavxq_p_s16): Likewise.
11993 (vmlsldavq_p_s16): Likewise.
11994 (vmlsldavxq_p_s16): Likewise.
11995 (vmovlbq_m_s8): Likewise.
11996 (vmovltq_m_s8): Likewise.
11997 (vmovnbq_m_s16): Likewise.
11998 (vmovntq_m_s16): Likewise.
11999 (vnegq_m_f16): Likewise.
12000 (vpselq_f16): Likewise.
12001 (vqmovnbq_m_s16): Likewise.
12002 (vqmovntq_m_s16): Likewise.
12003 (vrev32q_m_s8): Likewise.
12004 (vrev64q_m_f16): Likewise.
12005 (vrndaq_m_f16): Likewise.
12006 (vrndmq_m_f16): Likewise.
12007 (vrndnq_m_f16): Likewise.
12008 (vrndpq_m_f16): Likewise.
12009 (vrndq_m_f16): Likewise.
12010 (vrndxq_m_f16): Likewise.
12011 (vcmpeqq_m_n_f16): Likewise.
12012 (vcmpgeq_m_f16): Likewise.
12013 (vcmpgeq_m_n_f16): Likewise.
12014 (vcmpgtq_m_f16): Likewise.
12015 (vcmpgtq_m_n_f16): Likewise.
12016 (vcmpleq_m_f16): Likewise.
12017 (vcmpleq_m_n_f16): Likewise.
12018 (vcmpltq_m_f16): Likewise.
12019 (vcmpltq_m_n_f16): Likewise.
12020 (vcmpneq_m_f16): Likewise.
12021 (vcmpneq_m_n_f16): Likewise.
12022 (vmvnq_m_n_u16): Likewise.
12023 (vorrq_m_n_u16): Likewise.
12024 (vqrshruntq_n_s16): Likewise.
12025 (vqshrunbq_n_s16): Likewise.
12026 (vqshruntq_n_s16): Likewise.
12027 (vcvtmq_m_u16_f16): Likewise.
12028 (vcvtnq_m_u16_f16): Likewise.
12029 (vcvtpq_m_u16_f16): Likewise.
12030 (vcvtq_m_u16_f16): Likewise.
12031 (vqmovunbq_m_s16): Likewise.
12032 (vqmovuntq_m_s16): Likewise.
12033 (vqrshrntq_n_u16): Likewise.
12034 (vqshrnbq_n_u16): Likewise.
12035 (vqshrntq_n_u16): Likewise.
12036 (vrshrnbq_n_u16): Likewise.
12037 (vrshrntq_n_u16): Likewise.
12038 (vshrnbq_n_u16): Likewise.
12039 (vshrntq_n_u16): Likewise.
12040 (vmlaldavaq_u16): Likewise.
12041 (vmlaldavaxq_u16): Likewise.
12042 (vmlaldavq_p_u16): Likewise.
12043 (vmlaldavxq_p_u16): Likewise.
12044 (vmovlbq_m_u8): Likewise.
12045 (vmovltq_m_u8): Likewise.
12046 (vmovnbq_m_u16): Likewise.
12047 (vmovntq_m_u16): Likewise.
12048 (vqmovnbq_m_u16): Likewise.
12049 (vqmovntq_m_u16): Likewise.
12050 (vrev32q_m_u8): Likewise.
12051 (vmvnq_m_n_s32): Likewise.
12052 (vorrq_m_n_s32): Likewise.
12053 (vqrshrntq_n_s32): Likewise.
12054 (vqshrnbq_n_s32): Likewise.
12055 (vqshrntq_n_s32): Likewise.
12056 (vrshrnbq_n_s32): Likewise.
12057 (vrshrntq_n_s32): Likewise.
12058 (vshrnbq_n_s32): Likewise.
12059 (vshrntq_n_s32): Likewise.
12060 (vcmlaq_f32): Likewise.
12061 (vcmlaq_rot180_f32): Likewise.
12062 (vcmlaq_rot270_f32): Likewise.
12063 (vcmlaq_rot90_f32): Likewise.
12064 (vfmaq_f32): Likewise.
12065 (vfmaq_n_f32): Likewise.
12066 (vfmasq_n_f32): Likewise.
12067 (vfmsq_f32): Likewise.
12068 (vmlaldavaq_s32): Likewise.
12069 (vmlaldavaxq_s32): Likewise.
12070 (vmlsldavaq_s32): Likewise.
12071 (vmlsldavaxq_s32): Likewise.
12072 (vabsq_m_f32): Likewise.
12073 (vcvtmq_m_s32_f32): Likewise.
12074 (vcvtnq_m_s32_f32): Likewise.
12075 (vcvtpq_m_s32_f32): Likewise.
12076 (vcvtq_m_s32_f32): Likewise.
12077 (vdupq_m_n_f32): Likewise.
12078 (vmaxnmaq_m_f32): Likewise.
12079 (vmaxnmavq_p_f32): Likewise.
12080 (vmaxnmvq_p_f32): Likewise.
12081 (vminnmaq_m_f32): Likewise.
12082 (vminnmavq_p_f32): Likewise.
12083 (vminnmvq_p_f32): Likewise.
12084 (vmlaldavq_p_s32): Likewise.
12085 (vmlaldavxq_p_s32): Likewise.
12086 (vmlsldavq_p_s32): Likewise.
12087 (vmlsldavxq_p_s32): Likewise.
12088 (vmovlbq_m_s16): Likewise.
12089 (vmovltq_m_s16): Likewise.
12090 (vmovnbq_m_s32): Likewise.
12091 (vmovntq_m_s32): Likewise.
12092 (vnegq_m_f32): Likewise.
12093 (vpselq_f32): Likewise.
12094 (vqmovnbq_m_s32): Likewise.
12095 (vqmovntq_m_s32): Likewise.
12096 (vrev32q_m_s16): Likewise.
12097 (vrev64q_m_f32): Likewise.
12098 (vrndaq_m_f32): Likewise.
12099 (vrndmq_m_f32): Likewise.
12100 (vrndnq_m_f32): Likewise.
12101 (vrndpq_m_f32): Likewise.
12102 (vrndq_m_f32): Likewise.
12103 (vrndxq_m_f32): Likewise.
12104 (vcmpeqq_m_n_f32): Likewise.
12105 (vcmpgeq_m_f32): Likewise.
12106 (vcmpgeq_m_n_f32): Likewise.
12107 (vcmpgtq_m_f32): Likewise.
12108 (vcmpgtq_m_n_f32): Likewise.
12109 (vcmpleq_m_f32): Likewise.
12110 (vcmpleq_m_n_f32): Likewise.
12111 (vcmpltq_m_f32): Likewise.
12112 (vcmpltq_m_n_f32): Likewise.
12113 (vcmpneq_m_f32): Likewise.
12114 (vcmpneq_m_n_f32): Likewise.
12115 (vmvnq_m_n_u32): Likewise.
12116 (vorrq_m_n_u32): Likewise.
12117 (vqrshruntq_n_s32): Likewise.
12118 (vqshrunbq_n_s32): Likewise.
12119 (vqshruntq_n_s32): Likewise.
12120 (vcvtmq_m_u32_f32): Likewise.
12121 (vcvtnq_m_u32_f32): Likewise.
12122 (vcvtpq_m_u32_f32): Likewise.
12123 (vcvtq_m_u32_f32): Likewise.
12124 (vqmovunbq_m_s32): Likewise.
12125 (vqmovuntq_m_s32): Likewise.
12126 (vqrshrntq_n_u32): Likewise.
12127 (vqshrnbq_n_u32): Likewise.
12128 (vqshrntq_n_u32): Likewise.
12129 (vrshrnbq_n_u32): Likewise.
12130 (vrshrntq_n_u32): Likewise.
12131 (vshrnbq_n_u32): Likewise.
12132 (vshrntq_n_u32): Likewise.
12133 (vmlaldavaq_u32): Likewise.
12134 (vmlaldavaxq_u32): Likewise.
12135 (vmlaldavq_p_u32): Likewise.
12136 (vmlaldavxq_p_u32): Likewise.
12137 (vmovlbq_m_u16): Likewise.
12138 (vmovltq_m_u16): Likewise.
12139 (vmovnbq_m_u32): Likewise.
12140 (vmovntq_m_u32): Likewise.
12141 (vqmovnbq_m_u32): Likewise.
12142 (vqmovntq_m_u32): Likewise.
12143 (vrev32q_m_u16): Likewise.
12144 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
12145 (__arm_vrmlsldavhaq_s32): Likewise.
12146 (__arm_vrmlsldavhaxq_s32): Likewise.
12147 (__arm_vaddlvaq_p_s32): Likewise.
12148 (__arm_vrev16q_m_s8): Likewise.
12149 (__arm_vrmlaldavhq_p_s32): Likewise.
12150 (__arm_vrmlaldavhxq_p_s32): Likewise.
12151 (__arm_vrmlsldavhq_p_s32): Likewise.
12152 (__arm_vrmlsldavhxq_p_s32): Likewise.
12153 (__arm_vaddlvaq_p_u32): Likewise.
12154 (__arm_vrev16q_m_u8): Likewise.
12155 (__arm_vrmlaldavhq_p_u32): Likewise.
12156 (__arm_vmvnq_m_n_s16): Likewise.
12157 (__arm_vorrq_m_n_s16): Likewise.
12158 (__arm_vqrshrntq_n_s16): Likewise.
12159 (__arm_vqshrnbq_n_s16): Likewise.
12160 (__arm_vqshrntq_n_s16): Likewise.
12161 (__arm_vrshrnbq_n_s16): Likewise.
12162 (__arm_vrshrntq_n_s16): Likewise.
12163 (__arm_vshrnbq_n_s16): Likewise.
12164 (__arm_vshrntq_n_s16): Likewise.
12165 (__arm_vmlaldavaq_s16): Likewise.
12166 (__arm_vmlaldavaxq_s16): Likewise.
12167 (__arm_vmlsldavaq_s16): Likewise.
12168 (__arm_vmlsldavaxq_s16): Likewise.
12169 (__arm_vmlaldavq_p_s16): Likewise.
12170 (__arm_vmlaldavxq_p_s16): Likewise.
12171 (__arm_vmlsldavq_p_s16): Likewise.
12172 (__arm_vmlsldavxq_p_s16): Likewise.
12173 (__arm_vmovlbq_m_s8): Likewise.
12174 (__arm_vmovltq_m_s8): Likewise.
12175 (__arm_vmovnbq_m_s16): Likewise.
12176 (__arm_vmovntq_m_s16): Likewise.
12177 (__arm_vqmovnbq_m_s16): Likewise.
12178 (__arm_vqmovntq_m_s16): Likewise.
12179 (__arm_vrev32q_m_s8): Likewise.
12180 (__arm_vmvnq_m_n_u16): Likewise.
12181 (__arm_vorrq_m_n_u16): Likewise.
12182 (__arm_vqrshruntq_n_s16): Likewise.
12183 (__arm_vqshrunbq_n_s16): Likewise.
12184 (__arm_vqshruntq_n_s16): Likewise.
12185 (__arm_vqmovunbq_m_s16): Likewise.
12186 (__arm_vqmovuntq_m_s16): Likewise.
12187 (__arm_vqrshrntq_n_u16): Likewise.
12188 (__arm_vqshrnbq_n_u16): Likewise.
12189 (__arm_vqshrntq_n_u16): Likewise.
12190 (__arm_vrshrnbq_n_u16): Likewise.
12191 (__arm_vrshrntq_n_u16): Likewise.
12192 (__arm_vshrnbq_n_u16): Likewise.
12193 (__arm_vshrntq_n_u16): Likewise.
12194 (__arm_vmlaldavaq_u16): Likewise.
12195 (__arm_vmlaldavaxq_u16): Likewise.
12196 (__arm_vmlaldavq_p_u16): Likewise.
12197 (__arm_vmlaldavxq_p_u16): Likewise.
12198 (__arm_vmovlbq_m_u8): Likewise.
12199 (__arm_vmovltq_m_u8): Likewise.
12200 (__arm_vmovnbq_m_u16): Likewise.
12201 (__arm_vmovntq_m_u16): Likewise.
12202 (__arm_vqmovnbq_m_u16): Likewise.
12203 (__arm_vqmovntq_m_u16): Likewise.
12204 (__arm_vrev32q_m_u8): Likewise.
12205 (__arm_vmvnq_m_n_s32): Likewise.
12206 (__arm_vorrq_m_n_s32): Likewise.
12207 (__arm_vqrshrntq_n_s32): Likewise.
12208 (__arm_vqshrnbq_n_s32): Likewise.
12209 (__arm_vqshrntq_n_s32): Likewise.
12210 (__arm_vrshrnbq_n_s32): Likewise.
12211 (__arm_vrshrntq_n_s32): Likewise.
12212 (__arm_vshrnbq_n_s32): Likewise.
12213 (__arm_vshrntq_n_s32): Likewise.
12214 (__arm_vmlaldavaq_s32): Likewise.
12215 (__arm_vmlaldavaxq_s32): Likewise.
12216 (__arm_vmlsldavaq_s32): Likewise.
12217 (__arm_vmlsldavaxq_s32): Likewise.
12218 (__arm_vmlaldavq_p_s32): Likewise.
12219 (__arm_vmlaldavxq_p_s32): Likewise.
12220 (__arm_vmlsldavq_p_s32): Likewise.
12221 (__arm_vmlsldavxq_p_s32): Likewise.
12222 (__arm_vmovlbq_m_s16): Likewise.
12223 (__arm_vmovltq_m_s16): Likewise.
12224 (__arm_vmovnbq_m_s32): Likewise.
12225 (__arm_vmovntq_m_s32): Likewise.
12226 (__arm_vqmovnbq_m_s32): Likewise.
12227 (__arm_vqmovntq_m_s32): Likewise.
12228 (__arm_vrev32q_m_s16): Likewise.
12229 (__arm_vmvnq_m_n_u32): Likewise.
12230 (__arm_vorrq_m_n_u32): Likewise.
12231 (__arm_vqrshruntq_n_s32): Likewise.
12232 (__arm_vqshrunbq_n_s32): Likewise.
12233 (__arm_vqshruntq_n_s32): Likewise.
12234 (__arm_vqmovunbq_m_s32): Likewise.
12235 (__arm_vqmovuntq_m_s32): Likewise.
12236 (__arm_vqrshrntq_n_u32): Likewise.
12237 (__arm_vqshrnbq_n_u32): Likewise.
12238 (__arm_vqshrntq_n_u32): Likewise.
12239 (__arm_vrshrnbq_n_u32): Likewise.
12240 (__arm_vrshrntq_n_u32): Likewise.
12241 (__arm_vshrnbq_n_u32): Likewise.
12242 (__arm_vshrntq_n_u32): Likewise.
12243 (__arm_vmlaldavaq_u32): Likewise.
12244 (__arm_vmlaldavaxq_u32): Likewise.
12245 (__arm_vmlaldavq_p_u32): Likewise.
12246 (__arm_vmlaldavxq_p_u32): Likewise.
12247 (__arm_vmovlbq_m_u16): Likewise.
12248 (__arm_vmovltq_m_u16): Likewise.
12249 (__arm_vmovnbq_m_u32): Likewise.
12250 (__arm_vmovntq_m_u32): Likewise.
12251 (__arm_vqmovnbq_m_u32): Likewise.
12252 (__arm_vqmovntq_m_u32): Likewise.
12253 (__arm_vrev32q_m_u16): Likewise.
12254 (__arm_vcvtbq_m_f16_f32): Likewise.
12255 (__arm_vcvtbq_m_f32_f16): Likewise.
12256 (__arm_vcvttq_m_f16_f32): Likewise.
12257 (__arm_vcvttq_m_f32_f16): Likewise.
12258 (__arm_vrev32q_m_f16): Likewise.
12259 (__arm_vcmlaq_f16): Likewise.
12260 (__arm_vcmlaq_rot180_f16): Likewise.
12261 (__arm_vcmlaq_rot270_f16): Likewise.
12262 (__arm_vcmlaq_rot90_f16): Likewise.
12263 (__arm_vfmaq_f16): Likewise.
12264 (__arm_vfmaq_n_f16): Likewise.
12265 (__arm_vfmasq_n_f16): Likewise.
12266 (__arm_vfmsq_f16): Likewise.
12267 (__arm_vabsq_m_f16): Likewise.
12268 (__arm_vcvtmq_m_s16_f16): Likewise.
12269 (__arm_vcvtnq_m_s16_f16): Likewise.
12270 (__arm_vcvtpq_m_s16_f16): Likewise.
12271 (__arm_vcvtq_m_s16_f16): Likewise.
12272 (__arm_vdupq_m_n_f16): Likewise.
12273 (__arm_vmaxnmaq_m_f16): Likewise.
12274 (__arm_vmaxnmavq_p_f16): Likewise.
12275 (__arm_vmaxnmvq_p_f16): Likewise.
12276 (__arm_vminnmaq_m_f16): Likewise.
12277 (__arm_vminnmavq_p_f16): Likewise.
12278 (__arm_vminnmvq_p_f16): Likewise.
12279 (__arm_vnegq_m_f16): Likewise.
12280 (__arm_vpselq_f16): Likewise.
12281 (__arm_vrev64q_m_f16): Likewise.
12282 (__arm_vrndaq_m_f16): Likewise.
12283 (__arm_vrndmq_m_f16): Likewise.
12284 (__arm_vrndnq_m_f16): Likewise.
12285 (__arm_vrndpq_m_f16): Likewise.
12286 (__arm_vrndq_m_f16): Likewise.
12287 (__arm_vrndxq_m_f16): Likewise.
12288 (__arm_vcmpeqq_m_n_f16): Likewise.
12289 (__arm_vcmpgeq_m_f16): Likewise.
12290 (__arm_vcmpgeq_m_n_f16): Likewise.
12291 (__arm_vcmpgtq_m_f16): Likewise.
12292 (__arm_vcmpgtq_m_n_f16): Likewise.
12293 (__arm_vcmpleq_m_f16): Likewise.
12294 (__arm_vcmpleq_m_n_f16): Likewise.
12295 (__arm_vcmpltq_m_f16): Likewise.
12296 (__arm_vcmpltq_m_n_f16): Likewise.
12297 (__arm_vcmpneq_m_f16): Likewise.
12298 (__arm_vcmpneq_m_n_f16): Likewise.
12299 (__arm_vcvtmq_m_u16_f16): Likewise.
12300 (__arm_vcvtnq_m_u16_f16): Likewise.
12301 (__arm_vcvtpq_m_u16_f16): Likewise.
12302 (__arm_vcvtq_m_u16_f16): Likewise.
12303 (__arm_vcmlaq_f32): Likewise.
12304 (__arm_vcmlaq_rot180_f32): Likewise.
12305 (__arm_vcmlaq_rot270_f32): Likewise.
12306 (__arm_vcmlaq_rot90_f32): Likewise.
12307 (__arm_vfmaq_f32): Likewise.
12308 (__arm_vfmaq_n_f32): Likewise.
12309 (__arm_vfmasq_n_f32): Likewise.
12310 (__arm_vfmsq_f32): Likewise.
12311 (__arm_vabsq_m_f32): Likewise.
12312 (__arm_vcvtmq_m_s32_f32): Likewise.
12313 (__arm_vcvtnq_m_s32_f32): Likewise.
12314 (__arm_vcvtpq_m_s32_f32): Likewise.
12315 (__arm_vcvtq_m_s32_f32): Likewise.
12316 (__arm_vdupq_m_n_f32): Likewise.
12317 (__arm_vmaxnmaq_m_f32): Likewise.
12318 (__arm_vmaxnmavq_p_f32): Likewise.
12319 (__arm_vmaxnmvq_p_f32): Likewise.
12320 (__arm_vminnmaq_m_f32): Likewise.
12321 (__arm_vminnmavq_p_f32): Likewise.
12322 (__arm_vminnmvq_p_f32): Likewise.
12323 (__arm_vnegq_m_f32): Likewise.
12324 (__arm_vpselq_f32): Likewise.
12325 (__arm_vrev64q_m_f32): Likewise.
12326 (__arm_vrndaq_m_f32): Likewise.
12327 (__arm_vrndmq_m_f32): Likewise.
12328 (__arm_vrndnq_m_f32): Likewise.
12329 (__arm_vrndpq_m_f32): Likewise.
12330 (__arm_vrndq_m_f32): Likewise.
12331 (__arm_vrndxq_m_f32): Likewise.
12332 (__arm_vcmpeqq_m_n_f32): Likewise.
12333 (__arm_vcmpgeq_m_f32): Likewise.
12334 (__arm_vcmpgeq_m_n_f32): Likewise.
12335 (__arm_vcmpgtq_m_f32): Likewise.
12336 (__arm_vcmpgtq_m_n_f32): Likewise.
12337 (__arm_vcmpleq_m_f32): Likewise.
12338 (__arm_vcmpleq_m_n_f32): Likewise.
12339 (__arm_vcmpltq_m_f32): Likewise.
12340 (__arm_vcmpltq_m_n_f32): Likewise.
12341 (__arm_vcmpneq_m_f32): Likewise.
12342 (__arm_vcmpneq_m_n_f32): Likewise.
12343 (__arm_vcvtmq_m_u32_f32): Likewise.
12344 (__arm_vcvtnq_m_u32_f32): Likewise.
12345 (__arm_vcvtpq_m_u32_f32): Likewise.
12346 (__arm_vcvtq_m_u32_f32): Likewise.
12347 (vcvtq_m): Define polymorphic variant.
12348 (vabsq_m): Likewise.
12349 (vcmlaq): Likewise.
12350 (vcmlaq_rot180): Likewise.
12351 (vcmlaq_rot270): Likewise.
12352 (vcmlaq_rot90): Likewise.
12353 (vcmpeqq_m_n): Likewise.
12354 (vcmpgeq_m_n): Likewise.
12355 (vrndxq_m): Likewise.
12356 (vrndq_m): Likewise.
12357 (vrndpq_m): Likewise.
12358 (vcmpgtq_m_n): Likewise.
12359 (vcmpgtq_m): Likewise.
12360 (vcmpleq_m): Likewise.
12361 (vcmpleq_m_n): Likewise.
12362 (vcmpltq_m_n): Likewise.
12363 (vcmpltq_m): Likewise.
12364 (vcmpneq_m): Likewise.
12365 (vcmpneq_m_n): Likewise.
12366 (vcvtbq_m): Likewise.
12367 (vcvttq_m): Likewise.
12368 (vcvtmq_m): Likewise.
12369 (vcvtnq_m): Likewise.
12370 (vcvtpq_m): Likewise.
12371 (vdupq_m_n): Likewise.
12372 (vfmaq_n): Likewise.
12374 (vfmasq_n): Likewise.
12376 (vmaxnmaq_m): Likewise.
12377 (vmaxnmavq_m): Likewise.
12378 (vmaxnmvq_m): Likewise.
12379 (vmaxnmavq_p): Likewise.
12380 (vmaxnmvq_p): Likewise.
12381 (vminnmaq_m): Likewise.
12382 (vminnmavq_p): Likewise.
12383 (vminnmvq_p): Likewise.
12384 (vrndnq_m): Likewise.
12385 (vrndaq_m): Likewise.
12386 (vrndmq_m): Likewise.
12387 (vrev64q_m): Likewise.
12388 (vrev32q_m): Likewise.
12389 (vpselq): Likewise.
12390 (vnegq_m): Likewise.
12391 (vcmpgeq_m): Likewise.
12392 (vshrntq_n): Likewise.
12393 (vrshrntq_n): Likewise.
12394 (vmovlbq_m): Likewise.
12395 (vmovnbq_m): Likewise.
12396 (vmovntq_m): Likewise.
12397 (vmvnq_m_n): Likewise.
12398 (vmvnq_m): Likewise.
12399 (vshrnbq_n): Likewise.
12400 (vrshrnbq_n): Likewise.
12401 (vqshruntq_n): Likewise.
12402 (vrev16q_m): Likewise.
12403 (vqshrunbq_n): Likewise.
12404 (vqshrntq_n): Likewise.
12405 (vqrshruntq_n): Likewise.
12406 (vqrshrntq_n): Likewise.
12407 (vqshrnbq_n): Likewise.
12408 (vqmovuntq_m): Likewise.
12409 (vqmovntq_m): Likewise.
12410 (vqmovnbq_m): Likewise.
12411 (vorrq_m_n): Likewise.
12412 (vmovltq_m): Likewise.
12413 (vqmovunbq_m): Likewise.
12414 (vaddlvaq_p): Likewise.
12415 (vmlaldavaq): Likewise.
12416 (vmlaldavaxq): Likewise.
12417 (vmlaldavq_p): Likewise.
12418 (vmlaldavxq_p): Likewise.
12419 (vmlsldavaq): Likewise.
12420 (vmlsldavaxq): Likewise.
12421 (vmlsldavq_p): Likewise.
12422 (vmlsldavxq_p): Likewise.
12423 (vrmlaldavhaxq): Likewise.
12424 (vrmlaldavhq_p): Likewise.
12425 (vrmlaldavhxq_p): Likewise.
12426 (vrmlsldavhaq): Likewise.
12427 (vrmlsldavhaxq): Likewise.
12428 (vrmlsldavhq_p): Likewise.
12429 (vrmlsldavhxq_p): Likewise.
12430 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
12432 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
12433 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
12434 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
12435 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
12436 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
12437 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
12438 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
12439 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
12440 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
12441 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
12442 (MVE_pred3): Likewise.
12443 (MVE_constraint1): Likewise.
12444 (MVE_pred1): Likewise.
12445 (VMLALDAVQ_P): Define iterator.
12446 (VQMOVNBQ_M): Likewise.
12447 (VMOVLTQ_M): Likewise.
12448 (VMOVNBQ_M): Likewise.
12449 (VRSHRNTQ_N): Likewise.
12450 (VORRQ_M_N): Likewise.
12451 (VREV32Q_M): Likewise.
12452 (VREV16Q_M): Likewise.
12453 (VQRSHRNTQ_N): Likewise.
12454 (VMOVNTQ_M): Likewise.
12455 (VMOVLBQ_M): Likewise.
12456 (VMLALDAVAQ): Likewise.
12457 (VQSHRNBQ_N): Likewise.
12458 (VSHRNBQ_N): Likewise.
12459 (VRSHRNBQ_N): Likewise.
12460 (VMLALDAVXQ_P): Likewise.
12461 (VQMOVNTQ_M): Likewise.
12462 (VMVNQ_M_N): Likewise.
12463 (VQSHRNTQ_N): Likewise.
12464 (VMLALDAVAXQ): Likewise.
12465 (VSHRNTQ_N): Likewise.
12466 (VCVTMQ_M): Likewise.
12467 (VCVTNQ_M): Likewise.
12468 (VCVTPQ_M): Likewise.
12469 (VCVTQ_M_N_FROM_F): Likewise.
12470 (VCVTQ_M_FROM_F): Likewise.
12471 (VRMLALDAVHQ_P): Likewise.
12472 (VADDLVAQ_P): Likewise.
12473 (mve_vrndq_m_f<mode>): Define RTL pattern.
12474 (mve_vabsq_m_f<mode>): Likewise.
12475 (mve_vaddlvaq_p_<supf>v4si): Likewise.
12476 (mve_vcmlaq_f<mode>): Likewise.
12477 (mve_vcmlaq_rot180_f<mode>): Likewise.
12478 (mve_vcmlaq_rot270_f<mode>): Likewise.
12479 (mve_vcmlaq_rot90_f<mode>): Likewise.
12480 (mve_vcmpeqq_m_n_f<mode>): Likewise.
12481 (mve_vcmpgeq_m_f<mode>): Likewise.
12482 (mve_vcmpgeq_m_n_f<mode>): Likewise.
12483 (mve_vcmpgtq_m_f<mode>): Likewise.
12484 (mve_vcmpgtq_m_n_f<mode>): Likewise.
12485 (mve_vcmpleq_m_f<mode>): Likewise.
12486 (mve_vcmpleq_m_n_f<mode>): Likewise.
12487 (mve_vcmpltq_m_f<mode>): Likewise.
12488 (mve_vcmpltq_m_n_f<mode>): Likewise.
12489 (mve_vcmpneq_m_f<mode>): Likewise.
12490 (mve_vcmpneq_m_n_f<mode>): Likewise.
12491 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
12492 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
12493 (mve_vcvttq_m_f16_f32v8hf): Likewise.
12494 (mve_vcvttq_m_f32_f16v4sf): Likewise.
12495 (mve_vdupq_m_n_f<mode>): Likewise.
12496 (mve_vfmaq_f<mode>): Likewise.
12497 (mve_vfmaq_n_f<mode>): Likewise.
12498 (mve_vfmasq_n_f<mode>): Likewise.
12499 (mve_vfmsq_f<mode>): Likewise.
12500 (mve_vmaxnmaq_m_f<mode>): Likewise.
12501 (mve_vmaxnmavq_p_f<mode>): Likewise.
12502 (mve_vmaxnmvq_p_f<mode>): Likewise.
12503 (mve_vminnmaq_m_f<mode>): Likewise.
12504 (mve_vminnmavq_p_f<mode>): Likewise.
12505 (mve_vminnmvq_p_f<mode>): Likewise.
12506 (mve_vmlaldavaq_<supf><mode>): Likewise.
12507 (mve_vmlaldavaxq_<supf><mode>): Likewise.
12508 (mve_vmlaldavq_p_<supf><mode>): Likewise.
12509 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
12510 (mve_vmlsldavaq_s<mode>): Likewise.
12511 (mve_vmlsldavaxq_s<mode>): Likewise.
12512 (mve_vmlsldavq_p_s<mode>): Likewise.
12513 (mve_vmlsldavxq_p_s<mode>): Likewise.
12514 (mve_vmovlbq_m_<supf><mode>): Likewise.
12515 (mve_vmovltq_m_<supf><mode>): Likewise.
12516 (mve_vmovnbq_m_<supf><mode>): Likewise.
12517 (mve_vmovntq_m_<supf><mode>): Likewise.
12518 (mve_vmvnq_m_n_<supf><mode>): Likewise.
12519 (mve_vnegq_m_f<mode>): Likewise.
12520 (mve_vorrq_m_n_<supf><mode>): Likewise.
12521 (mve_vpselq_f<mode>): Likewise.
12522 (mve_vqmovnbq_m_<supf><mode>): Likewise.
12523 (mve_vqmovntq_m_<supf><mode>): Likewise.
12524 (mve_vqmovunbq_m_s<mode>): Likewise.
12525 (mve_vqmovuntq_m_s<mode>): Likewise.
12526 (mve_vqrshrntq_n_<supf><mode>): Likewise.
12527 (mve_vqrshruntq_n_s<mode>): Likewise.
12528 (mve_vqshrnbq_n_<supf><mode>): Likewise.
12529 (mve_vqshrntq_n_<supf><mode>): Likewise.
12530 (mve_vqshrunbq_n_s<mode>): Likewise.
12531 (mve_vqshruntq_n_s<mode>): Likewise.
12532 (mve_vrev32q_m_fv8hf): Likewise.
12533 (mve_vrev32q_m_<supf><mode>): Likewise.
12534 (mve_vrev64q_m_f<mode>): Likewise.
12535 (mve_vrmlaldavhaxq_sv4si): Likewise.
12536 (mve_vrmlaldavhxq_p_sv4si): Likewise.
12537 (mve_vrmlsldavhaxq_sv4si): Likewise.
12538 (mve_vrmlsldavhq_p_sv4si): Likewise.
12539 (mve_vrmlsldavhxq_p_sv4si): Likewise.
12540 (mve_vrndaq_m_f<mode>): Likewise.
12541 (mve_vrndmq_m_f<mode>): Likewise.
12542 (mve_vrndnq_m_f<mode>): Likewise.
12543 (mve_vrndpq_m_f<mode>): Likewise.
12544 (mve_vrndxq_m_f<mode>): Likewise.
12545 (mve_vrshrnbq_n_<supf><mode>): Likewise.
12546 (mve_vrshrntq_n_<supf><mode>): Likewise.
12547 (mve_vshrnbq_n_<supf><mode>): Likewise.
12548 (mve_vshrntq_n_<supf><mode>): Likewise.
12549 (mve_vcvtmq_m_<supf><mode>): Likewise.
12550 (mve_vcvtpq_m_<supf><mode>): Likewise.
12551 (mve_vcvtnq_m_<supf><mode>): Likewise.
12552 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
12553 (mve_vrev16q_m_<supf>v16qi): Likewise.
12554 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
12555 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
12556 (mve_vrmlsldavhaq_sv4si): Likewise.
12558 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12559 Mihail Ionescu <mihail.ionescu@arm.com>
12560 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12562 * config/arm/arm_mve.h (vpselq_u8): Define macro.
12563 (vpselq_s8): Likewise.
12564 (vrev64q_m_u8): Likewise.
12565 (vqrdmlashq_n_u8): Likewise.
12566 (vqrdmlahq_n_u8): Likewise.
12567 (vqdmlahq_n_u8): Likewise.
12568 (vmvnq_m_u8): Likewise.
12569 (vmlasq_n_u8): Likewise.
12570 (vmlaq_n_u8): Likewise.
12571 (vmladavq_p_u8): Likewise.
12572 (vmladavaq_u8): Likewise.
12573 (vminvq_p_u8): Likewise.
12574 (vmaxvq_p_u8): Likewise.
12575 (vdupq_m_n_u8): Likewise.
12576 (vcmpneq_m_u8): Likewise.
12577 (vcmpneq_m_n_u8): Likewise.
12578 (vcmphiq_m_u8): Likewise.
12579 (vcmphiq_m_n_u8): Likewise.
12580 (vcmpeqq_m_u8): Likewise.
12581 (vcmpeqq_m_n_u8): Likewise.
12582 (vcmpcsq_m_u8): Likewise.
12583 (vcmpcsq_m_n_u8): Likewise.
12584 (vclzq_m_u8): Likewise.
12585 (vaddvaq_p_u8): Likewise.
12586 (vsriq_n_u8): Likewise.
12587 (vsliq_n_u8): Likewise.
12588 (vshlq_m_r_u8): Likewise.
12589 (vrshlq_m_n_u8): Likewise.
12590 (vqshlq_m_r_u8): Likewise.
12591 (vqrshlq_m_n_u8): Likewise.
12592 (vminavq_p_s8): Likewise.
12593 (vminaq_m_s8): Likewise.
12594 (vmaxavq_p_s8): Likewise.
12595 (vmaxaq_m_s8): Likewise.
12596 (vcmpneq_m_s8): Likewise.
12597 (vcmpneq_m_n_s8): Likewise.
12598 (vcmpltq_m_s8): Likewise.
12599 (vcmpltq_m_n_s8): Likewise.
12600 (vcmpleq_m_s8): Likewise.
12601 (vcmpleq_m_n_s8): Likewise.
12602 (vcmpgtq_m_s8): Likewise.
12603 (vcmpgtq_m_n_s8): Likewise.
12604 (vcmpgeq_m_s8): Likewise.
12605 (vcmpgeq_m_n_s8): Likewise.
12606 (vcmpeqq_m_s8): Likewise.
12607 (vcmpeqq_m_n_s8): Likewise.
12608 (vshlq_m_r_s8): Likewise.
12609 (vrshlq_m_n_s8): Likewise.
12610 (vrev64q_m_s8): Likewise.
12611 (vqshlq_m_r_s8): Likewise.
12612 (vqrshlq_m_n_s8): Likewise.
12613 (vqnegq_m_s8): Likewise.
12614 (vqabsq_m_s8): Likewise.
12615 (vnegq_m_s8): Likewise.
12616 (vmvnq_m_s8): Likewise.
12617 (vmlsdavxq_p_s8): Likewise.
12618 (vmlsdavq_p_s8): Likewise.
12619 (vmladavxq_p_s8): Likewise.
12620 (vmladavq_p_s8): Likewise.
12621 (vminvq_p_s8): Likewise.
12622 (vmaxvq_p_s8): Likewise.
12623 (vdupq_m_n_s8): Likewise.
12624 (vclzq_m_s8): Likewise.
12625 (vclsq_m_s8): Likewise.
12626 (vaddvaq_p_s8): Likewise.
12627 (vabsq_m_s8): Likewise.
12628 (vqrdmlsdhxq_s8): Likewise.
12629 (vqrdmlsdhq_s8): Likewise.
12630 (vqrdmlashq_n_s8): Likewise.
12631 (vqrdmlahq_n_s8): Likewise.
12632 (vqrdmladhxq_s8): Likewise.
12633 (vqrdmladhq_s8): Likewise.
12634 (vqdmlsdhxq_s8): Likewise.
12635 (vqdmlsdhq_s8): Likewise.
12636 (vqdmlahq_n_s8): Likewise.
12637 (vqdmladhxq_s8): Likewise.
12638 (vqdmladhq_s8): Likewise.
12639 (vmlsdavaxq_s8): Likewise.
12640 (vmlsdavaq_s8): Likewise.
12641 (vmlasq_n_s8): Likewise.
12642 (vmlaq_n_s8): Likewise.
12643 (vmladavaxq_s8): Likewise.
12644 (vmladavaq_s8): Likewise.
12645 (vsriq_n_s8): Likewise.
12646 (vsliq_n_s8): Likewise.
12647 (vpselq_u16): Likewise.
12648 (vpselq_s16): Likewise.
12649 (vrev64q_m_u16): Likewise.
12650 (vqrdmlashq_n_u16): Likewise.
12651 (vqrdmlahq_n_u16): Likewise.
12652 (vqdmlahq_n_u16): Likewise.
12653 (vmvnq_m_u16): Likewise.
12654 (vmlasq_n_u16): Likewise.
12655 (vmlaq_n_u16): Likewise.
12656 (vmladavq_p_u16): Likewise.
12657 (vmladavaq_u16): Likewise.
12658 (vminvq_p_u16): Likewise.
12659 (vmaxvq_p_u16): Likewise.
12660 (vdupq_m_n_u16): Likewise.
12661 (vcmpneq_m_u16): Likewise.
12662 (vcmpneq_m_n_u16): Likewise.
12663 (vcmphiq_m_u16): Likewise.
12664 (vcmphiq_m_n_u16): Likewise.
12665 (vcmpeqq_m_u16): Likewise.
12666 (vcmpeqq_m_n_u16): Likewise.
12667 (vcmpcsq_m_u16): Likewise.
12668 (vcmpcsq_m_n_u16): Likewise.
12669 (vclzq_m_u16): Likewise.
12670 (vaddvaq_p_u16): Likewise.
12671 (vsriq_n_u16): Likewise.
12672 (vsliq_n_u16): Likewise.
12673 (vshlq_m_r_u16): Likewise.
12674 (vrshlq_m_n_u16): Likewise.
12675 (vqshlq_m_r_u16): Likewise.
12676 (vqrshlq_m_n_u16): Likewise.
12677 (vminavq_p_s16): Likewise.
12678 (vminaq_m_s16): Likewise.
12679 (vmaxavq_p_s16): Likewise.
12680 (vmaxaq_m_s16): Likewise.
12681 (vcmpneq_m_s16): Likewise.
12682 (vcmpneq_m_n_s16): Likewise.
12683 (vcmpltq_m_s16): Likewise.
12684 (vcmpltq_m_n_s16): Likewise.
12685 (vcmpleq_m_s16): Likewise.
12686 (vcmpleq_m_n_s16): Likewise.
12687 (vcmpgtq_m_s16): Likewise.
12688 (vcmpgtq_m_n_s16): Likewise.
12689 (vcmpgeq_m_s16): Likewise.
12690 (vcmpgeq_m_n_s16): Likewise.
12691 (vcmpeqq_m_s16): Likewise.
12692 (vcmpeqq_m_n_s16): Likewise.
12693 (vshlq_m_r_s16): Likewise.
12694 (vrshlq_m_n_s16): Likewise.
12695 (vrev64q_m_s16): Likewise.
12696 (vqshlq_m_r_s16): Likewise.
12697 (vqrshlq_m_n_s16): Likewise.
12698 (vqnegq_m_s16): Likewise.
12699 (vqabsq_m_s16): Likewise.
12700 (vnegq_m_s16): Likewise.
12701 (vmvnq_m_s16): Likewise.
12702 (vmlsdavxq_p_s16): Likewise.
12703 (vmlsdavq_p_s16): Likewise.
12704 (vmladavxq_p_s16): Likewise.
12705 (vmladavq_p_s16): Likewise.
12706 (vminvq_p_s16): Likewise.
12707 (vmaxvq_p_s16): Likewise.
12708 (vdupq_m_n_s16): Likewise.
12709 (vclzq_m_s16): Likewise.
12710 (vclsq_m_s16): Likewise.
12711 (vaddvaq_p_s16): Likewise.
12712 (vabsq_m_s16): Likewise.
12713 (vqrdmlsdhxq_s16): Likewise.
12714 (vqrdmlsdhq_s16): Likewise.
12715 (vqrdmlashq_n_s16): Likewise.
12716 (vqrdmlahq_n_s16): Likewise.
12717 (vqrdmladhxq_s16): Likewise.
12718 (vqrdmladhq_s16): Likewise.
12719 (vqdmlsdhxq_s16): Likewise.
12720 (vqdmlsdhq_s16): Likewise.
12721 (vqdmlahq_n_s16): Likewise.
12722 (vqdmladhxq_s16): Likewise.
12723 (vqdmladhq_s16): Likewise.
12724 (vmlsdavaxq_s16): Likewise.
12725 (vmlsdavaq_s16): Likewise.
12726 (vmlasq_n_s16): Likewise.
12727 (vmlaq_n_s16): Likewise.
12728 (vmladavaxq_s16): Likewise.
12729 (vmladavaq_s16): Likewise.
12730 (vsriq_n_s16): Likewise.
12731 (vsliq_n_s16): Likewise.
12732 (vpselq_u32): Likewise.
12733 (vpselq_s32): Likewise.
12734 (vrev64q_m_u32): Likewise.
12735 (vqrdmlashq_n_u32): Likewise.
12736 (vqrdmlahq_n_u32): Likewise.
12737 (vqdmlahq_n_u32): Likewise.
12738 (vmvnq_m_u32): Likewise.
12739 (vmlasq_n_u32): Likewise.
12740 (vmlaq_n_u32): Likewise.
12741 (vmladavq_p_u32): Likewise.
12742 (vmladavaq_u32): Likewise.
12743 (vminvq_p_u32): Likewise.
12744 (vmaxvq_p_u32): Likewise.
12745 (vdupq_m_n_u32): Likewise.
12746 (vcmpneq_m_u32): Likewise.
12747 (vcmpneq_m_n_u32): Likewise.
12748 (vcmphiq_m_u32): Likewise.
12749 (vcmphiq_m_n_u32): Likewise.
12750 (vcmpeqq_m_u32): Likewise.
12751 (vcmpeqq_m_n_u32): Likewise.
12752 (vcmpcsq_m_u32): Likewise.
12753 (vcmpcsq_m_n_u32): Likewise.
12754 (vclzq_m_u32): Likewise.
12755 (vaddvaq_p_u32): Likewise.
12756 (vsriq_n_u32): Likewise.
12757 (vsliq_n_u32): Likewise.
12758 (vshlq_m_r_u32): Likewise.
12759 (vrshlq_m_n_u32): Likewise.
12760 (vqshlq_m_r_u32): Likewise.
12761 (vqrshlq_m_n_u32): Likewise.
12762 (vminavq_p_s32): Likewise.
12763 (vminaq_m_s32): Likewise.
12764 (vmaxavq_p_s32): Likewise.
12765 (vmaxaq_m_s32): Likewise.
12766 (vcmpneq_m_s32): Likewise.
12767 (vcmpneq_m_n_s32): Likewise.
12768 (vcmpltq_m_s32): Likewise.
12769 (vcmpltq_m_n_s32): Likewise.
12770 (vcmpleq_m_s32): Likewise.
12771 (vcmpleq_m_n_s32): Likewise.
12772 (vcmpgtq_m_s32): Likewise.
12773 (vcmpgtq_m_n_s32): Likewise.
12774 (vcmpgeq_m_s32): Likewise.
12775 (vcmpgeq_m_n_s32): Likewise.
12776 (vcmpeqq_m_s32): Likewise.
12777 (vcmpeqq_m_n_s32): Likewise.
12778 (vshlq_m_r_s32): Likewise.
12779 (vrshlq_m_n_s32): Likewise.
12780 (vrev64q_m_s32): Likewise.
12781 (vqshlq_m_r_s32): Likewise.
12782 (vqrshlq_m_n_s32): Likewise.
12783 (vqnegq_m_s32): Likewise.
12784 (vqabsq_m_s32): Likewise.
12785 (vnegq_m_s32): Likewise.
12786 (vmvnq_m_s32): Likewise.
12787 (vmlsdavxq_p_s32): Likewise.
12788 (vmlsdavq_p_s32): Likewise.
12789 (vmladavxq_p_s32): Likewise.
12790 (vmladavq_p_s32): Likewise.
12791 (vminvq_p_s32): Likewise.
12792 (vmaxvq_p_s32): Likewise.
12793 (vdupq_m_n_s32): Likewise.
12794 (vclzq_m_s32): Likewise.
12795 (vclsq_m_s32): Likewise.
12796 (vaddvaq_p_s32): Likewise.
12797 (vabsq_m_s32): Likewise.
12798 (vqrdmlsdhxq_s32): Likewise.
12799 (vqrdmlsdhq_s32): Likewise.
12800 (vqrdmlashq_n_s32): Likewise.
12801 (vqrdmlahq_n_s32): Likewise.
12802 (vqrdmladhxq_s32): Likewise.
12803 (vqrdmladhq_s32): Likewise.
12804 (vqdmlsdhxq_s32): Likewise.
12805 (vqdmlsdhq_s32): Likewise.
12806 (vqdmlahq_n_s32): Likewise.
12807 (vqdmladhxq_s32): Likewise.
12808 (vqdmladhq_s32): Likewise.
12809 (vmlsdavaxq_s32): Likewise.
12810 (vmlsdavaq_s32): Likewise.
12811 (vmlasq_n_s32): Likewise.
12812 (vmlaq_n_s32): Likewise.
12813 (vmladavaxq_s32): Likewise.
12814 (vmladavaq_s32): Likewise.
12815 (vsriq_n_s32): Likewise.
12816 (vsliq_n_s32): Likewise.
12817 (vpselq_u64): Likewise.
12818 (vpselq_s64): Likewise.
12819 (__arm_vpselq_u8): Define intrinsic.
12820 (__arm_vpselq_s8): Likewise.
12821 (__arm_vrev64q_m_u8): Likewise.
12822 (__arm_vqrdmlashq_n_u8): Likewise.
12823 (__arm_vqrdmlahq_n_u8): Likewise.
12824 (__arm_vqdmlahq_n_u8): Likewise.
12825 (__arm_vmvnq_m_u8): Likewise.
12826 (__arm_vmlasq_n_u8): Likewise.
12827 (__arm_vmlaq_n_u8): Likewise.
12828 (__arm_vmladavq_p_u8): Likewise.
12829 (__arm_vmladavaq_u8): Likewise.
12830 (__arm_vminvq_p_u8): Likewise.
12831 (__arm_vmaxvq_p_u8): Likewise.
12832 (__arm_vdupq_m_n_u8): Likewise.
12833 (__arm_vcmpneq_m_u8): Likewise.
12834 (__arm_vcmpneq_m_n_u8): Likewise.
12835 (__arm_vcmphiq_m_u8): Likewise.
12836 (__arm_vcmphiq_m_n_u8): Likewise.
12837 (__arm_vcmpeqq_m_u8): Likewise.
12838 (__arm_vcmpeqq_m_n_u8): Likewise.
12839 (__arm_vcmpcsq_m_u8): Likewise.
12840 (__arm_vcmpcsq_m_n_u8): Likewise.
12841 (__arm_vclzq_m_u8): Likewise.
12842 (__arm_vaddvaq_p_u8): Likewise.
12843 (__arm_vsriq_n_u8): Likewise.
12844 (__arm_vsliq_n_u8): Likewise.
12845 (__arm_vshlq_m_r_u8): Likewise.
12846 (__arm_vrshlq_m_n_u8): Likewise.
12847 (__arm_vqshlq_m_r_u8): Likewise.
12848 (__arm_vqrshlq_m_n_u8): Likewise.
12849 (__arm_vminavq_p_s8): Likewise.
12850 (__arm_vminaq_m_s8): Likewise.
12851 (__arm_vmaxavq_p_s8): Likewise.
12852 (__arm_vmaxaq_m_s8): Likewise.
12853 (__arm_vcmpneq_m_s8): Likewise.
12854 (__arm_vcmpneq_m_n_s8): Likewise.
12855 (__arm_vcmpltq_m_s8): Likewise.
12856 (__arm_vcmpltq_m_n_s8): Likewise.
12857 (__arm_vcmpleq_m_s8): Likewise.
12858 (__arm_vcmpleq_m_n_s8): Likewise.
12859 (__arm_vcmpgtq_m_s8): Likewise.
12860 (__arm_vcmpgtq_m_n_s8): Likewise.
12861 (__arm_vcmpgeq_m_s8): Likewise.
12862 (__arm_vcmpgeq_m_n_s8): Likewise.
12863 (__arm_vcmpeqq_m_s8): Likewise.
12864 (__arm_vcmpeqq_m_n_s8): Likewise.
12865 (__arm_vshlq_m_r_s8): Likewise.
12866 (__arm_vrshlq_m_n_s8): Likewise.
12867 (__arm_vrev64q_m_s8): Likewise.
12868 (__arm_vqshlq_m_r_s8): Likewise.
12869 (__arm_vqrshlq_m_n_s8): Likewise.
12870 (__arm_vqnegq_m_s8): Likewise.
12871 (__arm_vqabsq_m_s8): Likewise.
12872 (__arm_vnegq_m_s8): Likewise.
12873 (__arm_vmvnq_m_s8): Likewise.
12874 (__arm_vmlsdavxq_p_s8): Likewise.
12875 (__arm_vmlsdavq_p_s8): Likewise.
12876 (__arm_vmladavxq_p_s8): Likewise.
12877 (__arm_vmladavq_p_s8): Likewise.
12878 (__arm_vminvq_p_s8): Likewise.
12879 (__arm_vmaxvq_p_s8): Likewise.
12880 (__arm_vdupq_m_n_s8): Likewise.
12881 (__arm_vclzq_m_s8): Likewise.
12882 (__arm_vclsq_m_s8): Likewise.
12883 (__arm_vaddvaq_p_s8): Likewise.
12884 (__arm_vabsq_m_s8): Likewise.
12885 (__arm_vqrdmlsdhxq_s8): Likewise.
12886 (__arm_vqrdmlsdhq_s8): Likewise.
12887 (__arm_vqrdmlashq_n_s8): Likewise.
12888 (__arm_vqrdmlahq_n_s8): Likewise.
12889 (__arm_vqrdmladhxq_s8): Likewise.
12890 (__arm_vqrdmladhq_s8): Likewise.
12891 (__arm_vqdmlsdhxq_s8): Likewise.
12892 (__arm_vqdmlsdhq_s8): Likewise.
12893 (__arm_vqdmlahq_n_s8): Likewise.
12894 (__arm_vqdmladhxq_s8): Likewise.
12895 (__arm_vqdmladhq_s8): Likewise.
12896 (__arm_vmlsdavaxq_s8): Likewise.
12897 (__arm_vmlsdavaq_s8): Likewise.
12898 (__arm_vmlasq_n_s8): Likewise.
12899 (__arm_vmlaq_n_s8): Likewise.
12900 (__arm_vmladavaxq_s8): Likewise.
12901 (__arm_vmladavaq_s8): Likewise.
12902 (__arm_vsriq_n_s8): Likewise.
12903 (__arm_vsliq_n_s8): Likewise.
12904 (__arm_vpselq_u16): Likewise.
12905 (__arm_vpselq_s16): Likewise.
12906 (__arm_vrev64q_m_u16): Likewise.
12907 (__arm_vqrdmlashq_n_u16): Likewise.
12908 (__arm_vqrdmlahq_n_u16): Likewise.
12909 (__arm_vqdmlahq_n_u16): Likewise.
12910 (__arm_vmvnq_m_u16): Likewise.
12911 (__arm_vmlasq_n_u16): Likewise.
12912 (__arm_vmlaq_n_u16): Likewise.
12913 (__arm_vmladavq_p_u16): Likewise.
12914 (__arm_vmladavaq_u16): Likewise.
12915 (__arm_vminvq_p_u16): Likewise.
12916 (__arm_vmaxvq_p_u16): Likewise.
12917 (__arm_vdupq_m_n_u16): Likewise.
12918 (__arm_vcmpneq_m_u16): Likewise.
12919 (__arm_vcmpneq_m_n_u16): Likewise.
12920 (__arm_vcmphiq_m_u16): Likewise.
12921 (__arm_vcmphiq_m_n_u16): Likewise.
12922 (__arm_vcmpeqq_m_u16): Likewise.
12923 (__arm_vcmpeqq_m_n_u16): Likewise.
12924 (__arm_vcmpcsq_m_u16): Likewise.
12925 (__arm_vcmpcsq_m_n_u16): Likewise.
12926 (__arm_vclzq_m_u16): Likewise.
12927 (__arm_vaddvaq_p_u16): Likewise.
12928 (__arm_vsriq_n_u16): Likewise.
12929 (__arm_vsliq_n_u16): Likewise.
12930 (__arm_vshlq_m_r_u16): Likewise.
12931 (__arm_vrshlq_m_n_u16): Likewise.
12932 (__arm_vqshlq_m_r_u16): Likewise.
12933 (__arm_vqrshlq_m_n_u16): Likewise.
12934 (__arm_vminavq_p_s16): Likewise.
12935 (__arm_vminaq_m_s16): Likewise.
12936 (__arm_vmaxavq_p_s16): Likewise.
12937 (__arm_vmaxaq_m_s16): Likewise.
12938 (__arm_vcmpneq_m_s16): Likewise.
12939 (__arm_vcmpneq_m_n_s16): Likewise.
12940 (__arm_vcmpltq_m_s16): Likewise.
12941 (__arm_vcmpltq_m_n_s16): Likewise.
12942 (__arm_vcmpleq_m_s16): Likewise.
12943 (__arm_vcmpleq_m_n_s16): Likewise.
12944 (__arm_vcmpgtq_m_s16): Likewise.
12945 (__arm_vcmpgtq_m_n_s16): Likewise.
12946 (__arm_vcmpgeq_m_s16): Likewise.
12947 (__arm_vcmpgeq_m_n_s16): Likewise.
12948 (__arm_vcmpeqq_m_s16): Likewise.
12949 (__arm_vcmpeqq_m_n_s16): Likewise.
12950 (__arm_vshlq_m_r_s16): Likewise.
12951 (__arm_vrshlq_m_n_s16): Likewise.
12952 (__arm_vrev64q_m_s16): Likewise.
12953 (__arm_vqshlq_m_r_s16): Likewise.
12954 (__arm_vqrshlq_m_n_s16): Likewise.
12955 (__arm_vqnegq_m_s16): Likewise.
12956 (__arm_vqabsq_m_s16): Likewise.
12957 (__arm_vnegq_m_s16): Likewise.
12958 (__arm_vmvnq_m_s16): Likewise.
12959 (__arm_vmlsdavxq_p_s16): Likewise.
12960 (__arm_vmlsdavq_p_s16): Likewise.
12961 (__arm_vmladavxq_p_s16): Likewise.
12962 (__arm_vmladavq_p_s16): Likewise.
12963 (__arm_vminvq_p_s16): Likewise.
12964 (__arm_vmaxvq_p_s16): Likewise.
12965 (__arm_vdupq_m_n_s16): Likewise.
12966 (__arm_vclzq_m_s16): Likewise.
12967 (__arm_vclsq_m_s16): Likewise.
12968 (__arm_vaddvaq_p_s16): Likewise.
12969 (__arm_vabsq_m_s16): Likewise.
12970 (__arm_vqrdmlsdhxq_s16): Likewise.
12971 (__arm_vqrdmlsdhq_s16): Likewise.
12972 (__arm_vqrdmlashq_n_s16): Likewise.
12973 (__arm_vqrdmlahq_n_s16): Likewise.
12974 (__arm_vqrdmladhxq_s16): Likewise.
12975 (__arm_vqrdmladhq_s16): Likewise.
12976 (__arm_vqdmlsdhxq_s16): Likewise.
12977 (__arm_vqdmlsdhq_s16): Likewise.
12978 (__arm_vqdmlahq_n_s16): Likewise.
12979 (__arm_vqdmladhxq_s16): Likewise.
12980 (__arm_vqdmladhq_s16): Likewise.
12981 (__arm_vmlsdavaxq_s16): Likewise.
12982 (__arm_vmlsdavaq_s16): Likewise.
12983 (__arm_vmlasq_n_s16): Likewise.
12984 (__arm_vmlaq_n_s16): Likewise.
12985 (__arm_vmladavaxq_s16): Likewise.
12986 (__arm_vmladavaq_s16): Likewise.
12987 (__arm_vsriq_n_s16): Likewise.
12988 (__arm_vsliq_n_s16): Likewise.
12989 (__arm_vpselq_u32): Likewise.
12990 (__arm_vpselq_s32): Likewise.
12991 (__arm_vrev64q_m_u32): Likewise.
12992 (__arm_vqrdmlashq_n_u32): Likewise.
12993 (__arm_vqrdmlahq_n_u32): Likewise.
12994 (__arm_vqdmlahq_n_u32): Likewise.
12995 (__arm_vmvnq_m_u32): Likewise.
12996 (__arm_vmlasq_n_u32): Likewise.
12997 (__arm_vmlaq_n_u32): Likewise.
12998 (__arm_vmladavq_p_u32): Likewise.
12999 (__arm_vmladavaq_u32): Likewise.
13000 (__arm_vminvq_p_u32): Likewise.
13001 (__arm_vmaxvq_p_u32): Likewise.
13002 (__arm_vdupq_m_n_u32): Likewise.
13003 (__arm_vcmpneq_m_u32): Likewise.
13004 (__arm_vcmpneq_m_n_u32): Likewise.
13005 (__arm_vcmphiq_m_u32): Likewise.
13006 (__arm_vcmphiq_m_n_u32): Likewise.
13007 (__arm_vcmpeqq_m_u32): Likewise.
13008 (__arm_vcmpeqq_m_n_u32): Likewise.
13009 (__arm_vcmpcsq_m_u32): Likewise.
13010 (__arm_vcmpcsq_m_n_u32): Likewise.
13011 (__arm_vclzq_m_u32): Likewise.
13012 (__arm_vaddvaq_p_u32): Likewise.
13013 (__arm_vsriq_n_u32): Likewise.
13014 (__arm_vsliq_n_u32): Likewise.
13015 (__arm_vshlq_m_r_u32): Likewise.
13016 (__arm_vrshlq_m_n_u32): Likewise.
13017 (__arm_vqshlq_m_r_u32): Likewise.
13018 (__arm_vqrshlq_m_n_u32): Likewise.
13019 (__arm_vminavq_p_s32): Likewise.
13020 (__arm_vminaq_m_s32): Likewise.
13021 (__arm_vmaxavq_p_s32): Likewise.
13022 (__arm_vmaxaq_m_s32): Likewise.
13023 (__arm_vcmpneq_m_s32): Likewise.
13024 (__arm_vcmpneq_m_n_s32): Likewise.
13025 (__arm_vcmpltq_m_s32): Likewise.
13026 (__arm_vcmpltq_m_n_s32): Likewise.
13027 (__arm_vcmpleq_m_s32): Likewise.
13028 (__arm_vcmpleq_m_n_s32): Likewise.
13029 (__arm_vcmpgtq_m_s32): Likewise.
13030 (__arm_vcmpgtq_m_n_s32): Likewise.
13031 (__arm_vcmpgeq_m_s32): Likewise.
13032 (__arm_vcmpgeq_m_n_s32): Likewise.
13033 (__arm_vcmpeqq_m_s32): Likewise.
13034 (__arm_vcmpeqq_m_n_s32): Likewise.
13035 (__arm_vshlq_m_r_s32): Likewise.
13036 (__arm_vrshlq_m_n_s32): Likewise.
13037 (__arm_vrev64q_m_s32): Likewise.
13038 (__arm_vqshlq_m_r_s32): Likewise.
13039 (__arm_vqrshlq_m_n_s32): Likewise.
13040 (__arm_vqnegq_m_s32): Likewise.
13041 (__arm_vqabsq_m_s32): Likewise.
13042 (__arm_vnegq_m_s32): Likewise.
13043 (__arm_vmvnq_m_s32): Likewise.
13044 (__arm_vmlsdavxq_p_s32): Likewise.
13045 (__arm_vmlsdavq_p_s32): Likewise.
13046 (__arm_vmladavxq_p_s32): Likewise.
13047 (__arm_vmladavq_p_s32): Likewise.
13048 (__arm_vminvq_p_s32): Likewise.
13049 (__arm_vmaxvq_p_s32): Likewise.
13050 (__arm_vdupq_m_n_s32): Likewise.
13051 (__arm_vclzq_m_s32): Likewise.
13052 (__arm_vclsq_m_s32): Likewise.
13053 (__arm_vaddvaq_p_s32): Likewise.
13054 (__arm_vabsq_m_s32): Likewise.
13055 (__arm_vqrdmlsdhxq_s32): Likewise.
13056 (__arm_vqrdmlsdhq_s32): Likewise.
13057 (__arm_vqrdmlashq_n_s32): Likewise.
13058 (__arm_vqrdmlahq_n_s32): Likewise.
13059 (__arm_vqrdmladhxq_s32): Likewise.
13060 (__arm_vqrdmladhq_s32): Likewise.
13061 (__arm_vqdmlsdhxq_s32): Likewise.
13062 (__arm_vqdmlsdhq_s32): Likewise.
13063 (__arm_vqdmlahq_n_s32): Likewise.
13064 (__arm_vqdmladhxq_s32): Likewise.
13065 (__arm_vqdmladhq_s32): Likewise.
13066 (__arm_vmlsdavaxq_s32): Likewise.
13067 (__arm_vmlsdavaq_s32): Likewise.
13068 (__arm_vmlasq_n_s32): Likewise.
13069 (__arm_vmlaq_n_s32): Likewise.
13070 (__arm_vmladavaxq_s32): Likewise.
13071 (__arm_vmladavaq_s32): Likewise.
13072 (__arm_vsriq_n_s32): Likewise.
13073 (__arm_vsliq_n_s32): Likewise.
13074 (__arm_vpselq_u64): Likewise.
13075 (__arm_vpselq_s64): Likewise.
13076 (vcmpneq_m_n): Define polymorphic variant.
13077 (vcmpneq_m): Likewise.
13078 (vqrdmlsdhq): Likewise.
13079 (vqrdmlsdhxq): Likewise.
13080 (vqrshlq_m_n): Likewise.
13081 (vqshlq_m_r): Likewise.
13082 (vrev64q_m): Likewise.
13083 (vrshlq_m_n): Likewise.
13084 (vshlq_m_r): Likewise.
13085 (vsliq_n): Likewise.
13086 (vsriq_n): Likewise.
13087 (vqrdmlashq_n): Likewise.
13088 (vqrdmlahq): Likewise.
13089 (vqrdmladhxq): Likewise.
13090 (vqrdmladhq): Likewise.
13091 (vqnegq_m): Likewise.
13092 (vqdmlsdhxq): Likewise.
13093 (vabsq_m): Likewise.
13094 (vclsq_m): Likewise.
13095 (vclzq_m): Likewise.
13096 (vcmpgeq_m): Likewise.
13097 (vcmpgeq_m_n): Likewise.
13098 (vdupq_m_n): Likewise.
13099 (vmaxaq_m): Likewise.
13100 (vmlaq_n): Likewise.
13101 (vmlasq_n): Likewise.
13102 (vmvnq_m): Likewise.
13103 (vnegq_m): Likewise.
13104 (vpselq): Likewise.
13105 (vqdmlahq_n): Likewise.
13106 (vqrdmlahq_n): Likewise.
13107 (vqdmlsdhq): Likewise.
13108 (vqdmladhq): Likewise.
13109 (vqabsq_m): Likewise.
13110 (vminaq_m): Likewise.
13111 (vrmlaldavhaq): Likewise.
13112 (vmlsdavxq_p): Likewise.
13113 (vmlsdavq_p): Likewise.
13114 (vmlsdavaxq): Likewise.
13115 (vmlsdavaq): Likewise.
13116 (vaddvaq_p): Likewise.
13117 (vcmpcsq_m_n): Likewise.
13118 (vcmpcsq_m): Likewise.
13119 (vcmpeqq_m_n): Likewise.
13120 (vcmpeqq_m): Likewise.
13121 (vmladavxq_p): Likewise.
13122 (vmladavq_p): Likewise.
13123 (vmladavaxq): Likewise.
13124 (vmladavaq): Likewise.
13125 (vminvq_p): Likewise.
13126 (vminavq_p): Likewise.
13127 (vmaxvq_p): Likewise.
13128 (vmaxavq_p): Likewise.
13129 (vcmpltq_m_n): Likewise.
13130 (vcmpltq_m): Likewise.
13131 (vcmpleq_m): Likewise.
13132 (vcmpleq_m_n): Likewise.
13133 (vcmphiq_m_n): Likewise.
13134 (vcmphiq_m): Likewise.
13135 (vcmpgtq_m_n): Likewise.
13136 (vcmpgtq_m): Likewise.
13137 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
13139 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
13140 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
13141 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
13142 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
13143 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
13144 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
13145 * config/arm/constraints.md (Rc): Define constraint to check constant is
13146 in the range of 0 to 15.
13147 (Re): Define constraint to check constant is in the range of 0 to 31.
13148 * config/arm/mve.md (VADDVAQ_P): Define iterator.
13149 (VCLZQ_M): Likewise.
13150 (VCMPEQQ_M_N): Likewise.
13151 (VCMPEQQ_M): Likewise.
13152 (VCMPNEQ_M_N): Likewise.
13153 (VCMPNEQ_M): Likewise.
13154 (VDUPQ_M_N): Likewise.
13155 (VMAXVQ_P): Likewise.
13156 (VMINVQ_P): Likewise.
13157 (VMLADAVAQ): Likewise.
13158 (VMLADAVQ_P): Likewise.
13159 (VMLAQ_N): Likewise.
13160 (VMLASQ_N): Likewise.
13161 (VMVNQ_M): Likewise.
13162 (VPSELQ): Likewise.
13163 (VQDMLAHQ_N): Likewise.
13164 (VQRDMLAHQ_N): Likewise.
13165 (VQRDMLASHQ_N): Likewise.
13166 (VQRSHLQ_M_N): Likewise.
13167 (VQSHLQ_M_R): Likewise.
13168 (VREV64Q_M): Likewise.
13169 (VRSHLQ_M_N): Likewise.
13170 (VSHLQ_M_R): Likewise.
13171 (VSLIQ_N): Likewise.
13172 (VSRIQ_N): Likewise.
13173 (mve_vabsq_m_s<mode>): Define RTL pattern.
13174 (mve_vaddvaq_p_<supf><mode>): Likewise.
13175 (mve_vclsq_m_s<mode>): Likewise.
13176 (mve_vclzq_m_<supf><mode>): Likewise.
13177 (mve_vcmpcsq_m_n_u<mode>): Likewise.
13178 (mve_vcmpcsq_m_u<mode>): Likewise.
13179 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
13180 (mve_vcmpeqq_m_<supf><mode>): Likewise.
13181 (mve_vcmpgeq_m_n_s<mode>): Likewise.
13182 (mve_vcmpgeq_m_s<mode>): Likewise.
13183 (mve_vcmpgtq_m_n_s<mode>): Likewise.
13184 (mve_vcmpgtq_m_s<mode>): Likewise.
13185 (mve_vcmphiq_m_n_u<mode>): Likewise.
13186 (mve_vcmphiq_m_u<mode>): Likewise.
13187 (mve_vcmpleq_m_n_s<mode>): Likewise.
13188 (mve_vcmpleq_m_s<mode>): Likewise.
13189 (mve_vcmpltq_m_n_s<mode>): Likewise.
13190 (mve_vcmpltq_m_s<mode>): Likewise.
13191 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
13192 (mve_vcmpneq_m_<supf><mode>): Likewise.
13193 (mve_vdupq_m_n_<supf><mode>): Likewise.
13194 (mve_vmaxaq_m_s<mode>): Likewise.
13195 (mve_vmaxavq_p_s<mode>): Likewise.
13196 (mve_vmaxvq_p_<supf><mode>): Likewise.
13197 (mve_vminaq_m_s<mode>): Likewise.
13198 (mve_vminavq_p_s<mode>): Likewise.
13199 (mve_vminvq_p_<supf><mode>): Likewise.
13200 (mve_vmladavaq_<supf><mode>): Likewise.
13201 (mve_vmladavq_p_<supf><mode>): Likewise.
13202 (mve_vmladavxq_p_s<mode>): Likewise.
13203 (mve_vmlaq_n_<supf><mode>): Likewise.
13204 (mve_vmlasq_n_<supf><mode>): Likewise.
13205 (mve_vmlsdavq_p_s<mode>): Likewise.
13206 (mve_vmlsdavxq_p_s<mode>): Likewise.
13207 (mve_vmvnq_m_<supf><mode>): Likewise.
13208 (mve_vnegq_m_s<mode>): Likewise.
13209 (mve_vpselq_<supf><mode>): Likewise.
13210 (mve_vqabsq_m_s<mode>): Likewise.
13211 (mve_vqdmlahq_n_<supf><mode>): Likewise.
13212 (mve_vqnegq_m_s<mode>): Likewise.
13213 (mve_vqrdmladhq_s<mode>): Likewise.
13214 (mve_vqrdmladhxq_s<mode>): Likewise.
13215 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
13216 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
13217 (mve_vqrdmlsdhq_s<mode>): Likewise.
13218 (mve_vqrdmlsdhxq_s<mode>): Likewise.
13219 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
13220 (mve_vqshlq_m_r_<supf><mode>): Likewise.
13221 (mve_vrev64q_m_<supf><mode>): Likewise.
13222 (mve_vrshlq_m_n_<supf><mode>): Likewise.
13223 (mve_vshlq_m_r_<supf><mode>): Likewise.
13224 (mve_vsliq_n_<supf><mode>): Likewise.
13225 (mve_vsriq_n_<supf><mode>): Likewise.
13226 (mve_vqdmlsdhxq_s<mode>): Likewise.
13227 (mve_vqdmlsdhq_s<mode>): Likewise.
13228 (mve_vqdmladhxq_s<mode>): Likewise.
13229 (mve_vqdmladhq_s<mode>): Likewise.
13230 (mve_vmlsdavaxq_s<mode>): Likewise.
13231 (mve_vmlsdavaq_s<mode>): Likewise.
13232 (mve_vmladavaxq_s<mode>): Likewise.
13233 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
13234 matching constraint Rc.
13235 (mve_imm_31): Define predicate to check the matching constraint Re.
13237 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
13239 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
13240 (vec_cmp<mode>di_dup): Likewise.
13241 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
13243 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
13245 * config/gcn/gcn-valu.md (COND_MODE): Delete.
13246 (COND_INT_MODE): Delete.
13247 (cond_op): Add "mult".
13248 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
13249 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
13251 2020-03-18 Richard Biener <rguenther@suse.de>
13253 PR middle-end/94206
13254 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
13255 partial int modes or not mode-precision integer types for
13258 2020-03-18 Jakub Jelinek <jakub@redhat.com>
13260 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
13262 * config/arc/arc.c (frame_stack_add): Likewise.
13263 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
13265 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
13266 * tree-ssa-strlen.h (handle_printf_call): Likewise.
13267 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
13268 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
13270 2020-03-18 Duan bo <duanbo3@huawei.com>
13273 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
13274 (@ldr_got_tiny_<mode>): New pattern.
13275 (ldr_got_tiny_sidi): Likewise.
13276 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
13277 them to handle SYMBOL_TINY_GOT for ILP32.
13279 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
13281 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
13282 call-preserved for SVE PCS functions.
13283 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
13284 Optimize the case in which there are no following vector save slots.
13286 2020-03-18 Richard Biener <rguenther@suse.de>
13288 PR middle-end/94188
13289 * fold-const.c (build_fold_addr_expr): Convert address to
13291 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
13292 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
13293 to build the ADDR_EXPR which we don't really want to simplify.
13294 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
13295 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
13296 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
13297 (simplify_builtin_call): Strip useless type conversions.
13298 * tree-ssa-strlen.c (new_strinfo): Likewise.
13300 2020-03-17 Alexey Neyman <stilor@att.net>
13303 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
13304 the debug level is terse and the declaration is public. Do not
13305 generate type info.
13306 (dwarf2out_decl): Same.
13307 (add_type_attribute): Return immediately if debug level is
13310 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
13312 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
13314 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13315 Mihail Ionescu <mihail.ionescu@arm.com>
13316 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13318 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
13319 Define qualifier for ternary operands.
13320 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
13321 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13322 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13323 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
13324 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
13325 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13326 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13327 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
13328 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13329 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13330 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
13331 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13332 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
13333 * config/arm/arm_mve.h (vabavq_s8): Define macro.
13334 (vabavq_s16): Likewise.
13335 (vabavq_s32): Likewise.
13336 (vbicq_m_n_s16): Likewise.
13337 (vbicq_m_n_s32): Likewise.
13338 (vbicq_m_n_u16): Likewise.
13339 (vbicq_m_n_u32): Likewise.
13340 (vcmpeqq_m_f16): Likewise.
13341 (vcmpeqq_m_f32): Likewise.
13342 (vcvtaq_m_s16_f16): Likewise.
13343 (vcvtaq_m_u16_f16): Likewise.
13344 (vcvtaq_m_s32_f32): Likewise.
13345 (vcvtaq_m_u32_f32): Likewise.
13346 (vcvtq_m_f16_s16): Likewise.
13347 (vcvtq_m_f16_u16): Likewise.
13348 (vcvtq_m_f32_s32): Likewise.
13349 (vcvtq_m_f32_u32): Likewise.
13350 (vqrshrnbq_n_s16): Likewise.
13351 (vqrshrnbq_n_u16): Likewise.
13352 (vqrshrnbq_n_s32): Likewise.
13353 (vqrshrnbq_n_u32): Likewise.
13354 (vqrshrunbq_n_s16): Likewise.
13355 (vqrshrunbq_n_s32): Likewise.
13356 (vrmlaldavhaq_s32): Likewise.
13357 (vrmlaldavhaq_u32): Likewise.
13358 (vshlcq_s8): Likewise.
13359 (vshlcq_u8): Likewise.
13360 (vshlcq_s16): Likewise.
13361 (vshlcq_u16): Likewise.
13362 (vshlcq_s32): Likewise.
13363 (vshlcq_u32): Likewise.
13364 (vabavq_u8): Likewise.
13365 (vabavq_u16): Likewise.
13366 (vabavq_u32): Likewise.
13367 (__arm_vabavq_s8): Define intrinsic.
13368 (__arm_vabavq_s16): Likewise.
13369 (__arm_vabavq_s32): Likewise.
13370 (__arm_vabavq_u8): Likewise.
13371 (__arm_vabavq_u16): Likewise.
13372 (__arm_vabavq_u32): Likewise.
13373 (__arm_vbicq_m_n_s16): Likewise.
13374 (__arm_vbicq_m_n_s32): Likewise.
13375 (__arm_vbicq_m_n_u16): Likewise.
13376 (__arm_vbicq_m_n_u32): Likewise.
13377 (__arm_vqrshrnbq_n_s16): Likewise.
13378 (__arm_vqrshrnbq_n_u16): Likewise.
13379 (__arm_vqrshrnbq_n_s32): Likewise.
13380 (__arm_vqrshrnbq_n_u32): Likewise.
13381 (__arm_vqrshrunbq_n_s16): Likewise.
13382 (__arm_vqrshrunbq_n_s32): Likewise.
13383 (__arm_vrmlaldavhaq_s32): Likewise.
13384 (__arm_vrmlaldavhaq_u32): Likewise.
13385 (__arm_vshlcq_s8): Likewise.
13386 (__arm_vshlcq_u8): Likewise.
13387 (__arm_vshlcq_s16): Likewise.
13388 (__arm_vshlcq_u16): Likewise.
13389 (__arm_vshlcq_s32): Likewise.
13390 (__arm_vshlcq_u32): Likewise.
13391 (__arm_vcmpeqq_m_f16): Likewise.
13392 (__arm_vcmpeqq_m_f32): Likewise.
13393 (__arm_vcvtaq_m_s16_f16): Likewise.
13394 (__arm_vcvtaq_m_u16_f16): Likewise.
13395 (__arm_vcvtaq_m_s32_f32): Likewise.
13396 (__arm_vcvtaq_m_u32_f32): Likewise.
13397 (__arm_vcvtq_m_f16_s16): Likewise.
13398 (__arm_vcvtq_m_f16_u16): Likewise.
13399 (__arm_vcvtq_m_f32_s32): Likewise.
13400 (__arm_vcvtq_m_f32_u32): Likewise.
13401 (vcvtaq_m): Define polymorphic variant.
13402 (vcvtq_m): Likewise.
13403 (vabavq): Likewise.
13404 (vshlcq): Likewise.
13405 (vbicq_m_n): Likewise.
13406 (vqrshrnbq_n): Likewise.
13407 (vqrshrunbq_n): Likewise.
13408 * config/arm/arm_mve_builtins.def
13409 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
13410 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
13411 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13412 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13413 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
13414 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
13415 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13416 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13417 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
13418 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13419 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13420 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
13421 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13422 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
13423 * config/arm/mve.md (VBICQ_M_N): Define iterator.
13424 (VCVTAQ_M): Likewise.
13425 (VCVTQ_M_TO_F): Likewise.
13426 (VQRSHRNBQ_N): Likewise.
13427 (VABAVQ): Likewise.
13428 (VSHLCQ): Likewise.
13429 (VRMLALDAVHAQ): Likewise.
13430 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
13431 (mve_vcmpeqq_m_f<mode>): Likewise.
13432 (mve_vcvtaq_m_<supf><mode>): Likewise.
13433 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
13434 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
13435 (mve_vqrshrunbq_n_s<mode>): Likewise.
13436 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
13437 (mve_vabavq_<supf><mode>): Likewise.
13438 (mve_vshlcq_<supf><mode>): Likewise.
13439 (mve_vshlcq_<supf><mode>): Likewise.
13440 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
13441 (mve_vshlcq_carry_<supf><mode>): Likewise.
13443 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13444 Mihail Ionescu <mihail.ionescu@arm.com>
13445 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13447 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
13448 (vqmovnbq_u16): Likewise.
13449 (vmulltq_poly_p8): Likewise.
13450 (vmullbq_poly_p8): Likewise.
13451 (vmovntq_u16): Likewise.
13452 (vmovnbq_u16): Likewise.
13453 (vmlaldavxq_u16): Likewise.
13454 (vmlaldavq_u16): Likewise.
13455 (vqmovuntq_s16): Likewise.
13456 (vqmovunbq_s16): Likewise.
13457 (vshlltq_n_u8): Likewise.
13458 (vshllbq_n_u8): Likewise.
13459 (vorrq_n_u16): Likewise.
13460 (vbicq_n_u16): Likewise.
13461 (vcmpneq_n_f16): Likewise.
13462 (vcmpneq_f16): Likewise.
13463 (vcmpltq_n_f16): Likewise.
13464 (vcmpltq_f16): Likewise.
13465 (vcmpleq_n_f16): Likewise.
13466 (vcmpleq_f16): Likewise.
13467 (vcmpgtq_n_f16): Likewise.
13468 (vcmpgtq_f16): Likewise.
13469 (vcmpgeq_n_f16): Likewise.
13470 (vcmpgeq_f16): Likewise.
13471 (vcmpeqq_n_f16): Likewise.
13472 (vcmpeqq_f16): Likewise.
13473 (vsubq_f16): Likewise.
13474 (vqmovntq_s16): Likewise.
13475 (vqmovnbq_s16): Likewise.
13476 (vqdmulltq_s16): Likewise.
13477 (vqdmulltq_n_s16): Likewise.
13478 (vqdmullbq_s16): Likewise.
13479 (vqdmullbq_n_s16): Likewise.
13480 (vorrq_f16): Likewise.
13481 (vornq_f16): Likewise.
13482 (vmulq_n_f16): Likewise.
13483 (vmulq_f16): Likewise.
13484 (vmovntq_s16): Likewise.
13485 (vmovnbq_s16): Likewise.
13486 (vmlsldavxq_s16): Likewise.
13487 (vmlsldavq_s16): Likewise.
13488 (vmlaldavxq_s16): Likewise.
13489 (vmlaldavq_s16): Likewise.
13490 (vminnmvq_f16): Likewise.
13491 (vminnmq_f16): Likewise.
13492 (vminnmavq_f16): Likewise.
13493 (vminnmaq_f16): Likewise.
13494 (vmaxnmvq_f16): Likewise.
13495 (vmaxnmq_f16): Likewise.
13496 (vmaxnmavq_f16): Likewise.
13497 (vmaxnmaq_f16): Likewise.
13498 (veorq_f16): Likewise.
13499 (vcmulq_rot90_f16): Likewise.
13500 (vcmulq_rot270_f16): Likewise.
13501 (vcmulq_rot180_f16): Likewise.
13502 (vcmulq_f16): Likewise.
13503 (vcaddq_rot90_f16): Likewise.
13504 (vcaddq_rot270_f16): Likewise.
13505 (vbicq_f16): Likewise.
13506 (vandq_f16): Likewise.
13507 (vaddq_n_f16): Likewise.
13508 (vabdq_f16): Likewise.
13509 (vshlltq_n_s8): Likewise.
13510 (vshllbq_n_s8): Likewise.
13511 (vorrq_n_s16): Likewise.
13512 (vbicq_n_s16): Likewise.
13513 (vqmovntq_u32): Likewise.
13514 (vqmovnbq_u32): Likewise.
13515 (vmulltq_poly_p16): Likewise.
13516 (vmullbq_poly_p16): Likewise.
13517 (vmovntq_u32): Likewise.
13518 (vmovnbq_u32): Likewise.
13519 (vmlaldavxq_u32): Likewise.
13520 (vmlaldavq_u32): Likewise.
13521 (vqmovuntq_s32): Likewise.
13522 (vqmovunbq_s32): Likewise.
13523 (vshlltq_n_u16): Likewise.
13524 (vshllbq_n_u16): Likewise.
13525 (vorrq_n_u32): Likewise.
13526 (vbicq_n_u32): Likewise.
13527 (vcmpneq_n_f32): Likewise.
13528 (vcmpneq_f32): Likewise.
13529 (vcmpltq_n_f32): Likewise.
13530 (vcmpltq_f32): Likewise.
13531 (vcmpleq_n_f32): Likewise.
13532 (vcmpleq_f32): Likewise.
13533 (vcmpgtq_n_f32): Likewise.
13534 (vcmpgtq_f32): Likewise.
13535 (vcmpgeq_n_f32): Likewise.
13536 (vcmpgeq_f32): Likewise.
13537 (vcmpeqq_n_f32): Likewise.
13538 (vcmpeqq_f32): Likewise.
13539 (vsubq_f32): Likewise.
13540 (vqmovntq_s32): Likewise.
13541 (vqmovnbq_s32): Likewise.
13542 (vqdmulltq_s32): Likewise.
13543 (vqdmulltq_n_s32): Likewise.
13544 (vqdmullbq_s32): Likewise.
13545 (vqdmullbq_n_s32): Likewise.
13546 (vorrq_f32): Likewise.
13547 (vornq_f32): Likewise.
13548 (vmulq_n_f32): Likewise.
13549 (vmulq_f32): Likewise.
13550 (vmovntq_s32): Likewise.
13551 (vmovnbq_s32): Likewise.
13552 (vmlsldavxq_s32): Likewise.
13553 (vmlsldavq_s32): Likewise.
13554 (vmlaldavxq_s32): Likewise.
13555 (vmlaldavq_s32): Likewise.
13556 (vminnmvq_f32): Likewise.
13557 (vminnmq_f32): Likewise.
13558 (vminnmavq_f32): Likewise.
13559 (vminnmaq_f32): Likewise.
13560 (vmaxnmvq_f32): Likewise.
13561 (vmaxnmq_f32): Likewise.
13562 (vmaxnmavq_f32): Likewise.
13563 (vmaxnmaq_f32): Likewise.
13564 (veorq_f32): Likewise.
13565 (vcmulq_rot90_f32): Likewise.
13566 (vcmulq_rot270_f32): Likewise.
13567 (vcmulq_rot180_f32): Likewise.
13568 (vcmulq_f32): Likewise.
13569 (vcaddq_rot90_f32): Likewise.
13570 (vcaddq_rot270_f32): Likewise.
13571 (vbicq_f32): Likewise.
13572 (vandq_f32): Likewise.
13573 (vaddq_n_f32): Likewise.
13574 (vabdq_f32): Likewise.
13575 (vshlltq_n_s16): Likewise.
13576 (vshllbq_n_s16): Likewise.
13577 (vorrq_n_s32): Likewise.
13578 (vbicq_n_s32): Likewise.
13579 (vrmlaldavhq_u32): Likewise.
13580 (vctp8q_m): Likewise.
13581 (vctp64q_m): Likewise.
13582 (vctp32q_m): Likewise.
13583 (vctp16q_m): Likewise.
13584 (vaddlvaq_u32): Likewise.
13585 (vrmlsldavhxq_s32): Likewise.
13586 (vrmlsldavhq_s32): Likewise.
13587 (vrmlaldavhxq_s32): Likewise.
13588 (vrmlaldavhq_s32): Likewise.
13589 (vcvttq_f16_f32): Likewise.
13590 (vcvtbq_f16_f32): Likewise.
13591 (vaddlvaq_s32): Likewise.
13592 (__arm_vqmovntq_u16): Define intrinsic.
13593 (__arm_vqmovnbq_u16): Likewise.
13594 (__arm_vmulltq_poly_p8): Likewise.
13595 (__arm_vmullbq_poly_p8): Likewise.
13596 (__arm_vmovntq_u16): Likewise.
13597 (__arm_vmovnbq_u16): Likewise.
13598 (__arm_vmlaldavxq_u16): Likewise.
13599 (__arm_vmlaldavq_u16): Likewise.
13600 (__arm_vqmovuntq_s16): Likewise.
13601 (__arm_vqmovunbq_s16): Likewise.
13602 (__arm_vshlltq_n_u8): Likewise.
13603 (__arm_vshllbq_n_u8): Likewise.
13604 (__arm_vorrq_n_u16): Likewise.
13605 (__arm_vbicq_n_u16): Likewise.
13606 (__arm_vcmpneq_n_f16): Likewise.
13607 (__arm_vcmpneq_f16): Likewise.
13608 (__arm_vcmpltq_n_f16): Likewise.
13609 (__arm_vcmpltq_f16): Likewise.
13610 (__arm_vcmpleq_n_f16): Likewise.
13611 (__arm_vcmpleq_f16): Likewise.
13612 (__arm_vcmpgtq_n_f16): Likewise.
13613 (__arm_vcmpgtq_f16): Likewise.
13614 (__arm_vcmpgeq_n_f16): Likewise.
13615 (__arm_vcmpgeq_f16): Likewise.
13616 (__arm_vcmpeqq_n_f16): Likewise.
13617 (__arm_vcmpeqq_f16): Likewise.
13618 (__arm_vsubq_f16): Likewise.
13619 (__arm_vqmovntq_s16): Likewise.
13620 (__arm_vqmovnbq_s16): Likewise.
13621 (__arm_vqdmulltq_s16): Likewise.
13622 (__arm_vqdmulltq_n_s16): Likewise.
13623 (__arm_vqdmullbq_s16): Likewise.
13624 (__arm_vqdmullbq_n_s16): Likewise.
13625 (__arm_vorrq_f16): Likewise.
13626 (__arm_vornq_f16): Likewise.
13627 (__arm_vmulq_n_f16): Likewise.
13628 (__arm_vmulq_f16): Likewise.
13629 (__arm_vmovntq_s16): Likewise.
13630 (__arm_vmovnbq_s16): Likewise.
13631 (__arm_vmlsldavxq_s16): Likewise.
13632 (__arm_vmlsldavq_s16): Likewise.
13633 (__arm_vmlaldavxq_s16): Likewise.
13634 (__arm_vmlaldavq_s16): Likewise.
13635 (__arm_vminnmvq_f16): Likewise.
13636 (__arm_vminnmq_f16): Likewise.
13637 (__arm_vminnmavq_f16): Likewise.
13638 (__arm_vminnmaq_f16): Likewise.
13639 (__arm_vmaxnmvq_f16): Likewise.
13640 (__arm_vmaxnmq_f16): Likewise.
13641 (__arm_vmaxnmavq_f16): Likewise.
13642 (__arm_vmaxnmaq_f16): Likewise.
13643 (__arm_veorq_f16): Likewise.
13644 (__arm_vcmulq_rot90_f16): Likewise.
13645 (__arm_vcmulq_rot270_f16): Likewise.
13646 (__arm_vcmulq_rot180_f16): Likewise.
13647 (__arm_vcmulq_f16): Likewise.
13648 (__arm_vcaddq_rot90_f16): Likewise.
13649 (__arm_vcaddq_rot270_f16): Likewise.
13650 (__arm_vbicq_f16): Likewise.
13651 (__arm_vandq_f16): Likewise.
13652 (__arm_vaddq_n_f16): Likewise.
13653 (__arm_vabdq_f16): Likewise.
13654 (__arm_vshlltq_n_s8): Likewise.
13655 (__arm_vshllbq_n_s8): Likewise.
13656 (__arm_vorrq_n_s16): Likewise.
13657 (__arm_vbicq_n_s16): Likewise.
13658 (__arm_vqmovntq_u32): Likewise.
13659 (__arm_vqmovnbq_u32): Likewise.
13660 (__arm_vmulltq_poly_p16): Likewise.
13661 (__arm_vmullbq_poly_p16): Likewise.
13662 (__arm_vmovntq_u32): Likewise.
13663 (__arm_vmovnbq_u32): Likewise.
13664 (__arm_vmlaldavxq_u32): Likewise.
13665 (__arm_vmlaldavq_u32): Likewise.
13666 (__arm_vqmovuntq_s32): Likewise.
13667 (__arm_vqmovunbq_s32): Likewise.
13668 (__arm_vshlltq_n_u16): Likewise.
13669 (__arm_vshllbq_n_u16): Likewise.
13670 (__arm_vorrq_n_u32): Likewise.
13671 (__arm_vbicq_n_u32): Likewise.
13672 (__arm_vcmpneq_n_f32): Likewise.
13673 (__arm_vcmpneq_f32): Likewise.
13674 (__arm_vcmpltq_n_f32): Likewise.
13675 (__arm_vcmpltq_f32): Likewise.
13676 (__arm_vcmpleq_n_f32): Likewise.
13677 (__arm_vcmpleq_f32): Likewise.
13678 (__arm_vcmpgtq_n_f32): Likewise.
13679 (__arm_vcmpgtq_f32): Likewise.
13680 (__arm_vcmpgeq_n_f32): Likewise.
13681 (__arm_vcmpgeq_f32): Likewise.
13682 (__arm_vcmpeqq_n_f32): Likewise.
13683 (__arm_vcmpeqq_f32): Likewise.
13684 (__arm_vsubq_f32): Likewise.
13685 (__arm_vqmovntq_s32): Likewise.
13686 (__arm_vqmovnbq_s32): Likewise.
13687 (__arm_vqdmulltq_s32): Likewise.
13688 (__arm_vqdmulltq_n_s32): Likewise.
13689 (__arm_vqdmullbq_s32): Likewise.
13690 (__arm_vqdmullbq_n_s32): Likewise.
13691 (__arm_vorrq_f32): Likewise.
13692 (__arm_vornq_f32): Likewise.
13693 (__arm_vmulq_n_f32): Likewise.
13694 (__arm_vmulq_f32): Likewise.
13695 (__arm_vmovntq_s32): Likewise.
13696 (__arm_vmovnbq_s32): Likewise.
13697 (__arm_vmlsldavxq_s32): Likewise.
13698 (__arm_vmlsldavq_s32): Likewise.
13699 (__arm_vmlaldavxq_s32): Likewise.
13700 (__arm_vmlaldavq_s32): Likewise.
13701 (__arm_vminnmvq_f32): Likewise.
13702 (__arm_vminnmq_f32): Likewise.
13703 (__arm_vminnmavq_f32): Likewise.
13704 (__arm_vminnmaq_f32): Likewise.
13705 (__arm_vmaxnmvq_f32): Likewise.
13706 (__arm_vmaxnmq_f32): Likewise.
13707 (__arm_vmaxnmavq_f32): Likewise.
13708 (__arm_vmaxnmaq_f32): Likewise.
13709 (__arm_veorq_f32): Likewise.
13710 (__arm_vcmulq_rot90_f32): Likewise.
13711 (__arm_vcmulq_rot270_f32): Likewise.
13712 (__arm_vcmulq_rot180_f32): Likewise.
13713 (__arm_vcmulq_f32): Likewise.
13714 (__arm_vcaddq_rot90_f32): Likewise.
13715 (__arm_vcaddq_rot270_f32): Likewise.
13716 (__arm_vbicq_f32): Likewise.
13717 (__arm_vandq_f32): Likewise.
13718 (__arm_vaddq_n_f32): Likewise.
13719 (__arm_vabdq_f32): Likewise.
13720 (__arm_vshlltq_n_s16): Likewise.
13721 (__arm_vshllbq_n_s16): Likewise.
13722 (__arm_vorrq_n_s32): Likewise.
13723 (__arm_vbicq_n_s32): Likewise.
13724 (__arm_vrmlaldavhq_u32): Likewise.
13725 (__arm_vctp8q_m): Likewise.
13726 (__arm_vctp64q_m): Likewise.
13727 (__arm_vctp32q_m): Likewise.
13728 (__arm_vctp16q_m): Likewise.
13729 (__arm_vaddlvaq_u32): Likewise.
13730 (__arm_vrmlsldavhxq_s32): Likewise.
13731 (__arm_vrmlsldavhq_s32): Likewise.
13732 (__arm_vrmlaldavhxq_s32): Likewise.
13733 (__arm_vrmlaldavhq_s32): Likewise.
13734 (__arm_vcvttq_f16_f32): Likewise.
13735 (__arm_vcvtbq_f16_f32): Likewise.
13736 (__arm_vaddlvaq_s32): Likewise.
13737 (vst4q): Define polymorphic variant.
13738 (vrndxq): Likewise.
13740 (vrndpq): Likewise.
13741 (vrndnq): Likewise.
13742 (vrndmq): Likewise.
13743 (vrndaq): Likewise.
13744 (vrev64q): Likewise.
13746 (vdupq_n): Likewise.
13748 (vrev32q): Likewise.
13749 (vcvtbq_f32): Likewise.
13750 (vcvttq_f32): Likewise.
13752 (vsubq_n): Likewise.
13753 (vbrsrq_n): Likewise.
13754 (vcvtq_n): Likewise.
13758 (vaddq_n): Likewise.
13762 (vmulq_n): Likewise.
13764 (vcaddq_rot270): Likewise.
13765 (vcmpeqq_n): Likewise.
13766 (vcmpeqq): Likewise.
13767 (vcaddq_rot90): Likewise.
13768 (vcmpgeq_n): Likewise.
13769 (vcmpgeq): Likewise.
13770 (vcmpgtq_n): Likewise.
13771 (vcmpgtq): Likewise.
13772 (vcmpgtq): Likewise.
13773 (vcmpleq_n): Likewise.
13774 (vcmpleq_n): Likewise.
13775 (vcmpleq): Likewise.
13776 (vcmpleq): Likewise.
13777 (vcmpltq_n): Likewise.
13778 (vcmpltq_n): Likewise.
13779 (vcmpltq): Likewise.
13780 (vcmpltq): Likewise.
13781 (vcmpneq_n): Likewise.
13782 (vcmpneq_n): Likewise.
13783 (vcmpneq): Likewise.
13784 (vcmpneq): Likewise.
13785 (vcmulq): Likewise.
13786 (vcmulq): Likewise.
13787 (vcmulq_rot180): Likewise.
13788 (vcmulq_rot180): Likewise.
13789 (vcmulq_rot270): Likewise.
13790 (vcmulq_rot270): Likewise.
13791 (vcmulq_rot90): Likewise.
13792 (vcmulq_rot90): Likewise.
13795 (vmaxnmaq): Likewise.
13796 (vmaxnmaq): Likewise.
13797 (vmaxnmavq): Likewise.
13798 (vmaxnmavq): Likewise.
13799 (vmaxnmq): Likewise.
13800 (vmaxnmq): Likewise.
13801 (vmaxnmvq): Likewise.
13802 (vmaxnmvq): Likewise.
13803 (vminnmaq): Likewise.
13804 (vminnmaq): Likewise.
13805 (vminnmavq): Likewise.
13806 (vminnmavq): Likewise.
13807 (vminnmq): Likewise.
13808 (vminnmq): Likewise.
13809 (vminnmvq): Likewise.
13810 (vminnmvq): Likewise.
13811 (vbicq_n): Likewise.
13812 (vqmovntq): Likewise.
13813 (vqmovntq): Likewise.
13814 (vqmovnbq): Likewise.
13815 (vqmovnbq): Likewise.
13816 (vmulltq_poly): Likewise.
13817 (vmulltq_poly): Likewise.
13818 (vmullbq_poly): Likewise.
13819 (vmullbq_poly): Likewise.
13820 (vmovntq): Likewise.
13821 (vmovntq): Likewise.
13822 (vmovnbq): Likewise.
13823 (vmovnbq): Likewise.
13824 (vmlaldavxq): Likewise.
13825 (vmlaldavxq): Likewise.
13826 (vqmovuntq): Likewise.
13827 (vqmovuntq): Likewise.
13828 (vshlltq_n): Likewise.
13829 (vshlltq_n): Likewise.
13830 (vshllbq_n): Likewise.
13831 (vshllbq_n): Likewise.
13832 (vorrq_n): Likewise.
13833 (vorrq_n): Likewise.
13834 (vmlaldavq): Likewise.
13835 (vmlaldavq): Likewise.
13836 (vqmovunbq): Likewise.
13837 (vqmovunbq): Likewise.
13838 (vqdmulltq_n): Likewise.
13839 (vqdmulltq_n): Likewise.
13840 (vqdmulltq): Likewise.
13841 (vqdmulltq): Likewise.
13842 (vqdmullbq_n): Likewise.
13843 (vqdmullbq_n): Likewise.
13844 (vqdmullbq): Likewise.
13845 (vqdmullbq): Likewise.
13846 (vaddlvaq): Likewise.
13847 (vaddlvaq): Likewise.
13848 (vrmlaldavhq): Likewise.
13849 (vrmlaldavhq): Likewise.
13850 (vrmlaldavhxq): Likewise.
13851 (vrmlaldavhxq): Likewise.
13852 (vrmlsldavhq): Likewise.
13853 (vrmlsldavhq): Likewise.
13854 (vrmlsldavhxq): Likewise.
13855 (vrmlsldavhxq): Likewise.
13856 (vmlsldavxq): Likewise.
13857 (vmlsldavxq): Likewise.
13858 (vmlsldavq): Likewise.
13859 (vmlsldavq): Likewise.
13860 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
13861 (BINOP_NONE_NONE_NONE): Likewise.
13862 (BINOP_UNONE_NONE_NONE): Likewise.
13863 (BINOP_UNONE_UNONE_IMM): Likewise.
13864 (BINOP_UNONE_UNONE_NONE): Likewise.
13865 (BINOP_UNONE_UNONE_UNONE): Likewise.
13866 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
13867 (mve_vaddlvaq_<supf>v4si): Likewise.
13868 (mve_vaddq_n_f<mode>): Likewise.
13869 (mve_vandq_f<mode>): Likewise.
13870 (mve_vbicq_f<mode>): Likewise.
13871 (mve_vbicq_n_<supf><mode>): Likewise.
13872 (mve_vcaddq_rot270_f<mode>): Likewise.
13873 (mve_vcaddq_rot90_f<mode>): Likewise.
13874 (mve_vcmpeqq_f<mode>): Likewise.
13875 (mve_vcmpeqq_n_f<mode>): Likewise.
13876 (mve_vcmpgeq_f<mode>): Likewise.
13877 (mve_vcmpgeq_n_f<mode>): Likewise.
13878 (mve_vcmpgtq_f<mode>): Likewise.
13879 (mve_vcmpgtq_n_f<mode>): Likewise.
13880 (mve_vcmpleq_f<mode>): Likewise.
13881 (mve_vcmpleq_n_f<mode>): Likewise.
13882 (mve_vcmpltq_f<mode>): Likewise.
13883 (mve_vcmpltq_n_f<mode>): Likewise.
13884 (mve_vcmpneq_f<mode>): Likewise.
13885 (mve_vcmpneq_n_f<mode>): Likewise.
13886 (mve_vcmulq_f<mode>): Likewise.
13887 (mve_vcmulq_rot180_f<mode>): Likewise.
13888 (mve_vcmulq_rot270_f<mode>): Likewise.
13889 (mve_vcmulq_rot90_f<mode>): Likewise.
13890 (mve_vctp<mode1>q_mhi): Likewise.
13891 (mve_vcvtbq_f16_f32v8hf): Likewise.
13892 (mve_vcvttq_f16_f32v8hf): Likewise.
13893 (mve_veorq_f<mode>): Likewise.
13894 (mve_vmaxnmaq_f<mode>): Likewise.
13895 (mve_vmaxnmavq_f<mode>): Likewise.
13896 (mve_vmaxnmq_f<mode>): Likewise.
13897 (mve_vmaxnmvq_f<mode>): Likewise.
13898 (mve_vminnmaq_f<mode>): Likewise.
13899 (mve_vminnmavq_f<mode>): Likewise.
13900 (mve_vminnmq_f<mode>): Likewise.
13901 (mve_vminnmvq_f<mode>): Likewise.
13902 (mve_vmlaldavq_<supf><mode>): Likewise.
13903 (mve_vmlaldavxq_<supf><mode>): Likewise.
13904 (mve_vmlsldavq_s<mode>): Likewise.
13905 (mve_vmlsldavxq_s<mode>): Likewise.
13906 (mve_vmovnbq_<supf><mode>): Likewise.
13907 (mve_vmovntq_<supf><mode>): Likewise.
13908 (mve_vmulq_f<mode>): Likewise.
13909 (mve_vmulq_n_f<mode>): Likewise.
13910 (mve_vornq_f<mode>): Likewise.
13911 (mve_vorrq_f<mode>): Likewise.
13912 (mve_vorrq_n_<supf><mode>): Likewise.
13913 (mve_vqdmullbq_n_s<mode>): Likewise.
13914 (mve_vqdmullbq_s<mode>): Likewise.
13915 (mve_vqdmulltq_n_s<mode>): Likewise.
13916 (mve_vqdmulltq_s<mode>): Likewise.
13917 (mve_vqmovnbq_<supf><mode>): Likewise.
13918 (mve_vqmovntq_<supf><mode>): Likewise.
13919 (mve_vqmovunbq_s<mode>): Likewise.
13920 (mve_vqmovuntq_s<mode>): Likewise.
13921 (mve_vrmlaldavhxq_sv4si): Likewise.
13922 (mve_vrmlsldavhq_sv4si): Likewise.
13923 (mve_vrmlsldavhxq_sv4si): Likewise.
13924 (mve_vshllbq_n_<supf><mode>): Likewise.
13925 (mve_vshlltq_n_<supf><mode>): Likewise.
13926 (mve_vsubq_f<mode>): Likewise.
13927 (mve_vmulltq_poly_p<mode>): Likewise.
13928 (mve_vmullbq_poly_p<mode>): Likewise.
13929 (mve_vrmlaldavhq_<supf>v4si): Likewise.
13931 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13932 Mihail Ionescu <mihail.ionescu@arm.com>
13933 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13935 * config/arm/arm_mve.h (vsubq_u8): Define macro.
13936 (vsubq_n_u8): Likewise.
13937 (vrmulhq_u8): Likewise.
13938 (vrhaddq_u8): Likewise.
13939 (vqsubq_u8): Likewise.
13940 (vqsubq_n_u8): Likewise.
13941 (vqaddq_u8): Likewise.
13942 (vqaddq_n_u8): Likewise.
13943 (vorrq_u8): Likewise.
13944 (vornq_u8): Likewise.
13945 (vmulq_u8): Likewise.
13946 (vmulq_n_u8): Likewise.
13947 (vmulltq_int_u8): Likewise.
13948 (vmullbq_int_u8): Likewise.
13949 (vmulhq_u8): Likewise.
13950 (vmladavq_u8): Likewise.
13951 (vminvq_u8): Likewise.
13952 (vminq_u8): Likewise.
13953 (vmaxvq_u8): Likewise.
13954 (vmaxq_u8): Likewise.
13955 (vhsubq_u8): Likewise.
13956 (vhsubq_n_u8): Likewise.
13957 (vhaddq_u8): Likewise.
13958 (vhaddq_n_u8): Likewise.
13959 (veorq_u8): Likewise.
13960 (vcmpneq_n_u8): Likewise.
13961 (vcmphiq_u8): Likewise.
13962 (vcmphiq_n_u8): Likewise.
13963 (vcmpeqq_u8): Likewise.
13964 (vcmpeqq_n_u8): Likewise.
13965 (vcmpcsq_u8): Likewise.
13966 (vcmpcsq_n_u8): Likewise.
13967 (vcaddq_rot90_u8): Likewise.
13968 (vcaddq_rot270_u8): Likewise.
13969 (vbicq_u8): Likewise.
13970 (vandq_u8): Likewise.
13971 (vaddvq_p_u8): Likewise.
13972 (vaddvaq_u8): Likewise.
13973 (vaddq_n_u8): Likewise.
13974 (vabdq_u8): Likewise.
13975 (vshlq_r_u8): Likewise.
13976 (vrshlq_u8): Likewise.
13977 (vrshlq_n_u8): Likewise.
13978 (vqshlq_u8): Likewise.
13979 (vqshlq_r_u8): Likewise.
13980 (vqrshlq_u8): Likewise.
13981 (vqrshlq_n_u8): Likewise.
13982 (vminavq_s8): Likewise.
13983 (vminaq_s8): Likewise.
13984 (vmaxavq_s8): Likewise.
13985 (vmaxaq_s8): Likewise.
13986 (vbrsrq_n_u8): Likewise.
13987 (vshlq_n_u8): Likewise.
13988 (vrshrq_n_u8): Likewise.
13989 (vqshlq_n_u8): Likewise.
13990 (vcmpneq_n_s8): Likewise.
13991 (vcmpltq_s8): Likewise.
13992 (vcmpltq_n_s8): Likewise.
13993 (vcmpleq_s8): Likewise.
13994 (vcmpleq_n_s8): Likewise.
13995 (vcmpgtq_s8): Likewise.
13996 (vcmpgtq_n_s8): Likewise.
13997 (vcmpgeq_s8): Likewise.
13998 (vcmpgeq_n_s8): Likewise.
13999 (vcmpeqq_s8): Likewise.
14000 (vcmpeqq_n_s8): Likewise.
14001 (vqshluq_n_s8): Likewise.
14002 (vaddvq_p_s8): Likewise.
14003 (vsubq_s8): Likewise.
14004 (vsubq_n_s8): Likewise.
14005 (vshlq_r_s8): Likewise.
14006 (vrshlq_s8): Likewise.
14007 (vrshlq_n_s8): Likewise.
14008 (vrmulhq_s8): Likewise.
14009 (vrhaddq_s8): Likewise.
14010 (vqsubq_s8): Likewise.
14011 (vqsubq_n_s8): Likewise.
14012 (vqshlq_s8): Likewise.
14013 (vqshlq_r_s8): Likewise.
14014 (vqrshlq_s8): Likewise.
14015 (vqrshlq_n_s8): Likewise.
14016 (vqrdmulhq_s8): Likewise.
14017 (vqrdmulhq_n_s8): Likewise.
14018 (vqdmulhq_s8): Likewise.
14019 (vqdmulhq_n_s8): Likewise.
14020 (vqaddq_s8): Likewise.
14021 (vqaddq_n_s8): Likewise.
14022 (vorrq_s8): Likewise.
14023 (vornq_s8): Likewise.
14024 (vmulq_s8): Likewise.
14025 (vmulq_n_s8): Likewise.
14026 (vmulltq_int_s8): Likewise.
14027 (vmullbq_int_s8): Likewise.
14028 (vmulhq_s8): Likewise.
14029 (vmlsdavxq_s8): Likewise.
14030 (vmlsdavq_s8): Likewise.
14031 (vmladavxq_s8): Likewise.
14032 (vmladavq_s8): Likewise.
14033 (vminvq_s8): Likewise.
14034 (vminq_s8): Likewise.
14035 (vmaxvq_s8): Likewise.
14036 (vmaxq_s8): Likewise.
14037 (vhsubq_s8): Likewise.
14038 (vhsubq_n_s8): Likewise.
14039 (vhcaddq_rot90_s8): Likewise.
14040 (vhcaddq_rot270_s8): Likewise.
14041 (vhaddq_s8): Likewise.
14042 (vhaddq_n_s8): Likewise.
14043 (veorq_s8): Likewise.
14044 (vcaddq_rot90_s8): Likewise.
14045 (vcaddq_rot270_s8): Likewise.
14046 (vbrsrq_n_s8): Likewise.
14047 (vbicq_s8): Likewise.
14048 (vandq_s8): Likewise.
14049 (vaddvaq_s8): Likewise.
14050 (vaddq_n_s8): Likewise.
14051 (vabdq_s8): Likewise.
14052 (vshlq_n_s8): Likewise.
14053 (vrshrq_n_s8): Likewise.
14054 (vqshlq_n_s8): Likewise.
14055 (vsubq_u16): Likewise.
14056 (vsubq_n_u16): Likewise.
14057 (vrmulhq_u16): Likewise.
14058 (vrhaddq_u16): Likewise.
14059 (vqsubq_u16): Likewise.
14060 (vqsubq_n_u16): Likewise.
14061 (vqaddq_u16): Likewise.
14062 (vqaddq_n_u16): Likewise.
14063 (vorrq_u16): Likewise.
14064 (vornq_u16): Likewise.
14065 (vmulq_u16): Likewise.
14066 (vmulq_n_u16): Likewise.
14067 (vmulltq_int_u16): Likewise.
14068 (vmullbq_int_u16): Likewise.
14069 (vmulhq_u16): Likewise.
14070 (vmladavq_u16): Likewise.
14071 (vminvq_u16): Likewise.
14072 (vminq_u16): Likewise.
14073 (vmaxvq_u16): Likewise.
14074 (vmaxq_u16): Likewise.
14075 (vhsubq_u16): Likewise.
14076 (vhsubq_n_u16): Likewise.
14077 (vhaddq_u16): Likewise.
14078 (vhaddq_n_u16): Likewise.
14079 (veorq_u16): Likewise.
14080 (vcmpneq_n_u16): Likewise.
14081 (vcmphiq_u16): Likewise.
14082 (vcmphiq_n_u16): Likewise.
14083 (vcmpeqq_u16): Likewise.
14084 (vcmpeqq_n_u16): Likewise.
14085 (vcmpcsq_u16): Likewise.
14086 (vcmpcsq_n_u16): Likewise.
14087 (vcaddq_rot90_u16): Likewise.
14088 (vcaddq_rot270_u16): Likewise.
14089 (vbicq_u16): Likewise.
14090 (vandq_u16): Likewise.
14091 (vaddvq_p_u16): Likewise.
14092 (vaddvaq_u16): Likewise.
14093 (vaddq_n_u16): Likewise.
14094 (vabdq_u16): Likewise.
14095 (vshlq_r_u16): Likewise.
14096 (vrshlq_u16): Likewise.
14097 (vrshlq_n_u16): Likewise.
14098 (vqshlq_u16): Likewise.
14099 (vqshlq_r_u16): Likewise.
14100 (vqrshlq_u16): Likewise.
14101 (vqrshlq_n_u16): Likewise.
14102 (vminavq_s16): Likewise.
14103 (vminaq_s16): Likewise.
14104 (vmaxavq_s16): Likewise.
14105 (vmaxaq_s16): Likewise.
14106 (vbrsrq_n_u16): Likewise.
14107 (vshlq_n_u16): Likewise.
14108 (vrshrq_n_u16): Likewise.
14109 (vqshlq_n_u16): Likewise.
14110 (vcmpneq_n_s16): Likewise.
14111 (vcmpltq_s16): Likewise.
14112 (vcmpltq_n_s16): Likewise.
14113 (vcmpleq_s16): Likewise.
14114 (vcmpleq_n_s16): Likewise.
14115 (vcmpgtq_s16): Likewise.
14116 (vcmpgtq_n_s16): Likewise.
14117 (vcmpgeq_s16): Likewise.
14118 (vcmpgeq_n_s16): Likewise.
14119 (vcmpeqq_s16): Likewise.
14120 (vcmpeqq_n_s16): Likewise.
14121 (vqshluq_n_s16): Likewise.
14122 (vaddvq_p_s16): Likewise.
14123 (vsubq_s16): Likewise.
14124 (vsubq_n_s16): Likewise.
14125 (vshlq_r_s16): Likewise.
14126 (vrshlq_s16): Likewise.
14127 (vrshlq_n_s16): Likewise.
14128 (vrmulhq_s16): Likewise.
14129 (vrhaddq_s16): Likewise.
14130 (vqsubq_s16): Likewise.
14131 (vqsubq_n_s16): Likewise.
14132 (vqshlq_s16): Likewise.
14133 (vqshlq_r_s16): Likewise.
14134 (vqrshlq_s16): Likewise.
14135 (vqrshlq_n_s16): Likewise.
14136 (vqrdmulhq_s16): Likewise.
14137 (vqrdmulhq_n_s16): Likewise.
14138 (vqdmulhq_s16): Likewise.
14139 (vqdmulhq_n_s16): Likewise.
14140 (vqaddq_s16): Likewise.
14141 (vqaddq_n_s16): Likewise.
14142 (vorrq_s16): Likewise.
14143 (vornq_s16): Likewise.
14144 (vmulq_s16): Likewise.
14145 (vmulq_n_s16): Likewise.
14146 (vmulltq_int_s16): Likewise.
14147 (vmullbq_int_s16): Likewise.
14148 (vmulhq_s16): Likewise.
14149 (vmlsdavxq_s16): Likewise.
14150 (vmlsdavq_s16): Likewise.
14151 (vmladavxq_s16): Likewise.
14152 (vmladavq_s16): Likewise.
14153 (vminvq_s16): Likewise.
14154 (vminq_s16): Likewise.
14155 (vmaxvq_s16): Likewise.
14156 (vmaxq_s16): Likewise.
14157 (vhsubq_s16): Likewise.
14158 (vhsubq_n_s16): Likewise.
14159 (vhcaddq_rot90_s16): Likewise.
14160 (vhcaddq_rot270_s16): Likewise.
14161 (vhaddq_s16): Likewise.
14162 (vhaddq_n_s16): Likewise.
14163 (veorq_s16): Likewise.
14164 (vcaddq_rot90_s16): Likewise.
14165 (vcaddq_rot270_s16): Likewise.
14166 (vbrsrq_n_s16): Likewise.
14167 (vbicq_s16): Likewise.
14168 (vandq_s16): Likewise.
14169 (vaddvaq_s16): Likewise.
14170 (vaddq_n_s16): Likewise.
14171 (vabdq_s16): Likewise.
14172 (vshlq_n_s16): Likewise.
14173 (vrshrq_n_s16): Likewise.
14174 (vqshlq_n_s16): Likewise.
14175 (vsubq_u32): Likewise.
14176 (vsubq_n_u32): Likewise.
14177 (vrmulhq_u32): Likewise.
14178 (vrhaddq_u32): Likewise.
14179 (vqsubq_u32): Likewise.
14180 (vqsubq_n_u32): Likewise.
14181 (vqaddq_u32): Likewise.
14182 (vqaddq_n_u32): Likewise.
14183 (vorrq_u32): Likewise.
14184 (vornq_u32): Likewise.
14185 (vmulq_u32): Likewise.
14186 (vmulq_n_u32): Likewise.
14187 (vmulltq_int_u32): Likewise.
14188 (vmullbq_int_u32): Likewise.
14189 (vmulhq_u32): Likewise.
14190 (vmladavq_u32): Likewise.
14191 (vminvq_u32): Likewise.
14192 (vminq_u32): Likewise.
14193 (vmaxvq_u32): Likewise.
14194 (vmaxq_u32): Likewise.
14195 (vhsubq_u32): Likewise.
14196 (vhsubq_n_u32): Likewise.
14197 (vhaddq_u32): Likewise.
14198 (vhaddq_n_u32): Likewise.
14199 (veorq_u32): Likewise.
14200 (vcmpneq_n_u32): Likewise.
14201 (vcmphiq_u32): Likewise.
14202 (vcmphiq_n_u32): Likewise.
14203 (vcmpeqq_u32): Likewise.
14204 (vcmpeqq_n_u32): Likewise.
14205 (vcmpcsq_u32): Likewise.
14206 (vcmpcsq_n_u32): Likewise.
14207 (vcaddq_rot90_u32): Likewise.
14208 (vcaddq_rot270_u32): Likewise.
14209 (vbicq_u32): Likewise.
14210 (vandq_u32): Likewise.
14211 (vaddvq_p_u32): Likewise.
14212 (vaddvaq_u32): Likewise.
14213 (vaddq_n_u32): Likewise.
14214 (vabdq_u32): Likewise.
14215 (vshlq_r_u32): Likewise.
14216 (vrshlq_u32): Likewise.
14217 (vrshlq_n_u32): Likewise.
14218 (vqshlq_u32): Likewise.
14219 (vqshlq_r_u32): Likewise.
14220 (vqrshlq_u32): Likewise.
14221 (vqrshlq_n_u32): Likewise.
14222 (vminavq_s32): Likewise.
14223 (vminaq_s32): Likewise.
14224 (vmaxavq_s32): Likewise.
14225 (vmaxaq_s32): Likewise.
14226 (vbrsrq_n_u32): Likewise.
14227 (vshlq_n_u32): Likewise.
14228 (vrshrq_n_u32): Likewise.
14229 (vqshlq_n_u32): Likewise.
14230 (vcmpneq_n_s32): Likewise.
14231 (vcmpltq_s32): Likewise.
14232 (vcmpltq_n_s32): Likewise.
14233 (vcmpleq_s32): Likewise.
14234 (vcmpleq_n_s32): Likewise.
14235 (vcmpgtq_s32): Likewise.
14236 (vcmpgtq_n_s32): Likewise.
14237 (vcmpgeq_s32): Likewise.
14238 (vcmpgeq_n_s32): Likewise.
14239 (vcmpeqq_s32): Likewise.
14240 (vcmpeqq_n_s32): Likewise.
14241 (vqshluq_n_s32): Likewise.
14242 (vaddvq_p_s32): Likewise.
14243 (vsubq_s32): Likewise.
14244 (vsubq_n_s32): Likewise.
14245 (vshlq_r_s32): Likewise.
14246 (vrshlq_s32): Likewise.
14247 (vrshlq_n_s32): Likewise.
14248 (vrmulhq_s32): Likewise.
14249 (vrhaddq_s32): Likewise.
14250 (vqsubq_s32): Likewise.
14251 (vqsubq_n_s32): Likewise.
14252 (vqshlq_s32): Likewise.
14253 (vqshlq_r_s32): Likewise.
14254 (vqrshlq_s32): Likewise.
14255 (vqrshlq_n_s32): Likewise.
14256 (vqrdmulhq_s32): Likewise.
14257 (vqrdmulhq_n_s32): Likewise.
14258 (vqdmulhq_s32): Likewise.
14259 (vqdmulhq_n_s32): Likewise.
14260 (vqaddq_s32): Likewise.
14261 (vqaddq_n_s32): Likewise.
14262 (vorrq_s32): Likewise.
14263 (vornq_s32): Likewise.
14264 (vmulq_s32): Likewise.
14265 (vmulq_n_s32): Likewise.
14266 (vmulltq_int_s32): Likewise.
14267 (vmullbq_int_s32): Likewise.
14268 (vmulhq_s32): Likewise.
14269 (vmlsdavxq_s32): Likewise.
14270 (vmlsdavq_s32): Likewise.
14271 (vmladavxq_s32): Likewise.
14272 (vmladavq_s32): Likewise.
14273 (vminvq_s32): Likewise.
14274 (vminq_s32): Likewise.
14275 (vmaxvq_s32): Likewise.
14276 (vmaxq_s32): Likewise.
14277 (vhsubq_s32): Likewise.
14278 (vhsubq_n_s32): Likewise.
14279 (vhcaddq_rot90_s32): Likewise.
14280 (vhcaddq_rot270_s32): Likewise.
14281 (vhaddq_s32): Likewise.
14282 (vhaddq_n_s32): Likewise.
14283 (veorq_s32): Likewise.
14284 (vcaddq_rot90_s32): Likewise.
14285 (vcaddq_rot270_s32): Likewise.
14286 (vbrsrq_n_s32): Likewise.
14287 (vbicq_s32): Likewise.
14288 (vandq_s32): Likewise.
14289 (vaddvaq_s32): Likewise.
14290 (vaddq_n_s32): Likewise.
14291 (vabdq_s32): Likewise.
14292 (vshlq_n_s32): Likewise.
14293 (vrshrq_n_s32): Likewise.
14294 (vqshlq_n_s32): Likewise.
14295 (__arm_vsubq_u8): Define intrinsic.
14296 (__arm_vsubq_n_u8): Likewise.
14297 (__arm_vrmulhq_u8): Likewise.
14298 (__arm_vrhaddq_u8): Likewise.
14299 (__arm_vqsubq_u8): Likewise.
14300 (__arm_vqsubq_n_u8): Likewise.
14301 (__arm_vqaddq_u8): Likewise.
14302 (__arm_vqaddq_n_u8): Likewise.
14303 (__arm_vorrq_u8): Likewise.
14304 (__arm_vornq_u8): Likewise.
14305 (__arm_vmulq_u8): Likewise.
14306 (__arm_vmulq_n_u8): Likewise.
14307 (__arm_vmulltq_int_u8): Likewise.
14308 (__arm_vmullbq_int_u8): Likewise.
14309 (__arm_vmulhq_u8): Likewise.
14310 (__arm_vmladavq_u8): Likewise.
14311 (__arm_vminvq_u8): Likewise.
14312 (__arm_vminq_u8): Likewise.
14313 (__arm_vmaxvq_u8): Likewise.
14314 (__arm_vmaxq_u8): Likewise.
14315 (__arm_vhsubq_u8): Likewise.
14316 (__arm_vhsubq_n_u8): Likewise.
14317 (__arm_vhaddq_u8): Likewise.
14318 (__arm_vhaddq_n_u8): Likewise.
14319 (__arm_veorq_u8): Likewise.
14320 (__arm_vcmpneq_n_u8): Likewise.
14321 (__arm_vcmphiq_u8): Likewise.
14322 (__arm_vcmphiq_n_u8): Likewise.
14323 (__arm_vcmpeqq_u8): Likewise.
14324 (__arm_vcmpeqq_n_u8): Likewise.
14325 (__arm_vcmpcsq_u8): Likewise.
14326 (__arm_vcmpcsq_n_u8): Likewise.
14327 (__arm_vcaddq_rot90_u8): Likewise.
14328 (__arm_vcaddq_rot270_u8): Likewise.
14329 (__arm_vbicq_u8): Likewise.
14330 (__arm_vandq_u8): Likewise.
14331 (__arm_vaddvq_p_u8): Likewise.
14332 (__arm_vaddvaq_u8): Likewise.
14333 (__arm_vaddq_n_u8): Likewise.
14334 (__arm_vabdq_u8): Likewise.
14335 (__arm_vshlq_r_u8): Likewise.
14336 (__arm_vrshlq_u8): Likewise.
14337 (__arm_vrshlq_n_u8): Likewise.
14338 (__arm_vqshlq_u8): Likewise.
14339 (__arm_vqshlq_r_u8): Likewise.
14340 (__arm_vqrshlq_u8): Likewise.
14341 (__arm_vqrshlq_n_u8): Likewise.
14342 (__arm_vminavq_s8): Likewise.
14343 (__arm_vminaq_s8): Likewise.
14344 (__arm_vmaxavq_s8): Likewise.
14345 (__arm_vmaxaq_s8): Likewise.
14346 (__arm_vbrsrq_n_u8): Likewise.
14347 (__arm_vshlq_n_u8): Likewise.
14348 (__arm_vrshrq_n_u8): Likewise.
14349 (__arm_vqshlq_n_u8): Likewise.
14350 (__arm_vcmpneq_n_s8): Likewise.
14351 (__arm_vcmpltq_s8): Likewise.
14352 (__arm_vcmpltq_n_s8): Likewise.
14353 (__arm_vcmpleq_s8): Likewise.
14354 (__arm_vcmpleq_n_s8): Likewise.
14355 (__arm_vcmpgtq_s8): Likewise.
14356 (__arm_vcmpgtq_n_s8): Likewise.
14357 (__arm_vcmpgeq_s8): Likewise.
14358 (__arm_vcmpgeq_n_s8): Likewise.
14359 (__arm_vcmpeqq_s8): Likewise.
14360 (__arm_vcmpeqq_n_s8): Likewise.
14361 (__arm_vqshluq_n_s8): Likewise.
14362 (__arm_vaddvq_p_s8): Likewise.
14363 (__arm_vsubq_s8): Likewise.
14364 (__arm_vsubq_n_s8): Likewise.
14365 (__arm_vshlq_r_s8): Likewise.
14366 (__arm_vrshlq_s8): Likewise.
14367 (__arm_vrshlq_n_s8): Likewise.
14368 (__arm_vrmulhq_s8): Likewise.
14369 (__arm_vrhaddq_s8): Likewise.
14370 (__arm_vqsubq_s8): Likewise.
14371 (__arm_vqsubq_n_s8): Likewise.
14372 (__arm_vqshlq_s8): Likewise.
14373 (__arm_vqshlq_r_s8): Likewise.
14374 (__arm_vqrshlq_s8): Likewise.
14375 (__arm_vqrshlq_n_s8): Likewise.
14376 (__arm_vqrdmulhq_s8): Likewise.
14377 (__arm_vqrdmulhq_n_s8): Likewise.
14378 (__arm_vqdmulhq_s8): Likewise.
14379 (__arm_vqdmulhq_n_s8): Likewise.
14380 (__arm_vqaddq_s8): Likewise.
14381 (__arm_vqaddq_n_s8): Likewise.
14382 (__arm_vorrq_s8): Likewise.
14383 (__arm_vornq_s8): Likewise.
14384 (__arm_vmulq_s8): Likewise.
14385 (__arm_vmulq_n_s8): Likewise.
14386 (__arm_vmulltq_int_s8): Likewise.
14387 (__arm_vmullbq_int_s8): Likewise.
14388 (__arm_vmulhq_s8): Likewise.
14389 (__arm_vmlsdavxq_s8): Likewise.
14390 (__arm_vmlsdavq_s8): Likewise.
14391 (__arm_vmladavxq_s8): Likewise.
14392 (__arm_vmladavq_s8): Likewise.
14393 (__arm_vminvq_s8): Likewise.
14394 (__arm_vminq_s8): Likewise.
14395 (__arm_vmaxvq_s8): Likewise.
14396 (__arm_vmaxq_s8): Likewise.
14397 (__arm_vhsubq_s8): Likewise.
14398 (__arm_vhsubq_n_s8): Likewise.
14399 (__arm_vhcaddq_rot90_s8): Likewise.
14400 (__arm_vhcaddq_rot270_s8): Likewise.
14401 (__arm_vhaddq_s8): Likewise.
14402 (__arm_vhaddq_n_s8): Likewise.
14403 (__arm_veorq_s8): Likewise.
14404 (__arm_vcaddq_rot90_s8): Likewise.
14405 (__arm_vcaddq_rot270_s8): Likewise.
14406 (__arm_vbrsrq_n_s8): Likewise.
14407 (__arm_vbicq_s8): Likewise.
14408 (__arm_vandq_s8): Likewise.
14409 (__arm_vaddvaq_s8): Likewise.
14410 (__arm_vaddq_n_s8): Likewise.
14411 (__arm_vabdq_s8): Likewise.
14412 (__arm_vshlq_n_s8): Likewise.
14413 (__arm_vrshrq_n_s8): Likewise.
14414 (__arm_vqshlq_n_s8): Likewise.
14415 (__arm_vsubq_u16): Likewise.
14416 (__arm_vsubq_n_u16): Likewise.
14417 (__arm_vrmulhq_u16): Likewise.
14418 (__arm_vrhaddq_u16): Likewise.
14419 (__arm_vqsubq_u16): Likewise.
14420 (__arm_vqsubq_n_u16): Likewise.
14421 (__arm_vqaddq_u16): Likewise.
14422 (__arm_vqaddq_n_u16): Likewise.
14423 (__arm_vorrq_u16): Likewise.
14424 (__arm_vornq_u16): Likewise.
14425 (__arm_vmulq_u16): Likewise.
14426 (__arm_vmulq_n_u16): Likewise.
14427 (__arm_vmulltq_int_u16): Likewise.
14428 (__arm_vmullbq_int_u16): Likewise.
14429 (__arm_vmulhq_u16): Likewise.
14430 (__arm_vmladavq_u16): Likewise.
14431 (__arm_vminvq_u16): Likewise.
14432 (__arm_vminq_u16): Likewise.
14433 (__arm_vmaxvq_u16): Likewise.
14434 (__arm_vmaxq_u16): Likewise.
14435 (__arm_vhsubq_u16): Likewise.
14436 (__arm_vhsubq_n_u16): Likewise.
14437 (__arm_vhaddq_u16): Likewise.
14438 (__arm_vhaddq_n_u16): Likewise.
14439 (__arm_veorq_u16): Likewise.
14440 (__arm_vcmpneq_n_u16): Likewise.
14441 (__arm_vcmphiq_u16): Likewise.
14442 (__arm_vcmphiq_n_u16): Likewise.
14443 (__arm_vcmpeqq_u16): Likewise.
14444 (__arm_vcmpeqq_n_u16): Likewise.
14445 (__arm_vcmpcsq_u16): Likewise.
14446 (__arm_vcmpcsq_n_u16): Likewise.
14447 (__arm_vcaddq_rot90_u16): Likewise.
14448 (__arm_vcaddq_rot270_u16): Likewise.
14449 (__arm_vbicq_u16): Likewise.
14450 (__arm_vandq_u16): Likewise.
14451 (__arm_vaddvq_p_u16): Likewise.
14452 (__arm_vaddvaq_u16): Likewise.
14453 (__arm_vaddq_n_u16): Likewise.
14454 (__arm_vabdq_u16): Likewise.
14455 (__arm_vshlq_r_u16): Likewise.
14456 (__arm_vrshlq_u16): Likewise.
14457 (__arm_vrshlq_n_u16): Likewise.
14458 (__arm_vqshlq_u16): Likewise.
14459 (__arm_vqshlq_r_u16): Likewise.
14460 (__arm_vqrshlq_u16): Likewise.
14461 (__arm_vqrshlq_n_u16): Likewise.
14462 (__arm_vminavq_s16): Likewise.
14463 (__arm_vminaq_s16): Likewise.
14464 (__arm_vmaxavq_s16): Likewise.
14465 (__arm_vmaxaq_s16): Likewise.
14466 (__arm_vbrsrq_n_u16): Likewise.
14467 (__arm_vshlq_n_u16): Likewise.
14468 (__arm_vrshrq_n_u16): Likewise.
14469 (__arm_vqshlq_n_u16): Likewise.
14470 (__arm_vcmpneq_n_s16): Likewise.
14471 (__arm_vcmpltq_s16): Likewise.
14472 (__arm_vcmpltq_n_s16): Likewise.
14473 (__arm_vcmpleq_s16): Likewise.
14474 (__arm_vcmpleq_n_s16): Likewise.
14475 (__arm_vcmpgtq_s16): Likewise.
14476 (__arm_vcmpgtq_n_s16): Likewise.
14477 (__arm_vcmpgeq_s16): Likewise.
14478 (__arm_vcmpgeq_n_s16): Likewise.
14479 (__arm_vcmpeqq_s16): Likewise.
14480 (__arm_vcmpeqq_n_s16): Likewise.
14481 (__arm_vqshluq_n_s16): Likewise.
14482 (__arm_vaddvq_p_s16): Likewise.
14483 (__arm_vsubq_s16): Likewise.
14484 (__arm_vsubq_n_s16): Likewise.
14485 (__arm_vshlq_r_s16): Likewise.
14486 (__arm_vrshlq_s16): Likewise.
14487 (__arm_vrshlq_n_s16): Likewise.
14488 (__arm_vrmulhq_s16): Likewise.
14489 (__arm_vrhaddq_s16): Likewise.
14490 (__arm_vqsubq_s16): Likewise.
14491 (__arm_vqsubq_n_s16): Likewise.
14492 (__arm_vqshlq_s16): Likewise.
14493 (__arm_vqshlq_r_s16): Likewise.
14494 (__arm_vqrshlq_s16): Likewise.
14495 (__arm_vqrshlq_n_s16): Likewise.
14496 (__arm_vqrdmulhq_s16): Likewise.
14497 (__arm_vqrdmulhq_n_s16): Likewise.
14498 (__arm_vqdmulhq_s16): Likewise.
14499 (__arm_vqdmulhq_n_s16): Likewise.
14500 (__arm_vqaddq_s16): Likewise.
14501 (__arm_vqaddq_n_s16): Likewise.
14502 (__arm_vorrq_s16): Likewise.
14503 (__arm_vornq_s16): Likewise.
14504 (__arm_vmulq_s16): Likewise.
14505 (__arm_vmulq_n_s16): Likewise.
14506 (__arm_vmulltq_int_s16): Likewise.
14507 (__arm_vmullbq_int_s16): Likewise.
14508 (__arm_vmulhq_s16): Likewise.
14509 (__arm_vmlsdavxq_s16): Likewise.
14510 (__arm_vmlsdavq_s16): Likewise.
14511 (__arm_vmladavxq_s16): Likewise.
14512 (__arm_vmladavq_s16): Likewise.
14513 (__arm_vminvq_s16): Likewise.
14514 (__arm_vminq_s16): Likewise.
14515 (__arm_vmaxvq_s16): Likewise.
14516 (__arm_vmaxq_s16): Likewise.
14517 (__arm_vhsubq_s16): Likewise.
14518 (__arm_vhsubq_n_s16): Likewise.
14519 (__arm_vhcaddq_rot90_s16): Likewise.
14520 (__arm_vhcaddq_rot270_s16): Likewise.
14521 (__arm_vhaddq_s16): Likewise.
14522 (__arm_vhaddq_n_s16): Likewise.
14523 (__arm_veorq_s16): Likewise.
14524 (__arm_vcaddq_rot90_s16): Likewise.
14525 (__arm_vcaddq_rot270_s16): Likewise.
14526 (__arm_vbrsrq_n_s16): Likewise.
14527 (__arm_vbicq_s16): Likewise.
14528 (__arm_vandq_s16): Likewise.
14529 (__arm_vaddvaq_s16): Likewise.
14530 (__arm_vaddq_n_s16): Likewise.
14531 (__arm_vabdq_s16): Likewise.
14532 (__arm_vshlq_n_s16): Likewise.
14533 (__arm_vrshrq_n_s16): Likewise.
14534 (__arm_vqshlq_n_s16): Likewise.
14535 (__arm_vsubq_u32): Likewise.
14536 (__arm_vsubq_n_u32): Likewise.
14537 (__arm_vrmulhq_u32): Likewise.
14538 (__arm_vrhaddq_u32): Likewise.
14539 (__arm_vqsubq_u32): Likewise.
14540 (__arm_vqsubq_n_u32): Likewise.
14541 (__arm_vqaddq_u32): Likewise.
14542 (__arm_vqaddq_n_u32): Likewise.
14543 (__arm_vorrq_u32): Likewise.
14544 (__arm_vornq_u32): Likewise.
14545 (__arm_vmulq_u32): Likewise.
14546 (__arm_vmulq_n_u32): Likewise.
14547 (__arm_vmulltq_int_u32): Likewise.
14548 (__arm_vmullbq_int_u32): Likewise.
14549 (__arm_vmulhq_u32): Likewise.
14550 (__arm_vmladavq_u32): Likewise.
14551 (__arm_vminvq_u32): Likewise.
14552 (__arm_vminq_u32): Likewise.
14553 (__arm_vmaxvq_u32): Likewise.
14554 (__arm_vmaxq_u32): Likewise.
14555 (__arm_vhsubq_u32): Likewise.
14556 (__arm_vhsubq_n_u32): Likewise.
14557 (__arm_vhaddq_u32): Likewise.
14558 (__arm_vhaddq_n_u32): Likewise.
14559 (__arm_veorq_u32): Likewise.
14560 (__arm_vcmpneq_n_u32): Likewise.
14561 (__arm_vcmphiq_u32): Likewise.
14562 (__arm_vcmphiq_n_u32): Likewise.
14563 (__arm_vcmpeqq_u32): Likewise.
14564 (__arm_vcmpeqq_n_u32): Likewise.
14565 (__arm_vcmpcsq_u32): Likewise.
14566 (__arm_vcmpcsq_n_u32): Likewise.
14567 (__arm_vcaddq_rot90_u32): Likewise.
14568 (__arm_vcaddq_rot270_u32): Likewise.
14569 (__arm_vbicq_u32): Likewise.
14570 (__arm_vandq_u32): Likewise.
14571 (__arm_vaddvq_p_u32): Likewise.
14572 (__arm_vaddvaq_u32): Likewise.
14573 (__arm_vaddq_n_u32): Likewise.
14574 (__arm_vabdq_u32): Likewise.
14575 (__arm_vshlq_r_u32): Likewise.
14576 (__arm_vrshlq_u32): Likewise.
14577 (__arm_vrshlq_n_u32): Likewise.
14578 (__arm_vqshlq_u32): Likewise.
14579 (__arm_vqshlq_r_u32): Likewise.
14580 (__arm_vqrshlq_u32): Likewise.
14581 (__arm_vqrshlq_n_u32): Likewise.
14582 (__arm_vminavq_s32): Likewise.
14583 (__arm_vminaq_s32): Likewise.
14584 (__arm_vmaxavq_s32): Likewise.
14585 (__arm_vmaxaq_s32): Likewise.
14586 (__arm_vbrsrq_n_u32): Likewise.
14587 (__arm_vshlq_n_u32): Likewise.
14588 (__arm_vrshrq_n_u32): Likewise.
14589 (__arm_vqshlq_n_u32): Likewise.
14590 (__arm_vcmpneq_n_s32): Likewise.
14591 (__arm_vcmpltq_s32): Likewise.
14592 (__arm_vcmpltq_n_s32): Likewise.
14593 (__arm_vcmpleq_s32): Likewise.
14594 (__arm_vcmpleq_n_s32): Likewise.
14595 (__arm_vcmpgtq_s32): Likewise.
14596 (__arm_vcmpgtq_n_s32): Likewise.
14597 (__arm_vcmpgeq_s32): Likewise.
14598 (__arm_vcmpgeq_n_s32): Likewise.
14599 (__arm_vcmpeqq_s32): Likewise.
14600 (__arm_vcmpeqq_n_s32): Likewise.
14601 (__arm_vqshluq_n_s32): Likewise.
14602 (__arm_vaddvq_p_s32): Likewise.
14603 (__arm_vsubq_s32): Likewise.
14604 (__arm_vsubq_n_s32): Likewise.
14605 (__arm_vshlq_r_s32): Likewise.
14606 (__arm_vrshlq_s32): Likewise.
14607 (__arm_vrshlq_n_s32): Likewise.
14608 (__arm_vrmulhq_s32): Likewise.
14609 (__arm_vrhaddq_s32): Likewise.
14610 (__arm_vqsubq_s32): Likewise.
14611 (__arm_vqsubq_n_s32): Likewise.
14612 (__arm_vqshlq_s32): Likewise.
14613 (__arm_vqshlq_r_s32): Likewise.
14614 (__arm_vqrshlq_s32): Likewise.
14615 (__arm_vqrshlq_n_s32): Likewise.
14616 (__arm_vqrdmulhq_s32): Likewise.
14617 (__arm_vqrdmulhq_n_s32): Likewise.
14618 (__arm_vqdmulhq_s32): Likewise.
14619 (__arm_vqdmulhq_n_s32): Likewise.
14620 (__arm_vqaddq_s32): Likewise.
14621 (__arm_vqaddq_n_s32): Likewise.
14622 (__arm_vorrq_s32): Likewise.
14623 (__arm_vornq_s32): Likewise.
14624 (__arm_vmulq_s32): Likewise.
14625 (__arm_vmulq_n_s32): Likewise.
14626 (__arm_vmulltq_int_s32): Likewise.
14627 (__arm_vmullbq_int_s32): Likewise.
14628 (__arm_vmulhq_s32): Likewise.
14629 (__arm_vmlsdavxq_s32): Likewise.
14630 (__arm_vmlsdavq_s32): Likewise.
14631 (__arm_vmladavxq_s32): Likewise.
14632 (__arm_vmladavq_s32): Likewise.
14633 (__arm_vminvq_s32): Likewise.
14634 (__arm_vminq_s32): Likewise.
14635 (__arm_vmaxvq_s32): Likewise.
14636 (__arm_vmaxq_s32): Likewise.
14637 (__arm_vhsubq_s32): Likewise.
14638 (__arm_vhsubq_n_s32): Likewise.
14639 (__arm_vhcaddq_rot90_s32): Likewise.
14640 (__arm_vhcaddq_rot270_s32): Likewise.
14641 (__arm_vhaddq_s32): Likewise.
14642 (__arm_vhaddq_n_s32): Likewise.
14643 (__arm_veorq_s32): Likewise.
14644 (__arm_vcaddq_rot90_s32): Likewise.
14645 (__arm_vcaddq_rot270_s32): Likewise.
14646 (__arm_vbrsrq_n_s32): Likewise.
14647 (__arm_vbicq_s32): Likewise.
14648 (__arm_vandq_s32): Likewise.
14649 (__arm_vaddvaq_s32): Likewise.
14650 (__arm_vaddq_n_s32): Likewise.
14651 (__arm_vabdq_s32): Likewise.
14652 (__arm_vshlq_n_s32): Likewise.
14653 (__arm_vrshrq_n_s32): Likewise.
14654 (__arm_vqshlq_n_s32): Likewise.
14655 (vsubq): Define polymorphic variant.
14656 (vsubq_n): Likewise.
14657 (vshlq_r): Likewise.
14658 (vrshlq_n): Likewise.
14659 (vrshlq): Likewise.
14660 (vrmulhq): Likewise.
14661 (vrhaddq): Likewise.
14662 (vqsubq_n): Likewise.
14663 (vqsubq): Likewise.
14664 (vqshlq): Likewise.
14665 (vqshlq_r): Likewise.
14666 (vqshluq): Likewise.
14667 (vrshrq_n): Likewise.
14668 (vshlq_n): Likewise.
14669 (vqshluq_n): Likewise.
14670 (vqshlq_n): Likewise.
14671 (vqrshlq_n): Likewise.
14672 (vqrshlq): Likewise.
14673 (vqrdmulhq_n): Likewise.
14674 (vqrdmulhq): Likewise.
14675 (vqdmulhq_n): Likewise.
14676 (vqdmulhq): Likewise.
14677 (vqaddq_n): Likewise.
14678 (vqaddq): Likewise.
14679 (vorrq_n): Likewise.
14682 (vmulq_n): Likewise.
14684 (vmulltq_int): Likewise.
14685 (vmullbq_int): Likewise.
14686 (vmulhq): Likewise.
14688 (vminaq): Likewise.
14690 (vmaxaq): Likewise.
14691 (vhsubq_n): Likewise.
14692 (vhsubq): Likewise.
14693 (vhcaddq_rot90): Likewise.
14694 (vhcaddq_rot270): Likewise.
14695 (vhaddq_n): Likewise.
14696 (vhaddq): Likewise.
14698 (vcaddq_rot90): Likewise.
14699 (vcaddq_rot270): Likewise.
14700 (vbrsrq_n): Likewise.
14701 (vbicq_n): Likewise.
14704 (vaddq_n): Likewise.
14707 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
14708 (BINOP_NONE_NONE_NONE): Likewise.
14709 (BINOP_NONE_NONE_UNONE): Likewise.
14710 (BINOP_UNONE_NONE_IMM): Likewise.
14711 (BINOP_UNONE_NONE_NONE): Likewise.
14712 (BINOP_UNONE_UNONE_IMM): Likewise.
14713 (BINOP_UNONE_UNONE_NONE): Likewise.
14714 (BINOP_UNONE_UNONE_UNONE): Likewise.
14715 * config/arm/constraints.md (Ra): Define constraint to check constant is
14716 in the range of 0 to 7.
14717 (Rg): Define constriant to check the constant is one among 1, 2, 4
14719 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
14720 (mve_vaddq_n_<supf>): Likewise.
14721 (mve_vaddvaq_<supf>): Likewise.
14722 (mve_vaddvq_p_<supf>): Likewise.
14723 (mve_vandq_<supf>): Likewise.
14724 (mve_vbicq_<supf>): Likewise.
14725 (mve_vbrsrq_n_<supf>): Likewise.
14726 (mve_vcaddq_rot270_<supf>): Likewise.
14727 (mve_vcaddq_rot90_<supf>): Likewise.
14728 (mve_vcmpcsq_n_u): Likewise.
14729 (mve_vcmpcsq_u): Likewise.
14730 (mve_vcmpeqq_n_<supf>): Likewise.
14731 (mve_vcmpeqq_<supf>): Likewise.
14732 (mve_vcmpgeq_n_s): Likewise.
14733 (mve_vcmpgeq_s): Likewise.
14734 (mve_vcmpgtq_n_s): Likewise.
14735 (mve_vcmpgtq_s): Likewise.
14736 (mve_vcmphiq_n_u): Likewise.
14737 (mve_vcmphiq_u): Likewise.
14738 (mve_vcmpleq_n_s): Likewise.
14739 (mve_vcmpleq_s): Likewise.
14740 (mve_vcmpltq_n_s): Likewise.
14741 (mve_vcmpltq_s): Likewise.
14742 (mve_vcmpneq_n_<supf>): Likewise.
14743 (mve_vddupq_n_u): Likewise.
14744 (mve_veorq_<supf>): Likewise.
14745 (mve_vhaddq_n_<supf>): Likewise.
14746 (mve_vhaddq_<supf>): Likewise.
14747 (mve_vhcaddq_rot270_s): Likewise.
14748 (mve_vhcaddq_rot90_s): Likewise.
14749 (mve_vhsubq_n_<supf>): Likewise.
14750 (mve_vhsubq_<supf>): Likewise.
14751 (mve_vidupq_n_u): Likewise.
14752 (mve_vmaxaq_s): Likewise.
14753 (mve_vmaxavq_s): Likewise.
14754 (mve_vmaxq_<supf>): Likewise.
14755 (mve_vmaxvq_<supf>): Likewise.
14756 (mve_vminaq_s): Likewise.
14757 (mve_vminavq_s): Likewise.
14758 (mve_vminq_<supf>): Likewise.
14759 (mve_vminvq_<supf>): Likewise.
14760 (mve_vmladavq_<supf>): Likewise.
14761 (mve_vmladavxq_s): Likewise.
14762 (mve_vmlsdavq_s): Likewise.
14763 (mve_vmlsdavxq_s): Likewise.
14764 (mve_vmulhq_<supf>): Likewise.
14765 (mve_vmullbq_int_<supf>): Likewise.
14766 (mve_vmulltq_int_<supf>): Likewise.
14767 (mve_vmulq_n_<supf>): Likewise.
14768 (mve_vmulq_<supf>): Likewise.
14769 (mve_vornq_<supf>): Likewise.
14770 (mve_vorrq_<supf>): Likewise.
14771 (mve_vqaddq_n_<supf>): Likewise.
14772 (mve_vqaddq_<supf>): Likewise.
14773 (mve_vqdmulhq_n_s): Likewise.
14774 (mve_vqdmulhq_s): Likewise.
14775 (mve_vqrdmulhq_n_s): Likewise.
14776 (mve_vqrdmulhq_s): Likewise.
14777 (mve_vqrshlq_n_<supf>): Likewise.
14778 (mve_vqrshlq_<supf>): Likewise.
14779 (mve_vqshlq_n_<supf>): Likewise.
14780 (mve_vqshlq_r_<supf>): Likewise.
14781 (mve_vqshlq_<supf>): Likewise.
14782 (mve_vqshluq_n_s): Likewise.
14783 (mve_vqsubq_n_<supf>): Likewise.
14784 (mve_vqsubq_<supf>): Likewise.
14785 (mve_vrhaddq_<supf>): Likewise.
14786 (mve_vrmulhq_<supf>): Likewise.
14787 (mve_vrshlq_n_<supf>): Likewise.
14788 (mve_vrshlq_<supf>): Likewise.
14789 (mve_vrshrq_n_<supf>): Likewise.
14790 (mve_vshlq_n_<supf>): Likewise.
14791 (mve_vshlq_r_<supf>): Likewise.
14792 (mve_vsubq_n_<supf>): Likewise.
14793 (mve_vsubq_<supf>): Likewise.
14794 * config/arm/predicates.md (mve_imm_7): Define predicate to check
14795 the matching constraint Ra.
14796 (mve_imm_selective_upto_8): Define predicate to check the matching
14799 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14800 Mihail Ionescu <mihail.ionescu@arm.com>
14801 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14803 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
14804 qualifier for binary operands.
14805 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
14806 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
14807 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
14808 (vaddlvq_p_u32): Likewise.
14809 (vcmpneq_s8): Likewise.
14810 (vcmpneq_s16): Likewise.
14811 (vcmpneq_s32): Likewise.
14812 (vcmpneq_u8): Likewise.
14813 (vcmpneq_u16): Likewise.
14814 (vcmpneq_u32): Likewise.
14815 (vshlq_s8): Likewise.
14816 (vshlq_s16): Likewise.
14817 (vshlq_s32): Likewise.
14818 (vshlq_u8): Likewise.
14819 (vshlq_u16): Likewise.
14820 (vshlq_u32): Likewise.
14821 (__arm_vaddlvq_p_s32): Define intrinsic.
14822 (__arm_vaddlvq_p_u32): Likewise.
14823 (__arm_vcmpneq_s8): Likewise.
14824 (__arm_vcmpneq_s16): Likewise.
14825 (__arm_vcmpneq_s32): Likewise.
14826 (__arm_vcmpneq_u8): Likewise.
14827 (__arm_vcmpneq_u16): Likewise.
14828 (__arm_vcmpneq_u32): Likewise.
14829 (__arm_vshlq_s8): Likewise.
14830 (__arm_vshlq_s16): Likewise.
14831 (__arm_vshlq_s32): Likewise.
14832 (__arm_vshlq_u8): Likewise.
14833 (__arm_vshlq_u16): Likewise.
14834 (__arm_vshlq_u32): Likewise.
14835 (vaddlvq_p): Define polymorphic variant.
14836 (vcmpneq): Likewise.
14838 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
14840 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
14841 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
14842 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
14843 (mve_vcmpneq_<supf><mode>): Likewise.
14844 (mve_vshlq_<supf><mode>): Likewise.
14846 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14847 Mihail Ionescu <mihail.ionescu@arm.com>
14848 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14850 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
14851 qualifier for binary operands.
14852 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14853 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
14854 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
14855 (vcvtq_n_s32_f32): Likewise.
14856 (vcvtq_n_u16_f16): Likewise.
14857 (vcvtq_n_u32_f32): Likewise.
14858 (vcreateq_u8): Likewise.
14859 (vcreateq_u16): Likewise.
14860 (vcreateq_u32): Likewise.
14861 (vcreateq_u64): Likewise.
14862 (vcreateq_s8): Likewise.
14863 (vcreateq_s16): Likewise.
14864 (vcreateq_s32): Likewise.
14865 (vcreateq_s64): Likewise.
14866 (vshrq_n_s8): Likewise.
14867 (vshrq_n_s16): Likewise.
14868 (vshrq_n_s32): Likewise.
14869 (vshrq_n_u8): Likewise.
14870 (vshrq_n_u16): Likewise.
14871 (vshrq_n_u32): Likewise.
14872 (__arm_vcreateq_u8): Define intrinsic.
14873 (__arm_vcreateq_u16): Likewise.
14874 (__arm_vcreateq_u32): Likewise.
14875 (__arm_vcreateq_u64): Likewise.
14876 (__arm_vcreateq_s8): Likewise.
14877 (__arm_vcreateq_s16): Likewise.
14878 (__arm_vcreateq_s32): Likewise.
14879 (__arm_vcreateq_s64): Likewise.
14880 (__arm_vshrq_n_s8): Likewise.
14881 (__arm_vshrq_n_s16): Likewise.
14882 (__arm_vshrq_n_s32): Likewise.
14883 (__arm_vshrq_n_u8): Likewise.
14884 (__arm_vshrq_n_u16): Likewise.
14885 (__arm_vshrq_n_u32): Likewise.
14886 (__arm_vcvtq_n_s16_f16): Likewise.
14887 (__arm_vcvtq_n_s32_f32): Likewise.
14888 (__arm_vcvtq_n_u16_f16): Likewise.
14889 (__arm_vcvtq_n_u32_f32): Likewise.
14890 (vshrq_n): Define polymorphic variant.
14891 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
14893 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14894 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
14895 * config/arm/constraints.md (Rb): Define constraint to check constant is
14896 in the range of 1 to 8.
14897 (Rf): Define constraint to check constant is in the range of 1 to 32.
14898 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
14899 (mve_vshrq_n_<supf><mode>): Likewise.
14900 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
14901 * config/arm/predicates.md (mve_imm_8): Define predicate to check
14902 the matching constraint Rb.
14903 (mve_imm_32): Define predicate to check the matching constraint Rf.
14905 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14906 Mihail Ionescu <mihail.ionescu@arm.com>
14907 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14909 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
14910 qualifier for binary operands.
14911 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
14912 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14913 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
14914 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
14915 (vsubq_n_f32): Likewise.
14916 (vbrsrq_n_f16): Likewise.
14917 (vbrsrq_n_f32): Likewise.
14918 (vcvtq_n_f16_s16): Likewise.
14919 (vcvtq_n_f32_s32): Likewise.
14920 (vcvtq_n_f16_u16): Likewise.
14921 (vcvtq_n_f32_u32): Likewise.
14922 (vcreateq_f16): Likewise.
14923 (vcreateq_f32): Likewise.
14924 (__arm_vsubq_n_f16): Define intrinsic.
14925 (__arm_vsubq_n_f32): Likewise.
14926 (__arm_vbrsrq_n_f16): Likewise.
14927 (__arm_vbrsrq_n_f32): Likewise.
14928 (__arm_vcvtq_n_f16_s16): Likewise.
14929 (__arm_vcvtq_n_f32_s32): Likewise.
14930 (__arm_vcvtq_n_f16_u16): Likewise.
14931 (__arm_vcvtq_n_f32_u32): Likewise.
14932 (__arm_vcreateq_f16): Likewise.
14933 (__arm_vcreateq_f32): Likewise.
14934 (vsubq): Define polymorphic variant.
14935 (vbrsrq): Likewise.
14936 (vcvtq_n): Likewise.
14937 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
14939 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
14940 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14941 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
14942 * config/arm/constraints.md (Rd): Define constraint to check constant is
14943 in the range of 1 to 16.
14944 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
14945 mve_vbrsrq_n_f<mode>: Likewise.
14946 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
14947 mve_vcreateq_f<mode>: Likewise.
14948 * config/arm/predicates.md (mve_imm_16): Define predicate to check
14949 the matching constraint Rd.
14951 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14952 Mihail Ionescu <mihail.ionescu@arm.com>
14953 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14955 * config/arm/arm-builtins.c (hi_UP): Define mode.
14956 * config/arm/arm.h (IS_VPR_REGNUM): Move.
14957 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
14958 (APSRQ_REGNUM): Modify.
14959 (APSRGE_REGNUM): Modify.
14960 * config/arm/arm_mve.h (vctp16q): Define macro.
14961 (vctp32q): Likewise.
14962 (vctp64q): Likewise.
14963 (vctp8q): Likewise.
14965 (__arm_vctp16q): Define intrinsic.
14966 (__arm_vctp32q): Likewise.
14967 (__arm_vctp64q): Likewise.
14968 (__arm_vctp8q): Likewise.
14969 (__arm_vpnot): Likewise.
14970 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
14972 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
14973 (mve_vpnothi): Likewise.
14975 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14976 Mihail Ionescu <mihail.ionescu@arm.com>
14977 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14979 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
14980 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
14981 (vdupq_n_s16): Likewise.
14982 (vdupq_n_s32): Likewise.
14983 (vabsq_s8): Likewise.
14984 (vabsq_s16): Likewise.
14985 (vabsq_s32): Likewise.
14986 (vclsq_s8): Likewise.
14987 (vclsq_s16): Likewise.
14988 (vclsq_s32): Likewise.
14989 (vclzq_s8): Likewise.
14990 (vclzq_s16): Likewise.
14991 (vclzq_s32): Likewise.
14992 (vnegq_s8): Likewise.
14993 (vnegq_s16): Likewise.
14994 (vnegq_s32): Likewise.
14995 (vaddlvq_s32): Likewise.
14996 (vaddvq_s8): Likewise.
14997 (vaddvq_s16): Likewise.
14998 (vaddvq_s32): Likewise.
14999 (vmovlbq_s8): Likewise.
15000 (vmovlbq_s16): Likewise.
15001 (vmovltq_s8): Likewise.
15002 (vmovltq_s16): Likewise.
15003 (vmvnq_s8): Likewise.
15004 (vmvnq_s16): Likewise.
15005 (vmvnq_s32): Likewise.
15006 (vrev16q_s8): Likewise.
15007 (vrev32q_s8): Likewise.
15008 (vrev32q_s16): Likewise.
15009 (vqabsq_s8): Likewise.
15010 (vqabsq_s16): Likewise.
15011 (vqabsq_s32): Likewise.
15012 (vqnegq_s8): Likewise.
15013 (vqnegq_s16): Likewise.
15014 (vqnegq_s32): Likewise.
15015 (vcvtaq_s16_f16): Likewise.
15016 (vcvtaq_s32_f32): Likewise.
15017 (vcvtnq_s16_f16): Likewise.
15018 (vcvtnq_s32_f32): Likewise.
15019 (vcvtpq_s16_f16): Likewise.
15020 (vcvtpq_s32_f32): Likewise.
15021 (vcvtmq_s16_f16): Likewise.
15022 (vcvtmq_s32_f32): Likewise.
15023 (vmvnq_u8): Likewise.
15024 (vmvnq_u16): Likewise.
15025 (vmvnq_u32): Likewise.
15026 (vdupq_n_u8): Likewise.
15027 (vdupq_n_u16): Likewise.
15028 (vdupq_n_u32): Likewise.
15029 (vclzq_u8): Likewise.
15030 (vclzq_u16): Likewise.
15031 (vclzq_u32): Likewise.
15032 (vaddvq_u8): Likewise.
15033 (vaddvq_u16): Likewise.
15034 (vaddvq_u32): Likewise.
15035 (vrev32q_u8): Likewise.
15036 (vrev32q_u16): Likewise.
15037 (vmovltq_u8): Likewise.
15038 (vmovltq_u16): Likewise.
15039 (vmovlbq_u8): Likewise.
15040 (vmovlbq_u16): Likewise.
15041 (vrev16q_u8): Likewise.
15042 (vaddlvq_u32): Likewise.
15043 (vcvtpq_u16_f16): Likewise.
15044 (vcvtpq_u32_f32): Likewise.
15045 (vcvtnq_u16_f16): Likewise.
15046 (vcvtmq_u16_f16): Likewise.
15047 (vcvtmq_u32_f32): Likewise.
15048 (vcvtaq_u16_f16): Likewise.
15049 (vcvtaq_u32_f32): Likewise.
15050 (__arm_vdupq_n_s8): Define intrinsic.
15051 (__arm_vdupq_n_s16): Likewise.
15052 (__arm_vdupq_n_s32): Likewise.
15053 (__arm_vabsq_s8): Likewise.
15054 (__arm_vabsq_s16): Likewise.
15055 (__arm_vabsq_s32): Likewise.
15056 (__arm_vclsq_s8): Likewise.
15057 (__arm_vclsq_s16): Likewise.
15058 (__arm_vclsq_s32): Likewise.
15059 (__arm_vclzq_s8): Likewise.
15060 (__arm_vclzq_s16): Likewise.
15061 (__arm_vclzq_s32): Likewise.
15062 (__arm_vnegq_s8): Likewise.
15063 (__arm_vnegq_s16): Likewise.
15064 (__arm_vnegq_s32): Likewise.
15065 (__arm_vaddlvq_s32): Likewise.
15066 (__arm_vaddvq_s8): Likewise.
15067 (__arm_vaddvq_s16): Likewise.
15068 (__arm_vaddvq_s32): Likewise.
15069 (__arm_vmovlbq_s8): Likewise.
15070 (__arm_vmovlbq_s16): Likewise.
15071 (__arm_vmovltq_s8): Likewise.
15072 (__arm_vmovltq_s16): Likewise.
15073 (__arm_vmvnq_s8): Likewise.
15074 (__arm_vmvnq_s16): Likewise.
15075 (__arm_vmvnq_s32): Likewise.
15076 (__arm_vrev16q_s8): Likewise.
15077 (__arm_vrev32q_s8): Likewise.
15078 (__arm_vrev32q_s16): Likewise.
15079 (__arm_vqabsq_s8): Likewise.
15080 (__arm_vqabsq_s16): Likewise.
15081 (__arm_vqabsq_s32): Likewise.
15082 (__arm_vqnegq_s8): Likewise.
15083 (__arm_vqnegq_s16): Likewise.
15084 (__arm_vqnegq_s32): Likewise.
15085 (__arm_vmvnq_u8): Likewise.
15086 (__arm_vmvnq_u16): Likewise.
15087 (__arm_vmvnq_u32): Likewise.
15088 (__arm_vdupq_n_u8): Likewise.
15089 (__arm_vdupq_n_u16): Likewise.
15090 (__arm_vdupq_n_u32): Likewise.
15091 (__arm_vclzq_u8): Likewise.
15092 (__arm_vclzq_u16): Likewise.
15093 (__arm_vclzq_u32): Likewise.
15094 (__arm_vaddvq_u8): Likewise.
15095 (__arm_vaddvq_u16): Likewise.
15096 (__arm_vaddvq_u32): Likewise.
15097 (__arm_vrev32q_u8): Likewise.
15098 (__arm_vrev32q_u16): Likewise.
15099 (__arm_vmovltq_u8): Likewise.
15100 (__arm_vmovltq_u16): Likewise.
15101 (__arm_vmovlbq_u8): Likewise.
15102 (__arm_vmovlbq_u16): Likewise.
15103 (__arm_vrev16q_u8): Likewise.
15104 (__arm_vaddlvq_u32): Likewise.
15105 (__arm_vcvtpq_u16_f16): Likewise.
15106 (__arm_vcvtpq_u32_f32): Likewise.
15107 (__arm_vcvtnq_u16_f16): Likewise.
15108 (__arm_vcvtmq_u16_f16): Likewise.
15109 (__arm_vcvtmq_u32_f32): Likewise.
15110 (__arm_vcvtaq_u16_f16): Likewise.
15111 (__arm_vcvtaq_u32_f32): Likewise.
15112 (__arm_vcvtaq_s16_f16): Likewise.
15113 (__arm_vcvtaq_s32_f32): Likewise.
15114 (__arm_vcvtnq_s16_f16): Likewise.
15115 (__arm_vcvtnq_s32_f32): Likewise.
15116 (__arm_vcvtpq_s16_f16): Likewise.
15117 (__arm_vcvtpq_s32_f32): Likewise.
15118 (__arm_vcvtmq_s16_f16): Likewise.
15119 (__arm_vcvtmq_s32_f32): Likewise.
15120 (vdupq_n): Define polymorphic variant.
15125 (vaddlvq): Likewise.
15126 (vaddvq): Likewise.
15127 (vmovlbq): Likewise.
15128 (vmovltq): Likewise.
15130 (vrev16q): Likewise.
15131 (vrev32q): Likewise.
15132 (vqabsq): Likewise.
15133 (vqnegq): Likewise.
15134 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
15135 (UNOP_SNONE_NONE): Likewise.
15136 (UNOP_UNONE_UNONE): Likewise.
15137 (UNOP_UNONE_NONE): Likewise.
15138 * config/arm/constraints.md (e): Define new constriant to allow only
15140 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
15141 (mve_vnegq_s<mode>): Likewise.
15142 (mve_vmvnq_<supf><mode>): Likewise.
15143 (mve_vdupq_n_<supf><mode>): Likewise.
15144 (mve_vclzq_<supf><mode>): Likewise.
15145 (mve_vclsq_s<mode>): Likewise.
15146 (mve_vaddvq_<supf><mode>): Likewise.
15147 (mve_vabsq_s<mode>): Likewise.
15148 (mve_vrev32q_<supf><mode>): Likewise.
15149 (mve_vmovltq_<supf><mode>): Likewise.
15150 (mve_vmovlbq_<supf><mode>): Likewise.
15151 (mve_vcvtpq_<supf><mode>): Likewise.
15152 (mve_vcvtnq_<supf><mode>): Likewise.
15153 (mve_vcvtmq_<supf><mode>): Likewise.
15154 (mve_vcvtaq_<supf><mode>): Likewise.
15155 (mve_vrev16q_<supf>v16qi): Likewise.
15156 (mve_vaddlvq_<supf>v4si): Likewise.
15158 2020-03-17 Jakub Jelinek <jakub@redhat.com>
15160 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
15162 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
15164 * read-rtl-function.c (find_param_by_name,
15165 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
15167 * spellcheck.c (get_edit_distance_cutoff): Likewise.
15168 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
15169 * tree.def (SWITCH_EXPR): Likewise.
15170 * selftest.c (assert_str_contains): Likewise.
15171 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
15173 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
15174 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
15175 * langhooks.h (struct lang_hooks_for_decls): Likewise.
15176 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
15177 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
15179 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
15180 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
15181 * tree.c (component_ref_size): Likewise.
15182 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
15183 * gimple-ssa-sprintf.c (get_string_length, format_string,
15184 format_directive): Likewise.
15185 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
15186 * input.c (string_concat_db::get_string_concatenation,
15187 test_lexer_string_locations_ucn4): Likewise.
15188 * cfgexpand.c (pass_expand::execute): Likewise.
15189 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
15190 maybe_diag_overlap): Likewise.
15191 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
15192 * shrink-wrap.c (spread_components): Likewise.
15193 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
15195 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
15197 * dwarf2out.c (dwarf2out_early_finish): Likewise.
15198 * gimple-ssa-store-merging.c: Likewise.
15199 * ira-costs.c (record_operand_costs): Likewise.
15200 * tree-vect-loop.c (vectorizable_reduction): Likewise.
15201 * target.def (dispatch): Likewise.
15202 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
15203 in documentation text.
15204 * doc/tm.texi: Regenerated.
15205 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
15206 duplicated word issue in a comment.
15207 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
15208 * config/i386/i386-features.c (remove_partial_avx_dependency):
15210 * config/msp430/msp430.c (msp430_select_section): Likewise.
15211 * config/gcn/gcn-run.c (load_image): Likewise.
15212 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
15213 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
15214 * config/aarch64/falkor-tag-collision-avoidance.c
15215 (single_dest_per_chain): Likewise.
15216 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
15217 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
15218 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
15219 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
15221 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
15222 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
15223 * config/rs6000/rs6000-logue.c
15224 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
15225 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
15226 Fix various other issues in the comment.
15228 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
15230 * config/arm/t-rmprofile: create new multilib for
15231 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
15234 2020-03-17 Jakub Jelinek <jakub@redhat.com>
15236 PR tree-optimization/94015
15237 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
15238 function where EXP is address of the bytes being stored rather than
15239 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
15240 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
15241 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
15242 calling native_encode_expr if host or target doesn't have 8-bit
15243 chars. Formatting fixes.
15244 (count_nonzero_bytes_addr): New function.
15246 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15247 Mihail Ionescu <mihail.ionescu@arm.com>
15248 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15250 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
15251 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
15252 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
15253 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
15254 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
15255 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
15256 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
15257 (vmvnq_n_s32): Likewise.
15258 (vrev64q_s8): Likewise.
15259 (vrev64q_s16): Likewise.
15260 (vrev64q_s32): Likewise.
15261 (vcvtq_s16_f16): Likewise.
15262 (vcvtq_s32_f32): Likewise.
15263 (vrev64q_u8): Likewise.
15264 (vrev64q_u16): Likewise.
15265 (vrev64q_u32): Likewise.
15266 (vmvnq_n_u16): Likewise.
15267 (vmvnq_n_u32): Likewise.
15268 (vcvtq_u16_f16): Likewise.
15269 (vcvtq_u32_f32): Likewise.
15270 (__arm_vmvnq_n_s16): Define intrinsic.
15271 (__arm_vmvnq_n_s32): Likewise.
15272 (__arm_vrev64q_s8): Likewise.
15273 (__arm_vrev64q_s16): Likewise.
15274 (__arm_vrev64q_s32): Likewise.
15275 (__arm_vrev64q_u8): Likewise.
15276 (__arm_vrev64q_u16): Likewise.
15277 (__arm_vrev64q_u32): Likewise.
15278 (__arm_vmvnq_n_u16): Likewise.
15279 (__arm_vmvnq_n_u32): Likewise.
15280 (__arm_vcvtq_s16_f16): Likewise.
15281 (__arm_vcvtq_s32_f32): Likewise.
15282 (__arm_vcvtq_u16_f16): Likewise.
15283 (__arm_vcvtq_u32_f32): Likewise.
15284 (vrev64q): Define polymorphic variant.
15285 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
15286 (UNOP_SNONE_NONE): Likewise.
15287 (UNOP_SNONE_IMM): Likewise.
15288 (UNOP_UNONE_UNONE): Likewise.
15289 (UNOP_UNONE_NONE): Likewise.
15290 (UNOP_UNONE_IMM): Likewise.
15291 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
15292 (mve_vcvtq_from_f_<supf><mode>): Likewise.
15293 (mve_vmvnq_n_<supf><mode>): Likewise.
15295 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15296 Mihail Ionescu <mihail.ionescu@arm.com>
15297 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15299 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
15300 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
15301 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
15302 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
15303 (vrndxq_f32): Likewise.
15304 (vrndq_f16) Likewise.
15305 (vrndq_f32): Likewise.
15306 (vrndpq_f16): Likewise.
15307 (vrndpq_f32): Likewise.
15308 (vrndnq_f16): Likewise.
15309 (vrndnq_f32): Likewise.
15310 (vrndmq_f16): Likewise.
15311 (vrndmq_f32): Likewise.
15312 (vrndaq_f16): Likewise.
15313 (vrndaq_f32): Likewise.
15314 (vrev64q_f16): Likewise.
15315 (vrev64q_f32): Likewise.
15316 (vnegq_f16): Likewise.
15317 (vnegq_f32): Likewise.
15318 (vdupq_n_f16): Likewise.
15319 (vdupq_n_f32): Likewise.
15320 (vabsq_f16): Likewise.
15321 (vabsq_f32): Likewise.
15322 (vrev32q_f16): Likewise.
15323 (vcvttq_f32_f16): Likewise.
15324 (vcvtbq_f32_f16): Likewise.
15325 (vcvtq_f16_s16): Likewise.
15326 (vcvtq_f32_s32): Likewise.
15327 (vcvtq_f16_u16): Likewise.
15328 (vcvtq_f32_u32): Likewise.
15329 (__arm_vrndxq_f16): Define intrinsic.
15330 (__arm_vrndxq_f32): Likewise.
15331 (__arm_vrndq_f16): Likewise.
15332 (__arm_vrndq_f32): Likewise.
15333 (__arm_vrndpq_f16): Likewise.
15334 (__arm_vrndpq_f32): Likewise.
15335 (__arm_vrndnq_f16): Likewise.
15336 (__arm_vrndnq_f32): Likewise.
15337 (__arm_vrndmq_f16): Likewise.
15338 (__arm_vrndmq_f32): Likewise.
15339 (__arm_vrndaq_f16): Likewise.
15340 (__arm_vrndaq_f32): Likewise.
15341 (__arm_vrev64q_f16): Likewise.
15342 (__arm_vrev64q_f32): Likewise.
15343 (__arm_vnegq_f16): Likewise.
15344 (__arm_vnegq_f32): Likewise.
15345 (__arm_vdupq_n_f16): Likewise.
15346 (__arm_vdupq_n_f32): Likewise.
15347 (__arm_vabsq_f16): Likewise.
15348 (__arm_vabsq_f32): Likewise.
15349 (__arm_vrev32q_f16): Likewise.
15350 (__arm_vcvttq_f32_f16): Likewise.
15351 (__arm_vcvtbq_f32_f16): Likewise.
15352 (__arm_vcvtq_f16_s16): Likewise.
15353 (__arm_vcvtq_f32_s32): Likewise.
15354 (__arm_vcvtq_f16_u16): Likewise.
15355 (__arm_vcvtq_f32_u32): Likewise.
15356 (vrndxq): Define polymorphic variants.
15358 (vrndpq): Likewise.
15359 (vrndnq): Likewise.
15360 (vrndmq): Likewise.
15361 (vrndaq): Likewise.
15362 (vrev64q): Likewise.
15365 (vrev32q): Likewise.
15366 (vcvtbq_f32): Likewise.
15367 (vcvttq_f32): Likewise.
15369 * config/arm/arm_mve_builtins.def (VAR2): Define.
15371 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
15372 (mve_vrndq_f<mode>): Likewise.
15373 (mve_vrndpq_f<mode>): Likewise.
15374 (mve_vrndnq_f<mode>): Likewise.
15375 (mve_vrndmq_f<mode>): Likewise.
15376 (mve_vrndaq_f<mode>): Likewise.
15377 (mve_vrev64q_f<mode>): Likewise.
15378 (mve_vnegq_f<mode>): Likewise.
15379 (mve_vdupq_n_f<mode>): Likewise.
15380 (mve_vabsq_f<mode>): Likewise.
15381 (mve_vrev32q_fv8hf): Likewise.
15382 (mve_vcvttq_f32_f16v4sf): Likewise.
15383 (mve_vcvtbq_f32_f16v4sf): Likewise.
15384 (mve_vcvtq_to_f_<supf><mode>): Likewise.
15386 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
15387 Mihail Ionescu <mihail.ionescu@arm.com>
15388 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15390 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
15392 (ARM_BUILTIN_MVE_PATTERN_START): Define.
15393 (arm_init_mve_builtins): Define function.
15394 (arm_init_builtins): Add TARGET_HAVE_MVE check.
15395 (arm_expand_builtin_1): Check the range of fcode.
15396 (arm_expand_mve_builtin): Define function to expand MVE builtins.
15397 (arm_expand_builtin): Check the range of fcode.
15398 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
15400 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
15401 (vst4q_s8): Define macro.
15402 (vst4q_s16): Likewise.
15403 (vst4q_s32): Likewise.
15404 (vst4q_u8): Likewise.
15405 (vst4q_u16): Likewise.
15406 (vst4q_u32): Likewise.
15407 (vst4q_f16): Likewise.
15408 (vst4q_f32): Likewise.
15409 (__arm_vst4q_s8): Define inline builtin.
15410 (__arm_vst4q_s16): Likewise.
15411 (__arm_vst4q_s32): Likewise.
15412 (__arm_vst4q_u8): Likewise.
15413 (__arm_vst4q_u16): Likewise.
15414 (__arm_vst4q_u32): Likewise.
15415 (__arm_vst4q_f16): Likewise.
15416 (__arm_vst4q_f32): Likewise.
15417 (__ARM_mve_typeid): Define macro with MVE types.
15418 (__ARM_mve_coerce): Define macro with _Generic feature.
15419 (vst4q): Define polymorphic variant for different vst4q builtins.
15420 * config/arm/arm_mve_builtins.def: New file.
15421 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
15423 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
15424 (unspec): Define unspec.
15425 (mve_vst4q<mode>): Define RTL pattern.
15426 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
15428 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
15430 (define_split): Allow OI mode split for MVE after reload.
15431 (define_split): Allow XI mode split for MVE after reload.
15432 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
15433 (arm-builtins.o): Likewise.
15435 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
15437 * c-typeck.c (process_init_element): Handle constructor_type with
15438 type size represented by POLY_INT_CST.
15440 2020-03-17 Jakub Jelinek <jakub@redhat.com>
15442 PR tree-optimization/94187
15443 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
15444 nchars - offset < nbytes.
15446 PR middle-end/94189
15447 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
15448 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
15449 for code-generation.
15451 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
15454 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
15455 after changing memory subreg.
15457 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
15458 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15460 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
15461 emulator calls for dobule precision arithmetic operations for MVE.
15463 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
15464 Mihail Ionescu <mihail.ionescu@arm.com>
15465 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15467 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
15468 feature bit is on and -mfpu=auto is passed as compiler option, do not
15469 generate error on not finding any matching fpu. Because in this case
15470 fpu is not required.
15471 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
15472 enabled for MVE and also for all VFP extensions.
15473 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
15475 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
15476 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
15477 along with feature bits mve_float.
15478 (mve): Modify add options in armv8.1-m.main arch for MVE.
15479 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
15481 * config/arm/arm.c (use_return_insn): Replace the
15482 check with TARGET_VFP_BASE.
15483 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
15485 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
15486 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
15488 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
15489 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
15491 (arm_compute_frame_layout): Likewise.
15492 (arm_save_coproc_regs): Likewise.
15493 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
15495 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
15496 with equivalent macro TARGET_VFP_BASE.
15497 (arm_expand_epilogue_apcs_frame): Likewise.
15498 (arm_expand_epilogue): Likewise.
15499 (arm_conditional_register_usage): Likewise.
15500 (arm_declare_function_name): Add check to skip printing .fpu directive
15501 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
15503 * config/arm/arm.h (TARGET_VFP_BASE): Define.
15504 * config/arm/arm.md (arch): Add "mve" to arch.
15505 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
15506 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
15507 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
15508 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
15510 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
15511 to not allow for MVE.
15512 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
15514 (VUNSPEC_GET_FPSCR): Define.
15515 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
15516 instructions which move to general-purpose Register from Floating-point
15517 Special register and vice-versa.
15518 (thumb2_movhi_fp16): Likewise.
15519 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
15520 with MCR and MRC instructions which set and get Floating-point Status
15521 and Control Register (FPSCR).
15522 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
15524 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
15525 float move patterns in MVE.
15526 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
15527 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
15528 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
15529 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
15530 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
15531 TARGET_VFP_BASE check.
15532 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
15533 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
15535 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
15536 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
15540 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
15541 Mihail Ionescu <mihail.ionescu@arm.com>
15542 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15544 * config.gcc (arm_mve.h): Include mve intrinsics header file.
15545 * config/arm/aout.h (p0): Add new register name for MVE predicated
15547 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
15548 common to Neon and MVE.
15549 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
15550 (arm_init_simd_builtin_types): Disable poly types for MVE.
15551 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
15552 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
15553 ARM_BUILTIN_NEON_LANE_CHECK.
15554 (mve_dereference_pointer): Add function.
15555 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
15557 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
15558 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
15559 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
15560 with floating point enabled.
15561 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
15562 simd_immediate_valid_for_move.
15563 (simd_immediate_valid_for_move): Renamed from
15564 neon_immediate_valid_for_move function.
15565 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
15566 error if vfpv2 feature bit is disabled and mve feature bit is also
15567 disabled for HARD_FLOAT_ABI.
15568 (use_return_insn): Check to not push VFP regs for MVE.
15569 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
15571 (aapcs_vfp_allocate_return_reg): Likewise.
15572 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
15573 address operand for MVE.
15574 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
15575 (neon_valid_immediate): Rename to simd_valid_immediate.
15576 (simd_valid_immediate): Rename from neon_valid_immediate.
15577 (simd_valid_immediate): MVE check on size of vector is 128 bits.
15578 (neon_immediate_valid_for_move): Rename to
15579 simd_immediate_valid_for_move.
15580 (simd_immediate_valid_for_move): Rename from
15581 neon_immediate_valid_for_move.
15582 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
15584 (neon_make_constant): Modify call to neon_valid_immediate function.
15585 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
15587 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
15588 (arm_compute_frame_layout): Calculate space for saved VFP registers for
15590 (arm_save_coproc_regs): Save coproc registers for MVE.
15591 (arm_print_operand): Add case 'E' to print memory operands for MVE.
15592 (arm_print_operand_address): Check to print register number for MVE.
15593 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
15594 (arm_modes_tieable_p): Check to allow structure mode for MVE.
15595 (arm_regno_class): Add VPR_REGNUM check.
15596 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
15598 (arm_expand_epilogue): MVE check for enabling pop instructions in
15600 (arm_print_asm_arch_directives): Modify function to disable print of
15601 .arch_extension "mve" and "fp" for cases where MVE is enabled with
15603 (arm_vector_mode_supported_p): Check for modes available in MVE interger
15604 and MVE floating point.
15605 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
15607 (arm_conditional_register_usage): Enable usage of conditional regsiter
15609 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
15610 (arm_declare_function_name): Modify function to disable print of
15611 .arch_extension "mve" and "fp" for cases where MVE is enabled with
15613 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
15614 when target general registers are required.
15615 (TARGET_HAVE_MVE_FLOAT): Likewise.
15616 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
15618 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
15619 which indicate this is not available for across function calls.
15620 (FIRST_PSEUDO_REGISTER): Modify.
15621 (VALID_MVE_MODE): Define valid MVE mode.
15622 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
15623 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
15624 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
15625 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
15627 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
15628 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
15629 (enum reg_class): Add VPR_REG entry.
15630 (REG_CLASS_NAMES): Add VPR_REG entry.
15631 * config/arm/arm.md (VPR_REGNUM): Define.
15632 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
15633 "unconditional" instructions.
15634 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
15635 (movdf_soft_insn): Modify RTL to not allow for MVE.
15636 (vfp_pop_multiple_with_writeback): Enable for MVE.
15637 (include "mve.md"): Include mve.md file.
15638 * config/arm/arm_mve.h: Add MVE intrinsics head file.
15639 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
15640 for vector predicated operands.
15641 * config/arm/iterators.md (VNIM1): Define.
15642 (VNINOTM1): Define.
15643 (VHFBF_split): Define
15644 * config/arm/mve.md: New file.
15645 (mve_mov<mode>): Define RTL for move, store and load in MVE.
15646 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
15648 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
15649 simd_immediate_valid_for_move.
15650 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
15651 is common to MVE and NEON to vec-common.md file.
15652 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
15653 * config/arm/predicates.md (vpr_register_operand): Define.
15654 * config/arm/t-arm: Add mve.md file.
15655 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
15657 (mve_store): Add MVE instructions mve_store to attribute "type".
15658 (mve_load): Add MVE instructions mve_load to attribute "type".
15659 (is_mve_type): Define attribute.
15660 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
15661 standard move patterns in MVE along with NEON and IWMMXT with mode
15663 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
15664 and IWMMXT with mode iterator V8HF.
15665 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
15667 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
15668 simd_immediate_valid_for_move.
15671 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
15674 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
15675 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
15677 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
15679 2020-03-16 Jakub Jelinek <jakub@redhat.com>
15682 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
15685 PR tree-optimization/94166
15686 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
15687 as secondary comparison key.
15689 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
15691 PR tree-optimization/94125
15692 * tree-loop-distribution.c
15693 (loop_distribution::break_alias_scc_partitions): Update post order
15694 number for merged scc.
15696 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
15699 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
15701 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
15702 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
15703 and ext_sse_reg_operand check.
15705 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
15707 * common.opt: Avoid redundancy in the help text.
15708 * config/arc/arc.opt: Likewise.
15709 * config/cr16/cr16.opt: Likewise.
15711 2020-03-14 Jakub Jelinek <jakub@redhat.com>
15713 PR middle-end/93566
15714 * tree-nested.c (convert_nonlocal_omp_clauses,
15715 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
15716 with C/C++ array sections.
15718 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
15721 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
15722 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
15725 2020-03-14 Jakub Jelinek <jakub@redhat.com>
15727 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
15728 "a an" to "an" in a comment.
15729 * hsa-common.h (is_a_helper): Likewise.
15730 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
15731 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
15732 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
15734 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
15737 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
15738 64-bit value by 64 bits (UB).
15740 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
15742 PR rtl-optimization/92303
15743 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
15745 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
15747 PR rtl-optimization/94148
15748 PR rtl-optimization/94042
15749 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
15750 (df_worklist_propagate_forward): New parameter last_change_age, use
15751 that instead of bb->aux.
15752 (df_worklist_propagate_backward): Ditto.
15753 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
15755 2020-03-13 Richard Biener <rguenther@suse.de>
15757 PR tree-optimization/94163
15758 * tree-ssa-pre.c (create_expression_by_pieces): Check
15759 whether alignment would be zero.
15761 2020-03-13 Martin Liska <mliska@suse.cz>
15764 * lto-wrapper.c (run_gcc): Use concat for appending
15765 to collect_gcc_options.
15767 2020-03-13 Jakub Jelinek <jakub@redhat.com>
15770 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
15771 instead of GEN_INT.
15773 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
15776 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
15777 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
15778 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
15779 TARGET_AVX512VL and ext_sse_reg_operand check.
15781 2020-03-13 Bu Le <bule1@huawei.com>
15784 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
15785 (-param=aarch64-double-recp-precision=): New options.
15786 * doc/invoke.texi: Document them.
15787 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
15788 instead of hard-coding the choice of 1 for float and 2 for double.
15790 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
15792 PR rtl-optimization/94119
15793 * resource.h (clear_hashed_info_until_next_barrier): Declare.
15794 * resource.c (clear_hashed_info_until_next_barrier): New function.
15795 * reorg.c (add_to_delay_list): Fix formatting.
15796 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
15797 the next instruction after removing a BARRIER.
15799 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
15801 PR middle-end/92071
15802 * expmed.c (store_integral_bit_field): For fields larger than a word,
15803 call extract_bit_field on the value if the mode is BLKmode. Remove
15804 specific path for big-endian targets and tidy things up a little bit.
15806 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
15808 PR rtl-optimization/90275
15809 * cse.c (cse_insn): Delete no-op register moves too.
15811 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
15813 * config/rx/rx.md (CTRLREG_CPEN): Remove.
15814 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
15816 2020-03-12 Richard Biener <rguenther@suse.de>
15818 PR tree-optimization/94103
15819 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
15820 punning when the mode precision is not sufficient.
15822 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
15825 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
15826 MODE_V1DF and MODE_V2SF.
15827 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
15828 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
15831 2020-03-12 Jakub Jelinek <jakub@redhat.com>
15833 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
15834 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
15835 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
15836 * doc/tm.texi: Regenerated.
15838 PR tree-optimization/94130
15839 * tree-ssa-dse.c: Include gimplify.h.
15840 (increment_start_addr): If stmt has lhs, drop the lhs from call and
15841 set it after the call to the original value of the first argument.
15843 (decrement_count): Formatting fix.
15845 2020-03-11 Delia Burduv <delia.burduv@arm.com>
15847 * config/arm/arm-builtins.c
15848 (arm_init_simd_builtin_scalar_types): New.
15849 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
15850 (vld2q_bf16): Used new builtin type.
15851 (vld3_bf16): Used new builtin type.
15852 (vld3q_bf16): Used new builtin type.
15853 (vld4_bf16): Used new builtin type.
15854 (vld4q_bf16): Used new builtin type.
15855 (vld2_dup_bf16): Used new builtin type.
15856 (vld2q_dup_bf16): Used new builtin type.
15857 (vld3_dup_bf16): Used new builtin type.
15858 (vld3q_dup_bf16): Used new builtin type.
15859 (vld4_dup_bf16): Used new builtin type.
15860 (vld4q_dup_bf16): Used new builtin type.
15862 2020-03-11 Jakub Jelinek <jakub@redhat.com>
15865 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
15866 at the start to switch to data section. Don't print extra newline if
15867 .globl directive has not been emitted.
15869 2020-03-11 Richard Biener <rguenther@suse.de>
15871 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
15874 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
15876 PR middle-end/93961
15877 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
15878 whose type is a qualified union.
15880 2020-03-11 Jakub Jelinek <jakub@redhat.com>
15883 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
15884 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
15887 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
15889 (get_nth_most_common_value): Use abs_hwi instead of abs.
15891 PR middle-end/94111
15892 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
15893 is rvc_normal, otherwise use real_to_decimal to print the number to
15896 PR tree-optimization/94114
15897 * tree-loop-distribution.c (generate_memset_builtin): Call
15898 rewrite_to_non_trapping_overflow even on mem.
15899 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
15902 2020-03-10 Jeff Law <law@redhat.com>
15904 * config/bfin/bfin.md (movsi_insv): Add length attribute.
15906 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
15909 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
15910 NAN and SIGNED_ZEROR for smax/smin.
15912 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
15915 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
15916 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
15918 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
15920 * loop-iv.c (find_simple_exit): Make it static.
15921 * cfgloop.h: Remove the corresponding prototype.
15923 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
15925 * ddg.c (create_ddg): Fix intendation.
15926 (set_recurrence_length): Likewise.
15927 (create_ddg_all_sccs): Likewise.
15929 2020-03-10 Jakub Jelinek <jakub@redhat.com>
15932 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
15933 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
15936 2020-03-09 Jason Merrill <jason@redhat.com>
15938 * gdbinit.in (pgs): Fix typo in documentation.
15940 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
15944 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
15946 PR rtl-optimization/93564
15947 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
15948 do not honor reg alloc order.
15950 2020-03-09 Andrew Pinski <apinski@marvell.com>
15952 PR inline-asm/94095
15953 * doc/extend.texi (x86 Operand Modifiers): Fix column
15956 2020-03-09 Martin Liska <mliska@suse.cz>
15959 * config/rs6000/rs6000.c (rs6000_option_override_internal):
15960 Remove set of str_align_loops and str_align_jumps as these
15961 should be set in previous 2 conditions in the function.
15963 2020-03-09 Jakub Jelinek <jakub@redhat.com>
15965 PR rtl-optimization/94045
15966 * params.opt (-param=max-find-base-term-values=): New option.
15967 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
15968 in a single toplevel find_base_term call.
15970 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
15973 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
15974 * config/aarch64/aarch64-simd.md
15975 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
15976 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
15977 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
15978 * config/aarch64/arm_neon.h:
15979 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
15980 (vmlal_lane_u16): Likewise.
15981 (vmlal_lane_s32): Likewise.
15982 (vmlal_lane_u32): Likewise.
15983 (vmlal_laneq_s16): Likewise.
15984 (vmlal_laneq_u16): Likewise.
15985 (vmlal_laneq_s32): Likewise.
15986 (vmlal_laneq_u32): Likewise.
15987 (vmull_lane_s16): Likewise.
15988 (vmull_lane_u16): Likewise.
15989 (vmull_lane_s32): Likewise.
15990 (vmull_lane_u32): Likewise.
15991 (vmull_laneq_s16): Likewise.
15992 (vmull_laneq_u16): Likewise.
15993 (vmull_laneq_s32): Likewise.
15994 (vmull_laneq_u32): Likewise.
15995 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
15998 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
16000 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
16001 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
16002 (aarch64_mls_elt<mode>): Likewise.
16003 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
16004 (aarch64_fma4_elt<mode>): Likewise.
16005 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
16006 (aarch64_fma4_elt_to_64v2df): Likewise.
16007 (aarch64_fnma4_elt<mode>): Likewise.
16008 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
16009 (aarch64_fnma4_elt_to_64v2df): Likewise.
16011 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16013 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
16014 Specify movprfx attribute.
16015 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
16017 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
16020 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
16022 (TARGET_NO_FP_IN_TOC): Same.
16023 * config/rs6000/aix71.h: Same.
16024 * config/rs6000/aix72.h: Same.
16026 2020-03-06 Andrew Pinski <apinski@marvell.com>
16027 Jeff Law <law@redhat.com>
16029 PR rtl-optimization/93996
16030 * haifa-sched.c (remove_notes): Be more careful when adding
16033 2020-03-06 Delia Burduv <delia.burduv@arm.com>
16035 * config/arm/arm_neon.h (vld2_bf16): New.
16041 (vld2_dup_bf16): New.
16042 (vld2q_dup_bf16): New.
16043 (vld3_dup_bf16): New.
16044 (vld3q_dup_bf16): New.
16045 (vld4_dup_bf16): New.
16046 (vld4q_dup_bf16): New.
16047 * config/arm/arm_neon_builtins.def
16048 (vld2): Changed to VAR13 and added v4bf, v8bf
16049 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
16050 (vld3): Changed to VAR13 and added v4bf, v8bf
16051 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
16052 (vld4): Changed to VAR13 and added v4bf, v8bf
16053 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
16054 * config/arm/iterators.md (VDXBF2): New iterator.
16055 *config/arm/neon.md (neon_vld2): Use new iterators.
16056 (neon_vld2_dup<mode): Use new iterators.
16057 (neon_vld3<mode>): Likewise.
16058 (neon_vld3qa<mode>): Likewise.
16059 (neon_vld3qb<mode>): Likewise.
16060 (neon_vld3_dup<mode>): Likewise.
16061 (neon_vld4<mode>): Likewise.
16062 (neon_vld4qa<mode>): Likewise.
16063 (neon_vld4qb<mode>): Likewise.
16064 (neon_vld4_dup<mode>): Likewise.
16065 (neon_vld2_dupv8bf): New.
16066 (neon_vld3_dupv8bf): Likewise.
16067 (neon_vld4_dupv8bf): Likewise.
16069 2020-03-06 Delia Burduv <delia.burduv@arm.com>
16071 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
16072 (bfloat16x8x2_t): New typedef.
16073 (bfloat16x4x3_t): New typedef.
16074 (bfloat16x8x3_t): New typedef.
16075 (bfloat16x4x4_t): New typedef.
16076 (bfloat16x8x4_t): New typedef.
16083 * config/arm/arm-builtins.c (v2bf_UP): Define.
16085 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
16086 * config/arm/arm-modes.def (V2BF): New mode.
16087 * config/arm/arm-simd-builtin-types.def
16088 (Bfloat16x2_t): New entry.
16089 * config/arm/arm_neon_builtins.def
16090 (vst2): Changed to VAR13 and added v4bf, v8bf
16091 (vst3): Changed to VAR13 and added v4bf, v8bf
16092 (vst4): Changed to VAR13 and added v4bf, v8bf
16093 * config/arm/iterators.md (VDXBF): New iterator.
16094 (VQ2BF): New iterator.
16095 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
16096 (neon_vst2<mode>): Used new iterators.
16097 (neon_vst3<mode>): Used new iterators.
16098 (neon_vst3<mode>): Used new iterators.
16099 (neon_vst3qa<mode>): Used new iterators.
16100 (neon_vst3qb<mode>): Used new iterators.
16101 (neon_vst4<mode>): Used new iterators.
16102 (neon_vst4<mode>): Used new iterators.
16103 (neon_vst4qa<mode>): Used new iterators.
16104 (neon_vst4qb<mode>): Used new iterators.
16106 2020-03-06 Delia Burduv <delia.burduv@arm.com>
16108 * config/aarch64/aarch64-simd-builtins.def
16109 (bfcvtn): New built-in function.
16110 (bfcvtn_q): New built-in function.
16111 (bfcvtn2): New built-in function.
16112 (bfcvt): New built-in function.
16113 * config/aarch64/aarch64-simd.md
16114 (aarch64_bfcvtn<q><mode>): New pattern.
16115 (aarch64_bfcvtn2v8bf): New pattern.
16116 (aarch64_bfcvtbf): New pattern.
16117 * config/aarch64/arm_bf16.h (float32_t): New typedef.
16118 (vcvth_bf16_f32): New intrinsic.
16119 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
16120 (vcvtq_low_bf16_f32): New intrinsic.
16121 (vcvtq_high_bf16_f32): New intrinsic.
16122 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
16123 (UNSPEC_BFCVTN): New UNSPEC.
16124 (UNSPEC_BFCVTN2): New UNSPEC.
16125 (UNSPEC_BFCVT): New UNSPEC.
16126 * config/arm/types.md (bf_cvt): New type.
16128 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
16130 * config/s390/s390.md ("tabort"): Get rid of two consecutive
16131 blanks in format string.
16133 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
16137 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
16138 * config/i386/i386.c (ix86_get_ssemov): New function.
16139 (ix86_output_ssemov): Likewise.
16140 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
16141 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
16143 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
16144 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
16145 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
16146 (*movti_internal): Likewise.
16147 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
16149 2020-03-05 Jeff Law <law@redhat.com>
16151 PR tree-optimization/91890
16152 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
16153 Use gimple_or_expr_nonartificial_location.
16154 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
16155 Use gimple_or_expr_nonartificial_location.
16156 * gimple.c (gimple_or_expr_nonartificial_location): New function.
16157 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
16158 * tree-ssa-strlen.c (maybe_warn_overflow): Use
16159 gimple_or_expr_nonartificial_location.
16160 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
16161 (maybe_warn_pointless_strcmp): Likewise.
16163 2020-03-05 Jakub Jelinek <jakub@redhat.com>
16166 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
16167 SRC and MASK arguments to __m128 from __m128d.
16168 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
16170 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
16172 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
16173 argument to __m128i from __m128d.
16174 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
16176 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
16177 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
16180 2020-03-05 Delia Burduv <delia.burduv@arm.com>
16182 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
16183 (vbfmlalbq_f32): New.
16184 (vbfmlaltq_f32): New.
16185 (vbfmlalbq_lane_f32): New.
16186 (vbfmlaltq_lane_f32): New.
16187 (vbfmlalbq_laneq_f32): New.
16188 (vbfmlaltq_laneq_f32): New.
16189 * config/arm/arm_neon_builtins.def (vmmla): New.
16194 (vfmab_laneq): New.
16195 (vfmat_laneq): New.
16196 * config/arm/iterators.md (BF_MA): New int iterator.
16197 (bt): New int attribute.
16198 (VQXBF): Copy of VQX with V8BF.
16199 * config/arm/neon.md (neon_vmmlav8bf): New insn.
16200 (neon_vfma<bt>v8bf): New insn.
16201 (neon_vfma<bt>_lanev8bf): New insn.
16202 (neon_vfma<bt>_laneqv8bf): New expand.
16203 (neon_vget_high<mode>): Changed iterator to VQXBF.
16204 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
16205 (UNSPEC_BFMAB): New UNSPEC.
16206 (UNSPEC_BFMAT): New UNSPEC.
16208 2020-03-05 Jakub Jelinek <jakub@redhat.com>
16210 PR middle-end/93399
16211 * tree-pretty-print.h (pretty_print_string): Declare.
16212 * tree-pretty-print.c (pretty_print_string): Remove forward
16213 declaration, no longer static. Change nbytes parameter type
16214 from unsigned to size_t.
16215 * print-rtl.c (print_value) <case CONST_STRING>: Use
16216 pretty_print_string and for shrink way too long strings.
16218 2020-03-05 Richard Biener <rguenther@suse.de>
16219 Jakub Jelinek <jakub@redhat.com>
16221 PR tree-optimization/93582
16222 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
16223 last operand as signed when looking for memset offset. Formatting
16226 2020-03-04 Andrew Pinski <apinski@marvell.com>
16229 * value-prof.c (dump_histogram_value): Use std::abs.
16231 2020-03-04 Martin Sebor <msebor@redhat.com>
16233 PR tree-optimization/93986
16234 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
16235 operands to the same precision widest_int to avoid ICEs.
16237 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
16240 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
16241 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
16242 for OPTION_MASK_ALTIVEC.
16244 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
16246 * config.gcc: Include the glibc-stdint.h header for zTPF.
16248 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
16250 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
16251 direct FPR-GPR copies.
16252 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
16255 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
16257 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
16258 operands to the prologue_tpf expander.
16259 (s390_emit_epilogue): Likewise.
16260 (s390_option_override_internal): Do error checking and setup for
16262 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
16263 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
16264 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
16265 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
16266 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
16267 operands for the check flag and the branch target.
16268 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
16269 ("mtpf-trace-hook-prologue-target")
16270 ("mtpf-trace-hook-epilogue-check")
16271 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
16273 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
16274 options are for debugging purposes and will not be documented
16277 2020-03-04 Jakub Jelinek <jakub@redhat.com>
16280 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
16282 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
16283 argument. Change pd argument so that it can be modified. Turn
16284 constant non-CONSTRUCTOR store into non-constant if it is too large.
16285 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
16287 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
16290 2020-02-04 Richard Biener <rguenther@suse.de>
16292 PR tree-optimization/93964
16293 * graphite-isl-ast-to-gimple.c
16294 (gcc_expression_from_isl_ast_expr_id): Add intermediate
16295 conversion for pointer to integer converts.
16296 * graphite-scop-detection.c (assign_parameter_index_in_region):
16299 2020-03-04 Martin Liska <mliska@suse.cz>
16303 * doc/invoke.texi: Clarify --help=language and --help=common
16306 2020-03-04 Jakub Jelinek <jakub@redhat.com>
16308 PR tree-optimization/94001
16309 * tree-tailcall.c (process_assignment): Before comparing op1 to
16310 *ass_var, verify *ass_var is non-NULL.
16312 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
16315 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
16318 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
16320 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
16321 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
16322 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
16323 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
16324 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
16325 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
16326 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
16327 (V_bf_low, V_bf_cvt_m): New mode attributes.
16328 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
16329 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
16330 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
16331 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
16332 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
16334 2020-03-03 Jakub Jelinek <jakub@redhat.com>
16336 PR tree-optimization/93582
16337 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
16338 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
16339 members, initialize them in the constructor and if mask is non-NULL,
16340 artificially push_partial_def {} for the portions of the mask that
16342 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
16343 val and return (void *)-1. Formatting fix.
16344 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
16346 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
16347 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
16349 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
16351 (visit_stmt): Formatting fix.
16353 2020-03-03 Richard Biener <rguenther@suse.de>
16355 PR tree-optimization/93946
16356 * alias.h (refs_same_for_tbaa_p): Declare.
16357 * alias.c (refs_same_for_tbaa_p): New function.
16358 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
16360 * tree-ssa-scopedtables.h
16361 (avail_exprs_stack::lookup_avail_expr): Add output argument
16362 giving access to the hashtable entry.
16363 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
16365 * tree-ssa-dom.c: Include alias.h.
16366 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
16367 removing redundant store.
16368 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
16369 (ao_ref_init_from_vn_reference): Adjust prototype.
16370 (vn_reference_lookup_pieces): Likewise.
16371 (vn_reference_insert_pieces): Likewise.
16372 * tree-ssa-sccvn.c: Track base alias set in addition to alias
16374 (eliminate_dom_walker::eliminate_stmt): Also check base alias
16375 set when removing redundant stores.
16376 (visit_reference_op_store): Likewise.
16377 * dse.c (record_store): Adjust valdity check for redundant
16380 2020-03-03 Jakub Jelinek <jakub@redhat.com>
16383 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
16385 PR rtl-optimization/94002
16386 * explow.c (plus_constant): Punt if cst has VOIDmode and
16387 get_pool_mode is different from mode.
16389 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
16391 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
16392 address has an offset which fits the scalling constraint for a
16393 load/store operation.
16394 (legitimate_scaled_address_p): Update use
16395 leigitimate_small_data_address_p.
16396 (arc_print_operand): Likewise.
16397 (arc_legitimate_address_p): Likewise.
16398 (legitimate_small_data_address_p): Likewise.
16400 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
16402 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
16403 (fnmasf4_fpu): Likewise.
16405 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
16407 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
16409 (subdi3): Likewise.
16410 (adddi3_i): Remove pattern.
16411 (subdi3_i): Likewise.
16413 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
16415 * config/arc/arc.md (eh_return): Add length info.
16417 2020-03-02 David Malcolm <dmalcolm@redhat.com>
16419 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
16421 2020-03-02 David Malcolm <dmalcolm@redhat.com>
16423 * doc/invoke.texi (Static Analyzer Options): Add
16424 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
16427 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
16430 * config/i386/i386.md (movstrict<mode>): Allow only
16431 registers with VALID_INT_MODE_P modes.
16433 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
16435 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
16436 (reduc_insn): Use 'U' and 'B' operand codes.
16437 (reduc_<reduc_op>_scal_<mode>): Allow all types.
16438 (reduc_<reduc_op>_scal_v64di): Delete.
16439 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
16440 (*plus_carry_dpp_shr_v64si): Change to ...
16441 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
16442 (mov_from_lane63_v64di): Change to ...
16443 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
16444 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
16445 Support UNSPEC_MOV_DPP_SHR output formats.
16446 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
16447 Add "use_extends" reductions.
16448 (print_operand_address): Add 'I' and 'U' codes.
16449 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
16451 2020-03-02 Martin Liska <mliska@suse.cz>
16453 * lto-wrapper.c: Fix typo in comment about
16454 C++ standard version.
16456 2020-03-01 Martin Sebor <msebor@redhat.com>
16459 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
16461 2020-03-01 Martin Sebor <msebor@redhat.com>
16463 PR middle-end/93829
16464 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
16465 of a pointer in the outermost ADDR_EXPRs.
16467 2020-02-28 Jeff Law <law@redhat.com>
16469 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
16470 * config/v850/v850.c (v850_asm_trampoline_template): Update
16473 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
16476 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
16479 2020-02-28 Martin Liska <mliska@suse.cz>
16482 * configure.ac: Improve detection of ld_date by requiring
16483 either two dashes or none.
16484 * configure: Regenerate.
16486 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
16488 PR rtl-optimization/93564
16489 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
16490 do not honor reg alloc order.
16492 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
16495 * config/aarch64/aarch64.c (aarch64_override_options): Fix
16496 misleading warning string.
16498 2020-02-27 Martin Sebor <msebor@redhat.com>
16500 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
16502 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
16505 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
16506 Split the insn into two parts. This insn only does variable
16507 extract from a register.
16508 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
16509 variable extract from memory.
16510 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
16511 only does variable extract from a register.
16512 (vsx_extract_v4sf_var_load): New insn, do variable extract from
16514 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
16515 into two parts. This insn only does variable extract from a
16517 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
16518 do variable extract from memory.
16520 2020-02-27 Martin Jambor <mjambor@suse.cz>
16521 Feng Xue <fxue@os.amperecomputing.com>
16524 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
16525 new function calls_same_node_or_its_all_contexts_clone_p.
16526 (cgraph_edge_brings_value_p): Use it.
16527 (cgraph_edge_brings_value_p): Likewise.
16528 (self_recursive_pass_through_p): Return false if caller is a clone.
16529 (self_recursive_agg_pass_through_p): Likewise.
16531 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
16533 PR middle-end/92152
16534 * alias.c (ends_tbaa_access_path_p): Break out from ...
16535 (component_uses_parent_alias_set_from): ... here.
16536 * alias.h (ends_tbaa_access_path_p): Declare.
16537 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
16538 handle trailing arrays past end of tbaa access path.
16539 (aliasing_component_refs_p): ... here; likewise.
16540 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
16541 path; disambiguate also past end of it.
16542 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
16545 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
16547 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
16548 beginning of the file.
16549 (vcreate_bf16, vcombine_bf16): New.
16550 (vdup_n_bf16, vdupq_n_bf16): New.
16551 (vdup_lane_bf16, vdup_laneq_bf16): New.
16552 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
16553 (vduph_lane_bf16, vduph_laneq_bf16): New.
16554 (vset_lane_bf16, vsetq_lane_bf16): New.
16555 (vget_lane_bf16, vgetq_lane_bf16): New.
16556 (vget_high_bf16, vget_low_bf16): New.
16557 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
16558 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
16559 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
16560 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
16561 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
16562 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
16563 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
16564 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
16565 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
16566 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
16567 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
16568 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
16569 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
16570 (vreinterpretq_bf16_p128): New.
16571 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
16572 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
16573 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
16574 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
16575 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
16576 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
16577 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
16578 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
16579 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
16580 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
16581 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
16582 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
16583 (vreinterpretq_p128_bf16): New.
16584 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
16585 (V_elem): Likewise.
16586 (V_elem_l): Likewise.
16587 (VD_LANE): Likewise.
16589 (V_DOUBLE): Likewise.
16590 (VDQX): Add V4BF and V8BF.
16591 (V_two_elem, V_three_elem, V_four_elem): Likewise.
16593 (V_HALF): Likewise.
16594 (V_double_vector_mode): Likewise.
16595 (V_cmp_result): Likewise.
16596 (V_uf_sclr): Likewise.
16597 (V_sz_elem): Likewise.
16598 (Is_d_reg): Likewise.
16599 (V_mode_nunits): Likewise.
16600 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
16602 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
16604 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
16605 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
16606 (<expander><mode>3<exec>): Likewise.
16607 (<expander><mode>3): New.
16608 (v<expander><mode>3): New.
16609 (<expander><mode>3): New.
16610 (<expander><mode>3<exec>): Rename to ...
16611 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
16612 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
16614 2020-02-27 Alexandre Oliva <oliva@adacore.com>
16616 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
16619 2020-02-27 Richard Biener <rguenther@suse.de>
16621 PR tree-optimization/93508
16622 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
16623 non-_CHK variants. Valueize their length arguments.
16625 2020-02-27 Richard Biener <rguenther@suse.de>
16627 PR tree-optimization/93953
16628 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
16629 to the hash-map entry.
16631 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
16633 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
16635 2020-02-27 Mark Williams <mwilliams@fb.com>
16637 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
16638 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
16639 -ffile-prefix-map and -fmacro-prefix-map.
16640 * lto-streamer-out.c: Include file-prefix-map.h.
16641 (lto_output_location): Remap the file part of locations.
16643 2020-02-27 Jakub Jelinek <jakub@redhat.com>
16646 * gimplify.c (gimplify_init_constructor): Don't promote readonly
16647 DECL_REGISTER variables to TREE_STATIC.
16649 PR tree-optimization/93582
16650 PR tree-optimization/93945
16651 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
16652 non-zero INTEGER_CST second argument and ref->offset or ref->size
16653 not a multiple of BITS_PER_UNIT.
16655 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
16657 * doc/install.texi (Binaries): Update description of BullFreeware.
16659 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
16663 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
16664 C++ Language Options, Warning Options, and Static Analyzer
16665 Options lists. Document negative form of options enabled by
16666 default. Move some things around to more accurately sort
16667 warnings by category.
16668 (C++ Dialect Options, Warning Options, Static Analyzer
16669 Options): Document negative form of options when enabled by
16670 default. Move some things around to more accurately sort
16671 warnings by category. Add some missing index entries.
16672 Light copy-editing.
16674 2020-02-26 Carl Love <cel@us.ibm.com>
16677 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
16678 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
16679 for the vector unsigned short arguments. It is also listed as the
16680 name of the built-in for arguments vector unsigned short,
16681 vector unsigned int and vector unsigned long long built-ins. The
16682 name of the builtins for these arguments should be:
16683 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
16684 __builtin_crypto_vpmsumd respectively.
16686 2020-02-26 Richard Biener <rguenther@suse.de>
16688 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
16689 and load permutation.
16691 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
16693 PR middle-end/93843
16694 * optabs-tree.c (supportable_convert_operation): Reject types with
16697 2020-02-26 David Malcolm <dmalcolm@redhat.com>
16699 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
16701 2020-02-26 Jakub Jelinek <jakub@redhat.com>
16703 PR tree-optimization/93820
16704 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
16705 argument to ALL_INTEGER_CST_P boolean.
16706 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
16707 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
16708 adjacent INTEGER_CST store into merged_store->only_constants like
16711 2020-02-25 Jakub Jelinek <jakub@redhat.com>
16714 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
16716 * cfghooks.c (verify_flow_info): Likewise.
16717 * predict.c (combine_predictions_for_bb): Likewise.
16718 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
16719 sucessor -> successor.
16720 (find_traces_1_round): Fix comment typo, destinarion -> destination.
16721 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
16723 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
16724 message typo, sucessors -> successors.
16726 2020-02-25 Martin Sebor <msebor@redhat.com>
16728 * doc/extend.texi (attribute access): Correct an example.
16730 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
16732 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
16734 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
16735 (VAR15, VAR16): New.
16736 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
16737 (VD): Enable for V4BF.
16739 (VQ): Enable for V8BF.
16741 (VQ_NO2E): Likewise.
16742 (VDBL, Vdbl): Add V4BF.
16743 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
16744 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
16745 (bfloat16x8x2_t): Likewise.
16746 (bfloat16x4x3_t): Likewise.
16747 (bfloat16x8x3_t): Likewise.
16748 (bfloat16x4x4_t): Likewise.
16749 (bfloat16x8x4_t): Likewise.
16750 (vcombine_bf16): New.
16751 (vld1_bf16, vld1_bf16_x2): New.
16752 (vld1_bf16_x3, vld1_bf16_x4): New.
16753 (vld1q_bf16, vld1q_bf16_x2): New.
16754 (vld1q_bf16_x3, vld1q_bf16_x4): New.
16755 (vld1_lane_bf16): New.
16756 (vld1q_lane_bf16): New.
16757 (vld1_dup_bf16): New.
16758 (vld1q_dup_bf16): New.
16761 (vld2_dup_bf16): New.
16762 (vld2q_dup_bf16): New.
16765 (vld3_dup_bf16): New.
16766 (vld3q_dup_bf16): New.
16769 (vld4_dup_bf16): New.
16770 (vld4q_dup_bf16): New.
16771 (vst1_bf16, vst1_bf16_x2): New.
16772 (vst1_bf16_x3, vst1_bf16_x4): New.
16773 (vst1q_bf16, vst1q_bf16_x2): New.
16774 (vst1q_bf16_x3, vst1q_bf16_x4): New.
16775 (vst1_lane_bf16): New.
16776 (vst1q_lane_bf16): New.
16784 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
16786 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
16787 (VALL_F16): Likewise.
16788 (VALLDI_F16): Likewise.
16790 (Vetype): Likewise.
16791 (vswap_width_name): Likewise.
16792 (VSWAP_WIDTH): Likewise.
16796 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
16797 (vget_lane_bf16, vgetq_lane_bf16): New.
16798 (vcreate_bf16): New.
16799 (vdup_n_bf16, vdupq_n_bf16): New.
16800 (vdup_lane_bf16, vdup_laneq_bf16): New.
16801 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
16802 (vduph_lane_bf16, vduph_laneq_bf16): New.
16803 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
16804 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
16805 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
16806 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
16807 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
16808 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
16809 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
16810 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
16811 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
16812 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
16813 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
16814 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
16815 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
16816 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
16817 (vreinterpretq_bf16_p128): New.
16818 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
16819 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
16820 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
16821 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
16822 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
16823 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
16824 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
16825 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
16826 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
16827 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
16828 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
16829 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
16830 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
16831 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
16832 (vreinterpretq_p128_bf16): New.
16834 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
16836 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
16837 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
16838 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
16839 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
16840 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
16841 * config/arm/iterators.md (VSF2BF): New attribute.
16842 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
16843 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
16844 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
16846 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
16848 * config/arm/arm.md (required_for_purecode): New attribute.
16849 (enabled): Handle required_for_purecode.
16850 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
16851 work with -mpure-code.
16853 2020-02-25 Jakub Jelinek <jakub@redhat.com>
16855 PR rtl-optimization/93908
16856 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
16859 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
16861 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
16863 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
16865 * doc/install.texi (--enable-checking): Adjust wording.
16867 2020-02-25 Richard Biener <rguenther@suse.de>
16869 PR tree-optimization/93868
16870 * tree-vect-slp.c (slp_copy_subtree): New function.
16871 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
16872 re-arranging stmts in it.
16874 2020-02-25 Jakub Jelinek <jakub@redhat.com>
16876 PR middle-end/93874
16877 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
16878 dummy function and remove it at the end.
16880 PR translation/93864
16881 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
16882 paramter -> parameter.
16883 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
16884 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
16886 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
16888 * doc/install.texi (--enable-checking): Properly document current
16890 (--enable-stage1-checking): Minor clarification about bootstrap.
16892 2020-02-24 David Malcolm <dmalcolm@redhat.com>
16895 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
16896 -fanalyzer-checker=taint is also required.
16897 (-fanalyzer-checker=): Note that providing this option enables the
16898 given checker, and doing so may be required for checkers that are
16899 disabled by default.
16901 2020-02-24 David Malcolm <dmalcolm@redhat.com>
16903 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
16904 significant control flow events; add a "3" which shows all
16905 control flow events; the old "3" becomes "4".
16907 2020-02-24 Jakub Jelinek <jakub@redhat.com>
16909 PR tree-optimization/93582
16910 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
16911 pd.offset and pd.size to be counted in bits rather than bytes, add
16912 support for maxsizei that is not a multiple of BITS_PER_UNIT and
16913 handle bitfield stores and loads.
16914 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
16915 uncomparable quantities - bytes vs. bits. Allow push_partial_def
16916 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
16917 pd.offset/pd.size to be counted in bits rather than bytes.
16918 Formatting fix. Rename shadowed len variable to buflen.
16920 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16921 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
16924 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
16925 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
16926 * opts-common.c (parse_options_from_collect_gcc_options): New function.
16927 (prepend_xassembler_to_collect_as_options): Likewise.
16928 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
16929 (prepend_xassembler_to_collect_as_options): Likewise.
16930 * lto-opts.c (lto_write_options): Stream assembler options
16931 in COLLECT_AS_OPTIONS.
16932 * lto-wrapper.c (xassembler_options_error): New static variable.
16933 (get_options_from_collect_gcc_options): Move parsing options code to
16934 parse_options_from_collect_gcc_options and call it.
16935 (merge_and_complain): Validate -Xassembler options.
16936 (append_compiler_options): Handle OPT_Xassembler.
16937 (run_gcc): Append command line -Xassembler options to
16938 collect_gcc_options.
16939 * doc/invoke.texi: Add documentation about using Xassembler
16942 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
16944 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
16946 (riscv_rtx_costs): Update cost model for LTGT.
16948 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
16950 PR rtl-optimization/93564
16951 * ira-color.c (struct update_cost_queue_elem): New member start.
16952 (queue_update_cost, get_next_update_cost): Add new arg start.
16953 (allocnos_conflict_p): New function.
16954 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
16955 Add checking conflicts with allocnos_conflict_p.
16956 (update_costs_from_prefs, restore_costs_from_copies): Adjust
16957 update_costs_from_allocno calls.
16958 (update_conflict_hard_regno_costs): Add checking conflicts with
16959 allocnos_conflict_p. Adjust calls of queue_update_cost and
16960 get_next_update_cost.
16961 (assign_hard_reg): Adjust calls of queue_update_cost. Add
16963 (bucket_allocno_compare_func): Restore previous version.
16965 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
16967 * config/pa/pa.c (pa_function_value): Fix check for word and
16968 double-word size when handling aggregate return values.
16969 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
16970 that homogeneous SFmode and DFmode aggregates are passed and returned
16971 in general registers.
16973 2020-02-21 Jakub Jelinek <jakub@redhat.com>
16975 PR translation/93759
16976 * opts.c (print_filtered_help): Translate help before appending
16977 messages to it rather than after that.
16979 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
16981 PR rtl-optimization/PR92989
16982 * lra-lives.c (process_bb_lives): Restore the original order
16983 of the bb liveness update. Call make_hard_regno_dead for each
16984 register clobbered at the start of an EH receiver.
16986 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
16989 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
16990 self-recursively generated.
16992 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
16995 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
16998 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
17000 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
17001 Document new target supports option.
17003 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
17005 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
17006 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
17007 * config/arm/iterators.md (MATMUL): New iterator.
17008 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
17009 (mmla_sfx): New attribute.
17010 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
17011 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
17012 (UNSPEC_MATMUL_US): New.
17014 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
17016 * config/arm/arm.md: Prevent scalar shifts from being used when big
17019 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
17020 Richard Biener <rguenther@suse.de>
17022 PR tree-optimization/93586
17023 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
17024 after mismatched array refs; do not sure type size information to
17025 recover from unmatched referneces with !flag_strict_aliasing_p.
17027 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
17029 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
17030 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
17031 (scatter_store<mode>): Rename to ...
17032 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
17033 (scatter<mode>_exec): Delete. Move contents ...
17034 (mask_scatter_store<mode>): ... here, and rename that to ...
17035 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
17036 Remove mode conversion.
17037 (mask_gather_load<mode>): Rename to ...
17038 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
17039 Remove mode conversion.
17040 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
17042 2020-02-21 Martin Jambor <mjambor@suse.cz>
17044 PR tree-optimization/93845
17045 * tree-sra.c (verify_sra_access_forest): Only test access size of
17048 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
17050 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
17051 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
17052 (addv64di3_exec): Likewise.
17053 (subv64di3): Likewise.
17054 (subv64di3_exec): Likewise.
17055 (addv64di3_zext): Likewise.
17056 (addv64di3_zext_exec): Likewise.
17057 (addv64di3_zext_dup): Likewise.
17058 (addv64di3_zext_dup_exec): Likewise.
17059 (addv64di3_zext_dup2): Likewise.
17060 (addv64di3_zext_dup2_exec): Likewise.
17061 (addv64di3_sext_dup2): Likewise.
17062 (addv64di3_sext_dup2_exec): Likewise.
17063 (<expander>v64di3): Likewise.
17064 (<expander>v64di3_exec): Likewise.
17065 (*<reduc_op>_dpp_shr_v64di): Likewise.
17066 (*plus_carry_dpp_shr_v64di): Likewise.
17067 * config/gcn/gcn.md (adddi3): Likewise.
17068 (addptrdi3): Likewise.
17069 (<expander>di3): Likewise.
17071 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
17073 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
17075 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17077 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
17078 support. Use aarch64_emit_mult instead of emitting multiplication
17079 instructions directly.
17080 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
17081 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
17083 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17085 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
17086 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
17087 instead of emitting multiplication instructions directly.
17088 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
17089 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
17090 (@aarch64_frecps<mode>): New expanders.
17092 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17094 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
17095 on and produce uint64_ts rather than ints.
17096 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
17097 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
17099 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17101 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
17102 an unused xmsk register when handling approximate rsqrt.
17104 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
17106 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
17107 flag_finite_math_only condition.
17109 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
17112 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
17113 to destination operand for shufps alternative.
17114 (*vec_extractv2si_1): Ditto.
17116 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
17119 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
17122 2020-02-20 Martin Liska <mliska@suse.cz>
17124 PR translation/93831
17125 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
17127 2020-02-20 Martin Liska <mliska@suse.cz>
17129 PR translation/93830
17130 * common/config/avr/avr-common.c: Remote trailing "|".
17132 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
17134 * collect2.c (maybe_run_lto_and_relink): Fix typo in
17137 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
17139 PR tree-optimization/93767
17140 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
17141 access-size bias from the offset calculations for negative strides.
17143 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
17145 * collect2.c (c_file, o_file): Make const again.
17146 (ldout,lderrout, dump_ld_file): Remove.
17147 (tool_cleanup): Avoid calling not signal-safe functions.
17148 (maybe_run_lto_and_relink): Avoid possible signal handler
17149 access to unintialzed memory (lto_o_files).
17150 (main): Avoid leaking temp files in $TMPDIR.
17151 Initialize c_file/o_file with concat, which avoids exposing
17152 uninitialized memory to signal handler, which calls unlink(!).
17153 Avoid calling maybe_unlink when the main function returns,
17154 since the atexit handler is already doing this.
17155 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
17157 2020-02-19 Martin Jambor <mjambor@suse.cz>
17159 PR tree-optimization/93776
17160 * tree-sra.c (create_access): Do not create zero size accesses.
17161 (get_access_for_expr): Do not search for zero sized accesses.
17163 2020-02-19 Martin Jambor <mjambor@suse.cz>
17165 PR tree-optimization/93667
17166 * tree-sra.c (scalarizable_type_p): Return false if record fields
17167 do not follow wach other.
17169 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
17171 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
17172 rather than fmv.x.s/fmv.s.x.
17174 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
17176 * config/aarch64/aarch64-simd-builtins.def
17177 (intrinsic_vec_smult_lo_): New.
17178 (intrinsic_vec_umult_lo_): Likewise.
17179 (vec_widen_smult_hi_): Likewise.
17180 (vec_widen_umult_hi_): Likewise.
17181 * config/aarch64/aarch64-simd.md
17182 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
17183 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
17184 (vmull_high_s16): Likewise.
17185 (vmull_high_s32): Likewise.
17186 (vmull_high_u8): Likewise.
17187 (vmull_high_u16): Likewise.
17188 (vmull_high_u32): Likewise.
17189 (vmull_s8): Likewise.
17190 (vmull_s16): Likewise.
17191 (vmull_s32): Likewise.
17192 (vmull_u8): Likewise.
17193 (vmull_u16): Likewise.
17194 (vmull_u32): Likewise.
17196 2020-02-18 Martin Liska <mliska@suse.cz>
17198 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
17199 bootstrap by missing removal of invalid sanity check.
17201 2020-02-18 Martin Liska <mliska@suse.cz>
17204 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
17205 Always compare LHS of gimple_assign.
17207 2020-02-18 Martin Liska <mliska@suse.cz>
17210 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
17211 and return type of functions.
17212 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
17213 Drop MALLOC attribute for void functions.
17214 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
17215 malloc_state for a new VOID clone.
17217 2020-02-18 Martin Liska <mliska@suse.cz>
17220 * common.opt: Add -fprofile-reproducibility.
17221 * doc/invoke.texi: Document it.
17222 * value-prof.c (dump_histogram_value):
17223 Document and support behavior for counters[0]
17224 being a negative value.
17225 (get_nth_most_common_value): Handle negative
17226 counters[0] in respect to flag_profile_reproducible.
17228 2020-02-18 Jakub Jelinek <jakub@redhat.com>
17231 * cgraph.c (verify_speculative_call): Use speculative_id instead of
17232 speculative_uid in messages. Remove trailing whitespace from error
17233 message. Use num_speculative_call_targets instead of
17234 num_speculative_targets in a message.
17235 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
17236 edge messages and stmt instead of cal_stmt in reference message.
17238 PR tree-optimization/93780
17239 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
17240 before calling build_vector_type.
17241 (execute_update_addresses_taken): Likewise.
17244 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
17245 typo, functoin -> function.
17246 * tree.c (free_lang_data_in_decl): Fix comment typo,
17247 functoin -> function.
17248 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
17250 2020-02-17 David Malcolm <dmalcolm@redhat.com>
17252 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
17254 (print_option_information): Don't call get_option_url if URLs
17257 2020-02-17 Alexandre Oliva <oliva@adacore.com>
17259 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
17260 handling of register_common-less targets.
17262 2020-02-17 Martin Liska <mliska@suse.cz>
17265 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
17267 2020-02-17 Martin Liska <mliska@suse.cz>
17269 PR translation/93755
17270 * config/rs6000/rs6000.c (rs6000_option_override_internal):
17273 2020-02-17 Martin Liska <mliska@suse.cz>
17276 * config/rx/elf.opt: Fix typo.
17278 2020-02-17 Richard Biener <rguenther@suse.de>
17281 * opts-global.c (print_ignored_options): Use inform and
17284 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
17287 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
17289 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
17292 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
17293 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
17295 2020-02-15 Jason Merrill <jason@redhat.com>
17297 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
17299 2020-02-15 Jakub Jelinek <jakub@redhat.com>
17301 PR tree-optimization/93744
17302 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
17303 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
17304 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
17305 sure @2 in the first and @1 in the other patterns has no side-effects.
17307 2020-02-15 David Malcolm <dmalcolm@redhat.com>
17308 Bernd Edlinger <bernd.edlinger@hotmail.de>
17312 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
17313 * configure.ac (--with-diagnostics-urls): New configuration
17314 option, based on --with-diagnostics-color.
17315 (DIAGNOSTICS_URLS_DEFAULT): New define.
17316 * config.h: Regenerate.
17317 * configure: Regenerate.
17318 * diagnostic.c (diagnostic_urls_init): Handle -1 for
17319 DIAGNOSTICS_URLS_DEFAULT from configure-time
17320 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
17321 and TERM_URLS environment variable.
17322 * diagnostic-url.h (diagnostic_url_format): New enum type.
17323 (diagnostic_urls_enabled_p): rename to...
17324 (determine_url_format): ... this, and change return type.
17325 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
17326 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
17327 the linux console, and mingw.
17328 (diagnostic_urls_enabled_p): rename to...
17329 (determine_url_format): ... this, and adjust.
17330 * pretty-print.h (pretty_printer::show_urls): rename to...
17331 (pretty_printer::url_format): ... this, and change to enum.
17332 * pretty-print.c (pretty_printer::pretty_printer,
17333 pp_begin_url, pp_end_url, test_urls): Adjust.
17334 * doc/install.texi (--with-diagnostics-urls): Document the new
17335 configuration option.
17336 (--with-diagnostics-color): Document the existing interaction
17337 with GCC_COLORS better.
17338 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
17339 vindex reference. Update description of defaults based on the above.
17340 (-fdiagnostics-color): Update description of how -fdiagnostics-color
17341 interacts with GCC_COLORS.
17343 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
17346 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
17347 conjunction with TARGET_GNU_TLS in early return.
17349 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
17351 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
17352 the mode is not wider than UNITS_PER_WORD.
17354 2020-02-14 Martin Jambor <mjambor@suse.cz>
17356 PR tree-optimization/93516
17357 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
17358 access of the same type as the parent.
17359 (propagate_subaccesses_from_lhs): Likewise.
17361 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
17364 * config/i386/avx512vbmi2intrin.h
17365 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
17366 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
17367 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
17368 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
17369 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
17370 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
17371 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
17372 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
17373 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
17374 of lacking a closing parenthesis.
17375 * config/i386/avx512vbmi2vlintrin.h
17376 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
17377 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
17378 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
17379 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
17380 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
17381 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
17382 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
17383 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
17384 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
17385 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
17386 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
17387 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
17388 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
17389 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
17390 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
17391 _mm_shldi_epi32, _mm_mask_shldi_epi32,
17392 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
17393 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
17395 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
17398 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
17399 the target function entry.
17401 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
17403 * common/config/arc/arc-common.c (arc_option_optimization_table):
17404 Disable if-conversion step when optimized for size.
17406 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
17408 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
17409 R12-R15 are always in ARCOMPACT16_REGS register class.
17410 * config/arc/arc.opt (mq-class): Deprecate.
17411 * config/arc/constraint.md ("q"): Remove dependency on mq-class
17413 * doc/invoke.texi (mq-class): Update text.
17414 * common/config/arc/arc-common.c (arc_option_optimization_table):
17417 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
17419 * config/arc/arc.c (arc_insn_cost): New function.
17420 (TARGET_INSN_COST): Define.
17421 * config/arc/arc.md (cost): New attribute.
17422 (add_n): Use arc_nonmemory_operand.
17423 (ashlsi3_insn): Likewise, also update constraints.
17424 (ashrsi3_insn): Likewise.
17425 (rotrsi3): Likewise.
17426 (add_shift): Likewise.
17427 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
17429 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
17431 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
17433 (umulsidi_600): Likewise.
17435 2020-02-13 Jakub Jelinek <jakub@redhat.com>
17438 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
17439 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
17440 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
17441 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
17442 pass __A to the builtin followed by __W instead of __A followed by
17444 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
17445 _mm512_mask_popcnt_epi64): Likewise.
17446 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
17447 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
17448 _mm256_mask_popcnt_epi64): Likewise.
17450 PR tree-optimization/93582
17451 * fold-const.h (shift_bytes_in_array_left,
17452 shift_bytes_in_array_right): Declare.
17453 * fold-const.c (shift_bytes_in_array_left,
17454 shift_bytes_in_array_right): New function, moved from
17455 gimple-ssa-store-merging.c, no longer static.
17456 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
17457 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
17458 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
17459 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
17460 shift_bytes_in_array.
17461 (verify_shift_bytes_in_array): Rename to ...
17462 (verify_shift_bytes_in_array_left): ... this. Use
17463 shift_bytes_in_array_left instead of shift_bytes_in_array.
17464 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
17465 instead of verify_shift_bytes_in_array.
17466 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
17467 / native_interpret_expr where the store covers all needed bits,
17468 punt on PDP-endian, otherwise allow all involved offsets and sizes
17469 not to be byte-aligned.
17472 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
17473 use const_0_to_255_operand predicate instead of immediate_operand.
17474 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
17475 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
17476 vgf2p8affineinvqb_<mode><mask_name>,
17477 vgf2p8affineqb_<mode><mask_name>): Drop mode from
17478 const_0_to_255_operand predicated operands.
17480 2020-02-12 Jeff Law <law@redhat.com>
17482 * config/h8300/h8300.md (comparison shortening peepholes): Use
17483 a mode iterator to merge the HImode and SImode peepholes.
17485 2020-02-12 Jakub Jelinek <jakub@redhat.com>
17487 PR middle-end/93663
17488 * real.c (is_even): Make static. Function comment fix.
17489 (is_halfway_below): Make static, don't assert R is not inf/nan,
17490 instead return false for those. Small formatting fixes.
17492 2020-02-12 Martin Sebor <msebor@redhat.com>
17494 PR middle-end/93646
17495 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
17496 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
17497 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
17498 (strlen_check_and_optimize_call): Adjust callee name.
17500 2020-02-12 Jeff Law <law@redhat.com>
17502 * config/h8300/h8300.md (comparison shortening peepholes): Drop
17503 (and (xor)) variant. Combine other two into single peephole.
17505 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
17507 PR rtl-optimization/93565
17508 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
17510 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
17512 * config/aarch64/aarch64-simd.md
17513 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
17514 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
17515 generating separate ADDV and zero_extend patterns.
17516 * config/aarch64/iterators.md (VDQV_E): New iterator.
17518 2020-02-12 Jeff Law <law@redhat.com>
17520 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
17521 expanders, splits, etc.
17522 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
17523 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
17524 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
17525 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
17526 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
17527 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
17528 function prototype.
17529 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
17531 2020-02-12 Jakub Jelinek <jakub@redhat.com>
17534 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
17535 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
17536 TARGET_AVX512DQ from condition.
17537 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
17538 instead of <mask_mode512bit_condition> in condition. If
17539 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
17541 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
17544 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
17547 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
17549 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
17551 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
17552 where strlen is more legible.
17553 (rs6000_builtin_vectorized_libmass): Ditto.
17554 (rs6000_print_options_internal): Ditto.
17556 2020-02-11 Martin Sebor <msebor@redhat.com>
17558 PR tree-optimization/93683
17559 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
17561 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
17563 * config/rs6000/predicates.md (cint34_operand): Rename the
17564 -mprefixed-addr option to be -mprefixed.
17565 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
17566 the -mprefixed-addr option to be -mprefixed.
17567 (OTHER_FUTURE_MASKS): Likewise.
17568 (POWERPC_MASKS): Likewise.
17569 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
17570 the -mprefixed-addr option to be -mprefixed. Change error
17571 messages to refer to -mprefixed.
17572 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
17574 (rs6000_legitimate_offset_address_p): Likewise.
17575 (rs6000_mode_dependent_address): Likewise.
17576 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
17577 "-mprefixed" for target attributes and pragmas.
17578 (address_to_insn_form): Rename the -mprefixed-addr option to be
17580 (rs6000_adjust_insn_length): Likewise.
17581 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
17582 -mprefixed-addr option to be -mprefixed.
17583 (ASM_OUTPUT_OPCODE): Likewise.
17584 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
17585 -mprefixed-addr option to be -mprefixed.
17586 * config/rs6000/rs6000.opt (-mprefixed): Rename the
17587 -mprefixed-addr option to be prefixed. Change the option from
17588 being undocumented to being documented.
17589 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
17590 -mprefixed option. Update the -mpcrel documentation to mention
17593 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
17595 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
17596 including FIRST_PSEUDO_REGISTER - 1.
17597 * ira-color.c (print_hard_reg_set): Ditto.
17599 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17601 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
17602 (USTERNOP_QUALIFIERS): New define.
17603 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
17604 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
17605 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
17606 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
17607 * config/arm/arm_neon.h (vusdot_s32): New.
17608 (vusdot_lane_s32): New.
17609 (vusdotq_lane_s32): New.
17610 (vsudot_lane_s32): New.
17611 (vsudotq_lane_s32): New.
17612 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
17613 * config/arm/iterators.md (DOTPROD_I8MM): New.
17614 (sup, opsuffix): Add <us/su>.
17615 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
17616 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
17618 2020-02-11 Richard Biener <rguenther@suse.de>
17620 PR tree-optimization/93661
17621 PR tree-optimization/93662
17622 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
17623 tree_to_poly_int64.
17624 * tree-sra.c (get_access_for_expr): Likewise.
17626 2020-02-10 Jakub Jelinek <jakub@redhat.com>
17629 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
17630 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
17631 Change condition from TARGET_AVX2 to TARGET_AVX.
17633 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
17636 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
17637 argument of strncmp.
17639 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
17641 Try to generate zero-based comparisons.
17642 * config/cris/cris.c (cris_reduce_compare): New function.
17643 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
17644 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
17645 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
17647 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
17650 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
17651 in Thumb state and also as a destination in Arm state. Add T16
17654 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
17656 * md.texi (Define Subst): Match closing paren in example.
17658 2020-02-10 Jakub Jelinek <jakub@redhat.com>
17662 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
17663 arguments of strncmp.
17665 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
17668 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
17669 but different source value.
17670 (adjust_callers_for_value_intersection): New function.
17671 (gather_edges_for_value): Adjust order of callers to let a
17672 non-self-recursive caller be the first element.
17673 (self_recursive_pass_through_p): Add a new parameter "simple", and
17674 check generalized self-recursive pass-through jump function.
17675 (self_recursive_agg_pass_through_p): Likewise.
17676 (find_more_scalar_values_for_callers_subset): Compute value from
17677 pass-through jump function for self-recursive.
17678 (intersect_with_plats): Cleanup previous implementation code for value
17679 itersection with self-recursive call edge.
17680 (intersect_with_agg_replacements): Likewise.
17681 (intersect_aggregates_with_edge): Deduce value from pass-through jump
17682 function for self-recursive call edge. Cleanup previous implementation
17683 code for value intersection with self-recursive call edge.
17684 (decide_whether_version_node): Remove dead callers and adjust order
17685 to let a non-self-recursive caller be the first element.
17687 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
17689 * recog.c: Move pass_split_before_sched2 code in front of
17690 pass_split_before_regstack.
17691 (pass_data_split_before_sched2): Rename pass to split3 from split4.
17692 (pass_data_split_before_regstack): Rename pass to split4 from split3.
17693 (rest_of_handle_split_before_sched2): Remove.
17694 (pass_split_before_sched2::execute): Unconditionally call
17696 (enable_split_before_sched2): New function.
17697 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
17698 (pass_split_before_regstack::gate): Ditto.
17699 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
17700 Update name check for renamed split4 pass.
17701 * config/sh/sh.c (register_sh_passes): Update pass insertion
17702 point for renamed split4 pass.
17704 2020-02-09 Jakub Jelinek <jakub@redhat.com>
17706 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
17707 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
17708 copying them around between host and target.
17710 2020-02-08 Andrew Pinski <apinski@marvell.com>
17713 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
17714 STRICT_ALIGNMENT also.
17716 2020-02-08 Jim Wilson <jimw@sifive.com>
17719 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
17721 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
17722 Jakub Jelinek <jakub@redhat.com>
17725 * config/i386/i386.h (CALL_USED_REGISTERS): Make
17726 xmm16-xmm31 call-used even in 64-bit ms-abi.
17728 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
17730 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
17731 (simd_ummla, simd_usmmla): Likewise.
17732 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
17733 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
17734 (vusmmlaq_s32): New.
17736 2020-02-07 Richard Biener <rguenther@suse.de>
17738 PR middle-end/93519
17739 * tree-inline.c (fold_marked_statements): Do a PRE walk,
17740 skipping unreachable regions.
17741 (optimize_inline_calls): Skip folding stmts when we didn't
17744 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
17747 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
17748 Don't return aggregates with only SFmode and DFmode in SSE
17750 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
17752 2020-02-07 Jakub Jelinek <jakub@redhat.com>
17755 * config/rs6000/rs6000-logue.c
17756 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
17757 if it fails, move rs into end_addr and retry. Add
17758 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
17759 the insn pattern doesn't describe well what exactly happens to
17763 * config/i386/predicates.md (avx_identity_operand): Remove.
17764 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
17765 (avx_<castmode><avxsizesuffix>_<castmode>,
17766 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
17767 a VEC_CONCAT of the operand and UNSPEC_CAST.
17768 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
17769 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
17773 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
17774 recog_data.insn if distance_non_agu_define changed it.
17776 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
17779 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
17780 we only had X-FORM (reg+reg) addressing for vectors. Also before
17781 ISA 3.0, we only had X-FORM addressing for scalars in the
17782 traditional Altivec registers.
17784 2020-02-06 <zhongyunde@huawei.com>
17785 Vladimir Makarov <vmakarov@redhat.com>
17787 PR rtl-optimization/93561
17788 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
17789 hard register range.
17791 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
17793 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
17796 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
17798 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
17799 where the low and the high 32 bits are equal to each other specially,
17800 with an rldimi instruction.
17802 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
17804 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
17806 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
17808 * config/arm/arm-tables.opt: Regenerate.
17810 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
17813 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
17814 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
17815 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
17817 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
17819 PR rtl-optimization/87763
17820 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
17822 2020-02-06 Delia Burduv <delia.burduv@arm.com>
17824 * config/aarch64/aarch64-simd-builtins.def
17825 (bfmlaq): New built-in function.
17826 (bfmlalb): New built-in function.
17827 (bfmlalt): New built-in function.
17828 (bfmlalb_lane): New built-in function.
17829 (bfmlalt_lane): New built-in function.
17830 * config/aarch64/aarch64-simd.md
17831 (aarch64_bfmmlaqv4sf): New pattern.
17832 (aarch64_bfmlal<bt>v4sf): New pattern.
17833 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
17834 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
17835 (vbfmlalbq_f32): New intrinsic.
17836 (vbfmlaltq_f32): New intrinsic.
17837 (vbfmlalbq_lane_f32): New intrinsic.
17838 (vbfmlaltq_lane_f32): New intrinsic.
17839 (vbfmlalbq_laneq_f32): New intrinsic.
17840 (vbfmlaltq_laneq_f32): New intrinsic.
17841 * config/aarch64/iterators.md (BF_MLA): New int iterator.
17842 (bt): New int attribute.
17844 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
17846 * config/i386/i386.md (*pushtf): Emit "#" instead of
17847 calling gcc_unreachable in insn output.
17850 (*pushsf_rex64): Ditto for alternatives other than 1.
17851 (*pushsf): Ditto for alternatives other than 1.
17853 2020-02-06 Martin Liska <mliska@suse.cz>
17855 PR gcov-profile/91971
17856 PR gcov-profile/93466
17857 * coverage.c (coverage_init): Revert mangling of
17858 path into filename. It can lead to huge filename length.
17859 Creation of subfolders seem more natural.
17861 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17864 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
17865 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
17866 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
17868 2020-02-06 Jakub Jelinek <jakub@redhat.com>
17871 * config/i386/predicates.md (avx_identity_operand): New predicate.
17872 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
17873 define_insn_and_split.
17876 * omp-low.c (use_pointer_for_field): For nested constructs, also
17877 look for map clauses on target construct.
17878 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
17879 taskreg_nesting_level.
17882 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
17883 shared clause, call omp_notice_variable on outer context if any.
17885 2020-02-05 Jason Merrill <jason@redhat.com>
17888 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
17889 non-zero address even if weak and not yet defined.
17891 2020-02-05 Martin Sebor <msebor@redhat.com>
17893 PR tree-optimization/92765
17894 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
17895 * tree-ssa-strlen.c (compute_string_length): Remove.
17896 (determine_min_objsize): Remove.
17897 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
17898 Avoid using type size as the upper bound on string length.
17899 (handle_builtin_string_cmp): Add an argument. Adjust.
17900 (strlen_check_and_optimize_call): Pass additional argument to
17901 handle_builtin_string_cmp.
17903 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
17905 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
17906 (*pushdi2_rex64 peephole2): Unconditionally split after
17907 epilogue_completed.
17908 (*ashl<mode>3_doubleword): Ditto.
17909 (*<shift_insn><mode>3_doubleword): Ditto.
17911 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
17914 * config/rs6000/rs6000.c (get_vector_offset): Fix
17916 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
17918 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
17920 2020-02-05 David Malcolm <dmalcolm@redhat.com>
17922 * doc/analyzer.texi
17923 (Special Functions for Debugging the Analyzer): Update description
17924 of __analyzer_dump_exploded_nodes.
17926 2020-02-05 Jakub Jelinek <jakub@redhat.com>
17929 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
17930 include sets and not clobbers in the vzeroupper pattern.
17931 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
17932 the parallel has 17 (64-bit) or 9 (32-bit) elts.
17933 (*avx_vzeroupper_1): New define_insn_and_split.
17936 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
17937 don't run when !optimize.
17938 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
17941 2020-02-05 Richard Biener <rguenther@suse.de>
17943 PR middle-end/90648
17944 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
17945 checks before matching calls.
17947 2020-02-05 Jakub Jelinek <jakub@redhat.com>
17949 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
17950 function comment typo.
17952 PR middle-end/93555
17953 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
17954 simd_clone_create failed when i == 0, adjust clone->nargs by
17957 2020-02-05 Martin Liska <mliska@suse.cz>
17960 * doc/invoke.texi: Document that one should
17961 not combine ASLR and -fpch.
17963 2020-02-04 Richard Biener <rguenther@suse.de>
17965 PR tree-optimization/93538
17966 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
17968 2020-02-04 Richard Biener <rguenther@suse.de>
17970 PR tree-optimization/91123
17971 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
17972 (vn_walk_cb_data::last_vuse): New member.
17973 (vn_walk_cb_data::saved_operands): Likewsie.
17974 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
17975 (vn_walk_cb_data::push_partial_def): Use finish.
17976 (vn_reference_lookup_2): Update last_vuse and use finish if
17977 we've saved operands.
17978 (vn_reference_lookup_3): Use finish and update calls to
17979 push_partial_defs everywhere. When translating through
17980 memcpy or aggregate copies save off operands and alias-set.
17981 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
17982 operation for redundant store removal.
17984 2020-02-04 Richard Biener <rguenther@suse.de>
17986 PR tree-optimization/92819
17987 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
17988 generating more stmts than before.
17990 2020-02-04 Martin Liska <mliska@suse.cz>
17992 * config/arm/arm.c (arm_gen_far_branch): Move the function
17993 outside of selftests.
17995 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
17997 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
17998 function to adjust PC-relative vector addresses.
17999 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
18000 handle vectors with PC-relative addresses.
18002 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
18004 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
18006 (hard_reg_and_mode_to_addr_mask): Delete.
18007 (rs6000_adjust_vec_address): If the original vector address
18008 was REG+REG or REG+OFFSET and the element is not zero, do the add
18009 of the elements in the original address before adding the offset
18010 for the vector element. Use address_to_insn_form to validate the
18011 address using the register being loaded, rather than guessing
18012 whether the address is a DS-FORM or DQ-FORM address.
18014 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
18016 * config/rs6000/rs6000.c (get_vector_offset): New helper function
18017 to calculate the offset in memory from the start of a vector of a
18018 particular element. Add code to keep the element number in
18019 bounds if the element number is variable.
18020 (rs6000_adjust_vec_address): Move calculation of offset of the
18021 vector element to get_vector_offset.
18022 (rs6000_split_vec_extract_var): Do not do the initial AND of
18023 element here, move the code to get_vector_offset.
18025 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
18027 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
18030 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
18032 * config/rs6000/constraints.md: Improve documentation.
18034 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
18037 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
18038 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
18040 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
18042 * config.gcc: Remove "carrizo" support.
18043 * config/gcn/gcn-opts.h (processor_type): Likewise.
18044 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
18045 * config/gcn/gcn.opt (gpu_type): Likewise.
18046 * config/gcn/t-omp-device: Likewise.
18048 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18051 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
18052 * config/arm/arm.c (arm_gen_far_branch): New function
18053 arm_gen_far_branch.
18054 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
18056 2020-02-03 Julian Brown <julian@codesourcery.com>
18057 Tobias Burnus <tobias@codesourcery.com>
18059 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
18061 2020-02-03 Jakub Jelinek <jakub@redhat.com>
18064 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
18065 valid RTL to sum up the lowest and second lowest bytes of the popcnt
18068 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
18070 PR rtl-optimization/91333
18071 * ira-color.c (struct allocno_color_data): Add member
18073 (init_allocno_threads): Set the member up.
18074 (bucket_allocno_compare_func): Add compare hard reg
18077 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
18079 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
18081 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
18082 * config.in: Regenerated.
18083 * configure: Regenerated.
18084 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
18085 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
18086 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
18088 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
18090 * configure: Regenerate.
18092 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
18094 PR rtl-optimization/91333
18095 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
18096 reg preferences comparison up.
18098 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
18100 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
18101 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
18102 aarch64-sve-builtins-base.h.
18103 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
18104 aarch64-sve-builtins-base.cc.
18105 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
18106 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
18107 (svcvtnt): Declare.
18108 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
18109 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
18110 (svcvtnt): New functions.
18111 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
18112 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
18113 (svcvtnt): New functions.
18114 (svcvt): Add a form that converts f32 to bf16.
18115 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
18116 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
18118 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
18119 Treat B as bfloat16_t.
18120 (ternary_bfloat_lane_base): New class.
18121 (ternary_bfloat_def): Likewise.
18122 (ternary_bfloat): New shape.
18123 (ternary_bfloat_lane_def): New class.
18124 (ternary_bfloat_lane): New shape.
18125 (ternary_bfloat_lanex2_def): New class.
18126 (ternary_bfloat_lanex2): New shape.
18127 (ternary_bfloat_opt_n_def): New class.
18128 (ternary_bfloat_opt_n): New shape.
18129 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
18130 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
18131 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
18132 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
18133 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
18134 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
18135 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
18136 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
18137 the pattern off the narrow mode instead of the wider one.
18138 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
18139 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
18140 (sve_fp_op): Handle them.
18141 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
18142 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
18144 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
18146 * config/aarch64/arm_sve.h: Include arm_bf16.h.
18147 * config/aarch64/aarch64-modes.def (BF): Move definition before
18148 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
18149 (SVE_MODES): Handle BF modes.
18150 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
18152 (aarch64_full_sve_mode): Likewise.
18153 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
18155 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
18156 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
18157 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
18158 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
18160 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
18162 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
18163 (TYPES_all_data): Add bf16.
18164 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
18165 (register_tuple_type): Increase buffer size.
18166 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
18167 (bf16): New type suffix.
18168 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
18169 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
18170 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
18171 Change type from all_data to all_arith.
18172 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
18173 (svminp): Likewise.
18175 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
18176 Matthew Malcomson <matthew.malcomson@arm.com>
18177 Richard Sandiford <richard.sandiford@arm.com>
18179 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
18180 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
18181 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
18182 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
18183 __ARM_FEATURE_MATMUL_FP64.
18184 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
18185 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
18186 be disabled at the same time.
18187 (f32mm): New extension.
18188 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
18189 (AARCH64_FL_F64MM): Bump to the next bit up.
18190 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
18191 (TARGET_SVE_F64MM): New macros.
18192 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
18193 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
18194 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
18195 (UNSPEC_ZIP2Q): New unspeccs.
18196 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
18197 (optab, sur, perm_insn): Handle the new unspecs.
18198 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
18199 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
18200 TARGET_SVE_F64MM instead of separate tests.
18201 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
18202 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
18203 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
18204 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
18205 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
18206 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
18207 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
18208 (TYPES_s_signed): New macro.
18209 (TYPES_s_integer): Use it.
18210 (TYPES_d_float): New macro.
18211 (TYPES_d_data): Use it.
18212 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
18213 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
18214 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
18215 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
18216 (svmmla): New shape.
18217 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
18218 template parameters.
18219 (ternary_resize2_lane_base): Likewise.
18220 (ternary_resize2_base): New class.
18221 (ternary_qq_lane_base): Likewise.
18222 (ternary_intq_uintq_lane_def): Likewise.
18223 (ternary_intq_uintq_lane): New shape.
18224 (ternary_intq_uintq_opt_n_def): New class
18225 (ternary_intq_uintq_opt_n): New shape.
18226 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
18227 (ternary_uintq_intq_def): New class.
18228 (ternary_uintq_intq): New shape.
18229 (ternary_uintq_intq_lane_def): New class.
18230 (ternary_uintq_intq_lane): New shape.
18231 (ternary_uintq_intq_opt_n_def): New class.
18232 (ternary_uintq_intq_opt_n): New shape.
18233 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
18234 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
18235 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
18236 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
18238 (svdotprod_lane_impl): ...this new class.
18239 (svmmla_impl, svusdot_impl): New classes.
18240 (svdot_lane): Update to use svdotprod_lane_impl.
18241 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
18242 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
18244 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
18245 function, with no types defined.
18246 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
18247 AARCH64_FL_I8MM functions.
18248 (svmmla): New AARCH64_FL_F32MM function.
18249 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
18250 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
18251 AARCH64_FL_F64MM function.
18252 (REQUIRED_EXTENSIONS):
18254 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
18256 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
18259 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
18261 * config/i386/i386.md (*movoi_internal_avx): Do not check for
18262 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
18263 (*movti_internal): Do not check for
18264 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
18265 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
18266 just after check for TARGET_AVX.
18267 (*movdf_internal): Ditto.
18268 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
18269 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
18270 * config/i386/sse.md (mov<mode>_internal): Only check
18271 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
18272 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
18273 (<sse>_andnot<mode>3<mask_name>): Move check for
18274 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
18275 (<code><mode>3<mask_name>): Ditto.
18276 (*andnot<mode>3): Ditto.
18277 (*andnottf3): Ditto.
18278 (*<code><mode>3): Ditto.
18279 (*<code>tf3): Ditto.
18280 (*andnot<VI:mode>3): Remove
18281 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
18282 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
18283 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
18284 (sse4_1_blendv<ssemodesuffix>): Ditto.
18285 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
18286 Explain that tune applies to 128bit instructions only.
18288 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
18290 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
18291 to definition of hsa_kernel_description. Parse assembly to find SGPR
18292 and VGPR count of kernel and store in hsa_kernel_description.
18294 2020-01-31 Tamar Christina <tamar.christina@arm.com>
18296 PR rtl-optimization/91838
18297 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
18298 to truncate if allowed or reject combination.
18300 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
18302 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
18303 (find_inv_vars_cb): Likewise.
18305 2020-01-31 David Malcolm <dmalcolm@redhat.com>
18307 * calls.c (special_function_p): Split out the check for DECL_NAME
18308 being non-NULL and fndecl being extern at file scope into a
18309 new maybe_special_function_p and call it. Drop check for fndecl
18310 being non-NULL that was after a usage of DECL_NAME (fndecl).
18311 * tree.h (maybe_special_function_p): New inline function.
18313 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
18315 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
18316 (mask_gather_load<mode>): ... here, and zero-initialize the
18318 (maskload<mode>di): Zero-initialize the destination.
18319 * config/gcn/gcn.c:
18321 2020-01-30 David Malcolm <dmalcolm@redhat.com>
18324 * doc/analyzer.texi (Limitations): Note that constraints on
18325 floating-point values are currently ignored.
18327 2020-01-30 Jakub Jelinek <jakub@redhat.com>
18330 * symtab.c (symtab_node::noninterposable_alias): If localalias
18331 already exists, but is not usable, append numbers after it until
18332 a unique name is found. Formatting fix.
18334 PR middle-end/93505
18335 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
18338 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
18340 * config/gcn/gcn.c (print_operand): Handle LTGT.
18341 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
18343 2020-01-30 Richard Biener <rguenther@suse.de>
18345 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
18346 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
18348 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
18350 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
18351 without a DECL in .data.rel.ro.local.
18353 2020-01-30 Jakub Jelinek <jakub@redhat.com>
18356 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
18360 * config/i386/sse.md
18361 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
18362 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
18363 any_extend code iterator instead of always zero_extend.
18364 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
18365 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
18366 Use any_extend code iterator instead of always zero_extend.
18367 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
18368 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
18369 Use any_extend code iterator instead of always zero_extend.
18370 (*sse2_pmovmskb_ext): New define_insn.
18371 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
18374 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
18375 (*popcountsi2_zext_falsedep): New define_insn.
18377 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
18379 * config.in: Regenerated.
18380 * configure: Regenerated.
18382 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
18385 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
18386 LLVM's assembler changed the default in version 9.
18388 2020-01-24 Jeff Law <law@redhat.com>
18390 PR tree-optimization/89689
18391 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
18393 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
18397 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
18399 PR rtl-optimization/87763
18400 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
18401 simplification to handle subregs as well as bare regs.
18402 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
18404 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
18407 * ira.c (ira): Revert use of simplified LRA algorithm.
18409 2020-01-29 Martin Jambor <mjambor@suse.cz>
18411 PR tree-optimization/92706
18412 * tree-sra.c (struct access): Fields first_link, last_link,
18413 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
18414 next_rhs_queued and grp_rhs_queued respectively, new fields
18415 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
18416 (struct assign_link): Field next renamed to next_rhs, new field
18417 next_lhs. Updated comment.
18418 (work_queue_head): Renamed to rhs_work_queue_head.
18419 (lhs_work_queue_head): New variable.
18420 (add_link_to_lhs): New function.
18421 (relink_to_new_repr): Also relink LHS lists.
18422 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
18423 (add_access_to_lhs_work_queue): New function.
18424 (pop_access_from_work_queue): Renamed to
18425 pop_access_from_rhs_work_queue.
18426 (pop_access_from_lhs_work_queue): New function.
18427 (build_accesses_from_assign): Also add links to LHS lists and to LHS
18429 (child_would_conflict_in_lacc): Renamed to
18430 child_would_conflict_in_acc. Adjusted parameter names.
18431 (create_artificial_child_access): New parameter set_grp_read, use it.
18432 (subtree_mark_written_and_enqueue): Renamed to
18433 subtree_mark_written_and_rhs_enqueue.
18434 (propagate_subaccesses_across_link): Renamed to
18435 propagate_subaccesses_from_rhs.
18436 (propagate_subaccesses_from_lhs): New function.
18437 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
18440 2020-01-29 Martin Jambor <mjambor@suse.cz>
18442 PR tree-optimization/92706
18443 * tree-sra.c (struct access): Adjust comment of
18444 grp_total_scalarization.
18445 (find_access_in_subtree): Look for single children spanning an entire
18447 (scalarizable_type_p): Allow register accesses, adjust callers.
18448 (completely_scalarize): Remove function.
18449 (scalarize_elem): Likewise.
18450 (create_total_scalarization_access): Likewise.
18451 (sort_and_splice_var_accesses): Do not track total scalarization
18453 (analyze_access_subtree): New parameter totally, adjust to new meaning
18454 of grp_total_scalarization.
18455 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
18456 (can_totally_scalarize_forest_p): New function.
18457 (create_total_scalarization_access): Likewise.
18458 (create_total_access_and_reshape): Likewise.
18459 (total_should_skip_creating_access): Likewise.
18460 (totally_scalarize_subtree): Likewise.
18461 (analyze_all_variable_accesses): Perform total scalarization after
18462 subaccess propagation using the new functions above.
18463 (initialize_constant_pool_replacements): Output initializers by
18464 traversing the access tree.
18466 2020-01-29 Martin Jambor <mjambor@suse.cz>
18468 * tree-sra.c (verify_sra_access_forest): New function.
18469 (verify_all_sra_access_forests): Likewise.
18470 (create_artificial_child_access): Set parent.
18471 (analyze_all_variable_accesses): Call the verifier.
18473 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
18475 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
18476 if called on indirect edge.
18477 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
18478 speculative call if needed.
18480 2020-01-29 Richard Biener <rguenther@suse.de>
18482 PR tree-optimization/93428
18483 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
18484 permutation when the load node is created.
18485 (vect_analyze_slp_instance): Re-use it here.
18487 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
18489 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
18491 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
18493 PR rtl-optimization/93272
18494 * ira-lives.c (process_out_of_region_eh_regs): New function.
18495 (process_bb_node_lives): Call it.
18497 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
18499 * coverage.c (read_counts_file): Make error message lowercase.
18501 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
18503 * profile-count.c (profile_quality_display_names): Fix ordering.
18505 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
18508 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
18509 hash only when edge is first within the sequence.
18510 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
18511 (symbol_table::create_edge): Do not set target_prob.
18512 (cgraph_edge::remove_caller): Watch for speculative calls when updating
18513 the call site hash.
18514 (cgraph_edge::make_speculative): Drop target_prob parameter.
18515 (cgraph_edge::speculative_call_info): Remove.
18516 (cgraph_edge::first_speculative_call_target): New member function.
18517 (update_call_stmt_hash_for_removing_direct_edge): New function.
18518 (cgraph_edge::resolve_speculation): Rewrite to new API.
18519 (cgraph_edge::speculative_call_for_target): New member function.
18520 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
18521 multiple speculation targets.
18522 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
18524 (verify_speculative_call): Verify that targets form an interval.
18525 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
18526 (cgraph_edge::first_speculative_call_target): New member function.
18527 (cgraph_edge::next_speculative_call_target): New member function.
18528 (cgraph_edge::speculative_call_target_ref): New member function.
18529 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
18530 (cgraph_edge): Remove target_prob.
18531 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
18532 Fix handling of speculative calls.
18533 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
18534 * ipa-fnsummary.c (analyze_function_body): Likewise.
18535 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
18536 * ipa-profile.c (dump_histogram): Fix formating.
18537 (ipa_profile_generate_summary): Watch for overflows.
18538 (ipa_profile): Do not require probablity to be 1/2; update to new API.
18539 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
18540 (update_indirect_edges_after_inlining): Update to new API.
18541 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
18543 * profile-count.h: (profile_probability::adjusted): New.
18544 * tree-inline.c (copy_bb): Update to new speculative call API; fix
18545 updating of profile.
18546 * value-prof.c (gimple_ic_transform): Rename to ...
18547 (dump_ic_profile): ... this one; update dumping.
18548 (stream_in_histogram_value): Fix formating.
18549 (gimple_value_profile_transformations): Update.
18551 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
18554 * config/i386/i386.md (*movoi_internal_avx): Remove
18555 TARGET_SSE_TYPELESS_STORES check.
18556 (*movti_internal): Prefer TARGET_AVX over
18557 TARGET_SSE_TYPELESS_STORES.
18558 (*movtf_internal): Likewise.
18559 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
18560 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
18561 from TARGET_SSE_TYPELESS_STORES.
18563 2020-01-28 David Malcolm <dmalcolm@redhat.com>
18565 * diagnostic-core.h (warning_at): Rename overload to...
18566 (warning_meta): ...this.
18567 (emit_diagnostic_valist): Delete decl of overload taking
18568 diagnostic_metadata.
18569 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
18570 (warning_at): Rename overload taking diagnostic_metadata to...
18571 (warning_meta): ...this.
18573 2020-01-28 Richard Biener <rguenther@suse.de>
18575 PR tree-optimization/93439
18576 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
18577 * tree-cfg.c (move_sese_region_to_fn): ... here.
18578 (verify_types_in_gimple_reference): Verify used cliques are
18581 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
18584 * config/i386/i386-options.c (set_ix86_tune_features): Add an
18585 argument of a pointer to struct gcc_options and pass it to
18586 parse_mtune_ctrl_str.
18587 (ix86_function_specific_restore): Pass opts to
18588 set_ix86_tune_features.
18589 (ix86_option_override_internal): Likewise.
18590 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
18591 gcc_options and use it for x_ix86_tune_ctrl_string.
18593 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
18595 PR rtl-optimization/87763
18596 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
18597 simplification to handle subregs as well as bare regs.
18598 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
18600 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
18602 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
18603 for reduction chains that (now) include a call.
18605 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
18607 PR tree-optimization/92822
18608 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
18609 out the don't-care elements of a vector whose significant elements
18610 are duplicates, make the don't-care elements duplicates too.
18612 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
18614 PR tree-optimization/93434
18615 * tree-predcom.c (split_data_refs_to_components): Record which
18616 components have had aliasing loads removed. Prevent store-store
18617 commoning for all such components.
18619 2020-01-28 Jakub Jelinek <jakub@redhat.com>
18622 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
18623 -1 or is_vshift is true, use new_vector with number of elts npatterns
18624 rather than new_unary_operation.
18626 PR tree-optimization/93454
18627 * gimple-fold.c (fold_array_ctor_reference): Perform
18628 elt_size.to_uhwi () just once, instead of calling it in every
18629 iteration. Punt if that value is above size of the temporary
18630 buffer. Decrease third native_encode_expr argument when
18631 bufoff + elt_sz is above size of buf.
18633 2020-01-27 Joseph Myers <joseph@codesourcery.com>
18635 * config/mips/mips.c (mips_declare_object_name)
18636 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
18638 2020-01-27 Martin Liska <mliska@suse.cz>
18640 PR gcov-profile/93403
18641 * tree-profile.c (gimple_init_gcov_profiler): Generate
18642 both __gcov_indirect_call_profiler_v4 and
18643 __gcov_indirect_call_profiler_v4_atomic.
18645 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
18648 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
18650 (@aarch64_split_simd_mov<mode>): Use it.
18651 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
18652 Leave the vec_extract patterns to handle 2-element vectors.
18653 (aarch64_simd_mov_from_<mode>high): Likewise.
18654 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
18655 (vec_extractv2dfv1df): Likewise.
18657 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
18659 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
18660 jump conditions for *compare_condjump<GPI:mode>.
18662 2020-01-27 David Malcolm <dmalcolm@redhat.com>
18665 * digraph.cc (test_edge::test_edge): Specify template for base
18668 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
18670 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
18672 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
18674 * config/arc/arc-protos.h (gen_mlo): Remove.
18675 (gen_mhi): Likewise.
18676 * config/arc/arc.c (AUX_MULHI): Define.
18677 (arc_must_save_reister): Special handling for r58/59.
18678 (arc_compute_frame_size): Consider mlo/mhi registers.
18679 (arc_save_callee_saves): Emit fp/sp move only when emit_move
18681 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
18682 mlo/mhi name selection.
18683 (arc_restore_callee_saves): Don't early restore blink when ISR.
18684 (arc_expand_prologue): Add mlo/mhi saving.
18685 (arc_expand_epilogue): Add mlo/mhi restoring.
18688 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
18689 numbering when MUL64 option is used.
18690 (DWARF2_FRAME_REG_OUT): Define.
18691 * config/arc/arc.md (arc600_stall): New pattern.
18692 (VUNSPEC_ARC_ARC600_STALL): Define.
18693 (mulsi64): Use correct mlo/mhi registers.
18694 (mulsi_600): Clean it up.
18695 * config/arc/predicates.md (mlo_operand): Remove any dependency on
18697 (mhi_operand): Likewise.
18699 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
18700 Petro Karashchenko <petro.karashchenko@ring.com>
18702 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
18703 attributes if needed.
18704 (prepare_move_operands): Generate special unspec instruction for
18706 (arc_isuncached_mem_p): Propagate uncached attribute to each
18708 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
18709 (VUNSPEC_ARC_STDI): Likewise.
18710 (ALLI): New mode iterator.
18711 (mALLI): New mode attribute.
18712 (lddi): New instruction pattern.
18714 (stdidi_split): Split instruction for architectures which are not
18715 supporting ll64 option.
18716 (lddidi_split): Likewise.
18718 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
18720 PR rtl-optimization/92989
18721 * lra-lives.c (process_bb_lives): Update the live-in set before
18722 processing additional clobbers.
18724 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
18726 PR rtl-optimization/93170
18727 * cselib.c (cselib_invalidate_regno_val): New function, split out
18729 (cselib_invalidate_regno): ...here.
18730 (cselib_invalidated_by_call_p): New function.
18731 (cselib_process_insn): Iterate over all the hard-register entries in
18732 REG_VALUES and invalidate any that cross call-clobbered registers.
18734 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
18736 * dojump.c (split_comparison): Use HONOR_NANS rather than
18737 HONOR_SNANS when splitting LTGT.
18739 2020-01-27 Martin Liska <mliska@suse.cz>
18742 * opts.c (print_filtered_help): Exclude language-specific
18743 options from --help=common unless enabled in all FEs.
18745 2020-01-27 Martin Liska <mliska@suse.cz>
18747 * opts.c (print_help): Exclude params from
18748 all except --help=param.
18750 2020-01-27 Martin Liska <mliska@suse.cz>
18753 * config/i386/i386-features.c (make_resolver_func):
18754 Align the code with ppc64 target implementation.
18755 Do not generate a unique name for resolver function.
18757 2020-01-27 Richard Biener <rguenther@suse.de>
18759 PR tree-optimization/93397
18760 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
18761 converted reduction chain SLP graph adjustment.
18763 2020-01-26 Marek Polacek <polacek@redhat.com>
18766 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
18769 2020-01-26 Jason Merrill <jason@redhat.com>
18772 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
18775 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
18777 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
18778 (rx_setmem): Likewise.
18780 2020-01-26 Jakub Jelinek <jakub@redhat.com>
18783 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
18784 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
18785 drop <di> from constraint of last operand.
18788 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
18789 TARGET_AVX2 and V4DFmode not in the split condition, but in the
18790 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
18792 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
18795 * ipa-cp.c (get_info_about_necessary_edges): Remove value
18798 2020-01-24 Jeff Law <law@redhat.com>
18800 PR tree-optimization/92788
18801 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
18804 2020-01-24 Jakub Jelinek <jakub@redhat.com>
18807 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
18808 *avx_vperm_broadcast_<mode>,
18809 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
18810 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
18811 Move before avx2_perm<mode>/avx512f_perm<mode>.
18814 * simplify-rtx.c (simplify_const_unary_operation,
18815 simplify_const_binary_operation): Punt for mode precision above
18816 MAX_BITSIZE_MODE_ANY_INT.
18818 2020-01-24 Andrew Pinski <apinski@marvell.com>
18820 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
18821 alu.shift_reg to 0.
18823 2020-01-24 Jeff Law <law@redhat.com>
18826 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
18827 for REGs. Call output_operand_lossage to get more reasonable
18830 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
18832 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
18833 gcn_fp_compare_operator.
18834 (vec_cmpu<mode>di): Use gcn_compare_operator.
18835 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
18836 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
18837 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
18838 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
18839 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
18840 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
18841 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
18842 gcn_fp_compare_operator.
18843 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
18844 gcn_fp_compare_operator.
18845 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
18846 gcn_fp_compare_operator.
18847 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
18848 gcn_fp_compare_operator.
18850 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
18852 * doc/install.texi (Cross-Compiler-Specific Options): Document
18853 `--with-toolexeclibdir' option.
18855 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
18857 * target.def (flags_regnum): Also mention effect on delay slot filling.
18858 * doc/tm.texi: Regenerate.
18860 2020-01-23 Jeff Law <law@redhat.com>
18862 PR translation/90162
18863 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
18865 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
18868 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
18871 2020-01-23 Jakub Jelinek <jakub@redhat.com>
18873 PR rtl-optimization/93402
18874 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
18877 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
18879 * config.in: Regenerated.
18880 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
18881 for TARGET_LIBC_GNUSTACK.
18882 * configure: Regenerated.
18883 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
18884 found to be 2.31 or greater.
18886 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
18888 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
18890 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
18891 (mips_asm_file_end): New function. Delegate to
18892 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
18893 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
18895 2020-01-23 Jakub Jelinek <jakub@redhat.com>
18898 * config/i386/i386-modes.def (POImode): New mode.
18899 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
18900 * config/i386/i386.md (DPWI): New mode attribute.
18901 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
18902 (QWI): Rename to...
18903 (QPWI): ... this. Use POI instead of OI for TImode.
18904 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
18905 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
18908 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
18911 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
18913 (speculation_tracker_rev): New pattern.
18914 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
18915 Use speculation_tracker_rev to track the inverse condition.
18917 2020-01-23 Richard Biener <rguenther@suse.de>
18919 PR tree-optimization/93381
18920 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
18921 alias-set of the def as argument and record the first one.
18922 (vn_walk_cb_data::first_set): New member.
18923 (vn_reference_lookup_3): Pass the alias-set of the current def
18924 to push_partial_def. Fix alias-set used in the aggregate copy
18926 (vn_reference_lookup): Consistently set *last_vuse_ptr.
18927 * real.c (clear_significand_below): Fix out-of-bound access.
18929 2020-01-23 Jakub Jelinek <jakub@redhat.com>
18932 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
18933 New define_insn patterns.
18935 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
18937 * doc/sourcebuild.texi (check-function-bodies): Add an
18938 optional target/xfail selector.
18940 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
18942 PR rtl-optimization/93124
18943 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
18944 bare USE and CLOBBER insns.
18946 2020-01-22 Andrew Pinski <apinski@marvell.com>
18948 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
18950 2020-01-22 David Malcolm <dmalcolm@redhat.com>
18953 * gdbinit.in (break-on-saved-diagnostic): Update for move of
18954 diagnostic_manager into "ana" namespace.
18955 * selftest-run-tests.c (selftest::run_tests): Update for move of
18956 selftest::run_analyzer_selftests to
18957 ana::selftest::run_analyzer_selftests.
18959 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
18961 * cfgexpand.c (union_stack_vars): Update the size.
18963 2020-01-22 Richard Biener <rguenther@suse.de>
18965 PR tree-optimization/93381
18966 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
18967 throughout, handle all conversions the same.
18969 2020-01-22 Jakub Jelinek <jakub@redhat.com>
18972 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
18973 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
18974 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
18975 Call force_reg on high_in2 unconditionally.
18977 2020-01-22 Martin Liska <mliska@suse.cz>
18979 PR tree-optimization/92924
18980 * profile.c (compute_value_histograms): Divide
18981 all counter values.
18983 2020-01-22 Jakub Jelinek <jakub@redhat.com>
18986 * output.h (assemble_name_resolve): Declare.
18987 * varasm.c (assemble_name_resolve): New function.
18988 (assemble_name): Use it.
18989 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
18991 2020-01-22 Joseph Myers <joseph@codesourcery.com>
18993 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
18994 update_web_docs_git instead of update_web_docs_svn.
18996 2020-01-21 Andrew Pinski <apinski@marvell.com>
18999 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
19000 as PTR mode. Have operand 1 as being modeless, it can be P mode.
19001 (*tlsgd_small_<mode>): Likewise.
19002 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
19003 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
19004 register. Convert that register back to dest using convert_mode.
19006 2020-01-21 Jim Wilson <jimw@sifive.com>
19008 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
19011 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
19012 Uros Bizjak <ubizjak@gmail.com>
19015 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
19017 (legitimize_tls_address): Do GNU2 TLS address computation in
19018 ptr_mode and zero-extend result to Pmode.
19019 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
19020 :P with :PTR and Pmode with ptr_mode.
19021 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
19022 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
19023 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
19025 2020-01-21 Jakub Jelinek <jakub@redhat.com>
19028 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
19029 the last two operands are CONST_INT_P before using them as such.
19031 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
19033 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
19034 to get the integer element types.
19036 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
19038 * config/aarch64/aarch64-sve-builtins.h
19039 (function_expander::convert_to_pmode): Declare.
19040 * config/aarch64/aarch64-sve-builtins.cc
19041 (function_expander::convert_to_pmode): New function.
19042 (function_expander::get_contiguous_base): Use it.
19043 (function_expander::prepare_gather_address_operands): Likewise.
19044 * config/aarch64/aarch64-sve-builtins-sve2.cc
19045 (svwhilerw_svwhilewr_impl::expand): Likewise.
19047 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
19050 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
19051 cfun->machine->label_is_assembled.
19052 (aarch64_print_patchable_function_entry): New.
19053 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
19054 * config/aarch64/aarch64.h (struct machine_function): New field,
19055 label_is_assembled.
19057 2020-01-21 David Malcolm <dmalcolm@redhat.com>
19060 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
19063 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
19066 * cgraph.c (cgraph_edge::resolve_speculation,
19067 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
19068 call_stmt_site_hash.
19070 2020-01-21 Martin Liska <mliska@suse.cz>
19072 * config/rs6000/rs6000.c (common_mode_defined): Remove
19075 2020-01-21 Richard Biener <rguenther@suse.de>
19077 PR tree-optimization/92328
19078 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
19079 type when value-numbering same-sized store by inserting a
19081 (eliminate_dom_walker::eliminate_stmt): When eliminating
19082 a redundant store handle bit-reinterpretation of the same value.
19084 2020-01-21 Andrew Pinski <apinski@marvel.com>
19087 * tree-into-ssa.c (prepare_block_for_update_1): Split out
19089 (prepare_block_for_update): This. Use a worklist instead of
19092 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19094 * config/arm/arm.c (clear_operation_p):
19095 Initialise last_regno, skip first iteration
19096 based on the first_set value and use ints instead
19097 of the unnecessary HOST_WIDE_INTs.
19099 2020-01-21 Jakub Jelinek <jakub@redhat.com>
19102 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
19103 compare_mode other than SFmode or DFmode.
19105 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
19108 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
19109 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
19110 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
19112 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
19114 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
19116 2020-01-20 Andrew Pinski <apinski@marvell.com>
19118 PR middle-end/93242
19119 * targhooks.c (default_print_patchable_function_entry): Use
19120 output_asm_insn to emit the nop instruction.
19122 2020-01-20 Fangrui Song <maskray@google.com>
19124 PR middle-end/93194
19125 * targhooks.c (default_print_patchable_function_entry): Align to
19128 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
19131 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
19132 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
19133 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
19134 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
19135 (*tls_dynamic_gnu2_lea_64): Renamed to ...
19136 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
19137 Remove the {q} suffix from lea.
19138 (*tls_dynamic_gnu2_call_64): Renamed to ...
19139 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
19140 (*tls_dynamic_gnu2_combine_64): Renamed to ...
19141 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
19142 Pass Pmode to gen_tls_dynamic_gnu2_64.
19144 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
19146 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
19148 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
19150 * config/aarch64/aarch64-sve-builtins-base.cc
19151 (svld1ro_impl::memory_vector_mode): Remove parameter name.
19153 2020-01-20 Richard Biener <rguenther@suse.de>
19156 * dwarf2out.c (prune_unused_types): Unconditionally mark
19157 called function DIEs.
19159 2020-01-20 Martin Liska <mliska@suse.cz>
19161 PR tree-optimization/93199
19162 * tree-eh.c (struct leh_state): Add
19163 new field outer_non_cleanup.
19164 (cleanup_is_dead_in): Pass leh_state instead
19165 of eh_region. Add a checking that state->outer_non_cleanup
19166 points to outer non-clean up region.
19167 (lower_try_finally): Record outer_non_cleanup
19169 (lower_catch): Likewise.
19170 (lower_eh_filter): Likewise.
19171 (lower_eh_must_not_throw): Likewise.
19172 (lower_cleanup): Likewise.
19174 2020-01-20 Richard Biener <rguenther@suse.de>
19176 PR tree-optimization/93094
19177 * tree-vectorizer.h (vect_loop_versioning): Adjust.
19178 (vect_transform_loop): Likewise.
19179 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
19180 loop_vectorized_call to vect_transform_loop.
19181 * tree-vect-loop.c (vect_transform_loop): Pass down
19182 loop_vectorized_call to vect_loop_versioning.
19183 * tree-vect-loop-manip.c (vect_loop_versioning): Use
19184 the earlier discovered loop_vectorized_call.
19186 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
19188 * doc/contribute.texi: Update for SVN -> Git transition.
19189 * doc/install.texi: Likewise.
19191 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
19194 * cgraph.c (cgraph_edge::make_speculative): Increase number of
19195 speculative targets.
19196 (verify_speculative_call): New function
19197 (cgraph_node::verify_node): Use it.
19198 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
19201 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
19204 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
19205 (cgraph_edge::make_direct): Remove all indirect targets.
19206 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
19207 (cgraph_node::verify_node): Verify that only one call_stmt or
19208 lto_stmt_uid is set.
19209 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
19211 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
19212 (lto_output_ref): Simplify streaming of stmt.
19213 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
19215 2020-01-18 Tamar Christina <tamar.christina@arm.com>
19217 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
19218 Mark parameter unused.
19220 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
19222 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
19224 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
19226 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
19228 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
19230 * Makefile.in: Add coroutine-passes.o.
19231 * builtin-types.def (BT_CONST_SIZE): New.
19232 (BT_FN_BOOL_PTR): New.
19233 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
19234 * builtins.def (DEF_COROUTINE_BUILTIN): New.
19235 * coroutine-builtins.def: New file.
19236 * coroutine-passes.cc: New file.
19237 * function.h (struct GTY function): Add a bit to indicate that the
19238 function is a coroutine component.
19239 * internal-fn.c (expand_CO_FRAME): New.
19240 (expand_CO_YIELD): New.
19241 (expand_CO_SUSPN): New.
19242 (expand_CO_ACTOR): New.
19243 * internal-fn.def (CO_ACTOR): New.
19247 * passes.def: Add pass_coroutine_lower_builtins,
19248 pass_coroutine_early_expand_ifns.
19249 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
19250 (make_pass_coroutine_early_expand_ifns): New.
19251 * doc/invoke.texi: Document the fcoroutines command line
19254 2020-01-18 Jakub Jelinek <jakub@redhat.com>
19256 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
19259 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
19260 after checking the argument is a REG. Don't use REGNO (reg)
19261 again to set last_regno, reuse regno variable instead.
19263 2020-01-17 David Malcolm <dmalcolm@redhat.com>
19265 * doc/analyzer.texi (Limitations): Add note about NaN.
19267 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19268 Sudakshina Das <sudi.das@arm.com>
19270 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
19271 and valid immediate.
19272 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
19273 (lshrdi3): Generate thumb2_lsrl for valid immediates.
19274 * config/arm/constraints.md (Pg): New.
19275 * config/arm/predicates.md (long_shift_imm): New.
19276 (arm_reg_or_long_shift_imm): Likewise.
19277 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
19278 (thumb2_lsll): Likewise.
19279 (thumb2_lsrl): New.
19281 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19282 Sudakshina Das <sudi.das@arm.com>
19284 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
19285 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
19286 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
19287 register pairs for doubleword quantities for ARMv8.1M-Mainline.
19288 * config/arm/thumb2.md (thumb2_asrl): New.
19289 (thumb2_lsll): Likewise.
19291 2020-01-17 Jakub Jelinek <jakub@redhat.com>
19293 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
19296 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
19298 * gdbinit.in (help-gcc-hooks): New command.
19299 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
19300 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
19303 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
19305 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
19306 correct target macro.
19308 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
19310 * config/aarch64/aarch64-protos.h
19311 (aarch64_sve_ld1ro_operand_p): New.
19312 * config/aarch64/aarch64-sve-builtins-base.cc
19313 (class load_replicate): New.
19314 (class svld1ro_impl): New.
19315 (class svld1rq_impl): Change to inherit from load_replicate.
19316 (svld1ro): New sve intrinsic function base.
19317 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
19318 New DEF_SVE_FUNCTION.
19319 * config/aarch64/aarch64-sve-builtins-base.h
19320 (svld1ro): New decl.
19321 * config/aarch64/aarch64-sve-builtins.cc
19322 (function_expander::add_mem_operand): Modify assert to allow
19324 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
19326 * config/aarch64/aarch64.c
19327 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
19328 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
19329 (aarch64_sve_ld1ro_operand_p): New.
19330 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
19331 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
19332 * config/aarch64/predicates.md
19333 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
19335 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
19337 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
19338 Introduce this ACLE specified predefined macro.
19339 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
19340 (fp): Disabling this disables f64mm.
19341 (simd): Disabling this disables f64mm.
19342 (fp16): Disabling this disables f64mm.
19343 (sve): Disabling this disables f64mm.
19344 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
19345 (AARCH64_ISA_F64MM): New.
19346 (TARGET_F64MM): New.
19347 * doc/invoke.texi (f64mm): Document new option.
19349 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
19351 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
19352 (neoversen1_tunings): Likewise.
19354 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
19357 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
19358 Add assert to ensure prolog has been emitted.
19359 (aarch64_split_atomic_op): Likewise.
19360 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
19361 Use epilogue_completed rather than reload_completed.
19362 (aarch64_atomic_exchange<mode>): Likewise.
19363 (aarch64_atomic_<atomic_optab><mode>): Likewise.
19364 (atomic_nand<mode>): Likewise.
19365 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
19366 (atomic_fetch_nand<mode>): Likewise.
19367 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
19368 (atomic_nand_fetch<mode>): Likewise.
19370 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
19373 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
19375 (REVERSE_CONDITION): Delete.
19376 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
19377 (CCFP_CCFPE): Likewise.
19378 (e): New mode attribute.
19379 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
19380 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
19381 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
19382 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
19383 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
19384 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
19385 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
19386 name of generator from gen_ccmpdi to gen_ccmpccdi.
19387 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
19388 the previous comparison but aren't able to, use the new ccmp_rev
19391 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
19393 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
19394 than testing directly for INTEGER_CST.
19395 (gimplify_target_expr, gimplify_omp_depend): Likewise.
19397 2020-01-17 Jakub Jelinek <jakub@redhat.com>
19399 PR tree-optimization/93292
19400 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
19401 get_vectype_for_scalar_type returns NULL.
19403 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
19405 * params.opt (-param=max-predicted-iterations): Increase range from 0.
19406 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
19408 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
19410 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
19412 * params.opt: (max-predicted-iterations): Set bounds.
19413 * predict.c (real_almost_one, real_br_prob_base,
19414 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
19415 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
19416 probabilities; do not truncate to reg_br_prob_bases.
19417 (estimate_loops_at_level): Pass max_cyclic_prob.
19418 (estimate_loops): Compute max_cyclic_prob.
19419 (estimate_bb_frequencies): Do not initialize real_*; update calculation
19421 * profile-count.c (profile_probability::to_sreal): New.
19422 * profile-count.h (class sreal): Move up in file.
19423 (profile_probability::to_sreal): Declare.
19425 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19428 (arm_invalid_conversion): New function for target hook.
19429 (arm_invalid_unary_op): New function for target hook.
19430 (arm_invalid_binary_op): New function for target hook.
19432 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19434 * config.gcc: Add arm_bf16.h.
19435 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
19436 (arm_simd_builtin_std_type): Add BFmode.
19437 (arm_init_simd_builtin_types): Define element types for vector types.
19438 (arm_init_bf16_types): New function.
19439 (arm_init_builtins): Add arm_init_bf16_types function call.
19440 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
19441 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
19442 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
19443 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
19444 (arm_vector_mode_supported_p): Add V4BF, V8BF.
19445 (arm_mangle_type): Add __bf16.
19446 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
19447 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
19448 arm_bf16_ptr_type_node.
19449 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
19450 define_split between ARM registers.
19451 * config/arm/arm_bf16.h: New file.
19452 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
19453 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
19454 (VQXMOV): Add V8BF.
19455 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
19456 * config/arm/vfp.md: Add BFmode to movhf patterns.
19458 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
19459 Andre Vieira <andre.simoesdiasvieira@arm.com>
19461 * config/arm/arm-cpus.in (mve, mve_float): New features.
19462 (dsp, mve, mve.fp): New options.
19463 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
19464 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
19465 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
19467 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19468 Thomas Preud'homme <thomas.preudhomme@arm.com>
19470 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
19472 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
19473 error for using -mcmse when targeting Armv8.1-M Mainline.
19475 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19476 Thomas Preud'homme <thomas.preudhomme@arm.com>
19478 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
19479 address in r4 when targeting Armv8.1-M Mainline.
19480 (nonsecure_call_value_internal): Likewise.
19481 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
19482 a register match_operand again. Emit BLXNS when targeting
19483 Armv8.1-M Mainline.
19484 (nonsecure_call_value_reg_thumb2): Likewise.
19486 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19487 Thomas Preud'homme <thomas.preudhomme@arm.com>
19489 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
19490 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
19491 variable as true when floating-point ABI is not hard. Replace
19492 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
19493 Generate VLSTM and VLLDM instruction respectively before and
19494 after a function call to cmse_nonsecure_call function.
19495 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
19496 (VUNSPEC_VLLDM): Likewise.
19497 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
19498 (lazy_load_multiple_insn): Likewise.
19500 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19501 Thomas Preud'homme <thomas.preudhomme@arm.com>
19503 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
19504 (arm_emit_vfp_multi_reg_pop): Likewise.
19505 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
19506 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
19507 restore callee-saved VFP registers.
19509 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19510 Thomas Preud'homme <thomas.preudhomme@arm.com>
19512 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
19513 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
19514 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
19515 callee-saved GPRs as well as clear ip register before doing a nonsecure
19516 call then restore callee-saved GPRs after it when targeting
19517 Armv8.1-M Mainline.
19518 (arm_reorg): Adapt to function rename.
19520 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19521 Thomas Preud'homme <thomas.preudhomme@arm.com>
19523 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
19524 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
19525 clear_vfp_multiple pattern based on a new vfp parameter.
19526 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
19527 targeting Armv8.1-M Mainline.
19528 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
19529 unconditionally when targeting Armv8.1-M Mainline architecture. Check
19530 whether VFP registers are available before looking call_used_regs for a
19532 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
19533 of prototype of clear_operation_p.
19534 (clear_vfp_multiple_operation): New predicate.
19535 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
19536 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
19538 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19539 Thomas Preud'homme <thomas.preudhomme@arm.com>
19541 * config/arm/arm-protos.h (clear_operation_p): Declare.
19542 * config/arm/arm.c (clear_operation_p): New function.
19543 (cmse_clear_registers): Generate clear_multiple instruction pattern if
19544 targeting Armv8.1-M Mainline or successor.
19545 (output_return_instruction): Only output APSR register clearing if
19546 Armv8.1-M Mainline instructions not available.
19547 (thumb_exit): Likewise.
19548 * config/arm/predicates.md (clear_multiple_operation): New predicate.
19549 * config/arm/thumb2.md (clear_apsr): New define_insn.
19550 (clear_multiple): Likewise.
19551 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
19553 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19554 Thomas Preud'homme <thomas.preudhomme@arm.com>
19556 * config/arm/arm.c (fp_sysreg_names): Declare and define.
19557 (use_return_insn): Also return false for Armv8.1-M Mainline.
19558 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
19559 Mainline instructions are available.
19560 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
19561 when targeting Armv8.1-M Mainline Security Extensions.
19562 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
19563 Mainline entry function.
19564 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
19565 targeting Armv8.1-M Mainline or successor.
19566 (arm_expand_epilogue): Fix indentation of caller-saved register
19567 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
19569 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
19570 (FP_SYSREGS): Likewise.
19571 (enum vfp_sysregs_encoding): Define enum.
19572 (fp_sysreg_names): Declare.
19573 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
19574 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
19575 (pop_fpsysreg_insn): Likewise.
19577 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19578 Thomas Preud'homme <thomas.preudhomme@arm.com>
19580 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
19581 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
19582 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
19583 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
19584 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
19585 (ARMv8_1m_main): New feature group.
19586 (armv8.1-m.main): New architecture.
19587 * config/arm/arm-tables.opt: Regenerate.
19588 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
19589 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
19590 (arm_options_perform_arch_sanity_checks): Error out when targeting
19591 Armv8.1-M Mainline Security Extensions.
19592 * config/arm/arm.h (arm_arch8_1m_main): Declare.
19594 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19596 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
19597 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
19598 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
19599 aarch64_bfdot_laneq): New.
19600 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
19601 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
19602 vbfdotq_laneq_f32): New.
19603 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
19604 VBFMLA_W, VBF): New.
19605 (isquadop): Add V4BF, V8BF.
19607 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19609 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
19610 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
19611 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
19612 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
19613 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
19614 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
19615 usdot_laneq, sudot_lane,sudot_laneq): New.
19616 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
19617 (aarch64_<sur>dot_lane): New.
19618 * config/aarch64/arm_neon.h (vusdot_s32): New.
19619 (vusdotq_s32): New.
19620 (vusdot_lane_s32): New.
19621 (vsudot_lane_s32): New.
19622 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
19623 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
19625 2020-01-16 Martin Liska <mliska@suse.cz>
19627 * value-prof.c (dump_histogram_value): Fix
19628 obvious spacing issue.
19630 2020-01-16 Andrew Pinski <apinski@marvell.com>
19632 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
19633 !storage_order_barrier_p.
19635 2020-01-16 Andrew Pinski <apinski@marvell.com>
19637 * sched-int.h (_dep): Add unused bit-field field for the padding.
19638 * sched-deps.c (init_dep_1): Init unused field.
19640 2020-01-16 Andrew Pinski <apinski@marvell.com>
19642 * optabs.h (create_expand_operand): Initialize target field also.
19644 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19646 PR tree-optimization/92429
19647 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
19648 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
19650 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
19653 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
19655 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
19656 aarch64_sve_int_mode to each mode.
19658 2020-01-15 David Malcolm <dmalcolm@redhat.com>
19660 * doc/analyzer.texi (Overview): Add note about
19661 -fdump-ipa-analyzer.
19663 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
19665 PR tree-optimization/93231
19666 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
19667 input_type is unsigned. Use tree_to_shwi for shift constant.
19668 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
19669 (simplify_count_trailing_zeroes): Add test to handle known non-zero
19670 inputs more efficiently.
19672 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
19674 * config/i386/i386.md (*movsf_internal): Do not require
19675 SSE2 ISA for alternatives 14 and 15.
19677 2020-01-15 Richard Biener <rguenther@suse.de>
19679 PR middle-end/93273
19680 * tree-eh.c (sink_clobbers): If we already visited the destination
19681 block do not defer insertion.
19682 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
19683 the purpose of defered insertion.
19685 2020-01-15 Jakub Jelinek <jakub@redhat.com>
19687 * BASE-VER: Bump to 10.0.1.
19689 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
19691 PR tree-optimization/93247
19692 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
19693 type of the stmt that we're going to vectorize.
19695 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
19697 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
19698 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
19701 2020-01-15 Martin Liska <mliska@suse.cz>
19703 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
19704 2 calls of streamer_read_hwi in a function call.
19706 2020-01-15 Richard Biener <rguenther@suse.de>
19708 * alias.c (record_alias_subset): Avoid redundant work when
19709 subset is already recorded.
19711 2020-01-14 David Malcolm <dmalcolm@redhat.com>
19713 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
19714 the analyzer options provide CWE identifiers.
19716 2020-01-14 David Malcolm <dmalcolm@redhat.com>
19718 * tree-diagnostic-path.cc (path_summary::event_range::print):
19719 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
19720 using get_pure_location.
19722 2020-01-15 Jakub Jelinek <jakub@redhat.com>
19724 PR tree-optimization/93262
19725 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
19726 perform head trimming only if the last argument is constant,
19727 either all ones, or larger or equal to head trim, in the latter
19728 case decrease the last argument by head_trim.
19730 PR tree-optimization/93249
19731 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
19732 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
19733 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
19734 perform head trim unless we can prove there are no '\0' chars
19735 from the source among the first head_trim chars.
19737 2020-01-14 David Malcolm <dmalcolm@redhat.com>
19739 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
19741 2020-01-15 Jakub Jelinek <jakub@redhat.com>
19744 * config/i386/sse.md
19745 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
19746 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
19747 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
19748 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
19749 just a single alternative instead of two, make operands 1 and 2
19752 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
19755 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
19758 2020-01-14 David Malcolm <dmalcolm@redhat.com>
19760 * Makefile.in (lang_opt_files): Add analyzer.opt.
19761 (ANALYZER_OBJS): New.
19762 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
19763 tristate.o and ANALYZER_OBJS.
19764 (TEXI_GCCINT_FILES): Add analyzer.texi.
19765 * common.opt (-fanalyzer): New driver option.
19766 * config.in: Regenerate.
19767 * configure: Regenerate.
19768 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
19769 (gccdepdir): Also create depdir for "analyzer" subdir.
19770 * digraph.cc: New file.
19771 * digraph.h: New file.
19772 * doc/analyzer.texi: New file.
19773 * doc/gccint.texi ("Static Analyzer") New menu item.
19774 (analyzer.texi): Include it.
19775 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
19776 ("Warning Options"): Add static analysis warnings to the list.
19777 (-Wno-analyzer-double-fclose): New option.
19778 (-Wno-analyzer-double-free): New option.
19779 (-Wno-analyzer-exposure-through-output-file): New option.
19780 (-Wno-analyzer-file-leak): New option.
19781 (-Wno-analyzer-free-of-non-heap): New option.
19782 (-Wno-analyzer-malloc-leak): New option.
19783 (-Wno-analyzer-possible-null-argument): New option.
19784 (-Wno-analyzer-possible-null-dereference): New option.
19785 (-Wno-analyzer-null-argument): New option.
19786 (-Wno-analyzer-null-dereference): New option.
19787 (-Wno-analyzer-stale-setjmp-buffer): New option.
19788 (-Wno-analyzer-tainted-array-index): New option.
19789 (-Wno-analyzer-use-after-free): New option.
19790 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
19791 (-Wno-analyzer-use-of-uninitialized-value): New option.
19792 (-Wanalyzer-too-complex): New option.
19793 (-fanalyzer-call-summaries): New warning.
19794 (-fanalyzer-checker=): New warning.
19795 (-fanalyzer-fine-grained): New warning.
19796 (-fno-analyzer-state-merge): New warning.
19797 (-fno-analyzer-state-purge): New warning.
19798 (-fanalyzer-transitivity): New warning.
19799 (-fanalyzer-verbose-edges): New warning.
19800 (-fanalyzer-verbose-state-changes): New warning.
19801 (-fanalyzer-verbosity=): New warning.
19802 (-fdump-analyzer): New warning.
19803 (-fdump-analyzer-callgraph): New warning.
19804 (-fdump-analyzer-exploded-graph): New warning.
19805 (-fdump-analyzer-exploded-nodes): New warning.
19806 (-fdump-analyzer-exploded-nodes-2): New warning.
19807 (-fdump-analyzer-exploded-nodes-3): New warning.
19808 (-fdump-analyzer-supergraph): New warning.
19809 * doc/sourcebuild.texi (dg-require-dot): New.
19810 (dg-check-dot): New.
19811 * gdbinit.in (break-on-saved-diagnostic): New command.
19812 * graphviz.cc: New file.
19813 * graphviz.h: New file.
19814 * ordered-hash-map-tests.cc: New file.
19815 * ordered-hash-map.h: New file.
19816 * passes.def (pass_analyzer): Add before
19817 pass_ipa_whole_program_visibility.
19818 * selftest-run-tests.c (selftest::run_tests): Call
19819 selftest::ordered_hash_map_tests_cc_tests.
19820 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
19822 * shortest-paths.h: New file.
19823 * timevar.def (TV_ANALYZER): New timevar.
19824 (TV_ANALYZER_SUPERGRAPH): Likewise.
19825 (TV_ANALYZER_STATE_PURGE): Likewise.
19826 (TV_ANALYZER_PLAN): Likewise.
19827 (TV_ANALYZER_SCC): Likewise.
19828 (TV_ANALYZER_WORKLIST): Likewise.
19829 (TV_ANALYZER_DUMP): Likewise.
19830 (TV_ANALYZER_DIAGNOSTICS): Likewise.
19831 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
19832 * tree-pass.h (make_pass_analyzer): New decl.
19833 * tristate.cc: New file.
19834 * tristate.h: New file.
19836 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
19839 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
19840 alternatives 9 and 10.
19842 2020-01-14 David Malcolm <dmalcolm@redhat.com>
19844 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
19845 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
19846 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
19847 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
19848 (selftest::hash_map_tests_c_tests): Call it.
19849 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
19850 New static constant, using the value of = H::empty_zero_p.
19851 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
19852 from default_hash_traits <Value>.
19853 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
19855 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
19856 * hash-table.h (hash_table::alloc_entries): Guard the loop of
19857 calls to mark_empty with !Descriptor::empty_zero_p.
19858 (hash_table::empty_slow): Conditionalize the memset call with a
19859 check that Descriptor::empty_zero_p; otherwise, loop through the
19860 entries calling mark_empty on them.
19861 * hash-traits.h (int_hash::empty_zero_p): New static constant.
19862 (pointer_hash::empty_zero_p): Likewise.
19863 (pair_hash::empty_zero_p): Likewise.
19864 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
19866 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
19867 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
19868 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
19869 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
19870 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
19871 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
19872 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
19873 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
19874 * tree-vectorizer.h
19875 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
19878 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
19880 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
19881 fix typo on return value.
19883 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
19886 * cgraph.c (symbol_table::create_edge): Init speculative_id and
19888 (cgraph_edge::make_speculative): Add param for setting speculative_id
19890 (cgraph_edge::speculative_call_info): Update comments and find reference
19891 by speculative_id for multiple indirect targets.
19892 (cgraph_edge::resolve_speculation): Decrease the speculations
19893 for indirect edge, drop it's speculative if not direct target
19894 left. Update comments.
19895 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
19896 (cgraph_node::dump): Print num_speculative_call_targets.
19897 (cgraph_node::verify_node): Don't report error if speculative
19898 edge not include statement.
19899 (cgraph_edge::num_speculative_call_targets_p): New function.
19900 * cgraph.h (int common_target_id): Remove.
19901 (int common_target_probability): Remove.
19902 (num_speculative_call_targets): New variable.
19903 (make_speculative): Add param for setting speculative_id.
19904 (cgraph_edge::num_speculative_call_targets_p): New declare.
19905 (target_prob): New variable.
19906 (speculative_id): New variable.
19907 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
19908 call summaries for multiple speculative call targets.
19909 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
19910 * ipa-profile.c (struct speculative_call_target): New struct.
19911 (class speculative_call_summary): New class.
19912 (class speculative_call_summaries): New class.
19913 (call_sums): New variable.
19914 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
19915 (ipa_profile_write_edge_summary): New function.
19916 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
19917 (ipa_profile_dump_all_summaries): New function.
19918 (ipa_profile_read_edge_summary): New function.
19919 (ipa_profile_read_summary_section): New function.
19920 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
19921 (ipa_profile): Generate num_speculative_call_targets from
19923 * ipa-ref.h (speculative_id): New variable.
19924 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
19925 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
19926 common_target_probability. Stream out speculative_id and
19927 num_speculative_call_targets.
19928 (input_edge): Likewise.
19929 * predict.c (dump_prediction): Remove edges count assert to be
19931 * symtab.c (symtab_node::create_reference): Init speculative_id.
19932 (symtab_node::clone_references): Clone speculative_id.
19933 (symtab_node::clone_referring): Clone speculative_id.
19934 (symtab_node::clone_reference): Clone speculative_id.
19935 (symtab_node::clear_stmts_in_references): Clear speculative_id.
19936 * tree-inline.c (copy_bb): Duplicate all the speculative edges
19937 if indirect call contains multiple speculative targets.
19938 * value-prof.h (check_ic_target): Remove.
19939 * value-prof.c (gimple_value_profile_transformations):
19940 Use void function gimple_ic_transform.
19941 * value-prof.c (gimple_ic_transform): Handle topn case.
19942 Fix comment typos. Change it to a void function.
19944 2020-01-13 Andrew Pinski <apinski@marvell.com>
19946 * config/aarch64/aarch64-cores.def (octeontx2): New define.
19947 (octeontx2t98): New define.
19948 (octeontx2t96): New define.
19949 (octeontx2t93): New define.
19950 (octeontx2f95): New define.
19951 (octeontx2f95n): New define.
19952 (octeontx2f95mm): New define.
19953 * config/aarch64/aarch64-tune.md: Regenerate.
19954 * doc/invoke.texi (-mcpu=): Document the new cpu types.
19956 2020-01-13 Jason Merrill <jason@redhat.com>
19958 PR c++/33799 - destroy return value if local cleanup throws.
19959 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
19961 2020-01-13 Martin Liska <mliska@suse.cz>
19963 * ipa-cp.c (get_max_overall_size): Use newly
19964 renamed param param_ipa_cp_unit_growth.
19965 * params.opt: Remove legacy param name.
19967 2020-01-13 Martin Sebor <msebor@redhat.com>
19969 PR tree-optimization/93213
19970 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
19971 stores to be eliminated.
19973 2020-01-13 Martin Liska <mliska@suse.cz>
19975 * opts.c (print_help): Do not print CL_PARAM
19976 and CL_WARNING for CL_OPTIMIZATION.
19978 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
19981 * doc/invoke.texi (Warning Options): Add caveat about some warnings
19982 depending on optimization settings.
19984 2020-01-13 Jakub Jelinek <jakub@redhat.com>
19986 PR tree-optimization/90838
19987 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
19988 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
19989 argument rather than to initialize temporary for targets that
19990 don't use the mode argument at all. Initialize ctzval to avoid
19993 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
19995 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
19996 * tree-core.h: Document it.
19997 * gimplify.c (gimplify_omp_workshare): Set it.
19998 * omp-low.c (lower_omp_target): Use it.
19999 * tree-pretty-print.c (dump_omp_clause): Print it.
20001 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
20002 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
20004 2020-01-10 David Malcolm <dmalcolm@redhat.com>
20006 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
20007 * common.opt (fdiagnostics-path-format=): New option.
20008 (diagnostic_path_format): New enum.
20009 (fdiagnostics-show-path-depths): New option.
20010 * coretypes.h (diagnostic_event_id_t): New forward decl.
20011 * diagnostic-color.c (color_dict): Add "path".
20012 * diagnostic-event-id.h: New file.
20013 * diagnostic-format-json.cc (json_from_expanded_location): Make
20015 (json_end_diagnostic): Call context->make_json_for_path if it
20016 exists and the diagnostic has a path.
20017 (diagnostic_output_format_init): Clear context->print_path.
20018 * diagnostic-path.h: New file.
20019 * diagnostic-show-locus.c (colorizer::set_range): Special-case
20020 when printing a run of events in a diagnostic_path so that they
20021 all get the same color.
20022 (layout::m_diagnostic_path_p): New field.
20023 (layout::layout): Initialize it.
20024 (layout::print_any_labels): Don't colorize the label text for an
20025 event in a diagnostic_path.
20026 (gcc_rich_location::add_location_if_nearby): Add
20027 "restrict_to_current_line_spans" and "label" params. Pass the
20028 former to layout.maybe_add_location_range; pass the latter
20029 when calling add_range.
20030 * diagnostic.c: Include "diagnostic-path.h".
20031 (diagnostic_initialize): Initialize context->path_format and
20032 context->show_path_depths.
20033 (diagnostic_show_any_path): New function.
20034 (diagnostic_path::interprocedural_p): New function.
20035 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
20036 (simple_diagnostic_path::num_events): New function.
20037 (simple_diagnostic_path::get_event): New function.
20038 (simple_diagnostic_path::add_event): New function.
20039 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
20040 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
20041 (debug): New overload taking a diagnostic_path *.
20042 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
20043 * diagnostic.h (enum diagnostic_path_format): New enum.
20044 (json::value): New forward decl.
20045 (diagnostic_context::path_format): New field.
20046 (diagnostic_context::show_path_depths): New field.
20047 (diagnostic_context::print_path): New callback field.
20048 (diagnostic_context::make_json_for_path): New callback field.
20049 (diagnostic_show_any_path): New decl.
20050 (json_from_expanded_location): New decl.
20051 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
20052 (-fdiagnostics-show-path-depths): New option.
20053 (-fdiagnostics-color): Add "path" to description of default
20054 GCC_COLORS; describe it.
20055 (-fdiagnostics-format=json): Document how diagnostic paths are
20056 represented in the JSON output format.
20057 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
20058 Add optional params "restrict_to_current_line_spans" and "label".
20059 * opts.c (common_handle_option): Handle
20060 OPT_fdiagnostics_path_format_ and
20061 OPT_fdiagnostics_show_path_depths.
20062 * pretty-print.c: Include "diagnostic-event-id.h".
20063 (pp_format): Implement "%@" format code for printing
20064 diagnostic_event_id_t *.
20065 (selftest::test_pp_format): Add tests for "%@".
20066 * selftest-run-tests.c (selftest::run_tests): Call
20067 selftest::tree_diagnostic_path_cc_tests.
20068 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
20069 * toplev.c (general_init): Initialize global_dc->path_format and
20070 global_dc->show_path_depths.
20071 * tree-diagnostic-path.cc: New file.
20072 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
20073 non-static. Drop "diagnostic" param in favor of storing the
20074 original value of "where" and re-using it.
20075 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
20076 maybe_unwind_expanded_macro_loc.
20077 (tree_diagnostics_defaults): Initialize context->print_path and
20078 context->make_json_for_path.
20079 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
20081 (default_tree_make_json_for_path): New decl.
20082 (maybe_unwind_expanded_macro_loc): New decl.
20084 2020-01-10 Jakub Jelinek <jakub@redhat.com>
20086 PR tree-optimization/93210
20087 * fold-const.h (native_encode_initializer,
20088 can_native_interpret_type_p): Declare.
20089 * fold-const.c (native_encode_string): Fix up handling with off != -1,
20091 (native_encode_initializer): New function, moved from dwarf2out.c.
20092 Adjust to native_encode_expr compatible arguments, including dry-run
20093 and partial extraction modes. Don't handle STRING_CST.
20094 (can_native_interpret_type_p): No longer static.
20095 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
20096 offset / BITS_PER_UNIT fits into int and don't call it if
20097 can_native_interpret_type_p fails. If suboff is NULL and for
20098 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
20099 native_encode_initializer.
20100 (fold_const_aggregate_ref_1): Formatting fix.
20101 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
20102 (tree_add_const_value_attribute): Adjust caller.
20104 PR tree-optimization/90838
20105 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
20106 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
20107 CTZ_DEFINED_VALUE_AT_ZERO.
20109 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
20111 PR inline-asm/93027
20112 * lra-constraints.c (match_reload): Permit input operands have the
20113 same mode as output while other input operands have a different
20116 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
20118 PR tree-optimization/90838
20119 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
20120 (check_ctz_string): Likewise.
20121 (optimize_count_trailing_zeroes): Likewise.
20122 (simplify_count_trailing_zeroes): Likewise.
20123 (pass_forwprop::execute): Try ctz simplification.
20124 * match.pd: Add matching for ctz idioms.
20126 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20128 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
20130 (aarch64_invalid_unary_op): New function for target hook.
20131 (aarch64_invalid_binary_op): New function for target hook.
20133 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20135 * config.gcc: Add arm_bf16.h.
20136 * config/aarch64/aarch64-builtins.c
20137 (aarch64_simd_builtin_std_type): Add BFmode.
20138 (aarch64_init_simd_builtin_types): Define element types for vector
20140 (aarch64_init_bf16_types): New function.
20141 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
20142 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
20144 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
20145 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
20147 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
20148 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
20149 * config/aarch64/aarch64.c
20150 (aarch64_classify_vector_mode): Add support for BF types.
20151 (aarch64_gimplify_va_arg_expr): Add support for BF types.
20152 (aarch64_vq_mode): Add support for BF types.
20153 (aarch64_simd_container_mode): Add support for BF types.
20154 (aarch64_mangle_type): Add support for BF scalar type.
20155 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
20156 * config/aarch64/arm_bf16.h: New file.
20157 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
20158 * config/aarch64/iterators.md: Add BF types to mode attributes.
20159 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
20161 2020-01-10 Jason Merrill <jason@redhat.com>
20163 PR c++/93173 - incorrect tree sharing.
20164 * gimplify.c (copy_if_shared): No longer static.
20165 * gimplify.h: Declare it.
20167 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20169 * doc/invoke.texi (-msve-vector-bits=): Document that
20170 -msve-vector-bits=128 now generates VL-specific code for
20171 little-endian targets.
20172 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
20173 build_vector_type_for_mode to construct the data vector types.
20174 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
20175 VL-specific code for -msve-vector-bits=128 on little-endian targets.
20176 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
20177 for 128-bit vectors.
20179 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20181 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
20184 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20186 * config/aarch64/aarch64-builtins.c
20187 (aarch64_builtin_vectorized_function): Check for specific vector modes,
20188 rather than checking the number of elements and the element mode.
20190 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20192 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
20193 get_related_vectype_for_scalar_type rather than build_vector_type
20194 to create the index type for a conditional reduction.
20196 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
20198 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
20199 for any type of gather or scatter, including strided accesses.
20201 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
20203 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
20206 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
20208 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
20209 get_dr_vinfo_offset
20210 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
20211 parameter and its use to reset DR_OFFSET's.
20212 (vect_transform_loop): Remove orig_drs_init argument.
20213 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
20214 member of dr_vec_info rather than the offset of the associated
20215 data_reference's innermost_loop_behavior.
20216 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
20217 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
20218 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
20219 get_dr_vinfo_offset.
20220 (vectorizable_store): Likewise.
20221 (vectorizable_load): Likewise.
20223 2020-01-10 Richard Biener <rguenther@suse.de>
20225 * gimple-ssa-store-merging
20226 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
20228 2020-01-10 Martin Liska <mliska@suse.cz>
20231 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
20232 encapsulation that was there before r280040.
20234 2020-01-10 Richard Biener <rguenther@suse.de>
20236 PR middle-end/93199
20237 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
20238 sequences to avoid walking them again for secondary opportunities.
20239 (pass_lower_eh_dispatch::execute): Instead actually insert
20242 2020-01-10 Richard Biener <rguenther@suse.de>
20244 PR middle-end/93199
20245 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
20246 (cleanup_all_empty_eh): Walk landing pads in reverse order to
20247 avoid quadraticness.
20249 2020-01-10 Martin Jambor <mjambor@suse.cz>
20251 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
20252 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
20253 to get param_ipa_sra_max_replacements.
20254 (param_splitting_across_edge): Pass the caller to
20255 pull_accesses_from_callee.
20257 2020-01-10 Martin Jambor <mjambor@suse.cz>
20259 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
20260 * ipa-cp.c (max_new_size): Removed.
20261 (orig_overall_size): New variable.
20262 (get_max_overall_size): New function.
20263 (estimate_local_effects): Use it. Adjust dump.
20264 (decide_about_value): Likewise.
20265 (ipcp_propagate_stage): Do not calculate max_new_size, just store
20266 orig_overall_size. Adjust dump.
20267 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
20269 2020-01-10 Martin Jambor <mjambor@suse.cz>
20271 * params.opt (param_ipa_max_agg_items): Mark as Optimization
20272 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
20273 instead of param_ipa_max_agg_items.
20274 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
20275 optimization info for the callee.
20277 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
20279 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
20280 markers if debug_inline_points is false.
20282 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20284 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
20286 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
20287 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
20288 aarch64-sve-builtins-sve2.h.
20289 (aarch64-sve-builtins-sve2.o): New rule.
20290 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
20291 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
20292 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
20293 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
20294 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
20295 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
20297 * config/aarch64/aarch64-sve.md: Update comments with SVE2
20298 instructions that are handled here.
20299 (@cond_asrd<mode>): Generalize to...
20300 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
20301 (*cond_asrd<mode>_2): Generalize to...
20302 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
20303 (*cond_asrd<mode>_z): Generalize to...
20304 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
20305 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
20306 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
20307 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
20308 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
20310 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
20311 (@aarch64_scatter_stnt<mode>): Likewise.
20312 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
20313 (@aarch64_mul_lane_<mode>): Likewise.
20314 (@aarch64_sve_suqadd<mode>_const): Likewise.
20315 (*<sur>h<addsub><mode>): Generalize to...
20316 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
20318 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
20319 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
20320 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
20321 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
20322 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
20323 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
20324 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
20325 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
20326 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
20327 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
20328 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
20329 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
20330 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
20331 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
20332 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
20333 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
20334 (@aarch64_sve2_xar<mode>): Likewise.
20335 (@aarch64_sve2_bcax<mode>): Likewise.
20336 (*aarch64_sve2_eor3<mode>): Rename to...
20337 (@aarch64_sve2_eor3<mode>): ...this.
20338 (@aarch64_sve2_bsl<mode>): New expander.
20339 (@aarch64_sve2_nbsl<mode>): Likewise.
20340 (@aarch64_sve2_bsl1n<mode>): Likewise.
20341 (@aarch64_sve2_bsl2n<mode>): Likewise.
20342 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
20343 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
20344 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
20345 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
20346 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
20347 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
20348 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
20349 (<su>mull<bt><Vwide>): Generalize to...
20350 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
20352 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
20353 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
20354 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
20355 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
20356 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
20357 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
20358 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
20359 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
20360 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
20361 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
20362 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
20363 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
20364 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
20365 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
20366 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
20367 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
20368 (<SHRNB:r>shrnb<mode>): Generalize to...
20369 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
20371 (<SHRNT:r>shrnt<mode>): Generalize to...
20372 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
20374 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
20375 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
20376 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
20377 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
20378 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
20379 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
20380 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
20381 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
20382 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
20383 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
20384 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
20385 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
20386 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
20387 (@aarch64_sve2_cvtnt<mode>): Likewise.
20388 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
20389 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
20390 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
20391 (@aarch64_sve2_cvtxnt<mode>): Likewise.
20392 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
20393 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
20394 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
20395 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
20396 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
20397 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
20398 (@aarch64_sve2_pmul<mode>): Likewise.
20399 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
20400 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
20401 (@aarch64_sve2_tbl2<mode>): Likewise.
20402 (@aarch64_sve2_tbx<mode>): Likewise.
20403 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
20404 (@aarch64_sve2_histcnt<mode>): Likewise.
20405 (@aarch64_sve2_histseg<mode>): Likewise.
20406 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
20407 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
20408 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
20409 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
20410 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
20411 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
20412 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
20413 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
20414 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
20415 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
20416 (SVE2_PMULL_PAIR_I): New mode iterators.
20417 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
20418 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
20419 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
20420 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
20421 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
20422 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
20423 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
20424 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
20425 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
20426 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
20427 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
20428 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
20429 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
20430 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
20431 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
20432 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
20433 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
20434 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
20435 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
20436 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
20437 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
20438 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
20439 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
20440 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
20441 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
20442 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
20443 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
20444 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
20445 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
20446 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
20447 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
20449 (VNARROW, Ventype): New mode attributes.
20450 (Vewtype): Handle VNx2DI. Fix typo in comment.
20451 (VDOUBLE): New mode attribute.
20452 (sve_lane_con): Handle VNx8HI.
20453 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
20454 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
20455 (sve_int_op, sve_int_op_rev): Handle the above codes.
20456 (sve_pred_int_rhs2_operand): Likewise.
20457 (MULLBT, SHRNB, SHRNT): Delete.
20458 (SVE_INT_SHIFT_IMM): New int iterator.
20459 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
20460 and UNSPEC_WHILEHS for TARGET_SVE2.
20461 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
20462 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
20463 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
20464 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
20465 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
20466 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
20467 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
20468 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
20469 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
20470 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
20471 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
20472 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
20473 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
20474 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
20475 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
20476 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
20477 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
20478 (optab): Handle the new unspecs.
20479 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
20481 (lr): Handle the new unspecs.
20483 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
20484 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
20485 (sve_int_qsub_op): New int attributes.
20486 (sve_fp_op, rot): Handle the new unspecs.
20487 * config/aarch64/aarch64-sve-builtins.h
20488 (function_resolver::require_matching_pointer_type): Declare.
20489 (function_resolver::resolve_unary): Add an optional boolean argument.
20490 (function_resolver::finish_opt_n_resolution): Add an optional
20491 type_suffix_index argument.
20492 (gimple_folder::redirect_call): Declare.
20493 (gimple_expander::prepare_gather_address_operands): Add an optional
20495 * config/aarch64/aarch64-sve-builtins.cc: Include
20496 aarch64-sve-builtins-sve2.h.
20497 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
20498 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
20499 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
20500 (TYPES_hsd_integer): Use TYPES_hsd_signed.
20501 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
20502 (TYPES_s_unsigned): Likewise.
20503 (TYPES_s_integer): Use TYPES_s_unsigned.
20504 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
20505 (TYPES_sd_integer): Use them.
20506 (TYPES_d_unsigned): New macro.
20507 (TYPES_d_integer): Use it.
20508 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
20509 (TYPES_cvt_narrow): Likewise.
20510 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
20511 (preds_mx): New variable.
20512 (function_builder::add_overloaded_function): Allow the new feature
20513 set to be more restrictive than the original one.
20514 (function_resolver::infer_pointer_type): Remove qualifiers from
20515 the pointer type before printing it.
20516 (function_resolver::require_matching_pointer_type): New function.
20517 (function_resolver::resolve_sv_displacement): Handle functions
20518 that don't support 32-bit vector indices or svint32_t vector offsets.
20519 (function_resolver::finish_opt_n_resolution): Take the inferred type
20520 as a separate argument.
20521 (function_resolver::resolve_unary): Optionally treat all forms in
20522 the same way as normal merging functions.
20523 (gimple_folder::redirect_call): New function.
20524 (function_expander::prepare_gather_address_operands): Add an argument
20525 that says whether scaled forms are available. If they aren't,
20526 handle scaling of vector indices and don't add the extension and
20528 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
20529 fall back to using cond_* instead.
20530 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
20531 Split out the member variables into...
20532 (rtx_code_function_base): ...this new base class.
20533 (rtx_code_function_rotated): Inherit rtx_code_function_base.
20534 (unspec_based_function): Split out the member variables into...
20535 (unspec_based_function_base): ...this new base class.
20536 (unspec_based_function_rotated): Inherit unspec_based_function_base.
20537 (unspec_based_function_exact_insn): New class.
20538 (unspec_based_add_function, unspec_based_add_lane_function)
20539 (unspec_based_lane_function, unspec_based_pred_function)
20540 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
20541 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
20542 (unspec_based_sub_function, unspec_based_sub_lane_function): New
20544 (unspec_based_fused_function): New class.
20545 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
20546 (unspec_based_fused_lane_function): New class.
20547 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
20549 (CODE_FOR_MODE1): New macro.
20550 (fixed_insn_function): New class.
20551 (while_comparison): Likewise.
20552 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
20553 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
20554 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
20555 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
20556 (load_gather_sv_restricted, shift_left_imm_long): Declare.
20557 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
20558 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
20559 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
20560 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
20561 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
20562 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
20563 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
20564 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
20565 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
20566 Also add an initial argument for unary_convert_narrowt, regardless
20567 of the predication type.
20568 (build_32_64): Allow loads and stores to specify MODE_none.
20569 (build_sv_index64, build_sv_uint_offset): New functions.
20570 (long_type_suffix): New function.
20571 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
20572 (binary_imm_long_base, load_gather_sv_base): Likewise.
20573 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
20574 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
20575 (unary_narrowb_base, unary_narrowt_base): Likewise.
20576 (binary_long_lane_def, binary_long_lane): New shape.
20577 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
20578 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
20579 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
20580 (binary_to_uint_def, binary_to_uint): Likewise.
20581 (binary_wide_def, binary_wide): Likewise.
20582 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
20583 (compare_def, compare): Likewise.
20584 (compare_ptr_def, compare_ptr): Likewise.
20585 (load_ext_gather_index_restricted_def,
20586 load_ext_gather_index_restricted): Likewise.
20587 (load_ext_gather_offset_restricted_def,
20588 load_ext_gather_offset_restricted): Likewise.
20589 (load_gather_sv_def): Inherit from load_gather_sv_base.
20590 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
20591 (shift_left_imm_def, shift_left_imm): Likewise.
20592 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
20593 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
20594 (store_scatter_index_restricted_def,
20595 store_scatter_index_restricted): Likewise.
20596 (store_scatter_offset_restricted_def,
20597 store_scatter_offset_restricted): Likewise.
20598 (tbl_tuple_def, tbl_tuple): Likewise.
20599 (ternary_long_lane_def, ternary_long_lane): Likewise.
20600 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
20601 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
20602 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
20603 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
20604 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
20605 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
20606 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
20607 (ternary_uint_def, ternary_uint): Likewise.
20608 (unary_convert): Fix typo in comment.
20609 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
20610 (unary_long_def, unary_long): Likewise.
20611 (unary_narrowb_def, unary_narrowb): Likewise.
20612 (unary_narrowt_def, unary_narrowt): Likewise.
20613 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
20614 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
20615 (unary_to_int_def, unary_to_int): Likewise.
20616 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
20617 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
20618 (svasrd_impl): Delete.
20619 (svcadd_impl::expand): Handle integer operations too.
20620 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
20621 new functions to derive the unspec numbers.
20622 (svmla_svmls_lane_impl): Replace with...
20623 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
20624 integer operations too.
20625 (svwhile_impl): Rename to...
20626 (svwhilelx_impl): ...this and inherit from while_comparison.
20627 (svasrd): Use unspec_based_function.
20628 (svmla_lane): Use svmla_lane_impl.
20629 (svmls_lane): Use svmls_lane_impl.
20630 (svrecpe, svrsqrte): Handle unsigned integer operations too.
20631 (svwhilele, svwhilelt): Use svwhilelx_impl.
20632 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
20633 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
20634 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
20635 * config/aarch64/aarch64-sve-builtins.def: Include
20636 aarch64-sve-builtins-sve2.def.
20638 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20640 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
20641 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
20642 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
20643 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
20644 immediates as well as vector ones.
20645 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
20646 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
20647 (aarch64_sve_qsub_immediate): Update calls accordingly.
20649 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20651 * config/aarch64/aarch64-sve2.md: Add banner comments.
20652 (<su>mulh<r>s<mode>3): Move further up file.
20653 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
20654 (*aarch64_sve2_sra<mode>): Move further down file.
20655 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
20657 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20659 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
20660 and UNSPEC_WHILEWR.
20661 (while_optab_cmp): Handle them.
20662 * config/aarch64/aarch64-sve.md
20663 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
20664 and add a "@" marker.
20665 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
20666 instead of gen_aarch64_sve2_while_ptest.
20667 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
20669 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20671 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
20672 (UNSPEC_WHILELE): ...this.
20673 (UNSPEC_WHILE_LO): Rename to...
20674 (UNSPEC_WHILELO): ...this.
20675 (UNSPEC_WHILE_LS): Rename to...
20676 (UNSPEC_WHILELS): ...this.
20677 (UNSPEC_WHILE_LT): Rename to...
20678 (UNSPEC_WHILELT): ...this.
20679 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
20680 (cmp_op, while_optab_cmp): Likewise.
20681 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
20682 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
20683 (svwhilelt): Likewise.
20685 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20687 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
20688 (unary_to_uint): Define.
20689 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
20690 (unary_count): Rename to...
20691 (unary_to_uint_def, unary_to_uint): ...this.
20692 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
20694 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20696 * config/aarch64/aarch64-sve-builtins-functions.h
20697 (code_for_mode_function): New class.
20698 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
20699 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
20700 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
20701 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
20702 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
20704 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20706 * config/aarch64/iterators.md (addsub): New code attribute.
20707 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
20709 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
20710 in the asm string and attributes. Fix indentation.
20711 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
20713 (@aarch64_sve_<optab><mode>): ...this.
20714 * config/aarch64/aarch64-sve-builtins.h
20715 (function_expander::expand_signed_unpred_op): Delete.
20716 * config/aarch64/aarch64-sve-builtins.cc
20717 (function_expander::expand_signed_unpred_op): Likewise.
20718 (function_expander::map_to_rtx_codes): If the optab isn't defined,
20719 try using code_for_aarch64_sve instead.
20720 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
20721 (svqsub_impl): Likewise.
20722 (svqadd, svqsub): Use rtx_code_function instead.
20724 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20726 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
20727 (HADDSUB, sur, addsub): Remove them.
20729 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20731 * tree-nrv.c (pass_return_slot::execute): Handle all internal
20732 functions the same way, rather than singling out those that
20733 aren't mapped directly to optabs.
20735 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
20737 * target.def (compatible_vector_types_p): New target hook.
20738 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
20739 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
20740 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
20741 * doc/tm.texi: Regenerate.
20742 * gimple-expr.c: Include target.h.
20743 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
20744 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
20746 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
20747 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
20748 Use the original predicate if it already has a suitable type.
20750 2020-01-09 Martin Jambor <mjambor@suse.cz>
20752 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
20753 resolve_speculation and redirect_call_stmt_to_callee static. Change
20754 return type of set_call_stmt to cgraph_edge *.
20755 * auto-profile.c (afdo_indirect_call): Adjust call to
20756 redirect_call_stmt_to_callee.
20757 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
20758 make the this pointer explicit, adjust self-recursive calls and the
20759 call top make_direct. Return the resulting edge.
20760 (cgraph_edge::remove): Make this pointer explicit.
20761 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
20762 (cgraph_edge::make_direct): Likewise, adjust call to
20763 resolve_speculation.
20764 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
20765 call to set_call_stmt.
20766 (cgraph_update_edges_for_call_stmt_node): Update call to
20767 set_call_stmt and remove.
20768 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
20769 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
20770 (cgraph_node::create_edge_including_clones): Moved "first" definition
20771 of edge to the block where it was used. Adjusted calls to
20773 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
20774 cgraph_edge::remove.
20775 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
20776 make_direct and redirect_call_stmt_to_callee.
20777 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
20778 resolve_speculation and make_direct.
20779 * ipa-inline-transform.c (inline_transform): Adjust call to
20780 redirect_call_stmt_to_callee.
20781 (check_speculations_1):: Adjust call to resolve_speculation.
20782 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
20783 resolve-speculation.
20784 (inline_small_functions): Adjust call to resolve_speculation.
20785 (ipa_inline): Likewise.
20786 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
20788 * ipa-visibility.c (function_and_variable_visibility): Make iteration
20789 safe with regards to edge removal, adjust calls to
20790 redirect_call_stmt_to_callee.
20791 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
20792 and redirect_call_stmt_to_callee.
20793 * multiple_target.c (create_dispatcher_calls): Adjust call to
20794 redirect_call_stmt_to_callee
20795 (redirect_to_specific_clone): Likewise.
20796 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
20797 Adjust calls to cgraph_edge::remove.
20798 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
20799 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
20800 (expand_call_inline): Adjust call to cgraph_edge::remove.
20802 2020-01-09 Martin Liska <mliska@suse.cz>
20804 * params.opt: Set Optimization for
20805 param_max_speculative_devirt_maydefs.
20807 2020-01-09 Martin Sebor <msebor@redhat.com>
20809 PR middle-end/93200
20811 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
20813 2020-01-09 Martin Liska <mliska@suse.cz>
20815 * auto-profile.c (auto_profile): Use opt_for_fn
20817 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
20818 (propagate_vals_across_arith_jfunc): Likewise.
20819 (hint_time_bonus): Likewise.
20820 (incorporate_penalties): Likewise.
20821 (good_cloning_opportunity_p): Likewise.
20822 (perform_estimation_of_a_value): Likewise.
20823 (estimate_local_effects): Likewise.
20824 (ipcp_propagate_stage): Likewise.
20825 * ipa-fnsummary.c (decompose_param_expr): Likewise.
20826 (set_switch_stmt_execution_predicate): Likewise.
20827 (analyze_function_body): Likewise.
20828 * ipa-inline-analysis.c (offline_size): Likewise.
20829 * ipa-inline.c (early_inliner): Likewise.
20830 * ipa-prop.c (ipa_analyze_node): Likewise.
20831 (ipcp_transform_function): Likewise.
20832 * ipa-sra.c (process_scan_results): Likewise.
20833 (ipa_sra_summarize_function): Likewise.
20834 * params.opt: Rename ipcp-unit-growth to
20835 ipa-cp-unit-growth. Add Optimization for various
20836 IPA-related parameters.
20838 2020-01-09 Richard Biener <rguenther@suse.de>
20840 PR middle-end/93054
20841 * gimplify.c (gimplify_expr): Deal with NOP definitions.
20843 2020-01-09 Richard Biener <rguenther@suse.de>
20845 PR tree-optimization/93040
20846 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
20848 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
20850 * common/config/avr/avr-common.c (avr_option_optimization_table)
20851 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
20853 2020-01-09 Martin Liska <mliska@suse.cz>
20855 * cgraphclones.c (symbol_table::materialize_all_clones):
20856 Use cgraph_node::dump_name.
20858 2020-01-09 Jakub Jelinek <jakub@redhat.com>
20860 PR inline-asm/93202
20861 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
20862 output_operand_lossage instead of gcc_unreachable.
20863 * doc/md.texi (riscv f constraint): Fix typo.
20866 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
20867 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
20868 CONST_SCALAR_INT_P instead of CONST_INT_P.
20869 (*subv<mode>4_1): Rename to ...
20870 (subv<mode>4_1): ... this.
20871 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
20872 define_insn_and_split patterns.
20873 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
20876 2020-01-08 David Malcolm <dmalcolm@redhat.com>
20878 * vec.c (class selftest::count_dtor): New class.
20879 (selftest::test_auto_delete_vec): New test.
20880 (selftest::vec_c_tests): Call it.
20881 * vec.h (class auto_delete_vec): New class template.
20882 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
20884 2020-01-08 David Malcolm <dmalcolm@redhat.com>
20886 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
20888 2020-01-08 Jim Wilson <jimw@sifive.com>
20890 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
20891 use of TLS_MODEL_LOCAL_EXEC when not pic.
20893 2020-01-08 David Malcolm <dmalcolm@redhat.com>
20895 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
20898 2020-01-08 Jakub Jelinek <jakub@redhat.com>
20901 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
20902 *stack_protect_set_3 peephole2): Also check that the second
20903 insns source is general_operand.
20906 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
20907 predicate for output operand instead of register_operand.
20908 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
20909 memory destination and non-memory operands[2].
20911 2020-01-08 Martin Liska <mliska@suse.cz>
20913 * cgraph.c (cgraph_node::dump): Use ::dump_name or
20914 ::dump_asm_name instead of (::name or ::asm_name).
20915 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
20916 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
20917 (analyze_functions): Likewise.
20918 (expand_all_functions): Likewise.
20919 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
20920 (propagate_bits_across_jump_function): Likewise.
20921 (dump_profile_updates): Likewise.
20922 (ipcp_store_bits_results): Likewise.
20923 (ipcp_store_vr_results): Likewise.
20924 * ipa-devirt.c (dump_targets): Likewise.
20925 * ipa-fnsummary.c (analyze_function_body): Likewise.
20926 * ipa-hsa.c (check_warn_node_versionable): Likewise.
20927 (process_hsa_functions): Likewise.
20928 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
20929 (set_alias_uids): Likewise.
20930 * ipa-inline-transform.c (save_inline_function_body): Likewise.
20931 * ipa-inline.c (recursive_inlining): Likewise.
20932 (inline_to_all_callers_1): Likewise.
20933 (ipa_inline): Likewise.
20934 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
20935 (ipa_propagate_frequency): Likewise.
20936 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
20937 (remove_described_reference): Likewise.
20938 * ipa-pure-const.c (worse_state): Likewise.
20939 (check_retval_uses): Likewise.
20940 (analyze_function): Likewise.
20941 (propagate_pure_const): Likewise.
20942 (propagate_nothrow): Likewise.
20943 (dump_malloc_lattice): Likewise.
20944 (propagate_malloc): Likewise.
20945 (pass_local_pure_const::execute): Likewise.
20946 * ipa-visibility.c (optimize_weakref): Likewise.
20947 (function_and_variable_visibility): Likewise.
20948 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
20949 (ipa_discover_variable_flags): Likewise.
20950 * lto-streamer-out.c (output_function): Likewise.
20951 (output_constructor): Likewise.
20952 * tree-inline.c (copy_bb): Likewise.
20953 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
20954 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
20956 2020-01-08 Richard Biener <rguenther@suse.de>
20958 PR middle-end/93199
20959 * tree-eh.c (sink_clobbers): Update virtual operands for
20960 the first and last stmt only. Add a dry-run capability.
20961 (pass_lower_eh_dispatch::execute): Perform clobber sinking
20962 after CFG manipulations and in RPO order to catch all
20963 secondary opportunities reliably.
20965 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
20968 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
20970 2019-01-08 Richard Biener <rguenther@suse.de>
20972 PR middle-end/93199
20973 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
20974 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
20975 virtual operand, also updating SSA use.
20976 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
20977 Update stmt after resetting virtual operand.
20978 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
20979 * gimple-iterator.c (gsi_remove): When not removing the stmt
20980 permanently do not delink immediate uses or mark the stmt modified.
20982 2020-01-08 Martin Liska <mliska@suse.cz>
20984 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
20985 (ipa_call_context::estimate_size_and_time): Likewise.
20986 (inline_analyze_function): Likewise.
20988 2020-01-08 Martin Liska <mliska@suse.cz>
20990 * cgraph.c (cgraph_node::dump): Use systematically
20993 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
20995 Add -nodevicespecs option for avr.
20998 * config/avr/avr.opt (-nodevicespecs): New driver option.
20999 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
21000 "-specs=device-specs/..." if that option is not set.
21001 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
21003 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
21005 Implement 64-bit double functions for avr.
21008 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
21009 --with-double-comparison.
21010 * doc/install.texi: Document them.
21011 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
21012 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
21013 <WITH_DOUBLE_COMPARISON>: New built-in defines.
21014 * doc/invoke.texi (AVR Built-in Macros): Document them.
21015 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
21016 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
21017 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
21019 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
21022 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
21023 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
21024 when only building rm-profile multilibs.
21026 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
21029 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
21030 lattice for a value to check.
21031 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
21032 finite propagation in self-recursive scc.
21034 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
21036 * ipa-inline.c (caller_growth_limits): Restore the AND.
21038 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
21040 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
21041 (VEC_ALLREG_ALT): New iterator.
21042 (VEC_ALLREG_INT_MODE): New iterator.
21043 (VCMP_MODE): New iterator.
21044 (VCMP_MODE_INT): New iterator.
21045 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
21046 (vec_cmp<u>v64qidi): New define_expand.
21047 (vec_cmp<mode>di_exec): Use VCMP_MODE.
21048 (vec_cmpu<mode>di_exec): New define_expand.
21049 (vec_cmp<u>v64qidi_exec): New define_expand.
21050 (vec_cmp<mode>di_dup): Use VCMP_MODE.
21051 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
21052 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
21053 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
21054 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
21055 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
21056 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
21057 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
21058 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
21059 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
21061 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
21062 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
21064 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
21066 * config/gcn/constraints.md (DA): Update description and match.
21068 (Db): New constraint.
21069 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
21071 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
21072 Implement 'Db' mixed immediate type.
21073 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
21074 (addcv64si3_dup<exec_vcc>): Delete.
21075 (subcv64si3<exec_vcc>): Rework constraints.
21076 (addv64di3): Rework constraints.
21077 (addv64di3_exec): Rework constraints.
21078 (subv64di3): Rework constraints.
21079 (addv64di3_dup): Delete.
21080 (addv64di3_dup_exec): Delete.
21081 (addv64di3_zext): Rework constraints.
21082 (addv64di3_zext_exec): Rework constraints.
21083 (addv64di3_zext_dup): Rework constraints.
21084 (addv64di3_zext_dup_exec): Rework constraints.
21085 (addv64di3_zext_dup2): Rework constraints.
21086 (addv64di3_zext_dup2_exec): Rework constraints.
21087 (addv64di3_sext_dup2): Rework constraints.
21088 (addv64di3_sext_dup2_exec): Rework constraints.
21090 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
21092 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
21093 existing target checks.
21095 2020-01-07 Richard Biener <rguenther@suse.de>
21097 * doc/install.texi: Bump minimal supported MPC version.
21099 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
21101 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
21102 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
21103 * langhooks.c: Include stor-layout.h.
21104 (lhd_simulate_enum_decl): New function.
21105 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
21106 handle_arm_sve_h for the LTO frontend.
21107 (register_vector_type): Cope with null returns from pushdecl.
21109 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
21111 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
21112 (aarch64_sve::nvectors_if_data_type): Replace with...
21113 (aarch64_sve::builtin_type_p): ...this.
21114 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
21115 (find_vector_type): Delete.
21116 (add_sve_type_attribute): New function.
21117 (lookup_sve_type_attribute): Likewise.
21118 (register_builtin_types): Add an "SVE type" attribute to each type.
21119 (register_tuple_type): Likewise.
21120 (svbool_type_p, nvectors_if_data_type): Delete.
21121 (mangle_builtin_type): Use lookup_sve_type_attribute.
21122 (builtin_type_p): Likewise. Add an overload that returns the
21123 number of constituent vector and predicate registers.
21124 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
21125 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
21126 instead of aarch64_sve_argument_p.
21127 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
21128 (aarch64_pass_by_reference): Likewise.
21129 (aarch64_function_value_1): Likewise.
21130 (aarch64_return_in_memory): Likewise.
21131 (aarch64_layout_arg): Likewise.
21133 2020-01-07 Jakub Jelinek <jakub@redhat.com>
21135 PR tree-optimization/93156
21136 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
21137 least significant bit is always clear.
21139 PR tree-optimization/93118
21140 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
21141 simplifier with two intermediate conversions.
21143 2020-01-07 Martin Liska <mliska@suse.cz>
21145 * params.opt: Add Optimization for various parameters.
21147 2020-01-07 Martin Liska <mliska@suse.cz>
21150 * doc/extend.texi: Explain cloning for target_clone
21153 2020-01-07 Martin Liska <mliska@suse.cz>
21155 PR tree-optimization/92860
21156 * common.opt: Make in Optimization option
21157 as it is affected by -O0, which is an Optimization
21159 * tree-inline.c (tree_inlinable_function_p):
21160 Use opt_for_fn for warn_inline.
21161 (expand_call_inline): Likewise.
21163 2020-01-07 Martin Liska <mliska@suse.cz>
21165 PR tree-optimization/92860
21166 * common.opt: Make flag_ree as optimization
21169 2020-01-07 Martin Liska <mliska@suse.cz>
21171 PR optimization/92860
21172 * params.opt: Mark param_min_crossjump_insns with Optimization
21175 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
21177 * ipa-inline-analysis.c (estimate_growth): Fix typo.
21178 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
21180 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
21182 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
21183 helper function to return the valid addressing formats for a given
21184 hard register and mode.
21185 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
21187 * config/rs6000/constraints.md (Q constraint): Update
21189 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
21192 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
21193 Use 'Q' for doing vector extract from memory.
21194 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
21196 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
21197 doing vector extract from memory.
21198 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
21199 extract from memory.
21201 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
21202 for the offset being 34-bits when -mcpu=future is used.
21204 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
21206 * config/pa/pa.md: Revert change to use ordered_comparison_operator
21207 instead of cmpib_comparison_operator in cmpib patterns.
21208 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
21209 of cmpib_comparison_operator. Revise comment.
21211 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
21213 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
21214 in an IFN_DIV_POW2 node to be equal.
21216 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
21218 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
21219 (vect_check_scalar_mask): ...this.
21220 (vectorizable_store, vectorizable_load): Update call accordingly.
21221 (vectorizable_call): Use vect_check_scalar_mask to check the mask
21222 argument in calls to conditional internal functions.
21224 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
21226 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
21227 '0' matching inputs.
21228 (subv64di3_exec): Likewise.
21230 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
21232 * config/mips/mips.c (vr4130_align_insns): Fix typo.
21233 * doc/md.texi (movstr): Likewise.
21235 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
21237 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
21240 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
21242 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
21244 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
21245 to a temporary file and use move-if-change to update the real
21246 file where necessary.
21248 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
21250 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
21251 rather than Upa for CPY /M.
21253 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
21255 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
21258 2020-01-06 Martin Liska <mliska@suse.cz>
21260 PR tree-optimization/92860
21261 * params.opt: Mark param_max_combine_insns with Optimization
21264 2020-01-05 Jakub Jelinek <jakub@redhat.com>
21267 * config/i386/i386.md (SWIDWI): New mode iterator.
21268 (DWI, dwi): Add TImode variants.
21269 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
21270 <general_hilo_operand> instead of <general_operand>. Use
21271 CONST_SCALAR_INT_P instead of CONST_INT_P.
21272 (*addv<mode>4_1): Rename to ...
21273 (addv<mode>4_1): ... this.
21274 (QWI): New mode attribute.
21275 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
21276 define_insn_and_split patterns.
21277 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
21279 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
21280 <general_hilo_operand> instead of <general_operand>.
21281 (*addcarry<mode>_1): New define_insn.
21282 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
21284 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
21286 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
21287 Use "call" instead of "set".
21289 2020-01-03 Martin Jambor <mjambor@suse.cz>
21292 * ipa-cp.c (print_all_lattices): Skip functions without info.
21294 2020-01-03 Jakub Jelinek <jakub@redhat.com>
21297 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
21298 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
21299 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
21300 for 'e' simd clones.
21303 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
21305 (mprefer-vector-width=): Add Save.
21306 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
21307 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
21308 (ix86_debug_options, ix86_function_specific_print): Adjust
21309 ix86_target_string callers.
21310 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
21311 (ix86_valid_target_attribute_tree): Likewise.
21312 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
21313 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
21314 ix86_target_string caller.
21317 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
21318 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
21319 instead of gen_int_shift_amount + convert_modes.
21321 PR rtl-optimization/93088
21322 * loop-iv.c (find_single_def_src): Punt after looking through
21323 128 reg copies for regs with single definitions. Move definitions
21326 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
21328 * config/arm/arm-c.c (arm_cpu_builtins): Define
21329 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
21330 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
21331 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
21332 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
21333 * config/arm/arm-tables.opt: Regenerated.
21334 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
21335 arm_arch_i8mm and arm_arch_bf16 when enabled.
21336 * config/arm/arm.h (TARGET_I8MM): New macro.
21337 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
21338 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
21339 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
21340 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
21341 (v8_6_a_simd_variants): New.
21342 (v8_*_a_simd_variants): Add i8mm and bf16.
21343 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
21345 2020-01-02 Jakub Jelinek <jakub@redhat.com>
21348 * predict.c (compute_function_frequency): Don't call
21349 warn_function_cold on functions that already have cold attribute.
21351 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
21354 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
21355 COMDAT group function labels in .data.rel.ro.local section.
21356 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
21359 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
21360 comparison_operator in B and S integer comparisons. Likewise, use
21361 ordered_comparison_operator instead of cmpib_comparison_operator in
21363 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
21365 2020-01-01 Jakub Jelinek <jakub@redhat.com>
21367 Update copyright years.
21369 * gcc.c (process_command): Update copyright notice dates.
21370 * gcov-dump.c (print_version): Ditto.
21371 * gcov.c (print_version): Ditto.
21372 * gcov-tool.c (print_version): Ditto.
21373 * gengtype.c (create_file): Ditto.
21374 * doc/cpp.texi: Bump @copying's copyright year.
21375 * doc/cppinternals.texi: Ditto.
21376 * doc/gcc.texi: Ditto.
21377 * doc/gccint.texi: Ditto.
21378 * doc/gcov.texi: Ditto.
21379 * doc/install.texi: Ditto.
21380 * doc/invoke.texi: Ditto.
21382 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
21384 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
21387 2020-01-01 Jakub Jelinek <jakub@redhat.com>
21389 PR tree-optimization/93098
21390 * match.pd (popcount): For shift amounts, use integer_onep
21391 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
21392 tests. Make sure that precision is power of two larger than or equal
21393 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
21394 instead of ULL suffixed constants. Formatting fixes.
21396 Copyright (C) 2020 Free Software Foundation, Inc.
21398 Copying and distribution of this file, with or without modification,
21399 are permitted in any medium without royalty provided the copyright
21400 notice and this notice are preserved.