Add Optimization keyword for TREE/RTL optimization passes.
[gcc.git] / gcc / ChangeLog
1 2020-01-07 Martin Liska <mliska@suse.cz>
2
3 * params.opt: Add Optimization for various parameters.
4
5 2020-01-07 Martin Liska <mliska@suse.cz>
6
7 PR ipa/83411
8 * doc/extend.texi: Explain cloning for target_clone
9 attribute.
10
11 2020-01-07 Martin Liska <mliska@suse.cz>
12
13 PR tree-optimization/92860
14 * common.opt: Make in Optimization option
15 as it is affected by -O0, which is an Optimization
16 option.
17 * tree-inline.c (tree_inlinable_function_p):
18 Use opt_for_fn for warn_inline.
19 (expand_call_inline): Likewise.
20
21 2020-01-07 Martin Liska <mliska@suse.cz>
22
23 PR tree-optimization/92860
24 * common.opt: Make flag_ree as optimization
25 attribute.
26
27 2020-01-07 Martin Liska <mliska@suse.cz>
28
29 PR optimization/92860
30 * params.opt: Mark param_min_crossjump_insns with Optimization
31 keyword.
32
33 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
34
35 * ipa-inline-analysis.c (estimate_growth): Fix typo.
36 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
37
38 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
39
40 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
41 helper function to return the valid addressing formats for a given
42 hard register and mode.
43 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
44
45 * config/rs6000/constraints.md (Q constraint): Update
46 documentation.
47 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
48 documentation.
49
50 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
51 Use 'Q' for doing vector extract from memory.
52 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
53 memory.
54 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
55 doing vector extract from memory.
56 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
57 extract from memory.
58
59 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
60 for the offset being 34-bits when -mcpu=future is used.
61
62 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
63
64 * config/pa/pa.md: Revert change to use ordered_comparison_operator
65 instead of cmpib_comparison_operator in cmpib patterns.
66 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
67 of cmpib_comparison_operator. Revise comment.
68
69 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
70
71 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
72 in an IFN_DIV_POW2 node to be equal.
73
74 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
75
76 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
77 (vect_check_scalar_mask): ...this.
78 (vectorizable_store, vectorizable_load): Update call accordingly.
79 (vectorizable_call): Use vect_check_scalar_mask to check the mask
80 argument in calls to conditional internal functions.
81
82 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
83
84 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
85 '0' matching inputs.
86 (subv64di3_exec): Likewise.
87
88 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
89
90 * config/mips/mips.c (vr4130_align_insns): Fix typo.
91 * doc/md.texi (movstr): Likewise.
92
93 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
94
95 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
96 clobber.
97
98 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
99
100 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
101 Depend on...
102 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
103 to a temporary file and use move-if-change to update the real
104 file where necessary.
105
106 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
107
108 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
109 rather than Upa for CPY /M.
110
111 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
112
113 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
114 immediate.
115
116 2020-01-06 Martin Liska <mliska@suse.cz>
117
118 PR tree-optimization/92860
119 * params.opt: Mark param_max_combine_insns with Optimization
120 keyword.
121
122 2020-01-05 Jakub Jelinek <jakub@redhat.com>
123
124 PR target/93141
125 * config/i386/i386.md (SWIDWI): New mode iterator.
126 (DWI, dwi): Add TImode variants.
127 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
128 <general_hilo_operand> instead of <general_operand>. Use
129 CONST_SCALAR_INT_P instead of CONST_INT_P.
130 (*addv<mode>4_1): Rename to ...
131 (addv<mode>4_1): ... this.
132 (QWI): New mode attribute.
133 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
134 define_insn_and_split patterns.
135 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
136 patterns.
137 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
138 <general_hilo_operand> instead of <general_operand>.
139 (*addcarry<mode>_1): New define_insn.
140 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
141
142 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
143
144 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
145 Use "call" instead of "set".
146
147 2020-01-03 Martin Jambor <mjambor@suse.cz>
148
149 PR ipa/92917
150 * ipa-cp.c (print_all_lattices): Skip functions without info.
151
152 2020-01-03 Jakub Jelinek <jakub@redhat.com>
153
154 PR target/93089
155 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
156 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
157 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
158 for 'e' simd clones.
159
160 PR target/93089
161 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
162 entry.
163 (mprefer-vector-width=): Add Save.
164 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
165 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
166 (ix86_debug_options, ix86_function_specific_print): Adjust
167 ix86_target_string callers.
168 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
169 (ix86_valid_target_attribute_tree): Likewise.
170 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
171 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
172 ix86_target_string caller.
173
174 PR target/93110
175 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
176 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
177 instead of gen_int_shift_amount + convert_modes.
178
179 PR rtl-optimization/93088
180 * loop-iv.c (find_single_def_src): Punt after looking through
181 128 reg copies for regs with single definitions. Move definitions
182 to first uses.
183
184 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
185
186 * config/arm/arm-c.c (arm_cpu_builtins): Define
187 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
188 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
189 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
190 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
191 * config/arm/arm-tables.opt: Regenerated.
192 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
193 arm_arch_i8mm and arm_arch_bf16 when enabled.
194 * config/arm/arm.h (TARGET_I8MM): New macro.
195 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
196 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
197 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
198 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
199 (v8_6_a_simd_variants): New.
200 (v8_*_a_simd_variants): Add i8mm and bf16.
201 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
202
203 2020-01-02 Jakub Jelinek <jakub@redhat.com>
204
205 PR ipa/93087
206 * predict.c (compute_function_frequency): Don't call
207 warn_function_cold on functions that already have cold attribute.
208
209 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
210
211 PR target/67834
212 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
213 COMDAT group function labels in .data.rel.ro.local section.
214 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
215
216 PR target/93111
217 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
218 comparison_operator in B and S integer comparisons. Likewise, use
219 ordered_comparison_operator instead of cmpib_comparison_operator in
220 cmpib patterns.
221 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
222
223 2020-01-01 Jakub Jelinek <jakub@redhat.com>
224
225 Update copyright years.
226
227 * gcc.c (process_command): Update copyright notice dates.
228 * gcov-dump.c (print_version): Ditto.
229 * gcov.c (print_version): Ditto.
230 * gcov-tool.c (print_version): Ditto.
231 * gengtype.c (create_file): Ditto.
232 * doc/cpp.texi: Bump @copying's copyright year.
233 * doc/cppinternals.texi: Ditto.
234 * doc/gcc.texi: Ditto.
235 * doc/gccint.texi: Ditto.
236 * doc/gcov.texi: Ditto.
237 * doc/install.texi: Ditto.
238 * doc/invoke.texi: Ditto.
239
240 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
241
242 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
243 summary.
244
245 2020-01-01 Jakub Jelinek <jakub@redhat.com>
246
247 PR tree-optimization/93098
248 * match.pd (popcount): For shift amounts, use integer_onep
249 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
250 tests. Make sure that precision is power of two larger than or equal
251 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
252 instead of ULL suffixed constants. Formatting fixes.
253 \f
254 Copyright (C) 2020 Free Software Foundation, Inc.
255
256 Copying and distribution of this file, with or without modification,
257 are permitted in any medium without royalty provided the copyright
258 notice and this notice are preserved.