gcc/ChangeLog

   1 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
   2
   3         * config/gcn/constraints.md (DA): Update description and match.
   4         (DB): Likewise.
   5         (Db): New constraint.
   6         * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
   7         parameter.
   8         * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
   9         Implement 'Db' mixed immediate type.
  10         * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
  11         (addcv64si3_dup<exec_vcc>): Delete.
  12         (subcv64si3<exec_vcc>): Rework constraints.
  13         (addv64di3): Rework constraints.
  14         (addv64di3_exec): Rework constraints.
  15         (subv64di3): Rework constraints.
  16         (addv64di3_dup): Delete.
  17         (addv64di3_dup_exec): Delete.
  18         (addv64di3_zext): Rework constraints.
  19         (addv64di3_zext_exec): Rework constraints.
  20         (addv64di3_zext_dup): Rework constraints.
  21         (addv64di3_zext_dup_exec): Rework constraints.
  22         (addv64di3_zext_dup2): Rework constraints.
  23         (addv64di3_zext_dup2_exec): Rework constraints.
  24         (addv64di3_sext_dup2): Rework constraints.
  25         (addv64di3_sext_dup2_exec): Rework constraints.
  26
  27 2020-01-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  28
  29         * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
  30         existing target checks.
  31
  32 2020-01-07  Richard Biener  <rguenther@suse.de>
  33
  34         * doc/install.texi: Bump minimal supported MPC version.
  35
  36 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
  37
  38         * langhooks-def.h (lhd_simulate_enum_decl): Declare.
  39         (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
  40         * langhooks.c: Include stor-layout.h.
  41         (lhd_simulate_enum_decl): New function.
  42         * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
  43         handle_arm_sve_h for the LTO frontend.
  44         (register_vector_type): Cope with null returns from pushdecl.
  45
  46 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
  47
  48         * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
  49         (aarch64_sve::nvectors_if_data_type): Replace with...
  50         (aarch64_sve::builtin_type_p): ...this.
  51         * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
  52         (find_vector_type): Delete.
  53         (add_sve_type_attribute): New function.
  54         (lookup_sve_type_attribute): Likewise.
  55         (register_builtin_types): Add an "SVE type" attribute to each type.
  56         (register_tuple_type): Likewise.
  57         (svbool_type_p, nvectors_if_data_type): Delete.
  58         (mangle_builtin_type): Use lookup_sve_type_attribute.
  59         (builtin_type_p): Likewise.  Add an overload that returns the
  60         number of constituent vector and predicate registers.
  61         * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
  62         (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
  63         instead of aarch64_sve_argument_p.
  64         (aarch64_takes_arguments_in_sve_regs_p): Likewise.
  65         (aarch64_pass_by_reference): Likewise.
  66         (aarch64_function_value_1): Likewise.
  67         (aarch64_return_in_memory): Likewise.
  68         (aarch64_layout_arg): Likewise.
  69
  70 2020-01-07  Jakub Jelinek  <jakub@redhat.com>
  71
  72         PR tree-optimization/93156
  73         * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
  74         least significant bit is always clear.
  75
  76         PR tree-optimization/93118
  77         * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?.  Add new
  78         simplifier with two intermediate conversions.
  79
  80 2020-01-07  Martin Liska  <mliska@suse.cz>
  81
  82         * params.opt: Add Optimization for various parameters.
  83
  84 2020-01-07  Martin Liska  <mliska@suse.cz>
  85
  86         PR ipa/83411
  87         * doc/extend.texi: Explain cloning for target_clone
  88         attribute.
  89
  90 2020-01-07  Martin Liska  <mliska@suse.cz>
  91
  92         PR tree-optimization/92860
  93         * common.opt: Make in Optimization option
  94         as it is affected by -O0, which is an Optimization
  95         option.
  96         * tree-inline.c (tree_inlinable_function_p):
  97         Use opt_for_fn for warn_inline.
  98         (expand_call_inline): Likewise.
  99
 100 2020-01-07  Martin Liska  <mliska@suse.cz>
 101
 102         PR tree-optimization/92860
 103         * common.opt: Make flag_ree as optimization
 104         attribute.
 105
 106 2020-01-07  Martin Liska  <mliska@suse.cz>
 107
 108         PR optimization/92860
 109         * params.opt: Mark param_min_crossjump_insns with Optimization
 110         keyword.
 111
 112 2020-01-07  Luo Xiong Hu  <luoxhu@linux.ibm.com>
 113
 114         * ipa-inline-analysis.c (estimate_growth): Fix typo.
 115         * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
 116
 117 2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
 118
 119         * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
 120         helper function to return the valid addressing formats for a given
 121         hard register and mode.
 122         (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
 123
 124         * config/rs6000/constraints.md (Q constraint): Update
 125         documentation.
 126         * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
 127         documentation.
 128
 129         * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
 130         Use 'Q' for doing vector extract from memory.
 131         (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
 132         memory.
 133         (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
 134         doing vector extract from memory.
 135         (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
 136         extract from memory.
 137
 138         * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
 139         for the offset being 34-bits when -mcpu=future is used.
 140
 141 2020-01-06  John David Anglin  <danglin@gcc.gnu.org>
 142
 143         * config/pa/pa.md: Revert change to use ordered_comparison_operator
 144         instead of cmpib_comparison_operator in cmpib patterns.
 145         * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
 146         of cmpib_comparison_operator.  Revise comment.
 147
 148 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 149
 150         * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
 151         in an IFN_DIV_POW2 node to be equal.
 152
 153 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 154
 155         * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
 156         (vect_check_scalar_mask): ...this.
 157         (vectorizable_store, vectorizable_load): Update call accordingly.
 158         (vectorizable_call): Use vect_check_scalar_mask to check the mask
 159         argument in calls to conditional internal functions.
 160
 161 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 162
 163         * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
 164         '0' matching inputs.
 165         (subv64di3_exec): Likewise.
 166
 167 2020-01-06  Bryan Stenson  <bryan@siliconvortex.com>
 168
 169         * config/mips/mips.c (vr4130_align_insns): Fix typo.
 170         * doc/md.texi (movstr): Likewise.
 171
 172 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 173
 174         * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
 175         clobber.
 176
 177 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 178
 179         * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
 180         Depend on...
 181         (s-aarch64-tune-md): ...this new stamp file.  Pipe the new contents
 182         to a temporary file and use move-if-change to update the real
 183         file where necessary.
 184
 185 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 186
 187         * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
 188         rather than Upa for CPY /M.
 189
 190 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 191
 192         * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
 193         immediate.
 194
 195 2020-01-06  Martin Liska  <mliska@suse.cz>
 196
 197     PR tree-optimization/92860
 198     * params.opt: Mark param_max_combine_insns with Optimization
 199     keyword.
 200
 201 2020-01-05  Jakub Jelinek  <jakub@redhat.com>
 202
 203         PR target/93141
 204         * config/i386/i386.md (SWIDWI): New mode iterator.
 205         (DWI, dwi): Add TImode variants.
 206         (addv<mode>4): Use SWIDWI iterator instead of SWI.  Use
 207         <general_hilo_operand> instead of <general_operand>.  Use
 208         CONST_SCALAR_INT_P instead of CONST_INT_P.
 209         (*addv<mode>4_1): Rename to ...
 210         (addv<mode>4_1): ... this.
 211         (QWI): New mode attribute.
 212         (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
 213         define_insn_and_split patterns.
 214         (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
 215         patterns.
 216         (uaddv<mode>4): Use SWIDWI iterator instead of SWI.  Use
 217         <general_hilo_operand> instead of <general_operand>.
 218         (*addcarry<mode>_1): New define_insn.
 219         (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
 220
 221 2020-01-03  Konstantin Kharlamov  <Hi-Angel@yandex.ru>
 222
 223         * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
 224         Use "call" instead of "set".
 225
 226 2020-01-03  Martin Jambor  <mjambor@suse.cz>
 227
 228         PR ipa/92917
 229         * ipa-cp.c (print_all_lattices): Skip functions without info.
 230
 231 2020-01-03  Jakub Jelinek  <jakub@redhat.com>
 232
 233         PR target/93089
 234         * config/i386/i386-options.c (ix86_simd_clone_adjust): If
 235         TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
 236         simd clones.  If TARGET_PREFER_AVX256, use prefer-vector-width=512
 237         for 'e' simd clones.
 238
 239         PR target/93089
 240         * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
 241         entry.
 242         (mprefer-vector-width=): Add Save.
 243         * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
 244         -mprefer-vector-width= if non-zero.  Fix up -mfpmath= comment.
 245         (ix86_debug_options, ix86_function_specific_print): Adjust
 246         ix86_target_string callers.
 247         (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
 248         (ix86_valid_target_attribute_tree): Likewise.
 249         * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
 250         * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
 251         ix86_target_string caller.
 252
 253         PR target/93110
 254         * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
 255         emitting ASHIFTRT, XOR and MINUS by hand.  Use gen_int_mode with QImode
 256         instead of gen_int_shift_amount + convert_modes.
 257
 258         PR rtl-optimization/93088
 259         * loop-iv.c (find_single_def_src): Punt after looking through
 260         128 reg copies for regs with single definitions.  Move definitions
 261         to first uses.
 262
 263 2020-01-02  Dennis Zhang  <dennis.zhang@arm.com>
 264
 265         * config/arm/arm-c.c (arm_cpu_builtins): Define
 266         __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
 267         __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
 268         __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
 269         * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
 270         * config/arm/arm-tables.opt: Regenerated.
 271         * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
 272         arm_arch_i8mm and arm_arch_bf16 when enabled.
 273         * config/arm/arm.h (TARGET_I8MM): New macro.
 274         (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
 275         * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
 276         * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
 277         * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
 278         (v8_6_a_simd_variants): New.
 279         (v8_*_a_simd_variants): Add i8mm and bf16.
 280         * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
 281
 282 2020-01-02  Jakub Jelinek  <jakub@redhat.com>
 283
 284         PR ipa/93087
 285         * predict.c (compute_function_frequency): Don't call
 286         warn_function_cold on functions that already have cold attribute.
 287
 288 2020-01-01  John David Anglin  <danglin@gcc.gnu.org>
 289
 290         PR target/67834
 291         * config/pa/pa.c (pa_elf_select_rtx_section): New.  Put references to
 292         COMDAT group function labels in .data.rel.ro.local section.
 293         * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
 294
 295         PR target/93111
 296         * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
 297         comparison_operator in B and S integer comparisons.  Likewise, use
 298         ordered_comparison_operator instead of cmpib_comparison_operator in
 299         cmpib patterns.
 300         * config/pa/predicates.md (cmpib_comparison_operator): Remove.
 301
 302 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
 303
 304         Update copyright years.
 305
 306         * gcc.c (process_command): Update copyright notice dates.
 307         * gcov-dump.c (print_version): Ditto.
 308         * gcov.c (print_version): Ditto.
 309         * gcov-tool.c (print_version): Ditto.
 310         * gengtype.c (create_file): Ditto.
 311         * doc/cpp.texi: Bump @copying's copyright year.
 312         * doc/cppinternals.texi: Ditto.
 313         * doc/gcc.texi: Ditto.
 314         * doc/gccint.texi: Ditto.
 315         * doc/gcov.texi: Ditto.
 316         * doc/install.texi: Ditto.
 317         * doc/invoke.texi: Ditto.
 318
 319 2020-01-01  Jan Hubicka  <hubicka@ucw.cz>
 320
 321         * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
 322         summary.
 323
 324 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
 325
 326         PR tree-optimization/93098
 327         * match.pd (popcount): For shift amounts, use integer_onep
 328         or wi::to_widest () == cst instead of tree_to_uhwi () == cst
 329         tests.  Make sure that precision is power of two larger than or equal
 330         to 16.  Ensure shift is never negative.  Use HOST_WIDE_INT_UC macro
 331         instead of ULL suffixed constants.  Formatting fixes.
 332 \f
 333 Copyright (C) 2020 Free Software Foundation, Inc.
 334
 335 Copying and distribution of this file, with or without modification,
 336 are permitted in any medium without royalty provided the copyright
 337 notice and this notice are preserved.