1 2020-08-28 Martin Sebor <msebor@redhat.com>
3 * attribs.c (init_attr_rdwr_indices): Use global access_mode.
4 * attribs.h (struct attr_access): Same.
5 * builtins.c (fold_builtin_strlen): Add argument.
6 (compute_objsize): Declare.
8 (check_read_access): New function.
9 (access_ref::access_ref): Define ctor.
10 (warn_string_no_nul): Add arguments. Handle -Wstrintop-overread.
11 (check_nul_terminated_array): Handle source strings of different
13 (expand_builtin_strlen): Remove warning code, call check_read_access
14 instead. Declare locals closer to their initialization.
15 (expand_builtin_strnlen): Same.
16 (maybe_warn_for_bound): New function.
17 (warn_for_access): Remove argument. Handle -Wstrintop-overread.
18 (inform_access): Change argument type.
19 (get_size_range): New function.
20 (check_access): Remove unused arguments. Add new arguments. Handle
21 -Wstrintop-overread. Move warning code to helpers and call them.
22 Call check_nul_terminated_array.
23 (check_memop_access): Remove unnecessary and provide additional
25 (expand_builtin_memchr): Call check_read_access.
26 (expand_builtin_strcat): Remove unnecessary and provide additional
28 (expand_builtin_strcpy): Same.
29 (expand_builtin_strcpy_args): Same. Avoid testing no-warning bit.
30 (expand_builtin_stpcpy_1): Remove unnecessary and provide additional
32 (expand_builtin_stpncpy): Same.
33 (check_strncat_sizes): Same.
34 (expand_builtin_strncat): Remove unnecessary and provide additional
35 arguments in calls. Adjust comments.
36 (expand_builtin_strncpy): Remove unnecessary and provide additional
38 (expand_builtin_memcmp): Remove warning code. Call check_access.
39 (expand_builtin_strcmp): Call check_access instead of
40 check_nul_terminated_array.
41 (expand_builtin_strncmp): Handle -Wstrintop-overread.
42 (expand_builtin_fork_or_exec): Call check_access instead of
43 check_nul_terminated_array.
44 (expand_builtin): Same.
45 (fold_builtin_1): Pass additional argument.
46 (fold_builtin_n): Same.
47 (fold_builtin_strpbrk): Remove calls to check_nul_terminated_array.
48 (expand_builtin_memory_chk): Add comments.
49 (maybe_emit_chk_warning): Remove unnecessary and provide additional
51 (maybe_emit_sprintf_chk_warning): Same. Adjust comments.
52 * builtins.h (warn_string_no_nul): Add arguments.
53 (struct access_ref): Add member and ctor argument.
54 (struct access_data): Add members and ctor.
55 (check_access): Adjust signature.
56 * calls.c (maybe_warn_nonstring_arg): Return an indication of
57 whether a warning was issued. Issue -Wstrintop-overread instead
58 of -Wstringop-overflow.
59 (append_attrname): Adjust to naming changes.
60 (maybe_warn_rdwr_sizes): Same. Remove unnecessary and provide
61 additional arguments in calls.
62 * calls.h (maybe_warn_nonstring_arg): Return bool.
63 * doc/invoke.texi (-Wstringop-overread): Document new option.
64 * gimple-fold.c (gimple_fold_builtin_strcpy): Provide an additional
66 (gimple_fold_builtin_stpcpy): Same.
67 * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Adjust to naming
69 * tree.h (enum access_mode): New type.
71 2020-08-28 Bill Schmidt <wschmidt@linux.ibm.com>
73 * config/rs6000/rs6000.c (rs6000_call_aix): Remove test for r12.
74 (rs6000_sibcall_aix): Likewise.
76 2020-08-28 Andrew Stubbs <ams@codesourcery.com>
78 * config/gcn/gcn-tree.c (gcn_goacc_get_worker_red_decl): Add "true"
79 parameter to vec_safe_grow_cleared.
81 2020-08-28 Martin Sebor <msebor@redhat.com>
83 * ggc-common.c (gt_pch_save): Add argument to a call.
85 2020-08-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
88 * config/aarch64/aarch64-sve.md
89 (cond_sub<mode>_relaxed_const): Updated and renamed from
90 cond_sub<mode>_any_const pattern.
91 (cond_sub<mode>_strict_const): New pattern.
93 2020-08-28 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
95 * doc/rtl.texi: Fix typo.
97 2020-08-28 Uros Bizjak <ubizjak@gmail.com>
100 * config/i386/i386-expand.c (split_double_mode): Also handle
101 E_P2HImode and E_P2QImode.
102 * config/i386/sse.md (MASK_DWI): New define_mode_iterator.
103 (mov<mode>): New expander for P2HI,P2QI.
104 (*mov<mode>_internal): New define_insn_and_split to split
105 movement of P2QI/P2HI to 2 movqi/movhi patterns after reload.
107 2020-08-28 liuhongt <hongtao.liu@intel.com>
109 * common/config/i386/i386-common.c (ix86_handle_option): Set
110 AVX512DQ when AVX512VP2INTERSECT exists.
112 2020-08-27 Jakub Jelinek <jakub@redhat.com>
115 * config/i386/i386.c (iamcu_alignment): Don't decrease alignment
116 for TYPE_ATOMIC types.
117 (ix86_local_alignment): Likewise.
118 (ix86_minimum_alignment): Likewise.
119 (x86_field_alignment): Likewise, and emit a -Wpsabi diagnostic
122 2020-08-27 Bill Schmidt <wschmidt@linux.ibm.com>
125 * config/rs6000/rs6000.c (rs6000_sibcall_aix): Support
126 indirect call for ELFv2.
128 2020-08-27 Richard Biener <rguenther@suse.de>
130 PR tree-optimization/96522
131 * tree-ssa-address.c (copy_ref_info): Reset flow-sensitive
132 info of the copied points-to. Transfer bigger alignment
134 * tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt):
135 Reset all flow-sensitive info.
137 2020-08-27 Martin Liska <mliska@suse.cz>
139 * alias.c (init_alias_analysis): Set exact argument of a vector
140 growth function to true.
141 * calls.c (internal_arg_pointer_based_exp_scan): Likewise.
142 * cfgbuild.c (find_many_sub_basic_blocks): Likewise.
143 * cfgexpand.c (expand_asm_stmt): Likewise.
144 * cfgrtl.c (rtl_create_basic_block): Likewise.
145 * combine.c (combine_split_insns): Likewise.
146 (combine_instructions): Likewise.
147 * config/aarch64/aarch64-sve-builtins.cc (function_expander::add_output_operand): Likewise.
148 (function_expander::add_input_operand): Likewise.
149 (function_expander::add_integer_operand): Likewise.
150 (function_expander::add_address_operand): Likewise.
151 (function_expander::add_fixed_operand): Likewise.
152 * df-core.c (df_worklist_dataflow_doublequeue): Likewise.
153 * dwarf2cfi.c (update_row_reg_save): Likewise.
154 * early-remat.c (early_remat::init_block_info): Likewise.
155 (early_remat::finalize_candidate_indices): Likewise.
156 * except.c (sjlj_build_landing_pads): Likewise.
157 * final.c (compute_alignments): Likewise.
158 (grow_label_align): Likewise.
159 * function.c (temp_slots_at_level): Likewise.
160 * fwprop.c (build_single_def_use_links): Likewise.
161 (update_uses): Likewise.
162 * gcc.c (insert_wrapper): Likewise.
163 * genautomata.c (create_state_ainsn_table): Likewise.
164 (add_vect): Likewise.
165 (output_dead_lock_vect): Likewise.
166 * genmatch.c (capture_info::capture_info): Likewise.
167 (parser::finish_match_operand): Likewise.
168 * genrecog.c (optimize_subroutine_group): Likewise.
169 (merge_pattern_info::merge_pattern_info): Likewise.
170 (merge_into_decision): Likewise.
171 (print_subroutine_start): Likewise.
173 * gimple-loop-versioning.cc (loop_versioning::loop_versioning): Likewise.
174 * gimple.c (gimple_set_bb): Likewise.
175 * graphite-isl-ast-to-gimple.c (translate_isl_ast_node_user): Likewise.
176 * haifa-sched.c (sched_extend_luids): Likewise.
177 (extend_h_i_d): Likewise.
178 * insn-addr.h (insn_addresses_new): Likewise.
179 * ipa-cp.c (gather_context_independent_values): Likewise.
180 (find_more_contexts_for_caller_subset): Likewise.
181 * ipa-devirt.c (final_warning_record::grow_type_warnings): Likewise.
182 (ipa_odr_read_section): Likewise.
183 * ipa-fnsummary.c (evaluate_properties_for_edge): Likewise.
184 (ipa_fn_summary_t::duplicate): Likewise.
185 (analyze_function_body): Likewise.
186 (ipa_merge_fn_summary_after_inlining): Likewise.
187 (read_ipa_call_summary): Likewise.
188 * ipa-icf.c (sem_function::bb_dict_test): Likewise.
189 * ipa-prop.c (ipa_alloc_node_params): Likewise.
190 (parm_bb_aa_status_for_bb): Likewise.
191 (ipa_compute_jump_functions_for_edge): Likewise.
192 (ipa_analyze_node): Likewise.
193 (update_jump_functions_after_inlining): Likewise.
194 (ipa_read_edge_info): Likewise.
195 (read_ipcp_transformation_info): Likewise.
196 (ipcp_transform_function): Likewise.
197 * ipa-reference.c (ipa_reference_write_optimization_summary): Likewise.
198 * ipa-split.c (execute_split_functions): Likewise.
199 * ira.c (find_moveable_pseudos): Likewise.
200 * lower-subreg.c (decompose_multiword_subregs): Likewise.
201 * lto-streamer-in.c (input_eh_regions): Likewise.
202 (input_cfg): Likewise.
203 (input_struct_function_base): Likewise.
204 (input_function): Likewise.
205 * modulo-sched.c (set_node_sched_params): Likewise.
206 (extend_node_sched_params): Likewise.
207 (schedule_reg_moves): Likewise.
208 * omp-general.c (omp_construct_simd_compare): Likewise.
209 * passes.c (pass_manager::create_pass_tab): Likewise.
210 (enable_disable_pass): Likewise.
211 * predict.c (determine_unlikely_bbs): Likewise.
212 * profile.c (compute_branch_probabilities): Likewise.
213 * read-rtl-function.c (function_reader::parse_block): Likewise.
214 * read-rtl.c (rtx_reader::read_rtx_code): Likewise.
215 * reg-stack.c (stack_regs_mentioned): Likewise.
216 * regrename.c (regrename_init): Likewise.
217 * rtlanal.c (T>::add_single_to_queue): Likewise.
218 * sched-deps.c (init_deps_data_vector): Likewise.
219 * sel-sched-ir.c (sel_extend_global_bb_info): Likewise.
220 (extend_region_bb_info): Likewise.
221 (extend_insn_data): Likewise.
222 * symtab.c (symtab_node::create_reference): Likewise.
223 * tracer.c (tail_duplicate): Likewise.
224 * trans-mem.c (tm_region_init): Likewise.
225 (get_bb_regions_instrumented): Likewise.
226 * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise.
227 (build_gimple_cfg): Likewise.
228 (create_bb): Likewise.
229 (move_block_to_fn): Likewise.
230 * tree-complex.c (tree_lower_complex): Likewise.
231 * tree-if-conv.c (predicate_rhs_code): Likewise.
232 * tree-inline.c (copy_bb): Likewise.
233 * tree-into-ssa.c (get_ssa_name_ann): Likewise.
234 (mark_phi_for_rewrite): Likewise.
235 * tree-object-size.c (compute_builtin_object_size): Likewise.
236 (init_object_sizes): Likewise.
237 * tree-predcom.c (initialize_root_vars_store_elim_1): Likewise.
238 (initialize_root_vars_store_elim_2): Likewise.
239 (prepare_initializers_chain_store_elim): Likewise.
240 * tree-ssa-address.c (addr_for_mem_ref): Likewise.
241 (multiplier_allowed_in_address_p): Likewise.
242 * tree-ssa-coalesce.c (ssa_conflicts_new): Likewise.
243 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
244 * tree-ssa-loop-ivopts.c (addr_offset_valid_p): Likewise.
245 (get_address_cost_ainc): Likewise.
246 * tree-ssa-loop-niter.c (discover_iteration_bound_by_body_walk): Likewise.
247 * tree-ssa-pre.c (add_to_value): Likewise.
248 (phi_translate_1): Likewise.
249 (do_pre_regular_insertion): Likewise.
250 (do_pre_partial_partial_insertion): Likewise.
251 (init_pre): Likewise.
252 * tree-ssa-propagate.c (ssa_prop_init): Likewise.
253 (update_call_from_tree): Likewise.
254 * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Likewise.
255 * tree-ssa-sccvn.c (vn_reference_lookup_3): Likewise.
256 (vn_reference_lookup_pieces): Likewise.
257 (eliminate_dom_walker::eliminate_push_avail): Likewise.
258 * tree-ssa-strlen.c (set_strinfo): Likewise.
259 (get_stridx_plus_constant): Likewise.
260 (zero_length_string): Likewise.
261 (find_equal_ptrs): Likewise.
262 (printf_strlen_execute): Likewise.
263 * tree-ssa-threadedge.c (set_ssa_name_value): Likewise.
264 * tree-ssanames.c (make_ssa_name_fn): Likewise.
265 * tree-streamer-in.c (streamer_read_tree_bitfields): Likewise.
266 * tree-vect-loop.c (vect_record_loop_mask): Likewise.
267 (vect_get_loop_mask): Likewise.
268 (vect_record_loop_len): Likewise.
269 (vect_get_loop_len): Likewise.
270 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
271 * tree-vect-slp.c (vect_slp_convert_to_external): Likewise.
272 (vect_bb_slp_scalar_cost): Likewise.
273 (vect_bb_vectorization_profitable_p): Likewise.
274 (vectorizable_slp_permutation): Likewise.
275 * tree-vect-stmts.c (vectorizable_call): Likewise.
276 (vectorizable_simd_clone_call): Likewise.
277 (scan_store_can_perm_p): Likewise.
278 (vectorizable_store): Likewise.
280 * vec.c (test_safe_grow_cleared): Likewise.
281 * vec.h (vec_safe_grow): Likewise.
282 (vec_safe_grow_cleared): Likewise.
283 (vl_ptr>::safe_grow): Likewise.
284 (vl_ptr>::safe_grow_cleared): Likewise.
285 * config/c6x/c6x.c (insn_set_clock): Likewise.
287 2020-08-27 Richard Biener <rguenther@suse.de>
289 * tree-pretty-print.c (dump_mem_ref): Handle TARGET_MEM_REFs.
290 (dump_generic_node): Use dump_mem_ref also for TARGET_MEM_REF.
292 2020-08-27 Alex Coplan <alex.coplan@arm.com>
294 * lra-constraints.c (canonicalize_reload_addr): New.
295 (curr_insn_transform): Use canonicalize_reload_addr to ensure we
296 generate canonical RTL for an address reload.
298 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com>
300 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
301 for rounding intrinsics.
303 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com>
305 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
306 for min/max intrinsics.
308 2020-08-27 Richard Biener <rguenther@suse.de>
310 PR tree-optimization/96579
311 * tree-ssa-reassoc.c (linearize_expr_tree): If we expand
312 rhs via special ops make sure to swap operands.
314 2020-08-27 Richard Biener <rguenther@suse.de>
316 PR tree-optimization/96565
317 * tree-ssa-dse.c (dse_classify_store): Remove defs with
318 no uses from further processing.
320 2020-08-26 Göran Uddeborg <goeran@uddeborg.se>
322 PR gcov-profile/96285
323 * common.opt, doc/invoke.texi: Clarify wording of
324 -fprofile-exclude-files and adjust -fprofile-filter-files to
327 2020-08-26 H.J. Lu <hjl.tools@gmail.com>
330 * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
331 Reject target("no-general-regs-only").
333 2020-08-26 Jozef Lawrynowicz <jozef.l@mittosystems.com>
335 * config/msp430/constraints.md (K): Change unused constraint to
336 constraint to a const_int between 1 and 19.
338 * config/msp430/msp430-protos.h (msp430x_logical_shift_right): Remove.
339 (msp430_expand_shift): New.
340 (msp430_output_asm_shift_insns): New.
341 * config/msp430/msp430.c (msp430_rtx_costs): Remove shift costs.
343 (msp430_expand_helper): Remove hard-coded generation of some inline
345 (use_helper_for_const_shift): New.
346 (msp430_expand_shift): New.
347 (msp430_output_asm_shift_insns): New.
348 (msp430_print_operand): Add new 'W' operand selector.
349 (msp430x_logical_shift_right): Remove.
350 * config/msp430/msp430.md (HPSI): New define_mode_iterator.
352 (any_shift): New define_code_iterator.
353 (shift_insn): New define_code_attr.
354 Adjust unnamed insn patterns searched for by combine.
357 (430x_shift_left): Remove.
364 (430x_arithmetic_shift_right): Remove.
373 (430x_logical_shift_right): Remove.
379 (<shift_insn><mode>3): New define_expand.
380 (<shift_insn>hi3_430): New define_insn.
381 (<shift_insn>si3_const): Likewise.
382 (ashl<mode>3_430x): Likewise.
383 (ashr<mode>3_430x): Likewise.
384 (lshr<mode>3_430x): Likewise.
385 (*bitbranch<mode>4_z): Replace renamed predicate msp430_bitpos with
386 const_0_to_15_operand.
387 * config/msp430/msp430.opt: New option -mmax-inline-shift=.
388 * config/msp430/predicates.md (const_1_to_8_operand): New predicate.
389 (const_0_to_15_operand): Rename msp430_bitpos predicate.
390 (const_1_to_19_operand): New predicate.
391 * doc/invoke.texi: Document -mmax-inline-shift=.
393 2020-08-26 Aldy Hernandez <aldyh@redhat.com>
395 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Abstract code out to...
396 * tree-vrp.c (find_case_label_range): ...here. Rewrite for to use irange
398 (simplify_stmt_for_jump_threading): Call find_case_label_range instead of
399 duplicating the code in simplify_stmt_for_jump_threading.
400 * tree-vrp.h (find_case_label_range): New prototype.
402 2020-08-26 Richard Biener <rguenther@suse.de>
404 PR tree-optimization/96698
405 * tree-vectorizer.h (loop_vec_info::reduc_latch_defs): New.
406 (loop_vec_info::reduc_latch_slp_defs): Likewise.
407 * tree-vect-stmts.c (vect_transform_stmt): Only record
408 stmts to update PHI latches from, perform the update ...
409 * tree-vect-loop.c (vect_transform_loop): ... here after
410 vectorizing those PHIs.
411 (info_for_reduction): Properly handle non-reduction PHIs.
413 2020-08-26 Martin Liska <mliska@suse.cz>
415 * cgraphunit.c (process_symver_attribute): Match only symver
418 2020-08-26 Richard Biener <rguenther@suse.de>
420 PR tree-optimization/96783
421 * tree-vect-stmts.c (get_group_load_store_type): Use
422 VMAT_ELEMENTWISE for negative strides when we cannot
423 use VMAT_STRIDED_SLP.
425 2020-08-26 Martin Liska <mliska@suse.cz>
427 * doc/invoke.texi: Document how are pie and pic options merged.
429 2020-08-26 Zhiheng Xie <xiezhiheng@huawei.com>
431 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
432 for add/sub arithmetic intrinsics.
434 2020-08-26 Jakub Jelinek <jakub@redhat.com>
437 * dwarf2out.c (dwarf2out_next_real_insn): Adjust function comment.
438 (dwarf2out_var_location): Look for next_note only if next_real is
439 non-NULL, in that case look for the first non-deleted
440 NOTE_INSN_VAR_LOCATION between loc_note and next_real, if any.
442 2020-08-26 Iain Buclaw <ibuclaw@gdcproject.org>
444 * config/tilepro/gen-mul-tables.cc (main): Define IN_TARGET_CODE to 1
447 2020-08-26 Martin Liska <mliska@suse.cz>
449 * cgraphunit.c (process_symver_attribute): Allow multiple
450 symver attributes for one symbol.
451 * doc/extend.texi: Document the change.
453 2020-08-25 H.J. Lu <hjl.tools@gmail.com>
456 * config/i386/i386.h (CTZ_DEFINED_VALUE_AT_ZERO): Return 0/2.
457 (CLZ_DEFINED_VALUE_AT_ZERO): Likewise.
459 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
462 * config/pa/pa.c (hppa_rtx_costs_shadd_p): New helper function
463 to check for coefficients supported by shNadd and shladd,l.
464 (hppa_rtx_costs): Rewrite to avoid using estimates based upon
465 FACTOR and enable recursing deeper into RTL expressions.
467 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
469 * config/pa/pa.md (ashldi3): Additionally, on !TARGET_64BIT
470 generate a two instruction shd/zdep sequence when shifting
471 registers by suitable constants.
472 (shd_internal): New define_expand to provide gen_shd_internal.
474 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
476 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Rename
477 __ARM_FEATURE_SVE_VECTOR_OPERATIONS to
478 __ARM_FEATURE_SVE_VECTOR_OPERATORS.
480 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
482 * config/aarch64/aarch64-sve-builtins.cc (add_sve_type_attribute):
483 Take the ACLE name of the type as a parameter and add it as fourth
484 argument to the "SVE type" attribute.
485 (register_builtin_types): Update call accordingly.
486 (register_tuple_type): Likewise. Construct the name of the type
487 earlier in order to do this.
488 (get_arm_sve_vector_bits_attributes): New function.
489 (handle_arm_sve_vector_bits_attribute): Report a more sensible
490 error message if the attribute is applied to an SVE tuple type.
491 Don't allow the attribute to be applied to an existing fixed-length
492 SVE type. Mangle the new type as __SVE_VLS<type, vector-bits>.
493 Add a dummy TYPE_DECL to the new type.
495 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
497 * config/aarch64/aarch64-sve-builtins.cc (DEF_SVE_TYPE): Add a
498 leading "u" to each mangled name.
500 2020-08-25 Richard Biener <rguenther@suse.de>
502 PR tree-optimization/96548
503 PR tree-optimization/96760
504 * tree-ssa-loop-im.c (tree_ssa_lim): Recompute RPO after
507 2020-08-25 Jakub Jelinek <jakub@redhat.com>
509 PR tree-optimization/96722
510 * gimple.c (infer_nonnull_range): Formatting fix.
511 (infer_nonnull_range_by_dereference): Return false for clobber stmts.
513 2020-08-25 Jakub Jelinek <jakub@redhat.com>
515 PR tree-optimization/96758
516 * tree-ssa-strlen.c (handle_builtin_string_cmp): If both cstlen1
517 and cstlen2 are set, set cmpsiz to their minimum, otherwise use the
518 one that is set. If bound is used and smaller than cmpsiz, set cmpsiz
519 to bound. If both cstlen1 and cstlen2 are set, perform the optimization.
521 2020-08-25 Martin Jambor <mjambor@suse.cz>
523 PR tree-optimization/96730
524 * tree-sra.c (create_access): Disqualify any aggregate with negative
526 (build_ref_for_model): Add assert that offset is non-negative.
528 2020-08-25 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
530 * rtl.def: Fix typo in comment.
532 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
534 PR tree-optimization/21137
535 * fold-const.c (fold_binary_loc) [NE_EXPR/EQ_EXPR]: Call
536 STRIP_NOPS when checking whether to simplify ((x>>C1)&C2) != 0.
538 2020-08-25 Andrew Pinski <apinski@marvell.com>
541 * config/mips/mips.md (builtin_longjmp): Restore the frame
542 pointer and stack pointer and gp.
544 2020-08-25 Richard Biener <rguenther@suse.de>
547 * dwarf2out.c (reference_to_unused): Make FUNCTION_DECL
548 processing more consistent with respect to
549 symtab->global_info_ready.
550 (tree_add_const_value_attribute): Unconditionally call
551 rtl_for_decl_init to do all mangling early but throw
552 away the result if early_dwarf.
554 2020-08-25 Hongtao Liu <hongtao.liu@intel.com>
557 * config/i386/sse.md: Correct the mode of NOT operands to
560 2020-08-25 Jakub Jelinek <jakub@redhat.com>
562 PR tree-optimization/96715
563 * match.pd (copysign(x,-x) -> -x): New simplification.
565 2020-08-25 Jakub Jelinek <jakub@redhat.com>
568 * fold-const.c (native_interpret_real): For MODE_COMPOSITE_P modes
569 punt if the to be returned REAL_CST does not encode to the bitwise
572 2020-08-24 Gerald Pfeifer <gerald@pfeifer.com>
574 * doc/install.texi (Configuration): Switch valgrind.com to https.
576 2020-08-24 Christophe Lyon <christophe.lyon@linaro.org>
580 * config/arm/thumb1.md: Disable set-constant splitter when
582 (thumb1_movsi_insn): Fix -mpure-code
585 2020-08-24 Martin Liska <mliska@suse.cz>
587 * tree-vect-data-refs.c (dr_group_sort_cmp): Work on
589 (vect_analyze_data_ref_accesses): Work on groups.
590 (vect_find_stmt_data_reference): Add group_id argument and fill
591 up dataref_groups vector.
592 * tree-vect-loop.c (vect_get_datarefs_in_loop): Pass new
594 (vect_analyze_loop_2): Likewise.
595 * tree-vect-slp.c (vect_slp_analyze_bb_1): Pass argument.
596 (vect_slp_bb_region): Likewise.
597 (vect_slp_region): Likewise.
598 (vect_slp_bb):Work on the entire BB.
599 * tree-vectorizer.h (vect_analyze_data_ref_accesses): Add new
601 (vect_find_stmt_data_reference): Likewise.
603 2020-08-24 Martin Liska <mliska@suse.cz>
605 PR tree-optimization/96597
606 * tree-ssa-sccvn.c (vn_reference_lookup_call): Add missing
607 initialization of ::punned.
608 (vn_reference_insert): Use consistently false instead of 0.
609 (vn_reference_insert_pieces): Likewise.
611 2020-08-24 Hans-Peter Nilsson <hp@axis.com>
614 * reorg.c (fill_slots_from_thread): Allow trial insns that clobber
615 TARGET_FLAGS_REGNUM as delay-slot fillers.
617 2020-08-23 H.J. Lu <hjl.tools@gmail.com>
620 * config/i386/i386-options.c (IX86_ATTR_IX86_YES): New.
621 (IX86_ATTR_IX86_NO): Likewise.
622 (ix86_opt_type): Add ix86_opt_ix86_yes and ix86_opt_ix86_no.
623 (ix86_valid_target_attribute_inner_p): Handle general-regs-only,
624 ix86_opt_ix86_yes and ix86_opt_ix86_no.
625 (ix86_option_override_internal): Check opts->x_ix86_target_flags
626 instead of opts->x_ix86_target_flags.
627 * doc/extend.texi: Document target("general-regs-only") function
630 2020-08-21 Richard Sandiford <richard.sandiford@arm.com>
632 * doc/extend.texi: Update links to Arm docs.
633 * doc/invoke.texi: Likewise.
635 2020-08-21 Hongtao Liu <hongtao.liu@intel.com>
638 * config/i386/i386-expand.c
639 (ix86_expand_vec_shift_qihi_constant): Refine.
641 2020-08-21 Alex Coplan <alex.coplan@arm.com>
644 * gcc.c (set_static_spec): New.
645 (set_static_spec_owned): New.
646 (set_static_spec_shared): New.
647 (driver::maybe_putenv_COLLECT_LTO_WRAPPER): Use
648 set_static_spec_owned() to take ownership of lto_wrapper_file
649 such that it gets freed in driver::finalize.
650 (driver::maybe_run_linker): Use set_static_spec_shared() to
651 ensure that we don't try and free() the static string "ld",
652 also ensuring that any previously-allocated string in
653 linker_name_spec is freed. Likewise with argv0.
654 (driver::finalize): Use set_static_spec_shared() when resetting
655 specs that previously had allocated strings; remove if(0)
656 around call to free().
658 2020-08-21 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
660 * emit-rtl.c (try_split): Call copy_frame_info_to_split_insn
661 to split certain RTX_FRAME_RELATED_P insns.
662 * recog.c (copy_frame_info_to_split_insn): New function.
663 (peep2_attempt): Split copying of frame related info of
664 RTX_FRAME_RELATED_P insns into above function and call it.
665 * recog.h (copy_frame_info_to_split_insn): Declare it.
667 2020-08-21 liuhongt <hongtao.liu@intel.com>
670 * config/i386/i386.c (ix86_preferred_reload_class): Allow
671 QImode data go into mask registers.
672 * config/i386/i386.md: (*movhi_internal): Adjust constraints
674 (*movqi_internal): Ditto.
675 (*anddi_1): Support mask register operations
676 (*and<mode>_1): Ditto.
678 (*andn<mode>_1): Ditto.
679 (*<code><mode>_1): Ditto.
680 (*<code>qi_1): Ditto.
681 (*one_cmpl<mode>2_1): Ditto.
682 (*one_cmplsi2_1_zext): Ditto.
683 (*one_cmplqi2_1): Ditto.
684 (define_peephole2): Move constant 0/-1 directly into mask
686 * config/i386/predicates.md (mask_reg_operand): New predicate.
687 * config/i386/sse.md (define_split): Add post-reload splitters
688 that would convert "generic" patterns to mask patterns.
689 (*knotsi_1_zext): New define_insn.
691 2020-08-21 liuhongt <hongtao.liu@intel.com>
693 * config/i386/x86-tune-costs.h (skylake_cost): Adjust cost
696 2020-08-21 liuhongt <hongtao.liu@intel.com>
698 * config/i386/i386.c (inline_secondary_memory_needed):
699 No memory is needed between mask regs and gpr.
700 (ix86_hard_regno_mode_ok): Add condition TARGET_AVX512F for
702 * config/i386/i386.h (enum reg_class): Add INT_MASK_REGS.
703 (REG_CLASS_NAMES): Ditto.
704 (REG_CLASS_CONTENTS): Ditto.
705 * config/i386/i386.md: Exclude mask register in
706 define_peephole2 which is avaiable only for gpr.
708 2020-08-21 H.J. Lu <hjl.tools@gmail.com>
711 * config/i386/i386.h (struct processor_costs): Add member
712 mask_to_integer, integer_to_mask, mask_load[3], mask_store[3],
714 * config/i386/x86-tune-costs.h (ix86_size_cost, i386_cost,
715 i386_cost, pentium_cost, lakemont_cost, pentiumpro_cost,
716 geode_cost, k6_cost, athlon_cost, k8_cost, amdfam10_cost,
717 bdver_cost, znver1_cost, znver2_cost, skylake_cost,
718 btver1_cost, btver2_cost, pentium4_cost, nocona_cost,
719 atom_cost, slm_cost, intel_cost, generic_cost, core_cost):
720 Initialize mask_load[3], mask_store[3], mask_move,
721 integer_to_mask, mask_to_integer for all target costs.
722 * config/i386/i386.c (ix86_register_move_cost): Using cost
723 model of mask registers.
724 (inline_memory_move_cost): Ditto.
725 (ix86_register_move_cost): Ditto.
727 2020-08-20 Iain Buclaw <ibuclaw@gdcproject.org>
729 * config/vxworks.h (VXWORKS_ADDITIONAL_CPP_SPEC): Don't include
730 VxWorks header files if -fself-test is used.
731 (STARTFILE_PREFIX_SPEC): Avoid using VSB_DIR if -fself-test is used.
733 2020-08-20 Joe Ramsay <Joe.Ramsay@arm.com>
736 * config/arm/mve.md (mve_vst1q_f<mode>): Require MVE memory operand for
738 (mve_vst1q_<supf><mode>): Likewise.
740 2020-08-19 2020-08-19 Carl Love <cel@us.ibm.com>
742 * config/rs6000/rs6000-builtin.def (BU_P10V_0, BU_P10V_1,
743 BU_P10V_2, BU_P10V_3): Rename BU_P10V_VSX_0, BU_P10V_VSX_1,
744 BU_P10V_VSX_2, BU_P10V_VSX_3 respectively.
746 (BU_P10V_AV_0, BU_P10V_AV_1, BU_P10V_AV_2, BU_P10V_AV_3, BU_P10V_AV_4):
747 New definitions for Power 10 Altivec macros.
748 (VSTRIBR, VSTRIHR, VSTRIBL, VSTRIHL, VSTRIBR_P, VSTRIHR_P,
749 VSTRIBL_P, VSTRIHL_P, MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM,
750 VEXPANDMB, VEXPANDMH, VEXPANDMW, VEXPANDMD, VEXPANDMQ, VEXTRACTMB,
751 VEXTRACTMH, VEXTRACTMW, VEXTRACTMD, VEXTRACTMQ): Replace macro
752 expansion BU_P10V_1 with BU_P10V_AV_1.
753 (VCLRLB, VCLRRB, VCFUGED, VCLZDM, VCTZDM, VPDEPD, VPEXTD, VGNB,
754 VCNTMBB, VCNTMBH, VCNTMBW, VCNTMBD): Replace macro expansion
755 BU_P10V_2 with BU_P10V_AV_2.
756 (VEXTRACTBL, VEXTRACTHL, VEXTRACTWL, VEXTRACTDL, VEXTRACTBR, VEXTRACTHR,
757 VEXTRACTWR, VEXTRACTDR, VINSERTGPRBL, VINSERTGPRHL, VINSERTGPRWL,
758 VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL, VINSERTGPRBR,
759 VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR, VINSERTVPRHR,
760 VINSERTVPRWR, VREPLACE_ELT_V4SI, VREPLACE_ELT_UV4SI, VREPLACE_ELT_V2DF,
761 VREPLACE_ELT_V4SF, VREPLACE_ELT_V2DI, VREPLACE_ELT_UV2DI, VREPLACE_UN_V4SI,
762 VREPLACE_UN_UV4SI, VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
763 VREPLACE_UN_V2DF, VSLDB_V16QI, VSLDB_V8HI, VSLDB_V4SI, VSLDB_V2DI,
764 VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI, VSRDB_V2DI): Replace macro expansion
765 BU_P10V_3 with BU_P10V_AV_3.
766 (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF, VXXSPLTID): Replace macro expansion
767 BU_P10V_1 with BU_P10V_AV_1.
768 (XXGENPCVM_V16QI, XXGENPCVM_V8HI, XXGENPCVM_V4SI, XXGENPCVM_V2DI):
769 Replace macro expansion BU_P10V_2 with BU_P10V_VSX_2.
770 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF, VXXBLEND_V16QI, VXXBLEND_V8HI,
771 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): Replace macor
772 expansion BU_P10V_3 with BU_P10V_VSX_3.
773 (XXEVAL, VXXPERMX): Replace macro expansion BU_P10V_4 with BU_P10V_VSX_4.
774 (XVCVBF16SP, XVCVSPBF16): Replace macro expansion BU_VSX_1 with
775 BU_P10V_VSX_1. Also change MISC to CONST.
776 * config/rs6000/rs6000-c.c: (P10_BUILTIN_VXXPERMX): Replace with
777 P10V_BUILTIN_VXXPERMX.
778 (P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRRB,
779 P10_BUILTIN_VGNB, P10_BUILTIN_XXEVAL, P10_BUILTIN_VXXPERMX,
780 P10_BUILTIN_VEXTRACTBL, P10_BUILTIN_VEXTRACTHL, P10_BUILTIN_VEXTRACTWL,
781 P10_BUILTIN_VEXTRACTDL, P10_BUILTIN_VINSERTGPRHL,
782 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
783 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
784 P10_BUILTIN_VEXTRACTBR, P10_BUILTIN_VEXTRACTHR,
785 P10_BUILTIN_VEXTRACTWR, P10_BUILTIN_VEXTRACTDR,
786 P10_BUILTIN_VINSERTGPRBR, P10_BUILTIN_VINSERTGPRHR,
787 P10_BUILTIN_VINSERTGPRWR, P10_BUILTIN_VINSERTGPRDR,
788 P10_BUILTIN_VINSERTVPRBR, P10_BUILTIN_VINSERTVPRHR,
789 P10_BUILTIN_VINSERTVPRWR, P10_BUILTIN_VREPLACE_ELT_UV4SI,
790 P10_BUILTIN_VREPLACE_ELT_V4SI, P10_BUILTIN_VREPLACE_ELT_UV2DI,
791 P10_BUILTIN_VREPLACE_ELT_V2DI, P10_BUILTIN_VREPLACE_ELT_V2DF,
792 P10_BUILTIN_VREPLACE_UN_UV4SI, P10_BUILTIN_VREPLACE_UN_V4SI,
793 P10_BUILTIN_VREPLACE_UN_V4SF, P10_BUILTIN_VREPLACE_UN_UV2DI,
794 P10_BUILTIN_VREPLACE_UN_V2DI, P10_BUILTIN_VREPLACE_UN_V2DF,
795 P10_BUILTIN_VSLDB_V16QI, P10_BUILTIN_VSLDB_V16QI,
796 P10_BUILTIN_VSLDB_V8HI, P10_BUILTIN_VSLDB_V4SI,
797 P10_BUILTIN_VSLDB_V2DI, P10_BUILTIN_VXXSPLTIW_V4SI,
798 P10_BUILTIN_VXXSPLTIW_V4SF, P10_BUILTIN_VXXSPLTID,
799 P10_BUILTIN_VXXSPLTI32DX_V4SI, P10_BUILTIN_VXXSPLTI32DX_V4SF,
800 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
801 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI,
802 P10_BUILTIN_VXXBLEND_V4SF, P10_BUILTIN_VXXBLEND_V2DF,
803 P10_BUILTIN_VSRDB_V16QI, P10_BUILTIN_VSRDB_V8HI,
804 P10_BUILTIN_VSRDB_V4SI, P10_BUILTIN_VSRDB_V2DI,
805 P10_BUILTIN_VSTRIBL, P10_BUILTIN_VSTRIHL,
806 P10_BUILTIN_VSTRIBL_P, P10_BUILTIN_VSTRIHL_P,
807 P10_BUILTIN_VSTRIBR, P10_BUILTIN_VSTRIHR,
808 P10_BUILTIN_VSTRIBR_P, P10_BUILTIN_VSTRIHR_P,
809 P10_BUILTIN_MTVSRBM, P10_BUILTIN_MTVSRHM,
810 P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
811 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB,
812 P10_BUILTIN_VCNTMBH, P10_BUILTIN_VCNTMBW,
813 P10_BUILTIN_VCNTMBD, P10_BUILTIN_VEXPANDMB,
814 P10_BUILTIN_VEXPANDMH, P10_BUILTIN_VEXPANDMW,
815 P10_BUILTIN_VEXPANDMD, P10_BUILTIN_VEXPANDMQ,
816 P10_BUILTIN_VEXTRACTMB, P10_BUILTIN_VEXTRACTMH,
817 P10_BUILTIN_VEXTRACTMW, P10_BUILTIN_VEXTRACTMD,
818 P10_BUILTIN_VEXTRACTMQ, P10_BUILTIN_XVTLSBB_ZEROS,
819 P10_BUILTIN_XVTLSBB_ONES): Replace with
820 P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRRB,
821 P10V_BUILTIN_VGNB, P10V_BUILTIN_XXEVAL, P10V_BUILTIN_VXXPERMX,
822 P10V_BUILTIN_VEXTRACTBL, P10V_BUILTIN_VEXTRACTHL, P10V_BUILTIN_VEXTRACTWL,
823 P10V_BUILTIN_VEXTRACTDL, P10V_BUILTIN_VINSERTGPRHL,
824 P10V_BUILTIN_VINSERTGPRWL, P10V_BUILTIN_VINSERTGPRDL,
825 P10V_BUILTIN_VINSERTVPRBL,P10V_BUILTIN_VINSERTVPRHL,
826 P10V_BUILTIN_VEXTRACTBR, P10V_BUILTIN_VEXTRACTHR
827 P10V_BUILTIN_VEXTRACTWR, P10V_BUILTIN_VEXTRACTDR,
828 P10V_BUILTIN_VINSERTGPRBR, P10V_BUILTIN_VINSERTGPRHR,
829 P10V_BUILTIN_VINSERTGPRWR, P10V_BUILTIN_VINSERTGPRDR,
830 P10V_BUILTIN_VINSERTVPRBR, P10V_BUILTIN_VINSERTVPRHR,
831 P10V_BUILTIN_VINSERTVPRWR, P10V_BUILTIN_VREPLACE_ELT_UV4SI,
832 P10V_BUILTIN_VREPLACE_ELT_V4SI, P10V_BUILTIN_VREPLACE_ELT_UV2DI,
833 P10V_BUILTIN_VREPLACE_ELT_V2DI, P10V_BUILTIN_VREPLACE_ELT_V2DF,
834 P10V_BUILTIN_VREPLACE_UN_UV4SI, P10V_BUILTIN_VREPLACE_UN_V4SI,
835 P10V_BUILTIN_VREPLACE_UN_V4SF, P10V_BUILTIN_VREPLACE_UN_UV2DI,
836 P10V_BUILTIN_VREPLACE_UN_V2DI, P10V_BUILTIN_VREPLACE_UN_V2DF,
837 P10V_BUILTIN_VSLDB_V16QI, P10V_BUILTIN_VSLDB_V16QI,
838 P10V_BUILTIN_VSLDB_V8HI, P10V_BUILTIN_VSLDB_V4SI,
839 P10V_BUILTIN_VSLDB_V2DI, P10V_BUILTIN_VXXSPLTIW_V4SI,
840 P10V_BUILTIN_VXXSPLTIW_V4SF, P10V_BUILTIN_VXXSPLTID,
841 P10V_BUILTIN_VXXSPLTI32DX_V4SI, P10V_BUILTIN_VXXSPLTI32DX_V4SF,
842 P10V_BUILTIN_VXXBLEND_V16QI, P10V_BUILTIN_VXXBLEND_V8HI,
843 P10V_BUILTIN_VXXBLEND_V4SI, P10V_BUILTIN_VXXBLEND_V2DI,
844 P10V_BUILTIN_VXXBLEND_V4SF, P10V_BUILTIN_VXXBLEND_V2DF,
845 P10V_BUILTIN_VSRDB_V16QI, P10V_BUILTIN_VSRDB_V8HI,
846 P10V_BUILTIN_VSRDB_V4SI, P10V_BUILTIN_VSRDB_V2DI,
847 P10V_BUILTIN_VSTRIBL, P10V_BUILTIN_VSTRIHL,
848 P10V_BUILTIN_VSTRIBL_P, P10V_BUILTIN_VSTRIHL_P,
849 P10V_BUILTIN_VSTRIBR, P10V_BUILTIN_VSTRIHR,
850 P10V_BUILTIN_VSTRIBR_P, P10V_BUILTIN_VSTRIHR_P,
851 P10V_BUILTIN_MTVSRBM, P10V_BUILTIN_MTVSRHM,
852 P10V_BUILTIN_MTVSRWM, P10V_BUILTIN_MTVSRDM,
853 P10V_BUILTIN_MTVSRQM, P10V_BUILTIN_VCNTMBB,
854 P10V_BUILTIN_VCNTMBH, P10V_BUILTIN_VCNTMBW,
855 P10V_BUILTIN_VCNTMBD, P10V_BUILTIN_VEXPANDMB,
856 P10V_BUILTIN_VEXPANDMH, P10V_BUILTIN_VEXPANDMW,
857 P10V_BUILTIN_VEXPANDMD, P10V_BUILTIN_VEXPANDMQ,
858 P10V_BUILTIN_VEXTRACTMB, P10V_BUILTIN_VEXTRACTMH,
859 P10V_BUILTIN_VEXTRACTMW, P10V_BUILTIN_VEXTRACTMD,
860 P10V_BUILTIN_VEXTRACTMQ, P10V_BUILTIN_XVTLSBB_ZEROS,
861 P10V_BUILTIN_XVTLSBB_ONES respectively.
862 * config/rs6000/rs6000-call.c: Ditto above, change P10_BUILTIN_name to
864 (P10_BUILTIN_XVCVSPBF16, P10_BUILTIN_XVCVBF16SP): Change to
865 P10V_BUILTIN_XVCVSPBF16, P10V_BUILTIN_XVCVBF16SP respectively.
867 2020-08-19 Bill Schmidt <wschmidt@linux.ibm.com>
869 * config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall):
870 Sibcalls are always legal when the caller doesn't preserve r2.
872 2020-08-19 Uroš Bizjak <ubizjak@gmail.com>
874 * config/i386/i386-expand.c (ix86_expand_builtin)
875 [case IX86_BUILTIN_ENQCMD, case IX86_BUILTIN_ENQCMDS]:
876 Rewrite expansion to use code_for_enqcmd.
877 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]:
878 Rewrite expansion to use code_for_wrss.
879 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
880 Rewrite expansion to use code_for_wrss.
882 2020-08-19 Feng Xue <fxue@os.amperecomputing.com>
884 PR tree-optimization/94234
885 * match.pd ((PTR_A + OFF) - (PTR_B + OFF)) -> (PTR_A - PTR_B): New
888 2020-08-19 H.J. Lu <hjl.tools@gmail.com>
890 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect Rocket
893 2020-08-19 Peixin Qiao <qiaopeixin@huawei.com>
895 * config/aarch64/aarch64.c (aarch64_init_cumulative_args): Remove
896 "fndecl && TREE_PUBLIC (fndecl)" check since it prevents the funtion
897 type check when calling via a function pointer or when calling a static
900 2020-08-19 Kewen Lin <linkw@linux.ibm.com>
902 * opts-global.c (decode_options): Call target_option_override_hook
903 before it prints for --help=*.
905 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
907 * config/rs6000/rs6000-builtin.def (BU_VSX_1): Rename xvcvbf16sp to
909 * config/rs6000/rs6000-call.c (builtin_function_type): Likewise.
910 * config/rs6000/vsx.md: Likewise.
911 * doc/extend.texi: Likewise.
913 2020-08-18 Aaron Sawdey <acsawdey@linux.ibm.com>
915 * config/rs6000/rs6000-string.c (gen_lxvl_stxvl_move):
917 (expand_block_move): Add lxvl/stxvl, vector pair, and
919 * config/rs6000/rs6000.c (rs6000_option_override_internal):
920 Default value for -mblock-ops-vector-pair.
921 * config/rs6000/rs6000.opt: Add -mblock-ops-vector-pair.
923 2020-08-18 Aldy Hernandez <aldyh@redhat.com>
925 * vr-values.c (check_for_binary_op_overflow): Change type of store
927 (vr_values::adjust_range_with_scev): Abstract most of the code...
928 (range_of_var_in_loop): ...here. Remove value_range_equiv uses.
929 (simplify_using_ranges::simplify_using_ranges): Change type of store
931 * vr-values.h (class range_query): New.
932 (class simplify_using_ranges): Use range_query.
933 (class vr_values): Add OVERRIDE to get_value_range.
934 (range_of_var_in_loop): New.
936 2020-08-18 Martin Sebor <msebor@redhat.com>
940 * expr.c (convert_to_bytes): Replace statically allocated buffer with
941 a dynamically allocated one of sufficient size.
943 2020-08-18 Martin Sebor <msebor@redhat.com>
945 PR tree-optimization/96670
947 * gimple-fold.c (gimple_fold_builtin_memchr): Call byte_representation
948 to get it, not string_constant.
950 2020-08-18 Hu Jiangping <hujiangping@cn.fujitsu.com>
952 * doc/gimple.texi (gimple_debug_begin_stmt_p): Add return type.
953 (gimple_debug_inline_entry_p, gimple_debug_nonbind_marker_p): Likewise.
955 2020-08-18 Martin Sebor <msebor@redhat.com>
957 * fold-const.c (native_encode_expr): Update comment.
959 2020-08-18 Uroš Bizjak <ubizjak@gmail.com>
962 * config/i386/i386.md (restore_stack_nonlocal): Add missing compare
963 RTX. Rewrite expander to use high-level functions in RTL construction.
965 2020-08-18 liuhongt <hongtao.liu@intel.com>
969 * config/i386/i386-expand.c (ix86_expand_pinsr): Don't use
971 (ix86_expand_pextr): Don't use pextr for TImode.
973 2020-08-17 Uroš Bizjak <ubizjak@gmail.com>
975 * config/i386/i386-builtin.def (__builtin_ia32_bextri_u32)
976 (__builtin_ia32_bextri_u64): Use CODE_FOR_nothing.
977 * config/i386/i386.md (@tbm_bextri_<mode>):
978 Implement as parametrized name pattern.
979 (@rdrand<mode>): Ditto.
980 (@rdseed<mode>): Ditto.
981 * config/i386/i386-expand.c (ix86_expand_builtin)
982 [case IX86_BUILTIN_BEXTRI32, case IX86_BUILTIN_BEXTRI64]:
983 Update for parameterized name patterns.
984 [case IX86_BUILTIN_RDRAND16_STEP, case IX86_BUILTIN_RDRAND32_STEP]
985 [case IX86_BUILTIN_RDRAND64_STEP]: Ditto.
986 [case IX86_BUILTIN_RDSEED16_STEP, case IX86_BUILTIN_RDSEED32_STEP]
987 [case IX86_BUILTIN_RDSEED64_STEP]: Ditto.
989 2020-08-17 Aldy Hernandez <aldyh@redhat.com>
991 * vr-values.c (vr_values::get_value_range): Add stmt param.
992 (vr_values::extract_range_from_comparison): Same.
993 (vr_values::extract_range_from_assignment): Pass stmt to
994 extract_range_from_comparison.
995 (vr_values::adjust_range_with_scev): Pass stmt to get_value_range.
996 (simplify_using_ranges::vrp_evaluate_conditional): Add stmt param.
997 Pass stmt to get_value_range.
998 (simplify_using_ranges::vrp_visit_cond_stmt): Pass stmt to
1000 (simplify_using_ranges::simplify_abs_using_ranges): Same.
1001 (simplify_using_ranges::simplify_div_or_mod_using_ranges): Same.
1002 (simplify_using_ranges::simplify_bit_ops_using_ranges): Same.
1003 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
1004 (simplify_using_ranges::simplify_switch_using_ranges): Same.
1005 (simplify_using_ranges::simplify_float_conversion_using_ranges): Same.
1006 * vr-values.h (class vr_values): Add stmt arg to
1007 vrp_evaluate_conditional_warnv_with_ops.
1008 Add stmt arg to extract_range_from_comparison and get_value_range.
1009 (simplify_using_ranges::get_value_range): Add stmt arg.
1011 2020-08-17 liuhongt <hongtao.liu@intel.com>
1014 * config/i386/i386.c (ix86_legitimate_constant_p): Return
1015 false for ENDBR immediate.
1016 (ix86_legitimate_address_p): Ditto.
1017 * config/i386/predicates.md
1018 (x86_64_immediate_operand): Exclude ENDBR immediate.
1019 (x86_64_zext_immediate_operand): Ditto.
1020 (x86_64_dwzext_immediate_operand): Ditto.
1021 (ix86_endbr_immediate_operand): New predicate.
1023 2020-08-16 Roger Sayle <roger@nextmovesoftware.com>
1025 * simplify-rtx.c (simplify_unary_operation_1) [SIGN_EXTEND]:
1026 Simplify (sign_extend:M (truncate:N (lshiftrt:M x C))) to
1027 (ashiftrt:M x C) when the shift sets the high bits appropriately.
1029 2020-08-14 Martin Sebor <msebor@redhat.com>
1032 * builtins.c (expand_builtin_memory_copy_args): Rename called function.
1033 (expand_builtin_stpcpy_1): Remove argument from call.
1034 (expand_builtin_memcmp): Rename called function.
1035 (inline_expand_builtin_bytecmp): Same.
1036 * expr.c (convert_to_bytes): New function.
1037 (constant_byte_string): New function (formerly string_constant).
1038 (string_constant): Call constant_byte_string.
1039 (byte_representation): New function.
1040 * expr.h (byte_representation): Declare.
1041 * fold-const-call.c (fold_const_call): Rename called function.
1042 * fold-const.c (c_getstr): Remove an argument.
1043 (getbyterep): Define a new function.
1044 * fold-const.h (c_getstr): Remove an argument.
1045 (getbyterep): Declare a new function.
1046 * gimple-fold.c (gimple_fold_builtin_memory_op): Rename callee.
1047 (gimple_fold_builtin_string_compare): Same.
1048 (gimple_fold_builtin_memchr): Same.
1050 2020-08-14 David Malcolm <dmalcolm@redhat.com>
1052 * doc/analyzer.texi (Overview): Add tip about how to get a
1053 gimple dump if the analyzer ICEs.
1055 2020-08-14 Uroš Bizjak <ubizjak@gmail.com>
1057 * config/i386/i386-builtin.def (__builtin_ia32_llwpcb)
1058 (__builtin_ia32_slwpcb, __builtin_ia32_lwpval32)
1059 (__builtin_ia32_lwpval64, __builtin_ia32_lwpins32)
1060 (__builtin_ia32_lwpins64): Use CODE_FOR_nothing.
1061 * config/i386/i386.md (@lwp_llwpcb<mode>):
1062 Implement as parametrized name pattern.
1063 (@lwp_slwpcb<mode>): Ditto.
1064 (@lwp_lwpval<mode>): Ditto.
1065 (@lwp_lwpins<mode>): Ditto.
1066 * config/i386/i386-expand.c (ix86_expand_special_args_builtin)
1067 [case VOID_FTYPE_UINT_UINT_UINT, case VOID_FTYPE_UINT64_UINT_UINT]
1068 [case UCHAR_FTYPE_UINT_UINT_UINT, case UCHAR_FTYPE_UINT64_UINT_UINT]:
1070 (ix86_expand_builtin)
1071 [ case IX86_BUILTIN_LLWPCB, case IX86_BUILTIN_LLWPCB]:
1072 Update for parameterized name patterns.
1073 [case IX86_BUILTIN_LWPVAL32, case IX86_BUILTIN_LWPVAL64]
1074 [case IX86_BUILTIN_LWPINS32, case IX86_BUILTIN_LWPINS64]: Expand here.
1076 2020-08-14 Lewis Hyatt <lhyatt@gmail.com>
1078 * common.opt: Add new option -fdiagnostics-plain-output.
1079 * doc/invoke.texi: Document it.
1080 * opts-common.c (decode_cmdline_options_to_array): Implement it.
1081 (decode_cmdline_option): Add missing const qualifier to argv.
1083 2020-08-14 Jakub Jelinek <jakub@redhat.com>
1084 Jonathan Wakely <jwakely@redhat.com>
1085 Jonathan Wakely <jwakely@redhat.com>
1087 * system.h: Include type_traits.
1088 * vec.h (vec<T, A, vl_embed>::embedded_size): Use offsetof and asserts
1089 on vec_stdlayout, which is conditionally a vec (for standard layout T)
1090 and otherwise vec_embedded.
1092 2020-08-14 Jojo R <jiejie_rong@c-sky.com>
1094 * config/csky/csky-elf.h (ASM_SPEC): Use mfloat-abi.
1095 * config/csky/csky-linux-elf.h (ASM_SPEC): mfloat-abi.
1097 2020-08-13 David Malcolm <dmalcolm@redhat.com>
1113 * Makefile.in (ANALYZER_OBJS): Add analyzer/region.o,
1114 analyzer/region-model-impl-calls.o,
1115 analyzer/region-model-manager.o,
1116 analyzer/region-model-reachability.o, analyzer/store.o, and
1118 * doc/analyzer.texi: Update for changes to analyzer
1120 * tristate.h (tristate::get_value): New accessor.
1122 2020-08-13 Uroš Bizjak <ubizjak@gmail.com>
1124 * config/i386/i386-builtin.def (CET_NORMAL): Merge to CET BDESC array.
1125 (__builtin_ia32_rddspd, __builtin_ia32_rddspq, __builtin_ia32_incsspd)
1126 (__builtin_ia32_incsspq, __builtin_ia32_wrssd, __builtin_ia32_wrssq)
1127 (__builtin_ia32_wrussd, __builtin_ia32_wrussq): Use CODE_FOR_nothing.
1128 * config/i386/i386-builtins.c: Remove handling of CET_NORMAL builtins.
1129 * config/i386/i386.md (@rdssp<mode>): Implement as parametrized
1130 name pattern. Use SWI48 mode iterator. Introduce input operand
1131 and remove explicit XOR zeroing from insn template.
1132 (@incssp<mode>): Implement as parametrized name pattern.
1133 Use SWI48 mode iterator.
1134 (@wrss<mode>): Ditto.
1135 (@wruss<mode>): Ditto.
1136 (rstorssp): Remove expander. Rename insn pattern from *rstorssp<mode>.
1137 Use DImode memory operand.
1138 (clrssbsy): Remove expander. Rename insn pattern from *clrssbsy<mode>.
1139 Use DImode memory operand.
1140 (save_stack_nonlocal): Update for parametrized name patterns.
1141 Use cleared register as an argument to gen_rddsp.
1142 (restore_stack_nonlocal): Update for parametrized name patterns.
1143 * config/i386/i386-expand.c (ix86_expand_builtin):
1144 [case IX86_BUILTIN_RDSSPD, case IX86_BUILTIN_RDSSPQ]: Expand here.
1145 [case IX86_BUILTIN_INCSSPD, case IX86_BUILTIN_INCSSPQ]: Ditto.
1146 [case IX86_BUILTIN_RSTORSSP, case IX86_BUILTIN_CLRSSBSY]:
1147 Generate DImode memory operand.
1148 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]
1149 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
1150 Update for parameterized name patterns.
1152 2020-08-13 Peter Bergner <bergner@linux.ibm.com>
1155 * config/rs6000/rs6000-call.c (rs6000_promote_function_mode): Disallow
1156 MMA types as return values.
1157 (rs6000_function_arg): Disallow MMA types as function arguments.
1159 2020-08-13 Richard Sandiford <richard.sandiford@arm.com>
1162 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
1164 * config/aarch64/aarch64.c (aarch64_function_value): Add if
1165 condition to check ag_mode after entering if condition of
1166 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
1167 set as false by -mgeneral-regs-only, report the diagnostic
1168 information of -mgeneral-regs-only imcompatible with the use
1169 of fp/simd register(s).
1171 2020-08-13 Martin Liska <mliska@suse.cz>
1174 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Mask m_value
1177 2020-08-13 Jakub Jelinek <jakub@redhat.com>
1179 * gimplify.c (gimplify_omp_taskloop_expr): New function.
1180 (gimplify_omp_for): Use it. For OMP_FOR_NON_RECTANGULAR
1181 loops adjust in outer taskloop the var-outer decls.
1182 * omp-expand.c (expand_omp_taskloop_for_inner): Handle non-rectangular
1184 (expand_omp_for): Don't reject non-rectangular taskloop.
1185 * omp-general.c (omp_extract_for_data): Don't assert that
1186 non-rectangular loops have static schedule, instead treat loop->m1
1187 or loop->m2 as if loop->n1 or loop->n2 is non-constant.
1189 2020-08-13 Hongtao Liu <hongtao.liu@intel.com>
1192 * config/i386/sse.md (<avx512>_load<mode>_mask,
1193 <avx512>_load<mode>_mask): Extend to generate blendm
1195 (<avx512>_blendm<mode>, <avx512>_blendm<mode>): Change
1196 define_insn to define_expand.
1198 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
1199 Uroš Bizjak <ubizjak@gmail.com>
1202 * config/i386/i386.md (peephole2): Only reorder register clearing
1203 instructions to allow use of xor for general registers.
1205 2020-08-12 Martin Liska <mliska@suse.cz>
1208 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Drop value bits
1209 for bits that are unknown.
1210 (ipcp_bits_lattice::set_to_constant): Likewise.
1211 * tree-ssa-ccp.c (get_default_value): Add sanity check that
1212 IPA CP bit info has all bits set to zero in bits that
1215 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
1217 * config/aarch64/aarch64.c (aarch64_function_value): Add if
1218 condition to check ag_mode after entering if condition of
1219 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
1220 set as false by -mgeneral-regs-only, report the diagnostic
1221 information of -mgeneral-regs-only imcompatible with the use
1222 of fp/simd register(s).
1224 2020-08-12 Jakub Jelinek <jakub@redhat.com>
1226 PR tree-optimization/96535
1227 * toplev.c (process_options): Move flag_unroll_loops and
1228 flag_cunroll_grow_size handling from here to ...
1229 * opts.c (finish_options): ... here. For flag_cunroll_grow_size,
1230 don't check for AUTODETECT_VALUE, but instead check
1231 opts_set->x_flag_cunroll_grow_size.
1232 * common.opt (funroll-completely-grow-size): Default to 0.
1233 * config/rs6000/rs6000.c (TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE):
1235 (rs6000_override_options_after_change): New function.
1236 (rs6000_option_override_internal): Call it. Move there the
1237 flag_cunroll_grow_size, unroll_only_small_loops and
1238 flag_rename_registers handling.
1240 2020-08-12 Tom de Vries <tdevries@suse.de>
1242 * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Make elt_size an
1243 unsigned HOST_WIDE_INT. Print init_frag.remaining using
1244 HOST_WIDE_INT_PRINT_UNSIGNED.
1246 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
1247 Uroš Bizjak <ubizjak@gmail.com>
1249 * config/i386/i386.md (peephole2): Reduce unnecessary
1250 register shuffling produced by register allocation.
1252 2020-08-12 Aldy Hernandez <aldyh@redhat.com>
1254 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use vec<>
1255 instead of std::vector<>.
1256 (evaluate_properties_for_edge): Same.
1257 (ipa_fn_summary_t::duplicate): Same.
1258 (estimate_ipcp_clone_size_and_time): Same.
1259 * vec.h (<T, A, vl_embed>::embedded_size): Change vec_embedded
1260 type to contain a char[].
1262 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
1265 * config/s390/s390.c (s390_cannot_force_const_mem): Reject an
1266 unary minus for everything not being a numeric constant.
1267 (legitimize_tls_address): Move a NEG out of the CONST rtx.
1269 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
1272 * config/s390/s390.h (TARGET_NONSIGNALING_VECTOR_COMPARE_OK): New
1274 * config/s390/vector.md (vcond_comparison_operator): Use new macro
1277 2020-08-11 Jakub Jelinek <jakub@redhat.com>
1279 PR rtl-optimization/96539
1280 * expr.c (emit_block_move_hints): Don't copy anything if x and y
1281 are the same and neither is MEM_VOLATILE_P.
1283 2020-08-11 Jakub Jelinek <jakub@redhat.com>
1286 * tree.c (get_narrower): Use TREE_TYPE (ret) instead of
1287 TREE_TYPE (win) for COMPOUND_EXPRs.
1289 2020-08-11 Jan Hubicka <hubicka@ucw.cz>
1291 * predict.c (not_loop_guard_equal_edge_p): New function.
1292 (maybe_predict_edge): New function.
1293 (predict_paths_for_bb): Use it.
1294 (predict_paths_leading_to_edge): Use it.
1296 2020-08-11 Martin Liska <mliska@suse.cz>
1298 * dbgcnt.def (DEBUG_COUNTER): Add ipa_cp_bits.
1299 * ipa-cp.c (ipcp_store_bits_results): Use it when we store known
1300 bits for parameters.
1302 2020-08-10 Marek Polacek <polacek@redhat.com>
1304 * doc/sourcebuild.texi: Document dg-ice.
1306 2020-08-10 Roger Sayle <roger@nextmovesoftware.com>
1308 * config/i386/i386-expand.c (ix86_expand_int_movcc): Expand
1309 signed MIN_EXPR against zero as "x < 0 ? x : 0" instead of
1310 "x <= 0 ? x : 0" to enable sign_bit_compare_p optimizations.
1312 2020-08-10 Aldy Hernandez <aldyh@redhat.com>
1314 * value-range.h (gt_ggc_mx): Declare inline.
1317 2020-08-10 Marc Glisse <marc.glisse@inria.fr>
1319 PR tree-optimization/95433
1320 * match.pd (X * C1 == C2): Handle wrapping overflow.
1321 * expr.c (maybe_optimize_mod_cmp): Qualify call to mod_inv.
1323 * wide-int.cc (mod_inv): ... here.
1324 * wide-int.h (mod_inv): Declare it.
1326 2020-08-10 Jan Hubicka <hubicka@ucw.cz>
1328 * predict.c (filter_predictions): Document semantics of filter.
1329 (equal_edge_p): Rename to ...
1330 (not_equal_edge_p): ... this; reverse semantics.
1331 (remove_predictions_associated_with_edge): Fix.
1333 2020-08-10 Hongtao Liu <hongtao.liu@intel.com>
1336 * config/i386/i386-expand.c (ix86_expand_sse_cmp): Refine for
1338 (ix86_expand_mask_vec_cmp): Change prototype.
1339 * config/i386/i386-protos.h (ix86_expand_mask_vec_cmp): Change prototype.
1340 * config/i386/i386.c (ix86_print_operand): Remove operand
1342 * config/i386/sse.md
1343 (*<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>): Deleted.
1344 (*<avx512>_cmp<mode>3<mask_scalar_merge_name>): Ditto.
1345 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>): Ditto.
1346 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
1347 avx512f_maskcmp<mode>3): Ditto.
1349 2020-08-09 Roger Sayle <roger@nextmovesoftware.com>
1351 * expmed.c (init_expmed_one_conv): Restore all->reg's mode.
1352 (init_expmed_one_mode): Set all->reg to desired mode.
1354 2020-08-08 Peter Bergner <bergner@linux.ibm.com>
1357 * config/rs6000/rs6000.c (rs6000_invalid_conversion): Use canonical
1358 types for type comparisons. Refactor code to simplify it.
1360 2020-08-08 Jakub Jelinek <jakub@redhat.com>
1363 * tree-nested.c (convert_nonlocal_omp_clauses): For
1364 OMP_CLAUSE_REDUCTION, OMP_CLAUSE_LASTPRIVATE and OMP_CLAUSE_LINEAR
1365 save info->new_local_var_chain around walks of the clause gimple
1366 sequences and declare_vars if needed into the sequence.
1368 2020-08-08 Jakub Jelinek <jakub@redhat.com>
1370 PR tree-optimization/96424
1371 * omp-expand.c: Include tree-eh.h.
1372 (expand_omp_for_init_vars): Handle -fexceptions -fnon-call-exceptions
1373 by forcing floating point comparison into a bool temporary.
1375 2020-08-07 Marc Glisse <marc.glisse@inria.fr>
1377 * generic-match-head.c (optimize_vectors_before_lowering_p): New
1379 * gimple-match-head.c (optimize_vectors_before_lowering_p):
1381 * match.pd ((v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Use it.
1383 2020-08-07 Richard Biener <rguenther@suse.de>
1385 PR tree-optimization/96514
1386 * tree-if-conv.c (if_convertible_bb_p): If the last stmt
1387 is a call that is control-altering, fail.
1389 2020-08-07 Jose E. Marchesi <jose.marchesi@oracle.com>
1391 * config/bpf/bpf.md: Remove trailing whitespaces.
1392 * config/bpf/constraints.md: Likewise.
1393 * config/bpf/predicates.md: Likewise.
1395 2020-08-07 Michael Meissner <meissner@linux.ibm.com>
1397 * config/rs6000/rs6000.md (bswaphi2_reg): Add ISA 3.1 support.
1398 (bswapsi2_reg): Add ISA 3.1 support.
1399 (bswapdi2): Rename bswapdi2_xxbrd to bswapdi2_brd.
1400 (bswapdi2_brd,bswapdi2_xxbrd): Rename. Add ISA 3.1 support.
1402 2020-08-07 Alan Modra <amodra@gmail.com>
1405 * config/rs6000/predicates.md (current_file_function_operand): Don't
1406 accept functions that differ in r2 usage.
1408 2020-08-06 Hans-Peter Nilsson <hp@bitrange.com>
1410 * config/mmix/mmix.md (MM): New mode_iterator.
1411 ("mov<mode>"): New expander to expand for all MM-modes.
1412 ("*movqi_expanded", "*movhi_expanded", "*movsi_expanded")
1413 ("*movsf_expanded", "*movdf_expanded"): Rename from the
1414 corresponding mov<M> named pattern. Add to the condition that
1415 either operand must be a register_operand.
1416 ("*movdi_expanded"): Similar, but also allow STCO in the condition.
1418 2020-08-06 Richard Sandiford <richard.sandiford@arm.com>
1421 * config/arm/arm.md (arm_stack_protect_test_insn): Zero out
1422 operand 2 after use.
1423 * config/arm/thumb1.md (thumb1_stack_protect_test_insn): Likewise.
1425 2020-08-06 Peter Bergner <bergner@linux.ibm.com>
1428 * config/rs6000/mma.md (*movpxi): Add xxsetaccz generation.
1429 Disable split for zero constant source operand.
1430 (mma_xxsetaccz): Change to define_expand. Call gen_movpxi.
1432 2020-08-06 Jakub Jelinek <jakub@redhat.com>
1434 PR tree-optimization/96480
1435 * tree-ssa-reassoc.c (suitable_cond_bb): Add TEST_SWAPPED_P argument.
1436 If TEST_BB ends in cond and has one edge to *OTHER_BB and another
1437 through an empty bb to that block too, if PHI args don't match, retry
1438 them through the other path from TEST_BB.
1439 (maybe_optimize_range_tests): Adjust callers. Handle such LAST_BB
1440 through inversion of the condition.
1442 2020-08-06 Jose E. Marchesi <jose.marchesi@oracle.com>
1444 * config/bpf/bpf-helpers.h (KERNEL_HELPER): Define.
1445 (KERNEL_VERSION): Remove.
1446 * config/bpf/bpf-helpers.def: Delete.
1447 * config/bpf/bpf.c (bpf_handle_fndecl_attribute): New function.
1448 (bpf_attribute_table): Define.
1449 (bpf_helper_names): Delete.
1450 (bpf_helper_code): Likewise.
1451 (enum bpf_builtins): Adjust to new helpers mechanism.
1452 (bpf_output_call): Likewise.
1453 (bpf_init_builtins): Likewise.
1454 (bpf_init_builtins): Likewise.
1455 * doc/extend.texi (BPF Function Attributes): New section.
1456 (BPF Kernel Helpers): Delete section.
1458 2020-08-06 Richard Biener <rguenther@suse.de>
1460 PR tree-optimization/96491
1461 * tree-ssa-sink.c (sink_common_stores_to_bb): Avoid
1462 sinking across abnormal edges.
1464 2020-08-06 Richard Biener <rguenther@suse.de>
1466 PR tree-optimization/96483
1467 * tree-ssa-pre.c (create_component_ref_by_pieces_1): Handle
1470 2020-08-06 Richard Biener <rguenther@suse.de>
1472 * graphite-isl-ast-to-gimple.c (ivs_params): Use hash_map instead
1474 (ivs_params_clear): Adjust.
1475 (gcc_expression_from_isl_ast_expr_id): Likewise.
1476 (graphite_create_new_loop): Likewise.
1477 (add_parameters_to_ivs_params): Likewise.
1479 2020-08-06 Roger Sayle <roger@nextmovesoftware.com>
1480 Uroš Bizjak <ubizjak@gmail.com>
1482 * config/i386/i386.md (MAXMIN_IMODE): No longer needed.
1483 (<maxmin><mode>3): Support SWI248 and general_operand for
1484 second operand, when TARGET_CMOVE.
1485 (<maxmin><mode>3_1 splitter): Optimize comparisons against
1486 0, 1 and -1 to use "test" instead of "cmp".
1487 (*<maxmin>di3_doubleword): Likewise, allow general_operand
1488 and enable on TARGET_CMOVE.
1489 (peephole2): Convert clearing a register after a flag setting
1490 instruction into an xor followed by the original flag setter.
1492 2020-08-06 Gerald Pfeifer <gerald@pfeifer.com>
1494 * ipa-fnsummary.c (INCLUDE_VECTOR): Define.
1495 Remove direct inclusion of <vector>.
1497 2020-08-06 Kewen Lin <linkw@gcc.gnu.org>
1499 * config/rs6000/rs6000.c (rs6000_adjust_vect_cost_per_loop): New
1501 (rs6000_finish_cost): Call rs6000_adjust_vect_cost_per_loop.
1502 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Add cost
1503 modeling for vector with length.
1504 (vect_rgroup_iv_might_wrap_p): New function, factored out from...
1505 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): ...this.
1506 Update function comment.
1507 * tree-vect-stmts.c (vect_gen_len): Update function comment.
1508 * tree-vectorizer.h (vect_rgroup_iv_might_wrap_p): New declare.
1510 2020-08-06 Kewen Lin <linkw@linux.ibm.com>
1512 * tree-vectorizer.c (try_vectorize_loop_1): Skip the epilogue loops
1515 2020-08-05 Marc Glisse <marc.glisse@inria.fr>
1517 PR tree-optimization/95906
1519 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
1520 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): New transformations.
1521 (op (c ? a : b)): Update to match the new transformations.
1523 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
1526 * config/aarch64/aarch64.md (stack_protect_test_<mode>): Set the
1527 CC register directly, instead of a GPR. Replace the original GPR
1528 destination with an extra scratch register. Zero out operand 3
1530 (stack_protect_test): Update accordingly.
1532 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
1534 * config/aarch64/aarch64.md (load_pair_sw_<SX:mode><SX2:mode>)
1535 (load_pair_dw_<DX:mode><DX2:mode>, load_pair_dw_tftf)
1536 (store_pair_sw_<SX:mode><SX2:mode>)
1537 (store_pair_dw_<DX:mode><DX2:mode>, store_pair_dw_tftf)
1538 (*load_pair_extendsidi2_aarch64)
1539 (*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand.
1540 * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>)
1541 (vec_store_pair<DREG:mode><DREG2:mode>, load_pair<VQ:mode><VQ2:mode>)
1542 (vec_store_pair<VQ:mode><VQ2:mode>): Likewise.
1544 2020-08-05 Richard Biener <rguenther@suse.de>
1546 * tree-ssa-loop-im.c (invariantness_dom_walker): Remove.
1547 (invariantness_dom_walker::before_dom_children): Move to ...
1548 (compute_invariantness): ... this function.
1549 (move_computations): Inline ...
1550 (tree_ssa_lim): ... here, share RPO order and avoid some
1552 (analyze_memory_references): Remove sorting of location
1553 lists, instead assert they are sorted already when checking.
1554 (prev_flag_edges): Remove.
1555 (execute_sm_if_changed): Pass down and adjust prev edge state.
1556 (execute_sm_exit): Likewise.
1557 (hoist_memory_references): Likewise. Commit edge insertions
1558 of each processed exit.
1559 (store_motion_loop): Do not commit edge insertions on all
1560 edges in the function.
1561 (tree_ssa_lim_initialize): Do not call alloc_aux_for_edges.
1562 (tree_ssa_lim_finalize): Do not call free_aux_for_edges.
1564 2020-08-05 Richard Biener <rguenther@suse.de>
1566 * genmatch.c (fail_label): New global.
1567 (expr::gen_transform): Branch to fail_label instead of
1568 returning. Fix indent of call argument checking.
1569 (dt_simplify::gen_1): Compute and emit fail_label, branch
1570 to it instead of returning early.
1572 2020-08-05 Jakub Jelinek <jakub@redhat.com>
1574 * omp-expand.c (expand_omp_for): Don't disallow combined non-rectangular
1577 2020-08-05 Jakub Jelinek <jakub@redhat.com>
1580 * omp-low.c (lower_omp_taskreg): Call lower_reduction_clauses even in
1583 2020-08-05 Jakub Jelinek <jakub@redhat.com>
1585 * omp-expand.c (expand_omp_for_init_counts): Remember
1586 first_inner_iterations, factor and n1o from the number of iterations
1588 (expand_omp_for_init_vars): Use more efficient logical iteration number
1589 to actual iterator values computation even for non-rectangular loops
1590 where number of loop iterations could not be computed at compile time.
1592 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1594 * config/rs6000/altivec.h (vec_blendv, vec_permx): Add define.
1595 * config/rs6000/altivec.md (UNSPEC_XXBLEND, UNSPEC_XXPERMX.): New
1597 (VM3): New define_mode.
1598 (VM3_char): New define_attr.
1599 (xxblend_<mode> mode VM3): New define_insn.
1600 (xxpermx): New define_expand.
1601 (xxpermx_inst): New define_insn.
1602 * config/rs6000/rs6000-builtin.def (VXXBLEND_V16QI, VXXBLEND_V8HI,
1603 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): New
1604 BU_P10V_3 definitions.
1605 (XXBLEND): New BU_P10_OVERLOAD_3 definition.
1606 (XXPERMX): New BU_P10_OVERLOAD_4 definition.
1607 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1608 (P10_BUILTIN_VXXPERMX): Add if statement.
1609 * config/rs6000/rs6000-call.c (P10_BUILTIN_VXXBLEND_V16QI,
1610 P10_BUILTIN_VXXBLEND_V8HI, P10_BUILTIN_VXXBLEND_V4SI,
1611 P10_BUILTIN_VXXBLEND_V2DI, P10_BUILTIN_VXXBLEND_V4SF,
1612 P10_BUILTIN_VXXBLEND_V2DF, P10_BUILTIN_VXXPERMX): Define
1613 overloaded arguments.
1614 (rs6000_expand_quaternop_builtin): Add if case for CODE_FOR_xxpermx.
1615 (builtin_quaternary_function_type): Add v16uqi_type and xxpermx_type
1616 variables, add case statement for P10_BUILTIN_VXXPERMX.
1617 (builtin_function_type): Add case statements for
1618 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
1619 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI.
1620 * doc/extend.texi: Add documentation for vec_blendv and vec_permx.
1622 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1624 * config/rs6000/altivec.h (vec_splati, vec_splatid, vec_splati_ins):
1626 * config/rs6000/altivec.md (UNSPEC_XXSPLTIW, UNSPEC_XXSPLTID,
1627 UNSPEC_XXSPLTI32DX): New.
1628 (vxxspltiw_v4si, vxxspltiw_v4sf_inst, vxxspltidp_v2df_inst,
1629 vxxsplti32dx_v4si_inst, vxxsplti32dx_v4sf_inst): New define_insn.
1630 (vxxspltiw_v4sf, vxxspltidp_v2df, vxxsplti32dx_v4si,
1631 vxxsplti32dx_v4sf.): New define_expands.
1632 * config/rs6000/predicates.md (u1bit_cint_operand,
1633 s32bit_cint_operand, c32bit_cint_operand): New predicates.
1634 * config/rs6000/rs6000-builtin.def (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF,
1635 VXXSPLTID): New definitions.
1636 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF): New BU_P10V_3
1638 (XXSPLTIW, XXSPLTID): New definitions.
1639 (XXSPLTI32DX): Add definitions.
1640 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XXSPLTIW,
1641 P10_BUILTIN_VEC_XXSPLTID, P10_BUILTIN_VEC_XXSPLTI32DX):
1643 * config/rs6000/rs6000-protos.h (rs6000_constF32toI32): New extern
1645 * config/rs6000/rs6000.c (rs6000_constF32toI32): New function.
1646 * doc/extend.texi: Add documentation for vec_splati,
1647 vec_splatid, and vec_splati_ins.
1649 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1651 * config/rs6000/altivec.h (vec_sldb, vec_srdb): New defines.
1652 * config/rs6000/altivec.md (UNSPEC_SLDB, UNSPEC_SRDB): New.
1653 (SLDB_lr): New attribute.
1654 (VSHIFT_DBL_LR): New iterator.
1655 (vs<SLDB_lr>db_<mode>): New define_insn.
1656 * config/rs6000/rs6000-builtin.def (VSLDB_V16QI, VSLDB_V8HI,
1657 VSLDB_V4SI, VSLDB_V2DI, VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI,
1658 VSRDB_V2DI): New BU_P10V_3 definitions.
1659 (SLDB, SRDB): New BU_P10_OVERLOAD_3 definitions.
1660 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_SLDB,
1661 P10_BUILTIN_VEC_SRDB): New definitions.
1662 (rs6000_expand_ternop_builtin) [CODE_FOR_vsldb_v16qi,
1663 CODE_FOR_vsldb_v8hi, CODE_FOR_vsldb_v4si, CODE_FOR_vsldb_v2di,
1664 CODE_FOR_vsrdb_v16qi, CODE_FOR_vsrdb_v8hi, CODE_FOR_vsrdb_v4si,
1665 CODE_FOR_vsrdb_v2di]: Add clauses.
1666 * doc/extend.texi: Add description for vec_sldb and vec_srdb.
1668 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1670 * config/rs6000/altivec.h: Add define for vec_replace_elt and
1671 vec_replace_unaligned.
1672 * config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New
1674 (REPLACE_ELT): New mode iterator.
1675 (REPLACE_ELT_char, REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes.
1676 (vreplace_un_<mode>, vreplace_elt_<mode>_inst): New.
1677 * config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI,
1678 VREPLACE_ELT_UV4SI, VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI,
1679 VREPLACE_ELT_V2DF, VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI,
1680 VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
1681 VREPLACE_UN_V2DF, (REPLACE_ELT, REPLACE_UN, VREPLACE_ELT_V2DI): New builtin
1683 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_REPLACE_ELT,
1684 P10_BUILTIN_VEC_REPLACE_UN): New builtin argument definitions.
1685 (rs6000_expand_quaternop_builtin): Add 3rd argument checks for
1686 CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf,
1687 CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf.
1688 (builtin_function_type) [P10_BUILTIN_VREPLACE_ELT_UV4SI,
1689 P10_BUILTIN_VREPLACE_ELT_UV2DI, P10_BUILTIN_VREPLACE_UN_UV4SI,
1690 P10_BUILTIN_VREPLACE_UN_UV2DI]: New cases.
1691 * doc/extend.texi: Add description for vec_replace_elt and
1692 vec_replace_unaligned builtins.
1694 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1696 * config/rs6000/altivec.h (vec_insertl, vec_inserth): New defines.
1697 * config/rs6000/rs6000-builtin.def (VINSERTGPRBL, VINSERTGPRHL,
1698 VINSERTGPRWL, VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL,
1699 VINSERTGPRBR, VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR,
1700 VINSERTVPRHR, VINSERTVPRWR): New builtins.
1701 (INSERTL, INSERTH): New builtins.
1702 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_INSERTL,
1703 P10_BUILTIN_VEC_INSERTH): New overloaded definitions.
1704 (P10_BUILTIN_VINSERTGPRBL, P10_BUILTIN_VINSERTGPRHL,
1705 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
1706 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
1707 P10_BUILTIN_VINSERTVPRWL): Add case entries.
1708 * config/rs6000/vsx.md (define_c_enum): Add UNSPEC_INSERTL,
1710 (define_expand): Add vinsertvl_<mode>, vinsertvr_<mode>,
1711 vinsertgl_<mode>, vinsertgr_<mode>, mode is VI2.
1712 (define_ins): vinsertvl_internal_<mode>, vinsertvr_internal_<mode>,
1713 vinsertgl_internal_<mode>, vinsertgr_internal_<mode>, mode VEC_I.
1714 * doc/extend.texi: Add documentation for vec_insertl, vec_inserth.
1716 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1718 * config/rs6000/altivec.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
1719 (vextractl<mode>, vextractr<mode>)
1720 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
1722 * config/rs6000/vsx.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
1723 (vextractl<mode>, vextractr<mode>)
1724 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
1726 * doc/extend.texi: Update documentation for vec_extractl.
1727 Replace builtin name vec_extractr with vec_extracth. Update
1728 description of vec_extracth.
1730 2020-08-04 Jim Wilson <jimw@sifive.com>
1732 * doc/invoke.texi (AArch64 Options): Delete duplicate
1733 -mstack-protector-guard docs.
1735 2020-08-04 Roger Sayle <roger@nextmovesoftware.com>
1737 * config/nvptx/nvptx.md (smulhi3_highpart, smulsi3_highpart)
1738 (umulhi3_highpart, umulsi3_highpart): New instructions.
1740 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
1742 * config/gcn/gcn-run.c (R_AMDGPU_NONE): Delete.
1743 (R_AMDGPU_ABS32_LO): Delete.
1744 (R_AMDGPU_ABS32_HI): Delete.
1745 (R_AMDGPU_ABS64): Delete.
1746 (R_AMDGPU_REL32): Delete.
1747 (R_AMDGPU_REL64): Delete.
1748 (R_AMDGPU_ABS32): Delete.
1749 (R_AMDGPU_GOTPCREL): Delete.
1750 (R_AMDGPU_GOTPCREL32_LO): Delete.
1751 (R_AMDGPU_GOTPCREL32_HI): Delete.
1752 (R_AMDGPU_REL32_LO): Delete.
1753 (R_AMDGPU_REL32_HI): Delete.
1755 (R_AMDGPU_RELATIVE64): Delete.
1757 2020-08-04 Omar Tahir <omar.tahir@arm.com>
1759 * config/arm/arm-cpus.in (armv8.1-m.main): Tune for Cortex-M55.
1761 2020-08-04 Hu Jiangping <hujiangping@cn.fujitsu.com>
1763 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Delete
1764 redundant extra_cost variable.
1766 2020-08-04 Zhiheng Xie <xiezhiheng@huawei.com>
1768 * config/aarch64/aarch64-builtins.c (aarch64_call_properties):
1769 Use FLOAT_MODE_P macro instead of enumerating all floating-point
1770 modes and add global flag FLAG_AUTO_FP.
1772 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1774 * doc/extend.texi (symver): Add @cindex for symver function attribute.
1776 2020-08-04 Marc Glisse <marc.glisse@inria.fr>
1778 PR tree-optimization/95433
1779 * match.pd (X * C1 == C2): New transformation.
1781 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1783 * gimple-ssa-sprintf.c (get_int_range): Adjust for irange API.
1784 (format_integer): Same.
1785 (handle_printf_call): Same.
1787 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
1789 * config/gcn/gcn.md ("<expander>ti3"): New.
1791 2020-08-04 Richard Biener <rguenther@suse.de>
1793 PR tree-optimization/88240
1794 * tree-ssa-sccvn.h (vn_reference_s::punned): New flag.
1795 * tree-ssa-sccvn.c (vn_reference_insert): Initialize punned.
1796 (vn_reference_insert_pieces): Likewise.
1797 (visit_reference_op_call): Likewise.
1798 (visit_reference_op_load): Track whether a ref was punned.
1799 * tree-ssa-pre.c (do_hoist_insertion): Refuse to perform hoist
1800 insertion on punned floating point loads.
1802 2020-08-04 Sudakshina Das <sudi.das@arm.com>
1804 * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case
1806 (aarch64_gen_load_pair): Likewise.
1807 (aarch64_copy_one_block_and_progress_pointers): Handle 256 bit copy.
1808 (aarch64_expand_cpymem): Expand copy_limit to 256bits where
1811 2020-08-04 Andrea Corallo <andrea.corallo@arm.com>
1813 * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing
1815 * doc/sourcebuild.texi (aarch64_fjcvtzs_hw) Document new
1816 target supports option.
1818 2020-08-04 Tom de Vries <tdevries@suse.de>
1821 * config/nvptx/nvptx.c (nvptx_gen_shuffle): Handle V2SI/V2DI.
1823 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1826 * tree-vect-generic.c (expand_vector_conversion): Replace .VEC_CONVERT
1827 call with GIMPLE_NOP if there is no lhs.
1829 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1832 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Add IS_DEBUG
1833 argument. Return false instead of gcc_unreachable if it is true and
1834 get_addr_base_and_unit_offset returns NULL.
1835 (fold_stmt_1) <case GIMPLE_DEBUG>: Adjust caller.
1837 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1839 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional):
1840 Call is_gimple_min_invariant dropped from previous patch.
1842 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1844 * omp-expand.c (expand_omp_for_init_counts): For triangular loops
1845 compute number of iterations at runtime more efficiently.
1846 (expand_omp_for_init_vars): Adjust immediate dominators.
1847 (extract_omp_for_update_vars): Likewise.
1849 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1851 * vr-values.c (simplify_using_ranges::two_valued_val_range_p):
1854 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1856 * vr-values.c (simplify_conversion_using_ranges): Convert to irange API.
1858 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1860 * vr-values.c (test_for_singularity): Use irange API.
1861 (simplify_using_ranges::simplify_cond_using_ranges_1): Do not
1862 special case VR_RANGE.
1864 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1866 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional): Adjust
1869 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1871 * vr-values.c (simplify_using_ranges::op_with_boolean_value_range_p): Adjust
1874 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1876 * tree-ssanames.c (get_range_info): Use irange instead of value_range.
1877 * tree-ssanames.h (get_range_info): Same.
1879 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1881 * fold-const.c (expr_not_equal_to): Adjust for irange API.
1883 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1885 * builtins.c (determine_block_size): Remove ad-hoc range canonicalization.
1887 2020-08-04 Xionghu Luo <luoxhu@linux.ibm.com>
1889 PR rtl-optimization/71309
1890 * dse.c (find_shift_sequence): Use subreg of shifted from high part
1891 register to avoid loading from address.
1893 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
1895 * doc/cpp.texi (Variadic Macros): Use the exact ... token in
1898 2020-08-03 Nathan Sidwell <nathan@acm.org>
1900 * doc/invoke.texi: Refer to c++20
1902 2020-08-03 Julian Brown <julian@codesourcery.com>
1903 Thomas Schwinge <thomas@codesourcery.com>
1905 * gimplify.c (gimplify_omp_target_update): Allow GOMP_MAP_TO_PSET
1906 without a preceding data-movement mapping.
1908 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
1910 * config/darwin.h (ASM_DECLARE_FUNCTION_NAME): UNDEF before
1912 (DEF_MIN_OSX_VERSION): Only define if there's no existing
1915 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
1917 * config/darwin.c (IN_TARGET_CODE): Remove.
1918 (darwin_mergeable_constant_section): Handle poly-int machine modes.
1919 (machopic_select_rtx_section): Likewise.
1921 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
1923 PR tree-optimization/96430
1924 * range-op.cc (operator_tests): Do not shift by 31 on targets with
1925 integer's smaller than 32 bits.
1927 2020-08-03 Martin Jambor <mjambor@suse.cz>
1929 * hsa-brig-format.h: Moved to brig/brigfrontend.
1930 * hsa-brig.c: Removed.
1931 * hsa-builtins.def: Likewise.
1932 * hsa-common.c: Likewise.
1933 * hsa-common.h: Likewise.
1934 * hsa-dump.c: Likewise.
1935 * hsa-gen.c: Likewise.
1936 * hsa-regalloc.c: Likewise.
1937 * ipa-hsa.c: Likewise.
1938 * omp-grid.c: Likewise.
1939 * omp-grid.h: Likewise.
1940 * Makefile.in (BUILTINS_DEF): Remove hsa-builtins.def.
1941 (OBJS): Remove hsa-common.o, hsa-gen.o, hsa-regalloc.o, hsa-brig.o,
1942 hsa-dump.o, ipa-hsa.c and omp-grid.o.
1943 (GTFILES): Removed hsa-common.c and omp-expand.c.
1944 * builtins.def: Remove processing of hsa-builtins.def.
1945 (DEF_HSA_BUILTIN): Remove.
1946 * common.opt (flag_disable_hsa): Remove.
1948 * config.in (ENABLE_HSA): Removed.
1949 * configure.ac: Removed handling configuration for hsa offloading.
1950 (ENABLE_HSA): Removed.
1951 * configure: Regenerated.
1952 * doc/install.texi (--enable-offload-targets): Remove hsa from the
1954 (--with-hsa-runtime): Reword to reference any HSA run-time, not
1955 specifically HSA offloading.
1956 * doc/invoke.texi (Option Summary): Remove -Whsa.
1957 (Warning Options): Likewise.
1958 (Optimize Options): Remove hsa-gen-debug-stores.
1959 * doc/passes.texi (Regular IPA passes): Remove section on IPA HSA
1961 * gimple-low.c (lower_stmt): Remove GIMPLE_OMP_GRID_BODY case.
1962 * gimple-pretty-print.c (dump_gimple_omp_for): Likewise.
1963 (dump_gimple_omp_block): Likewise.
1964 (pp_gimple_stmt_1): Likewise.
1965 * gimple-walk.c (walk_gimple_stmt): Likewise.
1966 * gimple.c (gimple_build_omp_grid_body): Removed function.
1967 (gimple_copy): Remove GIMPLE_OMP_GRID_BODY case.
1968 * gimple.def (GIMPLE_OMP_GRID_BODY): Removed.
1969 * gimple.h (gf_mask): Removed GF_OMP_PARALLEL_GRID_PHONY,
1970 OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY,
1971 GF_OMP_FOR_GRID_INTRA_GROUP, GF_OMP_FOR_GRID_GROUP_ITER and
1972 GF_OMP_TEAMS_GRID_PHONY. Renumbered GF_OMP_FOR_KIND_SIMD and
1974 (gimple_build_omp_grid_body): Removed declaration.
1975 (gimple_has_substatements): Remove GIMPLE_OMP_GRID_BODY case.
1976 (gimple_omp_for_grid_phony): Removed.
1977 (gimple_omp_for_set_grid_phony): Likewise.
1978 (gimple_omp_for_grid_intra_group): Likewise.
1979 (gimple_omp_for_grid_intra_group): Likewise.
1980 (gimple_omp_for_grid_group_iter): Likewise.
1981 (gimple_omp_for_set_grid_group_iter): Likewise.
1982 (gimple_omp_parallel_grid_phony): Likewise.
1983 (gimple_omp_parallel_set_grid_phony): Likewise.
1984 (gimple_omp_teams_grid_phony): Likewise.
1985 (gimple_omp_teams_set_grid_phony): Likewise.
1986 (CASE_GIMPLE_OMP): Remove GIMPLE_OMP_GRID_BODY case.
1987 * lto-section-in.c (lto_section_name): Removed hsa.
1988 * lto-streamer.h (lto_section_type): Removed LTO_section_ipa_hsa.
1989 * lto-wrapper.c (compile_images_for_offload_targets): Remove special
1991 * omp-expand.c: Do not include hsa-common.h and gt-omp-expand.h.
1992 (parallel_needs_hsa_kernel_p): Removed.
1993 (grid_launch_attributes_trees): Likewise.
1994 (grid_launch_attributes_trees): Likewise.
1995 (grid_create_kernel_launch_attr_types): Likewise.
1996 (grid_insert_store_range_dim): Likewise.
1997 (grid_get_kernel_launch_attributes): Likewise.
1998 (get_target_arguments): Remove code passing HSA grid sizes.
1999 (grid_expand_omp_for_loop): Remove.
2000 (grid_arg_decl_map): Likewise.
2001 (grid_remap_kernel_arg_accesses): Likewise.
2002 (grid_expand_target_grid_body): Likewise.
2003 (expand_omp): Remove call to grid_expand_target_grid_body.
2004 (omp_make_gimple_edges): Remove GIMPLE_OMP_GRID_BODY case.
2005 * omp-general.c: Do not include hsa-common.h.
2006 (omp_maybe_offloaded): Do not check for HSA offloading.
2007 (omp_context_selector_matches): Likewise.
2008 * omp-low.c: Do not include hsa-common.h and omp-grid.h.
2009 (build_outer_var_ref): Remove handling of GIMPLE_OMP_GRID_BODY.
2010 (scan_sharing_clauses): Remove handling of OMP_CLAUSE__GRIDDIM_.
2011 (scan_omp_parallel): Remove handling of the phoney variant.
2012 (check_omp_nesting_restrictions): Remove handling of
2013 GIMPLE_OMP_GRID_BODY and GF_OMP_FOR_KIND_GRID_LOOP.
2014 (scan_omp_1_stmt): Remove handling of GIMPLE_OMP_GRID_BODY.
2015 (lower_omp_for_lastprivate): Remove handling of gridified loops.
2016 (lower_omp_for): Remove phony loop handling.
2017 (lower_omp_taskreg): Remove phony construct handling.
2018 (lower_omp_teams): Likewise.
2019 (lower_omp_grid_body): Removed.
2020 (lower_omp_1): Remove GIMPLE_OMP_GRID_BODY case.
2021 (execute_lower_omp): Do not call omp_grid_gridify_all_targets.
2022 * opts.c (common_handle_option): Do not handle hsa when processing
2024 * params.opt (hsa-gen-debug-stores): Remove.
2025 * passes.def: Remove pass_ipa_hsa and pass_gen_hsail.
2026 * timevar.def: Remove TV_IPA_HSA.
2027 * toplev.c: Do not include hsa-common.h.
2028 (compile_file): Do not call hsa_output_brig.
2029 * tree-core.h (enum omp_clause_code): Remove OMP_CLAUSE__GRIDDIM_.
2030 (tree_omp_clause): Remove union field dimension.
2031 * tree-nested.c (convert_nonlocal_omp_clauses): Remove the
2032 OMP_CLAUSE__GRIDDIM_ case.
2033 (convert_local_omp_clauses): Likewise.
2034 * tree-pass.h (make_pass_gen_hsail): Remove declaration.
2035 (make_pass_ipa_hsa): Likewise.
2036 * tree-pretty-print.c (dump_omp_clause): Remove GIMPLE_OMP_GRID_BODY
2038 * tree.c (omp_clause_num_ops): Remove the element corresponding to
2039 OMP_CLAUSE__GRIDDIM_.
2040 (omp_clause_code_name): Likewise.
2041 (walk_tree_1): Remove GIMPLE_OMP_GRID_BODY case.
2042 * tree.h (OMP_CLAUSE__GRIDDIM__DIMENSION): Remove.
2043 (OMP_CLAUSE__GRIDDIM__SIZE): Likewise.
2044 (OMP_CLAUSE__GRIDDIM__GROUP): Likewise.
2046 2020-08-03 Bu Le <bule1@huawei.com>
2048 * config/aarch64/aarch64-sve.md (sub<mode>3): Add support for
2051 2020-08-03 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2053 * config/msp430/msp430.h (ASM_SPEC): Don't pass on "-md" option.
2055 2020-08-03 Yunde Zhong <zhongyunde@huawei.com>
2057 PR rtl-optimization/95696
2058 * regrename.c (regrename_analyze): New param include_all_block_p
2059 with default value TRUE. If set to false, avoid disrupting SMS
2061 * regrename.h (regrename_analyze): Adjust prototype.
2063 2020-08-03 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
2065 * doc/tm.texi.in (VECTOR_STORE_FLAG_VALUE): Fix a typo.
2066 * doc/tm.texi: Regenerate.
2068 2020-08-03 Richard Sandiford <richard.sandiford@arm.com>
2070 * doc/invoke.texi: Add missing comma after octeontx2f95mm entry.
2072 2020-08-03 Qian jianhua <qianjh@cn.fujitsu.com>
2074 * config/aarch64/aarch64-cores.def (a64fx): New core.
2075 * config/aarch64/aarch64-tune.md: Regenerated.
2076 * config/aarch64/aarch64.c (a64fx_prefetch_tune, a64fx_tunings): New.
2077 * doc/invoke.texi: Add a64fx to the list.
2079 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
2081 PR rtl-optimization/61494
2082 * simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't
2083 simplify x - 0.0 with -fsignaling-nans.
2085 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
2087 * genmatch.c (decision_tree::gen): Emit stub functions for
2088 tree code operand counts that have no simplifications.
2089 (main): Correct comment typo.
2091 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
2093 * gimple-ssa-sprintf.c: Fix typos in comments.
2095 2020-08-03 Tamar Christina <tamar.christina@arm.com>
2097 * config/aarch64/driver-aarch64.c (readline): Check return value fgets.
2099 2020-08-03 Richard Biener <rguenther@suse.de>
2101 * doc/match-and-simplify.texi: Amend accordingly.
2103 2020-08-03 Richard Biener <rguenther@suse.de>
2105 * genmatch.c (parser::gimple): New.
2106 (parser::parser): Initialize gimple flag member.
2107 (parser::parse_expr): Error on ! operator modifier when
2108 not targeting GIMPLE.
2109 (main): Pass down gimple flag to parser ctor.
2111 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
2113 * Makefile.in (GTFILES): Move value-range.h up.
2114 * gengtype-lex.l: Set yylval to handle GTY markers on templates.
2115 * ipa-cp.c (initialize_node_lattices): Call value_range
2117 (ipcp_propagate_stage): Use in-place new so value_range construct
2119 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use std
2120 vec instead of GCC's vec<>.
2121 (evaluate_properties_for_edge): Adjust for std vec.
2122 (ipa_fn_summary_t::duplicate): Same.
2123 (estimate_ipcp_clone_size_and_time): Same.
2124 * ipa-prop.c (ipa_get_value_range): Use in-place new for
2126 * ipa-prop.h (struct GTY): Remove class keyword for m_vr.
2127 * range-op.cc (empty_range_check): Rename to...
2128 (empty_range_varying): ...this and adjust for varying.
2129 (undefined_shift_range_check): Adjust for irange.
2130 (range_operator::wi_fold): Same.
2131 (range_operator::fold_range): Adjust for irange. Special case
2132 single pairs for performance.
2133 (range_operator::op1_range): Adjust for irange.
2134 (range_operator::op2_range): Same.
2135 (value_range_from_overflowed_bounds): Same.
2136 (value_range_with_overflow): Same.
2137 (create_possibly_reversed_range): Same.
2139 (range_false): Same.
2140 (range_true_and_false): Same.
2141 (get_bool_state): Adjust for irange and tweak for performance.
2142 (operator_equal::fold_range): Adjust for irange.
2143 (operator_equal::op1_range): Same.
2144 (operator_equal::op2_range): Same.
2145 (operator_not_equal::fold_range): Same.
2146 (operator_not_equal::op1_range): Same.
2147 (operator_not_equal::op2_range): Same.
2152 (operator_lt::fold_range): Same.
2153 (operator_lt::op1_range): Same.
2154 (operator_lt::op2_range): Same.
2155 (operator_le::fold_range): Same.
2156 (operator_le::op1_range): Same.
2157 (operator_le::op2_range): Same.
2158 (operator_gt::fold_range): Same.
2159 (operator_gt::op1_range): Same.
2160 (operator_gt::op2_range): Same.
2161 (operator_ge::fold_range): Same.
2162 (operator_ge::op1_range): Same.
2163 (operator_ge::op2_range): Same.
2164 (operator_plus::wi_fold): Same.
2165 (operator_plus::op1_range): Same.
2166 (operator_plus::op2_range): Same.
2167 (operator_minus::wi_fold): Same.
2168 (operator_minus::op1_range): Same.
2169 (operator_minus::op2_range): Same.
2170 (operator_min::wi_fold): Same.
2171 (operator_max::wi_fold): Same.
2172 (cross_product_operator::wi_cross_product): Same.
2173 (operator_mult::op1_range): New.
2174 (operator_mult::op2_range): New.
2175 (operator_mult::wi_fold): Adjust for irange.
2176 (operator_div::wi_fold): Same.
2177 (operator_exact_divide::op1_range): Same.
2178 (operator_lshift::fold_range): Same.
2179 (operator_lshift::wi_fold): Same.
2180 (operator_lshift::op1_range): New.
2181 (operator_rshift::op1_range): New.
2182 (operator_rshift::fold_range): Adjust for irange.
2183 (operator_rshift::wi_fold): Same.
2184 (operator_cast::truncating_cast_p): Abstract out from
2185 operator_cast::fold_range.
2186 (operator_cast::fold_range): Adjust for irange and tweak for
2188 (operator_cast::inside_domain_p): Abstract out from fold_range.
2189 (operator_cast::fold_pair): Same.
2190 (operator_cast::op1_range): Use abstracted methods above. Adjust
2191 for irange and tweak for performance.
2192 (operator_logical_and::fold_range): Adjust for irange.
2193 (operator_logical_and::op1_range): Same.
2194 (operator_logical_and::op2_range): Same.
2195 (unsigned_singleton_p): New.
2196 (operator_bitwise_and::remove_impossible_ranges): New.
2197 (operator_bitwise_and::fold_range): New.
2198 (wi_optimize_and_or): Adjust for irange.
2199 (operator_bitwise_and::wi_fold): Same.
2200 (set_nonzero_range_from_mask): New.
2201 (operator_bitwise_and::simple_op1_range_solver): New.
2202 (operator_bitwise_and::op1_range): Adjust for irange.
2203 (operator_bitwise_and::op2_range): Same.
2204 (operator_logical_or::fold_range): Same.
2205 (operator_logical_or::op1_range): Same.
2206 (operator_logical_or::op2_range): Same.
2207 (operator_bitwise_or::wi_fold): Same.
2208 (operator_bitwise_or::op1_range): Same.
2209 (operator_bitwise_or::op2_range): Same.
2210 (operator_bitwise_xor::wi_fold): Same.
2211 (operator_bitwise_xor::op1_range): New.
2212 (operator_bitwise_xor::op2_range): New.
2213 (operator_trunc_mod::wi_fold): Adjust for irange.
2214 (operator_logical_not::fold_range): Same.
2215 (operator_logical_not::op1_range): Same.
2216 (operator_bitwise_not::fold_range): Same.
2217 (operator_bitwise_not::op1_range): Same.
2218 (operator_cst::fold_range): Same.
2219 (operator_identity::fold_range): Same.
2220 (operator_identity::op1_range): Same.
2221 (class operator_unknown): New.
2222 (operator_unknown::fold_range): New.
2223 (class operator_abs): Adjust for irange.
2224 (operator_abs::wi_fold): Same.
2225 (operator_abs::op1_range): Same.
2226 (operator_absu::wi_fold): Same.
2227 (class operator_negate): Same.
2228 (operator_negate::fold_range): Same.
2229 (operator_negate::op1_range): Same.
2230 (operator_addr_expr::fold_range): Same.
2231 (operator_addr_expr::op1_range): Same.
2232 (pointer_plus_operator::wi_fold): Same.
2233 (pointer_min_max_operator::wi_fold): Same.
2234 (pointer_and_operator::wi_fold): Same.
2235 (pointer_or_operator::op1_range): New.
2236 (pointer_or_operator::op2_range): New.
2237 (pointer_or_operator::wi_fold): Adjust for irange.
2238 (integral_table::integral_table): Add entries for IMAGPART_EXPR
2239 and POINTER_DIFF_EXPR.
2240 (range_cast): Adjust for irange.
2241 (build_range3): New.
2242 (range3_tests): New.
2243 (widest_irange_tests): New.
2244 (multi_precision_range_tests): New.
2245 (operator_tests): New.
2247 * range-op.h (class range_operator): Adjust for irange.
2249 * tree-vrp.c (range_fold_binary_symbolics_p): Adjust for irange and
2250 tweak for performance.
2251 (range_fold_binary_expr): Same.
2252 (masked_increment): Change to extern.
2253 * tree-vrp.h (masked_increment): New.
2254 * tree.c (cache_wide_int_in_type_cache): New function abstracted
2255 out from wide_int_to_tree_1.
2256 (wide_int_to_tree_1): Cache 0, 1, and MAX for pointers.
2257 * value-range-equiv.cc (value_range_equiv::deep_copy): Use kind
2259 (value_range_equiv::move): Same.
2260 (value_range_equiv::check): Adjust for irange.
2261 (value_range_equiv::intersect): Same.
2262 (value_range_equiv::union_): Same.
2263 (value_range_equiv::dump): Same.
2264 * value-range.cc (irange::operator=): Same.
2265 (irange::maybe_anti_range): New.
2266 (irange::copy_legacy_range): New.
2267 (irange::set_undefined): Adjust for irange.
2268 (irange::swap_out_of_order_endpoints): Abstract out from set().
2269 (irange::set_varying): Adjust for irange.
2270 (irange::irange_set): New.
2271 (irange::irange_set_anti_range): New.
2272 (irange::set): Adjust for irange.
2273 (value_range::set_nonzero): Move to header file.
2274 (value_range::set_zero): Move to header file.
2275 (value_range::check): Rename to...
2276 (irange::verify_range): ...this.
2277 (value_range::num_pairs): Rename to...
2278 (irange::legacy_num_pairs): ...this, and adjust for irange.
2279 (value_range::lower_bound): Rename to...
2280 (irange::legacy_lower_bound): ...this, and adjust for irange.
2281 (value_range::upper_bound): Rename to...
2282 (irange::legacy_upper_bound): ...this, and adjust for irange.
2283 (value_range::equal_p): Rename to...
2284 (irange::legacy_equal_p): ...this.
2285 (value_range::operator==): Move to header file.
2286 (irange::equal_p): New.
2287 (irange::symbolic_p): Adjust for irange.
2288 (irange::constant_p): Same.
2289 (irange::singleton_p): Same.
2290 (irange::value_inside_range): Same.
2291 (irange::may_contain_p): Same.
2292 (irange::contains_p): Same.
2293 (irange::normalize_addresses): Same.
2294 (irange::normalize_symbolics): Same.
2295 (irange::legacy_intersect): Same.
2296 (irange::legacy_union): Same.
2297 (irange::union_): Same.
2298 (irange::intersect): Same.
2299 (irange::irange_union): New.
2300 (irange::irange_intersect): New.
2301 (subtract_one): New.
2302 (irange::invert): Adjust for irange.
2303 (dump_bound_with_infinite_markers): New.
2304 (irange::dump): Adjust for irange.
2305 (debug): Add irange versions.
2306 (range_has_numeric_bounds_p): Adjust for irange.
2307 (vrp_val_max): Move to header file.
2308 (vrp_val_min): Move to header file.
2309 (DEFINE_INT_RANGE_GC_STUBS): New.
2310 (DEFINE_INT_RANGE_INSTANCE): New.
2311 * value-range.h (class irange): New.
2312 (class int_range): New.
2313 (class value_range): Rename to a instantiation of int_range.
2314 (irange::legacy_mode_p): New.
2315 (value_range::value_range): Remove.
2316 (irange::kind): New.
2317 (irange::num_pairs): Adjust for irange.
2318 (irange::type): Adjust for irange.
2319 (irange::tree_lower_bound): New.
2320 (irange::tree_upper_bound): New.
2321 (irange::type): Adjust for irange.
2322 (irange::min): Same.
2323 (irange::max): Same.
2324 (irange::varying_p): Same.
2325 (irange::undefined_p): Same.
2326 (irange::zero_p): Same.
2327 (irange::nonzero_p): Same.
2328 (irange::supports_type_p): Same.
2329 (range_includes_zero_p): Same.
2332 (irange::irange): New.
2333 (int_range::int_range): New.
2334 (int_range::operator=): New.
2335 (irange::set): Moved from value-range.cc and adjusted for irange.
2336 (irange::set_undefined): Same.
2337 (irange::set_varying): Same.
2338 (irange::operator==): Same.
2339 (irange::lower_bound): Same.
2340 (irange::upper_bound): Same.
2341 (irange::union_): Same.
2342 (irange::intersect): Same.
2343 (irange::set_nonzero): Same.
2344 (irange::set_zero): Same.
2345 (irange::normalize_min_max): New.
2346 (vrp_val_max): Move from value-range.cc.
2347 (vrp_val_min): Same.
2348 * vr-values.c (vr_values::get_lattice_entry): Call value_range
2351 2020-08-02 Sergei Trofimovich <siarheit@google.com>
2354 * var-tracking.c (vt_find_locations): Fully initialize
2355 all 'in_pending' bits.
2357 2020-08-01 Jan Hubicka <jh@suse.cz>
2359 * symtab.c (symtab_node::verify_base): Verify order.
2360 (symtab_node::verify_symtab_nodes): Verify order.
2362 2020-08-01 Jan Hubicka <jh@suse.cz>
2364 * predict.c (estimate_bb_frequencies): Cap recursive calls by 90%.
2366 2020-08-01 Jojo R <jiejie_rong@c-sky.com>
2368 * config/csky/csky_opts.h (float_abi_type): New.
2369 * config/csky/csky.h (TARGET_SOFT_FLOAT): New.
2370 (TARGET_HARD_FLOAT): New.
2371 (TARGET_HARD_FLOAT_ABI): New.
2372 (OPTION_DEFAULT_SPECS): Use mfloat-abi.
2373 * config/csky/csky.opt (mfloat-abi): New.
2374 * doc/invoke.texi (C-SKY Options): Document -mfloat-abi=.
2376 2020-08-01 Cooper Qu <cooper.qu@linux.alibaba.com>
2378 * config/csky/t-csky-linux: Delete big endian CPUs' multilib.
2380 2020-07-31 Roger Sayle <roger@nextmovesoftware.com>
2381 Tom de Vries <tdevries@suse.de>
2384 * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement.
2385 (TARGET_TRULY_NOOP_TRUNCATION): Define.
2387 2020-07-31 Richard Biener <rguenther@suse.de>
2390 * langhooks-def.h (lhd_finalize_early_debug): Declare.
2391 (LANG_HOOKS_FINALIZE_EARLY_DEBUG): Define.
2392 (LANG_HOOKS_INITIALIZER): Amend.
2393 * langhooks.c: Include cgraph.h and debug.h.
2394 (lhd_finalize_early_debug): Default implementation from
2395 former code in finalize_compilation_unit.
2396 * langhooks.h (lang_hooks::finalize_early_debug): Add.
2397 * cgraphunit.c (symbol_table::finalize_compilation_unit):
2398 Call the finalize_early_debug langhook.
2400 2020-07-31 Richard Biener <rguenther@suse.de>
2402 * genmatch.c (expr::force_leaf): Add and initialize.
2403 (expr::gen_transform): Honor force_leaf by passing
2404 NULL as sequence argument to maybe_push_res_to_seq.
2405 (parser::parse_expr): Allow ! marker on result expression
2407 * doc/match-and-simplify.texi: Amend.
2409 2020-07-31 Kewen Lin <linkw@linux.ibm.com>
2411 * tree-vect-loop.c (vect_get_known_peeling_cost): Don't consider branch
2412 taken costs for prologue and epilogue if they don't exist.
2413 (vect_estimate_min_profitable_iters): Likewise.
2415 2020-07-31 Martin Liska <mliska@suse.cz>
2417 * cgraph.h: Remove leading empty lines.
2418 * cgraphunit.c (enum cgraph_order_sort_kind): Remove
2420 (struct cgraph_order_sort): Add constructors.
2421 (cgraph_order_sort::process): New.
2422 (cgraph_order_cmp): New.
2423 (output_in_order): Simplify and push nodes to vector.
2425 2020-07-31 Richard Biener <rguenther@suse.de>
2428 * fold-const.c (fold_range_test): Special-case constant
2429 LHS for short-circuiting operations.
2431 2020-07-31 Martin Liska <mliska@suse.cz>
2433 * gcov-io.h (GCOV_PREALLOCATED_KVP): New.
2435 2020-07-31 Zhiheng Xie <xiezhiheng@huawei.com>
2437 * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
2438 Add new argument ATTRS.
2439 (aarch64_call_properties): New function.
2440 (aarch64_modifies_global_state_p): Likewise.
2441 (aarch64_reads_global_state_p): Likewise.
2442 (aarch64_could_trap_p): Likewise.
2443 (aarch64_add_attribute): Likewise.
2444 (aarch64_get_attributes): Likewise.
2445 (aarch64_init_simd_builtins): Add attributes for each built-in function.
2447 2020-07-31 Richard Biener <rguenther@suse.de>
2450 * var-tracking.c (vt_find_locations): Use
2451 rev_post_order_and_mark_dfs_back_seme and separately iterate
2454 2020-07-31 Richard Biener <rguenther@suse.de>
2456 * cfganal.h (rev_post_order_and_mark_dfs_back_seme): Adjust
2458 * cfganal.c (rpoamdbs_bb_data): New struct with pre BB data.
2459 (tag_header): New helper.
2460 (cmp_edge_dest_pre): Likewise.
2461 (rev_post_order_and_mark_dfs_back_seme): Compute SCCs,
2462 find SCC exits and perform a DFS walk with extra edges to
2463 compute a RPO with adjacent SCC members when requesting an
2464 iteration optimized order and populate the toplevel SCC array.
2465 * tree-ssa-sccvn.c (do_rpo_vn): Remove ad-hoc computation
2466 of max_rpo and fill it in from SCC extent info instead.
2468 2020-07-30 Will Schmidt <will_schmidt@vnet.ibm.com>
2470 * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define.
2471 (vec_test_lsbb_all_zeros): New define.
2472 * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in
2474 (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines.
2475 (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads.
2476 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS,
2477 P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries.
2478 * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec.
2479 * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define.
2480 (xvtlsbbo, xvtlsbbz): New instruction expands.
2482 2020-07-30 Cooper Qu <cooper.qu@linux.alibaba.com>
2484 * config/riscv/riscv-opts.h (stack_protector_guard): New enum.
2485 * config/riscv/riscv.c (riscv_option_override): Handle
2487 * config/riscv/riscv.md (stack_protect_set): New pattern to handle
2488 flexible stack protector guard settings.
2489 (stack_protect_set_<mode>): Ditto.
2490 (stack_protect_test): Ditto.
2491 (stack_protect_test_<mode>): Ditto.
2492 * config/riscv/riscv.opt (mstack-protector-guard=,
2493 mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
2495 * doc/invoke.texi (Option Summary) [RISC-V Options]:
2496 Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
2497 -mstack-protector-guard-offset=.
2498 (RISC-V Options): Ditto.
2500 2020-07-30 H.J. Lu <hjl.tools@gmail.com>
2503 * configure: Regenerated.
2505 2020-07-30 Richard Biener <rguenther@suse.de>
2507 PR tree-optimization/96370
2508 * tree-ssa-reassoc.c (rewrite_expr_tree): Add operation
2509 code parameter and use it instead of picking it up from
2510 the stmt that is being rewritten.
2511 (reassociate_bb): Pass down the operation code.
2513 2020-07-30 Roger Sayle <roger@nextmovesoftware.com>
2514 Tom de Vries <tdevries@suse.de>
2516 * config/nvptx/nvptx.md (nvptx_vector_index_operand): New predicate.
2517 (VECELEM): New mode attribute for a vector's uppercase element mode.
2518 (Vecelem): New mode attribute for a vector's lowercase element mode.
2519 (*vec_set<mode>_0, *vec_set<mode>_1, *vec_set<mode>_2)
2520 (*vec_set<mode>_3): New instructions.
2521 (vec_set<mode>): New expander to generate one of the above insns.
2522 (vec_extract<mode><Vecelem>): New instruction.
2524 2020-07-30 Martin Liska <mliska@suse.cz>
2527 * config/i386/x86-tune-costs.h: Use libcall for large sizes for
2528 -m32. Start using libcall from 128+ bytes.
2530 2020-07-30 Martin Liska <mliska@suse.cz>
2532 * config/i386/x86-tune-costs.h: Change code formatting.
2534 2020-07-29 Roger Sayle <roger@nextmovesoftware.com>
2536 * config/nvptx/nvptx.md (recip<mode>2): New instruction.
2538 2020-07-29 Fangrui Song <maskray@google.com>
2541 * opts.c (common_handle_option): Don't make -gsplit-dwarf imply -g.
2542 * doc/invoke.texi (-gsplit-dwarf): Update documentation.
2544 2020-07-29 Joe Ramsay <joe.ramsay@arm.com>
2546 * config/arm/arm-protos.h (arm_coproc_mem_operand_no_writeback):
2548 (arm_mve_mode_and_operands_type_check): Declare prototype.
2549 * config/arm/arm.c (arm_coproc_mem_operand): Refactor to use
2550 _arm_coproc_mem_operand.
2551 (arm_coproc_mem_operand_wb): New function to cover full, limited
2553 (arm_coproc_mem_operand_no_writeback): New constraint for memory
2554 operand with no writeback.
2555 (arm_print_operand): Extend 'E' specifier for memory operand
2556 that does not support writeback.
2557 (arm_mve_mode_and_operands_type_check): New constraint check for
2558 MVE memory operands.
2559 * config/arm/constraints.md: Add Uj constraint for VFP vldr.16
2561 * config/arm/vfp.md (*mov_load_vfp_hf16): New pattern for
2563 (*mov_store_vfp_hf16): New pattern for vstr.16.
2564 (*mov<mode>_vfp_<mode>16): Remove MVE moves.
2566 2020-07-29 Richard Biener <rguenther@suse.de>
2568 PR tree-optimization/96349
2569 * tree-ssa-loop-split.c (stmt_semi_invariant_p_1): When the
2570 condition runs into a loop PHI with an abnormal entry value give up.
2572 2020-07-29 Richard Biener <rguenther@suse.de>
2574 * tree-vectorizer.c (vectorize_loops): Reset the SCEV
2575 cache if we removed any SIMD UID SSA defs.
2576 * gimple-loop-interchange.cc (pass_linterchange::execute):
2577 Reset the scev cache if we interchanged a loop.
2579 2020-07-29 Richard Biener <rguenther@suse.de>
2581 PR tree-optimization/95679
2582 * tree-ssa-propagate.h
2583 (substitute_and_fold_engine::propagate_into_phi_args): Return
2584 whether anything changed.
2585 * tree-ssa-propagate.c
2586 (substitute_and_fold_engine::propagate_into_phi_args): Likewise.
2587 (substitute_and_fold_dom_walker::before_dom_children): Update
2590 2020-07-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2592 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
2593 Ensure that loop variable npeel_tmp advances in each iteration.
2595 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
2597 * config/mmix/mmix.h (NO_FUNCTION_CSE): Define to 1.
2599 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
2601 * config/mmix/mmix.h (ASM_OUTPUT_EXTERNAL): Define to
2602 default_elf_asm_output_external.
2604 2020-07-28 Sergei Trofimovich <siarheit@google.com>
2607 * ipa-cp.c (has_undead_caller_from_outside_scc_p): Consider
2608 unoptimized callers as undead.
2610 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
2611 Richard Biener <rguenther@suse.de>
2613 * match.pd (popcount(x)&1 -> parity(x)): New simplification.
2614 (parity(~x) -> parity(x)): New simplification.
2615 (parity(x)^parity(y) -> parity(x^y)): New simplification.
2616 (parity(x&1) -> x&1): New simplification.
2617 (popcount(x) -> x>>C): New simplification.
2619 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
2620 Tom de Vries <tdevries@suse.de>
2622 * config/nvptx/nvptx.md (extendqihi2): New instruction.
2623 (ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode.
2625 2020-07-28 Jakub Jelinek <jakub@redhat.com>
2628 * calls.c (maybe_warn_rdwr_sizes): Add FNDECL and FNTYPE arguments,
2629 instead of trying to rediscover them in the body.
2630 (initialize_argument_information): Adjust caller.
2632 2020-07-28 Kewen Lin <linkw@linux.ibm.com>
2634 * tree-vect-loop.c (vect_get_known_peeling_cost): Factor out some code
2635 to determine peel_iters_epilogue to...
2636 (vect_get_peel_iters_epilogue): ...this new function.
2637 (vect_estimate_min_profitable_iters): Refactor cost calculation on
2638 peel_iters_prologue and peel_iters_epilogue.
2640 2020-07-27 Martin Sebor <msebor@redhat.com>
2642 PR tree-optimization/84079
2643 * gimple-array-bounds.cc (array_bounds_checker::check_addr_expr):
2644 Only allow just-past-the-end references for the most significant
2647 2020-07-27 Hu Jiangping <hujiangping@cn.fujitsu.com>
2650 * opts.c (check_alignment_argument): Set the -falign-Name
2651 on/off flag on and set the -falign-Name string value null,
2652 when the command-line specified argument is zero.
2654 2020-07-27 Martin Liska <mliska@suse.cz>
2656 PR tree-optimization/96058
2657 * expr.c (string_constant): Build string_constant only
2658 for a type that has same precision as char_type_node
2659 and is an integral type.
2661 2020-07-27 Richard Biener <rguenther@suse.de>
2663 * var-tracking.c (variable_tracking_main_1): Remove call
2664 to mark_dfs_back_edges.
2666 2020-07-27 Martin Liska <mliska@suse.cz>
2668 PR tree-optimization/96128
2669 * tree-vect-generic.c (expand_vector_comparison): Do not expand
2670 vector comparison with VEC_COND_EXPR.
2672 2020-07-27 H.J. Lu <hjl.tools@gmail.com>
2675 * common.opt: Add -fcf-protection=check.
2676 * flag-types.h (cf_protection_level): Add CF_CHECK.
2677 * lto-wrapper.c (merge_and_complain): Issue an error for
2678 mismatching -fcf-protection values with -fcf-protection=check.
2679 Otherwise, merge -fcf-protection values.
2680 * doc/invoke.texi: Document -fcf-protection=check.
2682 2020-07-27 Martin Liska <mliska@suse.cz>
2685 * symbol-summary.h: Call vec_safe_reserve before grow is called
2686 in order to grow to a reasonable size.
2687 * vec.h (vec_safe_reserve): Add missing function for vl_ptr
2690 2020-07-26 Hans-Peter Nilsson <hp@bitrange.com>
2692 * configure.ac (out-of-tree linker .hidden support): Don't turn off
2693 for mmix-knuth-mmixware.
2694 * configure: Regenerate.
2696 2020-07-26 Aaron Sawdey <acsawdey@linux.ibm.com>
2698 * config/rs6000/rs6000.c (rs6000_option_override_internal):
2699 Set the default value for -mblock-ops-unaligned-vsx.
2700 * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx.
2701 * doc/invoke.texi: Document -mblock-ops-unaligned-vsx.
2703 2020-07-25 Hans-Peter Nilsson <hp@bitrange.com>
2705 * config/mmix/mmix.c (TARGET_ASM_OUTPUT_IDENT): Override the default
2706 with default_asm_output_ident_directive.
2708 2020-07-25 Andrew Stubbs <ams@codesourcery.com>
2710 * config/gcn/gcn.c (gcn_scalar_mode_supported_p): New function.
2711 (TARGET_SCALAR_MODE_SUPPORTED_P): New define.
2713 2020-07-24 David Edelsohn <dje.gcc@gmail.com>
2714 Clement Chigot <clement.chigot@atos.net>
2716 * config.gcc (powerpc-ibm-aix7.1): Use t-aix64 and biarch64 for
2718 * config/rs6000/aix71.h (ASM_SPEC): Remove aix64 option.
2721 (ASM_CPU_SPEC): Remove vsx and altivec options.
2722 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
2725 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
2726 (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
2727 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
2730 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
2733 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
2734 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
2736 (CPLUSPLUS_CPP_SPEC): Same.
2739 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
2740 * config/rs6000/aix72.h (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
2741 * config/rs6000/defaultaix64.h: Delete.
2743 2020-07-24 Segher Boessenkool <segher@kernel.crashing.org>
2745 * config/rs6000/rs6000.opt: Delete -mpower10.
2747 2020-07-24 Alexandre Oliva <oliva@adacore.com>
2749 * config/i386/intelmic-mkoffload.c
2750 (generate_target_descr_file): Use dumppfx for save_temps
2751 files. Pass -dumpbase et al down to the compiler.
2752 (generate_target_offloadend_file): Likewise.
2753 (generate_host_descr_file): Likewise.
2754 (prepare_target_image): Likewise. Move out_obj_filename
2756 (main): ... here. Detect -dumpbase, set dumppfx too.
2758 2020-07-24 Alexandre Oliva <oliva@adacore.com>
2761 * gcc.c (process_command): Adjust and document conditions to
2764 2020-07-24 Matthias Klose <doko@ubuntu.com>
2766 * config/aarch64/aarch64.c (+aarch64_offload_options,
2767 TARGET_OFFLOAD_OPTIONS): New.
2769 2020-07-24 Uroš Bizjak <ubizjak@gmail.com>
2772 * config/i386/sync.md (mmem_thread_fence): Emit mfence_sse2 for -Os.
2774 2020-07-23 Roger Sayle <roger@nextmovesoftware.com>
2776 PR rtl-optimization/96298
2777 * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't
2778 distribute over xor, so (a^b)^(c^b) is not the same as (a^c)^b.
2780 2020-07-23 Dong JianQiang <dongjianqiang2@huawei.com>
2782 PR gcov-profile/96267
2783 * gcov-io.c (gcov_open): enable if IN_GCOV_TOOL.
2785 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
2787 * config/rs6000/rs6000.c (adjust_vectorization_cost): Renamed to ...
2788 (rs6000_adjust_vect_cost_per_stmt): ... here.
2789 (rs6000_add_stmt_cost): Rename adjust_vectorization_cost to
2790 rs6000_adjust_vect_cost_per_stmt.
2792 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
2794 * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
2795 IFN_LEN_LOAD and IFN_LEN_STORE.
2796 (get_alias_ptr_type_for_ptr_address): Likewise.
2798 2020-07-23 Kito Cheng <kito.cheng@sifive.com>
2801 * asan.c (asan_shadow_offset_set_p): New.
2802 * asan.h (asan_shadow_offset_set_p): Ditto.
2803 * toplev.c (process_options): Allow -fsanitize=kernel-address
2804 even TARGET_ASAN_SHADOW_OFFSET not implemented, only check when
2805 asan stack protection is enabled.
2807 2020-07-22 Peter Bergner <bergner@linux.ibm.com>
2810 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Handle
2811 little-endian memory ordering.
2813 2020-07-22 Nathan Sidwell <nathan@acm.org>
2815 * dumpfile.c (parse_dump_option): Deal with filenames
2818 2020-07-22 Nathan Sidwell <nathan@acm.org>
2820 * incpath.c (add_path): Avoid multiple strlen calls.
2822 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2824 * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag
2825 is not NULL_RTX before use.
2827 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2829 * expr.c (convert_modes): Allow a constant integer to be converted to
2830 any scalar int mode.
2832 2020-07-22 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
2834 * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector
2835 V2SI, V2SF, V2DI, V2DF load pair and store pair modes.
2836 * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
2837 Change mode parameter to machine_mode.
2838 (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to
2840 * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
2841 Change mode parameter to machine_mode.
2842 (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode.
2843 * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors.
2845 2020-07-22 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
2847 * doc/languages.texi: Fix “then”/“than” typo.
2849 2020-07-21 Sunil K Pandey <skpgkp2@gmail.com>
2852 * config/i386/i386-protos.h (ix86_local_alignment): Add
2853 another function parameter may_lower alignment. Default is
2855 * config/i386/i386.c (ix86_lower_local_decl_alignment): New
2857 (ix86_local_alignment): Amend ix86_local_alignment to accept
2858 another parameter may_lower. If may_lower is true, new align
2859 may be lower than incoming alignment. If may_lower is false,
2860 new align will be greater or equal to incoming alignment.
2861 (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define.
2862 * doc/tm.texi: Regenerate.
2863 * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New
2865 * target.def (lower_local_decl_alignment): New hook.
2867 2020-07-21 Uroš Bizjak <ubizjak@gmail.com>
2870 * config/i386/sync.md (mfence_sse2): Enable for
2871 TARGET_64BIT and TARGET_SSE2.
2872 (mfence_nosse): Always enable.
2874 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2876 * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps):
2878 * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise.
2879 * config/msp430/msp430.md (cbranchhi4_real): Remove special case for
2880 msp430_do_not_relax_short_jumps.
2882 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2884 * config/msp430/msp430.md: New "extendqipsi2" define_insn.
2886 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2888 * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and
2891 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com>
2893 PR rtl-optimization/89310
2894 * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split.
2896 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
2898 * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total
2899 allocated size and set current_function_static_stack_size, if
2900 flag_stack_usage_info.
2902 2020-07-20 Sergei Trofimovich <siarheit@google.com>
2905 * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC
2906 to get crtendS.o for !no-pie mode.
2907 * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
2909 2020-07-20 Yang Yang <yangyang305@huawei.com>
2911 * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
2912 VIEW_CONVERT_EXPRs if the arguments types and return type
2913 of simd clone function are distinct with the vectype of stmt.
2915 2020-07-20 Uroš Bizjak <ubizjak@gmail.com>
2918 * config/i386/i386.h (TARGET_AVOID_MFENCE):
2919 Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE.
2920 * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE.
2921 (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack
2922 referred memory in word_mode.
2923 (mem_thread_fence): Do not generate mfence_sse2 pattern when
2924 TARGET_AVOID_MFENCE is true.
2925 (atomic_store<mode>): Update for rename.
2926 * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE):
2927 Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE.
2929 2020-07-20 Martin Sebor <msebor@redhat.com>
2933 * builtins.c (inline_expand_builtin_string_cmp): Rename...
2934 (inline_expand_builtin_bytecmp): ...to this.
2935 (builtin_memcpy_read_str): Don't expect data to be nul-terminated.
2936 (expand_builtin_memory_copy_args): Handle object representations
2937 with embedded nul bytes.
2938 (expand_builtin_memcmp): Same.
2939 (expand_builtin_strcmp): Adjust call to naming change.
2940 (expand_builtin_strncmp): Same.
2941 * expr.c (string_constant): Create empty strings with nonzero size.
2942 * fold-const.c (c_getstr): Rename locals and update comments.
2943 * tree.c (build_string): Accept null pointer argument.
2944 (build_string_literal): Same.
2945 * tree.h (build_string): Provide a default.
2946 (build_string_literal): Same.
2948 2020-07-20 Richard Biener <rguenther@suse.de>
2950 * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove
2951 write-only post array.
2953 2020-07-20 Jakub Jelinek <jakub@redhat.com>
2956 * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF
2957 of a bitfield not aligned on byte boundaries try to
2958 fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and
2959 adjust it depending on endianity.
2961 2020-07-20 Jakub Jelinek <jakub@redhat.com>
2964 * fold-const.c (native_encode_initializer): Handle bit-fields.
2966 2020-07-20 Kewen Lin <linkw@linux.ibm.com>
2968 * config/rs6000/rs6000.c (rs6000_option_override_internal):
2969 Set param_vect_partial_vector_usage to 0 explicitly.
2970 * doc/invoke.texi (vect-partial-vector-usage): Document new option.
2971 * optabs-query.c (get_len_load_store_mode): New function.
2972 * optabs-query.h (get_len_load_store_mode): New declare.
2973 * params.opt (vect-partial-vector-usage): New.
2974 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the
2975 handlings for vectorization using length-based partial vectors, call
2976 vect_gen_len for length generation, and rename some variables with
2977 items instead of scalars.
2978 (vect_set_loop_condition_partial_vectors): Add the handlings for
2979 vectorization using length-based partial vectors.
2980 (vect_do_peeling): Allow remaining eiters less than epilogue vf for
2981 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
2982 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init
2983 epil_using_partial_vectors_p.
2984 (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls
2985 for lengths destruction.
2986 (vect_verify_loop_lens): New function.
2987 (vect_analyze_loop): Add handlings for epilogue of loop when it's
2988 marked to use vectorization using partial vectors.
2989 (vect_analyze_loop_2): Add the check to allow only one vectorization
2990 approach using partial vectorization at the same time. Check param
2991 vect-partial-vector-usage for partial vectors decision. Mark
2992 LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is
2993 considerable to use partial vectors. Call release_vec_loop_controls
2994 for lengths destruction.
2995 (vect_estimate_min_profitable_iters): Adjust for loop vectorization
2996 using length-based partial vectors.
2997 (vect_record_loop_mask): Init factor to 1 for vectorization using
2998 mask-based partial vectors.
2999 (vect_record_loop_len): New function.
3000 (vect_get_loop_len): Likewise.
3001 * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add
3002 checks for vectorization using length-based partial vectors. Factor
3003 some code to lambda function get_valid_nvectors.
3004 (vectorizable_store): Add handlings when using length-based partial
3006 (vectorizable_load): Likewise.
3007 (vect_gen_len): New function.
3008 * tree-vectorizer.h (struct rgroup_controls): Add field factor
3009 mainly for length-based partial vectors.
3010 (vec_loop_lens): New typedef.
3011 (_loop_vec_info): Add lens and epil_using_partial_vectors_p.
3012 (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro.
3013 (LOOP_VINFO_LENS): Likewise.
3014 (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise.
3015 (vect_record_loop_len): New declare.
3016 (vect_get_loop_len): Likewise.
3017 (vect_gen_len): Likewise.
3019 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
3021 * config/mmix/mmix.c (mmix_option_override): Reinstate default
3022 integer-emitting targetm.asm_out pseudos when dumping detailed
3024 (mmix_assemble_integer): Update comment.
3026 2020-07-19 H.J. Lu <hjl.tools@gmail.com>
3030 * config/i386/cpuid.h: Add include guard.
3033 2020-07-18 H.J. Lu <hjl.tools@gmail.com>
3036 * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
3038 2020-07-18 Peter Bergner <bergner@linux.ibm.com>
3041 * config/rs6000/dfp.md (trunctdsd2): New define_insn.
3042 * config/rs6000/rs6000.md (define_attr "isa"): Add p9.
3043 (define_attr "enabled"): Handle p9.
3045 2020-07-17 Roger Sayle <roger@nextmovesoftware.com>
3047 * function.c (assign_parm_setup_block): Use the macro
3048 TRULY_NOOP_TRUNCATION_MODES_P instead of calling
3049 targetm.truly_noop_truncation directly.
3051 2020-07-17 H.J. Lu <hjl.tools@gmail.com>
3055 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
3056 (VF1_AVX512ER_128_256): This. Drop DF vector modes.
3057 (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
3058 VF1_AVX512ER_128_256.
3060 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3062 * doc/sourcebuild.texi (dg-set-compiler-env-var,
3063 dg-set-target-env-var): Document.
3065 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3067 * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
3069 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3071 * config/aarch64/driver-aarch64.c (host_detect_local_cpu):
3074 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3076 * config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
3077 (parse_field): Use std::string.
3078 (split_words, readline, find_field): New.
3079 (host_detect_local_cpu): Fix truncation issues.
3081 2020-07-17 Andrew Stubbs <ams@codesourcery.com>
3083 * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining.
3084 (ELFOSABI_AMDGPU_HSA): Likewise.
3085 (ELFABIVERSION_AMDGPU_HSA): Likewise.
3086 (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise.
3087 (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise.
3088 (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise.
3091 2020-07-17 Andrew Pinski <apinksi@marvell.com>
3092 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
3095 * config/aarch64/aarch64.c (aarch64_evpc_ins): New function.
3096 (aarch64_expand_vec_perm_const_1): Call it.
3097 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make
3098 public, and add a "@" prefix.
3100 2020-07-17 Andrew Pinski <apinksi@marvell.com>
3101 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
3104 * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function.
3105 (aarch64_expand_vec_perm_const_1): Call it.
3107 2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com>
3109 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
3110 Add new field flags.
3111 (VAR1): Add new field FLAG in macro.
3127 (aarch64_general_fold_builtin): Likewise.
3128 (aarch64_general_gimple_fold_builtin): Likewise.
3129 * config/aarch64/aarch64-simd-builtins.def: Add default flag for
3130 each built-in function.
3131 * config/aarch64/geniterators.sh: Add new field in BUILTIN macro.
3133 2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com>
3136 * config/s390/s390.c (s390_expand_insv): Invoke the movstrict
3137 expanders to generate the pattern.
3138 * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the
3139 '*' to have callable expanders.
3141 2020-07-16 Hans-Peter Nilsson <hp@axis.com>
3142 Segher Boessenkool <segher@kernel.crashing.org>
3145 * combine.c (is_just_move): Take an rtx_insn* as argument. Use
3148 2020-07-16 Uroš Bizjak <ubizjak@gmail.com>
3151 * config/i386/sync.md
3152 (peephole2 to remove unneded compare after CMPXCHG):
3153 New pattern, also handle XOR zeroing and load of -1 by OR.
3155 2020-07-16 Eric Botcazou <ebotcazou@gcc.gnu.org>
3157 * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak.
3158 (ix86_adjust_stack_and_probe): Delete.
3159 (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add
3160 PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus
3161 a small dope beyond SIZE bytes.
3162 (ix86_emit_probe_stack_range): Use local variable.
3163 (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe
3164 and tidy up the stack checking code.
3165 * explow.c (get_stack_check_protect): Fix head comment.
3166 (anti_adjust_stack_and_probe_stack_clash): Likewise.
3167 (allocate_dynamic_stack_space): Add comment.
3168 * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and
3169 TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field.
3171 2020-07-16 Andrew Stubbs <ams@codesourcery.com>
3173 * config/gcn/mkoffload.c: Include simple-object.h and elf.h.
3174 (EM_AMDGPU): New macro.
3175 (ELFOSABI_AMDGPU_HSA): New macro.
3176 (ELFABIVERSION_AMDGPU_HSA): New macro.
3177 (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro.
3178 (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro.
3179 (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro.
3180 (R_AMDGPU_NONE): New macro.
3181 (R_AMDGPU_ABS32_LO): New macro.
3182 (R_AMDGPU_ABS32_HI): New macro.
3183 (R_AMDGPU_ABS64): New macro.
3184 (R_AMDGPU_REL32): New macro.
3185 (R_AMDGPU_REL64): New macro.
3186 (R_AMDGPU_ABS32): New macro.
3187 (R_AMDGPU_GOTPCREL): New macro.
3188 (R_AMDGPU_GOTPCREL32_LO): New macro.
3189 (R_AMDGPU_GOTPCREL32_HI): New macro.
3190 (R_AMDGPU_REL32_LO): New macro.
3191 (R_AMDGPU_REL32_HI): New macro.
3192 (reserved): New macro.
3193 (R_AMDGPU_RELATIVE64): New macro.
3194 (gcn_s1_name): Delete global variable.
3195 (gcn_s2_name): Delete global variable.
3196 (gcn_o_name): Delete global variable.
3197 (gcn_cfile_name): Delete global variable.
3198 (files_to_cleanup): New global variable.
3199 (offload_abi): New global variable.
3200 (tool_cleanup): Use files_to_cleanup, not explicit list.
3201 (copy_early_debug_info): New function.
3202 (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name,
3204 Create files_to_cleanup obstack.
3205 Recognize -march options.
3206 Copy early debug info from input .o files.
3208 2020-07-16 Andrea Corallo <andrea.corallo@arm.com>
3210 * Makefile.in (TAGS): Remove 'params.def'.
3212 2020-07-16 Roger Sayle <roger@nextmovesoftware.com>
3214 * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that
3215 targets that return false, indicating SUBREGs shouldn't be
3216 used, also need to provide a trunc?i?i2 optab that performs this
3218 * doc/tm.texi: Regenerate.
3220 2020-07-15 Uroš Bizjak <ubizjak@gmail.com>
3223 * config/i386/sync.md
3224 (peephole2 to remove unneded compare after CMPXCHG): New pattern.
3226 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3229 * omp-general.h (struct omp_for_data): Rename min_inner_iterations
3230 member to first_inner_iterations, adjust comment.
3231 * omp-general.c (omp_extract_for_data): Adjust for the above change.
3232 Always use n1first and n2first to compute it, rather than depending
3233 on single_nonrect_cond_code. Similarly, always compute factor
3234 as (m2 - m1) * outer_step / inner_step rather than sometimes m1 - m2
3235 depending on single_nonrect_cond_code.
3236 * omp-expand.c (expand_omp_for_init_vars): Rename min_inner_iterations
3237 to first_inner_iterations and min_inner_iterationsd to
3238 first_inner_iterationsd.
3240 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3243 * config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
3244 _mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask,
3245 _mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask,
3246 _mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask,
3247 _mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask,
3248 _mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask,
3249 _mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask,
3250 _mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask,
3251 _mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask,
3252 _mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask,
3253 _mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask,
3254 _mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask,
3255 _mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask,
3256 _mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask,
3257 _mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask,
3258 _mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask,
3259 _mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded
3262 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3265 * builtins.c: Include gimple-ssa.h, tree-ssa-live.h and
3267 (expand_expr_force_mode): If exp is a SSA_NAME with different mode
3268 from MODE and get_gimple_for_ssa_name is a cast from MODE, use the
3271 2020-07-15 Jiufu Guo <guojiufu@cn.ibm.com>
3273 * config/rs6000/rs6000.c (rs6000_loop_unroll_adjust): Refine hook.
3275 2020-07-14 David Edelsohn <dje.gcc@gmail.com>
3277 * config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64
3279 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add
3280 TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case.
3282 2020-07-14 Lewis Hyatt <lhyatt@gmail.com>
3284 PR preprocessor/49973
3286 * common.opt: Handle -ftabstop here instead of in c-family
3287 options. Add -fdiagnostics-column-unit= and
3288 -fdiagnostics-column-origin= options.
3289 * opts.c (common_handle_option): Handle the new options.
3290 * diagnostic-format-json.cc (json_from_expanded_location): Add
3291 diagnostic_context argument. Use it to convert column numbers as per
3293 (json_from_location_range): Likewise.
3294 (json_from_fixit_hint): Likewise.
3295 (json_end_diagnostic): Pass the new context argument to helper
3296 functions above. Add "column-origin" field to the output.
3297 (test_unknown_location): Add the new context argument to calls to
3299 (test_bad_endpoints): Likewise.
3300 * diagnostic-show-locus.c
3301 (exploc_with_display_col::exploc_with_display_col): Support
3303 (layout_point::layout_point): Make use of class
3304 exploc_with_display_col.
3305 (layout_range::layout_range): Likewise.
3306 (struct line_bounds): Clarify that the units are now always
3307 display columns. Rename members accordingly. Add constructor.
3308 (layout::print_source_line): Add support for tab expansion.
3309 (make_range): Adapt to class layout_range changes.
3310 (layout::maybe_add_location_range): Likewise.
3311 (layout::layout): Adapt to class exploc_with_display_col changes.
3312 (layout::calculate_x_offset_display): Support tabstop parameter.
3313 (layout::print_annotation_line): Adapt to struct line_bounds changes.
3314 (layout::print_line): Likewise.
3315 (line_label::line_label): Add diagnostic_context argument.
3316 (get_affected_range): Likewise.
3317 (get_printed_columns): Likewise.
3318 (layout::print_any_labels): Adapt to struct line_label changes.
3319 (class correction): Add m_tabstop member.
3320 (correction::correction): Add tabstop argument.
3321 (correction::compute_display_cols): Use m_tabstop.
3322 (class line_corrections): Add m_context member.
3323 (line_corrections::line_corrections): Add diagnostic_context argument.
3324 (line_corrections::add_hint): Use m_context to handle tabstops.
3325 (layout::print_trailing_fixits): Adapt to class line_corrections
3327 (test_layout_x_offset_display_utf8): Support tabstop parameter.
3328 (test_layout_x_offset_display_tab): New selftest.
3329 (test_one_liner_colorized_utf8): Likewise.
3330 (test_tab_expansion): Likewise.
3331 (test_diagnostic_show_locus_one_liner_utf8): Call the new tests.
3332 (diagnostic_show_locus_c_tests): Likewise.
3333 (test_overlapped_fixit_printing): Adapt to helper class and
3335 (test_overlapped_fixit_printing_utf8): Likewise.
3336 (test_overlapped_fixit_printing_2): Likewise.
3337 * diagnostic.h (enum diagnostics_column_unit): New enum.
3338 (struct diagnostic_context): Add members for the new options.
3339 (diagnostic_converted_column): Declare.
3340 (json_from_expanded_location): Add new context argument.
3341 * diagnostic.c (diagnostic_initialize): Initialize new members.
3342 (diagnostic_converted_column): New function.
3343 (maybe_line_and_column): Be willing to output a column of 0.
3344 (diagnostic_get_location_text): Convert column number as per the new
3346 (diagnostic_report_current_module): Likewise.
3347 (assert_location_text): Add origin and column_unit arguments for
3348 testing the new functionality.
3349 (test_diagnostic_get_location_text): Test the new functionality.
3350 * doc/invoke.texi: Document the new options and behavior.
3351 * input.h (location_compute_display_column): Add tabstop argument.
3352 * input.c (location_compute_display_column): Likewise.
3353 (test_cpp_utf8): Add selftests for tab expansion.
3354 * tree-diagnostic-path.cc (default_tree_make_json_for_path): Pass the
3355 new context argument to json_from_expanded_location().
3357 2020-07-14 Jakub Jelinek <jakub@redhat.com>
3360 * expr.c (expand_constructor): Don't create temporary for store to
3361 volatile MEM if exp has an addressable type.
3363 2020-07-14 Nathan Sidwell <nathan@acm.org>
3365 * hash-map.h (hash_map::get): Note it is a pointer to value.
3366 * incpath.h (incpath_kind): Align comments.
3368 2020-07-14 Nathan Sidwell <nathan@acm.org>
3370 * tree-core.h (tree_decl_with_vis, tree_function_decl):
3371 Note additional padding on 64-bits
3372 * tree.c (cache_integer_cst): Note why no caching of enum literals.
3373 (get_tree_code_name): Robustify error case.
3375 2020-07-14 Nathan Sidwell <nathan@acm.org>
3377 * doc/gty.texi: Fic gt_cleare_cache name.
3378 * doc/invoke.texi: Remove duplicate opindex Wabi-tag.
3380 2020-07-14 Jakub Jelinek <jakub@redhat.com>
3382 * omp-general.h (struct omp_for_data): Add adjn1 member.
3383 * omp-general.c (omp_extract_for_data): For non-rect loop, punt on
3384 count computing if n1, n2 or step are not INTEGER_CST earlier.
3385 Narrow the outer iterator range if needed so that non-rect loop
3386 has at least one iteration for each outer range iteration. Compute
3388 * omp-expand.c (expand_omp_for_init_vars): Use adjn1 if non-NULL
3389 instead of the outer loop's n1.
3391 2020-07-14 Matthias Klose <doko@ubuntu.com>
3394 * lto-wrapper.c (merge_and_complain): Add decoded options as parameter,
3395 error on different values for -fcf-protection.
3396 (append_compiler_options): Pass -fcf-protection option.
3397 (find_and_merge_options): Add decoded options as parameter,
3398 pass decoded_options to merge_and_complain.
3399 (run_gcc): Pass decoded options to find_and_merge_options.
3400 * lto-opts.c (lto_write_options): Pass -fcf-protection option.
3402 2020-07-13 Alan Modra <amodra@gmail.com>
3404 * config/rs6000/rs6000.md (sibcall_local): Merge sibcall_local32
3405 and sibcall_local64.
3406 (sibcall_value_local): Similarly.
3408 2020-07-13 Nathan Sidwell <nathan@acm.org>
3410 * Makefile.in (distclean): Remove long gone cxxmain.c
3412 2020-07-13 H.J. Lu <hjl.tools@gmail.com>
3415 * config/i386/i386.md (cmpstrnsi): Pass a copy of the string
3416 length to cmpstrnqi patterns.
3418 2020-07-13 Jakub Jelinek <jakub@redhat.com>
3421 * ipa-fnsummary.c (analyze_function_body): Treat NULL bb->aux
3424 2020-07-13 Richard Biener <rguenther@suse.de>
3426 PR tree-optimization/96163
3427 * tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts
3428 at least after region begin.
3430 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3432 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
3433 __ARM_FEATURE_PAC_DEFAULT support.
3435 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3438 * doc/extend.texi: Update the text for __builtin_return_address.
3440 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3443 * config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
3444 Disable return address signing if __builtin_eh_return is used.
3446 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3450 * config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
3451 * config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
3452 (aarch64_return_addr): Use aarch64_return_addr_rtx.
3453 * config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
3455 2020-07-13 Richard Sandiford <richard.sandiford@arm.com>
3458 * tree.h (virtual_method_call_p): Add a default-false parameter
3459 that indicates whether the function is being called from dump
3461 (obj_type_ref_class): Likewise.
3462 * tree.c (virtual_method_call_p): Likewise.
3463 * ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR
3464 type information for the type when the parameter is false.
3465 * tree-pretty-print.c (dump_generic_node): Update calls to
3466 virtual_method_call_p and obj_type_ref_class accordingly.
3468 2020-07-13 Julian Brown <julian@codesourcery.com>
3469 Thomas Schwinge <thomas@codesourcery.com>
3471 * gimplify.c (gimplify_scan_omp_clauses): Do not strip
3472 GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data
3473 directives (see also PR92929).
3475 2020-07-13 Roger Sayle <roger@nextmovesoftware.com>
3477 * convert.c (convert_to_integer_1): Narrow integer operations
3478 even on targets that require explicit truncation instructions.
3480 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3483 * config/cris/cris-passes.def: New file.
3484 * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
3485 * config/cris/cris.c: Add infrastructure bits and pass execute
3486 function cris_postdbr_cmpelim.
3487 * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare.
3489 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3491 * config/cris/t-cris: Remove gt-cris.h-related excessive cargo.
3493 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3496 * config/cris/cris.md ("*add<mode>3_addi"): New splitter.
3497 ("*addi_b_<mode>"): New pattern.
3498 ("*addsi3<setnz>"): Remove stale %-related comment.
3500 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3502 * config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"):
3503 Use match_dup in output template, not match_operand.
3505 2020-07-13 Richard Biener <rguenther@suse.de>
3507 * var-tracking.c (bb_heap_node_t): Remove unused typedef.
3508 (vt_find_locations): Eliminate visited bitmap in favor of
3509 RPO order check. Dump statistics about the number of
3510 local BB dataflow computes.
3512 2020-07-13 Richard Biener <rguenther@suse.de>
3515 * expr.c (expand_constructor): Make a temporary also if we're
3516 storing to volatile memory.
3518 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
3520 * config/rs6000/rs6000.md (rotl_unspec): New
3521 define_insn_and_split.
3523 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
3525 * config/rs6000/rs6000.c (rs6000_expand_vector_init):
3526 Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
3528 2020-07-11 Roger Sayle <roger@nextmovesoftware.com>
3530 * internal-fn.c (expand_mul_overflow): When checking for signed
3531 overflow from a widening multiplication, we access the truncated
3532 lowpart RES twice, so keep this value in a pseudo register.
3534 2020-07-11 Richard Sandiford <richard.sandiford@arm.com>
3536 PR tree-optimization/96146
3537 * value-range.cc (value_range::set): Only decompose POLY_INT_CST
3538 bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges
3539 involving POLY_INT_CSTs.
3541 2020-07-10 David Edelsohn <dje.gcc@gmail.com>
3544 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
3545 create named section for VAR_DECL or FUNCTION_DECL.
3547 2020-07-10 Joseph Myers <joseph@codesourcery.com>
3549 * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
3552 2020-07-10 Alexander Popov <alex.popov@linux.com>
3554 * shrink-wrap.c (try_shrink_wrapping): Improve debug output.
3556 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
3559 * expr.c (expand_expr_real_2): When reducing bit fields,
3560 clear the target if it has a different mode from the expression.
3561 (reduce_to_bit_field_precision): Don't do that here. Instead
3562 assert that the target already has the correct mode.
3564 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
3568 * config/arm/arm.c (arm_attribute_table): Add
3569 "Advanced SIMD type".
3570 (arm_comp_type_attributes): Check that the "Advanced SIMD type"
3571 attributes are equal.
3572 * config/arm/arm-builtins.c: Include stringpool.h and
3574 (arm_mangle_builtin_vector_type): Use the mangling recorded
3575 in the "Advanced SIMD type" attribute.
3576 (arm_init_simd_builtin_types): Add an "Advanced SIMD type"
3577 attribute to each Advanced SIMD type, using the mangled type
3578 as the attribute's single argument.
3580 2020-07-10 Carl Love <cel@us.ibm.com>
3582 * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator.
3583 (VSX_MM4): New define_mode_iterator.
3584 (vec_mtvsrbmi): New define_insn.
3585 (vec_mtvsr_<mode>): New define_insn.
3586 (vec_cntmb_<mode>): New define_insn.
3587 (vec_extract_<mode>): New define_insn.
3588 (vec_expand_<mode>): New define_insn.
3589 (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
3590 UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
3591 * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
3592 vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
3594 * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
3595 (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
3596 mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
3597 vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
3598 (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
3599 (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
3600 mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
3601 (BU_P10_OVERLOAD_2): Add defition for cntm.
3602 * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
3603 checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
3604 CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
3605 (altivec_overloaded_builtins): Add overloaded argument entries for
3606 P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
3607 P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
3608 P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
3609 P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
3610 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
3611 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
3612 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
3613 P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
3614 P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
3615 P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
3616 (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
3617 P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
3618 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
3619 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
3620 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
3621 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
3622 P10_BUILTIN_VEXPANDMQ.
3623 * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
3624 entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
3625 VEXPANDM, VEXTRACTM.
3627 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)>
3630 * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
3631 (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
3632 v16qi_ftype_pcvoid with correct number of parameters.
3634 2020-07-10 H.J. Lu <hjl.tools@gmail.com>
3637 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
3638 TARGET_AVX512VL when enabling FMA.
3640 2020-07-10 Andrea Corallo <andrea.corallo@arm.com>
3641 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
3642 Iain Apreotesei <iain.apreotesei@arm.com>
3644 * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New
3646 * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define.
3647 (arm_invalid_within_doloop): Implement invalid_within_doloop hook.
3648 (arm_target_insn_ok_for_lob): New function.
3649 * config/arm/arm.h (TARGET_HAVE_LOB): Define macro.
3650 * config/arm/thumb2.md (*doloop_end_internal, doloop_begin)
3651 (dls_insn): Add new patterns.
3652 (doloop_end): Modify to select LR when LOB is available.
3653 * config/arm/unspecs.md: Add new unspec.
3654 * doc/sourcebuild.texi (arm_v8_1_lob_ok)
3655 (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports
3658 2020-07-10 Richard Biener <rguenther@suse.de>
3660 PR tree-optimization/96133
3661 * gimple-fold.c (fold_array_ctor_reference): Do not
3662 recurse to folding a CTOR that does not fully cover the
3665 2020-07-10 Cui,Lili <lili.cui@intel.com>
3667 * common/config/i386/cpuinfo.h
3668 (get_intel_cpu): Handle sapphirerapids.
3669 * common/config/i386/i386-common.c
3670 (processor_names): Add sapphirerapids and alderlake.
3671 (processor_alias_table): Add sapphirerapids and alderlake.
3672 * common/config/i386/i386-cpuinfo.h
3673 (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
3674 INTEL_COREI7_ALDERLAKE.
3675 * config.gcc: Add -march=sapphirerapids and alderlake.
3676 * config/i386/driver-i386.c
3677 (host_detect_local_cpu) Handle sapphirerapids and alderlake.
3678 * config/i386/i386-c.c
3679 (ix86_target_macros_internal): Handle sapphirerapids and alderlake.
3680 * config/i386/i386-options.c
3681 (m_SAPPHIRERAPIDS) : Define.
3682 (m_ALDERLAKE): Ditto.
3683 (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
3684 (processor_cost_table): Add sapphirerapids and alderlake.
3685 (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
3686 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
3687 * config/i386/i386.h
3688 (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
3689 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
3690 PROCESSOR_ALDERLAKE.
3692 (PTA_CLDEMOTE): Ditto.
3693 (PTA_SERIALIZE): Ditto.
3694 (PTA_TSXLDTRK): New.
3695 (PTA_SAPPHIRERAPIDS): Ditto.
3696 (PTA_ALDERLAKE): Ditto.
3697 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
3698 PROCESSOR_ALDERLAKE.
3699 * doc/extend.texi: Add sapphirerapids and alderlake.
3700 * doc/invoke.texi: Add sapphirerapids and alderlake.
3702 2020-07-10 Martin Liska <mliska@suse.cz>
3704 * dumpfile.c [profile-report]: Add new profile dump.
3705 * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report.
3706 * passes.c (pass_manager::dump_profile_report): Change stderr
3709 2020-07-10 Kewen Lin <linkw@linux.ibm.com>
3711 * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which
3712 is adjusted by considering peeled prologue for non
3713 vect_use_loop_mask_for_alignment_p cases.
3715 2020-07-09 Peter Bergner <bergner@linux.ibm.com>
3718 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA
3719 specific types __vector_quad and __vector_pair, and initialize the
3720 MMA built-ins if TARGET_EXTRA_BUILTINS is set.
3721 (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask.
3722 Remove now unneeded mask variable.
3723 * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the
3724 OPTION_MASK_MMA flag for power10 if not already set.
3726 2020-07-09 Richard Biener <rguenther@suse.de>
3728 PR tree-optimization/96133
3729 * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p
3730 status between stmts.
3732 2020-07-09 H.J. Lu <hjl.tools@gmail.com>
3735 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA.
3736 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New.
3737 (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256.
3738 (rsqrtv16sf2): Removed.
3740 2020-07-09 Richard Biener <rguenther@suse.de>
3742 * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove.
3743 (vect_slp_analyze_and_verify_instance_alignment): Rename to ...
3744 (vect_slp_analyze_instance_alignment): ... this.
3745 * tree-vect-data-refs.c (verify_data_ref_alignment): Remove.
3746 (vect_verify_datarefs_alignment): Likewise.
3747 (vect_enhance_data_refs_alignment): Do not call
3748 vect_verify_datarefs_alignment.
3749 (vect_slp_analyze_node_alignment): Rename from
3750 vect_slp_analyze_and_verify_node_alignment and do not
3751 call verify_data_ref_alignment.
3752 (vect_slp_analyze_instance_alignment): Rename from
3753 vect_slp_analyze_and_verify_instance_alignment.
3754 * tree-vect-stmts.c (vectorizable_store): Dump when
3755 we vectorize an unaligned access.
3756 (vectorizable_load): Likewise.
3757 * tree-vect-loop.c (vect_analyze_loop_2): Do not call
3758 vect_verify_datarefs_alignment.
3759 * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust.
3761 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
3763 PR tree-optimization/95804
3764 * tree-loop-distribution.c (break_alias_scc_partitions): Force
3765 negative post order to reduction partition.
3767 2020-07-09 Jakub Jelinek <jakub@redhat.com>
3769 * omp-general.h (struct omp_for_data): Add min_inner_iterations
3771 * omp-general.c (omp_extract_for_data): Initialize them and remember
3772 them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there.
3773 * omp-expand.c (expand_omp_for_init_counts): Fix up computation of
3774 counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST.
3775 (expand_omp_for_init_vars): For
3776 fd->first_nonrect + 1 == fd->last_nonrect loops with for now
3777 INTEGER_CST fd->loop.n2 find quadratic equation roots instead of
3778 using fallback method when possible.
3780 2020-07-09 Omar Tahir <omar.tahir@arm.com>
3782 * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
3783 last_moveable_pseudo before returning.
3785 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com>
3787 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
3788 __ARM_FEATURE_BTI_DEFAULT support.
3790 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
3792 * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
3794 * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
3795 stub registers class.
3796 (aarch64_class_max_nregs): Likewise.
3797 (aarch64_register_move_cost): Likewise.
3798 (aarch64_sls_shared_thunks): Global array to store stub labels.
3799 (aarch64_sls_emit_function_stub): New.
3800 (aarch64_create_blr_label): New.
3801 (aarch64_sls_emit_blr_function_thunks): New.
3802 (aarch64_sls_emit_shared_blr_thunks): New.
3803 (aarch64_asm_file_end): New.
3804 (aarch64_indirect_call_asm): New.
3805 (TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
3806 (TARGET_ASM_FUNCTION_EPILOGUE): Use
3807 aarch64_sls_emit_blr_function_thunks.
3808 * config/aarch64/aarch64.h (STB_REGNUM_P): New.
3809 (enum reg_class): Add STUB_REGS class.
3810 (machine_function): Introduce `call_via` array for
3811 function-local stub labels.
3812 * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
3813 aarch64_indirect_call_asm to emit code when hardening BLR
3815 * config/aarch64/constraints.md (Ucr): New constraint
3816 representing registers for indirect calls. Is GENERAL_REGS
3817 usually, and STUB_REGS when hardening BLR instruction against
3819 * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
3820 is also a general register.
3822 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
3824 * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
3825 * config/aarch64/aarch64.c (aarch64_output_casesi): Emit
3826 speculation barrier after BR instruction if needs be.
3827 (aarch64_trampoline_init): Handle ptr_mode value & adjust size
3829 (aarch64_sls_barrier): New.
3830 (aarch64_asm_trampoline_template): Add needed barriers.
3831 * config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
3833 (TRAMPOLINE_SIZE): Account for barrier.
3834 * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
3835 simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
3836 Emit barrier if needs be, also account for possible barrier using
3837 "sls_length" attribute.
3838 (sls_length): New attribute.
3839 (length): Determine default using any non-default sls_length
3842 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
3844 * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
3846 (aarch64_harden_sls_blr_p): New.
3847 * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
3849 (aarch64_harden_sls_retbr_p): New.
3850 (aarch64_harden_sls_blr_p): New.
3851 (aarch64_validate_sls_mitigation): New.
3852 (aarch64_override_options): Parse options for SLS mitigation.
3853 * config/aarch64/aarch64.opt (-mharden-sls): New option.
3854 * doc/invoke.texi: Document new option.
3856 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
3858 * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization
3859 with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION
3860 or nested-cycle reduction.
3862 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
3864 * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string
3865 for fully masking to be more common.
3867 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
3869 * config/riscv/riscv.md (get_thread_pointer<mode>): New.
3871 * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
3872 Document __builtin_thread_pointer.
3874 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
3876 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
3877 Abort if any arguments on stack.
3879 2020-07-08 Eric Botcazou <ebotcazou@gcc.gnu.org>
3881 * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if
3882 either type has reverse scalar storage order.
3883 * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through
3884 a memory copy if either type has reverse scalar storage order.
3886 2020-07-08 Tobias Burnus <tobias@codesourcery.com>
3888 * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic
3889 on to the native compiler, if used.
3890 * config/nvptx/mkoffload.c (compile_native, main): Likewise.
3892 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com>
3894 * config/rs6000/altivec.h (vec_vmsumudm): New define.
3895 * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
3896 (altivec_vmsumudm): New define_insn.
3897 * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
3898 entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
3899 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for
3900 ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
3901 * doc/extend.texi: Add document for vmsumudm behind vmsum.
3903 2020-07-08 Richard Biener <rguenther@suse.de>
3905 * tree-vect-stmts.c (get_group_load_store_type): Pass
3906 in the SLP node and the alignment support scheme output.
3908 (get_load_store_type): Likewise.
3909 (vectorizable_store): Adjust.
3910 (vectorizable_load): Likewise.
3912 2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
3915 * expr.c (expand_expr_real_2): Get the mode from the type rather
3916 than the rtx, and assert that it is consistent with the mode of
3917 the rtx (where known). Optimize all constant integers, not just
3918 those that can be represented in poly_int64.
3920 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
3922 * config/rs6000/vsx.md (len_load_v16qi): New define_expand.
3923 (len_store_v16qi): Likewise.
3925 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
3927 * doc/md.texi (len_load_@var{m}): Document.
3928 (len_store_@var{m}): Likewise.
3929 * internal-fn.c (len_load_direct): New macro.
3930 (len_store_direct): Likewise.
3931 (expand_len_load_optab_fn): Likewise.
3932 (expand_len_store_optab_fn): Likewise.
3933 (direct_len_load_optab_supported_p): Likewise.
3934 (direct_len_store_optab_supported_p): Likewise.
3935 (expand_mask_load_optab_fn): New macro. Original renamed to ...
3936 (expand_partial_load_optab_fn): ... here. Add handlings for
3938 (expand_mask_store_optab_fn): New macro. Original renamed to ...
3939 (expand_partial_store_optab_fn): ... here. Add handlings for
3941 (internal_load_fn_p): Handle IFN_LEN_LOAD.
3942 (internal_store_fn_p): Handle IFN_LEN_STORE.
3943 (internal_fn_stored_value_index): Handle IFN_LEN_STORE.
3944 * internal-fn.def (LEN_LOAD): New internal function.
3945 (LEN_STORE): Likewise.
3946 * optabs.def (len_load_optab, len_store_optab): New optab.
3948 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
3950 * config/aarch64/aarch64.c (thunderx2t99_regmove_cost,
3951 thunderx2t99_vector_cost): Likewise.
3953 2020-07-07 Richard Biener <rguenther@suse.de>
3955 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix
3956 group overlap condition to allow negative step DR groups.
3957 * tree-vect-stmts.c (get_group_load_store_type): For
3958 multi element SLP groups force VMAT_STRIDED_SLP when the step
3961 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com>
3963 * doc/generic.texi: Fix typo.
3965 2020-07-07 Richard Biener <rguenther@suse.de>
3967 * lto-streamer-out.c (cmp_symbol_files): Use the computed
3968 order map to sort symbols from the same sub-file together.
3969 (lto_output): Compute a map of sub-file to an order number
3970 it appears in the symbol output array.
3972 2020-07-06 Richard Biener <rguenther@suse.de>
3974 PR tree-optimization/96075
3975 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
3976 TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
3977 for the misalignment calculation for negative step.
3979 2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
3981 * config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
3982 (*vsub_addsi4): New instruction.
3984 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
3986 * config/cris/cris.md (movulsr): New peephole2.
3988 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
3990 * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"):
3991 Correct gcc_assert of overlapping operands.
3993 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
3995 * config/cris/cris.c (cris_select_cc_mode): Always return
3996 CC_NZmode for matching comparisons. Clarify comments.
3997 * config/cris/cris-modes.def: Clarify mode comment.
3998 * config/cris/cris.md (plusminus, plusminusumin, plusumin): New
4000 (addsub, addsubbo, nd): New code iterator attributes.
4001 ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code
4002 iterator constructs instead of match_operator constructs.
4003 ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from
4004 "*extop<mode>si<setnz>".
4005 ("*add<su>qihi_swap"): Similar from "*addxqihi_swap".
4006 ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from
4007 "*extop<mode>si<setnz>_swap".
4009 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
4011 * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap")
4012 ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate.
4014 2020-07-03 Eric Botcazou <ebotcazou@gcc.gnu.org>
4016 * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that
4017 were initially created for the assignment of a variable-sized
4018 object and whose source is now a string constant.
4019 * gimple-ssa-store-merging.c (struct merged_store_group): Document
4020 STRING_CST for rhs_code field.
4021 Add string_concatenation boolean field.
4022 (merged_store_group::merged_store_group): Initialize it as well as
4024 (merged_store_group::do_merge): Set it upon seeing a STRING_CST.
4025 Also set bit_insertion here upon seeing a BIT_INSERT_EXPR.
4026 (merged_store_group::apply_stores): Clear it for small regions.
4027 Do not create a power-of-2-sized buffer if it is still true.
4028 And do not set bit_insertion here again.
4029 (encode_tree_to_bitpos): Deal with BLKmode for the expression.
4030 (merged_store_group::can_be_merged_into): Deal with STRING_CST.
4031 (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion
4032 to true after changing MEM_REF stores into BIT_INSERT_EXPR stores.
4033 (count_multiple_uses): Return 0 for STRING_CST.
4034 (split_group): Do not split the group for a string concatenation.
4035 (imm_store_chain_info::output_merged_store): Constify and rename
4036 some local variables. Build an array type as destination type
4037 for a string concatenation, as well as a zero mask, and call
4038 build_string to build the source.
4039 (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR.
4040 (pass_store_merging::process_store): Accept STRING_CST on the RHS.
4041 * gimple.h (gimple_call_alloca_for_var_p): New accessor function.
4042 * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var.
4043 * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY.
4045 2020-07-03 Martin Jambor <mjambor@suse.cz>
4048 * ipa-sra.c (all_callee_accesses_present_p): Do not accept type
4049 mismatched accesses.
4051 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
4053 * config/nvptx/nvptx.md (popcount<mode>2): New instructions.
4054 (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions.
4056 2020-07-03 Martin Liska <mliska@suse.cz>
4057 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4060 * gcov-dump.c (tag_function): Use gcov_position_t
4063 2020-07-03 Richard Biener <rguenther@suse.de>
4065 PR tree-optimization/96037
4066 * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def.
4068 2020-07-03 Richard Biener <rguenther@suse.de>
4070 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the
4071 original non-pattern stmts, look at the pattern stmt
4072 vectorization status.
4074 2020-07-03 Andrew Stubbs <ams@codesourcery.com>
4076 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
4078 2020-07-03 Richard Biener <rguenther@suse.de>
4080 * tree-vectorizer.h (vec_info::insert_on_entry): New.
4081 (vec_info::insert_seq_on_entry): Likewise.
4082 * tree-vectorizer.c (vec_info::insert_on_entry): Implement.
4083 (vec_info::insert_seq_on_entry): Likewise.
4084 * tree-vect-stmts.c (vect_init_vector_1): Use
4085 vec_info::insert_on_entry.
4086 (vect_finish_stmt_generation): Set modified bit after
4088 * tree-vect-slp.c (vect_create_constant_vectors): Simplify
4089 by using vec_info::insert_seq_on_entry and bypassing
4091 (vect_schedule_slp_instance): Deal with all-constant
4094 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
4095 Tom de Vries <tdevries@suse.de>
4098 * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi
4099 to access TYPE_SIZE (type). Return at least the mode's alignment.
4101 2020-07-02 Richard Biener <rguenther@suse.de>
4103 PR tree-optimization/96028
4104 * tree-vect-slp.c (vect_slp_convert_to_external): Make sure
4105 we have scalar stmts to use.
4106 (vect_slp_analyze_node_operations): When analyzing a child
4107 failed try externalizing the parent node.
4109 2020-07-02 Martin Jambor <mjambor@suse.cz>
4112 * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust
4113 argument index if necessary.
4115 2020-07-02 Martin Liska <mliska@suse.cz>
4118 * tree-vect-generic.c (expand_vector_condition): Forward declaration.
4119 (expand_vector_comparison): Do not expand a comparison if all
4120 uses are consumed by a VEC_COND_EXPR.
4121 (expand_vector_operation): Change void return type to bool.
4122 (expand_vector_operations_1): Pass dce_ssa_names.
4124 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com>
4127 * system.h (NULL): Redefine to nullptr.
4129 2020-07-02 Jakub Jelinek <jakub@redhat.com>
4131 PR tree-optimization/95857
4132 * tree-cfg.c (group_case_labels_stmt): When removing an unreachable
4133 base_bb, remember all forced and non-local labels on it and later
4134 treat those as if they have NULL label_to_block. Formatting fix.
4137 2020-07-02 Richard Biener <rguenther@suse.de>
4139 PR tree-optimization/96022
4140 * tree-vect-stmts.c (vectorizable_shift): Only use the
4141 first vector stmt when extracting the scalar shift amount.
4142 * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary
4143 nodes with all-scalar children from scalars but not stores.
4144 (vect_analyze_slp_instance): Mark the node not failed.
4146 2020-07-02 Felix Yang <felix.yang@huawei.com>
4148 PR tree-optimization/95961
4149 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the
4150 number of scalars instead of the number of vectors as an upper bound
4151 for the loop saving info about DR in the hash table. Remove unused
4154 2020-07-02 Jakub Jelinek <jakub@redhat.com>
4156 * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with
4157 invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid
4158 OpenMP non-rectangular loops. Use XALLOCAVEC.
4160 2020-07-02 Martin Liska <mliska@suse.cz>
4162 PR gcov-profile/95348
4163 * coverage.c (read_counts_file): Read only COUNTERS that are
4165 * gcov-dump.c (tag_function): Change signature from unsigned to
4167 (tag_blocks): Likewise.
4168 (tag_arcs): Likewise.
4169 (tag_lines): Likewise.
4170 (tag_counters): Likewise.
4171 (tag_summary): Likewise.
4172 * gcov.c (read_count_file): Read all non-zero counters
4175 2020-07-02 Kito Cheng <kito.cheng@sifive.com>
4177 * config/riscv/multilib-generator (arch_canonicalize): Handle
4178 multi-letter extension.
4179 Using underline as separator between different extensions.
4181 2020-07-01 Pip Cet <pipcet@gmail.com>
4183 * spellcheck.c (test_data): Add problematic strings.
4184 (test_metric_conditions): Don't test the triangle inequality
4185 condition, which our distance function does not satisfy.
4187 2020-07-01 Omar Tahir <omar.tahir@arm.com>
4189 * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always
4190 generate a BTI instruction.
4192 2020-07-01 Jeff Law <law@redhat.com>
4194 PR tree-optimization/94882
4195 * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification.
4197 2020-07-01 Jeff Law <law@redhat.com>
4199 * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword.
4200 (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise.
4202 2020-07-01 Andrea Corallo <andrea.corallo@arm.com>
4204 * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums
4205 for 64bits fpsr/fpcr getter setters builtin variants.
4206 (aarch64_init_fpsr_fpcr_builtins): New function.
4207 (aarch64_general_init_builtins): Modify to make use of the later.
4208 (aarch64_expand_fpsr_fpcr_setter): New function.
4209 (aarch64_general_expand_builtin): Modify to make use of the later.
4210 * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>)
4211 (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and
4212 generalizing 'get_fpcr', 'set_fpsr'.
4213 * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int
4215 (fpscr_name): New int attribute.
4216 * doc/extend.texi (__builtin_aarch64_get_fpcr64)
4217 (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64)
4218 (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in
4221 2020-07-01 Martin Liska <mliska@suse.cz>
4223 * gcov.c (print_usage): Avoid trailing space for -j option.
4225 2020-07-01 Richard Biener <rguenther@suse.de>
4227 PR tree-optimization/95839
4228 * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing
4229 vectors are not uniform.
4230 (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of
4232 (vect_build_slp_tree_2): For groups of lane extracts
4233 from a vector register generate a permute node
4234 with a special child representing the pre-existing vector.
4235 (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing.
4236 (vect_slp_analyze_node_operations): Use SLP_TREE_LANES.
4237 (vectorizable_slp_permutation): Do not generate or cost identity
4239 (vect_schedule_slp_instance): Handle pre-existing vector
4240 that are function arguments.
4242 2020-07-01 Richard Biener <rguenther@suse.de>
4244 * system.h (INCLUDE_ISL): New guarded include.
4245 * graphite-dependences.c: Use it.
4246 * graphite-isl-ast-to-gimple.c: Likewise.
4247 * graphite-optimize-isl.c: Likewise.
4248 * graphite-poly.c: Likewise.
4249 * graphite-scop-detection.c: Likewise.
4250 * graphite-sese-to-poly.c: Likewise.
4251 * graphite.c: Likewise.
4252 * graphite.h: Drop the includes here.
4254 2020-07-01 Martin Liska <mliska@suse.cz>
4256 * gcov.c (print_usage): Shorted option description for -j
4259 2020-07-01 Martin Liska <mliska@suse.cz>
4261 * doc/gcov.texi: Rename 2 options.
4262 * gcov.c (print_usage): Rename -i,--json-format to
4263 -j,--json-format and -j,--human-readable to -H,--human-readable.
4264 (process_args): Fix up parsing. Document obsolete options and
4265 how are they changed.
4267 2020-07-01 Jeff Law <law@redhat.com>
4269 * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword.
4270 (pa_output_ascii): Likewise.
4272 2020-07-01 Kito Cheng <kito.cheng@sifive.com>
4274 * common/config/riscv/riscv-common.c (riscv_subset_t): New field
4276 (riscv_subset_list::parsing_subset_version): Add parameter for
4277 indicate explicitly version, and handle explicitly version.
4278 (riscv_subset_list::handle_implied_ext): Ditto.
4279 (riscv_subset_list::add): Ditto.
4280 (riscv_subset_t::riscv_subset_t): Init new field.
4281 (riscv_subset_list::to_string): Always output version info if version
4282 explicitly specified.
4283 (riscv_subset_list::parsing_subset_version): Handle explicitly
4285 (riscv_subset_list::parse_std_ext): Ditto.
4286 (riscv_subset_list::parse_multiletter_ext): Ditto.
4288 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
4292 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
4293 "Advanced SIMD type".
4294 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
4295 attributes are equal.
4296 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
4298 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
4299 in the "Advanced SIMD type" attribute.
4300 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
4301 attribute to each Advanced SIMD type, using the mangled type
4302 as the attribute's single argument.
4304 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
4307 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
4308 -mgeneral-regs-only is not used.
4310 2020-06-30 Yang Yang <yangyang305@huawei.com>
4312 PR tree-optimization/95855
4313 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
4314 checks to recognize a missed if-conversion opportunity when
4315 judging whether to duplicate a block.
4317 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
4319 * doc/extend.texi: Change references to "future architecture" to
4320 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
4321 references to "future" (because the future is now).
4323 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
4325 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
4327 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
4329 * simplify-rtx.c (simplify_distributive_operation): New function
4330 to un-distribute a binary operation of two binary operations.
4331 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
4332 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
4334 (test_scalar_int_ops): New function for unit self-testing
4335 scalar integer transformations in simplify-rtx.c.
4336 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
4337 (simplify_rtx_c_tests): Call test_scalar_ops.
4339 2020-06-29 Richard Biener <rguenther@suse.de>
4341 PR tree-optimization/95916
4342 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
4343 the case of not vectorized externals.
4345 2020-06-29 Richard Biener <rguenther@suse.de>
4347 * tree-vectorizer.h: Do not include <utility>.
4349 2020-06-29 Martin Liska <mliska@suse.cz>
4351 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
4352 instead of gimple_stmt_iterator::bb.
4353 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
4354 * tree-vectorizer.h: Likewise.
4356 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
4358 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
4359 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
4360 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
4361 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
4362 (gcn_dwarf_register_number): New function.
4363 (gcn_dwarf_register_span): New function.
4364 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
4366 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
4368 PR tree-optimization/95854
4369 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
4370 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
4371 unsigned HOST_WIDE_INT.
4373 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4375 * config/sparc/sparc.c (epilogue_renumber): Remove register.
4376 (sparc_print_operand_address): Likewise.
4377 (sparc_type_code): Likewise.
4378 (set_extends): Likewise.
4380 2020-06-29 Martin Liska <mliska@suse.cz>
4382 PR tree-optimization/92860
4383 * optc-save-gen.awk: Add exceptions for arc target.
4385 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
4387 * doc/sourcebuild.texi: Describe globbing of the
4388 dump file scanning commands "suffix" argument.
4390 2020-06-28 Martin Sebor <msebor@redhat.com>
4393 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
4395 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
4397 * tree.c (get_nonnull_args): Consider the this pointer implicitly
4399 * var-tracking.c (deps_vec): New type.
4400 (var_loc_dep_vec): New function.
4401 (VAR_LOC_DEP_VEC): Use it.
4403 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
4405 * internal-fn.c (direct_mask_load_optab_supported_p): Use
4406 convert_optab_supported_p instead of direct_optab_supported_p.
4407 (direct_mask_store_optab_supported_p): Likewise.
4409 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
4411 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
4412 simplify_using_ranges class.
4413 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
4414 field. Adjust all methods to use new field.
4415 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
4416 simplify_using_ranges class.
4417 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
4418 field. Adjust all methods to use new field.
4419 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
4420 (vrp_prop::vrp_finalize): New vrp_folder argument.
4421 (execute_vrp): Pass folder to vrp_finalize. Use
4422 simplify_using_ranges class.
4423 Remove cleanup_edges_and_switches call.
4424 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
4425 value_range_equiv uses to value_range.
4426 (simplify_using_ranges::op_with_boolean_value_range_p): Use
4427 simplify_using_ranges class.
4428 (check_for_binary_op_overflow): Make static.
4429 (vr_values::extract_range_basic): Pass this to
4430 check_for_binary_op_overflow.
4431 (compare_range_with_value): Change value_range_equiv uses to
4433 (vr_values::vr_values): Initialize simplifier field.
4434 Remove uses of to_remove_edges and to_update_switch_stmts.
4435 (vr_values::~vr_values): Remove uses of to_remove_edges and
4436 to_update_switch_stmts.
4437 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
4439 (vr_values::compare_name_with_value): Same.
4440 (vr_values::compare_names): Same.
4441 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
4442 (vr_values::vrp_evaluate_conditional): Same.
4443 (vr_values::vrp_visit_cond_stmt): Same.
4444 (find_case_label_ranges): Change value_range_equiv uses to
4446 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
4447 (vr_values::simplify_truth_ops_using_ranges): Move to
4448 simplify_using_ranges class.
4449 (vr_values::simplify_div_or_mod_using_ranges): Same.
4450 (vr_values::simplify_min_or_max_using_ranges): Same.
4451 (vr_values::simplify_abs_using_ranges): Same.
4452 (vr_values::simplify_bit_ops_using_ranges): Same.
4453 (test_for_singularity): Change value_range_equiv uses to
4455 (range_fits_type_p): Same.
4456 (vr_values::simplify_cond_using_ranges_1): Same.
4457 (vr_values::simplify_cond_using_ranges_2): Make extern.
4458 (vr_values::fold_cond): Move to simplify_using_ranges class.
4459 (vr_values::simplify_switch_using_ranges): Same.
4460 (vr_values::cleanup_edges_and_switches): Same.
4461 (vr_values::simplify_float_conversion_using_ranges): Same.
4462 (vr_values::simplify_internal_call_using_ranges): Same.
4463 (vr_values::two_valued_val_range_p): Same.
4464 (vr_values::simplify_stmt_using_ranges): Move to...
4465 (simplify_using_ranges::simplify): ...here.
4466 * vr-values.h (class vr_values): Move all the simplification of
4467 statements using ranges methods and code from here...
4468 (class simplify_using_ranges): ...to here.
4469 (simplify_cond_using_ranges_2): New extern prototype.
4471 2020-06-27 Jakub Jelinek <jakub@redhat.com>
4473 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
4474 member, move outer member.
4475 (struct omp_for_data): Add first_nonrect and last_nonrect members.
4476 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
4477 last_nonrect and non_rect_referenced members.
4478 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
4480 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
4481 non-rectangular loops.
4482 (extract_omp_for_update_vars): Likewise.
4483 (expand_omp_for_generic, expand_omp_for_static_nochunk,
4484 expand_omp_for_static_chunk, expand_omp_simd,
4485 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
4486 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
4487 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
4490 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
4493 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
4495 * config/i386/i386.c (ix86_frame_pointer_required): Update
4498 2020-06-26 Yichao Yu <yyc1992@gmail.com>
4500 * multiple_target.c (redirect_to_specific_clone): Fix tests
4501 to check individual attribute rather than an attribute list.
4503 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
4505 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
4506 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
4509 2020-06-26 Marek Polacek <polacek@redhat.com>
4511 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
4512 * doc/standards.texi (C Language): Correct the default dialect.
4513 (C++ Language): Update the default for C++ to gnu++17.
4515 2020-06-26 Eric Botcazou <ebotcazou@gcc.gnu.org>
4517 * tree-ssa-reassoc.c (dump_range_entry): New function.
4518 (debug_range_entry): New debug function.
4519 (update_range_test): Invoke dump_range_entry for dumping.
4520 (optimize_range_tests_to_bit_test): Merge the entry test in the
4521 bit test when possible and lower the profitability threshold.
4523 2020-06-26 Richard Biener <rguenther@suse.de>
4525 PR tree-optimization/95897
4526 * tree-vectorizer.h (vectorizable_induction): Remove
4527 unused gimple_stmt_iterator * parameter.
4528 * tree-vect-loop.c (vectorizable_induction): Likewise.
4529 (vect_analyze_loop_operations): Adjust.
4530 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
4531 (vect_transform_stmt): Likewise.
4532 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
4533 for fold-left reductions, clarify existing reduction case.
4535 2020-06-25 Nick Clifton <nickc@redhat.com>
4537 * config/m32r/m32r.md (movsicc): Disable pattern.
4539 2020-06-25 Richard Biener <rguenther@suse.de>
4541 PR tree-optimization/95839
4542 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
4543 check on the number of datarefs.
4545 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
4547 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
4548 the insn_data n_operands value to unsigned.
4550 2020-06-25 Richard Biener <rguenther@suse.de>
4552 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
4553 vector defs to determine insertion place.
4555 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
4558 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
4559 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
4560 (PTA_TIGERLAKE): Add PTA_CLWB.
4562 2020-06-25 Richard Biener <rguenther@suse.de>
4564 PR tree-optimization/95866
4565 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
4566 vectorized shift operands. For scalar shifts use lane zero
4567 of a vectorized shift operand.
4569 2020-06-25 Martin Liska <mliska@suse.cz>
4571 PR tree-optimization/95745
4573 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
4574 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
4576 * tree-vect-generic.c (expand_vector_condition): Remove dead
4577 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
4579 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
4582 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
4583 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
4584 (convert_4f32_8f16): New define_expand
4585 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
4587 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
4588 overloaded builtin entry.
4589 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
4590 (vsx_xvcvsphp): New define_insn.
4592 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
4593 Segher Boessenkool <segher@kernel.crashing.org>
4595 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
4597 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
4599 * simplify-rtx.c (simplify_unary_operation_1): Simplify
4600 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
4602 2020-06-24 Richard Biener <rguenther@suse.de>
4604 PR tree-optimization/95866
4605 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
4606 (vect_build_slp_tree_2): Properly reset matches[0],
4607 ignore uniform constants.
4609 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4612 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
4613 (cpu_indicator_init): Likewise.
4614 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
4616 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4619 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
4620 detection with AVX512BF16.
4622 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4625 * common/config/i386/i386-isas.h: New file. Extracted from
4626 gcc/config/i386/i386-builtins.c.
4627 (_isa_names_table): Add option.
4628 (ISA_NAMES_TABLE_START): New.
4629 (ISA_NAMES_TABLE_END): Likewise.
4630 (ISA_NAMES_TABLE_ENTRY): Likewise.
4631 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
4632 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
4633 from enum processor_features.
4634 * config/i386/driver-i386.c: Include
4635 "common/config/i386/cpuinfo.h" and
4636 "common/config/i386/i386-isas.h".
4637 (has_feature): New macro.
4638 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
4639 features. Use has_feature to detect processor features. Call
4640 Call get_intel_cpu to get the newer Intel CPU name. Use
4641 isa_names_table to generate command-line options.
4642 * config/i386/i386-builtins.c: Include
4643 "common/config/i386/i386-isas.h".
4644 (_arch_names_table): Removed.
4645 (isa_names_table): Likewise.
4647 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4650 * common/config/i386/cpuinfo.h: New file.
4651 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
4652 (__processor_model2): New.
4653 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
4654 (has_cpu_feature): New function.
4655 (set_cpu_feature): Likewise.
4656 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
4657 CHECK___builtin_cpu_is. Return AMD CPU name.
4658 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
4659 Use CHECK___builtin_cpu_is. Return Intel CPU name.
4660 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
4661 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
4662 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
4663 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
4664 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
4665 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
4666 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
4667 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
4668 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
4669 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
4670 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
4671 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
4672 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
4673 FEATURE_XSAVEOPT and FEATURE_XSAVES
4674 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
4675 Also update cpu_model2.
4676 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
4677 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
4678 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
4679 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
4680 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
4681 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
4682 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
4683 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
4684 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
4685 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
4686 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
4687 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
4688 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
4689 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
4690 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
4691 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
4692 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
4693 (SIZE_OF_CPU_FEATURES): New.
4694 * config/i386/i386-builtins.c (processor_features): Removed.
4695 (isa_names_table): Replace F_XXX with FEATURE_XXX.
4696 (fold_builtin_cpu): Change __cpu_features2 to an array.
4698 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4701 * common/config/i386/i386-common.c (processor_alias_table): Add
4702 processor model and priority to each entry.
4703 (pta_size): Updated with -6.
4704 (num_arch_names): New.
4705 * common/config/i386/i386-cpuinfo.h: New file.
4706 * config/i386/i386-builtins.c (feature_priority): Removed.
4707 (processor_model): Likewise.
4708 (_arch_names_table): Likewise.
4709 (arch_names_table): Likewise.
4710 (_isa_names_table): Replace P_ZERO with P_NONE.
4711 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
4712 processor_alias_table.
4713 (fold_builtin_cpu): Replace arch_names_table with
4714 processor_alias_table.
4715 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
4716 (pta): Add model and priority.
4717 (num_arch_names): New.
4719 2020-06-24 Richard Biener <rguenther@suse.de>
4721 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
4723 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
4724 Simplify for new position of vectorized SLP loads.
4725 (vect_slp_analyze_node_dependences): Adjust for it.
4726 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
4727 for the first stmts dataref.
4728 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
4729 (vect_schedule_slp_instance): Emit loads before the
4731 * tree-vect-stmts.c (vectorizable_load): Do what the comment
4732 says and use vect_find_first_scalar_stmt_in_slp.
4734 2020-06-24 Richard Biener <rguenther@suse.de>
4736 PR tree-optimization/95856
4737 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
4740 2020-06-24 Jakub Jelinek <jakub@redhat.com>
4743 * fold-const.c (fold_cond_expr_with_comparison): Optimize
4744 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
4746 2020-06-24 Jakub Jelinek <jakub@redhat.com>
4748 * omp-low.c (lower_omp_for): Fix two pastos.
4750 2020-06-24 Martin Liska <mliska@suse.cz>
4752 * optc-save-gen.awk: Compare string options in cl_optimization_compare
4755 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
4757 * config.gcc: Identify power10 as a 64-bit processor and as valid
4758 for --with-cpu and --with-tune.
4760 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
4762 * Makefile.in (LANG_MAKEFRAGS): Same.
4763 (tmake_file): Use -include.
4766 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
4768 * REVISION: Delete file meant for a private branch.
4770 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
4773 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
4774 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
4776 2020-06-23 Alexandre Oliva <oliva@adacore.com>
4778 * collect-utils.h (dumppfx): New.
4779 * collect-utils.c (dumppfx): Likewise.
4780 * lto-wrapper.c (run_gcc): Set global dumppfx.
4781 (compile_offload_image): Pass a -dumpbase on to mkoffload.
4782 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
4783 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
4785 (compile_native): Pass -dumpbase et al to compiler.
4786 * config/gcn/mkoffload.c (gcn_dumpbase): New.
4787 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
4788 save_temps. Pass -dumpbase et al to offload target compiler.
4789 (compile_native): Pass -dumpbase et al to compiler.
4791 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
4793 * REVISION: New file.
4795 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
4797 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
4798 Update comment for ISA 3.1.
4799 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
4800 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
4801 on AIX, and -mpower10 elsewhere.
4802 * config/rs6000/future.md: Delete.
4803 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
4805 * config/rs6000/power10.md: New file.
4806 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
4807 PPC_PLATFORM_FUTURE.
4808 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
4809 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
4810 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
4811 Use BU_P10_* instead of BU_FUTURE_*.
4812 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
4813 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
4814 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
4815 FUTURE_BUILTIN_VEC_XXEVAL.
4816 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
4817 Update compiler messages.
4818 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
4819 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
4820 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
4822 * config/rs6000/rs6000-string.c: Ditto.
4823 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
4824 instead of "future", reorder it to right after "power9".
4825 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
4826 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
4827 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
4828 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
4829 not ISA_FUTURE_MASKS_SERVER.
4830 (rs6000_opt_masks): Use "power10" instead of "future".
4831 (rs6000_builtin_mask_names): Ditto.
4832 (rs6000_disable_incompatible_switches): Ditto.
4833 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
4834 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
4835 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
4836 not RS6000_BTM_FUTURE.
4837 * config/rs6000/rs6000.md: Use "power10", not "future". Use
4838 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
4840 * config/rs6000/rs6000.opt (mfuture): Delete.
4842 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
4843 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
4845 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
4847 * coretypes.h (first_type): Delete.
4848 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
4850 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4852 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
4853 (arm_mve_hw): Likewise.
4855 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
4858 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
4861 2020-06-22 Richard Biener <rguenther@suse.de>
4863 PR tree-optimization/95770
4864 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
4867 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
4869 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
4870 (gcn_return_in_memory): Return vectors in memory.
4872 2020-06-22 Jakub Jelinek <jakub@redhat.com>
4874 * omp-general.c (omp_extract_for_data): For triangular loops with
4875 all loop invariant expressions constant where the innermost loop is
4876 executed at least once compute number of iterations at compile time.
4878 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
4880 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
4881 (DRIVER_SELF_SPECS): New.
4883 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
4885 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
4886 (RISCV_FTYPE_ATYPES0): New.
4887 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
4888 * config/riscv/riscv-ftypes.def: Remove VOID argument.
4890 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
4892 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
4893 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
4896 (ASM_CPU_SPEC): Remove vsx and altivec options.
4897 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
4900 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
4901 (TARGET_DEFAULT): Only define if not BIARCH.
4902 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
4905 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
4908 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
4909 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
4911 (CPLUSPLUS_CPP_SPEC): Same.
4914 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
4915 * config/rs6000/defaultaix64.h: New file.
4916 * config/rs6000/t-aix64: New file.
4918 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
4920 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
4921 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
4922 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
4924 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
4925 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
4926 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
4927 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
4928 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
4929 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
4930 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
4931 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
4932 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
4933 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
4934 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
4935 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
4936 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
4937 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
4938 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
4939 Allow zero constants.
4940 (print_operand) <case 'A'>: New output modifier.
4941 (rs6000_split_multireg_move): Add support for inserting accumulator
4942 priming and depriming instructions. Add support for splitting an
4943 assemble accumulator pattern.
4944 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
4945 rs6000_gimple_fold_mma_builtin): New functions.
4946 (RS6000_BUILTIN_M): New macro.
4947 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
4948 (bdesc_mma): Add new MMA built-in support.
4949 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
4950 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
4952 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
4953 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
4954 and rs6000_gimple_fold_mma_builtin.
4955 (rs6000_expand_builtin): Call mma_expand_builtin.
4956 Use RS6000_BTC_OPND_MASK.
4957 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
4958 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
4959 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
4960 VSX_BUILTIN_XVCVBF16SP.
4961 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
4962 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
4963 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
4964 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
4965 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
4966 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
4967 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
4968 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
4969 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
4970 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
4971 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
4972 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
4973 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
4974 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
4975 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
4976 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
4977 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
4978 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
4979 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
4980 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
4981 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
4982 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
4983 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
4984 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
4985 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
4986 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
4987 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
4988 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
4989 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
4990 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
4991 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
4992 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
4993 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
4994 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
4995 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
4996 MMA_AVVI4I4I4): New define_int_iterator.
4997 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
4998 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
4999 avvi4i4i4): New define_int_attr.
5000 (*movpxi): Add zero constant alternative.
5001 (mma_assemble_pair, mma_assemble_acc): New define_expand.
5002 (*mma_assemble_acc): New define_insn_and_split.
5003 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
5004 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
5005 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
5006 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
5007 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
5008 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
5009 (UNSPEC_VSX_XVCVSPBF16): Likewise.
5010 (XVCVBF16): New define_int_iterator.
5011 (xvcvbf16): New define_int_attr.
5012 (vsx_<xvcvbf16>): New define_insn.
5013 * doc/extend.texi: Document the mma built-ins.
5015 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
5016 Michael Meissner <meissner@linux.ibm.com>
5018 * config/rs6000/mma.md: New file.
5019 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
5021 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
5022 for __vector_pair and __vector_quad types.
5023 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
5025 (POWERPC_MASKS): Likewise.
5026 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
5027 (POI, PXI): New partial integer modes.
5028 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
5029 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
5030 (rs6000_hard_regno_mode_ok_uncached): Likewise.
5031 Add support for POImode being allowed in VSX registers and PXImode
5032 being allowed in FP registers.
5033 (rs6000_modes_tieable_p): Adjust comment.
5034 Add support for POImode and PXImode.
5035 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
5036 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
5037 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
5038 Set up appropriate addr_masks for vector pair and vector quad addresses.
5039 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
5040 vector quad registers. Setup reload handlers for POImode and PXImode.
5041 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
5042 (rs6000_option_override_internal): Error if -mmma is specified
5043 without -mcpu=future.
5044 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
5045 (quad_address_p): Change size test to less than 16 bytes.
5046 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
5047 and vector quad instructions.
5048 (avoiding_indexed_address_p): Likewise.
5049 (rs6000_emit_move): Disallow POImode and PXImode moves involving
5051 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
5052 and FP registers for PXImode.
5053 (rs6000_split_multireg_move): Support splitting POImode and PXImode
5055 (rs6000_mangle_type): Adjust comment. Add support for mangling
5056 __vector_pair and __vector_quad types.
5057 (rs6000_opt_masks): Add entry for mma.
5058 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
5059 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
5060 (address_to_insn_form): Likewise.
5061 (reg_to_non_prefixed): Likewise.
5062 (rs6000_invalid_conversion): New function.
5063 * config/rs6000/rs6000.h (MASK_MMA): Define.
5064 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
5065 (VECTOR_ALIGNMENT_P): New helper macro.
5066 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
5067 (RS6000_BTM_MMA): Define.
5068 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
5069 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
5070 RS6000_BTI_vector_quad.
5071 (vector_pair_type_node): New.
5072 (vector_quad_type_node): New.
5073 * config/rs6000/rs6000.md: Include mma.md.
5074 (define_mode_iterator RELOAD): Add POI and PXI.
5075 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
5076 * config/rs6000/rs6000.opt (-mmma): New.
5077 * doc/invoke.texi: Document -mmma.
5079 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
5081 PR tree-optimization/95638
5082 * tree-loop-distribution.c (pg_edge_callback_data): New field.
5083 (loop_distribution::break_alias_scc_partitions): Record and restore
5084 postorder information. Fix memory leak.
5086 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
5088 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
5089 (output_file_start): Use const 'char *'.
5091 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
5093 PR tree-optimization/94880
5094 * match.pd (A | B) - B -> (A & ~B): New simplification.
5096 2020-06-19 Richard Biener <rguenther@suse.de>
5098 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
5099 for lane permutations.
5101 2020-06-19 Richard Biener <rguenther@suse.de>
5103 PR tree-optimization/95761
5104 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
5105 vectorized stmts for finding the last one.
5107 2020-06-18 Felix Yang <felix.yang@huawei.com>
5109 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
5110 vect_relevant_for_alignment_p to filter out data references in
5111 the loop whose alignment is irrelevant when trying loop peeling
5114 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
5116 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
5117 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5118 mode iterator for the first operand of ZERO_EXTRACT RTX.
5119 Change ext_register_operand predicate to register_operand.
5120 Rename from *cmpqi_ext_1.
5121 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
5122 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
5123 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
5124 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5125 (*extv<mode>): Use SWI24 mode iterator for the first operand
5126 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5127 to register_operand.
5128 (*extzv<mode>): Use SWI248 mode iterator for the first operand
5129 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5130 to register_operand.
5131 (*extzvqi): Use SWI248 mode iterator instead of SImode for
5132 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
5133 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
5135 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
5136 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5137 mode iterator for the first operand of ZERO_EXTRACT RTX.
5138 Change ext_register_operand predicate to register_operand.
5139 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
5140 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
5142 (*insvqi_1): Use SWI248 mode iterator instead of SImode
5143 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
5144 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
5145 predicate to register_operand.
5148 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
5149 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5150 mode iterator for the first operand of ZERO_EXTRACT RTX.
5151 Change ext_register_operand predicate to register_operand.
5152 (addqi_ext_1): New expander.
5153 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5154 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5155 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5156 to register_operand. Rename from *addqi_ext_1.
5157 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
5158 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5159 (udivmodqi4): Ditto.
5160 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5161 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5162 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5163 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5164 to register_operand. Rename from *testqi_ext_1.
5165 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
5166 (andqi_ext_1): New expander.
5167 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5168 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5169 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5170 to register_operand. Rename from andqi_ext_1.
5171 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
5172 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
5173 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
5174 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
5175 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5176 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
5177 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5178 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5179 to register_operand. Rename from *xorqi_ext_1_cc.
5180 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
5181 in mode, matching its first operand.
5182 (promote_duplicated_reg): Update for renamed insv<mode>_1.
5183 * config/i386/predicates.md (ext_register_operand): Remove predicate.
5185 2020-06-18 Martin Sebor <msebor@redhat.com>
5189 * builtins.c (compute_objsize): Remove call to
5190 compute_builtin_object_size and instead compute conservative sizes
5193 2020-06-18 Martin Liska <mliska@suse.cz>
5195 * coretypes.h (struct iterator_range): New type.
5196 * tree-vect-patterns.c (vect_determine_precisions): Use
5197 range-based iterator.
5198 (vect_pattern_recog): Likewise.
5199 * tree-vect-slp.c (_bb_vec_info): Likewise.
5200 (_bb_vec_info::~_bb_vec_info): Likewise.
5201 (vect_slp_check_for_constructors): Likewise.
5202 * tree-vectorizer.h:Add new iterators
5203 and functions that use it.
5205 2020-06-18 Martin Liska <mliska@suse.cz>
5207 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
5208 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
5209 of a VEC_COND_EXPR cannot be tcc_comparison and so that
5210 a SSA_NAME needs to be created before we use it for the first
5211 argument of the VEC_COND_EXPR.
5212 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
5214 2020-06-18 Richard Biener <rguenther@suse.de>
5217 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
5218 to the target if necessary.
5219 (expand_vect_cond_mask_optab_fn): Likewise.
5221 2020-06-18 Martin Liska <mliska@suse.cz>
5223 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
5224 vcond as we check for NULL pointer.
5226 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
5228 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
5229 silence empty-body warning with gcc_fallthrough.
5231 2020-06-18 Jakub Jelinek <jakub@redhat.com>
5233 PR tree-optimization/95699
5234 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
5235 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
5236 declarations to the statements that set them where possible.
5238 2020-06-18 Jakub Jelinek <jakub@redhat.com>
5241 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
5242 scalar mode halfvectype other than vector boolean for
5243 VEC_PACK_TRUNC_EXPR.
5245 2020-06-18 Richard Biener <rguenther@suse.de>
5247 * varasm.c (assemble_variable): Make sure to not
5248 defer output when outputting addressed constants.
5249 (output_constant_def_contents): Likewise.
5250 (add_constant_to_table): Take and pass on whether to
5252 (output_addressed_constants): Likewise.
5253 (output_constant_def): Pass on whether to defer output
5254 to add_constant_to_table.
5255 (tree_output_constant_def): Defer output of constants.
5257 2020-06-18 Richard Biener <rguenther@suse.de>
5259 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
5260 (_slp_tree::lane_permutation): New member.
5261 (_slp_tree::code): Likewise.
5262 (SLP_TREE_TWO_OPERATORS): Remove.
5263 (SLP_TREE_LANE_PERMUTATION): New.
5264 (SLP_TREE_CODE): Likewise.
5265 (vect_stmt_dominates_stmt_p): Declare.
5266 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
5267 * tree-vect-stmts.c (vect_model_simple_cost): Remove
5268 SLP_TREE_TWO_OPERATORS handling.
5269 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
5270 (_slp_tree::~_slp_tree): Likewise.
5271 (vect_two_operations_perm_ok_p): Remove.
5272 (vect_build_slp_tree_1): Remove verification of two-operator
5274 (vect_build_slp_tree_2): When we have two different operators
5275 build two computation SLP nodes and a blend.
5276 (vect_print_slp_tree): Print the lane permutation if it exists.
5277 (slp_copy_subtree): Copy it.
5278 (vect_slp_rearrange_stmts): Re-arrange it.
5279 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
5280 VEC_PERM_EXPR explicitely.
5281 (vect_schedule_slp_instance): Likewise. Remove old
5282 SLP_TREE_TWO_OPERATORS code.
5283 (vectorizable_slp_permutation): New function.
5285 2020-06-18 Martin Liska <mliska@suse.cz>
5287 * tree-vect-generic.c (expand_vector_condition): Check
5288 for gassign before inspecting RHS.
5290 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
5292 * gimplify.c (omp_notice_threadprivate_variable)
5293 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
5294 diagnostic. Adjust all users.
5296 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
5298 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
5299 NULL_TREE' check earlier.
5301 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
5303 * doc/extend.texi (attribute access): Fix a typo.
5305 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
5306 Kaipeng Zhou <zhoukaipeng3@huawei.com>
5308 PR tree-optimization/95199
5309 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
5310 strided load/store operations and remove redundant code.
5312 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
5314 * coretypes.h (first_type): New alias template.
5315 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
5316 Remove spurious “...” and split the function type out into a typedef.
5318 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
5320 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
5323 2020-06-17 Richard Biener <rguenther@suse.de>
5325 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
5326 in *vectype parameter.
5327 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
5328 vect_build_slp_tree_1 computed.
5329 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
5330 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
5331 (vect_schedule_slp_instance): Likewise.
5332 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
5333 from SLP_TREE_VECTYPE.
5335 2020-06-17 Richard Biener <rguenther@suse.de>
5337 PR tree-optimization/95717
5338 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
5339 Move BB SSA updating before exit/latch PHI current def copying.
5341 2020-06-17 Martin Liska <mliska@suse.cz>
5343 * Makefile.in: Add new file.
5344 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
5345 not meet this condition.
5346 (do_store_flag): Likewise.
5347 * gimplify.c (gimplify_expr): Gimplify first argument of
5348 VEC_COND_EXPR to be a SSA name.
5349 * internal-fn.c (vec_cond_mask_direct): New.
5350 (vec_cond_direct): Likewise.
5351 (vec_condu_direct): Likewise.
5352 (vec_condeq_direct): Likewise.
5353 (expand_vect_cond_optab_fn): New.
5354 (expand_vec_cond_optab_fn): Likewise.
5355 (expand_vec_condu_optab_fn): Likewise.
5356 (expand_vec_condeq_optab_fn): Likewise.
5357 (expand_vect_cond_mask_optab_fn): Likewise.
5358 (expand_vec_cond_mask_optab_fn): Likewise.
5359 (direct_vec_cond_mask_optab_supported_p): Likewise.
5360 (direct_vec_cond_optab_supported_p): Likewise.
5361 (direct_vec_condu_optab_supported_p): Likewise.
5362 (direct_vec_condeq_optab_supported_p): Likewise.
5363 * internal-fn.def (VCOND): New OPTAB.
5365 (VCONDEQ): Likewise.
5366 (VCOND_MASK): Likewise.
5367 * optabs.c (get_rtx_code): Make it global.
5368 (expand_vec_cond_mask_expr): Removed.
5369 (expand_vec_cond_expr): Removed.
5370 * optabs.h (expand_vec_cond_expr): Likewise.
5371 (vector_compare_rtx): Make it global.
5372 * passes.def: Add new pass_gimple_isel pass.
5373 * tree-cfg.c (verify_gimple_assign_ternary): Add check
5374 for VEC_COND_EXPR about first argument.
5375 * tree-pass.h (make_pass_gimple_isel): New.
5376 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
5377 propagation of the first argument of a VEC_COND_EXPR.
5378 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
5379 first argument of a VEC_COND_EXPR.
5380 (optimize_vec_cond_expr): Likewise.
5381 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
5382 for a first argument of created VEC_COND_EXPR.
5383 (expand_vector_condition): Fix coding style.
5384 * tree-vect-stmts.c (vectorizable_condition): Gimplify
5386 * gimple-isel.cc: New file.
5388 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
5390 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
5391 (BSS_SECTION_ASM_OP): Use ".bss".
5392 (ASM_SPEC): Remove "-mattr=-code-object-v3".
5393 (LINK_SPEC): Add "--export-dynamic".
5394 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
5395 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
5396 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
5397 (load_image): Remove obsolete relocation handling.
5398 Add ".kd" suffix to the symbol names.
5399 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
5400 (gcn_option_override): Update gcn_isa test.
5401 (gcn_kernel_arg_types): Update all the assembler directives.
5402 Remove the obsolete options.
5403 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
5404 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
5406 (output_file_start): Rework assembler file header.
5407 (gcn_hsa_declare_function_name): Rework kernel metadata.
5408 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
5409 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
5410 (PROCESSOR_VEGA10): New enum value.
5411 (PROCESSOR_VEGA20): New enum value.
5413 2020-06-17 Martin Liska <mliska@suse.cz>
5415 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
5417 * gcov-tool.c (print_version): Likewise.
5418 * gcov.c (print_version): Likewise.
5420 2020-06-17 liuhongt <hongtao.liu@intel.com>
5423 * config/i386/i386-expand.c
5424 (ix86_expand_vec_shift_qihi_constant): New function.
5425 * config/i386/i386-protos.h
5426 (ix86_expand_vec_shift_qihi_constant): Declare.
5427 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
5428 V*QImode by constant.
5430 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
5432 PR tree-optimization/95649
5433 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
5434 value is a constant.
5436 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5438 * config.in: Regenerate.
5439 * config/s390/s390.c (print_operand): Emit vector alignment hints
5440 for target z13, if AS accepts them. For other targets the logic
5442 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
5444 * configure: Regenerate.
5445 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
5447 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5449 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
5451 (__arm_vaddq_m_n_s32): Likewise.
5452 (__arm_vaddq_m_n_s16): Likewise.
5453 (__arm_vaddq_m_n_u8): Likewise.
5454 (__arm_vaddq_m_n_u32): Likewise.
5455 (__arm_vaddq_m_n_u16): Likewise.
5456 (__arm_vaddq_m): Modify polymorphic variant.
5458 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5460 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
5461 and constraint of all the operands.
5462 (mve_sqrshrl_sat<supf>_di): Likewise.
5463 (mve_uqrshl_si): Likewise.
5464 (mve_sqrshr_si): Likewise.
5465 (mve_uqshll_di): Likewise.
5466 (mve_urshrl_di): Likewise.
5467 (mve_uqshl_si): Likewise.
5468 (mve_urshr_si): Likewise.
5469 (mve_sqshl_si): Likewise.
5470 (mve_srshr_si): Likewise.
5471 (mve_srshrl_di): Likewise.
5472 (mve_sqshll_di): Likewise.
5473 * config/arm/predicates.md (arm_low_register_operand): Define.
5475 2020-06-16 Jakub Jelinek <jakub@redhat.com>
5477 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
5478 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
5479 or dist_schedule clause on non-rectangular loops. Handle
5480 gimplification of non-rectangular lb/b expressions. When changing
5481 iteration variable, adjust also non-rectangular lb/b expressions
5483 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
5485 (struct omp_for_data): Add non_rect member.
5486 * omp-general.c (omp_extract_for_data): Handle non-rectangular
5487 loops. Fill in non_rect, m1, m2 and outer.
5488 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
5489 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
5490 non-rectangular loop cases and assert for cases that can't be
5492 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
5493 (dump_omp_loop_non_rect_expr): New function.
5494 (dump_generic_node): Handle non-rectangular OpenMP loops.
5495 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
5496 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
5499 2020-06-16 Richard Biener <rguenther@suse.de>
5502 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
5504 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
5507 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
5508 assertion and turn it into a early exit check.
5510 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
5512 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
5513 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
5514 true and all elements are zero, then always clear. Return GS_ERROR
5515 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
5516 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
5517 the type is aggregate non-addressable, ask gimplify_init_constructor
5518 whether it can generate a single access to the target.
5520 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
5522 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
5523 access on the LHS is replaced with a scalar access, propagate the
5524 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
5526 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
5528 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
5529 TARGET_THREADPTR reference.
5530 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
5531 targetm.have_tls instead of TARGET_HAVE_TLS.
5532 (xtensa_option_override): Set targetm.have_tls to false in
5533 configurations without THREADPTR.
5535 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
5537 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
5539 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
5540 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
5541 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
5542 xtensa_windowed_abi if needed.
5543 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
5545 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
5546 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
5548 (mabi=call0, mabi=windowed): New options.
5549 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
5551 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
5553 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
5554 (TARGET_CAN_ELIMINATE): New macro.
5555 * config/xtensa/xtensa.h
5556 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
5557 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
5558 (HARD_FRAME_POINTER_REGNUM): Define using
5559 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
5560 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
5561 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
5562 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
5564 2020-06-15 Felix Yang <felix.yang@huawei.com>
5566 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
5567 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
5569 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
5571 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
5572 LOOP_VINFO_DATAREFS when possible.
5573 (update_epilogue_loop_vinfo): Likewise.
5575 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
5577 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
5579 (riscv_gpr_save_operation_p): Change type to unsigned for i and
5582 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
5585 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
5587 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
5588 * config/i386/sse.md (mul<mode>3): Drop mask_name since
5589 there's no real simd int8 multiplication instruction with
5590 mask. Also optimize it under TARGET_AVX512BW.
5591 (mulv8qi3): New expander.
5593 2020-06-12 Marco Elver <elver@google.com>
5595 * gimplify.c (gimplify_function_tree): Optimize and do not emit
5596 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
5597 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
5598 * tsan.c (instrument_memory_accesses): Make
5599 fentry_exit_instrument bool depend on new param.
5601 2020-06-12 Felix Yang <felix.yang@huawei.com>
5603 PR tree-optimization/95570
5604 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
5605 (vect_verify_datarefs_alignment): Call it to filter out data references
5606 in the loop whose alignment is irrelevant.
5607 (vect_get_peeling_costs_all_drs): Likewise.
5608 (vect_peeling_supportable): Likewise.
5609 (vect_enhance_data_refs_alignment): Likewise.
5611 2020-06-12 Richard Biener <rguenther@suse.de>
5613 PR tree-optimization/95633
5614 * tree-vect-stmts.c (vectorizable_condition): Properly
5615 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
5617 2020-06-12 Martin Liška <mliska@suse.cz>
5619 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
5620 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
5622 * lto-wrapper.c (merge_and_complain): Wrap option names.
5624 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
5626 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
5627 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
5628 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
5629 (vect_set_loop_condition_masked): Renamed to ...
5630 (vect_set_loop_condition_partial_vectors): ... this. Rename
5631 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
5632 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
5633 (vect_set_loop_condition_unmasked): Renamed to ...
5634 (vect_set_loop_condition_normal): ... this.
5635 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
5636 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
5637 to vect_set_loop_condition_partial_vectors.
5638 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
5639 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
5640 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
5642 (vect_analyze_loop_costing): ... this.
5643 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
5645 (vect_min_prec_for_max_niters): New, factored out from ...
5646 (vect_verify_full_masking): ... this. Rename
5647 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
5648 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
5649 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
5650 (vectorizable_reduction): Update some dumpings with partial
5651 vectors instead of fully-masked.
5652 (vectorizable_live_operation): Likewise.
5653 (vect_iv_limit_for_full_masking): Renamed to ...
5654 (vect_iv_limit_for_partial_vectors): ... this.
5655 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
5656 (check_load_store_for_partial_vectors): ... this. Update some
5657 dumpings with partial vectors instead of fully-masked.
5658 (vectorizable_store): Rename check_load_store_masking to
5659 check_load_store_for_partial_vectors.
5660 (vectorizable_load): Likewise.
5661 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
5662 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
5663 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
5664 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
5665 (vect_iv_limit_for_full_masking): Renamed to ...
5666 (vect_iv_limit_for_partial_vectors): this.
5667 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
5668 Rename iv_type to rgroup_iv_type.
5670 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
5672 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
5673 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
5674 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
5675 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
5676 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
5677 (insn_gen_fn::operator()): Replace overloaded definitions with
5678 a parameter-pack version.
5680 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
5683 * config/i386/i386-features.c (rest_of_insert_endbranch):
5685 (rest_of_insert_endbr_and_patchable_area): Change return type
5686 to void. Add need_endbr and patchable_area_size arguments.
5687 Don't call timevar_push nor timevar_pop. Replace
5688 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
5689 UNSPECV_PATCHABLE_AREA for patchable area.
5690 (pass_data_insert_endbranch): Renamed to ...
5691 (pass_data_insert_endbr_and_patchable_area): This. Change
5692 pass name to endbr_and_patchable_area.
5693 (pass_insert_endbranch): Renamed to ...
5694 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
5695 and patchable_area_size;.
5696 (pass_insert_endbr_and_patchable_area::gate): Set and check
5697 need_endbr and patchable_area_size.
5698 (pass_insert_endbr_and_patchable_area::execute): Call
5699 timevar_push and timevar_pop. Pass need_endbr and
5700 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
5701 (make_pass_insert_endbranch): Renamed to ...
5702 (make_pass_insert_endbr_and_patchable_area): This.
5703 * config/i386/i386-passes.def: Replace pass_insert_endbranch
5704 with pass_insert_endbr_and_patchable_area.
5705 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
5706 (make_pass_insert_endbranch): Renamed to ...
5707 (make_pass_insert_endbr_and_patchable_area): This.
5708 * config/i386/i386.c (ix86_asm_output_function_label): Set
5709 function_label_emitted to true.
5710 (ix86_print_patchable_function_entry): New function.
5711 (ix86_output_patchable_area): Likewise.
5712 (x86_function_profiler): Replace endbr_queued_at_entrance with
5713 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
5714 Call ix86_output_patchable_area to generate patchable area if
5716 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
5717 * config/i386/i386.h (queued_insn_type): New.
5718 (machine_function): Add function_label_emitted. Replace
5719 endbr_queued_at_entrance with insn_queued_at_entrance.
5720 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
5721 (patchable_area): New.
5723 2020-06-11 Martin Liska <mliska@suse.cz>
5725 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
5728 2020-06-11 Martin Liska <mliska@suse.cz>
5731 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
5734 2020-06-11 Martin Liska <mliska@suse.cz>
5735 Jakub Jelinek <jakub@redhat.com>
5738 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
5739 by using Pmode instead of ptr_mode.
5741 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
5743 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
5744 (vect_set_loop_control): ... this.
5745 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
5746 (vect_set_loop_masks_directly): Renamed to ...
5747 (vect_set_loop_controls_directly): ... this. Also rename some
5748 variables with ctrl instead of mask. Rename vect_set_loop_mask to
5749 vect_set_loop_control.
5750 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
5751 Also rename some variables with ctrl instead of mask.
5752 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
5753 (release_vec_loop_controls): ... this. Rename rgroup_masks related
5755 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
5756 release_vec_loop_controls.
5757 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
5758 (vect_get_max_nscalars_per_iter): Likewise.
5759 (vect_estimate_min_profitable_iters): Likewise.
5760 (vect_record_loop_mask): Likewise.
5761 (vect_get_loop_mask): Likewise.
5762 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
5763 (struct rgroup_controls): ... this. Also rename mask_type
5764 to type and rename masks to controls.
5766 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
5768 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
5769 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
5770 (vect_gen_vector_loop_niters): Likewise.
5771 (vect_do_peeling): Likewise.
5772 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
5773 fully_masked_p to using_partial_vectors_p.
5774 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
5775 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
5776 (determine_peel_for_niter): Likewise.
5777 (vect_estimate_min_profitable_iters): Likewise.
5778 (vect_transform_loop): Likewise.
5779 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
5780 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
5782 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
5784 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
5785 can_fully_mask_p to can_use_partial_vectors_p.
5786 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
5787 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
5788 to saved_can_use_partial_vectors_p.
5789 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
5790 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
5791 (vectorizable_live_operation): Likewise.
5792 * tree-vect-stmts.c (permute_vec_elements): Likewise.
5793 (check_load_store_masking): Likewise.
5794 (vectorizable_operation): Likewise.
5795 (vectorizable_store): Likewise.
5796 (vectorizable_load): Likewise.
5797 (vectorizable_condition): Likewise.
5798 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
5799 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
5800 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
5802 2020-06-11 Martin Liska <mliska@suse.cz>
5804 * optc-save-gen.awk: Quote error string.
5806 2020-06-11 Alexandre Oliva <oliva@adacore.com>
5808 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
5810 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
5812 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
5813 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
5815 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
5816 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
5818 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
5820 * config/riscv/predicates.md (gpr_save_operation): New.
5821 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
5822 (riscv_gpr_save_operation_p): Ditto.
5823 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
5824 Ignore USEs for gpr_save patter.
5825 * config/riscv/riscv.c (gpr_save_reg_order): New.
5826 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
5827 (riscv_gen_gpr_save_insn): New.
5828 (riscv_gpr_save_operation_p): Ditto.
5829 * config/riscv/riscv.md (S3_REGNUM): New.
5836 (S10_REGNUM): Ditto.
5837 (S11_REGNUM): Ditto.
5838 (gpr_save): Model USEs correctly.
5840 2020-06-10 Martin Sebor <msebor@redhat.com>
5844 * builtins.c (inform_access): New function.
5845 (check_access): Call it. Add argument.
5846 (addr_decl_size): Remove.
5847 (get_range): New function.
5848 (compute_objsize): New overload. Only use compute_builtin_object_size
5849 with raw memory function.
5850 (check_memop_access): Pass new argument to compute_objsize and
5852 (expand_builtin_memchr, expand_builtin_strcat): Same.
5853 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
5854 (expand_builtin_stpncpy, check_strncat_sizes): Same.
5855 (expand_builtin_strncat, expand_builtin_strncpy): Same.
5856 (expand_builtin_memcmp): Same.
5857 * builtins.h (check_nul_terminated_array): Declare extern.
5858 (check_access): Add argument.
5859 (struct access_ref, struct access_data): New structs.
5860 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
5861 (builtin_access::overlap): Call it.
5862 * tree-object-size.c (decl_init_size): Declare extern.
5863 (addr_object_size): Correct offset computation.
5864 * tree-object-size.h (decl_init_size): Declare.
5865 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
5866 to maybe_warn_overflow when assigning to an SSA_NAME.
5868 2020-06-10 Richard Biener <rguenther@suse.de>
5870 * tree-vect-loop.c (vect_determine_vectorization_factor):
5872 (_loop_vec_info::_loop_vec_info): Likewise.
5873 (vect_update_vf_for_slp): Likewise.
5874 (vect_analyze_loop_operations): Likewise.
5875 (update_epilogue_loop_vinfo): Likewise.
5876 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
5877 (vect_pattern_recog): Likewise.
5878 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
5879 (_bb_vec_info::_bb_vec_info): Likewise.
5880 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
5883 2020-06-10 Richard Biener <rguenther@suse.de>
5885 PR tree-optimization/95576
5886 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
5888 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
5891 * config/aarch64/aarch64-sve-builtins.h
5892 (sve_switcher::m_old_maximum_field_alignment): New member.
5893 * config/aarch64/aarch64-sve-builtins.cc
5894 (sve_switcher::sve_switcher): Save maximum_field_alignment in
5895 m_old_maximum_field_alignment and clear maximum_field_alignment.
5896 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
5898 2020-06-10 Richard Biener <rguenther@suse.de>
5900 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
5902 (_stmt_vec_info::vec_stmts): Likewise.
5903 (vec_info::stmt_vec_info_ro): New flag.
5904 (vect_finish_replace_stmt): Adjust declaration.
5905 (vect_finish_stmt_generation): Likewise.
5906 (vectorizable_induction): Likewise.
5907 (vect_transform_reduction): Likewise.
5908 (vectorizable_lc_phi): Likewise.
5909 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
5910 allocate stmt infos for increments.
5911 (vect_record_grouped_load_vectors): Adjust.
5912 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
5913 (vectorize_fold_left_reduction): Likewise.
5914 (vect_transform_reduction): Likewise.
5915 (vect_transform_cycle_phi): Likewise.
5916 (vectorizable_lc_phi): Likewise.
5917 (vectorizable_induction): Likewise.
5918 (vectorizable_live_operation): Likewise.
5919 (vect_transform_loop): Likewise.
5920 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
5921 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
5922 (vect_get_slp_defs): Likewise.
5923 (vect_transform_slp_perm_load): Likewise.
5924 (vect_schedule_slp_instance): Likewise.
5925 (vectorize_slp_instance_root_stmt): Likewise.
5926 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
5927 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
5928 (vect_finish_replace_stmt): Do not return anything.
5929 (vect_finish_stmt_generation): Likewise.
5930 (vect_build_gather_load_calls): Adjust.
5931 (vectorizable_bswap): Likewise.
5932 (vectorizable_call): Likewise.
5933 (vectorizable_simd_clone_call): Likewise.
5934 (vect_create_vectorized_demotion_stmts): Likewise.
5935 (vectorizable_conversion): Likewise.
5936 (vectorizable_assignment): Likewise.
5937 (vectorizable_shift): Likewise.
5938 (vectorizable_operation): Likewise.
5939 (vectorizable_scan_store): Likewise.
5940 (vectorizable_store): Likewise.
5941 (vectorizable_load): Likewise.
5942 (vectorizable_condition): Likewise.
5943 (vectorizable_comparison): Likewise.
5944 (vect_transform_stmt): Likewise.
5945 * tree-vectorizer.c (vec_info::vec_info): Initialize
5947 (vec_info::replace_stmt): Copy over stmt UID rather than
5948 unsetting/setting a stmt info allocating a new UID.
5949 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
5951 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
5953 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
5955 * gimple-ssa-evrp.c (class evrp_folder): New.
5956 (class evrp_dom_walker): Remove.
5957 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
5958 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
5959 * tree-ssa-copy.c (copy_folder::get_value): Same.
5960 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
5961 Pass stmt to get_value.
5962 (substitute_and_fold_engine::replace_phi_args_in): Same.
5963 (substitute_and_fold_dom_walker::after_dom_children): Call
5965 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
5966 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
5967 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
5968 call virtual functions for folding, pre_folding, and post folding.
5969 Call get_value with PHI. Tweak dump.
5970 * tree-ssa-propagate.h (class substitute_and_fold_engine):
5971 New argument to get_value.
5972 New virtual function pre_fold_bb.
5973 New virtual function post_fold_bb.
5974 New virtual function pre_fold_stmt.
5975 New virtual function post_new_stmt.
5976 New function propagate_into_phi_args.
5977 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
5978 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
5980 (vr_values::fold_cond): New.
5981 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
5982 * vr-values.h (class vr_values): Add
5983 simplify_cond_using_ranges_when_edge_is_known.
5985 2020-06-10 Martin Liska <mliska@suse.cz>
5988 * asan.c (asan_emit_stack_protection): Emit
5989 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
5992 2020-06-10 Tamar Christina <tamar.christina@arm.com>
5994 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
5996 2020-06-10 Richard Biener <rguenther@suse.de>
5998 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
5999 (vect_record_grouped_load_vectors): Likewise.
6000 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
6001 (vectorize_fold_left_reduction): Likewise.
6002 (vect_transform_reduction): Likewise.
6003 (vect_transform_cycle_phi): Likewise.
6004 (vectorizable_lc_phi): Likewise.
6005 (vectorizable_induction): Likewise.
6006 (vectorizable_live_operation): Likewise.
6007 (vect_transform_loop): Likewise.
6008 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
6010 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
6011 (vect_get_vec_def_for_operand): Likewise.
6012 (vect_get_vec_def_for_stmt_copy): Likewise.
6013 (vect_get_vec_defs_for_stmt_copy): Likewise.
6014 (vect_get_vec_defs_for_operand): New function.
6015 (vect_get_vec_defs): Likewise.
6016 (vect_build_gather_load_calls): Adjust.
6017 (vect_get_gather_scatter_ops): Likewise.
6018 (vectorizable_bswap): Likewise.
6019 (vectorizable_call): Likewise.
6020 (vectorizable_simd_clone_call): Likewise.
6021 (vect_get_loop_based_defs): Remove.
6022 (vect_create_vectorized_demotion_stmts): Adjust.
6023 (vectorizable_conversion): Likewise.
6024 (vectorizable_assignment): Likewise.
6025 (vectorizable_shift): Likewise.
6026 (vectorizable_operation): Likewise.
6027 (vectorizable_scan_store): Likewise.
6028 (vectorizable_store): Likewise.
6029 (vectorizable_load): Likewise.
6030 (vectorizable_condition): Likewise.
6031 (vectorizable_comparison): Likewise.
6032 (vect_transform_stmt): Adjust and remove no longer applicable
6034 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
6035 STMT_VINFO_VEC_STMTS.
6036 (vec_info::free_stmt_vec_info): Relase it.
6037 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
6038 (_stmt_vec_info::vec_stmts): Add.
6039 (STMT_VINFO_VEC_STMT): Remove.
6040 (STMT_VINFO_VEC_STMTS): New.
6041 (vect_get_vec_def_for_operand_1): Remove.
6042 (vect_get_vec_def_for_operand): Likewise.
6043 (vect_get_vec_defs_for_stmt_copy): Likewise.
6044 (vect_get_vec_def_for_stmt_copy): Likewise.
6045 (vect_get_vec_defs): New overloads.
6046 (vect_get_vec_defs_for_operand): New.
6047 (vect_get_slp_defs): Declare.
6049 2020-06-10 Qian Chao <qianchao9@huawei.com>
6051 PR tree-optimization/95569
6052 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
6054 2020-06-10 Martin Liska <mliska@suse.cz>
6056 PR tree-optimization/92860
6057 * optc-save-gen.awk: Generate new function cl_optimization_compare.
6058 * opth-gen.awk: Generate declaration of the function.
6060 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
6062 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
6063 'future' PowerPC platform.
6064 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
6065 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
6066 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
6068 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
6069 (rs6000_clone_map): Add 'future' system target_clones support.
6071 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
6073 * Makefile.in (ZSTD_INC): Define.
6074 (ZSTD_LIB): Include ZSTD_LDFLAGS.
6075 (CFLAGS-lto-compress.o): Add ZSTD_INC.
6076 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
6078 * configure: Rebuilt.
6080 2020-06-09 Jason Merrill <jason@redhat.com>
6083 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
6085 2020-06-09 Marco Elver <elver@google.com>
6087 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
6088 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
6089 builtin for volatile instrumentation of reads/writes.
6090 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
6091 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
6092 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
6093 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
6094 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
6095 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
6096 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
6097 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
6098 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
6099 * tsan.c (get_memory_access_decl): Argument if access is
6100 volatile. If param tsan-distinguish-volatile is non-zero, and
6101 access if volatile, return volatile instrumentation decl.
6102 (instrument_expr): Check if access is volatile.
6104 2020-06-09 Richard Biener <rguenther@suse.de>
6106 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
6108 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
6110 * omp-offload.c (add_decls_addresses_to_decl_constructor,
6111 omp_finish_file): With in_lto_p, stream out all offload-table
6112 items even if the symtab_node does not exist.
6114 2020-06-09 Richard Biener <rguenther@suse.de>
6116 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
6118 2020-06-09 Martin Liska <mliska@suse.cz>
6120 * gcov-dump.c (print_usage): Fix spacing for --raw option
6123 2020-06-09 Martin Liska <mliska@suse.cz>
6125 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
6126 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
6127 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
6128 Handle all sanitizer options.
6129 (can_inline_edge_p): Use renamed CIF_* enum value.
6131 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
6133 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
6135 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
6136 (@aarch64_bic<mode>): Enable unpacked BIC.
6137 (*bic<mode>3): Enable unpacked BIC.
6139 2020-06-09 Martin Liska <mliska@suse.cz>
6141 PR gcov-profile/95365
6142 * doc/gcov.texi: Compile and link one example in 2 steps.
6144 2020-06-09 Jakub Jelinek <jakub@redhat.com>
6146 PR tree-optimization/95527
6147 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
6149 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
6151 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
6152 'future' PowerPC platform.
6153 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
6154 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
6155 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
6157 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
6158 (rs6000_clone_map): Add 'future' system target_clones support.
6160 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
6164 * omp-offload.c (add_decls_addresses_to_decl_constructor,
6165 omp_finish_file): Skip removed items.
6166 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
6167 to this node for variables and functions.
6169 2020-06-08 Jason Merrill <jason@redhat.com>
6171 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
6172 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
6173 * configure: Regenerate.
6175 2020-06-08 Martin Sebor <msebor@redhat.com>
6177 * postreload.c (reload_cse_simplify_operands): Clear first array element
6178 before using it. Assert a precondition.
6180 2020-06-08 Jakub Jelinek <jakub@redhat.com>
6183 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
6184 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
6185 type is vector boolean.
6187 2020-06-08 Tamar Christina <tamar.christina@arm.com>
6189 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
6191 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
6193 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
6194 instead of VFP_REGS.
6196 2020-06-08 Martin Liska <mliska@suse.cz>
6198 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
6199 in all vcond* patterns.
6201 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
6203 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
6204 Define. No longer include <algorithm>.
6206 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
6208 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
6209 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
6210 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
6211 (parityhi2, parityqi2): New expanders.
6212 (parityhi2_cmp): Implement set parity flag with xorb insn.
6213 (parityqi2_cmp): Implement set parity flag with testb insn.
6214 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
6216 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
6219 * config/rs6000/rs6000.c (rs6000_option_override_internal):
6220 Override flag_cunroll_grow_size.
6222 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
6224 * common.opt (flag_cunroll_grow_size): New flag.
6225 * toplev.c (process_options): Set flag_cunroll_grow_size.
6226 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
6227 Use flag_cunroll_grow_size.
6229 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
6232 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
6233 (ipa_odr_summary_write): Update streaming.
6234 (ipa_odr_read_section): Update streaming.
6236 2020-06-06 Alexandre Oliva <oliva@adacore.com>
6239 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
6241 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
6242 Julian Brown <julian@codesourcery.com>
6244 * gimplify.c (gimplify_adjust_omp_clauses): Remove
6245 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
6247 2020-06-05 Richard Biener <rguenther@suse.de>
6249 PR tree-optimization/95539
6250 * tree-vect-data-refs.c
6251 (vect_slp_analyze_and_verify_instance_alignment): Use
6252 SLP_TREE_REPRESENTATIVE for the data-ref check.
6253 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
6254 back to the first scalar stmt rather than the
6255 SLP_TREE_REPRESENTATIVE to match previous behavior.
6257 2020-06-05 Felix Yang <felix.yang@huawei.com>
6260 * expr.c (emit_move_insn): Check src and dest of the copy to see
6261 if one or both of them are subregs, try to remove the subregs when
6262 innermode and outermode are equal in size and the mode change involves
6263 an implicit round trip through memory.
6265 2020-06-05 Jakub Jelinek <jakub@redhat.com>
6268 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
6269 define_insn_and_split patterns.
6270 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
6271 define_insn patterns.
6273 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
6275 * alloc-pool.h (object_allocator::remove_raw): New.
6276 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
6277 (occurrence::occurrence): Add.
6278 (occurrence::~occurrence): Likewise.
6279 (occurrence::new): Likewise.
6280 (occurrence::delete): Likewise.
6282 (insert_bb): Use new occurence (...) instead of occ_new.
6283 (register_division_in): Likewise.
6284 (free_bb): Use delete occ instead of manually removing
6287 2020-06-05 Richard Biener <rguenther@suse.de>
6290 * cfgexpand.c (expand_debug_expr): Avoid calling
6291 set_mem_attributes_minus_bitpos when we were expanding
6293 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
6294 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
6295 special-cases we do not want MEM_EXPRs for. Assert
6296 we end up with reasonable MEM_EXPRs.
6298 2020-06-05 Lili Cui <lili.cui@intel.com>
6301 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
6303 2020-06-04 Martin Sebor <msebor@redhat.com>
6307 * attribs.c (init_attr_rdwr_indices): Move function here.
6308 * attribs.h (rdwr_access_hash, rdwr_map): Define.
6309 (attr_access): Add 'none'.
6310 (init_attr_rdwr_indices): Declared function.
6311 * builtins.c (warn_for_access)): New function.
6312 (check_access): Call it.
6313 * builtins.h (checK-access): Add an optional argument.
6314 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
6315 (init_attr_rdwr_indices): Declare extern.
6316 (append_attrname): Handle attr_access::none.
6317 (maybe_warn_rdwr_sizes): Same.
6318 (initialize_argument_information): Update comments.
6319 * doc/extend.texi (attribute access): Document 'none'.
6320 * tree-ssa-uninit.c (struct wlimits): New.
6321 (maybe_warn_operand): New function.
6322 (maybe_warn_pass_by_reference): Same.
6323 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
6324 Also call for function calls.
6325 (pass_late_warn_uninitialized::execute): Adjust comments.
6326 (execute_early_warn_uninitialized): Same.
6328 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
6331 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
6332 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
6333 reload if the original insn has it too.
6335 2020-06-04 Richard Biener <rguenther@suse.de>
6337 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
6338 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
6340 2020-06-04 Martin Jambor <mjambor@suse.cz>
6343 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
6344 exceptions check to...
6345 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
6347 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
6348 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
6351 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6354 * config/arm/predicates.md (mve_scatter_memory): Define to
6355 match (mem (reg)) for scatter store memory.
6356 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
6357 define_insn to define_expand.
6358 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
6359 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
6360 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
6361 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
6362 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
6363 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
6364 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
6365 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
6366 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
6367 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
6368 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
6369 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
6370 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
6371 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
6372 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
6373 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
6374 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
6375 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
6376 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
6377 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
6378 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
6380 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
6381 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
6382 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
6383 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
6384 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
6385 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
6386 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
6387 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
6388 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
6389 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
6390 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
6391 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
6392 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
6393 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
6394 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
6395 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
6396 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
6397 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
6398 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
6399 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
6401 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6403 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
6405 (__arm_vbicq_n_s16): Likewise.
6406 (__arm_vbicq_n_u32): Likewise.
6407 (__arm_vbicq_n_s32): Likewise.
6408 (__arm_vbicq): Modify polymorphic variant.
6410 2020-06-04 Richard Biener <rguenther@suse.de>
6412 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
6413 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
6414 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
6415 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
6416 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
6418 (vect_get_slp_defs): ... here.
6419 (vect_get_slp_vect_def): New function.
6421 2020-06-04 Richard Biener <rguenther@suse.de>
6423 * tree-vectorizer.h (_slp_tree::lanes): New.
6424 (SLP_TREE_LANES): Likewise.
6425 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
6426 (vectorizable_reduction): Likewise.
6427 (vect_transform_cycle_phi): Likewise.
6428 (vectorizable_induction): Likewise.
6429 (vectorizable_live_operation): Likewise.
6430 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
6431 (vect_create_new_slp_node): Likewise.
6432 (slp_copy_subtree): Copy it.
6433 (vect_optimize_slp): Use it.
6434 (vect_slp_analyze_node_operations_1): Likewise.
6435 (vect_slp_convert_to_external): Likewise.
6436 (vect_bb_vectorization_profitable_p): Likewise.
6437 * tree-vect-stmts.c (vectorizable_load): Likewise.
6438 (get_vectype_for_scalar_type): Likewise.
6440 2020-06-04 Richard Biener <rguenther@suse.de>
6442 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
6443 (vect_build_slp_tree_2): Simplify building all external op
6445 (vect_slp_analyze_node_operations): Remove push/pop of
6446 STMT_VINFO_DEF_TYPE.
6447 (vect_schedule_slp_instance): Likewise.
6448 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
6449 stmt_info, use the vect_is_simple_use overload combining
6450 SLP and stmt_info analysis.
6451 (vect_is_simple_cond): Likewise.
6452 (vectorizable_store): Adjust.
6453 (vectorizable_condition): Likewise.
6454 (vect_is_simple_use): Fully handle invariant SLP nodes
6455 here. Amend stmt_info operand extraction with COND_EXPR
6457 * tree-vect-loop.c (vectorizable_reduction): Deal with
6458 COND_EXPR representation ugliness.
6460 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
6463 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
6464 Refine from *vcvtps2ph_store<mask_name>.
6465 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
6466 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
6467 (*vcvtps2ph256<merge_mask_name>): New define_insn.
6468 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
6469 * config/i386/subst.md (merge_mask): New define_subst.
6470 (merge_mask_name): New define_subst_attr.
6471 (merge_mask_operand3): Ditto.
6473 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
6475 PR tree-optimization/89430
6477 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
6478 remove ssa_name_ver, store, offset fields.
6479 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
6480 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
6481 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
6484 2020-06-04 Andreas Schwab <schwab@suse.de>
6487 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
6489 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
6491 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
6492 (trunc<mode><pmov_dst_3_lower>2): Refine from
6493 trunc<mode><pmov_dst_3>2.
6495 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
6497 * match.pd (tanh/sinh -> 1/cosh): New simplification.
6499 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
6502 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
6503 is_lfs_stfs_insn and make it recognize lfs as well.
6504 (prefixed_store_p): Use is_lfs_stfs_insn().
6505 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
6507 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
6509 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
6511 (odr_enums): New static var.
6512 (struct odr_enum_val): New struct.
6513 (class odr_enum): New struct.
6514 (odr_enum_map): New hashtable.
6515 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
6516 (add_type_duplicate): Likewise.
6517 (free_odr_warning_data): Do not free TYPE_VALUES.
6518 (register_odr_enum): New function.
6519 (ipa_odr_summary_write): New function.
6520 (ipa_odr_read_section): New function.
6521 (ipa_odr_summary_read): New function.
6522 (class pass_ipa_odr): New pass.
6523 (make_pass_ipa_odr): New function.
6524 * ipa-utils.h (register_odr_enum): Declare.
6525 * lto-section-in.c: (lto_section_name): Add odr_types section.
6526 * lto-streamer.h (enum lto_section_type): Add odr_types section.
6527 * passes.def: Add odr_types pass.
6528 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
6530 (hash_tree): Likewise.
6531 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
6533 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
6535 * timevar.def (TV_IPA_ODR): New timervar.
6536 * tree-pass.h (make_pass_ipa_odr): Declare.
6537 * tree.c (free_lang_data_in_type): Regiser ODR types.
6539 2020-06-03 Romain Naour <romain.naour@gmail.com>
6541 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
6544 2020-06-03 Richard Biener <rguenther@suse.de>
6546 PR tree-optimization/95487
6547 * tree-vect-stmts.c (vectorizable_store): Use a truth type
6548 for the scatter mask.
6550 2020-06-03 Richard Biener <rguenther@suse.de>
6552 PR tree-optimization/95495
6553 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
6554 SLP_TREE_REPRESENTATIVE in the shift assertion.
6556 2020-06-03 Tom Tromey <tromey@adacore.com>
6558 * spellcheck.c (CASE_COST): New define.
6559 (BASE_COST): New define.
6560 (get_edit_distance): Recognize case changes.
6561 (get_edit_distance_cutoff): Update.
6562 (test_edit_distances): Update.
6563 (get_old_cutoff): Update.
6564 (test_find_closest_string): Add case sensitivity test.
6566 2020-06-03 Richard Biener <rguenther@suse.de>
6568 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
6569 the cost vector to unset the visited flag on stmts.
6571 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
6573 * gimplify.c (omp_notice_variable): Use new hook.
6574 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
6575 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
6576 (LANG_HOOKS_DECLS): Add it.
6577 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
6578 (lhd_omp_predetermined_mapping): New.
6579 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
6581 2020-06-03 Jan Hubicka <jh@suse.cz>
6583 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
6584 add LTO_first_tree_tag and LTO_first_gimple_tag.
6585 (lto_tag_is_tree_code_p): Update.
6586 (lto_tag_is_gimple_code_p): Update.
6587 (lto_gimple_code_to_tag): Update.
6588 (lto_tag_to_gimple_code): Update.
6589 (lto_tree_code_to_tag): Update.
6590 (lto_tag_to_tree_code): Update.
6592 2020-06-02 Felix Yang <felix.yang@huawei.com>
6595 * config/aarch64/aarch64.c (aarch64_short_vector_p):
6596 Leave later code to report an error if SVE is disabled.
6598 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
6600 * config/aarch64/aarch64-cores.def (zeus): Define.
6601 * config/aarch64/aarch64-tune.md: Regenerate.
6602 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
6604 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
6607 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
6609 (is_stfs_insn): New helper function.
6611 2020-06-02 Jan Hubicka <jh@suse.cz>
6613 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
6615 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
6617 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
6619 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
6620 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
6621 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
6623 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
6626 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
6627 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
6629 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6631 * config/s390/s390.c (print_operand): Emit vector alignment
6634 2020-06-02 Martin Liska <mliska@suse.cz>
6636 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
6637 as they have variable number of counters.
6638 * gcov-dump.c (main): Add new option -r.
6639 (print_usage): Likewise.
6640 (tag_counters): All new raw format.
6641 * gcov-io.h (struct gcov_kvp): New.
6642 (GCOV_TOPN_VALUES): Remove.
6643 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
6644 (GCOV_TOPN_MEM_COUNTERS): New.
6645 (GCOV_TOPN_DISK_COUNTERS): Likewise.
6646 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
6647 * ipa-profile.c (ipa_profile_generate_summary): Use
6648 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
6649 (ipa_profile_write_edge_summary): Likewise.
6650 (ipa_profile_read_edge_summary): Likewise.
6651 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
6652 * profile.c (sort_hist_values): Sort variable number
6654 (compute_value_histograms): Special case for TOP N counters
6655 that have dynamic number of key-value pairs.
6656 * value-prof.c (dump_histogram_value): Dump variable number
6658 (stream_in_histogram_value): Stream in variable number
6659 of key-value pairs for TOP N counter.
6660 (get_nth_most_common_value): Deal with variable number
6662 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
6664 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
6666 * doc/gcov-dump.texi: Document new -r option.
6668 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
6671 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
6673 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
6675 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
6676 returns (const_int 0) for the destination, then emit nothing.
6678 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
6680 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
6681 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
6682 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
6683 LTO_const_decl_ref, LTO_imported_decl_ref,
6684 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
6685 LTO_namelist_decl_ref; add LTO_global_stream_ref.
6686 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
6687 (lto_input_scc): Update.
6688 (lto_input_tree_1): Update.
6689 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
6690 * lto-streamer.c (lto_tag_name): Update.
6692 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
6694 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
6695 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
6696 * lto-cgraph.c (lto_output_node): Likewise.
6697 (lto_output_varpool_node): Likewise.
6698 (output_offload_tables): Likewise.
6699 (input_node): Likewise.
6700 (input_varpool_node): Likewise.
6701 (input_offload_tables): Likewise.
6702 * lto-streamer-in.c (lto_input_tree_ref): Declare.
6703 (lto_input_var_decl_ref): Declare.
6704 (lto_input_fn_decl_ref): Declare.
6705 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
6706 (lto_output_var_decl_index): Rename to ..
6707 (lto_output_var_decl_ref): ... this.
6708 (lto_output_fn_decl_index): Rename to ...
6709 (lto_output_fn_decl_ref): ... this.
6710 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
6711 (DEFINE_DECL_STREAM_FUNCS): Remove.
6712 (lto_output_var_decl_index): Remove.
6713 (lto_output_fn_decl_index): Remove.
6714 (lto_output_var_decl_ref): Declare.
6715 (lto_output_fn_decl_ref): Declare.
6716 (lto_input_var_decl_ref): Declare.
6717 (lto_input_fn_decl_ref): Declare.
6719 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
6721 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
6722 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
6723 dump infomation if there is no adjusted parameter.
6724 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
6726 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
6728 * Makefile.in (gimple-array-bounds.o): New.
6729 * tree-vrp.c: Move array bounds code...
6730 * gimple-array-bounds.cc: ...here...
6731 * gimple-array-bounds.h: ...and here.
6733 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
6735 * Makefile.in (OBJS): Add value-range-equiv.o.
6736 * tree-vrp.c (*value_range_equiv*): Move to...
6737 * value-range-equiv.cc: ...here.
6738 * tree-vrp.h (class value_range_equiv): Move to...
6739 * value-range-equiv.h: ...here.
6740 * vr-values.h: Include value-range-equiv.h.
6742 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
6745 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
6746 lattice for simple pass-through by-ref argument.
6748 2020-05-31 Jeff Law <law@redhat.com>
6750 * lra.c (add_auto_inc_notes): Remove function.
6751 * reload1.c (add_auto_inc_notes): Similarly. Move into...
6752 * rtlanal.c (add_auto_inc_notes): New function.
6753 * rtl.h (add_auto_inc_notes): Add prototype.
6754 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
6757 2020-05-31 Jan Hubicka <jh@suse.cz>
6759 * lto-section-out.c (lto_output_decl_index): Remove.
6760 (lto_output_field_decl_index): Move to lto-streamer-out.c
6761 (lto_output_fn_decl_index): Move to lto-streamer-out.c
6762 (lto_output_namespace_decl_index): Remove.
6763 (lto_output_var_decl_index): Remove.
6764 (lto_output_type_decl_index): Remove.
6765 (lto_output_type_ref_index): Remove.
6766 * lto-streamer-out.c (output_type_ref): Remove.
6767 (lto_get_index): New function.
6768 (lto_output_tree_ref): Remove.
6769 (lto_indexable_tree_ref): New function.
6770 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
6771 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
6772 (stream_write_tree_ref): Update.
6773 (lto_output_tree): Update.
6774 * lto-streamer.h (lto_output_decl_index): Remove prototype.
6775 (lto_output_field_decl_index): Remove prototype.
6776 (lto_output_namespace_decl_index): Remove prototype.
6777 (lto_output_type_decl_index): Remove prototype.
6778 (lto_output_type_ref_index): Remove prototype.
6779 (lto_output_var_decl_index): Move.
6780 (lto_output_fn_decl_index): Move
6782 2020-05-31 Jakub Jelinek <jakub@redhat.com>
6785 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
6788 2020-05-31 Jeff Law <law@redhat.com>
6790 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
6792 2020-05-31 Jim Wilson <jimw@sifive.com>
6794 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
6796 2020-05-30 Jonathan Yong <10walls@gmail.com>
6798 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
6799 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
6800 import library, but also contains some functions that invoke
6801 others in KERNEL32.DLL.
6803 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
6805 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
6806 (altivec_vmrglw_direct): Ditto.
6807 (altivec_vperm_<mode>_direct): Ditto.
6808 (altivec_vperm_v8hiv16qi): Ditto.
6809 (*altivec_vperm_<mode>_uns_internal): Ditto.
6810 (*altivec_vpermr_<mode>_internal): Ditto.
6811 (vperm_v8hiv4si): Ditto.
6812 (vperm_v16qiv8hi): Ditto.
6814 2020-05-29 Jan Hubicka <jh@suse.cz>
6816 * lto-streamer-in.c (streamer_read_chain): Move here from
6818 (stream_read_tree_ref): New.
6819 (lto_input_tree_1): Simplify.
6820 * lto-streamer-out.c (stream_write_tree_ref): New.
6821 (lto_write_tree_1): Simplify.
6822 (lto_output_tree_1): Simplify.
6823 (DFS::DFS_write_tree): Simplify.
6824 (streamer_write_chain): Move here from tree-stremaer-out.c.
6825 * lto-streamer.h (lto_output_tree_ref): Update prototype.
6826 (stream_read_tree_ref): Declare
6827 (stream_write_tree_ref): Declare
6828 * tree-streamer-in.c (streamer_read_chain): Update to use
6829 stream_read_tree_ref.
6830 (lto_input_ts_common_tree_pointers): Likewise.
6831 (lto_input_ts_vector_tree_pointers): Likewise.
6832 (lto_input_ts_poly_tree_pointers): Likewise.
6833 (lto_input_ts_complex_tree_pointers): Likewise.
6834 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
6835 (lto_input_ts_decl_common_tree_pointers): Likewise.
6836 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
6837 (lto_input_ts_field_decl_tree_pointers): Likewise.
6838 (lto_input_ts_function_decl_tree_pointers): Likewise.
6839 (lto_input_ts_type_common_tree_pointers): Likewise.
6840 (lto_input_ts_type_non_common_tree_pointers): Likewise.
6841 (lto_input_ts_list_tree_pointers): Likewise.
6842 (lto_input_ts_vec_tree_pointers): Likewise.
6843 (lto_input_ts_exp_tree_pointers): Likewise.
6844 (lto_input_ts_block_tree_pointers): Likewise.
6845 (lto_input_ts_binfo_tree_pointers): Likewise.
6846 (lto_input_ts_constructor_tree_pointers): Likewise.
6847 (lto_input_ts_omp_clause_tree_pointers): Likewise.
6848 * tree-streamer-out.c (streamer_write_chain): Update to use
6849 stream_write_tree_ref.
6850 (write_ts_common_tree_pointers): Likewise.
6851 (write_ts_vector_tree_pointers): Likewise.
6852 (write_ts_poly_tree_pointers): Likewise.
6853 (write_ts_complex_tree_pointers): Likewise.
6854 (write_ts_decl_minimal_tree_pointers): Likewise.
6855 (write_ts_decl_common_tree_pointers): Likewise.
6856 (write_ts_decl_non_common_tree_pointers): Likewise.
6857 (write_ts_decl_with_vis_tree_pointers): Likewise.
6858 (write_ts_field_decl_tree_pointers): Likewise.
6859 (write_ts_function_decl_tree_pointers): Likewise.
6860 (write_ts_type_common_tree_pointers): Likewise.
6861 (write_ts_type_non_common_tree_pointers): Likewise.
6862 (write_ts_list_tree_pointers): Likewise.
6863 (write_ts_vec_tree_pointers): Likewise.
6864 (write_ts_exp_tree_pointers): Likewise.
6865 (write_ts_block_tree_pointers): Likewise.
6866 (write_ts_binfo_tree_pointers): Likewise.
6867 (write_ts_constructor_tree_pointers): Likewise.
6868 (write_ts_omp_clause_tree_pointers): Likewise.
6869 (streamer_write_tree_body): Likewise.
6870 (streamer_write_integer_cst): Likewise.
6871 * tree-streamer.h (streamer_read_chain):Declare.
6872 (streamer_write_chain):Declare.
6873 (streamer_write_tree_body): Update prototype.
6874 (streamer_write_integer_cst): Update prototype.
6876 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
6879 * configure: Regenerated.
6881 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
6883 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
6884 (add<mode>3_vcc_zext_dup_exec): Likewise.
6885 (add<mode>3_vcc_zext_dup2): Likewise.
6886 (add<mode>3_vcc_zext_dup2_exec): Likewise.
6888 2020-05-29 Richard Biener <rguenther@suse.de>
6890 PR tree-optimization/95272
6891 * tree-vectorizer.h (_slp_tree::representative): Add.
6892 (SLP_TREE_REPRESENTATIVE): Likewise.
6893 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
6895 (vectorizable_live_operation): Use the representative to
6896 attach the reduction info to.
6897 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
6898 SLP_TREE_REPRESENTATIVE.
6899 (vect_create_new_slp_node): Likewise.
6900 (slp_copy_subtree): Copy it.
6901 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
6902 (vect_slp_analyze_node_operations_1): Pass the representative
6903 to vect_analyze_stmt.
6904 (vect_schedule_slp_instance): Pass the representative to
6905 vect_transform_stmt.
6907 2020-05-29 Richard Biener <rguenther@suse.de>
6909 PR tree-optimization/95356
6910 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
6911 node hacking during analysis.
6913 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
6916 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
6918 2020-05-29 Richard Biener <rguenther@suse.de>
6920 PR tree-optimization/95403
6921 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
6924 2020-05-29 Jakub Jelinek <jakub@redhat.com>
6927 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
6928 declare variant cgraph node removal callback.
6930 2020-05-29 Jakub Jelinek <jakub@redhat.com>
6933 * expr.c (store_expr): If expr_size is constant and significantly
6934 larger than TREE_STRING_LENGTH, set temp to just the
6935 TREE_STRING_LENGTH portion of the STRING_CST.
6937 2020-05-29 Richard Biener <rguenther@suse.de>
6939 PR tree-optimization/95393
6940 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
6941 to build the min/max expression so we simplify cases like
6942 MAX(0, s) immediately.
6944 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
6946 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
6947 for unpacked EOR, ORR, AND.
6949 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
6951 * Makefile.in: don't look for libiberty in the "pic" subdirectory
6952 when building for Mingw. Add dependency on xgcc with the proper
6955 2020-05-28 Jeff Law <law@redhat.com>
6957 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
6959 2020-05-28 Jeff Law <law@redhat.com>
6961 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
6962 make a nonzero adjustment to the memory offset.
6963 (b<ior,xor>hi_msx): Turn into a splitter.
6965 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
6967 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
6968 Fix off-by-one error.
6970 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
6972 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
6973 wb_candidate1 and wb_candidate2.
6974 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
6975 wb_candidate1 and wb_candidate2 if we decided not to use them.
6977 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
6980 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
6981 we have at least some CFI operations when using a frame pointer.
6982 Only redefine the CFA if we have CFI operations.
6984 2020-05-28 Richard Biener <rguenther@suse.de>
6986 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
6987 case for !SLP_TREE_VECTYPE.
6988 (vect_slp_analyze_node_operations): Adjust.
6990 2020-05-28 Richard Biener <rguenther@suse.de>
6992 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
6993 (SLP_TREE_VEC_DEFS): Likewise.
6994 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
6995 (_slp_tree::~_slp_tree): Likewise.
6996 (vect_mask_constant_operand_p): Remove unused function.
6997 (vect_get_constant_vectors): Rename to...
6998 (vect_create_constant_vectors): ... this. Take the
6999 invariant node as argument and code generate it. Remove
7000 dead code, remove temporary asserts. Pass a NULL stmt_info
7001 to vect_init_vector.
7002 (vect_get_slp_defs): Simplify.
7003 (vect_schedule_slp_instance): Code-generate externals and
7004 invariants using vect_create_constant_vectors.
7006 2020-05-28 Richard Biener <rguenther@suse.de>
7008 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
7009 Conditionalize stmt_info use, assert the new stmt cannot throw
7011 (vect_finish_stmt_generation): Adjust assert.
7013 2020-05-28 Richard Biener <rguenther@suse.de>
7015 PR tree-optimization/95273
7016 PR tree-optimization/95356
7017 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
7018 what we set the vector type of the shift operand SLP node
7021 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
7023 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
7026 2020-05-28 Martin Liska <mliska@suse.cz>
7029 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
7030 rename ipcp-unit-growth to ipa-cp-unit-growth.
7032 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
7034 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
7035 from *avx512vl_<code>v2div2qi_store and refine memory size of
7037 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
7038 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
7039 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
7040 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
7041 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
7042 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
7043 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
7044 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
7045 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
7046 (*avx512vl_<code>v2div2si2_store_1): Ditto.
7047 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
7048 (*avx512f_<code>v8div16qi2_store_1): Ditto.
7049 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
7050 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
7051 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
7052 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
7053 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
7054 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
7055 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
7056 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
7057 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
7058 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
7059 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
7060 (*avx512vl_<code>v2div2si2_store_2): Ditto.
7061 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
7062 (*avx512f_<code>v8div16qi2_store_2): Ditto.
7063 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
7064 * config/i386/i386-builtin-types.def: Adjust builtin type.
7065 * config/i386/i386-expand.c: Ditto.
7066 * config/i386/i386-builtin.def: Adjust builtin.
7067 * config/i386/avx512fintrin.h: Ditto.
7068 * config/i386/avx512vlbwintrin.h: Ditto.
7069 * config/i386/avx512vlintrin.h: Ditto.
7071 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
7073 PR gcov-profile/95332
7074 * gcov-io.c (gcov_var::endian): Move field.
7075 (from_file): Add IN_GCOV_TOOL check.
7076 * gcov-io.h (gcov_magic): Ditto.
7078 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
7080 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
7082 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
7084 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
7086 * builtin-types.def (BT_UINT128): New primitive type.
7087 (BT_FN_UINT128_UINT128): New function type.
7088 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
7089 * doc/extend.texi (__builtin_bswap128): Document it.
7090 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
7091 (is_inexpensive_builtin): Likewise.
7092 * fold-const-call.c (fold_const_call_ss): Likewise.
7093 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
7094 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
7095 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
7096 (vectorizable_call): Likewise.
7097 * optabs.c (expand_unop): Always use the double word path for it.
7098 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
7099 * tree.h (uint128_type_node): New global type.
7100 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
7102 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7104 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
7105 (mmx_hsubv2sf3): Ditto.
7106 (mmx_haddsubv2sf3): New expander.
7107 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
7108 RTL template to model horizontal subtraction and addition.
7109 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
7112 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7115 * config/i386/sse.md
7116 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
7117 Remove %q operand modifier from insn template.
7118 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
7120 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7122 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
7123 Enable insn pattern for TARGET_MMX_WITH_SSE.
7124 (*mmx_movshdup): New insn pattern.
7125 (*mmx_movsldup): Ditto.
7126 (*mmx_movss): Ditto.
7127 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
7129 (expand_vec_perm_movs): Handle E_V2SFmode.
7130 (expand_vec_perm_even_odd): Ditto.
7131 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
7132 is already handled by standard shuffle patterns.
7134 2020-05-27 Richard Biener <rguenther@suse.de>
7136 PR tree-optimization/95295
7137 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
7138 merging stores from paths.
7140 2020-05-27 Richard Biener <rguenther@suse.de>
7142 PR tree-optimization/95356
7143 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
7144 type for the shift operand.
7146 2020-05-27 Richard Biener <rguenther@suse.de>
7148 PR tree-optimization/95335
7149 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
7150 lvisited for nodes made external.
7152 2020-05-27 Richard Biener <rguenther@suse.de>
7154 * dump-context.h (debug_dump_context): New class.
7155 (dump_context): Make it friend.
7156 * dumpfile.c (debug_dump_context::debug_dump_context):
7158 (debug_dump_context::~debug_dump_context): Likewise.
7159 * tree-vect-slp.c: Include dump-context.h.
7160 (vect_print_slp_tree): Dump a single SLP node.
7161 (debug): New overload for slp_tree.
7162 (vect_print_slp_graph): Rename from vect_print_slp_tree and
7164 (vect_analyze_slp_instance): Adjust.
7166 2020-05-27 Jakub Jelinek <jakub@redhat.com>
7169 * omp-general.c (omp_declare_variant_remove_hook): New function.
7170 (omp_resolve_declare_variant): Always return base if it is already
7171 declare_variant_alt magic decl itself. Register
7172 omp_declare_variant_remove_hook as cgraph node removal hook.
7174 2020-05-27 Jeff Law <law@redhat.com>
7176 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
7177 for the primary input operand.
7178 (tstsi_variable_bit_qi): Similarly.
7180 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
7182 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
7184 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
7187 * ipa-utils.h (odr_type_p): Also permit calls with
7188 only flag_generate_offload set.
7190 2020-05-26 Alexandre Oliva <oliva@adacore.com>
7192 * gcc.c (validate_switches): Add braced parameter. Adjust all
7193 callers. Expected and skip trailing brace only if braced.
7194 Return after handling one atom otherwise.
7195 (DUMPS_OPTIONS): New.
7196 (cpp_debug_options): Define in terms of it.
7198 2020-05-26 Richard Biener <rguenther@suse.de>
7200 PR tree-optimization/95327
7201 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
7202 when we are not using a scalar shift.
7204 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
7206 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
7207 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
7208 Handle E_V2SImode and E_V4HImode.
7209 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
7210 Assert that E_V2SImode is already handled.
7211 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
7212 is already handled by standard shuffle patterns.
7214 2020-05-26 Jan Hubicka <jh@suse.cz>
7216 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
7219 2020-05-26 Jakub Jelinek <jakub@redhat.com>
7222 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
7223 * omp-general.h (find_combined_omp_for): Declare.
7224 * omp-general.c: Include tree-iterator.h.
7225 (find_combined_omp_for): New function, moved from gimplify.c.
7227 2020-05-26 Alexandre Oliva <oliva@adacore.com>
7229 * common.opt (aux_base_name): Define.
7230 (dumpbase, dumpdir): Mark as Driver options.
7231 (-dumpbase, -dumpdir): Likewise.
7232 (dumpbase-ext, -dumpbase-ext): New.
7233 (auxbase, auxbase-strip): Drop.
7234 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
7236 (-o): Introduce the notion of primary output, mention it
7237 influences auxiliary and dump output names as well, add
7239 (-save-temps): Adjust, move examples into -dump*.
7240 (-save-temps=cwd, -save-temps=obj): Likewise.
7241 (-fdump-final-insns): Adjust.
7242 * dwarf2out.c (gen_producer_string): Drop auxbase and
7243 auxbase_strip; add dumpbase_ext.
7244 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
7245 (save_temps_prefix, save_temps_length): Drop.
7246 (save_temps_overrides_dumpdir): New.
7247 (dumpdir, dumpbase, dumpbase_ext): New.
7248 (dumpdir_length, dumpdir_trailing_dash_added): New.
7249 (outbase, outbase_length): New.
7250 (The Specs Language): Introduce %". Adjust %b and %B.
7251 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
7252 Precede object file with %w when it's the primary output.
7253 (cpp_debug_options): Do not pass on incoming -dumpdir,
7254 -dumpbase and -dumpbase-ext options; recompute them with
7256 (cc1_options): Drop auxbase with and without compare-debug;
7257 use cpp_debug_options instead of dumpbase. Mark asm output
7258 with %w when it's the primary output.
7259 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
7260 %:replace-exception. Add %:dumps.
7261 (driver_handle_option): Implement -save-temps=*/-dumpdir
7262 mutual overriding logic. Save dumpdir, dumpbase and
7263 dumpbase-ext options. Do not save output_file in
7265 (adds_single_suffix_p): New.
7266 (single_input_file_index): New.
7267 (process_command): Combine output dir, output base name, and
7268 dumpbase into dumpdir and outbase.
7269 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
7270 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
7271 and outbase instead of input_basename in %b, %B and in
7272 -save-temps aux files. Handle empty argument %".
7273 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
7274 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
7275 naming. Spec-quote the computed -fdump-final-insns file name.
7276 (debug_auxbase_opt): Drop.
7277 (compare_debug_self_opt_spec_function): Drop auxbase-strip
7279 (compare_debug_auxbase_opt_spec_function): Drop.
7280 (not_actual_file_p): New.
7281 (replace_extension_spec_func): Drop.
7282 (dumps_spec_func): New.
7283 (convert_white_space): Split-out parts into...
7284 (quote_string, whitespace_to_convert_p): ... these. New.
7285 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
7286 (driver::finalize): Release and reset new variables; drop
7288 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
7289 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
7290 empty string otherwise.
7291 (DUMPBASE_SUFFIX): Drop leading period.
7292 (debug_objcopy): Use concat.
7293 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
7294 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
7295 component. Simplify temp file names.
7296 * opts.c (finish_options): Drop aux base name handling.
7297 (common_handle_option): Drop auxbase-strip handling.
7298 * toplev.c (print_switch_values): Drop auxbase, add
7300 (process_options): Derive aux_base_name from dump_base_name
7302 (lang_dependent_init): Compute dump_base_ext along with
7303 dump_base_name. Disable stack usage and callgraph-info during
7304 lto generation and compare-debug recompilation.
7306 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
7307 Uroš Bizjak <ubizjak@gmail.com>
7311 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
7312 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
7313 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
7314 float<floatunssuffix>v2div2sf2.
7315 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
7316 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
7317 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
7318 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
7319 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
7320 * config/i386/i386-builtin.def: Ditto.
7321 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
7322 subregs when both omode and imode are vector mode and
7323 have the same inner mode.
7325 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
7327 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
7328 Only turn MEM_REFs into bit-field stores for small bit-field regions.
7329 (imm_store_chain_info::output_merged_store): Be prepared for sources
7330 with non-integral type in the bit-field insertion case.
7331 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
7332 the largest size for the bit-field case.
7334 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
7336 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
7337 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
7338 (*vec_dupv4hi): Redefine as define_insn.
7339 Remove alternative with general register input.
7340 (*vec_dupv2si): Ditto.
7342 2020-05-25 Richard Biener <rguenther@suse.de>
7344 PR tree-optimization/95309
7345 * tree-vect-slp.c (vect_get_constant_vectors): Move number
7346 of vector computation ...
7347 (vect_slp_analyze_node_operations): ... to analysis phase.
7349 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
7351 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
7352 * lto-streamer.h (streamer_debugging): New constant
7353 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
7354 streamer_debugging check.
7355 (streamer_get_pickled_tree): Likewise.
7356 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
7358 2020-05-25 Richard Biener <rguenther@suse.de>
7360 PR tree-optimization/95308
7361 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
7362 test for TARGET_MEM_REFs.
7364 2020-05-25 Richard Biener <rguenther@suse.de>
7366 PR tree-optimization/95295
7367 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
7368 RHSes and drop to full sm_other if they are not equal.
7370 2020-05-25 Richard Biener <rguenther@suse.de>
7372 PR tree-optimization/95271
7373 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
7374 children vector type.
7375 (vectorizable_call): Pass down slp ops.
7377 2020-05-25 Richard Biener <rguenther@suse.de>
7379 PR tree-optimization/95297
7380 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
7381 skip updating operand 1 vector type.
7383 2020-05-25 Richard Biener <rguenther@suse.de>
7385 PR tree-optimization/95284
7386 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
7389 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
7392 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
7393 (trunc<mode><sf2dfmode_lower>2) New expander.
7394 (extend<sf2dfmode_lower><mode>2): Ditto.
7396 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
7398 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
7399 ubsan_{data,type},ASAN symbols linker-visible.
7401 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7403 * lto-streamer-out.c (DFS::DFS): Silence warning.
7405 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
7408 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
7409 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
7411 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7413 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
7416 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7418 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
7419 * lto-streamer-out.c (create_output_block): Fix whitespace
7420 (lto_write_tree_1): Add (debug) dump.
7421 (DFS::DFS): Add dump.
7422 (DFS::DFS_write_tree_body): Do not dump here.
7423 (lto_output_tree): Improve dumping; do not stream ref when not needed.
7424 (produce_asm_for_decls): Fix whitespace.
7425 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
7426 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
7428 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
7431 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
7432 (truncv32hiv32qi2): Ditto.
7433 (trunc<ssedoublemodelower><mode>2): Ditto.
7434 (trunc<mode><pmov_dst_3>2): Ditto.
7435 (trunc<mode><pmov_dst_mode_4>2): Ditto.
7436 (truncv2div2si2): Ditto.
7437 (truncv8div8qi2): Ditto.
7438 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
7439 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
7440 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
7441 *avx512vl_<code><mode>v<ssescalarnum>qi2.
7443 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
7446 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
7449 2020-05-22 Richard Biener <rguenther@suse.de>
7451 PR tree-optimization/95268
7452 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
7455 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7457 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
7460 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7462 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
7463 (lto_input_scc): Optimize streaming of entry lengths.
7464 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
7465 (DFS::DFS): Optimize stremaing of entry lengths
7467 2020-05-22 Richard Biener <rguenther@suse.de>
7470 * doc/invoke.texi (flto): Document behavior of diagnostic
7473 2020-05-22 Richard Biener <rguenther@suse.de>
7475 * tree-vectorizer.h (vect_is_simple_use): New overload.
7476 (vect_maybe_update_slp_op_vectype): New.
7477 * tree-vect-stmts.c (vect_is_simple_use): New overload
7478 accessing operands of SLP vs. non-SLP operation transparently.
7479 (vect_maybe_update_slp_op_vectype): New function updating
7480 the possibly shared SLP operands vector type.
7481 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
7482 using the new vect_is_simple_use overload; update SLP invariant
7483 operand nodes vector type.
7484 (vectorizable_comparison): Likewise.
7485 (vectorizable_call): Likewise.
7486 (vectorizable_conversion): Likewise.
7487 (vectorizable_shift): Likewise.
7488 (vectorizable_store): Likewise.
7489 (vectorizable_condition): Likewise.
7490 (vectorizable_assignment): Likewise.
7491 * tree-vect-loop.c (vectorizable_reduction): Likewise.
7492 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
7493 present SLP_TREE_VECTYPE and check it matches previous
7496 2020-05-22 Richard Biener <rguenther@suse.de>
7498 PR tree-optimization/95248
7499 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
7501 2020-05-22 Richard Biener <rguenther@suse.de>
7503 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
7504 (_slp_tree::~_slp_tree): Likewise.
7505 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
7507 (_slp_tree::~_slp_tree): Implement.
7508 (vect_free_slp_tree): Simplify.
7509 (vect_create_new_slp_node): Likewise. Add nops parameter.
7510 (vect_build_slp_tree_2): Adjust.
7511 (vect_analyze_slp_instance): Likewise.
7513 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
7515 * adjust-alignment.c: Include memmodel.h.
7517 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
7520 * config/i386/cpuid.h: Use hexadecimal in comments.
7522 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
7525 * config/i386/i386-builtins.c (processor_features): Move
7526 F_AVX512VP2INTERSECT after F_AVX512BF16.
7527 (isa_names_table): Likewise.
7529 2020-05-21 Martin Liska <mliska@suse.cz>
7531 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
7532 Handle OPT_moutline_atomics.
7533 * config/aarch64/aarch64.c: Add outline-atomics to
7535 * doc/extend.texi: Document the newly added target attribute.
7537 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
7541 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
7542 operands 1 and 2 commutative. Manually swap operands.
7543 (*mmx_nabsv2sf2): Ditto.
7546 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
7548 * config/i386/i386.md (*<code>tf2_1):
7549 Mark operands 1 and 2 commutative.
7550 (*nabstf2_1): Ditto.
7551 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
7552 commutative. Do not swap operands.
7553 (*nabs<mode>2): Ditto.
7555 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
7558 * config/i386/sse.md (<code>v8qiv8hi2): Use
7559 simplify_gen_subreg instead of simplify_subreg.
7560 (<code>v8qiv8si2): Ditto.
7561 (<code>v4qiv4si2): Ditto.
7562 (<code>v4hiv4si2): Ditto.
7563 (<code>v8qiv8di2): Ditto.
7564 (<code>v4qiv4di2): Ditto.
7565 (<code>v2qiv2di2): Ditto.
7566 (<code>v4hiv4di2): Ditto.
7567 (<code>v2hiv2di2): Ditto.
7568 (<code>v2siv2di2): Ditto.
7570 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
7573 * config/i386/i386.md (*pushsi2_rex64):
7574 Use "e" constraint instead of "i".
7576 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
7578 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
7579 (lto_input_tree_1): Strenghten sanity check.
7580 (lto_input_tree): Update call of lto_input_scc.
7581 * lto-streamer-out.c: Include ipa-utils.h
7582 (create_output_block): Initialize local_trees if merigng is going
7584 (destroy_output_block): Destroy local_trees.
7585 (DFS): Add max_local_entry.
7586 (local_tree_p): New function.
7587 (DFS::DFS): Initialize and maintain it.
7588 (DFS::DFS_write_tree): Decide on streaming format.
7589 (lto_output_tree): Stream inline singleton SCCs
7590 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
7591 (struct output_block): Add local_trees.
7592 (lto_input_scc): Update prototype.
7594 2020-05-20 Patrick Palka <ppalka@redhat.com>
7597 * hash-table.h (hash_table::find_with_hash): Move up the call to
7600 2020-05-20 Martin Liska <mliska@suse.cz>
7602 * lto-compress.c (lto_compression_zstd): Fill up
7603 num_compressed_il_bytes.
7604 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
7606 2020-05-20 Richard Biener <rguenther@suse.de>
7608 PR tree-optimization/95219
7609 * tree-vect-loop.c (vectorizable_induction): Reduce
7610 group_size before computing the number of required IVs.
7612 2020-05-20 Richard Biener <rguenther@suse.de>
7615 * tree-inline.c (remap_gimple_stmt): Revert adjusting
7616 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
7618 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7619 Andre Vieira <andre.simoesdiasvieira@arm.com>
7622 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
7624 (mve_vector_mem_operand): Likewise.
7625 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
7626 the load from memory to a core register is legitimate for give mode.
7627 (mve_vector_mem_operand): Define function.
7628 (arm_print_operand): Modify comment.
7629 (arm_mode_base_reg_class): Define.
7630 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
7631 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
7632 * config/arm/constraints.md (Ux): Likewise.
7634 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
7635 add support for missing Vector Store Register and Vector Load Register.
7636 Add a new alternative to support load from memory to PC (or label) in
7638 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
7639 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
7640 mve_memory_operand and also modify the MVE instructions to emit.
7641 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
7642 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
7643 mve_memory_operand and also modify the MVE instructions to emit.
7644 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
7645 mve_memory_operand and also modify the MVE instructions to emit.
7646 (mve_vldrhq_z_fv8hf): Likewise.
7647 (mve_vldrhq_z_<supf><mode>): Likewise.
7648 (mve_vldrwq_fv4sf): Likewise.
7649 (mve_vldrwq_<supf>v4si): Likewise.
7650 (mve_vldrwq_z_fv4sf): Likewise.
7651 (mve_vldrwq_z_<supf>v4si): Likewise.
7652 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
7653 (mve_vld1q_<supf><mode>): Likewise.
7654 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
7656 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
7657 mve_memory_operand and also modify the MVE instructions to emit.
7658 (mve_vstrhq_p_<supf><mode>): Likewise.
7659 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
7661 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
7662 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
7663 instructions to emit.
7664 (mve_vstrwq_p_<supf>v4si): Likewise.
7665 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
7666 * config/arm/predicates.md (mve_memory_operand): Define.
7668 2020-05-30 Richard Biener <rguenther@suse.de>
7671 * c-fold.c (c_fully_fold_internal): Enhance guard on
7674 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
7677 * Makefile.in (OBJS): Add adjust-alignment.o.
7678 * adjust-alignment.c (pass_data_adjust_alignment): New.
7679 (pass_adjust_alignment): New.
7680 (pass_adjust_alignment::execute): New.
7681 (make_pass_adjust_alignment): New.
7682 * tree-pass.h (make_pass_adjust_alignment): New.
7683 * passes.def: Add pass_adjust_alignment.
7685 2020-05-19 Alex Coplan <alex.coplan@arm.com>
7688 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
7689 identity permutation.
7691 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
7693 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
7694 msp430_small, msp430_large and size24plus DejaGNU effective
7696 Improve grammar in descriptions for size20plus and size32plus effective
7699 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
7701 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
7702 callee saved registers only in xBPF.
7703 (bpf_expand_prologue): Save callee saved registers only in xBPF.
7704 (bpf_expand_epilogue): Likewise for restoring.
7705 * doc/invoke.texi (eBPF Options): Document this is activated by
7708 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
7710 * config/bpf/bpf.opt (mxbpf): New option.
7711 * doc/invoke.texi (Option Summary): Add -mxbpf.
7712 (eBPF Options): Document -mxbbpf.
7714 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
7717 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
7718 (<code>v32qiv32hi2): Ditto.
7719 (<code>v8qiv8hi2): Ditto.
7720 (<code>v16qiv16si2): Ditto.
7721 (<code>v8qiv8si2): Ditto.
7722 (<code>v4qiv4si2): Ditto.
7723 (<code>v16hiv16si2): Ditto.
7724 (<code>v8hiv8si2): Ditto.
7725 (<code>v4hiv4si2): Ditto.
7726 (<code>v8qiv8di2): Ditto.
7727 (<code>v4qiv4di2): Ditto.
7728 (<code>v2qiv2di2): Ditto.
7729 (<code>v8hiv8di2): Ditto.
7730 (<code>v4hiv4di2): Ditto.
7731 (<code>v2hiv2di2): Ditto.
7732 (<code>v8siv8di2): Ditto.
7733 (<code>v4siv4di2): Ditto.
7734 (<code>v2siv2di2): Ditto.
7736 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
7738 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
7739 (riscv_implied_info): New.
7740 (riscv_subset_list): Add handle_implied_ext.
7741 (riscv_subset_list::to_string): New parameter version_p to
7742 control output format.
7743 (riscv_subset_list::handle_implied_ext): New.
7744 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
7745 (riscv_arch_str): New parameter version_p to control output format.
7746 (riscv_expand_arch): New.
7747 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
7749 * config/riscv/riscv.h (riscv_expand_arch): New,
7750 (EXTRA_SPEC_FUNCTIONS): Define.
7751 (ASM_SPEC): Transform -march= via riscv_expand_arch.
7753 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
7755 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
7756 parse_multiletter_ext.
7757 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
7758 adjust parsing order for 's' and 'x'.
7760 2020-05-19 Richard Biener <rguenther@suse.de>
7762 * tree-vectorizer.h (_slp_tree::vectype): Add field.
7763 (SLP_TREE_VECTYPE): New.
7764 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
7766 (vect_create_new_slp_node): Likewise.
7767 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
7769 (vect_slp_analyze_node_operations): Walk nodes children for
7771 (vect_get_constant_vectors): Use local scope op variable.
7772 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
7773 (vect_model_simple_cost): Adjust.
7774 (vect_model_store_cost): Likewise.
7775 (vectorizable_store): Likewise.
7777 2020-05-18 Martin Sebor <msebor@redhat.com>
7780 * tree-object-size.c (decl_init_size): New function.
7781 (addr_object_size): Call it.
7782 * tree.h (last_field): Declare.
7783 (first_field): Add attribute nonnull.
7785 2020-05-18 Martin Sebor <msebor@redhat.com>
7788 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
7789 * tree.c (component_ref_size): Correct the handling or array members
7791 Drop a pointless test.
7792 Rename a local variable.
7794 2020-05-18 Jason Merrill <jason@redhat.com>
7796 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
7797 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
7799 2020-05-14 Jason Merrill <jason@redhat.com>
7801 * doc/install.texi (Prerequisites): Update boostrap compiler
7802 requirement to C++11/GCC 4.8.
7804 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7806 PR tree-optimization/94952
7807 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
7808 Initialize variables bitpos, bitregion_start, and bitregion_end in
7809 order to silence warnings about use of uninitialized variables.
7811 2020-05-18 Carl Love <cel@us.ibm.com>
7814 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
7815 first_match_index_<mode>.
7816 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
7817 additional test cases with zero vector elements.
7819 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
7822 * config/i386/i386-expand.c (ix86_expand_int_movcc):
7823 Avoid reversing a non-trapping comparison to a trapping one.
7825 2020-05-18 Alex Coplan <alex.coplan@arm.com>
7827 * config/arm/arm.c (output_move_double): Fix codegen when loading into
7828 a register pair with an odd base register.
7830 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
7832 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
7833 Do not emit FLAGS_REG clobber for TFmode.
7834 * config/i386/i386.md (*<code>tf2_1): Rewrite as
7835 define_insn_and_split. Mark operands 1 and 2 commutative.
7836 (*nabstf2_1): Ditto.
7837 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
7838 Do not swap memory operands. Simplify RTX generation.
7839 (neg abs SSE splitter): Ditto.
7840 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
7841 commutative. Do not swap operands. Simplify RTX generation.
7842 (*nabs<mode>2): Ditto.
7844 2020-05-18 Richard Biener <rguenther@suse.de>
7846 * tree-vect-slp.c (vect_slp_bb): Start after labels.
7847 (vect_get_constant_vectors): Really place init stmt after scalar defs.
7848 * tree-vect-stmts.c (vect_init_vector_1): Insert before
7851 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
7853 * config/i386/driver-i386.c (host_detect_local_cpu): Support
7854 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
7857 2020-05-18 Richard Biener <rguenther@suse.de>
7860 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
7861 when inlining into a non-call EH function.
7863 2020-05-18 Richard Biener <rguenther@suse.de>
7865 PR tree-optimization/95172
7866 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
7867 eventually need the conditional processing.
7868 (execute_sm_exit): When processing an orderd sequence
7869 avoid doing any conditional processing.
7870 (hoist_memory_references): Pass down whether all edges
7871 have ordered processing for a ref to execute_sm.
7873 2020-05-17 Jeff Law <law@redhat.com>
7875 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
7876 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
7877 into a single pattern using pc_or_label_operand.
7878 * config/h8300/combiner.md (bit branch patterns): Likewise.
7879 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
7881 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
7884 * config/i386/i386-features.c (has_non_address_hard_reg):
7886 (pseudo_reg_set): This. Return the SET expression. Ignore
7887 pseudo register push.
7888 (general_scalar_to_vector_candidate_p): Combine single_set and
7889 has_non_address_hard_reg calls to pseudo_reg_set.
7890 (timode_scalar_to_vector_candidate_p): Likewise.
7891 * config/i386/i386.md (*pushv1ti2): New pattern.
7893 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7896 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7898 * tree-vrp.c (operand_less_p): Move to...
7899 * vr-values.c (operand_less_p): ...here.
7900 * tree-vrp.h (operand_less_p): Remove.
7902 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7904 * tree-vrp.c (operand_less_p): Move to...
7905 * vr-values.c (operand_less_p): ...here.
7906 * tree-vrp.h (operand_less_p): Remove.
7908 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7910 * tree-vrp.c (class vrp_insert): Remove prototype for
7913 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7915 * tree-vrp.c (class live_names): New.
7916 (live_on_edge): Move into live_names.
7917 (build_assert_expr_for): Move into vrp_insert.
7918 (find_assert_locations_in_bb): Rename from
7919 find_assert_locations_1.
7920 (process_assert_insertions_for): Move into vrp_insert.
7921 (compare_assert_loc): Same.
7922 (remove_range_assertions): Same.
7923 (dump_asserts_for): Rename to vrp_insert::dump.
7924 (debug_asserts_for): Rename to vrp_insert::debug.
7925 (dump_all_asserts): Rename to vrp_insert::dump.
7926 (debug_all_asserts): Rename to vrp_insert::debug.
7928 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
7930 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
7931 check_array_ref, check_mem_ref, and search_for_addr_array
7933 (class array_bounds_checker): ...here.
7934 (class check_array_bounds_dom_walker): Adjust to use
7935 array_bounds_checker.
7936 (check_all_array_refs): Move into array_bounds_checker and rename
7938 (class vrp_folder): Make fold_predicate_in private.
7940 2020-05-15 Jeff Law <law@redhat.com>
7942 * config/h8300/h8300.md (SFI iterator): New iterator for
7944 * config/h8300/peepholes.md (memory comparison): Use mode
7945 iterator to consolidate 3 patterns into one.
7946 (stack allocation and stack store): Handle SFmode. Handle
7949 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
7951 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
7952 RS6000_BTM_POWERPC64.
7954 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
7956 * config/i386/i386.md (SWI48DWI): New mode iterator.
7957 (*push<mode>2): Allow XMM registers.
7958 (*pushdi2_rex64): Ditto.
7959 (*pushsi2_rex64): Ditto.
7961 (push XMM reg splitter): New splitter
7963 (*pushdf) Change "x" operand constraint to "v".
7964 (*pushsf_rex64): Ditto.
7967 2020-05-15 Richard Biener <rguenther@suse.de>
7969 PR tree-optimization/92260
7970 * tree-vect-slp.c (vect_get_constant_vectors): Compute
7971 the number of vector stmts in a canonical way.
7973 2020-05-15 Martin Liska <mliska@suse.cz>
7975 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
7978 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
7980 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
7982 2020-05-15 Richard Biener <rguenther@suse.de>
7984 PR tree-optimization/95133
7985 * gimple-ssa-split-paths.c
7986 (find_block_to_duplicate_for_splitting_paths): Check for
7989 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
7991 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
7993 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
7995 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
7998 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
7999 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
8002 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
8005 * config/i386/i386.md (isa): Add sse3_noavx.
8006 (enabled): Handle sse3_noavx.
8008 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
8009 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
8010 alternatives. Match commutative vec_select selector operands.
8011 (*mmx_haddv2sf3_low): New insn pattern.
8013 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
8014 (*mmx_hsubv2sf3_low): New insn pattern.
8016 2020-05-15 Richard Biener <rguenther@suse.de>
8018 PR tree-optimization/33315
8019 * tree-ssa-sink.c: Include tree-eh.h.
8020 (sink_stats): Add commoned member.
8021 (sink_common_stores_to_bb): New function implementing store
8022 commoning by sinking to the successor.
8023 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
8024 (pass_sink_code::execute): Likewise. Record commoned stores
8027 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
8029 PR rtl-optimization/37451, part of PR target/61837
8030 * loop-doloop.c (doloop_simplify_count): New function. Simplify
8031 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
8032 (doloop_modify): Call doloop_simplify_count.
8034 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
8037 * doc/sourcebuild.texi: Document effective target lgccjit.
8039 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
8041 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
8042 define_expand, and rename the original to ...
8043 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
8044 (add<mode>3_zext_dup_exec): Likewise, with ...
8045 (add<mode>3_vcc_zext_dup_exec): ... this.
8046 (add<mode>3_zext_dup2): Likewise, with ...
8047 (add<mode>3_zext_dup_exec): ... this.
8048 (add<mode>3_zext_dup2_exec): Likewise, with ...
8049 (add<mode>3_zext_dup2): ... this.
8050 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
8051 addv64di3_zext* calls to use addv64di3_vcc_zext*.
8053 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8056 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
8057 (extendv2sfv2df2): Ditto.
8059 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
8061 * configure: Regenerated.
8063 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
8065 * config/arm/arm.c (reg_needs_saving_p): New function.
8066 (use_return_insn): Use reg_needs_saving_p.
8067 (arm_get_vfp_saved_size): Likewise.
8068 (arm_compute_frame_layout): Likewise.
8069 (arm_save_coproc_regs): Likewise.
8070 (thumb1_expand_epilogue): Likewise.
8071 (arm_expand_epilogue_apcs_frame): Likewise.
8072 (arm_expand_epilogue): Likewise.
8074 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
8076 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
8078 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8081 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
8083 (floatv2siv2df2): New expander.
8084 (floatunsv2siv2df2): New insn pattern.
8086 (fix_truncv2dfv2si2): New expander.
8087 (fixuns_truncv2dfv2si2): New insn pattern.
8089 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
8092 * config/aarch64/aarch64-sve-builtins.cc
8093 (handle_arm_sve_vector_bits_attribute): Create a copy of the
8094 original type's TYPE_MAIN_VARIANT, then reapply all the differences
8095 between the original type and its main variant.
8097 2020-05-14 Richard Biener <rguenther@suse.de>
8100 * real.c (real_to_decimal_for_mode): Make sure we handle
8101 a zero with nonzero exponent.
8103 2020-05-14 Jakub Jelinek <jakub@redhat.com>
8105 * Makefile.in (GTFILES): Add omp-general.c.
8106 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
8107 calls_declare_variant_alt members and initialize them in the
8109 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
8110 calls to declare_variant_alt nodes.
8111 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
8112 and calls_declare_variant_alt.
8113 (input_overwrite_node): Read them back.
8114 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
8116 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
8118 (tree_function_versioning): Copy calls_declare_variant_alt bit.
8119 * omp-offload.c (execute_omp_device_lower): Call
8120 omp_resolve_declare_variant on direct function calls.
8121 (pass_omp_device_lower::gate): Also enable for
8122 calls_declare_variant_alt functions.
8123 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
8124 (omp_context_selector_matches): Handle the case when
8125 cfun->curr_properties has PROP_gimple_any bit set.
8126 (struct omp_declare_variant_entry): New type.
8127 (struct omp_declare_variant_base_entry): New type.
8128 (struct omp_declare_variant_hasher): New type.
8129 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
8131 (omp_declare_variants): New variable.
8132 (struct omp_declare_variant_alt_hasher): New type.
8133 (omp_declare_variant_alt_hasher::hash,
8134 omp_declare_variant_alt_hasher::equal): New methods.
8135 (omp_declare_variant_alt): New variables.
8136 (omp_resolve_late_declare_variant): New function.
8137 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
8138 when called late. Create a magic declare_variant_alt fndecl and
8139 cgraph node and return that if decision needs to be deferred until
8140 after gimplification.
8141 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
8145 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
8146 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
8147 entry block if info->after_stmt is NULL, otherwise add after that stmt
8148 and update it after adding each stmt.
8149 (ipa_simd_modify_function_body): Initialize info.after_stmt.
8151 * function.h (struct function): Add has_omp_target bit.
8152 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
8154 (omp_discover_declare_target_tgt_fn_r): ... this.
8155 (omp_discover_declare_target_var_r): Call
8156 omp_discover_declare_target_tgt_fn_r instead of
8157 omp_discover_declare_target_fn_r.
8158 (omp_discover_implicit_declare_target): Also queue functions with
8159 has_omp_target bit set, for those walk with
8160 omp_discover_declare_target_fn_r, for declare target to functions
8161 walk with omp_discover_declare_target_tgt_fn_r.
8163 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8166 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
8167 Add SSE/AVX alternative. Change operand predicates from
8168 nonimmediate_operand to register_mmxmem_operand.
8169 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8170 (fix_truncv2sfv2si2): New expander.
8171 (fixuns_truncv2sfv2si2): New insn pattern.
8173 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
8174 Add SSE/AVX alternative. Change operand predicates from
8175 nonimmediate_operand to register_mmxmem_operand.
8176 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8177 (floatv2siv2sf2): New expander.
8178 (floatunsv2siv2sf2): New insn pattern.
8180 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
8182 (IX86_BUILTIN_PI2FD): Ditto.
8184 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8186 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
8188 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
8191 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8193 * config/s390/s390.c (allocate_stack_space): Add missing updates
8194 of last_probe_offset.
8196 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8198 * config/s390/s390.md ("allocate_stack"): Call
8199 anti_adjust_stack_and_probe_stack_clash when stack clash
8200 protection is enabled.
8201 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
8202 prototype. Remove static.
8203 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
8206 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
8208 * config/rs6000/altivec.h (vec_extractl): New #define.
8209 (vec_extracth): Likewise.
8210 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
8211 (UNSPEC_EXTRACTR): Likewise.
8212 (vextractl<mode>): New expansion.
8213 (vextractl<mode>_internal): New insn.
8214 (vextractr<mode>): New expansion.
8215 (vextractr<mode>_internal): New insn.
8216 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
8217 New built-in function.
8218 (__builtin_altivec_vextduhvlx): Likewise.
8219 (__builtin_altivec_vextduwvlx): Likewise.
8220 (__builtin_altivec_vextddvlx): Likewise.
8221 (__builtin_altivec_vextdubvhx): Likewise.
8222 (__builtin_altivec_vextduhvhx): Likewise.
8223 (__builtin_altivec_vextduwvhx): Likewise.
8224 (__builtin_altivec_vextddvhx): Likewise.
8225 (__builtin_vec_extractl): New overloaded built-in function.
8226 (__builtin_vec_extracth): Likewise.
8227 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8228 Define overloaded forms of __builtin_vec_extractl and
8229 __builtin_vec_extracth.
8230 (builtin_function_type): Add cases to mark arguments of new
8231 built-in functions as unsigned.
8232 (rs6000_common_init_builtins): Add
8233 opaque_ftype_opaque_opaque_opaque_opaque.
8234 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
8235 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8236 for a Future Architecture): Add description of vec_extractl and
8237 vec_extractr built-in functions.
8239 2020-05-13 Richard Biener <rguenther@suse.de>
8241 * target.def (add_stmt_cost): Add new vectype parameter.
8242 * targhooks.c (default_add_stmt_cost): Adjust.
8243 * targhooks.h (default_add_stmt_cost): Likewise.
8244 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
8246 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
8247 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
8248 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
8250 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
8251 (dump_stmt_cost): Add new vectype parameter.
8252 (add_stmt_cost): Likewise.
8253 (record_stmt_cost): Likewise.
8254 (record_stmt_cost): Add overload with old signature.
8255 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
8257 (vect_get_known_peeling_cost): Likewise.
8258 (vect_estimate_min_profitable_iters): Likewise.
8259 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
8260 * tree-vect-stmts.c (record_stmt_cost): Likewise.
8261 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
8262 and pass down correct vectype and NULL stmt_info.
8263 (vect_model_simple_cost): Adjust.
8264 (vect_model_store_cost): Likewise.
8266 2020-05-13 Richard Biener <rguenther@suse.de>
8268 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
8269 (_slp_instance::group_size): Likewise.
8270 * tree-vect-loop.c (vectorizable_reduction): The group size
8271 is the number of lanes in the node.
8272 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
8273 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
8274 verify it matches the instance trees number of lanes.
8275 (vect_slp_analyze_node_operations_1): Use the numer of lanes
8276 in the node as group size.
8277 (vect_bb_vectorization_profitable_p): Use the instance root
8278 number of lanes for the size of life.
8279 (vect_schedule_slp_instance): Use the number of lanes as
8281 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
8282 parameter. Use the number of lanes of the load for the group
8283 size in the gap adjustment code.
8284 (vect_analyze_stmt): Adjust.
8285 (vect_transform_stmt): Likewise.
8287 2020-05-13 Jakub Jelinek <jakub@redhat.com>
8290 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
8291 if the last insn is a note.
8293 PR tree-optimization/95060
8294 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
8295 if it is the single use of the FMA internal builtin.
8297 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
8299 PR tree-optimization/94969
8300 * tree-data-dependence.c (constant_access_functions): Rename to...
8301 (invariant_access_functions): ...this. Add parameter. Check for
8302 invariant access function, rather than constant.
8303 (build_classic_dist_vector): Call above function.
8304 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
8306 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
8309 * doc/extend.texi (x86Operandmodifiers): Document more x86
8311 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
8313 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
8315 * tree-vrp.c (class vrp_insert): New.
8316 (insert_range_assertions): Move to class vrp_insert.
8317 (dump_all_asserts): Same as above.
8318 (dump_asserts_for): Same as above.
8319 (live): Same as above.
8320 (need_assert_for): Same as above.
8321 (live_on_edge): Same as above.
8322 (finish_register_edge_assert_for): Same as above.
8323 (find_switch_asserts): Same as above.
8324 (find_assert_locations): Same as above.
8325 (find_assert_locations_1): Same as above.
8326 (find_conditional_asserts): Same as above.
8327 (process_assert_insertions): Same as above.
8328 (register_new_assert_for): Same as above.
8329 (vrp_prop): New variable fun.
8330 (vrp_initialize): New parameter.
8331 (identify_jump_threads): Same as above.
8332 (execute_vrp): Same as above.
8335 2020-05-12 Keith Packard <keith.packard@sifive.com>
8337 * config/riscv/riscv.c (riscv_unique_section): New.
8338 (TARGET_ASM_UNIQUE_SECTION): New.
8340 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
8342 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
8343 * config/riscv/riscv-passes.def: New file.
8344 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
8345 * config/riscv/riscv-shorten-memrefs.c: New file.
8346 * config/riscv/riscv.c (tree-pass.h): New include.
8347 (riscv_compressed_reg_p): New Function
8348 (riscv_compressed_lw_offset_p): Likewise.
8349 (riscv_compressed_lw_address_p): Likewise.
8350 (riscv_shorten_lw_offset): Likewise.
8351 (riscv_legitimize_address): Attempt to convert base + large_offset
8352 to compressible new_base + small_offset.
8353 (riscv_address_cost): Make anticipated compressed load/stores
8354 cheaper for code size than uncompressed load/stores.
8355 (riscv_register_priority): Move compressed register check to
8356 riscv_compressed_reg_p.
8357 * config/riscv/riscv.h (C_S_BITS): Define.
8358 (CSW_MAX_OFFSET): Define.
8359 * config/riscv/riscv.opt (mshorten-memefs): New option.
8360 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
8361 (PASSES_EXTRA): Add riscv-passes.def.
8362 * doc/invoke.texi: Document -mshorten-memrefs.
8364 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
8365 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
8366 * doc/tm.texi: Regenerate.
8367 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
8368 * sched-deps.c (attempt_change): Use old address if it is cheaper than
8370 * target.def (new_address_profitable_p): New hook.
8371 * targhooks.c (default_new_address_profitable_p): New function.
8372 * targhooks.h (default_new_address_profitable_p): Declare.
8374 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
8377 * config/i386/mmx.md (copysignv2sf3): New expander.
8378 (xorsignv2sf3): Ditto.
8379 (signbitv2sf3): Ditto.
8381 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
8384 * config/i386/mmx.md (fmav2sf4): New insn pattern.
8389 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
8391 * Makefile.in (CET_HOST_FLAGS): New.
8392 (COMPILER): Add $(CET_HOST_FLAGS).
8393 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
8394 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
8396 * aclocal.m4: Regenerated.
8397 * configure: Likewise.
8399 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
8402 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
8403 (*mmx_<code>v2sf2): New insn_and_split pattern.
8404 (*mmx_nabsv2sf2): Ditto.
8405 (*mmx_andnotv2sf3): New insn pattern.
8406 (*mmx_<code>v2sf3): Ditto.
8407 * config/i386/i386.md (absneg_op): New code attribute.
8408 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
8409 (ix86_build_signbit_mask): Ditto.
8411 2020-05-12 Richard Biener <rguenther@suse.de>
8413 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
8416 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8418 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
8419 Update prototype to include "local" argument.
8420 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
8421 "local" argument. Handle local common decls.
8422 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
8423 msp430_output_aligned_decl_common call with 0 for "local" argument.
8424 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
8426 2020-05-12 Richard Biener <rguenther@suse.de>
8428 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
8430 2020-05-12 Martin Liska <mliska@suse.cz>
8434 * sanopt.c (sanitize_rewrite_addressable_params):
8435 Clear DECL_NOT_GIMPLE_REG_P for argument.
8437 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
8439 PR tree-optimization/94980
8440 * tree-vect-generic.c (expand_vector_comparison): Use
8441 vector_element_bits_tree to get the element size in bits,
8442 rather than using TYPE_SIZE.
8443 (expand_vector_condition, vector_element): Likewise.
8445 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
8447 PR tree-optimization/94980
8448 * tree-vect-generic.c (build_replicated_const): Take the number
8449 of bits as a parameter, instead of the type of the elements.
8450 (do_plus_minus): Update accordingly, using vector_element_bits
8451 to calculate the correct number of bits.
8452 (do_negate): Likewise.
8454 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
8456 PR tree-optimization/94980
8457 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
8458 * tree.c (vector_element_bits, vector_element_bits_tree): New.
8459 * match.pd: Use the new functions instead of determining the
8460 vector element size directly from TYPE_SIZE(_UNIT).
8461 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
8462 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
8463 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
8464 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
8465 (expand_vector_conversion): Likewise.
8466 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
8467 a divisor. Convert the dividend to bits to compensate.
8468 * tree-vect-loop.c (vectorizable_live_operation): Call
8469 vector_element_bits instead of open-coding it.
8471 2020-05-12 Jakub Jelinek <jakub@redhat.com>
8473 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
8474 * omp-offload.c: Include context.h.
8475 (omp_declare_target_fn_p, omp_declare_target_var_p,
8476 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
8477 omp_discover_implicit_declare_target): New functions.
8478 * cgraphunit.c (analyze_functions): Call
8479 omp_discover_implicit_declare_target.
8481 2020-05-12 Richard Biener <rguenther@suse.de>
8483 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
8484 literal constant &MEM[..] to a constant literal.
8486 2020-05-12 Richard Biener <rguenther@suse.de>
8488 PR tree-optimization/95045
8489 * dbgcnt.def (lim): Add debug-counter.
8490 * tree-ssa-loop-im.c: Include dbgcnt.h.
8491 (find_refs_for_sm): Use lim debug counter for store motion
8493 (do_store_motion): Rename form store_motion. Commit edge
8495 (store_motion_loop): ... here.
8496 (tree_ssa_lim): Adjust.
8498 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8500 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
8501 (vec_ctzm): Rename to vec_cnttzm.
8502 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
8503 Change fourth operand for vec_ternarylogic to require
8504 compatibility with unsigned SImode rather than unsigned QImode.
8505 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8506 Remove overloaded forms of vec_gnb that are no longer needed.
8507 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8508 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
8509 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
8510 vec_gnb; move vec_ternarylogic documentation into this section
8511 and replace const unsigned char with const unsigned int as its
8514 2020-05-11 Carl Love <cel@us.ibm.com>
8516 * config/rs6000/altivec.h (vec_genpcvm): New #define.
8517 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
8519 (XXGENPCVM_V8HI): Likewise.
8520 (XXGENPCVM_V4SI): Likewise.
8521 (XXGENPCVM_V2DI): Likewise.
8522 (XXGENPCVM): New overloaded built-in instantiation.
8523 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
8524 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
8525 (altivec_expand_builtin): Add special handling for
8526 FUTURE_BUILTIN_VEC_XXGENPCVM.
8527 (builtin_function_type): Add handling for
8528 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
8529 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
8530 (UNSPEC_XXGENPCV): New constant.
8531 (xxgenpcvm_<mode>_internal): New insn.
8532 (xxgenpcvm_<mode>): New expansion.
8533 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
8535 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8537 * config/rs6000/altivec.h (vec_strir): New #define.
8538 (vec_stril): Likewise.
8539 (vec_strir_p): Likewise.
8540 (vec_stril_p): Likewise.
8541 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
8542 (UNSPEC_VSTRIL): Likewise.
8543 (vstrir_<mode>): New expansion.
8544 (vstrir_code_<mode>): New insn.
8545 (vstrir_p_<mode>): New expansion.
8546 (vstrir_p_code_<mode>): New insn.
8547 (vstril_<mode>): New expansion.
8548 (vstril_code_<mode>): New insn.
8549 (vstril_p_<mode>): New expansion.
8550 (vstril_p_code_<mode>): New insn.
8551 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
8552 New built-in function.
8553 (__builtin_altivec_vstrihr): Likewise.
8554 (__builtin_altivec_vstribl): Likewise.
8555 (__builtin_altivec_vstrihl): Likewise.
8556 (__builtin_altivec_vstribr_p): Likewise.
8557 (__builtin_altivec_vstrihr_p): Likewise.
8558 (__builtin_altivec_vstribl_p): Likewise.
8559 (__builtin_altivec_vstrihl_p): Likewise.
8560 (__builtin_vec_strir): New overloaded built-in function.
8561 (__builtin_vec_stril): Likewise.
8562 (__builtin_vec_strir_p): Likewise.
8563 (__builtin_vec_stril_p): Likewise.
8564 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8565 Define overloaded forms of __builtin_vec_strir,
8566 __builtin_vec_stril, __builtin_vec_strir_p, and
8567 __builtin_vec_stril_p.
8568 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8569 for a Future Architecture): Add description of vec_stril,
8570 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
8572 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
8574 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
8575 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
8577 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
8578 * config/rs6000/rs6000-builtin.def: Add handling of new macro
8580 (BU_FUTURE_V_4): New macro. Use it.
8581 (BU_FUTURE_OVERLOAD_4): Likewise.
8582 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
8583 handling for quaternary built-in functions.
8584 (altivec_resolve_overloaded_builtin): Add special-case handling
8585 for __builtin_vec_xxeval.
8586 * config/rs6000/rs6000-call.c: Add handling of new macro
8587 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
8588 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
8589 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
8590 (altivec_overloaded_builtins): Add definitions for
8591 FUTURE_BUILTIN_VEC_XXEVAL.
8592 (bdesc_4arg): New array.
8593 (htm_expand_builtin): Add handling for quaternary built-in
8595 (rs6000_expand_quaternop_builtin): New function.
8596 (rs6000_expand_builtin): Add handling for quaternary built-in
8598 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
8599 for unsigned QImode and unsigned HImode.
8600 (builtin_quaternary_function_type): New function.
8601 (rs6000_common_init_builtins): Add handling of quaternary
8603 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
8605 (RS6000_BTC_PREDICATE): Change value of constant.
8606 (RS6000_BTC_ABS): Likewise.
8607 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
8608 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
8609 for a Future Architecture): Add description of vec_ternarylogic
8612 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8614 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
8616 (__builtin_pextd): Likewise.
8617 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
8618 (UNSPEC_PEXTD): Likewise.
8621 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
8622 a Future Architecture): Add descriptions of __builtin_pdepd and
8623 __builtin_pextd functions.
8625 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8627 * config/rs6000/altivec.h (vec_clrl): New #define.
8628 (vec_clrr): Likewise.
8629 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
8630 (UNSPEC_VCLRRB): Likewise.
8633 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
8635 (__builtin_altivec_vclrrb): Likewise.
8636 (__builtin_vec_clrl): New overloaded built-in function.
8637 (__builtin_vec_clrr): Likewise.
8638 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8639 Define overloaded forms of __builtin_vec_clrl and
8641 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8642 for a Future Architecture): Add descriptions of vec_clrl and
8645 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8647 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
8648 built-in function definition.
8649 (__builtin_cnttzdm): Likewise.
8650 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
8651 (UNSPEC_CNTTZDM): Likewise.
8652 (cntlzdm): New insn.
8653 (cnttzdm): Likewise.
8654 * doc/extend.texi (Basic PowerPC Built-in Functions available for
8655 a Future Architecture): Add descriptions of __builtin_cntlzdm and
8656 __builtin_cnttzdm functions.
8658 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
8661 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
8663 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8665 * config/rs6000/altivec.h (vec_cfuge): New #define.
8666 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
8667 (vcfuged): New insn.
8668 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
8669 New built-in function.
8670 * config/rs6000/rs6000-call.c (builtin_function_type): Add
8671 handling for FUTURE_BUILTIN_VCFUGED case.
8672 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8673 for a Future Architecture): Add description of vec_cfuge built-in
8676 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8678 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
8680 (BU_FUTURE_MISC_1): Likewise.
8681 (BU_FUTURE_MISC_2): Likewise.
8682 (BU_FUTURE_MISC_3): Likewise.
8683 (__builtin_cfuged): New built-in function definition.
8684 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
8686 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
8687 a Future Architecture): New subsubsection.
8689 2020-05-11 Richard Biener <rguenther@suse.de>
8691 PR tree-optimization/95049
8692 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
8693 between different constants.
8695 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
8697 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
8699 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8700 Bill Schmidt <wschmidt@linux.ibm.com>
8702 * config/rs6000/altivec.h (vec_gnb): New #define.
8703 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
8705 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
8707 (BU_FUTURE_OVERLOAD_2): Likewise.
8708 (BU_FUTURE_OVERLOAD_3): Likewise.
8709 (__builtin_altivec_gnb): New built-in function.
8710 (__buiiltin_vec_gnb): New overloaded built-in function.
8711 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8712 Define overloaded forms of __builtin_vec_gnb.
8713 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
8714 of __builtin_vec_gnb.
8715 (builtin_function_type): Mark return value and arguments unsigned
8716 for FUTURE_BUILTIN_VGNB.
8717 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8718 for a Future Architecture): Add description of vec_gnb built-in
8721 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8722 Bill Schmidt <wschmidt@linux.ibm.com>
8724 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
8726 (vec_pext): Likewise.
8727 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
8728 (UNSPEC_VPEXTD): Likewise.
8731 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
8733 (__builtin_altivec_vpextd): Likewise.
8734 * config/rs6000/rs6000-call.c (builtin_function_type): Add
8735 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
8737 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
8738 for a Future Architecture): Add description of vec_pdep and
8739 vec_pext built-in functions.
8741 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8742 Bill Schmidt <wschmidt@linux.ibm.com>
8744 * config/rs6000/altivec.h (vec_clzm): New macro.
8745 (vec_ctzm): Likewise.
8746 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
8747 (UNSPEC_VCTZDM): Likewise.
8750 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
8751 (BU_FUTURE_V_1): Likewise.
8752 (BU_FUTURE_V_2): Likewise.
8753 (BU_FUTURE_V_3): Likewise.
8754 (__builtin_altivec_vclzdm): New builtin definition.
8755 (__builtin_altivec_vctzdm): Likewise.
8756 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
8757 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
8759 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
8760 value and parameter types to be unsigned for VCLZDM and VCTZDM.
8761 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
8762 support for TARGET_FUTURE flag.
8763 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
8764 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
8765 for a Future Architecture): New subsubsection.
8767 2020-05-11 Richard Biener <rguenther@suse.de>
8769 PR tree-optimization/94988
8770 PR tree-optimization/95025
8771 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
8772 (sm_seq_push_down): Take extra parameter denoting where we
8774 (execute_sm_exit): Re-issue sm_other stores in the correct
8776 (sm_seq_valid_bb): When always executed, allow sm_other to
8777 prevail inbetween sm_ord and record their stored value.
8778 (hoist_memory_references): Adjust refs_not_supported propagation
8779 and prune sm_other from the end of the ordered sequences.
8781 2020-05-11 Felix Yang <felix.yang@huawei.com>
8784 * config/aarch64/aarch64.md (mov<mode>):
8785 Bitcasts to the equivalent integer mode using gen_lowpart
8786 instead of doing FAIL for scalar floating point move.
8788 2020-05-11 Alex Coplan <alex.coplan@arm.com>
8790 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
8791 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
8792 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
8793 (*csinv3_uxtw_insn2): New.
8794 (*csinv3_uxtw_insn3): New.
8795 * config/aarch64/iterators.md (neg_not_cs): New.
8797 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
8800 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
8801 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
8802 (*mmx_addv2sf3): Ditto.
8803 (*mmx_subv2sf3): Ditto.
8804 (*mmx_mulv2sf3): Ditto.
8805 (*mmx_<code>v2sf3): Ditto.
8806 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
8808 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
8811 * config/i386/i386.c (ix86_vector_mode_supported_p):
8812 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
8813 * config/i386/mmx.md (*mov<mode>_internal): Do not set
8814 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
8816 (mmx_addv2sf3): Change operand predicates from
8817 nonimmediate_operand to register_mmxmem_operand.
8818 (addv2sf3): New expander.
8819 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
8820 predicates from nonimmediate_operand to register_mmxmem_operand.
8821 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8823 (mmx_subv2sf3): Change operand predicate from
8824 nonimmediate_operand to register_mmxmem_operand.
8825 (mmx_subrv2sf3): Ditto.
8826 (subv2sf3): New expander.
8827 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
8828 predicates from nonimmediate_operand to register_mmxmem_operand.
8829 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8831 (mmx_mulv2sf3): Change operand predicates from
8832 nonimmediate_operand to register_mmxmem_operand.
8833 (mulv2sf3): New expander.
8834 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
8835 predicates from nonimmediate_operand to register_mmxmem_operand.
8836 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8838 (mmx_<code>v2sf3): Change operand predicates from
8839 nonimmediate_operand to register_mmxmem_operand.
8840 (<code>v2sf3): New expander.
8841 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
8842 predicates from nonimmediate_operand to register_mmxmem_operand.
8843 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8844 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
8846 2020-05-11 Martin Liska <mliska@suse.cz>
8849 * common.opt: Fix typo in option description.
8851 2020-05-11 Martin Liska <mliska@suse.cz>
8853 PR gcov-profile/94928
8854 * gcov-io.h: Add caveat about coverage format parsing and
8855 possible outdated documentation.
8857 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
8859 PR tree-optimization/83403
8860 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
8861 determine_value_range, Add fold conversion of MULT_EXPR, fix the
8864 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
8866 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
8867 __ILP32__ for 32-bit targets.
8869 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
8871 * tree.h (expr_align): Delete.
8872 * tree.c (expr_align): Likewise.
8874 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
8876 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
8877 from end_of_function_needs.
8879 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
8880 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
8882 * config/cris/t-elfmulti: Remove crisv32 multilib.
8883 * config/cris: Remove shared-library and CRIS v32 support.
8885 Move trivially from cc0 to reg:CC model, removing most optimizations.
8886 * config/cris/cris.md: Remove all side-effect patterns and their
8887 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
8888 to all but post-reload control-flow and movem insns. Remove
8889 constraints on all modified expanders. Remove obsoleted cc0-related
8891 (attr "cc"): Remove alternative "rev".
8892 (mode_iterator BWDD, DI_, SI_): New.
8893 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
8894 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
8895 ("mstep_shift", "mstep_mul"): Remove patterns.
8896 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
8897 * config/cris/cris.c: Change all non-condition-code,
8898 non-control-flow emitted insns to add a parallel with clobber of
8899 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
8900 emit_insn to use of emit_move_insn, gen_add2_insn or
8901 cris_emit_insn, as convenient.
8902 (cris_reg_overlap_mentioned_p)
8903 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
8904 (cris_movem_load_rest_p): Don't assume all elements in a
8906 (cris_store_multiple_op_p): Ditto.
8907 (cris_emit_insn): New function.
8908 * cris/cris-protos.h (cris_emit_insn): Declare.
8911 * config/cris/cris.md (zcond): New code_iterator.
8912 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
8914 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
8916 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
8918 * config/cris/cris.md ("movsi"): For memory destination
8919 post-reload, generate clobberless variant. Similarly for a
8920 zero-source post-reload.
8921 ("*mov_tomem<mode>_split"): New split.
8922 ("*mov_tomem<mode>"): New insn.
8923 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
8924 "Q>m" for less-than-SImode.
8925 ("*mov_fromzero<mode>_split"): New split.
8926 ("*mov_fromzero<mode>"): New insn.
8928 Prepare for cmpelim pass to eliminate redundant compare insns.
8929 * config/cris/cris-modes.def: New file.
8930 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
8931 (cris_notice_update_cc): Remove left-over declaration.
8932 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
8933 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
8934 * config/cris/cris.h (SELECT_CC_MODE): Define.
8935 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
8937 (cond): New code_iterator.
8938 (nzcond): Replacement for incorrect ncond. All callers changed.
8939 (nzvccond): Replacement for ocond. All callers changed.
8940 (rnzcond): Replacement for rcond. All callers changed.
8941 (xCC): New code_attr.
8942 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
8944 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
8945 CCmode with iteration over NZVCSET.
8946 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
8948 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
8949 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
8950 ("*btst<mode>"): Similarly, from "*btst".
8951 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
8952 iterating over cond instead of matching the comparison with
8953 ordered_comparison_operator.
8954 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
8955 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
8957 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
8958 NZVCUSE. Remove FIXME.
8959 ("*b<nzcond:code>_reversed<mode>"): Similarly from
8960 "*b<ncond:code>_reversed", over NZUSE.
8961 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
8962 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
8963 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
8964 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
8965 depending on CC_NZmode vs. CCmode. Remove FIXME.
8966 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
8967 "*b<rcond:code>_reversed", over NZUSE.
8968 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
8969 iterating over cond instead of matching the comparison with
8970 ordered_comparison_operator.
8971 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
8972 iterating over NZUSE.
8973 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
8974 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
8975 depending on CC_NZmode vs. CCmode.
8976 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
8977 NZVCUSE. Remove FIXME.
8978 ("cc"): Comment on new use.
8979 ("cc_enabled"): New attribute.
8980 ("enabled"): Make default fall back to cc_enabled.
8981 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
8982 default_subst_attrs.
8983 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
8984 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
8985 "*movsi_internal". Correct contents of, and rename attribute
8986 "cc" to "cc<cccc><ccnz><ccnzvc>".
8987 ("anz", "anzvc", "acc"): New define_subst_attrs.
8988 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
8989 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
8990 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
8991 "movqi". Correct contents of, and rename "cc" attribute to
8992 "cc<cccc><ccnz><ccnzvc>".
8993 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
8994 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
8995 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
8996 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
8997 Rename from "extend<mode>si2".
8998 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
8999 Similar, from "zero_extend<mode>si2".
9000 ("*adddi3<setnz>"): Rename from "*adddi3".
9001 ("*subdi3<setnz>"): Similarly from "*subdi3".
9002 ("*addsi3<setnz>"): Similarly from "*addsi3".
9003 ("*subsi3<setnz>"): Similarly from "*subsi3".
9004 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
9005 "cc" attribute to "cc<ccnz>".
9006 ("*addqi3<setnz>"): Similarly from "*addqi3".
9007 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
9008 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
9010 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
9011 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
9012 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
9013 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
9014 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
9015 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
9016 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
9017 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
9019 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
9021 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
9023 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
9025 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
9027 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
9029 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
9030 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
9031 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
9032 (znnCC, rznnCC): New code_attrs.
9033 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
9034 obseolete comment. Add belt-and-suspenders mode-test to condition.
9035 Add fixme regarding remaining matched-but-not-generated case.
9036 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
9037 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
9038 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
9039 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
9040 Handle output of CC_ZnNmode.
9041 ("*b<nzcond:code>_reversed<mode>"): Ditto.
9043 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
9044 NEG too. Correct comment.
9045 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
9048 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
9050 * ira-color.c (update_costs_from_allocno): Remove
9051 conflict_cost_update_p argument. Propagate costs only along
9052 threads. Always do conflict cost update. Add printing debugging
9054 (update_costs_from_copies): Add printing debugging info.
9055 (restore_costs_from_copies): Ditto.
9056 (assign_hard_reg): Improve debug info.
9057 (push_only_colorable): Ditto. Call update_costs_from_prefs.
9058 (color_allocnos): Remove update_costs_from_prefs.
9060 2020-05-08 Richard Biener <rguenther@suse.de>
9062 * tree-vectorizer.h (vec_info::slp_loads): New.
9063 (vect_optimize_slp): Declare.
9064 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
9065 nothing when there are no loads.
9066 (vect_gather_slp_loads): Gather loads into a vector.
9067 (vect_supported_load_permutation_p): Remove.
9068 (vect_analyze_slp_instance): Do not verify permutation
9070 (vect_analyze_slp): Optimize permutations of reductions
9071 after all SLP instances have been gathered and gather
9073 (vect_optimize_slp): New function split out from
9074 vect_supported_load_permutation_p. Elide some permutations.
9075 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
9076 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
9077 * tree-vect-stmts.c (vectorizable_load): Check whether
9078 the load can be permuted. When generating code assert we can.
9080 2020-05-08 Richard Biener <rguenther@suse.de>
9082 * tree-ssa-sccvn.c (rpo_avail): Change type to
9083 eliminate_dom_walker *.
9084 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
9085 use the DOM walker availability.
9086 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
9087 with vn_valueize as valueization callback.
9088 (vn_reference_maybe_forwprop_address): Likewise.
9089 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
9090 array_ref_low_bound.
9092 2020-05-08 Jakub Jelinek <jakub@redhat.com>
9094 PR tree-optimization/94786
9095 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
9099 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
9103 * tree.c (get_narrower): Reuse the op temporary instead of
9106 PR tree-optimization/94783
9107 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
9110 PR tree-optimization/94956
9111 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
9112 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
9114 PR tree-optimization/94913
9115 * match.pd (A - B + -1 >= A to B >= A): New simplification.
9116 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
9117 true for TYPE_UNSIGNED integral types.
9120 PR rtl-optimization/94516
9121 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
9123 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
9124 Call df_notes_rescan if that argument is not true and returning true.
9125 * combine.c (adjust_for_new_dest): Pass true as second argument to
9126 remove_reg_equal_equiv_notes.
9127 * postreload.c (reload_combine_recognize_pattern): Don't call
9130 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
9132 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
9134 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
9135 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
9136 (*neg_ne_<mode>): Likewise.
9138 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
9140 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
9142 (*setbcr_<un>signed_<GPR:mode>): Likewise.
9143 (cstore<mode>4): Use setbc[r] if available.
9144 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
9145 (eq<mode>3): Use setbc for TARGET_FUTURE.
9146 (*eq<mode>3): Avoid for TARGET_FUTURE.
9147 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
9148 else for non-Pmode, use gen_eq and gen_xor.
9149 (*ne<mode>3): Avoid for TARGET_FUTURE.
9150 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
9152 2020-05-07 Jeff Law <law@redhat.com>
9154 * config/h8300/h8300.md: Move expanders and patterns into
9155 files based on functionality.
9156 * config/h8300/addsub.md: New file.
9157 * config/h8300/bitfield.md: New file
9158 * config/h8300/combiner.md: New file
9159 * config/h8300/divmod.md: New file
9160 * config/h8300/extensions.md: New file
9161 * config/h8300/jumpcall.md: New file
9162 * config/h8300/logical.md: New file
9163 * config/h8300/movepush.md: New file
9164 * config/h8300/multiply.md: New file
9165 * config/h8300/other.md: New file
9166 * config/h8300/proepi.md: New file
9167 * config/h8300/shiftrotate.md: New file
9168 * config/h8300/testcompare.md: New file
9170 * config/h8300/h8300.md (adds/subs splitters): Merge into single
9172 (negation expanders and patterns): Simplify and combine using
9174 (one_cmpl expanders and patterns): Likewise.
9175 (tablejump, indirect_jump patterns ): Likewise.
9176 (shift and rotate expanders and patterns): Likewise.
9177 (absolute value expander and pattern): Drop expander, rename pattern
9179 (peephole2 patterns): Move into...
9180 * config/h8300/peepholes.md: New file.
9182 * config/h8300/constraints.md (L and N): Simplify now that we're not
9183 longer supporting the original H8/300 chip.
9184 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
9185 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
9186 (shift_alg_hi, shift_alg_si): Similarly.
9187 (h8300_option_overrides): Similarly. Default to H8/300H. If
9188 compiling for H8/S, then turn off H8/300H. Do not update the
9189 shift_alg tables for H8/300 port.
9190 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
9192 (push, split_adds_subs, h8300_rtx_costs): Likewise.
9193 (h8300_print_operand, compute_mov_length): Likewise.
9194 (output_plussi, compute_plussi_length): Likewise.
9195 (compute_plussi_cc, output_logical_op): Likewise.
9196 (compute_logical_op_length, compute_logical_op_cc): Likewise.
9197 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
9198 (output_a_shift, compute_a_shift_length): Likewise.
9199 (output_a_rotate, compute_a_rotate_length): Likewise.
9200 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
9201 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
9202 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
9203 (attr_cpu, TARGET_H8300): Remove.
9204 (TARGET_DEFAULT): Update.
9205 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
9206 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
9207 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
9208 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
9209 * config/h8300/h8300.md: Simplify patterns throughout.
9210 * config/h8300/t-h8300: Update multilib configuration.
9212 * config/h8300/h8300.h (LINK_SPEC): Remove.
9213 (USER_LABEL_PREFIX): Likewise.
9215 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
9216 (h8300_option_override): Remove remnants of COFF support.
9218 2020-05-07 Alan Modra <amodra@gmail.com>
9220 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
9221 set_rtx_cost with set_src_cost.
9222 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
9224 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
9226 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
9227 redundant half vector handlings for no peeling gaps.
9229 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
9231 * tree-ssa-operands.c (operands_scanner): New class.
9232 (operands_bitmap_obstack): Remove.
9233 (n_initialized): Remove.
9234 (build_uses): Move to operands_scanner class.
9235 (build_vuse): Same as above.
9236 (build_vdef): Same as above.
9237 (verify_ssa_operands): Same as above.
9238 (finalize_ssa_uses): Same as above.
9239 (cleanup_build_arrays): Same as above.
9240 (finalize_ssa_stmt_operands): Same as above.
9241 (start_ssa_stmt_operands): Same as above.
9242 (append_use): Same as above.
9243 (append_vdef): Same as above.
9244 (add_virtual_operand): Same as above.
9245 (add_stmt_operand): Same as above.
9246 (get_mem_ref_operands): Same as above.
9247 (get_tmr_operands): Same as above.
9248 (maybe_add_call_vops): Same as above.
9249 (get_asm_stmt_operands): Same as above.
9250 (get_expr_operands): Same as above.
9251 (parse_ssa_operands): Same as above.
9252 (finalize_ssa_defs): Same as above.
9253 (build_ssa_operands): Same as above, plus create a C-like wrapper.
9254 (update_stmt_operands): Create an instance of operands_scanner.
9256 2020-05-07 Richard Biener <rguenther@suse.de>
9259 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
9260 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
9261 (refered_from_nonlocal_var): Likewise.
9262 (ipa_pta_execute): Likewise.
9264 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
9266 * gcc/tree-ssa-struct-alias.c: Fix comments
9268 2020-05-07 Martin Liska <mliska@suse.cz>
9270 * doc/invoke.texi: Fix 2 optindex entries.
9272 2020-05-07 Richard Biener <rguenther@suse.de>
9275 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
9276 (tree_decl_common::not_gimple_reg_flag): ... to this.
9277 * tree.h (DECL_GIMPLE_REG_P): Rename ...
9278 (DECL_NOT_GIMPLE_REG_P): ... to this.
9279 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
9280 (create_tmp_reg): Simplify.
9281 (create_tmp_reg_fn): Likewise.
9282 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
9283 * gimplify.c (create_tmp_from_val): Simplify.
9284 (gimplify_bind_expr): Likewise.
9285 (gimplify_compound_literal_expr): Likewise.
9286 (gimplify_function_tree): Likewise.
9287 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
9288 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
9289 (asan_add_global): Copy it.
9290 * cgraphunit.c (cgraph_node::expand_thunk): Force args
9292 * function.c (gimplify_parameters): Copy
9293 DECL_NOT_GIMPLE_REG_P.
9294 * ipa-param-manipulation.c
9295 (ipa_param_body_adjustments::common_initialization): Simplify.
9296 (ipa_param_body_adjustments::reset_debug_stmts): Copy
9297 DECL_NOT_GIMPLE_REG_P.
9298 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
9299 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
9300 * tree-cfg.c (make_blocks_1): Simplify.
9301 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
9302 * tree-eh.c (lower_eh_constructs_2): Simplify.
9303 * tree-inline.c (declare_return_variable): Adjust and
9305 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
9306 (copy_result_decl_to_var): Likewise.
9307 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
9308 * tree-nested.c (create_tmp_var_for): Simplify.
9309 * tree-parloops.c (separate_decls_in_region_name): Copy
9310 DECL_NOT_GIMPLE_REG_P.
9311 * tree-sra.c (create_access_replacement): Adjust and
9312 generalize partial def support.
9313 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
9314 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
9315 * tree-ssa.c (maybe_optimize_var): Handle clearing of
9316 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
9318 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
9319 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
9320 DECL_NOT_GIMPLE_REG_P.
9321 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
9322 * cfgexpand.c (avoid_type_punning_on_regs): New.
9323 (discover_nonconstant_array_refs): Call
9324 avoid_type_punning_on_regs to avoid unsupported mode punning.
9326 2020-05-07 Alex Coplan <alex.coplan@arm.com>
9328 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
9331 2020-05-07 Richard Biener <rguenther@suse.de>
9333 PR tree-optimization/57359
9334 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
9335 (in_mem_ref::dep_loop): Repurpose.
9336 (LOOP_DEP_BIT): Remove.
9337 (enum dep_kind): New.
9338 (enum dep_state): Likewise.
9339 (record_loop_dependence): New function to populate the
9341 (query_loop_dependence): New function to query the dependence
9343 (memory_accesses::refs_in_loop): Rename to ...
9344 (memory_accesses::refs_loaded_in_loop): ... this and change to
9346 (outermost_indep_loop): Adjust.
9347 (mem_ref_alloc): Likewise.
9348 (gather_mem_refs_stmt): Likewise.
9349 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
9350 (struct sm_aux): New.
9351 (execute_sm): Split code generation on exits, record state
9353 (enum sm_kind): New.
9354 (execute_sm_exit): Exit code generation part.
9355 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
9356 dependence checking on stores reached from exits.
9357 (sm_seq_valid_bb): New function gathering SM stores on exits.
9358 (hoist_memory_references): Re-implement.
9359 (refs_independent_p): Add tbaa_p parameter and pass it down.
9360 (record_dep_loop): Remove.
9361 (ref_indep_loop_p_1): Fold into ...
9362 (ref_indep_loop_p): ... this and generalize for three kinds
9363 of dependence queries.
9364 (can_sm_ref_p): Adjust according to hoist_memory_references
9366 (store_motion_loop): Don't do anything if the set of SM
9367 candidates is empty.
9368 (tree_ssa_lim_initialize): Adjust.
9369 (tree_ssa_lim_finalize): Likewise.
9371 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
9372 Pierre-Marie de Rodat <derodat@adacore.com>
9374 * dwarf2out.c (add_data_member_location_attribute): Take into account
9375 the variant part offset in the computation of the data bit offset.
9376 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
9377 in the call to field_byte_offset.
9378 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
9379 confusing assertion.
9380 (analyze_variant_discr): Deal with boolean subtypes.
9382 2020-05-07 Martin Liska <mliska@suse.cz>
9384 * lto-wrapper.c: Split arguments of MAKE environment
9387 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
9389 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
9390 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
9391 fenv_var and new_fenv_var.
9393 2020-05-06 Jakub Jelinek <jakub@redhat.com>
9396 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
9398 (avx512dq_vextract<shuffletype>64x2_1_maskm,
9399 avx512f_vextract<shuffletype>32x4_1_maskm,
9400 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
9401 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
9403 (*avx512dq_vextract<shuffletype>64x2_1,
9404 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
9405 define_insns. Even in the masked variant allow memory output but in
9406 that case use 0 rather than 0C constraint on the source of masked-out
9408 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
9410 (*avx512f_vextract<shuffletype>32x4_1,
9411 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
9412 Even in the masked variant allow memory output but in that case use
9413 0 rather than 0C constraint on the source of masked-out elts.
9414 (vec_extract_lo_<mode><mask_name>): Split into ...
9415 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
9416 define_insns. Even in the masked variant allow memory output but in
9417 that case use 0 rather than 0C constraint on the source of masked-out
9419 (vec_extract_hi_<mode><mask_name>): Split into ...
9420 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
9421 define_insns. Even in the masked variant allow memory output but in
9422 that case use 0 rather than 0C constraint on the source of masked-out
9425 2020-05-06 qing zhao <qing.zhao@oracle.com>
9428 * common.opt: Add -flarge-source-files.
9429 * doc/invoke.texi: Document it.
9430 * toplev.c (process_options): set line_table->default_range_bits
9431 to 0 when flag_large_source_files is true.
9433 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
9436 * config/i386/predicates.md (add_comparison_operator): New predicate.
9437 * config/i386/i386.md (compare->add splitter): New splitters.
9439 2020-05-06 Richard Biener <rguenther@suse.de>
9441 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
9442 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
9443 Remove slp_instance parameter, just iterate over all scalar stmts.
9444 (vect_slp_analyze_instance_dependence): Adjust and likewise.
9445 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
9447 (vect_schedule_slp): Just iterate over all scalar stmts.
9448 (vect_supported_load_permutation_p): Adjust.
9449 (vect_transform_slp_perm_load): Remove slp_instance parameter,
9450 instead use the number of lanes in the node as group size.
9451 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
9452 factor instead of slp_instance as parameter.
9453 (vectorizable_load): Adjust.
9455 2020-05-06 Andreas Schwab <schwab@suse.de>
9457 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
9458 (aarch64_get_extension_string_for_isa_flags): Don't declare.
9460 2020-05-06 Richard Biener <rguenther@suse.de>
9463 * cfgloopmanip.c (create_preheader): Require non-complex
9464 preheader edge for CP_SIMPLE_PREHEADERS.
9466 2020-05-06 Richard Biener <rguenther@suse.de>
9468 PR tree-optimization/94963
9469 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
9470 no-warning marking of the conditional store.
9471 (execute_sm): Instead mark the uninitialized state
9472 on loop entry to be not warned about.
9474 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
9476 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
9477 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
9478 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
9479 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
9481 * config/i386/i386-builtin.def: Add new builtins.
9482 * config/i386/i386-c.c (ix86_target_macros_internal): Define
9484 * config/i386/i386-options.c (ix86_target_string): Add
9486 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
9487 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
9489 * config/i386/i386.md (define_c_enum "unspec"): Add
9490 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
9491 (TSXLDTRK): New define_int_iterator.
9492 ("<tsxldtrk>"): New define_insn.
9493 * config/i386/i386.opt: Add -mtsxldtrk.
9494 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
9495 * config/i386/tsxldtrkintrin.h: New.
9496 * doc/invoke.texi: Document -mtsxldtrk.
9498 2020-05-06 Jakub Jelinek <jakub@redhat.com>
9500 PR tree-optimization/94921
9501 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
9504 2020-05-06 Richard Biener <rguenther@suse.de>
9506 PR tree-optimization/94965
9507 * tree-vect-stmts.c (vectorizable_load): Fix typo.
9509 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
9511 * doc/install.texi: Replace Sun with Solaris as appropriate.
9512 (Tools/packages necessary for building GCC, Perl version between
9513 5.6.1 and 5.6.24): Remove Solaris 8 reference.
9514 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
9516 (Specific, i?86-*-solaris2*): Update version references for
9517 Solaris 11.3 and later. Remove gas 2.26 caveat.
9518 (Specific, *-*-solaris2*): Update version references for
9519 Solaris 11.3 and later. Remove boehm-gc reference.
9520 Document GMP, MPFR caveats on Solaris 11.3.
9521 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
9522 (Specific, sparc64-*-solaris2*): Likewise.
9523 Document --build requirement.
9525 2020-05-06 Jakub Jelinek <jakub@redhat.com>
9528 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
9529 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
9531 PR rtl-optimization/94873
9532 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
9533 note if SET_SRC (set) has side-effects.
9535 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
9536 Wei Xiao <wei3.xiao@intel.com>
9538 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
9539 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
9540 (ix86_handle_option): Handle -mserialize.
9541 * config.gcc (serializeintrin.h): New header file.
9542 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
9543 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
9545 * config/i386/i386-builtin.def: Add new builtin.
9546 * config/i386/i386-c.c (__SERIALIZE__): New macro.
9547 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
9549 * (ix86_valid_target_attribute_inner_p): Add target attribute
9551 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
9553 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
9554 (serialize): New define_insn.
9555 * config/i386/i386.opt (mserialize): New option
9556 * config/i386/immintrin.h: Include serailizeintrin.h.
9557 * config/i386/serializeintrin.h: New header file.
9558 * doc/invoke.texi: Add documents for -mserialize.
9560 2020-05-06 Richard Biener <rguenther@suse.de>
9562 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
9563 to/from pointer conversion checking.
9565 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
9567 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
9569 * config/rs6000/rs6000-c.c: Likewise.
9570 * config/rs6000/rs6000-call.c: Likewise.
9571 * config/rs6000/rs6000.c: Likewise.
9573 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
9575 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
9576 (RTEMS_ENDFILE_SPEC): Likewise.
9577 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
9578 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
9579 (LIB_SPECS): Support -nodefaultlibs option.
9580 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
9581 (RTEMS_ENDFILE_SPEC): Likewise.
9582 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
9583 (RTEMS_ENDFILE_SPEC): Likewise.
9584 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
9585 (RTEMS_ENDFILE_SPEC): Likewise.
9587 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9589 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
9590 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
9592 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9594 * config/pru/pru.h: Mark R3.w0 as caller saved.
9596 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9598 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
9599 and gen_doloop_begin_internal.
9600 (pru_reorg_loop): Use gen_pruloop with mode.
9601 * config/pru/pru.md: Use new @insn syntax.
9603 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9605 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
9607 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
9609 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
9610 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
9611 (addqi3_cconly_overflow): Ditto.
9612 (umulv<mode>4): Ditto.
9613 (<s>mul<mode>3_highpart): Ditto.
9614 (tls_global_dynamic_32): Ditto.
9615 (tls_local_dynamic_base_32): Ditto.
9622 (*adddi_4): Remove "m" constraint from scratch operand.
9623 (*add<mode>_4): Ditto.
9625 2020-05-05 Jakub Jelinek <jakub@redhat.com>
9627 PR rtl-optimization/94516
9628 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
9629 with sp = reg, add REG_EQUAL note with sp + const.
9630 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
9631 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
9632 postreload sp = sp + const to sp = reg optimization if needed and
9634 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
9635 reg = sp insn with sp + const REG_EQUAL note. Adjust
9636 try_apply_stack_adjustment caller, call
9637 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
9638 (combine_stack_adjustments): Allocate and free LIVE bitmap,
9639 adjust combine_stack_adjustments_for_block caller.
9641 2020-05-05 Martin Liska <mliska@suse.cz>
9643 PR gcov-profile/93623
9644 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
9647 2020-05-05 Martin Liska <mliska@suse.cz>
9649 * opt-functions.awk (opt_args_non_empty): New function.
9650 * opt-read.awk: Use the function for various option arguments.
9652 2020-05-05 Martin Liska <mliska@suse.cz>
9655 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
9656 report warning when the jobserver is not detected.
9658 2020-05-05 Martin Liska <mliska@suse.cz>
9660 PR gcov-profile/94636
9661 * gcov.c (main): Print total lines summary at the end.
9662 (generate_results): Expect file_name always being non-null.
9663 Print newline after intermediate file is printed in order to align with
9664 what we do for normal files.
9666 2020-05-05 Martin Liska <mliska@suse.cz>
9668 * dumpfile.c (dump_switch_p): Change return type
9669 and print option suggestion.
9670 * dumpfile.h: Change return type.
9671 * opts-global.c (handle_common_deferred_options):
9672 Move error into dump_switch_p function.
9674 2020-05-05 Martin Liska <mliska@suse.cz>
9677 * alloc-pool.h: Use const for some arguments.
9678 * bitmap.h: Likewise.
9679 * mem-stats.h: Likewise.
9680 * sese.h (get_entry_bb): Likewise.
9681 (get_exit_bb): Likewise.
9683 2020-05-05 Richard Biener <rguenther@suse.de>
9685 * tree-vect-slp.c (struct vdhs_data): New.
9686 (vect_detect_hybrid_slp): New walker.
9687 (vect_detect_hybrid_slp): Rewrite.
9689 2020-05-05 Richard Biener <rguenther@suse.de>
9692 * tree-ssa-structalias.c (ipa_pta_execute): Use
9693 varpool_node::externally_visible_p ().
9694 (refered_from_nonlocal_var): Likewise.
9696 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
9698 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
9699 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
9700 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
9702 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
9704 * gimplify.c (gimplify_init_constructor): Do not put the constructor
9705 into static memory if it is not complete.
9707 2020-05-05 Richard Biener <rguenther@suse.de>
9709 PR tree-optimization/94949
9710 * tree-ssa-loop-im.c (execute_sm): Check whether we use
9711 the multithreaded model or always compute the stored value
9712 before eliding a load.
9714 2020-05-05 Alex Coplan <alex.coplan@arm.com>
9716 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
9718 2020-05-05 Jakub Jelinek <jakub@redhat.com>
9720 PR tree-optimization/94800
9721 * match.pd (X + (X << C) to X * (1 + (1 << C)),
9722 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
9726 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
9728 PR tree-optimization/94914
9729 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
9732 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
9734 * config/i386/i386.md (*testqi_ext_3): Use
9735 int_nonimmediate_operand instead of manual mode checks.
9736 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
9737 Use int_nonimmediate_operand predicate. Rewrite
9738 define_insn_and_split pattern to a combine pass splitter.
9740 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
9742 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
9743 * configure: Regenerate.
9745 2020-05-05 Jakub Jelinek <jakub@redhat.com>
9748 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
9749 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
9750 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
9751 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
9753 2020-05-04 Clement Chigot <clement.chigot@atos.net>
9754 David Edelsohn <dje.gcc@gmail.com>
9756 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
9757 for fmodl, frexpl, ldexpl and modfl builtins.
9759 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
9762 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
9763 chosen lhs is different from the gcall lhs.
9764 (expand_mask_load_optab_fn): Likewise.
9765 (expand_gather_load_optab_fn): Likewise.
9767 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
9770 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
9771 (EQ compare->LTU compare splitter): New splitter.
9772 (NE compare->NEG splitter): Ditto.
9774 2020-05-04 Marek Polacek <polacek@redhat.com>
9777 2020-04-30 Marek Polacek <polacek@redhat.com>
9780 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
9781 (check_aligned_type): Check if TYPE_USER_ALIGN match.
9783 2020-05-04 Richard Biener <rguenther@suse.de>
9785 PR tree-optimization/93891
9786 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
9787 the original reference tree for assessing access alignment.
9789 2020-05-04 Richard Biener <rguenther@suse.de>
9791 PR tree-optimization/39612
9792 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
9793 (set_ref_loaded_in_loop): New.
9794 (mark_ref_loaded): Likewise.
9795 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
9796 (execute_sm): Avoid issueing a load when it was not there.
9797 (execute_sm_if_changed): Avoid issueing warnings for the
9800 2020-05-04 Martin Jambor <mjambor@suse.cz>
9803 * tree-inline.c (tree_function_versioning): Leave any type conversion
9804 of replacements to setup_one_parameter and its friend
9805 force_value_to_type.
9807 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
9810 * config/i386/predicates.md (shr_comparison_operator): New predicate.
9811 * config/i386/i386.md (compare->shr splitter): New splitters.
9813 2020-05-04 Jakub Jelinek <jakub@redhat.com>
9815 PR tree-optimization/94718
9816 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
9818 PR tree-optimization/94718
9819 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
9820 replace two nop conversions on bit_{and,ior,xor} argument
9821 and result with just one conversion on the result or another argument.
9823 PR tree-optimization/94718
9824 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
9825 -> (X ^ Y) & C eqne 0 optimization to ...
9826 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
9828 * opts.c (get_option_html_page): Instead of hardcoding a list of
9829 options common between C/C++ and Fortran only use gfortran/
9830 documentation for warnings that have CL_Fortran set but not
9833 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
9835 * config/i386/i386-expand.c (ix86_expand_int_movcc):
9836 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
9837 (emit_memmov): Ditto.
9838 (emit_memset): Ditto.
9839 (ix86_expand_strlensi_unroll_1): Ditto.
9840 (release_scratch_register_on_entry): Ditto.
9841 (gen_frame_set): Ditto.
9842 (ix86_emit_restore_reg_using_pop): Ditto.
9843 (ix86_emit_outlined_ms2sysv_restore): Ditto.
9844 (ix86_expand_epilogue): Ditto.
9845 (ix86_expand_split_stack_prologue): Ditto.
9846 * config/i386/i386.md (push immediate splitter): Ditto.
9850 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
9852 PR translation/93861
9853 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
9856 2020-05-02 Jakub Jelinek <jakub@redhat.com>
9858 * config/tilegx/tilegx.md
9859 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
9860 rather than just <n>.
9862 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
9865 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
9866 and crtl->patch_area_entry.
9867 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
9868 * opts.c (common_handle_option): Limit
9869 function_entry_patch_area_size and function_entry_patch_area_start
9870 to USHRT_MAX. Fix a typo in error message.
9871 * varasm.c (assemble_start_function): Use crtl->patch_area_size
9872 and crtl->patch_area_entry.
9873 * doc/invoke.texi: Document the maximum value for
9874 -fpatchable-function-entry.
9876 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
9878 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
9879 Override SUBTARGET_SHADOW_OFFSET macro.
9881 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
9883 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
9884 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
9885 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
9886 * config/i386/freebsd.h: Likewise.
9887 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
9888 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
9890 2020-04-30 Alexandre Oliva <oliva@adacore.com>
9892 * doc/sourcebuild.texi (Effective-Target Keywords): Document
9893 the newly-introduced fileio effective target.
9895 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
9897 PR rtl-optimization/94740
9898 * cse.c (cse_process_notes_1): Replace with...
9899 (cse_process_note_1): ...this new function, acting as a
9900 simplify_replace_fn_rtx callback to process_note. Handle only
9901 REGs and MEMs directly. Validate the MEM if cse_process_note
9902 changes its address.
9903 (cse_process_notes): Replace with...
9904 (cse_process_note): ...this new function.
9905 (cse_extended_basic_block): Update accordingly, iterating over
9906 the register notes and passing individual notes to cse_process_note.
9908 2020-04-30 Carl Love <cel@us.ibm.com>
9910 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
9912 2020-04-30 Martin Jambor <mjambor@suse.cz>
9915 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
9916 saved by the inliner and thunks which had their call inlined.
9917 * ipa-inline-transform.c (save_inline_function_body): Fill in
9918 former_clone_of of new body holders.
9920 2020-04-30 Jakub Jelinek <jakub@redhat.com>
9922 * BASE-VER: Set to 11.0.0.
9924 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
9926 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
9928 2020-04-30 Marek Polacek <polacek@redhat.com>
9931 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
9932 (check_aligned_type): Check if TYPE_USER_ALIGN match.
9934 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9936 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
9937 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
9938 * doc/invoke.texi (moutline-atomics): Document as on by default.
9940 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
9943 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
9944 the check for NOTE_INSN_DELETED_LABEL.
9946 2020-04-30 Jakub Jelinek <jakub@redhat.com>
9948 * configure.ac (--with-documentation-root-url,
9949 --with-changes-root-url): Diagnose URL not ending with /,
9950 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
9951 * opts.h (get_changes_url): Remove.
9952 * opts.c (get_changes_url): Remove.
9953 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
9954 or -DCHANGES_ROOT_URL.
9955 * doc/install.texi (--with-documentation-root-url,
9956 --with-changes-root-url): Document.
9957 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
9958 get_changes_url and free, change url variable type to const char * and
9959 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
9960 * config/s390/s390.c (s390_function_arg_vector,
9961 s390_function_arg_float): Likewise.
9962 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
9964 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
9966 * config.in: Regenerate.
9967 * configure: Regenerate.
9969 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
9972 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
9974 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
9976 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
9977 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
9979 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
9981 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
9982 Change constraint for vlrl/vstrl to jb4.
9984 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9986 * var-tracking.c (vt_initialize): Move variables pre and post
9987 into inner block and initialize both in order to fix warning
9988 about uninitialized use. Remove unnecessary checks for
9989 frame_pointer_needed.
9991 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9993 * toplev.c (output_stack_usage_1): Ensure that first
9994 argument to fprintf is not null.
9996 2020-04-29 Jakub Jelinek <jakub@redhat.com>
9998 * configure.ac (-with-changes-root-url): New configure option,
9999 defaulting to https://gcc.gnu.org/.
10000 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
10002 * pretty-print.c (get_end_url_string): New function.
10003 (pp_format): Handle %{ and %} for URLs.
10004 (pp_begin_url): Use pp_string instead of pp_printf.
10005 (pp_end_url): Use get_end_url_string.
10006 * opts.h (get_changes_url): Declare.
10007 * opts.c (get_changes_url): New function.
10008 * config/rs6000/rs6000-call.c: Include opts.h.
10009 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
10010 of just in GCC 10.1 in diagnostics and add URL.
10011 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
10012 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
10014 * config/s390/s390.c (s390_function_arg_vector,
10015 s390_function_arg_float): Likewise.
10016 * configure: Regenerated.
10019 * config/s390/s390.c (s390_function_arg_vector,
10020 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
10021 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
10022 passed to the function rather than the type of the single element.
10023 Rename cxx17_empty_base_seen variable to empty_base_seen, change
10024 type to int, and adjust diagnostics depending on if the field
10025 has [[no_unique_attribute]] or not.
10028 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
10029 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
10030 used in casts into parens.
10031 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
10032 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
10033 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
10034 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
10035 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
10036 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
10037 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
10038 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
10039 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
10040 _mm256_mask_cmp_epu8_mask): Likewise.
10041 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
10042 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
10043 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
10044 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
10047 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
10048 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
10049 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
10050 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
10051 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
10052 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
10053 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
10054 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
10055 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
10056 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
10057 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
10058 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
10059 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
10061 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
10062 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
10063 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
10064 as mask vector containing -1.0 or -1.0f elts, but instead vector
10065 with all bits set using _mm*_cmpeq_p? with zero operands.
10066 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
10067 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
10068 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
10069 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
10070 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
10071 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
10072 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
10073 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
10074 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
10075 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
10076 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
10077 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
10078 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
10079 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
10080 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
10081 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
10082 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
10084 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
10085 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
10086 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
10087 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
10088 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
10089 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
10090 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
10091 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
10092 _mm512_mask_prefetch_i64scatter_ps): Likewise.
10093 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
10094 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
10095 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
10096 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
10097 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
10098 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
10099 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
10100 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
10101 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
10102 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
10103 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
10104 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
10105 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
10106 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
10107 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
10108 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
10109 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
10110 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
10111 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
10112 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
10113 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
10114 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
10115 _mm_mask_i64scatter_epi64): Likewise.
10117 2020-04-29 Jeff Law <law@redhat.com>
10119 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
10120 division instructions are 4 bytes long.
10122 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10125 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
10126 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
10127 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
10128 take address of TARGET_EXPR of fenv_var with void_node initializer.
10131 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10133 PR tree-optimization/94774
10134 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
10137 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10139 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
10140 * calls.c (cxx17_empty_base_field_p): New function. Check
10141 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
10144 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
10147 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
10148 Allow -fcf-protection with -mindirect-branch=thunk-extern and
10149 -mfunction-return=thunk-extern.
10150 * doc/invoke.texi: Update notes for -fcf-protection=branch with
10151 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
10153 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10155 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
10157 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10159 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
10160 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
10161 fenv_var and new_fenv_var.
10163 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10165 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
10166 effective-target keyword.
10167 (arm_arch_v8a_hard_multilib): Likewise.
10168 (arm_arch_v8a_hard): Document new dg-add-options keyword.
10169 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
10170 code is deprecated and has not been updated to handle
10171 DECL_FIELD_ABI_IGNORED.
10172 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
10173 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
10174 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
10175 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
10176 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
10177 something actually is a HFA or HVA. Record whether we see a
10178 [[no_unique_address]] field that previous GCCs would not have
10179 ignored in this way.
10180 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
10181 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
10182 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
10183 diagnostic messages.
10184 (arm_needs_doubleword_align): Add a comment explaining why we
10185 consider even zero-sized fields.
10187 2020-04-29 Richard Biener <rguenther@suse.de>
10188 Li Zekun <lizekun1@huawei.com>
10191 * tree.c (component_ref_size): Guard against error_mark_node
10192 DECL_INITIAL as it happens with LTO.
10194 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10196 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
10197 comment explaining why we consider even zero-sized fields.
10198 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
10199 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
10200 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
10201 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
10202 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
10203 something actually is a HFA or HVA. Record whether we see a
10204 [[no_unique_address]] field that previous GCCs would not have
10205 ignored in this way.
10206 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
10207 whether diagnostics should be suppressed. Update the calls to
10208 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
10209 [[no_unique_address]] case.
10210 (aarch64_return_in_msb): Update call accordingly, never silencing
10212 (aarch64_function_value): Likewise.
10213 (aarch64_return_in_memory_1): Likewise.
10214 (aarch64_init_cumulative_args): Likewise.
10215 (aarch64_gimplify_va_arg_expr): Likewise.
10216 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
10217 use it to decide whether arch64_vfp_is_call_or_return_candidate
10219 (aarch64_pass_by_reference): Update calls accordingly.
10220 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
10221 to decide whether arch64_vfp_is_call_or_return_candidate should be
10224 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
10227 * config/aarch64/aarch64-builtins.c
10228 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
10229 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
10232 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
10234 * configure.ac <$enable_offload_targets>: Do parsing as done
10236 * configure: Regenerate.
10238 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
10239 * configure: Regenerate.
10242 * rtlanal.c (set_noop_p): Handle non-constant selectors.
10245 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
10247 (TARGET_EXCEPT_UNWIND_INFO): Define.
10249 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10252 * config/gcn/gcn.md (*mov<mode>_insn): Use
10253 'reg_overlap_mentioned_p' to check for overlap.
10256 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
10257 instead of cxx17_empty_base_field_p.
10260 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
10261 DECL_FIELD_ABI_IGNORED.
10262 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
10263 * calls.h (cxx17_empty_base_field_p): Change into a temporary
10264 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
10266 * calls.c (cxx17_empty_base_field_p): Remove.
10267 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
10268 DECL_FIELD_ABI_IGNORED.
10269 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
10270 * lto-streamer-out.c (hash_tree): Likewise.
10271 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
10272 cxx17_empty_base_seen to empty_base_seen, change type to int *,
10273 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
10274 cxx17_empty_base_field_p, if "no_unique_address" attribute is
10275 present, propagate that to the caller too.
10276 (rs6000_discover_homogeneous_aggregate): Adjust
10277 rs6000_aggregate_candidate caller, emit different diagnostics
10278 when c++17 empty base fields are present and when empty
10279 [[no_unique_address]] fields are present.
10280 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
10281 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
10284 2020-04-29 Richard Biener <rguenther@suse.de>
10286 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
10287 Just check whether the stmt stores.
10289 2020-04-28 Alexandre Oliva <oliva@adacore.com>
10292 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
10293 output operand in emulation. Don't overwrite pseudos.
10295 2020-04-28 Jeff Law <law@redhat.com>
10297 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
10298 multiply patterns are 4 bytes long.
10300 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10302 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
10303 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
10305 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
10306 Jakub Jelinek <jakub@redhat.com>
10309 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
10310 base class artificial fields.
10311 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
10312 decision is different after this fix.
10314 2020-04-28 David Malcolm <dmalcolm@redhat.com>
10320 * doc/invoke.texi (Static Analyzer Options): Remove
10321 -Wanalyzer-use-of-uninitialized-value.
10322 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
10324 2020-04-28 Jakub Jelinek <jakub@redhat.com>
10326 PR tree-optimization/94809
10327 * tree.c (build_call_expr_internal_loc_array): Call
10328 process_call_operands.
10330 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
10332 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
10333 * config/aarch64/aarch64-tune.md: Regenerate.
10334 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
10335 (thunderx3t110_regmove_cost): Likewise.
10336 (thunderx3t110_vector_cost): Likewise.
10337 (thunderx3t110_prefetch_tune): Likewise.
10338 (thunderx3t110_tunings): Likewise.
10339 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
10341 * config/aarch64/thunderx3t110.md: New file.
10342 * config/aarch64/aarch64.md: Include thunderx3t110.md.
10343 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
10345 2020-04-28 Jakub Jelinek <jakub@redhat.com>
10348 * config/s390/s390.c (s390_function_arg_vector,
10349 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
10351 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
10353 PR tree-optimization/94727
10354 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
10355 operands are invariant booleans, use the mask type associated with the
10356 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
10357 (vectorizable_condition): Pass vectype unconditionally to
10358 vect_is_simple_cond.
10360 2020-04-27 Jakub Jelinek <jakub@redhat.com>
10363 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
10364 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
10365 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
10367 2020-04-27 David Malcolm <dmalcolm@redhat.com>
10370 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
10371 default value, so that it can by supplied by get_option_html_page.
10372 * configure: Regenerate.
10373 * opts.c: Include "selftest.h".
10374 (get_option_html_page): New function.
10375 (get_option_url): Use it. Reformat to place comments next to the
10376 expressions they refer to.
10377 (selftest::test_get_option_html_page): New.
10378 (selftest::opts_c_tests): New.
10379 * selftest-run-tests.c (selftest::run_tests): Call
10380 selftest::opts_c_tests.
10381 * selftest.h (selftest::opts_c_tests): New decl.
10383 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
10385 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
10386 UINTVAL to CONST_INTs.
10388 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10390 * config/arm/constraints.md (e): Remove constraint.
10391 (Te): Define constraint.
10392 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
10393 operand 0 from "e" to "Te".
10394 (vaddvaq_<supf><mode>): Likewise.
10395 (vaddvq_p_<supf><mode>): Likewise.
10396 (vmladavq_<supf><mode>): Likewise.
10397 (vmladavxq_s<mode>): Likewise.
10398 (vmlsdavq_s<mode>): Likewise.
10399 (vmlsdavxq_s<mode>): Likewise.
10400 (vaddvaq_p_<supf><mode>): Likewise.
10401 (vmladavaq_<supf><mode>): Likewise.
10402 (vmladavq_p_<supf><mode>): Likewise.
10403 (vmladavxq_p_s<mode>): Likewise.
10404 (vmlsdavq_p_s<mode>): Likewise.
10405 (vmlsdavxq_p_s<mode>): Likewise.
10406 (vmlsdavaxq_s<mode>): Likewise.
10407 (vmlsdavaq_s<mode>): Likewise.
10408 (vmladavaxq_s<mode>): Likewise.
10409 (vmladavaq_p_<supf><mode>): Likewise.
10410 (vmladavaxq_p_s<mode>): Likewise.
10411 (vmlsdavaq_p_s<mode>): Likewise.
10412 (vmlsdavaxq_p_s<mode>): Likewise.
10414 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
10416 * config/arm/arm.c (output_move_neon): Only get the first operand if
10419 2020-04-27 Felix Yang <felix.yang@huawei.com>
10421 PR tree-optimization/94784
10422 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
10423 assert around so that it checks that the two vectors have equal
10424 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
10425 types is a useless_type_conversion_p.
10427 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
10430 * dwarf2cfi.c (struct GTY): Add ra_mangled.
10431 (cfi_row_equal_p): Check ra_mangled.
10432 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
10433 this only handles the sparc logic now.
10434 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
10435 the aarch64 specific logic.
10436 (dwarf2out_frame_debug): Update to use the new subroutines.
10437 (change_cfi_row): Check ra_mangled.
10439 2020-04-27 Jakub Jelinek <jakub@redhat.com>
10442 * config/s390/s390.c (s390_function_arg_vector,
10443 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
10445 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
10447 * common/config/rs6000/rs6000-common.c
10448 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
10450 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
10453 2020-04-27 Martin Liska <mliska@suse.cz>
10456 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
10457 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
10459 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
10462 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
10464 (rs6000_emit_prologue_components):
10465 Check with frame_pointer_needed_indeed.
10466 (rs6000_emit_epilogue_components): Likewise.
10467 (rs6000_emit_prologue): Likewise.
10468 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
10470 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
10472 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
10473 stack frame when debugging and flag_compare_debug is enabled.
10475 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
10477 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
10478 enable PC-relative addressing for -mcpu=future.
10479 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
10480 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
10481 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
10482 suppress PC-relative addressing.
10483 (rs6000_option_override_internal): Split up error messages
10484 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
10485 system supports it.
10487 2020-04-25 Jakub Jelinek <jakub@redhat.com>
10488 Richard Biener <rguenther@suse.de>
10490 PR tree-optimization/94734
10491 PR tree-optimization/89430
10492 * tree-ssa-phiopt.c: Include tree-eh.h.
10493 (cond_store_replacement): Return false if an automatic variable
10494 access could trap. If -fstore-data-races, don't return false
10495 just because an automatic variable is addressable.
10497 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
10499 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
10501 (add<mode>_sext_dup2_exec): Likewise.
10503 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
10506 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
10507 endian byteshift_val calculation.
10509 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
10511 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
10513 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
10515 * config/aarch64/arm_sve.h: Add a comment.
10517 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
10519 PR rtl-optimization/94708
10520 * combine.c (simplify_if_then_else): Add check for
10521 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
10523 2020-04-23 Martin Sebor <msebor@redhat.com>
10526 * common.opt (-Wno-frame-larger-than): New option.
10527 (-Wno-larger-than, -Wno-stack-usage): Same.
10529 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
10531 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
10533 (mov<mode>_exec): Likewise.
10534 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
10535 (<convop><mode><vndi>2_exec): Likewise.
10537 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
10539 PR tree-optimization/94717
10540 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
10541 of the stores doesn't have the same landing pad number as the first.
10542 (coalesce_immediate_stores): Do not try to coalesce the store using
10543 bswap if it doesn't have the same landing pad number as the first.
10545 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
10547 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
10548 Replace outdated link to ELFv2 ABI.
10550 2020-04-23 Jakub Jelinek <jakub@redhat.com>
10553 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
10556 PR middle-end/94724
10557 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
10558 temporarily with non-final second operand and updating it later,
10559 push COMPOUND_EXPRs into a vector and process it in reverse,
10560 creating COMPOUND_EXPRs with the final operands.
10562 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
10565 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
10566 bti c and bti j handling.
10568 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
10569 Thomas Schwinge <thomas@codesourcery.com>
10571 PR middle-end/93488
10573 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
10574 t_async and the wait arguments.
10576 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
10578 PR tree-optimization/94727
10579 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
10580 comparing invariant scalar booleans.
10582 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
10583 Jakub Jelinek <jakub@redhat.com>
10586 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
10587 empty base class artificial fields.
10588 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
10589 different after this fix.
10591 2020-04-23 Jakub Jelinek <jakub@redhat.com>
10594 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
10595 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
10596 if the same type has been diagnosed most recently already.
10598 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10600 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
10602 (__arm_vbicq_n_s16): Likewise.
10603 (__arm_vbicq_n_u32): Likewise.
10604 (__arm_vbicq_n_s32): Likewise.
10605 (__arm_vbicq): Likewise.
10606 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
10607 (__arm_vbicq_n_s32): Likewise.
10608 (__arm_vbicq_n_u16): Likewise.
10609 (__arm_vbicq_n_u32): Likewise.
10610 (__arm_vdupq_m_n_s8): Likewise.
10611 (__arm_vdupq_m_n_s16): Likewise.
10612 (__arm_vdupq_m_n_s32): Likewise.
10613 (__arm_vdupq_m_n_u8): Likewise.
10614 (__arm_vdupq_m_n_u16): Likewise.
10615 (__arm_vdupq_m_n_u32): Likewise.
10616 (__arm_vdupq_m_n_f16): Likewise.
10617 (__arm_vdupq_m_n_f32): Likewise.
10618 (__arm_vldrhq_gather_offset_s16): Likewise.
10619 (__arm_vldrhq_gather_offset_s32): Likewise.
10620 (__arm_vldrhq_gather_offset_u16): Likewise.
10621 (__arm_vldrhq_gather_offset_u32): Likewise.
10622 (__arm_vldrhq_gather_offset_f16): Likewise.
10623 (__arm_vldrhq_gather_offset_z_s16): Likewise.
10624 (__arm_vldrhq_gather_offset_z_s32): Likewise.
10625 (__arm_vldrhq_gather_offset_z_u16): Likewise.
10626 (__arm_vldrhq_gather_offset_z_u32): Likewise.
10627 (__arm_vldrhq_gather_offset_z_f16): Likewise.
10628 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
10629 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
10630 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
10631 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
10632 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
10633 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
10634 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
10635 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
10636 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
10637 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
10638 (__arm_vldrwq_gather_offset_s32): Likewise.
10639 (__arm_vldrwq_gather_offset_u32): Likewise.
10640 (__arm_vldrwq_gather_offset_f32): Likewise.
10641 (__arm_vldrwq_gather_offset_z_s32): Likewise.
10642 (__arm_vldrwq_gather_offset_z_u32): Likewise.
10643 (__arm_vldrwq_gather_offset_z_f32): Likewise.
10644 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
10645 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
10646 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
10647 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
10648 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
10649 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
10650 (__arm_vdwdupq_x_n_u8): Likewise.
10651 (__arm_vdwdupq_x_n_u16): Likewise.
10652 (__arm_vdwdupq_x_n_u32): Likewise.
10653 (__arm_viwdupq_x_n_u8): Likewise.
10654 (__arm_viwdupq_x_n_u16): Likewise.
10655 (__arm_viwdupq_x_n_u32): Likewise.
10656 (__arm_vidupq_x_n_u8): Likewise.
10657 (__arm_vddupq_x_n_u8): Likewise.
10658 (__arm_vidupq_x_n_u16): Likewise.
10659 (__arm_vddupq_x_n_u16): Likewise.
10660 (__arm_vidupq_x_n_u32): Likewise.
10661 (__arm_vddupq_x_n_u32): Likewise.
10662 (__arm_vldrdq_gather_offset_s64): Likewise.
10663 (__arm_vldrdq_gather_offset_u64): Likewise.
10664 (__arm_vldrdq_gather_offset_z_s64): Likewise.
10665 (__arm_vldrdq_gather_offset_z_u64): Likewise.
10666 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
10667 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
10668 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
10669 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
10670 (__arm_vidupq_m_n_u8): Likewise.
10671 (__arm_vidupq_m_n_u16): Likewise.
10672 (__arm_vidupq_m_n_u32): Likewise.
10673 (__arm_vddupq_m_n_u8): Likewise.
10674 (__arm_vddupq_m_n_u16): Likewise.
10675 (__arm_vddupq_m_n_u32): Likewise.
10676 (__arm_vidupq_n_u16): Likewise.
10677 (__arm_vidupq_n_u32): Likewise.
10678 (__arm_vidupq_n_u8): Likewise.
10679 (__arm_vddupq_n_u16): Likewise.
10680 (__arm_vddupq_n_u32): Likewise.
10681 (__arm_vddupq_n_u8): Likewise.
10683 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
10685 * doc/install.texi (D-Specific Options): Document
10686 --enable-libphobos-checking and --with-libphobos-druntime-only.
10688 2020-04-23 Jakub Jelinek <jakub@redhat.com>
10691 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
10692 cxx17_empty_base_seen argument. Pass it to recursive calls.
10693 Ignore cxx17_empty_base_field_p fields after setting
10694 *cxx17_empty_base_seen to true.
10695 (rs6000_discover_homogeneous_aggregate): Adjust
10696 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
10697 aggregates with C++17 empty base fields.
10700 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
10701 if last_decl is error_mark_node or has such a TREE_TYPE.
10704 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
10705 if last_decl is error_mark_node or has such a TREE_TYPE.
10707 2020-04-22 Felix Yang <felix.yang@huawei.com>
10710 * config/aarch64/aarch64.h (TARGET_SVE):
10711 Add && !TARGET_GENERAL_REGS_ONLY.
10712 (TARGET_SVE2): Add && TARGET_SVE.
10713 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
10714 TARGET_SVE2_SM4): Add && TARGET_SVE2.
10715 * config/aarch64/aarch64-sve-builtins.h
10716 (sve_switcher::m_old_general_regs_only): New member.
10717 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
10719 (reported_missing_registers_p): New variable.
10720 (check_required_extensions): Call check_required_registers before
10721 return if all required extenstions are present.
10722 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
10723 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
10724 global_options.x_target_flags.
10725 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
10726 global_options.x_target_flags if m_old_general_regs_only is true.
10728 2020-04-22 Zackery Spytz <zspytz@gmail.com>
10730 * doc/extend.exi: Add "free" to list of other builtin functions
10733 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
10736 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
10737 if TARGET_PREFIXED.
10738 (store_quadpti): Ditto.
10739 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
10740 plq will be used and doesn't need it.
10741 (atomic_store<mode>): Ditto, for pstq.
10743 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
10745 * doc/invoke.texi: Update flags turned on by -O3.
10747 2020-04-22 Jakub Jelinek <jakub@redhat.com>
10750 * config/ia64/ia64.c (hfa_element_mode): Ignore
10751 cxx17_empty_base_field_p fields.
10754 * calls.h (cxx17_empty_base_field_p): Declare.
10755 * calls.c (cxx17_empty_base_field_p): Define.
10757 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
10759 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
10761 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10762 Andre Vieira <andre.simoesdiasvieira@arm.com>
10763 Mihail Ionescu <mihail.ionescu@arm.com>
10765 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
10766 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
10767 (ALL_QUIRKS): Add quirk_no_asmcpu.
10768 (cortex-m55): Define new cpu.
10769 * config/arm/arm-tables.opt: Regenerate.
10770 * config/arm/arm-tune.md: Likewise.
10771 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
10773 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
10775 PR tree-optimization/94700
10776 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
10777 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
10778 of similarly-structured but distinct vector types.
10780 2020-04-21 Martin Sebor <msebor@redhat.com>
10782 PR middle-end/94647
10783 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
10784 the computation of the lower bound of the source access size.
10785 (builtin_access::generic_overlap): Remove a hack for setting ranges
10786 of overlap offsets.
10788 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
10790 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
10791 (ASM_WEAKEN_DECL): New define.
10792 (HAVE_GAS_WEAKREF): Undefine.
10794 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
10796 PR tree-optimization/94683
10797 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
10798 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
10799 but distinct vector types.
10801 2020-04-21 Jakub Jelinek <jakub@redhat.com>
10804 * stor-layout.c (place_field, finalize_record_size): Don't emit
10805 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
10806 * ubsan.c (ubsan_get_type_descriptor_type,
10807 ubsan_get_source_location_type, ubsan_create_data): Set
10809 * asan.c (asan_global_struct): Likewise.
10811 2020-04-21 Duan bo <duanbo3@huawei.com>
10814 * config/aarch64/aarch64.c: Add an error message for option conflict.
10815 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
10816 incompatible with -fpic, -fPIC and -mabi=ilp32.
10818 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
10821 * omp-low.c (new_omp_context): Remove assignments to
10822 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
10824 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
10826 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
10827 ("popcountv2di2_vx"): Use simplify_gen_subreg.
10829 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
10832 * config/s390/s390-builtin-types.def: Add 3 new function modes.
10833 * config/s390/s390-builtins.def: Add mode dependent low-level
10834 builtin and map the overloaded builtins to these.
10835 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
10836 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
10838 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
10840 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
10841 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
10842 estimated VF and is no worse at double the estimated VF.
10844 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
10847 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
10848 order of arguments to rtx_vector_builder.
10849 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
10850 When extending the trailing constants to a full vector, replace any
10851 variables with zeros.
10853 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
10856 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
10859 2020-04-20 Martin Liska <mliska@suse.cz>
10861 * symtab.c (symtab_node::dump_references): Add space after
10863 (symtab_node::dump_referring): Likewise.
10865 2020-04-18 Jeff Law <law@redhat.com>
10868 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
10871 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
10873 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
10874 attributes): Document d_runtime_has_std_library.
10876 2020-04-17 Jeff Law <law@redhat.com>
10878 PR rtl-optimization/90275
10879 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
10880 when the destination has a REG_UNUSED note.
10882 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
10884 PR middle-end/94635
10885 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
10888 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
10890 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
10891 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
10892 cost of load and store insns if one loop iteration has enough scalar
10893 elements to use an Advanced SIMD LDP or STP.
10894 (aarch64_add_stmt_cost): Update call accordingly.
10896 2020-04-17 Jakub Jelinek <jakub@redhat.com>
10897 Jeff Law <law@redhat.com>
10900 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
10901 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
10902 or pos + len >= 32, or pos + len is equal to operands[2] precision
10903 and operands[2] is not a register operand. During splitting perform
10904 SImode AND if operands[0] doesn't have CCZmode and pos + len is
10905 equal to mode precision.
10907 2020-04-17 Richard Biener <rguenther@suse.de>
10910 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
10912 * dwarf2out.c (dw_val_equal_p): Fix pasto in
10913 dw_val_class_vms_delta comparison.
10914 * optabs.c (expand_binop_directly): Fix pasto in commutation
10916 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
10919 2020-04-17 Jakub Jelinek <jakub@redhat.com>
10921 PR rtl-optimization/94618
10922 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
10923 insn is the BB_END of its block, but also when it is only followed
10924 by DEBUG_INSNs in its block.
10926 PR tree-optimization/94621
10927 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
10928 Move id->adjust_array_error_bounds check first in the condition.
10930 2020-04-17 Martin Liska <mliska@suse.cz>
10931 Jonathan Yong <10walls@gmail.com>
10933 PR gcov-profile/94570
10934 * coverage.c (coverage_init): Use separator properly.
10936 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
10938 PR rtl-optimization/93974
10939 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
10940 (rs6000_cannot_substitute_mem_equiv_p): New function.
10942 2020-04-16 Martin Jambor <mjambor@suse.cz>
10945 * ipa-inline.h (ipa_saved_clone_sources): Declare.
10946 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
10947 (save_inline_function_body): Link the new body holder with the
10949 * cgraph.c: Include ipa-inline.h.
10950 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
10951 the statement in ipa_saved_clone_sources.
10952 * cgraphunit.c: Include ipa-inline.h.
10953 (expand_all_functions): Free ipa_saved_clone_sources.
10955 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
10958 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
10959 the VNx16BI lowpart of the recursively-generated constant.
10961 2020-04-16 Martin Liska <mliska@suse.cz>
10962 Jakub Jelinek <jakub@redhat.com>
10965 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
10966 DECL_IS_REPLACEABLE_OPERATOR during cloning.
10967 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
10968 (propagate_necessity): Check operator names.
10970 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
10972 PR rtl-optimization/94605
10973 * early-remat.c (early_remat::process_block): Handle insns that
10974 set multiple candidate registers.
10975 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
10977 PR gcov-profile/93401
10978 * common.opt (profile-prefix-path): New option.
10979 * coverae.c: Include diagnostics.h.
10980 (coverage_init): Strip profile prefix path.
10981 * doc/invoke.texi (-fprofile-prefix-path): Document.
10983 2020-04-16 Richard Biener <rguenther@suse.de>
10985 PR middle-end/94614
10986 * expr.c (emit_move_multi_word): Do not generate code when
10987 the destination part is undefined_operand_subword_p.
10988 * lower-subreg.c (resolve_clobber): Look through a paradoxica
10991 2020-04-16 Martin Jambor <mjambor@suse.cz>
10993 PR tree-optimization/94598
10994 * tree-sra.c (verify_sra_access_forest): Fix verification of total
10995 scalarization accesses under access to one-element arrays.
10997 2020-04-16 Jakub Jelinek <jakub@redhat.com>
11000 * function.c (assign_parm_find_data_types): Add workaround for
11001 BROKEN_VALUE_INITIALIZATION compilers.
11003 2020-04-16 Richard Biener <rguenther@suse.de>
11005 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
11008 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
11011 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
11012 Require OPTION_MASK_ISA_SSE2.
11014 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
11017 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
11018 Don't construct a dump_context temporary to call static method.
11020 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
11022 * config/aarch64/falkor-tag-collision-avoidance.c
11023 (valid_src_p): Check for aarch64_address_info type before
11024 accessing base field.
11026 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
11028 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
11029 (V_sz_elem2): Remove unused mode attribute.
11031 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
11033 * config/arm/arm.md (arm_movdi): Disallow for MVE.
11035 2020-04-15 Richard Biener <rguenther@suse.de>
11037 PR middle-end/94539
11038 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
11039 alias_sets_conflict_p for pointers.
11041 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
11044 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
11045 (extendhisi2_internal): Add %v1 before the load instructions.
11047 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
11050 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
11051 use PC-relative addressing for TLS references.
11053 2020-04-14 Martin Jambor <mjambor@suse.cz>
11056 * ipa-sra.c: Include internal-fn.h.
11057 (enum isra_scan_context): Update comment.
11058 (scan_function): Treat calls to internal_functions like loads or stores.
11060 2020-04-14 Yang Yang <yangyang305@huawei.com>
11062 PR tree-optimization/94574
11063 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
11064 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
11066 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
11069 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
11071 2020-04-13 Martin Sebor <msebor@redhat.com>
11073 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
11074 -Wformat-truncation. Move -Wzero-length-bounds last.
11075 (-Wrestrict): Document positive form of option enabled by -Wall.
11077 2020-04-13 Zachary Spytz <zspytz@gmail.com>
11079 * doc/extend.texi: Add realloc to list of built-in functions
11080 are recognized by the compiler.
11082 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
11085 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
11086 pointer in word_mode for eh_return epilogues.
11088 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11090 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
11091 memory references in %B, %C and %D operand selectors when the inner
11092 operand is a post increment address.
11094 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11096 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
11097 reference by 4 bytes, and %D memory reference by 6 bytes.
11099 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
11102 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
11103 condition for V4SI, V8HI and V16QI modes.
11105 2020-04-11 Jakub Jelinek <jakub@redhat.com>
11109 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
11112 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
11114 PR middle-end/89433
11115 PR middle-end/93465
11116 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
11117 "#pragma omp declare target" has also been applied.
11119 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11121 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
11122 when to emit the epilogue_helper insn.
11123 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
11126 2020-04-09 Jakub Jelinek <jakub@redhat.com>
11129 * cselib.h (cselib_record_sp_cfa_base_equiv,
11130 cselib_sp_derived_value_p): Declare.
11131 * cselib.c (cselib_record_sp_cfa_base_equiv,
11132 cselib_sp_derived_value_p): New functions.
11133 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
11134 cselib_sp_derived_value_p values.
11135 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
11136 start of extended basic blocks other than the first one
11137 for !frame_pointer_needed functions.
11139 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11141 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
11142 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
11143 (aarch64_sve2048_hw): Document.
11144 * config/aarch64/aarch64-protos.h
11145 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
11146 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
11147 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
11148 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
11150 (find_type_suffix_for_scalar_type): Use it instead of comparing
11151 TYPE_MAIN_VARIANTs.
11152 (function_resolver::infer_vector_or_tuple_type): Likewise.
11153 (function_resolver::require_vector_type): Likewise.
11154 (handle_arm_sve_vector_bits_attribute): New function.
11155 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
11156 (aarch64_attribute_table): Add arm_sve_vector_bits.
11157 (aarch64_return_in_memory_1):
11158 (pure_scalable_type_info::piece::get_rtx): New function.
11159 (pure_scalable_type_info::num_zr): Likewise.
11160 (pure_scalable_type_info::num_pr): Likewise.
11161 (pure_scalable_type_info::get_rtx): Likewise.
11162 (pure_scalable_type_info::analyze): Likewise.
11163 (pure_scalable_type_info::analyze_registers): Likewise.
11164 (pure_scalable_type_info::analyze_array): Likewise.
11165 (pure_scalable_type_info::analyze_record): Likewise.
11166 (pure_scalable_type_info::add_piece): Likewise.
11167 (aarch64_some_values_include_pst_objects_p): Likewise.
11168 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
11169 to analyze whether the type is returned in SVE registers.
11170 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
11171 is passed in SVE registers.
11172 (aarch64_pass_by_reference_1): New function, extracted from...
11173 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
11174 to analyze whether the type is a pure scalable type and, if so,
11175 whether it should be passed by reference.
11176 (aarch64_return_in_msb): Return false for pure scalable types.
11177 (aarch64_function_value_1): Fold back into...
11178 (aarch64_function_value): ...this function. Use
11179 pure_scalable_type_info to analyze whether the type is a pure
11180 scalable type and, if so, which registers it should use. Handle
11181 types that include pure scalable types but are not themselves
11182 pure scalable types.
11183 (aarch64_return_in_memory_1): New function, split out from...
11184 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
11185 to analyze whether the type is a pure scalable type and, if so,
11186 whether it should be returned by reference.
11187 (aarch64_layout_arg): Remove orig_mode argument. Use
11188 pure_scalable_type_info to analyze whether the type is a pure
11189 scalable type and, if so, which registers it should use. Handle
11190 types that include pure scalable types but are not themselves
11191 pure scalable types.
11192 (aarch64_function_arg): Update call accordingly.
11193 (aarch64_function_arg_advance): Likewise.
11194 (aarch64_pad_reg_upward): On big-endian targets, return false for
11195 pure scalable types that are smaller than 16 bytes.
11196 (aarch64_member_type_forces_blk): New function.
11197 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
11198 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
11199 correspond to built-in SVE types. Do not rely on a vector mode
11200 if the type includes an pure scalable type. When returning true,
11201 assert that the mode is not an SVE mode.
11202 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
11203 built-in types here. When returning true, assert that the type
11204 does not have an SVE mode.
11205 (aarch64_can_change_mode_class): Don't allow anything to change
11206 between a predicate mode and a non-predicate mode. Also don't
11207 allow changes between SVE vector modes and other modes that
11208 might be bigger than 128 bits.
11209 (aarch64_invalid_binary_op): Reject binary operations that mix
11210 SVE and GNU vector types.
11211 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
11213 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11215 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
11216 "SVE sizeless type".
11217 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
11218 (sizeless_type_p): New functions.
11219 (register_builtin_types): Apply make_type_sizeless to the type.
11220 (register_tuple_type): Likewise.
11221 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
11223 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
11225 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
11228 2020-04-09 Martin Jambor <mjambor@suse.cz>
11229 Richard Biener <rguenther@suse.de>
11231 PR tree-optimization/94482
11232 * tree-sra.c (create_access_replacement): Dump new replacement with
11234 (sra_modify_expr): Fix handling of cases when the original EXPR writes
11235 to only part of the replacement.
11236 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
11237 the first operand of combinations into REAL/IMAGPART_EXPR and
11240 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11242 * doc/sourcebuild.texi (check-function-bodies): Treat the third
11243 parameter as a list of option regexps and require each regexp
11246 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
11249 * config/aarch64/falkor-tag-collision-avoidance.c
11250 (valid_src_p): Fix missing rtx type check.
11252 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
11253 Richard Biener <rguenther@suse.de>
11255 PR tree-optimization/93674
11256 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
11257 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
11258 or non-mode precision type, add candidate in unsigned type with the
11261 2020-04-08 Clement Chigot <clement.chigot@atos.net>
11263 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
11264 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
11265 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
11267 2020-04-08 Jakub Jelinek <jakub@redhat.com>
11269 PR middle-end/94526
11270 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
11272 * reload1.c (eliminate_regs_1): Avoid creating
11273 (plus (reg) (const_int 0)) in DEBUG_INSNs.
11275 PR tree-optimization/94524
11276 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
11277 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
11278 op1 rather than op1 itself at the end. Punt for signed modulo by
11279 most negative constant.
11280 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
11281 modulo by most negative constant.
11283 2020-04-08 Richard Biener <rguenther@suse.de>
11285 PR rtl-optimization/93946
11286 * cse.c (cse_insn): Record the tabled expression in
11287 src_related. Verify a redundant store removal is valid.
11289 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
11292 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
11293 ENDBR at function entry if function will be called indirectly.
11295 2020-04-08 Jakub Jelinek <jakub@redhat.com>
11298 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
11301 2020-04-08 Martin Liska <mliska@suse.cz>
11304 * gimple.c (gimple_call_operator_delete_p): Rename to...
11305 (gimple_call_replaceable_operator_delete_p): ... this.
11306 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
11307 * gimple.h (gimple_call_operator_delete_p): Rename to ...
11308 (gimple_call_replaceable_operator_delete_p): ... this.
11309 * tree-core.h (tree_function_decl): Add replaceable_operator
11311 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
11312 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
11313 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
11314 (eliminate_unnecessary_stmts): Likewise.
11315 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
11316 Pack DECL_IS_REPLACEABLE_OPERATOR.
11317 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
11318 Unpack the field here.
11319 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
11320 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
11321 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
11322 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
11323 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
11324 replaceable operator flags.
11326 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
11327 Matthew Malcomson <matthew.malcomson@arm.com>
11329 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
11330 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
11331 (CX_TERNARY_QUALIFIERS): Likewise.
11332 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
11333 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
11334 (arm_init_acle_builtins): Initialize CDE builtins.
11335 (arm_expand_acle_builtin): Check CDE constant operands.
11336 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
11337 of CDE constant operand.
11338 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
11340 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
11341 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
11342 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
11343 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
11344 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
11345 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
11346 * config/arm/arm_cde_builtins.def: New file.
11347 * config/arm/iterators.md (V_reg): New attribute of SI.
11348 * config/arm/predicates.md (const_int_coproc_operand): New.
11349 (const_int_vcde1_operand, const_int_vcde2_operand): New.
11350 (const_int_vcde3_operand): New.
11351 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
11352 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
11353 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
11354 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
11356 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
11358 * config.gcc: Add arm_cde.h.
11359 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
11360 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
11361 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
11362 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
11363 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
11364 * config/arm/arm.h (TARGET_CDE): New macro.
11365 * config/arm/arm_cde.h: New file.
11366 * doc/invoke.texi: Document CDE options +cdecp[0-7].
11367 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
11369 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
11371 2020-04-08 Jakub Jelinek <jakub@redhat.com>
11373 PR rtl-optimization/94516
11374 * postreload.c: Include rtl-iter.h.
11375 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
11376 looking for all MEMs with RTX_AUTOINC operand.
11377 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
11379 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
11381 * omp-grid.c (grid_eliminate_combined_simd_part): Use
11382 OMP_CLAUSE_CODE to access the omp clause code.
11384 2020-04-07 Jeff Law <law@redhat.com>
11386 PR rtl-optimization/92264
11387 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
11388 the destination is the stack pointer.
11390 2020-04-07 Jakub Jelinek <jakub@redhat.com>
11392 PR rtl-optimization/94291
11393 PR rtl-optimization/84169
11394 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
11395 must be a REG or SUBREG of REG; if it is not one of these, don't
11398 2020-04-07 Richard Biener <rguenther@suse.de>
11400 PR middle-end/94479
11401 * gimplify.c (gimplify_addr_expr): Also consider generated
11404 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11406 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
11408 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11410 * config/arm/arm_mve.h: Cast some pointers to expected types.
11412 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11414 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
11415 same with '__arm_' prefix.
11417 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11419 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
11421 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11423 * config/arm/arm.c (arm_mve_immediate_check): Removed.
11424 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
11425 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
11426 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
11427 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
11428 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
11429 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
11431 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11433 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
11435 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11437 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
11438 * config/arm/mve/md: Fix v[id]wdup patterns.
11440 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11442 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
11443 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
11445 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11447 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
11448 and remove const_ptr enums.
11450 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11452 * config/arm/arm_mve.h (vsubq_n): Merge with...
11454 (vmulq_n): Merge with...
11456 (__ARM_mve_typeid): Simplify scalar and constant detection.
11458 2020-04-07 Jakub Jelinek <jakub@redhat.com>
11461 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
11462 for inter-lane permutation for 64-byte modes.
11465 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
11466 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
11467 Assume it is a REG after that instead of testing it and doing FAIL
11468 otherwise. Formatting fix.
11470 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
11472 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
11474 2020-04-07 Jakub Jelinek <jakub@redhat.com>
11477 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
11478 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
11480 2020-04-06 Jakub Jelinek <jakub@redhat.com>
11482 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
11483 + const0_rtx return the SP_DERIVED_VALUE_P.
11485 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
11487 PR rtl-optimization/92989
11488 * lra-lives.c (process_bb_lives): Do not treat eh_return data
11489 registers as being live at the beginning of the EH receiver.
11491 2020-04-05 Zachary Spytz <zspytz@gmail.com>
11493 * extend.texi: Add free to list of ISO C90 functions that
11494 are recognized by the compiler.
11496 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
11498 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
11499 for fast_interrupt.
11501 * config/microblaze/microblaze.md (trap): Update output pattern.
11503 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
11504 Jakub Jelinek <jakub@redhat.com>
11507 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
11508 arrays, pointer-to-members, function types and qualifiers when
11509 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
11510 to emit type again on definition.
11512 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
11515 * ipa-fnsummary.c (vrp_will_run_p): New function.
11516 (fre_will_run_p): New function.
11517 (evaluate_properties_for_edge): Use it.
11518 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
11519 !optimize_debug to optimize_debug.
11521 2020-04-04 Jakub Jelinek <jakub@redhat.com>
11523 PR rtl-optimization/94468
11524 * cselib.c (references_value_p): Formatting fix.
11525 (cselib_useless_value_p): New function.
11526 (discard_useless_locs, discard_useless_values,
11527 cselib_invalidate_regno_val, cselib_invalidate_mem,
11528 cselib_record_set): Use it instead of
11529 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
11532 * tree-iterator.h (expr_single): Declare.
11533 * tree-iterator.c (expr_single): New function.
11534 * tree.h (protected_set_expr_location_if_unset): Declare.
11535 * tree.c (protected_set_expr_location): Use expr_single.
11536 (protected_set_expr_location_if_unset): New function.
11538 2020-04-03 Jeff Law <law@redhat.com>
11540 PR rtl-optimization/92264
11541 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
11542 reloading of auto-increment addressing modes.
11544 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
11547 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
11550 2020-04-03 Jeff Law <law@redhat.com>
11552 PR rtl-optimization/92264
11553 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
11554 post-increment addressing of source operands as well as residuals
11555 when computing any adjustments to the input pointer.
11557 2020-04-03 Jakub Jelinek <jakub@redhat.com>
11560 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
11561 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
11562 second half of first lane from first lane of second operand and
11563 first half of second lane from second lane of first operand.
11565 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
11567 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
11569 2020-04-03 Tamar Christina <tamar.christina@arm.com>
11572 * common/config/aarch64/aarch64-common.c
11573 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
11575 2020-04-03 Richard Biener <rguenther@suse.de>
11577 PR middle-end/94465
11578 * tree.c (array_ref_low_bound): Deal with released SSA names
11581 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
11583 * config/gcn/gcn.c (print_operand): Handle unordered comparison
11585 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
11586 comparison operators.
11588 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
11590 PR tree-optimization/94443
11591 * tree-vect-loop.c (vectorizable_live_operation): Use
11592 gsi_insert_seq_before to replace gsi_insert_before.
11594 2020-04-03 Martin Liska <mliska@suse.cz>
11597 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
11598 Compare type attributes for gimple_call_fntypes.
11600 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
11602 * alias.c (get_alias_set): Fix comment typos.
11604 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
11607 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
11608 attribute checking used by TYPE.
11610 2020-04-02 Martin Jambor <mjambor@suse.cz>
11613 * ipa-sra.c (struct caller_issues): New fields candidate and
11614 call_from_outside_comdat.
11615 (check_for_caller_issues): Check for calls from outsied of
11616 candidate's same_comdat_group.
11617 (check_all_callers_for_issues): Set up issues.candidate, check result
11619 (mark_callers_calls_comdat_local): New function.
11620 (process_isra_node_results): Set calls_comdat_local of callers if
11623 2020-04-02 Richard Biener <rguenther@suse.de>
11626 * common.opt (ffinite-loops): Initialize to zero.
11627 * opts.c (default_options_table): Remove OPT_ffinite_loops
11629 * cfgloop.h (loop::finite_p): New member.
11630 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
11631 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
11633 * lto-streamer-in.c (input_cfg): Stream finite_p.
11634 * lto-streamer-out.c (output_cfg): Likewise.
11635 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
11636 from flag_finite_loops at CFG build time.
11637 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
11638 finite_p flag instead of flag_finite_loops.
11639 * doc/invoke.texi (ffinite-loops): Adjust documentation of
11642 2020-04-02 Richard Biener <rguenther@suse.de>
11645 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
11646 DW_TAG_imported_unit.
11648 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
11650 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
11651 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
11654 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
11656 PR tree-optimization/94401
11657 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
11658 access type when loading halves of vector to avoid peeling for gaps.
11660 2020-04-02 Jakub Jelinek <jakub@redhat.com>
11662 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
11663 between a string literal and MIPS_SYSVERSION_SPEC macro.
11665 2020-04-02 Martin Jambor <mjambor@suse.cz>
11667 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
11669 2020-04-02 Jakub Jelinek <jakub@redhat.com>
11671 PR rtl-optimization/92264
11672 * params.opt (-param=max-find-base-term-values=): Decrease default
11675 PR rtl-optimization/92264
11676 * rtl.h (struct rtx_def): Mention that call bit is used as
11677 SP_DERIVED_VALUE_P in cselib.c.
11678 * cselib.c (SP_DERIVED_VALUE_P): Define.
11679 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
11680 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
11681 val_rtx and sp based expression where offsets cancel each other.
11682 (preserve_constants_and_equivs): Formatting fix.
11683 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
11684 locs list for cfa_base_preserved_val if needed. Formatting fix.
11685 (autoinc_split): If the to be returned value is a REG, MEM or
11686 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
11687 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
11688 (rtx_equal_for_cselib_1): Call autoinc_split even if both
11689 expressions are PLUS in Pmode with CONST_INT second operands.
11690 Handle SP_DERIVED_VALUE_P cases.
11691 (cselib_hash_plus_const_int): New function.
11692 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
11693 second operand, as well as for PRE_DEC etc. that ought to be
11694 hashed the same way.
11695 (cselib_subst_to_values): Substitute PLUS with Pmode and
11696 CONST_INT operand if the first operand is a VALUE which has
11697 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
11698 SP_DERIVED_VALUE_P + adjusted offset.
11699 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
11700 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
11701 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
11702 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
11703 on the sp value before calling cselib_add_permanent_equiv on the
11705 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
11706 in the insn without REG_INC note.
11707 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
11708 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
11711 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
11712 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
11714 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11717 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
11718 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
11719 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
11720 intrinsic defintion by adding a new builtin call to writeback into base
11722 (__arm_vldrdq_gather_base_wb_u64): Likewise.
11723 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
11724 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
11725 (__arm_vldrwq_gather_base_wb_s32): Likewise.
11726 (__arm_vldrwq_gather_base_wb_u32): Likewise.
11727 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
11728 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
11729 (__arm_vldrwq_gather_base_wb_f32): Likewise.
11730 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
11731 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
11732 builtin's qualifier.
11733 (vldrdq_gather_base_wb_z_u): Likewise.
11734 (vldrwq_gather_base_wb_u): Likewise.
11735 (vldrdq_gather_base_wb_u): Likewise.
11736 (vldrwq_gather_base_wb_z_s): Likewise.
11737 (vldrwq_gather_base_wb_z_f): Likewise.
11738 (vldrdq_gather_base_wb_z_s): Likewise.
11739 (vldrwq_gather_base_wb_s): Likewise.
11740 (vldrwq_gather_base_wb_f): Likewise.
11741 (vldrdq_gather_base_wb_s): Likewise.
11742 (vldrwq_gather_base_nowb_z_u): Define builtin.
11743 (vldrdq_gather_base_nowb_z_u): Likewise.
11744 (vldrwq_gather_base_nowb_u): Likewise.
11745 (vldrdq_gather_base_nowb_u): Likewise.
11746 (vldrwq_gather_base_nowb_z_s): Likewise.
11747 (vldrwq_gather_base_nowb_z_f): Likewise.
11748 (vldrdq_gather_base_nowb_z_s): Likewise.
11749 (vldrwq_gather_base_nowb_s): Likewise.
11750 (vldrwq_gather_base_nowb_f): Likewise.
11751 (vldrdq_gather_base_nowb_s): Likewise.
11752 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
11754 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
11755 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
11756 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
11757 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
11758 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
11759 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
11760 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
11761 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
11762 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
11763 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
11764 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
11766 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
11768 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
11769 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
11770 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
11771 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
11772 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
11773 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
11774 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
11775 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
11776 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
11778 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
11779 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
11780 Remove constraints from expander.
11781 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
11782 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
11783 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
11784 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
11785 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
11786 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
11788 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
11790 PR rtl-optimization/94123
11791 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
11792 flag_split_wide_types_early.
11794 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
11796 * doc/extend.texi (Common Function Attributes): Fix typo.
11798 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
11801 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
11804 2020-04-01 Zackery Spytz <zspytz@gmail.com>
11806 * doc/extend.texi: Fix a typo in the documentation of the
11807 copy function attribute.
11809 2020-04-01 Jakub Jelinek <jakub@redhat.com>
11811 PR middle-end/94423
11812 * tree-object-size.c (pass_object_sizes::execute): Don't call
11813 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
11814 call replace_call_with_value.
11816 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
11818 PR tree-optimization/94043
11819 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
11820 phi for vec_lhs and use it for lane extraction.
11822 2020-03-31 Felix Yang <felix.yang@huawei.com>
11824 PR tree-optimization/94398
11825 * tree-vect-stmts.c (vectorizable_store): Instead of calling
11826 vect_supportable_dr_alignment, set alignment_support_scheme to
11827 dr_unaligned_supported for gather-scatter accesses.
11828 (vectorizable_load): Likewise.
11830 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
11832 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
11833 New mode iterators.
11834 (vnsi, VnSI, vndi, VnDI): New mode attributes.
11835 (mov<mode>): Use <VnDI> in place of V64DI.
11836 (mov<mode>_exec): Likewise.
11837 (mov<mode>_sgprbase): Likewise.
11838 (reload_out<mode>): Likewise.
11839 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
11840 (gather_load<mode>v64si): Rename to ...
11841 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
11842 and <VnDI> in place of V64DI.
11843 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
11844 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
11845 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
11846 (scatter_store<mode>v64si): Rename to ...
11847 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
11848 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
11849 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
11850 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
11851 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
11852 (ds_bpermute<mode>): Use <VnSI>.
11853 (addv64si3_vcc<exec_vcc>): Rename to ...
11854 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
11855 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
11856 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
11857 (addcv64si3<exec_vcc>): Rename to ...
11858 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
11859 (subv64si3_vcc<exec_vcc>): Rename to ...
11860 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
11861 (subcv64si3<exec_vcc>): Rename to ...
11862 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
11863 (addv64di3): Rename to ...
11864 (add<mode>3): ... this, and use V_DI.
11865 (addv64di3_exec): Rename to ...
11866 (add<mode>3_exec): ... this, and use V_DI.
11867 (subv64di3): Rename to ...
11868 (sub<mode>3): ... this, and use V_DI.
11869 (subv64di3_exec): Rename to ...
11870 (sub<mode>3_exec): ... this, and use V_DI.
11871 (addv64di3_zext): Rename to ...
11872 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
11873 (addv64di3_zext_exec): Rename to ...
11874 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
11875 (addv64di3_zext_dup): Rename to ...
11876 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
11877 (addv64di3_zext_dup_exec): Rename to ...
11878 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
11879 (addv64di3_zext_dup2): Rename to ...
11880 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
11881 (addv64di3_zext_dup2_exec): Rename to ...
11882 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
11883 (addv64di3_sext_dup2): Rename to ...
11884 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
11885 (addv64di3_sext_dup2_exec): Rename to ...
11886 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
11887 (<su>mulv64si3_highpart<exec>): Rename to ...
11888 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
11889 (mulv64di3): Rename to ...
11890 (mul<mode>3): ... this, and use V_DI and <VnSI>.
11891 (mulv64di3_exec): Rename to ...
11892 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
11893 (mulv64di3_zext): Rename to ...
11894 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
11895 (mulv64di3_zext_exec): Rename to ...
11896 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
11897 (mulv64di3_zext_dup2): Rename to ...
11898 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
11899 (mulv64di3_zext_dup2_exec): Rename to ...
11900 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
11901 (<expander>v64di3): Rename to ...
11902 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
11903 (<expander>v64di3_exec): Rename to ...
11904 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
11905 (<expander>v64si3<exec>): Rename to ...
11906 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
11907 (v<expander>v64si3<exec>): Rename to ...
11908 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
11909 (<expander>v64si3<exec>): Rename to ...
11910 (<expander><vnsi>3<exec>): ... this, and use V_SI.
11911 (subv64df3<exec>): Rename to ...
11912 (sub<mode>3<exec>): ... this, and use V_DF.
11913 (truncv64di<mode>2): Rename to ...
11914 (trunc<vndi><mode>2): ... this, and use <VnDI>.
11915 (truncv64di<mode>2_exec): Rename to ...
11916 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
11917 (<convop><mode>v64di2): Rename to ...
11918 (<convop><mode><vndi>2): ... this, and use <VnDI>.
11919 (<convop><mode>v64di2_exec): Rename to ...
11920 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
11921 (vec_cmp<u>v64qidi): Rename to ...
11922 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
11923 (vec_cmp<u>v64qidi_exec): Rename to ...
11924 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
11925 (vcond_mask_<mode>di): Use <VnDI>.
11926 (maskload<mode>di): Likewise.
11927 (maskstore<mode>di): Likewise.
11928 (mask_gather_load<mode>v64si): Rename to ...
11929 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
11930 (mask_scatter_store<mode>v64si): Rename to ...
11931 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
11932 (*<reduc_op>_dpp_shr_v64di): Rename to ...
11933 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
11934 (*plus_carry_in_dpp_shr_v64si): Rename to ...
11935 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
11936 (*plus_carry_dpp_shr_v64di): Rename to ...
11937 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
11938 (vec_seriesv64si): Rename to ...
11939 (vec_series<mode>): ... this, and use V_SI.
11940 (vec_seriesv64di): Rename to ...
11941 (vec_series<mode>): ... this, and use V_DI.
11943 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
11945 * config/arc/arc.c (arc_print_operand): Use
11946 HOST_WIDE_INT_PRINT_DEC macro.
11948 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
11950 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
11952 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11954 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
11956 (__arm_vbicq): Likewise.
11958 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
11960 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
11962 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11964 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
11965 common section of both MVE Integer and MVE Floating Point.
11966 (vaddvq): Likewise.
11967 (vaddlvq_p): Likewise.
11968 (vaddvaq): Likewise.
11969 (vaddvq_p): Likewise.
11970 (vcmpcsq): Likewise.
11971 (vmlsdavxq): Likewise.
11972 (vmlsdavq): Likewise.
11973 (vmladavxq): Likewise.
11974 (vmladavq): Likewise.
11975 (vminvq): Likewise.
11976 (vminavq): Likewise.
11977 (vmaxvq): Likewise.
11978 (vmaxavq): Likewise.
11979 (vmlaldavq): Likewise.
11980 (vcmphiq): Likewise.
11981 (vaddlvaq): Likewise.
11982 (vrmlaldavhq): Likewise.
11983 (vrmlaldavhxq): Likewise.
11984 (vrmlsldavhq): Likewise.
11985 (vrmlsldavhxq): Likewise.
11986 (vmlsldavxq): Likewise.
11987 (vmlsldavq): Likewise.
11988 (vabavq): Likewise.
11989 (vrmlaldavhaq): Likewise.
11990 (vcmpgeq_m_n): Likewise.
11991 (vmlsdavxq_p): Likewise.
11992 (vmlsdavq_p): Likewise.
11993 (vmlsdavaxq): Likewise.
11994 (vmlsdavaq): Likewise.
11995 (vaddvaq_p): Likewise.
11996 (vcmpcsq_m_n): Likewise.
11997 (vcmpcsq_m): Likewise.
11998 (vmladavxq_p): Likewise.
11999 (vmladavq_p): Likewise.
12000 (vmladavaxq): Likewise.
12001 (vmladavaq): Likewise.
12002 (vminvq_p): Likewise.
12003 (vminavq_p): Likewise.
12004 (vmaxvq_p): Likewise.
12005 (vmaxavq_p): Likewise.
12006 (vcmphiq_m): Likewise.
12007 (vaddlvaq_p): Likewise.
12008 (vmlaldavaq): Likewise.
12009 (vmlaldavaxq): Likewise.
12010 (vmlaldavq_p): Likewise.
12011 (vmlaldavxq_p): Likewise.
12012 (vmlsldavaq): Likewise.
12013 (vmlsldavaxq): Likewise.
12014 (vmlsldavq_p): Likewise.
12015 (vmlsldavxq_p): Likewise.
12016 (vrmlaldavhaxq): Likewise.
12017 (vrmlaldavhq_p): Likewise.
12018 (vrmlaldavhxq_p): Likewise.
12019 (vrmlsldavhaq): Likewise.
12020 (vrmlsldavhaxq): Likewise.
12021 (vrmlsldavhq_p): Likewise.
12022 (vrmlsldavhxq_p): Likewise.
12023 (vabavq_p): Likewise.
12024 (vmladavaq_p): Likewise.
12025 (vstrbq_scatter_offset): Likewise.
12026 (vstrbq_p): Likewise.
12027 (vstrbq_scatter_offset_p): Likewise.
12028 (vstrdq_scatter_base_p): Likewise.
12029 (vstrdq_scatter_base): Likewise.
12030 (vstrdq_scatter_offset_p): Likewise.
12031 (vstrdq_scatter_offset): Likewise.
12032 (vstrdq_scatter_shifted_offset_p): Likewise.
12033 (vstrdq_scatter_shifted_offset): Likewise.
12034 (vmaxq_x): Likewise.
12035 (vminq_x): Likewise.
12036 (vmovlbq_x): Likewise.
12037 (vmovltq_x): Likewise.
12038 (vmulhq_x): Likewise.
12039 (vmullbq_int_x): Likewise.
12040 (vmullbq_poly_x): Likewise.
12041 (vmulltq_int_x): Likewise.
12042 (vmulltq_poly_x): Likewise.
12043 (vstrbq): Likewise.
12045 2020-03-31 Jakub Jelinek <jakub@redhat.com>
12048 * config/aarch64/constraints.md (Uph): New constraint.
12049 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
12050 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
12053 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
12054 Jakub Jelinek <jakub@redhat.com>
12056 PR middle-end/94412
12057 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
12058 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
12060 2020-03-31 Jakub Jelinek <jakub@redhat.com>
12062 PR tree-optimization/94403
12063 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
12064 ENUMERAL_TYPE lhs_type.
12066 PR rtl-optimization/94344
12067 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
12068 conversions, either on both operands of |^+ or just one. Handle
12069 also extra same precision conversion on RSHIFT_EXPR first operand
12070 provided RSHIFT_EXPR is performed in unsigned type.
12072 2020-03-30 David Malcolm <dmalcolm@redhat.com>
12074 * lra.c (finish_insn_code_data_once): Set the array elements
12075 to NULL after freeing them.
12077 2020-03-30 Andreas Schwab <schwab@suse.de>
12079 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
12082 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
12084 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
12085 to skip defining builtins based on builtin_mask.
12087 2020-03-30 Jakub Jelinek <jakub@redhat.com>
12090 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
12091 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
12092 operand is a register. Don't enable masked variants for V*[QH]Imode.
12095 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
12096 <store_mask_constraint> instead of m in output operand constraint.
12097 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
12100 2020-03-30 Alan Modra <amodra@gmail.com>
12102 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
12103 (rs6000_indirect_call_template_1): Adjust to suit.
12104 * config/rs6000/rs6000.md (call_local): Merge call_local32,
12105 call_local64, and call_local_aix.
12106 (call_value_local): Simlarly.
12107 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
12108 and disable pattern when CALL_LONG.
12109 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
12110 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
12111 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
12113 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
12116 * doc/invoke.texi: Update -falign-functions, -falign-loops and
12117 -falign-jumps documentation.
12119 2020-03-29 Martin Liska <mliska@suse.cz>
12122 * cgraphunit.c (process_function_and_variable_attributes): Remove
12123 double 'attribute' words.
12125 2020-03-29 John David Anglin <dave.anglin@bell.net>
12127 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
12130 2020-03-28 Jakub Jelinek <jakub@redhat.com>
12133 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
12134 to true after setting size to integer_one_node.
12136 PR tree-optimization/94329
12137 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
12138 on the last stmt in a bb, make sure gsi_prev isn't done immediately
12141 2020-03-27 Alan Modra <amodra@gmail.com>
12144 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
12145 for PLT16_LO and PLT_PCREL.
12146 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
12147 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
12148 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
12150 2020-03-27 Martin Sebor <msebor@redhat.com>
12153 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
12155 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
12157 * config/gcn/gcn-valu.md:
12158 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
12159 (VEC_1REG_MODE): Delete.
12160 (VEC_1REG_ALT): Delete.
12161 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
12162 (VEC_1REG_INT_MODE): Delete.
12163 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
12164 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
12165 (VEC_2REG_MODE): Rename to V_2REG throughout.
12166 (VEC_REG_MODE): Rename to V_noHI throughout.
12167 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
12168 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
12169 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
12170 (VEC_INT_MODE): Delete.
12171 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
12172 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
12173 (FP_MODE): Delete and replace with FP throughout.
12174 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
12175 (VCMP_MODE): Rename to V_noQI throughout and move to top.
12176 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
12177 * config/gcn/gcn.md (FP): New mode iterator.
12178 (FP_1REG): New mode iterator.
12180 2020-03-27 David Malcolm <dmalcolm@redhat.com>
12182 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
12183 now emits two .dot files.
12184 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
12185 (graphviz_out::end_tr): Only close a TR, not a TD.
12186 (graphviz_out::begin_td): New.
12187 (graphviz_out::end_td): New.
12188 (graphviz_out::begin_trtd): New, replacing the old implementation
12189 of graphviz_out::begin_tr.
12190 (graphviz_out::end_tdtr): New, replacing the old implementation
12191 of graphviz_out::end_tr.
12192 * graphviz.h (graphviz_out::begin_td): New decl.
12193 (graphviz_out::end_td): New decl.
12194 (graphviz_out::begin_trtd): New decl.
12195 (graphviz_out::end_tdtr): New decl.
12197 2020-03-27 Richard Biener <rguenther@suse.de>
12200 * dwarf2out.c (should_emit_struct_debug): Return false for
12203 2020-03-27 Richard Biener <rguenther@suse.de>
12205 PR tree-optimization/94352
12206 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
12208 (ssa_propagation_engine::ssa_propagate): ... here after
12209 initializing curr_order.
12211 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
12213 PR tree-optimization/90332
12214 * tree-vect-stmts.c (vector_vector_composition_type): New function.
12215 (get_group_load_store_type): Adjust to call
12216 vector_vector_composition_type, extend it to construct with scalar
12218 (vectorizable_load): Likewise.
12220 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
12222 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
12223 (create_ddg_dep_no_link): Likewise.
12224 (add_cross_iteration_register_deps): Move debug instruction check.
12225 Other minor refactoring.
12226 (add_intra_loop_mem_dep): Do not check for debug instructions.
12227 (add_inter_loop_mem_dep): Likewise.
12228 (build_intra_loop_deps): Likewise.
12229 (create_ddg): Do not include debug insns into the graph.
12230 * ddg.h (struct ddg): Remove num_debug field.
12231 * modulo-sched.c (doloop_register_get): Adjust condition.
12232 (res_MII): Remove DDG num_debug field usage.
12233 (sms_schedule_by_order): Use assertion against debug insns.
12234 (ps_has_conflicts): Drop debug insn check.
12236 2020-03-26 Jakub Jelinek <jakub@redhat.com>
12239 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
12240 that contains exactly one non-DEBUG_BEGIN_STMT statement.
12243 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
12244 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
12245 a single non-debug stmt followed by one or more debug stmts.
12246 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
12247 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
12248 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
12249 gimple_seq_last to check if outer_stmt gbind could be reused and
12250 if yes and it is surrounded by any debug stmts, move them into the
12253 PR rtl-optimization/92264
12254 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
12255 for sp based values in !frame_pointer_needed
12256 && !ACCUMULATE_OUTGOING_ARGS functions.
12258 2020-03-26 Felix Yang <felix.yang@huawei.com>
12260 PR tree-optimization/94269
12261 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
12263 operation to single basic block.
12265 2020-03-25 Jeff Law <law@redhat.com>
12267 PR rtl-optimization/90275
12268 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
12271 2020-03-25 Jakub Jelinek <jakub@redhat.com>
12274 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
12275 mode rather than VOIDmode.
12277 2020-03-25 Martin Sebor <msebor@redhat.com>
12279 PR middle-end/94004
12280 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
12281 even for alloca calls resulting from system macro expansion.
12282 Include inlining context in all warnings.
12284 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
12287 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
12288 FPRs to change between SDmode and DDmode.
12290 2020-03-25 Martin Sebor <msebor@redhat.com>
12292 PR tree-optimization/94131
12293 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
12295 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
12296 types have constant sizes.
12298 2020-03-25 Martin Liska <mliska@suse.cz>
12301 * configure.ac: Report error only when --with-zstd
12303 * configure: Regenerate.
12305 2020-03-25 Jakub Jelinek <jakub@redhat.com>
12308 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
12309 INSN_CODE (insn) to -1 when changing the pattern.
12311 2020-03-25 Martin Liska <mliska@suse.cz>
12315 * config/i386/i386-features.c (make_resolver_func): Drop
12316 public flag for resolver.
12317 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
12318 group for resolver and drop public flag if possible.
12319 * multiple_target.c (create_dispatcher_calls): Drop unique_name
12320 and resolution as we want to enable LTO privatization of the default
12323 2020-03-25 Martin Liska <mliska@suse.cz>
12326 * configure.ac: Respect --without-zstd and report
12327 error when we can't find header file with --with-zstd.
12328 * configure: Regenerate.
12330 2020-03-25 Jakub Jelinek <jakub@redhat.com>
12332 PR middle-end/94303
12333 * varasm.c (output_constructor_array_range): If local->index
12334 RANGE_EXPR doesn't start at the current location in the constructor,
12335 skip needed number of bytes using assemble_zeros or assert we don't
12339 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
12340 counter instead of DECL_UID.
12342 PR tree-optimization/94300
12343 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
12344 is positive, make sure that off + size isn't larger than needed_len.
12346 2020-03-25 Richard Biener <rguenther@suse.de>
12347 Jakub Jelinek <jakub@redhat.com>
12350 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
12352 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
12354 * doc/sourcebuild.texi (ARM-specific attributes): Add
12356 (Features for dg-add-options): Add arm_fp_dp.
12358 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
12361 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
12363 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
12366 * omp-offload.c (omp_finish_file): Fix target-link handling if
12367 targetm_common.have_named_sections is false.
12369 2020-03-24 Jakub Jelinek <jakub@redhat.com>
12372 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
12373 instead of GEN_INT.
12376 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
12377 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
12378 If not after and at *incr_pos is a debug stmt, set stmt location to
12379 location of next non-debug stmt after it if any.
12382 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
12383 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
12384 worklist or set GF_PLF_2 just because it is used in a debug stmt in
12385 another bb. Formatting improvements.
12388 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
12389 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
12390 regardless of whether TREE_NO_WARNING is set on it or whether
12391 warn_unused_function is true or not.
12393 2020-03-23 Jeff Law <law@redhat.com>
12395 PR rtl-optimization/90275
12398 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
12399 (simplify_logical_relational_operation): Use it.
12401 2020-03-23 Jakub Jelinek <jakub@redhat.com>
12404 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
12405 ultimate rhs and if returned something different, reconstructing
12406 the COMPOUND_EXPRs.
12408 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
12410 * opts.c (print_filtered_help): Improve the help text for alias options.
12412 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12413 Andre Vieira <andre.simoesdiasvieira@arm.com>
12414 Mihail Ionescu <mihail.ionescu@arm.com>
12416 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
12417 (vshlcq_m_u8): Likewise.
12418 (vshlcq_m_s16): Likewise.
12419 (vshlcq_m_u16): Likewise.
12420 (vshlcq_m_s32): Likewise.
12421 (vshlcq_m_u32): Likewise.
12422 (__arm_vshlcq_m_s8): Define intrinsic.
12423 (__arm_vshlcq_m_u8): Likewise.
12424 (__arm_vshlcq_m_s16): Likewise.
12425 (__arm_vshlcq_m_u16): Likewise.
12426 (__arm_vshlcq_m_s32): Likewise.
12427 (__arm_vshlcq_m_u32): Likewise.
12428 (vshlcq_m): Define polymorphic variant.
12429 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
12430 Use builtin qualifier.
12431 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
12432 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
12433 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
12434 (mve_vshlcq_m_<supf><mode>): Likewise.
12436 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12438 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
12439 (UQSHL_QUALIFIERS): Likewise.
12440 (ASRL_QUALIFIERS): Likewise.
12441 (SQSHL_QUALIFIERS): Likewise.
12442 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
12444 (sqrshr): Define macro.
12445 (sqrshrl): Likewise.
12446 (sqrshrl_sat48): Likewise.
12448 (sqshll): Likewise.
12450 (srshrl): Likewise.
12451 (uqrshl): Likewise.
12452 (uqrshll): Likewise.
12453 (uqrshll_sat48): Likewise.
12455 (uqshll): Likewise.
12457 (urshrl): Likewise.
12460 (__arm_lsll): Define intrinsic.
12461 (__arm_asrl): Likewise.
12462 (__arm_uqrshll): Likewise.
12463 (__arm_uqrshll_sat48): Likewise.
12464 (__arm_sqrshrl): Likewise.
12465 (__arm_sqrshrl_sat48): Likewise.
12466 (__arm_uqshll): Likewise.
12467 (__arm_urshrl): Likewise.
12468 (__arm_srshrl): Likewise.
12469 (__arm_sqshll): Likewise.
12470 (__arm_uqrshl): Likewise.
12471 (__arm_sqrshr): Likewise.
12472 (__arm_uqshl): Likewise.
12473 (__arm_urshr): Likewise.
12474 (__arm_sqshl): Likewise.
12475 (__arm_srshr): Likewise.
12476 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
12478 (UQSHL_QUALIFIERS): Likewise.
12479 (ASRL_QUALIFIERS): Likewise.
12480 (SQSHL_QUALIFIERS): Likewise.
12481 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
12482 (mve_sqrshrl_sat<supf>_di): Likewise.
12483 (mve_uqrshl_si): Likewise.
12484 (mve_sqrshr_si): Likewise.
12485 (mve_uqshll_di): Likewise.
12486 (mve_urshrl_di): Likewise.
12487 (mve_uqshl_si): Likewise.
12488 (mve_urshr_si): Likewise.
12489 (mve_sqshl_si): Likewise.
12490 (mve_srshr_si): Likewise.
12491 (mve_srshrl_di): Likewise.
12492 (mve_sqshll_di): Likewise.
12494 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12495 Andre Vieira <andre.simoesdiasvieira@arm.com>
12496 Mihail Ionescu <mihail.ionescu@arm.com>
12498 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
12499 (vsetq_lane_f32): Likewise.
12500 (vsetq_lane_s16): Likewise.
12501 (vsetq_lane_s32): Likewise.
12502 (vsetq_lane_s8): Likewise.
12503 (vsetq_lane_s64): Likewise.
12504 (vsetq_lane_u8): Likewise.
12505 (vsetq_lane_u16): Likewise.
12506 (vsetq_lane_u32): Likewise.
12507 (vsetq_lane_u64): Likewise.
12508 (vgetq_lane_f16): Likewise.
12509 (vgetq_lane_f32): Likewise.
12510 (vgetq_lane_s16): Likewise.
12511 (vgetq_lane_s32): Likewise.
12512 (vgetq_lane_s8): Likewise.
12513 (vgetq_lane_s64): Likewise.
12514 (vgetq_lane_u8): Likewise.
12515 (vgetq_lane_u16): Likewise.
12516 (vgetq_lane_u32): Likewise.
12517 (vgetq_lane_u64): Likewise.
12518 (__ARM_NUM_LANES): Likewise.
12519 (__ARM_LANEQ): Likewise.
12520 (__ARM_CHECK_LANEQ): Likewise.
12521 (__arm_vsetq_lane_s16): Define intrinsic.
12522 (__arm_vsetq_lane_s32): Likewise.
12523 (__arm_vsetq_lane_s8): Likewise.
12524 (__arm_vsetq_lane_s64): Likewise.
12525 (__arm_vsetq_lane_u8): Likewise.
12526 (__arm_vsetq_lane_u16): Likewise.
12527 (__arm_vsetq_lane_u32): Likewise.
12528 (__arm_vsetq_lane_u64): Likewise.
12529 (__arm_vgetq_lane_s16): Likewise.
12530 (__arm_vgetq_lane_s32): Likewise.
12531 (__arm_vgetq_lane_s8): Likewise.
12532 (__arm_vgetq_lane_s64): Likewise.
12533 (__arm_vgetq_lane_u8): Likewise.
12534 (__arm_vgetq_lane_u16): Likewise.
12535 (__arm_vgetq_lane_u32): Likewise.
12536 (__arm_vgetq_lane_u64): Likewise.
12537 (__arm_vsetq_lane_f16): Likewise.
12538 (__arm_vsetq_lane_f32): Likewise.
12539 (__arm_vgetq_lane_f16): Likewise.
12540 (__arm_vgetq_lane_f32): Likewise.
12541 (vgetq_lane): Define polymorphic variant.
12542 (vsetq_lane): Likewise.
12543 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
12545 (mve_vec_extractv2didi): Likewise.
12546 (mve_vec_extract_sext_internal<mode>): Likewise.
12547 (mve_vec_extract_zext_internal<mode>): Likewise.
12548 (mve_vec_set<mode>_internal): Likewise.
12549 (mve_vec_setv2di_internal): Likewise.
12550 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
12552 (vec_extract<mode><V_elem_l>): Rename to
12553 "neon_vec_extract<mode><V_elem_l>".
12554 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
12555 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
12556 pattern common for MVE and NEON.
12557 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
12560 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
12562 * config/arm/mve.md (earlyclobber_32): New mode attribute.
12563 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
12564 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
12566 2020-03-23 Richard Biener <rguenther@suse.de>
12568 PR tree-optimization/94261
12569 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
12570 IL operand swapping code.
12571 (vect_slp_rearrange_stmts): Do not arrange isomorphic
12572 nodes that would need operation code adjustments.
12574 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
12576 * doc/install.texi (amdgcn-*-amdhsa): Renamed
12577 from amdgcn-unknown-amdhsa; change
12578 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
12580 2020-03-23 Richard Biener <rguenther@suse.de>
12583 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
12584 directly rather than also folding it via build_fold_addr_expr.
12586 2020-03-23 Richard Biener <rguenther@suse.de>
12588 PR tree-optimization/94266
12589 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
12590 addresses of TARGET_MEM_REFs.
12592 2020-03-23 Martin Liska <mliska@suse.cz>
12595 * symtab.c (symtab_node::clone_references): Save speculative_id
12596 as ref may be overwritten by create_reference.
12597 (symtab_node::clone_referring): Likewise.
12598 (symtab_node::clone_reference): Likewise.
12600 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
12602 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
12603 references to Darwin.
12604 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
12605 unconditionally and comment on why.
12607 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
12609 * config/darwin.c (darwin_mergeable_constant_section): Collect
12610 section anchor checks into the caller.
12611 (machopic_select_section): Collect section anchor checks into
12612 the determination of 'effective zero-size' objects. When the
12613 size is unknown, assume it is non-zero, and thus return the
12614 'generic' section for the DECL.
12616 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
12619 * config/darwin.opt: Amend options descriptions.
12621 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
12623 PR rtl-optimization/94052
12624 * lra-constraints.c (simplify_operand_subreg): Reload the inner
12625 register of a paradoxical subreg if simplify_subreg_regno fails
12626 to give a valid hard register for the outer mode.
12628 2020-03-20 Martin Jambor <mjambor@suse.cz>
12630 PR tree-optimization/93435
12631 * params.opt (sra-max-propagations): New parameter.
12632 * tree-sra.c (propagation_budget): New variable.
12633 (budget_for_propagation_access): New function.
12634 (propagate_subaccesses_from_rhs): Use it.
12635 (propagate_subaccesses_from_lhs): Likewise.
12636 (propagate_all_subaccesses): Set up and destroy propagation_budget.
12638 2020-03-20 Carl Love <cel@us.ibm.com>
12641 * config/rs6000/rs6000.c (rs6000_option_override_internal):
12642 Add check for TARGET_FPRND for Power 7 or newer.
12644 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
12647 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
12648 (cgraph_edge::redirect_callee): Move here; likewise.
12649 (cgraph_node::remove_callees): Update calls_comdat_local flag.
12650 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
12652 (cgraph_node::check_calls_comdat_local_p): New member function.
12653 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
12654 (cgraph_edge::redirect_callee): Move offline.
12655 * ipa-fnsummary.c (compute_fn_summary): Do not compute
12656 calls_comdat_local flag here.
12657 * ipa-inline-transform.c (inline_call): Fix updating of
12658 calls_comdat_local flag.
12659 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
12660 * symtab.c (symtab_node::add_to_same_comdat_group): Update
12661 calls_comdat_local flag.
12663 2020-03-20 Richard Biener <rguenther@suse.de>
12665 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
12666 from the possibly modified root.
12668 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12669 Andre Vieira <andre.simoesdiasvieira@arm.com>
12670 Mihail Ionescu <mihail.ionescu@arm.com>
12672 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
12673 (vst1q_p_s8): Likewise.
12674 (vst2q_s8): Likewise.
12675 (vst2q_u8): Likewise.
12676 (vld1q_z_u8): Likewise.
12677 (vld1q_z_s8): Likewise.
12678 (vld2q_s8): Likewise.
12679 (vld2q_u8): Likewise.
12680 (vld4q_s8): Likewise.
12681 (vld4q_u8): Likewise.
12682 (vst1q_p_u16): Likewise.
12683 (vst1q_p_s16): Likewise.
12684 (vst2q_s16): Likewise.
12685 (vst2q_u16): Likewise.
12686 (vld1q_z_u16): Likewise.
12687 (vld1q_z_s16): Likewise.
12688 (vld2q_s16): Likewise.
12689 (vld2q_u16): Likewise.
12690 (vld4q_s16): Likewise.
12691 (vld4q_u16): Likewise.
12692 (vst1q_p_u32): Likewise.
12693 (vst1q_p_s32): Likewise.
12694 (vst2q_s32): Likewise.
12695 (vst2q_u32): Likewise.
12696 (vld1q_z_u32): Likewise.
12697 (vld1q_z_s32): Likewise.
12698 (vld2q_s32): Likewise.
12699 (vld2q_u32): Likewise.
12700 (vld4q_s32): Likewise.
12701 (vld4q_u32): Likewise.
12702 (vld4q_f16): Likewise.
12703 (vld2q_f16): Likewise.
12704 (vld1q_z_f16): Likewise.
12705 (vst2q_f16): Likewise.
12706 (vst1q_p_f16): Likewise.
12707 (vld4q_f32): Likewise.
12708 (vld2q_f32): Likewise.
12709 (vld1q_z_f32): Likewise.
12710 (vst2q_f32): Likewise.
12711 (vst1q_p_f32): Likewise.
12712 (__arm_vst1q_p_u8): Define intrinsic.
12713 (__arm_vst1q_p_s8): Likewise.
12714 (__arm_vst2q_s8): Likewise.
12715 (__arm_vst2q_u8): Likewise.
12716 (__arm_vld1q_z_u8): Likewise.
12717 (__arm_vld1q_z_s8): Likewise.
12718 (__arm_vld2q_s8): Likewise.
12719 (__arm_vld2q_u8): Likewise.
12720 (__arm_vld4q_s8): Likewise.
12721 (__arm_vld4q_u8): Likewise.
12722 (__arm_vst1q_p_u16): Likewise.
12723 (__arm_vst1q_p_s16): Likewise.
12724 (__arm_vst2q_s16): Likewise.
12725 (__arm_vst2q_u16): Likewise.
12726 (__arm_vld1q_z_u16): Likewise.
12727 (__arm_vld1q_z_s16): Likewise.
12728 (__arm_vld2q_s16): Likewise.
12729 (__arm_vld2q_u16): Likewise.
12730 (__arm_vld4q_s16): Likewise.
12731 (__arm_vld4q_u16): Likewise.
12732 (__arm_vst1q_p_u32): Likewise.
12733 (__arm_vst1q_p_s32): Likewise.
12734 (__arm_vst2q_s32): Likewise.
12735 (__arm_vst2q_u32): Likewise.
12736 (__arm_vld1q_z_u32): Likewise.
12737 (__arm_vld1q_z_s32): Likewise.
12738 (__arm_vld2q_s32): Likewise.
12739 (__arm_vld2q_u32): Likewise.
12740 (__arm_vld4q_s32): Likewise.
12741 (__arm_vld4q_u32): Likewise.
12742 (__arm_vld4q_f16): Likewise.
12743 (__arm_vld2q_f16): Likewise.
12744 (__arm_vld1q_z_f16): Likewise.
12745 (__arm_vst2q_f16): Likewise.
12746 (__arm_vst1q_p_f16): Likewise.
12747 (__arm_vld4q_f32): Likewise.
12748 (__arm_vld2q_f32): Likewise.
12749 (__arm_vld1q_z_f32): Likewise.
12750 (__arm_vst2q_f32): Likewise.
12751 (__arm_vst1q_p_f32): Likewise.
12752 (vld1q_z): Define polymorphic variant.
12755 (vst1q_p): Likewise.
12757 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
12759 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
12760 (mve_vld2q<mode>): Likewise.
12761 (mve_vld4q<mode>): Likewise.
12763 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12764 Andre Vieira <andre.simoesdiasvieira@arm.com>
12765 Mihail Ionescu <mihail.ionescu@arm.com>
12767 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
12768 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
12769 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
12770 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
12771 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
12772 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
12773 * config/arm/arm_mve.h (vadciq_s32): Define macro.
12774 (vadciq_u32): Likewise.
12775 (vadciq_m_s32): Likewise.
12776 (vadciq_m_u32): Likewise.
12777 (vadcq_s32): Likewise.
12778 (vadcq_u32): Likewise.
12779 (vadcq_m_s32): Likewise.
12780 (vadcq_m_u32): Likewise.
12781 (vsbciq_s32): Likewise.
12782 (vsbciq_u32): Likewise.
12783 (vsbciq_m_s32): Likewise.
12784 (vsbciq_m_u32): Likewise.
12785 (vsbcq_s32): Likewise.
12786 (vsbcq_u32): Likewise.
12787 (vsbcq_m_s32): Likewise.
12788 (vsbcq_m_u32): Likewise.
12789 (__arm_vadciq_s32): Define intrinsic.
12790 (__arm_vadciq_u32): Likewise.
12791 (__arm_vadciq_m_s32): Likewise.
12792 (__arm_vadciq_m_u32): Likewise.
12793 (__arm_vadcq_s32): Likewise.
12794 (__arm_vadcq_u32): Likewise.
12795 (__arm_vadcq_m_s32): Likewise.
12796 (__arm_vadcq_m_u32): Likewise.
12797 (__arm_vsbciq_s32): Likewise.
12798 (__arm_vsbciq_u32): Likewise.
12799 (__arm_vsbciq_m_s32): Likewise.
12800 (__arm_vsbciq_m_u32): Likewise.
12801 (__arm_vsbcq_s32): Likewise.
12802 (__arm_vsbcq_u32): Likewise.
12803 (__arm_vsbcq_m_s32): Likewise.
12804 (__arm_vsbcq_m_u32): Likewise.
12805 (vadciq_m): Define polymorphic variant.
12806 (vadciq): Likewise.
12807 (vadcq_m): Likewise.
12809 (vsbciq_m): Likewise.
12810 (vsbciq): Likewise.
12811 (vsbcq_m): Likewise.
12813 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
12815 (BINOP_UNONE_UNONE_UNONE): Likewise.
12816 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
12817 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
12818 * config/arm/mve.md (VADCIQ): Define iterator.
12819 (VADCIQ_M): Likewise.
12821 (VSBCQ_M): Likewise.
12822 (VSBCIQ): Likewise.
12823 (VSBCIQ_M): Likewise.
12825 (VADCQ_M): Likewise.
12826 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
12827 (mve_vadciq_<supf>v4si): Likewise.
12828 (mve_vadcq_m_<supf>v4si): Likewise.
12829 (mve_vadcq_<supf>v4si): Likewise.
12830 (mve_vsbciq_m_<supf>v4si): Likewise.
12831 (mve_vsbciq_<supf>v4si): Likewise.
12832 (mve_vsbcq_m_<supf>v4si): Likewise.
12833 (mve_vsbcq_<supf>v4si): Likewise.
12834 (get_fpscr_nzcvqc): Define isns.
12835 (set_fpscr_nzcvqc): Define isns.
12836 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
12837 (UNSPEC_SET_FPSCR_NZCVQC): Define.
12839 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12841 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
12842 (vddupq_x_n_u16): Likewise.
12843 (vddupq_x_n_u32): Likewise.
12844 (vddupq_x_wb_u8): Likewise.
12845 (vddupq_x_wb_u16): Likewise.
12846 (vddupq_x_wb_u32): Likewise.
12847 (vdwdupq_x_n_u8): Likewise.
12848 (vdwdupq_x_n_u16): Likewise.
12849 (vdwdupq_x_n_u32): Likewise.
12850 (vdwdupq_x_wb_u8): Likewise.
12851 (vdwdupq_x_wb_u16): Likewise.
12852 (vdwdupq_x_wb_u32): Likewise.
12853 (vidupq_x_n_u8): Likewise.
12854 (vidupq_x_n_u16): Likewise.
12855 (vidupq_x_n_u32): Likewise.
12856 (vidupq_x_wb_u8): Likewise.
12857 (vidupq_x_wb_u16): Likewise.
12858 (vidupq_x_wb_u32): Likewise.
12859 (viwdupq_x_n_u8): Likewise.
12860 (viwdupq_x_n_u16): Likewise.
12861 (viwdupq_x_n_u32): Likewise.
12862 (viwdupq_x_wb_u8): Likewise.
12863 (viwdupq_x_wb_u16): Likewise.
12864 (viwdupq_x_wb_u32): Likewise.
12865 (vdupq_x_n_s8): Likewise.
12866 (vdupq_x_n_s16): Likewise.
12867 (vdupq_x_n_s32): Likewise.
12868 (vdupq_x_n_u8): Likewise.
12869 (vdupq_x_n_u16): Likewise.
12870 (vdupq_x_n_u32): Likewise.
12871 (vminq_x_s8): Likewise.
12872 (vminq_x_s16): Likewise.
12873 (vminq_x_s32): Likewise.
12874 (vminq_x_u8): Likewise.
12875 (vminq_x_u16): Likewise.
12876 (vminq_x_u32): Likewise.
12877 (vmaxq_x_s8): Likewise.
12878 (vmaxq_x_s16): Likewise.
12879 (vmaxq_x_s32): Likewise.
12880 (vmaxq_x_u8): Likewise.
12881 (vmaxq_x_u16): Likewise.
12882 (vmaxq_x_u32): Likewise.
12883 (vabdq_x_s8): Likewise.
12884 (vabdq_x_s16): Likewise.
12885 (vabdq_x_s32): Likewise.
12886 (vabdq_x_u8): Likewise.
12887 (vabdq_x_u16): Likewise.
12888 (vabdq_x_u32): Likewise.
12889 (vabsq_x_s8): Likewise.
12890 (vabsq_x_s16): Likewise.
12891 (vabsq_x_s32): Likewise.
12892 (vaddq_x_s8): Likewise.
12893 (vaddq_x_s16): Likewise.
12894 (vaddq_x_s32): Likewise.
12895 (vaddq_x_n_s8): Likewise.
12896 (vaddq_x_n_s16): Likewise.
12897 (vaddq_x_n_s32): Likewise.
12898 (vaddq_x_u8): Likewise.
12899 (vaddq_x_u16): Likewise.
12900 (vaddq_x_u32): Likewise.
12901 (vaddq_x_n_u8): Likewise.
12902 (vaddq_x_n_u16): Likewise.
12903 (vaddq_x_n_u32): Likewise.
12904 (vclsq_x_s8): Likewise.
12905 (vclsq_x_s16): Likewise.
12906 (vclsq_x_s32): Likewise.
12907 (vclzq_x_s8): Likewise.
12908 (vclzq_x_s16): Likewise.
12909 (vclzq_x_s32): Likewise.
12910 (vclzq_x_u8): Likewise.
12911 (vclzq_x_u16): Likewise.
12912 (vclzq_x_u32): Likewise.
12913 (vnegq_x_s8): Likewise.
12914 (vnegq_x_s16): Likewise.
12915 (vnegq_x_s32): Likewise.
12916 (vmulhq_x_s8): Likewise.
12917 (vmulhq_x_s16): Likewise.
12918 (vmulhq_x_s32): Likewise.
12919 (vmulhq_x_u8): Likewise.
12920 (vmulhq_x_u16): Likewise.
12921 (vmulhq_x_u32): Likewise.
12922 (vmullbq_poly_x_p8): Likewise.
12923 (vmullbq_poly_x_p16): Likewise.
12924 (vmullbq_int_x_s8): Likewise.
12925 (vmullbq_int_x_s16): Likewise.
12926 (vmullbq_int_x_s32): Likewise.
12927 (vmullbq_int_x_u8): Likewise.
12928 (vmullbq_int_x_u16): Likewise.
12929 (vmullbq_int_x_u32): Likewise.
12930 (vmulltq_poly_x_p8): Likewise.
12931 (vmulltq_poly_x_p16): Likewise.
12932 (vmulltq_int_x_s8): Likewise.
12933 (vmulltq_int_x_s16): Likewise.
12934 (vmulltq_int_x_s32): Likewise.
12935 (vmulltq_int_x_u8): Likewise.
12936 (vmulltq_int_x_u16): Likewise.
12937 (vmulltq_int_x_u32): Likewise.
12938 (vmulq_x_s8): Likewise.
12939 (vmulq_x_s16): Likewise.
12940 (vmulq_x_s32): Likewise.
12941 (vmulq_x_n_s8): Likewise.
12942 (vmulq_x_n_s16): Likewise.
12943 (vmulq_x_n_s32): Likewise.
12944 (vmulq_x_u8): Likewise.
12945 (vmulq_x_u16): Likewise.
12946 (vmulq_x_u32): Likewise.
12947 (vmulq_x_n_u8): Likewise.
12948 (vmulq_x_n_u16): Likewise.
12949 (vmulq_x_n_u32): Likewise.
12950 (vsubq_x_s8): Likewise.
12951 (vsubq_x_s16): Likewise.
12952 (vsubq_x_s32): Likewise.
12953 (vsubq_x_n_s8): Likewise.
12954 (vsubq_x_n_s16): Likewise.
12955 (vsubq_x_n_s32): Likewise.
12956 (vsubq_x_u8): Likewise.
12957 (vsubq_x_u16): Likewise.
12958 (vsubq_x_u32): Likewise.
12959 (vsubq_x_n_u8): Likewise.
12960 (vsubq_x_n_u16): Likewise.
12961 (vsubq_x_n_u32): Likewise.
12962 (vcaddq_rot90_x_s8): Likewise.
12963 (vcaddq_rot90_x_s16): Likewise.
12964 (vcaddq_rot90_x_s32): Likewise.
12965 (vcaddq_rot90_x_u8): Likewise.
12966 (vcaddq_rot90_x_u16): Likewise.
12967 (vcaddq_rot90_x_u32): Likewise.
12968 (vcaddq_rot270_x_s8): Likewise.
12969 (vcaddq_rot270_x_s16): Likewise.
12970 (vcaddq_rot270_x_s32): Likewise.
12971 (vcaddq_rot270_x_u8): Likewise.
12972 (vcaddq_rot270_x_u16): Likewise.
12973 (vcaddq_rot270_x_u32): Likewise.
12974 (vhaddq_x_n_s8): Likewise.
12975 (vhaddq_x_n_s16): Likewise.
12976 (vhaddq_x_n_s32): Likewise.
12977 (vhaddq_x_n_u8): Likewise.
12978 (vhaddq_x_n_u16): Likewise.
12979 (vhaddq_x_n_u32): Likewise.
12980 (vhaddq_x_s8): Likewise.
12981 (vhaddq_x_s16): Likewise.
12982 (vhaddq_x_s32): Likewise.
12983 (vhaddq_x_u8): Likewise.
12984 (vhaddq_x_u16): Likewise.
12985 (vhaddq_x_u32): Likewise.
12986 (vhcaddq_rot90_x_s8): Likewise.
12987 (vhcaddq_rot90_x_s16): Likewise.
12988 (vhcaddq_rot90_x_s32): Likewise.
12989 (vhcaddq_rot270_x_s8): Likewise.
12990 (vhcaddq_rot270_x_s16): Likewise.
12991 (vhcaddq_rot270_x_s32): Likewise.
12992 (vhsubq_x_n_s8): Likewise.
12993 (vhsubq_x_n_s16): Likewise.
12994 (vhsubq_x_n_s32): Likewise.
12995 (vhsubq_x_n_u8): Likewise.
12996 (vhsubq_x_n_u16): Likewise.
12997 (vhsubq_x_n_u32): Likewise.
12998 (vhsubq_x_s8): Likewise.
12999 (vhsubq_x_s16): Likewise.
13000 (vhsubq_x_s32): Likewise.
13001 (vhsubq_x_u8): Likewise.
13002 (vhsubq_x_u16): Likewise.
13003 (vhsubq_x_u32): Likewise.
13004 (vrhaddq_x_s8): Likewise.
13005 (vrhaddq_x_s16): Likewise.
13006 (vrhaddq_x_s32): Likewise.
13007 (vrhaddq_x_u8): Likewise.
13008 (vrhaddq_x_u16): Likewise.
13009 (vrhaddq_x_u32): Likewise.
13010 (vrmulhq_x_s8): Likewise.
13011 (vrmulhq_x_s16): Likewise.
13012 (vrmulhq_x_s32): Likewise.
13013 (vrmulhq_x_u8): Likewise.
13014 (vrmulhq_x_u16): Likewise.
13015 (vrmulhq_x_u32): Likewise.
13016 (vandq_x_s8): Likewise.
13017 (vandq_x_s16): Likewise.
13018 (vandq_x_s32): Likewise.
13019 (vandq_x_u8): Likewise.
13020 (vandq_x_u16): Likewise.
13021 (vandq_x_u32): Likewise.
13022 (vbicq_x_s8): Likewise.
13023 (vbicq_x_s16): Likewise.
13024 (vbicq_x_s32): Likewise.
13025 (vbicq_x_u8): Likewise.
13026 (vbicq_x_u16): Likewise.
13027 (vbicq_x_u32): Likewise.
13028 (vbrsrq_x_n_s8): Likewise.
13029 (vbrsrq_x_n_s16): Likewise.
13030 (vbrsrq_x_n_s32): Likewise.
13031 (vbrsrq_x_n_u8): Likewise.
13032 (vbrsrq_x_n_u16): Likewise.
13033 (vbrsrq_x_n_u32): Likewise.
13034 (veorq_x_s8): Likewise.
13035 (veorq_x_s16): Likewise.
13036 (veorq_x_s32): Likewise.
13037 (veorq_x_u8): Likewise.
13038 (veorq_x_u16): Likewise.
13039 (veorq_x_u32): Likewise.
13040 (vmovlbq_x_s8): Likewise.
13041 (vmovlbq_x_s16): Likewise.
13042 (vmovlbq_x_u8): Likewise.
13043 (vmovlbq_x_u16): Likewise.
13044 (vmovltq_x_s8): Likewise.
13045 (vmovltq_x_s16): Likewise.
13046 (vmovltq_x_u8): Likewise.
13047 (vmovltq_x_u16): Likewise.
13048 (vmvnq_x_s8): Likewise.
13049 (vmvnq_x_s16): Likewise.
13050 (vmvnq_x_s32): Likewise.
13051 (vmvnq_x_u8): Likewise.
13052 (vmvnq_x_u16): Likewise.
13053 (vmvnq_x_u32): Likewise.
13054 (vmvnq_x_n_s16): Likewise.
13055 (vmvnq_x_n_s32): Likewise.
13056 (vmvnq_x_n_u16): Likewise.
13057 (vmvnq_x_n_u32): Likewise.
13058 (vornq_x_s8): Likewise.
13059 (vornq_x_s16): Likewise.
13060 (vornq_x_s32): Likewise.
13061 (vornq_x_u8): Likewise.
13062 (vornq_x_u16): Likewise.
13063 (vornq_x_u32): Likewise.
13064 (vorrq_x_s8): Likewise.
13065 (vorrq_x_s16): Likewise.
13066 (vorrq_x_s32): Likewise.
13067 (vorrq_x_u8): Likewise.
13068 (vorrq_x_u16): Likewise.
13069 (vorrq_x_u32): Likewise.
13070 (vrev16q_x_s8): Likewise.
13071 (vrev16q_x_u8): Likewise.
13072 (vrev32q_x_s8): Likewise.
13073 (vrev32q_x_s16): Likewise.
13074 (vrev32q_x_u8): Likewise.
13075 (vrev32q_x_u16): Likewise.
13076 (vrev64q_x_s8): Likewise.
13077 (vrev64q_x_s16): Likewise.
13078 (vrev64q_x_s32): Likewise.
13079 (vrev64q_x_u8): Likewise.
13080 (vrev64q_x_u16): Likewise.
13081 (vrev64q_x_u32): Likewise.
13082 (vrshlq_x_s8): Likewise.
13083 (vrshlq_x_s16): Likewise.
13084 (vrshlq_x_s32): Likewise.
13085 (vrshlq_x_u8): Likewise.
13086 (vrshlq_x_u16): Likewise.
13087 (vrshlq_x_u32): Likewise.
13088 (vshllbq_x_n_s8): Likewise.
13089 (vshllbq_x_n_s16): Likewise.
13090 (vshllbq_x_n_u8): Likewise.
13091 (vshllbq_x_n_u16): Likewise.
13092 (vshlltq_x_n_s8): Likewise.
13093 (vshlltq_x_n_s16): Likewise.
13094 (vshlltq_x_n_u8): Likewise.
13095 (vshlltq_x_n_u16): Likewise.
13096 (vshlq_x_s8): Likewise.
13097 (vshlq_x_s16): Likewise.
13098 (vshlq_x_s32): Likewise.
13099 (vshlq_x_u8): Likewise.
13100 (vshlq_x_u16): Likewise.
13101 (vshlq_x_u32): Likewise.
13102 (vshlq_x_n_s8): Likewise.
13103 (vshlq_x_n_s16): Likewise.
13104 (vshlq_x_n_s32): Likewise.
13105 (vshlq_x_n_u8): Likewise.
13106 (vshlq_x_n_u16): Likewise.
13107 (vshlq_x_n_u32): Likewise.
13108 (vrshrq_x_n_s8): Likewise.
13109 (vrshrq_x_n_s16): Likewise.
13110 (vrshrq_x_n_s32): Likewise.
13111 (vrshrq_x_n_u8): Likewise.
13112 (vrshrq_x_n_u16): Likewise.
13113 (vrshrq_x_n_u32): Likewise.
13114 (vshrq_x_n_s8): Likewise.
13115 (vshrq_x_n_s16): Likewise.
13116 (vshrq_x_n_s32): Likewise.
13117 (vshrq_x_n_u8): Likewise.
13118 (vshrq_x_n_u16): Likewise.
13119 (vshrq_x_n_u32): Likewise.
13120 (vdupq_x_n_f16): Likewise.
13121 (vdupq_x_n_f32): Likewise.
13122 (vminnmq_x_f16): Likewise.
13123 (vminnmq_x_f32): Likewise.
13124 (vmaxnmq_x_f16): Likewise.
13125 (vmaxnmq_x_f32): Likewise.
13126 (vabdq_x_f16): Likewise.
13127 (vabdq_x_f32): Likewise.
13128 (vabsq_x_f16): Likewise.
13129 (vabsq_x_f32): Likewise.
13130 (vaddq_x_f16): Likewise.
13131 (vaddq_x_f32): Likewise.
13132 (vaddq_x_n_f16): Likewise.
13133 (vaddq_x_n_f32): Likewise.
13134 (vnegq_x_f16): Likewise.
13135 (vnegq_x_f32): Likewise.
13136 (vmulq_x_f16): Likewise.
13137 (vmulq_x_f32): Likewise.
13138 (vmulq_x_n_f16): Likewise.
13139 (vmulq_x_n_f32): Likewise.
13140 (vsubq_x_f16): Likewise.
13141 (vsubq_x_f32): Likewise.
13142 (vsubq_x_n_f16): Likewise.
13143 (vsubq_x_n_f32): Likewise.
13144 (vcaddq_rot90_x_f16): Likewise.
13145 (vcaddq_rot90_x_f32): Likewise.
13146 (vcaddq_rot270_x_f16): Likewise.
13147 (vcaddq_rot270_x_f32): Likewise.
13148 (vcmulq_x_f16): Likewise.
13149 (vcmulq_x_f32): Likewise.
13150 (vcmulq_rot90_x_f16): Likewise.
13151 (vcmulq_rot90_x_f32): Likewise.
13152 (vcmulq_rot180_x_f16): Likewise.
13153 (vcmulq_rot180_x_f32): Likewise.
13154 (vcmulq_rot270_x_f16): Likewise.
13155 (vcmulq_rot270_x_f32): Likewise.
13156 (vcvtaq_x_s16_f16): Likewise.
13157 (vcvtaq_x_s32_f32): Likewise.
13158 (vcvtaq_x_u16_f16): Likewise.
13159 (vcvtaq_x_u32_f32): Likewise.
13160 (vcvtnq_x_s16_f16): Likewise.
13161 (vcvtnq_x_s32_f32): Likewise.
13162 (vcvtnq_x_u16_f16): Likewise.
13163 (vcvtnq_x_u32_f32): Likewise.
13164 (vcvtpq_x_s16_f16): Likewise.
13165 (vcvtpq_x_s32_f32): Likewise.
13166 (vcvtpq_x_u16_f16): Likewise.
13167 (vcvtpq_x_u32_f32): Likewise.
13168 (vcvtmq_x_s16_f16): Likewise.
13169 (vcvtmq_x_s32_f32): Likewise.
13170 (vcvtmq_x_u16_f16): Likewise.
13171 (vcvtmq_x_u32_f32): Likewise.
13172 (vcvtbq_x_f32_f16): Likewise.
13173 (vcvttq_x_f32_f16): Likewise.
13174 (vcvtq_x_f16_u16): Likewise.
13175 (vcvtq_x_f16_s16): Likewise.
13176 (vcvtq_x_f32_s32): Likewise.
13177 (vcvtq_x_f32_u32): Likewise.
13178 (vcvtq_x_n_f16_s16): Likewise.
13179 (vcvtq_x_n_f16_u16): Likewise.
13180 (vcvtq_x_n_f32_s32): Likewise.
13181 (vcvtq_x_n_f32_u32): Likewise.
13182 (vcvtq_x_s16_f16): Likewise.
13183 (vcvtq_x_s32_f32): Likewise.
13184 (vcvtq_x_u16_f16): Likewise.
13185 (vcvtq_x_u32_f32): Likewise.
13186 (vcvtq_x_n_s16_f16): Likewise.
13187 (vcvtq_x_n_s32_f32): Likewise.
13188 (vcvtq_x_n_u16_f16): Likewise.
13189 (vcvtq_x_n_u32_f32): Likewise.
13190 (vrndq_x_f16): Likewise.
13191 (vrndq_x_f32): Likewise.
13192 (vrndnq_x_f16): Likewise.
13193 (vrndnq_x_f32): Likewise.
13194 (vrndmq_x_f16): Likewise.
13195 (vrndmq_x_f32): Likewise.
13196 (vrndpq_x_f16): Likewise.
13197 (vrndpq_x_f32): Likewise.
13198 (vrndaq_x_f16): Likewise.
13199 (vrndaq_x_f32): Likewise.
13200 (vrndxq_x_f16): Likewise.
13201 (vrndxq_x_f32): Likewise.
13202 (vandq_x_f16): Likewise.
13203 (vandq_x_f32): Likewise.
13204 (vbicq_x_f16): Likewise.
13205 (vbicq_x_f32): Likewise.
13206 (vbrsrq_x_n_f16): Likewise.
13207 (vbrsrq_x_n_f32): Likewise.
13208 (veorq_x_f16): Likewise.
13209 (veorq_x_f32): Likewise.
13210 (vornq_x_f16): Likewise.
13211 (vornq_x_f32): Likewise.
13212 (vorrq_x_f16): Likewise.
13213 (vorrq_x_f32): Likewise.
13214 (vrev32q_x_f16): Likewise.
13215 (vrev64q_x_f16): Likewise.
13216 (vrev64q_x_f32): Likewise.
13217 (__arm_vddupq_x_n_u8): Define intrinsic.
13218 (__arm_vddupq_x_n_u16): Likewise.
13219 (__arm_vddupq_x_n_u32): Likewise.
13220 (__arm_vddupq_x_wb_u8): Likewise.
13221 (__arm_vddupq_x_wb_u16): Likewise.
13222 (__arm_vddupq_x_wb_u32): Likewise.
13223 (__arm_vdwdupq_x_n_u8): Likewise.
13224 (__arm_vdwdupq_x_n_u16): Likewise.
13225 (__arm_vdwdupq_x_n_u32): Likewise.
13226 (__arm_vdwdupq_x_wb_u8): Likewise.
13227 (__arm_vdwdupq_x_wb_u16): Likewise.
13228 (__arm_vdwdupq_x_wb_u32): Likewise.
13229 (__arm_vidupq_x_n_u8): Likewise.
13230 (__arm_vidupq_x_n_u16): Likewise.
13231 (__arm_vidupq_x_n_u32): Likewise.
13232 (__arm_vidupq_x_wb_u8): Likewise.
13233 (__arm_vidupq_x_wb_u16): Likewise.
13234 (__arm_vidupq_x_wb_u32): Likewise.
13235 (__arm_viwdupq_x_n_u8): Likewise.
13236 (__arm_viwdupq_x_n_u16): Likewise.
13237 (__arm_viwdupq_x_n_u32): Likewise.
13238 (__arm_viwdupq_x_wb_u8): Likewise.
13239 (__arm_viwdupq_x_wb_u16): Likewise.
13240 (__arm_viwdupq_x_wb_u32): Likewise.
13241 (__arm_vdupq_x_n_s8): Likewise.
13242 (__arm_vdupq_x_n_s16): Likewise.
13243 (__arm_vdupq_x_n_s32): Likewise.
13244 (__arm_vdupq_x_n_u8): Likewise.
13245 (__arm_vdupq_x_n_u16): Likewise.
13246 (__arm_vdupq_x_n_u32): Likewise.
13247 (__arm_vminq_x_s8): Likewise.
13248 (__arm_vminq_x_s16): Likewise.
13249 (__arm_vminq_x_s32): Likewise.
13250 (__arm_vminq_x_u8): Likewise.
13251 (__arm_vminq_x_u16): Likewise.
13252 (__arm_vminq_x_u32): Likewise.
13253 (__arm_vmaxq_x_s8): Likewise.
13254 (__arm_vmaxq_x_s16): Likewise.
13255 (__arm_vmaxq_x_s32): Likewise.
13256 (__arm_vmaxq_x_u8): Likewise.
13257 (__arm_vmaxq_x_u16): Likewise.
13258 (__arm_vmaxq_x_u32): Likewise.
13259 (__arm_vabdq_x_s8): Likewise.
13260 (__arm_vabdq_x_s16): Likewise.
13261 (__arm_vabdq_x_s32): Likewise.
13262 (__arm_vabdq_x_u8): Likewise.
13263 (__arm_vabdq_x_u16): Likewise.
13264 (__arm_vabdq_x_u32): Likewise.
13265 (__arm_vabsq_x_s8): Likewise.
13266 (__arm_vabsq_x_s16): Likewise.
13267 (__arm_vabsq_x_s32): Likewise.
13268 (__arm_vaddq_x_s8): Likewise.
13269 (__arm_vaddq_x_s16): Likewise.
13270 (__arm_vaddq_x_s32): Likewise.
13271 (__arm_vaddq_x_n_s8): Likewise.
13272 (__arm_vaddq_x_n_s16): Likewise.
13273 (__arm_vaddq_x_n_s32): Likewise.
13274 (__arm_vaddq_x_u8): Likewise.
13275 (__arm_vaddq_x_u16): Likewise.
13276 (__arm_vaddq_x_u32): Likewise.
13277 (__arm_vaddq_x_n_u8): Likewise.
13278 (__arm_vaddq_x_n_u16): Likewise.
13279 (__arm_vaddq_x_n_u32): Likewise.
13280 (__arm_vclsq_x_s8): Likewise.
13281 (__arm_vclsq_x_s16): Likewise.
13282 (__arm_vclsq_x_s32): Likewise.
13283 (__arm_vclzq_x_s8): Likewise.
13284 (__arm_vclzq_x_s16): Likewise.
13285 (__arm_vclzq_x_s32): Likewise.
13286 (__arm_vclzq_x_u8): Likewise.
13287 (__arm_vclzq_x_u16): Likewise.
13288 (__arm_vclzq_x_u32): Likewise.
13289 (__arm_vnegq_x_s8): Likewise.
13290 (__arm_vnegq_x_s16): Likewise.
13291 (__arm_vnegq_x_s32): Likewise.
13292 (__arm_vmulhq_x_s8): Likewise.
13293 (__arm_vmulhq_x_s16): Likewise.
13294 (__arm_vmulhq_x_s32): Likewise.
13295 (__arm_vmulhq_x_u8): Likewise.
13296 (__arm_vmulhq_x_u16): Likewise.
13297 (__arm_vmulhq_x_u32): Likewise.
13298 (__arm_vmullbq_poly_x_p8): Likewise.
13299 (__arm_vmullbq_poly_x_p16): Likewise.
13300 (__arm_vmullbq_int_x_s8): Likewise.
13301 (__arm_vmullbq_int_x_s16): Likewise.
13302 (__arm_vmullbq_int_x_s32): Likewise.
13303 (__arm_vmullbq_int_x_u8): Likewise.
13304 (__arm_vmullbq_int_x_u16): Likewise.
13305 (__arm_vmullbq_int_x_u32): Likewise.
13306 (__arm_vmulltq_poly_x_p8): Likewise.
13307 (__arm_vmulltq_poly_x_p16): Likewise.
13308 (__arm_vmulltq_int_x_s8): Likewise.
13309 (__arm_vmulltq_int_x_s16): Likewise.
13310 (__arm_vmulltq_int_x_s32): Likewise.
13311 (__arm_vmulltq_int_x_u8): Likewise.
13312 (__arm_vmulltq_int_x_u16): Likewise.
13313 (__arm_vmulltq_int_x_u32): Likewise.
13314 (__arm_vmulq_x_s8): Likewise.
13315 (__arm_vmulq_x_s16): Likewise.
13316 (__arm_vmulq_x_s32): Likewise.
13317 (__arm_vmulq_x_n_s8): Likewise.
13318 (__arm_vmulq_x_n_s16): Likewise.
13319 (__arm_vmulq_x_n_s32): Likewise.
13320 (__arm_vmulq_x_u8): Likewise.
13321 (__arm_vmulq_x_u16): Likewise.
13322 (__arm_vmulq_x_u32): Likewise.
13323 (__arm_vmulq_x_n_u8): Likewise.
13324 (__arm_vmulq_x_n_u16): Likewise.
13325 (__arm_vmulq_x_n_u32): Likewise.
13326 (__arm_vsubq_x_s8): Likewise.
13327 (__arm_vsubq_x_s16): Likewise.
13328 (__arm_vsubq_x_s32): Likewise.
13329 (__arm_vsubq_x_n_s8): Likewise.
13330 (__arm_vsubq_x_n_s16): Likewise.
13331 (__arm_vsubq_x_n_s32): Likewise.
13332 (__arm_vsubq_x_u8): Likewise.
13333 (__arm_vsubq_x_u16): Likewise.
13334 (__arm_vsubq_x_u32): Likewise.
13335 (__arm_vsubq_x_n_u8): Likewise.
13336 (__arm_vsubq_x_n_u16): Likewise.
13337 (__arm_vsubq_x_n_u32): Likewise.
13338 (__arm_vcaddq_rot90_x_s8): Likewise.
13339 (__arm_vcaddq_rot90_x_s16): Likewise.
13340 (__arm_vcaddq_rot90_x_s32): Likewise.
13341 (__arm_vcaddq_rot90_x_u8): Likewise.
13342 (__arm_vcaddq_rot90_x_u16): Likewise.
13343 (__arm_vcaddq_rot90_x_u32): Likewise.
13344 (__arm_vcaddq_rot270_x_s8): Likewise.
13345 (__arm_vcaddq_rot270_x_s16): Likewise.
13346 (__arm_vcaddq_rot270_x_s32): Likewise.
13347 (__arm_vcaddq_rot270_x_u8): Likewise.
13348 (__arm_vcaddq_rot270_x_u16): Likewise.
13349 (__arm_vcaddq_rot270_x_u32): Likewise.
13350 (__arm_vhaddq_x_n_s8): Likewise.
13351 (__arm_vhaddq_x_n_s16): Likewise.
13352 (__arm_vhaddq_x_n_s32): Likewise.
13353 (__arm_vhaddq_x_n_u8): Likewise.
13354 (__arm_vhaddq_x_n_u16): Likewise.
13355 (__arm_vhaddq_x_n_u32): Likewise.
13356 (__arm_vhaddq_x_s8): Likewise.
13357 (__arm_vhaddq_x_s16): Likewise.
13358 (__arm_vhaddq_x_s32): Likewise.
13359 (__arm_vhaddq_x_u8): Likewise.
13360 (__arm_vhaddq_x_u16): Likewise.
13361 (__arm_vhaddq_x_u32): Likewise.
13362 (__arm_vhcaddq_rot90_x_s8): Likewise.
13363 (__arm_vhcaddq_rot90_x_s16): Likewise.
13364 (__arm_vhcaddq_rot90_x_s32): Likewise.
13365 (__arm_vhcaddq_rot270_x_s8): Likewise.
13366 (__arm_vhcaddq_rot270_x_s16): Likewise.
13367 (__arm_vhcaddq_rot270_x_s32): Likewise.
13368 (__arm_vhsubq_x_n_s8): Likewise.
13369 (__arm_vhsubq_x_n_s16): Likewise.
13370 (__arm_vhsubq_x_n_s32): Likewise.
13371 (__arm_vhsubq_x_n_u8): Likewise.
13372 (__arm_vhsubq_x_n_u16): Likewise.
13373 (__arm_vhsubq_x_n_u32): Likewise.
13374 (__arm_vhsubq_x_s8): Likewise.
13375 (__arm_vhsubq_x_s16): Likewise.
13376 (__arm_vhsubq_x_s32): Likewise.
13377 (__arm_vhsubq_x_u8): Likewise.
13378 (__arm_vhsubq_x_u16): Likewise.
13379 (__arm_vhsubq_x_u32): Likewise.
13380 (__arm_vrhaddq_x_s8): Likewise.
13381 (__arm_vrhaddq_x_s16): Likewise.
13382 (__arm_vrhaddq_x_s32): Likewise.
13383 (__arm_vrhaddq_x_u8): Likewise.
13384 (__arm_vrhaddq_x_u16): Likewise.
13385 (__arm_vrhaddq_x_u32): Likewise.
13386 (__arm_vrmulhq_x_s8): Likewise.
13387 (__arm_vrmulhq_x_s16): Likewise.
13388 (__arm_vrmulhq_x_s32): Likewise.
13389 (__arm_vrmulhq_x_u8): Likewise.
13390 (__arm_vrmulhq_x_u16): Likewise.
13391 (__arm_vrmulhq_x_u32): Likewise.
13392 (__arm_vandq_x_s8): Likewise.
13393 (__arm_vandq_x_s16): Likewise.
13394 (__arm_vandq_x_s32): Likewise.
13395 (__arm_vandq_x_u8): Likewise.
13396 (__arm_vandq_x_u16): Likewise.
13397 (__arm_vandq_x_u32): Likewise.
13398 (__arm_vbicq_x_s8): Likewise.
13399 (__arm_vbicq_x_s16): Likewise.
13400 (__arm_vbicq_x_s32): Likewise.
13401 (__arm_vbicq_x_u8): Likewise.
13402 (__arm_vbicq_x_u16): Likewise.
13403 (__arm_vbicq_x_u32): Likewise.
13404 (__arm_vbrsrq_x_n_s8): Likewise.
13405 (__arm_vbrsrq_x_n_s16): Likewise.
13406 (__arm_vbrsrq_x_n_s32): Likewise.
13407 (__arm_vbrsrq_x_n_u8): Likewise.
13408 (__arm_vbrsrq_x_n_u16): Likewise.
13409 (__arm_vbrsrq_x_n_u32): Likewise.
13410 (__arm_veorq_x_s8): Likewise.
13411 (__arm_veorq_x_s16): Likewise.
13412 (__arm_veorq_x_s32): Likewise.
13413 (__arm_veorq_x_u8): Likewise.
13414 (__arm_veorq_x_u16): Likewise.
13415 (__arm_veorq_x_u32): Likewise.
13416 (__arm_vmovlbq_x_s8): Likewise.
13417 (__arm_vmovlbq_x_s16): Likewise.
13418 (__arm_vmovlbq_x_u8): Likewise.
13419 (__arm_vmovlbq_x_u16): Likewise.
13420 (__arm_vmovltq_x_s8): Likewise.
13421 (__arm_vmovltq_x_s16): Likewise.
13422 (__arm_vmovltq_x_u8): Likewise.
13423 (__arm_vmovltq_x_u16): Likewise.
13424 (__arm_vmvnq_x_s8): Likewise.
13425 (__arm_vmvnq_x_s16): Likewise.
13426 (__arm_vmvnq_x_s32): Likewise.
13427 (__arm_vmvnq_x_u8): Likewise.
13428 (__arm_vmvnq_x_u16): Likewise.
13429 (__arm_vmvnq_x_u32): Likewise.
13430 (__arm_vmvnq_x_n_s16): Likewise.
13431 (__arm_vmvnq_x_n_s32): Likewise.
13432 (__arm_vmvnq_x_n_u16): Likewise.
13433 (__arm_vmvnq_x_n_u32): Likewise.
13434 (__arm_vornq_x_s8): Likewise.
13435 (__arm_vornq_x_s16): Likewise.
13436 (__arm_vornq_x_s32): Likewise.
13437 (__arm_vornq_x_u8): Likewise.
13438 (__arm_vornq_x_u16): Likewise.
13439 (__arm_vornq_x_u32): Likewise.
13440 (__arm_vorrq_x_s8): Likewise.
13441 (__arm_vorrq_x_s16): Likewise.
13442 (__arm_vorrq_x_s32): Likewise.
13443 (__arm_vorrq_x_u8): Likewise.
13444 (__arm_vorrq_x_u16): Likewise.
13445 (__arm_vorrq_x_u32): Likewise.
13446 (__arm_vrev16q_x_s8): Likewise.
13447 (__arm_vrev16q_x_u8): Likewise.
13448 (__arm_vrev32q_x_s8): Likewise.
13449 (__arm_vrev32q_x_s16): Likewise.
13450 (__arm_vrev32q_x_u8): Likewise.
13451 (__arm_vrev32q_x_u16): Likewise.
13452 (__arm_vrev64q_x_s8): Likewise.
13453 (__arm_vrev64q_x_s16): Likewise.
13454 (__arm_vrev64q_x_s32): Likewise.
13455 (__arm_vrev64q_x_u8): Likewise.
13456 (__arm_vrev64q_x_u16): Likewise.
13457 (__arm_vrev64q_x_u32): Likewise.
13458 (__arm_vrshlq_x_s8): Likewise.
13459 (__arm_vrshlq_x_s16): Likewise.
13460 (__arm_vrshlq_x_s32): Likewise.
13461 (__arm_vrshlq_x_u8): Likewise.
13462 (__arm_vrshlq_x_u16): Likewise.
13463 (__arm_vrshlq_x_u32): Likewise.
13464 (__arm_vshllbq_x_n_s8): Likewise.
13465 (__arm_vshllbq_x_n_s16): Likewise.
13466 (__arm_vshllbq_x_n_u8): Likewise.
13467 (__arm_vshllbq_x_n_u16): Likewise.
13468 (__arm_vshlltq_x_n_s8): Likewise.
13469 (__arm_vshlltq_x_n_s16): Likewise.
13470 (__arm_vshlltq_x_n_u8): Likewise.
13471 (__arm_vshlltq_x_n_u16): Likewise.
13472 (__arm_vshlq_x_s8): Likewise.
13473 (__arm_vshlq_x_s16): Likewise.
13474 (__arm_vshlq_x_s32): Likewise.
13475 (__arm_vshlq_x_u8): Likewise.
13476 (__arm_vshlq_x_u16): Likewise.
13477 (__arm_vshlq_x_u32): Likewise.
13478 (__arm_vshlq_x_n_s8): Likewise.
13479 (__arm_vshlq_x_n_s16): Likewise.
13480 (__arm_vshlq_x_n_s32): Likewise.
13481 (__arm_vshlq_x_n_u8): Likewise.
13482 (__arm_vshlq_x_n_u16): Likewise.
13483 (__arm_vshlq_x_n_u32): Likewise.
13484 (__arm_vrshrq_x_n_s8): Likewise.
13485 (__arm_vrshrq_x_n_s16): Likewise.
13486 (__arm_vrshrq_x_n_s32): Likewise.
13487 (__arm_vrshrq_x_n_u8): Likewise.
13488 (__arm_vrshrq_x_n_u16): Likewise.
13489 (__arm_vrshrq_x_n_u32): Likewise.
13490 (__arm_vshrq_x_n_s8): Likewise.
13491 (__arm_vshrq_x_n_s16): Likewise.
13492 (__arm_vshrq_x_n_s32): Likewise.
13493 (__arm_vshrq_x_n_u8): Likewise.
13494 (__arm_vshrq_x_n_u16): Likewise.
13495 (__arm_vshrq_x_n_u32): Likewise.
13496 (__arm_vdupq_x_n_f16): Likewise.
13497 (__arm_vdupq_x_n_f32): Likewise.
13498 (__arm_vminnmq_x_f16): Likewise.
13499 (__arm_vminnmq_x_f32): Likewise.
13500 (__arm_vmaxnmq_x_f16): Likewise.
13501 (__arm_vmaxnmq_x_f32): Likewise.
13502 (__arm_vabdq_x_f16): Likewise.
13503 (__arm_vabdq_x_f32): Likewise.
13504 (__arm_vabsq_x_f16): Likewise.
13505 (__arm_vabsq_x_f32): Likewise.
13506 (__arm_vaddq_x_f16): Likewise.
13507 (__arm_vaddq_x_f32): Likewise.
13508 (__arm_vaddq_x_n_f16): Likewise.
13509 (__arm_vaddq_x_n_f32): Likewise.
13510 (__arm_vnegq_x_f16): Likewise.
13511 (__arm_vnegq_x_f32): Likewise.
13512 (__arm_vmulq_x_f16): Likewise.
13513 (__arm_vmulq_x_f32): Likewise.
13514 (__arm_vmulq_x_n_f16): Likewise.
13515 (__arm_vmulq_x_n_f32): Likewise.
13516 (__arm_vsubq_x_f16): Likewise.
13517 (__arm_vsubq_x_f32): Likewise.
13518 (__arm_vsubq_x_n_f16): Likewise.
13519 (__arm_vsubq_x_n_f32): Likewise.
13520 (__arm_vcaddq_rot90_x_f16): Likewise.
13521 (__arm_vcaddq_rot90_x_f32): Likewise.
13522 (__arm_vcaddq_rot270_x_f16): Likewise.
13523 (__arm_vcaddq_rot270_x_f32): Likewise.
13524 (__arm_vcmulq_x_f16): Likewise.
13525 (__arm_vcmulq_x_f32): Likewise.
13526 (__arm_vcmulq_rot90_x_f16): Likewise.
13527 (__arm_vcmulq_rot90_x_f32): Likewise.
13528 (__arm_vcmulq_rot180_x_f16): Likewise.
13529 (__arm_vcmulq_rot180_x_f32): Likewise.
13530 (__arm_vcmulq_rot270_x_f16): Likewise.
13531 (__arm_vcmulq_rot270_x_f32): Likewise.
13532 (__arm_vcvtaq_x_s16_f16): Likewise.
13533 (__arm_vcvtaq_x_s32_f32): Likewise.
13534 (__arm_vcvtaq_x_u16_f16): Likewise.
13535 (__arm_vcvtaq_x_u32_f32): Likewise.
13536 (__arm_vcvtnq_x_s16_f16): Likewise.
13537 (__arm_vcvtnq_x_s32_f32): Likewise.
13538 (__arm_vcvtnq_x_u16_f16): Likewise.
13539 (__arm_vcvtnq_x_u32_f32): Likewise.
13540 (__arm_vcvtpq_x_s16_f16): Likewise.
13541 (__arm_vcvtpq_x_s32_f32): Likewise.
13542 (__arm_vcvtpq_x_u16_f16): Likewise.
13543 (__arm_vcvtpq_x_u32_f32): Likewise.
13544 (__arm_vcvtmq_x_s16_f16): Likewise.
13545 (__arm_vcvtmq_x_s32_f32): Likewise.
13546 (__arm_vcvtmq_x_u16_f16): Likewise.
13547 (__arm_vcvtmq_x_u32_f32): Likewise.
13548 (__arm_vcvtbq_x_f32_f16): Likewise.
13549 (__arm_vcvttq_x_f32_f16): Likewise.
13550 (__arm_vcvtq_x_f16_u16): Likewise.
13551 (__arm_vcvtq_x_f16_s16): Likewise.
13552 (__arm_vcvtq_x_f32_s32): Likewise.
13553 (__arm_vcvtq_x_f32_u32): Likewise.
13554 (__arm_vcvtq_x_n_f16_s16): Likewise.
13555 (__arm_vcvtq_x_n_f16_u16): Likewise.
13556 (__arm_vcvtq_x_n_f32_s32): Likewise.
13557 (__arm_vcvtq_x_n_f32_u32): Likewise.
13558 (__arm_vcvtq_x_s16_f16): Likewise.
13559 (__arm_vcvtq_x_s32_f32): Likewise.
13560 (__arm_vcvtq_x_u16_f16): Likewise.
13561 (__arm_vcvtq_x_u32_f32): Likewise.
13562 (__arm_vcvtq_x_n_s16_f16): Likewise.
13563 (__arm_vcvtq_x_n_s32_f32): Likewise.
13564 (__arm_vcvtq_x_n_u16_f16): Likewise.
13565 (__arm_vcvtq_x_n_u32_f32): Likewise.
13566 (__arm_vrndq_x_f16): Likewise.
13567 (__arm_vrndq_x_f32): Likewise.
13568 (__arm_vrndnq_x_f16): Likewise.
13569 (__arm_vrndnq_x_f32): Likewise.
13570 (__arm_vrndmq_x_f16): Likewise.
13571 (__arm_vrndmq_x_f32): Likewise.
13572 (__arm_vrndpq_x_f16): Likewise.
13573 (__arm_vrndpq_x_f32): Likewise.
13574 (__arm_vrndaq_x_f16): Likewise.
13575 (__arm_vrndaq_x_f32): Likewise.
13576 (__arm_vrndxq_x_f16): Likewise.
13577 (__arm_vrndxq_x_f32): Likewise.
13578 (__arm_vandq_x_f16): Likewise.
13579 (__arm_vandq_x_f32): Likewise.
13580 (__arm_vbicq_x_f16): Likewise.
13581 (__arm_vbicq_x_f32): Likewise.
13582 (__arm_vbrsrq_x_n_f16): Likewise.
13583 (__arm_vbrsrq_x_n_f32): Likewise.
13584 (__arm_veorq_x_f16): Likewise.
13585 (__arm_veorq_x_f32): Likewise.
13586 (__arm_vornq_x_f16): Likewise.
13587 (__arm_vornq_x_f32): Likewise.
13588 (__arm_vorrq_x_f16): Likewise.
13589 (__arm_vorrq_x_f32): Likewise.
13590 (__arm_vrev32q_x_f16): Likewise.
13591 (__arm_vrev64q_x_f16): Likewise.
13592 (__arm_vrev64q_x_f32): Likewise.
13593 (vabdq_x): Define polymorphic variant.
13594 (vabsq_x): Likewise.
13595 (vaddq_x): Likewise.
13596 (vandq_x): Likewise.
13597 (vbicq_x): Likewise.
13598 (vbrsrq_x): Likewise.
13599 (vcaddq_rot270_x): Likewise.
13600 (vcaddq_rot90_x): Likewise.
13601 (vcmulq_rot180_x): Likewise.
13602 (vcmulq_rot270_x): Likewise.
13603 (vcmulq_x): Likewise.
13604 (vcvtq_x): Likewise.
13605 (vcvtq_x_n): Likewise.
13606 (vcvtnq_m): Likewise.
13607 (veorq_x): Likewise.
13608 (vmaxnmq_x): Likewise.
13609 (vminnmq_x): Likewise.
13610 (vmulq_x): Likewise.
13611 (vnegq_x): Likewise.
13612 (vornq_x): Likewise.
13613 (vorrq_x): Likewise.
13614 (vrev32q_x): Likewise.
13615 (vrev64q_x): Likewise.
13616 (vrndaq_x): Likewise.
13617 (vrndmq_x): Likewise.
13618 (vrndnq_x): Likewise.
13619 (vrndpq_x): Likewise.
13620 (vrndq_x): Likewise.
13621 (vrndxq_x): Likewise.
13622 (vsubq_x): Likewise.
13623 (vcmulq_rot90_x): Likewise.
13624 (vadciq): Likewise.
13625 (vclsq_x): Likewise.
13626 (vclzq_x): Likewise.
13627 (vhaddq_x): Likewise.
13628 (vhcaddq_rot270_x): Likewise.
13629 (vhcaddq_rot90_x): Likewise.
13630 (vhsubq_x): Likewise.
13631 (vmaxq_x): Likewise.
13632 (vminq_x): Likewise.
13633 (vmovlbq_x): Likewise.
13634 (vmovltq_x): Likewise.
13635 (vmulhq_x): Likewise.
13636 (vmullbq_int_x): Likewise.
13637 (vmullbq_poly_x): Likewise.
13638 (vmulltq_int_x): Likewise.
13639 (vmulltq_poly_x): Likewise.
13640 (vmvnq_x): Likewise.
13641 (vrev16q_x): Likewise.
13642 (vrhaddq_x): Likewise.
13643 (vrmulhq_x): Likewise.
13644 (vrshlq_x): Likewise.
13645 (vrshrq_x): Likewise.
13646 (vshllbq_x): Likewise.
13647 (vshlltq_x): Likewise.
13648 (vshlq_x_n): Likewise.
13649 (vshlq_x): Likewise.
13650 (vdwdupq_x_u8): Likewise.
13651 (vdwdupq_x_u16): Likewise.
13652 (vdwdupq_x_u32): Likewise.
13653 (viwdupq_x_u8): Likewise.
13654 (viwdupq_x_u16): Likewise.
13655 (viwdupq_x_u32): Likewise.
13656 (vidupq_x_u8): Likewise.
13657 (vddupq_x_u8): Likewise.
13658 (vidupq_x_u16): Likewise.
13659 (vddupq_x_u16): Likewise.
13660 (vidupq_x_u32): Likewise.
13661 (vddupq_x_u32): Likewise.
13662 (vshrq_x): Likewise.
13664 2020-03-20 Richard Biener <rguenther@suse.de>
13666 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
13667 to vectorize for CTOR defs.
13669 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13670 Andre Vieira <andre.simoesdiasvieira@arm.com>
13671 Mihail Ionescu <mihail.ionescu@arm.com>
13673 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
13675 (LDRGBWBU_QUALIFIERS): Likewise.
13676 (LDRGBWBS_Z_QUALIFIERS): Likewise.
13677 (LDRGBWBU_Z_QUALIFIERS): Likewise.
13678 (STRSBWBS_QUALIFIERS): Likewise.
13679 (STRSBWBU_QUALIFIERS): Likewise.
13680 (STRSBWBS_P_QUALIFIERS): Likewise.
13681 (STRSBWBU_P_QUALIFIERS): Likewise.
13682 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
13683 (vldrdq_gather_base_wb_u64): Likewise.
13684 (vldrdq_gather_base_wb_z_s64): Likewise.
13685 (vldrdq_gather_base_wb_z_u64): Likewise.
13686 (vldrwq_gather_base_wb_f32): Likewise.
13687 (vldrwq_gather_base_wb_s32): Likewise.
13688 (vldrwq_gather_base_wb_u32): Likewise.
13689 (vldrwq_gather_base_wb_z_f32): Likewise.
13690 (vldrwq_gather_base_wb_z_s32): Likewise.
13691 (vldrwq_gather_base_wb_z_u32): Likewise.
13692 (vstrdq_scatter_base_wb_p_s64): Likewise.
13693 (vstrdq_scatter_base_wb_p_u64): Likewise.
13694 (vstrdq_scatter_base_wb_s64): Likewise.
13695 (vstrdq_scatter_base_wb_u64): Likewise.
13696 (vstrwq_scatter_base_wb_p_s32): Likewise.
13697 (vstrwq_scatter_base_wb_p_f32): Likewise.
13698 (vstrwq_scatter_base_wb_p_u32): Likewise.
13699 (vstrwq_scatter_base_wb_s32): Likewise.
13700 (vstrwq_scatter_base_wb_u32): Likewise.
13701 (vstrwq_scatter_base_wb_f32): Likewise.
13702 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
13703 (__arm_vldrdq_gather_base_wb_u64): Likewise.
13704 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
13705 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
13706 (__arm_vldrwq_gather_base_wb_s32): Likewise.
13707 (__arm_vldrwq_gather_base_wb_u32): Likewise.
13708 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
13709 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
13710 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
13711 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
13712 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
13713 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
13714 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
13715 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
13716 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
13717 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
13718 (__arm_vldrwq_gather_base_wb_f32): Likewise.
13719 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
13720 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
13721 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
13722 (vstrwq_scatter_base_wb): Define polymorphic variant.
13723 (vstrwq_scatter_base_wb_p): Likewise.
13724 (vstrdq_scatter_base_wb_p): Likewise.
13725 (vstrdq_scatter_base_wb): Likewise.
13726 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
13728 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
13730 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
13731 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
13732 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
13733 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
13734 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
13735 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
13736 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
13737 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
13738 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
13739 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
13740 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
13741 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
13742 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
13743 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
13744 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
13745 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
13746 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
13747 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
13748 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
13749 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
13750 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
13751 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
13752 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
13753 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
13754 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
13755 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
13756 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
13757 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
13758 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
13760 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13761 Andre Vieira <andre.simoesdiasvieira@arm.com>
13762 Mihail Ionescu <mihail.ionescu@arm.com>
13764 * config/arm/arm-builtins.c
13765 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
13767 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
13768 (vddupq_m_n_u32): Likewise.
13769 (vddupq_m_n_u16): Likewise.
13770 (vddupq_m_wb_u8): Likewise.
13771 (vddupq_m_wb_u16): Likewise.
13772 (vddupq_m_wb_u32): Likewise.
13773 (vddupq_n_u8): Likewise.
13774 (vddupq_n_u32): Likewise.
13775 (vddupq_n_u16): Likewise.
13776 (vddupq_wb_u8): Likewise.
13777 (vddupq_wb_u16): Likewise.
13778 (vddupq_wb_u32): Likewise.
13779 (vdwdupq_m_n_u8): Likewise.
13780 (vdwdupq_m_n_u32): Likewise.
13781 (vdwdupq_m_n_u16): Likewise.
13782 (vdwdupq_m_wb_u8): Likewise.
13783 (vdwdupq_m_wb_u32): Likewise.
13784 (vdwdupq_m_wb_u16): Likewise.
13785 (vdwdupq_n_u8): Likewise.
13786 (vdwdupq_n_u32): Likewise.
13787 (vdwdupq_n_u16): Likewise.
13788 (vdwdupq_wb_u8): Likewise.
13789 (vdwdupq_wb_u32): Likewise.
13790 (vdwdupq_wb_u16): Likewise.
13791 (vidupq_m_n_u8): Likewise.
13792 (vidupq_m_n_u32): Likewise.
13793 (vidupq_m_n_u16): Likewise.
13794 (vidupq_m_wb_u8): Likewise.
13795 (vidupq_m_wb_u16): Likewise.
13796 (vidupq_m_wb_u32): Likewise.
13797 (vidupq_n_u8): Likewise.
13798 (vidupq_n_u32): Likewise.
13799 (vidupq_n_u16): Likewise.
13800 (vidupq_wb_u8): Likewise.
13801 (vidupq_wb_u16): Likewise.
13802 (vidupq_wb_u32): Likewise.
13803 (viwdupq_m_n_u8): Likewise.
13804 (viwdupq_m_n_u32): Likewise.
13805 (viwdupq_m_n_u16): Likewise.
13806 (viwdupq_m_wb_u8): Likewise.
13807 (viwdupq_m_wb_u32): Likewise.
13808 (viwdupq_m_wb_u16): Likewise.
13809 (viwdupq_n_u8): Likewise.
13810 (viwdupq_n_u32): Likewise.
13811 (viwdupq_n_u16): Likewise.
13812 (viwdupq_wb_u8): Likewise.
13813 (viwdupq_wb_u32): Likewise.
13814 (viwdupq_wb_u16): Likewise.
13815 (__arm_vddupq_m_n_u8): Define intrinsic.
13816 (__arm_vddupq_m_n_u32): Likewise.
13817 (__arm_vddupq_m_n_u16): Likewise.
13818 (__arm_vddupq_m_wb_u8): Likewise.
13819 (__arm_vddupq_m_wb_u16): Likewise.
13820 (__arm_vddupq_m_wb_u32): Likewise.
13821 (__arm_vddupq_n_u8): Likewise.
13822 (__arm_vddupq_n_u32): Likewise.
13823 (__arm_vddupq_n_u16): Likewise.
13824 (__arm_vdwdupq_m_n_u8): Likewise.
13825 (__arm_vdwdupq_m_n_u32): Likewise.
13826 (__arm_vdwdupq_m_n_u16): Likewise.
13827 (__arm_vdwdupq_m_wb_u8): Likewise.
13828 (__arm_vdwdupq_m_wb_u32): Likewise.
13829 (__arm_vdwdupq_m_wb_u16): Likewise.
13830 (__arm_vdwdupq_n_u8): Likewise.
13831 (__arm_vdwdupq_n_u32): Likewise.
13832 (__arm_vdwdupq_n_u16): Likewise.
13833 (__arm_vdwdupq_wb_u8): Likewise.
13834 (__arm_vdwdupq_wb_u32): Likewise.
13835 (__arm_vdwdupq_wb_u16): Likewise.
13836 (__arm_vidupq_m_n_u8): Likewise.
13837 (__arm_vidupq_m_n_u32): Likewise.
13838 (__arm_vidupq_m_n_u16): Likewise.
13839 (__arm_vidupq_n_u8): Likewise.
13840 (__arm_vidupq_m_wb_u8): Likewise.
13841 (__arm_vidupq_m_wb_u16): Likewise.
13842 (__arm_vidupq_m_wb_u32): Likewise.
13843 (__arm_vidupq_n_u32): Likewise.
13844 (__arm_vidupq_n_u16): Likewise.
13845 (__arm_vidupq_wb_u8): Likewise.
13846 (__arm_vidupq_wb_u16): Likewise.
13847 (__arm_vidupq_wb_u32): Likewise.
13848 (__arm_vddupq_wb_u8): Likewise.
13849 (__arm_vddupq_wb_u16): Likewise.
13850 (__arm_vddupq_wb_u32): Likewise.
13851 (__arm_viwdupq_m_n_u8): Likewise.
13852 (__arm_viwdupq_m_n_u32): Likewise.
13853 (__arm_viwdupq_m_n_u16): Likewise.
13854 (__arm_viwdupq_m_wb_u8): Likewise.
13855 (__arm_viwdupq_m_wb_u32): Likewise.
13856 (__arm_viwdupq_m_wb_u16): Likewise.
13857 (__arm_viwdupq_n_u8): Likewise.
13858 (__arm_viwdupq_n_u32): Likewise.
13859 (__arm_viwdupq_n_u16): Likewise.
13860 (__arm_viwdupq_wb_u8): Likewise.
13861 (__arm_viwdupq_wb_u32): Likewise.
13862 (__arm_viwdupq_wb_u16): Likewise.
13863 (vidupq_m): Define polymorphic variant.
13864 (vddupq_m): Likewise.
13865 (vidupq_u16): Likewise.
13866 (vidupq_u32): Likewise.
13867 (vidupq_u8): Likewise.
13868 (vddupq_u16): Likewise.
13869 (vddupq_u32): Likewise.
13870 (vddupq_u8): Likewise.
13871 (viwdupq_m): Likewise.
13872 (viwdupq_u16): Likewise.
13873 (viwdupq_u32): Likewise.
13874 (viwdupq_u8): Likewise.
13875 (vdwdupq_m): Likewise.
13876 (vdwdupq_u16): Likewise.
13877 (vdwdupq_u32): Likewise.
13878 (vdwdupq_u8): Likewise.
13879 * config/arm/arm_mve_builtins.def
13880 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
13882 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
13883 (mve_vidupq_u<mode>_insn): Likewise.
13884 (mve_vidupq_m_n_u<mode>): Likewise.
13885 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
13886 (mve_vddupq_n_u<mode>): Likewise.
13887 (mve_vddupq_u<mode>_insn): Likewise.
13888 (mve_vddupq_m_n_u<mode>): Likewise.
13889 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
13890 (mve_vdwdupq_n_u<mode>): Likewise.
13891 (mve_vdwdupq_wb_u<mode>): Likewise.
13892 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
13893 (mve_vdwdupq_m_n_u<mode>): Likewise.
13894 (mve_vdwdupq_m_wb_u<mode>): Likewise.
13895 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
13896 (mve_viwdupq_n_u<mode>): Likewise.
13897 (mve_viwdupq_wb_u<mode>): Likewise.
13898 (mve_viwdupq_wb_u<mode>_insn): Likewise.
13899 (mve_viwdupq_m_n_u<mode>): Likewise.
13900 (mve_viwdupq_m_wb_u<mode>): Likewise.
13901 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
13903 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13905 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
13906 (vreinterpretq_s16_s64): Likewise.
13907 (vreinterpretq_s16_s8): Likewise.
13908 (vreinterpretq_s16_u16): Likewise.
13909 (vreinterpretq_s16_u32): Likewise.
13910 (vreinterpretq_s16_u64): Likewise.
13911 (vreinterpretq_s16_u8): Likewise.
13912 (vreinterpretq_s32_s16): Likewise.
13913 (vreinterpretq_s32_s64): Likewise.
13914 (vreinterpretq_s32_s8): Likewise.
13915 (vreinterpretq_s32_u16): Likewise.
13916 (vreinterpretq_s32_u32): Likewise.
13917 (vreinterpretq_s32_u64): Likewise.
13918 (vreinterpretq_s32_u8): Likewise.
13919 (vreinterpretq_s64_s16): Likewise.
13920 (vreinterpretq_s64_s32): Likewise.
13921 (vreinterpretq_s64_s8): Likewise.
13922 (vreinterpretq_s64_u16): Likewise.
13923 (vreinterpretq_s64_u32): Likewise.
13924 (vreinterpretq_s64_u64): Likewise.
13925 (vreinterpretq_s64_u8): Likewise.
13926 (vreinterpretq_s8_s16): Likewise.
13927 (vreinterpretq_s8_s32): Likewise.
13928 (vreinterpretq_s8_s64): Likewise.
13929 (vreinterpretq_s8_u16): Likewise.
13930 (vreinterpretq_s8_u32): Likewise.
13931 (vreinterpretq_s8_u64): Likewise.
13932 (vreinterpretq_s8_u8): Likewise.
13933 (vreinterpretq_u16_s16): Likewise.
13934 (vreinterpretq_u16_s32): Likewise.
13935 (vreinterpretq_u16_s64): Likewise.
13936 (vreinterpretq_u16_s8): Likewise.
13937 (vreinterpretq_u16_u32): Likewise.
13938 (vreinterpretq_u16_u64): Likewise.
13939 (vreinterpretq_u16_u8): Likewise.
13940 (vreinterpretq_u32_s16): Likewise.
13941 (vreinterpretq_u32_s32): Likewise.
13942 (vreinterpretq_u32_s64): Likewise.
13943 (vreinterpretq_u32_s8): Likewise.
13944 (vreinterpretq_u32_u16): Likewise.
13945 (vreinterpretq_u32_u64): Likewise.
13946 (vreinterpretq_u32_u8): Likewise.
13947 (vreinterpretq_u64_s16): Likewise.
13948 (vreinterpretq_u64_s32): Likewise.
13949 (vreinterpretq_u64_s64): Likewise.
13950 (vreinterpretq_u64_s8): Likewise.
13951 (vreinterpretq_u64_u16): Likewise.
13952 (vreinterpretq_u64_u32): Likewise.
13953 (vreinterpretq_u64_u8): Likewise.
13954 (vreinterpretq_u8_s16): Likewise.
13955 (vreinterpretq_u8_s32): Likewise.
13956 (vreinterpretq_u8_s64): Likewise.
13957 (vreinterpretq_u8_s8): Likewise.
13958 (vreinterpretq_u8_u16): Likewise.
13959 (vreinterpretq_u8_u32): Likewise.
13960 (vreinterpretq_u8_u64): Likewise.
13961 (vreinterpretq_s32_f16): Likewise.
13962 (vreinterpretq_s32_f32): Likewise.
13963 (vreinterpretq_u16_f16): Likewise.
13964 (vreinterpretq_u16_f32): Likewise.
13965 (vreinterpretq_u32_f16): Likewise.
13966 (vreinterpretq_u32_f32): Likewise.
13967 (vreinterpretq_u64_f16): Likewise.
13968 (vreinterpretq_u64_f32): Likewise.
13969 (vreinterpretq_u8_f16): Likewise.
13970 (vreinterpretq_u8_f32): Likewise.
13971 (vreinterpretq_f16_f32): Likewise.
13972 (vreinterpretq_f16_s16): Likewise.
13973 (vreinterpretq_f16_s32): Likewise.
13974 (vreinterpretq_f16_s64): Likewise.
13975 (vreinterpretq_f16_s8): Likewise.
13976 (vreinterpretq_f16_u16): Likewise.
13977 (vreinterpretq_f16_u32): Likewise.
13978 (vreinterpretq_f16_u64): Likewise.
13979 (vreinterpretq_f16_u8): Likewise.
13980 (vreinterpretq_f32_f16): Likewise.
13981 (vreinterpretq_f32_s16): Likewise.
13982 (vreinterpretq_f32_s32): Likewise.
13983 (vreinterpretq_f32_s64): Likewise.
13984 (vreinterpretq_f32_s8): Likewise.
13985 (vreinterpretq_f32_u16): Likewise.
13986 (vreinterpretq_f32_u32): Likewise.
13987 (vreinterpretq_f32_u64): Likewise.
13988 (vreinterpretq_f32_u8): Likewise.
13989 (vreinterpretq_s16_f16): Likewise.
13990 (vreinterpretq_s16_f32): Likewise.
13991 (vreinterpretq_s64_f16): Likewise.
13992 (vreinterpretq_s64_f32): Likewise.
13993 (vreinterpretq_s8_f16): Likewise.
13994 (vreinterpretq_s8_f32): Likewise.
13995 (vuninitializedq_u8): Likewise.
13996 (vuninitializedq_u16): Likewise.
13997 (vuninitializedq_u32): Likewise.
13998 (vuninitializedq_u64): Likewise.
13999 (vuninitializedq_s8): Likewise.
14000 (vuninitializedq_s16): Likewise.
14001 (vuninitializedq_s32): Likewise.
14002 (vuninitializedq_s64): Likewise.
14003 (vuninitializedq_f16): Likewise.
14004 (vuninitializedq_f32): Likewise.
14005 (__arm_vuninitializedq_u8): Define intrinsic.
14006 (__arm_vuninitializedq_u16): Likewise.
14007 (__arm_vuninitializedq_u32): Likewise.
14008 (__arm_vuninitializedq_u64): Likewise.
14009 (__arm_vuninitializedq_s8): Likewise.
14010 (__arm_vuninitializedq_s16): Likewise.
14011 (__arm_vuninitializedq_s32): Likewise.
14012 (__arm_vuninitializedq_s64): Likewise.
14013 (__arm_vreinterpretq_s16_s32): Likewise.
14014 (__arm_vreinterpretq_s16_s64): Likewise.
14015 (__arm_vreinterpretq_s16_s8): Likewise.
14016 (__arm_vreinterpretq_s16_u16): Likewise.
14017 (__arm_vreinterpretq_s16_u32): Likewise.
14018 (__arm_vreinterpretq_s16_u64): Likewise.
14019 (__arm_vreinterpretq_s16_u8): Likewise.
14020 (__arm_vreinterpretq_s32_s16): Likewise.
14021 (__arm_vreinterpretq_s32_s64): Likewise.
14022 (__arm_vreinterpretq_s32_s8): Likewise.
14023 (__arm_vreinterpretq_s32_u16): Likewise.
14024 (__arm_vreinterpretq_s32_u32): Likewise.
14025 (__arm_vreinterpretq_s32_u64): Likewise.
14026 (__arm_vreinterpretq_s32_u8): Likewise.
14027 (__arm_vreinterpretq_s64_s16): Likewise.
14028 (__arm_vreinterpretq_s64_s32): Likewise.
14029 (__arm_vreinterpretq_s64_s8): Likewise.
14030 (__arm_vreinterpretq_s64_u16): Likewise.
14031 (__arm_vreinterpretq_s64_u32): Likewise.
14032 (__arm_vreinterpretq_s64_u64): Likewise.
14033 (__arm_vreinterpretq_s64_u8): Likewise.
14034 (__arm_vreinterpretq_s8_s16): Likewise.
14035 (__arm_vreinterpretq_s8_s32): Likewise.
14036 (__arm_vreinterpretq_s8_s64): Likewise.
14037 (__arm_vreinterpretq_s8_u16): Likewise.
14038 (__arm_vreinterpretq_s8_u32): Likewise.
14039 (__arm_vreinterpretq_s8_u64): Likewise.
14040 (__arm_vreinterpretq_s8_u8): Likewise.
14041 (__arm_vreinterpretq_u16_s16): Likewise.
14042 (__arm_vreinterpretq_u16_s32): Likewise.
14043 (__arm_vreinterpretq_u16_s64): Likewise.
14044 (__arm_vreinterpretq_u16_s8): Likewise.
14045 (__arm_vreinterpretq_u16_u32): Likewise.
14046 (__arm_vreinterpretq_u16_u64): Likewise.
14047 (__arm_vreinterpretq_u16_u8): Likewise.
14048 (__arm_vreinterpretq_u32_s16): Likewise.
14049 (__arm_vreinterpretq_u32_s32): Likewise.
14050 (__arm_vreinterpretq_u32_s64): Likewise.
14051 (__arm_vreinterpretq_u32_s8): Likewise.
14052 (__arm_vreinterpretq_u32_u16): Likewise.
14053 (__arm_vreinterpretq_u32_u64): Likewise.
14054 (__arm_vreinterpretq_u32_u8): Likewise.
14055 (__arm_vreinterpretq_u64_s16): Likewise.
14056 (__arm_vreinterpretq_u64_s32): Likewise.
14057 (__arm_vreinterpretq_u64_s64): Likewise.
14058 (__arm_vreinterpretq_u64_s8): Likewise.
14059 (__arm_vreinterpretq_u64_u16): Likewise.
14060 (__arm_vreinterpretq_u64_u32): Likewise.
14061 (__arm_vreinterpretq_u64_u8): Likewise.
14062 (__arm_vreinterpretq_u8_s16): Likewise.
14063 (__arm_vreinterpretq_u8_s32): Likewise.
14064 (__arm_vreinterpretq_u8_s64): Likewise.
14065 (__arm_vreinterpretq_u8_s8): Likewise.
14066 (__arm_vreinterpretq_u8_u16): Likewise.
14067 (__arm_vreinterpretq_u8_u32): Likewise.
14068 (__arm_vreinterpretq_u8_u64): Likewise.
14069 (__arm_vuninitializedq_f16): Likewise.
14070 (__arm_vuninitializedq_f32): Likewise.
14071 (__arm_vreinterpretq_s32_f16): Likewise.
14072 (__arm_vreinterpretq_s32_f32): Likewise.
14073 (__arm_vreinterpretq_s16_f16): Likewise.
14074 (__arm_vreinterpretq_s16_f32): Likewise.
14075 (__arm_vreinterpretq_s64_f16): Likewise.
14076 (__arm_vreinterpretq_s64_f32): Likewise.
14077 (__arm_vreinterpretq_s8_f16): Likewise.
14078 (__arm_vreinterpretq_s8_f32): Likewise.
14079 (__arm_vreinterpretq_u16_f16): Likewise.
14080 (__arm_vreinterpretq_u16_f32): Likewise.
14081 (__arm_vreinterpretq_u32_f16): Likewise.
14082 (__arm_vreinterpretq_u32_f32): Likewise.
14083 (__arm_vreinterpretq_u64_f16): Likewise.
14084 (__arm_vreinterpretq_u64_f32): Likewise.
14085 (__arm_vreinterpretq_u8_f16): Likewise.
14086 (__arm_vreinterpretq_u8_f32): Likewise.
14087 (__arm_vreinterpretq_f16_f32): Likewise.
14088 (__arm_vreinterpretq_f16_s16): Likewise.
14089 (__arm_vreinterpretq_f16_s32): Likewise.
14090 (__arm_vreinterpretq_f16_s64): Likewise.
14091 (__arm_vreinterpretq_f16_s8): Likewise.
14092 (__arm_vreinterpretq_f16_u16): Likewise.
14093 (__arm_vreinterpretq_f16_u32): Likewise.
14094 (__arm_vreinterpretq_f16_u64): Likewise.
14095 (__arm_vreinterpretq_f16_u8): Likewise.
14096 (__arm_vreinterpretq_f32_f16): Likewise.
14097 (__arm_vreinterpretq_f32_s16): Likewise.
14098 (__arm_vreinterpretq_f32_s32): Likewise.
14099 (__arm_vreinterpretq_f32_s64): Likewise.
14100 (__arm_vreinterpretq_f32_s8): Likewise.
14101 (__arm_vreinterpretq_f32_u16): Likewise.
14102 (__arm_vreinterpretq_f32_u32): Likewise.
14103 (__arm_vreinterpretq_f32_u64): Likewise.
14104 (__arm_vreinterpretq_f32_u8): Likewise.
14105 (vuninitializedq): Define polymorphic variant.
14106 (vreinterpretq_f16): Likewise.
14107 (vreinterpretq_f32): Likewise.
14108 (vreinterpretq_s16): Likewise.
14109 (vreinterpretq_s32): Likewise.
14110 (vreinterpretq_s64): Likewise.
14111 (vreinterpretq_s8): Likewise.
14112 (vreinterpretq_u16): Likewise.
14113 (vreinterpretq_u32): Likewise.
14114 (vreinterpretq_u64): Likewise.
14115 (vreinterpretq_u8): Likewise.
14117 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14118 Andre Vieira <andre.simoesdiasvieira@arm.com>
14119 Mihail Ionescu <mihail.ionescu@arm.com>
14121 * config/arm/arm_mve.h (vaddq_s8): Define macro.
14122 (vaddq_s16): Likewise.
14123 (vaddq_s32): Likewise.
14124 (vaddq_u8): Likewise.
14125 (vaddq_u16): Likewise.
14126 (vaddq_u32): Likewise.
14127 (vaddq_f16): Likewise.
14128 (vaddq_f32): Likewise.
14129 (__arm_vaddq_s8): Define intrinsic.
14130 (__arm_vaddq_s16): Likewise.
14131 (__arm_vaddq_s32): Likewise.
14132 (__arm_vaddq_u8): Likewise.
14133 (__arm_vaddq_u16): Likewise.
14134 (__arm_vaddq_u32): Likewise.
14135 (__arm_vaddq_f16): Likewise.
14136 (__arm_vaddq_f32): Likewise.
14137 (vaddq): Define polymorphic variant.
14138 * config/arm/iterators.md (VNIM): Define mode iterator for common types
14139 Neon, IWMMXT and MVE.
14140 (VNINOTM): Likewise.
14141 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
14142 (mve_vaddq_f<mode>): Define RTL pattern.
14143 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
14144 (addv8hf3_neon): Define RTL pattern.
14145 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
14147 (addv8hf3): Define standard RTL pattern for MVE and Neon.
14148 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
14150 2020-03-20 Martin Liska <mliska@suse.cz>
14153 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
14154 build_ref_for_offset function was used and it transforms off to bytes
14157 2020-03-20 Richard Biener <rguenther@suse.de>
14159 PR tree-optimization/94266
14160 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
14161 type of the underlying object to adjust for the containing
14162 field if available.
14164 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14166 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
14167 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
14168 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
14170 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14172 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
14174 2020-03-20 Jakub Jelinek <jakub@redhat.com>
14176 PR tree-optimization/94224
14177 * gimple-ssa-store-merging.c
14178 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
14179 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
14182 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14184 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
14186 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
14189 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
14190 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
14192 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
14195 * cgraphunit.c (process_function_and_variable_attributes): warn
14196 for flatten attribute on alias.
14197 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
14199 2020-03-19 Martin Liska <mliska@suse.cz>
14201 * lto-section-in.c: Add ext_symtab.
14202 * lto-streamer-out.c (write_symbol_extension_info): New.
14203 (produce_symtab_extension): New.
14204 (produce_asm_for_decls): Stream also produce_symtab_extension.
14205 * lto-streamer.h (enum lto_section_type): New section.
14207 2020-03-19 Jakub Jelinek <jakub@redhat.com>
14209 PR tree-optimization/94211
14210 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
14211 instead of estimate_num_insns for bb_seq (middle_bb). Rename
14212 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
14215 2020-03-19 Richard Biener <rguenther@suse.de>
14218 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
14219 and build_ref_for_offset.
14221 2020-03-19 Richard Biener <rguenther@suse.de>
14223 PR middle-end/94216
14224 * fold-const.c (fold_binary_loc): Avoid using
14225 build_fold_addr_expr when we really want an ADDR_EXPR.
14227 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
14229 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
14232 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
14234 PR rtl-optimization/90275
14235 * cse.c (cse_insn): Delete no-op register moves too.
14237 2020-03-18 Martin Sebor <msebor@redhat.com>
14240 * cgraphunit.c (process_function_and_variable_attributes): Also
14241 complain about weakref function definitions and drop all effects
14244 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14245 Mihail Ionescu <mihail.ionescu@arm.com>
14246 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14248 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
14249 (vstrdq_scatter_base_p_u64): Likewise.
14250 (vstrdq_scatter_base_s64): Likewise.
14251 (vstrdq_scatter_base_u64): Likewise.
14252 (vstrdq_scatter_offset_p_s64): Likewise.
14253 (vstrdq_scatter_offset_p_u64): Likewise.
14254 (vstrdq_scatter_offset_s64): Likewise.
14255 (vstrdq_scatter_offset_u64): Likewise.
14256 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
14257 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
14258 (vstrdq_scatter_shifted_offset_s64): Likewise.
14259 (vstrdq_scatter_shifted_offset_u64): Likewise.
14260 (vstrhq_scatter_offset_f16): Likewise.
14261 (vstrhq_scatter_offset_p_f16): Likewise.
14262 (vstrhq_scatter_shifted_offset_f16): Likewise.
14263 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
14264 (vstrwq_scatter_base_f32): Likewise.
14265 (vstrwq_scatter_base_p_f32): Likewise.
14266 (vstrwq_scatter_offset_f32): Likewise.
14267 (vstrwq_scatter_offset_p_f32): Likewise.
14268 (vstrwq_scatter_offset_p_s32): Likewise.
14269 (vstrwq_scatter_offset_p_u32): Likewise.
14270 (vstrwq_scatter_offset_s32): Likewise.
14271 (vstrwq_scatter_offset_u32): Likewise.
14272 (vstrwq_scatter_shifted_offset_f32): Likewise.
14273 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
14274 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
14275 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
14276 (vstrwq_scatter_shifted_offset_s32): Likewise.
14277 (vstrwq_scatter_shifted_offset_u32): Likewise.
14278 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
14279 (__arm_vstrdq_scatter_base_p_u64): Likewise.
14280 (__arm_vstrdq_scatter_base_s64): Likewise.
14281 (__arm_vstrdq_scatter_base_u64): Likewise.
14282 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
14283 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
14284 (__arm_vstrdq_scatter_offset_s64): Likewise.
14285 (__arm_vstrdq_scatter_offset_u64): Likewise.
14286 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
14287 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
14288 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
14289 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
14290 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
14291 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
14292 (__arm_vstrwq_scatter_offset_s32): Likewise.
14293 (__arm_vstrwq_scatter_offset_u32): Likewise.
14294 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
14295 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
14296 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
14297 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
14298 (__arm_vstrhq_scatter_offset_f16): Likewise.
14299 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
14300 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
14301 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
14302 (__arm_vstrwq_scatter_base_f32): Likewise.
14303 (__arm_vstrwq_scatter_base_p_f32): Likewise.
14304 (__arm_vstrwq_scatter_offset_f32): Likewise.
14305 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
14306 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
14307 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
14308 (vstrhq_scatter_offset): Define polymorphic variant.
14309 (vstrhq_scatter_offset_p): Likewise.
14310 (vstrhq_scatter_shifted_offset): Likewise.
14311 (vstrhq_scatter_shifted_offset_p): Likewise.
14312 (vstrwq_scatter_base): Likewise.
14313 (vstrwq_scatter_base_p): Likewise.
14314 (vstrwq_scatter_offset): Likewise.
14315 (vstrwq_scatter_offset_p): Likewise.
14316 (vstrwq_scatter_shifted_offset): Likewise.
14317 (vstrwq_scatter_shifted_offset_p): Likewise.
14318 (vstrdq_scatter_base_p): Likewise.
14319 (vstrdq_scatter_base): Likewise.
14320 (vstrdq_scatter_offset_p): Likewise.
14321 (vstrdq_scatter_offset): Likewise.
14322 (vstrdq_scatter_shifted_offset_p): Likewise.
14323 (vstrdq_scatter_shifted_offset): Likewise.
14324 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
14325 (STRSBS_P): Likewise.
14326 (STRSBU): Likewise.
14327 (STRSBU_P): Likewise.
14329 (STRSS_P): Likewise.
14331 (STRSU_P): Likewise.
14332 * config/arm/constraints.md (Ri): Define.
14333 * config/arm/mve.md (VSTRDSBQ): Define iterator.
14334 (VSTRDSOQ): Likewise.
14335 (VSTRDSSOQ): Likewise.
14336 (VSTRWSOQ): Likewise.
14337 (VSTRWSSOQ): Likewise.
14338 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
14339 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
14340 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
14341 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
14342 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
14343 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
14344 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
14345 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
14346 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
14347 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
14348 (mve_vstrwq_scatter_base_fv4sf): Likewise.
14349 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
14350 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
14351 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
14352 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
14353 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
14354 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
14355 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
14356 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
14357 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
14358 * config/arm/predicates.md (Ri): Define predicate to check immediate
14359 is the range +/-1016 and multiple of 8.
14361 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14362 Mihail Ionescu <mihail.ionescu@arm.com>
14363 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14365 * config/arm/arm_mve.h (vst1q_f32): Define macro.
14366 (vst1q_f16): Likewise.
14367 (vst1q_s8): Likewise.
14368 (vst1q_s32): Likewise.
14369 (vst1q_s16): Likewise.
14370 (vst1q_u8): Likewise.
14371 (vst1q_u32): Likewise.
14372 (vst1q_u16): Likewise.
14373 (vstrhq_f16): Likewise.
14374 (vstrhq_scatter_offset_s32): Likewise.
14375 (vstrhq_scatter_offset_s16): Likewise.
14376 (vstrhq_scatter_offset_u32): Likewise.
14377 (vstrhq_scatter_offset_u16): Likewise.
14378 (vstrhq_scatter_offset_p_s32): Likewise.
14379 (vstrhq_scatter_offset_p_s16): Likewise.
14380 (vstrhq_scatter_offset_p_u32): Likewise.
14381 (vstrhq_scatter_offset_p_u16): Likewise.
14382 (vstrhq_scatter_shifted_offset_s32): Likewise.
14383 (vstrhq_scatter_shifted_offset_s16): Likewise.
14384 (vstrhq_scatter_shifted_offset_u32): Likewise.
14385 (vstrhq_scatter_shifted_offset_u16): Likewise.
14386 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
14387 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
14388 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
14389 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
14390 (vstrhq_s32): Likewise.
14391 (vstrhq_s16): Likewise.
14392 (vstrhq_u32): Likewise.
14393 (vstrhq_u16): Likewise.
14394 (vstrhq_p_f16): Likewise.
14395 (vstrhq_p_s32): Likewise.
14396 (vstrhq_p_s16): Likewise.
14397 (vstrhq_p_u32): Likewise.
14398 (vstrhq_p_u16): Likewise.
14399 (vstrwq_f32): Likewise.
14400 (vstrwq_s32): Likewise.
14401 (vstrwq_u32): Likewise.
14402 (vstrwq_p_f32): Likewise.
14403 (vstrwq_p_s32): Likewise.
14404 (vstrwq_p_u32): Likewise.
14405 (__arm_vst1q_s8): Define intrinsic.
14406 (__arm_vst1q_s32): Likewise.
14407 (__arm_vst1q_s16): Likewise.
14408 (__arm_vst1q_u8): Likewise.
14409 (__arm_vst1q_u32): Likewise.
14410 (__arm_vst1q_u16): Likewise.
14411 (__arm_vstrhq_scatter_offset_s32): Likewise.
14412 (__arm_vstrhq_scatter_offset_s16): Likewise.
14413 (__arm_vstrhq_scatter_offset_u32): Likewise.
14414 (__arm_vstrhq_scatter_offset_u16): Likewise.
14415 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
14416 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
14417 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
14418 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
14419 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
14420 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
14421 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
14422 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
14423 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
14424 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
14425 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
14426 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
14427 (__arm_vstrhq_s32): Likewise.
14428 (__arm_vstrhq_s16): Likewise.
14429 (__arm_vstrhq_u32): Likewise.
14430 (__arm_vstrhq_u16): Likewise.
14431 (__arm_vstrhq_p_s32): Likewise.
14432 (__arm_vstrhq_p_s16): Likewise.
14433 (__arm_vstrhq_p_u32): Likewise.
14434 (__arm_vstrhq_p_u16): Likewise.
14435 (__arm_vstrwq_s32): Likewise.
14436 (__arm_vstrwq_u32): Likewise.
14437 (__arm_vstrwq_p_s32): Likewise.
14438 (__arm_vstrwq_p_u32): Likewise.
14439 (__arm_vstrwq_p_f32): Likewise.
14440 (__arm_vstrwq_f32): Likewise.
14441 (__arm_vst1q_f32): Likewise.
14442 (__arm_vst1q_f16): Likewise.
14443 (__arm_vstrhq_f16): Likewise.
14444 (__arm_vstrhq_p_f16): Likewise.
14445 (vst1q): Define polymorphic variant.
14446 (vstrhq): Likewise.
14447 (vstrhq_p): Likewise.
14448 (vstrhq_scatter_offset_p): Likewise.
14449 (vstrhq_scatter_offset): Likewise.
14450 (vstrhq_scatter_shifted_offset_p): Likewise.
14451 (vstrhq_scatter_shifted_offset): Likewise.
14452 (vstrwq_p): Likewise.
14453 (vstrwq): Likewise.
14454 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
14455 (STRS_P): Likewise.
14457 (STRSS_P): Likewise.
14459 (STRSU_P): Likewise.
14461 (STRU_P): Likewise.
14462 * config/arm/mve.md (VST1Q): Define iterator.
14463 (VSTRHSOQ): Likewise.
14464 (VSTRHSSOQ): Likewise.
14465 (VSTRHQ): Likewise.
14466 (VSTRWQ): Likewise.
14467 (mve_vstrhq_fv8hf): Define RTL pattern.
14468 (mve_vstrhq_p_fv8hf): Likewise.
14469 (mve_vstrhq_p_<supf><mode>): Likewise.
14470 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
14471 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
14472 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
14473 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
14474 (mve_vstrhq_<supf><mode>): Likewise.
14475 (mve_vstrwq_fv4sf): Likewise.
14476 (mve_vstrwq_p_fv4sf): Likewise.
14477 (mve_vstrwq_p_<supf>v4si): Likewise.
14478 (mve_vstrwq_<supf>v4si): Likewise.
14479 (mve_vst1q_f<mode>): Define expand.
14480 (mve_vst1q_<supf><mode>): Likewise.
14482 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14483 Mihail Ionescu <mihail.ionescu@arm.com>
14484 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14486 * config/arm/arm_mve.h (vld1q_s8): Define macro.
14487 (vld1q_s32): Likewise.
14488 (vld1q_s16): Likewise.
14489 (vld1q_u8): Likewise.
14490 (vld1q_u32): Likewise.
14491 (vld1q_u16): Likewise.
14492 (vldrhq_gather_offset_s32): Likewise.
14493 (vldrhq_gather_offset_s16): Likewise.
14494 (vldrhq_gather_offset_u32): Likewise.
14495 (vldrhq_gather_offset_u16): Likewise.
14496 (vldrhq_gather_offset_z_s32): Likewise.
14497 (vldrhq_gather_offset_z_s16): Likewise.
14498 (vldrhq_gather_offset_z_u32): Likewise.
14499 (vldrhq_gather_offset_z_u16): Likewise.
14500 (vldrhq_gather_shifted_offset_s32): Likewise.
14501 (vldrhq_gather_shifted_offset_s16): Likewise.
14502 (vldrhq_gather_shifted_offset_u32): Likewise.
14503 (vldrhq_gather_shifted_offset_u16): Likewise.
14504 (vldrhq_gather_shifted_offset_z_s32): Likewise.
14505 (vldrhq_gather_shifted_offset_z_s16): Likewise.
14506 (vldrhq_gather_shifted_offset_z_u32): Likewise.
14507 (vldrhq_gather_shifted_offset_z_u16): Likewise.
14508 (vldrhq_s32): Likewise.
14509 (vldrhq_s16): Likewise.
14510 (vldrhq_u32): Likewise.
14511 (vldrhq_u16): Likewise.
14512 (vldrhq_z_s32): Likewise.
14513 (vldrhq_z_s16): Likewise.
14514 (vldrhq_z_u32): Likewise.
14515 (vldrhq_z_u16): Likewise.
14516 (vldrwq_s32): Likewise.
14517 (vldrwq_u32): Likewise.
14518 (vldrwq_z_s32): Likewise.
14519 (vldrwq_z_u32): Likewise.
14520 (vld1q_f32): Likewise.
14521 (vld1q_f16): Likewise.
14522 (vldrhq_f16): Likewise.
14523 (vldrhq_z_f16): Likewise.
14524 (vldrwq_f32): Likewise.
14525 (vldrwq_z_f32): Likewise.
14526 (__arm_vld1q_s8): Define intrinsic.
14527 (__arm_vld1q_s32): Likewise.
14528 (__arm_vld1q_s16): Likewise.
14529 (__arm_vld1q_u8): Likewise.
14530 (__arm_vld1q_u32): Likewise.
14531 (__arm_vld1q_u16): Likewise.
14532 (__arm_vldrhq_gather_offset_s32): Likewise.
14533 (__arm_vldrhq_gather_offset_s16): Likewise.
14534 (__arm_vldrhq_gather_offset_u32): Likewise.
14535 (__arm_vldrhq_gather_offset_u16): Likewise.
14536 (__arm_vldrhq_gather_offset_z_s32): Likewise.
14537 (__arm_vldrhq_gather_offset_z_s16): Likewise.
14538 (__arm_vldrhq_gather_offset_z_u32): Likewise.
14539 (__arm_vldrhq_gather_offset_z_u16): Likewise.
14540 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
14541 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
14542 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
14543 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
14544 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
14545 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
14546 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
14547 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
14548 (__arm_vldrhq_s32): Likewise.
14549 (__arm_vldrhq_s16): Likewise.
14550 (__arm_vldrhq_u32): Likewise.
14551 (__arm_vldrhq_u16): Likewise.
14552 (__arm_vldrhq_z_s32): Likewise.
14553 (__arm_vldrhq_z_s16): Likewise.
14554 (__arm_vldrhq_z_u32): Likewise.
14555 (__arm_vldrhq_z_u16): Likewise.
14556 (__arm_vldrwq_s32): Likewise.
14557 (__arm_vldrwq_u32): Likewise.
14558 (__arm_vldrwq_z_s32): Likewise.
14559 (__arm_vldrwq_z_u32): Likewise.
14560 (__arm_vld1q_f32): Likewise.
14561 (__arm_vld1q_f16): Likewise.
14562 (__arm_vldrwq_f32): Likewise.
14563 (__arm_vldrwq_z_f32): Likewise.
14564 (__arm_vldrhq_z_f16): Likewise.
14565 (__arm_vldrhq_f16): Likewise.
14566 (vld1q): Define polymorphic variant.
14567 (vldrhq_gather_offset): Likewise.
14568 (vldrhq_gather_offset_z): Likewise.
14569 (vldrhq_gather_shifted_offset): Likewise.
14570 (vldrhq_gather_shifted_offset_z): Likewise.
14571 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
14573 (LDRU_Z): Likewise.
14574 (LDRS_Z): Likewise.
14575 (LDRGU_Z): Likewise.
14577 (LDRGS_Z): Likewise.
14579 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
14580 (V_sz_elem1): Likewise.
14581 (VLD1Q): Define iterator.
14582 (VLDRHGOQ): Likewise.
14583 (VLDRHGSOQ): Likewise.
14584 (VLDRHQ): Likewise.
14585 (VLDRWQ): Likewise.
14586 (mve_vldrhq_fv8hf): Define RTL pattern.
14587 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
14588 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
14589 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
14590 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
14591 (mve_vldrhq_<supf><mode>): Likewise.
14592 (mve_vldrhq_z_fv8hf): Likewise.
14593 (mve_vldrhq_z_<supf><mode>): Likewise.
14594 (mve_vldrwq_fv4sf): Likewise.
14595 (mve_vldrwq_<supf>v4si): Likewise.
14596 (mve_vldrwq_z_fv4sf): Likewise.
14597 (mve_vldrwq_z_<supf>v4si): Likewise.
14598 (mve_vld1q_f<mode>): Define RTL expand pattern.
14599 (mve_vld1q_<supf><mode>): Likewise.
14601 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14602 Mihail Ionescu <mihail.ionescu@arm.com>
14603 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14605 * config/arm/arm_mve.h (vld1q_s8): Define macro.
14606 (vld1q_s32): Likewise.
14607 (vld1q_s16): Likewise.
14608 (vld1q_u8): Likewise.
14609 (vld1q_u32): Likewise.
14610 (vld1q_u16): Likewise.
14611 (vldrhq_gather_offset_s32): Likewise.
14612 (vldrhq_gather_offset_s16): Likewise.
14613 (vldrhq_gather_offset_u32): Likewise.
14614 (vldrhq_gather_offset_u16): Likewise.
14615 (vldrhq_gather_offset_z_s32): Likewise.
14616 (vldrhq_gather_offset_z_s16): Likewise.
14617 (vldrhq_gather_offset_z_u32): Likewise.
14618 (vldrhq_gather_offset_z_u16): Likewise.
14619 (vldrhq_gather_shifted_offset_s32): Likewise.
14620 (vldrhq_gather_shifted_offset_s16): Likewise.
14621 (vldrhq_gather_shifted_offset_u32): Likewise.
14622 (vldrhq_gather_shifted_offset_u16): Likewise.
14623 (vldrhq_gather_shifted_offset_z_s32): Likewise.
14624 (vldrhq_gather_shifted_offset_z_s16): Likewise.
14625 (vldrhq_gather_shifted_offset_z_u32): Likewise.
14626 (vldrhq_gather_shifted_offset_z_u16): Likewise.
14627 (vldrhq_s32): Likewise.
14628 (vldrhq_s16): Likewise.
14629 (vldrhq_u32): Likewise.
14630 (vldrhq_u16): Likewise.
14631 (vldrhq_z_s32): Likewise.
14632 (vldrhq_z_s16): Likewise.
14633 (vldrhq_z_u32): Likewise.
14634 (vldrhq_z_u16): Likewise.
14635 (vldrwq_s32): Likewise.
14636 (vldrwq_u32): Likewise.
14637 (vldrwq_z_s32): Likewise.
14638 (vldrwq_z_u32): Likewise.
14639 (vld1q_f32): Likewise.
14640 (vld1q_f16): Likewise.
14641 (vldrhq_f16): Likewise.
14642 (vldrhq_z_f16): Likewise.
14643 (vldrwq_f32): Likewise.
14644 (vldrwq_z_f32): Likewise.
14645 (__arm_vld1q_s8): Define intrinsic.
14646 (__arm_vld1q_s32): Likewise.
14647 (__arm_vld1q_s16): Likewise.
14648 (__arm_vld1q_u8): Likewise.
14649 (__arm_vld1q_u32): Likewise.
14650 (__arm_vld1q_u16): Likewise.
14651 (__arm_vldrhq_gather_offset_s32): Likewise.
14652 (__arm_vldrhq_gather_offset_s16): Likewise.
14653 (__arm_vldrhq_gather_offset_u32): Likewise.
14654 (__arm_vldrhq_gather_offset_u16): Likewise.
14655 (__arm_vldrhq_gather_offset_z_s32): Likewise.
14656 (__arm_vldrhq_gather_offset_z_s16): Likewise.
14657 (__arm_vldrhq_gather_offset_z_u32): Likewise.
14658 (__arm_vldrhq_gather_offset_z_u16): Likewise.
14659 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
14660 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
14661 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
14662 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
14663 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
14664 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
14665 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
14666 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
14667 (__arm_vldrhq_s32): Likewise.
14668 (__arm_vldrhq_s16): Likewise.
14669 (__arm_vldrhq_u32): Likewise.
14670 (__arm_vldrhq_u16): Likewise.
14671 (__arm_vldrhq_z_s32): Likewise.
14672 (__arm_vldrhq_z_s16): Likewise.
14673 (__arm_vldrhq_z_u32): Likewise.
14674 (__arm_vldrhq_z_u16): Likewise.
14675 (__arm_vldrwq_s32): Likewise.
14676 (__arm_vldrwq_u32): Likewise.
14677 (__arm_vldrwq_z_s32): Likewise.
14678 (__arm_vldrwq_z_u32): Likewise.
14679 (__arm_vld1q_f32): Likewise.
14680 (__arm_vld1q_f16): Likewise.
14681 (__arm_vldrwq_f32): Likewise.
14682 (__arm_vldrwq_z_f32): Likewise.
14683 (__arm_vldrhq_z_f16): Likewise.
14684 (__arm_vldrhq_f16): Likewise.
14685 (vld1q): Define polymorphic variant.
14686 (vldrhq_gather_offset): Likewise.
14687 (vldrhq_gather_offset_z): Likewise.
14688 (vldrhq_gather_shifted_offset): Likewise.
14689 (vldrhq_gather_shifted_offset_z): Likewise.
14690 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
14692 (LDRU_Z): Likewise.
14693 (LDRS_Z): Likewise.
14694 (LDRGU_Z): Likewise.
14696 (LDRGS_Z): Likewise.
14698 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
14699 (V_sz_elem1): Likewise.
14700 (VLD1Q): Define iterator.
14701 (VLDRHGOQ): Likewise.
14702 (VLDRHGSOQ): Likewise.
14703 (VLDRHQ): Likewise.
14704 (VLDRWQ): Likewise.
14705 (mve_vldrhq_fv8hf): Define RTL pattern.
14706 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
14707 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
14708 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
14709 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
14710 (mve_vldrhq_<supf><mode>): Likewise.
14711 (mve_vldrhq_z_fv8hf): Likewise.
14712 (mve_vldrhq_z_<supf><mode>): Likewise.
14713 (mve_vldrwq_fv4sf): Likewise.
14714 (mve_vldrwq_<supf>v4si): Likewise.
14715 (mve_vldrwq_z_fv4sf): Likewise.
14716 (mve_vldrwq_z_<supf>v4si): Likewise.
14717 (mve_vld1q_f<mode>): Define RTL expand pattern.
14718 (mve_vld1q_<supf><mode>): Likewise.
14720 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14721 Mihail Ionescu <mihail.ionescu@arm.com>
14722 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14724 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
14726 (LDRGBU_Z_QUALIFIERS): Likewise.
14727 (LDRGS_Z_QUALIFIERS): Likewise.
14728 (LDRGU_Z_QUALIFIERS): Likewise.
14729 (LDRS_Z_QUALIFIERS): Likewise.
14730 (LDRU_Z_QUALIFIERS): Likewise.
14731 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
14732 (vldrbq_gather_offset_z_u8): Likewise.
14733 (vldrbq_gather_offset_z_s32): Likewise.
14734 (vldrbq_gather_offset_z_u16): Likewise.
14735 (vldrbq_gather_offset_z_u32): Likewise.
14736 (vldrbq_gather_offset_z_s8): Likewise.
14737 (vldrbq_z_s16): Likewise.
14738 (vldrbq_z_u8): Likewise.
14739 (vldrbq_z_s8): Likewise.
14740 (vldrbq_z_s32): Likewise.
14741 (vldrbq_z_u16): Likewise.
14742 (vldrbq_z_u32): Likewise.
14743 (vldrwq_gather_base_z_u32): Likewise.
14744 (vldrwq_gather_base_z_s32): Likewise.
14745 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
14746 (__arm_vldrbq_gather_offset_z_s32): Likewise.
14747 (__arm_vldrbq_gather_offset_z_s16): Likewise.
14748 (__arm_vldrbq_gather_offset_z_u8): Likewise.
14749 (__arm_vldrbq_gather_offset_z_u32): Likewise.
14750 (__arm_vldrbq_gather_offset_z_u16): Likewise.
14751 (__arm_vldrbq_z_s8): Likewise.
14752 (__arm_vldrbq_z_s32): Likewise.
14753 (__arm_vldrbq_z_s16): Likewise.
14754 (__arm_vldrbq_z_u8): Likewise.
14755 (__arm_vldrbq_z_u32): Likewise.
14756 (__arm_vldrbq_z_u16): Likewise.
14757 (__arm_vldrwq_gather_base_z_s32): Likewise.
14758 (__arm_vldrwq_gather_base_z_u32): Likewise.
14759 (vldrbq_gather_offset_z): Define polymorphic variant.
14760 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
14762 (LDRGBU_Z_QUALIFIERS): Likewise.
14763 (LDRGS_Z_QUALIFIERS): Likewise.
14764 (LDRGU_Z_QUALIFIERS): Likewise.
14765 (LDRS_Z_QUALIFIERS): Likewise.
14766 (LDRU_Z_QUALIFIERS): Likewise.
14767 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
14769 (mve_vldrbq_z_<supf><mode>): Likewise.
14770 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
14772 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14773 Mihail Ionescu <mihail.ionescu@arm.com>
14774 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14776 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
14778 (STRU_P_QUALIFIERS): Likewise.
14779 (STRSU_P_QUALIFIERS): Likewise.
14780 (STRSS_P_QUALIFIERS): Likewise.
14781 (STRSBS_P_QUALIFIERS): Likewise.
14782 (STRSBU_P_QUALIFIERS): Likewise.
14783 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
14784 (vstrbq_p_s32): Likewise.
14785 (vstrbq_p_s16): Likewise.
14786 (vstrbq_p_u8): Likewise.
14787 (vstrbq_p_u32): Likewise.
14788 (vstrbq_p_u16): Likewise.
14789 (vstrbq_scatter_offset_p_s8): Likewise.
14790 (vstrbq_scatter_offset_p_s32): Likewise.
14791 (vstrbq_scatter_offset_p_s16): Likewise.
14792 (vstrbq_scatter_offset_p_u8): Likewise.
14793 (vstrbq_scatter_offset_p_u32): Likewise.
14794 (vstrbq_scatter_offset_p_u16): Likewise.
14795 (vstrwq_scatter_base_p_s32): Likewise.
14796 (vstrwq_scatter_base_p_u32): Likewise.
14797 (__arm_vstrbq_p_s8): Define intrinsic.
14798 (__arm_vstrbq_p_s32): Likewise.
14799 (__arm_vstrbq_p_s16): Likewise.
14800 (__arm_vstrbq_p_u8): Likewise.
14801 (__arm_vstrbq_p_u32): Likewise.
14802 (__arm_vstrbq_p_u16): Likewise.
14803 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
14804 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
14805 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
14806 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
14807 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
14808 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
14809 (__arm_vstrwq_scatter_base_p_s32): Likewise.
14810 (__arm_vstrwq_scatter_base_p_u32): Likewise.
14811 (vstrbq_p): Define polymorphic variant.
14812 (vstrbq_scatter_offset_p): Likewise.
14813 (vstrwq_scatter_base_p): Likewise.
14814 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
14816 (STRU_P_QUALIFIERS): Likewise.
14817 (STRSU_P_QUALIFIERS): Likewise.
14818 (STRSS_P_QUALIFIERS): Likewise.
14819 (STRSBS_P_QUALIFIERS): Likewise.
14820 (STRSBU_P_QUALIFIERS): Likewise.
14821 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
14823 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
14824 (mve_vstrbq_p_<supf><mode>): Likewise.
14826 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14827 Mihail Ionescu <mihail.ionescu@arm.com>
14828 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14830 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
14832 (LDRGS_QUALIFIERS): Likewise.
14833 (LDRS_QUALIFIERS): Likewise.
14834 (LDRU_QUALIFIERS): Likewise.
14835 (LDRGBS_QUALIFIERS): Likewise.
14836 (LDRGBU_QUALIFIERS): Likewise.
14837 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
14838 (vldrbq_gather_offset_s8): Likewise.
14839 (vldrbq_s8): Likewise.
14840 (vldrbq_u8): Likewise.
14841 (vldrbq_gather_offset_u16): Likewise.
14842 (vldrbq_gather_offset_s16): Likewise.
14843 (vldrbq_s16): Likewise.
14844 (vldrbq_u16): Likewise.
14845 (vldrbq_gather_offset_u32): Likewise.
14846 (vldrbq_gather_offset_s32): Likewise.
14847 (vldrbq_s32): Likewise.
14848 (vldrbq_u32): Likewise.
14849 (vldrwq_gather_base_s32): Likewise.
14850 (vldrwq_gather_base_u32): Likewise.
14851 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
14852 (__arm_vldrbq_gather_offset_s8): Likewise.
14853 (__arm_vldrbq_s8): Likewise.
14854 (__arm_vldrbq_u8): Likewise.
14855 (__arm_vldrbq_gather_offset_u16): Likewise.
14856 (__arm_vldrbq_gather_offset_s16): Likewise.
14857 (__arm_vldrbq_s16): Likewise.
14858 (__arm_vldrbq_u16): Likewise.
14859 (__arm_vldrbq_gather_offset_u32): Likewise.
14860 (__arm_vldrbq_gather_offset_s32): Likewise.
14861 (__arm_vldrbq_s32): Likewise.
14862 (__arm_vldrbq_u32): Likewise.
14863 (__arm_vldrwq_gather_base_s32): Likewise.
14864 (__arm_vldrwq_gather_base_u32): Likewise.
14865 (vldrbq_gather_offset): Define polymorphic variant.
14866 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
14868 (LDRGS_QUALIFIERS): Likewise.
14869 (LDRS_QUALIFIERS): Likewise.
14870 (LDRU_QUALIFIERS): Likewise.
14871 (LDRGBS_QUALIFIERS): Likewise.
14872 (LDRGBU_QUALIFIERS): Likewise.
14873 * config/arm/mve.md (VLDRBGOQ): Define iterator.
14874 (VLDRBQ): Likewise.
14875 (VLDRWGBQ): Likewise.
14876 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
14877 (mve_vldrbq_<supf><mode>): Likewise.
14878 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
14880 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14881 Mihail Ionescu <mihail.ionescu@arm.com>
14882 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14884 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
14885 (STRU_QUALIFIERS): Likewise.
14886 (STRSS_QUALIFIERS): Likewise.
14887 (STRSU_QUALIFIERS): Likewise.
14888 (STRSBS_QUALIFIERS): Likewise.
14889 (STRSBU_QUALIFIERS): Likewise.
14890 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
14891 (vstrbq_u8): Likewise.
14892 (vstrbq_u16): Likewise.
14893 (vstrbq_scatter_offset_s8): Likewise.
14894 (vstrbq_scatter_offset_u8): Likewise.
14895 (vstrbq_scatter_offset_u16): Likewise.
14896 (vstrbq_s16): Likewise.
14897 (vstrbq_u32): Likewise.
14898 (vstrbq_scatter_offset_s16): Likewise.
14899 (vstrbq_scatter_offset_u32): Likewise.
14900 (vstrbq_s32): Likewise.
14901 (vstrbq_scatter_offset_s32): Likewise.
14902 (vstrwq_scatter_base_s32): Likewise.
14903 (vstrwq_scatter_base_u32): Likewise.
14904 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
14905 (__arm_vstrbq_scatter_offset_s32): Likewise.
14906 (__arm_vstrbq_scatter_offset_s16): Likewise.
14907 (__arm_vstrbq_scatter_offset_u8): Likewise.
14908 (__arm_vstrbq_scatter_offset_u32): Likewise.
14909 (__arm_vstrbq_scatter_offset_u16): Likewise.
14910 (__arm_vstrbq_s8): Likewise.
14911 (__arm_vstrbq_s32): Likewise.
14912 (__arm_vstrbq_s16): Likewise.
14913 (__arm_vstrbq_u8): Likewise.
14914 (__arm_vstrbq_u32): Likewise.
14915 (__arm_vstrbq_u16): Likewise.
14916 (__arm_vstrwq_scatter_base_s32): Likewise.
14917 (__arm_vstrwq_scatter_base_u32): Likewise.
14918 (vstrbq): Define polymorphic variant.
14919 (vstrbq_scatter_offset): Likewise.
14920 (vstrwq_scatter_base): Likewise.
14921 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
14923 (STRU_QUALIFIERS): Likewise.
14924 (STRSS_QUALIFIERS): Likewise.
14925 (STRSU_QUALIFIERS): Likewise.
14926 (STRSBS_QUALIFIERS): Likewise.
14927 (STRSBU_QUALIFIERS): Likewise.
14928 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
14929 (VSTRWSBQ): Define iterators.
14930 (VSTRBSOQ): Likewise.
14931 (VSTRBQ): Likewise.
14932 (mve_vstrbq_<supf><mode>): Define RTL pattern.
14933 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
14934 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
14936 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14937 Mihail Ionescu <mihail.ionescu@arm.com>
14938 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14940 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
14941 (vabdq_m_f16): Likewise.
14942 (vaddq_m_f32): Likewise.
14943 (vaddq_m_f16): Likewise.
14944 (vaddq_m_n_f32): Likewise.
14945 (vaddq_m_n_f16): Likewise.
14946 (vandq_m_f32): Likewise.
14947 (vandq_m_f16): Likewise.
14948 (vbicq_m_f32): Likewise.
14949 (vbicq_m_f16): Likewise.
14950 (vbrsrq_m_n_f32): Likewise.
14951 (vbrsrq_m_n_f16): Likewise.
14952 (vcaddq_rot270_m_f32): Likewise.
14953 (vcaddq_rot270_m_f16): Likewise.
14954 (vcaddq_rot90_m_f32): Likewise.
14955 (vcaddq_rot90_m_f16): Likewise.
14956 (vcmlaq_m_f32): Likewise.
14957 (vcmlaq_m_f16): Likewise.
14958 (vcmlaq_rot180_m_f32): Likewise.
14959 (vcmlaq_rot180_m_f16): Likewise.
14960 (vcmlaq_rot270_m_f32): Likewise.
14961 (vcmlaq_rot270_m_f16): Likewise.
14962 (vcmlaq_rot90_m_f32): Likewise.
14963 (vcmlaq_rot90_m_f16): Likewise.
14964 (vcmulq_m_f32): Likewise.
14965 (vcmulq_m_f16): Likewise.
14966 (vcmulq_rot180_m_f32): Likewise.
14967 (vcmulq_rot180_m_f16): Likewise.
14968 (vcmulq_rot270_m_f32): Likewise.
14969 (vcmulq_rot270_m_f16): Likewise.
14970 (vcmulq_rot90_m_f32): Likewise.
14971 (vcmulq_rot90_m_f16): Likewise.
14972 (vcvtq_m_n_s32_f32): Likewise.
14973 (vcvtq_m_n_s16_f16): Likewise.
14974 (vcvtq_m_n_u32_f32): Likewise.
14975 (vcvtq_m_n_u16_f16): Likewise.
14976 (veorq_m_f32): Likewise.
14977 (veorq_m_f16): Likewise.
14978 (vfmaq_m_f32): Likewise.
14979 (vfmaq_m_f16): Likewise.
14980 (vfmaq_m_n_f32): Likewise.
14981 (vfmaq_m_n_f16): Likewise.
14982 (vfmasq_m_n_f32): Likewise.
14983 (vfmasq_m_n_f16): Likewise.
14984 (vfmsq_m_f32): Likewise.
14985 (vfmsq_m_f16): Likewise.
14986 (vmaxnmq_m_f32): Likewise.
14987 (vmaxnmq_m_f16): Likewise.
14988 (vminnmq_m_f32): Likewise.
14989 (vminnmq_m_f16): Likewise.
14990 (vmulq_m_f32): Likewise.
14991 (vmulq_m_f16): Likewise.
14992 (vmulq_m_n_f32): Likewise.
14993 (vmulq_m_n_f16): Likewise.
14994 (vornq_m_f32): Likewise.
14995 (vornq_m_f16): Likewise.
14996 (vorrq_m_f32): Likewise.
14997 (vorrq_m_f16): Likewise.
14998 (vsubq_m_f32): Likewise.
14999 (vsubq_m_f16): Likewise.
15000 (vsubq_m_n_f32): Likewise.
15001 (vsubq_m_n_f16): Likewise.
15002 (__attribute__): Likewise.
15003 (__arm_vabdq_m_f32): Likewise.
15004 (__arm_vabdq_m_f16): Likewise.
15005 (__arm_vaddq_m_f32): Likewise.
15006 (__arm_vaddq_m_f16): Likewise.
15007 (__arm_vaddq_m_n_f32): Likewise.
15008 (__arm_vaddq_m_n_f16): Likewise.
15009 (__arm_vandq_m_f32): Likewise.
15010 (__arm_vandq_m_f16): Likewise.
15011 (__arm_vbicq_m_f32): Likewise.
15012 (__arm_vbicq_m_f16): Likewise.
15013 (__arm_vbrsrq_m_n_f32): Likewise.
15014 (__arm_vbrsrq_m_n_f16): Likewise.
15015 (__arm_vcaddq_rot270_m_f32): Likewise.
15016 (__arm_vcaddq_rot270_m_f16): Likewise.
15017 (__arm_vcaddq_rot90_m_f32): Likewise.
15018 (__arm_vcaddq_rot90_m_f16): Likewise.
15019 (__arm_vcmlaq_m_f32): Likewise.
15020 (__arm_vcmlaq_m_f16): Likewise.
15021 (__arm_vcmlaq_rot180_m_f32): Likewise.
15022 (__arm_vcmlaq_rot180_m_f16): Likewise.
15023 (__arm_vcmlaq_rot270_m_f32): Likewise.
15024 (__arm_vcmlaq_rot270_m_f16): Likewise.
15025 (__arm_vcmlaq_rot90_m_f32): Likewise.
15026 (__arm_vcmlaq_rot90_m_f16): Likewise.
15027 (__arm_vcmulq_m_f32): Likewise.
15028 (__arm_vcmulq_m_f16): Likewise.
15029 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
15030 (__arm_vcmulq_rot180_m_f16): Likewise.
15031 (__arm_vcmulq_rot270_m_f32): Likewise.
15032 (__arm_vcmulq_rot270_m_f16): Likewise.
15033 (__arm_vcmulq_rot90_m_f32): Likewise.
15034 (__arm_vcmulq_rot90_m_f16): Likewise.
15035 (__arm_vcvtq_m_n_s32_f32): Likewise.
15036 (__arm_vcvtq_m_n_s16_f16): Likewise.
15037 (__arm_vcvtq_m_n_u32_f32): Likewise.
15038 (__arm_vcvtq_m_n_u16_f16): Likewise.
15039 (__arm_veorq_m_f32): Likewise.
15040 (__arm_veorq_m_f16): Likewise.
15041 (__arm_vfmaq_m_f32): Likewise.
15042 (__arm_vfmaq_m_f16): Likewise.
15043 (__arm_vfmaq_m_n_f32): Likewise.
15044 (__arm_vfmaq_m_n_f16): Likewise.
15045 (__arm_vfmasq_m_n_f32): Likewise.
15046 (__arm_vfmasq_m_n_f16): Likewise.
15047 (__arm_vfmsq_m_f32): Likewise.
15048 (__arm_vfmsq_m_f16): Likewise.
15049 (__arm_vmaxnmq_m_f32): Likewise.
15050 (__arm_vmaxnmq_m_f16): Likewise.
15051 (__arm_vminnmq_m_f32): Likewise.
15052 (__arm_vminnmq_m_f16): Likewise.
15053 (__arm_vmulq_m_f32): Likewise.
15054 (__arm_vmulq_m_f16): Likewise.
15055 (__arm_vmulq_m_n_f32): Likewise.
15056 (__arm_vmulq_m_n_f16): Likewise.
15057 (__arm_vornq_m_f32): Likewise.
15058 (__arm_vornq_m_f16): Likewise.
15059 (__arm_vorrq_m_f32): Likewise.
15060 (__arm_vorrq_m_f16): Likewise.
15061 (__arm_vsubq_m_f32): Likewise.
15062 (__arm_vsubq_m_f16): Likewise.
15063 (__arm_vsubq_m_n_f32): Likewise.
15064 (__arm_vsubq_m_n_f16): Likewise.
15065 (vabdq_m): Define polymorphic variant.
15066 (vaddq_m): Likewise.
15067 (vaddq_m_n): Likewise.
15068 (vandq_m): Likewise.
15069 (vbicq_m): Likewise.
15070 (vbrsrq_m_n): Likewise.
15071 (vcaddq_rot270_m): Likewise.
15072 (vcaddq_rot90_m): Likewise.
15073 (vcmlaq_m): Likewise.
15074 (vcmlaq_rot180_m): Likewise.
15075 (vcmlaq_rot270_m): Likewise.
15076 (vcmlaq_rot90_m): Likewise.
15077 (vcmulq_m): Likewise.
15078 (vcmulq_rot180_m): Likewise.
15079 (vcmulq_rot270_m): Likewise.
15080 (vcmulq_rot90_m): Likewise.
15081 (veorq_m): Likewise.
15082 (vfmaq_m): Likewise.
15083 (vfmaq_m_n): Likewise.
15084 (vfmasq_m_n): Likewise.
15085 (vfmsq_m): Likewise.
15086 (vmaxnmq_m): Likewise.
15087 (vminnmq_m): Likewise.
15088 (vmulq_m): Likewise.
15089 (vmulq_m_n): Likewise.
15090 (vornq_m): Likewise.
15091 (vsubq_m): Likewise.
15092 (vsubq_m_n): Likewise.
15093 (vorrq_m): Likewise.
15094 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
15096 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
15097 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
15098 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
15099 (mve_vaddq_m_f<mode>): Likewise.
15100 (mve_vaddq_m_n_f<mode>): Likewise.
15101 (mve_vandq_m_f<mode>): Likewise.
15102 (mve_vbicq_m_f<mode>): Likewise.
15103 (mve_vbrsrq_m_n_f<mode>): Likewise.
15104 (mve_vcaddq_rot270_m_f<mode>): Likewise.
15105 (mve_vcaddq_rot90_m_f<mode>): Likewise.
15106 (mve_vcmlaq_m_f<mode>): Likewise.
15107 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
15108 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
15109 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
15110 (mve_vcmulq_m_f<mode>): Likewise.
15111 (mve_vcmulq_rot180_m_f<mode>): Likewise.
15112 (mve_vcmulq_rot270_m_f<mode>): Likewise.
15113 (mve_vcmulq_rot90_m_f<mode>): Likewise.
15114 (mve_veorq_m_f<mode>): Likewise.
15115 (mve_vfmaq_m_f<mode>): Likewise.
15116 (mve_vfmaq_m_n_f<mode>): Likewise.
15117 (mve_vfmasq_m_n_f<mode>): Likewise.
15118 (mve_vfmsq_m_f<mode>): Likewise.
15119 (mve_vmaxnmq_m_f<mode>): Likewise.
15120 (mve_vminnmq_m_f<mode>): Likewise.
15121 (mve_vmulq_m_f<mode>): Likewise.
15122 (mve_vmulq_m_n_f<mode>): Likewise.
15123 (mve_vornq_m_f<mode>): Likewise.
15124 (mve_vorrq_m_f<mode>): Likewise.
15125 (mve_vsubq_m_f<mode>): Likewise.
15126 (mve_vsubq_m_n_f<mode>): Likewise.
15128 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15129 Mihail Ionescu <mihail.ionescu@arm.com>
15130 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15132 * config/arm/arm-protos.h (arm_mve_immediate_check):
15133 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
15134 mode and interger value.
15135 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
15136 (vmlaldavaq_p_s16): Likewise.
15137 (vmlaldavaq_p_u32): Likewise.
15138 (vmlaldavaq_p_u16): Likewise.
15139 (vmlaldavaxq_p_s32): Likewise.
15140 (vmlaldavaxq_p_s16): Likewise.
15141 (vmlaldavaxq_p_u32): Likewise.
15142 (vmlaldavaxq_p_u16): Likewise.
15143 (vmlsldavaq_p_s32): Likewise.
15144 (vmlsldavaq_p_s16): Likewise.
15145 (vmlsldavaxq_p_s32): Likewise.
15146 (vmlsldavaxq_p_s16): Likewise.
15147 (vmullbq_poly_m_p8): Likewise.
15148 (vmullbq_poly_m_p16): Likewise.
15149 (vmulltq_poly_m_p8): Likewise.
15150 (vmulltq_poly_m_p16): Likewise.
15151 (vqdmullbq_m_n_s32): Likewise.
15152 (vqdmullbq_m_n_s16): Likewise.
15153 (vqdmullbq_m_s32): Likewise.
15154 (vqdmullbq_m_s16): Likewise.
15155 (vqdmulltq_m_n_s32): Likewise.
15156 (vqdmulltq_m_n_s16): Likewise.
15157 (vqdmulltq_m_s32): Likewise.
15158 (vqdmulltq_m_s16): Likewise.
15159 (vqrshrnbq_m_n_s32): Likewise.
15160 (vqrshrnbq_m_n_s16): Likewise.
15161 (vqrshrnbq_m_n_u32): Likewise.
15162 (vqrshrnbq_m_n_u16): Likewise.
15163 (vqrshrntq_m_n_s32): Likewise.
15164 (vqrshrntq_m_n_s16): Likewise.
15165 (vqrshrntq_m_n_u32): Likewise.
15166 (vqrshrntq_m_n_u16): Likewise.
15167 (vqrshrunbq_m_n_s32): Likewise.
15168 (vqrshrunbq_m_n_s16): Likewise.
15169 (vqrshruntq_m_n_s32): Likewise.
15170 (vqrshruntq_m_n_s16): Likewise.
15171 (vqshrnbq_m_n_s32): Likewise.
15172 (vqshrnbq_m_n_s16): Likewise.
15173 (vqshrnbq_m_n_u32): Likewise.
15174 (vqshrnbq_m_n_u16): Likewise.
15175 (vqshrntq_m_n_s32): Likewise.
15176 (vqshrntq_m_n_s16): Likewise.
15177 (vqshrntq_m_n_u32): Likewise.
15178 (vqshrntq_m_n_u16): Likewise.
15179 (vqshrunbq_m_n_s32): Likewise.
15180 (vqshrunbq_m_n_s16): Likewise.
15181 (vqshruntq_m_n_s32): Likewise.
15182 (vqshruntq_m_n_s16): Likewise.
15183 (vrmlaldavhaq_p_s32): Likewise.
15184 (vrmlaldavhaq_p_u32): Likewise.
15185 (vrmlaldavhaxq_p_s32): Likewise.
15186 (vrmlsldavhaq_p_s32): Likewise.
15187 (vrmlsldavhaxq_p_s32): Likewise.
15188 (vrshrnbq_m_n_s32): Likewise.
15189 (vrshrnbq_m_n_s16): Likewise.
15190 (vrshrnbq_m_n_u32): Likewise.
15191 (vrshrnbq_m_n_u16): Likewise.
15192 (vrshrntq_m_n_s32): Likewise.
15193 (vrshrntq_m_n_s16): Likewise.
15194 (vrshrntq_m_n_u32): Likewise.
15195 (vrshrntq_m_n_u16): Likewise.
15196 (vshllbq_m_n_s8): Likewise.
15197 (vshllbq_m_n_s16): Likewise.
15198 (vshllbq_m_n_u8): Likewise.
15199 (vshllbq_m_n_u16): Likewise.
15200 (vshlltq_m_n_s8): Likewise.
15201 (vshlltq_m_n_s16): Likewise.
15202 (vshlltq_m_n_u8): Likewise.
15203 (vshlltq_m_n_u16): Likewise.
15204 (vshrnbq_m_n_s32): Likewise.
15205 (vshrnbq_m_n_s16): Likewise.
15206 (vshrnbq_m_n_u32): Likewise.
15207 (vshrnbq_m_n_u16): Likewise.
15208 (vshrntq_m_n_s32): Likewise.
15209 (vshrntq_m_n_s16): Likewise.
15210 (vshrntq_m_n_u32): Likewise.
15211 (vshrntq_m_n_u16): Likewise.
15212 (__arm_vmlaldavaq_p_s32): Define intrinsic.
15213 (__arm_vmlaldavaq_p_s16): Likewise.
15214 (__arm_vmlaldavaq_p_u32): Likewise.
15215 (__arm_vmlaldavaq_p_u16): Likewise.
15216 (__arm_vmlaldavaxq_p_s32): Likewise.
15217 (__arm_vmlaldavaxq_p_s16): Likewise.
15218 (__arm_vmlaldavaxq_p_u32): Likewise.
15219 (__arm_vmlaldavaxq_p_u16): Likewise.
15220 (__arm_vmlsldavaq_p_s32): Likewise.
15221 (__arm_vmlsldavaq_p_s16): Likewise.
15222 (__arm_vmlsldavaxq_p_s32): Likewise.
15223 (__arm_vmlsldavaxq_p_s16): Likewise.
15224 (__arm_vmullbq_poly_m_p8): Likewise.
15225 (__arm_vmullbq_poly_m_p16): Likewise.
15226 (__arm_vmulltq_poly_m_p8): Likewise.
15227 (__arm_vmulltq_poly_m_p16): Likewise.
15228 (__arm_vqdmullbq_m_n_s32): Likewise.
15229 (__arm_vqdmullbq_m_n_s16): Likewise.
15230 (__arm_vqdmullbq_m_s32): Likewise.
15231 (__arm_vqdmullbq_m_s16): Likewise.
15232 (__arm_vqdmulltq_m_n_s32): Likewise.
15233 (__arm_vqdmulltq_m_n_s16): Likewise.
15234 (__arm_vqdmulltq_m_s32): Likewise.
15235 (__arm_vqdmulltq_m_s16): Likewise.
15236 (__arm_vqrshrnbq_m_n_s32): Likewise.
15237 (__arm_vqrshrnbq_m_n_s16): Likewise.
15238 (__arm_vqrshrnbq_m_n_u32): Likewise.
15239 (__arm_vqrshrnbq_m_n_u16): Likewise.
15240 (__arm_vqrshrntq_m_n_s32): Likewise.
15241 (__arm_vqrshrntq_m_n_s16): Likewise.
15242 (__arm_vqrshrntq_m_n_u32): Likewise.
15243 (__arm_vqrshrntq_m_n_u16): Likewise.
15244 (__arm_vqrshrunbq_m_n_s32): Likewise.
15245 (__arm_vqrshrunbq_m_n_s16): Likewise.
15246 (__arm_vqrshruntq_m_n_s32): Likewise.
15247 (__arm_vqrshruntq_m_n_s16): Likewise.
15248 (__arm_vqshrnbq_m_n_s32): Likewise.
15249 (__arm_vqshrnbq_m_n_s16): Likewise.
15250 (__arm_vqshrnbq_m_n_u32): Likewise.
15251 (__arm_vqshrnbq_m_n_u16): Likewise.
15252 (__arm_vqshrntq_m_n_s32): Likewise.
15253 (__arm_vqshrntq_m_n_s16): Likewise.
15254 (__arm_vqshrntq_m_n_u32): Likewise.
15255 (__arm_vqshrntq_m_n_u16): Likewise.
15256 (__arm_vqshrunbq_m_n_s32): Likewise.
15257 (__arm_vqshrunbq_m_n_s16): Likewise.
15258 (__arm_vqshruntq_m_n_s32): Likewise.
15259 (__arm_vqshruntq_m_n_s16): Likewise.
15260 (__arm_vrmlaldavhaq_p_s32): Likewise.
15261 (__arm_vrmlaldavhaq_p_u32): Likewise.
15262 (__arm_vrmlaldavhaxq_p_s32): Likewise.
15263 (__arm_vrmlsldavhaq_p_s32): Likewise.
15264 (__arm_vrmlsldavhaxq_p_s32): Likewise.
15265 (__arm_vrshrnbq_m_n_s32): Likewise.
15266 (__arm_vrshrnbq_m_n_s16): Likewise.
15267 (__arm_vrshrnbq_m_n_u32): Likewise.
15268 (__arm_vrshrnbq_m_n_u16): Likewise.
15269 (__arm_vrshrntq_m_n_s32): Likewise.
15270 (__arm_vrshrntq_m_n_s16): Likewise.
15271 (__arm_vrshrntq_m_n_u32): Likewise.
15272 (__arm_vrshrntq_m_n_u16): Likewise.
15273 (__arm_vshllbq_m_n_s8): Likewise.
15274 (__arm_vshllbq_m_n_s16): Likewise.
15275 (__arm_vshllbq_m_n_u8): Likewise.
15276 (__arm_vshllbq_m_n_u16): Likewise.
15277 (__arm_vshlltq_m_n_s8): Likewise.
15278 (__arm_vshlltq_m_n_s16): Likewise.
15279 (__arm_vshlltq_m_n_u8): Likewise.
15280 (__arm_vshlltq_m_n_u16): Likewise.
15281 (__arm_vshrnbq_m_n_s32): Likewise.
15282 (__arm_vshrnbq_m_n_s16): Likewise.
15283 (__arm_vshrnbq_m_n_u32): Likewise.
15284 (__arm_vshrnbq_m_n_u16): Likewise.
15285 (__arm_vshrntq_m_n_s32): Likewise.
15286 (__arm_vshrntq_m_n_s16): Likewise.
15287 (__arm_vshrntq_m_n_u32): Likewise.
15288 (__arm_vshrntq_m_n_u16): Likewise.
15289 (vmullbq_poly_m): Define polymorphic variant.
15290 (vmulltq_poly_m): Likewise.
15291 (vshllbq_m): Likewise.
15292 (vshrntq_m_n): Likewise.
15293 (vshrnbq_m_n): Likewise.
15294 (vshlltq_m_n): Likewise.
15295 (vshllbq_m_n): Likewise.
15296 (vrshrntq_m_n): Likewise.
15297 (vrshrnbq_m_n): Likewise.
15298 (vqshruntq_m_n): Likewise.
15299 (vqshrunbq_m_n): Likewise.
15300 (vqdmullbq_m_n): Likewise.
15301 (vqdmullbq_m): Likewise.
15302 (vqdmulltq_m_n): Likewise.
15303 (vqdmulltq_m): Likewise.
15304 (vqrshrnbq_m_n): Likewise.
15305 (vqrshrntq_m_n): Likewise.
15306 (vqrshrunbq_m_n): Likewise.
15307 (vqrshruntq_m_n): Likewise.
15308 (vqshrnbq_m_n): Likewise.
15309 (vqshrntq_m_n): Likewise.
15310 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
15311 builtin qualifiers.
15312 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
15313 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
15314 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
15315 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
15316 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
15317 (VMLALDAVAXQ_P): Likewise.
15318 (VQRSHRNBQ_M_N): Likewise.
15319 (VQRSHRNTQ_M_N): Likewise.
15320 (VQSHRNBQ_M_N): Likewise.
15321 (VQSHRNTQ_M_N): Likewise.
15322 (VRSHRNBQ_M_N): Likewise.
15323 (VRSHRNTQ_M_N): Likewise.
15324 (VSHLLBQ_M_N): Likewise.
15325 (VSHLLTQ_M_N): Likewise.
15326 (VSHRNBQ_M_N): Likewise.
15327 (VSHRNTQ_M_N): Likewise.
15328 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
15329 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
15330 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
15331 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
15332 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
15333 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
15334 (mve_vrmlaldavhaq_p_sv4si): Likewise.
15335 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
15336 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
15337 (mve_vshllbq_m_n_<supf><mode>): Likewise.
15338 (mve_vshlltq_m_n_<supf><mode>): Likewise.
15339 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
15340 (mve_vshrntq_m_n_<supf><mode>): Likewise.
15341 (mve_vmlsldavaq_p_s<mode>): Likewise.
15342 (mve_vmlsldavaxq_p_s<mode>): Likewise.
15343 (mve_vmullbq_poly_m_p<mode>): Likewise.
15344 (mve_vmulltq_poly_m_p<mode>): Likewise.
15345 (mve_vqdmullbq_m_n_s<mode>): Likewise.
15346 (mve_vqdmullbq_m_s<mode>): Likewise.
15347 (mve_vqdmulltq_m_n_s<mode>): Likewise.
15348 (mve_vqdmulltq_m_s<mode>): Likewise.
15349 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
15350 (mve_vqrshruntq_m_n_s<mode>): Likewise.
15351 (mve_vqshrunbq_m_n_s<mode>): Likewise.
15352 (mve_vqshruntq_m_n_s<mode>): Likewise.
15353 (mve_vrmlaldavhaq_p_uv4si): Likewise.
15354 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
15355 (mve_vrmlsldavhaq_p_sv4si): Likewise.
15356 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
15358 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15359 Mihail Ionescu <mihail.ionescu@arm.com>
15360 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15362 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
15363 (vabdq_m_s32): Likewise.
15364 (vabdq_m_s16): Likewise.
15365 (vabdq_m_u8): Likewise.
15366 (vabdq_m_u32): Likewise.
15367 (vabdq_m_u16): Likewise.
15368 (vaddq_m_n_s8): Likewise.
15369 (vaddq_m_n_s32): Likewise.
15370 (vaddq_m_n_s16): Likewise.
15371 (vaddq_m_n_u8): Likewise.
15372 (vaddq_m_n_u32): Likewise.
15373 (vaddq_m_n_u16): Likewise.
15374 (vaddq_m_s8): Likewise.
15375 (vaddq_m_s32): Likewise.
15376 (vaddq_m_s16): Likewise.
15377 (vaddq_m_u8): Likewise.
15378 (vaddq_m_u32): Likewise.
15379 (vaddq_m_u16): Likewise.
15380 (vandq_m_s8): Likewise.
15381 (vandq_m_s32): Likewise.
15382 (vandq_m_s16): Likewise.
15383 (vandq_m_u8): Likewise.
15384 (vandq_m_u32): Likewise.
15385 (vandq_m_u16): Likewise.
15386 (vbicq_m_s8): Likewise.
15387 (vbicq_m_s32): Likewise.
15388 (vbicq_m_s16): Likewise.
15389 (vbicq_m_u8): Likewise.
15390 (vbicq_m_u32): Likewise.
15391 (vbicq_m_u16): Likewise.
15392 (vbrsrq_m_n_s8): Likewise.
15393 (vbrsrq_m_n_s32): Likewise.
15394 (vbrsrq_m_n_s16): Likewise.
15395 (vbrsrq_m_n_u8): Likewise.
15396 (vbrsrq_m_n_u32): Likewise.
15397 (vbrsrq_m_n_u16): Likewise.
15398 (vcaddq_rot270_m_s8): Likewise.
15399 (vcaddq_rot270_m_s32): Likewise.
15400 (vcaddq_rot270_m_s16): Likewise.
15401 (vcaddq_rot270_m_u8): Likewise.
15402 (vcaddq_rot270_m_u32): Likewise.
15403 (vcaddq_rot270_m_u16): Likewise.
15404 (vcaddq_rot90_m_s8): Likewise.
15405 (vcaddq_rot90_m_s32): Likewise.
15406 (vcaddq_rot90_m_s16): Likewise.
15407 (vcaddq_rot90_m_u8): Likewise.
15408 (vcaddq_rot90_m_u32): Likewise.
15409 (vcaddq_rot90_m_u16): Likewise.
15410 (veorq_m_s8): Likewise.
15411 (veorq_m_s32): Likewise.
15412 (veorq_m_s16): Likewise.
15413 (veorq_m_u8): Likewise.
15414 (veorq_m_u32): Likewise.
15415 (veorq_m_u16): Likewise.
15416 (vhaddq_m_n_s8): Likewise.
15417 (vhaddq_m_n_s32): Likewise.
15418 (vhaddq_m_n_s16): Likewise.
15419 (vhaddq_m_n_u8): Likewise.
15420 (vhaddq_m_n_u32): Likewise.
15421 (vhaddq_m_n_u16): Likewise.
15422 (vhaddq_m_s8): Likewise.
15423 (vhaddq_m_s32): Likewise.
15424 (vhaddq_m_s16): Likewise.
15425 (vhaddq_m_u8): Likewise.
15426 (vhaddq_m_u32): Likewise.
15427 (vhaddq_m_u16): Likewise.
15428 (vhcaddq_rot270_m_s8): Likewise.
15429 (vhcaddq_rot270_m_s32): Likewise.
15430 (vhcaddq_rot270_m_s16): Likewise.
15431 (vhcaddq_rot90_m_s8): Likewise.
15432 (vhcaddq_rot90_m_s32): Likewise.
15433 (vhcaddq_rot90_m_s16): Likewise.
15434 (vhsubq_m_n_s8): Likewise.
15435 (vhsubq_m_n_s32): Likewise.
15436 (vhsubq_m_n_s16): Likewise.
15437 (vhsubq_m_n_u8): Likewise.
15438 (vhsubq_m_n_u32): Likewise.
15439 (vhsubq_m_n_u16): Likewise.
15440 (vhsubq_m_s8): Likewise.
15441 (vhsubq_m_s32): Likewise.
15442 (vhsubq_m_s16): Likewise.
15443 (vhsubq_m_u8): Likewise.
15444 (vhsubq_m_u32): Likewise.
15445 (vhsubq_m_u16): Likewise.
15446 (vmaxq_m_s8): Likewise.
15447 (vmaxq_m_s32): Likewise.
15448 (vmaxq_m_s16): Likewise.
15449 (vmaxq_m_u8): Likewise.
15450 (vmaxq_m_u32): Likewise.
15451 (vmaxq_m_u16): Likewise.
15452 (vminq_m_s8): Likewise.
15453 (vminq_m_s32): Likewise.
15454 (vminq_m_s16): Likewise.
15455 (vminq_m_u8): Likewise.
15456 (vminq_m_u32): Likewise.
15457 (vminq_m_u16): Likewise.
15458 (vmladavaq_p_s8): Likewise.
15459 (vmladavaq_p_s32): Likewise.
15460 (vmladavaq_p_s16): Likewise.
15461 (vmladavaq_p_u8): Likewise.
15462 (vmladavaq_p_u32): Likewise.
15463 (vmladavaq_p_u16): Likewise.
15464 (vmladavaxq_p_s8): Likewise.
15465 (vmladavaxq_p_s32): Likewise.
15466 (vmladavaxq_p_s16): Likewise.
15467 (vmlaq_m_n_s8): Likewise.
15468 (vmlaq_m_n_s32): Likewise.
15469 (vmlaq_m_n_s16): Likewise.
15470 (vmlaq_m_n_u8): Likewise.
15471 (vmlaq_m_n_u32): Likewise.
15472 (vmlaq_m_n_u16): Likewise.
15473 (vmlasq_m_n_s8): Likewise.
15474 (vmlasq_m_n_s32): Likewise.
15475 (vmlasq_m_n_s16): Likewise.
15476 (vmlasq_m_n_u8): Likewise.
15477 (vmlasq_m_n_u32): Likewise.
15478 (vmlasq_m_n_u16): Likewise.
15479 (vmlsdavaq_p_s8): Likewise.
15480 (vmlsdavaq_p_s32): Likewise.
15481 (vmlsdavaq_p_s16): Likewise.
15482 (vmlsdavaxq_p_s8): Likewise.
15483 (vmlsdavaxq_p_s32): Likewise.
15484 (vmlsdavaxq_p_s16): Likewise.
15485 (vmulhq_m_s8): Likewise.
15486 (vmulhq_m_s32): Likewise.
15487 (vmulhq_m_s16): Likewise.
15488 (vmulhq_m_u8): Likewise.
15489 (vmulhq_m_u32): Likewise.
15490 (vmulhq_m_u16): Likewise.
15491 (vmullbq_int_m_s8): Likewise.
15492 (vmullbq_int_m_s32): Likewise.
15493 (vmullbq_int_m_s16): Likewise.
15494 (vmullbq_int_m_u8): Likewise.
15495 (vmullbq_int_m_u32): Likewise.
15496 (vmullbq_int_m_u16): Likewise.
15497 (vmulltq_int_m_s8): Likewise.
15498 (vmulltq_int_m_s32): Likewise.
15499 (vmulltq_int_m_s16): Likewise.
15500 (vmulltq_int_m_u8): Likewise.
15501 (vmulltq_int_m_u32): Likewise.
15502 (vmulltq_int_m_u16): Likewise.
15503 (vmulq_m_n_s8): Likewise.
15504 (vmulq_m_n_s32): Likewise.
15505 (vmulq_m_n_s16): Likewise.
15506 (vmulq_m_n_u8): Likewise.
15507 (vmulq_m_n_u32): Likewise.
15508 (vmulq_m_n_u16): Likewise.
15509 (vmulq_m_s8): Likewise.
15510 (vmulq_m_s32): Likewise.
15511 (vmulq_m_s16): Likewise.
15512 (vmulq_m_u8): Likewise.
15513 (vmulq_m_u32): Likewise.
15514 (vmulq_m_u16): Likewise.
15515 (vornq_m_s8): Likewise.
15516 (vornq_m_s32): Likewise.
15517 (vornq_m_s16): Likewise.
15518 (vornq_m_u8): Likewise.
15519 (vornq_m_u32): Likewise.
15520 (vornq_m_u16): Likewise.
15521 (vorrq_m_s8): Likewise.
15522 (vorrq_m_s32): Likewise.
15523 (vorrq_m_s16): Likewise.
15524 (vorrq_m_u8): Likewise.
15525 (vorrq_m_u32): Likewise.
15526 (vorrq_m_u16): Likewise.
15527 (vqaddq_m_n_s8): Likewise.
15528 (vqaddq_m_n_s32): Likewise.
15529 (vqaddq_m_n_s16): Likewise.
15530 (vqaddq_m_n_u8): Likewise.
15531 (vqaddq_m_n_u32): Likewise.
15532 (vqaddq_m_n_u16): Likewise.
15533 (vqaddq_m_s8): Likewise.
15534 (vqaddq_m_s32): Likewise.
15535 (vqaddq_m_s16): Likewise.
15536 (vqaddq_m_u8): Likewise.
15537 (vqaddq_m_u32): Likewise.
15538 (vqaddq_m_u16): Likewise.
15539 (vqdmladhq_m_s8): Likewise.
15540 (vqdmladhq_m_s32): Likewise.
15541 (vqdmladhq_m_s16): Likewise.
15542 (vqdmladhxq_m_s8): Likewise.
15543 (vqdmladhxq_m_s32): Likewise.
15544 (vqdmladhxq_m_s16): Likewise.
15545 (vqdmlahq_m_n_s8): Likewise.
15546 (vqdmlahq_m_n_s32): Likewise.
15547 (vqdmlahq_m_n_s16): Likewise.
15548 (vqdmlahq_m_n_u8): Likewise.
15549 (vqdmlahq_m_n_u32): Likewise.
15550 (vqdmlahq_m_n_u16): Likewise.
15551 (vqdmlsdhq_m_s8): Likewise.
15552 (vqdmlsdhq_m_s32): Likewise.
15553 (vqdmlsdhq_m_s16): Likewise.
15554 (vqdmlsdhxq_m_s8): Likewise.
15555 (vqdmlsdhxq_m_s32): Likewise.
15556 (vqdmlsdhxq_m_s16): Likewise.
15557 (vqdmulhq_m_n_s8): Likewise.
15558 (vqdmulhq_m_n_s32): Likewise.
15559 (vqdmulhq_m_n_s16): Likewise.
15560 (vqdmulhq_m_s8): Likewise.
15561 (vqdmulhq_m_s32): Likewise.
15562 (vqdmulhq_m_s16): Likewise.
15563 (vqrdmladhq_m_s8): Likewise.
15564 (vqrdmladhq_m_s32): Likewise.
15565 (vqrdmladhq_m_s16): Likewise.
15566 (vqrdmladhxq_m_s8): Likewise.
15567 (vqrdmladhxq_m_s32): Likewise.
15568 (vqrdmladhxq_m_s16): Likewise.
15569 (vqrdmlahq_m_n_s8): Likewise.
15570 (vqrdmlahq_m_n_s32): Likewise.
15571 (vqrdmlahq_m_n_s16): Likewise.
15572 (vqrdmlahq_m_n_u8): Likewise.
15573 (vqrdmlahq_m_n_u32): Likewise.
15574 (vqrdmlahq_m_n_u16): Likewise.
15575 (vqrdmlashq_m_n_s8): Likewise.
15576 (vqrdmlashq_m_n_s32): Likewise.
15577 (vqrdmlashq_m_n_s16): Likewise.
15578 (vqrdmlashq_m_n_u8): Likewise.
15579 (vqrdmlashq_m_n_u32): Likewise.
15580 (vqrdmlashq_m_n_u16): Likewise.
15581 (vqrdmlsdhq_m_s8): Likewise.
15582 (vqrdmlsdhq_m_s32): Likewise.
15583 (vqrdmlsdhq_m_s16): Likewise.
15584 (vqrdmlsdhxq_m_s8): Likewise.
15585 (vqrdmlsdhxq_m_s32): Likewise.
15586 (vqrdmlsdhxq_m_s16): Likewise.
15587 (vqrdmulhq_m_n_s8): Likewise.
15588 (vqrdmulhq_m_n_s32): Likewise.
15589 (vqrdmulhq_m_n_s16): Likewise.
15590 (vqrdmulhq_m_s8): Likewise.
15591 (vqrdmulhq_m_s32): Likewise.
15592 (vqrdmulhq_m_s16): Likewise.
15593 (vqrshlq_m_s8): Likewise.
15594 (vqrshlq_m_s32): Likewise.
15595 (vqrshlq_m_s16): Likewise.
15596 (vqrshlq_m_u8): Likewise.
15597 (vqrshlq_m_u32): Likewise.
15598 (vqrshlq_m_u16): Likewise.
15599 (vqshlq_m_n_s8): Likewise.
15600 (vqshlq_m_n_s32): Likewise.
15601 (vqshlq_m_n_s16): Likewise.
15602 (vqshlq_m_n_u8): Likewise.
15603 (vqshlq_m_n_u32): Likewise.
15604 (vqshlq_m_n_u16): Likewise.
15605 (vqshlq_m_s8): Likewise.
15606 (vqshlq_m_s32): Likewise.
15607 (vqshlq_m_s16): Likewise.
15608 (vqshlq_m_u8): Likewise.
15609 (vqshlq_m_u32): Likewise.
15610 (vqshlq_m_u16): Likewise.
15611 (vqsubq_m_n_s8): Likewise.
15612 (vqsubq_m_n_s32): Likewise.
15613 (vqsubq_m_n_s16): Likewise.
15614 (vqsubq_m_n_u8): Likewise.
15615 (vqsubq_m_n_u32): Likewise.
15616 (vqsubq_m_n_u16): Likewise.
15617 (vqsubq_m_s8): Likewise.
15618 (vqsubq_m_s32): Likewise.
15619 (vqsubq_m_s16): Likewise.
15620 (vqsubq_m_u8): Likewise.
15621 (vqsubq_m_u32): Likewise.
15622 (vqsubq_m_u16): Likewise.
15623 (vrhaddq_m_s8): Likewise.
15624 (vrhaddq_m_s32): Likewise.
15625 (vrhaddq_m_s16): Likewise.
15626 (vrhaddq_m_u8): Likewise.
15627 (vrhaddq_m_u32): Likewise.
15628 (vrhaddq_m_u16): Likewise.
15629 (vrmulhq_m_s8): Likewise.
15630 (vrmulhq_m_s32): Likewise.
15631 (vrmulhq_m_s16): Likewise.
15632 (vrmulhq_m_u8): Likewise.
15633 (vrmulhq_m_u32): Likewise.
15634 (vrmulhq_m_u16): Likewise.
15635 (vrshlq_m_s8): Likewise.
15636 (vrshlq_m_s32): Likewise.
15637 (vrshlq_m_s16): Likewise.
15638 (vrshlq_m_u8): Likewise.
15639 (vrshlq_m_u32): Likewise.
15640 (vrshlq_m_u16): Likewise.
15641 (vrshrq_m_n_s8): Likewise.
15642 (vrshrq_m_n_s32): Likewise.
15643 (vrshrq_m_n_s16): Likewise.
15644 (vrshrq_m_n_u8): Likewise.
15645 (vrshrq_m_n_u32): Likewise.
15646 (vrshrq_m_n_u16): Likewise.
15647 (vshlq_m_n_s8): Likewise.
15648 (vshlq_m_n_s32): Likewise.
15649 (vshlq_m_n_s16): Likewise.
15650 (vshlq_m_n_u8): Likewise.
15651 (vshlq_m_n_u32): Likewise.
15652 (vshlq_m_n_u16): Likewise.
15653 (vshrq_m_n_s8): Likewise.
15654 (vshrq_m_n_s32): Likewise.
15655 (vshrq_m_n_s16): Likewise.
15656 (vshrq_m_n_u8): Likewise.
15657 (vshrq_m_n_u32): Likewise.
15658 (vshrq_m_n_u16): Likewise.
15659 (vsliq_m_n_s8): Likewise.
15660 (vsliq_m_n_s32): Likewise.
15661 (vsliq_m_n_s16): Likewise.
15662 (vsliq_m_n_u8): Likewise.
15663 (vsliq_m_n_u32): Likewise.
15664 (vsliq_m_n_u16): Likewise.
15665 (vsubq_m_n_s8): Likewise.
15666 (vsubq_m_n_s32): Likewise.
15667 (vsubq_m_n_s16): Likewise.
15668 (vsubq_m_n_u8): Likewise.
15669 (vsubq_m_n_u32): Likewise.
15670 (vsubq_m_n_u16): Likewise.
15671 (__arm_vabdq_m_s8): Define intrinsic.
15672 (__arm_vabdq_m_s32): Likewise.
15673 (__arm_vabdq_m_s16): Likewise.
15674 (__arm_vabdq_m_u8): Likewise.
15675 (__arm_vabdq_m_u32): Likewise.
15676 (__arm_vabdq_m_u16): Likewise.
15677 (__arm_vaddq_m_n_s8): Likewise.
15678 (__arm_vaddq_m_n_s32): Likewise.
15679 (__arm_vaddq_m_n_s16): Likewise.
15680 (__arm_vaddq_m_n_u8): Likewise.
15681 (__arm_vaddq_m_n_u32): Likewise.
15682 (__arm_vaddq_m_n_u16): Likewise.
15683 (__arm_vaddq_m_s8): Likewise.
15684 (__arm_vaddq_m_s32): Likewise.
15685 (__arm_vaddq_m_s16): Likewise.
15686 (__arm_vaddq_m_u8): Likewise.
15687 (__arm_vaddq_m_u32): Likewise.
15688 (__arm_vaddq_m_u16): Likewise.
15689 (__arm_vandq_m_s8): Likewise.
15690 (__arm_vandq_m_s32): Likewise.
15691 (__arm_vandq_m_s16): Likewise.
15692 (__arm_vandq_m_u8): Likewise.
15693 (__arm_vandq_m_u32): Likewise.
15694 (__arm_vandq_m_u16): Likewise.
15695 (__arm_vbicq_m_s8): Likewise.
15696 (__arm_vbicq_m_s32): Likewise.
15697 (__arm_vbicq_m_s16): Likewise.
15698 (__arm_vbicq_m_u8): Likewise.
15699 (__arm_vbicq_m_u32): Likewise.
15700 (__arm_vbicq_m_u16): Likewise.
15701 (__arm_vbrsrq_m_n_s8): Likewise.
15702 (__arm_vbrsrq_m_n_s32): Likewise.
15703 (__arm_vbrsrq_m_n_s16): Likewise.
15704 (__arm_vbrsrq_m_n_u8): Likewise.
15705 (__arm_vbrsrq_m_n_u32): Likewise.
15706 (__arm_vbrsrq_m_n_u16): Likewise.
15707 (__arm_vcaddq_rot270_m_s8): Likewise.
15708 (__arm_vcaddq_rot270_m_s32): Likewise.
15709 (__arm_vcaddq_rot270_m_s16): Likewise.
15710 (__arm_vcaddq_rot270_m_u8): Likewise.
15711 (__arm_vcaddq_rot270_m_u32): Likewise.
15712 (__arm_vcaddq_rot270_m_u16): Likewise.
15713 (__arm_vcaddq_rot90_m_s8): Likewise.
15714 (__arm_vcaddq_rot90_m_s32): Likewise.
15715 (__arm_vcaddq_rot90_m_s16): Likewise.
15716 (__arm_vcaddq_rot90_m_u8): Likewise.
15717 (__arm_vcaddq_rot90_m_u32): Likewise.
15718 (__arm_vcaddq_rot90_m_u16): Likewise.
15719 (__arm_veorq_m_s8): Likewise.
15720 (__arm_veorq_m_s32): Likewise.
15721 (__arm_veorq_m_s16): Likewise.
15722 (__arm_veorq_m_u8): Likewise.
15723 (__arm_veorq_m_u32): Likewise.
15724 (__arm_veorq_m_u16): Likewise.
15725 (__arm_vhaddq_m_n_s8): Likewise.
15726 (__arm_vhaddq_m_n_s32): Likewise.
15727 (__arm_vhaddq_m_n_s16): Likewise.
15728 (__arm_vhaddq_m_n_u8): Likewise.
15729 (__arm_vhaddq_m_n_u32): Likewise.
15730 (__arm_vhaddq_m_n_u16): Likewise.
15731 (__arm_vhaddq_m_s8): Likewise.
15732 (__arm_vhaddq_m_s32): Likewise.
15733 (__arm_vhaddq_m_s16): Likewise.
15734 (__arm_vhaddq_m_u8): Likewise.
15735 (__arm_vhaddq_m_u32): Likewise.
15736 (__arm_vhaddq_m_u16): Likewise.
15737 (__arm_vhcaddq_rot270_m_s8): Likewise.
15738 (__arm_vhcaddq_rot270_m_s32): Likewise.
15739 (__arm_vhcaddq_rot270_m_s16): Likewise.
15740 (__arm_vhcaddq_rot90_m_s8): Likewise.
15741 (__arm_vhcaddq_rot90_m_s32): Likewise.
15742 (__arm_vhcaddq_rot90_m_s16): Likewise.
15743 (__arm_vhsubq_m_n_s8): Likewise.
15744 (__arm_vhsubq_m_n_s32): Likewise.
15745 (__arm_vhsubq_m_n_s16): Likewise.
15746 (__arm_vhsubq_m_n_u8): Likewise.
15747 (__arm_vhsubq_m_n_u32): Likewise.
15748 (__arm_vhsubq_m_n_u16): Likewise.
15749 (__arm_vhsubq_m_s8): Likewise.
15750 (__arm_vhsubq_m_s32): Likewise.
15751 (__arm_vhsubq_m_s16): Likewise.
15752 (__arm_vhsubq_m_u8): Likewise.
15753 (__arm_vhsubq_m_u32): Likewise.
15754 (__arm_vhsubq_m_u16): Likewise.
15755 (__arm_vmaxq_m_s8): Likewise.
15756 (__arm_vmaxq_m_s32): Likewise.
15757 (__arm_vmaxq_m_s16): Likewise.
15758 (__arm_vmaxq_m_u8): Likewise.
15759 (__arm_vmaxq_m_u32): Likewise.
15760 (__arm_vmaxq_m_u16): Likewise.
15761 (__arm_vminq_m_s8): Likewise.
15762 (__arm_vminq_m_s32): Likewise.
15763 (__arm_vminq_m_s16): Likewise.
15764 (__arm_vminq_m_u8): Likewise.
15765 (__arm_vminq_m_u32): Likewise.
15766 (__arm_vminq_m_u16): Likewise.
15767 (__arm_vmladavaq_p_s8): Likewise.
15768 (__arm_vmladavaq_p_s32): Likewise.
15769 (__arm_vmladavaq_p_s16): Likewise.
15770 (__arm_vmladavaq_p_u8): Likewise.
15771 (__arm_vmladavaq_p_u32): Likewise.
15772 (__arm_vmladavaq_p_u16): Likewise.
15773 (__arm_vmladavaxq_p_s8): Likewise.
15774 (__arm_vmladavaxq_p_s32): Likewise.
15775 (__arm_vmladavaxq_p_s16): Likewise.
15776 (__arm_vmlaq_m_n_s8): Likewise.
15777 (__arm_vmlaq_m_n_s32): Likewise.
15778 (__arm_vmlaq_m_n_s16): Likewise.
15779 (__arm_vmlaq_m_n_u8): Likewise.
15780 (__arm_vmlaq_m_n_u32): Likewise.
15781 (__arm_vmlaq_m_n_u16): Likewise.
15782 (__arm_vmlasq_m_n_s8): Likewise.
15783 (__arm_vmlasq_m_n_s32): Likewise.
15784 (__arm_vmlasq_m_n_s16): Likewise.
15785 (__arm_vmlasq_m_n_u8): Likewise.
15786 (__arm_vmlasq_m_n_u32): Likewise.
15787 (__arm_vmlasq_m_n_u16): Likewise.
15788 (__arm_vmlsdavaq_p_s8): Likewise.
15789 (__arm_vmlsdavaq_p_s32): Likewise.
15790 (__arm_vmlsdavaq_p_s16): Likewise.
15791 (__arm_vmlsdavaxq_p_s8): Likewise.
15792 (__arm_vmlsdavaxq_p_s32): Likewise.
15793 (__arm_vmlsdavaxq_p_s16): Likewise.
15794 (__arm_vmulhq_m_s8): Likewise.
15795 (__arm_vmulhq_m_s32): Likewise.
15796 (__arm_vmulhq_m_s16): Likewise.
15797 (__arm_vmulhq_m_u8): Likewise.
15798 (__arm_vmulhq_m_u32): Likewise.
15799 (__arm_vmulhq_m_u16): Likewise.
15800 (__arm_vmullbq_int_m_s8): Likewise.
15801 (__arm_vmullbq_int_m_s32): Likewise.
15802 (__arm_vmullbq_int_m_s16): Likewise.
15803 (__arm_vmullbq_int_m_u8): Likewise.
15804 (__arm_vmullbq_int_m_u32): Likewise.
15805 (__arm_vmullbq_int_m_u16): Likewise.
15806 (__arm_vmulltq_int_m_s8): Likewise.
15807 (__arm_vmulltq_int_m_s32): Likewise.
15808 (__arm_vmulltq_int_m_s16): Likewise.
15809 (__arm_vmulltq_int_m_u8): Likewise.
15810 (__arm_vmulltq_int_m_u32): Likewise.
15811 (__arm_vmulltq_int_m_u16): Likewise.
15812 (__arm_vmulq_m_n_s8): Likewise.
15813 (__arm_vmulq_m_n_s32): Likewise.
15814 (__arm_vmulq_m_n_s16): Likewise.
15815 (__arm_vmulq_m_n_u8): Likewise.
15816 (__arm_vmulq_m_n_u32): Likewise.
15817 (__arm_vmulq_m_n_u16): Likewise.
15818 (__arm_vmulq_m_s8): Likewise.
15819 (__arm_vmulq_m_s32): Likewise.
15820 (__arm_vmulq_m_s16): Likewise.
15821 (__arm_vmulq_m_u8): Likewise.
15822 (__arm_vmulq_m_u32): Likewise.
15823 (__arm_vmulq_m_u16): Likewise.
15824 (__arm_vornq_m_s8): Likewise.
15825 (__arm_vornq_m_s32): Likewise.
15826 (__arm_vornq_m_s16): Likewise.
15827 (__arm_vornq_m_u8): Likewise.
15828 (__arm_vornq_m_u32): Likewise.
15829 (__arm_vornq_m_u16): Likewise.
15830 (__arm_vorrq_m_s8): Likewise.
15831 (__arm_vorrq_m_s32): Likewise.
15832 (__arm_vorrq_m_s16): Likewise.
15833 (__arm_vorrq_m_u8): Likewise.
15834 (__arm_vorrq_m_u32): Likewise.
15835 (__arm_vorrq_m_u16): Likewise.
15836 (__arm_vqaddq_m_n_s8): Likewise.
15837 (__arm_vqaddq_m_n_s32): Likewise.
15838 (__arm_vqaddq_m_n_s16): Likewise.
15839 (__arm_vqaddq_m_n_u8): Likewise.
15840 (__arm_vqaddq_m_n_u32): Likewise.
15841 (__arm_vqaddq_m_n_u16): Likewise.
15842 (__arm_vqaddq_m_s8): Likewise.
15843 (__arm_vqaddq_m_s32): Likewise.
15844 (__arm_vqaddq_m_s16): Likewise.
15845 (__arm_vqaddq_m_u8): Likewise.
15846 (__arm_vqaddq_m_u32): Likewise.
15847 (__arm_vqaddq_m_u16): Likewise.
15848 (__arm_vqdmladhq_m_s8): Likewise.
15849 (__arm_vqdmladhq_m_s32): Likewise.
15850 (__arm_vqdmladhq_m_s16): Likewise.
15851 (__arm_vqdmladhxq_m_s8): Likewise.
15852 (__arm_vqdmladhxq_m_s32): Likewise.
15853 (__arm_vqdmladhxq_m_s16): Likewise.
15854 (__arm_vqdmlahq_m_n_s8): Likewise.
15855 (__arm_vqdmlahq_m_n_s32): Likewise.
15856 (__arm_vqdmlahq_m_n_s16): Likewise.
15857 (__arm_vqdmlahq_m_n_u8): Likewise.
15858 (__arm_vqdmlahq_m_n_u32): Likewise.
15859 (__arm_vqdmlahq_m_n_u16): Likewise.
15860 (__arm_vqdmlsdhq_m_s8): Likewise.
15861 (__arm_vqdmlsdhq_m_s32): Likewise.
15862 (__arm_vqdmlsdhq_m_s16): Likewise.
15863 (__arm_vqdmlsdhxq_m_s8): Likewise.
15864 (__arm_vqdmlsdhxq_m_s32): Likewise.
15865 (__arm_vqdmlsdhxq_m_s16): Likewise.
15866 (__arm_vqdmulhq_m_n_s8): Likewise.
15867 (__arm_vqdmulhq_m_n_s32): Likewise.
15868 (__arm_vqdmulhq_m_n_s16): Likewise.
15869 (__arm_vqdmulhq_m_s8): Likewise.
15870 (__arm_vqdmulhq_m_s32): Likewise.
15871 (__arm_vqdmulhq_m_s16): Likewise.
15872 (__arm_vqrdmladhq_m_s8): Likewise.
15873 (__arm_vqrdmladhq_m_s32): Likewise.
15874 (__arm_vqrdmladhq_m_s16): Likewise.
15875 (__arm_vqrdmladhxq_m_s8): Likewise.
15876 (__arm_vqrdmladhxq_m_s32): Likewise.
15877 (__arm_vqrdmladhxq_m_s16): Likewise.
15878 (__arm_vqrdmlahq_m_n_s8): Likewise.
15879 (__arm_vqrdmlahq_m_n_s32): Likewise.
15880 (__arm_vqrdmlahq_m_n_s16): Likewise.
15881 (__arm_vqrdmlahq_m_n_u8): Likewise.
15882 (__arm_vqrdmlahq_m_n_u32): Likewise.
15883 (__arm_vqrdmlahq_m_n_u16): Likewise.
15884 (__arm_vqrdmlashq_m_n_s8): Likewise.
15885 (__arm_vqrdmlashq_m_n_s32): Likewise.
15886 (__arm_vqrdmlashq_m_n_s16): Likewise.
15887 (__arm_vqrdmlashq_m_n_u8): Likewise.
15888 (__arm_vqrdmlashq_m_n_u32): Likewise.
15889 (__arm_vqrdmlashq_m_n_u16): Likewise.
15890 (__arm_vqrdmlsdhq_m_s8): Likewise.
15891 (__arm_vqrdmlsdhq_m_s32): Likewise.
15892 (__arm_vqrdmlsdhq_m_s16): Likewise.
15893 (__arm_vqrdmlsdhxq_m_s8): Likewise.
15894 (__arm_vqrdmlsdhxq_m_s32): Likewise.
15895 (__arm_vqrdmlsdhxq_m_s16): Likewise.
15896 (__arm_vqrdmulhq_m_n_s8): Likewise.
15897 (__arm_vqrdmulhq_m_n_s32): Likewise.
15898 (__arm_vqrdmulhq_m_n_s16): Likewise.
15899 (__arm_vqrdmulhq_m_s8): Likewise.
15900 (__arm_vqrdmulhq_m_s32): Likewise.
15901 (__arm_vqrdmulhq_m_s16): Likewise.
15902 (__arm_vqrshlq_m_s8): Likewise.
15903 (__arm_vqrshlq_m_s32): Likewise.
15904 (__arm_vqrshlq_m_s16): Likewise.
15905 (__arm_vqrshlq_m_u8): Likewise.
15906 (__arm_vqrshlq_m_u32): Likewise.
15907 (__arm_vqrshlq_m_u16): Likewise.
15908 (__arm_vqshlq_m_n_s8): Likewise.
15909 (__arm_vqshlq_m_n_s32): Likewise.
15910 (__arm_vqshlq_m_n_s16): Likewise.
15911 (__arm_vqshlq_m_n_u8): Likewise.
15912 (__arm_vqshlq_m_n_u32): Likewise.
15913 (__arm_vqshlq_m_n_u16): Likewise.
15914 (__arm_vqshlq_m_s8): Likewise.
15915 (__arm_vqshlq_m_s32): Likewise.
15916 (__arm_vqshlq_m_s16): Likewise.
15917 (__arm_vqshlq_m_u8): Likewise.
15918 (__arm_vqshlq_m_u32): Likewise.
15919 (__arm_vqshlq_m_u16): Likewise.
15920 (__arm_vqsubq_m_n_s8): Likewise.
15921 (__arm_vqsubq_m_n_s32): Likewise.
15922 (__arm_vqsubq_m_n_s16): Likewise.
15923 (__arm_vqsubq_m_n_u8): Likewise.
15924 (__arm_vqsubq_m_n_u32): Likewise.
15925 (__arm_vqsubq_m_n_u16): Likewise.
15926 (__arm_vqsubq_m_s8): Likewise.
15927 (__arm_vqsubq_m_s32): Likewise.
15928 (__arm_vqsubq_m_s16): Likewise.
15929 (__arm_vqsubq_m_u8): Likewise.
15930 (__arm_vqsubq_m_u32): Likewise.
15931 (__arm_vqsubq_m_u16): Likewise.
15932 (__arm_vrhaddq_m_s8): Likewise.
15933 (__arm_vrhaddq_m_s32): Likewise.
15934 (__arm_vrhaddq_m_s16): Likewise.
15935 (__arm_vrhaddq_m_u8): Likewise.
15936 (__arm_vrhaddq_m_u32): Likewise.
15937 (__arm_vrhaddq_m_u16): Likewise.
15938 (__arm_vrmulhq_m_s8): Likewise.
15939 (__arm_vrmulhq_m_s32): Likewise.
15940 (__arm_vrmulhq_m_s16): Likewise.
15941 (__arm_vrmulhq_m_u8): Likewise.
15942 (__arm_vrmulhq_m_u32): Likewise.
15943 (__arm_vrmulhq_m_u16): Likewise.
15944 (__arm_vrshlq_m_s8): Likewise.
15945 (__arm_vrshlq_m_s32): Likewise.
15946 (__arm_vrshlq_m_s16): Likewise.
15947 (__arm_vrshlq_m_u8): Likewise.
15948 (__arm_vrshlq_m_u32): Likewise.
15949 (__arm_vrshlq_m_u16): Likewise.
15950 (__arm_vrshrq_m_n_s8): Likewise.
15951 (__arm_vrshrq_m_n_s32): Likewise.
15952 (__arm_vrshrq_m_n_s16): Likewise.
15953 (__arm_vrshrq_m_n_u8): Likewise.
15954 (__arm_vrshrq_m_n_u32): Likewise.
15955 (__arm_vrshrq_m_n_u16): Likewise.
15956 (__arm_vshlq_m_n_s8): Likewise.
15957 (__arm_vshlq_m_n_s32): Likewise.
15958 (__arm_vshlq_m_n_s16): Likewise.
15959 (__arm_vshlq_m_n_u8): Likewise.
15960 (__arm_vshlq_m_n_u32): Likewise.
15961 (__arm_vshlq_m_n_u16): Likewise.
15962 (__arm_vshrq_m_n_s8): Likewise.
15963 (__arm_vshrq_m_n_s32): Likewise.
15964 (__arm_vshrq_m_n_s16): Likewise.
15965 (__arm_vshrq_m_n_u8): Likewise.
15966 (__arm_vshrq_m_n_u32): Likewise.
15967 (__arm_vshrq_m_n_u16): Likewise.
15968 (__arm_vsliq_m_n_s8): Likewise.
15969 (__arm_vsliq_m_n_s32): Likewise.
15970 (__arm_vsliq_m_n_s16): Likewise.
15971 (__arm_vsliq_m_n_u8): Likewise.
15972 (__arm_vsliq_m_n_u32): Likewise.
15973 (__arm_vsliq_m_n_u16): Likewise.
15974 (__arm_vsubq_m_n_s8): Likewise.
15975 (__arm_vsubq_m_n_s32): Likewise.
15976 (__arm_vsubq_m_n_s16): Likewise.
15977 (__arm_vsubq_m_n_u8): Likewise.
15978 (__arm_vsubq_m_n_u32): Likewise.
15979 (__arm_vsubq_m_n_u16): Likewise.
15980 (vqdmladhq_m): Define polymorphic variant.
15981 (vqdmladhxq_m): Likewise.
15982 (vqdmlsdhq_m): Likewise.
15983 (vqdmlsdhxq_m): Likewise.
15984 (vabdq_m): Likewise.
15985 (vandq_m): Likewise.
15986 (vbicq_m): Likewise.
15987 (vbrsrq_m_n): Likewise.
15988 (vcaddq_rot270_m): Likewise.
15989 (vcaddq_rot90_m): Likewise.
15990 (veorq_m): Likewise.
15991 (vmaxq_m): Likewise.
15992 (vminq_m): Likewise.
15993 (vmladavaq_p): Likewise.
15994 (vmlaq_m_n): Likewise.
15995 (vmlasq_m_n): Likewise.
15996 (vmulhq_m): Likewise.
15997 (vmullbq_int_m): Likewise.
15998 (vmulltq_int_m): Likewise.
15999 (vornq_m): Likewise.
16000 (vorrq_m): Likewise.
16001 (vqdmlahq_m_n): Likewise.
16002 (vqrdmlahq_m_n): Likewise.
16003 (vqrdmlashq_m_n): Likewise.
16004 (vqrshlq_m): Likewise.
16005 (vqshlq_m_n): Likewise.
16006 (vqshlq_m): Likewise.
16007 (vrhaddq_m): Likewise.
16008 (vrmulhq_m): Likewise.
16009 (vrshlq_m): Likewise.
16010 (vrshrq_m_n): Likewise.
16011 (vshlq_m_n): Likewise.
16012 (vshrq_m_n): Likewise.
16013 (vsliq_m): Likewise.
16014 (vaddq_m_n): Likewise.
16015 (vaddq_m): Likewise.
16016 (vhaddq_m_n): Likewise.
16017 (vhaddq_m): Likewise.
16018 (vhcaddq_rot270_m): Likewise.
16019 (vhcaddq_rot90_m): Likewise.
16020 (vhsubq_m): Likewise.
16021 (vhsubq_m_n): Likewise.
16022 (vmulq_m_n): Likewise.
16023 (vmulq_m): Likewise.
16024 (vqaddq_m_n): Likewise.
16025 (vqaddq_m): Likewise.
16026 (vqdmulhq_m_n): Likewise.
16027 (vqdmulhq_m): Likewise.
16028 (vsubq_m_n): Likewise.
16029 (vsliq_m_n): Likewise.
16030 (vqsubq_m_n): Likewise.
16031 (vqsubq_m): Likewise.
16032 (vqrdmulhq_m): Likewise.
16033 (vqrdmulhq_m_n): Likewise.
16034 (vqrdmlsdhxq_m): Likewise.
16035 (vqrdmlsdhq_m): Likewise.
16036 (vqrdmladhq_m): Likewise.
16037 (vqrdmladhxq_m): Likewise.
16038 (vmlsdavaxq_p): Likewise.
16039 (vmlsdavaq_p): Likewise.
16040 (vmladavaxq_p): Likewise.
16041 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
16043 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
16044 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
16045 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
16046 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
16047 * config/arm/mve.md (VHSUBQ_M): Define iterators.
16048 (VSLIQ_M_N): Likewise.
16049 (VQRDMLAHQ_M_N): Likewise.
16050 (VRSHLQ_M): Likewise.
16051 (VMINQ_M): Likewise.
16052 (VMULLBQ_INT_M): Likewise.
16053 (VMULHQ_M): Likewise.
16054 (VMULQ_M): Likewise.
16055 (VHSUBQ_M_N): Likewise.
16056 (VHADDQ_M_N): Likewise.
16057 (VORRQ_M): Likewise.
16058 (VRMULHQ_M): Likewise.
16059 (VQADDQ_M): Likewise.
16060 (VRSHRQ_M_N): Likewise.
16061 (VQSUBQ_M_N): Likewise.
16062 (VADDQ_M): Likewise.
16063 (VORNQ_M): Likewise.
16064 (VQDMLAHQ_M_N): Likewise.
16065 (VRHADDQ_M): Likewise.
16066 (VQSHLQ_M): Likewise.
16067 (VANDQ_M): Likewise.
16068 (VBICQ_M): Likewise.
16069 (VSHLQ_M_N): Likewise.
16070 (VCADDQ_ROT270_M): Likewise.
16071 (VQRSHLQ_M): Likewise.
16072 (VQADDQ_M_N): Likewise.
16073 (VADDQ_M_N): Likewise.
16074 (VMAXQ_M): Likewise.
16075 (VQSUBQ_M): Likewise.
16076 (VMLASQ_M_N): Likewise.
16077 (VMLADAVAQ_P): Likewise.
16078 (VBRSRQ_M_N): Likewise.
16079 (VMULQ_M_N): Likewise.
16080 (VCADDQ_ROT90_M): Likewise.
16081 (VMULLTQ_INT_M): Likewise.
16082 (VEORQ_M): Likewise.
16083 (VSHRQ_M_N): Likewise.
16084 (VSUBQ_M_N): Likewise.
16085 (VHADDQ_M): Likewise.
16086 (VABDQ_M): Likewise.
16087 (VQRDMLASHQ_M_N): Likewise.
16088 (VMLAQ_M_N): Likewise.
16089 (VQSHLQ_M_N): Likewise.
16090 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
16091 (mve_vaddq_m_n_<supf><mode>): Likewise.
16092 (mve_vaddq_m_<supf><mode>): Likewise.
16093 (mve_vandq_m_<supf><mode>): Likewise.
16094 (mve_vbicq_m_<supf><mode>): Likewise.
16095 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
16096 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
16097 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
16098 (mve_veorq_m_<supf><mode>): Likewise.
16099 (mve_vhaddq_m_n_<supf><mode>): Likewise.
16100 (mve_vhaddq_m_<supf><mode>): Likewise.
16101 (mve_vhsubq_m_n_<supf><mode>): Likewise.
16102 (mve_vhsubq_m_<supf><mode>): Likewise.
16103 (mve_vmaxq_m_<supf><mode>): Likewise.
16104 (mve_vminq_m_<supf><mode>): Likewise.
16105 (mve_vmladavaq_p_<supf><mode>): Likewise.
16106 (mve_vmlaq_m_n_<supf><mode>): Likewise.
16107 (mve_vmlasq_m_n_<supf><mode>): Likewise.
16108 (mve_vmulhq_m_<supf><mode>): Likewise.
16109 (mve_vmullbq_int_m_<supf><mode>): Likewise.
16110 (mve_vmulltq_int_m_<supf><mode>): Likewise.
16111 (mve_vmulq_m_n_<supf><mode>): Likewise.
16112 (mve_vmulq_m_<supf><mode>): Likewise.
16113 (mve_vornq_m_<supf><mode>): Likewise.
16114 (mve_vorrq_m_<supf><mode>): Likewise.
16115 (mve_vqaddq_m_n_<supf><mode>): Likewise.
16116 (mve_vqaddq_m_<supf><mode>): Likewise.
16117 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
16118 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
16119 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
16120 (mve_vqrshlq_m_<supf><mode>): Likewise.
16121 (mve_vqshlq_m_n_<supf><mode>): Likewise.
16122 (mve_vqshlq_m_<supf><mode>): Likewise.
16123 (mve_vqsubq_m_n_<supf><mode>): Likewise.
16124 (mve_vqsubq_m_<supf><mode>): Likewise.
16125 (mve_vrhaddq_m_<supf><mode>): Likewise.
16126 (mve_vrmulhq_m_<supf><mode>): Likewise.
16127 (mve_vrshlq_m_<supf><mode>): Likewise.
16128 (mve_vrshrq_m_n_<supf><mode>): Likewise.
16129 (mve_vshlq_m_n_<supf><mode>): Likewise.
16130 (mve_vshrq_m_n_<supf><mode>): Likewise.
16131 (mve_vsliq_m_n_<supf><mode>): Likewise.
16132 (mve_vsubq_m_n_<supf><mode>): Likewise.
16133 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
16134 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
16135 (mve_vmladavaxq_p_s<mode>): Likewise.
16136 (mve_vmlsdavaq_p_s<mode>): Likewise.
16137 (mve_vmlsdavaxq_p_s<mode>): Likewise.
16138 (mve_vqdmladhq_m_s<mode>): Likewise.
16139 (mve_vqdmladhxq_m_s<mode>): Likewise.
16140 (mve_vqdmlsdhq_m_s<mode>): Likewise.
16141 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
16142 (mve_vqdmulhq_m_n_s<mode>): Likewise.
16143 (mve_vqdmulhq_m_s<mode>): Likewise.
16144 (mve_vqrdmladhq_m_s<mode>): Likewise.
16145 (mve_vqrdmladhxq_m_s<mode>): Likewise.
16146 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
16147 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
16148 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
16149 (mve_vqrdmulhq_m_s<mode>): Likewise.
16151 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16152 Mihail Ionescu <mihail.ionescu@arm.com>
16153 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16155 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
16156 Define builtin qualifier.
16157 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16158 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16159 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16160 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16161 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16162 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16163 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16164 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
16165 (vsubq_m_s8): Likewise.
16166 (vcvtq_m_n_f16_u16): Likewise.
16167 (vqshluq_m_n_s8): Likewise.
16168 (vabavq_p_s8): Likewise.
16169 (vsriq_m_n_u8): Likewise.
16170 (vshlq_m_u8): Likewise.
16171 (vsubq_m_u8): Likewise.
16172 (vabavq_p_u8): Likewise.
16173 (vshlq_m_s8): Likewise.
16174 (vcvtq_m_n_f16_s16): Likewise.
16175 (vsriq_m_n_s16): Likewise.
16176 (vsubq_m_s16): Likewise.
16177 (vcvtq_m_n_f32_u32): Likewise.
16178 (vqshluq_m_n_s16): Likewise.
16179 (vabavq_p_s16): Likewise.
16180 (vsriq_m_n_u16): Likewise.
16181 (vshlq_m_u16): Likewise.
16182 (vsubq_m_u16): Likewise.
16183 (vabavq_p_u16): Likewise.
16184 (vshlq_m_s16): Likewise.
16185 (vcvtq_m_n_f32_s32): Likewise.
16186 (vsriq_m_n_s32): Likewise.
16187 (vsubq_m_s32): Likewise.
16188 (vqshluq_m_n_s32): Likewise.
16189 (vabavq_p_s32): Likewise.
16190 (vsriq_m_n_u32): Likewise.
16191 (vshlq_m_u32): Likewise.
16192 (vsubq_m_u32): Likewise.
16193 (vabavq_p_u32): Likewise.
16194 (vshlq_m_s32): Likewise.
16195 (__arm_vsriq_m_n_s8): Define intrinsic.
16196 (__arm_vsubq_m_s8): Likewise.
16197 (__arm_vqshluq_m_n_s8): Likewise.
16198 (__arm_vabavq_p_s8): Likewise.
16199 (__arm_vsriq_m_n_u8): Likewise.
16200 (__arm_vshlq_m_u8): Likewise.
16201 (__arm_vsubq_m_u8): Likewise.
16202 (__arm_vabavq_p_u8): Likewise.
16203 (__arm_vshlq_m_s8): Likewise.
16204 (__arm_vsriq_m_n_s16): Likewise.
16205 (__arm_vsubq_m_s16): Likewise.
16206 (__arm_vqshluq_m_n_s16): Likewise.
16207 (__arm_vabavq_p_s16): Likewise.
16208 (__arm_vsriq_m_n_u16): Likewise.
16209 (__arm_vshlq_m_u16): Likewise.
16210 (__arm_vsubq_m_u16): Likewise.
16211 (__arm_vabavq_p_u16): Likewise.
16212 (__arm_vshlq_m_s16): Likewise.
16213 (__arm_vsriq_m_n_s32): Likewise.
16214 (__arm_vsubq_m_s32): Likewise.
16215 (__arm_vqshluq_m_n_s32): Likewise.
16216 (__arm_vabavq_p_s32): Likewise.
16217 (__arm_vsriq_m_n_u32): Likewise.
16218 (__arm_vshlq_m_u32): Likewise.
16219 (__arm_vsubq_m_u32): Likewise.
16220 (__arm_vabavq_p_u32): Likewise.
16221 (__arm_vshlq_m_s32): Likewise.
16222 (__arm_vcvtq_m_n_f16_u16): Likewise.
16223 (__arm_vcvtq_m_n_f16_s16): Likewise.
16224 (__arm_vcvtq_m_n_f32_u32): Likewise.
16225 (__arm_vcvtq_m_n_f32_s32): Likewise.
16226 (vcvtq_m_n): Define polymorphic variant.
16227 (vqshluq_m_n): Likewise.
16228 (vshlq_m): Likewise.
16229 (vsriq_m_n): Likewise.
16230 (vsubq_m): Likewise.
16231 (vabavq_p): Likewise.
16232 * config/arm/arm_mve_builtins.def
16233 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
16234 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16235 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16236 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16237 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16238 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16239 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16240 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16241 * config/arm/mve.md (VABAVQ_P): Define iterator.
16242 (VSHLQ_M): Likewise.
16243 (VSRIQ_M_N): Likewise.
16244 (VSUBQ_M): Likewise.
16245 (VCVTQ_M_N_TO_F): Likewise.
16246 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
16247 (mve_vqshluq_m_n_s<mode>): Likewise.
16248 (mve_vshlq_m_<supf><mode>): Likewise.
16249 (mve_vsriq_m_n_<supf><mode>): Likewise.
16250 (mve_vsubq_m_<supf><mode>): Likewise.
16251 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
16253 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16254 Mihail Ionescu <mihail.ionescu@arm.com>
16255 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16257 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
16258 (vrmlsldavhaq_s32): Likewise.
16259 (vrmlsldavhaxq_s32): Likewise.
16260 (vaddlvaq_p_s32): Likewise.
16261 (vcvtbq_m_f16_f32): Likewise.
16262 (vcvtbq_m_f32_f16): Likewise.
16263 (vcvttq_m_f16_f32): Likewise.
16264 (vcvttq_m_f32_f16): Likewise.
16265 (vrev16q_m_s8): Likewise.
16266 (vrev32q_m_f16): Likewise.
16267 (vrmlaldavhq_p_s32): Likewise.
16268 (vrmlaldavhxq_p_s32): Likewise.
16269 (vrmlsldavhq_p_s32): Likewise.
16270 (vrmlsldavhxq_p_s32): Likewise.
16271 (vaddlvaq_p_u32): Likewise.
16272 (vrev16q_m_u8): Likewise.
16273 (vrmlaldavhq_p_u32): Likewise.
16274 (vmvnq_m_n_s16): Likewise.
16275 (vorrq_m_n_s16): Likewise.
16276 (vqrshrntq_n_s16): Likewise.
16277 (vqshrnbq_n_s16): Likewise.
16278 (vqshrntq_n_s16): Likewise.
16279 (vrshrnbq_n_s16): Likewise.
16280 (vrshrntq_n_s16): Likewise.
16281 (vshrnbq_n_s16): Likewise.
16282 (vshrntq_n_s16): Likewise.
16283 (vcmlaq_f16): Likewise.
16284 (vcmlaq_rot180_f16): Likewise.
16285 (vcmlaq_rot270_f16): Likewise.
16286 (vcmlaq_rot90_f16): Likewise.
16287 (vfmaq_f16): Likewise.
16288 (vfmaq_n_f16): Likewise.
16289 (vfmasq_n_f16): Likewise.
16290 (vfmsq_f16): Likewise.
16291 (vmlaldavaq_s16): Likewise.
16292 (vmlaldavaxq_s16): Likewise.
16293 (vmlsldavaq_s16): Likewise.
16294 (vmlsldavaxq_s16): Likewise.
16295 (vabsq_m_f16): Likewise.
16296 (vcvtmq_m_s16_f16): Likewise.
16297 (vcvtnq_m_s16_f16): Likewise.
16298 (vcvtpq_m_s16_f16): Likewise.
16299 (vcvtq_m_s16_f16): Likewise.
16300 (vdupq_m_n_f16): Likewise.
16301 (vmaxnmaq_m_f16): Likewise.
16302 (vmaxnmavq_p_f16): Likewise.
16303 (vmaxnmvq_p_f16): Likewise.
16304 (vminnmaq_m_f16): Likewise.
16305 (vminnmavq_p_f16): Likewise.
16306 (vminnmvq_p_f16): Likewise.
16307 (vmlaldavq_p_s16): Likewise.
16308 (vmlaldavxq_p_s16): Likewise.
16309 (vmlsldavq_p_s16): Likewise.
16310 (vmlsldavxq_p_s16): Likewise.
16311 (vmovlbq_m_s8): Likewise.
16312 (vmovltq_m_s8): Likewise.
16313 (vmovnbq_m_s16): Likewise.
16314 (vmovntq_m_s16): Likewise.
16315 (vnegq_m_f16): Likewise.
16316 (vpselq_f16): Likewise.
16317 (vqmovnbq_m_s16): Likewise.
16318 (vqmovntq_m_s16): Likewise.
16319 (vrev32q_m_s8): Likewise.
16320 (vrev64q_m_f16): Likewise.
16321 (vrndaq_m_f16): Likewise.
16322 (vrndmq_m_f16): Likewise.
16323 (vrndnq_m_f16): Likewise.
16324 (vrndpq_m_f16): Likewise.
16325 (vrndq_m_f16): Likewise.
16326 (vrndxq_m_f16): Likewise.
16327 (vcmpeqq_m_n_f16): Likewise.
16328 (vcmpgeq_m_f16): Likewise.
16329 (vcmpgeq_m_n_f16): Likewise.
16330 (vcmpgtq_m_f16): Likewise.
16331 (vcmpgtq_m_n_f16): Likewise.
16332 (vcmpleq_m_f16): Likewise.
16333 (vcmpleq_m_n_f16): Likewise.
16334 (vcmpltq_m_f16): Likewise.
16335 (vcmpltq_m_n_f16): Likewise.
16336 (vcmpneq_m_f16): Likewise.
16337 (vcmpneq_m_n_f16): Likewise.
16338 (vmvnq_m_n_u16): Likewise.
16339 (vorrq_m_n_u16): Likewise.
16340 (vqrshruntq_n_s16): Likewise.
16341 (vqshrunbq_n_s16): Likewise.
16342 (vqshruntq_n_s16): Likewise.
16343 (vcvtmq_m_u16_f16): Likewise.
16344 (vcvtnq_m_u16_f16): Likewise.
16345 (vcvtpq_m_u16_f16): Likewise.
16346 (vcvtq_m_u16_f16): Likewise.
16347 (vqmovunbq_m_s16): Likewise.
16348 (vqmovuntq_m_s16): Likewise.
16349 (vqrshrntq_n_u16): Likewise.
16350 (vqshrnbq_n_u16): Likewise.
16351 (vqshrntq_n_u16): Likewise.
16352 (vrshrnbq_n_u16): Likewise.
16353 (vrshrntq_n_u16): Likewise.
16354 (vshrnbq_n_u16): Likewise.
16355 (vshrntq_n_u16): Likewise.
16356 (vmlaldavaq_u16): Likewise.
16357 (vmlaldavaxq_u16): Likewise.
16358 (vmlaldavq_p_u16): Likewise.
16359 (vmlaldavxq_p_u16): Likewise.
16360 (vmovlbq_m_u8): Likewise.
16361 (vmovltq_m_u8): Likewise.
16362 (vmovnbq_m_u16): Likewise.
16363 (vmovntq_m_u16): Likewise.
16364 (vqmovnbq_m_u16): Likewise.
16365 (vqmovntq_m_u16): Likewise.
16366 (vrev32q_m_u8): Likewise.
16367 (vmvnq_m_n_s32): Likewise.
16368 (vorrq_m_n_s32): Likewise.
16369 (vqrshrntq_n_s32): Likewise.
16370 (vqshrnbq_n_s32): Likewise.
16371 (vqshrntq_n_s32): Likewise.
16372 (vrshrnbq_n_s32): Likewise.
16373 (vrshrntq_n_s32): Likewise.
16374 (vshrnbq_n_s32): Likewise.
16375 (vshrntq_n_s32): Likewise.
16376 (vcmlaq_f32): Likewise.
16377 (vcmlaq_rot180_f32): Likewise.
16378 (vcmlaq_rot270_f32): Likewise.
16379 (vcmlaq_rot90_f32): Likewise.
16380 (vfmaq_f32): Likewise.
16381 (vfmaq_n_f32): Likewise.
16382 (vfmasq_n_f32): Likewise.
16383 (vfmsq_f32): Likewise.
16384 (vmlaldavaq_s32): Likewise.
16385 (vmlaldavaxq_s32): Likewise.
16386 (vmlsldavaq_s32): Likewise.
16387 (vmlsldavaxq_s32): Likewise.
16388 (vabsq_m_f32): Likewise.
16389 (vcvtmq_m_s32_f32): Likewise.
16390 (vcvtnq_m_s32_f32): Likewise.
16391 (vcvtpq_m_s32_f32): Likewise.
16392 (vcvtq_m_s32_f32): Likewise.
16393 (vdupq_m_n_f32): Likewise.
16394 (vmaxnmaq_m_f32): Likewise.
16395 (vmaxnmavq_p_f32): Likewise.
16396 (vmaxnmvq_p_f32): Likewise.
16397 (vminnmaq_m_f32): Likewise.
16398 (vminnmavq_p_f32): Likewise.
16399 (vminnmvq_p_f32): Likewise.
16400 (vmlaldavq_p_s32): Likewise.
16401 (vmlaldavxq_p_s32): Likewise.
16402 (vmlsldavq_p_s32): Likewise.
16403 (vmlsldavxq_p_s32): Likewise.
16404 (vmovlbq_m_s16): Likewise.
16405 (vmovltq_m_s16): Likewise.
16406 (vmovnbq_m_s32): Likewise.
16407 (vmovntq_m_s32): Likewise.
16408 (vnegq_m_f32): Likewise.
16409 (vpselq_f32): Likewise.
16410 (vqmovnbq_m_s32): Likewise.
16411 (vqmovntq_m_s32): Likewise.
16412 (vrev32q_m_s16): Likewise.
16413 (vrev64q_m_f32): Likewise.
16414 (vrndaq_m_f32): Likewise.
16415 (vrndmq_m_f32): Likewise.
16416 (vrndnq_m_f32): Likewise.
16417 (vrndpq_m_f32): Likewise.
16418 (vrndq_m_f32): Likewise.
16419 (vrndxq_m_f32): Likewise.
16420 (vcmpeqq_m_n_f32): Likewise.
16421 (vcmpgeq_m_f32): Likewise.
16422 (vcmpgeq_m_n_f32): Likewise.
16423 (vcmpgtq_m_f32): Likewise.
16424 (vcmpgtq_m_n_f32): Likewise.
16425 (vcmpleq_m_f32): Likewise.
16426 (vcmpleq_m_n_f32): Likewise.
16427 (vcmpltq_m_f32): Likewise.
16428 (vcmpltq_m_n_f32): Likewise.
16429 (vcmpneq_m_f32): Likewise.
16430 (vcmpneq_m_n_f32): Likewise.
16431 (vmvnq_m_n_u32): Likewise.
16432 (vorrq_m_n_u32): Likewise.
16433 (vqrshruntq_n_s32): Likewise.
16434 (vqshrunbq_n_s32): Likewise.
16435 (vqshruntq_n_s32): Likewise.
16436 (vcvtmq_m_u32_f32): Likewise.
16437 (vcvtnq_m_u32_f32): Likewise.
16438 (vcvtpq_m_u32_f32): Likewise.
16439 (vcvtq_m_u32_f32): Likewise.
16440 (vqmovunbq_m_s32): Likewise.
16441 (vqmovuntq_m_s32): Likewise.
16442 (vqrshrntq_n_u32): Likewise.
16443 (vqshrnbq_n_u32): Likewise.
16444 (vqshrntq_n_u32): Likewise.
16445 (vrshrnbq_n_u32): Likewise.
16446 (vrshrntq_n_u32): Likewise.
16447 (vshrnbq_n_u32): Likewise.
16448 (vshrntq_n_u32): Likewise.
16449 (vmlaldavaq_u32): Likewise.
16450 (vmlaldavaxq_u32): Likewise.
16451 (vmlaldavq_p_u32): Likewise.
16452 (vmlaldavxq_p_u32): Likewise.
16453 (vmovlbq_m_u16): Likewise.
16454 (vmovltq_m_u16): Likewise.
16455 (vmovnbq_m_u32): Likewise.
16456 (vmovntq_m_u32): Likewise.
16457 (vqmovnbq_m_u32): Likewise.
16458 (vqmovntq_m_u32): Likewise.
16459 (vrev32q_m_u16): Likewise.
16460 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
16461 (__arm_vrmlsldavhaq_s32): Likewise.
16462 (__arm_vrmlsldavhaxq_s32): Likewise.
16463 (__arm_vaddlvaq_p_s32): Likewise.
16464 (__arm_vrev16q_m_s8): Likewise.
16465 (__arm_vrmlaldavhq_p_s32): Likewise.
16466 (__arm_vrmlaldavhxq_p_s32): Likewise.
16467 (__arm_vrmlsldavhq_p_s32): Likewise.
16468 (__arm_vrmlsldavhxq_p_s32): Likewise.
16469 (__arm_vaddlvaq_p_u32): Likewise.
16470 (__arm_vrev16q_m_u8): Likewise.
16471 (__arm_vrmlaldavhq_p_u32): Likewise.
16472 (__arm_vmvnq_m_n_s16): Likewise.
16473 (__arm_vorrq_m_n_s16): Likewise.
16474 (__arm_vqrshrntq_n_s16): Likewise.
16475 (__arm_vqshrnbq_n_s16): Likewise.
16476 (__arm_vqshrntq_n_s16): Likewise.
16477 (__arm_vrshrnbq_n_s16): Likewise.
16478 (__arm_vrshrntq_n_s16): Likewise.
16479 (__arm_vshrnbq_n_s16): Likewise.
16480 (__arm_vshrntq_n_s16): Likewise.
16481 (__arm_vmlaldavaq_s16): Likewise.
16482 (__arm_vmlaldavaxq_s16): Likewise.
16483 (__arm_vmlsldavaq_s16): Likewise.
16484 (__arm_vmlsldavaxq_s16): Likewise.
16485 (__arm_vmlaldavq_p_s16): Likewise.
16486 (__arm_vmlaldavxq_p_s16): Likewise.
16487 (__arm_vmlsldavq_p_s16): Likewise.
16488 (__arm_vmlsldavxq_p_s16): Likewise.
16489 (__arm_vmovlbq_m_s8): Likewise.
16490 (__arm_vmovltq_m_s8): Likewise.
16491 (__arm_vmovnbq_m_s16): Likewise.
16492 (__arm_vmovntq_m_s16): Likewise.
16493 (__arm_vqmovnbq_m_s16): Likewise.
16494 (__arm_vqmovntq_m_s16): Likewise.
16495 (__arm_vrev32q_m_s8): Likewise.
16496 (__arm_vmvnq_m_n_u16): Likewise.
16497 (__arm_vorrq_m_n_u16): Likewise.
16498 (__arm_vqrshruntq_n_s16): Likewise.
16499 (__arm_vqshrunbq_n_s16): Likewise.
16500 (__arm_vqshruntq_n_s16): Likewise.
16501 (__arm_vqmovunbq_m_s16): Likewise.
16502 (__arm_vqmovuntq_m_s16): Likewise.
16503 (__arm_vqrshrntq_n_u16): Likewise.
16504 (__arm_vqshrnbq_n_u16): Likewise.
16505 (__arm_vqshrntq_n_u16): Likewise.
16506 (__arm_vrshrnbq_n_u16): Likewise.
16507 (__arm_vrshrntq_n_u16): Likewise.
16508 (__arm_vshrnbq_n_u16): Likewise.
16509 (__arm_vshrntq_n_u16): Likewise.
16510 (__arm_vmlaldavaq_u16): Likewise.
16511 (__arm_vmlaldavaxq_u16): Likewise.
16512 (__arm_vmlaldavq_p_u16): Likewise.
16513 (__arm_vmlaldavxq_p_u16): Likewise.
16514 (__arm_vmovlbq_m_u8): Likewise.
16515 (__arm_vmovltq_m_u8): Likewise.
16516 (__arm_vmovnbq_m_u16): Likewise.
16517 (__arm_vmovntq_m_u16): Likewise.
16518 (__arm_vqmovnbq_m_u16): Likewise.
16519 (__arm_vqmovntq_m_u16): Likewise.
16520 (__arm_vrev32q_m_u8): Likewise.
16521 (__arm_vmvnq_m_n_s32): Likewise.
16522 (__arm_vorrq_m_n_s32): Likewise.
16523 (__arm_vqrshrntq_n_s32): Likewise.
16524 (__arm_vqshrnbq_n_s32): Likewise.
16525 (__arm_vqshrntq_n_s32): Likewise.
16526 (__arm_vrshrnbq_n_s32): Likewise.
16527 (__arm_vrshrntq_n_s32): Likewise.
16528 (__arm_vshrnbq_n_s32): Likewise.
16529 (__arm_vshrntq_n_s32): Likewise.
16530 (__arm_vmlaldavaq_s32): Likewise.
16531 (__arm_vmlaldavaxq_s32): Likewise.
16532 (__arm_vmlsldavaq_s32): Likewise.
16533 (__arm_vmlsldavaxq_s32): Likewise.
16534 (__arm_vmlaldavq_p_s32): Likewise.
16535 (__arm_vmlaldavxq_p_s32): Likewise.
16536 (__arm_vmlsldavq_p_s32): Likewise.
16537 (__arm_vmlsldavxq_p_s32): Likewise.
16538 (__arm_vmovlbq_m_s16): Likewise.
16539 (__arm_vmovltq_m_s16): Likewise.
16540 (__arm_vmovnbq_m_s32): Likewise.
16541 (__arm_vmovntq_m_s32): Likewise.
16542 (__arm_vqmovnbq_m_s32): Likewise.
16543 (__arm_vqmovntq_m_s32): Likewise.
16544 (__arm_vrev32q_m_s16): Likewise.
16545 (__arm_vmvnq_m_n_u32): Likewise.
16546 (__arm_vorrq_m_n_u32): Likewise.
16547 (__arm_vqrshruntq_n_s32): Likewise.
16548 (__arm_vqshrunbq_n_s32): Likewise.
16549 (__arm_vqshruntq_n_s32): Likewise.
16550 (__arm_vqmovunbq_m_s32): Likewise.
16551 (__arm_vqmovuntq_m_s32): Likewise.
16552 (__arm_vqrshrntq_n_u32): Likewise.
16553 (__arm_vqshrnbq_n_u32): Likewise.
16554 (__arm_vqshrntq_n_u32): Likewise.
16555 (__arm_vrshrnbq_n_u32): Likewise.
16556 (__arm_vrshrntq_n_u32): Likewise.
16557 (__arm_vshrnbq_n_u32): Likewise.
16558 (__arm_vshrntq_n_u32): Likewise.
16559 (__arm_vmlaldavaq_u32): Likewise.
16560 (__arm_vmlaldavaxq_u32): Likewise.
16561 (__arm_vmlaldavq_p_u32): Likewise.
16562 (__arm_vmlaldavxq_p_u32): Likewise.
16563 (__arm_vmovlbq_m_u16): Likewise.
16564 (__arm_vmovltq_m_u16): Likewise.
16565 (__arm_vmovnbq_m_u32): Likewise.
16566 (__arm_vmovntq_m_u32): Likewise.
16567 (__arm_vqmovnbq_m_u32): Likewise.
16568 (__arm_vqmovntq_m_u32): Likewise.
16569 (__arm_vrev32q_m_u16): Likewise.
16570 (__arm_vcvtbq_m_f16_f32): Likewise.
16571 (__arm_vcvtbq_m_f32_f16): Likewise.
16572 (__arm_vcvttq_m_f16_f32): Likewise.
16573 (__arm_vcvttq_m_f32_f16): Likewise.
16574 (__arm_vrev32q_m_f16): Likewise.
16575 (__arm_vcmlaq_f16): Likewise.
16576 (__arm_vcmlaq_rot180_f16): Likewise.
16577 (__arm_vcmlaq_rot270_f16): Likewise.
16578 (__arm_vcmlaq_rot90_f16): Likewise.
16579 (__arm_vfmaq_f16): Likewise.
16580 (__arm_vfmaq_n_f16): Likewise.
16581 (__arm_vfmasq_n_f16): Likewise.
16582 (__arm_vfmsq_f16): Likewise.
16583 (__arm_vabsq_m_f16): Likewise.
16584 (__arm_vcvtmq_m_s16_f16): Likewise.
16585 (__arm_vcvtnq_m_s16_f16): Likewise.
16586 (__arm_vcvtpq_m_s16_f16): Likewise.
16587 (__arm_vcvtq_m_s16_f16): Likewise.
16588 (__arm_vdupq_m_n_f16): Likewise.
16589 (__arm_vmaxnmaq_m_f16): Likewise.
16590 (__arm_vmaxnmavq_p_f16): Likewise.
16591 (__arm_vmaxnmvq_p_f16): Likewise.
16592 (__arm_vminnmaq_m_f16): Likewise.
16593 (__arm_vminnmavq_p_f16): Likewise.
16594 (__arm_vminnmvq_p_f16): Likewise.
16595 (__arm_vnegq_m_f16): Likewise.
16596 (__arm_vpselq_f16): Likewise.
16597 (__arm_vrev64q_m_f16): Likewise.
16598 (__arm_vrndaq_m_f16): Likewise.
16599 (__arm_vrndmq_m_f16): Likewise.
16600 (__arm_vrndnq_m_f16): Likewise.
16601 (__arm_vrndpq_m_f16): Likewise.
16602 (__arm_vrndq_m_f16): Likewise.
16603 (__arm_vrndxq_m_f16): Likewise.
16604 (__arm_vcmpeqq_m_n_f16): Likewise.
16605 (__arm_vcmpgeq_m_f16): Likewise.
16606 (__arm_vcmpgeq_m_n_f16): Likewise.
16607 (__arm_vcmpgtq_m_f16): Likewise.
16608 (__arm_vcmpgtq_m_n_f16): Likewise.
16609 (__arm_vcmpleq_m_f16): Likewise.
16610 (__arm_vcmpleq_m_n_f16): Likewise.
16611 (__arm_vcmpltq_m_f16): Likewise.
16612 (__arm_vcmpltq_m_n_f16): Likewise.
16613 (__arm_vcmpneq_m_f16): Likewise.
16614 (__arm_vcmpneq_m_n_f16): Likewise.
16615 (__arm_vcvtmq_m_u16_f16): Likewise.
16616 (__arm_vcvtnq_m_u16_f16): Likewise.
16617 (__arm_vcvtpq_m_u16_f16): Likewise.
16618 (__arm_vcvtq_m_u16_f16): Likewise.
16619 (__arm_vcmlaq_f32): Likewise.
16620 (__arm_vcmlaq_rot180_f32): Likewise.
16621 (__arm_vcmlaq_rot270_f32): Likewise.
16622 (__arm_vcmlaq_rot90_f32): Likewise.
16623 (__arm_vfmaq_f32): Likewise.
16624 (__arm_vfmaq_n_f32): Likewise.
16625 (__arm_vfmasq_n_f32): Likewise.
16626 (__arm_vfmsq_f32): Likewise.
16627 (__arm_vabsq_m_f32): Likewise.
16628 (__arm_vcvtmq_m_s32_f32): Likewise.
16629 (__arm_vcvtnq_m_s32_f32): Likewise.
16630 (__arm_vcvtpq_m_s32_f32): Likewise.
16631 (__arm_vcvtq_m_s32_f32): Likewise.
16632 (__arm_vdupq_m_n_f32): Likewise.
16633 (__arm_vmaxnmaq_m_f32): Likewise.
16634 (__arm_vmaxnmavq_p_f32): Likewise.
16635 (__arm_vmaxnmvq_p_f32): Likewise.
16636 (__arm_vminnmaq_m_f32): Likewise.
16637 (__arm_vminnmavq_p_f32): Likewise.
16638 (__arm_vminnmvq_p_f32): Likewise.
16639 (__arm_vnegq_m_f32): Likewise.
16640 (__arm_vpselq_f32): Likewise.
16641 (__arm_vrev64q_m_f32): Likewise.
16642 (__arm_vrndaq_m_f32): Likewise.
16643 (__arm_vrndmq_m_f32): Likewise.
16644 (__arm_vrndnq_m_f32): Likewise.
16645 (__arm_vrndpq_m_f32): Likewise.
16646 (__arm_vrndq_m_f32): Likewise.
16647 (__arm_vrndxq_m_f32): Likewise.
16648 (__arm_vcmpeqq_m_n_f32): Likewise.
16649 (__arm_vcmpgeq_m_f32): Likewise.
16650 (__arm_vcmpgeq_m_n_f32): Likewise.
16651 (__arm_vcmpgtq_m_f32): Likewise.
16652 (__arm_vcmpgtq_m_n_f32): Likewise.
16653 (__arm_vcmpleq_m_f32): Likewise.
16654 (__arm_vcmpleq_m_n_f32): Likewise.
16655 (__arm_vcmpltq_m_f32): Likewise.
16656 (__arm_vcmpltq_m_n_f32): Likewise.
16657 (__arm_vcmpneq_m_f32): Likewise.
16658 (__arm_vcmpneq_m_n_f32): Likewise.
16659 (__arm_vcvtmq_m_u32_f32): Likewise.
16660 (__arm_vcvtnq_m_u32_f32): Likewise.
16661 (__arm_vcvtpq_m_u32_f32): Likewise.
16662 (__arm_vcvtq_m_u32_f32): Likewise.
16663 (vcvtq_m): Define polymorphic variant.
16664 (vabsq_m): Likewise.
16665 (vcmlaq): Likewise.
16666 (vcmlaq_rot180): Likewise.
16667 (vcmlaq_rot270): Likewise.
16668 (vcmlaq_rot90): Likewise.
16669 (vcmpeqq_m_n): Likewise.
16670 (vcmpgeq_m_n): Likewise.
16671 (vrndxq_m): Likewise.
16672 (vrndq_m): Likewise.
16673 (vrndpq_m): Likewise.
16674 (vcmpgtq_m_n): Likewise.
16675 (vcmpgtq_m): Likewise.
16676 (vcmpleq_m): Likewise.
16677 (vcmpleq_m_n): Likewise.
16678 (vcmpltq_m_n): Likewise.
16679 (vcmpltq_m): Likewise.
16680 (vcmpneq_m): Likewise.
16681 (vcmpneq_m_n): Likewise.
16682 (vcvtbq_m): Likewise.
16683 (vcvttq_m): Likewise.
16684 (vcvtmq_m): Likewise.
16685 (vcvtnq_m): Likewise.
16686 (vcvtpq_m): Likewise.
16687 (vdupq_m_n): Likewise.
16688 (vfmaq_n): Likewise.
16690 (vfmasq_n): Likewise.
16692 (vmaxnmaq_m): Likewise.
16693 (vmaxnmavq_m): Likewise.
16694 (vmaxnmvq_m): Likewise.
16695 (vmaxnmavq_p): Likewise.
16696 (vmaxnmvq_p): Likewise.
16697 (vminnmaq_m): Likewise.
16698 (vminnmavq_p): Likewise.
16699 (vminnmvq_p): Likewise.
16700 (vrndnq_m): Likewise.
16701 (vrndaq_m): Likewise.
16702 (vrndmq_m): Likewise.
16703 (vrev64q_m): Likewise.
16704 (vrev32q_m): Likewise.
16705 (vpselq): Likewise.
16706 (vnegq_m): Likewise.
16707 (vcmpgeq_m): Likewise.
16708 (vshrntq_n): Likewise.
16709 (vrshrntq_n): Likewise.
16710 (vmovlbq_m): Likewise.
16711 (vmovnbq_m): Likewise.
16712 (vmovntq_m): Likewise.
16713 (vmvnq_m_n): Likewise.
16714 (vmvnq_m): Likewise.
16715 (vshrnbq_n): Likewise.
16716 (vrshrnbq_n): Likewise.
16717 (vqshruntq_n): Likewise.
16718 (vrev16q_m): Likewise.
16719 (vqshrunbq_n): Likewise.
16720 (vqshrntq_n): Likewise.
16721 (vqrshruntq_n): Likewise.
16722 (vqrshrntq_n): Likewise.
16723 (vqshrnbq_n): Likewise.
16724 (vqmovuntq_m): Likewise.
16725 (vqmovntq_m): Likewise.
16726 (vqmovnbq_m): Likewise.
16727 (vorrq_m_n): Likewise.
16728 (vmovltq_m): Likewise.
16729 (vqmovunbq_m): Likewise.
16730 (vaddlvaq_p): Likewise.
16731 (vmlaldavaq): Likewise.
16732 (vmlaldavaxq): Likewise.
16733 (vmlaldavq_p): Likewise.
16734 (vmlaldavxq_p): Likewise.
16735 (vmlsldavaq): Likewise.
16736 (vmlsldavaxq): Likewise.
16737 (vmlsldavq_p): Likewise.
16738 (vmlsldavxq_p): Likewise.
16739 (vrmlaldavhaxq): Likewise.
16740 (vrmlaldavhq_p): Likewise.
16741 (vrmlaldavhxq_p): Likewise.
16742 (vrmlsldavhaq): Likewise.
16743 (vrmlsldavhaxq): Likewise.
16744 (vrmlsldavhq_p): Likewise.
16745 (vrmlsldavhxq_p): Likewise.
16746 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
16748 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
16749 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
16750 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
16751 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
16752 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
16753 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
16754 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
16755 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
16756 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
16757 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
16758 (MVE_pred3): Likewise.
16759 (MVE_constraint1): Likewise.
16760 (MVE_pred1): Likewise.
16761 (VMLALDAVQ_P): Define iterator.
16762 (VQMOVNBQ_M): Likewise.
16763 (VMOVLTQ_M): Likewise.
16764 (VMOVNBQ_M): Likewise.
16765 (VRSHRNTQ_N): Likewise.
16766 (VORRQ_M_N): Likewise.
16767 (VREV32Q_M): Likewise.
16768 (VREV16Q_M): Likewise.
16769 (VQRSHRNTQ_N): Likewise.
16770 (VMOVNTQ_M): Likewise.
16771 (VMOVLBQ_M): Likewise.
16772 (VMLALDAVAQ): Likewise.
16773 (VQSHRNBQ_N): Likewise.
16774 (VSHRNBQ_N): Likewise.
16775 (VRSHRNBQ_N): Likewise.
16776 (VMLALDAVXQ_P): Likewise.
16777 (VQMOVNTQ_M): Likewise.
16778 (VMVNQ_M_N): Likewise.
16779 (VQSHRNTQ_N): Likewise.
16780 (VMLALDAVAXQ): Likewise.
16781 (VSHRNTQ_N): Likewise.
16782 (VCVTMQ_M): Likewise.
16783 (VCVTNQ_M): Likewise.
16784 (VCVTPQ_M): Likewise.
16785 (VCVTQ_M_N_FROM_F): Likewise.
16786 (VCVTQ_M_FROM_F): Likewise.
16787 (VRMLALDAVHQ_P): Likewise.
16788 (VADDLVAQ_P): Likewise.
16789 (mve_vrndq_m_f<mode>): Define RTL pattern.
16790 (mve_vabsq_m_f<mode>): Likewise.
16791 (mve_vaddlvaq_p_<supf>v4si): Likewise.
16792 (mve_vcmlaq_f<mode>): Likewise.
16793 (mve_vcmlaq_rot180_f<mode>): Likewise.
16794 (mve_vcmlaq_rot270_f<mode>): Likewise.
16795 (mve_vcmlaq_rot90_f<mode>): Likewise.
16796 (mve_vcmpeqq_m_n_f<mode>): Likewise.
16797 (mve_vcmpgeq_m_f<mode>): Likewise.
16798 (mve_vcmpgeq_m_n_f<mode>): Likewise.
16799 (mve_vcmpgtq_m_f<mode>): Likewise.
16800 (mve_vcmpgtq_m_n_f<mode>): Likewise.
16801 (mve_vcmpleq_m_f<mode>): Likewise.
16802 (mve_vcmpleq_m_n_f<mode>): Likewise.
16803 (mve_vcmpltq_m_f<mode>): Likewise.
16804 (mve_vcmpltq_m_n_f<mode>): Likewise.
16805 (mve_vcmpneq_m_f<mode>): Likewise.
16806 (mve_vcmpneq_m_n_f<mode>): Likewise.
16807 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
16808 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
16809 (mve_vcvttq_m_f16_f32v8hf): Likewise.
16810 (mve_vcvttq_m_f32_f16v4sf): Likewise.
16811 (mve_vdupq_m_n_f<mode>): Likewise.
16812 (mve_vfmaq_f<mode>): Likewise.
16813 (mve_vfmaq_n_f<mode>): Likewise.
16814 (mve_vfmasq_n_f<mode>): Likewise.
16815 (mve_vfmsq_f<mode>): Likewise.
16816 (mve_vmaxnmaq_m_f<mode>): Likewise.
16817 (mve_vmaxnmavq_p_f<mode>): Likewise.
16818 (mve_vmaxnmvq_p_f<mode>): Likewise.
16819 (mve_vminnmaq_m_f<mode>): Likewise.
16820 (mve_vminnmavq_p_f<mode>): Likewise.
16821 (mve_vminnmvq_p_f<mode>): Likewise.
16822 (mve_vmlaldavaq_<supf><mode>): Likewise.
16823 (mve_vmlaldavaxq_<supf><mode>): Likewise.
16824 (mve_vmlaldavq_p_<supf><mode>): Likewise.
16825 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
16826 (mve_vmlsldavaq_s<mode>): Likewise.
16827 (mve_vmlsldavaxq_s<mode>): Likewise.
16828 (mve_vmlsldavq_p_s<mode>): Likewise.
16829 (mve_vmlsldavxq_p_s<mode>): Likewise.
16830 (mve_vmovlbq_m_<supf><mode>): Likewise.
16831 (mve_vmovltq_m_<supf><mode>): Likewise.
16832 (mve_vmovnbq_m_<supf><mode>): Likewise.
16833 (mve_vmovntq_m_<supf><mode>): Likewise.
16834 (mve_vmvnq_m_n_<supf><mode>): Likewise.
16835 (mve_vnegq_m_f<mode>): Likewise.
16836 (mve_vorrq_m_n_<supf><mode>): Likewise.
16837 (mve_vpselq_f<mode>): Likewise.
16838 (mve_vqmovnbq_m_<supf><mode>): Likewise.
16839 (mve_vqmovntq_m_<supf><mode>): Likewise.
16840 (mve_vqmovunbq_m_s<mode>): Likewise.
16841 (mve_vqmovuntq_m_s<mode>): Likewise.
16842 (mve_vqrshrntq_n_<supf><mode>): Likewise.
16843 (mve_vqrshruntq_n_s<mode>): Likewise.
16844 (mve_vqshrnbq_n_<supf><mode>): Likewise.
16845 (mve_vqshrntq_n_<supf><mode>): Likewise.
16846 (mve_vqshrunbq_n_s<mode>): Likewise.
16847 (mve_vqshruntq_n_s<mode>): Likewise.
16848 (mve_vrev32q_m_fv8hf): Likewise.
16849 (mve_vrev32q_m_<supf><mode>): Likewise.
16850 (mve_vrev64q_m_f<mode>): Likewise.
16851 (mve_vrmlaldavhaxq_sv4si): Likewise.
16852 (mve_vrmlaldavhxq_p_sv4si): Likewise.
16853 (mve_vrmlsldavhaxq_sv4si): Likewise.
16854 (mve_vrmlsldavhq_p_sv4si): Likewise.
16855 (mve_vrmlsldavhxq_p_sv4si): Likewise.
16856 (mve_vrndaq_m_f<mode>): Likewise.
16857 (mve_vrndmq_m_f<mode>): Likewise.
16858 (mve_vrndnq_m_f<mode>): Likewise.
16859 (mve_vrndpq_m_f<mode>): Likewise.
16860 (mve_vrndxq_m_f<mode>): Likewise.
16861 (mve_vrshrnbq_n_<supf><mode>): Likewise.
16862 (mve_vrshrntq_n_<supf><mode>): Likewise.
16863 (mve_vshrnbq_n_<supf><mode>): Likewise.
16864 (mve_vshrntq_n_<supf><mode>): Likewise.
16865 (mve_vcvtmq_m_<supf><mode>): Likewise.
16866 (mve_vcvtpq_m_<supf><mode>): Likewise.
16867 (mve_vcvtnq_m_<supf><mode>): Likewise.
16868 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
16869 (mve_vrev16q_m_<supf>v16qi): Likewise.
16870 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
16871 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
16872 (mve_vrmlsldavhaq_sv4si): Likewise.
16874 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16875 Mihail Ionescu <mihail.ionescu@arm.com>
16876 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16878 * config/arm/arm_mve.h (vpselq_u8): Define macro.
16879 (vpselq_s8): Likewise.
16880 (vrev64q_m_u8): Likewise.
16881 (vqrdmlashq_n_u8): Likewise.
16882 (vqrdmlahq_n_u8): Likewise.
16883 (vqdmlahq_n_u8): Likewise.
16884 (vmvnq_m_u8): Likewise.
16885 (vmlasq_n_u8): Likewise.
16886 (vmlaq_n_u8): Likewise.
16887 (vmladavq_p_u8): Likewise.
16888 (vmladavaq_u8): Likewise.
16889 (vminvq_p_u8): Likewise.
16890 (vmaxvq_p_u8): Likewise.
16891 (vdupq_m_n_u8): Likewise.
16892 (vcmpneq_m_u8): Likewise.
16893 (vcmpneq_m_n_u8): Likewise.
16894 (vcmphiq_m_u8): Likewise.
16895 (vcmphiq_m_n_u8): Likewise.
16896 (vcmpeqq_m_u8): Likewise.
16897 (vcmpeqq_m_n_u8): Likewise.
16898 (vcmpcsq_m_u8): Likewise.
16899 (vcmpcsq_m_n_u8): Likewise.
16900 (vclzq_m_u8): Likewise.
16901 (vaddvaq_p_u8): Likewise.
16902 (vsriq_n_u8): Likewise.
16903 (vsliq_n_u8): Likewise.
16904 (vshlq_m_r_u8): Likewise.
16905 (vrshlq_m_n_u8): Likewise.
16906 (vqshlq_m_r_u8): Likewise.
16907 (vqrshlq_m_n_u8): Likewise.
16908 (vminavq_p_s8): Likewise.
16909 (vminaq_m_s8): Likewise.
16910 (vmaxavq_p_s8): Likewise.
16911 (vmaxaq_m_s8): Likewise.
16912 (vcmpneq_m_s8): Likewise.
16913 (vcmpneq_m_n_s8): Likewise.
16914 (vcmpltq_m_s8): Likewise.
16915 (vcmpltq_m_n_s8): Likewise.
16916 (vcmpleq_m_s8): Likewise.
16917 (vcmpleq_m_n_s8): Likewise.
16918 (vcmpgtq_m_s8): Likewise.
16919 (vcmpgtq_m_n_s8): Likewise.
16920 (vcmpgeq_m_s8): Likewise.
16921 (vcmpgeq_m_n_s8): Likewise.
16922 (vcmpeqq_m_s8): Likewise.
16923 (vcmpeqq_m_n_s8): Likewise.
16924 (vshlq_m_r_s8): Likewise.
16925 (vrshlq_m_n_s8): Likewise.
16926 (vrev64q_m_s8): Likewise.
16927 (vqshlq_m_r_s8): Likewise.
16928 (vqrshlq_m_n_s8): Likewise.
16929 (vqnegq_m_s8): Likewise.
16930 (vqabsq_m_s8): Likewise.
16931 (vnegq_m_s8): Likewise.
16932 (vmvnq_m_s8): Likewise.
16933 (vmlsdavxq_p_s8): Likewise.
16934 (vmlsdavq_p_s8): Likewise.
16935 (vmladavxq_p_s8): Likewise.
16936 (vmladavq_p_s8): Likewise.
16937 (vminvq_p_s8): Likewise.
16938 (vmaxvq_p_s8): Likewise.
16939 (vdupq_m_n_s8): Likewise.
16940 (vclzq_m_s8): Likewise.
16941 (vclsq_m_s8): Likewise.
16942 (vaddvaq_p_s8): Likewise.
16943 (vabsq_m_s8): Likewise.
16944 (vqrdmlsdhxq_s8): Likewise.
16945 (vqrdmlsdhq_s8): Likewise.
16946 (vqrdmlashq_n_s8): Likewise.
16947 (vqrdmlahq_n_s8): Likewise.
16948 (vqrdmladhxq_s8): Likewise.
16949 (vqrdmladhq_s8): Likewise.
16950 (vqdmlsdhxq_s8): Likewise.
16951 (vqdmlsdhq_s8): Likewise.
16952 (vqdmlahq_n_s8): Likewise.
16953 (vqdmladhxq_s8): Likewise.
16954 (vqdmladhq_s8): Likewise.
16955 (vmlsdavaxq_s8): Likewise.
16956 (vmlsdavaq_s8): Likewise.
16957 (vmlasq_n_s8): Likewise.
16958 (vmlaq_n_s8): Likewise.
16959 (vmladavaxq_s8): Likewise.
16960 (vmladavaq_s8): Likewise.
16961 (vsriq_n_s8): Likewise.
16962 (vsliq_n_s8): Likewise.
16963 (vpselq_u16): Likewise.
16964 (vpselq_s16): Likewise.
16965 (vrev64q_m_u16): Likewise.
16966 (vqrdmlashq_n_u16): Likewise.
16967 (vqrdmlahq_n_u16): Likewise.
16968 (vqdmlahq_n_u16): Likewise.
16969 (vmvnq_m_u16): Likewise.
16970 (vmlasq_n_u16): Likewise.
16971 (vmlaq_n_u16): Likewise.
16972 (vmladavq_p_u16): Likewise.
16973 (vmladavaq_u16): Likewise.
16974 (vminvq_p_u16): Likewise.
16975 (vmaxvq_p_u16): Likewise.
16976 (vdupq_m_n_u16): Likewise.
16977 (vcmpneq_m_u16): Likewise.
16978 (vcmpneq_m_n_u16): Likewise.
16979 (vcmphiq_m_u16): Likewise.
16980 (vcmphiq_m_n_u16): Likewise.
16981 (vcmpeqq_m_u16): Likewise.
16982 (vcmpeqq_m_n_u16): Likewise.
16983 (vcmpcsq_m_u16): Likewise.
16984 (vcmpcsq_m_n_u16): Likewise.
16985 (vclzq_m_u16): Likewise.
16986 (vaddvaq_p_u16): Likewise.
16987 (vsriq_n_u16): Likewise.
16988 (vsliq_n_u16): Likewise.
16989 (vshlq_m_r_u16): Likewise.
16990 (vrshlq_m_n_u16): Likewise.
16991 (vqshlq_m_r_u16): Likewise.
16992 (vqrshlq_m_n_u16): Likewise.
16993 (vminavq_p_s16): Likewise.
16994 (vminaq_m_s16): Likewise.
16995 (vmaxavq_p_s16): Likewise.
16996 (vmaxaq_m_s16): Likewise.
16997 (vcmpneq_m_s16): Likewise.
16998 (vcmpneq_m_n_s16): Likewise.
16999 (vcmpltq_m_s16): Likewise.
17000 (vcmpltq_m_n_s16): Likewise.
17001 (vcmpleq_m_s16): Likewise.
17002 (vcmpleq_m_n_s16): Likewise.
17003 (vcmpgtq_m_s16): Likewise.
17004 (vcmpgtq_m_n_s16): Likewise.
17005 (vcmpgeq_m_s16): Likewise.
17006 (vcmpgeq_m_n_s16): Likewise.
17007 (vcmpeqq_m_s16): Likewise.
17008 (vcmpeqq_m_n_s16): Likewise.
17009 (vshlq_m_r_s16): Likewise.
17010 (vrshlq_m_n_s16): Likewise.
17011 (vrev64q_m_s16): Likewise.
17012 (vqshlq_m_r_s16): Likewise.
17013 (vqrshlq_m_n_s16): Likewise.
17014 (vqnegq_m_s16): Likewise.
17015 (vqabsq_m_s16): Likewise.
17016 (vnegq_m_s16): Likewise.
17017 (vmvnq_m_s16): Likewise.
17018 (vmlsdavxq_p_s16): Likewise.
17019 (vmlsdavq_p_s16): Likewise.
17020 (vmladavxq_p_s16): Likewise.
17021 (vmladavq_p_s16): Likewise.
17022 (vminvq_p_s16): Likewise.
17023 (vmaxvq_p_s16): Likewise.
17024 (vdupq_m_n_s16): Likewise.
17025 (vclzq_m_s16): Likewise.
17026 (vclsq_m_s16): Likewise.
17027 (vaddvaq_p_s16): Likewise.
17028 (vabsq_m_s16): Likewise.
17029 (vqrdmlsdhxq_s16): Likewise.
17030 (vqrdmlsdhq_s16): Likewise.
17031 (vqrdmlashq_n_s16): Likewise.
17032 (vqrdmlahq_n_s16): Likewise.
17033 (vqrdmladhxq_s16): Likewise.
17034 (vqrdmladhq_s16): Likewise.
17035 (vqdmlsdhxq_s16): Likewise.
17036 (vqdmlsdhq_s16): Likewise.
17037 (vqdmlahq_n_s16): Likewise.
17038 (vqdmladhxq_s16): Likewise.
17039 (vqdmladhq_s16): Likewise.
17040 (vmlsdavaxq_s16): Likewise.
17041 (vmlsdavaq_s16): Likewise.
17042 (vmlasq_n_s16): Likewise.
17043 (vmlaq_n_s16): Likewise.
17044 (vmladavaxq_s16): Likewise.
17045 (vmladavaq_s16): Likewise.
17046 (vsriq_n_s16): Likewise.
17047 (vsliq_n_s16): Likewise.
17048 (vpselq_u32): Likewise.
17049 (vpselq_s32): Likewise.
17050 (vrev64q_m_u32): Likewise.
17051 (vqrdmlashq_n_u32): Likewise.
17052 (vqrdmlahq_n_u32): Likewise.
17053 (vqdmlahq_n_u32): Likewise.
17054 (vmvnq_m_u32): Likewise.
17055 (vmlasq_n_u32): Likewise.
17056 (vmlaq_n_u32): Likewise.
17057 (vmladavq_p_u32): Likewise.
17058 (vmladavaq_u32): Likewise.
17059 (vminvq_p_u32): Likewise.
17060 (vmaxvq_p_u32): Likewise.
17061 (vdupq_m_n_u32): Likewise.
17062 (vcmpneq_m_u32): Likewise.
17063 (vcmpneq_m_n_u32): Likewise.
17064 (vcmphiq_m_u32): Likewise.
17065 (vcmphiq_m_n_u32): Likewise.
17066 (vcmpeqq_m_u32): Likewise.
17067 (vcmpeqq_m_n_u32): Likewise.
17068 (vcmpcsq_m_u32): Likewise.
17069 (vcmpcsq_m_n_u32): Likewise.
17070 (vclzq_m_u32): Likewise.
17071 (vaddvaq_p_u32): Likewise.
17072 (vsriq_n_u32): Likewise.
17073 (vsliq_n_u32): Likewise.
17074 (vshlq_m_r_u32): Likewise.
17075 (vrshlq_m_n_u32): Likewise.
17076 (vqshlq_m_r_u32): Likewise.
17077 (vqrshlq_m_n_u32): Likewise.
17078 (vminavq_p_s32): Likewise.
17079 (vminaq_m_s32): Likewise.
17080 (vmaxavq_p_s32): Likewise.
17081 (vmaxaq_m_s32): Likewise.
17082 (vcmpneq_m_s32): Likewise.
17083 (vcmpneq_m_n_s32): Likewise.
17084 (vcmpltq_m_s32): Likewise.
17085 (vcmpltq_m_n_s32): Likewise.
17086 (vcmpleq_m_s32): Likewise.
17087 (vcmpleq_m_n_s32): Likewise.
17088 (vcmpgtq_m_s32): Likewise.
17089 (vcmpgtq_m_n_s32): Likewise.
17090 (vcmpgeq_m_s32): Likewise.
17091 (vcmpgeq_m_n_s32): Likewise.
17092 (vcmpeqq_m_s32): Likewise.
17093 (vcmpeqq_m_n_s32): Likewise.
17094 (vshlq_m_r_s32): Likewise.
17095 (vrshlq_m_n_s32): Likewise.
17096 (vrev64q_m_s32): Likewise.
17097 (vqshlq_m_r_s32): Likewise.
17098 (vqrshlq_m_n_s32): Likewise.
17099 (vqnegq_m_s32): Likewise.
17100 (vqabsq_m_s32): Likewise.
17101 (vnegq_m_s32): Likewise.
17102 (vmvnq_m_s32): Likewise.
17103 (vmlsdavxq_p_s32): Likewise.
17104 (vmlsdavq_p_s32): Likewise.
17105 (vmladavxq_p_s32): Likewise.
17106 (vmladavq_p_s32): Likewise.
17107 (vminvq_p_s32): Likewise.
17108 (vmaxvq_p_s32): Likewise.
17109 (vdupq_m_n_s32): Likewise.
17110 (vclzq_m_s32): Likewise.
17111 (vclsq_m_s32): Likewise.
17112 (vaddvaq_p_s32): Likewise.
17113 (vabsq_m_s32): Likewise.
17114 (vqrdmlsdhxq_s32): Likewise.
17115 (vqrdmlsdhq_s32): Likewise.
17116 (vqrdmlashq_n_s32): Likewise.
17117 (vqrdmlahq_n_s32): Likewise.
17118 (vqrdmladhxq_s32): Likewise.
17119 (vqrdmladhq_s32): Likewise.
17120 (vqdmlsdhxq_s32): Likewise.
17121 (vqdmlsdhq_s32): Likewise.
17122 (vqdmlahq_n_s32): Likewise.
17123 (vqdmladhxq_s32): Likewise.
17124 (vqdmladhq_s32): Likewise.
17125 (vmlsdavaxq_s32): Likewise.
17126 (vmlsdavaq_s32): Likewise.
17127 (vmlasq_n_s32): Likewise.
17128 (vmlaq_n_s32): Likewise.
17129 (vmladavaxq_s32): Likewise.
17130 (vmladavaq_s32): Likewise.
17131 (vsriq_n_s32): Likewise.
17132 (vsliq_n_s32): Likewise.
17133 (vpselq_u64): Likewise.
17134 (vpselq_s64): Likewise.
17135 (__arm_vpselq_u8): Define intrinsic.
17136 (__arm_vpselq_s8): Likewise.
17137 (__arm_vrev64q_m_u8): Likewise.
17138 (__arm_vqrdmlashq_n_u8): Likewise.
17139 (__arm_vqrdmlahq_n_u8): Likewise.
17140 (__arm_vqdmlahq_n_u8): Likewise.
17141 (__arm_vmvnq_m_u8): Likewise.
17142 (__arm_vmlasq_n_u8): Likewise.
17143 (__arm_vmlaq_n_u8): Likewise.
17144 (__arm_vmladavq_p_u8): Likewise.
17145 (__arm_vmladavaq_u8): Likewise.
17146 (__arm_vminvq_p_u8): Likewise.
17147 (__arm_vmaxvq_p_u8): Likewise.
17148 (__arm_vdupq_m_n_u8): Likewise.
17149 (__arm_vcmpneq_m_u8): Likewise.
17150 (__arm_vcmpneq_m_n_u8): Likewise.
17151 (__arm_vcmphiq_m_u8): Likewise.
17152 (__arm_vcmphiq_m_n_u8): Likewise.
17153 (__arm_vcmpeqq_m_u8): Likewise.
17154 (__arm_vcmpeqq_m_n_u8): Likewise.
17155 (__arm_vcmpcsq_m_u8): Likewise.
17156 (__arm_vcmpcsq_m_n_u8): Likewise.
17157 (__arm_vclzq_m_u8): Likewise.
17158 (__arm_vaddvaq_p_u8): Likewise.
17159 (__arm_vsriq_n_u8): Likewise.
17160 (__arm_vsliq_n_u8): Likewise.
17161 (__arm_vshlq_m_r_u8): Likewise.
17162 (__arm_vrshlq_m_n_u8): Likewise.
17163 (__arm_vqshlq_m_r_u8): Likewise.
17164 (__arm_vqrshlq_m_n_u8): Likewise.
17165 (__arm_vminavq_p_s8): Likewise.
17166 (__arm_vminaq_m_s8): Likewise.
17167 (__arm_vmaxavq_p_s8): Likewise.
17168 (__arm_vmaxaq_m_s8): Likewise.
17169 (__arm_vcmpneq_m_s8): Likewise.
17170 (__arm_vcmpneq_m_n_s8): Likewise.
17171 (__arm_vcmpltq_m_s8): Likewise.
17172 (__arm_vcmpltq_m_n_s8): Likewise.
17173 (__arm_vcmpleq_m_s8): Likewise.
17174 (__arm_vcmpleq_m_n_s8): Likewise.
17175 (__arm_vcmpgtq_m_s8): Likewise.
17176 (__arm_vcmpgtq_m_n_s8): Likewise.
17177 (__arm_vcmpgeq_m_s8): Likewise.
17178 (__arm_vcmpgeq_m_n_s8): Likewise.
17179 (__arm_vcmpeqq_m_s8): Likewise.
17180 (__arm_vcmpeqq_m_n_s8): Likewise.
17181 (__arm_vshlq_m_r_s8): Likewise.
17182 (__arm_vrshlq_m_n_s8): Likewise.
17183 (__arm_vrev64q_m_s8): Likewise.
17184 (__arm_vqshlq_m_r_s8): Likewise.
17185 (__arm_vqrshlq_m_n_s8): Likewise.
17186 (__arm_vqnegq_m_s8): Likewise.
17187 (__arm_vqabsq_m_s8): Likewise.
17188 (__arm_vnegq_m_s8): Likewise.
17189 (__arm_vmvnq_m_s8): Likewise.
17190 (__arm_vmlsdavxq_p_s8): Likewise.
17191 (__arm_vmlsdavq_p_s8): Likewise.
17192 (__arm_vmladavxq_p_s8): Likewise.
17193 (__arm_vmladavq_p_s8): Likewise.
17194 (__arm_vminvq_p_s8): Likewise.
17195 (__arm_vmaxvq_p_s8): Likewise.
17196 (__arm_vdupq_m_n_s8): Likewise.
17197 (__arm_vclzq_m_s8): Likewise.
17198 (__arm_vclsq_m_s8): Likewise.
17199 (__arm_vaddvaq_p_s8): Likewise.
17200 (__arm_vabsq_m_s8): Likewise.
17201 (__arm_vqrdmlsdhxq_s8): Likewise.
17202 (__arm_vqrdmlsdhq_s8): Likewise.
17203 (__arm_vqrdmlashq_n_s8): Likewise.
17204 (__arm_vqrdmlahq_n_s8): Likewise.
17205 (__arm_vqrdmladhxq_s8): Likewise.
17206 (__arm_vqrdmladhq_s8): Likewise.
17207 (__arm_vqdmlsdhxq_s8): Likewise.
17208 (__arm_vqdmlsdhq_s8): Likewise.
17209 (__arm_vqdmlahq_n_s8): Likewise.
17210 (__arm_vqdmladhxq_s8): Likewise.
17211 (__arm_vqdmladhq_s8): Likewise.
17212 (__arm_vmlsdavaxq_s8): Likewise.
17213 (__arm_vmlsdavaq_s8): Likewise.
17214 (__arm_vmlasq_n_s8): Likewise.
17215 (__arm_vmlaq_n_s8): Likewise.
17216 (__arm_vmladavaxq_s8): Likewise.
17217 (__arm_vmladavaq_s8): Likewise.
17218 (__arm_vsriq_n_s8): Likewise.
17219 (__arm_vsliq_n_s8): Likewise.
17220 (__arm_vpselq_u16): Likewise.
17221 (__arm_vpselq_s16): Likewise.
17222 (__arm_vrev64q_m_u16): Likewise.
17223 (__arm_vqrdmlashq_n_u16): Likewise.
17224 (__arm_vqrdmlahq_n_u16): Likewise.
17225 (__arm_vqdmlahq_n_u16): Likewise.
17226 (__arm_vmvnq_m_u16): Likewise.
17227 (__arm_vmlasq_n_u16): Likewise.
17228 (__arm_vmlaq_n_u16): Likewise.
17229 (__arm_vmladavq_p_u16): Likewise.
17230 (__arm_vmladavaq_u16): Likewise.
17231 (__arm_vminvq_p_u16): Likewise.
17232 (__arm_vmaxvq_p_u16): Likewise.
17233 (__arm_vdupq_m_n_u16): Likewise.
17234 (__arm_vcmpneq_m_u16): Likewise.
17235 (__arm_vcmpneq_m_n_u16): Likewise.
17236 (__arm_vcmphiq_m_u16): Likewise.
17237 (__arm_vcmphiq_m_n_u16): Likewise.
17238 (__arm_vcmpeqq_m_u16): Likewise.
17239 (__arm_vcmpeqq_m_n_u16): Likewise.
17240 (__arm_vcmpcsq_m_u16): Likewise.
17241 (__arm_vcmpcsq_m_n_u16): Likewise.
17242 (__arm_vclzq_m_u16): Likewise.
17243 (__arm_vaddvaq_p_u16): Likewise.
17244 (__arm_vsriq_n_u16): Likewise.
17245 (__arm_vsliq_n_u16): Likewise.
17246 (__arm_vshlq_m_r_u16): Likewise.
17247 (__arm_vrshlq_m_n_u16): Likewise.
17248 (__arm_vqshlq_m_r_u16): Likewise.
17249 (__arm_vqrshlq_m_n_u16): Likewise.
17250 (__arm_vminavq_p_s16): Likewise.
17251 (__arm_vminaq_m_s16): Likewise.
17252 (__arm_vmaxavq_p_s16): Likewise.
17253 (__arm_vmaxaq_m_s16): Likewise.
17254 (__arm_vcmpneq_m_s16): Likewise.
17255 (__arm_vcmpneq_m_n_s16): Likewise.
17256 (__arm_vcmpltq_m_s16): Likewise.
17257 (__arm_vcmpltq_m_n_s16): Likewise.
17258 (__arm_vcmpleq_m_s16): Likewise.
17259 (__arm_vcmpleq_m_n_s16): Likewise.
17260 (__arm_vcmpgtq_m_s16): Likewise.
17261 (__arm_vcmpgtq_m_n_s16): Likewise.
17262 (__arm_vcmpgeq_m_s16): Likewise.
17263 (__arm_vcmpgeq_m_n_s16): Likewise.
17264 (__arm_vcmpeqq_m_s16): Likewise.
17265 (__arm_vcmpeqq_m_n_s16): Likewise.
17266 (__arm_vshlq_m_r_s16): Likewise.
17267 (__arm_vrshlq_m_n_s16): Likewise.
17268 (__arm_vrev64q_m_s16): Likewise.
17269 (__arm_vqshlq_m_r_s16): Likewise.
17270 (__arm_vqrshlq_m_n_s16): Likewise.
17271 (__arm_vqnegq_m_s16): Likewise.
17272 (__arm_vqabsq_m_s16): Likewise.
17273 (__arm_vnegq_m_s16): Likewise.
17274 (__arm_vmvnq_m_s16): Likewise.
17275 (__arm_vmlsdavxq_p_s16): Likewise.
17276 (__arm_vmlsdavq_p_s16): Likewise.
17277 (__arm_vmladavxq_p_s16): Likewise.
17278 (__arm_vmladavq_p_s16): Likewise.
17279 (__arm_vminvq_p_s16): Likewise.
17280 (__arm_vmaxvq_p_s16): Likewise.
17281 (__arm_vdupq_m_n_s16): Likewise.
17282 (__arm_vclzq_m_s16): Likewise.
17283 (__arm_vclsq_m_s16): Likewise.
17284 (__arm_vaddvaq_p_s16): Likewise.
17285 (__arm_vabsq_m_s16): Likewise.
17286 (__arm_vqrdmlsdhxq_s16): Likewise.
17287 (__arm_vqrdmlsdhq_s16): Likewise.
17288 (__arm_vqrdmlashq_n_s16): Likewise.
17289 (__arm_vqrdmlahq_n_s16): Likewise.
17290 (__arm_vqrdmladhxq_s16): Likewise.
17291 (__arm_vqrdmladhq_s16): Likewise.
17292 (__arm_vqdmlsdhxq_s16): Likewise.
17293 (__arm_vqdmlsdhq_s16): Likewise.
17294 (__arm_vqdmlahq_n_s16): Likewise.
17295 (__arm_vqdmladhxq_s16): Likewise.
17296 (__arm_vqdmladhq_s16): Likewise.
17297 (__arm_vmlsdavaxq_s16): Likewise.
17298 (__arm_vmlsdavaq_s16): Likewise.
17299 (__arm_vmlasq_n_s16): Likewise.
17300 (__arm_vmlaq_n_s16): Likewise.
17301 (__arm_vmladavaxq_s16): Likewise.
17302 (__arm_vmladavaq_s16): Likewise.
17303 (__arm_vsriq_n_s16): Likewise.
17304 (__arm_vsliq_n_s16): Likewise.
17305 (__arm_vpselq_u32): Likewise.
17306 (__arm_vpselq_s32): Likewise.
17307 (__arm_vrev64q_m_u32): Likewise.
17308 (__arm_vqrdmlashq_n_u32): Likewise.
17309 (__arm_vqrdmlahq_n_u32): Likewise.
17310 (__arm_vqdmlahq_n_u32): Likewise.
17311 (__arm_vmvnq_m_u32): Likewise.
17312 (__arm_vmlasq_n_u32): Likewise.
17313 (__arm_vmlaq_n_u32): Likewise.
17314 (__arm_vmladavq_p_u32): Likewise.
17315 (__arm_vmladavaq_u32): Likewise.
17316 (__arm_vminvq_p_u32): Likewise.
17317 (__arm_vmaxvq_p_u32): Likewise.
17318 (__arm_vdupq_m_n_u32): Likewise.
17319 (__arm_vcmpneq_m_u32): Likewise.
17320 (__arm_vcmpneq_m_n_u32): Likewise.
17321 (__arm_vcmphiq_m_u32): Likewise.
17322 (__arm_vcmphiq_m_n_u32): Likewise.
17323 (__arm_vcmpeqq_m_u32): Likewise.
17324 (__arm_vcmpeqq_m_n_u32): Likewise.
17325 (__arm_vcmpcsq_m_u32): Likewise.
17326 (__arm_vcmpcsq_m_n_u32): Likewise.
17327 (__arm_vclzq_m_u32): Likewise.
17328 (__arm_vaddvaq_p_u32): Likewise.
17329 (__arm_vsriq_n_u32): Likewise.
17330 (__arm_vsliq_n_u32): Likewise.
17331 (__arm_vshlq_m_r_u32): Likewise.
17332 (__arm_vrshlq_m_n_u32): Likewise.
17333 (__arm_vqshlq_m_r_u32): Likewise.
17334 (__arm_vqrshlq_m_n_u32): Likewise.
17335 (__arm_vminavq_p_s32): Likewise.
17336 (__arm_vminaq_m_s32): Likewise.
17337 (__arm_vmaxavq_p_s32): Likewise.
17338 (__arm_vmaxaq_m_s32): Likewise.
17339 (__arm_vcmpneq_m_s32): Likewise.
17340 (__arm_vcmpneq_m_n_s32): Likewise.
17341 (__arm_vcmpltq_m_s32): Likewise.
17342 (__arm_vcmpltq_m_n_s32): Likewise.
17343 (__arm_vcmpleq_m_s32): Likewise.
17344 (__arm_vcmpleq_m_n_s32): Likewise.
17345 (__arm_vcmpgtq_m_s32): Likewise.
17346 (__arm_vcmpgtq_m_n_s32): Likewise.
17347 (__arm_vcmpgeq_m_s32): Likewise.
17348 (__arm_vcmpgeq_m_n_s32): Likewise.
17349 (__arm_vcmpeqq_m_s32): Likewise.
17350 (__arm_vcmpeqq_m_n_s32): Likewise.
17351 (__arm_vshlq_m_r_s32): Likewise.
17352 (__arm_vrshlq_m_n_s32): Likewise.
17353 (__arm_vrev64q_m_s32): Likewise.
17354 (__arm_vqshlq_m_r_s32): Likewise.
17355 (__arm_vqrshlq_m_n_s32): Likewise.
17356 (__arm_vqnegq_m_s32): Likewise.
17357 (__arm_vqabsq_m_s32): Likewise.
17358 (__arm_vnegq_m_s32): Likewise.
17359 (__arm_vmvnq_m_s32): Likewise.
17360 (__arm_vmlsdavxq_p_s32): Likewise.
17361 (__arm_vmlsdavq_p_s32): Likewise.
17362 (__arm_vmladavxq_p_s32): Likewise.
17363 (__arm_vmladavq_p_s32): Likewise.
17364 (__arm_vminvq_p_s32): Likewise.
17365 (__arm_vmaxvq_p_s32): Likewise.
17366 (__arm_vdupq_m_n_s32): Likewise.
17367 (__arm_vclzq_m_s32): Likewise.
17368 (__arm_vclsq_m_s32): Likewise.
17369 (__arm_vaddvaq_p_s32): Likewise.
17370 (__arm_vabsq_m_s32): Likewise.
17371 (__arm_vqrdmlsdhxq_s32): Likewise.
17372 (__arm_vqrdmlsdhq_s32): Likewise.
17373 (__arm_vqrdmlashq_n_s32): Likewise.
17374 (__arm_vqrdmlahq_n_s32): Likewise.
17375 (__arm_vqrdmladhxq_s32): Likewise.
17376 (__arm_vqrdmladhq_s32): Likewise.
17377 (__arm_vqdmlsdhxq_s32): Likewise.
17378 (__arm_vqdmlsdhq_s32): Likewise.
17379 (__arm_vqdmlahq_n_s32): Likewise.
17380 (__arm_vqdmladhxq_s32): Likewise.
17381 (__arm_vqdmladhq_s32): Likewise.
17382 (__arm_vmlsdavaxq_s32): Likewise.
17383 (__arm_vmlsdavaq_s32): Likewise.
17384 (__arm_vmlasq_n_s32): Likewise.
17385 (__arm_vmlaq_n_s32): Likewise.
17386 (__arm_vmladavaxq_s32): Likewise.
17387 (__arm_vmladavaq_s32): Likewise.
17388 (__arm_vsriq_n_s32): Likewise.
17389 (__arm_vsliq_n_s32): Likewise.
17390 (__arm_vpselq_u64): Likewise.
17391 (__arm_vpselq_s64): Likewise.
17392 (vcmpneq_m_n): Define polymorphic variant.
17393 (vcmpneq_m): Likewise.
17394 (vqrdmlsdhq): Likewise.
17395 (vqrdmlsdhxq): Likewise.
17396 (vqrshlq_m_n): Likewise.
17397 (vqshlq_m_r): Likewise.
17398 (vrev64q_m): Likewise.
17399 (vrshlq_m_n): Likewise.
17400 (vshlq_m_r): Likewise.
17401 (vsliq_n): Likewise.
17402 (vsriq_n): Likewise.
17403 (vqrdmlashq_n): Likewise.
17404 (vqrdmlahq): Likewise.
17405 (vqrdmladhxq): Likewise.
17406 (vqrdmladhq): Likewise.
17407 (vqnegq_m): Likewise.
17408 (vqdmlsdhxq): Likewise.
17409 (vabsq_m): Likewise.
17410 (vclsq_m): Likewise.
17411 (vclzq_m): Likewise.
17412 (vcmpgeq_m): Likewise.
17413 (vcmpgeq_m_n): Likewise.
17414 (vdupq_m_n): Likewise.
17415 (vmaxaq_m): Likewise.
17416 (vmlaq_n): Likewise.
17417 (vmlasq_n): Likewise.
17418 (vmvnq_m): Likewise.
17419 (vnegq_m): Likewise.
17420 (vpselq): Likewise.
17421 (vqdmlahq_n): Likewise.
17422 (vqrdmlahq_n): Likewise.
17423 (vqdmlsdhq): Likewise.
17424 (vqdmladhq): Likewise.
17425 (vqabsq_m): Likewise.
17426 (vminaq_m): Likewise.
17427 (vrmlaldavhaq): Likewise.
17428 (vmlsdavxq_p): Likewise.
17429 (vmlsdavq_p): Likewise.
17430 (vmlsdavaxq): Likewise.
17431 (vmlsdavaq): Likewise.
17432 (vaddvaq_p): Likewise.
17433 (vcmpcsq_m_n): Likewise.
17434 (vcmpcsq_m): Likewise.
17435 (vcmpeqq_m_n): Likewise.
17436 (vcmpeqq_m): Likewise.
17437 (vmladavxq_p): Likewise.
17438 (vmladavq_p): Likewise.
17439 (vmladavaxq): Likewise.
17440 (vmladavaq): Likewise.
17441 (vminvq_p): Likewise.
17442 (vminavq_p): Likewise.
17443 (vmaxvq_p): Likewise.
17444 (vmaxavq_p): Likewise.
17445 (vcmpltq_m_n): Likewise.
17446 (vcmpltq_m): Likewise.
17447 (vcmpleq_m): Likewise.
17448 (vcmpleq_m_n): Likewise.
17449 (vcmphiq_m_n): Likewise.
17450 (vcmphiq_m): Likewise.
17451 (vcmpgtq_m_n): Likewise.
17452 (vcmpgtq_m): Likewise.
17453 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
17455 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
17456 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
17457 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
17458 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
17459 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
17460 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
17461 * config/arm/constraints.md (Rc): Define constraint to check constant is
17462 in the range of 0 to 15.
17463 (Re): Define constraint to check constant is in the range of 0 to 31.
17464 * config/arm/mve.md (VADDVAQ_P): Define iterator.
17465 (VCLZQ_M): Likewise.
17466 (VCMPEQQ_M_N): Likewise.
17467 (VCMPEQQ_M): Likewise.
17468 (VCMPNEQ_M_N): Likewise.
17469 (VCMPNEQ_M): Likewise.
17470 (VDUPQ_M_N): Likewise.
17471 (VMAXVQ_P): Likewise.
17472 (VMINVQ_P): Likewise.
17473 (VMLADAVAQ): Likewise.
17474 (VMLADAVQ_P): Likewise.
17475 (VMLAQ_N): Likewise.
17476 (VMLASQ_N): Likewise.
17477 (VMVNQ_M): Likewise.
17478 (VPSELQ): Likewise.
17479 (VQDMLAHQ_N): Likewise.
17480 (VQRDMLAHQ_N): Likewise.
17481 (VQRDMLASHQ_N): Likewise.
17482 (VQRSHLQ_M_N): Likewise.
17483 (VQSHLQ_M_R): Likewise.
17484 (VREV64Q_M): Likewise.
17485 (VRSHLQ_M_N): Likewise.
17486 (VSHLQ_M_R): Likewise.
17487 (VSLIQ_N): Likewise.
17488 (VSRIQ_N): Likewise.
17489 (mve_vabsq_m_s<mode>): Define RTL pattern.
17490 (mve_vaddvaq_p_<supf><mode>): Likewise.
17491 (mve_vclsq_m_s<mode>): Likewise.
17492 (mve_vclzq_m_<supf><mode>): Likewise.
17493 (mve_vcmpcsq_m_n_u<mode>): Likewise.
17494 (mve_vcmpcsq_m_u<mode>): Likewise.
17495 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
17496 (mve_vcmpeqq_m_<supf><mode>): Likewise.
17497 (mve_vcmpgeq_m_n_s<mode>): Likewise.
17498 (mve_vcmpgeq_m_s<mode>): Likewise.
17499 (mve_vcmpgtq_m_n_s<mode>): Likewise.
17500 (mve_vcmpgtq_m_s<mode>): Likewise.
17501 (mve_vcmphiq_m_n_u<mode>): Likewise.
17502 (mve_vcmphiq_m_u<mode>): Likewise.
17503 (mve_vcmpleq_m_n_s<mode>): Likewise.
17504 (mve_vcmpleq_m_s<mode>): Likewise.
17505 (mve_vcmpltq_m_n_s<mode>): Likewise.
17506 (mve_vcmpltq_m_s<mode>): Likewise.
17507 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
17508 (mve_vcmpneq_m_<supf><mode>): Likewise.
17509 (mve_vdupq_m_n_<supf><mode>): Likewise.
17510 (mve_vmaxaq_m_s<mode>): Likewise.
17511 (mve_vmaxavq_p_s<mode>): Likewise.
17512 (mve_vmaxvq_p_<supf><mode>): Likewise.
17513 (mve_vminaq_m_s<mode>): Likewise.
17514 (mve_vminavq_p_s<mode>): Likewise.
17515 (mve_vminvq_p_<supf><mode>): Likewise.
17516 (mve_vmladavaq_<supf><mode>): Likewise.
17517 (mve_vmladavq_p_<supf><mode>): Likewise.
17518 (mve_vmladavxq_p_s<mode>): Likewise.
17519 (mve_vmlaq_n_<supf><mode>): Likewise.
17520 (mve_vmlasq_n_<supf><mode>): Likewise.
17521 (mve_vmlsdavq_p_s<mode>): Likewise.
17522 (mve_vmlsdavxq_p_s<mode>): Likewise.
17523 (mve_vmvnq_m_<supf><mode>): Likewise.
17524 (mve_vnegq_m_s<mode>): Likewise.
17525 (mve_vpselq_<supf><mode>): Likewise.
17526 (mve_vqabsq_m_s<mode>): Likewise.
17527 (mve_vqdmlahq_n_<supf><mode>): Likewise.
17528 (mve_vqnegq_m_s<mode>): Likewise.
17529 (mve_vqrdmladhq_s<mode>): Likewise.
17530 (mve_vqrdmladhxq_s<mode>): Likewise.
17531 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
17532 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
17533 (mve_vqrdmlsdhq_s<mode>): Likewise.
17534 (mve_vqrdmlsdhxq_s<mode>): Likewise.
17535 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
17536 (mve_vqshlq_m_r_<supf><mode>): Likewise.
17537 (mve_vrev64q_m_<supf><mode>): Likewise.
17538 (mve_vrshlq_m_n_<supf><mode>): Likewise.
17539 (mve_vshlq_m_r_<supf><mode>): Likewise.
17540 (mve_vsliq_n_<supf><mode>): Likewise.
17541 (mve_vsriq_n_<supf><mode>): Likewise.
17542 (mve_vqdmlsdhxq_s<mode>): Likewise.
17543 (mve_vqdmlsdhq_s<mode>): Likewise.
17544 (mve_vqdmladhxq_s<mode>): Likewise.
17545 (mve_vqdmladhq_s<mode>): Likewise.
17546 (mve_vmlsdavaxq_s<mode>): Likewise.
17547 (mve_vmlsdavaq_s<mode>): Likewise.
17548 (mve_vmladavaxq_s<mode>): Likewise.
17549 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
17550 matching constraint Rc.
17551 (mve_imm_31): Define predicate to check the matching constraint Re.
17553 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
17555 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
17556 (vec_cmp<mode>di_dup): Likewise.
17557 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
17559 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
17561 * config/gcn/gcn-valu.md (COND_MODE): Delete.
17562 (COND_INT_MODE): Delete.
17563 (cond_op): Add "mult".
17564 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
17565 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
17567 2020-03-18 Richard Biener <rguenther@suse.de>
17569 PR middle-end/94206
17570 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
17571 partial int modes or not mode-precision integer types for
17574 2020-03-18 Jakub Jelinek <jakub@redhat.com>
17576 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
17578 * config/arc/arc.c (frame_stack_add): Likewise.
17579 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
17581 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
17582 * tree-ssa-strlen.h (handle_printf_call): Likewise.
17583 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
17584 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
17586 2020-03-18 Duan bo <duanbo3@huawei.com>
17589 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
17590 (@ldr_got_tiny_<mode>): New pattern.
17591 (ldr_got_tiny_sidi): Likewise.
17592 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
17593 them to handle SYMBOL_TINY_GOT for ILP32.
17595 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
17597 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
17598 call-preserved for SVE PCS functions.
17599 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
17600 Optimize the case in which there are no following vector save slots.
17602 2020-03-18 Richard Biener <rguenther@suse.de>
17604 PR middle-end/94188
17605 * fold-const.c (build_fold_addr_expr): Convert address to
17607 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
17608 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
17609 to build the ADDR_EXPR which we don't really want to simplify.
17610 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
17611 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
17612 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
17613 (simplify_builtin_call): Strip useless type conversions.
17614 * tree-ssa-strlen.c (new_strinfo): Likewise.
17616 2020-03-17 Alexey Neyman <stilor@att.net>
17619 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
17620 the debug level is terse and the declaration is public. Do not
17621 generate type info.
17622 (dwarf2out_decl): Same.
17623 (add_type_attribute): Return immediately if debug level is
17626 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
17628 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
17630 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17631 Mihail Ionescu <mihail.ionescu@arm.com>
17632 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17634 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
17635 Define qualifier for ternary operands.
17636 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
17637 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17638 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17639 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
17640 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
17641 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
17642 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17643 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
17644 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17645 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
17646 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
17647 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17648 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
17649 * config/arm/arm_mve.h (vabavq_s8): Define macro.
17650 (vabavq_s16): Likewise.
17651 (vabavq_s32): Likewise.
17652 (vbicq_m_n_s16): Likewise.
17653 (vbicq_m_n_s32): Likewise.
17654 (vbicq_m_n_u16): Likewise.
17655 (vbicq_m_n_u32): Likewise.
17656 (vcmpeqq_m_f16): Likewise.
17657 (vcmpeqq_m_f32): Likewise.
17658 (vcvtaq_m_s16_f16): Likewise.
17659 (vcvtaq_m_u16_f16): Likewise.
17660 (vcvtaq_m_s32_f32): Likewise.
17661 (vcvtaq_m_u32_f32): Likewise.
17662 (vcvtq_m_f16_s16): Likewise.
17663 (vcvtq_m_f16_u16): Likewise.
17664 (vcvtq_m_f32_s32): Likewise.
17665 (vcvtq_m_f32_u32): Likewise.
17666 (vqrshrnbq_n_s16): Likewise.
17667 (vqrshrnbq_n_u16): Likewise.
17668 (vqrshrnbq_n_s32): Likewise.
17669 (vqrshrnbq_n_u32): Likewise.
17670 (vqrshrunbq_n_s16): Likewise.
17671 (vqrshrunbq_n_s32): Likewise.
17672 (vrmlaldavhaq_s32): Likewise.
17673 (vrmlaldavhaq_u32): Likewise.
17674 (vshlcq_s8): Likewise.
17675 (vshlcq_u8): Likewise.
17676 (vshlcq_s16): Likewise.
17677 (vshlcq_u16): Likewise.
17678 (vshlcq_s32): Likewise.
17679 (vshlcq_u32): Likewise.
17680 (vabavq_u8): Likewise.
17681 (vabavq_u16): Likewise.
17682 (vabavq_u32): Likewise.
17683 (__arm_vabavq_s8): Define intrinsic.
17684 (__arm_vabavq_s16): Likewise.
17685 (__arm_vabavq_s32): Likewise.
17686 (__arm_vabavq_u8): Likewise.
17687 (__arm_vabavq_u16): Likewise.
17688 (__arm_vabavq_u32): Likewise.
17689 (__arm_vbicq_m_n_s16): Likewise.
17690 (__arm_vbicq_m_n_s32): Likewise.
17691 (__arm_vbicq_m_n_u16): Likewise.
17692 (__arm_vbicq_m_n_u32): Likewise.
17693 (__arm_vqrshrnbq_n_s16): Likewise.
17694 (__arm_vqrshrnbq_n_u16): Likewise.
17695 (__arm_vqrshrnbq_n_s32): Likewise.
17696 (__arm_vqrshrnbq_n_u32): Likewise.
17697 (__arm_vqrshrunbq_n_s16): Likewise.
17698 (__arm_vqrshrunbq_n_s32): Likewise.
17699 (__arm_vrmlaldavhaq_s32): Likewise.
17700 (__arm_vrmlaldavhaq_u32): Likewise.
17701 (__arm_vshlcq_s8): Likewise.
17702 (__arm_vshlcq_u8): Likewise.
17703 (__arm_vshlcq_s16): Likewise.
17704 (__arm_vshlcq_u16): Likewise.
17705 (__arm_vshlcq_s32): Likewise.
17706 (__arm_vshlcq_u32): Likewise.
17707 (__arm_vcmpeqq_m_f16): Likewise.
17708 (__arm_vcmpeqq_m_f32): Likewise.
17709 (__arm_vcvtaq_m_s16_f16): Likewise.
17710 (__arm_vcvtaq_m_u16_f16): Likewise.
17711 (__arm_vcvtaq_m_s32_f32): Likewise.
17712 (__arm_vcvtaq_m_u32_f32): Likewise.
17713 (__arm_vcvtq_m_f16_s16): Likewise.
17714 (__arm_vcvtq_m_f16_u16): Likewise.
17715 (__arm_vcvtq_m_f32_s32): Likewise.
17716 (__arm_vcvtq_m_f32_u32): Likewise.
17717 (vcvtaq_m): Define polymorphic variant.
17718 (vcvtq_m): Likewise.
17719 (vabavq): Likewise.
17720 (vshlcq): Likewise.
17721 (vbicq_m_n): Likewise.
17722 (vqrshrnbq_n): Likewise.
17723 (vqrshrunbq_n): Likewise.
17724 * config/arm/arm_mve_builtins.def
17725 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
17726 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
17727 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17728 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17729 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
17730 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
17731 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
17732 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17733 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
17734 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17735 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
17736 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
17737 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17738 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
17739 * config/arm/mve.md (VBICQ_M_N): Define iterator.
17740 (VCVTAQ_M): Likewise.
17741 (VCVTQ_M_TO_F): Likewise.
17742 (VQRSHRNBQ_N): Likewise.
17743 (VABAVQ): Likewise.
17744 (VSHLCQ): Likewise.
17745 (VRMLALDAVHAQ): Likewise.
17746 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
17747 (mve_vcmpeqq_m_f<mode>): Likewise.
17748 (mve_vcvtaq_m_<supf><mode>): Likewise.
17749 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
17750 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
17751 (mve_vqrshrunbq_n_s<mode>): Likewise.
17752 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
17753 (mve_vabavq_<supf><mode>): Likewise.
17754 (mve_vshlcq_<supf><mode>): Likewise.
17755 (mve_vshlcq_<supf><mode>): Likewise.
17756 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
17757 (mve_vshlcq_carry_<supf><mode>): Likewise.
17759 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17760 Mihail Ionescu <mihail.ionescu@arm.com>
17761 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17763 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
17764 (vqmovnbq_u16): Likewise.
17765 (vmulltq_poly_p8): Likewise.
17766 (vmullbq_poly_p8): Likewise.
17767 (vmovntq_u16): Likewise.
17768 (vmovnbq_u16): Likewise.
17769 (vmlaldavxq_u16): Likewise.
17770 (vmlaldavq_u16): Likewise.
17771 (vqmovuntq_s16): Likewise.
17772 (vqmovunbq_s16): Likewise.
17773 (vshlltq_n_u8): Likewise.
17774 (vshllbq_n_u8): Likewise.
17775 (vorrq_n_u16): Likewise.
17776 (vbicq_n_u16): Likewise.
17777 (vcmpneq_n_f16): Likewise.
17778 (vcmpneq_f16): Likewise.
17779 (vcmpltq_n_f16): Likewise.
17780 (vcmpltq_f16): Likewise.
17781 (vcmpleq_n_f16): Likewise.
17782 (vcmpleq_f16): Likewise.
17783 (vcmpgtq_n_f16): Likewise.
17784 (vcmpgtq_f16): Likewise.
17785 (vcmpgeq_n_f16): Likewise.
17786 (vcmpgeq_f16): Likewise.
17787 (vcmpeqq_n_f16): Likewise.
17788 (vcmpeqq_f16): Likewise.
17789 (vsubq_f16): Likewise.
17790 (vqmovntq_s16): Likewise.
17791 (vqmovnbq_s16): Likewise.
17792 (vqdmulltq_s16): Likewise.
17793 (vqdmulltq_n_s16): Likewise.
17794 (vqdmullbq_s16): Likewise.
17795 (vqdmullbq_n_s16): Likewise.
17796 (vorrq_f16): Likewise.
17797 (vornq_f16): Likewise.
17798 (vmulq_n_f16): Likewise.
17799 (vmulq_f16): Likewise.
17800 (vmovntq_s16): Likewise.
17801 (vmovnbq_s16): Likewise.
17802 (vmlsldavxq_s16): Likewise.
17803 (vmlsldavq_s16): Likewise.
17804 (vmlaldavxq_s16): Likewise.
17805 (vmlaldavq_s16): Likewise.
17806 (vminnmvq_f16): Likewise.
17807 (vminnmq_f16): Likewise.
17808 (vminnmavq_f16): Likewise.
17809 (vminnmaq_f16): Likewise.
17810 (vmaxnmvq_f16): Likewise.
17811 (vmaxnmq_f16): Likewise.
17812 (vmaxnmavq_f16): Likewise.
17813 (vmaxnmaq_f16): Likewise.
17814 (veorq_f16): Likewise.
17815 (vcmulq_rot90_f16): Likewise.
17816 (vcmulq_rot270_f16): Likewise.
17817 (vcmulq_rot180_f16): Likewise.
17818 (vcmulq_f16): Likewise.
17819 (vcaddq_rot90_f16): Likewise.
17820 (vcaddq_rot270_f16): Likewise.
17821 (vbicq_f16): Likewise.
17822 (vandq_f16): Likewise.
17823 (vaddq_n_f16): Likewise.
17824 (vabdq_f16): Likewise.
17825 (vshlltq_n_s8): Likewise.
17826 (vshllbq_n_s8): Likewise.
17827 (vorrq_n_s16): Likewise.
17828 (vbicq_n_s16): Likewise.
17829 (vqmovntq_u32): Likewise.
17830 (vqmovnbq_u32): Likewise.
17831 (vmulltq_poly_p16): Likewise.
17832 (vmullbq_poly_p16): Likewise.
17833 (vmovntq_u32): Likewise.
17834 (vmovnbq_u32): Likewise.
17835 (vmlaldavxq_u32): Likewise.
17836 (vmlaldavq_u32): Likewise.
17837 (vqmovuntq_s32): Likewise.
17838 (vqmovunbq_s32): Likewise.
17839 (vshlltq_n_u16): Likewise.
17840 (vshllbq_n_u16): Likewise.
17841 (vorrq_n_u32): Likewise.
17842 (vbicq_n_u32): Likewise.
17843 (vcmpneq_n_f32): Likewise.
17844 (vcmpneq_f32): Likewise.
17845 (vcmpltq_n_f32): Likewise.
17846 (vcmpltq_f32): Likewise.
17847 (vcmpleq_n_f32): Likewise.
17848 (vcmpleq_f32): Likewise.
17849 (vcmpgtq_n_f32): Likewise.
17850 (vcmpgtq_f32): Likewise.
17851 (vcmpgeq_n_f32): Likewise.
17852 (vcmpgeq_f32): Likewise.
17853 (vcmpeqq_n_f32): Likewise.
17854 (vcmpeqq_f32): Likewise.
17855 (vsubq_f32): Likewise.
17856 (vqmovntq_s32): Likewise.
17857 (vqmovnbq_s32): Likewise.
17858 (vqdmulltq_s32): Likewise.
17859 (vqdmulltq_n_s32): Likewise.
17860 (vqdmullbq_s32): Likewise.
17861 (vqdmullbq_n_s32): Likewise.
17862 (vorrq_f32): Likewise.
17863 (vornq_f32): Likewise.
17864 (vmulq_n_f32): Likewise.
17865 (vmulq_f32): Likewise.
17866 (vmovntq_s32): Likewise.
17867 (vmovnbq_s32): Likewise.
17868 (vmlsldavxq_s32): Likewise.
17869 (vmlsldavq_s32): Likewise.
17870 (vmlaldavxq_s32): Likewise.
17871 (vmlaldavq_s32): Likewise.
17872 (vminnmvq_f32): Likewise.
17873 (vminnmq_f32): Likewise.
17874 (vminnmavq_f32): Likewise.
17875 (vminnmaq_f32): Likewise.
17876 (vmaxnmvq_f32): Likewise.
17877 (vmaxnmq_f32): Likewise.
17878 (vmaxnmavq_f32): Likewise.
17879 (vmaxnmaq_f32): Likewise.
17880 (veorq_f32): Likewise.
17881 (vcmulq_rot90_f32): Likewise.
17882 (vcmulq_rot270_f32): Likewise.
17883 (vcmulq_rot180_f32): Likewise.
17884 (vcmulq_f32): Likewise.
17885 (vcaddq_rot90_f32): Likewise.
17886 (vcaddq_rot270_f32): Likewise.
17887 (vbicq_f32): Likewise.
17888 (vandq_f32): Likewise.
17889 (vaddq_n_f32): Likewise.
17890 (vabdq_f32): Likewise.
17891 (vshlltq_n_s16): Likewise.
17892 (vshllbq_n_s16): Likewise.
17893 (vorrq_n_s32): Likewise.
17894 (vbicq_n_s32): Likewise.
17895 (vrmlaldavhq_u32): Likewise.
17896 (vctp8q_m): Likewise.
17897 (vctp64q_m): Likewise.
17898 (vctp32q_m): Likewise.
17899 (vctp16q_m): Likewise.
17900 (vaddlvaq_u32): Likewise.
17901 (vrmlsldavhxq_s32): Likewise.
17902 (vrmlsldavhq_s32): Likewise.
17903 (vrmlaldavhxq_s32): Likewise.
17904 (vrmlaldavhq_s32): Likewise.
17905 (vcvttq_f16_f32): Likewise.
17906 (vcvtbq_f16_f32): Likewise.
17907 (vaddlvaq_s32): Likewise.
17908 (__arm_vqmovntq_u16): Define intrinsic.
17909 (__arm_vqmovnbq_u16): Likewise.
17910 (__arm_vmulltq_poly_p8): Likewise.
17911 (__arm_vmullbq_poly_p8): Likewise.
17912 (__arm_vmovntq_u16): Likewise.
17913 (__arm_vmovnbq_u16): Likewise.
17914 (__arm_vmlaldavxq_u16): Likewise.
17915 (__arm_vmlaldavq_u16): Likewise.
17916 (__arm_vqmovuntq_s16): Likewise.
17917 (__arm_vqmovunbq_s16): Likewise.
17918 (__arm_vshlltq_n_u8): Likewise.
17919 (__arm_vshllbq_n_u8): Likewise.
17920 (__arm_vorrq_n_u16): Likewise.
17921 (__arm_vbicq_n_u16): Likewise.
17922 (__arm_vcmpneq_n_f16): Likewise.
17923 (__arm_vcmpneq_f16): Likewise.
17924 (__arm_vcmpltq_n_f16): Likewise.
17925 (__arm_vcmpltq_f16): Likewise.
17926 (__arm_vcmpleq_n_f16): Likewise.
17927 (__arm_vcmpleq_f16): Likewise.
17928 (__arm_vcmpgtq_n_f16): Likewise.
17929 (__arm_vcmpgtq_f16): Likewise.
17930 (__arm_vcmpgeq_n_f16): Likewise.
17931 (__arm_vcmpgeq_f16): Likewise.
17932 (__arm_vcmpeqq_n_f16): Likewise.
17933 (__arm_vcmpeqq_f16): Likewise.
17934 (__arm_vsubq_f16): Likewise.
17935 (__arm_vqmovntq_s16): Likewise.
17936 (__arm_vqmovnbq_s16): Likewise.
17937 (__arm_vqdmulltq_s16): Likewise.
17938 (__arm_vqdmulltq_n_s16): Likewise.
17939 (__arm_vqdmullbq_s16): Likewise.
17940 (__arm_vqdmullbq_n_s16): Likewise.
17941 (__arm_vorrq_f16): Likewise.
17942 (__arm_vornq_f16): Likewise.
17943 (__arm_vmulq_n_f16): Likewise.
17944 (__arm_vmulq_f16): Likewise.
17945 (__arm_vmovntq_s16): Likewise.
17946 (__arm_vmovnbq_s16): Likewise.
17947 (__arm_vmlsldavxq_s16): Likewise.
17948 (__arm_vmlsldavq_s16): Likewise.
17949 (__arm_vmlaldavxq_s16): Likewise.
17950 (__arm_vmlaldavq_s16): Likewise.
17951 (__arm_vminnmvq_f16): Likewise.
17952 (__arm_vminnmq_f16): Likewise.
17953 (__arm_vminnmavq_f16): Likewise.
17954 (__arm_vminnmaq_f16): Likewise.
17955 (__arm_vmaxnmvq_f16): Likewise.
17956 (__arm_vmaxnmq_f16): Likewise.
17957 (__arm_vmaxnmavq_f16): Likewise.
17958 (__arm_vmaxnmaq_f16): Likewise.
17959 (__arm_veorq_f16): Likewise.
17960 (__arm_vcmulq_rot90_f16): Likewise.
17961 (__arm_vcmulq_rot270_f16): Likewise.
17962 (__arm_vcmulq_rot180_f16): Likewise.
17963 (__arm_vcmulq_f16): Likewise.
17964 (__arm_vcaddq_rot90_f16): Likewise.
17965 (__arm_vcaddq_rot270_f16): Likewise.
17966 (__arm_vbicq_f16): Likewise.
17967 (__arm_vandq_f16): Likewise.
17968 (__arm_vaddq_n_f16): Likewise.
17969 (__arm_vabdq_f16): Likewise.
17970 (__arm_vshlltq_n_s8): Likewise.
17971 (__arm_vshllbq_n_s8): Likewise.
17972 (__arm_vorrq_n_s16): Likewise.
17973 (__arm_vbicq_n_s16): Likewise.
17974 (__arm_vqmovntq_u32): Likewise.
17975 (__arm_vqmovnbq_u32): Likewise.
17976 (__arm_vmulltq_poly_p16): Likewise.
17977 (__arm_vmullbq_poly_p16): Likewise.
17978 (__arm_vmovntq_u32): Likewise.
17979 (__arm_vmovnbq_u32): Likewise.
17980 (__arm_vmlaldavxq_u32): Likewise.
17981 (__arm_vmlaldavq_u32): Likewise.
17982 (__arm_vqmovuntq_s32): Likewise.
17983 (__arm_vqmovunbq_s32): Likewise.
17984 (__arm_vshlltq_n_u16): Likewise.
17985 (__arm_vshllbq_n_u16): Likewise.
17986 (__arm_vorrq_n_u32): Likewise.
17987 (__arm_vbicq_n_u32): Likewise.
17988 (__arm_vcmpneq_n_f32): Likewise.
17989 (__arm_vcmpneq_f32): Likewise.
17990 (__arm_vcmpltq_n_f32): Likewise.
17991 (__arm_vcmpltq_f32): Likewise.
17992 (__arm_vcmpleq_n_f32): Likewise.
17993 (__arm_vcmpleq_f32): Likewise.
17994 (__arm_vcmpgtq_n_f32): Likewise.
17995 (__arm_vcmpgtq_f32): Likewise.
17996 (__arm_vcmpgeq_n_f32): Likewise.
17997 (__arm_vcmpgeq_f32): Likewise.
17998 (__arm_vcmpeqq_n_f32): Likewise.
17999 (__arm_vcmpeqq_f32): Likewise.
18000 (__arm_vsubq_f32): Likewise.
18001 (__arm_vqmovntq_s32): Likewise.
18002 (__arm_vqmovnbq_s32): Likewise.
18003 (__arm_vqdmulltq_s32): Likewise.
18004 (__arm_vqdmulltq_n_s32): Likewise.
18005 (__arm_vqdmullbq_s32): Likewise.
18006 (__arm_vqdmullbq_n_s32): Likewise.
18007 (__arm_vorrq_f32): Likewise.
18008 (__arm_vornq_f32): Likewise.
18009 (__arm_vmulq_n_f32): Likewise.
18010 (__arm_vmulq_f32): Likewise.
18011 (__arm_vmovntq_s32): Likewise.
18012 (__arm_vmovnbq_s32): Likewise.
18013 (__arm_vmlsldavxq_s32): Likewise.
18014 (__arm_vmlsldavq_s32): Likewise.
18015 (__arm_vmlaldavxq_s32): Likewise.
18016 (__arm_vmlaldavq_s32): Likewise.
18017 (__arm_vminnmvq_f32): Likewise.
18018 (__arm_vminnmq_f32): Likewise.
18019 (__arm_vminnmavq_f32): Likewise.
18020 (__arm_vminnmaq_f32): Likewise.
18021 (__arm_vmaxnmvq_f32): Likewise.
18022 (__arm_vmaxnmq_f32): Likewise.
18023 (__arm_vmaxnmavq_f32): Likewise.
18024 (__arm_vmaxnmaq_f32): Likewise.
18025 (__arm_veorq_f32): Likewise.
18026 (__arm_vcmulq_rot90_f32): Likewise.
18027 (__arm_vcmulq_rot270_f32): Likewise.
18028 (__arm_vcmulq_rot180_f32): Likewise.
18029 (__arm_vcmulq_f32): Likewise.
18030 (__arm_vcaddq_rot90_f32): Likewise.
18031 (__arm_vcaddq_rot270_f32): Likewise.
18032 (__arm_vbicq_f32): Likewise.
18033 (__arm_vandq_f32): Likewise.
18034 (__arm_vaddq_n_f32): Likewise.
18035 (__arm_vabdq_f32): Likewise.
18036 (__arm_vshlltq_n_s16): Likewise.
18037 (__arm_vshllbq_n_s16): Likewise.
18038 (__arm_vorrq_n_s32): Likewise.
18039 (__arm_vbicq_n_s32): Likewise.
18040 (__arm_vrmlaldavhq_u32): Likewise.
18041 (__arm_vctp8q_m): Likewise.
18042 (__arm_vctp64q_m): Likewise.
18043 (__arm_vctp32q_m): Likewise.
18044 (__arm_vctp16q_m): Likewise.
18045 (__arm_vaddlvaq_u32): Likewise.
18046 (__arm_vrmlsldavhxq_s32): Likewise.
18047 (__arm_vrmlsldavhq_s32): Likewise.
18048 (__arm_vrmlaldavhxq_s32): Likewise.
18049 (__arm_vrmlaldavhq_s32): Likewise.
18050 (__arm_vcvttq_f16_f32): Likewise.
18051 (__arm_vcvtbq_f16_f32): Likewise.
18052 (__arm_vaddlvaq_s32): Likewise.
18053 (vst4q): Define polymorphic variant.
18054 (vrndxq): Likewise.
18056 (vrndpq): Likewise.
18057 (vrndnq): Likewise.
18058 (vrndmq): Likewise.
18059 (vrndaq): Likewise.
18060 (vrev64q): Likewise.
18062 (vdupq_n): Likewise.
18064 (vrev32q): Likewise.
18065 (vcvtbq_f32): Likewise.
18066 (vcvttq_f32): Likewise.
18068 (vsubq_n): Likewise.
18069 (vbrsrq_n): Likewise.
18070 (vcvtq_n): Likewise.
18074 (vaddq_n): Likewise.
18078 (vmulq_n): Likewise.
18080 (vcaddq_rot270): Likewise.
18081 (vcmpeqq_n): Likewise.
18082 (vcmpeqq): Likewise.
18083 (vcaddq_rot90): Likewise.
18084 (vcmpgeq_n): Likewise.
18085 (vcmpgeq): Likewise.
18086 (vcmpgtq_n): Likewise.
18087 (vcmpgtq): Likewise.
18088 (vcmpgtq): Likewise.
18089 (vcmpleq_n): Likewise.
18090 (vcmpleq_n): Likewise.
18091 (vcmpleq): Likewise.
18092 (vcmpleq): Likewise.
18093 (vcmpltq_n): Likewise.
18094 (vcmpltq_n): Likewise.
18095 (vcmpltq): Likewise.
18096 (vcmpltq): Likewise.
18097 (vcmpneq_n): Likewise.
18098 (vcmpneq_n): Likewise.
18099 (vcmpneq): Likewise.
18100 (vcmpneq): Likewise.
18101 (vcmulq): Likewise.
18102 (vcmulq): Likewise.
18103 (vcmulq_rot180): Likewise.
18104 (vcmulq_rot180): Likewise.
18105 (vcmulq_rot270): Likewise.
18106 (vcmulq_rot270): Likewise.
18107 (vcmulq_rot90): Likewise.
18108 (vcmulq_rot90): Likewise.
18111 (vmaxnmaq): Likewise.
18112 (vmaxnmaq): Likewise.
18113 (vmaxnmavq): Likewise.
18114 (vmaxnmavq): Likewise.
18115 (vmaxnmq): Likewise.
18116 (vmaxnmq): Likewise.
18117 (vmaxnmvq): Likewise.
18118 (vmaxnmvq): Likewise.
18119 (vminnmaq): Likewise.
18120 (vminnmaq): Likewise.
18121 (vminnmavq): Likewise.
18122 (vminnmavq): Likewise.
18123 (vminnmq): Likewise.
18124 (vminnmq): Likewise.
18125 (vminnmvq): Likewise.
18126 (vminnmvq): Likewise.
18127 (vbicq_n): Likewise.
18128 (vqmovntq): Likewise.
18129 (vqmovntq): Likewise.
18130 (vqmovnbq): Likewise.
18131 (vqmovnbq): Likewise.
18132 (vmulltq_poly): Likewise.
18133 (vmulltq_poly): Likewise.
18134 (vmullbq_poly): Likewise.
18135 (vmullbq_poly): Likewise.
18136 (vmovntq): Likewise.
18137 (vmovntq): Likewise.
18138 (vmovnbq): Likewise.
18139 (vmovnbq): Likewise.
18140 (vmlaldavxq): Likewise.
18141 (vmlaldavxq): Likewise.
18142 (vqmovuntq): Likewise.
18143 (vqmovuntq): Likewise.
18144 (vshlltq_n): Likewise.
18145 (vshlltq_n): Likewise.
18146 (vshllbq_n): Likewise.
18147 (vshllbq_n): Likewise.
18148 (vorrq_n): Likewise.
18149 (vorrq_n): Likewise.
18150 (vmlaldavq): Likewise.
18151 (vmlaldavq): Likewise.
18152 (vqmovunbq): Likewise.
18153 (vqmovunbq): Likewise.
18154 (vqdmulltq_n): Likewise.
18155 (vqdmulltq_n): Likewise.
18156 (vqdmulltq): Likewise.
18157 (vqdmulltq): Likewise.
18158 (vqdmullbq_n): Likewise.
18159 (vqdmullbq_n): Likewise.
18160 (vqdmullbq): Likewise.
18161 (vqdmullbq): Likewise.
18162 (vaddlvaq): Likewise.
18163 (vaddlvaq): Likewise.
18164 (vrmlaldavhq): Likewise.
18165 (vrmlaldavhq): Likewise.
18166 (vrmlaldavhxq): Likewise.
18167 (vrmlaldavhxq): Likewise.
18168 (vrmlsldavhq): Likewise.
18169 (vrmlsldavhq): Likewise.
18170 (vrmlsldavhxq): Likewise.
18171 (vrmlsldavhxq): Likewise.
18172 (vmlsldavxq): Likewise.
18173 (vmlsldavxq): Likewise.
18174 (vmlsldavq): Likewise.
18175 (vmlsldavq): Likewise.
18176 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
18177 (BINOP_NONE_NONE_NONE): Likewise.
18178 (BINOP_UNONE_NONE_NONE): Likewise.
18179 (BINOP_UNONE_UNONE_IMM): Likewise.
18180 (BINOP_UNONE_UNONE_NONE): Likewise.
18181 (BINOP_UNONE_UNONE_UNONE): Likewise.
18182 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
18183 (mve_vaddlvaq_<supf>v4si): Likewise.
18184 (mve_vaddq_n_f<mode>): Likewise.
18185 (mve_vandq_f<mode>): Likewise.
18186 (mve_vbicq_f<mode>): Likewise.
18187 (mve_vbicq_n_<supf><mode>): Likewise.
18188 (mve_vcaddq_rot270_f<mode>): Likewise.
18189 (mve_vcaddq_rot90_f<mode>): Likewise.
18190 (mve_vcmpeqq_f<mode>): Likewise.
18191 (mve_vcmpeqq_n_f<mode>): Likewise.
18192 (mve_vcmpgeq_f<mode>): Likewise.
18193 (mve_vcmpgeq_n_f<mode>): Likewise.
18194 (mve_vcmpgtq_f<mode>): Likewise.
18195 (mve_vcmpgtq_n_f<mode>): Likewise.
18196 (mve_vcmpleq_f<mode>): Likewise.
18197 (mve_vcmpleq_n_f<mode>): Likewise.
18198 (mve_vcmpltq_f<mode>): Likewise.
18199 (mve_vcmpltq_n_f<mode>): Likewise.
18200 (mve_vcmpneq_f<mode>): Likewise.
18201 (mve_vcmpneq_n_f<mode>): Likewise.
18202 (mve_vcmulq_f<mode>): Likewise.
18203 (mve_vcmulq_rot180_f<mode>): Likewise.
18204 (mve_vcmulq_rot270_f<mode>): Likewise.
18205 (mve_vcmulq_rot90_f<mode>): Likewise.
18206 (mve_vctp<mode1>q_mhi): Likewise.
18207 (mve_vcvtbq_f16_f32v8hf): Likewise.
18208 (mve_vcvttq_f16_f32v8hf): Likewise.
18209 (mve_veorq_f<mode>): Likewise.
18210 (mve_vmaxnmaq_f<mode>): Likewise.
18211 (mve_vmaxnmavq_f<mode>): Likewise.
18212 (mve_vmaxnmq_f<mode>): Likewise.
18213 (mve_vmaxnmvq_f<mode>): Likewise.
18214 (mve_vminnmaq_f<mode>): Likewise.
18215 (mve_vminnmavq_f<mode>): Likewise.
18216 (mve_vminnmq_f<mode>): Likewise.
18217 (mve_vminnmvq_f<mode>): Likewise.
18218 (mve_vmlaldavq_<supf><mode>): Likewise.
18219 (mve_vmlaldavxq_<supf><mode>): Likewise.
18220 (mve_vmlsldavq_s<mode>): Likewise.
18221 (mve_vmlsldavxq_s<mode>): Likewise.
18222 (mve_vmovnbq_<supf><mode>): Likewise.
18223 (mve_vmovntq_<supf><mode>): Likewise.
18224 (mve_vmulq_f<mode>): Likewise.
18225 (mve_vmulq_n_f<mode>): Likewise.
18226 (mve_vornq_f<mode>): Likewise.
18227 (mve_vorrq_f<mode>): Likewise.
18228 (mve_vorrq_n_<supf><mode>): Likewise.
18229 (mve_vqdmullbq_n_s<mode>): Likewise.
18230 (mve_vqdmullbq_s<mode>): Likewise.
18231 (mve_vqdmulltq_n_s<mode>): Likewise.
18232 (mve_vqdmulltq_s<mode>): Likewise.
18233 (mve_vqmovnbq_<supf><mode>): Likewise.
18234 (mve_vqmovntq_<supf><mode>): Likewise.
18235 (mve_vqmovunbq_s<mode>): Likewise.
18236 (mve_vqmovuntq_s<mode>): Likewise.
18237 (mve_vrmlaldavhxq_sv4si): Likewise.
18238 (mve_vrmlsldavhq_sv4si): Likewise.
18239 (mve_vrmlsldavhxq_sv4si): Likewise.
18240 (mve_vshllbq_n_<supf><mode>): Likewise.
18241 (mve_vshlltq_n_<supf><mode>): Likewise.
18242 (mve_vsubq_f<mode>): Likewise.
18243 (mve_vmulltq_poly_p<mode>): Likewise.
18244 (mve_vmullbq_poly_p<mode>): Likewise.
18245 (mve_vrmlaldavhq_<supf>v4si): Likewise.
18247 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18248 Mihail Ionescu <mihail.ionescu@arm.com>
18249 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18251 * config/arm/arm_mve.h (vsubq_u8): Define macro.
18252 (vsubq_n_u8): Likewise.
18253 (vrmulhq_u8): Likewise.
18254 (vrhaddq_u8): Likewise.
18255 (vqsubq_u8): Likewise.
18256 (vqsubq_n_u8): Likewise.
18257 (vqaddq_u8): Likewise.
18258 (vqaddq_n_u8): Likewise.
18259 (vorrq_u8): Likewise.
18260 (vornq_u8): Likewise.
18261 (vmulq_u8): Likewise.
18262 (vmulq_n_u8): Likewise.
18263 (vmulltq_int_u8): Likewise.
18264 (vmullbq_int_u8): Likewise.
18265 (vmulhq_u8): Likewise.
18266 (vmladavq_u8): Likewise.
18267 (vminvq_u8): Likewise.
18268 (vminq_u8): Likewise.
18269 (vmaxvq_u8): Likewise.
18270 (vmaxq_u8): Likewise.
18271 (vhsubq_u8): Likewise.
18272 (vhsubq_n_u8): Likewise.
18273 (vhaddq_u8): Likewise.
18274 (vhaddq_n_u8): Likewise.
18275 (veorq_u8): Likewise.
18276 (vcmpneq_n_u8): Likewise.
18277 (vcmphiq_u8): Likewise.
18278 (vcmphiq_n_u8): Likewise.
18279 (vcmpeqq_u8): Likewise.
18280 (vcmpeqq_n_u8): Likewise.
18281 (vcmpcsq_u8): Likewise.
18282 (vcmpcsq_n_u8): Likewise.
18283 (vcaddq_rot90_u8): Likewise.
18284 (vcaddq_rot270_u8): Likewise.
18285 (vbicq_u8): Likewise.
18286 (vandq_u8): Likewise.
18287 (vaddvq_p_u8): Likewise.
18288 (vaddvaq_u8): Likewise.
18289 (vaddq_n_u8): Likewise.
18290 (vabdq_u8): Likewise.
18291 (vshlq_r_u8): Likewise.
18292 (vrshlq_u8): Likewise.
18293 (vrshlq_n_u8): Likewise.
18294 (vqshlq_u8): Likewise.
18295 (vqshlq_r_u8): Likewise.
18296 (vqrshlq_u8): Likewise.
18297 (vqrshlq_n_u8): Likewise.
18298 (vminavq_s8): Likewise.
18299 (vminaq_s8): Likewise.
18300 (vmaxavq_s8): Likewise.
18301 (vmaxaq_s8): Likewise.
18302 (vbrsrq_n_u8): Likewise.
18303 (vshlq_n_u8): Likewise.
18304 (vrshrq_n_u8): Likewise.
18305 (vqshlq_n_u8): Likewise.
18306 (vcmpneq_n_s8): Likewise.
18307 (vcmpltq_s8): Likewise.
18308 (vcmpltq_n_s8): Likewise.
18309 (vcmpleq_s8): Likewise.
18310 (vcmpleq_n_s8): Likewise.
18311 (vcmpgtq_s8): Likewise.
18312 (vcmpgtq_n_s8): Likewise.
18313 (vcmpgeq_s8): Likewise.
18314 (vcmpgeq_n_s8): Likewise.
18315 (vcmpeqq_s8): Likewise.
18316 (vcmpeqq_n_s8): Likewise.
18317 (vqshluq_n_s8): Likewise.
18318 (vaddvq_p_s8): Likewise.
18319 (vsubq_s8): Likewise.
18320 (vsubq_n_s8): Likewise.
18321 (vshlq_r_s8): Likewise.
18322 (vrshlq_s8): Likewise.
18323 (vrshlq_n_s8): Likewise.
18324 (vrmulhq_s8): Likewise.
18325 (vrhaddq_s8): Likewise.
18326 (vqsubq_s8): Likewise.
18327 (vqsubq_n_s8): Likewise.
18328 (vqshlq_s8): Likewise.
18329 (vqshlq_r_s8): Likewise.
18330 (vqrshlq_s8): Likewise.
18331 (vqrshlq_n_s8): Likewise.
18332 (vqrdmulhq_s8): Likewise.
18333 (vqrdmulhq_n_s8): Likewise.
18334 (vqdmulhq_s8): Likewise.
18335 (vqdmulhq_n_s8): Likewise.
18336 (vqaddq_s8): Likewise.
18337 (vqaddq_n_s8): Likewise.
18338 (vorrq_s8): Likewise.
18339 (vornq_s8): Likewise.
18340 (vmulq_s8): Likewise.
18341 (vmulq_n_s8): Likewise.
18342 (vmulltq_int_s8): Likewise.
18343 (vmullbq_int_s8): Likewise.
18344 (vmulhq_s8): Likewise.
18345 (vmlsdavxq_s8): Likewise.
18346 (vmlsdavq_s8): Likewise.
18347 (vmladavxq_s8): Likewise.
18348 (vmladavq_s8): Likewise.
18349 (vminvq_s8): Likewise.
18350 (vminq_s8): Likewise.
18351 (vmaxvq_s8): Likewise.
18352 (vmaxq_s8): Likewise.
18353 (vhsubq_s8): Likewise.
18354 (vhsubq_n_s8): Likewise.
18355 (vhcaddq_rot90_s8): Likewise.
18356 (vhcaddq_rot270_s8): Likewise.
18357 (vhaddq_s8): Likewise.
18358 (vhaddq_n_s8): Likewise.
18359 (veorq_s8): Likewise.
18360 (vcaddq_rot90_s8): Likewise.
18361 (vcaddq_rot270_s8): Likewise.
18362 (vbrsrq_n_s8): Likewise.
18363 (vbicq_s8): Likewise.
18364 (vandq_s8): Likewise.
18365 (vaddvaq_s8): Likewise.
18366 (vaddq_n_s8): Likewise.
18367 (vabdq_s8): Likewise.
18368 (vshlq_n_s8): Likewise.
18369 (vrshrq_n_s8): Likewise.
18370 (vqshlq_n_s8): Likewise.
18371 (vsubq_u16): Likewise.
18372 (vsubq_n_u16): Likewise.
18373 (vrmulhq_u16): Likewise.
18374 (vrhaddq_u16): Likewise.
18375 (vqsubq_u16): Likewise.
18376 (vqsubq_n_u16): Likewise.
18377 (vqaddq_u16): Likewise.
18378 (vqaddq_n_u16): Likewise.
18379 (vorrq_u16): Likewise.
18380 (vornq_u16): Likewise.
18381 (vmulq_u16): Likewise.
18382 (vmulq_n_u16): Likewise.
18383 (vmulltq_int_u16): Likewise.
18384 (vmullbq_int_u16): Likewise.
18385 (vmulhq_u16): Likewise.
18386 (vmladavq_u16): Likewise.
18387 (vminvq_u16): Likewise.
18388 (vminq_u16): Likewise.
18389 (vmaxvq_u16): Likewise.
18390 (vmaxq_u16): Likewise.
18391 (vhsubq_u16): Likewise.
18392 (vhsubq_n_u16): Likewise.
18393 (vhaddq_u16): Likewise.
18394 (vhaddq_n_u16): Likewise.
18395 (veorq_u16): Likewise.
18396 (vcmpneq_n_u16): Likewise.
18397 (vcmphiq_u16): Likewise.
18398 (vcmphiq_n_u16): Likewise.
18399 (vcmpeqq_u16): Likewise.
18400 (vcmpeqq_n_u16): Likewise.
18401 (vcmpcsq_u16): Likewise.
18402 (vcmpcsq_n_u16): Likewise.
18403 (vcaddq_rot90_u16): Likewise.
18404 (vcaddq_rot270_u16): Likewise.
18405 (vbicq_u16): Likewise.
18406 (vandq_u16): Likewise.
18407 (vaddvq_p_u16): Likewise.
18408 (vaddvaq_u16): Likewise.
18409 (vaddq_n_u16): Likewise.
18410 (vabdq_u16): Likewise.
18411 (vshlq_r_u16): Likewise.
18412 (vrshlq_u16): Likewise.
18413 (vrshlq_n_u16): Likewise.
18414 (vqshlq_u16): Likewise.
18415 (vqshlq_r_u16): Likewise.
18416 (vqrshlq_u16): Likewise.
18417 (vqrshlq_n_u16): Likewise.
18418 (vminavq_s16): Likewise.
18419 (vminaq_s16): Likewise.
18420 (vmaxavq_s16): Likewise.
18421 (vmaxaq_s16): Likewise.
18422 (vbrsrq_n_u16): Likewise.
18423 (vshlq_n_u16): Likewise.
18424 (vrshrq_n_u16): Likewise.
18425 (vqshlq_n_u16): Likewise.
18426 (vcmpneq_n_s16): Likewise.
18427 (vcmpltq_s16): Likewise.
18428 (vcmpltq_n_s16): Likewise.
18429 (vcmpleq_s16): Likewise.
18430 (vcmpleq_n_s16): Likewise.
18431 (vcmpgtq_s16): Likewise.
18432 (vcmpgtq_n_s16): Likewise.
18433 (vcmpgeq_s16): Likewise.
18434 (vcmpgeq_n_s16): Likewise.
18435 (vcmpeqq_s16): Likewise.
18436 (vcmpeqq_n_s16): Likewise.
18437 (vqshluq_n_s16): Likewise.
18438 (vaddvq_p_s16): Likewise.
18439 (vsubq_s16): Likewise.
18440 (vsubq_n_s16): Likewise.
18441 (vshlq_r_s16): Likewise.
18442 (vrshlq_s16): Likewise.
18443 (vrshlq_n_s16): Likewise.
18444 (vrmulhq_s16): Likewise.
18445 (vrhaddq_s16): Likewise.
18446 (vqsubq_s16): Likewise.
18447 (vqsubq_n_s16): Likewise.
18448 (vqshlq_s16): Likewise.
18449 (vqshlq_r_s16): Likewise.
18450 (vqrshlq_s16): Likewise.
18451 (vqrshlq_n_s16): Likewise.
18452 (vqrdmulhq_s16): Likewise.
18453 (vqrdmulhq_n_s16): Likewise.
18454 (vqdmulhq_s16): Likewise.
18455 (vqdmulhq_n_s16): Likewise.
18456 (vqaddq_s16): Likewise.
18457 (vqaddq_n_s16): Likewise.
18458 (vorrq_s16): Likewise.
18459 (vornq_s16): Likewise.
18460 (vmulq_s16): Likewise.
18461 (vmulq_n_s16): Likewise.
18462 (vmulltq_int_s16): Likewise.
18463 (vmullbq_int_s16): Likewise.
18464 (vmulhq_s16): Likewise.
18465 (vmlsdavxq_s16): Likewise.
18466 (vmlsdavq_s16): Likewise.
18467 (vmladavxq_s16): Likewise.
18468 (vmladavq_s16): Likewise.
18469 (vminvq_s16): Likewise.
18470 (vminq_s16): Likewise.
18471 (vmaxvq_s16): Likewise.
18472 (vmaxq_s16): Likewise.
18473 (vhsubq_s16): Likewise.
18474 (vhsubq_n_s16): Likewise.
18475 (vhcaddq_rot90_s16): Likewise.
18476 (vhcaddq_rot270_s16): Likewise.
18477 (vhaddq_s16): Likewise.
18478 (vhaddq_n_s16): Likewise.
18479 (veorq_s16): Likewise.
18480 (vcaddq_rot90_s16): Likewise.
18481 (vcaddq_rot270_s16): Likewise.
18482 (vbrsrq_n_s16): Likewise.
18483 (vbicq_s16): Likewise.
18484 (vandq_s16): Likewise.
18485 (vaddvaq_s16): Likewise.
18486 (vaddq_n_s16): Likewise.
18487 (vabdq_s16): Likewise.
18488 (vshlq_n_s16): Likewise.
18489 (vrshrq_n_s16): Likewise.
18490 (vqshlq_n_s16): Likewise.
18491 (vsubq_u32): Likewise.
18492 (vsubq_n_u32): Likewise.
18493 (vrmulhq_u32): Likewise.
18494 (vrhaddq_u32): Likewise.
18495 (vqsubq_u32): Likewise.
18496 (vqsubq_n_u32): Likewise.
18497 (vqaddq_u32): Likewise.
18498 (vqaddq_n_u32): Likewise.
18499 (vorrq_u32): Likewise.
18500 (vornq_u32): Likewise.
18501 (vmulq_u32): Likewise.
18502 (vmulq_n_u32): Likewise.
18503 (vmulltq_int_u32): Likewise.
18504 (vmullbq_int_u32): Likewise.
18505 (vmulhq_u32): Likewise.
18506 (vmladavq_u32): Likewise.
18507 (vminvq_u32): Likewise.
18508 (vminq_u32): Likewise.
18509 (vmaxvq_u32): Likewise.
18510 (vmaxq_u32): Likewise.
18511 (vhsubq_u32): Likewise.
18512 (vhsubq_n_u32): Likewise.
18513 (vhaddq_u32): Likewise.
18514 (vhaddq_n_u32): Likewise.
18515 (veorq_u32): Likewise.
18516 (vcmpneq_n_u32): Likewise.
18517 (vcmphiq_u32): Likewise.
18518 (vcmphiq_n_u32): Likewise.
18519 (vcmpeqq_u32): Likewise.
18520 (vcmpeqq_n_u32): Likewise.
18521 (vcmpcsq_u32): Likewise.
18522 (vcmpcsq_n_u32): Likewise.
18523 (vcaddq_rot90_u32): Likewise.
18524 (vcaddq_rot270_u32): Likewise.
18525 (vbicq_u32): Likewise.
18526 (vandq_u32): Likewise.
18527 (vaddvq_p_u32): Likewise.
18528 (vaddvaq_u32): Likewise.
18529 (vaddq_n_u32): Likewise.
18530 (vabdq_u32): Likewise.
18531 (vshlq_r_u32): Likewise.
18532 (vrshlq_u32): Likewise.
18533 (vrshlq_n_u32): Likewise.
18534 (vqshlq_u32): Likewise.
18535 (vqshlq_r_u32): Likewise.
18536 (vqrshlq_u32): Likewise.
18537 (vqrshlq_n_u32): Likewise.
18538 (vminavq_s32): Likewise.
18539 (vminaq_s32): Likewise.
18540 (vmaxavq_s32): Likewise.
18541 (vmaxaq_s32): Likewise.
18542 (vbrsrq_n_u32): Likewise.
18543 (vshlq_n_u32): Likewise.
18544 (vrshrq_n_u32): Likewise.
18545 (vqshlq_n_u32): Likewise.
18546 (vcmpneq_n_s32): Likewise.
18547 (vcmpltq_s32): Likewise.
18548 (vcmpltq_n_s32): Likewise.
18549 (vcmpleq_s32): Likewise.
18550 (vcmpleq_n_s32): Likewise.
18551 (vcmpgtq_s32): Likewise.
18552 (vcmpgtq_n_s32): Likewise.
18553 (vcmpgeq_s32): Likewise.
18554 (vcmpgeq_n_s32): Likewise.
18555 (vcmpeqq_s32): Likewise.
18556 (vcmpeqq_n_s32): Likewise.
18557 (vqshluq_n_s32): Likewise.
18558 (vaddvq_p_s32): Likewise.
18559 (vsubq_s32): Likewise.
18560 (vsubq_n_s32): Likewise.
18561 (vshlq_r_s32): Likewise.
18562 (vrshlq_s32): Likewise.
18563 (vrshlq_n_s32): Likewise.
18564 (vrmulhq_s32): Likewise.
18565 (vrhaddq_s32): Likewise.
18566 (vqsubq_s32): Likewise.
18567 (vqsubq_n_s32): Likewise.
18568 (vqshlq_s32): Likewise.
18569 (vqshlq_r_s32): Likewise.
18570 (vqrshlq_s32): Likewise.
18571 (vqrshlq_n_s32): Likewise.
18572 (vqrdmulhq_s32): Likewise.
18573 (vqrdmulhq_n_s32): Likewise.
18574 (vqdmulhq_s32): Likewise.
18575 (vqdmulhq_n_s32): Likewise.
18576 (vqaddq_s32): Likewise.
18577 (vqaddq_n_s32): Likewise.
18578 (vorrq_s32): Likewise.
18579 (vornq_s32): Likewise.
18580 (vmulq_s32): Likewise.
18581 (vmulq_n_s32): Likewise.
18582 (vmulltq_int_s32): Likewise.
18583 (vmullbq_int_s32): Likewise.
18584 (vmulhq_s32): Likewise.
18585 (vmlsdavxq_s32): Likewise.
18586 (vmlsdavq_s32): Likewise.
18587 (vmladavxq_s32): Likewise.
18588 (vmladavq_s32): Likewise.
18589 (vminvq_s32): Likewise.
18590 (vminq_s32): Likewise.
18591 (vmaxvq_s32): Likewise.
18592 (vmaxq_s32): Likewise.
18593 (vhsubq_s32): Likewise.
18594 (vhsubq_n_s32): Likewise.
18595 (vhcaddq_rot90_s32): Likewise.
18596 (vhcaddq_rot270_s32): Likewise.
18597 (vhaddq_s32): Likewise.
18598 (vhaddq_n_s32): Likewise.
18599 (veorq_s32): Likewise.
18600 (vcaddq_rot90_s32): Likewise.
18601 (vcaddq_rot270_s32): Likewise.
18602 (vbrsrq_n_s32): Likewise.
18603 (vbicq_s32): Likewise.
18604 (vandq_s32): Likewise.
18605 (vaddvaq_s32): Likewise.
18606 (vaddq_n_s32): Likewise.
18607 (vabdq_s32): Likewise.
18608 (vshlq_n_s32): Likewise.
18609 (vrshrq_n_s32): Likewise.
18610 (vqshlq_n_s32): Likewise.
18611 (__arm_vsubq_u8): Define intrinsic.
18612 (__arm_vsubq_n_u8): Likewise.
18613 (__arm_vrmulhq_u8): Likewise.
18614 (__arm_vrhaddq_u8): Likewise.
18615 (__arm_vqsubq_u8): Likewise.
18616 (__arm_vqsubq_n_u8): Likewise.
18617 (__arm_vqaddq_u8): Likewise.
18618 (__arm_vqaddq_n_u8): Likewise.
18619 (__arm_vorrq_u8): Likewise.
18620 (__arm_vornq_u8): Likewise.
18621 (__arm_vmulq_u8): Likewise.
18622 (__arm_vmulq_n_u8): Likewise.
18623 (__arm_vmulltq_int_u8): Likewise.
18624 (__arm_vmullbq_int_u8): Likewise.
18625 (__arm_vmulhq_u8): Likewise.
18626 (__arm_vmladavq_u8): Likewise.
18627 (__arm_vminvq_u8): Likewise.
18628 (__arm_vminq_u8): Likewise.
18629 (__arm_vmaxvq_u8): Likewise.
18630 (__arm_vmaxq_u8): Likewise.
18631 (__arm_vhsubq_u8): Likewise.
18632 (__arm_vhsubq_n_u8): Likewise.
18633 (__arm_vhaddq_u8): Likewise.
18634 (__arm_vhaddq_n_u8): Likewise.
18635 (__arm_veorq_u8): Likewise.
18636 (__arm_vcmpneq_n_u8): Likewise.
18637 (__arm_vcmphiq_u8): Likewise.
18638 (__arm_vcmphiq_n_u8): Likewise.
18639 (__arm_vcmpeqq_u8): Likewise.
18640 (__arm_vcmpeqq_n_u8): Likewise.
18641 (__arm_vcmpcsq_u8): Likewise.
18642 (__arm_vcmpcsq_n_u8): Likewise.
18643 (__arm_vcaddq_rot90_u8): Likewise.
18644 (__arm_vcaddq_rot270_u8): Likewise.
18645 (__arm_vbicq_u8): Likewise.
18646 (__arm_vandq_u8): Likewise.
18647 (__arm_vaddvq_p_u8): Likewise.
18648 (__arm_vaddvaq_u8): Likewise.
18649 (__arm_vaddq_n_u8): Likewise.
18650 (__arm_vabdq_u8): Likewise.
18651 (__arm_vshlq_r_u8): Likewise.
18652 (__arm_vrshlq_u8): Likewise.
18653 (__arm_vrshlq_n_u8): Likewise.
18654 (__arm_vqshlq_u8): Likewise.
18655 (__arm_vqshlq_r_u8): Likewise.
18656 (__arm_vqrshlq_u8): Likewise.
18657 (__arm_vqrshlq_n_u8): Likewise.
18658 (__arm_vminavq_s8): Likewise.
18659 (__arm_vminaq_s8): Likewise.
18660 (__arm_vmaxavq_s8): Likewise.
18661 (__arm_vmaxaq_s8): Likewise.
18662 (__arm_vbrsrq_n_u8): Likewise.
18663 (__arm_vshlq_n_u8): Likewise.
18664 (__arm_vrshrq_n_u8): Likewise.
18665 (__arm_vqshlq_n_u8): Likewise.
18666 (__arm_vcmpneq_n_s8): Likewise.
18667 (__arm_vcmpltq_s8): Likewise.
18668 (__arm_vcmpltq_n_s8): Likewise.
18669 (__arm_vcmpleq_s8): Likewise.
18670 (__arm_vcmpleq_n_s8): Likewise.
18671 (__arm_vcmpgtq_s8): Likewise.
18672 (__arm_vcmpgtq_n_s8): Likewise.
18673 (__arm_vcmpgeq_s8): Likewise.
18674 (__arm_vcmpgeq_n_s8): Likewise.
18675 (__arm_vcmpeqq_s8): Likewise.
18676 (__arm_vcmpeqq_n_s8): Likewise.
18677 (__arm_vqshluq_n_s8): Likewise.
18678 (__arm_vaddvq_p_s8): Likewise.
18679 (__arm_vsubq_s8): Likewise.
18680 (__arm_vsubq_n_s8): Likewise.
18681 (__arm_vshlq_r_s8): Likewise.
18682 (__arm_vrshlq_s8): Likewise.
18683 (__arm_vrshlq_n_s8): Likewise.
18684 (__arm_vrmulhq_s8): Likewise.
18685 (__arm_vrhaddq_s8): Likewise.
18686 (__arm_vqsubq_s8): Likewise.
18687 (__arm_vqsubq_n_s8): Likewise.
18688 (__arm_vqshlq_s8): Likewise.
18689 (__arm_vqshlq_r_s8): Likewise.
18690 (__arm_vqrshlq_s8): Likewise.
18691 (__arm_vqrshlq_n_s8): Likewise.
18692 (__arm_vqrdmulhq_s8): Likewise.
18693 (__arm_vqrdmulhq_n_s8): Likewise.
18694 (__arm_vqdmulhq_s8): Likewise.
18695 (__arm_vqdmulhq_n_s8): Likewise.
18696 (__arm_vqaddq_s8): Likewise.
18697 (__arm_vqaddq_n_s8): Likewise.
18698 (__arm_vorrq_s8): Likewise.
18699 (__arm_vornq_s8): Likewise.
18700 (__arm_vmulq_s8): Likewise.
18701 (__arm_vmulq_n_s8): Likewise.
18702 (__arm_vmulltq_int_s8): Likewise.
18703 (__arm_vmullbq_int_s8): Likewise.
18704 (__arm_vmulhq_s8): Likewise.
18705 (__arm_vmlsdavxq_s8): Likewise.
18706 (__arm_vmlsdavq_s8): Likewise.
18707 (__arm_vmladavxq_s8): Likewise.
18708 (__arm_vmladavq_s8): Likewise.
18709 (__arm_vminvq_s8): Likewise.
18710 (__arm_vminq_s8): Likewise.
18711 (__arm_vmaxvq_s8): Likewise.
18712 (__arm_vmaxq_s8): Likewise.
18713 (__arm_vhsubq_s8): Likewise.
18714 (__arm_vhsubq_n_s8): Likewise.
18715 (__arm_vhcaddq_rot90_s8): Likewise.
18716 (__arm_vhcaddq_rot270_s8): Likewise.
18717 (__arm_vhaddq_s8): Likewise.
18718 (__arm_vhaddq_n_s8): Likewise.
18719 (__arm_veorq_s8): Likewise.
18720 (__arm_vcaddq_rot90_s8): Likewise.
18721 (__arm_vcaddq_rot270_s8): Likewise.
18722 (__arm_vbrsrq_n_s8): Likewise.
18723 (__arm_vbicq_s8): Likewise.
18724 (__arm_vandq_s8): Likewise.
18725 (__arm_vaddvaq_s8): Likewise.
18726 (__arm_vaddq_n_s8): Likewise.
18727 (__arm_vabdq_s8): Likewise.
18728 (__arm_vshlq_n_s8): Likewise.
18729 (__arm_vrshrq_n_s8): Likewise.
18730 (__arm_vqshlq_n_s8): Likewise.
18731 (__arm_vsubq_u16): Likewise.
18732 (__arm_vsubq_n_u16): Likewise.
18733 (__arm_vrmulhq_u16): Likewise.
18734 (__arm_vrhaddq_u16): Likewise.
18735 (__arm_vqsubq_u16): Likewise.
18736 (__arm_vqsubq_n_u16): Likewise.
18737 (__arm_vqaddq_u16): Likewise.
18738 (__arm_vqaddq_n_u16): Likewise.
18739 (__arm_vorrq_u16): Likewise.
18740 (__arm_vornq_u16): Likewise.
18741 (__arm_vmulq_u16): Likewise.
18742 (__arm_vmulq_n_u16): Likewise.
18743 (__arm_vmulltq_int_u16): Likewise.
18744 (__arm_vmullbq_int_u16): Likewise.
18745 (__arm_vmulhq_u16): Likewise.
18746 (__arm_vmladavq_u16): Likewise.
18747 (__arm_vminvq_u16): Likewise.
18748 (__arm_vminq_u16): Likewise.
18749 (__arm_vmaxvq_u16): Likewise.
18750 (__arm_vmaxq_u16): Likewise.
18751 (__arm_vhsubq_u16): Likewise.
18752 (__arm_vhsubq_n_u16): Likewise.
18753 (__arm_vhaddq_u16): Likewise.
18754 (__arm_vhaddq_n_u16): Likewise.
18755 (__arm_veorq_u16): Likewise.
18756 (__arm_vcmpneq_n_u16): Likewise.
18757 (__arm_vcmphiq_u16): Likewise.
18758 (__arm_vcmphiq_n_u16): Likewise.
18759 (__arm_vcmpeqq_u16): Likewise.
18760 (__arm_vcmpeqq_n_u16): Likewise.
18761 (__arm_vcmpcsq_u16): Likewise.
18762 (__arm_vcmpcsq_n_u16): Likewise.
18763 (__arm_vcaddq_rot90_u16): Likewise.
18764 (__arm_vcaddq_rot270_u16): Likewise.
18765 (__arm_vbicq_u16): Likewise.
18766 (__arm_vandq_u16): Likewise.
18767 (__arm_vaddvq_p_u16): Likewise.
18768 (__arm_vaddvaq_u16): Likewise.
18769 (__arm_vaddq_n_u16): Likewise.
18770 (__arm_vabdq_u16): Likewise.
18771 (__arm_vshlq_r_u16): Likewise.
18772 (__arm_vrshlq_u16): Likewise.
18773 (__arm_vrshlq_n_u16): Likewise.
18774 (__arm_vqshlq_u16): Likewise.
18775 (__arm_vqshlq_r_u16): Likewise.
18776 (__arm_vqrshlq_u16): Likewise.
18777 (__arm_vqrshlq_n_u16): Likewise.
18778 (__arm_vminavq_s16): Likewise.
18779 (__arm_vminaq_s16): Likewise.
18780 (__arm_vmaxavq_s16): Likewise.
18781 (__arm_vmaxaq_s16): Likewise.
18782 (__arm_vbrsrq_n_u16): Likewise.
18783 (__arm_vshlq_n_u16): Likewise.
18784 (__arm_vrshrq_n_u16): Likewise.
18785 (__arm_vqshlq_n_u16): Likewise.
18786 (__arm_vcmpneq_n_s16): Likewise.
18787 (__arm_vcmpltq_s16): Likewise.
18788 (__arm_vcmpltq_n_s16): Likewise.
18789 (__arm_vcmpleq_s16): Likewise.
18790 (__arm_vcmpleq_n_s16): Likewise.
18791 (__arm_vcmpgtq_s16): Likewise.
18792 (__arm_vcmpgtq_n_s16): Likewise.
18793 (__arm_vcmpgeq_s16): Likewise.
18794 (__arm_vcmpgeq_n_s16): Likewise.
18795 (__arm_vcmpeqq_s16): Likewise.
18796 (__arm_vcmpeqq_n_s16): Likewise.
18797 (__arm_vqshluq_n_s16): Likewise.
18798 (__arm_vaddvq_p_s16): Likewise.
18799 (__arm_vsubq_s16): Likewise.
18800 (__arm_vsubq_n_s16): Likewise.
18801 (__arm_vshlq_r_s16): Likewise.
18802 (__arm_vrshlq_s16): Likewise.
18803 (__arm_vrshlq_n_s16): Likewise.
18804 (__arm_vrmulhq_s16): Likewise.
18805 (__arm_vrhaddq_s16): Likewise.
18806 (__arm_vqsubq_s16): Likewise.
18807 (__arm_vqsubq_n_s16): Likewise.
18808 (__arm_vqshlq_s16): Likewise.
18809 (__arm_vqshlq_r_s16): Likewise.
18810 (__arm_vqrshlq_s16): Likewise.
18811 (__arm_vqrshlq_n_s16): Likewise.
18812 (__arm_vqrdmulhq_s16): Likewise.
18813 (__arm_vqrdmulhq_n_s16): Likewise.
18814 (__arm_vqdmulhq_s16): Likewise.
18815 (__arm_vqdmulhq_n_s16): Likewise.
18816 (__arm_vqaddq_s16): Likewise.
18817 (__arm_vqaddq_n_s16): Likewise.
18818 (__arm_vorrq_s16): Likewise.
18819 (__arm_vornq_s16): Likewise.
18820 (__arm_vmulq_s16): Likewise.
18821 (__arm_vmulq_n_s16): Likewise.
18822 (__arm_vmulltq_int_s16): Likewise.
18823 (__arm_vmullbq_int_s16): Likewise.
18824 (__arm_vmulhq_s16): Likewise.
18825 (__arm_vmlsdavxq_s16): Likewise.
18826 (__arm_vmlsdavq_s16): Likewise.
18827 (__arm_vmladavxq_s16): Likewise.
18828 (__arm_vmladavq_s16): Likewise.
18829 (__arm_vminvq_s16): Likewise.
18830 (__arm_vminq_s16): Likewise.
18831 (__arm_vmaxvq_s16): Likewise.
18832 (__arm_vmaxq_s16): Likewise.
18833 (__arm_vhsubq_s16): Likewise.
18834 (__arm_vhsubq_n_s16): Likewise.
18835 (__arm_vhcaddq_rot90_s16): Likewise.
18836 (__arm_vhcaddq_rot270_s16): Likewise.
18837 (__arm_vhaddq_s16): Likewise.
18838 (__arm_vhaddq_n_s16): Likewise.
18839 (__arm_veorq_s16): Likewise.
18840 (__arm_vcaddq_rot90_s16): Likewise.
18841 (__arm_vcaddq_rot270_s16): Likewise.
18842 (__arm_vbrsrq_n_s16): Likewise.
18843 (__arm_vbicq_s16): Likewise.
18844 (__arm_vandq_s16): Likewise.
18845 (__arm_vaddvaq_s16): Likewise.
18846 (__arm_vaddq_n_s16): Likewise.
18847 (__arm_vabdq_s16): Likewise.
18848 (__arm_vshlq_n_s16): Likewise.
18849 (__arm_vrshrq_n_s16): Likewise.
18850 (__arm_vqshlq_n_s16): Likewise.
18851 (__arm_vsubq_u32): Likewise.
18852 (__arm_vsubq_n_u32): Likewise.
18853 (__arm_vrmulhq_u32): Likewise.
18854 (__arm_vrhaddq_u32): Likewise.
18855 (__arm_vqsubq_u32): Likewise.
18856 (__arm_vqsubq_n_u32): Likewise.
18857 (__arm_vqaddq_u32): Likewise.
18858 (__arm_vqaddq_n_u32): Likewise.
18859 (__arm_vorrq_u32): Likewise.
18860 (__arm_vornq_u32): Likewise.
18861 (__arm_vmulq_u32): Likewise.
18862 (__arm_vmulq_n_u32): Likewise.
18863 (__arm_vmulltq_int_u32): Likewise.
18864 (__arm_vmullbq_int_u32): Likewise.
18865 (__arm_vmulhq_u32): Likewise.
18866 (__arm_vmladavq_u32): Likewise.
18867 (__arm_vminvq_u32): Likewise.
18868 (__arm_vminq_u32): Likewise.
18869 (__arm_vmaxvq_u32): Likewise.
18870 (__arm_vmaxq_u32): Likewise.
18871 (__arm_vhsubq_u32): Likewise.
18872 (__arm_vhsubq_n_u32): Likewise.
18873 (__arm_vhaddq_u32): Likewise.
18874 (__arm_vhaddq_n_u32): Likewise.
18875 (__arm_veorq_u32): Likewise.
18876 (__arm_vcmpneq_n_u32): Likewise.
18877 (__arm_vcmphiq_u32): Likewise.
18878 (__arm_vcmphiq_n_u32): Likewise.
18879 (__arm_vcmpeqq_u32): Likewise.
18880 (__arm_vcmpeqq_n_u32): Likewise.
18881 (__arm_vcmpcsq_u32): Likewise.
18882 (__arm_vcmpcsq_n_u32): Likewise.
18883 (__arm_vcaddq_rot90_u32): Likewise.
18884 (__arm_vcaddq_rot270_u32): Likewise.
18885 (__arm_vbicq_u32): Likewise.
18886 (__arm_vandq_u32): Likewise.
18887 (__arm_vaddvq_p_u32): Likewise.
18888 (__arm_vaddvaq_u32): Likewise.
18889 (__arm_vaddq_n_u32): Likewise.
18890 (__arm_vabdq_u32): Likewise.
18891 (__arm_vshlq_r_u32): Likewise.
18892 (__arm_vrshlq_u32): Likewise.
18893 (__arm_vrshlq_n_u32): Likewise.
18894 (__arm_vqshlq_u32): Likewise.
18895 (__arm_vqshlq_r_u32): Likewise.
18896 (__arm_vqrshlq_u32): Likewise.
18897 (__arm_vqrshlq_n_u32): Likewise.
18898 (__arm_vminavq_s32): Likewise.
18899 (__arm_vminaq_s32): Likewise.
18900 (__arm_vmaxavq_s32): Likewise.
18901 (__arm_vmaxaq_s32): Likewise.
18902 (__arm_vbrsrq_n_u32): Likewise.
18903 (__arm_vshlq_n_u32): Likewise.
18904 (__arm_vrshrq_n_u32): Likewise.
18905 (__arm_vqshlq_n_u32): Likewise.
18906 (__arm_vcmpneq_n_s32): Likewise.
18907 (__arm_vcmpltq_s32): Likewise.
18908 (__arm_vcmpltq_n_s32): Likewise.
18909 (__arm_vcmpleq_s32): Likewise.
18910 (__arm_vcmpleq_n_s32): Likewise.
18911 (__arm_vcmpgtq_s32): Likewise.
18912 (__arm_vcmpgtq_n_s32): Likewise.
18913 (__arm_vcmpgeq_s32): Likewise.
18914 (__arm_vcmpgeq_n_s32): Likewise.
18915 (__arm_vcmpeqq_s32): Likewise.
18916 (__arm_vcmpeqq_n_s32): Likewise.
18917 (__arm_vqshluq_n_s32): Likewise.
18918 (__arm_vaddvq_p_s32): Likewise.
18919 (__arm_vsubq_s32): Likewise.
18920 (__arm_vsubq_n_s32): Likewise.
18921 (__arm_vshlq_r_s32): Likewise.
18922 (__arm_vrshlq_s32): Likewise.
18923 (__arm_vrshlq_n_s32): Likewise.
18924 (__arm_vrmulhq_s32): Likewise.
18925 (__arm_vrhaddq_s32): Likewise.
18926 (__arm_vqsubq_s32): Likewise.
18927 (__arm_vqsubq_n_s32): Likewise.
18928 (__arm_vqshlq_s32): Likewise.
18929 (__arm_vqshlq_r_s32): Likewise.
18930 (__arm_vqrshlq_s32): Likewise.
18931 (__arm_vqrshlq_n_s32): Likewise.
18932 (__arm_vqrdmulhq_s32): Likewise.
18933 (__arm_vqrdmulhq_n_s32): Likewise.
18934 (__arm_vqdmulhq_s32): Likewise.
18935 (__arm_vqdmulhq_n_s32): Likewise.
18936 (__arm_vqaddq_s32): Likewise.
18937 (__arm_vqaddq_n_s32): Likewise.
18938 (__arm_vorrq_s32): Likewise.
18939 (__arm_vornq_s32): Likewise.
18940 (__arm_vmulq_s32): Likewise.
18941 (__arm_vmulq_n_s32): Likewise.
18942 (__arm_vmulltq_int_s32): Likewise.
18943 (__arm_vmullbq_int_s32): Likewise.
18944 (__arm_vmulhq_s32): Likewise.
18945 (__arm_vmlsdavxq_s32): Likewise.
18946 (__arm_vmlsdavq_s32): Likewise.
18947 (__arm_vmladavxq_s32): Likewise.
18948 (__arm_vmladavq_s32): Likewise.
18949 (__arm_vminvq_s32): Likewise.
18950 (__arm_vminq_s32): Likewise.
18951 (__arm_vmaxvq_s32): Likewise.
18952 (__arm_vmaxq_s32): Likewise.
18953 (__arm_vhsubq_s32): Likewise.
18954 (__arm_vhsubq_n_s32): Likewise.
18955 (__arm_vhcaddq_rot90_s32): Likewise.
18956 (__arm_vhcaddq_rot270_s32): Likewise.
18957 (__arm_vhaddq_s32): Likewise.
18958 (__arm_vhaddq_n_s32): Likewise.
18959 (__arm_veorq_s32): Likewise.
18960 (__arm_vcaddq_rot90_s32): Likewise.
18961 (__arm_vcaddq_rot270_s32): Likewise.
18962 (__arm_vbrsrq_n_s32): Likewise.
18963 (__arm_vbicq_s32): Likewise.
18964 (__arm_vandq_s32): Likewise.
18965 (__arm_vaddvaq_s32): Likewise.
18966 (__arm_vaddq_n_s32): Likewise.
18967 (__arm_vabdq_s32): Likewise.
18968 (__arm_vshlq_n_s32): Likewise.
18969 (__arm_vrshrq_n_s32): Likewise.
18970 (__arm_vqshlq_n_s32): Likewise.
18971 (vsubq): Define polymorphic variant.
18972 (vsubq_n): Likewise.
18973 (vshlq_r): Likewise.
18974 (vrshlq_n): Likewise.
18975 (vrshlq): Likewise.
18976 (vrmulhq): Likewise.
18977 (vrhaddq): Likewise.
18978 (vqsubq_n): Likewise.
18979 (vqsubq): Likewise.
18980 (vqshlq): Likewise.
18981 (vqshlq_r): Likewise.
18982 (vqshluq): Likewise.
18983 (vrshrq_n): Likewise.
18984 (vshlq_n): Likewise.
18985 (vqshluq_n): Likewise.
18986 (vqshlq_n): Likewise.
18987 (vqrshlq_n): Likewise.
18988 (vqrshlq): Likewise.
18989 (vqrdmulhq_n): Likewise.
18990 (vqrdmulhq): Likewise.
18991 (vqdmulhq_n): Likewise.
18992 (vqdmulhq): Likewise.
18993 (vqaddq_n): Likewise.
18994 (vqaddq): Likewise.
18995 (vorrq_n): Likewise.
18998 (vmulq_n): Likewise.
19000 (vmulltq_int): Likewise.
19001 (vmullbq_int): Likewise.
19002 (vmulhq): Likewise.
19004 (vminaq): Likewise.
19006 (vmaxaq): Likewise.
19007 (vhsubq_n): Likewise.
19008 (vhsubq): Likewise.
19009 (vhcaddq_rot90): Likewise.
19010 (vhcaddq_rot270): Likewise.
19011 (vhaddq_n): Likewise.
19012 (vhaddq): Likewise.
19014 (vcaddq_rot90): Likewise.
19015 (vcaddq_rot270): Likewise.
19016 (vbrsrq_n): Likewise.
19017 (vbicq_n): Likewise.
19020 (vaddq_n): Likewise.
19023 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
19024 (BINOP_NONE_NONE_NONE): Likewise.
19025 (BINOP_NONE_NONE_UNONE): Likewise.
19026 (BINOP_UNONE_NONE_IMM): Likewise.
19027 (BINOP_UNONE_NONE_NONE): Likewise.
19028 (BINOP_UNONE_UNONE_IMM): Likewise.
19029 (BINOP_UNONE_UNONE_NONE): Likewise.
19030 (BINOP_UNONE_UNONE_UNONE): Likewise.
19031 * config/arm/constraints.md (Ra): Define constraint to check constant is
19032 in the range of 0 to 7.
19033 (Rg): Define constriant to check the constant is one among 1, 2, 4
19035 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
19036 (mve_vaddq_n_<supf>): Likewise.
19037 (mve_vaddvaq_<supf>): Likewise.
19038 (mve_vaddvq_p_<supf>): Likewise.
19039 (mve_vandq_<supf>): Likewise.
19040 (mve_vbicq_<supf>): Likewise.
19041 (mve_vbrsrq_n_<supf>): Likewise.
19042 (mve_vcaddq_rot270_<supf>): Likewise.
19043 (mve_vcaddq_rot90_<supf>): Likewise.
19044 (mve_vcmpcsq_n_u): Likewise.
19045 (mve_vcmpcsq_u): Likewise.
19046 (mve_vcmpeqq_n_<supf>): Likewise.
19047 (mve_vcmpeqq_<supf>): Likewise.
19048 (mve_vcmpgeq_n_s): Likewise.
19049 (mve_vcmpgeq_s): Likewise.
19050 (mve_vcmpgtq_n_s): Likewise.
19051 (mve_vcmpgtq_s): Likewise.
19052 (mve_vcmphiq_n_u): Likewise.
19053 (mve_vcmphiq_u): Likewise.
19054 (mve_vcmpleq_n_s): Likewise.
19055 (mve_vcmpleq_s): Likewise.
19056 (mve_vcmpltq_n_s): Likewise.
19057 (mve_vcmpltq_s): Likewise.
19058 (mve_vcmpneq_n_<supf>): Likewise.
19059 (mve_vddupq_n_u): Likewise.
19060 (mve_veorq_<supf>): Likewise.
19061 (mve_vhaddq_n_<supf>): Likewise.
19062 (mve_vhaddq_<supf>): Likewise.
19063 (mve_vhcaddq_rot270_s): Likewise.
19064 (mve_vhcaddq_rot90_s): Likewise.
19065 (mve_vhsubq_n_<supf>): Likewise.
19066 (mve_vhsubq_<supf>): Likewise.
19067 (mve_vidupq_n_u): Likewise.
19068 (mve_vmaxaq_s): Likewise.
19069 (mve_vmaxavq_s): Likewise.
19070 (mve_vmaxq_<supf>): Likewise.
19071 (mve_vmaxvq_<supf>): Likewise.
19072 (mve_vminaq_s): Likewise.
19073 (mve_vminavq_s): Likewise.
19074 (mve_vminq_<supf>): Likewise.
19075 (mve_vminvq_<supf>): Likewise.
19076 (mve_vmladavq_<supf>): Likewise.
19077 (mve_vmladavxq_s): Likewise.
19078 (mve_vmlsdavq_s): Likewise.
19079 (mve_vmlsdavxq_s): Likewise.
19080 (mve_vmulhq_<supf>): Likewise.
19081 (mve_vmullbq_int_<supf>): Likewise.
19082 (mve_vmulltq_int_<supf>): Likewise.
19083 (mve_vmulq_n_<supf>): Likewise.
19084 (mve_vmulq_<supf>): Likewise.
19085 (mve_vornq_<supf>): Likewise.
19086 (mve_vorrq_<supf>): Likewise.
19087 (mve_vqaddq_n_<supf>): Likewise.
19088 (mve_vqaddq_<supf>): Likewise.
19089 (mve_vqdmulhq_n_s): Likewise.
19090 (mve_vqdmulhq_s): Likewise.
19091 (mve_vqrdmulhq_n_s): Likewise.
19092 (mve_vqrdmulhq_s): Likewise.
19093 (mve_vqrshlq_n_<supf>): Likewise.
19094 (mve_vqrshlq_<supf>): Likewise.
19095 (mve_vqshlq_n_<supf>): Likewise.
19096 (mve_vqshlq_r_<supf>): Likewise.
19097 (mve_vqshlq_<supf>): Likewise.
19098 (mve_vqshluq_n_s): Likewise.
19099 (mve_vqsubq_n_<supf>): Likewise.
19100 (mve_vqsubq_<supf>): Likewise.
19101 (mve_vrhaddq_<supf>): Likewise.
19102 (mve_vrmulhq_<supf>): Likewise.
19103 (mve_vrshlq_n_<supf>): Likewise.
19104 (mve_vrshlq_<supf>): Likewise.
19105 (mve_vrshrq_n_<supf>): Likewise.
19106 (mve_vshlq_n_<supf>): Likewise.
19107 (mve_vshlq_r_<supf>): Likewise.
19108 (mve_vsubq_n_<supf>): Likewise.
19109 (mve_vsubq_<supf>): Likewise.
19110 * config/arm/predicates.md (mve_imm_7): Define predicate to check
19111 the matching constraint Ra.
19112 (mve_imm_selective_upto_8): Define predicate to check the matching
19115 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19116 Mihail Ionescu <mihail.ionescu@arm.com>
19117 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19119 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
19120 qualifier for binary operands.
19121 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
19122 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
19123 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
19124 (vaddlvq_p_u32): Likewise.
19125 (vcmpneq_s8): Likewise.
19126 (vcmpneq_s16): Likewise.
19127 (vcmpneq_s32): Likewise.
19128 (vcmpneq_u8): Likewise.
19129 (vcmpneq_u16): Likewise.
19130 (vcmpneq_u32): Likewise.
19131 (vshlq_s8): Likewise.
19132 (vshlq_s16): Likewise.
19133 (vshlq_s32): Likewise.
19134 (vshlq_u8): Likewise.
19135 (vshlq_u16): Likewise.
19136 (vshlq_u32): Likewise.
19137 (__arm_vaddlvq_p_s32): Define intrinsic.
19138 (__arm_vaddlvq_p_u32): Likewise.
19139 (__arm_vcmpneq_s8): Likewise.
19140 (__arm_vcmpneq_s16): Likewise.
19141 (__arm_vcmpneq_s32): Likewise.
19142 (__arm_vcmpneq_u8): Likewise.
19143 (__arm_vcmpneq_u16): Likewise.
19144 (__arm_vcmpneq_u32): Likewise.
19145 (__arm_vshlq_s8): Likewise.
19146 (__arm_vshlq_s16): Likewise.
19147 (__arm_vshlq_s32): Likewise.
19148 (__arm_vshlq_u8): Likewise.
19149 (__arm_vshlq_u16): Likewise.
19150 (__arm_vshlq_u32): Likewise.
19151 (vaddlvq_p): Define polymorphic variant.
19152 (vcmpneq): Likewise.
19154 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
19156 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
19157 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
19158 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
19159 (mve_vcmpneq_<supf><mode>): Likewise.
19160 (mve_vshlq_<supf><mode>): Likewise.
19162 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19163 Mihail Ionescu <mihail.ionescu@arm.com>
19164 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19166 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
19167 qualifier for binary operands.
19168 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
19169 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
19170 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
19171 (vcvtq_n_s32_f32): Likewise.
19172 (vcvtq_n_u16_f16): Likewise.
19173 (vcvtq_n_u32_f32): Likewise.
19174 (vcreateq_u8): Likewise.
19175 (vcreateq_u16): Likewise.
19176 (vcreateq_u32): Likewise.
19177 (vcreateq_u64): Likewise.
19178 (vcreateq_s8): Likewise.
19179 (vcreateq_s16): Likewise.
19180 (vcreateq_s32): Likewise.
19181 (vcreateq_s64): Likewise.
19182 (vshrq_n_s8): Likewise.
19183 (vshrq_n_s16): Likewise.
19184 (vshrq_n_s32): Likewise.
19185 (vshrq_n_u8): Likewise.
19186 (vshrq_n_u16): Likewise.
19187 (vshrq_n_u32): Likewise.
19188 (__arm_vcreateq_u8): Define intrinsic.
19189 (__arm_vcreateq_u16): Likewise.
19190 (__arm_vcreateq_u32): Likewise.
19191 (__arm_vcreateq_u64): Likewise.
19192 (__arm_vcreateq_s8): Likewise.
19193 (__arm_vcreateq_s16): Likewise.
19194 (__arm_vcreateq_s32): Likewise.
19195 (__arm_vcreateq_s64): Likewise.
19196 (__arm_vshrq_n_s8): Likewise.
19197 (__arm_vshrq_n_s16): Likewise.
19198 (__arm_vshrq_n_s32): Likewise.
19199 (__arm_vshrq_n_u8): Likewise.
19200 (__arm_vshrq_n_u16): Likewise.
19201 (__arm_vshrq_n_u32): Likewise.
19202 (__arm_vcvtq_n_s16_f16): Likewise.
19203 (__arm_vcvtq_n_s32_f32): Likewise.
19204 (__arm_vcvtq_n_u16_f16): Likewise.
19205 (__arm_vcvtq_n_u32_f32): Likewise.
19206 (vshrq_n): Define polymorphic variant.
19207 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
19209 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
19210 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
19211 * config/arm/constraints.md (Rb): Define constraint to check constant is
19212 in the range of 1 to 8.
19213 (Rf): Define constraint to check constant is in the range of 1 to 32.
19214 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
19215 (mve_vshrq_n_<supf><mode>): Likewise.
19216 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
19217 * config/arm/predicates.md (mve_imm_8): Define predicate to check
19218 the matching constraint Rb.
19219 (mve_imm_32): Define predicate to check the matching constraint Rf.
19221 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19222 Mihail Ionescu <mihail.ionescu@arm.com>
19223 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19225 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
19226 qualifier for binary operands.
19227 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
19228 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
19229 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
19230 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
19231 (vsubq_n_f32): Likewise.
19232 (vbrsrq_n_f16): Likewise.
19233 (vbrsrq_n_f32): Likewise.
19234 (vcvtq_n_f16_s16): Likewise.
19235 (vcvtq_n_f32_s32): Likewise.
19236 (vcvtq_n_f16_u16): Likewise.
19237 (vcvtq_n_f32_u32): Likewise.
19238 (vcreateq_f16): Likewise.
19239 (vcreateq_f32): Likewise.
19240 (__arm_vsubq_n_f16): Define intrinsic.
19241 (__arm_vsubq_n_f32): Likewise.
19242 (__arm_vbrsrq_n_f16): Likewise.
19243 (__arm_vbrsrq_n_f32): Likewise.
19244 (__arm_vcvtq_n_f16_s16): Likewise.
19245 (__arm_vcvtq_n_f32_s32): Likewise.
19246 (__arm_vcvtq_n_f16_u16): Likewise.
19247 (__arm_vcvtq_n_f32_u32): Likewise.
19248 (__arm_vcreateq_f16): Likewise.
19249 (__arm_vcreateq_f32): Likewise.
19250 (vsubq): Define polymorphic variant.
19251 (vbrsrq): Likewise.
19252 (vcvtq_n): Likewise.
19253 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
19255 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
19256 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
19257 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
19258 * config/arm/constraints.md (Rd): Define constraint to check constant is
19259 in the range of 1 to 16.
19260 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
19261 mve_vbrsrq_n_f<mode>: Likewise.
19262 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
19263 mve_vcreateq_f<mode>: Likewise.
19264 * config/arm/predicates.md (mve_imm_16): Define predicate to check
19265 the matching constraint Rd.
19267 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19268 Mihail Ionescu <mihail.ionescu@arm.com>
19269 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19271 * config/arm/arm-builtins.c (hi_UP): Define mode.
19272 * config/arm/arm.h (IS_VPR_REGNUM): Move.
19273 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
19274 (APSRQ_REGNUM): Modify.
19275 (APSRGE_REGNUM): Modify.
19276 * config/arm/arm_mve.h (vctp16q): Define macro.
19277 (vctp32q): Likewise.
19278 (vctp64q): Likewise.
19279 (vctp8q): Likewise.
19281 (__arm_vctp16q): Define intrinsic.
19282 (__arm_vctp32q): Likewise.
19283 (__arm_vctp64q): Likewise.
19284 (__arm_vctp8q): Likewise.
19285 (__arm_vpnot): Likewise.
19286 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
19288 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
19289 (mve_vpnothi): Likewise.
19291 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19292 Mihail Ionescu <mihail.ionescu@arm.com>
19293 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19295 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
19296 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
19297 (vdupq_n_s16): Likewise.
19298 (vdupq_n_s32): Likewise.
19299 (vabsq_s8): Likewise.
19300 (vabsq_s16): Likewise.
19301 (vabsq_s32): Likewise.
19302 (vclsq_s8): Likewise.
19303 (vclsq_s16): Likewise.
19304 (vclsq_s32): Likewise.
19305 (vclzq_s8): Likewise.
19306 (vclzq_s16): Likewise.
19307 (vclzq_s32): Likewise.
19308 (vnegq_s8): Likewise.
19309 (vnegq_s16): Likewise.
19310 (vnegq_s32): Likewise.
19311 (vaddlvq_s32): Likewise.
19312 (vaddvq_s8): Likewise.
19313 (vaddvq_s16): Likewise.
19314 (vaddvq_s32): Likewise.
19315 (vmovlbq_s8): Likewise.
19316 (vmovlbq_s16): Likewise.
19317 (vmovltq_s8): Likewise.
19318 (vmovltq_s16): Likewise.
19319 (vmvnq_s8): Likewise.
19320 (vmvnq_s16): Likewise.
19321 (vmvnq_s32): Likewise.
19322 (vrev16q_s8): Likewise.
19323 (vrev32q_s8): Likewise.
19324 (vrev32q_s16): Likewise.
19325 (vqabsq_s8): Likewise.
19326 (vqabsq_s16): Likewise.
19327 (vqabsq_s32): Likewise.
19328 (vqnegq_s8): Likewise.
19329 (vqnegq_s16): Likewise.
19330 (vqnegq_s32): Likewise.
19331 (vcvtaq_s16_f16): Likewise.
19332 (vcvtaq_s32_f32): Likewise.
19333 (vcvtnq_s16_f16): Likewise.
19334 (vcvtnq_s32_f32): Likewise.
19335 (vcvtpq_s16_f16): Likewise.
19336 (vcvtpq_s32_f32): Likewise.
19337 (vcvtmq_s16_f16): Likewise.
19338 (vcvtmq_s32_f32): Likewise.
19339 (vmvnq_u8): Likewise.
19340 (vmvnq_u16): Likewise.
19341 (vmvnq_u32): Likewise.
19342 (vdupq_n_u8): Likewise.
19343 (vdupq_n_u16): Likewise.
19344 (vdupq_n_u32): Likewise.
19345 (vclzq_u8): Likewise.
19346 (vclzq_u16): Likewise.
19347 (vclzq_u32): Likewise.
19348 (vaddvq_u8): Likewise.
19349 (vaddvq_u16): Likewise.
19350 (vaddvq_u32): Likewise.
19351 (vrev32q_u8): Likewise.
19352 (vrev32q_u16): Likewise.
19353 (vmovltq_u8): Likewise.
19354 (vmovltq_u16): Likewise.
19355 (vmovlbq_u8): Likewise.
19356 (vmovlbq_u16): Likewise.
19357 (vrev16q_u8): Likewise.
19358 (vaddlvq_u32): Likewise.
19359 (vcvtpq_u16_f16): Likewise.
19360 (vcvtpq_u32_f32): Likewise.
19361 (vcvtnq_u16_f16): Likewise.
19362 (vcvtmq_u16_f16): Likewise.
19363 (vcvtmq_u32_f32): Likewise.
19364 (vcvtaq_u16_f16): Likewise.
19365 (vcvtaq_u32_f32): Likewise.
19366 (__arm_vdupq_n_s8): Define intrinsic.
19367 (__arm_vdupq_n_s16): Likewise.
19368 (__arm_vdupq_n_s32): Likewise.
19369 (__arm_vabsq_s8): Likewise.
19370 (__arm_vabsq_s16): Likewise.
19371 (__arm_vabsq_s32): Likewise.
19372 (__arm_vclsq_s8): Likewise.
19373 (__arm_vclsq_s16): Likewise.
19374 (__arm_vclsq_s32): Likewise.
19375 (__arm_vclzq_s8): Likewise.
19376 (__arm_vclzq_s16): Likewise.
19377 (__arm_vclzq_s32): Likewise.
19378 (__arm_vnegq_s8): Likewise.
19379 (__arm_vnegq_s16): Likewise.
19380 (__arm_vnegq_s32): Likewise.
19381 (__arm_vaddlvq_s32): Likewise.
19382 (__arm_vaddvq_s8): Likewise.
19383 (__arm_vaddvq_s16): Likewise.
19384 (__arm_vaddvq_s32): Likewise.
19385 (__arm_vmovlbq_s8): Likewise.
19386 (__arm_vmovlbq_s16): Likewise.
19387 (__arm_vmovltq_s8): Likewise.
19388 (__arm_vmovltq_s16): Likewise.
19389 (__arm_vmvnq_s8): Likewise.
19390 (__arm_vmvnq_s16): Likewise.
19391 (__arm_vmvnq_s32): Likewise.
19392 (__arm_vrev16q_s8): Likewise.
19393 (__arm_vrev32q_s8): Likewise.
19394 (__arm_vrev32q_s16): Likewise.
19395 (__arm_vqabsq_s8): Likewise.
19396 (__arm_vqabsq_s16): Likewise.
19397 (__arm_vqabsq_s32): Likewise.
19398 (__arm_vqnegq_s8): Likewise.
19399 (__arm_vqnegq_s16): Likewise.
19400 (__arm_vqnegq_s32): Likewise.
19401 (__arm_vmvnq_u8): Likewise.
19402 (__arm_vmvnq_u16): Likewise.
19403 (__arm_vmvnq_u32): Likewise.
19404 (__arm_vdupq_n_u8): Likewise.
19405 (__arm_vdupq_n_u16): Likewise.
19406 (__arm_vdupq_n_u32): Likewise.
19407 (__arm_vclzq_u8): Likewise.
19408 (__arm_vclzq_u16): Likewise.
19409 (__arm_vclzq_u32): Likewise.
19410 (__arm_vaddvq_u8): Likewise.
19411 (__arm_vaddvq_u16): Likewise.
19412 (__arm_vaddvq_u32): Likewise.
19413 (__arm_vrev32q_u8): Likewise.
19414 (__arm_vrev32q_u16): Likewise.
19415 (__arm_vmovltq_u8): Likewise.
19416 (__arm_vmovltq_u16): Likewise.
19417 (__arm_vmovlbq_u8): Likewise.
19418 (__arm_vmovlbq_u16): Likewise.
19419 (__arm_vrev16q_u8): Likewise.
19420 (__arm_vaddlvq_u32): Likewise.
19421 (__arm_vcvtpq_u16_f16): Likewise.
19422 (__arm_vcvtpq_u32_f32): Likewise.
19423 (__arm_vcvtnq_u16_f16): Likewise.
19424 (__arm_vcvtmq_u16_f16): Likewise.
19425 (__arm_vcvtmq_u32_f32): Likewise.
19426 (__arm_vcvtaq_u16_f16): Likewise.
19427 (__arm_vcvtaq_u32_f32): Likewise.
19428 (__arm_vcvtaq_s16_f16): Likewise.
19429 (__arm_vcvtaq_s32_f32): Likewise.
19430 (__arm_vcvtnq_s16_f16): Likewise.
19431 (__arm_vcvtnq_s32_f32): Likewise.
19432 (__arm_vcvtpq_s16_f16): Likewise.
19433 (__arm_vcvtpq_s32_f32): Likewise.
19434 (__arm_vcvtmq_s16_f16): Likewise.
19435 (__arm_vcvtmq_s32_f32): Likewise.
19436 (vdupq_n): Define polymorphic variant.
19441 (vaddlvq): Likewise.
19442 (vaddvq): Likewise.
19443 (vmovlbq): Likewise.
19444 (vmovltq): Likewise.
19446 (vrev16q): Likewise.
19447 (vrev32q): Likewise.
19448 (vqabsq): Likewise.
19449 (vqnegq): Likewise.
19450 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
19451 (UNOP_SNONE_NONE): Likewise.
19452 (UNOP_UNONE_UNONE): Likewise.
19453 (UNOP_UNONE_NONE): Likewise.
19454 * config/arm/constraints.md (e): Define new constriant to allow only
19456 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
19457 (mve_vnegq_s<mode>): Likewise.
19458 (mve_vmvnq_<supf><mode>): Likewise.
19459 (mve_vdupq_n_<supf><mode>): Likewise.
19460 (mve_vclzq_<supf><mode>): Likewise.
19461 (mve_vclsq_s<mode>): Likewise.
19462 (mve_vaddvq_<supf><mode>): Likewise.
19463 (mve_vabsq_s<mode>): Likewise.
19464 (mve_vrev32q_<supf><mode>): Likewise.
19465 (mve_vmovltq_<supf><mode>): Likewise.
19466 (mve_vmovlbq_<supf><mode>): Likewise.
19467 (mve_vcvtpq_<supf><mode>): Likewise.
19468 (mve_vcvtnq_<supf><mode>): Likewise.
19469 (mve_vcvtmq_<supf><mode>): Likewise.
19470 (mve_vcvtaq_<supf><mode>): Likewise.
19471 (mve_vrev16q_<supf>v16qi): Likewise.
19472 (mve_vaddlvq_<supf>v4si): Likewise.
19474 2020-03-17 Jakub Jelinek <jakub@redhat.com>
19476 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
19478 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
19480 * read-rtl-function.c (find_param_by_name,
19481 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
19483 * spellcheck.c (get_edit_distance_cutoff): Likewise.
19484 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
19485 * tree.def (SWITCH_EXPR): Likewise.
19486 * selftest.c (assert_str_contains): Likewise.
19487 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
19489 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
19490 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
19491 * langhooks.h (struct lang_hooks_for_decls): Likewise.
19492 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
19493 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
19495 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
19496 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
19497 * tree.c (component_ref_size): Likewise.
19498 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
19499 * gimple-ssa-sprintf.c (get_string_length, format_string,
19500 format_directive): Likewise.
19501 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
19502 * input.c (string_concat_db::get_string_concatenation,
19503 test_lexer_string_locations_ucn4): Likewise.
19504 * cfgexpand.c (pass_expand::execute): Likewise.
19505 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
19506 maybe_diag_overlap): Likewise.
19507 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
19508 * shrink-wrap.c (spread_components): Likewise.
19509 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
19511 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
19513 * dwarf2out.c (dwarf2out_early_finish): Likewise.
19514 * gimple-ssa-store-merging.c: Likewise.
19515 * ira-costs.c (record_operand_costs): Likewise.
19516 * tree-vect-loop.c (vectorizable_reduction): Likewise.
19517 * target.def (dispatch): Likewise.
19518 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
19519 in documentation text.
19520 * doc/tm.texi: Regenerated.
19521 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
19522 duplicated word issue in a comment.
19523 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
19524 * config/i386/i386-features.c (remove_partial_avx_dependency):
19526 * config/msp430/msp430.c (msp430_select_section): Likewise.
19527 * config/gcn/gcn-run.c (load_image): Likewise.
19528 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
19529 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
19530 * config/aarch64/falkor-tag-collision-avoidance.c
19531 (single_dest_per_chain): Likewise.
19532 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
19533 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
19534 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
19535 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
19537 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
19538 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
19539 * config/rs6000/rs6000-logue.c
19540 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
19541 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
19542 Fix various other issues in the comment.
19544 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
19546 * config/arm/t-rmprofile: create new multilib for
19547 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
19550 2020-03-17 Jakub Jelinek <jakub@redhat.com>
19552 PR tree-optimization/94015
19553 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
19554 function where EXP is address of the bytes being stored rather than
19555 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
19556 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
19557 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
19558 calling native_encode_expr if host or target doesn't have 8-bit
19559 chars. Formatting fixes.
19560 (count_nonzero_bytes_addr): New function.
19562 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19563 Mihail Ionescu <mihail.ionescu@arm.com>
19564 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19566 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
19567 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
19568 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
19569 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
19570 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
19571 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
19572 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
19573 (vmvnq_n_s32): Likewise.
19574 (vrev64q_s8): Likewise.
19575 (vrev64q_s16): Likewise.
19576 (vrev64q_s32): Likewise.
19577 (vcvtq_s16_f16): Likewise.
19578 (vcvtq_s32_f32): Likewise.
19579 (vrev64q_u8): Likewise.
19580 (vrev64q_u16): Likewise.
19581 (vrev64q_u32): Likewise.
19582 (vmvnq_n_u16): Likewise.
19583 (vmvnq_n_u32): Likewise.
19584 (vcvtq_u16_f16): Likewise.
19585 (vcvtq_u32_f32): Likewise.
19586 (__arm_vmvnq_n_s16): Define intrinsic.
19587 (__arm_vmvnq_n_s32): Likewise.
19588 (__arm_vrev64q_s8): Likewise.
19589 (__arm_vrev64q_s16): Likewise.
19590 (__arm_vrev64q_s32): Likewise.
19591 (__arm_vrev64q_u8): Likewise.
19592 (__arm_vrev64q_u16): Likewise.
19593 (__arm_vrev64q_u32): Likewise.
19594 (__arm_vmvnq_n_u16): Likewise.
19595 (__arm_vmvnq_n_u32): Likewise.
19596 (__arm_vcvtq_s16_f16): Likewise.
19597 (__arm_vcvtq_s32_f32): Likewise.
19598 (__arm_vcvtq_u16_f16): Likewise.
19599 (__arm_vcvtq_u32_f32): Likewise.
19600 (vrev64q): Define polymorphic variant.
19601 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
19602 (UNOP_SNONE_NONE): Likewise.
19603 (UNOP_SNONE_IMM): Likewise.
19604 (UNOP_UNONE_UNONE): Likewise.
19605 (UNOP_UNONE_NONE): Likewise.
19606 (UNOP_UNONE_IMM): Likewise.
19607 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
19608 (mve_vcvtq_from_f_<supf><mode>): Likewise.
19609 (mve_vmvnq_n_<supf><mode>): Likewise.
19611 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19612 Mihail Ionescu <mihail.ionescu@arm.com>
19613 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19615 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
19616 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
19617 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
19618 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
19619 (vrndxq_f32): Likewise.
19620 (vrndq_f16) Likewise.
19621 (vrndq_f32): Likewise.
19622 (vrndpq_f16): Likewise.
19623 (vrndpq_f32): Likewise.
19624 (vrndnq_f16): Likewise.
19625 (vrndnq_f32): Likewise.
19626 (vrndmq_f16): Likewise.
19627 (vrndmq_f32): Likewise.
19628 (vrndaq_f16): Likewise.
19629 (vrndaq_f32): Likewise.
19630 (vrev64q_f16): Likewise.
19631 (vrev64q_f32): Likewise.
19632 (vnegq_f16): Likewise.
19633 (vnegq_f32): Likewise.
19634 (vdupq_n_f16): Likewise.
19635 (vdupq_n_f32): Likewise.
19636 (vabsq_f16): Likewise.
19637 (vabsq_f32): Likewise.
19638 (vrev32q_f16): Likewise.
19639 (vcvttq_f32_f16): Likewise.
19640 (vcvtbq_f32_f16): Likewise.
19641 (vcvtq_f16_s16): Likewise.
19642 (vcvtq_f32_s32): Likewise.
19643 (vcvtq_f16_u16): Likewise.
19644 (vcvtq_f32_u32): Likewise.
19645 (__arm_vrndxq_f16): Define intrinsic.
19646 (__arm_vrndxq_f32): Likewise.
19647 (__arm_vrndq_f16): Likewise.
19648 (__arm_vrndq_f32): Likewise.
19649 (__arm_vrndpq_f16): Likewise.
19650 (__arm_vrndpq_f32): Likewise.
19651 (__arm_vrndnq_f16): Likewise.
19652 (__arm_vrndnq_f32): Likewise.
19653 (__arm_vrndmq_f16): Likewise.
19654 (__arm_vrndmq_f32): Likewise.
19655 (__arm_vrndaq_f16): Likewise.
19656 (__arm_vrndaq_f32): Likewise.
19657 (__arm_vrev64q_f16): Likewise.
19658 (__arm_vrev64q_f32): Likewise.
19659 (__arm_vnegq_f16): Likewise.
19660 (__arm_vnegq_f32): Likewise.
19661 (__arm_vdupq_n_f16): Likewise.
19662 (__arm_vdupq_n_f32): Likewise.
19663 (__arm_vabsq_f16): Likewise.
19664 (__arm_vabsq_f32): Likewise.
19665 (__arm_vrev32q_f16): Likewise.
19666 (__arm_vcvttq_f32_f16): Likewise.
19667 (__arm_vcvtbq_f32_f16): Likewise.
19668 (__arm_vcvtq_f16_s16): Likewise.
19669 (__arm_vcvtq_f32_s32): Likewise.
19670 (__arm_vcvtq_f16_u16): Likewise.
19671 (__arm_vcvtq_f32_u32): Likewise.
19672 (vrndxq): Define polymorphic variants.
19674 (vrndpq): Likewise.
19675 (vrndnq): Likewise.
19676 (vrndmq): Likewise.
19677 (vrndaq): Likewise.
19678 (vrev64q): Likewise.
19681 (vrev32q): Likewise.
19682 (vcvtbq_f32): Likewise.
19683 (vcvttq_f32): Likewise.
19685 * config/arm/arm_mve_builtins.def (VAR2): Define.
19687 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
19688 (mve_vrndq_f<mode>): Likewise.
19689 (mve_vrndpq_f<mode>): Likewise.
19690 (mve_vrndnq_f<mode>): Likewise.
19691 (mve_vrndmq_f<mode>): Likewise.
19692 (mve_vrndaq_f<mode>): Likewise.
19693 (mve_vrev64q_f<mode>): Likewise.
19694 (mve_vnegq_f<mode>): Likewise.
19695 (mve_vdupq_n_f<mode>): Likewise.
19696 (mve_vabsq_f<mode>): Likewise.
19697 (mve_vrev32q_fv8hf): Likewise.
19698 (mve_vcvttq_f32_f16v4sf): Likewise.
19699 (mve_vcvtbq_f32_f16v4sf): Likewise.
19700 (mve_vcvtq_to_f_<supf><mode>): Likewise.
19702 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19703 Mihail Ionescu <mihail.ionescu@arm.com>
19704 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19706 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
19708 (ARM_BUILTIN_MVE_PATTERN_START): Define.
19709 (arm_init_mve_builtins): Define function.
19710 (arm_init_builtins): Add TARGET_HAVE_MVE check.
19711 (arm_expand_builtin_1): Check the range of fcode.
19712 (arm_expand_mve_builtin): Define function to expand MVE builtins.
19713 (arm_expand_builtin): Check the range of fcode.
19714 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
19716 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
19717 (vst4q_s8): Define macro.
19718 (vst4q_s16): Likewise.
19719 (vst4q_s32): Likewise.
19720 (vst4q_u8): Likewise.
19721 (vst4q_u16): Likewise.
19722 (vst4q_u32): Likewise.
19723 (vst4q_f16): Likewise.
19724 (vst4q_f32): Likewise.
19725 (__arm_vst4q_s8): Define inline builtin.
19726 (__arm_vst4q_s16): Likewise.
19727 (__arm_vst4q_s32): Likewise.
19728 (__arm_vst4q_u8): Likewise.
19729 (__arm_vst4q_u16): Likewise.
19730 (__arm_vst4q_u32): Likewise.
19731 (__arm_vst4q_f16): Likewise.
19732 (__arm_vst4q_f32): Likewise.
19733 (__ARM_mve_typeid): Define macro with MVE types.
19734 (__ARM_mve_coerce): Define macro with _Generic feature.
19735 (vst4q): Define polymorphic variant for different vst4q builtins.
19736 * config/arm/arm_mve_builtins.def: New file.
19737 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
19739 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
19740 (unspec): Define unspec.
19741 (mve_vst4q<mode>): Define RTL pattern.
19742 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
19744 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
19746 (define_split): Allow OI mode split for MVE after reload.
19747 (define_split): Allow XI mode split for MVE after reload.
19748 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
19749 (arm-builtins.o): Likewise.
19751 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
19753 * c-typeck.c (process_init_element): Handle constructor_type with
19754 type size represented by POLY_INT_CST.
19756 2020-03-17 Jakub Jelinek <jakub@redhat.com>
19758 PR tree-optimization/94187
19759 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
19760 nchars - offset < nbytes.
19762 PR middle-end/94189
19763 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
19764 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
19765 for code-generation.
19767 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
19770 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
19771 after changing memory subreg.
19773 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19774 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19776 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
19777 emulator calls for dobule precision arithmetic operations for MVE.
19779 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19780 Mihail Ionescu <mihail.ionescu@arm.com>
19781 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19783 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
19784 feature bit is on and -mfpu=auto is passed as compiler option, do not
19785 generate error on not finding any matching fpu. Because in this case
19786 fpu is not required.
19787 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
19788 enabled for MVE and also for all VFP extensions.
19789 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
19791 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
19792 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
19793 along with feature bits mve_float.
19794 (mve): Modify add options in armv8.1-m.main arch for MVE.
19795 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
19797 * config/arm/arm.c (use_return_insn): Replace the
19798 check with TARGET_VFP_BASE.
19799 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
19801 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
19802 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
19804 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
19805 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
19807 (arm_compute_frame_layout): Likewise.
19808 (arm_save_coproc_regs): Likewise.
19809 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
19811 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
19812 with equivalent macro TARGET_VFP_BASE.
19813 (arm_expand_epilogue_apcs_frame): Likewise.
19814 (arm_expand_epilogue): Likewise.
19815 (arm_conditional_register_usage): Likewise.
19816 (arm_declare_function_name): Add check to skip printing .fpu directive
19817 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
19819 * config/arm/arm.h (TARGET_VFP_BASE): Define.
19820 * config/arm/arm.md (arch): Add "mve" to arch.
19821 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
19822 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
19823 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
19824 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
19826 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
19827 to not allow for MVE.
19828 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
19830 (VUNSPEC_GET_FPSCR): Define.
19831 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
19832 instructions which move to general-purpose Register from Floating-point
19833 Special register and vice-versa.
19834 (thumb2_movhi_fp16): Likewise.
19835 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
19836 with MCR and MRC instructions which set and get Floating-point Status
19837 and Control Register (FPSCR).
19838 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
19840 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
19841 float move patterns in MVE.
19842 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
19843 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
19844 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
19845 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
19846 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
19847 TARGET_VFP_BASE check.
19848 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
19849 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
19851 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
19852 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
19856 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19857 Mihail Ionescu <mihail.ionescu@arm.com>
19858 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19860 * config.gcc (arm_mve.h): Include mve intrinsics header file.
19861 * config/arm/aout.h (p0): Add new register name for MVE predicated
19863 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
19864 common to Neon and MVE.
19865 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
19866 (arm_init_simd_builtin_types): Disable poly types for MVE.
19867 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
19868 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
19869 ARM_BUILTIN_NEON_LANE_CHECK.
19870 (mve_dereference_pointer): Add function.
19871 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
19873 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
19874 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
19875 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
19876 with floating point enabled.
19877 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
19878 simd_immediate_valid_for_move.
19879 (simd_immediate_valid_for_move): Renamed from
19880 neon_immediate_valid_for_move function.
19881 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
19882 error if vfpv2 feature bit is disabled and mve feature bit is also
19883 disabled for HARD_FLOAT_ABI.
19884 (use_return_insn): Check to not push VFP regs for MVE.
19885 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
19887 (aapcs_vfp_allocate_return_reg): Likewise.
19888 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
19889 address operand for MVE.
19890 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
19891 (neon_valid_immediate): Rename to simd_valid_immediate.
19892 (simd_valid_immediate): Rename from neon_valid_immediate.
19893 (simd_valid_immediate): MVE check on size of vector is 128 bits.
19894 (neon_immediate_valid_for_move): Rename to
19895 simd_immediate_valid_for_move.
19896 (simd_immediate_valid_for_move): Rename from
19897 neon_immediate_valid_for_move.
19898 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
19900 (neon_make_constant): Modify call to neon_valid_immediate function.
19901 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
19903 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
19904 (arm_compute_frame_layout): Calculate space for saved VFP registers for
19906 (arm_save_coproc_regs): Save coproc registers for MVE.
19907 (arm_print_operand): Add case 'E' to print memory operands for MVE.
19908 (arm_print_operand_address): Check to print register number for MVE.
19909 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
19910 (arm_modes_tieable_p): Check to allow structure mode for MVE.
19911 (arm_regno_class): Add VPR_REGNUM check.
19912 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
19914 (arm_expand_epilogue): MVE check for enabling pop instructions in
19916 (arm_print_asm_arch_directives): Modify function to disable print of
19917 .arch_extension "mve" and "fp" for cases where MVE is enabled with
19919 (arm_vector_mode_supported_p): Check for modes available in MVE interger
19920 and MVE floating point.
19921 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
19923 (arm_conditional_register_usage): Enable usage of conditional regsiter
19925 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
19926 (arm_declare_function_name): Modify function to disable print of
19927 .arch_extension "mve" and "fp" for cases where MVE is enabled with
19929 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
19930 when target general registers are required.
19931 (TARGET_HAVE_MVE_FLOAT): Likewise.
19932 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
19934 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
19935 which indicate this is not available for across function calls.
19936 (FIRST_PSEUDO_REGISTER): Modify.
19937 (VALID_MVE_MODE): Define valid MVE mode.
19938 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
19939 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
19940 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
19941 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
19943 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
19944 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
19945 (enum reg_class): Add VPR_REG entry.
19946 (REG_CLASS_NAMES): Add VPR_REG entry.
19947 * config/arm/arm.md (VPR_REGNUM): Define.
19948 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
19949 "unconditional" instructions.
19950 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
19951 (movdf_soft_insn): Modify RTL to not allow for MVE.
19952 (vfp_pop_multiple_with_writeback): Enable for MVE.
19953 (include "mve.md"): Include mve.md file.
19954 * config/arm/arm_mve.h: Add MVE intrinsics head file.
19955 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
19956 for vector predicated operands.
19957 * config/arm/iterators.md (VNIM1): Define.
19958 (VNINOTM1): Define.
19959 (VHFBF_split): Define
19960 * config/arm/mve.md: New file.
19961 (mve_mov<mode>): Define RTL for move, store and load in MVE.
19962 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
19964 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
19965 simd_immediate_valid_for_move.
19966 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
19967 is common to MVE and NEON to vec-common.md file.
19968 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
19969 * config/arm/predicates.md (vpr_register_operand): Define.
19970 * config/arm/t-arm: Add mve.md file.
19971 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
19973 (mve_store): Add MVE instructions mve_store to attribute "type".
19974 (mve_load): Add MVE instructions mve_load to attribute "type".
19975 (is_mve_type): Define attribute.
19976 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
19977 standard move patterns in MVE along with NEON and IWMMXT with mode
19979 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
19980 and IWMMXT with mode iterator V8HF.
19981 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
19983 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
19984 simd_immediate_valid_for_move.
19987 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
19990 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
19991 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
19993 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
19995 2020-03-16 Jakub Jelinek <jakub@redhat.com>
19998 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
20001 PR tree-optimization/94166
20002 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
20003 as secondary comparison key.
20005 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
20007 PR tree-optimization/94125
20008 * tree-loop-distribution.c
20009 (loop_distribution::break_alias_scc_partitions): Update post order
20010 number for merged scc.
20012 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
20015 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
20017 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
20018 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
20019 and ext_sse_reg_operand check.
20021 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
20023 * common.opt: Avoid redundancy in the help text.
20024 * config/arc/arc.opt: Likewise.
20025 * config/cr16/cr16.opt: Likewise.
20027 2020-03-14 Jakub Jelinek <jakub@redhat.com>
20029 PR middle-end/93566
20030 * tree-nested.c (convert_nonlocal_omp_clauses,
20031 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
20032 with C/C++ array sections.
20034 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
20037 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
20038 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
20041 2020-03-14 Jakub Jelinek <jakub@redhat.com>
20043 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
20044 "a an" to "an" in a comment.
20045 * hsa-common.h (is_a_helper): Likewise.
20046 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
20047 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
20048 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
20050 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
20053 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
20054 64-bit value by 64 bits (UB).
20056 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
20058 PR rtl-optimization/92303
20059 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
20061 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
20063 PR rtl-optimization/94148
20064 PR rtl-optimization/94042
20065 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
20066 (df_worklist_propagate_forward): New parameter last_change_age, use
20067 that instead of bb->aux.
20068 (df_worklist_propagate_backward): Ditto.
20069 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
20071 2020-03-13 Richard Biener <rguenther@suse.de>
20073 PR tree-optimization/94163
20074 * tree-ssa-pre.c (create_expression_by_pieces): Check
20075 whether alignment would be zero.
20077 2020-03-13 Martin Liska <mliska@suse.cz>
20080 * lto-wrapper.c (run_gcc): Use concat for appending
20081 to collect_gcc_options.
20083 2020-03-13 Jakub Jelinek <jakub@redhat.com>
20086 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
20087 instead of GEN_INT.
20089 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
20092 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
20093 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
20094 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
20095 TARGET_AVX512VL and ext_sse_reg_operand check.
20097 2020-03-13 Bu Le <bule1@huawei.com>
20100 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
20101 (-param=aarch64-double-recp-precision=): New options.
20102 * doc/invoke.texi: Document them.
20103 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
20104 instead of hard-coding the choice of 1 for float and 2 for double.
20106 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
20108 PR rtl-optimization/94119
20109 * resource.h (clear_hashed_info_until_next_barrier): Declare.
20110 * resource.c (clear_hashed_info_until_next_barrier): New function.
20111 * reorg.c (add_to_delay_list): Fix formatting.
20112 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
20113 the next instruction after removing a BARRIER.
20115 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
20117 PR middle-end/92071
20118 * expmed.c (store_integral_bit_field): For fields larger than a word,
20119 call extract_bit_field on the value if the mode is BLKmode. Remove
20120 specific path for big-endian targets and tidy things up a little bit.
20122 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
20124 PR rtl-optimization/90275
20125 * cse.c (cse_insn): Delete no-op register moves too.
20127 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
20129 * config/rx/rx.md (CTRLREG_CPEN): Remove.
20130 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
20132 2020-03-12 Richard Biener <rguenther@suse.de>
20134 PR tree-optimization/94103
20135 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
20136 punning when the mode precision is not sufficient.
20138 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
20141 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
20142 MODE_V1DF and MODE_V2SF.
20143 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
20144 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
20147 2020-03-12 Jakub Jelinek <jakub@redhat.com>
20149 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
20150 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
20151 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
20152 * doc/tm.texi: Regenerated.
20154 PR tree-optimization/94130
20155 * tree-ssa-dse.c: Include gimplify.h.
20156 (increment_start_addr): If stmt has lhs, drop the lhs from call and
20157 set it after the call to the original value of the first argument.
20159 (decrement_count): Formatting fix.
20161 2020-03-11 Delia Burduv <delia.burduv@arm.com>
20163 * config/arm/arm-builtins.c
20164 (arm_init_simd_builtin_scalar_types): New.
20165 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
20166 (vld2q_bf16): Used new builtin type.
20167 (vld3_bf16): Used new builtin type.
20168 (vld3q_bf16): Used new builtin type.
20169 (vld4_bf16): Used new builtin type.
20170 (vld4q_bf16): Used new builtin type.
20171 (vld2_dup_bf16): Used new builtin type.
20172 (vld2q_dup_bf16): Used new builtin type.
20173 (vld3_dup_bf16): Used new builtin type.
20174 (vld3q_dup_bf16): Used new builtin type.
20175 (vld4_dup_bf16): Used new builtin type.
20176 (vld4q_dup_bf16): Used new builtin type.
20178 2020-03-11 Jakub Jelinek <jakub@redhat.com>
20181 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
20182 at the start to switch to data section. Don't print extra newline if
20183 .globl directive has not been emitted.
20185 2020-03-11 Richard Biener <rguenther@suse.de>
20187 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
20190 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
20192 PR middle-end/93961
20193 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
20194 whose type is a qualified union.
20196 2020-03-11 Jakub Jelinek <jakub@redhat.com>
20199 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
20200 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
20203 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
20205 (get_nth_most_common_value): Use abs_hwi instead of abs.
20207 PR middle-end/94111
20208 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
20209 is rvc_normal, otherwise use real_to_decimal to print the number to
20212 PR tree-optimization/94114
20213 * tree-loop-distribution.c (generate_memset_builtin): Call
20214 rewrite_to_non_trapping_overflow even on mem.
20215 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
20218 2020-03-10 Jeff Law <law@redhat.com>
20220 * config/bfin/bfin.md (movsi_insv): Add length attribute.
20222 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
20225 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
20226 NAN and SIGNED_ZEROR for smax/smin.
20228 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
20231 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
20232 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
20234 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
20236 * loop-iv.c (find_simple_exit): Make it static.
20237 * cfgloop.h: Remove the corresponding prototype.
20239 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
20241 * ddg.c (create_ddg): Fix intendation.
20242 (set_recurrence_length): Likewise.
20243 (create_ddg_all_sccs): Likewise.
20245 2020-03-10 Jakub Jelinek <jakub@redhat.com>
20248 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
20249 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
20252 2020-03-09 Jason Merrill <jason@redhat.com>
20254 * gdbinit.in (pgs): Fix typo in documentation.
20256 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
20260 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
20262 PR rtl-optimization/93564
20263 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
20264 do not honor reg alloc order.
20266 2020-03-09 Andrew Pinski <apinski@marvell.com>
20268 PR inline-asm/94095
20269 * doc/extend.texi (x86 Operand Modifiers): Fix column
20272 2020-03-09 Martin Liska <mliska@suse.cz>
20275 * config/rs6000/rs6000.c (rs6000_option_override_internal):
20276 Remove set of str_align_loops and str_align_jumps as these
20277 should be set in previous 2 conditions in the function.
20279 2020-03-09 Jakub Jelinek <jakub@redhat.com>
20281 PR rtl-optimization/94045
20282 * params.opt (-param=max-find-base-term-values=): New option.
20283 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
20284 in a single toplevel find_base_term call.
20286 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
20289 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
20290 * config/aarch64/aarch64-simd.md
20291 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
20292 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
20293 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
20294 * config/aarch64/arm_neon.h:
20295 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
20296 (vmlal_lane_u16): Likewise.
20297 (vmlal_lane_s32): Likewise.
20298 (vmlal_lane_u32): Likewise.
20299 (vmlal_laneq_s16): Likewise.
20300 (vmlal_laneq_u16): Likewise.
20301 (vmlal_laneq_s32): Likewise.
20302 (vmlal_laneq_u32): Likewise.
20303 (vmull_lane_s16): Likewise.
20304 (vmull_lane_u16): Likewise.
20305 (vmull_lane_s32): Likewise.
20306 (vmull_lane_u32): Likewise.
20307 (vmull_laneq_s16): Likewise.
20308 (vmull_laneq_u16): Likewise.
20309 (vmull_laneq_s32): Likewise.
20310 (vmull_laneq_u32): Likewise.
20311 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
20314 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
20316 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
20317 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
20318 (aarch64_mls_elt<mode>): Likewise.
20319 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
20320 (aarch64_fma4_elt<mode>): Likewise.
20321 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
20322 (aarch64_fma4_elt_to_64v2df): Likewise.
20323 (aarch64_fnma4_elt<mode>): Likewise.
20324 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
20325 (aarch64_fnma4_elt_to_64v2df): Likewise.
20327 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20329 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
20330 Specify movprfx attribute.
20331 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
20333 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
20336 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
20338 (TARGET_NO_FP_IN_TOC): Same.
20339 * config/rs6000/aix71.h: Same.
20340 * config/rs6000/aix72.h: Same.
20342 2020-03-06 Andrew Pinski <apinski@marvell.com>
20343 Jeff Law <law@redhat.com>
20345 PR rtl-optimization/93996
20346 * haifa-sched.c (remove_notes): Be more careful when adding
20349 2020-03-06 Delia Burduv <delia.burduv@arm.com>
20351 * config/arm/arm_neon.h (vld2_bf16): New.
20357 (vld2_dup_bf16): New.
20358 (vld2q_dup_bf16): New.
20359 (vld3_dup_bf16): New.
20360 (vld3q_dup_bf16): New.
20361 (vld4_dup_bf16): New.
20362 (vld4q_dup_bf16): New.
20363 * config/arm/arm_neon_builtins.def
20364 (vld2): Changed to VAR13 and added v4bf, v8bf
20365 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
20366 (vld3): Changed to VAR13 and added v4bf, v8bf
20367 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
20368 (vld4): Changed to VAR13 and added v4bf, v8bf
20369 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
20370 * config/arm/iterators.md (VDXBF2): New iterator.
20371 *config/arm/neon.md (neon_vld2): Use new iterators.
20372 (neon_vld2_dup<mode): Use new iterators.
20373 (neon_vld3<mode>): Likewise.
20374 (neon_vld3qa<mode>): Likewise.
20375 (neon_vld3qb<mode>): Likewise.
20376 (neon_vld3_dup<mode>): Likewise.
20377 (neon_vld4<mode>): Likewise.
20378 (neon_vld4qa<mode>): Likewise.
20379 (neon_vld4qb<mode>): Likewise.
20380 (neon_vld4_dup<mode>): Likewise.
20381 (neon_vld2_dupv8bf): New.
20382 (neon_vld3_dupv8bf): Likewise.
20383 (neon_vld4_dupv8bf): Likewise.
20385 2020-03-06 Delia Burduv <delia.burduv@arm.com>
20387 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
20388 (bfloat16x8x2_t): New typedef.
20389 (bfloat16x4x3_t): New typedef.
20390 (bfloat16x8x3_t): New typedef.
20391 (bfloat16x4x4_t): New typedef.
20392 (bfloat16x8x4_t): New typedef.
20399 * config/arm/arm-builtins.c (v2bf_UP): Define.
20401 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
20402 * config/arm/arm-modes.def (V2BF): New mode.
20403 * config/arm/arm-simd-builtin-types.def
20404 (Bfloat16x2_t): New entry.
20405 * config/arm/arm_neon_builtins.def
20406 (vst2): Changed to VAR13 and added v4bf, v8bf
20407 (vst3): Changed to VAR13 and added v4bf, v8bf
20408 (vst4): Changed to VAR13 and added v4bf, v8bf
20409 * config/arm/iterators.md (VDXBF): New iterator.
20410 (VQ2BF): New iterator.
20411 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
20412 (neon_vst2<mode>): Used new iterators.
20413 (neon_vst3<mode>): Used new iterators.
20414 (neon_vst3<mode>): Used new iterators.
20415 (neon_vst3qa<mode>): Used new iterators.
20416 (neon_vst3qb<mode>): Used new iterators.
20417 (neon_vst4<mode>): Used new iterators.
20418 (neon_vst4<mode>): Used new iterators.
20419 (neon_vst4qa<mode>): Used new iterators.
20420 (neon_vst4qb<mode>): Used new iterators.
20422 2020-03-06 Delia Burduv <delia.burduv@arm.com>
20424 * config/aarch64/aarch64-simd-builtins.def
20425 (bfcvtn): New built-in function.
20426 (bfcvtn_q): New built-in function.
20427 (bfcvtn2): New built-in function.
20428 (bfcvt): New built-in function.
20429 * config/aarch64/aarch64-simd.md
20430 (aarch64_bfcvtn<q><mode>): New pattern.
20431 (aarch64_bfcvtn2v8bf): New pattern.
20432 (aarch64_bfcvtbf): New pattern.
20433 * config/aarch64/arm_bf16.h (float32_t): New typedef.
20434 (vcvth_bf16_f32): New intrinsic.
20435 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
20436 (vcvtq_low_bf16_f32): New intrinsic.
20437 (vcvtq_high_bf16_f32): New intrinsic.
20438 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
20439 (UNSPEC_BFCVTN): New UNSPEC.
20440 (UNSPEC_BFCVTN2): New UNSPEC.
20441 (UNSPEC_BFCVT): New UNSPEC.
20442 * config/arm/types.md (bf_cvt): New type.
20444 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
20446 * config/s390/s390.md ("tabort"): Get rid of two consecutive
20447 blanks in format string.
20449 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
20453 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
20454 * config/i386/i386.c (ix86_get_ssemov): New function.
20455 (ix86_output_ssemov): Likewise.
20456 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
20457 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
20459 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
20460 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
20461 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
20462 (*movti_internal): Likewise.
20463 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
20465 2020-03-05 Jeff Law <law@redhat.com>
20467 PR tree-optimization/91890
20468 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
20469 Use gimple_or_expr_nonartificial_location.
20470 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
20471 Use gimple_or_expr_nonartificial_location.
20472 * gimple.c (gimple_or_expr_nonartificial_location): New function.
20473 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
20474 * tree-ssa-strlen.c (maybe_warn_overflow): Use
20475 gimple_or_expr_nonartificial_location.
20476 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
20477 (maybe_warn_pointless_strcmp): Likewise.
20479 2020-03-05 Jakub Jelinek <jakub@redhat.com>
20482 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
20483 SRC and MASK arguments to __m128 from __m128d.
20484 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
20486 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
20488 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
20489 argument to __m128i from __m128d.
20490 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
20492 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
20493 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
20496 2020-03-05 Delia Burduv <delia.burduv@arm.com>
20498 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
20499 (vbfmlalbq_f32): New.
20500 (vbfmlaltq_f32): New.
20501 (vbfmlalbq_lane_f32): New.
20502 (vbfmlaltq_lane_f32): New.
20503 (vbfmlalbq_laneq_f32): New.
20504 (vbfmlaltq_laneq_f32): New.
20505 * config/arm/arm_neon_builtins.def (vmmla): New.
20510 (vfmab_laneq): New.
20511 (vfmat_laneq): New.
20512 * config/arm/iterators.md (BF_MA): New int iterator.
20513 (bt): New int attribute.
20514 (VQXBF): Copy of VQX with V8BF.
20515 * config/arm/neon.md (neon_vmmlav8bf): New insn.
20516 (neon_vfma<bt>v8bf): New insn.
20517 (neon_vfma<bt>_lanev8bf): New insn.
20518 (neon_vfma<bt>_laneqv8bf): New expand.
20519 (neon_vget_high<mode>): Changed iterator to VQXBF.
20520 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
20521 (UNSPEC_BFMAB): New UNSPEC.
20522 (UNSPEC_BFMAT): New UNSPEC.
20524 2020-03-05 Jakub Jelinek <jakub@redhat.com>
20526 PR middle-end/93399
20527 * tree-pretty-print.h (pretty_print_string): Declare.
20528 * tree-pretty-print.c (pretty_print_string): Remove forward
20529 declaration, no longer static. Change nbytes parameter type
20530 from unsigned to size_t.
20531 * print-rtl.c (print_value) <case CONST_STRING>: Use
20532 pretty_print_string and for shrink way too long strings.
20534 2020-03-05 Richard Biener <rguenther@suse.de>
20535 Jakub Jelinek <jakub@redhat.com>
20537 PR tree-optimization/93582
20538 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
20539 last operand as signed when looking for memset offset. Formatting
20542 2020-03-04 Andrew Pinski <apinski@marvell.com>
20545 * value-prof.c (dump_histogram_value): Use std::abs.
20547 2020-03-04 Martin Sebor <msebor@redhat.com>
20549 PR tree-optimization/93986
20550 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
20551 operands to the same precision widest_int to avoid ICEs.
20553 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
20556 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
20557 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
20558 for OPTION_MASK_ALTIVEC.
20560 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
20562 * config.gcc: Include the glibc-stdint.h header for zTPF.
20564 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
20566 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
20567 direct FPR-GPR copies.
20568 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
20571 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
20573 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
20574 operands to the prologue_tpf expander.
20575 (s390_emit_epilogue): Likewise.
20576 (s390_option_override_internal): Do error checking and setup for
20578 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
20579 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
20580 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
20581 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
20582 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
20583 operands for the check flag and the branch target.
20584 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
20585 ("mtpf-trace-hook-prologue-target")
20586 ("mtpf-trace-hook-epilogue-check")
20587 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
20589 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
20590 options are for debugging purposes and will not be documented
20593 2020-03-04 Jakub Jelinek <jakub@redhat.com>
20596 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
20598 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
20599 argument. Change pd argument so that it can be modified. Turn
20600 constant non-CONSTRUCTOR store into non-constant if it is too large.
20601 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
20603 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
20606 2020-02-04 Richard Biener <rguenther@suse.de>
20608 PR tree-optimization/93964
20609 * graphite-isl-ast-to-gimple.c
20610 (gcc_expression_from_isl_ast_expr_id): Add intermediate
20611 conversion for pointer to integer converts.
20612 * graphite-scop-detection.c (assign_parameter_index_in_region):
20615 2020-03-04 Martin Liska <mliska@suse.cz>
20619 * doc/invoke.texi: Clarify --help=language and --help=common
20622 2020-03-04 Jakub Jelinek <jakub@redhat.com>
20624 PR tree-optimization/94001
20625 * tree-tailcall.c (process_assignment): Before comparing op1 to
20626 *ass_var, verify *ass_var is non-NULL.
20628 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
20631 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
20634 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
20636 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
20637 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
20638 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
20639 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
20640 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
20641 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
20642 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
20643 (V_bf_low, V_bf_cvt_m): New mode attributes.
20644 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
20645 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
20646 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
20647 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
20648 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
20650 2020-03-03 Jakub Jelinek <jakub@redhat.com>
20652 PR tree-optimization/93582
20653 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
20654 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
20655 members, initialize them in the constructor and if mask is non-NULL,
20656 artificially push_partial_def {} for the portions of the mask that
20658 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
20659 val and return (void *)-1. Formatting fix.
20660 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
20662 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
20663 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
20665 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
20667 (visit_stmt): Formatting fix.
20669 2020-03-03 Richard Biener <rguenther@suse.de>
20671 PR tree-optimization/93946
20672 * alias.h (refs_same_for_tbaa_p): Declare.
20673 * alias.c (refs_same_for_tbaa_p): New function.
20674 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
20676 * tree-ssa-scopedtables.h
20677 (avail_exprs_stack::lookup_avail_expr): Add output argument
20678 giving access to the hashtable entry.
20679 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
20681 * tree-ssa-dom.c: Include alias.h.
20682 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
20683 removing redundant store.
20684 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
20685 (ao_ref_init_from_vn_reference): Adjust prototype.
20686 (vn_reference_lookup_pieces): Likewise.
20687 (vn_reference_insert_pieces): Likewise.
20688 * tree-ssa-sccvn.c: Track base alias set in addition to alias
20690 (eliminate_dom_walker::eliminate_stmt): Also check base alias
20691 set when removing redundant stores.
20692 (visit_reference_op_store): Likewise.
20693 * dse.c (record_store): Adjust valdity check for redundant
20696 2020-03-03 Jakub Jelinek <jakub@redhat.com>
20699 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
20701 PR rtl-optimization/94002
20702 * explow.c (plus_constant): Punt if cst has VOIDmode and
20703 get_pool_mode is different from mode.
20705 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20707 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
20708 address has an offset which fits the scalling constraint for a
20709 load/store operation.
20710 (legitimate_scaled_address_p): Update use
20711 leigitimate_small_data_address_p.
20712 (arc_print_operand): Likewise.
20713 (arc_legitimate_address_p): Likewise.
20714 (legitimate_small_data_address_p): Likewise.
20716 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20718 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
20719 (fnmasf4_fpu): Likewise.
20721 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20723 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
20725 (subdi3): Likewise.
20726 (adddi3_i): Remove pattern.
20727 (subdi3_i): Likewise.
20729 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20731 * config/arc/arc.md (eh_return): Add length info.
20733 2020-03-02 David Malcolm <dmalcolm@redhat.com>
20735 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
20737 2020-03-02 David Malcolm <dmalcolm@redhat.com>
20739 * doc/invoke.texi (Static Analyzer Options): Add
20740 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
20743 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
20746 * config/i386/i386.md (movstrict<mode>): Allow only
20747 registers with VALID_INT_MODE_P modes.
20749 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
20751 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
20752 (reduc_insn): Use 'U' and 'B' operand codes.
20753 (reduc_<reduc_op>_scal_<mode>): Allow all types.
20754 (reduc_<reduc_op>_scal_v64di): Delete.
20755 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
20756 (*plus_carry_dpp_shr_v64si): Change to ...
20757 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
20758 (mov_from_lane63_v64di): Change to ...
20759 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
20760 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
20761 Support UNSPEC_MOV_DPP_SHR output formats.
20762 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
20763 Add "use_extends" reductions.
20764 (print_operand_address): Add 'I' and 'U' codes.
20765 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
20767 2020-03-02 Martin Liska <mliska@suse.cz>
20769 * lto-wrapper.c: Fix typo in comment about
20770 C++ standard version.
20772 2020-03-01 Martin Sebor <msebor@redhat.com>
20775 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
20777 2020-03-01 Martin Sebor <msebor@redhat.com>
20779 PR middle-end/93829
20780 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
20781 of a pointer in the outermost ADDR_EXPRs.
20783 2020-02-28 Jeff Law <law@redhat.com>
20785 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
20786 * config/v850/v850.c (v850_asm_trampoline_template): Update
20789 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
20792 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
20795 2020-02-28 Martin Liska <mliska@suse.cz>
20798 * configure.ac: Improve detection of ld_date by requiring
20799 either two dashes or none.
20800 * configure: Regenerate.
20802 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
20804 PR rtl-optimization/93564
20805 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
20806 do not honor reg alloc order.
20808 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
20811 * config/aarch64/aarch64.c (aarch64_override_options): Fix
20812 misleading warning string.
20814 2020-02-27 Martin Sebor <msebor@redhat.com>
20816 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
20818 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
20821 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
20822 Split the insn into two parts. This insn only does variable
20823 extract from a register.
20824 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
20825 variable extract from memory.
20826 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
20827 only does variable extract from a register.
20828 (vsx_extract_v4sf_var_load): New insn, do variable extract from
20830 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
20831 into two parts. This insn only does variable extract from a
20833 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
20834 do variable extract from memory.
20836 2020-02-27 Martin Jambor <mjambor@suse.cz>
20837 Feng Xue <fxue@os.amperecomputing.com>
20840 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
20841 new function calls_same_node_or_its_all_contexts_clone_p.
20842 (cgraph_edge_brings_value_p): Use it.
20843 (cgraph_edge_brings_value_p): Likewise.
20844 (self_recursive_pass_through_p): Return false if caller is a clone.
20845 (self_recursive_agg_pass_through_p): Likewise.
20847 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
20849 PR middle-end/92152
20850 * alias.c (ends_tbaa_access_path_p): Break out from ...
20851 (component_uses_parent_alias_set_from): ... here.
20852 * alias.h (ends_tbaa_access_path_p): Declare.
20853 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
20854 handle trailing arrays past end of tbaa access path.
20855 (aliasing_component_refs_p): ... here; likewise.
20856 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
20857 path; disambiguate also past end of it.
20858 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
20861 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
20863 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
20864 beginning of the file.
20865 (vcreate_bf16, vcombine_bf16): New.
20866 (vdup_n_bf16, vdupq_n_bf16): New.
20867 (vdup_lane_bf16, vdup_laneq_bf16): New.
20868 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
20869 (vduph_lane_bf16, vduph_laneq_bf16): New.
20870 (vset_lane_bf16, vsetq_lane_bf16): New.
20871 (vget_lane_bf16, vgetq_lane_bf16): New.
20872 (vget_high_bf16, vget_low_bf16): New.
20873 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
20874 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
20875 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
20876 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
20877 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
20878 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
20879 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
20880 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
20881 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
20882 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
20883 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
20884 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
20885 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
20886 (vreinterpretq_bf16_p128): New.
20887 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
20888 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
20889 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
20890 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
20891 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
20892 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
20893 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
20894 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
20895 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
20896 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
20897 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
20898 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
20899 (vreinterpretq_p128_bf16): New.
20900 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
20901 (V_elem): Likewise.
20902 (V_elem_l): Likewise.
20903 (VD_LANE): Likewise.
20905 (V_DOUBLE): Likewise.
20906 (VDQX): Add V4BF and V8BF.
20907 (V_two_elem, V_three_elem, V_four_elem): Likewise.
20909 (V_HALF): Likewise.
20910 (V_double_vector_mode): Likewise.
20911 (V_cmp_result): Likewise.
20912 (V_uf_sclr): Likewise.
20913 (V_sz_elem): Likewise.
20914 (Is_d_reg): Likewise.
20915 (V_mode_nunits): Likewise.
20916 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
20918 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
20920 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
20921 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
20922 (<expander><mode>3<exec>): Likewise.
20923 (<expander><mode>3): New.
20924 (v<expander><mode>3): New.
20925 (<expander><mode>3): New.
20926 (<expander><mode>3<exec>): Rename to ...
20927 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
20928 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
20930 2020-02-27 Alexandre Oliva <oliva@adacore.com>
20932 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
20935 2020-02-27 Richard Biener <rguenther@suse.de>
20937 PR tree-optimization/93508
20938 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
20939 non-_CHK variants. Valueize their length arguments.
20941 2020-02-27 Richard Biener <rguenther@suse.de>
20943 PR tree-optimization/93953
20944 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
20945 to the hash-map entry.
20947 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
20949 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
20951 2020-02-27 Mark Williams <mwilliams@fb.com>
20953 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
20954 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
20955 -ffile-prefix-map and -fmacro-prefix-map.
20956 * lto-streamer-out.c: Include file-prefix-map.h.
20957 (lto_output_location): Remap the file part of locations.
20959 2020-02-27 Jakub Jelinek <jakub@redhat.com>
20962 * gimplify.c (gimplify_init_constructor): Don't promote readonly
20963 DECL_REGISTER variables to TREE_STATIC.
20965 PR tree-optimization/93582
20966 PR tree-optimization/93945
20967 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
20968 non-zero INTEGER_CST second argument and ref->offset or ref->size
20969 not a multiple of BITS_PER_UNIT.
20971 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
20973 * doc/install.texi (Binaries): Update description of BullFreeware.
20975 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
20979 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
20980 C++ Language Options, Warning Options, and Static Analyzer
20981 Options lists. Document negative form of options enabled by
20982 default. Move some things around to more accurately sort
20983 warnings by category.
20984 (C++ Dialect Options, Warning Options, Static Analyzer
20985 Options): Document negative form of options when enabled by
20986 default. Move some things around to more accurately sort
20987 warnings by category. Add some missing index entries.
20988 Light copy-editing.
20990 2020-02-26 Carl Love <cel@us.ibm.com>
20993 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
20994 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
20995 for the vector unsigned short arguments. It is also listed as the
20996 name of the built-in for arguments vector unsigned short,
20997 vector unsigned int and vector unsigned long long built-ins. The
20998 name of the builtins for these arguments should be:
20999 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
21000 __builtin_crypto_vpmsumd respectively.
21002 2020-02-26 Richard Biener <rguenther@suse.de>
21004 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
21005 and load permutation.
21007 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
21009 PR middle-end/93843
21010 * optabs-tree.c (supportable_convert_operation): Reject types with
21013 2020-02-26 David Malcolm <dmalcolm@redhat.com>
21015 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
21017 2020-02-26 Jakub Jelinek <jakub@redhat.com>
21019 PR tree-optimization/93820
21020 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
21021 argument to ALL_INTEGER_CST_P boolean.
21022 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
21023 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
21024 adjacent INTEGER_CST store into merged_store->only_constants like
21027 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21030 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
21032 * cfghooks.c (verify_flow_info): Likewise.
21033 * predict.c (combine_predictions_for_bb): Likewise.
21034 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
21035 sucessor -> successor.
21036 (find_traces_1_round): Fix comment typo, destinarion -> destination.
21037 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
21039 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
21040 message typo, sucessors -> successors.
21042 2020-02-25 Martin Sebor <msebor@redhat.com>
21044 * doc/extend.texi (attribute access): Correct an example.
21046 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
21048 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
21050 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
21051 (VAR15, VAR16): New.
21052 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
21053 (VD): Enable for V4BF.
21055 (VQ): Enable for V8BF.
21057 (VQ_NO2E): Likewise.
21058 (VDBL, Vdbl): Add V4BF.
21059 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
21060 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
21061 (bfloat16x8x2_t): Likewise.
21062 (bfloat16x4x3_t): Likewise.
21063 (bfloat16x8x3_t): Likewise.
21064 (bfloat16x4x4_t): Likewise.
21065 (bfloat16x8x4_t): Likewise.
21066 (vcombine_bf16): New.
21067 (vld1_bf16, vld1_bf16_x2): New.
21068 (vld1_bf16_x3, vld1_bf16_x4): New.
21069 (vld1q_bf16, vld1q_bf16_x2): New.
21070 (vld1q_bf16_x3, vld1q_bf16_x4): New.
21071 (vld1_lane_bf16): New.
21072 (vld1q_lane_bf16): New.
21073 (vld1_dup_bf16): New.
21074 (vld1q_dup_bf16): New.
21077 (vld2_dup_bf16): New.
21078 (vld2q_dup_bf16): New.
21081 (vld3_dup_bf16): New.
21082 (vld3q_dup_bf16): New.
21085 (vld4_dup_bf16): New.
21086 (vld4q_dup_bf16): New.
21087 (vst1_bf16, vst1_bf16_x2): New.
21088 (vst1_bf16_x3, vst1_bf16_x4): New.
21089 (vst1q_bf16, vst1q_bf16_x2): New.
21090 (vst1q_bf16_x3, vst1q_bf16_x4): New.
21091 (vst1_lane_bf16): New.
21092 (vst1q_lane_bf16): New.
21100 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
21102 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
21103 (VALL_F16): Likewise.
21104 (VALLDI_F16): Likewise.
21106 (Vetype): Likewise.
21107 (vswap_width_name): Likewise.
21108 (VSWAP_WIDTH): Likewise.
21112 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
21113 (vget_lane_bf16, vgetq_lane_bf16): New.
21114 (vcreate_bf16): New.
21115 (vdup_n_bf16, vdupq_n_bf16): New.
21116 (vdup_lane_bf16, vdup_laneq_bf16): New.
21117 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
21118 (vduph_lane_bf16, vduph_laneq_bf16): New.
21119 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
21120 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
21121 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
21122 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
21123 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
21124 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
21125 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
21126 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
21127 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
21128 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
21129 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
21130 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
21131 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
21132 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
21133 (vreinterpretq_bf16_p128): New.
21134 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
21135 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
21136 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
21137 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
21138 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
21139 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
21140 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
21141 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
21142 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
21143 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
21144 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
21145 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
21146 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
21147 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
21148 (vreinterpretq_p128_bf16): New.
21150 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
21152 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
21153 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
21154 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
21155 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
21156 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
21157 * config/arm/iterators.md (VSF2BF): New attribute.
21158 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
21159 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
21160 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
21162 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
21164 * config/arm/arm.md (required_for_purecode): New attribute.
21165 (enabled): Handle required_for_purecode.
21166 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
21167 work with -mpure-code.
21169 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21171 PR rtl-optimization/93908
21172 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
21175 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
21177 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
21179 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
21181 * doc/install.texi (--enable-checking): Adjust wording.
21183 2020-02-25 Richard Biener <rguenther@suse.de>
21185 PR tree-optimization/93868
21186 * tree-vect-slp.c (slp_copy_subtree): New function.
21187 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
21188 re-arranging stmts in it.
21190 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21192 PR middle-end/93874
21193 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
21194 dummy function and remove it at the end.
21196 PR translation/93864
21197 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
21198 paramter -> parameter.
21199 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
21200 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
21202 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
21204 * doc/install.texi (--enable-checking): Properly document current
21206 (--enable-stage1-checking): Minor clarification about bootstrap.
21208 2020-02-24 David Malcolm <dmalcolm@redhat.com>
21211 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
21212 -fanalyzer-checker=taint is also required.
21213 (-fanalyzer-checker=): Note that providing this option enables the
21214 given checker, and doing so may be required for checkers that are
21215 disabled by default.
21217 2020-02-24 David Malcolm <dmalcolm@redhat.com>
21219 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
21220 significant control flow events; add a "3" which shows all
21221 control flow events; the old "3" becomes "4".
21223 2020-02-24 Jakub Jelinek <jakub@redhat.com>
21225 PR tree-optimization/93582
21226 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
21227 pd.offset and pd.size to be counted in bits rather than bytes, add
21228 support for maxsizei that is not a multiple of BITS_PER_UNIT and
21229 handle bitfield stores and loads.
21230 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
21231 uncomparable quantities - bytes vs. bits. Allow push_partial_def
21232 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
21233 pd.offset/pd.size to be counted in bits rather than bytes.
21234 Formatting fix. Rename shadowed len variable to buflen.
21236 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
21237 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
21240 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
21241 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
21242 * opts-common.c (parse_options_from_collect_gcc_options): New function.
21243 (prepend_xassembler_to_collect_as_options): Likewise.
21244 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
21245 (prepend_xassembler_to_collect_as_options): Likewise.
21246 * lto-opts.c (lto_write_options): Stream assembler options
21247 in COLLECT_AS_OPTIONS.
21248 * lto-wrapper.c (xassembler_options_error): New static variable.
21249 (get_options_from_collect_gcc_options): Move parsing options code to
21250 parse_options_from_collect_gcc_options and call it.
21251 (merge_and_complain): Validate -Xassembler options.
21252 (append_compiler_options): Handle OPT_Xassembler.
21253 (run_gcc): Append command line -Xassembler options to
21254 collect_gcc_options.
21255 * doc/invoke.texi: Add documentation about using Xassembler
21258 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
21260 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
21262 (riscv_rtx_costs): Update cost model for LTGT.
21264 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
21266 PR rtl-optimization/93564
21267 * ira-color.c (struct update_cost_queue_elem): New member start.
21268 (queue_update_cost, get_next_update_cost): Add new arg start.
21269 (allocnos_conflict_p): New function.
21270 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
21271 Add checking conflicts with allocnos_conflict_p.
21272 (update_costs_from_prefs, restore_costs_from_copies): Adjust
21273 update_costs_from_allocno calls.
21274 (update_conflict_hard_regno_costs): Add checking conflicts with
21275 allocnos_conflict_p. Adjust calls of queue_update_cost and
21276 get_next_update_cost.
21277 (assign_hard_reg): Adjust calls of queue_update_cost. Add
21279 (bucket_allocno_compare_func): Restore previous version.
21281 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
21283 * config/pa/pa.c (pa_function_value): Fix check for word and
21284 double-word size when handling aggregate return values.
21285 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
21286 that homogeneous SFmode and DFmode aggregates are passed and returned
21287 in general registers.
21289 2020-02-21 Jakub Jelinek <jakub@redhat.com>
21291 PR translation/93759
21292 * opts.c (print_filtered_help): Translate help before appending
21293 messages to it rather than after that.
21295 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
21297 PR rtl-optimization/PR92989
21298 * lra-lives.c (process_bb_lives): Restore the original order
21299 of the bb liveness update. Call make_hard_regno_dead for each
21300 register clobbered at the start of an EH receiver.
21302 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
21305 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
21306 self-recursively generated.
21308 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
21311 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
21314 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
21316 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
21317 Document new target supports option.
21319 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
21321 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
21322 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
21323 * config/arm/iterators.md (MATMUL): New iterator.
21324 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
21325 (mmla_sfx): New attribute.
21326 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
21327 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
21328 (UNSPEC_MATMUL_US): New.
21330 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21332 * config/arm/arm.md: Prevent scalar shifts from being used when big
21335 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
21336 Richard Biener <rguenther@suse.de>
21338 PR tree-optimization/93586
21339 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
21340 after mismatched array refs; do not sure type size information to
21341 recover from unmatched referneces with !flag_strict_aliasing_p.
21343 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
21345 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
21346 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
21347 (scatter_store<mode>): Rename to ...
21348 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
21349 (scatter<mode>_exec): Delete. Move contents ...
21350 (mask_scatter_store<mode>): ... here, and rename that to ...
21351 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
21352 Remove mode conversion.
21353 (mask_gather_load<mode>): Rename to ...
21354 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
21355 Remove mode conversion.
21356 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
21358 2020-02-21 Martin Jambor <mjambor@suse.cz>
21360 PR tree-optimization/93845
21361 * tree-sra.c (verify_sra_access_forest): Only test access size of
21364 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
21366 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
21367 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
21368 (addv64di3_exec): Likewise.
21369 (subv64di3): Likewise.
21370 (subv64di3_exec): Likewise.
21371 (addv64di3_zext): Likewise.
21372 (addv64di3_zext_exec): Likewise.
21373 (addv64di3_zext_dup): Likewise.
21374 (addv64di3_zext_dup_exec): Likewise.
21375 (addv64di3_zext_dup2): Likewise.
21376 (addv64di3_zext_dup2_exec): Likewise.
21377 (addv64di3_sext_dup2): Likewise.
21378 (addv64di3_sext_dup2_exec): Likewise.
21379 (<expander>v64di3): Likewise.
21380 (<expander>v64di3_exec): Likewise.
21381 (*<reduc_op>_dpp_shr_v64di): Likewise.
21382 (*plus_carry_dpp_shr_v64di): Likewise.
21383 * config/gcn/gcn.md (adddi3): Likewise.
21384 (addptrdi3): Likewise.
21385 (<expander>di3): Likewise.
21387 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
21389 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
21391 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21393 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
21394 support. Use aarch64_emit_mult instead of emitting multiplication
21395 instructions directly.
21396 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
21397 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
21399 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21401 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
21402 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
21403 instead of emitting multiplication instructions directly.
21404 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
21405 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
21406 (@aarch64_frecps<mode>): New expanders.
21408 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21410 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
21411 on and produce uint64_ts rather than ints.
21412 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
21413 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
21415 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21417 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
21418 an unused xmsk register when handling approximate rsqrt.
21420 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21422 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
21423 flag_finite_math_only condition.
21425 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
21428 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
21429 to destination operand for shufps alternative.
21430 (*vec_extractv2si_1): Ditto.
21432 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
21435 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
21438 2020-02-20 Martin Liska <mliska@suse.cz>
21440 PR translation/93831
21441 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
21443 2020-02-20 Martin Liska <mliska@suse.cz>
21445 PR translation/93830
21446 * common/config/avr/avr-common.c: Remote trailing "|".
21448 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
21450 * collect2.c (maybe_run_lto_and_relink): Fix typo in
21453 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
21455 PR tree-optimization/93767
21456 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
21457 access-size bias from the offset calculations for negative strides.
21459 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
21461 * collect2.c (c_file, o_file): Make const again.
21462 (ldout,lderrout, dump_ld_file): Remove.
21463 (tool_cleanup): Avoid calling not signal-safe functions.
21464 (maybe_run_lto_and_relink): Avoid possible signal handler
21465 access to unintialzed memory (lto_o_files).
21466 (main): Avoid leaking temp files in $TMPDIR.
21467 Initialize c_file/o_file with concat, which avoids exposing
21468 uninitialized memory to signal handler, which calls unlink(!).
21469 Avoid calling maybe_unlink when the main function returns,
21470 since the atexit handler is already doing this.
21471 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
21473 2020-02-19 Martin Jambor <mjambor@suse.cz>
21475 PR tree-optimization/93776
21476 * tree-sra.c (create_access): Do not create zero size accesses.
21477 (get_access_for_expr): Do not search for zero sized accesses.
21479 2020-02-19 Martin Jambor <mjambor@suse.cz>
21481 PR tree-optimization/93667
21482 * tree-sra.c (scalarizable_type_p): Return false if record fields
21483 do not follow wach other.
21485 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
21487 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
21488 rather than fmv.x.s/fmv.s.x.
21490 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
21492 * config/aarch64/aarch64-simd-builtins.def
21493 (intrinsic_vec_smult_lo_): New.
21494 (intrinsic_vec_umult_lo_): Likewise.
21495 (vec_widen_smult_hi_): Likewise.
21496 (vec_widen_umult_hi_): Likewise.
21497 * config/aarch64/aarch64-simd.md
21498 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
21499 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
21500 (vmull_high_s16): Likewise.
21501 (vmull_high_s32): Likewise.
21502 (vmull_high_u8): Likewise.
21503 (vmull_high_u16): Likewise.
21504 (vmull_high_u32): Likewise.
21505 (vmull_s8): Likewise.
21506 (vmull_s16): Likewise.
21507 (vmull_s32): Likewise.
21508 (vmull_u8): Likewise.
21509 (vmull_u16): Likewise.
21510 (vmull_u32): Likewise.
21512 2020-02-18 Martin Liska <mliska@suse.cz>
21514 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
21515 bootstrap by missing removal of invalid sanity check.
21517 2020-02-18 Martin Liska <mliska@suse.cz>
21520 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
21521 Always compare LHS of gimple_assign.
21523 2020-02-18 Martin Liska <mliska@suse.cz>
21526 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
21527 and return type of functions.
21528 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
21529 Drop MALLOC attribute for void functions.
21530 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
21531 malloc_state for a new VOID clone.
21533 2020-02-18 Martin Liska <mliska@suse.cz>
21536 * common.opt: Add -fprofile-reproducibility.
21537 * doc/invoke.texi: Document it.
21538 * value-prof.c (dump_histogram_value):
21539 Document and support behavior for counters[0]
21540 being a negative value.
21541 (get_nth_most_common_value): Handle negative
21542 counters[0] in respect to flag_profile_reproducible.
21544 2020-02-18 Jakub Jelinek <jakub@redhat.com>
21547 * cgraph.c (verify_speculative_call): Use speculative_id instead of
21548 speculative_uid in messages. Remove trailing whitespace from error
21549 message. Use num_speculative_call_targets instead of
21550 num_speculative_targets in a message.
21551 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
21552 edge messages and stmt instead of cal_stmt in reference message.
21554 PR tree-optimization/93780
21555 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
21556 before calling build_vector_type.
21557 (execute_update_addresses_taken): Likewise.
21560 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
21561 typo, functoin -> function.
21562 * tree.c (free_lang_data_in_decl): Fix comment typo,
21563 functoin -> function.
21564 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
21566 2020-02-17 David Malcolm <dmalcolm@redhat.com>
21568 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
21570 (print_option_information): Don't call get_option_url if URLs
21573 2020-02-17 Alexandre Oliva <oliva@adacore.com>
21575 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
21576 handling of register_common-less targets.
21578 2020-02-17 Martin Liska <mliska@suse.cz>
21581 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
21583 2020-02-17 Martin Liska <mliska@suse.cz>
21585 PR translation/93755
21586 * config/rs6000/rs6000.c (rs6000_option_override_internal):
21589 2020-02-17 Martin Liska <mliska@suse.cz>
21592 * config/rx/elf.opt: Fix typo.
21594 2020-02-17 Richard Biener <rguenther@suse.de>
21597 * opts-global.c (print_ignored_options): Use inform and
21600 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
21603 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
21605 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
21608 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
21609 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
21611 2020-02-15 Jason Merrill <jason@redhat.com>
21613 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
21615 2020-02-15 Jakub Jelinek <jakub@redhat.com>
21617 PR tree-optimization/93744
21618 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
21619 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
21620 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
21621 sure @2 in the first and @1 in the other patterns has no side-effects.
21623 2020-02-15 David Malcolm <dmalcolm@redhat.com>
21624 Bernd Edlinger <bernd.edlinger@hotmail.de>
21628 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
21629 * configure.ac (--with-diagnostics-urls): New configuration
21630 option, based on --with-diagnostics-color.
21631 (DIAGNOSTICS_URLS_DEFAULT): New define.
21632 * config.h: Regenerate.
21633 * configure: Regenerate.
21634 * diagnostic.c (diagnostic_urls_init): Handle -1 for
21635 DIAGNOSTICS_URLS_DEFAULT from configure-time
21636 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
21637 and TERM_URLS environment variable.
21638 * diagnostic-url.h (diagnostic_url_format): New enum type.
21639 (diagnostic_urls_enabled_p): rename to...
21640 (determine_url_format): ... this, and change return type.
21641 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
21642 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
21643 the linux console, and mingw.
21644 (diagnostic_urls_enabled_p): rename to...
21645 (determine_url_format): ... this, and adjust.
21646 * pretty-print.h (pretty_printer::show_urls): rename to...
21647 (pretty_printer::url_format): ... this, and change to enum.
21648 * pretty-print.c (pretty_printer::pretty_printer,
21649 pp_begin_url, pp_end_url, test_urls): Adjust.
21650 * doc/install.texi (--with-diagnostics-urls): Document the new
21651 configuration option.
21652 (--with-diagnostics-color): Document the existing interaction
21653 with GCC_COLORS better.
21654 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
21655 vindex reference. Update description of defaults based on the above.
21656 (-fdiagnostics-color): Update description of how -fdiagnostics-color
21657 interacts with GCC_COLORS.
21659 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
21662 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
21663 conjunction with TARGET_GNU_TLS in early return.
21665 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
21667 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
21668 the mode is not wider than UNITS_PER_WORD.
21670 2020-02-14 Martin Jambor <mjambor@suse.cz>
21672 PR tree-optimization/93516
21673 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
21674 access of the same type as the parent.
21675 (propagate_subaccesses_from_lhs): Likewise.
21677 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
21680 * config/i386/avx512vbmi2intrin.h
21681 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
21682 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
21683 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
21684 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
21685 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
21686 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
21687 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
21688 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
21689 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
21690 of lacking a closing parenthesis.
21691 * config/i386/avx512vbmi2vlintrin.h
21692 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
21693 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
21694 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
21695 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
21696 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
21697 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
21698 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
21699 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
21700 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
21701 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
21702 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
21703 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
21704 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
21705 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
21706 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
21707 _mm_shldi_epi32, _mm_mask_shldi_epi32,
21708 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
21709 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
21711 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
21714 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
21715 the target function entry.
21717 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21719 * common/config/arc/arc-common.c (arc_option_optimization_table):
21720 Disable if-conversion step when optimized for size.
21722 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21724 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
21725 R12-R15 are always in ARCOMPACT16_REGS register class.
21726 * config/arc/arc.opt (mq-class): Deprecate.
21727 * config/arc/constraint.md ("q"): Remove dependency on mq-class
21729 * doc/invoke.texi (mq-class): Update text.
21730 * common/config/arc/arc-common.c (arc_option_optimization_table):
21733 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21735 * config/arc/arc.c (arc_insn_cost): New function.
21736 (TARGET_INSN_COST): Define.
21737 * config/arc/arc.md (cost): New attribute.
21738 (add_n): Use arc_nonmemory_operand.
21739 (ashlsi3_insn): Likewise, also update constraints.
21740 (ashrsi3_insn): Likewise.
21741 (rotrsi3): Likewise.
21742 (add_shift): Likewise.
21743 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
21745 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21747 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
21749 (umulsidi_600): Likewise.
21751 2020-02-13 Jakub Jelinek <jakub@redhat.com>
21754 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
21755 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
21756 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
21757 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
21758 pass __A to the builtin followed by __W instead of __A followed by
21760 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
21761 _mm512_mask_popcnt_epi64): Likewise.
21762 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
21763 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
21764 _mm256_mask_popcnt_epi64): Likewise.
21766 PR tree-optimization/93582
21767 * fold-const.h (shift_bytes_in_array_left,
21768 shift_bytes_in_array_right): Declare.
21769 * fold-const.c (shift_bytes_in_array_left,
21770 shift_bytes_in_array_right): New function, moved from
21771 gimple-ssa-store-merging.c, no longer static.
21772 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
21773 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
21774 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
21775 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
21776 shift_bytes_in_array.
21777 (verify_shift_bytes_in_array): Rename to ...
21778 (verify_shift_bytes_in_array_left): ... this. Use
21779 shift_bytes_in_array_left instead of shift_bytes_in_array.
21780 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
21781 instead of verify_shift_bytes_in_array.
21782 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
21783 / native_interpret_expr where the store covers all needed bits,
21784 punt on PDP-endian, otherwise allow all involved offsets and sizes
21785 not to be byte-aligned.
21788 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
21789 use const_0_to_255_operand predicate instead of immediate_operand.
21790 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
21791 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
21792 vgf2p8affineinvqb_<mode><mask_name>,
21793 vgf2p8affineqb_<mode><mask_name>): Drop mode from
21794 const_0_to_255_operand predicated operands.
21796 2020-02-12 Jeff Law <law@redhat.com>
21798 * config/h8300/h8300.md (comparison shortening peepholes): Use
21799 a mode iterator to merge the HImode and SImode peepholes.
21801 2020-02-12 Jakub Jelinek <jakub@redhat.com>
21803 PR middle-end/93663
21804 * real.c (is_even): Make static. Function comment fix.
21805 (is_halfway_below): Make static, don't assert R is not inf/nan,
21806 instead return false for those. Small formatting fixes.
21808 2020-02-12 Martin Sebor <msebor@redhat.com>
21810 PR middle-end/93646
21811 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
21812 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
21813 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
21814 (strlen_check_and_optimize_call): Adjust callee name.
21816 2020-02-12 Jeff Law <law@redhat.com>
21818 * config/h8300/h8300.md (comparison shortening peepholes): Drop
21819 (and (xor)) variant. Combine other two into single peephole.
21821 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
21823 PR rtl-optimization/93565
21824 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
21826 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
21828 * config/aarch64/aarch64-simd.md
21829 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
21830 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
21831 generating separate ADDV and zero_extend patterns.
21832 * config/aarch64/iterators.md (VDQV_E): New iterator.
21834 2020-02-12 Jeff Law <law@redhat.com>
21836 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
21837 expanders, splits, etc.
21838 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
21839 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
21840 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
21841 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
21842 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
21843 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
21844 function prototype.
21845 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
21847 2020-02-12 Jakub Jelinek <jakub@redhat.com>
21850 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
21851 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
21852 TARGET_AVX512DQ from condition.
21853 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
21854 instead of <mask_mode512bit_condition> in condition. If
21855 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
21857 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
21860 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
21863 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
21865 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
21867 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
21868 where strlen is more legible.
21869 (rs6000_builtin_vectorized_libmass): Ditto.
21870 (rs6000_print_options_internal): Ditto.
21872 2020-02-11 Martin Sebor <msebor@redhat.com>
21874 PR tree-optimization/93683
21875 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
21877 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
21879 * config/rs6000/predicates.md (cint34_operand): Rename the
21880 -mprefixed-addr option to be -mprefixed.
21881 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
21882 the -mprefixed-addr option to be -mprefixed.
21883 (OTHER_FUTURE_MASKS): Likewise.
21884 (POWERPC_MASKS): Likewise.
21885 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
21886 the -mprefixed-addr option to be -mprefixed. Change error
21887 messages to refer to -mprefixed.
21888 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
21890 (rs6000_legitimate_offset_address_p): Likewise.
21891 (rs6000_mode_dependent_address): Likewise.
21892 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
21893 "-mprefixed" for target attributes and pragmas.
21894 (address_to_insn_form): Rename the -mprefixed-addr option to be
21896 (rs6000_adjust_insn_length): Likewise.
21897 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
21898 -mprefixed-addr option to be -mprefixed.
21899 (ASM_OUTPUT_OPCODE): Likewise.
21900 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
21901 -mprefixed-addr option to be -mprefixed.
21902 * config/rs6000/rs6000.opt (-mprefixed): Rename the
21903 -mprefixed-addr option to be prefixed. Change the option from
21904 being undocumented to being documented.
21905 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
21906 -mprefixed option. Update the -mpcrel documentation to mention
21909 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
21911 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
21912 including FIRST_PSEUDO_REGISTER - 1.
21913 * ira-color.c (print_hard_reg_set): Ditto.
21915 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21917 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
21918 (USTERNOP_QUALIFIERS): New define.
21919 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
21920 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
21921 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
21922 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
21923 * config/arm/arm_neon.h (vusdot_s32): New.
21924 (vusdot_lane_s32): New.
21925 (vusdotq_lane_s32): New.
21926 (vsudot_lane_s32): New.
21927 (vsudotq_lane_s32): New.
21928 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
21929 * config/arm/iterators.md (DOTPROD_I8MM): New.
21930 (sup, opsuffix): Add <us/su>.
21931 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
21932 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
21934 2020-02-11 Richard Biener <rguenther@suse.de>
21936 PR tree-optimization/93661
21937 PR tree-optimization/93662
21938 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
21939 tree_to_poly_int64.
21940 * tree-sra.c (get_access_for_expr): Likewise.
21942 2020-02-10 Jakub Jelinek <jakub@redhat.com>
21945 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
21946 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
21947 Change condition from TARGET_AVX2 to TARGET_AVX.
21949 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
21952 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
21953 argument of strncmp.
21955 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
21957 Try to generate zero-based comparisons.
21958 * config/cris/cris.c (cris_reduce_compare): New function.
21959 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
21960 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
21961 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
21963 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
21966 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
21967 in Thumb state and also as a destination in Arm state. Add T16
21970 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
21972 * md.texi (Define Subst): Match closing paren in example.
21974 2020-02-10 Jakub Jelinek <jakub@redhat.com>
21978 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
21979 arguments of strncmp.
21981 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
21984 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
21985 but different source value.
21986 (adjust_callers_for_value_intersection): New function.
21987 (gather_edges_for_value): Adjust order of callers to let a
21988 non-self-recursive caller be the first element.
21989 (self_recursive_pass_through_p): Add a new parameter "simple", and
21990 check generalized self-recursive pass-through jump function.
21991 (self_recursive_agg_pass_through_p): Likewise.
21992 (find_more_scalar_values_for_callers_subset): Compute value from
21993 pass-through jump function for self-recursive.
21994 (intersect_with_plats): Cleanup previous implementation code for value
21995 itersection with self-recursive call edge.
21996 (intersect_with_agg_replacements): Likewise.
21997 (intersect_aggregates_with_edge): Deduce value from pass-through jump
21998 function for self-recursive call edge. Cleanup previous implementation
21999 code for value intersection with self-recursive call edge.
22000 (decide_whether_version_node): Remove dead callers and adjust order
22001 to let a non-self-recursive caller be the first element.
22003 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
22005 * recog.c: Move pass_split_before_sched2 code in front of
22006 pass_split_before_regstack.
22007 (pass_data_split_before_sched2): Rename pass to split3 from split4.
22008 (pass_data_split_before_regstack): Rename pass to split4 from split3.
22009 (rest_of_handle_split_before_sched2): Remove.
22010 (pass_split_before_sched2::execute): Unconditionally call
22012 (enable_split_before_sched2): New function.
22013 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
22014 (pass_split_before_regstack::gate): Ditto.
22015 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
22016 Update name check for renamed split4 pass.
22017 * config/sh/sh.c (register_sh_passes): Update pass insertion
22018 point for renamed split4 pass.
22020 2020-02-09 Jakub Jelinek <jakub@redhat.com>
22022 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
22023 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
22024 copying them around between host and target.
22026 2020-02-08 Andrew Pinski <apinski@marvell.com>
22029 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
22030 STRICT_ALIGNMENT also.
22032 2020-02-08 Jim Wilson <jimw@sifive.com>
22035 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
22037 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
22038 Jakub Jelinek <jakub@redhat.com>
22041 * config/i386/i386.h (CALL_USED_REGISTERS): Make
22042 xmm16-xmm31 call-used even in 64-bit ms-abi.
22044 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
22046 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
22047 (simd_ummla, simd_usmmla): Likewise.
22048 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
22049 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
22050 (vusmmlaq_s32): New.
22052 2020-02-07 Richard Biener <rguenther@suse.de>
22054 PR middle-end/93519
22055 * tree-inline.c (fold_marked_statements): Do a PRE walk,
22056 skipping unreachable regions.
22057 (optimize_inline_calls): Skip folding stmts when we didn't
22060 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
22063 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
22064 Don't return aggregates with only SFmode and DFmode in SSE
22066 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
22068 2020-02-07 Jakub Jelinek <jakub@redhat.com>
22071 * config/rs6000/rs6000-logue.c
22072 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
22073 if it fails, move rs into end_addr and retry. Add
22074 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
22075 the insn pattern doesn't describe well what exactly happens to
22079 * config/i386/predicates.md (avx_identity_operand): Remove.
22080 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
22081 (avx_<castmode><avxsizesuffix>_<castmode>,
22082 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
22083 a VEC_CONCAT of the operand and UNSPEC_CAST.
22084 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
22085 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
22089 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
22090 recog_data.insn if distance_non_agu_define changed it.
22092 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
22095 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
22096 we only had X-FORM (reg+reg) addressing for vectors. Also before
22097 ISA 3.0, we only had X-FORM addressing for scalars in the
22098 traditional Altivec registers.
22100 2020-02-06 <zhongyunde@huawei.com>
22101 Vladimir Makarov <vmakarov@redhat.com>
22103 PR rtl-optimization/93561
22104 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
22105 hard register range.
22107 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22109 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
22112 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
22114 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
22115 where the low and the high 32 bits are equal to each other specially,
22116 with an rldimi instruction.
22118 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
22120 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
22122 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
22124 * config/arm/arm-tables.opt: Regenerate.
22126 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22129 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
22130 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
22131 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
22133 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22135 PR rtl-optimization/87763
22136 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
22138 2020-02-06 Delia Burduv <delia.burduv@arm.com>
22140 * config/aarch64/aarch64-simd-builtins.def
22141 (bfmlaq): New built-in function.
22142 (bfmlalb): New built-in function.
22143 (bfmlalt): New built-in function.
22144 (bfmlalb_lane): New built-in function.
22145 (bfmlalt_lane): New built-in function.
22146 * config/aarch64/aarch64-simd.md
22147 (aarch64_bfmmlaqv4sf): New pattern.
22148 (aarch64_bfmlal<bt>v4sf): New pattern.
22149 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
22150 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
22151 (vbfmlalbq_f32): New intrinsic.
22152 (vbfmlaltq_f32): New intrinsic.
22153 (vbfmlalbq_lane_f32): New intrinsic.
22154 (vbfmlaltq_lane_f32): New intrinsic.
22155 (vbfmlalbq_laneq_f32): New intrinsic.
22156 (vbfmlaltq_laneq_f32): New intrinsic.
22157 * config/aarch64/iterators.md (BF_MLA): New int iterator.
22158 (bt): New int attribute.
22160 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
22162 * config/i386/i386.md (*pushtf): Emit "#" instead of
22163 calling gcc_unreachable in insn output.
22166 (*pushsf_rex64): Ditto for alternatives other than 1.
22167 (*pushsf): Ditto for alternatives other than 1.
22169 2020-02-06 Martin Liska <mliska@suse.cz>
22171 PR gcov-profile/91971
22172 PR gcov-profile/93466
22173 * coverage.c (coverage_init): Revert mangling of
22174 path into filename. It can lead to huge filename length.
22175 Creation of subfolders seem more natural.
22177 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22180 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
22181 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
22182 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
22184 2020-02-06 Jakub Jelinek <jakub@redhat.com>
22187 * config/i386/predicates.md (avx_identity_operand): New predicate.
22188 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
22189 define_insn_and_split.
22192 * omp-low.c (use_pointer_for_field): For nested constructs, also
22193 look for map clauses on target construct.
22194 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
22195 taskreg_nesting_level.
22198 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
22199 shared clause, call omp_notice_variable on outer context if any.
22201 2020-02-05 Jason Merrill <jason@redhat.com>
22204 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
22205 non-zero address even if weak and not yet defined.
22207 2020-02-05 Martin Sebor <msebor@redhat.com>
22209 PR tree-optimization/92765
22210 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
22211 * tree-ssa-strlen.c (compute_string_length): Remove.
22212 (determine_min_objsize): Remove.
22213 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
22214 Avoid using type size as the upper bound on string length.
22215 (handle_builtin_string_cmp): Add an argument. Adjust.
22216 (strlen_check_and_optimize_call): Pass additional argument to
22217 handle_builtin_string_cmp.
22219 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
22221 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
22222 (*pushdi2_rex64 peephole2): Unconditionally split after
22223 epilogue_completed.
22224 (*ashl<mode>3_doubleword): Ditto.
22225 (*<shift_insn><mode>3_doubleword): Ditto.
22227 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
22230 * config/rs6000/rs6000.c (get_vector_offset): Fix
22232 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
22234 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
22236 2020-02-05 David Malcolm <dmalcolm@redhat.com>
22238 * doc/analyzer.texi
22239 (Special Functions for Debugging the Analyzer): Update description
22240 of __analyzer_dump_exploded_nodes.
22242 2020-02-05 Jakub Jelinek <jakub@redhat.com>
22245 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
22246 include sets and not clobbers in the vzeroupper pattern.
22247 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
22248 the parallel has 17 (64-bit) or 9 (32-bit) elts.
22249 (*avx_vzeroupper_1): New define_insn_and_split.
22252 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
22253 don't run when !optimize.
22254 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
22257 2020-02-05 Richard Biener <rguenther@suse.de>
22259 PR middle-end/90648
22260 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
22261 checks before matching calls.
22263 2020-02-05 Jakub Jelinek <jakub@redhat.com>
22265 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
22266 function comment typo.
22268 PR middle-end/93555
22269 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
22270 simd_clone_create failed when i == 0, adjust clone->nargs by
22273 2020-02-05 Martin Liska <mliska@suse.cz>
22276 * doc/invoke.texi: Document that one should
22277 not combine ASLR and -fpch.
22279 2020-02-04 Richard Biener <rguenther@suse.de>
22281 PR tree-optimization/93538
22282 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
22284 2020-02-04 Richard Biener <rguenther@suse.de>
22286 PR tree-optimization/91123
22287 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
22288 (vn_walk_cb_data::last_vuse): New member.
22289 (vn_walk_cb_data::saved_operands): Likewsie.
22290 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
22291 (vn_walk_cb_data::push_partial_def): Use finish.
22292 (vn_reference_lookup_2): Update last_vuse and use finish if
22293 we've saved operands.
22294 (vn_reference_lookup_3): Use finish and update calls to
22295 push_partial_defs everywhere. When translating through
22296 memcpy or aggregate copies save off operands and alias-set.
22297 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
22298 operation for redundant store removal.
22300 2020-02-04 Richard Biener <rguenther@suse.de>
22302 PR tree-optimization/92819
22303 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
22304 generating more stmts than before.
22306 2020-02-04 Martin Liska <mliska@suse.cz>
22308 * config/arm/arm.c (arm_gen_far_branch): Move the function
22309 outside of selftests.
22311 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22313 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
22314 function to adjust PC-relative vector addresses.
22315 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
22316 handle vectors with PC-relative addresses.
22318 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22320 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
22322 (hard_reg_and_mode_to_addr_mask): Delete.
22323 (rs6000_adjust_vec_address): If the original vector address
22324 was REG+REG or REG+OFFSET and the element is not zero, do the add
22325 of the elements in the original address before adding the offset
22326 for the vector element. Use address_to_insn_form to validate the
22327 address using the register being loaded, rather than guessing
22328 whether the address is a DS-FORM or DQ-FORM address.
22330 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22332 * config/rs6000/rs6000.c (get_vector_offset): New helper function
22333 to calculate the offset in memory from the start of a vector of a
22334 particular element. Add code to keep the element number in
22335 bounds if the element number is variable.
22336 (rs6000_adjust_vec_address): Move calculation of offset of the
22337 vector element to get_vector_offset.
22338 (rs6000_split_vec_extract_var): Do not do the initial AND of
22339 element here, move the code to get_vector_offset.
22341 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22343 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
22346 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
22348 * config/rs6000/constraints.md: Improve documentation.
22350 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
22353 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
22354 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
22356 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
22358 * config.gcc: Remove "carrizo" support.
22359 * config/gcn/gcn-opts.h (processor_type): Likewise.
22360 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
22361 * config/gcn/gcn.opt (gpu_type): Likewise.
22362 * config/gcn/t-omp-device: Likewise.
22364 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22367 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
22368 * config/arm/arm.c (arm_gen_far_branch): New function
22369 arm_gen_far_branch.
22370 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
22372 2020-02-03 Julian Brown <julian@codesourcery.com>
22373 Tobias Burnus <tobias@codesourcery.com>
22375 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
22377 2020-02-03 Jakub Jelinek <jakub@redhat.com>
22380 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
22381 valid RTL to sum up the lowest and second lowest bytes of the popcnt
22384 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
22386 PR rtl-optimization/91333
22387 * ira-color.c (struct allocno_color_data): Add member
22389 (init_allocno_threads): Set the member up.
22390 (bucket_allocno_compare_func): Add compare hard reg
22393 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
22395 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
22397 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
22398 * config.in: Regenerated.
22399 * configure: Regenerated.
22400 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
22401 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
22402 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
22404 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
22406 * configure: Regenerate.
22408 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
22410 PR rtl-optimization/91333
22411 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
22412 reg preferences comparison up.
22414 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
22416 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
22417 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
22418 aarch64-sve-builtins-base.h.
22419 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
22420 aarch64-sve-builtins-base.cc.
22421 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
22422 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
22423 (svcvtnt): Declare.
22424 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
22425 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
22426 (svcvtnt): New functions.
22427 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
22428 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
22429 (svcvtnt): New functions.
22430 (svcvt): Add a form that converts f32 to bf16.
22431 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
22432 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
22434 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
22435 Treat B as bfloat16_t.
22436 (ternary_bfloat_lane_base): New class.
22437 (ternary_bfloat_def): Likewise.
22438 (ternary_bfloat): New shape.
22439 (ternary_bfloat_lane_def): New class.
22440 (ternary_bfloat_lane): New shape.
22441 (ternary_bfloat_lanex2_def): New class.
22442 (ternary_bfloat_lanex2): New shape.
22443 (ternary_bfloat_opt_n_def): New class.
22444 (ternary_bfloat_opt_n): New shape.
22445 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
22446 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
22447 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
22448 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
22449 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
22450 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
22451 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
22452 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
22453 the pattern off the narrow mode instead of the wider one.
22454 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
22455 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
22456 (sve_fp_op): Handle them.
22457 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
22458 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
22460 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
22462 * config/aarch64/arm_sve.h: Include arm_bf16.h.
22463 * config/aarch64/aarch64-modes.def (BF): Move definition before
22464 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
22465 (SVE_MODES): Handle BF modes.
22466 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
22468 (aarch64_full_sve_mode): Likewise.
22469 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
22471 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
22472 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
22473 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
22474 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
22476 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
22478 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
22479 (TYPES_all_data): Add bf16.
22480 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
22481 (register_tuple_type): Increase buffer size.
22482 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
22483 (bf16): New type suffix.
22484 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
22485 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
22486 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
22487 Change type from all_data to all_arith.
22488 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
22489 (svminp): Likewise.
22491 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
22492 Matthew Malcomson <matthew.malcomson@arm.com>
22493 Richard Sandiford <richard.sandiford@arm.com>
22495 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
22496 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
22497 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
22498 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
22499 __ARM_FEATURE_MATMUL_FP64.
22500 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
22501 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
22502 be disabled at the same time.
22503 (f32mm): New extension.
22504 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
22505 (AARCH64_FL_F64MM): Bump to the next bit up.
22506 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
22507 (TARGET_SVE_F64MM): New macros.
22508 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
22509 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
22510 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
22511 (UNSPEC_ZIP2Q): New unspeccs.
22512 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
22513 (optab, sur, perm_insn): Handle the new unspecs.
22514 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
22515 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
22516 TARGET_SVE_F64MM instead of separate tests.
22517 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
22518 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
22519 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
22520 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
22521 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
22522 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
22523 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
22524 (TYPES_s_signed): New macro.
22525 (TYPES_s_integer): Use it.
22526 (TYPES_d_float): New macro.
22527 (TYPES_d_data): Use it.
22528 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
22529 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
22530 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
22531 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
22532 (svmmla): New shape.
22533 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
22534 template parameters.
22535 (ternary_resize2_lane_base): Likewise.
22536 (ternary_resize2_base): New class.
22537 (ternary_qq_lane_base): Likewise.
22538 (ternary_intq_uintq_lane_def): Likewise.
22539 (ternary_intq_uintq_lane): New shape.
22540 (ternary_intq_uintq_opt_n_def): New class
22541 (ternary_intq_uintq_opt_n): New shape.
22542 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
22543 (ternary_uintq_intq_def): New class.
22544 (ternary_uintq_intq): New shape.
22545 (ternary_uintq_intq_lane_def): New class.
22546 (ternary_uintq_intq_lane): New shape.
22547 (ternary_uintq_intq_opt_n_def): New class.
22548 (ternary_uintq_intq_opt_n): New shape.
22549 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
22550 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
22551 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
22552 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
22554 (svdotprod_lane_impl): ...this new class.
22555 (svmmla_impl, svusdot_impl): New classes.
22556 (svdot_lane): Update to use svdotprod_lane_impl.
22557 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
22558 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
22560 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
22561 function, with no types defined.
22562 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
22563 AARCH64_FL_I8MM functions.
22564 (svmmla): New AARCH64_FL_F32MM function.
22565 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
22566 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
22567 AARCH64_FL_F64MM function.
22568 (REQUIRED_EXTENSIONS):
22570 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
22572 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
22575 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
22577 * config/i386/i386.md (*movoi_internal_avx): Do not check for
22578 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
22579 (*movti_internal): Do not check for
22580 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
22581 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
22582 just after check for TARGET_AVX.
22583 (*movdf_internal): Ditto.
22584 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
22585 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
22586 * config/i386/sse.md (mov<mode>_internal): Only check
22587 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
22588 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
22589 (<sse>_andnot<mode>3<mask_name>): Move check for
22590 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
22591 (<code><mode>3<mask_name>): Ditto.
22592 (*andnot<mode>3): Ditto.
22593 (*andnottf3): Ditto.
22594 (*<code><mode>3): Ditto.
22595 (*<code>tf3): Ditto.
22596 (*andnot<VI:mode>3): Remove
22597 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
22598 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
22599 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
22600 (sse4_1_blendv<ssemodesuffix>): Ditto.
22601 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
22602 Explain that tune applies to 128bit instructions only.
22604 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
22606 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
22607 to definition of hsa_kernel_description. Parse assembly to find SGPR
22608 and VGPR count of kernel and store in hsa_kernel_description.
22610 2020-01-31 Tamar Christina <tamar.christina@arm.com>
22612 PR rtl-optimization/91838
22613 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
22614 to truncate if allowed or reject combination.
22616 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
22618 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
22619 (find_inv_vars_cb): Likewise.
22621 2020-01-31 David Malcolm <dmalcolm@redhat.com>
22623 * calls.c (special_function_p): Split out the check for DECL_NAME
22624 being non-NULL and fndecl being extern at file scope into a
22625 new maybe_special_function_p and call it. Drop check for fndecl
22626 being non-NULL that was after a usage of DECL_NAME (fndecl).
22627 * tree.h (maybe_special_function_p): New inline function.
22629 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
22631 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
22632 (mask_gather_load<mode>): ... here, and zero-initialize the
22634 (maskload<mode>di): Zero-initialize the destination.
22635 * config/gcn/gcn.c:
22637 2020-01-30 David Malcolm <dmalcolm@redhat.com>
22640 * doc/analyzer.texi (Limitations): Note that constraints on
22641 floating-point values are currently ignored.
22643 2020-01-30 Jakub Jelinek <jakub@redhat.com>
22646 * symtab.c (symtab_node::noninterposable_alias): If localalias
22647 already exists, but is not usable, append numbers after it until
22648 a unique name is found. Formatting fix.
22650 PR middle-end/93505
22651 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
22654 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
22656 * config/gcn/gcn.c (print_operand): Handle LTGT.
22657 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
22659 2020-01-30 Richard Biener <rguenther@suse.de>
22661 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
22662 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
22664 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
22666 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
22667 without a DECL in .data.rel.ro.local.
22669 2020-01-30 Jakub Jelinek <jakub@redhat.com>
22672 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
22676 * config/i386/sse.md
22677 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
22678 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
22679 any_extend code iterator instead of always zero_extend.
22680 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
22681 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
22682 Use any_extend code iterator instead of always zero_extend.
22683 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
22684 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
22685 Use any_extend code iterator instead of always zero_extend.
22686 (*sse2_pmovmskb_ext): New define_insn.
22687 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
22690 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
22691 (*popcountsi2_zext_falsedep): New define_insn.
22693 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
22695 * config.in: Regenerated.
22696 * configure: Regenerated.
22698 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
22701 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
22702 LLVM's assembler changed the default in version 9.
22704 2020-01-24 Jeff Law <law@redhat.com>
22706 PR tree-optimization/89689
22707 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
22709 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
22713 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
22715 PR rtl-optimization/87763
22716 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
22717 simplification to handle subregs as well as bare regs.
22718 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
22720 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
22723 * ira.c (ira): Revert use of simplified LRA algorithm.
22725 2020-01-29 Martin Jambor <mjambor@suse.cz>
22727 PR tree-optimization/92706
22728 * tree-sra.c (struct access): Fields first_link, last_link,
22729 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
22730 next_rhs_queued and grp_rhs_queued respectively, new fields
22731 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
22732 (struct assign_link): Field next renamed to next_rhs, new field
22733 next_lhs. Updated comment.
22734 (work_queue_head): Renamed to rhs_work_queue_head.
22735 (lhs_work_queue_head): New variable.
22736 (add_link_to_lhs): New function.
22737 (relink_to_new_repr): Also relink LHS lists.
22738 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
22739 (add_access_to_lhs_work_queue): New function.
22740 (pop_access_from_work_queue): Renamed to
22741 pop_access_from_rhs_work_queue.
22742 (pop_access_from_lhs_work_queue): New function.
22743 (build_accesses_from_assign): Also add links to LHS lists and to LHS
22745 (child_would_conflict_in_lacc): Renamed to
22746 child_would_conflict_in_acc. Adjusted parameter names.
22747 (create_artificial_child_access): New parameter set_grp_read, use it.
22748 (subtree_mark_written_and_enqueue): Renamed to
22749 subtree_mark_written_and_rhs_enqueue.
22750 (propagate_subaccesses_across_link): Renamed to
22751 propagate_subaccesses_from_rhs.
22752 (propagate_subaccesses_from_lhs): New function.
22753 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
22756 2020-01-29 Martin Jambor <mjambor@suse.cz>
22758 PR tree-optimization/92706
22759 * tree-sra.c (struct access): Adjust comment of
22760 grp_total_scalarization.
22761 (find_access_in_subtree): Look for single children spanning an entire
22763 (scalarizable_type_p): Allow register accesses, adjust callers.
22764 (completely_scalarize): Remove function.
22765 (scalarize_elem): Likewise.
22766 (create_total_scalarization_access): Likewise.
22767 (sort_and_splice_var_accesses): Do not track total scalarization
22769 (analyze_access_subtree): New parameter totally, adjust to new meaning
22770 of grp_total_scalarization.
22771 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
22772 (can_totally_scalarize_forest_p): New function.
22773 (create_total_scalarization_access): Likewise.
22774 (create_total_access_and_reshape): Likewise.
22775 (total_should_skip_creating_access): Likewise.
22776 (totally_scalarize_subtree): Likewise.
22777 (analyze_all_variable_accesses): Perform total scalarization after
22778 subaccess propagation using the new functions above.
22779 (initialize_constant_pool_replacements): Output initializers by
22780 traversing the access tree.
22782 2020-01-29 Martin Jambor <mjambor@suse.cz>
22784 * tree-sra.c (verify_sra_access_forest): New function.
22785 (verify_all_sra_access_forests): Likewise.
22786 (create_artificial_child_access): Set parent.
22787 (analyze_all_variable_accesses): Call the verifier.
22789 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22791 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
22792 if called on indirect edge.
22793 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
22794 speculative call if needed.
22796 2020-01-29 Richard Biener <rguenther@suse.de>
22798 PR tree-optimization/93428
22799 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
22800 permutation when the load node is created.
22801 (vect_analyze_slp_instance): Re-use it here.
22803 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22805 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
22807 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
22809 PR rtl-optimization/93272
22810 * ira-lives.c (process_out_of_region_eh_regs): New function.
22811 (process_bb_node_lives): Call it.
22813 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22815 * coverage.c (read_counts_file): Make error message lowercase.
22817 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22819 * profile-count.c (profile_quality_display_names): Fix ordering.
22821 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22824 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
22825 hash only when edge is first within the sequence.
22826 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
22827 (symbol_table::create_edge): Do not set target_prob.
22828 (cgraph_edge::remove_caller): Watch for speculative calls when updating
22829 the call site hash.
22830 (cgraph_edge::make_speculative): Drop target_prob parameter.
22831 (cgraph_edge::speculative_call_info): Remove.
22832 (cgraph_edge::first_speculative_call_target): New member function.
22833 (update_call_stmt_hash_for_removing_direct_edge): New function.
22834 (cgraph_edge::resolve_speculation): Rewrite to new API.
22835 (cgraph_edge::speculative_call_for_target): New member function.
22836 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
22837 multiple speculation targets.
22838 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
22840 (verify_speculative_call): Verify that targets form an interval.
22841 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
22842 (cgraph_edge::first_speculative_call_target): New member function.
22843 (cgraph_edge::next_speculative_call_target): New member function.
22844 (cgraph_edge::speculative_call_target_ref): New member function.
22845 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
22846 (cgraph_edge): Remove target_prob.
22847 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
22848 Fix handling of speculative calls.
22849 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
22850 * ipa-fnsummary.c (analyze_function_body): Likewise.
22851 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
22852 * ipa-profile.c (dump_histogram): Fix formating.
22853 (ipa_profile_generate_summary): Watch for overflows.
22854 (ipa_profile): Do not require probablity to be 1/2; update to new API.
22855 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
22856 (update_indirect_edges_after_inlining): Update to new API.
22857 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
22859 * profile-count.h: (profile_probability::adjusted): New.
22860 * tree-inline.c (copy_bb): Update to new speculative call API; fix
22861 updating of profile.
22862 * value-prof.c (gimple_ic_transform): Rename to ...
22863 (dump_ic_profile): ... this one; update dumping.
22864 (stream_in_histogram_value): Fix formating.
22865 (gimple_value_profile_transformations): Update.
22867 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
22870 * config/i386/i386.md (*movoi_internal_avx): Remove
22871 TARGET_SSE_TYPELESS_STORES check.
22872 (*movti_internal): Prefer TARGET_AVX over
22873 TARGET_SSE_TYPELESS_STORES.
22874 (*movtf_internal): Likewise.
22875 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
22876 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
22877 from TARGET_SSE_TYPELESS_STORES.
22879 2020-01-28 David Malcolm <dmalcolm@redhat.com>
22881 * diagnostic-core.h (warning_at): Rename overload to...
22882 (warning_meta): ...this.
22883 (emit_diagnostic_valist): Delete decl of overload taking
22884 diagnostic_metadata.
22885 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
22886 (warning_at): Rename overload taking diagnostic_metadata to...
22887 (warning_meta): ...this.
22889 2020-01-28 Richard Biener <rguenther@suse.de>
22891 PR tree-optimization/93439
22892 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
22893 * tree-cfg.c (move_sese_region_to_fn): ... here.
22894 (verify_types_in_gimple_reference): Verify used cliques are
22897 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
22900 * config/i386/i386-options.c (set_ix86_tune_features): Add an
22901 argument of a pointer to struct gcc_options and pass it to
22902 parse_mtune_ctrl_str.
22903 (ix86_function_specific_restore): Pass opts to
22904 set_ix86_tune_features.
22905 (ix86_option_override_internal): Likewise.
22906 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
22907 gcc_options and use it for x_ix86_tune_ctrl_string.
22909 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
22911 PR rtl-optimization/87763
22912 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
22913 simplification to handle subregs as well as bare regs.
22914 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
22916 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
22918 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
22919 for reduction chains that (now) include a call.
22921 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
22923 PR tree-optimization/92822
22924 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
22925 out the don't-care elements of a vector whose significant elements
22926 are duplicates, make the don't-care elements duplicates too.
22928 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
22930 PR tree-optimization/93434
22931 * tree-predcom.c (split_data_refs_to_components): Record which
22932 components have had aliasing loads removed. Prevent store-store
22933 commoning for all such components.
22935 2020-01-28 Jakub Jelinek <jakub@redhat.com>
22938 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
22939 -1 or is_vshift is true, use new_vector with number of elts npatterns
22940 rather than new_unary_operation.
22942 PR tree-optimization/93454
22943 * gimple-fold.c (fold_array_ctor_reference): Perform
22944 elt_size.to_uhwi () just once, instead of calling it in every
22945 iteration. Punt if that value is above size of the temporary
22946 buffer. Decrease third native_encode_expr argument when
22947 bufoff + elt_sz is above size of buf.
22949 2020-01-27 Joseph Myers <joseph@codesourcery.com>
22951 * config/mips/mips.c (mips_declare_object_name)
22952 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
22954 2020-01-27 Martin Liska <mliska@suse.cz>
22956 PR gcov-profile/93403
22957 * tree-profile.c (gimple_init_gcov_profiler): Generate
22958 both __gcov_indirect_call_profiler_v4 and
22959 __gcov_indirect_call_profiler_v4_atomic.
22961 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
22964 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
22966 (@aarch64_split_simd_mov<mode>): Use it.
22967 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
22968 Leave the vec_extract patterns to handle 2-element vectors.
22969 (aarch64_simd_mov_from_<mode>high): Likewise.
22970 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
22971 (vec_extractv2dfv1df): Likewise.
22973 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
22975 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
22976 jump conditions for *compare_condjump<GPI:mode>.
22978 2020-01-27 David Malcolm <dmalcolm@redhat.com>
22981 * digraph.cc (test_edge::test_edge): Specify template for base
22984 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
22986 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
22988 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
22990 * config/arc/arc-protos.h (gen_mlo): Remove.
22991 (gen_mhi): Likewise.
22992 * config/arc/arc.c (AUX_MULHI): Define.
22993 (arc_must_save_reister): Special handling for r58/59.
22994 (arc_compute_frame_size): Consider mlo/mhi registers.
22995 (arc_save_callee_saves): Emit fp/sp move only when emit_move
22997 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
22998 mlo/mhi name selection.
22999 (arc_restore_callee_saves): Don't early restore blink when ISR.
23000 (arc_expand_prologue): Add mlo/mhi saving.
23001 (arc_expand_epilogue): Add mlo/mhi restoring.
23004 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
23005 numbering when MUL64 option is used.
23006 (DWARF2_FRAME_REG_OUT): Define.
23007 * config/arc/arc.md (arc600_stall): New pattern.
23008 (VUNSPEC_ARC_ARC600_STALL): Define.
23009 (mulsi64): Use correct mlo/mhi registers.
23010 (mulsi_600): Clean it up.
23011 * config/arc/predicates.md (mlo_operand): Remove any dependency on
23013 (mhi_operand): Likewise.
23015 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23016 Petro Karashchenko <petro.karashchenko@ring.com>
23018 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
23019 attributes if needed.
23020 (prepare_move_operands): Generate special unspec instruction for
23022 (arc_isuncached_mem_p): Propagate uncached attribute to each
23024 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
23025 (VUNSPEC_ARC_STDI): Likewise.
23026 (ALLI): New mode iterator.
23027 (mALLI): New mode attribute.
23028 (lddi): New instruction pattern.
23030 (stdidi_split): Split instruction for architectures which are not
23031 supporting ll64 option.
23032 (lddidi_split): Likewise.
23034 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23036 PR rtl-optimization/92989
23037 * lra-lives.c (process_bb_lives): Update the live-in set before
23038 processing additional clobbers.
23040 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23042 PR rtl-optimization/93170
23043 * cselib.c (cselib_invalidate_regno_val): New function, split out
23045 (cselib_invalidate_regno): ...here.
23046 (cselib_invalidated_by_call_p): New function.
23047 (cselib_process_insn): Iterate over all the hard-register entries in
23048 REG_VALUES and invalidate any that cross call-clobbered registers.
23050 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23052 * dojump.c (split_comparison): Use HONOR_NANS rather than
23053 HONOR_SNANS when splitting LTGT.
23055 2020-01-27 Martin Liska <mliska@suse.cz>
23058 * opts.c (print_filtered_help): Exclude language-specific
23059 options from --help=common unless enabled in all FEs.
23061 2020-01-27 Martin Liska <mliska@suse.cz>
23063 * opts.c (print_help): Exclude params from
23064 all except --help=param.
23066 2020-01-27 Martin Liska <mliska@suse.cz>
23069 * config/i386/i386-features.c (make_resolver_func):
23070 Align the code with ppc64 target implementation.
23071 Do not generate a unique name for resolver function.
23073 2020-01-27 Richard Biener <rguenther@suse.de>
23075 PR tree-optimization/93397
23076 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
23077 converted reduction chain SLP graph adjustment.
23079 2020-01-26 Marek Polacek <polacek@redhat.com>
23082 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
23085 2020-01-26 Jason Merrill <jason@redhat.com>
23088 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
23091 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
23093 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
23094 (rx_setmem): Likewise.
23096 2020-01-26 Jakub Jelinek <jakub@redhat.com>
23099 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
23100 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
23101 drop <di> from constraint of last operand.
23104 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
23105 TARGET_AVX2 and V4DFmode not in the split condition, but in the
23106 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
23108 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
23111 * ipa-cp.c (get_info_about_necessary_edges): Remove value
23114 2020-01-24 Jeff Law <law@redhat.com>
23116 PR tree-optimization/92788
23117 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
23120 2020-01-24 Jakub Jelinek <jakub@redhat.com>
23123 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
23124 *avx_vperm_broadcast_<mode>,
23125 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
23126 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
23127 Move before avx2_perm<mode>/avx512f_perm<mode>.
23130 * simplify-rtx.c (simplify_const_unary_operation,
23131 simplify_const_binary_operation): Punt for mode precision above
23132 MAX_BITSIZE_MODE_ANY_INT.
23134 2020-01-24 Andrew Pinski <apinski@marvell.com>
23136 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
23137 alu.shift_reg to 0.
23139 2020-01-24 Jeff Law <law@redhat.com>
23142 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
23143 for REGs. Call output_operand_lossage to get more reasonable
23146 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
23148 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
23149 gcn_fp_compare_operator.
23150 (vec_cmpu<mode>di): Use gcn_compare_operator.
23151 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
23152 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
23153 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
23154 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
23155 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
23156 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
23157 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
23158 gcn_fp_compare_operator.
23159 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
23160 gcn_fp_compare_operator.
23161 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
23162 gcn_fp_compare_operator.
23163 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
23164 gcn_fp_compare_operator.
23166 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
23168 * doc/install.texi (Cross-Compiler-Specific Options): Document
23169 `--with-toolexeclibdir' option.
23171 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
23173 * target.def (flags_regnum): Also mention effect on delay slot filling.
23174 * doc/tm.texi: Regenerate.
23176 2020-01-23 Jeff Law <law@redhat.com>
23178 PR translation/90162
23179 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
23181 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
23184 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
23187 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23189 PR rtl-optimization/93402
23190 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
23193 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
23195 * config.in: Regenerated.
23196 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
23197 for TARGET_LIBC_GNUSTACK.
23198 * configure: Regenerated.
23199 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
23200 found to be 2.31 or greater.
23202 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
23204 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
23206 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
23207 (mips_asm_file_end): New function. Delegate to
23208 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
23209 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
23211 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23214 * config/i386/i386-modes.def (POImode): New mode.
23215 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
23216 * config/i386/i386.md (DPWI): New mode attribute.
23217 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
23218 (QWI): Rename to...
23219 (QPWI): ... this. Use POI instead of OI for TImode.
23220 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
23221 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
23224 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23227 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
23229 (speculation_tracker_rev): New pattern.
23230 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
23231 Use speculation_tracker_rev to track the inverse condition.
23233 2020-01-23 Richard Biener <rguenther@suse.de>
23235 PR tree-optimization/93381
23236 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
23237 alias-set of the def as argument and record the first one.
23238 (vn_walk_cb_data::first_set): New member.
23239 (vn_reference_lookup_3): Pass the alias-set of the current def
23240 to push_partial_def. Fix alias-set used in the aggregate copy
23242 (vn_reference_lookup): Consistently set *last_vuse_ptr.
23243 * real.c (clear_significand_below): Fix out-of-bound access.
23245 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23248 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
23249 New define_insn patterns.
23251 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23253 * doc/sourcebuild.texi (check-function-bodies): Add an
23254 optional target/xfail selector.
23256 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23258 PR rtl-optimization/93124
23259 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
23260 bare USE and CLOBBER insns.
23262 2020-01-22 Andrew Pinski <apinski@marvell.com>
23264 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
23266 2020-01-22 David Malcolm <dmalcolm@redhat.com>
23269 * gdbinit.in (break-on-saved-diagnostic): Update for move of
23270 diagnostic_manager into "ana" namespace.
23271 * selftest-run-tests.c (selftest::run_tests): Update for move of
23272 selftest::run_analyzer_selftests to
23273 ana::selftest::run_analyzer_selftests.
23275 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
23277 * cfgexpand.c (union_stack_vars): Update the size.
23279 2020-01-22 Richard Biener <rguenther@suse.de>
23281 PR tree-optimization/93381
23282 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
23283 throughout, handle all conversions the same.
23285 2020-01-22 Jakub Jelinek <jakub@redhat.com>
23288 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
23289 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
23290 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
23291 Call force_reg on high_in2 unconditionally.
23293 2020-01-22 Martin Liska <mliska@suse.cz>
23295 PR tree-optimization/92924
23296 * profile.c (compute_value_histograms): Divide
23297 all counter values.
23299 2020-01-22 Jakub Jelinek <jakub@redhat.com>
23302 * output.h (assemble_name_resolve): Declare.
23303 * varasm.c (assemble_name_resolve): New function.
23304 (assemble_name): Use it.
23305 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
23307 2020-01-22 Joseph Myers <joseph@codesourcery.com>
23309 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
23310 update_web_docs_git instead of update_web_docs_svn.
23312 2020-01-21 Andrew Pinski <apinski@marvell.com>
23315 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
23316 as PTR mode. Have operand 1 as being modeless, it can be P mode.
23317 (*tlsgd_small_<mode>): Likewise.
23318 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
23319 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
23320 register. Convert that register back to dest using convert_mode.
23322 2020-01-21 Jim Wilson <jimw@sifive.com>
23324 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
23327 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
23328 Uros Bizjak <ubizjak@gmail.com>
23331 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
23333 (legitimize_tls_address): Do GNU2 TLS address computation in
23334 ptr_mode and zero-extend result to Pmode.
23335 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
23336 :P with :PTR and Pmode with ptr_mode.
23337 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
23338 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
23339 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
23341 2020-01-21 Jakub Jelinek <jakub@redhat.com>
23344 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
23345 the last two operands are CONST_INT_P before using them as such.
23347 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
23349 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
23350 to get the integer element types.
23352 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
23354 * config/aarch64/aarch64-sve-builtins.h
23355 (function_expander::convert_to_pmode): Declare.
23356 * config/aarch64/aarch64-sve-builtins.cc
23357 (function_expander::convert_to_pmode): New function.
23358 (function_expander::get_contiguous_base): Use it.
23359 (function_expander::prepare_gather_address_operands): Likewise.
23360 * config/aarch64/aarch64-sve-builtins-sve2.cc
23361 (svwhilerw_svwhilewr_impl::expand): Likewise.
23363 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
23366 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
23367 cfun->machine->label_is_assembled.
23368 (aarch64_print_patchable_function_entry): New.
23369 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
23370 * config/aarch64/aarch64.h (struct machine_function): New field,
23371 label_is_assembled.
23373 2020-01-21 David Malcolm <dmalcolm@redhat.com>
23376 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
23379 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
23382 * cgraph.c (cgraph_edge::resolve_speculation,
23383 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
23384 call_stmt_site_hash.
23386 2020-01-21 Martin Liska <mliska@suse.cz>
23388 * config/rs6000/rs6000.c (common_mode_defined): Remove
23391 2020-01-21 Richard Biener <rguenther@suse.de>
23393 PR tree-optimization/92328
23394 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
23395 type when value-numbering same-sized store by inserting a
23397 (eliminate_dom_walker::eliminate_stmt): When eliminating
23398 a redundant store handle bit-reinterpretation of the same value.
23400 2020-01-21 Andrew Pinski <apinski@marvel.com>
23403 * tree-into-ssa.c (prepare_block_for_update_1): Split out
23405 (prepare_block_for_update): This. Use a worklist instead of
23408 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23410 * config/arm/arm.c (clear_operation_p):
23411 Initialise last_regno, skip first iteration
23412 based on the first_set value and use ints instead
23413 of the unnecessary HOST_WIDE_INTs.
23415 2020-01-21 Jakub Jelinek <jakub@redhat.com>
23418 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
23419 compare_mode other than SFmode or DFmode.
23421 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
23424 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
23425 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
23426 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
23428 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
23430 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
23432 2020-01-20 Andrew Pinski <apinski@marvell.com>
23434 PR middle-end/93242
23435 * targhooks.c (default_print_patchable_function_entry): Use
23436 output_asm_insn to emit the nop instruction.
23438 2020-01-20 Fangrui Song <maskray@google.com>
23440 PR middle-end/93194
23441 * targhooks.c (default_print_patchable_function_entry): Align to
23444 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
23447 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
23448 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
23449 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
23450 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
23451 (*tls_dynamic_gnu2_lea_64): Renamed to ...
23452 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
23453 Remove the {q} suffix from lea.
23454 (*tls_dynamic_gnu2_call_64): Renamed to ...
23455 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
23456 (*tls_dynamic_gnu2_combine_64): Renamed to ...
23457 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
23458 Pass Pmode to gen_tls_dynamic_gnu2_64.
23460 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
23462 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
23464 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
23466 * config/aarch64/aarch64-sve-builtins-base.cc
23467 (svld1ro_impl::memory_vector_mode): Remove parameter name.
23469 2020-01-20 Richard Biener <rguenther@suse.de>
23472 * dwarf2out.c (prune_unused_types): Unconditionally mark
23473 called function DIEs.
23475 2020-01-20 Martin Liska <mliska@suse.cz>
23477 PR tree-optimization/93199
23478 * tree-eh.c (struct leh_state): Add
23479 new field outer_non_cleanup.
23480 (cleanup_is_dead_in): Pass leh_state instead
23481 of eh_region. Add a checking that state->outer_non_cleanup
23482 points to outer non-clean up region.
23483 (lower_try_finally): Record outer_non_cleanup
23485 (lower_catch): Likewise.
23486 (lower_eh_filter): Likewise.
23487 (lower_eh_must_not_throw): Likewise.
23488 (lower_cleanup): Likewise.
23490 2020-01-20 Richard Biener <rguenther@suse.de>
23492 PR tree-optimization/93094
23493 * tree-vectorizer.h (vect_loop_versioning): Adjust.
23494 (vect_transform_loop): Likewise.
23495 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
23496 loop_vectorized_call to vect_transform_loop.
23497 * tree-vect-loop.c (vect_transform_loop): Pass down
23498 loop_vectorized_call to vect_loop_versioning.
23499 * tree-vect-loop-manip.c (vect_loop_versioning): Use
23500 the earlier discovered loop_vectorized_call.
23502 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
23504 * doc/contribute.texi: Update for SVN -> Git transition.
23505 * doc/install.texi: Likewise.
23507 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
23510 * cgraph.c (cgraph_edge::make_speculative): Increase number of
23511 speculative targets.
23512 (verify_speculative_call): New function
23513 (cgraph_node::verify_node): Use it.
23514 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
23517 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
23520 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
23521 (cgraph_edge::make_direct): Remove all indirect targets.
23522 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
23523 (cgraph_node::verify_node): Verify that only one call_stmt or
23524 lto_stmt_uid is set.
23525 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
23527 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
23528 (lto_output_ref): Simplify streaming of stmt.
23529 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
23531 2020-01-18 Tamar Christina <tamar.christina@arm.com>
23533 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
23534 Mark parameter unused.
23536 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
23538 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
23540 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
23542 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
23544 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
23546 * Makefile.in: Add coroutine-passes.o.
23547 * builtin-types.def (BT_CONST_SIZE): New.
23548 (BT_FN_BOOL_PTR): New.
23549 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
23550 * builtins.def (DEF_COROUTINE_BUILTIN): New.
23551 * coroutine-builtins.def: New file.
23552 * coroutine-passes.cc: New file.
23553 * function.h (struct GTY function): Add a bit to indicate that the
23554 function is a coroutine component.
23555 * internal-fn.c (expand_CO_FRAME): New.
23556 (expand_CO_YIELD): New.
23557 (expand_CO_SUSPN): New.
23558 (expand_CO_ACTOR): New.
23559 * internal-fn.def (CO_ACTOR): New.
23563 * passes.def: Add pass_coroutine_lower_builtins,
23564 pass_coroutine_early_expand_ifns.
23565 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
23566 (make_pass_coroutine_early_expand_ifns): New.
23567 * doc/invoke.texi: Document the fcoroutines command line
23570 2020-01-18 Jakub Jelinek <jakub@redhat.com>
23572 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
23575 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
23576 after checking the argument is a REG. Don't use REGNO (reg)
23577 again to set last_regno, reuse regno variable instead.
23579 2020-01-17 David Malcolm <dmalcolm@redhat.com>
23581 * doc/analyzer.texi (Limitations): Add note about NaN.
23583 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23584 Sudakshina Das <sudi.das@arm.com>
23586 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
23587 and valid immediate.
23588 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
23589 (lshrdi3): Generate thumb2_lsrl for valid immediates.
23590 * config/arm/constraints.md (Pg): New.
23591 * config/arm/predicates.md (long_shift_imm): New.
23592 (arm_reg_or_long_shift_imm): Likewise.
23593 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
23594 (thumb2_lsll): Likewise.
23595 (thumb2_lsrl): New.
23597 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23598 Sudakshina Das <sudi.das@arm.com>
23600 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
23601 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
23602 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
23603 register pairs for doubleword quantities for ARMv8.1M-Mainline.
23604 * config/arm/thumb2.md (thumb2_asrl): New.
23605 (thumb2_lsll): Likewise.
23607 2020-01-17 Jakub Jelinek <jakub@redhat.com>
23609 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
23612 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
23614 * gdbinit.in (help-gcc-hooks): New command.
23615 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
23616 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
23619 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
23621 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
23622 correct target macro.
23624 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
23626 * config/aarch64/aarch64-protos.h
23627 (aarch64_sve_ld1ro_operand_p): New.
23628 * config/aarch64/aarch64-sve-builtins-base.cc
23629 (class load_replicate): New.
23630 (class svld1ro_impl): New.
23631 (class svld1rq_impl): Change to inherit from load_replicate.
23632 (svld1ro): New sve intrinsic function base.
23633 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
23634 New DEF_SVE_FUNCTION.
23635 * config/aarch64/aarch64-sve-builtins-base.h
23636 (svld1ro): New decl.
23637 * config/aarch64/aarch64-sve-builtins.cc
23638 (function_expander::add_mem_operand): Modify assert to allow
23640 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
23642 * config/aarch64/aarch64.c
23643 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
23644 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
23645 (aarch64_sve_ld1ro_operand_p): New.
23646 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
23647 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
23648 * config/aarch64/predicates.md
23649 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
23651 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
23653 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
23654 Introduce this ACLE specified predefined macro.
23655 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
23656 (fp): Disabling this disables f64mm.
23657 (simd): Disabling this disables f64mm.
23658 (fp16): Disabling this disables f64mm.
23659 (sve): Disabling this disables f64mm.
23660 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
23661 (AARCH64_ISA_F64MM): New.
23662 (TARGET_F64MM): New.
23663 * doc/invoke.texi (f64mm): Document new option.
23665 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
23667 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
23668 (neoversen1_tunings): Likewise.
23670 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
23673 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
23674 Add assert to ensure prolog has been emitted.
23675 (aarch64_split_atomic_op): Likewise.
23676 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
23677 Use epilogue_completed rather than reload_completed.
23678 (aarch64_atomic_exchange<mode>): Likewise.
23679 (aarch64_atomic_<atomic_optab><mode>): Likewise.
23680 (atomic_nand<mode>): Likewise.
23681 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
23682 (atomic_fetch_nand<mode>): Likewise.
23683 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
23684 (atomic_nand_fetch<mode>): Likewise.
23686 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
23689 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
23691 (REVERSE_CONDITION): Delete.
23692 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
23693 (CCFP_CCFPE): Likewise.
23694 (e): New mode attribute.
23695 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
23696 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
23697 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
23698 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
23699 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
23700 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
23701 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
23702 name of generator from gen_ccmpdi to gen_ccmpccdi.
23703 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
23704 the previous comparison but aren't able to, use the new ccmp_rev
23707 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
23709 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
23710 than testing directly for INTEGER_CST.
23711 (gimplify_target_expr, gimplify_omp_depend): Likewise.
23713 2020-01-17 Jakub Jelinek <jakub@redhat.com>
23715 PR tree-optimization/93292
23716 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
23717 get_vectype_for_scalar_type returns NULL.
23719 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
23721 * params.opt (-param=max-predicted-iterations): Increase range from 0.
23722 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
23724 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
23726 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
23728 * params.opt: (max-predicted-iterations): Set bounds.
23729 * predict.c (real_almost_one, real_br_prob_base,
23730 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
23731 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
23732 probabilities; do not truncate to reg_br_prob_bases.
23733 (estimate_loops_at_level): Pass max_cyclic_prob.
23734 (estimate_loops): Compute max_cyclic_prob.
23735 (estimate_bb_frequencies): Do not initialize real_*; update calculation
23737 * profile-count.c (profile_probability::to_sreal): New.
23738 * profile-count.h (class sreal): Move up in file.
23739 (profile_probability::to_sreal): Declare.
23741 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23744 (arm_invalid_conversion): New function for target hook.
23745 (arm_invalid_unary_op): New function for target hook.
23746 (arm_invalid_binary_op): New function for target hook.
23748 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23750 * config.gcc: Add arm_bf16.h.
23751 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
23752 (arm_simd_builtin_std_type): Add BFmode.
23753 (arm_init_simd_builtin_types): Define element types for vector types.
23754 (arm_init_bf16_types): New function.
23755 (arm_init_builtins): Add arm_init_bf16_types function call.
23756 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
23757 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
23758 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
23759 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
23760 (arm_vector_mode_supported_p): Add V4BF, V8BF.
23761 (arm_mangle_type): Add __bf16.
23762 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
23763 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
23764 arm_bf16_ptr_type_node.
23765 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
23766 define_split between ARM registers.
23767 * config/arm/arm_bf16.h: New file.
23768 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
23769 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
23770 (VQXMOV): Add V8BF.
23771 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
23772 * config/arm/vfp.md: Add BFmode to movhf patterns.
23774 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
23775 Andre Vieira <andre.simoesdiasvieira@arm.com>
23777 * config/arm/arm-cpus.in (mve, mve_float): New features.
23778 (dsp, mve, mve.fp): New options.
23779 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
23780 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
23781 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
23783 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23784 Thomas Preud'homme <thomas.preudhomme@arm.com>
23786 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
23788 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
23789 error for using -mcmse when targeting Armv8.1-M Mainline.
23791 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23792 Thomas Preud'homme <thomas.preudhomme@arm.com>
23794 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
23795 address in r4 when targeting Armv8.1-M Mainline.
23796 (nonsecure_call_value_internal): Likewise.
23797 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
23798 a register match_operand again. Emit BLXNS when targeting
23799 Armv8.1-M Mainline.
23800 (nonsecure_call_value_reg_thumb2): Likewise.
23802 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23803 Thomas Preud'homme <thomas.preudhomme@arm.com>
23805 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
23806 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
23807 variable as true when floating-point ABI is not hard. Replace
23808 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
23809 Generate VLSTM and VLLDM instruction respectively before and
23810 after a function call to cmse_nonsecure_call function.
23811 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
23812 (VUNSPEC_VLLDM): Likewise.
23813 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
23814 (lazy_load_multiple_insn): Likewise.
23816 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23817 Thomas Preud'homme <thomas.preudhomme@arm.com>
23819 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
23820 (arm_emit_vfp_multi_reg_pop): Likewise.
23821 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
23822 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
23823 restore callee-saved VFP registers.
23825 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23826 Thomas Preud'homme <thomas.preudhomme@arm.com>
23828 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
23829 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
23830 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
23831 callee-saved GPRs as well as clear ip register before doing a nonsecure
23832 call then restore callee-saved GPRs after it when targeting
23833 Armv8.1-M Mainline.
23834 (arm_reorg): Adapt to function rename.
23836 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23837 Thomas Preud'homme <thomas.preudhomme@arm.com>
23839 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
23840 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
23841 clear_vfp_multiple pattern based on a new vfp parameter.
23842 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
23843 targeting Armv8.1-M Mainline.
23844 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
23845 unconditionally when targeting Armv8.1-M Mainline architecture. Check
23846 whether VFP registers are available before looking call_used_regs for a
23848 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
23849 of prototype of clear_operation_p.
23850 (clear_vfp_multiple_operation): New predicate.
23851 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
23852 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
23854 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23855 Thomas Preud'homme <thomas.preudhomme@arm.com>
23857 * config/arm/arm-protos.h (clear_operation_p): Declare.
23858 * config/arm/arm.c (clear_operation_p): New function.
23859 (cmse_clear_registers): Generate clear_multiple instruction pattern if
23860 targeting Armv8.1-M Mainline or successor.
23861 (output_return_instruction): Only output APSR register clearing if
23862 Armv8.1-M Mainline instructions not available.
23863 (thumb_exit): Likewise.
23864 * config/arm/predicates.md (clear_multiple_operation): New predicate.
23865 * config/arm/thumb2.md (clear_apsr): New define_insn.
23866 (clear_multiple): Likewise.
23867 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
23869 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23870 Thomas Preud'homme <thomas.preudhomme@arm.com>
23872 * config/arm/arm.c (fp_sysreg_names): Declare and define.
23873 (use_return_insn): Also return false for Armv8.1-M Mainline.
23874 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
23875 Mainline instructions are available.
23876 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
23877 when targeting Armv8.1-M Mainline Security Extensions.
23878 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
23879 Mainline entry function.
23880 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
23881 targeting Armv8.1-M Mainline or successor.
23882 (arm_expand_epilogue): Fix indentation of caller-saved register
23883 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
23885 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
23886 (FP_SYSREGS): Likewise.
23887 (enum vfp_sysregs_encoding): Define enum.
23888 (fp_sysreg_names): Declare.
23889 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
23890 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
23891 (pop_fpsysreg_insn): Likewise.
23893 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23894 Thomas Preud'homme <thomas.preudhomme@arm.com>
23896 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
23897 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
23898 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
23899 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
23900 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
23901 (ARMv8_1m_main): New feature group.
23902 (armv8.1-m.main): New architecture.
23903 * config/arm/arm-tables.opt: Regenerate.
23904 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
23905 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
23906 (arm_options_perform_arch_sanity_checks): Error out when targeting
23907 Armv8.1-M Mainline Security Extensions.
23908 * config/arm/arm.h (arm_arch8_1m_main): Declare.
23910 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23912 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
23913 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
23914 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
23915 aarch64_bfdot_laneq): New.
23916 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
23917 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
23918 vbfdotq_laneq_f32): New.
23919 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
23920 VBFMLA_W, VBF): New.
23921 (isquadop): Add V4BF, V8BF.
23923 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23925 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
23926 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
23927 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
23928 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
23929 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
23930 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
23931 usdot_laneq, sudot_lane,sudot_laneq): New.
23932 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
23933 (aarch64_<sur>dot_lane): New.
23934 * config/aarch64/arm_neon.h (vusdot_s32): New.
23935 (vusdotq_s32): New.
23936 (vusdot_lane_s32): New.
23937 (vsudot_lane_s32): New.
23938 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
23939 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
23941 2020-01-16 Martin Liska <mliska@suse.cz>
23943 * value-prof.c (dump_histogram_value): Fix
23944 obvious spacing issue.
23946 2020-01-16 Andrew Pinski <apinski@marvell.com>
23948 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
23949 !storage_order_barrier_p.
23951 2020-01-16 Andrew Pinski <apinski@marvell.com>
23953 * sched-int.h (_dep): Add unused bit-field field for the padding.
23954 * sched-deps.c (init_dep_1): Init unused field.
23956 2020-01-16 Andrew Pinski <apinski@marvell.com>
23958 * optabs.h (create_expand_operand): Initialize target field also.
23960 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
23962 PR tree-optimization/92429
23963 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
23964 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
23966 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
23969 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
23971 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
23972 aarch64_sve_int_mode to each mode.
23974 2020-01-15 David Malcolm <dmalcolm@redhat.com>
23976 * doc/analyzer.texi (Overview): Add note about
23977 -fdump-ipa-analyzer.
23979 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
23981 PR tree-optimization/93231
23982 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
23983 input_type is unsigned. Use tree_to_shwi for shift constant.
23984 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
23985 (simplify_count_trailing_zeroes): Add test to handle known non-zero
23986 inputs more efficiently.
23988 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
23990 * config/i386/i386.md (*movsf_internal): Do not require
23991 SSE2 ISA for alternatives 14 and 15.
23993 2020-01-15 Richard Biener <rguenther@suse.de>
23995 PR middle-end/93273
23996 * tree-eh.c (sink_clobbers): If we already visited the destination
23997 block do not defer insertion.
23998 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
23999 the purpose of defered insertion.
24001 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24003 * BASE-VER: Bump to 10.0.1.
24005 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
24007 PR tree-optimization/93247
24008 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
24009 type of the stmt that we're going to vectorize.
24011 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
24013 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
24014 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
24017 2020-01-15 Martin Liska <mliska@suse.cz>
24019 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
24020 2 calls of streamer_read_hwi in a function call.
24022 2020-01-15 Richard Biener <rguenther@suse.de>
24024 * alias.c (record_alias_subset): Avoid redundant work when
24025 subset is already recorded.
24027 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24029 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
24030 the analyzer options provide CWE identifiers.
24032 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24034 * tree-diagnostic-path.cc (path_summary::event_range::print):
24035 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
24036 using get_pure_location.
24038 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24040 PR tree-optimization/93262
24041 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
24042 perform head trimming only if the last argument is constant,
24043 either all ones, or larger or equal to head trim, in the latter
24044 case decrease the last argument by head_trim.
24046 PR tree-optimization/93249
24047 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
24048 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
24049 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
24050 perform head trim unless we can prove there are no '\0' chars
24051 from the source among the first head_trim chars.
24053 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24055 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
24057 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24060 * config/i386/sse.md
24061 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
24062 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
24063 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
24064 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
24065 just a single alternative instead of two, make operands 1 and 2
24068 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
24071 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
24074 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24076 * Makefile.in (lang_opt_files): Add analyzer.opt.
24077 (ANALYZER_OBJS): New.
24078 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
24079 tristate.o and ANALYZER_OBJS.
24080 (TEXI_GCCINT_FILES): Add analyzer.texi.
24081 * common.opt (-fanalyzer): New driver option.
24082 * config.in: Regenerate.
24083 * configure: Regenerate.
24084 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
24085 (gccdepdir): Also create depdir for "analyzer" subdir.
24086 * digraph.cc: New file.
24087 * digraph.h: New file.
24088 * doc/analyzer.texi: New file.
24089 * doc/gccint.texi ("Static Analyzer") New menu item.
24090 (analyzer.texi): Include it.
24091 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
24092 ("Warning Options"): Add static analysis warnings to the list.
24093 (-Wno-analyzer-double-fclose): New option.
24094 (-Wno-analyzer-double-free): New option.
24095 (-Wno-analyzer-exposure-through-output-file): New option.
24096 (-Wno-analyzer-file-leak): New option.
24097 (-Wno-analyzer-free-of-non-heap): New option.
24098 (-Wno-analyzer-malloc-leak): New option.
24099 (-Wno-analyzer-possible-null-argument): New option.
24100 (-Wno-analyzer-possible-null-dereference): New option.
24101 (-Wno-analyzer-null-argument): New option.
24102 (-Wno-analyzer-null-dereference): New option.
24103 (-Wno-analyzer-stale-setjmp-buffer): New option.
24104 (-Wno-analyzer-tainted-array-index): New option.
24105 (-Wno-analyzer-use-after-free): New option.
24106 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
24107 (-Wno-analyzer-use-of-uninitialized-value): New option.
24108 (-Wanalyzer-too-complex): New option.
24109 (-fanalyzer-call-summaries): New warning.
24110 (-fanalyzer-checker=): New warning.
24111 (-fanalyzer-fine-grained): New warning.
24112 (-fno-analyzer-state-merge): New warning.
24113 (-fno-analyzer-state-purge): New warning.
24114 (-fanalyzer-transitivity): New warning.
24115 (-fanalyzer-verbose-edges): New warning.
24116 (-fanalyzer-verbose-state-changes): New warning.
24117 (-fanalyzer-verbosity=): New warning.
24118 (-fdump-analyzer): New warning.
24119 (-fdump-analyzer-callgraph): New warning.
24120 (-fdump-analyzer-exploded-graph): New warning.
24121 (-fdump-analyzer-exploded-nodes): New warning.
24122 (-fdump-analyzer-exploded-nodes-2): New warning.
24123 (-fdump-analyzer-exploded-nodes-3): New warning.
24124 (-fdump-analyzer-supergraph): New warning.
24125 * doc/sourcebuild.texi (dg-require-dot): New.
24126 (dg-check-dot): New.
24127 * gdbinit.in (break-on-saved-diagnostic): New command.
24128 * graphviz.cc: New file.
24129 * graphviz.h: New file.
24130 * ordered-hash-map-tests.cc: New file.
24131 * ordered-hash-map.h: New file.
24132 * passes.def (pass_analyzer): Add before
24133 pass_ipa_whole_program_visibility.
24134 * selftest-run-tests.c (selftest::run_tests): Call
24135 selftest::ordered_hash_map_tests_cc_tests.
24136 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
24138 * shortest-paths.h: New file.
24139 * timevar.def (TV_ANALYZER): New timevar.
24140 (TV_ANALYZER_SUPERGRAPH): Likewise.
24141 (TV_ANALYZER_STATE_PURGE): Likewise.
24142 (TV_ANALYZER_PLAN): Likewise.
24143 (TV_ANALYZER_SCC): Likewise.
24144 (TV_ANALYZER_WORKLIST): Likewise.
24145 (TV_ANALYZER_DUMP): Likewise.
24146 (TV_ANALYZER_DIAGNOSTICS): Likewise.
24147 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
24148 * tree-pass.h (make_pass_analyzer): New decl.
24149 * tristate.cc: New file.
24150 * tristate.h: New file.
24152 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
24155 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
24156 alternatives 9 and 10.
24158 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24160 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
24161 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
24162 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
24163 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
24164 (selftest::hash_map_tests_c_tests): Call it.
24165 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
24166 New static constant, using the value of = H::empty_zero_p.
24167 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
24168 from default_hash_traits <Value>.
24169 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
24171 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
24172 * hash-table.h (hash_table::alloc_entries): Guard the loop of
24173 calls to mark_empty with !Descriptor::empty_zero_p.
24174 (hash_table::empty_slow): Conditionalize the memset call with a
24175 check that Descriptor::empty_zero_p; otherwise, loop through the
24176 entries calling mark_empty on them.
24177 * hash-traits.h (int_hash::empty_zero_p): New static constant.
24178 (pointer_hash::empty_zero_p): Likewise.
24179 (pair_hash::empty_zero_p): Likewise.
24180 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
24182 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
24183 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
24184 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
24185 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
24186 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
24187 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
24188 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
24189 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
24190 * tree-vectorizer.h
24191 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
24194 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
24196 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
24197 fix typo on return value.
24199 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
24202 * cgraph.c (symbol_table::create_edge): Init speculative_id and
24204 (cgraph_edge::make_speculative): Add param for setting speculative_id
24206 (cgraph_edge::speculative_call_info): Update comments and find reference
24207 by speculative_id for multiple indirect targets.
24208 (cgraph_edge::resolve_speculation): Decrease the speculations
24209 for indirect edge, drop it's speculative if not direct target
24210 left. Update comments.
24211 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
24212 (cgraph_node::dump): Print num_speculative_call_targets.
24213 (cgraph_node::verify_node): Don't report error if speculative
24214 edge not include statement.
24215 (cgraph_edge::num_speculative_call_targets_p): New function.
24216 * cgraph.h (int common_target_id): Remove.
24217 (int common_target_probability): Remove.
24218 (num_speculative_call_targets): New variable.
24219 (make_speculative): Add param for setting speculative_id.
24220 (cgraph_edge::num_speculative_call_targets_p): New declare.
24221 (target_prob): New variable.
24222 (speculative_id): New variable.
24223 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
24224 call summaries for multiple speculative call targets.
24225 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
24226 * ipa-profile.c (struct speculative_call_target): New struct.
24227 (class speculative_call_summary): New class.
24228 (class speculative_call_summaries): New class.
24229 (call_sums): New variable.
24230 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
24231 (ipa_profile_write_edge_summary): New function.
24232 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
24233 (ipa_profile_dump_all_summaries): New function.
24234 (ipa_profile_read_edge_summary): New function.
24235 (ipa_profile_read_summary_section): New function.
24236 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
24237 (ipa_profile): Generate num_speculative_call_targets from
24239 * ipa-ref.h (speculative_id): New variable.
24240 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
24241 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
24242 common_target_probability. Stream out speculative_id and
24243 num_speculative_call_targets.
24244 (input_edge): Likewise.
24245 * predict.c (dump_prediction): Remove edges count assert to be
24247 * symtab.c (symtab_node::create_reference): Init speculative_id.
24248 (symtab_node::clone_references): Clone speculative_id.
24249 (symtab_node::clone_referring): Clone speculative_id.
24250 (symtab_node::clone_reference): Clone speculative_id.
24251 (symtab_node::clear_stmts_in_references): Clear speculative_id.
24252 * tree-inline.c (copy_bb): Duplicate all the speculative edges
24253 if indirect call contains multiple speculative targets.
24254 * value-prof.h (check_ic_target): Remove.
24255 * value-prof.c (gimple_value_profile_transformations):
24256 Use void function gimple_ic_transform.
24257 * value-prof.c (gimple_ic_transform): Handle topn case.
24258 Fix comment typos. Change it to a void function.
24260 2020-01-13 Andrew Pinski <apinski@marvell.com>
24262 * config/aarch64/aarch64-cores.def (octeontx2): New define.
24263 (octeontx2t98): New define.
24264 (octeontx2t96): New define.
24265 (octeontx2t93): New define.
24266 (octeontx2f95): New define.
24267 (octeontx2f95n): New define.
24268 (octeontx2f95mm): New define.
24269 * config/aarch64/aarch64-tune.md: Regenerate.
24270 * doc/invoke.texi (-mcpu=): Document the new cpu types.
24272 2020-01-13 Jason Merrill <jason@redhat.com>
24274 PR c++/33799 - destroy return value if local cleanup throws.
24275 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
24277 2020-01-13 Martin Liska <mliska@suse.cz>
24279 * ipa-cp.c (get_max_overall_size): Use newly
24280 renamed param param_ipa_cp_unit_growth.
24281 * params.opt: Remove legacy param name.
24283 2020-01-13 Martin Sebor <msebor@redhat.com>
24285 PR tree-optimization/93213
24286 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
24287 stores to be eliminated.
24289 2020-01-13 Martin Liska <mliska@suse.cz>
24291 * opts.c (print_help): Do not print CL_PARAM
24292 and CL_WARNING for CL_OPTIMIZATION.
24294 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
24297 * doc/invoke.texi (Warning Options): Add caveat about some warnings
24298 depending on optimization settings.
24300 2020-01-13 Jakub Jelinek <jakub@redhat.com>
24302 PR tree-optimization/90838
24303 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
24304 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
24305 argument rather than to initialize temporary for targets that
24306 don't use the mode argument at all. Initialize ctzval to avoid
24309 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
24311 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
24312 * tree-core.h: Document it.
24313 * gimplify.c (gimplify_omp_workshare): Set it.
24314 * omp-low.c (lower_omp_target): Use it.
24315 * tree-pretty-print.c (dump_omp_clause): Print it.
24317 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
24318 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
24320 2020-01-10 David Malcolm <dmalcolm@redhat.com>
24322 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
24323 * common.opt (fdiagnostics-path-format=): New option.
24324 (diagnostic_path_format): New enum.
24325 (fdiagnostics-show-path-depths): New option.
24326 * coretypes.h (diagnostic_event_id_t): New forward decl.
24327 * diagnostic-color.c (color_dict): Add "path".
24328 * diagnostic-event-id.h: New file.
24329 * diagnostic-format-json.cc (json_from_expanded_location): Make
24331 (json_end_diagnostic): Call context->make_json_for_path if it
24332 exists and the diagnostic has a path.
24333 (diagnostic_output_format_init): Clear context->print_path.
24334 * diagnostic-path.h: New file.
24335 * diagnostic-show-locus.c (colorizer::set_range): Special-case
24336 when printing a run of events in a diagnostic_path so that they
24337 all get the same color.
24338 (layout::m_diagnostic_path_p): New field.
24339 (layout::layout): Initialize it.
24340 (layout::print_any_labels): Don't colorize the label text for an
24341 event in a diagnostic_path.
24342 (gcc_rich_location::add_location_if_nearby): Add
24343 "restrict_to_current_line_spans" and "label" params. Pass the
24344 former to layout.maybe_add_location_range; pass the latter
24345 when calling add_range.
24346 * diagnostic.c: Include "diagnostic-path.h".
24347 (diagnostic_initialize): Initialize context->path_format and
24348 context->show_path_depths.
24349 (diagnostic_show_any_path): New function.
24350 (diagnostic_path::interprocedural_p): New function.
24351 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
24352 (simple_diagnostic_path::num_events): New function.
24353 (simple_diagnostic_path::get_event): New function.
24354 (simple_diagnostic_path::add_event): New function.
24355 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
24356 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
24357 (debug): New overload taking a diagnostic_path *.
24358 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
24359 * diagnostic.h (enum diagnostic_path_format): New enum.
24360 (json::value): New forward decl.
24361 (diagnostic_context::path_format): New field.
24362 (diagnostic_context::show_path_depths): New field.
24363 (diagnostic_context::print_path): New callback field.
24364 (diagnostic_context::make_json_for_path): New callback field.
24365 (diagnostic_show_any_path): New decl.
24366 (json_from_expanded_location): New decl.
24367 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
24368 (-fdiagnostics-show-path-depths): New option.
24369 (-fdiagnostics-color): Add "path" to description of default
24370 GCC_COLORS; describe it.
24371 (-fdiagnostics-format=json): Document how diagnostic paths are
24372 represented in the JSON output format.
24373 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
24374 Add optional params "restrict_to_current_line_spans" and "label".
24375 * opts.c (common_handle_option): Handle
24376 OPT_fdiagnostics_path_format_ and
24377 OPT_fdiagnostics_show_path_depths.
24378 * pretty-print.c: Include "diagnostic-event-id.h".
24379 (pp_format): Implement "%@" format code for printing
24380 diagnostic_event_id_t *.
24381 (selftest::test_pp_format): Add tests for "%@".
24382 * selftest-run-tests.c (selftest::run_tests): Call
24383 selftest::tree_diagnostic_path_cc_tests.
24384 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
24385 * toplev.c (general_init): Initialize global_dc->path_format and
24386 global_dc->show_path_depths.
24387 * tree-diagnostic-path.cc: New file.
24388 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
24389 non-static. Drop "diagnostic" param in favor of storing the
24390 original value of "where" and re-using it.
24391 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
24392 maybe_unwind_expanded_macro_loc.
24393 (tree_diagnostics_defaults): Initialize context->print_path and
24394 context->make_json_for_path.
24395 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
24397 (default_tree_make_json_for_path): New decl.
24398 (maybe_unwind_expanded_macro_loc): New decl.
24400 2020-01-10 Jakub Jelinek <jakub@redhat.com>
24402 PR tree-optimization/93210
24403 * fold-const.h (native_encode_initializer,
24404 can_native_interpret_type_p): Declare.
24405 * fold-const.c (native_encode_string): Fix up handling with off != -1,
24407 (native_encode_initializer): New function, moved from dwarf2out.c.
24408 Adjust to native_encode_expr compatible arguments, including dry-run
24409 and partial extraction modes. Don't handle STRING_CST.
24410 (can_native_interpret_type_p): No longer static.
24411 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
24412 offset / BITS_PER_UNIT fits into int and don't call it if
24413 can_native_interpret_type_p fails. If suboff is NULL and for
24414 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
24415 native_encode_initializer.
24416 (fold_const_aggregate_ref_1): Formatting fix.
24417 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
24418 (tree_add_const_value_attribute): Adjust caller.
24420 PR tree-optimization/90838
24421 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
24422 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
24423 CTZ_DEFINED_VALUE_AT_ZERO.
24425 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
24427 PR inline-asm/93027
24428 * lra-constraints.c (match_reload): Permit input operands have the
24429 same mode as output while other input operands have a different
24432 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
24434 PR tree-optimization/90838
24435 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
24436 (check_ctz_string): Likewise.
24437 (optimize_count_trailing_zeroes): Likewise.
24438 (simplify_count_trailing_zeroes): Likewise.
24439 (pass_forwprop::execute): Try ctz simplification.
24440 * match.pd: Add matching for ctz idioms.
24442 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24444 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
24446 (aarch64_invalid_unary_op): New function for target hook.
24447 (aarch64_invalid_binary_op): New function for target hook.
24449 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24451 * config.gcc: Add arm_bf16.h.
24452 * config/aarch64/aarch64-builtins.c
24453 (aarch64_simd_builtin_std_type): Add BFmode.
24454 (aarch64_init_simd_builtin_types): Define element types for vector
24456 (aarch64_init_bf16_types): New function.
24457 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
24458 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
24460 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
24461 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
24463 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
24464 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
24465 * config/aarch64/aarch64.c
24466 (aarch64_classify_vector_mode): Add support for BF types.
24467 (aarch64_gimplify_va_arg_expr): Add support for BF types.
24468 (aarch64_vq_mode): Add support for BF types.
24469 (aarch64_simd_container_mode): Add support for BF types.
24470 (aarch64_mangle_type): Add support for BF scalar type.
24471 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
24472 * config/aarch64/arm_bf16.h: New file.
24473 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
24474 * config/aarch64/iterators.md: Add BF types to mode attributes.
24475 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
24477 2020-01-10 Jason Merrill <jason@redhat.com>
24479 PR c++/93173 - incorrect tree sharing.
24480 * gimplify.c (copy_if_shared): No longer static.
24481 * gimplify.h: Declare it.
24483 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24485 * doc/invoke.texi (-msve-vector-bits=): Document that
24486 -msve-vector-bits=128 now generates VL-specific code for
24487 little-endian targets.
24488 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
24489 build_vector_type_for_mode to construct the data vector types.
24490 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
24491 VL-specific code for -msve-vector-bits=128 on little-endian targets.
24492 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
24493 for 128-bit vectors.
24495 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24497 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
24500 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24502 * config/aarch64/aarch64-builtins.c
24503 (aarch64_builtin_vectorized_function): Check for specific vector modes,
24504 rather than checking the number of elements and the element mode.
24506 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24508 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
24509 get_related_vectype_for_scalar_type rather than build_vector_type
24510 to create the index type for a conditional reduction.
24512 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24514 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
24515 for any type of gather or scatter, including strided accesses.
24517 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
24519 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
24522 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
24524 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
24525 get_dr_vinfo_offset
24526 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
24527 parameter and its use to reset DR_OFFSET's.
24528 (vect_transform_loop): Remove orig_drs_init argument.
24529 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
24530 member of dr_vec_info rather than the offset of the associated
24531 data_reference's innermost_loop_behavior.
24532 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
24533 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
24534 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
24535 get_dr_vinfo_offset.
24536 (vectorizable_store): Likewise.
24537 (vectorizable_load): Likewise.
24539 2020-01-10 Richard Biener <rguenther@suse.de>
24541 * gimple-ssa-store-merging
24542 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
24544 2020-01-10 Martin Liska <mliska@suse.cz>
24547 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
24548 encapsulation that was there before r280040.
24550 2020-01-10 Richard Biener <rguenther@suse.de>
24552 PR middle-end/93199
24553 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
24554 sequences to avoid walking them again for secondary opportunities.
24555 (pass_lower_eh_dispatch::execute): Instead actually insert
24558 2020-01-10 Richard Biener <rguenther@suse.de>
24560 PR middle-end/93199
24561 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
24562 (cleanup_all_empty_eh): Walk landing pads in reverse order to
24563 avoid quadraticness.
24565 2020-01-10 Martin Jambor <mjambor@suse.cz>
24567 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
24568 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
24569 to get param_ipa_sra_max_replacements.
24570 (param_splitting_across_edge): Pass the caller to
24571 pull_accesses_from_callee.
24573 2020-01-10 Martin Jambor <mjambor@suse.cz>
24575 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
24576 * ipa-cp.c (max_new_size): Removed.
24577 (orig_overall_size): New variable.
24578 (get_max_overall_size): New function.
24579 (estimate_local_effects): Use it. Adjust dump.
24580 (decide_about_value): Likewise.
24581 (ipcp_propagate_stage): Do not calculate max_new_size, just store
24582 orig_overall_size. Adjust dump.
24583 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
24585 2020-01-10 Martin Jambor <mjambor@suse.cz>
24587 * params.opt (param_ipa_max_agg_items): Mark as Optimization
24588 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
24589 instead of param_ipa_max_agg_items.
24590 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
24591 optimization info for the callee.
24593 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
24595 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
24596 markers if debug_inline_points is false.
24598 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24600 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
24602 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
24603 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
24604 aarch64-sve-builtins-sve2.h.
24605 (aarch64-sve-builtins-sve2.o): New rule.
24606 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
24607 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
24608 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
24609 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
24610 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
24611 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
24613 * config/aarch64/aarch64-sve.md: Update comments with SVE2
24614 instructions that are handled here.
24615 (@cond_asrd<mode>): Generalize to...
24616 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
24617 (*cond_asrd<mode>_2): Generalize to...
24618 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
24619 (*cond_asrd<mode>_z): Generalize to...
24620 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
24621 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
24622 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
24623 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
24624 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
24626 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
24627 (@aarch64_scatter_stnt<mode>): Likewise.
24628 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
24629 (@aarch64_mul_lane_<mode>): Likewise.
24630 (@aarch64_sve_suqadd<mode>_const): Likewise.
24631 (*<sur>h<addsub><mode>): Generalize to...
24632 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
24634 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
24635 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
24636 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
24637 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
24638 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
24639 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
24640 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
24641 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
24642 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
24643 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
24644 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
24645 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
24646 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
24647 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
24648 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
24649 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
24650 (@aarch64_sve2_xar<mode>): Likewise.
24651 (@aarch64_sve2_bcax<mode>): Likewise.
24652 (*aarch64_sve2_eor3<mode>): Rename to...
24653 (@aarch64_sve2_eor3<mode>): ...this.
24654 (@aarch64_sve2_bsl<mode>): New expander.
24655 (@aarch64_sve2_nbsl<mode>): Likewise.
24656 (@aarch64_sve2_bsl1n<mode>): Likewise.
24657 (@aarch64_sve2_bsl2n<mode>): Likewise.
24658 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
24659 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
24660 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
24661 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
24662 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
24663 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
24664 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
24665 (<su>mull<bt><Vwide>): Generalize to...
24666 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
24668 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
24669 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
24670 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
24671 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24672 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
24673 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24674 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
24675 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24676 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
24677 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24678 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
24679 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
24680 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
24681 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
24682 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
24683 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
24684 (<SHRNB:r>shrnb<mode>): Generalize to...
24685 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
24687 (<SHRNT:r>shrnt<mode>): Generalize to...
24688 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
24690 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
24691 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
24692 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
24693 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
24694 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
24695 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
24696 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
24697 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
24698 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
24699 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
24700 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
24701 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
24702 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
24703 (@aarch64_sve2_cvtnt<mode>): Likewise.
24704 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
24705 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
24706 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
24707 (@aarch64_sve2_cvtxnt<mode>): Likewise.
24708 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
24709 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
24710 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
24711 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
24712 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
24713 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
24714 (@aarch64_sve2_pmul<mode>): Likewise.
24715 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
24716 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
24717 (@aarch64_sve2_tbl2<mode>): Likewise.
24718 (@aarch64_sve2_tbx<mode>): Likewise.
24719 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
24720 (@aarch64_sve2_histcnt<mode>): Likewise.
24721 (@aarch64_sve2_histseg<mode>): Likewise.
24722 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
24723 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
24724 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
24725 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
24726 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
24727 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
24728 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
24729 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
24730 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
24731 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
24732 (SVE2_PMULL_PAIR_I): New mode iterators.
24733 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
24734 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
24735 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
24736 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
24737 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
24738 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
24739 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
24740 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
24741 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
24742 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
24743 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
24744 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
24745 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
24746 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
24747 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
24748 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
24749 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
24750 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
24751 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
24752 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
24753 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
24754 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
24755 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
24756 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
24757 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
24758 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
24759 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
24760 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
24761 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
24762 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
24763 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
24765 (VNARROW, Ventype): New mode attributes.
24766 (Vewtype): Handle VNx2DI. Fix typo in comment.
24767 (VDOUBLE): New mode attribute.
24768 (sve_lane_con): Handle VNx8HI.
24769 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
24770 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
24771 (sve_int_op, sve_int_op_rev): Handle the above codes.
24772 (sve_pred_int_rhs2_operand): Likewise.
24773 (MULLBT, SHRNB, SHRNT): Delete.
24774 (SVE_INT_SHIFT_IMM): New int iterator.
24775 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
24776 and UNSPEC_WHILEHS for TARGET_SVE2.
24777 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
24778 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
24779 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
24780 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
24781 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
24782 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
24783 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
24784 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
24785 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
24786 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
24787 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
24788 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
24789 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
24790 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
24791 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
24792 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
24793 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
24794 (optab): Handle the new unspecs.
24795 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
24797 (lr): Handle the new unspecs.
24799 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
24800 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
24801 (sve_int_qsub_op): New int attributes.
24802 (sve_fp_op, rot): Handle the new unspecs.
24803 * config/aarch64/aarch64-sve-builtins.h
24804 (function_resolver::require_matching_pointer_type): Declare.
24805 (function_resolver::resolve_unary): Add an optional boolean argument.
24806 (function_resolver::finish_opt_n_resolution): Add an optional
24807 type_suffix_index argument.
24808 (gimple_folder::redirect_call): Declare.
24809 (gimple_expander::prepare_gather_address_operands): Add an optional
24811 * config/aarch64/aarch64-sve-builtins.cc: Include
24812 aarch64-sve-builtins-sve2.h.
24813 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
24814 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
24815 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
24816 (TYPES_hsd_integer): Use TYPES_hsd_signed.
24817 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
24818 (TYPES_s_unsigned): Likewise.
24819 (TYPES_s_integer): Use TYPES_s_unsigned.
24820 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
24821 (TYPES_sd_integer): Use them.
24822 (TYPES_d_unsigned): New macro.
24823 (TYPES_d_integer): Use it.
24824 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
24825 (TYPES_cvt_narrow): Likewise.
24826 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
24827 (preds_mx): New variable.
24828 (function_builder::add_overloaded_function): Allow the new feature
24829 set to be more restrictive than the original one.
24830 (function_resolver::infer_pointer_type): Remove qualifiers from
24831 the pointer type before printing it.
24832 (function_resolver::require_matching_pointer_type): New function.
24833 (function_resolver::resolve_sv_displacement): Handle functions
24834 that don't support 32-bit vector indices or svint32_t vector offsets.
24835 (function_resolver::finish_opt_n_resolution): Take the inferred type
24836 as a separate argument.
24837 (function_resolver::resolve_unary): Optionally treat all forms in
24838 the same way as normal merging functions.
24839 (gimple_folder::redirect_call): New function.
24840 (function_expander::prepare_gather_address_operands): Add an argument
24841 that says whether scaled forms are available. If they aren't,
24842 handle scaling of vector indices and don't add the extension and
24844 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
24845 fall back to using cond_* instead.
24846 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
24847 Split out the member variables into...
24848 (rtx_code_function_base): ...this new base class.
24849 (rtx_code_function_rotated): Inherit rtx_code_function_base.
24850 (unspec_based_function): Split out the member variables into...
24851 (unspec_based_function_base): ...this new base class.
24852 (unspec_based_function_rotated): Inherit unspec_based_function_base.
24853 (unspec_based_function_exact_insn): New class.
24854 (unspec_based_add_function, unspec_based_add_lane_function)
24855 (unspec_based_lane_function, unspec_based_pred_function)
24856 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
24857 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
24858 (unspec_based_sub_function, unspec_based_sub_lane_function): New
24860 (unspec_based_fused_function): New class.
24861 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
24862 (unspec_based_fused_lane_function): New class.
24863 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
24865 (CODE_FOR_MODE1): New macro.
24866 (fixed_insn_function): New class.
24867 (while_comparison): Likewise.
24868 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
24869 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
24870 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
24871 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
24872 (load_gather_sv_restricted, shift_left_imm_long): Declare.
24873 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
24874 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
24875 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
24876 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
24877 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
24878 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
24879 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
24880 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
24881 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
24882 Also add an initial argument for unary_convert_narrowt, regardless
24883 of the predication type.
24884 (build_32_64): Allow loads and stores to specify MODE_none.
24885 (build_sv_index64, build_sv_uint_offset): New functions.
24886 (long_type_suffix): New function.
24887 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
24888 (binary_imm_long_base, load_gather_sv_base): Likewise.
24889 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
24890 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
24891 (unary_narrowb_base, unary_narrowt_base): Likewise.
24892 (binary_long_lane_def, binary_long_lane): New shape.
24893 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
24894 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
24895 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
24896 (binary_to_uint_def, binary_to_uint): Likewise.
24897 (binary_wide_def, binary_wide): Likewise.
24898 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
24899 (compare_def, compare): Likewise.
24900 (compare_ptr_def, compare_ptr): Likewise.
24901 (load_ext_gather_index_restricted_def,
24902 load_ext_gather_index_restricted): Likewise.
24903 (load_ext_gather_offset_restricted_def,
24904 load_ext_gather_offset_restricted): Likewise.
24905 (load_gather_sv_def): Inherit from load_gather_sv_base.
24906 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
24907 (shift_left_imm_def, shift_left_imm): Likewise.
24908 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
24909 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
24910 (store_scatter_index_restricted_def,
24911 store_scatter_index_restricted): Likewise.
24912 (store_scatter_offset_restricted_def,
24913 store_scatter_offset_restricted): Likewise.
24914 (tbl_tuple_def, tbl_tuple): Likewise.
24915 (ternary_long_lane_def, ternary_long_lane): Likewise.
24916 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
24917 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
24918 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
24919 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
24920 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
24921 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
24922 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
24923 (ternary_uint_def, ternary_uint): Likewise.
24924 (unary_convert): Fix typo in comment.
24925 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
24926 (unary_long_def, unary_long): Likewise.
24927 (unary_narrowb_def, unary_narrowb): Likewise.
24928 (unary_narrowt_def, unary_narrowt): Likewise.
24929 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
24930 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
24931 (unary_to_int_def, unary_to_int): Likewise.
24932 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
24933 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
24934 (svasrd_impl): Delete.
24935 (svcadd_impl::expand): Handle integer operations too.
24936 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
24937 new functions to derive the unspec numbers.
24938 (svmla_svmls_lane_impl): Replace with...
24939 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
24940 integer operations too.
24941 (svwhile_impl): Rename to...
24942 (svwhilelx_impl): ...this and inherit from while_comparison.
24943 (svasrd): Use unspec_based_function.
24944 (svmla_lane): Use svmla_lane_impl.
24945 (svmls_lane): Use svmls_lane_impl.
24946 (svrecpe, svrsqrte): Handle unsigned integer operations too.
24947 (svwhilele, svwhilelt): Use svwhilelx_impl.
24948 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
24949 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
24950 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
24951 * config/aarch64/aarch64-sve-builtins.def: Include
24952 aarch64-sve-builtins-sve2.def.
24954 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24956 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
24957 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
24958 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
24959 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
24960 immediates as well as vector ones.
24961 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
24962 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
24963 (aarch64_sve_qsub_immediate): Update calls accordingly.
24965 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24967 * config/aarch64/aarch64-sve2.md: Add banner comments.
24968 (<su>mulh<r>s<mode>3): Move further up file.
24969 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
24970 (*aarch64_sve2_sra<mode>): Move further down file.
24971 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
24973 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24975 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
24976 and UNSPEC_WHILEWR.
24977 (while_optab_cmp): Handle them.
24978 * config/aarch64/aarch64-sve.md
24979 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
24980 and add a "@" marker.
24981 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
24982 instead of gen_aarch64_sve2_while_ptest.
24983 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
24985 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24987 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
24988 (UNSPEC_WHILELE): ...this.
24989 (UNSPEC_WHILE_LO): Rename to...
24990 (UNSPEC_WHILELO): ...this.
24991 (UNSPEC_WHILE_LS): Rename to...
24992 (UNSPEC_WHILELS): ...this.
24993 (UNSPEC_WHILE_LT): Rename to...
24994 (UNSPEC_WHILELT): ...this.
24995 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
24996 (cmp_op, while_optab_cmp): Likewise.
24997 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
24998 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
24999 (svwhilelt): Likewise.
25001 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25003 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
25004 (unary_to_uint): Define.
25005 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
25006 (unary_count): Rename to...
25007 (unary_to_uint_def, unary_to_uint): ...this.
25008 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
25010 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25012 * config/aarch64/aarch64-sve-builtins-functions.h
25013 (code_for_mode_function): New class.
25014 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
25015 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
25016 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
25017 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
25018 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
25020 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25022 * config/aarch64/iterators.md (addsub): New code attribute.
25023 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
25025 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
25026 in the asm string and attributes. Fix indentation.
25027 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
25029 (@aarch64_sve_<optab><mode>): ...this.
25030 * config/aarch64/aarch64-sve-builtins.h
25031 (function_expander::expand_signed_unpred_op): Delete.
25032 * config/aarch64/aarch64-sve-builtins.cc
25033 (function_expander::expand_signed_unpred_op): Likewise.
25034 (function_expander::map_to_rtx_codes): If the optab isn't defined,
25035 try using code_for_aarch64_sve instead.
25036 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
25037 (svqsub_impl): Likewise.
25038 (svqadd, svqsub): Use rtx_code_function instead.
25040 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25042 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
25043 (HADDSUB, sur, addsub): Remove them.
25045 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25047 * tree-nrv.c (pass_return_slot::execute): Handle all internal
25048 functions the same way, rather than singling out those that
25049 aren't mapped directly to optabs.
25051 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25053 * target.def (compatible_vector_types_p): New target hook.
25054 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
25055 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
25056 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
25057 * doc/tm.texi: Regenerate.
25058 * gimple-expr.c: Include target.h.
25059 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
25060 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
25062 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
25063 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
25064 Use the original predicate if it already has a suitable type.
25066 2020-01-09 Martin Jambor <mjambor@suse.cz>
25068 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
25069 resolve_speculation and redirect_call_stmt_to_callee static. Change
25070 return type of set_call_stmt to cgraph_edge *.
25071 * auto-profile.c (afdo_indirect_call): Adjust call to
25072 redirect_call_stmt_to_callee.
25073 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
25074 make the this pointer explicit, adjust self-recursive calls and the
25075 call top make_direct. Return the resulting edge.
25076 (cgraph_edge::remove): Make this pointer explicit.
25077 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
25078 (cgraph_edge::make_direct): Likewise, adjust call to
25079 resolve_speculation.
25080 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
25081 call to set_call_stmt.
25082 (cgraph_update_edges_for_call_stmt_node): Update call to
25083 set_call_stmt and remove.
25084 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
25085 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
25086 (cgraph_node::create_edge_including_clones): Moved "first" definition
25087 of edge to the block where it was used. Adjusted calls to
25089 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
25090 cgraph_edge::remove.
25091 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
25092 make_direct and redirect_call_stmt_to_callee.
25093 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
25094 resolve_speculation and make_direct.
25095 * ipa-inline-transform.c (inline_transform): Adjust call to
25096 redirect_call_stmt_to_callee.
25097 (check_speculations_1):: Adjust call to resolve_speculation.
25098 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
25099 resolve-speculation.
25100 (inline_small_functions): Adjust call to resolve_speculation.
25101 (ipa_inline): Likewise.
25102 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
25104 * ipa-visibility.c (function_and_variable_visibility): Make iteration
25105 safe with regards to edge removal, adjust calls to
25106 redirect_call_stmt_to_callee.
25107 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
25108 and redirect_call_stmt_to_callee.
25109 * multiple_target.c (create_dispatcher_calls): Adjust call to
25110 redirect_call_stmt_to_callee
25111 (redirect_to_specific_clone): Likewise.
25112 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
25113 Adjust calls to cgraph_edge::remove.
25114 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
25115 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
25116 (expand_call_inline): Adjust call to cgraph_edge::remove.
25118 2020-01-09 Martin Liska <mliska@suse.cz>
25120 * params.opt: Set Optimization for
25121 param_max_speculative_devirt_maydefs.
25123 2020-01-09 Martin Sebor <msebor@redhat.com>
25125 PR middle-end/93200
25127 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
25129 2020-01-09 Martin Liska <mliska@suse.cz>
25131 * auto-profile.c (auto_profile): Use opt_for_fn
25133 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
25134 (propagate_vals_across_arith_jfunc): Likewise.
25135 (hint_time_bonus): Likewise.
25136 (incorporate_penalties): Likewise.
25137 (good_cloning_opportunity_p): Likewise.
25138 (perform_estimation_of_a_value): Likewise.
25139 (estimate_local_effects): Likewise.
25140 (ipcp_propagate_stage): Likewise.
25141 * ipa-fnsummary.c (decompose_param_expr): Likewise.
25142 (set_switch_stmt_execution_predicate): Likewise.
25143 (analyze_function_body): Likewise.
25144 * ipa-inline-analysis.c (offline_size): Likewise.
25145 * ipa-inline.c (early_inliner): Likewise.
25146 * ipa-prop.c (ipa_analyze_node): Likewise.
25147 (ipcp_transform_function): Likewise.
25148 * ipa-sra.c (process_scan_results): Likewise.
25149 (ipa_sra_summarize_function): Likewise.
25150 * params.opt: Rename ipcp-unit-growth to
25151 ipa-cp-unit-growth. Add Optimization for various
25152 IPA-related parameters.
25154 2020-01-09 Richard Biener <rguenther@suse.de>
25156 PR middle-end/93054
25157 * gimplify.c (gimplify_expr): Deal with NOP definitions.
25159 2020-01-09 Richard Biener <rguenther@suse.de>
25161 PR tree-optimization/93040
25162 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
25164 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
25166 * common/config/avr/avr-common.c (avr_option_optimization_table)
25167 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
25169 2020-01-09 Martin Liska <mliska@suse.cz>
25171 * cgraphclones.c (symbol_table::materialize_all_clones):
25172 Use cgraph_node::dump_name.
25174 2020-01-09 Jakub Jelinek <jakub@redhat.com>
25176 PR inline-asm/93202
25177 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
25178 output_operand_lossage instead of gcc_unreachable.
25179 * doc/md.texi (riscv f constraint): Fix typo.
25182 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
25183 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
25184 CONST_SCALAR_INT_P instead of CONST_INT_P.
25185 (*subv<mode>4_1): Rename to ...
25186 (subv<mode>4_1): ... this.
25187 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
25188 define_insn_and_split patterns.
25189 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
25192 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25194 * vec.c (class selftest::count_dtor): New class.
25195 (selftest::test_auto_delete_vec): New test.
25196 (selftest::vec_c_tests): Call it.
25197 * vec.h (class auto_delete_vec): New class template.
25198 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
25200 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25202 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
25204 2020-01-08 Jim Wilson <jimw@sifive.com>
25206 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
25207 use of TLS_MODEL_LOCAL_EXEC when not pic.
25209 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25211 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
25214 2020-01-08 Jakub Jelinek <jakub@redhat.com>
25217 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
25218 *stack_protect_set_3 peephole2): Also check that the second
25219 insns source is general_operand.
25222 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
25223 predicate for output operand instead of register_operand.
25224 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
25225 memory destination and non-memory operands[2].
25227 2020-01-08 Martin Liska <mliska@suse.cz>
25229 * cgraph.c (cgraph_node::dump): Use ::dump_name or
25230 ::dump_asm_name instead of (::name or ::asm_name).
25231 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
25232 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
25233 (analyze_functions): Likewise.
25234 (expand_all_functions): Likewise.
25235 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
25236 (propagate_bits_across_jump_function): Likewise.
25237 (dump_profile_updates): Likewise.
25238 (ipcp_store_bits_results): Likewise.
25239 (ipcp_store_vr_results): Likewise.
25240 * ipa-devirt.c (dump_targets): Likewise.
25241 * ipa-fnsummary.c (analyze_function_body): Likewise.
25242 * ipa-hsa.c (check_warn_node_versionable): Likewise.
25243 (process_hsa_functions): Likewise.
25244 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
25245 (set_alias_uids): Likewise.
25246 * ipa-inline-transform.c (save_inline_function_body): Likewise.
25247 * ipa-inline.c (recursive_inlining): Likewise.
25248 (inline_to_all_callers_1): Likewise.
25249 (ipa_inline): Likewise.
25250 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
25251 (ipa_propagate_frequency): Likewise.
25252 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
25253 (remove_described_reference): Likewise.
25254 * ipa-pure-const.c (worse_state): Likewise.
25255 (check_retval_uses): Likewise.
25256 (analyze_function): Likewise.
25257 (propagate_pure_const): Likewise.
25258 (propagate_nothrow): Likewise.
25259 (dump_malloc_lattice): Likewise.
25260 (propagate_malloc): Likewise.
25261 (pass_local_pure_const::execute): Likewise.
25262 * ipa-visibility.c (optimize_weakref): Likewise.
25263 (function_and_variable_visibility): Likewise.
25264 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
25265 (ipa_discover_variable_flags): Likewise.
25266 * lto-streamer-out.c (output_function): Likewise.
25267 (output_constructor): Likewise.
25268 * tree-inline.c (copy_bb): Likewise.
25269 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
25270 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
25272 2020-01-08 Richard Biener <rguenther@suse.de>
25274 PR middle-end/93199
25275 * tree-eh.c (sink_clobbers): Update virtual operands for
25276 the first and last stmt only. Add a dry-run capability.
25277 (pass_lower_eh_dispatch::execute): Perform clobber sinking
25278 after CFG manipulations and in RPO order to catch all
25279 secondary opportunities reliably.
25281 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
25284 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
25286 2019-01-08 Richard Biener <rguenther@suse.de>
25288 PR middle-end/93199
25289 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
25290 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
25291 virtual operand, also updating SSA use.
25292 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
25293 Update stmt after resetting virtual operand.
25294 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
25295 * gimple-iterator.c (gsi_remove): When not removing the stmt
25296 permanently do not delink immediate uses or mark the stmt modified.
25298 2020-01-08 Martin Liska <mliska@suse.cz>
25300 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
25301 (ipa_call_context::estimate_size_and_time): Likewise.
25302 (inline_analyze_function): Likewise.
25304 2020-01-08 Martin Liska <mliska@suse.cz>
25306 * cgraph.c (cgraph_node::dump): Use systematically
25309 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
25311 Add -nodevicespecs option for avr.
25314 * config/avr/avr.opt (-nodevicespecs): New driver option.
25315 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
25316 "-specs=device-specs/..." if that option is not set.
25317 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
25319 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
25321 Implement 64-bit double functions for avr.
25324 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
25325 --with-double-comparison.
25326 * doc/install.texi: Document them.
25327 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
25328 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
25329 <WITH_DOUBLE_COMPARISON>: New built-in defines.
25330 * doc/invoke.texi (AVR Built-in Macros): Document them.
25331 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
25332 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
25333 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
25335 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
25338 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
25339 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
25340 when only building rm-profile multilibs.
25342 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
25345 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
25346 lattice for a value to check.
25347 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
25348 finite propagation in self-recursive scc.
25350 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
25352 * ipa-inline.c (caller_growth_limits): Restore the AND.
25354 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
25356 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
25357 (VEC_ALLREG_ALT): New iterator.
25358 (VEC_ALLREG_INT_MODE): New iterator.
25359 (VCMP_MODE): New iterator.
25360 (VCMP_MODE_INT): New iterator.
25361 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
25362 (vec_cmp<u>v64qidi): New define_expand.
25363 (vec_cmp<mode>di_exec): Use VCMP_MODE.
25364 (vec_cmpu<mode>di_exec): New define_expand.
25365 (vec_cmp<u>v64qidi_exec): New define_expand.
25366 (vec_cmp<mode>di_dup): Use VCMP_MODE.
25367 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
25368 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
25369 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
25370 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
25371 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
25372 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
25373 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
25374 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
25375 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
25377 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
25378 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
25380 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
25382 * config/gcn/constraints.md (DA): Update description and match.
25384 (Db): New constraint.
25385 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
25387 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
25388 Implement 'Db' mixed immediate type.
25389 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
25390 (addcv64si3_dup<exec_vcc>): Delete.
25391 (subcv64si3<exec_vcc>): Rework constraints.
25392 (addv64di3): Rework constraints.
25393 (addv64di3_exec): Rework constraints.
25394 (subv64di3): Rework constraints.
25395 (addv64di3_dup): Delete.
25396 (addv64di3_dup_exec): Delete.
25397 (addv64di3_zext): Rework constraints.
25398 (addv64di3_zext_exec): Rework constraints.
25399 (addv64di3_zext_dup): Rework constraints.
25400 (addv64di3_zext_dup_exec): Rework constraints.
25401 (addv64di3_zext_dup2): Rework constraints.
25402 (addv64di3_zext_dup2_exec): Rework constraints.
25403 (addv64di3_sext_dup2): Rework constraints.
25404 (addv64di3_sext_dup2_exec): Rework constraints.
25406 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
25408 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
25409 existing target checks.
25411 2020-01-07 Richard Biener <rguenther@suse.de>
25413 * doc/install.texi: Bump minimal supported MPC version.
25415 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
25417 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
25418 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
25419 * langhooks.c: Include stor-layout.h.
25420 (lhd_simulate_enum_decl): New function.
25421 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
25422 handle_arm_sve_h for the LTO frontend.
25423 (register_vector_type): Cope with null returns from pushdecl.
25425 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
25427 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
25428 (aarch64_sve::nvectors_if_data_type): Replace with...
25429 (aarch64_sve::builtin_type_p): ...this.
25430 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
25431 (find_vector_type): Delete.
25432 (add_sve_type_attribute): New function.
25433 (lookup_sve_type_attribute): Likewise.
25434 (register_builtin_types): Add an "SVE type" attribute to each type.
25435 (register_tuple_type): Likewise.
25436 (svbool_type_p, nvectors_if_data_type): Delete.
25437 (mangle_builtin_type): Use lookup_sve_type_attribute.
25438 (builtin_type_p): Likewise. Add an overload that returns the
25439 number of constituent vector and predicate registers.
25440 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
25441 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
25442 instead of aarch64_sve_argument_p.
25443 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
25444 (aarch64_pass_by_reference): Likewise.
25445 (aarch64_function_value_1): Likewise.
25446 (aarch64_return_in_memory): Likewise.
25447 (aarch64_layout_arg): Likewise.
25449 2020-01-07 Jakub Jelinek <jakub@redhat.com>
25451 PR tree-optimization/93156
25452 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
25453 least significant bit is always clear.
25455 PR tree-optimization/93118
25456 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
25457 simplifier with two intermediate conversions.
25459 2020-01-07 Martin Liska <mliska@suse.cz>
25461 * params.opt: Add Optimization for various parameters.
25463 2020-01-07 Martin Liska <mliska@suse.cz>
25466 * doc/extend.texi: Explain cloning for target_clone
25469 2020-01-07 Martin Liska <mliska@suse.cz>
25471 PR tree-optimization/92860
25472 * common.opt: Make in Optimization option
25473 as it is affected by -O0, which is an Optimization
25475 * tree-inline.c (tree_inlinable_function_p):
25476 Use opt_for_fn for warn_inline.
25477 (expand_call_inline): Likewise.
25479 2020-01-07 Martin Liska <mliska@suse.cz>
25481 PR tree-optimization/92860
25482 * common.opt: Make flag_ree as optimization
25485 2020-01-07 Martin Liska <mliska@suse.cz>
25487 PR optimization/92860
25488 * params.opt: Mark param_min_crossjump_insns with Optimization
25491 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
25493 * ipa-inline-analysis.c (estimate_growth): Fix typo.
25494 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
25496 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
25498 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
25499 helper function to return the valid addressing formats for a given
25500 hard register and mode.
25501 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
25503 * config/rs6000/constraints.md (Q constraint): Update
25505 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
25508 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
25509 Use 'Q' for doing vector extract from memory.
25510 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
25512 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
25513 doing vector extract from memory.
25514 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
25515 extract from memory.
25517 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
25518 for the offset being 34-bits when -mcpu=future is used.
25520 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
25522 * config/pa/pa.md: Revert change to use ordered_comparison_operator
25523 instead of cmpib_comparison_operator in cmpib patterns.
25524 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
25525 of cmpib_comparison_operator. Revise comment.
25527 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25529 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
25530 in an IFN_DIV_POW2 node to be equal.
25532 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25534 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
25535 (vect_check_scalar_mask): ...this.
25536 (vectorizable_store, vectorizable_load): Update call accordingly.
25537 (vectorizable_call): Use vect_check_scalar_mask to check the mask
25538 argument in calls to conditional internal functions.
25540 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
25542 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
25543 '0' matching inputs.
25544 (subv64di3_exec): Likewise.
25546 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
25548 * config/mips/mips.c (vr4130_align_insns): Fix typo.
25549 * doc/md.texi (movstr): Likewise.
25551 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
25553 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
25556 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25558 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
25560 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
25561 to a temporary file and use move-if-change to update the real
25562 file where necessary.
25564 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25566 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
25567 rather than Upa for CPY /M.
25569 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
25571 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
25574 2020-01-06 Martin Liska <mliska@suse.cz>
25576 PR tree-optimization/92860
25577 * params.opt: Mark param_max_combine_insns with Optimization
25580 2020-01-05 Jakub Jelinek <jakub@redhat.com>
25583 * config/i386/i386.md (SWIDWI): New mode iterator.
25584 (DWI, dwi): Add TImode variants.
25585 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
25586 <general_hilo_operand> instead of <general_operand>. Use
25587 CONST_SCALAR_INT_P instead of CONST_INT_P.
25588 (*addv<mode>4_1): Rename to ...
25589 (addv<mode>4_1): ... this.
25590 (QWI): New mode attribute.
25591 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
25592 define_insn_and_split patterns.
25593 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
25595 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
25596 <general_hilo_operand> instead of <general_operand>.
25597 (*addcarry<mode>_1): New define_insn.
25598 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
25600 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
25602 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
25603 Use "call" instead of "set".
25605 2020-01-03 Martin Jambor <mjambor@suse.cz>
25608 * ipa-cp.c (print_all_lattices): Skip functions without info.
25610 2020-01-03 Jakub Jelinek <jakub@redhat.com>
25613 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
25614 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
25615 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
25616 for 'e' simd clones.
25619 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
25621 (mprefer-vector-width=): Add Save.
25622 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
25623 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
25624 (ix86_debug_options, ix86_function_specific_print): Adjust
25625 ix86_target_string callers.
25626 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
25627 (ix86_valid_target_attribute_tree): Likewise.
25628 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
25629 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
25630 ix86_target_string caller.
25633 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
25634 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
25635 instead of gen_int_shift_amount + convert_modes.
25637 PR rtl-optimization/93088
25638 * loop-iv.c (find_single_def_src): Punt after looking through
25639 128 reg copies for regs with single definitions. Move definitions
25642 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
25644 * config/arm/arm-c.c (arm_cpu_builtins): Define
25645 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
25646 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
25647 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
25648 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
25649 * config/arm/arm-tables.opt: Regenerated.
25650 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
25651 arm_arch_i8mm and arm_arch_bf16 when enabled.
25652 * config/arm/arm.h (TARGET_I8MM): New macro.
25653 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
25654 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
25655 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
25656 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
25657 (v8_6_a_simd_variants): New.
25658 (v8_*_a_simd_variants): Add i8mm and bf16.
25659 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
25661 2020-01-02 Jakub Jelinek <jakub@redhat.com>
25664 * predict.c (compute_function_frequency): Don't call
25665 warn_function_cold on functions that already have cold attribute.
25667 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
25670 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
25671 COMDAT group function labels in .data.rel.ro.local section.
25672 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
25675 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
25676 comparison_operator in B and S integer comparisons. Likewise, use
25677 ordered_comparison_operator instead of cmpib_comparison_operator in
25679 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
25681 2020-01-01 Jakub Jelinek <jakub@redhat.com>
25683 Update copyright years.
25685 * gcc.c (process_command): Update copyright notice dates.
25686 * gcov-dump.c (print_version): Ditto.
25687 * gcov.c (print_version): Ditto.
25688 * gcov-tool.c (print_version): Ditto.
25689 * gengtype.c (create_file): Ditto.
25690 * doc/cpp.texi: Bump @copying's copyright year.
25691 * doc/cppinternals.texi: Ditto.
25692 * doc/gcc.texi: Ditto.
25693 * doc/gccint.texi: Ditto.
25694 * doc/gcov.texi: Ditto.
25695 * doc/install.texi: Ditto.
25696 * doc/invoke.texi: Ditto.
25698 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
25700 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
25703 2020-01-01 Jakub Jelinek <jakub@redhat.com>
25705 PR tree-optimization/93098
25706 * match.pd (popcount): For shift amounts, use integer_onep
25707 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
25708 tests. Make sure that precision is power of two larger than or equal
25709 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
25710 instead of ULL suffixed constants. Formatting fixes.
25712 Copyright (C) 2020 Free Software Foundation, Inc.
25714 Copying and distribution of this file, with or without modification,
25715 are permitted in any medium without royalty provided the copyright
25716 notice and this notice are preserved.