gcc/ChangeLog

   1 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
   2
   3         PR target/93182
   4         * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
   5
   6 2019-01-08  Richard Biener  <rguenther@suse.de>
   7
   8         PR middle-end/93199
   9         * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
  10         * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
  11         virtual operand, also updating SSA use.
  12         * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
  13         Update stmt after resetting virtual operand.
  14         (tree_loop_interchange::move_code_to_inner_loop): Likewise.
  15         * gimple-iterator.c (gsi_remove): When not removing the stmt
  16         permanently do not delink immediate uses or mark the stmt modified.
  17
  18 2020-01-08  Martin Liska  <mliska@suse.cz>
  19
  20         * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
  21         (ipa_call_context::estimate_size_and_time): Likewise.
  22         (inline_analyze_function): Likewise.
  23
  24 2020-01-08  Martin Liska  <mliska@suse.cz>
  25
  26         * cgraph.c (cgraph_node::dump): Use systematically
  27         dump_asm_name.
  28
  29 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
  30
  31         Add -nodevicespecs option for avr.
  32
  33         PR target/93182
  34         * config/avr/avr.opt (-nodevicespecs): New driver option.
  35         * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
  36         "-specs=device-specs/..." if that option is not set.
  37         * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
  38
  39 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
  40
  41         Implement 64-bit double functions for avr.
  42
  43         PR target/92055
  44         * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
  45         --with-double-comparison.
  46         * doc/install.texi: Document them.
  47         * config/avr/avr-c.c (avr_cpu_cpp_builtins)
  48         <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
  49         <WITH_DOUBLE_COMPARISON>: New built-in defines.
  50         * doc/invoke.texi (AVR Built-in Macros): Document them.
  51         * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
  52         * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
  53         * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
  54
  55 2020-01-08  Richard Earnshaw  <rearnsha@arm.com>
  56
  57         PR target/93188
  58         * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
  59         armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
  60         when only building rm-profile multilibs.
  61
  62 2020-01-08  Feng Xue  <fxue@os.amperecomputing.com>
  63
  64         PR ipa/93084
  65         * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
  66         lattice for a value to check.
  67         (propagate_vals_across_arith_jfunc): Add an assertion to ensure
  68         finite propagation in self-recursive scc.
  69
  70 2020-01-08  Luo Xiong Hu  <luoxhu@linux.ibm.com>
  71
  72         * ipa-inline.c (caller_growth_limits): Restore the AND.
  73
  74 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
  75
  76         * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
  77         (VEC_ALLREG_ALT): New iterator.
  78         (VEC_ALLREG_INT_MODE): New iterator.
  79         (VCMP_MODE): New iterator.
  80         (VCMP_MODE_INT): New iterator.
  81         (vec_cmpu<mode>di): Use VCMP_MODE_INT.
  82         (vec_cmp<u>v64qidi): New define_expand.
  83         (vec_cmp<mode>di_exec): Use VCMP_MODE.
  84         (vec_cmpu<mode>di_exec): New define_expand.
  85         (vec_cmp<u>v64qidi_exec): New define_expand.
  86         (vec_cmp<mode>di_dup): Use VCMP_MODE.
  87         (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
  88         (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
  89         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
  90         (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
  91         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
  92         (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
  93         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
  94         (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
  95         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
  96         this.
  97         * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
  98         * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
  99
 100 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
 101
 102         * config/gcn/constraints.md (DA): Update description and match.
 103         (DB): Likewise.
 104         (Db): New constraint.
 105         * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
 106         parameter.
 107         * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
 108         Implement 'Db' mixed immediate type.
 109         * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
 110         (addcv64si3_dup<exec_vcc>): Delete.
 111         (subcv64si3<exec_vcc>): Rework constraints.
 112         (addv64di3): Rework constraints.
 113         (addv64di3_exec): Rework constraints.
 114         (subv64di3): Rework constraints.
 115         (addv64di3_dup): Delete.
 116         (addv64di3_dup_exec): Delete.
 117         (addv64di3_zext): Rework constraints.
 118         (addv64di3_zext_exec): Rework constraints.
 119         (addv64di3_zext_dup): Rework constraints.
 120         (addv64di3_zext_dup_exec): Rework constraints.
 121         (addv64di3_zext_dup2): Rework constraints.
 122         (addv64di3_zext_dup2_exec): Rework constraints.
 123         (addv64di3_sext_dup2): Rework constraints.
 124         (addv64di3_sext_dup2_exec): Rework constraints.
 125
 126 2020-01-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 127
 128         * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
 129         existing target checks.
 130
 131 2020-01-07  Richard Biener  <rguenther@suse.de>
 132
 133         * doc/install.texi: Bump minimal supported MPC version.
 134
 135 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
 136
 137         * langhooks-def.h (lhd_simulate_enum_decl): Declare.
 138         (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
 139         * langhooks.c: Include stor-layout.h.
 140         (lhd_simulate_enum_decl): New function.
 141         * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
 142         handle_arm_sve_h for the LTO frontend.
 143         (register_vector_type): Cope with null returns from pushdecl.
 144
 145 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
 146
 147         * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
 148         (aarch64_sve::nvectors_if_data_type): Replace with...
 149         (aarch64_sve::builtin_type_p): ...this.
 150         * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
 151         (find_vector_type): Delete.
 152         (add_sve_type_attribute): New function.
 153         (lookup_sve_type_attribute): Likewise.
 154         (register_builtin_types): Add an "SVE type" attribute to each type.
 155         (register_tuple_type): Likewise.
 156         (svbool_type_p, nvectors_if_data_type): Delete.
 157         (mangle_builtin_type): Use lookup_sve_type_attribute.
 158         (builtin_type_p): Likewise.  Add an overload that returns the
 159         number of constituent vector and predicate registers.
 160         * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
 161         (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
 162         instead of aarch64_sve_argument_p.
 163         (aarch64_takes_arguments_in_sve_regs_p): Likewise.
 164         (aarch64_pass_by_reference): Likewise.
 165         (aarch64_function_value_1): Likewise.
 166         (aarch64_return_in_memory): Likewise.
 167         (aarch64_layout_arg): Likewise.
 168
 169 2020-01-07  Jakub Jelinek  <jakub@redhat.com>
 170
 171         PR tree-optimization/93156
 172         * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
 173         least significant bit is always clear.
 174
 175         PR tree-optimization/93118
 176         * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?.  Add new
 177         simplifier with two intermediate conversions.
 178
 179 2020-01-07  Martin Liska  <mliska@suse.cz>
 180
 181         * params.opt: Add Optimization for various parameters.
 182
 183 2020-01-07  Martin Liska  <mliska@suse.cz>
 184
 185         PR ipa/83411
 186         * doc/extend.texi: Explain cloning for target_clone
 187         attribute.
 188
 189 2020-01-07  Martin Liska  <mliska@suse.cz>
 190
 191         PR tree-optimization/92860
 192         * common.opt: Make in Optimization option
 193         as it is affected by -O0, which is an Optimization
 194         option.
 195         * tree-inline.c (tree_inlinable_function_p):
 196         Use opt_for_fn for warn_inline.
 197         (expand_call_inline): Likewise.
 198
 199 2020-01-07  Martin Liska  <mliska@suse.cz>
 200
 201         PR tree-optimization/92860
 202         * common.opt: Make flag_ree as optimization
 203         attribute.
 204
 205 2020-01-07  Martin Liska  <mliska@suse.cz>
 206
 207         PR optimization/92860
 208         * params.opt: Mark param_min_crossjump_insns with Optimization
 209         keyword.
 210
 211 2020-01-07  Luo Xiong Hu  <luoxhu@linux.ibm.com>
 212
 213         * ipa-inline-analysis.c (estimate_growth): Fix typo.
 214         * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
 215
 216 2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
 217
 218         * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
 219         helper function to return the valid addressing formats for a given
 220         hard register and mode.
 221         (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
 222
 223         * config/rs6000/constraints.md (Q constraint): Update
 224         documentation.
 225         * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
 226         documentation.
 227
 228         * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
 229         Use 'Q' for doing vector extract from memory.
 230         (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
 231         memory.
 232         (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
 233         doing vector extract from memory.
 234         (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
 235         extract from memory.
 236
 237         * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
 238         for the offset being 34-bits when -mcpu=future is used.
 239
 240 2020-01-06  John David Anglin  <danglin@gcc.gnu.org>
 241
 242         * config/pa/pa.md: Revert change to use ordered_comparison_operator
 243         instead of cmpib_comparison_operator in cmpib patterns.
 244         * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
 245         of cmpib_comparison_operator.  Revise comment.
 246
 247 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 248
 249         * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
 250         in an IFN_DIV_POW2 node to be equal.
 251
 252 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 253
 254         * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
 255         (vect_check_scalar_mask): ...this.
 256         (vectorizable_store, vectorizable_load): Update call accordingly.
 257         (vectorizable_call): Use vect_check_scalar_mask to check the mask
 258         argument in calls to conditional internal functions.
 259
 260 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 261
 262         * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
 263         '0' matching inputs.
 264         (subv64di3_exec): Likewise.
 265
 266 2020-01-06  Bryan Stenson  <bryan@siliconvortex.com>
 267
 268         * config/mips/mips.c (vr4130_align_insns): Fix typo.
 269         * doc/md.texi (movstr): Likewise.
 270
 271 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 272
 273         * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
 274         clobber.
 275
 276 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 277
 278         * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
 279         Depend on...
 280         (s-aarch64-tune-md): ...this new stamp file.  Pipe the new contents
 281         to a temporary file and use move-if-change to update the real
 282         file where necessary.
 283
 284 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 285
 286         * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
 287         rather than Upa for CPY /M.
 288
 289 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 290
 291         * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
 292         immediate.
 293
 294 2020-01-06  Martin Liska  <mliska@suse.cz>
 295
 296     PR tree-optimization/92860
 297     * params.opt: Mark param_max_combine_insns with Optimization
 298     keyword.
 299
 300 2020-01-05  Jakub Jelinek  <jakub@redhat.com>
 301
 302         PR target/93141
 303         * config/i386/i386.md (SWIDWI): New mode iterator.
 304         (DWI, dwi): Add TImode variants.
 305         (addv<mode>4): Use SWIDWI iterator instead of SWI.  Use
 306         <general_hilo_operand> instead of <general_operand>.  Use
 307         CONST_SCALAR_INT_P instead of CONST_INT_P.
 308         (*addv<mode>4_1): Rename to ...
 309         (addv<mode>4_1): ... this.
 310         (QWI): New mode attribute.
 311         (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
 312         define_insn_and_split patterns.
 313         (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
 314         patterns.
 315         (uaddv<mode>4): Use SWIDWI iterator instead of SWI.  Use
 316         <general_hilo_operand> instead of <general_operand>.
 317         (*addcarry<mode>_1): New define_insn.
 318         (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
 319
 320 2020-01-03  Konstantin Kharlamov  <Hi-Angel@yandex.ru>
 321
 322         * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
 323         Use "call" instead of "set".
 324
 325 2020-01-03  Martin Jambor  <mjambor@suse.cz>
 326
 327         PR ipa/92917
 328         * ipa-cp.c (print_all_lattices): Skip functions without info.
 329
 330 2020-01-03  Jakub Jelinek  <jakub@redhat.com>
 331
 332         PR target/93089
 333         * config/i386/i386-options.c (ix86_simd_clone_adjust): If
 334         TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
 335         simd clones.  If TARGET_PREFER_AVX256, use prefer-vector-width=512
 336         for 'e' simd clones.
 337
 338         PR target/93089
 339         * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
 340         entry.
 341         (mprefer-vector-width=): Add Save.
 342         * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
 343         -mprefer-vector-width= if non-zero.  Fix up -mfpmath= comment.
 344         (ix86_debug_options, ix86_function_specific_print): Adjust
 345         ix86_target_string callers.
 346         (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
 347         (ix86_valid_target_attribute_tree): Likewise.
 348         * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
 349         * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
 350         ix86_target_string caller.
 351
 352         PR target/93110
 353         * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
 354         emitting ASHIFTRT, XOR and MINUS by hand.  Use gen_int_mode with QImode
 355         instead of gen_int_shift_amount + convert_modes.
 356
 357         PR rtl-optimization/93088
 358         * loop-iv.c (find_single_def_src): Punt after looking through
 359         128 reg copies for regs with single definitions.  Move definitions
 360         to first uses.
 361
 362 2020-01-02  Dennis Zhang  <dennis.zhang@arm.com>
 363
 364         * config/arm/arm-c.c (arm_cpu_builtins): Define
 365         __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
 366         __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
 367         __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
 368         * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
 369         * config/arm/arm-tables.opt: Regenerated.
 370         * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
 371         arm_arch_i8mm and arm_arch_bf16 when enabled.
 372         * config/arm/arm.h (TARGET_I8MM): New macro.
 373         (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
 374         * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
 375         * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
 376         * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
 377         (v8_6_a_simd_variants): New.
 378         (v8_*_a_simd_variants): Add i8mm and bf16.
 379         * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
 380
 381 2020-01-02  Jakub Jelinek  <jakub@redhat.com>
 382
 383         PR ipa/93087
 384         * predict.c (compute_function_frequency): Don't call
 385         warn_function_cold on functions that already have cold attribute.
 386
 387 2020-01-01  John David Anglin  <danglin@gcc.gnu.org>
 388
 389         PR target/67834
 390         * config/pa/pa.c (pa_elf_select_rtx_section): New.  Put references to
 391         COMDAT group function labels in .data.rel.ro.local section.
 392         * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
 393
 394         PR target/93111
 395         * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
 396         comparison_operator in B and S integer comparisons.  Likewise, use
 397         ordered_comparison_operator instead of cmpib_comparison_operator in
 398         cmpib patterns.
 399         * config/pa/predicates.md (cmpib_comparison_operator): Remove.
 400
 401 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
 402
 403         Update copyright years.
 404
 405         * gcc.c (process_command): Update copyright notice dates.
 406         * gcov-dump.c (print_version): Ditto.
 407         * gcov.c (print_version): Ditto.
 408         * gcov-tool.c (print_version): Ditto.
 409         * gengtype.c (create_file): Ditto.
 410         * doc/cpp.texi: Bump @copying's copyright year.
 411         * doc/cppinternals.texi: Ditto.
 412         * doc/gcc.texi: Ditto.
 413         * doc/gccint.texi: Ditto.
 414         * doc/gcov.texi: Ditto.
 415         * doc/install.texi: Ditto.
 416         * doc/invoke.texi: Ditto.
 417
 418 2020-01-01  Jan Hubicka  <hubicka@ucw.cz>
 419
 420         * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
 421         summary.
 422
 423 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
 424
 425         PR tree-optimization/93098
 426         * match.pd (popcount): For shift amounts, use integer_onep
 427         or wi::to_widest () == cst instead of tree_to_uhwi () == cst
 428         tests.  Make sure that precision is power of two larger than or equal
 429         to 16.  Ensure shift is never negative.  Use HOST_WIDE_INT_UC macro
 430         instead of ULL suffixed constants.  Formatting fixes.
 431 \f
 432 Copyright (C) 2020 Free Software Foundation, Inc.
 433
 434 Copying and distribution of this file, with or without modification,
 435 are permitted in any medium without royalty provided the copyright
 436 notice and this notice are preserved.