1 2020-09-15 Ilya Leoshkevich <iii@linux.ibm.com>
3 * rtlanal.c (set_noop_p): Treat subregs of registers in
4 different modes conservatively.
6 2020-09-15 Richard Biener <rguenther@suse.de>
8 * tree-vect-slp.c (vect_get_and_check_slp_defs): Make swap
9 argument by-value and do not change it.
10 (vect_build_slp_tree_2): Adjust, set swap to NULL after last
13 2020-09-15 Feng Xue <fxue@os.amperecomputing.com>
15 PR tree-optimization/94234
16 * match.pd (T)(A) +- (T)(B) -> (T)(A +- B): New simplification.
18 2020-09-15 Segher Boessenkool <segher@kernel.crashing.org>
20 PR rtl-optimization/96475
21 * bb-reorder.c (duplicate_computed_gotos): If we did anything, run
24 2020-09-15 Richard Biener <rguenther@suse.de>
26 * tree-vect-slp.c (vect_build_slp_tree_2): Also consider
27 building an operand from scalars when building it did not
28 fail fatally but avoid messing with the upcall splitting
31 2020-09-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
33 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Do not
34 check +D32 for CMSE if -mfloat-abi=soft
36 2020-09-15 liuhongt <hongtao.liu@intel.com>
39 * config/i386/x86-tune-costs.h (struct processor_costs):
40 Increase mask <-> integer cost for non AVX512 target to avoid
41 spill gpr to mask. Also retune mask <-> integer and
42 mask_load/store for skylake_cost.
44 2020-09-15 Jakub Jelinek <jakub@redhat.com>
47 * config/i386/sse.md (mul<mode>3<mask_name>_bcs,
48 <avx512>_div<mode>3<mask_name>_bcst): Use <avx512bcst> instead of
51 2020-09-15 Tobias Burnus <tobias@codesourcery.com>
54 * gimplify.c (gimplify_omp_for): Add 'bool openacc' argument;
55 update omp_finish_clause calls.
56 (gimplify_adjust_omp_clauses_1, gimplify_adjust_omp_clauses,
57 gimplify_expr, gimplify_omp_loop): Update omp_finish_clause
58 and/or gimplify_for calls.
59 * langhooks-def.h (lhd_omp_finish_clause): Add bool openacc arg.
60 * langhooks.c (lhd_omp_finish_clause): Likewise.
61 * langhooks.h (lhd_omp_finish_clause): Likewise.
62 * omp-low.c (scan_sharing_clauses): Keep GOMP_MAP_TO_PSET cause for
63 'declare target' vars.
65 2020-09-15 Feng Xue <fxue@os.amperecomputing.com>
67 PR tree-optimization/94234
68 * genmatch.c (dt_simplify::gen_1): Emit check on final simplification
69 result when "!" is specified on toplevel output expr.
70 * match.pd ((A * C) +- (B * C) -> (A +- B) * C): Allow folding on expr
71 with multi-use operands if final result is a simple gimple value.
73 2020-09-14 Sergei Trofimovich <siarheit@google.com>
75 * doc/invoke.texi: fix '-fprofile-reproducibility' option
78 2020-09-14 Jose E. Marchesi <jose.marchesi@oracle.com>
80 * config/bpf/bpf.md ("nop"): Re-define as `ja 0'.
82 2020-09-14 Eric Botcazou <ebotcazou@adacore.com>
84 * cgraphunit.c (cgraph_node::expand_thunk): Make sure to set
85 cfun->tail_call_marked when forcing a tail call.
86 * function.c (assign_parm_setup_reg): Always use a register to
87 load a parameter passed by reference if cfun->tail_call_marked.
89 2020-09-14 Pat Haugen <pthaugen@linux.ibm.com>
91 * config/rs6000/power10.md (power10-mffgpr, power10-mftgpr): Rename to
92 power10-mtvsr/power10-mfvsr.
93 * config/rs6000/power6.md (X2F_power6, power6-mftgpr, power6-mffgpr):
95 * config/rs6000/power8.md (power8-mffgpr, power8-mftgpr): Rename to
96 power8-mtvsr/power8-mfvsr.
97 * config/rs6000/power9.md (power9-mffgpr, power9-mftgpr): Rename to
98 power9-mtvsr/power9-mfvsr.
99 * config/rs6000/rs6000.c (rs6000_adjust_cost): Remove Power6
101 * config/rs6000/rs6000.md (mffgpr, mftgpr, zero_extendsi<mode>2,
102 extendsi<mode>2, @signbit<mode>2_dm, lfiwax, lfiwzx, *movsi_internal1,
103 movsi_from_sf, *movdi_from_sf_zero_ext, *mov<mode>_internal,
104 movsd_hardfloat, movsf_from_si, *mov<mode>_hardfloat64, p8_mtvsrwz,
105 p8_mtvsrd_df, p8_mtvsrd_sf, p8_mfvsrd_3_<mode>, *movdi_internal64,
106 unpack<mode>_dm): Rename mffgpr/mftgpr to mtvsr/mfvsr.
107 * config/rs6000/vsx.md (vsx_mov<mode>_64bit, vsx_extract_<mode>,
108 vsx_extract_si, *vsx_extract_<mode>_p8): Likewise.
110 2020-09-14 Jakub Jelinek <jakub@redhat.com>
112 * config/arm/arm.opt (x_arm_arch_string, x_arm_cpu_string,
113 x_arm_tune_string): Remove TargetSave entries.
114 (march=, mcpu=, mtune=): Add Save keyword.
115 * config/arm/arm.c (arm_option_save): Remove.
116 (TARGET_OPTION_SAVE): Don't redefine.
117 (arm_option_restore): Don't restore x_arm_*_string here.
119 2020-09-14 Jakub Jelinek <jakub@redhat.com>
121 * opt-read.awk: Also initialize extra_target_var_types array.
122 * opth-gen.awk: Emit explicit_mask arrays to struct cl_optimization
123 and cl_target_option. Adjust cl_optimization_save,
124 cl_optimization_restore, cl_target_option_save and
125 cl_target_option_restore declarations.
126 * optc-save-gen.awk: Add opts_set argument to cl_optimization_save,
127 cl_optimization_restore, cl_target_option_save and
128 cl_target_option_restore functions and save or restore opts_set
129 next to the opts values into or from explicit_mask arrays.
130 In cl_target_option_eq and cl_optimization_option_eq compare
131 explicit_mask arrays, in cl_target_option_hash and cl_optimization_hash
132 hash them and in cl_target_option_stream_out,
133 cl_target_option_stream_in, cl_optimization_stream_out and
134 cl_optimization_stream_in stream them.
135 * tree.h (build_optimization_node, build_target_option_node): Add
137 * tree.c (build_optimization_node): Add opts_set argument, pass it
138 to cl_optimization_save.
139 (build_target_option_node): Add opts_set argument, pass it to
140 cl_target_option_save.
141 * function.c (invoke_set_current_function_hook): Adjust
142 cl_optimization_restore caller.
143 * ipa-inline-transform.c (inline_call): Adjust cl_optimization_restore
144 and build_optimization_node callers.
145 * target.def (TARGET_OPTION_SAVE, TARGET_OPTION_RESTORE): Add opts_set
147 * target-globals.c (save_target_globals_default_opts): Adjust
148 cl_optimization_restore callers.
149 * toplev.c (process_options): Adjust build_optimization_node and
150 cl_optimization_restore callers.
151 (target_reinit): Adjust cl_optimization_restore caller.
152 * tree-streamer-in.c (lto_input_ts_function_decl_tree_pointers):
153 Adjust build_optimization_node and cl_optimization_restore callers.
154 * doc/tm.texi: Updated.
155 * config/aarch64/aarch64.c (aarch64_override_options): Adjust
156 build_target_option_node caller.
157 (aarch64_option_save, aarch64_option_restore): Add opts_set argument.
158 (aarch64_set_current_function): Adjust cl_target_option_restore
160 (aarch64_option_valid_attribute_p): Adjust cl_target_option_save,
161 cl_target_option_restore, cl_optimization_restore,
162 build_optimization_node and build_target_option_node callers.
163 * config/aarch64/aarch64-c.c (aarch64_pragma_target_parse): Adjust
164 cl_target_option_restore and build_target_option_node callers.
165 * config/arm/arm.c (arm_option_save, arm_option_restore): Add
167 (arm_option_override): Adjust cl_target_option_save,
168 build_optimization_node and build_target_option_node callers.
169 (arm_set_current_function): Adjust cl_target_option_restore caller.
170 (arm_valid_target_attribute_tree): Adjust build_target_option_node
172 (add_attribute): Formatting fix.
173 (arm_valid_target_attribute_p): Adjust cl_optimization_restore,
174 cl_target_option_restore, arm_valid_target_attribute_tree and
175 build_optimization_node callers.
176 * config/arm/arm-c.c (arm_pragma_target_parse): Adjust
177 cl_target_option_restore callers.
178 * config/csky/csky.c (csky_option_override): Adjust
179 build_target_option_node and cl_target_option_save callers.
180 * config/gcn/gcn.c (gcn_fixup_accel_lto_options): Adjust
181 build_optimization_node and cl_optimization_restore callers.
182 * config/i386/i386-builtins.c (get_builtin_code_for_version):
183 Adjust cl_target_option_save and cl_target_option_restore
185 * config/i386/i386-c.c (ix86_pragma_target_parse): Adjust
186 build_target_option_node and cl_target_option_restore callers.
187 * config/i386/i386-options.c (ix86_function_specific_save,
188 ix86_function_specific_restore): Add opts_set arguments.
189 (ix86_valid_target_attribute_tree): Adjust build_target_option_node
191 (ix86_valid_target_attribute_p): Adjust build_optimization_node,
192 cl_optimization_restore, cl_target_option_restore,
193 ix86_valid_target_attribute_tree and build_optimization_node callers.
194 (ix86_option_override_internal): Adjust build_target_option_node
196 (ix86_reset_previous_fndecl, ix86_set_current_function): Adjust
197 cl_target_option_restore callers.
198 * config/i386/i386-options.h (ix86_function_specific_save,
199 ix86_function_specific_restore): Add opts_set argument.
200 * config/nios2/nios2.c (nios2_option_override): Adjust
201 build_target_option_node caller.
202 (nios2_option_save, nios2_option_restore): Add opts_set argument.
203 (nios2_valid_target_attribute_tree): Adjust build_target_option_node
205 (nios2_valid_target_attribute_p): Adjust build_optimization_node,
206 cl_optimization_restore, cl_target_option_save and
207 cl_target_option_restore callers.
208 (nios2_set_current_function, nios2_pragma_target_parse): Adjust
209 cl_target_option_restore callers.
210 * config/pru/pru.c (pru_option_override): Adjust
211 build_target_option_node caller.
212 (pru_set_current_function): Adjust cl_target_option_restore
214 * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust
215 cl_target_option_save caller.
216 (rs6000_option_override_internal): Adjust build_target_option_node
218 (rs6000_valid_attribute_p): Adjust build_optimization_node,
219 cl_optimization_restore, cl_target_option_save,
220 cl_target_option_restore and build_target_option_node callers.
221 (rs6000_pragma_target_parse): Adjust cl_target_option_restore and
222 build_target_option_node callers.
223 (rs6000_activate_target_options): Adjust cl_target_option_restore
225 (rs6000_function_specific_save, rs6000_function_specific_restore):
226 Add opts_set argument.
227 * config/s390/s390.c (s390_function_specific_restore): Likewise.
228 (s390_option_override_internal): Adjust s390_function_specific_restore
230 (s390_option_override, s390_valid_target_attribute_tree): Adjust
231 build_target_option_node caller.
232 (s390_valid_target_attribute_p): Adjust build_optimization_node,
233 cl_optimization_restore and cl_target_option_restore callers.
234 (s390_activate_target_options): Adjust cl_target_option_restore
236 * config/s390/s390-c.c (s390_cpu_cpp_builtins): Adjust
237 cl_target_option_save caller.
238 (s390_pragma_target_parse): Adjust build_target_option_node and
239 cl_target_option_restore callers.
241 2020-09-13 Roger Sayle <roger@nextmovesoftware.com>
243 * config/pa/pa.c (hppa_rtx_costs) [ASHIFT, ASHIFTRT, LSHIFTRT]:
244 Provide accurate costs for DImode shifts of integer constants.
246 2020-09-12 Roger Sayle <roger@nextmovesoftware.com>
247 John David Anglin <danglin@gcc.gnu.org>
249 * config/pa/pa.md (shrpsi4_1, shrpsi4_2): New define_insns split
250 out from previous shrpsi4 providing two commutitive variants using
251 plus_xor_ior_operator as a predicate.
252 (shrpdi4_1, shrpdi4_2, shrpdi_3, shrpdi_4): Likewise DImode versions
253 where _1 and _2 take register shifts, and _3 and _4 for integers.
254 (rotlsi3_internal): Name this anonymous instruction.
255 (rotrdi3): New DImode insn copied from rotrsi3.
256 (rotldi3): New DImode expander copied from rotlsi3.
257 (rotldi4_internal): New DImode insn copied from rotsi3_internal.
259 2020-09-11 Michael Meissner <meissner@linux.ibm.com>
261 * config/rs6000/rs6000.c (rs6000_maybe_emit_maxc_minc): Rename
262 from rs6000_emit_p9_fp_minmax. Change return type to bool. Add
263 comments to document NaN/signed zero behavior.
264 (rs6000_maybe_emit_fp_cmove): Rename from rs6000_emit_p9_fp_cmove.
265 (have_compare_and_set_mask): New helper function.
266 (rs6000_emit_cmove): Update calls to new names and the new helper
269 2020-09-11 Nathan Sidwell <nathan@acm.org>
271 * config/i386/sse.md (mov<mode>): Fix operand indices.
273 2020-09-11 Martin Sebor <msebor@redhat.com>
276 * builtins.c (compute_objsize): Remove incorrect offset adjustment.
277 (compute_objsize): Adjust offset range here instead.
279 2020-09-11 Richard Biener <rguenther@suse.de>
281 PR tree-optimization/97020
282 * tree-vect-slp.c (vect_slp_analyze_operations): Apply
283 SLP costs when doing loop vectorization.
285 2020-09-11 Tom de Vries <tdevries@suse.de>
288 * config/nvptx/nvptx.md (define_expand "atomic_test_and_set"): New
291 2020-09-11 Andrew Stubbs <ams@codesourcery.com>
293 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align TImode registers.
294 * config/gcn/gcn.md: Assert that TImode registers do not early clobber.
296 2020-09-11 Richard Biener <rguenther@suse.de>
298 * tree-vectorizer.h (_slp_instance::location): New method.
299 (vect_schedule_slp): Adjust prototype.
300 * tree-vectorizer.c (vec_info::remove_stmt): Adjust
301 the BB region begin if we removed the stmt it points to.
302 * tree-vect-loop.c (vect_transform_loop): Adjust.
303 * tree-vect-slp.c (_slp_instance::location): Implement.
304 (vect_analyze_slp_instance): For BB vectorization set
305 vect_location to that of the instance.
306 (vect_slp_analyze_operations): Likewise.
307 (vect_bb_vectorization_profitable_p): Remove wrapper.
308 (vect_slp_analyze_bb_1): Remove cost check here.
309 (vect_slp_region): Cost check and code generate subgraphs separately,
310 report optimized locations and missed optimizations due to
311 profitability for each of them.
312 (vect_schedule_slp): Get the vector of SLP graph entries to
313 vectorize as argument.
315 2020-09-11 Richard Biener <rguenther@suse.de>
317 PR tree-optimization/97013
318 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove duplicate dumping.
320 2020-09-11 Richard Biener <rguenther@suse.de>
322 * tree-vect-slp.c (vect_build_slp_tree_1): Check vector
323 types for all lanes are compatible.
324 (vect_analyze_slp_instance): Appropriately check for stores.
325 (vect_schedule_slp): Likewise.
327 2020-09-11 Tom de Vries <tdevries@suse.de>
329 * config/nvptx/nvptx.c (nvptx_assemble_value): Fix undefined
332 2020-09-11 Tom de Vries <tdevries@suse.de>
334 * config/nvptx/nvptx.c (nvptx_assemble_value): Handle negative
337 2020-09-11 Aaron Sawdey <acsawdey@linux.ibm.com>
339 * config/rs6000/rs6000.c (rs6000_option_override_internal):
342 2020-09-10 Michael Meissner <meissner@linux.ibm.com>
344 * config/rs6000/rs6000-protos.h (rs6000_emit_cmove): Change return
346 (rs6000_emit_int_cmove): Change return type to bool.
347 * config/rs6000/rs6000.c (rs6000_emit_cmove): Change return type
349 (rs6000_emit_int_cmove): Change return type to bool.
351 2020-09-10 Tom de Vries <tdevries@suse.de>
354 * config/nvptx/nvptx.c (nvptx_assemble_value): Handle shift by
355 number of bits in shift operand.
357 2020-09-10 Jakub Jelinek <jakub@redhat.com>
359 * lto-streamer-out.c (collect_block_tree_leafs): Recurse on
360 root rather than BLOCK_SUBBLOCKS (root).
362 2020-09-10 Alex Coplan <alex.coplan@arm.com>
364 * config/aarch64/aarch64-cores.def: Add Cortex-R82.
365 * config/aarch64/aarch64-tune.md: Regenerate.
366 * doc/invoke.texi: Add entry for Cortex-R82.
368 2020-09-10 Alex Coplan <alex.coplan@arm.com>
370 * common/config/aarch64/aarch64-common.c
371 (aarch64_get_extension_string_for_isa_flags): Don't force +crc for
373 * config/aarch64/aarch64-arches.def: Add entry for Armv8-R.
374 * config/aarch64/aarch64-c.c (aarch64_define_unconditional_macros): Set
375 __ARM_ARCH_PROFILE correctly for Armv8-R.
376 * config/aarch64/aarch64.h (AARCH64_FL_V8_R): New.
377 (AARCH64_FL_FOR_ARCH8_R): New.
378 (AARCH64_ISA_V8_R): New.
379 * doc/invoke.texi: Add Armv8-R to architecture table.
381 2020-09-10 Jakub Jelinek <jakub@redhat.com>
383 * config/arm/arm.c (arm_override_options_after_change_1): Add opts_set
384 argument, test opts_set->x_str_align_functions rather than
385 opts->x_str_align_functions.
386 (arm_override_options_after_change, arm_option_override_internal,
387 arm_set_current_function): Adjust callers.
389 2020-09-10 Jakub Jelinek <jakub@redhat.com>
392 * config/arm/arm.c (arm_override_options_after_change): Don't call
393 arm_configure_build_target here.
394 (arm_set_current_function): Call arm_override_options_after_change_1
397 2020-09-10 Pat Haugen <pthaugen@linux.ibm.com>
399 * config/rs6000/rs6000.md
400 (lfiwzx, floatunssi<mode>2_lfiwzx, p8_mtvsrwz, p8_mtvsrd_sf): Fix insn
402 * config/rs6000/vsx.md
403 (vsx_concat_<mode>, vsx_splat_<mode>_reg, vsx_splat_v4sf): Likewise.
405 2020-09-10 Jonathan Yong <10walls@gmail.com>
407 * config.host: Adjust plugin name for Windows.
409 2020-09-10 Tom de Vries <tdevries@suse.de>
411 PR tree-optimization/97000
412 * tree-cfgcleanup.c (cleanup_call_ctrl_altering_flag): Don't clear
415 2020-09-10 Jakub Jelinek <jakub@redhat.com>
418 * lto-streamer.h (struct output_block): Add emit_pwd member.
419 * lto-streamer-out.c: Include toplev.h.
420 (clear_line_info): Set emit_pwd.
421 (lto_output_location_1): Encode the ob->current_file != xloc.file
422 bit directly into the location number. If changing file, emit
423 additionally a bit whether pwd is emitted and emit it before the
424 first relative pathname since clear_line_info.
425 (output_function, output_constructor): Don't call clear_line_info
427 * lto-streamer-in.c (struct string_pair_map): New type.
428 (struct string_pair_map_hasher): New type.
429 (string_pair_map_hasher::hash): New method.
430 (string_pair_map_hasher::equal): New method.
431 (path_name_pair_hash_table, string_pair_map_allocator): New variables.
432 (relative_path_prefix, canon_relative_path_prefix,
433 canon_relative_file_name): New functions.
434 (canon_file_name): Add relative_prefix argument, if non-NULL
435 and string is a relative path, return canon_relative_file_name.
436 (lto_location_cache::input_location_and_block): Decode file change
437 bit from the location number. If changing file, unpack bit whether
438 pwd is streamed and stream in pwd. Adjust canon_file_name caller.
439 (lto_free_file_name_hash): Delete path_name_pair_hash_table
440 and string_pair_map_allocator.
442 2020-09-10 Richard Biener <rguenther@suse.de>
444 PR tree-optimization/96043
445 * tree-vectorizer.h (_slp_instance::cost_vec): New.
446 (_slp_instance::subgraph_entries): Likewise.
447 (BB_VINFO_TARGET_COST_DATA): Remove.
448 * tree-vect-slp.c (vect_free_slp_instance): Free
449 cost_vec and subgraph_entries.
450 (vect_analyze_slp_instance): Initialize them.
451 (vect_slp_analyze_operations): Defer passing costs to
452 the target, instead record them in the SLP graph entry.
453 (get_ultimate_leader): New helper for graph partitioning.
454 (vect_bb_partition_graph_r): Likewise.
455 (vect_bb_partition_graph): New function to partition the
456 SLP graph into independently costable parts.
457 (vect_bb_vectorization_profitable_p): Adjust to work on
459 (vect_bb_vectorization_profitable_p): New wrapper,
460 discarding non-profitable vectorization of subgraphs.
461 (vect_slp_analyze_bb_1): Call vect_bb_partition_graph before
464 2020-09-09 David Malcolm <dmalcolm@redhat.com>
467 * doc/invoke.texi: Document -Wanalyzer-mismatching-deallocation.
469 2020-09-09 Segher Boessenkool <segher@kernel.crashing.org>
471 PR rtl-optimization/96475
472 * bb-reorder.c (maybe_duplicate_computed_goto): Remove single_pred_p
475 2020-09-09 Tom de Vries <tdevries@suse.de>
477 * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Fix Wformat
480 2020-09-09 Richard Biener <rguenther@suse.de>
482 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
483 nothing when the permutation doesn't permute.
485 2020-09-09 Tom de Vries <tdevries@suse.de>
488 * config/nvptx/nvptx.c (write_fn_proto): Fix boolean type check.
490 2020-09-09 Richard Biener <rguenther@suse.de>
492 * tree-vect-stmts.c (vectorizable_comparison): Allow
493 STMT_VINFO_LIVE_P stmts.
495 2020-09-09 Richard Biener <rguenther@suse.de>
497 * tree-vect-stmts.c (vectorizable_condition): Allow
498 STMT_VINFO_LIVE_P stmts.
500 2020-09-09 Richard Biener <rguenther@suse.de>
502 PR tree-optimization/96978
503 * tree-vect-stmts.c (vectorizable_condition): Do not
504 look at STMT_VINFO_LIVE_P for BB vectorization.
505 (vectorizable_comparison): Likewise.
507 2020-09-09 liuhongt <hongtao.liu@intel.com>
510 * config/i386/i386.md (get_thread_pointer<mode>): New
513 2020-09-08 Julian Brown <julian@codesourcery.com>
515 * config/gcn/gcn-valu.md (scatter<mode>_insn_1offset_ds<exec_scatter>):
517 * config/gcn/gcn.md (*mov<mode>_insn, *movti_insn): Add waitcnt to
518 ds_write alternatives.
520 2020-09-08 Julian Brown <julian@codesourcery.com>
522 * config/gcn/mkoffload.c (process_asm): Initialise regcount. Update
523 scanning for SGPR/VGPR usage for HSACO v3.
525 2020-09-08 Aldy Hernandez <aldyh@redhat.com>
527 PR tree-optimization/96967
528 * tree-vrp.c (find_case_label_range): Cast label range to
529 type of switch operand.
531 2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com>
533 * config/msp430/msp430.c (msp430_file_end): Fix jumbled
534 HAVE_AS_MSPABI_ATTRIBUTE and HAVE_AS_GNU_ATTRIBUTE checks.
535 * configure: Regenerate.
536 * configure.ac: Use ".mspabi_attribute 4,2" to check for assembler
537 support for this object attribute directive.
539 2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com>
541 * common/config/msp430/msp430-common.c (msp430_handle_option): Remove
543 Set target_cpu value to new enum values when parsing certain -mmcu=
545 * config/msp430/msp430-opts.h (enum msp430_cpu_types): New.
546 * config/msp430/msp430.c (msp430_option_override): Handle new
547 target_cpu enum values.
548 Set target_cpu using extracted value for given MCU when -mcpu=
549 option is not passed by the user.
550 * config/msp430/msp430.opt: Handle -mcpu= values using enums.
552 2020-09-07 Richard Sandiford <richard.sandiford@arm.com>
554 PR rtl-optimization/96796
555 * lra-constraints.c (in_class_p): Add a default-false
556 allow_all_reload_class_changes_p parameter. Do not treat
557 reload moves specially when the parameter is true.
558 (get_reload_reg): Try to narrow the class of an existing OP_OUT
559 reload if we're reloading a reload pseudo in a reload instruction.
561 2020-09-07 Andrea Corallo <andrea.corallo@arm.com>
563 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Revert
564 dead-code removal introduced by 09fa6acd8d9 + add a comment to
567 2020-09-07 Jozef Lawrynowicz <jozef.l@mittosystems.com>
569 * doc/rtl.texi (subreg): Fix documentation to state there is a known
570 number of undefined bits in regs and subregs of MODE_PARTIAL_INT modes.
572 2020-09-07 Jozef Lawrynowicz <jozef.l@mittosystems.com>
574 * config/msp430/msp430.c (msp430_option_override): Don't set the
575 ISA to 430 when the MCU is unrecognized.
577 2020-09-07 Iain Sandoe <iain@sandoe.co.uk>
579 * config/darwin.c (darwin_libc_has_function): Report sincos
582 2020-09-07 Alex Coplan <alex.coplan@arm.com>
584 * config/aarch64/aarch64.md (*adds_mul_imm_<mode>): Delete.
585 (*subs_mul_imm_<mode>): Delete.
586 (*adds_<optab><mode>_multp2): Delete.
587 (*subs_<optab><mode>_multp2): Delete.
588 (*add_mul_imm_<mode>): Delete.
589 (*add_<optab><ALLX:mode>_mult_<GPI:mode>): Delete.
590 (*add_<optab><SHORT:mode>_mult_si_uxtw): Delete.
591 (*add_<optab><mode>_multp2): Delete.
592 (*add_<optab>si_multp2_uxtw): Delete.
593 (*add_uxt<mode>_multp2): Delete.
594 (*add_uxtsi_multp2_uxtw): Delete.
595 (*sub_mul_imm_<mode>): Delete.
596 (*sub_mul_imm_si_uxtw): Delete.
597 (*sub_<optab><mode>_multp2): Delete.
598 (*sub_<optab>si_multp2_uxtw): Delete.
599 (*sub_uxt<mode>_multp2): Delete.
600 (*sub_uxtsi_multp2_uxtw): Delete.
601 (*neg_mul_imm_<mode>2): Delete.
602 (*neg_mul_imm_si2_uxtw): Delete.
603 * config/aarch64/predicates.md (aarch64_pwr_imm3): Delete.
604 (aarch64_pwr_2_si): Delete.
605 (aarch64_pwr_2_di): Delete.
607 2020-09-07 Alex Coplan <alex.coplan@arm.com>
609 * config/aarch64/aarch64.md
610 (*adds_<optab><ALLX:mode>_<GPI:mode>): Ensure extended operand
611 agrees with width of extension specifier.
612 (*subs_<optab><ALLX:mode>_<GPI:mode>): Likewise.
613 (*adds_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise.
614 (*subs_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise.
615 (*add_<optab><ALLX:mode>_<GPI:mode>): Likewise.
616 (*add_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
617 (*add_uxt<mode>_shift2): Likewise.
618 (*sub_<optab><ALLX:mode>_<GPI:mode>): Likewise.
619 (*sub_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
620 (*sub_uxt<mode>_shift2): Likewise.
621 (*cmp_swp_<optab><ALLX:mode>_reg<GPI:mode>): Likewise.
622 (*cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
624 2020-09-07 Richard Biener <rguenther@suse.de>
626 * tree-vect-slp.c (vect_analyze_slp_instance): Dump
627 stmts we start SLP analysis from, failure and splitting.
628 (vect_schedule_slp): Dump SLP graph entry and root stmt
629 we are about to emit code for.
631 2020-09-07 Martin Storsjö <martin@martin.st>
633 * dwarf2out.c (file_name_acquire): Make a strchr return value
636 2020-09-07 Jakub Jelinek <jakub@redhat.com>
639 * lto-streamer-out.c (output_cfg): Also stream goto_locus for edges.
640 Use bp_pack_var_len_unsigned instead of streamer_write_uhwi to stream
641 e->dest->index and e->flags.
642 (output_function): Call output_cfg before output_ssa_name, rather than
643 after streaming all bbs.
644 * lto-streamer-in.c (input_cfg): Stream in goto_locus for edges.
645 Use bp_unpack_var_len_unsigned instead of streamer_read_uhwi to stream
646 in dest_index and edge_flags.
648 2020-09-07 Richard Biener <rguenther@suse.de>
650 * tree-vectorizer.h (vectorizable_live_operation): Adjust.
651 * tree-vect-loop.c (vectorizable_live_operation): Vectorize
652 live lanes out of basic-block vectorization nodes.
653 * tree-vect-slp.c (vect_bb_slp_mark_live_stmts): New function.
654 (vect_slp_analyze_operations): Analyze live lanes and their
655 vectorization possibility after the whole SLP graph is final.
656 (vect_bb_slp_scalar_cost): Adjust for vectorized live lanes.
657 * tree-vect-stmts.c (can_vectorize_live_stmts): Adjust.
658 (vect_transform_stmt): Call can_vectorize_live_stmts also for
659 basic-block vectorization.
661 2020-09-04 Richard Biener <rguenther@suse.de>
663 PR tree-optimization/96698
664 PR tree-optimization/96920
665 * tree-vectorizer.h (loop_vec_info::reduc_latch_defs): Remove.
666 (loop_vec_info::reduc_latch_slp_defs): Likewise.
667 * tree-vect-stmts.c (vect_transform_stmt): Remove vectorized
668 cycle PHI latch code.
669 * tree-vect-loop.c (maybe_set_vectorized_backedge_value): New
670 helper to set vectorized cycle PHI latch values.
671 (vect_transform_loop): Walk over all PHIs again after
672 vectorizing them, calling maybe_set_vectorized_backedge_value.
673 Call maybe_set_vectorized_backedge_value for each vectorized
674 stmt. Remove delayed update code.
675 * tree-vect-slp.c (vect_analyze_slp_instance): Initialize
676 SLP instance reduc_phis member.
677 (vect_schedule_slp): Set vectorized cycle PHI latch values.
679 2020-09-04 Andrea Corallo <andrea.corallo@arm.com>
681 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Remove
682 dead code as LOOP_VINFO_USING_PARTIAL_VECTORS_P (loop_vinfo) is
685 2020-09-04 Christophe Lyon <christophe.lyon@linaro.org>
688 * config/arm/thumb1.md: Move movsi splitter for
689 arm_disable_literal_pool after the other movsi splitters.
691 2020-09-04 Aldy Hernandez <aldyh@redhat.com>
693 * range-op.cc (range_operator::fold_range): Rename widest_irange
695 (operator_div::wi_fold): Same.
696 (operator_lshift::op1_range): Same.
697 (operator_rshift::op1_range): Same.
698 (operator_cast::fold_range): Same.
699 (operator_cast::op1_range): Same.
700 (operator_bitwise_and::remove_impossible_ranges): Same.
701 (operator_bitwise_and::op1_range): Same.
702 (operator_abs::op1_range): Same.
704 (widest_irange_tests): Same.
705 (range3_tests): Rename irange3 to int_range3.
706 (int_range_max_tests): Rename from widest_irange_tests.
707 Rename widest_irange to int_range_max.
708 (operator_tests): Rename widest_irange to int_range_max.
710 * tree-vrp.c (find_case_label_range): Same.
711 * value-range.cc (irange::irange_intersect): Same.
712 (irange::invert): Same.
713 * value-range.h: Same.
715 2020-09-04 Richard Biener <rguenther@suse.de>
717 PR tree-optimization/96931
718 * tree-cfgcleanup.c (cleanup_call_ctrl_altering_flag): If
719 there's a fallthru edge and no abnormal edge the call is
720 no longer control-altering.
721 (cleanup_control_flow_bb): Pass down the BB to
722 cleanup_call_ctrl_altering_flag.
724 2020-09-04 Jakub Jelinek <jakub@redhat.com>
726 * lto-streamer.h (stream_input_location_now): Remove declaration.
727 * lto-streamer-in.c (stream_input_location_now): Remove.
728 (input_eh_region, input_struct_function_base): Use
729 stream_input_location instead of stream_input_location_now.
731 2020-09-04 Jakub Jelinek <jakub@redhat.com>
733 * lto-streamer.h (struct output_block): Add reset_locus member.
734 * lto-streamer-out.c (clear_line_info): Set reset_locus to true.
735 (lto_output_location_1): If reset_locus, clear it and ensure
736 current_{file,line,col} is different from xloc members.
738 2020-09-04 David Faust <david.faust@oracle.com>
740 * config/bpf/bpf.h (ASM_SPEC): Pass -mxbpf to gas, if specified.
741 * config/bpf/bpf.c (bpf_output_call): Support indirect calls in xBPF.
743 2020-09-03 Martin Jambor <mjambor@suse.cz>
745 PR tree-optimization/96820
746 * tree-sra.c (create_access): Disqualify candidates with accesses
747 beyond the end of the original aggregate.
748 (maybe_add_sra_candidate): Check that candidate type size fits
749 signed uhwi for the sake of consistency.
751 2020-09-03 Will Schmidt <will_schmidt@vnet.ibm.com>
753 * config/rs6000/rs6000-call.c (rs6000_init_builtin): Update V2DI_type_node
754 and unsigned_V2DI_type_node definitions.
756 2020-09-03 Jakub Jelinek <jakub@redhat.com>
759 * tree.h (struct decl_tree_traits): New type.
760 (decl_tree_map): New typedef.
762 2020-09-03 Jakub Jelinek <jakub@redhat.com>
765 * gimple.h (gimple_location_ptr, gimple_phi_arg_location_ptr): New
767 * streamer-hooks.h (struct streamer_hooks): Add
768 output_location_and_block callback. Fix up formatting for
770 (stream_output_location_and_block): Define.
771 * lto-streamer.h (class lto_location_cache): Fix comment typo. Add
772 current_block member.
773 (lto_location_cache::input_location_and_block): New method.
774 (lto_location_cache::lto_location_cache): Initialize current_block.
775 (lto_location_cache::cached_location): Add block member.
776 (struct output_block): Add current_block member.
777 (lto_output_location): Formatting fix.
778 (lto_output_location_and_block): Declare.
779 * lto-streamer.c (lto_streamer_hooks_init): Initialize
780 streamer_hooks.output_location_and_block.
781 * lto-streamer-in.c (lto_location_cache::cmp_loc): Also compare
783 (lto_location_cache::apply_location_cache): Handle blocks.
784 (lto_location_cache::accept_location_cache,
785 lto_location_cache::revert_location_cache): Fix up function comments.
786 (lto_location_cache::input_location_and_block): New method.
787 (lto_location_cache::input_location): Implement using
788 input_location_and_block.
789 (input_function): Invoke apply_location_cache after streaming in all
791 * lto-streamer-out.c (clear_line_info): Set current_block.
792 (lto_output_location_1): New function, moved from lto_output_location,
793 added block handling.
794 (lto_output_location): Implement using lto_output_location_1.
795 (lto_output_location_and_block): New function.
796 * gimple-streamer-in.c (input_phi): Use input_location_and_block
797 to input and cache both location and block.
798 (input_gimple_stmt): Likewise.
799 * gimple-streamer-out.c (output_phi): Use
800 stream_output_location_and_block.
801 (output_gimple_stmt): Likewise.
803 2020-09-03 Richard Biener <rguenther@suse.de>
805 * tree-vect-generic.c (tree_vec_extract): Remove odd
806 special-casing of boolean vectors.
807 * fold-const.c (fold_ternary_loc): Handle boolean vector
810 2020-09-03 Hongtao Liu <hongtao.liu@intel.com>
813 * config/i386/i386-features.c
814 (replace_constant_pool_with_broadcast): New function.
815 (constant_pool_broadcast): Ditto.
816 (class pass_constant_pool_broadcast): New pass.
817 (make_pass_constant_pool_broadcast): Ditto.
818 (remove_partial_avx_dependency): Call
819 replace_constant_pool_with_broadcast under TARGET_AVX512F, it
820 would save compile time when both pass rpad and cpb are
822 (remove_partial_avx_dependency_gate): New function.
823 (class pass_remove_partial_avx_dependency::gate): Call
824 remove_partial_avx_dependency_gate.
825 * config/i386/i386-passes.def: Insert new pass after combine.
826 * config/i386/i386-protos.h
827 (make_pass_constant_pool_broadcast): Declare.
828 * config/i386/sse.md (*avx512dq_mul<mode>3<mask_name>_bcst):
830 (*avx512f_mul<mode>3<mask_name>_bcst): Ditto.
831 * config/i386/avx512fintrin.h (_mm512_set1_ps,
832 _mm512_set1_pd,_mm512_set1_epi32, _mm512_set1_epi64): Adjusted.
834 2020-09-02 Jonathan Wakely <jwakely@redhat.com>
837 * ginclude/stdbool.h (bool, false, true): Never define for C++.
839 2020-09-02 Jozef Lawrynowicz <jozef.l@mittosystems.com>
841 * doc/invoke.texi (MSP430 options): Fix -mlarge description to
842 indicate size_t is a 20-bit type.
844 2020-09-02 Roger Sayle <roger@nextmovesoftware.com>
846 * config/pa/pa.c (hppa_rtx_costs) [ASHIFT, ASHIFTRT, LSHIFTRT]:
847 Provide accurate costs for shifts of integer constants.
849 2020-09-02 Jose E. Marchesi <jose.marchesi@oracle.com>
851 * config/bpf/bpf.c (bpf_asm_named_section): Delete.
852 (TARGET_ASM_NAMED_SECTION): Likewise.
854 2020-09-02 Jose E. Marchesi <jemarch@gnu.org>
856 * config.gcc: Use elfos.h in bpf-*-* targets.
857 * config/bpf/bpf.h (MAX_OFILE_ALIGNMENT): Remove definition.
858 (COMMON_ASM_OP): Likewise.
859 (INIT_SECTION_ASM_OP): Likewise.
860 (FINI_SECTION_ASM_OP): Likewise.
861 (ASM_OUTPUT_SKIP): Likewise.
862 (ASM_OUTPUT_ALIGNED_COMMON): Likewise.
863 (ASM_OUTPUT_ALIGNED_LOCAL): Likewise.
865 2020-09-01 Martin Sebor <msebor@redhat.com>
867 * builtins.c (compute_objsize): Only replace the upper bound
868 of a POINTER_PLUS offset when it's less than the lower bound.
870 2020-09-01 Peter Bergner <bergner@linux.ibm.com>
873 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Do not
874 reuse accumulator memory reference for source and destination accesses.
876 2020-09-01 Martin Liska <mliska@suse.cz>
878 * cfgrtl.c (rtl_create_basic_block): Use default value for
879 growth vector function.
880 * gimple.c (gimple_set_bb): Likewise.
881 * symbol-summary.h: Likewise.
882 * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise.
883 (build_gimple_cfg): Likewise.
884 (create_bb): Likewise.
885 (move_block_to_fn): Likewise.
887 2020-09-01 Martin Liska <mliska@suse.cz>
889 * vec.h (vec_safe_grow): Change default of exact to false.
890 (vec_safe_grow_cleared): Likewise.
892 2020-09-01 Roger Sayle <roger@nextmovesoftware.com>
895 * targhooks.c (default_vector_alignment): Return at least the
896 GET_MODE_ALIGNMENT for the type's mode.
898 2020-09-01 Richard Biener <rguenther@suse.de>
900 PR rtl-optimization/96812
901 * tree-ssa-address.c (copy_ref_info): Also copy dependence info.
902 * cfgrtl.h (duplicate_insn_chain): Adjust prototype.
903 * cfgrtl.c (duplicate_insn_chain): Remap dependence info
905 (cfg_layout_duplicate_bb): Make sure we remap dependence info.
906 * modulo-sched.c (duplicate_insns_of_cycles): Remap dependence
908 (generate_prolog_epilog): Adjust.
909 * config/c6x/c6x.c (hwloop_optimize): Remap dependence info.
911 2020-09-01 Kewen Lin <linkw@gcc.gnu.org>
913 * doc/sourcebuild.texi (has_arch_pwr5, has_arch_pwr6, has_arch_pwr7,
914 has_arch_pwr8, has_arch_pwr9): Document.
916 2020-08-31 Carl Love <cel@us.ibm.com>
919 * config/rs6000/altivec.h (vec_popcntb, vec_popcnth, vec_popcntw,
920 vec_popcntd): Remove defines.
922 2020-08-31 Marek Polacek <polacek@redhat.com>
923 Jason Merrill <jason@redhat.com>
926 * tree.c (build_constructor_from_vec): New.
927 * tree.h (build_constructor_from_vec): Declare.
929 2020-08-31 Aldy Hernandez <aldyh@redhat.com>
931 PR tree-optimization/96818
932 * tree-vrp.c (find_case_label_range): Cast label range to
933 type of switch operand.
935 2020-08-31 liuhongt <hongtao.liu@intel.com>
938 * config/i386/sse.md (vec_unpacku_float_hi_v16si): For vector
939 compare to integer mask, don't use gen_rtx_LT, use
940 ix86_expand_mask_vec_cmp instead.
941 (vec_unpacku_float_hi_v16si): Ditto.
943 2020-08-31 Jakub Jelinek <jakub@redhat.com>
945 * tree-cfg.c (verify_gimple_switch): If the first non-default case
946 label has CASE_HIGH, verify it has the same type as CASE_LOW.
948 2020-08-31 Feng Xue <fxue@os.amperecomputing.com>
951 * ipa-cp.c (decide_about_value): Use safe_add to avoid cost addition
954 2020-08-31 Jakub Jelinek <jakub@redhat.com>
957 * varasm.c: Include alloc-pool.h.
958 (output_constant_pool_contents): Emit desc->mark < 0 entries as
960 (struct constant_descriptor_rtx_data): New type.
961 (constant_descriptor_rtx_data_cmp): New function.
962 (struct const_rtx_data_hasher): New type.
963 (const_rtx_data_hasher::hash, const_rtx_data_hasher::equal): New
965 (optimize_constant_pool): New function.
966 (output_shared_constant_pool): Call it if TARGET_SUPPORTS_ALIASES.
968 2020-08-31 Kewen Lin <linkw@gcc.gnu.org>
970 * doc/sourcebuild.texi (vect_len_load_store,
971 vect_partial_vectors_usage_1, vect_partial_vectors_usage_2,
972 vect_partial_vectors): Document.
974 2020-08-30 Martin Sebor <msebor@redhat.com>
976 * builtins.c (access_ref::access_ref): Call get_size_range instead
979 2020-08-30 Jakub Jelinek <jakub@redhat.com>
981 * config/i386/sse.md (ssse3_pshufbv8qi): Use gen_int_mode instead of
982 GEN_INT, and ix86_build_const_vector instead of gen_rtvec and
985 2020-08-29 Bill Schmidt <wschmidt@linux.ibm.com>
987 * config/rs6000/rs6000-builtin.def (MASK_FOR_STORE): Remove.
988 * config/rs6000/rs6000-call.c (rs6000_expand_builtin): Remove
989 all logic for ALTIVEC_BUILTIN_MASK_FOR_STORE.
991 2020-08-28 Martin Sebor <msebor@redhat.com>
993 * attribs.c (init_attr_rdwr_indices): Use global access_mode.
994 * attribs.h (struct attr_access): Same.
995 * builtins.c (fold_builtin_strlen): Add argument.
996 (compute_objsize): Declare.
997 (get_range): Declare.
998 (check_read_access): New function.
999 (access_ref::access_ref): Define ctor.
1000 (warn_string_no_nul): Add arguments. Handle -Wstrintop-overread.
1001 (check_nul_terminated_array): Handle source strings of different
1003 (expand_builtin_strlen): Remove warning code, call check_read_access
1004 instead. Declare locals closer to their initialization.
1005 (expand_builtin_strnlen): Same.
1006 (maybe_warn_for_bound): New function.
1007 (warn_for_access): Remove argument. Handle -Wstrintop-overread.
1008 (inform_access): Change argument type.
1009 (get_size_range): New function.
1010 (check_access): Remove unused arguments. Add new arguments. Handle
1011 -Wstrintop-overread. Move warning code to helpers and call them.
1012 Call check_nul_terminated_array.
1013 (check_memop_access): Remove unnecessary and provide additional
1015 (expand_builtin_memchr): Call check_read_access.
1016 (expand_builtin_strcat): Remove unnecessary and provide additional
1018 (expand_builtin_strcpy): Same.
1019 (expand_builtin_strcpy_args): Same. Avoid testing no-warning bit.
1020 (expand_builtin_stpcpy_1): Remove unnecessary and provide additional
1022 (expand_builtin_stpncpy): Same.
1023 (check_strncat_sizes): Same.
1024 (expand_builtin_strncat): Remove unnecessary and provide additional
1025 arguments in calls. Adjust comments.
1026 (expand_builtin_strncpy): Remove unnecessary and provide additional
1028 (expand_builtin_memcmp): Remove warning code. Call check_access.
1029 (expand_builtin_strcmp): Call check_access instead of
1030 check_nul_terminated_array.
1031 (expand_builtin_strncmp): Handle -Wstrintop-overread.
1032 (expand_builtin_fork_or_exec): Call check_access instead of
1033 check_nul_terminated_array.
1034 (expand_builtin): Same.
1035 (fold_builtin_1): Pass additional argument.
1036 (fold_builtin_n): Same.
1037 (fold_builtin_strpbrk): Remove calls to check_nul_terminated_array.
1038 (expand_builtin_memory_chk): Add comments.
1039 (maybe_emit_chk_warning): Remove unnecessary and provide additional
1041 (maybe_emit_sprintf_chk_warning): Same. Adjust comments.
1042 * builtins.h (warn_string_no_nul): Add arguments.
1043 (struct access_ref): Add member and ctor argument.
1044 (struct access_data): Add members and ctor.
1045 (check_access): Adjust signature.
1046 * calls.c (maybe_warn_nonstring_arg): Return an indication of
1047 whether a warning was issued. Issue -Wstrintop-overread instead
1048 of -Wstringop-overflow.
1049 (append_attrname): Adjust to naming changes.
1050 (maybe_warn_rdwr_sizes): Same. Remove unnecessary and provide
1051 additional arguments in calls.
1052 * calls.h (maybe_warn_nonstring_arg): Return bool.
1053 * doc/invoke.texi (-Wstringop-overread): Document new option.
1054 * gimple-fold.c (gimple_fold_builtin_strcpy): Provide an additional
1056 (gimple_fold_builtin_stpcpy): Same.
1057 * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Adjust to naming
1059 * tree.h (enum access_mode): New type.
1061 2020-08-28 Bill Schmidt <wschmidt@linux.ibm.com>
1063 * config/rs6000/rs6000.c (rs6000_call_aix): Remove test for r12.
1064 (rs6000_sibcall_aix): Likewise.
1066 2020-08-28 Andrew Stubbs <ams@codesourcery.com>
1068 * config/gcn/gcn-tree.c (gcn_goacc_get_worker_red_decl): Add "true"
1069 parameter to vec_safe_grow_cleared.
1071 2020-08-28 Martin Sebor <msebor@redhat.com>
1073 * ggc-common.c (gt_pch_save): Add argument to a call.
1075 2020-08-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
1078 * config/aarch64/aarch64-sve.md
1079 (cond_sub<mode>_relaxed_const): Updated and renamed from
1080 cond_sub<mode>_any_const pattern.
1081 (cond_sub<mode>_strict_const): New pattern.
1083 2020-08-28 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
1085 * doc/rtl.texi: Fix typo.
1087 2020-08-28 Uros Bizjak <ubizjak@gmail.com>
1090 * config/i386/i386-expand.c (split_double_mode): Also handle
1091 E_P2HImode and E_P2QImode.
1092 * config/i386/sse.md (MASK_DWI): New define_mode_iterator.
1093 (mov<mode>): New expander for P2HI,P2QI.
1094 (*mov<mode>_internal): New define_insn_and_split to split
1095 movement of P2QI/P2HI to 2 movqi/movhi patterns after reload.
1097 2020-08-28 liuhongt <hongtao.liu@intel.com>
1099 * common/config/i386/i386-common.c (ix86_handle_option): Set
1100 AVX512DQ when AVX512VP2INTERSECT exists.
1102 2020-08-27 Jakub Jelinek <jakub@redhat.com>
1105 * config/i386/i386.c (iamcu_alignment): Don't decrease alignment
1106 for TYPE_ATOMIC types.
1107 (ix86_local_alignment): Likewise.
1108 (ix86_minimum_alignment): Likewise.
1109 (x86_field_alignment): Likewise, and emit a -Wpsabi diagnostic
1112 2020-08-27 Bill Schmidt <wschmidt@linux.ibm.com>
1115 * config/rs6000/rs6000.c (rs6000_sibcall_aix): Support
1116 indirect call for ELFv2.
1118 2020-08-27 Richard Biener <rguenther@suse.de>
1120 PR tree-optimization/96522
1121 * tree-ssa-address.c (copy_ref_info): Reset flow-sensitive
1122 info of the copied points-to. Transfer bigger alignment
1123 via the access type.
1124 * tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt):
1125 Reset all flow-sensitive info.
1127 2020-08-27 Martin Liska <mliska@suse.cz>
1129 * alias.c (init_alias_analysis): Set exact argument of a vector
1130 growth function to true.
1131 * calls.c (internal_arg_pointer_based_exp_scan): Likewise.
1132 * cfgbuild.c (find_many_sub_basic_blocks): Likewise.
1133 * cfgexpand.c (expand_asm_stmt): Likewise.
1134 * cfgrtl.c (rtl_create_basic_block): Likewise.
1135 * combine.c (combine_split_insns): Likewise.
1136 (combine_instructions): Likewise.
1137 * config/aarch64/aarch64-sve-builtins.cc (function_expander::add_output_operand): Likewise.
1138 (function_expander::add_input_operand): Likewise.
1139 (function_expander::add_integer_operand): Likewise.
1140 (function_expander::add_address_operand): Likewise.
1141 (function_expander::add_fixed_operand): Likewise.
1142 * df-core.c (df_worklist_dataflow_doublequeue): Likewise.
1143 * dwarf2cfi.c (update_row_reg_save): Likewise.
1144 * early-remat.c (early_remat::init_block_info): Likewise.
1145 (early_remat::finalize_candidate_indices): Likewise.
1146 * except.c (sjlj_build_landing_pads): Likewise.
1147 * final.c (compute_alignments): Likewise.
1148 (grow_label_align): Likewise.
1149 * function.c (temp_slots_at_level): Likewise.
1150 * fwprop.c (build_single_def_use_links): Likewise.
1151 (update_uses): Likewise.
1152 * gcc.c (insert_wrapper): Likewise.
1153 * genautomata.c (create_state_ainsn_table): Likewise.
1154 (add_vect): Likewise.
1155 (output_dead_lock_vect): Likewise.
1156 * genmatch.c (capture_info::capture_info): Likewise.
1157 (parser::finish_match_operand): Likewise.
1158 * genrecog.c (optimize_subroutine_group): Likewise.
1159 (merge_pattern_info::merge_pattern_info): Likewise.
1160 (merge_into_decision): Likewise.
1161 (print_subroutine_start): Likewise.
1163 * gimple-loop-versioning.cc (loop_versioning::loop_versioning): Likewise.
1164 * gimple.c (gimple_set_bb): Likewise.
1165 * graphite-isl-ast-to-gimple.c (translate_isl_ast_node_user): Likewise.
1166 * haifa-sched.c (sched_extend_luids): Likewise.
1167 (extend_h_i_d): Likewise.
1168 * insn-addr.h (insn_addresses_new): Likewise.
1169 * ipa-cp.c (gather_context_independent_values): Likewise.
1170 (find_more_contexts_for_caller_subset): Likewise.
1171 * ipa-devirt.c (final_warning_record::grow_type_warnings): Likewise.
1172 (ipa_odr_read_section): Likewise.
1173 * ipa-fnsummary.c (evaluate_properties_for_edge): Likewise.
1174 (ipa_fn_summary_t::duplicate): Likewise.
1175 (analyze_function_body): Likewise.
1176 (ipa_merge_fn_summary_after_inlining): Likewise.
1177 (read_ipa_call_summary): Likewise.
1178 * ipa-icf.c (sem_function::bb_dict_test): Likewise.
1179 * ipa-prop.c (ipa_alloc_node_params): Likewise.
1180 (parm_bb_aa_status_for_bb): Likewise.
1181 (ipa_compute_jump_functions_for_edge): Likewise.
1182 (ipa_analyze_node): Likewise.
1183 (update_jump_functions_after_inlining): Likewise.
1184 (ipa_read_edge_info): Likewise.
1185 (read_ipcp_transformation_info): Likewise.
1186 (ipcp_transform_function): Likewise.
1187 * ipa-reference.c (ipa_reference_write_optimization_summary): Likewise.
1188 * ipa-split.c (execute_split_functions): Likewise.
1189 * ira.c (find_moveable_pseudos): Likewise.
1190 * lower-subreg.c (decompose_multiword_subregs): Likewise.
1191 * lto-streamer-in.c (input_eh_regions): Likewise.
1192 (input_cfg): Likewise.
1193 (input_struct_function_base): Likewise.
1194 (input_function): Likewise.
1195 * modulo-sched.c (set_node_sched_params): Likewise.
1196 (extend_node_sched_params): Likewise.
1197 (schedule_reg_moves): Likewise.
1198 * omp-general.c (omp_construct_simd_compare): Likewise.
1199 * passes.c (pass_manager::create_pass_tab): Likewise.
1200 (enable_disable_pass): Likewise.
1201 * predict.c (determine_unlikely_bbs): Likewise.
1202 * profile.c (compute_branch_probabilities): Likewise.
1203 * read-rtl-function.c (function_reader::parse_block): Likewise.
1204 * read-rtl.c (rtx_reader::read_rtx_code): Likewise.
1205 * reg-stack.c (stack_regs_mentioned): Likewise.
1206 * regrename.c (regrename_init): Likewise.
1207 * rtlanal.c (T>::add_single_to_queue): Likewise.
1208 * sched-deps.c (init_deps_data_vector): Likewise.
1209 * sel-sched-ir.c (sel_extend_global_bb_info): Likewise.
1210 (extend_region_bb_info): Likewise.
1211 (extend_insn_data): Likewise.
1212 * symtab.c (symtab_node::create_reference): Likewise.
1213 * tracer.c (tail_duplicate): Likewise.
1214 * trans-mem.c (tm_region_init): Likewise.
1215 (get_bb_regions_instrumented): Likewise.
1216 * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise.
1217 (build_gimple_cfg): Likewise.
1218 (create_bb): Likewise.
1219 (move_block_to_fn): Likewise.
1220 * tree-complex.c (tree_lower_complex): Likewise.
1221 * tree-if-conv.c (predicate_rhs_code): Likewise.
1222 * tree-inline.c (copy_bb): Likewise.
1223 * tree-into-ssa.c (get_ssa_name_ann): Likewise.
1224 (mark_phi_for_rewrite): Likewise.
1225 * tree-object-size.c (compute_builtin_object_size): Likewise.
1226 (init_object_sizes): Likewise.
1227 * tree-predcom.c (initialize_root_vars_store_elim_1): Likewise.
1228 (initialize_root_vars_store_elim_2): Likewise.
1229 (prepare_initializers_chain_store_elim): Likewise.
1230 * tree-ssa-address.c (addr_for_mem_ref): Likewise.
1231 (multiplier_allowed_in_address_p): Likewise.
1232 * tree-ssa-coalesce.c (ssa_conflicts_new): Likewise.
1233 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
1234 * tree-ssa-loop-ivopts.c (addr_offset_valid_p): Likewise.
1235 (get_address_cost_ainc): Likewise.
1236 * tree-ssa-loop-niter.c (discover_iteration_bound_by_body_walk): Likewise.
1237 * tree-ssa-pre.c (add_to_value): Likewise.
1238 (phi_translate_1): Likewise.
1239 (do_pre_regular_insertion): Likewise.
1240 (do_pre_partial_partial_insertion): Likewise.
1241 (init_pre): Likewise.
1242 * tree-ssa-propagate.c (ssa_prop_init): Likewise.
1243 (update_call_from_tree): Likewise.
1244 * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Likewise.
1245 * tree-ssa-sccvn.c (vn_reference_lookup_3): Likewise.
1246 (vn_reference_lookup_pieces): Likewise.
1247 (eliminate_dom_walker::eliminate_push_avail): Likewise.
1248 * tree-ssa-strlen.c (set_strinfo): Likewise.
1249 (get_stridx_plus_constant): Likewise.
1250 (zero_length_string): Likewise.
1251 (find_equal_ptrs): Likewise.
1252 (printf_strlen_execute): Likewise.
1253 * tree-ssa-threadedge.c (set_ssa_name_value): Likewise.
1254 * tree-ssanames.c (make_ssa_name_fn): Likewise.
1255 * tree-streamer-in.c (streamer_read_tree_bitfields): Likewise.
1256 * tree-vect-loop.c (vect_record_loop_mask): Likewise.
1257 (vect_get_loop_mask): Likewise.
1258 (vect_record_loop_len): Likewise.
1259 (vect_get_loop_len): Likewise.
1260 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
1261 * tree-vect-slp.c (vect_slp_convert_to_external): Likewise.
1262 (vect_bb_slp_scalar_cost): Likewise.
1263 (vect_bb_vectorization_profitable_p): Likewise.
1264 (vectorizable_slp_permutation): Likewise.
1265 * tree-vect-stmts.c (vectorizable_call): Likewise.
1266 (vectorizable_simd_clone_call): Likewise.
1267 (scan_store_can_perm_p): Likewise.
1268 (vectorizable_store): Likewise.
1270 * vec.c (test_safe_grow_cleared): Likewise.
1271 * vec.h (vec_safe_grow): Likewise.
1272 (vec_safe_grow_cleared): Likewise.
1273 (vl_ptr>::safe_grow): Likewise.
1274 (vl_ptr>::safe_grow_cleared): Likewise.
1275 * config/c6x/c6x.c (insn_set_clock): Likewise.
1277 2020-08-27 Richard Biener <rguenther@suse.de>
1279 * tree-pretty-print.c (dump_mem_ref): Handle TARGET_MEM_REFs.
1280 (dump_generic_node): Use dump_mem_ref also for TARGET_MEM_REF.
1282 2020-08-27 Alex Coplan <alex.coplan@arm.com>
1284 * lra-constraints.c (canonicalize_reload_addr): New.
1285 (curr_insn_transform): Use canonicalize_reload_addr to ensure we
1286 generate canonical RTL for an address reload.
1288 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com>
1290 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
1291 for rounding intrinsics.
1293 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com>
1295 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
1296 for min/max intrinsics.
1298 2020-08-27 Richard Biener <rguenther@suse.de>
1300 PR tree-optimization/96579
1301 * tree-ssa-reassoc.c (linearize_expr_tree): If we expand
1302 rhs via special ops make sure to swap operands.
1304 2020-08-27 Richard Biener <rguenther@suse.de>
1306 PR tree-optimization/96565
1307 * tree-ssa-dse.c (dse_classify_store): Remove defs with
1308 no uses from further processing.
1310 2020-08-26 Göran Uddeborg <goeran@uddeborg.se>
1312 PR gcov-profile/96285
1313 * common.opt, doc/invoke.texi: Clarify wording of
1314 -fprofile-exclude-files and adjust -fprofile-filter-files to
1317 2020-08-26 H.J. Lu <hjl.tools@gmail.com>
1320 * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
1321 Reject target("no-general-regs-only").
1323 2020-08-26 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1325 * config/msp430/constraints.md (K): Change unused constraint to
1326 constraint to a const_int between 1 and 19.
1327 (P): New constraint.
1328 * config/msp430/msp430-protos.h (msp430x_logical_shift_right): Remove.
1329 (msp430_expand_shift): New.
1330 (msp430_output_asm_shift_insns): New.
1331 * config/msp430/msp430.c (msp430_rtx_costs): Remove shift costs.
1333 (msp430_expand_helper): Remove hard-coded generation of some inline
1335 (use_helper_for_const_shift): New.
1336 (msp430_expand_shift): New.
1337 (msp430_output_asm_shift_insns): New.
1338 (msp430_print_operand): Add new 'W' operand selector.
1339 (msp430x_logical_shift_right): Remove.
1340 * config/msp430/msp430.md (HPSI): New define_mode_iterator.
1342 (any_shift): New define_code_iterator.
1343 (shift_insn): New define_code_attr.
1344 Adjust unnamed insn patterns searched for by combine.
1347 (430x_shift_left): Remove.
1354 (430x_arithmetic_shift_right): Remove.
1363 (430x_logical_shift_right): Remove.
1369 (<shift_insn><mode>3): New define_expand.
1370 (<shift_insn>hi3_430): New define_insn.
1371 (<shift_insn>si3_const): Likewise.
1372 (ashl<mode>3_430x): Likewise.
1373 (ashr<mode>3_430x): Likewise.
1374 (lshr<mode>3_430x): Likewise.
1375 (*bitbranch<mode>4_z): Replace renamed predicate msp430_bitpos with
1376 const_0_to_15_operand.
1377 * config/msp430/msp430.opt: New option -mmax-inline-shift=.
1378 * config/msp430/predicates.md (const_1_to_8_operand): New predicate.
1379 (const_0_to_15_operand): Rename msp430_bitpos predicate.
1380 (const_1_to_19_operand): New predicate.
1381 * doc/invoke.texi: Document -mmax-inline-shift=.
1383 2020-08-26 Aldy Hernandez <aldyh@redhat.com>
1385 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Abstract code out to...
1386 * tree-vrp.c (find_case_label_range): ...here. Rewrite for to use irange
1388 (simplify_stmt_for_jump_threading): Call find_case_label_range instead of
1389 duplicating the code in simplify_stmt_for_jump_threading.
1390 * tree-vrp.h (find_case_label_range): New prototype.
1392 2020-08-26 Richard Biener <rguenther@suse.de>
1394 PR tree-optimization/96698
1395 * tree-vectorizer.h (loop_vec_info::reduc_latch_defs): New.
1396 (loop_vec_info::reduc_latch_slp_defs): Likewise.
1397 * tree-vect-stmts.c (vect_transform_stmt): Only record
1398 stmts to update PHI latches from, perform the update ...
1399 * tree-vect-loop.c (vect_transform_loop): ... here after
1400 vectorizing those PHIs.
1401 (info_for_reduction): Properly handle non-reduction PHIs.
1403 2020-08-26 Martin Liska <mliska@suse.cz>
1405 * cgraphunit.c (process_symver_attribute): Match only symver
1408 2020-08-26 Richard Biener <rguenther@suse.de>
1410 PR tree-optimization/96783
1411 * tree-vect-stmts.c (get_group_load_store_type): Use
1412 VMAT_ELEMENTWISE for negative strides when we cannot
1413 use VMAT_STRIDED_SLP.
1415 2020-08-26 Martin Liska <mliska@suse.cz>
1417 * doc/invoke.texi: Document how are pie and pic options merged.
1419 2020-08-26 Zhiheng Xie <xiezhiheng@huawei.com>
1421 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
1422 for add/sub arithmetic intrinsics.
1424 2020-08-26 Jakub Jelinek <jakub@redhat.com>
1427 * dwarf2out.c (dwarf2out_next_real_insn): Adjust function comment.
1428 (dwarf2out_var_location): Look for next_note only if next_real is
1429 non-NULL, in that case look for the first non-deleted
1430 NOTE_INSN_VAR_LOCATION between loc_note and next_real, if any.
1432 2020-08-26 Iain Buclaw <ibuclaw@gdcproject.org>
1434 * config/tilepro/gen-mul-tables.cc (main): Define IN_TARGET_CODE to 1
1437 2020-08-26 Martin Liska <mliska@suse.cz>
1439 * cgraphunit.c (process_symver_attribute): Allow multiple
1440 symver attributes for one symbol.
1441 * doc/extend.texi: Document the change.
1443 2020-08-25 H.J. Lu <hjl.tools@gmail.com>
1446 * config/i386/i386.h (CTZ_DEFINED_VALUE_AT_ZERO): Return 0/2.
1447 (CLZ_DEFINED_VALUE_AT_ZERO): Likewise.
1449 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
1452 * config/pa/pa.c (hppa_rtx_costs_shadd_p): New helper function
1453 to check for coefficients supported by shNadd and shladd,l.
1454 (hppa_rtx_costs): Rewrite to avoid using estimates based upon
1455 FACTOR and enable recursing deeper into RTL expressions.
1457 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
1459 * config/pa/pa.md (ashldi3): Additionally, on !TARGET_64BIT
1460 generate a two instruction shd/zdep sequence when shifting
1461 registers by suitable constants.
1462 (shd_internal): New define_expand to provide gen_shd_internal.
1464 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
1466 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Rename
1467 __ARM_FEATURE_SVE_VECTOR_OPERATIONS to
1468 __ARM_FEATURE_SVE_VECTOR_OPERATORS.
1470 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
1472 * config/aarch64/aarch64-sve-builtins.cc (add_sve_type_attribute):
1473 Take the ACLE name of the type as a parameter and add it as fourth
1474 argument to the "SVE type" attribute.
1475 (register_builtin_types): Update call accordingly.
1476 (register_tuple_type): Likewise. Construct the name of the type
1477 earlier in order to do this.
1478 (get_arm_sve_vector_bits_attributes): New function.
1479 (handle_arm_sve_vector_bits_attribute): Report a more sensible
1480 error message if the attribute is applied to an SVE tuple type.
1481 Don't allow the attribute to be applied to an existing fixed-length
1482 SVE type. Mangle the new type as __SVE_VLS<type, vector-bits>.
1483 Add a dummy TYPE_DECL to the new type.
1485 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
1487 * config/aarch64/aarch64-sve-builtins.cc (DEF_SVE_TYPE): Add a
1488 leading "u" to each mangled name.
1490 2020-08-25 Richard Biener <rguenther@suse.de>
1492 PR tree-optimization/96548
1493 PR tree-optimization/96760
1494 * tree-ssa-loop-im.c (tree_ssa_lim): Recompute RPO after
1497 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1499 PR tree-optimization/96722
1500 * gimple.c (infer_nonnull_range): Formatting fix.
1501 (infer_nonnull_range_by_dereference): Return false for clobber stmts.
1503 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1505 PR tree-optimization/96758
1506 * tree-ssa-strlen.c (handle_builtin_string_cmp): If both cstlen1
1507 and cstlen2 are set, set cmpsiz to their minimum, otherwise use the
1508 one that is set. If bound is used and smaller than cmpsiz, set cmpsiz
1509 to bound. If both cstlen1 and cstlen2 are set, perform the optimization.
1511 2020-08-25 Martin Jambor <mjambor@suse.cz>
1513 PR tree-optimization/96730
1514 * tree-sra.c (create_access): Disqualify any aggregate with negative
1516 (build_ref_for_model): Add assert that offset is non-negative.
1518 2020-08-25 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
1520 * rtl.def: Fix typo in comment.
1522 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
1524 PR tree-optimization/21137
1525 * fold-const.c (fold_binary_loc) [NE_EXPR/EQ_EXPR]: Call
1526 STRIP_NOPS when checking whether to simplify ((x>>C1)&C2) != 0.
1528 2020-08-25 Andrew Pinski <apinski@marvell.com>
1531 * config/mips/mips.md (builtin_longjmp): Restore the frame
1532 pointer and stack pointer and gp.
1534 2020-08-25 Richard Biener <rguenther@suse.de>
1537 * dwarf2out.c (reference_to_unused): Make FUNCTION_DECL
1538 processing more consistent with respect to
1539 symtab->global_info_ready.
1540 (tree_add_const_value_attribute): Unconditionally call
1541 rtl_for_decl_init to do all mangling early but throw
1542 away the result if early_dwarf.
1544 2020-08-25 Hongtao Liu <hongtao.liu@intel.com>
1547 * config/i386/sse.md: Correct the mode of NOT operands to
1550 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1552 PR tree-optimization/96715
1553 * match.pd (copysign(x,-x) -> -x): New simplification.
1555 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1558 * fold-const.c (native_interpret_real): For MODE_COMPOSITE_P modes
1559 punt if the to be returned REAL_CST does not encode to the bitwise
1560 same representation.
1562 2020-08-24 Gerald Pfeifer <gerald@pfeifer.com>
1564 * doc/install.texi (Configuration): Switch valgrind.com to https.
1566 2020-08-24 Christophe Lyon <christophe.lyon@linaro.org>
1570 * config/arm/thumb1.md: Disable set-constant splitter when
1572 (thumb1_movsi_insn): Fix -mpure-code
1575 2020-08-24 Martin Liska <mliska@suse.cz>
1577 * tree-vect-data-refs.c (dr_group_sort_cmp): Work on
1579 (vect_analyze_data_ref_accesses): Work on groups.
1580 (vect_find_stmt_data_reference): Add group_id argument and fill
1581 up dataref_groups vector.
1582 * tree-vect-loop.c (vect_get_datarefs_in_loop): Pass new
1584 (vect_analyze_loop_2): Likewise.
1585 * tree-vect-slp.c (vect_slp_analyze_bb_1): Pass argument.
1586 (vect_slp_bb_region): Likewise.
1587 (vect_slp_region): Likewise.
1588 (vect_slp_bb):Work on the entire BB.
1589 * tree-vectorizer.h (vect_analyze_data_ref_accesses): Add new
1591 (vect_find_stmt_data_reference): Likewise.
1593 2020-08-24 Martin Liska <mliska@suse.cz>
1595 PR tree-optimization/96597
1596 * tree-ssa-sccvn.c (vn_reference_lookup_call): Add missing
1597 initialization of ::punned.
1598 (vn_reference_insert): Use consistently false instead of 0.
1599 (vn_reference_insert_pieces): Likewise.
1601 2020-08-24 Hans-Peter Nilsson <hp@axis.com>
1604 * reorg.c (fill_slots_from_thread): Allow trial insns that clobber
1605 TARGET_FLAGS_REGNUM as delay-slot fillers.
1607 2020-08-23 H.J. Lu <hjl.tools@gmail.com>
1610 * config/i386/i386-options.c (IX86_ATTR_IX86_YES): New.
1611 (IX86_ATTR_IX86_NO): Likewise.
1612 (ix86_opt_type): Add ix86_opt_ix86_yes and ix86_opt_ix86_no.
1613 (ix86_valid_target_attribute_inner_p): Handle general-regs-only,
1614 ix86_opt_ix86_yes and ix86_opt_ix86_no.
1615 (ix86_option_override_internal): Check opts->x_ix86_target_flags
1616 instead of opts->x_ix86_target_flags.
1617 * doc/extend.texi: Document target("general-regs-only") function
1620 2020-08-21 Richard Sandiford <richard.sandiford@arm.com>
1622 * doc/extend.texi: Update links to Arm docs.
1623 * doc/invoke.texi: Likewise.
1625 2020-08-21 Hongtao Liu <hongtao.liu@intel.com>
1628 * config/i386/i386-expand.c
1629 (ix86_expand_vec_shift_qihi_constant): Refine.
1631 2020-08-21 Alex Coplan <alex.coplan@arm.com>
1634 * gcc.c (set_static_spec): New.
1635 (set_static_spec_owned): New.
1636 (set_static_spec_shared): New.
1637 (driver::maybe_putenv_COLLECT_LTO_WRAPPER): Use
1638 set_static_spec_owned() to take ownership of lto_wrapper_file
1639 such that it gets freed in driver::finalize.
1640 (driver::maybe_run_linker): Use set_static_spec_shared() to
1641 ensure that we don't try and free() the static string "ld",
1642 also ensuring that any previously-allocated string in
1643 linker_name_spec is freed. Likewise with argv0.
1644 (driver::finalize): Use set_static_spec_shared() when resetting
1645 specs that previously had allocated strings; remove if(0)
1646 around call to free().
1648 2020-08-21 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
1650 * emit-rtl.c (try_split): Call copy_frame_info_to_split_insn
1651 to split certain RTX_FRAME_RELATED_P insns.
1652 * recog.c (copy_frame_info_to_split_insn): New function.
1653 (peep2_attempt): Split copying of frame related info of
1654 RTX_FRAME_RELATED_P insns into above function and call it.
1655 * recog.h (copy_frame_info_to_split_insn): Declare it.
1657 2020-08-21 liuhongt <hongtao.liu@intel.com>
1660 * config/i386/i386.c (ix86_preferred_reload_class): Allow
1661 QImode data go into mask registers.
1662 * config/i386/i386.md: (*movhi_internal): Adjust constraints
1664 (*movqi_internal): Ditto.
1665 (*anddi_1): Support mask register operations
1666 (*and<mode>_1): Ditto.
1668 (*andn<mode>_1): Ditto.
1669 (*<code><mode>_1): Ditto.
1670 (*<code>qi_1): Ditto.
1671 (*one_cmpl<mode>2_1): Ditto.
1672 (*one_cmplsi2_1_zext): Ditto.
1673 (*one_cmplqi2_1): Ditto.
1674 (define_peephole2): Move constant 0/-1 directly into mask
1676 * config/i386/predicates.md (mask_reg_operand): New predicate.
1677 * config/i386/sse.md (define_split): Add post-reload splitters
1678 that would convert "generic" patterns to mask patterns.
1679 (*knotsi_1_zext): New define_insn.
1681 2020-08-21 liuhongt <hongtao.liu@intel.com>
1683 * config/i386/x86-tune-costs.h (skylake_cost): Adjust cost
1686 2020-08-21 liuhongt <hongtao.liu@intel.com>
1688 * config/i386/i386.c (inline_secondary_memory_needed):
1689 No memory is needed between mask regs and gpr.
1690 (ix86_hard_regno_mode_ok): Add condition TARGET_AVX512F for
1692 * config/i386/i386.h (enum reg_class): Add INT_MASK_REGS.
1693 (REG_CLASS_NAMES): Ditto.
1694 (REG_CLASS_CONTENTS): Ditto.
1695 * config/i386/i386.md: Exclude mask register in
1696 define_peephole2 which is avaiable only for gpr.
1698 2020-08-21 H.J. Lu <hjl.tools@gmail.com>
1701 * config/i386/i386.h (struct processor_costs): Add member
1702 mask_to_integer, integer_to_mask, mask_load[3], mask_store[3],
1704 * config/i386/x86-tune-costs.h (ix86_size_cost, i386_cost,
1705 i386_cost, pentium_cost, lakemont_cost, pentiumpro_cost,
1706 geode_cost, k6_cost, athlon_cost, k8_cost, amdfam10_cost,
1707 bdver_cost, znver1_cost, znver2_cost, skylake_cost,
1708 btver1_cost, btver2_cost, pentium4_cost, nocona_cost,
1709 atom_cost, slm_cost, intel_cost, generic_cost, core_cost):
1710 Initialize mask_load[3], mask_store[3], mask_move,
1711 integer_to_mask, mask_to_integer for all target costs.
1712 * config/i386/i386.c (ix86_register_move_cost): Using cost
1713 model of mask registers.
1714 (inline_memory_move_cost): Ditto.
1715 (ix86_register_move_cost): Ditto.
1717 2020-08-20 Iain Buclaw <ibuclaw@gdcproject.org>
1719 * config/vxworks.h (VXWORKS_ADDITIONAL_CPP_SPEC): Don't include
1720 VxWorks header files if -fself-test is used.
1721 (STARTFILE_PREFIX_SPEC): Avoid using VSB_DIR if -fself-test is used.
1723 2020-08-20 Joe Ramsay <Joe.Ramsay@arm.com>
1726 * config/arm/mve.md (mve_vst1q_f<mode>): Require MVE memory operand for
1728 (mve_vst1q_<supf><mode>): Likewise.
1730 2020-08-19 2020-08-19 Carl Love <cel@us.ibm.com>
1732 * config/rs6000/rs6000-builtin.def (BU_P10V_0, BU_P10V_1,
1733 BU_P10V_2, BU_P10V_3): Rename BU_P10V_VSX_0, BU_P10V_VSX_1,
1734 BU_P10V_VSX_2, BU_P10V_VSX_3 respectively.
1735 (BU_P10V_4): Remove.
1736 (BU_P10V_AV_0, BU_P10V_AV_1, BU_P10V_AV_2, BU_P10V_AV_3, BU_P10V_AV_4):
1737 New definitions for Power 10 Altivec macros.
1738 (VSTRIBR, VSTRIHR, VSTRIBL, VSTRIHL, VSTRIBR_P, VSTRIHR_P,
1739 VSTRIBL_P, VSTRIHL_P, MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM,
1740 VEXPANDMB, VEXPANDMH, VEXPANDMW, VEXPANDMD, VEXPANDMQ, VEXTRACTMB,
1741 VEXTRACTMH, VEXTRACTMW, VEXTRACTMD, VEXTRACTMQ): Replace macro
1742 expansion BU_P10V_1 with BU_P10V_AV_1.
1743 (VCLRLB, VCLRRB, VCFUGED, VCLZDM, VCTZDM, VPDEPD, VPEXTD, VGNB,
1744 VCNTMBB, VCNTMBH, VCNTMBW, VCNTMBD): Replace macro expansion
1745 BU_P10V_2 with BU_P10V_AV_2.
1746 (VEXTRACTBL, VEXTRACTHL, VEXTRACTWL, VEXTRACTDL, VEXTRACTBR, VEXTRACTHR,
1747 VEXTRACTWR, VEXTRACTDR, VINSERTGPRBL, VINSERTGPRHL, VINSERTGPRWL,
1748 VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL, VINSERTGPRBR,
1749 VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR, VINSERTVPRHR,
1750 VINSERTVPRWR, VREPLACE_ELT_V4SI, VREPLACE_ELT_UV4SI, VREPLACE_ELT_V2DF,
1751 VREPLACE_ELT_V4SF, VREPLACE_ELT_V2DI, VREPLACE_ELT_UV2DI, VREPLACE_UN_V4SI,
1752 VREPLACE_UN_UV4SI, VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
1753 VREPLACE_UN_V2DF, VSLDB_V16QI, VSLDB_V8HI, VSLDB_V4SI, VSLDB_V2DI,
1754 VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI, VSRDB_V2DI): Replace macro expansion
1755 BU_P10V_3 with BU_P10V_AV_3.
1756 (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF, VXXSPLTID): Replace macro expansion
1757 BU_P10V_1 with BU_P10V_AV_1.
1758 (XXGENPCVM_V16QI, XXGENPCVM_V8HI, XXGENPCVM_V4SI, XXGENPCVM_V2DI):
1759 Replace macro expansion BU_P10V_2 with BU_P10V_VSX_2.
1760 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF, VXXBLEND_V16QI, VXXBLEND_V8HI,
1761 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): Replace macor
1762 expansion BU_P10V_3 with BU_P10V_VSX_3.
1763 (XXEVAL, VXXPERMX): Replace macro expansion BU_P10V_4 with BU_P10V_VSX_4.
1764 (XVCVBF16SP, XVCVSPBF16): Replace macro expansion BU_VSX_1 with
1765 BU_P10V_VSX_1. Also change MISC to CONST.
1766 * config/rs6000/rs6000-c.c: (P10_BUILTIN_VXXPERMX): Replace with
1767 P10V_BUILTIN_VXXPERMX.
1768 (P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRRB,
1769 P10_BUILTIN_VGNB, P10_BUILTIN_XXEVAL, P10_BUILTIN_VXXPERMX,
1770 P10_BUILTIN_VEXTRACTBL, P10_BUILTIN_VEXTRACTHL, P10_BUILTIN_VEXTRACTWL,
1771 P10_BUILTIN_VEXTRACTDL, P10_BUILTIN_VINSERTGPRHL,
1772 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
1773 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
1774 P10_BUILTIN_VEXTRACTBR, P10_BUILTIN_VEXTRACTHR,
1775 P10_BUILTIN_VEXTRACTWR, P10_BUILTIN_VEXTRACTDR,
1776 P10_BUILTIN_VINSERTGPRBR, P10_BUILTIN_VINSERTGPRHR,
1777 P10_BUILTIN_VINSERTGPRWR, P10_BUILTIN_VINSERTGPRDR,
1778 P10_BUILTIN_VINSERTVPRBR, P10_BUILTIN_VINSERTVPRHR,
1779 P10_BUILTIN_VINSERTVPRWR, P10_BUILTIN_VREPLACE_ELT_UV4SI,
1780 P10_BUILTIN_VREPLACE_ELT_V4SI, P10_BUILTIN_VREPLACE_ELT_UV2DI,
1781 P10_BUILTIN_VREPLACE_ELT_V2DI, P10_BUILTIN_VREPLACE_ELT_V2DF,
1782 P10_BUILTIN_VREPLACE_UN_UV4SI, P10_BUILTIN_VREPLACE_UN_V4SI,
1783 P10_BUILTIN_VREPLACE_UN_V4SF, P10_BUILTIN_VREPLACE_UN_UV2DI,
1784 P10_BUILTIN_VREPLACE_UN_V2DI, P10_BUILTIN_VREPLACE_UN_V2DF,
1785 P10_BUILTIN_VSLDB_V16QI, P10_BUILTIN_VSLDB_V16QI,
1786 P10_BUILTIN_VSLDB_V8HI, P10_BUILTIN_VSLDB_V4SI,
1787 P10_BUILTIN_VSLDB_V2DI, P10_BUILTIN_VXXSPLTIW_V4SI,
1788 P10_BUILTIN_VXXSPLTIW_V4SF, P10_BUILTIN_VXXSPLTID,
1789 P10_BUILTIN_VXXSPLTI32DX_V4SI, P10_BUILTIN_VXXSPLTI32DX_V4SF,
1790 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
1791 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI,
1792 P10_BUILTIN_VXXBLEND_V4SF, P10_BUILTIN_VXXBLEND_V2DF,
1793 P10_BUILTIN_VSRDB_V16QI, P10_BUILTIN_VSRDB_V8HI,
1794 P10_BUILTIN_VSRDB_V4SI, P10_BUILTIN_VSRDB_V2DI,
1795 P10_BUILTIN_VSTRIBL, P10_BUILTIN_VSTRIHL,
1796 P10_BUILTIN_VSTRIBL_P, P10_BUILTIN_VSTRIHL_P,
1797 P10_BUILTIN_VSTRIBR, P10_BUILTIN_VSTRIHR,
1798 P10_BUILTIN_VSTRIBR_P, P10_BUILTIN_VSTRIHR_P,
1799 P10_BUILTIN_MTVSRBM, P10_BUILTIN_MTVSRHM,
1800 P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
1801 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB,
1802 P10_BUILTIN_VCNTMBH, P10_BUILTIN_VCNTMBW,
1803 P10_BUILTIN_VCNTMBD, P10_BUILTIN_VEXPANDMB,
1804 P10_BUILTIN_VEXPANDMH, P10_BUILTIN_VEXPANDMW,
1805 P10_BUILTIN_VEXPANDMD, P10_BUILTIN_VEXPANDMQ,
1806 P10_BUILTIN_VEXTRACTMB, P10_BUILTIN_VEXTRACTMH,
1807 P10_BUILTIN_VEXTRACTMW, P10_BUILTIN_VEXTRACTMD,
1808 P10_BUILTIN_VEXTRACTMQ, P10_BUILTIN_XVTLSBB_ZEROS,
1809 P10_BUILTIN_XVTLSBB_ONES): Replace with
1810 P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRRB,
1811 P10V_BUILTIN_VGNB, P10V_BUILTIN_XXEVAL, P10V_BUILTIN_VXXPERMX,
1812 P10V_BUILTIN_VEXTRACTBL, P10V_BUILTIN_VEXTRACTHL, P10V_BUILTIN_VEXTRACTWL,
1813 P10V_BUILTIN_VEXTRACTDL, P10V_BUILTIN_VINSERTGPRHL,
1814 P10V_BUILTIN_VINSERTGPRWL, P10V_BUILTIN_VINSERTGPRDL,
1815 P10V_BUILTIN_VINSERTVPRBL,P10V_BUILTIN_VINSERTVPRHL,
1816 P10V_BUILTIN_VEXTRACTBR, P10V_BUILTIN_VEXTRACTHR
1817 P10V_BUILTIN_VEXTRACTWR, P10V_BUILTIN_VEXTRACTDR,
1818 P10V_BUILTIN_VINSERTGPRBR, P10V_BUILTIN_VINSERTGPRHR,
1819 P10V_BUILTIN_VINSERTGPRWR, P10V_BUILTIN_VINSERTGPRDR,
1820 P10V_BUILTIN_VINSERTVPRBR, P10V_BUILTIN_VINSERTVPRHR,
1821 P10V_BUILTIN_VINSERTVPRWR, P10V_BUILTIN_VREPLACE_ELT_UV4SI,
1822 P10V_BUILTIN_VREPLACE_ELT_V4SI, P10V_BUILTIN_VREPLACE_ELT_UV2DI,
1823 P10V_BUILTIN_VREPLACE_ELT_V2DI, P10V_BUILTIN_VREPLACE_ELT_V2DF,
1824 P10V_BUILTIN_VREPLACE_UN_UV4SI, P10V_BUILTIN_VREPLACE_UN_V4SI,
1825 P10V_BUILTIN_VREPLACE_UN_V4SF, P10V_BUILTIN_VREPLACE_UN_UV2DI,
1826 P10V_BUILTIN_VREPLACE_UN_V2DI, P10V_BUILTIN_VREPLACE_UN_V2DF,
1827 P10V_BUILTIN_VSLDB_V16QI, P10V_BUILTIN_VSLDB_V16QI,
1828 P10V_BUILTIN_VSLDB_V8HI, P10V_BUILTIN_VSLDB_V4SI,
1829 P10V_BUILTIN_VSLDB_V2DI, P10V_BUILTIN_VXXSPLTIW_V4SI,
1830 P10V_BUILTIN_VXXSPLTIW_V4SF, P10V_BUILTIN_VXXSPLTID,
1831 P10V_BUILTIN_VXXSPLTI32DX_V4SI, P10V_BUILTIN_VXXSPLTI32DX_V4SF,
1832 P10V_BUILTIN_VXXBLEND_V16QI, P10V_BUILTIN_VXXBLEND_V8HI,
1833 P10V_BUILTIN_VXXBLEND_V4SI, P10V_BUILTIN_VXXBLEND_V2DI,
1834 P10V_BUILTIN_VXXBLEND_V4SF, P10V_BUILTIN_VXXBLEND_V2DF,
1835 P10V_BUILTIN_VSRDB_V16QI, P10V_BUILTIN_VSRDB_V8HI,
1836 P10V_BUILTIN_VSRDB_V4SI, P10V_BUILTIN_VSRDB_V2DI,
1837 P10V_BUILTIN_VSTRIBL, P10V_BUILTIN_VSTRIHL,
1838 P10V_BUILTIN_VSTRIBL_P, P10V_BUILTIN_VSTRIHL_P,
1839 P10V_BUILTIN_VSTRIBR, P10V_BUILTIN_VSTRIHR,
1840 P10V_BUILTIN_VSTRIBR_P, P10V_BUILTIN_VSTRIHR_P,
1841 P10V_BUILTIN_MTVSRBM, P10V_BUILTIN_MTVSRHM,
1842 P10V_BUILTIN_MTVSRWM, P10V_BUILTIN_MTVSRDM,
1843 P10V_BUILTIN_MTVSRQM, P10V_BUILTIN_VCNTMBB,
1844 P10V_BUILTIN_VCNTMBH, P10V_BUILTIN_VCNTMBW,
1845 P10V_BUILTIN_VCNTMBD, P10V_BUILTIN_VEXPANDMB,
1846 P10V_BUILTIN_VEXPANDMH, P10V_BUILTIN_VEXPANDMW,
1847 P10V_BUILTIN_VEXPANDMD, P10V_BUILTIN_VEXPANDMQ,
1848 P10V_BUILTIN_VEXTRACTMB, P10V_BUILTIN_VEXTRACTMH,
1849 P10V_BUILTIN_VEXTRACTMW, P10V_BUILTIN_VEXTRACTMD,
1850 P10V_BUILTIN_VEXTRACTMQ, P10V_BUILTIN_XVTLSBB_ZEROS,
1851 P10V_BUILTIN_XVTLSBB_ONES respectively.
1852 * config/rs6000/rs6000-call.c: Ditto above, change P10_BUILTIN_name to
1854 (P10_BUILTIN_XVCVSPBF16, P10_BUILTIN_XVCVBF16SP): Change to
1855 P10V_BUILTIN_XVCVSPBF16, P10V_BUILTIN_XVCVBF16SP respectively.
1857 2020-08-19 Bill Schmidt <wschmidt@linux.ibm.com>
1859 * config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall):
1860 Sibcalls are always legal when the caller doesn't preserve r2.
1862 2020-08-19 Uroš Bizjak <ubizjak@gmail.com>
1864 * config/i386/i386-expand.c (ix86_expand_builtin)
1865 [case IX86_BUILTIN_ENQCMD, case IX86_BUILTIN_ENQCMDS]:
1866 Rewrite expansion to use code_for_enqcmd.
1867 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]:
1868 Rewrite expansion to use code_for_wrss.
1869 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
1870 Rewrite expansion to use code_for_wrss.
1872 2020-08-19 Feng Xue <fxue@os.amperecomputing.com>
1874 PR tree-optimization/94234
1875 * match.pd ((PTR_A + OFF) - (PTR_B + OFF)) -> (PTR_A - PTR_B): New
1878 2020-08-19 H.J. Lu <hjl.tools@gmail.com>
1880 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect Rocket
1881 Lake and Alder Lake.
1883 2020-08-19 Peixin Qiao <qiaopeixin@huawei.com>
1885 * config/aarch64/aarch64.c (aarch64_init_cumulative_args): Remove
1886 "fndecl && TREE_PUBLIC (fndecl)" check since it prevents the funtion
1887 type check when calling via a function pointer or when calling a static
1890 2020-08-19 Kewen Lin <linkw@linux.ibm.com>
1892 * opts-global.c (decode_options): Call target_option_override_hook
1893 before it prints for --help=*.
1895 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
1897 * config/rs6000/rs6000-builtin.def (BU_VSX_1): Rename xvcvbf16sp to
1899 * config/rs6000/rs6000-call.c (builtin_function_type): Likewise.
1900 * config/rs6000/vsx.md: Likewise.
1901 * doc/extend.texi: Likewise.
1903 2020-08-18 Aaron Sawdey <acsawdey@linux.ibm.com>
1905 * config/rs6000/rs6000-string.c (gen_lxvl_stxvl_move):
1907 (expand_block_move): Add lxvl/stxvl, vector pair, and
1909 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1910 Default value for -mblock-ops-vector-pair.
1911 * config/rs6000/rs6000.opt: Add -mblock-ops-vector-pair.
1913 2020-08-18 Aldy Hernandez <aldyh@redhat.com>
1915 * vr-values.c (check_for_binary_op_overflow): Change type of store
1917 (vr_values::adjust_range_with_scev): Abstract most of the code...
1918 (range_of_var_in_loop): ...here. Remove value_range_equiv uses.
1919 (simplify_using_ranges::simplify_using_ranges): Change type of store
1921 * vr-values.h (class range_query): New.
1922 (class simplify_using_ranges): Use range_query.
1923 (class vr_values): Add OVERRIDE to get_value_range.
1924 (range_of_var_in_loop): New.
1926 2020-08-18 Martin Sebor <msebor@redhat.com>
1930 * expr.c (convert_to_bytes): Replace statically allocated buffer with
1931 a dynamically allocated one of sufficient size.
1933 2020-08-18 Martin Sebor <msebor@redhat.com>
1935 PR tree-optimization/96670
1937 * gimple-fold.c (gimple_fold_builtin_memchr): Call byte_representation
1938 to get it, not string_constant.
1940 2020-08-18 Hu Jiangping <hujiangping@cn.fujitsu.com>
1942 * doc/gimple.texi (gimple_debug_begin_stmt_p): Add return type.
1943 (gimple_debug_inline_entry_p, gimple_debug_nonbind_marker_p): Likewise.
1945 2020-08-18 Martin Sebor <msebor@redhat.com>
1947 * fold-const.c (native_encode_expr): Update comment.
1949 2020-08-18 Uroš Bizjak <ubizjak@gmail.com>
1952 * config/i386/i386.md (restore_stack_nonlocal): Add missing compare
1953 RTX. Rewrite expander to use high-level functions in RTL construction.
1955 2020-08-18 liuhongt <hongtao.liu@intel.com>
1959 * config/i386/i386-expand.c (ix86_expand_pinsr): Don't use
1961 (ix86_expand_pextr): Don't use pextr for TImode.
1963 2020-08-17 Uroš Bizjak <ubizjak@gmail.com>
1965 * config/i386/i386-builtin.def (__builtin_ia32_bextri_u32)
1966 (__builtin_ia32_bextri_u64): Use CODE_FOR_nothing.
1967 * config/i386/i386.md (@tbm_bextri_<mode>):
1968 Implement as parametrized name pattern.
1969 (@rdrand<mode>): Ditto.
1970 (@rdseed<mode>): Ditto.
1971 * config/i386/i386-expand.c (ix86_expand_builtin)
1972 [case IX86_BUILTIN_BEXTRI32, case IX86_BUILTIN_BEXTRI64]:
1973 Update for parameterized name patterns.
1974 [case IX86_BUILTIN_RDRAND16_STEP, case IX86_BUILTIN_RDRAND32_STEP]
1975 [case IX86_BUILTIN_RDRAND64_STEP]: Ditto.
1976 [case IX86_BUILTIN_RDSEED16_STEP, case IX86_BUILTIN_RDSEED32_STEP]
1977 [case IX86_BUILTIN_RDSEED64_STEP]: Ditto.
1979 2020-08-17 Aldy Hernandez <aldyh@redhat.com>
1981 * vr-values.c (vr_values::get_value_range): Add stmt param.
1982 (vr_values::extract_range_from_comparison): Same.
1983 (vr_values::extract_range_from_assignment): Pass stmt to
1984 extract_range_from_comparison.
1985 (vr_values::adjust_range_with_scev): Pass stmt to get_value_range.
1986 (simplify_using_ranges::vrp_evaluate_conditional): Add stmt param.
1987 Pass stmt to get_value_range.
1988 (simplify_using_ranges::vrp_visit_cond_stmt): Pass stmt to
1990 (simplify_using_ranges::simplify_abs_using_ranges): Same.
1991 (simplify_using_ranges::simplify_div_or_mod_using_ranges): Same.
1992 (simplify_using_ranges::simplify_bit_ops_using_ranges): Same.
1993 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
1994 (simplify_using_ranges::simplify_switch_using_ranges): Same.
1995 (simplify_using_ranges::simplify_float_conversion_using_ranges): Same.
1996 * vr-values.h (class vr_values): Add stmt arg to
1997 vrp_evaluate_conditional_warnv_with_ops.
1998 Add stmt arg to extract_range_from_comparison and get_value_range.
1999 (simplify_using_ranges::get_value_range): Add stmt arg.
2001 2020-08-17 liuhongt <hongtao.liu@intel.com>
2004 * config/i386/i386.c (ix86_legitimate_constant_p): Return
2005 false for ENDBR immediate.
2006 (ix86_legitimate_address_p): Ditto.
2007 * config/i386/predicates.md
2008 (x86_64_immediate_operand): Exclude ENDBR immediate.
2009 (x86_64_zext_immediate_operand): Ditto.
2010 (x86_64_dwzext_immediate_operand): Ditto.
2011 (ix86_endbr_immediate_operand): New predicate.
2013 2020-08-16 Roger Sayle <roger@nextmovesoftware.com>
2015 * simplify-rtx.c (simplify_unary_operation_1) [SIGN_EXTEND]:
2016 Simplify (sign_extend:M (truncate:N (lshiftrt:M x C))) to
2017 (ashiftrt:M x C) when the shift sets the high bits appropriately.
2019 2020-08-14 Martin Sebor <msebor@redhat.com>
2022 * builtins.c (expand_builtin_memory_copy_args): Rename called function.
2023 (expand_builtin_stpcpy_1): Remove argument from call.
2024 (expand_builtin_memcmp): Rename called function.
2025 (inline_expand_builtin_bytecmp): Same.
2026 * expr.c (convert_to_bytes): New function.
2027 (constant_byte_string): New function (formerly string_constant).
2028 (string_constant): Call constant_byte_string.
2029 (byte_representation): New function.
2030 * expr.h (byte_representation): Declare.
2031 * fold-const-call.c (fold_const_call): Rename called function.
2032 * fold-const.c (c_getstr): Remove an argument.
2033 (getbyterep): Define a new function.
2034 * fold-const.h (c_getstr): Remove an argument.
2035 (getbyterep): Declare a new function.
2036 * gimple-fold.c (gimple_fold_builtin_memory_op): Rename callee.
2037 (gimple_fold_builtin_string_compare): Same.
2038 (gimple_fold_builtin_memchr): Same.
2040 2020-08-14 David Malcolm <dmalcolm@redhat.com>
2042 * doc/analyzer.texi (Overview): Add tip about how to get a
2043 gimple dump if the analyzer ICEs.
2045 2020-08-14 Uroš Bizjak <ubizjak@gmail.com>
2047 * config/i386/i386-builtin.def (__builtin_ia32_llwpcb)
2048 (__builtin_ia32_slwpcb, __builtin_ia32_lwpval32)
2049 (__builtin_ia32_lwpval64, __builtin_ia32_lwpins32)
2050 (__builtin_ia32_lwpins64): Use CODE_FOR_nothing.
2051 * config/i386/i386.md (@lwp_llwpcb<mode>):
2052 Implement as parametrized name pattern.
2053 (@lwp_slwpcb<mode>): Ditto.
2054 (@lwp_lwpval<mode>): Ditto.
2055 (@lwp_lwpins<mode>): Ditto.
2056 * config/i386/i386-expand.c (ix86_expand_special_args_builtin)
2057 [case VOID_FTYPE_UINT_UINT_UINT, case VOID_FTYPE_UINT64_UINT_UINT]
2058 [case UCHAR_FTYPE_UINT_UINT_UINT, case UCHAR_FTYPE_UINT64_UINT_UINT]:
2060 (ix86_expand_builtin)
2061 [ case IX86_BUILTIN_LLWPCB, case IX86_BUILTIN_LLWPCB]:
2062 Update for parameterized name patterns.
2063 [case IX86_BUILTIN_LWPVAL32, case IX86_BUILTIN_LWPVAL64]
2064 [case IX86_BUILTIN_LWPINS32, case IX86_BUILTIN_LWPINS64]: Expand here.
2066 2020-08-14 Lewis Hyatt <lhyatt@gmail.com>
2068 * common.opt: Add new option -fdiagnostics-plain-output.
2069 * doc/invoke.texi: Document it.
2070 * opts-common.c (decode_cmdline_options_to_array): Implement it.
2071 (decode_cmdline_option): Add missing const qualifier to argv.
2073 2020-08-14 Jakub Jelinek <jakub@redhat.com>
2074 Jonathan Wakely <jwakely@redhat.com>
2075 Jonathan Wakely <jwakely@redhat.com>
2077 * system.h: Include type_traits.
2078 * vec.h (vec<T, A, vl_embed>::embedded_size): Use offsetof and asserts
2079 on vec_stdlayout, which is conditionally a vec (for standard layout T)
2080 and otherwise vec_embedded.
2082 2020-08-14 Jojo R <jiejie_rong@c-sky.com>
2084 * config/csky/csky-elf.h (ASM_SPEC): Use mfloat-abi.
2085 * config/csky/csky-linux-elf.h (ASM_SPEC): mfloat-abi.
2087 2020-08-13 David Malcolm <dmalcolm@redhat.com>
2103 * Makefile.in (ANALYZER_OBJS): Add analyzer/region.o,
2104 analyzer/region-model-impl-calls.o,
2105 analyzer/region-model-manager.o,
2106 analyzer/region-model-reachability.o, analyzer/store.o, and
2108 * doc/analyzer.texi: Update for changes to analyzer
2110 * tristate.h (tristate::get_value): New accessor.
2112 2020-08-13 Uroš Bizjak <ubizjak@gmail.com>
2114 * config/i386/i386-builtin.def (CET_NORMAL): Merge to CET BDESC array.
2115 (__builtin_ia32_rddspd, __builtin_ia32_rddspq, __builtin_ia32_incsspd)
2116 (__builtin_ia32_incsspq, __builtin_ia32_wrssd, __builtin_ia32_wrssq)
2117 (__builtin_ia32_wrussd, __builtin_ia32_wrussq): Use CODE_FOR_nothing.
2118 * config/i386/i386-builtins.c: Remove handling of CET_NORMAL builtins.
2119 * config/i386/i386.md (@rdssp<mode>): Implement as parametrized
2120 name pattern. Use SWI48 mode iterator. Introduce input operand
2121 and remove explicit XOR zeroing from insn template.
2122 (@incssp<mode>): Implement as parametrized name pattern.
2123 Use SWI48 mode iterator.
2124 (@wrss<mode>): Ditto.
2125 (@wruss<mode>): Ditto.
2126 (rstorssp): Remove expander. Rename insn pattern from *rstorssp<mode>.
2127 Use DImode memory operand.
2128 (clrssbsy): Remove expander. Rename insn pattern from *clrssbsy<mode>.
2129 Use DImode memory operand.
2130 (save_stack_nonlocal): Update for parametrized name patterns.
2131 Use cleared register as an argument to gen_rddsp.
2132 (restore_stack_nonlocal): Update for parametrized name patterns.
2133 * config/i386/i386-expand.c (ix86_expand_builtin):
2134 [case IX86_BUILTIN_RDSSPD, case IX86_BUILTIN_RDSSPQ]: Expand here.
2135 [case IX86_BUILTIN_INCSSPD, case IX86_BUILTIN_INCSSPQ]: Ditto.
2136 [case IX86_BUILTIN_RSTORSSP, case IX86_BUILTIN_CLRSSBSY]:
2137 Generate DImode memory operand.
2138 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]
2139 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
2140 Update for parameterized name patterns.
2142 2020-08-13 Peter Bergner <bergner@linux.ibm.com>
2145 * config/rs6000/rs6000-call.c (rs6000_promote_function_mode): Disallow
2146 MMA types as return values.
2147 (rs6000_function_arg): Disallow MMA types as function arguments.
2149 2020-08-13 Richard Sandiford <richard.sandiford@arm.com>
2152 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
2154 * config/aarch64/aarch64.c (aarch64_function_value): Add if
2155 condition to check ag_mode after entering if condition of
2156 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
2157 set as false by -mgeneral-regs-only, report the diagnostic
2158 information of -mgeneral-regs-only imcompatible with the use
2159 of fp/simd register(s).
2161 2020-08-13 Martin Liska <mliska@suse.cz>
2164 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Mask m_value
2167 2020-08-13 Jakub Jelinek <jakub@redhat.com>
2169 * gimplify.c (gimplify_omp_taskloop_expr): New function.
2170 (gimplify_omp_for): Use it. For OMP_FOR_NON_RECTANGULAR
2171 loops adjust in outer taskloop the var-outer decls.
2172 * omp-expand.c (expand_omp_taskloop_for_inner): Handle non-rectangular
2174 (expand_omp_for): Don't reject non-rectangular taskloop.
2175 * omp-general.c (omp_extract_for_data): Don't assert that
2176 non-rectangular loops have static schedule, instead treat loop->m1
2177 or loop->m2 as if loop->n1 or loop->n2 is non-constant.
2179 2020-08-13 Hongtao Liu <hongtao.liu@intel.com>
2182 * config/i386/sse.md (<avx512>_load<mode>_mask,
2183 <avx512>_load<mode>_mask): Extend to generate blendm
2185 (<avx512>_blendm<mode>, <avx512>_blendm<mode>): Change
2186 define_insn to define_expand.
2188 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
2189 Uroš Bizjak <ubizjak@gmail.com>
2192 * config/i386/i386.md (peephole2): Only reorder register clearing
2193 instructions to allow use of xor for general registers.
2195 2020-08-12 Martin Liska <mliska@suse.cz>
2198 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Drop value bits
2199 for bits that are unknown.
2200 (ipcp_bits_lattice::set_to_constant): Likewise.
2201 * tree-ssa-ccp.c (get_default_value): Add sanity check that
2202 IPA CP bit info has all bits set to zero in bits that
2205 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
2207 * config/aarch64/aarch64.c (aarch64_function_value): Add if
2208 condition to check ag_mode after entering if condition of
2209 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
2210 set as false by -mgeneral-regs-only, report the diagnostic
2211 information of -mgeneral-regs-only imcompatible with the use
2212 of fp/simd register(s).
2214 2020-08-12 Jakub Jelinek <jakub@redhat.com>
2216 PR tree-optimization/96535
2217 * toplev.c (process_options): Move flag_unroll_loops and
2218 flag_cunroll_grow_size handling from here to ...
2219 * opts.c (finish_options): ... here. For flag_cunroll_grow_size,
2220 don't check for AUTODETECT_VALUE, but instead check
2221 opts_set->x_flag_cunroll_grow_size.
2222 * common.opt (funroll-completely-grow-size): Default to 0.
2223 * config/rs6000/rs6000.c (TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE):
2225 (rs6000_override_options_after_change): New function.
2226 (rs6000_option_override_internal): Call it. Move there the
2227 flag_cunroll_grow_size, unroll_only_small_loops and
2228 flag_rename_registers handling.
2230 2020-08-12 Tom de Vries <tdevries@suse.de>
2232 * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Make elt_size an
2233 unsigned HOST_WIDE_INT. Print init_frag.remaining using
2234 HOST_WIDE_INT_PRINT_UNSIGNED.
2236 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
2237 Uroš Bizjak <ubizjak@gmail.com>
2239 * config/i386/i386.md (peephole2): Reduce unnecessary
2240 register shuffling produced by register allocation.
2242 2020-08-12 Aldy Hernandez <aldyh@redhat.com>
2244 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use vec<>
2245 instead of std::vector<>.
2246 (evaluate_properties_for_edge): Same.
2247 (ipa_fn_summary_t::duplicate): Same.
2248 (estimate_ipcp_clone_size_and_time): Same.
2249 * vec.h (<T, A, vl_embed>::embedded_size): Change vec_embedded
2250 type to contain a char[].
2252 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
2255 * config/s390/s390.c (s390_cannot_force_const_mem): Reject an
2256 unary minus for everything not being a numeric constant.
2257 (legitimize_tls_address): Move a NEG out of the CONST rtx.
2259 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
2262 * config/s390/s390.h (TARGET_NONSIGNALING_VECTOR_COMPARE_OK): New
2264 * config/s390/vector.md (vcond_comparison_operator): Use new macro
2267 2020-08-11 Jakub Jelinek <jakub@redhat.com>
2269 PR rtl-optimization/96539
2270 * expr.c (emit_block_move_hints): Don't copy anything if x and y
2271 are the same and neither is MEM_VOLATILE_P.
2273 2020-08-11 Jakub Jelinek <jakub@redhat.com>
2276 * tree.c (get_narrower): Use TREE_TYPE (ret) instead of
2277 TREE_TYPE (win) for COMPOUND_EXPRs.
2279 2020-08-11 Jan Hubicka <hubicka@ucw.cz>
2281 * predict.c (not_loop_guard_equal_edge_p): New function.
2282 (maybe_predict_edge): New function.
2283 (predict_paths_for_bb): Use it.
2284 (predict_paths_leading_to_edge): Use it.
2286 2020-08-11 Martin Liska <mliska@suse.cz>
2288 * dbgcnt.def (DEBUG_COUNTER): Add ipa_cp_bits.
2289 * ipa-cp.c (ipcp_store_bits_results): Use it when we store known
2290 bits for parameters.
2292 2020-08-10 Marek Polacek <polacek@redhat.com>
2294 * doc/sourcebuild.texi: Document dg-ice.
2296 2020-08-10 Roger Sayle <roger@nextmovesoftware.com>
2298 * config/i386/i386-expand.c (ix86_expand_int_movcc): Expand
2299 signed MIN_EXPR against zero as "x < 0 ? x : 0" instead of
2300 "x <= 0 ? x : 0" to enable sign_bit_compare_p optimizations.
2302 2020-08-10 Aldy Hernandez <aldyh@redhat.com>
2304 * value-range.h (gt_ggc_mx): Declare inline.
2307 2020-08-10 Marc Glisse <marc.glisse@inria.fr>
2309 PR tree-optimization/95433
2310 * match.pd (X * C1 == C2): Handle wrapping overflow.
2311 * expr.c (maybe_optimize_mod_cmp): Qualify call to mod_inv.
2313 * wide-int.cc (mod_inv): ... here.
2314 * wide-int.h (mod_inv): Declare it.
2316 2020-08-10 Jan Hubicka <hubicka@ucw.cz>
2318 * predict.c (filter_predictions): Document semantics of filter.
2319 (equal_edge_p): Rename to ...
2320 (not_equal_edge_p): ... this; reverse semantics.
2321 (remove_predictions_associated_with_edge): Fix.
2323 2020-08-10 Hongtao Liu <hongtao.liu@intel.com>
2326 * config/i386/i386-expand.c (ix86_expand_sse_cmp): Refine for
2328 (ix86_expand_mask_vec_cmp): Change prototype.
2329 * config/i386/i386-protos.h (ix86_expand_mask_vec_cmp): Change prototype.
2330 * config/i386/i386.c (ix86_print_operand): Remove operand
2332 * config/i386/sse.md
2333 (*<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>): Deleted.
2334 (*<avx512>_cmp<mode>3<mask_scalar_merge_name>): Ditto.
2335 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>): Ditto.
2336 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
2337 avx512f_maskcmp<mode>3): Ditto.
2339 2020-08-09 Roger Sayle <roger@nextmovesoftware.com>
2341 * expmed.c (init_expmed_one_conv): Restore all->reg's mode.
2342 (init_expmed_one_mode): Set all->reg to desired mode.
2344 2020-08-08 Peter Bergner <bergner@linux.ibm.com>
2347 * config/rs6000/rs6000.c (rs6000_invalid_conversion): Use canonical
2348 types for type comparisons. Refactor code to simplify it.
2350 2020-08-08 Jakub Jelinek <jakub@redhat.com>
2353 * tree-nested.c (convert_nonlocal_omp_clauses): For
2354 OMP_CLAUSE_REDUCTION, OMP_CLAUSE_LASTPRIVATE and OMP_CLAUSE_LINEAR
2355 save info->new_local_var_chain around walks of the clause gimple
2356 sequences and declare_vars if needed into the sequence.
2358 2020-08-08 Jakub Jelinek <jakub@redhat.com>
2360 PR tree-optimization/96424
2361 * omp-expand.c: Include tree-eh.h.
2362 (expand_omp_for_init_vars): Handle -fexceptions -fnon-call-exceptions
2363 by forcing floating point comparison into a bool temporary.
2365 2020-08-07 Marc Glisse <marc.glisse@inria.fr>
2367 * generic-match-head.c (optimize_vectors_before_lowering_p): New
2369 * gimple-match-head.c (optimize_vectors_before_lowering_p):
2371 * match.pd ((v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Use it.
2373 2020-08-07 Richard Biener <rguenther@suse.de>
2375 PR tree-optimization/96514
2376 * tree-if-conv.c (if_convertible_bb_p): If the last stmt
2377 is a call that is control-altering, fail.
2379 2020-08-07 Jose E. Marchesi <jose.marchesi@oracle.com>
2381 * config/bpf/bpf.md: Remove trailing whitespaces.
2382 * config/bpf/constraints.md: Likewise.
2383 * config/bpf/predicates.md: Likewise.
2385 2020-08-07 Michael Meissner <meissner@linux.ibm.com>
2387 * config/rs6000/rs6000.md (bswaphi2_reg): Add ISA 3.1 support.
2388 (bswapsi2_reg): Add ISA 3.1 support.
2389 (bswapdi2): Rename bswapdi2_xxbrd to bswapdi2_brd.
2390 (bswapdi2_brd,bswapdi2_xxbrd): Rename. Add ISA 3.1 support.
2392 2020-08-07 Alan Modra <amodra@gmail.com>
2395 * config/rs6000/predicates.md (current_file_function_operand): Don't
2396 accept functions that differ in r2 usage.
2398 2020-08-06 Hans-Peter Nilsson <hp@bitrange.com>
2400 * config/mmix/mmix.md (MM): New mode_iterator.
2401 ("mov<mode>"): New expander to expand for all MM-modes.
2402 ("*movqi_expanded", "*movhi_expanded", "*movsi_expanded")
2403 ("*movsf_expanded", "*movdf_expanded"): Rename from the
2404 corresponding mov<M> named pattern. Add to the condition that
2405 either operand must be a register_operand.
2406 ("*movdi_expanded"): Similar, but also allow STCO in the condition.
2408 2020-08-06 Richard Sandiford <richard.sandiford@arm.com>
2411 * config/arm/arm.md (arm_stack_protect_test_insn): Zero out
2412 operand 2 after use.
2413 * config/arm/thumb1.md (thumb1_stack_protect_test_insn): Likewise.
2415 2020-08-06 Peter Bergner <bergner@linux.ibm.com>
2418 * config/rs6000/mma.md (*movpxi): Add xxsetaccz generation.
2419 Disable split for zero constant source operand.
2420 (mma_xxsetaccz): Change to define_expand. Call gen_movpxi.
2422 2020-08-06 Jakub Jelinek <jakub@redhat.com>
2424 PR tree-optimization/96480
2425 * tree-ssa-reassoc.c (suitable_cond_bb): Add TEST_SWAPPED_P argument.
2426 If TEST_BB ends in cond and has one edge to *OTHER_BB and another
2427 through an empty bb to that block too, if PHI args don't match, retry
2428 them through the other path from TEST_BB.
2429 (maybe_optimize_range_tests): Adjust callers. Handle such LAST_BB
2430 through inversion of the condition.
2432 2020-08-06 Jose E. Marchesi <jose.marchesi@oracle.com>
2434 * config/bpf/bpf-helpers.h (KERNEL_HELPER): Define.
2435 (KERNEL_VERSION): Remove.
2436 * config/bpf/bpf-helpers.def: Delete.
2437 * config/bpf/bpf.c (bpf_handle_fndecl_attribute): New function.
2438 (bpf_attribute_table): Define.
2439 (bpf_helper_names): Delete.
2440 (bpf_helper_code): Likewise.
2441 (enum bpf_builtins): Adjust to new helpers mechanism.
2442 (bpf_output_call): Likewise.
2443 (bpf_init_builtins): Likewise.
2444 (bpf_init_builtins): Likewise.
2445 * doc/extend.texi (BPF Function Attributes): New section.
2446 (BPF Kernel Helpers): Delete section.
2448 2020-08-06 Richard Biener <rguenther@suse.de>
2450 PR tree-optimization/96491
2451 * tree-ssa-sink.c (sink_common_stores_to_bb): Avoid
2452 sinking across abnormal edges.
2454 2020-08-06 Richard Biener <rguenther@suse.de>
2456 PR tree-optimization/96483
2457 * tree-ssa-pre.c (create_component_ref_by_pieces_1): Handle
2460 2020-08-06 Richard Biener <rguenther@suse.de>
2462 * graphite-isl-ast-to-gimple.c (ivs_params): Use hash_map instead
2464 (ivs_params_clear): Adjust.
2465 (gcc_expression_from_isl_ast_expr_id): Likewise.
2466 (graphite_create_new_loop): Likewise.
2467 (add_parameters_to_ivs_params): Likewise.
2469 2020-08-06 Roger Sayle <roger@nextmovesoftware.com>
2470 Uroš Bizjak <ubizjak@gmail.com>
2472 * config/i386/i386.md (MAXMIN_IMODE): No longer needed.
2473 (<maxmin><mode>3): Support SWI248 and general_operand for
2474 second operand, when TARGET_CMOVE.
2475 (<maxmin><mode>3_1 splitter): Optimize comparisons against
2476 0, 1 and -1 to use "test" instead of "cmp".
2477 (*<maxmin>di3_doubleword): Likewise, allow general_operand
2478 and enable on TARGET_CMOVE.
2479 (peephole2): Convert clearing a register after a flag setting
2480 instruction into an xor followed by the original flag setter.
2482 2020-08-06 Gerald Pfeifer <gerald@pfeifer.com>
2484 * ipa-fnsummary.c (INCLUDE_VECTOR): Define.
2485 Remove direct inclusion of <vector>.
2487 2020-08-06 Kewen Lin <linkw@gcc.gnu.org>
2489 * config/rs6000/rs6000.c (rs6000_adjust_vect_cost_per_loop): New
2491 (rs6000_finish_cost): Call rs6000_adjust_vect_cost_per_loop.
2492 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Add cost
2493 modeling for vector with length.
2494 (vect_rgroup_iv_might_wrap_p): New function, factored out from...
2495 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): ...this.
2496 Update function comment.
2497 * tree-vect-stmts.c (vect_gen_len): Update function comment.
2498 * tree-vectorizer.h (vect_rgroup_iv_might_wrap_p): New declare.
2500 2020-08-06 Kewen Lin <linkw@linux.ibm.com>
2502 * tree-vectorizer.c (try_vectorize_loop_1): Skip the epilogue loops
2505 2020-08-05 Marc Glisse <marc.glisse@inria.fr>
2507 PR tree-optimization/95906
2509 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
2510 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): New transformations.
2511 (op (c ? a : b)): Update to match the new transformations.
2513 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
2516 * config/aarch64/aarch64.md (stack_protect_test_<mode>): Set the
2517 CC register directly, instead of a GPR. Replace the original GPR
2518 destination with an extra scratch register. Zero out operand 3
2520 (stack_protect_test): Update accordingly.
2522 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
2524 * config/aarch64/aarch64.md (load_pair_sw_<SX:mode><SX2:mode>)
2525 (load_pair_dw_<DX:mode><DX2:mode>, load_pair_dw_tftf)
2526 (store_pair_sw_<SX:mode><SX2:mode>)
2527 (store_pair_dw_<DX:mode><DX2:mode>, store_pair_dw_tftf)
2528 (*load_pair_extendsidi2_aarch64)
2529 (*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand.
2530 * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>)
2531 (vec_store_pair<DREG:mode><DREG2:mode>, load_pair<VQ:mode><VQ2:mode>)
2532 (vec_store_pair<VQ:mode><VQ2:mode>): Likewise.
2534 2020-08-05 Richard Biener <rguenther@suse.de>
2536 * tree-ssa-loop-im.c (invariantness_dom_walker): Remove.
2537 (invariantness_dom_walker::before_dom_children): Move to ...
2538 (compute_invariantness): ... this function.
2539 (move_computations): Inline ...
2540 (tree_ssa_lim): ... here, share RPO order and avoid some
2542 (analyze_memory_references): Remove sorting of location
2543 lists, instead assert they are sorted already when checking.
2544 (prev_flag_edges): Remove.
2545 (execute_sm_if_changed): Pass down and adjust prev edge state.
2546 (execute_sm_exit): Likewise.
2547 (hoist_memory_references): Likewise. Commit edge insertions
2548 of each processed exit.
2549 (store_motion_loop): Do not commit edge insertions on all
2550 edges in the function.
2551 (tree_ssa_lim_initialize): Do not call alloc_aux_for_edges.
2552 (tree_ssa_lim_finalize): Do not call free_aux_for_edges.
2554 2020-08-05 Richard Biener <rguenther@suse.de>
2556 * genmatch.c (fail_label): New global.
2557 (expr::gen_transform): Branch to fail_label instead of
2558 returning. Fix indent of call argument checking.
2559 (dt_simplify::gen_1): Compute and emit fail_label, branch
2560 to it instead of returning early.
2562 2020-08-05 Jakub Jelinek <jakub@redhat.com>
2564 * omp-expand.c (expand_omp_for): Don't disallow combined non-rectangular
2567 2020-08-05 Jakub Jelinek <jakub@redhat.com>
2570 * omp-low.c (lower_omp_taskreg): Call lower_reduction_clauses even in
2573 2020-08-05 Jakub Jelinek <jakub@redhat.com>
2575 * omp-expand.c (expand_omp_for_init_counts): Remember
2576 first_inner_iterations, factor and n1o from the number of iterations
2578 (expand_omp_for_init_vars): Use more efficient logical iteration number
2579 to actual iterator values computation even for non-rectangular loops
2580 where number of loop iterations could not be computed at compile time.
2582 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2584 * config/rs6000/altivec.h (vec_blendv, vec_permx): Add define.
2585 * config/rs6000/altivec.md (UNSPEC_XXBLEND, UNSPEC_XXPERMX.): New
2587 (VM3): New define_mode.
2588 (VM3_char): New define_attr.
2589 (xxblend_<mode> mode VM3): New define_insn.
2590 (xxpermx): New define_expand.
2591 (xxpermx_inst): New define_insn.
2592 * config/rs6000/rs6000-builtin.def (VXXBLEND_V16QI, VXXBLEND_V8HI,
2593 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): New
2594 BU_P10V_3 definitions.
2595 (XXBLEND): New BU_P10_OVERLOAD_3 definition.
2596 (XXPERMX): New BU_P10_OVERLOAD_4 definition.
2597 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
2598 (P10_BUILTIN_VXXPERMX): Add if statement.
2599 * config/rs6000/rs6000-call.c (P10_BUILTIN_VXXBLEND_V16QI,
2600 P10_BUILTIN_VXXBLEND_V8HI, P10_BUILTIN_VXXBLEND_V4SI,
2601 P10_BUILTIN_VXXBLEND_V2DI, P10_BUILTIN_VXXBLEND_V4SF,
2602 P10_BUILTIN_VXXBLEND_V2DF, P10_BUILTIN_VXXPERMX): Define
2603 overloaded arguments.
2604 (rs6000_expand_quaternop_builtin): Add if case for CODE_FOR_xxpermx.
2605 (builtin_quaternary_function_type): Add v16uqi_type and xxpermx_type
2606 variables, add case statement for P10_BUILTIN_VXXPERMX.
2607 (builtin_function_type): Add case statements for
2608 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
2609 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI.
2610 * doc/extend.texi: Add documentation for vec_blendv and vec_permx.
2612 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2614 * config/rs6000/altivec.h (vec_splati, vec_splatid, vec_splati_ins):
2616 * config/rs6000/altivec.md (UNSPEC_XXSPLTIW, UNSPEC_XXSPLTID,
2617 UNSPEC_XXSPLTI32DX): New.
2618 (vxxspltiw_v4si, vxxspltiw_v4sf_inst, vxxspltidp_v2df_inst,
2619 vxxsplti32dx_v4si_inst, vxxsplti32dx_v4sf_inst): New define_insn.
2620 (vxxspltiw_v4sf, vxxspltidp_v2df, vxxsplti32dx_v4si,
2621 vxxsplti32dx_v4sf.): New define_expands.
2622 * config/rs6000/predicates.md (u1bit_cint_operand,
2623 s32bit_cint_operand, c32bit_cint_operand): New predicates.
2624 * config/rs6000/rs6000-builtin.def (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF,
2625 VXXSPLTID): New definitions.
2626 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF): New BU_P10V_3
2628 (XXSPLTIW, XXSPLTID): New definitions.
2629 (XXSPLTI32DX): Add definitions.
2630 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XXSPLTIW,
2631 P10_BUILTIN_VEC_XXSPLTID, P10_BUILTIN_VEC_XXSPLTI32DX):
2633 * config/rs6000/rs6000-protos.h (rs6000_constF32toI32): New extern
2635 * config/rs6000/rs6000.c (rs6000_constF32toI32): New function.
2636 * doc/extend.texi: Add documentation for vec_splati,
2637 vec_splatid, and vec_splati_ins.
2639 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2641 * config/rs6000/altivec.h (vec_sldb, vec_srdb): New defines.
2642 * config/rs6000/altivec.md (UNSPEC_SLDB, UNSPEC_SRDB): New.
2643 (SLDB_lr): New attribute.
2644 (VSHIFT_DBL_LR): New iterator.
2645 (vs<SLDB_lr>db_<mode>): New define_insn.
2646 * config/rs6000/rs6000-builtin.def (VSLDB_V16QI, VSLDB_V8HI,
2647 VSLDB_V4SI, VSLDB_V2DI, VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI,
2648 VSRDB_V2DI): New BU_P10V_3 definitions.
2649 (SLDB, SRDB): New BU_P10_OVERLOAD_3 definitions.
2650 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_SLDB,
2651 P10_BUILTIN_VEC_SRDB): New definitions.
2652 (rs6000_expand_ternop_builtin) [CODE_FOR_vsldb_v16qi,
2653 CODE_FOR_vsldb_v8hi, CODE_FOR_vsldb_v4si, CODE_FOR_vsldb_v2di,
2654 CODE_FOR_vsrdb_v16qi, CODE_FOR_vsrdb_v8hi, CODE_FOR_vsrdb_v4si,
2655 CODE_FOR_vsrdb_v2di]: Add clauses.
2656 * doc/extend.texi: Add description for vec_sldb and vec_srdb.
2658 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2660 * config/rs6000/altivec.h: Add define for vec_replace_elt and
2661 vec_replace_unaligned.
2662 * config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New
2664 (REPLACE_ELT): New mode iterator.
2665 (REPLACE_ELT_char, REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes.
2666 (vreplace_un_<mode>, vreplace_elt_<mode>_inst): New.
2667 * config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI,
2668 VREPLACE_ELT_UV4SI, VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI,
2669 VREPLACE_ELT_V2DF, VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI,
2670 VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
2671 VREPLACE_UN_V2DF, (REPLACE_ELT, REPLACE_UN, VREPLACE_ELT_V2DI): New builtin
2673 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_REPLACE_ELT,
2674 P10_BUILTIN_VEC_REPLACE_UN): New builtin argument definitions.
2675 (rs6000_expand_quaternop_builtin): Add 3rd argument checks for
2676 CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf,
2677 CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf.
2678 (builtin_function_type) [P10_BUILTIN_VREPLACE_ELT_UV4SI,
2679 P10_BUILTIN_VREPLACE_ELT_UV2DI, P10_BUILTIN_VREPLACE_UN_UV4SI,
2680 P10_BUILTIN_VREPLACE_UN_UV2DI]: New cases.
2681 * doc/extend.texi: Add description for vec_replace_elt and
2682 vec_replace_unaligned builtins.
2684 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2686 * config/rs6000/altivec.h (vec_insertl, vec_inserth): New defines.
2687 * config/rs6000/rs6000-builtin.def (VINSERTGPRBL, VINSERTGPRHL,
2688 VINSERTGPRWL, VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL,
2689 VINSERTGPRBR, VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR,
2690 VINSERTVPRHR, VINSERTVPRWR): New builtins.
2691 (INSERTL, INSERTH): New builtins.
2692 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_INSERTL,
2693 P10_BUILTIN_VEC_INSERTH): New overloaded definitions.
2694 (P10_BUILTIN_VINSERTGPRBL, P10_BUILTIN_VINSERTGPRHL,
2695 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
2696 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
2697 P10_BUILTIN_VINSERTVPRWL): Add case entries.
2698 * config/rs6000/vsx.md (define_c_enum): Add UNSPEC_INSERTL,
2700 (define_expand): Add vinsertvl_<mode>, vinsertvr_<mode>,
2701 vinsertgl_<mode>, vinsertgr_<mode>, mode is VI2.
2702 (define_ins): vinsertvl_internal_<mode>, vinsertvr_internal_<mode>,
2703 vinsertgl_internal_<mode>, vinsertgr_internal_<mode>, mode VEC_I.
2704 * doc/extend.texi: Add documentation for vec_insertl, vec_inserth.
2706 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2708 * config/rs6000/altivec.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
2709 (vextractl<mode>, vextractr<mode>)
2710 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
2712 * config/rs6000/vsx.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
2713 (vextractl<mode>, vextractr<mode>)
2714 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
2716 * doc/extend.texi: Update documentation for vec_extractl.
2717 Replace builtin name vec_extractr with vec_extracth. Update
2718 description of vec_extracth.
2720 2020-08-04 Jim Wilson <jimw@sifive.com>
2722 * doc/invoke.texi (AArch64 Options): Delete duplicate
2723 -mstack-protector-guard docs.
2725 2020-08-04 Roger Sayle <roger@nextmovesoftware.com>
2727 * config/nvptx/nvptx.md (smulhi3_highpart, smulsi3_highpart)
2728 (umulhi3_highpart, umulsi3_highpart): New instructions.
2730 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
2732 * config/gcn/gcn-run.c (R_AMDGPU_NONE): Delete.
2733 (R_AMDGPU_ABS32_LO): Delete.
2734 (R_AMDGPU_ABS32_HI): Delete.
2735 (R_AMDGPU_ABS64): Delete.
2736 (R_AMDGPU_REL32): Delete.
2737 (R_AMDGPU_REL64): Delete.
2738 (R_AMDGPU_ABS32): Delete.
2739 (R_AMDGPU_GOTPCREL): Delete.
2740 (R_AMDGPU_GOTPCREL32_LO): Delete.
2741 (R_AMDGPU_GOTPCREL32_HI): Delete.
2742 (R_AMDGPU_REL32_LO): Delete.
2743 (R_AMDGPU_REL32_HI): Delete.
2745 (R_AMDGPU_RELATIVE64): Delete.
2747 2020-08-04 Omar Tahir <omar.tahir@arm.com>
2749 * config/arm/arm-cpus.in (armv8.1-m.main): Tune for Cortex-M55.
2751 2020-08-04 Hu Jiangping <hujiangping@cn.fujitsu.com>
2753 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Delete
2754 redundant extra_cost variable.
2756 2020-08-04 Zhiheng Xie <xiezhiheng@huawei.com>
2758 * config/aarch64/aarch64-builtins.c (aarch64_call_properties):
2759 Use FLOAT_MODE_P macro instead of enumerating all floating-point
2760 modes and add global flag FLAG_AUTO_FP.
2762 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2764 * doc/extend.texi (symver): Add @cindex for symver function attribute.
2766 2020-08-04 Marc Glisse <marc.glisse@inria.fr>
2768 PR tree-optimization/95433
2769 * match.pd (X * C1 == C2): New transformation.
2771 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2773 * gimple-ssa-sprintf.c (get_int_range): Adjust for irange API.
2774 (format_integer): Same.
2775 (handle_printf_call): Same.
2777 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
2779 * config/gcn/gcn.md ("<expander>ti3"): New.
2781 2020-08-04 Richard Biener <rguenther@suse.de>
2783 PR tree-optimization/88240
2784 * tree-ssa-sccvn.h (vn_reference_s::punned): New flag.
2785 * tree-ssa-sccvn.c (vn_reference_insert): Initialize punned.
2786 (vn_reference_insert_pieces): Likewise.
2787 (visit_reference_op_call): Likewise.
2788 (visit_reference_op_load): Track whether a ref was punned.
2789 * tree-ssa-pre.c (do_hoist_insertion): Refuse to perform hoist
2790 insertion on punned floating point loads.
2792 2020-08-04 Sudakshina Das <sudi.das@arm.com>
2794 * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case
2796 (aarch64_gen_load_pair): Likewise.
2797 (aarch64_copy_one_block_and_progress_pointers): Handle 256 bit copy.
2798 (aarch64_expand_cpymem): Expand copy_limit to 256bits where
2801 2020-08-04 Andrea Corallo <andrea.corallo@arm.com>
2803 * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing
2805 * doc/sourcebuild.texi (aarch64_fjcvtzs_hw) Document new
2806 target supports option.
2808 2020-08-04 Tom de Vries <tdevries@suse.de>
2811 * config/nvptx/nvptx.c (nvptx_gen_shuffle): Handle V2SI/V2DI.
2813 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2816 * tree-vect-generic.c (expand_vector_conversion): Replace .VEC_CONVERT
2817 call with GIMPLE_NOP if there is no lhs.
2819 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2822 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Add IS_DEBUG
2823 argument. Return false instead of gcc_unreachable if it is true and
2824 get_addr_base_and_unit_offset returns NULL.
2825 (fold_stmt_1) <case GIMPLE_DEBUG>: Adjust caller.
2827 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2829 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional):
2830 Call is_gimple_min_invariant dropped from previous patch.
2832 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2834 * omp-expand.c (expand_omp_for_init_counts): For triangular loops
2835 compute number of iterations at runtime more efficiently.
2836 (expand_omp_for_init_vars): Adjust immediate dominators.
2837 (extract_omp_for_update_vars): Likewise.
2839 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2841 * vr-values.c (simplify_using_ranges::two_valued_val_range_p):
2844 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2846 * vr-values.c (simplify_conversion_using_ranges): Convert to irange API.
2848 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2850 * vr-values.c (test_for_singularity): Use irange API.
2851 (simplify_using_ranges::simplify_cond_using_ranges_1): Do not
2852 special case VR_RANGE.
2854 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2856 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional): Adjust
2859 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2861 * vr-values.c (simplify_using_ranges::op_with_boolean_value_range_p): Adjust
2864 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2866 * tree-ssanames.c (get_range_info): Use irange instead of value_range.
2867 * tree-ssanames.h (get_range_info): Same.
2869 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2871 * fold-const.c (expr_not_equal_to): Adjust for irange API.
2873 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2875 * builtins.c (determine_block_size): Remove ad-hoc range canonicalization.
2877 2020-08-04 Xionghu Luo <luoxhu@linux.ibm.com>
2879 PR rtl-optimization/71309
2880 * dse.c (find_shift_sequence): Use subreg of shifted from high part
2881 register to avoid loading from address.
2883 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
2885 * doc/cpp.texi (Variadic Macros): Use the exact ... token in
2888 2020-08-03 Nathan Sidwell <nathan@acm.org>
2890 * doc/invoke.texi: Refer to c++20
2892 2020-08-03 Julian Brown <julian@codesourcery.com>
2893 Thomas Schwinge <thomas@codesourcery.com>
2895 * gimplify.c (gimplify_omp_target_update): Allow GOMP_MAP_TO_PSET
2896 without a preceding data-movement mapping.
2898 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
2900 * config/darwin.h (ASM_DECLARE_FUNCTION_NAME): UNDEF before
2902 (DEF_MIN_OSX_VERSION): Only define if there's no existing
2905 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
2907 * config/darwin.c (IN_TARGET_CODE): Remove.
2908 (darwin_mergeable_constant_section): Handle poly-int machine modes.
2909 (machopic_select_rtx_section): Likewise.
2911 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
2913 PR tree-optimization/96430
2914 * range-op.cc (operator_tests): Do not shift by 31 on targets with
2915 integer's smaller than 32 bits.
2917 2020-08-03 Martin Jambor <mjambor@suse.cz>
2919 * hsa-brig-format.h: Moved to brig/brigfrontend.
2920 * hsa-brig.c: Removed.
2921 * hsa-builtins.def: Likewise.
2922 * hsa-common.c: Likewise.
2923 * hsa-common.h: Likewise.
2924 * hsa-dump.c: Likewise.
2925 * hsa-gen.c: Likewise.
2926 * hsa-regalloc.c: Likewise.
2927 * ipa-hsa.c: Likewise.
2928 * omp-grid.c: Likewise.
2929 * omp-grid.h: Likewise.
2930 * Makefile.in (BUILTINS_DEF): Remove hsa-builtins.def.
2931 (OBJS): Remove hsa-common.o, hsa-gen.o, hsa-regalloc.o, hsa-brig.o,
2932 hsa-dump.o, ipa-hsa.c and omp-grid.o.
2933 (GTFILES): Removed hsa-common.c and omp-expand.c.
2934 * builtins.def: Remove processing of hsa-builtins.def.
2935 (DEF_HSA_BUILTIN): Remove.
2936 * common.opt (flag_disable_hsa): Remove.
2938 * config.in (ENABLE_HSA): Removed.
2939 * configure.ac: Removed handling configuration for hsa offloading.
2940 (ENABLE_HSA): Removed.
2941 * configure: Regenerated.
2942 * doc/install.texi (--enable-offload-targets): Remove hsa from the
2944 (--with-hsa-runtime): Reword to reference any HSA run-time, not
2945 specifically HSA offloading.
2946 * doc/invoke.texi (Option Summary): Remove -Whsa.
2947 (Warning Options): Likewise.
2948 (Optimize Options): Remove hsa-gen-debug-stores.
2949 * doc/passes.texi (Regular IPA passes): Remove section on IPA HSA
2951 * gimple-low.c (lower_stmt): Remove GIMPLE_OMP_GRID_BODY case.
2952 * gimple-pretty-print.c (dump_gimple_omp_for): Likewise.
2953 (dump_gimple_omp_block): Likewise.
2954 (pp_gimple_stmt_1): Likewise.
2955 * gimple-walk.c (walk_gimple_stmt): Likewise.
2956 * gimple.c (gimple_build_omp_grid_body): Removed function.
2957 (gimple_copy): Remove GIMPLE_OMP_GRID_BODY case.
2958 * gimple.def (GIMPLE_OMP_GRID_BODY): Removed.
2959 * gimple.h (gf_mask): Removed GF_OMP_PARALLEL_GRID_PHONY,
2960 OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY,
2961 GF_OMP_FOR_GRID_INTRA_GROUP, GF_OMP_FOR_GRID_GROUP_ITER and
2962 GF_OMP_TEAMS_GRID_PHONY. Renumbered GF_OMP_FOR_KIND_SIMD and
2964 (gimple_build_omp_grid_body): Removed declaration.
2965 (gimple_has_substatements): Remove GIMPLE_OMP_GRID_BODY case.
2966 (gimple_omp_for_grid_phony): Removed.
2967 (gimple_omp_for_set_grid_phony): Likewise.
2968 (gimple_omp_for_grid_intra_group): Likewise.
2969 (gimple_omp_for_grid_intra_group): Likewise.
2970 (gimple_omp_for_grid_group_iter): Likewise.
2971 (gimple_omp_for_set_grid_group_iter): Likewise.
2972 (gimple_omp_parallel_grid_phony): Likewise.
2973 (gimple_omp_parallel_set_grid_phony): Likewise.
2974 (gimple_omp_teams_grid_phony): Likewise.
2975 (gimple_omp_teams_set_grid_phony): Likewise.
2976 (CASE_GIMPLE_OMP): Remove GIMPLE_OMP_GRID_BODY case.
2977 * lto-section-in.c (lto_section_name): Removed hsa.
2978 * lto-streamer.h (lto_section_type): Removed LTO_section_ipa_hsa.
2979 * lto-wrapper.c (compile_images_for_offload_targets): Remove special
2981 * omp-expand.c: Do not include hsa-common.h and gt-omp-expand.h.
2982 (parallel_needs_hsa_kernel_p): Removed.
2983 (grid_launch_attributes_trees): Likewise.
2984 (grid_launch_attributes_trees): Likewise.
2985 (grid_create_kernel_launch_attr_types): Likewise.
2986 (grid_insert_store_range_dim): Likewise.
2987 (grid_get_kernel_launch_attributes): Likewise.
2988 (get_target_arguments): Remove code passing HSA grid sizes.
2989 (grid_expand_omp_for_loop): Remove.
2990 (grid_arg_decl_map): Likewise.
2991 (grid_remap_kernel_arg_accesses): Likewise.
2992 (grid_expand_target_grid_body): Likewise.
2993 (expand_omp): Remove call to grid_expand_target_grid_body.
2994 (omp_make_gimple_edges): Remove GIMPLE_OMP_GRID_BODY case.
2995 * omp-general.c: Do not include hsa-common.h.
2996 (omp_maybe_offloaded): Do not check for HSA offloading.
2997 (omp_context_selector_matches): Likewise.
2998 * omp-low.c: Do not include hsa-common.h and omp-grid.h.
2999 (build_outer_var_ref): Remove handling of GIMPLE_OMP_GRID_BODY.
3000 (scan_sharing_clauses): Remove handling of OMP_CLAUSE__GRIDDIM_.
3001 (scan_omp_parallel): Remove handling of the phoney variant.
3002 (check_omp_nesting_restrictions): Remove handling of
3003 GIMPLE_OMP_GRID_BODY and GF_OMP_FOR_KIND_GRID_LOOP.
3004 (scan_omp_1_stmt): Remove handling of GIMPLE_OMP_GRID_BODY.
3005 (lower_omp_for_lastprivate): Remove handling of gridified loops.
3006 (lower_omp_for): Remove phony loop handling.
3007 (lower_omp_taskreg): Remove phony construct handling.
3008 (lower_omp_teams): Likewise.
3009 (lower_omp_grid_body): Removed.
3010 (lower_omp_1): Remove GIMPLE_OMP_GRID_BODY case.
3011 (execute_lower_omp): Do not call omp_grid_gridify_all_targets.
3012 * opts.c (common_handle_option): Do not handle hsa when processing
3014 * params.opt (hsa-gen-debug-stores): Remove.
3015 * passes.def: Remove pass_ipa_hsa and pass_gen_hsail.
3016 * timevar.def: Remove TV_IPA_HSA.
3017 * toplev.c: Do not include hsa-common.h.
3018 (compile_file): Do not call hsa_output_brig.
3019 * tree-core.h (enum omp_clause_code): Remove OMP_CLAUSE__GRIDDIM_.
3020 (tree_omp_clause): Remove union field dimension.
3021 * tree-nested.c (convert_nonlocal_omp_clauses): Remove the
3022 OMP_CLAUSE__GRIDDIM_ case.
3023 (convert_local_omp_clauses): Likewise.
3024 * tree-pass.h (make_pass_gen_hsail): Remove declaration.
3025 (make_pass_ipa_hsa): Likewise.
3026 * tree-pretty-print.c (dump_omp_clause): Remove GIMPLE_OMP_GRID_BODY
3028 * tree.c (omp_clause_num_ops): Remove the element corresponding to
3029 OMP_CLAUSE__GRIDDIM_.
3030 (omp_clause_code_name): Likewise.
3031 (walk_tree_1): Remove GIMPLE_OMP_GRID_BODY case.
3032 * tree.h (OMP_CLAUSE__GRIDDIM__DIMENSION): Remove.
3033 (OMP_CLAUSE__GRIDDIM__SIZE): Likewise.
3034 (OMP_CLAUSE__GRIDDIM__GROUP): Likewise.
3036 2020-08-03 Bu Le <bule1@huawei.com>
3038 * config/aarch64/aarch64-sve.md (sub<mode>3): Add support for
3041 2020-08-03 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3043 * config/msp430/msp430.h (ASM_SPEC): Don't pass on "-md" option.
3045 2020-08-03 Yunde Zhong <zhongyunde@huawei.com>
3047 PR rtl-optimization/95696
3048 * regrename.c (regrename_analyze): New param include_all_block_p
3049 with default value TRUE. If set to false, avoid disrupting SMS
3051 * regrename.h (regrename_analyze): Adjust prototype.
3053 2020-08-03 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
3055 * doc/tm.texi.in (VECTOR_STORE_FLAG_VALUE): Fix a typo.
3056 * doc/tm.texi: Regenerate.
3058 2020-08-03 Richard Sandiford <richard.sandiford@arm.com>
3060 * doc/invoke.texi: Add missing comma after octeontx2f95mm entry.
3062 2020-08-03 Qian jianhua <qianjh@cn.fujitsu.com>
3064 * config/aarch64/aarch64-cores.def (a64fx): New core.
3065 * config/aarch64/aarch64-tune.md: Regenerated.
3066 * config/aarch64/aarch64.c (a64fx_prefetch_tune, a64fx_tunings): New.
3067 * doc/invoke.texi: Add a64fx to the list.
3069 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
3071 PR rtl-optimization/61494
3072 * simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't
3073 simplify x - 0.0 with -fsignaling-nans.
3075 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
3077 * genmatch.c (decision_tree::gen): Emit stub functions for
3078 tree code operand counts that have no simplifications.
3079 (main): Correct comment typo.
3081 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
3083 * gimple-ssa-sprintf.c: Fix typos in comments.
3085 2020-08-03 Tamar Christina <tamar.christina@arm.com>
3087 * config/aarch64/driver-aarch64.c (readline): Check return value fgets.
3089 2020-08-03 Richard Biener <rguenther@suse.de>
3091 * doc/match-and-simplify.texi: Amend accordingly.
3093 2020-08-03 Richard Biener <rguenther@suse.de>
3095 * genmatch.c (parser::gimple): New.
3096 (parser::parser): Initialize gimple flag member.
3097 (parser::parse_expr): Error on ! operator modifier when
3098 not targeting GIMPLE.
3099 (main): Pass down gimple flag to parser ctor.
3101 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
3103 * Makefile.in (GTFILES): Move value-range.h up.
3104 * gengtype-lex.l: Set yylval to handle GTY markers on templates.
3105 * ipa-cp.c (initialize_node_lattices): Call value_range
3107 (ipcp_propagate_stage): Use in-place new so value_range construct
3109 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use std
3110 vec instead of GCC's vec<>.
3111 (evaluate_properties_for_edge): Adjust for std vec.
3112 (ipa_fn_summary_t::duplicate): Same.
3113 (estimate_ipcp_clone_size_and_time): Same.
3114 * ipa-prop.c (ipa_get_value_range): Use in-place new for
3116 * ipa-prop.h (struct GTY): Remove class keyword for m_vr.
3117 * range-op.cc (empty_range_check): Rename to...
3118 (empty_range_varying): ...this and adjust for varying.
3119 (undefined_shift_range_check): Adjust for irange.
3120 (range_operator::wi_fold): Same.
3121 (range_operator::fold_range): Adjust for irange. Special case
3122 single pairs for performance.
3123 (range_operator::op1_range): Adjust for irange.
3124 (range_operator::op2_range): Same.
3125 (value_range_from_overflowed_bounds): Same.
3126 (value_range_with_overflow): Same.
3127 (create_possibly_reversed_range): Same.
3129 (range_false): Same.
3130 (range_true_and_false): Same.
3131 (get_bool_state): Adjust for irange and tweak for performance.
3132 (operator_equal::fold_range): Adjust for irange.
3133 (operator_equal::op1_range): Same.
3134 (operator_equal::op2_range): Same.
3135 (operator_not_equal::fold_range): Same.
3136 (operator_not_equal::op1_range): Same.
3137 (operator_not_equal::op2_range): Same.
3142 (operator_lt::fold_range): Same.
3143 (operator_lt::op1_range): Same.
3144 (operator_lt::op2_range): Same.
3145 (operator_le::fold_range): Same.
3146 (operator_le::op1_range): Same.
3147 (operator_le::op2_range): Same.
3148 (operator_gt::fold_range): Same.
3149 (operator_gt::op1_range): Same.
3150 (operator_gt::op2_range): Same.
3151 (operator_ge::fold_range): Same.
3152 (operator_ge::op1_range): Same.
3153 (operator_ge::op2_range): Same.
3154 (operator_plus::wi_fold): Same.
3155 (operator_plus::op1_range): Same.
3156 (operator_plus::op2_range): Same.
3157 (operator_minus::wi_fold): Same.
3158 (operator_minus::op1_range): Same.
3159 (operator_minus::op2_range): Same.
3160 (operator_min::wi_fold): Same.
3161 (operator_max::wi_fold): Same.
3162 (cross_product_operator::wi_cross_product): Same.
3163 (operator_mult::op1_range): New.
3164 (operator_mult::op2_range): New.
3165 (operator_mult::wi_fold): Adjust for irange.
3166 (operator_div::wi_fold): Same.
3167 (operator_exact_divide::op1_range): Same.
3168 (operator_lshift::fold_range): Same.
3169 (operator_lshift::wi_fold): Same.
3170 (operator_lshift::op1_range): New.
3171 (operator_rshift::op1_range): New.
3172 (operator_rshift::fold_range): Adjust for irange.
3173 (operator_rshift::wi_fold): Same.
3174 (operator_cast::truncating_cast_p): Abstract out from
3175 operator_cast::fold_range.
3176 (operator_cast::fold_range): Adjust for irange and tweak for
3178 (operator_cast::inside_domain_p): Abstract out from fold_range.
3179 (operator_cast::fold_pair): Same.
3180 (operator_cast::op1_range): Use abstracted methods above. Adjust
3181 for irange and tweak for performance.
3182 (operator_logical_and::fold_range): Adjust for irange.
3183 (operator_logical_and::op1_range): Same.
3184 (operator_logical_and::op2_range): Same.
3185 (unsigned_singleton_p): New.
3186 (operator_bitwise_and::remove_impossible_ranges): New.
3187 (operator_bitwise_and::fold_range): New.
3188 (wi_optimize_and_or): Adjust for irange.
3189 (operator_bitwise_and::wi_fold): Same.
3190 (set_nonzero_range_from_mask): New.
3191 (operator_bitwise_and::simple_op1_range_solver): New.
3192 (operator_bitwise_and::op1_range): Adjust for irange.
3193 (operator_bitwise_and::op2_range): Same.
3194 (operator_logical_or::fold_range): Same.
3195 (operator_logical_or::op1_range): Same.
3196 (operator_logical_or::op2_range): Same.
3197 (operator_bitwise_or::wi_fold): Same.
3198 (operator_bitwise_or::op1_range): Same.
3199 (operator_bitwise_or::op2_range): Same.
3200 (operator_bitwise_xor::wi_fold): Same.
3201 (operator_bitwise_xor::op1_range): New.
3202 (operator_bitwise_xor::op2_range): New.
3203 (operator_trunc_mod::wi_fold): Adjust for irange.
3204 (operator_logical_not::fold_range): Same.
3205 (operator_logical_not::op1_range): Same.
3206 (operator_bitwise_not::fold_range): Same.
3207 (operator_bitwise_not::op1_range): Same.
3208 (operator_cst::fold_range): Same.
3209 (operator_identity::fold_range): Same.
3210 (operator_identity::op1_range): Same.
3211 (class operator_unknown): New.
3212 (operator_unknown::fold_range): New.
3213 (class operator_abs): Adjust for irange.
3214 (operator_abs::wi_fold): Same.
3215 (operator_abs::op1_range): Same.
3216 (operator_absu::wi_fold): Same.
3217 (class operator_negate): Same.
3218 (operator_negate::fold_range): Same.
3219 (operator_negate::op1_range): Same.
3220 (operator_addr_expr::fold_range): Same.
3221 (operator_addr_expr::op1_range): Same.
3222 (pointer_plus_operator::wi_fold): Same.
3223 (pointer_min_max_operator::wi_fold): Same.
3224 (pointer_and_operator::wi_fold): Same.
3225 (pointer_or_operator::op1_range): New.
3226 (pointer_or_operator::op2_range): New.
3227 (pointer_or_operator::wi_fold): Adjust for irange.
3228 (integral_table::integral_table): Add entries for IMAGPART_EXPR
3229 and POINTER_DIFF_EXPR.
3230 (range_cast): Adjust for irange.
3231 (build_range3): New.
3232 (range3_tests): New.
3233 (widest_irange_tests): New.
3234 (multi_precision_range_tests): New.
3235 (operator_tests): New.
3237 * range-op.h (class range_operator): Adjust for irange.
3239 * tree-vrp.c (range_fold_binary_symbolics_p): Adjust for irange and
3240 tweak for performance.
3241 (range_fold_binary_expr): Same.
3242 (masked_increment): Change to extern.
3243 * tree-vrp.h (masked_increment): New.
3244 * tree.c (cache_wide_int_in_type_cache): New function abstracted
3245 out from wide_int_to_tree_1.
3246 (wide_int_to_tree_1): Cache 0, 1, and MAX for pointers.
3247 * value-range-equiv.cc (value_range_equiv::deep_copy): Use kind
3249 (value_range_equiv::move): Same.
3250 (value_range_equiv::check): Adjust for irange.
3251 (value_range_equiv::intersect): Same.
3252 (value_range_equiv::union_): Same.
3253 (value_range_equiv::dump): Same.
3254 * value-range.cc (irange::operator=): Same.
3255 (irange::maybe_anti_range): New.
3256 (irange::copy_legacy_range): New.
3257 (irange::set_undefined): Adjust for irange.
3258 (irange::swap_out_of_order_endpoints): Abstract out from set().
3259 (irange::set_varying): Adjust for irange.
3260 (irange::irange_set): New.
3261 (irange::irange_set_anti_range): New.
3262 (irange::set): Adjust for irange.
3263 (value_range::set_nonzero): Move to header file.
3264 (value_range::set_zero): Move to header file.
3265 (value_range::check): Rename to...
3266 (irange::verify_range): ...this.
3267 (value_range::num_pairs): Rename to...
3268 (irange::legacy_num_pairs): ...this, and adjust for irange.
3269 (value_range::lower_bound): Rename to...
3270 (irange::legacy_lower_bound): ...this, and adjust for irange.
3271 (value_range::upper_bound): Rename to...
3272 (irange::legacy_upper_bound): ...this, and adjust for irange.
3273 (value_range::equal_p): Rename to...
3274 (irange::legacy_equal_p): ...this.
3275 (value_range::operator==): Move to header file.
3276 (irange::equal_p): New.
3277 (irange::symbolic_p): Adjust for irange.
3278 (irange::constant_p): Same.
3279 (irange::singleton_p): Same.
3280 (irange::value_inside_range): Same.
3281 (irange::may_contain_p): Same.
3282 (irange::contains_p): Same.
3283 (irange::normalize_addresses): Same.
3284 (irange::normalize_symbolics): Same.
3285 (irange::legacy_intersect): Same.
3286 (irange::legacy_union): Same.
3287 (irange::union_): Same.
3288 (irange::intersect): Same.
3289 (irange::irange_union): New.
3290 (irange::irange_intersect): New.
3291 (subtract_one): New.
3292 (irange::invert): Adjust for irange.
3293 (dump_bound_with_infinite_markers): New.
3294 (irange::dump): Adjust for irange.
3295 (debug): Add irange versions.
3296 (range_has_numeric_bounds_p): Adjust for irange.
3297 (vrp_val_max): Move to header file.
3298 (vrp_val_min): Move to header file.
3299 (DEFINE_INT_RANGE_GC_STUBS): New.
3300 (DEFINE_INT_RANGE_INSTANCE): New.
3301 * value-range.h (class irange): New.
3302 (class int_range): New.
3303 (class value_range): Rename to a instantiation of int_range.
3304 (irange::legacy_mode_p): New.
3305 (value_range::value_range): Remove.
3306 (irange::kind): New.
3307 (irange::num_pairs): Adjust for irange.
3308 (irange::type): Adjust for irange.
3309 (irange::tree_lower_bound): New.
3310 (irange::tree_upper_bound): New.
3311 (irange::type): Adjust for irange.
3312 (irange::min): Same.
3313 (irange::max): Same.
3314 (irange::varying_p): Same.
3315 (irange::undefined_p): Same.
3316 (irange::zero_p): Same.
3317 (irange::nonzero_p): Same.
3318 (irange::supports_type_p): Same.
3319 (range_includes_zero_p): Same.
3322 (irange::irange): New.
3323 (int_range::int_range): New.
3324 (int_range::operator=): New.
3325 (irange::set): Moved from value-range.cc and adjusted for irange.
3326 (irange::set_undefined): Same.
3327 (irange::set_varying): Same.
3328 (irange::operator==): Same.
3329 (irange::lower_bound): Same.
3330 (irange::upper_bound): Same.
3331 (irange::union_): Same.
3332 (irange::intersect): Same.
3333 (irange::set_nonzero): Same.
3334 (irange::set_zero): Same.
3335 (irange::normalize_min_max): New.
3336 (vrp_val_max): Move from value-range.cc.
3337 (vrp_val_min): Same.
3338 * vr-values.c (vr_values::get_lattice_entry): Call value_range
3341 2020-08-02 Sergei Trofimovich <siarheit@google.com>
3344 * var-tracking.c (vt_find_locations): Fully initialize
3345 all 'in_pending' bits.
3347 2020-08-01 Jan Hubicka <jh@suse.cz>
3349 * symtab.c (symtab_node::verify_base): Verify order.
3350 (symtab_node::verify_symtab_nodes): Verify order.
3352 2020-08-01 Jan Hubicka <jh@suse.cz>
3354 * predict.c (estimate_bb_frequencies): Cap recursive calls by 90%.
3356 2020-08-01 Jojo R <jiejie_rong@c-sky.com>
3358 * config/csky/csky_opts.h (float_abi_type): New.
3359 * config/csky/csky.h (TARGET_SOFT_FLOAT): New.
3360 (TARGET_HARD_FLOAT): New.
3361 (TARGET_HARD_FLOAT_ABI): New.
3362 (OPTION_DEFAULT_SPECS): Use mfloat-abi.
3363 * config/csky/csky.opt (mfloat-abi): New.
3364 * doc/invoke.texi (C-SKY Options): Document -mfloat-abi=.
3366 2020-08-01 Cooper Qu <cooper.qu@linux.alibaba.com>
3368 * config/csky/t-csky-linux: Delete big endian CPUs' multilib.
3370 2020-07-31 Roger Sayle <roger@nextmovesoftware.com>
3371 Tom de Vries <tdevries@suse.de>
3374 * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement.
3375 (TARGET_TRULY_NOOP_TRUNCATION): Define.
3377 2020-07-31 Richard Biener <rguenther@suse.de>
3380 * langhooks-def.h (lhd_finalize_early_debug): Declare.
3381 (LANG_HOOKS_FINALIZE_EARLY_DEBUG): Define.
3382 (LANG_HOOKS_INITIALIZER): Amend.
3383 * langhooks.c: Include cgraph.h and debug.h.
3384 (lhd_finalize_early_debug): Default implementation from
3385 former code in finalize_compilation_unit.
3386 * langhooks.h (lang_hooks::finalize_early_debug): Add.
3387 * cgraphunit.c (symbol_table::finalize_compilation_unit):
3388 Call the finalize_early_debug langhook.
3390 2020-07-31 Richard Biener <rguenther@suse.de>
3392 * genmatch.c (expr::force_leaf): Add and initialize.
3393 (expr::gen_transform): Honor force_leaf by passing
3394 NULL as sequence argument to maybe_push_res_to_seq.
3395 (parser::parse_expr): Allow ! marker on result expression
3397 * doc/match-and-simplify.texi: Amend.
3399 2020-07-31 Kewen Lin <linkw@linux.ibm.com>
3401 * tree-vect-loop.c (vect_get_known_peeling_cost): Don't consider branch
3402 taken costs for prologue and epilogue if they don't exist.
3403 (vect_estimate_min_profitable_iters): Likewise.
3405 2020-07-31 Martin Liska <mliska@suse.cz>
3407 * cgraph.h: Remove leading empty lines.
3408 * cgraphunit.c (enum cgraph_order_sort_kind): Remove
3410 (struct cgraph_order_sort): Add constructors.
3411 (cgraph_order_sort::process): New.
3412 (cgraph_order_cmp): New.
3413 (output_in_order): Simplify and push nodes to vector.
3415 2020-07-31 Richard Biener <rguenther@suse.de>
3418 * fold-const.c (fold_range_test): Special-case constant
3419 LHS for short-circuiting operations.
3421 2020-07-31 Martin Liska <mliska@suse.cz>
3423 * gcov-io.h (GCOV_PREALLOCATED_KVP): New.
3425 2020-07-31 Zhiheng Xie <xiezhiheng@huawei.com>
3427 * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
3428 Add new argument ATTRS.
3429 (aarch64_call_properties): New function.
3430 (aarch64_modifies_global_state_p): Likewise.
3431 (aarch64_reads_global_state_p): Likewise.
3432 (aarch64_could_trap_p): Likewise.
3433 (aarch64_add_attribute): Likewise.
3434 (aarch64_get_attributes): Likewise.
3435 (aarch64_init_simd_builtins): Add attributes for each built-in function.
3437 2020-07-31 Richard Biener <rguenther@suse.de>
3440 * var-tracking.c (vt_find_locations): Use
3441 rev_post_order_and_mark_dfs_back_seme and separately iterate
3444 2020-07-31 Richard Biener <rguenther@suse.de>
3446 * cfganal.h (rev_post_order_and_mark_dfs_back_seme): Adjust
3448 * cfganal.c (rpoamdbs_bb_data): New struct with pre BB data.
3449 (tag_header): New helper.
3450 (cmp_edge_dest_pre): Likewise.
3451 (rev_post_order_and_mark_dfs_back_seme): Compute SCCs,
3452 find SCC exits and perform a DFS walk with extra edges to
3453 compute a RPO with adjacent SCC members when requesting an
3454 iteration optimized order and populate the toplevel SCC array.
3455 * tree-ssa-sccvn.c (do_rpo_vn): Remove ad-hoc computation
3456 of max_rpo and fill it in from SCC extent info instead.
3458 2020-07-30 Will Schmidt <will_schmidt@vnet.ibm.com>
3460 * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define.
3461 (vec_test_lsbb_all_zeros): New define.
3462 * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in
3464 (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines.
3465 (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads.
3466 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS,
3467 P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries.
3468 * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec.
3469 * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define.
3470 (xvtlsbbo, xvtlsbbz): New instruction expands.
3472 2020-07-30 Cooper Qu <cooper.qu@linux.alibaba.com>
3474 * config/riscv/riscv-opts.h (stack_protector_guard): New enum.
3475 * config/riscv/riscv.c (riscv_option_override): Handle
3477 * config/riscv/riscv.md (stack_protect_set): New pattern to handle
3478 flexible stack protector guard settings.
3479 (stack_protect_set_<mode>): Ditto.
3480 (stack_protect_test): Ditto.
3481 (stack_protect_test_<mode>): Ditto.
3482 * config/riscv/riscv.opt (mstack-protector-guard=,
3483 mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
3485 * doc/invoke.texi (Option Summary) [RISC-V Options]:
3486 Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
3487 -mstack-protector-guard-offset=.
3488 (RISC-V Options): Ditto.
3490 2020-07-30 H.J. Lu <hjl.tools@gmail.com>
3493 * configure: Regenerated.
3495 2020-07-30 Richard Biener <rguenther@suse.de>
3497 PR tree-optimization/96370
3498 * tree-ssa-reassoc.c (rewrite_expr_tree): Add operation
3499 code parameter and use it instead of picking it up from
3500 the stmt that is being rewritten.
3501 (reassociate_bb): Pass down the operation code.
3503 2020-07-30 Roger Sayle <roger@nextmovesoftware.com>
3504 Tom de Vries <tdevries@suse.de>
3506 * config/nvptx/nvptx.md (nvptx_vector_index_operand): New predicate.
3507 (VECELEM): New mode attribute for a vector's uppercase element mode.
3508 (Vecelem): New mode attribute for a vector's lowercase element mode.
3509 (*vec_set<mode>_0, *vec_set<mode>_1, *vec_set<mode>_2)
3510 (*vec_set<mode>_3): New instructions.
3511 (vec_set<mode>): New expander to generate one of the above insns.
3512 (vec_extract<mode><Vecelem>): New instruction.
3514 2020-07-30 Martin Liska <mliska@suse.cz>
3517 * config/i386/x86-tune-costs.h: Use libcall for large sizes for
3518 -m32. Start using libcall from 128+ bytes.
3520 2020-07-30 Martin Liska <mliska@suse.cz>
3522 * config/i386/x86-tune-costs.h: Change code formatting.
3524 2020-07-29 Roger Sayle <roger@nextmovesoftware.com>
3526 * config/nvptx/nvptx.md (recip<mode>2): New instruction.
3528 2020-07-29 Fangrui Song <maskray@google.com>
3531 * opts.c (common_handle_option): Don't make -gsplit-dwarf imply -g.
3532 * doc/invoke.texi (-gsplit-dwarf): Update documentation.
3534 2020-07-29 Joe Ramsay <joe.ramsay@arm.com>
3536 * config/arm/arm-protos.h (arm_coproc_mem_operand_no_writeback):
3538 (arm_mve_mode_and_operands_type_check): Declare prototype.
3539 * config/arm/arm.c (arm_coproc_mem_operand): Refactor to use
3540 _arm_coproc_mem_operand.
3541 (arm_coproc_mem_operand_wb): New function to cover full, limited
3543 (arm_coproc_mem_operand_no_writeback): New constraint for memory
3544 operand with no writeback.
3545 (arm_print_operand): Extend 'E' specifier for memory operand
3546 that does not support writeback.
3547 (arm_mve_mode_and_operands_type_check): New constraint check for
3548 MVE memory operands.
3549 * config/arm/constraints.md: Add Uj constraint for VFP vldr.16
3551 * config/arm/vfp.md (*mov_load_vfp_hf16): New pattern for
3553 (*mov_store_vfp_hf16): New pattern for vstr.16.
3554 (*mov<mode>_vfp_<mode>16): Remove MVE moves.
3556 2020-07-29 Richard Biener <rguenther@suse.de>
3558 PR tree-optimization/96349
3559 * tree-ssa-loop-split.c (stmt_semi_invariant_p_1): When the
3560 condition runs into a loop PHI with an abnormal entry value give up.
3562 2020-07-29 Richard Biener <rguenther@suse.de>
3564 * tree-vectorizer.c (vectorize_loops): Reset the SCEV
3565 cache if we removed any SIMD UID SSA defs.
3566 * gimple-loop-interchange.cc (pass_linterchange::execute):
3567 Reset the scev cache if we interchanged a loop.
3569 2020-07-29 Richard Biener <rguenther@suse.de>
3571 PR tree-optimization/95679
3572 * tree-ssa-propagate.h
3573 (substitute_and_fold_engine::propagate_into_phi_args): Return
3574 whether anything changed.
3575 * tree-ssa-propagate.c
3576 (substitute_and_fold_engine::propagate_into_phi_args): Likewise.
3577 (substitute_and_fold_dom_walker::before_dom_children): Update
3580 2020-07-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3582 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
3583 Ensure that loop variable npeel_tmp advances in each iteration.
3585 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
3587 * config/mmix/mmix.h (NO_FUNCTION_CSE): Define to 1.
3589 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
3591 * config/mmix/mmix.h (ASM_OUTPUT_EXTERNAL): Define to
3592 default_elf_asm_output_external.
3594 2020-07-28 Sergei Trofimovich <siarheit@google.com>
3597 * ipa-cp.c (has_undead_caller_from_outside_scc_p): Consider
3598 unoptimized callers as undead.
3600 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
3601 Richard Biener <rguenther@suse.de>
3603 * match.pd (popcount(x)&1 -> parity(x)): New simplification.
3604 (parity(~x) -> parity(x)): New simplification.
3605 (parity(x)^parity(y) -> parity(x^y)): New simplification.
3606 (parity(x&1) -> x&1): New simplification.
3607 (popcount(x) -> x>>C): New simplification.
3609 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
3610 Tom de Vries <tdevries@suse.de>
3612 * config/nvptx/nvptx.md (extendqihi2): New instruction.
3613 (ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode.
3615 2020-07-28 Jakub Jelinek <jakub@redhat.com>
3618 * calls.c (maybe_warn_rdwr_sizes): Add FNDECL and FNTYPE arguments,
3619 instead of trying to rediscover them in the body.
3620 (initialize_argument_information): Adjust caller.
3622 2020-07-28 Kewen Lin <linkw@linux.ibm.com>
3624 * tree-vect-loop.c (vect_get_known_peeling_cost): Factor out some code
3625 to determine peel_iters_epilogue to...
3626 (vect_get_peel_iters_epilogue): ...this new function.
3627 (vect_estimate_min_profitable_iters): Refactor cost calculation on
3628 peel_iters_prologue and peel_iters_epilogue.
3630 2020-07-27 Martin Sebor <msebor@redhat.com>
3632 PR tree-optimization/84079
3633 * gimple-array-bounds.cc (array_bounds_checker::check_addr_expr):
3634 Only allow just-past-the-end references for the most significant
3637 2020-07-27 Hu Jiangping <hujiangping@cn.fujitsu.com>
3640 * opts.c (check_alignment_argument): Set the -falign-Name
3641 on/off flag on and set the -falign-Name string value null,
3642 when the command-line specified argument is zero.
3644 2020-07-27 Martin Liska <mliska@suse.cz>
3646 PR tree-optimization/96058
3647 * expr.c (string_constant): Build string_constant only
3648 for a type that has same precision as char_type_node
3649 and is an integral type.
3651 2020-07-27 Richard Biener <rguenther@suse.de>
3653 * var-tracking.c (variable_tracking_main_1): Remove call
3654 to mark_dfs_back_edges.
3656 2020-07-27 Martin Liska <mliska@suse.cz>
3658 PR tree-optimization/96128
3659 * tree-vect-generic.c (expand_vector_comparison): Do not expand
3660 vector comparison with VEC_COND_EXPR.
3662 2020-07-27 H.J. Lu <hjl.tools@gmail.com>
3665 * common.opt: Add -fcf-protection=check.
3666 * flag-types.h (cf_protection_level): Add CF_CHECK.
3667 * lto-wrapper.c (merge_and_complain): Issue an error for
3668 mismatching -fcf-protection values with -fcf-protection=check.
3669 Otherwise, merge -fcf-protection values.
3670 * doc/invoke.texi: Document -fcf-protection=check.
3672 2020-07-27 Martin Liska <mliska@suse.cz>
3675 * symbol-summary.h: Call vec_safe_reserve before grow is called
3676 in order to grow to a reasonable size.
3677 * vec.h (vec_safe_reserve): Add missing function for vl_ptr
3680 2020-07-26 Hans-Peter Nilsson <hp@bitrange.com>
3682 * configure.ac (out-of-tree linker .hidden support): Don't turn off
3683 for mmix-knuth-mmixware.
3684 * configure: Regenerate.
3686 2020-07-26 Aaron Sawdey <acsawdey@linux.ibm.com>
3688 * config/rs6000/rs6000.c (rs6000_option_override_internal):
3689 Set the default value for -mblock-ops-unaligned-vsx.
3690 * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx.
3691 * doc/invoke.texi: Document -mblock-ops-unaligned-vsx.
3693 2020-07-25 Hans-Peter Nilsson <hp@bitrange.com>
3695 * config/mmix/mmix.c (TARGET_ASM_OUTPUT_IDENT): Override the default
3696 with default_asm_output_ident_directive.
3698 2020-07-25 Andrew Stubbs <ams@codesourcery.com>
3700 * config/gcn/gcn.c (gcn_scalar_mode_supported_p): New function.
3701 (TARGET_SCALAR_MODE_SUPPORTED_P): New define.
3703 2020-07-24 David Edelsohn <dje.gcc@gmail.com>
3704 Clement Chigot <clement.chigot@atos.net>
3706 * config.gcc (powerpc-ibm-aix7.1): Use t-aix64 and biarch64 for
3708 * config/rs6000/aix71.h (ASM_SPEC): Remove aix64 option.
3711 (ASM_CPU_SPEC): Remove vsx and altivec options.
3712 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
3715 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
3716 (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
3717 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
3720 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
3723 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
3724 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
3726 (CPLUSPLUS_CPP_SPEC): Same.
3729 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
3730 * config/rs6000/aix72.h (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
3731 * config/rs6000/defaultaix64.h: Delete.
3733 2020-07-24 Segher Boessenkool <segher@kernel.crashing.org>
3735 * config/rs6000/rs6000.opt: Delete -mpower10.
3737 2020-07-24 Alexandre Oliva <oliva@adacore.com>
3739 * config/i386/intelmic-mkoffload.c
3740 (generate_target_descr_file): Use dumppfx for save_temps
3741 files. Pass -dumpbase et al down to the compiler.
3742 (generate_target_offloadend_file): Likewise.
3743 (generate_host_descr_file): Likewise.
3744 (prepare_target_image): Likewise. Move out_obj_filename
3746 (main): ... here. Detect -dumpbase, set dumppfx too.
3748 2020-07-24 Alexandre Oliva <oliva@adacore.com>
3751 * gcc.c (process_command): Adjust and document conditions to
3754 2020-07-24 Matthias Klose <doko@ubuntu.com>
3756 * config/aarch64/aarch64.c (+aarch64_offload_options,
3757 TARGET_OFFLOAD_OPTIONS): New.
3759 2020-07-24 Uroš Bizjak <ubizjak@gmail.com>
3762 * config/i386/sync.md (mmem_thread_fence): Emit mfence_sse2 for -Os.
3764 2020-07-23 Roger Sayle <roger@nextmovesoftware.com>
3766 PR rtl-optimization/96298
3767 * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't
3768 distribute over xor, so (a^b)^(c^b) is not the same as (a^c)^b.
3770 2020-07-23 Dong JianQiang <dongjianqiang2@huawei.com>
3772 PR gcov-profile/96267
3773 * gcov-io.c (gcov_open): enable if IN_GCOV_TOOL.
3775 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
3777 * config/rs6000/rs6000.c (adjust_vectorization_cost): Renamed to ...
3778 (rs6000_adjust_vect_cost_per_stmt): ... here.
3779 (rs6000_add_stmt_cost): Rename adjust_vectorization_cost to
3780 rs6000_adjust_vect_cost_per_stmt.
3782 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
3784 * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
3785 IFN_LEN_LOAD and IFN_LEN_STORE.
3786 (get_alias_ptr_type_for_ptr_address): Likewise.
3788 2020-07-23 Kito Cheng <kito.cheng@sifive.com>
3791 * asan.c (asan_shadow_offset_set_p): New.
3792 * asan.h (asan_shadow_offset_set_p): Ditto.
3793 * toplev.c (process_options): Allow -fsanitize=kernel-address
3794 even TARGET_ASAN_SHADOW_OFFSET not implemented, only check when
3795 asan stack protection is enabled.
3797 2020-07-22 Peter Bergner <bergner@linux.ibm.com>
3800 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Handle
3801 little-endian memory ordering.
3803 2020-07-22 Nathan Sidwell <nathan@acm.org>
3805 * dumpfile.c (parse_dump_option): Deal with filenames
3808 2020-07-22 Nathan Sidwell <nathan@acm.org>
3810 * incpath.c (add_path): Avoid multiple strlen calls.
3812 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3814 * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag
3815 is not NULL_RTX before use.
3817 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3819 * expr.c (convert_modes): Allow a constant integer to be converted to
3820 any scalar int mode.
3822 2020-07-22 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
3824 * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector
3825 V2SI, V2SF, V2DI, V2DF load pair and store pair modes.
3826 * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
3827 Change mode parameter to machine_mode.
3828 (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to
3830 * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
3831 Change mode parameter to machine_mode.
3832 (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode.
3833 * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors.
3835 2020-07-22 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
3837 * doc/languages.texi: Fix “then”/“than” typo.
3839 2020-07-21 Sunil K Pandey <skpgkp2@gmail.com>
3842 * config/i386/i386-protos.h (ix86_local_alignment): Add
3843 another function parameter may_lower alignment. Default is
3845 * config/i386/i386.c (ix86_lower_local_decl_alignment): New
3847 (ix86_local_alignment): Amend ix86_local_alignment to accept
3848 another parameter may_lower. If may_lower is true, new align
3849 may be lower than incoming alignment. If may_lower is false,
3850 new align will be greater or equal to incoming alignment.
3851 (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define.
3852 * doc/tm.texi: Regenerate.
3853 * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New
3855 * target.def (lower_local_decl_alignment): New hook.
3857 2020-07-21 Uroš Bizjak <ubizjak@gmail.com>
3860 * config/i386/sync.md (mfence_sse2): Enable for
3861 TARGET_64BIT and TARGET_SSE2.
3862 (mfence_nosse): Always enable.
3864 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3866 * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps):
3868 * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise.
3869 * config/msp430/msp430.md (cbranchhi4_real): Remove special case for
3870 msp430_do_not_relax_short_jumps.
3872 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3874 * config/msp430/msp430.md: New "extendqipsi2" define_insn.
3876 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3878 * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and
3881 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com>
3883 PR rtl-optimization/89310
3884 * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split.
3886 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
3888 * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total
3889 allocated size and set current_function_static_stack_size, if
3890 flag_stack_usage_info.
3892 2020-07-20 Sergei Trofimovich <siarheit@google.com>
3895 * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC
3896 to get crtendS.o for !no-pie mode.
3897 * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
3899 2020-07-20 Yang Yang <yangyang305@huawei.com>
3901 * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
3902 VIEW_CONVERT_EXPRs if the arguments types and return type
3903 of simd clone function are distinct with the vectype of stmt.
3905 2020-07-20 Uroš Bizjak <ubizjak@gmail.com>
3908 * config/i386/i386.h (TARGET_AVOID_MFENCE):
3909 Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE.
3910 * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE.
3911 (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack
3912 referred memory in word_mode.
3913 (mem_thread_fence): Do not generate mfence_sse2 pattern when
3914 TARGET_AVOID_MFENCE is true.
3915 (atomic_store<mode>): Update for rename.
3916 * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE):
3917 Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE.
3919 2020-07-20 Martin Sebor <msebor@redhat.com>
3923 * builtins.c (inline_expand_builtin_string_cmp): Rename...
3924 (inline_expand_builtin_bytecmp): ...to this.
3925 (builtin_memcpy_read_str): Don't expect data to be nul-terminated.
3926 (expand_builtin_memory_copy_args): Handle object representations
3927 with embedded nul bytes.
3928 (expand_builtin_memcmp): Same.
3929 (expand_builtin_strcmp): Adjust call to naming change.
3930 (expand_builtin_strncmp): Same.
3931 * expr.c (string_constant): Create empty strings with nonzero size.
3932 * fold-const.c (c_getstr): Rename locals and update comments.
3933 * tree.c (build_string): Accept null pointer argument.
3934 (build_string_literal): Same.
3935 * tree.h (build_string): Provide a default.
3936 (build_string_literal): Same.
3938 2020-07-20 Richard Biener <rguenther@suse.de>
3940 * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove
3941 write-only post array.
3943 2020-07-20 Jakub Jelinek <jakub@redhat.com>
3946 * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF
3947 of a bitfield not aligned on byte boundaries try to
3948 fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and
3949 adjust it depending on endianity.
3951 2020-07-20 Jakub Jelinek <jakub@redhat.com>
3954 * fold-const.c (native_encode_initializer): Handle bit-fields.
3956 2020-07-20 Kewen Lin <linkw@linux.ibm.com>
3958 * config/rs6000/rs6000.c (rs6000_option_override_internal):
3959 Set param_vect_partial_vector_usage to 0 explicitly.
3960 * doc/invoke.texi (vect-partial-vector-usage): Document new option.
3961 * optabs-query.c (get_len_load_store_mode): New function.
3962 * optabs-query.h (get_len_load_store_mode): New declare.
3963 * params.opt (vect-partial-vector-usage): New.
3964 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the
3965 handlings for vectorization using length-based partial vectors, call
3966 vect_gen_len for length generation, and rename some variables with
3967 items instead of scalars.
3968 (vect_set_loop_condition_partial_vectors): Add the handlings for
3969 vectorization using length-based partial vectors.
3970 (vect_do_peeling): Allow remaining eiters less than epilogue vf for
3971 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
3972 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init
3973 epil_using_partial_vectors_p.
3974 (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls
3975 for lengths destruction.
3976 (vect_verify_loop_lens): New function.
3977 (vect_analyze_loop): Add handlings for epilogue of loop when it's
3978 marked to use vectorization using partial vectors.
3979 (vect_analyze_loop_2): Add the check to allow only one vectorization
3980 approach using partial vectorization at the same time. Check param
3981 vect-partial-vector-usage for partial vectors decision. Mark
3982 LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is
3983 considerable to use partial vectors. Call release_vec_loop_controls
3984 for lengths destruction.
3985 (vect_estimate_min_profitable_iters): Adjust for loop vectorization
3986 using length-based partial vectors.
3987 (vect_record_loop_mask): Init factor to 1 for vectorization using
3988 mask-based partial vectors.
3989 (vect_record_loop_len): New function.
3990 (vect_get_loop_len): Likewise.
3991 * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add
3992 checks for vectorization using length-based partial vectors. Factor
3993 some code to lambda function get_valid_nvectors.
3994 (vectorizable_store): Add handlings when using length-based partial
3996 (vectorizable_load): Likewise.
3997 (vect_gen_len): New function.
3998 * tree-vectorizer.h (struct rgroup_controls): Add field factor
3999 mainly for length-based partial vectors.
4000 (vec_loop_lens): New typedef.
4001 (_loop_vec_info): Add lens and epil_using_partial_vectors_p.
4002 (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro.
4003 (LOOP_VINFO_LENS): Likewise.
4004 (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise.
4005 (vect_record_loop_len): New declare.
4006 (vect_get_loop_len): Likewise.
4007 (vect_gen_len): Likewise.
4009 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
4011 * config/mmix/mmix.c (mmix_option_override): Reinstate default
4012 integer-emitting targetm.asm_out pseudos when dumping detailed
4014 (mmix_assemble_integer): Update comment.
4016 2020-07-19 H.J. Lu <hjl.tools@gmail.com>
4020 * config/i386/cpuid.h: Add include guard.
4023 2020-07-18 H.J. Lu <hjl.tools@gmail.com>
4026 * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
4028 2020-07-18 Peter Bergner <bergner@linux.ibm.com>
4031 * config/rs6000/dfp.md (trunctdsd2): New define_insn.
4032 * config/rs6000/rs6000.md (define_attr "isa"): Add p9.
4033 (define_attr "enabled"): Handle p9.
4035 2020-07-17 Roger Sayle <roger@nextmovesoftware.com>
4037 * function.c (assign_parm_setup_block): Use the macro
4038 TRULY_NOOP_TRUNCATION_MODES_P instead of calling
4039 targetm.truly_noop_truncation directly.
4041 2020-07-17 H.J. Lu <hjl.tools@gmail.com>
4045 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
4046 (VF1_AVX512ER_128_256): This. Drop DF vector modes.
4047 (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
4048 VF1_AVX512ER_128_256.
4050 2020-07-17 Tamar Christina <tamar.christina@arm.com>
4052 * doc/sourcebuild.texi (dg-set-compiler-env-var,
4053 dg-set-target-env-var): Document.
4055 2020-07-17 Tamar Christina <tamar.christina@arm.com>
4057 * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
4059 2020-07-17 Tamar Christina <tamar.christina@arm.com>
4061 * config/aarch64/driver-aarch64.c (host_detect_local_cpu):
4064 2020-07-17 Tamar Christina <tamar.christina@arm.com>
4066 * config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
4067 (parse_field): Use std::string.
4068 (split_words, readline, find_field): New.
4069 (host_detect_local_cpu): Fix truncation issues.
4071 2020-07-17 Andrew Stubbs <ams@codesourcery.com>
4073 * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining.
4074 (ELFOSABI_AMDGPU_HSA): Likewise.
4075 (ELFABIVERSION_AMDGPU_HSA): Likewise.
4076 (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise.
4077 (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise.
4078 (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise.
4081 2020-07-17 Andrew Pinski <apinksi@marvell.com>
4082 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
4085 * config/aarch64/aarch64.c (aarch64_evpc_ins): New function.
4086 (aarch64_expand_vec_perm_const_1): Call it.
4087 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make
4088 public, and add a "@" prefix.
4090 2020-07-17 Andrew Pinski <apinksi@marvell.com>
4091 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
4094 * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function.
4095 (aarch64_expand_vec_perm_const_1): Call it.
4097 2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com>
4099 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
4100 Add new field flags.
4101 (VAR1): Add new field FLAG in macro.
4117 (aarch64_general_fold_builtin): Likewise.
4118 (aarch64_general_gimple_fold_builtin): Likewise.
4119 * config/aarch64/aarch64-simd-builtins.def: Add default flag for
4120 each built-in function.
4121 * config/aarch64/geniterators.sh: Add new field in BUILTIN macro.
4123 2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com>
4126 * config/s390/s390.c (s390_expand_insv): Invoke the movstrict
4127 expanders to generate the pattern.
4128 * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the
4129 '*' to have callable expanders.
4131 2020-07-16 Hans-Peter Nilsson <hp@axis.com>
4132 Segher Boessenkool <segher@kernel.crashing.org>
4135 * combine.c (is_just_move): Take an rtx_insn* as argument. Use
4138 2020-07-16 Uroš Bizjak <ubizjak@gmail.com>
4141 * config/i386/sync.md
4142 (peephole2 to remove unneded compare after CMPXCHG):
4143 New pattern, also handle XOR zeroing and load of -1 by OR.
4145 2020-07-16 Eric Botcazou <ebotcazou@adacore.com>
4147 * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak.
4148 (ix86_adjust_stack_and_probe): Delete.
4149 (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add
4150 PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus
4151 a small dope beyond SIZE bytes.
4152 (ix86_emit_probe_stack_range): Use local variable.
4153 (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe
4154 and tidy up the stack checking code.
4155 * explow.c (get_stack_check_protect): Fix head comment.
4156 (anti_adjust_stack_and_probe_stack_clash): Likewise.
4157 (allocate_dynamic_stack_space): Add comment.
4158 * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and
4159 TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field.
4161 2020-07-16 Andrew Stubbs <ams@codesourcery.com>
4163 * config/gcn/mkoffload.c: Include simple-object.h and elf.h.
4164 (EM_AMDGPU): New macro.
4165 (ELFOSABI_AMDGPU_HSA): New macro.
4166 (ELFABIVERSION_AMDGPU_HSA): New macro.
4167 (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro.
4168 (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro.
4169 (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro.
4170 (R_AMDGPU_NONE): New macro.
4171 (R_AMDGPU_ABS32_LO): New macro.
4172 (R_AMDGPU_ABS32_HI): New macro.
4173 (R_AMDGPU_ABS64): New macro.
4174 (R_AMDGPU_REL32): New macro.
4175 (R_AMDGPU_REL64): New macro.
4176 (R_AMDGPU_ABS32): New macro.
4177 (R_AMDGPU_GOTPCREL): New macro.
4178 (R_AMDGPU_GOTPCREL32_LO): New macro.
4179 (R_AMDGPU_GOTPCREL32_HI): New macro.
4180 (R_AMDGPU_REL32_LO): New macro.
4181 (R_AMDGPU_REL32_HI): New macro.
4182 (reserved): New macro.
4183 (R_AMDGPU_RELATIVE64): New macro.
4184 (gcn_s1_name): Delete global variable.
4185 (gcn_s2_name): Delete global variable.
4186 (gcn_o_name): Delete global variable.
4187 (gcn_cfile_name): Delete global variable.
4188 (files_to_cleanup): New global variable.
4189 (offload_abi): New global variable.
4190 (tool_cleanup): Use files_to_cleanup, not explicit list.
4191 (copy_early_debug_info): New function.
4192 (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name,
4194 Create files_to_cleanup obstack.
4195 Recognize -march options.
4196 Copy early debug info from input .o files.
4198 2020-07-16 Andrea Corallo <andrea.corallo@arm.com>
4200 * Makefile.in (TAGS): Remove 'params.def'.
4202 2020-07-16 Roger Sayle <roger@nextmovesoftware.com>
4204 * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that
4205 targets that return false, indicating SUBREGs shouldn't be
4206 used, also need to provide a trunc?i?i2 optab that performs this
4208 * doc/tm.texi: Regenerate.
4210 2020-07-15 Uroš Bizjak <ubizjak@gmail.com>
4213 * config/i386/sync.md
4214 (peephole2 to remove unneded compare after CMPXCHG): New pattern.
4216 2020-07-15 Jakub Jelinek <jakub@redhat.com>
4219 * omp-general.h (struct omp_for_data): Rename min_inner_iterations
4220 member to first_inner_iterations, adjust comment.
4221 * omp-general.c (omp_extract_for_data): Adjust for the above change.
4222 Always use n1first and n2first to compute it, rather than depending
4223 on single_nonrect_cond_code. Similarly, always compute factor
4224 as (m2 - m1) * outer_step / inner_step rather than sometimes m1 - m2
4225 depending on single_nonrect_cond_code.
4226 * omp-expand.c (expand_omp_for_init_vars): Rename min_inner_iterations
4227 to first_inner_iterations and min_inner_iterationsd to
4228 first_inner_iterationsd.
4230 2020-07-15 Jakub Jelinek <jakub@redhat.com>
4233 * config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
4234 _mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask,
4235 _mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask,
4236 _mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask,
4237 _mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask,
4238 _mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask,
4239 _mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask,
4240 _mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask,
4241 _mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask,
4242 _mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask,
4243 _mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask,
4244 _mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask,
4245 _mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask,
4246 _mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask,
4247 _mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask,
4248 _mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask,
4249 _mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded
4252 2020-07-15 Jakub Jelinek <jakub@redhat.com>
4255 * builtins.c: Include gimple-ssa.h, tree-ssa-live.h and
4257 (expand_expr_force_mode): If exp is a SSA_NAME with different mode
4258 from MODE and get_gimple_for_ssa_name is a cast from MODE, use the
4261 2020-07-15 Jiufu Guo <guojiufu@cn.ibm.com>
4263 * config/rs6000/rs6000.c (rs6000_loop_unroll_adjust): Refine hook.
4265 2020-07-14 David Edelsohn <dje.gcc@gmail.com>
4267 * config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64
4269 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add
4270 TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case.
4272 2020-07-14 Lewis Hyatt <lhyatt@gmail.com>
4274 PR preprocessor/49973
4276 * common.opt: Handle -ftabstop here instead of in c-family
4277 options. Add -fdiagnostics-column-unit= and
4278 -fdiagnostics-column-origin= options.
4279 * opts.c (common_handle_option): Handle the new options.
4280 * diagnostic-format-json.cc (json_from_expanded_location): Add
4281 diagnostic_context argument. Use it to convert column numbers as per
4283 (json_from_location_range): Likewise.
4284 (json_from_fixit_hint): Likewise.
4285 (json_end_diagnostic): Pass the new context argument to helper
4286 functions above. Add "column-origin" field to the output.
4287 (test_unknown_location): Add the new context argument to calls to
4289 (test_bad_endpoints): Likewise.
4290 * diagnostic-show-locus.c
4291 (exploc_with_display_col::exploc_with_display_col): Support
4293 (layout_point::layout_point): Make use of class
4294 exploc_with_display_col.
4295 (layout_range::layout_range): Likewise.
4296 (struct line_bounds): Clarify that the units are now always
4297 display columns. Rename members accordingly. Add constructor.
4298 (layout::print_source_line): Add support for tab expansion.
4299 (make_range): Adapt to class layout_range changes.
4300 (layout::maybe_add_location_range): Likewise.
4301 (layout::layout): Adapt to class exploc_with_display_col changes.
4302 (layout::calculate_x_offset_display): Support tabstop parameter.
4303 (layout::print_annotation_line): Adapt to struct line_bounds changes.
4304 (layout::print_line): Likewise.
4305 (line_label::line_label): Add diagnostic_context argument.
4306 (get_affected_range): Likewise.
4307 (get_printed_columns): Likewise.
4308 (layout::print_any_labels): Adapt to struct line_label changes.
4309 (class correction): Add m_tabstop member.
4310 (correction::correction): Add tabstop argument.
4311 (correction::compute_display_cols): Use m_tabstop.
4312 (class line_corrections): Add m_context member.
4313 (line_corrections::line_corrections): Add diagnostic_context argument.
4314 (line_corrections::add_hint): Use m_context to handle tabstops.
4315 (layout::print_trailing_fixits): Adapt to class line_corrections
4317 (test_layout_x_offset_display_utf8): Support tabstop parameter.
4318 (test_layout_x_offset_display_tab): New selftest.
4319 (test_one_liner_colorized_utf8): Likewise.
4320 (test_tab_expansion): Likewise.
4321 (test_diagnostic_show_locus_one_liner_utf8): Call the new tests.
4322 (diagnostic_show_locus_c_tests): Likewise.
4323 (test_overlapped_fixit_printing): Adapt to helper class and
4325 (test_overlapped_fixit_printing_utf8): Likewise.
4326 (test_overlapped_fixit_printing_2): Likewise.
4327 * diagnostic.h (enum diagnostics_column_unit): New enum.
4328 (struct diagnostic_context): Add members for the new options.
4329 (diagnostic_converted_column): Declare.
4330 (json_from_expanded_location): Add new context argument.
4331 * diagnostic.c (diagnostic_initialize): Initialize new members.
4332 (diagnostic_converted_column): New function.
4333 (maybe_line_and_column): Be willing to output a column of 0.
4334 (diagnostic_get_location_text): Convert column number as per the new
4336 (diagnostic_report_current_module): Likewise.
4337 (assert_location_text): Add origin and column_unit arguments for
4338 testing the new functionality.
4339 (test_diagnostic_get_location_text): Test the new functionality.
4340 * doc/invoke.texi: Document the new options and behavior.
4341 * input.h (location_compute_display_column): Add tabstop argument.
4342 * input.c (location_compute_display_column): Likewise.
4343 (test_cpp_utf8): Add selftests for tab expansion.
4344 * tree-diagnostic-path.cc (default_tree_make_json_for_path): Pass the
4345 new context argument to json_from_expanded_location().
4347 2020-07-14 Jakub Jelinek <jakub@redhat.com>
4350 * expr.c (expand_constructor): Don't create temporary for store to
4351 volatile MEM if exp has an addressable type.
4353 2020-07-14 Nathan Sidwell <nathan@acm.org>
4355 * hash-map.h (hash_map::get): Note it is a pointer to value.
4356 * incpath.h (incpath_kind): Align comments.
4358 2020-07-14 Nathan Sidwell <nathan@acm.org>
4360 * tree-core.h (tree_decl_with_vis, tree_function_decl):
4361 Note additional padding on 64-bits
4362 * tree.c (cache_integer_cst): Note why no caching of enum literals.
4363 (get_tree_code_name): Robustify error case.
4365 2020-07-14 Nathan Sidwell <nathan@acm.org>
4367 * doc/gty.texi: Fic gt_cleare_cache name.
4368 * doc/invoke.texi: Remove duplicate opindex Wabi-tag.
4370 2020-07-14 Jakub Jelinek <jakub@redhat.com>
4372 * omp-general.h (struct omp_for_data): Add adjn1 member.
4373 * omp-general.c (omp_extract_for_data): For non-rect loop, punt on
4374 count computing if n1, n2 or step are not INTEGER_CST earlier.
4375 Narrow the outer iterator range if needed so that non-rect loop
4376 has at least one iteration for each outer range iteration. Compute
4378 * omp-expand.c (expand_omp_for_init_vars): Use adjn1 if non-NULL
4379 instead of the outer loop's n1.
4381 2020-07-14 Matthias Klose <doko@ubuntu.com>
4384 * lto-wrapper.c (merge_and_complain): Add decoded options as parameter,
4385 error on different values for -fcf-protection.
4386 (append_compiler_options): Pass -fcf-protection option.
4387 (find_and_merge_options): Add decoded options as parameter,
4388 pass decoded_options to merge_and_complain.
4389 (run_gcc): Pass decoded options to find_and_merge_options.
4390 * lto-opts.c (lto_write_options): Pass -fcf-protection option.
4392 2020-07-13 Alan Modra <amodra@gmail.com>
4394 * config/rs6000/rs6000.md (sibcall_local): Merge sibcall_local32
4395 and sibcall_local64.
4396 (sibcall_value_local): Similarly.
4398 2020-07-13 Nathan Sidwell <nathan@acm.org>
4400 * Makefile.in (distclean): Remove long gone cxxmain.c
4402 2020-07-13 H.J. Lu <hjl.tools@gmail.com>
4405 * config/i386/i386.md (cmpstrnsi): Pass a copy of the string
4406 length to cmpstrnqi patterns.
4408 2020-07-13 Jakub Jelinek <jakub@redhat.com>
4411 * ipa-fnsummary.c (analyze_function_body): Treat NULL bb->aux
4414 2020-07-13 Richard Biener <rguenther@suse.de>
4416 PR tree-optimization/96163
4417 * tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts
4418 at least after region begin.
4420 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
4422 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
4423 __ARM_FEATURE_PAC_DEFAULT support.
4425 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
4428 * doc/extend.texi: Update the text for __builtin_return_address.
4430 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
4433 * config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
4434 Disable return address signing if __builtin_eh_return is used.
4436 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
4440 * config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
4441 * config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
4442 (aarch64_return_addr): Use aarch64_return_addr_rtx.
4443 * config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
4445 2020-07-13 Richard Sandiford <richard.sandiford@arm.com>
4448 * tree.h (virtual_method_call_p): Add a default-false parameter
4449 that indicates whether the function is being called from dump
4451 (obj_type_ref_class): Likewise.
4452 * tree.c (virtual_method_call_p): Likewise.
4453 * ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR
4454 type information for the type when the parameter is false.
4455 * tree-pretty-print.c (dump_generic_node): Update calls to
4456 virtual_method_call_p and obj_type_ref_class accordingly.
4458 2020-07-13 Julian Brown <julian@codesourcery.com>
4459 Thomas Schwinge <thomas@codesourcery.com>
4461 * gimplify.c (gimplify_scan_omp_clauses): Do not strip
4462 GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data
4463 directives (see also PR92929).
4465 2020-07-13 Roger Sayle <roger@nextmovesoftware.com>
4467 * convert.c (convert_to_integer_1): Narrow integer operations
4468 even on targets that require explicit truncation instructions.
4470 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4473 * config/cris/cris-passes.def: New file.
4474 * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
4475 * config/cris/cris.c: Add infrastructure bits and pass execute
4476 function cris_postdbr_cmpelim.
4477 * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare.
4479 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4481 * config/cris/t-cris: Remove gt-cris.h-related excessive cargo.
4483 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4486 * config/cris/cris.md ("*add<mode>3_addi"): New splitter.
4487 ("*addi_b_<mode>"): New pattern.
4488 ("*addsi3<setnz>"): Remove stale %-related comment.
4490 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4492 * config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"):
4493 Use match_dup in output template, not match_operand.
4495 2020-07-13 Richard Biener <rguenther@suse.de>
4497 * var-tracking.c (bb_heap_node_t): Remove unused typedef.
4498 (vt_find_locations): Eliminate visited bitmap in favor of
4499 RPO order check. Dump statistics about the number of
4500 local BB dataflow computes.
4502 2020-07-13 Richard Biener <rguenther@suse.de>
4505 * expr.c (expand_constructor): Make a temporary also if we're
4506 storing to volatile memory.
4508 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
4510 * config/rs6000/rs6000.md (rotl_unspec): New
4511 define_insn_and_split.
4513 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
4515 * config/rs6000/rs6000.c (rs6000_expand_vector_init):
4516 Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
4518 2020-07-11 Roger Sayle <roger@nextmovesoftware.com>
4520 * internal-fn.c (expand_mul_overflow): When checking for signed
4521 overflow from a widening multiplication, we access the truncated
4522 lowpart RES twice, so keep this value in a pseudo register.
4524 2020-07-11 Richard Sandiford <richard.sandiford@arm.com>
4526 PR tree-optimization/96146
4527 * value-range.cc (value_range::set): Only decompose POLY_INT_CST
4528 bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges
4529 involving POLY_INT_CSTs.
4531 2020-07-10 David Edelsohn <dje.gcc@gmail.com>
4534 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
4535 create named section for VAR_DECL or FUNCTION_DECL.
4537 2020-07-10 Joseph Myers <joseph@codesourcery.com>
4539 * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
4542 2020-07-10 Alexander Popov <alex.popov@linux.com>
4544 * shrink-wrap.c (try_shrink_wrapping): Improve debug output.
4546 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
4549 * expr.c (expand_expr_real_2): When reducing bit fields,
4550 clear the target if it has a different mode from the expression.
4551 (reduce_to_bit_field_precision): Don't do that here. Instead
4552 assert that the target already has the correct mode.
4554 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
4558 * config/arm/arm.c (arm_attribute_table): Add
4559 "Advanced SIMD type".
4560 (arm_comp_type_attributes): Check that the "Advanced SIMD type"
4561 attributes are equal.
4562 * config/arm/arm-builtins.c: Include stringpool.h and
4564 (arm_mangle_builtin_vector_type): Use the mangling recorded
4565 in the "Advanced SIMD type" attribute.
4566 (arm_init_simd_builtin_types): Add an "Advanced SIMD type"
4567 attribute to each Advanced SIMD type, using the mangled type
4568 as the attribute's single argument.
4570 2020-07-10 Carl Love <cel@us.ibm.com>
4572 * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator.
4573 (VSX_MM4): New define_mode_iterator.
4574 (vec_mtvsrbmi): New define_insn.
4575 (vec_mtvsr_<mode>): New define_insn.
4576 (vec_cntmb_<mode>): New define_insn.
4577 (vec_extract_<mode>): New define_insn.
4578 (vec_expand_<mode>): New define_insn.
4579 (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
4580 UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
4581 * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
4582 vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
4584 * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
4585 (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
4586 mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
4587 vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
4588 (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
4589 (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
4590 mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
4591 (BU_P10_OVERLOAD_2): Add defition for cntm.
4592 * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
4593 checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
4594 CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
4595 (altivec_overloaded_builtins): Add overloaded argument entries for
4596 P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
4597 P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
4598 P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
4599 P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
4600 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
4601 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
4602 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
4603 P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
4604 P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
4605 P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
4606 (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
4607 P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
4608 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
4609 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
4610 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
4611 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
4612 P10_BUILTIN_VEXPANDMQ.
4613 * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
4614 entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
4615 VEXPANDM, VEXTRACTM.
4617 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)>
4620 * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
4621 (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
4622 v16qi_ftype_pcvoid with correct number of parameters.
4624 2020-07-10 H.J. Lu <hjl.tools@gmail.com>
4627 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
4628 TARGET_AVX512VL when enabling FMA.
4630 2020-07-10 Andrea Corallo <andrea.corallo@arm.com>
4631 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
4632 Iain Apreotesei <iain.apreotesei@arm.com>
4634 * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New
4636 * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define.
4637 (arm_invalid_within_doloop): Implement invalid_within_doloop hook.
4638 (arm_target_insn_ok_for_lob): New function.
4639 * config/arm/arm.h (TARGET_HAVE_LOB): Define macro.
4640 * config/arm/thumb2.md (*doloop_end_internal, doloop_begin)
4641 (dls_insn): Add new patterns.
4642 (doloop_end): Modify to select LR when LOB is available.
4643 * config/arm/unspecs.md: Add new unspec.
4644 * doc/sourcebuild.texi (arm_v8_1_lob_ok)
4645 (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports
4648 2020-07-10 Richard Biener <rguenther@suse.de>
4650 PR tree-optimization/96133
4651 * gimple-fold.c (fold_array_ctor_reference): Do not
4652 recurse to folding a CTOR that does not fully cover the
4655 2020-07-10 Cui,Lili <lili.cui@intel.com>
4657 * common/config/i386/cpuinfo.h
4658 (get_intel_cpu): Handle sapphirerapids.
4659 * common/config/i386/i386-common.c
4660 (processor_names): Add sapphirerapids and alderlake.
4661 (processor_alias_table): Add sapphirerapids and alderlake.
4662 * common/config/i386/i386-cpuinfo.h
4663 (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
4664 INTEL_COREI7_ALDERLAKE.
4665 * config.gcc: Add -march=sapphirerapids and alderlake.
4666 * config/i386/driver-i386.c
4667 (host_detect_local_cpu) Handle sapphirerapids and alderlake.
4668 * config/i386/i386-c.c
4669 (ix86_target_macros_internal): Handle sapphirerapids and alderlake.
4670 * config/i386/i386-options.c
4671 (m_SAPPHIRERAPIDS) : Define.
4672 (m_ALDERLAKE): Ditto.
4673 (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
4674 (processor_cost_table): Add sapphirerapids and alderlake.
4675 (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
4676 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
4677 * config/i386/i386.h
4678 (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
4679 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
4680 PROCESSOR_ALDERLAKE.
4682 (PTA_CLDEMOTE): Ditto.
4683 (PTA_SERIALIZE): Ditto.
4684 (PTA_TSXLDTRK): New.
4685 (PTA_SAPPHIRERAPIDS): Ditto.
4686 (PTA_ALDERLAKE): Ditto.
4687 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
4688 PROCESSOR_ALDERLAKE.
4689 * doc/extend.texi: Add sapphirerapids and alderlake.
4690 * doc/invoke.texi: Add sapphirerapids and alderlake.
4692 2020-07-10 Martin Liska <mliska@suse.cz>
4694 * dumpfile.c [profile-report]: Add new profile dump.
4695 * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report.
4696 * passes.c (pass_manager::dump_profile_report): Change stderr
4699 2020-07-10 Kewen Lin <linkw@linux.ibm.com>
4701 * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which
4702 is adjusted by considering peeled prologue for non
4703 vect_use_loop_mask_for_alignment_p cases.
4705 2020-07-09 Peter Bergner <bergner@linux.ibm.com>
4708 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA
4709 specific types __vector_quad and __vector_pair, and initialize the
4710 MMA built-ins if TARGET_EXTRA_BUILTINS is set.
4711 (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask.
4712 Remove now unneeded mask variable.
4713 * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the
4714 OPTION_MASK_MMA flag for power10 if not already set.
4716 2020-07-09 Richard Biener <rguenther@suse.de>
4718 PR tree-optimization/96133
4719 * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p
4720 status between stmts.
4722 2020-07-09 H.J. Lu <hjl.tools@gmail.com>
4725 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA.
4726 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New.
4727 (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256.
4728 (rsqrtv16sf2): Removed.
4730 2020-07-09 Richard Biener <rguenther@suse.de>
4732 * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove.
4733 (vect_slp_analyze_and_verify_instance_alignment): Rename to ...
4734 (vect_slp_analyze_instance_alignment): ... this.
4735 * tree-vect-data-refs.c (verify_data_ref_alignment): Remove.
4736 (vect_verify_datarefs_alignment): Likewise.
4737 (vect_enhance_data_refs_alignment): Do not call
4738 vect_verify_datarefs_alignment.
4739 (vect_slp_analyze_node_alignment): Rename from
4740 vect_slp_analyze_and_verify_node_alignment and do not
4741 call verify_data_ref_alignment.
4742 (vect_slp_analyze_instance_alignment): Rename from
4743 vect_slp_analyze_and_verify_instance_alignment.
4744 * tree-vect-stmts.c (vectorizable_store): Dump when
4745 we vectorize an unaligned access.
4746 (vectorizable_load): Likewise.
4747 * tree-vect-loop.c (vect_analyze_loop_2): Do not call
4748 vect_verify_datarefs_alignment.
4749 * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust.
4751 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
4753 PR tree-optimization/95804
4754 * tree-loop-distribution.c (break_alias_scc_partitions): Force
4755 negative post order to reduction partition.
4757 2020-07-09 Jakub Jelinek <jakub@redhat.com>
4759 * omp-general.h (struct omp_for_data): Add min_inner_iterations
4761 * omp-general.c (omp_extract_for_data): Initialize them and remember
4762 them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there.
4763 * omp-expand.c (expand_omp_for_init_counts): Fix up computation of
4764 counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST.
4765 (expand_omp_for_init_vars): For
4766 fd->first_nonrect + 1 == fd->last_nonrect loops with for now
4767 INTEGER_CST fd->loop.n2 find quadratic equation roots instead of
4768 using fallback method when possible.
4770 2020-07-09 Omar Tahir <omar.tahir@arm.com>
4772 * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
4773 last_moveable_pseudo before returning.
4775 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com>
4777 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
4778 __ARM_FEATURE_BTI_DEFAULT support.
4780 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
4782 * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
4784 * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
4785 stub registers class.
4786 (aarch64_class_max_nregs): Likewise.
4787 (aarch64_register_move_cost): Likewise.
4788 (aarch64_sls_shared_thunks): Global array to store stub labels.
4789 (aarch64_sls_emit_function_stub): New.
4790 (aarch64_create_blr_label): New.
4791 (aarch64_sls_emit_blr_function_thunks): New.
4792 (aarch64_sls_emit_shared_blr_thunks): New.
4793 (aarch64_asm_file_end): New.
4794 (aarch64_indirect_call_asm): New.
4795 (TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
4796 (TARGET_ASM_FUNCTION_EPILOGUE): Use
4797 aarch64_sls_emit_blr_function_thunks.
4798 * config/aarch64/aarch64.h (STB_REGNUM_P): New.
4799 (enum reg_class): Add STUB_REGS class.
4800 (machine_function): Introduce `call_via` array for
4801 function-local stub labels.
4802 * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
4803 aarch64_indirect_call_asm to emit code when hardening BLR
4805 * config/aarch64/constraints.md (Ucr): New constraint
4806 representing registers for indirect calls. Is GENERAL_REGS
4807 usually, and STUB_REGS when hardening BLR instruction against
4809 * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
4810 is also a general register.
4812 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
4814 * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
4815 * config/aarch64/aarch64.c (aarch64_output_casesi): Emit
4816 speculation barrier after BR instruction if needs be.
4817 (aarch64_trampoline_init): Handle ptr_mode value & adjust size
4819 (aarch64_sls_barrier): New.
4820 (aarch64_asm_trampoline_template): Add needed barriers.
4821 * config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
4823 (TRAMPOLINE_SIZE): Account for barrier.
4824 * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
4825 simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
4826 Emit barrier if needs be, also account for possible barrier using
4827 "sls_length" attribute.
4828 (sls_length): New attribute.
4829 (length): Determine default using any non-default sls_length
4832 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
4834 * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
4836 (aarch64_harden_sls_blr_p): New.
4837 * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
4839 (aarch64_harden_sls_retbr_p): New.
4840 (aarch64_harden_sls_blr_p): New.
4841 (aarch64_validate_sls_mitigation): New.
4842 (aarch64_override_options): Parse options for SLS mitigation.
4843 * config/aarch64/aarch64.opt (-mharden-sls): New option.
4844 * doc/invoke.texi: Document new option.
4846 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
4848 * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization
4849 with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION
4850 or nested-cycle reduction.
4852 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
4854 * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string
4855 for fully masking to be more common.
4857 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
4859 * config/riscv/riscv.md (get_thread_pointer<mode>): New.
4861 * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
4862 Document __builtin_thread_pointer.
4864 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
4866 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
4867 Abort if any arguments on stack.
4869 2020-07-08 Eric Botcazou <ebotcazou@adacore.com>
4871 * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if
4872 either type has reverse scalar storage order.
4873 * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through
4874 a memory copy if either type has reverse scalar storage order.
4876 2020-07-08 Tobias Burnus <tobias@codesourcery.com>
4878 * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic
4879 on to the native compiler, if used.
4880 * config/nvptx/mkoffload.c (compile_native, main): Likewise.
4882 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com>
4884 * config/rs6000/altivec.h (vec_vmsumudm): New define.
4885 * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
4886 (altivec_vmsumudm): New define_insn.
4887 * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
4888 entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
4889 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for
4890 ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
4891 * doc/extend.texi: Add document for vmsumudm behind vmsum.
4893 2020-07-08 Richard Biener <rguenther@suse.de>
4895 * tree-vect-stmts.c (get_group_load_store_type): Pass
4896 in the SLP node and the alignment support scheme output.
4898 (get_load_store_type): Likewise.
4899 (vectorizable_store): Adjust.
4900 (vectorizable_load): Likewise.
4902 2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
4905 * expr.c (expand_expr_real_2): Get the mode from the type rather
4906 than the rtx, and assert that it is consistent with the mode of
4907 the rtx (where known). Optimize all constant integers, not just
4908 those that can be represented in poly_int64.
4910 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
4912 * config/rs6000/vsx.md (len_load_v16qi): New define_expand.
4913 (len_store_v16qi): Likewise.
4915 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
4917 * doc/md.texi (len_load_@var{m}): Document.
4918 (len_store_@var{m}): Likewise.
4919 * internal-fn.c (len_load_direct): New macro.
4920 (len_store_direct): Likewise.
4921 (expand_len_load_optab_fn): Likewise.
4922 (expand_len_store_optab_fn): Likewise.
4923 (direct_len_load_optab_supported_p): Likewise.
4924 (direct_len_store_optab_supported_p): Likewise.
4925 (expand_mask_load_optab_fn): New macro. Original renamed to ...
4926 (expand_partial_load_optab_fn): ... here. Add handlings for
4928 (expand_mask_store_optab_fn): New macro. Original renamed to ...
4929 (expand_partial_store_optab_fn): ... here. Add handlings for
4931 (internal_load_fn_p): Handle IFN_LEN_LOAD.
4932 (internal_store_fn_p): Handle IFN_LEN_STORE.
4933 (internal_fn_stored_value_index): Handle IFN_LEN_STORE.
4934 * internal-fn.def (LEN_LOAD): New internal function.
4935 (LEN_STORE): Likewise.
4936 * optabs.def (len_load_optab, len_store_optab): New optab.
4938 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
4940 * config/aarch64/aarch64.c (thunderx2t99_regmove_cost,
4941 thunderx2t99_vector_cost): Likewise.
4943 2020-07-07 Richard Biener <rguenther@suse.de>
4945 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix
4946 group overlap condition to allow negative step DR groups.
4947 * tree-vect-stmts.c (get_group_load_store_type): For
4948 multi element SLP groups force VMAT_STRIDED_SLP when the step
4951 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com>
4953 * doc/generic.texi: Fix typo.
4955 2020-07-07 Richard Biener <rguenther@suse.de>
4957 * lto-streamer-out.c (cmp_symbol_files): Use the computed
4958 order map to sort symbols from the same sub-file together.
4959 (lto_output): Compute a map of sub-file to an order number
4960 it appears in the symbol output array.
4962 2020-07-06 Richard Biener <rguenther@suse.de>
4964 PR tree-optimization/96075
4965 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
4966 TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
4967 for the misalignment calculation for negative step.
4969 2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
4971 * config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
4972 (*vsub_addsi4): New instruction.
4974 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
4976 * config/cris/cris.md (movulsr): New peephole2.
4978 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
4980 * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"):
4981 Correct gcc_assert of overlapping operands.
4983 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
4985 * config/cris/cris.c (cris_select_cc_mode): Always return
4986 CC_NZmode for matching comparisons. Clarify comments.
4987 * config/cris/cris-modes.def: Clarify mode comment.
4988 * config/cris/cris.md (plusminus, plusminusumin, plusumin): New
4990 (addsub, addsubbo, nd): New code iterator attributes.
4991 ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code
4992 iterator constructs instead of match_operator constructs.
4993 ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from
4994 "*extop<mode>si<setnz>".
4995 ("*add<su>qihi_swap"): Similar from "*addxqihi_swap".
4996 ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from
4997 "*extop<mode>si<setnz>_swap".
4999 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
5001 * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap")
5002 ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate.
5004 2020-07-03 Eric Botcazou <ebotcazou@adacore.com>
5006 * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that
5007 were initially created for the assignment of a variable-sized
5008 object and whose source is now a string constant.
5009 * gimple-ssa-store-merging.c (struct merged_store_group): Document
5010 STRING_CST for rhs_code field.
5011 Add string_concatenation boolean field.
5012 (merged_store_group::merged_store_group): Initialize it as well as
5014 (merged_store_group::do_merge): Set it upon seeing a STRING_CST.
5015 Also set bit_insertion here upon seeing a BIT_INSERT_EXPR.
5016 (merged_store_group::apply_stores): Clear it for small regions.
5017 Do not create a power-of-2-sized buffer if it is still true.
5018 And do not set bit_insertion here again.
5019 (encode_tree_to_bitpos): Deal with BLKmode for the expression.
5020 (merged_store_group::can_be_merged_into): Deal with STRING_CST.
5021 (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion
5022 to true after changing MEM_REF stores into BIT_INSERT_EXPR stores.
5023 (count_multiple_uses): Return 0 for STRING_CST.
5024 (split_group): Do not split the group for a string concatenation.
5025 (imm_store_chain_info::output_merged_store): Constify and rename
5026 some local variables. Build an array type as destination type
5027 for a string concatenation, as well as a zero mask, and call
5028 build_string to build the source.
5029 (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR.
5030 (pass_store_merging::process_store): Accept STRING_CST on the RHS.
5031 * gimple.h (gimple_call_alloca_for_var_p): New accessor function.
5032 * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var.
5033 * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY.
5035 2020-07-03 Martin Jambor <mjambor@suse.cz>
5038 * ipa-sra.c (all_callee_accesses_present_p): Do not accept type
5039 mismatched accesses.
5041 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
5043 * config/nvptx/nvptx.md (popcount<mode>2): New instructions.
5044 (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions.
5046 2020-07-03 Martin Liska <mliska@suse.cz>
5047 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5050 * gcov-dump.c (tag_function): Use gcov_position_t
5053 2020-07-03 Richard Biener <rguenther@suse.de>
5055 PR tree-optimization/96037
5056 * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def.
5058 2020-07-03 Richard Biener <rguenther@suse.de>
5060 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the
5061 original non-pattern stmts, look at the pattern stmt
5062 vectorization status.
5064 2020-07-03 Andrew Stubbs <ams@codesourcery.com>
5066 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
5068 2020-07-03 Richard Biener <rguenther@suse.de>
5070 * tree-vectorizer.h (vec_info::insert_on_entry): New.
5071 (vec_info::insert_seq_on_entry): Likewise.
5072 * tree-vectorizer.c (vec_info::insert_on_entry): Implement.
5073 (vec_info::insert_seq_on_entry): Likewise.
5074 * tree-vect-stmts.c (vect_init_vector_1): Use
5075 vec_info::insert_on_entry.
5076 (vect_finish_stmt_generation): Set modified bit after
5078 * tree-vect-slp.c (vect_create_constant_vectors): Simplify
5079 by using vec_info::insert_seq_on_entry and bypassing
5081 (vect_schedule_slp_instance): Deal with all-constant
5084 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
5085 Tom de Vries <tdevries@suse.de>
5088 * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi
5089 to access TYPE_SIZE (type). Return at least the mode's alignment.
5091 2020-07-02 Richard Biener <rguenther@suse.de>
5093 PR tree-optimization/96028
5094 * tree-vect-slp.c (vect_slp_convert_to_external): Make sure
5095 we have scalar stmts to use.
5096 (vect_slp_analyze_node_operations): When analyzing a child
5097 failed try externalizing the parent node.
5099 2020-07-02 Martin Jambor <mjambor@suse.cz>
5102 * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust
5103 argument index if necessary.
5105 2020-07-02 Martin Liska <mliska@suse.cz>
5108 * tree-vect-generic.c (expand_vector_condition): Forward declaration.
5109 (expand_vector_comparison): Do not expand a comparison if all
5110 uses are consumed by a VEC_COND_EXPR.
5111 (expand_vector_operation): Change void return type to bool.
5112 (expand_vector_operations_1): Pass dce_ssa_names.
5114 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com>
5117 * system.h (NULL): Redefine to nullptr.
5119 2020-07-02 Jakub Jelinek <jakub@redhat.com>
5121 PR tree-optimization/95857
5122 * tree-cfg.c (group_case_labels_stmt): When removing an unreachable
5123 base_bb, remember all forced and non-local labels on it and later
5124 treat those as if they have NULL label_to_block. Formatting fix.
5127 2020-07-02 Richard Biener <rguenther@suse.de>
5129 PR tree-optimization/96022
5130 * tree-vect-stmts.c (vectorizable_shift): Only use the
5131 first vector stmt when extracting the scalar shift amount.
5132 * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary
5133 nodes with all-scalar children from scalars but not stores.
5134 (vect_analyze_slp_instance): Mark the node not failed.
5136 2020-07-02 Felix Yang <felix.yang@huawei.com>
5138 PR tree-optimization/95961
5139 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the
5140 number of scalars instead of the number of vectors as an upper bound
5141 for the loop saving info about DR in the hash table. Remove unused
5144 2020-07-02 Jakub Jelinek <jakub@redhat.com>
5146 * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with
5147 invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid
5148 OpenMP non-rectangular loops. Use XALLOCAVEC.
5150 2020-07-02 Martin Liska <mliska@suse.cz>
5152 PR gcov-profile/95348
5153 * coverage.c (read_counts_file): Read only COUNTERS that are
5155 * gcov-dump.c (tag_function): Change signature from unsigned to
5157 (tag_blocks): Likewise.
5158 (tag_arcs): Likewise.
5159 (tag_lines): Likewise.
5160 (tag_counters): Likewise.
5161 (tag_summary): Likewise.
5162 * gcov.c (read_count_file): Read all non-zero counters
5165 2020-07-02 Kito Cheng <kito.cheng@sifive.com>
5167 * config/riscv/multilib-generator (arch_canonicalize): Handle
5168 multi-letter extension.
5169 Using underline as separator between different extensions.
5171 2020-07-01 Pip Cet <pipcet@gmail.com>
5173 * spellcheck.c (test_data): Add problematic strings.
5174 (test_metric_conditions): Don't test the triangle inequality
5175 condition, which our distance function does not satisfy.
5177 2020-07-01 Omar Tahir <omar.tahir@arm.com>
5179 * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always
5180 generate a BTI instruction.
5182 2020-07-01 Jeff Law <law@redhat.com>
5184 PR tree-optimization/94882
5185 * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification.
5187 2020-07-01 Jeff Law <law@redhat.com>
5189 * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword.
5190 (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise.
5192 2020-07-01 Andrea Corallo <andrea.corallo@arm.com>
5194 * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums
5195 for 64bits fpsr/fpcr getter setters builtin variants.
5196 (aarch64_init_fpsr_fpcr_builtins): New function.
5197 (aarch64_general_init_builtins): Modify to make use of the later.
5198 (aarch64_expand_fpsr_fpcr_setter): New function.
5199 (aarch64_general_expand_builtin): Modify to make use of the later.
5200 * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>)
5201 (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and
5202 generalizing 'get_fpcr', 'set_fpsr'.
5203 * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int
5205 (fpscr_name): New int attribute.
5206 * doc/extend.texi (__builtin_aarch64_get_fpcr64)
5207 (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64)
5208 (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in
5211 2020-07-01 Martin Liska <mliska@suse.cz>
5213 * gcov.c (print_usage): Avoid trailing space for -j option.
5215 2020-07-01 Richard Biener <rguenther@suse.de>
5217 PR tree-optimization/95839
5218 * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing
5219 vectors are not uniform.
5220 (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of
5222 (vect_build_slp_tree_2): For groups of lane extracts
5223 from a vector register generate a permute node
5224 with a special child representing the pre-existing vector.
5225 (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing.
5226 (vect_slp_analyze_node_operations): Use SLP_TREE_LANES.
5227 (vectorizable_slp_permutation): Do not generate or cost identity
5229 (vect_schedule_slp_instance): Handle pre-existing vector
5230 that are function arguments.
5232 2020-07-01 Richard Biener <rguenther@suse.de>
5234 * system.h (INCLUDE_ISL): New guarded include.
5235 * graphite-dependences.c: Use it.
5236 * graphite-isl-ast-to-gimple.c: Likewise.
5237 * graphite-optimize-isl.c: Likewise.
5238 * graphite-poly.c: Likewise.
5239 * graphite-scop-detection.c: Likewise.
5240 * graphite-sese-to-poly.c: Likewise.
5241 * graphite.c: Likewise.
5242 * graphite.h: Drop the includes here.
5244 2020-07-01 Martin Liska <mliska@suse.cz>
5246 * gcov.c (print_usage): Shorted option description for -j
5249 2020-07-01 Martin Liska <mliska@suse.cz>
5251 * doc/gcov.texi: Rename 2 options.
5252 * gcov.c (print_usage): Rename -i,--json-format to
5253 -j,--json-format and -j,--human-readable to -H,--human-readable.
5254 (process_args): Fix up parsing. Document obsolete options and
5255 how are they changed.
5257 2020-07-01 Jeff Law <law@redhat.com>
5259 * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword.
5260 (pa_output_ascii): Likewise.
5262 2020-07-01 Kito Cheng <kito.cheng@sifive.com>
5264 * common/config/riscv/riscv-common.c (riscv_subset_t): New field
5266 (riscv_subset_list::parsing_subset_version): Add parameter for
5267 indicate explicitly version, and handle explicitly version.
5268 (riscv_subset_list::handle_implied_ext): Ditto.
5269 (riscv_subset_list::add): Ditto.
5270 (riscv_subset_t::riscv_subset_t): Init new field.
5271 (riscv_subset_list::to_string): Always output version info if version
5272 explicitly specified.
5273 (riscv_subset_list::parsing_subset_version): Handle explicitly
5275 (riscv_subset_list::parse_std_ext): Ditto.
5276 (riscv_subset_list::parse_multiletter_ext): Ditto.
5278 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
5282 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
5283 "Advanced SIMD type".
5284 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
5285 attributes are equal.
5286 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
5288 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
5289 in the "Advanced SIMD type" attribute.
5290 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
5291 attribute to each Advanced SIMD type, using the mangled type
5292 as the attribute's single argument.
5294 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
5297 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
5298 -mgeneral-regs-only is not used.
5300 2020-06-30 Yang Yang <yangyang305@huawei.com>
5302 PR tree-optimization/95855
5303 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
5304 checks to recognize a missed if-conversion opportunity when
5305 judging whether to duplicate a block.
5307 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
5309 * doc/extend.texi: Change references to "future architecture" to
5310 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
5311 references to "future" (because the future is now).
5313 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
5315 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
5317 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
5319 * simplify-rtx.c (simplify_distributive_operation): New function
5320 to un-distribute a binary operation of two binary operations.
5321 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
5322 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
5324 (test_scalar_int_ops): New function for unit self-testing
5325 scalar integer transformations in simplify-rtx.c.
5326 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
5327 (simplify_rtx_c_tests): Call test_scalar_ops.
5329 2020-06-29 Richard Biener <rguenther@suse.de>
5331 PR tree-optimization/95916
5332 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
5333 the case of not vectorized externals.
5335 2020-06-29 Richard Biener <rguenther@suse.de>
5337 * tree-vectorizer.h: Do not include <utility>.
5339 2020-06-29 Martin Liska <mliska@suse.cz>
5341 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
5342 instead of gimple_stmt_iterator::bb.
5343 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
5344 * tree-vectorizer.h: Likewise.
5346 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
5348 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
5349 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
5350 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
5351 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
5352 (gcn_dwarf_register_number): New function.
5353 (gcn_dwarf_register_span): New function.
5354 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
5356 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
5358 PR tree-optimization/95854
5359 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
5360 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
5361 unsigned HOST_WIDE_INT.
5363 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5365 * config/sparc/sparc.c (epilogue_renumber): Remove register.
5366 (sparc_print_operand_address): Likewise.
5367 (sparc_type_code): Likewise.
5368 (set_extends): Likewise.
5370 2020-06-29 Martin Liska <mliska@suse.cz>
5372 PR tree-optimization/92860
5373 * optc-save-gen.awk: Add exceptions for arc target.
5375 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
5377 * doc/sourcebuild.texi: Describe globbing of the
5378 dump file scanning commands "suffix" argument.
5380 2020-06-28 Martin Sebor <msebor@redhat.com>
5383 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
5385 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
5387 * tree.c (get_nonnull_args): Consider the this pointer implicitly
5389 * var-tracking.c (deps_vec): New type.
5390 (var_loc_dep_vec): New function.
5391 (VAR_LOC_DEP_VEC): Use it.
5393 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
5395 * internal-fn.c (direct_mask_load_optab_supported_p): Use
5396 convert_optab_supported_p instead of direct_optab_supported_p.
5397 (direct_mask_store_optab_supported_p): Likewise.
5399 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
5401 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
5402 simplify_using_ranges class.
5403 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
5404 field. Adjust all methods to use new field.
5405 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
5406 simplify_using_ranges class.
5407 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
5408 field. Adjust all methods to use new field.
5409 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
5410 (vrp_prop::vrp_finalize): New vrp_folder argument.
5411 (execute_vrp): Pass folder to vrp_finalize. Use
5412 simplify_using_ranges class.
5413 Remove cleanup_edges_and_switches call.
5414 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
5415 value_range_equiv uses to value_range.
5416 (simplify_using_ranges::op_with_boolean_value_range_p): Use
5417 simplify_using_ranges class.
5418 (check_for_binary_op_overflow): Make static.
5419 (vr_values::extract_range_basic): Pass this to
5420 check_for_binary_op_overflow.
5421 (compare_range_with_value): Change value_range_equiv uses to
5423 (vr_values::vr_values): Initialize simplifier field.
5424 Remove uses of to_remove_edges and to_update_switch_stmts.
5425 (vr_values::~vr_values): Remove uses of to_remove_edges and
5426 to_update_switch_stmts.
5427 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
5429 (vr_values::compare_name_with_value): Same.
5430 (vr_values::compare_names): Same.
5431 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
5432 (vr_values::vrp_evaluate_conditional): Same.
5433 (vr_values::vrp_visit_cond_stmt): Same.
5434 (find_case_label_ranges): Change value_range_equiv uses to
5436 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
5437 (vr_values::simplify_truth_ops_using_ranges): Move to
5438 simplify_using_ranges class.
5439 (vr_values::simplify_div_or_mod_using_ranges): Same.
5440 (vr_values::simplify_min_or_max_using_ranges): Same.
5441 (vr_values::simplify_abs_using_ranges): Same.
5442 (vr_values::simplify_bit_ops_using_ranges): Same.
5443 (test_for_singularity): Change value_range_equiv uses to
5445 (range_fits_type_p): Same.
5446 (vr_values::simplify_cond_using_ranges_1): Same.
5447 (vr_values::simplify_cond_using_ranges_2): Make extern.
5448 (vr_values::fold_cond): Move to simplify_using_ranges class.
5449 (vr_values::simplify_switch_using_ranges): Same.
5450 (vr_values::cleanup_edges_and_switches): Same.
5451 (vr_values::simplify_float_conversion_using_ranges): Same.
5452 (vr_values::simplify_internal_call_using_ranges): Same.
5453 (vr_values::two_valued_val_range_p): Same.
5454 (vr_values::simplify_stmt_using_ranges): Move to...
5455 (simplify_using_ranges::simplify): ...here.
5456 * vr-values.h (class vr_values): Move all the simplification of
5457 statements using ranges methods and code from here...
5458 (class simplify_using_ranges): ...to here.
5459 (simplify_cond_using_ranges_2): New extern prototype.
5461 2020-06-27 Jakub Jelinek <jakub@redhat.com>
5463 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
5464 member, move outer member.
5465 (struct omp_for_data): Add first_nonrect and last_nonrect members.
5466 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
5467 last_nonrect and non_rect_referenced members.
5468 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
5470 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
5471 non-rectangular loops.
5472 (extract_omp_for_update_vars): Likewise.
5473 (expand_omp_for_generic, expand_omp_for_static_nochunk,
5474 expand_omp_for_static_chunk, expand_omp_simd,
5475 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
5476 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
5477 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
5480 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
5483 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
5485 * config/i386/i386.c (ix86_frame_pointer_required): Update
5488 2020-06-26 Yichao Yu <yyc1992@gmail.com>
5490 * multiple_target.c (redirect_to_specific_clone): Fix tests
5491 to check individual attribute rather than an attribute list.
5493 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
5495 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
5496 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
5499 2020-06-26 Marek Polacek <polacek@redhat.com>
5501 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
5502 * doc/standards.texi (C Language): Correct the default dialect.
5503 (C++ Language): Update the default for C++ to gnu++17.
5505 2020-06-26 Eric Botcazou <ebotcazou@adacore.com>
5507 * tree-ssa-reassoc.c (dump_range_entry): New function.
5508 (debug_range_entry): New debug function.
5509 (update_range_test): Invoke dump_range_entry for dumping.
5510 (optimize_range_tests_to_bit_test): Merge the entry test in the
5511 bit test when possible and lower the profitability threshold.
5513 2020-06-26 Richard Biener <rguenther@suse.de>
5515 PR tree-optimization/95897
5516 * tree-vectorizer.h (vectorizable_induction): Remove
5517 unused gimple_stmt_iterator * parameter.
5518 * tree-vect-loop.c (vectorizable_induction): Likewise.
5519 (vect_analyze_loop_operations): Adjust.
5520 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
5521 (vect_transform_stmt): Likewise.
5522 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
5523 for fold-left reductions, clarify existing reduction case.
5525 2020-06-25 Nick Clifton <nickc@redhat.com>
5527 * config/m32r/m32r.md (movsicc): Disable pattern.
5529 2020-06-25 Richard Biener <rguenther@suse.de>
5531 PR tree-optimization/95839
5532 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
5533 check on the number of datarefs.
5535 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
5537 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
5538 the insn_data n_operands value to unsigned.
5540 2020-06-25 Richard Biener <rguenther@suse.de>
5542 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
5543 vector defs to determine insertion place.
5545 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
5548 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
5549 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
5550 (PTA_TIGERLAKE): Add PTA_CLWB.
5552 2020-06-25 Richard Biener <rguenther@suse.de>
5554 PR tree-optimization/95866
5555 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
5556 vectorized shift operands. For scalar shifts use lane zero
5557 of a vectorized shift operand.
5559 2020-06-25 Martin Liska <mliska@suse.cz>
5561 PR tree-optimization/95745
5563 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
5564 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
5566 * tree-vect-generic.c (expand_vector_condition): Remove dead
5567 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
5569 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
5572 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
5573 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
5574 (convert_4f32_8f16): New define_expand
5575 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
5577 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
5578 overloaded builtin entry.
5579 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
5580 (vsx_xvcvsphp): New define_insn.
5582 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
5583 Segher Boessenkool <segher@kernel.crashing.org>
5585 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
5587 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
5589 * simplify-rtx.c (simplify_unary_operation_1): Simplify
5590 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
5592 2020-06-24 Richard Biener <rguenther@suse.de>
5594 PR tree-optimization/95866
5595 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
5596 (vect_build_slp_tree_2): Properly reset matches[0],
5597 ignore uniform constants.
5599 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5602 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
5603 (cpu_indicator_init): Likewise.
5604 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
5606 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5609 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
5610 detection with AVX512BF16.
5612 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5615 * common/config/i386/i386-isas.h: New file. Extracted from
5616 gcc/config/i386/i386-builtins.c.
5617 (_isa_names_table): Add option.
5618 (ISA_NAMES_TABLE_START): New.
5619 (ISA_NAMES_TABLE_END): Likewise.
5620 (ISA_NAMES_TABLE_ENTRY): Likewise.
5621 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
5622 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
5623 from enum processor_features.
5624 * config/i386/driver-i386.c: Include
5625 "common/config/i386/cpuinfo.h" and
5626 "common/config/i386/i386-isas.h".
5627 (has_feature): New macro.
5628 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
5629 features. Use has_feature to detect processor features. Call
5630 Call get_intel_cpu to get the newer Intel CPU name. Use
5631 isa_names_table to generate command-line options.
5632 * config/i386/i386-builtins.c: Include
5633 "common/config/i386/i386-isas.h".
5634 (_arch_names_table): Removed.
5635 (isa_names_table): Likewise.
5637 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5640 * common/config/i386/cpuinfo.h: New file.
5641 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
5642 (__processor_model2): New.
5643 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
5644 (has_cpu_feature): New function.
5645 (set_cpu_feature): Likewise.
5646 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
5647 CHECK___builtin_cpu_is. Return AMD CPU name.
5648 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
5649 Use CHECK___builtin_cpu_is. Return Intel CPU name.
5650 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
5651 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
5652 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
5653 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
5654 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
5655 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
5656 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
5657 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
5658 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
5659 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
5660 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
5661 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
5662 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
5663 FEATURE_XSAVEOPT and FEATURE_XSAVES
5664 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
5665 Also update cpu_model2.
5666 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
5667 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
5668 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
5669 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
5670 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
5671 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
5672 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
5673 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
5674 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
5675 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
5676 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
5677 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
5678 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
5679 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
5680 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
5681 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
5682 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
5683 (SIZE_OF_CPU_FEATURES): New.
5684 * config/i386/i386-builtins.c (processor_features): Removed.
5685 (isa_names_table): Replace F_XXX with FEATURE_XXX.
5686 (fold_builtin_cpu): Change __cpu_features2 to an array.
5688 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5691 * common/config/i386/i386-common.c (processor_alias_table): Add
5692 processor model and priority to each entry.
5693 (pta_size): Updated with -6.
5694 (num_arch_names): New.
5695 * common/config/i386/i386-cpuinfo.h: New file.
5696 * config/i386/i386-builtins.c (feature_priority): Removed.
5697 (processor_model): Likewise.
5698 (_arch_names_table): Likewise.
5699 (arch_names_table): Likewise.
5700 (_isa_names_table): Replace P_ZERO with P_NONE.
5701 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
5702 processor_alias_table.
5703 (fold_builtin_cpu): Replace arch_names_table with
5704 processor_alias_table.
5705 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
5706 (pta): Add model and priority.
5707 (num_arch_names): New.
5709 2020-06-24 Richard Biener <rguenther@suse.de>
5711 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
5713 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
5714 Simplify for new position of vectorized SLP loads.
5715 (vect_slp_analyze_node_dependences): Adjust for it.
5716 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
5717 for the first stmts dataref.
5718 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
5719 (vect_schedule_slp_instance): Emit loads before the
5721 * tree-vect-stmts.c (vectorizable_load): Do what the comment
5722 says and use vect_find_first_scalar_stmt_in_slp.
5724 2020-06-24 Richard Biener <rguenther@suse.de>
5726 PR tree-optimization/95856
5727 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
5730 2020-06-24 Jakub Jelinek <jakub@redhat.com>
5733 * fold-const.c (fold_cond_expr_with_comparison): Optimize
5734 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
5736 2020-06-24 Jakub Jelinek <jakub@redhat.com>
5738 * omp-low.c (lower_omp_for): Fix two pastos.
5740 2020-06-24 Martin Liska <mliska@suse.cz>
5742 * optc-save-gen.awk: Compare string options in cl_optimization_compare
5745 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
5747 * config.gcc: Identify power10 as a 64-bit processor and as valid
5748 for --with-cpu and --with-tune.
5750 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
5752 * Makefile.in (LANG_MAKEFRAGS): Same.
5753 (tmake_file): Use -include.
5756 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
5758 * REVISION: Delete file meant for a private branch.
5760 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
5763 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
5764 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
5766 2020-06-23 Alexandre Oliva <oliva@adacore.com>
5768 * collect-utils.h (dumppfx): New.
5769 * collect-utils.c (dumppfx): Likewise.
5770 * lto-wrapper.c (run_gcc): Set global dumppfx.
5771 (compile_offload_image): Pass a -dumpbase on to mkoffload.
5772 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
5773 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
5775 (compile_native): Pass -dumpbase et al to compiler.
5776 * config/gcn/mkoffload.c (gcn_dumpbase): New.
5777 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
5778 save_temps. Pass -dumpbase et al to offload target compiler.
5779 (compile_native): Pass -dumpbase et al to compiler.
5781 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
5783 * REVISION: New file.
5785 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
5787 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
5788 Update comment for ISA 3.1.
5789 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
5790 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
5791 on AIX, and -mpower10 elsewhere.
5792 * config/rs6000/future.md: Delete.
5793 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
5795 * config/rs6000/power10.md: New file.
5796 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
5797 PPC_PLATFORM_FUTURE.
5798 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
5799 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
5800 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
5801 Use BU_P10_* instead of BU_FUTURE_*.
5802 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
5803 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
5804 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
5805 FUTURE_BUILTIN_VEC_XXEVAL.
5806 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
5807 Update compiler messages.
5808 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
5809 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
5810 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
5812 * config/rs6000/rs6000-string.c: Ditto.
5813 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
5814 instead of "future", reorder it to right after "power9".
5815 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
5816 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
5817 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
5818 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
5819 not ISA_FUTURE_MASKS_SERVER.
5820 (rs6000_opt_masks): Use "power10" instead of "future".
5821 (rs6000_builtin_mask_names): Ditto.
5822 (rs6000_disable_incompatible_switches): Ditto.
5823 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
5824 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
5825 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
5826 not RS6000_BTM_FUTURE.
5827 * config/rs6000/rs6000.md: Use "power10", not "future". Use
5828 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
5830 * config/rs6000/rs6000.opt (mfuture): Delete.
5832 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
5833 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
5835 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
5837 * coretypes.h (first_type): Delete.
5838 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
5840 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5842 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
5843 (arm_mve_hw): Likewise.
5845 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
5848 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
5851 2020-06-22 Richard Biener <rguenther@suse.de>
5853 PR tree-optimization/95770
5854 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
5857 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
5859 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
5860 (gcn_return_in_memory): Return vectors in memory.
5862 2020-06-22 Jakub Jelinek <jakub@redhat.com>
5864 * omp-general.c (omp_extract_for_data): For triangular loops with
5865 all loop invariant expressions constant where the innermost loop is
5866 executed at least once compute number of iterations at compile time.
5868 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
5870 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
5871 (DRIVER_SELF_SPECS): New.
5873 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
5875 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
5876 (RISCV_FTYPE_ATYPES0): New.
5877 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
5878 * config/riscv/riscv-ftypes.def: Remove VOID argument.
5880 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
5882 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
5883 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
5886 (ASM_CPU_SPEC): Remove vsx and altivec options.
5887 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
5890 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
5891 (TARGET_DEFAULT): Only define if not BIARCH.
5892 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
5895 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
5898 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
5899 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
5901 (CPLUSPLUS_CPP_SPEC): Same.
5904 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
5905 * config/rs6000/defaultaix64.h: New file.
5906 * config/rs6000/t-aix64: New file.
5908 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
5910 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
5911 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
5912 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
5914 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
5915 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
5916 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
5917 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
5918 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
5919 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
5920 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
5921 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
5922 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
5923 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
5924 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
5925 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
5926 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
5927 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
5928 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
5929 Allow zero constants.
5930 (print_operand) <case 'A'>: New output modifier.
5931 (rs6000_split_multireg_move): Add support for inserting accumulator
5932 priming and depriming instructions. Add support for splitting an
5933 assemble accumulator pattern.
5934 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
5935 rs6000_gimple_fold_mma_builtin): New functions.
5936 (RS6000_BUILTIN_M): New macro.
5937 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
5938 (bdesc_mma): Add new MMA built-in support.
5939 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
5940 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
5942 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
5943 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
5944 and rs6000_gimple_fold_mma_builtin.
5945 (rs6000_expand_builtin): Call mma_expand_builtin.
5946 Use RS6000_BTC_OPND_MASK.
5947 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
5948 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
5949 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
5950 VSX_BUILTIN_XVCVBF16SP.
5951 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
5952 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
5953 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
5954 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
5955 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
5956 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
5957 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
5958 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
5959 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
5960 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
5961 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
5962 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
5963 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
5964 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
5965 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
5966 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
5967 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
5968 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
5969 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
5970 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
5971 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
5972 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
5973 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
5974 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
5975 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
5976 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
5977 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
5978 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
5979 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
5980 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
5981 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
5982 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
5983 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
5984 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
5985 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
5986 MMA_AVVI4I4I4): New define_int_iterator.
5987 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
5988 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
5989 avvi4i4i4): New define_int_attr.
5990 (*movpxi): Add zero constant alternative.
5991 (mma_assemble_pair, mma_assemble_acc): New define_expand.
5992 (*mma_assemble_acc): New define_insn_and_split.
5993 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
5994 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
5995 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
5996 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
5997 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
5998 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
5999 (UNSPEC_VSX_XVCVSPBF16): Likewise.
6000 (XVCVBF16): New define_int_iterator.
6001 (xvcvbf16): New define_int_attr.
6002 (vsx_<xvcvbf16>): New define_insn.
6003 * doc/extend.texi: Document the mma built-ins.
6005 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
6006 Michael Meissner <meissner@linux.ibm.com>
6008 * config/rs6000/mma.md: New file.
6009 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
6011 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
6012 for __vector_pair and __vector_quad types.
6013 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
6015 (POWERPC_MASKS): Likewise.
6016 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
6017 (POI, PXI): New partial integer modes.
6018 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
6019 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
6020 (rs6000_hard_regno_mode_ok_uncached): Likewise.
6021 Add support for POImode being allowed in VSX registers and PXImode
6022 being allowed in FP registers.
6023 (rs6000_modes_tieable_p): Adjust comment.
6024 Add support for POImode and PXImode.
6025 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
6026 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
6027 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
6028 Set up appropriate addr_masks for vector pair and vector quad addresses.
6029 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
6030 vector quad registers. Setup reload handlers for POImode and PXImode.
6031 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
6032 (rs6000_option_override_internal): Error if -mmma is specified
6033 without -mcpu=future.
6034 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
6035 (quad_address_p): Change size test to less than 16 bytes.
6036 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
6037 and vector quad instructions.
6038 (avoiding_indexed_address_p): Likewise.
6039 (rs6000_emit_move): Disallow POImode and PXImode moves involving
6041 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
6042 and FP registers for PXImode.
6043 (rs6000_split_multireg_move): Support splitting POImode and PXImode
6045 (rs6000_mangle_type): Adjust comment. Add support for mangling
6046 __vector_pair and __vector_quad types.
6047 (rs6000_opt_masks): Add entry for mma.
6048 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
6049 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
6050 (address_to_insn_form): Likewise.
6051 (reg_to_non_prefixed): Likewise.
6052 (rs6000_invalid_conversion): New function.
6053 * config/rs6000/rs6000.h (MASK_MMA): Define.
6054 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
6055 (VECTOR_ALIGNMENT_P): New helper macro.
6056 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
6057 (RS6000_BTM_MMA): Define.
6058 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
6059 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
6060 RS6000_BTI_vector_quad.
6061 (vector_pair_type_node): New.
6062 (vector_quad_type_node): New.
6063 * config/rs6000/rs6000.md: Include mma.md.
6064 (define_mode_iterator RELOAD): Add POI and PXI.
6065 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
6066 * config/rs6000/rs6000.opt (-mmma): New.
6067 * doc/invoke.texi: Document -mmma.
6069 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
6071 PR tree-optimization/95638
6072 * tree-loop-distribution.c (pg_edge_callback_data): New field.
6073 (loop_distribution::break_alias_scc_partitions): Record and restore
6074 postorder information. Fix memory leak.
6076 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
6078 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
6079 (output_file_start): Use const 'char *'.
6081 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
6083 PR tree-optimization/94880
6084 * match.pd (A | B) - B -> (A & ~B): New simplification.
6086 2020-06-19 Richard Biener <rguenther@suse.de>
6088 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
6089 for lane permutations.
6091 2020-06-19 Richard Biener <rguenther@suse.de>
6093 PR tree-optimization/95761
6094 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
6095 vectorized stmts for finding the last one.
6097 2020-06-18 Felix Yang <felix.yang@huawei.com>
6099 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
6100 vect_relevant_for_alignment_p to filter out data references in
6101 the loop whose alignment is irrelevant when trying loop peeling
6104 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
6106 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
6107 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
6108 mode iterator for the first operand of ZERO_EXTRACT RTX.
6109 Change ext_register_operand predicate to register_operand.
6110 Rename from *cmpqi_ext_1.
6111 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
6112 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
6113 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
6114 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
6115 (*extv<mode>): Use SWI24 mode iterator for the first operand
6116 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
6117 to register_operand.
6118 (*extzv<mode>): Use SWI248 mode iterator for the first operand
6119 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
6120 to register_operand.
6121 (*extzvqi): Use SWI248 mode iterator instead of SImode for
6122 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
6123 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
6125 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
6126 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
6127 mode iterator for the first operand of ZERO_EXTRACT RTX.
6128 Change ext_register_operand predicate to register_operand.
6129 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
6130 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
6132 (*insvqi_1): Use SWI248 mode iterator instead of SImode
6133 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
6134 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
6135 predicate to register_operand.
6138 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
6139 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
6140 mode iterator for the first operand of ZERO_EXTRACT RTX.
6141 Change ext_register_operand predicate to register_operand.
6142 (addqi_ext_1): New expander.
6143 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
6144 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
6145 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
6146 to register_operand. Rename from *addqi_ext_1.
6147 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
6148 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
6149 (udivmodqi4): Ditto.
6150 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
6151 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
6152 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
6153 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
6154 to register_operand. Rename from *testqi_ext_1.
6155 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
6156 (andqi_ext_1): New expander.
6157 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
6158 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
6159 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
6160 to register_operand. Rename from andqi_ext_1.
6161 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
6162 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
6163 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
6164 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
6165 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
6166 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
6167 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
6168 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
6169 to register_operand. Rename from *xorqi_ext_1_cc.
6170 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
6171 in mode, matching its first operand.
6172 (promote_duplicated_reg): Update for renamed insv<mode>_1.
6173 * config/i386/predicates.md (ext_register_operand): Remove predicate.
6175 2020-06-18 Martin Sebor <msebor@redhat.com>
6179 * builtins.c (compute_objsize): Remove call to
6180 compute_builtin_object_size and instead compute conservative sizes
6183 2020-06-18 Martin Liska <mliska@suse.cz>
6185 * coretypes.h (struct iterator_range): New type.
6186 * tree-vect-patterns.c (vect_determine_precisions): Use
6187 range-based iterator.
6188 (vect_pattern_recog): Likewise.
6189 * tree-vect-slp.c (_bb_vec_info): Likewise.
6190 (_bb_vec_info::~_bb_vec_info): Likewise.
6191 (vect_slp_check_for_constructors): Likewise.
6192 * tree-vectorizer.h:Add new iterators
6193 and functions that use it.
6195 2020-06-18 Martin Liska <mliska@suse.cz>
6197 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
6198 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
6199 of a VEC_COND_EXPR cannot be tcc_comparison and so that
6200 a SSA_NAME needs to be created before we use it for the first
6201 argument of the VEC_COND_EXPR.
6202 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
6204 2020-06-18 Richard Biener <rguenther@suse.de>
6207 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
6208 to the target if necessary.
6209 (expand_vect_cond_mask_optab_fn): Likewise.
6211 2020-06-18 Martin Liska <mliska@suse.cz>
6213 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
6214 vcond as we check for NULL pointer.
6216 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
6218 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
6219 silence empty-body warning with gcc_fallthrough.
6221 2020-06-18 Jakub Jelinek <jakub@redhat.com>
6223 PR tree-optimization/95699
6224 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
6225 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
6226 declarations to the statements that set them where possible.
6228 2020-06-18 Jakub Jelinek <jakub@redhat.com>
6231 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
6232 scalar mode halfvectype other than vector boolean for
6233 VEC_PACK_TRUNC_EXPR.
6235 2020-06-18 Richard Biener <rguenther@suse.de>
6237 * varasm.c (assemble_variable): Make sure to not
6238 defer output when outputting addressed constants.
6239 (output_constant_def_contents): Likewise.
6240 (add_constant_to_table): Take and pass on whether to
6242 (output_addressed_constants): Likewise.
6243 (output_constant_def): Pass on whether to defer output
6244 to add_constant_to_table.
6245 (tree_output_constant_def): Defer output of constants.
6247 2020-06-18 Richard Biener <rguenther@suse.de>
6249 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
6250 (_slp_tree::lane_permutation): New member.
6251 (_slp_tree::code): Likewise.
6252 (SLP_TREE_TWO_OPERATORS): Remove.
6253 (SLP_TREE_LANE_PERMUTATION): New.
6254 (SLP_TREE_CODE): Likewise.
6255 (vect_stmt_dominates_stmt_p): Declare.
6256 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
6257 * tree-vect-stmts.c (vect_model_simple_cost): Remove
6258 SLP_TREE_TWO_OPERATORS handling.
6259 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
6260 (_slp_tree::~_slp_tree): Likewise.
6261 (vect_two_operations_perm_ok_p): Remove.
6262 (vect_build_slp_tree_1): Remove verification of two-operator
6264 (vect_build_slp_tree_2): When we have two different operators
6265 build two computation SLP nodes and a blend.
6266 (vect_print_slp_tree): Print the lane permutation if it exists.
6267 (slp_copy_subtree): Copy it.
6268 (vect_slp_rearrange_stmts): Re-arrange it.
6269 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
6270 VEC_PERM_EXPR explicitely.
6271 (vect_schedule_slp_instance): Likewise. Remove old
6272 SLP_TREE_TWO_OPERATORS code.
6273 (vectorizable_slp_permutation): New function.
6275 2020-06-18 Martin Liska <mliska@suse.cz>
6277 * tree-vect-generic.c (expand_vector_condition): Check
6278 for gassign before inspecting RHS.
6280 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
6282 * gimplify.c (omp_notice_threadprivate_variable)
6283 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
6284 diagnostic. Adjust all users.
6286 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
6288 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
6289 NULL_TREE' check earlier.
6291 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
6293 * doc/extend.texi (attribute access): Fix a typo.
6295 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
6296 Kaipeng Zhou <zhoukaipeng3@huawei.com>
6298 PR tree-optimization/95199
6299 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
6300 strided load/store operations and remove redundant code.
6302 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
6304 * coretypes.h (first_type): New alias template.
6305 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
6306 Remove spurious “...” and split the function type out into a typedef.
6308 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
6310 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
6313 2020-06-17 Richard Biener <rguenther@suse.de>
6315 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
6316 in *vectype parameter.
6317 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
6318 vect_build_slp_tree_1 computed.
6319 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
6320 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
6321 (vect_schedule_slp_instance): Likewise.
6322 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
6323 from SLP_TREE_VECTYPE.
6325 2020-06-17 Richard Biener <rguenther@suse.de>
6327 PR tree-optimization/95717
6328 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
6329 Move BB SSA updating before exit/latch PHI current def copying.
6331 2020-06-17 Martin Liska <mliska@suse.cz>
6333 * Makefile.in: Add new file.
6334 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
6335 not meet this condition.
6336 (do_store_flag): Likewise.
6337 * gimplify.c (gimplify_expr): Gimplify first argument of
6338 VEC_COND_EXPR to be a SSA name.
6339 * internal-fn.c (vec_cond_mask_direct): New.
6340 (vec_cond_direct): Likewise.
6341 (vec_condu_direct): Likewise.
6342 (vec_condeq_direct): Likewise.
6343 (expand_vect_cond_optab_fn): New.
6344 (expand_vec_cond_optab_fn): Likewise.
6345 (expand_vec_condu_optab_fn): Likewise.
6346 (expand_vec_condeq_optab_fn): Likewise.
6347 (expand_vect_cond_mask_optab_fn): Likewise.
6348 (expand_vec_cond_mask_optab_fn): Likewise.
6349 (direct_vec_cond_mask_optab_supported_p): Likewise.
6350 (direct_vec_cond_optab_supported_p): Likewise.
6351 (direct_vec_condu_optab_supported_p): Likewise.
6352 (direct_vec_condeq_optab_supported_p): Likewise.
6353 * internal-fn.def (VCOND): New OPTAB.
6355 (VCONDEQ): Likewise.
6356 (VCOND_MASK): Likewise.
6357 * optabs.c (get_rtx_code): Make it global.
6358 (expand_vec_cond_mask_expr): Removed.
6359 (expand_vec_cond_expr): Removed.
6360 * optabs.h (expand_vec_cond_expr): Likewise.
6361 (vector_compare_rtx): Make it global.
6362 * passes.def: Add new pass_gimple_isel pass.
6363 * tree-cfg.c (verify_gimple_assign_ternary): Add check
6364 for VEC_COND_EXPR about first argument.
6365 * tree-pass.h (make_pass_gimple_isel): New.
6366 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
6367 propagation of the first argument of a VEC_COND_EXPR.
6368 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
6369 first argument of a VEC_COND_EXPR.
6370 (optimize_vec_cond_expr): Likewise.
6371 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
6372 for a first argument of created VEC_COND_EXPR.
6373 (expand_vector_condition): Fix coding style.
6374 * tree-vect-stmts.c (vectorizable_condition): Gimplify
6376 * gimple-isel.cc: New file.
6378 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
6380 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
6381 (BSS_SECTION_ASM_OP): Use ".bss".
6382 (ASM_SPEC): Remove "-mattr=-code-object-v3".
6383 (LINK_SPEC): Add "--export-dynamic".
6384 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
6385 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
6386 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
6387 (load_image): Remove obsolete relocation handling.
6388 Add ".kd" suffix to the symbol names.
6389 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
6390 (gcn_option_override): Update gcn_isa test.
6391 (gcn_kernel_arg_types): Update all the assembler directives.
6392 Remove the obsolete options.
6393 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
6394 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
6396 (output_file_start): Rework assembler file header.
6397 (gcn_hsa_declare_function_name): Rework kernel metadata.
6398 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
6399 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
6400 (PROCESSOR_VEGA10): New enum value.
6401 (PROCESSOR_VEGA20): New enum value.
6403 2020-06-17 Martin Liska <mliska@suse.cz>
6405 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
6407 * gcov-tool.c (print_version): Likewise.
6408 * gcov.c (print_version): Likewise.
6410 2020-06-17 liuhongt <hongtao.liu@intel.com>
6413 * config/i386/i386-expand.c
6414 (ix86_expand_vec_shift_qihi_constant): New function.
6415 * config/i386/i386-protos.h
6416 (ix86_expand_vec_shift_qihi_constant): Declare.
6417 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
6418 V*QImode by constant.
6420 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
6422 PR tree-optimization/95649
6423 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
6424 value is a constant.
6426 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6428 * config.in: Regenerate.
6429 * config/s390/s390.c (print_operand): Emit vector alignment hints
6430 for target z13, if AS accepts them. For other targets the logic
6432 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
6434 * configure: Regenerate.
6435 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
6437 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6439 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
6441 (__arm_vaddq_m_n_s32): Likewise.
6442 (__arm_vaddq_m_n_s16): Likewise.
6443 (__arm_vaddq_m_n_u8): Likewise.
6444 (__arm_vaddq_m_n_u32): Likewise.
6445 (__arm_vaddq_m_n_u16): Likewise.
6446 (__arm_vaddq_m): Modify polymorphic variant.
6448 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6450 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
6451 and constraint of all the operands.
6452 (mve_sqrshrl_sat<supf>_di): Likewise.
6453 (mve_uqrshl_si): Likewise.
6454 (mve_sqrshr_si): Likewise.
6455 (mve_uqshll_di): Likewise.
6456 (mve_urshrl_di): Likewise.
6457 (mve_uqshl_si): Likewise.
6458 (mve_urshr_si): Likewise.
6459 (mve_sqshl_si): Likewise.
6460 (mve_srshr_si): Likewise.
6461 (mve_srshrl_di): Likewise.
6462 (mve_sqshll_di): Likewise.
6463 * config/arm/predicates.md (arm_low_register_operand): Define.
6465 2020-06-16 Jakub Jelinek <jakub@redhat.com>
6467 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
6468 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
6469 or dist_schedule clause on non-rectangular loops. Handle
6470 gimplification of non-rectangular lb/b expressions. When changing
6471 iteration variable, adjust also non-rectangular lb/b expressions
6473 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
6475 (struct omp_for_data): Add non_rect member.
6476 * omp-general.c (omp_extract_for_data): Handle non-rectangular
6477 loops. Fill in non_rect, m1, m2 and outer.
6478 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
6479 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
6480 non-rectangular loop cases and assert for cases that can't be
6482 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
6483 (dump_omp_loop_non_rect_expr): New function.
6484 (dump_generic_node): Handle non-rectangular OpenMP loops.
6485 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
6486 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
6489 2020-06-16 Richard Biener <rguenther@suse.de>
6492 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
6494 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
6497 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
6498 assertion and turn it into a early exit check.
6500 2020-06-15 Eric Botcazou <ebotcazou@adacore.com>
6502 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
6503 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
6504 true and all elements are zero, then always clear. Return GS_ERROR
6505 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
6506 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
6507 the type is aggregate non-addressable, ask gimplify_init_constructor
6508 whether it can generate a single access to the target.
6510 2020-06-15 Eric Botcazou <ebotcazou@adacore.com>
6512 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
6513 access on the LHS is replaced with a scalar access, propagate the
6514 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
6516 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
6518 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
6519 TARGET_THREADPTR reference.
6520 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
6521 targetm.have_tls instead of TARGET_HAVE_TLS.
6522 (xtensa_option_override): Set targetm.have_tls to false in
6523 configurations without THREADPTR.
6525 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
6527 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
6529 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
6530 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
6531 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
6532 xtensa_windowed_abi if needed.
6533 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
6535 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
6536 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
6538 (mabi=call0, mabi=windowed): New options.
6539 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
6541 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
6543 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
6544 (TARGET_CAN_ELIMINATE): New macro.
6545 * config/xtensa/xtensa.h
6546 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
6547 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
6548 (HARD_FRAME_POINTER_REGNUM): Define using
6549 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
6550 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
6551 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
6552 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
6554 2020-06-15 Felix Yang <felix.yang@huawei.com>
6556 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
6557 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
6559 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
6561 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
6562 LOOP_VINFO_DATAREFS when possible.
6563 (update_epilogue_loop_vinfo): Likewise.
6565 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
6567 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
6569 (riscv_gpr_save_operation_p): Change type to unsigned for i and
6572 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
6575 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
6577 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
6578 * config/i386/sse.md (mul<mode>3): Drop mask_name since
6579 there's no real simd int8 multiplication instruction with
6580 mask. Also optimize it under TARGET_AVX512BW.
6581 (mulv8qi3): New expander.
6583 2020-06-12 Marco Elver <elver@google.com>
6585 * gimplify.c (gimplify_function_tree): Optimize and do not emit
6586 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
6587 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
6588 * tsan.c (instrument_memory_accesses): Make
6589 fentry_exit_instrument bool depend on new param.
6591 2020-06-12 Felix Yang <felix.yang@huawei.com>
6593 PR tree-optimization/95570
6594 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
6595 (vect_verify_datarefs_alignment): Call it to filter out data references
6596 in the loop whose alignment is irrelevant.
6597 (vect_get_peeling_costs_all_drs): Likewise.
6598 (vect_peeling_supportable): Likewise.
6599 (vect_enhance_data_refs_alignment): Likewise.
6601 2020-06-12 Richard Biener <rguenther@suse.de>
6603 PR tree-optimization/95633
6604 * tree-vect-stmts.c (vectorizable_condition): Properly
6605 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
6607 2020-06-12 Martin Liška <mliska@suse.cz>
6609 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
6610 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
6612 * lto-wrapper.c (merge_and_complain): Wrap option names.
6614 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
6616 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
6617 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
6618 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
6619 (vect_set_loop_condition_masked): Renamed to ...
6620 (vect_set_loop_condition_partial_vectors): ... this. Rename
6621 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
6622 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
6623 (vect_set_loop_condition_unmasked): Renamed to ...
6624 (vect_set_loop_condition_normal): ... this.
6625 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
6626 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
6627 to vect_set_loop_condition_partial_vectors.
6628 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
6629 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
6630 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
6632 (vect_analyze_loop_costing): ... this.
6633 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
6635 (vect_min_prec_for_max_niters): New, factored out from ...
6636 (vect_verify_full_masking): ... this. Rename
6637 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
6638 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
6639 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
6640 (vectorizable_reduction): Update some dumpings with partial
6641 vectors instead of fully-masked.
6642 (vectorizable_live_operation): Likewise.
6643 (vect_iv_limit_for_full_masking): Renamed to ...
6644 (vect_iv_limit_for_partial_vectors): ... this.
6645 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
6646 (check_load_store_for_partial_vectors): ... this. Update some
6647 dumpings with partial vectors instead of fully-masked.
6648 (vectorizable_store): Rename check_load_store_masking to
6649 check_load_store_for_partial_vectors.
6650 (vectorizable_load): Likewise.
6651 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
6652 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
6653 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
6654 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
6655 (vect_iv_limit_for_full_masking): Renamed to ...
6656 (vect_iv_limit_for_partial_vectors): this.
6657 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
6658 Rename iv_type to rgroup_iv_type.
6660 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
6662 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
6663 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
6664 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
6665 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
6666 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
6667 (insn_gen_fn::operator()): Replace overloaded definitions with
6668 a parameter-pack version.
6670 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
6673 * config/i386/i386-features.c (rest_of_insert_endbranch):
6675 (rest_of_insert_endbr_and_patchable_area): Change return type
6676 to void. Add need_endbr and patchable_area_size arguments.
6677 Don't call timevar_push nor timevar_pop. Replace
6678 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
6679 UNSPECV_PATCHABLE_AREA for patchable area.
6680 (pass_data_insert_endbranch): Renamed to ...
6681 (pass_data_insert_endbr_and_patchable_area): This. Change
6682 pass name to endbr_and_patchable_area.
6683 (pass_insert_endbranch): Renamed to ...
6684 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
6685 and patchable_area_size;.
6686 (pass_insert_endbr_and_patchable_area::gate): Set and check
6687 need_endbr and patchable_area_size.
6688 (pass_insert_endbr_and_patchable_area::execute): Call
6689 timevar_push and timevar_pop. Pass need_endbr and
6690 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
6691 (make_pass_insert_endbranch): Renamed to ...
6692 (make_pass_insert_endbr_and_patchable_area): This.
6693 * config/i386/i386-passes.def: Replace pass_insert_endbranch
6694 with pass_insert_endbr_and_patchable_area.
6695 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
6696 (make_pass_insert_endbranch): Renamed to ...
6697 (make_pass_insert_endbr_and_patchable_area): This.
6698 * config/i386/i386.c (ix86_asm_output_function_label): Set
6699 function_label_emitted to true.
6700 (ix86_print_patchable_function_entry): New function.
6701 (ix86_output_patchable_area): Likewise.
6702 (x86_function_profiler): Replace endbr_queued_at_entrance with
6703 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
6704 Call ix86_output_patchable_area to generate patchable area if
6706 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
6707 * config/i386/i386.h (queued_insn_type): New.
6708 (machine_function): Add function_label_emitted. Replace
6709 endbr_queued_at_entrance with insn_queued_at_entrance.
6710 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
6711 (patchable_area): New.
6713 2020-06-11 Martin Liska <mliska@suse.cz>
6715 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
6718 2020-06-11 Martin Liska <mliska@suse.cz>
6721 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
6724 2020-06-11 Martin Liska <mliska@suse.cz>
6725 Jakub Jelinek <jakub@redhat.com>
6728 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
6729 by using Pmode instead of ptr_mode.
6731 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
6733 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
6734 (vect_set_loop_control): ... this.
6735 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
6736 (vect_set_loop_masks_directly): Renamed to ...
6737 (vect_set_loop_controls_directly): ... this. Also rename some
6738 variables with ctrl instead of mask. Rename vect_set_loop_mask to
6739 vect_set_loop_control.
6740 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
6741 Also rename some variables with ctrl instead of mask.
6742 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
6743 (release_vec_loop_controls): ... this. Rename rgroup_masks related
6745 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
6746 release_vec_loop_controls.
6747 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
6748 (vect_get_max_nscalars_per_iter): Likewise.
6749 (vect_estimate_min_profitable_iters): Likewise.
6750 (vect_record_loop_mask): Likewise.
6751 (vect_get_loop_mask): Likewise.
6752 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
6753 (struct rgroup_controls): ... this. Also rename mask_type
6754 to type and rename masks to controls.
6756 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
6758 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
6759 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
6760 (vect_gen_vector_loop_niters): Likewise.
6761 (vect_do_peeling): Likewise.
6762 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
6763 fully_masked_p to using_partial_vectors_p.
6764 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
6765 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
6766 (determine_peel_for_niter): Likewise.
6767 (vect_estimate_min_profitable_iters): Likewise.
6768 (vect_transform_loop): Likewise.
6769 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
6770 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
6772 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
6774 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
6775 can_fully_mask_p to can_use_partial_vectors_p.
6776 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
6777 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
6778 to saved_can_use_partial_vectors_p.
6779 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
6780 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
6781 (vectorizable_live_operation): Likewise.
6782 * tree-vect-stmts.c (permute_vec_elements): Likewise.
6783 (check_load_store_masking): Likewise.
6784 (vectorizable_operation): Likewise.
6785 (vectorizable_store): Likewise.
6786 (vectorizable_load): Likewise.
6787 (vectorizable_condition): Likewise.
6788 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
6789 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
6790 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
6792 2020-06-11 Martin Liska <mliska@suse.cz>
6794 * optc-save-gen.awk: Quote error string.
6796 2020-06-11 Alexandre Oliva <oliva@adacore.com>
6798 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
6800 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
6802 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
6803 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
6805 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
6806 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
6808 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
6810 * config/riscv/predicates.md (gpr_save_operation): New.
6811 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
6812 (riscv_gpr_save_operation_p): Ditto.
6813 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
6814 Ignore USEs for gpr_save patter.
6815 * config/riscv/riscv.c (gpr_save_reg_order): New.
6816 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
6817 (riscv_gen_gpr_save_insn): New.
6818 (riscv_gpr_save_operation_p): Ditto.
6819 * config/riscv/riscv.md (S3_REGNUM): New.
6826 (S10_REGNUM): Ditto.
6827 (S11_REGNUM): Ditto.
6828 (gpr_save): Model USEs correctly.
6830 2020-06-10 Martin Sebor <msebor@redhat.com>
6834 * builtins.c (inform_access): New function.
6835 (check_access): Call it. Add argument.
6836 (addr_decl_size): Remove.
6837 (get_range): New function.
6838 (compute_objsize): New overload. Only use compute_builtin_object_size
6839 with raw memory function.
6840 (check_memop_access): Pass new argument to compute_objsize and
6842 (expand_builtin_memchr, expand_builtin_strcat): Same.
6843 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
6844 (expand_builtin_stpncpy, check_strncat_sizes): Same.
6845 (expand_builtin_strncat, expand_builtin_strncpy): Same.
6846 (expand_builtin_memcmp): Same.
6847 * builtins.h (check_nul_terminated_array): Declare extern.
6848 (check_access): Add argument.
6849 (struct access_ref, struct access_data): New structs.
6850 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
6851 (builtin_access::overlap): Call it.
6852 * tree-object-size.c (decl_init_size): Declare extern.
6853 (addr_object_size): Correct offset computation.
6854 * tree-object-size.h (decl_init_size): Declare.
6855 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
6856 to maybe_warn_overflow when assigning to an SSA_NAME.
6858 2020-06-10 Richard Biener <rguenther@suse.de>
6860 * tree-vect-loop.c (vect_determine_vectorization_factor):
6862 (_loop_vec_info::_loop_vec_info): Likewise.
6863 (vect_update_vf_for_slp): Likewise.
6864 (vect_analyze_loop_operations): Likewise.
6865 (update_epilogue_loop_vinfo): Likewise.
6866 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
6867 (vect_pattern_recog): Likewise.
6868 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
6869 (_bb_vec_info::_bb_vec_info): Likewise.
6870 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
6873 2020-06-10 Richard Biener <rguenther@suse.de>
6875 PR tree-optimization/95576
6876 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
6878 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
6881 * config/aarch64/aarch64-sve-builtins.h
6882 (sve_switcher::m_old_maximum_field_alignment): New member.
6883 * config/aarch64/aarch64-sve-builtins.cc
6884 (sve_switcher::sve_switcher): Save maximum_field_alignment in
6885 m_old_maximum_field_alignment and clear maximum_field_alignment.
6886 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
6888 2020-06-10 Richard Biener <rguenther@suse.de>
6890 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
6892 (_stmt_vec_info::vec_stmts): Likewise.
6893 (vec_info::stmt_vec_info_ro): New flag.
6894 (vect_finish_replace_stmt): Adjust declaration.
6895 (vect_finish_stmt_generation): Likewise.
6896 (vectorizable_induction): Likewise.
6897 (vect_transform_reduction): Likewise.
6898 (vectorizable_lc_phi): Likewise.
6899 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
6900 allocate stmt infos for increments.
6901 (vect_record_grouped_load_vectors): Adjust.
6902 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
6903 (vectorize_fold_left_reduction): Likewise.
6904 (vect_transform_reduction): Likewise.
6905 (vect_transform_cycle_phi): Likewise.
6906 (vectorizable_lc_phi): Likewise.
6907 (vectorizable_induction): Likewise.
6908 (vectorizable_live_operation): Likewise.
6909 (vect_transform_loop): Likewise.
6910 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
6911 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
6912 (vect_get_slp_defs): Likewise.
6913 (vect_transform_slp_perm_load): Likewise.
6914 (vect_schedule_slp_instance): Likewise.
6915 (vectorize_slp_instance_root_stmt): Likewise.
6916 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
6917 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
6918 (vect_finish_replace_stmt): Do not return anything.
6919 (vect_finish_stmt_generation): Likewise.
6920 (vect_build_gather_load_calls): Adjust.
6921 (vectorizable_bswap): Likewise.
6922 (vectorizable_call): Likewise.
6923 (vectorizable_simd_clone_call): Likewise.
6924 (vect_create_vectorized_demotion_stmts): Likewise.
6925 (vectorizable_conversion): Likewise.
6926 (vectorizable_assignment): Likewise.
6927 (vectorizable_shift): Likewise.
6928 (vectorizable_operation): Likewise.
6929 (vectorizable_scan_store): Likewise.
6930 (vectorizable_store): Likewise.
6931 (vectorizable_load): Likewise.
6932 (vectorizable_condition): Likewise.
6933 (vectorizable_comparison): Likewise.
6934 (vect_transform_stmt): Likewise.
6935 * tree-vectorizer.c (vec_info::vec_info): Initialize
6937 (vec_info::replace_stmt): Copy over stmt UID rather than
6938 unsetting/setting a stmt info allocating a new UID.
6939 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
6941 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
6943 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
6945 * gimple-ssa-evrp.c (class evrp_folder): New.
6946 (class evrp_dom_walker): Remove.
6947 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
6948 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
6949 * tree-ssa-copy.c (copy_folder::get_value): Same.
6950 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
6951 Pass stmt to get_value.
6952 (substitute_and_fold_engine::replace_phi_args_in): Same.
6953 (substitute_and_fold_dom_walker::after_dom_children): Call
6955 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
6956 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
6957 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
6958 call virtual functions for folding, pre_folding, and post folding.
6959 Call get_value with PHI. Tweak dump.
6960 * tree-ssa-propagate.h (class substitute_and_fold_engine):
6961 New argument to get_value.
6962 New virtual function pre_fold_bb.
6963 New virtual function post_fold_bb.
6964 New virtual function pre_fold_stmt.
6965 New virtual function post_new_stmt.
6966 New function propagate_into_phi_args.
6967 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
6968 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
6970 (vr_values::fold_cond): New.
6971 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
6972 * vr-values.h (class vr_values): Add
6973 simplify_cond_using_ranges_when_edge_is_known.
6975 2020-06-10 Martin Liska <mliska@suse.cz>
6978 * asan.c (asan_emit_stack_protection): Emit
6979 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
6982 2020-06-10 Tamar Christina <tamar.christina@arm.com>
6984 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
6986 2020-06-10 Richard Biener <rguenther@suse.de>
6988 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
6989 (vect_record_grouped_load_vectors): Likewise.
6990 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
6991 (vectorize_fold_left_reduction): Likewise.
6992 (vect_transform_reduction): Likewise.
6993 (vect_transform_cycle_phi): Likewise.
6994 (vectorizable_lc_phi): Likewise.
6995 (vectorizable_induction): Likewise.
6996 (vectorizable_live_operation): Likewise.
6997 (vect_transform_loop): Likewise.
6998 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
7000 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
7001 (vect_get_vec_def_for_operand): Likewise.
7002 (vect_get_vec_def_for_stmt_copy): Likewise.
7003 (vect_get_vec_defs_for_stmt_copy): Likewise.
7004 (vect_get_vec_defs_for_operand): New function.
7005 (vect_get_vec_defs): Likewise.
7006 (vect_build_gather_load_calls): Adjust.
7007 (vect_get_gather_scatter_ops): Likewise.
7008 (vectorizable_bswap): Likewise.
7009 (vectorizable_call): Likewise.
7010 (vectorizable_simd_clone_call): Likewise.
7011 (vect_get_loop_based_defs): Remove.
7012 (vect_create_vectorized_demotion_stmts): Adjust.
7013 (vectorizable_conversion): Likewise.
7014 (vectorizable_assignment): Likewise.
7015 (vectorizable_shift): Likewise.
7016 (vectorizable_operation): Likewise.
7017 (vectorizable_scan_store): Likewise.
7018 (vectorizable_store): Likewise.
7019 (vectorizable_load): Likewise.
7020 (vectorizable_condition): Likewise.
7021 (vectorizable_comparison): Likewise.
7022 (vect_transform_stmt): Adjust and remove no longer applicable
7024 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
7025 STMT_VINFO_VEC_STMTS.
7026 (vec_info::free_stmt_vec_info): Relase it.
7027 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
7028 (_stmt_vec_info::vec_stmts): Add.
7029 (STMT_VINFO_VEC_STMT): Remove.
7030 (STMT_VINFO_VEC_STMTS): New.
7031 (vect_get_vec_def_for_operand_1): Remove.
7032 (vect_get_vec_def_for_operand): Likewise.
7033 (vect_get_vec_defs_for_stmt_copy): Likewise.
7034 (vect_get_vec_def_for_stmt_copy): Likewise.
7035 (vect_get_vec_defs): New overloads.
7036 (vect_get_vec_defs_for_operand): New.
7037 (vect_get_slp_defs): Declare.
7039 2020-06-10 Qian Chao <qianchao9@huawei.com>
7041 PR tree-optimization/95569
7042 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
7044 2020-06-10 Martin Liska <mliska@suse.cz>
7046 PR tree-optimization/92860
7047 * optc-save-gen.awk: Generate new function cl_optimization_compare.
7048 * opth-gen.awk: Generate declaration of the function.
7050 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
7052 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
7053 'future' PowerPC platform.
7054 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
7055 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
7056 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
7058 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
7059 (rs6000_clone_map): Add 'future' system target_clones support.
7061 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
7063 * Makefile.in (ZSTD_INC): Define.
7064 (ZSTD_LIB): Include ZSTD_LDFLAGS.
7065 (CFLAGS-lto-compress.o): Add ZSTD_INC.
7066 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
7068 * configure: Rebuilt.
7070 2020-06-09 Jason Merrill <jason@redhat.com>
7073 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
7075 2020-06-09 Marco Elver <elver@google.com>
7077 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
7078 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
7079 builtin for volatile instrumentation of reads/writes.
7080 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
7081 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
7082 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
7083 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
7084 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
7085 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
7086 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
7087 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
7088 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
7089 * tsan.c (get_memory_access_decl): Argument if access is
7090 volatile. If param tsan-distinguish-volatile is non-zero, and
7091 access if volatile, return volatile instrumentation decl.
7092 (instrument_expr): Check if access is volatile.
7094 2020-06-09 Richard Biener <rguenther@suse.de>
7096 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
7098 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
7100 * omp-offload.c (add_decls_addresses_to_decl_constructor,
7101 omp_finish_file): With in_lto_p, stream out all offload-table
7102 items even if the symtab_node does not exist.
7104 2020-06-09 Richard Biener <rguenther@suse.de>
7106 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
7108 2020-06-09 Martin Liska <mliska@suse.cz>
7110 * gcov-dump.c (print_usage): Fix spacing for --raw option
7113 2020-06-09 Martin Liska <mliska@suse.cz>
7115 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
7116 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
7117 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
7118 Handle all sanitizer options.
7119 (can_inline_edge_p): Use renamed CIF_* enum value.
7121 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
7123 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
7125 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
7126 (@aarch64_bic<mode>): Enable unpacked BIC.
7127 (*bic<mode>3): Enable unpacked BIC.
7129 2020-06-09 Martin Liska <mliska@suse.cz>
7131 PR gcov-profile/95365
7132 * doc/gcov.texi: Compile and link one example in 2 steps.
7134 2020-06-09 Jakub Jelinek <jakub@redhat.com>
7136 PR tree-optimization/95527
7137 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
7139 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
7141 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
7142 'future' PowerPC platform.
7143 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
7144 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
7145 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
7147 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
7148 (rs6000_clone_map): Add 'future' system target_clones support.
7150 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
7154 * omp-offload.c (add_decls_addresses_to_decl_constructor,
7155 omp_finish_file): Skip removed items.
7156 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
7157 to this node for variables and functions.
7159 2020-06-08 Jason Merrill <jason@redhat.com>
7161 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
7162 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
7163 * configure: Regenerate.
7165 2020-06-08 Martin Sebor <msebor@redhat.com>
7167 * postreload.c (reload_cse_simplify_operands): Clear first array element
7168 before using it. Assert a precondition.
7170 2020-06-08 Jakub Jelinek <jakub@redhat.com>
7173 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
7174 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
7175 type is vector boolean.
7177 2020-06-08 Tamar Christina <tamar.christina@arm.com>
7179 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
7181 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
7183 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
7184 instead of VFP_REGS.
7186 2020-06-08 Martin Liska <mliska@suse.cz>
7188 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
7189 in all vcond* patterns.
7191 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
7193 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
7194 Define. No longer include <algorithm>.
7196 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
7198 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
7199 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
7200 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
7201 (parityhi2, parityqi2): New expanders.
7202 (parityhi2_cmp): Implement set parity flag with xorb insn.
7203 (parityqi2_cmp): Implement set parity flag with testb insn.
7204 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
7206 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
7209 * config/rs6000/rs6000.c (rs6000_option_override_internal):
7210 Override flag_cunroll_grow_size.
7212 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
7214 * common.opt (flag_cunroll_grow_size): New flag.
7215 * toplev.c (process_options): Set flag_cunroll_grow_size.
7216 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
7217 Use flag_cunroll_grow_size.
7219 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
7222 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
7223 (ipa_odr_summary_write): Update streaming.
7224 (ipa_odr_read_section): Update streaming.
7226 2020-06-06 Alexandre Oliva <oliva@adacore.com>
7229 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
7231 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
7232 Julian Brown <julian@codesourcery.com>
7234 * gimplify.c (gimplify_adjust_omp_clauses): Remove
7235 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
7237 2020-06-05 Richard Biener <rguenther@suse.de>
7239 PR tree-optimization/95539
7240 * tree-vect-data-refs.c
7241 (vect_slp_analyze_and_verify_instance_alignment): Use
7242 SLP_TREE_REPRESENTATIVE for the data-ref check.
7243 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
7244 back to the first scalar stmt rather than the
7245 SLP_TREE_REPRESENTATIVE to match previous behavior.
7247 2020-06-05 Felix Yang <felix.yang@huawei.com>
7250 * expr.c (emit_move_insn): Check src and dest of the copy to see
7251 if one or both of them are subregs, try to remove the subregs when
7252 innermode and outermode are equal in size and the mode change involves
7253 an implicit round trip through memory.
7255 2020-06-05 Jakub Jelinek <jakub@redhat.com>
7258 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
7259 define_insn_and_split patterns.
7260 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
7261 define_insn patterns.
7263 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
7265 * alloc-pool.h (object_allocator::remove_raw): New.
7266 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
7267 (occurrence::occurrence): Add.
7268 (occurrence::~occurrence): Likewise.
7269 (occurrence::new): Likewise.
7270 (occurrence::delete): Likewise.
7272 (insert_bb): Use new occurence (...) instead of occ_new.
7273 (register_division_in): Likewise.
7274 (free_bb): Use delete occ instead of manually removing
7277 2020-06-05 Richard Biener <rguenther@suse.de>
7280 * cfgexpand.c (expand_debug_expr): Avoid calling
7281 set_mem_attributes_minus_bitpos when we were expanding
7283 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
7284 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
7285 special-cases we do not want MEM_EXPRs for. Assert
7286 we end up with reasonable MEM_EXPRs.
7288 2020-06-05 Lili Cui <lili.cui@intel.com>
7291 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
7293 2020-06-04 Martin Sebor <msebor@redhat.com>
7297 * attribs.c (init_attr_rdwr_indices): Move function here.
7298 * attribs.h (rdwr_access_hash, rdwr_map): Define.
7299 (attr_access): Add 'none'.
7300 (init_attr_rdwr_indices): Declared function.
7301 * builtins.c (warn_for_access)): New function.
7302 (check_access): Call it.
7303 * builtins.h (checK-access): Add an optional argument.
7304 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
7305 (init_attr_rdwr_indices): Declare extern.
7306 (append_attrname): Handle attr_access::none.
7307 (maybe_warn_rdwr_sizes): Same.
7308 (initialize_argument_information): Update comments.
7309 * doc/extend.texi (attribute access): Document 'none'.
7310 * tree-ssa-uninit.c (struct wlimits): New.
7311 (maybe_warn_operand): New function.
7312 (maybe_warn_pass_by_reference): Same.
7313 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
7314 Also call for function calls.
7315 (pass_late_warn_uninitialized::execute): Adjust comments.
7316 (execute_early_warn_uninitialized): Same.
7318 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
7321 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
7322 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
7323 reload if the original insn has it too.
7325 2020-06-04 Richard Biener <rguenther@suse.de>
7327 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
7328 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
7330 2020-06-04 Martin Jambor <mjambor@suse.cz>
7333 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
7334 exceptions check to...
7335 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
7337 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
7338 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
7341 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7344 * config/arm/predicates.md (mve_scatter_memory): Define to
7345 match (mem (reg)) for scatter store memory.
7346 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
7347 define_insn to define_expand.
7348 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
7349 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
7350 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
7351 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
7352 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
7353 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
7354 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
7355 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
7356 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
7357 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
7358 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
7359 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
7360 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
7361 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
7362 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
7363 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
7364 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
7365 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
7366 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
7367 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
7368 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
7370 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
7371 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
7372 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
7373 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
7374 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
7375 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
7376 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
7377 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
7378 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
7379 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
7380 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
7381 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
7382 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
7383 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
7384 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
7385 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
7386 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
7387 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
7388 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
7389 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
7391 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7393 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
7395 (__arm_vbicq_n_s16): Likewise.
7396 (__arm_vbicq_n_u32): Likewise.
7397 (__arm_vbicq_n_s32): Likewise.
7398 (__arm_vbicq): Modify polymorphic variant.
7400 2020-06-04 Richard Biener <rguenther@suse.de>
7402 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
7403 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
7404 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
7405 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
7406 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
7408 (vect_get_slp_defs): ... here.
7409 (vect_get_slp_vect_def): New function.
7411 2020-06-04 Richard Biener <rguenther@suse.de>
7413 * tree-vectorizer.h (_slp_tree::lanes): New.
7414 (SLP_TREE_LANES): Likewise.
7415 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
7416 (vectorizable_reduction): Likewise.
7417 (vect_transform_cycle_phi): Likewise.
7418 (vectorizable_induction): Likewise.
7419 (vectorizable_live_operation): Likewise.
7420 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
7421 (vect_create_new_slp_node): Likewise.
7422 (slp_copy_subtree): Copy it.
7423 (vect_optimize_slp): Use it.
7424 (vect_slp_analyze_node_operations_1): Likewise.
7425 (vect_slp_convert_to_external): Likewise.
7426 (vect_bb_vectorization_profitable_p): Likewise.
7427 * tree-vect-stmts.c (vectorizable_load): Likewise.
7428 (get_vectype_for_scalar_type): Likewise.
7430 2020-06-04 Richard Biener <rguenther@suse.de>
7432 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
7433 (vect_build_slp_tree_2): Simplify building all external op
7435 (vect_slp_analyze_node_operations): Remove push/pop of
7436 STMT_VINFO_DEF_TYPE.
7437 (vect_schedule_slp_instance): Likewise.
7438 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
7439 stmt_info, use the vect_is_simple_use overload combining
7440 SLP and stmt_info analysis.
7441 (vect_is_simple_cond): Likewise.
7442 (vectorizable_store): Adjust.
7443 (vectorizable_condition): Likewise.
7444 (vect_is_simple_use): Fully handle invariant SLP nodes
7445 here. Amend stmt_info operand extraction with COND_EXPR
7447 * tree-vect-loop.c (vectorizable_reduction): Deal with
7448 COND_EXPR representation ugliness.
7450 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
7453 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
7454 Refine from *vcvtps2ph_store<mask_name>.
7455 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
7456 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
7457 (*vcvtps2ph256<merge_mask_name>): New define_insn.
7458 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
7459 * config/i386/subst.md (merge_mask): New define_subst.
7460 (merge_mask_name): New define_subst_attr.
7461 (merge_mask_operand3): Ditto.
7463 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
7465 PR tree-optimization/89430
7467 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
7468 remove ssa_name_ver, store, offset fields.
7469 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
7470 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
7471 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
7474 2020-06-04 Andreas Schwab <schwab@suse.de>
7477 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
7479 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
7481 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
7482 (trunc<mode><pmov_dst_3_lower>2): Refine from
7483 trunc<mode><pmov_dst_3>2.
7485 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
7487 * match.pd (tanh/sinh -> 1/cosh): New simplification.
7489 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
7492 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
7493 is_lfs_stfs_insn and make it recognize lfs as well.
7494 (prefixed_store_p): Use is_lfs_stfs_insn().
7495 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
7497 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
7499 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
7501 (odr_enums): New static var.
7502 (struct odr_enum_val): New struct.
7503 (class odr_enum): New struct.
7504 (odr_enum_map): New hashtable.
7505 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
7506 (add_type_duplicate): Likewise.
7507 (free_odr_warning_data): Do not free TYPE_VALUES.
7508 (register_odr_enum): New function.
7509 (ipa_odr_summary_write): New function.
7510 (ipa_odr_read_section): New function.
7511 (ipa_odr_summary_read): New function.
7512 (class pass_ipa_odr): New pass.
7513 (make_pass_ipa_odr): New function.
7514 * ipa-utils.h (register_odr_enum): Declare.
7515 * lto-section-in.c: (lto_section_name): Add odr_types section.
7516 * lto-streamer.h (enum lto_section_type): Add odr_types section.
7517 * passes.def: Add odr_types pass.
7518 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
7520 (hash_tree): Likewise.
7521 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
7523 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
7525 * timevar.def (TV_IPA_ODR): New timervar.
7526 * tree-pass.h (make_pass_ipa_odr): Declare.
7527 * tree.c (free_lang_data_in_type): Regiser ODR types.
7529 2020-06-03 Romain Naour <romain.naour@gmail.com>
7531 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
7534 2020-06-03 Richard Biener <rguenther@suse.de>
7536 PR tree-optimization/95487
7537 * tree-vect-stmts.c (vectorizable_store): Use a truth type
7538 for the scatter mask.
7540 2020-06-03 Richard Biener <rguenther@suse.de>
7542 PR tree-optimization/95495
7543 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
7544 SLP_TREE_REPRESENTATIVE in the shift assertion.
7546 2020-06-03 Tom Tromey <tromey@adacore.com>
7548 * spellcheck.c (CASE_COST): New define.
7549 (BASE_COST): New define.
7550 (get_edit_distance): Recognize case changes.
7551 (get_edit_distance_cutoff): Update.
7552 (test_edit_distances): Update.
7553 (get_old_cutoff): Update.
7554 (test_find_closest_string): Add case sensitivity test.
7556 2020-06-03 Richard Biener <rguenther@suse.de>
7558 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
7559 the cost vector to unset the visited flag on stmts.
7561 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
7563 * gimplify.c (omp_notice_variable): Use new hook.
7564 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
7565 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
7566 (LANG_HOOKS_DECLS): Add it.
7567 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
7568 (lhd_omp_predetermined_mapping): New.
7569 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
7571 2020-06-03 Jan Hubicka <jh@suse.cz>
7573 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
7574 add LTO_first_tree_tag and LTO_first_gimple_tag.
7575 (lto_tag_is_tree_code_p): Update.
7576 (lto_tag_is_gimple_code_p): Update.
7577 (lto_gimple_code_to_tag): Update.
7578 (lto_tag_to_gimple_code): Update.
7579 (lto_tree_code_to_tag): Update.
7580 (lto_tag_to_tree_code): Update.
7582 2020-06-02 Felix Yang <felix.yang@huawei.com>
7585 * config/aarch64/aarch64.c (aarch64_short_vector_p):
7586 Leave later code to report an error if SVE is disabled.
7588 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
7590 * config/aarch64/aarch64-cores.def (zeus): Define.
7591 * config/aarch64/aarch64-tune.md: Regenerate.
7592 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
7594 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
7597 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
7599 (is_stfs_insn): New helper function.
7601 2020-06-02 Jan Hubicka <jh@suse.cz>
7603 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
7605 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
7607 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
7609 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
7610 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
7611 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
7613 2020-06-02 Eric Botcazou <ebotcazou@adacore.com>
7616 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
7617 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
7619 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7621 * config/s390/s390.c (print_operand): Emit vector alignment
7624 2020-06-02 Martin Liska <mliska@suse.cz>
7626 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
7627 as they have variable number of counters.
7628 * gcov-dump.c (main): Add new option -r.
7629 (print_usage): Likewise.
7630 (tag_counters): All new raw format.
7631 * gcov-io.h (struct gcov_kvp): New.
7632 (GCOV_TOPN_VALUES): Remove.
7633 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
7634 (GCOV_TOPN_MEM_COUNTERS): New.
7635 (GCOV_TOPN_DISK_COUNTERS): Likewise.
7636 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
7637 * ipa-profile.c (ipa_profile_generate_summary): Use
7638 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
7639 (ipa_profile_write_edge_summary): Likewise.
7640 (ipa_profile_read_edge_summary): Likewise.
7641 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
7642 * profile.c (sort_hist_values): Sort variable number
7644 (compute_value_histograms): Special case for TOP N counters
7645 that have dynamic number of key-value pairs.
7646 * value-prof.c (dump_histogram_value): Dump variable number
7648 (stream_in_histogram_value): Stream in variable number
7649 of key-value pairs for TOP N counter.
7650 (get_nth_most_common_value): Deal with variable number
7652 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
7654 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
7656 * doc/gcov-dump.texi: Document new -r option.
7658 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
7661 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
7663 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
7665 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
7666 returns (const_int 0) for the destination, then emit nothing.
7668 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
7670 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
7671 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
7672 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
7673 LTO_const_decl_ref, LTO_imported_decl_ref,
7674 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
7675 LTO_namelist_decl_ref; add LTO_global_stream_ref.
7676 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
7677 (lto_input_scc): Update.
7678 (lto_input_tree_1): Update.
7679 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
7680 * lto-streamer.c (lto_tag_name): Update.
7682 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
7684 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
7685 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
7686 * lto-cgraph.c (lto_output_node): Likewise.
7687 (lto_output_varpool_node): Likewise.
7688 (output_offload_tables): Likewise.
7689 (input_node): Likewise.
7690 (input_varpool_node): Likewise.
7691 (input_offload_tables): Likewise.
7692 * lto-streamer-in.c (lto_input_tree_ref): Declare.
7693 (lto_input_var_decl_ref): Declare.
7694 (lto_input_fn_decl_ref): Declare.
7695 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
7696 (lto_output_var_decl_index): Rename to ..
7697 (lto_output_var_decl_ref): ... this.
7698 (lto_output_fn_decl_index): Rename to ...
7699 (lto_output_fn_decl_ref): ... this.
7700 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
7701 (DEFINE_DECL_STREAM_FUNCS): Remove.
7702 (lto_output_var_decl_index): Remove.
7703 (lto_output_fn_decl_index): Remove.
7704 (lto_output_var_decl_ref): Declare.
7705 (lto_output_fn_decl_ref): Declare.
7706 (lto_input_var_decl_ref): Declare.
7707 (lto_input_fn_decl_ref): Declare.
7709 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
7711 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
7712 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
7713 dump infomation if there is no adjusted parameter.
7714 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
7716 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
7718 * Makefile.in (gimple-array-bounds.o): New.
7719 * tree-vrp.c: Move array bounds code...
7720 * gimple-array-bounds.cc: ...here...
7721 * gimple-array-bounds.h: ...and here.
7723 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
7725 * Makefile.in (OBJS): Add value-range-equiv.o.
7726 * tree-vrp.c (*value_range_equiv*): Move to...
7727 * value-range-equiv.cc: ...here.
7728 * tree-vrp.h (class value_range_equiv): Move to...
7729 * value-range-equiv.h: ...here.
7730 * vr-values.h: Include value-range-equiv.h.
7732 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
7735 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
7736 lattice for simple pass-through by-ref argument.
7738 2020-05-31 Jeff Law <law@redhat.com>
7740 * lra.c (add_auto_inc_notes): Remove function.
7741 * reload1.c (add_auto_inc_notes): Similarly. Move into...
7742 * rtlanal.c (add_auto_inc_notes): New function.
7743 * rtl.h (add_auto_inc_notes): Add prototype.
7744 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
7747 2020-05-31 Jan Hubicka <jh@suse.cz>
7749 * lto-section-out.c (lto_output_decl_index): Remove.
7750 (lto_output_field_decl_index): Move to lto-streamer-out.c
7751 (lto_output_fn_decl_index): Move to lto-streamer-out.c
7752 (lto_output_namespace_decl_index): Remove.
7753 (lto_output_var_decl_index): Remove.
7754 (lto_output_type_decl_index): Remove.
7755 (lto_output_type_ref_index): Remove.
7756 * lto-streamer-out.c (output_type_ref): Remove.
7757 (lto_get_index): New function.
7758 (lto_output_tree_ref): Remove.
7759 (lto_indexable_tree_ref): New function.
7760 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
7761 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
7762 (stream_write_tree_ref): Update.
7763 (lto_output_tree): Update.
7764 * lto-streamer.h (lto_output_decl_index): Remove prototype.
7765 (lto_output_field_decl_index): Remove prototype.
7766 (lto_output_namespace_decl_index): Remove prototype.
7767 (lto_output_type_decl_index): Remove prototype.
7768 (lto_output_type_ref_index): Remove prototype.
7769 (lto_output_var_decl_index): Move.
7770 (lto_output_fn_decl_index): Move
7772 2020-05-31 Jakub Jelinek <jakub@redhat.com>
7775 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
7778 2020-05-31 Jeff Law <law@redhat.com>
7780 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
7782 2020-05-31 Jim Wilson <jimw@sifive.com>
7784 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
7786 2020-05-30 Jonathan Yong <10walls@gmail.com>
7788 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
7789 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
7790 import library, but also contains some functions that invoke
7791 others in KERNEL32.DLL.
7793 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
7795 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
7796 (altivec_vmrglw_direct): Ditto.
7797 (altivec_vperm_<mode>_direct): Ditto.
7798 (altivec_vperm_v8hiv16qi): Ditto.
7799 (*altivec_vperm_<mode>_uns_internal): Ditto.
7800 (*altivec_vpermr_<mode>_internal): Ditto.
7801 (vperm_v8hiv4si): Ditto.
7802 (vperm_v16qiv8hi): Ditto.
7804 2020-05-29 Jan Hubicka <jh@suse.cz>
7806 * lto-streamer-in.c (streamer_read_chain): Move here from
7808 (stream_read_tree_ref): New.
7809 (lto_input_tree_1): Simplify.
7810 * lto-streamer-out.c (stream_write_tree_ref): New.
7811 (lto_write_tree_1): Simplify.
7812 (lto_output_tree_1): Simplify.
7813 (DFS::DFS_write_tree): Simplify.
7814 (streamer_write_chain): Move here from tree-stremaer-out.c.
7815 * lto-streamer.h (lto_output_tree_ref): Update prototype.
7816 (stream_read_tree_ref): Declare
7817 (stream_write_tree_ref): Declare
7818 * tree-streamer-in.c (streamer_read_chain): Update to use
7819 stream_read_tree_ref.
7820 (lto_input_ts_common_tree_pointers): Likewise.
7821 (lto_input_ts_vector_tree_pointers): Likewise.
7822 (lto_input_ts_poly_tree_pointers): Likewise.
7823 (lto_input_ts_complex_tree_pointers): Likewise.
7824 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
7825 (lto_input_ts_decl_common_tree_pointers): Likewise.
7826 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
7827 (lto_input_ts_field_decl_tree_pointers): Likewise.
7828 (lto_input_ts_function_decl_tree_pointers): Likewise.
7829 (lto_input_ts_type_common_tree_pointers): Likewise.
7830 (lto_input_ts_type_non_common_tree_pointers): Likewise.
7831 (lto_input_ts_list_tree_pointers): Likewise.
7832 (lto_input_ts_vec_tree_pointers): Likewise.
7833 (lto_input_ts_exp_tree_pointers): Likewise.
7834 (lto_input_ts_block_tree_pointers): Likewise.
7835 (lto_input_ts_binfo_tree_pointers): Likewise.
7836 (lto_input_ts_constructor_tree_pointers): Likewise.
7837 (lto_input_ts_omp_clause_tree_pointers): Likewise.
7838 * tree-streamer-out.c (streamer_write_chain): Update to use
7839 stream_write_tree_ref.
7840 (write_ts_common_tree_pointers): Likewise.
7841 (write_ts_vector_tree_pointers): Likewise.
7842 (write_ts_poly_tree_pointers): Likewise.
7843 (write_ts_complex_tree_pointers): Likewise.
7844 (write_ts_decl_minimal_tree_pointers): Likewise.
7845 (write_ts_decl_common_tree_pointers): Likewise.
7846 (write_ts_decl_non_common_tree_pointers): Likewise.
7847 (write_ts_decl_with_vis_tree_pointers): Likewise.
7848 (write_ts_field_decl_tree_pointers): Likewise.
7849 (write_ts_function_decl_tree_pointers): Likewise.
7850 (write_ts_type_common_tree_pointers): Likewise.
7851 (write_ts_type_non_common_tree_pointers): Likewise.
7852 (write_ts_list_tree_pointers): Likewise.
7853 (write_ts_vec_tree_pointers): Likewise.
7854 (write_ts_exp_tree_pointers): Likewise.
7855 (write_ts_block_tree_pointers): Likewise.
7856 (write_ts_binfo_tree_pointers): Likewise.
7857 (write_ts_constructor_tree_pointers): Likewise.
7858 (write_ts_omp_clause_tree_pointers): Likewise.
7859 (streamer_write_tree_body): Likewise.
7860 (streamer_write_integer_cst): Likewise.
7861 * tree-streamer.h (streamer_read_chain):Declare.
7862 (streamer_write_chain):Declare.
7863 (streamer_write_tree_body): Update prototype.
7864 (streamer_write_integer_cst): Update prototype.
7866 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
7869 * configure: Regenerated.
7871 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
7873 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
7874 (add<mode>3_vcc_zext_dup_exec): Likewise.
7875 (add<mode>3_vcc_zext_dup2): Likewise.
7876 (add<mode>3_vcc_zext_dup2_exec): Likewise.
7878 2020-05-29 Richard Biener <rguenther@suse.de>
7880 PR tree-optimization/95272
7881 * tree-vectorizer.h (_slp_tree::representative): Add.
7882 (SLP_TREE_REPRESENTATIVE): Likewise.
7883 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
7885 (vectorizable_live_operation): Use the representative to
7886 attach the reduction info to.
7887 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
7888 SLP_TREE_REPRESENTATIVE.
7889 (vect_create_new_slp_node): Likewise.
7890 (slp_copy_subtree): Copy it.
7891 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
7892 (vect_slp_analyze_node_operations_1): Pass the representative
7893 to vect_analyze_stmt.
7894 (vect_schedule_slp_instance): Pass the representative to
7895 vect_transform_stmt.
7897 2020-05-29 Richard Biener <rguenther@suse.de>
7899 PR tree-optimization/95356
7900 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
7901 node hacking during analysis.
7903 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
7906 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
7908 2020-05-29 Richard Biener <rguenther@suse.de>
7910 PR tree-optimization/95403
7911 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
7914 2020-05-29 Jakub Jelinek <jakub@redhat.com>
7917 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
7918 declare variant cgraph node removal callback.
7920 2020-05-29 Jakub Jelinek <jakub@redhat.com>
7923 * expr.c (store_expr): If expr_size is constant and significantly
7924 larger than TREE_STRING_LENGTH, set temp to just the
7925 TREE_STRING_LENGTH portion of the STRING_CST.
7927 2020-05-29 Richard Biener <rguenther@suse.de>
7929 PR tree-optimization/95393
7930 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
7931 to build the min/max expression so we simplify cases like
7932 MAX(0, s) immediately.
7934 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
7936 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
7937 for unpacked EOR, ORR, AND.
7939 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
7941 * Makefile.in: don't look for libiberty in the "pic" subdirectory
7942 when building for Mingw. Add dependency on xgcc with the proper
7945 2020-05-28 Jeff Law <law@redhat.com>
7947 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
7949 2020-05-28 Jeff Law <law@redhat.com>
7951 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
7952 make a nonzero adjustment to the memory offset.
7953 (b<ior,xor>hi_msx): Turn into a splitter.
7955 2020-05-28 Eric Botcazou <ebotcazou@adacore.com>
7957 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
7958 Fix off-by-one error.
7960 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
7962 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
7963 wb_candidate1 and wb_candidate2.
7964 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
7965 wb_candidate1 and wb_candidate2 if we decided not to use them.
7967 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
7970 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
7971 we have at least some CFI operations when using a frame pointer.
7972 Only redefine the CFA if we have CFI operations.
7974 2020-05-28 Richard Biener <rguenther@suse.de>
7976 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
7977 case for !SLP_TREE_VECTYPE.
7978 (vect_slp_analyze_node_operations): Adjust.
7980 2020-05-28 Richard Biener <rguenther@suse.de>
7982 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
7983 (SLP_TREE_VEC_DEFS): Likewise.
7984 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
7985 (_slp_tree::~_slp_tree): Likewise.
7986 (vect_mask_constant_operand_p): Remove unused function.
7987 (vect_get_constant_vectors): Rename to...
7988 (vect_create_constant_vectors): ... this. Take the
7989 invariant node as argument and code generate it. Remove
7990 dead code, remove temporary asserts. Pass a NULL stmt_info
7991 to vect_init_vector.
7992 (vect_get_slp_defs): Simplify.
7993 (vect_schedule_slp_instance): Code-generate externals and
7994 invariants using vect_create_constant_vectors.
7996 2020-05-28 Richard Biener <rguenther@suse.de>
7998 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
7999 Conditionalize stmt_info use, assert the new stmt cannot throw
8001 (vect_finish_stmt_generation): Adjust assert.
8003 2020-05-28 Richard Biener <rguenther@suse.de>
8005 PR tree-optimization/95273
8006 PR tree-optimization/95356
8007 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
8008 what we set the vector type of the shift operand SLP node
8011 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
8013 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
8016 2020-05-28 Martin Liska <mliska@suse.cz>
8019 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
8020 rename ipcp-unit-growth to ipa-cp-unit-growth.
8022 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
8024 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
8025 from *avx512vl_<code>v2div2qi_store and refine memory size of
8027 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
8028 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
8029 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
8030 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
8031 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
8032 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
8033 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
8034 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
8035 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
8036 (*avx512vl_<code>v2div2si2_store_1): Ditto.
8037 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
8038 (*avx512f_<code>v8div16qi2_store_1): Ditto.
8039 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
8040 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
8041 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
8042 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
8043 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
8044 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
8045 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
8046 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
8047 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
8048 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
8049 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
8050 (*avx512vl_<code>v2div2si2_store_2): Ditto.
8051 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
8052 (*avx512f_<code>v8div16qi2_store_2): Ditto.
8053 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
8054 * config/i386/i386-builtin-types.def: Adjust builtin type.
8055 * config/i386/i386-expand.c: Ditto.
8056 * config/i386/i386-builtin.def: Adjust builtin.
8057 * config/i386/avx512fintrin.h: Ditto.
8058 * config/i386/avx512vlbwintrin.h: Ditto.
8059 * config/i386/avx512vlintrin.h: Ditto.
8061 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
8063 PR gcov-profile/95332
8064 * gcov-io.c (gcov_var::endian): Move field.
8065 (from_file): Add IN_GCOV_TOOL check.
8066 * gcov-io.h (gcov_magic): Ditto.
8068 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
8070 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
8072 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
8074 2020-05-27 Eric Botcazou <ebotcazou@adacore.com>
8076 * builtin-types.def (BT_UINT128): New primitive type.
8077 (BT_FN_UINT128_UINT128): New function type.
8078 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
8079 * doc/extend.texi (__builtin_bswap128): Document it.
8080 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
8081 (is_inexpensive_builtin): Likewise.
8082 * fold-const-call.c (fold_const_call_ss): Likewise.
8083 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
8084 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
8085 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
8086 (vectorizable_call): Likewise.
8087 * optabs.c (expand_unop): Always use the double word path for it.
8088 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
8089 * tree.h (uint128_type_node): New global type.
8090 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
8092 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
8094 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
8095 (mmx_hsubv2sf3): Ditto.
8096 (mmx_haddsubv2sf3): New expander.
8097 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
8098 RTL template to model horizontal subtraction and addition.
8099 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
8102 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
8105 * config/i386/sse.md
8106 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
8107 Remove %q operand modifier from insn template.
8108 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
8110 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
8112 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
8113 Enable insn pattern for TARGET_MMX_WITH_SSE.
8114 (*mmx_movshdup): New insn pattern.
8115 (*mmx_movsldup): Ditto.
8116 (*mmx_movss): Ditto.
8117 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
8119 (expand_vec_perm_movs): Handle E_V2SFmode.
8120 (expand_vec_perm_even_odd): Ditto.
8121 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
8122 is already handled by standard shuffle patterns.
8124 2020-05-27 Richard Biener <rguenther@suse.de>
8126 PR tree-optimization/95295
8127 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
8128 merging stores from paths.
8130 2020-05-27 Richard Biener <rguenther@suse.de>
8132 PR tree-optimization/95356
8133 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
8134 type for the shift operand.
8136 2020-05-27 Richard Biener <rguenther@suse.de>
8138 PR tree-optimization/95335
8139 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
8140 lvisited for nodes made external.
8142 2020-05-27 Richard Biener <rguenther@suse.de>
8144 * dump-context.h (debug_dump_context): New class.
8145 (dump_context): Make it friend.
8146 * dumpfile.c (debug_dump_context::debug_dump_context):
8148 (debug_dump_context::~debug_dump_context): Likewise.
8149 * tree-vect-slp.c: Include dump-context.h.
8150 (vect_print_slp_tree): Dump a single SLP node.
8151 (debug): New overload for slp_tree.
8152 (vect_print_slp_graph): Rename from vect_print_slp_tree and
8154 (vect_analyze_slp_instance): Adjust.
8156 2020-05-27 Jakub Jelinek <jakub@redhat.com>
8159 * omp-general.c (omp_declare_variant_remove_hook): New function.
8160 (omp_resolve_declare_variant): Always return base if it is already
8161 declare_variant_alt magic decl itself. Register
8162 omp_declare_variant_remove_hook as cgraph node removal hook.
8164 2020-05-27 Jeff Law <law@redhat.com>
8166 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
8167 for the primary input operand.
8168 (tstsi_variable_bit_qi): Similarly.
8170 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
8172 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
8174 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
8177 * ipa-utils.h (odr_type_p): Also permit calls with
8178 only flag_generate_offload set.
8180 2020-05-26 Alexandre Oliva <oliva@adacore.com>
8182 * gcc.c (validate_switches): Add braced parameter. Adjust all
8183 callers. Expected and skip trailing brace only if braced.
8184 Return after handling one atom otherwise.
8185 (DUMPS_OPTIONS): New.
8186 (cpp_debug_options): Define in terms of it.
8188 2020-05-26 Richard Biener <rguenther@suse.de>
8190 PR tree-optimization/95327
8191 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
8192 when we are not using a scalar shift.
8194 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
8196 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
8197 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
8198 Handle E_V2SImode and E_V4HImode.
8199 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
8200 Assert that E_V2SImode is already handled.
8201 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
8202 is already handled by standard shuffle patterns.
8204 2020-05-26 Jan Hubicka <jh@suse.cz>
8206 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
8209 2020-05-26 Jakub Jelinek <jakub@redhat.com>
8212 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
8213 * omp-general.h (find_combined_omp_for): Declare.
8214 * omp-general.c: Include tree-iterator.h.
8215 (find_combined_omp_for): New function, moved from gimplify.c.
8217 2020-05-26 Alexandre Oliva <oliva@adacore.com>
8219 * common.opt (aux_base_name): Define.
8220 (dumpbase, dumpdir): Mark as Driver options.
8221 (-dumpbase, -dumpdir): Likewise.
8222 (dumpbase-ext, -dumpbase-ext): New.
8223 (auxbase, auxbase-strip): Drop.
8224 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
8226 (-o): Introduce the notion of primary output, mention it
8227 influences auxiliary and dump output names as well, add
8229 (-save-temps): Adjust, move examples into -dump*.
8230 (-save-temps=cwd, -save-temps=obj): Likewise.
8231 (-fdump-final-insns): Adjust.
8232 * dwarf2out.c (gen_producer_string): Drop auxbase and
8233 auxbase_strip; add dumpbase_ext.
8234 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
8235 (save_temps_prefix, save_temps_length): Drop.
8236 (save_temps_overrides_dumpdir): New.
8237 (dumpdir, dumpbase, dumpbase_ext): New.
8238 (dumpdir_length, dumpdir_trailing_dash_added): New.
8239 (outbase, outbase_length): New.
8240 (The Specs Language): Introduce %". Adjust %b and %B.
8241 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
8242 Precede object file with %w when it's the primary output.
8243 (cpp_debug_options): Do not pass on incoming -dumpdir,
8244 -dumpbase and -dumpbase-ext options; recompute them with
8246 (cc1_options): Drop auxbase with and without compare-debug;
8247 use cpp_debug_options instead of dumpbase. Mark asm output
8248 with %w when it's the primary output.
8249 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
8250 %:replace-exception. Add %:dumps.
8251 (driver_handle_option): Implement -save-temps=*/-dumpdir
8252 mutual overriding logic. Save dumpdir, dumpbase and
8253 dumpbase-ext options. Do not save output_file in
8255 (adds_single_suffix_p): New.
8256 (single_input_file_index): New.
8257 (process_command): Combine output dir, output base name, and
8258 dumpbase into dumpdir and outbase.
8259 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
8260 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
8261 and outbase instead of input_basename in %b, %B and in
8262 -save-temps aux files. Handle empty argument %".
8263 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
8264 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
8265 naming. Spec-quote the computed -fdump-final-insns file name.
8266 (debug_auxbase_opt): Drop.
8267 (compare_debug_self_opt_spec_function): Drop auxbase-strip
8269 (compare_debug_auxbase_opt_spec_function): Drop.
8270 (not_actual_file_p): New.
8271 (replace_extension_spec_func): Drop.
8272 (dumps_spec_func): New.
8273 (convert_white_space): Split-out parts into...
8274 (quote_string, whitespace_to_convert_p): ... these. New.
8275 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
8276 (driver::finalize): Release and reset new variables; drop
8278 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
8279 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
8280 empty string otherwise.
8281 (DUMPBASE_SUFFIX): Drop leading period.
8282 (debug_objcopy): Use concat.
8283 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
8284 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
8285 component. Simplify temp file names.
8286 * opts.c (finish_options): Drop aux base name handling.
8287 (common_handle_option): Drop auxbase-strip handling.
8288 * toplev.c (print_switch_values): Drop auxbase, add
8290 (process_options): Derive aux_base_name from dump_base_name
8292 (lang_dependent_init): Compute dump_base_ext along with
8293 dump_base_name. Disable stack usage and callgraph-info during
8294 lto generation and compare-debug recompilation.
8296 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
8297 Uroš Bizjak <ubizjak@gmail.com>
8301 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
8302 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
8303 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
8304 float<floatunssuffix>v2div2sf2.
8305 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
8306 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
8307 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
8308 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
8309 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
8310 * config/i386/i386-builtin.def: Ditto.
8311 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
8312 subregs when both omode and imode are vector mode and
8313 have the same inner mode.
8315 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
8317 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
8318 Only turn MEM_REFs into bit-field stores for small bit-field regions.
8319 (imm_store_chain_info::output_merged_store): Be prepared for sources
8320 with non-integral type in the bit-field insertion case.
8321 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
8322 the largest size for the bit-field case.
8324 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
8326 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
8327 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
8328 (*vec_dupv4hi): Redefine as define_insn.
8329 Remove alternative with general register input.
8330 (*vec_dupv2si): Ditto.
8332 2020-05-25 Richard Biener <rguenther@suse.de>
8334 PR tree-optimization/95309
8335 * tree-vect-slp.c (vect_get_constant_vectors): Move number
8336 of vector computation ...
8337 (vect_slp_analyze_node_operations): ... to analysis phase.
8339 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
8341 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
8342 * lto-streamer.h (streamer_debugging): New constant
8343 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
8344 streamer_debugging check.
8345 (streamer_get_pickled_tree): Likewise.
8346 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
8348 2020-05-25 Richard Biener <rguenther@suse.de>
8350 PR tree-optimization/95308
8351 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
8352 test for TARGET_MEM_REFs.
8354 2020-05-25 Richard Biener <rguenther@suse.de>
8356 PR tree-optimization/95295
8357 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
8358 RHSes and drop to full sm_other if they are not equal.
8360 2020-05-25 Richard Biener <rguenther@suse.de>
8362 PR tree-optimization/95271
8363 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
8364 children vector type.
8365 (vectorizable_call): Pass down slp ops.
8367 2020-05-25 Richard Biener <rguenther@suse.de>
8369 PR tree-optimization/95297
8370 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
8371 skip updating operand 1 vector type.
8373 2020-05-25 Richard Biener <rguenther@suse.de>
8375 PR tree-optimization/95284
8376 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
8379 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
8382 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
8383 (trunc<mode><sf2dfmode_lower>2) New expander.
8384 (extend<sf2dfmode_lower><mode>2): Ditto.
8386 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
8388 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
8389 ubsan_{data,type},ASAN symbols linker-visible.
8391 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
8393 * lto-streamer-out.c (DFS::DFS): Silence warning.
8395 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
8398 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
8399 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
8401 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
8403 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
8406 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
8408 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
8409 * lto-streamer-out.c (create_output_block): Fix whitespace
8410 (lto_write_tree_1): Add (debug) dump.
8411 (DFS::DFS): Add dump.
8412 (DFS::DFS_write_tree_body): Do not dump here.
8413 (lto_output_tree): Improve dumping; do not stream ref when not needed.
8414 (produce_asm_for_decls): Fix whitespace.
8415 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
8416 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
8418 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
8421 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
8422 (truncv32hiv32qi2): Ditto.
8423 (trunc<ssedoublemodelower><mode>2): Ditto.
8424 (trunc<mode><pmov_dst_3>2): Ditto.
8425 (trunc<mode><pmov_dst_mode_4>2): Ditto.
8426 (truncv2div2si2): Ditto.
8427 (truncv8div8qi2): Ditto.
8428 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
8429 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
8430 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
8431 *avx512vl_<code><mode>v<ssescalarnum>qi2.
8433 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
8436 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
8439 2020-05-22 Richard Biener <rguenther@suse.de>
8441 PR tree-optimization/95268
8442 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
8445 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
8447 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
8450 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
8452 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
8453 (lto_input_scc): Optimize streaming of entry lengths.
8454 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
8455 (DFS::DFS): Optimize stremaing of entry lengths
8457 2020-05-22 Richard Biener <rguenther@suse.de>
8460 * doc/invoke.texi (flto): Document behavior of diagnostic
8463 2020-05-22 Richard Biener <rguenther@suse.de>
8465 * tree-vectorizer.h (vect_is_simple_use): New overload.
8466 (vect_maybe_update_slp_op_vectype): New.
8467 * tree-vect-stmts.c (vect_is_simple_use): New overload
8468 accessing operands of SLP vs. non-SLP operation transparently.
8469 (vect_maybe_update_slp_op_vectype): New function updating
8470 the possibly shared SLP operands vector type.
8471 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
8472 using the new vect_is_simple_use overload; update SLP invariant
8473 operand nodes vector type.
8474 (vectorizable_comparison): Likewise.
8475 (vectorizable_call): Likewise.
8476 (vectorizable_conversion): Likewise.
8477 (vectorizable_shift): Likewise.
8478 (vectorizable_store): Likewise.
8479 (vectorizable_condition): Likewise.
8480 (vectorizable_assignment): Likewise.
8481 * tree-vect-loop.c (vectorizable_reduction): Likewise.
8482 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
8483 present SLP_TREE_VECTYPE and check it matches previous
8486 2020-05-22 Richard Biener <rguenther@suse.de>
8488 PR tree-optimization/95248
8489 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
8491 2020-05-22 Richard Biener <rguenther@suse.de>
8493 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
8494 (_slp_tree::~_slp_tree): Likewise.
8495 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
8497 (_slp_tree::~_slp_tree): Implement.
8498 (vect_free_slp_tree): Simplify.
8499 (vect_create_new_slp_node): Likewise. Add nops parameter.
8500 (vect_build_slp_tree_2): Adjust.
8501 (vect_analyze_slp_instance): Likewise.
8503 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
8505 * adjust-alignment.c: Include memmodel.h.
8507 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
8510 * config/i386/cpuid.h: Use hexadecimal in comments.
8512 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
8515 * config/i386/i386-builtins.c (processor_features): Move
8516 F_AVX512VP2INTERSECT after F_AVX512BF16.
8517 (isa_names_table): Likewise.
8519 2020-05-21 Martin Liska <mliska@suse.cz>
8521 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
8522 Handle OPT_moutline_atomics.
8523 * config/aarch64/aarch64.c: Add outline-atomics to
8525 * doc/extend.texi: Document the newly added target attribute.
8527 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
8531 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
8532 operands 1 and 2 commutative. Manually swap operands.
8533 (*mmx_nabsv2sf2): Ditto.
8536 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
8538 * config/i386/i386.md (*<code>tf2_1):
8539 Mark operands 1 and 2 commutative.
8540 (*nabstf2_1): Ditto.
8541 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
8542 commutative. Do not swap operands.
8543 (*nabs<mode>2): Ditto.
8545 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
8548 * config/i386/sse.md (<code>v8qiv8hi2): Use
8549 simplify_gen_subreg instead of simplify_subreg.
8550 (<code>v8qiv8si2): Ditto.
8551 (<code>v4qiv4si2): Ditto.
8552 (<code>v4hiv4si2): Ditto.
8553 (<code>v8qiv8di2): Ditto.
8554 (<code>v4qiv4di2): Ditto.
8555 (<code>v2qiv2di2): Ditto.
8556 (<code>v4hiv4di2): Ditto.
8557 (<code>v2hiv2di2): Ditto.
8558 (<code>v2siv2di2): Ditto.
8560 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
8563 * config/i386/i386.md (*pushsi2_rex64):
8564 Use "e" constraint instead of "i".
8566 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
8568 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
8569 (lto_input_tree_1): Strenghten sanity check.
8570 (lto_input_tree): Update call of lto_input_scc.
8571 * lto-streamer-out.c: Include ipa-utils.h
8572 (create_output_block): Initialize local_trees if merigng is going
8574 (destroy_output_block): Destroy local_trees.
8575 (DFS): Add max_local_entry.
8576 (local_tree_p): New function.
8577 (DFS::DFS): Initialize and maintain it.
8578 (DFS::DFS_write_tree): Decide on streaming format.
8579 (lto_output_tree): Stream inline singleton SCCs
8580 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
8581 (struct output_block): Add local_trees.
8582 (lto_input_scc): Update prototype.
8584 2020-05-20 Patrick Palka <ppalka@redhat.com>
8587 * hash-table.h (hash_table::find_with_hash): Move up the call to
8590 2020-05-20 Martin Liska <mliska@suse.cz>
8592 * lto-compress.c (lto_compression_zstd): Fill up
8593 num_compressed_il_bytes.
8594 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
8596 2020-05-20 Richard Biener <rguenther@suse.de>
8598 PR tree-optimization/95219
8599 * tree-vect-loop.c (vectorizable_induction): Reduce
8600 group_size before computing the number of required IVs.
8602 2020-05-20 Richard Biener <rguenther@suse.de>
8605 * tree-inline.c (remap_gimple_stmt): Revert adjusting
8606 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
8608 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8609 Andre Vieira <andre.simoesdiasvieira@arm.com>
8612 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
8614 (mve_vector_mem_operand): Likewise.
8615 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
8616 the load from memory to a core register is legitimate for give mode.
8617 (mve_vector_mem_operand): Define function.
8618 (arm_print_operand): Modify comment.
8619 (arm_mode_base_reg_class): Define.
8620 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
8621 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
8622 * config/arm/constraints.md (Ux): Likewise.
8624 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
8625 add support for missing Vector Store Register and Vector Load Register.
8626 Add a new alternative to support load from memory to PC (or label) in
8628 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
8629 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
8630 mve_memory_operand and also modify the MVE instructions to emit.
8631 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
8632 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
8633 mve_memory_operand and also modify the MVE instructions to emit.
8634 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
8635 mve_memory_operand and also modify the MVE instructions to emit.
8636 (mve_vldrhq_z_fv8hf): Likewise.
8637 (mve_vldrhq_z_<supf><mode>): Likewise.
8638 (mve_vldrwq_fv4sf): Likewise.
8639 (mve_vldrwq_<supf>v4si): Likewise.
8640 (mve_vldrwq_z_fv4sf): Likewise.
8641 (mve_vldrwq_z_<supf>v4si): Likewise.
8642 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
8643 (mve_vld1q_<supf><mode>): Likewise.
8644 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
8646 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
8647 mve_memory_operand and also modify the MVE instructions to emit.
8648 (mve_vstrhq_p_<supf><mode>): Likewise.
8649 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
8651 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
8652 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
8653 instructions to emit.
8654 (mve_vstrwq_p_<supf>v4si): Likewise.
8655 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
8656 * config/arm/predicates.md (mve_memory_operand): Define.
8658 2020-05-30 Richard Biener <rguenther@suse.de>
8661 * c-fold.c (c_fully_fold_internal): Enhance guard on
8664 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
8667 * Makefile.in (OBJS): Add adjust-alignment.o.
8668 * adjust-alignment.c (pass_data_adjust_alignment): New.
8669 (pass_adjust_alignment): New.
8670 (pass_adjust_alignment::execute): New.
8671 (make_pass_adjust_alignment): New.
8672 * tree-pass.h (make_pass_adjust_alignment): New.
8673 * passes.def: Add pass_adjust_alignment.
8675 2020-05-19 Alex Coplan <alex.coplan@arm.com>
8678 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
8679 identity permutation.
8681 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8683 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
8684 msp430_small, msp430_large and size24plus DejaGNU effective
8686 Improve grammar in descriptions for size20plus and size32plus effective
8689 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
8691 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
8692 callee saved registers only in xBPF.
8693 (bpf_expand_prologue): Save callee saved registers only in xBPF.
8694 (bpf_expand_epilogue): Likewise for restoring.
8695 * doc/invoke.texi (eBPF Options): Document this is activated by
8698 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
8700 * config/bpf/bpf.opt (mxbpf): New option.
8701 * doc/invoke.texi (Option Summary): Add -mxbpf.
8702 (eBPF Options): Document -mxbbpf.
8704 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
8707 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
8708 (<code>v32qiv32hi2): Ditto.
8709 (<code>v8qiv8hi2): Ditto.
8710 (<code>v16qiv16si2): Ditto.
8711 (<code>v8qiv8si2): Ditto.
8712 (<code>v4qiv4si2): Ditto.
8713 (<code>v16hiv16si2): Ditto.
8714 (<code>v8hiv8si2): Ditto.
8715 (<code>v4hiv4si2): Ditto.
8716 (<code>v8qiv8di2): Ditto.
8717 (<code>v4qiv4di2): Ditto.
8718 (<code>v2qiv2di2): Ditto.
8719 (<code>v8hiv8di2): Ditto.
8720 (<code>v4hiv4di2): Ditto.
8721 (<code>v2hiv2di2): Ditto.
8722 (<code>v8siv8di2): Ditto.
8723 (<code>v4siv4di2): Ditto.
8724 (<code>v2siv2di2): Ditto.
8726 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
8728 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
8729 (riscv_implied_info): New.
8730 (riscv_subset_list): Add handle_implied_ext.
8731 (riscv_subset_list::to_string): New parameter version_p to
8732 control output format.
8733 (riscv_subset_list::handle_implied_ext): New.
8734 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
8735 (riscv_arch_str): New parameter version_p to control output format.
8736 (riscv_expand_arch): New.
8737 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
8739 * config/riscv/riscv.h (riscv_expand_arch): New,
8740 (EXTRA_SPEC_FUNCTIONS): Define.
8741 (ASM_SPEC): Transform -march= via riscv_expand_arch.
8743 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
8745 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
8746 parse_multiletter_ext.
8747 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
8748 adjust parsing order for 's' and 'x'.
8750 2020-05-19 Richard Biener <rguenther@suse.de>
8752 * tree-vectorizer.h (_slp_tree::vectype): Add field.
8753 (SLP_TREE_VECTYPE): New.
8754 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
8756 (vect_create_new_slp_node): Likewise.
8757 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
8759 (vect_slp_analyze_node_operations): Walk nodes children for
8761 (vect_get_constant_vectors): Use local scope op variable.
8762 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
8763 (vect_model_simple_cost): Adjust.
8764 (vect_model_store_cost): Likewise.
8765 (vectorizable_store): Likewise.
8767 2020-05-18 Martin Sebor <msebor@redhat.com>
8770 * tree-object-size.c (decl_init_size): New function.
8771 (addr_object_size): Call it.
8772 * tree.h (last_field): Declare.
8773 (first_field): Add attribute nonnull.
8775 2020-05-18 Martin Sebor <msebor@redhat.com>
8778 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
8779 * tree.c (component_ref_size): Correct the handling or array members
8781 Drop a pointless test.
8782 Rename a local variable.
8784 2020-05-18 Jason Merrill <jason@redhat.com>
8786 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
8787 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
8789 2020-05-14 Jason Merrill <jason@redhat.com>
8791 * doc/install.texi (Prerequisites): Update boostrap compiler
8792 requirement to C++11/GCC 4.8.
8794 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8796 PR tree-optimization/94952
8797 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
8798 Initialize variables bitpos, bitregion_start, and bitregion_end in
8799 order to silence warnings about use of uninitialized variables.
8801 2020-05-18 Carl Love <cel@us.ibm.com>
8804 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
8805 first_match_index_<mode>.
8806 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
8807 additional test cases with zero vector elements.
8809 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
8812 * config/i386/i386-expand.c (ix86_expand_int_movcc):
8813 Avoid reversing a non-trapping comparison to a trapping one.
8815 2020-05-18 Alex Coplan <alex.coplan@arm.com>
8817 * config/arm/arm.c (output_move_double): Fix codegen when loading into
8818 a register pair with an odd base register.
8820 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
8822 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
8823 Do not emit FLAGS_REG clobber for TFmode.
8824 * config/i386/i386.md (*<code>tf2_1): Rewrite as
8825 define_insn_and_split. Mark operands 1 and 2 commutative.
8826 (*nabstf2_1): Ditto.
8827 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
8828 Do not swap memory operands. Simplify RTX generation.
8829 (neg abs SSE splitter): Ditto.
8830 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
8831 commutative. Do not swap operands. Simplify RTX generation.
8832 (*nabs<mode>2): Ditto.
8834 2020-05-18 Richard Biener <rguenther@suse.de>
8836 * tree-vect-slp.c (vect_slp_bb): Start after labels.
8837 (vect_get_constant_vectors): Really place init stmt after scalar defs.
8838 * tree-vect-stmts.c (vect_init_vector_1): Insert before
8841 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
8843 * config/i386/driver-i386.c (host_detect_local_cpu): Support
8844 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
8847 2020-05-18 Richard Biener <rguenther@suse.de>
8850 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
8851 when inlining into a non-call EH function.
8853 2020-05-18 Richard Biener <rguenther@suse.de>
8855 PR tree-optimization/95172
8856 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
8857 eventually need the conditional processing.
8858 (execute_sm_exit): When processing an orderd sequence
8859 avoid doing any conditional processing.
8860 (hoist_memory_references): Pass down whether all edges
8861 have ordered processing for a ref to execute_sm.
8863 2020-05-17 Jeff Law <law@redhat.com>
8865 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
8866 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
8867 into a single pattern using pc_or_label_operand.
8868 * config/h8300/combiner.md (bit branch patterns): Likewise.
8869 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
8871 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
8874 * config/i386/i386-features.c (has_non_address_hard_reg):
8876 (pseudo_reg_set): This. Return the SET expression. Ignore
8877 pseudo register push.
8878 (general_scalar_to_vector_candidate_p): Combine single_set and
8879 has_non_address_hard_reg calls to pseudo_reg_set.
8880 (timode_scalar_to_vector_candidate_p): Likewise.
8881 * config/i386/i386.md (*pushv1ti2): New pattern.
8883 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8886 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8888 * tree-vrp.c (operand_less_p): Move to...
8889 * vr-values.c (operand_less_p): ...here.
8890 * tree-vrp.h (operand_less_p): Remove.
8892 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8894 * tree-vrp.c (operand_less_p): Move to...
8895 * vr-values.c (operand_less_p): ...here.
8896 * tree-vrp.h (operand_less_p): Remove.
8898 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8900 * tree-vrp.c (class vrp_insert): Remove prototype for
8903 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8905 * tree-vrp.c (class live_names): New.
8906 (live_on_edge): Move into live_names.
8907 (build_assert_expr_for): Move into vrp_insert.
8908 (find_assert_locations_in_bb): Rename from
8909 find_assert_locations_1.
8910 (process_assert_insertions_for): Move into vrp_insert.
8911 (compare_assert_loc): Same.
8912 (remove_range_assertions): Same.
8913 (dump_asserts_for): Rename to vrp_insert::dump.
8914 (debug_asserts_for): Rename to vrp_insert::debug.
8915 (dump_all_asserts): Rename to vrp_insert::dump.
8916 (debug_all_asserts): Rename to vrp_insert::debug.
8918 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8920 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
8921 check_array_ref, check_mem_ref, and search_for_addr_array
8923 (class array_bounds_checker): ...here.
8924 (class check_array_bounds_dom_walker): Adjust to use
8925 array_bounds_checker.
8926 (check_all_array_refs): Move into array_bounds_checker and rename
8928 (class vrp_folder): Make fold_predicate_in private.
8930 2020-05-15 Jeff Law <law@redhat.com>
8932 * config/h8300/h8300.md (SFI iterator): New iterator for
8934 * config/h8300/peepholes.md (memory comparison): Use mode
8935 iterator to consolidate 3 patterns into one.
8936 (stack allocation and stack store): Handle SFmode. Handle
8939 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
8941 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
8942 RS6000_BTM_POWERPC64.
8944 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
8946 * config/i386/i386.md (SWI48DWI): New mode iterator.
8947 (*push<mode>2): Allow XMM registers.
8948 (*pushdi2_rex64): Ditto.
8949 (*pushsi2_rex64): Ditto.
8951 (push XMM reg splitter): New splitter
8953 (*pushdf) Change "x" operand constraint to "v".
8954 (*pushsf_rex64): Ditto.
8957 2020-05-15 Richard Biener <rguenther@suse.de>
8959 PR tree-optimization/92260
8960 * tree-vect-slp.c (vect_get_constant_vectors): Compute
8961 the number of vector stmts in a canonical way.
8963 2020-05-15 Martin Liska <mliska@suse.cz>
8965 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
8968 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
8970 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
8972 2020-05-15 Richard Biener <rguenther@suse.de>
8974 PR tree-optimization/95133
8975 * gimple-ssa-split-paths.c
8976 (find_block_to_duplicate_for_splitting_paths): Check for
8979 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
8981 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
8983 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
8985 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
8988 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
8989 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
8992 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
8995 * config/i386/i386.md (isa): Add sse3_noavx.
8996 (enabled): Handle sse3_noavx.
8998 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
8999 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
9000 alternatives. Match commutative vec_select selector operands.
9001 (*mmx_haddv2sf3_low): New insn pattern.
9003 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
9004 (*mmx_hsubv2sf3_low): New insn pattern.
9006 2020-05-15 Richard Biener <rguenther@suse.de>
9008 PR tree-optimization/33315
9009 * tree-ssa-sink.c: Include tree-eh.h.
9010 (sink_stats): Add commoned member.
9011 (sink_common_stores_to_bb): New function implementing store
9012 commoning by sinking to the successor.
9013 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
9014 (pass_sink_code::execute): Likewise. Record commoned stores
9017 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
9019 PR rtl-optimization/37451, part of PR target/61837
9020 * loop-doloop.c (doloop_simplify_count): New function. Simplify
9021 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
9022 (doloop_modify): Call doloop_simplify_count.
9024 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
9027 * doc/sourcebuild.texi: Document effective target lgccjit.
9029 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
9031 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
9032 define_expand, and rename the original to ...
9033 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
9034 (add<mode>3_zext_dup_exec): Likewise, with ...
9035 (add<mode>3_vcc_zext_dup_exec): ... this.
9036 (add<mode>3_zext_dup2): Likewise, with ...
9037 (add<mode>3_zext_dup_exec): ... this.
9038 (add<mode>3_zext_dup2_exec): Likewise, with ...
9039 (add<mode>3_zext_dup2): ... this.
9040 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
9041 addv64di3_zext* calls to use addv64di3_vcc_zext*.
9043 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
9046 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
9047 (extendv2sfv2df2): Ditto.
9049 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
9051 * configure: Regenerated.
9053 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
9055 * config/arm/arm.c (reg_needs_saving_p): New function.
9056 (use_return_insn): Use reg_needs_saving_p.
9057 (arm_get_vfp_saved_size): Likewise.
9058 (arm_compute_frame_layout): Likewise.
9059 (arm_save_coproc_regs): Likewise.
9060 (thumb1_expand_epilogue): Likewise.
9061 (arm_expand_epilogue_apcs_frame): Likewise.
9062 (arm_expand_epilogue): Likewise.
9064 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
9066 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
9068 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
9071 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
9073 (floatv2siv2df2): New expander.
9074 (floatunsv2siv2df2): New insn pattern.
9076 (fix_truncv2dfv2si2): New expander.
9077 (fixuns_truncv2dfv2si2): New insn pattern.
9079 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
9082 * config/aarch64/aarch64-sve-builtins.cc
9083 (handle_arm_sve_vector_bits_attribute): Create a copy of the
9084 original type's TYPE_MAIN_VARIANT, then reapply all the differences
9085 between the original type and its main variant.
9087 2020-05-14 Richard Biener <rguenther@suse.de>
9090 * real.c (real_to_decimal_for_mode): Make sure we handle
9091 a zero with nonzero exponent.
9093 2020-05-14 Jakub Jelinek <jakub@redhat.com>
9095 * Makefile.in (GTFILES): Add omp-general.c.
9096 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
9097 calls_declare_variant_alt members and initialize them in the
9099 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
9100 calls to declare_variant_alt nodes.
9101 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
9102 and calls_declare_variant_alt.
9103 (input_overwrite_node): Read them back.
9104 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
9106 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
9108 (tree_function_versioning): Copy calls_declare_variant_alt bit.
9109 * omp-offload.c (execute_omp_device_lower): Call
9110 omp_resolve_declare_variant on direct function calls.
9111 (pass_omp_device_lower::gate): Also enable for
9112 calls_declare_variant_alt functions.
9113 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
9114 (omp_context_selector_matches): Handle the case when
9115 cfun->curr_properties has PROP_gimple_any bit set.
9116 (struct omp_declare_variant_entry): New type.
9117 (struct omp_declare_variant_base_entry): New type.
9118 (struct omp_declare_variant_hasher): New type.
9119 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
9121 (omp_declare_variants): New variable.
9122 (struct omp_declare_variant_alt_hasher): New type.
9123 (omp_declare_variant_alt_hasher::hash,
9124 omp_declare_variant_alt_hasher::equal): New methods.
9125 (omp_declare_variant_alt): New variables.
9126 (omp_resolve_late_declare_variant): New function.
9127 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
9128 when called late. Create a magic declare_variant_alt fndecl and
9129 cgraph node and return that if decision needs to be deferred until
9130 after gimplification.
9131 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
9135 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
9136 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
9137 entry block if info->after_stmt is NULL, otherwise add after that stmt
9138 and update it after adding each stmt.
9139 (ipa_simd_modify_function_body): Initialize info.after_stmt.
9141 * function.h (struct function): Add has_omp_target bit.
9142 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
9144 (omp_discover_declare_target_tgt_fn_r): ... this.
9145 (omp_discover_declare_target_var_r): Call
9146 omp_discover_declare_target_tgt_fn_r instead of
9147 omp_discover_declare_target_fn_r.
9148 (omp_discover_implicit_declare_target): Also queue functions with
9149 has_omp_target bit set, for those walk with
9150 omp_discover_declare_target_fn_r, for declare target to functions
9151 walk with omp_discover_declare_target_tgt_fn_r.
9153 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
9156 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
9157 Add SSE/AVX alternative. Change operand predicates from
9158 nonimmediate_operand to register_mmxmem_operand.
9159 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9160 (fix_truncv2sfv2si2): New expander.
9161 (fixuns_truncv2sfv2si2): New insn pattern.
9163 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
9164 Add SSE/AVX alternative. Change operand predicates from
9165 nonimmediate_operand to register_mmxmem_operand.
9166 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9167 (floatv2siv2sf2): New expander.
9168 (floatunsv2siv2sf2): New insn pattern.
9170 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
9172 (IX86_BUILTIN_PI2FD): Ditto.
9174 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
9176 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
9178 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
9181 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
9183 * config/s390/s390.c (allocate_stack_space): Add missing updates
9184 of last_probe_offset.
9186 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
9188 * config/s390/s390.md ("allocate_stack"): Call
9189 anti_adjust_stack_and_probe_stack_clash when stack clash
9190 protection is enabled.
9191 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
9192 prototype. Remove static.
9193 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
9196 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
9198 * config/rs6000/altivec.h (vec_extractl): New #define.
9199 (vec_extracth): Likewise.
9200 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
9201 (UNSPEC_EXTRACTR): Likewise.
9202 (vextractl<mode>): New expansion.
9203 (vextractl<mode>_internal): New insn.
9204 (vextractr<mode>): New expansion.
9205 (vextractr<mode>_internal): New insn.
9206 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
9207 New built-in function.
9208 (__builtin_altivec_vextduhvlx): Likewise.
9209 (__builtin_altivec_vextduwvlx): Likewise.
9210 (__builtin_altivec_vextddvlx): Likewise.
9211 (__builtin_altivec_vextdubvhx): Likewise.
9212 (__builtin_altivec_vextduhvhx): Likewise.
9213 (__builtin_altivec_vextduwvhx): Likewise.
9214 (__builtin_altivec_vextddvhx): Likewise.
9215 (__builtin_vec_extractl): New overloaded built-in function.
9216 (__builtin_vec_extracth): Likewise.
9217 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9218 Define overloaded forms of __builtin_vec_extractl and
9219 __builtin_vec_extracth.
9220 (builtin_function_type): Add cases to mark arguments of new
9221 built-in functions as unsigned.
9222 (rs6000_common_init_builtins): Add
9223 opaque_ftype_opaque_opaque_opaque_opaque.
9224 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
9225 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9226 for a Future Architecture): Add description of vec_extractl and
9227 vec_extractr built-in functions.
9229 2020-05-13 Richard Biener <rguenther@suse.de>
9231 * target.def (add_stmt_cost): Add new vectype parameter.
9232 * targhooks.c (default_add_stmt_cost): Adjust.
9233 * targhooks.h (default_add_stmt_cost): Likewise.
9234 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
9236 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
9237 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
9238 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
9240 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
9241 (dump_stmt_cost): Add new vectype parameter.
9242 (add_stmt_cost): Likewise.
9243 (record_stmt_cost): Likewise.
9244 (record_stmt_cost): Add overload with old signature.
9245 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
9247 (vect_get_known_peeling_cost): Likewise.
9248 (vect_estimate_min_profitable_iters): Likewise.
9249 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
9250 * tree-vect-stmts.c (record_stmt_cost): Likewise.
9251 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
9252 and pass down correct vectype and NULL stmt_info.
9253 (vect_model_simple_cost): Adjust.
9254 (vect_model_store_cost): Likewise.
9256 2020-05-13 Richard Biener <rguenther@suse.de>
9258 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
9259 (_slp_instance::group_size): Likewise.
9260 * tree-vect-loop.c (vectorizable_reduction): The group size
9261 is the number of lanes in the node.
9262 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
9263 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
9264 verify it matches the instance trees number of lanes.
9265 (vect_slp_analyze_node_operations_1): Use the numer of lanes
9266 in the node as group size.
9267 (vect_bb_vectorization_profitable_p): Use the instance root
9268 number of lanes for the size of life.
9269 (vect_schedule_slp_instance): Use the number of lanes as
9271 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
9272 parameter. Use the number of lanes of the load for the group
9273 size in the gap adjustment code.
9274 (vect_analyze_stmt): Adjust.
9275 (vect_transform_stmt): Likewise.
9277 2020-05-13 Jakub Jelinek <jakub@redhat.com>
9280 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
9281 if the last insn is a note.
9283 PR tree-optimization/95060
9284 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
9285 if it is the single use of the FMA internal builtin.
9287 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
9289 PR tree-optimization/94969
9290 * tree-data-dependence.c (constant_access_functions): Rename to...
9291 (invariant_access_functions): ...this. Add parameter. Check for
9292 invariant access function, rather than constant.
9293 (build_classic_dist_vector): Call above function.
9294 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
9296 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
9299 * doc/extend.texi (x86Operandmodifiers): Document more x86
9301 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
9303 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
9305 * tree-vrp.c (class vrp_insert): New.
9306 (insert_range_assertions): Move to class vrp_insert.
9307 (dump_all_asserts): Same as above.
9308 (dump_asserts_for): Same as above.
9309 (live): Same as above.
9310 (need_assert_for): Same as above.
9311 (live_on_edge): Same as above.
9312 (finish_register_edge_assert_for): Same as above.
9313 (find_switch_asserts): Same as above.
9314 (find_assert_locations): Same as above.
9315 (find_assert_locations_1): Same as above.
9316 (find_conditional_asserts): Same as above.
9317 (process_assert_insertions): Same as above.
9318 (register_new_assert_for): Same as above.
9319 (vrp_prop): New variable fun.
9320 (vrp_initialize): New parameter.
9321 (identify_jump_threads): Same as above.
9322 (execute_vrp): Same as above.
9325 2020-05-12 Keith Packard <keith.packard@sifive.com>
9327 * config/riscv/riscv.c (riscv_unique_section): New.
9328 (TARGET_ASM_UNIQUE_SECTION): New.
9330 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
9332 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
9333 * config/riscv/riscv-passes.def: New file.
9334 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
9335 * config/riscv/riscv-shorten-memrefs.c: New file.
9336 * config/riscv/riscv.c (tree-pass.h): New include.
9337 (riscv_compressed_reg_p): New Function
9338 (riscv_compressed_lw_offset_p): Likewise.
9339 (riscv_compressed_lw_address_p): Likewise.
9340 (riscv_shorten_lw_offset): Likewise.
9341 (riscv_legitimize_address): Attempt to convert base + large_offset
9342 to compressible new_base + small_offset.
9343 (riscv_address_cost): Make anticipated compressed load/stores
9344 cheaper for code size than uncompressed load/stores.
9345 (riscv_register_priority): Move compressed register check to
9346 riscv_compressed_reg_p.
9347 * config/riscv/riscv.h (C_S_BITS): Define.
9348 (CSW_MAX_OFFSET): Define.
9349 * config/riscv/riscv.opt (mshorten-memefs): New option.
9350 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
9351 (PASSES_EXTRA): Add riscv-passes.def.
9352 * doc/invoke.texi: Document -mshorten-memrefs.
9354 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
9355 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
9356 * doc/tm.texi: Regenerate.
9357 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
9358 * sched-deps.c (attempt_change): Use old address if it is cheaper than
9360 * target.def (new_address_profitable_p): New hook.
9361 * targhooks.c (default_new_address_profitable_p): New function.
9362 * targhooks.h (default_new_address_profitable_p): Declare.
9364 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
9367 * config/i386/mmx.md (copysignv2sf3): New expander.
9368 (xorsignv2sf3): Ditto.
9369 (signbitv2sf3): Ditto.
9371 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
9374 * config/i386/mmx.md (fmav2sf4): New insn pattern.
9379 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
9381 * Makefile.in (CET_HOST_FLAGS): New.
9382 (COMPILER): Add $(CET_HOST_FLAGS).
9383 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
9384 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
9386 * aclocal.m4: Regenerated.
9387 * configure: Likewise.
9389 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
9392 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
9393 (*mmx_<code>v2sf2): New insn_and_split pattern.
9394 (*mmx_nabsv2sf2): Ditto.
9395 (*mmx_andnotv2sf3): New insn pattern.
9396 (*mmx_<code>v2sf3): Ditto.
9397 * config/i386/i386.md (absneg_op): New code attribute.
9398 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
9399 (ix86_build_signbit_mask): Ditto.
9401 2020-05-12 Richard Biener <rguenther@suse.de>
9403 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
9406 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
9408 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
9409 Update prototype to include "local" argument.
9410 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
9411 "local" argument. Handle local common decls.
9412 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
9413 msp430_output_aligned_decl_common call with 0 for "local" argument.
9414 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
9416 2020-05-12 Richard Biener <rguenther@suse.de>
9418 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
9420 2020-05-12 Martin Liska <mliska@suse.cz>
9424 * sanopt.c (sanitize_rewrite_addressable_params):
9425 Clear DECL_NOT_GIMPLE_REG_P for argument.
9427 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
9429 PR tree-optimization/94980
9430 * tree-vect-generic.c (expand_vector_comparison): Use
9431 vector_element_bits_tree to get the element size in bits,
9432 rather than using TYPE_SIZE.
9433 (expand_vector_condition, vector_element): Likewise.
9435 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
9437 PR tree-optimization/94980
9438 * tree-vect-generic.c (build_replicated_const): Take the number
9439 of bits as a parameter, instead of the type of the elements.
9440 (do_plus_minus): Update accordingly, using vector_element_bits
9441 to calculate the correct number of bits.
9442 (do_negate): Likewise.
9444 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
9446 PR tree-optimization/94980
9447 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
9448 * tree.c (vector_element_bits, vector_element_bits_tree): New.
9449 * match.pd: Use the new functions instead of determining the
9450 vector element size directly from TYPE_SIZE(_UNIT).
9451 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
9452 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
9453 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
9454 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
9455 (expand_vector_conversion): Likewise.
9456 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
9457 a divisor. Convert the dividend to bits to compensate.
9458 * tree-vect-loop.c (vectorizable_live_operation): Call
9459 vector_element_bits instead of open-coding it.
9461 2020-05-12 Jakub Jelinek <jakub@redhat.com>
9463 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
9464 * omp-offload.c: Include context.h.
9465 (omp_declare_target_fn_p, omp_declare_target_var_p,
9466 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
9467 omp_discover_implicit_declare_target): New functions.
9468 * cgraphunit.c (analyze_functions): Call
9469 omp_discover_implicit_declare_target.
9471 2020-05-12 Richard Biener <rguenther@suse.de>
9473 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
9474 literal constant &MEM[..] to a constant literal.
9476 2020-05-12 Richard Biener <rguenther@suse.de>
9478 PR tree-optimization/95045
9479 * dbgcnt.def (lim): Add debug-counter.
9480 * tree-ssa-loop-im.c: Include dbgcnt.h.
9481 (find_refs_for_sm): Use lim debug counter for store motion
9483 (do_store_motion): Rename form store_motion. Commit edge
9485 (store_motion_loop): ... here.
9486 (tree_ssa_lim): Adjust.
9488 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9490 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
9491 (vec_ctzm): Rename to vec_cnttzm.
9492 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
9493 Change fourth operand for vec_ternarylogic to require
9494 compatibility with unsigned SImode rather than unsigned QImode.
9495 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9496 Remove overloaded forms of vec_gnb that are no longer needed.
9497 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9498 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
9499 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
9500 vec_gnb; move vec_ternarylogic documentation into this section
9501 and replace const unsigned char with const unsigned int as its
9504 2020-05-11 Carl Love <cel@us.ibm.com>
9506 * config/rs6000/altivec.h (vec_genpcvm): New #define.
9507 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
9509 (XXGENPCVM_V8HI): Likewise.
9510 (XXGENPCVM_V4SI): Likewise.
9511 (XXGENPCVM_V2DI): Likewise.
9512 (XXGENPCVM): New overloaded built-in instantiation.
9513 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
9514 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
9515 (altivec_expand_builtin): Add special handling for
9516 FUTURE_BUILTIN_VEC_XXGENPCVM.
9517 (builtin_function_type): Add handling for
9518 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
9519 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
9520 (UNSPEC_XXGENPCV): New constant.
9521 (xxgenpcvm_<mode>_internal): New insn.
9522 (xxgenpcvm_<mode>): New expansion.
9523 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
9525 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9527 * config/rs6000/altivec.h (vec_strir): New #define.
9528 (vec_stril): Likewise.
9529 (vec_strir_p): Likewise.
9530 (vec_stril_p): Likewise.
9531 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
9532 (UNSPEC_VSTRIL): Likewise.
9533 (vstrir_<mode>): New expansion.
9534 (vstrir_code_<mode>): New insn.
9535 (vstrir_p_<mode>): New expansion.
9536 (vstrir_p_code_<mode>): New insn.
9537 (vstril_<mode>): New expansion.
9538 (vstril_code_<mode>): New insn.
9539 (vstril_p_<mode>): New expansion.
9540 (vstril_p_code_<mode>): New insn.
9541 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
9542 New built-in function.
9543 (__builtin_altivec_vstrihr): Likewise.
9544 (__builtin_altivec_vstribl): Likewise.
9545 (__builtin_altivec_vstrihl): Likewise.
9546 (__builtin_altivec_vstribr_p): Likewise.
9547 (__builtin_altivec_vstrihr_p): Likewise.
9548 (__builtin_altivec_vstribl_p): Likewise.
9549 (__builtin_altivec_vstrihl_p): Likewise.
9550 (__builtin_vec_strir): New overloaded built-in function.
9551 (__builtin_vec_stril): Likewise.
9552 (__builtin_vec_strir_p): Likewise.
9553 (__builtin_vec_stril_p): Likewise.
9554 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9555 Define overloaded forms of __builtin_vec_strir,
9556 __builtin_vec_stril, __builtin_vec_strir_p, and
9557 __builtin_vec_stril_p.
9558 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9559 for a Future Architecture): Add description of vec_stril,
9560 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
9562 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
9564 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
9565 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
9567 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
9568 * config/rs6000/rs6000-builtin.def: Add handling of new macro
9570 (BU_FUTURE_V_4): New macro. Use it.
9571 (BU_FUTURE_OVERLOAD_4): Likewise.
9572 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
9573 handling for quaternary built-in functions.
9574 (altivec_resolve_overloaded_builtin): Add special-case handling
9575 for __builtin_vec_xxeval.
9576 * config/rs6000/rs6000-call.c: Add handling of new macro
9577 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
9578 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
9579 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
9580 (altivec_overloaded_builtins): Add definitions for
9581 FUTURE_BUILTIN_VEC_XXEVAL.
9582 (bdesc_4arg): New array.
9583 (htm_expand_builtin): Add handling for quaternary built-in
9585 (rs6000_expand_quaternop_builtin): New function.
9586 (rs6000_expand_builtin): Add handling for quaternary built-in
9588 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
9589 for unsigned QImode and unsigned HImode.
9590 (builtin_quaternary_function_type): New function.
9591 (rs6000_common_init_builtins): Add handling of quaternary
9593 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
9595 (RS6000_BTC_PREDICATE): Change value of constant.
9596 (RS6000_BTC_ABS): Likewise.
9597 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
9598 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
9599 for a Future Architecture): Add description of vec_ternarylogic
9602 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9604 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
9606 (__builtin_pextd): Likewise.
9607 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
9608 (UNSPEC_PEXTD): Likewise.
9611 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
9612 a Future Architecture): Add descriptions of __builtin_pdepd and
9613 __builtin_pextd functions.
9615 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9617 * config/rs6000/altivec.h (vec_clrl): New #define.
9618 (vec_clrr): Likewise.
9619 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
9620 (UNSPEC_VCLRRB): Likewise.
9623 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
9625 (__builtin_altivec_vclrrb): Likewise.
9626 (__builtin_vec_clrl): New overloaded built-in function.
9627 (__builtin_vec_clrr): Likewise.
9628 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9629 Define overloaded forms of __builtin_vec_clrl and
9631 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9632 for a Future Architecture): Add descriptions of vec_clrl and
9635 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9637 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
9638 built-in function definition.
9639 (__builtin_cnttzdm): Likewise.
9640 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
9641 (UNSPEC_CNTTZDM): Likewise.
9642 (cntlzdm): New insn.
9643 (cnttzdm): Likewise.
9644 * doc/extend.texi (Basic PowerPC Built-in Functions available for
9645 a Future Architecture): Add descriptions of __builtin_cntlzdm and
9646 __builtin_cnttzdm functions.
9648 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
9651 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
9653 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9655 * config/rs6000/altivec.h (vec_cfuge): New #define.
9656 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
9657 (vcfuged): New insn.
9658 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
9659 New built-in function.
9660 * config/rs6000/rs6000-call.c (builtin_function_type): Add
9661 handling for FUTURE_BUILTIN_VCFUGED case.
9662 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9663 for a Future Architecture): Add description of vec_cfuge built-in
9666 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9668 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
9670 (BU_FUTURE_MISC_1): Likewise.
9671 (BU_FUTURE_MISC_2): Likewise.
9672 (BU_FUTURE_MISC_3): Likewise.
9673 (__builtin_cfuged): New built-in function definition.
9674 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
9676 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
9677 a Future Architecture): New subsubsection.
9679 2020-05-11 Richard Biener <rguenther@suse.de>
9681 PR tree-optimization/95049
9682 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
9683 between different constants.
9685 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
9687 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
9689 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9690 Bill Schmidt <wschmidt@linux.ibm.com>
9692 * config/rs6000/altivec.h (vec_gnb): New #define.
9693 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
9695 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
9697 (BU_FUTURE_OVERLOAD_2): Likewise.
9698 (BU_FUTURE_OVERLOAD_3): Likewise.
9699 (__builtin_altivec_gnb): New built-in function.
9700 (__buiiltin_vec_gnb): New overloaded built-in function.
9701 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9702 Define overloaded forms of __builtin_vec_gnb.
9703 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
9704 of __builtin_vec_gnb.
9705 (builtin_function_type): Mark return value and arguments unsigned
9706 for FUTURE_BUILTIN_VGNB.
9707 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9708 for a Future Architecture): Add description of vec_gnb built-in
9711 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9712 Bill Schmidt <wschmidt@linux.ibm.com>
9714 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
9716 (vec_pext): Likewise.
9717 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
9718 (UNSPEC_VPEXTD): Likewise.
9721 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
9723 (__builtin_altivec_vpextd): Likewise.
9724 * config/rs6000/rs6000-call.c (builtin_function_type): Add
9725 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
9727 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
9728 for a Future Architecture): Add description of vec_pdep and
9729 vec_pext built-in functions.
9731 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9732 Bill Schmidt <wschmidt@linux.ibm.com>
9734 * config/rs6000/altivec.h (vec_clzm): New macro.
9735 (vec_ctzm): Likewise.
9736 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
9737 (UNSPEC_VCTZDM): Likewise.
9740 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
9741 (BU_FUTURE_V_1): Likewise.
9742 (BU_FUTURE_V_2): Likewise.
9743 (BU_FUTURE_V_3): Likewise.
9744 (__builtin_altivec_vclzdm): New builtin definition.
9745 (__builtin_altivec_vctzdm): Likewise.
9746 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
9747 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
9749 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
9750 value and parameter types to be unsigned for VCLZDM and VCTZDM.
9751 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
9752 support for TARGET_FUTURE flag.
9753 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
9754 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
9755 for a Future Architecture): New subsubsection.
9757 2020-05-11 Richard Biener <rguenther@suse.de>
9759 PR tree-optimization/94988
9760 PR tree-optimization/95025
9761 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
9762 (sm_seq_push_down): Take extra parameter denoting where we
9764 (execute_sm_exit): Re-issue sm_other stores in the correct
9766 (sm_seq_valid_bb): When always executed, allow sm_other to
9767 prevail inbetween sm_ord and record their stored value.
9768 (hoist_memory_references): Adjust refs_not_supported propagation
9769 and prune sm_other from the end of the ordered sequences.
9771 2020-05-11 Felix Yang <felix.yang@huawei.com>
9774 * config/aarch64/aarch64.md (mov<mode>):
9775 Bitcasts to the equivalent integer mode using gen_lowpart
9776 instead of doing FAIL for scalar floating point move.
9778 2020-05-11 Alex Coplan <alex.coplan@arm.com>
9780 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
9781 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
9782 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
9783 (*csinv3_uxtw_insn2): New.
9784 (*csinv3_uxtw_insn3): New.
9785 * config/aarch64/iterators.md (neg_not_cs): New.
9787 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
9790 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
9791 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
9792 (*mmx_addv2sf3): Ditto.
9793 (*mmx_subv2sf3): Ditto.
9794 (*mmx_mulv2sf3): Ditto.
9795 (*mmx_<code>v2sf3): Ditto.
9796 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
9798 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
9801 * config/i386/i386.c (ix86_vector_mode_supported_p):
9802 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
9803 * config/i386/mmx.md (*mov<mode>_internal): Do not set
9804 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
9806 (mmx_addv2sf3): Change operand predicates from
9807 nonimmediate_operand to register_mmxmem_operand.
9808 (addv2sf3): New expander.
9809 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
9810 predicates from nonimmediate_operand to register_mmxmem_operand.
9811 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9813 (mmx_subv2sf3): Change operand predicate from
9814 nonimmediate_operand to register_mmxmem_operand.
9815 (mmx_subrv2sf3): Ditto.
9816 (subv2sf3): New expander.
9817 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
9818 predicates from nonimmediate_operand to register_mmxmem_operand.
9819 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9821 (mmx_mulv2sf3): Change operand predicates from
9822 nonimmediate_operand to register_mmxmem_operand.
9823 (mulv2sf3): New expander.
9824 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
9825 predicates from nonimmediate_operand to register_mmxmem_operand.
9826 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9828 (mmx_<code>v2sf3): Change operand predicates from
9829 nonimmediate_operand to register_mmxmem_operand.
9830 (<code>v2sf3): New expander.
9831 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
9832 predicates from nonimmediate_operand to register_mmxmem_operand.
9833 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9834 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
9836 2020-05-11 Martin Liska <mliska@suse.cz>
9839 * common.opt: Fix typo in option description.
9841 2020-05-11 Martin Liska <mliska@suse.cz>
9843 PR gcov-profile/94928
9844 * gcov-io.h: Add caveat about coverage format parsing and
9845 possible outdated documentation.
9847 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
9849 PR tree-optimization/83403
9850 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
9851 determine_value_range, Add fold conversion of MULT_EXPR, fix the
9854 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
9856 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
9857 __ILP32__ for 32-bit targets.
9859 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
9861 * tree.h (expr_align): Delete.
9862 * tree.c (expr_align): Likewise.
9864 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
9866 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
9867 from end_of_function_needs.
9869 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
9870 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
9872 * config/cris/t-elfmulti: Remove crisv32 multilib.
9873 * config/cris: Remove shared-library and CRIS v32 support.
9875 Move trivially from cc0 to reg:CC model, removing most optimizations.
9876 * config/cris/cris.md: Remove all side-effect patterns and their
9877 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
9878 to all but post-reload control-flow and movem insns. Remove
9879 constraints on all modified expanders. Remove obsoleted cc0-related
9881 (attr "cc"): Remove alternative "rev".
9882 (mode_iterator BWDD, DI_, SI_): New.
9883 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
9884 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
9885 ("mstep_shift", "mstep_mul"): Remove patterns.
9886 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
9887 * config/cris/cris.c: Change all non-condition-code,
9888 non-control-flow emitted insns to add a parallel with clobber of
9889 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
9890 emit_insn to use of emit_move_insn, gen_add2_insn or
9891 cris_emit_insn, as convenient.
9892 (cris_reg_overlap_mentioned_p)
9893 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
9894 (cris_movem_load_rest_p): Don't assume all elements in a
9896 (cris_store_multiple_op_p): Ditto.
9897 (cris_emit_insn): New function.
9898 * cris/cris-protos.h (cris_emit_insn): Declare.
9901 * config/cris/cris.md (zcond): New code_iterator.
9902 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
9904 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
9906 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
9908 * config/cris/cris.md ("movsi"): For memory destination
9909 post-reload, generate clobberless variant. Similarly for a
9910 zero-source post-reload.
9911 ("*mov_tomem<mode>_split"): New split.
9912 ("*mov_tomem<mode>"): New insn.
9913 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
9914 "Q>m" for less-than-SImode.
9915 ("*mov_fromzero<mode>_split"): New split.
9916 ("*mov_fromzero<mode>"): New insn.
9918 Prepare for cmpelim pass to eliminate redundant compare insns.
9919 * config/cris/cris-modes.def: New file.
9920 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
9921 (cris_notice_update_cc): Remove left-over declaration.
9922 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
9923 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
9924 * config/cris/cris.h (SELECT_CC_MODE): Define.
9925 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
9927 (cond): New code_iterator.
9928 (nzcond): Replacement for incorrect ncond. All callers changed.
9929 (nzvccond): Replacement for ocond. All callers changed.
9930 (rnzcond): Replacement for rcond. All callers changed.
9931 (xCC): New code_attr.
9932 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
9934 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
9935 CCmode with iteration over NZVCSET.
9936 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
9938 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
9939 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
9940 ("*btst<mode>"): Similarly, from "*btst".
9941 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
9942 iterating over cond instead of matching the comparison with
9943 ordered_comparison_operator.
9944 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
9945 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
9947 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
9948 NZVCUSE. Remove FIXME.
9949 ("*b<nzcond:code>_reversed<mode>"): Similarly from
9950 "*b<ncond:code>_reversed", over NZUSE.
9951 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
9952 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
9953 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
9954 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
9955 depending on CC_NZmode vs. CCmode. Remove FIXME.
9956 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
9957 "*b<rcond:code>_reversed", over NZUSE.
9958 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
9959 iterating over cond instead of matching the comparison with
9960 ordered_comparison_operator.
9961 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
9962 iterating over NZUSE.
9963 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
9964 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
9965 depending on CC_NZmode vs. CCmode.
9966 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
9967 NZVCUSE. Remove FIXME.
9968 ("cc"): Comment on new use.
9969 ("cc_enabled"): New attribute.
9970 ("enabled"): Make default fall back to cc_enabled.
9971 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
9972 default_subst_attrs.
9973 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
9974 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
9975 "*movsi_internal". Correct contents of, and rename attribute
9976 "cc" to "cc<cccc><ccnz><ccnzvc>".
9977 ("anz", "anzvc", "acc"): New define_subst_attrs.
9978 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
9979 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
9980 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
9981 "movqi". Correct contents of, and rename "cc" attribute to
9982 "cc<cccc><ccnz><ccnzvc>".
9983 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
9984 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
9985 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
9986 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
9987 Rename from "extend<mode>si2".
9988 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
9989 Similar, from "zero_extend<mode>si2".
9990 ("*adddi3<setnz>"): Rename from "*adddi3".
9991 ("*subdi3<setnz>"): Similarly from "*subdi3".
9992 ("*addsi3<setnz>"): Similarly from "*addsi3".
9993 ("*subsi3<setnz>"): Similarly from "*subsi3".
9994 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
9995 "cc" attribute to "cc<ccnz>".
9996 ("*addqi3<setnz>"): Similarly from "*addqi3".
9997 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
9998 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
10000 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
10001 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
10002 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
10003 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
10004 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
10005 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
10006 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
10007 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
10009 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
10010 from "one_cmplsi2".
10011 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
10013 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
10015 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
10017 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
10019 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
10020 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
10021 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
10022 (znnCC, rznnCC): New code_attrs.
10023 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
10024 obseolete comment. Add belt-and-suspenders mode-test to condition.
10025 Add fixme regarding remaining matched-but-not-generated case.
10026 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
10027 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
10028 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
10029 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
10030 Handle output of CC_ZnNmode.
10031 ("*b<nzcond:code>_reversed<mode>"): Ditto.
10033 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
10034 NEG too. Correct comment.
10035 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
10038 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
10040 * ira-color.c (update_costs_from_allocno): Remove
10041 conflict_cost_update_p argument. Propagate costs only along
10042 threads. Always do conflict cost update. Add printing debugging
10044 (update_costs_from_copies): Add printing debugging info.
10045 (restore_costs_from_copies): Ditto.
10046 (assign_hard_reg): Improve debug info.
10047 (push_only_colorable): Ditto. Call update_costs_from_prefs.
10048 (color_allocnos): Remove update_costs_from_prefs.
10050 2020-05-08 Richard Biener <rguenther@suse.de>
10052 * tree-vectorizer.h (vec_info::slp_loads): New.
10053 (vect_optimize_slp): Declare.
10054 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
10055 nothing when there are no loads.
10056 (vect_gather_slp_loads): Gather loads into a vector.
10057 (vect_supported_load_permutation_p): Remove.
10058 (vect_analyze_slp_instance): Do not verify permutation
10060 (vect_analyze_slp): Optimize permutations of reductions
10061 after all SLP instances have been gathered and gather
10063 (vect_optimize_slp): New function split out from
10064 vect_supported_load_permutation_p. Elide some permutations.
10065 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
10066 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
10067 * tree-vect-stmts.c (vectorizable_load): Check whether
10068 the load can be permuted. When generating code assert we can.
10070 2020-05-08 Richard Biener <rguenther@suse.de>
10072 * tree-ssa-sccvn.c (rpo_avail): Change type to
10073 eliminate_dom_walker *.
10074 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
10075 use the DOM walker availability.
10076 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
10077 with vn_valueize as valueization callback.
10078 (vn_reference_maybe_forwprop_address): Likewise.
10079 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
10080 array_ref_low_bound.
10082 2020-05-08 Jakub Jelinek <jakub@redhat.com>
10084 PR tree-optimization/94786
10085 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
10089 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
10092 PR middle-end/94724
10093 * tree.c (get_narrower): Reuse the op temporary instead of
10096 PR tree-optimization/94783
10097 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
10098 New simplification.
10100 PR tree-optimization/94956
10101 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
10102 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
10104 PR tree-optimization/94913
10105 * match.pd (A - B + -1 >= A to B >= A): New simplification.
10106 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
10107 true for TYPE_UNSIGNED integral types.
10110 PR rtl-optimization/94516
10111 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
10113 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
10114 Call df_notes_rescan if that argument is not true and returning true.
10115 * combine.c (adjust_for_new_dest): Pass true as second argument to
10116 remove_reg_equal_equiv_notes.
10117 * postreload.c (reload_combine_recognize_pattern): Don't call
10120 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
10122 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
10124 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
10125 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
10126 (*neg_ne_<mode>): Likewise.
10128 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
10130 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
10132 (*setbcr_<un>signed_<GPR:mode>): Likewise.
10133 (cstore<mode>4): Use setbc[r] if available.
10134 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
10135 (eq<mode>3): Use setbc for TARGET_FUTURE.
10136 (*eq<mode>3): Avoid for TARGET_FUTURE.
10137 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
10138 else for non-Pmode, use gen_eq and gen_xor.
10139 (*ne<mode>3): Avoid for TARGET_FUTURE.
10140 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
10142 2020-05-07 Jeff Law <law@redhat.com>
10144 * config/h8300/h8300.md: Move expanders and patterns into
10145 files based on functionality.
10146 * config/h8300/addsub.md: New file.
10147 * config/h8300/bitfield.md: New file
10148 * config/h8300/combiner.md: New file
10149 * config/h8300/divmod.md: New file
10150 * config/h8300/extensions.md: New file
10151 * config/h8300/jumpcall.md: New file
10152 * config/h8300/logical.md: New file
10153 * config/h8300/movepush.md: New file
10154 * config/h8300/multiply.md: New file
10155 * config/h8300/other.md: New file
10156 * config/h8300/proepi.md: New file
10157 * config/h8300/shiftrotate.md: New file
10158 * config/h8300/testcompare.md: New file
10160 * config/h8300/h8300.md (adds/subs splitters): Merge into single
10162 (negation expanders and patterns): Simplify and combine using
10164 (one_cmpl expanders and patterns): Likewise.
10165 (tablejump, indirect_jump patterns ): Likewise.
10166 (shift and rotate expanders and patterns): Likewise.
10167 (absolute value expander and pattern): Drop expander, rename pattern
10169 (peephole2 patterns): Move into...
10170 * config/h8300/peepholes.md: New file.
10172 * config/h8300/constraints.md (L and N): Simplify now that we're not
10173 longer supporting the original H8/300 chip.
10174 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
10175 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
10176 (shift_alg_hi, shift_alg_si): Similarly.
10177 (h8300_option_overrides): Similarly. Default to H8/300H. If
10178 compiling for H8/S, then turn off H8/300H. Do not update the
10179 shift_alg tables for H8/300 port.
10180 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
10182 (push, split_adds_subs, h8300_rtx_costs): Likewise.
10183 (h8300_print_operand, compute_mov_length): Likewise.
10184 (output_plussi, compute_plussi_length): Likewise.
10185 (compute_plussi_cc, output_logical_op): Likewise.
10186 (compute_logical_op_length, compute_logical_op_cc): Likewise.
10187 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
10188 (output_a_shift, compute_a_shift_length): Likewise.
10189 (output_a_rotate, compute_a_rotate_length): Likewise.
10190 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
10191 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
10192 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
10193 (attr_cpu, TARGET_H8300): Remove.
10194 (TARGET_DEFAULT): Update.
10195 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
10196 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
10197 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
10198 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
10199 * config/h8300/h8300.md: Simplify patterns throughout.
10200 * config/h8300/t-h8300: Update multilib configuration.
10202 * config/h8300/h8300.h (LINK_SPEC): Remove.
10203 (USER_LABEL_PREFIX): Likewise.
10205 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
10206 (h8300_option_override): Remove remnants of COFF support.
10208 2020-05-07 Alan Modra <amodra@gmail.com>
10210 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
10211 set_rtx_cost with set_src_cost.
10212 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
10214 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
10216 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
10217 redundant half vector handlings for no peeling gaps.
10219 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
10221 * tree-ssa-operands.c (operands_scanner): New class.
10222 (operands_bitmap_obstack): Remove.
10223 (n_initialized): Remove.
10224 (build_uses): Move to operands_scanner class.
10225 (build_vuse): Same as above.
10226 (build_vdef): Same as above.
10227 (verify_ssa_operands): Same as above.
10228 (finalize_ssa_uses): Same as above.
10229 (cleanup_build_arrays): Same as above.
10230 (finalize_ssa_stmt_operands): Same as above.
10231 (start_ssa_stmt_operands): Same as above.
10232 (append_use): Same as above.
10233 (append_vdef): Same as above.
10234 (add_virtual_operand): Same as above.
10235 (add_stmt_operand): Same as above.
10236 (get_mem_ref_operands): Same as above.
10237 (get_tmr_operands): Same as above.
10238 (maybe_add_call_vops): Same as above.
10239 (get_asm_stmt_operands): Same as above.
10240 (get_expr_operands): Same as above.
10241 (parse_ssa_operands): Same as above.
10242 (finalize_ssa_defs): Same as above.
10243 (build_ssa_operands): Same as above, plus create a C-like wrapper.
10244 (update_stmt_operands): Create an instance of operands_scanner.
10246 2020-05-07 Richard Biener <rguenther@suse.de>
10249 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
10250 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
10251 (refered_from_nonlocal_var): Likewise.
10252 (ipa_pta_execute): Likewise.
10254 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
10256 * gcc/tree-ssa-struct-alias.c: Fix comments
10258 2020-05-07 Martin Liska <mliska@suse.cz>
10260 * doc/invoke.texi: Fix 2 optindex entries.
10262 2020-05-07 Richard Biener <rguenther@suse.de>
10264 PR middle-end/94703
10265 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
10266 (tree_decl_common::not_gimple_reg_flag): ... to this.
10267 * tree.h (DECL_GIMPLE_REG_P): Rename ...
10268 (DECL_NOT_GIMPLE_REG_P): ... to this.
10269 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
10270 (create_tmp_reg): Simplify.
10271 (create_tmp_reg_fn): Likewise.
10272 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
10273 * gimplify.c (create_tmp_from_val): Simplify.
10274 (gimplify_bind_expr): Likewise.
10275 (gimplify_compound_literal_expr): Likewise.
10276 (gimplify_function_tree): Likewise.
10277 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
10278 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
10279 (asan_add_global): Copy it.
10280 * cgraphunit.c (cgraph_node::expand_thunk): Force args
10282 * function.c (gimplify_parameters): Copy
10283 DECL_NOT_GIMPLE_REG_P.
10284 * ipa-param-manipulation.c
10285 (ipa_param_body_adjustments::common_initialization): Simplify.
10286 (ipa_param_body_adjustments::reset_debug_stmts): Copy
10287 DECL_NOT_GIMPLE_REG_P.
10288 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
10289 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
10290 * tree-cfg.c (make_blocks_1): Simplify.
10291 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
10292 * tree-eh.c (lower_eh_constructs_2): Simplify.
10293 * tree-inline.c (declare_return_variable): Adjust and
10295 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
10296 (copy_result_decl_to_var): Likewise.
10297 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
10298 * tree-nested.c (create_tmp_var_for): Simplify.
10299 * tree-parloops.c (separate_decls_in_region_name): Copy
10300 DECL_NOT_GIMPLE_REG_P.
10301 * tree-sra.c (create_access_replacement): Adjust and
10302 generalize partial def support.
10303 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
10304 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
10305 * tree-ssa.c (maybe_optimize_var): Handle clearing of
10306 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
10308 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
10309 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
10310 DECL_NOT_GIMPLE_REG_P.
10311 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
10312 * cfgexpand.c (avoid_type_punning_on_regs): New.
10313 (discover_nonconstant_array_refs): Call
10314 avoid_type_punning_on_regs to avoid unsupported mode punning.
10316 2020-05-07 Alex Coplan <alex.coplan@arm.com>
10318 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
10321 2020-05-07 Richard Biener <rguenther@suse.de>
10323 PR tree-optimization/57359
10324 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
10325 (in_mem_ref::dep_loop): Repurpose.
10326 (LOOP_DEP_BIT): Remove.
10327 (enum dep_kind): New.
10328 (enum dep_state): Likewise.
10329 (record_loop_dependence): New function to populate the
10331 (query_loop_dependence): New function to query the dependence
10333 (memory_accesses::refs_in_loop): Rename to ...
10334 (memory_accesses::refs_loaded_in_loop): ... this and change to
10336 (outermost_indep_loop): Adjust.
10337 (mem_ref_alloc): Likewise.
10338 (gather_mem_refs_stmt): Likewise.
10339 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
10340 (struct sm_aux): New.
10341 (execute_sm): Split code generation on exits, record state
10343 (enum sm_kind): New.
10344 (execute_sm_exit): Exit code generation part.
10345 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
10346 dependence checking on stores reached from exits.
10347 (sm_seq_valid_bb): New function gathering SM stores on exits.
10348 (hoist_memory_references): Re-implement.
10349 (refs_independent_p): Add tbaa_p parameter and pass it down.
10350 (record_dep_loop): Remove.
10351 (ref_indep_loop_p_1): Fold into ...
10352 (ref_indep_loop_p): ... this and generalize for three kinds
10353 of dependence queries.
10354 (can_sm_ref_p): Adjust according to hoist_memory_references
10356 (store_motion_loop): Don't do anything if the set of SM
10357 candidates is empty.
10358 (tree_ssa_lim_initialize): Adjust.
10359 (tree_ssa_lim_finalize): Likewise.
10361 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
10362 Pierre-Marie de Rodat <derodat@adacore.com>
10364 * dwarf2out.c (add_data_member_location_attribute): Take into account
10365 the variant part offset in the computation of the data bit offset.
10366 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
10367 in the call to field_byte_offset.
10368 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
10369 confusing assertion.
10370 (analyze_variant_discr): Deal with boolean subtypes.
10372 2020-05-07 Martin Liska <mliska@suse.cz>
10374 * lto-wrapper.c: Split arguments of MAKE environment
10377 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
10379 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
10380 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
10381 fenv_var and new_fenv_var.
10383 2020-05-06 Jakub Jelinek <jakub@redhat.com>
10386 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
10388 (avx512dq_vextract<shuffletype>64x2_1_maskm,
10389 avx512f_vextract<shuffletype>32x4_1_maskm,
10390 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
10391 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
10393 (*avx512dq_vextract<shuffletype>64x2_1,
10394 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
10395 define_insns. Even in the masked variant allow memory output but in
10396 that case use 0 rather than 0C constraint on the source of masked-out
10398 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
10400 (*avx512f_vextract<shuffletype>32x4_1,
10401 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
10402 Even in the masked variant allow memory output but in that case use
10403 0 rather than 0C constraint on the source of masked-out elts.
10404 (vec_extract_lo_<mode><mask_name>): Split into ...
10405 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
10406 define_insns. Even in the masked variant allow memory output but in
10407 that case use 0 rather than 0C constraint on the source of masked-out
10409 (vec_extract_hi_<mode><mask_name>): Split into ...
10410 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
10411 define_insns. Even in the masked variant allow memory output but in
10412 that case use 0 rather than 0C constraint on the source of masked-out
10415 2020-05-06 qing zhao <qing.zhao@oracle.com>
10418 * common.opt: Add -flarge-source-files.
10419 * doc/invoke.texi: Document it.
10420 * toplev.c (process_options): set line_table->default_range_bits
10421 to 0 when flag_large_source_files is true.
10423 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
10426 * config/i386/predicates.md (add_comparison_operator): New predicate.
10427 * config/i386/i386.md (compare->add splitter): New splitters.
10429 2020-05-06 Richard Biener <rguenther@suse.de>
10431 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
10432 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
10433 Remove slp_instance parameter, just iterate over all scalar stmts.
10434 (vect_slp_analyze_instance_dependence): Adjust and likewise.
10435 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
10437 (vect_schedule_slp): Just iterate over all scalar stmts.
10438 (vect_supported_load_permutation_p): Adjust.
10439 (vect_transform_slp_perm_load): Remove slp_instance parameter,
10440 instead use the number of lanes in the node as group size.
10441 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
10442 factor instead of slp_instance as parameter.
10443 (vectorizable_load): Adjust.
10445 2020-05-06 Andreas Schwab <schwab@suse.de>
10447 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
10448 (aarch64_get_extension_string_for_isa_flags): Don't declare.
10450 2020-05-06 Richard Biener <rguenther@suse.de>
10452 PR middle-end/94964
10453 * cfgloopmanip.c (create_preheader): Require non-complex
10454 preheader edge for CP_SIMPLE_PREHEADERS.
10456 2020-05-06 Richard Biener <rguenther@suse.de>
10458 PR tree-optimization/94963
10459 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
10460 no-warning marking of the conditional store.
10461 (execute_sm): Instead mark the uninitialized state
10462 on loop entry to be not warned about.
10464 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
10466 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
10467 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
10468 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
10469 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
10471 * config/i386/i386-builtin.def: Add new builtins.
10472 * config/i386/i386-c.c (ix86_target_macros_internal): Define
10474 * config/i386/i386-options.c (ix86_target_string): Add
10476 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
10477 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
10479 * config/i386/i386.md (define_c_enum "unspec"): Add
10480 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
10481 (TSXLDTRK): New define_int_iterator.
10482 ("<tsxldtrk>"): New define_insn.
10483 * config/i386/i386.opt: Add -mtsxldtrk.
10484 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
10485 * config/i386/tsxldtrkintrin.h: New.
10486 * doc/invoke.texi: Document -mtsxldtrk.
10488 2020-05-06 Jakub Jelinek <jakub@redhat.com>
10490 PR tree-optimization/94921
10491 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
10494 2020-05-06 Richard Biener <rguenther@suse.de>
10496 PR tree-optimization/94965
10497 * tree-vect-stmts.c (vectorizable_load): Fix typo.
10499 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
10501 * doc/install.texi: Replace Sun with Solaris as appropriate.
10502 (Tools/packages necessary for building GCC, Perl version between
10503 5.6.1 and 5.6.24): Remove Solaris 8 reference.
10504 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
10506 (Specific, i?86-*-solaris2*): Update version references for
10507 Solaris 11.3 and later. Remove gas 2.26 caveat.
10508 (Specific, *-*-solaris2*): Update version references for
10509 Solaris 11.3 and later. Remove boehm-gc reference.
10510 Document GMP, MPFR caveats on Solaris 11.3.
10511 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
10512 (Specific, sparc64-*-solaris2*): Likewise.
10513 Document --build requirement.
10515 2020-05-06 Jakub Jelinek <jakub@redhat.com>
10518 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
10519 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
10521 PR rtl-optimization/94873
10522 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
10523 note if SET_SRC (set) has side-effects.
10525 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
10526 Wei Xiao <wei3.xiao@intel.com>
10528 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
10529 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
10530 (ix86_handle_option): Handle -mserialize.
10531 * config.gcc (serializeintrin.h): New header file.
10532 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
10533 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
10535 * config/i386/i386-builtin.def: Add new builtin.
10536 * config/i386/i386-c.c (__SERIALIZE__): New macro.
10537 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
10539 * (ix86_valid_target_attribute_inner_p): Add target attribute
10541 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
10543 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
10544 (serialize): New define_insn.
10545 * config/i386/i386.opt (mserialize): New option
10546 * config/i386/immintrin.h: Include serailizeintrin.h.
10547 * config/i386/serializeintrin.h: New header file.
10548 * doc/invoke.texi: Add documents for -mserialize.
10550 2020-05-06 Richard Biener <rguenther@suse.de>
10552 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
10553 to/from pointer conversion checking.
10555 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
10557 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
10559 * config/rs6000/rs6000-c.c: Likewise.
10560 * config/rs6000/rs6000-call.c: Likewise.
10561 * config/rs6000/rs6000.c: Likewise.
10563 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
10565 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
10566 (RTEMS_ENDFILE_SPEC): Likewise.
10567 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
10568 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
10569 (LIB_SPECS): Support -nodefaultlibs option.
10570 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
10571 (RTEMS_ENDFILE_SPEC): Likewise.
10572 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
10573 (RTEMS_ENDFILE_SPEC): Likewise.
10574 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
10575 (RTEMS_ENDFILE_SPEC): Likewise.
10577 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10579 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
10580 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
10582 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10584 * config/pru/pru.h: Mark R3.w0 as caller saved.
10586 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10588 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
10589 and gen_doloop_begin_internal.
10590 (pru_reorg_loop): Use gen_pruloop with mode.
10591 * config/pru/pru.md: Use new @insn syntax.
10593 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10595 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
10597 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
10599 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
10600 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
10601 (addqi3_cconly_overflow): Ditto.
10602 (umulv<mode>4): Ditto.
10603 (<s>mul<mode>3_highpart): Ditto.
10604 (tls_global_dynamic_32): Ditto.
10605 (tls_local_dynamic_base_32): Ditto.
10612 (*adddi_4): Remove "m" constraint from scratch operand.
10613 (*add<mode>_4): Ditto.
10615 2020-05-05 Jakub Jelinek <jakub@redhat.com>
10617 PR rtl-optimization/94516
10618 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
10619 with sp = reg, add REG_EQUAL note with sp + const.
10620 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
10621 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
10622 postreload sp = sp + const to sp = reg optimization if needed and
10624 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
10625 reg = sp insn with sp + const REG_EQUAL note. Adjust
10626 try_apply_stack_adjustment caller, call
10627 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
10628 (combine_stack_adjustments): Allocate and free LIVE bitmap,
10629 adjust combine_stack_adjustments_for_block caller.
10631 2020-05-05 Martin Liska <mliska@suse.cz>
10633 PR gcov-profile/93623
10634 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
10637 2020-05-05 Martin Liska <mliska@suse.cz>
10639 * opt-functions.awk (opt_args_non_empty): New function.
10640 * opt-read.awk: Use the function for various option arguments.
10642 2020-05-05 Martin Liska <mliska@suse.cz>
10645 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
10646 report warning when the jobserver is not detected.
10648 2020-05-05 Martin Liska <mliska@suse.cz>
10650 PR gcov-profile/94636
10651 * gcov.c (main): Print total lines summary at the end.
10652 (generate_results): Expect file_name always being non-null.
10653 Print newline after intermediate file is printed in order to align with
10654 what we do for normal files.
10656 2020-05-05 Martin Liska <mliska@suse.cz>
10658 * dumpfile.c (dump_switch_p): Change return type
10659 and print option suggestion.
10660 * dumpfile.h: Change return type.
10661 * opts-global.c (handle_common_deferred_options):
10662 Move error into dump_switch_p function.
10664 2020-05-05 Martin Liska <mliska@suse.cz>
10667 * alloc-pool.h: Use const for some arguments.
10668 * bitmap.h: Likewise.
10669 * mem-stats.h: Likewise.
10670 * sese.h (get_entry_bb): Likewise.
10671 (get_exit_bb): Likewise.
10673 2020-05-05 Richard Biener <rguenther@suse.de>
10675 * tree-vect-slp.c (struct vdhs_data): New.
10676 (vect_detect_hybrid_slp): New walker.
10677 (vect_detect_hybrid_slp): Rewrite.
10679 2020-05-05 Richard Biener <rguenther@suse.de>
10682 * tree-ssa-structalias.c (ipa_pta_execute): Use
10683 varpool_node::externally_visible_p ().
10684 (refered_from_nonlocal_var): Likewise.
10686 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
10688 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
10689 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
10690 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
10692 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
10694 * gimplify.c (gimplify_init_constructor): Do not put the constructor
10695 into static memory if it is not complete.
10697 2020-05-05 Richard Biener <rguenther@suse.de>
10699 PR tree-optimization/94949
10700 * tree-ssa-loop-im.c (execute_sm): Check whether we use
10701 the multithreaded model or always compute the stored value
10702 before eliding a load.
10704 2020-05-05 Alex Coplan <alex.coplan@arm.com>
10706 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
10708 2020-05-05 Jakub Jelinek <jakub@redhat.com>
10710 PR tree-optimization/94800
10711 * match.pd (X + (X << C) to X * (1 + (1 << C)),
10712 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
10716 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
10718 PR tree-optimization/94914
10719 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
10720 New simplification.
10722 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
10724 * config/i386/i386.md (*testqi_ext_3): Use
10725 int_nonimmediate_operand instead of manual mode checks.
10726 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
10727 Use int_nonimmediate_operand predicate. Rewrite
10728 define_insn_and_split pattern to a combine pass splitter.
10730 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
10732 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
10733 * configure: Regenerate.
10735 2020-05-05 Jakub Jelinek <jakub@redhat.com>
10738 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
10739 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
10740 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
10741 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
10743 2020-05-04 Clement Chigot <clement.chigot@atos.net>
10744 David Edelsohn <dje.gcc@gmail.com>
10746 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
10747 for fmodl, frexpl, ldexpl and modfl builtins.
10749 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
10751 PR middle-end/94941
10752 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
10753 chosen lhs is different from the gcall lhs.
10754 (expand_mask_load_optab_fn): Likewise.
10755 (expand_gather_load_optab_fn): Likewise.
10757 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
10760 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
10761 (EQ compare->LTU compare splitter): New splitter.
10762 (NE compare->NEG splitter): Ditto.
10764 2020-05-04 Marek Polacek <polacek@redhat.com>
10767 2020-04-30 Marek Polacek <polacek@redhat.com>
10770 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
10771 (check_aligned_type): Check if TYPE_USER_ALIGN match.
10773 2020-05-04 Richard Biener <rguenther@suse.de>
10775 PR tree-optimization/93891
10776 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
10777 the original reference tree for assessing access alignment.
10779 2020-05-04 Richard Biener <rguenther@suse.de>
10781 PR tree-optimization/39612
10782 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
10783 (set_ref_loaded_in_loop): New.
10784 (mark_ref_loaded): Likewise.
10785 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
10786 (execute_sm): Avoid issueing a load when it was not there.
10787 (execute_sm_if_changed): Avoid issueing warnings for the
10790 2020-05-04 Martin Jambor <mjambor@suse.cz>
10793 * tree-inline.c (tree_function_versioning): Leave any type conversion
10794 of replacements to setup_one_parameter and its friend
10795 force_value_to_type.
10797 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
10800 * config/i386/predicates.md (shr_comparison_operator): New predicate.
10801 * config/i386/i386.md (compare->shr splitter): New splitters.
10803 2020-05-04 Jakub Jelinek <jakub@redhat.com>
10805 PR tree-optimization/94718
10806 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
10808 PR tree-optimization/94718
10809 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
10810 replace two nop conversions on bit_{and,ior,xor} argument
10811 and result with just one conversion on the result or another argument.
10813 PR tree-optimization/94718
10814 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
10815 -> (X ^ Y) & C eqne 0 optimization to ...
10816 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
10818 * opts.c (get_option_html_page): Instead of hardcoding a list of
10819 options common between C/C++ and Fortran only use gfortran/
10820 documentation for warnings that have CL_Fortran set but not
10823 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
10825 * config/i386/i386-expand.c (ix86_expand_int_movcc):
10826 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
10827 (emit_memmov): Ditto.
10828 (emit_memset): Ditto.
10829 (ix86_expand_strlensi_unroll_1): Ditto.
10830 (release_scratch_register_on_entry): Ditto.
10831 (gen_frame_set): Ditto.
10832 (ix86_emit_restore_reg_using_pop): Ditto.
10833 (ix86_emit_outlined_ms2sysv_restore): Ditto.
10834 (ix86_expand_epilogue): Ditto.
10835 (ix86_expand_split_stack_prologue): Ditto.
10836 * config/i386/i386.md (push immediate splitter): Ditto.
10840 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
10842 PR translation/93861
10843 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
10846 2020-05-02 Jakub Jelinek <jakub@redhat.com>
10848 * config/tilegx/tilegx.md
10849 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
10850 rather than just <n>.
10852 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
10855 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
10856 and crtl->patch_area_entry.
10857 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
10858 * opts.c (common_handle_option): Limit
10859 function_entry_patch_area_size and function_entry_patch_area_start
10860 to USHRT_MAX. Fix a typo in error message.
10861 * varasm.c (assemble_start_function): Use crtl->patch_area_size
10862 and crtl->patch_area_entry.
10863 * doc/invoke.texi: Document the maximum value for
10864 -fpatchable-function-entry.
10866 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
10868 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
10869 Override SUBTARGET_SHADOW_OFFSET macro.
10871 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
10873 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
10874 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
10875 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
10876 * config/i386/freebsd.h: Likewise.
10877 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
10878 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
10880 2020-04-30 Alexandre Oliva <oliva@adacore.com>
10882 * doc/sourcebuild.texi (Effective-Target Keywords): Document
10883 the newly-introduced fileio effective target.
10885 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
10887 PR rtl-optimization/94740
10888 * cse.c (cse_process_notes_1): Replace with...
10889 (cse_process_note_1): ...this new function, acting as a
10890 simplify_replace_fn_rtx callback to process_note. Handle only
10891 REGs and MEMs directly. Validate the MEM if cse_process_note
10892 changes its address.
10893 (cse_process_notes): Replace with...
10894 (cse_process_note): ...this new function.
10895 (cse_extended_basic_block): Update accordingly, iterating over
10896 the register notes and passing individual notes to cse_process_note.
10898 2020-04-30 Carl Love <cel@us.ibm.com>
10900 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
10902 2020-04-30 Martin Jambor <mjambor@suse.cz>
10905 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
10906 saved by the inliner and thunks which had their call inlined.
10907 * ipa-inline-transform.c (save_inline_function_body): Fill in
10908 former_clone_of of new body holders.
10910 2020-04-30 Jakub Jelinek <jakub@redhat.com>
10912 * BASE-VER: Set to 11.0.0.
10914 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
10916 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
10918 2020-04-30 Marek Polacek <polacek@redhat.com>
10921 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
10922 (check_aligned_type): Check if TYPE_USER_ALIGN match.
10924 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10926 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
10927 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
10928 * doc/invoke.texi (moutline-atomics): Document as on by default.
10930 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
10933 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
10934 the check for NOTE_INSN_DELETED_LABEL.
10936 2020-04-30 Jakub Jelinek <jakub@redhat.com>
10938 * configure.ac (--with-documentation-root-url,
10939 --with-changes-root-url): Diagnose URL not ending with /,
10940 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
10941 * opts.h (get_changes_url): Remove.
10942 * opts.c (get_changes_url): Remove.
10943 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
10944 or -DCHANGES_ROOT_URL.
10945 * doc/install.texi (--with-documentation-root-url,
10946 --with-changes-root-url): Document.
10947 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
10948 get_changes_url and free, change url variable type to const char * and
10949 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
10950 * config/s390/s390.c (s390_function_arg_vector,
10951 s390_function_arg_float): Likewise.
10952 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
10954 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
10956 * config.in: Regenerate.
10957 * configure: Regenerate.
10959 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
10962 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
10964 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
10966 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
10967 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
10969 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
10971 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
10972 Change constraint for vlrl/vstrl to jb4.
10974 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10976 * var-tracking.c (vt_initialize): Move variables pre and post
10977 into inner block and initialize both in order to fix warning
10978 about uninitialized use. Remove unnecessary checks for
10979 frame_pointer_needed.
10981 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10983 * toplev.c (output_stack_usage_1): Ensure that first
10984 argument to fprintf is not null.
10986 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10988 * configure.ac (-with-changes-root-url): New configure option,
10989 defaulting to https://gcc.gnu.org/.
10990 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
10992 * pretty-print.c (get_end_url_string): New function.
10993 (pp_format): Handle %{ and %} for URLs.
10994 (pp_begin_url): Use pp_string instead of pp_printf.
10995 (pp_end_url): Use get_end_url_string.
10996 * opts.h (get_changes_url): Declare.
10997 * opts.c (get_changes_url): New function.
10998 * config/rs6000/rs6000-call.c: Include opts.h.
10999 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
11000 of just in GCC 10.1 in diagnostics and add URL.
11001 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
11002 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
11004 * config/s390/s390.c (s390_function_arg_vector,
11005 s390_function_arg_float): Likewise.
11006 * configure: Regenerated.
11009 * config/s390/s390.c (s390_function_arg_vector,
11010 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
11011 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
11012 passed to the function rather than the type of the single element.
11013 Rename cxx17_empty_base_seen variable to empty_base_seen, change
11014 type to int, and adjust diagnostics depending on if the field
11015 has [[no_unique_attribute]] or not.
11018 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
11019 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
11020 used in casts into parens.
11021 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
11022 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
11023 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
11024 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
11025 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
11026 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
11027 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
11028 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
11029 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
11030 _mm256_mask_cmp_epu8_mask): Likewise.
11031 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
11032 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
11033 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
11034 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
11037 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
11038 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
11039 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
11040 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
11041 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
11042 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
11043 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
11044 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
11045 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
11046 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
11047 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
11048 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
11049 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
11051 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
11052 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
11053 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
11054 as mask vector containing -1.0 or -1.0f elts, but instead vector
11055 with all bits set using _mm*_cmpeq_p? with zero operands.
11056 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
11057 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
11058 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
11059 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
11060 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
11061 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
11062 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
11063 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
11064 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
11065 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
11066 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
11067 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
11068 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
11069 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
11070 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
11071 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
11072 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
11074 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
11075 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
11076 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
11077 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
11078 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
11079 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
11080 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
11081 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
11082 _mm512_mask_prefetch_i64scatter_ps): Likewise.
11083 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
11084 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
11085 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
11086 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
11087 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
11088 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
11089 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
11090 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
11091 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
11092 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
11093 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
11094 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
11095 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
11096 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
11097 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
11098 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
11099 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
11100 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
11101 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
11102 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
11103 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
11104 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
11105 _mm_mask_i64scatter_epi64): Likewise.
11107 2020-04-29 Jeff Law <law@redhat.com>
11109 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
11110 division instructions are 4 bytes long.
11112 2020-04-29 Jakub Jelinek <jakub@redhat.com>
11115 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
11116 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
11117 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
11118 take address of TARGET_EXPR of fenv_var with void_node initializer.
11121 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11123 PR tree-optimization/94774
11124 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
11127 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
11129 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
11130 * calls.c (cxx17_empty_base_field_p): New function. Check
11131 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
11134 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
11137 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
11138 Allow -fcf-protection with -mindirect-branch=thunk-extern and
11139 -mfunction-return=thunk-extern.
11140 * doc/invoke.texi: Update notes for -fcf-protection=branch with
11141 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
11143 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
11145 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
11147 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
11149 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
11150 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
11151 fenv_var and new_fenv_var.
11153 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
11155 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
11156 effective-target keyword.
11157 (arm_arch_v8a_hard_multilib): Likewise.
11158 (arm_arch_v8a_hard): Document new dg-add-options keyword.
11159 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
11160 code is deprecated and has not been updated to handle
11161 DECL_FIELD_ABI_IGNORED.
11162 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
11163 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
11164 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
11165 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
11166 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
11167 something actually is a HFA or HVA. Record whether we see a
11168 [[no_unique_address]] field that previous GCCs would not have
11169 ignored in this way.
11170 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
11171 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
11172 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
11173 diagnostic messages.
11174 (arm_needs_doubleword_align): Add a comment explaining why we
11175 consider even zero-sized fields.
11177 2020-04-29 Richard Biener <rguenther@suse.de>
11178 Li Zekun <lizekun1@huawei.com>
11181 * tree.c (component_ref_size): Guard against error_mark_node
11182 DECL_INITIAL as it happens with LTO.
11184 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
11186 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
11187 comment explaining why we consider even zero-sized fields.
11188 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
11189 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
11190 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
11191 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
11192 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
11193 something actually is a HFA or HVA. Record whether we see a
11194 [[no_unique_address]] field that previous GCCs would not have
11195 ignored in this way.
11196 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
11197 whether diagnostics should be suppressed. Update the calls to
11198 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
11199 [[no_unique_address]] case.
11200 (aarch64_return_in_msb): Update call accordingly, never silencing
11202 (aarch64_function_value): Likewise.
11203 (aarch64_return_in_memory_1): Likewise.
11204 (aarch64_init_cumulative_args): Likewise.
11205 (aarch64_gimplify_va_arg_expr): Likewise.
11206 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
11207 use it to decide whether arch64_vfp_is_call_or_return_candidate
11209 (aarch64_pass_by_reference): Update calls accordingly.
11210 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
11211 to decide whether arch64_vfp_is_call_or_return_candidate should be
11214 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
11217 * config/aarch64/aarch64-builtins.c
11218 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
11219 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
11222 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
11224 * configure.ac <$enable_offload_targets>: Do parsing as done
11226 * configure: Regenerate.
11228 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
11229 * configure: Regenerate.
11232 * rtlanal.c (set_noop_p): Handle non-constant selectors.
11235 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
11237 (TARGET_EXCEPT_UNWIND_INFO): Define.
11239 2020-04-29 Jakub Jelinek <jakub@redhat.com>
11242 * config/gcn/gcn.md (*mov<mode>_insn): Use
11243 'reg_overlap_mentioned_p' to check for overlap.
11246 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
11247 instead of cxx17_empty_base_field_p.
11250 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
11251 DECL_FIELD_ABI_IGNORED.
11252 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
11253 * calls.h (cxx17_empty_base_field_p): Change into a temporary
11254 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
11256 * calls.c (cxx17_empty_base_field_p): Remove.
11257 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
11258 DECL_FIELD_ABI_IGNORED.
11259 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
11260 * lto-streamer-out.c (hash_tree): Likewise.
11261 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
11262 cxx17_empty_base_seen to empty_base_seen, change type to int *,
11263 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
11264 cxx17_empty_base_field_p, if "no_unique_address" attribute is
11265 present, propagate that to the caller too.
11266 (rs6000_discover_homogeneous_aggregate): Adjust
11267 rs6000_aggregate_candidate caller, emit different diagnostics
11268 when c++17 empty base fields are present and when empty
11269 [[no_unique_address]] fields are present.
11270 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
11271 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
11274 2020-04-29 Richard Biener <rguenther@suse.de>
11276 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
11277 Just check whether the stmt stores.
11279 2020-04-28 Alexandre Oliva <oliva@adacore.com>
11282 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
11283 output operand in emulation. Don't overwrite pseudos.
11285 2020-04-28 Jeff Law <law@redhat.com>
11287 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
11288 multiply patterns are 4 bytes long.
11290 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11292 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
11293 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
11295 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
11296 Jakub Jelinek <jakub@redhat.com>
11299 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
11300 base class artificial fields.
11301 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
11302 decision is different after this fix.
11304 2020-04-28 David Malcolm <dmalcolm@redhat.com>
11310 * doc/invoke.texi (Static Analyzer Options): Remove
11311 -Wanalyzer-use-of-uninitialized-value.
11312 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
11314 2020-04-28 Jakub Jelinek <jakub@redhat.com>
11316 PR tree-optimization/94809
11317 * tree.c (build_call_expr_internal_loc_array): Call
11318 process_call_operands.
11320 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
11322 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
11323 * config/aarch64/aarch64-tune.md: Regenerate.
11324 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
11325 (thunderx3t110_regmove_cost): Likewise.
11326 (thunderx3t110_vector_cost): Likewise.
11327 (thunderx3t110_prefetch_tune): Likewise.
11328 (thunderx3t110_tunings): Likewise.
11329 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
11331 * config/aarch64/thunderx3t110.md: New file.
11332 * config/aarch64/aarch64.md: Include thunderx3t110.md.
11333 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
11335 2020-04-28 Jakub Jelinek <jakub@redhat.com>
11338 * config/s390/s390.c (s390_function_arg_vector,
11339 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
11341 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
11343 PR tree-optimization/94727
11344 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
11345 operands are invariant booleans, use the mask type associated with the
11346 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
11347 (vectorizable_condition): Pass vectype unconditionally to
11348 vect_is_simple_cond.
11350 2020-04-27 Jakub Jelinek <jakub@redhat.com>
11353 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
11354 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
11355 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
11357 2020-04-27 David Malcolm <dmalcolm@redhat.com>
11360 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
11361 default value, so that it can by supplied by get_option_html_page.
11362 * configure: Regenerate.
11363 * opts.c: Include "selftest.h".
11364 (get_option_html_page): New function.
11365 (get_option_url): Use it. Reformat to place comments next to the
11366 expressions they refer to.
11367 (selftest::test_get_option_html_page): New.
11368 (selftest::opts_c_tests): New.
11369 * selftest-run-tests.c (selftest::run_tests): Call
11370 selftest::opts_c_tests.
11371 * selftest.h (selftest::opts_c_tests): New decl.
11373 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
11375 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
11376 UINTVAL to CONST_INTs.
11378 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11380 * config/arm/constraints.md (e): Remove constraint.
11381 (Te): Define constraint.
11382 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
11383 operand 0 from "e" to "Te".
11384 (vaddvaq_<supf><mode>): Likewise.
11385 (vaddvq_p_<supf><mode>): Likewise.
11386 (vmladavq_<supf><mode>): Likewise.
11387 (vmladavxq_s<mode>): Likewise.
11388 (vmlsdavq_s<mode>): Likewise.
11389 (vmlsdavxq_s<mode>): Likewise.
11390 (vaddvaq_p_<supf><mode>): Likewise.
11391 (vmladavaq_<supf><mode>): Likewise.
11392 (vmladavq_p_<supf><mode>): Likewise.
11393 (vmladavxq_p_s<mode>): Likewise.
11394 (vmlsdavq_p_s<mode>): Likewise.
11395 (vmlsdavxq_p_s<mode>): Likewise.
11396 (vmlsdavaxq_s<mode>): Likewise.
11397 (vmlsdavaq_s<mode>): Likewise.
11398 (vmladavaxq_s<mode>): Likewise.
11399 (vmladavaq_p_<supf><mode>): Likewise.
11400 (vmladavaxq_p_s<mode>): Likewise.
11401 (vmlsdavaq_p_s<mode>): Likewise.
11402 (vmlsdavaxq_p_s<mode>): Likewise.
11404 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
11406 * config/arm/arm.c (output_move_neon): Only get the first operand if
11409 2020-04-27 Felix Yang <felix.yang@huawei.com>
11411 PR tree-optimization/94784
11412 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
11413 assert around so that it checks that the two vectors have equal
11414 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
11415 types is a useless_type_conversion_p.
11417 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
11420 * dwarf2cfi.c (struct GTY): Add ra_mangled.
11421 (cfi_row_equal_p): Check ra_mangled.
11422 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
11423 this only handles the sparc logic now.
11424 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
11425 the aarch64 specific logic.
11426 (dwarf2out_frame_debug): Update to use the new subroutines.
11427 (change_cfi_row): Check ra_mangled.
11429 2020-04-27 Jakub Jelinek <jakub@redhat.com>
11432 * config/s390/s390.c (s390_function_arg_vector,
11433 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
11435 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
11437 * common/config/rs6000/rs6000-common.c
11438 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
11440 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
11443 2020-04-27 Martin Liska <mliska@suse.cz>
11446 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
11447 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
11449 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
11452 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
11454 (rs6000_emit_prologue_components):
11455 Check with frame_pointer_needed_indeed.
11456 (rs6000_emit_epilogue_components): Likewise.
11457 (rs6000_emit_prologue): Likewise.
11458 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
11460 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
11462 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
11463 stack frame when debugging and flag_compare_debug is enabled.
11465 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
11467 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
11468 enable PC-relative addressing for -mcpu=future.
11469 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
11470 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
11471 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
11472 suppress PC-relative addressing.
11473 (rs6000_option_override_internal): Split up error messages
11474 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
11475 system supports it.
11477 2020-04-25 Jakub Jelinek <jakub@redhat.com>
11478 Richard Biener <rguenther@suse.de>
11480 PR tree-optimization/94734
11481 PR tree-optimization/89430
11482 * tree-ssa-phiopt.c: Include tree-eh.h.
11483 (cond_store_replacement): Return false if an automatic variable
11484 access could trap. If -fstore-data-races, don't return false
11485 just because an automatic variable is addressable.
11487 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
11489 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
11491 (add<mode>_sext_dup2_exec): Likewise.
11493 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
11496 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
11497 endian byteshift_val calculation.
11499 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
11501 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
11503 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
11505 * config/aarch64/arm_sve.h: Add a comment.
11507 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
11509 PR rtl-optimization/94708
11510 * combine.c (simplify_if_then_else): Add check for
11511 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
11513 2020-04-23 Martin Sebor <msebor@redhat.com>
11516 * common.opt (-Wno-frame-larger-than): New option.
11517 (-Wno-larger-than, -Wno-stack-usage): Same.
11519 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
11521 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
11523 (mov<mode>_exec): Likewise.
11524 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
11525 (<convop><mode><vndi>2_exec): Likewise.
11527 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
11529 PR tree-optimization/94717
11530 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
11531 of the stores doesn't have the same landing pad number as the first.
11532 (coalesce_immediate_stores): Do not try to coalesce the store using
11533 bswap if it doesn't have the same landing pad number as the first.
11535 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
11537 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
11538 Replace outdated link to ELFv2 ABI.
11540 2020-04-23 Jakub Jelinek <jakub@redhat.com>
11543 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
11546 PR middle-end/94724
11547 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
11548 temporarily with non-final second operand and updating it later,
11549 push COMPOUND_EXPRs into a vector and process it in reverse,
11550 creating COMPOUND_EXPRs with the final operands.
11552 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
11555 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
11556 bti c and bti j handling.
11558 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
11559 Thomas Schwinge <thomas@codesourcery.com>
11561 PR middle-end/93488
11563 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
11564 t_async and the wait arguments.
11566 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
11568 PR tree-optimization/94727
11569 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
11570 comparing invariant scalar booleans.
11572 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
11573 Jakub Jelinek <jakub@redhat.com>
11576 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
11577 empty base class artificial fields.
11578 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
11579 different after this fix.
11581 2020-04-23 Jakub Jelinek <jakub@redhat.com>
11584 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
11585 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
11586 if the same type has been diagnosed most recently already.
11588 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11590 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
11592 (__arm_vbicq_n_s16): Likewise.
11593 (__arm_vbicq_n_u32): Likewise.
11594 (__arm_vbicq_n_s32): Likewise.
11595 (__arm_vbicq): Likewise.
11596 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
11597 (__arm_vbicq_n_s32): Likewise.
11598 (__arm_vbicq_n_u16): Likewise.
11599 (__arm_vbicq_n_u32): Likewise.
11600 (__arm_vdupq_m_n_s8): Likewise.
11601 (__arm_vdupq_m_n_s16): Likewise.
11602 (__arm_vdupq_m_n_s32): Likewise.
11603 (__arm_vdupq_m_n_u8): Likewise.
11604 (__arm_vdupq_m_n_u16): Likewise.
11605 (__arm_vdupq_m_n_u32): Likewise.
11606 (__arm_vdupq_m_n_f16): Likewise.
11607 (__arm_vdupq_m_n_f32): Likewise.
11608 (__arm_vldrhq_gather_offset_s16): Likewise.
11609 (__arm_vldrhq_gather_offset_s32): Likewise.
11610 (__arm_vldrhq_gather_offset_u16): Likewise.
11611 (__arm_vldrhq_gather_offset_u32): Likewise.
11612 (__arm_vldrhq_gather_offset_f16): Likewise.
11613 (__arm_vldrhq_gather_offset_z_s16): Likewise.
11614 (__arm_vldrhq_gather_offset_z_s32): Likewise.
11615 (__arm_vldrhq_gather_offset_z_u16): Likewise.
11616 (__arm_vldrhq_gather_offset_z_u32): Likewise.
11617 (__arm_vldrhq_gather_offset_z_f16): Likewise.
11618 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
11619 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
11620 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
11621 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
11622 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
11623 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
11624 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
11625 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
11626 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
11627 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
11628 (__arm_vldrwq_gather_offset_s32): Likewise.
11629 (__arm_vldrwq_gather_offset_u32): Likewise.
11630 (__arm_vldrwq_gather_offset_f32): Likewise.
11631 (__arm_vldrwq_gather_offset_z_s32): Likewise.
11632 (__arm_vldrwq_gather_offset_z_u32): Likewise.
11633 (__arm_vldrwq_gather_offset_z_f32): Likewise.
11634 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
11635 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
11636 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
11637 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
11638 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
11639 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
11640 (__arm_vdwdupq_x_n_u8): Likewise.
11641 (__arm_vdwdupq_x_n_u16): Likewise.
11642 (__arm_vdwdupq_x_n_u32): Likewise.
11643 (__arm_viwdupq_x_n_u8): Likewise.
11644 (__arm_viwdupq_x_n_u16): Likewise.
11645 (__arm_viwdupq_x_n_u32): Likewise.
11646 (__arm_vidupq_x_n_u8): Likewise.
11647 (__arm_vddupq_x_n_u8): Likewise.
11648 (__arm_vidupq_x_n_u16): Likewise.
11649 (__arm_vddupq_x_n_u16): Likewise.
11650 (__arm_vidupq_x_n_u32): Likewise.
11651 (__arm_vddupq_x_n_u32): Likewise.
11652 (__arm_vldrdq_gather_offset_s64): Likewise.
11653 (__arm_vldrdq_gather_offset_u64): Likewise.
11654 (__arm_vldrdq_gather_offset_z_s64): Likewise.
11655 (__arm_vldrdq_gather_offset_z_u64): Likewise.
11656 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
11657 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
11658 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
11659 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
11660 (__arm_vidupq_m_n_u8): Likewise.
11661 (__arm_vidupq_m_n_u16): Likewise.
11662 (__arm_vidupq_m_n_u32): Likewise.
11663 (__arm_vddupq_m_n_u8): Likewise.
11664 (__arm_vddupq_m_n_u16): Likewise.
11665 (__arm_vddupq_m_n_u32): Likewise.
11666 (__arm_vidupq_n_u16): Likewise.
11667 (__arm_vidupq_n_u32): Likewise.
11668 (__arm_vidupq_n_u8): Likewise.
11669 (__arm_vddupq_n_u16): Likewise.
11670 (__arm_vddupq_n_u32): Likewise.
11671 (__arm_vddupq_n_u8): Likewise.
11673 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
11675 * doc/install.texi (D-Specific Options): Document
11676 --enable-libphobos-checking and --with-libphobos-druntime-only.
11678 2020-04-23 Jakub Jelinek <jakub@redhat.com>
11681 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
11682 cxx17_empty_base_seen argument. Pass it to recursive calls.
11683 Ignore cxx17_empty_base_field_p fields after setting
11684 *cxx17_empty_base_seen to true.
11685 (rs6000_discover_homogeneous_aggregate): Adjust
11686 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
11687 aggregates with C++17 empty base fields.
11690 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
11691 if last_decl is error_mark_node or has such a TREE_TYPE.
11694 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
11695 if last_decl is error_mark_node or has such a TREE_TYPE.
11697 2020-04-22 Felix Yang <felix.yang@huawei.com>
11700 * config/aarch64/aarch64.h (TARGET_SVE):
11701 Add && !TARGET_GENERAL_REGS_ONLY.
11702 (TARGET_SVE2): Add && TARGET_SVE.
11703 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
11704 TARGET_SVE2_SM4): Add && TARGET_SVE2.
11705 * config/aarch64/aarch64-sve-builtins.h
11706 (sve_switcher::m_old_general_regs_only): New member.
11707 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
11709 (reported_missing_registers_p): New variable.
11710 (check_required_extensions): Call check_required_registers before
11711 return if all required extenstions are present.
11712 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
11713 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
11714 global_options.x_target_flags.
11715 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
11716 global_options.x_target_flags if m_old_general_regs_only is true.
11718 2020-04-22 Zackery Spytz <zspytz@gmail.com>
11720 * doc/extend.exi: Add "free" to list of other builtin functions
11723 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
11726 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
11727 if TARGET_PREFIXED.
11728 (store_quadpti): Ditto.
11729 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
11730 plq will be used and doesn't need it.
11731 (atomic_store<mode>): Ditto, for pstq.
11733 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
11735 * doc/invoke.texi: Update flags turned on by -O3.
11737 2020-04-22 Jakub Jelinek <jakub@redhat.com>
11740 * config/ia64/ia64.c (hfa_element_mode): Ignore
11741 cxx17_empty_base_field_p fields.
11744 * calls.h (cxx17_empty_base_field_p): Declare.
11745 * calls.c (cxx17_empty_base_field_p): Define.
11747 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
11749 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
11751 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11752 Andre Vieira <andre.simoesdiasvieira@arm.com>
11753 Mihail Ionescu <mihail.ionescu@arm.com>
11755 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
11756 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
11757 (ALL_QUIRKS): Add quirk_no_asmcpu.
11758 (cortex-m55): Define new cpu.
11759 * config/arm/arm-tables.opt: Regenerate.
11760 * config/arm/arm-tune.md: Likewise.
11761 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
11763 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
11765 PR tree-optimization/94700
11766 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
11767 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
11768 of similarly-structured but distinct vector types.
11770 2020-04-21 Martin Sebor <msebor@redhat.com>
11772 PR middle-end/94647
11773 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
11774 the computation of the lower bound of the source access size.
11775 (builtin_access::generic_overlap): Remove a hack for setting ranges
11776 of overlap offsets.
11778 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
11780 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
11781 (ASM_WEAKEN_DECL): New define.
11782 (HAVE_GAS_WEAKREF): Undefine.
11784 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
11786 PR tree-optimization/94683
11787 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
11788 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
11789 but distinct vector types.
11791 2020-04-21 Jakub Jelinek <jakub@redhat.com>
11794 * stor-layout.c (place_field, finalize_record_size): Don't emit
11795 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
11796 * ubsan.c (ubsan_get_type_descriptor_type,
11797 ubsan_get_source_location_type, ubsan_create_data): Set
11799 * asan.c (asan_global_struct): Likewise.
11801 2020-04-21 Duan bo <duanbo3@huawei.com>
11804 * config/aarch64/aarch64.c: Add an error message for option conflict.
11805 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
11806 incompatible with -fpic, -fPIC and -mabi=ilp32.
11808 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
11811 * omp-low.c (new_omp_context): Remove assignments to
11812 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
11814 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
11816 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
11817 ("popcountv2di2_vx"): Use simplify_gen_subreg.
11819 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
11822 * config/s390/s390-builtin-types.def: Add 3 new function modes.
11823 * config/s390/s390-builtins.def: Add mode dependent low-level
11824 builtin and map the overloaded builtins to these.
11825 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
11826 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
11828 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
11830 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
11831 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
11832 estimated VF and is no worse at double the estimated VF.
11834 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
11837 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
11838 order of arguments to rtx_vector_builder.
11839 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
11840 When extending the trailing constants to a full vector, replace any
11841 variables with zeros.
11843 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
11846 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
11849 2020-04-20 Martin Liska <mliska@suse.cz>
11851 * symtab.c (symtab_node::dump_references): Add space after
11853 (symtab_node::dump_referring): Likewise.
11855 2020-04-18 Jeff Law <law@redhat.com>
11858 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
11861 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
11863 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
11864 attributes): Document d_runtime_has_std_library.
11866 2020-04-17 Jeff Law <law@redhat.com>
11868 PR rtl-optimization/90275
11869 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
11870 when the destination has a REG_UNUSED note.
11872 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
11874 PR middle-end/94635
11875 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
11878 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
11880 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
11881 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
11882 cost of load and store insns if one loop iteration has enough scalar
11883 elements to use an Advanced SIMD LDP or STP.
11884 (aarch64_add_stmt_cost): Update call accordingly.
11886 2020-04-17 Jakub Jelinek <jakub@redhat.com>
11887 Jeff Law <law@redhat.com>
11890 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
11891 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
11892 or pos + len >= 32, or pos + len is equal to operands[2] precision
11893 and operands[2] is not a register operand. During splitting perform
11894 SImode AND if operands[0] doesn't have CCZmode and pos + len is
11895 equal to mode precision.
11897 2020-04-17 Richard Biener <rguenther@suse.de>
11900 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
11902 * dwarf2out.c (dw_val_equal_p): Fix pasto in
11903 dw_val_class_vms_delta comparison.
11904 * optabs.c (expand_binop_directly): Fix pasto in commutation
11906 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
11909 2020-04-17 Jakub Jelinek <jakub@redhat.com>
11911 PR rtl-optimization/94618
11912 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
11913 insn is the BB_END of its block, but also when it is only followed
11914 by DEBUG_INSNs in its block.
11916 PR tree-optimization/94621
11917 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
11918 Move id->adjust_array_error_bounds check first in the condition.
11920 2020-04-17 Martin Liska <mliska@suse.cz>
11921 Jonathan Yong <10walls@gmail.com>
11923 PR gcov-profile/94570
11924 * coverage.c (coverage_init): Use separator properly.
11926 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
11928 PR rtl-optimization/93974
11929 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
11930 (rs6000_cannot_substitute_mem_equiv_p): New function.
11932 2020-04-16 Martin Jambor <mjambor@suse.cz>
11935 * ipa-inline.h (ipa_saved_clone_sources): Declare.
11936 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
11937 (save_inline_function_body): Link the new body holder with the
11939 * cgraph.c: Include ipa-inline.h.
11940 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
11941 the statement in ipa_saved_clone_sources.
11942 * cgraphunit.c: Include ipa-inline.h.
11943 (expand_all_functions): Free ipa_saved_clone_sources.
11945 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
11948 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
11949 the VNx16BI lowpart of the recursively-generated constant.
11951 2020-04-16 Martin Liska <mliska@suse.cz>
11952 Jakub Jelinek <jakub@redhat.com>
11955 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
11956 DECL_IS_REPLACEABLE_OPERATOR during cloning.
11957 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
11958 (propagate_necessity): Check operator names.
11960 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
11962 PR rtl-optimization/94605
11963 * early-remat.c (early_remat::process_block): Handle insns that
11964 set multiple candidate registers.
11965 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
11967 PR gcov-profile/93401
11968 * common.opt (profile-prefix-path): New option.
11969 * coverae.c: Include diagnostics.h.
11970 (coverage_init): Strip profile prefix path.
11971 * doc/invoke.texi (-fprofile-prefix-path): Document.
11973 2020-04-16 Richard Biener <rguenther@suse.de>
11975 PR middle-end/94614
11976 * expr.c (emit_move_multi_word): Do not generate code when
11977 the destination part is undefined_operand_subword_p.
11978 * lower-subreg.c (resolve_clobber): Look through a paradoxica
11981 2020-04-16 Martin Jambor <mjambor@suse.cz>
11983 PR tree-optimization/94598
11984 * tree-sra.c (verify_sra_access_forest): Fix verification of total
11985 scalarization accesses under access to one-element arrays.
11987 2020-04-16 Jakub Jelinek <jakub@redhat.com>
11990 * function.c (assign_parm_find_data_types): Add workaround for
11991 BROKEN_VALUE_INITIALIZATION compilers.
11993 2020-04-16 Richard Biener <rguenther@suse.de>
11995 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
11998 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
12001 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
12002 Require OPTION_MASK_ISA_SSE2.
12004 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
12007 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
12008 Don't construct a dump_context temporary to call static method.
12010 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
12012 * config/aarch64/falkor-tag-collision-avoidance.c
12013 (valid_src_p): Check for aarch64_address_info type before
12014 accessing base field.
12016 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
12018 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
12019 (V_sz_elem2): Remove unused mode attribute.
12021 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
12023 * config/arm/arm.md (arm_movdi): Disallow for MVE.
12025 2020-04-15 Richard Biener <rguenther@suse.de>
12027 PR middle-end/94539
12028 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
12029 alias_sets_conflict_p for pointers.
12031 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
12034 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
12035 (extendhisi2_internal): Add %v1 before the load instructions.
12037 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
12040 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
12041 use PC-relative addressing for TLS references.
12043 2020-04-14 Martin Jambor <mjambor@suse.cz>
12046 * ipa-sra.c: Include internal-fn.h.
12047 (enum isra_scan_context): Update comment.
12048 (scan_function): Treat calls to internal_functions like loads or stores.
12050 2020-04-14 Yang Yang <yangyang305@huawei.com>
12052 PR tree-optimization/94574
12053 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
12054 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
12056 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
12059 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
12061 2020-04-13 Martin Sebor <msebor@redhat.com>
12063 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
12064 -Wformat-truncation. Move -Wzero-length-bounds last.
12065 (-Wrestrict): Document positive form of option enabled by -Wall.
12067 2020-04-13 Zachary Spytz <zspytz@gmail.com>
12069 * doc/extend.texi: Add realloc to list of built-in functions
12070 are recognized by the compiler.
12072 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
12075 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
12076 pointer in word_mode for eh_return epilogues.
12078 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
12080 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
12081 memory references in %B, %C and %D operand selectors when the inner
12082 operand is a post increment address.
12084 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
12086 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
12087 reference by 4 bytes, and %D memory reference by 6 bytes.
12089 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
12092 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
12093 condition for V4SI, V8HI and V16QI modes.
12095 2020-04-11 Jakub Jelinek <jakub@redhat.com>
12099 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
12102 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
12104 PR middle-end/89433
12105 PR middle-end/93465
12106 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
12107 "#pragma omp declare target" has also been applied.
12109 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
12111 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
12112 when to emit the epilogue_helper insn.
12113 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
12116 2020-04-09 Jakub Jelinek <jakub@redhat.com>
12119 * cselib.h (cselib_record_sp_cfa_base_equiv,
12120 cselib_sp_derived_value_p): Declare.
12121 * cselib.c (cselib_record_sp_cfa_base_equiv,
12122 cselib_sp_derived_value_p): New functions.
12123 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
12124 cselib_sp_derived_value_p values.
12125 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
12126 start of extended basic blocks other than the first one
12127 for !frame_pointer_needed functions.
12129 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
12131 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
12132 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
12133 (aarch64_sve2048_hw): Document.
12134 * config/aarch64/aarch64-protos.h
12135 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
12136 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
12137 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
12138 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
12140 (find_type_suffix_for_scalar_type): Use it instead of comparing
12141 TYPE_MAIN_VARIANTs.
12142 (function_resolver::infer_vector_or_tuple_type): Likewise.
12143 (function_resolver::require_vector_type): Likewise.
12144 (handle_arm_sve_vector_bits_attribute): New function.
12145 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
12146 (aarch64_attribute_table): Add arm_sve_vector_bits.
12147 (aarch64_return_in_memory_1):
12148 (pure_scalable_type_info::piece::get_rtx): New function.
12149 (pure_scalable_type_info::num_zr): Likewise.
12150 (pure_scalable_type_info::num_pr): Likewise.
12151 (pure_scalable_type_info::get_rtx): Likewise.
12152 (pure_scalable_type_info::analyze): Likewise.
12153 (pure_scalable_type_info::analyze_registers): Likewise.
12154 (pure_scalable_type_info::analyze_array): Likewise.
12155 (pure_scalable_type_info::analyze_record): Likewise.
12156 (pure_scalable_type_info::add_piece): Likewise.
12157 (aarch64_some_values_include_pst_objects_p): Likewise.
12158 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
12159 to analyze whether the type is returned in SVE registers.
12160 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
12161 is passed in SVE registers.
12162 (aarch64_pass_by_reference_1): New function, extracted from...
12163 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
12164 to analyze whether the type is a pure scalable type and, if so,
12165 whether it should be passed by reference.
12166 (aarch64_return_in_msb): Return false for pure scalable types.
12167 (aarch64_function_value_1): Fold back into...
12168 (aarch64_function_value): ...this function. Use
12169 pure_scalable_type_info to analyze whether the type is a pure
12170 scalable type and, if so, which registers it should use. Handle
12171 types that include pure scalable types but are not themselves
12172 pure scalable types.
12173 (aarch64_return_in_memory_1): New function, split out from...
12174 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
12175 to analyze whether the type is a pure scalable type and, if so,
12176 whether it should be returned by reference.
12177 (aarch64_layout_arg): Remove orig_mode argument. Use
12178 pure_scalable_type_info to analyze whether the type is a pure
12179 scalable type and, if so, which registers it should use. Handle
12180 types that include pure scalable types but are not themselves
12181 pure scalable types.
12182 (aarch64_function_arg): Update call accordingly.
12183 (aarch64_function_arg_advance): Likewise.
12184 (aarch64_pad_reg_upward): On big-endian targets, return false for
12185 pure scalable types that are smaller than 16 bytes.
12186 (aarch64_member_type_forces_blk): New function.
12187 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
12188 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
12189 correspond to built-in SVE types. Do not rely on a vector mode
12190 if the type includes an pure scalable type. When returning true,
12191 assert that the mode is not an SVE mode.
12192 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
12193 built-in types here. When returning true, assert that the type
12194 does not have an SVE mode.
12195 (aarch64_can_change_mode_class): Don't allow anything to change
12196 between a predicate mode and a non-predicate mode. Also don't
12197 allow changes between SVE vector modes and other modes that
12198 might be bigger than 128 bits.
12199 (aarch64_invalid_binary_op): Reject binary operations that mix
12200 SVE and GNU vector types.
12201 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
12203 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
12205 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
12206 "SVE sizeless type".
12207 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
12208 (sizeless_type_p): New functions.
12209 (register_builtin_types): Apply make_type_sizeless to the type.
12210 (register_tuple_type): Likewise.
12211 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
12213 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
12215 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
12218 2020-04-09 Martin Jambor <mjambor@suse.cz>
12219 Richard Biener <rguenther@suse.de>
12221 PR tree-optimization/94482
12222 * tree-sra.c (create_access_replacement): Dump new replacement with
12224 (sra_modify_expr): Fix handling of cases when the original EXPR writes
12225 to only part of the replacement.
12226 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
12227 the first operand of combinations into REAL/IMAGPART_EXPR and
12230 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
12232 * doc/sourcebuild.texi (check-function-bodies): Treat the third
12233 parameter as a list of option regexps and require each regexp
12236 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
12239 * config/aarch64/falkor-tag-collision-avoidance.c
12240 (valid_src_p): Fix missing rtx type check.
12242 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
12243 Richard Biener <rguenther@suse.de>
12245 PR tree-optimization/93674
12246 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
12247 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
12248 or non-mode precision type, add candidate in unsigned type with the
12251 2020-04-08 Clement Chigot <clement.chigot@atos.net>
12253 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
12254 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
12255 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
12257 2020-04-08 Jakub Jelinek <jakub@redhat.com>
12259 PR middle-end/94526
12260 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
12262 * reload1.c (eliminate_regs_1): Avoid creating
12263 (plus (reg) (const_int 0)) in DEBUG_INSNs.
12265 PR tree-optimization/94524
12266 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
12267 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
12268 op1 rather than op1 itself at the end. Punt for signed modulo by
12269 most negative constant.
12270 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
12271 modulo by most negative constant.
12273 2020-04-08 Richard Biener <rguenther@suse.de>
12275 PR rtl-optimization/93946
12276 * cse.c (cse_insn): Record the tabled expression in
12277 src_related. Verify a redundant store removal is valid.
12279 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
12282 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
12283 ENDBR at function entry if function will be called indirectly.
12285 2020-04-08 Jakub Jelinek <jakub@redhat.com>
12288 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
12291 2020-04-08 Martin Liska <mliska@suse.cz>
12294 * gimple.c (gimple_call_operator_delete_p): Rename to...
12295 (gimple_call_replaceable_operator_delete_p): ... this.
12296 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
12297 * gimple.h (gimple_call_operator_delete_p): Rename to ...
12298 (gimple_call_replaceable_operator_delete_p): ... this.
12299 * tree-core.h (tree_function_decl): Add replaceable_operator
12301 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
12302 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
12303 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
12304 (eliminate_unnecessary_stmts): Likewise.
12305 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
12306 Pack DECL_IS_REPLACEABLE_OPERATOR.
12307 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
12308 Unpack the field here.
12309 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
12310 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
12311 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
12312 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
12313 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
12314 replaceable operator flags.
12316 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
12317 Matthew Malcomson <matthew.malcomson@arm.com>
12319 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
12320 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
12321 (CX_TERNARY_QUALIFIERS): Likewise.
12322 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
12323 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
12324 (arm_init_acle_builtins): Initialize CDE builtins.
12325 (arm_expand_acle_builtin): Check CDE constant operands.
12326 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
12327 of CDE constant operand.
12328 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
12330 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
12331 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
12332 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
12333 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
12334 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
12335 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
12336 * config/arm/arm_cde_builtins.def: New file.
12337 * config/arm/iterators.md (V_reg): New attribute of SI.
12338 * config/arm/predicates.md (const_int_coproc_operand): New.
12339 (const_int_vcde1_operand, const_int_vcde2_operand): New.
12340 (const_int_vcde3_operand): New.
12341 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
12342 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
12343 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
12344 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
12346 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
12348 * config.gcc: Add arm_cde.h.
12349 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
12350 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
12351 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
12352 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
12353 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
12354 * config/arm/arm.h (TARGET_CDE): New macro.
12355 * config/arm/arm_cde.h: New file.
12356 * doc/invoke.texi: Document CDE options +cdecp[0-7].
12357 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
12359 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
12361 2020-04-08 Jakub Jelinek <jakub@redhat.com>
12363 PR rtl-optimization/94516
12364 * postreload.c: Include rtl-iter.h.
12365 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
12366 looking for all MEMs with RTX_AUTOINC operand.
12367 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
12369 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
12371 * omp-grid.c (grid_eliminate_combined_simd_part): Use
12372 OMP_CLAUSE_CODE to access the omp clause code.
12374 2020-04-07 Jeff Law <law@redhat.com>
12376 PR rtl-optimization/92264
12377 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
12378 the destination is the stack pointer.
12380 2020-04-07 Jakub Jelinek <jakub@redhat.com>
12382 PR rtl-optimization/94291
12383 PR rtl-optimization/84169
12384 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
12385 must be a REG or SUBREG of REG; if it is not one of these, don't
12388 2020-04-07 Richard Biener <rguenther@suse.de>
12390 PR middle-end/94479
12391 * gimplify.c (gimplify_addr_expr): Also consider generated
12394 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12396 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
12398 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12400 * config/arm/arm_mve.h: Cast some pointers to expected types.
12402 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12404 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
12405 same with '__arm_' prefix.
12407 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12409 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
12411 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12413 * config/arm/arm.c (arm_mve_immediate_check): Removed.
12414 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
12415 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
12416 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
12417 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
12418 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
12419 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
12421 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12423 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
12425 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12427 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
12428 * config/arm/mve/md: Fix v[id]wdup patterns.
12430 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12432 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
12433 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
12435 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12437 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
12438 and remove const_ptr enums.
12440 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12442 * config/arm/arm_mve.h (vsubq_n): Merge with...
12444 (vmulq_n): Merge with...
12446 (__ARM_mve_typeid): Simplify scalar and constant detection.
12448 2020-04-07 Jakub Jelinek <jakub@redhat.com>
12451 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
12452 for inter-lane permutation for 64-byte modes.
12455 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
12456 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
12457 Assume it is a REG after that instead of testing it and doing FAIL
12458 otherwise. Formatting fix.
12460 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
12462 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
12464 2020-04-07 Jakub Jelinek <jakub@redhat.com>
12467 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
12468 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
12470 2020-04-06 Jakub Jelinek <jakub@redhat.com>
12472 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
12473 + const0_rtx return the SP_DERIVED_VALUE_P.
12475 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
12477 PR rtl-optimization/92989
12478 * lra-lives.c (process_bb_lives): Do not treat eh_return data
12479 registers as being live at the beginning of the EH receiver.
12481 2020-04-05 Zachary Spytz <zspytz@gmail.com>
12483 * extend.texi: Add free to list of ISO C90 functions that
12484 are recognized by the compiler.
12486 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
12488 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
12489 for fast_interrupt.
12491 * config/microblaze/microblaze.md (trap): Update output pattern.
12493 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
12494 Jakub Jelinek <jakub@redhat.com>
12497 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
12498 arrays, pointer-to-members, function types and qualifiers when
12499 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
12500 to emit type again on definition.
12502 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
12505 * ipa-fnsummary.c (vrp_will_run_p): New function.
12506 (fre_will_run_p): New function.
12507 (evaluate_properties_for_edge): Use it.
12508 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
12509 !optimize_debug to optimize_debug.
12511 2020-04-04 Jakub Jelinek <jakub@redhat.com>
12513 PR rtl-optimization/94468
12514 * cselib.c (references_value_p): Formatting fix.
12515 (cselib_useless_value_p): New function.
12516 (discard_useless_locs, discard_useless_values,
12517 cselib_invalidate_regno_val, cselib_invalidate_mem,
12518 cselib_record_set): Use it instead of
12519 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
12522 * tree-iterator.h (expr_single): Declare.
12523 * tree-iterator.c (expr_single): New function.
12524 * tree.h (protected_set_expr_location_if_unset): Declare.
12525 * tree.c (protected_set_expr_location): Use expr_single.
12526 (protected_set_expr_location_if_unset): New function.
12528 2020-04-03 Jeff Law <law@redhat.com>
12530 PR rtl-optimization/92264
12531 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
12532 reloading of auto-increment addressing modes.
12534 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
12537 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
12540 2020-04-03 Jeff Law <law@redhat.com>
12542 PR rtl-optimization/92264
12543 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
12544 post-increment addressing of source operands as well as residuals
12545 when computing any adjustments to the input pointer.
12547 2020-04-03 Jakub Jelinek <jakub@redhat.com>
12550 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
12551 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
12552 second half of first lane from first lane of second operand and
12553 first half of second lane from second lane of first operand.
12555 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
12557 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
12559 2020-04-03 Tamar Christina <tamar.christina@arm.com>
12562 * common/config/aarch64/aarch64-common.c
12563 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
12565 2020-04-03 Richard Biener <rguenther@suse.de>
12567 PR middle-end/94465
12568 * tree.c (array_ref_low_bound): Deal with released SSA names
12571 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
12573 * config/gcn/gcn.c (print_operand): Handle unordered comparison
12575 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
12576 comparison operators.
12578 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
12580 PR tree-optimization/94443
12581 * tree-vect-loop.c (vectorizable_live_operation): Use
12582 gsi_insert_seq_before to replace gsi_insert_before.
12584 2020-04-03 Martin Liska <mliska@suse.cz>
12587 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
12588 Compare type attributes for gimple_call_fntypes.
12590 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
12592 * alias.c (get_alias_set): Fix comment typos.
12594 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
12597 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
12598 attribute checking used by TYPE.
12600 2020-04-02 Martin Jambor <mjambor@suse.cz>
12603 * ipa-sra.c (struct caller_issues): New fields candidate and
12604 call_from_outside_comdat.
12605 (check_for_caller_issues): Check for calls from outsied of
12606 candidate's same_comdat_group.
12607 (check_all_callers_for_issues): Set up issues.candidate, check result
12609 (mark_callers_calls_comdat_local): New function.
12610 (process_isra_node_results): Set calls_comdat_local of callers if
12613 2020-04-02 Richard Biener <rguenther@suse.de>
12616 * common.opt (ffinite-loops): Initialize to zero.
12617 * opts.c (default_options_table): Remove OPT_ffinite_loops
12619 * cfgloop.h (loop::finite_p): New member.
12620 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
12621 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
12623 * lto-streamer-in.c (input_cfg): Stream finite_p.
12624 * lto-streamer-out.c (output_cfg): Likewise.
12625 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
12626 from flag_finite_loops at CFG build time.
12627 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
12628 finite_p flag instead of flag_finite_loops.
12629 * doc/invoke.texi (ffinite-loops): Adjust documentation of
12632 2020-04-02 Richard Biener <rguenther@suse.de>
12635 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
12636 DW_TAG_imported_unit.
12638 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
12640 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
12641 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
12644 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
12646 PR tree-optimization/94401
12647 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
12648 access type when loading halves of vector to avoid peeling for gaps.
12650 2020-04-02 Jakub Jelinek <jakub@redhat.com>
12652 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
12653 between a string literal and MIPS_SYSVERSION_SPEC macro.
12655 2020-04-02 Martin Jambor <mjambor@suse.cz>
12657 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
12659 2020-04-02 Jakub Jelinek <jakub@redhat.com>
12661 PR rtl-optimization/92264
12662 * params.opt (-param=max-find-base-term-values=): Decrease default
12665 PR rtl-optimization/92264
12666 * rtl.h (struct rtx_def): Mention that call bit is used as
12667 SP_DERIVED_VALUE_P in cselib.c.
12668 * cselib.c (SP_DERIVED_VALUE_P): Define.
12669 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
12670 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
12671 val_rtx and sp based expression where offsets cancel each other.
12672 (preserve_constants_and_equivs): Formatting fix.
12673 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
12674 locs list for cfa_base_preserved_val if needed. Formatting fix.
12675 (autoinc_split): If the to be returned value is a REG, MEM or
12676 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
12677 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
12678 (rtx_equal_for_cselib_1): Call autoinc_split even if both
12679 expressions are PLUS in Pmode with CONST_INT second operands.
12680 Handle SP_DERIVED_VALUE_P cases.
12681 (cselib_hash_plus_const_int): New function.
12682 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
12683 second operand, as well as for PRE_DEC etc. that ought to be
12684 hashed the same way.
12685 (cselib_subst_to_values): Substitute PLUS with Pmode and
12686 CONST_INT operand if the first operand is a VALUE which has
12687 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
12688 SP_DERIVED_VALUE_P + adjusted offset.
12689 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
12690 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
12691 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
12692 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
12693 on the sp value before calling cselib_add_permanent_equiv on the
12695 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
12696 in the insn without REG_INC note.
12697 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
12698 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
12701 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
12702 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
12704 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12707 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
12708 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
12709 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
12710 intrinsic defintion by adding a new builtin call to writeback into base
12712 (__arm_vldrdq_gather_base_wb_u64): Likewise.
12713 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
12714 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
12715 (__arm_vldrwq_gather_base_wb_s32): Likewise.
12716 (__arm_vldrwq_gather_base_wb_u32): Likewise.
12717 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
12718 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
12719 (__arm_vldrwq_gather_base_wb_f32): Likewise.
12720 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
12721 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
12722 builtin's qualifier.
12723 (vldrdq_gather_base_wb_z_u): Likewise.
12724 (vldrwq_gather_base_wb_u): Likewise.
12725 (vldrdq_gather_base_wb_u): Likewise.
12726 (vldrwq_gather_base_wb_z_s): Likewise.
12727 (vldrwq_gather_base_wb_z_f): Likewise.
12728 (vldrdq_gather_base_wb_z_s): Likewise.
12729 (vldrwq_gather_base_wb_s): Likewise.
12730 (vldrwq_gather_base_wb_f): Likewise.
12731 (vldrdq_gather_base_wb_s): Likewise.
12732 (vldrwq_gather_base_nowb_z_u): Define builtin.
12733 (vldrdq_gather_base_nowb_z_u): Likewise.
12734 (vldrwq_gather_base_nowb_u): Likewise.
12735 (vldrdq_gather_base_nowb_u): Likewise.
12736 (vldrwq_gather_base_nowb_z_s): Likewise.
12737 (vldrwq_gather_base_nowb_z_f): Likewise.
12738 (vldrdq_gather_base_nowb_z_s): Likewise.
12739 (vldrwq_gather_base_nowb_s): Likewise.
12740 (vldrwq_gather_base_nowb_f): Likewise.
12741 (vldrdq_gather_base_nowb_s): Likewise.
12742 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
12744 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
12745 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
12746 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
12747 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
12748 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
12749 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
12750 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
12751 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
12752 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
12753 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
12754 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
12756 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
12758 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
12759 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
12760 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
12761 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
12762 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
12763 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
12764 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
12765 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
12766 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
12768 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
12769 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
12770 Remove constraints from expander.
12771 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
12772 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
12773 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
12774 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
12775 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
12776 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
12778 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
12780 PR rtl-optimization/94123
12781 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
12782 flag_split_wide_types_early.
12784 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
12786 * doc/extend.texi (Common Function Attributes): Fix typo.
12788 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
12791 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
12794 2020-04-01 Zackery Spytz <zspytz@gmail.com>
12796 * doc/extend.texi: Fix a typo in the documentation of the
12797 copy function attribute.
12799 2020-04-01 Jakub Jelinek <jakub@redhat.com>
12801 PR middle-end/94423
12802 * tree-object-size.c (pass_object_sizes::execute): Don't call
12803 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
12804 call replace_call_with_value.
12806 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
12808 PR tree-optimization/94043
12809 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
12810 phi for vec_lhs and use it for lane extraction.
12812 2020-03-31 Felix Yang <felix.yang@huawei.com>
12814 PR tree-optimization/94398
12815 * tree-vect-stmts.c (vectorizable_store): Instead of calling
12816 vect_supportable_dr_alignment, set alignment_support_scheme to
12817 dr_unaligned_supported for gather-scatter accesses.
12818 (vectorizable_load): Likewise.
12820 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
12822 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
12823 New mode iterators.
12824 (vnsi, VnSI, vndi, VnDI): New mode attributes.
12825 (mov<mode>): Use <VnDI> in place of V64DI.
12826 (mov<mode>_exec): Likewise.
12827 (mov<mode>_sgprbase): Likewise.
12828 (reload_out<mode>): Likewise.
12829 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
12830 (gather_load<mode>v64si): Rename to ...
12831 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
12832 and <VnDI> in place of V64DI.
12833 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
12834 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
12835 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
12836 (scatter_store<mode>v64si): Rename to ...
12837 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
12838 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
12839 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
12840 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
12841 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
12842 (ds_bpermute<mode>): Use <VnSI>.
12843 (addv64si3_vcc<exec_vcc>): Rename to ...
12844 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
12845 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
12846 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
12847 (addcv64si3<exec_vcc>): Rename to ...
12848 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
12849 (subv64si3_vcc<exec_vcc>): Rename to ...
12850 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
12851 (subcv64si3<exec_vcc>): Rename to ...
12852 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
12853 (addv64di3): Rename to ...
12854 (add<mode>3): ... this, and use V_DI.
12855 (addv64di3_exec): Rename to ...
12856 (add<mode>3_exec): ... this, and use V_DI.
12857 (subv64di3): Rename to ...
12858 (sub<mode>3): ... this, and use V_DI.
12859 (subv64di3_exec): Rename to ...
12860 (sub<mode>3_exec): ... this, and use V_DI.
12861 (addv64di3_zext): Rename to ...
12862 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
12863 (addv64di3_zext_exec): Rename to ...
12864 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
12865 (addv64di3_zext_dup): Rename to ...
12866 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
12867 (addv64di3_zext_dup_exec): Rename to ...
12868 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
12869 (addv64di3_zext_dup2): Rename to ...
12870 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
12871 (addv64di3_zext_dup2_exec): Rename to ...
12872 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
12873 (addv64di3_sext_dup2): Rename to ...
12874 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
12875 (addv64di3_sext_dup2_exec): Rename to ...
12876 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
12877 (<su>mulv64si3_highpart<exec>): Rename to ...
12878 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
12879 (mulv64di3): Rename to ...
12880 (mul<mode>3): ... this, and use V_DI and <VnSI>.
12881 (mulv64di3_exec): Rename to ...
12882 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
12883 (mulv64di3_zext): Rename to ...
12884 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
12885 (mulv64di3_zext_exec): Rename to ...
12886 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
12887 (mulv64di3_zext_dup2): Rename to ...
12888 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
12889 (mulv64di3_zext_dup2_exec): Rename to ...
12890 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
12891 (<expander>v64di3): Rename to ...
12892 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
12893 (<expander>v64di3_exec): Rename to ...
12894 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
12895 (<expander>v64si3<exec>): Rename to ...
12896 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
12897 (v<expander>v64si3<exec>): Rename to ...
12898 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
12899 (<expander>v64si3<exec>): Rename to ...
12900 (<expander><vnsi>3<exec>): ... this, and use V_SI.
12901 (subv64df3<exec>): Rename to ...
12902 (sub<mode>3<exec>): ... this, and use V_DF.
12903 (truncv64di<mode>2): Rename to ...
12904 (trunc<vndi><mode>2): ... this, and use <VnDI>.
12905 (truncv64di<mode>2_exec): Rename to ...
12906 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
12907 (<convop><mode>v64di2): Rename to ...
12908 (<convop><mode><vndi>2): ... this, and use <VnDI>.
12909 (<convop><mode>v64di2_exec): Rename to ...
12910 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
12911 (vec_cmp<u>v64qidi): Rename to ...
12912 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
12913 (vec_cmp<u>v64qidi_exec): Rename to ...
12914 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
12915 (vcond_mask_<mode>di): Use <VnDI>.
12916 (maskload<mode>di): Likewise.
12917 (maskstore<mode>di): Likewise.
12918 (mask_gather_load<mode>v64si): Rename to ...
12919 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
12920 (mask_scatter_store<mode>v64si): Rename to ...
12921 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
12922 (*<reduc_op>_dpp_shr_v64di): Rename to ...
12923 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
12924 (*plus_carry_in_dpp_shr_v64si): Rename to ...
12925 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
12926 (*plus_carry_dpp_shr_v64di): Rename to ...
12927 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
12928 (vec_seriesv64si): Rename to ...
12929 (vec_series<mode>): ... this, and use V_SI.
12930 (vec_seriesv64di): Rename to ...
12931 (vec_series<mode>): ... this, and use V_DI.
12933 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
12935 * config/arc/arc.c (arc_print_operand): Use
12936 HOST_WIDE_INT_PRINT_DEC macro.
12938 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
12940 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
12942 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12944 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
12946 (__arm_vbicq): Likewise.
12948 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
12950 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
12952 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12954 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
12955 common section of both MVE Integer and MVE Floating Point.
12956 (vaddvq): Likewise.
12957 (vaddlvq_p): Likewise.
12958 (vaddvaq): Likewise.
12959 (vaddvq_p): Likewise.
12960 (vcmpcsq): Likewise.
12961 (vmlsdavxq): Likewise.
12962 (vmlsdavq): Likewise.
12963 (vmladavxq): Likewise.
12964 (vmladavq): Likewise.
12965 (vminvq): Likewise.
12966 (vminavq): Likewise.
12967 (vmaxvq): Likewise.
12968 (vmaxavq): Likewise.
12969 (vmlaldavq): Likewise.
12970 (vcmphiq): Likewise.
12971 (vaddlvaq): Likewise.
12972 (vrmlaldavhq): Likewise.
12973 (vrmlaldavhxq): Likewise.
12974 (vrmlsldavhq): Likewise.
12975 (vrmlsldavhxq): Likewise.
12976 (vmlsldavxq): Likewise.
12977 (vmlsldavq): Likewise.
12978 (vabavq): Likewise.
12979 (vrmlaldavhaq): Likewise.
12980 (vcmpgeq_m_n): Likewise.
12981 (vmlsdavxq_p): Likewise.
12982 (vmlsdavq_p): Likewise.
12983 (vmlsdavaxq): Likewise.
12984 (vmlsdavaq): Likewise.
12985 (vaddvaq_p): Likewise.
12986 (vcmpcsq_m_n): Likewise.
12987 (vcmpcsq_m): Likewise.
12988 (vmladavxq_p): Likewise.
12989 (vmladavq_p): Likewise.
12990 (vmladavaxq): Likewise.
12991 (vmladavaq): Likewise.
12992 (vminvq_p): Likewise.
12993 (vminavq_p): Likewise.
12994 (vmaxvq_p): Likewise.
12995 (vmaxavq_p): Likewise.
12996 (vcmphiq_m): Likewise.
12997 (vaddlvaq_p): Likewise.
12998 (vmlaldavaq): Likewise.
12999 (vmlaldavaxq): Likewise.
13000 (vmlaldavq_p): Likewise.
13001 (vmlaldavxq_p): Likewise.
13002 (vmlsldavaq): Likewise.
13003 (vmlsldavaxq): Likewise.
13004 (vmlsldavq_p): Likewise.
13005 (vmlsldavxq_p): Likewise.
13006 (vrmlaldavhaxq): Likewise.
13007 (vrmlaldavhq_p): Likewise.
13008 (vrmlaldavhxq_p): Likewise.
13009 (vrmlsldavhaq): Likewise.
13010 (vrmlsldavhaxq): Likewise.
13011 (vrmlsldavhq_p): Likewise.
13012 (vrmlsldavhxq_p): Likewise.
13013 (vabavq_p): Likewise.
13014 (vmladavaq_p): Likewise.
13015 (vstrbq_scatter_offset): Likewise.
13016 (vstrbq_p): Likewise.
13017 (vstrbq_scatter_offset_p): Likewise.
13018 (vstrdq_scatter_base_p): Likewise.
13019 (vstrdq_scatter_base): Likewise.
13020 (vstrdq_scatter_offset_p): Likewise.
13021 (vstrdq_scatter_offset): Likewise.
13022 (vstrdq_scatter_shifted_offset_p): Likewise.
13023 (vstrdq_scatter_shifted_offset): Likewise.
13024 (vmaxq_x): Likewise.
13025 (vminq_x): Likewise.
13026 (vmovlbq_x): Likewise.
13027 (vmovltq_x): Likewise.
13028 (vmulhq_x): Likewise.
13029 (vmullbq_int_x): Likewise.
13030 (vmullbq_poly_x): Likewise.
13031 (vmulltq_int_x): Likewise.
13032 (vmulltq_poly_x): Likewise.
13033 (vstrbq): Likewise.
13035 2020-03-31 Jakub Jelinek <jakub@redhat.com>
13038 * config/aarch64/constraints.md (Uph): New constraint.
13039 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
13040 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
13043 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
13044 Jakub Jelinek <jakub@redhat.com>
13046 PR middle-end/94412
13047 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
13048 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
13050 2020-03-31 Jakub Jelinek <jakub@redhat.com>
13052 PR tree-optimization/94403
13053 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
13054 ENUMERAL_TYPE lhs_type.
13056 PR rtl-optimization/94344
13057 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
13058 conversions, either on both operands of |^+ or just one. Handle
13059 also extra same precision conversion on RSHIFT_EXPR first operand
13060 provided RSHIFT_EXPR is performed in unsigned type.
13062 2020-03-30 David Malcolm <dmalcolm@redhat.com>
13064 * lra.c (finish_insn_code_data_once): Set the array elements
13065 to NULL after freeing them.
13067 2020-03-30 Andreas Schwab <schwab@suse.de>
13069 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
13072 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
13074 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
13075 to skip defining builtins based on builtin_mask.
13077 2020-03-30 Jakub Jelinek <jakub@redhat.com>
13080 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
13081 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
13082 operand is a register. Don't enable masked variants for V*[QH]Imode.
13085 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
13086 <store_mask_constraint> instead of m in output operand constraint.
13087 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
13090 2020-03-30 Alan Modra <amodra@gmail.com>
13092 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
13093 (rs6000_indirect_call_template_1): Adjust to suit.
13094 * config/rs6000/rs6000.md (call_local): Merge call_local32,
13095 call_local64, and call_local_aix.
13096 (call_value_local): Simlarly.
13097 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
13098 and disable pattern when CALL_LONG.
13099 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
13100 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
13101 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
13103 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
13106 * doc/invoke.texi: Update -falign-functions, -falign-loops and
13107 -falign-jumps documentation.
13109 2020-03-29 Martin Liska <mliska@suse.cz>
13112 * cgraphunit.c (process_function_and_variable_attributes): Remove
13113 double 'attribute' words.
13115 2020-03-29 John David Anglin <dave.anglin@bell.net>
13117 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
13120 2020-03-28 Jakub Jelinek <jakub@redhat.com>
13123 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
13124 to true after setting size to integer_one_node.
13126 PR tree-optimization/94329
13127 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
13128 on the last stmt in a bb, make sure gsi_prev isn't done immediately
13131 2020-03-27 Alan Modra <amodra@gmail.com>
13134 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
13135 for PLT16_LO and PLT_PCREL.
13136 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
13137 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
13138 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
13140 2020-03-27 Martin Sebor <msebor@redhat.com>
13143 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
13145 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
13147 * config/gcn/gcn-valu.md:
13148 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
13149 (VEC_1REG_MODE): Delete.
13150 (VEC_1REG_ALT): Delete.
13151 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
13152 (VEC_1REG_INT_MODE): Delete.
13153 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
13154 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
13155 (VEC_2REG_MODE): Rename to V_2REG throughout.
13156 (VEC_REG_MODE): Rename to V_noHI throughout.
13157 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
13158 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
13159 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
13160 (VEC_INT_MODE): Delete.
13161 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
13162 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
13163 (FP_MODE): Delete and replace with FP throughout.
13164 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
13165 (VCMP_MODE): Rename to V_noQI throughout and move to top.
13166 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
13167 * config/gcn/gcn.md (FP): New mode iterator.
13168 (FP_1REG): New mode iterator.
13170 2020-03-27 David Malcolm <dmalcolm@redhat.com>
13172 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
13173 now emits two .dot files.
13174 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
13175 (graphviz_out::end_tr): Only close a TR, not a TD.
13176 (graphviz_out::begin_td): New.
13177 (graphviz_out::end_td): New.
13178 (graphviz_out::begin_trtd): New, replacing the old implementation
13179 of graphviz_out::begin_tr.
13180 (graphviz_out::end_tdtr): New, replacing the old implementation
13181 of graphviz_out::end_tr.
13182 * graphviz.h (graphviz_out::begin_td): New decl.
13183 (graphviz_out::end_td): New decl.
13184 (graphviz_out::begin_trtd): New decl.
13185 (graphviz_out::end_tdtr): New decl.
13187 2020-03-27 Richard Biener <rguenther@suse.de>
13190 * dwarf2out.c (should_emit_struct_debug): Return false for
13193 2020-03-27 Richard Biener <rguenther@suse.de>
13195 PR tree-optimization/94352
13196 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
13198 (ssa_propagation_engine::ssa_propagate): ... here after
13199 initializing curr_order.
13201 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
13203 PR tree-optimization/90332
13204 * tree-vect-stmts.c (vector_vector_composition_type): New function.
13205 (get_group_load_store_type): Adjust to call
13206 vector_vector_composition_type, extend it to construct with scalar
13208 (vectorizable_load): Likewise.
13210 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
13212 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
13213 (create_ddg_dep_no_link): Likewise.
13214 (add_cross_iteration_register_deps): Move debug instruction check.
13215 Other minor refactoring.
13216 (add_intra_loop_mem_dep): Do not check for debug instructions.
13217 (add_inter_loop_mem_dep): Likewise.
13218 (build_intra_loop_deps): Likewise.
13219 (create_ddg): Do not include debug insns into the graph.
13220 * ddg.h (struct ddg): Remove num_debug field.
13221 * modulo-sched.c (doloop_register_get): Adjust condition.
13222 (res_MII): Remove DDG num_debug field usage.
13223 (sms_schedule_by_order): Use assertion against debug insns.
13224 (ps_has_conflicts): Drop debug insn check.
13226 2020-03-26 Jakub Jelinek <jakub@redhat.com>
13229 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
13230 that contains exactly one non-DEBUG_BEGIN_STMT statement.
13233 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
13234 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
13235 a single non-debug stmt followed by one or more debug stmts.
13236 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
13237 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
13238 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
13239 gimple_seq_last to check if outer_stmt gbind could be reused and
13240 if yes and it is surrounded by any debug stmts, move them into the
13243 PR rtl-optimization/92264
13244 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
13245 for sp based values in !frame_pointer_needed
13246 && !ACCUMULATE_OUTGOING_ARGS functions.
13248 2020-03-26 Felix Yang <felix.yang@huawei.com>
13250 PR tree-optimization/94269
13251 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
13253 operation to single basic block.
13255 2020-03-25 Jeff Law <law@redhat.com>
13257 PR rtl-optimization/90275
13258 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
13261 2020-03-25 Jakub Jelinek <jakub@redhat.com>
13264 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
13265 mode rather than VOIDmode.
13267 2020-03-25 Martin Sebor <msebor@redhat.com>
13269 PR middle-end/94004
13270 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
13271 even for alloca calls resulting from system macro expansion.
13272 Include inlining context in all warnings.
13274 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
13277 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
13278 FPRs to change between SDmode and DDmode.
13280 2020-03-25 Martin Sebor <msebor@redhat.com>
13282 PR tree-optimization/94131
13283 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
13285 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
13286 types have constant sizes.
13288 2020-03-25 Martin Liska <mliska@suse.cz>
13291 * configure.ac: Report error only when --with-zstd
13293 * configure: Regenerate.
13295 2020-03-25 Jakub Jelinek <jakub@redhat.com>
13298 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
13299 INSN_CODE (insn) to -1 when changing the pattern.
13301 2020-03-25 Martin Liska <mliska@suse.cz>
13305 * config/i386/i386-features.c (make_resolver_func): Drop
13306 public flag for resolver.
13307 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
13308 group for resolver and drop public flag if possible.
13309 * multiple_target.c (create_dispatcher_calls): Drop unique_name
13310 and resolution as we want to enable LTO privatization of the default
13313 2020-03-25 Martin Liska <mliska@suse.cz>
13316 * configure.ac: Respect --without-zstd and report
13317 error when we can't find header file with --with-zstd.
13318 * configure: Regenerate.
13320 2020-03-25 Jakub Jelinek <jakub@redhat.com>
13322 PR middle-end/94303
13323 * varasm.c (output_constructor_array_range): If local->index
13324 RANGE_EXPR doesn't start at the current location in the constructor,
13325 skip needed number of bytes using assemble_zeros or assert we don't
13329 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
13330 counter instead of DECL_UID.
13332 PR tree-optimization/94300
13333 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
13334 is positive, make sure that off + size isn't larger than needed_len.
13336 2020-03-25 Richard Biener <rguenther@suse.de>
13337 Jakub Jelinek <jakub@redhat.com>
13340 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
13342 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
13344 * doc/sourcebuild.texi (ARM-specific attributes): Add
13346 (Features for dg-add-options): Add arm_fp_dp.
13348 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
13351 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
13353 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
13356 * omp-offload.c (omp_finish_file): Fix target-link handling if
13357 targetm_common.have_named_sections is false.
13359 2020-03-24 Jakub Jelinek <jakub@redhat.com>
13362 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
13363 instead of GEN_INT.
13366 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
13367 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
13368 If not after and at *incr_pos is a debug stmt, set stmt location to
13369 location of next non-debug stmt after it if any.
13372 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
13373 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
13374 worklist or set GF_PLF_2 just because it is used in a debug stmt in
13375 another bb. Formatting improvements.
13378 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
13379 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
13380 regardless of whether TREE_NO_WARNING is set on it or whether
13381 warn_unused_function is true or not.
13383 2020-03-23 Jeff Law <law@redhat.com>
13385 PR rtl-optimization/90275
13388 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
13389 (simplify_logical_relational_operation): Use it.
13391 2020-03-23 Jakub Jelinek <jakub@redhat.com>
13394 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
13395 ultimate rhs and if returned something different, reconstructing
13396 the COMPOUND_EXPRs.
13398 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
13400 * opts.c (print_filtered_help): Improve the help text for alias options.
13402 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13403 Andre Vieira <andre.simoesdiasvieira@arm.com>
13404 Mihail Ionescu <mihail.ionescu@arm.com>
13406 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
13407 (vshlcq_m_u8): Likewise.
13408 (vshlcq_m_s16): Likewise.
13409 (vshlcq_m_u16): Likewise.
13410 (vshlcq_m_s32): Likewise.
13411 (vshlcq_m_u32): Likewise.
13412 (__arm_vshlcq_m_s8): Define intrinsic.
13413 (__arm_vshlcq_m_u8): Likewise.
13414 (__arm_vshlcq_m_s16): Likewise.
13415 (__arm_vshlcq_m_u16): Likewise.
13416 (__arm_vshlcq_m_s32): Likewise.
13417 (__arm_vshlcq_m_u32): Likewise.
13418 (vshlcq_m): Define polymorphic variant.
13419 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
13420 Use builtin qualifier.
13421 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
13422 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
13423 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
13424 (mve_vshlcq_m_<supf><mode>): Likewise.
13426 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13428 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
13429 (UQSHL_QUALIFIERS): Likewise.
13430 (ASRL_QUALIFIERS): Likewise.
13431 (SQSHL_QUALIFIERS): Likewise.
13432 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
13434 (sqrshr): Define macro.
13435 (sqrshrl): Likewise.
13436 (sqrshrl_sat48): Likewise.
13438 (sqshll): Likewise.
13440 (srshrl): Likewise.
13441 (uqrshl): Likewise.
13442 (uqrshll): Likewise.
13443 (uqrshll_sat48): Likewise.
13445 (uqshll): Likewise.
13447 (urshrl): Likewise.
13450 (__arm_lsll): Define intrinsic.
13451 (__arm_asrl): Likewise.
13452 (__arm_uqrshll): Likewise.
13453 (__arm_uqrshll_sat48): Likewise.
13454 (__arm_sqrshrl): Likewise.
13455 (__arm_sqrshrl_sat48): Likewise.
13456 (__arm_uqshll): Likewise.
13457 (__arm_urshrl): Likewise.
13458 (__arm_srshrl): Likewise.
13459 (__arm_sqshll): Likewise.
13460 (__arm_uqrshl): Likewise.
13461 (__arm_sqrshr): Likewise.
13462 (__arm_uqshl): Likewise.
13463 (__arm_urshr): Likewise.
13464 (__arm_sqshl): Likewise.
13465 (__arm_srshr): Likewise.
13466 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
13468 (UQSHL_QUALIFIERS): Likewise.
13469 (ASRL_QUALIFIERS): Likewise.
13470 (SQSHL_QUALIFIERS): Likewise.
13471 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
13472 (mve_sqrshrl_sat<supf>_di): Likewise.
13473 (mve_uqrshl_si): Likewise.
13474 (mve_sqrshr_si): Likewise.
13475 (mve_uqshll_di): Likewise.
13476 (mve_urshrl_di): Likewise.
13477 (mve_uqshl_si): Likewise.
13478 (mve_urshr_si): Likewise.
13479 (mve_sqshl_si): Likewise.
13480 (mve_srshr_si): Likewise.
13481 (mve_srshrl_di): Likewise.
13482 (mve_sqshll_di): Likewise.
13484 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13485 Andre Vieira <andre.simoesdiasvieira@arm.com>
13486 Mihail Ionescu <mihail.ionescu@arm.com>
13488 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
13489 (vsetq_lane_f32): Likewise.
13490 (vsetq_lane_s16): Likewise.
13491 (vsetq_lane_s32): Likewise.
13492 (vsetq_lane_s8): Likewise.
13493 (vsetq_lane_s64): Likewise.
13494 (vsetq_lane_u8): Likewise.
13495 (vsetq_lane_u16): Likewise.
13496 (vsetq_lane_u32): Likewise.
13497 (vsetq_lane_u64): Likewise.
13498 (vgetq_lane_f16): Likewise.
13499 (vgetq_lane_f32): Likewise.
13500 (vgetq_lane_s16): Likewise.
13501 (vgetq_lane_s32): Likewise.
13502 (vgetq_lane_s8): Likewise.
13503 (vgetq_lane_s64): Likewise.
13504 (vgetq_lane_u8): Likewise.
13505 (vgetq_lane_u16): Likewise.
13506 (vgetq_lane_u32): Likewise.
13507 (vgetq_lane_u64): Likewise.
13508 (__ARM_NUM_LANES): Likewise.
13509 (__ARM_LANEQ): Likewise.
13510 (__ARM_CHECK_LANEQ): Likewise.
13511 (__arm_vsetq_lane_s16): Define intrinsic.
13512 (__arm_vsetq_lane_s32): Likewise.
13513 (__arm_vsetq_lane_s8): Likewise.
13514 (__arm_vsetq_lane_s64): Likewise.
13515 (__arm_vsetq_lane_u8): Likewise.
13516 (__arm_vsetq_lane_u16): Likewise.
13517 (__arm_vsetq_lane_u32): Likewise.
13518 (__arm_vsetq_lane_u64): Likewise.
13519 (__arm_vgetq_lane_s16): Likewise.
13520 (__arm_vgetq_lane_s32): Likewise.
13521 (__arm_vgetq_lane_s8): Likewise.
13522 (__arm_vgetq_lane_s64): Likewise.
13523 (__arm_vgetq_lane_u8): Likewise.
13524 (__arm_vgetq_lane_u16): Likewise.
13525 (__arm_vgetq_lane_u32): Likewise.
13526 (__arm_vgetq_lane_u64): Likewise.
13527 (__arm_vsetq_lane_f16): Likewise.
13528 (__arm_vsetq_lane_f32): Likewise.
13529 (__arm_vgetq_lane_f16): Likewise.
13530 (__arm_vgetq_lane_f32): Likewise.
13531 (vgetq_lane): Define polymorphic variant.
13532 (vsetq_lane): Likewise.
13533 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
13535 (mve_vec_extractv2didi): Likewise.
13536 (mve_vec_extract_sext_internal<mode>): Likewise.
13537 (mve_vec_extract_zext_internal<mode>): Likewise.
13538 (mve_vec_set<mode>_internal): Likewise.
13539 (mve_vec_setv2di_internal): Likewise.
13540 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
13542 (vec_extract<mode><V_elem_l>): Rename to
13543 "neon_vec_extract<mode><V_elem_l>".
13544 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
13545 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
13546 pattern common for MVE and NEON.
13547 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
13550 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
13552 * config/arm/mve.md (earlyclobber_32): New mode attribute.
13553 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
13554 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
13556 2020-03-23 Richard Biener <rguenther@suse.de>
13558 PR tree-optimization/94261
13559 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
13560 IL operand swapping code.
13561 (vect_slp_rearrange_stmts): Do not arrange isomorphic
13562 nodes that would need operation code adjustments.
13564 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
13566 * doc/install.texi (amdgcn-*-amdhsa): Renamed
13567 from amdgcn-unknown-amdhsa; change
13568 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
13570 2020-03-23 Richard Biener <rguenther@suse.de>
13573 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
13574 directly rather than also folding it via build_fold_addr_expr.
13576 2020-03-23 Richard Biener <rguenther@suse.de>
13578 PR tree-optimization/94266
13579 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
13580 addresses of TARGET_MEM_REFs.
13582 2020-03-23 Martin Liska <mliska@suse.cz>
13585 * symtab.c (symtab_node::clone_references): Save speculative_id
13586 as ref may be overwritten by create_reference.
13587 (symtab_node::clone_referring): Likewise.
13588 (symtab_node::clone_reference): Likewise.
13590 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
13592 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
13593 references to Darwin.
13594 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
13595 unconditionally and comment on why.
13597 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
13599 * config/darwin.c (darwin_mergeable_constant_section): Collect
13600 section anchor checks into the caller.
13601 (machopic_select_section): Collect section anchor checks into
13602 the determination of 'effective zero-size' objects. When the
13603 size is unknown, assume it is non-zero, and thus return the
13604 'generic' section for the DECL.
13606 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
13609 * config/darwin.opt: Amend options descriptions.
13611 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
13613 PR rtl-optimization/94052
13614 * lra-constraints.c (simplify_operand_subreg): Reload the inner
13615 register of a paradoxical subreg if simplify_subreg_regno fails
13616 to give a valid hard register for the outer mode.
13618 2020-03-20 Martin Jambor <mjambor@suse.cz>
13620 PR tree-optimization/93435
13621 * params.opt (sra-max-propagations): New parameter.
13622 * tree-sra.c (propagation_budget): New variable.
13623 (budget_for_propagation_access): New function.
13624 (propagate_subaccesses_from_rhs): Use it.
13625 (propagate_subaccesses_from_lhs): Likewise.
13626 (propagate_all_subaccesses): Set up and destroy propagation_budget.
13628 2020-03-20 Carl Love <cel@us.ibm.com>
13631 * config/rs6000/rs6000.c (rs6000_option_override_internal):
13632 Add check for TARGET_FPRND for Power 7 or newer.
13634 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
13637 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
13638 (cgraph_edge::redirect_callee): Move here; likewise.
13639 (cgraph_node::remove_callees): Update calls_comdat_local flag.
13640 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
13642 (cgraph_node::check_calls_comdat_local_p): New member function.
13643 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
13644 (cgraph_edge::redirect_callee): Move offline.
13645 * ipa-fnsummary.c (compute_fn_summary): Do not compute
13646 calls_comdat_local flag here.
13647 * ipa-inline-transform.c (inline_call): Fix updating of
13648 calls_comdat_local flag.
13649 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
13650 * symtab.c (symtab_node::add_to_same_comdat_group): Update
13651 calls_comdat_local flag.
13653 2020-03-20 Richard Biener <rguenther@suse.de>
13655 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
13656 from the possibly modified root.
13658 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13659 Andre Vieira <andre.simoesdiasvieira@arm.com>
13660 Mihail Ionescu <mihail.ionescu@arm.com>
13662 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
13663 (vst1q_p_s8): Likewise.
13664 (vst2q_s8): Likewise.
13665 (vst2q_u8): Likewise.
13666 (vld1q_z_u8): Likewise.
13667 (vld1q_z_s8): Likewise.
13668 (vld2q_s8): Likewise.
13669 (vld2q_u8): Likewise.
13670 (vld4q_s8): Likewise.
13671 (vld4q_u8): Likewise.
13672 (vst1q_p_u16): Likewise.
13673 (vst1q_p_s16): Likewise.
13674 (vst2q_s16): Likewise.
13675 (vst2q_u16): Likewise.
13676 (vld1q_z_u16): Likewise.
13677 (vld1q_z_s16): Likewise.
13678 (vld2q_s16): Likewise.
13679 (vld2q_u16): Likewise.
13680 (vld4q_s16): Likewise.
13681 (vld4q_u16): Likewise.
13682 (vst1q_p_u32): Likewise.
13683 (vst1q_p_s32): Likewise.
13684 (vst2q_s32): Likewise.
13685 (vst2q_u32): Likewise.
13686 (vld1q_z_u32): Likewise.
13687 (vld1q_z_s32): Likewise.
13688 (vld2q_s32): Likewise.
13689 (vld2q_u32): Likewise.
13690 (vld4q_s32): Likewise.
13691 (vld4q_u32): Likewise.
13692 (vld4q_f16): Likewise.
13693 (vld2q_f16): Likewise.
13694 (vld1q_z_f16): Likewise.
13695 (vst2q_f16): Likewise.
13696 (vst1q_p_f16): Likewise.
13697 (vld4q_f32): Likewise.
13698 (vld2q_f32): Likewise.
13699 (vld1q_z_f32): Likewise.
13700 (vst2q_f32): Likewise.
13701 (vst1q_p_f32): Likewise.
13702 (__arm_vst1q_p_u8): Define intrinsic.
13703 (__arm_vst1q_p_s8): Likewise.
13704 (__arm_vst2q_s8): Likewise.
13705 (__arm_vst2q_u8): Likewise.
13706 (__arm_vld1q_z_u8): Likewise.
13707 (__arm_vld1q_z_s8): Likewise.
13708 (__arm_vld2q_s8): Likewise.
13709 (__arm_vld2q_u8): Likewise.
13710 (__arm_vld4q_s8): Likewise.
13711 (__arm_vld4q_u8): Likewise.
13712 (__arm_vst1q_p_u16): Likewise.
13713 (__arm_vst1q_p_s16): Likewise.
13714 (__arm_vst2q_s16): Likewise.
13715 (__arm_vst2q_u16): Likewise.
13716 (__arm_vld1q_z_u16): Likewise.
13717 (__arm_vld1q_z_s16): Likewise.
13718 (__arm_vld2q_s16): Likewise.
13719 (__arm_vld2q_u16): Likewise.
13720 (__arm_vld4q_s16): Likewise.
13721 (__arm_vld4q_u16): Likewise.
13722 (__arm_vst1q_p_u32): Likewise.
13723 (__arm_vst1q_p_s32): Likewise.
13724 (__arm_vst2q_s32): Likewise.
13725 (__arm_vst2q_u32): Likewise.
13726 (__arm_vld1q_z_u32): Likewise.
13727 (__arm_vld1q_z_s32): Likewise.
13728 (__arm_vld2q_s32): Likewise.
13729 (__arm_vld2q_u32): Likewise.
13730 (__arm_vld4q_s32): Likewise.
13731 (__arm_vld4q_u32): Likewise.
13732 (__arm_vld4q_f16): Likewise.
13733 (__arm_vld2q_f16): Likewise.
13734 (__arm_vld1q_z_f16): Likewise.
13735 (__arm_vst2q_f16): Likewise.
13736 (__arm_vst1q_p_f16): Likewise.
13737 (__arm_vld4q_f32): Likewise.
13738 (__arm_vld2q_f32): Likewise.
13739 (__arm_vld1q_z_f32): Likewise.
13740 (__arm_vst2q_f32): Likewise.
13741 (__arm_vst1q_p_f32): Likewise.
13742 (vld1q_z): Define polymorphic variant.
13745 (vst1q_p): Likewise.
13747 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
13749 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
13750 (mve_vld2q<mode>): Likewise.
13751 (mve_vld4q<mode>): Likewise.
13753 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13754 Andre Vieira <andre.simoesdiasvieira@arm.com>
13755 Mihail Ionescu <mihail.ionescu@arm.com>
13757 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
13758 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
13759 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
13760 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
13761 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
13762 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
13763 * config/arm/arm_mve.h (vadciq_s32): Define macro.
13764 (vadciq_u32): Likewise.
13765 (vadciq_m_s32): Likewise.
13766 (vadciq_m_u32): Likewise.
13767 (vadcq_s32): Likewise.
13768 (vadcq_u32): Likewise.
13769 (vadcq_m_s32): Likewise.
13770 (vadcq_m_u32): Likewise.
13771 (vsbciq_s32): Likewise.
13772 (vsbciq_u32): Likewise.
13773 (vsbciq_m_s32): Likewise.
13774 (vsbciq_m_u32): Likewise.
13775 (vsbcq_s32): Likewise.
13776 (vsbcq_u32): Likewise.
13777 (vsbcq_m_s32): Likewise.
13778 (vsbcq_m_u32): Likewise.
13779 (__arm_vadciq_s32): Define intrinsic.
13780 (__arm_vadciq_u32): Likewise.
13781 (__arm_vadciq_m_s32): Likewise.
13782 (__arm_vadciq_m_u32): Likewise.
13783 (__arm_vadcq_s32): Likewise.
13784 (__arm_vadcq_u32): Likewise.
13785 (__arm_vadcq_m_s32): Likewise.
13786 (__arm_vadcq_m_u32): Likewise.
13787 (__arm_vsbciq_s32): Likewise.
13788 (__arm_vsbciq_u32): Likewise.
13789 (__arm_vsbciq_m_s32): Likewise.
13790 (__arm_vsbciq_m_u32): Likewise.
13791 (__arm_vsbcq_s32): Likewise.
13792 (__arm_vsbcq_u32): Likewise.
13793 (__arm_vsbcq_m_s32): Likewise.
13794 (__arm_vsbcq_m_u32): Likewise.
13795 (vadciq_m): Define polymorphic variant.
13796 (vadciq): Likewise.
13797 (vadcq_m): Likewise.
13799 (vsbciq_m): Likewise.
13800 (vsbciq): Likewise.
13801 (vsbcq_m): Likewise.
13803 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
13805 (BINOP_UNONE_UNONE_UNONE): Likewise.
13806 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
13807 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
13808 * config/arm/mve.md (VADCIQ): Define iterator.
13809 (VADCIQ_M): Likewise.
13811 (VSBCQ_M): Likewise.
13812 (VSBCIQ): Likewise.
13813 (VSBCIQ_M): Likewise.
13815 (VADCQ_M): Likewise.
13816 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
13817 (mve_vadciq_<supf>v4si): Likewise.
13818 (mve_vadcq_m_<supf>v4si): Likewise.
13819 (mve_vadcq_<supf>v4si): Likewise.
13820 (mve_vsbciq_m_<supf>v4si): Likewise.
13821 (mve_vsbciq_<supf>v4si): Likewise.
13822 (mve_vsbcq_m_<supf>v4si): Likewise.
13823 (mve_vsbcq_<supf>v4si): Likewise.
13824 (get_fpscr_nzcvqc): Define isns.
13825 (set_fpscr_nzcvqc): Define isns.
13826 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
13827 (UNSPEC_SET_FPSCR_NZCVQC): Define.
13829 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13831 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
13832 (vddupq_x_n_u16): Likewise.
13833 (vddupq_x_n_u32): Likewise.
13834 (vddupq_x_wb_u8): Likewise.
13835 (vddupq_x_wb_u16): Likewise.
13836 (vddupq_x_wb_u32): Likewise.
13837 (vdwdupq_x_n_u8): Likewise.
13838 (vdwdupq_x_n_u16): Likewise.
13839 (vdwdupq_x_n_u32): Likewise.
13840 (vdwdupq_x_wb_u8): Likewise.
13841 (vdwdupq_x_wb_u16): Likewise.
13842 (vdwdupq_x_wb_u32): Likewise.
13843 (vidupq_x_n_u8): Likewise.
13844 (vidupq_x_n_u16): Likewise.
13845 (vidupq_x_n_u32): Likewise.
13846 (vidupq_x_wb_u8): Likewise.
13847 (vidupq_x_wb_u16): Likewise.
13848 (vidupq_x_wb_u32): Likewise.
13849 (viwdupq_x_n_u8): Likewise.
13850 (viwdupq_x_n_u16): Likewise.
13851 (viwdupq_x_n_u32): Likewise.
13852 (viwdupq_x_wb_u8): Likewise.
13853 (viwdupq_x_wb_u16): Likewise.
13854 (viwdupq_x_wb_u32): Likewise.
13855 (vdupq_x_n_s8): Likewise.
13856 (vdupq_x_n_s16): Likewise.
13857 (vdupq_x_n_s32): Likewise.
13858 (vdupq_x_n_u8): Likewise.
13859 (vdupq_x_n_u16): Likewise.
13860 (vdupq_x_n_u32): Likewise.
13861 (vminq_x_s8): Likewise.
13862 (vminq_x_s16): Likewise.
13863 (vminq_x_s32): Likewise.
13864 (vminq_x_u8): Likewise.
13865 (vminq_x_u16): Likewise.
13866 (vminq_x_u32): Likewise.
13867 (vmaxq_x_s8): Likewise.
13868 (vmaxq_x_s16): Likewise.
13869 (vmaxq_x_s32): Likewise.
13870 (vmaxq_x_u8): Likewise.
13871 (vmaxq_x_u16): Likewise.
13872 (vmaxq_x_u32): Likewise.
13873 (vabdq_x_s8): Likewise.
13874 (vabdq_x_s16): Likewise.
13875 (vabdq_x_s32): Likewise.
13876 (vabdq_x_u8): Likewise.
13877 (vabdq_x_u16): Likewise.
13878 (vabdq_x_u32): Likewise.
13879 (vabsq_x_s8): Likewise.
13880 (vabsq_x_s16): Likewise.
13881 (vabsq_x_s32): Likewise.
13882 (vaddq_x_s8): Likewise.
13883 (vaddq_x_s16): Likewise.
13884 (vaddq_x_s32): Likewise.
13885 (vaddq_x_n_s8): Likewise.
13886 (vaddq_x_n_s16): Likewise.
13887 (vaddq_x_n_s32): Likewise.
13888 (vaddq_x_u8): Likewise.
13889 (vaddq_x_u16): Likewise.
13890 (vaddq_x_u32): Likewise.
13891 (vaddq_x_n_u8): Likewise.
13892 (vaddq_x_n_u16): Likewise.
13893 (vaddq_x_n_u32): Likewise.
13894 (vclsq_x_s8): Likewise.
13895 (vclsq_x_s16): Likewise.
13896 (vclsq_x_s32): Likewise.
13897 (vclzq_x_s8): Likewise.
13898 (vclzq_x_s16): Likewise.
13899 (vclzq_x_s32): Likewise.
13900 (vclzq_x_u8): Likewise.
13901 (vclzq_x_u16): Likewise.
13902 (vclzq_x_u32): Likewise.
13903 (vnegq_x_s8): Likewise.
13904 (vnegq_x_s16): Likewise.
13905 (vnegq_x_s32): Likewise.
13906 (vmulhq_x_s8): Likewise.
13907 (vmulhq_x_s16): Likewise.
13908 (vmulhq_x_s32): Likewise.
13909 (vmulhq_x_u8): Likewise.
13910 (vmulhq_x_u16): Likewise.
13911 (vmulhq_x_u32): Likewise.
13912 (vmullbq_poly_x_p8): Likewise.
13913 (vmullbq_poly_x_p16): Likewise.
13914 (vmullbq_int_x_s8): Likewise.
13915 (vmullbq_int_x_s16): Likewise.
13916 (vmullbq_int_x_s32): Likewise.
13917 (vmullbq_int_x_u8): Likewise.
13918 (vmullbq_int_x_u16): Likewise.
13919 (vmullbq_int_x_u32): Likewise.
13920 (vmulltq_poly_x_p8): Likewise.
13921 (vmulltq_poly_x_p16): Likewise.
13922 (vmulltq_int_x_s8): Likewise.
13923 (vmulltq_int_x_s16): Likewise.
13924 (vmulltq_int_x_s32): Likewise.
13925 (vmulltq_int_x_u8): Likewise.
13926 (vmulltq_int_x_u16): Likewise.
13927 (vmulltq_int_x_u32): Likewise.
13928 (vmulq_x_s8): Likewise.
13929 (vmulq_x_s16): Likewise.
13930 (vmulq_x_s32): Likewise.
13931 (vmulq_x_n_s8): Likewise.
13932 (vmulq_x_n_s16): Likewise.
13933 (vmulq_x_n_s32): Likewise.
13934 (vmulq_x_u8): Likewise.
13935 (vmulq_x_u16): Likewise.
13936 (vmulq_x_u32): Likewise.
13937 (vmulq_x_n_u8): Likewise.
13938 (vmulq_x_n_u16): Likewise.
13939 (vmulq_x_n_u32): Likewise.
13940 (vsubq_x_s8): Likewise.
13941 (vsubq_x_s16): Likewise.
13942 (vsubq_x_s32): Likewise.
13943 (vsubq_x_n_s8): Likewise.
13944 (vsubq_x_n_s16): Likewise.
13945 (vsubq_x_n_s32): Likewise.
13946 (vsubq_x_u8): Likewise.
13947 (vsubq_x_u16): Likewise.
13948 (vsubq_x_u32): Likewise.
13949 (vsubq_x_n_u8): Likewise.
13950 (vsubq_x_n_u16): Likewise.
13951 (vsubq_x_n_u32): Likewise.
13952 (vcaddq_rot90_x_s8): Likewise.
13953 (vcaddq_rot90_x_s16): Likewise.
13954 (vcaddq_rot90_x_s32): Likewise.
13955 (vcaddq_rot90_x_u8): Likewise.
13956 (vcaddq_rot90_x_u16): Likewise.
13957 (vcaddq_rot90_x_u32): Likewise.
13958 (vcaddq_rot270_x_s8): Likewise.
13959 (vcaddq_rot270_x_s16): Likewise.
13960 (vcaddq_rot270_x_s32): Likewise.
13961 (vcaddq_rot270_x_u8): Likewise.
13962 (vcaddq_rot270_x_u16): Likewise.
13963 (vcaddq_rot270_x_u32): Likewise.
13964 (vhaddq_x_n_s8): Likewise.
13965 (vhaddq_x_n_s16): Likewise.
13966 (vhaddq_x_n_s32): Likewise.
13967 (vhaddq_x_n_u8): Likewise.
13968 (vhaddq_x_n_u16): Likewise.
13969 (vhaddq_x_n_u32): Likewise.
13970 (vhaddq_x_s8): Likewise.
13971 (vhaddq_x_s16): Likewise.
13972 (vhaddq_x_s32): Likewise.
13973 (vhaddq_x_u8): Likewise.
13974 (vhaddq_x_u16): Likewise.
13975 (vhaddq_x_u32): Likewise.
13976 (vhcaddq_rot90_x_s8): Likewise.
13977 (vhcaddq_rot90_x_s16): Likewise.
13978 (vhcaddq_rot90_x_s32): Likewise.
13979 (vhcaddq_rot270_x_s8): Likewise.
13980 (vhcaddq_rot270_x_s16): Likewise.
13981 (vhcaddq_rot270_x_s32): Likewise.
13982 (vhsubq_x_n_s8): Likewise.
13983 (vhsubq_x_n_s16): Likewise.
13984 (vhsubq_x_n_s32): Likewise.
13985 (vhsubq_x_n_u8): Likewise.
13986 (vhsubq_x_n_u16): Likewise.
13987 (vhsubq_x_n_u32): Likewise.
13988 (vhsubq_x_s8): Likewise.
13989 (vhsubq_x_s16): Likewise.
13990 (vhsubq_x_s32): Likewise.
13991 (vhsubq_x_u8): Likewise.
13992 (vhsubq_x_u16): Likewise.
13993 (vhsubq_x_u32): Likewise.
13994 (vrhaddq_x_s8): Likewise.
13995 (vrhaddq_x_s16): Likewise.
13996 (vrhaddq_x_s32): Likewise.
13997 (vrhaddq_x_u8): Likewise.
13998 (vrhaddq_x_u16): Likewise.
13999 (vrhaddq_x_u32): Likewise.
14000 (vrmulhq_x_s8): Likewise.
14001 (vrmulhq_x_s16): Likewise.
14002 (vrmulhq_x_s32): Likewise.
14003 (vrmulhq_x_u8): Likewise.
14004 (vrmulhq_x_u16): Likewise.
14005 (vrmulhq_x_u32): Likewise.
14006 (vandq_x_s8): Likewise.
14007 (vandq_x_s16): Likewise.
14008 (vandq_x_s32): Likewise.
14009 (vandq_x_u8): Likewise.
14010 (vandq_x_u16): Likewise.
14011 (vandq_x_u32): Likewise.
14012 (vbicq_x_s8): Likewise.
14013 (vbicq_x_s16): Likewise.
14014 (vbicq_x_s32): Likewise.
14015 (vbicq_x_u8): Likewise.
14016 (vbicq_x_u16): Likewise.
14017 (vbicq_x_u32): Likewise.
14018 (vbrsrq_x_n_s8): Likewise.
14019 (vbrsrq_x_n_s16): Likewise.
14020 (vbrsrq_x_n_s32): Likewise.
14021 (vbrsrq_x_n_u8): Likewise.
14022 (vbrsrq_x_n_u16): Likewise.
14023 (vbrsrq_x_n_u32): Likewise.
14024 (veorq_x_s8): Likewise.
14025 (veorq_x_s16): Likewise.
14026 (veorq_x_s32): Likewise.
14027 (veorq_x_u8): Likewise.
14028 (veorq_x_u16): Likewise.
14029 (veorq_x_u32): Likewise.
14030 (vmovlbq_x_s8): Likewise.
14031 (vmovlbq_x_s16): Likewise.
14032 (vmovlbq_x_u8): Likewise.
14033 (vmovlbq_x_u16): Likewise.
14034 (vmovltq_x_s8): Likewise.
14035 (vmovltq_x_s16): Likewise.
14036 (vmovltq_x_u8): Likewise.
14037 (vmovltq_x_u16): Likewise.
14038 (vmvnq_x_s8): Likewise.
14039 (vmvnq_x_s16): Likewise.
14040 (vmvnq_x_s32): Likewise.
14041 (vmvnq_x_u8): Likewise.
14042 (vmvnq_x_u16): Likewise.
14043 (vmvnq_x_u32): Likewise.
14044 (vmvnq_x_n_s16): Likewise.
14045 (vmvnq_x_n_s32): Likewise.
14046 (vmvnq_x_n_u16): Likewise.
14047 (vmvnq_x_n_u32): Likewise.
14048 (vornq_x_s8): Likewise.
14049 (vornq_x_s16): Likewise.
14050 (vornq_x_s32): Likewise.
14051 (vornq_x_u8): Likewise.
14052 (vornq_x_u16): Likewise.
14053 (vornq_x_u32): Likewise.
14054 (vorrq_x_s8): Likewise.
14055 (vorrq_x_s16): Likewise.
14056 (vorrq_x_s32): Likewise.
14057 (vorrq_x_u8): Likewise.
14058 (vorrq_x_u16): Likewise.
14059 (vorrq_x_u32): Likewise.
14060 (vrev16q_x_s8): Likewise.
14061 (vrev16q_x_u8): Likewise.
14062 (vrev32q_x_s8): Likewise.
14063 (vrev32q_x_s16): Likewise.
14064 (vrev32q_x_u8): Likewise.
14065 (vrev32q_x_u16): Likewise.
14066 (vrev64q_x_s8): Likewise.
14067 (vrev64q_x_s16): Likewise.
14068 (vrev64q_x_s32): Likewise.
14069 (vrev64q_x_u8): Likewise.
14070 (vrev64q_x_u16): Likewise.
14071 (vrev64q_x_u32): Likewise.
14072 (vrshlq_x_s8): Likewise.
14073 (vrshlq_x_s16): Likewise.
14074 (vrshlq_x_s32): Likewise.
14075 (vrshlq_x_u8): Likewise.
14076 (vrshlq_x_u16): Likewise.
14077 (vrshlq_x_u32): Likewise.
14078 (vshllbq_x_n_s8): Likewise.
14079 (vshllbq_x_n_s16): Likewise.
14080 (vshllbq_x_n_u8): Likewise.
14081 (vshllbq_x_n_u16): Likewise.
14082 (vshlltq_x_n_s8): Likewise.
14083 (vshlltq_x_n_s16): Likewise.
14084 (vshlltq_x_n_u8): Likewise.
14085 (vshlltq_x_n_u16): Likewise.
14086 (vshlq_x_s8): Likewise.
14087 (vshlq_x_s16): Likewise.
14088 (vshlq_x_s32): Likewise.
14089 (vshlq_x_u8): Likewise.
14090 (vshlq_x_u16): Likewise.
14091 (vshlq_x_u32): Likewise.
14092 (vshlq_x_n_s8): Likewise.
14093 (vshlq_x_n_s16): Likewise.
14094 (vshlq_x_n_s32): Likewise.
14095 (vshlq_x_n_u8): Likewise.
14096 (vshlq_x_n_u16): Likewise.
14097 (vshlq_x_n_u32): Likewise.
14098 (vrshrq_x_n_s8): Likewise.
14099 (vrshrq_x_n_s16): Likewise.
14100 (vrshrq_x_n_s32): Likewise.
14101 (vrshrq_x_n_u8): Likewise.
14102 (vrshrq_x_n_u16): Likewise.
14103 (vrshrq_x_n_u32): Likewise.
14104 (vshrq_x_n_s8): Likewise.
14105 (vshrq_x_n_s16): Likewise.
14106 (vshrq_x_n_s32): Likewise.
14107 (vshrq_x_n_u8): Likewise.
14108 (vshrq_x_n_u16): Likewise.
14109 (vshrq_x_n_u32): Likewise.
14110 (vdupq_x_n_f16): Likewise.
14111 (vdupq_x_n_f32): Likewise.
14112 (vminnmq_x_f16): Likewise.
14113 (vminnmq_x_f32): Likewise.
14114 (vmaxnmq_x_f16): Likewise.
14115 (vmaxnmq_x_f32): Likewise.
14116 (vabdq_x_f16): Likewise.
14117 (vabdq_x_f32): Likewise.
14118 (vabsq_x_f16): Likewise.
14119 (vabsq_x_f32): Likewise.
14120 (vaddq_x_f16): Likewise.
14121 (vaddq_x_f32): Likewise.
14122 (vaddq_x_n_f16): Likewise.
14123 (vaddq_x_n_f32): Likewise.
14124 (vnegq_x_f16): Likewise.
14125 (vnegq_x_f32): Likewise.
14126 (vmulq_x_f16): Likewise.
14127 (vmulq_x_f32): Likewise.
14128 (vmulq_x_n_f16): Likewise.
14129 (vmulq_x_n_f32): Likewise.
14130 (vsubq_x_f16): Likewise.
14131 (vsubq_x_f32): Likewise.
14132 (vsubq_x_n_f16): Likewise.
14133 (vsubq_x_n_f32): Likewise.
14134 (vcaddq_rot90_x_f16): Likewise.
14135 (vcaddq_rot90_x_f32): Likewise.
14136 (vcaddq_rot270_x_f16): Likewise.
14137 (vcaddq_rot270_x_f32): Likewise.
14138 (vcmulq_x_f16): Likewise.
14139 (vcmulq_x_f32): Likewise.
14140 (vcmulq_rot90_x_f16): Likewise.
14141 (vcmulq_rot90_x_f32): Likewise.
14142 (vcmulq_rot180_x_f16): Likewise.
14143 (vcmulq_rot180_x_f32): Likewise.
14144 (vcmulq_rot270_x_f16): Likewise.
14145 (vcmulq_rot270_x_f32): Likewise.
14146 (vcvtaq_x_s16_f16): Likewise.
14147 (vcvtaq_x_s32_f32): Likewise.
14148 (vcvtaq_x_u16_f16): Likewise.
14149 (vcvtaq_x_u32_f32): Likewise.
14150 (vcvtnq_x_s16_f16): Likewise.
14151 (vcvtnq_x_s32_f32): Likewise.
14152 (vcvtnq_x_u16_f16): Likewise.
14153 (vcvtnq_x_u32_f32): Likewise.
14154 (vcvtpq_x_s16_f16): Likewise.
14155 (vcvtpq_x_s32_f32): Likewise.
14156 (vcvtpq_x_u16_f16): Likewise.
14157 (vcvtpq_x_u32_f32): Likewise.
14158 (vcvtmq_x_s16_f16): Likewise.
14159 (vcvtmq_x_s32_f32): Likewise.
14160 (vcvtmq_x_u16_f16): Likewise.
14161 (vcvtmq_x_u32_f32): Likewise.
14162 (vcvtbq_x_f32_f16): Likewise.
14163 (vcvttq_x_f32_f16): Likewise.
14164 (vcvtq_x_f16_u16): Likewise.
14165 (vcvtq_x_f16_s16): Likewise.
14166 (vcvtq_x_f32_s32): Likewise.
14167 (vcvtq_x_f32_u32): Likewise.
14168 (vcvtq_x_n_f16_s16): Likewise.
14169 (vcvtq_x_n_f16_u16): Likewise.
14170 (vcvtq_x_n_f32_s32): Likewise.
14171 (vcvtq_x_n_f32_u32): Likewise.
14172 (vcvtq_x_s16_f16): Likewise.
14173 (vcvtq_x_s32_f32): Likewise.
14174 (vcvtq_x_u16_f16): Likewise.
14175 (vcvtq_x_u32_f32): Likewise.
14176 (vcvtq_x_n_s16_f16): Likewise.
14177 (vcvtq_x_n_s32_f32): Likewise.
14178 (vcvtq_x_n_u16_f16): Likewise.
14179 (vcvtq_x_n_u32_f32): Likewise.
14180 (vrndq_x_f16): Likewise.
14181 (vrndq_x_f32): Likewise.
14182 (vrndnq_x_f16): Likewise.
14183 (vrndnq_x_f32): Likewise.
14184 (vrndmq_x_f16): Likewise.
14185 (vrndmq_x_f32): Likewise.
14186 (vrndpq_x_f16): Likewise.
14187 (vrndpq_x_f32): Likewise.
14188 (vrndaq_x_f16): Likewise.
14189 (vrndaq_x_f32): Likewise.
14190 (vrndxq_x_f16): Likewise.
14191 (vrndxq_x_f32): Likewise.
14192 (vandq_x_f16): Likewise.
14193 (vandq_x_f32): Likewise.
14194 (vbicq_x_f16): Likewise.
14195 (vbicq_x_f32): Likewise.
14196 (vbrsrq_x_n_f16): Likewise.
14197 (vbrsrq_x_n_f32): Likewise.
14198 (veorq_x_f16): Likewise.
14199 (veorq_x_f32): Likewise.
14200 (vornq_x_f16): Likewise.
14201 (vornq_x_f32): Likewise.
14202 (vorrq_x_f16): Likewise.
14203 (vorrq_x_f32): Likewise.
14204 (vrev32q_x_f16): Likewise.
14205 (vrev64q_x_f16): Likewise.
14206 (vrev64q_x_f32): Likewise.
14207 (__arm_vddupq_x_n_u8): Define intrinsic.
14208 (__arm_vddupq_x_n_u16): Likewise.
14209 (__arm_vddupq_x_n_u32): Likewise.
14210 (__arm_vddupq_x_wb_u8): Likewise.
14211 (__arm_vddupq_x_wb_u16): Likewise.
14212 (__arm_vddupq_x_wb_u32): Likewise.
14213 (__arm_vdwdupq_x_n_u8): Likewise.
14214 (__arm_vdwdupq_x_n_u16): Likewise.
14215 (__arm_vdwdupq_x_n_u32): Likewise.
14216 (__arm_vdwdupq_x_wb_u8): Likewise.
14217 (__arm_vdwdupq_x_wb_u16): Likewise.
14218 (__arm_vdwdupq_x_wb_u32): Likewise.
14219 (__arm_vidupq_x_n_u8): Likewise.
14220 (__arm_vidupq_x_n_u16): Likewise.
14221 (__arm_vidupq_x_n_u32): Likewise.
14222 (__arm_vidupq_x_wb_u8): Likewise.
14223 (__arm_vidupq_x_wb_u16): Likewise.
14224 (__arm_vidupq_x_wb_u32): Likewise.
14225 (__arm_viwdupq_x_n_u8): Likewise.
14226 (__arm_viwdupq_x_n_u16): Likewise.
14227 (__arm_viwdupq_x_n_u32): Likewise.
14228 (__arm_viwdupq_x_wb_u8): Likewise.
14229 (__arm_viwdupq_x_wb_u16): Likewise.
14230 (__arm_viwdupq_x_wb_u32): Likewise.
14231 (__arm_vdupq_x_n_s8): Likewise.
14232 (__arm_vdupq_x_n_s16): Likewise.
14233 (__arm_vdupq_x_n_s32): Likewise.
14234 (__arm_vdupq_x_n_u8): Likewise.
14235 (__arm_vdupq_x_n_u16): Likewise.
14236 (__arm_vdupq_x_n_u32): Likewise.
14237 (__arm_vminq_x_s8): Likewise.
14238 (__arm_vminq_x_s16): Likewise.
14239 (__arm_vminq_x_s32): Likewise.
14240 (__arm_vminq_x_u8): Likewise.
14241 (__arm_vminq_x_u16): Likewise.
14242 (__arm_vminq_x_u32): Likewise.
14243 (__arm_vmaxq_x_s8): Likewise.
14244 (__arm_vmaxq_x_s16): Likewise.
14245 (__arm_vmaxq_x_s32): Likewise.
14246 (__arm_vmaxq_x_u8): Likewise.
14247 (__arm_vmaxq_x_u16): Likewise.
14248 (__arm_vmaxq_x_u32): Likewise.
14249 (__arm_vabdq_x_s8): Likewise.
14250 (__arm_vabdq_x_s16): Likewise.
14251 (__arm_vabdq_x_s32): Likewise.
14252 (__arm_vabdq_x_u8): Likewise.
14253 (__arm_vabdq_x_u16): Likewise.
14254 (__arm_vabdq_x_u32): Likewise.
14255 (__arm_vabsq_x_s8): Likewise.
14256 (__arm_vabsq_x_s16): Likewise.
14257 (__arm_vabsq_x_s32): Likewise.
14258 (__arm_vaddq_x_s8): Likewise.
14259 (__arm_vaddq_x_s16): Likewise.
14260 (__arm_vaddq_x_s32): Likewise.
14261 (__arm_vaddq_x_n_s8): Likewise.
14262 (__arm_vaddq_x_n_s16): Likewise.
14263 (__arm_vaddq_x_n_s32): Likewise.
14264 (__arm_vaddq_x_u8): Likewise.
14265 (__arm_vaddq_x_u16): Likewise.
14266 (__arm_vaddq_x_u32): Likewise.
14267 (__arm_vaddq_x_n_u8): Likewise.
14268 (__arm_vaddq_x_n_u16): Likewise.
14269 (__arm_vaddq_x_n_u32): Likewise.
14270 (__arm_vclsq_x_s8): Likewise.
14271 (__arm_vclsq_x_s16): Likewise.
14272 (__arm_vclsq_x_s32): Likewise.
14273 (__arm_vclzq_x_s8): Likewise.
14274 (__arm_vclzq_x_s16): Likewise.
14275 (__arm_vclzq_x_s32): Likewise.
14276 (__arm_vclzq_x_u8): Likewise.
14277 (__arm_vclzq_x_u16): Likewise.
14278 (__arm_vclzq_x_u32): Likewise.
14279 (__arm_vnegq_x_s8): Likewise.
14280 (__arm_vnegq_x_s16): Likewise.
14281 (__arm_vnegq_x_s32): Likewise.
14282 (__arm_vmulhq_x_s8): Likewise.
14283 (__arm_vmulhq_x_s16): Likewise.
14284 (__arm_vmulhq_x_s32): Likewise.
14285 (__arm_vmulhq_x_u8): Likewise.
14286 (__arm_vmulhq_x_u16): Likewise.
14287 (__arm_vmulhq_x_u32): Likewise.
14288 (__arm_vmullbq_poly_x_p8): Likewise.
14289 (__arm_vmullbq_poly_x_p16): Likewise.
14290 (__arm_vmullbq_int_x_s8): Likewise.
14291 (__arm_vmullbq_int_x_s16): Likewise.
14292 (__arm_vmullbq_int_x_s32): Likewise.
14293 (__arm_vmullbq_int_x_u8): Likewise.
14294 (__arm_vmullbq_int_x_u16): Likewise.
14295 (__arm_vmullbq_int_x_u32): Likewise.
14296 (__arm_vmulltq_poly_x_p8): Likewise.
14297 (__arm_vmulltq_poly_x_p16): Likewise.
14298 (__arm_vmulltq_int_x_s8): Likewise.
14299 (__arm_vmulltq_int_x_s16): Likewise.
14300 (__arm_vmulltq_int_x_s32): Likewise.
14301 (__arm_vmulltq_int_x_u8): Likewise.
14302 (__arm_vmulltq_int_x_u16): Likewise.
14303 (__arm_vmulltq_int_x_u32): Likewise.
14304 (__arm_vmulq_x_s8): Likewise.
14305 (__arm_vmulq_x_s16): Likewise.
14306 (__arm_vmulq_x_s32): Likewise.
14307 (__arm_vmulq_x_n_s8): Likewise.
14308 (__arm_vmulq_x_n_s16): Likewise.
14309 (__arm_vmulq_x_n_s32): Likewise.
14310 (__arm_vmulq_x_u8): Likewise.
14311 (__arm_vmulq_x_u16): Likewise.
14312 (__arm_vmulq_x_u32): Likewise.
14313 (__arm_vmulq_x_n_u8): Likewise.
14314 (__arm_vmulq_x_n_u16): Likewise.
14315 (__arm_vmulq_x_n_u32): Likewise.
14316 (__arm_vsubq_x_s8): Likewise.
14317 (__arm_vsubq_x_s16): Likewise.
14318 (__arm_vsubq_x_s32): Likewise.
14319 (__arm_vsubq_x_n_s8): Likewise.
14320 (__arm_vsubq_x_n_s16): Likewise.
14321 (__arm_vsubq_x_n_s32): Likewise.
14322 (__arm_vsubq_x_u8): Likewise.
14323 (__arm_vsubq_x_u16): Likewise.
14324 (__arm_vsubq_x_u32): Likewise.
14325 (__arm_vsubq_x_n_u8): Likewise.
14326 (__arm_vsubq_x_n_u16): Likewise.
14327 (__arm_vsubq_x_n_u32): Likewise.
14328 (__arm_vcaddq_rot90_x_s8): Likewise.
14329 (__arm_vcaddq_rot90_x_s16): Likewise.
14330 (__arm_vcaddq_rot90_x_s32): Likewise.
14331 (__arm_vcaddq_rot90_x_u8): Likewise.
14332 (__arm_vcaddq_rot90_x_u16): Likewise.
14333 (__arm_vcaddq_rot90_x_u32): Likewise.
14334 (__arm_vcaddq_rot270_x_s8): Likewise.
14335 (__arm_vcaddq_rot270_x_s16): Likewise.
14336 (__arm_vcaddq_rot270_x_s32): Likewise.
14337 (__arm_vcaddq_rot270_x_u8): Likewise.
14338 (__arm_vcaddq_rot270_x_u16): Likewise.
14339 (__arm_vcaddq_rot270_x_u32): Likewise.
14340 (__arm_vhaddq_x_n_s8): Likewise.
14341 (__arm_vhaddq_x_n_s16): Likewise.
14342 (__arm_vhaddq_x_n_s32): Likewise.
14343 (__arm_vhaddq_x_n_u8): Likewise.
14344 (__arm_vhaddq_x_n_u16): Likewise.
14345 (__arm_vhaddq_x_n_u32): Likewise.
14346 (__arm_vhaddq_x_s8): Likewise.
14347 (__arm_vhaddq_x_s16): Likewise.
14348 (__arm_vhaddq_x_s32): Likewise.
14349 (__arm_vhaddq_x_u8): Likewise.
14350 (__arm_vhaddq_x_u16): Likewise.
14351 (__arm_vhaddq_x_u32): Likewise.
14352 (__arm_vhcaddq_rot90_x_s8): Likewise.
14353 (__arm_vhcaddq_rot90_x_s16): Likewise.
14354 (__arm_vhcaddq_rot90_x_s32): Likewise.
14355 (__arm_vhcaddq_rot270_x_s8): Likewise.
14356 (__arm_vhcaddq_rot270_x_s16): Likewise.
14357 (__arm_vhcaddq_rot270_x_s32): Likewise.
14358 (__arm_vhsubq_x_n_s8): Likewise.
14359 (__arm_vhsubq_x_n_s16): Likewise.
14360 (__arm_vhsubq_x_n_s32): Likewise.
14361 (__arm_vhsubq_x_n_u8): Likewise.
14362 (__arm_vhsubq_x_n_u16): Likewise.
14363 (__arm_vhsubq_x_n_u32): Likewise.
14364 (__arm_vhsubq_x_s8): Likewise.
14365 (__arm_vhsubq_x_s16): Likewise.
14366 (__arm_vhsubq_x_s32): Likewise.
14367 (__arm_vhsubq_x_u8): Likewise.
14368 (__arm_vhsubq_x_u16): Likewise.
14369 (__arm_vhsubq_x_u32): Likewise.
14370 (__arm_vrhaddq_x_s8): Likewise.
14371 (__arm_vrhaddq_x_s16): Likewise.
14372 (__arm_vrhaddq_x_s32): Likewise.
14373 (__arm_vrhaddq_x_u8): Likewise.
14374 (__arm_vrhaddq_x_u16): Likewise.
14375 (__arm_vrhaddq_x_u32): Likewise.
14376 (__arm_vrmulhq_x_s8): Likewise.
14377 (__arm_vrmulhq_x_s16): Likewise.
14378 (__arm_vrmulhq_x_s32): Likewise.
14379 (__arm_vrmulhq_x_u8): Likewise.
14380 (__arm_vrmulhq_x_u16): Likewise.
14381 (__arm_vrmulhq_x_u32): Likewise.
14382 (__arm_vandq_x_s8): Likewise.
14383 (__arm_vandq_x_s16): Likewise.
14384 (__arm_vandq_x_s32): Likewise.
14385 (__arm_vandq_x_u8): Likewise.
14386 (__arm_vandq_x_u16): Likewise.
14387 (__arm_vandq_x_u32): Likewise.
14388 (__arm_vbicq_x_s8): Likewise.
14389 (__arm_vbicq_x_s16): Likewise.
14390 (__arm_vbicq_x_s32): Likewise.
14391 (__arm_vbicq_x_u8): Likewise.
14392 (__arm_vbicq_x_u16): Likewise.
14393 (__arm_vbicq_x_u32): Likewise.
14394 (__arm_vbrsrq_x_n_s8): Likewise.
14395 (__arm_vbrsrq_x_n_s16): Likewise.
14396 (__arm_vbrsrq_x_n_s32): Likewise.
14397 (__arm_vbrsrq_x_n_u8): Likewise.
14398 (__arm_vbrsrq_x_n_u16): Likewise.
14399 (__arm_vbrsrq_x_n_u32): Likewise.
14400 (__arm_veorq_x_s8): Likewise.
14401 (__arm_veorq_x_s16): Likewise.
14402 (__arm_veorq_x_s32): Likewise.
14403 (__arm_veorq_x_u8): Likewise.
14404 (__arm_veorq_x_u16): Likewise.
14405 (__arm_veorq_x_u32): Likewise.
14406 (__arm_vmovlbq_x_s8): Likewise.
14407 (__arm_vmovlbq_x_s16): Likewise.
14408 (__arm_vmovlbq_x_u8): Likewise.
14409 (__arm_vmovlbq_x_u16): Likewise.
14410 (__arm_vmovltq_x_s8): Likewise.
14411 (__arm_vmovltq_x_s16): Likewise.
14412 (__arm_vmovltq_x_u8): Likewise.
14413 (__arm_vmovltq_x_u16): Likewise.
14414 (__arm_vmvnq_x_s8): Likewise.
14415 (__arm_vmvnq_x_s16): Likewise.
14416 (__arm_vmvnq_x_s32): Likewise.
14417 (__arm_vmvnq_x_u8): Likewise.
14418 (__arm_vmvnq_x_u16): Likewise.
14419 (__arm_vmvnq_x_u32): Likewise.
14420 (__arm_vmvnq_x_n_s16): Likewise.
14421 (__arm_vmvnq_x_n_s32): Likewise.
14422 (__arm_vmvnq_x_n_u16): Likewise.
14423 (__arm_vmvnq_x_n_u32): Likewise.
14424 (__arm_vornq_x_s8): Likewise.
14425 (__arm_vornq_x_s16): Likewise.
14426 (__arm_vornq_x_s32): Likewise.
14427 (__arm_vornq_x_u8): Likewise.
14428 (__arm_vornq_x_u16): Likewise.
14429 (__arm_vornq_x_u32): Likewise.
14430 (__arm_vorrq_x_s8): Likewise.
14431 (__arm_vorrq_x_s16): Likewise.
14432 (__arm_vorrq_x_s32): Likewise.
14433 (__arm_vorrq_x_u8): Likewise.
14434 (__arm_vorrq_x_u16): Likewise.
14435 (__arm_vorrq_x_u32): Likewise.
14436 (__arm_vrev16q_x_s8): Likewise.
14437 (__arm_vrev16q_x_u8): Likewise.
14438 (__arm_vrev32q_x_s8): Likewise.
14439 (__arm_vrev32q_x_s16): Likewise.
14440 (__arm_vrev32q_x_u8): Likewise.
14441 (__arm_vrev32q_x_u16): Likewise.
14442 (__arm_vrev64q_x_s8): Likewise.
14443 (__arm_vrev64q_x_s16): Likewise.
14444 (__arm_vrev64q_x_s32): Likewise.
14445 (__arm_vrev64q_x_u8): Likewise.
14446 (__arm_vrev64q_x_u16): Likewise.
14447 (__arm_vrev64q_x_u32): Likewise.
14448 (__arm_vrshlq_x_s8): Likewise.
14449 (__arm_vrshlq_x_s16): Likewise.
14450 (__arm_vrshlq_x_s32): Likewise.
14451 (__arm_vrshlq_x_u8): Likewise.
14452 (__arm_vrshlq_x_u16): Likewise.
14453 (__arm_vrshlq_x_u32): Likewise.
14454 (__arm_vshllbq_x_n_s8): Likewise.
14455 (__arm_vshllbq_x_n_s16): Likewise.
14456 (__arm_vshllbq_x_n_u8): Likewise.
14457 (__arm_vshllbq_x_n_u16): Likewise.
14458 (__arm_vshlltq_x_n_s8): Likewise.
14459 (__arm_vshlltq_x_n_s16): Likewise.
14460 (__arm_vshlltq_x_n_u8): Likewise.
14461 (__arm_vshlltq_x_n_u16): Likewise.
14462 (__arm_vshlq_x_s8): Likewise.
14463 (__arm_vshlq_x_s16): Likewise.
14464 (__arm_vshlq_x_s32): Likewise.
14465 (__arm_vshlq_x_u8): Likewise.
14466 (__arm_vshlq_x_u16): Likewise.
14467 (__arm_vshlq_x_u32): Likewise.
14468 (__arm_vshlq_x_n_s8): Likewise.
14469 (__arm_vshlq_x_n_s16): Likewise.
14470 (__arm_vshlq_x_n_s32): Likewise.
14471 (__arm_vshlq_x_n_u8): Likewise.
14472 (__arm_vshlq_x_n_u16): Likewise.
14473 (__arm_vshlq_x_n_u32): Likewise.
14474 (__arm_vrshrq_x_n_s8): Likewise.
14475 (__arm_vrshrq_x_n_s16): Likewise.
14476 (__arm_vrshrq_x_n_s32): Likewise.
14477 (__arm_vrshrq_x_n_u8): Likewise.
14478 (__arm_vrshrq_x_n_u16): Likewise.
14479 (__arm_vrshrq_x_n_u32): Likewise.
14480 (__arm_vshrq_x_n_s8): Likewise.
14481 (__arm_vshrq_x_n_s16): Likewise.
14482 (__arm_vshrq_x_n_s32): Likewise.
14483 (__arm_vshrq_x_n_u8): Likewise.
14484 (__arm_vshrq_x_n_u16): Likewise.
14485 (__arm_vshrq_x_n_u32): Likewise.
14486 (__arm_vdupq_x_n_f16): Likewise.
14487 (__arm_vdupq_x_n_f32): Likewise.
14488 (__arm_vminnmq_x_f16): Likewise.
14489 (__arm_vminnmq_x_f32): Likewise.
14490 (__arm_vmaxnmq_x_f16): Likewise.
14491 (__arm_vmaxnmq_x_f32): Likewise.
14492 (__arm_vabdq_x_f16): Likewise.
14493 (__arm_vabdq_x_f32): Likewise.
14494 (__arm_vabsq_x_f16): Likewise.
14495 (__arm_vabsq_x_f32): Likewise.
14496 (__arm_vaddq_x_f16): Likewise.
14497 (__arm_vaddq_x_f32): Likewise.
14498 (__arm_vaddq_x_n_f16): Likewise.
14499 (__arm_vaddq_x_n_f32): Likewise.
14500 (__arm_vnegq_x_f16): Likewise.
14501 (__arm_vnegq_x_f32): Likewise.
14502 (__arm_vmulq_x_f16): Likewise.
14503 (__arm_vmulq_x_f32): Likewise.
14504 (__arm_vmulq_x_n_f16): Likewise.
14505 (__arm_vmulq_x_n_f32): Likewise.
14506 (__arm_vsubq_x_f16): Likewise.
14507 (__arm_vsubq_x_f32): Likewise.
14508 (__arm_vsubq_x_n_f16): Likewise.
14509 (__arm_vsubq_x_n_f32): Likewise.
14510 (__arm_vcaddq_rot90_x_f16): Likewise.
14511 (__arm_vcaddq_rot90_x_f32): Likewise.
14512 (__arm_vcaddq_rot270_x_f16): Likewise.
14513 (__arm_vcaddq_rot270_x_f32): Likewise.
14514 (__arm_vcmulq_x_f16): Likewise.
14515 (__arm_vcmulq_x_f32): Likewise.
14516 (__arm_vcmulq_rot90_x_f16): Likewise.
14517 (__arm_vcmulq_rot90_x_f32): Likewise.
14518 (__arm_vcmulq_rot180_x_f16): Likewise.
14519 (__arm_vcmulq_rot180_x_f32): Likewise.
14520 (__arm_vcmulq_rot270_x_f16): Likewise.
14521 (__arm_vcmulq_rot270_x_f32): Likewise.
14522 (__arm_vcvtaq_x_s16_f16): Likewise.
14523 (__arm_vcvtaq_x_s32_f32): Likewise.
14524 (__arm_vcvtaq_x_u16_f16): Likewise.
14525 (__arm_vcvtaq_x_u32_f32): Likewise.
14526 (__arm_vcvtnq_x_s16_f16): Likewise.
14527 (__arm_vcvtnq_x_s32_f32): Likewise.
14528 (__arm_vcvtnq_x_u16_f16): Likewise.
14529 (__arm_vcvtnq_x_u32_f32): Likewise.
14530 (__arm_vcvtpq_x_s16_f16): Likewise.
14531 (__arm_vcvtpq_x_s32_f32): Likewise.
14532 (__arm_vcvtpq_x_u16_f16): Likewise.
14533 (__arm_vcvtpq_x_u32_f32): Likewise.
14534 (__arm_vcvtmq_x_s16_f16): Likewise.
14535 (__arm_vcvtmq_x_s32_f32): Likewise.
14536 (__arm_vcvtmq_x_u16_f16): Likewise.
14537 (__arm_vcvtmq_x_u32_f32): Likewise.
14538 (__arm_vcvtbq_x_f32_f16): Likewise.
14539 (__arm_vcvttq_x_f32_f16): Likewise.
14540 (__arm_vcvtq_x_f16_u16): Likewise.
14541 (__arm_vcvtq_x_f16_s16): Likewise.
14542 (__arm_vcvtq_x_f32_s32): Likewise.
14543 (__arm_vcvtq_x_f32_u32): Likewise.
14544 (__arm_vcvtq_x_n_f16_s16): Likewise.
14545 (__arm_vcvtq_x_n_f16_u16): Likewise.
14546 (__arm_vcvtq_x_n_f32_s32): Likewise.
14547 (__arm_vcvtq_x_n_f32_u32): Likewise.
14548 (__arm_vcvtq_x_s16_f16): Likewise.
14549 (__arm_vcvtq_x_s32_f32): Likewise.
14550 (__arm_vcvtq_x_u16_f16): Likewise.
14551 (__arm_vcvtq_x_u32_f32): Likewise.
14552 (__arm_vcvtq_x_n_s16_f16): Likewise.
14553 (__arm_vcvtq_x_n_s32_f32): Likewise.
14554 (__arm_vcvtq_x_n_u16_f16): Likewise.
14555 (__arm_vcvtq_x_n_u32_f32): Likewise.
14556 (__arm_vrndq_x_f16): Likewise.
14557 (__arm_vrndq_x_f32): Likewise.
14558 (__arm_vrndnq_x_f16): Likewise.
14559 (__arm_vrndnq_x_f32): Likewise.
14560 (__arm_vrndmq_x_f16): Likewise.
14561 (__arm_vrndmq_x_f32): Likewise.
14562 (__arm_vrndpq_x_f16): Likewise.
14563 (__arm_vrndpq_x_f32): Likewise.
14564 (__arm_vrndaq_x_f16): Likewise.
14565 (__arm_vrndaq_x_f32): Likewise.
14566 (__arm_vrndxq_x_f16): Likewise.
14567 (__arm_vrndxq_x_f32): Likewise.
14568 (__arm_vandq_x_f16): Likewise.
14569 (__arm_vandq_x_f32): Likewise.
14570 (__arm_vbicq_x_f16): Likewise.
14571 (__arm_vbicq_x_f32): Likewise.
14572 (__arm_vbrsrq_x_n_f16): Likewise.
14573 (__arm_vbrsrq_x_n_f32): Likewise.
14574 (__arm_veorq_x_f16): Likewise.
14575 (__arm_veorq_x_f32): Likewise.
14576 (__arm_vornq_x_f16): Likewise.
14577 (__arm_vornq_x_f32): Likewise.
14578 (__arm_vorrq_x_f16): Likewise.
14579 (__arm_vorrq_x_f32): Likewise.
14580 (__arm_vrev32q_x_f16): Likewise.
14581 (__arm_vrev64q_x_f16): Likewise.
14582 (__arm_vrev64q_x_f32): Likewise.
14583 (vabdq_x): Define polymorphic variant.
14584 (vabsq_x): Likewise.
14585 (vaddq_x): Likewise.
14586 (vandq_x): Likewise.
14587 (vbicq_x): Likewise.
14588 (vbrsrq_x): Likewise.
14589 (vcaddq_rot270_x): Likewise.
14590 (vcaddq_rot90_x): Likewise.
14591 (vcmulq_rot180_x): Likewise.
14592 (vcmulq_rot270_x): Likewise.
14593 (vcmulq_x): Likewise.
14594 (vcvtq_x): Likewise.
14595 (vcvtq_x_n): Likewise.
14596 (vcvtnq_m): Likewise.
14597 (veorq_x): Likewise.
14598 (vmaxnmq_x): Likewise.
14599 (vminnmq_x): Likewise.
14600 (vmulq_x): Likewise.
14601 (vnegq_x): Likewise.
14602 (vornq_x): Likewise.
14603 (vorrq_x): Likewise.
14604 (vrev32q_x): Likewise.
14605 (vrev64q_x): Likewise.
14606 (vrndaq_x): Likewise.
14607 (vrndmq_x): Likewise.
14608 (vrndnq_x): Likewise.
14609 (vrndpq_x): Likewise.
14610 (vrndq_x): Likewise.
14611 (vrndxq_x): Likewise.
14612 (vsubq_x): Likewise.
14613 (vcmulq_rot90_x): Likewise.
14614 (vadciq): Likewise.
14615 (vclsq_x): Likewise.
14616 (vclzq_x): Likewise.
14617 (vhaddq_x): Likewise.
14618 (vhcaddq_rot270_x): Likewise.
14619 (vhcaddq_rot90_x): Likewise.
14620 (vhsubq_x): Likewise.
14621 (vmaxq_x): Likewise.
14622 (vminq_x): Likewise.
14623 (vmovlbq_x): Likewise.
14624 (vmovltq_x): Likewise.
14625 (vmulhq_x): Likewise.
14626 (vmullbq_int_x): Likewise.
14627 (vmullbq_poly_x): Likewise.
14628 (vmulltq_int_x): Likewise.
14629 (vmulltq_poly_x): Likewise.
14630 (vmvnq_x): Likewise.
14631 (vrev16q_x): Likewise.
14632 (vrhaddq_x): Likewise.
14633 (vrmulhq_x): Likewise.
14634 (vrshlq_x): Likewise.
14635 (vrshrq_x): Likewise.
14636 (vshllbq_x): Likewise.
14637 (vshlltq_x): Likewise.
14638 (vshlq_x_n): Likewise.
14639 (vshlq_x): Likewise.
14640 (vdwdupq_x_u8): Likewise.
14641 (vdwdupq_x_u16): Likewise.
14642 (vdwdupq_x_u32): Likewise.
14643 (viwdupq_x_u8): Likewise.
14644 (viwdupq_x_u16): Likewise.
14645 (viwdupq_x_u32): Likewise.
14646 (vidupq_x_u8): Likewise.
14647 (vddupq_x_u8): Likewise.
14648 (vidupq_x_u16): Likewise.
14649 (vddupq_x_u16): Likewise.
14650 (vidupq_x_u32): Likewise.
14651 (vddupq_x_u32): Likewise.
14652 (vshrq_x): Likewise.
14654 2020-03-20 Richard Biener <rguenther@suse.de>
14656 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
14657 to vectorize for CTOR defs.
14659 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14660 Andre Vieira <andre.simoesdiasvieira@arm.com>
14661 Mihail Ionescu <mihail.ionescu@arm.com>
14663 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
14665 (LDRGBWBU_QUALIFIERS): Likewise.
14666 (LDRGBWBS_Z_QUALIFIERS): Likewise.
14667 (LDRGBWBU_Z_QUALIFIERS): Likewise.
14668 (STRSBWBS_QUALIFIERS): Likewise.
14669 (STRSBWBU_QUALIFIERS): Likewise.
14670 (STRSBWBS_P_QUALIFIERS): Likewise.
14671 (STRSBWBU_P_QUALIFIERS): Likewise.
14672 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
14673 (vldrdq_gather_base_wb_u64): Likewise.
14674 (vldrdq_gather_base_wb_z_s64): Likewise.
14675 (vldrdq_gather_base_wb_z_u64): Likewise.
14676 (vldrwq_gather_base_wb_f32): Likewise.
14677 (vldrwq_gather_base_wb_s32): Likewise.
14678 (vldrwq_gather_base_wb_u32): Likewise.
14679 (vldrwq_gather_base_wb_z_f32): Likewise.
14680 (vldrwq_gather_base_wb_z_s32): Likewise.
14681 (vldrwq_gather_base_wb_z_u32): Likewise.
14682 (vstrdq_scatter_base_wb_p_s64): Likewise.
14683 (vstrdq_scatter_base_wb_p_u64): Likewise.
14684 (vstrdq_scatter_base_wb_s64): Likewise.
14685 (vstrdq_scatter_base_wb_u64): Likewise.
14686 (vstrwq_scatter_base_wb_p_s32): Likewise.
14687 (vstrwq_scatter_base_wb_p_f32): Likewise.
14688 (vstrwq_scatter_base_wb_p_u32): Likewise.
14689 (vstrwq_scatter_base_wb_s32): Likewise.
14690 (vstrwq_scatter_base_wb_u32): Likewise.
14691 (vstrwq_scatter_base_wb_f32): Likewise.
14692 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
14693 (__arm_vldrdq_gather_base_wb_u64): Likewise.
14694 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
14695 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
14696 (__arm_vldrwq_gather_base_wb_s32): Likewise.
14697 (__arm_vldrwq_gather_base_wb_u32): Likewise.
14698 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
14699 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
14700 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
14701 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
14702 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
14703 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
14704 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
14705 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
14706 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
14707 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
14708 (__arm_vldrwq_gather_base_wb_f32): Likewise.
14709 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
14710 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
14711 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
14712 (vstrwq_scatter_base_wb): Define polymorphic variant.
14713 (vstrwq_scatter_base_wb_p): Likewise.
14714 (vstrdq_scatter_base_wb_p): Likewise.
14715 (vstrdq_scatter_base_wb): Likewise.
14716 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
14718 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
14720 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
14721 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
14722 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
14723 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
14724 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
14725 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
14726 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
14727 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
14728 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
14729 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
14730 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
14731 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
14732 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
14733 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
14734 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
14735 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
14736 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
14737 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
14738 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
14739 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
14740 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
14741 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
14742 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
14743 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
14744 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
14745 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
14746 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
14747 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
14748 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
14750 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14751 Andre Vieira <andre.simoesdiasvieira@arm.com>
14752 Mihail Ionescu <mihail.ionescu@arm.com>
14754 * config/arm/arm-builtins.c
14755 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
14757 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
14758 (vddupq_m_n_u32): Likewise.
14759 (vddupq_m_n_u16): Likewise.
14760 (vddupq_m_wb_u8): Likewise.
14761 (vddupq_m_wb_u16): Likewise.
14762 (vddupq_m_wb_u32): Likewise.
14763 (vddupq_n_u8): Likewise.
14764 (vddupq_n_u32): Likewise.
14765 (vddupq_n_u16): Likewise.
14766 (vddupq_wb_u8): Likewise.
14767 (vddupq_wb_u16): Likewise.
14768 (vddupq_wb_u32): Likewise.
14769 (vdwdupq_m_n_u8): Likewise.
14770 (vdwdupq_m_n_u32): Likewise.
14771 (vdwdupq_m_n_u16): Likewise.
14772 (vdwdupq_m_wb_u8): Likewise.
14773 (vdwdupq_m_wb_u32): Likewise.
14774 (vdwdupq_m_wb_u16): Likewise.
14775 (vdwdupq_n_u8): Likewise.
14776 (vdwdupq_n_u32): Likewise.
14777 (vdwdupq_n_u16): Likewise.
14778 (vdwdupq_wb_u8): Likewise.
14779 (vdwdupq_wb_u32): Likewise.
14780 (vdwdupq_wb_u16): Likewise.
14781 (vidupq_m_n_u8): Likewise.
14782 (vidupq_m_n_u32): Likewise.
14783 (vidupq_m_n_u16): Likewise.
14784 (vidupq_m_wb_u8): Likewise.
14785 (vidupq_m_wb_u16): Likewise.
14786 (vidupq_m_wb_u32): Likewise.
14787 (vidupq_n_u8): Likewise.
14788 (vidupq_n_u32): Likewise.
14789 (vidupq_n_u16): Likewise.
14790 (vidupq_wb_u8): Likewise.
14791 (vidupq_wb_u16): Likewise.
14792 (vidupq_wb_u32): Likewise.
14793 (viwdupq_m_n_u8): Likewise.
14794 (viwdupq_m_n_u32): Likewise.
14795 (viwdupq_m_n_u16): Likewise.
14796 (viwdupq_m_wb_u8): Likewise.
14797 (viwdupq_m_wb_u32): Likewise.
14798 (viwdupq_m_wb_u16): Likewise.
14799 (viwdupq_n_u8): Likewise.
14800 (viwdupq_n_u32): Likewise.
14801 (viwdupq_n_u16): Likewise.
14802 (viwdupq_wb_u8): Likewise.
14803 (viwdupq_wb_u32): Likewise.
14804 (viwdupq_wb_u16): Likewise.
14805 (__arm_vddupq_m_n_u8): Define intrinsic.
14806 (__arm_vddupq_m_n_u32): Likewise.
14807 (__arm_vddupq_m_n_u16): Likewise.
14808 (__arm_vddupq_m_wb_u8): Likewise.
14809 (__arm_vddupq_m_wb_u16): Likewise.
14810 (__arm_vddupq_m_wb_u32): Likewise.
14811 (__arm_vddupq_n_u8): Likewise.
14812 (__arm_vddupq_n_u32): Likewise.
14813 (__arm_vddupq_n_u16): Likewise.
14814 (__arm_vdwdupq_m_n_u8): Likewise.
14815 (__arm_vdwdupq_m_n_u32): Likewise.
14816 (__arm_vdwdupq_m_n_u16): Likewise.
14817 (__arm_vdwdupq_m_wb_u8): Likewise.
14818 (__arm_vdwdupq_m_wb_u32): Likewise.
14819 (__arm_vdwdupq_m_wb_u16): Likewise.
14820 (__arm_vdwdupq_n_u8): Likewise.
14821 (__arm_vdwdupq_n_u32): Likewise.
14822 (__arm_vdwdupq_n_u16): Likewise.
14823 (__arm_vdwdupq_wb_u8): Likewise.
14824 (__arm_vdwdupq_wb_u32): Likewise.
14825 (__arm_vdwdupq_wb_u16): Likewise.
14826 (__arm_vidupq_m_n_u8): Likewise.
14827 (__arm_vidupq_m_n_u32): Likewise.
14828 (__arm_vidupq_m_n_u16): Likewise.
14829 (__arm_vidupq_n_u8): Likewise.
14830 (__arm_vidupq_m_wb_u8): Likewise.
14831 (__arm_vidupq_m_wb_u16): Likewise.
14832 (__arm_vidupq_m_wb_u32): Likewise.
14833 (__arm_vidupq_n_u32): Likewise.
14834 (__arm_vidupq_n_u16): Likewise.
14835 (__arm_vidupq_wb_u8): Likewise.
14836 (__arm_vidupq_wb_u16): Likewise.
14837 (__arm_vidupq_wb_u32): Likewise.
14838 (__arm_vddupq_wb_u8): Likewise.
14839 (__arm_vddupq_wb_u16): Likewise.
14840 (__arm_vddupq_wb_u32): Likewise.
14841 (__arm_viwdupq_m_n_u8): Likewise.
14842 (__arm_viwdupq_m_n_u32): Likewise.
14843 (__arm_viwdupq_m_n_u16): Likewise.
14844 (__arm_viwdupq_m_wb_u8): Likewise.
14845 (__arm_viwdupq_m_wb_u32): Likewise.
14846 (__arm_viwdupq_m_wb_u16): Likewise.
14847 (__arm_viwdupq_n_u8): Likewise.
14848 (__arm_viwdupq_n_u32): Likewise.
14849 (__arm_viwdupq_n_u16): Likewise.
14850 (__arm_viwdupq_wb_u8): Likewise.
14851 (__arm_viwdupq_wb_u32): Likewise.
14852 (__arm_viwdupq_wb_u16): Likewise.
14853 (vidupq_m): Define polymorphic variant.
14854 (vddupq_m): Likewise.
14855 (vidupq_u16): Likewise.
14856 (vidupq_u32): Likewise.
14857 (vidupq_u8): Likewise.
14858 (vddupq_u16): Likewise.
14859 (vddupq_u32): Likewise.
14860 (vddupq_u8): Likewise.
14861 (viwdupq_m): Likewise.
14862 (viwdupq_u16): Likewise.
14863 (viwdupq_u32): Likewise.
14864 (viwdupq_u8): Likewise.
14865 (vdwdupq_m): Likewise.
14866 (vdwdupq_u16): Likewise.
14867 (vdwdupq_u32): Likewise.
14868 (vdwdupq_u8): Likewise.
14869 * config/arm/arm_mve_builtins.def
14870 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
14872 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
14873 (mve_vidupq_u<mode>_insn): Likewise.
14874 (mve_vidupq_m_n_u<mode>): Likewise.
14875 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
14876 (mve_vddupq_n_u<mode>): Likewise.
14877 (mve_vddupq_u<mode>_insn): Likewise.
14878 (mve_vddupq_m_n_u<mode>): Likewise.
14879 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
14880 (mve_vdwdupq_n_u<mode>): Likewise.
14881 (mve_vdwdupq_wb_u<mode>): Likewise.
14882 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
14883 (mve_vdwdupq_m_n_u<mode>): Likewise.
14884 (mve_vdwdupq_m_wb_u<mode>): Likewise.
14885 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
14886 (mve_viwdupq_n_u<mode>): Likewise.
14887 (mve_viwdupq_wb_u<mode>): Likewise.
14888 (mve_viwdupq_wb_u<mode>_insn): Likewise.
14889 (mve_viwdupq_m_n_u<mode>): Likewise.
14890 (mve_viwdupq_m_wb_u<mode>): Likewise.
14891 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
14893 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14895 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
14896 (vreinterpretq_s16_s64): Likewise.
14897 (vreinterpretq_s16_s8): Likewise.
14898 (vreinterpretq_s16_u16): Likewise.
14899 (vreinterpretq_s16_u32): Likewise.
14900 (vreinterpretq_s16_u64): Likewise.
14901 (vreinterpretq_s16_u8): Likewise.
14902 (vreinterpretq_s32_s16): Likewise.
14903 (vreinterpretq_s32_s64): Likewise.
14904 (vreinterpretq_s32_s8): Likewise.
14905 (vreinterpretq_s32_u16): Likewise.
14906 (vreinterpretq_s32_u32): Likewise.
14907 (vreinterpretq_s32_u64): Likewise.
14908 (vreinterpretq_s32_u8): Likewise.
14909 (vreinterpretq_s64_s16): Likewise.
14910 (vreinterpretq_s64_s32): Likewise.
14911 (vreinterpretq_s64_s8): Likewise.
14912 (vreinterpretq_s64_u16): Likewise.
14913 (vreinterpretq_s64_u32): Likewise.
14914 (vreinterpretq_s64_u64): Likewise.
14915 (vreinterpretq_s64_u8): Likewise.
14916 (vreinterpretq_s8_s16): Likewise.
14917 (vreinterpretq_s8_s32): Likewise.
14918 (vreinterpretq_s8_s64): Likewise.
14919 (vreinterpretq_s8_u16): Likewise.
14920 (vreinterpretq_s8_u32): Likewise.
14921 (vreinterpretq_s8_u64): Likewise.
14922 (vreinterpretq_s8_u8): Likewise.
14923 (vreinterpretq_u16_s16): Likewise.
14924 (vreinterpretq_u16_s32): Likewise.
14925 (vreinterpretq_u16_s64): Likewise.
14926 (vreinterpretq_u16_s8): Likewise.
14927 (vreinterpretq_u16_u32): Likewise.
14928 (vreinterpretq_u16_u64): Likewise.
14929 (vreinterpretq_u16_u8): Likewise.
14930 (vreinterpretq_u32_s16): Likewise.
14931 (vreinterpretq_u32_s32): Likewise.
14932 (vreinterpretq_u32_s64): Likewise.
14933 (vreinterpretq_u32_s8): Likewise.
14934 (vreinterpretq_u32_u16): Likewise.
14935 (vreinterpretq_u32_u64): Likewise.
14936 (vreinterpretq_u32_u8): Likewise.
14937 (vreinterpretq_u64_s16): Likewise.
14938 (vreinterpretq_u64_s32): Likewise.
14939 (vreinterpretq_u64_s64): Likewise.
14940 (vreinterpretq_u64_s8): Likewise.
14941 (vreinterpretq_u64_u16): Likewise.
14942 (vreinterpretq_u64_u32): Likewise.
14943 (vreinterpretq_u64_u8): Likewise.
14944 (vreinterpretq_u8_s16): Likewise.
14945 (vreinterpretq_u8_s32): Likewise.
14946 (vreinterpretq_u8_s64): Likewise.
14947 (vreinterpretq_u8_s8): Likewise.
14948 (vreinterpretq_u8_u16): Likewise.
14949 (vreinterpretq_u8_u32): Likewise.
14950 (vreinterpretq_u8_u64): Likewise.
14951 (vreinterpretq_s32_f16): Likewise.
14952 (vreinterpretq_s32_f32): Likewise.
14953 (vreinterpretq_u16_f16): Likewise.
14954 (vreinterpretq_u16_f32): Likewise.
14955 (vreinterpretq_u32_f16): Likewise.
14956 (vreinterpretq_u32_f32): Likewise.
14957 (vreinterpretq_u64_f16): Likewise.
14958 (vreinterpretq_u64_f32): Likewise.
14959 (vreinterpretq_u8_f16): Likewise.
14960 (vreinterpretq_u8_f32): Likewise.
14961 (vreinterpretq_f16_f32): Likewise.
14962 (vreinterpretq_f16_s16): Likewise.
14963 (vreinterpretq_f16_s32): Likewise.
14964 (vreinterpretq_f16_s64): Likewise.
14965 (vreinterpretq_f16_s8): Likewise.
14966 (vreinterpretq_f16_u16): Likewise.
14967 (vreinterpretq_f16_u32): Likewise.
14968 (vreinterpretq_f16_u64): Likewise.
14969 (vreinterpretq_f16_u8): Likewise.
14970 (vreinterpretq_f32_f16): Likewise.
14971 (vreinterpretq_f32_s16): Likewise.
14972 (vreinterpretq_f32_s32): Likewise.
14973 (vreinterpretq_f32_s64): Likewise.
14974 (vreinterpretq_f32_s8): Likewise.
14975 (vreinterpretq_f32_u16): Likewise.
14976 (vreinterpretq_f32_u32): Likewise.
14977 (vreinterpretq_f32_u64): Likewise.
14978 (vreinterpretq_f32_u8): Likewise.
14979 (vreinterpretq_s16_f16): Likewise.
14980 (vreinterpretq_s16_f32): Likewise.
14981 (vreinterpretq_s64_f16): Likewise.
14982 (vreinterpretq_s64_f32): Likewise.
14983 (vreinterpretq_s8_f16): Likewise.
14984 (vreinterpretq_s8_f32): Likewise.
14985 (vuninitializedq_u8): Likewise.
14986 (vuninitializedq_u16): Likewise.
14987 (vuninitializedq_u32): Likewise.
14988 (vuninitializedq_u64): Likewise.
14989 (vuninitializedq_s8): Likewise.
14990 (vuninitializedq_s16): Likewise.
14991 (vuninitializedq_s32): Likewise.
14992 (vuninitializedq_s64): Likewise.
14993 (vuninitializedq_f16): Likewise.
14994 (vuninitializedq_f32): Likewise.
14995 (__arm_vuninitializedq_u8): Define intrinsic.
14996 (__arm_vuninitializedq_u16): Likewise.
14997 (__arm_vuninitializedq_u32): Likewise.
14998 (__arm_vuninitializedq_u64): Likewise.
14999 (__arm_vuninitializedq_s8): Likewise.
15000 (__arm_vuninitializedq_s16): Likewise.
15001 (__arm_vuninitializedq_s32): Likewise.
15002 (__arm_vuninitializedq_s64): Likewise.
15003 (__arm_vreinterpretq_s16_s32): Likewise.
15004 (__arm_vreinterpretq_s16_s64): Likewise.
15005 (__arm_vreinterpretq_s16_s8): Likewise.
15006 (__arm_vreinterpretq_s16_u16): Likewise.
15007 (__arm_vreinterpretq_s16_u32): Likewise.
15008 (__arm_vreinterpretq_s16_u64): Likewise.
15009 (__arm_vreinterpretq_s16_u8): Likewise.
15010 (__arm_vreinterpretq_s32_s16): Likewise.
15011 (__arm_vreinterpretq_s32_s64): Likewise.
15012 (__arm_vreinterpretq_s32_s8): Likewise.
15013 (__arm_vreinterpretq_s32_u16): Likewise.
15014 (__arm_vreinterpretq_s32_u32): Likewise.
15015 (__arm_vreinterpretq_s32_u64): Likewise.
15016 (__arm_vreinterpretq_s32_u8): Likewise.
15017 (__arm_vreinterpretq_s64_s16): Likewise.
15018 (__arm_vreinterpretq_s64_s32): Likewise.
15019 (__arm_vreinterpretq_s64_s8): Likewise.
15020 (__arm_vreinterpretq_s64_u16): Likewise.
15021 (__arm_vreinterpretq_s64_u32): Likewise.
15022 (__arm_vreinterpretq_s64_u64): Likewise.
15023 (__arm_vreinterpretq_s64_u8): Likewise.
15024 (__arm_vreinterpretq_s8_s16): Likewise.
15025 (__arm_vreinterpretq_s8_s32): Likewise.
15026 (__arm_vreinterpretq_s8_s64): Likewise.
15027 (__arm_vreinterpretq_s8_u16): Likewise.
15028 (__arm_vreinterpretq_s8_u32): Likewise.
15029 (__arm_vreinterpretq_s8_u64): Likewise.
15030 (__arm_vreinterpretq_s8_u8): Likewise.
15031 (__arm_vreinterpretq_u16_s16): Likewise.
15032 (__arm_vreinterpretq_u16_s32): Likewise.
15033 (__arm_vreinterpretq_u16_s64): Likewise.
15034 (__arm_vreinterpretq_u16_s8): Likewise.
15035 (__arm_vreinterpretq_u16_u32): Likewise.
15036 (__arm_vreinterpretq_u16_u64): Likewise.
15037 (__arm_vreinterpretq_u16_u8): Likewise.
15038 (__arm_vreinterpretq_u32_s16): Likewise.
15039 (__arm_vreinterpretq_u32_s32): Likewise.
15040 (__arm_vreinterpretq_u32_s64): Likewise.
15041 (__arm_vreinterpretq_u32_s8): Likewise.
15042 (__arm_vreinterpretq_u32_u16): Likewise.
15043 (__arm_vreinterpretq_u32_u64): Likewise.
15044 (__arm_vreinterpretq_u32_u8): Likewise.
15045 (__arm_vreinterpretq_u64_s16): Likewise.
15046 (__arm_vreinterpretq_u64_s32): Likewise.
15047 (__arm_vreinterpretq_u64_s64): Likewise.
15048 (__arm_vreinterpretq_u64_s8): Likewise.
15049 (__arm_vreinterpretq_u64_u16): Likewise.
15050 (__arm_vreinterpretq_u64_u32): Likewise.
15051 (__arm_vreinterpretq_u64_u8): Likewise.
15052 (__arm_vreinterpretq_u8_s16): Likewise.
15053 (__arm_vreinterpretq_u8_s32): Likewise.
15054 (__arm_vreinterpretq_u8_s64): Likewise.
15055 (__arm_vreinterpretq_u8_s8): Likewise.
15056 (__arm_vreinterpretq_u8_u16): Likewise.
15057 (__arm_vreinterpretq_u8_u32): Likewise.
15058 (__arm_vreinterpretq_u8_u64): Likewise.
15059 (__arm_vuninitializedq_f16): Likewise.
15060 (__arm_vuninitializedq_f32): Likewise.
15061 (__arm_vreinterpretq_s32_f16): Likewise.
15062 (__arm_vreinterpretq_s32_f32): Likewise.
15063 (__arm_vreinterpretq_s16_f16): Likewise.
15064 (__arm_vreinterpretq_s16_f32): Likewise.
15065 (__arm_vreinterpretq_s64_f16): Likewise.
15066 (__arm_vreinterpretq_s64_f32): Likewise.
15067 (__arm_vreinterpretq_s8_f16): Likewise.
15068 (__arm_vreinterpretq_s8_f32): Likewise.
15069 (__arm_vreinterpretq_u16_f16): Likewise.
15070 (__arm_vreinterpretq_u16_f32): Likewise.
15071 (__arm_vreinterpretq_u32_f16): Likewise.
15072 (__arm_vreinterpretq_u32_f32): Likewise.
15073 (__arm_vreinterpretq_u64_f16): Likewise.
15074 (__arm_vreinterpretq_u64_f32): Likewise.
15075 (__arm_vreinterpretq_u8_f16): Likewise.
15076 (__arm_vreinterpretq_u8_f32): Likewise.
15077 (__arm_vreinterpretq_f16_f32): Likewise.
15078 (__arm_vreinterpretq_f16_s16): Likewise.
15079 (__arm_vreinterpretq_f16_s32): Likewise.
15080 (__arm_vreinterpretq_f16_s64): Likewise.
15081 (__arm_vreinterpretq_f16_s8): Likewise.
15082 (__arm_vreinterpretq_f16_u16): Likewise.
15083 (__arm_vreinterpretq_f16_u32): Likewise.
15084 (__arm_vreinterpretq_f16_u64): Likewise.
15085 (__arm_vreinterpretq_f16_u8): Likewise.
15086 (__arm_vreinterpretq_f32_f16): Likewise.
15087 (__arm_vreinterpretq_f32_s16): Likewise.
15088 (__arm_vreinterpretq_f32_s32): Likewise.
15089 (__arm_vreinterpretq_f32_s64): Likewise.
15090 (__arm_vreinterpretq_f32_s8): Likewise.
15091 (__arm_vreinterpretq_f32_u16): Likewise.
15092 (__arm_vreinterpretq_f32_u32): Likewise.
15093 (__arm_vreinterpretq_f32_u64): Likewise.
15094 (__arm_vreinterpretq_f32_u8): Likewise.
15095 (vuninitializedq): Define polymorphic variant.
15096 (vreinterpretq_f16): Likewise.
15097 (vreinterpretq_f32): Likewise.
15098 (vreinterpretq_s16): Likewise.
15099 (vreinterpretq_s32): Likewise.
15100 (vreinterpretq_s64): Likewise.
15101 (vreinterpretq_s8): Likewise.
15102 (vreinterpretq_u16): Likewise.
15103 (vreinterpretq_u32): Likewise.
15104 (vreinterpretq_u64): Likewise.
15105 (vreinterpretq_u8): Likewise.
15107 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15108 Andre Vieira <andre.simoesdiasvieira@arm.com>
15109 Mihail Ionescu <mihail.ionescu@arm.com>
15111 * config/arm/arm_mve.h (vaddq_s8): Define macro.
15112 (vaddq_s16): Likewise.
15113 (vaddq_s32): Likewise.
15114 (vaddq_u8): Likewise.
15115 (vaddq_u16): Likewise.
15116 (vaddq_u32): Likewise.
15117 (vaddq_f16): Likewise.
15118 (vaddq_f32): Likewise.
15119 (__arm_vaddq_s8): Define intrinsic.
15120 (__arm_vaddq_s16): Likewise.
15121 (__arm_vaddq_s32): Likewise.
15122 (__arm_vaddq_u8): Likewise.
15123 (__arm_vaddq_u16): Likewise.
15124 (__arm_vaddq_u32): Likewise.
15125 (__arm_vaddq_f16): Likewise.
15126 (__arm_vaddq_f32): Likewise.
15127 (vaddq): Define polymorphic variant.
15128 * config/arm/iterators.md (VNIM): Define mode iterator for common types
15129 Neon, IWMMXT and MVE.
15130 (VNINOTM): Likewise.
15131 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
15132 (mve_vaddq_f<mode>): Define RTL pattern.
15133 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
15134 (addv8hf3_neon): Define RTL pattern.
15135 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
15137 (addv8hf3): Define standard RTL pattern for MVE and Neon.
15138 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
15140 2020-03-20 Martin Liska <mliska@suse.cz>
15143 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
15144 build_ref_for_offset function was used and it transforms off to bytes
15147 2020-03-20 Richard Biener <rguenther@suse.de>
15149 PR tree-optimization/94266
15150 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
15151 type of the underlying object to adjust for the containing
15152 field if available.
15154 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
15156 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
15157 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
15158 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
15160 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
15162 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
15164 2020-03-20 Jakub Jelinek <jakub@redhat.com>
15166 PR tree-optimization/94224
15167 * gimple-ssa-store-merging.c
15168 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
15169 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
15172 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
15174 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
15176 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
15179 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
15180 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
15182 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
15185 * cgraphunit.c (process_function_and_variable_attributes): warn
15186 for flatten attribute on alias.
15187 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
15189 2020-03-19 Martin Liska <mliska@suse.cz>
15191 * lto-section-in.c: Add ext_symtab.
15192 * lto-streamer-out.c (write_symbol_extension_info): New.
15193 (produce_symtab_extension): New.
15194 (produce_asm_for_decls): Stream also produce_symtab_extension.
15195 * lto-streamer.h (enum lto_section_type): New section.
15197 2020-03-19 Jakub Jelinek <jakub@redhat.com>
15199 PR tree-optimization/94211
15200 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
15201 instead of estimate_num_insns for bb_seq (middle_bb). Rename
15202 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
15205 2020-03-19 Richard Biener <rguenther@suse.de>
15208 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
15209 and build_ref_for_offset.
15211 2020-03-19 Richard Biener <rguenther@suse.de>
15213 PR middle-end/94216
15214 * fold-const.c (fold_binary_loc): Avoid using
15215 build_fold_addr_expr when we really want an ADDR_EXPR.
15217 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
15219 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
15222 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
15224 PR rtl-optimization/90275
15225 * cse.c (cse_insn): Delete no-op register moves too.
15227 2020-03-18 Martin Sebor <msebor@redhat.com>
15230 * cgraphunit.c (process_function_and_variable_attributes): Also
15231 complain about weakref function definitions and drop all effects
15234 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15235 Mihail Ionescu <mihail.ionescu@arm.com>
15236 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15238 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
15239 (vstrdq_scatter_base_p_u64): Likewise.
15240 (vstrdq_scatter_base_s64): Likewise.
15241 (vstrdq_scatter_base_u64): Likewise.
15242 (vstrdq_scatter_offset_p_s64): Likewise.
15243 (vstrdq_scatter_offset_p_u64): Likewise.
15244 (vstrdq_scatter_offset_s64): Likewise.
15245 (vstrdq_scatter_offset_u64): Likewise.
15246 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
15247 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
15248 (vstrdq_scatter_shifted_offset_s64): Likewise.
15249 (vstrdq_scatter_shifted_offset_u64): Likewise.
15250 (vstrhq_scatter_offset_f16): Likewise.
15251 (vstrhq_scatter_offset_p_f16): Likewise.
15252 (vstrhq_scatter_shifted_offset_f16): Likewise.
15253 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
15254 (vstrwq_scatter_base_f32): Likewise.
15255 (vstrwq_scatter_base_p_f32): Likewise.
15256 (vstrwq_scatter_offset_f32): Likewise.
15257 (vstrwq_scatter_offset_p_f32): Likewise.
15258 (vstrwq_scatter_offset_p_s32): Likewise.
15259 (vstrwq_scatter_offset_p_u32): Likewise.
15260 (vstrwq_scatter_offset_s32): Likewise.
15261 (vstrwq_scatter_offset_u32): Likewise.
15262 (vstrwq_scatter_shifted_offset_f32): Likewise.
15263 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
15264 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
15265 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
15266 (vstrwq_scatter_shifted_offset_s32): Likewise.
15267 (vstrwq_scatter_shifted_offset_u32): Likewise.
15268 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
15269 (__arm_vstrdq_scatter_base_p_u64): Likewise.
15270 (__arm_vstrdq_scatter_base_s64): Likewise.
15271 (__arm_vstrdq_scatter_base_u64): Likewise.
15272 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
15273 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
15274 (__arm_vstrdq_scatter_offset_s64): Likewise.
15275 (__arm_vstrdq_scatter_offset_u64): Likewise.
15276 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
15277 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
15278 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
15279 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
15280 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
15281 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
15282 (__arm_vstrwq_scatter_offset_s32): Likewise.
15283 (__arm_vstrwq_scatter_offset_u32): Likewise.
15284 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
15285 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
15286 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
15287 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
15288 (__arm_vstrhq_scatter_offset_f16): Likewise.
15289 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
15290 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
15291 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
15292 (__arm_vstrwq_scatter_base_f32): Likewise.
15293 (__arm_vstrwq_scatter_base_p_f32): Likewise.
15294 (__arm_vstrwq_scatter_offset_f32): Likewise.
15295 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
15296 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
15297 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
15298 (vstrhq_scatter_offset): Define polymorphic variant.
15299 (vstrhq_scatter_offset_p): Likewise.
15300 (vstrhq_scatter_shifted_offset): Likewise.
15301 (vstrhq_scatter_shifted_offset_p): Likewise.
15302 (vstrwq_scatter_base): Likewise.
15303 (vstrwq_scatter_base_p): Likewise.
15304 (vstrwq_scatter_offset): Likewise.
15305 (vstrwq_scatter_offset_p): Likewise.
15306 (vstrwq_scatter_shifted_offset): Likewise.
15307 (vstrwq_scatter_shifted_offset_p): Likewise.
15308 (vstrdq_scatter_base_p): Likewise.
15309 (vstrdq_scatter_base): Likewise.
15310 (vstrdq_scatter_offset_p): Likewise.
15311 (vstrdq_scatter_offset): Likewise.
15312 (vstrdq_scatter_shifted_offset_p): Likewise.
15313 (vstrdq_scatter_shifted_offset): Likewise.
15314 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
15315 (STRSBS_P): Likewise.
15316 (STRSBU): Likewise.
15317 (STRSBU_P): Likewise.
15319 (STRSS_P): Likewise.
15321 (STRSU_P): Likewise.
15322 * config/arm/constraints.md (Ri): Define.
15323 * config/arm/mve.md (VSTRDSBQ): Define iterator.
15324 (VSTRDSOQ): Likewise.
15325 (VSTRDSSOQ): Likewise.
15326 (VSTRWSOQ): Likewise.
15327 (VSTRWSSOQ): Likewise.
15328 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
15329 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
15330 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
15331 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
15332 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
15333 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
15334 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
15335 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
15336 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
15337 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
15338 (mve_vstrwq_scatter_base_fv4sf): Likewise.
15339 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
15340 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
15341 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
15342 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
15343 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
15344 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
15345 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
15346 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
15347 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
15348 * config/arm/predicates.md (Ri): Define predicate to check immediate
15349 is the range +/-1016 and multiple of 8.
15351 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15352 Mihail Ionescu <mihail.ionescu@arm.com>
15353 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15355 * config/arm/arm_mve.h (vst1q_f32): Define macro.
15356 (vst1q_f16): Likewise.
15357 (vst1q_s8): Likewise.
15358 (vst1q_s32): Likewise.
15359 (vst1q_s16): Likewise.
15360 (vst1q_u8): Likewise.
15361 (vst1q_u32): Likewise.
15362 (vst1q_u16): Likewise.
15363 (vstrhq_f16): Likewise.
15364 (vstrhq_scatter_offset_s32): Likewise.
15365 (vstrhq_scatter_offset_s16): Likewise.
15366 (vstrhq_scatter_offset_u32): Likewise.
15367 (vstrhq_scatter_offset_u16): Likewise.
15368 (vstrhq_scatter_offset_p_s32): Likewise.
15369 (vstrhq_scatter_offset_p_s16): Likewise.
15370 (vstrhq_scatter_offset_p_u32): Likewise.
15371 (vstrhq_scatter_offset_p_u16): Likewise.
15372 (vstrhq_scatter_shifted_offset_s32): Likewise.
15373 (vstrhq_scatter_shifted_offset_s16): Likewise.
15374 (vstrhq_scatter_shifted_offset_u32): Likewise.
15375 (vstrhq_scatter_shifted_offset_u16): Likewise.
15376 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
15377 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
15378 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
15379 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
15380 (vstrhq_s32): Likewise.
15381 (vstrhq_s16): Likewise.
15382 (vstrhq_u32): Likewise.
15383 (vstrhq_u16): Likewise.
15384 (vstrhq_p_f16): Likewise.
15385 (vstrhq_p_s32): Likewise.
15386 (vstrhq_p_s16): Likewise.
15387 (vstrhq_p_u32): Likewise.
15388 (vstrhq_p_u16): Likewise.
15389 (vstrwq_f32): Likewise.
15390 (vstrwq_s32): Likewise.
15391 (vstrwq_u32): Likewise.
15392 (vstrwq_p_f32): Likewise.
15393 (vstrwq_p_s32): Likewise.
15394 (vstrwq_p_u32): Likewise.
15395 (__arm_vst1q_s8): Define intrinsic.
15396 (__arm_vst1q_s32): Likewise.
15397 (__arm_vst1q_s16): Likewise.
15398 (__arm_vst1q_u8): Likewise.
15399 (__arm_vst1q_u32): Likewise.
15400 (__arm_vst1q_u16): Likewise.
15401 (__arm_vstrhq_scatter_offset_s32): Likewise.
15402 (__arm_vstrhq_scatter_offset_s16): Likewise.
15403 (__arm_vstrhq_scatter_offset_u32): Likewise.
15404 (__arm_vstrhq_scatter_offset_u16): Likewise.
15405 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
15406 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
15407 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
15408 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
15409 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
15410 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
15411 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
15412 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
15413 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
15414 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
15415 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
15416 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
15417 (__arm_vstrhq_s32): Likewise.
15418 (__arm_vstrhq_s16): Likewise.
15419 (__arm_vstrhq_u32): Likewise.
15420 (__arm_vstrhq_u16): Likewise.
15421 (__arm_vstrhq_p_s32): Likewise.
15422 (__arm_vstrhq_p_s16): Likewise.
15423 (__arm_vstrhq_p_u32): Likewise.
15424 (__arm_vstrhq_p_u16): Likewise.
15425 (__arm_vstrwq_s32): Likewise.
15426 (__arm_vstrwq_u32): Likewise.
15427 (__arm_vstrwq_p_s32): Likewise.
15428 (__arm_vstrwq_p_u32): Likewise.
15429 (__arm_vstrwq_p_f32): Likewise.
15430 (__arm_vstrwq_f32): Likewise.
15431 (__arm_vst1q_f32): Likewise.
15432 (__arm_vst1q_f16): Likewise.
15433 (__arm_vstrhq_f16): Likewise.
15434 (__arm_vstrhq_p_f16): Likewise.
15435 (vst1q): Define polymorphic variant.
15436 (vstrhq): Likewise.
15437 (vstrhq_p): Likewise.
15438 (vstrhq_scatter_offset_p): Likewise.
15439 (vstrhq_scatter_offset): Likewise.
15440 (vstrhq_scatter_shifted_offset_p): Likewise.
15441 (vstrhq_scatter_shifted_offset): Likewise.
15442 (vstrwq_p): Likewise.
15443 (vstrwq): Likewise.
15444 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
15445 (STRS_P): Likewise.
15447 (STRSS_P): Likewise.
15449 (STRSU_P): Likewise.
15451 (STRU_P): Likewise.
15452 * config/arm/mve.md (VST1Q): Define iterator.
15453 (VSTRHSOQ): Likewise.
15454 (VSTRHSSOQ): Likewise.
15455 (VSTRHQ): Likewise.
15456 (VSTRWQ): Likewise.
15457 (mve_vstrhq_fv8hf): Define RTL pattern.
15458 (mve_vstrhq_p_fv8hf): Likewise.
15459 (mve_vstrhq_p_<supf><mode>): Likewise.
15460 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
15461 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
15462 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
15463 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
15464 (mve_vstrhq_<supf><mode>): Likewise.
15465 (mve_vstrwq_fv4sf): Likewise.
15466 (mve_vstrwq_p_fv4sf): Likewise.
15467 (mve_vstrwq_p_<supf>v4si): Likewise.
15468 (mve_vstrwq_<supf>v4si): Likewise.
15469 (mve_vst1q_f<mode>): Define expand.
15470 (mve_vst1q_<supf><mode>): Likewise.
15472 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15473 Mihail Ionescu <mihail.ionescu@arm.com>
15474 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15476 * config/arm/arm_mve.h (vld1q_s8): Define macro.
15477 (vld1q_s32): Likewise.
15478 (vld1q_s16): Likewise.
15479 (vld1q_u8): Likewise.
15480 (vld1q_u32): Likewise.
15481 (vld1q_u16): Likewise.
15482 (vldrhq_gather_offset_s32): Likewise.
15483 (vldrhq_gather_offset_s16): Likewise.
15484 (vldrhq_gather_offset_u32): Likewise.
15485 (vldrhq_gather_offset_u16): Likewise.
15486 (vldrhq_gather_offset_z_s32): Likewise.
15487 (vldrhq_gather_offset_z_s16): Likewise.
15488 (vldrhq_gather_offset_z_u32): Likewise.
15489 (vldrhq_gather_offset_z_u16): Likewise.
15490 (vldrhq_gather_shifted_offset_s32): Likewise.
15491 (vldrhq_gather_shifted_offset_s16): Likewise.
15492 (vldrhq_gather_shifted_offset_u32): Likewise.
15493 (vldrhq_gather_shifted_offset_u16): Likewise.
15494 (vldrhq_gather_shifted_offset_z_s32): Likewise.
15495 (vldrhq_gather_shifted_offset_z_s16): Likewise.
15496 (vldrhq_gather_shifted_offset_z_u32): Likewise.
15497 (vldrhq_gather_shifted_offset_z_u16): Likewise.
15498 (vldrhq_s32): Likewise.
15499 (vldrhq_s16): Likewise.
15500 (vldrhq_u32): Likewise.
15501 (vldrhq_u16): Likewise.
15502 (vldrhq_z_s32): Likewise.
15503 (vldrhq_z_s16): Likewise.
15504 (vldrhq_z_u32): Likewise.
15505 (vldrhq_z_u16): Likewise.
15506 (vldrwq_s32): Likewise.
15507 (vldrwq_u32): Likewise.
15508 (vldrwq_z_s32): Likewise.
15509 (vldrwq_z_u32): Likewise.
15510 (vld1q_f32): Likewise.
15511 (vld1q_f16): Likewise.
15512 (vldrhq_f16): Likewise.
15513 (vldrhq_z_f16): Likewise.
15514 (vldrwq_f32): Likewise.
15515 (vldrwq_z_f32): Likewise.
15516 (__arm_vld1q_s8): Define intrinsic.
15517 (__arm_vld1q_s32): Likewise.
15518 (__arm_vld1q_s16): Likewise.
15519 (__arm_vld1q_u8): Likewise.
15520 (__arm_vld1q_u32): Likewise.
15521 (__arm_vld1q_u16): Likewise.
15522 (__arm_vldrhq_gather_offset_s32): Likewise.
15523 (__arm_vldrhq_gather_offset_s16): Likewise.
15524 (__arm_vldrhq_gather_offset_u32): Likewise.
15525 (__arm_vldrhq_gather_offset_u16): Likewise.
15526 (__arm_vldrhq_gather_offset_z_s32): Likewise.
15527 (__arm_vldrhq_gather_offset_z_s16): Likewise.
15528 (__arm_vldrhq_gather_offset_z_u32): Likewise.
15529 (__arm_vldrhq_gather_offset_z_u16): Likewise.
15530 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
15531 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
15532 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
15533 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
15534 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
15535 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
15536 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
15537 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
15538 (__arm_vldrhq_s32): Likewise.
15539 (__arm_vldrhq_s16): Likewise.
15540 (__arm_vldrhq_u32): Likewise.
15541 (__arm_vldrhq_u16): Likewise.
15542 (__arm_vldrhq_z_s32): Likewise.
15543 (__arm_vldrhq_z_s16): Likewise.
15544 (__arm_vldrhq_z_u32): Likewise.
15545 (__arm_vldrhq_z_u16): Likewise.
15546 (__arm_vldrwq_s32): Likewise.
15547 (__arm_vldrwq_u32): Likewise.
15548 (__arm_vldrwq_z_s32): Likewise.
15549 (__arm_vldrwq_z_u32): Likewise.
15550 (__arm_vld1q_f32): Likewise.
15551 (__arm_vld1q_f16): Likewise.
15552 (__arm_vldrwq_f32): Likewise.
15553 (__arm_vldrwq_z_f32): Likewise.
15554 (__arm_vldrhq_z_f16): Likewise.
15555 (__arm_vldrhq_f16): Likewise.
15556 (vld1q): Define polymorphic variant.
15557 (vldrhq_gather_offset): Likewise.
15558 (vldrhq_gather_offset_z): Likewise.
15559 (vldrhq_gather_shifted_offset): Likewise.
15560 (vldrhq_gather_shifted_offset_z): Likewise.
15561 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
15563 (LDRU_Z): Likewise.
15564 (LDRS_Z): Likewise.
15565 (LDRGU_Z): Likewise.
15567 (LDRGS_Z): Likewise.
15569 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
15570 (V_sz_elem1): Likewise.
15571 (VLD1Q): Define iterator.
15572 (VLDRHGOQ): Likewise.
15573 (VLDRHGSOQ): Likewise.
15574 (VLDRHQ): Likewise.
15575 (VLDRWQ): Likewise.
15576 (mve_vldrhq_fv8hf): Define RTL pattern.
15577 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
15578 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
15579 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
15580 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
15581 (mve_vldrhq_<supf><mode>): Likewise.
15582 (mve_vldrhq_z_fv8hf): Likewise.
15583 (mve_vldrhq_z_<supf><mode>): Likewise.
15584 (mve_vldrwq_fv4sf): Likewise.
15585 (mve_vldrwq_<supf>v4si): Likewise.
15586 (mve_vldrwq_z_fv4sf): Likewise.
15587 (mve_vldrwq_z_<supf>v4si): Likewise.
15588 (mve_vld1q_f<mode>): Define RTL expand pattern.
15589 (mve_vld1q_<supf><mode>): Likewise.
15591 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15592 Mihail Ionescu <mihail.ionescu@arm.com>
15593 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15595 * config/arm/arm_mve.h (vld1q_s8): Define macro.
15596 (vld1q_s32): Likewise.
15597 (vld1q_s16): Likewise.
15598 (vld1q_u8): Likewise.
15599 (vld1q_u32): Likewise.
15600 (vld1q_u16): Likewise.
15601 (vldrhq_gather_offset_s32): Likewise.
15602 (vldrhq_gather_offset_s16): Likewise.
15603 (vldrhq_gather_offset_u32): Likewise.
15604 (vldrhq_gather_offset_u16): Likewise.
15605 (vldrhq_gather_offset_z_s32): Likewise.
15606 (vldrhq_gather_offset_z_s16): Likewise.
15607 (vldrhq_gather_offset_z_u32): Likewise.
15608 (vldrhq_gather_offset_z_u16): Likewise.
15609 (vldrhq_gather_shifted_offset_s32): Likewise.
15610 (vldrhq_gather_shifted_offset_s16): Likewise.
15611 (vldrhq_gather_shifted_offset_u32): Likewise.
15612 (vldrhq_gather_shifted_offset_u16): Likewise.
15613 (vldrhq_gather_shifted_offset_z_s32): Likewise.
15614 (vldrhq_gather_shifted_offset_z_s16): Likewise.
15615 (vldrhq_gather_shifted_offset_z_u32): Likewise.
15616 (vldrhq_gather_shifted_offset_z_u16): Likewise.
15617 (vldrhq_s32): Likewise.
15618 (vldrhq_s16): Likewise.
15619 (vldrhq_u32): Likewise.
15620 (vldrhq_u16): Likewise.
15621 (vldrhq_z_s32): Likewise.
15622 (vldrhq_z_s16): Likewise.
15623 (vldrhq_z_u32): Likewise.
15624 (vldrhq_z_u16): Likewise.
15625 (vldrwq_s32): Likewise.
15626 (vldrwq_u32): Likewise.
15627 (vldrwq_z_s32): Likewise.
15628 (vldrwq_z_u32): Likewise.
15629 (vld1q_f32): Likewise.
15630 (vld1q_f16): Likewise.
15631 (vldrhq_f16): Likewise.
15632 (vldrhq_z_f16): Likewise.
15633 (vldrwq_f32): Likewise.
15634 (vldrwq_z_f32): Likewise.
15635 (__arm_vld1q_s8): Define intrinsic.
15636 (__arm_vld1q_s32): Likewise.
15637 (__arm_vld1q_s16): Likewise.
15638 (__arm_vld1q_u8): Likewise.
15639 (__arm_vld1q_u32): Likewise.
15640 (__arm_vld1q_u16): Likewise.
15641 (__arm_vldrhq_gather_offset_s32): Likewise.
15642 (__arm_vldrhq_gather_offset_s16): Likewise.
15643 (__arm_vldrhq_gather_offset_u32): Likewise.
15644 (__arm_vldrhq_gather_offset_u16): Likewise.
15645 (__arm_vldrhq_gather_offset_z_s32): Likewise.
15646 (__arm_vldrhq_gather_offset_z_s16): Likewise.
15647 (__arm_vldrhq_gather_offset_z_u32): Likewise.
15648 (__arm_vldrhq_gather_offset_z_u16): Likewise.
15649 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
15650 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
15651 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
15652 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
15653 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
15654 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
15655 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
15656 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
15657 (__arm_vldrhq_s32): Likewise.
15658 (__arm_vldrhq_s16): Likewise.
15659 (__arm_vldrhq_u32): Likewise.
15660 (__arm_vldrhq_u16): Likewise.
15661 (__arm_vldrhq_z_s32): Likewise.
15662 (__arm_vldrhq_z_s16): Likewise.
15663 (__arm_vldrhq_z_u32): Likewise.
15664 (__arm_vldrhq_z_u16): Likewise.
15665 (__arm_vldrwq_s32): Likewise.
15666 (__arm_vldrwq_u32): Likewise.
15667 (__arm_vldrwq_z_s32): Likewise.
15668 (__arm_vldrwq_z_u32): Likewise.
15669 (__arm_vld1q_f32): Likewise.
15670 (__arm_vld1q_f16): Likewise.
15671 (__arm_vldrwq_f32): Likewise.
15672 (__arm_vldrwq_z_f32): Likewise.
15673 (__arm_vldrhq_z_f16): Likewise.
15674 (__arm_vldrhq_f16): Likewise.
15675 (vld1q): Define polymorphic variant.
15676 (vldrhq_gather_offset): Likewise.
15677 (vldrhq_gather_offset_z): Likewise.
15678 (vldrhq_gather_shifted_offset): Likewise.
15679 (vldrhq_gather_shifted_offset_z): Likewise.
15680 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
15682 (LDRU_Z): Likewise.
15683 (LDRS_Z): Likewise.
15684 (LDRGU_Z): Likewise.
15686 (LDRGS_Z): Likewise.
15688 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
15689 (V_sz_elem1): Likewise.
15690 (VLD1Q): Define iterator.
15691 (VLDRHGOQ): Likewise.
15692 (VLDRHGSOQ): Likewise.
15693 (VLDRHQ): Likewise.
15694 (VLDRWQ): Likewise.
15695 (mve_vldrhq_fv8hf): Define RTL pattern.
15696 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
15697 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
15698 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
15699 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
15700 (mve_vldrhq_<supf><mode>): Likewise.
15701 (mve_vldrhq_z_fv8hf): Likewise.
15702 (mve_vldrhq_z_<supf><mode>): Likewise.
15703 (mve_vldrwq_fv4sf): Likewise.
15704 (mve_vldrwq_<supf>v4si): Likewise.
15705 (mve_vldrwq_z_fv4sf): Likewise.
15706 (mve_vldrwq_z_<supf>v4si): Likewise.
15707 (mve_vld1q_f<mode>): Define RTL expand pattern.
15708 (mve_vld1q_<supf><mode>): Likewise.
15710 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15711 Mihail Ionescu <mihail.ionescu@arm.com>
15712 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15714 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
15716 (LDRGBU_Z_QUALIFIERS): Likewise.
15717 (LDRGS_Z_QUALIFIERS): Likewise.
15718 (LDRGU_Z_QUALIFIERS): Likewise.
15719 (LDRS_Z_QUALIFIERS): Likewise.
15720 (LDRU_Z_QUALIFIERS): Likewise.
15721 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
15722 (vldrbq_gather_offset_z_u8): Likewise.
15723 (vldrbq_gather_offset_z_s32): Likewise.
15724 (vldrbq_gather_offset_z_u16): Likewise.
15725 (vldrbq_gather_offset_z_u32): Likewise.
15726 (vldrbq_gather_offset_z_s8): Likewise.
15727 (vldrbq_z_s16): Likewise.
15728 (vldrbq_z_u8): Likewise.
15729 (vldrbq_z_s8): Likewise.
15730 (vldrbq_z_s32): Likewise.
15731 (vldrbq_z_u16): Likewise.
15732 (vldrbq_z_u32): Likewise.
15733 (vldrwq_gather_base_z_u32): Likewise.
15734 (vldrwq_gather_base_z_s32): Likewise.
15735 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
15736 (__arm_vldrbq_gather_offset_z_s32): Likewise.
15737 (__arm_vldrbq_gather_offset_z_s16): Likewise.
15738 (__arm_vldrbq_gather_offset_z_u8): Likewise.
15739 (__arm_vldrbq_gather_offset_z_u32): Likewise.
15740 (__arm_vldrbq_gather_offset_z_u16): Likewise.
15741 (__arm_vldrbq_z_s8): Likewise.
15742 (__arm_vldrbq_z_s32): Likewise.
15743 (__arm_vldrbq_z_s16): Likewise.
15744 (__arm_vldrbq_z_u8): Likewise.
15745 (__arm_vldrbq_z_u32): Likewise.
15746 (__arm_vldrbq_z_u16): Likewise.
15747 (__arm_vldrwq_gather_base_z_s32): Likewise.
15748 (__arm_vldrwq_gather_base_z_u32): Likewise.
15749 (vldrbq_gather_offset_z): Define polymorphic variant.
15750 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
15752 (LDRGBU_Z_QUALIFIERS): Likewise.
15753 (LDRGS_Z_QUALIFIERS): Likewise.
15754 (LDRGU_Z_QUALIFIERS): Likewise.
15755 (LDRS_Z_QUALIFIERS): Likewise.
15756 (LDRU_Z_QUALIFIERS): Likewise.
15757 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
15759 (mve_vldrbq_z_<supf><mode>): Likewise.
15760 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
15762 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15763 Mihail Ionescu <mihail.ionescu@arm.com>
15764 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15766 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
15768 (STRU_P_QUALIFIERS): Likewise.
15769 (STRSU_P_QUALIFIERS): Likewise.
15770 (STRSS_P_QUALIFIERS): Likewise.
15771 (STRSBS_P_QUALIFIERS): Likewise.
15772 (STRSBU_P_QUALIFIERS): Likewise.
15773 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
15774 (vstrbq_p_s32): Likewise.
15775 (vstrbq_p_s16): Likewise.
15776 (vstrbq_p_u8): Likewise.
15777 (vstrbq_p_u32): Likewise.
15778 (vstrbq_p_u16): Likewise.
15779 (vstrbq_scatter_offset_p_s8): Likewise.
15780 (vstrbq_scatter_offset_p_s32): Likewise.
15781 (vstrbq_scatter_offset_p_s16): Likewise.
15782 (vstrbq_scatter_offset_p_u8): Likewise.
15783 (vstrbq_scatter_offset_p_u32): Likewise.
15784 (vstrbq_scatter_offset_p_u16): Likewise.
15785 (vstrwq_scatter_base_p_s32): Likewise.
15786 (vstrwq_scatter_base_p_u32): Likewise.
15787 (__arm_vstrbq_p_s8): Define intrinsic.
15788 (__arm_vstrbq_p_s32): Likewise.
15789 (__arm_vstrbq_p_s16): Likewise.
15790 (__arm_vstrbq_p_u8): Likewise.
15791 (__arm_vstrbq_p_u32): Likewise.
15792 (__arm_vstrbq_p_u16): Likewise.
15793 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
15794 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
15795 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
15796 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
15797 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
15798 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
15799 (__arm_vstrwq_scatter_base_p_s32): Likewise.
15800 (__arm_vstrwq_scatter_base_p_u32): Likewise.
15801 (vstrbq_p): Define polymorphic variant.
15802 (vstrbq_scatter_offset_p): Likewise.
15803 (vstrwq_scatter_base_p): Likewise.
15804 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
15806 (STRU_P_QUALIFIERS): Likewise.
15807 (STRSU_P_QUALIFIERS): Likewise.
15808 (STRSS_P_QUALIFIERS): Likewise.
15809 (STRSBS_P_QUALIFIERS): Likewise.
15810 (STRSBU_P_QUALIFIERS): Likewise.
15811 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
15813 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
15814 (mve_vstrbq_p_<supf><mode>): Likewise.
15816 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15817 Mihail Ionescu <mihail.ionescu@arm.com>
15818 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15820 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
15822 (LDRGS_QUALIFIERS): Likewise.
15823 (LDRS_QUALIFIERS): Likewise.
15824 (LDRU_QUALIFIERS): Likewise.
15825 (LDRGBS_QUALIFIERS): Likewise.
15826 (LDRGBU_QUALIFIERS): Likewise.
15827 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
15828 (vldrbq_gather_offset_s8): Likewise.
15829 (vldrbq_s8): Likewise.
15830 (vldrbq_u8): Likewise.
15831 (vldrbq_gather_offset_u16): Likewise.
15832 (vldrbq_gather_offset_s16): Likewise.
15833 (vldrbq_s16): Likewise.
15834 (vldrbq_u16): Likewise.
15835 (vldrbq_gather_offset_u32): Likewise.
15836 (vldrbq_gather_offset_s32): Likewise.
15837 (vldrbq_s32): Likewise.
15838 (vldrbq_u32): Likewise.
15839 (vldrwq_gather_base_s32): Likewise.
15840 (vldrwq_gather_base_u32): Likewise.
15841 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
15842 (__arm_vldrbq_gather_offset_s8): Likewise.
15843 (__arm_vldrbq_s8): Likewise.
15844 (__arm_vldrbq_u8): Likewise.
15845 (__arm_vldrbq_gather_offset_u16): Likewise.
15846 (__arm_vldrbq_gather_offset_s16): Likewise.
15847 (__arm_vldrbq_s16): Likewise.
15848 (__arm_vldrbq_u16): Likewise.
15849 (__arm_vldrbq_gather_offset_u32): Likewise.
15850 (__arm_vldrbq_gather_offset_s32): Likewise.
15851 (__arm_vldrbq_s32): Likewise.
15852 (__arm_vldrbq_u32): Likewise.
15853 (__arm_vldrwq_gather_base_s32): Likewise.
15854 (__arm_vldrwq_gather_base_u32): Likewise.
15855 (vldrbq_gather_offset): Define polymorphic variant.
15856 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
15858 (LDRGS_QUALIFIERS): Likewise.
15859 (LDRS_QUALIFIERS): Likewise.
15860 (LDRU_QUALIFIERS): Likewise.
15861 (LDRGBS_QUALIFIERS): Likewise.
15862 (LDRGBU_QUALIFIERS): Likewise.
15863 * config/arm/mve.md (VLDRBGOQ): Define iterator.
15864 (VLDRBQ): Likewise.
15865 (VLDRWGBQ): Likewise.
15866 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
15867 (mve_vldrbq_<supf><mode>): Likewise.
15868 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
15870 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15871 Mihail Ionescu <mihail.ionescu@arm.com>
15872 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15874 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
15875 (STRU_QUALIFIERS): Likewise.
15876 (STRSS_QUALIFIERS): Likewise.
15877 (STRSU_QUALIFIERS): Likewise.
15878 (STRSBS_QUALIFIERS): Likewise.
15879 (STRSBU_QUALIFIERS): Likewise.
15880 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
15881 (vstrbq_u8): Likewise.
15882 (vstrbq_u16): Likewise.
15883 (vstrbq_scatter_offset_s8): Likewise.
15884 (vstrbq_scatter_offset_u8): Likewise.
15885 (vstrbq_scatter_offset_u16): Likewise.
15886 (vstrbq_s16): Likewise.
15887 (vstrbq_u32): Likewise.
15888 (vstrbq_scatter_offset_s16): Likewise.
15889 (vstrbq_scatter_offset_u32): Likewise.
15890 (vstrbq_s32): Likewise.
15891 (vstrbq_scatter_offset_s32): Likewise.
15892 (vstrwq_scatter_base_s32): Likewise.
15893 (vstrwq_scatter_base_u32): Likewise.
15894 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
15895 (__arm_vstrbq_scatter_offset_s32): Likewise.
15896 (__arm_vstrbq_scatter_offset_s16): Likewise.
15897 (__arm_vstrbq_scatter_offset_u8): Likewise.
15898 (__arm_vstrbq_scatter_offset_u32): Likewise.
15899 (__arm_vstrbq_scatter_offset_u16): Likewise.
15900 (__arm_vstrbq_s8): Likewise.
15901 (__arm_vstrbq_s32): Likewise.
15902 (__arm_vstrbq_s16): Likewise.
15903 (__arm_vstrbq_u8): Likewise.
15904 (__arm_vstrbq_u32): Likewise.
15905 (__arm_vstrbq_u16): Likewise.
15906 (__arm_vstrwq_scatter_base_s32): Likewise.
15907 (__arm_vstrwq_scatter_base_u32): Likewise.
15908 (vstrbq): Define polymorphic variant.
15909 (vstrbq_scatter_offset): Likewise.
15910 (vstrwq_scatter_base): Likewise.
15911 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
15913 (STRU_QUALIFIERS): Likewise.
15914 (STRSS_QUALIFIERS): Likewise.
15915 (STRSU_QUALIFIERS): Likewise.
15916 (STRSBS_QUALIFIERS): Likewise.
15917 (STRSBU_QUALIFIERS): Likewise.
15918 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
15919 (VSTRWSBQ): Define iterators.
15920 (VSTRBSOQ): Likewise.
15921 (VSTRBQ): Likewise.
15922 (mve_vstrbq_<supf><mode>): Define RTL pattern.
15923 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
15924 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
15926 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15927 Mihail Ionescu <mihail.ionescu@arm.com>
15928 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15930 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
15931 (vabdq_m_f16): Likewise.
15932 (vaddq_m_f32): Likewise.
15933 (vaddq_m_f16): Likewise.
15934 (vaddq_m_n_f32): Likewise.
15935 (vaddq_m_n_f16): Likewise.
15936 (vandq_m_f32): Likewise.
15937 (vandq_m_f16): Likewise.
15938 (vbicq_m_f32): Likewise.
15939 (vbicq_m_f16): Likewise.
15940 (vbrsrq_m_n_f32): Likewise.
15941 (vbrsrq_m_n_f16): Likewise.
15942 (vcaddq_rot270_m_f32): Likewise.
15943 (vcaddq_rot270_m_f16): Likewise.
15944 (vcaddq_rot90_m_f32): Likewise.
15945 (vcaddq_rot90_m_f16): Likewise.
15946 (vcmlaq_m_f32): Likewise.
15947 (vcmlaq_m_f16): Likewise.
15948 (vcmlaq_rot180_m_f32): Likewise.
15949 (vcmlaq_rot180_m_f16): Likewise.
15950 (vcmlaq_rot270_m_f32): Likewise.
15951 (vcmlaq_rot270_m_f16): Likewise.
15952 (vcmlaq_rot90_m_f32): Likewise.
15953 (vcmlaq_rot90_m_f16): Likewise.
15954 (vcmulq_m_f32): Likewise.
15955 (vcmulq_m_f16): Likewise.
15956 (vcmulq_rot180_m_f32): Likewise.
15957 (vcmulq_rot180_m_f16): Likewise.
15958 (vcmulq_rot270_m_f32): Likewise.
15959 (vcmulq_rot270_m_f16): Likewise.
15960 (vcmulq_rot90_m_f32): Likewise.
15961 (vcmulq_rot90_m_f16): Likewise.
15962 (vcvtq_m_n_s32_f32): Likewise.
15963 (vcvtq_m_n_s16_f16): Likewise.
15964 (vcvtq_m_n_u32_f32): Likewise.
15965 (vcvtq_m_n_u16_f16): Likewise.
15966 (veorq_m_f32): Likewise.
15967 (veorq_m_f16): Likewise.
15968 (vfmaq_m_f32): Likewise.
15969 (vfmaq_m_f16): Likewise.
15970 (vfmaq_m_n_f32): Likewise.
15971 (vfmaq_m_n_f16): Likewise.
15972 (vfmasq_m_n_f32): Likewise.
15973 (vfmasq_m_n_f16): Likewise.
15974 (vfmsq_m_f32): Likewise.
15975 (vfmsq_m_f16): Likewise.
15976 (vmaxnmq_m_f32): Likewise.
15977 (vmaxnmq_m_f16): Likewise.
15978 (vminnmq_m_f32): Likewise.
15979 (vminnmq_m_f16): Likewise.
15980 (vmulq_m_f32): Likewise.
15981 (vmulq_m_f16): Likewise.
15982 (vmulq_m_n_f32): Likewise.
15983 (vmulq_m_n_f16): Likewise.
15984 (vornq_m_f32): Likewise.
15985 (vornq_m_f16): Likewise.
15986 (vorrq_m_f32): Likewise.
15987 (vorrq_m_f16): Likewise.
15988 (vsubq_m_f32): Likewise.
15989 (vsubq_m_f16): Likewise.
15990 (vsubq_m_n_f32): Likewise.
15991 (vsubq_m_n_f16): Likewise.
15992 (__attribute__): Likewise.
15993 (__arm_vabdq_m_f32): Likewise.
15994 (__arm_vabdq_m_f16): Likewise.
15995 (__arm_vaddq_m_f32): Likewise.
15996 (__arm_vaddq_m_f16): Likewise.
15997 (__arm_vaddq_m_n_f32): Likewise.
15998 (__arm_vaddq_m_n_f16): Likewise.
15999 (__arm_vandq_m_f32): Likewise.
16000 (__arm_vandq_m_f16): Likewise.
16001 (__arm_vbicq_m_f32): Likewise.
16002 (__arm_vbicq_m_f16): Likewise.
16003 (__arm_vbrsrq_m_n_f32): Likewise.
16004 (__arm_vbrsrq_m_n_f16): Likewise.
16005 (__arm_vcaddq_rot270_m_f32): Likewise.
16006 (__arm_vcaddq_rot270_m_f16): Likewise.
16007 (__arm_vcaddq_rot90_m_f32): Likewise.
16008 (__arm_vcaddq_rot90_m_f16): Likewise.
16009 (__arm_vcmlaq_m_f32): Likewise.
16010 (__arm_vcmlaq_m_f16): Likewise.
16011 (__arm_vcmlaq_rot180_m_f32): Likewise.
16012 (__arm_vcmlaq_rot180_m_f16): Likewise.
16013 (__arm_vcmlaq_rot270_m_f32): Likewise.
16014 (__arm_vcmlaq_rot270_m_f16): Likewise.
16015 (__arm_vcmlaq_rot90_m_f32): Likewise.
16016 (__arm_vcmlaq_rot90_m_f16): Likewise.
16017 (__arm_vcmulq_m_f32): Likewise.
16018 (__arm_vcmulq_m_f16): Likewise.
16019 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
16020 (__arm_vcmulq_rot180_m_f16): Likewise.
16021 (__arm_vcmulq_rot270_m_f32): Likewise.
16022 (__arm_vcmulq_rot270_m_f16): Likewise.
16023 (__arm_vcmulq_rot90_m_f32): Likewise.
16024 (__arm_vcmulq_rot90_m_f16): Likewise.
16025 (__arm_vcvtq_m_n_s32_f32): Likewise.
16026 (__arm_vcvtq_m_n_s16_f16): Likewise.
16027 (__arm_vcvtq_m_n_u32_f32): Likewise.
16028 (__arm_vcvtq_m_n_u16_f16): Likewise.
16029 (__arm_veorq_m_f32): Likewise.
16030 (__arm_veorq_m_f16): Likewise.
16031 (__arm_vfmaq_m_f32): Likewise.
16032 (__arm_vfmaq_m_f16): Likewise.
16033 (__arm_vfmaq_m_n_f32): Likewise.
16034 (__arm_vfmaq_m_n_f16): Likewise.
16035 (__arm_vfmasq_m_n_f32): Likewise.
16036 (__arm_vfmasq_m_n_f16): Likewise.
16037 (__arm_vfmsq_m_f32): Likewise.
16038 (__arm_vfmsq_m_f16): Likewise.
16039 (__arm_vmaxnmq_m_f32): Likewise.
16040 (__arm_vmaxnmq_m_f16): Likewise.
16041 (__arm_vminnmq_m_f32): Likewise.
16042 (__arm_vminnmq_m_f16): Likewise.
16043 (__arm_vmulq_m_f32): Likewise.
16044 (__arm_vmulq_m_f16): Likewise.
16045 (__arm_vmulq_m_n_f32): Likewise.
16046 (__arm_vmulq_m_n_f16): Likewise.
16047 (__arm_vornq_m_f32): Likewise.
16048 (__arm_vornq_m_f16): Likewise.
16049 (__arm_vorrq_m_f32): Likewise.
16050 (__arm_vorrq_m_f16): Likewise.
16051 (__arm_vsubq_m_f32): Likewise.
16052 (__arm_vsubq_m_f16): Likewise.
16053 (__arm_vsubq_m_n_f32): Likewise.
16054 (__arm_vsubq_m_n_f16): Likewise.
16055 (vabdq_m): Define polymorphic variant.
16056 (vaddq_m): Likewise.
16057 (vaddq_m_n): Likewise.
16058 (vandq_m): Likewise.
16059 (vbicq_m): Likewise.
16060 (vbrsrq_m_n): Likewise.
16061 (vcaddq_rot270_m): Likewise.
16062 (vcaddq_rot90_m): Likewise.
16063 (vcmlaq_m): Likewise.
16064 (vcmlaq_rot180_m): Likewise.
16065 (vcmlaq_rot270_m): Likewise.
16066 (vcmlaq_rot90_m): Likewise.
16067 (vcmulq_m): Likewise.
16068 (vcmulq_rot180_m): Likewise.
16069 (vcmulq_rot270_m): Likewise.
16070 (vcmulq_rot90_m): Likewise.
16071 (veorq_m): Likewise.
16072 (vfmaq_m): Likewise.
16073 (vfmaq_m_n): Likewise.
16074 (vfmasq_m_n): Likewise.
16075 (vfmsq_m): Likewise.
16076 (vmaxnmq_m): Likewise.
16077 (vminnmq_m): Likewise.
16078 (vmulq_m): Likewise.
16079 (vmulq_m_n): Likewise.
16080 (vornq_m): Likewise.
16081 (vsubq_m): Likewise.
16082 (vsubq_m_n): Likewise.
16083 (vorrq_m): Likewise.
16084 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
16086 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
16087 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
16088 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
16089 (mve_vaddq_m_f<mode>): Likewise.
16090 (mve_vaddq_m_n_f<mode>): Likewise.
16091 (mve_vandq_m_f<mode>): Likewise.
16092 (mve_vbicq_m_f<mode>): Likewise.
16093 (mve_vbrsrq_m_n_f<mode>): Likewise.
16094 (mve_vcaddq_rot270_m_f<mode>): Likewise.
16095 (mve_vcaddq_rot90_m_f<mode>): Likewise.
16096 (mve_vcmlaq_m_f<mode>): Likewise.
16097 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
16098 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
16099 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
16100 (mve_vcmulq_m_f<mode>): Likewise.
16101 (mve_vcmulq_rot180_m_f<mode>): Likewise.
16102 (mve_vcmulq_rot270_m_f<mode>): Likewise.
16103 (mve_vcmulq_rot90_m_f<mode>): Likewise.
16104 (mve_veorq_m_f<mode>): Likewise.
16105 (mve_vfmaq_m_f<mode>): Likewise.
16106 (mve_vfmaq_m_n_f<mode>): Likewise.
16107 (mve_vfmasq_m_n_f<mode>): Likewise.
16108 (mve_vfmsq_m_f<mode>): Likewise.
16109 (mve_vmaxnmq_m_f<mode>): Likewise.
16110 (mve_vminnmq_m_f<mode>): Likewise.
16111 (mve_vmulq_m_f<mode>): Likewise.
16112 (mve_vmulq_m_n_f<mode>): Likewise.
16113 (mve_vornq_m_f<mode>): Likewise.
16114 (mve_vorrq_m_f<mode>): Likewise.
16115 (mve_vsubq_m_f<mode>): Likewise.
16116 (mve_vsubq_m_n_f<mode>): Likewise.
16118 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16119 Mihail Ionescu <mihail.ionescu@arm.com>
16120 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16122 * config/arm/arm-protos.h (arm_mve_immediate_check):
16123 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
16124 mode and interger value.
16125 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
16126 (vmlaldavaq_p_s16): Likewise.
16127 (vmlaldavaq_p_u32): Likewise.
16128 (vmlaldavaq_p_u16): Likewise.
16129 (vmlaldavaxq_p_s32): Likewise.
16130 (vmlaldavaxq_p_s16): Likewise.
16131 (vmlaldavaxq_p_u32): Likewise.
16132 (vmlaldavaxq_p_u16): Likewise.
16133 (vmlsldavaq_p_s32): Likewise.
16134 (vmlsldavaq_p_s16): Likewise.
16135 (vmlsldavaxq_p_s32): Likewise.
16136 (vmlsldavaxq_p_s16): Likewise.
16137 (vmullbq_poly_m_p8): Likewise.
16138 (vmullbq_poly_m_p16): Likewise.
16139 (vmulltq_poly_m_p8): Likewise.
16140 (vmulltq_poly_m_p16): Likewise.
16141 (vqdmullbq_m_n_s32): Likewise.
16142 (vqdmullbq_m_n_s16): Likewise.
16143 (vqdmullbq_m_s32): Likewise.
16144 (vqdmullbq_m_s16): Likewise.
16145 (vqdmulltq_m_n_s32): Likewise.
16146 (vqdmulltq_m_n_s16): Likewise.
16147 (vqdmulltq_m_s32): Likewise.
16148 (vqdmulltq_m_s16): Likewise.
16149 (vqrshrnbq_m_n_s32): Likewise.
16150 (vqrshrnbq_m_n_s16): Likewise.
16151 (vqrshrnbq_m_n_u32): Likewise.
16152 (vqrshrnbq_m_n_u16): Likewise.
16153 (vqrshrntq_m_n_s32): Likewise.
16154 (vqrshrntq_m_n_s16): Likewise.
16155 (vqrshrntq_m_n_u32): Likewise.
16156 (vqrshrntq_m_n_u16): Likewise.
16157 (vqrshrunbq_m_n_s32): Likewise.
16158 (vqrshrunbq_m_n_s16): Likewise.
16159 (vqrshruntq_m_n_s32): Likewise.
16160 (vqrshruntq_m_n_s16): Likewise.
16161 (vqshrnbq_m_n_s32): Likewise.
16162 (vqshrnbq_m_n_s16): Likewise.
16163 (vqshrnbq_m_n_u32): Likewise.
16164 (vqshrnbq_m_n_u16): Likewise.
16165 (vqshrntq_m_n_s32): Likewise.
16166 (vqshrntq_m_n_s16): Likewise.
16167 (vqshrntq_m_n_u32): Likewise.
16168 (vqshrntq_m_n_u16): Likewise.
16169 (vqshrunbq_m_n_s32): Likewise.
16170 (vqshrunbq_m_n_s16): Likewise.
16171 (vqshruntq_m_n_s32): Likewise.
16172 (vqshruntq_m_n_s16): Likewise.
16173 (vrmlaldavhaq_p_s32): Likewise.
16174 (vrmlaldavhaq_p_u32): Likewise.
16175 (vrmlaldavhaxq_p_s32): Likewise.
16176 (vrmlsldavhaq_p_s32): Likewise.
16177 (vrmlsldavhaxq_p_s32): Likewise.
16178 (vrshrnbq_m_n_s32): Likewise.
16179 (vrshrnbq_m_n_s16): Likewise.
16180 (vrshrnbq_m_n_u32): Likewise.
16181 (vrshrnbq_m_n_u16): Likewise.
16182 (vrshrntq_m_n_s32): Likewise.
16183 (vrshrntq_m_n_s16): Likewise.
16184 (vrshrntq_m_n_u32): Likewise.
16185 (vrshrntq_m_n_u16): Likewise.
16186 (vshllbq_m_n_s8): Likewise.
16187 (vshllbq_m_n_s16): Likewise.
16188 (vshllbq_m_n_u8): Likewise.
16189 (vshllbq_m_n_u16): Likewise.
16190 (vshlltq_m_n_s8): Likewise.
16191 (vshlltq_m_n_s16): Likewise.
16192 (vshlltq_m_n_u8): Likewise.
16193 (vshlltq_m_n_u16): Likewise.
16194 (vshrnbq_m_n_s32): Likewise.
16195 (vshrnbq_m_n_s16): Likewise.
16196 (vshrnbq_m_n_u32): Likewise.
16197 (vshrnbq_m_n_u16): Likewise.
16198 (vshrntq_m_n_s32): Likewise.
16199 (vshrntq_m_n_s16): Likewise.
16200 (vshrntq_m_n_u32): Likewise.
16201 (vshrntq_m_n_u16): Likewise.
16202 (__arm_vmlaldavaq_p_s32): Define intrinsic.
16203 (__arm_vmlaldavaq_p_s16): Likewise.
16204 (__arm_vmlaldavaq_p_u32): Likewise.
16205 (__arm_vmlaldavaq_p_u16): Likewise.
16206 (__arm_vmlaldavaxq_p_s32): Likewise.
16207 (__arm_vmlaldavaxq_p_s16): Likewise.
16208 (__arm_vmlaldavaxq_p_u32): Likewise.
16209 (__arm_vmlaldavaxq_p_u16): Likewise.
16210 (__arm_vmlsldavaq_p_s32): Likewise.
16211 (__arm_vmlsldavaq_p_s16): Likewise.
16212 (__arm_vmlsldavaxq_p_s32): Likewise.
16213 (__arm_vmlsldavaxq_p_s16): Likewise.
16214 (__arm_vmullbq_poly_m_p8): Likewise.
16215 (__arm_vmullbq_poly_m_p16): Likewise.
16216 (__arm_vmulltq_poly_m_p8): Likewise.
16217 (__arm_vmulltq_poly_m_p16): Likewise.
16218 (__arm_vqdmullbq_m_n_s32): Likewise.
16219 (__arm_vqdmullbq_m_n_s16): Likewise.
16220 (__arm_vqdmullbq_m_s32): Likewise.
16221 (__arm_vqdmullbq_m_s16): Likewise.
16222 (__arm_vqdmulltq_m_n_s32): Likewise.
16223 (__arm_vqdmulltq_m_n_s16): Likewise.
16224 (__arm_vqdmulltq_m_s32): Likewise.
16225 (__arm_vqdmulltq_m_s16): Likewise.
16226 (__arm_vqrshrnbq_m_n_s32): Likewise.
16227 (__arm_vqrshrnbq_m_n_s16): Likewise.
16228 (__arm_vqrshrnbq_m_n_u32): Likewise.
16229 (__arm_vqrshrnbq_m_n_u16): Likewise.
16230 (__arm_vqrshrntq_m_n_s32): Likewise.
16231 (__arm_vqrshrntq_m_n_s16): Likewise.
16232 (__arm_vqrshrntq_m_n_u32): Likewise.
16233 (__arm_vqrshrntq_m_n_u16): Likewise.
16234 (__arm_vqrshrunbq_m_n_s32): Likewise.
16235 (__arm_vqrshrunbq_m_n_s16): Likewise.
16236 (__arm_vqrshruntq_m_n_s32): Likewise.
16237 (__arm_vqrshruntq_m_n_s16): Likewise.
16238 (__arm_vqshrnbq_m_n_s32): Likewise.
16239 (__arm_vqshrnbq_m_n_s16): Likewise.
16240 (__arm_vqshrnbq_m_n_u32): Likewise.
16241 (__arm_vqshrnbq_m_n_u16): Likewise.
16242 (__arm_vqshrntq_m_n_s32): Likewise.
16243 (__arm_vqshrntq_m_n_s16): Likewise.
16244 (__arm_vqshrntq_m_n_u32): Likewise.
16245 (__arm_vqshrntq_m_n_u16): Likewise.
16246 (__arm_vqshrunbq_m_n_s32): Likewise.
16247 (__arm_vqshrunbq_m_n_s16): Likewise.
16248 (__arm_vqshruntq_m_n_s32): Likewise.
16249 (__arm_vqshruntq_m_n_s16): Likewise.
16250 (__arm_vrmlaldavhaq_p_s32): Likewise.
16251 (__arm_vrmlaldavhaq_p_u32): Likewise.
16252 (__arm_vrmlaldavhaxq_p_s32): Likewise.
16253 (__arm_vrmlsldavhaq_p_s32): Likewise.
16254 (__arm_vrmlsldavhaxq_p_s32): Likewise.
16255 (__arm_vrshrnbq_m_n_s32): Likewise.
16256 (__arm_vrshrnbq_m_n_s16): Likewise.
16257 (__arm_vrshrnbq_m_n_u32): Likewise.
16258 (__arm_vrshrnbq_m_n_u16): Likewise.
16259 (__arm_vrshrntq_m_n_s32): Likewise.
16260 (__arm_vrshrntq_m_n_s16): Likewise.
16261 (__arm_vrshrntq_m_n_u32): Likewise.
16262 (__arm_vrshrntq_m_n_u16): Likewise.
16263 (__arm_vshllbq_m_n_s8): Likewise.
16264 (__arm_vshllbq_m_n_s16): Likewise.
16265 (__arm_vshllbq_m_n_u8): Likewise.
16266 (__arm_vshllbq_m_n_u16): Likewise.
16267 (__arm_vshlltq_m_n_s8): Likewise.
16268 (__arm_vshlltq_m_n_s16): Likewise.
16269 (__arm_vshlltq_m_n_u8): Likewise.
16270 (__arm_vshlltq_m_n_u16): Likewise.
16271 (__arm_vshrnbq_m_n_s32): Likewise.
16272 (__arm_vshrnbq_m_n_s16): Likewise.
16273 (__arm_vshrnbq_m_n_u32): Likewise.
16274 (__arm_vshrnbq_m_n_u16): Likewise.
16275 (__arm_vshrntq_m_n_s32): Likewise.
16276 (__arm_vshrntq_m_n_s16): Likewise.
16277 (__arm_vshrntq_m_n_u32): Likewise.
16278 (__arm_vshrntq_m_n_u16): Likewise.
16279 (vmullbq_poly_m): Define polymorphic variant.
16280 (vmulltq_poly_m): Likewise.
16281 (vshllbq_m): Likewise.
16282 (vshrntq_m_n): Likewise.
16283 (vshrnbq_m_n): Likewise.
16284 (vshlltq_m_n): Likewise.
16285 (vshllbq_m_n): Likewise.
16286 (vrshrntq_m_n): Likewise.
16287 (vrshrnbq_m_n): Likewise.
16288 (vqshruntq_m_n): Likewise.
16289 (vqshrunbq_m_n): Likewise.
16290 (vqdmullbq_m_n): Likewise.
16291 (vqdmullbq_m): Likewise.
16292 (vqdmulltq_m_n): Likewise.
16293 (vqdmulltq_m): Likewise.
16294 (vqrshrnbq_m_n): Likewise.
16295 (vqrshrntq_m_n): Likewise.
16296 (vqrshrunbq_m_n): Likewise.
16297 (vqrshruntq_m_n): Likewise.
16298 (vqshrnbq_m_n): Likewise.
16299 (vqshrntq_m_n): Likewise.
16300 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
16301 builtin qualifiers.
16302 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
16303 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
16304 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
16305 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
16306 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
16307 (VMLALDAVAXQ_P): Likewise.
16308 (VQRSHRNBQ_M_N): Likewise.
16309 (VQRSHRNTQ_M_N): Likewise.
16310 (VQSHRNBQ_M_N): Likewise.
16311 (VQSHRNTQ_M_N): Likewise.
16312 (VRSHRNBQ_M_N): Likewise.
16313 (VRSHRNTQ_M_N): Likewise.
16314 (VSHLLBQ_M_N): Likewise.
16315 (VSHLLTQ_M_N): Likewise.
16316 (VSHRNBQ_M_N): Likewise.
16317 (VSHRNTQ_M_N): Likewise.
16318 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
16319 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
16320 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
16321 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
16322 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
16323 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
16324 (mve_vrmlaldavhaq_p_sv4si): Likewise.
16325 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
16326 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
16327 (mve_vshllbq_m_n_<supf><mode>): Likewise.
16328 (mve_vshlltq_m_n_<supf><mode>): Likewise.
16329 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
16330 (mve_vshrntq_m_n_<supf><mode>): Likewise.
16331 (mve_vmlsldavaq_p_s<mode>): Likewise.
16332 (mve_vmlsldavaxq_p_s<mode>): Likewise.
16333 (mve_vmullbq_poly_m_p<mode>): Likewise.
16334 (mve_vmulltq_poly_m_p<mode>): Likewise.
16335 (mve_vqdmullbq_m_n_s<mode>): Likewise.
16336 (mve_vqdmullbq_m_s<mode>): Likewise.
16337 (mve_vqdmulltq_m_n_s<mode>): Likewise.
16338 (mve_vqdmulltq_m_s<mode>): Likewise.
16339 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
16340 (mve_vqrshruntq_m_n_s<mode>): Likewise.
16341 (mve_vqshrunbq_m_n_s<mode>): Likewise.
16342 (mve_vqshruntq_m_n_s<mode>): Likewise.
16343 (mve_vrmlaldavhaq_p_uv4si): Likewise.
16344 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
16345 (mve_vrmlsldavhaq_p_sv4si): Likewise.
16346 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
16348 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16349 Mihail Ionescu <mihail.ionescu@arm.com>
16350 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16352 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
16353 (vabdq_m_s32): Likewise.
16354 (vabdq_m_s16): Likewise.
16355 (vabdq_m_u8): Likewise.
16356 (vabdq_m_u32): Likewise.
16357 (vabdq_m_u16): Likewise.
16358 (vaddq_m_n_s8): Likewise.
16359 (vaddq_m_n_s32): Likewise.
16360 (vaddq_m_n_s16): Likewise.
16361 (vaddq_m_n_u8): Likewise.
16362 (vaddq_m_n_u32): Likewise.
16363 (vaddq_m_n_u16): Likewise.
16364 (vaddq_m_s8): Likewise.
16365 (vaddq_m_s32): Likewise.
16366 (vaddq_m_s16): Likewise.
16367 (vaddq_m_u8): Likewise.
16368 (vaddq_m_u32): Likewise.
16369 (vaddq_m_u16): Likewise.
16370 (vandq_m_s8): Likewise.
16371 (vandq_m_s32): Likewise.
16372 (vandq_m_s16): Likewise.
16373 (vandq_m_u8): Likewise.
16374 (vandq_m_u32): Likewise.
16375 (vandq_m_u16): Likewise.
16376 (vbicq_m_s8): Likewise.
16377 (vbicq_m_s32): Likewise.
16378 (vbicq_m_s16): Likewise.
16379 (vbicq_m_u8): Likewise.
16380 (vbicq_m_u32): Likewise.
16381 (vbicq_m_u16): Likewise.
16382 (vbrsrq_m_n_s8): Likewise.
16383 (vbrsrq_m_n_s32): Likewise.
16384 (vbrsrq_m_n_s16): Likewise.
16385 (vbrsrq_m_n_u8): Likewise.
16386 (vbrsrq_m_n_u32): Likewise.
16387 (vbrsrq_m_n_u16): Likewise.
16388 (vcaddq_rot270_m_s8): Likewise.
16389 (vcaddq_rot270_m_s32): Likewise.
16390 (vcaddq_rot270_m_s16): Likewise.
16391 (vcaddq_rot270_m_u8): Likewise.
16392 (vcaddq_rot270_m_u32): Likewise.
16393 (vcaddq_rot270_m_u16): Likewise.
16394 (vcaddq_rot90_m_s8): Likewise.
16395 (vcaddq_rot90_m_s32): Likewise.
16396 (vcaddq_rot90_m_s16): Likewise.
16397 (vcaddq_rot90_m_u8): Likewise.
16398 (vcaddq_rot90_m_u32): Likewise.
16399 (vcaddq_rot90_m_u16): Likewise.
16400 (veorq_m_s8): Likewise.
16401 (veorq_m_s32): Likewise.
16402 (veorq_m_s16): Likewise.
16403 (veorq_m_u8): Likewise.
16404 (veorq_m_u32): Likewise.
16405 (veorq_m_u16): Likewise.
16406 (vhaddq_m_n_s8): Likewise.
16407 (vhaddq_m_n_s32): Likewise.
16408 (vhaddq_m_n_s16): Likewise.
16409 (vhaddq_m_n_u8): Likewise.
16410 (vhaddq_m_n_u32): Likewise.
16411 (vhaddq_m_n_u16): Likewise.
16412 (vhaddq_m_s8): Likewise.
16413 (vhaddq_m_s32): Likewise.
16414 (vhaddq_m_s16): Likewise.
16415 (vhaddq_m_u8): Likewise.
16416 (vhaddq_m_u32): Likewise.
16417 (vhaddq_m_u16): Likewise.
16418 (vhcaddq_rot270_m_s8): Likewise.
16419 (vhcaddq_rot270_m_s32): Likewise.
16420 (vhcaddq_rot270_m_s16): Likewise.
16421 (vhcaddq_rot90_m_s8): Likewise.
16422 (vhcaddq_rot90_m_s32): Likewise.
16423 (vhcaddq_rot90_m_s16): Likewise.
16424 (vhsubq_m_n_s8): Likewise.
16425 (vhsubq_m_n_s32): Likewise.
16426 (vhsubq_m_n_s16): Likewise.
16427 (vhsubq_m_n_u8): Likewise.
16428 (vhsubq_m_n_u32): Likewise.
16429 (vhsubq_m_n_u16): Likewise.
16430 (vhsubq_m_s8): Likewise.
16431 (vhsubq_m_s32): Likewise.
16432 (vhsubq_m_s16): Likewise.
16433 (vhsubq_m_u8): Likewise.
16434 (vhsubq_m_u32): Likewise.
16435 (vhsubq_m_u16): Likewise.
16436 (vmaxq_m_s8): Likewise.
16437 (vmaxq_m_s32): Likewise.
16438 (vmaxq_m_s16): Likewise.
16439 (vmaxq_m_u8): Likewise.
16440 (vmaxq_m_u32): Likewise.
16441 (vmaxq_m_u16): Likewise.
16442 (vminq_m_s8): Likewise.
16443 (vminq_m_s32): Likewise.
16444 (vminq_m_s16): Likewise.
16445 (vminq_m_u8): Likewise.
16446 (vminq_m_u32): Likewise.
16447 (vminq_m_u16): Likewise.
16448 (vmladavaq_p_s8): Likewise.
16449 (vmladavaq_p_s32): Likewise.
16450 (vmladavaq_p_s16): Likewise.
16451 (vmladavaq_p_u8): Likewise.
16452 (vmladavaq_p_u32): Likewise.
16453 (vmladavaq_p_u16): Likewise.
16454 (vmladavaxq_p_s8): Likewise.
16455 (vmladavaxq_p_s32): Likewise.
16456 (vmladavaxq_p_s16): Likewise.
16457 (vmlaq_m_n_s8): Likewise.
16458 (vmlaq_m_n_s32): Likewise.
16459 (vmlaq_m_n_s16): Likewise.
16460 (vmlaq_m_n_u8): Likewise.
16461 (vmlaq_m_n_u32): Likewise.
16462 (vmlaq_m_n_u16): Likewise.
16463 (vmlasq_m_n_s8): Likewise.
16464 (vmlasq_m_n_s32): Likewise.
16465 (vmlasq_m_n_s16): Likewise.
16466 (vmlasq_m_n_u8): Likewise.
16467 (vmlasq_m_n_u32): Likewise.
16468 (vmlasq_m_n_u16): Likewise.
16469 (vmlsdavaq_p_s8): Likewise.
16470 (vmlsdavaq_p_s32): Likewise.
16471 (vmlsdavaq_p_s16): Likewise.
16472 (vmlsdavaxq_p_s8): Likewise.
16473 (vmlsdavaxq_p_s32): Likewise.
16474 (vmlsdavaxq_p_s16): Likewise.
16475 (vmulhq_m_s8): Likewise.
16476 (vmulhq_m_s32): Likewise.
16477 (vmulhq_m_s16): Likewise.
16478 (vmulhq_m_u8): Likewise.
16479 (vmulhq_m_u32): Likewise.
16480 (vmulhq_m_u16): Likewise.
16481 (vmullbq_int_m_s8): Likewise.
16482 (vmullbq_int_m_s32): Likewise.
16483 (vmullbq_int_m_s16): Likewise.
16484 (vmullbq_int_m_u8): Likewise.
16485 (vmullbq_int_m_u32): Likewise.
16486 (vmullbq_int_m_u16): Likewise.
16487 (vmulltq_int_m_s8): Likewise.
16488 (vmulltq_int_m_s32): Likewise.
16489 (vmulltq_int_m_s16): Likewise.
16490 (vmulltq_int_m_u8): Likewise.
16491 (vmulltq_int_m_u32): Likewise.
16492 (vmulltq_int_m_u16): Likewise.
16493 (vmulq_m_n_s8): Likewise.
16494 (vmulq_m_n_s32): Likewise.
16495 (vmulq_m_n_s16): Likewise.
16496 (vmulq_m_n_u8): Likewise.
16497 (vmulq_m_n_u32): Likewise.
16498 (vmulq_m_n_u16): Likewise.
16499 (vmulq_m_s8): Likewise.
16500 (vmulq_m_s32): Likewise.
16501 (vmulq_m_s16): Likewise.
16502 (vmulq_m_u8): Likewise.
16503 (vmulq_m_u32): Likewise.
16504 (vmulq_m_u16): Likewise.
16505 (vornq_m_s8): Likewise.
16506 (vornq_m_s32): Likewise.
16507 (vornq_m_s16): Likewise.
16508 (vornq_m_u8): Likewise.
16509 (vornq_m_u32): Likewise.
16510 (vornq_m_u16): Likewise.
16511 (vorrq_m_s8): Likewise.
16512 (vorrq_m_s32): Likewise.
16513 (vorrq_m_s16): Likewise.
16514 (vorrq_m_u8): Likewise.
16515 (vorrq_m_u32): Likewise.
16516 (vorrq_m_u16): Likewise.
16517 (vqaddq_m_n_s8): Likewise.
16518 (vqaddq_m_n_s32): Likewise.
16519 (vqaddq_m_n_s16): Likewise.
16520 (vqaddq_m_n_u8): Likewise.
16521 (vqaddq_m_n_u32): Likewise.
16522 (vqaddq_m_n_u16): Likewise.
16523 (vqaddq_m_s8): Likewise.
16524 (vqaddq_m_s32): Likewise.
16525 (vqaddq_m_s16): Likewise.
16526 (vqaddq_m_u8): Likewise.
16527 (vqaddq_m_u32): Likewise.
16528 (vqaddq_m_u16): Likewise.
16529 (vqdmladhq_m_s8): Likewise.
16530 (vqdmladhq_m_s32): Likewise.
16531 (vqdmladhq_m_s16): Likewise.
16532 (vqdmladhxq_m_s8): Likewise.
16533 (vqdmladhxq_m_s32): Likewise.
16534 (vqdmladhxq_m_s16): Likewise.
16535 (vqdmlahq_m_n_s8): Likewise.
16536 (vqdmlahq_m_n_s32): Likewise.
16537 (vqdmlahq_m_n_s16): Likewise.
16538 (vqdmlahq_m_n_u8): Likewise.
16539 (vqdmlahq_m_n_u32): Likewise.
16540 (vqdmlahq_m_n_u16): Likewise.
16541 (vqdmlsdhq_m_s8): Likewise.
16542 (vqdmlsdhq_m_s32): Likewise.
16543 (vqdmlsdhq_m_s16): Likewise.
16544 (vqdmlsdhxq_m_s8): Likewise.
16545 (vqdmlsdhxq_m_s32): Likewise.
16546 (vqdmlsdhxq_m_s16): Likewise.
16547 (vqdmulhq_m_n_s8): Likewise.
16548 (vqdmulhq_m_n_s32): Likewise.
16549 (vqdmulhq_m_n_s16): Likewise.
16550 (vqdmulhq_m_s8): Likewise.
16551 (vqdmulhq_m_s32): Likewise.
16552 (vqdmulhq_m_s16): Likewise.
16553 (vqrdmladhq_m_s8): Likewise.
16554 (vqrdmladhq_m_s32): Likewise.
16555 (vqrdmladhq_m_s16): Likewise.
16556 (vqrdmladhxq_m_s8): Likewise.
16557 (vqrdmladhxq_m_s32): Likewise.
16558 (vqrdmladhxq_m_s16): Likewise.
16559 (vqrdmlahq_m_n_s8): Likewise.
16560 (vqrdmlahq_m_n_s32): Likewise.
16561 (vqrdmlahq_m_n_s16): Likewise.
16562 (vqrdmlahq_m_n_u8): Likewise.
16563 (vqrdmlahq_m_n_u32): Likewise.
16564 (vqrdmlahq_m_n_u16): Likewise.
16565 (vqrdmlashq_m_n_s8): Likewise.
16566 (vqrdmlashq_m_n_s32): Likewise.
16567 (vqrdmlashq_m_n_s16): Likewise.
16568 (vqrdmlashq_m_n_u8): Likewise.
16569 (vqrdmlashq_m_n_u32): Likewise.
16570 (vqrdmlashq_m_n_u16): Likewise.
16571 (vqrdmlsdhq_m_s8): Likewise.
16572 (vqrdmlsdhq_m_s32): Likewise.
16573 (vqrdmlsdhq_m_s16): Likewise.
16574 (vqrdmlsdhxq_m_s8): Likewise.
16575 (vqrdmlsdhxq_m_s32): Likewise.
16576 (vqrdmlsdhxq_m_s16): Likewise.
16577 (vqrdmulhq_m_n_s8): Likewise.
16578 (vqrdmulhq_m_n_s32): Likewise.
16579 (vqrdmulhq_m_n_s16): Likewise.
16580 (vqrdmulhq_m_s8): Likewise.
16581 (vqrdmulhq_m_s32): Likewise.
16582 (vqrdmulhq_m_s16): Likewise.
16583 (vqrshlq_m_s8): Likewise.
16584 (vqrshlq_m_s32): Likewise.
16585 (vqrshlq_m_s16): Likewise.
16586 (vqrshlq_m_u8): Likewise.
16587 (vqrshlq_m_u32): Likewise.
16588 (vqrshlq_m_u16): Likewise.
16589 (vqshlq_m_n_s8): Likewise.
16590 (vqshlq_m_n_s32): Likewise.
16591 (vqshlq_m_n_s16): Likewise.
16592 (vqshlq_m_n_u8): Likewise.
16593 (vqshlq_m_n_u32): Likewise.
16594 (vqshlq_m_n_u16): Likewise.
16595 (vqshlq_m_s8): Likewise.
16596 (vqshlq_m_s32): Likewise.
16597 (vqshlq_m_s16): Likewise.
16598 (vqshlq_m_u8): Likewise.
16599 (vqshlq_m_u32): Likewise.
16600 (vqshlq_m_u16): Likewise.
16601 (vqsubq_m_n_s8): Likewise.
16602 (vqsubq_m_n_s32): Likewise.
16603 (vqsubq_m_n_s16): Likewise.
16604 (vqsubq_m_n_u8): Likewise.
16605 (vqsubq_m_n_u32): Likewise.
16606 (vqsubq_m_n_u16): Likewise.
16607 (vqsubq_m_s8): Likewise.
16608 (vqsubq_m_s32): Likewise.
16609 (vqsubq_m_s16): Likewise.
16610 (vqsubq_m_u8): Likewise.
16611 (vqsubq_m_u32): Likewise.
16612 (vqsubq_m_u16): Likewise.
16613 (vrhaddq_m_s8): Likewise.
16614 (vrhaddq_m_s32): Likewise.
16615 (vrhaddq_m_s16): Likewise.
16616 (vrhaddq_m_u8): Likewise.
16617 (vrhaddq_m_u32): Likewise.
16618 (vrhaddq_m_u16): Likewise.
16619 (vrmulhq_m_s8): Likewise.
16620 (vrmulhq_m_s32): Likewise.
16621 (vrmulhq_m_s16): Likewise.
16622 (vrmulhq_m_u8): Likewise.
16623 (vrmulhq_m_u32): Likewise.
16624 (vrmulhq_m_u16): Likewise.
16625 (vrshlq_m_s8): Likewise.
16626 (vrshlq_m_s32): Likewise.
16627 (vrshlq_m_s16): Likewise.
16628 (vrshlq_m_u8): Likewise.
16629 (vrshlq_m_u32): Likewise.
16630 (vrshlq_m_u16): Likewise.
16631 (vrshrq_m_n_s8): Likewise.
16632 (vrshrq_m_n_s32): Likewise.
16633 (vrshrq_m_n_s16): Likewise.
16634 (vrshrq_m_n_u8): Likewise.
16635 (vrshrq_m_n_u32): Likewise.
16636 (vrshrq_m_n_u16): Likewise.
16637 (vshlq_m_n_s8): Likewise.
16638 (vshlq_m_n_s32): Likewise.
16639 (vshlq_m_n_s16): Likewise.
16640 (vshlq_m_n_u8): Likewise.
16641 (vshlq_m_n_u32): Likewise.
16642 (vshlq_m_n_u16): Likewise.
16643 (vshrq_m_n_s8): Likewise.
16644 (vshrq_m_n_s32): Likewise.
16645 (vshrq_m_n_s16): Likewise.
16646 (vshrq_m_n_u8): Likewise.
16647 (vshrq_m_n_u32): Likewise.
16648 (vshrq_m_n_u16): Likewise.
16649 (vsliq_m_n_s8): Likewise.
16650 (vsliq_m_n_s32): Likewise.
16651 (vsliq_m_n_s16): Likewise.
16652 (vsliq_m_n_u8): Likewise.
16653 (vsliq_m_n_u32): Likewise.
16654 (vsliq_m_n_u16): Likewise.
16655 (vsubq_m_n_s8): Likewise.
16656 (vsubq_m_n_s32): Likewise.
16657 (vsubq_m_n_s16): Likewise.
16658 (vsubq_m_n_u8): Likewise.
16659 (vsubq_m_n_u32): Likewise.
16660 (vsubq_m_n_u16): Likewise.
16661 (__arm_vabdq_m_s8): Define intrinsic.
16662 (__arm_vabdq_m_s32): Likewise.
16663 (__arm_vabdq_m_s16): Likewise.
16664 (__arm_vabdq_m_u8): Likewise.
16665 (__arm_vabdq_m_u32): Likewise.
16666 (__arm_vabdq_m_u16): Likewise.
16667 (__arm_vaddq_m_n_s8): Likewise.
16668 (__arm_vaddq_m_n_s32): Likewise.
16669 (__arm_vaddq_m_n_s16): Likewise.
16670 (__arm_vaddq_m_n_u8): Likewise.
16671 (__arm_vaddq_m_n_u32): Likewise.
16672 (__arm_vaddq_m_n_u16): Likewise.
16673 (__arm_vaddq_m_s8): Likewise.
16674 (__arm_vaddq_m_s32): Likewise.
16675 (__arm_vaddq_m_s16): Likewise.
16676 (__arm_vaddq_m_u8): Likewise.
16677 (__arm_vaddq_m_u32): Likewise.
16678 (__arm_vaddq_m_u16): Likewise.
16679 (__arm_vandq_m_s8): Likewise.
16680 (__arm_vandq_m_s32): Likewise.
16681 (__arm_vandq_m_s16): Likewise.
16682 (__arm_vandq_m_u8): Likewise.
16683 (__arm_vandq_m_u32): Likewise.
16684 (__arm_vandq_m_u16): Likewise.
16685 (__arm_vbicq_m_s8): Likewise.
16686 (__arm_vbicq_m_s32): Likewise.
16687 (__arm_vbicq_m_s16): Likewise.
16688 (__arm_vbicq_m_u8): Likewise.
16689 (__arm_vbicq_m_u32): Likewise.
16690 (__arm_vbicq_m_u16): Likewise.
16691 (__arm_vbrsrq_m_n_s8): Likewise.
16692 (__arm_vbrsrq_m_n_s32): Likewise.
16693 (__arm_vbrsrq_m_n_s16): Likewise.
16694 (__arm_vbrsrq_m_n_u8): Likewise.
16695 (__arm_vbrsrq_m_n_u32): Likewise.
16696 (__arm_vbrsrq_m_n_u16): Likewise.
16697 (__arm_vcaddq_rot270_m_s8): Likewise.
16698 (__arm_vcaddq_rot270_m_s32): Likewise.
16699 (__arm_vcaddq_rot270_m_s16): Likewise.
16700 (__arm_vcaddq_rot270_m_u8): Likewise.
16701 (__arm_vcaddq_rot270_m_u32): Likewise.
16702 (__arm_vcaddq_rot270_m_u16): Likewise.
16703 (__arm_vcaddq_rot90_m_s8): Likewise.
16704 (__arm_vcaddq_rot90_m_s32): Likewise.
16705 (__arm_vcaddq_rot90_m_s16): Likewise.
16706 (__arm_vcaddq_rot90_m_u8): Likewise.
16707 (__arm_vcaddq_rot90_m_u32): Likewise.
16708 (__arm_vcaddq_rot90_m_u16): Likewise.
16709 (__arm_veorq_m_s8): Likewise.
16710 (__arm_veorq_m_s32): Likewise.
16711 (__arm_veorq_m_s16): Likewise.
16712 (__arm_veorq_m_u8): Likewise.
16713 (__arm_veorq_m_u32): Likewise.
16714 (__arm_veorq_m_u16): Likewise.
16715 (__arm_vhaddq_m_n_s8): Likewise.
16716 (__arm_vhaddq_m_n_s32): Likewise.
16717 (__arm_vhaddq_m_n_s16): Likewise.
16718 (__arm_vhaddq_m_n_u8): Likewise.
16719 (__arm_vhaddq_m_n_u32): Likewise.
16720 (__arm_vhaddq_m_n_u16): Likewise.
16721 (__arm_vhaddq_m_s8): Likewise.
16722 (__arm_vhaddq_m_s32): Likewise.
16723 (__arm_vhaddq_m_s16): Likewise.
16724 (__arm_vhaddq_m_u8): Likewise.
16725 (__arm_vhaddq_m_u32): Likewise.
16726 (__arm_vhaddq_m_u16): Likewise.
16727 (__arm_vhcaddq_rot270_m_s8): Likewise.
16728 (__arm_vhcaddq_rot270_m_s32): Likewise.
16729 (__arm_vhcaddq_rot270_m_s16): Likewise.
16730 (__arm_vhcaddq_rot90_m_s8): Likewise.
16731 (__arm_vhcaddq_rot90_m_s32): Likewise.
16732 (__arm_vhcaddq_rot90_m_s16): Likewise.
16733 (__arm_vhsubq_m_n_s8): Likewise.
16734 (__arm_vhsubq_m_n_s32): Likewise.
16735 (__arm_vhsubq_m_n_s16): Likewise.
16736 (__arm_vhsubq_m_n_u8): Likewise.
16737 (__arm_vhsubq_m_n_u32): Likewise.
16738 (__arm_vhsubq_m_n_u16): Likewise.
16739 (__arm_vhsubq_m_s8): Likewise.
16740 (__arm_vhsubq_m_s32): Likewise.
16741 (__arm_vhsubq_m_s16): Likewise.
16742 (__arm_vhsubq_m_u8): Likewise.
16743 (__arm_vhsubq_m_u32): Likewise.
16744 (__arm_vhsubq_m_u16): Likewise.
16745 (__arm_vmaxq_m_s8): Likewise.
16746 (__arm_vmaxq_m_s32): Likewise.
16747 (__arm_vmaxq_m_s16): Likewise.
16748 (__arm_vmaxq_m_u8): Likewise.
16749 (__arm_vmaxq_m_u32): Likewise.
16750 (__arm_vmaxq_m_u16): Likewise.
16751 (__arm_vminq_m_s8): Likewise.
16752 (__arm_vminq_m_s32): Likewise.
16753 (__arm_vminq_m_s16): Likewise.
16754 (__arm_vminq_m_u8): Likewise.
16755 (__arm_vminq_m_u32): Likewise.
16756 (__arm_vminq_m_u16): Likewise.
16757 (__arm_vmladavaq_p_s8): Likewise.
16758 (__arm_vmladavaq_p_s32): Likewise.
16759 (__arm_vmladavaq_p_s16): Likewise.
16760 (__arm_vmladavaq_p_u8): Likewise.
16761 (__arm_vmladavaq_p_u32): Likewise.
16762 (__arm_vmladavaq_p_u16): Likewise.
16763 (__arm_vmladavaxq_p_s8): Likewise.
16764 (__arm_vmladavaxq_p_s32): Likewise.
16765 (__arm_vmladavaxq_p_s16): Likewise.
16766 (__arm_vmlaq_m_n_s8): Likewise.
16767 (__arm_vmlaq_m_n_s32): Likewise.
16768 (__arm_vmlaq_m_n_s16): Likewise.
16769 (__arm_vmlaq_m_n_u8): Likewise.
16770 (__arm_vmlaq_m_n_u32): Likewise.
16771 (__arm_vmlaq_m_n_u16): Likewise.
16772 (__arm_vmlasq_m_n_s8): Likewise.
16773 (__arm_vmlasq_m_n_s32): Likewise.
16774 (__arm_vmlasq_m_n_s16): Likewise.
16775 (__arm_vmlasq_m_n_u8): Likewise.
16776 (__arm_vmlasq_m_n_u32): Likewise.
16777 (__arm_vmlasq_m_n_u16): Likewise.
16778 (__arm_vmlsdavaq_p_s8): Likewise.
16779 (__arm_vmlsdavaq_p_s32): Likewise.
16780 (__arm_vmlsdavaq_p_s16): Likewise.
16781 (__arm_vmlsdavaxq_p_s8): Likewise.
16782 (__arm_vmlsdavaxq_p_s32): Likewise.
16783 (__arm_vmlsdavaxq_p_s16): Likewise.
16784 (__arm_vmulhq_m_s8): Likewise.
16785 (__arm_vmulhq_m_s32): Likewise.
16786 (__arm_vmulhq_m_s16): Likewise.
16787 (__arm_vmulhq_m_u8): Likewise.
16788 (__arm_vmulhq_m_u32): Likewise.
16789 (__arm_vmulhq_m_u16): Likewise.
16790 (__arm_vmullbq_int_m_s8): Likewise.
16791 (__arm_vmullbq_int_m_s32): Likewise.
16792 (__arm_vmullbq_int_m_s16): Likewise.
16793 (__arm_vmullbq_int_m_u8): Likewise.
16794 (__arm_vmullbq_int_m_u32): Likewise.
16795 (__arm_vmullbq_int_m_u16): Likewise.
16796 (__arm_vmulltq_int_m_s8): Likewise.
16797 (__arm_vmulltq_int_m_s32): Likewise.
16798 (__arm_vmulltq_int_m_s16): Likewise.
16799 (__arm_vmulltq_int_m_u8): Likewise.
16800 (__arm_vmulltq_int_m_u32): Likewise.
16801 (__arm_vmulltq_int_m_u16): Likewise.
16802 (__arm_vmulq_m_n_s8): Likewise.
16803 (__arm_vmulq_m_n_s32): Likewise.
16804 (__arm_vmulq_m_n_s16): Likewise.
16805 (__arm_vmulq_m_n_u8): Likewise.
16806 (__arm_vmulq_m_n_u32): Likewise.
16807 (__arm_vmulq_m_n_u16): Likewise.
16808 (__arm_vmulq_m_s8): Likewise.
16809 (__arm_vmulq_m_s32): Likewise.
16810 (__arm_vmulq_m_s16): Likewise.
16811 (__arm_vmulq_m_u8): Likewise.
16812 (__arm_vmulq_m_u32): Likewise.
16813 (__arm_vmulq_m_u16): Likewise.
16814 (__arm_vornq_m_s8): Likewise.
16815 (__arm_vornq_m_s32): Likewise.
16816 (__arm_vornq_m_s16): Likewise.
16817 (__arm_vornq_m_u8): Likewise.
16818 (__arm_vornq_m_u32): Likewise.
16819 (__arm_vornq_m_u16): Likewise.
16820 (__arm_vorrq_m_s8): Likewise.
16821 (__arm_vorrq_m_s32): Likewise.
16822 (__arm_vorrq_m_s16): Likewise.
16823 (__arm_vorrq_m_u8): Likewise.
16824 (__arm_vorrq_m_u32): Likewise.
16825 (__arm_vorrq_m_u16): Likewise.
16826 (__arm_vqaddq_m_n_s8): Likewise.
16827 (__arm_vqaddq_m_n_s32): Likewise.
16828 (__arm_vqaddq_m_n_s16): Likewise.
16829 (__arm_vqaddq_m_n_u8): Likewise.
16830 (__arm_vqaddq_m_n_u32): Likewise.
16831 (__arm_vqaddq_m_n_u16): Likewise.
16832 (__arm_vqaddq_m_s8): Likewise.
16833 (__arm_vqaddq_m_s32): Likewise.
16834 (__arm_vqaddq_m_s16): Likewise.
16835 (__arm_vqaddq_m_u8): Likewise.
16836 (__arm_vqaddq_m_u32): Likewise.
16837 (__arm_vqaddq_m_u16): Likewise.
16838 (__arm_vqdmladhq_m_s8): Likewise.
16839 (__arm_vqdmladhq_m_s32): Likewise.
16840 (__arm_vqdmladhq_m_s16): Likewise.
16841 (__arm_vqdmladhxq_m_s8): Likewise.
16842 (__arm_vqdmladhxq_m_s32): Likewise.
16843 (__arm_vqdmladhxq_m_s16): Likewise.
16844 (__arm_vqdmlahq_m_n_s8): Likewise.
16845 (__arm_vqdmlahq_m_n_s32): Likewise.
16846 (__arm_vqdmlahq_m_n_s16): Likewise.
16847 (__arm_vqdmlahq_m_n_u8): Likewise.
16848 (__arm_vqdmlahq_m_n_u32): Likewise.
16849 (__arm_vqdmlahq_m_n_u16): Likewise.
16850 (__arm_vqdmlsdhq_m_s8): Likewise.
16851 (__arm_vqdmlsdhq_m_s32): Likewise.
16852 (__arm_vqdmlsdhq_m_s16): Likewise.
16853 (__arm_vqdmlsdhxq_m_s8): Likewise.
16854 (__arm_vqdmlsdhxq_m_s32): Likewise.
16855 (__arm_vqdmlsdhxq_m_s16): Likewise.
16856 (__arm_vqdmulhq_m_n_s8): Likewise.
16857 (__arm_vqdmulhq_m_n_s32): Likewise.
16858 (__arm_vqdmulhq_m_n_s16): Likewise.
16859 (__arm_vqdmulhq_m_s8): Likewise.
16860 (__arm_vqdmulhq_m_s32): Likewise.
16861 (__arm_vqdmulhq_m_s16): Likewise.
16862 (__arm_vqrdmladhq_m_s8): Likewise.
16863 (__arm_vqrdmladhq_m_s32): Likewise.
16864 (__arm_vqrdmladhq_m_s16): Likewise.
16865 (__arm_vqrdmladhxq_m_s8): Likewise.
16866 (__arm_vqrdmladhxq_m_s32): Likewise.
16867 (__arm_vqrdmladhxq_m_s16): Likewise.
16868 (__arm_vqrdmlahq_m_n_s8): Likewise.
16869 (__arm_vqrdmlahq_m_n_s32): Likewise.
16870 (__arm_vqrdmlahq_m_n_s16): Likewise.
16871 (__arm_vqrdmlahq_m_n_u8): Likewise.
16872 (__arm_vqrdmlahq_m_n_u32): Likewise.
16873 (__arm_vqrdmlahq_m_n_u16): Likewise.
16874 (__arm_vqrdmlashq_m_n_s8): Likewise.
16875 (__arm_vqrdmlashq_m_n_s32): Likewise.
16876 (__arm_vqrdmlashq_m_n_s16): Likewise.
16877 (__arm_vqrdmlashq_m_n_u8): Likewise.
16878 (__arm_vqrdmlashq_m_n_u32): Likewise.
16879 (__arm_vqrdmlashq_m_n_u16): Likewise.
16880 (__arm_vqrdmlsdhq_m_s8): Likewise.
16881 (__arm_vqrdmlsdhq_m_s32): Likewise.
16882 (__arm_vqrdmlsdhq_m_s16): Likewise.
16883 (__arm_vqrdmlsdhxq_m_s8): Likewise.
16884 (__arm_vqrdmlsdhxq_m_s32): Likewise.
16885 (__arm_vqrdmlsdhxq_m_s16): Likewise.
16886 (__arm_vqrdmulhq_m_n_s8): Likewise.
16887 (__arm_vqrdmulhq_m_n_s32): Likewise.
16888 (__arm_vqrdmulhq_m_n_s16): Likewise.
16889 (__arm_vqrdmulhq_m_s8): Likewise.
16890 (__arm_vqrdmulhq_m_s32): Likewise.
16891 (__arm_vqrdmulhq_m_s16): Likewise.
16892 (__arm_vqrshlq_m_s8): Likewise.
16893 (__arm_vqrshlq_m_s32): Likewise.
16894 (__arm_vqrshlq_m_s16): Likewise.
16895 (__arm_vqrshlq_m_u8): Likewise.
16896 (__arm_vqrshlq_m_u32): Likewise.
16897 (__arm_vqrshlq_m_u16): Likewise.
16898 (__arm_vqshlq_m_n_s8): Likewise.
16899 (__arm_vqshlq_m_n_s32): Likewise.
16900 (__arm_vqshlq_m_n_s16): Likewise.
16901 (__arm_vqshlq_m_n_u8): Likewise.
16902 (__arm_vqshlq_m_n_u32): Likewise.
16903 (__arm_vqshlq_m_n_u16): Likewise.
16904 (__arm_vqshlq_m_s8): Likewise.
16905 (__arm_vqshlq_m_s32): Likewise.
16906 (__arm_vqshlq_m_s16): Likewise.
16907 (__arm_vqshlq_m_u8): Likewise.
16908 (__arm_vqshlq_m_u32): Likewise.
16909 (__arm_vqshlq_m_u16): Likewise.
16910 (__arm_vqsubq_m_n_s8): Likewise.
16911 (__arm_vqsubq_m_n_s32): Likewise.
16912 (__arm_vqsubq_m_n_s16): Likewise.
16913 (__arm_vqsubq_m_n_u8): Likewise.
16914 (__arm_vqsubq_m_n_u32): Likewise.
16915 (__arm_vqsubq_m_n_u16): Likewise.
16916 (__arm_vqsubq_m_s8): Likewise.
16917 (__arm_vqsubq_m_s32): Likewise.
16918 (__arm_vqsubq_m_s16): Likewise.
16919 (__arm_vqsubq_m_u8): Likewise.
16920 (__arm_vqsubq_m_u32): Likewise.
16921 (__arm_vqsubq_m_u16): Likewise.
16922 (__arm_vrhaddq_m_s8): Likewise.
16923 (__arm_vrhaddq_m_s32): Likewise.
16924 (__arm_vrhaddq_m_s16): Likewise.
16925 (__arm_vrhaddq_m_u8): Likewise.
16926 (__arm_vrhaddq_m_u32): Likewise.
16927 (__arm_vrhaddq_m_u16): Likewise.
16928 (__arm_vrmulhq_m_s8): Likewise.
16929 (__arm_vrmulhq_m_s32): Likewise.
16930 (__arm_vrmulhq_m_s16): Likewise.
16931 (__arm_vrmulhq_m_u8): Likewise.
16932 (__arm_vrmulhq_m_u32): Likewise.
16933 (__arm_vrmulhq_m_u16): Likewise.
16934 (__arm_vrshlq_m_s8): Likewise.
16935 (__arm_vrshlq_m_s32): Likewise.
16936 (__arm_vrshlq_m_s16): Likewise.
16937 (__arm_vrshlq_m_u8): Likewise.
16938 (__arm_vrshlq_m_u32): Likewise.
16939 (__arm_vrshlq_m_u16): Likewise.
16940 (__arm_vrshrq_m_n_s8): Likewise.
16941 (__arm_vrshrq_m_n_s32): Likewise.
16942 (__arm_vrshrq_m_n_s16): Likewise.
16943 (__arm_vrshrq_m_n_u8): Likewise.
16944 (__arm_vrshrq_m_n_u32): Likewise.
16945 (__arm_vrshrq_m_n_u16): Likewise.
16946 (__arm_vshlq_m_n_s8): Likewise.
16947 (__arm_vshlq_m_n_s32): Likewise.
16948 (__arm_vshlq_m_n_s16): Likewise.
16949 (__arm_vshlq_m_n_u8): Likewise.
16950 (__arm_vshlq_m_n_u32): Likewise.
16951 (__arm_vshlq_m_n_u16): Likewise.
16952 (__arm_vshrq_m_n_s8): Likewise.
16953 (__arm_vshrq_m_n_s32): Likewise.
16954 (__arm_vshrq_m_n_s16): Likewise.
16955 (__arm_vshrq_m_n_u8): Likewise.
16956 (__arm_vshrq_m_n_u32): Likewise.
16957 (__arm_vshrq_m_n_u16): Likewise.
16958 (__arm_vsliq_m_n_s8): Likewise.
16959 (__arm_vsliq_m_n_s32): Likewise.
16960 (__arm_vsliq_m_n_s16): Likewise.
16961 (__arm_vsliq_m_n_u8): Likewise.
16962 (__arm_vsliq_m_n_u32): Likewise.
16963 (__arm_vsliq_m_n_u16): Likewise.
16964 (__arm_vsubq_m_n_s8): Likewise.
16965 (__arm_vsubq_m_n_s32): Likewise.
16966 (__arm_vsubq_m_n_s16): Likewise.
16967 (__arm_vsubq_m_n_u8): Likewise.
16968 (__arm_vsubq_m_n_u32): Likewise.
16969 (__arm_vsubq_m_n_u16): Likewise.
16970 (vqdmladhq_m): Define polymorphic variant.
16971 (vqdmladhxq_m): Likewise.
16972 (vqdmlsdhq_m): Likewise.
16973 (vqdmlsdhxq_m): Likewise.
16974 (vabdq_m): Likewise.
16975 (vandq_m): Likewise.
16976 (vbicq_m): Likewise.
16977 (vbrsrq_m_n): Likewise.
16978 (vcaddq_rot270_m): Likewise.
16979 (vcaddq_rot90_m): Likewise.
16980 (veorq_m): Likewise.
16981 (vmaxq_m): Likewise.
16982 (vminq_m): Likewise.
16983 (vmladavaq_p): Likewise.
16984 (vmlaq_m_n): Likewise.
16985 (vmlasq_m_n): Likewise.
16986 (vmulhq_m): Likewise.
16987 (vmullbq_int_m): Likewise.
16988 (vmulltq_int_m): Likewise.
16989 (vornq_m): Likewise.
16990 (vorrq_m): Likewise.
16991 (vqdmlahq_m_n): Likewise.
16992 (vqrdmlahq_m_n): Likewise.
16993 (vqrdmlashq_m_n): Likewise.
16994 (vqrshlq_m): Likewise.
16995 (vqshlq_m_n): Likewise.
16996 (vqshlq_m): Likewise.
16997 (vrhaddq_m): Likewise.
16998 (vrmulhq_m): Likewise.
16999 (vrshlq_m): Likewise.
17000 (vrshrq_m_n): Likewise.
17001 (vshlq_m_n): Likewise.
17002 (vshrq_m_n): Likewise.
17003 (vsliq_m): Likewise.
17004 (vaddq_m_n): Likewise.
17005 (vaddq_m): Likewise.
17006 (vhaddq_m_n): Likewise.
17007 (vhaddq_m): Likewise.
17008 (vhcaddq_rot270_m): Likewise.
17009 (vhcaddq_rot90_m): Likewise.
17010 (vhsubq_m): Likewise.
17011 (vhsubq_m_n): Likewise.
17012 (vmulq_m_n): Likewise.
17013 (vmulq_m): Likewise.
17014 (vqaddq_m_n): Likewise.
17015 (vqaddq_m): Likewise.
17016 (vqdmulhq_m_n): Likewise.
17017 (vqdmulhq_m): Likewise.
17018 (vsubq_m_n): Likewise.
17019 (vsliq_m_n): Likewise.
17020 (vqsubq_m_n): Likewise.
17021 (vqsubq_m): Likewise.
17022 (vqrdmulhq_m): Likewise.
17023 (vqrdmulhq_m_n): Likewise.
17024 (vqrdmlsdhxq_m): Likewise.
17025 (vqrdmlsdhq_m): Likewise.
17026 (vqrdmladhq_m): Likewise.
17027 (vqrdmladhxq_m): Likewise.
17028 (vmlsdavaxq_p): Likewise.
17029 (vmlsdavaq_p): Likewise.
17030 (vmladavaxq_p): Likewise.
17031 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
17033 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
17034 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
17035 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
17036 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
17037 * config/arm/mve.md (VHSUBQ_M): Define iterators.
17038 (VSLIQ_M_N): Likewise.
17039 (VQRDMLAHQ_M_N): Likewise.
17040 (VRSHLQ_M): Likewise.
17041 (VMINQ_M): Likewise.
17042 (VMULLBQ_INT_M): Likewise.
17043 (VMULHQ_M): Likewise.
17044 (VMULQ_M): Likewise.
17045 (VHSUBQ_M_N): Likewise.
17046 (VHADDQ_M_N): Likewise.
17047 (VORRQ_M): Likewise.
17048 (VRMULHQ_M): Likewise.
17049 (VQADDQ_M): Likewise.
17050 (VRSHRQ_M_N): Likewise.
17051 (VQSUBQ_M_N): Likewise.
17052 (VADDQ_M): Likewise.
17053 (VORNQ_M): Likewise.
17054 (VQDMLAHQ_M_N): Likewise.
17055 (VRHADDQ_M): Likewise.
17056 (VQSHLQ_M): Likewise.
17057 (VANDQ_M): Likewise.
17058 (VBICQ_M): Likewise.
17059 (VSHLQ_M_N): Likewise.
17060 (VCADDQ_ROT270_M): Likewise.
17061 (VQRSHLQ_M): Likewise.
17062 (VQADDQ_M_N): Likewise.
17063 (VADDQ_M_N): Likewise.
17064 (VMAXQ_M): Likewise.
17065 (VQSUBQ_M): Likewise.
17066 (VMLASQ_M_N): Likewise.
17067 (VMLADAVAQ_P): Likewise.
17068 (VBRSRQ_M_N): Likewise.
17069 (VMULQ_M_N): Likewise.
17070 (VCADDQ_ROT90_M): Likewise.
17071 (VMULLTQ_INT_M): Likewise.
17072 (VEORQ_M): Likewise.
17073 (VSHRQ_M_N): Likewise.
17074 (VSUBQ_M_N): Likewise.
17075 (VHADDQ_M): Likewise.
17076 (VABDQ_M): Likewise.
17077 (VQRDMLASHQ_M_N): Likewise.
17078 (VMLAQ_M_N): Likewise.
17079 (VQSHLQ_M_N): Likewise.
17080 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
17081 (mve_vaddq_m_n_<supf><mode>): Likewise.
17082 (mve_vaddq_m_<supf><mode>): Likewise.
17083 (mve_vandq_m_<supf><mode>): Likewise.
17084 (mve_vbicq_m_<supf><mode>): Likewise.
17085 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
17086 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
17087 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
17088 (mve_veorq_m_<supf><mode>): Likewise.
17089 (mve_vhaddq_m_n_<supf><mode>): Likewise.
17090 (mve_vhaddq_m_<supf><mode>): Likewise.
17091 (mve_vhsubq_m_n_<supf><mode>): Likewise.
17092 (mve_vhsubq_m_<supf><mode>): Likewise.
17093 (mve_vmaxq_m_<supf><mode>): Likewise.
17094 (mve_vminq_m_<supf><mode>): Likewise.
17095 (mve_vmladavaq_p_<supf><mode>): Likewise.
17096 (mve_vmlaq_m_n_<supf><mode>): Likewise.
17097 (mve_vmlasq_m_n_<supf><mode>): Likewise.
17098 (mve_vmulhq_m_<supf><mode>): Likewise.
17099 (mve_vmullbq_int_m_<supf><mode>): Likewise.
17100 (mve_vmulltq_int_m_<supf><mode>): Likewise.
17101 (mve_vmulq_m_n_<supf><mode>): Likewise.
17102 (mve_vmulq_m_<supf><mode>): Likewise.
17103 (mve_vornq_m_<supf><mode>): Likewise.
17104 (mve_vorrq_m_<supf><mode>): Likewise.
17105 (mve_vqaddq_m_n_<supf><mode>): Likewise.
17106 (mve_vqaddq_m_<supf><mode>): Likewise.
17107 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
17108 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
17109 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
17110 (mve_vqrshlq_m_<supf><mode>): Likewise.
17111 (mve_vqshlq_m_n_<supf><mode>): Likewise.
17112 (mve_vqshlq_m_<supf><mode>): Likewise.
17113 (mve_vqsubq_m_n_<supf><mode>): Likewise.
17114 (mve_vqsubq_m_<supf><mode>): Likewise.
17115 (mve_vrhaddq_m_<supf><mode>): Likewise.
17116 (mve_vrmulhq_m_<supf><mode>): Likewise.
17117 (mve_vrshlq_m_<supf><mode>): Likewise.
17118 (mve_vrshrq_m_n_<supf><mode>): Likewise.
17119 (mve_vshlq_m_n_<supf><mode>): Likewise.
17120 (mve_vshrq_m_n_<supf><mode>): Likewise.
17121 (mve_vsliq_m_n_<supf><mode>): Likewise.
17122 (mve_vsubq_m_n_<supf><mode>): Likewise.
17123 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
17124 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
17125 (mve_vmladavaxq_p_s<mode>): Likewise.
17126 (mve_vmlsdavaq_p_s<mode>): Likewise.
17127 (mve_vmlsdavaxq_p_s<mode>): Likewise.
17128 (mve_vqdmladhq_m_s<mode>): Likewise.
17129 (mve_vqdmladhxq_m_s<mode>): Likewise.
17130 (mve_vqdmlsdhq_m_s<mode>): Likewise.
17131 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
17132 (mve_vqdmulhq_m_n_s<mode>): Likewise.
17133 (mve_vqdmulhq_m_s<mode>): Likewise.
17134 (mve_vqrdmladhq_m_s<mode>): Likewise.
17135 (mve_vqrdmladhxq_m_s<mode>): Likewise.
17136 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
17137 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
17138 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
17139 (mve_vqrdmulhq_m_s<mode>): Likewise.
17141 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
17142 Mihail Ionescu <mihail.ionescu@arm.com>
17143 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17145 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
17146 Define builtin qualifier.
17147 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17148 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
17149 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17150 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
17151 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
17152 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
17153 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
17154 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
17155 (vsubq_m_s8): Likewise.
17156 (vcvtq_m_n_f16_u16): Likewise.
17157 (vqshluq_m_n_s8): Likewise.
17158 (vabavq_p_s8): Likewise.
17159 (vsriq_m_n_u8): Likewise.
17160 (vshlq_m_u8): Likewise.
17161 (vsubq_m_u8): Likewise.
17162 (vabavq_p_u8): Likewise.
17163 (vshlq_m_s8): Likewise.
17164 (vcvtq_m_n_f16_s16): Likewise.
17165 (vsriq_m_n_s16): Likewise.
17166 (vsubq_m_s16): Likewise.
17167 (vcvtq_m_n_f32_u32): Likewise.
17168 (vqshluq_m_n_s16): Likewise.
17169 (vabavq_p_s16): Likewise.
17170 (vsriq_m_n_u16): Likewise.
17171 (vshlq_m_u16): Likewise.
17172 (vsubq_m_u16): Likewise.
17173 (vabavq_p_u16): Likewise.
17174 (vshlq_m_s16): Likewise.
17175 (vcvtq_m_n_f32_s32): Likewise.
17176 (vsriq_m_n_s32): Likewise.
17177 (vsubq_m_s32): Likewise.
17178 (vqshluq_m_n_s32): Likewise.
17179 (vabavq_p_s32): Likewise.
17180 (vsriq_m_n_u32): Likewise.
17181 (vshlq_m_u32): Likewise.
17182 (vsubq_m_u32): Likewise.
17183 (vabavq_p_u32): Likewise.
17184 (vshlq_m_s32): Likewise.
17185 (__arm_vsriq_m_n_s8): Define intrinsic.
17186 (__arm_vsubq_m_s8): Likewise.
17187 (__arm_vqshluq_m_n_s8): Likewise.
17188 (__arm_vabavq_p_s8): Likewise.
17189 (__arm_vsriq_m_n_u8): Likewise.
17190 (__arm_vshlq_m_u8): Likewise.
17191 (__arm_vsubq_m_u8): Likewise.
17192 (__arm_vabavq_p_u8): Likewise.
17193 (__arm_vshlq_m_s8): Likewise.
17194 (__arm_vsriq_m_n_s16): Likewise.
17195 (__arm_vsubq_m_s16): Likewise.
17196 (__arm_vqshluq_m_n_s16): Likewise.
17197 (__arm_vabavq_p_s16): Likewise.
17198 (__arm_vsriq_m_n_u16): Likewise.
17199 (__arm_vshlq_m_u16): Likewise.
17200 (__arm_vsubq_m_u16): Likewise.
17201 (__arm_vabavq_p_u16): Likewise.
17202 (__arm_vshlq_m_s16): Likewise.
17203 (__arm_vsriq_m_n_s32): Likewise.
17204 (__arm_vsubq_m_s32): Likewise.
17205 (__arm_vqshluq_m_n_s32): Likewise.
17206 (__arm_vabavq_p_s32): Likewise.
17207 (__arm_vsriq_m_n_u32): Likewise.
17208 (__arm_vshlq_m_u32): Likewise.
17209 (__arm_vsubq_m_u32): Likewise.
17210 (__arm_vabavq_p_u32): Likewise.
17211 (__arm_vshlq_m_s32): Likewise.
17212 (__arm_vcvtq_m_n_f16_u16): Likewise.
17213 (__arm_vcvtq_m_n_f16_s16): Likewise.
17214 (__arm_vcvtq_m_n_f32_u32): Likewise.
17215 (__arm_vcvtq_m_n_f32_s32): Likewise.
17216 (vcvtq_m_n): Define polymorphic variant.
17217 (vqshluq_m_n): Likewise.
17218 (vshlq_m): Likewise.
17219 (vsriq_m_n): Likewise.
17220 (vsubq_m): Likewise.
17221 (vabavq_p): Likewise.
17222 * config/arm/arm_mve_builtins.def
17223 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
17224 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17225 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
17226 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17227 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
17228 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
17229 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
17230 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
17231 * config/arm/mve.md (VABAVQ_P): Define iterator.
17232 (VSHLQ_M): Likewise.
17233 (VSRIQ_M_N): Likewise.
17234 (VSUBQ_M): Likewise.
17235 (VCVTQ_M_N_TO_F): Likewise.
17236 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
17237 (mve_vqshluq_m_n_s<mode>): Likewise.
17238 (mve_vshlq_m_<supf><mode>): Likewise.
17239 (mve_vsriq_m_n_<supf><mode>): Likewise.
17240 (mve_vsubq_m_<supf><mode>): Likewise.
17241 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
17243 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
17244 Mihail Ionescu <mihail.ionescu@arm.com>
17245 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17247 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
17248 (vrmlsldavhaq_s32): Likewise.
17249 (vrmlsldavhaxq_s32): Likewise.
17250 (vaddlvaq_p_s32): Likewise.
17251 (vcvtbq_m_f16_f32): Likewise.
17252 (vcvtbq_m_f32_f16): Likewise.
17253 (vcvttq_m_f16_f32): Likewise.
17254 (vcvttq_m_f32_f16): Likewise.
17255 (vrev16q_m_s8): Likewise.
17256 (vrev32q_m_f16): Likewise.
17257 (vrmlaldavhq_p_s32): Likewise.
17258 (vrmlaldavhxq_p_s32): Likewise.
17259 (vrmlsldavhq_p_s32): Likewise.
17260 (vrmlsldavhxq_p_s32): Likewise.
17261 (vaddlvaq_p_u32): Likewise.
17262 (vrev16q_m_u8): Likewise.
17263 (vrmlaldavhq_p_u32): Likewise.
17264 (vmvnq_m_n_s16): Likewise.
17265 (vorrq_m_n_s16): Likewise.
17266 (vqrshrntq_n_s16): Likewise.
17267 (vqshrnbq_n_s16): Likewise.
17268 (vqshrntq_n_s16): Likewise.
17269 (vrshrnbq_n_s16): Likewise.
17270 (vrshrntq_n_s16): Likewise.
17271 (vshrnbq_n_s16): Likewise.
17272 (vshrntq_n_s16): Likewise.
17273 (vcmlaq_f16): Likewise.
17274 (vcmlaq_rot180_f16): Likewise.
17275 (vcmlaq_rot270_f16): Likewise.
17276 (vcmlaq_rot90_f16): Likewise.
17277 (vfmaq_f16): Likewise.
17278 (vfmaq_n_f16): Likewise.
17279 (vfmasq_n_f16): Likewise.
17280 (vfmsq_f16): Likewise.
17281 (vmlaldavaq_s16): Likewise.
17282 (vmlaldavaxq_s16): Likewise.
17283 (vmlsldavaq_s16): Likewise.
17284 (vmlsldavaxq_s16): Likewise.
17285 (vabsq_m_f16): Likewise.
17286 (vcvtmq_m_s16_f16): Likewise.
17287 (vcvtnq_m_s16_f16): Likewise.
17288 (vcvtpq_m_s16_f16): Likewise.
17289 (vcvtq_m_s16_f16): Likewise.
17290 (vdupq_m_n_f16): Likewise.
17291 (vmaxnmaq_m_f16): Likewise.
17292 (vmaxnmavq_p_f16): Likewise.
17293 (vmaxnmvq_p_f16): Likewise.
17294 (vminnmaq_m_f16): Likewise.
17295 (vminnmavq_p_f16): Likewise.
17296 (vminnmvq_p_f16): Likewise.
17297 (vmlaldavq_p_s16): Likewise.
17298 (vmlaldavxq_p_s16): Likewise.
17299 (vmlsldavq_p_s16): Likewise.
17300 (vmlsldavxq_p_s16): Likewise.
17301 (vmovlbq_m_s8): Likewise.
17302 (vmovltq_m_s8): Likewise.
17303 (vmovnbq_m_s16): Likewise.
17304 (vmovntq_m_s16): Likewise.
17305 (vnegq_m_f16): Likewise.
17306 (vpselq_f16): Likewise.
17307 (vqmovnbq_m_s16): Likewise.
17308 (vqmovntq_m_s16): Likewise.
17309 (vrev32q_m_s8): Likewise.
17310 (vrev64q_m_f16): Likewise.
17311 (vrndaq_m_f16): Likewise.
17312 (vrndmq_m_f16): Likewise.
17313 (vrndnq_m_f16): Likewise.
17314 (vrndpq_m_f16): Likewise.
17315 (vrndq_m_f16): Likewise.
17316 (vrndxq_m_f16): Likewise.
17317 (vcmpeqq_m_n_f16): Likewise.
17318 (vcmpgeq_m_f16): Likewise.
17319 (vcmpgeq_m_n_f16): Likewise.
17320 (vcmpgtq_m_f16): Likewise.
17321 (vcmpgtq_m_n_f16): Likewise.
17322 (vcmpleq_m_f16): Likewise.
17323 (vcmpleq_m_n_f16): Likewise.
17324 (vcmpltq_m_f16): Likewise.
17325 (vcmpltq_m_n_f16): Likewise.
17326 (vcmpneq_m_f16): Likewise.
17327 (vcmpneq_m_n_f16): Likewise.
17328 (vmvnq_m_n_u16): Likewise.
17329 (vorrq_m_n_u16): Likewise.
17330 (vqrshruntq_n_s16): Likewise.
17331 (vqshrunbq_n_s16): Likewise.
17332 (vqshruntq_n_s16): Likewise.
17333 (vcvtmq_m_u16_f16): Likewise.
17334 (vcvtnq_m_u16_f16): Likewise.
17335 (vcvtpq_m_u16_f16): Likewise.
17336 (vcvtq_m_u16_f16): Likewise.
17337 (vqmovunbq_m_s16): Likewise.
17338 (vqmovuntq_m_s16): Likewise.
17339 (vqrshrntq_n_u16): Likewise.
17340 (vqshrnbq_n_u16): Likewise.
17341 (vqshrntq_n_u16): Likewise.
17342 (vrshrnbq_n_u16): Likewise.
17343 (vrshrntq_n_u16): Likewise.
17344 (vshrnbq_n_u16): Likewise.
17345 (vshrntq_n_u16): Likewise.
17346 (vmlaldavaq_u16): Likewise.
17347 (vmlaldavaxq_u16): Likewise.
17348 (vmlaldavq_p_u16): Likewise.
17349 (vmlaldavxq_p_u16): Likewise.
17350 (vmovlbq_m_u8): Likewise.
17351 (vmovltq_m_u8): Likewise.
17352 (vmovnbq_m_u16): Likewise.
17353 (vmovntq_m_u16): Likewise.
17354 (vqmovnbq_m_u16): Likewise.
17355 (vqmovntq_m_u16): Likewise.
17356 (vrev32q_m_u8): Likewise.
17357 (vmvnq_m_n_s32): Likewise.
17358 (vorrq_m_n_s32): Likewise.
17359 (vqrshrntq_n_s32): Likewise.
17360 (vqshrnbq_n_s32): Likewise.
17361 (vqshrntq_n_s32): Likewise.
17362 (vrshrnbq_n_s32): Likewise.
17363 (vrshrntq_n_s32): Likewise.
17364 (vshrnbq_n_s32): Likewise.
17365 (vshrntq_n_s32): Likewise.
17366 (vcmlaq_f32): Likewise.
17367 (vcmlaq_rot180_f32): Likewise.
17368 (vcmlaq_rot270_f32): Likewise.
17369 (vcmlaq_rot90_f32): Likewise.
17370 (vfmaq_f32): Likewise.
17371 (vfmaq_n_f32): Likewise.
17372 (vfmasq_n_f32): Likewise.
17373 (vfmsq_f32): Likewise.
17374 (vmlaldavaq_s32): Likewise.
17375 (vmlaldavaxq_s32): Likewise.
17376 (vmlsldavaq_s32): Likewise.
17377 (vmlsldavaxq_s32): Likewise.
17378 (vabsq_m_f32): Likewise.
17379 (vcvtmq_m_s32_f32): Likewise.
17380 (vcvtnq_m_s32_f32): Likewise.
17381 (vcvtpq_m_s32_f32): Likewise.
17382 (vcvtq_m_s32_f32): Likewise.
17383 (vdupq_m_n_f32): Likewise.
17384 (vmaxnmaq_m_f32): Likewise.
17385 (vmaxnmavq_p_f32): Likewise.
17386 (vmaxnmvq_p_f32): Likewise.
17387 (vminnmaq_m_f32): Likewise.
17388 (vminnmavq_p_f32): Likewise.
17389 (vminnmvq_p_f32): Likewise.
17390 (vmlaldavq_p_s32): Likewise.
17391 (vmlaldavxq_p_s32): Likewise.
17392 (vmlsldavq_p_s32): Likewise.
17393 (vmlsldavxq_p_s32): Likewise.
17394 (vmovlbq_m_s16): Likewise.
17395 (vmovltq_m_s16): Likewise.
17396 (vmovnbq_m_s32): Likewise.
17397 (vmovntq_m_s32): Likewise.
17398 (vnegq_m_f32): Likewise.
17399 (vpselq_f32): Likewise.
17400 (vqmovnbq_m_s32): Likewise.
17401 (vqmovntq_m_s32): Likewise.
17402 (vrev32q_m_s16): Likewise.
17403 (vrev64q_m_f32): Likewise.
17404 (vrndaq_m_f32): Likewise.
17405 (vrndmq_m_f32): Likewise.
17406 (vrndnq_m_f32): Likewise.
17407 (vrndpq_m_f32): Likewise.
17408 (vrndq_m_f32): Likewise.
17409 (vrndxq_m_f32): Likewise.
17410 (vcmpeqq_m_n_f32): Likewise.
17411 (vcmpgeq_m_f32): Likewise.
17412 (vcmpgeq_m_n_f32): Likewise.
17413 (vcmpgtq_m_f32): Likewise.
17414 (vcmpgtq_m_n_f32): Likewise.
17415 (vcmpleq_m_f32): Likewise.
17416 (vcmpleq_m_n_f32): Likewise.
17417 (vcmpltq_m_f32): Likewise.
17418 (vcmpltq_m_n_f32): Likewise.
17419 (vcmpneq_m_f32): Likewise.
17420 (vcmpneq_m_n_f32): Likewise.
17421 (vmvnq_m_n_u32): Likewise.
17422 (vorrq_m_n_u32): Likewise.
17423 (vqrshruntq_n_s32): Likewise.
17424 (vqshrunbq_n_s32): Likewise.
17425 (vqshruntq_n_s32): Likewise.
17426 (vcvtmq_m_u32_f32): Likewise.
17427 (vcvtnq_m_u32_f32): Likewise.
17428 (vcvtpq_m_u32_f32): Likewise.
17429 (vcvtq_m_u32_f32): Likewise.
17430 (vqmovunbq_m_s32): Likewise.
17431 (vqmovuntq_m_s32): Likewise.
17432 (vqrshrntq_n_u32): Likewise.
17433 (vqshrnbq_n_u32): Likewise.
17434 (vqshrntq_n_u32): Likewise.
17435 (vrshrnbq_n_u32): Likewise.
17436 (vrshrntq_n_u32): Likewise.
17437 (vshrnbq_n_u32): Likewise.
17438 (vshrntq_n_u32): Likewise.
17439 (vmlaldavaq_u32): Likewise.
17440 (vmlaldavaxq_u32): Likewise.
17441 (vmlaldavq_p_u32): Likewise.
17442 (vmlaldavxq_p_u32): Likewise.
17443 (vmovlbq_m_u16): Likewise.
17444 (vmovltq_m_u16): Likewise.
17445 (vmovnbq_m_u32): Likewise.
17446 (vmovntq_m_u32): Likewise.
17447 (vqmovnbq_m_u32): Likewise.
17448 (vqmovntq_m_u32): Likewise.
17449 (vrev32q_m_u16): Likewise.
17450 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
17451 (__arm_vrmlsldavhaq_s32): Likewise.
17452 (__arm_vrmlsldavhaxq_s32): Likewise.
17453 (__arm_vaddlvaq_p_s32): Likewise.
17454 (__arm_vrev16q_m_s8): Likewise.
17455 (__arm_vrmlaldavhq_p_s32): Likewise.
17456 (__arm_vrmlaldavhxq_p_s32): Likewise.
17457 (__arm_vrmlsldavhq_p_s32): Likewise.
17458 (__arm_vrmlsldavhxq_p_s32): Likewise.
17459 (__arm_vaddlvaq_p_u32): Likewise.
17460 (__arm_vrev16q_m_u8): Likewise.
17461 (__arm_vrmlaldavhq_p_u32): Likewise.
17462 (__arm_vmvnq_m_n_s16): Likewise.
17463 (__arm_vorrq_m_n_s16): Likewise.
17464 (__arm_vqrshrntq_n_s16): Likewise.
17465 (__arm_vqshrnbq_n_s16): Likewise.
17466 (__arm_vqshrntq_n_s16): Likewise.
17467 (__arm_vrshrnbq_n_s16): Likewise.
17468 (__arm_vrshrntq_n_s16): Likewise.
17469 (__arm_vshrnbq_n_s16): Likewise.
17470 (__arm_vshrntq_n_s16): Likewise.
17471 (__arm_vmlaldavaq_s16): Likewise.
17472 (__arm_vmlaldavaxq_s16): Likewise.
17473 (__arm_vmlsldavaq_s16): Likewise.
17474 (__arm_vmlsldavaxq_s16): Likewise.
17475 (__arm_vmlaldavq_p_s16): Likewise.
17476 (__arm_vmlaldavxq_p_s16): Likewise.
17477 (__arm_vmlsldavq_p_s16): Likewise.
17478 (__arm_vmlsldavxq_p_s16): Likewise.
17479 (__arm_vmovlbq_m_s8): Likewise.
17480 (__arm_vmovltq_m_s8): Likewise.
17481 (__arm_vmovnbq_m_s16): Likewise.
17482 (__arm_vmovntq_m_s16): Likewise.
17483 (__arm_vqmovnbq_m_s16): Likewise.
17484 (__arm_vqmovntq_m_s16): Likewise.
17485 (__arm_vrev32q_m_s8): Likewise.
17486 (__arm_vmvnq_m_n_u16): Likewise.
17487 (__arm_vorrq_m_n_u16): Likewise.
17488 (__arm_vqrshruntq_n_s16): Likewise.
17489 (__arm_vqshrunbq_n_s16): Likewise.
17490 (__arm_vqshruntq_n_s16): Likewise.
17491 (__arm_vqmovunbq_m_s16): Likewise.
17492 (__arm_vqmovuntq_m_s16): Likewise.
17493 (__arm_vqrshrntq_n_u16): Likewise.
17494 (__arm_vqshrnbq_n_u16): Likewise.
17495 (__arm_vqshrntq_n_u16): Likewise.
17496 (__arm_vrshrnbq_n_u16): Likewise.
17497 (__arm_vrshrntq_n_u16): Likewise.
17498 (__arm_vshrnbq_n_u16): Likewise.
17499 (__arm_vshrntq_n_u16): Likewise.
17500 (__arm_vmlaldavaq_u16): Likewise.
17501 (__arm_vmlaldavaxq_u16): Likewise.
17502 (__arm_vmlaldavq_p_u16): Likewise.
17503 (__arm_vmlaldavxq_p_u16): Likewise.
17504 (__arm_vmovlbq_m_u8): Likewise.
17505 (__arm_vmovltq_m_u8): Likewise.
17506 (__arm_vmovnbq_m_u16): Likewise.
17507 (__arm_vmovntq_m_u16): Likewise.
17508 (__arm_vqmovnbq_m_u16): Likewise.
17509 (__arm_vqmovntq_m_u16): Likewise.
17510 (__arm_vrev32q_m_u8): Likewise.
17511 (__arm_vmvnq_m_n_s32): Likewise.
17512 (__arm_vorrq_m_n_s32): Likewise.
17513 (__arm_vqrshrntq_n_s32): Likewise.
17514 (__arm_vqshrnbq_n_s32): Likewise.
17515 (__arm_vqshrntq_n_s32): Likewise.
17516 (__arm_vrshrnbq_n_s32): Likewise.
17517 (__arm_vrshrntq_n_s32): Likewise.
17518 (__arm_vshrnbq_n_s32): Likewise.
17519 (__arm_vshrntq_n_s32): Likewise.
17520 (__arm_vmlaldavaq_s32): Likewise.
17521 (__arm_vmlaldavaxq_s32): Likewise.
17522 (__arm_vmlsldavaq_s32): Likewise.
17523 (__arm_vmlsldavaxq_s32): Likewise.
17524 (__arm_vmlaldavq_p_s32): Likewise.
17525 (__arm_vmlaldavxq_p_s32): Likewise.
17526 (__arm_vmlsldavq_p_s32): Likewise.
17527 (__arm_vmlsldavxq_p_s32): Likewise.
17528 (__arm_vmovlbq_m_s16): Likewise.
17529 (__arm_vmovltq_m_s16): Likewise.
17530 (__arm_vmovnbq_m_s32): Likewise.
17531 (__arm_vmovntq_m_s32): Likewise.
17532 (__arm_vqmovnbq_m_s32): Likewise.
17533 (__arm_vqmovntq_m_s32): Likewise.
17534 (__arm_vrev32q_m_s16): Likewise.
17535 (__arm_vmvnq_m_n_u32): Likewise.
17536 (__arm_vorrq_m_n_u32): Likewise.
17537 (__arm_vqrshruntq_n_s32): Likewise.
17538 (__arm_vqshrunbq_n_s32): Likewise.
17539 (__arm_vqshruntq_n_s32): Likewise.
17540 (__arm_vqmovunbq_m_s32): Likewise.
17541 (__arm_vqmovuntq_m_s32): Likewise.
17542 (__arm_vqrshrntq_n_u32): Likewise.
17543 (__arm_vqshrnbq_n_u32): Likewise.
17544 (__arm_vqshrntq_n_u32): Likewise.
17545 (__arm_vrshrnbq_n_u32): Likewise.
17546 (__arm_vrshrntq_n_u32): Likewise.
17547 (__arm_vshrnbq_n_u32): Likewise.
17548 (__arm_vshrntq_n_u32): Likewise.
17549 (__arm_vmlaldavaq_u32): Likewise.
17550 (__arm_vmlaldavaxq_u32): Likewise.
17551 (__arm_vmlaldavq_p_u32): Likewise.
17552 (__arm_vmlaldavxq_p_u32): Likewise.
17553 (__arm_vmovlbq_m_u16): Likewise.
17554 (__arm_vmovltq_m_u16): Likewise.
17555 (__arm_vmovnbq_m_u32): Likewise.
17556 (__arm_vmovntq_m_u32): Likewise.
17557 (__arm_vqmovnbq_m_u32): Likewise.
17558 (__arm_vqmovntq_m_u32): Likewise.
17559 (__arm_vrev32q_m_u16): Likewise.
17560 (__arm_vcvtbq_m_f16_f32): Likewise.
17561 (__arm_vcvtbq_m_f32_f16): Likewise.
17562 (__arm_vcvttq_m_f16_f32): Likewise.
17563 (__arm_vcvttq_m_f32_f16): Likewise.
17564 (__arm_vrev32q_m_f16): Likewise.
17565 (__arm_vcmlaq_f16): Likewise.
17566 (__arm_vcmlaq_rot180_f16): Likewise.
17567 (__arm_vcmlaq_rot270_f16): Likewise.
17568 (__arm_vcmlaq_rot90_f16): Likewise.
17569 (__arm_vfmaq_f16): Likewise.
17570 (__arm_vfmaq_n_f16): Likewise.
17571 (__arm_vfmasq_n_f16): Likewise.
17572 (__arm_vfmsq_f16): Likewise.
17573 (__arm_vabsq_m_f16): Likewise.
17574 (__arm_vcvtmq_m_s16_f16): Likewise.
17575 (__arm_vcvtnq_m_s16_f16): Likewise.
17576 (__arm_vcvtpq_m_s16_f16): Likewise.
17577 (__arm_vcvtq_m_s16_f16): Likewise.
17578 (__arm_vdupq_m_n_f16): Likewise.
17579 (__arm_vmaxnmaq_m_f16): Likewise.
17580 (__arm_vmaxnmavq_p_f16): Likewise.
17581 (__arm_vmaxnmvq_p_f16): Likewise.
17582 (__arm_vminnmaq_m_f16): Likewise.
17583 (__arm_vminnmavq_p_f16): Likewise.
17584 (__arm_vminnmvq_p_f16): Likewise.
17585 (__arm_vnegq_m_f16): Likewise.
17586 (__arm_vpselq_f16): Likewise.
17587 (__arm_vrev64q_m_f16): Likewise.
17588 (__arm_vrndaq_m_f16): Likewise.
17589 (__arm_vrndmq_m_f16): Likewise.
17590 (__arm_vrndnq_m_f16): Likewise.
17591 (__arm_vrndpq_m_f16): Likewise.
17592 (__arm_vrndq_m_f16): Likewise.
17593 (__arm_vrndxq_m_f16): Likewise.
17594 (__arm_vcmpeqq_m_n_f16): Likewise.
17595 (__arm_vcmpgeq_m_f16): Likewise.
17596 (__arm_vcmpgeq_m_n_f16): Likewise.
17597 (__arm_vcmpgtq_m_f16): Likewise.
17598 (__arm_vcmpgtq_m_n_f16): Likewise.
17599 (__arm_vcmpleq_m_f16): Likewise.
17600 (__arm_vcmpleq_m_n_f16): Likewise.
17601 (__arm_vcmpltq_m_f16): Likewise.
17602 (__arm_vcmpltq_m_n_f16): Likewise.
17603 (__arm_vcmpneq_m_f16): Likewise.
17604 (__arm_vcmpneq_m_n_f16): Likewise.
17605 (__arm_vcvtmq_m_u16_f16): Likewise.
17606 (__arm_vcvtnq_m_u16_f16): Likewise.
17607 (__arm_vcvtpq_m_u16_f16): Likewise.
17608 (__arm_vcvtq_m_u16_f16): Likewise.
17609 (__arm_vcmlaq_f32): Likewise.
17610 (__arm_vcmlaq_rot180_f32): Likewise.
17611 (__arm_vcmlaq_rot270_f32): Likewise.
17612 (__arm_vcmlaq_rot90_f32): Likewise.
17613 (__arm_vfmaq_f32): Likewise.
17614 (__arm_vfmaq_n_f32): Likewise.
17615 (__arm_vfmasq_n_f32): Likewise.
17616 (__arm_vfmsq_f32): Likewise.
17617 (__arm_vabsq_m_f32): Likewise.
17618 (__arm_vcvtmq_m_s32_f32): Likewise.
17619 (__arm_vcvtnq_m_s32_f32): Likewise.
17620 (__arm_vcvtpq_m_s32_f32): Likewise.
17621 (__arm_vcvtq_m_s32_f32): Likewise.
17622 (__arm_vdupq_m_n_f32): Likewise.
17623 (__arm_vmaxnmaq_m_f32): Likewise.
17624 (__arm_vmaxnmavq_p_f32): Likewise.
17625 (__arm_vmaxnmvq_p_f32): Likewise.
17626 (__arm_vminnmaq_m_f32): Likewise.
17627 (__arm_vminnmavq_p_f32): Likewise.
17628 (__arm_vminnmvq_p_f32): Likewise.
17629 (__arm_vnegq_m_f32): Likewise.
17630 (__arm_vpselq_f32): Likewise.
17631 (__arm_vrev64q_m_f32): Likewise.
17632 (__arm_vrndaq_m_f32): Likewise.
17633 (__arm_vrndmq_m_f32): Likewise.
17634 (__arm_vrndnq_m_f32): Likewise.
17635 (__arm_vrndpq_m_f32): Likewise.
17636 (__arm_vrndq_m_f32): Likewise.
17637 (__arm_vrndxq_m_f32): Likewise.
17638 (__arm_vcmpeqq_m_n_f32): Likewise.
17639 (__arm_vcmpgeq_m_f32): Likewise.
17640 (__arm_vcmpgeq_m_n_f32): Likewise.
17641 (__arm_vcmpgtq_m_f32): Likewise.
17642 (__arm_vcmpgtq_m_n_f32): Likewise.
17643 (__arm_vcmpleq_m_f32): Likewise.
17644 (__arm_vcmpleq_m_n_f32): Likewise.
17645 (__arm_vcmpltq_m_f32): Likewise.
17646 (__arm_vcmpltq_m_n_f32): Likewise.
17647 (__arm_vcmpneq_m_f32): Likewise.
17648 (__arm_vcmpneq_m_n_f32): Likewise.
17649 (__arm_vcvtmq_m_u32_f32): Likewise.
17650 (__arm_vcvtnq_m_u32_f32): Likewise.
17651 (__arm_vcvtpq_m_u32_f32): Likewise.
17652 (__arm_vcvtq_m_u32_f32): Likewise.
17653 (vcvtq_m): Define polymorphic variant.
17654 (vabsq_m): Likewise.
17655 (vcmlaq): Likewise.
17656 (vcmlaq_rot180): Likewise.
17657 (vcmlaq_rot270): Likewise.
17658 (vcmlaq_rot90): Likewise.
17659 (vcmpeqq_m_n): Likewise.
17660 (vcmpgeq_m_n): Likewise.
17661 (vrndxq_m): Likewise.
17662 (vrndq_m): Likewise.
17663 (vrndpq_m): Likewise.
17664 (vcmpgtq_m_n): Likewise.
17665 (vcmpgtq_m): Likewise.
17666 (vcmpleq_m): Likewise.
17667 (vcmpleq_m_n): Likewise.
17668 (vcmpltq_m_n): Likewise.
17669 (vcmpltq_m): Likewise.
17670 (vcmpneq_m): Likewise.
17671 (vcmpneq_m_n): Likewise.
17672 (vcvtbq_m): Likewise.
17673 (vcvttq_m): Likewise.
17674 (vcvtmq_m): Likewise.
17675 (vcvtnq_m): Likewise.
17676 (vcvtpq_m): Likewise.
17677 (vdupq_m_n): Likewise.
17678 (vfmaq_n): Likewise.
17680 (vfmasq_n): Likewise.
17682 (vmaxnmaq_m): Likewise.
17683 (vmaxnmavq_m): Likewise.
17684 (vmaxnmvq_m): Likewise.
17685 (vmaxnmavq_p): Likewise.
17686 (vmaxnmvq_p): Likewise.
17687 (vminnmaq_m): Likewise.
17688 (vminnmavq_p): Likewise.
17689 (vminnmvq_p): Likewise.
17690 (vrndnq_m): Likewise.
17691 (vrndaq_m): Likewise.
17692 (vrndmq_m): Likewise.
17693 (vrev64q_m): Likewise.
17694 (vrev32q_m): Likewise.
17695 (vpselq): Likewise.
17696 (vnegq_m): Likewise.
17697 (vcmpgeq_m): Likewise.
17698 (vshrntq_n): Likewise.
17699 (vrshrntq_n): Likewise.
17700 (vmovlbq_m): Likewise.
17701 (vmovnbq_m): Likewise.
17702 (vmovntq_m): Likewise.
17703 (vmvnq_m_n): Likewise.
17704 (vmvnq_m): Likewise.
17705 (vshrnbq_n): Likewise.
17706 (vrshrnbq_n): Likewise.
17707 (vqshruntq_n): Likewise.
17708 (vrev16q_m): Likewise.
17709 (vqshrunbq_n): Likewise.
17710 (vqshrntq_n): Likewise.
17711 (vqrshruntq_n): Likewise.
17712 (vqrshrntq_n): Likewise.
17713 (vqshrnbq_n): Likewise.
17714 (vqmovuntq_m): Likewise.
17715 (vqmovntq_m): Likewise.
17716 (vqmovnbq_m): Likewise.
17717 (vorrq_m_n): Likewise.
17718 (vmovltq_m): Likewise.
17719 (vqmovunbq_m): Likewise.
17720 (vaddlvaq_p): Likewise.
17721 (vmlaldavaq): Likewise.
17722 (vmlaldavaxq): Likewise.
17723 (vmlaldavq_p): Likewise.
17724 (vmlaldavxq_p): Likewise.
17725 (vmlsldavaq): Likewise.
17726 (vmlsldavaxq): Likewise.
17727 (vmlsldavq_p): Likewise.
17728 (vmlsldavxq_p): Likewise.
17729 (vrmlaldavhaxq): Likewise.
17730 (vrmlaldavhq_p): Likewise.
17731 (vrmlaldavhxq_p): Likewise.
17732 (vrmlsldavhaq): Likewise.
17733 (vrmlsldavhaxq): Likewise.
17734 (vrmlsldavhq_p): Likewise.
17735 (vrmlsldavhxq_p): Likewise.
17736 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
17738 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
17739 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
17740 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
17741 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
17742 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
17743 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
17744 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
17745 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
17746 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
17747 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
17748 (MVE_pred3): Likewise.
17749 (MVE_constraint1): Likewise.
17750 (MVE_pred1): Likewise.
17751 (VMLALDAVQ_P): Define iterator.
17752 (VQMOVNBQ_M): Likewise.
17753 (VMOVLTQ_M): Likewise.
17754 (VMOVNBQ_M): Likewise.
17755 (VRSHRNTQ_N): Likewise.
17756 (VORRQ_M_N): Likewise.
17757 (VREV32Q_M): Likewise.
17758 (VREV16Q_M): Likewise.
17759 (VQRSHRNTQ_N): Likewise.
17760 (VMOVNTQ_M): Likewise.
17761 (VMOVLBQ_M): Likewise.
17762 (VMLALDAVAQ): Likewise.
17763 (VQSHRNBQ_N): Likewise.
17764 (VSHRNBQ_N): Likewise.
17765 (VRSHRNBQ_N): Likewise.
17766 (VMLALDAVXQ_P): Likewise.
17767 (VQMOVNTQ_M): Likewise.
17768 (VMVNQ_M_N): Likewise.
17769 (VQSHRNTQ_N): Likewise.
17770 (VMLALDAVAXQ): Likewise.
17771 (VSHRNTQ_N): Likewise.
17772 (VCVTMQ_M): Likewise.
17773 (VCVTNQ_M): Likewise.
17774 (VCVTPQ_M): Likewise.
17775 (VCVTQ_M_N_FROM_F): Likewise.
17776 (VCVTQ_M_FROM_F): Likewise.
17777 (VRMLALDAVHQ_P): Likewise.
17778 (VADDLVAQ_P): Likewise.
17779 (mve_vrndq_m_f<mode>): Define RTL pattern.
17780 (mve_vabsq_m_f<mode>): Likewise.
17781 (mve_vaddlvaq_p_<supf>v4si): Likewise.
17782 (mve_vcmlaq_f<mode>): Likewise.
17783 (mve_vcmlaq_rot180_f<mode>): Likewise.
17784 (mve_vcmlaq_rot270_f<mode>): Likewise.
17785 (mve_vcmlaq_rot90_f<mode>): Likewise.
17786 (mve_vcmpeqq_m_n_f<mode>): Likewise.
17787 (mve_vcmpgeq_m_f<mode>): Likewise.
17788 (mve_vcmpgeq_m_n_f<mode>): Likewise.
17789 (mve_vcmpgtq_m_f<mode>): Likewise.
17790 (mve_vcmpgtq_m_n_f<mode>): Likewise.
17791 (mve_vcmpleq_m_f<mode>): Likewise.
17792 (mve_vcmpleq_m_n_f<mode>): Likewise.
17793 (mve_vcmpltq_m_f<mode>): Likewise.
17794 (mve_vcmpltq_m_n_f<mode>): Likewise.
17795 (mve_vcmpneq_m_f<mode>): Likewise.
17796 (mve_vcmpneq_m_n_f<mode>): Likewise.
17797 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
17798 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
17799 (mve_vcvttq_m_f16_f32v8hf): Likewise.
17800 (mve_vcvttq_m_f32_f16v4sf): Likewise.
17801 (mve_vdupq_m_n_f<mode>): Likewise.
17802 (mve_vfmaq_f<mode>): Likewise.
17803 (mve_vfmaq_n_f<mode>): Likewise.
17804 (mve_vfmasq_n_f<mode>): Likewise.
17805 (mve_vfmsq_f<mode>): Likewise.
17806 (mve_vmaxnmaq_m_f<mode>): Likewise.
17807 (mve_vmaxnmavq_p_f<mode>): Likewise.
17808 (mve_vmaxnmvq_p_f<mode>): Likewise.
17809 (mve_vminnmaq_m_f<mode>): Likewise.
17810 (mve_vminnmavq_p_f<mode>): Likewise.
17811 (mve_vminnmvq_p_f<mode>): Likewise.
17812 (mve_vmlaldavaq_<supf><mode>): Likewise.
17813 (mve_vmlaldavaxq_<supf><mode>): Likewise.
17814 (mve_vmlaldavq_p_<supf><mode>): Likewise.
17815 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
17816 (mve_vmlsldavaq_s<mode>): Likewise.
17817 (mve_vmlsldavaxq_s<mode>): Likewise.
17818 (mve_vmlsldavq_p_s<mode>): Likewise.
17819 (mve_vmlsldavxq_p_s<mode>): Likewise.
17820 (mve_vmovlbq_m_<supf><mode>): Likewise.
17821 (mve_vmovltq_m_<supf><mode>): Likewise.
17822 (mve_vmovnbq_m_<supf><mode>): Likewise.
17823 (mve_vmovntq_m_<supf><mode>): Likewise.
17824 (mve_vmvnq_m_n_<supf><mode>): Likewise.
17825 (mve_vnegq_m_f<mode>): Likewise.
17826 (mve_vorrq_m_n_<supf><mode>): Likewise.
17827 (mve_vpselq_f<mode>): Likewise.
17828 (mve_vqmovnbq_m_<supf><mode>): Likewise.
17829 (mve_vqmovntq_m_<supf><mode>): Likewise.
17830 (mve_vqmovunbq_m_s<mode>): Likewise.
17831 (mve_vqmovuntq_m_s<mode>): Likewise.
17832 (mve_vqrshrntq_n_<supf><mode>): Likewise.
17833 (mve_vqrshruntq_n_s<mode>): Likewise.
17834 (mve_vqshrnbq_n_<supf><mode>): Likewise.
17835 (mve_vqshrntq_n_<supf><mode>): Likewise.
17836 (mve_vqshrunbq_n_s<mode>): Likewise.
17837 (mve_vqshruntq_n_s<mode>): Likewise.
17838 (mve_vrev32q_m_fv8hf): Likewise.
17839 (mve_vrev32q_m_<supf><mode>): Likewise.
17840 (mve_vrev64q_m_f<mode>): Likewise.
17841 (mve_vrmlaldavhaxq_sv4si): Likewise.
17842 (mve_vrmlaldavhxq_p_sv4si): Likewise.
17843 (mve_vrmlsldavhaxq_sv4si): Likewise.
17844 (mve_vrmlsldavhq_p_sv4si): Likewise.
17845 (mve_vrmlsldavhxq_p_sv4si): Likewise.
17846 (mve_vrndaq_m_f<mode>): Likewise.
17847 (mve_vrndmq_m_f<mode>): Likewise.
17848 (mve_vrndnq_m_f<mode>): Likewise.
17849 (mve_vrndpq_m_f<mode>): Likewise.
17850 (mve_vrndxq_m_f<mode>): Likewise.
17851 (mve_vrshrnbq_n_<supf><mode>): Likewise.
17852 (mve_vrshrntq_n_<supf><mode>): Likewise.
17853 (mve_vshrnbq_n_<supf><mode>): Likewise.
17854 (mve_vshrntq_n_<supf><mode>): Likewise.
17855 (mve_vcvtmq_m_<supf><mode>): Likewise.
17856 (mve_vcvtpq_m_<supf><mode>): Likewise.
17857 (mve_vcvtnq_m_<supf><mode>): Likewise.
17858 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
17859 (mve_vrev16q_m_<supf>v16qi): Likewise.
17860 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
17861 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
17862 (mve_vrmlsldavhaq_sv4si): Likewise.
17864 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
17865 Mihail Ionescu <mihail.ionescu@arm.com>
17866 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17868 * config/arm/arm_mve.h (vpselq_u8): Define macro.
17869 (vpselq_s8): Likewise.
17870 (vrev64q_m_u8): Likewise.
17871 (vqrdmlashq_n_u8): Likewise.
17872 (vqrdmlahq_n_u8): Likewise.
17873 (vqdmlahq_n_u8): Likewise.
17874 (vmvnq_m_u8): Likewise.
17875 (vmlasq_n_u8): Likewise.
17876 (vmlaq_n_u8): Likewise.
17877 (vmladavq_p_u8): Likewise.
17878 (vmladavaq_u8): Likewise.
17879 (vminvq_p_u8): Likewise.
17880 (vmaxvq_p_u8): Likewise.
17881 (vdupq_m_n_u8): Likewise.
17882 (vcmpneq_m_u8): Likewise.
17883 (vcmpneq_m_n_u8): Likewise.
17884 (vcmphiq_m_u8): Likewise.
17885 (vcmphiq_m_n_u8): Likewise.
17886 (vcmpeqq_m_u8): Likewise.
17887 (vcmpeqq_m_n_u8): Likewise.
17888 (vcmpcsq_m_u8): Likewise.
17889 (vcmpcsq_m_n_u8): Likewise.
17890 (vclzq_m_u8): Likewise.
17891 (vaddvaq_p_u8): Likewise.
17892 (vsriq_n_u8): Likewise.
17893 (vsliq_n_u8): Likewise.
17894 (vshlq_m_r_u8): Likewise.
17895 (vrshlq_m_n_u8): Likewise.
17896 (vqshlq_m_r_u8): Likewise.
17897 (vqrshlq_m_n_u8): Likewise.
17898 (vminavq_p_s8): Likewise.
17899 (vminaq_m_s8): Likewise.
17900 (vmaxavq_p_s8): Likewise.
17901 (vmaxaq_m_s8): Likewise.
17902 (vcmpneq_m_s8): Likewise.
17903 (vcmpneq_m_n_s8): Likewise.
17904 (vcmpltq_m_s8): Likewise.
17905 (vcmpltq_m_n_s8): Likewise.
17906 (vcmpleq_m_s8): Likewise.
17907 (vcmpleq_m_n_s8): Likewise.
17908 (vcmpgtq_m_s8): Likewise.
17909 (vcmpgtq_m_n_s8): Likewise.
17910 (vcmpgeq_m_s8): Likewise.
17911 (vcmpgeq_m_n_s8): Likewise.
17912 (vcmpeqq_m_s8): Likewise.
17913 (vcmpeqq_m_n_s8): Likewise.
17914 (vshlq_m_r_s8): Likewise.
17915 (vrshlq_m_n_s8): Likewise.
17916 (vrev64q_m_s8): Likewise.
17917 (vqshlq_m_r_s8): Likewise.
17918 (vqrshlq_m_n_s8): Likewise.
17919 (vqnegq_m_s8): Likewise.
17920 (vqabsq_m_s8): Likewise.
17921 (vnegq_m_s8): Likewise.
17922 (vmvnq_m_s8): Likewise.
17923 (vmlsdavxq_p_s8): Likewise.
17924 (vmlsdavq_p_s8): Likewise.
17925 (vmladavxq_p_s8): Likewise.
17926 (vmladavq_p_s8): Likewise.
17927 (vminvq_p_s8): Likewise.
17928 (vmaxvq_p_s8): Likewise.
17929 (vdupq_m_n_s8): Likewise.
17930 (vclzq_m_s8): Likewise.
17931 (vclsq_m_s8): Likewise.
17932 (vaddvaq_p_s8): Likewise.
17933 (vabsq_m_s8): Likewise.
17934 (vqrdmlsdhxq_s8): Likewise.
17935 (vqrdmlsdhq_s8): Likewise.
17936 (vqrdmlashq_n_s8): Likewise.
17937 (vqrdmlahq_n_s8): Likewise.
17938 (vqrdmladhxq_s8): Likewise.
17939 (vqrdmladhq_s8): Likewise.
17940 (vqdmlsdhxq_s8): Likewise.
17941 (vqdmlsdhq_s8): Likewise.
17942 (vqdmlahq_n_s8): Likewise.
17943 (vqdmladhxq_s8): Likewise.
17944 (vqdmladhq_s8): Likewise.
17945 (vmlsdavaxq_s8): Likewise.
17946 (vmlsdavaq_s8): Likewise.
17947 (vmlasq_n_s8): Likewise.
17948 (vmlaq_n_s8): Likewise.
17949 (vmladavaxq_s8): Likewise.
17950 (vmladavaq_s8): Likewise.
17951 (vsriq_n_s8): Likewise.
17952 (vsliq_n_s8): Likewise.
17953 (vpselq_u16): Likewise.
17954 (vpselq_s16): Likewise.
17955 (vrev64q_m_u16): Likewise.
17956 (vqrdmlashq_n_u16): Likewise.
17957 (vqrdmlahq_n_u16): Likewise.
17958 (vqdmlahq_n_u16): Likewise.
17959 (vmvnq_m_u16): Likewise.
17960 (vmlasq_n_u16): Likewise.
17961 (vmlaq_n_u16): Likewise.
17962 (vmladavq_p_u16): Likewise.
17963 (vmladavaq_u16): Likewise.
17964 (vminvq_p_u16): Likewise.
17965 (vmaxvq_p_u16): Likewise.
17966 (vdupq_m_n_u16): Likewise.
17967 (vcmpneq_m_u16): Likewise.
17968 (vcmpneq_m_n_u16): Likewise.
17969 (vcmphiq_m_u16): Likewise.
17970 (vcmphiq_m_n_u16): Likewise.
17971 (vcmpeqq_m_u16): Likewise.
17972 (vcmpeqq_m_n_u16): Likewise.
17973 (vcmpcsq_m_u16): Likewise.
17974 (vcmpcsq_m_n_u16): Likewise.
17975 (vclzq_m_u16): Likewise.
17976 (vaddvaq_p_u16): Likewise.
17977 (vsriq_n_u16): Likewise.
17978 (vsliq_n_u16): Likewise.
17979 (vshlq_m_r_u16): Likewise.
17980 (vrshlq_m_n_u16): Likewise.
17981 (vqshlq_m_r_u16): Likewise.
17982 (vqrshlq_m_n_u16): Likewise.
17983 (vminavq_p_s16): Likewise.
17984 (vminaq_m_s16): Likewise.
17985 (vmaxavq_p_s16): Likewise.
17986 (vmaxaq_m_s16): Likewise.
17987 (vcmpneq_m_s16): Likewise.
17988 (vcmpneq_m_n_s16): Likewise.
17989 (vcmpltq_m_s16): Likewise.
17990 (vcmpltq_m_n_s16): Likewise.
17991 (vcmpleq_m_s16): Likewise.
17992 (vcmpleq_m_n_s16): Likewise.
17993 (vcmpgtq_m_s16): Likewise.
17994 (vcmpgtq_m_n_s16): Likewise.
17995 (vcmpgeq_m_s16): Likewise.
17996 (vcmpgeq_m_n_s16): Likewise.
17997 (vcmpeqq_m_s16): Likewise.
17998 (vcmpeqq_m_n_s16): Likewise.
17999 (vshlq_m_r_s16): Likewise.
18000 (vrshlq_m_n_s16): Likewise.
18001 (vrev64q_m_s16): Likewise.
18002 (vqshlq_m_r_s16): Likewise.
18003 (vqrshlq_m_n_s16): Likewise.
18004 (vqnegq_m_s16): Likewise.
18005 (vqabsq_m_s16): Likewise.
18006 (vnegq_m_s16): Likewise.
18007 (vmvnq_m_s16): Likewise.
18008 (vmlsdavxq_p_s16): Likewise.
18009 (vmlsdavq_p_s16): Likewise.
18010 (vmladavxq_p_s16): Likewise.
18011 (vmladavq_p_s16): Likewise.
18012 (vminvq_p_s16): Likewise.
18013 (vmaxvq_p_s16): Likewise.
18014 (vdupq_m_n_s16): Likewise.
18015 (vclzq_m_s16): Likewise.
18016 (vclsq_m_s16): Likewise.
18017 (vaddvaq_p_s16): Likewise.
18018 (vabsq_m_s16): Likewise.
18019 (vqrdmlsdhxq_s16): Likewise.
18020 (vqrdmlsdhq_s16): Likewise.
18021 (vqrdmlashq_n_s16): Likewise.
18022 (vqrdmlahq_n_s16): Likewise.
18023 (vqrdmladhxq_s16): Likewise.
18024 (vqrdmladhq_s16): Likewise.
18025 (vqdmlsdhxq_s16): Likewise.
18026 (vqdmlsdhq_s16): Likewise.
18027 (vqdmlahq_n_s16): Likewise.
18028 (vqdmladhxq_s16): Likewise.
18029 (vqdmladhq_s16): Likewise.
18030 (vmlsdavaxq_s16): Likewise.
18031 (vmlsdavaq_s16): Likewise.
18032 (vmlasq_n_s16): Likewise.
18033 (vmlaq_n_s16): Likewise.
18034 (vmladavaxq_s16): Likewise.
18035 (vmladavaq_s16): Likewise.
18036 (vsriq_n_s16): Likewise.
18037 (vsliq_n_s16): Likewise.
18038 (vpselq_u32): Likewise.
18039 (vpselq_s32): Likewise.
18040 (vrev64q_m_u32): Likewise.
18041 (vqrdmlashq_n_u32): Likewise.
18042 (vqrdmlahq_n_u32): Likewise.
18043 (vqdmlahq_n_u32): Likewise.
18044 (vmvnq_m_u32): Likewise.
18045 (vmlasq_n_u32): Likewise.
18046 (vmlaq_n_u32): Likewise.
18047 (vmladavq_p_u32): Likewise.
18048 (vmladavaq_u32): Likewise.
18049 (vminvq_p_u32): Likewise.
18050 (vmaxvq_p_u32): Likewise.
18051 (vdupq_m_n_u32): Likewise.
18052 (vcmpneq_m_u32): Likewise.
18053 (vcmpneq_m_n_u32): Likewise.
18054 (vcmphiq_m_u32): Likewise.
18055 (vcmphiq_m_n_u32): Likewise.
18056 (vcmpeqq_m_u32): Likewise.
18057 (vcmpeqq_m_n_u32): Likewise.
18058 (vcmpcsq_m_u32): Likewise.
18059 (vcmpcsq_m_n_u32): Likewise.
18060 (vclzq_m_u32): Likewise.
18061 (vaddvaq_p_u32): Likewise.
18062 (vsriq_n_u32): Likewise.
18063 (vsliq_n_u32): Likewise.
18064 (vshlq_m_r_u32): Likewise.
18065 (vrshlq_m_n_u32): Likewise.
18066 (vqshlq_m_r_u32): Likewise.
18067 (vqrshlq_m_n_u32): Likewise.
18068 (vminavq_p_s32): Likewise.
18069 (vminaq_m_s32): Likewise.
18070 (vmaxavq_p_s32): Likewise.
18071 (vmaxaq_m_s32): Likewise.
18072 (vcmpneq_m_s32): Likewise.
18073 (vcmpneq_m_n_s32): Likewise.
18074 (vcmpltq_m_s32): Likewise.
18075 (vcmpltq_m_n_s32): Likewise.
18076 (vcmpleq_m_s32): Likewise.
18077 (vcmpleq_m_n_s32): Likewise.
18078 (vcmpgtq_m_s32): Likewise.
18079 (vcmpgtq_m_n_s32): Likewise.
18080 (vcmpgeq_m_s32): Likewise.
18081 (vcmpgeq_m_n_s32): Likewise.
18082 (vcmpeqq_m_s32): Likewise.
18083 (vcmpeqq_m_n_s32): Likewise.
18084 (vshlq_m_r_s32): Likewise.
18085 (vrshlq_m_n_s32): Likewise.
18086 (vrev64q_m_s32): Likewise.
18087 (vqshlq_m_r_s32): Likewise.
18088 (vqrshlq_m_n_s32): Likewise.
18089 (vqnegq_m_s32): Likewise.
18090 (vqabsq_m_s32): Likewise.
18091 (vnegq_m_s32): Likewise.
18092 (vmvnq_m_s32): Likewise.
18093 (vmlsdavxq_p_s32): Likewise.
18094 (vmlsdavq_p_s32): Likewise.
18095 (vmladavxq_p_s32): Likewise.
18096 (vmladavq_p_s32): Likewise.
18097 (vminvq_p_s32): Likewise.
18098 (vmaxvq_p_s32): Likewise.
18099 (vdupq_m_n_s32): Likewise.
18100 (vclzq_m_s32): Likewise.
18101 (vclsq_m_s32): Likewise.
18102 (vaddvaq_p_s32): Likewise.
18103 (vabsq_m_s32): Likewise.
18104 (vqrdmlsdhxq_s32): Likewise.
18105 (vqrdmlsdhq_s32): Likewise.
18106 (vqrdmlashq_n_s32): Likewise.
18107 (vqrdmlahq_n_s32): Likewise.
18108 (vqrdmladhxq_s32): Likewise.
18109 (vqrdmladhq_s32): Likewise.
18110 (vqdmlsdhxq_s32): Likewise.
18111 (vqdmlsdhq_s32): Likewise.
18112 (vqdmlahq_n_s32): Likewise.
18113 (vqdmladhxq_s32): Likewise.
18114 (vqdmladhq_s32): Likewise.
18115 (vmlsdavaxq_s32): Likewise.
18116 (vmlsdavaq_s32): Likewise.
18117 (vmlasq_n_s32): Likewise.
18118 (vmlaq_n_s32): Likewise.
18119 (vmladavaxq_s32): Likewise.
18120 (vmladavaq_s32): Likewise.
18121 (vsriq_n_s32): Likewise.
18122 (vsliq_n_s32): Likewise.
18123 (vpselq_u64): Likewise.
18124 (vpselq_s64): Likewise.
18125 (__arm_vpselq_u8): Define intrinsic.
18126 (__arm_vpselq_s8): Likewise.
18127 (__arm_vrev64q_m_u8): Likewise.
18128 (__arm_vqrdmlashq_n_u8): Likewise.
18129 (__arm_vqrdmlahq_n_u8): Likewise.
18130 (__arm_vqdmlahq_n_u8): Likewise.
18131 (__arm_vmvnq_m_u8): Likewise.
18132 (__arm_vmlasq_n_u8): Likewise.
18133 (__arm_vmlaq_n_u8): Likewise.
18134 (__arm_vmladavq_p_u8): Likewise.
18135 (__arm_vmladavaq_u8): Likewise.
18136 (__arm_vminvq_p_u8): Likewise.
18137 (__arm_vmaxvq_p_u8): Likewise.
18138 (__arm_vdupq_m_n_u8): Likewise.
18139 (__arm_vcmpneq_m_u8): Likewise.
18140 (__arm_vcmpneq_m_n_u8): Likewise.
18141 (__arm_vcmphiq_m_u8): Likewise.
18142 (__arm_vcmphiq_m_n_u8): Likewise.
18143 (__arm_vcmpeqq_m_u8): Likewise.
18144 (__arm_vcmpeqq_m_n_u8): Likewise.
18145 (__arm_vcmpcsq_m_u8): Likewise.
18146 (__arm_vcmpcsq_m_n_u8): Likewise.
18147 (__arm_vclzq_m_u8): Likewise.
18148 (__arm_vaddvaq_p_u8): Likewise.
18149 (__arm_vsriq_n_u8): Likewise.
18150 (__arm_vsliq_n_u8): Likewise.
18151 (__arm_vshlq_m_r_u8): Likewise.
18152 (__arm_vrshlq_m_n_u8): Likewise.
18153 (__arm_vqshlq_m_r_u8): Likewise.
18154 (__arm_vqrshlq_m_n_u8): Likewise.
18155 (__arm_vminavq_p_s8): Likewise.
18156 (__arm_vminaq_m_s8): Likewise.
18157 (__arm_vmaxavq_p_s8): Likewise.
18158 (__arm_vmaxaq_m_s8): Likewise.
18159 (__arm_vcmpneq_m_s8): Likewise.
18160 (__arm_vcmpneq_m_n_s8): Likewise.
18161 (__arm_vcmpltq_m_s8): Likewise.
18162 (__arm_vcmpltq_m_n_s8): Likewise.
18163 (__arm_vcmpleq_m_s8): Likewise.
18164 (__arm_vcmpleq_m_n_s8): Likewise.
18165 (__arm_vcmpgtq_m_s8): Likewise.
18166 (__arm_vcmpgtq_m_n_s8): Likewise.
18167 (__arm_vcmpgeq_m_s8): Likewise.
18168 (__arm_vcmpgeq_m_n_s8): Likewise.
18169 (__arm_vcmpeqq_m_s8): Likewise.
18170 (__arm_vcmpeqq_m_n_s8): Likewise.
18171 (__arm_vshlq_m_r_s8): Likewise.
18172 (__arm_vrshlq_m_n_s8): Likewise.
18173 (__arm_vrev64q_m_s8): Likewise.
18174 (__arm_vqshlq_m_r_s8): Likewise.
18175 (__arm_vqrshlq_m_n_s8): Likewise.
18176 (__arm_vqnegq_m_s8): Likewise.
18177 (__arm_vqabsq_m_s8): Likewise.
18178 (__arm_vnegq_m_s8): Likewise.
18179 (__arm_vmvnq_m_s8): Likewise.
18180 (__arm_vmlsdavxq_p_s8): Likewise.
18181 (__arm_vmlsdavq_p_s8): Likewise.
18182 (__arm_vmladavxq_p_s8): Likewise.
18183 (__arm_vmladavq_p_s8): Likewise.
18184 (__arm_vminvq_p_s8): Likewise.
18185 (__arm_vmaxvq_p_s8): Likewise.
18186 (__arm_vdupq_m_n_s8): Likewise.
18187 (__arm_vclzq_m_s8): Likewise.
18188 (__arm_vclsq_m_s8): Likewise.
18189 (__arm_vaddvaq_p_s8): Likewise.
18190 (__arm_vabsq_m_s8): Likewise.
18191 (__arm_vqrdmlsdhxq_s8): Likewise.
18192 (__arm_vqrdmlsdhq_s8): Likewise.
18193 (__arm_vqrdmlashq_n_s8): Likewise.
18194 (__arm_vqrdmlahq_n_s8): Likewise.
18195 (__arm_vqrdmladhxq_s8): Likewise.
18196 (__arm_vqrdmladhq_s8): Likewise.
18197 (__arm_vqdmlsdhxq_s8): Likewise.
18198 (__arm_vqdmlsdhq_s8): Likewise.
18199 (__arm_vqdmlahq_n_s8): Likewise.
18200 (__arm_vqdmladhxq_s8): Likewise.
18201 (__arm_vqdmladhq_s8): Likewise.
18202 (__arm_vmlsdavaxq_s8): Likewise.
18203 (__arm_vmlsdavaq_s8): Likewise.
18204 (__arm_vmlasq_n_s8): Likewise.
18205 (__arm_vmlaq_n_s8): Likewise.
18206 (__arm_vmladavaxq_s8): Likewise.
18207 (__arm_vmladavaq_s8): Likewise.
18208 (__arm_vsriq_n_s8): Likewise.
18209 (__arm_vsliq_n_s8): Likewise.
18210 (__arm_vpselq_u16): Likewise.
18211 (__arm_vpselq_s16): Likewise.
18212 (__arm_vrev64q_m_u16): Likewise.
18213 (__arm_vqrdmlashq_n_u16): Likewise.
18214 (__arm_vqrdmlahq_n_u16): Likewise.
18215 (__arm_vqdmlahq_n_u16): Likewise.
18216 (__arm_vmvnq_m_u16): Likewise.
18217 (__arm_vmlasq_n_u16): Likewise.
18218 (__arm_vmlaq_n_u16): Likewise.
18219 (__arm_vmladavq_p_u16): Likewise.
18220 (__arm_vmladavaq_u16): Likewise.
18221 (__arm_vminvq_p_u16): Likewise.
18222 (__arm_vmaxvq_p_u16): Likewise.
18223 (__arm_vdupq_m_n_u16): Likewise.
18224 (__arm_vcmpneq_m_u16): Likewise.
18225 (__arm_vcmpneq_m_n_u16): Likewise.
18226 (__arm_vcmphiq_m_u16): Likewise.
18227 (__arm_vcmphiq_m_n_u16): Likewise.
18228 (__arm_vcmpeqq_m_u16): Likewise.
18229 (__arm_vcmpeqq_m_n_u16): Likewise.
18230 (__arm_vcmpcsq_m_u16): Likewise.
18231 (__arm_vcmpcsq_m_n_u16): Likewise.
18232 (__arm_vclzq_m_u16): Likewise.
18233 (__arm_vaddvaq_p_u16): Likewise.
18234 (__arm_vsriq_n_u16): Likewise.
18235 (__arm_vsliq_n_u16): Likewise.
18236 (__arm_vshlq_m_r_u16): Likewise.
18237 (__arm_vrshlq_m_n_u16): Likewise.
18238 (__arm_vqshlq_m_r_u16): Likewise.
18239 (__arm_vqrshlq_m_n_u16): Likewise.
18240 (__arm_vminavq_p_s16): Likewise.
18241 (__arm_vminaq_m_s16): Likewise.
18242 (__arm_vmaxavq_p_s16): Likewise.
18243 (__arm_vmaxaq_m_s16): Likewise.
18244 (__arm_vcmpneq_m_s16): Likewise.
18245 (__arm_vcmpneq_m_n_s16): Likewise.
18246 (__arm_vcmpltq_m_s16): Likewise.
18247 (__arm_vcmpltq_m_n_s16): Likewise.
18248 (__arm_vcmpleq_m_s16): Likewise.
18249 (__arm_vcmpleq_m_n_s16): Likewise.
18250 (__arm_vcmpgtq_m_s16): Likewise.
18251 (__arm_vcmpgtq_m_n_s16): Likewise.
18252 (__arm_vcmpgeq_m_s16): Likewise.
18253 (__arm_vcmpgeq_m_n_s16): Likewise.
18254 (__arm_vcmpeqq_m_s16): Likewise.
18255 (__arm_vcmpeqq_m_n_s16): Likewise.
18256 (__arm_vshlq_m_r_s16): Likewise.
18257 (__arm_vrshlq_m_n_s16): Likewise.
18258 (__arm_vrev64q_m_s16): Likewise.
18259 (__arm_vqshlq_m_r_s16): Likewise.
18260 (__arm_vqrshlq_m_n_s16): Likewise.
18261 (__arm_vqnegq_m_s16): Likewise.
18262 (__arm_vqabsq_m_s16): Likewise.
18263 (__arm_vnegq_m_s16): Likewise.
18264 (__arm_vmvnq_m_s16): Likewise.
18265 (__arm_vmlsdavxq_p_s16): Likewise.
18266 (__arm_vmlsdavq_p_s16): Likewise.
18267 (__arm_vmladavxq_p_s16): Likewise.
18268 (__arm_vmladavq_p_s16): Likewise.
18269 (__arm_vminvq_p_s16): Likewise.
18270 (__arm_vmaxvq_p_s16): Likewise.
18271 (__arm_vdupq_m_n_s16): Likewise.
18272 (__arm_vclzq_m_s16): Likewise.
18273 (__arm_vclsq_m_s16): Likewise.
18274 (__arm_vaddvaq_p_s16): Likewise.
18275 (__arm_vabsq_m_s16): Likewise.
18276 (__arm_vqrdmlsdhxq_s16): Likewise.
18277 (__arm_vqrdmlsdhq_s16): Likewise.
18278 (__arm_vqrdmlashq_n_s16): Likewise.
18279 (__arm_vqrdmlahq_n_s16): Likewise.
18280 (__arm_vqrdmladhxq_s16): Likewise.
18281 (__arm_vqrdmladhq_s16): Likewise.
18282 (__arm_vqdmlsdhxq_s16): Likewise.
18283 (__arm_vqdmlsdhq_s16): Likewise.
18284 (__arm_vqdmlahq_n_s16): Likewise.
18285 (__arm_vqdmladhxq_s16): Likewise.
18286 (__arm_vqdmladhq_s16): Likewise.
18287 (__arm_vmlsdavaxq_s16): Likewise.
18288 (__arm_vmlsdavaq_s16): Likewise.
18289 (__arm_vmlasq_n_s16): Likewise.
18290 (__arm_vmlaq_n_s16): Likewise.
18291 (__arm_vmladavaxq_s16): Likewise.
18292 (__arm_vmladavaq_s16): Likewise.
18293 (__arm_vsriq_n_s16): Likewise.
18294 (__arm_vsliq_n_s16): Likewise.
18295 (__arm_vpselq_u32): Likewise.
18296 (__arm_vpselq_s32): Likewise.
18297 (__arm_vrev64q_m_u32): Likewise.
18298 (__arm_vqrdmlashq_n_u32): Likewise.
18299 (__arm_vqrdmlahq_n_u32): Likewise.
18300 (__arm_vqdmlahq_n_u32): Likewise.
18301 (__arm_vmvnq_m_u32): Likewise.
18302 (__arm_vmlasq_n_u32): Likewise.
18303 (__arm_vmlaq_n_u32): Likewise.
18304 (__arm_vmladavq_p_u32): Likewise.
18305 (__arm_vmladavaq_u32): Likewise.
18306 (__arm_vminvq_p_u32): Likewise.
18307 (__arm_vmaxvq_p_u32): Likewise.
18308 (__arm_vdupq_m_n_u32): Likewise.
18309 (__arm_vcmpneq_m_u32): Likewise.
18310 (__arm_vcmpneq_m_n_u32): Likewise.
18311 (__arm_vcmphiq_m_u32): Likewise.
18312 (__arm_vcmphiq_m_n_u32): Likewise.
18313 (__arm_vcmpeqq_m_u32): Likewise.
18314 (__arm_vcmpeqq_m_n_u32): Likewise.
18315 (__arm_vcmpcsq_m_u32): Likewise.
18316 (__arm_vcmpcsq_m_n_u32): Likewise.
18317 (__arm_vclzq_m_u32): Likewise.
18318 (__arm_vaddvaq_p_u32): Likewise.
18319 (__arm_vsriq_n_u32): Likewise.
18320 (__arm_vsliq_n_u32): Likewise.
18321 (__arm_vshlq_m_r_u32): Likewise.
18322 (__arm_vrshlq_m_n_u32): Likewise.
18323 (__arm_vqshlq_m_r_u32): Likewise.
18324 (__arm_vqrshlq_m_n_u32): Likewise.
18325 (__arm_vminavq_p_s32): Likewise.
18326 (__arm_vminaq_m_s32): Likewise.
18327 (__arm_vmaxavq_p_s32): Likewise.
18328 (__arm_vmaxaq_m_s32): Likewise.
18329 (__arm_vcmpneq_m_s32): Likewise.
18330 (__arm_vcmpneq_m_n_s32): Likewise.
18331 (__arm_vcmpltq_m_s32): Likewise.
18332 (__arm_vcmpltq_m_n_s32): Likewise.
18333 (__arm_vcmpleq_m_s32): Likewise.
18334 (__arm_vcmpleq_m_n_s32): Likewise.
18335 (__arm_vcmpgtq_m_s32): Likewise.
18336 (__arm_vcmpgtq_m_n_s32): Likewise.
18337 (__arm_vcmpgeq_m_s32): Likewise.
18338 (__arm_vcmpgeq_m_n_s32): Likewise.
18339 (__arm_vcmpeqq_m_s32): Likewise.
18340 (__arm_vcmpeqq_m_n_s32): Likewise.
18341 (__arm_vshlq_m_r_s32): Likewise.
18342 (__arm_vrshlq_m_n_s32): Likewise.
18343 (__arm_vrev64q_m_s32): Likewise.
18344 (__arm_vqshlq_m_r_s32): Likewise.
18345 (__arm_vqrshlq_m_n_s32): Likewise.
18346 (__arm_vqnegq_m_s32): Likewise.
18347 (__arm_vqabsq_m_s32): Likewise.
18348 (__arm_vnegq_m_s32): Likewise.
18349 (__arm_vmvnq_m_s32): Likewise.
18350 (__arm_vmlsdavxq_p_s32): Likewise.
18351 (__arm_vmlsdavq_p_s32): Likewise.
18352 (__arm_vmladavxq_p_s32): Likewise.
18353 (__arm_vmladavq_p_s32): Likewise.
18354 (__arm_vminvq_p_s32): Likewise.
18355 (__arm_vmaxvq_p_s32): Likewise.
18356 (__arm_vdupq_m_n_s32): Likewise.
18357 (__arm_vclzq_m_s32): Likewise.
18358 (__arm_vclsq_m_s32): Likewise.
18359 (__arm_vaddvaq_p_s32): Likewise.
18360 (__arm_vabsq_m_s32): Likewise.
18361 (__arm_vqrdmlsdhxq_s32): Likewise.
18362 (__arm_vqrdmlsdhq_s32): Likewise.
18363 (__arm_vqrdmlashq_n_s32): Likewise.
18364 (__arm_vqrdmlahq_n_s32): Likewise.
18365 (__arm_vqrdmladhxq_s32): Likewise.
18366 (__arm_vqrdmladhq_s32): Likewise.
18367 (__arm_vqdmlsdhxq_s32): Likewise.
18368 (__arm_vqdmlsdhq_s32): Likewise.
18369 (__arm_vqdmlahq_n_s32): Likewise.
18370 (__arm_vqdmladhxq_s32): Likewise.
18371 (__arm_vqdmladhq_s32): Likewise.
18372 (__arm_vmlsdavaxq_s32): Likewise.
18373 (__arm_vmlsdavaq_s32): Likewise.
18374 (__arm_vmlasq_n_s32): Likewise.
18375 (__arm_vmlaq_n_s32): Likewise.
18376 (__arm_vmladavaxq_s32): Likewise.
18377 (__arm_vmladavaq_s32): Likewise.
18378 (__arm_vsriq_n_s32): Likewise.
18379 (__arm_vsliq_n_s32): Likewise.
18380 (__arm_vpselq_u64): Likewise.
18381 (__arm_vpselq_s64): Likewise.
18382 (vcmpneq_m_n): Define polymorphic variant.
18383 (vcmpneq_m): Likewise.
18384 (vqrdmlsdhq): Likewise.
18385 (vqrdmlsdhxq): Likewise.
18386 (vqrshlq_m_n): Likewise.
18387 (vqshlq_m_r): Likewise.
18388 (vrev64q_m): Likewise.
18389 (vrshlq_m_n): Likewise.
18390 (vshlq_m_r): Likewise.
18391 (vsliq_n): Likewise.
18392 (vsriq_n): Likewise.
18393 (vqrdmlashq_n): Likewise.
18394 (vqrdmlahq): Likewise.
18395 (vqrdmladhxq): Likewise.
18396 (vqrdmladhq): Likewise.
18397 (vqnegq_m): Likewise.
18398 (vqdmlsdhxq): Likewise.
18399 (vabsq_m): Likewise.
18400 (vclsq_m): Likewise.
18401 (vclzq_m): Likewise.
18402 (vcmpgeq_m): Likewise.
18403 (vcmpgeq_m_n): Likewise.
18404 (vdupq_m_n): Likewise.
18405 (vmaxaq_m): Likewise.
18406 (vmlaq_n): Likewise.
18407 (vmlasq_n): Likewise.
18408 (vmvnq_m): Likewise.
18409 (vnegq_m): Likewise.
18410 (vpselq): Likewise.
18411 (vqdmlahq_n): Likewise.
18412 (vqrdmlahq_n): Likewise.
18413 (vqdmlsdhq): Likewise.
18414 (vqdmladhq): Likewise.
18415 (vqabsq_m): Likewise.
18416 (vminaq_m): Likewise.
18417 (vrmlaldavhaq): Likewise.
18418 (vmlsdavxq_p): Likewise.
18419 (vmlsdavq_p): Likewise.
18420 (vmlsdavaxq): Likewise.
18421 (vmlsdavaq): Likewise.
18422 (vaddvaq_p): Likewise.
18423 (vcmpcsq_m_n): Likewise.
18424 (vcmpcsq_m): Likewise.
18425 (vcmpeqq_m_n): Likewise.
18426 (vcmpeqq_m): Likewise.
18427 (vmladavxq_p): Likewise.
18428 (vmladavq_p): Likewise.
18429 (vmladavaxq): Likewise.
18430 (vmladavaq): Likewise.
18431 (vminvq_p): Likewise.
18432 (vminavq_p): Likewise.
18433 (vmaxvq_p): Likewise.
18434 (vmaxavq_p): Likewise.
18435 (vcmpltq_m_n): Likewise.
18436 (vcmpltq_m): Likewise.
18437 (vcmpleq_m): Likewise.
18438 (vcmpleq_m_n): Likewise.
18439 (vcmphiq_m_n): Likewise.
18440 (vcmphiq_m): Likewise.
18441 (vcmpgtq_m_n): Likewise.
18442 (vcmpgtq_m): Likewise.
18443 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
18445 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
18446 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
18447 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
18448 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
18449 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
18450 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
18451 * config/arm/constraints.md (Rc): Define constraint to check constant is
18452 in the range of 0 to 15.
18453 (Re): Define constraint to check constant is in the range of 0 to 31.
18454 * config/arm/mve.md (VADDVAQ_P): Define iterator.
18455 (VCLZQ_M): Likewise.
18456 (VCMPEQQ_M_N): Likewise.
18457 (VCMPEQQ_M): Likewise.
18458 (VCMPNEQ_M_N): Likewise.
18459 (VCMPNEQ_M): Likewise.
18460 (VDUPQ_M_N): Likewise.
18461 (VMAXVQ_P): Likewise.
18462 (VMINVQ_P): Likewise.
18463 (VMLADAVAQ): Likewise.
18464 (VMLADAVQ_P): Likewise.
18465 (VMLAQ_N): Likewise.
18466 (VMLASQ_N): Likewise.
18467 (VMVNQ_M): Likewise.
18468 (VPSELQ): Likewise.
18469 (VQDMLAHQ_N): Likewise.
18470 (VQRDMLAHQ_N): Likewise.
18471 (VQRDMLASHQ_N): Likewise.
18472 (VQRSHLQ_M_N): Likewise.
18473 (VQSHLQ_M_R): Likewise.
18474 (VREV64Q_M): Likewise.
18475 (VRSHLQ_M_N): Likewise.
18476 (VSHLQ_M_R): Likewise.
18477 (VSLIQ_N): Likewise.
18478 (VSRIQ_N): Likewise.
18479 (mve_vabsq_m_s<mode>): Define RTL pattern.
18480 (mve_vaddvaq_p_<supf><mode>): Likewise.
18481 (mve_vclsq_m_s<mode>): Likewise.
18482 (mve_vclzq_m_<supf><mode>): Likewise.
18483 (mve_vcmpcsq_m_n_u<mode>): Likewise.
18484 (mve_vcmpcsq_m_u<mode>): Likewise.
18485 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
18486 (mve_vcmpeqq_m_<supf><mode>): Likewise.
18487 (mve_vcmpgeq_m_n_s<mode>): Likewise.
18488 (mve_vcmpgeq_m_s<mode>): Likewise.
18489 (mve_vcmpgtq_m_n_s<mode>): Likewise.
18490 (mve_vcmpgtq_m_s<mode>): Likewise.
18491 (mve_vcmphiq_m_n_u<mode>): Likewise.
18492 (mve_vcmphiq_m_u<mode>): Likewise.
18493 (mve_vcmpleq_m_n_s<mode>): Likewise.
18494 (mve_vcmpleq_m_s<mode>): Likewise.
18495 (mve_vcmpltq_m_n_s<mode>): Likewise.
18496 (mve_vcmpltq_m_s<mode>): Likewise.
18497 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
18498 (mve_vcmpneq_m_<supf><mode>): Likewise.
18499 (mve_vdupq_m_n_<supf><mode>): Likewise.
18500 (mve_vmaxaq_m_s<mode>): Likewise.
18501 (mve_vmaxavq_p_s<mode>): Likewise.
18502 (mve_vmaxvq_p_<supf><mode>): Likewise.
18503 (mve_vminaq_m_s<mode>): Likewise.
18504 (mve_vminavq_p_s<mode>): Likewise.
18505 (mve_vminvq_p_<supf><mode>): Likewise.
18506 (mve_vmladavaq_<supf><mode>): Likewise.
18507 (mve_vmladavq_p_<supf><mode>): Likewise.
18508 (mve_vmladavxq_p_s<mode>): Likewise.
18509 (mve_vmlaq_n_<supf><mode>): Likewise.
18510 (mve_vmlasq_n_<supf><mode>): Likewise.
18511 (mve_vmlsdavq_p_s<mode>): Likewise.
18512 (mve_vmlsdavxq_p_s<mode>): Likewise.
18513 (mve_vmvnq_m_<supf><mode>): Likewise.
18514 (mve_vnegq_m_s<mode>): Likewise.
18515 (mve_vpselq_<supf><mode>): Likewise.
18516 (mve_vqabsq_m_s<mode>): Likewise.
18517 (mve_vqdmlahq_n_<supf><mode>): Likewise.
18518 (mve_vqnegq_m_s<mode>): Likewise.
18519 (mve_vqrdmladhq_s<mode>): Likewise.
18520 (mve_vqrdmladhxq_s<mode>): Likewise.
18521 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
18522 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
18523 (mve_vqrdmlsdhq_s<mode>): Likewise.
18524 (mve_vqrdmlsdhxq_s<mode>): Likewise.
18525 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
18526 (mve_vqshlq_m_r_<supf><mode>): Likewise.
18527 (mve_vrev64q_m_<supf><mode>): Likewise.
18528 (mve_vrshlq_m_n_<supf><mode>): Likewise.
18529 (mve_vshlq_m_r_<supf><mode>): Likewise.
18530 (mve_vsliq_n_<supf><mode>): Likewise.
18531 (mve_vsriq_n_<supf><mode>): Likewise.
18532 (mve_vqdmlsdhxq_s<mode>): Likewise.
18533 (mve_vqdmlsdhq_s<mode>): Likewise.
18534 (mve_vqdmladhxq_s<mode>): Likewise.
18535 (mve_vqdmladhq_s<mode>): Likewise.
18536 (mve_vmlsdavaxq_s<mode>): Likewise.
18537 (mve_vmlsdavaq_s<mode>): Likewise.
18538 (mve_vmladavaxq_s<mode>): Likewise.
18539 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
18540 matching constraint Rc.
18541 (mve_imm_31): Define predicate to check the matching constraint Re.
18543 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
18545 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
18546 (vec_cmp<mode>di_dup): Likewise.
18547 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
18549 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
18551 * config/gcn/gcn-valu.md (COND_MODE): Delete.
18552 (COND_INT_MODE): Delete.
18553 (cond_op): Add "mult".
18554 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
18555 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
18557 2020-03-18 Richard Biener <rguenther@suse.de>
18559 PR middle-end/94206
18560 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
18561 partial int modes or not mode-precision integer types for
18564 2020-03-18 Jakub Jelinek <jakub@redhat.com>
18566 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
18568 * config/arc/arc.c (frame_stack_add): Likewise.
18569 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
18571 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
18572 * tree-ssa-strlen.h (handle_printf_call): Likewise.
18573 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
18574 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
18576 2020-03-18 Duan bo <duanbo3@huawei.com>
18579 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
18580 (@ldr_got_tiny_<mode>): New pattern.
18581 (ldr_got_tiny_sidi): Likewise.
18582 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
18583 them to handle SYMBOL_TINY_GOT for ILP32.
18585 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
18587 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
18588 call-preserved for SVE PCS functions.
18589 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
18590 Optimize the case in which there are no following vector save slots.
18592 2020-03-18 Richard Biener <rguenther@suse.de>
18594 PR middle-end/94188
18595 * fold-const.c (build_fold_addr_expr): Convert address to
18597 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
18598 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
18599 to build the ADDR_EXPR which we don't really want to simplify.
18600 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
18601 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
18602 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
18603 (simplify_builtin_call): Strip useless type conversions.
18604 * tree-ssa-strlen.c (new_strinfo): Likewise.
18606 2020-03-17 Alexey Neyman <stilor@att.net>
18609 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
18610 the debug level is terse and the declaration is public. Do not
18611 generate type info.
18612 (dwarf2out_decl): Same.
18613 (add_type_attribute): Return immediately if debug level is
18616 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
18618 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
18620 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18621 Mihail Ionescu <mihail.ionescu@arm.com>
18622 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18624 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
18625 Define qualifier for ternary operands.
18626 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
18627 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18628 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18629 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
18630 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
18631 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
18632 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18633 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
18634 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18635 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
18636 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
18637 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
18638 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
18639 * config/arm/arm_mve.h (vabavq_s8): Define macro.
18640 (vabavq_s16): Likewise.
18641 (vabavq_s32): Likewise.
18642 (vbicq_m_n_s16): Likewise.
18643 (vbicq_m_n_s32): Likewise.
18644 (vbicq_m_n_u16): Likewise.
18645 (vbicq_m_n_u32): Likewise.
18646 (vcmpeqq_m_f16): Likewise.
18647 (vcmpeqq_m_f32): Likewise.
18648 (vcvtaq_m_s16_f16): Likewise.
18649 (vcvtaq_m_u16_f16): Likewise.
18650 (vcvtaq_m_s32_f32): Likewise.
18651 (vcvtaq_m_u32_f32): Likewise.
18652 (vcvtq_m_f16_s16): Likewise.
18653 (vcvtq_m_f16_u16): Likewise.
18654 (vcvtq_m_f32_s32): Likewise.
18655 (vcvtq_m_f32_u32): Likewise.
18656 (vqrshrnbq_n_s16): Likewise.
18657 (vqrshrnbq_n_u16): Likewise.
18658 (vqrshrnbq_n_s32): Likewise.
18659 (vqrshrnbq_n_u32): Likewise.
18660 (vqrshrunbq_n_s16): Likewise.
18661 (vqrshrunbq_n_s32): Likewise.
18662 (vrmlaldavhaq_s32): Likewise.
18663 (vrmlaldavhaq_u32): Likewise.
18664 (vshlcq_s8): Likewise.
18665 (vshlcq_u8): Likewise.
18666 (vshlcq_s16): Likewise.
18667 (vshlcq_u16): Likewise.
18668 (vshlcq_s32): Likewise.
18669 (vshlcq_u32): Likewise.
18670 (vabavq_u8): Likewise.
18671 (vabavq_u16): Likewise.
18672 (vabavq_u32): Likewise.
18673 (__arm_vabavq_s8): Define intrinsic.
18674 (__arm_vabavq_s16): Likewise.
18675 (__arm_vabavq_s32): Likewise.
18676 (__arm_vabavq_u8): Likewise.
18677 (__arm_vabavq_u16): Likewise.
18678 (__arm_vabavq_u32): Likewise.
18679 (__arm_vbicq_m_n_s16): Likewise.
18680 (__arm_vbicq_m_n_s32): Likewise.
18681 (__arm_vbicq_m_n_u16): Likewise.
18682 (__arm_vbicq_m_n_u32): Likewise.
18683 (__arm_vqrshrnbq_n_s16): Likewise.
18684 (__arm_vqrshrnbq_n_u16): Likewise.
18685 (__arm_vqrshrnbq_n_s32): Likewise.
18686 (__arm_vqrshrnbq_n_u32): Likewise.
18687 (__arm_vqrshrunbq_n_s16): Likewise.
18688 (__arm_vqrshrunbq_n_s32): Likewise.
18689 (__arm_vrmlaldavhaq_s32): Likewise.
18690 (__arm_vrmlaldavhaq_u32): Likewise.
18691 (__arm_vshlcq_s8): Likewise.
18692 (__arm_vshlcq_u8): Likewise.
18693 (__arm_vshlcq_s16): Likewise.
18694 (__arm_vshlcq_u16): Likewise.
18695 (__arm_vshlcq_s32): Likewise.
18696 (__arm_vshlcq_u32): Likewise.
18697 (__arm_vcmpeqq_m_f16): Likewise.
18698 (__arm_vcmpeqq_m_f32): Likewise.
18699 (__arm_vcvtaq_m_s16_f16): Likewise.
18700 (__arm_vcvtaq_m_u16_f16): Likewise.
18701 (__arm_vcvtaq_m_s32_f32): Likewise.
18702 (__arm_vcvtaq_m_u32_f32): Likewise.
18703 (__arm_vcvtq_m_f16_s16): Likewise.
18704 (__arm_vcvtq_m_f16_u16): Likewise.
18705 (__arm_vcvtq_m_f32_s32): Likewise.
18706 (__arm_vcvtq_m_f32_u32): Likewise.
18707 (vcvtaq_m): Define polymorphic variant.
18708 (vcvtq_m): Likewise.
18709 (vabavq): Likewise.
18710 (vshlcq): Likewise.
18711 (vbicq_m_n): Likewise.
18712 (vqrshrnbq_n): Likewise.
18713 (vqrshrunbq_n): Likewise.
18714 * config/arm/arm_mve_builtins.def
18715 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
18716 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
18717 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18718 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18719 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
18720 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
18721 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
18722 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18723 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
18724 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18725 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
18726 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
18727 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
18728 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
18729 * config/arm/mve.md (VBICQ_M_N): Define iterator.
18730 (VCVTAQ_M): Likewise.
18731 (VCVTQ_M_TO_F): Likewise.
18732 (VQRSHRNBQ_N): Likewise.
18733 (VABAVQ): Likewise.
18734 (VSHLCQ): Likewise.
18735 (VRMLALDAVHAQ): Likewise.
18736 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
18737 (mve_vcmpeqq_m_f<mode>): Likewise.
18738 (mve_vcvtaq_m_<supf><mode>): Likewise.
18739 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
18740 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
18741 (mve_vqrshrunbq_n_s<mode>): Likewise.
18742 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
18743 (mve_vabavq_<supf><mode>): Likewise.
18744 (mve_vshlcq_<supf><mode>): Likewise.
18745 (mve_vshlcq_<supf><mode>): Likewise.
18746 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
18747 (mve_vshlcq_carry_<supf><mode>): Likewise.
18749 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18750 Mihail Ionescu <mihail.ionescu@arm.com>
18751 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18753 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
18754 (vqmovnbq_u16): Likewise.
18755 (vmulltq_poly_p8): Likewise.
18756 (vmullbq_poly_p8): Likewise.
18757 (vmovntq_u16): Likewise.
18758 (vmovnbq_u16): Likewise.
18759 (vmlaldavxq_u16): Likewise.
18760 (vmlaldavq_u16): Likewise.
18761 (vqmovuntq_s16): Likewise.
18762 (vqmovunbq_s16): Likewise.
18763 (vshlltq_n_u8): Likewise.
18764 (vshllbq_n_u8): Likewise.
18765 (vorrq_n_u16): Likewise.
18766 (vbicq_n_u16): Likewise.
18767 (vcmpneq_n_f16): Likewise.
18768 (vcmpneq_f16): Likewise.
18769 (vcmpltq_n_f16): Likewise.
18770 (vcmpltq_f16): Likewise.
18771 (vcmpleq_n_f16): Likewise.
18772 (vcmpleq_f16): Likewise.
18773 (vcmpgtq_n_f16): Likewise.
18774 (vcmpgtq_f16): Likewise.
18775 (vcmpgeq_n_f16): Likewise.
18776 (vcmpgeq_f16): Likewise.
18777 (vcmpeqq_n_f16): Likewise.
18778 (vcmpeqq_f16): Likewise.
18779 (vsubq_f16): Likewise.
18780 (vqmovntq_s16): Likewise.
18781 (vqmovnbq_s16): Likewise.
18782 (vqdmulltq_s16): Likewise.
18783 (vqdmulltq_n_s16): Likewise.
18784 (vqdmullbq_s16): Likewise.
18785 (vqdmullbq_n_s16): Likewise.
18786 (vorrq_f16): Likewise.
18787 (vornq_f16): Likewise.
18788 (vmulq_n_f16): Likewise.
18789 (vmulq_f16): Likewise.
18790 (vmovntq_s16): Likewise.
18791 (vmovnbq_s16): Likewise.
18792 (vmlsldavxq_s16): Likewise.
18793 (vmlsldavq_s16): Likewise.
18794 (vmlaldavxq_s16): Likewise.
18795 (vmlaldavq_s16): Likewise.
18796 (vminnmvq_f16): Likewise.
18797 (vminnmq_f16): Likewise.
18798 (vminnmavq_f16): Likewise.
18799 (vminnmaq_f16): Likewise.
18800 (vmaxnmvq_f16): Likewise.
18801 (vmaxnmq_f16): Likewise.
18802 (vmaxnmavq_f16): Likewise.
18803 (vmaxnmaq_f16): Likewise.
18804 (veorq_f16): Likewise.
18805 (vcmulq_rot90_f16): Likewise.
18806 (vcmulq_rot270_f16): Likewise.
18807 (vcmulq_rot180_f16): Likewise.
18808 (vcmulq_f16): Likewise.
18809 (vcaddq_rot90_f16): Likewise.
18810 (vcaddq_rot270_f16): Likewise.
18811 (vbicq_f16): Likewise.
18812 (vandq_f16): Likewise.
18813 (vaddq_n_f16): Likewise.
18814 (vabdq_f16): Likewise.
18815 (vshlltq_n_s8): Likewise.
18816 (vshllbq_n_s8): Likewise.
18817 (vorrq_n_s16): Likewise.
18818 (vbicq_n_s16): Likewise.
18819 (vqmovntq_u32): Likewise.
18820 (vqmovnbq_u32): Likewise.
18821 (vmulltq_poly_p16): Likewise.
18822 (vmullbq_poly_p16): Likewise.
18823 (vmovntq_u32): Likewise.
18824 (vmovnbq_u32): Likewise.
18825 (vmlaldavxq_u32): Likewise.
18826 (vmlaldavq_u32): Likewise.
18827 (vqmovuntq_s32): Likewise.
18828 (vqmovunbq_s32): Likewise.
18829 (vshlltq_n_u16): Likewise.
18830 (vshllbq_n_u16): Likewise.
18831 (vorrq_n_u32): Likewise.
18832 (vbicq_n_u32): Likewise.
18833 (vcmpneq_n_f32): Likewise.
18834 (vcmpneq_f32): Likewise.
18835 (vcmpltq_n_f32): Likewise.
18836 (vcmpltq_f32): Likewise.
18837 (vcmpleq_n_f32): Likewise.
18838 (vcmpleq_f32): Likewise.
18839 (vcmpgtq_n_f32): Likewise.
18840 (vcmpgtq_f32): Likewise.
18841 (vcmpgeq_n_f32): Likewise.
18842 (vcmpgeq_f32): Likewise.
18843 (vcmpeqq_n_f32): Likewise.
18844 (vcmpeqq_f32): Likewise.
18845 (vsubq_f32): Likewise.
18846 (vqmovntq_s32): Likewise.
18847 (vqmovnbq_s32): Likewise.
18848 (vqdmulltq_s32): Likewise.
18849 (vqdmulltq_n_s32): Likewise.
18850 (vqdmullbq_s32): Likewise.
18851 (vqdmullbq_n_s32): Likewise.
18852 (vorrq_f32): Likewise.
18853 (vornq_f32): Likewise.
18854 (vmulq_n_f32): Likewise.
18855 (vmulq_f32): Likewise.
18856 (vmovntq_s32): Likewise.
18857 (vmovnbq_s32): Likewise.
18858 (vmlsldavxq_s32): Likewise.
18859 (vmlsldavq_s32): Likewise.
18860 (vmlaldavxq_s32): Likewise.
18861 (vmlaldavq_s32): Likewise.
18862 (vminnmvq_f32): Likewise.
18863 (vminnmq_f32): Likewise.
18864 (vminnmavq_f32): Likewise.
18865 (vminnmaq_f32): Likewise.
18866 (vmaxnmvq_f32): Likewise.
18867 (vmaxnmq_f32): Likewise.
18868 (vmaxnmavq_f32): Likewise.
18869 (vmaxnmaq_f32): Likewise.
18870 (veorq_f32): Likewise.
18871 (vcmulq_rot90_f32): Likewise.
18872 (vcmulq_rot270_f32): Likewise.
18873 (vcmulq_rot180_f32): Likewise.
18874 (vcmulq_f32): Likewise.
18875 (vcaddq_rot90_f32): Likewise.
18876 (vcaddq_rot270_f32): Likewise.
18877 (vbicq_f32): Likewise.
18878 (vandq_f32): Likewise.
18879 (vaddq_n_f32): Likewise.
18880 (vabdq_f32): Likewise.
18881 (vshlltq_n_s16): Likewise.
18882 (vshllbq_n_s16): Likewise.
18883 (vorrq_n_s32): Likewise.
18884 (vbicq_n_s32): Likewise.
18885 (vrmlaldavhq_u32): Likewise.
18886 (vctp8q_m): Likewise.
18887 (vctp64q_m): Likewise.
18888 (vctp32q_m): Likewise.
18889 (vctp16q_m): Likewise.
18890 (vaddlvaq_u32): Likewise.
18891 (vrmlsldavhxq_s32): Likewise.
18892 (vrmlsldavhq_s32): Likewise.
18893 (vrmlaldavhxq_s32): Likewise.
18894 (vrmlaldavhq_s32): Likewise.
18895 (vcvttq_f16_f32): Likewise.
18896 (vcvtbq_f16_f32): Likewise.
18897 (vaddlvaq_s32): Likewise.
18898 (__arm_vqmovntq_u16): Define intrinsic.
18899 (__arm_vqmovnbq_u16): Likewise.
18900 (__arm_vmulltq_poly_p8): Likewise.
18901 (__arm_vmullbq_poly_p8): Likewise.
18902 (__arm_vmovntq_u16): Likewise.
18903 (__arm_vmovnbq_u16): Likewise.
18904 (__arm_vmlaldavxq_u16): Likewise.
18905 (__arm_vmlaldavq_u16): Likewise.
18906 (__arm_vqmovuntq_s16): Likewise.
18907 (__arm_vqmovunbq_s16): Likewise.
18908 (__arm_vshlltq_n_u8): Likewise.
18909 (__arm_vshllbq_n_u8): Likewise.
18910 (__arm_vorrq_n_u16): Likewise.
18911 (__arm_vbicq_n_u16): Likewise.
18912 (__arm_vcmpneq_n_f16): Likewise.
18913 (__arm_vcmpneq_f16): Likewise.
18914 (__arm_vcmpltq_n_f16): Likewise.
18915 (__arm_vcmpltq_f16): Likewise.
18916 (__arm_vcmpleq_n_f16): Likewise.
18917 (__arm_vcmpleq_f16): Likewise.
18918 (__arm_vcmpgtq_n_f16): Likewise.
18919 (__arm_vcmpgtq_f16): Likewise.
18920 (__arm_vcmpgeq_n_f16): Likewise.
18921 (__arm_vcmpgeq_f16): Likewise.
18922 (__arm_vcmpeqq_n_f16): Likewise.
18923 (__arm_vcmpeqq_f16): Likewise.
18924 (__arm_vsubq_f16): Likewise.
18925 (__arm_vqmovntq_s16): Likewise.
18926 (__arm_vqmovnbq_s16): Likewise.
18927 (__arm_vqdmulltq_s16): Likewise.
18928 (__arm_vqdmulltq_n_s16): Likewise.
18929 (__arm_vqdmullbq_s16): Likewise.
18930 (__arm_vqdmullbq_n_s16): Likewise.
18931 (__arm_vorrq_f16): Likewise.
18932 (__arm_vornq_f16): Likewise.
18933 (__arm_vmulq_n_f16): Likewise.
18934 (__arm_vmulq_f16): Likewise.
18935 (__arm_vmovntq_s16): Likewise.
18936 (__arm_vmovnbq_s16): Likewise.
18937 (__arm_vmlsldavxq_s16): Likewise.
18938 (__arm_vmlsldavq_s16): Likewise.
18939 (__arm_vmlaldavxq_s16): Likewise.
18940 (__arm_vmlaldavq_s16): Likewise.
18941 (__arm_vminnmvq_f16): Likewise.
18942 (__arm_vminnmq_f16): Likewise.
18943 (__arm_vminnmavq_f16): Likewise.
18944 (__arm_vminnmaq_f16): Likewise.
18945 (__arm_vmaxnmvq_f16): Likewise.
18946 (__arm_vmaxnmq_f16): Likewise.
18947 (__arm_vmaxnmavq_f16): Likewise.
18948 (__arm_vmaxnmaq_f16): Likewise.
18949 (__arm_veorq_f16): Likewise.
18950 (__arm_vcmulq_rot90_f16): Likewise.
18951 (__arm_vcmulq_rot270_f16): Likewise.
18952 (__arm_vcmulq_rot180_f16): Likewise.
18953 (__arm_vcmulq_f16): Likewise.
18954 (__arm_vcaddq_rot90_f16): Likewise.
18955 (__arm_vcaddq_rot270_f16): Likewise.
18956 (__arm_vbicq_f16): Likewise.
18957 (__arm_vandq_f16): Likewise.
18958 (__arm_vaddq_n_f16): Likewise.
18959 (__arm_vabdq_f16): Likewise.
18960 (__arm_vshlltq_n_s8): Likewise.
18961 (__arm_vshllbq_n_s8): Likewise.
18962 (__arm_vorrq_n_s16): Likewise.
18963 (__arm_vbicq_n_s16): Likewise.
18964 (__arm_vqmovntq_u32): Likewise.
18965 (__arm_vqmovnbq_u32): Likewise.
18966 (__arm_vmulltq_poly_p16): Likewise.
18967 (__arm_vmullbq_poly_p16): Likewise.
18968 (__arm_vmovntq_u32): Likewise.
18969 (__arm_vmovnbq_u32): Likewise.
18970 (__arm_vmlaldavxq_u32): Likewise.
18971 (__arm_vmlaldavq_u32): Likewise.
18972 (__arm_vqmovuntq_s32): Likewise.
18973 (__arm_vqmovunbq_s32): Likewise.
18974 (__arm_vshlltq_n_u16): Likewise.
18975 (__arm_vshllbq_n_u16): Likewise.
18976 (__arm_vorrq_n_u32): Likewise.
18977 (__arm_vbicq_n_u32): Likewise.
18978 (__arm_vcmpneq_n_f32): Likewise.
18979 (__arm_vcmpneq_f32): Likewise.
18980 (__arm_vcmpltq_n_f32): Likewise.
18981 (__arm_vcmpltq_f32): Likewise.
18982 (__arm_vcmpleq_n_f32): Likewise.
18983 (__arm_vcmpleq_f32): Likewise.
18984 (__arm_vcmpgtq_n_f32): Likewise.
18985 (__arm_vcmpgtq_f32): Likewise.
18986 (__arm_vcmpgeq_n_f32): Likewise.
18987 (__arm_vcmpgeq_f32): Likewise.
18988 (__arm_vcmpeqq_n_f32): Likewise.
18989 (__arm_vcmpeqq_f32): Likewise.
18990 (__arm_vsubq_f32): Likewise.
18991 (__arm_vqmovntq_s32): Likewise.
18992 (__arm_vqmovnbq_s32): Likewise.
18993 (__arm_vqdmulltq_s32): Likewise.
18994 (__arm_vqdmulltq_n_s32): Likewise.
18995 (__arm_vqdmullbq_s32): Likewise.
18996 (__arm_vqdmullbq_n_s32): Likewise.
18997 (__arm_vorrq_f32): Likewise.
18998 (__arm_vornq_f32): Likewise.
18999 (__arm_vmulq_n_f32): Likewise.
19000 (__arm_vmulq_f32): Likewise.
19001 (__arm_vmovntq_s32): Likewise.
19002 (__arm_vmovnbq_s32): Likewise.
19003 (__arm_vmlsldavxq_s32): Likewise.
19004 (__arm_vmlsldavq_s32): Likewise.
19005 (__arm_vmlaldavxq_s32): Likewise.
19006 (__arm_vmlaldavq_s32): Likewise.
19007 (__arm_vminnmvq_f32): Likewise.
19008 (__arm_vminnmq_f32): Likewise.
19009 (__arm_vminnmavq_f32): Likewise.
19010 (__arm_vminnmaq_f32): Likewise.
19011 (__arm_vmaxnmvq_f32): Likewise.
19012 (__arm_vmaxnmq_f32): Likewise.
19013 (__arm_vmaxnmavq_f32): Likewise.
19014 (__arm_vmaxnmaq_f32): Likewise.
19015 (__arm_veorq_f32): Likewise.
19016 (__arm_vcmulq_rot90_f32): Likewise.
19017 (__arm_vcmulq_rot270_f32): Likewise.
19018 (__arm_vcmulq_rot180_f32): Likewise.
19019 (__arm_vcmulq_f32): Likewise.
19020 (__arm_vcaddq_rot90_f32): Likewise.
19021 (__arm_vcaddq_rot270_f32): Likewise.
19022 (__arm_vbicq_f32): Likewise.
19023 (__arm_vandq_f32): Likewise.
19024 (__arm_vaddq_n_f32): Likewise.
19025 (__arm_vabdq_f32): Likewise.
19026 (__arm_vshlltq_n_s16): Likewise.
19027 (__arm_vshllbq_n_s16): Likewise.
19028 (__arm_vorrq_n_s32): Likewise.
19029 (__arm_vbicq_n_s32): Likewise.
19030 (__arm_vrmlaldavhq_u32): Likewise.
19031 (__arm_vctp8q_m): Likewise.
19032 (__arm_vctp64q_m): Likewise.
19033 (__arm_vctp32q_m): Likewise.
19034 (__arm_vctp16q_m): Likewise.
19035 (__arm_vaddlvaq_u32): Likewise.
19036 (__arm_vrmlsldavhxq_s32): Likewise.
19037 (__arm_vrmlsldavhq_s32): Likewise.
19038 (__arm_vrmlaldavhxq_s32): Likewise.
19039 (__arm_vrmlaldavhq_s32): Likewise.
19040 (__arm_vcvttq_f16_f32): Likewise.
19041 (__arm_vcvtbq_f16_f32): Likewise.
19042 (__arm_vaddlvaq_s32): Likewise.
19043 (vst4q): Define polymorphic variant.
19044 (vrndxq): Likewise.
19046 (vrndpq): Likewise.
19047 (vrndnq): Likewise.
19048 (vrndmq): Likewise.
19049 (vrndaq): Likewise.
19050 (vrev64q): Likewise.
19052 (vdupq_n): Likewise.
19054 (vrev32q): Likewise.
19055 (vcvtbq_f32): Likewise.
19056 (vcvttq_f32): Likewise.
19058 (vsubq_n): Likewise.
19059 (vbrsrq_n): Likewise.
19060 (vcvtq_n): Likewise.
19064 (vaddq_n): Likewise.
19068 (vmulq_n): Likewise.
19070 (vcaddq_rot270): Likewise.
19071 (vcmpeqq_n): Likewise.
19072 (vcmpeqq): Likewise.
19073 (vcaddq_rot90): Likewise.
19074 (vcmpgeq_n): Likewise.
19075 (vcmpgeq): Likewise.
19076 (vcmpgtq_n): Likewise.
19077 (vcmpgtq): Likewise.
19078 (vcmpgtq): Likewise.
19079 (vcmpleq_n): Likewise.
19080 (vcmpleq_n): Likewise.
19081 (vcmpleq): Likewise.
19082 (vcmpleq): Likewise.
19083 (vcmpltq_n): Likewise.
19084 (vcmpltq_n): Likewise.
19085 (vcmpltq): Likewise.
19086 (vcmpltq): Likewise.
19087 (vcmpneq_n): Likewise.
19088 (vcmpneq_n): Likewise.
19089 (vcmpneq): Likewise.
19090 (vcmpneq): Likewise.
19091 (vcmulq): Likewise.
19092 (vcmulq): Likewise.
19093 (vcmulq_rot180): Likewise.
19094 (vcmulq_rot180): Likewise.
19095 (vcmulq_rot270): Likewise.
19096 (vcmulq_rot270): Likewise.
19097 (vcmulq_rot90): Likewise.
19098 (vcmulq_rot90): Likewise.
19101 (vmaxnmaq): Likewise.
19102 (vmaxnmaq): Likewise.
19103 (vmaxnmavq): Likewise.
19104 (vmaxnmavq): Likewise.
19105 (vmaxnmq): Likewise.
19106 (vmaxnmq): Likewise.
19107 (vmaxnmvq): Likewise.
19108 (vmaxnmvq): Likewise.
19109 (vminnmaq): Likewise.
19110 (vminnmaq): Likewise.
19111 (vminnmavq): Likewise.
19112 (vminnmavq): Likewise.
19113 (vminnmq): Likewise.
19114 (vminnmq): Likewise.
19115 (vminnmvq): Likewise.
19116 (vminnmvq): Likewise.
19117 (vbicq_n): Likewise.
19118 (vqmovntq): Likewise.
19119 (vqmovntq): Likewise.
19120 (vqmovnbq): Likewise.
19121 (vqmovnbq): Likewise.
19122 (vmulltq_poly): Likewise.
19123 (vmulltq_poly): Likewise.
19124 (vmullbq_poly): Likewise.
19125 (vmullbq_poly): Likewise.
19126 (vmovntq): Likewise.
19127 (vmovntq): Likewise.
19128 (vmovnbq): Likewise.
19129 (vmovnbq): Likewise.
19130 (vmlaldavxq): Likewise.
19131 (vmlaldavxq): Likewise.
19132 (vqmovuntq): Likewise.
19133 (vqmovuntq): Likewise.
19134 (vshlltq_n): Likewise.
19135 (vshlltq_n): Likewise.
19136 (vshllbq_n): Likewise.
19137 (vshllbq_n): Likewise.
19138 (vorrq_n): Likewise.
19139 (vorrq_n): Likewise.
19140 (vmlaldavq): Likewise.
19141 (vmlaldavq): Likewise.
19142 (vqmovunbq): Likewise.
19143 (vqmovunbq): Likewise.
19144 (vqdmulltq_n): Likewise.
19145 (vqdmulltq_n): Likewise.
19146 (vqdmulltq): Likewise.
19147 (vqdmulltq): Likewise.
19148 (vqdmullbq_n): Likewise.
19149 (vqdmullbq_n): Likewise.
19150 (vqdmullbq): Likewise.
19151 (vqdmullbq): Likewise.
19152 (vaddlvaq): Likewise.
19153 (vaddlvaq): Likewise.
19154 (vrmlaldavhq): Likewise.
19155 (vrmlaldavhq): Likewise.
19156 (vrmlaldavhxq): Likewise.
19157 (vrmlaldavhxq): Likewise.
19158 (vrmlsldavhq): Likewise.
19159 (vrmlsldavhq): Likewise.
19160 (vrmlsldavhxq): Likewise.
19161 (vrmlsldavhxq): Likewise.
19162 (vmlsldavxq): Likewise.
19163 (vmlsldavxq): Likewise.
19164 (vmlsldavq): Likewise.
19165 (vmlsldavq): Likewise.
19166 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
19167 (BINOP_NONE_NONE_NONE): Likewise.
19168 (BINOP_UNONE_NONE_NONE): Likewise.
19169 (BINOP_UNONE_UNONE_IMM): Likewise.
19170 (BINOP_UNONE_UNONE_NONE): Likewise.
19171 (BINOP_UNONE_UNONE_UNONE): Likewise.
19172 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
19173 (mve_vaddlvaq_<supf>v4si): Likewise.
19174 (mve_vaddq_n_f<mode>): Likewise.
19175 (mve_vandq_f<mode>): Likewise.
19176 (mve_vbicq_f<mode>): Likewise.
19177 (mve_vbicq_n_<supf><mode>): Likewise.
19178 (mve_vcaddq_rot270_f<mode>): Likewise.
19179 (mve_vcaddq_rot90_f<mode>): Likewise.
19180 (mve_vcmpeqq_f<mode>): Likewise.
19181 (mve_vcmpeqq_n_f<mode>): Likewise.
19182 (mve_vcmpgeq_f<mode>): Likewise.
19183 (mve_vcmpgeq_n_f<mode>): Likewise.
19184 (mve_vcmpgtq_f<mode>): Likewise.
19185 (mve_vcmpgtq_n_f<mode>): Likewise.
19186 (mve_vcmpleq_f<mode>): Likewise.
19187 (mve_vcmpleq_n_f<mode>): Likewise.
19188 (mve_vcmpltq_f<mode>): Likewise.
19189 (mve_vcmpltq_n_f<mode>): Likewise.
19190 (mve_vcmpneq_f<mode>): Likewise.
19191 (mve_vcmpneq_n_f<mode>): Likewise.
19192 (mve_vcmulq_f<mode>): Likewise.
19193 (mve_vcmulq_rot180_f<mode>): Likewise.
19194 (mve_vcmulq_rot270_f<mode>): Likewise.
19195 (mve_vcmulq_rot90_f<mode>): Likewise.
19196 (mve_vctp<mode1>q_mhi): Likewise.
19197 (mve_vcvtbq_f16_f32v8hf): Likewise.
19198 (mve_vcvttq_f16_f32v8hf): Likewise.
19199 (mve_veorq_f<mode>): Likewise.
19200 (mve_vmaxnmaq_f<mode>): Likewise.
19201 (mve_vmaxnmavq_f<mode>): Likewise.
19202 (mve_vmaxnmq_f<mode>): Likewise.
19203 (mve_vmaxnmvq_f<mode>): Likewise.
19204 (mve_vminnmaq_f<mode>): Likewise.
19205 (mve_vminnmavq_f<mode>): Likewise.
19206 (mve_vminnmq_f<mode>): Likewise.
19207 (mve_vminnmvq_f<mode>): Likewise.
19208 (mve_vmlaldavq_<supf><mode>): Likewise.
19209 (mve_vmlaldavxq_<supf><mode>): Likewise.
19210 (mve_vmlsldavq_s<mode>): Likewise.
19211 (mve_vmlsldavxq_s<mode>): Likewise.
19212 (mve_vmovnbq_<supf><mode>): Likewise.
19213 (mve_vmovntq_<supf><mode>): Likewise.
19214 (mve_vmulq_f<mode>): Likewise.
19215 (mve_vmulq_n_f<mode>): Likewise.
19216 (mve_vornq_f<mode>): Likewise.
19217 (mve_vorrq_f<mode>): Likewise.
19218 (mve_vorrq_n_<supf><mode>): Likewise.
19219 (mve_vqdmullbq_n_s<mode>): Likewise.
19220 (mve_vqdmullbq_s<mode>): Likewise.
19221 (mve_vqdmulltq_n_s<mode>): Likewise.
19222 (mve_vqdmulltq_s<mode>): Likewise.
19223 (mve_vqmovnbq_<supf><mode>): Likewise.
19224 (mve_vqmovntq_<supf><mode>): Likewise.
19225 (mve_vqmovunbq_s<mode>): Likewise.
19226 (mve_vqmovuntq_s<mode>): Likewise.
19227 (mve_vrmlaldavhxq_sv4si): Likewise.
19228 (mve_vrmlsldavhq_sv4si): Likewise.
19229 (mve_vrmlsldavhxq_sv4si): Likewise.
19230 (mve_vshllbq_n_<supf><mode>): Likewise.
19231 (mve_vshlltq_n_<supf><mode>): Likewise.
19232 (mve_vsubq_f<mode>): Likewise.
19233 (mve_vmulltq_poly_p<mode>): Likewise.
19234 (mve_vmullbq_poly_p<mode>): Likewise.
19235 (mve_vrmlaldavhq_<supf>v4si): Likewise.
19237 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19238 Mihail Ionescu <mihail.ionescu@arm.com>
19239 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19241 * config/arm/arm_mve.h (vsubq_u8): Define macro.
19242 (vsubq_n_u8): Likewise.
19243 (vrmulhq_u8): Likewise.
19244 (vrhaddq_u8): Likewise.
19245 (vqsubq_u8): Likewise.
19246 (vqsubq_n_u8): Likewise.
19247 (vqaddq_u8): Likewise.
19248 (vqaddq_n_u8): Likewise.
19249 (vorrq_u8): Likewise.
19250 (vornq_u8): Likewise.
19251 (vmulq_u8): Likewise.
19252 (vmulq_n_u8): Likewise.
19253 (vmulltq_int_u8): Likewise.
19254 (vmullbq_int_u8): Likewise.
19255 (vmulhq_u8): Likewise.
19256 (vmladavq_u8): Likewise.
19257 (vminvq_u8): Likewise.
19258 (vminq_u8): Likewise.
19259 (vmaxvq_u8): Likewise.
19260 (vmaxq_u8): Likewise.
19261 (vhsubq_u8): Likewise.
19262 (vhsubq_n_u8): Likewise.
19263 (vhaddq_u8): Likewise.
19264 (vhaddq_n_u8): Likewise.
19265 (veorq_u8): Likewise.
19266 (vcmpneq_n_u8): Likewise.
19267 (vcmphiq_u8): Likewise.
19268 (vcmphiq_n_u8): Likewise.
19269 (vcmpeqq_u8): Likewise.
19270 (vcmpeqq_n_u8): Likewise.
19271 (vcmpcsq_u8): Likewise.
19272 (vcmpcsq_n_u8): Likewise.
19273 (vcaddq_rot90_u8): Likewise.
19274 (vcaddq_rot270_u8): Likewise.
19275 (vbicq_u8): Likewise.
19276 (vandq_u8): Likewise.
19277 (vaddvq_p_u8): Likewise.
19278 (vaddvaq_u8): Likewise.
19279 (vaddq_n_u8): Likewise.
19280 (vabdq_u8): Likewise.
19281 (vshlq_r_u8): Likewise.
19282 (vrshlq_u8): Likewise.
19283 (vrshlq_n_u8): Likewise.
19284 (vqshlq_u8): Likewise.
19285 (vqshlq_r_u8): Likewise.
19286 (vqrshlq_u8): Likewise.
19287 (vqrshlq_n_u8): Likewise.
19288 (vminavq_s8): Likewise.
19289 (vminaq_s8): Likewise.
19290 (vmaxavq_s8): Likewise.
19291 (vmaxaq_s8): Likewise.
19292 (vbrsrq_n_u8): Likewise.
19293 (vshlq_n_u8): Likewise.
19294 (vrshrq_n_u8): Likewise.
19295 (vqshlq_n_u8): Likewise.
19296 (vcmpneq_n_s8): Likewise.
19297 (vcmpltq_s8): Likewise.
19298 (vcmpltq_n_s8): Likewise.
19299 (vcmpleq_s8): Likewise.
19300 (vcmpleq_n_s8): Likewise.
19301 (vcmpgtq_s8): Likewise.
19302 (vcmpgtq_n_s8): Likewise.
19303 (vcmpgeq_s8): Likewise.
19304 (vcmpgeq_n_s8): Likewise.
19305 (vcmpeqq_s8): Likewise.
19306 (vcmpeqq_n_s8): Likewise.
19307 (vqshluq_n_s8): Likewise.
19308 (vaddvq_p_s8): Likewise.
19309 (vsubq_s8): Likewise.
19310 (vsubq_n_s8): Likewise.
19311 (vshlq_r_s8): Likewise.
19312 (vrshlq_s8): Likewise.
19313 (vrshlq_n_s8): Likewise.
19314 (vrmulhq_s8): Likewise.
19315 (vrhaddq_s8): Likewise.
19316 (vqsubq_s8): Likewise.
19317 (vqsubq_n_s8): Likewise.
19318 (vqshlq_s8): Likewise.
19319 (vqshlq_r_s8): Likewise.
19320 (vqrshlq_s8): Likewise.
19321 (vqrshlq_n_s8): Likewise.
19322 (vqrdmulhq_s8): Likewise.
19323 (vqrdmulhq_n_s8): Likewise.
19324 (vqdmulhq_s8): Likewise.
19325 (vqdmulhq_n_s8): Likewise.
19326 (vqaddq_s8): Likewise.
19327 (vqaddq_n_s8): Likewise.
19328 (vorrq_s8): Likewise.
19329 (vornq_s8): Likewise.
19330 (vmulq_s8): Likewise.
19331 (vmulq_n_s8): Likewise.
19332 (vmulltq_int_s8): Likewise.
19333 (vmullbq_int_s8): Likewise.
19334 (vmulhq_s8): Likewise.
19335 (vmlsdavxq_s8): Likewise.
19336 (vmlsdavq_s8): Likewise.
19337 (vmladavxq_s8): Likewise.
19338 (vmladavq_s8): Likewise.
19339 (vminvq_s8): Likewise.
19340 (vminq_s8): Likewise.
19341 (vmaxvq_s8): Likewise.
19342 (vmaxq_s8): Likewise.
19343 (vhsubq_s8): Likewise.
19344 (vhsubq_n_s8): Likewise.
19345 (vhcaddq_rot90_s8): Likewise.
19346 (vhcaddq_rot270_s8): Likewise.
19347 (vhaddq_s8): Likewise.
19348 (vhaddq_n_s8): Likewise.
19349 (veorq_s8): Likewise.
19350 (vcaddq_rot90_s8): Likewise.
19351 (vcaddq_rot270_s8): Likewise.
19352 (vbrsrq_n_s8): Likewise.
19353 (vbicq_s8): Likewise.
19354 (vandq_s8): Likewise.
19355 (vaddvaq_s8): Likewise.
19356 (vaddq_n_s8): Likewise.
19357 (vabdq_s8): Likewise.
19358 (vshlq_n_s8): Likewise.
19359 (vrshrq_n_s8): Likewise.
19360 (vqshlq_n_s8): Likewise.
19361 (vsubq_u16): Likewise.
19362 (vsubq_n_u16): Likewise.
19363 (vrmulhq_u16): Likewise.
19364 (vrhaddq_u16): Likewise.
19365 (vqsubq_u16): Likewise.
19366 (vqsubq_n_u16): Likewise.
19367 (vqaddq_u16): Likewise.
19368 (vqaddq_n_u16): Likewise.
19369 (vorrq_u16): Likewise.
19370 (vornq_u16): Likewise.
19371 (vmulq_u16): Likewise.
19372 (vmulq_n_u16): Likewise.
19373 (vmulltq_int_u16): Likewise.
19374 (vmullbq_int_u16): Likewise.
19375 (vmulhq_u16): Likewise.
19376 (vmladavq_u16): Likewise.
19377 (vminvq_u16): Likewise.
19378 (vminq_u16): Likewise.
19379 (vmaxvq_u16): Likewise.
19380 (vmaxq_u16): Likewise.
19381 (vhsubq_u16): Likewise.
19382 (vhsubq_n_u16): Likewise.
19383 (vhaddq_u16): Likewise.
19384 (vhaddq_n_u16): Likewise.
19385 (veorq_u16): Likewise.
19386 (vcmpneq_n_u16): Likewise.
19387 (vcmphiq_u16): Likewise.
19388 (vcmphiq_n_u16): Likewise.
19389 (vcmpeqq_u16): Likewise.
19390 (vcmpeqq_n_u16): Likewise.
19391 (vcmpcsq_u16): Likewise.
19392 (vcmpcsq_n_u16): Likewise.
19393 (vcaddq_rot90_u16): Likewise.
19394 (vcaddq_rot270_u16): Likewise.
19395 (vbicq_u16): Likewise.
19396 (vandq_u16): Likewise.
19397 (vaddvq_p_u16): Likewise.
19398 (vaddvaq_u16): Likewise.
19399 (vaddq_n_u16): Likewise.
19400 (vabdq_u16): Likewise.
19401 (vshlq_r_u16): Likewise.
19402 (vrshlq_u16): Likewise.
19403 (vrshlq_n_u16): Likewise.
19404 (vqshlq_u16): Likewise.
19405 (vqshlq_r_u16): Likewise.
19406 (vqrshlq_u16): Likewise.
19407 (vqrshlq_n_u16): Likewise.
19408 (vminavq_s16): Likewise.
19409 (vminaq_s16): Likewise.
19410 (vmaxavq_s16): Likewise.
19411 (vmaxaq_s16): Likewise.
19412 (vbrsrq_n_u16): Likewise.
19413 (vshlq_n_u16): Likewise.
19414 (vrshrq_n_u16): Likewise.
19415 (vqshlq_n_u16): Likewise.
19416 (vcmpneq_n_s16): Likewise.
19417 (vcmpltq_s16): Likewise.
19418 (vcmpltq_n_s16): Likewise.
19419 (vcmpleq_s16): Likewise.
19420 (vcmpleq_n_s16): Likewise.
19421 (vcmpgtq_s16): Likewise.
19422 (vcmpgtq_n_s16): Likewise.
19423 (vcmpgeq_s16): Likewise.
19424 (vcmpgeq_n_s16): Likewise.
19425 (vcmpeqq_s16): Likewise.
19426 (vcmpeqq_n_s16): Likewise.
19427 (vqshluq_n_s16): Likewise.
19428 (vaddvq_p_s16): Likewise.
19429 (vsubq_s16): Likewise.
19430 (vsubq_n_s16): Likewise.
19431 (vshlq_r_s16): Likewise.
19432 (vrshlq_s16): Likewise.
19433 (vrshlq_n_s16): Likewise.
19434 (vrmulhq_s16): Likewise.
19435 (vrhaddq_s16): Likewise.
19436 (vqsubq_s16): Likewise.
19437 (vqsubq_n_s16): Likewise.
19438 (vqshlq_s16): Likewise.
19439 (vqshlq_r_s16): Likewise.
19440 (vqrshlq_s16): Likewise.
19441 (vqrshlq_n_s16): Likewise.
19442 (vqrdmulhq_s16): Likewise.
19443 (vqrdmulhq_n_s16): Likewise.
19444 (vqdmulhq_s16): Likewise.
19445 (vqdmulhq_n_s16): Likewise.
19446 (vqaddq_s16): Likewise.
19447 (vqaddq_n_s16): Likewise.
19448 (vorrq_s16): Likewise.
19449 (vornq_s16): Likewise.
19450 (vmulq_s16): Likewise.
19451 (vmulq_n_s16): Likewise.
19452 (vmulltq_int_s16): Likewise.
19453 (vmullbq_int_s16): Likewise.
19454 (vmulhq_s16): Likewise.
19455 (vmlsdavxq_s16): Likewise.
19456 (vmlsdavq_s16): Likewise.
19457 (vmladavxq_s16): Likewise.
19458 (vmladavq_s16): Likewise.
19459 (vminvq_s16): Likewise.
19460 (vminq_s16): Likewise.
19461 (vmaxvq_s16): Likewise.
19462 (vmaxq_s16): Likewise.
19463 (vhsubq_s16): Likewise.
19464 (vhsubq_n_s16): Likewise.
19465 (vhcaddq_rot90_s16): Likewise.
19466 (vhcaddq_rot270_s16): Likewise.
19467 (vhaddq_s16): Likewise.
19468 (vhaddq_n_s16): Likewise.
19469 (veorq_s16): Likewise.
19470 (vcaddq_rot90_s16): Likewise.
19471 (vcaddq_rot270_s16): Likewise.
19472 (vbrsrq_n_s16): Likewise.
19473 (vbicq_s16): Likewise.
19474 (vandq_s16): Likewise.
19475 (vaddvaq_s16): Likewise.
19476 (vaddq_n_s16): Likewise.
19477 (vabdq_s16): Likewise.
19478 (vshlq_n_s16): Likewise.
19479 (vrshrq_n_s16): Likewise.
19480 (vqshlq_n_s16): Likewise.
19481 (vsubq_u32): Likewise.
19482 (vsubq_n_u32): Likewise.
19483 (vrmulhq_u32): Likewise.
19484 (vrhaddq_u32): Likewise.
19485 (vqsubq_u32): Likewise.
19486 (vqsubq_n_u32): Likewise.
19487 (vqaddq_u32): Likewise.
19488 (vqaddq_n_u32): Likewise.
19489 (vorrq_u32): Likewise.
19490 (vornq_u32): Likewise.
19491 (vmulq_u32): Likewise.
19492 (vmulq_n_u32): Likewise.
19493 (vmulltq_int_u32): Likewise.
19494 (vmullbq_int_u32): Likewise.
19495 (vmulhq_u32): Likewise.
19496 (vmladavq_u32): Likewise.
19497 (vminvq_u32): Likewise.
19498 (vminq_u32): Likewise.
19499 (vmaxvq_u32): Likewise.
19500 (vmaxq_u32): Likewise.
19501 (vhsubq_u32): Likewise.
19502 (vhsubq_n_u32): Likewise.
19503 (vhaddq_u32): Likewise.
19504 (vhaddq_n_u32): Likewise.
19505 (veorq_u32): Likewise.
19506 (vcmpneq_n_u32): Likewise.
19507 (vcmphiq_u32): Likewise.
19508 (vcmphiq_n_u32): Likewise.
19509 (vcmpeqq_u32): Likewise.
19510 (vcmpeqq_n_u32): Likewise.
19511 (vcmpcsq_u32): Likewise.
19512 (vcmpcsq_n_u32): Likewise.
19513 (vcaddq_rot90_u32): Likewise.
19514 (vcaddq_rot270_u32): Likewise.
19515 (vbicq_u32): Likewise.
19516 (vandq_u32): Likewise.
19517 (vaddvq_p_u32): Likewise.
19518 (vaddvaq_u32): Likewise.
19519 (vaddq_n_u32): Likewise.
19520 (vabdq_u32): Likewise.
19521 (vshlq_r_u32): Likewise.
19522 (vrshlq_u32): Likewise.
19523 (vrshlq_n_u32): Likewise.
19524 (vqshlq_u32): Likewise.
19525 (vqshlq_r_u32): Likewise.
19526 (vqrshlq_u32): Likewise.
19527 (vqrshlq_n_u32): Likewise.
19528 (vminavq_s32): Likewise.
19529 (vminaq_s32): Likewise.
19530 (vmaxavq_s32): Likewise.
19531 (vmaxaq_s32): Likewise.
19532 (vbrsrq_n_u32): Likewise.
19533 (vshlq_n_u32): Likewise.
19534 (vrshrq_n_u32): Likewise.
19535 (vqshlq_n_u32): Likewise.
19536 (vcmpneq_n_s32): Likewise.
19537 (vcmpltq_s32): Likewise.
19538 (vcmpltq_n_s32): Likewise.
19539 (vcmpleq_s32): Likewise.
19540 (vcmpleq_n_s32): Likewise.
19541 (vcmpgtq_s32): Likewise.
19542 (vcmpgtq_n_s32): Likewise.
19543 (vcmpgeq_s32): Likewise.
19544 (vcmpgeq_n_s32): Likewise.
19545 (vcmpeqq_s32): Likewise.
19546 (vcmpeqq_n_s32): Likewise.
19547 (vqshluq_n_s32): Likewise.
19548 (vaddvq_p_s32): Likewise.
19549 (vsubq_s32): Likewise.
19550 (vsubq_n_s32): Likewise.
19551 (vshlq_r_s32): Likewise.
19552 (vrshlq_s32): Likewise.
19553 (vrshlq_n_s32): Likewise.
19554 (vrmulhq_s32): Likewise.
19555 (vrhaddq_s32): Likewise.
19556 (vqsubq_s32): Likewise.
19557 (vqsubq_n_s32): Likewise.
19558 (vqshlq_s32): Likewise.
19559 (vqshlq_r_s32): Likewise.
19560 (vqrshlq_s32): Likewise.
19561 (vqrshlq_n_s32): Likewise.
19562 (vqrdmulhq_s32): Likewise.
19563 (vqrdmulhq_n_s32): Likewise.
19564 (vqdmulhq_s32): Likewise.
19565 (vqdmulhq_n_s32): Likewise.
19566 (vqaddq_s32): Likewise.
19567 (vqaddq_n_s32): Likewise.
19568 (vorrq_s32): Likewise.
19569 (vornq_s32): Likewise.
19570 (vmulq_s32): Likewise.
19571 (vmulq_n_s32): Likewise.
19572 (vmulltq_int_s32): Likewise.
19573 (vmullbq_int_s32): Likewise.
19574 (vmulhq_s32): Likewise.
19575 (vmlsdavxq_s32): Likewise.
19576 (vmlsdavq_s32): Likewise.
19577 (vmladavxq_s32): Likewise.
19578 (vmladavq_s32): Likewise.
19579 (vminvq_s32): Likewise.
19580 (vminq_s32): Likewise.
19581 (vmaxvq_s32): Likewise.
19582 (vmaxq_s32): Likewise.
19583 (vhsubq_s32): Likewise.
19584 (vhsubq_n_s32): Likewise.
19585 (vhcaddq_rot90_s32): Likewise.
19586 (vhcaddq_rot270_s32): Likewise.
19587 (vhaddq_s32): Likewise.
19588 (vhaddq_n_s32): Likewise.
19589 (veorq_s32): Likewise.
19590 (vcaddq_rot90_s32): Likewise.
19591 (vcaddq_rot270_s32): Likewise.
19592 (vbrsrq_n_s32): Likewise.
19593 (vbicq_s32): Likewise.
19594 (vandq_s32): Likewise.
19595 (vaddvaq_s32): Likewise.
19596 (vaddq_n_s32): Likewise.
19597 (vabdq_s32): Likewise.
19598 (vshlq_n_s32): Likewise.
19599 (vrshrq_n_s32): Likewise.
19600 (vqshlq_n_s32): Likewise.
19601 (__arm_vsubq_u8): Define intrinsic.
19602 (__arm_vsubq_n_u8): Likewise.
19603 (__arm_vrmulhq_u8): Likewise.
19604 (__arm_vrhaddq_u8): Likewise.
19605 (__arm_vqsubq_u8): Likewise.
19606 (__arm_vqsubq_n_u8): Likewise.
19607 (__arm_vqaddq_u8): Likewise.
19608 (__arm_vqaddq_n_u8): Likewise.
19609 (__arm_vorrq_u8): Likewise.
19610 (__arm_vornq_u8): Likewise.
19611 (__arm_vmulq_u8): Likewise.
19612 (__arm_vmulq_n_u8): Likewise.
19613 (__arm_vmulltq_int_u8): Likewise.
19614 (__arm_vmullbq_int_u8): Likewise.
19615 (__arm_vmulhq_u8): Likewise.
19616 (__arm_vmladavq_u8): Likewise.
19617 (__arm_vminvq_u8): Likewise.
19618 (__arm_vminq_u8): Likewise.
19619 (__arm_vmaxvq_u8): Likewise.
19620 (__arm_vmaxq_u8): Likewise.
19621 (__arm_vhsubq_u8): Likewise.
19622 (__arm_vhsubq_n_u8): Likewise.
19623 (__arm_vhaddq_u8): Likewise.
19624 (__arm_vhaddq_n_u8): Likewise.
19625 (__arm_veorq_u8): Likewise.
19626 (__arm_vcmpneq_n_u8): Likewise.
19627 (__arm_vcmphiq_u8): Likewise.
19628 (__arm_vcmphiq_n_u8): Likewise.
19629 (__arm_vcmpeqq_u8): Likewise.
19630 (__arm_vcmpeqq_n_u8): Likewise.
19631 (__arm_vcmpcsq_u8): Likewise.
19632 (__arm_vcmpcsq_n_u8): Likewise.
19633 (__arm_vcaddq_rot90_u8): Likewise.
19634 (__arm_vcaddq_rot270_u8): Likewise.
19635 (__arm_vbicq_u8): Likewise.
19636 (__arm_vandq_u8): Likewise.
19637 (__arm_vaddvq_p_u8): Likewise.
19638 (__arm_vaddvaq_u8): Likewise.
19639 (__arm_vaddq_n_u8): Likewise.
19640 (__arm_vabdq_u8): Likewise.
19641 (__arm_vshlq_r_u8): Likewise.
19642 (__arm_vrshlq_u8): Likewise.
19643 (__arm_vrshlq_n_u8): Likewise.
19644 (__arm_vqshlq_u8): Likewise.
19645 (__arm_vqshlq_r_u8): Likewise.
19646 (__arm_vqrshlq_u8): Likewise.
19647 (__arm_vqrshlq_n_u8): Likewise.
19648 (__arm_vminavq_s8): Likewise.
19649 (__arm_vminaq_s8): Likewise.
19650 (__arm_vmaxavq_s8): Likewise.
19651 (__arm_vmaxaq_s8): Likewise.
19652 (__arm_vbrsrq_n_u8): Likewise.
19653 (__arm_vshlq_n_u8): Likewise.
19654 (__arm_vrshrq_n_u8): Likewise.
19655 (__arm_vqshlq_n_u8): Likewise.
19656 (__arm_vcmpneq_n_s8): Likewise.
19657 (__arm_vcmpltq_s8): Likewise.
19658 (__arm_vcmpltq_n_s8): Likewise.
19659 (__arm_vcmpleq_s8): Likewise.
19660 (__arm_vcmpleq_n_s8): Likewise.
19661 (__arm_vcmpgtq_s8): Likewise.
19662 (__arm_vcmpgtq_n_s8): Likewise.
19663 (__arm_vcmpgeq_s8): Likewise.
19664 (__arm_vcmpgeq_n_s8): Likewise.
19665 (__arm_vcmpeqq_s8): Likewise.
19666 (__arm_vcmpeqq_n_s8): Likewise.
19667 (__arm_vqshluq_n_s8): Likewise.
19668 (__arm_vaddvq_p_s8): Likewise.
19669 (__arm_vsubq_s8): Likewise.
19670 (__arm_vsubq_n_s8): Likewise.
19671 (__arm_vshlq_r_s8): Likewise.
19672 (__arm_vrshlq_s8): Likewise.
19673 (__arm_vrshlq_n_s8): Likewise.
19674 (__arm_vrmulhq_s8): Likewise.
19675 (__arm_vrhaddq_s8): Likewise.
19676 (__arm_vqsubq_s8): Likewise.
19677 (__arm_vqsubq_n_s8): Likewise.
19678 (__arm_vqshlq_s8): Likewise.
19679 (__arm_vqshlq_r_s8): Likewise.
19680 (__arm_vqrshlq_s8): Likewise.
19681 (__arm_vqrshlq_n_s8): Likewise.
19682 (__arm_vqrdmulhq_s8): Likewise.
19683 (__arm_vqrdmulhq_n_s8): Likewise.
19684 (__arm_vqdmulhq_s8): Likewise.
19685 (__arm_vqdmulhq_n_s8): Likewise.
19686 (__arm_vqaddq_s8): Likewise.
19687 (__arm_vqaddq_n_s8): Likewise.
19688 (__arm_vorrq_s8): Likewise.
19689 (__arm_vornq_s8): Likewise.
19690 (__arm_vmulq_s8): Likewise.
19691 (__arm_vmulq_n_s8): Likewise.
19692 (__arm_vmulltq_int_s8): Likewise.
19693 (__arm_vmullbq_int_s8): Likewise.
19694 (__arm_vmulhq_s8): Likewise.
19695 (__arm_vmlsdavxq_s8): Likewise.
19696 (__arm_vmlsdavq_s8): Likewise.
19697 (__arm_vmladavxq_s8): Likewise.
19698 (__arm_vmladavq_s8): Likewise.
19699 (__arm_vminvq_s8): Likewise.
19700 (__arm_vminq_s8): Likewise.
19701 (__arm_vmaxvq_s8): Likewise.
19702 (__arm_vmaxq_s8): Likewise.
19703 (__arm_vhsubq_s8): Likewise.
19704 (__arm_vhsubq_n_s8): Likewise.
19705 (__arm_vhcaddq_rot90_s8): Likewise.
19706 (__arm_vhcaddq_rot270_s8): Likewise.
19707 (__arm_vhaddq_s8): Likewise.
19708 (__arm_vhaddq_n_s8): Likewise.
19709 (__arm_veorq_s8): Likewise.
19710 (__arm_vcaddq_rot90_s8): Likewise.
19711 (__arm_vcaddq_rot270_s8): Likewise.
19712 (__arm_vbrsrq_n_s8): Likewise.
19713 (__arm_vbicq_s8): Likewise.
19714 (__arm_vandq_s8): Likewise.
19715 (__arm_vaddvaq_s8): Likewise.
19716 (__arm_vaddq_n_s8): Likewise.
19717 (__arm_vabdq_s8): Likewise.
19718 (__arm_vshlq_n_s8): Likewise.
19719 (__arm_vrshrq_n_s8): Likewise.
19720 (__arm_vqshlq_n_s8): Likewise.
19721 (__arm_vsubq_u16): Likewise.
19722 (__arm_vsubq_n_u16): Likewise.
19723 (__arm_vrmulhq_u16): Likewise.
19724 (__arm_vrhaddq_u16): Likewise.
19725 (__arm_vqsubq_u16): Likewise.
19726 (__arm_vqsubq_n_u16): Likewise.
19727 (__arm_vqaddq_u16): Likewise.
19728 (__arm_vqaddq_n_u16): Likewise.
19729 (__arm_vorrq_u16): Likewise.
19730 (__arm_vornq_u16): Likewise.
19731 (__arm_vmulq_u16): Likewise.
19732 (__arm_vmulq_n_u16): Likewise.
19733 (__arm_vmulltq_int_u16): Likewise.
19734 (__arm_vmullbq_int_u16): Likewise.
19735 (__arm_vmulhq_u16): Likewise.
19736 (__arm_vmladavq_u16): Likewise.
19737 (__arm_vminvq_u16): Likewise.
19738 (__arm_vminq_u16): Likewise.
19739 (__arm_vmaxvq_u16): Likewise.
19740 (__arm_vmaxq_u16): Likewise.
19741 (__arm_vhsubq_u16): Likewise.
19742 (__arm_vhsubq_n_u16): Likewise.
19743 (__arm_vhaddq_u16): Likewise.
19744 (__arm_vhaddq_n_u16): Likewise.
19745 (__arm_veorq_u16): Likewise.
19746 (__arm_vcmpneq_n_u16): Likewise.
19747 (__arm_vcmphiq_u16): Likewise.
19748 (__arm_vcmphiq_n_u16): Likewise.
19749 (__arm_vcmpeqq_u16): Likewise.
19750 (__arm_vcmpeqq_n_u16): Likewise.
19751 (__arm_vcmpcsq_u16): Likewise.
19752 (__arm_vcmpcsq_n_u16): Likewise.
19753 (__arm_vcaddq_rot90_u16): Likewise.
19754 (__arm_vcaddq_rot270_u16): Likewise.
19755 (__arm_vbicq_u16): Likewise.
19756 (__arm_vandq_u16): Likewise.
19757 (__arm_vaddvq_p_u16): Likewise.
19758 (__arm_vaddvaq_u16): Likewise.
19759 (__arm_vaddq_n_u16): Likewise.
19760 (__arm_vabdq_u16): Likewise.
19761 (__arm_vshlq_r_u16): Likewise.
19762 (__arm_vrshlq_u16): Likewise.
19763 (__arm_vrshlq_n_u16): Likewise.
19764 (__arm_vqshlq_u16): Likewise.
19765 (__arm_vqshlq_r_u16): Likewise.
19766 (__arm_vqrshlq_u16): Likewise.
19767 (__arm_vqrshlq_n_u16): Likewise.
19768 (__arm_vminavq_s16): Likewise.
19769 (__arm_vminaq_s16): Likewise.
19770 (__arm_vmaxavq_s16): Likewise.
19771 (__arm_vmaxaq_s16): Likewise.
19772 (__arm_vbrsrq_n_u16): Likewise.
19773 (__arm_vshlq_n_u16): Likewise.
19774 (__arm_vrshrq_n_u16): Likewise.
19775 (__arm_vqshlq_n_u16): Likewise.
19776 (__arm_vcmpneq_n_s16): Likewise.
19777 (__arm_vcmpltq_s16): Likewise.
19778 (__arm_vcmpltq_n_s16): Likewise.
19779 (__arm_vcmpleq_s16): Likewise.
19780 (__arm_vcmpleq_n_s16): Likewise.
19781 (__arm_vcmpgtq_s16): Likewise.
19782 (__arm_vcmpgtq_n_s16): Likewise.
19783 (__arm_vcmpgeq_s16): Likewise.
19784 (__arm_vcmpgeq_n_s16): Likewise.
19785 (__arm_vcmpeqq_s16): Likewise.
19786 (__arm_vcmpeqq_n_s16): Likewise.
19787 (__arm_vqshluq_n_s16): Likewise.
19788 (__arm_vaddvq_p_s16): Likewise.
19789 (__arm_vsubq_s16): Likewise.
19790 (__arm_vsubq_n_s16): Likewise.
19791 (__arm_vshlq_r_s16): Likewise.
19792 (__arm_vrshlq_s16): Likewise.
19793 (__arm_vrshlq_n_s16): Likewise.
19794 (__arm_vrmulhq_s16): Likewise.
19795 (__arm_vrhaddq_s16): Likewise.
19796 (__arm_vqsubq_s16): Likewise.
19797 (__arm_vqsubq_n_s16): Likewise.
19798 (__arm_vqshlq_s16): Likewise.
19799 (__arm_vqshlq_r_s16): Likewise.
19800 (__arm_vqrshlq_s16): Likewise.
19801 (__arm_vqrshlq_n_s16): Likewise.
19802 (__arm_vqrdmulhq_s16): Likewise.
19803 (__arm_vqrdmulhq_n_s16): Likewise.
19804 (__arm_vqdmulhq_s16): Likewise.
19805 (__arm_vqdmulhq_n_s16): Likewise.
19806 (__arm_vqaddq_s16): Likewise.
19807 (__arm_vqaddq_n_s16): Likewise.
19808 (__arm_vorrq_s16): Likewise.
19809 (__arm_vornq_s16): Likewise.
19810 (__arm_vmulq_s16): Likewise.
19811 (__arm_vmulq_n_s16): Likewise.
19812 (__arm_vmulltq_int_s16): Likewise.
19813 (__arm_vmullbq_int_s16): Likewise.
19814 (__arm_vmulhq_s16): Likewise.
19815 (__arm_vmlsdavxq_s16): Likewise.
19816 (__arm_vmlsdavq_s16): Likewise.
19817 (__arm_vmladavxq_s16): Likewise.
19818 (__arm_vmladavq_s16): Likewise.
19819 (__arm_vminvq_s16): Likewise.
19820 (__arm_vminq_s16): Likewise.
19821 (__arm_vmaxvq_s16): Likewise.
19822 (__arm_vmaxq_s16): Likewise.
19823 (__arm_vhsubq_s16): Likewise.
19824 (__arm_vhsubq_n_s16): Likewise.
19825 (__arm_vhcaddq_rot90_s16): Likewise.
19826 (__arm_vhcaddq_rot270_s16): Likewise.
19827 (__arm_vhaddq_s16): Likewise.
19828 (__arm_vhaddq_n_s16): Likewise.
19829 (__arm_veorq_s16): Likewise.
19830 (__arm_vcaddq_rot90_s16): Likewise.
19831 (__arm_vcaddq_rot270_s16): Likewise.
19832 (__arm_vbrsrq_n_s16): Likewise.
19833 (__arm_vbicq_s16): Likewise.
19834 (__arm_vandq_s16): Likewise.
19835 (__arm_vaddvaq_s16): Likewise.
19836 (__arm_vaddq_n_s16): Likewise.
19837 (__arm_vabdq_s16): Likewise.
19838 (__arm_vshlq_n_s16): Likewise.
19839 (__arm_vrshrq_n_s16): Likewise.
19840 (__arm_vqshlq_n_s16): Likewise.
19841 (__arm_vsubq_u32): Likewise.
19842 (__arm_vsubq_n_u32): Likewise.
19843 (__arm_vrmulhq_u32): Likewise.
19844 (__arm_vrhaddq_u32): Likewise.
19845 (__arm_vqsubq_u32): Likewise.
19846 (__arm_vqsubq_n_u32): Likewise.
19847 (__arm_vqaddq_u32): Likewise.
19848 (__arm_vqaddq_n_u32): Likewise.
19849 (__arm_vorrq_u32): Likewise.
19850 (__arm_vornq_u32): Likewise.
19851 (__arm_vmulq_u32): Likewise.
19852 (__arm_vmulq_n_u32): Likewise.
19853 (__arm_vmulltq_int_u32): Likewise.
19854 (__arm_vmullbq_int_u32): Likewise.
19855 (__arm_vmulhq_u32): Likewise.
19856 (__arm_vmladavq_u32): Likewise.
19857 (__arm_vminvq_u32): Likewise.
19858 (__arm_vminq_u32): Likewise.
19859 (__arm_vmaxvq_u32): Likewise.
19860 (__arm_vmaxq_u32): Likewise.
19861 (__arm_vhsubq_u32): Likewise.
19862 (__arm_vhsubq_n_u32): Likewise.
19863 (__arm_vhaddq_u32): Likewise.
19864 (__arm_vhaddq_n_u32): Likewise.
19865 (__arm_veorq_u32): Likewise.
19866 (__arm_vcmpneq_n_u32): Likewise.
19867 (__arm_vcmphiq_u32): Likewise.
19868 (__arm_vcmphiq_n_u32): Likewise.
19869 (__arm_vcmpeqq_u32): Likewise.
19870 (__arm_vcmpeqq_n_u32): Likewise.
19871 (__arm_vcmpcsq_u32): Likewise.
19872 (__arm_vcmpcsq_n_u32): Likewise.
19873 (__arm_vcaddq_rot90_u32): Likewise.
19874 (__arm_vcaddq_rot270_u32): Likewise.
19875 (__arm_vbicq_u32): Likewise.
19876 (__arm_vandq_u32): Likewise.
19877 (__arm_vaddvq_p_u32): Likewise.
19878 (__arm_vaddvaq_u32): Likewise.
19879 (__arm_vaddq_n_u32): Likewise.
19880 (__arm_vabdq_u32): Likewise.
19881 (__arm_vshlq_r_u32): Likewise.
19882 (__arm_vrshlq_u32): Likewise.
19883 (__arm_vrshlq_n_u32): Likewise.
19884 (__arm_vqshlq_u32): Likewise.
19885 (__arm_vqshlq_r_u32): Likewise.
19886 (__arm_vqrshlq_u32): Likewise.
19887 (__arm_vqrshlq_n_u32): Likewise.
19888 (__arm_vminavq_s32): Likewise.
19889 (__arm_vminaq_s32): Likewise.
19890 (__arm_vmaxavq_s32): Likewise.
19891 (__arm_vmaxaq_s32): Likewise.
19892 (__arm_vbrsrq_n_u32): Likewise.
19893 (__arm_vshlq_n_u32): Likewise.
19894 (__arm_vrshrq_n_u32): Likewise.
19895 (__arm_vqshlq_n_u32): Likewise.
19896 (__arm_vcmpneq_n_s32): Likewise.
19897 (__arm_vcmpltq_s32): Likewise.
19898 (__arm_vcmpltq_n_s32): Likewise.
19899 (__arm_vcmpleq_s32): Likewise.
19900 (__arm_vcmpleq_n_s32): Likewise.
19901 (__arm_vcmpgtq_s32): Likewise.
19902 (__arm_vcmpgtq_n_s32): Likewise.
19903 (__arm_vcmpgeq_s32): Likewise.
19904 (__arm_vcmpgeq_n_s32): Likewise.
19905 (__arm_vcmpeqq_s32): Likewise.
19906 (__arm_vcmpeqq_n_s32): Likewise.
19907 (__arm_vqshluq_n_s32): Likewise.
19908 (__arm_vaddvq_p_s32): Likewise.
19909 (__arm_vsubq_s32): Likewise.
19910 (__arm_vsubq_n_s32): Likewise.
19911 (__arm_vshlq_r_s32): Likewise.
19912 (__arm_vrshlq_s32): Likewise.
19913 (__arm_vrshlq_n_s32): Likewise.
19914 (__arm_vrmulhq_s32): Likewise.
19915 (__arm_vrhaddq_s32): Likewise.
19916 (__arm_vqsubq_s32): Likewise.
19917 (__arm_vqsubq_n_s32): Likewise.
19918 (__arm_vqshlq_s32): Likewise.
19919 (__arm_vqshlq_r_s32): Likewise.
19920 (__arm_vqrshlq_s32): Likewise.
19921 (__arm_vqrshlq_n_s32): Likewise.
19922 (__arm_vqrdmulhq_s32): Likewise.
19923 (__arm_vqrdmulhq_n_s32): Likewise.
19924 (__arm_vqdmulhq_s32): Likewise.
19925 (__arm_vqdmulhq_n_s32): Likewise.
19926 (__arm_vqaddq_s32): Likewise.
19927 (__arm_vqaddq_n_s32): Likewise.
19928 (__arm_vorrq_s32): Likewise.
19929 (__arm_vornq_s32): Likewise.
19930 (__arm_vmulq_s32): Likewise.
19931 (__arm_vmulq_n_s32): Likewise.
19932 (__arm_vmulltq_int_s32): Likewise.
19933 (__arm_vmullbq_int_s32): Likewise.
19934 (__arm_vmulhq_s32): Likewise.
19935 (__arm_vmlsdavxq_s32): Likewise.
19936 (__arm_vmlsdavq_s32): Likewise.
19937 (__arm_vmladavxq_s32): Likewise.
19938 (__arm_vmladavq_s32): Likewise.
19939 (__arm_vminvq_s32): Likewise.
19940 (__arm_vminq_s32): Likewise.
19941 (__arm_vmaxvq_s32): Likewise.
19942 (__arm_vmaxq_s32): Likewise.
19943 (__arm_vhsubq_s32): Likewise.
19944 (__arm_vhsubq_n_s32): Likewise.
19945 (__arm_vhcaddq_rot90_s32): Likewise.
19946 (__arm_vhcaddq_rot270_s32): Likewise.
19947 (__arm_vhaddq_s32): Likewise.
19948 (__arm_vhaddq_n_s32): Likewise.
19949 (__arm_veorq_s32): Likewise.
19950 (__arm_vcaddq_rot90_s32): Likewise.
19951 (__arm_vcaddq_rot270_s32): Likewise.
19952 (__arm_vbrsrq_n_s32): Likewise.
19953 (__arm_vbicq_s32): Likewise.
19954 (__arm_vandq_s32): Likewise.
19955 (__arm_vaddvaq_s32): Likewise.
19956 (__arm_vaddq_n_s32): Likewise.
19957 (__arm_vabdq_s32): Likewise.
19958 (__arm_vshlq_n_s32): Likewise.
19959 (__arm_vrshrq_n_s32): Likewise.
19960 (__arm_vqshlq_n_s32): Likewise.
19961 (vsubq): Define polymorphic variant.
19962 (vsubq_n): Likewise.
19963 (vshlq_r): Likewise.
19964 (vrshlq_n): Likewise.
19965 (vrshlq): Likewise.
19966 (vrmulhq): Likewise.
19967 (vrhaddq): Likewise.
19968 (vqsubq_n): Likewise.
19969 (vqsubq): Likewise.
19970 (vqshlq): Likewise.
19971 (vqshlq_r): Likewise.
19972 (vqshluq): Likewise.
19973 (vrshrq_n): Likewise.
19974 (vshlq_n): Likewise.
19975 (vqshluq_n): Likewise.
19976 (vqshlq_n): Likewise.
19977 (vqrshlq_n): Likewise.
19978 (vqrshlq): Likewise.
19979 (vqrdmulhq_n): Likewise.
19980 (vqrdmulhq): Likewise.
19981 (vqdmulhq_n): Likewise.
19982 (vqdmulhq): Likewise.
19983 (vqaddq_n): Likewise.
19984 (vqaddq): Likewise.
19985 (vorrq_n): Likewise.
19988 (vmulq_n): Likewise.
19990 (vmulltq_int): Likewise.
19991 (vmullbq_int): Likewise.
19992 (vmulhq): Likewise.
19994 (vminaq): Likewise.
19996 (vmaxaq): Likewise.
19997 (vhsubq_n): Likewise.
19998 (vhsubq): Likewise.
19999 (vhcaddq_rot90): Likewise.
20000 (vhcaddq_rot270): Likewise.
20001 (vhaddq_n): Likewise.
20002 (vhaddq): Likewise.
20004 (vcaddq_rot90): Likewise.
20005 (vcaddq_rot270): Likewise.
20006 (vbrsrq_n): Likewise.
20007 (vbicq_n): Likewise.
20010 (vaddq_n): Likewise.
20013 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
20014 (BINOP_NONE_NONE_NONE): Likewise.
20015 (BINOP_NONE_NONE_UNONE): Likewise.
20016 (BINOP_UNONE_NONE_IMM): Likewise.
20017 (BINOP_UNONE_NONE_NONE): Likewise.
20018 (BINOP_UNONE_UNONE_IMM): Likewise.
20019 (BINOP_UNONE_UNONE_NONE): Likewise.
20020 (BINOP_UNONE_UNONE_UNONE): Likewise.
20021 * config/arm/constraints.md (Ra): Define constraint to check constant is
20022 in the range of 0 to 7.
20023 (Rg): Define constriant to check the constant is one among 1, 2, 4
20025 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
20026 (mve_vaddq_n_<supf>): Likewise.
20027 (mve_vaddvaq_<supf>): Likewise.
20028 (mve_vaddvq_p_<supf>): Likewise.
20029 (mve_vandq_<supf>): Likewise.
20030 (mve_vbicq_<supf>): Likewise.
20031 (mve_vbrsrq_n_<supf>): Likewise.
20032 (mve_vcaddq_rot270_<supf>): Likewise.
20033 (mve_vcaddq_rot90_<supf>): Likewise.
20034 (mve_vcmpcsq_n_u): Likewise.
20035 (mve_vcmpcsq_u): Likewise.
20036 (mve_vcmpeqq_n_<supf>): Likewise.
20037 (mve_vcmpeqq_<supf>): Likewise.
20038 (mve_vcmpgeq_n_s): Likewise.
20039 (mve_vcmpgeq_s): Likewise.
20040 (mve_vcmpgtq_n_s): Likewise.
20041 (mve_vcmpgtq_s): Likewise.
20042 (mve_vcmphiq_n_u): Likewise.
20043 (mve_vcmphiq_u): Likewise.
20044 (mve_vcmpleq_n_s): Likewise.
20045 (mve_vcmpleq_s): Likewise.
20046 (mve_vcmpltq_n_s): Likewise.
20047 (mve_vcmpltq_s): Likewise.
20048 (mve_vcmpneq_n_<supf>): Likewise.
20049 (mve_vddupq_n_u): Likewise.
20050 (mve_veorq_<supf>): Likewise.
20051 (mve_vhaddq_n_<supf>): Likewise.
20052 (mve_vhaddq_<supf>): Likewise.
20053 (mve_vhcaddq_rot270_s): Likewise.
20054 (mve_vhcaddq_rot90_s): Likewise.
20055 (mve_vhsubq_n_<supf>): Likewise.
20056 (mve_vhsubq_<supf>): Likewise.
20057 (mve_vidupq_n_u): Likewise.
20058 (mve_vmaxaq_s): Likewise.
20059 (mve_vmaxavq_s): Likewise.
20060 (mve_vmaxq_<supf>): Likewise.
20061 (mve_vmaxvq_<supf>): Likewise.
20062 (mve_vminaq_s): Likewise.
20063 (mve_vminavq_s): Likewise.
20064 (mve_vminq_<supf>): Likewise.
20065 (mve_vminvq_<supf>): Likewise.
20066 (mve_vmladavq_<supf>): Likewise.
20067 (mve_vmladavxq_s): Likewise.
20068 (mve_vmlsdavq_s): Likewise.
20069 (mve_vmlsdavxq_s): Likewise.
20070 (mve_vmulhq_<supf>): Likewise.
20071 (mve_vmullbq_int_<supf>): Likewise.
20072 (mve_vmulltq_int_<supf>): Likewise.
20073 (mve_vmulq_n_<supf>): Likewise.
20074 (mve_vmulq_<supf>): Likewise.
20075 (mve_vornq_<supf>): Likewise.
20076 (mve_vorrq_<supf>): Likewise.
20077 (mve_vqaddq_n_<supf>): Likewise.
20078 (mve_vqaddq_<supf>): Likewise.
20079 (mve_vqdmulhq_n_s): Likewise.
20080 (mve_vqdmulhq_s): Likewise.
20081 (mve_vqrdmulhq_n_s): Likewise.
20082 (mve_vqrdmulhq_s): Likewise.
20083 (mve_vqrshlq_n_<supf>): Likewise.
20084 (mve_vqrshlq_<supf>): Likewise.
20085 (mve_vqshlq_n_<supf>): Likewise.
20086 (mve_vqshlq_r_<supf>): Likewise.
20087 (mve_vqshlq_<supf>): Likewise.
20088 (mve_vqshluq_n_s): Likewise.
20089 (mve_vqsubq_n_<supf>): Likewise.
20090 (mve_vqsubq_<supf>): Likewise.
20091 (mve_vrhaddq_<supf>): Likewise.
20092 (mve_vrmulhq_<supf>): Likewise.
20093 (mve_vrshlq_n_<supf>): Likewise.
20094 (mve_vrshlq_<supf>): Likewise.
20095 (mve_vrshrq_n_<supf>): Likewise.
20096 (mve_vshlq_n_<supf>): Likewise.
20097 (mve_vshlq_r_<supf>): Likewise.
20098 (mve_vsubq_n_<supf>): Likewise.
20099 (mve_vsubq_<supf>): Likewise.
20100 * config/arm/predicates.md (mve_imm_7): Define predicate to check
20101 the matching constraint Ra.
20102 (mve_imm_selective_upto_8): Define predicate to check the matching
20105 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20106 Mihail Ionescu <mihail.ionescu@arm.com>
20107 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20109 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
20110 qualifier for binary operands.
20111 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
20112 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
20113 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
20114 (vaddlvq_p_u32): Likewise.
20115 (vcmpneq_s8): Likewise.
20116 (vcmpneq_s16): Likewise.
20117 (vcmpneq_s32): Likewise.
20118 (vcmpneq_u8): Likewise.
20119 (vcmpneq_u16): Likewise.
20120 (vcmpneq_u32): Likewise.
20121 (vshlq_s8): Likewise.
20122 (vshlq_s16): Likewise.
20123 (vshlq_s32): Likewise.
20124 (vshlq_u8): Likewise.
20125 (vshlq_u16): Likewise.
20126 (vshlq_u32): Likewise.
20127 (__arm_vaddlvq_p_s32): Define intrinsic.
20128 (__arm_vaddlvq_p_u32): Likewise.
20129 (__arm_vcmpneq_s8): Likewise.
20130 (__arm_vcmpneq_s16): Likewise.
20131 (__arm_vcmpneq_s32): Likewise.
20132 (__arm_vcmpneq_u8): Likewise.
20133 (__arm_vcmpneq_u16): Likewise.
20134 (__arm_vcmpneq_u32): Likewise.
20135 (__arm_vshlq_s8): Likewise.
20136 (__arm_vshlq_s16): Likewise.
20137 (__arm_vshlq_s32): Likewise.
20138 (__arm_vshlq_u8): Likewise.
20139 (__arm_vshlq_u16): Likewise.
20140 (__arm_vshlq_u32): Likewise.
20141 (vaddlvq_p): Define polymorphic variant.
20142 (vcmpneq): Likewise.
20144 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
20146 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
20147 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
20148 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
20149 (mve_vcmpneq_<supf><mode>): Likewise.
20150 (mve_vshlq_<supf><mode>): Likewise.
20152 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20153 Mihail Ionescu <mihail.ionescu@arm.com>
20154 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20156 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
20157 qualifier for binary operands.
20158 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
20159 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
20160 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
20161 (vcvtq_n_s32_f32): Likewise.
20162 (vcvtq_n_u16_f16): Likewise.
20163 (vcvtq_n_u32_f32): Likewise.
20164 (vcreateq_u8): Likewise.
20165 (vcreateq_u16): Likewise.
20166 (vcreateq_u32): Likewise.
20167 (vcreateq_u64): Likewise.
20168 (vcreateq_s8): Likewise.
20169 (vcreateq_s16): Likewise.
20170 (vcreateq_s32): Likewise.
20171 (vcreateq_s64): Likewise.
20172 (vshrq_n_s8): Likewise.
20173 (vshrq_n_s16): Likewise.
20174 (vshrq_n_s32): Likewise.
20175 (vshrq_n_u8): Likewise.
20176 (vshrq_n_u16): Likewise.
20177 (vshrq_n_u32): Likewise.
20178 (__arm_vcreateq_u8): Define intrinsic.
20179 (__arm_vcreateq_u16): Likewise.
20180 (__arm_vcreateq_u32): Likewise.
20181 (__arm_vcreateq_u64): Likewise.
20182 (__arm_vcreateq_s8): Likewise.
20183 (__arm_vcreateq_s16): Likewise.
20184 (__arm_vcreateq_s32): Likewise.
20185 (__arm_vcreateq_s64): Likewise.
20186 (__arm_vshrq_n_s8): Likewise.
20187 (__arm_vshrq_n_s16): Likewise.
20188 (__arm_vshrq_n_s32): Likewise.
20189 (__arm_vshrq_n_u8): Likewise.
20190 (__arm_vshrq_n_u16): Likewise.
20191 (__arm_vshrq_n_u32): Likewise.
20192 (__arm_vcvtq_n_s16_f16): Likewise.
20193 (__arm_vcvtq_n_s32_f32): Likewise.
20194 (__arm_vcvtq_n_u16_f16): Likewise.
20195 (__arm_vcvtq_n_u32_f32): Likewise.
20196 (vshrq_n): Define polymorphic variant.
20197 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
20199 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
20200 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
20201 * config/arm/constraints.md (Rb): Define constraint to check constant is
20202 in the range of 1 to 8.
20203 (Rf): Define constraint to check constant is in the range of 1 to 32.
20204 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
20205 (mve_vshrq_n_<supf><mode>): Likewise.
20206 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
20207 * config/arm/predicates.md (mve_imm_8): Define predicate to check
20208 the matching constraint Rb.
20209 (mve_imm_32): Define predicate to check the matching constraint Rf.
20211 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20212 Mihail Ionescu <mihail.ionescu@arm.com>
20213 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20215 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
20216 qualifier for binary operands.
20217 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
20218 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
20219 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
20220 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
20221 (vsubq_n_f32): Likewise.
20222 (vbrsrq_n_f16): Likewise.
20223 (vbrsrq_n_f32): Likewise.
20224 (vcvtq_n_f16_s16): Likewise.
20225 (vcvtq_n_f32_s32): Likewise.
20226 (vcvtq_n_f16_u16): Likewise.
20227 (vcvtq_n_f32_u32): Likewise.
20228 (vcreateq_f16): Likewise.
20229 (vcreateq_f32): Likewise.
20230 (__arm_vsubq_n_f16): Define intrinsic.
20231 (__arm_vsubq_n_f32): Likewise.
20232 (__arm_vbrsrq_n_f16): Likewise.
20233 (__arm_vbrsrq_n_f32): Likewise.
20234 (__arm_vcvtq_n_f16_s16): Likewise.
20235 (__arm_vcvtq_n_f32_s32): Likewise.
20236 (__arm_vcvtq_n_f16_u16): Likewise.
20237 (__arm_vcvtq_n_f32_u32): Likewise.
20238 (__arm_vcreateq_f16): Likewise.
20239 (__arm_vcreateq_f32): Likewise.
20240 (vsubq): Define polymorphic variant.
20241 (vbrsrq): Likewise.
20242 (vcvtq_n): Likewise.
20243 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
20245 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
20246 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
20247 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
20248 * config/arm/constraints.md (Rd): Define constraint to check constant is
20249 in the range of 1 to 16.
20250 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
20251 mve_vbrsrq_n_f<mode>: Likewise.
20252 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
20253 mve_vcreateq_f<mode>: Likewise.
20254 * config/arm/predicates.md (mve_imm_16): Define predicate to check
20255 the matching constraint Rd.
20257 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20258 Mihail Ionescu <mihail.ionescu@arm.com>
20259 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20261 * config/arm/arm-builtins.c (hi_UP): Define mode.
20262 * config/arm/arm.h (IS_VPR_REGNUM): Move.
20263 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
20264 (APSRQ_REGNUM): Modify.
20265 (APSRGE_REGNUM): Modify.
20266 * config/arm/arm_mve.h (vctp16q): Define macro.
20267 (vctp32q): Likewise.
20268 (vctp64q): Likewise.
20269 (vctp8q): Likewise.
20271 (__arm_vctp16q): Define intrinsic.
20272 (__arm_vctp32q): Likewise.
20273 (__arm_vctp64q): Likewise.
20274 (__arm_vctp8q): Likewise.
20275 (__arm_vpnot): Likewise.
20276 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
20278 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
20279 (mve_vpnothi): Likewise.
20281 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20282 Mihail Ionescu <mihail.ionescu@arm.com>
20283 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20285 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
20286 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
20287 (vdupq_n_s16): Likewise.
20288 (vdupq_n_s32): Likewise.
20289 (vabsq_s8): Likewise.
20290 (vabsq_s16): Likewise.
20291 (vabsq_s32): Likewise.
20292 (vclsq_s8): Likewise.
20293 (vclsq_s16): Likewise.
20294 (vclsq_s32): Likewise.
20295 (vclzq_s8): Likewise.
20296 (vclzq_s16): Likewise.
20297 (vclzq_s32): Likewise.
20298 (vnegq_s8): Likewise.
20299 (vnegq_s16): Likewise.
20300 (vnegq_s32): Likewise.
20301 (vaddlvq_s32): Likewise.
20302 (vaddvq_s8): Likewise.
20303 (vaddvq_s16): Likewise.
20304 (vaddvq_s32): Likewise.
20305 (vmovlbq_s8): Likewise.
20306 (vmovlbq_s16): Likewise.
20307 (vmovltq_s8): Likewise.
20308 (vmovltq_s16): Likewise.
20309 (vmvnq_s8): Likewise.
20310 (vmvnq_s16): Likewise.
20311 (vmvnq_s32): Likewise.
20312 (vrev16q_s8): Likewise.
20313 (vrev32q_s8): Likewise.
20314 (vrev32q_s16): Likewise.
20315 (vqabsq_s8): Likewise.
20316 (vqabsq_s16): Likewise.
20317 (vqabsq_s32): Likewise.
20318 (vqnegq_s8): Likewise.
20319 (vqnegq_s16): Likewise.
20320 (vqnegq_s32): Likewise.
20321 (vcvtaq_s16_f16): Likewise.
20322 (vcvtaq_s32_f32): Likewise.
20323 (vcvtnq_s16_f16): Likewise.
20324 (vcvtnq_s32_f32): Likewise.
20325 (vcvtpq_s16_f16): Likewise.
20326 (vcvtpq_s32_f32): Likewise.
20327 (vcvtmq_s16_f16): Likewise.
20328 (vcvtmq_s32_f32): Likewise.
20329 (vmvnq_u8): Likewise.
20330 (vmvnq_u16): Likewise.
20331 (vmvnq_u32): Likewise.
20332 (vdupq_n_u8): Likewise.
20333 (vdupq_n_u16): Likewise.
20334 (vdupq_n_u32): Likewise.
20335 (vclzq_u8): Likewise.
20336 (vclzq_u16): Likewise.
20337 (vclzq_u32): Likewise.
20338 (vaddvq_u8): Likewise.
20339 (vaddvq_u16): Likewise.
20340 (vaddvq_u32): Likewise.
20341 (vrev32q_u8): Likewise.
20342 (vrev32q_u16): Likewise.
20343 (vmovltq_u8): Likewise.
20344 (vmovltq_u16): Likewise.
20345 (vmovlbq_u8): Likewise.
20346 (vmovlbq_u16): Likewise.
20347 (vrev16q_u8): Likewise.
20348 (vaddlvq_u32): Likewise.
20349 (vcvtpq_u16_f16): Likewise.
20350 (vcvtpq_u32_f32): Likewise.
20351 (vcvtnq_u16_f16): Likewise.
20352 (vcvtmq_u16_f16): Likewise.
20353 (vcvtmq_u32_f32): Likewise.
20354 (vcvtaq_u16_f16): Likewise.
20355 (vcvtaq_u32_f32): Likewise.
20356 (__arm_vdupq_n_s8): Define intrinsic.
20357 (__arm_vdupq_n_s16): Likewise.
20358 (__arm_vdupq_n_s32): Likewise.
20359 (__arm_vabsq_s8): Likewise.
20360 (__arm_vabsq_s16): Likewise.
20361 (__arm_vabsq_s32): Likewise.
20362 (__arm_vclsq_s8): Likewise.
20363 (__arm_vclsq_s16): Likewise.
20364 (__arm_vclsq_s32): Likewise.
20365 (__arm_vclzq_s8): Likewise.
20366 (__arm_vclzq_s16): Likewise.
20367 (__arm_vclzq_s32): Likewise.
20368 (__arm_vnegq_s8): Likewise.
20369 (__arm_vnegq_s16): Likewise.
20370 (__arm_vnegq_s32): Likewise.
20371 (__arm_vaddlvq_s32): Likewise.
20372 (__arm_vaddvq_s8): Likewise.
20373 (__arm_vaddvq_s16): Likewise.
20374 (__arm_vaddvq_s32): Likewise.
20375 (__arm_vmovlbq_s8): Likewise.
20376 (__arm_vmovlbq_s16): Likewise.
20377 (__arm_vmovltq_s8): Likewise.
20378 (__arm_vmovltq_s16): Likewise.
20379 (__arm_vmvnq_s8): Likewise.
20380 (__arm_vmvnq_s16): Likewise.
20381 (__arm_vmvnq_s32): Likewise.
20382 (__arm_vrev16q_s8): Likewise.
20383 (__arm_vrev32q_s8): Likewise.
20384 (__arm_vrev32q_s16): Likewise.
20385 (__arm_vqabsq_s8): Likewise.
20386 (__arm_vqabsq_s16): Likewise.
20387 (__arm_vqabsq_s32): Likewise.
20388 (__arm_vqnegq_s8): Likewise.
20389 (__arm_vqnegq_s16): Likewise.
20390 (__arm_vqnegq_s32): Likewise.
20391 (__arm_vmvnq_u8): Likewise.
20392 (__arm_vmvnq_u16): Likewise.
20393 (__arm_vmvnq_u32): Likewise.
20394 (__arm_vdupq_n_u8): Likewise.
20395 (__arm_vdupq_n_u16): Likewise.
20396 (__arm_vdupq_n_u32): Likewise.
20397 (__arm_vclzq_u8): Likewise.
20398 (__arm_vclzq_u16): Likewise.
20399 (__arm_vclzq_u32): Likewise.
20400 (__arm_vaddvq_u8): Likewise.
20401 (__arm_vaddvq_u16): Likewise.
20402 (__arm_vaddvq_u32): Likewise.
20403 (__arm_vrev32q_u8): Likewise.
20404 (__arm_vrev32q_u16): Likewise.
20405 (__arm_vmovltq_u8): Likewise.
20406 (__arm_vmovltq_u16): Likewise.
20407 (__arm_vmovlbq_u8): Likewise.
20408 (__arm_vmovlbq_u16): Likewise.
20409 (__arm_vrev16q_u8): Likewise.
20410 (__arm_vaddlvq_u32): Likewise.
20411 (__arm_vcvtpq_u16_f16): Likewise.
20412 (__arm_vcvtpq_u32_f32): Likewise.
20413 (__arm_vcvtnq_u16_f16): Likewise.
20414 (__arm_vcvtmq_u16_f16): Likewise.
20415 (__arm_vcvtmq_u32_f32): Likewise.
20416 (__arm_vcvtaq_u16_f16): Likewise.
20417 (__arm_vcvtaq_u32_f32): Likewise.
20418 (__arm_vcvtaq_s16_f16): Likewise.
20419 (__arm_vcvtaq_s32_f32): Likewise.
20420 (__arm_vcvtnq_s16_f16): Likewise.
20421 (__arm_vcvtnq_s32_f32): Likewise.
20422 (__arm_vcvtpq_s16_f16): Likewise.
20423 (__arm_vcvtpq_s32_f32): Likewise.
20424 (__arm_vcvtmq_s16_f16): Likewise.
20425 (__arm_vcvtmq_s32_f32): Likewise.
20426 (vdupq_n): Define polymorphic variant.
20431 (vaddlvq): Likewise.
20432 (vaddvq): Likewise.
20433 (vmovlbq): Likewise.
20434 (vmovltq): Likewise.
20436 (vrev16q): Likewise.
20437 (vrev32q): Likewise.
20438 (vqabsq): Likewise.
20439 (vqnegq): Likewise.
20440 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
20441 (UNOP_SNONE_NONE): Likewise.
20442 (UNOP_UNONE_UNONE): Likewise.
20443 (UNOP_UNONE_NONE): Likewise.
20444 * config/arm/constraints.md (e): Define new constriant to allow only
20446 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
20447 (mve_vnegq_s<mode>): Likewise.
20448 (mve_vmvnq_<supf><mode>): Likewise.
20449 (mve_vdupq_n_<supf><mode>): Likewise.
20450 (mve_vclzq_<supf><mode>): Likewise.
20451 (mve_vclsq_s<mode>): Likewise.
20452 (mve_vaddvq_<supf><mode>): Likewise.
20453 (mve_vabsq_s<mode>): Likewise.
20454 (mve_vrev32q_<supf><mode>): Likewise.
20455 (mve_vmovltq_<supf><mode>): Likewise.
20456 (mve_vmovlbq_<supf><mode>): Likewise.
20457 (mve_vcvtpq_<supf><mode>): Likewise.
20458 (mve_vcvtnq_<supf><mode>): Likewise.
20459 (mve_vcvtmq_<supf><mode>): Likewise.
20460 (mve_vcvtaq_<supf><mode>): Likewise.
20461 (mve_vrev16q_<supf>v16qi): Likewise.
20462 (mve_vaddlvq_<supf>v4si): Likewise.
20464 2020-03-17 Jakub Jelinek <jakub@redhat.com>
20466 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
20468 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
20470 * read-rtl-function.c (find_param_by_name,
20471 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
20473 * spellcheck.c (get_edit_distance_cutoff): Likewise.
20474 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
20475 * tree.def (SWITCH_EXPR): Likewise.
20476 * selftest.c (assert_str_contains): Likewise.
20477 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
20479 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
20480 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
20481 * langhooks.h (struct lang_hooks_for_decls): Likewise.
20482 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
20483 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
20485 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
20486 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
20487 * tree.c (component_ref_size): Likewise.
20488 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
20489 * gimple-ssa-sprintf.c (get_string_length, format_string,
20490 format_directive): Likewise.
20491 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
20492 * input.c (string_concat_db::get_string_concatenation,
20493 test_lexer_string_locations_ucn4): Likewise.
20494 * cfgexpand.c (pass_expand::execute): Likewise.
20495 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
20496 maybe_diag_overlap): Likewise.
20497 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
20498 * shrink-wrap.c (spread_components): Likewise.
20499 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
20501 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
20503 * dwarf2out.c (dwarf2out_early_finish): Likewise.
20504 * gimple-ssa-store-merging.c: Likewise.
20505 * ira-costs.c (record_operand_costs): Likewise.
20506 * tree-vect-loop.c (vectorizable_reduction): Likewise.
20507 * target.def (dispatch): Likewise.
20508 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
20509 in documentation text.
20510 * doc/tm.texi: Regenerated.
20511 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
20512 duplicated word issue in a comment.
20513 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
20514 * config/i386/i386-features.c (remove_partial_avx_dependency):
20516 * config/msp430/msp430.c (msp430_select_section): Likewise.
20517 * config/gcn/gcn-run.c (load_image): Likewise.
20518 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
20519 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
20520 * config/aarch64/falkor-tag-collision-avoidance.c
20521 (single_dest_per_chain): Likewise.
20522 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
20523 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
20524 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
20525 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
20527 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
20528 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
20529 * config/rs6000/rs6000-logue.c
20530 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
20531 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
20532 Fix various other issues in the comment.
20534 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
20536 * config/arm/t-rmprofile: create new multilib for
20537 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
20540 2020-03-17 Jakub Jelinek <jakub@redhat.com>
20542 PR tree-optimization/94015
20543 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
20544 function where EXP is address of the bytes being stored rather than
20545 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
20546 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
20547 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
20548 calling native_encode_expr if host or target doesn't have 8-bit
20549 chars. Formatting fixes.
20550 (count_nonzero_bytes_addr): New function.
20552 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20553 Mihail Ionescu <mihail.ionescu@arm.com>
20554 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20556 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
20557 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
20558 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
20559 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
20560 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
20561 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
20562 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
20563 (vmvnq_n_s32): Likewise.
20564 (vrev64q_s8): Likewise.
20565 (vrev64q_s16): Likewise.
20566 (vrev64q_s32): Likewise.
20567 (vcvtq_s16_f16): Likewise.
20568 (vcvtq_s32_f32): Likewise.
20569 (vrev64q_u8): Likewise.
20570 (vrev64q_u16): Likewise.
20571 (vrev64q_u32): Likewise.
20572 (vmvnq_n_u16): Likewise.
20573 (vmvnq_n_u32): Likewise.
20574 (vcvtq_u16_f16): Likewise.
20575 (vcvtq_u32_f32): Likewise.
20576 (__arm_vmvnq_n_s16): Define intrinsic.
20577 (__arm_vmvnq_n_s32): Likewise.
20578 (__arm_vrev64q_s8): Likewise.
20579 (__arm_vrev64q_s16): Likewise.
20580 (__arm_vrev64q_s32): Likewise.
20581 (__arm_vrev64q_u8): Likewise.
20582 (__arm_vrev64q_u16): Likewise.
20583 (__arm_vrev64q_u32): Likewise.
20584 (__arm_vmvnq_n_u16): Likewise.
20585 (__arm_vmvnq_n_u32): Likewise.
20586 (__arm_vcvtq_s16_f16): Likewise.
20587 (__arm_vcvtq_s32_f32): Likewise.
20588 (__arm_vcvtq_u16_f16): Likewise.
20589 (__arm_vcvtq_u32_f32): Likewise.
20590 (vrev64q): Define polymorphic variant.
20591 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
20592 (UNOP_SNONE_NONE): Likewise.
20593 (UNOP_SNONE_IMM): Likewise.
20594 (UNOP_UNONE_UNONE): Likewise.
20595 (UNOP_UNONE_NONE): Likewise.
20596 (UNOP_UNONE_IMM): Likewise.
20597 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
20598 (mve_vcvtq_from_f_<supf><mode>): Likewise.
20599 (mve_vmvnq_n_<supf><mode>): Likewise.
20601 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20602 Mihail Ionescu <mihail.ionescu@arm.com>
20603 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20605 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
20606 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
20607 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
20608 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
20609 (vrndxq_f32): Likewise.
20610 (vrndq_f16) Likewise.
20611 (vrndq_f32): Likewise.
20612 (vrndpq_f16): Likewise.
20613 (vrndpq_f32): Likewise.
20614 (vrndnq_f16): Likewise.
20615 (vrndnq_f32): Likewise.
20616 (vrndmq_f16): Likewise.
20617 (vrndmq_f32): Likewise.
20618 (vrndaq_f16): Likewise.
20619 (vrndaq_f32): Likewise.
20620 (vrev64q_f16): Likewise.
20621 (vrev64q_f32): Likewise.
20622 (vnegq_f16): Likewise.
20623 (vnegq_f32): Likewise.
20624 (vdupq_n_f16): Likewise.
20625 (vdupq_n_f32): Likewise.
20626 (vabsq_f16): Likewise.
20627 (vabsq_f32): Likewise.
20628 (vrev32q_f16): Likewise.
20629 (vcvttq_f32_f16): Likewise.
20630 (vcvtbq_f32_f16): Likewise.
20631 (vcvtq_f16_s16): Likewise.
20632 (vcvtq_f32_s32): Likewise.
20633 (vcvtq_f16_u16): Likewise.
20634 (vcvtq_f32_u32): Likewise.
20635 (__arm_vrndxq_f16): Define intrinsic.
20636 (__arm_vrndxq_f32): Likewise.
20637 (__arm_vrndq_f16): Likewise.
20638 (__arm_vrndq_f32): Likewise.
20639 (__arm_vrndpq_f16): Likewise.
20640 (__arm_vrndpq_f32): Likewise.
20641 (__arm_vrndnq_f16): Likewise.
20642 (__arm_vrndnq_f32): Likewise.
20643 (__arm_vrndmq_f16): Likewise.
20644 (__arm_vrndmq_f32): Likewise.
20645 (__arm_vrndaq_f16): Likewise.
20646 (__arm_vrndaq_f32): Likewise.
20647 (__arm_vrev64q_f16): Likewise.
20648 (__arm_vrev64q_f32): Likewise.
20649 (__arm_vnegq_f16): Likewise.
20650 (__arm_vnegq_f32): Likewise.
20651 (__arm_vdupq_n_f16): Likewise.
20652 (__arm_vdupq_n_f32): Likewise.
20653 (__arm_vabsq_f16): Likewise.
20654 (__arm_vabsq_f32): Likewise.
20655 (__arm_vrev32q_f16): Likewise.
20656 (__arm_vcvttq_f32_f16): Likewise.
20657 (__arm_vcvtbq_f32_f16): Likewise.
20658 (__arm_vcvtq_f16_s16): Likewise.
20659 (__arm_vcvtq_f32_s32): Likewise.
20660 (__arm_vcvtq_f16_u16): Likewise.
20661 (__arm_vcvtq_f32_u32): Likewise.
20662 (vrndxq): Define polymorphic variants.
20664 (vrndpq): Likewise.
20665 (vrndnq): Likewise.
20666 (vrndmq): Likewise.
20667 (vrndaq): Likewise.
20668 (vrev64q): Likewise.
20671 (vrev32q): Likewise.
20672 (vcvtbq_f32): Likewise.
20673 (vcvttq_f32): Likewise.
20675 * config/arm/arm_mve_builtins.def (VAR2): Define.
20677 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
20678 (mve_vrndq_f<mode>): Likewise.
20679 (mve_vrndpq_f<mode>): Likewise.
20680 (mve_vrndnq_f<mode>): Likewise.
20681 (mve_vrndmq_f<mode>): Likewise.
20682 (mve_vrndaq_f<mode>): Likewise.
20683 (mve_vrev64q_f<mode>): Likewise.
20684 (mve_vnegq_f<mode>): Likewise.
20685 (mve_vdupq_n_f<mode>): Likewise.
20686 (mve_vabsq_f<mode>): Likewise.
20687 (mve_vrev32q_fv8hf): Likewise.
20688 (mve_vcvttq_f32_f16v4sf): Likewise.
20689 (mve_vcvtbq_f32_f16v4sf): Likewise.
20690 (mve_vcvtq_to_f_<supf><mode>): Likewise.
20692 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20693 Mihail Ionescu <mihail.ionescu@arm.com>
20694 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20696 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
20698 (ARM_BUILTIN_MVE_PATTERN_START): Define.
20699 (arm_init_mve_builtins): Define function.
20700 (arm_init_builtins): Add TARGET_HAVE_MVE check.
20701 (arm_expand_builtin_1): Check the range of fcode.
20702 (arm_expand_mve_builtin): Define function to expand MVE builtins.
20703 (arm_expand_builtin): Check the range of fcode.
20704 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
20706 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
20707 (vst4q_s8): Define macro.
20708 (vst4q_s16): Likewise.
20709 (vst4q_s32): Likewise.
20710 (vst4q_u8): Likewise.
20711 (vst4q_u16): Likewise.
20712 (vst4q_u32): Likewise.
20713 (vst4q_f16): Likewise.
20714 (vst4q_f32): Likewise.
20715 (__arm_vst4q_s8): Define inline builtin.
20716 (__arm_vst4q_s16): Likewise.
20717 (__arm_vst4q_s32): Likewise.
20718 (__arm_vst4q_u8): Likewise.
20719 (__arm_vst4q_u16): Likewise.
20720 (__arm_vst4q_u32): Likewise.
20721 (__arm_vst4q_f16): Likewise.
20722 (__arm_vst4q_f32): Likewise.
20723 (__ARM_mve_typeid): Define macro with MVE types.
20724 (__ARM_mve_coerce): Define macro with _Generic feature.
20725 (vst4q): Define polymorphic variant for different vst4q builtins.
20726 * config/arm/arm_mve_builtins.def: New file.
20727 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
20729 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
20730 (unspec): Define unspec.
20731 (mve_vst4q<mode>): Define RTL pattern.
20732 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
20734 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
20736 (define_split): Allow OI mode split for MVE after reload.
20737 (define_split): Allow XI mode split for MVE after reload.
20738 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
20739 (arm-builtins.o): Likewise.
20741 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
20743 * c-typeck.c (process_init_element): Handle constructor_type with
20744 type size represented by POLY_INT_CST.
20746 2020-03-17 Jakub Jelinek <jakub@redhat.com>
20748 PR tree-optimization/94187
20749 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
20750 nchars - offset < nbytes.
20752 PR middle-end/94189
20753 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
20754 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
20755 for code-generation.
20757 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
20760 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
20761 after changing memory subreg.
20763 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20764 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20766 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
20767 emulator calls for dobule precision arithmetic operations for MVE.
20769 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20770 Mihail Ionescu <mihail.ionescu@arm.com>
20771 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20773 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
20774 feature bit is on and -mfpu=auto is passed as compiler option, do not
20775 generate error on not finding any matching fpu. Because in this case
20776 fpu is not required.
20777 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
20778 enabled for MVE and also for all VFP extensions.
20779 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
20781 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
20782 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
20783 along with feature bits mve_float.
20784 (mve): Modify add options in armv8.1-m.main arch for MVE.
20785 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
20787 * config/arm/arm.c (use_return_insn): Replace the
20788 check with TARGET_VFP_BASE.
20789 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
20791 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
20792 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
20794 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
20795 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
20797 (arm_compute_frame_layout): Likewise.
20798 (arm_save_coproc_regs): Likewise.
20799 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
20801 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
20802 with equivalent macro TARGET_VFP_BASE.
20803 (arm_expand_epilogue_apcs_frame): Likewise.
20804 (arm_expand_epilogue): Likewise.
20805 (arm_conditional_register_usage): Likewise.
20806 (arm_declare_function_name): Add check to skip printing .fpu directive
20807 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
20809 * config/arm/arm.h (TARGET_VFP_BASE): Define.
20810 * config/arm/arm.md (arch): Add "mve" to arch.
20811 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
20812 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
20813 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
20814 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
20816 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
20817 to not allow for MVE.
20818 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
20820 (VUNSPEC_GET_FPSCR): Define.
20821 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
20822 instructions which move to general-purpose Register from Floating-point
20823 Special register and vice-versa.
20824 (thumb2_movhi_fp16): Likewise.
20825 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
20826 with MCR and MRC instructions which set and get Floating-point Status
20827 and Control Register (FPSCR).
20828 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
20830 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
20831 float move patterns in MVE.
20832 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
20833 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
20834 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
20835 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
20836 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
20837 TARGET_VFP_BASE check.
20838 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
20839 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
20841 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
20842 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
20846 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20847 Mihail Ionescu <mihail.ionescu@arm.com>
20848 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20850 * config.gcc (arm_mve.h): Include mve intrinsics header file.
20851 * config/arm/aout.h (p0): Add new register name for MVE predicated
20853 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
20854 common to Neon and MVE.
20855 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
20856 (arm_init_simd_builtin_types): Disable poly types for MVE.
20857 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
20858 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
20859 ARM_BUILTIN_NEON_LANE_CHECK.
20860 (mve_dereference_pointer): Add function.
20861 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
20863 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
20864 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
20865 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
20866 with floating point enabled.
20867 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
20868 simd_immediate_valid_for_move.
20869 (simd_immediate_valid_for_move): Renamed from
20870 neon_immediate_valid_for_move function.
20871 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
20872 error if vfpv2 feature bit is disabled and mve feature bit is also
20873 disabled for HARD_FLOAT_ABI.
20874 (use_return_insn): Check to not push VFP regs for MVE.
20875 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
20877 (aapcs_vfp_allocate_return_reg): Likewise.
20878 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
20879 address operand for MVE.
20880 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
20881 (neon_valid_immediate): Rename to simd_valid_immediate.
20882 (simd_valid_immediate): Rename from neon_valid_immediate.
20883 (simd_valid_immediate): MVE check on size of vector is 128 bits.
20884 (neon_immediate_valid_for_move): Rename to
20885 simd_immediate_valid_for_move.
20886 (simd_immediate_valid_for_move): Rename from
20887 neon_immediate_valid_for_move.
20888 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
20890 (neon_make_constant): Modify call to neon_valid_immediate function.
20891 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
20893 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
20894 (arm_compute_frame_layout): Calculate space for saved VFP registers for
20896 (arm_save_coproc_regs): Save coproc registers for MVE.
20897 (arm_print_operand): Add case 'E' to print memory operands for MVE.
20898 (arm_print_operand_address): Check to print register number for MVE.
20899 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
20900 (arm_modes_tieable_p): Check to allow structure mode for MVE.
20901 (arm_regno_class): Add VPR_REGNUM check.
20902 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
20904 (arm_expand_epilogue): MVE check for enabling pop instructions in
20906 (arm_print_asm_arch_directives): Modify function to disable print of
20907 .arch_extension "mve" and "fp" for cases where MVE is enabled with
20909 (arm_vector_mode_supported_p): Check for modes available in MVE interger
20910 and MVE floating point.
20911 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
20913 (arm_conditional_register_usage): Enable usage of conditional regsiter
20915 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
20916 (arm_declare_function_name): Modify function to disable print of
20917 .arch_extension "mve" and "fp" for cases where MVE is enabled with
20919 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
20920 when target general registers are required.
20921 (TARGET_HAVE_MVE_FLOAT): Likewise.
20922 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
20924 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
20925 which indicate this is not available for across function calls.
20926 (FIRST_PSEUDO_REGISTER): Modify.
20927 (VALID_MVE_MODE): Define valid MVE mode.
20928 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
20929 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
20930 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
20931 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
20933 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
20934 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
20935 (enum reg_class): Add VPR_REG entry.
20936 (REG_CLASS_NAMES): Add VPR_REG entry.
20937 * config/arm/arm.md (VPR_REGNUM): Define.
20938 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
20939 "unconditional" instructions.
20940 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
20941 (movdf_soft_insn): Modify RTL to not allow for MVE.
20942 (vfp_pop_multiple_with_writeback): Enable for MVE.
20943 (include "mve.md"): Include mve.md file.
20944 * config/arm/arm_mve.h: Add MVE intrinsics head file.
20945 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
20946 for vector predicated operands.
20947 * config/arm/iterators.md (VNIM1): Define.
20948 (VNINOTM1): Define.
20949 (VHFBF_split): Define
20950 * config/arm/mve.md: New file.
20951 (mve_mov<mode>): Define RTL for move, store and load in MVE.
20952 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
20954 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
20955 simd_immediate_valid_for_move.
20956 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
20957 is common to MVE and NEON to vec-common.md file.
20958 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
20959 * config/arm/predicates.md (vpr_register_operand): Define.
20960 * config/arm/t-arm: Add mve.md file.
20961 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
20963 (mve_store): Add MVE instructions mve_store to attribute "type".
20964 (mve_load): Add MVE instructions mve_load to attribute "type".
20965 (is_mve_type): Define attribute.
20966 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
20967 standard move patterns in MVE along with NEON and IWMMXT with mode
20969 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
20970 and IWMMXT with mode iterator V8HF.
20971 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
20973 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
20974 simd_immediate_valid_for_move.
20977 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
20980 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
20981 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
20983 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
20985 2020-03-16 Jakub Jelinek <jakub@redhat.com>
20988 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
20991 PR tree-optimization/94166
20992 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
20993 as secondary comparison key.
20995 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
20997 PR tree-optimization/94125
20998 * tree-loop-distribution.c
20999 (loop_distribution::break_alias_scc_partitions): Update post order
21000 number for merged scc.
21002 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
21005 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
21007 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
21008 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
21009 and ext_sse_reg_operand check.
21011 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
21013 * common.opt: Avoid redundancy in the help text.
21014 * config/arc/arc.opt: Likewise.
21015 * config/cr16/cr16.opt: Likewise.
21017 2020-03-14 Jakub Jelinek <jakub@redhat.com>
21019 PR middle-end/93566
21020 * tree-nested.c (convert_nonlocal_omp_clauses,
21021 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
21022 with C/C++ array sections.
21024 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
21027 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
21028 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
21031 2020-03-14 Jakub Jelinek <jakub@redhat.com>
21033 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
21034 "a an" to "an" in a comment.
21035 * hsa-common.h (is_a_helper): Likewise.
21036 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
21037 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
21038 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
21040 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
21043 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
21044 64-bit value by 64 bits (UB).
21046 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
21048 PR rtl-optimization/92303
21049 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
21051 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
21053 PR rtl-optimization/94148
21054 PR rtl-optimization/94042
21055 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
21056 (df_worklist_propagate_forward): New parameter last_change_age, use
21057 that instead of bb->aux.
21058 (df_worklist_propagate_backward): Ditto.
21059 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
21061 2020-03-13 Richard Biener <rguenther@suse.de>
21063 PR tree-optimization/94163
21064 * tree-ssa-pre.c (create_expression_by_pieces): Check
21065 whether alignment would be zero.
21067 2020-03-13 Martin Liska <mliska@suse.cz>
21070 * lto-wrapper.c (run_gcc): Use concat for appending
21071 to collect_gcc_options.
21073 2020-03-13 Jakub Jelinek <jakub@redhat.com>
21076 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
21077 instead of GEN_INT.
21079 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
21082 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
21083 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
21084 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
21085 TARGET_AVX512VL and ext_sse_reg_operand check.
21087 2020-03-13 Bu Le <bule1@huawei.com>
21090 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
21091 (-param=aarch64-double-recp-precision=): New options.
21092 * doc/invoke.texi: Document them.
21093 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
21094 instead of hard-coding the choice of 1 for float and 2 for double.
21096 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
21098 PR rtl-optimization/94119
21099 * resource.h (clear_hashed_info_until_next_barrier): Declare.
21100 * resource.c (clear_hashed_info_until_next_barrier): New function.
21101 * reorg.c (add_to_delay_list): Fix formatting.
21102 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
21103 the next instruction after removing a BARRIER.
21105 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
21107 PR middle-end/92071
21108 * expmed.c (store_integral_bit_field): For fields larger than a word,
21109 call extract_bit_field on the value if the mode is BLKmode. Remove
21110 specific path for big-endian targets and tidy things up a little bit.
21112 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
21114 PR rtl-optimization/90275
21115 * cse.c (cse_insn): Delete no-op register moves too.
21117 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
21119 * config/rx/rx.md (CTRLREG_CPEN): Remove.
21120 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
21122 2020-03-12 Richard Biener <rguenther@suse.de>
21124 PR tree-optimization/94103
21125 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
21126 punning when the mode precision is not sufficient.
21128 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
21131 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
21132 MODE_V1DF and MODE_V2SF.
21133 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
21134 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
21137 2020-03-12 Jakub Jelinek <jakub@redhat.com>
21139 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
21140 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
21141 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
21142 * doc/tm.texi: Regenerated.
21144 PR tree-optimization/94130
21145 * tree-ssa-dse.c: Include gimplify.h.
21146 (increment_start_addr): If stmt has lhs, drop the lhs from call and
21147 set it after the call to the original value of the first argument.
21149 (decrement_count): Formatting fix.
21151 2020-03-11 Delia Burduv <delia.burduv@arm.com>
21153 * config/arm/arm-builtins.c
21154 (arm_init_simd_builtin_scalar_types): New.
21155 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
21156 (vld2q_bf16): Used new builtin type.
21157 (vld3_bf16): Used new builtin type.
21158 (vld3q_bf16): Used new builtin type.
21159 (vld4_bf16): Used new builtin type.
21160 (vld4q_bf16): Used new builtin type.
21161 (vld2_dup_bf16): Used new builtin type.
21162 (vld2q_dup_bf16): Used new builtin type.
21163 (vld3_dup_bf16): Used new builtin type.
21164 (vld3q_dup_bf16): Used new builtin type.
21165 (vld4_dup_bf16): Used new builtin type.
21166 (vld4q_dup_bf16): Used new builtin type.
21168 2020-03-11 Jakub Jelinek <jakub@redhat.com>
21171 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
21172 at the start to switch to data section. Don't print extra newline if
21173 .globl directive has not been emitted.
21175 2020-03-11 Richard Biener <rguenther@suse.de>
21177 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
21180 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
21182 PR middle-end/93961
21183 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
21184 whose type is a qualified union.
21186 2020-03-11 Jakub Jelinek <jakub@redhat.com>
21189 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
21190 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
21193 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
21195 (get_nth_most_common_value): Use abs_hwi instead of abs.
21197 PR middle-end/94111
21198 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
21199 is rvc_normal, otherwise use real_to_decimal to print the number to
21202 PR tree-optimization/94114
21203 * tree-loop-distribution.c (generate_memset_builtin): Call
21204 rewrite_to_non_trapping_overflow even on mem.
21205 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
21208 2020-03-10 Jeff Law <law@redhat.com>
21210 * config/bfin/bfin.md (movsi_insv): Add length attribute.
21212 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
21215 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
21216 NAN and SIGNED_ZEROR for smax/smin.
21218 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
21221 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
21222 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
21224 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
21226 * loop-iv.c (find_simple_exit): Make it static.
21227 * cfgloop.h: Remove the corresponding prototype.
21229 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
21231 * ddg.c (create_ddg): Fix intendation.
21232 (set_recurrence_length): Likewise.
21233 (create_ddg_all_sccs): Likewise.
21235 2020-03-10 Jakub Jelinek <jakub@redhat.com>
21238 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
21239 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
21242 2020-03-09 Jason Merrill <jason@redhat.com>
21244 * gdbinit.in (pgs): Fix typo in documentation.
21246 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
21250 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
21252 PR rtl-optimization/93564
21253 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
21254 do not honor reg alloc order.
21256 2020-03-09 Andrew Pinski <apinski@marvell.com>
21258 PR inline-asm/94095
21259 * doc/extend.texi (x86 Operand Modifiers): Fix column
21262 2020-03-09 Martin Liska <mliska@suse.cz>
21265 * config/rs6000/rs6000.c (rs6000_option_override_internal):
21266 Remove set of str_align_loops and str_align_jumps as these
21267 should be set in previous 2 conditions in the function.
21269 2020-03-09 Jakub Jelinek <jakub@redhat.com>
21271 PR rtl-optimization/94045
21272 * params.opt (-param=max-find-base-term-values=): New option.
21273 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
21274 in a single toplevel find_base_term call.
21276 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
21279 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
21280 * config/aarch64/aarch64-simd.md
21281 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
21282 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
21283 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
21284 * config/aarch64/arm_neon.h:
21285 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
21286 (vmlal_lane_u16): Likewise.
21287 (vmlal_lane_s32): Likewise.
21288 (vmlal_lane_u32): Likewise.
21289 (vmlal_laneq_s16): Likewise.
21290 (vmlal_laneq_u16): Likewise.
21291 (vmlal_laneq_s32): Likewise.
21292 (vmlal_laneq_u32): Likewise.
21293 (vmull_lane_s16): Likewise.
21294 (vmull_lane_u16): Likewise.
21295 (vmull_lane_s32): Likewise.
21296 (vmull_lane_u32): Likewise.
21297 (vmull_laneq_s16): Likewise.
21298 (vmull_laneq_u16): Likewise.
21299 (vmull_laneq_s32): Likewise.
21300 (vmull_laneq_u32): Likewise.
21301 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
21304 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
21306 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
21307 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
21308 (aarch64_mls_elt<mode>): Likewise.
21309 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
21310 (aarch64_fma4_elt<mode>): Likewise.
21311 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
21312 (aarch64_fma4_elt_to_64v2df): Likewise.
21313 (aarch64_fnma4_elt<mode>): Likewise.
21314 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
21315 (aarch64_fnma4_elt_to_64v2df): Likewise.
21317 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21319 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
21320 Specify movprfx attribute.
21321 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
21323 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
21326 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
21328 (TARGET_NO_FP_IN_TOC): Same.
21329 * config/rs6000/aix71.h: Same.
21330 * config/rs6000/aix72.h: Same.
21332 2020-03-06 Andrew Pinski <apinski@marvell.com>
21333 Jeff Law <law@redhat.com>
21335 PR rtl-optimization/93996
21336 * haifa-sched.c (remove_notes): Be more careful when adding
21339 2020-03-06 Delia Burduv <delia.burduv@arm.com>
21341 * config/arm/arm_neon.h (vld2_bf16): New.
21347 (vld2_dup_bf16): New.
21348 (vld2q_dup_bf16): New.
21349 (vld3_dup_bf16): New.
21350 (vld3q_dup_bf16): New.
21351 (vld4_dup_bf16): New.
21352 (vld4q_dup_bf16): New.
21353 * config/arm/arm_neon_builtins.def
21354 (vld2): Changed to VAR13 and added v4bf, v8bf
21355 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
21356 (vld3): Changed to VAR13 and added v4bf, v8bf
21357 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
21358 (vld4): Changed to VAR13 and added v4bf, v8bf
21359 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
21360 * config/arm/iterators.md (VDXBF2): New iterator.
21361 *config/arm/neon.md (neon_vld2): Use new iterators.
21362 (neon_vld2_dup<mode): Use new iterators.
21363 (neon_vld3<mode>): Likewise.
21364 (neon_vld3qa<mode>): Likewise.
21365 (neon_vld3qb<mode>): Likewise.
21366 (neon_vld3_dup<mode>): Likewise.
21367 (neon_vld4<mode>): Likewise.
21368 (neon_vld4qa<mode>): Likewise.
21369 (neon_vld4qb<mode>): Likewise.
21370 (neon_vld4_dup<mode>): Likewise.
21371 (neon_vld2_dupv8bf): New.
21372 (neon_vld3_dupv8bf): Likewise.
21373 (neon_vld4_dupv8bf): Likewise.
21375 2020-03-06 Delia Burduv <delia.burduv@arm.com>
21377 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
21378 (bfloat16x8x2_t): New typedef.
21379 (bfloat16x4x3_t): New typedef.
21380 (bfloat16x8x3_t): New typedef.
21381 (bfloat16x4x4_t): New typedef.
21382 (bfloat16x8x4_t): New typedef.
21389 * config/arm/arm-builtins.c (v2bf_UP): Define.
21391 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
21392 * config/arm/arm-modes.def (V2BF): New mode.
21393 * config/arm/arm-simd-builtin-types.def
21394 (Bfloat16x2_t): New entry.
21395 * config/arm/arm_neon_builtins.def
21396 (vst2): Changed to VAR13 and added v4bf, v8bf
21397 (vst3): Changed to VAR13 and added v4bf, v8bf
21398 (vst4): Changed to VAR13 and added v4bf, v8bf
21399 * config/arm/iterators.md (VDXBF): New iterator.
21400 (VQ2BF): New iterator.
21401 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
21402 (neon_vst2<mode>): Used new iterators.
21403 (neon_vst3<mode>): Used new iterators.
21404 (neon_vst3<mode>): Used new iterators.
21405 (neon_vst3qa<mode>): Used new iterators.
21406 (neon_vst3qb<mode>): Used new iterators.
21407 (neon_vst4<mode>): Used new iterators.
21408 (neon_vst4<mode>): Used new iterators.
21409 (neon_vst4qa<mode>): Used new iterators.
21410 (neon_vst4qb<mode>): Used new iterators.
21412 2020-03-06 Delia Burduv <delia.burduv@arm.com>
21414 * config/aarch64/aarch64-simd-builtins.def
21415 (bfcvtn): New built-in function.
21416 (bfcvtn_q): New built-in function.
21417 (bfcvtn2): New built-in function.
21418 (bfcvt): New built-in function.
21419 * config/aarch64/aarch64-simd.md
21420 (aarch64_bfcvtn<q><mode>): New pattern.
21421 (aarch64_bfcvtn2v8bf): New pattern.
21422 (aarch64_bfcvtbf): New pattern.
21423 * config/aarch64/arm_bf16.h (float32_t): New typedef.
21424 (vcvth_bf16_f32): New intrinsic.
21425 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
21426 (vcvtq_low_bf16_f32): New intrinsic.
21427 (vcvtq_high_bf16_f32): New intrinsic.
21428 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
21429 (UNSPEC_BFCVTN): New UNSPEC.
21430 (UNSPEC_BFCVTN2): New UNSPEC.
21431 (UNSPEC_BFCVT): New UNSPEC.
21432 * config/arm/types.md (bf_cvt): New type.
21434 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
21436 * config/s390/s390.md ("tabort"): Get rid of two consecutive
21437 blanks in format string.
21439 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
21443 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
21444 * config/i386/i386.c (ix86_get_ssemov): New function.
21445 (ix86_output_ssemov): Likewise.
21446 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
21447 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
21449 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
21450 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
21451 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
21452 (*movti_internal): Likewise.
21453 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
21455 2020-03-05 Jeff Law <law@redhat.com>
21457 PR tree-optimization/91890
21458 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
21459 Use gimple_or_expr_nonartificial_location.
21460 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
21461 Use gimple_or_expr_nonartificial_location.
21462 * gimple.c (gimple_or_expr_nonartificial_location): New function.
21463 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
21464 * tree-ssa-strlen.c (maybe_warn_overflow): Use
21465 gimple_or_expr_nonartificial_location.
21466 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
21467 (maybe_warn_pointless_strcmp): Likewise.
21469 2020-03-05 Jakub Jelinek <jakub@redhat.com>
21472 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
21473 SRC and MASK arguments to __m128 from __m128d.
21474 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
21476 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
21478 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
21479 argument to __m128i from __m128d.
21480 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
21482 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
21483 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
21486 2020-03-05 Delia Burduv <delia.burduv@arm.com>
21488 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
21489 (vbfmlalbq_f32): New.
21490 (vbfmlaltq_f32): New.
21491 (vbfmlalbq_lane_f32): New.
21492 (vbfmlaltq_lane_f32): New.
21493 (vbfmlalbq_laneq_f32): New.
21494 (vbfmlaltq_laneq_f32): New.
21495 * config/arm/arm_neon_builtins.def (vmmla): New.
21500 (vfmab_laneq): New.
21501 (vfmat_laneq): New.
21502 * config/arm/iterators.md (BF_MA): New int iterator.
21503 (bt): New int attribute.
21504 (VQXBF): Copy of VQX with V8BF.
21505 * config/arm/neon.md (neon_vmmlav8bf): New insn.
21506 (neon_vfma<bt>v8bf): New insn.
21507 (neon_vfma<bt>_lanev8bf): New insn.
21508 (neon_vfma<bt>_laneqv8bf): New expand.
21509 (neon_vget_high<mode>): Changed iterator to VQXBF.
21510 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
21511 (UNSPEC_BFMAB): New UNSPEC.
21512 (UNSPEC_BFMAT): New UNSPEC.
21514 2020-03-05 Jakub Jelinek <jakub@redhat.com>
21516 PR middle-end/93399
21517 * tree-pretty-print.h (pretty_print_string): Declare.
21518 * tree-pretty-print.c (pretty_print_string): Remove forward
21519 declaration, no longer static. Change nbytes parameter type
21520 from unsigned to size_t.
21521 * print-rtl.c (print_value) <case CONST_STRING>: Use
21522 pretty_print_string and for shrink way too long strings.
21524 2020-03-05 Richard Biener <rguenther@suse.de>
21525 Jakub Jelinek <jakub@redhat.com>
21527 PR tree-optimization/93582
21528 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
21529 last operand as signed when looking for memset offset. Formatting
21532 2020-03-04 Andrew Pinski <apinski@marvell.com>
21535 * value-prof.c (dump_histogram_value): Use std::abs.
21537 2020-03-04 Martin Sebor <msebor@redhat.com>
21539 PR tree-optimization/93986
21540 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
21541 operands to the same precision widest_int to avoid ICEs.
21543 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
21546 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
21547 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
21548 for OPTION_MASK_ALTIVEC.
21550 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
21552 * config.gcc: Include the glibc-stdint.h header for zTPF.
21554 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
21556 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
21557 direct FPR-GPR copies.
21558 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
21561 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
21563 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
21564 operands to the prologue_tpf expander.
21565 (s390_emit_epilogue): Likewise.
21566 (s390_option_override_internal): Do error checking and setup for
21568 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
21569 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
21570 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
21571 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
21572 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
21573 operands for the check flag and the branch target.
21574 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
21575 ("mtpf-trace-hook-prologue-target")
21576 ("mtpf-trace-hook-epilogue-check")
21577 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
21579 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
21580 options are for debugging purposes and will not be documented
21583 2020-03-04 Jakub Jelinek <jakub@redhat.com>
21586 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
21588 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
21589 argument. Change pd argument so that it can be modified. Turn
21590 constant non-CONSTRUCTOR store into non-constant if it is too large.
21591 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
21593 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
21596 2020-02-04 Richard Biener <rguenther@suse.de>
21598 PR tree-optimization/93964
21599 * graphite-isl-ast-to-gimple.c
21600 (gcc_expression_from_isl_ast_expr_id): Add intermediate
21601 conversion for pointer to integer converts.
21602 * graphite-scop-detection.c (assign_parameter_index_in_region):
21605 2020-03-04 Martin Liska <mliska@suse.cz>
21609 * doc/invoke.texi: Clarify --help=language and --help=common
21612 2020-03-04 Jakub Jelinek <jakub@redhat.com>
21614 PR tree-optimization/94001
21615 * tree-tailcall.c (process_assignment): Before comparing op1 to
21616 *ass_var, verify *ass_var is non-NULL.
21618 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
21621 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
21624 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
21626 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
21627 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
21628 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
21629 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
21630 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
21631 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
21632 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
21633 (V_bf_low, V_bf_cvt_m): New mode attributes.
21634 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
21635 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
21636 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
21637 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
21638 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
21640 2020-03-03 Jakub Jelinek <jakub@redhat.com>
21642 PR tree-optimization/93582
21643 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
21644 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
21645 members, initialize them in the constructor and if mask is non-NULL,
21646 artificially push_partial_def {} for the portions of the mask that
21648 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
21649 val and return (void *)-1. Formatting fix.
21650 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
21652 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
21653 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
21655 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
21657 (visit_stmt): Formatting fix.
21659 2020-03-03 Richard Biener <rguenther@suse.de>
21661 PR tree-optimization/93946
21662 * alias.h (refs_same_for_tbaa_p): Declare.
21663 * alias.c (refs_same_for_tbaa_p): New function.
21664 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
21666 * tree-ssa-scopedtables.h
21667 (avail_exprs_stack::lookup_avail_expr): Add output argument
21668 giving access to the hashtable entry.
21669 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
21671 * tree-ssa-dom.c: Include alias.h.
21672 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
21673 removing redundant store.
21674 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
21675 (ao_ref_init_from_vn_reference): Adjust prototype.
21676 (vn_reference_lookup_pieces): Likewise.
21677 (vn_reference_insert_pieces): Likewise.
21678 * tree-ssa-sccvn.c: Track base alias set in addition to alias
21680 (eliminate_dom_walker::eliminate_stmt): Also check base alias
21681 set when removing redundant stores.
21682 (visit_reference_op_store): Likewise.
21683 * dse.c (record_store): Adjust valdity check for redundant
21686 2020-03-03 Jakub Jelinek <jakub@redhat.com>
21689 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
21691 PR rtl-optimization/94002
21692 * explow.c (plus_constant): Punt if cst has VOIDmode and
21693 get_pool_mode is different from mode.
21695 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21697 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
21698 address has an offset which fits the scalling constraint for a
21699 load/store operation.
21700 (legitimate_scaled_address_p): Update use
21701 leigitimate_small_data_address_p.
21702 (arc_print_operand): Likewise.
21703 (arc_legitimate_address_p): Likewise.
21704 (legitimate_small_data_address_p): Likewise.
21706 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21708 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
21709 (fnmasf4_fpu): Likewise.
21711 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21713 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
21715 (subdi3): Likewise.
21716 (adddi3_i): Remove pattern.
21717 (subdi3_i): Likewise.
21719 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21721 * config/arc/arc.md (eh_return): Add length info.
21723 2020-03-02 David Malcolm <dmalcolm@redhat.com>
21725 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
21727 2020-03-02 David Malcolm <dmalcolm@redhat.com>
21729 * doc/invoke.texi (Static Analyzer Options): Add
21730 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
21733 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
21736 * config/i386/i386.md (movstrict<mode>): Allow only
21737 registers with VALID_INT_MODE_P modes.
21739 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
21741 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
21742 (reduc_insn): Use 'U' and 'B' operand codes.
21743 (reduc_<reduc_op>_scal_<mode>): Allow all types.
21744 (reduc_<reduc_op>_scal_v64di): Delete.
21745 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
21746 (*plus_carry_dpp_shr_v64si): Change to ...
21747 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
21748 (mov_from_lane63_v64di): Change to ...
21749 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
21750 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
21751 Support UNSPEC_MOV_DPP_SHR output formats.
21752 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
21753 Add "use_extends" reductions.
21754 (print_operand_address): Add 'I' and 'U' codes.
21755 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
21757 2020-03-02 Martin Liska <mliska@suse.cz>
21759 * lto-wrapper.c: Fix typo in comment about
21760 C++ standard version.
21762 2020-03-01 Martin Sebor <msebor@redhat.com>
21765 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
21767 2020-03-01 Martin Sebor <msebor@redhat.com>
21769 PR middle-end/93829
21770 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
21771 of a pointer in the outermost ADDR_EXPRs.
21773 2020-02-28 Jeff Law <law@redhat.com>
21775 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
21776 * config/v850/v850.c (v850_asm_trampoline_template): Update
21779 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
21782 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
21785 2020-02-28 Martin Liska <mliska@suse.cz>
21788 * configure.ac: Improve detection of ld_date by requiring
21789 either two dashes or none.
21790 * configure: Regenerate.
21792 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
21794 PR rtl-optimization/93564
21795 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
21796 do not honor reg alloc order.
21798 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
21801 * config/aarch64/aarch64.c (aarch64_override_options): Fix
21802 misleading warning string.
21804 2020-02-27 Martin Sebor <msebor@redhat.com>
21806 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
21808 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
21811 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
21812 Split the insn into two parts. This insn only does variable
21813 extract from a register.
21814 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
21815 variable extract from memory.
21816 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
21817 only does variable extract from a register.
21818 (vsx_extract_v4sf_var_load): New insn, do variable extract from
21820 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
21821 into two parts. This insn only does variable extract from a
21823 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
21824 do variable extract from memory.
21826 2020-02-27 Martin Jambor <mjambor@suse.cz>
21827 Feng Xue <fxue@os.amperecomputing.com>
21830 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
21831 new function calls_same_node_or_its_all_contexts_clone_p.
21832 (cgraph_edge_brings_value_p): Use it.
21833 (cgraph_edge_brings_value_p): Likewise.
21834 (self_recursive_pass_through_p): Return false if caller is a clone.
21835 (self_recursive_agg_pass_through_p): Likewise.
21837 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
21839 PR middle-end/92152
21840 * alias.c (ends_tbaa_access_path_p): Break out from ...
21841 (component_uses_parent_alias_set_from): ... here.
21842 * alias.h (ends_tbaa_access_path_p): Declare.
21843 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
21844 handle trailing arrays past end of tbaa access path.
21845 (aliasing_component_refs_p): ... here; likewise.
21846 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
21847 path; disambiguate also past end of it.
21848 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
21851 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
21853 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
21854 beginning of the file.
21855 (vcreate_bf16, vcombine_bf16): New.
21856 (vdup_n_bf16, vdupq_n_bf16): New.
21857 (vdup_lane_bf16, vdup_laneq_bf16): New.
21858 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
21859 (vduph_lane_bf16, vduph_laneq_bf16): New.
21860 (vset_lane_bf16, vsetq_lane_bf16): New.
21861 (vget_lane_bf16, vgetq_lane_bf16): New.
21862 (vget_high_bf16, vget_low_bf16): New.
21863 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
21864 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
21865 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
21866 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
21867 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
21868 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
21869 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
21870 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
21871 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
21872 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
21873 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
21874 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
21875 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
21876 (vreinterpretq_bf16_p128): New.
21877 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
21878 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
21879 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
21880 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
21881 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
21882 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
21883 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
21884 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
21885 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
21886 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
21887 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
21888 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
21889 (vreinterpretq_p128_bf16): New.
21890 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
21891 (V_elem): Likewise.
21892 (V_elem_l): Likewise.
21893 (VD_LANE): Likewise.
21895 (V_DOUBLE): Likewise.
21896 (VDQX): Add V4BF and V8BF.
21897 (V_two_elem, V_three_elem, V_four_elem): Likewise.
21899 (V_HALF): Likewise.
21900 (V_double_vector_mode): Likewise.
21901 (V_cmp_result): Likewise.
21902 (V_uf_sclr): Likewise.
21903 (V_sz_elem): Likewise.
21904 (Is_d_reg): Likewise.
21905 (V_mode_nunits): Likewise.
21906 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
21908 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
21910 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
21911 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
21912 (<expander><mode>3<exec>): Likewise.
21913 (<expander><mode>3): New.
21914 (v<expander><mode>3): New.
21915 (<expander><mode>3): New.
21916 (<expander><mode>3<exec>): Rename to ...
21917 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
21918 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
21920 2020-02-27 Alexandre Oliva <oliva@adacore.com>
21922 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
21925 2020-02-27 Richard Biener <rguenther@suse.de>
21927 PR tree-optimization/93508
21928 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
21929 non-_CHK variants. Valueize their length arguments.
21931 2020-02-27 Richard Biener <rguenther@suse.de>
21933 PR tree-optimization/93953
21934 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
21935 to the hash-map entry.
21937 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
21939 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
21941 2020-02-27 Mark Williams <mwilliams@fb.com>
21943 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
21944 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
21945 -ffile-prefix-map and -fmacro-prefix-map.
21946 * lto-streamer-out.c: Include file-prefix-map.h.
21947 (lto_output_location): Remap the file part of locations.
21949 2020-02-27 Jakub Jelinek <jakub@redhat.com>
21952 * gimplify.c (gimplify_init_constructor): Don't promote readonly
21953 DECL_REGISTER variables to TREE_STATIC.
21955 PR tree-optimization/93582
21956 PR tree-optimization/93945
21957 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
21958 non-zero INTEGER_CST second argument and ref->offset or ref->size
21959 not a multiple of BITS_PER_UNIT.
21961 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
21963 * doc/install.texi (Binaries): Update description of BullFreeware.
21965 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
21969 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
21970 C++ Language Options, Warning Options, and Static Analyzer
21971 Options lists. Document negative form of options enabled by
21972 default. Move some things around to more accurately sort
21973 warnings by category.
21974 (C++ Dialect Options, Warning Options, Static Analyzer
21975 Options): Document negative form of options when enabled by
21976 default. Move some things around to more accurately sort
21977 warnings by category. Add some missing index entries.
21978 Light copy-editing.
21980 2020-02-26 Carl Love <cel@us.ibm.com>
21983 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
21984 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
21985 for the vector unsigned short arguments. It is also listed as the
21986 name of the built-in for arguments vector unsigned short,
21987 vector unsigned int and vector unsigned long long built-ins. The
21988 name of the builtins for these arguments should be:
21989 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
21990 __builtin_crypto_vpmsumd respectively.
21992 2020-02-26 Richard Biener <rguenther@suse.de>
21994 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
21995 and load permutation.
21997 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
21999 PR middle-end/93843
22000 * optabs-tree.c (supportable_convert_operation): Reject types with
22003 2020-02-26 David Malcolm <dmalcolm@redhat.com>
22005 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
22007 2020-02-26 Jakub Jelinek <jakub@redhat.com>
22009 PR tree-optimization/93820
22010 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
22011 argument to ALL_INTEGER_CST_P boolean.
22012 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
22013 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
22014 adjacent INTEGER_CST store into merged_store->only_constants like
22017 2020-02-25 Jakub Jelinek <jakub@redhat.com>
22020 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
22022 * cfghooks.c (verify_flow_info): Likewise.
22023 * predict.c (combine_predictions_for_bb): Likewise.
22024 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
22025 sucessor -> successor.
22026 (find_traces_1_round): Fix comment typo, destinarion -> destination.
22027 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
22029 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
22030 message typo, sucessors -> successors.
22032 2020-02-25 Martin Sebor <msebor@redhat.com>
22034 * doc/extend.texi (attribute access): Correct an example.
22036 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
22038 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
22040 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
22041 (VAR15, VAR16): New.
22042 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
22043 (VD): Enable for V4BF.
22045 (VQ): Enable for V8BF.
22047 (VQ_NO2E): Likewise.
22048 (VDBL, Vdbl): Add V4BF.
22049 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
22050 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
22051 (bfloat16x8x2_t): Likewise.
22052 (bfloat16x4x3_t): Likewise.
22053 (bfloat16x8x3_t): Likewise.
22054 (bfloat16x4x4_t): Likewise.
22055 (bfloat16x8x4_t): Likewise.
22056 (vcombine_bf16): New.
22057 (vld1_bf16, vld1_bf16_x2): New.
22058 (vld1_bf16_x3, vld1_bf16_x4): New.
22059 (vld1q_bf16, vld1q_bf16_x2): New.
22060 (vld1q_bf16_x3, vld1q_bf16_x4): New.
22061 (vld1_lane_bf16): New.
22062 (vld1q_lane_bf16): New.
22063 (vld1_dup_bf16): New.
22064 (vld1q_dup_bf16): New.
22067 (vld2_dup_bf16): New.
22068 (vld2q_dup_bf16): New.
22071 (vld3_dup_bf16): New.
22072 (vld3q_dup_bf16): New.
22075 (vld4_dup_bf16): New.
22076 (vld4q_dup_bf16): New.
22077 (vst1_bf16, vst1_bf16_x2): New.
22078 (vst1_bf16_x3, vst1_bf16_x4): New.
22079 (vst1q_bf16, vst1q_bf16_x2): New.
22080 (vst1q_bf16_x3, vst1q_bf16_x4): New.
22081 (vst1_lane_bf16): New.
22082 (vst1q_lane_bf16): New.
22090 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
22092 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
22093 (VALL_F16): Likewise.
22094 (VALLDI_F16): Likewise.
22096 (Vetype): Likewise.
22097 (vswap_width_name): Likewise.
22098 (VSWAP_WIDTH): Likewise.
22102 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
22103 (vget_lane_bf16, vgetq_lane_bf16): New.
22104 (vcreate_bf16): New.
22105 (vdup_n_bf16, vdupq_n_bf16): New.
22106 (vdup_lane_bf16, vdup_laneq_bf16): New.
22107 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
22108 (vduph_lane_bf16, vduph_laneq_bf16): New.
22109 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
22110 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
22111 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
22112 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
22113 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
22114 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
22115 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
22116 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
22117 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
22118 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
22119 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
22120 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
22121 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
22122 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
22123 (vreinterpretq_bf16_p128): New.
22124 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
22125 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
22126 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
22127 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
22128 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
22129 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
22130 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
22131 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
22132 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
22133 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
22134 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
22135 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
22136 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
22137 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
22138 (vreinterpretq_p128_bf16): New.
22140 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
22142 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
22143 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
22144 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
22145 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
22146 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
22147 * config/arm/iterators.md (VSF2BF): New attribute.
22148 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
22149 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
22150 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
22152 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
22154 * config/arm/arm.md (required_for_purecode): New attribute.
22155 (enabled): Handle required_for_purecode.
22156 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
22157 work with -mpure-code.
22159 2020-02-25 Jakub Jelinek <jakub@redhat.com>
22161 PR rtl-optimization/93908
22162 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
22165 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
22167 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
22169 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
22171 * doc/install.texi (--enable-checking): Adjust wording.
22173 2020-02-25 Richard Biener <rguenther@suse.de>
22175 PR tree-optimization/93868
22176 * tree-vect-slp.c (slp_copy_subtree): New function.
22177 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
22178 re-arranging stmts in it.
22180 2020-02-25 Jakub Jelinek <jakub@redhat.com>
22182 PR middle-end/93874
22183 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
22184 dummy function and remove it at the end.
22186 PR translation/93864
22187 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
22188 paramter -> parameter.
22189 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
22190 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
22192 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
22194 * doc/install.texi (--enable-checking): Properly document current
22196 (--enable-stage1-checking): Minor clarification about bootstrap.
22198 2020-02-24 David Malcolm <dmalcolm@redhat.com>
22201 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
22202 -fanalyzer-checker=taint is also required.
22203 (-fanalyzer-checker=): Note that providing this option enables the
22204 given checker, and doing so may be required for checkers that are
22205 disabled by default.
22207 2020-02-24 David Malcolm <dmalcolm@redhat.com>
22209 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
22210 significant control flow events; add a "3" which shows all
22211 control flow events; the old "3" becomes "4".
22213 2020-02-24 Jakub Jelinek <jakub@redhat.com>
22215 PR tree-optimization/93582
22216 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
22217 pd.offset and pd.size to be counted in bits rather than bytes, add
22218 support for maxsizei that is not a multiple of BITS_PER_UNIT and
22219 handle bitfield stores and loads.
22220 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
22221 uncomparable quantities - bytes vs. bits. Allow push_partial_def
22222 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
22223 pd.offset/pd.size to be counted in bits rather than bytes.
22224 Formatting fix. Rename shadowed len variable to buflen.
22226 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
22227 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
22230 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
22231 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
22232 * opts-common.c (parse_options_from_collect_gcc_options): New function.
22233 (prepend_xassembler_to_collect_as_options): Likewise.
22234 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
22235 (prepend_xassembler_to_collect_as_options): Likewise.
22236 * lto-opts.c (lto_write_options): Stream assembler options
22237 in COLLECT_AS_OPTIONS.
22238 * lto-wrapper.c (xassembler_options_error): New static variable.
22239 (get_options_from_collect_gcc_options): Move parsing options code to
22240 parse_options_from_collect_gcc_options and call it.
22241 (merge_and_complain): Validate -Xassembler options.
22242 (append_compiler_options): Handle OPT_Xassembler.
22243 (run_gcc): Append command line -Xassembler options to
22244 collect_gcc_options.
22245 * doc/invoke.texi: Add documentation about using Xassembler
22248 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
22250 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
22252 (riscv_rtx_costs): Update cost model for LTGT.
22254 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
22256 PR rtl-optimization/93564
22257 * ira-color.c (struct update_cost_queue_elem): New member start.
22258 (queue_update_cost, get_next_update_cost): Add new arg start.
22259 (allocnos_conflict_p): New function.
22260 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
22261 Add checking conflicts with allocnos_conflict_p.
22262 (update_costs_from_prefs, restore_costs_from_copies): Adjust
22263 update_costs_from_allocno calls.
22264 (update_conflict_hard_regno_costs): Add checking conflicts with
22265 allocnos_conflict_p. Adjust calls of queue_update_cost and
22266 get_next_update_cost.
22267 (assign_hard_reg): Adjust calls of queue_update_cost. Add
22269 (bucket_allocno_compare_func): Restore previous version.
22271 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
22273 * config/pa/pa.c (pa_function_value): Fix check for word and
22274 double-word size when handling aggregate return values.
22275 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
22276 that homogeneous SFmode and DFmode aggregates are passed and returned
22277 in general registers.
22279 2020-02-21 Jakub Jelinek <jakub@redhat.com>
22281 PR translation/93759
22282 * opts.c (print_filtered_help): Translate help before appending
22283 messages to it rather than after that.
22285 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
22287 PR rtl-optimization/PR92989
22288 * lra-lives.c (process_bb_lives): Restore the original order
22289 of the bb liveness update. Call make_hard_regno_dead for each
22290 register clobbered at the start of an EH receiver.
22292 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
22295 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
22296 self-recursively generated.
22298 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
22301 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
22304 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
22306 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
22307 Document new target supports option.
22309 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
22311 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
22312 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
22313 * config/arm/iterators.md (MATMUL): New iterator.
22314 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
22315 (mmla_sfx): New attribute.
22316 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
22317 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
22318 (UNSPEC_MATMUL_US): New.
22320 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22322 * config/arm/arm.md: Prevent scalar shifts from being used when big
22325 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
22326 Richard Biener <rguenther@suse.de>
22328 PR tree-optimization/93586
22329 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
22330 after mismatched array refs; do not sure type size information to
22331 recover from unmatched referneces with !flag_strict_aliasing_p.
22333 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
22335 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
22336 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
22337 (scatter_store<mode>): Rename to ...
22338 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
22339 (scatter<mode>_exec): Delete. Move contents ...
22340 (mask_scatter_store<mode>): ... here, and rename that to ...
22341 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
22342 Remove mode conversion.
22343 (mask_gather_load<mode>): Rename to ...
22344 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
22345 Remove mode conversion.
22346 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
22348 2020-02-21 Martin Jambor <mjambor@suse.cz>
22350 PR tree-optimization/93845
22351 * tree-sra.c (verify_sra_access_forest): Only test access size of
22354 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
22356 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
22357 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
22358 (addv64di3_exec): Likewise.
22359 (subv64di3): Likewise.
22360 (subv64di3_exec): Likewise.
22361 (addv64di3_zext): Likewise.
22362 (addv64di3_zext_exec): Likewise.
22363 (addv64di3_zext_dup): Likewise.
22364 (addv64di3_zext_dup_exec): Likewise.
22365 (addv64di3_zext_dup2): Likewise.
22366 (addv64di3_zext_dup2_exec): Likewise.
22367 (addv64di3_sext_dup2): Likewise.
22368 (addv64di3_sext_dup2_exec): Likewise.
22369 (<expander>v64di3): Likewise.
22370 (<expander>v64di3_exec): Likewise.
22371 (*<reduc_op>_dpp_shr_v64di): Likewise.
22372 (*plus_carry_dpp_shr_v64di): Likewise.
22373 * config/gcn/gcn.md (adddi3): Likewise.
22374 (addptrdi3): Likewise.
22375 (<expander>di3): Likewise.
22377 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
22379 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
22381 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
22383 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
22384 support. Use aarch64_emit_mult instead of emitting multiplication
22385 instructions directly.
22386 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
22387 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
22389 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
22391 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
22392 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
22393 instead of emitting multiplication instructions directly.
22394 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
22395 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
22396 (@aarch64_frecps<mode>): New expanders.
22398 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
22400 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
22401 on and produce uint64_ts rather than ints.
22402 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
22403 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
22405 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
22407 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
22408 an unused xmsk register when handling approximate rsqrt.
22410 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
22412 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
22413 flag_finite_math_only condition.
22415 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
22418 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
22419 to destination operand for shufps alternative.
22420 (*vec_extractv2si_1): Ditto.
22422 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
22425 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
22428 2020-02-20 Martin Liska <mliska@suse.cz>
22430 PR translation/93831
22431 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
22433 2020-02-20 Martin Liska <mliska@suse.cz>
22435 PR translation/93830
22436 * common/config/avr/avr-common.c: Remote trailing "|".
22438 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
22440 * collect2.c (maybe_run_lto_and_relink): Fix typo in
22443 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
22445 PR tree-optimization/93767
22446 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
22447 access-size bias from the offset calculations for negative strides.
22449 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
22451 * collect2.c (c_file, o_file): Make const again.
22452 (ldout,lderrout, dump_ld_file): Remove.
22453 (tool_cleanup): Avoid calling not signal-safe functions.
22454 (maybe_run_lto_and_relink): Avoid possible signal handler
22455 access to unintialzed memory (lto_o_files).
22456 (main): Avoid leaking temp files in $TMPDIR.
22457 Initialize c_file/o_file with concat, which avoids exposing
22458 uninitialized memory to signal handler, which calls unlink(!).
22459 Avoid calling maybe_unlink when the main function returns,
22460 since the atexit handler is already doing this.
22461 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
22463 2020-02-19 Martin Jambor <mjambor@suse.cz>
22465 PR tree-optimization/93776
22466 * tree-sra.c (create_access): Do not create zero size accesses.
22467 (get_access_for_expr): Do not search for zero sized accesses.
22469 2020-02-19 Martin Jambor <mjambor@suse.cz>
22471 PR tree-optimization/93667
22472 * tree-sra.c (scalarizable_type_p): Return false if record fields
22473 do not follow wach other.
22475 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
22477 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
22478 rather than fmv.x.s/fmv.s.x.
22480 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
22482 * config/aarch64/aarch64-simd-builtins.def
22483 (intrinsic_vec_smult_lo_): New.
22484 (intrinsic_vec_umult_lo_): Likewise.
22485 (vec_widen_smult_hi_): Likewise.
22486 (vec_widen_umult_hi_): Likewise.
22487 * config/aarch64/aarch64-simd.md
22488 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
22489 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
22490 (vmull_high_s16): Likewise.
22491 (vmull_high_s32): Likewise.
22492 (vmull_high_u8): Likewise.
22493 (vmull_high_u16): Likewise.
22494 (vmull_high_u32): Likewise.
22495 (vmull_s8): Likewise.
22496 (vmull_s16): Likewise.
22497 (vmull_s32): Likewise.
22498 (vmull_u8): Likewise.
22499 (vmull_u16): Likewise.
22500 (vmull_u32): Likewise.
22502 2020-02-18 Martin Liska <mliska@suse.cz>
22504 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
22505 bootstrap by missing removal of invalid sanity check.
22507 2020-02-18 Martin Liska <mliska@suse.cz>
22510 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
22511 Always compare LHS of gimple_assign.
22513 2020-02-18 Martin Liska <mliska@suse.cz>
22516 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
22517 and return type of functions.
22518 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
22519 Drop MALLOC attribute for void functions.
22520 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
22521 malloc_state for a new VOID clone.
22523 2020-02-18 Martin Liska <mliska@suse.cz>
22526 * common.opt: Add -fprofile-reproducibility.
22527 * doc/invoke.texi: Document it.
22528 * value-prof.c (dump_histogram_value):
22529 Document and support behavior for counters[0]
22530 being a negative value.
22531 (get_nth_most_common_value): Handle negative
22532 counters[0] in respect to flag_profile_reproducible.
22534 2020-02-18 Jakub Jelinek <jakub@redhat.com>
22537 * cgraph.c (verify_speculative_call): Use speculative_id instead of
22538 speculative_uid in messages. Remove trailing whitespace from error
22539 message. Use num_speculative_call_targets instead of
22540 num_speculative_targets in a message.
22541 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
22542 edge messages and stmt instead of cal_stmt in reference message.
22544 PR tree-optimization/93780
22545 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
22546 before calling build_vector_type.
22547 (execute_update_addresses_taken): Likewise.
22550 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
22551 typo, functoin -> function.
22552 * tree.c (free_lang_data_in_decl): Fix comment typo,
22553 functoin -> function.
22554 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
22556 2020-02-17 David Malcolm <dmalcolm@redhat.com>
22558 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
22560 (print_option_information): Don't call get_option_url if URLs
22563 2020-02-17 Alexandre Oliva <oliva@adacore.com>
22565 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
22566 handling of register_common-less targets.
22568 2020-02-17 Martin Liska <mliska@suse.cz>
22571 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
22573 2020-02-17 Martin Liska <mliska@suse.cz>
22575 PR translation/93755
22576 * config/rs6000/rs6000.c (rs6000_option_override_internal):
22579 2020-02-17 Martin Liska <mliska@suse.cz>
22582 * config/rx/elf.opt: Fix typo.
22584 2020-02-17 Richard Biener <rguenther@suse.de>
22587 * opts-global.c (print_ignored_options): Use inform and
22590 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
22593 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
22595 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
22598 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
22599 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
22601 2020-02-15 Jason Merrill <jason@redhat.com>
22603 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
22605 2020-02-15 Jakub Jelinek <jakub@redhat.com>
22607 PR tree-optimization/93744
22608 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
22609 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
22610 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
22611 sure @2 in the first and @1 in the other patterns has no side-effects.
22613 2020-02-15 David Malcolm <dmalcolm@redhat.com>
22614 Bernd Edlinger <bernd.edlinger@hotmail.de>
22618 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
22619 * configure.ac (--with-diagnostics-urls): New configuration
22620 option, based on --with-diagnostics-color.
22621 (DIAGNOSTICS_URLS_DEFAULT): New define.
22622 * config.h: Regenerate.
22623 * configure: Regenerate.
22624 * diagnostic.c (diagnostic_urls_init): Handle -1 for
22625 DIAGNOSTICS_URLS_DEFAULT from configure-time
22626 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
22627 and TERM_URLS environment variable.
22628 * diagnostic-url.h (diagnostic_url_format): New enum type.
22629 (diagnostic_urls_enabled_p): rename to...
22630 (determine_url_format): ... this, and change return type.
22631 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
22632 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
22633 the linux console, and mingw.
22634 (diagnostic_urls_enabled_p): rename to...
22635 (determine_url_format): ... this, and adjust.
22636 * pretty-print.h (pretty_printer::show_urls): rename to...
22637 (pretty_printer::url_format): ... this, and change to enum.
22638 * pretty-print.c (pretty_printer::pretty_printer,
22639 pp_begin_url, pp_end_url, test_urls): Adjust.
22640 * doc/install.texi (--with-diagnostics-urls): Document the new
22641 configuration option.
22642 (--with-diagnostics-color): Document the existing interaction
22643 with GCC_COLORS better.
22644 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
22645 vindex reference. Update description of defaults based on the above.
22646 (-fdiagnostics-color): Update description of how -fdiagnostics-color
22647 interacts with GCC_COLORS.
22649 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
22652 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
22653 conjunction with TARGET_GNU_TLS in early return.
22655 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
22657 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
22658 the mode is not wider than UNITS_PER_WORD.
22660 2020-02-14 Martin Jambor <mjambor@suse.cz>
22662 PR tree-optimization/93516
22663 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
22664 access of the same type as the parent.
22665 (propagate_subaccesses_from_lhs): Likewise.
22667 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
22670 * config/i386/avx512vbmi2intrin.h
22671 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
22672 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
22673 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
22674 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
22675 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
22676 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
22677 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
22678 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
22679 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
22680 of lacking a closing parenthesis.
22681 * config/i386/avx512vbmi2vlintrin.h
22682 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
22683 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
22684 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
22685 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
22686 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
22687 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
22688 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
22689 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
22690 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
22691 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
22692 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
22693 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
22694 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
22695 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
22696 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
22697 _mm_shldi_epi32, _mm_mask_shldi_epi32,
22698 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
22699 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
22701 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
22704 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
22705 the target function entry.
22707 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22709 * common/config/arc/arc-common.c (arc_option_optimization_table):
22710 Disable if-conversion step when optimized for size.
22712 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22714 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
22715 R12-R15 are always in ARCOMPACT16_REGS register class.
22716 * config/arc/arc.opt (mq-class): Deprecate.
22717 * config/arc/constraint.md ("q"): Remove dependency on mq-class
22719 * doc/invoke.texi (mq-class): Update text.
22720 * common/config/arc/arc-common.c (arc_option_optimization_table):
22723 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22725 * config/arc/arc.c (arc_insn_cost): New function.
22726 (TARGET_INSN_COST): Define.
22727 * config/arc/arc.md (cost): New attribute.
22728 (add_n): Use arc_nonmemory_operand.
22729 (ashlsi3_insn): Likewise, also update constraints.
22730 (ashrsi3_insn): Likewise.
22731 (rotrsi3): Likewise.
22732 (add_shift): Likewise.
22733 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
22735 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22737 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
22739 (umulsidi_600): Likewise.
22741 2020-02-13 Jakub Jelinek <jakub@redhat.com>
22744 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
22745 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
22746 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
22747 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
22748 pass __A to the builtin followed by __W instead of __A followed by
22750 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
22751 _mm512_mask_popcnt_epi64): Likewise.
22752 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
22753 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
22754 _mm256_mask_popcnt_epi64): Likewise.
22756 PR tree-optimization/93582
22757 * fold-const.h (shift_bytes_in_array_left,
22758 shift_bytes_in_array_right): Declare.
22759 * fold-const.c (shift_bytes_in_array_left,
22760 shift_bytes_in_array_right): New function, moved from
22761 gimple-ssa-store-merging.c, no longer static.
22762 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
22763 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
22764 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
22765 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
22766 shift_bytes_in_array.
22767 (verify_shift_bytes_in_array): Rename to ...
22768 (verify_shift_bytes_in_array_left): ... this. Use
22769 shift_bytes_in_array_left instead of shift_bytes_in_array.
22770 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
22771 instead of verify_shift_bytes_in_array.
22772 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
22773 / native_interpret_expr where the store covers all needed bits,
22774 punt on PDP-endian, otherwise allow all involved offsets and sizes
22775 not to be byte-aligned.
22778 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
22779 use const_0_to_255_operand predicate instead of immediate_operand.
22780 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
22781 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
22782 vgf2p8affineinvqb_<mode><mask_name>,
22783 vgf2p8affineqb_<mode><mask_name>): Drop mode from
22784 const_0_to_255_operand predicated operands.
22786 2020-02-12 Jeff Law <law@redhat.com>
22788 * config/h8300/h8300.md (comparison shortening peepholes): Use
22789 a mode iterator to merge the HImode and SImode peepholes.
22791 2020-02-12 Jakub Jelinek <jakub@redhat.com>
22793 PR middle-end/93663
22794 * real.c (is_even): Make static. Function comment fix.
22795 (is_halfway_below): Make static, don't assert R is not inf/nan,
22796 instead return false for those. Small formatting fixes.
22798 2020-02-12 Martin Sebor <msebor@redhat.com>
22800 PR middle-end/93646
22801 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
22802 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
22803 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
22804 (strlen_check_and_optimize_call): Adjust callee name.
22806 2020-02-12 Jeff Law <law@redhat.com>
22808 * config/h8300/h8300.md (comparison shortening peepholes): Drop
22809 (and (xor)) variant. Combine other two into single peephole.
22811 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
22813 PR rtl-optimization/93565
22814 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
22816 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
22818 * config/aarch64/aarch64-simd.md
22819 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
22820 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
22821 generating separate ADDV and zero_extend patterns.
22822 * config/aarch64/iterators.md (VDQV_E): New iterator.
22824 2020-02-12 Jeff Law <law@redhat.com>
22826 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
22827 expanders, splits, etc.
22828 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
22829 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
22830 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
22831 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
22832 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
22833 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
22834 function prototype.
22835 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
22837 2020-02-12 Jakub Jelinek <jakub@redhat.com>
22840 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
22841 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
22842 TARGET_AVX512DQ from condition.
22843 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
22844 instead of <mask_mode512bit_condition> in condition. If
22845 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
22847 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
22850 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
22853 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
22855 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
22857 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
22858 where strlen is more legible.
22859 (rs6000_builtin_vectorized_libmass): Ditto.
22860 (rs6000_print_options_internal): Ditto.
22862 2020-02-11 Martin Sebor <msebor@redhat.com>
22864 PR tree-optimization/93683
22865 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
22867 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
22869 * config/rs6000/predicates.md (cint34_operand): Rename the
22870 -mprefixed-addr option to be -mprefixed.
22871 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
22872 the -mprefixed-addr option to be -mprefixed.
22873 (OTHER_FUTURE_MASKS): Likewise.
22874 (POWERPC_MASKS): Likewise.
22875 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
22876 the -mprefixed-addr option to be -mprefixed. Change error
22877 messages to refer to -mprefixed.
22878 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
22880 (rs6000_legitimate_offset_address_p): Likewise.
22881 (rs6000_mode_dependent_address): Likewise.
22882 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
22883 "-mprefixed" for target attributes and pragmas.
22884 (address_to_insn_form): Rename the -mprefixed-addr option to be
22886 (rs6000_adjust_insn_length): Likewise.
22887 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
22888 -mprefixed-addr option to be -mprefixed.
22889 (ASM_OUTPUT_OPCODE): Likewise.
22890 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
22891 -mprefixed-addr option to be -mprefixed.
22892 * config/rs6000/rs6000.opt (-mprefixed): Rename the
22893 -mprefixed-addr option to be prefixed. Change the option from
22894 being undocumented to being documented.
22895 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
22896 -mprefixed option. Update the -mpcrel documentation to mention
22899 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
22901 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
22902 including FIRST_PSEUDO_REGISTER - 1.
22903 * ira-color.c (print_hard_reg_set): Ditto.
22905 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22907 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
22908 (USTERNOP_QUALIFIERS): New define.
22909 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
22910 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
22911 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
22912 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
22913 * config/arm/arm_neon.h (vusdot_s32): New.
22914 (vusdot_lane_s32): New.
22915 (vusdotq_lane_s32): New.
22916 (vsudot_lane_s32): New.
22917 (vsudotq_lane_s32): New.
22918 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
22919 * config/arm/iterators.md (DOTPROD_I8MM): New.
22920 (sup, opsuffix): Add <us/su>.
22921 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
22922 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
22924 2020-02-11 Richard Biener <rguenther@suse.de>
22926 PR tree-optimization/93661
22927 PR tree-optimization/93662
22928 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
22929 tree_to_poly_int64.
22930 * tree-sra.c (get_access_for_expr): Likewise.
22932 2020-02-10 Jakub Jelinek <jakub@redhat.com>
22935 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
22936 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
22937 Change condition from TARGET_AVX2 to TARGET_AVX.
22939 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
22942 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
22943 argument of strncmp.
22945 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
22947 Try to generate zero-based comparisons.
22948 * config/cris/cris.c (cris_reduce_compare): New function.
22949 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
22950 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
22951 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
22953 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
22956 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
22957 in Thumb state and also as a destination in Arm state. Add T16
22960 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
22962 * md.texi (Define Subst): Match closing paren in example.
22964 2020-02-10 Jakub Jelinek <jakub@redhat.com>
22968 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
22969 arguments of strncmp.
22971 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
22974 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
22975 but different source value.
22976 (adjust_callers_for_value_intersection): New function.
22977 (gather_edges_for_value): Adjust order of callers to let a
22978 non-self-recursive caller be the first element.
22979 (self_recursive_pass_through_p): Add a new parameter "simple", and
22980 check generalized self-recursive pass-through jump function.
22981 (self_recursive_agg_pass_through_p): Likewise.
22982 (find_more_scalar_values_for_callers_subset): Compute value from
22983 pass-through jump function for self-recursive.
22984 (intersect_with_plats): Cleanup previous implementation code for value
22985 itersection with self-recursive call edge.
22986 (intersect_with_agg_replacements): Likewise.
22987 (intersect_aggregates_with_edge): Deduce value from pass-through jump
22988 function for self-recursive call edge. Cleanup previous implementation
22989 code for value intersection with self-recursive call edge.
22990 (decide_whether_version_node): Remove dead callers and adjust order
22991 to let a non-self-recursive caller be the first element.
22993 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
22995 * recog.c: Move pass_split_before_sched2 code in front of
22996 pass_split_before_regstack.
22997 (pass_data_split_before_sched2): Rename pass to split3 from split4.
22998 (pass_data_split_before_regstack): Rename pass to split4 from split3.
22999 (rest_of_handle_split_before_sched2): Remove.
23000 (pass_split_before_sched2::execute): Unconditionally call
23002 (enable_split_before_sched2): New function.
23003 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
23004 (pass_split_before_regstack::gate): Ditto.
23005 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
23006 Update name check for renamed split4 pass.
23007 * config/sh/sh.c (register_sh_passes): Update pass insertion
23008 point for renamed split4 pass.
23010 2020-02-09 Jakub Jelinek <jakub@redhat.com>
23012 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
23013 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
23014 copying them around between host and target.
23016 2020-02-08 Andrew Pinski <apinski@marvell.com>
23019 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
23020 STRICT_ALIGNMENT also.
23022 2020-02-08 Jim Wilson <jimw@sifive.com>
23025 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
23027 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
23028 Jakub Jelinek <jakub@redhat.com>
23031 * config/i386/i386.h (CALL_USED_REGISTERS): Make
23032 xmm16-xmm31 call-used even in 64-bit ms-abi.
23034 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
23036 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
23037 (simd_ummla, simd_usmmla): Likewise.
23038 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
23039 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
23040 (vusmmlaq_s32): New.
23042 2020-02-07 Richard Biener <rguenther@suse.de>
23044 PR middle-end/93519
23045 * tree-inline.c (fold_marked_statements): Do a PRE walk,
23046 skipping unreachable regions.
23047 (optimize_inline_calls): Skip folding stmts when we didn't
23050 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
23053 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
23054 Don't return aggregates with only SFmode and DFmode in SSE
23056 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
23058 2020-02-07 Jakub Jelinek <jakub@redhat.com>
23061 * config/rs6000/rs6000-logue.c
23062 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
23063 if it fails, move rs into end_addr and retry. Add
23064 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
23065 the insn pattern doesn't describe well what exactly happens to
23069 * config/i386/predicates.md (avx_identity_operand): Remove.
23070 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
23071 (avx_<castmode><avxsizesuffix>_<castmode>,
23072 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
23073 a VEC_CONCAT of the operand and UNSPEC_CAST.
23074 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
23075 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
23079 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
23080 recog_data.insn if distance_non_agu_define changed it.
23082 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
23085 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
23086 we only had X-FORM (reg+reg) addressing for vectors. Also before
23087 ISA 3.0, we only had X-FORM addressing for scalars in the
23088 traditional Altivec registers.
23090 2020-02-06 <zhongyunde@huawei.com>
23091 Vladimir Makarov <vmakarov@redhat.com>
23093 PR rtl-optimization/93561
23094 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
23095 hard register range.
23097 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
23099 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
23102 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
23104 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
23105 where the low and the high 32 bits are equal to each other specially,
23106 with an rldimi instruction.
23108 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
23110 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
23112 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
23114 * config/arm/arm-tables.opt: Regenerate.
23116 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
23119 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
23120 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
23121 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
23123 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
23125 PR rtl-optimization/87763
23126 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
23128 2020-02-06 Delia Burduv <delia.burduv@arm.com>
23130 * config/aarch64/aarch64-simd-builtins.def
23131 (bfmlaq): New built-in function.
23132 (bfmlalb): New built-in function.
23133 (bfmlalt): New built-in function.
23134 (bfmlalb_lane): New built-in function.
23135 (bfmlalt_lane): New built-in function.
23136 * config/aarch64/aarch64-simd.md
23137 (aarch64_bfmmlaqv4sf): New pattern.
23138 (aarch64_bfmlal<bt>v4sf): New pattern.
23139 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
23140 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
23141 (vbfmlalbq_f32): New intrinsic.
23142 (vbfmlaltq_f32): New intrinsic.
23143 (vbfmlalbq_lane_f32): New intrinsic.
23144 (vbfmlaltq_lane_f32): New intrinsic.
23145 (vbfmlalbq_laneq_f32): New intrinsic.
23146 (vbfmlaltq_laneq_f32): New intrinsic.
23147 * config/aarch64/iterators.md (BF_MLA): New int iterator.
23148 (bt): New int attribute.
23150 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
23152 * config/i386/i386.md (*pushtf): Emit "#" instead of
23153 calling gcc_unreachable in insn output.
23156 (*pushsf_rex64): Ditto for alternatives other than 1.
23157 (*pushsf): Ditto for alternatives other than 1.
23159 2020-02-06 Martin Liska <mliska@suse.cz>
23161 PR gcov-profile/91971
23162 PR gcov-profile/93466
23163 * coverage.c (coverage_init): Revert mangling of
23164 path into filename. It can lead to huge filename length.
23165 Creation of subfolders seem more natural.
23167 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23170 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
23171 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
23172 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
23174 2020-02-06 Jakub Jelinek <jakub@redhat.com>
23177 * config/i386/predicates.md (avx_identity_operand): New predicate.
23178 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
23179 define_insn_and_split.
23182 * omp-low.c (use_pointer_for_field): For nested constructs, also
23183 look for map clauses on target construct.
23184 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
23185 taskreg_nesting_level.
23188 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
23189 shared clause, call omp_notice_variable on outer context if any.
23191 2020-02-05 Jason Merrill <jason@redhat.com>
23194 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
23195 non-zero address even if weak and not yet defined.
23197 2020-02-05 Martin Sebor <msebor@redhat.com>
23199 PR tree-optimization/92765
23200 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
23201 * tree-ssa-strlen.c (compute_string_length): Remove.
23202 (determine_min_objsize): Remove.
23203 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
23204 Avoid using type size as the upper bound on string length.
23205 (handle_builtin_string_cmp): Add an argument. Adjust.
23206 (strlen_check_and_optimize_call): Pass additional argument to
23207 handle_builtin_string_cmp.
23209 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
23211 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
23212 (*pushdi2_rex64 peephole2): Unconditionally split after
23213 epilogue_completed.
23214 (*ashl<mode>3_doubleword): Ditto.
23215 (*<shift_insn><mode>3_doubleword): Ditto.
23217 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
23220 * config/rs6000/rs6000.c (get_vector_offset): Fix
23222 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
23224 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
23226 2020-02-05 David Malcolm <dmalcolm@redhat.com>
23228 * doc/analyzer.texi
23229 (Special Functions for Debugging the Analyzer): Update description
23230 of __analyzer_dump_exploded_nodes.
23232 2020-02-05 Jakub Jelinek <jakub@redhat.com>
23235 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
23236 include sets and not clobbers in the vzeroupper pattern.
23237 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
23238 the parallel has 17 (64-bit) or 9 (32-bit) elts.
23239 (*avx_vzeroupper_1): New define_insn_and_split.
23242 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
23243 don't run when !optimize.
23244 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
23247 2020-02-05 Richard Biener <rguenther@suse.de>
23249 PR middle-end/90648
23250 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
23251 checks before matching calls.
23253 2020-02-05 Jakub Jelinek <jakub@redhat.com>
23255 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
23256 function comment typo.
23258 PR middle-end/93555
23259 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
23260 simd_clone_create failed when i == 0, adjust clone->nargs by
23263 2020-02-05 Martin Liska <mliska@suse.cz>
23266 * doc/invoke.texi: Document that one should
23267 not combine ASLR and -fpch.
23269 2020-02-04 Richard Biener <rguenther@suse.de>
23271 PR tree-optimization/93538
23272 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
23274 2020-02-04 Richard Biener <rguenther@suse.de>
23276 PR tree-optimization/91123
23277 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
23278 (vn_walk_cb_data::last_vuse): New member.
23279 (vn_walk_cb_data::saved_operands): Likewsie.
23280 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
23281 (vn_walk_cb_data::push_partial_def): Use finish.
23282 (vn_reference_lookup_2): Update last_vuse and use finish if
23283 we've saved operands.
23284 (vn_reference_lookup_3): Use finish and update calls to
23285 push_partial_defs everywhere. When translating through
23286 memcpy or aggregate copies save off operands and alias-set.
23287 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
23288 operation for redundant store removal.
23290 2020-02-04 Richard Biener <rguenther@suse.de>
23292 PR tree-optimization/92819
23293 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
23294 generating more stmts than before.
23296 2020-02-04 Martin Liska <mliska@suse.cz>
23298 * config/arm/arm.c (arm_gen_far_branch): Move the function
23299 outside of selftests.
23301 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
23303 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
23304 function to adjust PC-relative vector addresses.
23305 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
23306 handle vectors with PC-relative addresses.
23308 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
23310 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
23312 (hard_reg_and_mode_to_addr_mask): Delete.
23313 (rs6000_adjust_vec_address): If the original vector address
23314 was REG+REG or REG+OFFSET and the element is not zero, do the add
23315 of the elements in the original address before adding the offset
23316 for the vector element. Use address_to_insn_form to validate the
23317 address using the register being loaded, rather than guessing
23318 whether the address is a DS-FORM or DQ-FORM address.
23320 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
23322 * config/rs6000/rs6000.c (get_vector_offset): New helper function
23323 to calculate the offset in memory from the start of a vector of a
23324 particular element. Add code to keep the element number in
23325 bounds if the element number is variable.
23326 (rs6000_adjust_vec_address): Move calculation of offset of the
23327 vector element to get_vector_offset.
23328 (rs6000_split_vec_extract_var): Do not do the initial AND of
23329 element here, move the code to get_vector_offset.
23331 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
23333 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
23336 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
23338 * config/rs6000/constraints.md: Improve documentation.
23340 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
23343 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
23344 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
23346 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
23348 * config.gcc: Remove "carrizo" support.
23349 * config/gcn/gcn-opts.h (processor_type): Likewise.
23350 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
23351 * config/gcn/gcn.opt (gpu_type): Likewise.
23352 * config/gcn/t-omp-device: Likewise.
23354 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23357 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
23358 * config/arm/arm.c (arm_gen_far_branch): New function
23359 arm_gen_far_branch.
23360 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
23362 2020-02-03 Julian Brown <julian@codesourcery.com>
23363 Tobias Burnus <tobias@codesourcery.com>
23365 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
23367 2020-02-03 Jakub Jelinek <jakub@redhat.com>
23370 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
23371 valid RTL to sum up the lowest and second lowest bytes of the popcnt
23374 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
23376 PR rtl-optimization/91333
23377 * ira-color.c (struct allocno_color_data): Add member
23379 (init_allocno_threads): Set the member up.
23380 (bucket_allocno_compare_func): Add compare hard reg
23383 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
23385 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
23387 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
23388 * config.in: Regenerated.
23389 * configure: Regenerated.
23390 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
23391 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
23392 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
23394 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
23396 * configure: Regenerate.
23398 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
23400 PR rtl-optimization/91333
23401 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
23402 reg preferences comparison up.
23404 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
23406 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
23407 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
23408 aarch64-sve-builtins-base.h.
23409 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
23410 aarch64-sve-builtins-base.cc.
23411 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
23412 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
23413 (svcvtnt): Declare.
23414 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
23415 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
23416 (svcvtnt): New functions.
23417 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
23418 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
23419 (svcvtnt): New functions.
23420 (svcvt): Add a form that converts f32 to bf16.
23421 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
23422 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
23424 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
23425 Treat B as bfloat16_t.
23426 (ternary_bfloat_lane_base): New class.
23427 (ternary_bfloat_def): Likewise.
23428 (ternary_bfloat): New shape.
23429 (ternary_bfloat_lane_def): New class.
23430 (ternary_bfloat_lane): New shape.
23431 (ternary_bfloat_lanex2_def): New class.
23432 (ternary_bfloat_lanex2): New shape.
23433 (ternary_bfloat_opt_n_def): New class.
23434 (ternary_bfloat_opt_n): New shape.
23435 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
23436 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
23437 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
23438 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
23439 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
23440 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
23441 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
23442 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
23443 the pattern off the narrow mode instead of the wider one.
23444 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
23445 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
23446 (sve_fp_op): Handle them.
23447 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
23448 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
23450 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
23452 * config/aarch64/arm_sve.h: Include arm_bf16.h.
23453 * config/aarch64/aarch64-modes.def (BF): Move definition before
23454 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
23455 (SVE_MODES): Handle BF modes.
23456 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
23458 (aarch64_full_sve_mode): Likewise.
23459 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
23461 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
23462 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
23463 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
23464 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
23466 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
23468 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
23469 (TYPES_all_data): Add bf16.
23470 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
23471 (register_tuple_type): Increase buffer size.
23472 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
23473 (bf16): New type suffix.
23474 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
23475 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
23476 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
23477 Change type from all_data to all_arith.
23478 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
23479 (svminp): Likewise.
23481 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
23482 Matthew Malcomson <matthew.malcomson@arm.com>
23483 Richard Sandiford <richard.sandiford@arm.com>
23485 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
23486 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
23487 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
23488 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
23489 __ARM_FEATURE_MATMUL_FP64.
23490 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
23491 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
23492 be disabled at the same time.
23493 (f32mm): New extension.
23494 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
23495 (AARCH64_FL_F64MM): Bump to the next bit up.
23496 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
23497 (TARGET_SVE_F64MM): New macros.
23498 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
23499 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
23500 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
23501 (UNSPEC_ZIP2Q): New unspeccs.
23502 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
23503 (optab, sur, perm_insn): Handle the new unspecs.
23504 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
23505 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
23506 TARGET_SVE_F64MM instead of separate tests.
23507 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
23508 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
23509 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
23510 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
23511 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
23512 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
23513 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
23514 (TYPES_s_signed): New macro.
23515 (TYPES_s_integer): Use it.
23516 (TYPES_d_float): New macro.
23517 (TYPES_d_data): Use it.
23518 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
23519 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
23520 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
23521 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
23522 (svmmla): New shape.
23523 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
23524 template parameters.
23525 (ternary_resize2_lane_base): Likewise.
23526 (ternary_resize2_base): New class.
23527 (ternary_qq_lane_base): Likewise.
23528 (ternary_intq_uintq_lane_def): Likewise.
23529 (ternary_intq_uintq_lane): New shape.
23530 (ternary_intq_uintq_opt_n_def): New class
23531 (ternary_intq_uintq_opt_n): New shape.
23532 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
23533 (ternary_uintq_intq_def): New class.
23534 (ternary_uintq_intq): New shape.
23535 (ternary_uintq_intq_lane_def): New class.
23536 (ternary_uintq_intq_lane): New shape.
23537 (ternary_uintq_intq_opt_n_def): New class.
23538 (ternary_uintq_intq_opt_n): New shape.
23539 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
23540 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
23541 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
23542 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
23544 (svdotprod_lane_impl): ...this new class.
23545 (svmmla_impl, svusdot_impl): New classes.
23546 (svdot_lane): Update to use svdotprod_lane_impl.
23547 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
23548 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
23550 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
23551 function, with no types defined.
23552 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
23553 AARCH64_FL_I8MM functions.
23554 (svmmla): New AARCH64_FL_F32MM function.
23555 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
23556 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
23557 AARCH64_FL_F64MM function.
23558 (REQUIRED_EXTENSIONS):
23560 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
23562 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
23565 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
23567 * config/i386/i386.md (*movoi_internal_avx): Do not check for
23568 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
23569 (*movti_internal): Do not check for
23570 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
23571 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
23572 just after check for TARGET_AVX.
23573 (*movdf_internal): Ditto.
23574 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
23575 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
23576 * config/i386/sse.md (mov<mode>_internal): Only check
23577 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
23578 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
23579 (<sse>_andnot<mode>3<mask_name>): Move check for
23580 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
23581 (<code><mode>3<mask_name>): Ditto.
23582 (*andnot<mode>3): Ditto.
23583 (*andnottf3): Ditto.
23584 (*<code><mode>3): Ditto.
23585 (*<code>tf3): Ditto.
23586 (*andnot<VI:mode>3): Remove
23587 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
23588 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
23589 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
23590 (sse4_1_blendv<ssemodesuffix>): Ditto.
23591 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
23592 Explain that tune applies to 128bit instructions only.
23594 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
23596 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
23597 to definition of hsa_kernel_description. Parse assembly to find SGPR
23598 and VGPR count of kernel and store in hsa_kernel_description.
23600 2020-01-31 Tamar Christina <tamar.christina@arm.com>
23602 PR rtl-optimization/91838
23603 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
23604 to truncate if allowed or reject combination.
23606 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
23608 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
23609 (find_inv_vars_cb): Likewise.
23611 2020-01-31 David Malcolm <dmalcolm@redhat.com>
23613 * calls.c (special_function_p): Split out the check for DECL_NAME
23614 being non-NULL and fndecl being extern at file scope into a
23615 new maybe_special_function_p and call it. Drop check for fndecl
23616 being non-NULL that was after a usage of DECL_NAME (fndecl).
23617 * tree.h (maybe_special_function_p): New inline function.
23619 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
23621 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
23622 (mask_gather_load<mode>): ... here, and zero-initialize the
23624 (maskload<mode>di): Zero-initialize the destination.
23625 * config/gcn/gcn.c:
23627 2020-01-30 David Malcolm <dmalcolm@redhat.com>
23630 * doc/analyzer.texi (Limitations): Note that constraints on
23631 floating-point values are currently ignored.
23633 2020-01-30 Jakub Jelinek <jakub@redhat.com>
23636 * symtab.c (symtab_node::noninterposable_alias): If localalias
23637 already exists, but is not usable, append numbers after it until
23638 a unique name is found. Formatting fix.
23640 PR middle-end/93505
23641 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
23644 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
23646 * config/gcn/gcn.c (print_operand): Handle LTGT.
23647 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
23649 2020-01-30 Richard Biener <rguenther@suse.de>
23651 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
23652 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
23654 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
23656 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
23657 without a DECL in .data.rel.ro.local.
23659 2020-01-30 Jakub Jelinek <jakub@redhat.com>
23662 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
23666 * config/i386/sse.md
23667 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
23668 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
23669 any_extend code iterator instead of always zero_extend.
23670 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
23671 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
23672 Use any_extend code iterator instead of always zero_extend.
23673 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
23674 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
23675 Use any_extend code iterator instead of always zero_extend.
23676 (*sse2_pmovmskb_ext): New define_insn.
23677 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
23680 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
23681 (*popcountsi2_zext_falsedep): New define_insn.
23683 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
23685 * config.in: Regenerated.
23686 * configure: Regenerated.
23688 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
23691 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
23692 LLVM's assembler changed the default in version 9.
23694 2020-01-24 Jeff Law <law@redhat.com>
23696 PR tree-optimization/89689
23697 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
23699 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
23703 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23705 PR rtl-optimization/87763
23706 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
23707 simplification to handle subregs as well as bare regs.
23708 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
23710 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
23713 * ira.c (ira): Revert use of simplified LRA algorithm.
23715 2020-01-29 Martin Jambor <mjambor@suse.cz>
23717 PR tree-optimization/92706
23718 * tree-sra.c (struct access): Fields first_link, last_link,
23719 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
23720 next_rhs_queued and grp_rhs_queued respectively, new fields
23721 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
23722 (struct assign_link): Field next renamed to next_rhs, new field
23723 next_lhs. Updated comment.
23724 (work_queue_head): Renamed to rhs_work_queue_head.
23725 (lhs_work_queue_head): New variable.
23726 (add_link_to_lhs): New function.
23727 (relink_to_new_repr): Also relink LHS lists.
23728 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
23729 (add_access_to_lhs_work_queue): New function.
23730 (pop_access_from_work_queue): Renamed to
23731 pop_access_from_rhs_work_queue.
23732 (pop_access_from_lhs_work_queue): New function.
23733 (build_accesses_from_assign): Also add links to LHS lists and to LHS
23735 (child_would_conflict_in_lacc): Renamed to
23736 child_would_conflict_in_acc. Adjusted parameter names.
23737 (create_artificial_child_access): New parameter set_grp_read, use it.
23738 (subtree_mark_written_and_enqueue): Renamed to
23739 subtree_mark_written_and_rhs_enqueue.
23740 (propagate_subaccesses_across_link): Renamed to
23741 propagate_subaccesses_from_rhs.
23742 (propagate_subaccesses_from_lhs): New function.
23743 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
23746 2020-01-29 Martin Jambor <mjambor@suse.cz>
23748 PR tree-optimization/92706
23749 * tree-sra.c (struct access): Adjust comment of
23750 grp_total_scalarization.
23751 (find_access_in_subtree): Look for single children spanning an entire
23753 (scalarizable_type_p): Allow register accesses, adjust callers.
23754 (completely_scalarize): Remove function.
23755 (scalarize_elem): Likewise.
23756 (create_total_scalarization_access): Likewise.
23757 (sort_and_splice_var_accesses): Do not track total scalarization
23759 (analyze_access_subtree): New parameter totally, adjust to new meaning
23760 of grp_total_scalarization.
23761 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
23762 (can_totally_scalarize_forest_p): New function.
23763 (create_total_scalarization_access): Likewise.
23764 (create_total_access_and_reshape): Likewise.
23765 (total_should_skip_creating_access): Likewise.
23766 (totally_scalarize_subtree): Likewise.
23767 (analyze_all_variable_accesses): Perform total scalarization after
23768 subaccess propagation using the new functions above.
23769 (initialize_constant_pool_replacements): Output initializers by
23770 traversing the access tree.
23772 2020-01-29 Martin Jambor <mjambor@suse.cz>
23774 * tree-sra.c (verify_sra_access_forest): New function.
23775 (verify_all_sra_access_forests): Likewise.
23776 (create_artificial_child_access): Set parent.
23777 (analyze_all_variable_accesses): Call the verifier.
23779 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23781 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
23782 if called on indirect edge.
23783 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
23784 speculative call if needed.
23786 2020-01-29 Richard Biener <rguenther@suse.de>
23788 PR tree-optimization/93428
23789 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
23790 permutation when the load node is created.
23791 (vect_analyze_slp_instance): Re-use it here.
23793 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23795 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
23797 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
23799 PR rtl-optimization/93272
23800 * ira-lives.c (process_out_of_region_eh_regs): New function.
23801 (process_bb_node_lives): Call it.
23803 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23805 * coverage.c (read_counts_file): Make error message lowercase.
23807 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23809 * profile-count.c (profile_quality_display_names): Fix ordering.
23811 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23814 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
23815 hash only when edge is first within the sequence.
23816 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
23817 (symbol_table::create_edge): Do not set target_prob.
23818 (cgraph_edge::remove_caller): Watch for speculative calls when updating
23819 the call site hash.
23820 (cgraph_edge::make_speculative): Drop target_prob parameter.
23821 (cgraph_edge::speculative_call_info): Remove.
23822 (cgraph_edge::first_speculative_call_target): New member function.
23823 (update_call_stmt_hash_for_removing_direct_edge): New function.
23824 (cgraph_edge::resolve_speculation): Rewrite to new API.
23825 (cgraph_edge::speculative_call_for_target): New member function.
23826 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
23827 multiple speculation targets.
23828 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
23830 (verify_speculative_call): Verify that targets form an interval.
23831 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
23832 (cgraph_edge::first_speculative_call_target): New member function.
23833 (cgraph_edge::next_speculative_call_target): New member function.
23834 (cgraph_edge::speculative_call_target_ref): New member function.
23835 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
23836 (cgraph_edge): Remove target_prob.
23837 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
23838 Fix handling of speculative calls.
23839 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
23840 * ipa-fnsummary.c (analyze_function_body): Likewise.
23841 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
23842 * ipa-profile.c (dump_histogram): Fix formating.
23843 (ipa_profile_generate_summary): Watch for overflows.
23844 (ipa_profile): Do not require probablity to be 1/2; update to new API.
23845 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
23846 (update_indirect_edges_after_inlining): Update to new API.
23847 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
23849 * profile-count.h: (profile_probability::adjusted): New.
23850 * tree-inline.c (copy_bb): Update to new speculative call API; fix
23851 updating of profile.
23852 * value-prof.c (gimple_ic_transform): Rename to ...
23853 (dump_ic_profile): ... this one; update dumping.
23854 (stream_in_histogram_value): Fix formating.
23855 (gimple_value_profile_transformations): Update.
23857 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
23860 * config/i386/i386.md (*movoi_internal_avx): Remove
23861 TARGET_SSE_TYPELESS_STORES check.
23862 (*movti_internal): Prefer TARGET_AVX over
23863 TARGET_SSE_TYPELESS_STORES.
23864 (*movtf_internal): Likewise.
23865 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
23866 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
23867 from TARGET_SSE_TYPELESS_STORES.
23869 2020-01-28 David Malcolm <dmalcolm@redhat.com>
23871 * diagnostic-core.h (warning_at): Rename overload to...
23872 (warning_meta): ...this.
23873 (emit_diagnostic_valist): Delete decl of overload taking
23874 diagnostic_metadata.
23875 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
23876 (warning_at): Rename overload taking diagnostic_metadata to...
23877 (warning_meta): ...this.
23879 2020-01-28 Richard Biener <rguenther@suse.de>
23881 PR tree-optimization/93439
23882 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
23883 * tree-cfg.c (move_sese_region_to_fn): ... here.
23884 (verify_types_in_gimple_reference): Verify used cliques are
23887 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
23890 * config/i386/i386-options.c (set_ix86_tune_features): Add an
23891 argument of a pointer to struct gcc_options and pass it to
23892 parse_mtune_ctrl_str.
23893 (ix86_function_specific_restore): Pass opts to
23894 set_ix86_tune_features.
23895 (ix86_option_override_internal): Likewise.
23896 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
23897 gcc_options and use it for x_ix86_tune_ctrl_string.
23899 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23901 PR rtl-optimization/87763
23902 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
23903 simplification to handle subregs as well as bare regs.
23904 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
23906 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23908 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
23909 for reduction chains that (now) include a call.
23911 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23913 PR tree-optimization/92822
23914 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
23915 out the don't-care elements of a vector whose significant elements
23916 are duplicates, make the don't-care elements duplicates too.
23918 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23920 PR tree-optimization/93434
23921 * tree-predcom.c (split_data_refs_to_components): Record which
23922 components have had aliasing loads removed. Prevent store-store
23923 commoning for all such components.
23925 2020-01-28 Jakub Jelinek <jakub@redhat.com>
23928 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
23929 -1 or is_vshift is true, use new_vector with number of elts npatterns
23930 rather than new_unary_operation.
23932 PR tree-optimization/93454
23933 * gimple-fold.c (fold_array_ctor_reference): Perform
23934 elt_size.to_uhwi () just once, instead of calling it in every
23935 iteration. Punt if that value is above size of the temporary
23936 buffer. Decrease third native_encode_expr argument when
23937 bufoff + elt_sz is above size of buf.
23939 2020-01-27 Joseph Myers <joseph@codesourcery.com>
23941 * config/mips/mips.c (mips_declare_object_name)
23942 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
23944 2020-01-27 Martin Liska <mliska@suse.cz>
23946 PR gcov-profile/93403
23947 * tree-profile.c (gimple_init_gcov_profiler): Generate
23948 both __gcov_indirect_call_profiler_v4 and
23949 __gcov_indirect_call_profiler_v4_atomic.
23951 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23954 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
23956 (@aarch64_split_simd_mov<mode>): Use it.
23957 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
23958 Leave the vec_extract patterns to handle 2-element vectors.
23959 (aarch64_simd_mov_from_<mode>high): Likewise.
23960 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
23961 (vec_extractv2dfv1df): Likewise.
23963 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23965 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
23966 jump conditions for *compare_condjump<GPI:mode>.
23968 2020-01-27 David Malcolm <dmalcolm@redhat.com>
23971 * digraph.cc (test_edge::test_edge): Specify template for base
23974 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23976 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
23978 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23980 * config/arc/arc-protos.h (gen_mlo): Remove.
23981 (gen_mhi): Likewise.
23982 * config/arc/arc.c (AUX_MULHI): Define.
23983 (arc_must_save_reister): Special handling for r58/59.
23984 (arc_compute_frame_size): Consider mlo/mhi registers.
23985 (arc_save_callee_saves): Emit fp/sp move only when emit_move
23987 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
23988 mlo/mhi name selection.
23989 (arc_restore_callee_saves): Don't early restore blink when ISR.
23990 (arc_expand_prologue): Add mlo/mhi saving.
23991 (arc_expand_epilogue): Add mlo/mhi restoring.
23994 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
23995 numbering when MUL64 option is used.
23996 (DWARF2_FRAME_REG_OUT): Define.
23997 * config/arc/arc.md (arc600_stall): New pattern.
23998 (VUNSPEC_ARC_ARC600_STALL): Define.
23999 (mulsi64): Use correct mlo/mhi registers.
24000 (mulsi_600): Clean it up.
24001 * config/arc/predicates.md (mlo_operand): Remove any dependency on
24003 (mhi_operand): Likewise.
24005 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
24006 Petro Karashchenko <petro.karashchenko@ring.com>
24008 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
24009 attributes if needed.
24010 (prepare_move_operands): Generate special unspec instruction for
24012 (arc_isuncached_mem_p): Propagate uncached attribute to each
24014 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
24015 (VUNSPEC_ARC_STDI): Likewise.
24016 (ALLI): New mode iterator.
24017 (mALLI): New mode attribute.
24018 (lddi): New instruction pattern.
24020 (stdidi_split): Split instruction for architectures which are not
24021 supporting ll64 option.
24022 (lddidi_split): Likewise.
24024 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
24026 PR rtl-optimization/92989
24027 * lra-lives.c (process_bb_lives): Update the live-in set before
24028 processing additional clobbers.
24030 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
24032 PR rtl-optimization/93170
24033 * cselib.c (cselib_invalidate_regno_val): New function, split out
24035 (cselib_invalidate_regno): ...here.
24036 (cselib_invalidated_by_call_p): New function.
24037 (cselib_process_insn): Iterate over all the hard-register entries in
24038 REG_VALUES and invalidate any that cross call-clobbered registers.
24040 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
24042 * dojump.c (split_comparison): Use HONOR_NANS rather than
24043 HONOR_SNANS when splitting LTGT.
24045 2020-01-27 Martin Liska <mliska@suse.cz>
24048 * opts.c (print_filtered_help): Exclude language-specific
24049 options from --help=common unless enabled in all FEs.
24051 2020-01-27 Martin Liska <mliska@suse.cz>
24053 * opts.c (print_help): Exclude params from
24054 all except --help=param.
24056 2020-01-27 Martin Liska <mliska@suse.cz>
24059 * config/i386/i386-features.c (make_resolver_func):
24060 Align the code with ppc64 target implementation.
24061 Do not generate a unique name for resolver function.
24063 2020-01-27 Richard Biener <rguenther@suse.de>
24065 PR tree-optimization/93397
24066 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
24067 converted reduction chain SLP graph adjustment.
24069 2020-01-26 Marek Polacek <polacek@redhat.com>
24072 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
24075 2020-01-26 Jason Merrill <jason@redhat.com>
24078 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
24081 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
24083 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
24084 (rx_setmem): Likewise.
24086 2020-01-26 Jakub Jelinek <jakub@redhat.com>
24089 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
24090 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
24091 drop <di> from constraint of last operand.
24094 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
24095 TARGET_AVX2 and V4DFmode not in the split condition, but in the
24096 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
24098 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
24101 * ipa-cp.c (get_info_about_necessary_edges): Remove value
24104 2020-01-24 Jeff Law <law@redhat.com>
24106 PR tree-optimization/92788
24107 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
24110 2020-01-24 Jakub Jelinek <jakub@redhat.com>
24113 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
24114 *avx_vperm_broadcast_<mode>,
24115 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
24116 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
24117 Move before avx2_perm<mode>/avx512f_perm<mode>.
24120 * simplify-rtx.c (simplify_const_unary_operation,
24121 simplify_const_binary_operation): Punt for mode precision above
24122 MAX_BITSIZE_MODE_ANY_INT.
24124 2020-01-24 Andrew Pinski <apinski@marvell.com>
24126 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
24127 alu.shift_reg to 0.
24129 2020-01-24 Jeff Law <law@redhat.com>
24132 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
24133 for REGs. Call output_operand_lossage to get more reasonable
24136 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
24138 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
24139 gcn_fp_compare_operator.
24140 (vec_cmpu<mode>di): Use gcn_compare_operator.
24141 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
24142 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
24143 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
24144 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
24145 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
24146 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
24147 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
24148 gcn_fp_compare_operator.
24149 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
24150 gcn_fp_compare_operator.
24151 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
24152 gcn_fp_compare_operator.
24153 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
24154 gcn_fp_compare_operator.
24156 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
24158 * doc/install.texi (Cross-Compiler-Specific Options): Document
24159 `--with-toolexeclibdir' option.
24161 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
24163 * target.def (flags_regnum): Also mention effect on delay slot filling.
24164 * doc/tm.texi: Regenerate.
24166 2020-01-23 Jeff Law <law@redhat.com>
24168 PR translation/90162
24169 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
24171 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
24174 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
24177 2020-01-23 Jakub Jelinek <jakub@redhat.com>
24179 PR rtl-optimization/93402
24180 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
24183 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
24185 * config.in: Regenerated.
24186 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
24187 for TARGET_LIBC_GNUSTACK.
24188 * configure: Regenerated.
24189 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
24190 found to be 2.31 or greater.
24192 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
24194 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
24196 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
24197 (mips_asm_file_end): New function. Delegate to
24198 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
24199 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
24201 2020-01-23 Jakub Jelinek <jakub@redhat.com>
24204 * config/i386/i386-modes.def (POImode): New mode.
24205 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
24206 * config/i386/i386.md (DPWI): New mode attribute.
24207 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
24208 (QWI): Rename to...
24209 (QPWI): ... this. Use POI instead of OI for TImode.
24210 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
24211 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
24214 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
24217 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
24219 (speculation_tracker_rev): New pattern.
24220 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
24221 Use speculation_tracker_rev to track the inverse condition.
24223 2020-01-23 Richard Biener <rguenther@suse.de>
24225 PR tree-optimization/93381
24226 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
24227 alias-set of the def as argument and record the first one.
24228 (vn_walk_cb_data::first_set): New member.
24229 (vn_reference_lookup_3): Pass the alias-set of the current def
24230 to push_partial_def. Fix alias-set used in the aggregate copy
24232 (vn_reference_lookup): Consistently set *last_vuse_ptr.
24233 * real.c (clear_significand_below): Fix out-of-bound access.
24235 2020-01-23 Jakub Jelinek <jakub@redhat.com>
24238 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
24239 New define_insn patterns.
24241 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
24243 * doc/sourcebuild.texi (check-function-bodies): Add an
24244 optional target/xfail selector.
24246 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
24248 PR rtl-optimization/93124
24249 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
24250 bare USE and CLOBBER insns.
24252 2020-01-22 Andrew Pinski <apinski@marvell.com>
24254 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
24256 2020-01-22 David Malcolm <dmalcolm@redhat.com>
24259 * gdbinit.in (break-on-saved-diagnostic): Update for move of
24260 diagnostic_manager into "ana" namespace.
24261 * selftest-run-tests.c (selftest::run_tests): Update for move of
24262 selftest::run_analyzer_selftests to
24263 ana::selftest::run_analyzer_selftests.
24265 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
24267 * cfgexpand.c (union_stack_vars): Update the size.
24269 2020-01-22 Richard Biener <rguenther@suse.de>
24271 PR tree-optimization/93381
24272 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
24273 throughout, handle all conversions the same.
24275 2020-01-22 Jakub Jelinek <jakub@redhat.com>
24278 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
24279 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
24280 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
24281 Call force_reg on high_in2 unconditionally.
24283 2020-01-22 Martin Liska <mliska@suse.cz>
24285 PR tree-optimization/92924
24286 * profile.c (compute_value_histograms): Divide
24287 all counter values.
24289 2020-01-22 Jakub Jelinek <jakub@redhat.com>
24292 * output.h (assemble_name_resolve): Declare.
24293 * varasm.c (assemble_name_resolve): New function.
24294 (assemble_name): Use it.
24295 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
24297 2020-01-22 Joseph Myers <joseph@codesourcery.com>
24299 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
24300 update_web_docs_git instead of update_web_docs_svn.
24302 2020-01-21 Andrew Pinski <apinski@marvell.com>
24305 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
24306 as PTR mode. Have operand 1 as being modeless, it can be P mode.
24307 (*tlsgd_small_<mode>): Likewise.
24308 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
24309 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
24310 register. Convert that register back to dest using convert_mode.
24312 2020-01-21 Jim Wilson <jimw@sifive.com>
24314 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
24317 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
24318 Uros Bizjak <ubizjak@gmail.com>
24321 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
24323 (legitimize_tls_address): Do GNU2 TLS address computation in
24324 ptr_mode and zero-extend result to Pmode.
24325 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
24326 :P with :PTR and Pmode with ptr_mode.
24327 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
24328 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
24329 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
24331 2020-01-21 Jakub Jelinek <jakub@redhat.com>
24334 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
24335 the last two operands are CONST_INT_P before using them as such.
24337 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
24339 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
24340 to get the integer element types.
24342 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
24344 * config/aarch64/aarch64-sve-builtins.h
24345 (function_expander::convert_to_pmode): Declare.
24346 * config/aarch64/aarch64-sve-builtins.cc
24347 (function_expander::convert_to_pmode): New function.
24348 (function_expander::get_contiguous_base): Use it.
24349 (function_expander::prepare_gather_address_operands): Likewise.
24350 * config/aarch64/aarch64-sve-builtins-sve2.cc
24351 (svwhilerw_svwhilewr_impl::expand): Likewise.
24353 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
24356 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
24357 cfun->machine->label_is_assembled.
24358 (aarch64_print_patchable_function_entry): New.
24359 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
24360 * config/aarch64/aarch64.h (struct machine_function): New field,
24361 label_is_assembled.
24363 2020-01-21 David Malcolm <dmalcolm@redhat.com>
24366 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
24369 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
24372 * cgraph.c (cgraph_edge::resolve_speculation,
24373 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
24374 call_stmt_site_hash.
24376 2020-01-21 Martin Liska <mliska@suse.cz>
24378 * config/rs6000/rs6000.c (common_mode_defined): Remove
24381 2020-01-21 Richard Biener <rguenther@suse.de>
24383 PR tree-optimization/92328
24384 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
24385 type when value-numbering same-sized store by inserting a
24387 (eliminate_dom_walker::eliminate_stmt): When eliminating
24388 a redundant store handle bit-reinterpretation of the same value.
24390 2020-01-21 Andrew Pinski <apinski@marvel.com>
24393 * tree-into-ssa.c (prepare_block_for_update_1): Split out
24395 (prepare_block_for_update): This. Use a worklist instead of
24398 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24400 * config/arm/arm.c (clear_operation_p):
24401 Initialise last_regno, skip first iteration
24402 based on the first_set value and use ints instead
24403 of the unnecessary HOST_WIDE_INTs.
24405 2020-01-21 Jakub Jelinek <jakub@redhat.com>
24408 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
24409 compare_mode other than SFmode or DFmode.
24411 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
24414 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
24415 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
24416 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
24418 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
24420 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
24422 2020-01-20 Andrew Pinski <apinski@marvell.com>
24424 PR middle-end/93242
24425 * targhooks.c (default_print_patchable_function_entry): Use
24426 output_asm_insn to emit the nop instruction.
24428 2020-01-20 Fangrui Song <maskray@google.com>
24430 PR middle-end/93194
24431 * targhooks.c (default_print_patchable_function_entry): Align to
24434 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
24437 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
24438 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
24439 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
24440 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
24441 (*tls_dynamic_gnu2_lea_64): Renamed to ...
24442 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
24443 Remove the {q} suffix from lea.
24444 (*tls_dynamic_gnu2_call_64): Renamed to ...
24445 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
24446 (*tls_dynamic_gnu2_combine_64): Renamed to ...
24447 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
24448 Pass Pmode to gen_tls_dynamic_gnu2_64.
24450 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
24452 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
24454 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
24456 * config/aarch64/aarch64-sve-builtins-base.cc
24457 (svld1ro_impl::memory_vector_mode): Remove parameter name.
24459 2020-01-20 Richard Biener <rguenther@suse.de>
24462 * dwarf2out.c (prune_unused_types): Unconditionally mark
24463 called function DIEs.
24465 2020-01-20 Martin Liska <mliska@suse.cz>
24467 PR tree-optimization/93199
24468 * tree-eh.c (struct leh_state): Add
24469 new field outer_non_cleanup.
24470 (cleanup_is_dead_in): Pass leh_state instead
24471 of eh_region. Add a checking that state->outer_non_cleanup
24472 points to outer non-clean up region.
24473 (lower_try_finally): Record outer_non_cleanup
24475 (lower_catch): Likewise.
24476 (lower_eh_filter): Likewise.
24477 (lower_eh_must_not_throw): Likewise.
24478 (lower_cleanup): Likewise.
24480 2020-01-20 Richard Biener <rguenther@suse.de>
24482 PR tree-optimization/93094
24483 * tree-vectorizer.h (vect_loop_versioning): Adjust.
24484 (vect_transform_loop): Likewise.
24485 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
24486 loop_vectorized_call to vect_transform_loop.
24487 * tree-vect-loop.c (vect_transform_loop): Pass down
24488 loop_vectorized_call to vect_loop_versioning.
24489 * tree-vect-loop-manip.c (vect_loop_versioning): Use
24490 the earlier discovered loop_vectorized_call.
24492 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
24494 * doc/contribute.texi: Update for SVN -> Git transition.
24495 * doc/install.texi: Likewise.
24497 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
24500 * cgraph.c (cgraph_edge::make_speculative): Increase number of
24501 speculative targets.
24502 (verify_speculative_call): New function
24503 (cgraph_node::verify_node): Use it.
24504 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
24507 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
24510 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
24511 (cgraph_edge::make_direct): Remove all indirect targets.
24512 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
24513 (cgraph_node::verify_node): Verify that only one call_stmt or
24514 lto_stmt_uid is set.
24515 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
24517 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
24518 (lto_output_ref): Simplify streaming of stmt.
24519 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
24521 2020-01-18 Tamar Christina <tamar.christina@arm.com>
24523 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
24524 Mark parameter unused.
24526 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
24528 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
24530 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
24532 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
24534 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
24536 * Makefile.in: Add coroutine-passes.o.
24537 * builtin-types.def (BT_CONST_SIZE): New.
24538 (BT_FN_BOOL_PTR): New.
24539 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
24540 * builtins.def (DEF_COROUTINE_BUILTIN): New.
24541 * coroutine-builtins.def: New file.
24542 * coroutine-passes.cc: New file.
24543 * function.h (struct GTY function): Add a bit to indicate that the
24544 function is a coroutine component.
24545 * internal-fn.c (expand_CO_FRAME): New.
24546 (expand_CO_YIELD): New.
24547 (expand_CO_SUSPN): New.
24548 (expand_CO_ACTOR): New.
24549 * internal-fn.def (CO_ACTOR): New.
24553 * passes.def: Add pass_coroutine_lower_builtins,
24554 pass_coroutine_early_expand_ifns.
24555 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
24556 (make_pass_coroutine_early_expand_ifns): New.
24557 * doc/invoke.texi: Document the fcoroutines command line
24560 2020-01-18 Jakub Jelinek <jakub@redhat.com>
24562 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
24565 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
24566 after checking the argument is a REG. Don't use REGNO (reg)
24567 again to set last_regno, reuse regno variable instead.
24569 2020-01-17 David Malcolm <dmalcolm@redhat.com>
24571 * doc/analyzer.texi (Limitations): Add note about NaN.
24573 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24574 Sudakshina Das <sudi.das@arm.com>
24576 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
24577 and valid immediate.
24578 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
24579 (lshrdi3): Generate thumb2_lsrl for valid immediates.
24580 * config/arm/constraints.md (Pg): New.
24581 * config/arm/predicates.md (long_shift_imm): New.
24582 (arm_reg_or_long_shift_imm): Likewise.
24583 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
24584 (thumb2_lsll): Likewise.
24585 (thumb2_lsrl): New.
24587 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24588 Sudakshina Das <sudi.das@arm.com>
24590 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
24591 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
24592 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
24593 register pairs for doubleword quantities for ARMv8.1M-Mainline.
24594 * config/arm/thumb2.md (thumb2_asrl): New.
24595 (thumb2_lsll): Likewise.
24597 2020-01-17 Jakub Jelinek <jakub@redhat.com>
24599 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
24602 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
24604 * gdbinit.in (help-gcc-hooks): New command.
24605 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
24606 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
24609 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
24611 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
24612 correct target macro.
24614 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
24616 * config/aarch64/aarch64-protos.h
24617 (aarch64_sve_ld1ro_operand_p): New.
24618 * config/aarch64/aarch64-sve-builtins-base.cc
24619 (class load_replicate): New.
24620 (class svld1ro_impl): New.
24621 (class svld1rq_impl): Change to inherit from load_replicate.
24622 (svld1ro): New sve intrinsic function base.
24623 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
24624 New DEF_SVE_FUNCTION.
24625 * config/aarch64/aarch64-sve-builtins-base.h
24626 (svld1ro): New decl.
24627 * config/aarch64/aarch64-sve-builtins.cc
24628 (function_expander::add_mem_operand): Modify assert to allow
24630 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
24632 * config/aarch64/aarch64.c
24633 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
24634 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
24635 (aarch64_sve_ld1ro_operand_p): New.
24636 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
24637 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
24638 * config/aarch64/predicates.md
24639 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
24641 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
24643 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
24644 Introduce this ACLE specified predefined macro.
24645 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
24646 (fp): Disabling this disables f64mm.
24647 (simd): Disabling this disables f64mm.
24648 (fp16): Disabling this disables f64mm.
24649 (sve): Disabling this disables f64mm.
24650 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
24651 (AARCH64_ISA_F64MM): New.
24652 (TARGET_F64MM): New.
24653 * doc/invoke.texi (f64mm): Document new option.
24655 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
24657 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
24658 (neoversen1_tunings): Likewise.
24660 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
24663 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
24664 Add assert to ensure prolog has been emitted.
24665 (aarch64_split_atomic_op): Likewise.
24666 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
24667 Use epilogue_completed rather than reload_completed.
24668 (aarch64_atomic_exchange<mode>): Likewise.
24669 (aarch64_atomic_<atomic_optab><mode>): Likewise.
24670 (atomic_nand<mode>): Likewise.
24671 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
24672 (atomic_fetch_nand<mode>): Likewise.
24673 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
24674 (atomic_nand_fetch<mode>): Likewise.
24676 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
24679 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
24681 (REVERSE_CONDITION): Delete.
24682 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
24683 (CCFP_CCFPE): Likewise.
24684 (e): New mode attribute.
24685 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
24686 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
24687 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
24688 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
24689 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
24690 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
24691 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
24692 name of generator from gen_ccmpdi to gen_ccmpccdi.
24693 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
24694 the previous comparison but aren't able to, use the new ccmp_rev
24697 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
24699 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
24700 than testing directly for INTEGER_CST.
24701 (gimplify_target_expr, gimplify_omp_depend): Likewise.
24703 2020-01-17 Jakub Jelinek <jakub@redhat.com>
24705 PR tree-optimization/93292
24706 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
24707 get_vectype_for_scalar_type returns NULL.
24709 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
24711 * params.opt (-param=max-predicted-iterations): Increase range from 0.
24712 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
24714 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
24716 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
24718 * params.opt: (max-predicted-iterations): Set bounds.
24719 * predict.c (real_almost_one, real_br_prob_base,
24720 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
24721 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
24722 probabilities; do not truncate to reg_br_prob_bases.
24723 (estimate_loops_at_level): Pass max_cyclic_prob.
24724 (estimate_loops): Compute max_cyclic_prob.
24725 (estimate_bb_frequencies): Do not initialize real_*; update calculation
24727 * profile-count.c (profile_probability::to_sreal): New.
24728 * profile-count.h (class sreal): Move up in file.
24729 (profile_probability::to_sreal): Declare.
24731 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24734 (arm_invalid_conversion): New function for target hook.
24735 (arm_invalid_unary_op): New function for target hook.
24736 (arm_invalid_binary_op): New function for target hook.
24738 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24740 * config.gcc: Add arm_bf16.h.
24741 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
24742 (arm_simd_builtin_std_type): Add BFmode.
24743 (arm_init_simd_builtin_types): Define element types for vector types.
24744 (arm_init_bf16_types): New function.
24745 (arm_init_builtins): Add arm_init_bf16_types function call.
24746 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
24747 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
24748 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
24749 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
24750 (arm_vector_mode_supported_p): Add V4BF, V8BF.
24751 (arm_mangle_type): Add __bf16.
24752 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
24753 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
24754 arm_bf16_ptr_type_node.
24755 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
24756 define_split between ARM registers.
24757 * config/arm/arm_bf16.h: New file.
24758 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
24759 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
24760 (VQXMOV): Add V8BF.
24761 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
24762 * config/arm/vfp.md: Add BFmode to movhf patterns.
24764 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
24765 Andre Vieira <andre.simoesdiasvieira@arm.com>
24767 * config/arm/arm-cpus.in (mve, mve_float): New features.
24768 (dsp, mve, mve.fp): New options.
24769 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
24770 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
24771 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
24773 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24774 Thomas Preud'homme <thomas.preudhomme@arm.com>
24776 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
24778 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
24779 error for using -mcmse when targeting Armv8.1-M Mainline.
24781 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24782 Thomas Preud'homme <thomas.preudhomme@arm.com>
24784 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
24785 address in r4 when targeting Armv8.1-M Mainline.
24786 (nonsecure_call_value_internal): Likewise.
24787 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
24788 a register match_operand again. Emit BLXNS when targeting
24789 Armv8.1-M Mainline.
24790 (nonsecure_call_value_reg_thumb2): Likewise.
24792 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24793 Thomas Preud'homme <thomas.preudhomme@arm.com>
24795 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
24796 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
24797 variable as true when floating-point ABI is not hard. Replace
24798 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
24799 Generate VLSTM and VLLDM instruction respectively before and
24800 after a function call to cmse_nonsecure_call function.
24801 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
24802 (VUNSPEC_VLLDM): Likewise.
24803 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
24804 (lazy_load_multiple_insn): Likewise.
24806 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24807 Thomas Preud'homme <thomas.preudhomme@arm.com>
24809 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
24810 (arm_emit_vfp_multi_reg_pop): Likewise.
24811 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
24812 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
24813 restore callee-saved VFP registers.
24815 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24816 Thomas Preud'homme <thomas.preudhomme@arm.com>
24818 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
24819 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
24820 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
24821 callee-saved GPRs as well as clear ip register before doing a nonsecure
24822 call then restore callee-saved GPRs after it when targeting
24823 Armv8.1-M Mainline.
24824 (arm_reorg): Adapt to function rename.
24826 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24827 Thomas Preud'homme <thomas.preudhomme@arm.com>
24829 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
24830 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
24831 clear_vfp_multiple pattern based on a new vfp parameter.
24832 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
24833 targeting Armv8.1-M Mainline.
24834 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
24835 unconditionally when targeting Armv8.1-M Mainline architecture. Check
24836 whether VFP registers are available before looking call_used_regs for a
24838 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
24839 of prototype of clear_operation_p.
24840 (clear_vfp_multiple_operation): New predicate.
24841 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
24842 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
24844 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24845 Thomas Preud'homme <thomas.preudhomme@arm.com>
24847 * config/arm/arm-protos.h (clear_operation_p): Declare.
24848 * config/arm/arm.c (clear_operation_p): New function.
24849 (cmse_clear_registers): Generate clear_multiple instruction pattern if
24850 targeting Armv8.1-M Mainline or successor.
24851 (output_return_instruction): Only output APSR register clearing if
24852 Armv8.1-M Mainline instructions not available.
24853 (thumb_exit): Likewise.
24854 * config/arm/predicates.md (clear_multiple_operation): New predicate.
24855 * config/arm/thumb2.md (clear_apsr): New define_insn.
24856 (clear_multiple): Likewise.
24857 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
24859 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24860 Thomas Preud'homme <thomas.preudhomme@arm.com>
24862 * config/arm/arm.c (fp_sysreg_names): Declare and define.
24863 (use_return_insn): Also return false for Armv8.1-M Mainline.
24864 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
24865 Mainline instructions are available.
24866 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
24867 when targeting Armv8.1-M Mainline Security Extensions.
24868 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
24869 Mainline entry function.
24870 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
24871 targeting Armv8.1-M Mainline or successor.
24872 (arm_expand_epilogue): Fix indentation of caller-saved register
24873 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
24875 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
24876 (FP_SYSREGS): Likewise.
24877 (enum vfp_sysregs_encoding): Define enum.
24878 (fp_sysreg_names): Declare.
24879 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
24880 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
24881 (pop_fpsysreg_insn): Likewise.
24883 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24884 Thomas Preud'homme <thomas.preudhomme@arm.com>
24886 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
24887 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
24888 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
24889 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
24890 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
24891 (ARMv8_1m_main): New feature group.
24892 (armv8.1-m.main): New architecture.
24893 * config/arm/arm-tables.opt: Regenerate.
24894 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
24895 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
24896 (arm_options_perform_arch_sanity_checks): Error out when targeting
24897 Armv8.1-M Mainline Security Extensions.
24898 * config/arm/arm.h (arm_arch8_1m_main): Declare.
24900 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24902 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
24903 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
24904 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
24905 aarch64_bfdot_laneq): New.
24906 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
24907 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
24908 vbfdotq_laneq_f32): New.
24909 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
24910 VBFMLA_W, VBF): New.
24911 (isquadop): Add V4BF, V8BF.
24913 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24915 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
24916 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
24917 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
24918 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
24919 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
24920 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
24921 usdot_laneq, sudot_lane,sudot_laneq): New.
24922 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
24923 (aarch64_<sur>dot_lane): New.
24924 * config/aarch64/arm_neon.h (vusdot_s32): New.
24925 (vusdotq_s32): New.
24926 (vusdot_lane_s32): New.
24927 (vsudot_lane_s32): New.
24928 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
24929 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
24931 2020-01-16 Martin Liska <mliska@suse.cz>
24933 * value-prof.c (dump_histogram_value): Fix
24934 obvious spacing issue.
24936 2020-01-16 Andrew Pinski <apinski@marvell.com>
24938 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
24939 !storage_order_barrier_p.
24941 2020-01-16 Andrew Pinski <apinski@marvell.com>
24943 * sched-int.h (_dep): Add unused bit-field field for the padding.
24944 * sched-deps.c (init_dep_1): Init unused field.
24946 2020-01-16 Andrew Pinski <apinski@marvell.com>
24948 * optabs.h (create_expand_operand): Initialize target field also.
24950 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
24952 PR tree-optimization/92429
24953 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
24954 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
24956 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
24959 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
24961 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
24962 aarch64_sve_int_mode to each mode.
24964 2020-01-15 David Malcolm <dmalcolm@redhat.com>
24966 * doc/analyzer.texi (Overview): Add note about
24967 -fdump-ipa-analyzer.
24969 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
24971 PR tree-optimization/93231
24972 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
24973 input_type is unsigned. Use tree_to_shwi for shift constant.
24974 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
24975 (simplify_count_trailing_zeroes): Add test to handle known non-zero
24976 inputs more efficiently.
24978 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
24980 * config/i386/i386.md (*movsf_internal): Do not require
24981 SSE2 ISA for alternatives 14 and 15.
24983 2020-01-15 Richard Biener <rguenther@suse.de>
24985 PR middle-end/93273
24986 * tree-eh.c (sink_clobbers): If we already visited the destination
24987 block do not defer insertion.
24988 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
24989 the purpose of defered insertion.
24991 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24993 * BASE-VER: Bump to 10.0.1.
24995 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
24997 PR tree-optimization/93247
24998 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
24999 type of the stmt that we're going to vectorize.
25001 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
25003 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
25004 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
25007 2020-01-15 Martin Liska <mliska@suse.cz>
25009 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
25010 2 calls of streamer_read_hwi in a function call.
25012 2020-01-15 Richard Biener <rguenther@suse.de>
25014 * alias.c (record_alias_subset): Avoid redundant work when
25015 subset is already recorded.
25017 2020-01-14 David Malcolm <dmalcolm@redhat.com>
25019 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
25020 the analyzer options provide CWE identifiers.
25022 2020-01-14 David Malcolm <dmalcolm@redhat.com>
25024 * tree-diagnostic-path.cc (path_summary::event_range::print):
25025 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
25026 using get_pure_location.
25028 2020-01-15 Jakub Jelinek <jakub@redhat.com>
25030 PR tree-optimization/93262
25031 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
25032 perform head trimming only if the last argument is constant,
25033 either all ones, or larger or equal to head trim, in the latter
25034 case decrease the last argument by head_trim.
25036 PR tree-optimization/93249
25037 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
25038 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
25039 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
25040 perform head trim unless we can prove there are no '\0' chars
25041 from the source among the first head_trim chars.
25043 2020-01-14 David Malcolm <dmalcolm@redhat.com>
25045 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
25047 2020-01-15 Jakub Jelinek <jakub@redhat.com>
25050 * config/i386/sse.md
25051 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
25052 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
25053 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
25054 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
25055 just a single alternative instead of two, make operands 1 and 2
25058 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
25061 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
25064 2020-01-14 David Malcolm <dmalcolm@redhat.com>
25066 * Makefile.in (lang_opt_files): Add analyzer.opt.
25067 (ANALYZER_OBJS): New.
25068 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
25069 tristate.o and ANALYZER_OBJS.
25070 (TEXI_GCCINT_FILES): Add analyzer.texi.
25071 * common.opt (-fanalyzer): New driver option.
25072 * config.in: Regenerate.
25073 * configure: Regenerate.
25074 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
25075 (gccdepdir): Also create depdir for "analyzer" subdir.
25076 * digraph.cc: New file.
25077 * digraph.h: New file.
25078 * doc/analyzer.texi: New file.
25079 * doc/gccint.texi ("Static Analyzer") New menu item.
25080 (analyzer.texi): Include it.
25081 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
25082 ("Warning Options"): Add static analysis warnings to the list.
25083 (-Wno-analyzer-double-fclose): New option.
25084 (-Wno-analyzer-double-free): New option.
25085 (-Wno-analyzer-exposure-through-output-file): New option.
25086 (-Wno-analyzer-file-leak): New option.
25087 (-Wno-analyzer-free-of-non-heap): New option.
25088 (-Wno-analyzer-malloc-leak): New option.
25089 (-Wno-analyzer-possible-null-argument): New option.
25090 (-Wno-analyzer-possible-null-dereference): New option.
25091 (-Wno-analyzer-null-argument): New option.
25092 (-Wno-analyzer-null-dereference): New option.
25093 (-Wno-analyzer-stale-setjmp-buffer): New option.
25094 (-Wno-analyzer-tainted-array-index): New option.
25095 (-Wno-analyzer-use-after-free): New option.
25096 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
25097 (-Wno-analyzer-use-of-uninitialized-value): New option.
25098 (-Wanalyzer-too-complex): New option.
25099 (-fanalyzer-call-summaries): New warning.
25100 (-fanalyzer-checker=): New warning.
25101 (-fanalyzer-fine-grained): New warning.
25102 (-fno-analyzer-state-merge): New warning.
25103 (-fno-analyzer-state-purge): New warning.
25104 (-fanalyzer-transitivity): New warning.
25105 (-fanalyzer-verbose-edges): New warning.
25106 (-fanalyzer-verbose-state-changes): New warning.
25107 (-fanalyzer-verbosity=): New warning.
25108 (-fdump-analyzer): New warning.
25109 (-fdump-analyzer-callgraph): New warning.
25110 (-fdump-analyzer-exploded-graph): New warning.
25111 (-fdump-analyzer-exploded-nodes): New warning.
25112 (-fdump-analyzer-exploded-nodes-2): New warning.
25113 (-fdump-analyzer-exploded-nodes-3): New warning.
25114 (-fdump-analyzer-supergraph): New warning.
25115 * doc/sourcebuild.texi (dg-require-dot): New.
25116 (dg-check-dot): New.
25117 * gdbinit.in (break-on-saved-diagnostic): New command.
25118 * graphviz.cc: New file.
25119 * graphviz.h: New file.
25120 * ordered-hash-map-tests.cc: New file.
25121 * ordered-hash-map.h: New file.
25122 * passes.def (pass_analyzer): Add before
25123 pass_ipa_whole_program_visibility.
25124 * selftest-run-tests.c (selftest::run_tests): Call
25125 selftest::ordered_hash_map_tests_cc_tests.
25126 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
25128 * shortest-paths.h: New file.
25129 * timevar.def (TV_ANALYZER): New timevar.
25130 (TV_ANALYZER_SUPERGRAPH): Likewise.
25131 (TV_ANALYZER_STATE_PURGE): Likewise.
25132 (TV_ANALYZER_PLAN): Likewise.
25133 (TV_ANALYZER_SCC): Likewise.
25134 (TV_ANALYZER_WORKLIST): Likewise.
25135 (TV_ANALYZER_DUMP): Likewise.
25136 (TV_ANALYZER_DIAGNOSTICS): Likewise.
25137 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
25138 * tree-pass.h (make_pass_analyzer): New decl.
25139 * tristate.cc: New file.
25140 * tristate.h: New file.
25142 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
25145 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
25146 alternatives 9 and 10.
25148 2020-01-14 David Malcolm <dmalcolm@redhat.com>
25150 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
25151 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
25152 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
25153 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
25154 (selftest::hash_map_tests_c_tests): Call it.
25155 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
25156 New static constant, using the value of = H::empty_zero_p.
25157 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
25158 from default_hash_traits <Value>.
25159 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
25161 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
25162 * hash-table.h (hash_table::alloc_entries): Guard the loop of
25163 calls to mark_empty with !Descriptor::empty_zero_p.
25164 (hash_table::empty_slow): Conditionalize the memset call with a
25165 check that Descriptor::empty_zero_p; otherwise, loop through the
25166 entries calling mark_empty on them.
25167 * hash-traits.h (int_hash::empty_zero_p): New static constant.
25168 (pointer_hash::empty_zero_p): Likewise.
25169 (pair_hash::empty_zero_p): Likewise.
25170 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
25172 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
25173 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
25174 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
25175 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
25176 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
25177 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
25178 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
25179 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
25180 * tree-vectorizer.h
25181 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
25184 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
25186 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
25187 fix typo on return value.
25189 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
25192 * cgraph.c (symbol_table::create_edge): Init speculative_id and
25194 (cgraph_edge::make_speculative): Add param for setting speculative_id
25196 (cgraph_edge::speculative_call_info): Update comments and find reference
25197 by speculative_id for multiple indirect targets.
25198 (cgraph_edge::resolve_speculation): Decrease the speculations
25199 for indirect edge, drop it's speculative if not direct target
25200 left. Update comments.
25201 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
25202 (cgraph_node::dump): Print num_speculative_call_targets.
25203 (cgraph_node::verify_node): Don't report error if speculative
25204 edge not include statement.
25205 (cgraph_edge::num_speculative_call_targets_p): New function.
25206 * cgraph.h (int common_target_id): Remove.
25207 (int common_target_probability): Remove.
25208 (num_speculative_call_targets): New variable.
25209 (make_speculative): Add param for setting speculative_id.
25210 (cgraph_edge::num_speculative_call_targets_p): New declare.
25211 (target_prob): New variable.
25212 (speculative_id): New variable.
25213 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
25214 call summaries for multiple speculative call targets.
25215 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
25216 * ipa-profile.c (struct speculative_call_target): New struct.
25217 (class speculative_call_summary): New class.
25218 (class speculative_call_summaries): New class.
25219 (call_sums): New variable.
25220 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
25221 (ipa_profile_write_edge_summary): New function.
25222 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
25223 (ipa_profile_dump_all_summaries): New function.
25224 (ipa_profile_read_edge_summary): New function.
25225 (ipa_profile_read_summary_section): New function.
25226 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
25227 (ipa_profile): Generate num_speculative_call_targets from
25229 * ipa-ref.h (speculative_id): New variable.
25230 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
25231 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
25232 common_target_probability. Stream out speculative_id and
25233 num_speculative_call_targets.
25234 (input_edge): Likewise.
25235 * predict.c (dump_prediction): Remove edges count assert to be
25237 * symtab.c (symtab_node::create_reference): Init speculative_id.
25238 (symtab_node::clone_references): Clone speculative_id.
25239 (symtab_node::clone_referring): Clone speculative_id.
25240 (symtab_node::clone_reference): Clone speculative_id.
25241 (symtab_node::clear_stmts_in_references): Clear speculative_id.
25242 * tree-inline.c (copy_bb): Duplicate all the speculative edges
25243 if indirect call contains multiple speculative targets.
25244 * value-prof.h (check_ic_target): Remove.
25245 * value-prof.c (gimple_value_profile_transformations):
25246 Use void function gimple_ic_transform.
25247 * value-prof.c (gimple_ic_transform): Handle topn case.
25248 Fix comment typos. Change it to a void function.
25250 2020-01-13 Andrew Pinski <apinski@marvell.com>
25252 * config/aarch64/aarch64-cores.def (octeontx2): New define.
25253 (octeontx2t98): New define.
25254 (octeontx2t96): New define.
25255 (octeontx2t93): New define.
25256 (octeontx2f95): New define.
25257 (octeontx2f95n): New define.
25258 (octeontx2f95mm): New define.
25259 * config/aarch64/aarch64-tune.md: Regenerate.
25260 * doc/invoke.texi (-mcpu=): Document the new cpu types.
25262 2020-01-13 Jason Merrill <jason@redhat.com>
25264 PR c++/33799 - destroy return value if local cleanup throws.
25265 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
25267 2020-01-13 Martin Liska <mliska@suse.cz>
25269 * ipa-cp.c (get_max_overall_size): Use newly
25270 renamed param param_ipa_cp_unit_growth.
25271 * params.opt: Remove legacy param name.
25273 2020-01-13 Martin Sebor <msebor@redhat.com>
25275 PR tree-optimization/93213
25276 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
25277 stores to be eliminated.
25279 2020-01-13 Martin Liska <mliska@suse.cz>
25281 * opts.c (print_help): Do not print CL_PARAM
25282 and CL_WARNING for CL_OPTIMIZATION.
25284 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
25287 * doc/invoke.texi (Warning Options): Add caveat about some warnings
25288 depending on optimization settings.
25290 2020-01-13 Jakub Jelinek <jakub@redhat.com>
25292 PR tree-optimization/90838
25293 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
25294 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
25295 argument rather than to initialize temporary for targets that
25296 don't use the mode argument at all. Initialize ctzval to avoid
25299 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
25301 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
25302 * tree-core.h: Document it.
25303 * gimplify.c (gimplify_omp_workshare): Set it.
25304 * omp-low.c (lower_omp_target): Use it.
25305 * tree-pretty-print.c (dump_omp_clause): Print it.
25307 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
25308 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
25310 2020-01-10 David Malcolm <dmalcolm@redhat.com>
25312 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
25313 * common.opt (fdiagnostics-path-format=): New option.
25314 (diagnostic_path_format): New enum.
25315 (fdiagnostics-show-path-depths): New option.
25316 * coretypes.h (diagnostic_event_id_t): New forward decl.
25317 * diagnostic-color.c (color_dict): Add "path".
25318 * diagnostic-event-id.h: New file.
25319 * diagnostic-format-json.cc (json_from_expanded_location): Make
25321 (json_end_diagnostic): Call context->make_json_for_path if it
25322 exists and the diagnostic has a path.
25323 (diagnostic_output_format_init): Clear context->print_path.
25324 * diagnostic-path.h: New file.
25325 * diagnostic-show-locus.c (colorizer::set_range): Special-case
25326 when printing a run of events in a diagnostic_path so that they
25327 all get the same color.
25328 (layout::m_diagnostic_path_p): New field.
25329 (layout::layout): Initialize it.
25330 (layout::print_any_labels): Don't colorize the label text for an
25331 event in a diagnostic_path.
25332 (gcc_rich_location::add_location_if_nearby): Add
25333 "restrict_to_current_line_spans" and "label" params. Pass the
25334 former to layout.maybe_add_location_range; pass the latter
25335 when calling add_range.
25336 * diagnostic.c: Include "diagnostic-path.h".
25337 (diagnostic_initialize): Initialize context->path_format and
25338 context->show_path_depths.
25339 (diagnostic_show_any_path): New function.
25340 (diagnostic_path::interprocedural_p): New function.
25341 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
25342 (simple_diagnostic_path::num_events): New function.
25343 (simple_diagnostic_path::get_event): New function.
25344 (simple_diagnostic_path::add_event): New function.
25345 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
25346 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
25347 (debug): New overload taking a diagnostic_path *.
25348 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
25349 * diagnostic.h (enum diagnostic_path_format): New enum.
25350 (json::value): New forward decl.
25351 (diagnostic_context::path_format): New field.
25352 (diagnostic_context::show_path_depths): New field.
25353 (diagnostic_context::print_path): New callback field.
25354 (diagnostic_context::make_json_for_path): New callback field.
25355 (diagnostic_show_any_path): New decl.
25356 (json_from_expanded_location): New decl.
25357 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
25358 (-fdiagnostics-show-path-depths): New option.
25359 (-fdiagnostics-color): Add "path" to description of default
25360 GCC_COLORS; describe it.
25361 (-fdiagnostics-format=json): Document how diagnostic paths are
25362 represented in the JSON output format.
25363 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
25364 Add optional params "restrict_to_current_line_spans" and "label".
25365 * opts.c (common_handle_option): Handle
25366 OPT_fdiagnostics_path_format_ and
25367 OPT_fdiagnostics_show_path_depths.
25368 * pretty-print.c: Include "diagnostic-event-id.h".
25369 (pp_format): Implement "%@" format code for printing
25370 diagnostic_event_id_t *.
25371 (selftest::test_pp_format): Add tests for "%@".
25372 * selftest-run-tests.c (selftest::run_tests): Call
25373 selftest::tree_diagnostic_path_cc_tests.
25374 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
25375 * toplev.c (general_init): Initialize global_dc->path_format and
25376 global_dc->show_path_depths.
25377 * tree-diagnostic-path.cc: New file.
25378 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
25379 non-static. Drop "diagnostic" param in favor of storing the
25380 original value of "where" and re-using it.
25381 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
25382 maybe_unwind_expanded_macro_loc.
25383 (tree_diagnostics_defaults): Initialize context->print_path and
25384 context->make_json_for_path.
25385 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
25387 (default_tree_make_json_for_path): New decl.
25388 (maybe_unwind_expanded_macro_loc): New decl.
25390 2020-01-10 Jakub Jelinek <jakub@redhat.com>
25392 PR tree-optimization/93210
25393 * fold-const.h (native_encode_initializer,
25394 can_native_interpret_type_p): Declare.
25395 * fold-const.c (native_encode_string): Fix up handling with off != -1,
25397 (native_encode_initializer): New function, moved from dwarf2out.c.
25398 Adjust to native_encode_expr compatible arguments, including dry-run
25399 and partial extraction modes. Don't handle STRING_CST.
25400 (can_native_interpret_type_p): No longer static.
25401 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
25402 offset / BITS_PER_UNIT fits into int and don't call it if
25403 can_native_interpret_type_p fails. If suboff is NULL and for
25404 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
25405 native_encode_initializer.
25406 (fold_const_aggregate_ref_1): Formatting fix.
25407 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
25408 (tree_add_const_value_attribute): Adjust caller.
25410 PR tree-optimization/90838
25411 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
25412 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
25413 CTZ_DEFINED_VALUE_AT_ZERO.
25415 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
25417 PR inline-asm/93027
25418 * lra-constraints.c (match_reload): Permit input operands have the
25419 same mode as output while other input operands have a different
25422 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
25424 PR tree-optimization/90838
25425 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
25426 (check_ctz_string): Likewise.
25427 (optimize_count_trailing_zeroes): Likewise.
25428 (simplify_count_trailing_zeroes): Likewise.
25429 (pass_forwprop::execute): Try ctz simplification.
25430 * match.pd: Add matching for ctz idioms.
25432 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
25434 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
25436 (aarch64_invalid_unary_op): New function for target hook.
25437 (aarch64_invalid_binary_op): New function for target hook.
25439 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
25441 * config.gcc: Add arm_bf16.h.
25442 * config/aarch64/aarch64-builtins.c
25443 (aarch64_simd_builtin_std_type): Add BFmode.
25444 (aarch64_init_simd_builtin_types): Define element types for vector
25446 (aarch64_init_bf16_types): New function.
25447 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
25448 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
25450 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
25451 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
25453 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
25454 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
25455 * config/aarch64/aarch64.c
25456 (aarch64_classify_vector_mode): Add support for BF types.
25457 (aarch64_gimplify_va_arg_expr): Add support for BF types.
25458 (aarch64_vq_mode): Add support for BF types.
25459 (aarch64_simd_container_mode): Add support for BF types.
25460 (aarch64_mangle_type): Add support for BF scalar type.
25461 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
25462 * config/aarch64/arm_bf16.h: New file.
25463 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
25464 * config/aarch64/iterators.md: Add BF types to mode attributes.
25465 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
25467 2020-01-10 Jason Merrill <jason@redhat.com>
25469 PR c++/93173 - incorrect tree sharing.
25470 * gimplify.c (copy_if_shared): No longer static.
25471 * gimplify.h: Declare it.
25473 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25475 * doc/invoke.texi (-msve-vector-bits=): Document that
25476 -msve-vector-bits=128 now generates VL-specific code for
25477 little-endian targets.
25478 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
25479 build_vector_type_for_mode to construct the data vector types.
25480 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
25481 VL-specific code for -msve-vector-bits=128 on little-endian targets.
25482 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
25483 for 128-bit vectors.
25485 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25487 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
25490 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25492 * config/aarch64/aarch64-builtins.c
25493 (aarch64_builtin_vectorized_function): Check for specific vector modes,
25494 rather than checking the number of elements and the element mode.
25496 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25498 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
25499 get_related_vectype_for_scalar_type rather than build_vector_type
25500 to create the index type for a conditional reduction.
25502 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25504 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
25505 for any type of gather or scatter, including strided accesses.
25507 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
25509 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
25512 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
25514 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
25515 get_dr_vinfo_offset
25516 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
25517 parameter and its use to reset DR_OFFSET's.
25518 (vect_transform_loop): Remove orig_drs_init argument.
25519 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
25520 member of dr_vec_info rather than the offset of the associated
25521 data_reference's innermost_loop_behavior.
25522 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
25523 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
25524 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
25525 get_dr_vinfo_offset.
25526 (vectorizable_store): Likewise.
25527 (vectorizable_load): Likewise.
25529 2020-01-10 Richard Biener <rguenther@suse.de>
25531 * gimple-ssa-store-merging
25532 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
25534 2020-01-10 Martin Liska <mliska@suse.cz>
25537 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
25538 encapsulation that was there before r280040.
25540 2020-01-10 Richard Biener <rguenther@suse.de>
25542 PR middle-end/93199
25543 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
25544 sequences to avoid walking them again for secondary opportunities.
25545 (pass_lower_eh_dispatch::execute): Instead actually insert
25548 2020-01-10 Richard Biener <rguenther@suse.de>
25550 PR middle-end/93199
25551 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
25552 (cleanup_all_empty_eh): Walk landing pads in reverse order to
25553 avoid quadraticness.
25555 2020-01-10 Martin Jambor <mjambor@suse.cz>
25557 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
25558 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
25559 to get param_ipa_sra_max_replacements.
25560 (param_splitting_across_edge): Pass the caller to
25561 pull_accesses_from_callee.
25563 2020-01-10 Martin Jambor <mjambor@suse.cz>
25565 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
25566 * ipa-cp.c (max_new_size): Removed.
25567 (orig_overall_size): New variable.
25568 (get_max_overall_size): New function.
25569 (estimate_local_effects): Use it. Adjust dump.
25570 (decide_about_value): Likewise.
25571 (ipcp_propagate_stage): Do not calculate max_new_size, just store
25572 orig_overall_size. Adjust dump.
25573 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
25575 2020-01-10 Martin Jambor <mjambor@suse.cz>
25577 * params.opt (param_ipa_max_agg_items): Mark as Optimization
25578 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
25579 instead of param_ipa_max_agg_items.
25580 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
25581 optimization info for the callee.
25583 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
25585 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
25586 markers if debug_inline_points is false.
25588 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25590 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
25592 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
25593 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
25594 aarch64-sve-builtins-sve2.h.
25595 (aarch64-sve-builtins-sve2.o): New rule.
25596 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
25597 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
25598 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
25599 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
25600 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
25601 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
25603 * config/aarch64/aarch64-sve.md: Update comments with SVE2
25604 instructions that are handled here.
25605 (@cond_asrd<mode>): Generalize to...
25606 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
25607 (*cond_asrd<mode>_2): Generalize to...
25608 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
25609 (*cond_asrd<mode>_z): Generalize to...
25610 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
25611 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
25612 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
25613 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
25614 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
25616 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
25617 (@aarch64_scatter_stnt<mode>): Likewise.
25618 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
25619 (@aarch64_mul_lane_<mode>): Likewise.
25620 (@aarch64_sve_suqadd<mode>_const): Likewise.
25621 (*<sur>h<addsub><mode>): Generalize to...
25622 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
25624 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
25625 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
25626 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
25627 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
25628 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
25629 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
25630 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
25631 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
25632 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
25633 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
25634 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
25635 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
25636 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
25637 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
25638 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
25639 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
25640 (@aarch64_sve2_xar<mode>): Likewise.
25641 (@aarch64_sve2_bcax<mode>): Likewise.
25642 (*aarch64_sve2_eor3<mode>): Rename to...
25643 (@aarch64_sve2_eor3<mode>): ...this.
25644 (@aarch64_sve2_bsl<mode>): New expander.
25645 (@aarch64_sve2_nbsl<mode>): Likewise.
25646 (@aarch64_sve2_bsl1n<mode>): Likewise.
25647 (@aarch64_sve2_bsl2n<mode>): Likewise.
25648 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
25649 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
25650 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
25651 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
25652 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
25653 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
25654 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
25655 (<su>mull<bt><Vwide>): Generalize to...
25656 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
25658 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
25659 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
25660 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
25661 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25662 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
25663 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25664 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
25665 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25666 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
25667 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25668 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
25669 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
25670 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
25671 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
25672 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
25673 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
25674 (<SHRNB:r>shrnb<mode>): Generalize to...
25675 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
25677 (<SHRNT:r>shrnt<mode>): Generalize to...
25678 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
25680 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
25681 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
25682 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
25683 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
25684 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
25685 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
25686 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
25687 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
25688 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
25689 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
25690 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
25691 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
25692 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
25693 (@aarch64_sve2_cvtnt<mode>): Likewise.
25694 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
25695 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
25696 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
25697 (@aarch64_sve2_cvtxnt<mode>): Likewise.
25698 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
25699 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
25700 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
25701 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
25702 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
25703 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
25704 (@aarch64_sve2_pmul<mode>): Likewise.
25705 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
25706 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
25707 (@aarch64_sve2_tbl2<mode>): Likewise.
25708 (@aarch64_sve2_tbx<mode>): Likewise.
25709 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
25710 (@aarch64_sve2_histcnt<mode>): Likewise.
25711 (@aarch64_sve2_histseg<mode>): Likewise.
25712 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
25713 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
25714 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
25715 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
25716 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
25717 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
25718 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
25719 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
25720 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
25721 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
25722 (SVE2_PMULL_PAIR_I): New mode iterators.
25723 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
25724 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
25725 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
25726 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
25727 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
25728 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
25729 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
25730 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
25731 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
25732 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
25733 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
25734 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
25735 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
25736 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
25737 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
25738 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
25739 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
25740 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
25741 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
25742 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
25743 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
25744 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
25745 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
25746 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
25747 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
25748 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
25749 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
25750 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
25751 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
25752 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
25753 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
25755 (VNARROW, Ventype): New mode attributes.
25756 (Vewtype): Handle VNx2DI. Fix typo in comment.
25757 (VDOUBLE): New mode attribute.
25758 (sve_lane_con): Handle VNx8HI.
25759 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
25760 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
25761 (sve_int_op, sve_int_op_rev): Handle the above codes.
25762 (sve_pred_int_rhs2_operand): Likewise.
25763 (MULLBT, SHRNB, SHRNT): Delete.
25764 (SVE_INT_SHIFT_IMM): New int iterator.
25765 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
25766 and UNSPEC_WHILEHS for TARGET_SVE2.
25767 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
25768 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
25769 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
25770 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
25771 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
25772 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
25773 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
25774 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
25775 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
25776 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
25777 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
25778 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
25779 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
25780 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
25781 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
25782 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
25783 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
25784 (optab): Handle the new unspecs.
25785 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
25787 (lr): Handle the new unspecs.
25789 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
25790 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
25791 (sve_int_qsub_op): New int attributes.
25792 (sve_fp_op, rot): Handle the new unspecs.
25793 * config/aarch64/aarch64-sve-builtins.h
25794 (function_resolver::require_matching_pointer_type): Declare.
25795 (function_resolver::resolve_unary): Add an optional boolean argument.
25796 (function_resolver::finish_opt_n_resolution): Add an optional
25797 type_suffix_index argument.
25798 (gimple_folder::redirect_call): Declare.
25799 (gimple_expander::prepare_gather_address_operands): Add an optional
25801 * config/aarch64/aarch64-sve-builtins.cc: Include
25802 aarch64-sve-builtins-sve2.h.
25803 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
25804 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
25805 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
25806 (TYPES_hsd_integer): Use TYPES_hsd_signed.
25807 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
25808 (TYPES_s_unsigned): Likewise.
25809 (TYPES_s_integer): Use TYPES_s_unsigned.
25810 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
25811 (TYPES_sd_integer): Use them.
25812 (TYPES_d_unsigned): New macro.
25813 (TYPES_d_integer): Use it.
25814 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
25815 (TYPES_cvt_narrow): Likewise.
25816 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
25817 (preds_mx): New variable.
25818 (function_builder::add_overloaded_function): Allow the new feature
25819 set to be more restrictive than the original one.
25820 (function_resolver::infer_pointer_type): Remove qualifiers from
25821 the pointer type before printing it.
25822 (function_resolver::require_matching_pointer_type): New function.
25823 (function_resolver::resolve_sv_displacement): Handle functions
25824 that don't support 32-bit vector indices or svint32_t vector offsets.
25825 (function_resolver::finish_opt_n_resolution): Take the inferred type
25826 as a separate argument.
25827 (function_resolver::resolve_unary): Optionally treat all forms in
25828 the same way as normal merging functions.
25829 (gimple_folder::redirect_call): New function.
25830 (function_expander::prepare_gather_address_operands): Add an argument
25831 that says whether scaled forms are available. If they aren't,
25832 handle scaling of vector indices and don't add the extension and
25834 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
25835 fall back to using cond_* instead.
25836 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
25837 Split out the member variables into...
25838 (rtx_code_function_base): ...this new base class.
25839 (rtx_code_function_rotated): Inherit rtx_code_function_base.
25840 (unspec_based_function): Split out the member variables into...
25841 (unspec_based_function_base): ...this new base class.
25842 (unspec_based_function_rotated): Inherit unspec_based_function_base.
25843 (unspec_based_function_exact_insn): New class.
25844 (unspec_based_add_function, unspec_based_add_lane_function)
25845 (unspec_based_lane_function, unspec_based_pred_function)
25846 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
25847 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
25848 (unspec_based_sub_function, unspec_based_sub_lane_function): New
25850 (unspec_based_fused_function): New class.
25851 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
25852 (unspec_based_fused_lane_function): New class.
25853 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
25855 (CODE_FOR_MODE1): New macro.
25856 (fixed_insn_function): New class.
25857 (while_comparison): Likewise.
25858 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
25859 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
25860 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
25861 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
25862 (load_gather_sv_restricted, shift_left_imm_long): Declare.
25863 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
25864 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
25865 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
25866 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
25867 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
25868 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
25869 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
25870 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
25871 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
25872 Also add an initial argument for unary_convert_narrowt, regardless
25873 of the predication type.
25874 (build_32_64): Allow loads and stores to specify MODE_none.
25875 (build_sv_index64, build_sv_uint_offset): New functions.
25876 (long_type_suffix): New function.
25877 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
25878 (binary_imm_long_base, load_gather_sv_base): Likewise.
25879 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
25880 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
25881 (unary_narrowb_base, unary_narrowt_base): Likewise.
25882 (binary_long_lane_def, binary_long_lane): New shape.
25883 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
25884 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
25885 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
25886 (binary_to_uint_def, binary_to_uint): Likewise.
25887 (binary_wide_def, binary_wide): Likewise.
25888 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
25889 (compare_def, compare): Likewise.
25890 (compare_ptr_def, compare_ptr): Likewise.
25891 (load_ext_gather_index_restricted_def,
25892 load_ext_gather_index_restricted): Likewise.
25893 (load_ext_gather_offset_restricted_def,
25894 load_ext_gather_offset_restricted): Likewise.
25895 (load_gather_sv_def): Inherit from load_gather_sv_base.
25896 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
25897 (shift_left_imm_def, shift_left_imm): Likewise.
25898 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
25899 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
25900 (store_scatter_index_restricted_def,
25901 store_scatter_index_restricted): Likewise.
25902 (store_scatter_offset_restricted_def,
25903 store_scatter_offset_restricted): Likewise.
25904 (tbl_tuple_def, tbl_tuple): Likewise.
25905 (ternary_long_lane_def, ternary_long_lane): Likewise.
25906 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
25907 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
25908 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
25909 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
25910 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
25911 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
25912 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
25913 (ternary_uint_def, ternary_uint): Likewise.
25914 (unary_convert): Fix typo in comment.
25915 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
25916 (unary_long_def, unary_long): Likewise.
25917 (unary_narrowb_def, unary_narrowb): Likewise.
25918 (unary_narrowt_def, unary_narrowt): Likewise.
25919 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
25920 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
25921 (unary_to_int_def, unary_to_int): Likewise.
25922 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
25923 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
25924 (svasrd_impl): Delete.
25925 (svcadd_impl::expand): Handle integer operations too.
25926 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
25927 new functions to derive the unspec numbers.
25928 (svmla_svmls_lane_impl): Replace with...
25929 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
25930 integer operations too.
25931 (svwhile_impl): Rename to...
25932 (svwhilelx_impl): ...this and inherit from while_comparison.
25933 (svasrd): Use unspec_based_function.
25934 (svmla_lane): Use svmla_lane_impl.
25935 (svmls_lane): Use svmls_lane_impl.
25936 (svrecpe, svrsqrte): Handle unsigned integer operations too.
25937 (svwhilele, svwhilelt): Use svwhilelx_impl.
25938 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
25939 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
25940 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
25941 * config/aarch64/aarch64-sve-builtins.def: Include
25942 aarch64-sve-builtins-sve2.def.
25944 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25946 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
25947 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
25948 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
25949 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
25950 immediates as well as vector ones.
25951 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
25952 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
25953 (aarch64_sve_qsub_immediate): Update calls accordingly.
25955 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25957 * config/aarch64/aarch64-sve2.md: Add banner comments.
25958 (<su>mulh<r>s<mode>3): Move further up file.
25959 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
25960 (*aarch64_sve2_sra<mode>): Move further down file.
25961 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
25963 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25965 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
25966 and UNSPEC_WHILEWR.
25967 (while_optab_cmp): Handle them.
25968 * config/aarch64/aarch64-sve.md
25969 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
25970 and add a "@" marker.
25971 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
25972 instead of gen_aarch64_sve2_while_ptest.
25973 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
25975 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25977 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
25978 (UNSPEC_WHILELE): ...this.
25979 (UNSPEC_WHILE_LO): Rename to...
25980 (UNSPEC_WHILELO): ...this.
25981 (UNSPEC_WHILE_LS): Rename to...
25982 (UNSPEC_WHILELS): ...this.
25983 (UNSPEC_WHILE_LT): Rename to...
25984 (UNSPEC_WHILELT): ...this.
25985 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
25986 (cmp_op, while_optab_cmp): Likewise.
25987 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
25988 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
25989 (svwhilelt): Likewise.
25991 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25993 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
25994 (unary_to_uint): Define.
25995 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
25996 (unary_count): Rename to...
25997 (unary_to_uint_def, unary_to_uint): ...this.
25998 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
26000 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
26002 * config/aarch64/aarch64-sve-builtins-functions.h
26003 (code_for_mode_function): New class.
26004 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
26005 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
26006 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
26007 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
26008 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
26010 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
26012 * config/aarch64/iterators.md (addsub): New code attribute.
26013 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
26015 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
26016 in the asm string and attributes. Fix indentation.
26017 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
26019 (@aarch64_sve_<optab><mode>): ...this.
26020 * config/aarch64/aarch64-sve-builtins.h
26021 (function_expander::expand_signed_unpred_op): Delete.
26022 * config/aarch64/aarch64-sve-builtins.cc
26023 (function_expander::expand_signed_unpred_op): Likewise.
26024 (function_expander::map_to_rtx_codes): If the optab isn't defined,
26025 try using code_for_aarch64_sve instead.
26026 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
26027 (svqsub_impl): Likewise.
26028 (svqadd, svqsub): Use rtx_code_function instead.
26030 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
26032 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
26033 (HADDSUB, sur, addsub): Remove them.
26035 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
26037 * tree-nrv.c (pass_return_slot::execute): Handle all internal
26038 functions the same way, rather than singling out those that
26039 aren't mapped directly to optabs.
26041 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
26043 * target.def (compatible_vector_types_p): New target hook.
26044 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
26045 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
26046 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
26047 * doc/tm.texi: Regenerate.
26048 * gimple-expr.c: Include target.h.
26049 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
26050 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
26052 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
26053 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
26054 Use the original predicate if it already has a suitable type.
26056 2020-01-09 Martin Jambor <mjambor@suse.cz>
26058 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
26059 resolve_speculation and redirect_call_stmt_to_callee static. Change
26060 return type of set_call_stmt to cgraph_edge *.
26061 * auto-profile.c (afdo_indirect_call): Adjust call to
26062 redirect_call_stmt_to_callee.
26063 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
26064 make the this pointer explicit, adjust self-recursive calls and the
26065 call top make_direct. Return the resulting edge.
26066 (cgraph_edge::remove): Make this pointer explicit.
26067 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
26068 (cgraph_edge::make_direct): Likewise, adjust call to
26069 resolve_speculation.
26070 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
26071 call to set_call_stmt.
26072 (cgraph_update_edges_for_call_stmt_node): Update call to
26073 set_call_stmt and remove.
26074 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
26075 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
26076 (cgraph_node::create_edge_including_clones): Moved "first" definition
26077 of edge to the block where it was used. Adjusted calls to
26079 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
26080 cgraph_edge::remove.
26081 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
26082 make_direct and redirect_call_stmt_to_callee.
26083 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
26084 resolve_speculation and make_direct.
26085 * ipa-inline-transform.c (inline_transform): Adjust call to
26086 redirect_call_stmt_to_callee.
26087 (check_speculations_1):: Adjust call to resolve_speculation.
26088 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
26089 resolve-speculation.
26090 (inline_small_functions): Adjust call to resolve_speculation.
26091 (ipa_inline): Likewise.
26092 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
26094 * ipa-visibility.c (function_and_variable_visibility): Make iteration
26095 safe with regards to edge removal, adjust calls to
26096 redirect_call_stmt_to_callee.
26097 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
26098 and redirect_call_stmt_to_callee.
26099 * multiple_target.c (create_dispatcher_calls): Adjust call to
26100 redirect_call_stmt_to_callee
26101 (redirect_to_specific_clone): Likewise.
26102 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
26103 Adjust calls to cgraph_edge::remove.
26104 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
26105 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
26106 (expand_call_inline): Adjust call to cgraph_edge::remove.
26108 2020-01-09 Martin Liska <mliska@suse.cz>
26110 * params.opt: Set Optimization for
26111 param_max_speculative_devirt_maydefs.
26113 2020-01-09 Martin Sebor <msebor@redhat.com>
26115 PR middle-end/93200
26117 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
26119 2020-01-09 Martin Liska <mliska@suse.cz>
26121 * auto-profile.c (auto_profile): Use opt_for_fn
26123 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
26124 (propagate_vals_across_arith_jfunc): Likewise.
26125 (hint_time_bonus): Likewise.
26126 (incorporate_penalties): Likewise.
26127 (good_cloning_opportunity_p): Likewise.
26128 (perform_estimation_of_a_value): Likewise.
26129 (estimate_local_effects): Likewise.
26130 (ipcp_propagate_stage): Likewise.
26131 * ipa-fnsummary.c (decompose_param_expr): Likewise.
26132 (set_switch_stmt_execution_predicate): Likewise.
26133 (analyze_function_body): Likewise.
26134 * ipa-inline-analysis.c (offline_size): Likewise.
26135 * ipa-inline.c (early_inliner): Likewise.
26136 * ipa-prop.c (ipa_analyze_node): Likewise.
26137 (ipcp_transform_function): Likewise.
26138 * ipa-sra.c (process_scan_results): Likewise.
26139 (ipa_sra_summarize_function): Likewise.
26140 * params.opt: Rename ipcp-unit-growth to
26141 ipa-cp-unit-growth. Add Optimization for various
26142 IPA-related parameters.
26144 2020-01-09 Richard Biener <rguenther@suse.de>
26146 PR middle-end/93054
26147 * gimplify.c (gimplify_expr): Deal with NOP definitions.
26149 2020-01-09 Richard Biener <rguenther@suse.de>
26151 PR tree-optimization/93040
26152 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
26154 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
26156 * common/config/avr/avr-common.c (avr_option_optimization_table)
26157 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
26159 2020-01-09 Martin Liska <mliska@suse.cz>
26161 * cgraphclones.c (symbol_table::materialize_all_clones):
26162 Use cgraph_node::dump_name.
26164 2020-01-09 Jakub Jelinek <jakub@redhat.com>
26166 PR inline-asm/93202
26167 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
26168 output_operand_lossage instead of gcc_unreachable.
26169 * doc/md.texi (riscv f constraint): Fix typo.
26172 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
26173 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
26174 CONST_SCALAR_INT_P instead of CONST_INT_P.
26175 (*subv<mode>4_1): Rename to ...
26176 (subv<mode>4_1): ... this.
26177 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
26178 define_insn_and_split patterns.
26179 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
26182 2020-01-08 David Malcolm <dmalcolm@redhat.com>
26184 * vec.c (class selftest::count_dtor): New class.
26185 (selftest::test_auto_delete_vec): New test.
26186 (selftest::vec_c_tests): Call it.
26187 * vec.h (class auto_delete_vec): New class template.
26188 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
26190 2020-01-08 David Malcolm <dmalcolm@redhat.com>
26192 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
26194 2020-01-08 Jim Wilson <jimw@sifive.com>
26196 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
26197 use of TLS_MODEL_LOCAL_EXEC when not pic.
26199 2020-01-08 David Malcolm <dmalcolm@redhat.com>
26201 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
26204 2020-01-08 Jakub Jelinek <jakub@redhat.com>
26207 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
26208 *stack_protect_set_3 peephole2): Also check that the second
26209 insns source is general_operand.
26212 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
26213 predicate for output operand instead of register_operand.
26214 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
26215 memory destination and non-memory operands[2].
26217 2020-01-08 Martin Liska <mliska@suse.cz>
26219 * cgraph.c (cgraph_node::dump): Use ::dump_name or
26220 ::dump_asm_name instead of (::name or ::asm_name).
26221 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
26222 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
26223 (analyze_functions): Likewise.
26224 (expand_all_functions): Likewise.
26225 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
26226 (propagate_bits_across_jump_function): Likewise.
26227 (dump_profile_updates): Likewise.
26228 (ipcp_store_bits_results): Likewise.
26229 (ipcp_store_vr_results): Likewise.
26230 * ipa-devirt.c (dump_targets): Likewise.
26231 * ipa-fnsummary.c (analyze_function_body): Likewise.
26232 * ipa-hsa.c (check_warn_node_versionable): Likewise.
26233 (process_hsa_functions): Likewise.
26234 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
26235 (set_alias_uids): Likewise.
26236 * ipa-inline-transform.c (save_inline_function_body): Likewise.
26237 * ipa-inline.c (recursive_inlining): Likewise.
26238 (inline_to_all_callers_1): Likewise.
26239 (ipa_inline): Likewise.
26240 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
26241 (ipa_propagate_frequency): Likewise.
26242 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
26243 (remove_described_reference): Likewise.
26244 * ipa-pure-const.c (worse_state): Likewise.
26245 (check_retval_uses): Likewise.
26246 (analyze_function): Likewise.
26247 (propagate_pure_const): Likewise.
26248 (propagate_nothrow): Likewise.
26249 (dump_malloc_lattice): Likewise.
26250 (propagate_malloc): Likewise.
26251 (pass_local_pure_const::execute): Likewise.
26252 * ipa-visibility.c (optimize_weakref): Likewise.
26253 (function_and_variable_visibility): Likewise.
26254 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
26255 (ipa_discover_variable_flags): Likewise.
26256 * lto-streamer-out.c (output_function): Likewise.
26257 (output_constructor): Likewise.
26258 * tree-inline.c (copy_bb): Likewise.
26259 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
26260 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
26262 2020-01-08 Richard Biener <rguenther@suse.de>
26264 PR middle-end/93199
26265 * tree-eh.c (sink_clobbers): Update virtual operands for
26266 the first and last stmt only. Add a dry-run capability.
26267 (pass_lower_eh_dispatch::execute): Perform clobber sinking
26268 after CFG manipulations and in RPO order to catch all
26269 secondary opportunities reliably.
26271 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
26274 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
26276 2019-01-08 Richard Biener <rguenther@suse.de>
26278 PR middle-end/93199
26279 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
26280 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
26281 virtual operand, also updating SSA use.
26282 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
26283 Update stmt after resetting virtual operand.
26284 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
26285 * gimple-iterator.c (gsi_remove): When not removing the stmt
26286 permanently do not delink immediate uses or mark the stmt modified.
26288 2020-01-08 Martin Liska <mliska@suse.cz>
26290 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
26291 (ipa_call_context::estimate_size_and_time): Likewise.
26292 (inline_analyze_function): Likewise.
26294 2020-01-08 Martin Liska <mliska@suse.cz>
26296 * cgraph.c (cgraph_node::dump): Use systematically
26299 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
26301 Add -nodevicespecs option for avr.
26304 * config/avr/avr.opt (-nodevicespecs): New driver option.
26305 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
26306 "-specs=device-specs/..." if that option is not set.
26307 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
26309 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
26311 Implement 64-bit double functions for avr.
26314 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
26315 --with-double-comparison.
26316 * doc/install.texi: Document them.
26317 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
26318 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
26319 <WITH_DOUBLE_COMPARISON>: New built-in defines.
26320 * doc/invoke.texi (AVR Built-in Macros): Document them.
26321 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
26322 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
26323 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
26325 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
26328 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
26329 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
26330 when only building rm-profile multilibs.
26332 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
26335 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
26336 lattice for a value to check.
26337 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
26338 finite propagation in self-recursive scc.
26340 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
26342 * ipa-inline.c (caller_growth_limits): Restore the AND.
26344 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
26346 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
26347 (VEC_ALLREG_ALT): New iterator.
26348 (VEC_ALLREG_INT_MODE): New iterator.
26349 (VCMP_MODE): New iterator.
26350 (VCMP_MODE_INT): New iterator.
26351 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
26352 (vec_cmp<u>v64qidi): New define_expand.
26353 (vec_cmp<mode>di_exec): Use VCMP_MODE.
26354 (vec_cmpu<mode>di_exec): New define_expand.
26355 (vec_cmp<u>v64qidi_exec): New define_expand.
26356 (vec_cmp<mode>di_dup): Use VCMP_MODE.
26357 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
26358 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
26359 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
26360 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
26361 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
26362 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
26363 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
26364 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
26365 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
26367 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
26368 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
26370 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
26372 * config/gcn/constraints.md (DA): Update description and match.
26374 (Db): New constraint.
26375 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
26377 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
26378 Implement 'Db' mixed immediate type.
26379 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
26380 (addcv64si3_dup<exec_vcc>): Delete.
26381 (subcv64si3<exec_vcc>): Rework constraints.
26382 (addv64di3): Rework constraints.
26383 (addv64di3_exec): Rework constraints.
26384 (subv64di3): Rework constraints.
26385 (addv64di3_dup): Delete.
26386 (addv64di3_dup_exec): Delete.
26387 (addv64di3_zext): Rework constraints.
26388 (addv64di3_zext_exec): Rework constraints.
26389 (addv64di3_zext_dup): Rework constraints.
26390 (addv64di3_zext_dup_exec): Rework constraints.
26391 (addv64di3_zext_dup2): Rework constraints.
26392 (addv64di3_zext_dup2_exec): Rework constraints.
26393 (addv64di3_sext_dup2): Rework constraints.
26394 (addv64di3_sext_dup2_exec): Rework constraints.
26396 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
26398 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
26399 existing target checks.
26401 2020-01-07 Richard Biener <rguenther@suse.de>
26403 * doc/install.texi: Bump minimal supported MPC version.
26405 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
26407 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
26408 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
26409 * langhooks.c: Include stor-layout.h.
26410 (lhd_simulate_enum_decl): New function.
26411 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
26412 handle_arm_sve_h for the LTO frontend.
26413 (register_vector_type): Cope with null returns from pushdecl.
26415 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
26417 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
26418 (aarch64_sve::nvectors_if_data_type): Replace with...
26419 (aarch64_sve::builtin_type_p): ...this.
26420 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
26421 (find_vector_type): Delete.
26422 (add_sve_type_attribute): New function.
26423 (lookup_sve_type_attribute): Likewise.
26424 (register_builtin_types): Add an "SVE type" attribute to each type.
26425 (register_tuple_type): Likewise.
26426 (svbool_type_p, nvectors_if_data_type): Delete.
26427 (mangle_builtin_type): Use lookup_sve_type_attribute.
26428 (builtin_type_p): Likewise. Add an overload that returns the
26429 number of constituent vector and predicate registers.
26430 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
26431 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
26432 instead of aarch64_sve_argument_p.
26433 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
26434 (aarch64_pass_by_reference): Likewise.
26435 (aarch64_function_value_1): Likewise.
26436 (aarch64_return_in_memory): Likewise.
26437 (aarch64_layout_arg): Likewise.
26439 2020-01-07 Jakub Jelinek <jakub@redhat.com>
26441 PR tree-optimization/93156
26442 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
26443 least significant bit is always clear.
26445 PR tree-optimization/93118
26446 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
26447 simplifier with two intermediate conversions.
26449 2020-01-07 Martin Liska <mliska@suse.cz>
26451 * params.opt: Add Optimization for various parameters.
26453 2020-01-07 Martin Liska <mliska@suse.cz>
26456 * doc/extend.texi: Explain cloning for target_clone
26459 2020-01-07 Martin Liska <mliska@suse.cz>
26461 PR tree-optimization/92860
26462 * common.opt: Make in Optimization option
26463 as it is affected by -O0, which is an Optimization
26465 * tree-inline.c (tree_inlinable_function_p):
26466 Use opt_for_fn for warn_inline.
26467 (expand_call_inline): Likewise.
26469 2020-01-07 Martin Liska <mliska@suse.cz>
26471 PR tree-optimization/92860
26472 * common.opt: Make flag_ree as optimization
26475 2020-01-07 Martin Liska <mliska@suse.cz>
26477 PR optimization/92860
26478 * params.opt: Mark param_min_crossjump_insns with Optimization
26481 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
26483 * ipa-inline-analysis.c (estimate_growth): Fix typo.
26484 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
26486 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
26488 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
26489 helper function to return the valid addressing formats for a given
26490 hard register and mode.
26491 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
26493 * config/rs6000/constraints.md (Q constraint): Update
26495 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
26498 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
26499 Use 'Q' for doing vector extract from memory.
26500 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
26502 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
26503 doing vector extract from memory.
26504 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
26505 extract from memory.
26507 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
26508 for the offset being 34-bits when -mcpu=future is used.
26510 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
26512 * config/pa/pa.md: Revert change to use ordered_comparison_operator
26513 instead of cmpib_comparison_operator in cmpib patterns.
26514 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
26515 of cmpib_comparison_operator. Revise comment.
26517 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26519 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
26520 in an IFN_DIV_POW2 node to be equal.
26522 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26524 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
26525 (vect_check_scalar_mask): ...this.
26526 (vectorizable_store, vectorizable_load): Update call accordingly.
26527 (vectorizable_call): Use vect_check_scalar_mask to check the mask
26528 argument in calls to conditional internal functions.
26530 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
26532 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
26533 '0' matching inputs.
26534 (subv64di3_exec): Likewise.
26536 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
26538 * config/mips/mips.c (vr4130_align_insns): Fix typo.
26539 * doc/md.texi (movstr): Likewise.
26541 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
26543 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
26546 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26548 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
26550 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
26551 to a temporary file and use move-if-change to update the real
26552 file where necessary.
26554 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26556 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
26557 rather than Upa for CPY /M.
26559 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
26561 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
26564 2020-01-06 Martin Liska <mliska@suse.cz>
26566 PR tree-optimization/92860
26567 * params.opt: Mark param_max_combine_insns with Optimization
26570 2020-01-05 Jakub Jelinek <jakub@redhat.com>
26573 * config/i386/i386.md (SWIDWI): New mode iterator.
26574 (DWI, dwi): Add TImode variants.
26575 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
26576 <general_hilo_operand> instead of <general_operand>. Use
26577 CONST_SCALAR_INT_P instead of CONST_INT_P.
26578 (*addv<mode>4_1): Rename to ...
26579 (addv<mode>4_1): ... this.
26580 (QWI): New mode attribute.
26581 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
26582 define_insn_and_split patterns.
26583 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
26585 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
26586 <general_hilo_operand> instead of <general_operand>.
26587 (*addcarry<mode>_1): New define_insn.
26588 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
26590 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
26592 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
26593 Use "call" instead of "set".
26595 2020-01-03 Martin Jambor <mjambor@suse.cz>
26598 * ipa-cp.c (print_all_lattices): Skip functions without info.
26600 2020-01-03 Jakub Jelinek <jakub@redhat.com>
26603 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
26604 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
26605 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
26606 for 'e' simd clones.
26609 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
26611 (mprefer-vector-width=): Add Save.
26612 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
26613 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
26614 (ix86_debug_options, ix86_function_specific_print): Adjust
26615 ix86_target_string callers.
26616 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
26617 (ix86_valid_target_attribute_tree): Likewise.
26618 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
26619 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
26620 ix86_target_string caller.
26623 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
26624 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
26625 instead of gen_int_shift_amount + convert_modes.
26627 PR rtl-optimization/93088
26628 * loop-iv.c (find_single_def_src): Punt after looking through
26629 128 reg copies for regs with single definitions. Move definitions
26632 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
26634 * config/arm/arm-c.c (arm_cpu_builtins): Define
26635 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
26636 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
26637 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
26638 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
26639 * config/arm/arm-tables.opt: Regenerated.
26640 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
26641 arm_arch_i8mm and arm_arch_bf16 when enabled.
26642 * config/arm/arm.h (TARGET_I8MM): New macro.
26643 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
26644 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
26645 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
26646 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
26647 (v8_6_a_simd_variants): New.
26648 (v8_*_a_simd_variants): Add i8mm and bf16.
26649 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
26651 2020-01-02 Jakub Jelinek <jakub@redhat.com>
26654 * predict.c (compute_function_frequency): Don't call
26655 warn_function_cold on functions that already have cold attribute.
26657 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
26660 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
26661 COMDAT group function labels in .data.rel.ro.local section.
26662 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
26665 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
26666 comparison_operator in B and S integer comparisons. Likewise, use
26667 ordered_comparison_operator instead of cmpib_comparison_operator in
26669 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
26671 2020-01-01 Jakub Jelinek <jakub@redhat.com>
26673 Update copyright years.
26675 * gcc.c (process_command): Update copyright notice dates.
26676 * gcov-dump.c (print_version): Ditto.
26677 * gcov.c (print_version): Ditto.
26678 * gcov-tool.c (print_version): Ditto.
26679 * gengtype.c (create_file): Ditto.
26680 * doc/cpp.texi: Bump @copying's copyright year.
26681 * doc/cppinternals.texi: Ditto.
26682 * doc/gcc.texi: Ditto.
26683 * doc/gccint.texi: Ditto.
26684 * doc/gcov.texi: Ditto.
26685 * doc/install.texi: Ditto.
26686 * doc/invoke.texi: Ditto.
26688 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
26690 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
26693 2020-01-01 Jakub Jelinek <jakub@redhat.com>
26695 PR tree-optimization/93098
26696 * match.pd (popcount): For shift amounts, use integer_onep
26697 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
26698 tests. Make sure that precision is power of two larger than or equal
26699 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
26700 instead of ULL suffixed constants. Formatting fixes.
26702 Copyright (C) 2020 Free Software Foundation, Inc.
26704 Copying and distribution of this file, with or without modification,
26705 are permitted in any medium without royalty provided the copyright
26706 notice and this notice are preserved.