1 2020-09-11 Michael Meissner <meissner@linux.ibm.com>
3 * config/rs6000/rs6000.c (rs6000_maybe_emit_maxc_minc): Rename
4 from rs6000_emit_p9_fp_minmax. Change return type to bool. Add
5 comments to document NaN/signed zero behavior.
6 (rs6000_maybe_emit_fp_cmove): Rename from rs6000_emit_p9_fp_cmove.
7 (have_compare_and_set_mask): New helper function.
8 (rs6000_emit_cmove): Update calls to new names and the new helper
11 2020-09-11 Nathan Sidwell <nathan@acm.org>
13 * config/i386/sse.md (mov<mode>): Fix operand indices.
15 2020-09-11 Martin Sebor <msebor@redhat.com>
18 * builtins.c (compute_objsize): Remove incorrect offset adjustment.
19 (compute_objsize): Adjust offset range here instead.
21 2020-09-11 Richard Biener <rguenther@suse.de>
23 PR tree-optimization/97020
24 * tree-vect-slp.c (vect_slp_analyze_operations): Apply
25 SLP costs when doing loop vectorization.
27 2020-09-11 Tom de Vries <tdevries@suse.de>
30 * config/nvptx/nvptx.md (define_expand "atomic_test_and_set"): New
33 2020-09-11 Andrew Stubbs <ams@codesourcery.com>
35 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align TImode registers.
36 * config/gcn/gcn.md: Assert that TImode registers do not early clobber.
38 2020-09-11 Richard Biener <rguenther@suse.de>
40 * tree-vectorizer.h (_slp_instance::location): New method.
41 (vect_schedule_slp): Adjust prototype.
42 * tree-vectorizer.c (vec_info::remove_stmt): Adjust
43 the BB region begin if we removed the stmt it points to.
44 * tree-vect-loop.c (vect_transform_loop): Adjust.
45 * tree-vect-slp.c (_slp_instance::location): Implement.
46 (vect_analyze_slp_instance): For BB vectorization set
47 vect_location to that of the instance.
48 (vect_slp_analyze_operations): Likewise.
49 (vect_bb_vectorization_profitable_p): Remove wrapper.
50 (vect_slp_analyze_bb_1): Remove cost check here.
51 (vect_slp_region): Cost check and code generate subgraphs separately,
52 report optimized locations and missed optimizations due to
53 profitability for each of them.
54 (vect_schedule_slp): Get the vector of SLP graph entries to
55 vectorize as argument.
57 2020-09-11 Richard Biener <rguenther@suse.de>
59 PR tree-optimization/97013
60 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove duplicate dumping.
62 2020-09-11 Richard Biener <rguenther@suse.de>
64 * tree-vect-slp.c (vect_build_slp_tree_1): Check vector
65 types for all lanes are compatible.
66 (vect_analyze_slp_instance): Appropriately check for stores.
67 (vect_schedule_slp): Likewise.
69 2020-09-11 Tom de Vries <tdevries@suse.de>
71 * config/nvptx/nvptx.c (nvptx_assemble_value): Fix undefined
74 2020-09-11 Tom de Vries <tdevries@suse.de>
76 * config/nvptx/nvptx.c (nvptx_assemble_value): Handle negative
79 2020-09-11 Aaron Sawdey <acsawdey@linux.ibm.com>
81 * config/rs6000/rs6000.c (rs6000_option_override_internal):
84 2020-09-10 Michael Meissner <meissner@linux.ibm.com>
86 * config/rs6000/rs6000-protos.h (rs6000_emit_cmove): Change return
88 (rs6000_emit_int_cmove): Change return type to bool.
89 * config/rs6000/rs6000.c (rs6000_emit_cmove): Change return type
91 (rs6000_emit_int_cmove): Change return type to bool.
93 2020-09-10 Tom de Vries <tdevries@suse.de>
96 * config/nvptx/nvptx.c (nvptx_assemble_value): Handle shift by
97 number of bits in shift operand.
99 2020-09-10 Jakub Jelinek <jakub@redhat.com>
101 * lto-streamer-out.c (collect_block_tree_leafs): Recurse on
102 root rather than BLOCK_SUBBLOCKS (root).
104 2020-09-10 Alex Coplan <alex.coplan@arm.com>
106 * config/aarch64/aarch64-cores.def: Add Cortex-R82.
107 * config/aarch64/aarch64-tune.md: Regenerate.
108 * doc/invoke.texi: Add entry for Cortex-R82.
110 2020-09-10 Alex Coplan <alex.coplan@arm.com>
112 * common/config/aarch64/aarch64-common.c
113 (aarch64_get_extension_string_for_isa_flags): Don't force +crc for
115 * config/aarch64/aarch64-arches.def: Add entry for Armv8-R.
116 * config/aarch64/aarch64-c.c (aarch64_define_unconditional_macros): Set
117 __ARM_ARCH_PROFILE correctly for Armv8-R.
118 * config/aarch64/aarch64.h (AARCH64_FL_V8_R): New.
119 (AARCH64_FL_FOR_ARCH8_R): New.
120 (AARCH64_ISA_V8_R): New.
121 * doc/invoke.texi: Add Armv8-R to architecture table.
123 2020-09-10 Jakub Jelinek <jakub@redhat.com>
125 * config/arm/arm.c (arm_override_options_after_change_1): Add opts_set
126 argument, test opts_set->x_str_align_functions rather than
127 opts->x_str_align_functions.
128 (arm_override_options_after_change, arm_option_override_internal,
129 arm_set_current_function): Adjust callers.
131 2020-09-10 Jakub Jelinek <jakub@redhat.com>
134 * config/arm/arm.c (arm_override_options_after_change): Don't call
135 arm_configure_build_target here.
136 (arm_set_current_function): Call arm_override_options_after_change_1
139 2020-09-10 Pat Haugen <pthaugen@linux.ibm.com>
141 * config/rs6000/rs6000.md
142 (lfiwzx, floatunssi<mode>2_lfiwzx, p8_mtvsrwz, p8_mtvsrd_sf): Fix insn
144 * config/rs6000/vsx.md
145 (vsx_concat_<mode>, vsx_splat_<mode>_reg, vsx_splat_v4sf): Likewise.
147 2020-09-10 Jonathan Yong <10walls@gmail.com>
149 * config.host: Adjust plugin name for Windows.
151 2020-09-10 Tom de Vries <tdevries@suse.de>
153 PR tree-optimization/97000
154 * tree-cfgcleanup.c (cleanup_call_ctrl_altering_flag): Don't clear
157 2020-09-10 Jakub Jelinek <jakub@redhat.com>
160 * lto-streamer.h (struct output_block): Add emit_pwd member.
161 * lto-streamer-out.c: Include toplev.h.
162 (clear_line_info): Set emit_pwd.
163 (lto_output_location_1): Encode the ob->current_file != xloc.file
164 bit directly into the location number. If changing file, emit
165 additionally a bit whether pwd is emitted and emit it before the
166 first relative pathname since clear_line_info.
167 (output_function, output_constructor): Don't call clear_line_info
169 * lto-streamer-in.c (struct string_pair_map): New type.
170 (struct string_pair_map_hasher): New type.
171 (string_pair_map_hasher::hash): New method.
172 (string_pair_map_hasher::equal): New method.
173 (path_name_pair_hash_table, string_pair_map_allocator): New variables.
174 (relative_path_prefix, canon_relative_path_prefix,
175 canon_relative_file_name): New functions.
176 (canon_file_name): Add relative_prefix argument, if non-NULL
177 and string is a relative path, return canon_relative_file_name.
178 (lto_location_cache::input_location_and_block): Decode file change
179 bit from the location number. If changing file, unpack bit whether
180 pwd is streamed and stream in pwd. Adjust canon_file_name caller.
181 (lto_free_file_name_hash): Delete path_name_pair_hash_table
182 and string_pair_map_allocator.
184 2020-09-10 Richard Biener <rguenther@suse.de>
186 PR tree-optimization/96043
187 * tree-vectorizer.h (_slp_instance::cost_vec): New.
188 (_slp_instance::subgraph_entries): Likewise.
189 (BB_VINFO_TARGET_COST_DATA): Remove.
190 * tree-vect-slp.c (vect_free_slp_instance): Free
191 cost_vec and subgraph_entries.
192 (vect_analyze_slp_instance): Initialize them.
193 (vect_slp_analyze_operations): Defer passing costs to
194 the target, instead record them in the SLP graph entry.
195 (get_ultimate_leader): New helper for graph partitioning.
196 (vect_bb_partition_graph_r): Likewise.
197 (vect_bb_partition_graph): New function to partition the
198 SLP graph into independently costable parts.
199 (vect_bb_vectorization_profitable_p): Adjust to work on
201 (vect_bb_vectorization_profitable_p): New wrapper,
202 discarding non-profitable vectorization of subgraphs.
203 (vect_slp_analyze_bb_1): Call vect_bb_partition_graph before
206 2020-09-09 David Malcolm <dmalcolm@redhat.com>
209 * doc/invoke.texi: Document -Wanalyzer-mismatching-deallocation.
211 2020-09-09 Segher Boessenkool <segher@kernel.crashing.org>
213 PR rtl-optimization/96475
214 * bb-reorder.c (maybe_duplicate_computed_goto): Remove single_pred_p
217 2020-09-09 Tom de Vries <tdevries@suse.de>
219 * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Fix Wformat
222 2020-09-09 Richard Biener <rguenther@suse.de>
224 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
225 nothing when the permutation doesn't permute.
227 2020-09-09 Tom de Vries <tdevries@suse.de>
230 * config/nvptx/nvptx.c (write_fn_proto): Fix boolean type check.
232 2020-09-09 Richard Biener <rguenther@suse.de>
234 * tree-vect-stmts.c (vectorizable_comparison): Allow
235 STMT_VINFO_LIVE_P stmts.
237 2020-09-09 Richard Biener <rguenther@suse.de>
239 * tree-vect-stmts.c (vectorizable_condition): Allow
240 STMT_VINFO_LIVE_P stmts.
242 2020-09-09 Richard Biener <rguenther@suse.de>
244 PR tree-optimization/96978
245 * tree-vect-stmts.c (vectorizable_condition): Do not
246 look at STMT_VINFO_LIVE_P for BB vectorization.
247 (vectorizable_comparison): Likewise.
249 2020-09-09 liuhongt <hongtao.liu@intel.com>
252 * config/i386/i386.md (get_thread_pointer<mode>): New
255 2020-09-08 Julian Brown <julian@codesourcery.com>
257 * config/gcn/gcn-valu.md (scatter<mode>_insn_1offset_ds<exec_scatter>):
259 * config/gcn/gcn.md (*mov<mode>_insn, *movti_insn): Add waitcnt to
260 ds_write alternatives.
262 2020-09-08 Julian Brown <julian@codesourcery.com>
264 * config/gcn/mkoffload.c (process_asm): Initialise regcount. Update
265 scanning for SGPR/VGPR usage for HSACO v3.
267 2020-09-08 Aldy Hernandez <aldyh@redhat.com>
269 PR tree-optimization/96967
270 * tree-vrp.c (find_case_label_range): Cast label range to
271 type of switch operand.
273 2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com>
275 * config/msp430/msp430.c (msp430_file_end): Fix jumbled
276 HAVE_AS_MSPABI_ATTRIBUTE and HAVE_AS_GNU_ATTRIBUTE checks.
277 * configure: Regenerate.
278 * configure.ac: Use ".mspabi_attribute 4,2" to check for assembler
279 support for this object attribute directive.
281 2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com>
283 * common/config/msp430/msp430-common.c (msp430_handle_option): Remove
285 Set target_cpu value to new enum values when parsing certain -mmcu=
287 * config/msp430/msp430-opts.h (enum msp430_cpu_types): New.
288 * config/msp430/msp430.c (msp430_option_override): Handle new
289 target_cpu enum values.
290 Set target_cpu using extracted value for given MCU when -mcpu=
291 option is not passed by the user.
292 * config/msp430/msp430.opt: Handle -mcpu= values using enums.
294 2020-09-07 Richard Sandiford <richard.sandiford@arm.com>
296 PR rtl-optimization/96796
297 * lra-constraints.c (in_class_p): Add a default-false
298 allow_all_reload_class_changes_p parameter. Do not treat
299 reload moves specially when the parameter is true.
300 (get_reload_reg): Try to narrow the class of an existing OP_OUT
301 reload if we're reloading a reload pseudo in a reload instruction.
303 2020-09-07 Andrea Corallo <andrea.corallo@arm.com>
305 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Revert
306 dead-code removal introduced by 09fa6acd8d9 + add a comment to
309 2020-09-07 Jozef Lawrynowicz <jozef.l@mittosystems.com>
311 * doc/rtl.texi (subreg): Fix documentation to state there is a known
312 number of undefined bits in regs and subregs of MODE_PARTIAL_INT modes.
314 2020-09-07 Jozef Lawrynowicz <jozef.l@mittosystems.com>
316 * config/msp430/msp430.c (msp430_option_override): Don't set the
317 ISA to 430 when the MCU is unrecognized.
319 2020-09-07 Iain Sandoe <iain@sandoe.co.uk>
321 * config/darwin.c (darwin_libc_has_function): Report sincos
324 2020-09-07 Alex Coplan <alex.coplan@arm.com>
326 * config/aarch64/aarch64.md (*adds_mul_imm_<mode>): Delete.
327 (*subs_mul_imm_<mode>): Delete.
328 (*adds_<optab><mode>_multp2): Delete.
329 (*subs_<optab><mode>_multp2): Delete.
330 (*add_mul_imm_<mode>): Delete.
331 (*add_<optab><ALLX:mode>_mult_<GPI:mode>): Delete.
332 (*add_<optab><SHORT:mode>_mult_si_uxtw): Delete.
333 (*add_<optab><mode>_multp2): Delete.
334 (*add_<optab>si_multp2_uxtw): Delete.
335 (*add_uxt<mode>_multp2): Delete.
336 (*add_uxtsi_multp2_uxtw): Delete.
337 (*sub_mul_imm_<mode>): Delete.
338 (*sub_mul_imm_si_uxtw): Delete.
339 (*sub_<optab><mode>_multp2): Delete.
340 (*sub_<optab>si_multp2_uxtw): Delete.
341 (*sub_uxt<mode>_multp2): Delete.
342 (*sub_uxtsi_multp2_uxtw): Delete.
343 (*neg_mul_imm_<mode>2): Delete.
344 (*neg_mul_imm_si2_uxtw): Delete.
345 * config/aarch64/predicates.md (aarch64_pwr_imm3): Delete.
346 (aarch64_pwr_2_si): Delete.
347 (aarch64_pwr_2_di): Delete.
349 2020-09-07 Alex Coplan <alex.coplan@arm.com>
351 * config/aarch64/aarch64.md
352 (*adds_<optab><ALLX:mode>_<GPI:mode>): Ensure extended operand
353 agrees with width of extension specifier.
354 (*subs_<optab><ALLX:mode>_<GPI:mode>): Likewise.
355 (*adds_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise.
356 (*subs_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise.
357 (*add_<optab><ALLX:mode>_<GPI:mode>): Likewise.
358 (*add_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
359 (*add_uxt<mode>_shift2): Likewise.
360 (*sub_<optab><ALLX:mode>_<GPI:mode>): Likewise.
361 (*sub_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
362 (*sub_uxt<mode>_shift2): Likewise.
363 (*cmp_swp_<optab><ALLX:mode>_reg<GPI:mode>): Likewise.
364 (*cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
366 2020-09-07 Richard Biener <rguenther@suse.de>
368 * tree-vect-slp.c (vect_analyze_slp_instance): Dump
369 stmts we start SLP analysis from, failure and splitting.
370 (vect_schedule_slp): Dump SLP graph entry and root stmt
371 we are about to emit code for.
373 2020-09-07 Martin Storsjö <martin@martin.st>
375 * dwarf2out.c (file_name_acquire): Make a strchr return value
378 2020-09-07 Jakub Jelinek <jakub@redhat.com>
381 * lto-streamer-out.c (output_cfg): Also stream goto_locus for edges.
382 Use bp_pack_var_len_unsigned instead of streamer_write_uhwi to stream
383 e->dest->index and e->flags.
384 (output_function): Call output_cfg before output_ssa_name, rather than
385 after streaming all bbs.
386 * lto-streamer-in.c (input_cfg): Stream in goto_locus for edges.
387 Use bp_unpack_var_len_unsigned instead of streamer_read_uhwi to stream
388 in dest_index and edge_flags.
390 2020-09-07 Richard Biener <rguenther@suse.de>
392 * tree-vectorizer.h (vectorizable_live_operation): Adjust.
393 * tree-vect-loop.c (vectorizable_live_operation): Vectorize
394 live lanes out of basic-block vectorization nodes.
395 * tree-vect-slp.c (vect_bb_slp_mark_live_stmts): New function.
396 (vect_slp_analyze_operations): Analyze live lanes and their
397 vectorization possibility after the whole SLP graph is final.
398 (vect_bb_slp_scalar_cost): Adjust for vectorized live lanes.
399 * tree-vect-stmts.c (can_vectorize_live_stmts): Adjust.
400 (vect_transform_stmt): Call can_vectorize_live_stmts also for
401 basic-block vectorization.
403 2020-09-04 Richard Biener <rguenther@suse.de>
405 PR tree-optimization/96698
406 PR tree-optimization/96920
407 * tree-vectorizer.h (loop_vec_info::reduc_latch_defs): Remove.
408 (loop_vec_info::reduc_latch_slp_defs): Likewise.
409 * tree-vect-stmts.c (vect_transform_stmt): Remove vectorized
410 cycle PHI latch code.
411 * tree-vect-loop.c (maybe_set_vectorized_backedge_value): New
412 helper to set vectorized cycle PHI latch values.
413 (vect_transform_loop): Walk over all PHIs again after
414 vectorizing them, calling maybe_set_vectorized_backedge_value.
415 Call maybe_set_vectorized_backedge_value for each vectorized
416 stmt. Remove delayed update code.
417 * tree-vect-slp.c (vect_analyze_slp_instance): Initialize
418 SLP instance reduc_phis member.
419 (vect_schedule_slp): Set vectorized cycle PHI latch values.
421 2020-09-04 Andrea Corallo <andrea.corallo@arm.com>
423 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Remove
424 dead code as LOOP_VINFO_USING_PARTIAL_VECTORS_P (loop_vinfo) is
427 2020-09-04 Christophe Lyon <christophe.lyon@linaro.org>
430 * config/arm/thumb1.md: Move movsi splitter for
431 arm_disable_literal_pool after the other movsi splitters.
433 2020-09-04 Aldy Hernandez <aldyh@redhat.com>
435 * range-op.cc (range_operator::fold_range): Rename widest_irange
437 (operator_div::wi_fold): Same.
438 (operator_lshift::op1_range): Same.
439 (operator_rshift::op1_range): Same.
440 (operator_cast::fold_range): Same.
441 (operator_cast::op1_range): Same.
442 (operator_bitwise_and::remove_impossible_ranges): Same.
443 (operator_bitwise_and::op1_range): Same.
444 (operator_abs::op1_range): Same.
446 (widest_irange_tests): Same.
447 (range3_tests): Rename irange3 to int_range3.
448 (int_range_max_tests): Rename from widest_irange_tests.
449 Rename widest_irange to int_range_max.
450 (operator_tests): Rename widest_irange to int_range_max.
452 * tree-vrp.c (find_case_label_range): Same.
453 * value-range.cc (irange::irange_intersect): Same.
454 (irange::invert): Same.
455 * value-range.h: Same.
457 2020-09-04 Richard Biener <rguenther@suse.de>
459 PR tree-optimization/96931
460 * tree-cfgcleanup.c (cleanup_call_ctrl_altering_flag): If
461 there's a fallthru edge and no abnormal edge the call is
462 no longer control-altering.
463 (cleanup_control_flow_bb): Pass down the BB to
464 cleanup_call_ctrl_altering_flag.
466 2020-09-04 Jakub Jelinek <jakub@redhat.com>
468 * lto-streamer.h (stream_input_location_now): Remove declaration.
469 * lto-streamer-in.c (stream_input_location_now): Remove.
470 (input_eh_region, input_struct_function_base): Use
471 stream_input_location instead of stream_input_location_now.
473 2020-09-04 Jakub Jelinek <jakub@redhat.com>
475 * lto-streamer.h (struct output_block): Add reset_locus member.
476 * lto-streamer-out.c (clear_line_info): Set reset_locus to true.
477 (lto_output_location_1): If reset_locus, clear it and ensure
478 current_{file,line,col} is different from xloc members.
480 2020-09-04 David Faust <david.faust@oracle.com>
482 * config/bpf/bpf.h (ASM_SPEC): Pass -mxbpf to gas, if specified.
483 * config/bpf/bpf.c (bpf_output_call): Support indirect calls in xBPF.
485 2020-09-03 Martin Jambor <mjambor@suse.cz>
487 PR tree-optimization/96820
488 * tree-sra.c (create_access): Disqualify candidates with accesses
489 beyond the end of the original aggregate.
490 (maybe_add_sra_candidate): Check that candidate type size fits
491 signed uhwi for the sake of consistency.
493 2020-09-03 Will Schmidt <will_schmidt@vnet.ibm.com>
495 * config/rs6000/rs6000-call.c (rs6000_init_builtin): Update V2DI_type_node
496 and unsigned_V2DI_type_node definitions.
498 2020-09-03 Jakub Jelinek <jakub@redhat.com>
501 * tree.h (struct decl_tree_traits): New type.
502 (decl_tree_map): New typedef.
504 2020-09-03 Jakub Jelinek <jakub@redhat.com>
507 * gimple.h (gimple_location_ptr, gimple_phi_arg_location_ptr): New
509 * streamer-hooks.h (struct streamer_hooks): Add
510 output_location_and_block callback. Fix up formatting for
512 (stream_output_location_and_block): Define.
513 * lto-streamer.h (class lto_location_cache): Fix comment typo. Add
514 current_block member.
515 (lto_location_cache::input_location_and_block): New method.
516 (lto_location_cache::lto_location_cache): Initialize current_block.
517 (lto_location_cache::cached_location): Add block member.
518 (struct output_block): Add current_block member.
519 (lto_output_location): Formatting fix.
520 (lto_output_location_and_block): Declare.
521 * lto-streamer.c (lto_streamer_hooks_init): Initialize
522 streamer_hooks.output_location_and_block.
523 * lto-streamer-in.c (lto_location_cache::cmp_loc): Also compare
525 (lto_location_cache::apply_location_cache): Handle blocks.
526 (lto_location_cache::accept_location_cache,
527 lto_location_cache::revert_location_cache): Fix up function comments.
528 (lto_location_cache::input_location_and_block): New method.
529 (lto_location_cache::input_location): Implement using
530 input_location_and_block.
531 (input_function): Invoke apply_location_cache after streaming in all
533 * lto-streamer-out.c (clear_line_info): Set current_block.
534 (lto_output_location_1): New function, moved from lto_output_location,
535 added block handling.
536 (lto_output_location): Implement using lto_output_location_1.
537 (lto_output_location_and_block): New function.
538 * gimple-streamer-in.c (input_phi): Use input_location_and_block
539 to input and cache both location and block.
540 (input_gimple_stmt): Likewise.
541 * gimple-streamer-out.c (output_phi): Use
542 stream_output_location_and_block.
543 (output_gimple_stmt): Likewise.
545 2020-09-03 Richard Biener <rguenther@suse.de>
547 * tree-vect-generic.c (tree_vec_extract): Remove odd
548 special-casing of boolean vectors.
549 * fold-const.c (fold_ternary_loc): Handle boolean vector
552 2020-09-03 Hongtao Liu <hongtao.liu@intel.com>
555 * config/i386/i386-features.c
556 (replace_constant_pool_with_broadcast): New function.
557 (constant_pool_broadcast): Ditto.
558 (class pass_constant_pool_broadcast): New pass.
559 (make_pass_constant_pool_broadcast): Ditto.
560 (remove_partial_avx_dependency): Call
561 replace_constant_pool_with_broadcast under TARGET_AVX512F, it
562 would save compile time when both pass rpad and cpb are
564 (remove_partial_avx_dependency_gate): New function.
565 (class pass_remove_partial_avx_dependency::gate): Call
566 remove_partial_avx_dependency_gate.
567 * config/i386/i386-passes.def: Insert new pass after combine.
568 * config/i386/i386-protos.h
569 (make_pass_constant_pool_broadcast): Declare.
570 * config/i386/sse.md (*avx512dq_mul<mode>3<mask_name>_bcst):
572 (*avx512f_mul<mode>3<mask_name>_bcst): Ditto.
573 * config/i386/avx512fintrin.h (_mm512_set1_ps,
574 _mm512_set1_pd,_mm512_set1_epi32, _mm512_set1_epi64): Adjusted.
576 2020-09-02 Jonathan Wakely <jwakely@redhat.com>
579 * ginclude/stdbool.h (bool, false, true): Never define for C++.
581 2020-09-02 Jozef Lawrynowicz <jozef.l@mittosystems.com>
583 * doc/invoke.texi (MSP430 options): Fix -mlarge description to
584 indicate size_t is a 20-bit type.
586 2020-09-02 Roger Sayle <roger@nextmovesoftware.com>
588 * config/pa/pa.c (hppa_rtx_costs) [ASHIFT, ASHIFTRT, LSHIFTRT]:
589 Provide accurate costs for shifts of integer constants.
591 2020-09-02 Jose E. Marchesi <jose.marchesi@oracle.com>
593 * config/bpf/bpf.c (bpf_asm_named_section): Delete.
594 (TARGET_ASM_NAMED_SECTION): Likewise.
596 2020-09-02 Jose E. Marchesi <jemarch@gnu.org>
598 * config.gcc: Use elfos.h in bpf-*-* targets.
599 * config/bpf/bpf.h (MAX_OFILE_ALIGNMENT): Remove definition.
600 (COMMON_ASM_OP): Likewise.
601 (INIT_SECTION_ASM_OP): Likewise.
602 (FINI_SECTION_ASM_OP): Likewise.
603 (ASM_OUTPUT_SKIP): Likewise.
604 (ASM_OUTPUT_ALIGNED_COMMON): Likewise.
605 (ASM_OUTPUT_ALIGNED_LOCAL): Likewise.
607 2020-09-01 Martin Sebor <msebor@redhat.com>
609 * builtins.c (compute_objsize): Only replace the upper bound
610 of a POINTER_PLUS offset when it's less than the lower bound.
612 2020-09-01 Peter Bergner <bergner@linux.ibm.com>
615 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Do not
616 reuse accumulator memory reference for source and destination accesses.
618 2020-09-01 Martin Liska <mliska@suse.cz>
620 * cfgrtl.c (rtl_create_basic_block): Use default value for
621 growth vector function.
622 * gimple.c (gimple_set_bb): Likewise.
623 * symbol-summary.h: Likewise.
624 * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise.
625 (build_gimple_cfg): Likewise.
626 (create_bb): Likewise.
627 (move_block_to_fn): Likewise.
629 2020-09-01 Martin Liska <mliska@suse.cz>
631 * vec.h (vec_safe_grow): Change default of exact to false.
632 (vec_safe_grow_cleared): Likewise.
634 2020-09-01 Roger Sayle <roger@nextmovesoftware.com>
637 * targhooks.c (default_vector_alignment): Return at least the
638 GET_MODE_ALIGNMENT for the type's mode.
640 2020-09-01 Richard Biener <rguenther@suse.de>
642 PR rtl-optimization/96812
643 * tree-ssa-address.c (copy_ref_info): Also copy dependence info.
644 * cfgrtl.h (duplicate_insn_chain): Adjust prototype.
645 * cfgrtl.c (duplicate_insn_chain): Remap dependence info
647 (cfg_layout_duplicate_bb): Make sure we remap dependence info.
648 * modulo-sched.c (duplicate_insns_of_cycles): Remap dependence
650 (generate_prolog_epilog): Adjust.
651 * config/c6x/c6x.c (hwloop_optimize): Remap dependence info.
653 2020-09-01 Kewen Lin <linkw@gcc.gnu.org>
655 * doc/sourcebuild.texi (has_arch_pwr5, has_arch_pwr6, has_arch_pwr7,
656 has_arch_pwr8, has_arch_pwr9): Document.
658 2020-08-31 Carl Love <cel@us.ibm.com>
661 * config/rs6000/altivec.h (vec_popcntb, vec_popcnth, vec_popcntw,
662 vec_popcntd): Remove defines.
664 2020-08-31 Marek Polacek <polacek@redhat.com>
665 Jason Merrill <jason@redhat.com>
668 * tree.c (build_constructor_from_vec): New.
669 * tree.h (build_constructor_from_vec): Declare.
671 2020-08-31 Aldy Hernandez <aldyh@redhat.com>
673 PR tree-optimization/96818
674 * tree-vrp.c (find_case_label_range): Cast label range to
675 type of switch operand.
677 2020-08-31 liuhongt <hongtao.liu@intel.com>
680 * config/i386/sse.md (vec_unpacku_float_hi_v16si): For vector
681 compare to integer mask, don't use gen_rtx_LT, use
682 ix86_expand_mask_vec_cmp instead.
683 (vec_unpacku_float_hi_v16si): Ditto.
685 2020-08-31 Jakub Jelinek <jakub@redhat.com>
687 * tree-cfg.c (verify_gimple_switch): If the first non-default case
688 label has CASE_HIGH, verify it has the same type as CASE_LOW.
690 2020-08-31 Feng Xue <fxue@os.amperecomputing.com>
693 * ipa-cp.c (decide_about_value): Use safe_add to avoid cost addition
696 2020-08-31 Jakub Jelinek <jakub@redhat.com>
699 * varasm.c: Include alloc-pool.h.
700 (output_constant_pool_contents): Emit desc->mark < 0 entries as
702 (struct constant_descriptor_rtx_data): New type.
703 (constant_descriptor_rtx_data_cmp): New function.
704 (struct const_rtx_data_hasher): New type.
705 (const_rtx_data_hasher::hash, const_rtx_data_hasher::equal): New
707 (optimize_constant_pool): New function.
708 (output_shared_constant_pool): Call it if TARGET_SUPPORTS_ALIASES.
710 2020-08-31 Kewen Lin <linkw@gcc.gnu.org>
712 * doc/sourcebuild.texi (vect_len_load_store,
713 vect_partial_vectors_usage_1, vect_partial_vectors_usage_2,
714 vect_partial_vectors): Document.
716 2020-08-30 Martin Sebor <msebor@redhat.com>
718 * builtins.c (access_ref::access_ref): Call get_size_range instead
721 2020-08-30 Jakub Jelinek <jakub@redhat.com>
723 * config/i386/sse.md (ssse3_pshufbv8qi): Use gen_int_mode instead of
724 GEN_INT, and ix86_build_const_vector instead of gen_rtvec and
727 2020-08-29 Bill Schmidt <wschmidt@linux.ibm.com>
729 * config/rs6000/rs6000-builtin.def (MASK_FOR_STORE): Remove.
730 * config/rs6000/rs6000-call.c (rs6000_expand_builtin): Remove
731 all logic for ALTIVEC_BUILTIN_MASK_FOR_STORE.
733 2020-08-28 Martin Sebor <msebor@redhat.com>
735 * attribs.c (init_attr_rdwr_indices): Use global access_mode.
736 * attribs.h (struct attr_access): Same.
737 * builtins.c (fold_builtin_strlen): Add argument.
738 (compute_objsize): Declare.
739 (get_range): Declare.
740 (check_read_access): New function.
741 (access_ref::access_ref): Define ctor.
742 (warn_string_no_nul): Add arguments. Handle -Wstrintop-overread.
743 (check_nul_terminated_array): Handle source strings of different
745 (expand_builtin_strlen): Remove warning code, call check_read_access
746 instead. Declare locals closer to their initialization.
747 (expand_builtin_strnlen): Same.
748 (maybe_warn_for_bound): New function.
749 (warn_for_access): Remove argument. Handle -Wstrintop-overread.
750 (inform_access): Change argument type.
751 (get_size_range): New function.
752 (check_access): Remove unused arguments. Add new arguments. Handle
753 -Wstrintop-overread. Move warning code to helpers and call them.
754 Call check_nul_terminated_array.
755 (check_memop_access): Remove unnecessary and provide additional
757 (expand_builtin_memchr): Call check_read_access.
758 (expand_builtin_strcat): Remove unnecessary and provide additional
760 (expand_builtin_strcpy): Same.
761 (expand_builtin_strcpy_args): Same. Avoid testing no-warning bit.
762 (expand_builtin_stpcpy_1): Remove unnecessary and provide additional
764 (expand_builtin_stpncpy): Same.
765 (check_strncat_sizes): Same.
766 (expand_builtin_strncat): Remove unnecessary and provide additional
767 arguments in calls. Adjust comments.
768 (expand_builtin_strncpy): Remove unnecessary and provide additional
770 (expand_builtin_memcmp): Remove warning code. Call check_access.
771 (expand_builtin_strcmp): Call check_access instead of
772 check_nul_terminated_array.
773 (expand_builtin_strncmp): Handle -Wstrintop-overread.
774 (expand_builtin_fork_or_exec): Call check_access instead of
775 check_nul_terminated_array.
776 (expand_builtin): Same.
777 (fold_builtin_1): Pass additional argument.
778 (fold_builtin_n): Same.
779 (fold_builtin_strpbrk): Remove calls to check_nul_terminated_array.
780 (expand_builtin_memory_chk): Add comments.
781 (maybe_emit_chk_warning): Remove unnecessary and provide additional
783 (maybe_emit_sprintf_chk_warning): Same. Adjust comments.
784 * builtins.h (warn_string_no_nul): Add arguments.
785 (struct access_ref): Add member and ctor argument.
786 (struct access_data): Add members and ctor.
787 (check_access): Adjust signature.
788 * calls.c (maybe_warn_nonstring_arg): Return an indication of
789 whether a warning was issued. Issue -Wstrintop-overread instead
790 of -Wstringop-overflow.
791 (append_attrname): Adjust to naming changes.
792 (maybe_warn_rdwr_sizes): Same. Remove unnecessary and provide
793 additional arguments in calls.
794 * calls.h (maybe_warn_nonstring_arg): Return bool.
795 * doc/invoke.texi (-Wstringop-overread): Document new option.
796 * gimple-fold.c (gimple_fold_builtin_strcpy): Provide an additional
798 (gimple_fold_builtin_stpcpy): Same.
799 * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Adjust to naming
801 * tree.h (enum access_mode): New type.
803 2020-08-28 Bill Schmidt <wschmidt@linux.ibm.com>
805 * config/rs6000/rs6000.c (rs6000_call_aix): Remove test for r12.
806 (rs6000_sibcall_aix): Likewise.
808 2020-08-28 Andrew Stubbs <ams@codesourcery.com>
810 * config/gcn/gcn-tree.c (gcn_goacc_get_worker_red_decl): Add "true"
811 parameter to vec_safe_grow_cleared.
813 2020-08-28 Martin Sebor <msebor@redhat.com>
815 * ggc-common.c (gt_pch_save): Add argument to a call.
817 2020-08-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
820 * config/aarch64/aarch64-sve.md
821 (cond_sub<mode>_relaxed_const): Updated and renamed from
822 cond_sub<mode>_any_const pattern.
823 (cond_sub<mode>_strict_const): New pattern.
825 2020-08-28 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
827 * doc/rtl.texi: Fix typo.
829 2020-08-28 Uros Bizjak <ubizjak@gmail.com>
832 * config/i386/i386-expand.c (split_double_mode): Also handle
833 E_P2HImode and E_P2QImode.
834 * config/i386/sse.md (MASK_DWI): New define_mode_iterator.
835 (mov<mode>): New expander for P2HI,P2QI.
836 (*mov<mode>_internal): New define_insn_and_split to split
837 movement of P2QI/P2HI to 2 movqi/movhi patterns after reload.
839 2020-08-28 liuhongt <hongtao.liu@intel.com>
841 * common/config/i386/i386-common.c (ix86_handle_option): Set
842 AVX512DQ when AVX512VP2INTERSECT exists.
844 2020-08-27 Jakub Jelinek <jakub@redhat.com>
847 * config/i386/i386.c (iamcu_alignment): Don't decrease alignment
848 for TYPE_ATOMIC types.
849 (ix86_local_alignment): Likewise.
850 (ix86_minimum_alignment): Likewise.
851 (x86_field_alignment): Likewise, and emit a -Wpsabi diagnostic
854 2020-08-27 Bill Schmidt <wschmidt@linux.ibm.com>
857 * config/rs6000/rs6000.c (rs6000_sibcall_aix): Support
858 indirect call for ELFv2.
860 2020-08-27 Richard Biener <rguenther@suse.de>
862 PR tree-optimization/96522
863 * tree-ssa-address.c (copy_ref_info): Reset flow-sensitive
864 info of the copied points-to. Transfer bigger alignment
866 * tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt):
867 Reset all flow-sensitive info.
869 2020-08-27 Martin Liska <mliska@suse.cz>
871 * alias.c (init_alias_analysis): Set exact argument of a vector
872 growth function to true.
873 * calls.c (internal_arg_pointer_based_exp_scan): Likewise.
874 * cfgbuild.c (find_many_sub_basic_blocks): Likewise.
875 * cfgexpand.c (expand_asm_stmt): Likewise.
876 * cfgrtl.c (rtl_create_basic_block): Likewise.
877 * combine.c (combine_split_insns): Likewise.
878 (combine_instructions): Likewise.
879 * config/aarch64/aarch64-sve-builtins.cc (function_expander::add_output_operand): Likewise.
880 (function_expander::add_input_operand): Likewise.
881 (function_expander::add_integer_operand): Likewise.
882 (function_expander::add_address_operand): Likewise.
883 (function_expander::add_fixed_operand): Likewise.
884 * df-core.c (df_worklist_dataflow_doublequeue): Likewise.
885 * dwarf2cfi.c (update_row_reg_save): Likewise.
886 * early-remat.c (early_remat::init_block_info): Likewise.
887 (early_remat::finalize_candidate_indices): Likewise.
888 * except.c (sjlj_build_landing_pads): Likewise.
889 * final.c (compute_alignments): Likewise.
890 (grow_label_align): Likewise.
891 * function.c (temp_slots_at_level): Likewise.
892 * fwprop.c (build_single_def_use_links): Likewise.
893 (update_uses): Likewise.
894 * gcc.c (insert_wrapper): Likewise.
895 * genautomata.c (create_state_ainsn_table): Likewise.
896 (add_vect): Likewise.
897 (output_dead_lock_vect): Likewise.
898 * genmatch.c (capture_info::capture_info): Likewise.
899 (parser::finish_match_operand): Likewise.
900 * genrecog.c (optimize_subroutine_group): Likewise.
901 (merge_pattern_info::merge_pattern_info): Likewise.
902 (merge_into_decision): Likewise.
903 (print_subroutine_start): Likewise.
905 * gimple-loop-versioning.cc (loop_versioning::loop_versioning): Likewise.
906 * gimple.c (gimple_set_bb): Likewise.
907 * graphite-isl-ast-to-gimple.c (translate_isl_ast_node_user): Likewise.
908 * haifa-sched.c (sched_extend_luids): Likewise.
909 (extend_h_i_d): Likewise.
910 * insn-addr.h (insn_addresses_new): Likewise.
911 * ipa-cp.c (gather_context_independent_values): Likewise.
912 (find_more_contexts_for_caller_subset): Likewise.
913 * ipa-devirt.c (final_warning_record::grow_type_warnings): Likewise.
914 (ipa_odr_read_section): Likewise.
915 * ipa-fnsummary.c (evaluate_properties_for_edge): Likewise.
916 (ipa_fn_summary_t::duplicate): Likewise.
917 (analyze_function_body): Likewise.
918 (ipa_merge_fn_summary_after_inlining): Likewise.
919 (read_ipa_call_summary): Likewise.
920 * ipa-icf.c (sem_function::bb_dict_test): Likewise.
921 * ipa-prop.c (ipa_alloc_node_params): Likewise.
922 (parm_bb_aa_status_for_bb): Likewise.
923 (ipa_compute_jump_functions_for_edge): Likewise.
924 (ipa_analyze_node): Likewise.
925 (update_jump_functions_after_inlining): Likewise.
926 (ipa_read_edge_info): Likewise.
927 (read_ipcp_transformation_info): Likewise.
928 (ipcp_transform_function): Likewise.
929 * ipa-reference.c (ipa_reference_write_optimization_summary): Likewise.
930 * ipa-split.c (execute_split_functions): Likewise.
931 * ira.c (find_moveable_pseudos): Likewise.
932 * lower-subreg.c (decompose_multiword_subregs): Likewise.
933 * lto-streamer-in.c (input_eh_regions): Likewise.
934 (input_cfg): Likewise.
935 (input_struct_function_base): Likewise.
936 (input_function): Likewise.
937 * modulo-sched.c (set_node_sched_params): Likewise.
938 (extend_node_sched_params): Likewise.
939 (schedule_reg_moves): Likewise.
940 * omp-general.c (omp_construct_simd_compare): Likewise.
941 * passes.c (pass_manager::create_pass_tab): Likewise.
942 (enable_disable_pass): Likewise.
943 * predict.c (determine_unlikely_bbs): Likewise.
944 * profile.c (compute_branch_probabilities): Likewise.
945 * read-rtl-function.c (function_reader::parse_block): Likewise.
946 * read-rtl.c (rtx_reader::read_rtx_code): Likewise.
947 * reg-stack.c (stack_regs_mentioned): Likewise.
948 * regrename.c (regrename_init): Likewise.
949 * rtlanal.c (T>::add_single_to_queue): Likewise.
950 * sched-deps.c (init_deps_data_vector): Likewise.
951 * sel-sched-ir.c (sel_extend_global_bb_info): Likewise.
952 (extend_region_bb_info): Likewise.
953 (extend_insn_data): Likewise.
954 * symtab.c (symtab_node::create_reference): Likewise.
955 * tracer.c (tail_duplicate): Likewise.
956 * trans-mem.c (tm_region_init): Likewise.
957 (get_bb_regions_instrumented): Likewise.
958 * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise.
959 (build_gimple_cfg): Likewise.
960 (create_bb): Likewise.
961 (move_block_to_fn): Likewise.
962 * tree-complex.c (tree_lower_complex): Likewise.
963 * tree-if-conv.c (predicate_rhs_code): Likewise.
964 * tree-inline.c (copy_bb): Likewise.
965 * tree-into-ssa.c (get_ssa_name_ann): Likewise.
966 (mark_phi_for_rewrite): Likewise.
967 * tree-object-size.c (compute_builtin_object_size): Likewise.
968 (init_object_sizes): Likewise.
969 * tree-predcom.c (initialize_root_vars_store_elim_1): Likewise.
970 (initialize_root_vars_store_elim_2): Likewise.
971 (prepare_initializers_chain_store_elim): Likewise.
972 * tree-ssa-address.c (addr_for_mem_ref): Likewise.
973 (multiplier_allowed_in_address_p): Likewise.
974 * tree-ssa-coalesce.c (ssa_conflicts_new): Likewise.
975 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
976 * tree-ssa-loop-ivopts.c (addr_offset_valid_p): Likewise.
977 (get_address_cost_ainc): Likewise.
978 * tree-ssa-loop-niter.c (discover_iteration_bound_by_body_walk): Likewise.
979 * tree-ssa-pre.c (add_to_value): Likewise.
980 (phi_translate_1): Likewise.
981 (do_pre_regular_insertion): Likewise.
982 (do_pre_partial_partial_insertion): Likewise.
983 (init_pre): Likewise.
984 * tree-ssa-propagate.c (ssa_prop_init): Likewise.
985 (update_call_from_tree): Likewise.
986 * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Likewise.
987 * tree-ssa-sccvn.c (vn_reference_lookup_3): Likewise.
988 (vn_reference_lookup_pieces): Likewise.
989 (eliminate_dom_walker::eliminate_push_avail): Likewise.
990 * tree-ssa-strlen.c (set_strinfo): Likewise.
991 (get_stridx_plus_constant): Likewise.
992 (zero_length_string): Likewise.
993 (find_equal_ptrs): Likewise.
994 (printf_strlen_execute): Likewise.
995 * tree-ssa-threadedge.c (set_ssa_name_value): Likewise.
996 * tree-ssanames.c (make_ssa_name_fn): Likewise.
997 * tree-streamer-in.c (streamer_read_tree_bitfields): Likewise.
998 * tree-vect-loop.c (vect_record_loop_mask): Likewise.
999 (vect_get_loop_mask): Likewise.
1000 (vect_record_loop_len): Likewise.
1001 (vect_get_loop_len): Likewise.
1002 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
1003 * tree-vect-slp.c (vect_slp_convert_to_external): Likewise.
1004 (vect_bb_slp_scalar_cost): Likewise.
1005 (vect_bb_vectorization_profitable_p): Likewise.
1006 (vectorizable_slp_permutation): Likewise.
1007 * tree-vect-stmts.c (vectorizable_call): Likewise.
1008 (vectorizable_simd_clone_call): Likewise.
1009 (scan_store_can_perm_p): Likewise.
1010 (vectorizable_store): Likewise.
1012 * vec.c (test_safe_grow_cleared): Likewise.
1013 * vec.h (vec_safe_grow): Likewise.
1014 (vec_safe_grow_cleared): Likewise.
1015 (vl_ptr>::safe_grow): Likewise.
1016 (vl_ptr>::safe_grow_cleared): Likewise.
1017 * config/c6x/c6x.c (insn_set_clock): Likewise.
1019 2020-08-27 Richard Biener <rguenther@suse.de>
1021 * tree-pretty-print.c (dump_mem_ref): Handle TARGET_MEM_REFs.
1022 (dump_generic_node): Use dump_mem_ref also for TARGET_MEM_REF.
1024 2020-08-27 Alex Coplan <alex.coplan@arm.com>
1026 * lra-constraints.c (canonicalize_reload_addr): New.
1027 (curr_insn_transform): Use canonicalize_reload_addr to ensure we
1028 generate canonical RTL for an address reload.
1030 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com>
1032 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
1033 for rounding intrinsics.
1035 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com>
1037 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
1038 for min/max intrinsics.
1040 2020-08-27 Richard Biener <rguenther@suse.de>
1042 PR tree-optimization/96579
1043 * tree-ssa-reassoc.c (linearize_expr_tree): If we expand
1044 rhs via special ops make sure to swap operands.
1046 2020-08-27 Richard Biener <rguenther@suse.de>
1048 PR tree-optimization/96565
1049 * tree-ssa-dse.c (dse_classify_store): Remove defs with
1050 no uses from further processing.
1052 2020-08-26 Göran Uddeborg <goeran@uddeborg.se>
1054 PR gcov-profile/96285
1055 * common.opt, doc/invoke.texi: Clarify wording of
1056 -fprofile-exclude-files and adjust -fprofile-filter-files to
1059 2020-08-26 H.J. Lu <hjl.tools@gmail.com>
1062 * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
1063 Reject target("no-general-regs-only").
1065 2020-08-26 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1067 * config/msp430/constraints.md (K): Change unused constraint to
1068 constraint to a const_int between 1 and 19.
1069 (P): New constraint.
1070 * config/msp430/msp430-protos.h (msp430x_logical_shift_right): Remove.
1071 (msp430_expand_shift): New.
1072 (msp430_output_asm_shift_insns): New.
1073 * config/msp430/msp430.c (msp430_rtx_costs): Remove shift costs.
1075 (msp430_expand_helper): Remove hard-coded generation of some inline
1077 (use_helper_for_const_shift): New.
1078 (msp430_expand_shift): New.
1079 (msp430_output_asm_shift_insns): New.
1080 (msp430_print_operand): Add new 'W' operand selector.
1081 (msp430x_logical_shift_right): Remove.
1082 * config/msp430/msp430.md (HPSI): New define_mode_iterator.
1084 (any_shift): New define_code_iterator.
1085 (shift_insn): New define_code_attr.
1086 Adjust unnamed insn patterns searched for by combine.
1089 (430x_shift_left): Remove.
1096 (430x_arithmetic_shift_right): Remove.
1105 (430x_logical_shift_right): Remove.
1111 (<shift_insn><mode>3): New define_expand.
1112 (<shift_insn>hi3_430): New define_insn.
1113 (<shift_insn>si3_const): Likewise.
1114 (ashl<mode>3_430x): Likewise.
1115 (ashr<mode>3_430x): Likewise.
1116 (lshr<mode>3_430x): Likewise.
1117 (*bitbranch<mode>4_z): Replace renamed predicate msp430_bitpos with
1118 const_0_to_15_operand.
1119 * config/msp430/msp430.opt: New option -mmax-inline-shift=.
1120 * config/msp430/predicates.md (const_1_to_8_operand): New predicate.
1121 (const_0_to_15_operand): Rename msp430_bitpos predicate.
1122 (const_1_to_19_operand): New predicate.
1123 * doc/invoke.texi: Document -mmax-inline-shift=.
1125 2020-08-26 Aldy Hernandez <aldyh@redhat.com>
1127 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Abstract code out to...
1128 * tree-vrp.c (find_case_label_range): ...here. Rewrite for to use irange
1130 (simplify_stmt_for_jump_threading): Call find_case_label_range instead of
1131 duplicating the code in simplify_stmt_for_jump_threading.
1132 * tree-vrp.h (find_case_label_range): New prototype.
1134 2020-08-26 Richard Biener <rguenther@suse.de>
1136 PR tree-optimization/96698
1137 * tree-vectorizer.h (loop_vec_info::reduc_latch_defs): New.
1138 (loop_vec_info::reduc_latch_slp_defs): Likewise.
1139 * tree-vect-stmts.c (vect_transform_stmt): Only record
1140 stmts to update PHI latches from, perform the update ...
1141 * tree-vect-loop.c (vect_transform_loop): ... here after
1142 vectorizing those PHIs.
1143 (info_for_reduction): Properly handle non-reduction PHIs.
1145 2020-08-26 Martin Liska <mliska@suse.cz>
1147 * cgraphunit.c (process_symver_attribute): Match only symver
1150 2020-08-26 Richard Biener <rguenther@suse.de>
1152 PR tree-optimization/96783
1153 * tree-vect-stmts.c (get_group_load_store_type): Use
1154 VMAT_ELEMENTWISE for negative strides when we cannot
1155 use VMAT_STRIDED_SLP.
1157 2020-08-26 Martin Liska <mliska@suse.cz>
1159 * doc/invoke.texi: Document how are pie and pic options merged.
1161 2020-08-26 Zhiheng Xie <xiezhiheng@huawei.com>
1163 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
1164 for add/sub arithmetic intrinsics.
1166 2020-08-26 Jakub Jelinek <jakub@redhat.com>
1169 * dwarf2out.c (dwarf2out_next_real_insn): Adjust function comment.
1170 (dwarf2out_var_location): Look for next_note only if next_real is
1171 non-NULL, in that case look for the first non-deleted
1172 NOTE_INSN_VAR_LOCATION between loc_note and next_real, if any.
1174 2020-08-26 Iain Buclaw <ibuclaw@gdcproject.org>
1176 * config/tilepro/gen-mul-tables.cc (main): Define IN_TARGET_CODE to 1
1179 2020-08-26 Martin Liska <mliska@suse.cz>
1181 * cgraphunit.c (process_symver_attribute): Allow multiple
1182 symver attributes for one symbol.
1183 * doc/extend.texi: Document the change.
1185 2020-08-25 H.J. Lu <hjl.tools@gmail.com>
1188 * config/i386/i386.h (CTZ_DEFINED_VALUE_AT_ZERO): Return 0/2.
1189 (CLZ_DEFINED_VALUE_AT_ZERO): Likewise.
1191 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
1194 * config/pa/pa.c (hppa_rtx_costs_shadd_p): New helper function
1195 to check for coefficients supported by shNadd and shladd,l.
1196 (hppa_rtx_costs): Rewrite to avoid using estimates based upon
1197 FACTOR and enable recursing deeper into RTL expressions.
1199 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
1201 * config/pa/pa.md (ashldi3): Additionally, on !TARGET_64BIT
1202 generate a two instruction shd/zdep sequence when shifting
1203 registers by suitable constants.
1204 (shd_internal): New define_expand to provide gen_shd_internal.
1206 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
1208 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Rename
1209 __ARM_FEATURE_SVE_VECTOR_OPERATIONS to
1210 __ARM_FEATURE_SVE_VECTOR_OPERATORS.
1212 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
1214 * config/aarch64/aarch64-sve-builtins.cc (add_sve_type_attribute):
1215 Take the ACLE name of the type as a parameter and add it as fourth
1216 argument to the "SVE type" attribute.
1217 (register_builtin_types): Update call accordingly.
1218 (register_tuple_type): Likewise. Construct the name of the type
1219 earlier in order to do this.
1220 (get_arm_sve_vector_bits_attributes): New function.
1221 (handle_arm_sve_vector_bits_attribute): Report a more sensible
1222 error message if the attribute is applied to an SVE tuple type.
1223 Don't allow the attribute to be applied to an existing fixed-length
1224 SVE type. Mangle the new type as __SVE_VLS<type, vector-bits>.
1225 Add a dummy TYPE_DECL to the new type.
1227 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
1229 * config/aarch64/aarch64-sve-builtins.cc (DEF_SVE_TYPE): Add a
1230 leading "u" to each mangled name.
1232 2020-08-25 Richard Biener <rguenther@suse.de>
1234 PR tree-optimization/96548
1235 PR tree-optimization/96760
1236 * tree-ssa-loop-im.c (tree_ssa_lim): Recompute RPO after
1239 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1241 PR tree-optimization/96722
1242 * gimple.c (infer_nonnull_range): Formatting fix.
1243 (infer_nonnull_range_by_dereference): Return false for clobber stmts.
1245 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1247 PR tree-optimization/96758
1248 * tree-ssa-strlen.c (handle_builtin_string_cmp): If both cstlen1
1249 and cstlen2 are set, set cmpsiz to their minimum, otherwise use the
1250 one that is set. If bound is used and smaller than cmpsiz, set cmpsiz
1251 to bound. If both cstlen1 and cstlen2 are set, perform the optimization.
1253 2020-08-25 Martin Jambor <mjambor@suse.cz>
1255 PR tree-optimization/96730
1256 * tree-sra.c (create_access): Disqualify any aggregate with negative
1258 (build_ref_for_model): Add assert that offset is non-negative.
1260 2020-08-25 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
1262 * rtl.def: Fix typo in comment.
1264 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
1266 PR tree-optimization/21137
1267 * fold-const.c (fold_binary_loc) [NE_EXPR/EQ_EXPR]: Call
1268 STRIP_NOPS when checking whether to simplify ((x>>C1)&C2) != 0.
1270 2020-08-25 Andrew Pinski <apinski@marvell.com>
1273 * config/mips/mips.md (builtin_longjmp): Restore the frame
1274 pointer and stack pointer and gp.
1276 2020-08-25 Richard Biener <rguenther@suse.de>
1279 * dwarf2out.c (reference_to_unused): Make FUNCTION_DECL
1280 processing more consistent with respect to
1281 symtab->global_info_ready.
1282 (tree_add_const_value_attribute): Unconditionally call
1283 rtl_for_decl_init to do all mangling early but throw
1284 away the result if early_dwarf.
1286 2020-08-25 Hongtao Liu <hongtao.liu@intel.com>
1289 * config/i386/sse.md: Correct the mode of NOT operands to
1292 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1294 PR tree-optimization/96715
1295 * match.pd (copysign(x,-x) -> -x): New simplification.
1297 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1300 * fold-const.c (native_interpret_real): For MODE_COMPOSITE_P modes
1301 punt if the to be returned REAL_CST does not encode to the bitwise
1302 same representation.
1304 2020-08-24 Gerald Pfeifer <gerald@pfeifer.com>
1306 * doc/install.texi (Configuration): Switch valgrind.com to https.
1308 2020-08-24 Christophe Lyon <christophe.lyon@linaro.org>
1312 * config/arm/thumb1.md: Disable set-constant splitter when
1314 (thumb1_movsi_insn): Fix -mpure-code
1317 2020-08-24 Martin Liska <mliska@suse.cz>
1319 * tree-vect-data-refs.c (dr_group_sort_cmp): Work on
1321 (vect_analyze_data_ref_accesses): Work on groups.
1322 (vect_find_stmt_data_reference): Add group_id argument and fill
1323 up dataref_groups vector.
1324 * tree-vect-loop.c (vect_get_datarefs_in_loop): Pass new
1326 (vect_analyze_loop_2): Likewise.
1327 * tree-vect-slp.c (vect_slp_analyze_bb_1): Pass argument.
1328 (vect_slp_bb_region): Likewise.
1329 (vect_slp_region): Likewise.
1330 (vect_slp_bb):Work on the entire BB.
1331 * tree-vectorizer.h (vect_analyze_data_ref_accesses): Add new
1333 (vect_find_stmt_data_reference): Likewise.
1335 2020-08-24 Martin Liska <mliska@suse.cz>
1337 PR tree-optimization/96597
1338 * tree-ssa-sccvn.c (vn_reference_lookup_call): Add missing
1339 initialization of ::punned.
1340 (vn_reference_insert): Use consistently false instead of 0.
1341 (vn_reference_insert_pieces): Likewise.
1343 2020-08-24 Hans-Peter Nilsson <hp@axis.com>
1346 * reorg.c (fill_slots_from_thread): Allow trial insns that clobber
1347 TARGET_FLAGS_REGNUM as delay-slot fillers.
1349 2020-08-23 H.J. Lu <hjl.tools@gmail.com>
1352 * config/i386/i386-options.c (IX86_ATTR_IX86_YES): New.
1353 (IX86_ATTR_IX86_NO): Likewise.
1354 (ix86_opt_type): Add ix86_opt_ix86_yes and ix86_opt_ix86_no.
1355 (ix86_valid_target_attribute_inner_p): Handle general-regs-only,
1356 ix86_opt_ix86_yes and ix86_opt_ix86_no.
1357 (ix86_option_override_internal): Check opts->x_ix86_target_flags
1358 instead of opts->x_ix86_target_flags.
1359 * doc/extend.texi: Document target("general-regs-only") function
1362 2020-08-21 Richard Sandiford <richard.sandiford@arm.com>
1364 * doc/extend.texi: Update links to Arm docs.
1365 * doc/invoke.texi: Likewise.
1367 2020-08-21 Hongtao Liu <hongtao.liu@intel.com>
1370 * config/i386/i386-expand.c
1371 (ix86_expand_vec_shift_qihi_constant): Refine.
1373 2020-08-21 Alex Coplan <alex.coplan@arm.com>
1376 * gcc.c (set_static_spec): New.
1377 (set_static_spec_owned): New.
1378 (set_static_spec_shared): New.
1379 (driver::maybe_putenv_COLLECT_LTO_WRAPPER): Use
1380 set_static_spec_owned() to take ownership of lto_wrapper_file
1381 such that it gets freed in driver::finalize.
1382 (driver::maybe_run_linker): Use set_static_spec_shared() to
1383 ensure that we don't try and free() the static string "ld",
1384 also ensuring that any previously-allocated string in
1385 linker_name_spec is freed. Likewise with argv0.
1386 (driver::finalize): Use set_static_spec_shared() when resetting
1387 specs that previously had allocated strings; remove if(0)
1388 around call to free().
1390 2020-08-21 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
1392 * emit-rtl.c (try_split): Call copy_frame_info_to_split_insn
1393 to split certain RTX_FRAME_RELATED_P insns.
1394 * recog.c (copy_frame_info_to_split_insn): New function.
1395 (peep2_attempt): Split copying of frame related info of
1396 RTX_FRAME_RELATED_P insns into above function and call it.
1397 * recog.h (copy_frame_info_to_split_insn): Declare it.
1399 2020-08-21 liuhongt <hongtao.liu@intel.com>
1402 * config/i386/i386.c (ix86_preferred_reload_class): Allow
1403 QImode data go into mask registers.
1404 * config/i386/i386.md: (*movhi_internal): Adjust constraints
1406 (*movqi_internal): Ditto.
1407 (*anddi_1): Support mask register operations
1408 (*and<mode>_1): Ditto.
1410 (*andn<mode>_1): Ditto.
1411 (*<code><mode>_1): Ditto.
1412 (*<code>qi_1): Ditto.
1413 (*one_cmpl<mode>2_1): Ditto.
1414 (*one_cmplsi2_1_zext): Ditto.
1415 (*one_cmplqi2_1): Ditto.
1416 (define_peephole2): Move constant 0/-1 directly into mask
1418 * config/i386/predicates.md (mask_reg_operand): New predicate.
1419 * config/i386/sse.md (define_split): Add post-reload splitters
1420 that would convert "generic" patterns to mask patterns.
1421 (*knotsi_1_zext): New define_insn.
1423 2020-08-21 liuhongt <hongtao.liu@intel.com>
1425 * config/i386/x86-tune-costs.h (skylake_cost): Adjust cost
1428 2020-08-21 liuhongt <hongtao.liu@intel.com>
1430 * config/i386/i386.c (inline_secondary_memory_needed):
1431 No memory is needed between mask regs and gpr.
1432 (ix86_hard_regno_mode_ok): Add condition TARGET_AVX512F for
1434 * config/i386/i386.h (enum reg_class): Add INT_MASK_REGS.
1435 (REG_CLASS_NAMES): Ditto.
1436 (REG_CLASS_CONTENTS): Ditto.
1437 * config/i386/i386.md: Exclude mask register in
1438 define_peephole2 which is avaiable only for gpr.
1440 2020-08-21 H.J. Lu <hjl.tools@gmail.com>
1443 * config/i386/i386.h (struct processor_costs): Add member
1444 mask_to_integer, integer_to_mask, mask_load[3], mask_store[3],
1446 * config/i386/x86-tune-costs.h (ix86_size_cost, i386_cost,
1447 i386_cost, pentium_cost, lakemont_cost, pentiumpro_cost,
1448 geode_cost, k6_cost, athlon_cost, k8_cost, amdfam10_cost,
1449 bdver_cost, znver1_cost, znver2_cost, skylake_cost,
1450 btver1_cost, btver2_cost, pentium4_cost, nocona_cost,
1451 atom_cost, slm_cost, intel_cost, generic_cost, core_cost):
1452 Initialize mask_load[3], mask_store[3], mask_move,
1453 integer_to_mask, mask_to_integer for all target costs.
1454 * config/i386/i386.c (ix86_register_move_cost): Using cost
1455 model of mask registers.
1456 (inline_memory_move_cost): Ditto.
1457 (ix86_register_move_cost): Ditto.
1459 2020-08-20 Iain Buclaw <ibuclaw@gdcproject.org>
1461 * config/vxworks.h (VXWORKS_ADDITIONAL_CPP_SPEC): Don't include
1462 VxWorks header files if -fself-test is used.
1463 (STARTFILE_PREFIX_SPEC): Avoid using VSB_DIR if -fself-test is used.
1465 2020-08-20 Joe Ramsay <Joe.Ramsay@arm.com>
1468 * config/arm/mve.md (mve_vst1q_f<mode>): Require MVE memory operand for
1470 (mve_vst1q_<supf><mode>): Likewise.
1472 2020-08-19 2020-08-19 Carl Love <cel@us.ibm.com>
1474 * config/rs6000/rs6000-builtin.def (BU_P10V_0, BU_P10V_1,
1475 BU_P10V_2, BU_P10V_3): Rename BU_P10V_VSX_0, BU_P10V_VSX_1,
1476 BU_P10V_VSX_2, BU_P10V_VSX_3 respectively.
1477 (BU_P10V_4): Remove.
1478 (BU_P10V_AV_0, BU_P10V_AV_1, BU_P10V_AV_2, BU_P10V_AV_3, BU_P10V_AV_4):
1479 New definitions for Power 10 Altivec macros.
1480 (VSTRIBR, VSTRIHR, VSTRIBL, VSTRIHL, VSTRIBR_P, VSTRIHR_P,
1481 VSTRIBL_P, VSTRIHL_P, MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM,
1482 VEXPANDMB, VEXPANDMH, VEXPANDMW, VEXPANDMD, VEXPANDMQ, VEXTRACTMB,
1483 VEXTRACTMH, VEXTRACTMW, VEXTRACTMD, VEXTRACTMQ): Replace macro
1484 expansion BU_P10V_1 with BU_P10V_AV_1.
1485 (VCLRLB, VCLRRB, VCFUGED, VCLZDM, VCTZDM, VPDEPD, VPEXTD, VGNB,
1486 VCNTMBB, VCNTMBH, VCNTMBW, VCNTMBD): Replace macro expansion
1487 BU_P10V_2 with BU_P10V_AV_2.
1488 (VEXTRACTBL, VEXTRACTHL, VEXTRACTWL, VEXTRACTDL, VEXTRACTBR, VEXTRACTHR,
1489 VEXTRACTWR, VEXTRACTDR, VINSERTGPRBL, VINSERTGPRHL, VINSERTGPRWL,
1490 VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL, VINSERTGPRBR,
1491 VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR, VINSERTVPRHR,
1492 VINSERTVPRWR, VREPLACE_ELT_V4SI, VREPLACE_ELT_UV4SI, VREPLACE_ELT_V2DF,
1493 VREPLACE_ELT_V4SF, VREPLACE_ELT_V2DI, VREPLACE_ELT_UV2DI, VREPLACE_UN_V4SI,
1494 VREPLACE_UN_UV4SI, VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
1495 VREPLACE_UN_V2DF, VSLDB_V16QI, VSLDB_V8HI, VSLDB_V4SI, VSLDB_V2DI,
1496 VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI, VSRDB_V2DI): Replace macro expansion
1497 BU_P10V_3 with BU_P10V_AV_3.
1498 (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF, VXXSPLTID): Replace macro expansion
1499 BU_P10V_1 with BU_P10V_AV_1.
1500 (XXGENPCVM_V16QI, XXGENPCVM_V8HI, XXGENPCVM_V4SI, XXGENPCVM_V2DI):
1501 Replace macro expansion BU_P10V_2 with BU_P10V_VSX_2.
1502 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF, VXXBLEND_V16QI, VXXBLEND_V8HI,
1503 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): Replace macor
1504 expansion BU_P10V_3 with BU_P10V_VSX_3.
1505 (XXEVAL, VXXPERMX): Replace macro expansion BU_P10V_4 with BU_P10V_VSX_4.
1506 (XVCVBF16SP, XVCVSPBF16): Replace macro expansion BU_VSX_1 with
1507 BU_P10V_VSX_1. Also change MISC to CONST.
1508 * config/rs6000/rs6000-c.c: (P10_BUILTIN_VXXPERMX): Replace with
1509 P10V_BUILTIN_VXXPERMX.
1510 (P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRRB,
1511 P10_BUILTIN_VGNB, P10_BUILTIN_XXEVAL, P10_BUILTIN_VXXPERMX,
1512 P10_BUILTIN_VEXTRACTBL, P10_BUILTIN_VEXTRACTHL, P10_BUILTIN_VEXTRACTWL,
1513 P10_BUILTIN_VEXTRACTDL, P10_BUILTIN_VINSERTGPRHL,
1514 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
1515 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
1516 P10_BUILTIN_VEXTRACTBR, P10_BUILTIN_VEXTRACTHR,
1517 P10_BUILTIN_VEXTRACTWR, P10_BUILTIN_VEXTRACTDR,
1518 P10_BUILTIN_VINSERTGPRBR, P10_BUILTIN_VINSERTGPRHR,
1519 P10_BUILTIN_VINSERTGPRWR, P10_BUILTIN_VINSERTGPRDR,
1520 P10_BUILTIN_VINSERTVPRBR, P10_BUILTIN_VINSERTVPRHR,
1521 P10_BUILTIN_VINSERTVPRWR, P10_BUILTIN_VREPLACE_ELT_UV4SI,
1522 P10_BUILTIN_VREPLACE_ELT_V4SI, P10_BUILTIN_VREPLACE_ELT_UV2DI,
1523 P10_BUILTIN_VREPLACE_ELT_V2DI, P10_BUILTIN_VREPLACE_ELT_V2DF,
1524 P10_BUILTIN_VREPLACE_UN_UV4SI, P10_BUILTIN_VREPLACE_UN_V4SI,
1525 P10_BUILTIN_VREPLACE_UN_V4SF, P10_BUILTIN_VREPLACE_UN_UV2DI,
1526 P10_BUILTIN_VREPLACE_UN_V2DI, P10_BUILTIN_VREPLACE_UN_V2DF,
1527 P10_BUILTIN_VSLDB_V16QI, P10_BUILTIN_VSLDB_V16QI,
1528 P10_BUILTIN_VSLDB_V8HI, P10_BUILTIN_VSLDB_V4SI,
1529 P10_BUILTIN_VSLDB_V2DI, P10_BUILTIN_VXXSPLTIW_V4SI,
1530 P10_BUILTIN_VXXSPLTIW_V4SF, P10_BUILTIN_VXXSPLTID,
1531 P10_BUILTIN_VXXSPLTI32DX_V4SI, P10_BUILTIN_VXXSPLTI32DX_V4SF,
1532 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
1533 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI,
1534 P10_BUILTIN_VXXBLEND_V4SF, P10_BUILTIN_VXXBLEND_V2DF,
1535 P10_BUILTIN_VSRDB_V16QI, P10_BUILTIN_VSRDB_V8HI,
1536 P10_BUILTIN_VSRDB_V4SI, P10_BUILTIN_VSRDB_V2DI,
1537 P10_BUILTIN_VSTRIBL, P10_BUILTIN_VSTRIHL,
1538 P10_BUILTIN_VSTRIBL_P, P10_BUILTIN_VSTRIHL_P,
1539 P10_BUILTIN_VSTRIBR, P10_BUILTIN_VSTRIHR,
1540 P10_BUILTIN_VSTRIBR_P, P10_BUILTIN_VSTRIHR_P,
1541 P10_BUILTIN_MTVSRBM, P10_BUILTIN_MTVSRHM,
1542 P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
1543 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB,
1544 P10_BUILTIN_VCNTMBH, P10_BUILTIN_VCNTMBW,
1545 P10_BUILTIN_VCNTMBD, P10_BUILTIN_VEXPANDMB,
1546 P10_BUILTIN_VEXPANDMH, P10_BUILTIN_VEXPANDMW,
1547 P10_BUILTIN_VEXPANDMD, P10_BUILTIN_VEXPANDMQ,
1548 P10_BUILTIN_VEXTRACTMB, P10_BUILTIN_VEXTRACTMH,
1549 P10_BUILTIN_VEXTRACTMW, P10_BUILTIN_VEXTRACTMD,
1550 P10_BUILTIN_VEXTRACTMQ, P10_BUILTIN_XVTLSBB_ZEROS,
1551 P10_BUILTIN_XVTLSBB_ONES): Replace with
1552 P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRRB,
1553 P10V_BUILTIN_VGNB, P10V_BUILTIN_XXEVAL, P10V_BUILTIN_VXXPERMX,
1554 P10V_BUILTIN_VEXTRACTBL, P10V_BUILTIN_VEXTRACTHL, P10V_BUILTIN_VEXTRACTWL,
1555 P10V_BUILTIN_VEXTRACTDL, P10V_BUILTIN_VINSERTGPRHL,
1556 P10V_BUILTIN_VINSERTGPRWL, P10V_BUILTIN_VINSERTGPRDL,
1557 P10V_BUILTIN_VINSERTVPRBL,P10V_BUILTIN_VINSERTVPRHL,
1558 P10V_BUILTIN_VEXTRACTBR, P10V_BUILTIN_VEXTRACTHR
1559 P10V_BUILTIN_VEXTRACTWR, P10V_BUILTIN_VEXTRACTDR,
1560 P10V_BUILTIN_VINSERTGPRBR, P10V_BUILTIN_VINSERTGPRHR,
1561 P10V_BUILTIN_VINSERTGPRWR, P10V_BUILTIN_VINSERTGPRDR,
1562 P10V_BUILTIN_VINSERTVPRBR, P10V_BUILTIN_VINSERTVPRHR,
1563 P10V_BUILTIN_VINSERTVPRWR, P10V_BUILTIN_VREPLACE_ELT_UV4SI,
1564 P10V_BUILTIN_VREPLACE_ELT_V4SI, P10V_BUILTIN_VREPLACE_ELT_UV2DI,
1565 P10V_BUILTIN_VREPLACE_ELT_V2DI, P10V_BUILTIN_VREPLACE_ELT_V2DF,
1566 P10V_BUILTIN_VREPLACE_UN_UV4SI, P10V_BUILTIN_VREPLACE_UN_V4SI,
1567 P10V_BUILTIN_VREPLACE_UN_V4SF, P10V_BUILTIN_VREPLACE_UN_UV2DI,
1568 P10V_BUILTIN_VREPLACE_UN_V2DI, P10V_BUILTIN_VREPLACE_UN_V2DF,
1569 P10V_BUILTIN_VSLDB_V16QI, P10V_BUILTIN_VSLDB_V16QI,
1570 P10V_BUILTIN_VSLDB_V8HI, P10V_BUILTIN_VSLDB_V4SI,
1571 P10V_BUILTIN_VSLDB_V2DI, P10V_BUILTIN_VXXSPLTIW_V4SI,
1572 P10V_BUILTIN_VXXSPLTIW_V4SF, P10V_BUILTIN_VXXSPLTID,
1573 P10V_BUILTIN_VXXSPLTI32DX_V4SI, P10V_BUILTIN_VXXSPLTI32DX_V4SF,
1574 P10V_BUILTIN_VXXBLEND_V16QI, P10V_BUILTIN_VXXBLEND_V8HI,
1575 P10V_BUILTIN_VXXBLEND_V4SI, P10V_BUILTIN_VXXBLEND_V2DI,
1576 P10V_BUILTIN_VXXBLEND_V4SF, P10V_BUILTIN_VXXBLEND_V2DF,
1577 P10V_BUILTIN_VSRDB_V16QI, P10V_BUILTIN_VSRDB_V8HI,
1578 P10V_BUILTIN_VSRDB_V4SI, P10V_BUILTIN_VSRDB_V2DI,
1579 P10V_BUILTIN_VSTRIBL, P10V_BUILTIN_VSTRIHL,
1580 P10V_BUILTIN_VSTRIBL_P, P10V_BUILTIN_VSTRIHL_P,
1581 P10V_BUILTIN_VSTRIBR, P10V_BUILTIN_VSTRIHR,
1582 P10V_BUILTIN_VSTRIBR_P, P10V_BUILTIN_VSTRIHR_P,
1583 P10V_BUILTIN_MTVSRBM, P10V_BUILTIN_MTVSRHM,
1584 P10V_BUILTIN_MTVSRWM, P10V_BUILTIN_MTVSRDM,
1585 P10V_BUILTIN_MTVSRQM, P10V_BUILTIN_VCNTMBB,
1586 P10V_BUILTIN_VCNTMBH, P10V_BUILTIN_VCNTMBW,
1587 P10V_BUILTIN_VCNTMBD, P10V_BUILTIN_VEXPANDMB,
1588 P10V_BUILTIN_VEXPANDMH, P10V_BUILTIN_VEXPANDMW,
1589 P10V_BUILTIN_VEXPANDMD, P10V_BUILTIN_VEXPANDMQ,
1590 P10V_BUILTIN_VEXTRACTMB, P10V_BUILTIN_VEXTRACTMH,
1591 P10V_BUILTIN_VEXTRACTMW, P10V_BUILTIN_VEXTRACTMD,
1592 P10V_BUILTIN_VEXTRACTMQ, P10V_BUILTIN_XVTLSBB_ZEROS,
1593 P10V_BUILTIN_XVTLSBB_ONES respectively.
1594 * config/rs6000/rs6000-call.c: Ditto above, change P10_BUILTIN_name to
1596 (P10_BUILTIN_XVCVSPBF16, P10_BUILTIN_XVCVBF16SP): Change to
1597 P10V_BUILTIN_XVCVSPBF16, P10V_BUILTIN_XVCVBF16SP respectively.
1599 2020-08-19 Bill Schmidt <wschmidt@linux.ibm.com>
1601 * config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall):
1602 Sibcalls are always legal when the caller doesn't preserve r2.
1604 2020-08-19 Uroš Bizjak <ubizjak@gmail.com>
1606 * config/i386/i386-expand.c (ix86_expand_builtin)
1607 [case IX86_BUILTIN_ENQCMD, case IX86_BUILTIN_ENQCMDS]:
1608 Rewrite expansion to use code_for_enqcmd.
1609 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]:
1610 Rewrite expansion to use code_for_wrss.
1611 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
1612 Rewrite expansion to use code_for_wrss.
1614 2020-08-19 Feng Xue <fxue@os.amperecomputing.com>
1616 PR tree-optimization/94234
1617 * match.pd ((PTR_A + OFF) - (PTR_B + OFF)) -> (PTR_A - PTR_B): New
1620 2020-08-19 H.J. Lu <hjl.tools@gmail.com>
1622 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect Rocket
1623 Lake and Alder Lake.
1625 2020-08-19 Peixin Qiao <qiaopeixin@huawei.com>
1627 * config/aarch64/aarch64.c (aarch64_init_cumulative_args): Remove
1628 "fndecl && TREE_PUBLIC (fndecl)" check since it prevents the funtion
1629 type check when calling via a function pointer or when calling a static
1632 2020-08-19 Kewen Lin <linkw@linux.ibm.com>
1634 * opts-global.c (decode_options): Call target_option_override_hook
1635 before it prints for --help=*.
1637 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
1639 * config/rs6000/rs6000-builtin.def (BU_VSX_1): Rename xvcvbf16sp to
1641 * config/rs6000/rs6000-call.c (builtin_function_type): Likewise.
1642 * config/rs6000/vsx.md: Likewise.
1643 * doc/extend.texi: Likewise.
1645 2020-08-18 Aaron Sawdey <acsawdey@linux.ibm.com>
1647 * config/rs6000/rs6000-string.c (gen_lxvl_stxvl_move):
1649 (expand_block_move): Add lxvl/stxvl, vector pair, and
1651 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1652 Default value for -mblock-ops-vector-pair.
1653 * config/rs6000/rs6000.opt: Add -mblock-ops-vector-pair.
1655 2020-08-18 Aldy Hernandez <aldyh@redhat.com>
1657 * vr-values.c (check_for_binary_op_overflow): Change type of store
1659 (vr_values::adjust_range_with_scev): Abstract most of the code...
1660 (range_of_var_in_loop): ...here. Remove value_range_equiv uses.
1661 (simplify_using_ranges::simplify_using_ranges): Change type of store
1663 * vr-values.h (class range_query): New.
1664 (class simplify_using_ranges): Use range_query.
1665 (class vr_values): Add OVERRIDE to get_value_range.
1666 (range_of_var_in_loop): New.
1668 2020-08-18 Martin Sebor <msebor@redhat.com>
1672 * expr.c (convert_to_bytes): Replace statically allocated buffer with
1673 a dynamically allocated one of sufficient size.
1675 2020-08-18 Martin Sebor <msebor@redhat.com>
1677 PR tree-optimization/96670
1679 * gimple-fold.c (gimple_fold_builtin_memchr): Call byte_representation
1680 to get it, not string_constant.
1682 2020-08-18 Hu Jiangping <hujiangping@cn.fujitsu.com>
1684 * doc/gimple.texi (gimple_debug_begin_stmt_p): Add return type.
1685 (gimple_debug_inline_entry_p, gimple_debug_nonbind_marker_p): Likewise.
1687 2020-08-18 Martin Sebor <msebor@redhat.com>
1689 * fold-const.c (native_encode_expr): Update comment.
1691 2020-08-18 Uroš Bizjak <ubizjak@gmail.com>
1694 * config/i386/i386.md (restore_stack_nonlocal): Add missing compare
1695 RTX. Rewrite expander to use high-level functions in RTL construction.
1697 2020-08-18 liuhongt <hongtao.liu@intel.com>
1701 * config/i386/i386-expand.c (ix86_expand_pinsr): Don't use
1703 (ix86_expand_pextr): Don't use pextr for TImode.
1705 2020-08-17 Uroš Bizjak <ubizjak@gmail.com>
1707 * config/i386/i386-builtin.def (__builtin_ia32_bextri_u32)
1708 (__builtin_ia32_bextri_u64): Use CODE_FOR_nothing.
1709 * config/i386/i386.md (@tbm_bextri_<mode>):
1710 Implement as parametrized name pattern.
1711 (@rdrand<mode>): Ditto.
1712 (@rdseed<mode>): Ditto.
1713 * config/i386/i386-expand.c (ix86_expand_builtin)
1714 [case IX86_BUILTIN_BEXTRI32, case IX86_BUILTIN_BEXTRI64]:
1715 Update for parameterized name patterns.
1716 [case IX86_BUILTIN_RDRAND16_STEP, case IX86_BUILTIN_RDRAND32_STEP]
1717 [case IX86_BUILTIN_RDRAND64_STEP]: Ditto.
1718 [case IX86_BUILTIN_RDSEED16_STEP, case IX86_BUILTIN_RDSEED32_STEP]
1719 [case IX86_BUILTIN_RDSEED64_STEP]: Ditto.
1721 2020-08-17 Aldy Hernandez <aldyh@redhat.com>
1723 * vr-values.c (vr_values::get_value_range): Add stmt param.
1724 (vr_values::extract_range_from_comparison): Same.
1725 (vr_values::extract_range_from_assignment): Pass stmt to
1726 extract_range_from_comparison.
1727 (vr_values::adjust_range_with_scev): Pass stmt to get_value_range.
1728 (simplify_using_ranges::vrp_evaluate_conditional): Add stmt param.
1729 Pass stmt to get_value_range.
1730 (simplify_using_ranges::vrp_visit_cond_stmt): Pass stmt to
1732 (simplify_using_ranges::simplify_abs_using_ranges): Same.
1733 (simplify_using_ranges::simplify_div_or_mod_using_ranges): Same.
1734 (simplify_using_ranges::simplify_bit_ops_using_ranges): Same.
1735 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
1736 (simplify_using_ranges::simplify_switch_using_ranges): Same.
1737 (simplify_using_ranges::simplify_float_conversion_using_ranges): Same.
1738 * vr-values.h (class vr_values): Add stmt arg to
1739 vrp_evaluate_conditional_warnv_with_ops.
1740 Add stmt arg to extract_range_from_comparison and get_value_range.
1741 (simplify_using_ranges::get_value_range): Add stmt arg.
1743 2020-08-17 liuhongt <hongtao.liu@intel.com>
1746 * config/i386/i386.c (ix86_legitimate_constant_p): Return
1747 false for ENDBR immediate.
1748 (ix86_legitimate_address_p): Ditto.
1749 * config/i386/predicates.md
1750 (x86_64_immediate_operand): Exclude ENDBR immediate.
1751 (x86_64_zext_immediate_operand): Ditto.
1752 (x86_64_dwzext_immediate_operand): Ditto.
1753 (ix86_endbr_immediate_operand): New predicate.
1755 2020-08-16 Roger Sayle <roger@nextmovesoftware.com>
1757 * simplify-rtx.c (simplify_unary_operation_1) [SIGN_EXTEND]:
1758 Simplify (sign_extend:M (truncate:N (lshiftrt:M x C))) to
1759 (ashiftrt:M x C) when the shift sets the high bits appropriately.
1761 2020-08-14 Martin Sebor <msebor@redhat.com>
1764 * builtins.c (expand_builtin_memory_copy_args): Rename called function.
1765 (expand_builtin_stpcpy_1): Remove argument from call.
1766 (expand_builtin_memcmp): Rename called function.
1767 (inline_expand_builtin_bytecmp): Same.
1768 * expr.c (convert_to_bytes): New function.
1769 (constant_byte_string): New function (formerly string_constant).
1770 (string_constant): Call constant_byte_string.
1771 (byte_representation): New function.
1772 * expr.h (byte_representation): Declare.
1773 * fold-const-call.c (fold_const_call): Rename called function.
1774 * fold-const.c (c_getstr): Remove an argument.
1775 (getbyterep): Define a new function.
1776 * fold-const.h (c_getstr): Remove an argument.
1777 (getbyterep): Declare a new function.
1778 * gimple-fold.c (gimple_fold_builtin_memory_op): Rename callee.
1779 (gimple_fold_builtin_string_compare): Same.
1780 (gimple_fold_builtin_memchr): Same.
1782 2020-08-14 David Malcolm <dmalcolm@redhat.com>
1784 * doc/analyzer.texi (Overview): Add tip about how to get a
1785 gimple dump if the analyzer ICEs.
1787 2020-08-14 Uroš Bizjak <ubizjak@gmail.com>
1789 * config/i386/i386-builtin.def (__builtin_ia32_llwpcb)
1790 (__builtin_ia32_slwpcb, __builtin_ia32_lwpval32)
1791 (__builtin_ia32_lwpval64, __builtin_ia32_lwpins32)
1792 (__builtin_ia32_lwpins64): Use CODE_FOR_nothing.
1793 * config/i386/i386.md (@lwp_llwpcb<mode>):
1794 Implement as parametrized name pattern.
1795 (@lwp_slwpcb<mode>): Ditto.
1796 (@lwp_lwpval<mode>): Ditto.
1797 (@lwp_lwpins<mode>): Ditto.
1798 * config/i386/i386-expand.c (ix86_expand_special_args_builtin)
1799 [case VOID_FTYPE_UINT_UINT_UINT, case VOID_FTYPE_UINT64_UINT_UINT]
1800 [case UCHAR_FTYPE_UINT_UINT_UINT, case UCHAR_FTYPE_UINT64_UINT_UINT]:
1802 (ix86_expand_builtin)
1803 [ case IX86_BUILTIN_LLWPCB, case IX86_BUILTIN_LLWPCB]:
1804 Update for parameterized name patterns.
1805 [case IX86_BUILTIN_LWPVAL32, case IX86_BUILTIN_LWPVAL64]
1806 [case IX86_BUILTIN_LWPINS32, case IX86_BUILTIN_LWPINS64]: Expand here.
1808 2020-08-14 Lewis Hyatt <lhyatt@gmail.com>
1810 * common.opt: Add new option -fdiagnostics-plain-output.
1811 * doc/invoke.texi: Document it.
1812 * opts-common.c (decode_cmdline_options_to_array): Implement it.
1813 (decode_cmdline_option): Add missing const qualifier to argv.
1815 2020-08-14 Jakub Jelinek <jakub@redhat.com>
1816 Jonathan Wakely <jwakely@redhat.com>
1817 Jonathan Wakely <jwakely@redhat.com>
1819 * system.h: Include type_traits.
1820 * vec.h (vec<T, A, vl_embed>::embedded_size): Use offsetof and asserts
1821 on vec_stdlayout, which is conditionally a vec (for standard layout T)
1822 and otherwise vec_embedded.
1824 2020-08-14 Jojo R <jiejie_rong@c-sky.com>
1826 * config/csky/csky-elf.h (ASM_SPEC): Use mfloat-abi.
1827 * config/csky/csky-linux-elf.h (ASM_SPEC): mfloat-abi.
1829 2020-08-13 David Malcolm <dmalcolm@redhat.com>
1845 * Makefile.in (ANALYZER_OBJS): Add analyzer/region.o,
1846 analyzer/region-model-impl-calls.o,
1847 analyzer/region-model-manager.o,
1848 analyzer/region-model-reachability.o, analyzer/store.o, and
1850 * doc/analyzer.texi: Update for changes to analyzer
1852 * tristate.h (tristate::get_value): New accessor.
1854 2020-08-13 Uroš Bizjak <ubizjak@gmail.com>
1856 * config/i386/i386-builtin.def (CET_NORMAL): Merge to CET BDESC array.
1857 (__builtin_ia32_rddspd, __builtin_ia32_rddspq, __builtin_ia32_incsspd)
1858 (__builtin_ia32_incsspq, __builtin_ia32_wrssd, __builtin_ia32_wrssq)
1859 (__builtin_ia32_wrussd, __builtin_ia32_wrussq): Use CODE_FOR_nothing.
1860 * config/i386/i386-builtins.c: Remove handling of CET_NORMAL builtins.
1861 * config/i386/i386.md (@rdssp<mode>): Implement as parametrized
1862 name pattern. Use SWI48 mode iterator. Introduce input operand
1863 and remove explicit XOR zeroing from insn template.
1864 (@incssp<mode>): Implement as parametrized name pattern.
1865 Use SWI48 mode iterator.
1866 (@wrss<mode>): Ditto.
1867 (@wruss<mode>): Ditto.
1868 (rstorssp): Remove expander. Rename insn pattern from *rstorssp<mode>.
1869 Use DImode memory operand.
1870 (clrssbsy): Remove expander. Rename insn pattern from *clrssbsy<mode>.
1871 Use DImode memory operand.
1872 (save_stack_nonlocal): Update for parametrized name patterns.
1873 Use cleared register as an argument to gen_rddsp.
1874 (restore_stack_nonlocal): Update for parametrized name patterns.
1875 * config/i386/i386-expand.c (ix86_expand_builtin):
1876 [case IX86_BUILTIN_RDSSPD, case IX86_BUILTIN_RDSSPQ]: Expand here.
1877 [case IX86_BUILTIN_INCSSPD, case IX86_BUILTIN_INCSSPQ]: Ditto.
1878 [case IX86_BUILTIN_RSTORSSP, case IX86_BUILTIN_CLRSSBSY]:
1879 Generate DImode memory operand.
1880 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]
1881 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
1882 Update for parameterized name patterns.
1884 2020-08-13 Peter Bergner <bergner@linux.ibm.com>
1887 * config/rs6000/rs6000-call.c (rs6000_promote_function_mode): Disallow
1888 MMA types as return values.
1889 (rs6000_function_arg): Disallow MMA types as function arguments.
1891 2020-08-13 Richard Sandiford <richard.sandiford@arm.com>
1894 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
1896 * config/aarch64/aarch64.c (aarch64_function_value): Add if
1897 condition to check ag_mode after entering if condition of
1898 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
1899 set as false by -mgeneral-regs-only, report the diagnostic
1900 information of -mgeneral-regs-only imcompatible with the use
1901 of fp/simd register(s).
1903 2020-08-13 Martin Liska <mliska@suse.cz>
1906 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Mask m_value
1909 2020-08-13 Jakub Jelinek <jakub@redhat.com>
1911 * gimplify.c (gimplify_omp_taskloop_expr): New function.
1912 (gimplify_omp_for): Use it. For OMP_FOR_NON_RECTANGULAR
1913 loops adjust in outer taskloop the var-outer decls.
1914 * omp-expand.c (expand_omp_taskloop_for_inner): Handle non-rectangular
1916 (expand_omp_for): Don't reject non-rectangular taskloop.
1917 * omp-general.c (omp_extract_for_data): Don't assert that
1918 non-rectangular loops have static schedule, instead treat loop->m1
1919 or loop->m2 as if loop->n1 or loop->n2 is non-constant.
1921 2020-08-13 Hongtao Liu <hongtao.liu@intel.com>
1924 * config/i386/sse.md (<avx512>_load<mode>_mask,
1925 <avx512>_load<mode>_mask): Extend to generate blendm
1927 (<avx512>_blendm<mode>, <avx512>_blendm<mode>): Change
1928 define_insn to define_expand.
1930 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
1931 Uroš Bizjak <ubizjak@gmail.com>
1934 * config/i386/i386.md (peephole2): Only reorder register clearing
1935 instructions to allow use of xor for general registers.
1937 2020-08-12 Martin Liska <mliska@suse.cz>
1940 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Drop value bits
1941 for bits that are unknown.
1942 (ipcp_bits_lattice::set_to_constant): Likewise.
1943 * tree-ssa-ccp.c (get_default_value): Add sanity check that
1944 IPA CP bit info has all bits set to zero in bits that
1947 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
1949 * config/aarch64/aarch64.c (aarch64_function_value): Add if
1950 condition to check ag_mode after entering if condition of
1951 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
1952 set as false by -mgeneral-regs-only, report the diagnostic
1953 information of -mgeneral-regs-only imcompatible with the use
1954 of fp/simd register(s).
1956 2020-08-12 Jakub Jelinek <jakub@redhat.com>
1958 PR tree-optimization/96535
1959 * toplev.c (process_options): Move flag_unroll_loops and
1960 flag_cunroll_grow_size handling from here to ...
1961 * opts.c (finish_options): ... here. For flag_cunroll_grow_size,
1962 don't check for AUTODETECT_VALUE, but instead check
1963 opts_set->x_flag_cunroll_grow_size.
1964 * common.opt (funroll-completely-grow-size): Default to 0.
1965 * config/rs6000/rs6000.c (TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE):
1967 (rs6000_override_options_after_change): New function.
1968 (rs6000_option_override_internal): Call it. Move there the
1969 flag_cunroll_grow_size, unroll_only_small_loops and
1970 flag_rename_registers handling.
1972 2020-08-12 Tom de Vries <tdevries@suse.de>
1974 * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Make elt_size an
1975 unsigned HOST_WIDE_INT. Print init_frag.remaining using
1976 HOST_WIDE_INT_PRINT_UNSIGNED.
1978 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
1979 Uroš Bizjak <ubizjak@gmail.com>
1981 * config/i386/i386.md (peephole2): Reduce unnecessary
1982 register shuffling produced by register allocation.
1984 2020-08-12 Aldy Hernandez <aldyh@redhat.com>
1986 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use vec<>
1987 instead of std::vector<>.
1988 (evaluate_properties_for_edge): Same.
1989 (ipa_fn_summary_t::duplicate): Same.
1990 (estimate_ipcp_clone_size_and_time): Same.
1991 * vec.h (<T, A, vl_embed>::embedded_size): Change vec_embedded
1992 type to contain a char[].
1994 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
1997 * config/s390/s390.c (s390_cannot_force_const_mem): Reject an
1998 unary minus for everything not being a numeric constant.
1999 (legitimize_tls_address): Move a NEG out of the CONST rtx.
2001 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
2004 * config/s390/s390.h (TARGET_NONSIGNALING_VECTOR_COMPARE_OK): New
2006 * config/s390/vector.md (vcond_comparison_operator): Use new macro
2009 2020-08-11 Jakub Jelinek <jakub@redhat.com>
2011 PR rtl-optimization/96539
2012 * expr.c (emit_block_move_hints): Don't copy anything if x and y
2013 are the same and neither is MEM_VOLATILE_P.
2015 2020-08-11 Jakub Jelinek <jakub@redhat.com>
2018 * tree.c (get_narrower): Use TREE_TYPE (ret) instead of
2019 TREE_TYPE (win) for COMPOUND_EXPRs.
2021 2020-08-11 Jan Hubicka <hubicka@ucw.cz>
2023 * predict.c (not_loop_guard_equal_edge_p): New function.
2024 (maybe_predict_edge): New function.
2025 (predict_paths_for_bb): Use it.
2026 (predict_paths_leading_to_edge): Use it.
2028 2020-08-11 Martin Liska <mliska@suse.cz>
2030 * dbgcnt.def (DEBUG_COUNTER): Add ipa_cp_bits.
2031 * ipa-cp.c (ipcp_store_bits_results): Use it when we store known
2032 bits for parameters.
2034 2020-08-10 Marek Polacek <polacek@redhat.com>
2036 * doc/sourcebuild.texi: Document dg-ice.
2038 2020-08-10 Roger Sayle <roger@nextmovesoftware.com>
2040 * config/i386/i386-expand.c (ix86_expand_int_movcc): Expand
2041 signed MIN_EXPR against zero as "x < 0 ? x : 0" instead of
2042 "x <= 0 ? x : 0" to enable sign_bit_compare_p optimizations.
2044 2020-08-10 Aldy Hernandez <aldyh@redhat.com>
2046 * value-range.h (gt_ggc_mx): Declare inline.
2049 2020-08-10 Marc Glisse <marc.glisse@inria.fr>
2051 PR tree-optimization/95433
2052 * match.pd (X * C1 == C2): Handle wrapping overflow.
2053 * expr.c (maybe_optimize_mod_cmp): Qualify call to mod_inv.
2055 * wide-int.cc (mod_inv): ... here.
2056 * wide-int.h (mod_inv): Declare it.
2058 2020-08-10 Jan Hubicka <hubicka@ucw.cz>
2060 * predict.c (filter_predictions): Document semantics of filter.
2061 (equal_edge_p): Rename to ...
2062 (not_equal_edge_p): ... this; reverse semantics.
2063 (remove_predictions_associated_with_edge): Fix.
2065 2020-08-10 Hongtao Liu <hongtao.liu@intel.com>
2068 * config/i386/i386-expand.c (ix86_expand_sse_cmp): Refine for
2070 (ix86_expand_mask_vec_cmp): Change prototype.
2071 * config/i386/i386-protos.h (ix86_expand_mask_vec_cmp): Change prototype.
2072 * config/i386/i386.c (ix86_print_operand): Remove operand
2074 * config/i386/sse.md
2075 (*<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>): Deleted.
2076 (*<avx512>_cmp<mode>3<mask_scalar_merge_name>): Ditto.
2077 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>): Ditto.
2078 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
2079 avx512f_maskcmp<mode>3): Ditto.
2081 2020-08-09 Roger Sayle <roger@nextmovesoftware.com>
2083 * expmed.c (init_expmed_one_conv): Restore all->reg's mode.
2084 (init_expmed_one_mode): Set all->reg to desired mode.
2086 2020-08-08 Peter Bergner <bergner@linux.ibm.com>
2089 * config/rs6000/rs6000.c (rs6000_invalid_conversion): Use canonical
2090 types for type comparisons. Refactor code to simplify it.
2092 2020-08-08 Jakub Jelinek <jakub@redhat.com>
2095 * tree-nested.c (convert_nonlocal_omp_clauses): For
2096 OMP_CLAUSE_REDUCTION, OMP_CLAUSE_LASTPRIVATE and OMP_CLAUSE_LINEAR
2097 save info->new_local_var_chain around walks of the clause gimple
2098 sequences and declare_vars if needed into the sequence.
2100 2020-08-08 Jakub Jelinek <jakub@redhat.com>
2102 PR tree-optimization/96424
2103 * omp-expand.c: Include tree-eh.h.
2104 (expand_omp_for_init_vars): Handle -fexceptions -fnon-call-exceptions
2105 by forcing floating point comparison into a bool temporary.
2107 2020-08-07 Marc Glisse <marc.glisse@inria.fr>
2109 * generic-match-head.c (optimize_vectors_before_lowering_p): New
2111 * gimple-match-head.c (optimize_vectors_before_lowering_p):
2113 * match.pd ((v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Use it.
2115 2020-08-07 Richard Biener <rguenther@suse.de>
2117 PR tree-optimization/96514
2118 * tree-if-conv.c (if_convertible_bb_p): If the last stmt
2119 is a call that is control-altering, fail.
2121 2020-08-07 Jose E. Marchesi <jose.marchesi@oracle.com>
2123 * config/bpf/bpf.md: Remove trailing whitespaces.
2124 * config/bpf/constraints.md: Likewise.
2125 * config/bpf/predicates.md: Likewise.
2127 2020-08-07 Michael Meissner <meissner@linux.ibm.com>
2129 * config/rs6000/rs6000.md (bswaphi2_reg): Add ISA 3.1 support.
2130 (bswapsi2_reg): Add ISA 3.1 support.
2131 (bswapdi2): Rename bswapdi2_xxbrd to bswapdi2_brd.
2132 (bswapdi2_brd,bswapdi2_xxbrd): Rename. Add ISA 3.1 support.
2134 2020-08-07 Alan Modra <amodra@gmail.com>
2137 * config/rs6000/predicates.md (current_file_function_operand): Don't
2138 accept functions that differ in r2 usage.
2140 2020-08-06 Hans-Peter Nilsson <hp@bitrange.com>
2142 * config/mmix/mmix.md (MM): New mode_iterator.
2143 ("mov<mode>"): New expander to expand for all MM-modes.
2144 ("*movqi_expanded", "*movhi_expanded", "*movsi_expanded")
2145 ("*movsf_expanded", "*movdf_expanded"): Rename from the
2146 corresponding mov<M> named pattern. Add to the condition that
2147 either operand must be a register_operand.
2148 ("*movdi_expanded"): Similar, but also allow STCO in the condition.
2150 2020-08-06 Richard Sandiford <richard.sandiford@arm.com>
2153 * config/arm/arm.md (arm_stack_protect_test_insn): Zero out
2154 operand 2 after use.
2155 * config/arm/thumb1.md (thumb1_stack_protect_test_insn): Likewise.
2157 2020-08-06 Peter Bergner <bergner@linux.ibm.com>
2160 * config/rs6000/mma.md (*movpxi): Add xxsetaccz generation.
2161 Disable split for zero constant source operand.
2162 (mma_xxsetaccz): Change to define_expand. Call gen_movpxi.
2164 2020-08-06 Jakub Jelinek <jakub@redhat.com>
2166 PR tree-optimization/96480
2167 * tree-ssa-reassoc.c (suitable_cond_bb): Add TEST_SWAPPED_P argument.
2168 If TEST_BB ends in cond and has one edge to *OTHER_BB and another
2169 through an empty bb to that block too, if PHI args don't match, retry
2170 them through the other path from TEST_BB.
2171 (maybe_optimize_range_tests): Adjust callers. Handle such LAST_BB
2172 through inversion of the condition.
2174 2020-08-06 Jose E. Marchesi <jose.marchesi@oracle.com>
2176 * config/bpf/bpf-helpers.h (KERNEL_HELPER): Define.
2177 (KERNEL_VERSION): Remove.
2178 * config/bpf/bpf-helpers.def: Delete.
2179 * config/bpf/bpf.c (bpf_handle_fndecl_attribute): New function.
2180 (bpf_attribute_table): Define.
2181 (bpf_helper_names): Delete.
2182 (bpf_helper_code): Likewise.
2183 (enum bpf_builtins): Adjust to new helpers mechanism.
2184 (bpf_output_call): Likewise.
2185 (bpf_init_builtins): Likewise.
2186 (bpf_init_builtins): Likewise.
2187 * doc/extend.texi (BPF Function Attributes): New section.
2188 (BPF Kernel Helpers): Delete section.
2190 2020-08-06 Richard Biener <rguenther@suse.de>
2192 PR tree-optimization/96491
2193 * tree-ssa-sink.c (sink_common_stores_to_bb): Avoid
2194 sinking across abnormal edges.
2196 2020-08-06 Richard Biener <rguenther@suse.de>
2198 PR tree-optimization/96483
2199 * tree-ssa-pre.c (create_component_ref_by_pieces_1): Handle
2202 2020-08-06 Richard Biener <rguenther@suse.de>
2204 * graphite-isl-ast-to-gimple.c (ivs_params): Use hash_map instead
2206 (ivs_params_clear): Adjust.
2207 (gcc_expression_from_isl_ast_expr_id): Likewise.
2208 (graphite_create_new_loop): Likewise.
2209 (add_parameters_to_ivs_params): Likewise.
2211 2020-08-06 Roger Sayle <roger@nextmovesoftware.com>
2212 Uroš Bizjak <ubizjak@gmail.com>
2214 * config/i386/i386.md (MAXMIN_IMODE): No longer needed.
2215 (<maxmin><mode>3): Support SWI248 and general_operand for
2216 second operand, when TARGET_CMOVE.
2217 (<maxmin><mode>3_1 splitter): Optimize comparisons against
2218 0, 1 and -1 to use "test" instead of "cmp".
2219 (*<maxmin>di3_doubleword): Likewise, allow general_operand
2220 and enable on TARGET_CMOVE.
2221 (peephole2): Convert clearing a register after a flag setting
2222 instruction into an xor followed by the original flag setter.
2224 2020-08-06 Gerald Pfeifer <gerald@pfeifer.com>
2226 * ipa-fnsummary.c (INCLUDE_VECTOR): Define.
2227 Remove direct inclusion of <vector>.
2229 2020-08-06 Kewen Lin <linkw@gcc.gnu.org>
2231 * config/rs6000/rs6000.c (rs6000_adjust_vect_cost_per_loop): New
2233 (rs6000_finish_cost): Call rs6000_adjust_vect_cost_per_loop.
2234 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Add cost
2235 modeling for vector with length.
2236 (vect_rgroup_iv_might_wrap_p): New function, factored out from...
2237 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): ...this.
2238 Update function comment.
2239 * tree-vect-stmts.c (vect_gen_len): Update function comment.
2240 * tree-vectorizer.h (vect_rgroup_iv_might_wrap_p): New declare.
2242 2020-08-06 Kewen Lin <linkw@linux.ibm.com>
2244 * tree-vectorizer.c (try_vectorize_loop_1): Skip the epilogue loops
2247 2020-08-05 Marc Glisse <marc.glisse@inria.fr>
2249 PR tree-optimization/95906
2251 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
2252 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): New transformations.
2253 (op (c ? a : b)): Update to match the new transformations.
2255 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
2258 * config/aarch64/aarch64.md (stack_protect_test_<mode>): Set the
2259 CC register directly, instead of a GPR. Replace the original GPR
2260 destination with an extra scratch register. Zero out operand 3
2262 (stack_protect_test): Update accordingly.
2264 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
2266 * config/aarch64/aarch64.md (load_pair_sw_<SX:mode><SX2:mode>)
2267 (load_pair_dw_<DX:mode><DX2:mode>, load_pair_dw_tftf)
2268 (store_pair_sw_<SX:mode><SX2:mode>)
2269 (store_pair_dw_<DX:mode><DX2:mode>, store_pair_dw_tftf)
2270 (*load_pair_extendsidi2_aarch64)
2271 (*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand.
2272 * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>)
2273 (vec_store_pair<DREG:mode><DREG2:mode>, load_pair<VQ:mode><VQ2:mode>)
2274 (vec_store_pair<VQ:mode><VQ2:mode>): Likewise.
2276 2020-08-05 Richard Biener <rguenther@suse.de>
2278 * tree-ssa-loop-im.c (invariantness_dom_walker): Remove.
2279 (invariantness_dom_walker::before_dom_children): Move to ...
2280 (compute_invariantness): ... this function.
2281 (move_computations): Inline ...
2282 (tree_ssa_lim): ... here, share RPO order and avoid some
2284 (analyze_memory_references): Remove sorting of location
2285 lists, instead assert they are sorted already when checking.
2286 (prev_flag_edges): Remove.
2287 (execute_sm_if_changed): Pass down and adjust prev edge state.
2288 (execute_sm_exit): Likewise.
2289 (hoist_memory_references): Likewise. Commit edge insertions
2290 of each processed exit.
2291 (store_motion_loop): Do not commit edge insertions on all
2292 edges in the function.
2293 (tree_ssa_lim_initialize): Do not call alloc_aux_for_edges.
2294 (tree_ssa_lim_finalize): Do not call free_aux_for_edges.
2296 2020-08-05 Richard Biener <rguenther@suse.de>
2298 * genmatch.c (fail_label): New global.
2299 (expr::gen_transform): Branch to fail_label instead of
2300 returning. Fix indent of call argument checking.
2301 (dt_simplify::gen_1): Compute and emit fail_label, branch
2302 to it instead of returning early.
2304 2020-08-05 Jakub Jelinek <jakub@redhat.com>
2306 * omp-expand.c (expand_omp_for): Don't disallow combined non-rectangular
2309 2020-08-05 Jakub Jelinek <jakub@redhat.com>
2312 * omp-low.c (lower_omp_taskreg): Call lower_reduction_clauses even in
2315 2020-08-05 Jakub Jelinek <jakub@redhat.com>
2317 * omp-expand.c (expand_omp_for_init_counts): Remember
2318 first_inner_iterations, factor and n1o from the number of iterations
2320 (expand_omp_for_init_vars): Use more efficient logical iteration number
2321 to actual iterator values computation even for non-rectangular loops
2322 where number of loop iterations could not be computed at compile time.
2324 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2326 * config/rs6000/altivec.h (vec_blendv, vec_permx): Add define.
2327 * config/rs6000/altivec.md (UNSPEC_XXBLEND, UNSPEC_XXPERMX.): New
2329 (VM3): New define_mode.
2330 (VM3_char): New define_attr.
2331 (xxblend_<mode> mode VM3): New define_insn.
2332 (xxpermx): New define_expand.
2333 (xxpermx_inst): New define_insn.
2334 * config/rs6000/rs6000-builtin.def (VXXBLEND_V16QI, VXXBLEND_V8HI,
2335 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): New
2336 BU_P10V_3 definitions.
2337 (XXBLEND): New BU_P10_OVERLOAD_3 definition.
2338 (XXPERMX): New BU_P10_OVERLOAD_4 definition.
2339 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
2340 (P10_BUILTIN_VXXPERMX): Add if statement.
2341 * config/rs6000/rs6000-call.c (P10_BUILTIN_VXXBLEND_V16QI,
2342 P10_BUILTIN_VXXBLEND_V8HI, P10_BUILTIN_VXXBLEND_V4SI,
2343 P10_BUILTIN_VXXBLEND_V2DI, P10_BUILTIN_VXXBLEND_V4SF,
2344 P10_BUILTIN_VXXBLEND_V2DF, P10_BUILTIN_VXXPERMX): Define
2345 overloaded arguments.
2346 (rs6000_expand_quaternop_builtin): Add if case for CODE_FOR_xxpermx.
2347 (builtin_quaternary_function_type): Add v16uqi_type and xxpermx_type
2348 variables, add case statement for P10_BUILTIN_VXXPERMX.
2349 (builtin_function_type): Add case statements for
2350 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
2351 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI.
2352 * doc/extend.texi: Add documentation for vec_blendv and vec_permx.
2354 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2356 * config/rs6000/altivec.h (vec_splati, vec_splatid, vec_splati_ins):
2358 * config/rs6000/altivec.md (UNSPEC_XXSPLTIW, UNSPEC_XXSPLTID,
2359 UNSPEC_XXSPLTI32DX): New.
2360 (vxxspltiw_v4si, vxxspltiw_v4sf_inst, vxxspltidp_v2df_inst,
2361 vxxsplti32dx_v4si_inst, vxxsplti32dx_v4sf_inst): New define_insn.
2362 (vxxspltiw_v4sf, vxxspltidp_v2df, vxxsplti32dx_v4si,
2363 vxxsplti32dx_v4sf.): New define_expands.
2364 * config/rs6000/predicates.md (u1bit_cint_operand,
2365 s32bit_cint_operand, c32bit_cint_operand): New predicates.
2366 * config/rs6000/rs6000-builtin.def (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF,
2367 VXXSPLTID): New definitions.
2368 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF): New BU_P10V_3
2370 (XXSPLTIW, XXSPLTID): New definitions.
2371 (XXSPLTI32DX): Add definitions.
2372 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XXSPLTIW,
2373 P10_BUILTIN_VEC_XXSPLTID, P10_BUILTIN_VEC_XXSPLTI32DX):
2375 * config/rs6000/rs6000-protos.h (rs6000_constF32toI32): New extern
2377 * config/rs6000/rs6000.c (rs6000_constF32toI32): New function.
2378 * doc/extend.texi: Add documentation for vec_splati,
2379 vec_splatid, and vec_splati_ins.
2381 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2383 * config/rs6000/altivec.h (vec_sldb, vec_srdb): New defines.
2384 * config/rs6000/altivec.md (UNSPEC_SLDB, UNSPEC_SRDB): New.
2385 (SLDB_lr): New attribute.
2386 (VSHIFT_DBL_LR): New iterator.
2387 (vs<SLDB_lr>db_<mode>): New define_insn.
2388 * config/rs6000/rs6000-builtin.def (VSLDB_V16QI, VSLDB_V8HI,
2389 VSLDB_V4SI, VSLDB_V2DI, VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI,
2390 VSRDB_V2DI): New BU_P10V_3 definitions.
2391 (SLDB, SRDB): New BU_P10_OVERLOAD_3 definitions.
2392 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_SLDB,
2393 P10_BUILTIN_VEC_SRDB): New definitions.
2394 (rs6000_expand_ternop_builtin) [CODE_FOR_vsldb_v16qi,
2395 CODE_FOR_vsldb_v8hi, CODE_FOR_vsldb_v4si, CODE_FOR_vsldb_v2di,
2396 CODE_FOR_vsrdb_v16qi, CODE_FOR_vsrdb_v8hi, CODE_FOR_vsrdb_v4si,
2397 CODE_FOR_vsrdb_v2di]: Add clauses.
2398 * doc/extend.texi: Add description for vec_sldb and vec_srdb.
2400 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2402 * config/rs6000/altivec.h: Add define for vec_replace_elt and
2403 vec_replace_unaligned.
2404 * config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New
2406 (REPLACE_ELT): New mode iterator.
2407 (REPLACE_ELT_char, REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes.
2408 (vreplace_un_<mode>, vreplace_elt_<mode>_inst): New.
2409 * config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI,
2410 VREPLACE_ELT_UV4SI, VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI,
2411 VREPLACE_ELT_V2DF, VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI,
2412 VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
2413 VREPLACE_UN_V2DF, (REPLACE_ELT, REPLACE_UN, VREPLACE_ELT_V2DI): New builtin
2415 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_REPLACE_ELT,
2416 P10_BUILTIN_VEC_REPLACE_UN): New builtin argument definitions.
2417 (rs6000_expand_quaternop_builtin): Add 3rd argument checks for
2418 CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf,
2419 CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf.
2420 (builtin_function_type) [P10_BUILTIN_VREPLACE_ELT_UV4SI,
2421 P10_BUILTIN_VREPLACE_ELT_UV2DI, P10_BUILTIN_VREPLACE_UN_UV4SI,
2422 P10_BUILTIN_VREPLACE_UN_UV2DI]: New cases.
2423 * doc/extend.texi: Add description for vec_replace_elt and
2424 vec_replace_unaligned builtins.
2426 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2428 * config/rs6000/altivec.h (vec_insertl, vec_inserth): New defines.
2429 * config/rs6000/rs6000-builtin.def (VINSERTGPRBL, VINSERTGPRHL,
2430 VINSERTGPRWL, VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL,
2431 VINSERTGPRBR, VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR,
2432 VINSERTVPRHR, VINSERTVPRWR): New builtins.
2433 (INSERTL, INSERTH): New builtins.
2434 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_INSERTL,
2435 P10_BUILTIN_VEC_INSERTH): New overloaded definitions.
2436 (P10_BUILTIN_VINSERTGPRBL, P10_BUILTIN_VINSERTGPRHL,
2437 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
2438 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
2439 P10_BUILTIN_VINSERTVPRWL): Add case entries.
2440 * config/rs6000/vsx.md (define_c_enum): Add UNSPEC_INSERTL,
2442 (define_expand): Add vinsertvl_<mode>, vinsertvr_<mode>,
2443 vinsertgl_<mode>, vinsertgr_<mode>, mode is VI2.
2444 (define_ins): vinsertvl_internal_<mode>, vinsertvr_internal_<mode>,
2445 vinsertgl_internal_<mode>, vinsertgr_internal_<mode>, mode VEC_I.
2446 * doc/extend.texi: Add documentation for vec_insertl, vec_inserth.
2448 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2450 * config/rs6000/altivec.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
2451 (vextractl<mode>, vextractr<mode>)
2452 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
2454 * config/rs6000/vsx.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
2455 (vextractl<mode>, vextractr<mode>)
2456 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
2458 * doc/extend.texi: Update documentation for vec_extractl.
2459 Replace builtin name vec_extractr with vec_extracth. Update
2460 description of vec_extracth.
2462 2020-08-04 Jim Wilson <jimw@sifive.com>
2464 * doc/invoke.texi (AArch64 Options): Delete duplicate
2465 -mstack-protector-guard docs.
2467 2020-08-04 Roger Sayle <roger@nextmovesoftware.com>
2469 * config/nvptx/nvptx.md (smulhi3_highpart, smulsi3_highpart)
2470 (umulhi3_highpart, umulsi3_highpart): New instructions.
2472 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
2474 * config/gcn/gcn-run.c (R_AMDGPU_NONE): Delete.
2475 (R_AMDGPU_ABS32_LO): Delete.
2476 (R_AMDGPU_ABS32_HI): Delete.
2477 (R_AMDGPU_ABS64): Delete.
2478 (R_AMDGPU_REL32): Delete.
2479 (R_AMDGPU_REL64): Delete.
2480 (R_AMDGPU_ABS32): Delete.
2481 (R_AMDGPU_GOTPCREL): Delete.
2482 (R_AMDGPU_GOTPCREL32_LO): Delete.
2483 (R_AMDGPU_GOTPCREL32_HI): Delete.
2484 (R_AMDGPU_REL32_LO): Delete.
2485 (R_AMDGPU_REL32_HI): Delete.
2487 (R_AMDGPU_RELATIVE64): Delete.
2489 2020-08-04 Omar Tahir <omar.tahir@arm.com>
2491 * config/arm/arm-cpus.in (armv8.1-m.main): Tune for Cortex-M55.
2493 2020-08-04 Hu Jiangping <hujiangping@cn.fujitsu.com>
2495 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Delete
2496 redundant extra_cost variable.
2498 2020-08-04 Zhiheng Xie <xiezhiheng@huawei.com>
2500 * config/aarch64/aarch64-builtins.c (aarch64_call_properties):
2501 Use FLOAT_MODE_P macro instead of enumerating all floating-point
2502 modes and add global flag FLAG_AUTO_FP.
2504 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2506 * doc/extend.texi (symver): Add @cindex for symver function attribute.
2508 2020-08-04 Marc Glisse <marc.glisse@inria.fr>
2510 PR tree-optimization/95433
2511 * match.pd (X * C1 == C2): New transformation.
2513 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2515 * gimple-ssa-sprintf.c (get_int_range): Adjust for irange API.
2516 (format_integer): Same.
2517 (handle_printf_call): Same.
2519 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
2521 * config/gcn/gcn.md ("<expander>ti3"): New.
2523 2020-08-04 Richard Biener <rguenther@suse.de>
2525 PR tree-optimization/88240
2526 * tree-ssa-sccvn.h (vn_reference_s::punned): New flag.
2527 * tree-ssa-sccvn.c (vn_reference_insert): Initialize punned.
2528 (vn_reference_insert_pieces): Likewise.
2529 (visit_reference_op_call): Likewise.
2530 (visit_reference_op_load): Track whether a ref was punned.
2531 * tree-ssa-pre.c (do_hoist_insertion): Refuse to perform hoist
2532 insertion on punned floating point loads.
2534 2020-08-04 Sudakshina Das <sudi.das@arm.com>
2536 * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case
2538 (aarch64_gen_load_pair): Likewise.
2539 (aarch64_copy_one_block_and_progress_pointers): Handle 256 bit copy.
2540 (aarch64_expand_cpymem): Expand copy_limit to 256bits where
2543 2020-08-04 Andrea Corallo <andrea.corallo@arm.com>
2545 * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing
2547 * doc/sourcebuild.texi (aarch64_fjcvtzs_hw) Document new
2548 target supports option.
2550 2020-08-04 Tom de Vries <tdevries@suse.de>
2553 * config/nvptx/nvptx.c (nvptx_gen_shuffle): Handle V2SI/V2DI.
2555 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2558 * tree-vect-generic.c (expand_vector_conversion): Replace .VEC_CONVERT
2559 call with GIMPLE_NOP if there is no lhs.
2561 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2564 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Add IS_DEBUG
2565 argument. Return false instead of gcc_unreachable if it is true and
2566 get_addr_base_and_unit_offset returns NULL.
2567 (fold_stmt_1) <case GIMPLE_DEBUG>: Adjust caller.
2569 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2571 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional):
2572 Call is_gimple_min_invariant dropped from previous patch.
2574 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2576 * omp-expand.c (expand_omp_for_init_counts): For triangular loops
2577 compute number of iterations at runtime more efficiently.
2578 (expand_omp_for_init_vars): Adjust immediate dominators.
2579 (extract_omp_for_update_vars): Likewise.
2581 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2583 * vr-values.c (simplify_using_ranges::two_valued_val_range_p):
2586 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2588 * vr-values.c (simplify_conversion_using_ranges): Convert to irange API.
2590 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2592 * vr-values.c (test_for_singularity): Use irange API.
2593 (simplify_using_ranges::simplify_cond_using_ranges_1): Do not
2594 special case VR_RANGE.
2596 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2598 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional): Adjust
2601 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2603 * vr-values.c (simplify_using_ranges::op_with_boolean_value_range_p): Adjust
2606 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2608 * tree-ssanames.c (get_range_info): Use irange instead of value_range.
2609 * tree-ssanames.h (get_range_info): Same.
2611 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2613 * fold-const.c (expr_not_equal_to): Adjust for irange API.
2615 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2617 * builtins.c (determine_block_size): Remove ad-hoc range canonicalization.
2619 2020-08-04 Xionghu Luo <luoxhu@linux.ibm.com>
2621 PR rtl-optimization/71309
2622 * dse.c (find_shift_sequence): Use subreg of shifted from high part
2623 register to avoid loading from address.
2625 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
2627 * doc/cpp.texi (Variadic Macros): Use the exact ... token in
2630 2020-08-03 Nathan Sidwell <nathan@acm.org>
2632 * doc/invoke.texi: Refer to c++20
2634 2020-08-03 Julian Brown <julian@codesourcery.com>
2635 Thomas Schwinge <thomas@codesourcery.com>
2637 * gimplify.c (gimplify_omp_target_update): Allow GOMP_MAP_TO_PSET
2638 without a preceding data-movement mapping.
2640 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
2642 * config/darwin.h (ASM_DECLARE_FUNCTION_NAME): UNDEF before
2644 (DEF_MIN_OSX_VERSION): Only define if there's no existing
2647 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
2649 * config/darwin.c (IN_TARGET_CODE): Remove.
2650 (darwin_mergeable_constant_section): Handle poly-int machine modes.
2651 (machopic_select_rtx_section): Likewise.
2653 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
2655 PR tree-optimization/96430
2656 * range-op.cc (operator_tests): Do not shift by 31 on targets with
2657 integer's smaller than 32 bits.
2659 2020-08-03 Martin Jambor <mjambor@suse.cz>
2661 * hsa-brig-format.h: Moved to brig/brigfrontend.
2662 * hsa-brig.c: Removed.
2663 * hsa-builtins.def: Likewise.
2664 * hsa-common.c: Likewise.
2665 * hsa-common.h: Likewise.
2666 * hsa-dump.c: Likewise.
2667 * hsa-gen.c: Likewise.
2668 * hsa-regalloc.c: Likewise.
2669 * ipa-hsa.c: Likewise.
2670 * omp-grid.c: Likewise.
2671 * omp-grid.h: Likewise.
2672 * Makefile.in (BUILTINS_DEF): Remove hsa-builtins.def.
2673 (OBJS): Remove hsa-common.o, hsa-gen.o, hsa-regalloc.o, hsa-brig.o,
2674 hsa-dump.o, ipa-hsa.c and omp-grid.o.
2675 (GTFILES): Removed hsa-common.c and omp-expand.c.
2676 * builtins.def: Remove processing of hsa-builtins.def.
2677 (DEF_HSA_BUILTIN): Remove.
2678 * common.opt (flag_disable_hsa): Remove.
2680 * config.in (ENABLE_HSA): Removed.
2681 * configure.ac: Removed handling configuration for hsa offloading.
2682 (ENABLE_HSA): Removed.
2683 * configure: Regenerated.
2684 * doc/install.texi (--enable-offload-targets): Remove hsa from the
2686 (--with-hsa-runtime): Reword to reference any HSA run-time, not
2687 specifically HSA offloading.
2688 * doc/invoke.texi (Option Summary): Remove -Whsa.
2689 (Warning Options): Likewise.
2690 (Optimize Options): Remove hsa-gen-debug-stores.
2691 * doc/passes.texi (Regular IPA passes): Remove section on IPA HSA
2693 * gimple-low.c (lower_stmt): Remove GIMPLE_OMP_GRID_BODY case.
2694 * gimple-pretty-print.c (dump_gimple_omp_for): Likewise.
2695 (dump_gimple_omp_block): Likewise.
2696 (pp_gimple_stmt_1): Likewise.
2697 * gimple-walk.c (walk_gimple_stmt): Likewise.
2698 * gimple.c (gimple_build_omp_grid_body): Removed function.
2699 (gimple_copy): Remove GIMPLE_OMP_GRID_BODY case.
2700 * gimple.def (GIMPLE_OMP_GRID_BODY): Removed.
2701 * gimple.h (gf_mask): Removed GF_OMP_PARALLEL_GRID_PHONY,
2702 OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY,
2703 GF_OMP_FOR_GRID_INTRA_GROUP, GF_OMP_FOR_GRID_GROUP_ITER and
2704 GF_OMP_TEAMS_GRID_PHONY. Renumbered GF_OMP_FOR_KIND_SIMD and
2706 (gimple_build_omp_grid_body): Removed declaration.
2707 (gimple_has_substatements): Remove GIMPLE_OMP_GRID_BODY case.
2708 (gimple_omp_for_grid_phony): Removed.
2709 (gimple_omp_for_set_grid_phony): Likewise.
2710 (gimple_omp_for_grid_intra_group): Likewise.
2711 (gimple_omp_for_grid_intra_group): Likewise.
2712 (gimple_omp_for_grid_group_iter): Likewise.
2713 (gimple_omp_for_set_grid_group_iter): Likewise.
2714 (gimple_omp_parallel_grid_phony): Likewise.
2715 (gimple_omp_parallel_set_grid_phony): Likewise.
2716 (gimple_omp_teams_grid_phony): Likewise.
2717 (gimple_omp_teams_set_grid_phony): Likewise.
2718 (CASE_GIMPLE_OMP): Remove GIMPLE_OMP_GRID_BODY case.
2719 * lto-section-in.c (lto_section_name): Removed hsa.
2720 * lto-streamer.h (lto_section_type): Removed LTO_section_ipa_hsa.
2721 * lto-wrapper.c (compile_images_for_offload_targets): Remove special
2723 * omp-expand.c: Do not include hsa-common.h and gt-omp-expand.h.
2724 (parallel_needs_hsa_kernel_p): Removed.
2725 (grid_launch_attributes_trees): Likewise.
2726 (grid_launch_attributes_trees): Likewise.
2727 (grid_create_kernel_launch_attr_types): Likewise.
2728 (grid_insert_store_range_dim): Likewise.
2729 (grid_get_kernel_launch_attributes): Likewise.
2730 (get_target_arguments): Remove code passing HSA grid sizes.
2731 (grid_expand_omp_for_loop): Remove.
2732 (grid_arg_decl_map): Likewise.
2733 (grid_remap_kernel_arg_accesses): Likewise.
2734 (grid_expand_target_grid_body): Likewise.
2735 (expand_omp): Remove call to grid_expand_target_grid_body.
2736 (omp_make_gimple_edges): Remove GIMPLE_OMP_GRID_BODY case.
2737 * omp-general.c: Do not include hsa-common.h.
2738 (omp_maybe_offloaded): Do not check for HSA offloading.
2739 (omp_context_selector_matches): Likewise.
2740 * omp-low.c: Do not include hsa-common.h and omp-grid.h.
2741 (build_outer_var_ref): Remove handling of GIMPLE_OMP_GRID_BODY.
2742 (scan_sharing_clauses): Remove handling of OMP_CLAUSE__GRIDDIM_.
2743 (scan_omp_parallel): Remove handling of the phoney variant.
2744 (check_omp_nesting_restrictions): Remove handling of
2745 GIMPLE_OMP_GRID_BODY and GF_OMP_FOR_KIND_GRID_LOOP.
2746 (scan_omp_1_stmt): Remove handling of GIMPLE_OMP_GRID_BODY.
2747 (lower_omp_for_lastprivate): Remove handling of gridified loops.
2748 (lower_omp_for): Remove phony loop handling.
2749 (lower_omp_taskreg): Remove phony construct handling.
2750 (lower_omp_teams): Likewise.
2751 (lower_omp_grid_body): Removed.
2752 (lower_omp_1): Remove GIMPLE_OMP_GRID_BODY case.
2753 (execute_lower_omp): Do not call omp_grid_gridify_all_targets.
2754 * opts.c (common_handle_option): Do not handle hsa when processing
2756 * params.opt (hsa-gen-debug-stores): Remove.
2757 * passes.def: Remove pass_ipa_hsa and pass_gen_hsail.
2758 * timevar.def: Remove TV_IPA_HSA.
2759 * toplev.c: Do not include hsa-common.h.
2760 (compile_file): Do not call hsa_output_brig.
2761 * tree-core.h (enum omp_clause_code): Remove OMP_CLAUSE__GRIDDIM_.
2762 (tree_omp_clause): Remove union field dimension.
2763 * tree-nested.c (convert_nonlocal_omp_clauses): Remove the
2764 OMP_CLAUSE__GRIDDIM_ case.
2765 (convert_local_omp_clauses): Likewise.
2766 * tree-pass.h (make_pass_gen_hsail): Remove declaration.
2767 (make_pass_ipa_hsa): Likewise.
2768 * tree-pretty-print.c (dump_omp_clause): Remove GIMPLE_OMP_GRID_BODY
2770 * tree.c (omp_clause_num_ops): Remove the element corresponding to
2771 OMP_CLAUSE__GRIDDIM_.
2772 (omp_clause_code_name): Likewise.
2773 (walk_tree_1): Remove GIMPLE_OMP_GRID_BODY case.
2774 * tree.h (OMP_CLAUSE__GRIDDIM__DIMENSION): Remove.
2775 (OMP_CLAUSE__GRIDDIM__SIZE): Likewise.
2776 (OMP_CLAUSE__GRIDDIM__GROUP): Likewise.
2778 2020-08-03 Bu Le <bule1@huawei.com>
2780 * config/aarch64/aarch64-sve.md (sub<mode>3): Add support for
2783 2020-08-03 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2785 * config/msp430/msp430.h (ASM_SPEC): Don't pass on "-md" option.
2787 2020-08-03 Yunde Zhong <zhongyunde@huawei.com>
2789 PR rtl-optimization/95696
2790 * regrename.c (regrename_analyze): New param include_all_block_p
2791 with default value TRUE. If set to false, avoid disrupting SMS
2793 * regrename.h (regrename_analyze): Adjust prototype.
2795 2020-08-03 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
2797 * doc/tm.texi.in (VECTOR_STORE_FLAG_VALUE): Fix a typo.
2798 * doc/tm.texi: Regenerate.
2800 2020-08-03 Richard Sandiford <richard.sandiford@arm.com>
2802 * doc/invoke.texi: Add missing comma after octeontx2f95mm entry.
2804 2020-08-03 Qian jianhua <qianjh@cn.fujitsu.com>
2806 * config/aarch64/aarch64-cores.def (a64fx): New core.
2807 * config/aarch64/aarch64-tune.md: Regenerated.
2808 * config/aarch64/aarch64.c (a64fx_prefetch_tune, a64fx_tunings): New.
2809 * doc/invoke.texi: Add a64fx to the list.
2811 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
2813 PR rtl-optimization/61494
2814 * simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't
2815 simplify x - 0.0 with -fsignaling-nans.
2817 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
2819 * genmatch.c (decision_tree::gen): Emit stub functions for
2820 tree code operand counts that have no simplifications.
2821 (main): Correct comment typo.
2823 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
2825 * gimple-ssa-sprintf.c: Fix typos in comments.
2827 2020-08-03 Tamar Christina <tamar.christina@arm.com>
2829 * config/aarch64/driver-aarch64.c (readline): Check return value fgets.
2831 2020-08-03 Richard Biener <rguenther@suse.de>
2833 * doc/match-and-simplify.texi: Amend accordingly.
2835 2020-08-03 Richard Biener <rguenther@suse.de>
2837 * genmatch.c (parser::gimple): New.
2838 (parser::parser): Initialize gimple flag member.
2839 (parser::parse_expr): Error on ! operator modifier when
2840 not targeting GIMPLE.
2841 (main): Pass down gimple flag to parser ctor.
2843 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
2845 * Makefile.in (GTFILES): Move value-range.h up.
2846 * gengtype-lex.l: Set yylval to handle GTY markers on templates.
2847 * ipa-cp.c (initialize_node_lattices): Call value_range
2849 (ipcp_propagate_stage): Use in-place new so value_range construct
2851 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use std
2852 vec instead of GCC's vec<>.
2853 (evaluate_properties_for_edge): Adjust for std vec.
2854 (ipa_fn_summary_t::duplicate): Same.
2855 (estimate_ipcp_clone_size_and_time): Same.
2856 * ipa-prop.c (ipa_get_value_range): Use in-place new for
2858 * ipa-prop.h (struct GTY): Remove class keyword for m_vr.
2859 * range-op.cc (empty_range_check): Rename to...
2860 (empty_range_varying): ...this and adjust for varying.
2861 (undefined_shift_range_check): Adjust for irange.
2862 (range_operator::wi_fold): Same.
2863 (range_operator::fold_range): Adjust for irange. Special case
2864 single pairs for performance.
2865 (range_operator::op1_range): Adjust for irange.
2866 (range_operator::op2_range): Same.
2867 (value_range_from_overflowed_bounds): Same.
2868 (value_range_with_overflow): Same.
2869 (create_possibly_reversed_range): Same.
2871 (range_false): Same.
2872 (range_true_and_false): Same.
2873 (get_bool_state): Adjust for irange and tweak for performance.
2874 (operator_equal::fold_range): Adjust for irange.
2875 (operator_equal::op1_range): Same.
2876 (operator_equal::op2_range): Same.
2877 (operator_not_equal::fold_range): Same.
2878 (operator_not_equal::op1_range): Same.
2879 (operator_not_equal::op2_range): Same.
2884 (operator_lt::fold_range): Same.
2885 (operator_lt::op1_range): Same.
2886 (operator_lt::op2_range): Same.
2887 (operator_le::fold_range): Same.
2888 (operator_le::op1_range): Same.
2889 (operator_le::op2_range): Same.
2890 (operator_gt::fold_range): Same.
2891 (operator_gt::op1_range): Same.
2892 (operator_gt::op2_range): Same.
2893 (operator_ge::fold_range): Same.
2894 (operator_ge::op1_range): Same.
2895 (operator_ge::op2_range): Same.
2896 (operator_plus::wi_fold): Same.
2897 (operator_plus::op1_range): Same.
2898 (operator_plus::op2_range): Same.
2899 (operator_minus::wi_fold): Same.
2900 (operator_minus::op1_range): Same.
2901 (operator_minus::op2_range): Same.
2902 (operator_min::wi_fold): Same.
2903 (operator_max::wi_fold): Same.
2904 (cross_product_operator::wi_cross_product): Same.
2905 (operator_mult::op1_range): New.
2906 (operator_mult::op2_range): New.
2907 (operator_mult::wi_fold): Adjust for irange.
2908 (operator_div::wi_fold): Same.
2909 (operator_exact_divide::op1_range): Same.
2910 (operator_lshift::fold_range): Same.
2911 (operator_lshift::wi_fold): Same.
2912 (operator_lshift::op1_range): New.
2913 (operator_rshift::op1_range): New.
2914 (operator_rshift::fold_range): Adjust for irange.
2915 (operator_rshift::wi_fold): Same.
2916 (operator_cast::truncating_cast_p): Abstract out from
2917 operator_cast::fold_range.
2918 (operator_cast::fold_range): Adjust for irange and tweak for
2920 (operator_cast::inside_domain_p): Abstract out from fold_range.
2921 (operator_cast::fold_pair): Same.
2922 (operator_cast::op1_range): Use abstracted methods above. Adjust
2923 for irange and tweak for performance.
2924 (operator_logical_and::fold_range): Adjust for irange.
2925 (operator_logical_and::op1_range): Same.
2926 (operator_logical_and::op2_range): Same.
2927 (unsigned_singleton_p): New.
2928 (operator_bitwise_and::remove_impossible_ranges): New.
2929 (operator_bitwise_and::fold_range): New.
2930 (wi_optimize_and_or): Adjust for irange.
2931 (operator_bitwise_and::wi_fold): Same.
2932 (set_nonzero_range_from_mask): New.
2933 (operator_bitwise_and::simple_op1_range_solver): New.
2934 (operator_bitwise_and::op1_range): Adjust for irange.
2935 (operator_bitwise_and::op2_range): Same.
2936 (operator_logical_or::fold_range): Same.
2937 (operator_logical_or::op1_range): Same.
2938 (operator_logical_or::op2_range): Same.
2939 (operator_bitwise_or::wi_fold): Same.
2940 (operator_bitwise_or::op1_range): Same.
2941 (operator_bitwise_or::op2_range): Same.
2942 (operator_bitwise_xor::wi_fold): Same.
2943 (operator_bitwise_xor::op1_range): New.
2944 (operator_bitwise_xor::op2_range): New.
2945 (operator_trunc_mod::wi_fold): Adjust for irange.
2946 (operator_logical_not::fold_range): Same.
2947 (operator_logical_not::op1_range): Same.
2948 (operator_bitwise_not::fold_range): Same.
2949 (operator_bitwise_not::op1_range): Same.
2950 (operator_cst::fold_range): Same.
2951 (operator_identity::fold_range): Same.
2952 (operator_identity::op1_range): Same.
2953 (class operator_unknown): New.
2954 (operator_unknown::fold_range): New.
2955 (class operator_abs): Adjust for irange.
2956 (operator_abs::wi_fold): Same.
2957 (operator_abs::op1_range): Same.
2958 (operator_absu::wi_fold): Same.
2959 (class operator_negate): Same.
2960 (operator_negate::fold_range): Same.
2961 (operator_negate::op1_range): Same.
2962 (operator_addr_expr::fold_range): Same.
2963 (operator_addr_expr::op1_range): Same.
2964 (pointer_plus_operator::wi_fold): Same.
2965 (pointer_min_max_operator::wi_fold): Same.
2966 (pointer_and_operator::wi_fold): Same.
2967 (pointer_or_operator::op1_range): New.
2968 (pointer_or_operator::op2_range): New.
2969 (pointer_or_operator::wi_fold): Adjust for irange.
2970 (integral_table::integral_table): Add entries for IMAGPART_EXPR
2971 and POINTER_DIFF_EXPR.
2972 (range_cast): Adjust for irange.
2973 (build_range3): New.
2974 (range3_tests): New.
2975 (widest_irange_tests): New.
2976 (multi_precision_range_tests): New.
2977 (operator_tests): New.
2979 * range-op.h (class range_operator): Adjust for irange.
2981 * tree-vrp.c (range_fold_binary_symbolics_p): Adjust for irange and
2982 tweak for performance.
2983 (range_fold_binary_expr): Same.
2984 (masked_increment): Change to extern.
2985 * tree-vrp.h (masked_increment): New.
2986 * tree.c (cache_wide_int_in_type_cache): New function abstracted
2987 out from wide_int_to_tree_1.
2988 (wide_int_to_tree_1): Cache 0, 1, and MAX for pointers.
2989 * value-range-equiv.cc (value_range_equiv::deep_copy): Use kind
2991 (value_range_equiv::move): Same.
2992 (value_range_equiv::check): Adjust for irange.
2993 (value_range_equiv::intersect): Same.
2994 (value_range_equiv::union_): Same.
2995 (value_range_equiv::dump): Same.
2996 * value-range.cc (irange::operator=): Same.
2997 (irange::maybe_anti_range): New.
2998 (irange::copy_legacy_range): New.
2999 (irange::set_undefined): Adjust for irange.
3000 (irange::swap_out_of_order_endpoints): Abstract out from set().
3001 (irange::set_varying): Adjust for irange.
3002 (irange::irange_set): New.
3003 (irange::irange_set_anti_range): New.
3004 (irange::set): Adjust for irange.
3005 (value_range::set_nonzero): Move to header file.
3006 (value_range::set_zero): Move to header file.
3007 (value_range::check): Rename to...
3008 (irange::verify_range): ...this.
3009 (value_range::num_pairs): Rename to...
3010 (irange::legacy_num_pairs): ...this, and adjust for irange.
3011 (value_range::lower_bound): Rename to...
3012 (irange::legacy_lower_bound): ...this, and adjust for irange.
3013 (value_range::upper_bound): Rename to...
3014 (irange::legacy_upper_bound): ...this, and adjust for irange.
3015 (value_range::equal_p): Rename to...
3016 (irange::legacy_equal_p): ...this.
3017 (value_range::operator==): Move to header file.
3018 (irange::equal_p): New.
3019 (irange::symbolic_p): Adjust for irange.
3020 (irange::constant_p): Same.
3021 (irange::singleton_p): Same.
3022 (irange::value_inside_range): Same.
3023 (irange::may_contain_p): Same.
3024 (irange::contains_p): Same.
3025 (irange::normalize_addresses): Same.
3026 (irange::normalize_symbolics): Same.
3027 (irange::legacy_intersect): Same.
3028 (irange::legacy_union): Same.
3029 (irange::union_): Same.
3030 (irange::intersect): Same.
3031 (irange::irange_union): New.
3032 (irange::irange_intersect): New.
3033 (subtract_one): New.
3034 (irange::invert): Adjust for irange.
3035 (dump_bound_with_infinite_markers): New.
3036 (irange::dump): Adjust for irange.
3037 (debug): Add irange versions.
3038 (range_has_numeric_bounds_p): Adjust for irange.
3039 (vrp_val_max): Move to header file.
3040 (vrp_val_min): Move to header file.
3041 (DEFINE_INT_RANGE_GC_STUBS): New.
3042 (DEFINE_INT_RANGE_INSTANCE): New.
3043 * value-range.h (class irange): New.
3044 (class int_range): New.
3045 (class value_range): Rename to a instantiation of int_range.
3046 (irange::legacy_mode_p): New.
3047 (value_range::value_range): Remove.
3048 (irange::kind): New.
3049 (irange::num_pairs): Adjust for irange.
3050 (irange::type): Adjust for irange.
3051 (irange::tree_lower_bound): New.
3052 (irange::tree_upper_bound): New.
3053 (irange::type): Adjust for irange.
3054 (irange::min): Same.
3055 (irange::max): Same.
3056 (irange::varying_p): Same.
3057 (irange::undefined_p): Same.
3058 (irange::zero_p): Same.
3059 (irange::nonzero_p): Same.
3060 (irange::supports_type_p): Same.
3061 (range_includes_zero_p): Same.
3064 (irange::irange): New.
3065 (int_range::int_range): New.
3066 (int_range::operator=): New.
3067 (irange::set): Moved from value-range.cc and adjusted for irange.
3068 (irange::set_undefined): Same.
3069 (irange::set_varying): Same.
3070 (irange::operator==): Same.
3071 (irange::lower_bound): Same.
3072 (irange::upper_bound): Same.
3073 (irange::union_): Same.
3074 (irange::intersect): Same.
3075 (irange::set_nonzero): Same.
3076 (irange::set_zero): Same.
3077 (irange::normalize_min_max): New.
3078 (vrp_val_max): Move from value-range.cc.
3079 (vrp_val_min): Same.
3080 * vr-values.c (vr_values::get_lattice_entry): Call value_range
3083 2020-08-02 Sergei Trofimovich <siarheit@google.com>
3086 * var-tracking.c (vt_find_locations): Fully initialize
3087 all 'in_pending' bits.
3089 2020-08-01 Jan Hubicka <jh@suse.cz>
3091 * symtab.c (symtab_node::verify_base): Verify order.
3092 (symtab_node::verify_symtab_nodes): Verify order.
3094 2020-08-01 Jan Hubicka <jh@suse.cz>
3096 * predict.c (estimate_bb_frequencies): Cap recursive calls by 90%.
3098 2020-08-01 Jojo R <jiejie_rong@c-sky.com>
3100 * config/csky/csky_opts.h (float_abi_type): New.
3101 * config/csky/csky.h (TARGET_SOFT_FLOAT): New.
3102 (TARGET_HARD_FLOAT): New.
3103 (TARGET_HARD_FLOAT_ABI): New.
3104 (OPTION_DEFAULT_SPECS): Use mfloat-abi.
3105 * config/csky/csky.opt (mfloat-abi): New.
3106 * doc/invoke.texi (C-SKY Options): Document -mfloat-abi=.
3108 2020-08-01 Cooper Qu <cooper.qu@linux.alibaba.com>
3110 * config/csky/t-csky-linux: Delete big endian CPUs' multilib.
3112 2020-07-31 Roger Sayle <roger@nextmovesoftware.com>
3113 Tom de Vries <tdevries@suse.de>
3116 * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement.
3117 (TARGET_TRULY_NOOP_TRUNCATION): Define.
3119 2020-07-31 Richard Biener <rguenther@suse.de>
3122 * langhooks-def.h (lhd_finalize_early_debug): Declare.
3123 (LANG_HOOKS_FINALIZE_EARLY_DEBUG): Define.
3124 (LANG_HOOKS_INITIALIZER): Amend.
3125 * langhooks.c: Include cgraph.h and debug.h.
3126 (lhd_finalize_early_debug): Default implementation from
3127 former code in finalize_compilation_unit.
3128 * langhooks.h (lang_hooks::finalize_early_debug): Add.
3129 * cgraphunit.c (symbol_table::finalize_compilation_unit):
3130 Call the finalize_early_debug langhook.
3132 2020-07-31 Richard Biener <rguenther@suse.de>
3134 * genmatch.c (expr::force_leaf): Add and initialize.
3135 (expr::gen_transform): Honor force_leaf by passing
3136 NULL as sequence argument to maybe_push_res_to_seq.
3137 (parser::parse_expr): Allow ! marker on result expression
3139 * doc/match-and-simplify.texi: Amend.
3141 2020-07-31 Kewen Lin <linkw@linux.ibm.com>
3143 * tree-vect-loop.c (vect_get_known_peeling_cost): Don't consider branch
3144 taken costs for prologue and epilogue if they don't exist.
3145 (vect_estimate_min_profitable_iters): Likewise.
3147 2020-07-31 Martin Liska <mliska@suse.cz>
3149 * cgraph.h: Remove leading empty lines.
3150 * cgraphunit.c (enum cgraph_order_sort_kind): Remove
3152 (struct cgraph_order_sort): Add constructors.
3153 (cgraph_order_sort::process): New.
3154 (cgraph_order_cmp): New.
3155 (output_in_order): Simplify and push nodes to vector.
3157 2020-07-31 Richard Biener <rguenther@suse.de>
3160 * fold-const.c (fold_range_test): Special-case constant
3161 LHS for short-circuiting operations.
3163 2020-07-31 Martin Liska <mliska@suse.cz>
3165 * gcov-io.h (GCOV_PREALLOCATED_KVP): New.
3167 2020-07-31 Zhiheng Xie <xiezhiheng@huawei.com>
3169 * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
3170 Add new argument ATTRS.
3171 (aarch64_call_properties): New function.
3172 (aarch64_modifies_global_state_p): Likewise.
3173 (aarch64_reads_global_state_p): Likewise.
3174 (aarch64_could_trap_p): Likewise.
3175 (aarch64_add_attribute): Likewise.
3176 (aarch64_get_attributes): Likewise.
3177 (aarch64_init_simd_builtins): Add attributes for each built-in function.
3179 2020-07-31 Richard Biener <rguenther@suse.de>
3182 * var-tracking.c (vt_find_locations): Use
3183 rev_post_order_and_mark_dfs_back_seme and separately iterate
3186 2020-07-31 Richard Biener <rguenther@suse.de>
3188 * cfganal.h (rev_post_order_and_mark_dfs_back_seme): Adjust
3190 * cfganal.c (rpoamdbs_bb_data): New struct with pre BB data.
3191 (tag_header): New helper.
3192 (cmp_edge_dest_pre): Likewise.
3193 (rev_post_order_and_mark_dfs_back_seme): Compute SCCs,
3194 find SCC exits and perform a DFS walk with extra edges to
3195 compute a RPO with adjacent SCC members when requesting an
3196 iteration optimized order and populate the toplevel SCC array.
3197 * tree-ssa-sccvn.c (do_rpo_vn): Remove ad-hoc computation
3198 of max_rpo and fill it in from SCC extent info instead.
3200 2020-07-30 Will Schmidt <will_schmidt@vnet.ibm.com>
3202 * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define.
3203 (vec_test_lsbb_all_zeros): New define.
3204 * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in
3206 (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines.
3207 (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads.
3208 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS,
3209 P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries.
3210 * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec.
3211 * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define.
3212 (xvtlsbbo, xvtlsbbz): New instruction expands.
3214 2020-07-30 Cooper Qu <cooper.qu@linux.alibaba.com>
3216 * config/riscv/riscv-opts.h (stack_protector_guard): New enum.
3217 * config/riscv/riscv.c (riscv_option_override): Handle
3219 * config/riscv/riscv.md (stack_protect_set): New pattern to handle
3220 flexible stack protector guard settings.
3221 (stack_protect_set_<mode>): Ditto.
3222 (stack_protect_test): Ditto.
3223 (stack_protect_test_<mode>): Ditto.
3224 * config/riscv/riscv.opt (mstack-protector-guard=,
3225 mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
3227 * doc/invoke.texi (Option Summary) [RISC-V Options]:
3228 Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
3229 -mstack-protector-guard-offset=.
3230 (RISC-V Options): Ditto.
3232 2020-07-30 H.J. Lu <hjl.tools@gmail.com>
3235 * configure: Regenerated.
3237 2020-07-30 Richard Biener <rguenther@suse.de>
3239 PR tree-optimization/96370
3240 * tree-ssa-reassoc.c (rewrite_expr_tree): Add operation
3241 code parameter and use it instead of picking it up from
3242 the stmt that is being rewritten.
3243 (reassociate_bb): Pass down the operation code.
3245 2020-07-30 Roger Sayle <roger@nextmovesoftware.com>
3246 Tom de Vries <tdevries@suse.de>
3248 * config/nvptx/nvptx.md (nvptx_vector_index_operand): New predicate.
3249 (VECELEM): New mode attribute for a vector's uppercase element mode.
3250 (Vecelem): New mode attribute for a vector's lowercase element mode.
3251 (*vec_set<mode>_0, *vec_set<mode>_1, *vec_set<mode>_2)
3252 (*vec_set<mode>_3): New instructions.
3253 (vec_set<mode>): New expander to generate one of the above insns.
3254 (vec_extract<mode><Vecelem>): New instruction.
3256 2020-07-30 Martin Liska <mliska@suse.cz>
3259 * config/i386/x86-tune-costs.h: Use libcall for large sizes for
3260 -m32. Start using libcall from 128+ bytes.
3262 2020-07-30 Martin Liska <mliska@suse.cz>
3264 * config/i386/x86-tune-costs.h: Change code formatting.
3266 2020-07-29 Roger Sayle <roger@nextmovesoftware.com>
3268 * config/nvptx/nvptx.md (recip<mode>2): New instruction.
3270 2020-07-29 Fangrui Song <maskray@google.com>
3273 * opts.c (common_handle_option): Don't make -gsplit-dwarf imply -g.
3274 * doc/invoke.texi (-gsplit-dwarf): Update documentation.
3276 2020-07-29 Joe Ramsay <joe.ramsay@arm.com>
3278 * config/arm/arm-protos.h (arm_coproc_mem_operand_no_writeback):
3280 (arm_mve_mode_and_operands_type_check): Declare prototype.
3281 * config/arm/arm.c (arm_coproc_mem_operand): Refactor to use
3282 _arm_coproc_mem_operand.
3283 (arm_coproc_mem_operand_wb): New function to cover full, limited
3285 (arm_coproc_mem_operand_no_writeback): New constraint for memory
3286 operand with no writeback.
3287 (arm_print_operand): Extend 'E' specifier for memory operand
3288 that does not support writeback.
3289 (arm_mve_mode_and_operands_type_check): New constraint check for
3290 MVE memory operands.
3291 * config/arm/constraints.md: Add Uj constraint for VFP vldr.16
3293 * config/arm/vfp.md (*mov_load_vfp_hf16): New pattern for
3295 (*mov_store_vfp_hf16): New pattern for vstr.16.
3296 (*mov<mode>_vfp_<mode>16): Remove MVE moves.
3298 2020-07-29 Richard Biener <rguenther@suse.de>
3300 PR tree-optimization/96349
3301 * tree-ssa-loop-split.c (stmt_semi_invariant_p_1): When the
3302 condition runs into a loop PHI with an abnormal entry value give up.
3304 2020-07-29 Richard Biener <rguenther@suse.de>
3306 * tree-vectorizer.c (vectorize_loops): Reset the SCEV
3307 cache if we removed any SIMD UID SSA defs.
3308 * gimple-loop-interchange.cc (pass_linterchange::execute):
3309 Reset the scev cache if we interchanged a loop.
3311 2020-07-29 Richard Biener <rguenther@suse.de>
3313 PR tree-optimization/95679
3314 * tree-ssa-propagate.h
3315 (substitute_and_fold_engine::propagate_into_phi_args): Return
3316 whether anything changed.
3317 * tree-ssa-propagate.c
3318 (substitute_and_fold_engine::propagate_into_phi_args): Likewise.
3319 (substitute_and_fold_dom_walker::before_dom_children): Update
3322 2020-07-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3324 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
3325 Ensure that loop variable npeel_tmp advances in each iteration.
3327 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
3329 * config/mmix/mmix.h (NO_FUNCTION_CSE): Define to 1.
3331 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
3333 * config/mmix/mmix.h (ASM_OUTPUT_EXTERNAL): Define to
3334 default_elf_asm_output_external.
3336 2020-07-28 Sergei Trofimovich <siarheit@google.com>
3339 * ipa-cp.c (has_undead_caller_from_outside_scc_p): Consider
3340 unoptimized callers as undead.
3342 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
3343 Richard Biener <rguenther@suse.de>
3345 * match.pd (popcount(x)&1 -> parity(x)): New simplification.
3346 (parity(~x) -> parity(x)): New simplification.
3347 (parity(x)^parity(y) -> parity(x^y)): New simplification.
3348 (parity(x&1) -> x&1): New simplification.
3349 (popcount(x) -> x>>C): New simplification.
3351 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
3352 Tom de Vries <tdevries@suse.de>
3354 * config/nvptx/nvptx.md (extendqihi2): New instruction.
3355 (ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode.
3357 2020-07-28 Jakub Jelinek <jakub@redhat.com>
3360 * calls.c (maybe_warn_rdwr_sizes): Add FNDECL and FNTYPE arguments,
3361 instead of trying to rediscover them in the body.
3362 (initialize_argument_information): Adjust caller.
3364 2020-07-28 Kewen Lin <linkw@linux.ibm.com>
3366 * tree-vect-loop.c (vect_get_known_peeling_cost): Factor out some code
3367 to determine peel_iters_epilogue to...
3368 (vect_get_peel_iters_epilogue): ...this new function.
3369 (vect_estimate_min_profitable_iters): Refactor cost calculation on
3370 peel_iters_prologue and peel_iters_epilogue.
3372 2020-07-27 Martin Sebor <msebor@redhat.com>
3374 PR tree-optimization/84079
3375 * gimple-array-bounds.cc (array_bounds_checker::check_addr_expr):
3376 Only allow just-past-the-end references for the most significant
3379 2020-07-27 Hu Jiangping <hujiangping@cn.fujitsu.com>
3382 * opts.c (check_alignment_argument): Set the -falign-Name
3383 on/off flag on and set the -falign-Name string value null,
3384 when the command-line specified argument is zero.
3386 2020-07-27 Martin Liska <mliska@suse.cz>
3388 PR tree-optimization/96058
3389 * expr.c (string_constant): Build string_constant only
3390 for a type that has same precision as char_type_node
3391 and is an integral type.
3393 2020-07-27 Richard Biener <rguenther@suse.de>
3395 * var-tracking.c (variable_tracking_main_1): Remove call
3396 to mark_dfs_back_edges.
3398 2020-07-27 Martin Liska <mliska@suse.cz>
3400 PR tree-optimization/96128
3401 * tree-vect-generic.c (expand_vector_comparison): Do not expand
3402 vector comparison with VEC_COND_EXPR.
3404 2020-07-27 H.J. Lu <hjl.tools@gmail.com>
3407 * common.opt: Add -fcf-protection=check.
3408 * flag-types.h (cf_protection_level): Add CF_CHECK.
3409 * lto-wrapper.c (merge_and_complain): Issue an error for
3410 mismatching -fcf-protection values with -fcf-protection=check.
3411 Otherwise, merge -fcf-protection values.
3412 * doc/invoke.texi: Document -fcf-protection=check.
3414 2020-07-27 Martin Liska <mliska@suse.cz>
3417 * symbol-summary.h: Call vec_safe_reserve before grow is called
3418 in order to grow to a reasonable size.
3419 * vec.h (vec_safe_reserve): Add missing function for vl_ptr
3422 2020-07-26 Hans-Peter Nilsson <hp@bitrange.com>
3424 * configure.ac (out-of-tree linker .hidden support): Don't turn off
3425 for mmix-knuth-mmixware.
3426 * configure: Regenerate.
3428 2020-07-26 Aaron Sawdey <acsawdey@linux.ibm.com>
3430 * config/rs6000/rs6000.c (rs6000_option_override_internal):
3431 Set the default value for -mblock-ops-unaligned-vsx.
3432 * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx.
3433 * doc/invoke.texi: Document -mblock-ops-unaligned-vsx.
3435 2020-07-25 Hans-Peter Nilsson <hp@bitrange.com>
3437 * config/mmix/mmix.c (TARGET_ASM_OUTPUT_IDENT): Override the default
3438 with default_asm_output_ident_directive.
3440 2020-07-25 Andrew Stubbs <ams@codesourcery.com>
3442 * config/gcn/gcn.c (gcn_scalar_mode_supported_p): New function.
3443 (TARGET_SCALAR_MODE_SUPPORTED_P): New define.
3445 2020-07-24 David Edelsohn <dje.gcc@gmail.com>
3446 Clement Chigot <clement.chigot@atos.net>
3448 * config.gcc (powerpc-ibm-aix7.1): Use t-aix64 and biarch64 for
3450 * config/rs6000/aix71.h (ASM_SPEC): Remove aix64 option.
3453 (ASM_CPU_SPEC): Remove vsx and altivec options.
3454 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
3457 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
3458 (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
3459 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
3462 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
3465 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
3466 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
3468 (CPLUSPLUS_CPP_SPEC): Same.
3471 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
3472 * config/rs6000/aix72.h (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
3473 * config/rs6000/defaultaix64.h: Delete.
3475 2020-07-24 Segher Boessenkool <segher@kernel.crashing.org>
3477 * config/rs6000/rs6000.opt: Delete -mpower10.
3479 2020-07-24 Alexandre Oliva <oliva@adacore.com>
3481 * config/i386/intelmic-mkoffload.c
3482 (generate_target_descr_file): Use dumppfx for save_temps
3483 files. Pass -dumpbase et al down to the compiler.
3484 (generate_target_offloadend_file): Likewise.
3485 (generate_host_descr_file): Likewise.
3486 (prepare_target_image): Likewise. Move out_obj_filename
3488 (main): ... here. Detect -dumpbase, set dumppfx too.
3490 2020-07-24 Alexandre Oliva <oliva@adacore.com>
3493 * gcc.c (process_command): Adjust and document conditions to
3496 2020-07-24 Matthias Klose <doko@ubuntu.com>
3498 * config/aarch64/aarch64.c (+aarch64_offload_options,
3499 TARGET_OFFLOAD_OPTIONS): New.
3501 2020-07-24 Uroš Bizjak <ubizjak@gmail.com>
3504 * config/i386/sync.md (mmem_thread_fence): Emit mfence_sse2 for -Os.
3506 2020-07-23 Roger Sayle <roger@nextmovesoftware.com>
3508 PR rtl-optimization/96298
3509 * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't
3510 distribute over xor, so (a^b)^(c^b) is not the same as (a^c)^b.
3512 2020-07-23 Dong JianQiang <dongjianqiang2@huawei.com>
3514 PR gcov-profile/96267
3515 * gcov-io.c (gcov_open): enable if IN_GCOV_TOOL.
3517 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
3519 * config/rs6000/rs6000.c (adjust_vectorization_cost): Renamed to ...
3520 (rs6000_adjust_vect_cost_per_stmt): ... here.
3521 (rs6000_add_stmt_cost): Rename adjust_vectorization_cost to
3522 rs6000_adjust_vect_cost_per_stmt.
3524 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
3526 * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
3527 IFN_LEN_LOAD and IFN_LEN_STORE.
3528 (get_alias_ptr_type_for_ptr_address): Likewise.
3530 2020-07-23 Kito Cheng <kito.cheng@sifive.com>
3533 * asan.c (asan_shadow_offset_set_p): New.
3534 * asan.h (asan_shadow_offset_set_p): Ditto.
3535 * toplev.c (process_options): Allow -fsanitize=kernel-address
3536 even TARGET_ASAN_SHADOW_OFFSET not implemented, only check when
3537 asan stack protection is enabled.
3539 2020-07-22 Peter Bergner <bergner@linux.ibm.com>
3542 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Handle
3543 little-endian memory ordering.
3545 2020-07-22 Nathan Sidwell <nathan@acm.org>
3547 * dumpfile.c (parse_dump_option): Deal with filenames
3550 2020-07-22 Nathan Sidwell <nathan@acm.org>
3552 * incpath.c (add_path): Avoid multiple strlen calls.
3554 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3556 * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag
3557 is not NULL_RTX before use.
3559 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3561 * expr.c (convert_modes): Allow a constant integer to be converted to
3562 any scalar int mode.
3564 2020-07-22 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
3566 * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector
3567 V2SI, V2SF, V2DI, V2DF load pair and store pair modes.
3568 * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
3569 Change mode parameter to machine_mode.
3570 (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to
3572 * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
3573 Change mode parameter to machine_mode.
3574 (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode.
3575 * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors.
3577 2020-07-22 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
3579 * doc/languages.texi: Fix “then”/“than” typo.
3581 2020-07-21 Sunil K Pandey <skpgkp2@gmail.com>
3584 * config/i386/i386-protos.h (ix86_local_alignment): Add
3585 another function parameter may_lower alignment. Default is
3587 * config/i386/i386.c (ix86_lower_local_decl_alignment): New
3589 (ix86_local_alignment): Amend ix86_local_alignment to accept
3590 another parameter may_lower. If may_lower is true, new align
3591 may be lower than incoming alignment. If may_lower is false,
3592 new align will be greater or equal to incoming alignment.
3593 (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define.
3594 * doc/tm.texi: Regenerate.
3595 * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New
3597 * target.def (lower_local_decl_alignment): New hook.
3599 2020-07-21 Uroš Bizjak <ubizjak@gmail.com>
3602 * config/i386/sync.md (mfence_sse2): Enable for
3603 TARGET_64BIT and TARGET_SSE2.
3604 (mfence_nosse): Always enable.
3606 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3608 * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps):
3610 * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise.
3611 * config/msp430/msp430.md (cbranchhi4_real): Remove special case for
3612 msp430_do_not_relax_short_jumps.
3614 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3616 * config/msp430/msp430.md: New "extendqipsi2" define_insn.
3618 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3620 * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and
3623 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com>
3625 PR rtl-optimization/89310
3626 * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split.
3628 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
3630 * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total
3631 allocated size and set current_function_static_stack_size, if
3632 flag_stack_usage_info.
3634 2020-07-20 Sergei Trofimovich <siarheit@google.com>
3637 * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC
3638 to get crtendS.o for !no-pie mode.
3639 * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
3641 2020-07-20 Yang Yang <yangyang305@huawei.com>
3643 * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
3644 VIEW_CONVERT_EXPRs if the arguments types and return type
3645 of simd clone function are distinct with the vectype of stmt.
3647 2020-07-20 Uroš Bizjak <ubizjak@gmail.com>
3650 * config/i386/i386.h (TARGET_AVOID_MFENCE):
3651 Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE.
3652 * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE.
3653 (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack
3654 referred memory in word_mode.
3655 (mem_thread_fence): Do not generate mfence_sse2 pattern when
3656 TARGET_AVOID_MFENCE is true.
3657 (atomic_store<mode>): Update for rename.
3658 * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE):
3659 Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE.
3661 2020-07-20 Martin Sebor <msebor@redhat.com>
3665 * builtins.c (inline_expand_builtin_string_cmp): Rename...
3666 (inline_expand_builtin_bytecmp): ...to this.
3667 (builtin_memcpy_read_str): Don't expect data to be nul-terminated.
3668 (expand_builtin_memory_copy_args): Handle object representations
3669 with embedded nul bytes.
3670 (expand_builtin_memcmp): Same.
3671 (expand_builtin_strcmp): Adjust call to naming change.
3672 (expand_builtin_strncmp): Same.
3673 * expr.c (string_constant): Create empty strings with nonzero size.
3674 * fold-const.c (c_getstr): Rename locals and update comments.
3675 * tree.c (build_string): Accept null pointer argument.
3676 (build_string_literal): Same.
3677 * tree.h (build_string): Provide a default.
3678 (build_string_literal): Same.
3680 2020-07-20 Richard Biener <rguenther@suse.de>
3682 * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove
3683 write-only post array.
3685 2020-07-20 Jakub Jelinek <jakub@redhat.com>
3688 * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF
3689 of a bitfield not aligned on byte boundaries try to
3690 fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and
3691 adjust it depending on endianity.
3693 2020-07-20 Jakub Jelinek <jakub@redhat.com>
3696 * fold-const.c (native_encode_initializer): Handle bit-fields.
3698 2020-07-20 Kewen Lin <linkw@linux.ibm.com>
3700 * config/rs6000/rs6000.c (rs6000_option_override_internal):
3701 Set param_vect_partial_vector_usage to 0 explicitly.
3702 * doc/invoke.texi (vect-partial-vector-usage): Document new option.
3703 * optabs-query.c (get_len_load_store_mode): New function.
3704 * optabs-query.h (get_len_load_store_mode): New declare.
3705 * params.opt (vect-partial-vector-usage): New.
3706 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the
3707 handlings for vectorization using length-based partial vectors, call
3708 vect_gen_len for length generation, and rename some variables with
3709 items instead of scalars.
3710 (vect_set_loop_condition_partial_vectors): Add the handlings for
3711 vectorization using length-based partial vectors.
3712 (vect_do_peeling): Allow remaining eiters less than epilogue vf for
3713 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
3714 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init
3715 epil_using_partial_vectors_p.
3716 (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls
3717 for lengths destruction.
3718 (vect_verify_loop_lens): New function.
3719 (vect_analyze_loop): Add handlings for epilogue of loop when it's
3720 marked to use vectorization using partial vectors.
3721 (vect_analyze_loop_2): Add the check to allow only one vectorization
3722 approach using partial vectorization at the same time. Check param
3723 vect-partial-vector-usage for partial vectors decision. Mark
3724 LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is
3725 considerable to use partial vectors. Call release_vec_loop_controls
3726 for lengths destruction.
3727 (vect_estimate_min_profitable_iters): Adjust for loop vectorization
3728 using length-based partial vectors.
3729 (vect_record_loop_mask): Init factor to 1 for vectorization using
3730 mask-based partial vectors.
3731 (vect_record_loop_len): New function.
3732 (vect_get_loop_len): Likewise.
3733 * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add
3734 checks for vectorization using length-based partial vectors. Factor
3735 some code to lambda function get_valid_nvectors.
3736 (vectorizable_store): Add handlings when using length-based partial
3738 (vectorizable_load): Likewise.
3739 (vect_gen_len): New function.
3740 * tree-vectorizer.h (struct rgroup_controls): Add field factor
3741 mainly for length-based partial vectors.
3742 (vec_loop_lens): New typedef.
3743 (_loop_vec_info): Add lens and epil_using_partial_vectors_p.
3744 (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro.
3745 (LOOP_VINFO_LENS): Likewise.
3746 (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise.
3747 (vect_record_loop_len): New declare.
3748 (vect_get_loop_len): Likewise.
3749 (vect_gen_len): Likewise.
3751 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
3753 * config/mmix/mmix.c (mmix_option_override): Reinstate default
3754 integer-emitting targetm.asm_out pseudos when dumping detailed
3756 (mmix_assemble_integer): Update comment.
3758 2020-07-19 H.J. Lu <hjl.tools@gmail.com>
3762 * config/i386/cpuid.h: Add include guard.
3765 2020-07-18 H.J. Lu <hjl.tools@gmail.com>
3768 * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
3770 2020-07-18 Peter Bergner <bergner@linux.ibm.com>
3773 * config/rs6000/dfp.md (trunctdsd2): New define_insn.
3774 * config/rs6000/rs6000.md (define_attr "isa"): Add p9.
3775 (define_attr "enabled"): Handle p9.
3777 2020-07-17 Roger Sayle <roger@nextmovesoftware.com>
3779 * function.c (assign_parm_setup_block): Use the macro
3780 TRULY_NOOP_TRUNCATION_MODES_P instead of calling
3781 targetm.truly_noop_truncation directly.
3783 2020-07-17 H.J. Lu <hjl.tools@gmail.com>
3787 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
3788 (VF1_AVX512ER_128_256): This. Drop DF vector modes.
3789 (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
3790 VF1_AVX512ER_128_256.
3792 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3794 * doc/sourcebuild.texi (dg-set-compiler-env-var,
3795 dg-set-target-env-var): Document.
3797 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3799 * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
3801 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3803 * config/aarch64/driver-aarch64.c (host_detect_local_cpu):
3806 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3808 * config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
3809 (parse_field): Use std::string.
3810 (split_words, readline, find_field): New.
3811 (host_detect_local_cpu): Fix truncation issues.
3813 2020-07-17 Andrew Stubbs <ams@codesourcery.com>
3815 * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining.
3816 (ELFOSABI_AMDGPU_HSA): Likewise.
3817 (ELFABIVERSION_AMDGPU_HSA): Likewise.
3818 (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise.
3819 (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise.
3820 (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise.
3823 2020-07-17 Andrew Pinski <apinksi@marvell.com>
3824 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
3827 * config/aarch64/aarch64.c (aarch64_evpc_ins): New function.
3828 (aarch64_expand_vec_perm_const_1): Call it.
3829 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make
3830 public, and add a "@" prefix.
3832 2020-07-17 Andrew Pinski <apinksi@marvell.com>
3833 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
3836 * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function.
3837 (aarch64_expand_vec_perm_const_1): Call it.
3839 2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com>
3841 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
3842 Add new field flags.
3843 (VAR1): Add new field FLAG in macro.
3859 (aarch64_general_fold_builtin): Likewise.
3860 (aarch64_general_gimple_fold_builtin): Likewise.
3861 * config/aarch64/aarch64-simd-builtins.def: Add default flag for
3862 each built-in function.
3863 * config/aarch64/geniterators.sh: Add new field in BUILTIN macro.
3865 2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com>
3868 * config/s390/s390.c (s390_expand_insv): Invoke the movstrict
3869 expanders to generate the pattern.
3870 * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the
3871 '*' to have callable expanders.
3873 2020-07-16 Hans-Peter Nilsson <hp@axis.com>
3874 Segher Boessenkool <segher@kernel.crashing.org>
3877 * combine.c (is_just_move): Take an rtx_insn* as argument. Use
3880 2020-07-16 Uroš Bizjak <ubizjak@gmail.com>
3883 * config/i386/sync.md
3884 (peephole2 to remove unneded compare after CMPXCHG):
3885 New pattern, also handle XOR zeroing and load of -1 by OR.
3887 2020-07-16 Eric Botcazou <ebotcazou@adacore.com>
3889 * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak.
3890 (ix86_adjust_stack_and_probe): Delete.
3891 (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add
3892 PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus
3893 a small dope beyond SIZE bytes.
3894 (ix86_emit_probe_stack_range): Use local variable.
3895 (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe
3896 and tidy up the stack checking code.
3897 * explow.c (get_stack_check_protect): Fix head comment.
3898 (anti_adjust_stack_and_probe_stack_clash): Likewise.
3899 (allocate_dynamic_stack_space): Add comment.
3900 * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and
3901 TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field.
3903 2020-07-16 Andrew Stubbs <ams@codesourcery.com>
3905 * config/gcn/mkoffload.c: Include simple-object.h and elf.h.
3906 (EM_AMDGPU): New macro.
3907 (ELFOSABI_AMDGPU_HSA): New macro.
3908 (ELFABIVERSION_AMDGPU_HSA): New macro.
3909 (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro.
3910 (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro.
3911 (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro.
3912 (R_AMDGPU_NONE): New macro.
3913 (R_AMDGPU_ABS32_LO): New macro.
3914 (R_AMDGPU_ABS32_HI): New macro.
3915 (R_AMDGPU_ABS64): New macro.
3916 (R_AMDGPU_REL32): New macro.
3917 (R_AMDGPU_REL64): New macro.
3918 (R_AMDGPU_ABS32): New macro.
3919 (R_AMDGPU_GOTPCREL): New macro.
3920 (R_AMDGPU_GOTPCREL32_LO): New macro.
3921 (R_AMDGPU_GOTPCREL32_HI): New macro.
3922 (R_AMDGPU_REL32_LO): New macro.
3923 (R_AMDGPU_REL32_HI): New macro.
3924 (reserved): New macro.
3925 (R_AMDGPU_RELATIVE64): New macro.
3926 (gcn_s1_name): Delete global variable.
3927 (gcn_s2_name): Delete global variable.
3928 (gcn_o_name): Delete global variable.
3929 (gcn_cfile_name): Delete global variable.
3930 (files_to_cleanup): New global variable.
3931 (offload_abi): New global variable.
3932 (tool_cleanup): Use files_to_cleanup, not explicit list.
3933 (copy_early_debug_info): New function.
3934 (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name,
3936 Create files_to_cleanup obstack.
3937 Recognize -march options.
3938 Copy early debug info from input .o files.
3940 2020-07-16 Andrea Corallo <andrea.corallo@arm.com>
3942 * Makefile.in (TAGS): Remove 'params.def'.
3944 2020-07-16 Roger Sayle <roger@nextmovesoftware.com>
3946 * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that
3947 targets that return false, indicating SUBREGs shouldn't be
3948 used, also need to provide a trunc?i?i2 optab that performs this
3950 * doc/tm.texi: Regenerate.
3952 2020-07-15 Uroš Bizjak <ubizjak@gmail.com>
3955 * config/i386/sync.md
3956 (peephole2 to remove unneded compare after CMPXCHG): New pattern.
3958 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3961 * omp-general.h (struct omp_for_data): Rename min_inner_iterations
3962 member to first_inner_iterations, adjust comment.
3963 * omp-general.c (omp_extract_for_data): Adjust for the above change.
3964 Always use n1first and n2first to compute it, rather than depending
3965 on single_nonrect_cond_code. Similarly, always compute factor
3966 as (m2 - m1) * outer_step / inner_step rather than sometimes m1 - m2
3967 depending on single_nonrect_cond_code.
3968 * omp-expand.c (expand_omp_for_init_vars): Rename min_inner_iterations
3969 to first_inner_iterations and min_inner_iterationsd to
3970 first_inner_iterationsd.
3972 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3975 * config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
3976 _mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask,
3977 _mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask,
3978 _mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask,
3979 _mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask,
3980 _mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask,
3981 _mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask,
3982 _mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask,
3983 _mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask,
3984 _mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask,
3985 _mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask,
3986 _mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask,
3987 _mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask,
3988 _mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask,
3989 _mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask,
3990 _mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask,
3991 _mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded
3994 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3997 * builtins.c: Include gimple-ssa.h, tree-ssa-live.h and
3999 (expand_expr_force_mode): If exp is a SSA_NAME with different mode
4000 from MODE and get_gimple_for_ssa_name is a cast from MODE, use the
4003 2020-07-15 Jiufu Guo <guojiufu@cn.ibm.com>
4005 * config/rs6000/rs6000.c (rs6000_loop_unroll_adjust): Refine hook.
4007 2020-07-14 David Edelsohn <dje.gcc@gmail.com>
4009 * config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64
4011 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add
4012 TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case.
4014 2020-07-14 Lewis Hyatt <lhyatt@gmail.com>
4016 PR preprocessor/49973
4018 * common.opt: Handle -ftabstop here instead of in c-family
4019 options. Add -fdiagnostics-column-unit= and
4020 -fdiagnostics-column-origin= options.
4021 * opts.c (common_handle_option): Handle the new options.
4022 * diagnostic-format-json.cc (json_from_expanded_location): Add
4023 diagnostic_context argument. Use it to convert column numbers as per
4025 (json_from_location_range): Likewise.
4026 (json_from_fixit_hint): Likewise.
4027 (json_end_diagnostic): Pass the new context argument to helper
4028 functions above. Add "column-origin" field to the output.
4029 (test_unknown_location): Add the new context argument to calls to
4031 (test_bad_endpoints): Likewise.
4032 * diagnostic-show-locus.c
4033 (exploc_with_display_col::exploc_with_display_col): Support
4035 (layout_point::layout_point): Make use of class
4036 exploc_with_display_col.
4037 (layout_range::layout_range): Likewise.
4038 (struct line_bounds): Clarify that the units are now always
4039 display columns. Rename members accordingly. Add constructor.
4040 (layout::print_source_line): Add support for tab expansion.
4041 (make_range): Adapt to class layout_range changes.
4042 (layout::maybe_add_location_range): Likewise.
4043 (layout::layout): Adapt to class exploc_with_display_col changes.
4044 (layout::calculate_x_offset_display): Support tabstop parameter.
4045 (layout::print_annotation_line): Adapt to struct line_bounds changes.
4046 (layout::print_line): Likewise.
4047 (line_label::line_label): Add diagnostic_context argument.
4048 (get_affected_range): Likewise.
4049 (get_printed_columns): Likewise.
4050 (layout::print_any_labels): Adapt to struct line_label changes.
4051 (class correction): Add m_tabstop member.
4052 (correction::correction): Add tabstop argument.
4053 (correction::compute_display_cols): Use m_tabstop.
4054 (class line_corrections): Add m_context member.
4055 (line_corrections::line_corrections): Add diagnostic_context argument.
4056 (line_corrections::add_hint): Use m_context to handle tabstops.
4057 (layout::print_trailing_fixits): Adapt to class line_corrections
4059 (test_layout_x_offset_display_utf8): Support tabstop parameter.
4060 (test_layout_x_offset_display_tab): New selftest.
4061 (test_one_liner_colorized_utf8): Likewise.
4062 (test_tab_expansion): Likewise.
4063 (test_diagnostic_show_locus_one_liner_utf8): Call the new tests.
4064 (diagnostic_show_locus_c_tests): Likewise.
4065 (test_overlapped_fixit_printing): Adapt to helper class and
4067 (test_overlapped_fixit_printing_utf8): Likewise.
4068 (test_overlapped_fixit_printing_2): Likewise.
4069 * diagnostic.h (enum diagnostics_column_unit): New enum.
4070 (struct diagnostic_context): Add members for the new options.
4071 (diagnostic_converted_column): Declare.
4072 (json_from_expanded_location): Add new context argument.
4073 * diagnostic.c (diagnostic_initialize): Initialize new members.
4074 (diagnostic_converted_column): New function.
4075 (maybe_line_and_column): Be willing to output a column of 0.
4076 (diagnostic_get_location_text): Convert column number as per the new
4078 (diagnostic_report_current_module): Likewise.
4079 (assert_location_text): Add origin and column_unit arguments for
4080 testing the new functionality.
4081 (test_diagnostic_get_location_text): Test the new functionality.
4082 * doc/invoke.texi: Document the new options and behavior.
4083 * input.h (location_compute_display_column): Add tabstop argument.
4084 * input.c (location_compute_display_column): Likewise.
4085 (test_cpp_utf8): Add selftests for tab expansion.
4086 * tree-diagnostic-path.cc (default_tree_make_json_for_path): Pass the
4087 new context argument to json_from_expanded_location().
4089 2020-07-14 Jakub Jelinek <jakub@redhat.com>
4092 * expr.c (expand_constructor): Don't create temporary for store to
4093 volatile MEM if exp has an addressable type.
4095 2020-07-14 Nathan Sidwell <nathan@acm.org>
4097 * hash-map.h (hash_map::get): Note it is a pointer to value.
4098 * incpath.h (incpath_kind): Align comments.
4100 2020-07-14 Nathan Sidwell <nathan@acm.org>
4102 * tree-core.h (tree_decl_with_vis, tree_function_decl):
4103 Note additional padding on 64-bits
4104 * tree.c (cache_integer_cst): Note why no caching of enum literals.
4105 (get_tree_code_name): Robustify error case.
4107 2020-07-14 Nathan Sidwell <nathan@acm.org>
4109 * doc/gty.texi: Fic gt_cleare_cache name.
4110 * doc/invoke.texi: Remove duplicate opindex Wabi-tag.
4112 2020-07-14 Jakub Jelinek <jakub@redhat.com>
4114 * omp-general.h (struct omp_for_data): Add adjn1 member.
4115 * omp-general.c (omp_extract_for_data): For non-rect loop, punt on
4116 count computing if n1, n2 or step are not INTEGER_CST earlier.
4117 Narrow the outer iterator range if needed so that non-rect loop
4118 has at least one iteration for each outer range iteration. Compute
4120 * omp-expand.c (expand_omp_for_init_vars): Use adjn1 if non-NULL
4121 instead of the outer loop's n1.
4123 2020-07-14 Matthias Klose <doko@ubuntu.com>
4126 * lto-wrapper.c (merge_and_complain): Add decoded options as parameter,
4127 error on different values for -fcf-protection.
4128 (append_compiler_options): Pass -fcf-protection option.
4129 (find_and_merge_options): Add decoded options as parameter,
4130 pass decoded_options to merge_and_complain.
4131 (run_gcc): Pass decoded options to find_and_merge_options.
4132 * lto-opts.c (lto_write_options): Pass -fcf-protection option.
4134 2020-07-13 Alan Modra <amodra@gmail.com>
4136 * config/rs6000/rs6000.md (sibcall_local): Merge sibcall_local32
4137 and sibcall_local64.
4138 (sibcall_value_local): Similarly.
4140 2020-07-13 Nathan Sidwell <nathan@acm.org>
4142 * Makefile.in (distclean): Remove long gone cxxmain.c
4144 2020-07-13 H.J. Lu <hjl.tools@gmail.com>
4147 * config/i386/i386.md (cmpstrnsi): Pass a copy of the string
4148 length to cmpstrnqi patterns.
4150 2020-07-13 Jakub Jelinek <jakub@redhat.com>
4153 * ipa-fnsummary.c (analyze_function_body): Treat NULL bb->aux
4156 2020-07-13 Richard Biener <rguenther@suse.de>
4158 PR tree-optimization/96163
4159 * tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts
4160 at least after region begin.
4162 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
4164 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
4165 __ARM_FEATURE_PAC_DEFAULT support.
4167 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
4170 * doc/extend.texi: Update the text for __builtin_return_address.
4172 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
4175 * config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
4176 Disable return address signing if __builtin_eh_return is used.
4178 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
4182 * config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
4183 * config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
4184 (aarch64_return_addr): Use aarch64_return_addr_rtx.
4185 * config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
4187 2020-07-13 Richard Sandiford <richard.sandiford@arm.com>
4190 * tree.h (virtual_method_call_p): Add a default-false parameter
4191 that indicates whether the function is being called from dump
4193 (obj_type_ref_class): Likewise.
4194 * tree.c (virtual_method_call_p): Likewise.
4195 * ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR
4196 type information for the type when the parameter is false.
4197 * tree-pretty-print.c (dump_generic_node): Update calls to
4198 virtual_method_call_p and obj_type_ref_class accordingly.
4200 2020-07-13 Julian Brown <julian@codesourcery.com>
4201 Thomas Schwinge <thomas@codesourcery.com>
4203 * gimplify.c (gimplify_scan_omp_clauses): Do not strip
4204 GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data
4205 directives (see also PR92929).
4207 2020-07-13 Roger Sayle <roger@nextmovesoftware.com>
4209 * convert.c (convert_to_integer_1): Narrow integer operations
4210 even on targets that require explicit truncation instructions.
4212 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4215 * config/cris/cris-passes.def: New file.
4216 * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
4217 * config/cris/cris.c: Add infrastructure bits and pass execute
4218 function cris_postdbr_cmpelim.
4219 * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare.
4221 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4223 * config/cris/t-cris: Remove gt-cris.h-related excessive cargo.
4225 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4228 * config/cris/cris.md ("*add<mode>3_addi"): New splitter.
4229 ("*addi_b_<mode>"): New pattern.
4230 ("*addsi3<setnz>"): Remove stale %-related comment.
4232 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4234 * config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"):
4235 Use match_dup in output template, not match_operand.
4237 2020-07-13 Richard Biener <rguenther@suse.de>
4239 * var-tracking.c (bb_heap_node_t): Remove unused typedef.
4240 (vt_find_locations): Eliminate visited bitmap in favor of
4241 RPO order check. Dump statistics about the number of
4242 local BB dataflow computes.
4244 2020-07-13 Richard Biener <rguenther@suse.de>
4247 * expr.c (expand_constructor): Make a temporary also if we're
4248 storing to volatile memory.
4250 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
4252 * config/rs6000/rs6000.md (rotl_unspec): New
4253 define_insn_and_split.
4255 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
4257 * config/rs6000/rs6000.c (rs6000_expand_vector_init):
4258 Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
4260 2020-07-11 Roger Sayle <roger@nextmovesoftware.com>
4262 * internal-fn.c (expand_mul_overflow): When checking for signed
4263 overflow from a widening multiplication, we access the truncated
4264 lowpart RES twice, so keep this value in a pseudo register.
4266 2020-07-11 Richard Sandiford <richard.sandiford@arm.com>
4268 PR tree-optimization/96146
4269 * value-range.cc (value_range::set): Only decompose POLY_INT_CST
4270 bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges
4271 involving POLY_INT_CSTs.
4273 2020-07-10 David Edelsohn <dje.gcc@gmail.com>
4276 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
4277 create named section for VAR_DECL or FUNCTION_DECL.
4279 2020-07-10 Joseph Myers <joseph@codesourcery.com>
4281 * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
4284 2020-07-10 Alexander Popov <alex.popov@linux.com>
4286 * shrink-wrap.c (try_shrink_wrapping): Improve debug output.
4288 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
4291 * expr.c (expand_expr_real_2): When reducing bit fields,
4292 clear the target if it has a different mode from the expression.
4293 (reduce_to_bit_field_precision): Don't do that here. Instead
4294 assert that the target already has the correct mode.
4296 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
4300 * config/arm/arm.c (arm_attribute_table): Add
4301 "Advanced SIMD type".
4302 (arm_comp_type_attributes): Check that the "Advanced SIMD type"
4303 attributes are equal.
4304 * config/arm/arm-builtins.c: Include stringpool.h and
4306 (arm_mangle_builtin_vector_type): Use the mangling recorded
4307 in the "Advanced SIMD type" attribute.
4308 (arm_init_simd_builtin_types): Add an "Advanced SIMD type"
4309 attribute to each Advanced SIMD type, using the mangled type
4310 as the attribute's single argument.
4312 2020-07-10 Carl Love <cel@us.ibm.com>
4314 * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator.
4315 (VSX_MM4): New define_mode_iterator.
4316 (vec_mtvsrbmi): New define_insn.
4317 (vec_mtvsr_<mode>): New define_insn.
4318 (vec_cntmb_<mode>): New define_insn.
4319 (vec_extract_<mode>): New define_insn.
4320 (vec_expand_<mode>): New define_insn.
4321 (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
4322 UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
4323 * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
4324 vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
4326 * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
4327 (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
4328 mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
4329 vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
4330 (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
4331 (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
4332 mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
4333 (BU_P10_OVERLOAD_2): Add defition for cntm.
4334 * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
4335 checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
4336 CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
4337 (altivec_overloaded_builtins): Add overloaded argument entries for
4338 P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
4339 P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
4340 P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
4341 P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
4342 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
4343 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
4344 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
4345 P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
4346 P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
4347 P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
4348 (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
4349 P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
4350 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
4351 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
4352 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
4353 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
4354 P10_BUILTIN_VEXPANDMQ.
4355 * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
4356 entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
4357 VEXPANDM, VEXTRACTM.
4359 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)>
4362 * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
4363 (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
4364 v16qi_ftype_pcvoid with correct number of parameters.
4366 2020-07-10 H.J. Lu <hjl.tools@gmail.com>
4369 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
4370 TARGET_AVX512VL when enabling FMA.
4372 2020-07-10 Andrea Corallo <andrea.corallo@arm.com>
4373 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
4374 Iain Apreotesei <iain.apreotesei@arm.com>
4376 * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New
4378 * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define.
4379 (arm_invalid_within_doloop): Implement invalid_within_doloop hook.
4380 (arm_target_insn_ok_for_lob): New function.
4381 * config/arm/arm.h (TARGET_HAVE_LOB): Define macro.
4382 * config/arm/thumb2.md (*doloop_end_internal, doloop_begin)
4383 (dls_insn): Add new patterns.
4384 (doloop_end): Modify to select LR when LOB is available.
4385 * config/arm/unspecs.md: Add new unspec.
4386 * doc/sourcebuild.texi (arm_v8_1_lob_ok)
4387 (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports
4390 2020-07-10 Richard Biener <rguenther@suse.de>
4392 PR tree-optimization/96133
4393 * gimple-fold.c (fold_array_ctor_reference): Do not
4394 recurse to folding a CTOR that does not fully cover the
4397 2020-07-10 Cui,Lili <lili.cui@intel.com>
4399 * common/config/i386/cpuinfo.h
4400 (get_intel_cpu): Handle sapphirerapids.
4401 * common/config/i386/i386-common.c
4402 (processor_names): Add sapphirerapids and alderlake.
4403 (processor_alias_table): Add sapphirerapids and alderlake.
4404 * common/config/i386/i386-cpuinfo.h
4405 (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
4406 INTEL_COREI7_ALDERLAKE.
4407 * config.gcc: Add -march=sapphirerapids and alderlake.
4408 * config/i386/driver-i386.c
4409 (host_detect_local_cpu) Handle sapphirerapids and alderlake.
4410 * config/i386/i386-c.c
4411 (ix86_target_macros_internal): Handle sapphirerapids and alderlake.
4412 * config/i386/i386-options.c
4413 (m_SAPPHIRERAPIDS) : Define.
4414 (m_ALDERLAKE): Ditto.
4415 (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
4416 (processor_cost_table): Add sapphirerapids and alderlake.
4417 (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
4418 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
4419 * config/i386/i386.h
4420 (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
4421 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
4422 PROCESSOR_ALDERLAKE.
4424 (PTA_CLDEMOTE): Ditto.
4425 (PTA_SERIALIZE): Ditto.
4426 (PTA_TSXLDTRK): New.
4427 (PTA_SAPPHIRERAPIDS): Ditto.
4428 (PTA_ALDERLAKE): Ditto.
4429 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
4430 PROCESSOR_ALDERLAKE.
4431 * doc/extend.texi: Add sapphirerapids and alderlake.
4432 * doc/invoke.texi: Add sapphirerapids and alderlake.
4434 2020-07-10 Martin Liska <mliska@suse.cz>
4436 * dumpfile.c [profile-report]: Add new profile dump.
4437 * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report.
4438 * passes.c (pass_manager::dump_profile_report): Change stderr
4441 2020-07-10 Kewen Lin <linkw@linux.ibm.com>
4443 * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which
4444 is adjusted by considering peeled prologue for non
4445 vect_use_loop_mask_for_alignment_p cases.
4447 2020-07-09 Peter Bergner <bergner@linux.ibm.com>
4450 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA
4451 specific types __vector_quad and __vector_pair, and initialize the
4452 MMA built-ins if TARGET_EXTRA_BUILTINS is set.
4453 (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask.
4454 Remove now unneeded mask variable.
4455 * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the
4456 OPTION_MASK_MMA flag for power10 if not already set.
4458 2020-07-09 Richard Biener <rguenther@suse.de>
4460 PR tree-optimization/96133
4461 * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p
4462 status between stmts.
4464 2020-07-09 H.J. Lu <hjl.tools@gmail.com>
4467 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA.
4468 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New.
4469 (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256.
4470 (rsqrtv16sf2): Removed.
4472 2020-07-09 Richard Biener <rguenther@suse.de>
4474 * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove.
4475 (vect_slp_analyze_and_verify_instance_alignment): Rename to ...
4476 (vect_slp_analyze_instance_alignment): ... this.
4477 * tree-vect-data-refs.c (verify_data_ref_alignment): Remove.
4478 (vect_verify_datarefs_alignment): Likewise.
4479 (vect_enhance_data_refs_alignment): Do not call
4480 vect_verify_datarefs_alignment.
4481 (vect_slp_analyze_node_alignment): Rename from
4482 vect_slp_analyze_and_verify_node_alignment and do not
4483 call verify_data_ref_alignment.
4484 (vect_slp_analyze_instance_alignment): Rename from
4485 vect_slp_analyze_and_verify_instance_alignment.
4486 * tree-vect-stmts.c (vectorizable_store): Dump when
4487 we vectorize an unaligned access.
4488 (vectorizable_load): Likewise.
4489 * tree-vect-loop.c (vect_analyze_loop_2): Do not call
4490 vect_verify_datarefs_alignment.
4491 * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust.
4493 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
4495 PR tree-optimization/95804
4496 * tree-loop-distribution.c (break_alias_scc_partitions): Force
4497 negative post order to reduction partition.
4499 2020-07-09 Jakub Jelinek <jakub@redhat.com>
4501 * omp-general.h (struct omp_for_data): Add min_inner_iterations
4503 * omp-general.c (omp_extract_for_data): Initialize them and remember
4504 them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there.
4505 * omp-expand.c (expand_omp_for_init_counts): Fix up computation of
4506 counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST.
4507 (expand_omp_for_init_vars): For
4508 fd->first_nonrect + 1 == fd->last_nonrect loops with for now
4509 INTEGER_CST fd->loop.n2 find quadratic equation roots instead of
4510 using fallback method when possible.
4512 2020-07-09 Omar Tahir <omar.tahir@arm.com>
4514 * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
4515 last_moveable_pseudo before returning.
4517 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com>
4519 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
4520 __ARM_FEATURE_BTI_DEFAULT support.
4522 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
4524 * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
4526 * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
4527 stub registers class.
4528 (aarch64_class_max_nregs): Likewise.
4529 (aarch64_register_move_cost): Likewise.
4530 (aarch64_sls_shared_thunks): Global array to store stub labels.
4531 (aarch64_sls_emit_function_stub): New.
4532 (aarch64_create_blr_label): New.
4533 (aarch64_sls_emit_blr_function_thunks): New.
4534 (aarch64_sls_emit_shared_blr_thunks): New.
4535 (aarch64_asm_file_end): New.
4536 (aarch64_indirect_call_asm): New.
4537 (TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
4538 (TARGET_ASM_FUNCTION_EPILOGUE): Use
4539 aarch64_sls_emit_blr_function_thunks.
4540 * config/aarch64/aarch64.h (STB_REGNUM_P): New.
4541 (enum reg_class): Add STUB_REGS class.
4542 (machine_function): Introduce `call_via` array for
4543 function-local stub labels.
4544 * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
4545 aarch64_indirect_call_asm to emit code when hardening BLR
4547 * config/aarch64/constraints.md (Ucr): New constraint
4548 representing registers for indirect calls. Is GENERAL_REGS
4549 usually, and STUB_REGS when hardening BLR instruction against
4551 * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
4552 is also a general register.
4554 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
4556 * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
4557 * config/aarch64/aarch64.c (aarch64_output_casesi): Emit
4558 speculation barrier after BR instruction if needs be.
4559 (aarch64_trampoline_init): Handle ptr_mode value & adjust size
4561 (aarch64_sls_barrier): New.
4562 (aarch64_asm_trampoline_template): Add needed barriers.
4563 * config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
4565 (TRAMPOLINE_SIZE): Account for barrier.
4566 * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
4567 simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
4568 Emit barrier if needs be, also account for possible barrier using
4569 "sls_length" attribute.
4570 (sls_length): New attribute.
4571 (length): Determine default using any non-default sls_length
4574 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
4576 * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
4578 (aarch64_harden_sls_blr_p): New.
4579 * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
4581 (aarch64_harden_sls_retbr_p): New.
4582 (aarch64_harden_sls_blr_p): New.
4583 (aarch64_validate_sls_mitigation): New.
4584 (aarch64_override_options): Parse options for SLS mitigation.
4585 * config/aarch64/aarch64.opt (-mharden-sls): New option.
4586 * doc/invoke.texi: Document new option.
4588 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
4590 * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization
4591 with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION
4592 or nested-cycle reduction.
4594 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
4596 * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string
4597 for fully masking to be more common.
4599 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
4601 * config/riscv/riscv.md (get_thread_pointer<mode>): New.
4603 * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
4604 Document __builtin_thread_pointer.
4606 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
4608 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
4609 Abort if any arguments on stack.
4611 2020-07-08 Eric Botcazou <ebotcazou@adacore.com>
4613 * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if
4614 either type has reverse scalar storage order.
4615 * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through
4616 a memory copy if either type has reverse scalar storage order.
4618 2020-07-08 Tobias Burnus <tobias@codesourcery.com>
4620 * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic
4621 on to the native compiler, if used.
4622 * config/nvptx/mkoffload.c (compile_native, main): Likewise.
4624 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com>
4626 * config/rs6000/altivec.h (vec_vmsumudm): New define.
4627 * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
4628 (altivec_vmsumudm): New define_insn.
4629 * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
4630 entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
4631 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for
4632 ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
4633 * doc/extend.texi: Add document for vmsumudm behind vmsum.
4635 2020-07-08 Richard Biener <rguenther@suse.de>
4637 * tree-vect-stmts.c (get_group_load_store_type): Pass
4638 in the SLP node and the alignment support scheme output.
4640 (get_load_store_type): Likewise.
4641 (vectorizable_store): Adjust.
4642 (vectorizable_load): Likewise.
4644 2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
4647 * expr.c (expand_expr_real_2): Get the mode from the type rather
4648 than the rtx, and assert that it is consistent with the mode of
4649 the rtx (where known). Optimize all constant integers, not just
4650 those that can be represented in poly_int64.
4652 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
4654 * config/rs6000/vsx.md (len_load_v16qi): New define_expand.
4655 (len_store_v16qi): Likewise.
4657 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
4659 * doc/md.texi (len_load_@var{m}): Document.
4660 (len_store_@var{m}): Likewise.
4661 * internal-fn.c (len_load_direct): New macro.
4662 (len_store_direct): Likewise.
4663 (expand_len_load_optab_fn): Likewise.
4664 (expand_len_store_optab_fn): Likewise.
4665 (direct_len_load_optab_supported_p): Likewise.
4666 (direct_len_store_optab_supported_p): Likewise.
4667 (expand_mask_load_optab_fn): New macro. Original renamed to ...
4668 (expand_partial_load_optab_fn): ... here. Add handlings for
4670 (expand_mask_store_optab_fn): New macro. Original renamed to ...
4671 (expand_partial_store_optab_fn): ... here. Add handlings for
4673 (internal_load_fn_p): Handle IFN_LEN_LOAD.
4674 (internal_store_fn_p): Handle IFN_LEN_STORE.
4675 (internal_fn_stored_value_index): Handle IFN_LEN_STORE.
4676 * internal-fn.def (LEN_LOAD): New internal function.
4677 (LEN_STORE): Likewise.
4678 * optabs.def (len_load_optab, len_store_optab): New optab.
4680 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
4682 * config/aarch64/aarch64.c (thunderx2t99_regmove_cost,
4683 thunderx2t99_vector_cost): Likewise.
4685 2020-07-07 Richard Biener <rguenther@suse.de>
4687 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix
4688 group overlap condition to allow negative step DR groups.
4689 * tree-vect-stmts.c (get_group_load_store_type): For
4690 multi element SLP groups force VMAT_STRIDED_SLP when the step
4693 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com>
4695 * doc/generic.texi: Fix typo.
4697 2020-07-07 Richard Biener <rguenther@suse.de>
4699 * lto-streamer-out.c (cmp_symbol_files): Use the computed
4700 order map to sort symbols from the same sub-file together.
4701 (lto_output): Compute a map of sub-file to an order number
4702 it appears in the symbol output array.
4704 2020-07-06 Richard Biener <rguenther@suse.de>
4706 PR tree-optimization/96075
4707 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
4708 TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
4709 for the misalignment calculation for negative step.
4711 2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
4713 * config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
4714 (*vsub_addsi4): New instruction.
4716 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
4718 * config/cris/cris.md (movulsr): New peephole2.
4720 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
4722 * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"):
4723 Correct gcc_assert of overlapping operands.
4725 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
4727 * config/cris/cris.c (cris_select_cc_mode): Always return
4728 CC_NZmode for matching comparisons. Clarify comments.
4729 * config/cris/cris-modes.def: Clarify mode comment.
4730 * config/cris/cris.md (plusminus, plusminusumin, plusumin): New
4732 (addsub, addsubbo, nd): New code iterator attributes.
4733 ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code
4734 iterator constructs instead of match_operator constructs.
4735 ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from
4736 "*extop<mode>si<setnz>".
4737 ("*add<su>qihi_swap"): Similar from "*addxqihi_swap".
4738 ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from
4739 "*extop<mode>si<setnz>_swap".
4741 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
4743 * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap")
4744 ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate.
4746 2020-07-03 Eric Botcazou <ebotcazou@adacore.com>
4748 * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that
4749 were initially created for the assignment of a variable-sized
4750 object and whose source is now a string constant.
4751 * gimple-ssa-store-merging.c (struct merged_store_group): Document
4752 STRING_CST for rhs_code field.
4753 Add string_concatenation boolean field.
4754 (merged_store_group::merged_store_group): Initialize it as well as
4756 (merged_store_group::do_merge): Set it upon seeing a STRING_CST.
4757 Also set bit_insertion here upon seeing a BIT_INSERT_EXPR.
4758 (merged_store_group::apply_stores): Clear it for small regions.
4759 Do not create a power-of-2-sized buffer if it is still true.
4760 And do not set bit_insertion here again.
4761 (encode_tree_to_bitpos): Deal with BLKmode for the expression.
4762 (merged_store_group::can_be_merged_into): Deal with STRING_CST.
4763 (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion
4764 to true after changing MEM_REF stores into BIT_INSERT_EXPR stores.
4765 (count_multiple_uses): Return 0 for STRING_CST.
4766 (split_group): Do not split the group for a string concatenation.
4767 (imm_store_chain_info::output_merged_store): Constify and rename
4768 some local variables. Build an array type as destination type
4769 for a string concatenation, as well as a zero mask, and call
4770 build_string to build the source.
4771 (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR.
4772 (pass_store_merging::process_store): Accept STRING_CST on the RHS.
4773 * gimple.h (gimple_call_alloca_for_var_p): New accessor function.
4774 * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var.
4775 * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY.
4777 2020-07-03 Martin Jambor <mjambor@suse.cz>
4780 * ipa-sra.c (all_callee_accesses_present_p): Do not accept type
4781 mismatched accesses.
4783 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
4785 * config/nvptx/nvptx.md (popcount<mode>2): New instructions.
4786 (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions.
4788 2020-07-03 Martin Liska <mliska@suse.cz>
4789 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4792 * gcov-dump.c (tag_function): Use gcov_position_t
4795 2020-07-03 Richard Biener <rguenther@suse.de>
4797 PR tree-optimization/96037
4798 * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def.
4800 2020-07-03 Richard Biener <rguenther@suse.de>
4802 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the
4803 original non-pattern stmts, look at the pattern stmt
4804 vectorization status.
4806 2020-07-03 Andrew Stubbs <ams@codesourcery.com>
4808 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
4810 2020-07-03 Richard Biener <rguenther@suse.de>
4812 * tree-vectorizer.h (vec_info::insert_on_entry): New.
4813 (vec_info::insert_seq_on_entry): Likewise.
4814 * tree-vectorizer.c (vec_info::insert_on_entry): Implement.
4815 (vec_info::insert_seq_on_entry): Likewise.
4816 * tree-vect-stmts.c (vect_init_vector_1): Use
4817 vec_info::insert_on_entry.
4818 (vect_finish_stmt_generation): Set modified bit after
4820 * tree-vect-slp.c (vect_create_constant_vectors): Simplify
4821 by using vec_info::insert_seq_on_entry and bypassing
4823 (vect_schedule_slp_instance): Deal with all-constant
4826 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
4827 Tom de Vries <tdevries@suse.de>
4830 * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi
4831 to access TYPE_SIZE (type). Return at least the mode's alignment.
4833 2020-07-02 Richard Biener <rguenther@suse.de>
4835 PR tree-optimization/96028
4836 * tree-vect-slp.c (vect_slp_convert_to_external): Make sure
4837 we have scalar stmts to use.
4838 (vect_slp_analyze_node_operations): When analyzing a child
4839 failed try externalizing the parent node.
4841 2020-07-02 Martin Jambor <mjambor@suse.cz>
4844 * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust
4845 argument index if necessary.
4847 2020-07-02 Martin Liska <mliska@suse.cz>
4850 * tree-vect-generic.c (expand_vector_condition): Forward declaration.
4851 (expand_vector_comparison): Do not expand a comparison if all
4852 uses are consumed by a VEC_COND_EXPR.
4853 (expand_vector_operation): Change void return type to bool.
4854 (expand_vector_operations_1): Pass dce_ssa_names.
4856 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com>
4859 * system.h (NULL): Redefine to nullptr.
4861 2020-07-02 Jakub Jelinek <jakub@redhat.com>
4863 PR tree-optimization/95857
4864 * tree-cfg.c (group_case_labels_stmt): When removing an unreachable
4865 base_bb, remember all forced and non-local labels on it and later
4866 treat those as if they have NULL label_to_block. Formatting fix.
4869 2020-07-02 Richard Biener <rguenther@suse.de>
4871 PR tree-optimization/96022
4872 * tree-vect-stmts.c (vectorizable_shift): Only use the
4873 first vector stmt when extracting the scalar shift amount.
4874 * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary
4875 nodes with all-scalar children from scalars but not stores.
4876 (vect_analyze_slp_instance): Mark the node not failed.
4878 2020-07-02 Felix Yang <felix.yang@huawei.com>
4880 PR tree-optimization/95961
4881 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the
4882 number of scalars instead of the number of vectors as an upper bound
4883 for the loop saving info about DR in the hash table. Remove unused
4886 2020-07-02 Jakub Jelinek <jakub@redhat.com>
4888 * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with
4889 invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid
4890 OpenMP non-rectangular loops. Use XALLOCAVEC.
4892 2020-07-02 Martin Liska <mliska@suse.cz>
4894 PR gcov-profile/95348
4895 * coverage.c (read_counts_file): Read only COUNTERS that are
4897 * gcov-dump.c (tag_function): Change signature from unsigned to
4899 (tag_blocks): Likewise.
4900 (tag_arcs): Likewise.
4901 (tag_lines): Likewise.
4902 (tag_counters): Likewise.
4903 (tag_summary): Likewise.
4904 * gcov.c (read_count_file): Read all non-zero counters
4907 2020-07-02 Kito Cheng <kito.cheng@sifive.com>
4909 * config/riscv/multilib-generator (arch_canonicalize): Handle
4910 multi-letter extension.
4911 Using underline as separator between different extensions.
4913 2020-07-01 Pip Cet <pipcet@gmail.com>
4915 * spellcheck.c (test_data): Add problematic strings.
4916 (test_metric_conditions): Don't test the triangle inequality
4917 condition, which our distance function does not satisfy.
4919 2020-07-01 Omar Tahir <omar.tahir@arm.com>
4921 * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always
4922 generate a BTI instruction.
4924 2020-07-01 Jeff Law <law@redhat.com>
4926 PR tree-optimization/94882
4927 * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification.
4929 2020-07-01 Jeff Law <law@redhat.com>
4931 * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword.
4932 (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise.
4934 2020-07-01 Andrea Corallo <andrea.corallo@arm.com>
4936 * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums
4937 for 64bits fpsr/fpcr getter setters builtin variants.
4938 (aarch64_init_fpsr_fpcr_builtins): New function.
4939 (aarch64_general_init_builtins): Modify to make use of the later.
4940 (aarch64_expand_fpsr_fpcr_setter): New function.
4941 (aarch64_general_expand_builtin): Modify to make use of the later.
4942 * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>)
4943 (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and
4944 generalizing 'get_fpcr', 'set_fpsr'.
4945 * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int
4947 (fpscr_name): New int attribute.
4948 * doc/extend.texi (__builtin_aarch64_get_fpcr64)
4949 (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64)
4950 (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in
4953 2020-07-01 Martin Liska <mliska@suse.cz>
4955 * gcov.c (print_usage): Avoid trailing space for -j option.
4957 2020-07-01 Richard Biener <rguenther@suse.de>
4959 PR tree-optimization/95839
4960 * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing
4961 vectors are not uniform.
4962 (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of
4964 (vect_build_slp_tree_2): For groups of lane extracts
4965 from a vector register generate a permute node
4966 with a special child representing the pre-existing vector.
4967 (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing.
4968 (vect_slp_analyze_node_operations): Use SLP_TREE_LANES.
4969 (vectorizable_slp_permutation): Do not generate or cost identity
4971 (vect_schedule_slp_instance): Handle pre-existing vector
4972 that are function arguments.
4974 2020-07-01 Richard Biener <rguenther@suse.de>
4976 * system.h (INCLUDE_ISL): New guarded include.
4977 * graphite-dependences.c: Use it.
4978 * graphite-isl-ast-to-gimple.c: Likewise.
4979 * graphite-optimize-isl.c: Likewise.
4980 * graphite-poly.c: Likewise.
4981 * graphite-scop-detection.c: Likewise.
4982 * graphite-sese-to-poly.c: Likewise.
4983 * graphite.c: Likewise.
4984 * graphite.h: Drop the includes here.
4986 2020-07-01 Martin Liska <mliska@suse.cz>
4988 * gcov.c (print_usage): Shorted option description for -j
4991 2020-07-01 Martin Liska <mliska@suse.cz>
4993 * doc/gcov.texi: Rename 2 options.
4994 * gcov.c (print_usage): Rename -i,--json-format to
4995 -j,--json-format and -j,--human-readable to -H,--human-readable.
4996 (process_args): Fix up parsing. Document obsolete options and
4997 how are they changed.
4999 2020-07-01 Jeff Law <law@redhat.com>
5001 * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword.
5002 (pa_output_ascii): Likewise.
5004 2020-07-01 Kito Cheng <kito.cheng@sifive.com>
5006 * common/config/riscv/riscv-common.c (riscv_subset_t): New field
5008 (riscv_subset_list::parsing_subset_version): Add parameter for
5009 indicate explicitly version, and handle explicitly version.
5010 (riscv_subset_list::handle_implied_ext): Ditto.
5011 (riscv_subset_list::add): Ditto.
5012 (riscv_subset_t::riscv_subset_t): Init new field.
5013 (riscv_subset_list::to_string): Always output version info if version
5014 explicitly specified.
5015 (riscv_subset_list::parsing_subset_version): Handle explicitly
5017 (riscv_subset_list::parse_std_ext): Ditto.
5018 (riscv_subset_list::parse_multiletter_ext): Ditto.
5020 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
5024 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
5025 "Advanced SIMD type".
5026 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
5027 attributes are equal.
5028 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
5030 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
5031 in the "Advanced SIMD type" attribute.
5032 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
5033 attribute to each Advanced SIMD type, using the mangled type
5034 as the attribute's single argument.
5036 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
5039 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
5040 -mgeneral-regs-only is not used.
5042 2020-06-30 Yang Yang <yangyang305@huawei.com>
5044 PR tree-optimization/95855
5045 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
5046 checks to recognize a missed if-conversion opportunity when
5047 judging whether to duplicate a block.
5049 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
5051 * doc/extend.texi: Change references to "future architecture" to
5052 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
5053 references to "future" (because the future is now).
5055 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
5057 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
5059 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
5061 * simplify-rtx.c (simplify_distributive_operation): New function
5062 to un-distribute a binary operation of two binary operations.
5063 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
5064 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
5066 (test_scalar_int_ops): New function for unit self-testing
5067 scalar integer transformations in simplify-rtx.c.
5068 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
5069 (simplify_rtx_c_tests): Call test_scalar_ops.
5071 2020-06-29 Richard Biener <rguenther@suse.de>
5073 PR tree-optimization/95916
5074 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
5075 the case of not vectorized externals.
5077 2020-06-29 Richard Biener <rguenther@suse.de>
5079 * tree-vectorizer.h: Do not include <utility>.
5081 2020-06-29 Martin Liska <mliska@suse.cz>
5083 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
5084 instead of gimple_stmt_iterator::bb.
5085 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
5086 * tree-vectorizer.h: Likewise.
5088 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
5090 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
5091 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
5092 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
5093 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
5094 (gcn_dwarf_register_number): New function.
5095 (gcn_dwarf_register_span): New function.
5096 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
5098 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
5100 PR tree-optimization/95854
5101 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
5102 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
5103 unsigned HOST_WIDE_INT.
5105 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5107 * config/sparc/sparc.c (epilogue_renumber): Remove register.
5108 (sparc_print_operand_address): Likewise.
5109 (sparc_type_code): Likewise.
5110 (set_extends): Likewise.
5112 2020-06-29 Martin Liska <mliska@suse.cz>
5114 PR tree-optimization/92860
5115 * optc-save-gen.awk: Add exceptions for arc target.
5117 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
5119 * doc/sourcebuild.texi: Describe globbing of the
5120 dump file scanning commands "suffix" argument.
5122 2020-06-28 Martin Sebor <msebor@redhat.com>
5125 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
5127 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
5129 * tree.c (get_nonnull_args): Consider the this pointer implicitly
5131 * var-tracking.c (deps_vec): New type.
5132 (var_loc_dep_vec): New function.
5133 (VAR_LOC_DEP_VEC): Use it.
5135 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
5137 * internal-fn.c (direct_mask_load_optab_supported_p): Use
5138 convert_optab_supported_p instead of direct_optab_supported_p.
5139 (direct_mask_store_optab_supported_p): Likewise.
5141 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
5143 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
5144 simplify_using_ranges class.
5145 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
5146 field. Adjust all methods to use new field.
5147 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
5148 simplify_using_ranges class.
5149 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
5150 field. Adjust all methods to use new field.
5151 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
5152 (vrp_prop::vrp_finalize): New vrp_folder argument.
5153 (execute_vrp): Pass folder to vrp_finalize. Use
5154 simplify_using_ranges class.
5155 Remove cleanup_edges_and_switches call.
5156 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
5157 value_range_equiv uses to value_range.
5158 (simplify_using_ranges::op_with_boolean_value_range_p): Use
5159 simplify_using_ranges class.
5160 (check_for_binary_op_overflow): Make static.
5161 (vr_values::extract_range_basic): Pass this to
5162 check_for_binary_op_overflow.
5163 (compare_range_with_value): Change value_range_equiv uses to
5165 (vr_values::vr_values): Initialize simplifier field.
5166 Remove uses of to_remove_edges and to_update_switch_stmts.
5167 (vr_values::~vr_values): Remove uses of to_remove_edges and
5168 to_update_switch_stmts.
5169 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
5171 (vr_values::compare_name_with_value): Same.
5172 (vr_values::compare_names): Same.
5173 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
5174 (vr_values::vrp_evaluate_conditional): Same.
5175 (vr_values::vrp_visit_cond_stmt): Same.
5176 (find_case_label_ranges): Change value_range_equiv uses to
5178 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
5179 (vr_values::simplify_truth_ops_using_ranges): Move to
5180 simplify_using_ranges class.
5181 (vr_values::simplify_div_or_mod_using_ranges): Same.
5182 (vr_values::simplify_min_or_max_using_ranges): Same.
5183 (vr_values::simplify_abs_using_ranges): Same.
5184 (vr_values::simplify_bit_ops_using_ranges): Same.
5185 (test_for_singularity): Change value_range_equiv uses to
5187 (range_fits_type_p): Same.
5188 (vr_values::simplify_cond_using_ranges_1): Same.
5189 (vr_values::simplify_cond_using_ranges_2): Make extern.
5190 (vr_values::fold_cond): Move to simplify_using_ranges class.
5191 (vr_values::simplify_switch_using_ranges): Same.
5192 (vr_values::cleanup_edges_and_switches): Same.
5193 (vr_values::simplify_float_conversion_using_ranges): Same.
5194 (vr_values::simplify_internal_call_using_ranges): Same.
5195 (vr_values::two_valued_val_range_p): Same.
5196 (vr_values::simplify_stmt_using_ranges): Move to...
5197 (simplify_using_ranges::simplify): ...here.
5198 * vr-values.h (class vr_values): Move all the simplification of
5199 statements using ranges methods and code from here...
5200 (class simplify_using_ranges): ...to here.
5201 (simplify_cond_using_ranges_2): New extern prototype.
5203 2020-06-27 Jakub Jelinek <jakub@redhat.com>
5205 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
5206 member, move outer member.
5207 (struct omp_for_data): Add first_nonrect and last_nonrect members.
5208 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
5209 last_nonrect and non_rect_referenced members.
5210 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
5212 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
5213 non-rectangular loops.
5214 (extract_omp_for_update_vars): Likewise.
5215 (expand_omp_for_generic, expand_omp_for_static_nochunk,
5216 expand_omp_for_static_chunk, expand_omp_simd,
5217 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
5218 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
5219 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
5222 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
5225 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
5227 * config/i386/i386.c (ix86_frame_pointer_required): Update
5230 2020-06-26 Yichao Yu <yyc1992@gmail.com>
5232 * multiple_target.c (redirect_to_specific_clone): Fix tests
5233 to check individual attribute rather than an attribute list.
5235 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
5237 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
5238 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
5241 2020-06-26 Marek Polacek <polacek@redhat.com>
5243 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
5244 * doc/standards.texi (C Language): Correct the default dialect.
5245 (C++ Language): Update the default for C++ to gnu++17.
5247 2020-06-26 Eric Botcazou <ebotcazou@adacore.com>
5249 * tree-ssa-reassoc.c (dump_range_entry): New function.
5250 (debug_range_entry): New debug function.
5251 (update_range_test): Invoke dump_range_entry for dumping.
5252 (optimize_range_tests_to_bit_test): Merge the entry test in the
5253 bit test when possible and lower the profitability threshold.
5255 2020-06-26 Richard Biener <rguenther@suse.de>
5257 PR tree-optimization/95897
5258 * tree-vectorizer.h (vectorizable_induction): Remove
5259 unused gimple_stmt_iterator * parameter.
5260 * tree-vect-loop.c (vectorizable_induction): Likewise.
5261 (vect_analyze_loop_operations): Adjust.
5262 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
5263 (vect_transform_stmt): Likewise.
5264 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
5265 for fold-left reductions, clarify existing reduction case.
5267 2020-06-25 Nick Clifton <nickc@redhat.com>
5269 * config/m32r/m32r.md (movsicc): Disable pattern.
5271 2020-06-25 Richard Biener <rguenther@suse.de>
5273 PR tree-optimization/95839
5274 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
5275 check on the number of datarefs.
5277 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
5279 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
5280 the insn_data n_operands value to unsigned.
5282 2020-06-25 Richard Biener <rguenther@suse.de>
5284 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
5285 vector defs to determine insertion place.
5287 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
5290 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
5291 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
5292 (PTA_TIGERLAKE): Add PTA_CLWB.
5294 2020-06-25 Richard Biener <rguenther@suse.de>
5296 PR tree-optimization/95866
5297 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
5298 vectorized shift operands. For scalar shifts use lane zero
5299 of a vectorized shift operand.
5301 2020-06-25 Martin Liska <mliska@suse.cz>
5303 PR tree-optimization/95745
5305 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
5306 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
5308 * tree-vect-generic.c (expand_vector_condition): Remove dead
5309 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
5311 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
5314 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
5315 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
5316 (convert_4f32_8f16): New define_expand
5317 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
5319 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
5320 overloaded builtin entry.
5321 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
5322 (vsx_xvcvsphp): New define_insn.
5324 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
5325 Segher Boessenkool <segher@kernel.crashing.org>
5327 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
5329 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
5331 * simplify-rtx.c (simplify_unary_operation_1): Simplify
5332 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
5334 2020-06-24 Richard Biener <rguenther@suse.de>
5336 PR tree-optimization/95866
5337 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
5338 (vect_build_slp_tree_2): Properly reset matches[0],
5339 ignore uniform constants.
5341 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5344 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
5345 (cpu_indicator_init): Likewise.
5346 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
5348 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5351 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
5352 detection with AVX512BF16.
5354 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5357 * common/config/i386/i386-isas.h: New file. Extracted from
5358 gcc/config/i386/i386-builtins.c.
5359 (_isa_names_table): Add option.
5360 (ISA_NAMES_TABLE_START): New.
5361 (ISA_NAMES_TABLE_END): Likewise.
5362 (ISA_NAMES_TABLE_ENTRY): Likewise.
5363 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
5364 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
5365 from enum processor_features.
5366 * config/i386/driver-i386.c: Include
5367 "common/config/i386/cpuinfo.h" and
5368 "common/config/i386/i386-isas.h".
5369 (has_feature): New macro.
5370 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
5371 features. Use has_feature to detect processor features. Call
5372 Call get_intel_cpu to get the newer Intel CPU name. Use
5373 isa_names_table to generate command-line options.
5374 * config/i386/i386-builtins.c: Include
5375 "common/config/i386/i386-isas.h".
5376 (_arch_names_table): Removed.
5377 (isa_names_table): Likewise.
5379 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5382 * common/config/i386/cpuinfo.h: New file.
5383 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
5384 (__processor_model2): New.
5385 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
5386 (has_cpu_feature): New function.
5387 (set_cpu_feature): Likewise.
5388 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
5389 CHECK___builtin_cpu_is. Return AMD CPU name.
5390 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
5391 Use CHECK___builtin_cpu_is. Return Intel CPU name.
5392 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
5393 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
5394 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
5395 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
5396 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
5397 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
5398 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
5399 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
5400 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
5401 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
5402 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
5403 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
5404 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
5405 FEATURE_XSAVEOPT and FEATURE_XSAVES
5406 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
5407 Also update cpu_model2.
5408 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
5409 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
5410 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
5411 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
5412 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
5413 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
5414 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
5415 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
5416 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
5417 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
5418 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
5419 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
5420 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
5421 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
5422 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
5423 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
5424 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
5425 (SIZE_OF_CPU_FEATURES): New.
5426 * config/i386/i386-builtins.c (processor_features): Removed.
5427 (isa_names_table): Replace F_XXX with FEATURE_XXX.
5428 (fold_builtin_cpu): Change __cpu_features2 to an array.
5430 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5433 * common/config/i386/i386-common.c (processor_alias_table): Add
5434 processor model and priority to each entry.
5435 (pta_size): Updated with -6.
5436 (num_arch_names): New.
5437 * common/config/i386/i386-cpuinfo.h: New file.
5438 * config/i386/i386-builtins.c (feature_priority): Removed.
5439 (processor_model): Likewise.
5440 (_arch_names_table): Likewise.
5441 (arch_names_table): Likewise.
5442 (_isa_names_table): Replace P_ZERO with P_NONE.
5443 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
5444 processor_alias_table.
5445 (fold_builtin_cpu): Replace arch_names_table with
5446 processor_alias_table.
5447 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
5448 (pta): Add model and priority.
5449 (num_arch_names): New.
5451 2020-06-24 Richard Biener <rguenther@suse.de>
5453 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
5455 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
5456 Simplify for new position of vectorized SLP loads.
5457 (vect_slp_analyze_node_dependences): Adjust for it.
5458 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
5459 for the first stmts dataref.
5460 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
5461 (vect_schedule_slp_instance): Emit loads before the
5463 * tree-vect-stmts.c (vectorizable_load): Do what the comment
5464 says and use vect_find_first_scalar_stmt_in_slp.
5466 2020-06-24 Richard Biener <rguenther@suse.de>
5468 PR tree-optimization/95856
5469 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
5472 2020-06-24 Jakub Jelinek <jakub@redhat.com>
5475 * fold-const.c (fold_cond_expr_with_comparison): Optimize
5476 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
5478 2020-06-24 Jakub Jelinek <jakub@redhat.com>
5480 * omp-low.c (lower_omp_for): Fix two pastos.
5482 2020-06-24 Martin Liska <mliska@suse.cz>
5484 * optc-save-gen.awk: Compare string options in cl_optimization_compare
5487 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
5489 * config.gcc: Identify power10 as a 64-bit processor and as valid
5490 for --with-cpu and --with-tune.
5492 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
5494 * Makefile.in (LANG_MAKEFRAGS): Same.
5495 (tmake_file): Use -include.
5498 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
5500 * REVISION: Delete file meant for a private branch.
5502 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
5505 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
5506 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
5508 2020-06-23 Alexandre Oliva <oliva@adacore.com>
5510 * collect-utils.h (dumppfx): New.
5511 * collect-utils.c (dumppfx): Likewise.
5512 * lto-wrapper.c (run_gcc): Set global dumppfx.
5513 (compile_offload_image): Pass a -dumpbase on to mkoffload.
5514 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
5515 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
5517 (compile_native): Pass -dumpbase et al to compiler.
5518 * config/gcn/mkoffload.c (gcn_dumpbase): New.
5519 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
5520 save_temps. Pass -dumpbase et al to offload target compiler.
5521 (compile_native): Pass -dumpbase et al to compiler.
5523 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
5525 * REVISION: New file.
5527 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
5529 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
5530 Update comment for ISA 3.1.
5531 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
5532 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
5533 on AIX, and -mpower10 elsewhere.
5534 * config/rs6000/future.md: Delete.
5535 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
5537 * config/rs6000/power10.md: New file.
5538 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
5539 PPC_PLATFORM_FUTURE.
5540 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
5541 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
5542 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
5543 Use BU_P10_* instead of BU_FUTURE_*.
5544 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
5545 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
5546 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
5547 FUTURE_BUILTIN_VEC_XXEVAL.
5548 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
5549 Update compiler messages.
5550 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
5551 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
5552 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
5554 * config/rs6000/rs6000-string.c: Ditto.
5555 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
5556 instead of "future", reorder it to right after "power9".
5557 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
5558 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
5559 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
5560 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
5561 not ISA_FUTURE_MASKS_SERVER.
5562 (rs6000_opt_masks): Use "power10" instead of "future".
5563 (rs6000_builtin_mask_names): Ditto.
5564 (rs6000_disable_incompatible_switches): Ditto.
5565 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
5566 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
5567 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
5568 not RS6000_BTM_FUTURE.
5569 * config/rs6000/rs6000.md: Use "power10", not "future". Use
5570 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
5572 * config/rs6000/rs6000.opt (mfuture): Delete.
5574 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
5575 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
5577 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
5579 * coretypes.h (first_type): Delete.
5580 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
5582 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5584 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
5585 (arm_mve_hw): Likewise.
5587 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
5590 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
5593 2020-06-22 Richard Biener <rguenther@suse.de>
5595 PR tree-optimization/95770
5596 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
5599 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
5601 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
5602 (gcn_return_in_memory): Return vectors in memory.
5604 2020-06-22 Jakub Jelinek <jakub@redhat.com>
5606 * omp-general.c (omp_extract_for_data): For triangular loops with
5607 all loop invariant expressions constant where the innermost loop is
5608 executed at least once compute number of iterations at compile time.
5610 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
5612 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
5613 (DRIVER_SELF_SPECS): New.
5615 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
5617 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
5618 (RISCV_FTYPE_ATYPES0): New.
5619 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
5620 * config/riscv/riscv-ftypes.def: Remove VOID argument.
5622 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
5624 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
5625 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
5628 (ASM_CPU_SPEC): Remove vsx and altivec options.
5629 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
5632 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
5633 (TARGET_DEFAULT): Only define if not BIARCH.
5634 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
5637 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
5640 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
5641 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
5643 (CPLUSPLUS_CPP_SPEC): Same.
5646 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
5647 * config/rs6000/defaultaix64.h: New file.
5648 * config/rs6000/t-aix64: New file.
5650 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
5652 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
5653 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
5654 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
5656 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
5657 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
5658 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
5659 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
5660 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
5661 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
5662 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
5663 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
5664 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
5665 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
5666 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
5667 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
5668 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
5669 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
5670 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
5671 Allow zero constants.
5672 (print_operand) <case 'A'>: New output modifier.
5673 (rs6000_split_multireg_move): Add support for inserting accumulator
5674 priming and depriming instructions. Add support for splitting an
5675 assemble accumulator pattern.
5676 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
5677 rs6000_gimple_fold_mma_builtin): New functions.
5678 (RS6000_BUILTIN_M): New macro.
5679 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
5680 (bdesc_mma): Add new MMA built-in support.
5681 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
5682 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
5684 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
5685 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
5686 and rs6000_gimple_fold_mma_builtin.
5687 (rs6000_expand_builtin): Call mma_expand_builtin.
5688 Use RS6000_BTC_OPND_MASK.
5689 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
5690 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
5691 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
5692 VSX_BUILTIN_XVCVBF16SP.
5693 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
5694 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
5695 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
5696 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
5697 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
5698 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
5699 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
5700 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
5701 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
5702 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
5703 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
5704 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
5705 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
5706 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
5707 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
5708 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
5709 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
5710 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
5711 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
5712 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
5713 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
5714 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
5715 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
5716 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
5717 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
5718 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
5719 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
5720 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
5721 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
5722 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
5723 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
5724 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
5725 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
5726 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
5727 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
5728 MMA_AVVI4I4I4): New define_int_iterator.
5729 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
5730 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
5731 avvi4i4i4): New define_int_attr.
5732 (*movpxi): Add zero constant alternative.
5733 (mma_assemble_pair, mma_assemble_acc): New define_expand.
5734 (*mma_assemble_acc): New define_insn_and_split.
5735 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
5736 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
5737 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
5738 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
5739 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
5740 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
5741 (UNSPEC_VSX_XVCVSPBF16): Likewise.
5742 (XVCVBF16): New define_int_iterator.
5743 (xvcvbf16): New define_int_attr.
5744 (vsx_<xvcvbf16>): New define_insn.
5745 * doc/extend.texi: Document the mma built-ins.
5747 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
5748 Michael Meissner <meissner@linux.ibm.com>
5750 * config/rs6000/mma.md: New file.
5751 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
5753 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
5754 for __vector_pair and __vector_quad types.
5755 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
5757 (POWERPC_MASKS): Likewise.
5758 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
5759 (POI, PXI): New partial integer modes.
5760 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
5761 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
5762 (rs6000_hard_regno_mode_ok_uncached): Likewise.
5763 Add support for POImode being allowed in VSX registers and PXImode
5764 being allowed in FP registers.
5765 (rs6000_modes_tieable_p): Adjust comment.
5766 Add support for POImode and PXImode.
5767 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
5768 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
5769 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
5770 Set up appropriate addr_masks for vector pair and vector quad addresses.
5771 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
5772 vector quad registers. Setup reload handlers for POImode and PXImode.
5773 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
5774 (rs6000_option_override_internal): Error if -mmma is specified
5775 without -mcpu=future.
5776 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
5777 (quad_address_p): Change size test to less than 16 bytes.
5778 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
5779 and vector quad instructions.
5780 (avoiding_indexed_address_p): Likewise.
5781 (rs6000_emit_move): Disallow POImode and PXImode moves involving
5783 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
5784 and FP registers for PXImode.
5785 (rs6000_split_multireg_move): Support splitting POImode and PXImode
5787 (rs6000_mangle_type): Adjust comment. Add support for mangling
5788 __vector_pair and __vector_quad types.
5789 (rs6000_opt_masks): Add entry for mma.
5790 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
5791 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
5792 (address_to_insn_form): Likewise.
5793 (reg_to_non_prefixed): Likewise.
5794 (rs6000_invalid_conversion): New function.
5795 * config/rs6000/rs6000.h (MASK_MMA): Define.
5796 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
5797 (VECTOR_ALIGNMENT_P): New helper macro.
5798 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
5799 (RS6000_BTM_MMA): Define.
5800 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
5801 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
5802 RS6000_BTI_vector_quad.
5803 (vector_pair_type_node): New.
5804 (vector_quad_type_node): New.
5805 * config/rs6000/rs6000.md: Include mma.md.
5806 (define_mode_iterator RELOAD): Add POI and PXI.
5807 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
5808 * config/rs6000/rs6000.opt (-mmma): New.
5809 * doc/invoke.texi: Document -mmma.
5811 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
5813 PR tree-optimization/95638
5814 * tree-loop-distribution.c (pg_edge_callback_data): New field.
5815 (loop_distribution::break_alias_scc_partitions): Record and restore
5816 postorder information. Fix memory leak.
5818 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
5820 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
5821 (output_file_start): Use const 'char *'.
5823 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
5825 PR tree-optimization/94880
5826 * match.pd (A | B) - B -> (A & ~B): New simplification.
5828 2020-06-19 Richard Biener <rguenther@suse.de>
5830 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
5831 for lane permutations.
5833 2020-06-19 Richard Biener <rguenther@suse.de>
5835 PR tree-optimization/95761
5836 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
5837 vectorized stmts for finding the last one.
5839 2020-06-18 Felix Yang <felix.yang@huawei.com>
5841 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
5842 vect_relevant_for_alignment_p to filter out data references in
5843 the loop whose alignment is irrelevant when trying loop peeling
5846 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
5848 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
5849 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5850 mode iterator for the first operand of ZERO_EXTRACT RTX.
5851 Change ext_register_operand predicate to register_operand.
5852 Rename from *cmpqi_ext_1.
5853 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
5854 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
5855 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
5856 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5857 (*extv<mode>): Use SWI24 mode iterator for the first operand
5858 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5859 to register_operand.
5860 (*extzv<mode>): Use SWI248 mode iterator for the first operand
5861 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5862 to register_operand.
5863 (*extzvqi): Use SWI248 mode iterator instead of SImode for
5864 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
5865 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
5867 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
5868 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5869 mode iterator for the first operand of ZERO_EXTRACT RTX.
5870 Change ext_register_operand predicate to register_operand.
5871 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
5872 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
5874 (*insvqi_1): Use SWI248 mode iterator instead of SImode
5875 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
5876 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
5877 predicate to register_operand.
5880 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
5881 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5882 mode iterator for the first operand of ZERO_EXTRACT RTX.
5883 Change ext_register_operand predicate to register_operand.
5884 (addqi_ext_1): New expander.
5885 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5886 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5887 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5888 to register_operand. Rename from *addqi_ext_1.
5889 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
5890 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5891 (udivmodqi4): Ditto.
5892 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5893 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5894 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5895 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5896 to register_operand. Rename from *testqi_ext_1.
5897 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
5898 (andqi_ext_1): New expander.
5899 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5900 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5901 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5902 to register_operand. Rename from andqi_ext_1.
5903 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
5904 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
5905 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
5906 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
5907 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5908 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
5909 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5910 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5911 to register_operand. Rename from *xorqi_ext_1_cc.
5912 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
5913 in mode, matching its first operand.
5914 (promote_duplicated_reg): Update for renamed insv<mode>_1.
5915 * config/i386/predicates.md (ext_register_operand): Remove predicate.
5917 2020-06-18 Martin Sebor <msebor@redhat.com>
5921 * builtins.c (compute_objsize): Remove call to
5922 compute_builtin_object_size and instead compute conservative sizes
5925 2020-06-18 Martin Liska <mliska@suse.cz>
5927 * coretypes.h (struct iterator_range): New type.
5928 * tree-vect-patterns.c (vect_determine_precisions): Use
5929 range-based iterator.
5930 (vect_pattern_recog): Likewise.
5931 * tree-vect-slp.c (_bb_vec_info): Likewise.
5932 (_bb_vec_info::~_bb_vec_info): Likewise.
5933 (vect_slp_check_for_constructors): Likewise.
5934 * tree-vectorizer.h:Add new iterators
5935 and functions that use it.
5937 2020-06-18 Martin Liska <mliska@suse.cz>
5939 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
5940 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
5941 of a VEC_COND_EXPR cannot be tcc_comparison and so that
5942 a SSA_NAME needs to be created before we use it for the first
5943 argument of the VEC_COND_EXPR.
5944 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
5946 2020-06-18 Richard Biener <rguenther@suse.de>
5949 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
5950 to the target if necessary.
5951 (expand_vect_cond_mask_optab_fn): Likewise.
5953 2020-06-18 Martin Liska <mliska@suse.cz>
5955 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
5956 vcond as we check for NULL pointer.
5958 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
5960 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
5961 silence empty-body warning with gcc_fallthrough.
5963 2020-06-18 Jakub Jelinek <jakub@redhat.com>
5965 PR tree-optimization/95699
5966 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
5967 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
5968 declarations to the statements that set them where possible.
5970 2020-06-18 Jakub Jelinek <jakub@redhat.com>
5973 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
5974 scalar mode halfvectype other than vector boolean for
5975 VEC_PACK_TRUNC_EXPR.
5977 2020-06-18 Richard Biener <rguenther@suse.de>
5979 * varasm.c (assemble_variable): Make sure to not
5980 defer output when outputting addressed constants.
5981 (output_constant_def_contents): Likewise.
5982 (add_constant_to_table): Take and pass on whether to
5984 (output_addressed_constants): Likewise.
5985 (output_constant_def): Pass on whether to defer output
5986 to add_constant_to_table.
5987 (tree_output_constant_def): Defer output of constants.
5989 2020-06-18 Richard Biener <rguenther@suse.de>
5991 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
5992 (_slp_tree::lane_permutation): New member.
5993 (_slp_tree::code): Likewise.
5994 (SLP_TREE_TWO_OPERATORS): Remove.
5995 (SLP_TREE_LANE_PERMUTATION): New.
5996 (SLP_TREE_CODE): Likewise.
5997 (vect_stmt_dominates_stmt_p): Declare.
5998 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
5999 * tree-vect-stmts.c (vect_model_simple_cost): Remove
6000 SLP_TREE_TWO_OPERATORS handling.
6001 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
6002 (_slp_tree::~_slp_tree): Likewise.
6003 (vect_two_operations_perm_ok_p): Remove.
6004 (vect_build_slp_tree_1): Remove verification of two-operator
6006 (vect_build_slp_tree_2): When we have two different operators
6007 build two computation SLP nodes and a blend.
6008 (vect_print_slp_tree): Print the lane permutation if it exists.
6009 (slp_copy_subtree): Copy it.
6010 (vect_slp_rearrange_stmts): Re-arrange it.
6011 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
6012 VEC_PERM_EXPR explicitely.
6013 (vect_schedule_slp_instance): Likewise. Remove old
6014 SLP_TREE_TWO_OPERATORS code.
6015 (vectorizable_slp_permutation): New function.
6017 2020-06-18 Martin Liska <mliska@suse.cz>
6019 * tree-vect-generic.c (expand_vector_condition): Check
6020 for gassign before inspecting RHS.
6022 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
6024 * gimplify.c (omp_notice_threadprivate_variable)
6025 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
6026 diagnostic. Adjust all users.
6028 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
6030 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
6031 NULL_TREE' check earlier.
6033 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
6035 * doc/extend.texi (attribute access): Fix a typo.
6037 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
6038 Kaipeng Zhou <zhoukaipeng3@huawei.com>
6040 PR tree-optimization/95199
6041 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
6042 strided load/store operations and remove redundant code.
6044 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
6046 * coretypes.h (first_type): New alias template.
6047 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
6048 Remove spurious “...” and split the function type out into a typedef.
6050 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
6052 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
6055 2020-06-17 Richard Biener <rguenther@suse.de>
6057 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
6058 in *vectype parameter.
6059 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
6060 vect_build_slp_tree_1 computed.
6061 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
6062 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
6063 (vect_schedule_slp_instance): Likewise.
6064 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
6065 from SLP_TREE_VECTYPE.
6067 2020-06-17 Richard Biener <rguenther@suse.de>
6069 PR tree-optimization/95717
6070 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
6071 Move BB SSA updating before exit/latch PHI current def copying.
6073 2020-06-17 Martin Liska <mliska@suse.cz>
6075 * Makefile.in: Add new file.
6076 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
6077 not meet this condition.
6078 (do_store_flag): Likewise.
6079 * gimplify.c (gimplify_expr): Gimplify first argument of
6080 VEC_COND_EXPR to be a SSA name.
6081 * internal-fn.c (vec_cond_mask_direct): New.
6082 (vec_cond_direct): Likewise.
6083 (vec_condu_direct): Likewise.
6084 (vec_condeq_direct): Likewise.
6085 (expand_vect_cond_optab_fn): New.
6086 (expand_vec_cond_optab_fn): Likewise.
6087 (expand_vec_condu_optab_fn): Likewise.
6088 (expand_vec_condeq_optab_fn): Likewise.
6089 (expand_vect_cond_mask_optab_fn): Likewise.
6090 (expand_vec_cond_mask_optab_fn): Likewise.
6091 (direct_vec_cond_mask_optab_supported_p): Likewise.
6092 (direct_vec_cond_optab_supported_p): Likewise.
6093 (direct_vec_condu_optab_supported_p): Likewise.
6094 (direct_vec_condeq_optab_supported_p): Likewise.
6095 * internal-fn.def (VCOND): New OPTAB.
6097 (VCONDEQ): Likewise.
6098 (VCOND_MASK): Likewise.
6099 * optabs.c (get_rtx_code): Make it global.
6100 (expand_vec_cond_mask_expr): Removed.
6101 (expand_vec_cond_expr): Removed.
6102 * optabs.h (expand_vec_cond_expr): Likewise.
6103 (vector_compare_rtx): Make it global.
6104 * passes.def: Add new pass_gimple_isel pass.
6105 * tree-cfg.c (verify_gimple_assign_ternary): Add check
6106 for VEC_COND_EXPR about first argument.
6107 * tree-pass.h (make_pass_gimple_isel): New.
6108 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
6109 propagation of the first argument of a VEC_COND_EXPR.
6110 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
6111 first argument of a VEC_COND_EXPR.
6112 (optimize_vec_cond_expr): Likewise.
6113 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
6114 for a first argument of created VEC_COND_EXPR.
6115 (expand_vector_condition): Fix coding style.
6116 * tree-vect-stmts.c (vectorizable_condition): Gimplify
6118 * gimple-isel.cc: New file.
6120 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
6122 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
6123 (BSS_SECTION_ASM_OP): Use ".bss".
6124 (ASM_SPEC): Remove "-mattr=-code-object-v3".
6125 (LINK_SPEC): Add "--export-dynamic".
6126 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
6127 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
6128 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
6129 (load_image): Remove obsolete relocation handling.
6130 Add ".kd" suffix to the symbol names.
6131 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
6132 (gcn_option_override): Update gcn_isa test.
6133 (gcn_kernel_arg_types): Update all the assembler directives.
6134 Remove the obsolete options.
6135 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
6136 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
6138 (output_file_start): Rework assembler file header.
6139 (gcn_hsa_declare_function_name): Rework kernel metadata.
6140 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
6141 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
6142 (PROCESSOR_VEGA10): New enum value.
6143 (PROCESSOR_VEGA20): New enum value.
6145 2020-06-17 Martin Liska <mliska@suse.cz>
6147 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
6149 * gcov-tool.c (print_version): Likewise.
6150 * gcov.c (print_version): Likewise.
6152 2020-06-17 liuhongt <hongtao.liu@intel.com>
6155 * config/i386/i386-expand.c
6156 (ix86_expand_vec_shift_qihi_constant): New function.
6157 * config/i386/i386-protos.h
6158 (ix86_expand_vec_shift_qihi_constant): Declare.
6159 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
6160 V*QImode by constant.
6162 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
6164 PR tree-optimization/95649
6165 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
6166 value is a constant.
6168 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6170 * config.in: Regenerate.
6171 * config/s390/s390.c (print_operand): Emit vector alignment hints
6172 for target z13, if AS accepts them. For other targets the logic
6174 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
6176 * configure: Regenerate.
6177 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
6179 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6181 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
6183 (__arm_vaddq_m_n_s32): Likewise.
6184 (__arm_vaddq_m_n_s16): Likewise.
6185 (__arm_vaddq_m_n_u8): Likewise.
6186 (__arm_vaddq_m_n_u32): Likewise.
6187 (__arm_vaddq_m_n_u16): Likewise.
6188 (__arm_vaddq_m): Modify polymorphic variant.
6190 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6192 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
6193 and constraint of all the operands.
6194 (mve_sqrshrl_sat<supf>_di): Likewise.
6195 (mve_uqrshl_si): Likewise.
6196 (mve_sqrshr_si): Likewise.
6197 (mve_uqshll_di): Likewise.
6198 (mve_urshrl_di): Likewise.
6199 (mve_uqshl_si): Likewise.
6200 (mve_urshr_si): Likewise.
6201 (mve_sqshl_si): Likewise.
6202 (mve_srshr_si): Likewise.
6203 (mve_srshrl_di): Likewise.
6204 (mve_sqshll_di): Likewise.
6205 * config/arm/predicates.md (arm_low_register_operand): Define.
6207 2020-06-16 Jakub Jelinek <jakub@redhat.com>
6209 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
6210 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
6211 or dist_schedule clause on non-rectangular loops. Handle
6212 gimplification of non-rectangular lb/b expressions. When changing
6213 iteration variable, adjust also non-rectangular lb/b expressions
6215 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
6217 (struct omp_for_data): Add non_rect member.
6218 * omp-general.c (omp_extract_for_data): Handle non-rectangular
6219 loops. Fill in non_rect, m1, m2 and outer.
6220 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
6221 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
6222 non-rectangular loop cases and assert for cases that can't be
6224 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
6225 (dump_omp_loop_non_rect_expr): New function.
6226 (dump_generic_node): Handle non-rectangular OpenMP loops.
6227 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
6228 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
6231 2020-06-16 Richard Biener <rguenther@suse.de>
6234 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
6236 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
6239 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
6240 assertion and turn it into a early exit check.
6242 2020-06-15 Eric Botcazou <ebotcazou@adacore.com>
6244 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
6245 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
6246 true and all elements are zero, then always clear. Return GS_ERROR
6247 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
6248 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
6249 the type is aggregate non-addressable, ask gimplify_init_constructor
6250 whether it can generate a single access to the target.
6252 2020-06-15 Eric Botcazou <ebotcazou@adacore.com>
6254 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
6255 access on the LHS is replaced with a scalar access, propagate the
6256 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
6258 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
6260 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
6261 TARGET_THREADPTR reference.
6262 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
6263 targetm.have_tls instead of TARGET_HAVE_TLS.
6264 (xtensa_option_override): Set targetm.have_tls to false in
6265 configurations without THREADPTR.
6267 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
6269 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
6271 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
6272 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
6273 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
6274 xtensa_windowed_abi if needed.
6275 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
6277 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
6278 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
6280 (mabi=call0, mabi=windowed): New options.
6281 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
6283 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
6285 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
6286 (TARGET_CAN_ELIMINATE): New macro.
6287 * config/xtensa/xtensa.h
6288 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
6289 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
6290 (HARD_FRAME_POINTER_REGNUM): Define using
6291 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
6292 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
6293 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
6294 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
6296 2020-06-15 Felix Yang <felix.yang@huawei.com>
6298 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
6299 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
6301 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
6303 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
6304 LOOP_VINFO_DATAREFS when possible.
6305 (update_epilogue_loop_vinfo): Likewise.
6307 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
6309 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
6311 (riscv_gpr_save_operation_p): Change type to unsigned for i and
6314 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
6317 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
6319 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
6320 * config/i386/sse.md (mul<mode>3): Drop mask_name since
6321 there's no real simd int8 multiplication instruction with
6322 mask. Also optimize it under TARGET_AVX512BW.
6323 (mulv8qi3): New expander.
6325 2020-06-12 Marco Elver <elver@google.com>
6327 * gimplify.c (gimplify_function_tree): Optimize and do not emit
6328 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
6329 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
6330 * tsan.c (instrument_memory_accesses): Make
6331 fentry_exit_instrument bool depend on new param.
6333 2020-06-12 Felix Yang <felix.yang@huawei.com>
6335 PR tree-optimization/95570
6336 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
6337 (vect_verify_datarefs_alignment): Call it to filter out data references
6338 in the loop whose alignment is irrelevant.
6339 (vect_get_peeling_costs_all_drs): Likewise.
6340 (vect_peeling_supportable): Likewise.
6341 (vect_enhance_data_refs_alignment): Likewise.
6343 2020-06-12 Richard Biener <rguenther@suse.de>
6345 PR tree-optimization/95633
6346 * tree-vect-stmts.c (vectorizable_condition): Properly
6347 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
6349 2020-06-12 Martin Liška <mliska@suse.cz>
6351 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
6352 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
6354 * lto-wrapper.c (merge_and_complain): Wrap option names.
6356 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
6358 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
6359 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
6360 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
6361 (vect_set_loop_condition_masked): Renamed to ...
6362 (vect_set_loop_condition_partial_vectors): ... this. Rename
6363 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
6364 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
6365 (vect_set_loop_condition_unmasked): Renamed to ...
6366 (vect_set_loop_condition_normal): ... this.
6367 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
6368 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
6369 to vect_set_loop_condition_partial_vectors.
6370 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
6371 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
6372 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
6374 (vect_analyze_loop_costing): ... this.
6375 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
6377 (vect_min_prec_for_max_niters): New, factored out from ...
6378 (vect_verify_full_masking): ... this. Rename
6379 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
6380 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
6381 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
6382 (vectorizable_reduction): Update some dumpings with partial
6383 vectors instead of fully-masked.
6384 (vectorizable_live_operation): Likewise.
6385 (vect_iv_limit_for_full_masking): Renamed to ...
6386 (vect_iv_limit_for_partial_vectors): ... this.
6387 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
6388 (check_load_store_for_partial_vectors): ... this. Update some
6389 dumpings with partial vectors instead of fully-masked.
6390 (vectorizable_store): Rename check_load_store_masking to
6391 check_load_store_for_partial_vectors.
6392 (vectorizable_load): Likewise.
6393 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
6394 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
6395 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
6396 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
6397 (vect_iv_limit_for_full_masking): Renamed to ...
6398 (vect_iv_limit_for_partial_vectors): this.
6399 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
6400 Rename iv_type to rgroup_iv_type.
6402 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
6404 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
6405 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
6406 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
6407 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
6408 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
6409 (insn_gen_fn::operator()): Replace overloaded definitions with
6410 a parameter-pack version.
6412 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
6415 * config/i386/i386-features.c (rest_of_insert_endbranch):
6417 (rest_of_insert_endbr_and_patchable_area): Change return type
6418 to void. Add need_endbr and patchable_area_size arguments.
6419 Don't call timevar_push nor timevar_pop. Replace
6420 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
6421 UNSPECV_PATCHABLE_AREA for patchable area.
6422 (pass_data_insert_endbranch): Renamed to ...
6423 (pass_data_insert_endbr_and_patchable_area): This. Change
6424 pass name to endbr_and_patchable_area.
6425 (pass_insert_endbranch): Renamed to ...
6426 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
6427 and patchable_area_size;.
6428 (pass_insert_endbr_and_patchable_area::gate): Set and check
6429 need_endbr and patchable_area_size.
6430 (pass_insert_endbr_and_patchable_area::execute): Call
6431 timevar_push and timevar_pop. Pass need_endbr and
6432 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
6433 (make_pass_insert_endbranch): Renamed to ...
6434 (make_pass_insert_endbr_and_patchable_area): This.
6435 * config/i386/i386-passes.def: Replace pass_insert_endbranch
6436 with pass_insert_endbr_and_patchable_area.
6437 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
6438 (make_pass_insert_endbranch): Renamed to ...
6439 (make_pass_insert_endbr_and_patchable_area): This.
6440 * config/i386/i386.c (ix86_asm_output_function_label): Set
6441 function_label_emitted to true.
6442 (ix86_print_patchable_function_entry): New function.
6443 (ix86_output_patchable_area): Likewise.
6444 (x86_function_profiler): Replace endbr_queued_at_entrance with
6445 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
6446 Call ix86_output_patchable_area to generate patchable area if
6448 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
6449 * config/i386/i386.h (queued_insn_type): New.
6450 (machine_function): Add function_label_emitted. Replace
6451 endbr_queued_at_entrance with insn_queued_at_entrance.
6452 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
6453 (patchable_area): New.
6455 2020-06-11 Martin Liska <mliska@suse.cz>
6457 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
6460 2020-06-11 Martin Liska <mliska@suse.cz>
6463 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
6466 2020-06-11 Martin Liska <mliska@suse.cz>
6467 Jakub Jelinek <jakub@redhat.com>
6470 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
6471 by using Pmode instead of ptr_mode.
6473 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
6475 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
6476 (vect_set_loop_control): ... this.
6477 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
6478 (vect_set_loop_masks_directly): Renamed to ...
6479 (vect_set_loop_controls_directly): ... this. Also rename some
6480 variables with ctrl instead of mask. Rename vect_set_loop_mask to
6481 vect_set_loop_control.
6482 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
6483 Also rename some variables with ctrl instead of mask.
6484 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
6485 (release_vec_loop_controls): ... this. Rename rgroup_masks related
6487 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
6488 release_vec_loop_controls.
6489 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
6490 (vect_get_max_nscalars_per_iter): Likewise.
6491 (vect_estimate_min_profitable_iters): Likewise.
6492 (vect_record_loop_mask): Likewise.
6493 (vect_get_loop_mask): Likewise.
6494 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
6495 (struct rgroup_controls): ... this. Also rename mask_type
6496 to type and rename masks to controls.
6498 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
6500 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
6501 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
6502 (vect_gen_vector_loop_niters): Likewise.
6503 (vect_do_peeling): Likewise.
6504 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
6505 fully_masked_p to using_partial_vectors_p.
6506 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
6507 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
6508 (determine_peel_for_niter): Likewise.
6509 (vect_estimate_min_profitable_iters): Likewise.
6510 (vect_transform_loop): Likewise.
6511 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
6512 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
6514 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
6516 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
6517 can_fully_mask_p to can_use_partial_vectors_p.
6518 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
6519 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
6520 to saved_can_use_partial_vectors_p.
6521 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
6522 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
6523 (vectorizable_live_operation): Likewise.
6524 * tree-vect-stmts.c (permute_vec_elements): Likewise.
6525 (check_load_store_masking): Likewise.
6526 (vectorizable_operation): Likewise.
6527 (vectorizable_store): Likewise.
6528 (vectorizable_load): Likewise.
6529 (vectorizable_condition): Likewise.
6530 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
6531 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
6532 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
6534 2020-06-11 Martin Liska <mliska@suse.cz>
6536 * optc-save-gen.awk: Quote error string.
6538 2020-06-11 Alexandre Oliva <oliva@adacore.com>
6540 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
6542 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
6544 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
6545 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
6547 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
6548 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
6550 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
6552 * config/riscv/predicates.md (gpr_save_operation): New.
6553 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
6554 (riscv_gpr_save_operation_p): Ditto.
6555 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
6556 Ignore USEs for gpr_save patter.
6557 * config/riscv/riscv.c (gpr_save_reg_order): New.
6558 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
6559 (riscv_gen_gpr_save_insn): New.
6560 (riscv_gpr_save_operation_p): Ditto.
6561 * config/riscv/riscv.md (S3_REGNUM): New.
6568 (S10_REGNUM): Ditto.
6569 (S11_REGNUM): Ditto.
6570 (gpr_save): Model USEs correctly.
6572 2020-06-10 Martin Sebor <msebor@redhat.com>
6576 * builtins.c (inform_access): New function.
6577 (check_access): Call it. Add argument.
6578 (addr_decl_size): Remove.
6579 (get_range): New function.
6580 (compute_objsize): New overload. Only use compute_builtin_object_size
6581 with raw memory function.
6582 (check_memop_access): Pass new argument to compute_objsize and
6584 (expand_builtin_memchr, expand_builtin_strcat): Same.
6585 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
6586 (expand_builtin_stpncpy, check_strncat_sizes): Same.
6587 (expand_builtin_strncat, expand_builtin_strncpy): Same.
6588 (expand_builtin_memcmp): Same.
6589 * builtins.h (check_nul_terminated_array): Declare extern.
6590 (check_access): Add argument.
6591 (struct access_ref, struct access_data): New structs.
6592 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
6593 (builtin_access::overlap): Call it.
6594 * tree-object-size.c (decl_init_size): Declare extern.
6595 (addr_object_size): Correct offset computation.
6596 * tree-object-size.h (decl_init_size): Declare.
6597 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
6598 to maybe_warn_overflow when assigning to an SSA_NAME.
6600 2020-06-10 Richard Biener <rguenther@suse.de>
6602 * tree-vect-loop.c (vect_determine_vectorization_factor):
6604 (_loop_vec_info::_loop_vec_info): Likewise.
6605 (vect_update_vf_for_slp): Likewise.
6606 (vect_analyze_loop_operations): Likewise.
6607 (update_epilogue_loop_vinfo): Likewise.
6608 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
6609 (vect_pattern_recog): Likewise.
6610 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
6611 (_bb_vec_info::_bb_vec_info): Likewise.
6612 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
6615 2020-06-10 Richard Biener <rguenther@suse.de>
6617 PR tree-optimization/95576
6618 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
6620 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
6623 * config/aarch64/aarch64-sve-builtins.h
6624 (sve_switcher::m_old_maximum_field_alignment): New member.
6625 * config/aarch64/aarch64-sve-builtins.cc
6626 (sve_switcher::sve_switcher): Save maximum_field_alignment in
6627 m_old_maximum_field_alignment and clear maximum_field_alignment.
6628 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
6630 2020-06-10 Richard Biener <rguenther@suse.de>
6632 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
6634 (_stmt_vec_info::vec_stmts): Likewise.
6635 (vec_info::stmt_vec_info_ro): New flag.
6636 (vect_finish_replace_stmt): Adjust declaration.
6637 (vect_finish_stmt_generation): Likewise.
6638 (vectorizable_induction): Likewise.
6639 (vect_transform_reduction): Likewise.
6640 (vectorizable_lc_phi): Likewise.
6641 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
6642 allocate stmt infos for increments.
6643 (vect_record_grouped_load_vectors): Adjust.
6644 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
6645 (vectorize_fold_left_reduction): Likewise.
6646 (vect_transform_reduction): Likewise.
6647 (vect_transform_cycle_phi): Likewise.
6648 (vectorizable_lc_phi): Likewise.
6649 (vectorizable_induction): Likewise.
6650 (vectorizable_live_operation): Likewise.
6651 (vect_transform_loop): Likewise.
6652 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
6653 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
6654 (vect_get_slp_defs): Likewise.
6655 (vect_transform_slp_perm_load): Likewise.
6656 (vect_schedule_slp_instance): Likewise.
6657 (vectorize_slp_instance_root_stmt): Likewise.
6658 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
6659 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
6660 (vect_finish_replace_stmt): Do not return anything.
6661 (vect_finish_stmt_generation): Likewise.
6662 (vect_build_gather_load_calls): Adjust.
6663 (vectorizable_bswap): Likewise.
6664 (vectorizable_call): Likewise.
6665 (vectorizable_simd_clone_call): Likewise.
6666 (vect_create_vectorized_demotion_stmts): Likewise.
6667 (vectorizable_conversion): Likewise.
6668 (vectorizable_assignment): Likewise.
6669 (vectorizable_shift): Likewise.
6670 (vectorizable_operation): Likewise.
6671 (vectorizable_scan_store): Likewise.
6672 (vectorizable_store): Likewise.
6673 (vectorizable_load): Likewise.
6674 (vectorizable_condition): Likewise.
6675 (vectorizable_comparison): Likewise.
6676 (vect_transform_stmt): Likewise.
6677 * tree-vectorizer.c (vec_info::vec_info): Initialize
6679 (vec_info::replace_stmt): Copy over stmt UID rather than
6680 unsetting/setting a stmt info allocating a new UID.
6681 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
6683 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
6685 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
6687 * gimple-ssa-evrp.c (class evrp_folder): New.
6688 (class evrp_dom_walker): Remove.
6689 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
6690 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
6691 * tree-ssa-copy.c (copy_folder::get_value): Same.
6692 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
6693 Pass stmt to get_value.
6694 (substitute_and_fold_engine::replace_phi_args_in): Same.
6695 (substitute_and_fold_dom_walker::after_dom_children): Call
6697 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
6698 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
6699 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
6700 call virtual functions for folding, pre_folding, and post folding.
6701 Call get_value with PHI. Tweak dump.
6702 * tree-ssa-propagate.h (class substitute_and_fold_engine):
6703 New argument to get_value.
6704 New virtual function pre_fold_bb.
6705 New virtual function post_fold_bb.
6706 New virtual function pre_fold_stmt.
6707 New virtual function post_new_stmt.
6708 New function propagate_into_phi_args.
6709 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
6710 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
6712 (vr_values::fold_cond): New.
6713 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
6714 * vr-values.h (class vr_values): Add
6715 simplify_cond_using_ranges_when_edge_is_known.
6717 2020-06-10 Martin Liska <mliska@suse.cz>
6720 * asan.c (asan_emit_stack_protection): Emit
6721 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
6724 2020-06-10 Tamar Christina <tamar.christina@arm.com>
6726 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
6728 2020-06-10 Richard Biener <rguenther@suse.de>
6730 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
6731 (vect_record_grouped_load_vectors): Likewise.
6732 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
6733 (vectorize_fold_left_reduction): Likewise.
6734 (vect_transform_reduction): Likewise.
6735 (vect_transform_cycle_phi): Likewise.
6736 (vectorizable_lc_phi): Likewise.
6737 (vectorizable_induction): Likewise.
6738 (vectorizable_live_operation): Likewise.
6739 (vect_transform_loop): Likewise.
6740 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
6742 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
6743 (vect_get_vec_def_for_operand): Likewise.
6744 (vect_get_vec_def_for_stmt_copy): Likewise.
6745 (vect_get_vec_defs_for_stmt_copy): Likewise.
6746 (vect_get_vec_defs_for_operand): New function.
6747 (vect_get_vec_defs): Likewise.
6748 (vect_build_gather_load_calls): Adjust.
6749 (vect_get_gather_scatter_ops): Likewise.
6750 (vectorizable_bswap): Likewise.
6751 (vectorizable_call): Likewise.
6752 (vectorizable_simd_clone_call): Likewise.
6753 (vect_get_loop_based_defs): Remove.
6754 (vect_create_vectorized_demotion_stmts): Adjust.
6755 (vectorizable_conversion): Likewise.
6756 (vectorizable_assignment): Likewise.
6757 (vectorizable_shift): Likewise.
6758 (vectorizable_operation): Likewise.
6759 (vectorizable_scan_store): Likewise.
6760 (vectorizable_store): Likewise.
6761 (vectorizable_load): Likewise.
6762 (vectorizable_condition): Likewise.
6763 (vectorizable_comparison): Likewise.
6764 (vect_transform_stmt): Adjust and remove no longer applicable
6766 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
6767 STMT_VINFO_VEC_STMTS.
6768 (vec_info::free_stmt_vec_info): Relase it.
6769 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
6770 (_stmt_vec_info::vec_stmts): Add.
6771 (STMT_VINFO_VEC_STMT): Remove.
6772 (STMT_VINFO_VEC_STMTS): New.
6773 (vect_get_vec_def_for_operand_1): Remove.
6774 (vect_get_vec_def_for_operand): Likewise.
6775 (vect_get_vec_defs_for_stmt_copy): Likewise.
6776 (vect_get_vec_def_for_stmt_copy): Likewise.
6777 (vect_get_vec_defs): New overloads.
6778 (vect_get_vec_defs_for_operand): New.
6779 (vect_get_slp_defs): Declare.
6781 2020-06-10 Qian Chao <qianchao9@huawei.com>
6783 PR tree-optimization/95569
6784 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
6786 2020-06-10 Martin Liska <mliska@suse.cz>
6788 PR tree-optimization/92860
6789 * optc-save-gen.awk: Generate new function cl_optimization_compare.
6790 * opth-gen.awk: Generate declaration of the function.
6792 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
6794 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
6795 'future' PowerPC platform.
6796 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
6797 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
6798 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
6800 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
6801 (rs6000_clone_map): Add 'future' system target_clones support.
6803 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
6805 * Makefile.in (ZSTD_INC): Define.
6806 (ZSTD_LIB): Include ZSTD_LDFLAGS.
6807 (CFLAGS-lto-compress.o): Add ZSTD_INC.
6808 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
6810 * configure: Rebuilt.
6812 2020-06-09 Jason Merrill <jason@redhat.com>
6815 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
6817 2020-06-09 Marco Elver <elver@google.com>
6819 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
6820 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
6821 builtin for volatile instrumentation of reads/writes.
6822 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
6823 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
6824 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
6825 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
6826 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
6827 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
6828 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
6829 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
6830 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
6831 * tsan.c (get_memory_access_decl): Argument if access is
6832 volatile. If param tsan-distinguish-volatile is non-zero, and
6833 access if volatile, return volatile instrumentation decl.
6834 (instrument_expr): Check if access is volatile.
6836 2020-06-09 Richard Biener <rguenther@suse.de>
6838 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
6840 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
6842 * omp-offload.c (add_decls_addresses_to_decl_constructor,
6843 omp_finish_file): With in_lto_p, stream out all offload-table
6844 items even if the symtab_node does not exist.
6846 2020-06-09 Richard Biener <rguenther@suse.de>
6848 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
6850 2020-06-09 Martin Liska <mliska@suse.cz>
6852 * gcov-dump.c (print_usage): Fix spacing for --raw option
6855 2020-06-09 Martin Liska <mliska@suse.cz>
6857 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
6858 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
6859 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
6860 Handle all sanitizer options.
6861 (can_inline_edge_p): Use renamed CIF_* enum value.
6863 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
6865 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
6867 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
6868 (@aarch64_bic<mode>): Enable unpacked BIC.
6869 (*bic<mode>3): Enable unpacked BIC.
6871 2020-06-09 Martin Liska <mliska@suse.cz>
6873 PR gcov-profile/95365
6874 * doc/gcov.texi: Compile and link one example in 2 steps.
6876 2020-06-09 Jakub Jelinek <jakub@redhat.com>
6878 PR tree-optimization/95527
6879 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
6881 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
6883 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
6884 'future' PowerPC platform.
6885 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
6886 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
6887 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
6889 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
6890 (rs6000_clone_map): Add 'future' system target_clones support.
6892 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
6896 * omp-offload.c (add_decls_addresses_to_decl_constructor,
6897 omp_finish_file): Skip removed items.
6898 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
6899 to this node for variables and functions.
6901 2020-06-08 Jason Merrill <jason@redhat.com>
6903 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
6904 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
6905 * configure: Regenerate.
6907 2020-06-08 Martin Sebor <msebor@redhat.com>
6909 * postreload.c (reload_cse_simplify_operands): Clear first array element
6910 before using it. Assert a precondition.
6912 2020-06-08 Jakub Jelinek <jakub@redhat.com>
6915 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
6916 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
6917 type is vector boolean.
6919 2020-06-08 Tamar Christina <tamar.christina@arm.com>
6921 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
6923 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
6925 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
6926 instead of VFP_REGS.
6928 2020-06-08 Martin Liska <mliska@suse.cz>
6930 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
6931 in all vcond* patterns.
6933 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
6935 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
6936 Define. No longer include <algorithm>.
6938 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
6940 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
6941 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
6942 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
6943 (parityhi2, parityqi2): New expanders.
6944 (parityhi2_cmp): Implement set parity flag with xorb insn.
6945 (parityqi2_cmp): Implement set parity flag with testb insn.
6946 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
6948 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
6951 * config/rs6000/rs6000.c (rs6000_option_override_internal):
6952 Override flag_cunroll_grow_size.
6954 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
6956 * common.opt (flag_cunroll_grow_size): New flag.
6957 * toplev.c (process_options): Set flag_cunroll_grow_size.
6958 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
6959 Use flag_cunroll_grow_size.
6961 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
6964 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
6965 (ipa_odr_summary_write): Update streaming.
6966 (ipa_odr_read_section): Update streaming.
6968 2020-06-06 Alexandre Oliva <oliva@adacore.com>
6971 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
6973 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
6974 Julian Brown <julian@codesourcery.com>
6976 * gimplify.c (gimplify_adjust_omp_clauses): Remove
6977 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
6979 2020-06-05 Richard Biener <rguenther@suse.de>
6981 PR tree-optimization/95539
6982 * tree-vect-data-refs.c
6983 (vect_slp_analyze_and_verify_instance_alignment): Use
6984 SLP_TREE_REPRESENTATIVE for the data-ref check.
6985 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
6986 back to the first scalar stmt rather than the
6987 SLP_TREE_REPRESENTATIVE to match previous behavior.
6989 2020-06-05 Felix Yang <felix.yang@huawei.com>
6992 * expr.c (emit_move_insn): Check src and dest of the copy to see
6993 if one or both of them are subregs, try to remove the subregs when
6994 innermode and outermode are equal in size and the mode change involves
6995 an implicit round trip through memory.
6997 2020-06-05 Jakub Jelinek <jakub@redhat.com>
7000 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
7001 define_insn_and_split patterns.
7002 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
7003 define_insn patterns.
7005 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
7007 * alloc-pool.h (object_allocator::remove_raw): New.
7008 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
7009 (occurrence::occurrence): Add.
7010 (occurrence::~occurrence): Likewise.
7011 (occurrence::new): Likewise.
7012 (occurrence::delete): Likewise.
7014 (insert_bb): Use new occurence (...) instead of occ_new.
7015 (register_division_in): Likewise.
7016 (free_bb): Use delete occ instead of manually removing
7019 2020-06-05 Richard Biener <rguenther@suse.de>
7022 * cfgexpand.c (expand_debug_expr): Avoid calling
7023 set_mem_attributes_minus_bitpos when we were expanding
7025 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
7026 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
7027 special-cases we do not want MEM_EXPRs for. Assert
7028 we end up with reasonable MEM_EXPRs.
7030 2020-06-05 Lili Cui <lili.cui@intel.com>
7033 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
7035 2020-06-04 Martin Sebor <msebor@redhat.com>
7039 * attribs.c (init_attr_rdwr_indices): Move function here.
7040 * attribs.h (rdwr_access_hash, rdwr_map): Define.
7041 (attr_access): Add 'none'.
7042 (init_attr_rdwr_indices): Declared function.
7043 * builtins.c (warn_for_access)): New function.
7044 (check_access): Call it.
7045 * builtins.h (checK-access): Add an optional argument.
7046 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
7047 (init_attr_rdwr_indices): Declare extern.
7048 (append_attrname): Handle attr_access::none.
7049 (maybe_warn_rdwr_sizes): Same.
7050 (initialize_argument_information): Update comments.
7051 * doc/extend.texi (attribute access): Document 'none'.
7052 * tree-ssa-uninit.c (struct wlimits): New.
7053 (maybe_warn_operand): New function.
7054 (maybe_warn_pass_by_reference): Same.
7055 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
7056 Also call for function calls.
7057 (pass_late_warn_uninitialized::execute): Adjust comments.
7058 (execute_early_warn_uninitialized): Same.
7060 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
7063 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
7064 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
7065 reload if the original insn has it too.
7067 2020-06-04 Richard Biener <rguenther@suse.de>
7069 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
7070 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
7072 2020-06-04 Martin Jambor <mjambor@suse.cz>
7075 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
7076 exceptions check to...
7077 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
7079 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
7080 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
7083 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7086 * config/arm/predicates.md (mve_scatter_memory): Define to
7087 match (mem (reg)) for scatter store memory.
7088 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
7089 define_insn to define_expand.
7090 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
7091 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
7092 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
7093 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
7094 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
7095 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
7096 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
7097 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
7098 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
7099 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
7100 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
7101 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
7102 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
7103 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
7104 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
7105 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
7106 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
7107 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
7108 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
7109 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
7110 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
7112 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
7113 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
7114 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
7115 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
7116 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
7117 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
7118 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
7119 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
7120 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
7121 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
7122 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
7123 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
7124 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
7125 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
7126 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
7127 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
7128 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
7129 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
7130 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
7131 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
7133 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7135 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
7137 (__arm_vbicq_n_s16): Likewise.
7138 (__arm_vbicq_n_u32): Likewise.
7139 (__arm_vbicq_n_s32): Likewise.
7140 (__arm_vbicq): Modify polymorphic variant.
7142 2020-06-04 Richard Biener <rguenther@suse.de>
7144 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
7145 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
7146 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
7147 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
7148 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
7150 (vect_get_slp_defs): ... here.
7151 (vect_get_slp_vect_def): New function.
7153 2020-06-04 Richard Biener <rguenther@suse.de>
7155 * tree-vectorizer.h (_slp_tree::lanes): New.
7156 (SLP_TREE_LANES): Likewise.
7157 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
7158 (vectorizable_reduction): Likewise.
7159 (vect_transform_cycle_phi): Likewise.
7160 (vectorizable_induction): Likewise.
7161 (vectorizable_live_operation): Likewise.
7162 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
7163 (vect_create_new_slp_node): Likewise.
7164 (slp_copy_subtree): Copy it.
7165 (vect_optimize_slp): Use it.
7166 (vect_slp_analyze_node_operations_1): Likewise.
7167 (vect_slp_convert_to_external): Likewise.
7168 (vect_bb_vectorization_profitable_p): Likewise.
7169 * tree-vect-stmts.c (vectorizable_load): Likewise.
7170 (get_vectype_for_scalar_type): Likewise.
7172 2020-06-04 Richard Biener <rguenther@suse.de>
7174 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
7175 (vect_build_slp_tree_2): Simplify building all external op
7177 (vect_slp_analyze_node_operations): Remove push/pop of
7178 STMT_VINFO_DEF_TYPE.
7179 (vect_schedule_slp_instance): Likewise.
7180 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
7181 stmt_info, use the vect_is_simple_use overload combining
7182 SLP and stmt_info analysis.
7183 (vect_is_simple_cond): Likewise.
7184 (vectorizable_store): Adjust.
7185 (vectorizable_condition): Likewise.
7186 (vect_is_simple_use): Fully handle invariant SLP nodes
7187 here. Amend stmt_info operand extraction with COND_EXPR
7189 * tree-vect-loop.c (vectorizable_reduction): Deal with
7190 COND_EXPR representation ugliness.
7192 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
7195 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
7196 Refine from *vcvtps2ph_store<mask_name>.
7197 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
7198 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
7199 (*vcvtps2ph256<merge_mask_name>): New define_insn.
7200 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
7201 * config/i386/subst.md (merge_mask): New define_subst.
7202 (merge_mask_name): New define_subst_attr.
7203 (merge_mask_operand3): Ditto.
7205 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
7207 PR tree-optimization/89430
7209 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
7210 remove ssa_name_ver, store, offset fields.
7211 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
7212 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
7213 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
7216 2020-06-04 Andreas Schwab <schwab@suse.de>
7219 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
7221 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
7223 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
7224 (trunc<mode><pmov_dst_3_lower>2): Refine from
7225 trunc<mode><pmov_dst_3>2.
7227 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
7229 * match.pd (tanh/sinh -> 1/cosh): New simplification.
7231 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
7234 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
7235 is_lfs_stfs_insn and make it recognize lfs as well.
7236 (prefixed_store_p): Use is_lfs_stfs_insn().
7237 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
7239 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
7241 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
7243 (odr_enums): New static var.
7244 (struct odr_enum_val): New struct.
7245 (class odr_enum): New struct.
7246 (odr_enum_map): New hashtable.
7247 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
7248 (add_type_duplicate): Likewise.
7249 (free_odr_warning_data): Do not free TYPE_VALUES.
7250 (register_odr_enum): New function.
7251 (ipa_odr_summary_write): New function.
7252 (ipa_odr_read_section): New function.
7253 (ipa_odr_summary_read): New function.
7254 (class pass_ipa_odr): New pass.
7255 (make_pass_ipa_odr): New function.
7256 * ipa-utils.h (register_odr_enum): Declare.
7257 * lto-section-in.c: (lto_section_name): Add odr_types section.
7258 * lto-streamer.h (enum lto_section_type): Add odr_types section.
7259 * passes.def: Add odr_types pass.
7260 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
7262 (hash_tree): Likewise.
7263 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
7265 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
7267 * timevar.def (TV_IPA_ODR): New timervar.
7268 * tree-pass.h (make_pass_ipa_odr): Declare.
7269 * tree.c (free_lang_data_in_type): Regiser ODR types.
7271 2020-06-03 Romain Naour <romain.naour@gmail.com>
7273 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
7276 2020-06-03 Richard Biener <rguenther@suse.de>
7278 PR tree-optimization/95487
7279 * tree-vect-stmts.c (vectorizable_store): Use a truth type
7280 for the scatter mask.
7282 2020-06-03 Richard Biener <rguenther@suse.de>
7284 PR tree-optimization/95495
7285 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
7286 SLP_TREE_REPRESENTATIVE in the shift assertion.
7288 2020-06-03 Tom Tromey <tromey@adacore.com>
7290 * spellcheck.c (CASE_COST): New define.
7291 (BASE_COST): New define.
7292 (get_edit_distance): Recognize case changes.
7293 (get_edit_distance_cutoff): Update.
7294 (test_edit_distances): Update.
7295 (get_old_cutoff): Update.
7296 (test_find_closest_string): Add case sensitivity test.
7298 2020-06-03 Richard Biener <rguenther@suse.de>
7300 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
7301 the cost vector to unset the visited flag on stmts.
7303 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
7305 * gimplify.c (omp_notice_variable): Use new hook.
7306 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
7307 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
7308 (LANG_HOOKS_DECLS): Add it.
7309 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
7310 (lhd_omp_predetermined_mapping): New.
7311 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
7313 2020-06-03 Jan Hubicka <jh@suse.cz>
7315 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
7316 add LTO_first_tree_tag and LTO_first_gimple_tag.
7317 (lto_tag_is_tree_code_p): Update.
7318 (lto_tag_is_gimple_code_p): Update.
7319 (lto_gimple_code_to_tag): Update.
7320 (lto_tag_to_gimple_code): Update.
7321 (lto_tree_code_to_tag): Update.
7322 (lto_tag_to_tree_code): Update.
7324 2020-06-02 Felix Yang <felix.yang@huawei.com>
7327 * config/aarch64/aarch64.c (aarch64_short_vector_p):
7328 Leave later code to report an error if SVE is disabled.
7330 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
7332 * config/aarch64/aarch64-cores.def (zeus): Define.
7333 * config/aarch64/aarch64-tune.md: Regenerate.
7334 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
7336 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
7339 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
7341 (is_stfs_insn): New helper function.
7343 2020-06-02 Jan Hubicka <jh@suse.cz>
7345 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
7347 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
7349 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
7351 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
7352 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
7353 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
7355 2020-06-02 Eric Botcazou <ebotcazou@adacore.com>
7358 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
7359 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
7361 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7363 * config/s390/s390.c (print_operand): Emit vector alignment
7366 2020-06-02 Martin Liska <mliska@suse.cz>
7368 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
7369 as they have variable number of counters.
7370 * gcov-dump.c (main): Add new option -r.
7371 (print_usage): Likewise.
7372 (tag_counters): All new raw format.
7373 * gcov-io.h (struct gcov_kvp): New.
7374 (GCOV_TOPN_VALUES): Remove.
7375 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
7376 (GCOV_TOPN_MEM_COUNTERS): New.
7377 (GCOV_TOPN_DISK_COUNTERS): Likewise.
7378 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
7379 * ipa-profile.c (ipa_profile_generate_summary): Use
7380 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
7381 (ipa_profile_write_edge_summary): Likewise.
7382 (ipa_profile_read_edge_summary): Likewise.
7383 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
7384 * profile.c (sort_hist_values): Sort variable number
7386 (compute_value_histograms): Special case for TOP N counters
7387 that have dynamic number of key-value pairs.
7388 * value-prof.c (dump_histogram_value): Dump variable number
7390 (stream_in_histogram_value): Stream in variable number
7391 of key-value pairs for TOP N counter.
7392 (get_nth_most_common_value): Deal with variable number
7394 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
7396 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
7398 * doc/gcov-dump.texi: Document new -r option.
7400 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
7403 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
7405 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
7407 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
7408 returns (const_int 0) for the destination, then emit nothing.
7410 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
7412 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
7413 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
7414 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
7415 LTO_const_decl_ref, LTO_imported_decl_ref,
7416 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
7417 LTO_namelist_decl_ref; add LTO_global_stream_ref.
7418 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
7419 (lto_input_scc): Update.
7420 (lto_input_tree_1): Update.
7421 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
7422 * lto-streamer.c (lto_tag_name): Update.
7424 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
7426 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
7427 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
7428 * lto-cgraph.c (lto_output_node): Likewise.
7429 (lto_output_varpool_node): Likewise.
7430 (output_offload_tables): Likewise.
7431 (input_node): Likewise.
7432 (input_varpool_node): Likewise.
7433 (input_offload_tables): Likewise.
7434 * lto-streamer-in.c (lto_input_tree_ref): Declare.
7435 (lto_input_var_decl_ref): Declare.
7436 (lto_input_fn_decl_ref): Declare.
7437 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
7438 (lto_output_var_decl_index): Rename to ..
7439 (lto_output_var_decl_ref): ... this.
7440 (lto_output_fn_decl_index): Rename to ...
7441 (lto_output_fn_decl_ref): ... this.
7442 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
7443 (DEFINE_DECL_STREAM_FUNCS): Remove.
7444 (lto_output_var_decl_index): Remove.
7445 (lto_output_fn_decl_index): Remove.
7446 (lto_output_var_decl_ref): Declare.
7447 (lto_output_fn_decl_ref): Declare.
7448 (lto_input_var_decl_ref): Declare.
7449 (lto_input_fn_decl_ref): Declare.
7451 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
7453 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
7454 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
7455 dump infomation if there is no adjusted parameter.
7456 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
7458 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
7460 * Makefile.in (gimple-array-bounds.o): New.
7461 * tree-vrp.c: Move array bounds code...
7462 * gimple-array-bounds.cc: ...here...
7463 * gimple-array-bounds.h: ...and here.
7465 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
7467 * Makefile.in (OBJS): Add value-range-equiv.o.
7468 * tree-vrp.c (*value_range_equiv*): Move to...
7469 * value-range-equiv.cc: ...here.
7470 * tree-vrp.h (class value_range_equiv): Move to...
7471 * value-range-equiv.h: ...here.
7472 * vr-values.h: Include value-range-equiv.h.
7474 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
7477 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
7478 lattice for simple pass-through by-ref argument.
7480 2020-05-31 Jeff Law <law@redhat.com>
7482 * lra.c (add_auto_inc_notes): Remove function.
7483 * reload1.c (add_auto_inc_notes): Similarly. Move into...
7484 * rtlanal.c (add_auto_inc_notes): New function.
7485 * rtl.h (add_auto_inc_notes): Add prototype.
7486 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
7489 2020-05-31 Jan Hubicka <jh@suse.cz>
7491 * lto-section-out.c (lto_output_decl_index): Remove.
7492 (lto_output_field_decl_index): Move to lto-streamer-out.c
7493 (lto_output_fn_decl_index): Move to lto-streamer-out.c
7494 (lto_output_namespace_decl_index): Remove.
7495 (lto_output_var_decl_index): Remove.
7496 (lto_output_type_decl_index): Remove.
7497 (lto_output_type_ref_index): Remove.
7498 * lto-streamer-out.c (output_type_ref): Remove.
7499 (lto_get_index): New function.
7500 (lto_output_tree_ref): Remove.
7501 (lto_indexable_tree_ref): New function.
7502 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
7503 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
7504 (stream_write_tree_ref): Update.
7505 (lto_output_tree): Update.
7506 * lto-streamer.h (lto_output_decl_index): Remove prototype.
7507 (lto_output_field_decl_index): Remove prototype.
7508 (lto_output_namespace_decl_index): Remove prototype.
7509 (lto_output_type_decl_index): Remove prototype.
7510 (lto_output_type_ref_index): Remove prototype.
7511 (lto_output_var_decl_index): Move.
7512 (lto_output_fn_decl_index): Move
7514 2020-05-31 Jakub Jelinek <jakub@redhat.com>
7517 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
7520 2020-05-31 Jeff Law <law@redhat.com>
7522 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
7524 2020-05-31 Jim Wilson <jimw@sifive.com>
7526 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
7528 2020-05-30 Jonathan Yong <10walls@gmail.com>
7530 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
7531 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
7532 import library, but also contains some functions that invoke
7533 others in KERNEL32.DLL.
7535 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
7537 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
7538 (altivec_vmrglw_direct): Ditto.
7539 (altivec_vperm_<mode>_direct): Ditto.
7540 (altivec_vperm_v8hiv16qi): Ditto.
7541 (*altivec_vperm_<mode>_uns_internal): Ditto.
7542 (*altivec_vpermr_<mode>_internal): Ditto.
7543 (vperm_v8hiv4si): Ditto.
7544 (vperm_v16qiv8hi): Ditto.
7546 2020-05-29 Jan Hubicka <jh@suse.cz>
7548 * lto-streamer-in.c (streamer_read_chain): Move here from
7550 (stream_read_tree_ref): New.
7551 (lto_input_tree_1): Simplify.
7552 * lto-streamer-out.c (stream_write_tree_ref): New.
7553 (lto_write_tree_1): Simplify.
7554 (lto_output_tree_1): Simplify.
7555 (DFS::DFS_write_tree): Simplify.
7556 (streamer_write_chain): Move here from tree-stremaer-out.c.
7557 * lto-streamer.h (lto_output_tree_ref): Update prototype.
7558 (stream_read_tree_ref): Declare
7559 (stream_write_tree_ref): Declare
7560 * tree-streamer-in.c (streamer_read_chain): Update to use
7561 stream_read_tree_ref.
7562 (lto_input_ts_common_tree_pointers): Likewise.
7563 (lto_input_ts_vector_tree_pointers): Likewise.
7564 (lto_input_ts_poly_tree_pointers): Likewise.
7565 (lto_input_ts_complex_tree_pointers): Likewise.
7566 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
7567 (lto_input_ts_decl_common_tree_pointers): Likewise.
7568 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
7569 (lto_input_ts_field_decl_tree_pointers): Likewise.
7570 (lto_input_ts_function_decl_tree_pointers): Likewise.
7571 (lto_input_ts_type_common_tree_pointers): Likewise.
7572 (lto_input_ts_type_non_common_tree_pointers): Likewise.
7573 (lto_input_ts_list_tree_pointers): Likewise.
7574 (lto_input_ts_vec_tree_pointers): Likewise.
7575 (lto_input_ts_exp_tree_pointers): Likewise.
7576 (lto_input_ts_block_tree_pointers): Likewise.
7577 (lto_input_ts_binfo_tree_pointers): Likewise.
7578 (lto_input_ts_constructor_tree_pointers): Likewise.
7579 (lto_input_ts_omp_clause_tree_pointers): Likewise.
7580 * tree-streamer-out.c (streamer_write_chain): Update to use
7581 stream_write_tree_ref.
7582 (write_ts_common_tree_pointers): Likewise.
7583 (write_ts_vector_tree_pointers): Likewise.
7584 (write_ts_poly_tree_pointers): Likewise.
7585 (write_ts_complex_tree_pointers): Likewise.
7586 (write_ts_decl_minimal_tree_pointers): Likewise.
7587 (write_ts_decl_common_tree_pointers): Likewise.
7588 (write_ts_decl_non_common_tree_pointers): Likewise.
7589 (write_ts_decl_with_vis_tree_pointers): Likewise.
7590 (write_ts_field_decl_tree_pointers): Likewise.
7591 (write_ts_function_decl_tree_pointers): Likewise.
7592 (write_ts_type_common_tree_pointers): Likewise.
7593 (write_ts_type_non_common_tree_pointers): Likewise.
7594 (write_ts_list_tree_pointers): Likewise.
7595 (write_ts_vec_tree_pointers): Likewise.
7596 (write_ts_exp_tree_pointers): Likewise.
7597 (write_ts_block_tree_pointers): Likewise.
7598 (write_ts_binfo_tree_pointers): Likewise.
7599 (write_ts_constructor_tree_pointers): Likewise.
7600 (write_ts_omp_clause_tree_pointers): Likewise.
7601 (streamer_write_tree_body): Likewise.
7602 (streamer_write_integer_cst): Likewise.
7603 * tree-streamer.h (streamer_read_chain):Declare.
7604 (streamer_write_chain):Declare.
7605 (streamer_write_tree_body): Update prototype.
7606 (streamer_write_integer_cst): Update prototype.
7608 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
7611 * configure: Regenerated.
7613 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
7615 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
7616 (add<mode>3_vcc_zext_dup_exec): Likewise.
7617 (add<mode>3_vcc_zext_dup2): Likewise.
7618 (add<mode>3_vcc_zext_dup2_exec): Likewise.
7620 2020-05-29 Richard Biener <rguenther@suse.de>
7622 PR tree-optimization/95272
7623 * tree-vectorizer.h (_slp_tree::representative): Add.
7624 (SLP_TREE_REPRESENTATIVE): Likewise.
7625 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
7627 (vectorizable_live_operation): Use the representative to
7628 attach the reduction info to.
7629 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
7630 SLP_TREE_REPRESENTATIVE.
7631 (vect_create_new_slp_node): Likewise.
7632 (slp_copy_subtree): Copy it.
7633 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
7634 (vect_slp_analyze_node_operations_1): Pass the representative
7635 to vect_analyze_stmt.
7636 (vect_schedule_slp_instance): Pass the representative to
7637 vect_transform_stmt.
7639 2020-05-29 Richard Biener <rguenther@suse.de>
7641 PR tree-optimization/95356
7642 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
7643 node hacking during analysis.
7645 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
7648 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
7650 2020-05-29 Richard Biener <rguenther@suse.de>
7652 PR tree-optimization/95403
7653 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
7656 2020-05-29 Jakub Jelinek <jakub@redhat.com>
7659 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
7660 declare variant cgraph node removal callback.
7662 2020-05-29 Jakub Jelinek <jakub@redhat.com>
7665 * expr.c (store_expr): If expr_size is constant and significantly
7666 larger than TREE_STRING_LENGTH, set temp to just the
7667 TREE_STRING_LENGTH portion of the STRING_CST.
7669 2020-05-29 Richard Biener <rguenther@suse.de>
7671 PR tree-optimization/95393
7672 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
7673 to build the min/max expression so we simplify cases like
7674 MAX(0, s) immediately.
7676 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
7678 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
7679 for unpacked EOR, ORR, AND.
7681 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
7683 * Makefile.in: don't look for libiberty in the "pic" subdirectory
7684 when building for Mingw. Add dependency on xgcc with the proper
7687 2020-05-28 Jeff Law <law@redhat.com>
7689 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
7691 2020-05-28 Jeff Law <law@redhat.com>
7693 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
7694 make a nonzero adjustment to the memory offset.
7695 (b<ior,xor>hi_msx): Turn into a splitter.
7697 2020-05-28 Eric Botcazou <ebotcazou@adacore.com>
7699 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
7700 Fix off-by-one error.
7702 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
7704 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
7705 wb_candidate1 and wb_candidate2.
7706 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
7707 wb_candidate1 and wb_candidate2 if we decided not to use them.
7709 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
7712 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
7713 we have at least some CFI operations when using a frame pointer.
7714 Only redefine the CFA if we have CFI operations.
7716 2020-05-28 Richard Biener <rguenther@suse.de>
7718 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
7719 case for !SLP_TREE_VECTYPE.
7720 (vect_slp_analyze_node_operations): Adjust.
7722 2020-05-28 Richard Biener <rguenther@suse.de>
7724 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
7725 (SLP_TREE_VEC_DEFS): Likewise.
7726 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
7727 (_slp_tree::~_slp_tree): Likewise.
7728 (vect_mask_constant_operand_p): Remove unused function.
7729 (vect_get_constant_vectors): Rename to...
7730 (vect_create_constant_vectors): ... this. Take the
7731 invariant node as argument and code generate it. Remove
7732 dead code, remove temporary asserts. Pass a NULL stmt_info
7733 to vect_init_vector.
7734 (vect_get_slp_defs): Simplify.
7735 (vect_schedule_slp_instance): Code-generate externals and
7736 invariants using vect_create_constant_vectors.
7738 2020-05-28 Richard Biener <rguenther@suse.de>
7740 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
7741 Conditionalize stmt_info use, assert the new stmt cannot throw
7743 (vect_finish_stmt_generation): Adjust assert.
7745 2020-05-28 Richard Biener <rguenther@suse.de>
7747 PR tree-optimization/95273
7748 PR tree-optimization/95356
7749 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
7750 what we set the vector type of the shift operand SLP node
7753 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
7755 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
7758 2020-05-28 Martin Liska <mliska@suse.cz>
7761 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
7762 rename ipcp-unit-growth to ipa-cp-unit-growth.
7764 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
7766 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
7767 from *avx512vl_<code>v2div2qi_store and refine memory size of
7769 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
7770 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
7771 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
7772 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
7773 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
7774 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
7775 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
7776 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
7777 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
7778 (*avx512vl_<code>v2div2si2_store_1): Ditto.
7779 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
7780 (*avx512f_<code>v8div16qi2_store_1): Ditto.
7781 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
7782 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
7783 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
7784 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
7785 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
7786 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
7787 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
7788 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
7789 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
7790 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
7791 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
7792 (*avx512vl_<code>v2div2si2_store_2): Ditto.
7793 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
7794 (*avx512f_<code>v8div16qi2_store_2): Ditto.
7795 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
7796 * config/i386/i386-builtin-types.def: Adjust builtin type.
7797 * config/i386/i386-expand.c: Ditto.
7798 * config/i386/i386-builtin.def: Adjust builtin.
7799 * config/i386/avx512fintrin.h: Ditto.
7800 * config/i386/avx512vlbwintrin.h: Ditto.
7801 * config/i386/avx512vlintrin.h: Ditto.
7803 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
7805 PR gcov-profile/95332
7806 * gcov-io.c (gcov_var::endian): Move field.
7807 (from_file): Add IN_GCOV_TOOL check.
7808 * gcov-io.h (gcov_magic): Ditto.
7810 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
7812 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
7814 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
7816 2020-05-27 Eric Botcazou <ebotcazou@adacore.com>
7818 * builtin-types.def (BT_UINT128): New primitive type.
7819 (BT_FN_UINT128_UINT128): New function type.
7820 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
7821 * doc/extend.texi (__builtin_bswap128): Document it.
7822 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
7823 (is_inexpensive_builtin): Likewise.
7824 * fold-const-call.c (fold_const_call_ss): Likewise.
7825 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
7826 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
7827 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
7828 (vectorizable_call): Likewise.
7829 * optabs.c (expand_unop): Always use the double word path for it.
7830 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
7831 * tree.h (uint128_type_node): New global type.
7832 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
7834 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7836 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
7837 (mmx_hsubv2sf3): Ditto.
7838 (mmx_haddsubv2sf3): New expander.
7839 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
7840 RTL template to model horizontal subtraction and addition.
7841 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
7844 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7847 * config/i386/sse.md
7848 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
7849 Remove %q operand modifier from insn template.
7850 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
7852 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7854 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
7855 Enable insn pattern for TARGET_MMX_WITH_SSE.
7856 (*mmx_movshdup): New insn pattern.
7857 (*mmx_movsldup): Ditto.
7858 (*mmx_movss): Ditto.
7859 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
7861 (expand_vec_perm_movs): Handle E_V2SFmode.
7862 (expand_vec_perm_even_odd): Ditto.
7863 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
7864 is already handled by standard shuffle patterns.
7866 2020-05-27 Richard Biener <rguenther@suse.de>
7868 PR tree-optimization/95295
7869 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
7870 merging stores from paths.
7872 2020-05-27 Richard Biener <rguenther@suse.de>
7874 PR tree-optimization/95356
7875 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
7876 type for the shift operand.
7878 2020-05-27 Richard Biener <rguenther@suse.de>
7880 PR tree-optimization/95335
7881 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
7882 lvisited for nodes made external.
7884 2020-05-27 Richard Biener <rguenther@suse.de>
7886 * dump-context.h (debug_dump_context): New class.
7887 (dump_context): Make it friend.
7888 * dumpfile.c (debug_dump_context::debug_dump_context):
7890 (debug_dump_context::~debug_dump_context): Likewise.
7891 * tree-vect-slp.c: Include dump-context.h.
7892 (vect_print_slp_tree): Dump a single SLP node.
7893 (debug): New overload for slp_tree.
7894 (vect_print_slp_graph): Rename from vect_print_slp_tree and
7896 (vect_analyze_slp_instance): Adjust.
7898 2020-05-27 Jakub Jelinek <jakub@redhat.com>
7901 * omp-general.c (omp_declare_variant_remove_hook): New function.
7902 (omp_resolve_declare_variant): Always return base if it is already
7903 declare_variant_alt magic decl itself. Register
7904 omp_declare_variant_remove_hook as cgraph node removal hook.
7906 2020-05-27 Jeff Law <law@redhat.com>
7908 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
7909 for the primary input operand.
7910 (tstsi_variable_bit_qi): Similarly.
7912 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
7914 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
7916 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
7919 * ipa-utils.h (odr_type_p): Also permit calls with
7920 only flag_generate_offload set.
7922 2020-05-26 Alexandre Oliva <oliva@adacore.com>
7924 * gcc.c (validate_switches): Add braced parameter. Adjust all
7925 callers. Expected and skip trailing brace only if braced.
7926 Return after handling one atom otherwise.
7927 (DUMPS_OPTIONS): New.
7928 (cpp_debug_options): Define in terms of it.
7930 2020-05-26 Richard Biener <rguenther@suse.de>
7932 PR tree-optimization/95327
7933 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
7934 when we are not using a scalar shift.
7936 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
7938 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
7939 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
7940 Handle E_V2SImode and E_V4HImode.
7941 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
7942 Assert that E_V2SImode is already handled.
7943 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
7944 is already handled by standard shuffle patterns.
7946 2020-05-26 Jan Hubicka <jh@suse.cz>
7948 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
7951 2020-05-26 Jakub Jelinek <jakub@redhat.com>
7954 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
7955 * omp-general.h (find_combined_omp_for): Declare.
7956 * omp-general.c: Include tree-iterator.h.
7957 (find_combined_omp_for): New function, moved from gimplify.c.
7959 2020-05-26 Alexandre Oliva <oliva@adacore.com>
7961 * common.opt (aux_base_name): Define.
7962 (dumpbase, dumpdir): Mark as Driver options.
7963 (-dumpbase, -dumpdir): Likewise.
7964 (dumpbase-ext, -dumpbase-ext): New.
7965 (auxbase, auxbase-strip): Drop.
7966 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
7968 (-o): Introduce the notion of primary output, mention it
7969 influences auxiliary and dump output names as well, add
7971 (-save-temps): Adjust, move examples into -dump*.
7972 (-save-temps=cwd, -save-temps=obj): Likewise.
7973 (-fdump-final-insns): Adjust.
7974 * dwarf2out.c (gen_producer_string): Drop auxbase and
7975 auxbase_strip; add dumpbase_ext.
7976 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
7977 (save_temps_prefix, save_temps_length): Drop.
7978 (save_temps_overrides_dumpdir): New.
7979 (dumpdir, dumpbase, dumpbase_ext): New.
7980 (dumpdir_length, dumpdir_trailing_dash_added): New.
7981 (outbase, outbase_length): New.
7982 (The Specs Language): Introduce %". Adjust %b and %B.
7983 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
7984 Precede object file with %w when it's the primary output.
7985 (cpp_debug_options): Do not pass on incoming -dumpdir,
7986 -dumpbase and -dumpbase-ext options; recompute them with
7988 (cc1_options): Drop auxbase with and without compare-debug;
7989 use cpp_debug_options instead of dumpbase. Mark asm output
7990 with %w when it's the primary output.
7991 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
7992 %:replace-exception. Add %:dumps.
7993 (driver_handle_option): Implement -save-temps=*/-dumpdir
7994 mutual overriding logic. Save dumpdir, dumpbase and
7995 dumpbase-ext options. Do not save output_file in
7997 (adds_single_suffix_p): New.
7998 (single_input_file_index): New.
7999 (process_command): Combine output dir, output base name, and
8000 dumpbase into dumpdir and outbase.
8001 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
8002 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
8003 and outbase instead of input_basename in %b, %B and in
8004 -save-temps aux files. Handle empty argument %".
8005 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
8006 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
8007 naming. Spec-quote the computed -fdump-final-insns file name.
8008 (debug_auxbase_opt): Drop.
8009 (compare_debug_self_opt_spec_function): Drop auxbase-strip
8011 (compare_debug_auxbase_opt_spec_function): Drop.
8012 (not_actual_file_p): New.
8013 (replace_extension_spec_func): Drop.
8014 (dumps_spec_func): New.
8015 (convert_white_space): Split-out parts into...
8016 (quote_string, whitespace_to_convert_p): ... these. New.
8017 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
8018 (driver::finalize): Release and reset new variables; drop
8020 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
8021 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
8022 empty string otherwise.
8023 (DUMPBASE_SUFFIX): Drop leading period.
8024 (debug_objcopy): Use concat.
8025 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
8026 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
8027 component. Simplify temp file names.
8028 * opts.c (finish_options): Drop aux base name handling.
8029 (common_handle_option): Drop auxbase-strip handling.
8030 * toplev.c (print_switch_values): Drop auxbase, add
8032 (process_options): Derive aux_base_name from dump_base_name
8034 (lang_dependent_init): Compute dump_base_ext along with
8035 dump_base_name. Disable stack usage and callgraph-info during
8036 lto generation and compare-debug recompilation.
8038 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
8039 Uroš Bizjak <ubizjak@gmail.com>
8043 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
8044 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
8045 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
8046 float<floatunssuffix>v2div2sf2.
8047 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
8048 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
8049 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
8050 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
8051 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
8052 * config/i386/i386-builtin.def: Ditto.
8053 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
8054 subregs when both omode and imode are vector mode and
8055 have the same inner mode.
8057 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
8059 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
8060 Only turn MEM_REFs into bit-field stores for small bit-field regions.
8061 (imm_store_chain_info::output_merged_store): Be prepared for sources
8062 with non-integral type in the bit-field insertion case.
8063 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
8064 the largest size for the bit-field case.
8066 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
8068 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
8069 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
8070 (*vec_dupv4hi): Redefine as define_insn.
8071 Remove alternative with general register input.
8072 (*vec_dupv2si): Ditto.
8074 2020-05-25 Richard Biener <rguenther@suse.de>
8076 PR tree-optimization/95309
8077 * tree-vect-slp.c (vect_get_constant_vectors): Move number
8078 of vector computation ...
8079 (vect_slp_analyze_node_operations): ... to analysis phase.
8081 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
8083 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
8084 * lto-streamer.h (streamer_debugging): New constant
8085 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
8086 streamer_debugging check.
8087 (streamer_get_pickled_tree): Likewise.
8088 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
8090 2020-05-25 Richard Biener <rguenther@suse.de>
8092 PR tree-optimization/95308
8093 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
8094 test for TARGET_MEM_REFs.
8096 2020-05-25 Richard Biener <rguenther@suse.de>
8098 PR tree-optimization/95295
8099 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
8100 RHSes and drop to full sm_other if they are not equal.
8102 2020-05-25 Richard Biener <rguenther@suse.de>
8104 PR tree-optimization/95271
8105 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
8106 children vector type.
8107 (vectorizable_call): Pass down slp ops.
8109 2020-05-25 Richard Biener <rguenther@suse.de>
8111 PR tree-optimization/95297
8112 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
8113 skip updating operand 1 vector type.
8115 2020-05-25 Richard Biener <rguenther@suse.de>
8117 PR tree-optimization/95284
8118 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
8121 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
8124 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
8125 (trunc<mode><sf2dfmode_lower>2) New expander.
8126 (extend<sf2dfmode_lower><mode>2): Ditto.
8128 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
8130 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
8131 ubsan_{data,type},ASAN symbols linker-visible.
8133 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
8135 * lto-streamer-out.c (DFS::DFS): Silence warning.
8137 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
8140 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
8141 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
8143 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
8145 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
8148 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
8150 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
8151 * lto-streamer-out.c (create_output_block): Fix whitespace
8152 (lto_write_tree_1): Add (debug) dump.
8153 (DFS::DFS): Add dump.
8154 (DFS::DFS_write_tree_body): Do not dump here.
8155 (lto_output_tree): Improve dumping; do not stream ref when not needed.
8156 (produce_asm_for_decls): Fix whitespace.
8157 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
8158 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
8160 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
8163 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
8164 (truncv32hiv32qi2): Ditto.
8165 (trunc<ssedoublemodelower><mode>2): Ditto.
8166 (trunc<mode><pmov_dst_3>2): Ditto.
8167 (trunc<mode><pmov_dst_mode_4>2): Ditto.
8168 (truncv2div2si2): Ditto.
8169 (truncv8div8qi2): Ditto.
8170 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
8171 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
8172 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
8173 *avx512vl_<code><mode>v<ssescalarnum>qi2.
8175 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
8178 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
8181 2020-05-22 Richard Biener <rguenther@suse.de>
8183 PR tree-optimization/95268
8184 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
8187 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
8189 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
8192 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
8194 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
8195 (lto_input_scc): Optimize streaming of entry lengths.
8196 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
8197 (DFS::DFS): Optimize stremaing of entry lengths
8199 2020-05-22 Richard Biener <rguenther@suse.de>
8202 * doc/invoke.texi (flto): Document behavior of diagnostic
8205 2020-05-22 Richard Biener <rguenther@suse.de>
8207 * tree-vectorizer.h (vect_is_simple_use): New overload.
8208 (vect_maybe_update_slp_op_vectype): New.
8209 * tree-vect-stmts.c (vect_is_simple_use): New overload
8210 accessing operands of SLP vs. non-SLP operation transparently.
8211 (vect_maybe_update_slp_op_vectype): New function updating
8212 the possibly shared SLP operands vector type.
8213 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
8214 using the new vect_is_simple_use overload; update SLP invariant
8215 operand nodes vector type.
8216 (vectorizable_comparison): Likewise.
8217 (vectorizable_call): Likewise.
8218 (vectorizable_conversion): Likewise.
8219 (vectorizable_shift): Likewise.
8220 (vectorizable_store): Likewise.
8221 (vectorizable_condition): Likewise.
8222 (vectorizable_assignment): Likewise.
8223 * tree-vect-loop.c (vectorizable_reduction): Likewise.
8224 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
8225 present SLP_TREE_VECTYPE and check it matches previous
8228 2020-05-22 Richard Biener <rguenther@suse.de>
8230 PR tree-optimization/95248
8231 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
8233 2020-05-22 Richard Biener <rguenther@suse.de>
8235 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
8236 (_slp_tree::~_slp_tree): Likewise.
8237 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
8239 (_slp_tree::~_slp_tree): Implement.
8240 (vect_free_slp_tree): Simplify.
8241 (vect_create_new_slp_node): Likewise. Add nops parameter.
8242 (vect_build_slp_tree_2): Adjust.
8243 (vect_analyze_slp_instance): Likewise.
8245 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
8247 * adjust-alignment.c: Include memmodel.h.
8249 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
8252 * config/i386/cpuid.h: Use hexadecimal in comments.
8254 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
8257 * config/i386/i386-builtins.c (processor_features): Move
8258 F_AVX512VP2INTERSECT after F_AVX512BF16.
8259 (isa_names_table): Likewise.
8261 2020-05-21 Martin Liska <mliska@suse.cz>
8263 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
8264 Handle OPT_moutline_atomics.
8265 * config/aarch64/aarch64.c: Add outline-atomics to
8267 * doc/extend.texi: Document the newly added target attribute.
8269 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
8273 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
8274 operands 1 and 2 commutative. Manually swap operands.
8275 (*mmx_nabsv2sf2): Ditto.
8278 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
8280 * config/i386/i386.md (*<code>tf2_1):
8281 Mark operands 1 and 2 commutative.
8282 (*nabstf2_1): Ditto.
8283 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
8284 commutative. Do not swap operands.
8285 (*nabs<mode>2): Ditto.
8287 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
8290 * config/i386/sse.md (<code>v8qiv8hi2): Use
8291 simplify_gen_subreg instead of simplify_subreg.
8292 (<code>v8qiv8si2): Ditto.
8293 (<code>v4qiv4si2): Ditto.
8294 (<code>v4hiv4si2): Ditto.
8295 (<code>v8qiv8di2): Ditto.
8296 (<code>v4qiv4di2): Ditto.
8297 (<code>v2qiv2di2): Ditto.
8298 (<code>v4hiv4di2): Ditto.
8299 (<code>v2hiv2di2): Ditto.
8300 (<code>v2siv2di2): Ditto.
8302 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
8305 * config/i386/i386.md (*pushsi2_rex64):
8306 Use "e" constraint instead of "i".
8308 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
8310 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
8311 (lto_input_tree_1): Strenghten sanity check.
8312 (lto_input_tree): Update call of lto_input_scc.
8313 * lto-streamer-out.c: Include ipa-utils.h
8314 (create_output_block): Initialize local_trees if merigng is going
8316 (destroy_output_block): Destroy local_trees.
8317 (DFS): Add max_local_entry.
8318 (local_tree_p): New function.
8319 (DFS::DFS): Initialize and maintain it.
8320 (DFS::DFS_write_tree): Decide on streaming format.
8321 (lto_output_tree): Stream inline singleton SCCs
8322 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
8323 (struct output_block): Add local_trees.
8324 (lto_input_scc): Update prototype.
8326 2020-05-20 Patrick Palka <ppalka@redhat.com>
8329 * hash-table.h (hash_table::find_with_hash): Move up the call to
8332 2020-05-20 Martin Liska <mliska@suse.cz>
8334 * lto-compress.c (lto_compression_zstd): Fill up
8335 num_compressed_il_bytes.
8336 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
8338 2020-05-20 Richard Biener <rguenther@suse.de>
8340 PR tree-optimization/95219
8341 * tree-vect-loop.c (vectorizable_induction): Reduce
8342 group_size before computing the number of required IVs.
8344 2020-05-20 Richard Biener <rguenther@suse.de>
8347 * tree-inline.c (remap_gimple_stmt): Revert adjusting
8348 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
8350 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8351 Andre Vieira <andre.simoesdiasvieira@arm.com>
8354 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
8356 (mve_vector_mem_operand): Likewise.
8357 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
8358 the load from memory to a core register is legitimate for give mode.
8359 (mve_vector_mem_operand): Define function.
8360 (arm_print_operand): Modify comment.
8361 (arm_mode_base_reg_class): Define.
8362 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
8363 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
8364 * config/arm/constraints.md (Ux): Likewise.
8366 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
8367 add support for missing Vector Store Register and Vector Load Register.
8368 Add a new alternative to support load from memory to PC (or label) in
8370 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
8371 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
8372 mve_memory_operand and also modify the MVE instructions to emit.
8373 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
8374 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
8375 mve_memory_operand and also modify the MVE instructions to emit.
8376 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
8377 mve_memory_operand and also modify the MVE instructions to emit.
8378 (mve_vldrhq_z_fv8hf): Likewise.
8379 (mve_vldrhq_z_<supf><mode>): Likewise.
8380 (mve_vldrwq_fv4sf): Likewise.
8381 (mve_vldrwq_<supf>v4si): Likewise.
8382 (mve_vldrwq_z_fv4sf): Likewise.
8383 (mve_vldrwq_z_<supf>v4si): Likewise.
8384 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
8385 (mve_vld1q_<supf><mode>): Likewise.
8386 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
8388 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
8389 mve_memory_operand and also modify the MVE instructions to emit.
8390 (mve_vstrhq_p_<supf><mode>): Likewise.
8391 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
8393 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
8394 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
8395 instructions to emit.
8396 (mve_vstrwq_p_<supf>v4si): Likewise.
8397 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
8398 * config/arm/predicates.md (mve_memory_operand): Define.
8400 2020-05-30 Richard Biener <rguenther@suse.de>
8403 * c-fold.c (c_fully_fold_internal): Enhance guard on
8406 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
8409 * Makefile.in (OBJS): Add adjust-alignment.o.
8410 * adjust-alignment.c (pass_data_adjust_alignment): New.
8411 (pass_adjust_alignment): New.
8412 (pass_adjust_alignment::execute): New.
8413 (make_pass_adjust_alignment): New.
8414 * tree-pass.h (make_pass_adjust_alignment): New.
8415 * passes.def: Add pass_adjust_alignment.
8417 2020-05-19 Alex Coplan <alex.coplan@arm.com>
8420 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
8421 identity permutation.
8423 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8425 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
8426 msp430_small, msp430_large and size24plus DejaGNU effective
8428 Improve grammar in descriptions for size20plus and size32plus effective
8431 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
8433 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
8434 callee saved registers only in xBPF.
8435 (bpf_expand_prologue): Save callee saved registers only in xBPF.
8436 (bpf_expand_epilogue): Likewise for restoring.
8437 * doc/invoke.texi (eBPF Options): Document this is activated by
8440 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
8442 * config/bpf/bpf.opt (mxbpf): New option.
8443 * doc/invoke.texi (Option Summary): Add -mxbpf.
8444 (eBPF Options): Document -mxbbpf.
8446 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
8449 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
8450 (<code>v32qiv32hi2): Ditto.
8451 (<code>v8qiv8hi2): Ditto.
8452 (<code>v16qiv16si2): Ditto.
8453 (<code>v8qiv8si2): Ditto.
8454 (<code>v4qiv4si2): Ditto.
8455 (<code>v16hiv16si2): Ditto.
8456 (<code>v8hiv8si2): Ditto.
8457 (<code>v4hiv4si2): Ditto.
8458 (<code>v8qiv8di2): Ditto.
8459 (<code>v4qiv4di2): Ditto.
8460 (<code>v2qiv2di2): Ditto.
8461 (<code>v8hiv8di2): Ditto.
8462 (<code>v4hiv4di2): Ditto.
8463 (<code>v2hiv2di2): Ditto.
8464 (<code>v8siv8di2): Ditto.
8465 (<code>v4siv4di2): Ditto.
8466 (<code>v2siv2di2): Ditto.
8468 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
8470 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
8471 (riscv_implied_info): New.
8472 (riscv_subset_list): Add handle_implied_ext.
8473 (riscv_subset_list::to_string): New parameter version_p to
8474 control output format.
8475 (riscv_subset_list::handle_implied_ext): New.
8476 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
8477 (riscv_arch_str): New parameter version_p to control output format.
8478 (riscv_expand_arch): New.
8479 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
8481 * config/riscv/riscv.h (riscv_expand_arch): New,
8482 (EXTRA_SPEC_FUNCTIONS): Define.
8483 (ASM_SPEC): Transform -march= via riscv_expand_arch.
8485 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
8487 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
8488 parse_multiletter_ext.
8489 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
8490 adjust parsing order for 's' and 'x'.
8492 2020-05-19 Richard Biener <rguenther@suse.de>
8494 * tree-vectorizer.h (_slp_tree::vectype): Add field.
8495 (SLP_TREE_VECTYPE): New.
8496 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
8498 (vect_create_new_slp_node): Likewise.
8499 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
8501 (vect_slp_analyze_node_operations): Walk nodes children for
8503 (vect_get_constant_vectors): Use local scope op variable.
8504 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
8505 (vect_model_simple_cost): Adjust.
8506 (vect_model_store_cost): Likewise.
8507 (vectorizable_store): Likewise.
8509 2020-05-18 Martin Sebor <msebor@redhat.com>
8512 * tree-object-size.c (decl_init_size): New function.
8513 (addr_object_size): Call it.
8514 * tree.h (last_field): Declare.
8515 (first_field): Add attribute nonnull.
8517 2020-05-18 Martin Sebor <msebor@redhat.com>
8520 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
8521 * tree.c (component_ref_size): Correct the handling or array members
8523 Drop a pointless test.
8524 Rename a local variable.
8526 2020-05-18 Jason Merrill <jason@redhat.com>
8528 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
8529 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
8531 2020-05-14 Jason Merrill <jason@redhat.com>
8533 * doc/install.texi (Prerequisites): Update boostrap compiler
8534 requirement to C++11/GCC 4.8.
8536 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8538 PR tree-optimization/94952
8539 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
8540 Initialize variables bitpos, bitregion_start, and bitregion_end in
8541 order to silence warnings about use of uninitialized variables.
8543 2020-05-18 Carl Love <cel@us.ibm.com>
8546 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
8547 first_match_index_<mode>.
8548 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
8549 additional test cases with zero vector elements.
8551 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
8554 * config/i386/i386-expand.c (ix86_expand_int_movcc):
8555 Avoid reversing a non-trapping comparison to a trapping one.
8557 2020-05-18 Alex Coplan <alex.coplan@arm.com>
8559 * config/arm/arm.c (output_move_double): Fix codegen when loading into
8560 a register pair with an odd base register.
8562 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
8564 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
8565 Do not emit FLAGS_REG clobber for TFmode.
8566 * config/i386/i386.md (*<code>tf2_1): Rewrite as
8567 define_insn_and_split. Mark operands 1 and 2 commutative.
8568 (*nabstf2_1): Ditto.
8569 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
8570 Do not swap memory operands. Simplify RTX generation.
8571 (neg abs SSE splitter): Ditto.
8572 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
8573 commutative. Do not swap operands. Simplify RTX generation.
8574 (*nabs<mode>2): Ditto.
8576 2020-05-18 Richard Biener <rguenther@suse.de>
8578 * tree-vect-slp.c (vect_slp_bb): Start after labels.
8579 (vect_get_constant_vectors): Really place init stmt after scalar defs.
8580 * tree-vect-stmts.c (vect_init_vector_1): Insert before
8583 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
8585 * config/i386/driver-i386.c (host_detect_local_cpu): Support
8586 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
8589 2020-05-18 Richard Biener <rguenther@suse.de>
8592 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
8593 when inlining into a non-call EH function.
8595 2020-05-18 Richard Biener <rguenther@suse.de>
8597 PR tree-optimization/95172
8598 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
8599 eventually need the conditional processing.
8600 (execute_sm_exit): When processing an orderd sequence
8601 avoid doing any conditional processing.
8602 (hoist_memory_references): Pass down whether all edges
8603 have ordered processing for a ref to execute_sm.
8605 2020-05-17 Jeff Law <law@redhat.com>
8607 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
8608 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
8609 into a single pattern using pc_or_label_operand.
8610 * config/h8300/combiner.md (bit branch patterns): Likewise.
8611 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
8613 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
8616 * config/i386/i386-features.c (has_non_address_hard_reg):
8618 (pseudo_reg_set): This. Return the SET expression. Ignore
8619 pseudo register push.
8620 (general_scalar_to_vector_candidate_p): Combine single_set and
8621 has_non_address_hard_reg calls to pseudo_reg_set.
8622 (timode_scalar_to_vector_candidate_p): Likewise.
8623 * config/i386/i386.md (*pushv1ti2): New pattern.
8625 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8628 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8630 * tree-vrp.c (operand_less_p): Move to...
8631 * vr-values.c (operand_less_p): ...here.
8632 * tree-vrp.h (operand_less_p): Remove.
8634 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8636 * tree-vrp.c (operand_less_p): Move to...
8637 * vr-values.c (operand_less_p): ...here.
8638 * tree-vrp.h (operand_less_p): Remove.
8640 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8642 * tree-vrp.c (class vrp_insert): Remove prototype for
8645 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8647 * tree-vrp.c (class live_names): New.
8648 (live_on_edge): Move into live_names.
8649 (build_assert_expr_for): Move into vrp_insert.
8650 (find_assert_locations_in_bb): Rename from
8651 find_assert_locations_1.
8652 (process_assert_insertions_for): Move into vrp_insert.
8653 (compare_assert_loc): Same.
8654 (remove_range_assertions): Same.
8655 (dump_asserts_for): Rename to vrp_insert::dump.
8656 (debug_asserts_for): Rename to vrp_insert::debug.
8657 (dump_all_asserts): Rename to vrp_insert::dump.
8658 (debug_all_asserts): Rename to vrp_insert::debug.
8660 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8662 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
8663 check_array_ref, check_mem_ref, and search_for_addr_array
8665 (class array_bounds_checker): ...here.
8666 (class check_array_bounds_dom_walker): Adjust to use
8667 array_bounds_checker.
8668 (check_all_array_refs): Move into array_bounds_checker and rename
8670 (class vrp_folder): Make fold_predicate_in private.
8672 2020-05-15 Jeff Law <law@redhat.com>
8674 * config/h8300/h8300.md (SFI iterator): New iterator for
8676 * config/h8300/peepholes.md (memory comparison): Use mode
8677 iterator to consolidate 3 patterns into one.
8678 (stack allocation and stack store): Handle SFmode. Handle
8681 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
8683 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
8684 RS6000_BTM_POWERPC64.
8686 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
8688 * config/i386/i386.md (SWI48DWI): New mode iterator.
8689 (*push<mode>2): Allow XMM registers.
8690 (*pushdi2_rex64): Ditto.
8691 (*pushsi2_rex64): Ditto.
8693 (push XMM reg splitter): New splitter
8695 (*pushdf) Change "x" operand constraint to "v".
8696 (*pushsf_rex64): Ditto.
8699 2020-05-15 Richard Biener <rguenther@suse.de>
8701 PR tree-optimization/92260
8702 * tree-vect-slp.c (vect_get_constant_vectors): Compute
8703 the number of vector stmts in a canonical way.
8705 2020-05-15 Martin Liska <mliska@suse.cz>
8707 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
8710 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
8712 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
8714 2020-05-15 Richard Biener <rguenther@suse.de>
8716 PR tree-optimization/95133
8717 * gimple-ssa-split-paths.c
8718 (find_block_to_duplicate_for_splitting_paths): Check for
8721 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
8723 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
8725 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
8727 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
8730 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
8731 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
8734 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
8737 * config/i386/i386.md (isa): Add sse3_noavx.
8738 (enabled): Handle sse3_noavx.
8740 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
8741 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
8742 alternatives. Match commutative vec_select selector operands.
8743 (*mmx_haddv2sf3_low): New insn pattern.
8745 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
8746 (*mmx_hsubv2sf3_low): New insn pattern.
8748 2020-05-15 Richard Biener <rguenther@suse.de>
8750 PR tree-optimization/33315
8751 * tree-ssa-sink.c: Include tree-eh.h.
8752 (sink_stats): Add commoned member.
8753 (sink_common_stores_to_bb): New function implementing store
8754 commoning by sinking to the successor.
8755 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
8756 (pass_sink_code::execute): Likewise. Record commoned stores
8759 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
8761 PR rtl-optimization/37451, part of PR target/61837
8762 * loop-doloop.c (doloop_simplify_count): New function. Simplify
8763 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
8764 (doloop_modify): Call doloop_simplify_count.
8766 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
8769 * doc/sourcebuild.texi: Document effective target lgccjit.
8771 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
8773 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
8774 define_expand, and rename the original to ...
8775 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
8776 (add<mode>3_zext_dup_exec): Likewise, with ...
8777 (add<mode>3_vcc_zext_dup_exec): ... this.
8778 (add<mode>3_zext_dup2): Likewise, with ...
8779 (add<mode>3_zext_dup_exec): ... this.
8780 (add<mode>3_zext_dup2_exec): Likewise, with ...
8781 (add<mode>3_zext_dup2): ... this.
8782 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
8783 addv64di3_zext* calls to use addv64di3_vcc_zext*.
8785 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8788 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
8789 (extendv2sfv2df2): Ditto.
8791 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
8793 * configure: Regenerated.
8795 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
8797 * config/arm/arm.c (reg_needs_saving_p): New function.
8798 (use_return_insn): Use reg_needs_saving_p.
8799 (arm_get_vfp_saved_size): Likewise.
8800 (arm_compute_frame_layout): Likewise.
8801 (arm_save_coproc_regs): Likewise.
8802 (thumb1_expand_epilogue): Likewise.
8803 (arm_expand_epilogue_apcs_frame): Likewise.
8804 (arm_expand_epilogue): Likewise.
8806 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
8808 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
8810 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8813 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
8815 (floatv2siv2df2): New expander.
8816 (floatunsv2siv2df2): New insn pattern.
8818 (fix_truncv2dfv2si2): New expander.
8819 (fixuns_truncv2dfv2si2): New insn pattern.
8821 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
8824 * config/aarch64/aarch64-sve-builtins.cc
8825 (handle_arm_sve_vector_bits_attribute): Create a copy of the
8826 original type's TYPE_MAIN_VARIANT, then reapply all the differences
8827 between the original type and its main variant.
8829 2020-05-14 Richard Biener <rguenther@suse.de>
8832 * real.c (real_to_decimal_for_mode): Make sure we handle
8833 a zero with nonzero exponent.
8835 2020-05-14 Jakub Jelinek <jakub@redhat.com>
8837 * Makefile.in (GTFILES): Add omp-general.c.
8838 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
8839 calls_declare_variant_alt members and initialize them in the
8841 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
8842 calls to declare_variant_alt nodes.
8843 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
8844 and calls_declare_variant_alt.
8845 (input_overwrite_node): Read them back.
8846 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
8848 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
8850 (tree_function_versioning): Copy calls_declare_variant_alt bit.
8851 * omp-offload.c (execute_omp_device_lower): Call
8852 omp_resolve_declare_variant on direct function calls.
8853 (pass_omp_device_lower::gate): Also enable for
8854 calls_declare_variant_alt functions.
8855 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
8856 (omp_context_selector_matches): Handle the case when
8857 cfun->curr_properties has PROP_gimple_any bit set.
8858 (struct omp_declare_variant_entry): New type.
8859 (struct omp_declare_variant_base_entry): New type.
8860 (struct omp_declare_variant_hasher): New type.
8861 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
8863 (omp_declare_variants): New variable.
8864 (struct omp_declare_variant_alt_hasher): New type.
8865 (omp_declare_variant_alt_hasher::hash,
8866 omp_declare_variant_alt_hasher::equal): New methods.
8867 (omp_declare_variant_alt): New variables.
8868 (omp_resolve_late_declare_variant): New function.
8869 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
8870 when called late. Create a magic declare_variant_alt fndecl and
8871 cgraph node and return that if decision needs to be deferred until
8872 after gimplification.
8873 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
8877 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
8878 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
8879 entry block if info->after_stmt is NULL, otherwise add after that stmt
8880 and update it after adding each stmt.
8881 (ipa_simd_modify_function_body): Initialize info.after_stmt.
8883 * function.h (struct function): Add has_omp_target bit.
8884 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
8886 (omp_discover_declare_target_tgt_fn_r): ... this.
8887 (omp_discover_declare_target_var_r): Call
8888 omp_discover_declare_target_tgt_fn_r instead of
8889 omp_discover_declare_target_fn_r.
8890 (omp_discover_implicit_declare_target): Also queue functions with
8891 has_omp_target bit set, for those walk with
8892 omp_discover_declare_target_fn_r, for declare target to functions
8893 walk with omp_discover_declare_target_tgt_fn_r.
8895 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8898 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
8899 Add SSE/AVX alternative. Change operand predicates from
8900 nonimmediate_operand to register_mmxmem_operand.
8901 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8902 (fix_truncv2sfv2si2): New expander.
8903 (fixuns_truncv2sfv2si2): New insn pattern.
8905 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
8906 Add SSE/AVX alternative. Change operand predicates from
8907 nonimmediate_operand to register_mmxmem_operand.
8908 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8909 (floatv2siv2sf2): New expander.
8910 (floatunsv2siv2sf2): New insn pattern.
8912 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
8914 (IX86_BUILTIN_PI2FD): Ditto.
8916 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8918 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
8920 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
8923 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8925 * config/s390/s390.c (allocate_stack_space): Add missing updates
8926 of last_probe_offset.
8928 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8930 * config/s390/s390.md ("allocate_stack"): Call
8931 anti_adjust_stack_and_probe_stack_clash when stack clash
8932 protection is enabled.
8933 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
8934 prototype. Remove static.
8935 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
8938 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
8940 * config/rs6000/altivec.h (vec_extractl): New #define.
8941 (vec_extracth): Likewise.
8942 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
8943 (UNSPEC_EXTRACTR): Likewise.
8944 (vextractl<mode>): New expansion.
8945 (vextractl<mode>_internal): New insn.
8946 (vextractr<mode>): New expansion.
8947 (vextractr<mode>_internal): New insn.
8948 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
8949 New built-in function.
8950 (__builtin_altivec_vextduhvlx): Likewise.
8951 (__builtin_altivec_vextduwvlx): Likewise.
8952 (__builtin_altivec_vextddvlx): Likewise.
8953 (__builtin_altivec_vextdubvhx): Likewise.
8954 (__builtin_altivec_vextduhvhx): Likewise.
8955 (__builtin_altivec_vextduwvhx): Likewise.
8956 (__builtin_altivec_vextddvhx): Likewise.
8957 (__builtin_vec_extractl): New overloaded built-in function.
8958 (__builtin_vec_extracth): Likewise.
8959 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8960 Define overloaded forms of __builtin_vec_extractl and
8961 __builtin_vec_extracth.
8962 (builtin_function_type): Add cases to mark arguments of new
8963 built-in functions as unsigned.
8964 (rs6000_common_init_builtins): Add
8965 opaque_ftype_opaque_opaque_opaque_opaque.
8966 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
8967 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8968 for a Future Architecture): Add description of vec_extractl and
8969 vec_extractr built-in functions.
8971 2020-05-13 Richard Biener <rguenther@suse.de>
8973 * target.def (add_stmt_cost): Add new vectype parameter.
8974 * targhooks.c (default_add_stmt_cost): Adjust.
8975 * targhooks.h (default_add_stmt_cost): Likewise.
8976 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
8978 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
8979 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
8980 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
8982 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
8983 (dump_stmt_cost): Add new vectype parameter.
8984 (add_stmt_cost): Likewise.
8985 (record_stmt_cost): Likewise.
8986 (record_stmt_cost): Add overload with old signature.
8987 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
8989 (vect_get_known_peeling_cost): Likewise.
8990 (vect_estimate_min_profitable_iters): Likewise.
8991 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
8992 * tree-vect-stmts.c (record_stmt_cost): Likewise.
8993 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
8994 and pass down correct vectype and NULL stmt_info.
8995 (vect_model_simple_cost): Adjust.
8996 (vect_model_store_cost): Likewise.
8998 2020-05-13 Richard Biener <rguenther@suse.de>
9000 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
9001 (_slp_instance::group_size): Likewise.
9002 * tree-vect-loop.c (vectorizable_reduction): The group size
9003 is the number of lanes in the node.
9004 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
9005 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
9006 verify it matches the instance trees number of lanes.
9007 (vect_slp_analyze_node_operations_1): Use the numer of lanes
9008 in the node as group size.
9009 (vect_bb_vectorization_profitable_p): Use the instance root
9010 number of lanes for the size of life.
9011 (vect_schedule_slp_instance): Use the number of lanes as
9013 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
9014 parameter. Use the number of lanes of the load for the group
9015 size in the gap adjustment code.
9016 (vect_analyze_stmt): Adjust.
9017 (vect_transform_stmt): Likewise.
9019 2020-05-13 Jakub Jelinek <jakub@redhat.com>
9022 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
9023 if the last insn is a note.
9025 PR tree-optimization/95060
9026 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
9027 if it is the single use of the FMA internal builtin.
9029 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
9031 PR tree-optimization/94969
9032 * tree-data-dependence.c (constant_access_functions): Rename to...
9033 (invariant_access_functions): ...this. Add parameter. Check for
9034 invariant access function, rather than constant.
9035 (build_classic_dist_vector): Call above function.
9036 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
9038 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
9041 * doc/extend.texi (x86Operandmodifiers): Document more x86
9043 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
9045 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
9047 * tree-vrp.c (class vrp_insert): New.
9048 (insert_range_assertions): Move to class vrp_insert.
9049 (dump_all_asserts): Same as above.
9050 (dump_asserts_for): Same as above.
9051 (live): Same as above.
9052 (need_assert_for): Same as above.
9053 (live_on_edge): Same as above.
9054 (finish_register_edge_assert_for): Same as above.
9055 (find_switch_asserts): Same as above.
9056 (find_assert_locations): Same as above.
9057 (find_assert_locations_1): Same as above.
9058 (find_conditional_asserts): Same as above.
9059 (process_assert_insertions): Same as above.
9060 (register_new_assert_for): Same as above.
9061 (vrp_prop): New variable fun.
9062 (vrp_initialize): New parameter.
9063 (identify_jump_threads): Same as above.
9064 (execute_vrp): Same as above.
9067 2020-05-12 Keith Packard <keith.packard@sifive.com>
9069 * config/riscv/riscv.c (riscv_unique_section): New.
9070 (TARGET_ASM_UNIQUE_SECTION): New.
9072 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
9074 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
9075 * config/riscv/riscv-passes.def: New file.
9076 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
9077 * config/riscv/riscv-shorten-memrefs.c: New file.
9078 * config/riscv/riscv.c (tree-pass.h): New include.
9079 (riscv_compressed_reg_p): New Function
9080 (riscv_compressed_lw_offset_p): Likewise.
9081 (riscv_compressed_lw_address_p): Likewise.
9082 (riscv_shorten_lw_offset): Likewise.
9083 (riscv_legitimize_address): Attempt to convert base + large_offset
9084 to compressible new_base + small_offset.
9085 (riscv_address_cost): Make anticipated compressed load/stores
9086 cheaper for code size than uncompressed load/stores.
9087 (riscv_register_priority): Move compressed register check to
9088 riscv_compressed_reg_p.
9089 * config/riscv/riscv.h (C_S_BITS): Define.
9090 (CSW_MAX_OFFSET): Define.
9091 * config/riscv/riscv.opt (mshorten-memefs): New option.
9092 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
9093 (PASSES_EXTRA): Add riscv-passes.def.
9094 * doc/invoke.texi: Document -mshorten-memrefs.
9096 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
9097 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
9098 * doc/tm.texi: Regenerate.
9099 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
9100 * sched-deps.c (attempt_change): Use old address if it is cheaper than
9102 * target.def (new_address_profitable_p): New hook.
9103 * targhooks.c (default_new_address_profitable_p): New function.
9104 * targhooks.h (default_new_address_profitable_p): Declare.
9106 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
9109 * config/i386/mmx.md (copysignv2sf3): New expander.
9110 (xorsignv2sf3): Ditto.
9111 (signbitv2sf3): Ditto.
9113 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
9116 * config/i386/mmx.md (fmav2sf4): New insn pattern.
9121 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
9123 * Makefile.in (CET_HOST_FLAGS): New.
9124 (COMPILER): Add $(CET_HOST_FLAGS).
9125 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
9126 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
9128 * aclocal.m4: Regenerated.
9129 * configure: Likewise.
9131 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
9134 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
9135 (*mmx_<code>v2sf2): New insn_and_split pattern.
9136 (*mmx_nabsv2sf2): Ditto.
9137 (*mmx_andnotv2sf3): New insn pattern.
9138 (*mmx_<code>v2sf3): Ditto.
9139 * config/i386/i386.md (absneg_op): New code attribute.
9140 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
9141 (ix86_build_signbit_mask): Ditto.
9143 2020-05-12 Richard Biener <rguenther@suse.de>
9145 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
9148 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
9150 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
9151 Update prototype to include "local" argument.
9152 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
9153 "local" argument. Handle local common decls.
9154 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
9155 msp430_output_aligned_decl_common call with 0 for "local" argument.
9156 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
9158 2020-05-12 Richard Biener <rguenther@suse.de>
9160 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
9162 2020-05-12 Martin Liska <mliska@suse.cz>
9166 * sanopt.c (sanitize_rewrite_addressable_params):
9167 Clear DECL_NOT_GIMPLE_REG_P for argument.
9169 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
9171 PR tree-optimization/94980
9172 * tree-vect-generic.c (expand_vector_comparison): Use
9173 vector_element_bits_tree to get the element size in bits,
9174 rather than using TYPE_SIZE.
9175 (expand_vector_condition, vector_element): Likewise.
9177 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
9179 PR tree-optimization/94980
9180 * tree-vect-generic.c (build_replicated_const): Take the number
9181 of bits as a parameter, instead of the type of the elements.
9182 (do_plus_minus): Update accordingly, using vector_element_bits
9183 to calculate the correct number of bits.
9184 (do_negate): Likewise.
9186 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
9188 PR tree-optimization/94980
9189 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
9190 * tree.c (vector_element_bits, vector_element_bits_tree): New.
9191 * match.pd: Use the new functions instead of determining the
9192 vector element size directly from TYPE_SIZE(_UNIT).
9193 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
9194 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
9195 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
9196 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
9197 (expand_vector_conversion): Likewise.
9198 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
9199 a divisor. Convert the dividend to bits to compensate.
9200 * tree-vect-loop.c (vectorizable_live_operation): Call
9201 vector_element_bits instead of open-coding it.
9203 2020-05-12 Jakub Jelinek <jakub@redhat.com>
9205 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
9206 * omp-offload.c: Include context.h.
9207 (omp_declare_target_fn_p, omp_declare_target_var_p,
9208 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
9209 omp_discover_implicit_declare_target): New functions.
9210 * cgraphunit.c (analyze_functions): Call
9211 omp_discover_implicit_declare_target.
9213 2020-05-12 Richard Biener <rguenther@suse.de>
9215 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
9216 literal constant &MEM[..] to a constant literal.
9218 2020-05-12 Richard Biener <rguenther@suse.de>
9220 PR tree-optimization/95045
9221 * dbgcnt.def (lim): Add debug-counter.
9222 * tree-ssa-loop-im.c: Include dbgcnt.h.
9223 (find_refs_for_sm): Use lim debug counter for store motion
9225 (do_store_motion): Rename form store_motion. Commit edge
9227 (store_motion_loop): ... here.
9228 (tree_ssa_lim): Adjust.
9230 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9232 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
9233 (vec_ctzm): Rename to vec_cnttzm.
9234 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
9235 Change fourth operand for vec_ternarylogic to require
9236 compatibility with unsigned SImode rather than unsigned QImode.
9237 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9238 Remove overloaded forms of vec_gnb that are no longer needed.
9239 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9240 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
9241 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
9242 vec_gnb; move vec_ternarylogic documentation into this section
9243 and replace const unsigned char with const unsigned int as its
9246 2020-05-11 Carl Love <cel@us.ibm.com>
9248 * config/rs6000/altivec.h (vec_genpcvm): New #define.
9249 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
9251 (XXGENPCVM_V8HI): Likewise.
9252 (XXGENPCVM_V4SI): Likewise.
9253 (XXGENPCVM_V2DI): Likewise.
9254 (XXGENPCVM): New overloaded built-in instantiation.
9255 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
9256 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
9257 (altivec_expand_builtin): Add special handling for
9258 FUTURE_BUILTIN_VEC_XXGENPCVM.
9259 (builtin_function_type): Add handling for
9260 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
9261 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
9262 (UNSPEC_XXGENPCV): New constant.
9263 (xxgenpcvm_<mode>_internal): New insn.
9264 (xxgenpcvm_<mode>): New expansion.
9265 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
9267 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9269 * config/rs6000/altivec.h (vec_strir): New #define.
9270 (vec_stril): Likewise.
9271 (vec_strir_p): Likewise.
9272 (vec_stril_p): Likewise.
9273 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
9274 (UNSPEC_VSTRIL): Likewise.
9275 (vstrir_<mode>): New expansion.
9276 (vstrir_code_<mode>): New insn.
9277 (vstrir_p_<mode>): New expansion.
9278 (vstrir_p_code_<mode>): New insn.
9279 (vstril_<mode>): New expansion.
9280 (vstril_code_<mode>): New insn.
9281 (vstril_p_<mode>): New expansion.
9282 (vstril_p_code_<mode>): New insn.
9283 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
9284 New built-in function.
9285 (__builtin_altivec_vstrihr): Likewise.
9286 (__builtin_altivec_vstribl): Likewise.
9287 (__builtin_altivec_vstrihl): Likewise.
9288 (__builtin_altivec_vstribr_p): Likewise.
9289 (__builtin_altivec_vstrihr_p): Likewise.
9290 (__builtin_altivec_vstribl_p): Likewise.
9291 (__builtin_altivec_vstrihl_p): Likewise.
9292 (__builtin_vec_strir): New overloaded built-in function.
9293 (__builtin_vec_stril): Likewise.
9294 (__builtin_vec_strir_p): Likewise.
9295 (__builtin_vec_stril_p): Likewise.
9296 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9297 Define overloaded forms of __builtin_vec_strir,
9298 __builtin_vec_stril, __builtin_vec_strir_p, and
9299 __builtin_vec_stril_p.
9300 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9301 for a Future Architecture): Add description of vec_stril,
9302 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
9304 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
9306 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
9307 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
9309 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
9310 * config/rs6000/rs6000-builtin.def: Add handling of new macro
9312 (BU_FUTURE_V_4): New macro. Use it.
9313 (BU_FUTURE_OVERLOAD_4): Likewise.
9314 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
9315 handling for quaternary built-in functions.
9316 (altivec_resolve_overloaded_builtin): Add special-case handling
9317 for __builtin_vec_xxeval.
9318 * config/rs6000/rs6000-call.c: Add handling of new macro
9319 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
9320 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
9321 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
9322 (altivec_overloaded_builtins): Add definitions for
9323 FUTURE_BUILTIN_VEC_XXEVAL.
9324 (bdesc_4arg): New array.
9325 (htm_expand_builtin): Add handling for quaternary built-in
9327 (rs6000_expand_quaternop_builtin): New function.
9328 (rs6000_expand_builtin): Add handling for quaternary built-in
9330 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
9331 for unsigned QImode and unsigned HImode.
9332 (builtin_quaternary_function_type): New function.
9333 (rs6000_common_init_builtins): Add handling of quaternary
9335 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
9337 (RS6000_BTC_PREDICATE): Change value of constant.
9338 (RS6000_BTC_ABS): Likewise.
9339 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
9340 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
9341 for a Future Architecture): Add description of vec_ternarylogic
9344 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9346 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
9348 (__builtin_pextd): Likewise.
9349 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
9350 (UNSPEC_PEXTD): Likewise.
9353 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
9354 a Future Architecture): Add descriptions of __builtin_pdepd and
9355 __builtin_pextd functions.
9357 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9359 * config/rs6000/altivec.h (vec_clrl): New #define.
9360 (vec_clrr): Likewise.
9361 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
9362 (UNSPEC_VCLRRB): Likewise.
9365 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
9367 (__builtin_altivec_vclrrb): Likewise.
9368 (__builtin_vec_clrl): New overloaded built-in function.
9369 (__builtin_vec_clrr): Likewise.
9370 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9371 Define overloaded forms of __builtin_vec_clrl and
9373 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9374 for a Future Architecture): Add descriptions of vec_clrl and
9377 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9379 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
9380 built-in function definition.
9381 (__builtin_cnttzdm): Likewise.
9382 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
9383 (UNSPEC_CNTTZDM): Likewise.
9384 (cntlzdm): New insn.
9385 (cnttzdm): Likewise.
9386 * doc/extend.texi (Basic PowerPC Built-in Functions available for
9387 a Future Architecture): Add descriptions of __builtin_cntlzdm and
9388 __builtin_cnttzdm functions.
9390 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
9393 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
9395 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9397 * config/rs6000/altivec.h (vec_cfuge): New #define.
9398 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
9399 (vcfuged): New insn.
9400 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
9401 New built-in function.
9402 * config/rs6000/rs6000-call.c (builtin_function_type): Add
9403 handling for FUTURE_BUILTIN_VCFUGED case.
9404 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9405 for a Future Architecture): Add description of vec_cfuge built-in
9408 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9410 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
9412 (BU_FUTURE_MISC_1): Likewise.
9413 (BU_FUTURE_MISC_2): Likewise.
9414 (BU_FUTURE_MISC_3): Likewise.
9415 (__builtin_cfuged): New built-in function definition.
9416 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
9418 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
9419 a Future Architecture): New subsubsection.
9421 2020-05-11 Richard Biener <rguenther@suse.de>
9423 PR tree-optimization/95049
9424 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
9425 between different constants.
9427 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
9429 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
9431 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9432 Bill Schmidt <wschmidt@linux.ibm.com>
9434 * config/rs6000/altivec.h (vec_gnb): New #define.
9435 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
9437 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
9439 (BU_FUTURE_OVERLOAD_2): Likewise.
9440 (BU_FUTURE_OVERLOAD_3): Likewise.
9441 (__builtin_altivec_gnb): New built-in function.
9442 (__buiiltin_vec_gnb): New overloaded built-in function.
9443 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9444 Define overloaded forms of __builtin_vec_gnb.
9445 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
9446 of __builtin_vec_gnb.
9447 (builtin_function_type): Mark return value and arguments unsigned
9448 for FUTURE_BUILTIN_VGNB.
9449 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9450 for a Future Architecture): Add description of vec_gnb built-in
9453 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9454 Bill Schmidt <wschmidt@linux.ibm.com>
9456 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
9458 (vec_pext): Likewise.
9459 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
9460 (UNSPEC_VPEXTD): Likewise.
9463 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
9465 (__builtin_altivec_vpextd): Likewise.
9466 * config/rs6000/rs6000-call.c (builtin_function_type): Add
9467 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
9469 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
9470 for a Future Architecture): Add description of vec_pdep and
9471 vec_pext built-in functions.
9473 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9474 Bill Schmidt <wschmidt@linux.ibm.com>
9476 * config/rs6000/altivec.h (vec_clzm): New macro.
9477 (vec_ctzm): Likewise.
9478 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
9479 (UNSPEC_VCTZDM): Likewise.
9482 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
9483 (BU_FUTURE_V_1): Likewise.
9484 (BU_FUTURE_V_2): Likewise.
9485 (BU_FUTURE_V_3): Likewise.
9486 (__builtin_altivec_vclzdm): New builtin definition.
9487 (__builtin_altivec_vctzdm): Likewise.
9488 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
9489 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
9491 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
9492 value and parameter types to be unsigned for VCLZDM and VCTZDM.
9493 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
9494 support for TARGET_FUTURE flag.
9495 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
9496 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
9497 for a Future Architecture): New subsubsection.
9499 2020-05-11 Richard Biener <rguenther@suse.de>
9501 PR tree-optimization/94988
9502 PR tree-optimization/95025
9503 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
9504 (sm_seq_push_down): Take extra parameter denoting where we
9506 (execute_sm_exit): Re-issue sm_other stores in the correct
9508 (sm_seq_valid_bb): When always executed, allow sm_other to
9509 prevail inbetween sm_ord and record their stored value.
9510 (hoist_memory_references): Adjust refs_not_supported propagation
9511 and prune sm_other from the end of the ordered sequences.
9513 2020-05-11 Felix Yang <felix.yang@huawei.com>
9516 * config/aarch64/aarch64.md (mov<mode>):
9517 Bitcasts to the equivalent integer mode using gen_lowpart
9518 instead of doing FAIL for scalar floating point move.
9520 2020-05-11 Alex Coplan <alex.coplan@arm.com>
9522 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
9523 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
9524 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
9525 (*csinv3_uxtw_insn2): New.
9526 (*csinv3_uxtw_insn3): New.
9527 * config/aarch64/iterators.md (neg_not_cs): New.
9529 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
9532 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
9533 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
9534 (*mmx_addv2sf3): Ditto.
9535 (*mmx_subv2sf3): Ditto.
9536 (*mmx_mulv2sf3): Ditto.
9537 (*mmx_<code>v2sf3): Ditto.
9538 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
9540 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
9543 * config/i386/i386.c (ix86_vector_mode_supported_p):
9544 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
9545 * config/i386/mmx.md (*mov<mode>_internal): Do not set
9546 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
9548 (mmx_addv2sf3): Change operand predicates from
9549 nonimmediate_operand to register_mmxmem_operand.
9550 (addv2sf3): New expander.
9551 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
9552 predicates from nonimmediate_operand to register_mmxmem_operand.
9553 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9555 (mmx_subv2sf3): Change operand predicate from
9556 nonimmediate_operand to register_mmxmem_operand.
9557 (mmx_subrv2sf3): Ditto.
9558 (subv2sf3): New expander.
9559 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
9560 predicates from nonimmediate_operand to register_mmxmem_operand.
9561 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9563 (mmx_mulv2sf3): Change operand predicates from
9564 nonimmediate_operand to register_mmxmem_operand.
9565 (mulv2sf3): New expander.
9566 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
9567 predicates from nonimmediate_operand to register_mmxmem_operand.
9568 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9570 (mmx_<code>v2sf3): Change operand predicates from
9571 nonimmediate_operand to register_mmxmem_operand.
9572 (<code>v2sf3): New expander.
9573 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
9574 predicates from nonimmediate_operand to register_mmxmem_operand.
9575 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9576 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
9578 2020-05-11 Martin Liska <mliska@suse.cz>
9581 * common.opt: Fix typo in option description.
9583 2020-05-11 Martin Liska <mliska@suse.cz>
9585 PR gcov-profile/94928
9586 * gcov-io.h: Add caveat about coverage format parsing and
9587 possible outdated documentation.
9589 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
9591 PR tree-optimization/83403
9592 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
9593 determine_value_range, Add fold conversion of MULT_EXPR, fix the
9596 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
9598 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
9599 __ILP32__ for 32-bit targets.
9601 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
9603 * tree.h (expr_align): Delete.
9604 * tree.c (expr_align): Likewise.
9606 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
9608 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
9609 from end_of_function_needs.
9611 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
9612 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
9614 * config/cris/t-elfmulti: Remove crisv32 multilib.
9615 * config/cris: Remove shared-library and CRIS v32 support.
9617 Move trivially from cc0 to reg:CC model, removing most optimizations.
9618 * config/cris/cris.md: Remove all side-effect patterns and their
9619 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
9620 to all but post-reload control-flow and movem insns. Remove
9621 constraints on all modified expanders. Remove obsoleted cc0-related
9623 (attr "cc"): Remove alternative "rev".
9624 (mode_iterator BWDD, DI_, SI_): New.
9625 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
9626 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
9627 ("mstep_shift", "mstep_mul"): Remove patterns.
9628 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
9629 * config/cris/cris.c: Change all non-condition-code,
9630 non-control-flow emitted insns to add a parallel with clobber of
9631 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
9632 emit_insn to use of emit_move_insn, gen_add2_insn or
9633 cris_emit_insn, as convenient.
9634 (cris_reg_overlap_mentioned_p)
9635 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
9636 (cris_movem_load_rest_p): Don't assume all elements in a
9638 (cris_store_multiple_op_p): Ditto.
9639 (cris_emit_insn): New function.
9640 * cris/cris-protos.h (cris_emit_insn): Declare.
9643 * config/cris/cris.md (zcond): New code_iterator.
9644 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
9646 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
9648 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
9650 * config/cris/cris.md ("movsi"): For memory destination
9651 post-reload, generate clobberless variant. Similarly for a
9652 zero-source post-reload.
9653 ("*mov_tomem<mode>_split"): New split.
9654 ("*mov_tomem<mode>"): New insn.
9655 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
9656 "Q>m" for less-than-SImode.
9657 ("*mov_fromzero<mode>_split"): New split.
9658 ("*mov_fromzero<mode>"): New insn.
9660 Prepare for cmpelim pass to eliminate redundant compare insns.
9661 * config/cris/cris-modes.def: New file.
9662 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
9663 (cris_notice_update_cc): Remove left-over declaration.
9664 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
9665 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
9666 * config/cris/cris.h (SELECT_CC_MODE): Define.
9667 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
9669 (cond): New code_iterator.
9670 (nzcond): Replacement for incorrect ncond. All callers changed.
9671 (nzvccond): Replacement for ocond. All callers changed.
9672 (rnzcond): Replacement for rcond. All callers changed.
9673 (xCC): New code_attr.
9674 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
9676 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
9677 CCmode with iteration over NZVCSET.
9678 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
9680 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
9681 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
9682 ("*btst<mode>"): Similarly, from "*btst".
9683 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
9684 iterating over cond instead of matching the comparison with
9685 ordered_comparison_operator.
9686 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
9687 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
9689 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
9690 NZVCUSE. Remove FIXME.
9691 ("*b<nzcond:code>_reversed<mode>"): Similarly from
9692 "*b<ncond:code>_reversed", over NZUSE.
9693 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
9694 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
9695 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
9696 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
9697 depending on CC_NZmode vs. CCmode. Remove FIXME.
9698 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
9699 "*b<rcond:code>_reversed", over NZUSE.
9700 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
9701 iterating over cond instead of matching the comparison with
9702 ordered_comparison_operator.
9703 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
9704 iterating over NZUSE.
9705 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
9706 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
9707 depending on CC_NZmode vs. CCmode.
9708 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
9709 NZVCUSE. Remove FIXME.
9710 ("cc"): Comment on new use.
9711 ("cc_enabled"): New attribute.
9712 ("enabled"): Make default fall back to cc_enabled.
9713 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
9714 default_subst_attrs.
9715 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
9716 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
9717 "*movsi_internal". Correct contents of, and rename attribute
9718 "cc" to "cc<cccc><ccnz><ccnzvc>".
9719 ("anz", "anzvc", "acc"): New define_subst_attrs.
9720 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
9721 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
9722 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
9723 "movqi". Correct contents of, and rename "cc" attribute to
9724 "cc<cccc><ccnz><ccnzvc>".
9725 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
9726 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
9727 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
9728 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
9729 Rename from "extend<mode>si2".
9730 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
9731 Similar, from "zero_extend<mode>si2".
9732 ("*adddi3<setnz>"): Rename from "*adddi3".
9733 ("*subdi3<setnz>"): Similarly from "*subdi3".
9734 ("*addsi3<setnz>"): Similarly from "*addsi3".
9735 ("*subsi3<setnz>"): Similarly from "*subsi3".
9736 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
9737 "cc" attribute to "cc<ccnz>".
9738 ("*addqi3<setnz>"): Similarly from "*addqi3".
9739 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
9740 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
9742 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
9743 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
9744 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
9745 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
9746 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
9747 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
9748 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
9749 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
9751 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
9753 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
9755 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
9757 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
9759 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
9761 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
9762 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
9763 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
9764 (znnCC, rznnCC): New code_attrs.
9765 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
9766 obseolete comment. Add belt-and-suspenders mode-test to condition.
9767 Add fixme regarding remaining matched-but-not-generated case.
9768 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
9769 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
9770 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
9771 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
9772 Handle output of CC_ZnNmode.
9773 ("*b<nzcond:code>_reversed<mode>"): Ditto.
9775 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
9776 NEG too. Correct comment.
9777 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
9780 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
9782 * ira-color.c (update_costs_from_allocno): Remove
9783 conflict_cost_update_p argument. Propagate costs only along
9784 threads. Always do conflict cost update. Add printing debugging
9786 (update_costs_from_copies): Add printing debugging info.
9787 (restore_costs_from_copies): Ditto.
9788 (assign_hard_reg): Improve debug info.
9789 (push_only_colorable): Ditto. Call update_costs_from_prefs.
9790 (color_allocnos): Remove update_costs_from_prefs.
9792 2020-05-08 Richard Biener <rguenther@suse.de>
9794 * tree-vectorizer.h (vec_info::slp_loads): New.
9795 (vect_optimize_slp): Declare.
9796 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
9797 nothing when there are no loads.
9798 (vect_gather_slp_loads): Gather loads into a vector.
9799 (vect_supported_load_permutation_p): Remove.
9800 (vect_analyze_slp_instance): Do not verify permutation
9802 (vect_analyze_slp): Optimize permutations of reductions
9803 after all SLP instances have been gathered and gather
9805 (vect_optimize_slp): New function split out from
9806 vect_supported_load_permutation_p. Elide some permutations.
9807 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
9808 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
9809 * tree-vect-stmts.c (vectorizable_load): Check whether
9810 the load can be permuted. When generating code assert we can.
9812 2020-05-08 Richard Biener <rguenther@suse.de>
9814 * tree-ssa-sccvn.c (rpo_avail): Change type to
9815 eliminate_dom_walker *.
9816 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
9817 use the DOM walker availability.
9818 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
9819 with vn_valueize as valueization callback.
9820 (vn_reference_maybe_forwprop_address): Likewise.
9821 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
9822 array_ref_low_bound.
9824 2020-05-08 Jakub Jelinek <jakub@redhat.com>
9826 PR tree-optimization/94786
9827 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
9831 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
9835 * tree.c (get_narrower): Reuse the op temporary instead of
9838 PR tree-optimization/94783
9839 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
9842 PR tree-optimization/94956
9843 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
9844 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
9846 PR tree-optimization/94913
9847 * match.pd (A - B + -1 >= A to B >= A): New simplification.
9848 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
9849 true for TYPE_UNSIGNED integral types.
9852 PR rtl-optimization/94516
9853 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
9855 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
9856 Call df_notes_rescan if that argument is not true and returning true.
9857 * combine.c (adjust_for_new_dest): Pass true as second argument to
9858 remove_reg_equal_equiv_notes.
9859 * postreload.c (reload_combine_recognize_pattern): Don't call
9862 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
9864 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
9866 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
9867 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
9868 (*neg_ne_<mode>): Likewise.
9870 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
9872 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
9874 (*setbcr_<un>signed_<GPR:mode>): Likewise.
9875 (cstore<mode>4): Use setbc[r] if available.
9876 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
9877 (eq<mode>3): Use setbc for TARGET_FUTURE.
9878 (*eq<mode>3): Avoid for TARGET_FUTURE.
9879 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
9880 else for non-Pmode, use gen_eq and gen_xor.
9881 (*ne<mode>3): Avoid for TARGET_FUTURE.
9882 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
9884 2020-05-07 Jeff Law <law@redhat.com>
9886 * config/h8300/h8300.md: Move expanders and patterns into
9887 files based on functionality.
9888 * config/h8300/addsub.md: New file.
9889 * config/h8300/bitfield.md: New file
9890 * config/h8300/combiner.md: New file
9891 * config/h8300/divmod.md: New file
9892 * config/h8300/extensions.md: New file
9893 * config/h8300/jumpcall.md: New file
9894 * config/h8300/logical.md: New file
9895 * config/h8300/movepush.md: New file
9896 * config/h8300/multiply.md: New file
9897 * config/h8300/other.md: New file
9898 * config/h8300/proepi.md: New file
9899 * config/h8300/shiftrotate.md: New file
9900 * config/h8300/testcompare.md: New file
9902 * config/h8300/h8300.md (adds/subs splitters): Merge into single
9904 (negation expanders and patterns): Simplify and combine using
9906 (one_cmpl expanders and patterns): Likewise.
9907 (tablejump, indirect_jump patterns ): Likewise.
9908 (shift and rotate expanders and patterns): Likewise.
9909 (absolute value expander and pattern): Drop expander, rename pattern
9911 (peephole2 patterns): Move into...
9912 * config/h8300/peepholes.md: New file.
9914 * config/h8300/constraints.md (L and N): Simplify now that we're not
9915 longer supporting the original H8/300 chip.
9916 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
9917 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
9918 (shift_alg_hi, shift_alg_si): Similarly.
9919 (h8300_option_overrides): Similarly. Default to H8/300H. If
9920 compiling for H8/S, then turn off H8/300H. Do not update the
9921 shift_alg tables for H8/300 port.
9922 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
9924 (push, split_adds_subs, h8300_rtx_costs): Likewise.
9925 (h8300_print_operand, compute_mov_length): Likewise.
9926 (output_plussi, compute_plussi_length): Likewise.
9927 (compute_plussi_cc, output_logical_op): Likewise.
9928 (compute_logical_op_length, compute_logical_op_cc): Likewise.
9929 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
9930 (output_a_shift, compute_a_shift_length): Likewise.
9931 (output_a_rotate, compute_a_rotate_length): Likewise.
9932 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
9933 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
9934 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
9935 (attr_cpu, TARGET_H8300): Remove.
9936 (TARGET_DEFAULT): Update.
9937 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
9938 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
9939 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
9940 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
9941 * config/h8300/h8300.md: Simplify patterns throughout.
9942 * config/h8300/t-h8300: Update multilib configuration.
9944 * config/h8300/h8300.h (LINK_SPEC): Remove.
9945 (USER_LABEL_PREFIX): Likewise.
9947 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
9948 (h8300_option_override): Remove remnants of COFF support.
9950 2020-05-07 Alan Modra <amodra@gmail.com>
9952 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
9953 set_rtx_cost with set_src_cost.
9954 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
9956 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
9958 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
9959 redundant half vector handlings for no peeling gaps.
9961 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
9963 * tree-ssa-operands.c (operands_scanner): New class.
9964 (operands_bitmap_obstack): Remove.
9965 (n_initialized): Remove.
9966 (build_uses): Move to operands_scanner class.
9967 (build_vuse): Same as above.
9968 (build_vdef): Same as above.
9969 (verify_ssa_operands): Same as above.
9970 (finalize_ssa_uses): Same as above.
9971 (cleanup_build_arrays): Same as above.
9972 (finalize_ssa_stmt_operands): Same as above.
9973 (start_ssa_stmt_operands): Same as above.
9974 (append_use): Same as above.
9975 (append_vdef): Same as above.
9976 (add_virtual_operand): Same as above.
9977 (add_stmt_operand): Same as above.
9978 (get_mem_ref_operands): Same as above.
9979 (get_tmr_operands): Same as above.
9980 (maybe_add_call_vops): Same as above.
9981 (get_asm_stmt_operands): Same as above.
9982 (get_expr_operands): Same as above.
9983 (parse_ssa_operands): Same as above.
9984 (finalize_ssa_defs): Same as above.
9985 (build_ssa_operands): Same as above, plus create a C-like wrapper.
9986 (update_stmt_operands): Create an instance of operands_scanner.
9988 2020-05-07 Richard Biener <rguenther@suse.de>
9991 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
9992 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
9993 (refered_from_nonlocal_var): Likewise.
9994 (ipa_pta_execute): Likewise.
9996 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
9998 * gcc/tree-ssa-struct-alias.c: Fix comments
10000 2020-05-07 Martin Liska <mliska@suse.cz>
10002 * doc/invoke.texi: Fix 2 optindex entries.
10004 2020-05-07 Richard Biener <rguenther@suse.de>
10006 PR middle-end/94703
10007 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
10008 (tree_decl_common::not_gimple_reg_flag): ... to this.
10009 * tree.h (DECL_GIMPLE_REG_P): Rename ...
10010 (DECL_NOT_GIMPLE_REG_P): ... to this.
10011 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
10012 (create_tmp_reg): Simplify.
10013 (create_tmp_reg_fn): Likewise.
10014 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
10015 * gimplify.c (create_tmp_from_val): Simplify.
10016 (gimplify_bind_expr): Likewise.
10017 (gimplify_compound_literal_expr): Likewise.
10018 (gimplify_function_tree): Likewise.
10019 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
10020 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
10021 (asan_add_global): Copy it.
10022 * cgraphunit.c (cgraph_node::expand_thunk): Force args
10024 * function.c (gimplify_parameters): Copy
10025 DECL_NOT_GIMPLE_REG_P.
10026 * ipa-param-manipulation.c
10027 (ipa_param_body_adjustments::common_initialization): Simplify.
10028 (ipa_param_body_adjustments::reset_debug_stmts): Copy
10029 DECL_NOT_GIMPLE_REG_P.
10030 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
10031 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
10032 * tree-cfg.c (make_blocks_1): Simplify.
10033 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
10034 * tree-eh.c (lower_eh_constructs_2): Simplify.
10035 * tree-inline.c (declare_return_variable): Adjust and
10037 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
10038 (copy_result_decl_to_var): Likewise.
10039 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
10040 * tree-nested.c (create_tmp_var_for): Simplify.
10041 * tree-parloops.c (separate_decls_in_region_name): Copy
10042 DECL_NOT_GIMPLE_REG_P.
10043 * tree-sra.c (create_access_replacement): Adjust and
10044 generalize partial def support.
10045 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
10046 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
10047 * tree-ssa.c (maybe_optimize_var): Handle clearing of
10048 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
10050 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
10051 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
10052 DECL_NOT_GIMPLE_REG_P.
10053 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
10054 * cfgexpand.c (avoid_type_punning_on_regs): New.
10055 (discover_nonconstant_array_refs): Call
10056 avoid_type_punning_on_regs to avoid unsupported mode punning.
10058 2020-05-07 Alex Coplan <alex.coplan@arm.com>
10060 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
10063 2020-05-07 Richard Biener <rguenther@suse.de>
10065 PR tree-optimization/57359
10066 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
10067 (in_mem_ref::dep_loop): Repurpose.
10068 (LOOP_DEP_BIT): Remove.
10069 (enum dep_kind): New.
10070 (enum dep_state): Likewise.
10071 (record_loop_dependence): New function to populate the
10073 (query_loop_dependence): New function to query the dependence
10075 (memory_accesses::refs_in_loop): Rename to ...
10076 (memory_accesses::refs_loaded_in_loop): ... this and change to
10078 (outermost_indep_loop): Adjust.
10079 (mem_ref_alloc): Likewise.
10080 (gather_mem_refs_stmt): Likewise.
10081 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
10082 (struct sm_aux): New.
10083 (execute_sm): Split code generation on exits, record state
10085 (enum sm_kind): New.
10086 (execute_sm_exit): Exit code generation part.
10087 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
10088 dependence checking on stores reached from exits.
10089 (sm_seq_valid_bb): New function gathering SM stores on exits.
10090 (hoist_memory_references): Re-implement.
10091 (refs_independent_p): Add tbaa_p parameter and pass it down.
10092 (record_dep_loop): Remove.
10093 (ref_indep_loop_p_1): Fold into ...
10094 (ref_indep_loop_p): ... this and generalize for three kinds
10095 of dependence queries.
10096 (can_sm_ref_p): Adjust according to hoist_memory_references
10098 (store_motion_loop): Don't do anything if the set of SM
10099 candidates is empty.
10100 (tree_ssa_lim_initialize): Adjust.
10101 (tree_ssa_lim_finalize): Likewise.
10103 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
10104 Pierre-Marie de Rodat <derodat@adacore.com>
10106 * dwarf2out.c (add_data_member_location_attribute): Take into account
10107 the variant part offset in the computation of the data bit offset.
10108 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
10109 in the call to field_byte_offset.
10110 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
10111 confusing assertion.
10112 (analyze_variant_discr): Deal with boolean subtypes.
10114 2020-05-07 Martin Liska <mliska@suse.cz>
10116 * lto-wrapper.c: Split arguments of MAKE environment
10119 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
10121 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
10122 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
10123 fenv_var and new_fenv_var.
10125 2020-05-06 Jakub Jelinek <jakub@redhat.com>
10128 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
10130 (avx512dq_vextract<shuffletype>64x2_1_maskm,
10131 avx512f_vextract<shuffletype>32x4_1_maskm,
10132 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
10133 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
10135 (*avx512dq_vextract<shuffletype>64x2_1,
10136 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
10137 define_insns. Even in the masked variant allow memory output but in
10138 that case use 0 rather than 0C constraint on the source of masked-out
10140 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
10142 (*avx512f_vextract<shuffletype>32x4_1,
10143 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
10144 Even in the masked variant allow memory output but in that case use
10145 0 rather than 0C constraint on the source of masked-out elts.
10146 (vec_extract_lo_<mode><mask_name>): Split into ...
10147 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
10148 define_insns. Even in the masked variant allow memory output but in
10149 that case use 0 rather than 0C constraint on the source of masked-out
10151 (vec_extract_hi_<mode><mask_name>): Split into ...
10152 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
10153 define_insns. Even in the masked variant allow memory output but in
10154 that case use 0 rather than 0C constraint on the source of masked-out
10157 2020-05-06 qing zhao <qing.zhao@oracle.com>
10160 * common.opt: Add -flarge-source-files.
10161 * doc/invoke.texi: Document it.
10162 * toplev.c (process_options): set line_table->default_range_bits
10163 to 0 when flag_large_source_files is true.
10165 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
10168 * config/i386/predicates.md (add_comparison_operator): New predicate.
10169 * config/i386/i386.md (compare->add splitter): New splitters.
10171 2020-05-06 Richard Biener <rguenther@suse.de>
10173 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
10174 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
10175 Remove slp_instance parameter, just iterate over all scalar stmts.
10176 (vect_slp_analyze_instance_dependence): Adjust and likewise.
10177 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
10179 (vect_schedule_slp): Just iterate over all scalar stmts.
10180 (vect_supported_load_permutation_p): Adjust.
10181 (vect_transform_slp_perm_load): Remove slp_instance parameter,
10182 instead use the number of lanes in the node as group size.
10183 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
10184 factor instead of slp_instance as parameter.
10185 (vectorizable_load): Adjust.
10187 2020-05-06 Andreas Schwab <schwab@suse.de>
10189 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
10190 (aarch64_get_extension_string_for_isa_flags): Don't declare.
10192 2020-05-06 Richard Biener <rguenther@suse.de>
10194 PR middle-end/94964
10195 * cfgloopmanip.c (create_preheader): Require non-complex
10196 preheader edge for CP_SIMPLE_PREHEADERS.
10198 2020-05-06 Richard Biener <rguenther@suse.de>
10200 PR tree-optimization/94963
10201 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
10202 no-warning marking of the conditional store.
10203 (execute_sm): Instead mark the uninitialized state
10204 on loop entry to be not warned about.
10206 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
10208 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
10209 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
10210 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
10211 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
10213 * config/i386/i386-builtin.def: Add new builtins.
10214 * config/i386/i386-c.c (ix86_target_macros_internal): Define
10216 * config/i386/i386-options.c (ix86_target_string): Add
10218 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
10219 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
10221 * config/i386/i386.md (define_c_enum "unspec"): Add
10222 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
10223 (TSXLDTRK): New define_int_iterator.
10224 ("<tsxldtrk>"): New define_insn.
10225 * config/i386/i386.opt: Add -mtsxldtrk.
10226 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
10227 * config/i386/tsxldtrkintrin.h: New.
10228 * doc/invoke.texi: Document -mtsxldtrk.
10230 2020-05-06 Jakub Jelinek <jakub@redhat.com>
10232 PR tree-optimization/94921
10233 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
10236 2020-05-06 Richard Biener <rguenther@suse.de>
10238 PR tree-optimization/94965
10239 * tree-vect-stmts.c (vectorizable_load): Fix typo.
10241 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
10243 * doc/install.texi: Replace Sun with Solaris as appropriate.
10244 (Tools/packages necessary for building GCC, Perl version between
10245 5.6.1 and 5.6.24): Remove Solaris 8 reference.
10246 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
10248 (Specific, i?86-*-solaris2*): Update version references for
10249 Solaris 11.3 and later. Remove gas 2.26 caveat.
10250 (Specific, *-*-solaris2*): Update version references for
10251 Solaris 11.3 and later. Remove boehm-gc reference.
10252 Document GMP, MPFR caveats on Solaris 11.3.
10253 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
10254 (Specific, sparc64-*-solaris2*): Likewise.
10255 Document --build requirement.
10257 2020-05-06 Jakub Jelinek <jakub@redhat.com>
10260 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
10261 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
10263 PR rtl-optimization/94873
10264 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
10265 note if SET_SRC (set) has side-effects.
10267 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
10268 Wei Xiao <wei3.xiao@intel.com>
10270 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
10271 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
10272 (ix86_handle_option): Handle -mserialize.
10273 * config.gcc (serializeintrin.h): New header file.
10274 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
10275 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
10277 * config/i386/i386-builtin.def: Add new builtin.
10278 * config/i386/i386-c.c (__SERIALIZE__): New macro.
10279 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
10281 * (ix86_valid_target_attribute_inner_p): Add target attribute
10283 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
10285 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
10286 (serialize): New define_insn.
10287 * config/i386/i386.opt (mserialize): New option
10288 * config/i386/immintrin.h: Include serailizeintrin.h.
10289 * config/i386/serializeintrin.h: New header file.
10290 * doc/invoke.texi: Add documents for -mserialize.
10292 2020-05-06 Richard Biener <rguenther@suse.de>
10294 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
10295 to/from pointer conversion checking.
10297 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
10299 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
10301 * config/rs6000/rs6000-c.c: Likewise.
10302 * config/rs6000/rs6000-call.c: Likewise.
10303 * config/rs6000/rs6000.c: Likewise.
10305 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
10307 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
10308 (RTEMS_ENDFILE_SPEC): Likewise.
10309 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
10310 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
10311 (LIB_SPECS): Support -nodefaultlibs option.
10312 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
10313 (RTEMS_ENDFILE_SPEC): Likewise.
10314 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
10315 (RTEMS_ENDFILE_SPEC): Likewise.
10316 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
10317 (RTEMS_ENDFILE_SPEC): Likewise.
10319 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10321 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
10322 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
10324 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10326 * config/pru/pru.h: Mark R3.w0 as caller saved.
10328 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10330 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
10331 and gen_doloop_begin_internal.
10332 (pru_reorg_loop): Use gen_pruloop with mode.
10333 * config/pru/pru.md: Use new @insn syntax.
10335 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10337 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
10339 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
10341 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
10342 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
10343 (addqi3_cconly_overflow): Ditto.
10344 (umulv<mode>4): Ditto.
10345 (<s>mul<mode>3_highpart): Ditto.
10346 (tls_global_dynamic_32): Ditto.
10347 (tls_local_dynamic_base_32): Ditto.
10354 (*adddi_4): Remove "m" constraint from scratch operand.
10355 (*add<mode>_4): Ditto.
10357 2020-05-05 Jakub Jelinek <jakub@redhat.com>
10359 PR rtl-optimization/94516
10360 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
10361 with sp = reg, add REG_EQUAL note with sp + const.
10362 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
10363 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
10364 postreload sp = sp + const to sp = reg optimization if needed and
10366 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
10367 reg = sp insn with sp + const REG_EQUAL note. Adjust
10368 try_apply_stack_adjustment caller, call
10369 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
10370 (combine_stack_adjustments): Allocate and free LIVE bitmap,
10371 adjust combine_stack_adjustments_for_block caller.
10373 2020-05-05 Martin Liska <mliska@suse.cz>
10375 PR gcov-profile/93623
10376 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
10379 2020-05-05 Martin Liska <mliska@suse.cz>
10381 * opt-functions.awk (opt_args_non_empty): New function.
10382 * opt-read.awk: Use the function for various option arguments.
10384 2020-05-05 Martin Liska <mliska@suse.cz>
10387 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
10388 report warning when the jobserver is not detected.
10390 2020-05-05 Martin Liska <mliska@suse.cz>
10392 PR gcov-profile/94636
10393 * gcov.c (main): Print total lines summary at the end.
10394 (generate_results): Expect file_name always being non-null.
10395 Print newline after intermediate file is printed in order to align with
10396 what we do for normal files.
10398 2020-05-05 Martin Liska <mliska@suse.cz>
10400 * dumpfile.c (dump_switch_p): Change return type
10401 and print option suggestion.
10402 * dumpfile.h: Change return type.
10403 * opts-global.c (handle_common_deferred_options):
10404 Move error into dump_switch_p function.
10406 2020-05-05 Martin Liska <mliska@suse.cz>
10409 * alloc-pool.h: Use const for some arguments.
10410 * bitmap.h: Likewise.
10411 * mem-stats.h: Likewise.
10412 * sese.h (get_entry_bb): Likewise.
10413 (get_exit_bb): Likewise.
10415 2020-05-05 Richard Biener <rguenther@suse.de>
10417 * tree-vect-slp.c (struct vdhs_data): New.
10418 (vect_detect_hybrid_slp): New walker.
10419 (vect_detect_hybrid_slp): Rewrite.
10421 2020-05-05 Richard Biener <rguenther@suse.de>
10424 * tree-ssa-structalias.c (ipa_pta_execute): Use
10425 varpool_node::externally_visible_p ().
10426 (refered_from_nonlocal_var): Likewise.
10428 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
10430 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
10431 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
10432 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
10434 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
10436 * gimplify.c (gimplify_init_constructor): Do not put the constructor
10437 into static memory if it is not complete.
10439 2020-05-05 Richard Biener <rguenther@suse.de>
10441 PR tree-optimization/94949
10442 * tree-ssa-loop-im.c (execute_sm): Check whether we use
10443 the multithreaded model or always compute the stored value
10444 before eliding a load.
10446 2020-05-05 Alex Coplan <alex.coplan@arm.com>
10448 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
10450 2020-05-05 Jakub Jelinek <jakub@redhat.com>
10452 PR tree-optimization/94800
10453 * match.pd (X + (X << C) to X * (1 + (1 << C)),
10454 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
10458 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
10460 PR tree-optimization/94914
10461 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
10462 New simplification.
10464 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
10466 * config/i386/i386.md (*testqi_ext_3): Use
10467 int_nonimmediate_operand instead of manual mode checks.
10468 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
10469 Use int_nonimmediate_operand predicate. Rewrite
10470 define_insn_and_split pattern to a combine pass splitter.
10472 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
10474 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
10475 * configure: Regenerate.
10477 2020-05-05 Jakub Jelinek <jakub@redhat.com>
10480 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
10481 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
10482 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
10483 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
10485 2020-05-04 Clement Chigot <clement.chigot@atos.net>
10486 David Edelsohn <dje.gcc@gmail.com>
10488 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
10489 for fmodl, frexpl, ldexpl and modfl builtins.
10491 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
10493 PR middle-end/94941
10494 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
10495 chosen lhs is different from the gcall lhs.
10496 (expand_mask_load_optab_fn): Likewise.
10497 (expand_gather_load_optab_fn): Likewise.
10499 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
10502 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
10503 (EQ compare->LTU compare splitter): New splitter.
10504 (NE compare->NEG splitter): Ditto.
10506 2020-05-04 Marek Polacek <polacek@redhat.com>
10509 2020-04-30 Marek Polacek <polacek@redhat.com>
10512 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
10513 (check_aligned_type): Check if TYPE_USER_ALIGN match.
10515 2020-05-04 Richard Biener <rguenther@suse.de>
10517 PR tree-optimization/93891
10518 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
10519 the original reference tree for assessing access alignment.
10521 2020-05-04 Richard Biener <rguenther@suse.de>
10523 PR tree-optimization/39612
10524 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
10525 (set_ref_loaded_in_loop): New.
10526 (mark_ref_loaded): Likewise.
10527 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
10528 (execute_sm): Avoid issueing a load when it was not there.
10529 (execute_sm_if_changed): Avoid issueing warnings for the
10532 2020-05-04 Martin Jambor <mjambor@suse.cz>
10535 * tree-inline.c (tree_function_versioning): Leave any type conversion
10536 of replacements to setup_one_parameter and its friend
10537 force_value_to_type.
10539 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
10542 * config/i386/predicates.md (shr_comparison_operator): New predicate.
10543 * config/i386/i386.md (compare->shr splitter): New splitters.
10545 2020-05-04 Jakub Jelinek <jakub@redhat.com>
10547 PR tree-optimization/94718
10548 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
10550 PR tree-optimization/94718
10551 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
10552 replace two nop conversions on bit_{and,ior,xor} argument
10553 and result with just one conversion on the result or another argument.
10555 PR tree-optimization/94718
10556 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
10557 -> (X ^ Y) & C eqne 0 optimization to ...
10558 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
10560 * opts.c (get_option_html_page): Instead of hardcoding a list of
10561 options common between C/C++ and Fortran only use gfortran/
10562 documentation for warnings that have CL_Fortran set but not
10565 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
10567 * config/i386/i386-expand.c (ix86_expand_int_movcc):
10568 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
10569 (emit_memmov): Ditto.
10570 (emit_memset): Ditto.
10571 (ix86_expand_strlensi_unroll_1): Ditto.
10572 (release_scratch_register_on_entry): Ditto.
10573 (gen_frame_set): Ditto.
10574 (ix86_emit_restore_reg_using_pop): Ditto.
10575 (ix86_emit_outlined_ms2sysv_restore): Ditto.
10576 (ix86_expand_epilogue): Ditto.
10577 (ix86_expand_split_stack_prologue): Ditto.
10578 * config/i386/i386.md (push immediate splitter): Ditto.
10582 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
10584 PR translation/93861
10585 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
10588 2020-05-02 Jakub Jelinek <jakub@redhat.com>
10590 * config/tilegx/tilegx.md
10591 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
10592 rather than just <n>.
10594 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
10597 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
10598 and crtl->patch_area_entry.
10599 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
10600 * opts.c (common_handle_option): Limit
10601 function_entry_patch_area_size and function_entry_patch_area_start
10602 to USHRT_MAX. Fix a typo in error message.
10603 * varasm.c (assemble_start_function): Use crtl->patch_area_size
10604 and crtl->patch_area_entry.
10605 * doc/invoke.texi: Document the maximum value for
10606 -fpatchable-function-entry.
10608 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
10610 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
10611 Override SUBTARGET_SHADOW_OFFSET macro.
10613 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
10615 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
10616 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
10617 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
10618 * config/i386/freebsd.h: Likewise.
10619 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
10620 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
10622 2020-04-30 Alexandre Oliva <oliva@adacore.com>
10624 * doc/sourcebuild.texi (Effective-Target Keywords): Document
10625 the newly-introduced fileio effective target.
10627 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
10629 PR rtl-optimization/94740
10630 * cse.c (cse_process_notes_1): Replace with...
10631 (cse_process_note_1): ...this new function, acting as a
10632 simplify_replace_fn_rtx callback to process_note. Handle only
10633 REGs and MEMs directly. Validate the MEM if cse_process_note
10634 changes its address.
10635 (cse_process_notes): Replace with...
10636 (cse_process_note): ...this new function.
10637 (cse_extended_basic_block): Update accordingly, iterating over
10638 the register notes and passing individual notes to cse_process_note.
10640 2020-04-30 Carl Love <cel@us.ibm.com>
10642 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
10644 2020-04-30 Martin Jambor <mjambor@suse.cz>
10647 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
10648 saved by the inliner and thunks which had their call inlined.
10649 * ipa-inline-transform.c (save_inline_function_body): Fill in
10650 former_clone_of of new body holders.
10652 2020-04-30 Jakub Jelinek <jakub@redhat.com>
10654 * BASE-VER: Set to 11.0.0.
10656 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
10658 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
10660 2020-04-30 Marek Polacek <polacek@redhat.com>
10663 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
10664 (check_aligned_type): Check if TYPE_USER_ALIGN match.
10666 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10668 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
10669 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
10670 * doc/invoke.texi (moutline-atomics): Document as on by default.
10672 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
10675 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
10676 the check for NOTE_INSN_DELETED_LABEL.
10678 2020-04-30 Jakub Jelinek <jakub@redhat.com>
10680 * configure.ac (--with-documentation-root-url,
10681 --with-changes-root-url): Diagnose URL not ending with /,
10682 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
10683 * opts.h (get_changes_url): Remove.
10684 * opts.c (get_changes_url): Remove.
10685 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
10686 or -DCHANGES_ROOT_URL.
10687 * doc/install.texi (--with-documentation-root-url,
10688 --with-changes-root-url): Document.
10689 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
10690 get_changes_url and free, change url variable type to const char * and
10691 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
10692 * config/s390/s390.c (s390_function_arg_vector,
10693 s390_function_arg_float): Likewise.
10694 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
10696 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
10698 * config.in: Regenerate.
10699 * configure: Regenerate.
10701 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
10704 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
10706 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
10708 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
10709 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
10711 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
10713 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
10714 Change constraint for vlrl/vstrl to jb4.
10716 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10718 * var-tracking.c (vt_initialize): Move variables pre and post
10719 into inner block and initialize both in order to fix warning
10720 about uninitialized use. Remove unnecessary checks for
10721 frame_pointer_needed.
10723 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10725 * toplev.c (output_stack_usage_1): Ensure that first
10726 argument to fprintf is not null.
10728 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10730 * configure.ac (-with-changes-root-url): New configure option,
10731 defaulting to https://gcc.gnu.org/.
10732 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
10734 * pretty-print.c (get_end_url_string): New function.
10735 (pp_format): Handle %{ and %} for URLs.
10736 (pp_begin_url): Use pp_string instead of pp_printf.
10737 (pp_end_url): Use get_end_url_string.
10738 * opts.h (get_changes_url): Declare.
10739 * opts.c (get_changes_url): New function.
10740 * config/rs6000/rs6000-call.c: Include opts.h.
10741 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
10742 of just in GCC 10.1 in diagnostics and add URL.
10743 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
10744 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
10746 * config/s390/s390.c (s390_function_arg_vector,
10747 s390_function_arg_float): Likewise.
10748 * configure: Regenerated.
10751 * config/s390/s390.c (s390_function_arg_vector,
10752 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
10753 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
10754 passed to the function rather than the type of the single element.
10755 Rename cxx17_empty_base_seen variable to empty_base_seen, change
10756 type to int, and adjust diagnostics depending on if the field
10757 has [[no_unique_attribute]] or not.
10760 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
10761 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
10762 used in casts into parens.
10763 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
10764 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
10765 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
10766 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
10767 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
10768 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
10769 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
10770 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
10771 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
10772 _mm256_mask_cmp_epu8_mask): Likewise.
10773 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
10774 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
10775 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
10776 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
10779 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
10780 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
10781 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
10782 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
10783 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
10784 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
10785 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
10786 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
10787 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
10788 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
10789 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
10790 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
10791 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
10793 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
10794 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
10795 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
10796 as mask vector containing -1.0 or -1.0f elts, but instead vector
10797 with all bits set using _mm*_cmpeq_p? with zero operands.
10798 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
10799 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
10800 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
10801 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
10802 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
10803 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
10804 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
10805 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
10806 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
10807 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
10808 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
10809 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
10810 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
10811 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
10812 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
10813 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
10814 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
10816 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
10817 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
10818 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
10819 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
10820 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
10821 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
10822 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
10823 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
10824 _mm512_mask_prefetch_i64scatter_ps): Likewise.
10825 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
10826 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
10827 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
10828 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
10829 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
10830 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
10831 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
10832 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
10833 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
10834 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
10835 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
10836 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
10837 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
10838 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
10839 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
10840 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
10841 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
10842 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
10843 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
10844 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
10845 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
10846 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
10847 _mm_mask_i64scatter_epi64): Likewise.
10849 2020-04-29 Jeff Law <law@redhat.com>
10851 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
10852 division instructions are 4 bytes long.
10854 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10857 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
10858 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
10859 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
10860 take address of TARGET_EXPR of fenv_var with void_node initializer.
10863 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10865 PR tree-optimization/94774
10866 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
10869 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10871 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
10872 * calls.c (cxx17_empty_base_field_p): New function. Check
10873 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
10876 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
10879 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
10880 Allow -fcf-protection with -mindirect-branch=thunk-extern and
10881 -mfunction-return=thunk-extern.
10882 * doc/invoke.texi: Update notes for -fcf-protection=branch with
10883 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
10885 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10887 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
10889 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10891 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
10892 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
10893 fenv_var and new_fenv_var.
10895 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10897 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
10898 effective-target keyword.
10899 (arm_arch_v8a_hard_multilib): Likewise.
10900 (arm_arch_v8a_hard): Document new dg-add-options keyword.
10901 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
10902 code is deprecated and has not been updated to handle
10903 DECL_FIELD_ABI_IGNORED.
10904 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
10905 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
10906 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
10907 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
10908 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
10909 something actually is a HFA or HVA. Record whether we see a
10910 [[no_unique_address]] field that previous GCCs would not have
10911 ignored in this way.
10912 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
10913 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
10914 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
10915 diagnostic messages.
10916 (arm_needs_doubleword_align): Add a comment explaining why we
10917 consider even zero-sized fields.
10919 2020-04-29 Richard Biener <rguenther@suse.de>
10920 Li Zekun <lizekun1@huawei.com>
10923 * tree.c (component_ref_size): Guard against error_mark_node
10924 DECL_INITIAL as it happens with LTO.
10926 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10928 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
10929 comment explaining why we consider even zero-sized fields.
10930 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
10931 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
10932 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
10933 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
10934 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
10935 something actually is a HFA or HVA. Record whether we see a
10936 [[no_unique_address]] field that previous GCCs would not have
10937 ignored in this way.
10938 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
10939 whether diagnostics should be suppressed. Update the calls to
10940 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
10941 [[no_unique_address]] case.
10942 (aarch64_return_in_msb): Update call accordingly, never silencing
10944 (aarch64_function_value): Likewise.
10945 (aarch64_return_in_memory_1): Likewise.
10946 (aarch64_init_cumulative_args): Likewise.
10947 (aarch64_gimplify_va_arg_expr): Likewise.
10948 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
10949 use it to decide whether arch64_vfp_is_call_or_return_candidate
10951 (aarch64_pass_by_reference): Update calls accordingly.
10952 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
10953 to decide whether arch64_vfp_is_call_or_return_candidate should be
10956 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
10959 * config/aarch64/aarch64-builtins.c
10960 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
10961 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
10964 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
10966 * configure.ac <$enable_offload_targets>: Do parsing as done
10968 * configure: Regenerate.
10970 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
10971 * configure: Regenerate.
10974 * rtlanal.c (set_noop_p): Handle non-constant selectors.
10977 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
10979 (TARGET_EXCEPT_UNWIND_INFO): Define.
10981 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10984 * config/gcn/gcn.md (*mov<mode>_insn): Use
10985 'reg_overlap_mentioned_p' to check for overlap.
10988 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
10989 instead of cxx17_empty_base_field_p.
10992 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
10993 DECL_FIELD_ABI_IGNORED.
10994 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
10995 * calls.h (cxx17_empty_base_field_p): Change into a temporary
10996 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
10998 * calls.c (cxx17_empty_base_field_p): Remove.
10999 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
11000 DECL_FIELD_ABI_IGNORED.
11001 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
11002 * lto-streamer-out.c (hash_tree): Likewise.
11003 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
11004 cxx17_empty_base_seen to empty_base_seen, change type to int *,
11005 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
11006 cxx17_empty_base_field_p, if "no_unique_address" attribute is
11007 present, propagate that to the caller too.
11008 (rs6000_discover_homogeneous_aggregate): Adjust
11009 rs6000_aggregate_candidate caller, emit different diagnostics
11010 when c++17 empty base fields are present and when empty
11011 [[no_unique_address]] fields are present.
11012 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
11013 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
11016 2020-04-29 Richard Biener <rguenther@suse.de>
11018 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
11019 Just check whether the stmt stores.
11021 2020-04-28 Alexandre Oliva <oliva@adacore.com>
11024 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
11025 output operand in emulation. Don't overwrite pseudos.
11027 2020-04-28 Jeff Law <law@redhat.com>
11029 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
11030 multiply patterns are 4 bytes long.
11032 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11034 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
11035 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
11037 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
11038 Jakub Jelinek <jakub@redhat.com>
11041 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
11042 base class artificial fields.
11043 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
11044 decision is different after this fix.
11046 2020-04-28 David Malcolm <dmalcolm@redhat.com>
11052 * doc/invoke.texi (Static Analyzer Options): Remove
11053 -Wanalyzer-use-of-uninitialized-value.
11054 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
11056 2020-04-28 Jakub Jelinek <jakub@redhat.com>
11058 PR tree-optimization/94809
11059 * tree.c (build_call_expr_internal_loc_array): Call
11060 process_call_operands.
11062 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
11064 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
11065 * config/aarch64/aarch64-tune.md: Regenerate.
11066 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
11067 (thunderx3t110_regmove_cost): Likewise.
11068 (thunderx3t110_vector_cost): Likewise.
11069 (thunderx3t110_prefetch_tune): Likewise.
11070 (thunderx3t110_tunings): Likewise.
11071 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
11073 * config/aarch64/thunderx3t110.md: New file.
11074 * config/aarch64/aarch64.md: Include thunderx3t110.md.
11075 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
11077 2020-04-28 Jakub Jelinek <jakub@redhat.com>
11080 * config/s390/s390.c (s390_function_arg_vector,
11081 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
11083 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
11085 PR tree-optimization/94727
11086 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
11087 operands are invariant booleans, use the mask type associated with the
11088 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
11089 (vectorizable_condition): Pass vectype unconditionally to
11090 vect_is_simple_cond.
11092 2020-04-27 Jakub Jelinek <jakub@redhat.com>
11095 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
11096 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
11097 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
11099 2020-04-27 David Malcolm <dmalcolm@redhat.com>
11102 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
11103 default value, so that it can by supplied by get_option_html_page.
11104 * configure: Regenerate.
11105 * opts.c: Include "selftest.h".
11106 (get_option_html_page): New function.
11107 (get_option_url): Use it. Reformat to place comments next to the
11108 expressions they refer to.
11109 (selftest::test_get_option_html_page): New.
11110 (selftest::opts_c_tests): New.
11111 * selftest-run-tests.c (selftest::run_tests): Call
11112 selftest::opts_c_tests.
11113 * selftest.h (selftest::opts_c_tests): New decl.
11115 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
11117 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
11118 UINTVAL to CONST_INTs.
11120 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11122 * config/arm/constraints.md (e): Remove constraint.
11123 (Te): Define constraint.
11124 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
11125 operand 0 from "e" to "Te".
11126 (vaddvaq_<supf><mode>): Likewise.
11127 (vaddvq_p_<supf><mode>): Likewise.
11128 (vmladavq_<supf><mode>): Likewise.
11129 (vmladavxq_s<mode>): Likewise.
11130 (vmlsdavq_s<mode>): Likewise.
11131 (vmlsdavxq_s<mode>): Likewise.
11132 (vaddvaq_p_<supf><mode>): Likewise.
11133 (vmladavaq_<supf><mode>): Likewise.
11134 (vmladavq_p_<supf><mode>): Likewise.
11135 (vmladavxq_p_s<mode>): Likewise.
11136 (vmlsdavq_p_s<mode>): Likewise.
11137 (vmlsdavxq_p_s<mode>): Likewise.
11138 (vmlsdavaxq_s<mode>): Likewise.
11139 (vmlsdavaq_s<mode>): Likewise.
11140 (vmladavaxq_s<mode>): Likewise.
11141 (vmladavaq_p_<supf><mode>): Likewise.
11142 (vmladavaxq_p_s<mode>): Likewise.
11143 (vmlsdavaq_p_s<mode>): Likewise.
11144 (vmlsdavaxq_p_s<mode>): Likewise.
11146 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
11148 * config/arm/arm.c (output_move_neon): Only get the first operand if
11151 2020-04-27 Felix Yang <felix.yang@huawei.com>
11153 PR tree-optimization/94784
11154 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
11155 assert around so that it checks that the two vectors have equal
11156 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
11157 types is a useless_type_conversion_p.
11159 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
11162 * dwarf2cfi.c (struct GTY): Add ra_mangled.
11163 (cfi_row_equal_p): Check ra_mangled.
11164 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
11165 this only handles the sparc logic now.
11166 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
11167 the aarch64 specific logic.
11168 (dwarf2out_frame_debug): Update to use the new subroutines.
11169 (change_cfi_row): Check ra_mangled.
11171 2020-04-27 Jakub Jelinek <jakub@redhat.com>
11174 * config/s390/s390.c (s390_function_arg_vector,
11175 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
11177 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
11179 * common/config/rs6000/rs6000-common.c
11180 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
11182 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
11185 2020-04-27 Martin Liska <mliska@suse.cz>
11188 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
11189 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
11191 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
11194 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
11196 (rs6000_emit_prologue_components):
11197 Check with frame_pointer_needed_indeed.
11198 (rs6000_emit_epilogue_components): Likewise.
11199 (rs6000_emit_prologue): Likewise.
11200 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
11202 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
11204 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
11205 stack frame when debugging and flag_compare_debug is enabled.
11207 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
11209 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
11210 enable PC-relative addressing for -mcpu=future.
11211 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
11212 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
11213 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
11214 suppress PC-relative addressing.
11215 (rs6000_option_override_internal): Split up error messages
11216 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
11217 system supports it.
11219 2020-04-25 Jakub Jelinek <jakub@redhat.com>
11220 Richard Biener <rguenther@suse.de>
11222 PR tree-optimization/94734
11223 PR tree-optimization/89430
11224 * tree-ssa-phiopt.c: Include tree-eh.h.
11225 (cond_store_replacement): Return false if an automatic variable
11226 access could trap. If -fstore-data-races, don't return false
11227 just because an automatic variable is addressable.
11229 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
11231 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
11233 (add<mode>_sext_dup2_exec): Likewise.
11235 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
11238 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
11239 endian byteshift_val calculation.
11241 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
11243 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
11245 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
11247 * config/aarch64/arm_sve.h: Add a comment.
11249 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
11251 PR rtl-optimization/94708
11252 * combine.c (simplify_if_then_else): Add check for
11253 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
11255 2020-04-23 Martin Sebor <msebor@redhat.com>
11258 * common.opt (-Wno-frame-larger-than): New option.
11259 (-Wno-larger-than, -Wno-stack-usage): Same.
11261 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
11263 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
11265 (mov<mode>_exec): Likewise.
11266 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
11267 (<convop><mode><vndi>2_exec): Likewise.
11269 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
11271 PR tree-optimization/94717
11272 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
11273 of the stores doesn't have the same landing pad number as the first.
11274 (coalesce_immediate_stores): Do not try to coalesce the store using
11275 bswap if it doesn't have the same landing pad number as the first.
11277 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
11279 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
11280 Replace outdated link to ELFv2 ABI.
11282 2020-04-23 Jakub Jelinek <jakub@redhat.com>
11285 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
11288 PR middle-end/94724
11289 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
11290 temporarily with non-final second operand and updating it later,
11291 push COMPOUND_EXPRs into a vector and process it in reverse,
11292 creating COMPOUND_EXPRs with the final operands.
11294 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
11297 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
11298 bti c and bti j handling.
11300 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
11301 Thomas Schwinge <thomas@codesourcery.com>
11303 PR middle-end/93488
11305 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
11306 t_async and the wait arguments.
11308 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
11310 PR tree-optimization/94727
11311 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
11312 comparing invariant scalar booleans.
11314 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
11315 Jakub Jelinek <jakub@redhat.com>
11318 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
11319 empty base class artificial fields.
11320 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
11321 different after this fix.
11323 2020-04-23 Jakub Jelinek <jakub@redhat.com>
11326 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
11327 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
11328 if the same type has been diagnosed most recently already.
11330 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11332 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
11334 (__arm_vbicq_n_s16): Likewise.
11335 (__arm_vbicq_n_u32): Likewise.
11336 (__arm_vbicq_n_s32): Likewise.
11337 (__arm_vbicq): Likewise.
11338 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
11339 (__arm_vbicq_n_s32): Likewise.
11340 (__arm_vbicq_n_u16): Likewise.
11341 (__arm_vbicq_n_u32): Likewise.
11342 (__arm_vdupq_m_n_s8): Likewise.
11343 (__arm_vdupq_m_n_s16): Likewise.
11344 (__arm_vdupq_m_n_s32): Likewise.
11345 (__arm_vdupq_m_n_u8): Likewise.
11346 (__arm_vdupq_m_n_u16): Likewise.
11347 (__arm_vdupq_m_n_u32): Likewise.
11348 (__arm_vdupq_m_n_f16): Likewise.
11349 (__arm_vdupq_m_n_f32): Likewise.
11350 (__arm_vldrhq_gather_offset_s16): Likewise.
11351 (__arm_vldrhq_gather_offset_s32): Likewise.
11352 (__arm_vldrhq_gather_offset_u16): Likewise.
11353 (__arm_vldrhq_gather_offset_u32): Likewise.
11354 (__arm_vldrhq_gather_offset_f16): Likewise.
11355 (__arm_vldrhq_gather_offset_z_s16): Likewise.
11356 (__arm_vldrhq_gather_offset_z_s32): Likewise.
11357 (__arm_vldrhq_gather_offset_z_u16): Likewise.
11358 (__arm_vldrhq_gather_offset_z_u32): Likewise.
11359 (__arm_vldrhq_gather_offset_z_f16): Likewise.
11360 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
11361 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
11362 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
11363 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
11364 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
11365 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
11366 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
11367 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
11368 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
11369 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
11370 (__arm_vldrwq_gather_offset_s32): Likewise.
11371 (__arm_vldrwq_gather_offset_u32): Likewise.
11372 (__arm_vldrwq_gather_offset_f32): Likewise.
11373 (__arm_vldrwq_gather_offset_z_s32): Likewise.
11374 (__arm_vldrwq_gather_offset_z_u32): Likewise.
11375 (__arm_vldrwq_gather_offset_z_f32): Likewise.
11376 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
11377 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
11378 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
11379 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
11380 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
11381 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
11382 (__arm_vdwdupq_x_n_u8): Likewise.
11383 (__arm_vdwdupq_x_n_u16): Likewise.
11384 (__arm_vdwdupq_x_n_u32): Likewise.
11385 (__arm_viwdupq_x_n_u8): Likewise.
11386 (__arm_viwdupq_x_n_u16): Likewise.
11387 (__arm_viwdupq_x_n_u32): Likewise.
11388 (__arm_vidupq_x_n_u8): Likewise.
11389 (__arm_vddupq_x_n_u8): Likewise.
11390 (__arm_vidupq_x_n_u16): Likewise.
11391 (__arm_vddupq_x_n_u16): Likewise.
11392 (__arm_vidupq_x_n_u32): Likewise.
11393 (__arm_vddupq_x_n_u32): Likewise.
11394 (__arm_vldrdq_gather_offset_s64): Likewise.
11395 (__arm_vldrdq_gather_offset_u64): Likewise.
11396 (__arm_vldrdq_gather_offset_z_s64): Likewise.
11397 (__arm_vldrdq_gather_offset_z_u64): Likewise.
11398 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
11399 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
11400 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
11401 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
11402 (__arm_vidupq_m_n_u8): Likewise.
11403 (__arm_vidupq_m_n_u16): Likewise.
11404 (__arm_vidupq_m_n_u32): Likewise.
11405 (__arm_vddupq_m_n_u8): Likewise.
11406 (__arm_vddupq_m_n_u16): Likewise.
11407 (__arm_vddupq_m_n_u32): Likewise.
11408 (__arm_vidupq_n_u16): Likewise.
11409 (__arm_vidupq_n_u32): Likewise.
11410 (__arm_vidupq_n_u8): Likewise.
11411 (__arm_vddupq_n_u16): Likewise.
11412 (__arm_vddupq_n_u32): Likewise.
11413 (__arm_vddupq_n_u8): Likewise.
11415 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
11417 * doc/install.texi (D-Specific Options): Document
11418 --enable-libphobos-checking and --with-libphobos-druntime-only.
11420 2020-04-23 Jakub Jelinek <jakub@redhat.com>
11423 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
11424 cxx17_empty_base_seen argument. Pass it to recursive calls.
11425 Ignore cxx17_empty_base_field_p fields after setting
11426 *cxx17_empty_base_seen to true.
11427 (rs6000_discover_homogeneous_aggregate): Adjust
11428 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
11429 aggregates with C++17 empty base fields.
11432 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
11433 if last_decl is error_mark_node or has such a TREE_TYPE.
11436 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
11437 if last_decl is error_mark_node or has such a TREE_TYPE.
11439 2020-04-22 Felix Yang <felix.yang@huawei.com>
11442 * config/aarch64/aarch64.h (TARGET_SVE):
11443 Add && !TARGET_GENERAL_REGS_ONLY.
11444 (TARGET_SVE2): Add && TARGET_SVE.
11445 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
11446 TARGET_SVE2_SM4): Add && TARGET_SVE2.
11447 * config/aarch64/aarch64-sve-builtins.h
11448 (sve_switcher::m_old_general_regs_only): New member.
11449 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
11451 (reported_missing_registers_p): New variable.
11452 (check_required_extensions): Call check_required_registers before
11453 return if all required extenstions are present.
11454 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
11455 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
11456 global_options.x_target_flags.
11457 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
11458 global_options.x_target_flags if m_old_general_regs_only is true.
11460 2020-04-22 Zackery Spytz <zspytz@gmail.com>
11462 * doc/extend.exi: Add "free" to list of other builtin functions
11465 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
11468 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
11469 if TARGET_PREFIXED.
11470 (store_quadpti): Ditto.
11471 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
11472 plq will be used and doesn't need it.
11473 (atomic_store<mode>): Ditto, for pstq.
11475 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
11477 * doc/invoke.texi: Update flags turned on by -O3.
11479 2020-04-22 Jakub Jelinek <jakub@redhat.com>
11482 * config/ia64/ia64.c (hfa_element_mode): Ignore
11483 cxx17_empty_base_field_p fields.
11486 * calls.h (cxx17_empty_base_field_p): Declare.
11487 * calls.c (cxx17_empty_base_field_p): Define.
11489 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
11491 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
11493 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11494 Andre Vieira <andre.simoesdiasvieira@arm.com>
11495 Mihail Ionescu <mihail.ionescu@arm.com>
11497 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
11498 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
11499 (ALL_QUIRKS): Add quirk_no_asmcpu.
11500 (cortex-m55): Define new cpu.
11501 * config/arm/arm-tables.opt: Regenerate.
11502 * config/arm/arm-tune.md: Likewise.
11503 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
11505 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
11507 PR tree-optimization/94700
11508 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
11509 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
11510 of similarly-structured but distinct vector types.
11512 2020-04-21 Martin Sebor <msebor@redhat.com>
11514 PR middle-end/94647
11515 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
11516 the computation of the lower bound of the source access size.
11517 (builtin_access::generic_overlap): Remove a hack for setting ranges
11518 of overlap offsets.
11520 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
11522 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
11523 (ASM_WEAKEN_DECL): New define.
11524 (HAVE_GAS_WEAKREF): Undefine.
11526 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
11528 PR tree-optimization/94683
11529 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
11530 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
11531 but distinct vector types.
11533 2020-04-21 Jakub Jelinek <jakub@redhat.com>
11536 * stor-layout.c (place_field, finalize_record_size): Don't emit
11537 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
11538 * ubsan.c (ubsan_get_type_descriptor_type,
11539 ubsan_get_source_location_type, ubsan_create_data): Set
11541 * asan.c (asan_global_struct): Likewise.
11543 2020-04-21 Duan bo <duanbo3@huawei.com>
11546 * config/aarch64/aarch64.c: Add an error message for option conflict.
11547 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
11548 incompatible with -fpic, -fPIC and -mabi=ilp32.
11550 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
11553 * omp-low.c (new_omp_context): Remove assignments to
11554 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
11556 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
11558 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
11559 ("popcountv2di2_vx"): Use simplify_gen_subreg.
11561 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
11564 * config/s390/s390-builtin-types.def: Add 3 new function modes.
11565 * config/s390/s390-builtins.def: Add mode dependent low-level
11566 builtin and map the overloaded builtins to these.
11567 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
11568 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
11570 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
11572 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
11573 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
11574 estimated VF and is no worse at double the estimated VF.
11576 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
11579 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
11580 order of arguments to rtx_vector_builder.
11581 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
11582 When extending the trailing constants to a full vector, replace any
11583 variables with zeros.
11585 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
11588 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
11591 2020-04-20 Martin Liska <mliska@suse.cz>
11593 * symtab.c (symtab_node::dump_references): Add space after
11595 (symtab_node::dump_referring): Likewise.
11597 2020-04-18 Jeff Law <law@redhat.com>
11600 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
11603 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
11605 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
11606 attributes): Document d_runtime_has_std_library.
11608 2020-04-17 Jeff Law <law@redhat.com>
11610 PR rtl-optimization/90275
11611 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
11612 when the destination has a REG_UNUSED note.
11614 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
11616 PR middle-end/94635
11617 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
11620 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
11622 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
11623 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
11624 cost of load and store insns if one loop iteration has enough scalar
11625 elements to use an Advanced SIMD LDP or STP.
11626 (aarch64_add_stmt_cost): Update call accordingly.
11628 2020-04-17 Jakub Jelinek <jakub@redhat.com>
11629 Jeff Law <law@redhat.com>
11632 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
11633 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
11634 or pos + len >= 32, or pos + len is equal to operands[2] precision
11635 and operands[2] is not a register operand. During splitting perform
11636 SImode AND if operands[0] doesn't have CCZmode and pos + len is
11637 equal to mode precision.
11639 2020-04-17 Richard Biener <rguenther@suse.de>
11642 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
11644 * dwarf2out.c (dw_val_equal_p): Fix pasto in
11645 dw_val_class_vms_delta comparison.
11646 * optabs.c (expand_binop_directly): Fix pasto in commutation
11648 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
11651 2020-04-17 Jakub Jelinek <jakub@redhat.com>
11653 PR rtl-optimization/94618
11654 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
11655 insn is the BB_END of its block, but also when it is only followed
11656 by DEBUG_INSNs in its block.
11658 PR tree-optimization/94621
11659 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
11660 Move id->adjust_array_error_bounds check first in the condition.
11662 2020-04-17 Martin Liska <mliska@suse.cz>
11663 Jonathan Yong <10walls@gmail.com>
11665 PR gcov-profile/94570
11666 * coverage.c (coverage_init): Use separator properly.
11668 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
11670 PR rtl-optimization/93974
11671 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
11672 (rs6000_cannot_substitute_mem_equiv_p): New function.
11674 2020-04-16 Martin Jambor <mjambor@suse.cz>
11677 * ipa-inline.h (ipa_saved_clone_sources): Declare.
11678 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
11679 (save_inline_function_body): Link the new body holder with the
11681 * cgraph.c: Include ipa-inline.h.
11682 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
11683 the statement in ipa_saved_clone_sources.
11684 * cgraphunit.c: Include ipa-inline.h.
11685 (expand_all_functions): Free ipa_saved_clone_sources.
11687 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
11690 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
11691 the VNx16BI lowpart of the recursively-generated constant.
11693 2020-04-16 Martin Liska <mliska@suse.cz>
11694 Jakub Jelinek <jakub@redhat.com>
11697 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
11698 DECL_IS_REPLACEABLE_OPERATOR during cloning.
11699 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
11700 (propagate_necessity): Check operator names.
11702 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
11704 PR rtl-optimization/94605
11705 * early-remat.c (early_remat::process_block): Handle insns that
11706 set multiple candidate registers.
11707 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
11709 PR gcov-profile/93401
11710 * common.opt (profile-prefix-path): New option.
11711 * coverae.c: Include diagnostics.h.
11712 (coverage_init): Strip profile prefix path.
11713 * doc/invoke.texi (-fprofile-prefix-path): Document.
11715 2020-04-16 Richard Biener <rguenther@suse.de>
11717 PR middle-end/94614
11718 * expr.c (emit_move_multi_word): Do not generate code when
11719 the destination part is undefined_operand_subword_p.
11720 * lower-subreg.c (resolve_clobber): Look through a paradoxica
11723 2020-04-16 Martin Jambor <mjambor@suse.cz>
11725 PR tree-optimization/94598
11726 * tree-sra.c (verify_sra_access_forest): Fix verification of total
11727 scalarization accesses under access to one-element arrays.
11729 2020-04-16 Jakub Jelinek <jakub@redhat.com>
11732 * function.c (assign_parm_find_data_types): Add workaround for
11733 BROKEN_VALUE_INITIALIZATION compilers.
11735 2020-04-16 Richard Biener <rguenther@suse.de>
11737 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
11740 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
11743 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
11744 Require OPTION_MASK_ISA_SSE2.
11746 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
11749 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
11750 Don't construct a dump_context temporary to call static method.
11752 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
11754 * config/aarch64/falkor-tag-collision-avoidance.c
11755 (valid_src_p): Check for aarch64_address_info type before
11756 accessing base field.
11758 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
11760 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
11761 (V_sz_elem2): Remove unused mode attribute.
11763 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
11765 * config/arm/arm.md (arm_movdi): Disallow for MVE.
11767 2020-04-15 Richard Biener <rguenther@suse.de>
11769 PR middle-end/94539
11770 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
11771 alias_sets_conflict_p for pointers.
11773 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
11776 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
11777 (extendhisi2_internal): Add %v1 before the load instructions.
11779 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
11782 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
11783 use PC-relative addressing for TLS references.
11785 2020-04-14 Martin Jambor <mjambor@suse.cz>
11788 * ipa-sra.c: Include internal-fn.h.
11789 (enum isra_scan_context): Update comment.
11790 (scan_function): Treat calls to internal_functions like loads or stores.
11792 2020-04-14 Yang Yang <yangyang305@huawei.com>
11794 PR tree-optimization/94574
11795 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
11796 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
11798 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
11801 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
11803 2020-04-13 Martin Sebor <msebor@redhat.com>
11805 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
11806 -Wformat-truncation. Move -Wzero-length-bounds last.
11807 (-Wrestrict): Document positive form of option enabled by -Wall.
11809 2020-04-13 Zachary Spytz <zspytz@gmail.com>
11811 * doc/extend.texi: Add realloc to list of built-in functions
11812 are recognized by the compiler.
11814 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
11817 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
11818 pointer in word_mode for eh_return epilogues.
11820 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11822 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
11823 memory references in %B, %C and %D operand selectors when the inner
11824 operand is a post increment address.
11826 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11828 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
11829 reference by 4 bytes, and %D memory reference by 6 bytes.
11831 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
11834 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
11835 condition for V4SI, V8HI and V16QI modes.
11837 2020-04-11 Jakub Jelinek <jakub@redhat.com>
11841 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
11844 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
11846 PR middle-end/89433
11847 PR middle-end/93465
11848 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
11849 "#pragma omp declare target" has also been applied.
11851 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11853 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
11854 when to emit the epilogue_helper insn.
11855 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
11858 2020-04-09 Jakub Jelinek <jakub@redhat.com>
11861 * cselib.h (cselib_record_sp_cfa_base_equiv,
11862 cselib_sp_derived_value_p): Declare.
11863 * cselib.c (cselib_record_sp_cfa_base_equiv,
11864 cselib_sp_derived_value_p): New functions.
11865 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
11866 cselib_sp_derived_value_p values.
11867 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
11868 start of extended basic blocks other than the first one
11869 for !frame_pointer_needed functions.
11871 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11873 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
11874 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
11875 (aarch64_sve2048_hw): Document.
11876 * config/aarch64/aarch64-protos.h
11877 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
11878 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
11879 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
11880 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
11882 (find_type_suffix_for_scalar_type): Use it instead of comparing
11883 TYPE_MAIN_VARIANTs.
11884 (function_resolver::infer_vector_or_tuple_type): Likewise.
11885 (function_resolver::require_vector_type): Likewise.
11886 (handle_arm_sve_vector_bits_attribute): New function.
11887 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
11888 (aarch64_attribute_table): Add arm_sve_vector_bits.
11889 (aarch64_return_in_memory_1):
11890 (pure_scalable_type_info::piece::get_rtx): New function.
11891 (pure_scalable_type_info::num_zr): Likewise.
11892 (pure_scalable_type_info::num_pr): Likewise.
11893 (pure_scalable_type_info::get_rtx): Likewise.
11894 (pure_scalable_type_info::analyze): Likewise.
11895 (pure_scalable_type_info::analyze_registers): Likewise.
11896 (pure_scalable_type_info::analyze_array): Likewise.
11897 (pure_scalable_type_info::analyze_record): Likewise.
11898 (pure_scalable_type_info::add_piece): Likewise.
11899 (aarch64_some_values_include_pst_objects_p): Likewise.
11900 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
11901 to analyze whether the type is returned in SVE registers.
11902 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
11903 is passed in SVE registers.
11904 (aarch64_pass_by_reference_1): New function, extracted from...
11905 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
11906 to analyze whether the type is a pure scalable type and, if so,
11907 whether it should be passed by reference.
11908 (aarch64_return_in_msb): Return false for pure scalable types.
11909 (aarch64_function_value_1): Fold back into...
11910 (aarch64_function_value): ...this function. Use
11911 pure_scalable_type_info to analyze whether the type is a pure
11912 scalable type and, if so, which registers it should use. Handle
11913 types that include pure scalable types but are not themselves
11914 pure scalable types.
11915 (aarch64_return_in_memory_1): New function, split out from...
11916 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
11917 to analyze whether the type is a pure scalable type and, if so,
11918 whether it should be returned by reference.
11919 (aarch64_layout_arg): Remove orig_mode argument. Use
11920 pure_scalable_type_info to analyze whether the type is a pure
11921 scalable type and, if so, which registers it should use. Handle
11922 types that include pure scalable types but are not themselves
11923 pure scalable types.
11924 (aarch64_function_arg): Update call accordingly.
11925 (aarch64_function_arg_advance): Likewise.
11926 (aarch64_pad_reg_upward): On big-endian targets, return false for
11927 pure scalable types that are smaller than 16 bytes.
11928 (aarch64_member_type_forces_blk): New function.
11929 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
11930 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
11931 correspond to built-in SVE types. Do not rely on a vector mode
11932 if the type includes an pure scalable type. When returning true,
11933 assert that the mode is not an SVE mode.
11934 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
11935 built-in types here. When returning true, assert that the type
11936 does not have an SVE mode.
11937 (aarch64_can_change_mode_class): Don't allow anything to change
11938 between a predicate mode and a non-predicate mode. Also don't
11939 allow changes between SVE vector modes and other modes that
11940 might be bigger than 128 bits.
11941 (aarch64_invalid_binary_op): Reject binary operations that mix
11942 SVE and GNU vector types.
11943 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
11945 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11947 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
11948 "SVE sizeless type".
11949 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
11950 (sizeless_type_p): New functions.
11951 (register_builtin_types): Apply make_type_sizeless to the type.
11952 (register_tuple_type): Likewise.
11953 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
11955 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
11957 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
11960 2020-04-09 Martin Jambor <mjambor@suse.cz>
11961 Richard Biener <rguenther@suse.de>
11963 PR tree-optimization/94482
11964 * tree-sra.c (create_access_replacement): Dump new replacement with
11966 (sra_modify_expr): Fix handling of cases when the original EXPR writes
11967 to only part of the replacement.
11968 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
11969 the first operand of combinations into REAL/IMAGPART_EXPR and
11972 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11974 * doc/sourcebuild.texi (check-function-bodies): Treat the third
11975 parameter as a list of option regexps and require each regexp
11978 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
11981 * config/aarch64/falkor-tag-collision-avoidance.c
11982 (valid_src_p): Fix missing rtx type check.
11984 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
11985 Richard Biener <rguenther@suse.de>
11987 PR tree-optimization/93674
11988 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
11989 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
11990 or non-mode precision type, add candidate in unsigned type with the
11993 2020-04-08 Clement Chigot <clement.chigot@atos.net>
11995 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
11996 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
11997 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
11999 2020-04-08 Jakub Jelinek <jakub@redhat.com>
12001 PR middle-end/94526
12002 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
12004 * reload1.c (eliminate_regs_1): Avoid creating
12005 (plus (reg) (const_int 0)) in DEBUG_INSNs.
12007 PR tree-optimization/94524
12008 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
12009 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
12010 op1 rather than op1 itself at the end. Punt for signed modulo by
12011 most negative constant.
12012 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
12013 modulo by most negative constant.
12015 2020-04-08 Richard Biener <rguenther@suse.de>
12017 PR rtl-optimization/93946
12018 * cse.c (cse_insn): Record the tabled expression in
12019 src_related. Verify a redundant store removal is valid.
12021 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
12024 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
12025 ENDBR at function entry if function will be called indirectly.
12027 2020-04-08 Jakub Jelinek <jakub@redhat.com>
12030 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
12033 2020-04-08 Martin Liska <mliska@suse.cz>
12036 * gimple.c (gimple_call_operator_delete_p): Rename to...
12037 (gimple_call_replaceable_operator_delete_p): ... this.
12038 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
12039 * gimple.h (gimple_call_operator_delete_p): Rename to ...
12040 (gimple_call_replaceable_operator_delete_p): ... this.
12041 * tree-core.h (tree_function_decl): Add replaceable_operator
12043 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
12044 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
12045 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
12046 (eliminate_unnecessary_stmts): Likewise.
12047 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
12048 Pack DECL_IS_REPLACEABLE_OPERATOR.
12049 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
12050 Unpack the field here.
12051 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
12052 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
12053 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
12054 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
12055 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
12056 replaceable operator flags.
12058 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
12059 Matthew Malcomson <matthew.malcomson@arm.com>
12061 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
12062 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
12063 (CX_TERNARY_QUALIFIERS): Likewise.
12064 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
12065 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
12066 (arm_init_acle_builtins): Initialize CDE builtins.
12067 (arm_expand_acle_builtin): Check CDE constant operands.
12068 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
12069 of CDE constant operand.
12070 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
12072 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
12073 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
12074 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
12075 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
12076 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
12077 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
12078 * config/arm/arm_cde_builtins.def: New file.
12079 * config/arm/iterators.md (V_reg): New attribute of SI.
12080 * config/arm/predicates.md (const_int_coproc_operand): New.
12081 (const_int_vcde1_operand, const_int_vcde2_operand): New.
12082 (const_int_vcde3_operand): New.
12083 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
12084 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
12085 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
12086 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
12088 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
12090 * config.gcc: Add arm_cde.h.
12091 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
12092 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
12093 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
12094 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
12095 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
12096 * config/arm/arm.h (TARGET_CDE): New macro.
12097 * config/arm/arm_cde.h: New file.
12098 * doc/invoke.texi: Document CDE options +cdecp[0-7].
12099 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
12101 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
12103 2020-04-08 Jakub Jelinek <jakub@redhat.com>
12105 PR rtl-optimization/94516
12106 * postreload.c: Include rtl-iter.h.
12107 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
12108 looking for all MEMs with RTX_AUTOINC operand.
12109 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
12111 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
12113 * omp-grid.c (grid_eliminate_combined_simd_part): Use
12114 OMP_CLAUSE_CODE to access the omp clause code.
12116 2020-04-07 Jeff Law <law@redhat.com>
12118 PR rtl-optimization/92264
12119 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
12120 the destination is the stack pointer.
12122 2020-04-07 Jakub Jelinek <jakub@redhat.com>
12124 PR rtl-optimization/94291
12125 PR rtl-optimization/84169
12126 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
12127 must be a REG or SUBREG of REG; if it is not one of these, don't
12130 2020-04-07 Richard Biener <rguenther@suse.de>
12132 PR middle-end/94479
12133 * gimplify.c (gimplify_addr_expr): Also consider generated
12136 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12138 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
12140 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12142 * config/arm/arm_mve.h: Cast some pointers to expected types.
12144 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12146 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
12147 same with '__arm_' prefix.
12149 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12151 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
12153 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12155 * config/arm/arm.c (arm_mve_immediate_check): Removed.
12156 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
12157 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
12158 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
12159 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
12160 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
12161 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
12163 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12165 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
12167 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12169 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
12170 * config/arm/mve/md: Fix v[id]wdup patterns.
12172 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12174 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
12175 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
12177 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12179 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
12180 and remove const_ptr enums.
12182 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
12184 * config/arm/arm_mve.h (vsubq_n): Merge with...
12186 (vmulq_n): Merge with...
12188 (__ARM_mve_typeid): Simplify scalar and constant detection.
12190 2020-04-07 Jakub Jelinek <jakub@redhat.com>
12193 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
12194 for inter-lane permutation for 64-byte modes.
12197 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
12198 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
12199 Assume it is a REG after that instead of testing it and doing FAIL
12200 otherwise. Formatting fix.
12202 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
12204 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
12206 2020-04-07 Jakub Jelinek <jakub@redhat.com>
12209 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
12210 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
12212 2020-04-06 Jakub Jelinek <jakub@redhat.com>
12214 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
12215 + const0_rtx return the SP_DERIVED_VALUE_P.
12217 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
12219 PR rtl-optimization/92989
12220 * lra-lives.c (process_bb_lives): Do not treat eh_return data
12221 registers as being live at the beginning of the EH receiver.
12223 2020-04-05 Zachary Spytz <zspytz@gmail.com>
12225 * extend.texi: Add free to list of ISO C90 functions that
12226 are recognized by the compiler.
12228 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
12230 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
12231 for fast_interrupt.
12233 * config/microblaze/microblaze.md (trap): Update output pattern.
12235 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
12236 Jakub Jelinek <jakub@redhat.com>
12239 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
12240 arrays, pointer-to-members, function types and qualifiers when
12241 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
12242 to emit type again on definition.
12244 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
12247 * ipa-fnsummary.c (vrp_will_run_p): New function.
12248 (fre_will_run_p): New function.
12249 (evaluate_properties_for_edge): Use it.
12250 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
12251 !optimize_debug to optimize_debug.
12253 2020-04-04 Jakub Jelinek <jakub@redhat.com>
12255 PR rtl-optimization/94468
12256 * cselib.c (references_value_p): Formatting fix.
12257 (cselib_useless_value_p): New function.
12258 (discard_useless_locs, discard_useless_values,
12259 cselib_invalidate_regno_val, cselib_invalidate_mem,
12260 cselib_record_set): Use it instead of
12261 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
12264 * tree-iterator.h (expr_single): Declare.
12265 * tree-iterator.c (expr_single): New function.
12266 * tree.h (protected_set_expr_location_if_unset): Declare.
12267 * tree.c (protected_set_expr_location): Use expr_single.
12268 (protected_set_expr_location_if_unset): New function.
12270 2020-04-03 Jeff Law <law@redhat.com>
12272 PR rtl-optimization/92264
12273 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
12274 reloading of auto-increment addressing modes.
12276 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
12279 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
12282 2020-04-03 Jeff Law <law@redhat.com>
12284 PR rtl-optimization/92264
12285 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
12286 post-increment addressing of source operands as well as residuals
12287 when computing any adjustments to the input pointer.
12289 2020-04-03 Jakub Jelinek <jakub@redhat.com>
12292 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
12293 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
12294 second half of first lane from first lane of second operand and
12295 first half of second lane from second lane of first operand.
12297 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
12299 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
12301 2020-04-03 Tamar Christina <tamar.christina@arm.com>
12304 * common/config/aarch64/aarch64-common.c
12305 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
12307 2020-04-03 Richard Biener <rguenther@suse.de>
12309 PR middle-end/94465
12310 * tree.c (array_ref_low_bound): Deal with released SSA names
12313 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
12315 * config/gcn/gcn.c (print_operand): Handle unordered comparison
12317 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
12318 comparison operators.
12320 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
12322 PR tree-optimization/94443
12323 * tree-vect-loop.c (vectorizable_live_operation): Use
12324 gsi_insert_seq_before to replace gsi_insert_before.
12326 2020-04-03 Martin Liska <mliska@suse.cz>
12329 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
12330 Compare type attributes for gimple_call_fntypes.
12332 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
12334 * alias.c (get_alias_set): Fix comment typos.
12336 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
12339 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
12340 attribute checking used by TYPE.
12342 2020-04-02 Martin Jambor <mjambor@suse.cz>
12345 * ipa-sra.c (struct caller_issues): New fields candidate and
12346 call_from_outside_comdat.
12347 (check_for_caller_issues): Check for calls from outsied of
12348 candidate's same_comdat_group.
12349 (check_all_callers_for_issues): Set up issues.candidate, check result
12351 (mark_callers_calls_comdat_local): New function.
12352 (process_isra_node_results): Set calls_comdat_local of callers if
12355 2020-04-02 Richard Biener <rguenther@suse.de>
12358 * common.opt (ffinite-loops): Initialize to zero.
12359 * opts.c (default_options_table): Remove OPT_ffinite_loops
12361 * cfgloop.h (loop::finite_p): New member.
12362 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
12363 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
12365 * lto-streamer-in.c (input_cfg): Stream finite_p.
12366 * lto-streamer-out.c (output_cfg): Likewise.
12367 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
12368 from flag_finite_loops at CFG build time.
12369 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
12370 finite_p flag instead of flag_finite_loops.
12371 * doc/invoke.texi (ffinite-loops): Adjust documentation of
12374 2020-04-02 Richard Biener <rguenther@suse.de>
12377 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
12378 DW_TAG_imported_unit.
12380 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
12382 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
12383 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
12386 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
12388 PR tree-optimization/94401
12389 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
12390 access type when loading halves of vector to avoid peeling for gaps.
12392 2020-04-02 Jakub Jelinek <jakub@redhat.com>
12394 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
12395 between a string literal and MIPS_SYSVERSION_SPEC macro.
12397 2020-04-02 Martin Jambor <mjambor@suse.cz>
12399 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
12401 2020-04-02 Jakub Jelinek <jakub@redhat.com>
12403 PR rtl-optimization/92264
12404 * params.opt (-param=max-find-base-term-values=): Decrease default
12407 PR rtl-optimization/92264
12408 * rtl.h (struct rtx_def): Mention that call bit is used as
12409 SP_DERIVED_VALUE_P in cselib.c.
12410 * cselib.c (SP_DERIVED_VALUE_P): Define.
12411 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
12412 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
12413 val_rtx and sp based expression where offsets cancel each other.
12414 (preserve_constants_and_equivs): Formatting fix.
12415 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
12416 locs list for cfa_base_preserved_val if needed. Formatting fix.
12417 (autoinc_split): If the to be returned value is a REG, MEM or
12418 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
12419 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
12420 (rtx_equal_for_cselib_1): Call autoinc_split even if both
12421 expressions are PLUS in Pmode with CONST_INT second operands.
12422 Handle SP_DERIVED_VALUE_P cases.
12423 (cselib_hash_plus_const_int): New function.
12424 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
12425 second operand, as well as for PRE_DEC etc. that ought to be
12426 hashed the same way.
12427 (cselib_subst_to_values): Substitute PLUS with Pmode and
12428 CONST_INT operand if the first operand is a VALUE which has
12429 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
12430 SP_DERIVED_VALUE_P + adjusted offset.
12431 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
12432 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
12433 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
12434 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
12435 on the sp value before calling cselib_add_permanent_equiv on the
12437 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
12438 in the insn without REG_INC note.
12439 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
12440 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
12443 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
12444 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
12446 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12449 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
12450 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
12451 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
12452 intrinsic defintion by adding a new builtin call to writeback into base
12454 (__arm_vldrdq_gather_base_wb_u64): Likewise.
12455 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
12456 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
12457 (__arm_vldrwq_gather_base_wb_s32): Likewise.
12458 (__arm_vldrwq_gather_base_wb_u32): Likewise.
12459 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
12460 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
12461 (__arm_vldrwq_gather_base_wb_f32): Likewise.
12462 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
12463 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
12464 builtin's qualifier.
12465 (vldrdq_gather_base_wb_z_u): Likewise.
12466 (vldrwq_gather_base_wb_u): Likewise.
12467 (vldrdq_gather_base_wb_u): Likewise.
12468 (vldrwq_gather_base_wb_z_s): Likewise.
12469 (vldrwq_gather_base_wb_z_f): Likewise.
12470 (vldrdq_gather_base_wb_z_s): Likewise.
12471 (vldrwq_gather_base_wb_s): Likewise.
12472 (vldrwq_gather_base_wb_f): Likewise.
12473 (vldrdq_gather_base_wb_s): Likewise.
12474 (vldrwq_gather_base_nowb_z_u): Define builtin.
12475 (vldrdq_gather_base_nowb_z_u): Likewise.
12476 (vldrwq_gather_base_nowb_u): Likewise.
12477 (vldrdq_gather_base_nowb_u): Likewise.
12478 (vldrwq_gather_base_nowb_z_s): Likewise.
12479 (vldrwq_gather_base_nowb_z_f): Likewise.
12480 (vldrdq_gather_base_nowb_z_s): Likewise.
12481 (vldrwq_gather_base_nowb_s): Likewise.
12482 (vldrwq_gather_base_nowb_f): Likewise.
12483 (vldrdq_gather_base_nowb_s): Likewise.
12484 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
12486 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
12487 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
12488 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
12489 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
12490 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
12491 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
12492 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
12493 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
12494 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
12495 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
12496 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
12498 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
12500 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
12501 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
12502 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
12503 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
12504 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
12505 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
12506 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
12507 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
12508 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
12510 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
12511 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
12512 Remove constraints from expander.
12513 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
12514 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
12515 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
12516 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
12517 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
12518 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
12520 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
12522 PR rtl-optimization/94123
12523 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
12524 flag_split_wide_types_early.
12526 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
12528 * doc/extend.texi (Common Function Attributes): Fix typo.
12530 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
12533 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
12536 2020-04-01 Zackery Spytz <zspytz@gmail.com>
12538 * doc/extend.texi: Fix a typo in the documentation of the
12539 copy function attribute.
12541 2020-04-01 Jakub Jelinek <jakub@redhat.com>
12543 PR middle-end/94423
12544 * tree-object-size.c (pass_object_sizes::execute): Don't call
12545 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
12546 call replace_call_with_value.
12548 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
12550 PR tree-optimization/94043
12551 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
12552 phi for vec_lhs and use it for lane extraction.
12554 2020-03-31 Felix Yang <felix.yang@huawei.com>
12556 PR tree-optimization/94398
12557 * tree-vect-stmts.c (vectorizable_store): Instead of calling
12558 vect_supportable_dr_alignment, set alignment_support_scheme to
12559 dr_unaligned_supported for gather-scatter accesses.
12560 (vectorizable_load): Likewise.
12562 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
12564 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
12565 New mode iterators.
12566 (vnsi, VnSI, vndi, VnDI): New mode attributes.
12567 (mov<mode>): Use <VnDI> in place of V64DI.
12568 (mov<mode>_exec): Likewise.
12569 (mov<mode>_sgprbase): Likewise.
12570 (reload_out<mode>): Likewise.
12571 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
12572 (gather_load<mode>v64si): Rename to ...
12573 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
12574 and <VnDI> in place of V64DI.
12575 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
12576 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
12577 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
12578 (scatter_store<mode>v64si): Rename to ...
12579 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
12580 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
12581 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
12582 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
12583 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
12584 (ds_bpermute<mode>): Use <VnSI>.
12585 (addv64si3_vcc<exec_vcc>): Rename to ...
12586 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
12587 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
12588 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
12589 (addcv64si3<exec_vcc>): Rename to ...
12590 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
12591 (subv64si3_vcc<exec_vcc>): Rename to ...
12592 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
12593 (subcv64si3<exec_vcc>): Rename to ...
12594 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
12595 (addv64di3): Rename to ...
12596 (add<mode>3): ... this, and use V_DI.
12597 (addv64di3_exec): Rename to ...
12598 (add<mode>3_exec): ... this, and use V_DI.
12599 (subv64di3): Rename to ...
12600 (sub<mode>3): ... this, and use V_DI.
12601 (subv64di3_exec): Rename to ...
12602 (sub<mode>3_exec): ... this, and use V_DI.
12603 (addv64di3_zext): Rename to ...
12604 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
12605 (addv64di3_zext_exec): Rename to ...
12606 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
12607 (addv64di3_zext_dup): Rename to ...
12608 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
12609 (addv64di3_zext_dup_exec): Rename to ...
12610 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
12611 (addv64di3_zext_dup2): Rename to ...
12612 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
12613 (addv64di3_zext_dup2_exec): Rename to ...
12614 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
12615 (addv64di3_sext_dup2): Rename to ...
12616 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
12617 (addv64di3_sext_dup2_exec): Rename to ...
12618 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
12619 (<su>mulv64si3_highpart<exec>): Rename to ...
12620 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
12621 (mulv64di3): Rename to ...
12622 (mul<mode>3): ... this, and use V_DI and <VnSI>.
12623 (mulv64di3_exec): Rename to ...
12624 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
12625 (mulv64di3_zext): Rename to ...
12626 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
12627 (mulv64di3_zext_exec): Rename to ...
12628 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
12629 (mulv64di3_zext_dup2): Rename to ...
12630 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
12631 (mulv64di3_zext_dup2_exec): Rename to ...
12632 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
12633 (<expander>v64di3): Rename to ...
12634 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
12635 (<expander>v64di3_exec): Rename to ...
12636 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
12637 (<expander>v64si3<exec>): Rename to ...
12638 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
12639 (v<expander>v64si3<exec>): Rename to ...
12640 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
12641 (<expander>v64si3<exec>): Rename to ...
12642 (<expander><vnsi>3<exec>): ... this, and use V_SI.
12643 (subv64df3<exec>): Rename to ...
12644 (sub<mode>3<exec>): ... this, and use V_DF.
12645 (truncv64di<mode>2): Rename to ...
12646 (trunc<vndi><mode>2): ... this, and use <VnDI>.
12647 (truncv64di<mode>2_exec): Rename to ...
12648 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
12649 (<convop><mode>v64di2): Rename to ...
12650 (<convop><mode><vndi>2): ... this, and use <VnDI>.
12651 (<convop><mode>v64di2_exec): Rename to ...
12652 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
12653 (vec_cmp<u>v64qidi): Rename to ...
12654 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
12655 (vec_cmp<u>v64qidi_exec): Rename to ...
12656 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
12657 (vcond_mask_<mode>di): Use <VnDI>.
12658 (maskload<mode>di): Likewise.
12659 (maskstore<mode>di): Likewise.
12660 (mask_gather_load<mode>v64si): Rename to ...
12661 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
12662 (mask_scatter_store<mode>v64si): Rename to ...
12663 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
12664 (*<reduc_op>_dpp_shr_v64di): Rename to ...
12665 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
12666 (*plus_carry_in_dpp_shr_v64si): Rename to ...
12667 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
12668 (*plus_carry_dpp_shr_v64di): Rename to ...
12669 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
12670 (vec_seriesv64si): Rename to ...
12671 (vec_series<mode>): ... this, and use V_SI.
12672 (vec_seriesv64di): Rename to ...
12673 (vec_series<mode>): ... this, and use V_DI.
12675 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
12677 * config/arc/arc.c (arc_print_operand): Use
12678 HOST_WIDE_INT_PRINT_DEC macro.
12680 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
12682 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
12684 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12686 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
12688 (__arm_vbicq): Likewise.
12690 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
12692 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
12694 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12696 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
12697 common section of both MVE Integer and MVE Floating Point.
12698 (vaddvq): Likewise.
12699 (vaddlvq_p): Likewise.
12700 (vaddvaq): Likewise.
12701 (vaddvq_p): Likewise.
12702 (vcmpcsq): Likewise.
12703 (vmlsdavxq): Likewise.
12704 (vmlsdavq): Likewise.
12705 (vmladavxq): Likewise.
12706 (vmladavq): Likewise.
12707 (vminvq): Likewise.
12708 (vminavq): Likewise.
12709 (vmaxvq): Likewise.
12710 (vmaxavq): Likewise.
12711 (vmlaldavq): Likewise.
12712 (vcmphiq): Likewise.
12713 (vaddlvaq): Likewise.
12714 (vrmlaldavhq): Likewise.
12715 (vrmlaldavhxq): Likewise.
12716 (vrmlsldavhq): Likewise.
12717 (vrmlsldavhxq): Likewise.
12718 (vmlsldavxq): Likewise.
12719 (vmlsldavq): Likewise.
12720 (vabavq): Likewise.
12721 (vrmlaldavhaq): Likewise.
12722 (vcmpgeq_m_n): Likewise.
12723 (vmlsdavxq_p): Likewise.
12724 (vmlsdavq_p): Likewise.
12725 (vmlsdavaxq): Likewise.
12726 (vmlsdavaq): Likewise.
12727 (vaddvaq_p): Likewise.
12728 (vcmpcsq_m_n): Likewise.
12729 (vcmpcsq_m): Likewise.
12730 (vmladavxq_p): Likewise.
12731 (vmladavq_p): Likewise.
12732 (vmladavaxq): Likewise.
12733 (vmladavaq): Likewise.
12734 (vminvq_p): Likewise.
12735 (vminavq_p): Likewise.
12736 (vmaxvq_p): Likewise.
12737 (vmaxavq_p): Likewise.
12738 (vcmphiq_m): Likewise.
12739 (vaddlvaq_p): Likewise.
12740 (vmlaldavaq): Likewise.
12741 (vmlaldavaxq): Likewise.
12742 (vmlaldavq_p): Likewise.
12743 (vmlaldavxq_p): Likewise.
12744 (vmlsldavaq): Likewise.
12745 (vmlsldavaxq): Likewise.
12746 (vmlsldavq_p): Likewise.
12747 (vmlsldavxq_p): Likewise.
12748 (vrmlaldavhaxq): Likewise.
12749 (vrmlaldavhq_p): Likewise.
12750 (vrmlaldavhxq_p): Likewise.
12751 (vrmlsldavhaq): Likewise.
12752 (vrmlsldavhaxq): Likewise.
12753 (vrmlsldavhq_p): Likewise.
12754 (vrmlsldavhxq_p): Likewise.
12755 (vabavq_p): Likewise.
12756 (vmladavaq_p): Likewise.
12757 (vstrbq_scatter_offset): Likewise.
12758 (vstrbq_p): Likewise.
12759 (vstrbq_scatter_offset_p): Likewise.
12760 (vstrdq_scatter_base_p): Likewise.
12761 (vstrdq_scatter_base): Likewise.
12762 (vstrdq_scatter_offset_p): Likewise.
12763 (vstrdq_scatter_offset): Likewise.
12764 (vstrdq_scatter_shifted_offset_p): Likewise.
12765 (vstrdq_scatter_shifted_offset): Likewise.
12766 (vmaxq_x): Likewise.
12767 (vminq_x): Likewise.
12768 (vmovlbq_x): Likewise.
12769 (vmovltq_x): Likewise.
12770 (vmulhq_x): Likewise.
12771 (vmullbq_int_x): Likewise.
12772 (vmullbq_poly_x): Likewise.
12773 (vmulltq_int_x): Likewise.
12774 (vmulltq_poly_x): Likewise.
12775 (vstrbq): Likewise.
12777 2020-03-31 Jakub Jelinek <jakub@redhat.com>
12780 * config/aarch64/constraints.md (Uph): New constraint.
12781 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
12782 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
12785 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
12786 Jakub Jelinek <jakub@redhat.com>
12788 PR middle-end/94412
12789 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
12790 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
12792 2020-03-31 Jakub Jelinek <jakub@redhat.com>
12794 PR tree-optimization/94403
12795 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
12796 ENUMERAL_TYPE lhs_type.
12798 PR rtl-optimization/94344
12799 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
12800 conversions, either on both operands of |^+ or just one. Handle
12801 also extra same precision conversion on RSHIFT_EXPR first operand
12802 provided RSHIFT_EXPR is performed in unsigned type.
12804 2020-03-30 David Malcolm <dmalcolm@redhat.com>
12806 * lra.c (finish_insn_code_data_once): Set the array elements
12807 to NULL after freeing them.
12809 2020-03-30 Andreas Schwab <schwab@suse.de>
12811 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
12814 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
12816 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
12817 to skip defining builtins based on builtin_mask.
12819 2020-03-30 Jakub Jelinek <jakub@redhat.com>
12822 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
12823 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
12824 operand is a register. Don't enable masked variants for V*[QH]Imode.
12827 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
12828 <store_mask_constraint> instead of m in output operand constraint.
12829 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
12832 2020-03-30 Alan Modra <amodra@gmail.com>
12834 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
12835 (rs6000_indirect_call_template_1): Adjust to suit.
12836 * config/rs6000/rs6000.md (call_local): Merge call_local32,
12837 call_local64, and call_local_aix.
12838 (call_value_local): Simlarly.
12839 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
12840 and disable pattern when CALL_LONG.
12841 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
12842 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
12843 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
12845 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
12848 * doc/invoke.texi: Update -falign-functions, -falign-loops and
12849 -falign-jumps documentation.
12851 2020-03-29 Martin Liska <mliska@suse.cz>
12854 * cgraphunit.c (process_function_and_variable_attributes): Remove
12855 double 'attribute' words.
12857 2020-03-29 John David Anglin <dave.anglin@bell.net>
12859 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
12862 2020-03-28 Jakub Jelinek <jakub@redhat.com>
12865 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
12866 to true after setting size to integer_one_node.
12868 PR tree-optimization/94329
12869 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
12870 on the last stmt in a bb, make sure gsi_prev isn't done immediately
12873 2020-03-27 Alan Modra <amodra@gmail.com>
12876 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
12877 for PLT16_LO and PLT_PCREL.
12878 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
12879 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
12880 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
12882 2020-03-27 Martin Sebor <msebor@redhat.com>
12885 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
12887 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
12889 * config/gcn/gcn-valu.md:
12890 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
12891 (VEC_1REG_MODE): Delete.
12892 (VEC_1REG_ALT): Delete.
12893 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
12894 (VEC_1REG_INT_MODE): Delete.
12895 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
12896 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
12897 (VEC_2REG_MODE): Rename to V_2REG throughout.
12898 (VEC_REG_MODE): Rename to V_noHI throughout.
12899 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
12900 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
12901 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
12902 (VEC_INT_MODE): Delete.
12903 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
12904 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
12905 (FP_MODE): Delete and replace with FP throughout.
12906 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
12907 (VCMP_MODE): Rename to V_noQI throughout and move to top.
12908 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
12909 * config/gcn/gcn.md (FP): New mode iterator.
12910 (FP_1REG): New mode iterator.
12912 2020-03-27 David Malcolm <dmalcolm@redhat.com>
12914 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
12915 now emits two .dot files.
12916 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
12917 (graphviz_out::end_tr): Only close a TR, not a TD.
12918 (graphviz_out::begin_td): New.
12919 (graphviz_out::end_td): New.
12920 (graphviz_out::begin_trtd): New, replacing the old implementation
12921 of graphviz_out::begin_tr.
12922 (graphviz_out::end_tdtr): New, replacing the old implementation
12923 of graphviz_out::end_tr.
12924 * graphviz.h (graphviz_out::begin_td): New decl.
12925 (graphviz_out::end_td): New decl.
12926 (graphviz_out::begin_trtd): New decl.
12927 (graphviz_out::end_tdtr): New decl.
12929 2020-03-27 Richard Biener <rguenther@suse.de>
12932 * dwarf2out.c (should_emit_struct_debug): Return false for
12935 2020-03-27 Richard Biener <rguenther@suse.de>
12937 PR tree-optimization/94352
12938 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
12940 (ssa_propagation_engine::ssa_propagate): ... here after
12941 initializing curr_order.
12943 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
12945 PR tree-optimization/90332
12946 * tree-vect-stmts.c (vector_vector_composition_type): New function.
12947 (get_group_load_store_type): Adjust to call
12948 vector_vector_composition_type, extend it to construct with scalar
12950 (vectorizable_load): Likewise.
12952 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
12954 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
12955 (create_ddg_dep_no_link): Likewise.
12956 (add_cross_iteration_register_deps): Move debug instruction check.
12957 Other minor refactoring.
12958 (add_intra_loop_mem_dep): Do not check for debug instructions.
12959 (add_inter_loop_mem_dep): Likewise.
12960 (build_intra_loop_deps): Likewise.
12961 (create_ddg): Do not include debug insns into the graph.
12962 * ddg.h (struct ddg): Remove num_debug field.
12963 * modulo-sched.c (doloop_register_get): Adjust condition.
12964 (res_MII): Remove DDG num_debug field usage.
12965 (sms_schedule_by_order): Use assertion against debug insns.
12966 (ps_has_conflicts): Drop debug insn check.
12968 2020-03-26 Jakub Jelinek <jakub@redhat.com>
12971 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
12972 that contains exactly one non-DEBUG_BEGIN_STMT statement.
12975 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
12976 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
12977 a single non-debug stmt followed by one or more debug stmts.
12978 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
12979 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
12980 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
12981 gimple_seq_last to check if outer_stmt gbind could be reused and
12982 if yes and it is surrounded by any debug stmts, move them into the
12985 PR rtl-optimization/92264
12986 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
12987 for sp based values in !frame_pointer_needed
12988 && !ACCUMULATE_OUTGOING_ARGS functions.
12990 2020-03-26 Felix Yang <felix.yang@huawei.com>
12992 PR tree-optimization/94269
12993 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
12995 operation to single basic block.
12997 2020-03-25 Jeff Law <law@redhat.com>
12999 PR rtl-optimization/90275
13000 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
13003 2020-03-25 Jakub Jelinek <jakub@redhat.com>
13006 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
13007 mode rather than VOIDmode.
13009 2020-03-25 Martin Sebor <msebor@redhat.com>
13011 PR middle-end/94004
13012 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
13013 even for alloca calls resulting from system macro expansion.
13014 Include inlining context in all warnings.
13016 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
13019 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
13020 FPRs to change between SDmode and DDmode.
13022 2020-03-25 Martin Sebor <msebor@redhat.com>
13024 PR tree-optimization/94131
13025 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
13027 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
13028 types have constant sizes.
13030 2020-03-25 Martin Liska <mliska@suse.cz>
13033 * configure.ac: Report error only when --with-zstd
13035 * configure: Regenerate.
13037 2020-03-25 Jakub Jelinek <jakub@redhat.com>
13040 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
13041 INSN_CODE (insn) to -1 when changing the pattern.
13043 2020-03-25 Martin Liska <mliska@suse.cz>
13047 * config/i386/i386-features.c (make_resolver_func): Drop
13048 public flag for resolver.
13049 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
13050 group for resolver and drop public flag if possible.
13051 * multiple_target.c (create_dispatcher_calls): Drop unique_name
13052 and resolution as we want to enable LTO privatization of the default
13055 2020-03-25 Martin Liska <mliska@suse.cz>
13058 * configure.ac: Respect --without-zstd and report
13059 error when we can't find header file with --with-zstd.
13060 * configure: Regenerate.
13062 2020-03-25 Jakub Jelinek <jakub@redhat.com>
13064 PR middle-end/94303
13065 * varasm.c (output_constructor_array_range): If local->index
13066 RANGE_EXPR doesn't start at the current location in the constructor,
13067 skip needed number of bytes using assemble_zeros or assert we don't
13071 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
13072 counter instead of DECL_UID.
13074 PR tree-optimization/94300
13075 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
13076 is positive, make sure that off + size isn't larger than needed_len.
13078 2020-03-25 Richard Biener <rguenther@suse.de>
13079 Jakub Jelinek <jakub@redhat.com>
13082 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
13084 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
13086 * doc/sourcebuild.texi (ARM-specific attributes): Add
13088 (Features for dg-add-options): Add arm_fp_dp.
13090 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
13093 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
13095 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
13098 * omp-offload.c (omp_finish_file): Fix target-link handling if
13099 targetm_common.have_named_sections is false.
13101 2020-03-24 Jakub Jelinek <jakub@redhat.com>
13104 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
13105 instead of GEN_INT.
13108 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
13109 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
13110 If not after and at *incr_pos is a debug stmt, set stmt location to
13111 location of next non-debug stmt after it if any.
13114 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
13115 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
13116 worklist or set GF_PLF_2 just because it is used in a debug stmt in
13117 another bb. Formatting improvements.
13120 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
13121 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
13122 regardless of whether TREE_NO_WARNING is set on it or whether
13123 warn_unused_function is true or not.
13125 2020-03-23 Jeff Law <law@redhat.com>
13127 PR rtl-optimization/90275
13130 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
13131 (simplify_logical_relational_operation): Use it.
13133 2020-03-23 Jakub Jelinek <jakub@redhat.com>
13136 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
13137 ultimate rhs and if returned something different, reconstructing
13138 the COMPOUND_EXPRs.
13140 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
13142 * opts.c (print_filtered_help): Improve the help text for alias options.
13144 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13145 Andre Vieira <andre.simoesdiasvieira@arm.com>
13146 Mihail Ionescu <mihail.ionescu@arm.com>
13148 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
13149 (vshlcq_m_u8): Likewise.
13150 (vshlcq_m_s16): Likewise.
13151 (vshlcq_m_u16): Likewise.
13152 (vshlcq_m_s32): Likewise.
13153 (vshlcq_m_u32): Likewise.
13154 (__arm_vshlcq_m_s8): Define intrinsic.
13155 (__arm_vshlcq_m_u8): Likewise.
13156 (__arm_vshlcq_m_s16): Likewise.
13157 (__arm_vshlcq_m_u16): Likewise.
13158 (__arm_vshlcq_m_s32): Likewise.
13159 (__arm_vshlcq_m_u32): Likewise.
13160 (vshlcq_m): Define polymorphic variant.
13161 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
13162 Use builtin qualifier.
13163 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
13164 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
13165 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
13166 (mve_vshlcq_m_<supf><mode>): Likewise.
13168 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13170 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
13171 (UQSHL_QUALIFIERS): Likewise.
13172 (ASRL_QUALIFIERS): Likewise.
13173 (SQSHL_QUALIFIERS): Likewise.
13174 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
13176 (sqrshr): Define macro.
13177 (sqrshrl): Likewise.
13178 (sqrshrl_sat48): Likewise.
13180 (sqshll): Likewise.
13182 (srshrl): Likewise.
13183 (uqrshl): Likewise.
13184 (uqrshll): Likewise.
13185 (uqrshll_sat48): Likewise.
13187 (uqshll): Likewise.
13189 (urshrl): Likewise.
13192 (__arm_lsll): Define intrinsic.
13193 (__arm_asrl): Likewise.
13194 (__arm_uqrshll): Likewise.
13195 (__arm_uqrshll_sat48): Likewise.
13196 (__arm_sqrshrl): Likewise.
13197 (__arm_sqrshrl_sat48): Likewise.
13198 (__arm_uqshll): Likewise.
13199 (__arm_urshrl): Likewise.
13200 (__arm_srshrl): Likewise.
13201 (__arm_sqshll): Likewise.
13202 (__arm_uqrshl): Likewise.
13203 (__arm_sqrshr): Likewise.
13204 (__arm_uqshl): Likewise.
13205 (__arm_urshr): Likewise.
13206 (__arm_sqshl): Likewise.
13207 (__arm_srshr): Likewise.
13208 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
13210 (UQSHL_QUALIFIERS): Likewise.
13211 (ASRL_QUALIFIERS): Likewise.
13212 (SQSHL_QUALIFIERS): Likewise.
13213 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
13214 (mve_sqrshrl_sat<supf>_di): Likewise.
13215 (mve_uqrshl_si): Likewise.
13216 (mve_sqrshr_si): Likewise.
13217 (mve_uqshll_di): Likewise.
13218 (mve_urshrl_di): Likewise.
13219 (mve_uqshl_si): Likewise.
13220 (mve_urshr_si): Likewise.
13221 (mve_sqshl_si): Likewise.
13222 (mve_srshr_si): Likewise.
13223 (mve_srshrl_di): Likewise.
13224 (mve_sqshll_di): Likewise.
13226 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13227 Andre Vieira <andre.simoesdiasvieira@arm.com>
13228 Mihail Ionescu <mihail.ionescu@arm.com>
13230 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
13231 (vsetq_lane_f32): Likewise.
13232 (vsetq_lane_s16): Likewise.
13233 (vsetq_lane_s32): Likewise.
13234 (vsetq_lane_s8): Likewise.
13235 (vsetq_lane_s64): Likewise.
13236 (vsetq_lane_u8): Likewise.
13237 (vsetq_lane_u16): Likewise.
13238 (vsetq_lane_u32): Likewise.
13239 (vsetq_lane_u64): Likewise.
13240 (vgetq_lane_f16): Likewise.
13241 (vgetq_lane_f32): Likewise.
13242 (vgetq_lane_s16): Likewise.
13243 (vgetq_lane_s32): Likewise.
13244 (vgetq_lane_s8): Likewise.
13245 (vgetq_lane_s64): Likewise.
13246 (vgetq_lane_u8): Likewise.
13247 (vgetq_lane_u16): Likewise.
13248 (vgetq_lane_u32): Likewise.
13249 (vgetq_lane_u64): Likewise.
13250 (__ARM_NUM_LANES): Likewise.
13251 (__ARM_LANEQ): Likewise.
13252 (__ARM_CHECK_LANEQ): Likewise.
13253 (__arm_vsetq_lane_s16): Define intrinsic.
13254 (__arm_vsetq_lane_s32): Likewise.
13255 (__arm_vsetq_lane_s8): Likewise.
13256 (__arm_vsetq_lane_s64): Likewise.
13257 (__arm_vsetq_lane_u8): Likewise.
13258 (__arm_vsetq_lane_u16): Likewise.
13259 (__arm_vsetq_lane_u32): Likewise.
13260 (__arm_vsetq_lane_u64): Likewise.
13261 (__arm_vgetq_lane_s16): Likewise.
13262 (__arm_vgetq_lane_s32): Likewise.
13263 (__arm_vgetq_lane_s8): Likewise.
13264 (__arm_vgetq_lane_s64): Likewise.
13265 (__arm_vgetq_lane_u8): Likewise.
13266 (__arm_vgetq_lane_u16): Likewise.
13267 (__arm_vgetq_lane_u32): Likewise.
13268 (__arm_vgetq_lane_u64): Likewise.
13269 (__arm_vsetq_lane_f16): Likewise.
13270 (__arm_vsetq_lane_f32): Likewise.
13271 (__arm_vgetq_lane_f16): Likewise.
13272 (__arm_vgetq_lane_f32): Likewise.
13273 (vgetq_lane): Define polymorphic variant.
13274 (vsetq_lane): Likewise.
13275 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
13277 (mve_vec_extractv2didi): Likewise.
13278 (mve_vec_extract_sext_internal<mode>): Likewise.
13279 (mve_vec_extract_zext_internal<mode>): Likewise.
13280 (mve_vec_set<mode>_internal): Likewise.
13281 (mve_vec_setv2di_internal): Likewise.
13282 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
13284 (vec_extract<mode><V_elem_l>): Rename to
13285 "neon_vec_extract<mode><V_elem_l>".
13286 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
13287 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
13288 pattern common for MVE and NEON.
13289 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
13292 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
13294 * config/arm/mve.md (earlyclobber_32): New mode attribute.
13295 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
13296 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
13298 2020-03-23 Richard Biener <rguenther@suse.de>
13300 PR tree-optimization/94261
13301 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
13302 IL operand swapping code.
13303 (vect_slp_rearrange_stmts): Do not arrange isomorphic
13304 nodes that would need operation code adjustments.
13306 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
13308 * doc/install.texi (amdgcn-*-amdhsa): Renamed
13309 from amdgcn-unknown-amdhsa; change
13310 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
13312 2020-03-23 Richard Biener <rguenther@suse.de>
13315 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
13316 directly rather than also folding it via build_fold_addr_expr.
13318 2020-03-23 Richard Biener <rguenther@suse.de>
13320 PR tree-optimization/94266
13321 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
13322 addresses of TARGET_MEM_REFs.
13324 2020-03-23 Martin Liska <mliska@suse.cz>
13327 * symtab.c (symtab_node::clone_references): Save speculative_id
13328 as ref may be overwritten by create_reference.
13329 (symtab_node::clone_referring): Likewise.
13330 (symtab_node::clone_reference): Likewise.
13332 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
13334 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
13335 references to Darwin.
13336 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
13337 unconditionally and comment on why.
13339 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
13341 * config/darwin.c (darwin_mergeable_constant_section): Collect
13342 section anchor checks into the caller.
13343 (machopic_select_section): Collect section anchor checks into
13344 the determination of 'effective zero-size' objects. When the
13345 size is unknown, assume it is non-zero, and thus return the
13346 'generic' section for the DECL.
13348 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
13351 * config/darwin.opt: Amend options descriptions.
13353 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
13355 PR rtl-optimization/94052
13356 * lra-constraints.c (simplify_operand_subreg): Reload the inner
13357 register of a paradoxical subreg if simplify_subreg_regno fails
13358 to give a valid hard register for the outer mode.
13360 2020-03-20 Martin Jambor <mjambor@suse.cz>
13362 PR tree-optimization/93435
13363 * params.opt (sra-max-propagations): New parameter.
13364 * tree-sra.c (propagation_budget): New variable.
13365 (budget_for_propagation_access): New function.
13366 (propagate_subaccesses_from_rhs): Use it.
13367 (propagate_subaccesses_from_lhs): Likewise.
13368 (propagate_all_subaccesses): Set up and destroy propagation_budget.
13370 2020-03-20 Carl Love <cel@us.ibm.com>
13373 * config/rs6000/rs6000.c (rs6000_option_override_internal):
13374 Add check for TARGET_FPRND for Power 7 or newer.
13376 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
13379 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
13380 (cgraph_edge::redirect_callee): Move here; likewise.
13381 (cgraph_node::remove_callees): Update calls_comdat_local flag.
13382 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
13384 (cgraph_node::check_calls_comdat_local_p): New member function.
13385 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
13386 (cgraph_edge::redirect_callee): Move offline.
13387 * ipa-fnsummary.c (compute_fn_summary): Do not compute
13388 calls_comdat_local flag here.
13389 * ipa-inline-transform.c (inline_call): Fix updating of
13390 calls_comdat_local flag.
13391 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
13392 * symtab.c (symtab_node::add_to_same_comdat_group): Update
13393 calls_comdat_local flag.
13395 2020-03-20 Richard Biener <rguenther@suse.de>
13397 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
13398 from the possibly modified root.
13400 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13401 Andre Vieira <andre.simoesdiasvieira@arm.com>
13402 Mihail Ionescu <mihail.ionescu@arm.com>
13404 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
13405 (vst1q_p_s8): Likewise.
13406 (vst2q_s8): Likewise.
13407 (vst2q_u8): Likewise.
13408 (vld1q_z_u8): Likewise.
13409 (vld1q_z_s8): Likewise.
13410 (vld2q_s8): Likewise.
13411 (vld2q_u8): Likewise.
13412 (vld4q_s8): Likewise.
13413 (vld4q_u8): Likewise.
13414 (vst1q_p_u16): Likewise.
13415 (vst1q_p_s16): Likewise.
13416 (vst2q_s16): Likewise.
13417 (vst2q_u16): Likewise.
13418 (vld1q_z_u16): Likewise.
13419 (vld1q_z_s16): Likewise.
13420 (vld2q_s16): Likewise.
13421 (vld2q_u16): Likewise.
13422 (vld4q_s16): Likewise.
13423 (vld4q_u16): Likewise.
13424 (vst1q_p_u32): Likewise.
13425 (vst1q_p_s32): Likewise.
13426 (vst2q_s32): Likewise.
13427 (vst2q_u32): Likewise.
13428 (vld1q_z_u32): Likewise.
13429 (vld1q_z_s32): Likewise.
13430 (vld2q_s32): Likewise.
13431 (vld2q_u32): Likewise.
13432 (vld4q_s32): Likewise.
13433 (vld4q_u32): Likewise.
13434 (vld4q_f16): Likewise.
13435 (vld2q_f16): Likewise.
13436 (vld1q_z_f16): Likewise.
13437 (vst2q_f16): Likewise.
13438 (vst1q_p_f16): Likewise.
13439 (vld4q_f32): Likewise.
13440 (vld2q_f32): Likewise.
13441 (vld1q_z_f32): Likewise.
13442 (vst2q_f32): Likewise.
13443 (vst1q_p_f32): Likewise.
13444 (__arm_vst1q_p_u8): Define intrinsic.
13445 (__arm_vst1q_p_s8): Likewise.
13446 (__arm_vst2q_s8): Likewise.
13447 (__arm_vst2q_u8): Likewise.
13448 (__arm_vld1q_z_u8): Likewise.
13449 (__arm_vld1q_z_s8): Likewise.
13450 (__arm_vld2q_s8): Likewise.
13451 (__arm_vld2q_u8): Likewise.
13452 (__arm_vld4q_s8): Likewise.
13453 (__arm_vld4q_u8): Likewise.
13454 (__arm_vst1q_p_u16): Likewise.
13455 (__arm_vst1q_p_s16): Likewise.
13456 (__arm_vst2q_s16): Likewise.
13457 (__arm_vst2q_u16): Likewise.
13458 (__arm_vld1q_z_u16): Likewise.
13459 (__arm_vld1q_z_s16): Likewise.
13460 (__arm_vld2q_s16): Likewise.
13461 (__arm_vld2q_u16): Likewise.
13462 (__arm_vld4q_s16): Likewise.
13463 (__arm_vld4q_u16): Likewise.
13464 (__arm_vst1q_p_u32): Likewise.
13465 (__arm_vst1q_p_s32): Likewise.
13466 (__arm_vst2q_s32): Likewise.
13467 (__arm_vst2q_u32): Likewise.
13468 (__arm_vld1q_z_u32): Likewise.
13469 (__arm_vld1q_z_s32): Likewise.
13470 (__arm_vld2q_s32): Likewise.
13471 (__arm_vld2q_u32): Likewise.
13472 (__arm_vld4q_s32): Likewise.
13473 (__arm_vld4q_u32): Likewise.
13474 (__arm_vld4q_f16): Likewise.
13475 (__arm_vld2q_f16): Likewise.
13476 (__arm_vld1q_z_f16): Likewise.
13477 (__arm_vst2q_f16): Likewise.
13478 (__arm_vst1q_p_f16): Likewise.
13479 (__arm_vld4q_f32): Likewise.
13480 (__arm_vld2q_f32): Likewise.
13481 (__arm_vld1q_z_f32): Likewise.
13482 (__arm_vst2q_f32): Likewise.
13483 (__arm_vst1q_p_f32): Likewise.
13484 (vld1q_z): Define polymorphic variant.
13487 (vst1q_p): Likewise.
13489 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
13491 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
13492 (mve_vld2q<mode>): Likewise.
13493 (mve_vld4q<mode>): Likewise.
13495 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13496 Andre Vieira <andre.simoesdiasvieira@arm.com>
13497 Mihail Ionescu <mihail.ionescu@arm.com>
13499 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
13500 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
13501 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
13502 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
13503 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
13504 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
13505 * config/arm/arm_mve.h (vadciq_s32): Define macro.
13506 (vadciq_u32): Likewise.
13507 (vadciq_m_s32): Likewise.
13508 (vadciq_m_u32): Likewise.
13509 (vadcq_s32): Likewise.
13510 (vadcq_u32): Likewise.
13511 (vadcq_m_s32): Likewise.
13512 (vadcq_m_u32): Likewise.
13513 (vsbciq_s32): Likewise.
13514 (vsbciq_u32): Likewise.
13515 (vsbciq_m_s32): Likewise.
13516 (vsbciq_m_u32): Likewise.
13517 (vsbcq_s32): Likewise.
13518 (vsbcq_u32): Likewise.
13519 (vsbcq_m_s32): Likewise.
13520 (vsbcq_m_u32): Likewise.
13521 (__arm_vadciq_s32): Define intrinsic.
13522 (__arm_vadciq_u32): Likewise.
13523 (__arm_vadciq_m_s32): Likewise.
13524 (__arm_vadciq_m_u32): Likewise.
13525 (__arm_vadcq_s32): Likewise.
13526 (__arm_vadcq_u32): Likewise.
13527 (__arm_vadcq_m_s32): Likewise.
13528 (__arm_vadcq_m_u32): Likewise.
13529 (__arm_vsbciq_s32): Likewise.
13530 (__arm_vsbciq_u32): Likewise.
13531 (__arm_vsbciq_m_s32): Likewise.
13532 (__arm_vsbciq_m_u32): Likewise.
13533 (__arm_vsbcq_s32): Likewise.
13534 (__arm_vsbcq_u32): Likewise.
13535 (__arm_vsbcq_m_s32): Likewise.
13536 (__arm_vsbcq_m_u32): Likewise.
13537 (vadciq_m): Define polymorphic variant.
13538 (vadciq): Likewise.
13539 (vadcq_m): Likewise.
13541 (vsbciq_m): Likewise.
13542 (vsbciq): Likewise.
13543 (vsbcq_m): Likewise.
13545 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
13547 (BINOP_UNONE_UNONE_UNONE): Likewise.
13548 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
13549 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
13550 * config/arm/mve.md (VADCIQ): Define iterator.
13551 (VADCIQ_M): Likewise.
13553 (VSBCQ_M): Likewise.
13554 (VSBCIQ): Likewise.
13555 (VSBCIQ_M): Likewise.
13557 (VADCQ_M): Likewise.
13558 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
13559 (mve_vadciq_<supf>v4si): Likewise.
13560 (mve_vadcq_m_<supf>v4si): Likewise.
13561 (mve_vadcq_<supf>v4si): Likewise.
13562 (mve_vsbciq_m_<supf>v4si): Likewise.
13563 (mve_vsbciq_<supf>v4si): Likewise.
13564 (mve_vsbcq_m_<supf>v4si): Likewise.
13565 (mve_vsbcq_<supf>v4si): Likewise.
13566 (get_fpscr_nzcvqc): Define isns.
13567 (set_fpscr_nzcvqc): Define isns.
13568 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
13569 (UNSPEC_SET_FPSCR_NZCVQC): Define.
13571 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13573 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
13574 (vddupq_x_n_u16): Likewise.
13575 (vddupq_x_n_u32): Likewise.
13576 (vddupq_x_wb_u8): Likewise.
13577 (vddupq_x_wb_u16): Likewise.
13578 (vddupq_x_wb_u32): Likewise.
13579 (vdwdupq_x_n_u8): Likewise.
13580 (vdwdupq_x_n_u16): Likewise.
13581 (vdwdupq_x_n_u32): Likewise.
13582 (vdwdupq_x_wb_u8): Likewise.
13583 (vdwdupq_x_wb_u16): Likewise.
13584 (vdwdupq_x_wb_u32): Likewise.
13585 (vidupq_x_n_u8): Likewise.
13586 (vidupq_x_n_u16): Likewise.
13587 (vidupq_x_n_u32): Likewise.
13588 (vidupq_x_wb_u8): Likewise.
13589 (vidupq_x_wb_u16): Likewise.
13590 (vidupq_x_wb_u32): Likewise.
13591 (viwdupq_x_n_u8): Likewise.
13592 (viwdupq_x_n_u16): Likewise.
13593 (viwdupq_x_n_u32): Likewise.
13594 (viwdupq_x_wb_u8): Likewise.
13595 (viwdupq_x_wb_u16): Likewise.
13596 (viwdupq_x_wb_u32): Likewise.
13597 (vdupq_x_n_s8): Likewise.
13598 (vdupq_x_n_s16): Likewise.
13599 (vdupq_x_n_s32): Likewise.
13600 (vdupq_x_n_u8): Likewise.
13601 (vdupq_x_n_u16): Likewise.
13602 (vdupq_x_n_u32): Likewise.
13603 (vminq_x_s8): Likewise.
13604 (vminq_x_s16): Likewise.
13605 (vminq_x_s32): Likewise.
13606 (vminq_x_u8): Likewise.
13607 (vminq_x_u16): Likewise.
13608 (vminq_x_u32): Likewise.
13609 (vmaxq_x_s8): Likewise.
13610 (vmaxq_x_s16): Likewise.
13611 (vmaxq_x_s32): Likewise.
13612 (vmaxq_x_u8): Likewise.
13613 (vmaxq_x_u16): Likewise.
13614 (vmaxq_x_u32): Likewise.
13615 (vabdq_x_s8): Likewise.
13616 (vabdq_x_s16): Likewise.
13617 (vabdq_x_s32): Likewise.
13618 (vabdq_x_u8): Likewise.
13619 (vabdq_x_u16): Likewise.
13620 (vabdq_x_u32): Likewise.
13621 (vabsq_x_s8): Likewise.
13622 (vabsq_x_s16): Likewise.
13623 (vabsq_x_s32): Likewise.
13624 (vaddq_x_s8): Likewise.
13625 (vaddq_x_s16): Likewise.
13626 (vaddq_x_s32): Likewise.
13627 (vaddq_x_n_s8): Likewise.
13628 (vaddq_x_n_s16): Likewise.
13629 (vaddq_x_n_s32): Likewise.
13630 (vaddq_x_u8): Likewise.
13631 (vaddq_x_u16): Likewise.
13632 (vaddq_x_u32): Likewise.
13633 (vaddq_x_n_u8): Likewise.
13634 (vaddq_x_n_u16): Likewise.
13635 (vaddq_x_n_u32): Likewise.
13636 (vclsq_x_s8): Likewise.
13637 (vclsq_x_s16): Likewise.
13638 (vclsq_x_s32): Likewise.
13639 (vclzq_x_s8): Likewise.
13640 (vclzq_x_s16): Likewise.
13641 (vclzq_x_s32): Likewise.
13642 (vclzq_x_u8): Likewise.
13643 (vclzq_x_u16): Likewise.
13644 (vclzq_x_u32): Likewise.
13645 (vnegq_x_s8): Likewise.
13646 (vnegq_x_s16): Likewise.
13647 (vnegq_x_s32): Likewise.
13648 (vmulhq_x_s8): Likewise.
13649 (vmulhq_x_s16): Likewise.
13650 (vmulhq_x_s32): Likewise.
13651 (vmulhq_x_u8): Likewise.
13652 (vmulhq_x_u16): Likewise.
13653 (vmulhq_x_u32): Likewise.
13654 (vmullbq_poly_x_p8): Likewise.
13655 (vmullbq_poly_x_p16): Likewise.
13656 (vmullbq_int_x_s8): Likewise.
13657 (vmullbq_int_x_s16): Likewise.
13658 (vmullbq_int_x_s32): Likewise.
13659 (vmullbq_int_x_u8): Likewise.
13660 (vmullbq_int_x_u16): Likewise.
13661 (vmullbq_int_x_u32): Likewise.
13662 (vmulltq_poly_x_p8): Likewise.
13663 (vmulltq_poly_x_p16): Likewise.
13664 (vmulltq_int_x_s8): Likewise.
13665 (vmulltq_int_x_s16): Likewise.
13666 (vmulltq_int_x_s32): Likewise.
13667 (vmulltq_int_x_u8): Likewise.
13668 (vmulltq_int_x_u16): Likewise.
13669 (vmulltq_int_x_u32): Likewise.
13670 (vmulq_x_s8): Likewise.
13671 (vmulq_x_s16): Likewise.
13672 (vmulq_x_s32): Likewise.
13673 (vmulq_x_n_s8): Likewise.
13674 (vmulq_x_n_s16): Likewise.
13675 (vmulq_x_n_s32): Likewise.
13676 (vmulq_x_u8): Likewise.
13677 (vmulq_x_u16): Likewise.
13678 (vmulq_x_u32): Likewise.
13679 (vmulq_x_n_u8): Likewise.
13680 (vmulq_x_n_u16): Likewise.
13681 (vmulq_x_n_u32): Likewise.
13682 (vsubq_x_s8): Likewise.
13683 (vsubq_x_s16): Likewise.
13684 (vsubq_x_s32): Likewise.
13685 (vsubq_x_n_s8): Likewise.
13686 (vsubq_x_n_s16): Likewise.
13687 (vsubq_x_n_s32): Likewise.
13688 (vsubq_x_u8): Likewise.
13689 (vsubq_x_u16): Likewise.
13690 (vsubq_x_u32): Likewise.
13691 (vsubq_x_n_u8): Likewise.
13692 (vsubq_x_n_u16): Likewise.
13693 (vsubq_x_n_u32): Likewise.
13694 (vcaddq_rot90_x_s8): Likewise.
13695 (vcaddq_rot90_x_s16): Likewise.
13696 (vcaddq_rot90_x_s32): Likewise.
13697 (vcaddq_rot90_x_u8): Likewise.
13698 (vcaddq_rot90_x_u16): Likewise.
13699 (vcaddq_rot90_x_u32): Likewise.
13700 (vcaddq_rot270_x_s8): Likewise.
13701 (vcaddq_rot270_x_s16): Likewise.
13702 (vcaddq_rot270_x_s32): Likewise.
13703 (vcaddq_rot270_x_u8): Likewise.
13704 (vcaddq_rot270_x_u16): Likewise.
13705 (vcaddq_rot270_x_u32): Likewise.
13706 (vhaddq_x_n_s8): Likewise.
13707 (vhaddq_x_n_s16): Likewise.
13708 (vhaddq_x_n_s32): Likewise.
13709 (vhaddq_x_n_u8): Likewise.
13710 (vhaddq_x_n_u16): Likewise.
13711 (vhaddq_x_n_u32): Likewise.
13712 (vhaddq_x_s8): Likewise.
13713 (vhaddq_x_s16): Likewise.
13714 (vhaddq_x_s32): Likewise.
13715 (vhaddq_x_u8): Likewise.
13716 (vhaddq_x_u16): Likewise.
13717 (vhaddq_x_u32): Likewise.
13718 (vhcaddq_rot90_x_s8): Likewise.
13719 (vhcaddq_rot90_x_s16): Likewise.
13720 (vhcaddq_rot90_x_s32): Likewise.
13721 (vhcaddq_rot270_x_s8): Likewise.
13722 (vhcaddq_rot270_x_s16): Likewise.
13723 (vhcaddq_rot270_x_s32): Likewise.
13724 (vhsubq_x_n_s8): Likewise.
13725 (vhsubq_x_n_s16): Likewise.
13726 (vhsubq_x_n_s32): Likewise.
13727 (vhsubq_x_n_u8): Likewise.
13728 (vhsubq_x_n_u16): Likewise.
13729 (vhsubq_x_n_u32): Likewise.
13730 (vhsubq_x_s8): Likewise.
13731 (vhsubq_x_s16): Likewise.
13732 (vhsubq_x_s32): Likewise.
13733 (vhsubq_x_u8): Likewise.
13734 (vhsubq_x_u16): Likewise.
13735 (vhsubq_x_u32): Likewise.
13736 (vrhaddq_x_s8): Likewise.
13737 (vrhaddq_x_s16): Likewise.
13738 (vrhaddq_x_s32): Likewise.
13739 (vrhaddq_x_u8): Likewise.
13740 (vrhaddq_x_u16): Likewise.
13741 (vrhaddq_x_u32): Likewise.
13742 (vrmulhq_x_s8): Likewise.
13743 (vrmulhq_x_s16): Likewise.
13744 (vrmulhq_x_s32): Likewise.
13745 (vrmulhq_x_u8): Likewise.
13746 (vrmulhq_x_u16): Likewise.
13747 (vrmulhq_x_u32): Likewise.
13748 (vandq_x_s8): Likewise.
13749 (vandq_x_s16): Likewise.
13750 (vandq_x_s32): Likewise.
13751 (vandq_x_u8): Likewise.
13752 (vandq_x_u16): Likewise.
13753 (vandq_x_u32): Likewise.
13754 (vbicq_x_s8): Likewise.
13755 (vbicq_x_s16): Likewise.
13756 (vbicq_x_s32): Likewise.
13757 (vbicq_x_u8): Likewise.
13758 (vbicq_x_u16): Likewise.
13759 (vbicq_x_u32): Likewise.
13760 (vbrsrq_x_n_s8): Likewise.
13761 (vbrsrq_x_n_s16): Likewise.
13762 (vbrsrq_x_n_s32): Likewise.
13763 (vbrsrq_x_n_u8): Likewise.
13764 (vbrsrq_x_n_u16): Likewise.
13765 (vbrsrq_x_n_u32): Likewise.
13766 (veorq_x_s8): Likewise.
13767 (veorq_x_s16): Likewise.
13768 (veorq_x_s32): Likewise.
13769 (veorq_x_u8): Likewise.
13770 (veorq_x_u16): Likewise.
13771 (veorq_x_u32): Likewise.
13772 (vmovlbq_x_s8): Likewise.
13773 (vmovlbq_x_s16): Likewise.
13774 (vmovlbq_x_u8): Likewise.
13775 (vmovlbq_x_u16): Likewise.
13776 (vmovltq_x_s8): Likewise.
13777 (vmovltq_x_s16): Likewise.
13778 (vmovltq_x_u8): Likewise.
13779 (vmovltq_x_u16): Likewise.
13780 (vmvnq_x_s8): Likewise.
13781 (vmvnq_x_s16): Likewise.
13782 (vmvnq_x_s32): Likewise.
13783 (vmvnq_x_u8): Likewise.
13784 (vmvnq_x_u16): Likewise.
13785 (vmvnq_x_u32): Likewise.
13786 (vmvnq_x_n_s16): Likewise.
13787 (vmvnq_x_n_s32): Likewise.
13788 (vmvnq_x_n_u16): Likewise.
13789 (vmvnq_x_n_u32): Likewise.
13790 (vornq_x_s8): Likewise.
13791 (vornq_x_s16): Likewise.
13792 (vornq_x_s32): Likewise.
13793 (vornq_x_u8): Likewise.
13794 (vornq_x_u16): Likewise.
13795 (vornq_x_u32): Likewise.
13796 (vorrq_x_s8): Likewise.
13797 (vorrq_x_s16): Likewise.
13798 (vorrq_x_s32): Likewise.
13799 (vorrq_x_u8): Likewise.
13800 (vorrq_x_u16): Likewise.
13801 (vorrq_x_u32): Likewise.
13802 (vrev16q_x_s8): Likewise.
13803 (vrev16q_x_u8): Likewise.
13804 (vrev32q_x_s8): Likewise.
13805 (vrev32q_x_s16): Likewise.
13806 (vrev32q_x_u8): Likewise.
13807 (vrev32q_x_u16): Likewise.
13808 (vrev64q_x_s8): Likewise.
13809 (vrev64q_x_s16): Likewise.
13810 (vrev64q_x_s32): Likewise.
13811 (vrev64q_x_u8): Likewise.
13812 (vrev64q_x_u16): Likewise.
13813 (vrev64q_x_u32): Likewise.
13814 (vrshlq_x_s8): Likewise.
13815 (vrshlq_x_s16): Likewise.
13816 (vrshlq_x_s32): Likewise.
13817 (vrshlq_x_u8): Likewise.
13818 (vrshlq_x_u16): Likewise.
13819 (vrshlq_x_u32): Likewise.
13820 (vshllbq_x_n_s8): Likewise.
13821 (vshllbq_x_n_s16): Likewise.
13822 (vshllbq_x_n_u8): Likewise.
13823 (vshllbq_x_n_u16): Likewise.
13824 (vshlltq_x_n_s8): Likewise.
13825 (vshlltq_x_n_s16): Likewise.
13826 (vshlltq_x_n_u8): Likewise.
13827 (vshlltq_x_n_u16): Likewise.
13828 (vshlq_x_s8): Likewise.
13829 (vshlq_x_s16): Likewise.
13830 (vshlq_x_s32): Likewise.
13831 (vshlq_x_u8): Likewise.
13832 (vshlq_x_u16): Likewise.
13833 (vshlq_x_u32): Likewise.
13834 (vshlq_x_n_s8): Likewise.
13835 (vshlq_x_n_s16): Likewise.
13836 (vshlq_x_n_s32): Likewise.
13837 (vshlq_x_n_u8): Likewise.
13838 (vshlq_x_n_u16): Likewise.
13839 (vshlq_x_n_u32): Likewise.
13840 (vrshrq_x_n_s8): Likewise.
13841 (vrshrq_x_n_s16): Likewise.
13842 (vrshrq_x_n_s32): Likewise.
13843 (vrshrq_x_n_u8): Likewise.
13844 (vrshrq_x_n_u16): Likewise.
13845 (vrshrq_x_n_u32): Likewise.
13846 (vshrq_x_n_s8): Likewise.
13847 (vshrq_x_n_s16): Likewise.
13848 (vshrq_x_n_s32): Likewise.
13849 (vshrq_x_n_u8): Likewise.
13850 (vshrq_x_n_u16): Likewise.
13851 (vshrq_x_n_u32): Likewise.
13852 (vdupq_x_n_f16): Likewise.
13853 (vdupq_x_n_f32): Likewise.
13854 (vminnmq_x_f16): Likewise.
13855 (vminnmq_x_f32): Likewise.
13856 (vmaxnmq_x_f16): Likewise.
13857 (vmaxnmq_x_f32): Likewise.
13858 (vabdq_x_f16): Likewise.
13859 (vabdq_x_f32): Likewise.
13860 (vabsq_x_f16): Likewise.
13861 (vabsq_x_f32): Likewise.
13862 (vaddq_x_f16): Likewise.
13863 (vaddq_x_f32): Likewise.
13864 (vaddq_x_n_f16): Likewise.
13865 (vaddq_x_n_f32): Likewise.
13866 (vnegq_x_f16): Likewise.
13867 (vnegq_x_f32): Likewise.
13868 (vmulq_x_f16): Likewise.
13869 (vmulq_x_f32): Likewise.
13870 (vmulq_x_n_f16): Likewise.
13871 (vmulq_x_n_f32): Likewise.
13872 (vsubq_x_f16): Likewise.
13873 (vsubq_x_f32): Likewise.
13874 (vsubq_x_n_f16): Likewise.
13875 (vsubq_x_n_f32): Likewise.
13876 (vcaddq_rot90_x_f16): Likewise.
13877 (vcaddq_rot90_x_f32): Likewise.
13878 (vcaddq_rot270_x_f16): Likewise.
13879 (vcaddq_rot270_x_f32): Likewise.
13880 (vcmulq_x_f16): Likewise.
13881 (vcmulq_x_f32): Likewise.
13882 (vcmulq_rot90_x_f16): Likewise.
13883 (vcmulq_rot90_x_f32): Likewise.
13884 (vcmulq_rot180_x_f16): Likewise.
13885 (vcmulq_rot180_x_f32): Likewise.
13886 (vcmulq_rot270_x_f16): Likewise.
13887 (vcmulq_rot270_x_f32): Likewise.
13888 (vcvtaq_x_s16_f16): Likewise.
13889 (vcvtaq_x_s32_f32): Likewise.
13890 (vcvtaq_x_u16_f16): Likewise.
13891 (vcvtaq_x_u32_f32): Likewise.
13892 (vcvtnq_x_s16_f16): Likewise.
13893 (vcvtnq_x_s32_f32): Likewise.
13894 (vcvtnq_x_u16_f16): Likewise.
13895 (vcvtnq_x_u32_f32): Likewise.
13896 (vcvtpq_x_s16_f16): Likewise.
13897 (vcvtpq_x_s32_f32): Likewise.
13898 (vcvtpq_x_u16_f16): Likewise.
13899 (vcvtpq_x_u32_f32): Likewise.
13900 (vcvtmq_x_s16_f16): Likewise.
13901 (vcvtmq_x_s32_f32): Likewise.
13902 (vcvtmq_x_u16_f16): Likewise.
13903 (vcvtmq_x_u32_f32): Likewise.
13904 (vcvtbq_x_f32_f16): Likewise.
13905 (vcvttq_x_f32_f16): Likewise.
13906 (vcvtq_x_f16_u16): Likewise.
13907 (vcvtq_x_f16_s16): Likewise.
13908 (vcvtq_x_f32_s32): Likewise.
13909 (vcvtq_x_f32_u32): Likewise.
13910 (vcvtq_x_n_f16_s16): Likewise.
13911 (vcvtq_x_n_f16_u16): Likewise.
13912 (vcvtq_x_n_f32_s32): Likewise.
13913 (vcvtq_x_n_f32_u32): Likewise.
13914 (vcvtq_x_s16_f16): Likewise.
13915 (vcvtq_x_s32_f32): Likewise.
13916 (vcvtq_x_u16_f16): Likewise.
13917 (vcvtq_x_u32_f32): Likewise.
13918 (vcvtq_x_n_s16_f16): Likewise.
13919 (vcvtq_x_n_s32_f32): Likewise.
13920 (vcvtq_x_n_u16_f16): Likewise.
13921 (vcvtq_x_n_u32_f32): Likewise.
13922 (vrndq_x_f16): Likewise.
13923 (vrndq_x_f32): Likewise.
13924 (vrndnq_x_f16): Likewise.
13925 (vrndnq_x_f32): Likewise.
13926 (vrndmq_x_f16): Likewise.
13927 (vrndmq_x_f32): Likewise.
13928 (vrndpq_x_f16): Likewise.
13929 (vrndpq_x_f32): Likewise.
13930 (vrndaq_x_f16): Likewise.
13931 (vrndaq_x_f32): Likewise.
13932 (vrndxq_x_f16): Likewise.
13933 (vrndxq_x_f32): Likewise.
13934 (vandq_x_f16): Likewise.
13935 (vandq_x_f32): Likewise.
13936 (vbicq_x_f16): Likewise.
13937 (vbicq_x_f32): Likewise.
13938 (vbrsrq_x_n_f16): Likewise.
13939 (vbrsrq_x_n_f32): Likewise.
13940 (veorq_x_f16): Likewise.
13941 (veorq_x_f32): Likewise.
13942 (vornq_x_f16): Likewise.
13943 (vornq_x_f32): Likewise.
13944 (vorrq_x_f16): Likewise.
13945 (vorrq_x_f32): Likewise.
13946 (vrev32q_x_f16): Likewise.
13947 (vrev64q_x_f16): Likewise.
13948 (vrev64q_x_f32): Likewise.
13949 (__arm_vddupq_x_n_u8): Define intrinsic.
13950 (__arm_vddupq_x_n_u16): Likewise.
13951 (__arm_vddupq_x_n_u32): Likewise.
13952 (__arm_vddupq_x_wb_u8): Likewise.
13953 (__arm_vddupq_x_wb_u16): Likewise.
13954 (__arm_vddupq_x_wb_u32): Likewise.
13955 (__arm_vdwdupq_x_n_u8): Likewise.
13956 (__arm_vdwdupq_x_n_u16): Likewise.
13957 (__arm_vdwdupq_x_n_u32): Likewise.
13958 (__arm_vdwdupq_x_wb_u8): Likewise.
13959 (__arm_vdwdupq_x_wb_u16): Likewise.
13960 (__arm_vdwdupq_x_wb_u32): Likewise.
13961 (__arm_vidupq_x_n_u8): Likewise.
13962 (__arm_vidupq_x_n_u16): Likewise.
13963 (__arm_vidupq_x_n_u32): Likewise.
13964 (__arm_vidupq_x_wb_u8): Likewise.
13965 (__arm_vidupq_x_wb_u16): Likewise.
13966 (__arm_vidupq_x_wb_u32): Likewise.
13967 (__arm_viwdupq_x_n_u8): Likewise.
13968 (__arm_viwdupq_x_n_u16): Likewise.
13969 (__arm_viwdupq_x_n_u32): Likewise.
13970 (__arm_viwdupq_x_wb_u8): Likewise.
13971 (__arm_viwdupq_x_wb_u16): Likewise.
13972 (__arm_viwdupq_x_wb_u32): Likewise.
13973 (__arm_vdupq_x_n_s8): Likewise.
13974 (__arm_vdupq_x_n_s16): Likewise.
13975 (__arm_vdupq_x_n_s32): Likewise.
13976 (__arm_vdupq_x_n_u8): Likewise.
13977 (__arm_vdupq_x_n_u16): Likewise.
13978 (__arm_vdupq_x_n_u32): Likewise.
13979 (__arm_vminq_x_s8): Likewise.
13980 (__arm_vminq_x_s16): Likewise.
13981 (__arm_vminq_x_s32): Likewise.
13982 (__arm_vminq_x_u8): Likewise.
13983 (__arm_vminq_x_u16): Likewise.
13984 (__arm_vminq_x_u32): Likewise.
13985 (__arm_vmaxq_x_s8): Likewise.
13986 (__arm_vmaxq_x_s16): Likewise.
13987 (__arm_vmaxq_x_s32): Likewise.
13988 (__arm_vmaxq_x_u8): Likewise.
13989 (__arm_vmaxq_x_u16): Likewise.
13990 (__arm_vmaxq_x_u32): Likewise.
13991 (__arm_vabdq_x_s8): Likewise.
13992 (__arm_vabdq_x_s16): Likewise.
13993 (__arm_vabdq_x_s32): Likewise.
13994 (__arm_vabdq_x_u8): Likewise.
13995 (__arm_vabdq_x_u16): Likewise.
13996 (__arm_vabdq_x_u32): Likewise.
13997 (__arm_vabsq_x_s8): Likewise.
13998 (__arm_vabsq_x_s16): Likewise.
13999 (__arm_vabsq_x_s32): Likewise.
14000 (__arm_vaddq_x_s8): Likewise.
14001 (__arm_vaddq_x_s16): Likewise.
14002 (__arm_vaddq_x_s32): Likewise.
14003 (__arm_vaddq_x_n_s8): Likewise.
14004 (__arm_vaddq_x_n_s16): Likewise.
14005 (__arm_vaddq_x_n_s32): Likewise.
14006 (__arm_vaddq_x_u8): Likewise.
14007 (__arm_vaddq_x_u16): Likewise.
14008 (__arm_vaddq_x_u32): Likewise.
14009 (__arm_vaddq_x_n_u8): Likewise.
14010 (__arm_vaddq_x_n_u16): Likewise.
14011 (__arm_vaddq_x_n_u32): Likewise.
14012 (__arm_vclsq_x_s8): Likewise.
14013 (__arm_vclsq_x_s16): Likewise.
14014 (__arm_vclsq_x_s32): Likewise.
14015 (__arm_vclzq_x_s8): Likewise.
14016 (__arm_vclzq_x_s16): Likewise.
14017 (__arm_vclzq_x_s32): Likewise.
14018 (__arm_vclzq_x_u8): Likewise.
14019 (__arm_vclzq_x_u16): Likewise.
14020 (__arm_vclzq_x_u32): Likewise.
14021 (__arm_vnegq_x_s8): Likewise.
14022 (__arm_vnegq_x_s16): Likewise.
14023 (__arm_vnegq_x_s32): Likewise.
14024 (__arm_vmulhq_x_s8): Likewise.
14025 (__arm_vmulhq_x_s16): Likewise.
14026 (__arm_vmulhq_x_s32): Likewise.
14027 (__arm_vmulhq_x_u8): Likewise.
14028 (__arm_vmulhq_x_u16): Likewise.
14029 (__arm_vmulhq_x_u32): Likewise.
14030 (__arm_vmullbq_poly_x_p8): Likewise.
14031 (__arm_vmullbq_poly_x_p16): Likewise.
14032 (__arm_vmullbq_int_x_s8): Likewise.
14033 (__arm_vmullbq_int_x_s16): Likewise.
14034 (__arm_vmullbq_int_x_s32): Likewise.
14035 (__arm_vmullbq_int_x_u8): Likewise.
14036 (__arm_vmullbq_int_x_u16): Likewise.
14037 (__arm_vmullbq_int_x_u32): Likewise.
14038 (__arm_vmulltq_poly_x_p8): Likewise.
14039 (__arm_vmulltq_poly_x_p16): Likewise.
14040 (__arm_vmulltq_int_x_s8): Likewise.
14041 (__arm_vmulltq_int_x_s16): Likewise.
14042 (__arm_vmulltq_int_x_s32): Likewise.
14043 (__arm_vmulltq_int_x_u8): Likewise.
14044 (__arm_vmulltq_int_x_u16): Likewise.
14045 (__arm_vmulltq_int_x_u32): Likewise.
14046 (__arm_vmulq_x_s8): Likewise.
14047 (__arm_vmulq_x_s16): Likewise.
14048 (__arm_vmulq_x_s32): Likewise.
14049 (__arm_vmulq_x_n_s8): Likewise.
14050 (__arm_vmulq_x_n_s16): Likewise.
14051 (__arm_vmulq_x_n_s32): Likewise.
14052 (__arm_vmulq_x_u8): Likewise.
14053 (__arm_vmulq_x_u16): Likewise.
14054 (__arm_vmulq_x_u32): Likewise.
14055 (__arm_vmulq_x_n_u8): Likewise.
14056 (__arm_vmulq_x_n_u16): Likewise.
14057 (__arm_vmulq_x_n_u32): Likewise.
14058 (__arm_vsubq_x_s8): Likewise.
14059 (__arm_vsubq_x_s16): Likewise.
14060 (__arm_vsubq_x_s32): Likewise.
14061 (__arm_vsubq_x_n_s8): Likewise.
14062 (__arm_vsubq_x_n_s16): Likewise.
14063 (__arm_vsubq_x_n_s32): Likewise.
14064 (__arm_vsubq_x_u8): Likewise.
14065 (__arm_vsubq_x_u16): Likewise.
14066 (__arm_vsubq_x_u32): Likewise.
14067 (__arm_vsubq_x_n_u8): Likewise.
14068 (__arm_vsubq_x_n_u16): Likewise.
14069 (__arm_vsubq_x_n_u32): Likewise.
14070 (__arm_vcaddq_rot90_x_s8): Likewise.
14071 (__arm_vcaddq_rot90_x_s16): Likewise.
14072 (__arm_vcaddq_rot90_x_s32): Likewise.
14073 (__arm_vcaddq_rot90_x_u8): Likewise.
14074 (__arm_vcaddq_rot90_x_u16): Likewise.
14075 (__arm_vcaddq_rot90_x_u32): Likewise.
14076 (__arm_vcaddq_rot270_x_s8): Likewise.
14077 (__arm_vcaddq_rot270_x_s16): Likewise.
14078 (__arm_vcaddq_rot270_x_s32): Likewise.
14079 (__arm_vcaddq_rot270_x_u8): Likewise.
14080 (__arm_vcaddq_rot270_x_u16): Likewise.
14081 (__arm_vcaddq_rot270_x_u32): Likewise.
14082 (__arm_vhaddq_x_n_s8): Likewise.
14083 (__arm_vhaddq_x_n_s16): Likewise.
14084 (__arm_vhaddq_x_n_s32): Likewise.
14085 (__arm_vhaddq_x_n_u8): Likewise.
14086 (__arm_vhaddq_x_n_u16): Likewise.
14087 (__arm_vhaddq_x_n_u32): Likewise.
14088 (__arm_vhaddq_x_s8): Likewise.
14089 (__arm_vhaddq_x_s16): Likewise.
14090 (__arm_vhaddq_x_s32): Likewise.
14091 (__arm_vhaddq_x_u8): Likewise.
14092 (__arm_vhaddq_x_u16): Likewise.
14093 (__arm_vhaddq_x_u32): Likewise.
14094 (__arm_vhcaddq_rot90_x_s8): Likewise.
14095 (__arm_vhcaddq_rot90_x_s16): Likewise.
14096 (__arm_vhcaddq_rot90_x_s32): Likewise.
14097 (__arm_vhcaddq_rot270_x_s8): Likewise.
14098 (__arm_vhcaddq_rot270_x_s16): Likewise.
14099 (__arm_vhcaddq_rot270_x_s32): Likewise.
14100 (__arm_vhsubq_x_n_s8): Likewise.
14101 (__arm_vhsubq_x_n_s16): Likewise.
14102 (__arm_vhsubq_x_n_s32): Likewise.
14103 (__arm_vhsubq_x_n_u8): Likewise.
14104 (__arm_vhsubq_x_n_u16): Likewise.
14105 (__arm_vhsubq_x_n_u32): Likewise.
14106 (__arm_vhsubq_x_s8): Likewise.
14107 (__arm_vhsubq_x_s16): Likewise.
14108 (__arm_vhsubq_x_s32): Likewise.
14109 (__arm_vhsubq_x_u8): Likewise.
14110 (__arm_vhsubq_x_u16): Likewise.
14111 (__arm_vhsubq_x_u32): Likewise.
14112 (__arm_vrhaddq_x_s8): Likewise.
14113 (__arm_vrhaddq_x_s16): Likewise.
14114 (__arm_vrhaddq_x_s32): Likewise.
14115 (__arm_vrhaddq_x_u8): Likewise.
14116 (__arm_vrhaddq_x_u16): Likewise.
14117 (__arm_vrhaddq_x_u32): Likewise.
14118 (__arm_vrmulhq_x_s8): Likewise.
14119 (__arm_vrmulhq_x_s16): Likewise.
14120 (__arm_vrmulhq_x_s32): Likewise.
14121 (__arm_vrmulhq_x_u8): Likewise.
14122 (__arm_vrmulhq_x_u16): Likewise.
14123 (__arm_vrmulhq_x_u32): Likewise.
14124 (__arm_vandq_x_s8): Likewise.
14125 (__arm_vandq_x_s16): Likewise.
14126 (__arm_vandq_x_s32): Likewise.
14127 (__arm_vandq_x_u8): Likewise.
14128 (__arm_vandq_x_u16): Likewise.
14129 (__arm_vandq_x_u32): Likewise.
14130 (__arm_vbicq_x_s8): Likewise.
14131 (__arm_vbicq_x_s16): Likewise.
14132 (__arm_vbicq_x_s32): Likewise.
14133 (__arm_vbicq_x_u8): Likewise.
14134 (__arm_vbicq_x_u16): Likewise.
14135 (__arm_vbicq_x_u32): Likewise.
14136 (__arm_vbrsrq_x_n_s8): Likewise.
14137 (__arm_vbrsrq_x_n_s16): Likewise.
14138 (__arm_vbrsrq_x_n_s32): Likewise.
14139 (__arm_vbrsrq_x_n_u8): Likewise.
14140 (__arm_vbrsrq_x_n_u16): Likewise.
14141 (__arm_vbrsrq_x_n_u32): Likewise.
14142 (__arm_veorq_x_s8): Likewise.
14143 (__arm_veorq_x_s16): Likewise.
14144 (__arm_veorq_x_s32): Likewise.
14145 (__arm_veorq_x_u8): Likewise.
14146 (__arm_veorq_x_u16): Likewise.
14147 (__arm_veorq_x_u32): Likewise.
14148 (__arm_vmovlbq_x_s8): Likewise.
14149 (__arm_vmovlbq_x_s16): Likewise.
14150 (__arm_vmovlbq_x_u8): Likewise.
14151 (__arm_vmovlbq_x_u16): Likewise.
14152 (__arm_vmovltq_x_s8): Likewise.
14153 (__arm_vmovltq_x_s16): Likewise.
14154 (__arm_vmovltq_x_u8): Likewise.
14155 (__arm_vmovltq_x_u16): Likewise.
14156 (__arm_vmvnq_x_s8): Likewise.
14157 (__arm_vmvnq_x_s16): Likewise.
14158 (__arm_vmvnq_x_s32): Likewise.
14159 (__arm_vmvnq_x_u8): Likewise.
14160 (__arm_vmvnq_x_u16): Likewise.
14161 (__arm_vmvnq_x_u32): Likewise.
14162 (__arm_vmvnq_x_n_s16): Likewise.
14163 (__arm_vmvnq_x_n_s32): Likewise.
14164 (__arm_vmvnq_x_n_u16): Likewise.
14165 (__arm_vmvnq_x_n_u32): Likewise.
14166 (__arm_vornq_x_s8): Likewise.
14167 (__arm_vornq_x_s16): Likewise.
14168 (__arm_vornq_x_s32): Likewise.
14169 (__arm_vornq_x_u8): Likewise.
14170 (__arm_vornq_x_u16): Likewise.
14171 (__arm_vornq_x_u32): Likewise.
14172 (__arm_vorrq_x_s8): Likewise.
14173 (__arm_vorrq_x_s16): Likewise.
14174 (__arm_vorrq_x_s32): Likewise.
14175 (__arm_vorrq_x_u8): Likewise.
14176 (__arm_vorrq_x_u16): Likewise.
14177 (__arm_vorrq_x_u32): Likewise.
14178 (__arm_vrev16q_x_s8): Likewise.
14179 (__arm_vrev16q_x_u8): Likewise.
14180 (__arm_vrev32q_x_s8): Likewise.
14181 (__arm_vrev32q_x_s16): Likewise.
14182 (__arm_vrev32q_x_u8): Likewise.
14183 (__arm_vrev32q_x_u16): Likewise.
14184 (__arm_vrev64q_x_s8): Likewise.
14185 (__arm_vrev64q_x_s16): Likewise.
14186 (__arm_vrev64q_x_s32): Likewise.
14187 (__arm_vrev64q_x_u8): Likewise.
14188 (__arm_vrev64q_x_u16): Likewise.
14189 (__arm_vrev64q_x_u32): Likewise.
14190 (__arm_vrshlq_x_s8): Likewise.
14191 (__arm_vrshlq_x_s16): Likewise.
14192 (__arm_vrshlq_x_s32): Likewise.
14193 (__arm_vrshlq_x_u8): Likewise.
14194 (__arm_vrshlq_x_u16): Likewise.
14195 (__arm_vrshlq_x_u32): Likewise.
14196 (__arm_vshllbq_x_n_s8): Likewise.
14197 (__arm_vshllbq_x_n_s16): Likewise.
14198 (__arm_vshllbq_x_n_u8): Likewise.
14199 (__arm_vshllbq_x_n_u16): Likewise.
14200 (__arm_vshlltq_x_n_s8): Likewise.
14201 (__arm_vshlltq_x_n_s16): Likewise.
14202 (__arm_vshlltq_x_n_u8): Likewise.
14203 (__arm_vshlltq_x_n_u16): Likewise.
14204 (__arm_vshlq_x_s8): Likewise.
14205 (__arm_vshlq_x_s16): Likewise.
14206 (__arm_vshlq_x_s32): Likewise.
14207 (__arm_vshlq_x_u8): Likewise.
14208 (__arm_vshlq_x_u16): Likewise.
14209 (__arm_vshlq_x_u32): Likewise.
14210 (__arm_vshlq_x_n_s8): Likewise.
14211 (__arm_vshlq_x_n_s16): Likewise.
14212 (__arm_vshlq_x_n_s32): Likewise.
14213 (__arm_vshlq_x_n_u8): Likewise.
14214 (__arm_vshlq_x_n_u16): Likewise.
14215 (__arm_vshlq_x_n_u32): Likewise.
14216 (__arm_vrshrq_x_n_s8): Likewise.
14217 (__arm_vrshrq_x_n_s16): Likewise.
14218 (__arm_vrshrq_x_n_s32): Likewise.
14219 (__arm_vrshrq_x_n_u8): Likewise.
14220 (__arm_vrshrq_x_n_u16): Likewise.
14221 (__arm_vrshrq_x_n_u32): Likewise.
14222 (__arm_vshrq_x_n_s8): Likewise.
14223 (__arm_vshrq_x_n_s16): Likewise.
14224 (__arm_vshrq_x_n_s32): Likewise.
14225 (__arm_vshrq_x_n_u8): Likewise.
14226 (__arm_vshrq_x_n_u16): Likewise.
14227 (__arm_vshrq_x_n_u32): Likewise.
14228 (__arm_vdupq_x_n_f16): Likewise.
14229 (__arm_vdupq_x_n_f32): Likewise.
14230 (__arm_vminnmq_x_f16): Likewise.
14231 (__arm_vminnmq_x_f32): Likewise.
14232 (__arm_vmaxnmq_x_f16): Likewise.
14233 (__arm_vmaxnmq_x_f32): Likewise.
14234 (__arm_vabdq_x_f16): Likewise.
14235 (__arm_vabdq_x_f32): Likewise.
14236 (__arm_vabsq_x_f16): Likewise.
14237 (__arm_vabsq_x_f32): Likewise.
14238 (__arm_vaddq_x_f16): Likewise.
14239 (__arm_vaddq_x_f32): Likewise.
14240 (__arm_vaddq_x_n_f16): Likewise.
14241 (__arm_vaddq_x_n_f32): Likewise.
14242 (__arm_vnegq_x_f16): Likewise.
14243 (__arm_vnegq_x_f32): Likewise.
14244 (__arm_vmulq_x_f16): Likewise.
14245 (__arm_vmulq_x_f32): Likewise.
14246 (__arm_vmulq_x_n_f16): Likewise.
14247 (__arm_vmulq_x_n_f32): Likewise.
14248 (__arm_vsubq_x_f16): Likewise.
14249 (__arm_vsubq_x_f32): Likewise.
14250 (__arm_vsubq_x_n_f16): Likewise.
14251 (__arm_vsubq_x_n_f32): Likewise.
14252 (__arm_vcaddq_rot90_x_f16): Likewise.
14253 (__arm_vcaddq_rot90_x_f32): Likewise.
14254 (__arm_vcaddq_rot270_x_f16): Likewise.
14255 (__arm_vcaddq_rot270_x_f32): Likewise.
14256 (__arm_vcmulq_x_f16): Likewise.
14257 (__arm_vcmulq_x_f32): Likewise.
14258 (__arm_vcmulq_rot90_x_f16): Likewise.
14259 (__arm_vcmulq_rot90_x_f32): Likewise.
14260 (__arm_vcmulq_rot180_x_f16): Likewise.
14261 (__arm_vcmulq_rot180_x_f32): Likewise.
14262 (__arm_vcmulq_rot270_x_f16): Likewise.
14263 (__arm_vcmulq_rot270_x_f32): Likewise.
14264 (__arm_vcvtaq_x_s16_f16): Likewise.
14265 (__arm_vcvtaq_x_s32_f32): Likewise.
14266 (__arm_vcvtaq_x_u16_f16): Likewise.
14267 (__arm_vcvtaq_x_u32_f32): Likewise.
14268 (__arm_vcvtnq_x_s16_f16): Likewise.
14269 (__arm_vcvtnq_x_s32_f32): Likewise.
14270 (__arm_vcvtnq_x_u16_f16): Likewise.
14271 (__arm_vcvtnq_x_u32_f32): Likewise.
14272 (__arm_vcvtpq_x_s16_f16): Likewise.
14273 (__arm_vcvtpq_x_s32_f32): Likewise.
14274 (__arm_vcvtpq_x_u16_f16): Likewise.
14275 (__arm_vcvtpq_x_u32_f32): Likewise.
14276 (__arm_vcvtmq_x_s16_f16): Likewise.
14277 (__arm_vcvtmq_x_s32_f32): Likewise.
14278 (__arm_vcvtmq_x_u16_f16): Likewise.
14279 (__arm_vcvtmq_x_u32_f32): Likewise.
14280 (__arm_vcvtbq_x_f32_f16): Likewise.
14281 (__arm_vcvttq_x_f32_f16): Likewise.
14282 (__arm_vcvtq_x_f16_u16): Likewise.
14283 (__arm_vcvtq_x_f16_s16): Likewise.
14284 (__arm_vcvtq_x_f32_s32): Likewise.
14285 (__arm_vcvtq_x_f32_u32): Likewise.
14286 (__arm_vcvtq_x_n_f16_s16): Likewise.
14287 (__arm_vcvtq_x_n_f16_u16): Likewise.
14288 (__arm_vcvtq_x_n_f32_s32): Likewise.
14289 (__arm_vcvtq_x_n_f32_u32): Likewise.
14290 (__arm_vcvtq_x_s16_f16): Likewise.
14291 (__arm_vcvtq_x_s32_f32): Likewise.
14292 (__arm_vcvtq_x_u16_f16): Likewise.
14293 (__arm_vcvtq_x_u32_f32): Likewise.
14294 (__arm_vcvtq_x_n_s16_f16): Likewise.
14295 (__arm_vcvtq_x_n_s32_f32): Likewise.
14296 (__arm_vcvtq_x_n_u16_f16): Likewise.
14297 (__arm_vcvtq_x_n_u32_f32): Likewise.
14298 (__arm_vrndq_x_f16): Likewise.
14299 (__arm_vrndq_x_f32): Likewise.
14300 (__arm_vrndnq_x_f16): Likewise.
14301 (__arm_vrndnq_x_f32): Likewise.
14302 (__arm_vrndmq_x_f16): Likewise.
14303 (__arm_vrndmq_x_f32): Likewise.
14304 (__arm_vrndpq_x_f16): Likewise.
14305 (__arm_vrndpq_x_f32): Likewise.
14306 (__arm_vrndaq_x_f16): Likewise.
14307 (__arm_vrndaq_x_f32): Likewise.
14308 (__arm_vrndxq_x_f16): Likewise.
14309 (__arm_vrndxq_x_f32): Likewise.
14310 (__arm_vandq_x_f16): Likewise.
14311 (__arm_vandq_x_f32): Likewise.
14312 (__arm_vbicq_x_f16): Likewise.
14313 (__arm_vbicq_x_f32): Likewise.
14314 (__arm_vbrsrq_x_n_f16): Likewise.
14315 (__arm_vbrsrq_x_n_f32): Likewise.
14316 (__arm_veorq_x_f16): Likewise.
14317 (__arm_veorq_x_f32): Likewise.
14318 (__arm_vornq_x_f16): Likewise.
14319 (__arm_vornq_x_f32): Likewise.
14320 (__arm_vorrq_x_f16): Likewise.
14321 (__arm_vorrq_x_f32): Likewise.
14322 (__arm_vrev32q_x_f16): Likewise.
14323 (__arm_vrev64q_x_f16): Likewise.
14324 (__arm_vrev64q_x_f32): Likewise.
14325 (vabdq_x): Define polymorphic variant.
14326 (vabsq_x): Likewise.
14327 (vaddq_x): Likewise.
14328 (vandq_x): Likewise.
14329 (vbicq_x): Likewise.
14330 (vbrsrq_x): Likewise.
14331 (vcaddq_rot270_x): Likewise.
14332 (vcaddq_rot90_x): Likewise.
14333 (vcmulq_rot180_x): Likewise.
14334 (vcmulq_rot270_x): Likewise.
14335 (vcmulq_x): Likewise.
14336 (vcvtq_x): Likewise.
14337 (vcvtq_x_n): Likewise.
14338 (vcvtnq_m): Likewise.
14339 (veorq_x): Likewise.
14340 (vmaxnmq_x): Likewise.
14341 (vminnmq_x): Likewise.
14342 (vmulq_x): Likewise.
14343 (vnegq_x): Likewise.
14344 (vornq_x): Likewise.
14345 (vorrq_x): Likewise.
14346 (vrev32q_x): Likewise.
14347 (vrev64q_x): Likewise.
14348 (vrndaq_x): Likewise.
14349 (vrndmq_x): Likewise.
14350 (vrndnq_x): Likewise.
14351 (vrndpq_x): Likewise.
14352 (vrndq_x): Likewise.
14353 (vrndxq_x): Likewise.
14354 (vsubq_x): Likewise.
14355 (vcmulq_rot90_x): Likewise.
14356 (vadciq): Likewise.
14357 (vclsq_x): Likewise.
14358 (vclzq_x): Likewise.
14359 (vhaddq_x): Likewise.
14360 (vhcaddq_rot270_x): Likewise.
14361 (vhcaddq_rot90_x): Likewise.
14362 (vhsubq_x): Likewise.
14363 (vmaxq_x): Likewise.
14364 (vminq_x): Likewise.
14365 (vmovlbq_x): Likewise.
14366 (vmovltq_x): Likewise.
14367 (vmulhq_x): Likewise.
14368 (vmullbq_int_x): Likewise.
14369 (vmullbq_poly_x): Likewise.
14370 (vmulltq_int_x): Likewise.
14371 (vmulltq_poly_x): Likewise.
14372 (vmvnq_x): Likewise.
14373 (vrev16q_x): Likewise.
14374 (vrhaddq_x): Likewise.
14375 (vrmulhq_x): Likewise.
14376 (vrshlq_x): Likewise.
14377 (vrshrq_x): Likewise.
14378 (vshllbq_x): Likewise.
14379 (vshlltq_x): Likewise.
14380 (vshlq_x_n): Likewise.
14381 (vshlq_x): Likewise.
14382 (vdwdupq_x_u8): Likewise.
14383 (vdwdupq_x_u16): Likewise.
14384 (vdwdupq_x_u32): Likewise.
14385 (viwdupq_x_u8): Likewise.
14386 (viwdupq_x_u16): Likewise.
14387 (viwdupq_x_u32): Likewise.
14388 (vidupq_x_u8): Likewise.
14389 (vddupq_x_u8): Likewise.
14390 (vidupq_x_u16): Likewise.
14391 (vddupq_x_u16): Likewise.
14392 (vidupq_x_u32): Likewise.
14393 (vddupq_x_u32): Likewise.
14394 (vshrq_x): Likewise.
14396 2020-03-20 Richard Biener <rguenther@suse.de>
14398 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
14399 to vectorize for CTOR defs.
14401 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14402 Andre Vieira <andre.simoesdiasvieira@arm.com>
14403 Mihail Ionescu <mihail.ionescu@arm.com>
14405 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
14407 (LDRGBWBU_QUALIFIERS): Likewise.
14408 (LDRGBWBS_Z_QUALIFIERS): Likewise.
14409 (LDRGBWBU_Z_QUALIFIERS): Likewise.
14410 (STRSBWBS_QUALIFIERS): Likewise.
14411 (STRSBWBU_QUALIFIERS): Likewise.
14412 (STRSBWBS_P_QUALIFIERS): Likewise.
14413 (STRSBWBU_P_QUALIFIERS): Likewise.
14414 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
14415 (vldrdq_gather_base_wb_u64): Likewise.
14416 (vldrdq_gather_base_wb_z_s64): Likewise.
14417 (vldrdq_gather_base_wb_z_u64): Likewise.
14418 (vldrwq_gather_base_wb_f32): Likewise.
14419 (vldrwq_gather_base_wb_s32): Likewise.
14420 (vldrwq_gather_base_wb_u32): Likewise.
14421 (vldrwq_gather_base_wb_z_f32): Likewise.
14422 (vldrwq_gather_base_wb_z_s32): Likewise.
14423 (vldrwq_gather_base_wb_z_u32): Likewise.
14424 (vstrdq_scatter_base_wb_p_s64): Likewise.
14425 (vstrdq_scatter_base_wb_p_u64): Likewise.
14426 (vstrdq_scatter_base_wb_s64): Likewise.
14427 (vstrdq_scatter_base_wb_u64): Likewise.
14428 (vstrwq_scatter_base_wb_p_s32): Likewise.
14429 (vstrwq_scatter_base_wb_p_f32): Likewise.
14430 (vstrwq_scatter_base_wb_p_u32): Likewise.
14431 (vstrwq_scatter_base_wb_s32): Likewise.
14432 (vstrwq_scatter_base_wb_u32): Likewise.
14433 (vstrwq_scatter_base_wb_f32): Likewise.
14434 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
14435 (__arm_vldrdq_gather_base_wb_u64): Likewise.
14436 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
14437 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
14438 (__arm_vldrwq_gather_base_wb_s32): Likewise.
14439 (__arm_vldrwq_gather_base_wb_u32): Likewise.
14440 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
14441 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
14442 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
14443 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
14444 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
14445 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
14446 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
14447 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
14448 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
14449 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
14450 (__arm_vldrwq_gather_base_wb_f32): Likewise.
14451 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
14452 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
14453 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
14454 (vstrwq_scatter_base_wb): Define polymorphic variant.
14455 (vstrwq_scatter_base_wb_p): Likewise.
14456 (vstrdq_scatter_base_wb_p): Likewise.
14457 (vstrdq_scatter_base_wb): Likewise.
14458 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
14460 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
14462 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
14463 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
14464 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
14465 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
14466 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
14467 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
14468 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
14469 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
14470 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
14471 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
14472 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
14473 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
14474 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
14475 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
14476 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
14477 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
14478 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
14479 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
14480 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
14481 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
14482 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
14483 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
14484 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
14485 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
14486 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
14487 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
14488 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
14489 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
14490 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
14492 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14493 Andre Vieira <andre.simoesdiasvieira@arm.com>
14494 Mihail Ionescu <mihail.ionescu@arm.com>
14496 * config/arm/arm-builtins.c
14497 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
14499 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
14500 (vddupq_m_n_u32): Likewise.
14501 (vddupq_m_n_u16): Likewise.
14502 (vddupq_m_wb_u8): Likewise.
14503 (vddupq_m_wb_u16): Likewise.
14504 (vddupq_m_wb_u32): Likewise.
14505 (vddupq_n_u8): Likewise.
14506 (vddupq_n_u32): Likewise.
14507 (vddupq_n_u16): Likewise.
14508 (vddupq_wb_u8): Likewise.
14509 (vddupq_wb_u16): Likewise.
14510 (vddupq_wb_u32): Likewise.
14511 (vdwdupq_m_n_u8): Likewise.
14512 (vdwdupq_m_n_u32): Likewise.
14513 (vdwdupq_m_n_u16): Likewise.
14514 (vdwdupq_m_wb_u8): Likewise.
14515 (vdwdupq_m_wb_u32): Likewise.
14516 (vdwdupq_m_wb_u16): Likewise.
14517 (vdwdupq_n_u8): Likewise.
14518 (vdwdupq_n_u32): Likewise.
14519 (vdwdupq_n_u16): Likewise.
14520 (vdwdupq_wb_u8): Likewise.
14521 (vdwdupq_wb_u32): Likewise.
14522 (vdwdupq_wb_u16): Likewise.
14523 (vidupq_m_n_u8): Likewise.
14524 (vidupq_m_n_u32): Likewise.
14525 (vidupq_m_n_u16): Likewise.
14526 (vidupq_m_wb_u8): Likewise.
14527 (vidupq_m_wb_u16): Likewise.
14528 (vidupq_m_wb_u32): Likewise.
14529 (vidupq_n_u8): Likewise.
14530 (vidupq_n_u32): Likewise.
14531 (vidupq_n_u16): Likewise.
14532 (vidupq_wb_u8): Likewise.
14533 (vidupq_wb_u16): Likewise.
14534 (vidupq_wb_u32): Likewise.
14535 (viwdupq_m_n_u8): Likewise.
14536 (viwdupq_m_n_u32): Likewise.
14537 (viwdupq_m_n_u16): Likewise.
14538 (viwdupq_m_wb_u8): Likewise.
14539 (viwdupq_m_wb_u32): Likewise.
14540 (viwdupq_m_wb_u16): Likewise.
14541 (viwdupq_n_u8): Likewise.
14542 (viwdupq_n_u32): Likewise.
14543 (viwdupq_n_u16): Likewise.
14544 (viwdupq_wb_u8): Likewise.
14545 (viwdupq_wb_u32): Likewise.
14546 (viwdupq_wb_u16): Likewise.
14547 (__arm_vddupq_m_n_u8): Define intrinsic.
14548 (__arm_vddupq_m_n_u32): Likewise.
14549 (__arm_vddupq_m_n_u16): Likewise.
14550 (__arm_vddupq_m_wb_u8): Likewise.
14551 (__arm_vddupq_m_wb_u16): Likewise.
14552 (__arm_vddupq_m_wb_u32): Likewise.
14553 (__arm_vddupq_n_u8): Likewise.
14554 (__arm_vddupq_n_u32): Likewise.
14555 (__arm_vddupq_n_u16): Likewise.
14556 (__arm_vdwdupq_m_n_u8): Likewise.
14557 (__arm_vdwdupq_m_n_u32): Likewise.
14558 (__arm_vdwdupq_m_n_u16): Likewise.
14559 (__arm_vdwdupq_m_wb_u8): Likewise.
14560 (__arm_vdwdupq_m_wb_u32): Likewise.
14561 (__arm_vdwdupq_m_wb_u16): Likewise.
14562 (__arm_vdwdupq_n_u8): Likewise.
14563 (__arm_vdwdupq_n_u32): Likewise.
14564 (__arm_vdwdupq_n_u16): Likewise.
14565 (__arm_vdwdupq_wb_u8): Likewise.
14566 (__arm_vdwdupq_wb_u32): Likewise.
14567 (__arm_vdwdupq_wb_u16): Likewise.
14568 (__arm_vidupq_m_n_u8): Likewise.
14569 (__arm_vidupq_m_n_u32): Likewise.
14570 (__arm_vidupq_m_n_u16): Likewise.
14571 (__arm_vidupq_n_u8): Likewise.
14572 (__arm_vidupq_m_wb_u8): Likewise.
14573 (__arm_vidupq_m_wb_u16): Likewise.
14574 (__arm_vidupq_m_wb_u32): Likewise.
14575 (__arm_vidupq_n_u32): Likewise.
14576 (__arm_vidupq_n_u16): Likewise.
14577 (__arm_vidupq_wb_u8): Likewise.
14578 (__arm_vidupq_wb_u16): Likewise.
14579 (__arm_vidupq_wb_u32): Likewise.
14580 (__arm_vddupq_wb_u8): Likewise.
14581 (__arm_vddupq_wb_u16): Likewise.
14582 (__arm_vddupq_wb_u32): Likewise.
14583 (__arm_viwdupq_m_n_u8): Likewise.
14584 (__arm_viwdupq_m_n_u32): Likewise.
14585 (__arm_viwdupq_m_n_u16): Likewise.
14586 (__arm_viwdupq_m_wb_u8): Likewise.
14587 (__arm_viwdupq_m_wb_u32): Likewise.
14588 (__arm_viwdupq_m_wb_u16): Likewise.
14589 (__arm_viwdupq_n_u8): Likewise.
14590 (__arm_viwdupq_n_u32): Likewise.
14591 (__arm_viwdupq_n_u16): Likewise.
14592 (__arm_viwdupq_wb_u8): Likewise.
14593 (__arm_viwdupq_wb_u32): Likewise.
14594 (__arm_viwdupq_wb_u16): Likewise.
14595 (vidupq_m): Define polymorphic variant.
14596 (vddupq_m): Likewise.
14597 (vidupq_u16): Likewise.
14598 (vidupq_u32): Likewise.
14599 (vidupq_u8): Likewise.
14600 (vddupq_u16): Likewise.
14601 (vddupq_u32): Likewise.
14602 (vddupq_u8): Likewise.
14603 (viwdupq_m): Likewise.
14604 (viwdupq_u16): Likewise.
14605 (viwdupq_u32): Likewise.
14606 (viwdupq_u8): Likewise.
14607 (vdwdupq_m): Likewise.
14608 (vdwdupq_u16): Likewise.
14609 (vdwdupq_u32): Likewise.
14610 (vdwdupq_u8): Likewise.
14611 * config/arm/arm_mve_builtins.def
14612 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
14614 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
14615 (mve_vidupq_u<mode>_insn): Likewise.
14616 (mve_vidupq_m_n_u<mode>): Likewise.
14617 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
14618 (mve_vddupq_n_u<mode>): Likewise.
14619 (mve_vddupq_u<mode>_insn): Likewise.
14620 (mve_vddupq_m_n_u<mode>): Likewise.
14621 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
14622 (mve_vdwdupq_n_u<mode>): Likewise.
14623 (mve_vdwdupq_wb_u<mode>): Likewise.
14624 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
14625 (mve_vdwdupq_m_n_u<mode>): Likewise.
14626 (mve_vdwdupq_m_wb_u<mode>): Likewise.
14627 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
14628 (mve_viwdupq_n_u<mode>): Likewise.
14629 (mve_viwdupq_wb_u<mode>): Likewise.
14630 (mve_viwdupq_wb_u<mode>_insn): Likewise.
14631 (mve_viwdupq_m_n_u<mode>): Likewise.
14632 (mve_viwdupq_m_wb_u<mode>): Likewise.
14633 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
14635 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14637 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
14638 (vreinterpretq_s16_s64): Likewise.
14639 (vreinterpretq_s16_s8): Likewise.
14640 (vreinterpretq_s16_u16): Likewise.
14641 (vreinterpretq_s16_u32): Likewise.
14642 (vreinterpretq_s16_u64): Likewise.
14643 (vreinterpretq_s16_u8): Likewise.
14644 (vreinterpretq_s32_s16): Likewise.
14645 (vreinterpretq_s32_s64): Likewise.
14646 (vreinterpretq_s32_s8): Likewise.
14647 (vreinterpretq_s32_u16): Likewise.
14648 (vreinterpretq_s32_u32): Likewise.
14649 (vreinterpretq_s32_u64): Likewise.
14650 (vreinterpretq_s32_u8): Likewise.
14651 (vreinterpretq_s64_s16): Likewise.
14652 (vreinterpretq_s64_s32): Likewise.
14653 (vreinterpretq_s64_s8): Likewise.
14654 (vreinterpretq_s64_u16): Likewise.
14655 (vreinterpretq_s64_u32): Likewise.
14656 (vreinterpretq_s64_u64): Likewise.
14657 (vreinterpretq_s64_u8): Likewise.
14658 (vreinterpretq_s8_s16): Likewise.
14659 (vreinterpretq_s8_s32): Likewise.
14660 (vreinterpretq_s8_s64): Likewise.
14661 (vreinterpretq_s8_u16): Likewise.
14662 (vreinterpretq_s8_u32): Likewise.
14663 (vreinterpretq_s8_u64): Likewise.
14664 (vreinterpretq_s8_u8): Likewise.
14665 (vreinterpretq_u16_s16): Likewise.
14666 (vreinterpretq_u16_s32): Likewise.
14667 (vreinterpretq_u16_s64): Likewise.
14668 (vreinterpretq_u16_s8): Likewise.
14669 (vreinterpretq_u16_u32): Likewise.
14670 (vreinterpretq_u16_u64): Likewise.
14671 (vreinterpretq_u16_u8): Likewise.
14672 (vreinterpretq_u32_s16): Likewise.
14673 (vreinterpretq_u32_s32): Likewise.
14674 (vreinterpretq_u32_s64): Likewise.
14675 (vreinterpretq_u32_s8): Likewise.
14676 (vreinterpretq_u32_u16): Likewise.
14677 (vreinterpretq_u32_u64): Likewise.
14678 (vreinterpretq_u32_u8): Likewise.
14679 (vreinterpretq_u64_s16): Likewise.
14680 (vreinterpretq_u64_s32): Likewise.
14681 (vreinterpretq_u64_s64): Likewise.
14682 (vreinterpretq_u64_s8): Likewise.
14683 (vreinterpretq_u64_u16): Likewise.
14684 (vreinterpretq_u64_u32): Likewise.
14685 (vreinterpretq_u64_u8): Likewise.
14686 (vreinterpretq_u8_s16): Likewise.
14687 (vreinterpretq_u8_s32): Likewise.
14688 (vreinterpretq_u8_s64): Likewise.
14689 (vreinterpretq_u8_s8): Likewise.
14690 (vreinterpretq_u8_u16): Likewise.
14691 (vreinterpretq_u8_u32): Likewise.
14692 (vreinterpretq_u8_u64): Likewise.
14693 (vreinterpretq_s32_f16): Likewise.
14694 (vreinterpretq_s32_f32): Likewise.
14695 (vreinterpretq_u16_f16): Likewise.
14696 (vreinterpretq_u16_f32): Likewise.
14697 (vreinterpretq_u32_f16): Likewise.
14698 (vreinterpretq_u32_f32): Likewise.
14699 (vreinterpretq_u64_f16): Likewise.
14700 (vreinterpretq_u64_f32): Likewise.
14701 (vreinterpretq_u8_f16): Likewise.
14702 (vreinterpretq_u8_f32): Likewise.
14703 (vreinterpretq_f16_f32): Likewise.
14704 (vreinterpretq_f16_s16): Likewise.
14705 (vreinterpretq_f16_s32): Likewise.
14706 (vreinterpretq_f16_s64): Likewise.
14707 (vreinterpretq_f16_s8): Likewise.
14708 (vreinterpretq_f16_u16): Likewise.
14709 (vreinterpretq_f16_u32): Likewise.
14710 (vreinterpretq_f16_u64): Likewise.
14711 (vreinterpretq_f16_u8): Likewise.
14712 (vreinterpretq_f32_f16): Likewise.
14713 (vreinterpretq_f32_s16): Likewise.
14714 (vreinterpretq_f32_s32): Likewise.
14715 (vreinterpretq_f32_s64): Likewise.
14716 (vreinterpretq_f32_s8): Likewise.
14717 (vreinterpretq_f32_u16): Likewise.
14718 (vreinterpretq_f32_u32): Likewise.
14719 (vreinterpretq_f32_u64): Likewise.
14720 (vreinterpretq_f32_u8): Likewise.
14721 (vreinterpretq_s16_f16): Likewise.
14722 (vreinterpretq_s16_f32): Likewise.
14723 (vreinterpretq_s64_f16): Likewise.
14724 (vreinterpretq_s64_f32): Likewise.
14725 (vreinterpretq_s8_f16): Likewise.
14726 (vreinterpretq_s8_f32): Likewise.
14727 (vuninitializedq_u8): Likewise.
14728 (vuninitializedq_u16): Likewise.
14729 (vuninitializedq_u32): Likewise.
14730 (vuninitializedq_u64): Likewise.
14731 (vuninitializedq_s8): Likewise.
14732 (vuninitializedq_s16): Likewise.
14733 (vuninitializedq_s32): Likewise.
14734 (vuninitializedq_s64): Likewise.
14735 (vuninitializedq_f16): Likewise.
14736 (vuninitializedq_f32): Likewise.
14737 (__arm_vuninitializedq_u8): Define intrinsic.
14738 (__arm_vuninitializedq_u16): Likewise.
14739 (__arm_vuninitializedq_u32): Likewise.
14740 (__arm_vuninitializedq_u64): Likewise.
14741 (__arm_vuninitializedq_s8): Likewise.
14742 (__arm_vuninitializedq_s16): Likewise.
14743 (__arm_vuninitializedq_s32): Likewise.
14744 (__arm_vuninitializedq_s64): Likewise.
14745 (__arm_vreinterpretq_s16_s32): Likewise.
14746 (__arm_vreinterpretq_s16_s64): Likewise.
14747 (__arm_vreinterpretq_s16_s8): Likewise.
14748 (__arm_vreinterpretq_s16_u16): Likewise.
14749 (__arm_vreinterpretq_s16_u32): Likewise.
14750 (__arm_vreinterpretq_s16_u64): Likewise.
14751 (__arm_vreinterpretq_s16_u8): Likewise.
14752 (__arm_vreinterpretq_s32_s16): Likewise.
14753 (__arm_vreinterpretq_s32_s64): Likewise.
14754 (__arm_vreinterpretq_s32_s8): Likewise.
14755 (__arm_vreinterpretq_s32_u16): Likewise.
14756 (__arm_vreinterpretq_s32_u32): Likewise.
14757 (__arm_vreinterpretq_s32_u64): Likewise.
14758 (__arm_vreinterpretq_s32_u8): Likewise.
14759 (__arm_vreinterpretq_s64_s16): Likewise.
14760 (__arm_vreinterpretq_s64_s32): Likewise.
14761 (__arm_vreinterpretq_s64_s8): Likewise.
14762 (__arm_vreinterpretq_s64_u16): Likewise.
14763 (__arm_vreinterpretq_s64_u32): Likewise.
14764 (__arm_vreinterpretq_s64_u64): Likewise.
14765 (__arm_vreinterpretq_s64_u8): Likewise.
14766 (__arm_vreinterpretq_s8_s16): Likewise.
14767 (__arm_vreinterpretq_s8_s32): Likewise.
14768 (__arm_vreinterpretq_s8_s64): Likewise.
14769 (__arm_vreinterpretq_s8_u16): Likewise.
14770 (__arm_vreinterpretq_s8_u32): Likewise.
14771 (__arm_vreinterpretq_s8_u64): Likewise.
14772 (__arm_vreinterpretq_s8_u8): Likewise.
14773 (__arm_vreinterpretq_u16_s16): Likewise.
14774 (__arm_vreinterpretq_u16_s32): Likewise.
14775 (__arm_vreinterpretq_u16_s64): Likewise.
14776 (__arm_vreinterpretq_u16_s8): Likewise.
14777 (__arm_vreinterpretq_u16_u32): Likewise.
14778 (__arm_vreinterpretq_u16_u64): Likewise.
14779 (__arm_vreinterpretq_u16_u8): Likewise.
14780 (__arm_vreinterpretq_u32_s16): Likewise.
14781 (__arm_vreinterpretq_u32_s32): Likewise.
14782 (__arm_vreinterpretq_u32_s64): Likewise.
14783 (__arm_vreinterpretq_u32_s8): Likewise.
14784 (__arm_vreinterpretq_u32_u16): Likewise.
14785 (__arm_vreinterpretq_u32_u64): Likewise.
14786 (__arm_vreinterpretq_u32_u8): Likewise.
14787 (__arm_vreinterpretq_u64_s16): Likewise.
14788 (__arm_vreinterpretq_u64_s32): Likewise.
14789 (__arm_vreinterpretq_u64_s64): Likewise.
14790 (__arm_vreinterpretq_u64_s8): Likewise.
14791 (__arm_vreinterpretq_u64_u16): Likewise.
14792 (__arm_vreinterpretq_u64_u32): Likewise.
14793 (__arm_vreinterpretq_u64_u8): Likewise.
14794 (__arm_vreinterpretq_u8_s16): Likewise.
14795 (__arm_vreinterpretq_u8_s32): Likewise.
14796 (__arm_vreinterpretq_u8_s64): Likewise.
14797 (__arm_vreinterpretq_u8_s8): Likewise.
14798 (__arm_vreinterpretq_u8_u16): Likewise.
14799 (__arm_vreinterpretq_u8_u32): Likewise.
14800 (__arm_vreinterpretq_u8_u64): Likewise.
14801 (__arm_vuninitializedq_f16): Likewise.
14802 (__arm_vuninitializedq_f32): Likewise.
14803 (__arm_vreinterpretq_s32_f16): Likewise.
14804 (__arm_vreinterpretq_s32_f32): Likewise.
14805 (__arm_vreinterpretq_s16_f16): Likewise.
14806 (__arm_vreinterpretq_s16_f32): Likewise.
14807 (__arm_vreinterpretq_s64_f16): Likewise.
14808 (__arm_vreinterpretq_s64_f32): Likewise.
14809 (__arm_vreinterpretq_s8_f16): Likewise.
14810 (__arm_vreinterpretq_s8_f32): Likewise.
14811 (__arm_vreinterpretq_u16_f16): Likewise.
14812 (__arm_vreinterpretq_u16_f32): Likewise.
14813 (__arm_vreinterpretq_u32_f16): Likewise.
14814 (__arm_vreinterpretq_u32_f32): Likewise.
14815 (__arm_vreinterpretq_u64_f16): Likewise.
14816 (__arm_vreinterpretq_u64_f32): Likewise.
14817 (__arm_vreinterpretq_u8_f16): Likewise.
14818 (__arm_vreinterpretq_u8_f32): Likewise.
14819 (__arm_vreinterpretq_f16_f32): Likewise.
14820 (__arm_vreinterpretq_f16_s16): Likewise.
14821 (__arm_vreinterpretq_f16_s32): Likewise.
14822 (__arm_vreinterpretq_f16_s64): Likewise.
14823 (__arm_vreinterpretq_f16_s8): Likewise.
14824 (__arm_vreinterpretq_f16_u16): Likewise.
14825 (__arm_vreinterpretq_f16_u32): Likewise.
14826 (__arm_vreinterpretq_f16_u64): Likewise.
14827 (__arm_vreinterpretq_f16_u8): Likewise.
14828 (__arm_vreinterpretq_f32_f16): Likewise.
14829 (__arm_vreinterpretq_f32_s16): Likewise.
14830 (__arm_vreinterpretq_f32_s32): Likewise.
14831 (__arm_vreinterpretq_f32_s64): Likewise.
14832 (__arm_vreinterpretq_f32_s8): Likewise.
14833 (__arm_vreinterpretq_f32_u16): Likewise.
14834 (__arm_vreinterpretq_f32_u32): Likewise.
14835 (__arm_vreinterpretq_f32_u64): Likewise.
14836 (__arm_vreinterpretq_f32_u8): Likewise.
14837 (vuninitializedq): Define polymorphic variant.
14838 (vreinterpretq_f16): Likewise.
14839 (vreinterpretq_f32): Likewise.
14840 (vreinterpretq_s16): Likewise.
14841 (vreinterpretq_s32): Likewise.
14842 (vreinterpretq_s64): Likewise.
14843 (vreinterpretq_s8): Likewise.
14844 (vreinterpretq_u16): Likewise.
14845 (vreinterpretq_u32): Likewise.
14846 (vreinterpretq_u64): Likewise.
14847 (vreinterpretq_u8): Likewise.
14849 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14850 Andre Vieira <andre.simoesdiasvieira@arm.com>
14851 Mihail Ionescu <mihail.ionescu@arm.com>
14853 * config/arm/arm_mve.h (vaddq_s8): Define macro.
14854 (vaddq_s16): Likewise.
14855 (vaddq_s32): Likewise.
14856 (vaddq_u8): Likewise.
14857 (vaddq_u16): Likewise.
14858 (vaddq_u32): Likewise.
14859 (vaddq_f16): Likewise.
14860 (vaddq_f32): Likewise.
14861 (__arm_vaddq_s8): Define intrinsic.
14862 (__arm_vaddq_s16): Likewise.
14863 (__arm_vaddq_s32): Likewise.
14864 (__arm_vaddq_u8): Likewise.
14865 (__arm_vaddq_u16): Likewise.
14866 (__arm_vaddq_u32): Likewise.
14867 (__arm_vaddq_f16): Likewise.
14868 (__arm_vaddq_f32): Likewise.
14869 (vaddq): Define polymorphic variant.
14870 * config/arm/iterators.md (VNIM): Define mode iterator for common types
14871 Neon, IWMMXT and MVE.
14872 (VNINOTM): Likewise.
14873 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
14874 (mve_vaddq_f<mode>): Define RTL pattern.
14875 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
14876 (addv8hf3_neon): Define RTL pattern.
14877 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
14879 (addv8hf3): Define standard RTL pattern for MVE and Neon.
14880 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
14882 2020-03-20 Martin Liska <mliska@suse.cz>
14885 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
14886 build_ref_for_offset function was used and it transforms off to bytes
14889 2020-03-20 Richard Biener <rguenther@suse.de>
14891 PR tree-optimization/94266
14892 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
14893 type of the underlying object to adjust for the containing
14894 field if available.
14896 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14898 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
14899 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
14900 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
14902 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14904 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
14906 2020-03-20 Jakub Jelinek <jakub@redhat.com>
14908 PR tree-optimization/94224
14909 * gimple-ssa-store-merging.c
14910 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
14911 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
14914 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14916 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
14918 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
14921 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
14922 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
14924 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
14927 * cgraphunit.c (process_function_and_variable_attributes): warn
14928 for flatten attribute on alias.
14929 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
14931 2020-03-19 Martin Liska <mliska@suse.cz>
14933 * lto-section-in.c: Add ext_symtab.
14934 * lto-streamer-out.c (write_symbol_extension_info): New.
14935 (produce_symtab_extension): New.
14936 (produce_asm_for_decls): Stream also produce_symtab_extension.
14937 * lto-streamer.h (enum lto_section_type): New section.
14939 2020-03-19 Jakub Jelinek <jakub@redhat.com>
14941 PR tree-optimization/94211
14942 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
14943 instead of estimate_num_insns for bb_seq (middle_bb). Rename
14944 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
14947 2020-03-19 Richard Biener <rguenther@suse.de>
14950 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
14951 and build_ref_for_offset.
14953 2020-03-19 Richard Biener <rguenther@suse.de>
14955 PR middle-end/94216
14956 * fold-const.c (fold_binary_loc): Avoid using
14957 build_fold_addr_expr when we really want an ADDR_EXPR.
14959 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
14961 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
14964 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
14966 PR rtl-optimization/90275
14967 * cse.c (cse_insn): Delete no-op register moves too.
14969 2020-03-18 Martin Sebor <msebor@redhat.com>
14972 * cgraphunit.c (process_function_and_variable_attributes): Also
14973 complain about weakref function definitions and drop all effects
14976 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14977 Mihail Ionescu <mihail.ionescu@arm.com>
14978 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14980 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
14981 (vstrdq_scatter_base_p_u64): Likewise.
14982 (vstrdq_scatter_base_s64): Likewise.
14983 (vstrdq_scatter_base_u64): Likewise.
14984 (vstrdq_scatter_offset_p_s64): Likewise.
14985 (vstrdq_scatter_offset_p_u64): Likewise.
14986 (vstrdq_scatter_offset_s64): Likewise.
14987 (vstrdq_scatter_offset_u64): Likewise.
14988 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
14989 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
14990 (vstrdq_scatter_shifted_offset_s64): Likewise.
14991 (vstrdq_scatter_shifted_offset_u64): Likewise.
14992 (vstrhq_scatter_offset_f16): Likewise.
14993 (vstrhq_scatter_offset_p_f16): Likewise.
14994 (vstrhq_scatter_shifted_offset_f16): Likewise.
14995 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
14996 (vstrwq_scatter_base_f32): Likewise.
14997 (vstrwq_scatter_base_p_f32): Likewise.
14998 (vstrwq_scatter_offset_f32): Likewise.
14999 (vstrwq_scatter_offset_p_f32): Likewise.
15000 (vstrwq_scatter_offset_p_s32): Likewise.
15001 (vstrwq_scatter_offset_p_u32): Likewise.
15002 (vstrwq_scatter_offset_s32): Likewise.
15003 (vstrwq_scatter_offset_u32): Likewise.
15004 (vstrwq_scatter_shifted_offset_f32): Likewise.
15005 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
15006 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
15007 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
15008 (vstrwq_scatter_shifted_offset_s32): Likewise.
15009 (vstrwq_scatter_shifted_offset_u32): Likewise.
15010 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
15011 (__arm_vstrdq_scatter_base_p_u64): Likewise.
15012 (__arm_vstrdq_scatter_base_s64): Likewise.
15013 (__arm_vstrdq_scatter_base_u64): Likewise.
15014 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
15015 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
15016 (__arm_vstrdq_scatter_offset_s64): Likewise.
15017 (__arm_vstrdq_scatter_offset_u64): Likewise.
15018 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
15019 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
15020 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
15021 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
15022 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
15023 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
15024 (__arm_vstrwq_scatter_offset_s32): Likewise.
15025 (__arm_vstrwq_scatter_offset_u32): Likewise.
15026 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
15027 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
15028 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
15029 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
15030 (__arm_vstrhq_scatter_offset_f16): Likewise.
15031 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
15032 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
15033 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
15034 (__arm_vstrwq_scatter_base_f32): Likewise.
15035 (__arm_vstrwq_scatter_base_p_f32): Likewise.
15036 (__arm_vstrwq_scatter_offset_f32): Likewise.
15037 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
15038 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
15039 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
15040 (vstrhq_scatter_offset): Define polymorphic variant.
15041 (vstrhq_scatter_offset_p): Likewise.
15042 (vstrhq_scatter_shifted_offset): Likewise.
15043 (vstrhq_scatter_shifted_offset_p): Likewise.
15044 (vstrwq_scatter_base): Likewise.
15045 (vstrwq_scatter_base_p): Likewise.
15046 (vstrwq_scatter_offset): Likewise.
15047 (vstrwq_scatter_offset_p): Likewise.
15048 (vstrwq_scatter_shifted_offset): Likewise.
15049 (vstrwq_scatter_shifted_offset_p): Likewise.
15050 (vstrdq_scatter_base_p): Likewise.
15051 (vstrdq_scatter_base): Likewise.
15052 (vstrdq_scatter_offset_p): Likewise.
15053 (vstrdq_scatter_offset): Likewise.
15054 (vstrdq_scatter_shifted_offset_p): Likewise.
15055 (vstrdq_scatter_shifted_offset): Likewise.
15056 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
15057 (STRSBS_P): Likewise.
15058 (STRSBU): Likewise.
15059 (STRSBU_P): Likewise.
15061 (STRSS_P): Likewise.
15063 (STRSU_P): Likewise.
15064 * config/arm/constraints.md (Ri): Define.
15065 * config/arm/mve.md (VSTRDSBQ): Define iterator.
15066 (VSTRDSOQ): Likewise.
15067 (VSTRDSSOQ): Likewise.
15068 (VSTRWSOQ): Likewise.
15069 (VSTRWSSOQ): Likewise.
15070 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
15071 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
15072 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
15073 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
15074 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
15075 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
15076 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
15077 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
15078 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
15079 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
15080 (mve_vstrwq_scatter_base_fv4sf): Likewise.
15081 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
15082 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
15083 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
15084 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
15085 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
15086 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
15087 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
15088 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
15089 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
15090 * config/arm/predicates.md (Ri): Define predicate to check immediate
15091 is the range +/-1016 and multiple of 8.
15093 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15094 Mihail Ionescu <mihail.ionescu@arm.com>
15095 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15097 * config/arm/arm_mve.h (vst1q_f32): Define macro.
15098 (vst1q_f16): Likewise.
15099 (vst1q_s8): Likewise.
15100 (vst1q_s32): Likewise.
15101 (vst1q_s16): Likewise.
15102 (vst1q_u8): Likewise.
15103 (vst1q_u32): Likewise.
15104 (vst1q_u16): Likewise.
15105 (vstrhq_f16): Likewise.
15106 (vstrhq_scatter_offset_s32): Likewise.
15107 (vstrhq_scatter_offset_s16): Likewise.
15108 (vstrhq_scatter_offset_u32): Likewise.
15109 (vstrhq_scatter_offset_u16): Likewise.
15110 (vstrhq_scatter_offset_p_s32): Likewise.
15111 (vstrhq_scatter_offset_p_s16): Likewise.
15112 (vstrhq_scatter_offset_p_u32): Likewise.
15113 (vstrhq_scatter_offset_p_u16): Likewise.
15114 (vstrhq_scatter_shifted_offset_s32): Likewise.
15115 (vstrhq_scatter_shifted_offset_s16): Likewise.
15116 (vstrhq_scatter_shifted_offset_u32): Likewise.
15117 (vstrhq_scatter_shifted_offset_u16): Likewise.
15118 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
15119 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
15120 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
15121 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
15122 (vstrhq_s32): Likewise.
15123 (vstrhq_s16): Likewise.
15124 (vstrhq_u32): Likewise.
15125 (vstrhq_u16): Likewise.
15126 (vstrhq_p_f16): Likewise.
15127 (vstrhq_p_s32): Likewise.
15128 (vstrhq_p_s16): Likewise.
15129 (vstrhq_p_u32): Likewise.
15130 (vstrhq_p_u16): Likewise.
15131 (vstrwq_f32): Likewise.
15132 (vstrwq_s32): Likewise.
15133 (vstrwq_u32): Likewise.
15134 (vstrwq_p_f32): Likewise.
15135 (vstrwq_p_s32): Likewise.
15136 (vstrwq_p_u32): Likewise.
15137 (__arm_vst1q_s8): Define intrinsic.
15138 (__arm_vst1q_s32): Likewise.
15139 (__arm_vst1q_s16): Likewise.
15140 (__arm_vst1q_u8): Likewise.
15141 (__arm_vst1q_u32): Likewise.
15142 (__arm_vst1q_u16): Likewise.
15143 (__arm_vstrhq_scatter_offset_s32): Likewise.
15144 (__arm_vstrhq_scatter_offset_s16): Likewise.
15145 (__arm_vstrhq_scatter_offset_u32): Likewise.
15146 (__arm_vstrhq_scatter_offset_u16): Likewise.
15147 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
15148 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
15149 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
15150 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
15151 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
15152 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
15153 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
15154 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
15155 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
15156 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
15157 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
15158 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
15159 (__arm_vstrhq_s32): Likewise.
15160 (__arm_vstrhq_s16): Likewise.
15161 (__arm_vstrhq_u32): Likewise.
15162 (__arm_vstrhq_u16): Likewise.
15163 (__arm_vstrhq_p_s32): Likewise.
15164 (__arm_vstrhq_p_s16): Likewise.
15165 (__arm_vstrhq_p_u32): Likewise.
15166 (__arm_vstrhq_p_u16): Likewise.
15167 (__arm_vstrwq_s32): Likewise.
15168 (__arm_vstrwq_u32): Likewise.
15169 (__arm_vstrwq_p_s32): Likewise.
15170 (__arm_vstrwq_p_u32): Likewise.
15171 (__arm_vstrwq_p_f32): Likewise.
15172 (__arm_vstrwq_f32): Likewise.
15173 (__arm_vst1q_f32): Likewise.
15174 (__arm_vst1q_f16): Likewise.
15175 (__arm_vstrhq_f16): Likewise.
15176 (__arm_vstrhq_p_f16): Likewise.
15177 (vst1q): Define polymorphic variant.
15178 (vstrhq): Likewise.
15179 (vstrhq_p): Likewise.
15180 (vstrhq_scatter_offset_p): Likewise.
15181 (vstrhq_scatter_offset): Likewise.
15182 (vstrhq_scatter_shifted_offset_p): Likewise.
15183 (vstrhq_scatter_shifted_offset): Likewise.
15184 (vstrwq_p): Likewise.
15185 (vstrwq): Likewise.
15186 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
15187 (STRS_P): Likewise.
15189 (STRSS_P): Likewise.
15191 (STRSU_P): Likewise.
15193 (STRU_P): Likewise.
15194 * config/arm/mve.md (VST1Q): Define iterator.
15195 (VSTRHSOQ): Likewise.
15196 (VSTRHSSOQ): Likewise.
15197 (VSTRHQ): Likewise.
15198 (VSTRWQ): Likewise.
15199 (mve_vstrhq_fv8hf): Define RTL pattern.
15200 (mve_vstrhq_p_fv8hf): Likewise.
15201 (mve_vstrhq_p_<supf><mode>): Likewise.
15202 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
15203 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
15204 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
15205 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
15206 (mve_vstrhq_<supf><mode>): Likewise.
15207 (mve_vstrwq_fv4sf): Likewise.
15208 (mve_vstrwq_p_fv4sf): Likewise.
15209 (mve_vstrwq_p_<supf>v4si): Likewise.
15210 (mve_vstrwq_<supf>v4si): Likewise.
15211 (mve_vst1q_f<mode>): Define expand.
15212 (mve_vst1q_<supf><mode>): Likewise.
15214 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15215 Mihail Ionescu <mihail.ionescu@arm.com>
15216 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15218 * config/arm/arm_mve.h (vld1q_s8): Define macro.
15219 (vld1q_s32): Likewise.
15220 (vld1q_s16): Likewise.
15221 (vld1q_u8): Likewise.
15222 (vld1q_u32): Likewise.
15223 (vld1q_u16): Likewise.
15224 (vldrhq_gather_offset_s32): Likewise.
15225 (vldrhq_gather_offset_s16): Likewise.
15226 (vldrhq_gather_offset_u32): Likewise.
15227 (vldrhq_gather_offset_u16): Likewise.
15228 (vldrhq_gather_offset_z_s32): Likewise.
15229 (vldrhq_gather_offset_z_s16): Likewise.
15230 (vldrhq_gather_offset_z_u32): Likewise.
15231 (vldrhq_gather_offset_z_u16): Likewise.
15232 (vldrhq_gather_shifted_offset_s32): Likewise.
15233 (vldrhq_gather_shifted_offset_s16): Likewise.
15234 (vldrhq_gather_shifted_offset_u32): Likewise.
15235 (vldrhq_gather_shifted_offset_u16): Likewise.
15236 (vldrhq_gather_shifted_offset_z_s32): Likewise.
15237 (vldrhq_gather_shifted_offset_z_s16): Likewise.
15238 (vldrhq_gather_shifted_offset_z_u32): Likewise.
15239 (vldrhq_gather_shifted_offset_z_u16): Likewise.
15240 (vldrhq_s32): Likewise.
15241 (vldrhq_s16): Likewise.
15242 (vldrhq_u32): Likewise.
15243 (vldrhq_u16): Likewise.
15244 (vldrhq_z_s32): Likewise.
15245 (vldrhq_z_s16): Likewise.
15246 (vldrhq_z_u32): Likewise.
15247 (vldrhq_z_u16): Likewise.
15248 (vldrwq_s32): Likewise.
15249 (vldrwq_u32): Likewise.
15250 (vldrwq_z_s32): Likewise.
15251 (vldrwq_z_u32): Likewise.
15252 (vld1q_f32): Likewise.
15253 (vld1q_f16): Likewise.
15254 (vldrhq_f16): Likewise.
15255 (vldrhq_z_f16): Likewise.
15256 (vldrwq_f32): Likewise.
15257 (vldrwq_z_f32): Likewise.
15258 (__arm_vld1q_s8): Define intrinsic.
15259 (__arm_vld1q_s32): Likewise.
15260 (__arm_vld1q_s16): Likewise.
15261 (__arm_vld1q_u8): Likewise.
15262 (__arm_vld1q_u32): Likewise.
15263 (__arm_vld1q_u16): Likewise.
15264 (__arm_vldrhq_gather_offset_s32): Likewise.
15265 (__arm_vldrhq_gather_offset_s16): Likewise.
15266 (__arm_vldrhq_gather_offset_u32): Likewise.
15267 (__arm_vldrhq_gather_offset_u16): Likewise.
15268 (__arm_vldrhq_gather_offset_z_s32): Likewise.
15269 (__arm_vldrhq_gather_offset_z_s16): Likewise.
15270 (__arm_vldrhq_gather_offset_z_u32): Likewise.
15271 (__arm_vldrhq_gather_offset_z_u16): Likewise.
15272 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
15273 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
15274 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
15275 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
15276 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
15277 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
15278 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
15279 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
15280 (__arm_vldrhq_s32): Likewise.
15281 (__arm_vldrhq_s16): Likewise.
15282 (__arm_vldrhq_u32): Likewise.
15283 (__arm_vldrhq_u16): Likewise.
15284 (__arm_vldrhq_z_s32): Likewise.
15285 (__arm_vldrhq_z_s16): Likewise.
15286 (__arm_vldrhq_z_u32): Likewise.
15287 (__arm_vldrhq_z_u16): Likewise.
15288 (__arm_vldrwq_s32): Likewise.
15289 (__arm_vldrwq_u32): Likewise.
15290 (__arm_vldrwq_z_s32): Likewise.
15291 (__arm_vldrwq_z_u32): Likewise.
15292 (__arm_vld1q_f32): Likewise.
15293 (__arm_vld1q_f16): Likewise.
15294 (__arm_vldrwq_f32): Likewise.
15295 (__arm_vldrwq_z_f32): Likewise.
15296 (__arm_vldrhq_z_f16): Likewise.
15297 (__arm_vldrhq_f16): Likewise.
15298 (vld1q): Define polymorphic variant.
15299 (vldrhq_gather_offset): Likewise.
15300 (vldrhq_gather_offset_z): Likewise.
15301 (vldrhq_gather_shifted_offset): Likewise.
15302 (vldrhq_gather_shifted_offset_z): Likewise.
15303 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
15305 (LDRU_Z): Likewise.
15306 (LDRS_Z): Likewise.
15307 (LDRGU_Z): Likewise.
15309 (LDRGS_Z): Likewise.
15311 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
15312 (V_sz_elem1): Likewise.
15313 (VLD1Q): Define iterator.
15314 (VLDRHGOQ): Likewise.
15315 (VLDRHGSOQ): Likewise.
15316 (VLDRHQ): Likewise.
15317 (VLDRWQ): Likewise.
15318 (mve_vldrhq_fv8hf): Define RTL pattern.
15319 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
15320 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
15321 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
15322 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
15323 (mve_vldrhq_<supf><mode>): Likewise.
15324 (mve_vldrhq_z_fv8hf): Likewise.
15325 (mve_vldrhq_z_<supf><mode>): Likewise.
15326 (mve_vldrwq_fv4sf): Likewise.
15327 (mve_vldrwq_<supf>v4si): Likewise.
15328 (mve_vldrwq_z_fv4sf): Likewise.
15329 (mve_vldrwq_z_<supf>v4si): Likewise.
15330 (mve_vld1q_f<mode>): Define RTL expand pattern.
15331 (mve_vld1q_<supf><mode>): Likewise.
15333 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15334 Mihail Ionescu <mihail.ionescu@arm.com>
15335 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15337 * config/arm/arm_mve.h (vld1q_s8): Define macro.
15338 (vld1q_s32): Likewise.
15339 (vld1q_s16): Likewise.
15340 (vld1q_u8): Likewise.
15341 (vld1q_u32): Likewise.
15342 (vld1q_u16): Likewise.
15343 (vldrhq_gather_offset_s32): Likewise.
15344 (vldrhq_gather_offset_s16): Likewise.
15345 (vldrhq_gather_offset_u32): Likewise.
15346 (vldrhq_gather_offset_u16): Likewise.
15347 (vldrhq_gather_offset_z_s32): Likewise.
15348 (vldrhq_gather_offset_z_s16): Likewise.
15349 (vldrhq_gather_offset_z_u32): Likewise.
15350 (vldrhq_gather_offset_z_u16): Likewise.
15351 (vldrhq_gather_shifted_offset_s32): Likewise.
15352 (vldrhq_gather_shifted_offset_s16): Likewise.
15353 (vldrhq_gather_shifted_offset_u32): Likewise.
15354 (vldrhq_gather_shifted_offset_u16): Likewise.
15355 (vldrhq_gather_shifted_offset_z_s32): Likewise.
15356 (vldrhq_gather_shifted_offset_z_s16): Likewise.
15357 (vldrhq_gather_shifted_offset_z_u32): Likewise.
15358 (vldrhq_gather_shifted_offset_z_u16): Likewise.
15359 (vldrhq_s32): Likewise.
15360 (vldrhq_s16): Likewise.
15361 (vldrhq_u32): Likewise.
15362 (vldrhq_u16): Likewise.
15363 (vldrhq_z_s32): Likewise.
15364 (vldrhq_z_s16): Likewise.
15365 (vldrhq_z_u32): Likewise.
15366 (vldrhq_z_u16): Likewise.
15367 (vldrwq_s32): Likewise.
15368 (vldrwq_u32): Likewise.
15369 (vldrwq_z_s32): Likewise.
15370 (vldrwq_z_u32): Likewise.
15371 (vld1q_f32): Likewise.
15372 (vld1q_f16): Likewise.
15373 (vldrhq_f16): Likewise.
15374 (vldrhq_z_f16): Likewise.
15375 (vldrwq_f32): Likewise.
15376 (vldrwq_z_f32): Likewise.
15377 (__arm_vld1q_s8): Define intrinsic.
15378 (__arm_vld1q_s32): Likewise.
15379 (__arm_vld1q_s16): Likewise.
15380 (__arm_vld1q_u8): Likewise.
15381 (__arm_vld1q_u32): Likewise.
15382 (__arm_vld1q_u16): Likewise.
15383 (__arm_vldrhq_gather_offset_s32): Likewise.
15384 (__arm_vldrhq_gather_offset_s16): Likewise.
15385 (__arm_vldrhq_gather_offset_u32): Likewise.
15386 (__arm_vldrhq_gather_offset_u16): Likewise.
15387 (__arm_vldrhq_gather_offset_z_s32): Likewise.
15388 (__arm_vldrhq_gather_offset_z_s16): Likewise.
15389 (__arm_vldrhq_gather_offset_z_u32): Likewise.
15390 (__arm_vldrhq_gather_offset_z_u16): Likewise.
15391 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
15392 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
15393 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
15394 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
15395 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
15396 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
15397 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
15398 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
15399 (__arm_vldrhq_s32): Likewise.
15400 (__arm_vldrhq_s16): Likewise.
15401 (__arm_vldrhq_u32): Likewise.
15402 (__arm_vldrhq_u16): Likewise.
15403 (__arm_vldrhq_z_s32): Likewise.
15404 (__arm_vldrhq_z_s16): Likewise.
15405 (__arm_vldrhq_z_u32): Likewise.
15406 (__arm_vldrhq_z_u16): Likewise.
15407 (__arm_vldrwq_s32): Likewise.
15408 (__arm_vldrwq_u32): Likewise.
15409 (__arm_vldrwq_z_s32): Likewise.
15410 (__arm_vldrwq_z_u32): Likewise.
15411 (__arm_vld1q_f32): Likewise.
15412 (__arm_vld1q_f16): Likewise.
15413 (__arm_vldrwq_f32): Likewise.
15414 (__arm_vldrwq_z_f32): Likewise.
15415 (__arm_vldrhq_z_f16): Likewise.
15416 (__arm_vldrhq_f16): Likewise.
15417 (vld1q): Define polymorphic variant.
15418 (vldrhq_gather_offset): Likewise.
15419 (vldrhq_gather_offset_z): Likewise.
15420 (vldrhq_gather_shifted_offset): Likewise.
15421 (vldrhq_gather_shifted_offset_z): Likewise.
15422 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
15424 (LDRU_Z): Likewise.
15425 (LDRS_Z): Likewise.
15426 (LDRGU_Z): Likewise.
15428 (LDRGS_Z): Likewise.
15430 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
15431 (V_sz_elem1): Likewise.
15432 (VLD1Q): Define iterator.
15433 (VLDRHGOQ): Likewise.
15434 (VLDRHGSOQ): Likewise.
15435 (VLDRHQ): Likewise.
15436 (VLDRWQ): Likewise.
15437 (mve_vldrhq_fv8hf): Define RTL pattern.
15438 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
15439 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
15440 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
15441 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
15442 (mve_vldrhq_<supf><mode>): Likewise.
15443 (mve_vldrhq_z_fv8hf): Likewise.
15444 (mve_vldrhq_z_<supf><mode>): Likewise.
15445 (mve_vldrwq_fv4sf): Likewise.
15446 (mve_vldrwq_<supf>v4si): Likewise.
15447 (mve_vldrwq_z_fv4sf): Likewise.
15448 (mve_vldrwq_z_<supf>v4si): Likewise.
15449 (mve_vld1q_f<mode>): Define RTL expand pattern.
15450 (mve_vld1q_<supf><mode>): Likewise.
15452 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15453 Mihail Ionescu <mihail.ionescu@arm.com>
15454 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15456 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
15458 (LDRGBU_Z_QUALIFIERS): Likewise.
15459 (LDRGS_Z_QUALIFIERS): Likewise.
15460 (LDRGU_Z_QUALIFIERS): Likewise.
15461 (LDRS_Z_QUALIFIERS): Likewise.
15462 (LDRU_Z_QUALIFIERS): Likewise.
15463 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
15464 (vldrbq_gather_offset_z_u8): Likewise.
15465 (vldrbq_gather_offset_z_s32): Likewise.
15466 (vldrbq_gather_offset_z_u16): Likewise.
15467 (vldrbq_gather_offset_z_u32): Likewise.
15468 (vldrbq_gather_offset_z_s8): Likewise.
15469 (vldrbq_z_s16): Likewise.
15470 (vldrbq_z_u8): Likewise.
15471 (vldrbq_z_s8): Likewise.
15472 (vldrbq_z_s32): Likewise.
15473 (vldrbq_z_u16): Likewise.
15474 (vldrbq_z_u32): Likewise.
15475 (vldrwq_gather_base_z_u32): Likewise.
15476 (vldrwq_gather_base_z_s32): Likewise.
15477 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
15478 (__arm_vldrbq_gather_offset_z_s32): Likewise.
15479 (__arm_vldrbq_gather_offset_z_s16): Likewise.
15480 (__arm_vldrbq_gather_offset_z_u8): Likewise.
15481 (__arm_vldrbq_gather_offset_z_u32): Likewise.
15482 (__arm_vldrbq_gather_offset_z_u16): Likewise.
15483 (__arm_vldrbq_z_s8): Likewise.
15484 (__arm_vldrbq_z_s32): Likewise.
15485 (__arm_vldrbq_z_s16): Likewise.
15486 (__arm_vldrbq_z_u8): Likewise.
15487 (__arm_vldrbq_z_u32): Likewise.
15488 (__arm_vldrbq_z_u16): Likewise.
15489 (__arm_vldrwq_gather_base_z_s32): Likewise.
15490 (__arm_vldrwq_gather_base_z_u32): Likewise.
15491 (vldrbq_gather_offset_z): Define polymorphic variant.
15492 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
15494 (LDRGBU_Z_QUALIFIERS): Likewise.
15495 (LDRGS_Z_QUALIFIERS): Likewise.
15496 (LDRGU_Z_QUALIFIERS): Likewise.
15497 (LDRS_Z_QUALIFIERS): Likewise.
15498 (LDRU_Z_QUALIFIERS): Likewise.
15499 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
15501 (mve_vldrbq_z_<supf><mode>): Likewise.
15502 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
15504 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15505 Mihail Ionescu <mihail.ionescu@arm.com>
15506 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15508 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
15510 (STRU_P_QUALIFIERS): Likewise.
15511 (STRSU_P_QUALIFIERS): Likewise.
15512 (STRSS_P_QUALIFIERS): Likewise.
15513 (STRSBS_P_QUALIFIERS): Likewise.
15514 (STRSBU_P_QUALIFIERS): Likewise.
15515 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
15516 (vstrbq_p_s32): Likewise.
15517 (vstrbq_p_s16): Likewise.
15518 (vstrbq_p_u8): Likewise.
15519 (vstrbq_p_u32): Likewise.
15520 (vstrbq_p_u16): Likewise.
15521 (vstrbq_scatter_offset_p_s8): Likewise.
15522 (vstrbq_scatter_offset_p_s32): Likewise.
15523 (vstrbq_scatter_offset_p_s16): Likewise.
15524 (vstrbq_scatter_offset_p_u8): Likewise.
15525 (vstrbq_scatter_offset_p_u32): Likewise.
15526 (vstrbq_scatter_offset_p_u16): Likewise.
15527 (vstrwq_scatter_base_p_s32): Likewise.
15528 (vstrwq_scatter_base_p_u32): Likewise.
15529 (__arm_vstrbq_p_s8): Define intrinsic.
15530 (__arm_vstrbq_p_s32): Likewise.
15531 (__arm_vstrbq_p_s16): Likewise.
15532 (__arm_vstrbq_p_u8): Likewise.
15533 (__arm_vstrbq_p_u32): Likewise.
15534 (__arm_vstrbq_p_u16): Likewise.
15535 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
15536 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
15537 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
15538 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
15539 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
15540 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
15541 (__arm_vstrwq_scatter_base_p_s32): Likewise.
15542 (__arm_vstrwq_scatter_base_p_u32): Likewise.
15543 (vstrbq_p): Define polymorphic variant.
15544 (vstrbq_scatter_offset_p): Likewise.
15545 (vstrwq_scatter_base_p): Likewise.
15546 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
15548 (STRU_P_QUALIFIERS): Likewise.
15549 (STRSU_P_QUALIFIERS): Likewise.
15550 (STRSS_P_QUALIFIERS): Likewise.
15551 (STRSBS_P_QUALIFIERS): Likewise.
15552 (STRSBU_P_QUALIFIERS): Likewise.
15553 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
15555 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
15556 (mve_vstrbq_p_<supf><mode>): Likewise.
15558 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15559 Mihail Ionescu <mihail.ionescu@arm.com>
15560 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15562 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
15564 (LDRGS_QUALIFIERS): Likewise.
15565 (LDRS_QUALIFIERS): Likewise.
15566 (LDRU_QUALIFIERS): Likewise.
15567 (LDRGBS_QUALIFIERS): Likewise.
15568 (LDRGBU_QUALIFIERS): Likewise.
15569 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
15570 (vldrbq_gather_offset_s8): Likewise.
15571 (vldrbq_s8): Likewise.
15572 (vldrbq_u8): Likewise.
15573 (vldrbq_gather_offset_u16): Likewise.
15574 (vldrbq_gather_offset_s16): Likewise.
15575 (vldrbq_s16): Likewise.
15576 (vldrbq_u16): Likewise.
15577 (vldrbq_gather_offset_u32): Likewise.
15578 (vldrbq_gather_offset_s32): Likewise.
15579 (vldrbq_s32): Likewise.
15580 (vldrbq_u32): Likewise.
15581 (vldrwq_gather_base_s32): Likewise.
15582 (vldrwq_gather_base_u32): Likewise.
15583 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
15584 (__arm_vldrbq_gather_offset_s8): Likewise.
15585 (__arm_vldrbq_s8): Likewise.
15586 (__arm_vldrbq_u8): Likewise.
15587 (__arm_vldrbq_gather_offset_u16): Likewise.
15588 (__arm_vldrbq_gather_offset_s16): Likewise.
15589 (__arm_vldrbq_s16): Likewise.
15590 (__arm_vldrbq_u16): Likewise.
15591 (__arm_vldrbq_gather_offset_u32): Likewise.
15592 (__arm_vldrbq_gather_offset_s32): Likewise.
15593 (__arm_vldrbq_s32): Likewise.
15594 (__arm_vldrbq_u32): Likewise.
15595 (__arm_vldrwq_gather_base_s32): Likewise.
15596 (__arm_vldrwq_gather_base_u32): Likewise.
15597 (vldrbq_gather_offset): Define polymorphic variant.
15598 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
15600 (LDRGS_QUALIFIERS): Likewise.
15601 (LDRS_QUALIFIERS): Likewise.
15602 (LDRU_QUALIFIERS): Likewise.
15603 (LDRGBS_QUALIFIERS): Likewise.
15604 (LDRGBU_QUALIFIERS): Likewise.
15605 * config/arm/mve.md (VLDRBGOQ): Define iterator.
15606 (VLDRBQ): Likewise.
15607 (VLDRWGBQ): Likewise.
15608 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
15609 (mve_vldrbq_<supf><mode>): Likewise.
15610 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
15612 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15613 Mihail Ionescu <mihail.ionescu@arm.com>
15614 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15616 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
15617 (STRU_QUALIFIERS): Likewise.
15618 (STRSS_QUALIFIERS): Likewise.
15619 (STRSU_QUALIFIERS): Likewise.
15620 (STRSBS_QUALIFIERS): Likewise.
15621 (STRSBU_QUALIFIERS): Likewise.
15622 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
15623 (vstrbq_u8): Likewise.
15624 (vstrbq_u16): Likewise.
15625 (vstrbq_scatter_offset_s8): Likewise.
15626 (vstrbq_scatter_offset_u8): Likewise.
15627 (vstrbq_scatter_offset_u16): Likewise.
15628 (vstrbq_s16): Likewise.
15629 (vstrbq_u32): Likewise.
15630 (vstrbq_scatter_offset_s16): Likewise.
15631 (vstrbq_scatter_offset_u32): Likewise.
15632 (vstrbq_s32): Likewise.
15633 (vstrbq_scatter_offset_s32): Likewise.
15634 (vstrwq_scatter_base_s32): Likewise.
15635 (vstrwq_scatter_base_u32): Likewise.
15636 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
15637 (__arm_vstrbq_scatter_offset_s32): Likewise.
15638 (__arm_vstrbq_scatter_offset_s16): Likewise.
15639 (__arm_vstrbq_scatter_offset_u8): Likewise.
15640 (__arm_vstrbq_scatter_offset_u32): Likewise.
15641 (__arm_vstrbq_scatter_offset_u16): Likewise.
15642 (__arm_vstrbq_s8): Likewise.
15643 (__arm_vstrbq_s32): Likewise.
15644 (__arm_vstrbq_s16): Likewise.
15645 (__arm_vstrbq_u8): Likewise.
15646 (__arm_vstrbq_u32): Likewise.
15647 (__arm_vstrbq_u16): Likewise.
15648 (__arm_vstrwq_scatter_base_s32): Likewise.
15649 (__arm_vstrwq_scatter_base_u32): Likewise.
15650 (vstrbq): Define polymorphic variant.
15651 (vstrbq_scatter_offset): Likewise.
15652 (vstrwq_scatter_base): Likewise.
15653 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
15655 (STRU_QUALIFIERS): Likewise.
15656 (STRSS_QUALIFIERS): Likewise.
15657 (STRSU_QUALIFIERS): Likewise.
15658 (STRSBS_QUALIFIERS): Likewise.
15659 (STRSBU_QUALIFIERS): Likewise.
15660 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
15661 (VSTRWSBQ): Define iterators.
15662 (VSTRBSOQ): Likewise.
15663 (VSTRBQ): Likewise.
15664 (mve_vstrbq_<supf><mode>): Define RTL pattern.
15665 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
15666 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
15668 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15669 Mihail Ionescu <mihail.ionescu@arm.com>
15670 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15672 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
15673 (vabdq_m_f16): Likewise.
15674 (vaddq_m_f32): Likewise.
15675 (vaddq_m_f16): Likewise.
15676 (vaddq_m_n_f32): Likewise.
15677 (vaddq_m_n_f16): Likewise.
15678 (vandq_m_f32): Likewise.
15679 (vandq_m_f16): Likewise.
15680 (vbicq_m_f32): Likewise.
15681 (vbicq_m_f16): Likewise.
15682 (vbrsrq_m_n_f32): Likewise.
15683 (vbrsrq_m_n_f16): Likewise.
15684 (vcaddq_rot270_m_f32): Likewise.
15685 (vcaddq_rot270_m_f16): Likewise.
15686 (vcaddq_rot90_m_f32): Likewise.
15687 (vcaddq_rot90_m_f16): Likewise.
15688 (vcmlaq_m_f32): Likewise.
15689 (vcmlaq_m_f16): Likewise.
15690 (vcmlaq_rot180_m_f32): Likewise.
15691 (vcmlaq_rot180_m_f16): Likewise.
15692 (vcmlaq_rot270_m_f32): Likewise.
15693 (vcmlaq_rot270_m_f16): Likewise.
15694 (vcmlaq_rot90_m_f32): Likewise.
15695 (vcmlaq_rot90_m_f16): Likewise.
15696 (vcmulq_m_f32): Likewise.
15697 (vcmulq_m_f16): Likewise.
15698 (vcmulq_rot180_m_f32): Likewise.
15699 (vcmulq_rot180_m_f16): Likewise.
15700 (vcmulq_rot270_m_f32): Likewise.
15701 (vcmulq_rot270_m_f16): Likewise.
15702 (vcmulq_rot90_m_f32): Likewise.
15703 (vcmulq_rot90_m_f16): Likewise.
15704 (vcvtq_m_n_s32_f32): Likewise.
15705 (vcvtq_m_n_s16_f16): Likewise.
15706 (vcvtq_m_n_u32_f32): Likewise.
15707 (vcvtq_m_n_u16_f16): Likewise.
15708 (veorq_m_f32): Likewise.
15709 (veorq_m_f16): Likewise.
15710 (vfmaq_m_f32): Likewise.
15711 (vfmaq_m_f16): Likewise.
15712 (vfmaq_m_n_f32): Likewise.
15713 (vfmaq_m_n_f16): Likewise.
15714 (vfmasq_m_n_f32): Likewise.
15715 (vfmasq_m_n_f16): Likewise.
15716 (vfmsq_m_f32): Likewise.
15717 (vfmsq_m_f16): Likewise.
15718 (vmaxnmq_m_f32): Likewise.
15719 (vmaxnmq_m_f16): Likewise.
15720 (vminnmq_m_f32): Likewise.
15721 (vminnmq_m_f16): Likewise.
15722 (vmulq_m_f32): Likewise.
15723 (vmulq_m_f16): Likewise.
15724 (vmulq_m_n_f32): Likewise.
15725 (vmulq_m_n_f16): Likewise.
15726 (vornq_m_f32): Likewise.
15727 (vornq_m_f16): Likewise.
15728 (vorrq_m_f32): Likewise.
15729 (vorrq_m_f16): Likewise.
15730 (vsubq_m_f32): Likewise.
15731 (vsubq_m_f16): Likewise.
15732 (vsubq_m_n_f32): Likewise.
15733 (vsubq_m_n_f16): Likewise.
15734 (__attribute__): Likewise.
15735 (__arm_vabdq_m_f32): Likewise.
15736 (__arm_vabdq_m_f16): Likewise.
15737 (__arm_vaddq_m_f32): Likewise.
15738 (__arm_vaddq_m_f16): Likewise.
15739 (__arm_vaddq_m_n_f32): Likewise.
15740 (__arm_vaddq_m_n_f16): Likewise.
15741 (__arm_vandq_m_f32): Likewise.
15742 (__arm_vandq_m_f16): Likewise.
15743 (__arm_vbicq_m_f32): Likewise.
15744 (__arm_vbicq_m_f16): Likewise.
15745 (__arm_vbrsrq_m_n_f32): Likewise.
15746 (__arm_vbrsrq_m_n_f16): Likewise.
15747 (__arm_vcaddq_rot270_m_f32): Likewise.
15748 (__arm_vcaddq_rot270_m_f16): Likewise.
15749 (__arm_vcaddq_rot90_m_f32): Likewise.
15750 (__arm_vcaddq_rot90_m_f16): Likewise.
15751 (__arm_vcmlaq_m_f32): Likewise.
15752 (__arm_vcmlaq_m_f16): Likewise.
15753 (__arm_vcmlaq_rot180_m_f32): Likewise.
15754 (__arm_vcmlaq_rot180_m_f16): Likewise.
15755 (__arm_vcmlaq_rot270_m_f32): Likewise.
15756 (__arm_vcmlaq_rot270_m_f16): Likewise.
15757 (__arm_vcmlaq_rot90_m_f32): Likewise.
15758 (__arm_vcmlaq_rot90_m_f16): Likewise.
15759 (__arm_vcmulq_m_f32): Likewise.
15760 (__arm_vcmulq_m_f16): Likewise.
15761 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
15762 (__arm_vcmulq_rot180_m_f16): Likewise.
15763 (__arm_vcmulq_rot270_m_f32): Likewise.
15764 (__arm_vcmulq_rot270_m_f16): Likewise.
15765 (__arm_vcmulq_rot90_m_f32): Likewise.
15766 (__arm_vcmulq_rot90_m_f16): Likewise.
15767 (__arm_vcvtq_m_n_s32_f32): Likewise.
15768 (__arm_vcvtq_m_n_s16_f16): Likewise.
15769 (__arm_vcvtq_m_n_u32_f32): Likewise.
15770 (__arm_vcvtq_m_n_u16_f16): Likewise.
15771 (__arm_veorq_m_f32): Likewise.
15772 (__arm_veorq_m_f16): Likewise.
15773 (__arm_vfmaq_m_f32): Likewise.
15774 (__arm_vfmaq_m_f16): Likewise.
15775 (__arm_vfmaq_m_n_f32): Likewise.
15776 (__arm_vfmaq_m_n_f16): Likewise.
15777 (__arm_vfmasq_m_n_f32): Likewise.
15778 (__arm_vfmasq_m_n_f16): Likewise.
15779 (__arm_vfmsq_m_f32): Likewise.
15780 (__arm_vfmsq_m_f16): Likewise.
15781 (__arm_vmaxnmq_m_f32): Likewise.
15782 (__arm_vmaxnmq_m_f16): Likewise.
15783 (__arm_vminnmq_m_f32): Likewise.
15784 (__arm_vminnmq_m_f16): Likewise.
15785 (__arm_vmulq_m_f32): Likewise.
15786 (__arm_vmulq_m_f16): Likewise.
15787 (__arm_vmulq_m_n_f32): Likewise.
15788 (__arm_vmulq_m_n_f16): Likewise.
15789 (__arm_vornq_m_f32): Likewise.
15790 (__arm_vornq_m_f16): Likewise.
15791 (__arm_vorrq_m_f32): Likewise.
15792 (__arm_vorrq_m_f16): Likewise.
15793 (__arm_vsubq_m_f32): Likewise.
15794 (__arm_vsubq_m_f16): Likewise.
15795 (__arm_vsubq_m_n_f32): Likewise.
15796 (__arm_vsubq_m_n_f16): Likewise.
15797 (vabdq_m): Define polymorphic variant.
15798 (vaddq_m): Likewise.
15799 (vaddq_m_n): Likewise.
15800 (vandq_m): Likewise.
15801 (vbicq_m): Likewise.
15802 (vbrsrq_m_n): Likewise.
15803 (vcaddq_rot270_m): Likewise.
15804 (vcaddq_rot90_m): Likewise.
15805 (vcmlaq_m): Likewise.
15806 (vcmlaq_rot180_m): Likewise.
15807 (vcmlaq_rot270_m): Likewise.
15808 (vcmlaq_rot90_m): Likewise.
15809 (vcmulq_m): Likewise.
15810 (vcmulq_rot180_m): Likewise.
15811 (vcmulq_rot270_m): Likewise.
15812 (vcmulq_rot90_m): Likewise.
15813 (veorq_m): Likewise.
15814 (vfmaq_m): Likewise.
15815 (vfmaq_m_n): Likewise.
15816 (vfmasq_m_n): Likewise.
15817 (vfmsq_m): Likewise.
15818 (vmaxnmq_m): Likewise.
15819 (vminnmq_m): Likewise.
15820 (vmulq_m): Likewise.
15821 (vmulq_m_n): Likewise.
15822 (vornq_m): Likewise.
15823 (vsubq_m): Likewise.
15824 (vsubq_m_n): Likewise.
15825 (vorrq_m): Likewise.
15826 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
15828 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
15829 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
15830 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
15831 (mve_vaddq_m_f<mode>): Likewise.
15832 (mve_vaddq_m_n_f<mode>): Likewise.
15833 (mve_vandq_m_f<mode>): Likewise.
15834 (mve_vbicq_m_f<mode>): Likewise.
15835 (mve_vbrsrq_m_n_f<mode>): Likewise.
15836 (mve_vcaddq_rot270_m_f<mode>): Likewise.
15837 (mve_vcaddq_rot90_m_f<mode>): Likewise.
15838 (mve_vcmlaq_m_f<mode>): Likewise.
15839 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
15840 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
15841 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
15842 (mve_vcmulq_m_f<mode>): Likewise.
15843 (mve_vcmulq_rot180_m_f<mode>): Likewise.
15844 (mve_vcmulq_rot270_m_f<mode>): Likewise.
15845 (mve_vcmulq_rot90_m_f<mode>): Likewise.
15846 (mve_veorq_m_f<mode>): Likewise.
15847 (mve_vfmaq_m_f<mode>): Likewise.
15848 (mve_vfmaq_m_n_f<mode>): Likewise.
15849 (mve_vfmasq_m_n_f<mode>): Likewise.
15850 (mve_vfmsq_m_f<mode>): Likewise.
15851 (mve_vmaxnmq_m_f<mode>): Likewise.
15852 (mve_vminnmq_m_f<mode>): Likewise.
15853 (mve_vmulq_m_f<mode>): Likewise.
15854 (mve_vmulq_m_n_f<mode>): Likewise.
15855 (mve_vornq_m_f<mode>): Likewise.
15856 (mve_vorrq_m_f<mode>): Likewise.
15857 (mve_vsubq_m_f<mode>): Likewise.
15858 (mve_vsubq_m_n_f<mode>): Likewise.
15860 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15861 Mihail Ionescu <mihail.ionescu@arm.com>
15862 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15864 * config/arm/arm-protos.h (arm_mve_immediate_check):
15865 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
15866 mode and interger value.
15867 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
15868 (vmlaldavaq_p_s16): Likewise.
15869 (vmlaldavaq_p_u32): Likewise.
15870 (vmlaldavaq_p_u16): Likewise.
15871 (vmlaldavaxq_p_s32): Likewise.
15872 (vmlaldavaxq_p_s16): Likewise.
15873 (vmlaldavaxq_p_u32): Likewise.
15874 (vmlaldavaxq_p_u16): Likewise.
15875 (vmlsldavaq_p_s32): Likewise.
15876 (vmlsldavaq_p_s16): Likewise.
15877 (vmlsldavaxq_p_s32): Likewise.
15878 (vmlsldavaxq_p_s16): Likewise.
15879 (vmullbq_poly_m_p8): Likewise.
15880 (vmullbq_poly_m_p16): Likewise.
15881 (vmulltq_poly_m_p8): Likewise.
15882 (vmulltq_poly_m_p16): Likewise.
15883 (vqdmullbq_m_n_s32): Likewise.
15884 (vqdmullbq_m_n_s16): Likewise.
15885 (vqdmullbq_m_s32): Likewise.
15886 (vqdmullbq_m_s16): Likewise.
15887 (vqdmulltq_m_n_s32): Likewise.
15888 (vqdmulltq_m_n_s16): Likewise.
15889 (vqdmulltq_m_s32): Likewise.
15890 (vqdmulltq_m_s16): Likewise.
15891 (vqrshrnbq_m_n_s32): Likewise.
15892 (vqrshrnbq_m_n_s16): Likewise.
15893 (vqrshrnbq_m_n_u32): Likewise.
15894 (vqrshrnbq_m_n_u16): Likewise.
15895 (vqrshrntq_m_n_s32): Likewise.
15896 (vqrshrntq_m_n_s16): Likewise.
15897 (vqrshrntq_m_n_u32): Likewise.
15898 (vqrshrntq_m_n_u16): Likewise.
15899 (vqrshrunbq_m_n_s32): Likewise.
15900 (vqrshrunbq_m_n_s16): Likewise.
15901 (vqrshruntq_m_n_s32): Likewise.
15902 (vqrshruntq_m_n_s16): Likewise.
15903 (vqshrnbq_m_n_s32): Likewise.
15904 (vqshrnbq_m_n_s16): Likewise.
15905 (vqshrnbq_m_n_u32): Likewise.
15906 (vqshrnbq_m_n_u16): Likewise.
15907 (vqshrntq_m_n_s32): Likewise.
15908 (vqshrntq_m_n_s16): Likewise.
15909 (vqshrntq_m_n_u32): Likewise.
15910 (vqshrntq_m_n_u16): Likewise.
15911 (vqshrunbq_m_n_s32): Likewise.
15912 (vqshrunbq_m_n_s16): Likewise.
15913 (vqshruntq_m_n_s32): Likewise.
15914 (vqshruntq_m_n_s16): Likewise.
15915 (vrmlaldavhaq_p_s32): Likewise.
15916 (vrmlaldavhaq_p_u32): Likewise.
15917 (vrmlaldavhaxq_p_s32): Likewise.
15918 (vrmlsldavhaq_p_s32): Likewise.
15919 (vrmlsldavhaxq_p_s32): Likewise.
15920 (vrshrnbq_m_n_s32): Likewise.
15921 (vrshrnbq_m_n_s16): Likewise.
15922 (vrshrnbq_m_n_u32): Likewise.
15923 (vrshrnbq_m_n_u16): Likewise.
15924 (vrshrntq_m_n_s32): Likewise.
15925 (vrshrntq_m_n_s16): Likewise.
15926 (vrshrntq_m_n_u32): Likewise.
15927 (vrshrntq_m_n_u16): Likewise.
15928 (vshllbq_m_n_s8): Likewise.
15929 (vshllbq_m_n_s16): Likewise.
15930 (vshllbq_m_n_u8): Likewise.
15931 (vshllbq_m_n_u16): Likewise.
15932 (vshlltq_m_n_s8): Likewise.
15933 (vshlltq_m_n_s16): Likewise.
15934 (vshlltq_m_n_u8): Likewise.
15935 (vshlltq_m_n_u16): Likewise.
15936 (vshrnbq_m_n_s32): Likewise.
15937 (vshrnbq_m_n_s16): Likewise.
15938 (vshrnbq_m_n_u32): Likewise.
15939 (vshrnbq_m_n_u16): Likewise.
15940 (vshrntq_m_n_s32): Likewise.
15941 (vshrntq_m_n_s16): Likewise.
15942 (vshrntq_m_n_u32): Likewise.
15943 (vshrntq_m_n_u16): Likewise.
15944 (__arm_vmlaldavaq_p_s32): Define intrinsic.
15945 (__arm_vmlaldavaq_p_s16): Likewise.
15946 (__arm_vmlaldavaq_p_u32): Likewise.
15947 (__arm_vmlaldavaq_p_u16): Likewise.
15948 (__arm_vmlaldavaxq_p_s32): Likewise.
15949 (__arm_vmlaldavaxq_p_s16): Likewise.
15950 (__arm_vmlaldavaxq_p_u32): Likewise.
15951 (__arm_vmlaldavaxq_p_u16): Likewise.
15952 (__arm_vmlsldavaq_p_s32): Likewise.
15953 (__arm_vmlsldavaq_p_s16): Likewise.
15954 (__arm_vmlsldavaxq_p_s32): Likewise.
15955 (__arm_vmlsldavaxq_p_s16): Likewise.
15956 (__arm_vmullbq_poly_m_p8): Likewise.
15957 (__arm_vmullbq_poly_m_p16): Likewise.
15958 (__arm_vmulltq_poly_m_p8): Likewise.
15959 (__arm_vmulltq_poly_m_p16): Likewise.
15960 (__arm_vqdmullbq_m_n_s32): Likewise.
15961 (__arm_vqdmullbq_m_n_s16): Likewise.
15962 (__arm_vqdmullbq_m_s32): Likewise.
15963 (__arm_vqdmullbq_m_s16): Likewise.
15964 (__arm_vqdmulltq_m_n_s32): Likewise.
15965 (__arm_vqdmulltq_m_n_s16): Likewise.
15966 (__arm_vqdmulltq_m_s32): Likewise.
15967 (__arm_vqdmulltq_m_s16): Likewise.
15968 (__arm_vqrshrnbq_m_n_s32): Likewise.
15969 (__arm_vqrshrnbq_m_n_s16): Likewise.
15970 (__arm_vqrshrnbq_m_n_u32): Likewise.
15971 (__arm_vqrshrnbq_m_n_u16): Likewise.
15972 (__arm_vqrshrntq_m_n_s32): Likewise.
15973 (__arm_vqrshrntq_m_n_s16): Likewise.
15974 (__arm_vqrshrntq_m_n_u32): Likewise.
15975 (__arm_vqrshrntq_m_n_u16): Likewise.
15976 (__arm_vqrshrunbq_m_n_s32): Likewise.
15977 (__arm_vqrshrunbq_m_n_s16): Likewise.
15978 (__arm_vqrshruntq_m_n_s32): Likewise.
15979 (__arm_vqrshruntq_m_n_s16): Likewise.
15980 (__arm_vqshrnbq_m_n_s32): Likewise.
15981 (__arm_vqshrnbq_m_n_s16): Likewise.
15982 (__arm_vqshrnbq_m_n_u32): Likewise.
15983 (__arm_vqshrnbq_m_n_u16): Likewise.
15984 (__arm_vqshrntq_m_n_s32): Likewise.
15985 (__arm_vqshrntq_m_n_s16): Likewise.
15986 (__arm_vqshrntq_m_n_u32): Likewise.
15987 (__arm_vqshrntq_m_n_u16): Likewise.
15988 (__arm_vqshrunbq_m_n_s32): Likewise.
15989 (__arm_vqshrunbq_m_n_s16): Likewise.
15990 (__arm_vqshruntq_m_n_s32): Likewise.
15991 (__arm_vqshruntq_m_n_s16): Likewise.
15992 (__arm_vrmlaldavhaq_p_s32): Likewise.
15993 (__arm_vrmlaldavhaq_p_u32): Likewise.
15994 (__arm_vrmlaldavhaxq_p_s32): Likewise.
15995 (__arm_vrmlsldavhaq_p_s32): Likewise.
15996 (__arm_vrmlsldavhaxq_p_s32): Likewise.
15997 (__arm_vrshrnbq_m_n_s32): Likewise.
15998 (__arm_vrshrnbq_m_n_s16): Likewise.
15999 (__arm_vrshrnbq_m_n_u32): Likewise.
16000 (__arm_vrshrnbq_m_n_u16): Likewise.
16001 (__arm_vrshrntq_m_n_s32): Likewise.
16002 (__arm_vrshrntq_m_n_s16): Likewise.
16003 (__arm_vrshrntq_m_n_u32): Likewise.
16004 (__arm_vrshrntq_m_n_u16): Likewise.
16005 (__arm_vshllbq_m_n_s8): Likewise.
16006 (__arm_vshllbq_m_n_s16): Likewise.
16007 (__arm_vshllbq_m_n_u8): Likewise.
16008 (__arm_vshllbq_m_n_u16): Likewise.
16009 (__arm_vshlltq_m_n_s8): Likewise.
16010 (__arm_vshlltq_m_n_s16): Likewise.
16011 (__arm_vshlltq_m_n_u8): Likewise.
16012 (__arm_vshlltq_m_n_u16): Likewise.
16013 (__arm_vshrnbq_m_n_s32): Likewise.
16014 (__arm_vshrnbq_m_n_s16): Likewise.
16015 (__arm_vshrnbq_m_n_u32): Likewise.
16016 (__arm_vshrnbq_m_n_u16): Likewise.
16017 (__arm_vshrntq_m_n_s32): Likewise.
16018 (__arm_vshrntq_m_n_s16): Likewise.
16019 (__arm_vshrntq_m_n_u32): Likewise.
16020 (__arm_vshrntq_m_n_u16): Likewise.
16021 (vmullbq_poly_m): Define polymorphic variant.
16022 (vmulltq_poly_m): Likewise.
16023 (vshllbq_m): Likewise.
16024 (vshrntq_m_n): Likewise.
16025 (vshrnbq_m_n): Likewise.
16026 (vshlltq_m_n): Likewise.
16027 (vshllbq_m_n): Likewise.
16028 (vrshrntq_m_n): Likewise.
16029 (vrshrnbq_m_n): Likewise.
16030 (vqshruntq_m_n): Likewise.
16031 (vqshrunbq_m_n): Likewise.
16032 (vqdmullbq_m_n): Likewise.
16033 (vqdmullbq_m): Likewise.
16034 (vqdmulltq_m_n): Likewise.
16035 (vqdmulltq_m): Likewise.
16036 (vqrshrnbq_m_n): Likewise.
16037 (vqrshrntq_m_n): Likewise.
16038 (vqrshrunbq_m_n): Likewise.
16039 (vqrshruntq_m_n): Likewise.
16040 (vqshrnbq_m_n): Likewise.
16041 (vqshrntq_m_n): Likewise.
16042 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
16043 builtin qualifiers.
16044 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
16045 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
16046 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
16047 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
16048 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
16049 (VMLALDAVAXQ_P): Likewise.
16050 (VQRSHRNBQ_M_N): Likewise.
16051 (VQRSHRNTQ_M_N): Likewise.
16052 (VQSHRNBQ_M_N): Likewise.
16053 (VQSHRNTQ_M_N): Likewise.
16054 (VRSHRNBQ_M_N): Likewise.
16055 (VRSHRNTQ_M_N): Likewise.
16056 (VSHLLBQ_M_N): Likewise.
16057 (VSHLLTQ_M_N): Likewise.
16058 (VSHRNBQ_M_N): Likewise.
16059 (VSHRNTQ_M_N): Likewise.
16060 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
16061 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
16062 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
16063 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
16064 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
16065 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
16066 (mve_vrmlaldavhaq_p_sv4si): Likewise.
16067 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
16068 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
16069 (mve_vshllbq_m_n_<supf><mode>): Likewise.
16070 (mve_vshlltq_m_n_<supf><mode>): Likewise.
16071 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
16072 (mve_vshrntq_m_n_<supf><mode>): Likewise.
16073 (mve_vmlsldavaq_p_s<mode>): Likewise.
16074 (mve_vmlsldavaxq_p_s<mode>): Likewise.
16075 (mve_vmullbq_poly_m_p<mode>): Likewise.
16076 (mve_vmulltq_poly_m_p<mode>): Likewise.
16077 (mve_vqdmullbq_m_n_s<mode>): Likewise.
16078 (mve_vqdmullbq_m_s<mode>): Likewise.
16079 (mve_vqdmulltq_m_n_s<mode>): Likewise.
16080 (mve_vqdmulltq_m_s<mode>): Likewise.
16081 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
16082 (mve_vqrshruntq_m_n_s<mode>): Likewise.
16083 (mve_vqshrunbq_m_n_s<mode>): Likewise.
16084 (mve_vqshruntq_m_n_s<mode>): Likewise.
16085 (mve_vrmlaldavhaq_p_uv4si): Likewise.
16086 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
16087 (mve_vrmlsldavhaq_p_sv4si): Likewise.
16088 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
16090 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16091 Mihail Ionescu <mihail.ionescu@arm.com>
16092 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16094 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
16095 (vabdq_m_s32): Likewise.
16096 (vabdq_m_s16): Likewise.
16097 (vabdq_m_u8): Likewise.
16098 (vabdq_m_u32): Likewise.
16099 (vabdq_m_u16): Likewise.
16100 (vaddq_m_n_s8): Likewise.
16101 (vaddq_m_n_s32): Likewise.
16102 (vaddq_m_n_s16): Likewise.
16103 (vaddq_m_n_u8): Likewise.
16104 (vaddq_m_n_u32): Likewise.
16105 (vaddq_m_n_u16): Likewise.
16106 (vaddq_m_s8): Likewise.
16107 (vaddq_m_s32): Likewise.
16108 (vaddq_m_s16): Likewise.
16109 (vaddq_m_u8): Likewise.
16110 (vaddq_m_u32): Likewise.
16111 (vaddq_m_u16): Likewise.
16112 (vandq_m_s8): Likewise.
16113 (vandq_m_s32): Likewise.
16114 (vandq_m_s16): Likewise.
16115 (vandq_m_u8): Likewise.
16116 (vandq_m_u32): Likewise.
16117 (vandq_m_u16): Likewise.
16118 (vbicq_m_s8): Likewise.
16119 (vbicq_m_s32): Likewise.
16120 (vbicq_m_s16): Likewise.
16121 (vbicq_m_u8): Likewise.
16122 (vbicq_m_u32): Likewise.
16123 (vbicq_m_u16): Likewise.
16124 (vbrsrq_m_n_s8): Likewise.
16125 (vbrsrq_m_n_s32): Likewise.
16126 (vbrsrq_m_n_s16): Likewise.
16127 (vbrsrq_m_n_u8): Likewise.
16128 (vbrsrq_m_n_u32): Likewise.
16129 (vbrsrq_m_n_u16): Likewise.
16130 (vcaddq_rot270_m_s8): Likewise.
16131 (vcaddq_rot270_m_s32): Likewise.
16132 (vcaddq_rot270_m_s16): Likewise.
16133 (vcaddq_rot270_m_u8): Likewise.
16134 (vcaddq_rot270_m_u32): Likewise.
16135 (vcaddq_rot270_m_u16): Likewise.
16136 (vcaddq_rot90_m_s8): Likewise.
16137 (vcaddq_rot90_m_s32): Likewise.
16138 (vcaddq_rot90_m_s16): Likewise.
16139 (vcaddq_rot90_m_u8): Likewise.
16140 (vcaddq_rot90_m_u32): Likewise.
16141 (vcaddq_rot90_m_u16): Likewise.
16142 (veorq_m_s8): Likewise.
16143 (veorq_m_s32): Likewise.
16144 (veorq_m_s16): Likewise.
16145 (veorq_m_u8): Likewise.
16146 (veorq_m_u32): Likewise.
16147 (veorq_m_u16): Likewise.
16148 (vhaddq_m_n_s8): Likewise.
16149 (vhaddq_m_n_s32): Likewise.
16150 (vhaddq_m_n_s16): Likewise.
16151 (vhaddq_m_n_u8): Likewise.
16152 (vhaddq_m_n_u32): Likewise.
16153 (vhaddq_m_n_u16): Likewise.
16154 (vhaddq_m_s8): Likewise.
16155 (vhaddq_m_s32): Likewise.
16156 (vhaddq_m_s16): Likewise.
16157 (vhaddq_m_u8): Likewise.
16158 (vhaddq_m_u32): Likewise.
16159 (vhaddq_m_u16): Likewise.
16160 (vhcaddq_rot270_m_s8): Likewise.
16161 (vhcaddq_rot270_m_s32): Likewise.
16162 (vhcaddq_rot270_m_s16): Likewise.
16163 (vhcaddq_rot90_m_s8): Likewise.
16164 (vhcaddq_rot90_m_s32): Likewise.
16165 (vhcaddq_rot90_m_s16): Likewise.
16166 (vhsubq_m_n_s8): Likewise.
16167 (vhsubq_m_n_s32): Likewise.
16168 (vhsubq_m_n_s16): Likewise.
16169 (vhsubq_m_n_u8): Likewise.
16170 (vhsubq_m_n_u32): Likewise.
16171 (vhsubq_m_n_u16): Likewise.
16172 (vhsubq_m_s8): Likewise.
16173 (vhsubq_m_s32): Likewise.
16174 (vhsubq_m_s16): Likewise.
16175 (vhsubq_m_u8): Likewise.
16176 (vhsubq_m_u32): Likewise.
16177 (vhsubq_m_u16): Likewise.
16178 (vmaxq_m_s8): Likewise.
16179 (vmaxq_m_s32): Likewise.
16180 (vmaxq_m_s16): Likewise.
16181 (vmaxq_m_u8): Likewise.
16182 (vmaxq_m_u32): Likewise.
16183 (vmaxq_m_u16): Likewise.
16184 (vminq_m_s8): Likewise.
16185 (vminq_m_s32): Likewise.
16186 (vminq_m_s16): Likewise.
16187 (vminq_m_u8): Likewise.
16188 (vminq_m_u32): Likewise.
16189 (vminq_m_u16): Likewise.
16190 (vmladavaq_p_s8): Likewise.
16191 (vmladavaq_p_s32): Likewise.
16192 (vmladavaq_p_s16): Likewise.
16193 (vmladavaq_p_u8): Likewise.
16194 (vmladavaq_p_u32): Likewise.
16195 (vmladavaq_p_u16): Likewise.
16196 (vmladavaxq_p_s8): Likewise.
16197 (vmladavaxq_p_s32): Likewise.
16198 (vmladavaxq_p_s16): Likewise.
16199 (vmlaq_m_n_s8): Likewise.
16200 (vmlaq_m_n_s32): Likewise.
16201 (vmlaq_m_n_s16): Likewise.
16202 (vmlaq_m_n_u8): Likewise.
16203 (vmlaq_m_n_u32): Likewise.
16204 (vmlaq_m_n_u16): Likewise.
16205 (vmlasq_m_n_s8): Likewise.
16206 (vmlasq_m_n_s32): Likewise.
16207 (vmlasq_m_n_s16): Likewise.
16208 (vmlasq_m_n_u8): Likewise.
16209 (vmlasq_m_n_u32): Likewise.
16210 (vmlasq_m_n_u16): Likewise.
16211 (vmlsdavaq_p_s8): Likewise.
16212 (vmlsdavaq_p_s32): Likewise.
16213 (vmlsdavaq_p_s16): Likewise.
16214 (vmlsdavaxq_p_s8): Likewise.
16215 (vmlsdavaxq_p_s32): Likewise.
16216 (vmlsdavaxq_p_s16): Likewise.
16217 (vmulhq_m_s8): Likewise.
16218 (vmulhq_m_s32): Likewise.
16219 (vmulhq_m_s16): Likewise.
16220 (vmulhq_m_u8): Likewise.
16221 (vmulhq_m_u32): Likewise.
16222 (vmulhq_m_u16): Likewise.
16223 (vmullbq_int_m_s8): Likewise.
16224 (vmullbq_int_m_s32): Likewise.
16225 (vmullbq_int_m_s16): Likewise.
16226 (vmullbq_int_m_u8): Likewise.
16227 (vmullbq_int_m_u32): Likewise.
16228 (vmullbq_int_m_u16): Likewise.
16229 (vmulltq_int_m_s8): Likewise.
16230 (vmulltq_int_m_s32): Likewise.
16231 (vmulltq_int_m_s16): Likewise.
16232 (vmulltq_int_m_u8): Likewise.
16233 (vmulltq_int_m_u32): Likewise.
16234 (vmulltq_int_m_u16): Likewise.
16235 (vmulq_m_n_s8): Likewise.
16236 (vmulq_m_n_s32): Likewise.
16237 (vmulq_m_n_s16): Likewise.
16238 (vmulq_m_n_u8): Likewise.
16239 (vmulq_m_n_u32): Likewise.
16240 (vmulq_m_n_u16): Likewise.
16241 (vmulq_m_s8): Likewise.
16242 (vmulq_m_s32): Likewise.
16243 (vmulq_m_s16): Likewise.
16244 (vmulq_m_u8): Likewise.
16245 (vmulq_m_u32): Likewise.
16246 (vmulq_m_u16): Likewise.
16247 (vornq_m_s8): Likewise.
16248 (vornq_m_s32): Likewise.
16249 (vornq_m_s16): Likewise.
16250 (vornq_m_u8): Likewise.
16251 (vornq_m_u32): Likewise.
16252 (vornq_m_u16): Likewise.
16253 (vorrq_m_s8): Likewise.
16254 (vorrq_m_s32): Likewise.
16255 (vorrq_m_s16): Likewise.
16256 (vorrq_m_u8): Likewise.
16257 (vorrq_m_u32): Likewise.
16258 (vorrq_m_u16): Likewise.
16259 (vqaddq_m_n_s8): Likewise.
16260 (vqaddq_m_n_s32): Likewise.
16261 (vqaddq_m_n_s16): Likewise.
16262 (vqaddq_m_n_u8): Likewise.
16263 (vqaddq_m_n_u32): Likewise.
16264 (vqaddq_m_n_u16): Likewise.
16265 (vqaddq_m_s8): Likewise.
16266 (vqaddq_m_s32): Likewise.
16267 (vqaddq_m_s16): Likewise.
16268 (vqaddq_m_u8): Likewise.
16269 (vqaddq_m_u32): Likewise.
16270 (vqaddq_m_u16): Likewise.
16271 (vqdmladhq_m_s8): Likewise.
16272 (vqdmladhq_m_s32): Likewise.
16273 (vqdmladhq_m_s16): Likewise.
16274 (vqdmladhxq_m_s8): Likewise.
16275 (vqdmladhxq_m_s32): Likewise.
16276 (vqdmladhxq_m_s16): Likewise.
16277 (vqdmlahq_m_n_s8): Likewise.
16278 (vqdmlahq_m_n_s32): Likewise.
16279 (vqdmlahq_m_n_s16): Likewise.
16280 (vqdmlahq_m_n_u8): Likewise.
16281 (vqdmlahq_m_n_u32): Likewise.
16282 (vqdmlahq_m_n_u16): Likewise.
16283 (vqdmlsdhq_m_s8): Likewise.
16284 (vqdmlsdhq_m_s32): Likewise.
16285 (vqdmlsdhq_m_s16): Likewise.
16286 (vqdmlsdhxq_m_s8): Likewise.
16287 (vqdmlsdhxq_m_s32): Likewise.
16288 (vqdmlsdhxq_m_s16): Likewise.
16289 (vqdmulhq_m_n_s8): Likewise.
16290 (vqdmulhq_m_n_s32): Likewise.
16291 (vqdmulhq_m_n_s16): Likewise.
16292 (vqdmulhq_m_s8): Likewise.
16293 (vqdmulhq_m_s32): Likewise.
16294 (vqdmulhq_m_s16): Likewise.
16295 (vqrdmladhq_m_s8): Likewise.
16296 (vqrdmladhq_m_s32): Likewise.
16297 (vqrdmladhq_m_s16): Likewise.
16298 (vqrdmladhxq_m_s8): Likewise.
16299 (vqrdmladhxq_m_s32): Likewise.
16300 (vqrdmladhxq_m_s16): Likewise.
16301 (vqrdmlahq_m_n_s8): Likewise.
16302 (vqrdmlahq_m_n_s32): Likewise.
16303 (vqrdmlahq_m_n_s16): Likewise.
16304 (vqrdmlahq_m_n_u8): Likewise.
16305 (vqrdmlahq_m_n_u32): Likewise.
16306 (vqrdmlahq_m_n_u16): Likewise.
16307 (vqrdmlashq_m_n_s8): Likewise.
16308 (vqrdmlashq_m_n_s32): Likewise.
16309 (vqrdmlashq_m_n_s16): Likewise.
16310 (vqrdmlashq_m_n_u8): Likewise.
16311 (vqrdmlashq_m_n_u32): Likewise.
16312 (vqrdmlashq_m_n_u16): Likewise.
16313 (vqrdmlsdhq_m_s8): Likewise.
16314 (vqrdmlsdhq_m_s32): Likewise.
16315 (vqrdmlsdhq_m_s16): Likewise.
16316 (vqrdmlsdhxq_m_s8): Likewise.
16317 (vqrdmlsdhxq_m_s32): Likewise.
16318 (vqrdmlsdhxq_m_s16): Likewise.
16319 (vqrdmulhq_m_n_s8): Likewise.
16320 (vqrdmulhq_m_n_s32): Likewise.
16321 (vqrdmulhq_m_n_s16): Likewise.
16322 (vqrdmulhq_m_s8): Likewise.
16323 (vqrdmulhq_m_s32): Likewise.
16324 (vqrdmulhq_m_s16): Likewise.
16325 (vqrshlq_m_s8): Likewise.
16326 (vqrshlq_m_s32): Likewise.
16327 (vqrshlq_m_s16): Likewise.
16328 (vqrshlq_m_u8): Likewise.
16329 (vqrshlq_m_u32): Likewise.
16330 (vqrshlq_m_u16): Likewise.
16331 (vqshlq_m_n_s8): Likewise.
16332 (vqshlq_m_n_s32): Likewise.
16333 (vqshlq_m_n_s16): Likewise.
16334 (vqshlq_m_n_u8): Likewise.
16335 (vqshlq_m_n_u32): Likewise.
16336 (vqshlq_m_n_u16): Likewise.
16337 (vqshlq_m_s8): Likewise.
16338 (vqshlq_m_s32): Likewise.
16339 (vqshlq_m_s16): Likewise.
16340 (vqshlq_m_u8): Likewise.
16341 (vqshlq_m_u32): Likewise.
16342 (vqshlq_m_u16): Likewise.
16343 (vqsubq_m_n_s8): Likewise.
16344 (vqsubq_m_n_s32): Likewise.
16345 (vqsubq_m_n_s16): Likewise.
16346 (vqsubq_m_n_u8): Likewise.
16347 (vqsubq_m_n_u32): Likewise.
16348 (vqsubq_m_n_u16): Likewise.
16349 (vqsubq_m_s8): Likewise.
16350 (vqsubq_m_s32): Likewise.
16351 (vqsubq_m_s16): Likewise.
16352 (vqsubq_m_u8): Likewise.
16353 (vqsubq_m_u32): Likewise.
16354 (vqsubq_m_u16): Likewise.
16355 (vrhaddq_m_s8): Likewise.
16356 (vrhaddq_m_s32): Likewise.
16357 (vrhaddq_m_s16): Likewise.
16358 (vrhaddq_m_u8): Likewise.
16359 (vrhaddq_m_u32): Likewise.
16360 (vrhaddq_m_u16): Likewise.
16361 (vrmulhq_m_s8): Likewise.
16362 (vrmulhq_m_s32): Likewise.
16363 (vrmulhq_m_s16): Likewise.
16364 (vrmulhq_m_u8): Likewise.
16365 (vrmulhq_m_u32): Likewise.
16366 (vrmulhq_m_u16): Likewise.
16367 (vrshlq_m_s8): Likewise.
16368 (vrshlq_m_s32): Likewise.
16369 (vrshlq_m_s16): Likewise.
16370 (vrshlq_m_u8): Likewise.
16371 (vrshlq_m_u32): Likewise.
16372 (vrshlq_m_u16): Likewise.
16373 (vrshrq_m_n_s8): Likewise.
16374 (vrshrq_m_n_s32): Likewise.
16375 (vrshrq_m_n_s16): Likewise.
16376 (vrshrq_m_n_u8): Likewise.
16377 (vrshrq_m_n_u32): Likewise.
16378 (vrshrq_m_n_u16): Likewise.
16379 (vshlq_m_n_s8): Likewise.
16380 (vshlq_m_n_s32): Likewise.
16381 (vshlq_m_n_s16): Likewise.
16382 (vshlq_m_n_u8): Likewise.
16383 (vshlq_m_n_u32): Likewise.
16384 (vshlq_m_n_u16): Likewise.
16385 (vshrq_m_n_s8): Likewise.
16386 (vshrq_m_n_s32): Likewise.
16387 (vshrq_m_n_s16): Likewise.
16388 (vshrq_m_n_u8): Likewise.
16389 (vshrq_m_n_u32): Likewise.
16390 (vshrq_m_n_u16): Likewise.
16391 (vsliq_m_n_s8): Likewise.
16392 (vsliq_m_n_s32): Likewise.
16393 (vsliq_m_n_s16): Likewise.
16394 (vsliq_m_n_u8): Likewise.
16395 (vsliq_m_n_u32): Likewise.
16396 (vsliq_m_n_u16): Likewise.
16397 (vsubq_m_n_s8): Likewise.
16398 (vsubq_m_n_s32): Likewise.
16399 (vsubq_m_n_s16): Likewise.
16400 (vsubq_m_n_u8): Likewise.
16401 (vsubq_m_n_u32): Likewise.
16402 (vsubq_m_n_u16): Likewise.
16403 (__arm_vabdq_m_s8): Define intrinsic.
16404 (__arm_vabdq_m_s32): Likewise.
16405 (__arm_vabdq_m_s16): Likewise.
16406 (__arm_vabdq_m_u8): Likewise.
16407 (__arm_vabdq_m_u32): Likewise.
16408 (__arm_vabdq_m_u16): Likewise.
16409 (__arm_vaddq_m_n_s8): Likewise.
16410 (__arm_vaddq_m_n_s32): Likewise.
16411 (__arm_vaddq_m_n_s16): Likewise.
16412 (__arm_vaddq_m_n_u8): Likewise.
16413 (__arm_vaddq_m_n_u32): Likewise.
16414 (__arm_vaddq_m_n_u16): Likewise.
16415 (__arm_vaddq_m_s8): Likewise.
16416 (__arm_vaddq_m_s32): Likewise.
16417 (__arm_vaddq_m_s16): Likewise.
16418 (__arm_vaddq_m_u8): Likewise.
16419 (__arm_vaddq_m_u32): Likewise.
16420 (__arm_vaddq_m_u16): Likewise.
16421 (__arm_vandq_m_s8): Likewise.
16422 (__arm_vandq_m_s32): Likewise.
16423 (__arm_vandq_m_s16): Likewise.
16424 (__arm_vandq_m_u8): Likewise.
16425 (__arm_vandq_m_u32): Likewise.
16426 (__arm_vandq_m_u16): Likewise.
16427 (__arm_vbicq_m_s8): Likewise.
16428 (__arm_vbicq_m_s32): Likewise.
16429 (__arm_vbicq_m_s16): Likewise.
16430 (__arm_vbicq_m_u8): Likewise.
16431 (__arm_vbicq_m_u32): Likewise.
16432 (__arm_vbicq_m_u16): Likewise.
16433 (__arm_vbrsrq_m_n_s8): Likewise.
16434 (__arm_vbrsrq_m_n_s32): Likewise.
16435 (__arm_vbrsrq_m_n_s16): Likewise.
16436 (__arm_vbrsrq_m_n_u8): Likewise.
16437 (__arm_vbrsrq_m_n_u32): Likewise.
16438 (__arm_vbrsrq_m_n_u16): Likewise.
16439 (__arm_vcaddq_rot270_m_s8): Likewise.
16440 (__arm_vcaddq_rot270_m_s32): Likewise.
16441 (__arm_vcaddq_rot270_m_s16): Likewise.
16442 (__arm_vcaddq_rot270_m_u8): Likewise.
16443 (__arm_vcaddq_rot270_m_u32): Likewise.
16444 (__arm_vcaddq_rot270_m_u16): Likewise.
16445 (__arm_vcaddq_rot90_m_s8): Likewise.
16446 (__arm_vcaddq_rot90_m_s32): Likewise.
16447 (__arm_vcaddq_rot90_m_s16): Likewise.
16448 (__arm_vcaddq_rot90_m_u8): Likewise.
16449 (__arm_vcaddq_rot90_m_u32): Likewise.
16450 (__arm_vcaddq_rot90_m_u16): Likewise.
16451 (__arm_veorq_m_s8): Likewise.
16452 (__arm_veorq_m_s32): Likewise.
16453 (__arm_veorq_m_s16): Likewise.
16454 (__arm_veorq_m_u8): Likewise.
16455 (__arm_veorq_m_u32): Likewise.
16456 (__arm_veorq_m_u16): Likewise.
16457 (__arm_vhaddq_m_n_s8): Likewise.
16458 (__arm_vhaddq_m_n_s32): Likewise.
16459 (__arm_vhaddq_m_n_s16): Likewise.
16460 (__arm_vhaddq_m_n_u8): Likewise.
16461 (__arm_vhaddq_m_n_u32): Likewise.
16462 (__arm_vhaddq_m_n_u16): Likewise.
16463 (__arm_vhaddq_m_s8): Likewise.
16464 (__arm_vhaddq_m_s32): Likewise.
16465 (__arm_vhaddq_m_s16): Likewise.
16466 (__arm_vhaddq_m_u8): Likewise.
16467 (__arm_vhaddq_m_u32): Likewise.
16468 (__arm_vhaddq_m_u16): Likewise.
16469 (__arm_vhcaddq_rot270_m_s8): Likewise.
16470 (__arm_vhcaddq_rot270_m_s32): Likewise.
16471 (__arm_vhcaddq_rot270_m_s16): Likewise.
16472 (__arm_vhcaddq_rot90_m_s8): Likewise.
16473 (__arm_vhcaddq_rot90_m_s32): Likewise.
16474 (__arm_vhcaddq_rot90_m_s16): Likewise.
16475 (__arm_vhsubq_m_n_s8): Likewise.
16476 (__arm_vhsubq_m_n_s32): Likewise.
16477 (__arm_vhsubq_m_n_s16): Likewise.
16478 (__arm_vhsubq_m_n_u8): Likewise.
16479 (__arm_vhsubq_m_n_u32): Likewise.
16480 (__arm_vhsubq_m_n_u16): Likewise.
16481 (__arm_vhsubq_m_s8): Likewise.
16482 (__arm_vhsubq_m_s32): Likewise.
16483 (__arm_vhsubq_m_s16): Likewise.
16484 (__arm_vhsubq_m_u8): Likewise.
16485 (__arm_vhsubq_m_u32): Likewise.
16486 (__arm_vhsubq_m_u16): Likewise.
16487 (__arm_vmaxq_m_s8): Likewise.
16488 (__arm_vmaxq_m_s32): Likewise.
16489 (__arm_vmaxq_m_s16): Likewise.
16490 (__arm_vmaxq_m_u8): Likewise.
16491 (__arm_vmaxq_m_u32): Likewise.
16492 (__arm_vmaxq_m_u16): Likewise.
16493 (__arm_vminq_m_s8): Likewise.
16494 (__arm_vminq_m_s32): Likewise.
16495 (__arm_vminq_m_s16): Likewise.
16496 (__arm_vminq_m_u8): Likewise.
16497 (__arm_vminq_m_u32): Likewise.
16498 (__arm_vminq_m_u16): Likewise.
16499 (__arm_vmladavaq_p_s8): Likewise.
16500 (__arm_vmladavaq_p_s32): Likewise.
16501 (__arm_vmladavaq_p_s16): Likewise.
16502 (__arm_vmladavaq_p_u8): Likewise.
16503 (__arm_vmladavaq_p_u32): Likewise.
16504 (__arm_vmladavaq_p_u16): Likewise.
16505 (__arm_vmladavaxq_p_s8): Likewise.
16506 (__arm_vmladavaxq_p_s32): Likewise.
16507 (__arm_vmladavaxq_p_s16): Likewise.
16508 (__arm_vmlaq_m_n_s8): Likewise.
16509 (__arm_vmlaq_m_n_s32): Likewise.
16510 (__arm_vmlaq_m_n_s16): Likewise.
16511 (__arm_vmlaq_m_n_u8): Likewise.
16512 (__arm_vmlaq_m_n_u32): Likewise.
16513 (__arm_vmlaq_m_n_u16): Likewise.
16514 (__arm_vmlasq_m_n_s8): Likewise.
16515 (__arm_vmlasq_m_n_s32): Likewise.
16516 (__arm_vmlasq_m_n_s16): Likewise.
16517 (__arm_vmlasq_m_n_u8): Likewise.
16518 (__arm_vmlasq_m_n_u32): Likewise.
16519 (__arm_vmlasq_m_n_u16): Likewise.
16520 (__arm_vmlsdavaq_p_s8): Likewise.
16521 (__arm_vmlsdavaq_p_s32): Likewise.
16522 (__arm_vmlsdavaq_p_s16): Likewise.
16523 (__arm_vmlsdavaxq_p_s8): Likewise.
16524 (__arm_vmlsdavaxq_p_s32): Likewise.
16525 (__arm_vmlsdavaxq_p_s16): Likewise.
16526 (__arm_vmulhq_m_s8): Likewise.
16527 (__arm_vmulhq_m_s32): Likewise.
16528 (__arm_vmulhq_m_s16): Likewise.
16529 (__arm_vmulhq_m_u8): Likewise.
16530 (__arm_vmulhq_m_u32): Likewise.
16531 (__arm_vmulhq_m_u16): Likewise.
16532 (__arm_vmullbq_int_m_s8): Likewise.
16533 (__arm_vmullbq_int_m_s32): Likewise.
16534 (__arm_vmullbq_int_m_s16): Likewise.
16535 (__arm_vmullbq_int_m_u8): Likewise.
16536 (__arm_vmullbq_int_m_u32): Likewise.
16537 (__arm_vmullbq_int_m_u16): Likewise.
16538 (__arm_vmulltq_int_m_s8): Likewise.
16539 (__arm_vmulltq_int_m_s32): Likewise.
16540 (__arm_vmulltq_int_m_s16): Likewise.
16541 (__arm_vmulltq_int_m_u8): Likewise.
16542 (__arm_vmulltq_int_m_u32): Likewise.
16543 (__arm_vmulltq_int_m_u16): Likewise.
16544 (__arm_vmulq_m_n_s8): Likewise.
16545 (__arm_vmulq_m_n_s32): Likewise.
16546 (__arm_vmulq_m_n_s16): Likewise.
16547 (__arm_vmulq_m_n_u8): Likewise.
16548 (__arm_vmulq_m_n_u32): Likewise.
16549 (__arm_vmulq_m_n_u16): Likewise.
16550 (__arm_vmulq_m_s8): Likewise.
16551 (__arm_vmulq_m_s32): Likewise.
16552 (__arm_vmulq_m_s16): Likewise.
16553 (__arm_vmulq_m_u8): Likewise.
16554 (__arm_vmulq_m_u32): Likewise.
16555 (__arm_vmulq_m_u16): Likewise.
16556 (__arm_vornq_m_s8): Likewise.
16557 (__arm_vornq_m_s32): Likewise.
16558 (__arm_vornq_m_s16): Likewise.
16559 (__arm_vornq_m_u8): Likewise.
16560 (__arm_vornq_m_u32): Likewise.
16561 (__arm_vornq_m_u16): Likewise.
16562 (__arm_vorrq_m_s8): Likewise.
16563 (__arm_vorrq_m_s32): Likewise.
16564 (__arm_vorrq_m_s16): Likewise.
16565 (__arm_vorrq_m_u8): Likewise.
16566 (__arm_vorrq_m_u32): Likewise.
16567 (__arm_vorrq_m_u16): Likewise.
16568 (__arm_vqaddq_m_n_s8): Likewise.
16569 (__arm_vqaddq_m_n_s32): Likewise.
16570 (__arm_vqaddq_m_n_s16): Likewise.
16571 (__arm_vqaddq_m_n_u8): Likewise.
16572 (__arm_vqaddq_m_n_u32): Likewise.
16573 (__arm_vqaddq_m_n_u16): Likewise.
16574 (__arm_vqaddq_m_s8): Likewise.
16575 (__arm_vqaddq_m_s32): Likewise.
16576 (__arm_vqaddq_m_s16): Likewise.
16577 (__arm_vqaddq_m_u8): Likewise.
16578 (__arm_vqaddq_m_u32): Likewise.
16579 (__arm_vqaddq_m_u16): Likewise.
16580 (__arm_vqdmladhq_m_s8): Likewise.
16581 (__arm_vqdmladhq_m_s32): Likewise.
16582 (__arm_vqdmladhq_m_s16): Likewise.
16583 (__arm_vqdmladhxq_m_s8): Likewise.
16584 (__arm_vqdmladhxq_m_s32): Likewise.
16585 (__arm_vqdmladhxq_m_s16): Likewise.
16586 (__arm_vqdmlahq_m_n_s8): Likewise.
16587 (__arm_vqdmlahq_m_n_s32): Likewise.
16588 (__arm_vqdmlahq_m_n_s16): Likewise.
16589 (__arm_vqdmlahq_m_n_u8): Likewise.
16590 (__arm_vqdmlahq_m_n_u32): Likewise.
16591 (__arm_vqdmlahq_m_n_u16): Likewise.
16592 (__arm_vqdmlsdhq_m_s8): Likewise.
16593 (__arm_vqdmlsdhq_m_s32): Likewise.
16594 (__arm_vqdmlsdhq_m_s16): Likewise.
16595 (__arm_vqdmlsdhxq_m_s8): Likewise.
16596 (__arm_vqdmlsdhxq_m_s32): Likewise.
16597 (__arm_vqdmlsdhxq_m_s16): Likewise.
16598 (__arm_vqdmulhq_m_n_s8): Likewise.
16599 (__arm_vqdmulhq_m_n_s32): Likewise.
16600 (__arm_vqdmulhq_m_n_s16): Likewise.
16601 (__arm_vqdmulhq_m_s8): Likewise.
16602 (__arm_vqdmulhq_m_s32): Likewise.
16603 (__arm_vqdmulhq_m_s16): Likewise.
16604 (__arm_vqrdmladhq_m_s8): Likewise.
16605 (__arm_vqrdmladhq_m_s32): Likewise.
16606 (__arm_vqrdmladhq_m_s16): Likewise.
16607 (__arm_vqrdmladhxq_m_s8): Likewise.
16608 (__arm_vqrdmladhxq_m_s32): Likewise.
16609 (__arm_vqrdmladhxq_m_s16): Likewise.
16610 (__arm_vqrdmlahq_m_n_s8): Likewise.
16611 (__arm_vqrdmlahq_m_n_s32): Likewise.
16612 (__arm_vqrdmlahq_m_n_s16): Likewise.
16613 (__arm_vqrdmlahq_m_n_u8): Likewise.
16614 (__arm_vqrdmlahq_m_n_u32): Likewise.
16615 (__arm_vqrdmlahq_m_n_u16): Likewise.
16616 (__arm_vqrdmlashq_m_n_s8): Likewise.
16617 (__arm_vqrdmlashq_m_n_s32): Likewise.
16618 (__arm_vqrdmlashq_m_n_s16): Likewise.
16619 (__arm_vqrdmlashq_m_n_u8): Likewise.
16620 (__arm_vqrdmlashq_m_n_u32): Likewise.
16621 (__arm_vqrdmlashq_m_n_u16): Likewise.
16622 (__arm_vqrdmlsdhq_m_s8): Likewise.
16623 (__arm_vqrdmlsdhq_m_s32): Likewise.
16624 (__arm_vqrdmlsdhq_m_s16): Likewise.
16625 (__arm_vqrdmlsdhxq_m_s8): Likewise.
16626 (__arm_vqrdmlsdhxq_m_s32): Likewise.
16627 (__arm_vqrdmlsdhxq_m_s16): Likewise.
16628 (__arm_vqrdmulhq_m_n_s8): Likewise.
16629 (__arm_vqrdmulhq_m_n_s32): Likewise.
16630 (__arm_vqrdmulhq_m_n_s16): Likewise.
16631 (__arm_vqrdmulhq_m_s8): Likewise.
16632 (__arm_vqrdmulhq_m_s32): Likewise.
16633 (__arm_vqrdmulhq_m_s16): Likewise.
16634 (__arm_vqrshlq_m_s8): Likewise.
16635 (__arm_vqrshlq_m_s32): Likewise.
16636 (__arm_vqrshlq_m_s16): Likewise.
16637 (__arm_vqrshlq_m_u8): Likewise.
16638 (__arm_vqrshlq_m_u32): Likewise.
16639 (__arm_vqrshlq_m_u16): Likewise.
16640 (__arm_vqshlq_m_n_s8): Likewise.
16641 (__arm_vqshlq_m_n_s32): Likewise.
16642 (__arm_vqshlq_m_n_s16): Likewise.
16643 (__arm_vqshlq_m_n_u8): Likewise.
16644 (__arm_vqshlq_m_n_u32): Likewise.
16645 (__arm_vqshlq_m_n_u16): Likewise.
16646 (__arm_vqshlq_m_s8): Likewise.
16647 (__arm_vqshlq_m_s32): Likewise.
16648 (__arm_vqshlq_m_s16): Likewise.
16649 (__arm_vqshlq_m_u8): Likewise.
16650 (__arm_vqshlq_m_u32): Likewise.
16651 (__arm_vqshlq_m_u16): Likewise.
16652 (__arm_vqsubq_m_n_s8): Likewise.
16653 (__arm_vqsubq_m_n_s32): Likewise.
16654 (__arm_vqsubq_m_n_s16): Likewise.
16655 (__arm_vqsubq_m_n_u8): Likewise.
16656 (__arm_vqsubq_m_n_u32): Likewise.
16657 (__arm_vqsubq_m_n_u16): Likewise.
16658 (__arm_vqsubq_m_s8): Likewise.
16659 (__arm_vqsubq_m_s32): Likewise.
16660 (__arm_vqsubq_m_s16): Likewise.
16661 (__arm_vqsubq_m_u8): Likewise.
16662 (__arm_vqsubq_m_u32): Likewise.
16663 (__arm_vqsubq_m_u16): Likewise.
16664 (__arm_vrhaddq_m_s8): Likewise.
16665 (__arm_vrhaddq_m_s32): Likewise.
16666 (__arm_vrhaddq_m_s16): Likewise.
16667 (__arm_vrhaddq_m_u8): Likewise.
16668 (__arm_vrhaddq_m_u32): Likewise.
16669 (__arm_vrhaddq_m_u16): Likewise.
16670 (__arm_vrmulhq_m_s8): Likewise.
16671 (__arm_vrmulhq_m_s32): Likewise.
16672 (__arm_vrmulhq_m_s16): Likewise.
16673 (__arm_vrmulhq_m_u8): Likewise.
16674 (__arm_vrmulhq_m_u32): Likewise.
16675 (__arm_vrmulhq_m_u16): Likewise.
16676 (__arm_vrshlq_m_s8): Likewise.
16677 (__arm_vrshlq_m_s32): Likewise.
16678 (__arm_vrshlq_m_s16): Likewise.
16679 (__arm_vrshlq_m_u8): Likewise.
16680 (__arm_vrshlq_m_u32): Likewise.
16681 (__arm_vrshlq_m_u16): Likewise.
16682 (__arm_vrshrq_m_n_s8): Likewise.
16683 (__arm_vrshrq_m_n_s32): Likewise.
16684 (__arm_vrshrq_m_n_s16): Likewise.
16685 (__arm_vrshrq_m_n_u8): Likewise.
16686 (__arm_vrshrq_m_n_u32): Likewise.
16687 (__arm_vrshrq_m_n_u16): Likewise.
16688 (__arm_vshlq_m_n_s8): Likewise.
16689 (__arm_vshlq_m_n_s32): Likewise.
16690 (__arm_vshlq_m_n_s16): Likewise.
16691 (__arm_vshlq_m_n_u8): Likewise.
16692 (__arm_vshlq_m_n_u32): Likewise.
16693 (__arm_vshlq_m_n_u16): Likewise.
16694 (__arm_vshrq_m_n_s8): Likewise.
16695 (__arm_vshrq_m_n_s32): Likewise.
16696 (__arm_vshrq_m_n_s16): Likewise.
16697 (__arm_vshrq_m_n_u8): Likewise.
16698 (__arm_vshrq_m_n_u32): Likewise.
16699 (__arm_vshrq_m_n_u16): Likewise.
16700 (__arm_vsliq_m_n_s8): Likewise.
16701 (__arm_vsliq_m_n_s32): Likewise.
16702 (__arm_vsliq_m_n_s16): Likewise.
16703 (__arm_vsliq_m_n_u8): Likewise.
16704 (__arm_vsliq_m_n_u32): Likewise.
16705 (__arm_vsliq_m_n_u16): Likewise.
16706 (__arm_vsubq_m_n_s8): Likewise.
16707 (__arm_vsubq_m_n_s32): Likewise.
16708 (__arm_vsubq_m_n_s16): Likewise.
16709 (__arm_vsubq_m_n_u8): Likewise.
16710 (__arm_vsubq_m_n_u32): Likewise.
16711 (__arm_vsubq_m_n_u16): Likewise.
16712 (vqdmladhq_m): Define polymorphic variant.
16713 (vqdmladhxq_m): Likewise.
16714 (vqdmlsdhq_m): Likewise.
16715 (vqdmlsdhxq_m): Likewise.
16716 (vabdq_m): Likewise.
16717 (vandq_m): Likewise.
16718 (vbicq_m): Likewise.
16719 (vbrsrq_m_n): Likewise.
16720 (vcaddq_rot270_m): Likewise.
16721 (vcaddq_rot90_m): Likewise.
16722 (veorq_m): Likewise.
16723 (vmaxq_m): Likewise.
16724 (vminq_m): Likewise.
16725 (vmladavaq_p): Likewise.
16726 (vmlaq_m_n): Likewise.
16727 (vmlasq_m_n): Likewise.
16728 (vmulhq_m): Likewise.
16729 (vmullbq_int_m): Likewise.
16730 (vmulltq_int_m): Likewise.
16731 (vornq_m): Likewise.
16732 (vorrq_m): Likewise.
16733 (vqdmlahq_m_n): Likewise.
16734 (vqrdmlahq_m_n): Likewise.
16735 (vqrdmlashq_m_n): Likewise.
16736 (vqrshlq_m): Likewise.
16737 (vqshlq_m_n): Likewise.
16738 (vqshlq_m): Likewise.
16739 (vrhaddq_m): Likewise.
16740 (vrmulhq_m): Likewise.
16741 (vrshlq_m): Likewise.
16742 (vrshrq_m_n): Likewise.
16743 (vshlq_m_n): Likewise.
16744 (vshrq_m_n): Likewise.
16745 (vsliq_m): Likewise.
16746 (vaddq_m_n): Likewise.
16747 (vaddq_m): Likewise.
16748 (vhaddq_m_n): Likewise.
16749 (vhaddq_m): Likewise.
16750 (vhcaddq_rot270_m): Likewise.
16751 (vhcaddq_rot90_m): Likewise.
16752 (vhsubq_m): Likewise.
16753 (vhsubq_m_n): Likewise.
16754 (vmulq_m_n): Likewise.
16755 (vmulq_m): Likewise.
16756 (vqaddq_m_n): Likewise.
16757 (vqaddq_m): Likewise.
16758 (vqdmulhq_m_n): Likewise.
16759 (vqdmulhq_m): Likewise.
16760 (vsubq_m_n): Likewise.
16761 (vsliq_m_n): Likewise.
16762 (vqsubq_m_n): Likewise.
16763 (vqsubq_m): Likewise.
16764 (vqrdmulhq_m): Likewise.
16765 (vqrdmulhq_m_n): Likewise.
16766 (vqrdmlsdhxq_m): Likewise.
16767 (vqrdmlsdhq_m): Likewise.
16768 (vqrdmladhq_m): Likewise.
16769 (vqrdmladhxq_m): Likewise.
16770 (vmlsdavaxq_p): Likewise.
16771 (vmlsdavaq_p): Likewise.
16772 (vmladavaxq_p): Likewise.
16773 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
16775 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
16776 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
16777 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
16778 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
16779 * config/arm/mve.md (VHSUBQ_M): Define iterators.
16780 (VSLIQ_M_N): Likewise.
16781 (VQRDMLAHQ_M_N): Likewise.
16782 (VRSHLQ_M): Likewise.
16783 (VMINQ_M): Likewise.
16784 (VMULLBQ_INT_M): Likewise.
16785 (VMULHQ_M): Likewise.
16786 (VMULQ_M): Likewise.
16787 (VHSUBQ_M_N): Likewise.
16788 (VHADDQ_M_N): Likewise.
16789 (VORRQ_M): Likewise.
16790 (VRMULHQ_M): Likewise.
16791 (VQADDQ_M): Likewise.
16792 (VRSHRQ_M_N): Likewise.
16793 (VQSUBQ_M_N): Likewise.
16794 (VADDQ_M): Likewise.
16795 (VORNQ_M): Likewise.
16796 (VQDMLAHQ_M_N): Likewise.
16797 (VRHADDQ_M): Likewise.
16798 (VQSHLQ_M): Likewise.
16799 (VANDQ_M): Likewise.
16800 (VBICQ_M): Likewise.
16801 (VSHLQ_M_N): Likewise.
16802 (VCADDQ_ROT270_M): Likewise.
16803 (VQRSHLQ_M): Likewise.
16804 (VQADDQ_M_N): Likewise.
16805 (VADDQ_M_N): Likewise.
16806 (VMAXQ_M): Likewise.
16807 (VQSUBQ_M): Likewise.
16808 (VMLASQ_M_N): Likewise.
16809 (VMLADAVAQ_P): Likewise.
16810 (VBRSRQ_M_N): Likewise.
16811 (VMULQ_M_N): Likewise.
16812 (VCADDQ_ROT90_M): Likewise.
16813 (VMULLTQ_INT_M): Likewise.
16814 (VEORQ_M): Likewise.
16815 (VSHRQ_M_N): Likewise.
16816 (VSUBQ_M_N): Likewise.
16817 (VHADDQ_M): Likewise.
16818 (VABDQ_M): Likewise.
16819 (VQRDMLASHQ_M_N): Likewise.
16820 (VMLAQ_M_N): Likewise.
16821 (VQSHLQ_M_N): Likewise.
16822 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
16823 (mve_vaddq_m_n_<supf><mode>): Likewise.
16824 (mve_vaddq_m_<supf><mode>): Likewise.
16825 (mve_vandq_m_<supf><mode>): Likewise.
16826 (mve_vbicq_m_<supf><mode>): Likewise.
16827 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
16828 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
16829 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
16830 (mve_veorq_m_<supf><mode>): Likewise.
16831 (mve_vhaddq_m_n_<supf><mode>): Likewise.
16832 (mve_vhaddq_m_<supf><mode>): Likewise.
16833 (mve_vhsubq_m_n_<supf><mode>): Likewise.
16834 (mve_vhsubq_m_<supf><mode>): Likewise.
16835 (mve_vmaxq_m_<supf><mode>): Likewise.
16836 (mve_vminq_m_<supf><mode>): Likewise.
16837 (mve_vmladavaq_p_<supf><mode>): Likewise.
16838 (mve_vmlaq_m_n_<supf><mode>): Likewise.
16839 (mve_vmlasq_m_n_<supf><mode>): Likewise.
16840 (mve_vmulhq_m_<supf><mode>): Likewise.
16841 (mve_vmullbq_int_m_<supf><mode>): Likewise.
16842 (mve_vmulltq_int_m_<supf><mode>): Likewise.
16843 (mve_vmulq_m_n_<supf><mode>): Likewise.
16844 (mve_vmulq_m_<supf><mode>): Likewise.
16845 (mve_vornq_m_<supf><mode>): Likewise.
16846 (mve_vorrq_m_<supf><mode>): Likewise.
16847 (mve_vqaddq_m_n_<supf><mode>): Likewise.
16848 (mve_vqaddq_m_<supf><mode>): Likewise.
16849 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
16850 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
16851 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
16852 (mve_vqrshlq_m_<supf><mode>): Likewise.
16853 (mve_vqshlq_m_n_<supf><mode>): Likewise.
16854 (mve_vqshlq_m_<supf><mode>): Likewise.
16855 (mve_vqsubq_m_n_<supf><mode>): Likewise.
16856 (mve_vqsubq_m_<supf><mode>): Likewise.
16857 (mve_vrhaddq_m_<supf><mode>): Likewise.
16858 (mve_vrmulhq_m_<supf><mode>): Likewise.
16859 (mve_vrshlq_m_<supf><mode>): Likewise.
16860 (mve_vrshrq_m_n_<supf><mode>): Likewise.
16861 (mve_vshlq_m_n_<supf><mode>): Likewise.
16862 (mve_vshrq_m_n_<supf><mode>): Likewise.
16863 (mve_vsliq_m_n_<supf><mode>): Likewise.
16864 (mve_vsubq_m_n_<supf><mode>): Likewise.
16865 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
16866 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
16867 (mve_vmladavaxq_p_s<mode>): Likewise.
16868 (mve_vmlsdavaq_p_s<mode>): Likewise.
16869 (mve_vmlsdavaxq_p_s<mode>): Likewise.
16870 (mve_vqdmladhq_m_s<mode>): Likewise.
16871 (mve_vqdmladhxq_m_s<mode>): Likewise.
16872 (mve_vqdmlsdhq_m_s<mode>): Likewise.
16873 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
16874 (mve_vqdmulhq_m_n_s<mode>): Likewise.
16875 (mve_vqdmulhq_m_s<mode>): Likewise.
16876 (mve_vqrdmladhq_m_s<mode>): Likewise.
16877 (mve_vqrdmladhxq_m_s<mode>): Likewise.
16878 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
16879 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
16880 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
16881 (mve_vqrdmulhq_m_s<mode>): Likewise.
16883 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16884 Mihail Ionescu <mihail.ionescu@arm.com>
16885 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16887 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
16888 Define builtin qualifier.
16889 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16890 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16891 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16892 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16893 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16894 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16895 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16896 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
16897 (vsubq_m_s8): Likewise.
16898 (vcvtq_m_n_f16_u16): Likewise.
16899 (vqshluq_m_n_s8): Likewise.
16900 (vabavq_p_s8): Likewise.
16901 (vsriq_m_n_u8): Likewise.
16902 (vshlq_m_u8): Likewise.
16903 (vsubq_m_u8): Likewise.
16904 (vabavq_p_u8): Likewise.
16905 (vshlq_m_s8): Likewise.
16906 (vcvtq_m_n_f16_s16): Likewise.
16907 (vsriq_m_n_s16): Likewise.
16908 (vsubq_m_s16): Likewise.
16909 (vcvtq_m_n_f32_u32): Likewise.
16910 (vqshluq_m_n_s16): Likewise.
16911 (vabavq_p_s16): Likewise.
16912 (vsriq_m_n_u16): Likewise.
16913 (vshlq_m_u16): Likewise.
16914 (vsubq_m_u16): Likewise.
16915 (vabavq_p_u16): Likewise.
16916 (vshlq_m_s16): Likewise.
16917 (vcvtq_m_n_f32_s32): Likewise.
16918 (vsriq_m_n_s32): Likewise.
16919 (vsubq_m_s32): Likewise.
16920 (vqshluq_m_n_s32): Likewise.
16921 (vabavq_p_s32): Likewise.
16922 (vsriq_m_n_u32): Likewise.
16923 (vshlq_m_u32): Likewise.
16924 (vsubq_m_u32): Likewise.
16925 (vabavq_p_u32): Likewise.
16926 (vshlq_m_s32): Likewise.
16927 (__arm_vsriq_m_n_s8): Define intrinsic.
16928 (__arm_vsubq_m_s8): Likewise.
16929 (__arm_vqshluq_m_n_s8): Likewise.
16930 (__arm_vabavq_p_s8): Likewise.
16931 (__arm_vsriq_m_n_u8): Likewise.
16932 (__arm_vshlq_m_u8): Likewise.
16933 (__arm_vsubq_m_u8): Likewise.
16934 (__arm_vabavq_p_u8): Likewise.
16935 (__arm_vshlq_m_s8): Likewise.
16936 (__arm_vsriq_m_n_s16): Likewise.
16937 (__arm_vsubq_m_s16): Likewise.
16938 (__arm_vqshluq_m_n_s16): Likewise.
16939 (__arm_vabavq_p_s16): Likewise.
16940 (__arm_vsriq_m_n_u16): Likewise.
16941 (__arm_vshlq_m_u16): Likewise.
16942 (__arm_vsubq_m_u16): Likewise.
16943 (__arm_vabavq_p_u16): Likewise.
16944 (__arm_vshlq_m_s16): Likewise.
16945 (__arm_vsriq_m_n_s32): Likewise.
16946 (__arm_vsubq_m_s32): Likewise.
16947 (__arm_vqshluq_m_n_s32): Likewise.
16948 (__arm_vabavq_p_s32): Likewise.
16949 (__arm_vsriq_m_n_u32): Likewise.
16950 (__arm_vshlq_m_u32): Likewise.
16951 (__arm_vsubq_m_u32): Likewise.
16952 (__arm_vabavq_p_u32): Likewise.
16953 (__arm_vshlq_m_s32): Likewise.
16954 (__arm_vcvtq_m_n_f16_u16): Likewise.
16955 (__arm_vcvtq_m_n_f16_s16): Likewise.
16956 (__arm_vcvtq_m_n_f32_u32): Likewise.
16957 (__arm_vcvtq_m_n_f32_s32): Likewise.
16958 (vcvtq_m_n): Define polymorphic variant.
16959 (vqshluq_m_n): Likewise.
16960 (vshlq_m): Likewise.
16961 (vsriq_m_n): Likewise.
16962 (vsubq_m): Likewise.
16963 (vabavq_p): Likewise.
16964 * config/arm/arm_mve_builtins.def
16965 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
16966 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16967 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16968 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16969 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16970 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16971 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16972 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16973 * config/arm/mve.md (VABAVQ_P): Define iterator.
16974 (VSHLQ_M): Likewise.
16975 (VSRIQ_M_N): Likewise.
16976 (VSUBQ_M): Likewise.
16977 (VCVTQ_M_N_TO_F): Likewise.
16978 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
16979 (mve_vqshluq_m_n_s<mode>): Likewise.
16980 (mve_vshlq_m_<supf><mode>): Likewise.
16981 (mve_vsriq_m_n_<supf><mode>): Likewise.
16982 (mve_vsubq_m_<supf><mode>): Likewise.
16983 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
16985 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16986 Mihail Ionescu <mihail.ionescu@arm.com>
16987 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16989 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
16990 (vrmlsldavhaq_s32): Likewise.
16991 (vrmlsldavhaxq_s32): Likewise.
16992 (vaddlvaq_p_s32): Likewise.
16993 (vcvtbq_m_f16_f32): Likewise.
16994 (vcvtbq_m_f32_f16): Likewise.
16995 (vcvttq_m_f16_f32): Likewise.
16996 (vcvttq_m_f32_f16): Likewise.
16997 (vrev16q_m_s8): Likewise.
16998 (vrev32q_m_f16): Likewise.
16999 (vrmlaldavhq_p_s32): Likewise.
17000 (vrmlaldavhxq_p_s32): Likewise.
17001 (vrmlsldavhq_p_s32): Likewise.
17002 (vrmlsldavhxq_p_s32): Likewise.
17003 (vaddlvaq_p_u32): Likewise.
17004 (vrev16q_m_u8): Likewise.
17005 (vrmlaldavhq_p_u32): Likewise.
17006 (vmvnq_m_n_s16): Likewise.
17007 (vorrq_m_n_s16): Likewise.
17008 (vqrshrntq_n_s16): Likewise.
17009 (vqshrnbq_n_s16): Likewise.
17010 (vqshrntq_n_s16): Likewise.
17011 (vrshrnbq_n_s16): Likewise.
17012 (vrshrntq_n_s16): Likewise.
17013 (vshrnbq_n_s16): Likewise.
17014 (vshrntq_n_s16): Likewise.
17015 (vcmlaq_f16): Likewise.
17016 (vcmlaq_rot180_f16): Likewise.
17017 (vcmlaq_rot270_f16): Likewise.
17018 (vcmlaq_rot90_f16): Likewise.
17019 (vfmaq_f16): Likewise.
17020 (vfmaq_n_f16): Likewise.
17021 (vfmasq_n_f16): Likewise.
17022 (vfmsq_f16): Likewise.
17023 (vmlaldavaq_s16): Likewise.
17024 (vmlaldavaxq_s16): Likewise.
17025 (vmlsldavaq_s16): Likewise.
17026 (vmlsldavaxq_s16): Likewise.
17027 (vabsq_m_f16): Likewise.
17028 (vcvtmq_m_s16_f16): Likewise.
17029 (vcvtnq_m_s16_f16): Likewise.
17030 (vcvtpq_m_s16_f16): Likewise.
17031 (vcvtq_m_s16_f16): Likewise.
17032 (vdupq_m_n_f16): Likewise.
17033 (vmaxnmaq_m_f16): Likewise.
17034 (vmaxnmavq_p_f16): Likewise.
17035 (vmaxnmvq_p_f16): Likewise.
17036 (vminnmaq_m_f16): Likewise.
17037 (vminnmavq_p_f16): Likewise.
17038 (vminnmvq_p_f16): Likewise.
17039 (vmlaldavq_p_s16): Likewise.
17040 (vmlaldavxq_p_s16): Likewise.
17041 (vmlsldavq_p_s16): Likewise.
17042 (vmlsldavxq_p_s16): Likewise.
17043 (vmovlbq_m_s8): Likewise.
17044 (vmovltq_m_s8): Likewise.
17045 (vmovnbq_m_s16): Likewise.
17046 (vmovntq_m_s16): Likewise.
17047 (vnegq_m_f16): Likewise.
17048 (vpselq_f16): Likewise.
17049 (vqmovnbq_m_s16): Likewise.
17050 (vqmovntq_m_s16): Likewise.
17051 (vrev32q_m_s8): Likewise.
17052 (vrev64q_m_f16): Likewise.
17053 (vrndaq_m_f16): Likewise.
17054 (vrndmq_m_f16): Likewise.
17055 (vrndnq_m_f16): Likewise.
17056 (vrndpq_m_f16): Likewise.
17057 (vrndq_m_f16): Likewise.
17058 (vrndxq_m_f16): Likewise.
17059 (vcmpeqq_m_n_f16): Likewise.
17060 (vcmpgeq_m_f16): Likewise.
17061 (vcmpgeq_m_n_f16): Likewise.
17062 (vcmpgtq_m_f16): Likewise.
17063 (vcmpgtq_m_n_f16): Likewise.
17064 (vcmpleq_m_f16): Likewise.
17065 (vcmpleq_m_n_f16): Likewise.
17066 (vcmpltq_m_f16): Likewise.
17067 (vcmpltq_m_n_f16): Likewise.
17068 (vcmpneq_m_f16): Likewise.
17069 (vcmpneq_m_n_f16): Likewise.
17070 (vmvnq_m_n_u16): Likewise.
17071 (vorrq_m_n_u16): Likewise.
17072 (vqrshruntq_n_s16): Likewise.
17073 (vqshrunbq_n_s16): Likewise.
17074 (vqshruntq_n_s16): Likewise.
17075 (vcvtmq_m_u16_f16): Likewise.
17076 (vcvtnq_m_u16_f16): Likewise.
17077 (vcvtpq_m_u16_f16): Likewise.
17078 (vcvtq_m_u16_f16): Likewise.
17079 (vqmovunbq_m_s16): Likewise.
17080 (vqmovuntq_m_s16): Likewise.
17081 (vqrshrntq_n_u16): Likewise.
17082 (vqshrnbq_n_u16): Likewise.
17083 (vqshrntq_n_u16): Likewise.
17084 (vrshrnbq_n_u16): Likewise.
17085 (vrshrntq_n_u16): Likewise.
17086 (vshrnbq_n_u16): Likewise.
17087 (vshrntq_n_u16): Likewise.
17088 (vmlaldavaq_u16): Likewise.
17089 (vmlaldavaxq_u16): Likewise.
17090 (vmlaldavq_p_u16): Likewise.
17091 (vmlaldavxq_p_u16): Likewise.
17092 (vmovlbq_m_u8): Likewise.
17093 (vmovltq_m_u8): Likewise.
17094 (vmovnbq_m_u16): Likewise.
17095 (vmovntq_m_u16): Likewise.
17096 (vqmovnbq_m_u16): Likewise.
17097 (vqmovntq_m_u16): Likewise.
17098 (vrev32q_m_u8): Likewise.
17099 (vmvnq_m_n_s32): Likewise.
17100 (vorrq_m_n_s32): Likewise.
17101 (vqrshrntq_n_s32): Likewise.
17102 (vqshrnbq_n_s32): Likewise.
17103 (vqshrntq_n_s32): Likewise.
17104 (vrshrnbq_n_s32): Likewise.
17105 (vrshrntq_n_s32): Likewise.
17106 (vshrnbq_n_s32): Likewise.
17107 (vshrntq_n_s32): Likewise.
17108 (vcmlaq_f32): Likewise.
17109 (vcmlaq_rot180_f32): Likewise.
17110 (vcmlaq_rot270_f32): Likewise.
17111 (vcmlaq_rot90_f32): Likewise.
17112 (vfmaq_f32): Likewise.
17113 (vfmaq_n_f32): Likewise.
17114 (vfmasq_n_f32): Likewise.
17115 (vfmsq_f32): Likewise.
17116 (vmlaldavaq_s32): Likewise.
17117 (vmlaldavaxq_s32): Likewise.
17118 (vmlsldavaq_s32): Likewise.
17119 (vmlsldavaxq_s32): Likewise.
17120 (vabsq_m_f32): Likewise.
17121 (vcvtmq_m_s32_f32): Likewise.
17122 (vcvtnq_m_s32_f32): Likewise.
17123 (vcvtpq_m_s32_f32): Likewise.
17124 (vcvtq_m_s32_f32): Likewise.
17125 (vdupq_m_n_f32): Likewise.
17126 (vmaxnmaq_m_f32): Likewise.
17127 (vmaxnmavq_p_f32): Likewise.
17128 (vmaxnmvq_p_f32): Likewise.
17129 (vminnmaq_m_f32): Likewise.
17130 (vminnmavq_p_f32): Likewise.
17131 (vminnmvq_p_f32): Likewise.
17132 (vmlaldavq_p_s32): Likewise.
17133 (vmlaldavxq_p_s32): Likewise.
17134 (vmlsldavq_p_s32): Likewise.
17135 (vmlsldavxq_p_s32): Likewise.
17136 (vmovlbq_m_s16): Likewise.
17137 (vmovltq_m_s16): Likewise.
17138 (vmovnbq_m_s32): Likewise.
17139 (vmovntq_m_s32): Likewise.
17140 (vnegq_m_f32): Likewise.
17141 (vpselq_f32): Likewise.
17142 (vqmovnbq_m_s32): Likewise.
17143 (vqmovntq_m_s32): Likewise.
17144 (vrev32q_m_s16): Likewise.
17145 (vrev64q_m_f32): Likewise.
17146 (vrndaq_m_f32): Likewise.
17147 (vrndmq_m_f32): Likewise.
17148 (vrndnq_m_f32): Likewise.
17149 (vrndpq_m_f32): Likewise.
17150 (vrndq_m_f32): Likewise.
17151 (vrndxq_m_f32): Likewise.
17152 (vcmpeqq_m_n_f32): Likewise.
17153 (vcmpgeq_m_f32): Likewise.
17154 (vcmpgeq_m_n_f32): Likewise.
17155 (vcmpgtq_m_f32): Likewise.
17156 (vcmpgtq_m_n_f32): Likewise.
17157 (vcmpleq_m_f32): Likewise.
17158 (vcmpleq_m_n_f32): Likewise.
17159 (vcmpltq_m_f32): Likewise.
17160 (vcmpltq_m_n_f32): Likewise.
17161 (vcmpneq_m_f32): Likewise.
17162 (vcmpneq_m_n_f32): Likewise.
17163 (vmvnq_m_n_u32): Likewise.
17164 (vorrq_m_n_u32): Likewise.
17165 (vqrshruntq_n_s32): Likewise.
17166 (vqshrunbq_n_s32): Likewise.
17167 (vqshruntq_n_s32): Likewise.
17168 (vcvtmq_m_u32_f32): Likewise.
17169 (vcvtnq_m_u32_f32): Likewise.
17170 (vcvtpq_m_u32_f32): Likewise.
17171 (vcvtq_m_u32_f32): Likewise.
17172 (vqmovunbq_m_s32): Likewise.
17173 (vqmovuntq_m_s32): Likewise.
17174 (vqrshrntq_n_u32): Likewise.
17175 (vqshrnbq_n_u32): Likewise.
17176 (vqshrntq_n_u32): Likewise.
17177 (vrshrnbq_n_u32): Likewise.
17178 (vrshrntq_n_u32): Likewise.
17179 (vshrnbq_n_u32): Likewise.
17180 (vshrntq_n_u32): Likewise.
17181 (vmlaldavaq_u32): Likewise.
17182 (vmlaldavaxq_u32): Likewise.
17183 (vmlaldavq_p_u32): Likewise.
17184 (vmlaldavxq_p_u32): Likewise.
17185 (vmovlbq_m_u16): Likewise.
17186 (vmovltq_m_u16): Likewise.
17187 (vmovnbq_m_u32): Likewise.
17188 (vmovntq_m_u32): Likewise.
17189 (vqmovnbq_m_u32): Likewise.
17190 (vqmovntq_m_u32): Likewise.
17191 (vrev32q_m_u16): Likewise.
17192 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
17193 (__arm_vrmlsldavhaq_s32): Likewise.
17194 (__arm_vrmlsldavhaxq_s32): Likewise.
17195 (__arm_vaddlvaq_p_s32): Likewise.
17196 (__arm_vrev16q_m_s8): Likewise.
17197 (__arm_vrmlaldavhq_p_s32): Likewise.
17198 (__arm_vrmlaldavhxq_p_s32): Likewise.
17199 (__arm_vrmlsldavhq_p_s32): Likewise.
17200 (__arm_vrmlsldavhxq_p_s32): Likewise.
17201 (__arm_vaddlvaq_p_u32): Likewise.
17202 (__arm_vrev16q_m_u8): Likewise.
17203 (__arm_vrmlaldavhq_p_u32): Likewise.
17204 (__arm_vmvnq_m_n_s16): Likewise.
17205 (__arm_vorrq_m_n_s16): Likewise.
17206 (__arm_vqrshrntq_n_s16): Likewise.
17207 (__arm_vqshrnbq_n_s16): Likewise.
17208 (__arm_vqshrntq_n_s16): Likewise.
17209 (__arm_vrshrnbq_n_s16): Likewise.
17210 (__arm_vrshrntq_n_s16): Likewise.
17211 (__arm_vshrnbq_n_s16): Likewise.
17212 (__arm_vshrntq_n_s16): Likewise.
17213 (__arm_vmlaldavaq_s16): Likewise.
17214 (__arm_vmlaldavaxq_s16): Likewise.
17215 (__arm_vmlsldavaq_s16): Likewise.
17216 (__arm_vmlsldavaxq_s16): Likewise.
17217 (__arm_vmlaldavq_p_s16): Likewise.
17218 (__arm_vmlaldavxq_p_s16): Likewise.
17219 (__arm_vmlsldavq_p_s16): Likewise.
17220 (__arm_vmlsldavxq_p_s16): Likewise.
17221 (__arm_vmovlbq_m_s8): Likewise.
17222 (__arm_vmovltq_m_s8): Likewise.
17223 (__arm_vmovnbq_m_s16): Likewise.
17224 (__arm_vmovntq_m_s16): Likewise.
17225 (__arm_vqmovnbq_m_s16): Likewise.
17226 (__arm_vqmovntq_m_s16): Likewise.
17227 (__arm_vrev32q_m_s8): Likewise.
17228 (__arm_vmvnq_m_n_u16): Likewise.
17229 (__arm_vorrq_m_n_u16): Likewise.
17230 (__arm_vqrshruntq_n_s16): Likewise.
17231 (__arm_vqshrunbq_n_s16): Likewise.
17232 (__arm_vqshruntq_n_s16): Likewise.
17233 (__arm_vqmovunbq_m_s16): Likewise.
17234 (__arm_vqmovuntq_m_s16): Likewise.
17235 (__arm_vqrshrntq_n_u16): Likewise.
17236 (__arm_vqshrnbq_n_u16): Likewise.
17237 (__arm_vqshrntq_n_u16): Likewise.
17238 (__arm_vrshrnbq_n_u16): Likewise.
17239 (__arm_vrshrntq_n_u16): Likewise.
17240 (__arm_vshrnbq_n_u16): Likewise.
17241 (__arm_vshrntq_n_u16): Likewise.
17242 (__arm_vmlaldavaq_u16): Likewise.
17243 (__arm_vmlaldavaxq_u16): Likewise.
17244 (__arm_vmlaldavq_p_u16): Likewise.
17245 (__arm_vmlaldavxq_p_u16): Likewise.
17246 (__arm_vmovlbq_m_u8): Likewise.
17247 (__arm_vmovltq_m_u8): Likewise.
17248 (__arm_vmovnbq_m_u16): Likewise.
17249 (__arm_vmovntq_m_u16): Likewise.
17250 (__arm_vqmovnbq_m_u16): Likewise.
17251 (__arm_vqmovntq_m_u16): Likewise.
17252 (__arm_vrev32q_m_u8): Likewise.
17253 (__arm_vmvnq_m_n_s32): Likewise.
17254 (__arm_vorrq_m_n_s32): Likewise.
17255 (__arm_vqrshrntq_n_s32): Likewise.
17256 (__arm_vqshrnbq_n_s32): Likewise.
17257 (__arm_vqshrntq_n_s32): Likewise.
17258 (__arm_vrshrnbq_n_s32): Likewise.
17259 (__arm_vrshrntq_n_s32): Likewise.
17260 (__arm_vshrnbq_n_s32): Likewise.
17261 (__arm_vshrntq_n_s32): Likewise.
17262 (__arm_vmlaldavaq_s32): Likewise.
17263 (__arm_vmlaldavaxq_s32): Likewise.
17264 (__arm_vmlsldavaq_s32): Likewise.
17265 (__arm_vmlsldavaxq_s32): Likewise.
17266 (__arm_vmlaldavq_p_s32): Likewise.
17267 (__arm_vmlaldavxq_p_s32): Likewise.
17268 (__arm_vmlsldavq_p_s32): Likewise.
17269 (__arm_vmlsldavxq_p_s32): Likewise.
17270 (__arm_vmovlbq_m_s16): Likewise.
17271 (__arm_vmovltq_m_s16): Likewise.
17272 (__arm_vmovnbq_m_s32): Likewise.
17273 (__arm_vmovntq_m_s32): Likewise.
17274 (__arm_vqmovnbq_m_s32): Likewise.
17275 (__arm_vqmovntq_m_s32): Likewise.
17276 (__arm_vrev32q_m_s16): Likewise.
17277 (__arm_vmvnq_m_n_u32): Likewise.
17278 (__arm_vorrq_m_n_u32): Likewise.
17279 (__arm_vqrshruntq_n_s32): Likewise.
17280 (__arm_vqshrunbq_n_s32): Likewise.
17281 (__arm_vqshruntq_n_s32): Likewise.
17282 (__arm_vqmovunbq_m_s32): Likewise.
17283 (__arm_vqmovuntq_m_s32): Likewise.
17284 (__arm_vqrshrntq_n_u32): Likewise.
17285 (__arm_vqshrnbq_n_u32): Likewise.
17286 (__arm_vqshrntq_n_u32): Likewise.
17287 (__arm_vrshrnbq_n_u32): Likewise.
17288 (__arm_vrshrntq_n_u32): Likewise.
17289 (__arm_vshrnbq_n_u32): Likewise.
17290 (__arm_vshrntq_n_u32): Likewise.
17291 (__arm_vmlaldavaq_u32): Likewise.
17292 (__arm_vmlaldavaxq_u32): Likewise.
17293 (__arm_vmlaldavq_p_u32): Likewise.
17294 (__arm_vmlaldavxq_p_u32): Likewise.
17295 (__arm_vmovlbq_m_u16): Likewise.
17296 (__arm_vmovltq_m_u16): Likewise.
17297 (__arm_vmovnbq_m_u32): Likewise.
17298 (__arm_vmovntq_m_u32): Likewise.
17299 (__arm_vqmovnbq_m_u32): Likewise.
17300 (__arm_vqmovntq_m_u32): Likewise.
17301 (__arm_vrev32q_m_u16): Likewise.
17302 (__arm_vcvtbq_m_f16_f32): Likewise.
17303 (__arm_vcvtbq_m_f32_f16): Likewise.
17304 (__arm_vcvttq_m_f16_f32): Likewise.
17305 (__arm_vcvttq_m_f32_f16): Likewise.
17306 (__arm_vrev32q_m_f16): Likewise.
17307 (__arm_vcmlaq_f16): Likewise.
17308 (__arm_vcmlaq_rot180_f16): Likewise.
17309 (__arm_vcmlaq_rot270_f16): Likewise.
17310 (__arm_vcmlaq_rot90_f16): Likewise.
17311 (__arm_vfmaq_f16): Likewise.
17312 (__arm_vfmaq_n_f16): Likewise.
17313 (__arm_vfmasq_n_f16): Likewise.
17314 (__arm_vfmsq_f16): Likewise.
17315 (__arm_vabsq_m_f16): Likewise.
17316 (__arm_vcvtmq_m_s16_f16): Likewise.
17317 (__arm_vcvtnq_m_s16_f16): Likewise.
17318 (__arm_vcvtpq_m_s16_f16): Likewise.
17319 (__arm_vcvtq_m_s16_f16): Likewise.
17320 (__arm_vdupq_m_n_f16): Likewise.
17321 (__arm_vmaxnmaq_m_f16): Likewise.
17322 (__arm_vmaxnmavq_p_f16): Likewise.
17323 (__arm_vmaxnmvq_p_f16): Likewise.
17324 (__arm_vminnmaq_m_f16): Likewise.
17325 (__arm_vminnmavq_p_f16): Likewise.
17326 (__arm_vminnmvq_p_f16): Likewise.
17327 (__arm_vnegq_m_f16): Likewise.
17328 (__arm_vpselq_f16): Likewise.
17329 (__arm_vrev64q_m_f16): Likewise.
17330 (__arm_vrndaq_m_f16): Likewise.
17331 (__arm_vrndmq_m_f16): Likewise.
17332 (__arm_vrndnq_m_f16): Likewise.
17333 (__arm_vrndpq_m_f16): Likewise.
17334 (__arm_vrndq_m_f16): Likewise.
17335 (__arm_vrndxq_m_f16): Likewise.
17336 (__arm_vcmpeqq_m_n_f16): Likewise.
17337 (__arm_vcmpgeq_m_f16): Likewise.
17338 (__arm_vcmpgeq_m_n_f16): Likewise.
17339 (__arm_vcmpgtq_m_f16): Likewise.
17340 (__arm_vcmpgtq_m_n_f16): Likewise.
17341 (__arm_vcmpleq_m_f16): Likewise.
17342 (__arm_vcmpleq_m_n_f16): Likewise.
17343 (__arm_vcmpltq_m_f16): Likewise.
17344 (__arm_vcmpltq_m_n_f16): Likewise.
17345 (__arm_vcmpneq_m_f16): Likewise.
17346 (__arm_vcmpneq_m_n_f16): Likewise.
17347 (__arm_vcvtmq_m_u16_f16): Likewise.
17348 (__arm_vcvtnq_m_u16_f16): Likewise.
17349 (__arm_vcvtpq_m_u16_f16): Likewise.
17350 (__arm_vcvtq_m_u16_f16): Likewise.
17351 (__arm_vcmlaq_f32): Likewise.
17352 (__arm_vcmlaq_rot180_f32): Likewise.
17353 (__arm_vcmlaq_rot270_f32): Likewise.
17354 (__arm_vcmlaq_rot90_f32): Likewise.
17355 (__arm_vfmaq_f32): Likewise.
17356 (__arm_vfmaq_n_f32): Likewise.
17357 (__arm_vfmasq_n_f32): Likewise.
17358 (__arm_vfmsq_f32): Likewise.
17359 (__arm_vabsq_m_f32): Likewise.
17360 (__arm_vcvtmq_m_s32_f32): Likewise.
17361 (__arm_vcvtnq_m_s32_f32): Likewise.
17362 (__arm_vcvtpq_m_s32_f32): Likewise.
17363 (__arm_vcvtq_m_s32_f32): Likewise.
17364 (__arm_vdupq_m_n_f32): Likewise.
17365 (__arm_vmaxnmaq_m_f32): Likewise.
17366 (__arm_vmaxnmavq_p_f32): Likewise.
17367 (__arm_vmaxnmvq_p_f32): Likewise.
17368 (__arm_vminnmaq_m_f32): Likewise.
17369 (__arm_vminnmavq_p_f32): Likewise.
17370 (__arm_vminnmvq_p_f32): Likewise.
17371 (__arm_vnegq_m_f32): Likewise.
17372 (__arm_vpselq_f32): Likewise.
17373 (__arm_vrev64q_m_f32): Likewise.
17374 (__arm_vrndaq_m_f32): Likewise.
17375 (__arm_vrndmq_m_f32): Likewise.
17376 (__arm_vrndnq_m_f32): Likewise.
17377 (__arm_vrndpq_m_f32): Likewise.
17378 (__arm_vrndq_m_f32): Likewise.
17379 (__arm_vrndxq_m_f32): Likewise.
17380 (__arm_vcmpeqq_m_n_f32): Likewise.
17381 (__arm_vcmpgeq_m_f32): Likewise.
17382 (__arm_vcmpgeq_m_n_f32): Likewise.
17383 (__arm_vcmpgtq_m_f32): Likewise.
17384 (__arm_vcmpgtq_m_n_f32): Likewise.
17385 (__arm_vcmpleq_m_f32): Likewise.
17386 (__arm_vcmpleq_m_n_f32): Likewise.
17387 (__arm_vcmpltq_m_f32): Likewise.
17388 (__arm_vcmpltq_m_n_f32): Likewise.
17389 (__arm_vcmpneq_m_f32): Likewise.
17390 (__arm_vcmpneq_m_n_f32): Likewise.
17391 (__arm_vcvtmq_m_u32_f32): Likewise.
17392 (__arm_vcvtnq_m_u32_f32): Likewise.
17393 (__arm_vcvtpq_m_u32_f32): Likewise.
17394 (__arm_vcvtq_m_u32_f32): Likewise.
17395 (vcvtq_m): Define polymorphic variant.
17396 (vabsq_m): Likewise.
17397 (vcmlaq): Likewise.
17398 (vcmlaq_rot180): Likewise.
17399 (vcmlaq_rot270): Likewise.
17400 (vcmlaq_rot90): Likewise.
17401 (vcmpeqq_m_n): Likewise.
17402 (vcmpgeq_m_n): Likewise.
17403 (vrndxq_m): Likewise.
17404 (vrndq_m): Likewise.
17405 (vrndpq_m): Likewise.
17406 (vcmpgtq_m_n): Likewise.
17407 (vcmpgtq_m): Likewise.
17408 (vcmpleq_m): Likewise.
17409 (vcmpleq_m_n): Likewise.
17410 (vcmpltq_m_n): Likewise.
17411 (vcmpltq_m): Likewise.
17412 (vcmpneq_m): Likewise.
17413 (vcmpneq_m_n): Likewise.
17414 (vcvtbq_m): Likewise.
17415 (vcvttq_m): Likewise.
17416 (vcvtmq_m): Likewise.
17417 (vcvtnq_m): Likewise.
17418 (vcvtpq_m): Likewise.
17419 (vdupq_m_n): Likewise.
17420 (vfmaq_n): Likewise.
17422 (vfmasq_n): Likewise.
17424 (vmaxnmaq_m): Likewise.
17425 (vmaxnmavq_m): Likewise.
17426 (vmaxnmvq_m): Likewise.
17427 (vmaxnmavq_p): Likewise.
17428 (vmaxnmvq_p): Likewise.
17429 (vminnmaq_m): Likewise.
17430 (vminnmavq_p): Likewise.
17431 (vminnmvq_p): Likewise.
17432 (vrndnq_m): Likewise.
17433 (vrndaq_m): Likewise.
17434 (vrndmq_m): Likewise.
17435 (vrev64q_m): Likewise.
17436 (vrev32q_m): Likewise.
17437 (vpselq): Likewise.
17438 (vnegq_m): Likewise.
17439 (vcmpgeq_m): Likewise.
17440 (vshrntq_n): Likewise.
17441 (vrshrntq_n): Likewise.
17442 (vmovlbq_m): Likewise.
17443 (vmovnbq_m): Likewise.
17444 (vmovntq_m): Likewise.
17445 (vmvnq_m_n): Likewise.
17446 (vmvnq_m): Likewise.
17447 (vshrnbq_n): Likewise.
17448 (vrshrnbq_n): Likewise.
17449 (vqshruntq_n): Likewise.
17450 (vrev16q_m): Likewise.
17451 (vqshrunbq_n): Likewise.
17452 (vqshrntq_n): Likewise.
17453 (vqrshruntq_n): Likewise.
17454 (vqrshrntq_n): Likewise.
17455 (vqshrnbq_n): Likewise.
17456 (vqmovuntq_m): Likewise.
17457 (vqmovntq_m): Likewise.
17458 (vqmovnbq_m): Likewise.
17459 (vorrq_m_n): Likewise.
17460 (vmovltq_m): Likewise.
17461 (vqmovunbq_m): Likewise.
17462 (vaddlvaq_p): Likewise.
17463 (vmlaldavaq): Likewise.
17464 (vmlaldavaxq): Likewise.
17465 (vmlaldavq_p): Likewise.
17466 (vmlaldavxq_p): Likewise.
17467 (vmlsldavaq): Likewise.
17468 (vmlsldavaxq): Likewise.
17469 (vmlsldavq_p): Likewise.
17470 (vmlsldavxq_p): Likewise.
17471 (vrmlaldavhaxq): Likewise.
17472 (vrmlaldavhq_p): Likewise.
17473 (vrmlaldavhxq_p): Likewise.
17474 (vrmlsldavhaq): Likewise.
17475 (vrmlsldavhaxq): Likewise.
17476 (vrmlsldavhq_p): Likewise.
17477 (vrmlsldavhxq_p): Likewise.
17478 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
17480 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
17481 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
17482 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
17483 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
17484 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
17485 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
17486 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
17487 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
17488 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
17489 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
17490 (MVE_pred3): Likewise.
17491 (MVE_constraint1): Likewise.
17492 (MVE_pred1): Likewise.
17493 (VMLALDAVQ_P): Define iterator.
17494 (VQMOVNBQ_M): Likewise.
17495 (VMOVLTQ_M): Likewise.
17496 (VMOVNBQ_M): Likewise.
17497 (VRSHRNTQ_N): Likewise.
17498 (VORRQ_M_N): Likewise.
17499 (VREV32Q_M): Likewise.
17500 (VREV16Q_M): Likewise.
17501 (VQRSHRNTQ_N): Likewise.
17502 (VMOVNTQ_M): Likewise.
17503 (VMOVLBQ_M): Likewise.
17504 (VMLALDAVAQ): Likewise.
17505 (VQSHRNBQ_N): Likewise.
17506 (VSHRNBQ_N): Likewise.
17507 (VRSHRNBQ_N): Likewise.
17508 (VMLALDAVXQ_P): Likewise.
17509 (VQMOVNTQ_M): Likewise.
17510 (VMVNQ_M_N): Likewise.
17511 (VQSHRNTQ_N): Likewise.
17512 (VMLALDAVAXQ): Likewise.
17513 (VSHRNTQ_N): Likewise.
17514 (VCVTMQ_M): Likewise.
17515 (VCVTNQ_M): Likewise.
17516 (VCVTPQ_M): Likewise.
17517 (VCVTQ_M_N_FROM_F): Likewise.
17518 (VCVTQ_M_FROM_F): Likewise.
17519 (VRMLALDAVHQ_P): Likewise.
17520 (VADDLVAQ_P): Likewise.
17521 (mve_vrndq_m_f<mode>): Define RTL pattern.
17522 (mve_vabsq_m_f<mode>): Likewise.
17523 (mve_vaddlvaq_p_<supf>v4si): Likewise.
17524 (mve_vcmlaq_f<mode>): Likewise.
17525 (mve_vcmlaq_rot180_f<mode>): Likewise.
17526 (mve_vcmlaq_rot270_f<mode>): Likewise.
17527 (mve_vcmlaq_rot90_f<mode>): Likewise.
17528 (mve_vcmpeqq_m_n_f<mode>): Likewise.
17529 (mve_vcmpgeq_m_f<mode>): Likewise.
17530 (mve_vcmpgeq_m_n_f<mode>): Likewise.
17531 (mve_vcmpgtq_m_f<mode>): Likewise.
17532 (mve_vcmpgtq_m_n_f<mode>): Likewise.
17533 (mve_vcmpleq_m_f<mode>): Likewise.
17534 (mve_vcmpleq_m_n_f<mode>): Likewise.
17535 (mve_vcmpltq_m_f<mode>): Likewise.
17536 (mve_vcmpltq_m_n_f<mode>): Likewise.
17537 (mve_vcmpneq_m_f<mode>): Likewise.
17538 (mve_vcmpneq_m_n_f<mode>): Likewise.
17539 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
17540 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
17541 (mve_vcvttq_m_f16_f32v8hf): Likewise.
17542 (mve_vcvttq_m_f32_f16v4sf): Likewise.
17543 (mve_vdupq_m_n_f<mode>): Likewise.
17544 (mve_vfmaq_f<mode>): Likewise.
17545 (mve_vfmaq_n_f<mode>): Likewise.
17546 (mve_vfmasq_n_f<mode>): Likewise.
17547 (mve_vfmsq_f<mode>): Likewise.
17548 (mve_vmaxnmaq_m_f<mode>): Likewise.
17549 (mve_vmaxnmavq_p_f<mode>): Likewise.
17550 (mve_vmaxnmvq_p_f<mode>): Likewise.
17551 (mve_vminnmaq_m_f<mode>): Likewise.
17552 (mve_vminnmavq_p_f<mode>): Likewise.
17553 (mve_vminnmvq_p_f<mode>): Likewise.
17554 (mve_vmlaldavaq_<supf><mode>): Likewise.
17555 (mve_vmlaldavaxq_<supf><mode>): Likewise.
17556 (mve_vmlaldavq_p_<supf><mode>): Likewise.
17557 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
17558 (mve_vmlsldavaq_s<mode>): Likewise.
17559 (mve_vmlsldavaxq_s<mode>): Likewise.
17560 (mve_vmlsldavq_p_s<mode>): Likewise.
17561 (mve_vmlsldavxq_p_s<mode>): Likewise.
17562 (mve_vmovlbq_m_<supf><mode>): Likewise.
17563 (mve_vmovltq_m_<supf><mode>): Likewise.
17564 (mve_vmovnbq_m_<supf><mode>): Likewise.
17565 (mve_vmovntq_m_<supf><mode>): Likewise.
17566 (mve_vmvnq_m_n_<supf><mode>): Likewise.
17567 (mve_vnegq_m_f<mode>): Likewise.
17568 (mve_vorrq_m_n_<supf><mode>): Likewise.
17569 (mve_vpselq_f<mode>): Likewise.
17570 (mve_vqmovnbq_m_<supf><mode>): Likewise.
17571 (mve_vqmovntq_m_<supf><mode>): Likewise.
17572 (mve_vqmovunbq_m_s<mode>): Likewise.
17573 (mve_vqmovuntq_m_s<mode>): Likewise.
17574 (mve_vqrshrntq_n_<supf><mode>): Likewise.
17575 (mve_vqrshruntq_n_s<mode>): Likewise.
17576 (mve_vqshrnbq_n_<supf><mode>): Likewise.
17577 (mve_vqshrntq_n_<supf><mode>): Likewise.
17578 (mve_vqshrunbq_n_s<mode>): Likewise.
17579 (mve_vqshruntq_n_s<mode>): Likewise.
17580 (mve_vrev32q_m_fv8hf): Likewise.
17581 (mve_vrev32q_m_<supf><mode>): Likewise.
17582 (mve_vrev64q_m_f<mode>): Likewise.
17583 (mve_vrmlaldavhaxq_sv4si): Likewise.
17584 (mve_vrmlaldavhxq_p_sv4si): Likewise.
17585 (mve_vrmlsldavhaxq_sv4si): Likewise.
17586 (mve_vrmlsldavhq_p_sv4si): Likewise.
17587 (mve_vrmlsldavhxq_p_sv4si): Likewise.
17588 (mve_vrndaq_m_f<mode>): Likewise.
17589 (mve_vrndmq_m_f<mode>): Likewise.
17590 (mve_vrndnq_m_f<mode>): Likewise.
17591 (mve_vrndpq_m_f<mode>): Likewise.
17592 (mve_vrndxq_m_f<mode>): Likewise.
17593 (mve_vrshrnbq_n_<supf><mode>): Likewise.
17594 (mve_vrshrntq_n_<supf><mode>): Likewise.
17595 (mve_vshrnbq_n_<supf><mode>): Likewise.
17596 (mve_vshrntq_n_<supf><mode>): Likewise.
17597 (mve_vcvtmq_m_<supf><mode>): Likewise.
17598 (mve_vcvtpq_m_<supf><mode>): Likewise.
17599 (mve_vcvtnq_m_<supf><mode>): Likewise.
17600 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
17601 (mve_vrev16q_m_<supf>v16qi): Likewise.
17602 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
17603 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
17604 (mve_vrmlsldavhaq_sv4si): Likewise.
17606 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
17607 Mihail Ionescu <mihail.ionescu@arm.com>
17608 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17610 * config/arm/arm_mve.h (vpselq_u8): Define macro.
17611 (vpselq_s8): Likewise.
17612 (vrev64q_m_u8): Likewise.
17613 (vqrdmlashq_n_u8): Likewise.
17614 (vqrdmlahq_n_u8): Likewise.
17615 (vqdmlahq_n_u8): Likewise.
17616 (vmvnq_m_u8): Likewise.
17617 (vmlasq_n_u8): Likewise.
17618 (vmlaq_n_u8): Likewise.
17619 (vmladavq_p_u8): Likewise.
17620 (vmladavaq_u8): Likewise.
17621 (vminvq_p_u8): Likewise.
17622 (vmaxvq_p_u8): Likewise.
17623 (vdupq_m_n_u8): Likewise.
17624 (vcmpneq_m_u8): Likewise.
17625 (vcmpneq_m_n_u8): Likewise.
17626 (vcmphiq_m_u8): Likewise.
17627 (vcmphiq_m_n_u8): Likewise.
17628 (vcmpeqq_m_u8): Likewise.
17629 (vcmpeqq_m_n_u8): Likewise.
17630 (vcmpcsq_m_u8): Likewise.
17631 (vcmpcsq_m_n_u8): Likewise.
17632 (vclzq_m_u8): Likewise.
17633 (vaddvaq_p_u8): Likewise.
17634 (vsriq_n_u8): Likewise.
17635 (vsliq_n_u8): Likewise.
17636 (vshlq_m_r_u8): Likewise.
17637 (vrshlq_m_n_u8): Likewise.
17638 (vqshlq_m_r_u8): Likewise.
17639 (vqrshlq_m_n_u8): Likewise.
17640 (vminavq_p_s8): Likewise.
17641 (vminaq_m_s8): Likewise.
17642 (vmaxavq_p_s8): Likewise.
17643 (vmaxaq_m_s8): Likewise.
17644 (vcmpneq_m_s8): Likewise.
17645 (vcmpneq_m_n_s8): Likewise.
17646 (vcmpltq_m_s8): Likewise.
17647 (vcmpltq_m_n_s8): Likewise.
17648 (vcmpleq_m_s8): Likewise.
17649 (vcmpleq_m_n_s8): Likewise.
17650 (vcmpgtq_m_s8): Likewise.
17651 (vcmpgtq_m_n_s8): Likewise.
17652 (vcmpgeq_m_s8): Likewise.
17653 (vcmpgeq_m_n_s8): Likewise.
17654 (vcmpeqq_m_s8): Likewise.
17655 (vcmpeqq_m_n_s8): Likewise.
17656 (vshlq_m_r_s8): Likewise.
17657 (vrshlq_m_n_s8): Likewise.
17658 (vrev64q_m_s8): Likewise.
17659 (vqshlq_m_r_s8): Likewise.
17660 (vqrshlq_m_n_s8): Likewise.
17661 (vqnegq_m_s8): Likewise.
17662 (vqabsq_m_s8): Likewise.
17663 (vnegq_m_s8): Likewise.
17664 (vmvnq_m_s8): Likewise.
17665 (vmlsdavxq_p_s8): Likewise.
17666 (vmlsdavq_p_s8): Likewise.
17667 (vmladavxq_p_s8): Likewise.
17668 (vmladavq_p_s8): Likewise.
17669 (vminvq_p_s8): Likewise.
17670 (vmaxvq_p_s8): Likewise.
17671 (vdupq_m_n_s8): Likewise.
17672 (vclzq_m_s8): Likewise.
17673 (vclsq_m_s8): Likewise.
17674 (vaddvaq_p_s8): Likewise.
17675 (vabsq_m_s8): Likewise.
17676 (vqrdmlsdhxq_s8): Likewise.
17677 (vqrdmlsdhq_s8): Likewise.
17678 (vqrdmlashq_n_s8): Likewise.
17679 (vqrdmlahq_n_s8): Likewise.
17680 (vqrdmladhxq_s8): Likewise.
17681 (vqrdmladhq_s8): Likewise.
17682 (vqdmlsdhxq_s8): Likewise.
17683 (vqdmlsdhq_s8): Likewise.
17684 (vqdmlahq_n_s8): Likewise.
17685 (vqdmladhxq_s8): Likewise.
17686 (vqdmladhq_s8): Likewise.
17687 (vmlsdavaxq_s8): Likewise.
17688 (vmlsdavaq_s8): Likewise.
17689 (vmlasq_n_s8): Likewise.
17690 (vmlaq_n_s8): Likewise.
17691 (vmladavaxq_s8): Likewise.
17692 (vmladavaq_s8): Likewise.
17693 (vsriq_n_s8): Likewise.
17694 (vsliq_n_s8): Likewise.
17695 (vpselq_u16): Likewise.
17696 (vpselq_s16): Likewise.
17697 (vrev64q_m_u16): Likewise.
17698 (vqrdmlashq_n_u16): Likewise.
17699 (vqrdmlahq_n_u16): Likewise.
17700 (vqdmlahq_n_u16): Likewise.
17701 (vmvnq_m_u16): Likewise.
17702 (vmlasq_n_u16): Likewise.
17703 (vmlaq_n_u16): Likewise.
17704 (vmladavq_p_u16): Likewise.
17705 (vmladavaq_u16): Likewise.
17706 (vminvq_p_u16): Likewise.
17707 (vmaxvq_p_u16): Likewise.
17708 (vdupq_m_n_u16): Likewise.
17709 (vcmpneq_m_u16): Likewise.
17710 (vcmpneq_m_n_u16): Likewise.
17711 (vcmphiq_m_u16): Likewise.
17712 (vcmphiq_m_n_u16): Likewise.
17713 (vcmpeqq_m_u16): Likewise.
17714 (vcmpeqq_m_n_u16): Likewise.
17715 (vcmpcsq_m_u16): Likewise.
17716 (vcmpcsq_m_n_u16): Likewise.
17717 (vclzq_m_u16): Likewise.
17718 (vaddvaq_p_u16): Likewise.
17719 (vsriq_n_u16): Likewise.
17720 (vsliq_n_u16): Likewise.
17721 (vshlq_m_r_u16): Likewise.
17722 (vrshlq_m_n_u16): Likewise.
17723 (vqshlq_m_r_u16): Likewise.
17724 (vqrshlq_m_n_u16): Likewise.
17725 (vminavq_p_s16): Likewise.
17726 (vminaq_m_s16): Likewise.
17727 (vmaxavq_p_s16): Likewise.
17728 (vmaxaq_m_s16): Likewise.
17729 (vcmpneq_m_s16): Likewise.
17730 (vcmpneq_m_n_s16): Likewise.
17731 (vcmpltq_m_s16): Likewise.
17732 (vcmpltq_m_n_s16): Likewise.
17733 (vcmpleq_m_s16): Likewise.
17734 (vcmpleq_m_n_s16): Likewise.
17735 (vcmpgtq_m_s16): Likewise.
17736 (vcmpgtq_m_n_s16): Likewise.
17737 (vcmpgeq_m_s16): Likewise.
17738 (vcmpgeq_m_n_s16): Likewise.
17739 (vcmpeqq_m_s16): Likewise.
17740 (vcmpeqq_m_n_s16): Likewise.
17741 (vshlq_m_r_s16): Likewise.
17742 (vrshlq_m_n_s16): Likewise.
17743 (vrev64q_m_s16): Likewise.
17744 (vqshlq_m_r_s16): Likewise.
17745 (vqrshlq_m_n_s16): Likewise.
17746 (vqnegq_m_s16): Likewise.
17747 (vqabsq_m_s16): Likewise.
17748 (vnegq_m_s16): Likewise.
17749 (vmvnq_m_s16): Likewise.
17750 (vmlsdavxq_p_s16): Likewise.
17751 (vmlsdavq_p_s16): Likewise.
17752 (vmladavxq_p_s16): Likewise.
17753 (vmladavq_p_s16): Likewise.
17754 (vminvq_p_s16): Likewise.
17755 (vmaxvq_p_s16): Likewise.
17756 (vdupq_m_n_s16): Likewise.
17757 (vclzq_m_s16): Likewise.
17758 (vclsq_m_s16): Likewise.
17759 (vaddvaq_p_s16): Likewise.
17760 (vabsq_m_s16): Likewise.
17761 (vqrdmlsdhxq_s16): Likewise.
17762 (vqrdmlsdhq_s16): Likewise.
17763 (vqrdmlashq_n_s16): Likewise.
17764 (vqrdmlahq_n_s16): Likewise.
17765 (vqrdmladhxq_s16): Likewise.
17766 (vqrdmladhq_s16): Likewise.
17767 (vqdmlsdhxq_s16): Likewise.
17768 (vqdmlsdhq_s16): Likewise.
17769 (vqdmlahq_n_s16): Likewise.
17770 (vqdmladhxq_s16): Likewise.
17771 (vqdmladhq_s16): Likewise.
17772 (vmlsdavaxq_s16): Likewise.
17773 (vmlsdavaq_s16): Likewise.
17774 (vmlasq_n_s16): Likewise.
17775 (vmlaq_n_s16): Likewise.
17776 (vmladavaxq_s16): Likewise.
17777 (vmladavaq_s16): Likewise.
17778 (vsriq_n_s16): Likewise.
17779 (vsliq_n_s16): Likewise.
17780 (vpselq_u32): Likewise.
17781 (vpselq_s32): Likewise.
17782 (vrev64q_m_u32): Likewise.
17783 (vqrdmlashq_n_u32): Likewise.
17784 (vqrdmlahq_n_u32): Likewise.
17785 (vqdmlahq_n_u32): Likewise.
17786 (vmvnq_m_u32): Likewise.
17787 (vmlasq_n_u32): Likewise.
17788 (vmlaq_n_u32): Likewise.
17789 (vmladavq_p_u32): Likewise.
17790 (vmladavaq_u32): Likewise.
17791 (vminvq_p_u32): Likewise.
17792 (vmaxvq_p_u32): Likewise.
17793 (vdupq_m_n_u32): Likewise.
17794 (vcmpneq_m_u32): Likewise.
17795 (vcmpneq_m_n_u32): Likewise.
17796 (vcmphiq_m_u32): Likewise.
17797 (vcmphiq_m_n_u32): Likewise.
17798 (vcmpeqq_m_u32): Likewise.
17799 (vcmpeqq_m_n_u32): Likewise.
17800 (vcmpcsq_m_u32): Likewise.
17801 (vcmpcsq_m_n_u32): Likewise.
17802 (vclzq_m_u32): Likewise.
17803 (vaddvaq_p_u32): Likewise.
17804 (vsriq_n_u32): Likewise.
17805 (vsliq_n_u32): Likewise.
17806 (vshlq_m_r_u32): Likewise.
17807 (vrshlq_m_n_u32): Likewise.
17808 (vqshlq_m_r_u32): Likewise.
17809 (vqrshlq_m_n_u32): Likewise.
17810 (vminavq_p_s32): Likewise.
17811 (vminaq_m_s32): Likewise.
17812 (vmaxavq_p_s32): Likewise.
17813 (vmaxaq_m_s32): Likewise.
17814 (vcmpneq_m_s32): Likewise.
17815 (vcmpneq_m_n_s32): Likewise.
17816 (vcmpltq_m_s32): Likewise.
17817 (vcmpltq_m_n_s32): Likewise.
17818 (vcmpleq_m_s32): Likewise.
17819 (vcmpleq_m_n_s32): Likewise.
17820 (vcmpgtq_m_s32): Likewise.
17821 (vcmpgtq_m_n_s32): Likewise.
17822 (vcmpgeq_m_s32): Likewise.
17823 (vcmpgeq_m_n_s32): Likewise.
17824 (vcmpeqq_m_s32): Likewise.
17825 (vcmpeqq_m_n_s32): Likewise.
17826 (vshlq_m_r_s32): Likewise.
17827 (vrshlq_m_n_s32): Likewise.
17828 (vrev64q_m_s32): Likewise.
17829 (vqshlq_m_r_s32): Likewise.
17830 (vqrshlq_m_n_s32): Likewise.
17831 (vqnegq_m_s32): Likewise.
17832 (vqabsq_m_s32): Likewise.
17833 (vnegq_m_s32): Likewise.
17834 (vmvnq_m_s32): Likewise.
17835 (vmlsdavxq_p_s32): Likewise.
17836 (vmlsdavq_p_s32): Likewise.
17837 (vmladavxq_p_s32): Likewise.
17838 (vmladavq_p_s32): Likewise.
17839 (vminvq_p_s32): Likewise.
17840 (vmaxvq_p_s32): Likewise.
17841 (vdupq_m_n_s32): Likewise.
17842 (vclzq_m_s32): Likewise.
17843 (vclsq_m_s32): Likewise.
17844 (vaddvaq_p_s32): Likewise.
17845 (vabsq_m_s32): Likewise.
17846 (vqrdmlsdhxq_s32): Likewise.
17847 (vqrdmlsdhq_s32): Likewise.
17848 (vqrdmlashq_n_s32): Likewise.
17849 (vqrdmlahq_n_s32): Likewise.
17850 (vqrdmladhxq_s32): Likewise.
17851 (vqrdmladhq_s32): Likewise.
17852 (vqdmlsdhxq_s32): Likewise.
17853 (vqdmlsdhq_s32): Likewise.
17854 (vqdmlahq_n_s32): Likewise.
17855 (vqdmladhxq_s32): Likewise.
17856 (vqdmladhq_s32): Likewise.
17857 (vmlsdavaxq_s32): Likewise.
17858 (vmlsdavaq_s32): Likewise.
17859 (vmlasq_n_s32): Likewise.
17860 (vmlaq_n_s32): Likewise.
17861 (vmladavaxq_s32): Likewise.
17862 (vmladavaq_s32): Likewise.
17863 (vsriq_n_s32): Likewise.
17864 (vsliq_n_s32): Likewise.
17865 (vpselq_u64): Likewise.
17866 (vpselq_s64): Likewise.
17867 (__arm_vpselq_u8): Define intrinsic.
17868 (__arm_vpselq_s8): Likewise.
17869 (__arm_vrev64q_m_u8): Likewise.
17870 (__arm_vqrdmlashq_n_u8): Likewise.
17871 (__arm_vqrdmlahq_n_u8): Likewise.
17872 (__arm_vqdmlahq_n_u8): Likewise.
17873 (__arm_vmvnq_m_u8): Likewise.
17874 (__arm_vmlasq_n_u8): Likewise.
17875 (__arm_vmlaq_n_u8): Likewise.
17876 (__arm_vmladavq_p_u8): Likewise.
17877 (__arm_vmladavaq_u8): Likewise.
17878 (__arm_vminvq_p_u8): Likewise.
17879 (__arm_vmaxvq_p_u8): Likewise.
17880 (__arm_vdupq_m_n_u8): Likewise.
17881 (__arm_vcmpneq_m_u8): Likewise.
17882 (__arm_vcmpneq_m_n_u8): Likewise.
17883 (__arm_vcmphiq_m_u8): Likewise.
17884 (__arm_vcmphiq_m_n_u8): Likewise.
17885 (__arm_vcmpeqq_m_u8): Likewise.
17886 (__arm_vcmpeqq_m_n_u8): Likewise.
17887 (__arm_vcmpcsq_m_u8): Likewise.
17888 (__arm_vcmpcsq_m_n_u8): Likewise.
17889 (__arm_vclzq_m_u8): Likewise.
17890 (__arm_vaddvaq_p_u8): Likewise.
17891 (__arm_vsriq_n_u8): Likewise.
17892 (__arm_vsliq_n_u8): Likewise.
17893 (__arm_vshlq_m_r_u8): Likewise.
17894 (__arm_vrshlq_m_n_u8): Likewise.
17895 (__arm_vqshlq_m_r_u8): Likewise.
17896 (__arm_vqrshlq_m_n_u8): Likewise.
17897 (__arm_vminavq_p_s8): Likewise.
17898 (__arm_vminaq_m_s8): Likewise.
17899 (__arm_vmaxavq_p_s8): Likewise.
17900 (__arm_vmaxaq_m_s8): Likewise.
17901 (__arm_vcmpneq_m_s8): Likewise.
17902 (__arm_vcmpneq_m_n_s8): Likewise.
17903 (__arm_vcmpltq_m_s8): Likewise.
17904 (__arm_vcmpltq_m_n_s8): Likewise.
17905 (__arm_vcmpleq_m_s8): Likewise.
17906 (__arm_vcmpleq_m_n_s8): Likewise.
17907 (__arm_vcmpgtq_m_s8): Likewise.
17908 (__arm_vcmpgtq_m_n_s8): Likewise.
17909 (__arm_vcmpgeq_m_s8): Likewise.
17910 (__arm_vcmpgeq_m_n_s8): Likewise.
17911 (__arm_vcmpeqq_m_s8): Likewise.
17912 (__arm_vcmpeqq_m_n_s8): Likewise.
17913 (__arm_vshlq_m_r_s8): Likewise.
17914 (__arm_vrshlq_m_n_s8): Likewise.
17915 (__arm_vrev64q_m_s8): Likewise.
17916 (__arm_vqshlq_m_r_s8): Likewise.
17917 (__arm_vqrshlq_m_n_s8): Likewise.
17918 (__arm_vqnegq_m_s8): Likewise.
17919 (__arm_vqabsq_m_s8): Likewise.
17920 (__arm_vnegq_m_s8): Likewise.
17921 (__arm_vmvnq_m_s8): Likewise.
17922 (__arm_vmlsdavxq_p_s8): Likewise.
17923 (__arm_vmlsdavq_p_s8): Likewise.
17924 (__arm_vmladavxq_p_s8): Likewise.
17925 (__arm_vmladavq_p_s8): Likewise.
17926 (__arm_vminvq_p_s8): Likewise.
17927 (__arm_vmaxvq_p_s8): Likewise.
17928 (__arm_vdupq_m_n_s8): Likewise.
17929 (__arm_vclzq_m_s8): Likewise.
17930 (__arm_vclsq_m_s8): Likewise.
17931 (__arm_vaddvaq_p_s8): Likewise.
17932 (__arm_vabsq_m_s8): Likewise.
17933 (__arm_vqrdmlsdhxq_s8): Likewise.
17934 (__arm_vqrdmlsdhq_s8): Likewise.
17935 (__arm_vqrdmlashq_n_s8): Likewise.
17936 (__arm_vqrdmlahq_n_s8): Likewise.
17937 (__arm_vqrdmladhxq_s8): Likewise.
17938 (__arm_vqrdmladhq_s8): Likewise.
17939 (__arm_vqdmlsdhxq_s8): Likewise.
17940 (__arm_vqdmlsdhq_s8): Likewise.
17941 (__arm_vqdmlahq_n_s8): Likewise.
17942 (__arm_vqdmladhxq_s8): Likewise.
17943 (__arm_vqdmladhq_s8): Likewise.
17944 (__arm_vmlsdavaxq_s8): Likewise.
17945 (__arm_vmlsdavaq_s8): Likewise.
17946 (__arm_vmlasq_n_s8): Likewise.
17947 (__arm_vmlaq_n_s8): Likewise.
17948 (__arm_vmladavaxq_s8): Likewise.
17949 (__arm_vmladavaq_s8): Likewise.
17950 (__arm_vsriq_n_s8): Likewise.
17951 (__arm_vsliq_n_s8): Likewise.
17952 (__arm_vpselq_u16): Likewise.
17953 (__arm_vpselq_s16): Likewise.
17954 (__arm_vrev64q_m_u16): Likewise.
17955 (__arm_vqrdmlashq_n_u16): Likewise.
17956 (__arm_vqrdmlahq_n_u16): Likewise.
17957 (__arm_vqdmlahq_n_u16): Likewise.
17958 (__arm_vmvnq_m_u16): Likewise.
17959 (__arm_vmlasq_n_u16): Likewise.
17960 (__arm_vmlaq_n_u16): Likewise.
17961 (__arm_vmladavq_p_u16): Likewise.
17962 (__arm_vmladavaq_u16): Likewise.
17963 (__arm_vminvq_p_u16): Likewise.
17964 (__arm_vmaxvq_p_u16): Likewise.
17965 (__arm_vdupq_m_n_u16): Likewise.
17966 (__arm_vcmpneq_m_u16): Likewise.
17967 (__arm_vcmpneq_m_n_u16): Likewise.
17968 (__arm_vcmphiq_m_u16): Likewise.
17969 (__arm_vcmphiq_m_n_u16): Likewise.
17970 (__arm_vcmpeqq_m_u16): Likewise.
17971 (__arm_vcmpeqq_m_n_u16): Likewise.
17972 (__arm_vcmpcsq_m_u16): Likewise.
17973 (__arm_vcmpcsq_m_n_u16): Likewise.
17974 (__arm_vclzq_m_u16): Likewise.
17975 (__arm_vaddvaq_p_u16): Likewise.
17976 (__arm_vsriq_n_u16): Likewise.
17977 (__arm_vsliq_n_u16): Likewise.
17978 (__arm_vshlq_m_r_u16): Likewise.
17979 (__arm_vrshlq_m_n_u16): Likewise.
17980 (__arm_vqshlq_m_r_u16): Likewise.
17981 (__arm_vqrshlq_m_n_u16): Likewise.
17982 (__arm_vminavq_p_s16): Likewise.
17983 (__arm_vminaq_m_s16): Likewise.
17984 (__arm_vmaxavq_p_s16): Likewise.
17985 (__arm_vmaxaq_m_s16): Likewise.
17986 (__arm_vcmpneq_m_s16): Likewise.
17987 (__arm_vcmpneq_m_n_s16): Likewise.
17988 (__arm_vcmpltq_m_s16): Likewise.
17989 (__arm_vcmpltq_m_n_s16): Likewise.
17990 (__arm_vcmpleq_m_s16): Likewise.
17991 (__arm_vcmpleq_m_n_s16): Likewise.
17992 (__arm_vcmpgtq_m_s16): Likewise.
17993 (__arm_vcmpgtq_m_n_s16): Likewise.
17994 (__arm_vcmpgeq_m_s16): Likewise.
17995 (__arm_vcmpgeq_m_n_s16): Likewise.
17996 (__arm_vcmpeqq_m_s16): Likewise.
17997 (__arm_vcmpeqq_m_n_s16): Likewise.
17998 (__arm_vshlq_m_r_s16): Likewise.
17999 (__arm_vrshlq_m_n_s16): Likewise.
18000 (__arm_vrev64q_m_s16): Likewise.
18001 (__arm_vqshlq_m_r_s16): Likewise.
18002 (__arm_vqrshlq_m_n_s16): Likewise.
18003 (__arm_vqnegq_m_s16): Likewise.
18004 (__arm_vqabsq_m_s16): Likewise.
18005 (__arm_vnegq_m_s16): Likewise.
18006 (__arm_vmvnq_m_s16): Likewise.
18007 (__arm_vmlsdavxq_p_s16): Likewise.
18008 (__arm_vmlsdavq_p_s16): Likewise.
18009 (__arm_vmladavxq_p_s16): Likewise.
18010 (__arm_vmladavq_p_s16): Likewise.
18011 (__arm_vminvq_p_s16): Likewise.
18012 (__arm_vmaxvq_p_s16): Likewise.
18013 (__arm_vdupq_m_n_s16): Likewise.
18014 (__arm_vclzq_m_s16): Likewise.
18015 (__arm_vclsq_m_s16): Likewise.
18016 (__arm_vaddvaq_p_s16): Likewise.
18017 (__arm_vabsq_m_s16): Likewise.
18018 (__arm_vqrdmlsdhxq_s16): Likewise.
18019 (__arm_vqrdmlsdhq_s16): Likewise.
18020 (__arm_vqrdmlashq_n_s16): Likewise.
18021 (__arm_vqrdmlahq_n_s16): Likewise.
18022 (__arm_vqrdmladhxq_s16): Likewise.
18023 (__arm_vqrdmladhq_s16): Likewise.
18024 (__arm_vqdmlsdhxq_s16): Likewise.
18025 (__arm_vqdmlsdhq_s16): Likewise.
18026 (__arm_vqdmlahq_n_s16): Likewise.
18027 (__arm_vqdmladhxq_s16): Likewise.
18028 (__arm_vqdmladhq_s16): Likewise.
18029 (__arm_vmlsdavaxq_s16): Likewise.
18030 (__arm_vmlsdavaq_s16): Likewise.
18031 (__arm_vmlasq_n_s16): Likewise.
18032 (__arm_vmlaq_n_s16): Likewise.
18033 (__arm_vmladavaxq_s16): Likewise.
18034 (__arm_vmladavaq_s16): Likewise.
18035 (__arm_vsriq_n_s16): Likewise.
18036 (__arm_vsliq_n_s16): Likewise.
18037 (__arm_vpselq_u32): Likewise.
18038 (__arm_vpselq_s32): Likewise.
18039 (__arm_vrev64q_m_u32): Likewise.
18040 (__arm_vqrdmlashq_n_u32): Likewise.
18041 (__arm_vqrdmlahq_n_u32): Likewise.
18042 (__arm_vqdmlahq_n_u32): Likewise.
18043 (__arm_vmvnq_m_u32): Likewise.
18044 (__arm_vmlasq_n_u32): Likewise.
18045 (__arm_vmlaq_n_u32): Likewise.
18046 (__arm_vmladavq_p_u32): Likewise.
18047 (__arm_vmladavaq_u32): Likewise.
18048 (__arm_vminvq_p_u32): Likewise.
18049 (__arm_vmaxvq_p_u32): Likewise.
18050 (__arm_vdupq_m_n_u32): Likewise.
18051 (__arm_vcmpneq_m_u32): Likewise.
18052 (__arm_vcmpneq_m_n_u32): Likewise.
18053 (__arm_vcmphiq_m_u32): Likewise.
18054 (__arm_vcmphiq_m_n_u32): Likewise.
18055 (__arm_vcmpeqq_m_u32): Likewise.
18056 (__arm_vcmpeqq_m_n_u32): Likewise.
18057 (__arm_vcmpcsq_m_u32): Likewise.
18058 (__arm_vcmpcsq_m_n_u32): Likewise.
18059 (__arm_vclzq_m_u32): Likewise.
18060 (__arm_vaddvaq_p_u32): Likewise.
18061 (__arm_vsriq_n_u32): Likewise.
18062 (__arm_vsliq_n_u32): Likewise.
18063 (__arm_vshlq_m_r_u32): Likewise.
18064 (__arm_vrshlq_m_n_u32): Likewise.
18065 (__arm_vqshlq_m_r_u32): Likewise.
18066 (__arm_vqrshlq_m_n_u32): Likewise.
18067 (__arm_vminavq_p_s32): Likewise.
18068 (__arm_vminaq_m_s32): Likewise.
18069 (__arm_vmaxavq_p_s32): Likewise.
18070 (__arm_vmaxaq_m_s32): Likewise.
18071 (__arm_vcmpneq_m_s32): Likewise.
18072 (__arm_vcmpneq_m_n_s32): Likewise.
18073 (__arm_vcmpltq_m_s32): Likewise.
18074 (__arm_vcmpltq_m_n_s32): Likewise.
18075 (__arm_vcmpleq_m_s32): Likewise.
18076 (__arm_vcmpleq_m_n_s32): Likewise.
18077 (__arm_vcmpgtq_m_s32): Likewise.
18078 (__arm_vcmpgtq_m_n_s32): Likewise.
18079 (__arm_vcmpgeq_m_s32): Likewise.
18080 (__arm_vcmpgeq_m_n_s32): Likewise.
18081 (__arm_vcmpeqq_m_s32): Likewise.
18082 (__arm_vcmpeqq_m_n_s32): Likewise.
18083 (__arm_vshlq_m_r_s32): Likewise.
18084 (__arm_vrshlq_m_n_s32): Likewise.
18085 (__arm_vrev64q_m_s32): Likewise.
18086 (__arm_vqshlq_m_r_s32): Likewise.
18087 (__arm_vqrshlq_m_n_s32): Likewise.
18088 (__arm_vqnegq_m_s32): Likewise.
18089 (__arm_vqabsq_m_s32): Likewise.
18090 (__arm_vnegq_m_s32): Likewise.
18091 (__arm_vmvnq_m_s32): Likewise.
18092 (__arm_vmlsdavxq_p_s32): Likewise.
18093 (__arm_vmlsdavq_p_s32): Likewise.
18094 (__arm_vmladavxq_p_s32): Likewise.
18095 (__arm_vmladavq_p_s32): Likewise.
18096 (__arm_vminvq_p_s32): Likewise.
18097 (__arm_vmaxvq_p_s32): Likewise.
18098 (__arm_vdupq_m_n_s32): Likewise.
18099 (__arm_vclzq_m_s32): Likewise.
18100 (__arm_vclsq_m_s32): Likewise.
18101 (__arm_vaddvaq_p_s32): Likewise.
18102 (__arm_vabsq_m_s32): Likewise.
18103 (__arm_vqrdmlsdhxq_s32): Likewise.
18104 (__arm_vqrdmlsdhq_s32): Likewise.
18105 (__arm_vqrdmlashq_n_s32): Likewise.
18106 (__arm_vqrdmlahq_n_s32): Likewise.
18107 (__arm_vqrdmladhxq_s32): Likewise.
18108 (__arm_vqrdmladhq_s32): Likewise.
18109 (__arm_vqdmlsdhxq_s32): Likewise.
18110 (__arm_vqdmlsdhq_s32): Likewise.
18111 (__arm_vqdmlahq_n_s32): Likewise.
18112 (__arm_vqdmladhxq_s32): Likewise.
18113 (__arm_vqdmladhq_s32): Likewise.
18114 (__arm_vmlsdavaxq_s32): Likewise.
18115 (__arm_vmlsdavaq_s32): Likewise.
18116 (__arm_vmlasq_n_s32): Likewise.
18117 (__arm_vmlaq_n_s32): Likewise.
18118 (__arm_vmladavaxq_s32): Likewise.
18119 (__arm_vmladavaq_s32): Likewise.
18120 (__arm_vsriq_n_s32): Likewise.
18121 (__arm_vsliq_n_s32): Likewise.
18122 (__arm_vpselq_u64): Likewise.
18123 (__arm_vpselq_s64): Likewise.
18124 (vcmpneq_m_n): Define polymorphic variant.
18125 (vcmpneq_m): Likewise.
18126 (vqrdmlsdhq): Likewise.
18127 (vqrdmlsdhxq): Likewise.
18128 (vqrshlq_m_n): Likewise.
18129 (vqshlq_m_r): Likewise.
18130 (vrev64q_m): Likewise.
18131 (vrshlq_m_n): Likewise.
18132 (vshlq_m_r): Likewise.
18133 (vsliq_n): Likewise.
18134 (vsriq_n): Likewise.
18135 (vqrdmlashq_n): Likewise.
18136 (vqrdmlahq): Likewise.
18137 (vqrdmladhxq): Likewise.
18138 (vqrdmladhq): Likewise.
18139 (vqnegq_m): Likewise.
18140 (vqdmlsdhxq): Likewise.
18141 (vabsq_m): Likewise.
18142 (vclsq_m): Likewise.
18143 (vclzq_m): Likewise.
18144 (vcmpgeq_m): Likewise.
18145 (vcmpgeq_m_n): Likewise.
18146 (vdupq_m_n): Likewise.
18147 (vmaxaq_m): Likewise.
18148 (vmlaq_n): Likewise.
18149 (vmlasq_n): Likewise.
18150 (vmvnq_m): Likewise.
18151 (vnegq_m): Likewise.
18152 (vpselq): Likewise.
18153 (vqdmlahq_n): Likewise.
18154 (vqrdmlahq_n): Likewise.
18155 (vqdmlsdhq): Likewise.
18156 (vqdmladhq): Likewise.
18157 (vqabsq_m): Likewise.
18158 (vminaq_m): Likewise.
18159 (vrmlaldavhaq): Likewise.
18160 (vmlsdavxq_p): Likewise.
18161 (vmlsdavq_p): Likewise.
18162 (vmlsdavaxq): Likewise.
18163 (vmlsdavaq): Likewise.
18164 (vaddvaq_p): Likewise.
18165 (vcmpcsq_m_n): Likewise.
18166 (vcmpcsq_m): Likewise.
18167 (vcmpeqq_m_n): Likewise.
18168 (vcmpeqq_m): Likewise.
18169 (vmladavxq_p): Likewise.
18170 (vmladavq_p): Likewise.
18171 (vmladavaxq): Likewise.
18172 (vmladavaq): Likewise.
18173 (vminvq_p): Likewise.
18174 (vminavq_p): Likewise.
18175 (vmaxvq_p): Likewise.
18176 (vmaxavq_p): Likewise.
18177 (vcmpltq_m_n): Likewise.
18178 (vcmpltq_m): Likewise.
18179 (vcmpleq_m): Likewise.
18180 (vcmpleq_m_n): Likewise.
18181 (vcmphiq_m_n): Likewise.
18182 (vcmphiq_m): Likewise.
18183 (vcmpgtq_m_n): Likewise.
18184 (vcmpgtq_m): Likewise.
18185 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
18187 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
18188 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
18189 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
18190 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
18191 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
18192 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
18193 * config/arm/constraints.md (Rc): Define constraint to check constant is
18194 in the range of 0 to 15.
18195 (Re): Define constraint to check constant is in the range of 0 to 31.
18196 * config/arm/mve.md (VADDVAQ_P): Define iterator.
18197 (VCLZQ_M): Likewise.
18198 (VCMPEQQ_M_N): Likewise.
18199 (VCMPEQQ_M): Likewise.
18200 (VCMPNEQ_M_N): Likewise.
18201 (VCMPNEQ_M): Likewise.
18202 (VDUPQ_M_N): Likewise.
18203 (VMAXVQ_P): Likewise.
18204 (VMINVQ_P): Likewise.
18205 (VMLADAVAQ): Likewise.
18206 (VMLADAVQ_P): Likewise.
18207 (VMLAQ_N): Likewise.
18208 (VMLASQ_N): Likewise.
18209 (VMVNQ_M): Likewise.
18210 (VPSELQ): Likewise.
18211 (VQDMLAHQ_N): Likewise.
18212 (VQRDMLAHQ_N): Likewise.
18213 (VQRDMLASHQ_N): Likewise.
18214 (VQRSHLQ_M_N): Likewise.
18215 (VQSHLQ_M_R): Likewise.
18216 (VREV64Q_M): Likewise.
18217 (VRSHLQ_M_N): Likewise.
18218 (VSHLQ_M_R): Likewise.
18219 (VSLIQ_N): Likewise.
18220 (VSRIQ_N): Likewise.
18221 (mve_vabsq_m_s<mode>): Define RTL pattern.
18222 (mve_vaddvaq_p_<supf><mode>): Likewise.
18223 (mve_vclsq_m_s<mode>): Likewise.
18224 (mve_vclzq_m_<supf><mode>): Likewise.
18225 (mve_vcmpcsq_m_n_u<mode>): Likewise.
18226 (mve_vcmpcsq_m_u<mode>): Likewise.
18227 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
18228 (mve_vcmpeqq_m_<supf><mode>): Likewise.
18229 (mve_vcmpgeq_m_n_s<mode>): Likewise.
18230 (mve_vcmpgeq_m_s<mode>): Likewise.
18231 (mve_vcmpgtq_m_n_s<mode>): Likewise.
18232 (mve_vcmpgtq_m_s<mode>): Likewise.
18233 (mve_vcmphiq_m_n_u<mode>): Likewise.
18234 (mve_vcmphiq_m_u<mode>): Likewise.
18235 (mve_vcmpleq_m_n_s<mode>): Likewise.
18236 (mve_vcmpleq_m_s<mode>): Likewise.
18237 (mve_vcmpltq_m_n_s<mode>): Likewise.
18238 (mve_vcmpltq_m_s<mode>): Likewise.
18239 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
18240 (mve_vcmpneq_m_<supf><mode>): Likewise.
18241 (mve_vdupq_m_n_<supf><mode>): Likewise.
18242 (mve_vmaxaq_m_s<mode>): Likewise.
18243 (mve_vmaxavq_p_s<mode>): Likewise.
18244 (mve_vmaxvq_p_<supf><mode>): Likewise.
18245 (mve_vminaq_m_s<mode>): Likewise.
18246 (mve_vminavq_p_s<mode>): Likewise.
18247 (mve_vminvq_p_<supf><mode>): Likewise.
18248 (mve_vmladavaq_<supf><mode>): Likewise.
18249 (mve_vmladavq_p_<supf><mode>): Likewise.
18250 (mve_vmladavxq_p_s<mode>): Likewise.
18251 (mve_vmlaq_n_<supf><mode>): Likewise.
18252 (mve_vmlasq_n_<supf><mode>): Likewise.
18253 (mve_vmlsdavq_p_s<mode>): Likewise.
18254 (mve_vmlsdavxq_p_s<mode>): Likewise.
18255 (mve_vmvnq_m_<supf><mode>): Likewise.
18256 (mve_vnegq_m_s<mode>): Likewise.
18257 (mve_vpselq_<supf><mode>): Likewise.
18258 (mve_vqabsq_m_s<mode>): Likewise.
18259 (mve_vqdmlahq_n_<supf><mode>): Likewise.
18260 (mve_vqnegq_m_s<mode>): Likewise.
18261 (mve_vqrdmladhq_s<mode>): Likewise.
18262 (mve_vqrdmladhxq_s<mode>): Likewise.
18263 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
18264 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
18265 (mve_vqrdmlsdhq_s<mode>): Likewise.
18266 (mve_vqrdmlsdhxq_s<mode>): Likewise.
18267 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
18268 (mve_vqshlq_m_r_<supf><mode>): Likewise.
18269 (mve_vrev64q_m_<supf><mode>): Likewise.
18270 (mve_vrshlq_m_n_<supf><mode>): Likewise.
18271 (mve_vshlq_m_r_<supf><mode>): Likewise.
18272 (mve_vsliq_n_<supf><mode>): Likewise.
18273 (mve_vsriq_n_<supf><mode>): Likewise.
18274 (mve_vqdmlsdhxq_s<mode>): Likewise.
18275 (mve_vqdmlsdhq_s<mode>): Likewise.
18276 (mve_vqdmladhxq_s<mode>): Likewise.
18277 (mve_vqdmladhq_s<mode>): Likewise.
18278 (mve_vmlsdavaxq_s<mode>): Likewise.
18279 (mve_vmlsdavaq_s<mode>): Likewise.
18280 (mve_vmladavaxq_s<mode>): Likewise.
18281 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
18282 matching constraint Rc.
18283 (mve_imm_31): Define predicate to check the matching constraint Re.
18285 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
18287 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
18288 (vec_cmp<mode>di_dup): Likewise.
18289 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
18291 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
18293 * config/gcn/gcn-valu.md (COND_MODE): Delete.
18294 (COND_INT_MODE): Delete.
18295 (cond_op): Add "mult".
18296 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
18297 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
18299 2020-03-18 Richard Biener <rguenther@suse.de>
18301 PR middle-end/94206
18302 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
18303 partial int modes or not mode-precision integer types for
18306 2020-03-18 Jakub Jelinek <jakub@redhat.com>
18308 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
18310 * config/arc/arc.c (frame_stack_add): Likewise.
18311 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
18313 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
18314 * tree-ssa-strlen.h (handle_printf_call): Likewise.
18315 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
18316 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
18318 2020-03-18 Duan bo <duanbo3@huawei.com>
18321 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
18322 (@ldr_got_tiny_<mode>): New pattern.
18323 (ldr_got_tiny_sidi): Likewise.
18324 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
18325 them to handle SYMBOL_TINY_GOT for ILP32.
18327 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
18329 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
18330 call-preserved for SVE PCS functions.
18331 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
18332 Optimize the case in which there are no following vector save slots.
18334 2020-03-18 Richard Biener <rguenther@suse.de>
18336 PR middle-end/94188
18337 * fold-const.c (build_fold_addr_expr): Convert address to
18339 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
18340 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
18341 to build the ADDR_EXPR which we don't really want to simplify.
18342 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
18343 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
18344 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
18345 (simplify_builtin_call): Strip useless type conversions.
18346 * tree-ssa-strlen.c (new_strinfo): Likewise.
18348 2020-03-17 Alexey Neyman <stilor@att.net>
18351 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
18352 the debug level is terse and the declaration is public. Do not
18353 generate type info.
18354 (dwarf2out_decl): Same.
18355 (add_type_attribute): Return immediately if debug level is
18358 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
18360 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
18362 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18363 Mihail Ionescu <mihail.ionescu@arm.com>
18364 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18366 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
18367 Define qualifier for ternary operands.
18368 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
18369 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18370 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18371 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
18372 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
18373 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
18374 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18375 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
18376 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18377 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
18378 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
18379 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
18380 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
18381 * config/arm/arm_mve.h (vabavq_s8): Define macro.
18382 (vabavq_s16): Likewise.
18383 (vabavq_s32): Likewise.
18384 (vbicq_m_n_s16): Likewise.
18385 (vbicq_m_n_s32): Likewise.
18386 (vbicq_m_n_u16): Likewise.
18387 (vbicq_m_n_u32): Likewise.
18388 (vcmpeqq_m_f16): Likewise.
18389 (vcmpeqq_m_f32): Likewise.
18390 (vcvtaq_m_s16_f16): Likewise.
18391 (vcvtaq_m_u16_f16): Likewise.
18392 (vcvtaq_m_s32_f32): Likewise.
18393 (vcvtaq_m_u32_f32): Likewise.
18394 (vcvtq_m_f16_s16): Likewise.
18395 (vcvtq_m_f16_u16): Likewise.
18396 (vcvtq_m_f32_s32): Likewise.
18397 (vcvtq_m_f32_u32): Likewise.
18398 (vqrshrnbq_n_s16): Likewise.
18399 (vqrshrnbq_n_u16): Likewise.
18400 (vqrshrnbq_n_s32): Likewise.
18401 (vqrshrnbq_n_u32): Likewise.
18402 (vqrshrunbq_n_s16): Likewise.
18403 (vqrshrunbq_n_s32): Likewise.
18404 (vrmlaldavhaq_s32): Likewise.
18405 (vrmlaldavhaq_u32): Likewise.
18406 (vshlcq_s8): Likewise.
18407 (vshlcq_u8): Likewise.
18408 (vshlcq_s16): Likewise.
18409 (vshlcq_u16): Likewise.
18410 (vshlcq_s32): Likewise.
18411 (vshlcq_u32): Likewise.
18412 (vabavq_u8): Likewise.
18413 (vabavq_u16): Likewise.
18414 (vabavq_u32): Likewise.
18415 (__arm_vabavq_s8): Define intrinsic.
18416 (__arm_vabavq_s16): Likewise.
18417 (__arm_vabavq_s32): Likewise.
18418 (__arm_vabavq_u8): Likewise.
18419 (__arm_vabavq_u16): Likewise.
18420 (__arm_vabavq_u32): Likewise.
18421 (__arm_vbicq_m_n_s16): Likewise.
18422 (__arm_vbicq_m_n_s32): Likewise.
18423 (__arm_vbicq_m_n_u16): Likewise.
18424 (__arm_vbicq_m_n_u32): Likewise.
18425 (__arm_vqrshrnbq_n_s16): Likewise.
18426 (__arm_vqrshrnbq_n_u16): Likewise.
18427 (__arm_vqrshrnbq_n_s32): Likewise.
18428 (__arm_vqrshrnbq_n_u32): Likewise.
18429 (__arm_vqrshrunbq_n_s16): Likewise.
18430 (__arm_vqrshrunbq_n_s32): Likewise.
18431 (__arm_vrmlaldavhaq_s32): Likewise.
18432 (__arm_vrmlaldavhaq_u32): Likewise.
18433 (__arm_vshlcq_s8): Likewise.
18434 (__arm_vshlcq_u8): Likewise.
18435 (__arm_vshlcq_s16): Likewise.
18436 (__arm_vshlcq_u16): Likewise.
18437 (__arm_vshlcq_s32): Likewise.
18438 (__arm_vshlcq_u32): Likewise.
18439 (__arm_vcmpeqq_m_f16): Likewise.
18440 (__arm_vcmpeqq_m_f32): Likewise.
18441 (__arm_vcvtaq_m_s16_f16): Likewise.
18442 (__arm_vcvtaq_m_u16_f16): Likewise.
18443 (__arm_vcvtaq_m_s32_f32): Likewise.
18444 (__arm_vcvtaq_m_u32_f32): Likewise.
18445 (__arm_vcvtq_m_f16_s16): Likewise.
18446 (__arm_vcvtq_m_f16_u16): Likewise.
18447 (__arm_vcvtq_m_f32_s32): Likewise.
18448 (__arm_vcvtq_m_f32_u32): Likewise.
18449 (vcvtaq_m): Define polymorphic variant.
18450 (vcvtq_m): Likewise.
18451 (vabavq): Likewise.
18452 (vshlcq): Likewise.
18453 (vbicq_m_n): Likewise.
18454 (vqrshrnbq_n): Likewise.
18455 (vqrshrunbq_n): Likewise.
18456 * config/arm/arm_mve_builtins.def
18457 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
18458 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
18459 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18460 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18461 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
18462 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
18463 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
18464 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18465 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
18466 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18467 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
18468 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
18469 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
18470 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
18471 * config/arm/mve.md (VBICQ_M_N): Define iterator.
18472 (VCVTAQ_M): Likewise.
18473 (VCVTQ_M_TO_F): Likewise.
18474 (VQRSHRNBQ_N): Likewise.
18475 (VABAVQ): Likewise.
18476 (VSHLCQ): Likewise.
18477 (VRMLALDAVHAQ): Likewise.
18478 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
18479 (mve_vcmpeqq_m_f<mode>): Likewise.
18480 (mve_vcvtaq_m_<supf><mode>): Likewise.
18481 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
18482 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
18483 (mve_vqrshrunbq_n_s<mode>): Likewise.
18484 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
18485 (mve_vabavq_<supf><mode>): Likewise.
18486 (mve_vshlcq_<supf><mode>): Likewise.
18487 (mve_vshlcq_<supf><mode>): Likewise.
18488 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
18489 (mve_vshlcq_carry_<supf><mode>): Likewise.
18491 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18492 Mihail Ionescu <mihail.ionescu@arm.com>
18493 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18495 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
18496 (vqmovnbq_u16): Likewise.
18497 (vmulltq_poly_p8): Likewise.
18498 (vmullbq_poly_p8): Likewise.
18499 (vmovntq_u16): Likewise.
18500 (vmovnbq_u16): Likewise.
18501 (vmlaldavxq_u16): Likewise.
18502 (vmlaldavq_u16): Likewise.
18503 (vqmovuntq_s16): Likewise.
18504 (vqmovunbq_s16): Likewise.
18505 (vshlltq_n_u8): Likewise.
18506 (vshllbq_n_u8): Likewise.
18507 (vorrq_n_u16): Likewise.
18508 (vbicq_n_u16): Likewise.
18509 (vcmpneq_n_f16): Likewise.
18510 (vcmpneq_f16): Likewise.
18511 (vcmpltq_n_f16): Likewise.
18512 (vcmpltq_f16): Likewise.
18513 (vcmpleq_n_f16): Likewise.
18514 (vcmpleq_f16): Likewise.
18515 (vcmpgtq_n_f16): Likewise.
18516 (vcmpgtq_f16): Likewise.
18517 (vcmpgeq_n_f16): Likewise.
18518 (vcmpgeq_f16): Likewise.
18519 (vcmpeqq_n_f16): Likewise.
18520 (vcmpeqq_f16): Likewise.
18521 (vsubq_f16): Likewise.
18522 (vqmovntq_s16): Likewise.
18523 (vqmovnbq_s16): Likewise.
18524 (vqdmulltq_s16): Likewise.
18525 (vqdmulltq_n_s16): Likewise.
18526 (vqdmullbq_s16): Likewise.
18527 (vqdmullbq_n_s16): Likewise.
18528 (vorrq_f16): Likewise.
18529 (vornq_f16): Likewise.
18530 (vmulq_n_f16): Likewise.
18531 (vmulq_f16): Likewise.
18532 (vmovntq_s16): Likewise.
18533 (vmovnbq_s16): Likewise.
18534 (vmlsldavxq_s16): Likewise.
18535 (vmlsldavq_s16): Likewise.
18536 (vmlaldavxq_s16): Likewise.
18537 (vmlaldavq_s16): Likewise.
18538 (vminnmvq_f16): Likewise.
18539 (vminnmq_f16): Likewise.
18540 (vminnmavq_f16): Likewise.
18541 (vminnmaq_f16): Likewise.
18542 (vmaxnmvq_f16): Likewise.
18543 (vmaxnmq_f16): Likewise.
18544 (vmaxnmavq_f16): Likewise.
18545 (vmaxnmaq_f16): Likewise.
18546 (veorq_f16): Likewise.
18547 (vcmulq_rot90_f16): Likewise.
18548 (vcmulq_rot270_f16): Likewise.
18549 (vcmulq_rot180_f16): Likewise.
18550 (vcmulq_f16): Likewise.
18551 (vcaddq_rot90_f16): Likewise.
18552 (vcaddq_rot270_f16): Likewise.
18553 (vbicq_f16): Likewise.
18554 (vandq_f16): Likewise.
18555 (vaddq_n_f16): Likewise.
18556 (vabdq_f16): Likewise.
18557 (vshlltq_n_s8): Likewise.
18558 (vshllbq_n_s8): Likewise.
18559 (vorrq_n_s16): Likewise.
18560 (vbicq_n_s16): Likewise.
18561 (vqmovntq_u32): Likewise.
18562 (vqmovnbq_u32): Likewise.
18563 (vmulltq_poly_p16): Likewise.
18564 (vmullbq_poly_p16): Likewise.
18565 (vmovntq_u32): Likewise.
18566 (vmovnbq_u32): Likewise.
18567 (vmlaldavxq_u32): Likewise.
18568 (vmlaldavq_u32): Likewise.
18569 (vqmovuntq_s32): Likewise.
18570 (vqmovunbq_s32): Likewise.
18571 (vshlltq_n_u16): Likewise.
18572 (vshllbq_n_u16): Likewise.
18573 (vorrq_n_u32): Likewise.
18574 (vbicq_n_u32): Likewise.
18575 (vcmpneq_n_f32): Likewise.
18576 (vcmpneq_f32): Likewise.
18577 (vcmpltq_n_f32): Likewise.
18578 (vcmpltq_f32): Likewise.
18579 (vcmpleq_n_f32): Likewise.
18580 (vcmpleq_f32): Likewise.
18581 (vcmpgtq_n_f32): Likewise.
18582 (vcmpgtq_f32): Likewise.
18583 (vcmpgeq_n_f32): Likewise.
18584 (vcmpgeq_f32): Likewise.
18585 (vcmpeqq_n_f32): Likewise.
18586 (vcmpeqq_f32): Likewise.
18587 (vsubq_f32): Likewise.
18588 (vqmovntq_s32): Likewise.
18589 (vqmovnbq_s32): Likewise.
18590 (vqdmulltq_s32): Likewise.
18591 (vqdmulltq_n_s32): Likewise.
18592 (vqdmullbq_s32): Likewise.
18593 (vqdmullbq_n_s32): Likewise.
18594 (vorrq_f32): Likewise.
18595 (vornq_f32): Likewise.
18596 (vmulq_n_f32): Likewise.
18597 (vmulq_f32): Likewise.
18598 (vmovntq_s32): Likewise.
18599 (vmovnbq_s32): Likewise.
18600 (vmlsldavxq_s32): Likewise.
18601 (vmlsldavq_s32): Likewise.
18602 (vmlaldavxq_s32): Likewise.
18603 (vmlaldavq_s32): Likewise.
18604 (vminnmvq_f32): Likewise.
18605 (vminnmq_f32): Likewise.
18606 (vminnmavq_f32): Likewise.
18607 (vminnmaq_f32): Likewise.
18608 (vmaxnmvq_f32): Likewise.
18609 (vmaxnmq_f32): Likewise.
18610 (vmaxnmavq_f32): Likewise.
18611 (vmaxnmaq_f32): Likewise.
18612 (veorq_f32): Likewise.
18613 (vcmulq_rot90_f32): Likewise.
18614 (vcmulq_rot270_f32): Likewise.
18615 (vcmulq_rot180_f32): Likewise.
18616 (vcmulq_f32): Likewise.
18617 (vcaddq_rot90_f32): Likewise.
18618 (vcaddq_rot270_f32): Likewise.
18619 (vbicq_f32): Likewise.
18620 (vandq_f32): Likewise.
18621 (vaddq_n_f32): Likewise.
18622 (vabdq_f32): Likewise.
18623 (vshlltq_n_s16): Likewise.
18624 (vshllbq_n_s16): Likewise.
18625 (vorrq_n_s32): Likewise.
18626 (vbicq_n_s32): Likewise.
18627 (vrmlaldavhq_u32): Likewise.
18628 (vctp8q_m): Likewise.
18629 (vctp64q_m): Likewise.
18630 (vctp32q_m): Likewise.
18631 (vctp16q_m): Likewise.
18632 (vaddlvaq_u32): Likewise.
18633 (vrmlsldavhxq_s32): Likewise.
18634 (vrmlsldavhq_s32): Likewise.
18635 (vrmlaldavhxq_s32): Likewise.
18636 (vrmlaldavhq_s32): Likewise.
18637 (vcvttq_f16_f32): Likewise.
18638 (vcvtbq_f16_f32): Likewise.
18639 (vaddlvaq_s32): Likewise.
18640 (__arm_vqmovntq_u16): Define intrinsic.
18641 (__arm_vqmovnbq_u16): Likewise.
18642 (__arm_vmulltq_poly_p8): Likewise.
18643 (__arm_vmullbq_poly_p8): Likewise.
18644 (__arm_vmovntq_u16): Likewise.
18645 (__arm_vmovnbq_u16): Likewise.
18646 (__arm_vmlaldavxq_u16): Likewise.
18647 (__arm_vmlaldavq_u16): Likewise.
18648 (__arm_vqmovuntq_s16): Likewise.
18649 (__arm_vqmovunbq_s16): Likewise.
18650 (__arm_vshlltq_n_u8): Likewise.
18651 (__arm_vshllbq_n_u8): Likewise.
18652 (__arm_vorrq_n_u16): Likewise.
18653 (__arm_vbicq_n_u16): Likewise.
18654 (__arm_vcmpneq_n_f16): Likewise.
18655 (__arm_vcmpneq_f16): Likewise.
18656 (__arm_vcmpltq_n_f16): Likewise.
18657 (__arm_vcmpltq_f16): Likewise.
18658 (__arm_vcmpleq_n_f16): Likewise.
18659 (__arm_vcmpleq_f16): Likewise.
18660 (__arm_vcmpgtq_n_f16): Likewise.
18661 (__arm_vcmpgtq_f16): Likewise.
18662 (__arm_vcmpgeq_n_f16): Likewise.
18663 (__arm_vcmpgeq_f16): Likewise.
18664 (__arm_vcmpeqq_n_f16): Likewise.
18665 (__arm_vcmpeqq_f16): Likewise.
18666 (__arm_vsubq_f16): Likewise.
18667 (__arm_vqmovntq_s16): Likewise.
18668 (__arm_vqmovnbq_s16): Likewise.
18669 (__arm_vqdmulltq_s16): Likewise.
18670 (__arm_vqdmulltq_n_s16): Likewise.
18671 (__arm_vqdmullbq_s16): Likewise.
18672 (__arm_vqdmullbq_n_s16): Likewise.
18673 (__arm_vorrq_f16): Likewise.
18674 (__arm_vornq_f16): Likewise.
18675 (__arm_vmulq_n_f16): Likewise.
18676 (__arm_vmulq_f16): Likewise.
18677 (__arm_vmovntq_s16): Likewise.
18678 (__arm_vmovnbq_s16): Likewise.
18679 (__arm_vmlsldavxq_s16): Likewise.
18680 (__arm_vmlsldavq_s16): Likewise.
18681 (__arm_vmlaldavxq_s16): Likewise.
18682 (__arm_vmlaldavq_s16): Likewise.
18683 (__arm_vminnmvq_f16): Likewise.
18684 (__arm_vminnmq_f16): Likewise.
18685 (__arm_vminnmavq_f16): Likewise.
18686 (__arm_vminnmaq_f16): Likewise.
18687 (__arm_vmaxnmvq_f16): Likewise.
18688 (__arm_vmaxnmq_f16): Likewise.
18689 (__arm_vmaxnmavq_f16): Likewise.
18690 (__arm_vmaxnmaq_f16): Likewise.
18691 (__arm_veorq_f16): Likewise.
18692 (__arm_vcmulq_rot90_f16): Likewise.
18693 (__arm_vcmulq_rot270_f16): Likewise.
18694 (__arm_vcmulq_rot180_f16): Likewise.
18695 (__arm_vcmulq_f16): Likewise.
18696 (__arm_vcaddq_rot90_f16): Likewise.
18697 (__arm_vcaddq_rot270_f16): Likewise.
18698 (__arm_vbicq_f16): Likewise.
18699 (__arm_vandq_f16): Likewise.
18700 (__arm_vaddq_n_f16): Likewise.
18701 (__arm_vabdq_f16): Likewise.
18702 (__arm_vshlltq_n_s8): Likewise.
18703 (__arm_vshllbq_n_s8): Likewise.
18704 (__arm_vorrq_n_s16): Likewise.
18705 (__arm_vbicq_n_s16): Likewise.
18706 (__arm_vqmovntq_u32): Likewise.
18707 (__arm_vqmovnbq_u32): Likewise.
18708 (__arm_vmulltq_poly_p16): Likewise.
18709 (__arm_vmullbq_poly_p16): Likewise.
18710 (__arm_vmovntq_u32): Likewise.
18711 (__arm_vmovnbq_u32): Likewise.
18712 (__arm_vmlaldavxq_u32): Likewise.
18713 (__arm_vmlaldavq_u32): Likewise.
18714 (__arm_vqmovuntq_s32): Likewise.
18715 (__arm_vqmovunbq_s32): Likewise.
18716 (__arm_vshlltq_n_u16): Likewise.
18717 (__arm_vshllbq_n_u16): Likewise.
18718 (__arm_vorrq_n_u32): Likewise.
18719 (__arm_vbicq_n_u32): Likewise.
18720 (__arm_vcmpneq_n_f32): Likewise.
18721 (__arm_vcmpneq_f32): Likewise.
18722 (__arm_vcmpltq_n_f32): Likewise.
18723 (__arm_vcmpltq_f32): Likewise.
18724 (__arm_vcmpleq_n_f32): Likewise.
18725 (__arm_vcmpleq_f32): Likewise.
18726 (__arm_vcmpgtq_n_f32): Likewise.
18727 (__arm_vcmpgtq_f32): Likewise.
18728 (__arm_vcmpgeq_n_f32): Likewise.
18729 (__arm_vcmpgeq_f32): Likewise.
18730 (__arm_vcmpeqq_n_f32): Likewise.
18731 (__arm_vcmpeqq_f32): Likewise.
18732 (__arm_vsubq_f32): Likewise.
18733 (__arm_vqmovntq_s32): Likewise.
18734 (__arm_vqmovnbq_s32): Likewise.
18735 (__arm_vqdmulltq_s32): Likewise.
18736 (__arm_vqdmulltq_n_s32): Likewise.
18737 (__arm_vqdmullbq_s32): Likewise.
18738 (__arm_vqdmullbq_n_s32): Likewise.
18739 (__arm_vorrq_f32): Likewise.
18740 (__arm_vornq_f32): Likewise.
18741 (__arm_vmulq_n_f32): Likewise.
18742 (__arm_vmulq_f32): Likewise.
18743 (__arm_vmovntq_s32): Likewise.
18744 (__arm_vmovnbq_s32): Likewise.
18745 (__arm_vmlsldavxq_s32): Likewise.
18746 (__arm_vmlsldavq_s32): Likewise.
18747 (__arm_vmlaldavxq_s32): Likewise.
18748 (__arm_vmlaldavq_s32): Likewise.
18749 (__arm_vminnmvq_f32): Likewise.
18750 (__arm_vminnmq_f32): Likewise.
18751 (__arm_vminnmavq_f32): Likewise.
18752 (__arm_vminnmaq_f32): Likewise.
18753 (__arm_vmaxnmvq_f32): Likewise.
18754 (__arm_vmaxnmq_f32): Likewise.
18755 (__arm_vmaxnmavq_f32): Likewise.
18756 (__arm_vmaxnmaq_f32): Likewise.
18757 (__arm_veorq_f32): Likewise.
18758 (__arm_vcmulq_rot90_f32): Likewise.
18759 (__arm_vcmulq_rot270_f32): Likewise.
18760 (__arm_vcmulq_rot180_f32): Likewise.
18761 (__arm_vcmulq_f32): Likewise.
18762 (__arm_vcaddq_rot90_f32): Likewise.
18763 (__arm_vcaddq_rot270_f32): Likewise.
18764 (__arm_vbicq_f32): Likewise.
18765 (__arm_vandq_f32): Likewise.
18766 (__arm_vaddq_n_f32): Likewise.
18767 (__arm_vabdq_f32): Likewise.
18768 (__arm_vshlltq_n_s16): Likewise.
18769 (__arm_vshllbq_n_s16): Likewise.
18770 (__arm_vorrq_n_s32): Likewise.
18771 (__arm_vbicq_n_s32): Likewise.
18772 (__arm_vrmlaldavhq_u32): Likewise.
18773 (__arm_vctp8q_m): Likewise.
18774 (__arm_vctp64q_m): Likewise.
18775 (__arm_vctp32q_m): Likewise.
18776 (__arm_vctp16q_m): Likewise.
18777 (__arm_vaddlvaq_u32): Likewise.
18778 (__arm_vrmlsldavhxq_s32): Likewise.
18779 (__arm_vrmlsldavhq_s32): Likewise.
18780 (__arm_vrmlaldavhxq_s32): Likewise.
18781 (__arm_vrmlaldavhq_s32): Likewise.
18782 (__arm_vcvttq_f16_f32): Likewise.
18783 (__arm_vcvtbq_f16_f32): Likewise.
18784 (__arm_vaddlvaq_s32): Likewise.
18785 (vst4q): Define polymorphic variant.
18786 (vrndxq): Likewise.
18788 (vrndpq): Likewise.
18789 (vrndnq): Likewise.
18790 (vrndmq): Likewise.
18791 (vrndaq): Likewise.
18792 (vrev64q): Likewise.
18794 (vdupq_n): Likewise.
18796 (vrev32q): Likewise.
18797 (vcvtbq_f32): Likewise.
18798 (vcvttq_f32): Likewise.
18800 (vsubq_n): Likewise.
18801 (vbrsrq_n): Likewise.
18802 (vcvtq_n): Likewise.
18806 (vaddq_n): Likewise.
18810 (vmulq_n): Likewise.
18812 (vcaddq_rot270): Likewise.
18813 (vcmpeqq_n): Likewise.
18814 (vcmpeqq): Likewise.
18815 (vcaddq_rot90): Likewise.
18816 (vcmpgeq_n): Likewise.
18817 (vcmpgeq): Likewise.
18818 (vcmpgtq_n): Likewise.
18819 (vcmpgtq): Likewise.
18820 (vcmpgtq): Likewise.
18821 (vcmpleq_n): Likewise.
18822 (vcmpleq_n): Likewise.
18823 (vcmpleq): Likewise.
18824 (vcmpleq): Likewise.
18825 (vcmpltq_n): Likewise.
18826 (vcmpltq_n): Likewise.
18827 (vcmpltq): Likewise.
18828 (vcmpltq): Likewise.
18829 (vcmpneq_n): Likewise.
18830 (vcmpneq_n): Likewise.
18831 (vcmpneq): Likewise.
18832 (vcmpneq): Likewise.
18833 (vcmulq): Likewise.
18834 (vcmulq): Likewise.
18835 (vcmulq_rot180): Likewise.
18836 (vcmulq_rot180): Likewise.
18837 (vcmulq_rot270): Likewise.
18838 (vcmulq_rot270): Likewise.
18839 (vcmulq_rot90): Likewise.
18840 (vcmulq_rot90): Likewise.
18843 (vmaxnmaq): Likewise.
18844 (vmaxnmaq): Likewise.
18845 (vmaxnmavq): Likewise.
18846 (vmaxnmavq): Likewise.
18847 (vmaxnmq): Likewise.
18848 (vmaxnmq): Likewise.
18849 (vmaxnmvq): Likewise.
18850 (vmaxnmvq): Likewise.
18851 (vminnmaq): Likewise.
18852 (vminnmaq): Likewise.
18853 (vminnmavq): Likewise.
18854 (vminnmavq): Likewise.
18855 (vminnmq): Likewise.
18856 (vminnmq): Likewise.
18857 (vminnmvq): Likewise.
18858 (vminnmvq): Likewise.
18859 (vbicq_n): Likewise.
18860 (vqmovntq): Likewise.
18861 (vqmovntq): Likewise.
18862 (vqmovnbq): Likewise.
18863 (vqmovnbq): Likewise.
18864 (vmulltq_poly): Likewise.
18865 (vmulltq_poly): Likewise.
18866 (vmullbq_poly): Likewise.
18867 (vmullbq_poly): Likewise.
18868 (vmovntq): Likewise.
18869 (vmovntq): Likewise.
18870 (vmovnbq): Likewise.
18871 (vmovnbq): Likewise.
18872 (vmlaldavxq): Likewise.
18873 (vmlaldavxq): Likewise.
18874 (vqmovuntq): Likewise.
18875 (vqmovuntq): Likewise.
18876 (vshlltq_n): Likewise.
18877 (vshlltq_n): Likewise.
18878 (vshllbq_n): Likewise.
18879 (vshllbq_n): Likewise.
18880 (vorrq_n): Likewise.
18881 (vorrq_n): Likewise.
18882 (vmlaldavq): Likewise.
18883 (vmlaldavq): Likewise.
18884 (vqmovunbq): Likewise.
18885 (vqmovunbq): Likewise.
18886 (vqdmulltq_n): Likewise.
18887 (vqdmulltq_n): Likewise.
18888 (vqdmulltq): Likewise.
18889 (vqdmulltq): Likewise.
18890 (vqdmullbq_n): Likewise.
18891 (vqdmullbq_n): Likewise.
18892 (vqdmullbq): Likewise.
18893 (vqdmullbq): Likewise.
18894 (vaddlvaq): Likewise.
18895 (vaddlvaq): Likewise.
18896 (vrmlaldavhq): Likewise.
18897 (vrmlaldavhq): Likewise.
18898 (vrmlaldavhxq): Likewise.
18899 (vrmlaldavhxq): Likewise.
18900 (vrmlsldavhq): Likewise.
18901 (vrmlsldavhq): Likewise.
18902 (vrmlsldavhxq): Likewise.
18903 (vrmlsldavhxq): Likewise.
18904 (vmlsldavxq): Likewise.
18905 (vmlsldavxq): Likewise.
18906 (vmlsldavq): Likewise.
18907 (vmlsldavq): Likewise.
18908 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
18909 (BINOP_NONE_NONE_NONE): Likewise.
18910 (BINOP_UNONE_NONE_NONE): Likewise.
18911 (BINOP_UNONE_UNONE_IMM): Likewise.
18912 (BINOP_UNONE_UNONE_NONE): Likewise.
18913 (BINOP_UNONE_UNONE_UNONE): Likewise.
18914 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
18915 (mve_vaddlvaq_<supf>v4si): Likewise.
18916 (mve_vaddq_n_f<mode>): Likewise.
18917 (mve_vandq_f<mode>): Likewise.
18918 (mve_vbicq_f<mode>): Likewise.
18919 (mve_vbicq_n_<supf><mode>): Likewise.
18920 (mve_vcaddq_rot270_f<mode>): Likewise.
18921 (mve_vcaddq_rot90_f<mode>): Likewise.
18922 (mve_vcmpeqq_f<mode>): Likewise.
18923 (mve_vcmpeqq_n_f<mode>): Likewise.
18924 (mve_vcmpgeq_f<mode>): Likewise.
18925 (mve_vcmpgeq_n_f<mode>): Likewise.
18926 (mve_vcmpgtq_f<mode>): Likewise.
18927 (mve_vcmpgtq_n_f<mode>): Likewise.
18928 (mve_vcmpleq_f<mode>): Likewise.
18929 (mve_vcmpleq_n_f<mode>): Likewise.
18930 (mve_vcmpltq_f<mode>): Likewise.
18931 (mve_vcmpltq_n_f<mode>): Likewise.
18932 (mve_vcmpneq_f<mode>): Likewise.
18933 (mve_vcmpneq_n_f<mode>): Likewise.
18934 (mve_vcmulq_f<mode>): Likewise.
18935 (mve_vcmulq_rot180_f<mode>): Likewise.
18936 (mve_vcmulq_rot270_f<mode>): Likewise.
18937 (mve_vcmulq_rot90_f<mode>): Likewise.
18938 (mve_vctp<mode1>q_mhi): Likewise.
18939 (mve_vcvtbq_f16_f32v8hf): Likewise.
18940 (mve_vcvttq_f16_f32v8hf): Likewise.
18941 (mve_veorq_f<mode>): Likewise.
18942 (mve_vmaxnmaq_f<mode>): Likewise.
18943 (mve_vmaxnmavq_f<mode>): Likewise.
18944 (mve_vmaxnmq_f<mode>): Likewise.
18945 (mve_vmaxnmvq_f<mode>): Likewise.
18946 (mve_vminnmaq_f<mode>): Likewise.
18947 (mve_vminnmavq_f<mode>): Likewise.
18948 (mve_vminnmq_f<mode>): Likewise.
18949 (mve_vminnmvq_f<mode>): Likewise.
18950 (mve_vmlaldavq_<supf><mode>): Likewise.
18951 (mve_vmlaldavxq_<supf><mode>): Likewise.
18952 (mve_vmlsldavq_s<mode>): Likewise.
18953 (mve_vmlsldavxq_s<mode>): Likewise.
18954 (mve_vmovnbq_<supf><mode>): Likewise.
18955 (mve_vmovntq_<supf><mode>): Likewise.
18956 (mve_vmulq_f<mode>): Likewise.
18957 (mve_vmulq_n_f<mode>): Likewise.
18958 (mve_vornq_f<mode>): Likewise.
18959 (mve_vorrq_f<mode>): Likewise.
18960 (mve_vorrq_n_<supf><mode>): Likewise.
18961 (mve_vqdmullbq_n_s<mode>): Likewise.
18962 (mve_vqdmullbq_s<mode>): Likewise.
18963 (mve_vqdmulltq_n_s<mode>): Likewise.
18964 (mve_vqdmulltq_s<mode>): Likewise.
18965 (mve_vqmovnbq_<supf><mode>): Likewise.
18966 (mve_vqmovntq_<supf><mode>): Likewise.
18967 (mve_vqmovunbq_s<mode>): Likewise.
18968 (mve_vqmovuntq_s<mode>): Likewise.
18969 (mve_vrmlaldavhxq_sv4si): Likewise.
18970 (mve_vrmlsldavhq_sv4si): Likewise.
18971 (mve_vrmlsldavhxq_sv4si): Likewise.
18972 (mve_vshllbq_n_<supf><mode>): Likewise.
18973 (mve_vshlltq_n_<supf><mode>): Likewise.
18974 (mve_vsubq_f<mode>): Likewise.
18975 (mve_vmulltq_poly_p<mode>): Likewise.
18976 (mve_vmullbq_poly_p<mode>): Likewise.
18977 (mve_vrmlaldavhq_<supf>v4si): Likewise.
18979 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18980 Mihail Ionescu <mihail.ionescu@arm.com>
18981 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18983 * config/arm/arm_mve.h (vsubq_u8): Define macro.
18984 (vsubq_n_u8): Likewise.
18985 (vrmulhq_u8): Likewise.
18986 (vrhaddq_u8): Likewise.
18987 (vqsubq_u8): Likewise.
18988 (vqsubq_n_u8): Likewise.
18989 (vqaddq_u8): Likewise.
18990 (vqaddq_n_u8): Likewise.
18991 (vorrq_u8): Likewise.
18992 (vornq_u8): Likewise.
18993 (vmulq_u8): Likewise.
18994 (vmulq_n_u8): Likewise.
18995 (vmulltq_int_u8): Likewise.
18996 (vmullbq_int_u8): Likewise.
18997 (vmulhq_u8): Likewise.
18998 (vmladavq_u8): Likewise.
18999 (vminvq_u8): Likewise.
19000 (vminq_u8): Likewise.
19001 (vmaxvq_u8): Likewise.
19002 (vmaxq_u8): Likewise.
19003 (vhsubq_u8): Likewise.
19004 (vhsubq_n_u8): Likewise.
19005 (vhaddq_u8): Likewise.
19006 (vhaddq_n_u8): Likewise.
19007 (veorq_u8): Likewise.
19008 (vcmpneq_n_u8): Likewise.
19009 (vcmphiq_u8): Likewise.
19010 (vcmphiq_n_u8): Likewise.
19011 (vcmpeqq_u8): Likewise.
19012 (vcmpeqq_n_u8): Likewise.
19013 (vcmpcsq_u8): Likewise.
19014 (vcmpcsq_n_u8): Likewise.
19015 (vcaddq_rot90_u8): Likewise.
19016 (vcaddq_rot270_u8): Likewise.
19017 (vbicq_u8): Likewise.
19018 (vandq_u8): Likewise.
19019 (vaddvq_p_u8): Likewise.
19020 (vaddvaq_u8): Likewise.
19021 (vaddq_n_u8): Likewise.
19022 (vabdq_u8): Likewise.
19023 (vshlq_r_u8): Likewise.
19024 (vrshlq_u8): Likewise.
19025 (vrshlq_n_u8): Likewise.
19026 (vqshlq_u8): Likewise.
19027 (vqshlq_r_u8): Likewise.
19028 (vqrshlq_u8): Likewise.
19029 (vqrshlq_n_u8): Likewise.
19030 (vminavq_s8): Likewise.
19031 (vminaq_s8): Likewise.
19032 (vmaxavq_s8): Likewise.
19033 (vmaxaq_s8): Likewise.
19034 (vbrsrq_n_u8): Likewise.
19035 (vshlq_n_u8): Likewise.
19036 (vrshrq_n_u8): Likewise.
19037 (vqshlq_n_u8): Likewise.
19038 (vcmpneq_n_s8): Likewise.
19039 (vcmpltq_s8): Likewise.
19040 (vcmpltq_n_s8): Likewise.
19041 (vcmpleq_s8): Likewise.
19042 (vcmpleq_n_s8): Likewise.
19043 (vcmpgtq_s8): Likewise.
19044 (vcmpgtq_n_s8): Likewise.
19045 (vcmpgeq_s8): Likewise.
19046 (vcmpgeq_n_s8): Likewise.
19047 (vcmpeqq_s8): Likewise.
19048 (vcmpeqq_n_s8): Likewise.
19049 (vqshluq_n_s8): Likewise.
19050 (vaddvq_p_s8): Likewise.
19051 (vsubq_s8): Likewise.
19052 (vsubq_n_s8): Likewise.
19053 (vshlq_r_s8): Likewise.
19054 (vrshlq_s8): Likewise.
19055 (vrshlq_n_s8): Likewise.
19056 (vrmulhq_s8): Likewise.
19057 (vrhaddq_s8): Likewise.
19058 (vqsubq_s8): Likewise.
19059 (vqsubq_n_s8): Likewise.
19060 (vqshlq_s8): Likewise.
19061 (vqshlq_r_s8): Likewise.
19062 (vqrshlq_s8): Likewise.
19063 (vqrshlq_n_s8): Likewise.
19064 (vqrdmulhq_s8): Likewise.
19065 (vqrdmulhq_n_s8): Likewise.
19066 (vqdmulhq_s8): Likewise.
19067 (vqdmulhq_n_s8): Likewise.
19068 (vqaddq_s8): Likewise.
19069 (vqaddq_n_s8): Likewise.
19070 (vorrq_s8): Likewise.
19071 (vornq_s8): Likewise.
19072 (vmulq_s8): Likewise.
19073 (vmulq_n_s8): Likewise.
19074 (vmulltq_int_s8): Likewise.
19075 (vmullbq_int_s8): Likewise.
19076 (vmulhq_s8): Likewise.
19077 (vmlsdavxq_s8): Likewise.
19078 (vmlsdavq_s8): Likewise.
19079 (vmladavxq_s8): Likewise.
19080 (vmladavq_s8): Likewise.
19081 (vminvq_s8): Likewise.
19082 (vminq_s8): Likewise.
19083 (vmaxvq_s8): Likewise.
19084 (vmaxq_s8): Likewise.
19085 (vhsubq_s8): Likewise.
19086 (vhsubq_n_s8): Likewise.
19087 (vhcaddq_rot90_s8): Likewise.
19088 (vhcaddq_rot270_s8): Likewise.
19089 (vhaddq_s8): Likewise.
19090 (vhaddq_n_s8): Likewise.
19091 (veorq_s8): Likewise.
19092 (vcaddq_rot90_s8): Likewise.
19093 (vcaddq_rot270_s8): Likewise.
19094 (vbrsrq_n_s8): Likewise.
19095 (vbicq_s8): Likewise.
19096 (vandq_s8): Likewise.
19097 (vaddvaq_s8): Likewise.
19098 (vaddq_n_s8): Likewise.
19099 (vabdq_s8): Likewise.
19100 (vshlq_n_s8): Likewise.
19101 (vrshrq_n_s8): Likewise.
19102 (vqshlq_n_s8): Likewise.
19103 (vsubq_u16): Likewise.
19104 (vsubq_n_u16): Likewise.
19105 (vrmulhq_u16): Likewise.
19106 (vrhaddq_u16): Likewise.
19107 (vqsubq_u16): Likewise.
19108 (vqsubq_n_u16): Likewise.
19109 (vqaddq_u16): Likewise.
19110 (vqaddq_n_u16): Likewise.
19111 (vorrq_u16): Likewise.
19112 (vornq_u16): Likewise.
19113 (vmulq_u16): Likewise.
19114 (vmulq_n_u16): Likewise.
19115 (vmulltq_int_u16): Likewise.
19116 (vmullbq_int_u16): Likewise.
19117 (vmulhq_u16): Likewise.
19118 (vmladavq_u16): Likewise.
19119 (vminvq_u16): Likewise.
19120 (vminq_u16): Likewise.
19121 (vmaxvq_u16): Likewise.
19122 (vmaxq_u16): Likewise.
19123 (vhsubq_u16): Likewise.
19124 (vhsubq_n_u16): Likewise.
19125 (vhaddq_u16): Likewise.
19126 (vhaddq_n_u16): Likewise.
19127 (veorq_u16): Likewise.
19128 (vcmpneq_n_u16): Likewise.
19129 (vcmphiq_u16): Likewise.
19130 (vcmphiq_n_u16): Likewise.
19131 (vcmpeqq_u16): Likewise.
19132 (vcmpeqq_n_u16): Likewise.
19133 (vcmpcsq_u16): Likewise.
19134 (vcmpcsq_n_u16): Likewise.
19135 (vcaddq_rot90_u16): Likewise.
19136 (vcaddq_rot270_u16): Likewise.
19137 (vbicq_u16): Likewise.
19138 (vandq_u16): Likewise.
19139 (vaddvq_p_u16): Likewise.
19140 (vaddvaq_u16): Likewise.
19141 (vaddq_n_u16): Likewise.
19142 (vabdq_u16): Likewise.
19143 (vshlq_r_u16): Likewise.
19144 (vrshlq_u16): Likewise.
19145 (vrshlq_n_u16): Likewise.
19146 (vqshlq_u16): Likewise.
19147 (vqshlq_r_u16): Likewise.
19148 (vqrshlq_u16): Likewise.
19149 (vqrshlq_n_u16): Likewise.
19150 (vminavq_s16): Likewise.
19151 (vminaq_s16): Likewise.
19152 (vmaxavq_s16): Likewise.
19153 (vmaxaq_s16): Likewise.
19154 (vbrsrq_n_u16): Likewise.
19155 (vshlq_n_u16): Likewise.
19156 (vrshrq_n_u16): Likewise.
19157 (vqshlq_n_u16): Likewise.
19158 (vcmpneq_n_s16): Likewise.
19159 (vcmpltq_s16): Likewise.
19160 (vcmpltq_n_s16): Likewise.
19161 (vcmpleq_s16): Likewise.
19162 (vcmpleq_n_s16): Likewise.
19163 (vcmpgtq_s16): Likewise.
19164 (vcmpgtq_n_s16): Likewise.
19165 (vcmpgeq_s16): Likewise.
19166 (vcmpgeq_n_s16): Likewise.
19167 (vcmpeqq_s16): Likewise.
19168 (vcmpeqq_n_s16): Likewise.
19169 (vqshluq_n_s16): Likewise.
19170 (vaddvq_p_s16): Likewise.
19171 (vsubq_s16): Likewise.
19172 (vsubq_n_s16): Likewise.
19173 (vshlq_r_s16): Likewise.
19174 (vrshlq_s16): Likewise.
19175 (vrshlq_n_s16): Likewise.
19176 (vrmulhq_s16): Likewise.
19177 (vrhaddq_s16): Likewise.
19178 (vqsubq_s16): Likewise.
19179 (vqsubq_n_s16): Likewise.
19180 (vqshlq_s16): Likewise.
19181 (vqshlq_r_s16): Likewise.
19182 (vqrshlq_s16): Likewise.
19183 (vqrshlq_n_s16): Likewise.
19184 (vqrdmulhq_s16): Likewise.
19185 (vqrdmulhq_n_s16): Likewise.
19186 (vqdmulhq_s16): Likewise.
19187 (vqdmulhq_n_s16): Likewise.
19188 (vqaddq_s16): Likewise.
19189 (vqaddq_n_s16): Likewise.
19190 (vorrq_s16): Likewise.
19191 (vornq_s16): Likewise.
19192 (vmulq_s16): Likewise.
19193 (vmulq_n_s16): Likewise.
19194 (vmulltq_int_s16): Likewise.
19195 (vmullbq_int_s16): Likewise.
19196 (vmulhq_s16): Likewise.
19197 (vmlsdavxq_s16): Likewise.
19198 (vmlsdavq_s16): Likewise.
19199 (vmladavxq_s16): Likewise.
19200 (vmladavq_s16): Likewise.
19201 (vminvq_s16): Likewise.
19202 (vminq_s16): Likewise.
19203 (vmaxvq_s16): Likewise.
19204 (vmaxq_s16): Likewise.
19205 (vhsubq_s16): Likewise.
19206 (vhsubq_n_s16): Likewise.
19207 (vhcaddq_rot90_s16): Likewise.
19208 (vhcaddq_rot270_s16): Likewise.
19209 (vhaddq_s16): Likewise.
19210 (vhaddq_n_s16): Likewise.
19211 (veorq_s16): Likewise.
19212 (vcaddq_rot90_s16): Likewise.
19213 (vcaddq_rot270_s16): Likewise.
19214 (vbrsrq_n_s16): Likewise.
19215 (vbicq_s16): Likewise.
19216 (vandq_s16): Likewise.
19217 (vaddvaq_s16): Likewise.
19218 (vaddq_n_s16): Likewise.
19219 (vabdq_s16): Likewise.
19220 (vshlq_n_s16): Likewise.
19221 (vrshrq_n_s16): Likewise.
19222 (vqshlq_n_s16): Likewise.
19223 (vsubq_u32): Likewise.
19224 (vsubq_n_u32): Likewise.
19225 (vrmulhq_u32): Likewise.
19226 (vrhaddq_u32): Likewise.
19227 (vqsubq_u32): Likewise.
19228 (vqsubq_n_u32): Likewise.
19229 (vqaddq_u32): Likewise.
19230 (vqaddq_n_u32): Likewise.
19231 (vorrq_u32): Likewise.
19232 (vornq_u32): Likewise.
19233 (vmulq_u32): Likewise.
19234 (vmulq_n_u32): Likewise.
19235 (vmulltq_int_u32): Likewise.
19236 (vmullbq_int_u32): Likewise.
19237 (vmulhq_u32): Likewise.
19238 (vmladavq_u32): Likewise.
19239 (vminvq_u32): Likewise.
19240 (vminq_u32): Likewise.
19241 (vmaxvq_u32): Likewise.
19242 (vmaxq_u32): Likewise.
19243 (vhsubq_u32): Likewise.
19244 (vhsubq_n_u32): Likewise.
19245 (vhaddq_u32): Likewise.
19246 (vhaddq_n_u32): Likewise.
19247 (veorq_u32): Likewise.
19248 (vcmpneq_n_u32): Likewise.
19249 (vcmphiq_u32): Likewise.
19250 (vcmphiq_n_u32): Likewise.
19251 (vcmpeqq_u32): Likewise.
19252 (vcmpeqq_n_u32): Likewise.
19253 (vcmpcsq_u32): Likewise.
19254 (vcmpcsq_n_u32): Likewise.
19255 (vcaddq_rot90_u32): Likewise.
19256 (vcaddq_rot270_u32): Likewise.
19257 (vbicq_u32): Likewise.
19258 (vandq_u32): Likewise.
19259 (vaddvq_p_u32): Likewise.
19260 (vaddvaq_u32): Likewise.
19261 (vaddq_n_u32): Likewise.
19262 (vabdq_u32): Likewise.
19263 (vshlq_r_u32): Likewise.
19264 (vrshlq_u32): Likewise.
19265 (vrshlq_n_u32): Likewise.
19266 (vqshlq_u32): Likewise.
19267 (vqshlq_r_u32): Likewise.
19268 (vqrshlq_u32): Likewise.
19269 (vqrshlq_n_u32): Likewise.
19270 (vminavq_s32): Likewise.
19271 (vminaq_s32): Likewise.
19272 (vmaxavq_s32): Likewise.
19273 (vmaxaq_s32): Likewise.
19274 (vbrsrq_n_u32): Likewise.
19275 (vshlq_n_u32): Likewise.
19276 (vrshrq_n_u32): Likewise.
19277 (vqshlq_n_u32): Likewise.
19278 (vcmpneq_n_s32): Likewise.
19279 (vcmpltq_s32): Likewise.
19280 (vcmpltq_n_s32): Likewise.
19281 (vcmpleq_s32): Likewise.
19282 (vcmpleq_n_s32): Likewise.
19283 (vcmpgtq_s32): Likewise.
19284 (vcmpgtq_n_s32): Likewise.
19285 (vcmpgeq_s32): Likewise.
19286 (vcmpgeq_n_s32): Likewise.
19287 (vcmpeqq_s32): Likewise.
19288 (vcmpeqq_n_s32): Likewise.
19289 (vqshluq_n_s32): Likewise.
19290 (vaddvq_p_s32): Likewise.
19291 (vsubq_s32): Likewise.
19292 (vsubq_n_s32): Likewise.
19293 (vshlq_r_s32): Likewise.
19294 (vrshlq_s32): Likewise.
19295 (vrshlq_n_s32): Likewise.
19296 (vrmulhq_s32): Likewise.
19297 (vrhaddq_s32): Likewise.
19298 (vqsubq_s32): Likewise.
19299 (vqsubq_n_s32): Likewise.
19300 (vqshlq_s32): Likewise.
19301 (vqshlq_r_s32): Likewise.
19302 (vqrshlq_s32): Likewise.
19303 (vqrshlq_n_s32): Likewise.
19304 (vqrdmulhq_s32): Likewise.
19305 (vqrdmulhq_n_s32): Likewise.
19306 (vqdmulhq_s32): Likewise.
19307 (vqdmulhq_n_s32): Likewise.
19308 (vqaddq_s32): Likewise.
19309 (vqaddq_n_s32): Likewise.
19310 (vorrq_s32): Likewise.
19311 (vornq_s32): Likewise.
19312 (vmulq_s32): Likewise.
19313 (vmulq_n_s32): Likewise.
19314 (vmulltq_int_s32): Likewise.
19315 (vmullbq_int_s32): Likewise.
19316 (vmulhq_s32): Likewise.
19317 (vmlsdavxq_s32): Likewise.
19318 (vmlsdavq_s32): Likewise.
19319 (vmladavxq_s32): Likewise.
19320 (vmladavq_s32): Likewise.
19321 (vminvq_s32): Likewise.
19322 (vminq_s32): Likewise.
19323 (vmaxvq_s32): Likewise.
19324 (vmaxq_s32): Likewise.
19325 (vhsubq_s32): Likewise.
19326 (vhsubq_n_s32): Likewise.
19327 (vhcaddq_rot90_s32): Likewise.
19328 (vhcaddq_rot270_s32): Likewise.
19329 (vhaddq_s32): Likewise.
19330 (vhaddq_n_s32): Likewise.
19331 (veorq_s32): Likewise.
19332 (vcaddq_rot90_s32): Likewise.
19333 (vcaddq_rot270_s32): Likewise.
19334 (vbrsrq_n_s32): Likewise.
19335 (vbicq_s32): Likewise.
19336 (vandq_s32): Likewise.
19337 (vaddvaq_s32): Likewise.
19338 (vaddq_n_s32): Likewise.
19339 (vabdq_s32): Likewise.
19340 (vshlq_n_s32): Likewise.
19341 (vrshrq_n_s32): Likewise.
19342 (vqshlq_n_s32): Likewise.
19343 (__arm_vsubq_u8): Define intrinsic.
19344 (__arm_vsubq_n_u8): Likewise.
19345 (__arm_vrmulhq_u8): Likewise.
19346 (__arm_vrhaddq_u8): Likewise.
19347 (__arm_vqsubq_u8): Likewise.
19348 (__arm_vqsubq_n_u8): Likewise.
19349 (__arm_vqaddq_u8): Likewise.
19350 (__arm_vqaddq_n_u8): Likewise.
19351 (__arm_vorrq_u8): Likewise.
19352 (__arm_vornq_u8): Likewise.
19353 (__arm_vmulq_u8): Likewise.
19354 (__arm_vmulq_n_u8): Likewise.
19355 (__arm_vmulltq_int_u8): Likewise.
19356 (__arm_vmullbq_int_u8): Likewise.
19357 (__arm_vmulhq_u8): Likewise.
19358 (__arm_vmladavq_u8): Likewise.
19359 (__arm_vminvq_u8): Likewise.
19360 (__arm_vminq_u8): Likewise.
19361 (__arm_vmaxvq_u8): Likewise.
19362 (__arm_vmaxq_u8): Likewise.
19363 (__arm_vhsubq_u8): Likewise.
19364 (__arm_vhsubq_n_u8): Likewise.
19365 (__arm_vhaddq_u8): Likewise.
19366 (__arm_vhaddq_n_u8): Likewise.
19367 (__arm_veorq_u8): Likewise.
19368 (__arm_vcmpneq_n_u8): Likewise.
19369 (__arm_vcmphiq_u8): Likewise.
19370 (__arm_vcmphiq_n_u8): Likewise.
19371 (__arm_vcmpeqq_u8): Likewise.
19372 (__arm_vcmpeqq_n_u8): Likewise.
19373 (__arm_vcmpcsq_u8): Likewise.
19374 (__arm_vcmpcsq_n_u8): Likewise.
19375 (__arm_vcaddq_rot90_u8): Likewise.
19376 (__arm_vcaddq_rot270_u8): Likewise.
19377 (__arm_vbicq_u8): Likewise.
19378 (__arm_vandq_u8): Likewise.
19379 (__arm_vaddvq_p_u8): Likewise.
19380 (__arm_vaddvaq_u8): Likewise.
19381 (__arm_vaddq_n_u8): Likewise.
19382 (__arm_vabdq_u8): Likewise.
19383 (__arm_vshlq_r_u8): Likewise.
19384 (__arm_vrshlq_u8): Likewise.
19385 (__arm_vrshlq_n_u8): Likewise.
19386 (__arm_vqshlq_u8): Likewise.
19387 (__arm_vqshlq_r_u8): Likewise.
19388 (__arm_vqrshlq_u8): Likewise.
19389 (__arm_vqrshlq_n_u8): Likewise.
19390 (__arm_vminavq_s8): Likewise.
19391 (__arm_vminaq_s8): Likewise.
19392 (__arm_vmaxavq_s8): Likewise.
19393 (__arm_vmaxaq_s8): Likewise.
19394 (__arm_vbrsrq_n_u8): Likewise.
19395 (__arm_vshlq_n_u8): Likewise.
19396 (__arm_vrshrq_n_u8): Likewise.
19397 (__arm_vqshlq_n_u8): Likewise.
19398 (__arm_vcmpneq_n_s8): Likewise.
19399 (__arm_vcmpltq_s8): Likewise.
19400 (__arm_vcmpltq_n_s8): Likewise.
19401 (__arm_vcmpleq_s8): Likewise.
19402 (__arm_vcmpleq_n_s8): Likewise.
19403 (__arm_vcmpgtq_s8): Likewise.
19404 (__arm_vcmpgtq_n_s8): Likewise.
19405 (__arm_vcmpgeq_s8): Likewise.
19406 (__arm_vcmpgeq_n_s8): Likewise.
19407 (__arm_vcmpeqq_s8): Likewise.
19408 (__arm_vcmpeqq_n_s8): Likewise.
19409 (__arm_vqshluq_n_s8): Likewise.
19410 (__arm_vaddvq_p_s8): Likewise.
19411 (__arm_vsubq_s8): Likewise.
19412 (__arm_vsubq_n_s8): Likewise.
19413 (__arm_vshlq_r_s8): Likewise.
19414 (__arm_vrshlq_s8): Likewise.
19415 (__arm_vrshlq_n_s8): Likewise.
19416 (__arm_vrmulhq_s8): Likewise.
19417 (__arm_vrhaddq_s8): Likewise.
19418 (__arm_vqsubq_s8): Likewise.
19419 (__arm_vqsubq_n_s8): Likewise.
19420 (__arm_vqshlq_s8): Likewise.
19421 (__arm_vqshlq_r_s8): Likewise.
19422 (__arm_vqrshlq_s8): Likewise.
19423 (__arm_vqrshlq_n_s8): Likewise.
19424 (__arm_vqrdmulhq_s8): Likewise.
19425 (__arm_vqrdmulhq_n_s8): Likewise.
19426 (__arm_vqdmulhq_s8): Likewise.
19427 (__arm_vqdmulhq_n_s8): Likewise.
19428 (__arm_vqaddq_s8): Likewise.
19429 (__arm_vqaddq_n_s8): Likewise.
19430 (__arm_vorrq_s8): Likewise.
19431 (__arm_vornq_s8): Likewise.
19432 (__arm_vmulq_s8): Likewise.
19433 (__arm_vmulq_n_s8): Likewise.
19434 (__arm_vmulltq_int_s8): Likewise.
19435 (__arm_vmullbq_int_s8): Likewise.
19436 (__arm_vmulhq_s8): Likewise.
19437 (__arm_vmlsdavxq_s8): Likewise.
19438 (__arm_vmlsdavq_s8): Likewise.
19439 (__arm_vmladavxq_s8): Likewise.
19440 (__arm_vmladavq_s8): Likewise.
19441 (__arm_vminvq_s8): Likewise.
19442 (__arm_vminq_s8): Likewise.
19443 (__arm_vmaxvq_s8): Likewise.
19444 (__arm_vmaxq_s8): Likewise.
19445 (__arm_vhsubq_s8): Likewise.
19446 (__arm_vhsubq_n_s8): Likewise.
19447 (__arm_vhcaddq_rot90_s8): Likewise.
19448 (__arm_vhcaddq_rot270_s8): Likewise.
19449 (__arm_vhaddq_s8): Likewise.
19450 (__arm_vhaddq_n_s8): Likewise.
19451 (__arm_veorq_s8): Likewise.
19452 (__arm_vcaddq_rot90_s8): Likewise.
19453 (__arm_vcaddq_rot270_s8): Likewise.
19454 (__arm_vbrsrq_n_s8): Likewise.
19455 (__arm_vbicq_s8): Likewise.
19456 (__arm_vandq_s8): Likewise.
19457 (__arm_vaddvaq_s8): Likewise.
19458 (__arm_vaddq_n_s8): Likewise.
19459 (__arm_vabdq_s8): Likewise.
19460 (__arm_vshlq_n_s8): Likewise.
19461 (__arm_vrshrq_n_s8): Likewise.
19462 (__arm_vqshlq_n_s8): Likewise.
19463 (__arm_vsubq_u16): Likewise.
19464 (__arm_vsubq_n_u16): Likewise.
19465 (__arm_vrmulhq_u16): Likewise.
19466 (__arm_vrhaddq_u16): Likewise.
19467 (__arm_vqsubq_u16): Likewise.
19468 (__arm_vqsubq_n_u16): Likewise.
19469 (__arm_vqaddq_u16): Likewise.
19470 (__arm_vqaddq_n_u16): Likewise.
19471 (__arm_vorrq_u16): Likewise.
19472 (__arm_vornq_u16): Likewise.
19473 (__arm_vmulq_u16): Likewise.
19474 (__arm_vmulq_n_u16): Likewise.
19475 (__arm_vmulltq_int_u16): Likewise.
19476 (__arm_vmullbq_int_u16): Likewise.
19477 (__arm_vmulhq_u16): Likewise.
19478 (__arm_vmladavq_u16): Likewise.
19479 (__arm_vminvq_u16): Likewise.
19480 (__arm_vminq_u16): Likewise.
19481 (__arm_vmaxvq_u16): Likewise.
19482 (__arm_vmaxq_u16): Likewise.
19483 (__arm_vhsubq_u16): Likewise.
19484 (__arm_vhsubq_n_u16): Likewise.
19485 (__arm_vhaddq_u16): Likewise.
19486 (__arm_vhaddq_n_u16): Likewise.
19487 (__arm_veorq_u16): Likewise.
19488 (__arm_vcmpneq_n_u16): Likewise.
19489 (__arm_vcmphiq_u16): Likewise.
19490 (__arm_vcmphiq_n_u16): Likewise.
19491 (__arm_vcmpeqq_u16): Likewise.
19492 (__arm_vcmpeqq_n_u16): Likewise.
19493 (__arm_vcmpcsq_u16): Likewise.
19494 (__arm_vcmpcsq_n_u16): Likewise.
19495 (__arm_vcaddq_rot90_u16): Likewise.
19496 (__arm_vcaddq_rot270_u16): Likewise.
19497 (__arm_vbicq_u16): Likewise.
19498 (__arm_vandq_u16): Likewise.
19499 (__arm_vaddvq_p_u16): Likewise.
19500 (__arm_vaddvaq_u16): Likewise.
19501 (__arm_vaddq_n_u16): Likewise.
19502 (__arm_vabdq_u16): Likewise.
19503 (__arm_vshlq_r_u16): Likewise.
19504 (__arm_vrshlq_u16): Likewise.
19505 (__arm_vrshlq_n_u16): Likewise.
19506 (__arm_vqshlq_u16): Likewise.
19507 (__arm_vqshlq_r_u16): Likewise.
19508 (__arm_vqrshlq_u16): Likewise.
19509 (__arm_vqrshlq_n_u16): Likewise.
19510 (__arm_vminavq_s16): Likewise.
19511 (__arm_vminaq_s16): Likewise.
19512 (__arm_vmaxavq_s16): Likewise.
19513 (__arm_vmaxaq_s16): Likewise.
19514 (__arm_vbrsrq_n_u16): Likewise.
19515 (__arm_vshlq_n_u16): Likewise.
19516 (__arm_vrshrq_n_u16): Likewise.
19517 (__arm_vqshlq_n_u16): Likewise.
19518 (__arm_vcmpneq_n_s16): Likewise.
19519 (__arm_vcmpltq_s16): Likewise.
19520 (__arm_vcmpltq_n_s16): Likewise.
19521 (__arm_vcmpleq_s16): Likewise.
19522 (__arm_vcmpleq_n_s16): Likewise.
19523 (__arm_vcmpgtq_s16): Likewise.
19524 (__arm_vcmpgtq_n_s16): Likewise.
19525 (__arm_vcmpgeq_s16): Likewise.
19526 (__arm_vcmpgeq_n_s16): Likewise.
19527 (__arm_vcmpeqq_s16): Likewise.
19528 (__arm_vcmpeqq_n_s16): Likewise.
19529 (__arm_vqshluq_n_s16): Likewise.
19530 (__arm_vaddvq_p_s16): Likewise.
19531 (__arm_vsubq_s16): Likewise.
19532 (__arm_vsubq_n_s16): Likewise.
19533 (__arm_vshlq_r_s16): Likewise.
19534 (__arm_vrshlq_s16): Likewise.
19535 (__arm_vrshlq_n_s16): Likewise.
19536 (__arm_vrmulhq_s16): Likewise.
19537 (__arm_vrhaddq_s16): Likewise.
19538 (__arm_vqsubq_s16): Likewise.
19539 (__arm_vqsubq_n_s16): Likewise.
19540 (__arm_vqshlq_s16): Likewise.
19541 (__arm_vqshlq_r_s16): Likewise.
19542 (__arm_vqrshlq_s16): Likewise.
19543 (__arm_vqrshlq_n_s16): Likewise.
19544 (__arm_vqrdmulhq_s16): Likewise.
19545 (__arm_vqrdmulhq_n_s16): Likewise.
19546 (__arm_vqdmulhq_s16): Likewise.
19547 (__arm_vqdmulhq_n_s16): Likewise.
19548 (__arm_vqaddq_s16): Likewise.
19549 (__arm_vqaddq_n_s16): Likewise.
19550 (__arm_vorrq_s16): Likewise.
19551 (__arm_vornq_s16): Likewise.
19552 (__arm_vmulq_s16): Likewise.
19553 (__arm_vmulq_n_s16): Likewise.
19554 (__arm_vmulltq_int_s16): Likewise.
19555 (__arm_vmullbq_int_s16): Likewise.
19556 (__arm_vmulhq_s16): Likewise.
19557 (__arm_vmlsdavxq_s16): Likewise.
19558 (__arm_vmlsdavq_s16): Likewise.
19559 (__arm_vmladavxq_s16): Likewise.
19560 (__arm_vmladavq_s16): Likewise.
19561 (__arm_vminvq_s16): Likewise.
19562 (__arm_vminq_s16): Likewise.
19563 (__arm_vmaxvq_s16): Likewise.
19564 (__arm_vmaxq_s16): Likewise.
19565 (__arm_vhsubq_s16): Likewise.
19566 (__arm_vhsubq_n_s16): Likewise.
19567 (__arm_vhcaddq_rot90_s16): Likewise.
19568 (__arm_vhcaddq_rot270_s16): Likewise.
19569 (__arm_vhaddq_s16): Likewise.
19570 (__arm_vhaddq_n_s16): Likewise.
19571 (__arm_veorq_s16): Likewise.
19572 (__arm_vcaddq_rot90_s16): Likewise.
19573 (__arm_vcaddq_rot270_s16): Likewise.
19574 (__arm_vbrsrq_n_s16): Likewise.
19575 (__arm_vbicq_s16): Likewise.
19576 (__arm_vandq_s16): Likewise.
19577 (__arm_vaddvaq_s16): Likewise.
19578 (__arm_vaddq_n_s16): Likewise.
19579 (__arm_vabdq_s16): Likewise.
19580 (__arm_vshlq_n_s16): Likewise.
19581 (__arm_vrshrq_n_s16): Likewise.
19582 (__arm_vqshlq_n_s16): Likewise.
19583 (__arm_vsubq_u32): Likewise.
19584 (__arm_vsubq_n_u32): Likewise.
19585 (__arm_vrmulhq_u32): Likewise.
19586 (__arm_vrhaddq_u32): Likewise.
19587 (__arm_vqsubq_u32): Likewise.
19588 (__arm_vqsubq_n_u32): Likewise.
19589 (__arm_vqaddq_u32): Likewise.
19590 (__arm_vqaddq_n_u32): Likewise.
19591 (__arm_vorrq_u32): Likewise.
19592 (__arm_vornq_u32): Likewise.
19593 (__arm_vmulq_u32): Likewise.
19594 (__arm_vmulq_n_u32): Likewise.
19595 (__arm_vmulltq_int_u32): Likewise.
19596 (__arm_vmullbq_int_u32): Likewise.
19597 (__arm_vmulhq_u32): Likewise.
19598 (__arm_vmladavq_u32): Likewise.
19599 (__arm_vminvq_u32): Likewise.
19600 (__arm_vminq_u32): Likewise.
19601 (__arm_vmaxvq_u32): Likewise.
19602 (__arm_vmaxq_u32): Likewise.
19603 (__arm_vhsubq_u32): Likewise.
19604 (__arm_vhsubq_n_u32): Likewise.
19605 (__arm_vhaddq_u32): Likewise.
19606 (__arm_vhaddq_n_u32): Likewise.
19607 (__arm_veorq_u32): Likewise.
19608 (__arm_vcmpneq_n_u32): Likewise.
19609 (__arm_vcmphiq_u32): Likewise.
19610 (__arm_vcmphiq_n_u32): Likewise.
19611 (__arm_vcmpeqq_u32): Likewise.
19612 (__arm_vcmpeqq_n_u32): Likewise.
19613 (__arm_vcmpcsq_u32): Likewise.
19614 (__arm_vcmpcsq_n_u32): Likewise.
19615 (__arm_vcaddq_rot90_u32): Likewise.
19616 (__arm_vcaddq_rot270_u32): Likewise.
19617 (__arm_vbicq_u32): Likewise.
19618 (__arm_vandq_u32): Likewise.
19619 (__arm_vaddvq_p_u32): Likewise.
19620 (__arm_vaddvaq_u32): Likewise.
19621 (__arm_vaddq_n_u32): Likewise.
19622 (__arm_vabdq_u32): Likewise.
19623 (__arm_vshlq_r_u32): Likewise.
19624 (__arm_vrshlq_u32): Likewise.
19625 (__arm_vrshlq_n_u32): Likewise.
19626 (__arm_vqshlq_u32): Likewise.
19627 (__arm_vqshlq_r_u32): Likewise.
19628 (__arm_vqrshlq_u32): Likewise.
19629 (__arm_vqrshlq_n_u32): Likewise.
19630 (__arm_vminavq_s32): Likewise.
19631 (__arm_vminaq_s32): Likewise.
19632 (__arm_vmaxavq_s32): Likewise.
19633 (__arm_vmaxaq_s32): Likewise.
19634 (__arm_vbrsrq_n_u32): Likewise.
19635 (__arm_vshlq_n_u32): Likewise.
19636 (__arm_vrshrq_n_u32): Likewise.
19637 (__arm_vqshlq_n_u32): Likewise.
19638 (__arm_vcmpneq_n_s32): Likewise.
19639 (__arm_vcmpltq_s32): Likewise.
19640 (__arm_vcmpltq_n_s32): Likewise.
19641 (__arm_vcmpleq_s32): Likewise.
19642 (__arm_vcmpleq_n_s32): Likewise.
19643 (__arm_vcmpgtq_s32): Likewise.
19644 (__arm_vcmpgtq_n_s32): Likewise.
19645 (__arm_vcmpgeq_s32): Likewise.
19646 (__arm_vcmpgeq_n_s32): Likewise.
19647 (__arm_vcmpeqq_s32): Likewise.
19648 (__arm_vcmpeqq_n_s32): Likewise.
19649 (__arm_vqshluq_n_s32): Likewise.
19650 (__arm_vaddvq_p_s32): Likewise.
19651 (__arm_vsubq_s32): Likewise.
19652 (__arm_vsubq_n_s32): Likewise.
19653 (__arm_vshlq_r_s32): Likewise.
19654 (__arm_vrshlq_s32): Likewise.
19655 (__arm_vrshlq_n_s32): Likewise.
19656 (__arm_vrmulhq_s32): Likewise.
19657 (__arm_vrhaddq_s32): Likewise.
19658 (__arm_vqsubq_s32): Likewise.
19659 (__arm_vqsubq_n_s32): Likewise.
19660 (__arm_vqshlq_s32): Likewise.
19661 (__arm_vqshlq_r_s32): Likewise.
19662 (__arm_vqrshlq_s32): Likewise.
19663 (__arm_vqrshlq_n_s32): Likewise.
19664 (__arm_vqrdmulhq_s32): Likewise.
19665 (__arm_vqrdmulhq_n_s32): Likewise.
19666 (__arm_vqdmulhq_s32): Likewise.
19667 (__arm_vqdmulhq_n_s32): Likewise.
19668 (__arm_vqaddq_s32): Likewise.
19669 (__arm_vqaddq_n_s32): Likewise.
19670 (__arm_vorrq_s32): Likewise.
19671 (__arm_vornq_s32): Likewise.
19672 (__arm_vmulq_s32): Likewise.
19673 (__arm_vmulq_n_s32): Likewise.
19674 (__arm_vmulltq_int_s32): Likewise.
19675 (__arm_vmullbq_int_s32): Likewise.
19676 (__arm_vmulhq_s32): Likewise.
19677 (__arm_vmlsdavxq_s32): Likewise.
19678 (__arm_vmlsdavq_s32): Likewise.
19679 (__arm_vmladavxq_s32): Likewise.
19680 (__arm_vmladavq_s32): Likewise.
19681 (__arm_vminvq_s32): Likewise.
19682 (__arm_vminq_s32): Likewise.
19683 (__arm_vmaxvq_s32): Likewise.
19684 (__arm_vmaxq_s32): Likewise.
19685 (__arm_vhsubq_s32): Likewise.
19686 (__arm_vhsubq_n_s32): Likewise.
19687 (__arm_vhcaddq_rot90_s32): Likewise.
19688 (__arm_vhcaddq_rot270_s32): Likewise.
19689 (__arm_vhaddq_s32): Likewise.
19690 (__arm_vhaddq_n_s32): Likewise.
19691 (__arm_veorq_s32): Likewise.
19692 (__arm_vcaddq_rot90_s32): Likewise.
19693 (__arm_vcaddq_rot270_s32): Likewise.
19694 (__arm_vbrsrq_n_s32): Likewise.
19695 (__arm_vbicq_s32): Likewise.
19696 (__arm_vandq_s32): Likewise.
19697 (__arm_vaddvaq_s32): Likewise.
19698 (__arm_vaddq_n_s32): Likewise.
19699 (__arm_vabdq_s32): Likewise.
19700 (__arm_vshlq_n_s32): Likewise.
19701 (__arm_vrshrq_n_s32): Likewise.
19702 (__arm_vqshlq_n_s32): Likewise.
19703 (vsubq): Define polymorphic variant.
19704 (vsubq_n): Likewise.
19705 (vshlq_r): Likewise.
19706 (vrshlq_n): Likewise.
19707 (vrshlq): Likewise.
19708 (vrmulhq): Likewise.
19709 (vrhaddq): Likewise.
19710 (vqsubq_n): Likewise.
19711 (vqsubq): Likewise.
19712 (vqshlq): Likewise.
19713 (vqshlq_r): Likewise.
19714 (vqshluq): Likewise.
19715 (vrshrq_n): Likewise.
19716 (vshlq_n): Likewise.
19717 (vqshluq_n): Likewise.
19718 (vqshlq_n): Likewise.
19719 (vqrshlq_n): Likewise.
19720 (vqrshlq): Likewise.
19721 (vqrdmulhq_n): Likewise.
19722 (vqrdmulhq): Likewise.
19723 (vqdmulhq_n): Likewise.
19724 (vqdmulhq): Likewise.
19725 (vqaddq_n): Likewise.
19726 (vqaddq): Likewise.
19727 (vorrq_n): Likewise.
19730 (vmulq_n): Likewise.
19732 (vmulltq_int): Likewise.
19733 (vmullbq_int): Likewise.
19734 (vmulhq): Likewise.
19736 (vminaq): Likewise.
19738 (vmaxaq): Likewise.
19739 (vhsubq_n): Likewise.
19740 (vhsubq): Likewise.
19741 (vhcaddq_rot90): Likewise.
19742 (vhcaddq_rot270): Likewise.
19743 (vhaddq_n): Likewise.
19744 (vhaddq): Likewise.
19746 (vcaddq_rot90): Likewise.
19747 (vcaddq_rot270): Likewise.
19748 (vbrsrq_n): Likewise.
19749 (vbicq_n): Likewise.
19752 (vaddq_n): Likewise.
19755 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
19756 (BINOP_NONE_NONE_NONE): Likewise.
19757 (BINOP_NONE_NONE_UNONE): Likewise.
19758 (BINOP_UNONE_NONE_IMM): Likewise.
19759 (BINOP_UNONE_NONE_NONE): Likewise.
19760 (BINOP_UNONE_UNONE_IMM): Likewise.
19761 (BINOP_UNONE_UNONE_NONE): Likewise.
19762 (BINOP_UNONE_UNONE_UNONE): Likewise.
19763 * config/arm/constraints.md (Ra): Define constraint to check constant is
19764 in the range of 0 to 7.
19765 (Rg): Define constriant to check the constant is one among 1, 2, 4
19767 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
19768 (mve_vaddq_n_<supf>): Likewise.
19769 (mve_vaddvaq_<supf>): Likewise.
19770 (mve_vaddvq_p_<supf>): Likewise.
19771 (mve_vandq_<supf>): Likewise.
19772 (mve_vbicq_<supf>): Likewise.
19773 (mve_vbrsrq_n_<supf>): Likewise.
19774 (mve_vcaddq_rot270_<supf>): Likewise.
19775 (mve_vcaddq_rot90_<supf>): Likewise.
19776 (mve_vcmpcsq_n_u): Likewise.
19777 (mve_vcmpcsq_u): Likewise.
19778 (mve_vcmpeqq_n_<supf>): Likewise.
19779 (mve_vcmpeqq_<supf>): Likewise.
19780 (mve_vcmpgeq_n_s): Likewise.
19781 (mve_vcmpgeq_s): Likewise.
19782 (mve_vcmpgtq_n_s): Likewise.
19783 (mve_vcmpgtq_s): Likewise.
19784 (mve_vcmphiq_n_u): Likewise.
19785 (mve_vcmphiq_u): Likewise.
19786 (mve_vcmpleq_n_s): Likewise.
19787 (mve_vcmpleq_s): Likewise.
19788 (mve_vcmpltq_n_s): Likewise.
19789 (mve_vcmpltq_s): Likewise.
19790 (mve_vcmpneq_n_<supf>): Likewise.
19791 (mve_vddupq_n_u): Likewise.
19792 (mve_veorq_<supf>): Likewise.
19793 (mve_vhaddq_n_<supf>): Likewise.
19794 (mve_vhaddq_<supf>): Likewise.
19795 (mve_vhcaddq_rot270_s): Likewise.
19796 (mve_vhcaddq_rot90_s): Likewise.
19797 (mve_vhsubq_n_<supf>): Likewise.
19798 (mve_vhsubq_<supf>): Likewise.
19799 (mve_vidupq_n_u): Likewise.
19800 (mve_vmaxaq_s): Likewise.
19801 (mve_vmaxavq_s): Likewise.
19802 (mve_vmaxq_<supf>): Likewise.
19803 (mve_vmaxvq_<supf>): Likewise.
19804 (mve_vminaq_s): Likewise.
19805 (mve_vminavq_s): Likewise.
19806 (mve_vminq_<supf>): Likewise.
19807 (mve_vminvq_<supf>): Likewise.
19808 (mve_vmladavq_<supf>): Likewise.
19809 (mve_vmladavxq_s): Likewise.
19810 (mve_vmlsdavq_s): Likewise.
19811 (mve_vmlsdavxq_s): Likewise.
19812 (mve_vmulhq_<supf>): Likewise.
19813 (mve_vmullbq_int_<supf>): Likewise.
19814 (mve_vmulltq_int_<supf>): Likewise.
19815 (mve_vmulq_n_<supf>): Likewise.
19816 (mve_vmulq_<supf>): Likewise.
19817 (mve_vornq_<supf>): Likewise.
19818 (mve_vorrq_<supf>): Likewise.
19819 (mve_vqaddq_n_<supf>): Likewise.
19820 (mve_vqaddq_<supf>): Likewise.
19821 (mve_vqdmulhq_n_s): Likewise.
19822 (mve_vqdmulhq_s): Likewise.
19823 (mve_vqrdmulhq_n_s): Likewise.
19824 (mve_vqrdmulhq_s): Likewise.
19825 (mve_vqrshlq_n_<supf>): Likewise.
19826 (mve_vqrshlq_<supf>): Likewise.
19827 (mve_vqshlq_n_<supf>): Likewise.
19828 (mve_vqshlq_r_<supf>): Likewise.
19829 (mve_vqshlq_<supf>): Likewise.
19830 (mve_vqshluq_n_s): Likewise.
19831 (mve_vqsubq_n_<supf>): Likewise.
19832 (mve_vqsubq_<supf>): Likewise.
19833 (mve_vrhaddq_<supf>): Likewise.
19834 (mve_vrmulhq_<supf>): Likewise.
19835 (mve_vrshlq_n_<supf>): Likewise.
19836 (mve_vrshlq_<supf>): Likewise.
19837 (mve_vrshrq_n_<supf>): Likewise.
19838 (mve_vshlq_n_<supf>): Likewise.
19839 (mve_vshlq_r_<supf>): Likewise.
19840 (mve_vsubq_n_<supf>): Likewise.
19841 (mve_vsubq_<supf>): Likewise.
19842 * config/arm/predicates.md (mve_imm_7): Define predicate to check
19843 the matching constraint Ra.
19844 (mve_imm_selective_upto_8): Define predicate to check the matching
19847 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19848 Mihail Ionescu <mihail.ionescu@arm.com>
19849 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19851 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
19852 qualifier for binary operands.
19853 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
19854 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
19855 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
19856 (vaddlvq_p_u32): Likewise.
19857 (vcmpneq_s8): Likewise.
19858 (vcmpneq_s16): Likewise.
19859 (vcmpneq_s32): Likewise.
19860 (vcmpneq_u8): Likewise.
19861 (vcmpneq_u16): Likewise.
19862 (vcmpneq_u32): Likewise.
19863 (vshlq_s8): Likewise.
19864 (vshlq_s16): Likewise.
19865 (vshlq_s32): Likewise.
19866 (vshlq_u8): Likewise.
19867 (vshlq_u16): Likewise.
19868 (vshlq_u32): Likewise.
19869 (__arm_vaddlvq_p_s32): Define intrinsic.
19870 (__arm_vaddlvq_p_u32): Likewise.
19871 (__arm_vcmpneq_s8): Likewise.
19872 (__arm_vcmpneq_s16): Likewise.
19873 (__arm_vcmpneq_s32): Likewise.
19874 (__arm_vcmpneq_u8): Likewise.
19875 (__arm_vcmpneq_u16): Likewise.
19876 (__arm_vcmpneq_u32): Likewise.
19877 (__arm_vshlq_s8): Likewise.
19878 (__arm_vshlq_s16): Likewise.
19879 (__arm_vshlq_s32): Likewise.
19880 (__arm_vshlq_u8): Likewise.
19881 (__arm_vshlq_u16): Likewise.
19882 (__arm_vshlq_u32): Likewise.
19883 (vaddlvq_p): Define polymorphic variant.
19884 (vcmpneq): Likewise.
19886 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
19888 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
19889 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
19890 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
19891 (mve_vcmpneq_<supf><mode>): Likewise.
19892 (mve_vshlq_<supf><mode>): Likewise.
19894 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19895 Mihail Ionescu <mihail.ionescu@arm.com>
19896 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19898 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
19899 qualifier for binary operands.
19900 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
19901 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
19902 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
19903 (vcvtq_n_s32_f32): Likewise.
19904 (vcvtq_n_u16_f16): Likewise.
19905 (vcvtq_n_u32_f32): Likewise.
19906 (vcreateq_u8): Likewise.
19907 (vcreateq_u16): Likewise.
19908 (vcreateq_u32): Likewise.
19909 (vcreateq_u64): Likewise.
19910 (vcreateq_s8): Likewise.
19911 (vcreateq_s16): Likewise.
19912 (vcreateq_s32): Likewise.
19913 (vcreateq_s64): Likewise.
19914 (vshrq_n_s8): Likewise.
19915 (vshrq_n_s16): Likewise.
19916 (vshrq_n_s32): Likewise.
19917 (vshrq_n_u8): Likewise.
19918 (vshrq_n_u16): Likewise.
19919 (vshrq_n_u32): Likewise.
19920 (__arm_vcreateq_u8): Define intrinsic.
19921 (__arm_vcreateq_u16): Likewise.
19922 (__arm_vcreateq_u32): Likewise.
19923 (__arm_vcreateq_u64): Likewise.
19924 (__arm_vcreateq_s8): Likewise.
19925 (__arm_vcreateq_s16): Likewise.
19926 (__arm_vcreateq_s32): Likewise.
19927 (__arm_vcreateq_s64): Likewise.
19928 (__arm_vshrq_n_s8): Likewise.
19929 (__arm_vshrq_n_s16): Likewise.
19930 (__arm_vshrq_n_s32): Likewise.
19931 (__arm_vshrq_n_u8): Likewise.
19932 (__arm_vshrq_n_u16): Likewise.
19933 (__arm_vshrq_n_u32): Likewise.
19934 (__arm_vcvtq_n_s16_f16): Likewise.
19935 (__arm_vcvtq_n_s32_f32): Likewise.
19936 (__arm_vcvtq_n_u16_f16): Likewise.
19937 (__arm_vcvtq_n_u32_f32): Likewise.
19938 (vshrq_n): Define polymorphic variant.
19939 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
19941 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
19942 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
19943 * config/arm/constraints.md (Rb): Define constraint to check constant is
19944 in the range of 1 to 8.
19945 (Rf): Define constraint to check constant is in the range of 1 to 32.
19946 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
19947 (mve_vshrq_n_<supf><mode>): Likewise.
19948 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
19949 * config/arm/predicates.md (mve_imm_8): Define predicate to check
19950 the matching constraint Rb.
19951 (mve_imm_32): Define predicate to check the matching constraint Rf.
19953 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19954 Mihail Ionescu <mihail.ionescu@arm.com>
19955 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19957 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
19958 qualifier for binary operands.
19959 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
19960 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
19961 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
19962 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
19963 (vsubq_n_f32): Likewise.
19964 (vbrsrq_n_f16): Likewise.
19965 (vbrsrq_n_f32): Likewise.
19966 (vcvtq_n_f16_s16): Likewise.
19967 (vcvtq_n_f32_s32): Likewise.
19968 (vcvtq_n_f16_u16): Likewise.
19969 (vcvtq_n_f32_u32): Likewise.
19970 (vcreateq_f16): Likewise.
19971 (vcreateq_f32): Likewise.
19972 (__arm_vsubq_n_f16): Define intrinsic.
19973 (__arm_vsubq_n_f32): Likewise.
19974 (__arm_vbrsrq_n_f16): Likewise.
19975 (__arm_vbrsrq_n_f32): Likewise.
19976 (__arm_vcvtq_n_f16_s16): Likewise.
19977 (__arm_vcvtq_n_f32_s32): Likewise.
19978 (__arm_vcvtq_n_f16_u16): Likewise.
19979 (__arm_vcvtq_n_f32_u32): Likewise.
19980 (__arm_vcreateq_f16): Likewise.
19981 (__arm_vcreateq_f32): Likewise.
19982 (vsubq): Define polymorphic variant.
19983 (vbrsrq): Likewise.
19984 (vcvtq_n): Likewise.
19985 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
19987 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
19988 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
19989 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
19990 * config/arm/constraints.md (Rd): Define constraint to check constant is
19991 in the range of 1 to 16.
19992 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
19993 mve_vbrsrq_n_f<mode>: Likewise.
19994 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
19995 mve_vcreateq_f<mode>: Likewise.
19996 * config/arm/predicates.md (mve_imm_16): Define predicate to check
19997 the matching constraint Rd.
19999 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20000 Mihail Ionescu <mihail.ionescu@arm.com>
20001 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20003 * config/arm/arm-builtins.c (hi_UP): Define mode.
20004 * config/arm/arm.h (IS_VPR_REGNUM): Move.
20005 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
20006 (APSRQ_REGNUM): Modify.
20007 (APSRGE_REGNUM): Modify.
20008 * config/arm/arm_mve.h (vctp16q): Define macro.
20009 (vctp32q): Likewise.
20010 (vctp64q): Likewise.
20011 (vctp8q): Likewise.
20013 (__arm_vctp16q): Define intrinsic.
20014 (__arm_vctp32q): Likewise.
20015 (__arm_vctp64q): Likewise.
20016 (__arm_vctp8q): Likewise.
20017 (__arm_vpnot): Likewise.
20018 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
20020 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
20021 (mve_vpnothi): Likewise.
20023 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20024 Mihail Ionescu <mihail.ionescu@arm.com>
20025 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20027 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
20028 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
20029 (vdupq_n_s16): Likewise.
20030 (vdupq_n_s32): Likewise.
20031 (vabsq_s8): Likewise.
20032 (vabsq_s16): Likewise.
20033 (vabsq_s32): Likewise.
20034 (vclsq_s8): Likewise.
20035 (vclsq_s16): Likewise.
20036 (vclsq_s32): Likewise.
20037 (vclzq_s8): Likewise.
20038 (vclzq_s16): Likewise.
20039 (vclzq_s32): Likewise.
20040 (vnegq_s8): Likewise.
20041 (vnegq_s16): Likewise.
20042 (vnegq_s32): Likewise.
20043 (vaddlvq_s32): Likewise.
20044 (vaddvq_s8): Likewise.
20045 (vaddvq_s16): Likewise.
20046 (vaddvq_s32): Likewise.
20047 (vmovlbq_s8): Likewise.
20048 (vmovlbq_s16): Likewise.
20049 (vmovltq_s8): Likewise.
20050 (vmovltq_s16): Likewise.
20051 (vmvnq_s8): Likewise.
20052 (vmvnq_s16): Likewise.
20053 (vmvnq_s32): Likewise.
20054 (vrev16q_s8): Likewise.
20055 (vrev32q_s8): Likewise.
20056 (vrev32q_s16): Likewise.
20057 (vqabsq_s8): Likewise.
20058 (vqabsq_s16): Likewise.
20059 (vqabsq_s32): Likewise.
20060 (vqnegq_s8): Likewise.
20061 (vqnegq_s16): Likewise.
20062 (vqnegq_s32): Likewise.
20063 (vcvtaq_s16_f16): Likewise.
20064 (vcvtaq_s32_f32): Likewise.
20065 (vcvtnq_s16_f16): Likewise.
20066 (vcvtnq_s32_f32): Likewise.
20067 (vcvtpq_s16_f16): Likewise.
20068 (vcvtpq_s32_f32): Likewise.
20069 (vcvtmq_s16_f16): Likewise.
20070 (vcvtmq_s32_f32): Likewise.
20071 (vmvnq_u8): Likewise.
20072 (vmvnq_u16): Likewise.
20073 (vmvnq_u32): Likewise.
20074 (vdupq_n_u8): Likewise.
20075 (vdupq_n_u16): Likewise.
20076 (vdupq_n_u32): Likewise.
20077 (vclzq_u8): Likewise.
20078 (vclzq_u16): Likewise.
20079 (vclzq_u32): Likewise.
20080 (vaddvq_u8): Likewise.
20081 (vaddvq_u16): Likewise.
20082 (vaddvq_u32): Likewise.
20083 (vrev32q_u8): Likewise.
20084 (vrev32q_u16): Likewise.
20085 (vmovltq_u8): Likewise.
20086 (vmovltq_u16): Likewise.
20087 (vmovlbq_u8): Likewise.
20088 (vmovlbq_u16): Likewise.
20089 (vrev16q_u8): Likewise.
20090 (vaddlvq_u32): Likewise.
20091 (vcvtpq_u16_f16): Likewise.
20092 (vcvtpq_u32_f32): Likewise.
20093 (vcvtnq_u16_f16): Likewise.
20094 (vcvtmq_u16_f16): Likewise.
20095 (vcvtmq_u32_f32): Likewise.
20096 (vcvtaq_u16_f16): Likewise.
20097 (vcvtaq_u32_f32): Likewise.
20098 (__arm_vdupq_n_s8): Define intrinsic.
20099 (__arm_vdupq_n_s16): Likewise.
20100 (__arm_vdupq_n_s32): Likewise.
20101 (__arm_vabsq_s8): Likewise.
20102 (__arm_vabsq_s16): Likewise.
20103 (__arm_vabsq_s32): Likewise.
20104 (__arm_vclsq_s8): Likewise.
20105 (__arm_vclsq_s16): Likewise.
20106 (__arm_vclsq_s32): Likewise.
20107 (__arm_vclzq_s8): Likewise.
20108 (__arm_vclzq_s16): Likewise.
20109 (__arm_vclzq_s32): Likewise.
20110 (__arm_vnegq_s8): Likewise.
20111 (__arm_vnegq_s16): Likewise.
20112 (__arm_vnegq_s32): Likewise.
20113 (__arm_vaddlvq_s32): Likewise.
20114 (__arm_vaddvq_s8): Likewise.
20115 (__arm_vaddvq_s16): Likewise.
20116 (__arm_vaddvq_s32): Likewise.
20117 (__arm_vmovlbq_s8): Likewise.
20118 (__arm_vmovlbq_s16): Likewise.
20119 (__arm_vmovltq_s8): Likewise.
20120 (__arm_vmovltq_s16): Likewise.
20121 (__arm_vmvnq_s8): Likewise.
20122 (__arm_vmvnq_s16): Likewise.
20123 (__arm_vmvnq_s32): Likewise.
20124 (__arm_vrev16q_s8): Likewise.
20125 (__arm_vrev32q_s8): Likewise.
20126 (__arm_vrev32q_s16): Likewise.
20127 (__arm_vqabsq_s8): Likewise.
20128 (__arm_vqabsq_s16): Likewise.
20129 (__arm_vqabsq_s32): Likewise.
20130 (__arm_vqnegq_s8): Likewise.
20131 (__arm_vqnegq_s16): Likewise.
20132 (__arm_vqnegq_s32): Likewise.
20133 (__arm_vmvnq_u8): Likewise.
20134 (__arm_vmvnq_u16): Likewise.
20135 (__arm_vmvnq_u32): Likewise.
20136 (__arm_vdupq_n_u8): Likewise.
20137 (__arm_vdupq_n_u16): Likewise.
20138 (__arm_vdupq_n_u32): Likewise.
20139 (__arm_vclzq_u8): Likewise.
20140 (__arm_vclzq_u16): Likewise.
20141 (__arm_vclzq_u32): Likewise.
20142 (__arm_vaddvq_u8): Likewise.
20143 (__arm_vaddvq_u16): Likewise.
20144 (__arm_vaddvq_u32): Likewise.
20145 (__arm_vrev32q_u8): Likewise.
20146 (__arm_vrev32q_u16): Likewise.
20147 (__arm_vmovltq_u8): Likewise.
20148 (__arm_vmovltq_u16): Likewise.
20149 (__arm_vmovlbq_u8): Likewise.
20150 (__arm_vmovlbq_u16): Likewise.
20151 (__arm_vrev16q_u8): Likewise.
20152 (__arm_vaddlvq_u32): Likewise.
20153 (__arm_vcvtpq_u16_f16): Likewise.
20154 (__arm_vcvtpq_u32_f32): Likewise.
20155 (__arm_vcvtnq_u16_f16): Likewise.
20156 (__arm_vcvtmq_u16_f16): Likewise.
20157 (__arm_vcvtmq_u32_f32): Likewise.
20158 (__arm_vcvtaq_u16_f16): Likewise.
20159 (__arm_vcvtaq_u32_f32): Likewise.
20160 (__arm_vcvtaq_s16_f16): Likewise.
20161 (__arm_vcvtaq_s32_f32): Likewise.
20162 (__arm_vcvtnq_s16_f16): Likewise.
20163 (__arm_vcvtnq_s32_f32): Likewise.
20164 (__arm_vcvtpq_s16_f16): Likewise.
20165 (__arm_vcvtpq_s32_f32): Likewise.
20166 (__arm_vcvtmq_s16_f16): Likewise.
20167 (__arm_vcvtmq_s32_f32): Likewise.
20168 (vdupq_n): Define polymorphic variant.
20173 (vaddlvq): Likewise.
20174 (vaddvq): Likewise.
20175 (vmovlbq): Likewise.
20176 (vmovltq): Likewise.
20178 (vrev16q): Likewise.
20179 (vrev32q): Likewise.
20180 (vqabsq): Likewise.
20181 (vqnegq): Likewise.
20182 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
20183 (UNOP_SNONE_NONE): Likewise.
20184 (UNOP_UNONE_UNONE): Likewise.
20185 (UNOP_UNONE_NONE): Likewise.
20186 * config/arm/constraints.md (e): Define new constriant to allow only
20188 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
20189 (mve_vnegq_s<mode>): Likewise.
20190 (mve_vmvnq_<supf><mode>): Likewise.
20191 (mve_vdupq_n_<supf><mode>): Likewise.
20192 (mve_vclzq_<supf><mode>): Likewise.
20193 (mve_vclsq_s<mode>): Likewise.
20194 (mve_vaddvq_<supf><mode>): Likewise.
20195 (mve_vabsq_s<mode>): Likewise.
20196 (mve_vrev32q_<supf><mode>): Likewise.
20197 (mve_vmovltq_<supf><mode>): Likewise.
20198 (mve_vmovlbq_<supf><mode>): Likewise.
20199 (mve_vcvtpq_<supf><mode>): Likewise.
20200 (mve_vcvtnq_<supf><mode>): Likewise.
20201 (mve_vcvtmq_<supf><mode>): Likewise.
20202 (mve_vcvtaq_<supf><mode>): Likewise.
20203 (mve_vrev16q_<supf>v16qi): Likewise.
20204 (mve_vaddlvq_<supf>v4si): Likewise.
20206 2020-03-17 Jakub Jelinek <jakub@redhat.com>
20208 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
20210 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
20212 * read-rtl-function.c (find_param_by_name,
20213 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
20215 * spellcheck.c (get_edit_distance_cutoff): Likewise.
20216 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
20217 * tree.def (SWITCH_EXPR): Likewise.
20218 * selftest.c (assert_str_contains): Likewise.
20219 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
20221 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
20222 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
20223 * langhooks.h (struct lang_hooks_for_decls): Likewise.
20224 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
20225 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
20227 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
20228 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
20229 * tree.c (component_ref_size): Likewise.
20230 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
20231 * gimple-ssa-sprintf.c (get_string_length, format_string,
20232 format_directive): Likewise.
20233 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
20234 * input.c (string_concat_db::get_string_concatenation,
20235 test_lexer_string_locations_ucn4): Likewise.
20236 * cfgexpand.c (pass_expand::execute): Likewise.
20237 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
20238 maybe_diag_overlap): Likewise.
20239 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
20240 * shrink-wrap.c (spread_components): Likewise.
20241 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
20243 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
20245 * dwarf2out.c (dwarf2out_early_finish): Likewise.
20246 * gimple-ssa-store-merging.c: Likewise.
20247 * ira-costs.c (record_operand_costs): Likewise.
20248 * tree-vect-loop.c (vectorizable_reduction): Likewise.
20249 * target.def (dispatch): Likewise.
20250 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
20251 in documentation text.
20252 * doc/tm.texi: Regenerated.
20253 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
20254 duplicated word issue in a comment.
20255 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
20256 * config/i386/i386-features.c (remove_partial_avx_dependency):
20258 * config/msp430/msp430.c (msp430_select_section): Likewise.
20259 * config/gcn/gcn-run.c (load_image): Likewise.
20260 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
20261 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
20262 * config/aarch64/falkor-tag-collision-avoidance.c
20263 (single_dest_per_chain): Likewise.
20264 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
20265 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
20266 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
20267 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
20269 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
20270 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
20271 * config/rs6000/rs6000-logue.c
20272 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
20273 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
20274 Fix various other issues in the comment.
20276 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
20278 * config/arm/t-rmprofile: create new multilib for
20279 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
20282 2020-03-17 Jakub Jelinek <jakub@redhat.com>
20284 PR tree-optimization/94015
20285 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
20286 function where EXP is address of the bytes being stored rather than
20287 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
20288 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
20289 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
20290 calling native_encode_expr if host or target doesn't have 8-bit
20291 chars. Formatting fixes.
20292 (count_nonzero_bytes_addr): New function.
20294 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20295 Mihail Ionescu <mihail.ionescu@arm.com>
20296 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20298 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
20299 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
20300 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
20301 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
20302 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
20303 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
20304 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
20305 (vmvnq_n_s32): Likewise.
20306 (vrev64q_s8): Likewise.
20307 (vrev64q_s16): Likewise.
20308 (vrev64q_s32): Likewise.
20309 (vcvtq_s16_f16): Likewise.
20310 (vcvtq_s32_f32): Likewise.
20311 (vrev64q_u8): Likewise.
20312 (vrev64q_u16): Likewise.
20313 (vrev64q_u32): Likewise.
20314 (vmvnq_n_u16): Likewise.
20315 (vmvnq_n_u32): Likewise.
20316 (vcvtq_u16_f16): Likewise.
20317 (vcvtq_u32_f32): Likewise.
20318 (__arm_vmvnq_n_s16): Define intrinsic.
20319 (__arm_vmvnq_n_s32): Likewise.
20320 (__arm_vrev64q_s8): Likewise.
20321 (__arm_vrev64q_s16): Likewise.
20322 (__arm_vrev64q_s32): Likewise.
20323 (__arm_vrev64q_u8): Likewise.
20324 (__arm_vrev64q_u16): Likewise.
20325 (__arm_vrev64q_u32): Likewise.
20326 (__arm_vmvnq_n_u16): Likewise.
20327 (__arm_vmvnq_n_u32): Likewise.
20328 (__arm_vcvtq_s16_f16): Likewise.
20329 (__arm_vcvtq_s32_f32): Likewise.
20330 (__arm_vcvtq_u16_f16): Likewise.
20331 (__arm_vcvtq_u32_f32): Likewise.
20332 (vrev64q): Define polymorphic variant.
20333 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
20334 (UNOP_SNONE_NONE): Likewise.
20335 (UNOP_SNONE_IMM): Likewise.
20336 (UNOP_UNONE_UNONE): Likewise.
20337 (UNOP_UNONE_NONE): Likewise.
20338 (UNOP_UNONE_IMM): Likewise.
20339 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
20340 (mve_vcvtq_from_f_<supf><mode>): Likewise.
20341 (mve_vmvnq_n_<supf><mode>): Likewise.
20343 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20344 Mihail Ionescu <mihail.ionescu@arm.com>
20345 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20347 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
20348 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
20349 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
20350 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
20351 (vrndxq_f32): Likewise.
20352 (vrndq_f16) Likewise.
20353 (vrndq_f32): Likewise.
20354 (vrndpq_f16): Likewise.
20355 (vrndpq_f32): Likewise.
20356 (vrndnq_f16): Likewise.
20357 (vrndnq_f32): Likewise.
20358 (vrndmq_f16): Likewise.
20359 (vrndmq_f32): Likewise.
20360 (vrndaq_f16): Likewise.
20361 (vrndaq_f32): Likewise.
20362 (vrev64q_f16): Likewise.
20363 (vrev64q_f32): Likewise.
20364 (vnegq_f16): Likewise.
20365 (vnegq_f32): Likewise.
20366 (vdupq_n_f16): Likewise.
20367 (vdupq_n_f32): Likewise.
20368 (vabsq_f16): Likewise.
20369 (vabsq_f32): Likewise.
20370 (vrev32q_f16): Likewise.
20371 (vcvttq_f32_f16): Likewise.
20372 (vcvtbq_f32_f16): Likewise.
20373 (vcvtq_f16_s16): Likewise.
20374 (vcvtq_f32_s32): Likewise.
20375 (vcvtq_f16_u16): Likewise.
20376 (vcvtq_f32_u32): Likewise.
20377 (__arm_vrndxq_f16): Define intrinsic.
20378 (__arm_vrndxq_f32): Likewise.
20379 (__arm_vrndq_f16): Likewise.
20380 (__arm_vrndq_f32): Likewise.
20381 (__arm_vrndpq_f16): Likewise.
20382 (__arm_vrndpq_f32): Likewise.
20383 (__arm_vrndnq_f16): Likewise.
20384 (__arm_vrndnq_f32): Likewise.
20385 (__arm_vrndmq_f16): Likewise.
20386 (__arm_vrndmq_f32): Likewise.
20387 (__arm_vrndaq_f16): Likewise.
20388 (__arm_vrndaq_f32): Likewise.
20389 (__arm_vrev64q_f16): Likewise.
20390 (__arm_vrev64q_f32): Likewise.
20391 (__arm_vnegq_f16): Likewise.
20392 (__arm_vnegq_f32): Likewise.
20393 (__arm_vdupq_n_f16): Likewise.
20394 (__arm_vdupq_n_f32): Likewise.
20395 (__arm_vabsq_f16): Likewise.
20396 (__arm_vabsq_f32): Likewise.
20397 (__arm_vrev32q_f16): Likewise.
20398 (__arm_vcvttq_f32_f16): Likewise.
20399 (__arm_vcvtbq_f32_f16): Likewise.
20400 (__arm_vcvtq_f16_s16): Likewise.
20401 (__arm_vcvtq_f32_s32): Likewise.
20402 (__arm_vcvtq_f16_u16): Likewise.
20403 (__arm_vcvtq_f32_u32): Likewise.
20404 (vrndxq): Define polymorphic variants.
20406 (vrndpq): Likewise.
20407 (vrndnq): Likewise.
20408 (vrndmq): Likewise.
20409 (vrndaq): Likewise.
20410 (vrev64q): Likewise.
20413 (vrev32q): Likewise.
20414 (vcvtbq_f32): Likewise.
20415 (vcvttq_f32): Likewise.
20417 * config/arm/arm_mve_builtins.def (VAR2): Define.
20419 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
20420 (mve_vrndq_f<mode>): Likewise.
20421 (mve_vrndpq_f<mode>): Likewise.
20422 (mve_vrndnq_f<mode>): Likewise.
20423 (mve_vrndmq_f<mode>): Likewise.
20424 (mve_vrndaq_f<mode>): Likewise.
20425 (mve_vrev64q_f<mode>): Likewise.
20426 (mve_vnegq_f<mode>): Likewise.
20427 (mve_vdupq_n_f<mode>): Likewise.
20428 (mve_vabsq_f<mode>): Likewise.
20429 (mve_vrev32q_fv8hf): Likewise.
20430 (mve_vcvttq_f32_f16v4sf): Likewise.
20431 (mve_vcvtbq_f32_f16v4sf): Likewise.
20432 (mve_vcvtq_to_f_<supf><mode>): Likewise.
20434 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20435 Mihail Ionescu <mihail.ionescu@arm.com>
20436 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20438 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
20440 (ARM_BUILTIN_MVE_PATTERN_START): Define.
20441 (arm_init_mve_builtins): Define function.
20442 (arm_init_builtins): Add TARGET_HAVE_MVE check.
20443 (arm_expand_builtin_1): Check the range of fcode.
20444 (arm_expand_mve_builtin): Define function to expand MVE builtins.
20445 (arm_expand_builtin): Check the range of fcode.
20446 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
20448 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
20449 (vst4q_s8): Define macro.
20450 (vst4q_s16): Likewise.
20451 (vst4q_s32): Likewise.
20452 (vst4q_u8): Likewise.
20453 (vst4q_u16): Likewise.
20454 (vst4q_u32): Likewise.
20455 (vst4q_f16): Likewise.
20456 (vst4q_f32): Likewise.
20457 (__arm_vst4q_s8): Define inline builtin.
20458 (__arm_vst4q_s16): Likewise.
20459 (__arm_vst4q_s32): Likewise.
20460 (__arm_vst4q_u8): Likewise.
20461 (__arm_vst4q_u16): Likewise.
20462 (__arm_vst4q_u32): Likewise.
20463 (__arm_vst4q_f16): Likewise.
20464 (__arm_vst4q_f32): Likewise.
20465 (__ARM_mve_typeid): Define macro with MVE types.
20466 (__ARM_mve_coerce): Define macro with _Generic feature.
20467 (vst4q): Define polymorphic variant for different vst4q builtins.
20468 * config/arm/arm_mve_builtins.def: New file.
20469 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
20471 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
20472 (unspec): Define unspec.
20473 (mve_vst4q<mode>): Define RTL pattern.
20474 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
20476 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
20478 (define_split): Allow OI mode split for MVE after reload.
20479 (define_split): Allow XI mode split for MVE after reload.
20480 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
20481 (arm-builtins.o): Likewise.
20483 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
20485 * c-typeck.c (process_init_element): Handle constructor_type with
20486 type size represented by POLY_INT_CST.
20488 2020-03-17 Jakub Jelinek <jakub@redhat.com>
20490 PR tree-optimization/94187
20491 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
20492 nchars - offset < nbytes.
20494 PR middle-end/94189
20495 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
20496 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
20497 for code-generation.
20499 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
20502 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
20503 after changing memory subreg.
20505 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20506 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20508 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
20509 emulator calls for dobule precision arithmetic operations for MVE.
20511 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20512 Mihail Ionescu <mihail.ionescu@arm.com>
20513 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20515 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
20516 feature bit is on and -mfpu=auto is passed as compiler option, do not
20517 generate error on not finding any matching fpu. Because in this case
20518 fpu is not required.
20519 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
20520 enabled for MVE and also for all VFP extensions.
20521 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
20523 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
20524 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
20525 along with feature bits mve_float.
20526 (mve): Modify add options in armv8.1-m.main arch for MVE.
20527 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
20529 * config/arm/arm.c (use_return_insn): Replace the
20530 check with TARGET_VFP_BASE.
20531 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
20533 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
20534 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
20536 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
20537 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
20539 (arm_compute_frame_layout): Likewise.
20540 (arm_save_coproc_regs): Likewise.
20541 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
20543 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
20544 with equivalent macro TARGET_VFP_BASE.
20545 (arm_expand_epilogue_apcs_frame): Likewise.
20546 (arm_expand_epilogue): Likewise.
20547 (arm_conditional_register_usage): Likewise.
20548 (arm_declare_function_name): Add check to skip printing .fpu directive
20549 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
20551 * config/arm/arm.h (TARGET_VFP_BASE): Define.
20552 * config/arm/arm.md (arch): Add "mve" to arch.
20553 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
20554 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
20555 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
20556 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
20558 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
20559 to not allow for MVE.
20560 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
20562 (VUNSPEC_GET_FPSCR): Define.
20563 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
20564 instructions which move to general-purpose Register from Floating-point
20565 Special register and vice-versa.
20566 (thumb2_movhi_fp16): Likewise.
20567 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
20568 with MCR and MRC instructions which set and get Floating-point Status
20569 and Control Register (FPSCR).
20570 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
20572 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
20573 float move patterns in MVE.
20574 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
20575 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
20576 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
20577 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
20578 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
20579 TARGET_VFP_BASE check.
20580 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
20581 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
20583 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
20584 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
20588 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20589 Mihail Ionescu <mihail.ionescu@arm.com>
20590 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20592 * config.gcc (arm_mve.h): Include mve intrinsics header file.
20593 * config/arm/aout.h (p0): Add new register name for MVE predicated
20595 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
20596 common to Neon and MVE.
20597 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
20598 (arm_init_simd_builtin_types): Disable poly types for MVE.
20599 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
20600 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
20601 ARM_BUILTIN_NEON_LANE_CHECK.
20602 (mve_dereference_pointer): Add function.
20603 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
20605 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
20606 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
20607 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
20608 with floating point enabled.
20609 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
20610 simd_immediate_valid_for_move.
20611 (simd_immediate_valid_for_move): Renamed from
20612 neon_immediate_valid_for_move function.
20613 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
20614 error if vfpv2 feature bit is disabled and mve feature bit is also
20615 disabled for HARD_FLOAT_ABI.
20616 (use_return_insn): Check to not push VFP regs for MVE.
20617 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
20619 (aapcs_vfp_allocate_return_reg): Likewise.
20620 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
20621 address operand for MVE.
20622 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
20623 (neon_valid_immediate): Rename to simd_valid_immediate.
20624 (simd_valid_immediate): Rename from neon_valid_immediate.
20625 (simd_valid_immediate): MVE check on size of vector is 128 bits.
20626 (neon_immediate_valid_for_move): Rename to
20627 simd_immediate_valid_for_move.
20628 (simd_immediate_valid_for_move): Rename from
20629 neon_immediate_valid_for_move.
20630 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
20632 (neon_make_constant): Modify call to neon_valid_immediate function.
20633 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
20635 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
20636 (arm_compute_frame_layout): Calculate space for saved VFP registers for
20638 (arm_save_coproc_regs): Save coproc registers for MVE.
20639 (arm_print_operand): Add case 'E' to print memory operands for MVE.
20640 (arm_print_operand_address): Check to print register number for MVE.
20641 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
20642 (arm_modes_tieable_p): Check to allow structure mode for MVE.
20643 (arm_regno_class): Add VPR_REGNUM check.
20644 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
20646 (arm_expand_epilogue): MVE check for enabling pop instructions in
20648 (arm_print_asm_arch_directives): Modify function to disable print of
20649 .arch_extension "mve" and "fp" for cases where MVE is enabled with
20651 (arm_vector_mode_supported_p): Check for modes available in MVE interger
20652 and MVE floating point.
20653 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
20655 (arm_conditional_register_usage): Enable usage of conditional regsiter
20657 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
20658 (arm_declare_function_name): Modify function to disable print of
20659 .arch_extension "mve" and "fp" for cases where MVE is enabled with
20661 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
20662 when target general registers are required.
20663 (TARGET_HAVE_MVE_FLOAT): Likewise.
20664 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
20666 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
20667 which indicate this is not available for across function calls.
20668 (FIRST_PSEUDO_REGISTER): Modify.
20669 (VALID_MVE_MODE): Define valid MVE mode.
20670 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
20671 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
20672 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
20673 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
20675 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
20676 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
20677 (enum reg_class): Add VPR_REG entry.
20678 (REG_CLASS_NAMES): Add VPR_REG entry.
20679 * config/arm/arm.md (VPR_REGNUM): Define.
20680 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
20681 "unconditional" instructions.
20682 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
20683 (movdf_soft_insn): Modify RTL to not allow for MVE.
20684 (vfp_pop_multiple_with_writeback): Enable for MVE.
20685 (include "mve.md"): Include mve.md file.
20686 * config/arm/arm_mve.h: Add MVE intrinsics head file.
20687 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
20688 for vector predicated operands.
20689 * config/arm/iterators.md (VNIM1): Define.
20690 (VNINOTM1): Define.
20691 (VHFBF_split): Define
20692 * config/arm/mve.md: New file.
20693 (mve_mov<mode>): Define RTL for move, store and load in MVE.
20694 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
20696 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
20697 simd_immediate_valid_for_move.
20698 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
20699 is common to MVE and NEON to vec-common.md file.
20700 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
20701 * config/arm/predicates.md (vpr_register_operand): Define.
20702 * config/arm/t-arm: Add mve.md file.
20703 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
20705 (mve_store): Add MVE instructions mve_store to attribute "type".
20706 (mve_load): Add MVE instructions mve_load to attribute "type".
20707 (is_mve_type): Define attribute.
20708 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
20709 standard move patterns in MVE along with NEON and IWMMXT with mode
20711 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
20712 and IWMMXT with mode iterator V8HF.
20713 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
20715 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
20716 simd_immediate_valid_for_move.
20719 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
20722 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
20723 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
20725 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
20727 2020-03-16 Jakub Jelinek <jakub@redhat.com>
20730 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
20733 PR tree-optimization/94166
20734 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
20735 as secondary comparison key.
20737 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
20739 PR tree-optimization/94125
20740 * tree-loop-distribution.c
20741 (loop_distribution::break_alias_scc_partitions): Update post order
20742 number for merged scc.
20744 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
20747 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
20749 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
20750 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
20751 and ext_sse_reg_operand check.
20753 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
20755 * common.opt: Avoid redundancy in the help text.
20756 * config/arc/arc.opt: Likewise.
20757 * config/cr16/cr16.opt: Likewise.
20759 2020-03-14 Jakub Jelinek <jakub@redhat.com>
20761 PR middle-end/93566
20762 * tree-nested.c (convert_nonlocal_omp_clauses,
20763 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
20764 with C/C++ array sections.
20766 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
20769 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
20770 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
20773 2020-03-14 Jakub Jelinek <jakub@redhat.com>
20775 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
20776 "a an" to "an" in a comment.
20777 * hsa-common.h (is_a_helper): Likewise.
20778 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
20779 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
20780 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
20782 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
20785 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
20786 64-bit value by 64 bits (UB).
20788 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
20790 PR rtl-optimization/92303
20791 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
20793 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
20795 PR rtl-optimization/94148
20796 PR rtl-optimization/94042
20797 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
20798 (df_worklist_propagate_forward): New parameter last_change_age, use
20799 that instead of bb->aux.
20800 (df_worklist_propagate_backward): Ditto.
20801 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
20803 2020-03-13 Richard Biener <rguenther@suse.de>
20805 PR tree-optimization/94163
20806 * tree-ssa-pre.c (create_expression_by_pieces): Check
20807 whether alignment would be zero.
20809 2020-03-13 Martin Liska <mliska@suse.cz>
20812 * lto-wrapper.c (run_gcc): Use concat for appending
20813 to collect_gcc_options.
20815 2020-03-13 Jakub Jelinek <jakub@redhat.com>
20818 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
20819 instead of GEN_INT.
20821 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
20824 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
20825 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
20826 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
20827 TARGET_AVX512VL and ext_sse_reg_operand check.
20829 2020-03-13 Bu Le <bule1@huawei.com>
20832 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
20833 (-param=aarch64-double-recp-precision=): New options.
20834 * doc/invoke.texi: Document them.
20835 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
20836 instead of hard-coding the choice of 1 for float and 2 for double.
20838 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
20840 PR rtl-optimization/94119
20841 * resource.h (clear_hashed_info_until_next_barrier): Declare.
20842 * resource.c (clear_hashed_info_until_next_barrier): New function.
20843 * reorg.c (add_to_delay_list): Fix formatting.
20844 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
20845 the next instruction after removing a BARRIER.
20847 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
20849 PR middle-end/92071
20850 * expmed.c (store_integral_bit_field): For fields larger than a word,
20851 call extract_bit_field on the value if the mode is BLKmode. Remove
20852 specific path for big-endian targets and tidy things up a little bit.
20854 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
20856 PR rtl-optimization/90275
20857 * cse.c (cse_insn): Delete no-op register moves too.
20859 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
20861 * config/rx/rx.md (CTRLREG_CPEN): Remove.
20862 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
20864 2020-03-12 Richard Biener <rguenther@suse.de>
20866 PR tree-optimization/94103
20867 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
20868 punning when the mode precision is not sufficient.
20870 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
20873 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
20874 MODE_V1DF and MODE_V2SF.
20875 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
20876 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
20879 2020-03-12 Jakub Jelinek <jakub@redhat.com>
20881 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
20882 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
20883 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
20884 * doc/tm.texi: Regenerated.
20886 PR tree-optimization/94130
20887 * tree-ssa-dse.c: Include gimplify.h.
20888 (increment_start_addr): If stmt has lhs, drop the lhs from call and
20889 set it after the call to the original value of the first argument.
20891 (decrement_count): Formatting fix.
20893 2020-03-11 Delia Burduv <delia.burduv@arm.com>
20895 * config/arm/arm-builtins.c
20896 (arm_init_simd_builtin_scalar_types): New.
20897 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
20898 (vld2q_bf16): Used new builtin type.
20899 (vld3_bf16): Used new builtin type.
20900 (vld3q_bf16): Used new builtin type.
20901 (vld4_bf16): Used new builtin type.
20902 (vld4q_bf16): Used new builtin type.
20903 (vld2_dup_bf16): Used new builtin type.
20904 (vld2q_dup_bf16): Used new builtin type.
20905 (vld3_dup_bf16): Used new builtin type.
20906 (vld3q_dup_bf16): Used new builtin type.
20907 (vld4_dup_bf16): Used new builtin type.
20908 (vld4q_dup_bf16): Used new builtin type.
20910 2020-03-11 Jakub Jelinek <jakub@redhat.com>
20913 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
20914 at the start to switch to data section. Don't print extra newline if
20915 .globl directive has not been emitted.
20917 2020-03-11 Richard Biener <rguenther@suse.de>
20919 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
20922 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
20924 PR middle-end/93961
20925 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
20926 whose type is a qualified union.
20928 2020-03-11 Jakub Jelinek <jakub@redhat.com>
20931 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
20932 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
20935 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
20937 (get_nth_most_common_value): Use abs_hwi instead of abs.
20939 PR middle-end/94111
20940 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
20941 is rvc_normal, otherwise use real_to_decimal to print the number to
20944 PR tree-optimization/94114
20945 * tree-loop-distribution.c (generate_memset_builtin): Call
20946 rewrite_to_non_trapping_overflow even on mem.
20947 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
20950 2020-03-10 Jeff Law <law@redhat.com>
20952 * config/bfin/bfin.md (movsi_insv): Add length attribute.
20954 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
20957 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
20958 NAN and SIGNED_ZEROR for smax/smin.
20960 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
20963 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
20964 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
20966 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
20968 * loop-iv.c (find_simple_exit): Make it static.
20969 * cfgloop.h: Remove the corresponding prototype.
20971 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
20973 * ddg.c (create_ddg): Fix intendation.
20974 (set_recurrence_length): Likewise.
20975 (create_ddg_all_sccs): Likewise.
20977 2020-03-10 Jakub Jelinek <jakub@redhat.com>
20980 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
20981 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
20984 2020-03-09 Jason Merrill <jason@redhat.com>
20986 * gdbinit.in (pgs): Fix typo in documentation.
20988 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
20992 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
20994 PR rtl-optimization/93564
20995 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
20996 do not honor reg alloc order.
20998 2020-03-09 Andrew Pinski <apinski@marvell.com>
21000 PR inline-asm/94095
21001 * doc/extend.texi (x86 Operand Modifiers): Fix column
21004 2020-03-09 Martin Liska <mliska@suse.cz>
21007 * config/rs6000/rs6000.c (rs6000_option_override_internal):
21008 Remove set of str_align_loops and str_align_jumps as these
21009 should be set in previous 2 conditions in the function.
21011 2020-03-09 Jakub Jelinek <jakub@redhat.com>
21013 PR rtl-optimization/94045
21014 * params.opt (-param=max-find-base-term-values=): New option.
21015 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
21016 in a single toplevel find_base_term call.
21018 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
21021 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
21022 * config/aarch64/aarch64-simd.md
21023 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
21024 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
21025 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
21026 * config/aarch64/arm_neon.h:
21027 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
21028 (vmlal_lane_u16): Likewise.
21029 (vmlal_lane_s32): Likewise.
21030 (vmlal_lane_u32): Likewise.
21031 (vmlal_laneq_s16): Likewise.
21032 (vmlal_laneq_u16): Likewise.
21033 (vmlal_laneq_s32): Likewise.
21034 (vmlal_laneq_u32): Likewise.
21035 (vmull_lane_s16): Likewise.
21036 (vmull_lane_u16): Likewise.
21037 (vmull_lane_s32): Likewise.
21038 (vmull_lane_u32): Likewise.
21039 (vmull_laneq_s16): Likewise.
21040 (vmull_laneq_u16): Likewise.
21041 (vmull_laneq_s32): Likewise.
21042 (vmull_laneq_u32): Likewise.
21043 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
21046 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
21048 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
21049 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
21050 (aarch64_mls_elt<mode>): Likewise.
21051 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
21052 (aarch64_fma4_elt<mode>): Likewise.
21053 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
21054 (aarch64_fma4_elt_to_64v2df): Likewise.
21055 (aarch64_fnma4_elt<mode>): Likewise.
21056 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
21057 (aarch64_fnma4_elt_to_64v2df): Likewise.
21059 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21061 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
21062 Specify movprfx attribute.
21063 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
21065 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
21068 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
21070 (TARGET_NO_FP_IN_TOC): Same.
21071 * config/rs6000/aix71.h: Same.
21072 * config/rs6000/aix72.h: Same.
21074 2020-03-06 Andrew Pinski <apinski@marvell.com>
21075 Jeff Law <law@redhat.com>
21077 PR rtl-optimization/93996
21078 * haifa-sched.c (remove_notes): Be more careful when adding
21081 2020-03-06 Delia Burduv <delia.burduv@arm.com>
21083 * config/arm/arm_neon.h (vld2_bf16): New.
21089 (vld2_dup_bf16): New.
21090 (vld2q_dup_bf16): New.
21091 (vld3_dup_bf16): New.
21092 (vld3q_dup_bf16): New.
21093 (vld4_dup_bf16): New.
21094 (vld4q_dup_bf16): New.
21095 * config/arm/arm_neon_builtins.def
21096 (vld2): Changed to VAR13 and added v4bf, v8bf
21097 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
21098 (vld3): Changed to VAR13 and added v4bf, v8bf
21099 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
21100 (vld4): Changed to VAR13 and added v4bf, v8bf
21101 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
21102 * config/arm/iterators.md (VDXBF2): New iterator.
21103 *config/arm/neon.md (neon_vld2): Use new iterators.
21104 (neon_vld2_dup<mode): Use new iterators.
21105 (neon_vld3<mode>): Likewise.
21106 (neon_vld3qa<mode>): Likewise.
21107 (neon_vld3qb<mode>): Likewise.
21108 (neon_vld3_dup<mode>): Likewise.
21109 (neon_vld4<mode>): Likewise.
21110 (neon_vld4qa<mode>): Likewise.
21111 (neon_vld4qb<mode>): Likewise.
21112 (neon_vld4_dup<mode>): Likewise.
21113 (neon_vld2_dupv8bf): New.
21114 (neon_vld3_dupv8bf): Likewise.
21115 (neon_vld4_dupv8bf): Likewise.
21117 2020-03-06 Delia Burduv <delia.burduv@arm.com>
21119 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
21120 (bfloat16x8x2_t): New typedef.
21121 (bfloat16x4x3_t): New typedef.
21122 (bfloat16x8x3_t): New typedef.
21123 (bfloat16x4x4_t): New typedef.
21124 (bfloat16x8x4_t): New typedef.
21131 * config/arm/arm-builtins.c (v2bf_UP): Define.
21133 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
21134 * config/arm/arm-modes.def (V2BF): New mode.
21135 * config/arm/arm-simd-builtin-types.def
21136 (Bfloat16x2_t): New entry.
21137 * config/arm/arm_neon_builtins.def
21138 (vst2): Changed to VAR13 and added v4bf, v8bf
21139 (vst3): Changed to VAR13 and added v4bf, v8bf
21140 (vst4): Changed to VAR13 and added v4bf, v8bf
21141 * config/arm/iterators.md (VDXBF): New iterator.
21142 (VQ2BF): New iterator.
21143 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
21144 (neon_vst2<mode>): Used new iterators.
21145 (neon_vst3<mode>): Used new iterators.
21146 (neon_vst3<mode>): Used new iterators.
21147 (neon_vst3qa<mode>): Used new iterators.
21148 (neon_vst3qb<mode>): Used new iterators.
21149 (neon_vst4<mode>): Used new iterators.
21150 (neon_vst4<mode>): Used new iterators.
21151 (neon_vst4qa<mode>): Used new iterators.
21152 (neon_vst4qb<mode>): Used new iterators.
21154 2020-03-06 Delia Burduv <delia.burduv@arm.com>
21156 * config/aarch64/aarch64-simd-builtins.def
21157 (bfcvtn): New built-in function.
21158 (bfcvtn_q): New built-in function.
21159 (bfcvtn2): New built-in function.
21160 (bfcvt): New built-in function.
21161 * config/aarch64/aarch64-simd.md
21162 (aarch64_bfcvtn<q><mode>): New pattern.
21163 (aarch64_bfcvtn2v8bf): New pattern.
21164 (aarch64_bfcvtbf): New pattern.
21165 * config/aarch64/arm_bf16.h (float32_t): New typedef.
21166 (vcvth_bf16_f32): New intrinsic.
21167 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
21168 (vcvtq_low_bf16_f32): New intrinsic.
21169 (vcvtq_high_bf16_f32): New intrinsic.
21170 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
21171 (UNSPEC_BFCVTN): New UNSPEC.
21172 (UNSPEC_BFCVTN2): New UNSPEC.
21173 (UNSPEC_BFCVT): New UNSPEC.
21174 * config/arm/types.md (bf_cvt): New type.
21176 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
21178 * config/s390/s390.md ("tabort"): Get rid of two consecutive
21179 blanks in format string.
21181 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
21185 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
21186 * config/i386/i386.c (ix86_get_ssemov): New function.
21187 (ix86_output_ssemov): Likewise.
21188 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
21189 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
21191 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
21192 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
21193 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
21194 (*movti_internal): Likewise.
21195 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
21197 2020-03-05 Jeff Law <law@redhat.com>
21199 PR tree-optimization/91890
21200 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
21201 Use gimple_or_expr_nonartificial_location.
21202 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
21203 Use gimple_or_expr_nonartificial_location.
21204 * gimple.c (gimple_or_expr_nonartificial_location): New function.
21205 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
21206 * tree-ssa-strlen.c (maybe_warn_overflow): Use
21207 gimple_or_expr_nonartificial_location.
21208 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
21209 (maybe_warn_pointless_strcmp): Likewise.
21211 2020-03-05 Jakub Jelinek <jakub@redhat.com>
21214 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
21215 SRC and MASK arguments to __m128 from __m128d.
21216 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
21218 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
21220 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
21221 argument to __m128i from __m128d.
21222 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
21224 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
21225 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
21228 2020-03-05 Delia Burduv <delia.burduv@arm.com>
21230 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
21231 (vbfmlalbq_f32): New.
21232 (vbfmlaltq_f32): New.
21233 (vbfmlalbq_lane_f32): New.
21234 (vbfmlaltq_lane_f32): New.
21235 (vbfmlalbq_laneq_f32): New.
21236 (vbfmlaltq_laneq_f32): New.
21237 * config/arm/arm_neon_builtins.def (vmmla): New.
21242 (vfmab_laneq): New.
21243 (vfmat_laneq): New.
21244 * config/arm/iterators.md (BF_MA): New int iterator.
21245 (bt): New int attribute.
21246 (VQXBF): Copy of VQX with V8BF.
21247 * config/arm/neon.md (neon_vmmlav8bf): New insn.
21248 (neon_vfma<bt>v8bf): New insn.
21249 (neon_vfma<bt>_lanev8bf): New insn.
21250 (neon_vfma<bt>_laneqv8bf): New expand.
21251 (neon_vget_high<mode>): Changed iterator to VQXBF.
21252 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
21253 (UNSPEC_BFMAB): New UNSPEC.
21254 (UNSPEC_BFMAT): New UNSPEC.
21256 2020-03-05 Jakub Jelinek <jakub@redhat.com>
21258 PR middle-end/93399
21259 * tree-pretty-print.h (pretty_print_string): Declare.
21260 * tree-pretty-print.c (pretty_print_string): Remove forward
21261 declaration, no longer static. Change nbytes parameter type
21262 from unsigned to size_t.
21263 * print-rtl.c (print_value) <case CONST_STRING>: Use
21264 pretty_print_string and for shrink way too long strings.
21266 2020-03-05 Richard Biener <rguenther@suse.de>
21267 Jakub Jelinek <jakub@redhat.com>
21269 PR tree-optimization/93582
21270 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
21271 last operand as signed when looking for memset offset. Formatting
21274 2020-03-04 Andrew Pinski <apinski@marvell.com>
21277 * value-prof.c (dump_histogram_value): Use std::abs.
21279 2020-03-04 Martin Sebor <msebor@redhat.com>
21281 PR tree-optimization/93986
21282 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
21283 operands to the same precision widest_int to avoid ICEs.
21285 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
21288 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
21289 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
21290 for OPTION_MASK_ALTIVEC.
21292 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
21294 * config.gcc: Include the glibc-stdint.h header for zTPF.
21296 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
21298 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
21299 direct FPR-GPR copies.
21300 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
21303 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
21305 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
21306 operands to the prologue_tpf expander.
21307 (s390_emit_epilogue): Likewise.
21308 (s390_option_override_internal): Do error checking and setup for
21310 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
21311 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
21312 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
21313 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
21314 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
21315 operands for the check flag and the branch target.
21316 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
21317 ("mtpf-trace-hook-prologue-target")
21318 ("mtpf-trace-hook-epilogue-check")
21319 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
21321 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
21322 options are for debugging purposes and will not be documented
21325 2020-03-04 Jakub Jelinek <jakub@redhat.com>
21328 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
21330 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
21331 argument. Change pd argument so that it can be modified. Turn
21332 constant non-CONSTRUCTOR store into non-constant if it is too large.
21333 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
21335 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
21338 2020-02-04 Richard Biener <rguenther@suse.de>
21340 PR tree-optimization/93964
21341 * graphite-isl-ast-to-gimple.c
21342 (gcc_expression_from_isl_ast_expr_id): Add intermediate
21343 conversion for pointer to integer converts.
21344 * graphite-scop-detection.c (assign_parameter_index_in_region):
21347 2020-03-04 Martin Liska <mliska@suse.cz>
21351 * doc/invoke.texi: Clarify --help=language and --help=common
21354 2020-03-04 Jakub Jelinek <jakub@redhat.com>
21356 PR tree-optimization/94001
21357 * tree-tailcall.c (process_assignment): Before comparing op1 to
21358 *ass_var, verify *ass_var is non-NULL.
21360 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
21363 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
21366 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
21368 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
21369 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
21370 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
21371 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
21372 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
21373 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
21374 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
21375 (V_bf_low, V_bf_cvt_m): New mode attributes.
21376 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
21377 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
21378 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
21379 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
21380 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
21382 2020-03-03 Jakub Jelinek <jakub@redhat.com>
21384 PR tree-optimization/93582
21385 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
21386 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
21387 members, initialize them in the constructor and if mask is non-NULL,
21388 artificially push_partial_def {} for the portions of the mask that
21390 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
21391 val and return (void *)-1. Formatting fix.
21392 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
21394 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
21395 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
21397 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
21399 (visit_stmt): Formatting fix.
21401 2020-03-03 Richard Biener <rguenther@suse.de>
21403 PR tree-optimization/93946
21404 * alias.h (refs_same_for_tbaa_p): Declare.
21405 * alias.c (refs_same_for_tbaa_p): New function.
21406 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
21408 * tree-ssa-scopedtables.h
21409 (avail_exprs_stack::lookup_avail_expr): Add output argument
21410 giving access to the hashtable entry.
21411 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
21413 * tree-ssa-dom.c: Include alias.h.
21414 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
21415 removing redundant store.
21416 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
21417 (ao_ref_init_from_vn_reference): Adjust prototype.
21418 (vn_reference_lookup_pieces): Likewise.
21419 (vn_reference_insert_pieces): Likewise.
21420 * tree-ssa-sccvn.c: Track base alias set in addition to alias
21422 (eliminate_dom_walker::eliminate_stmt): Also check base alias
21423 set when removing redundant stores.
21424 (visit_reference_op_store): Likewise.
21425 * dse.c (record_store): Adjust valdity check for redundant
21428 2020-03-03 Jakub Jelinek <jakub@redhat.com>
21431 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
21433 PR rtl-optimization/94002
21434 * explow.c (plus_constant): Punt if cst has VOIDmode and
21435 get_pool_mode is different from mode.
21437 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21439 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
21440 address has an offset which fits the scalling constraint for a
21441 load/store operation.
21442 (legitimate_scaled_address_p): Update use
21443 leigitimate_small_data_address_p.
21444 (arc_print_operand): Likewise.
21445 (arc_legitimate_address_p): Likewise.
21446 (legitimate_small_data_address_p): Likewise.
21448 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21450 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
21451 (fnmasf4_fpu): Likewise.
21453 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21455 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
21457 (subdi3): Likewise.
21458 (adddi3_i): Remove pattern.
21459 (subdi3_i): Likewise.
21461 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21463 * config/arc/arc.md (eh_return): Add length info.
21465 2020-03-02 David Malcolm <dmalcolm@redhat.com>
21467 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
21469 2020-03-02 David Malcolm <dmalcolm@redhat.com>
21471 * doc/invoke.texi (Static Analyzer Options): Add
21472 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
21475 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
21478 * config/i386/i386.md (movstrict<mode>): Allow only
21479 registers with VALID_INT_MODE_P modes.
21481 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
21483 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
21484 (reduc_insn): Use 'U' and 'B' operand codes.
21485 (reduc_<reduc_op>_scal_<mode>): Allow all types.
21486 (reduc_<reduc_op>_scal_v64di): Delete.
21487 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
21488 (*plus_carry_dpp_shr_v64si): Change to ...
21489 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
21490 (mov_from_lane63_v64di): Change to ...
21491 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
21492 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
21493 Support UNSPEC_MOV_DPP_SHR output formats.
21494 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
21495 Add "use_extends" reductions.
21496 (print_operand_address): Add 'I' and 'U' codes.
21497 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
21499 2020-03-02 Martin Liska <mliska@suse.cz>
21501 * lto-wrapper.c: Fix typo in comment about
21502 C++ standard version.
21504 2020-03-01 Martin Sebor <msebor@redhat.com>
21507 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
21509 2020-03-01 Martin Sebor <msebor@redhat.com>
21511 PR middle-end/93829
21512 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
21513 of a pointer in the outermost ADDR_EXPRs.
21515 2020-02-28 Jeff Law <law@redhat.com>
21517 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
21518 * config/v850/v850.c (v850_asm_trampoline_template): Update
21521 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
21524 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
21527 2020-02-28 Martin Liska <mliska@suse.cz>
21530 * configure.ac: Improve detection of ld_date by requiring
21531 either two dashes or none.
21532 * configure: Regenerate.
21534 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
21536 PR rtl-optimization/93564
21537 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
21538 do not honor reg alloc order.
21540 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
21543 * config/aarch64/aarch64.c (aarch64_override_options): Fix
21544 misleading warning string.
21546 2020-02-27 Martin Sebor <msebor@redhat.com>
21548 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
21550 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
21553 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
21554 Split the insn into two parts. This insn only does variable
21555 extract from a register.
21556 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
21557 variable extract from memory.
21558 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
21559 only does variable extract from a register.
21560 (vsx_extract_v4sf_var_load): New insn, do variable extract from
21562 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
21563 into two parts. This insn only does variable extract from a
21565 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
21566 do variable extract from memory.
21568 2020-02-27 Martin Jambor <mjambor@suse.cz>
21569 Feng Xue <fxue@os.amperecomputing.com>
21572 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
21573 new function calls_same_node_or_its_all_contexts_clone_p.
21574 (cgraph_edge_brings_value_p): Use it.
21575 (cgraph_edge_brings_value_p): Likewise.
21576 (self_recursive_pass_through_p): Return false if caller is a clone.
21577 (self_recursive_agg_pass_through_p): Likewise.
21579 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
21581 PR middle-end/92152
21582 * alias.c (ends_tbaa_access_path_p): Break out from ...
21583 (component_uses_parent_alias_set_from): ... here.
21584 * alias.h (ends_tbaa_access_path_p): Declare.
21585 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
21586 handle trailing arrays past end of tbaa access path.
21587 (aliasing_component_refs_p): ... here; likewise.
21588 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
21589 path; disambiguate also past end of it.
21590 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
21593 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
21595 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
21596 beginning of the file.
21597 (vcreate_bf16, vcombine_bf16): New.
21598 (vdup_n_bf16, vdupq_n_bf16): New.
21599 (vdup_lane_bf16, vdup_laneq_bf16): New.
21600 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
21601 (vduph_lane_bf16, vduph_laneq_bf16): New.
21602 (vset_lane_bf16, vsetq_lane_bf16): New.
21603 (vget_lane_bf16, vgetq_lane_bf16): New.
21604 (vget_high_bf16, vget_low_bf16): New.
21605 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
21606 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
21607 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
21608 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
21609 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
21610 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
21611 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
21612 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
21613 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
21614 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
21615 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
21616 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
21617 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
21618 (vreinterpretq_bf16_p128): New.
21619 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
21620 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
21621 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
21622 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
21623 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
21624 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
21625 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
21626 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
21627 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
21628 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
21629 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
21630 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
21631 (vreinterpretq_p128_bf16): New.
21632 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
21633 (V_elem): Likewise.
21634 (V_elem_l): Likewise.
21635 (VD_LANE): Likewise.
21637 (V_DOUBLE): Likewise.
21638 (VDQX): Add V4BF and V8BF.
21639 (V_two_elem, V_three_elem, V_four_elem): Likewise.
21641 (V_HALF): Likewise.
21642 (V_double_vector_mode): Likewise.
21643 (V_cmp_result): Likewise.
21644 (V_uf_sclr): Likewise.
21645 (V_sz_elem): Likewise.
21646 (Is_d_reg): Likewise.
21647 (V_mode_nunits): Likewise.
21648 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
21650 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
21652 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
21653 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
21654 (<expander><mode>3<exec>): Likewise.
21655 (<expander><mode>3): New.
21656 (v<expander><mode>3): New.
21657 (<expander><mode>3): New.
21658 (<expander><mode>3<exec>): Rename to ...
21659 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
21660 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
21662 2020-02-27 Alexandre Oliva <oliva@adacore.com>
21664 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
21667 2020-02-27 Richard Biener <rguenther@suse.de>
21669 PR tree-optimization/93508
21670 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
21671 non-_CHK variants. Valueize their length arguments.
21673 2020-02-27 Richard Biener <rguenther@suse.de>
21675 PR tree-optimization/93953
21676 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
21677 to the hash-map entry.
21679 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
21681 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
21683 2020-02-27 Mark Williams <mwilliams@fb.com>
21685 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
21686 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
21687 -ffile-prefix-map and -fmacro-prefix-map.
21688 * lto-streamer-out.c: Include file-prefix-map.h.
21689 (lto_output_location): Remap the file part of locations.
21691 2020-02-27 Jakub Jelinek <jakub@redhat.com>
21694 * gimplify.c (gimplify_init_constructor): Don't promote readonly
21695 DECL_REGISTER variables to TREE_STATIC.
21697 PR tree-optimization/93582
21698 PR tree-optimization/93945
21699 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
21700 non-zero INTEGER_CST second argument and ref->offset or ref->size
21701 not a multiple of BITS_PER_UNIT.
21703 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
21705 * doc/install.texi (Binaries): Update description of BullFreeware.
21707 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
21711 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
21712 C++ Language Options, Warning Options, and Static Analyzer
21713 Options lists. Document negative form of options enabled by
21714 default. Move some things around to more accurately sort
21715 warnings by category.
21716 (C++ Dialect Options, Warning Options, Static Analyzer
21717 Options): Document negative form of options when enabled by
21718 default. Move some things around to more accurately sort
21719 warnings by category. Add some missing index entries.
21720 Light copy-editing.
21722 2020-02-26 Carl Love <cel@us.ibm.com>
21725 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
21726 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
21727 for the vector unsigned short arguments. It is also listed as the
21728 name of the built-in for arguments vector unsigned short,
21729 vector unsigned int and vector unsigned long long built-ins. The
21730 name of the builtins for these arguments should be:
21731 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
21732 __builtin_crypto_vpmsumd respectively.
21734 2020-02-26 Richard Biener <rguenther@suse.de>
21736 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
21737 and load permutation.
21739 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
21741 PR middle-end/93843
21742 * optabs-tree.c (supportable_convert_operation): Reject types with
21745 2020-02-26 David Malcolm <dmalcolm@redhat.com>
21747 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
21749 2020-02-26 Jakub Jelinek <jakub@redhat.com>
21751 PR tree-optimization/93820
21752 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
21753 argument to ALL_INTEGER_CST_P boolean.
21754 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
21755 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
21756 adjacent INTEGER_CST store into merged_store->only_constants like
21759 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21762 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
21764 * cfghooks.c (verify_flow_info): Likewise.
21765 * predict.c (combine_predictions_for_bb): Likewise.
21766 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
21767 sucessor -> successor.
21768 (find_traces_1_round): Fix comment typo, destinarion -> destination.
21769 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
21771 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
21772 message typo, sucessors -> successors.
21774 2020-02-25 Martin Sebor <msebor@redhat.com>
21776 * doc/extend.texi (attribute access): Correct an example.
21778 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
21780 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
21782 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
21783 (VAR15, VAR16): New.
21784 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
21785 (VD): Enable for V4BF.
21787 (VQ): Enable for V8BF.
21789 (VQ_NO2E): Likewise.
21790 (VDBL, Vdbl): Add V4BF.
21791 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
21792 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
21793 (bfloat16x8x2_t): Likewise.
21794 (bfloat16x4x3_t): Likewise.
21795 (bfloat16x8x3_t): Likewise.
21796 (bfloat16x4x4_t): Likewise.
21797 (bfloat16x8x4_t): Likewise.
21798 (vcombine_bf16): New.
21799 (vld1_bf16, vld1_bf16_x2): New.
21800 (vld1_bf16_x3, vld1_bf16_x4): New.
21801 (vld1q_bf16, vld1q_bf16_x2): New.
21802 (vld1q_bf16_x3, vld1q_bf16_x4): New.
21803 (vld1_lane_bf16): New.
21804 (vld1q_lane_bf16): New.
21805 (vld1_dup_bf16): New.
21806 (vld1q_dup_bf16): New.
21809 (vld2_dup_bf16): New.
21810 (vld2q_dup_bf16): New.
21813 (vld3_dup_bf16): New.
21814 (vld3q_dup_bf16): New.
21817 (vld4_dup_bf16): New.
21818 (vld4q_dup_bf16): New.
21819 (vst1_bf16, vst1_bf16_x2): New.
21820 (vst1_bf16_x3, vst1_bf16_x4): New.
21821 (vst1q_bf16, vst1q_bf16_x2): New.
21822 (vst1q_bf16_x3, vst1q_bf16_x4): New.
21823 (vst1_lane_bf16): New.
21824 (vst1q_lane_bf16): New.
21832 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
21834 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
21835 (VALL_F16): Likewise.
21836 (VALLDI_F16): Likewise.
21838 (Vetype): Likewise.
21839 (vswap_width_name): Likewise.
21840 (VSWAP_WIDTH): Likewise.
21844 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
21845 (vget_lane_bf16, vgetq_lane_bf16): New.
21846 (vcreate_bf16): New.
21847 (vdup_n_bf16, vdupq_n_bf16): New.
21848 (vdup_lane_bf16, vdup_laneq_bf16): New.
21849 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
21850 (vduph_lane_bf16, vduph_laneq_bf16): New.
21851 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
21852 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
21853 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
21854 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
21855 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
21856 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
21857 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
21858 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
21859 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
21860 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
21861 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
21862 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
21863 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
21864 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
21865 (vreinterpretq_bf16_p128): New.
21866 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
21867 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
21868 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
21869 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
21870 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
21871 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
21872 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
21873 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
21874 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
21875 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
21876 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
21877 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
21878 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
21879 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
21880 (vreinterpretq_p128_bf16): New.
21882 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
21884 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
21885 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
21886 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
21887 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
21888 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
21889 * config/arm/iterators.md (VSF2BF): New attribute.
21890 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
21891 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
21892 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
21894 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
21896 * config/arm/arm.md (required_for_purecode): New attribute.
21897 (enabled): Handle required_for_purecode.
21898 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
21899 work with -mpure-code.
21901 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21903 PR rtl-optimization/93908
21904 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
21907 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
21909 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
21911 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
21913 * doc/install.texi (--enable-checking): Adjust wording.
21915 2020-02-25 Richard Biener <rguenther@suse.de>
21917 PR tree-optimization/93868
21918 * tree-vect-slp.c (slp_copy_subtree): New function.
21919 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
21920 re-arranging stmts in it.
21922 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21924 PR middle-end/93874
21925 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
21926 dummy function and remove it at the end.
21928 PR translation/93864
21929 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
21930 paramter -> parameter.
21931 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
21932 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
21934 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
21936 * doc/install.texi (--enable-checking): Properly document current
21938 (--enable-stage1-checking): Minor clarification about bootstrap.
21940 2020-02-24 David Malcolm <dmalcolm@redhat.com>
21943 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
21944 -fanalyzer-checker=taint is also required.
21945 (-fanalyzer-checker=): Note that providing this option enables the
21946 given checker, and doing so may be required for checkers that are
21947 disabled by default.
21949 2020-02-24 David Malcolm <dmalcolm@redhat.com>
21951 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
21952 significant control flow events; add a "3" which shows all
21953 control flow events; the old "3" becomes "4".
21955 2020-02-24 Jakub Jelinek <jakub@redhat.com>
21957 PR tree-optimization/93582
21958 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
21959 pd.offset and pd.size to be counted in bits rather than bytes, add
21960 support for maxsizei that is not a multiple of BITS_PER_UNIT and
21961 handle bitfield stores and loads.
21962 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
21963 uncomparable quantities - bytes vs. bits. Allow push_partial_def
21964 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
21965 pd.offset/pd.size to be counted in bits rather than bytes.
21966 Formatting fix. Rename shadowed len variable to buflen.
21968 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
21969 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
21972 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
21973 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
21974 * opts-common.c (parse_options_from_collect_gcc_options): New function.
21975 (prepend_xassembler_to_collect_as_options): Likewise.
21976 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
21977 (prepend_xassembler_to_collect_as_options): Likewise.
21978 * lto-opts.c (lto_write_options): Stream assembler options
21979 in COLLECT_AS_OPTIONS.
21980 * lto-wrapper.c (xassembler_options_error): New static variable.
21981 (get_options_from_collect_gcc_options): Move parsing options code to
21982 parse_options_from_collect_gcc_options and call it.
21983 (merge_and_complain): Validate -Xassembler options.
21984 (append_compiler_options): Handle OPT_Xassembler.
21985 (run_gcc): Append command line -Xassembler options to
21986 collect_gcc_options.
21987 * doc/invoke.texi: Add documentation about using Xassembler
21990 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
21992 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
21994 (riscv_rtx_costs): Update cost model for LTGT.
21996 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
21998 PR rtl-optimization/93564
21999 * ira-color.c (struct update_cost_queue_elem): New member start.
22000 (queue_update_cost, get_next_update_cost): Add new arg start.
22001 (allocnos_conflict_p): New function.
22002 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
22003 Add checking conflicts with allocnos_conflict_p.
22004 (update_costs_from_prefs, restore_costs_from_copies): Adjust
22005 update_costs_from_allocno calls.
22006 (update_conflict_hard_regno_costs): Add checking conflicts with
22007 allocnos_conflict_p. Adjust calls of queue_update_cost and
22008 get_next_update_cost.
22009 (assign_hard_reg): Adjust calls of queue_update_cost. Add
22011 (bucket_allocno_compare_func): Restore previous version.
22013 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
22015 * config/pa/pa.c (pa_function_value): Fix check for word and
22016 double-word size when handling aggregate return values.
22017 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
22018 that homogeneous SFmode and DFmode aggregates are passed and returned
22019 in general registers.
22021 2020-02-21 Jakub Jelinek <jakub@redhat.com>
22023 PR translation/93759
22024 * opts.c (print_filtered_help): Translate help before appending
22025 messages to it rather than after that.
22027 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
22029 PR rtl-optimization/PR92989
22030 * lra-lives.c (process_bb_lives): Restore the original order
22031 of the bb liveness update. Call make_hard_regno_dead for each
22032 register clobbered at the start of an EH receiver.
22034 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
22037 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
22038 self-recursively generated.
22040 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
22043 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
22046 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
22048 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
22049 Document new target supports option.
22051 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
22053 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
22054 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
22055 * config/arm/iterators.md (MATMUL): New iterator.
22056 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
22057 (mmla_sfx): New attribute.
22058 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
22059 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
22060 (UNSPEC_MATMUL_US): New.
22062 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22064 * config/arm/arm.md: Prevent scalar shifts from being used when big
22067 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
22068 Richard Biener <rguenther@suse.de>
22070 PR tree-optimization/93586
22071 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
22072 after mismatched array refs; do not sure type size information to
22073 recover from unmatched referneces with !flag_strict_aliasing_p.
22075 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
22077 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
22078 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
22079 (scatter_store<mode>): Rename to ...
22080 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
22081 (scatter<mode>_exec): Delete. Move contents ...
22082 (mask_scatter_store<mode>): ... here, and rename that to ...
22083 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
22084 Remove mode conversion.
22085 (mask_gather_load<mode>): Rename to ...
22086 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
22087 Remove mode conversion.
22088 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
22090 2020-02-21 Martin Jambor <mjambor@suse.cz>
22092 PR tree-optimization/93845
22093 * tree-sra.c (verify_sra_access_forest): Only test access size of
22096 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
22098 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
22099 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
22100 (addv64di3_exec): Likewise.
22101 (subv64di3): Likewise.
22102 (subv64di3_exec): Likewise.
22103 (addv64di3_zext): Likewise.
22104 (addv64di3_zext_exec): Likewise.
22105 (addv64di3_zext_dup): Likewise.
22106 (addv64di3_zext_dup_exec): Likewise.
22107 (addv64di3_zext_dup2): Likewise.
22108 (addv64di3_zext_dup2_exec): Likewise.
22109 (addv64di3_sext_dup2): Likewise.
22110 (addv64di3_sext_dup2_exec): Likewise.
22111 (<expander>v64di3): Likewise.
22112 (<expander>v64di3_exec): Likewise.
22113 (*<reduc_op>_dpp_shr_v64di): Likewise.
22114 (*plus_carry_dpp_shr_v64di): Likewise.
22115 * config/gcn/gcn.md (adddi3): Likewise.
22116 (addptrdi3): Likewise.
22117 (<expander>di3): Likewise.
22119 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
22121 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
22123 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
22125 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
22126 support. Use aarch64_emit_mult instead of emitting multiplication
22127 instructions directly.
22128 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
22129 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
22131 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
22133 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
22134 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
22135 instead of emitting multiplication instructions directly.
22136 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
22137 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
22138 (@aarch64_frecps<mode>): New expanders.
22140 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
22142 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
22143 on and produce uint64_ts rather than ints.
22144 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
22145 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
22147 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
22149 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
22150 an unused xmsk register when handling approximate rsqrt.
22152 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
22154 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
22155 flag_finite_math_only condition.
22157 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
22160 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
22161 to destination operand for shufps alternative.
22162 (*vec_extractv2si_1): Ditto.
22164 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
22167 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
22170 2020-02-20 Martin Liska <mliska@suse.cz>
22172 PR translation/93831
22173 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
22175 2020-02-20 Martin Liska <mliska@suse.cz>
22177 PR translation/93830
22178 * common/config/avr/avr-common.c: Remote trailing "|".
22180 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
22182 * collect2.c (maybe_run_lto_and_relink): Fix typo in
22185 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
22187 PR tree-optimization/93767
22188 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
22189 access-size bias from the offset calculations for negative strides.
22191 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
22193 * collect2.c (c_file, o_file): Make const again.
22194 (ldout,lderrout, dump_ld_file): Remove.
22195 (tool_cleanup): Avoid calling not signal-safe functions.
22196 (maybe_run_lto_and_relink): Avoid possible signal handler
22197 access to unintialzed memory (lto_o_files).
22198 (main): Avoid leaking temp files in $TMPDIR.
22199 Initialize c_file/o_file with concat, which avoids exposing
22200 uninitialized memory to signal handler, which calls unlink(!).
22201 Avoid calling maybe_unlink when the main function returns,
22202 since the atexit handler is already doing this.
22203 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
22205 2020-02-19 Martin Jambor <mjambor@suse.cz>
22207 PR tree-optimization/93776
22208 * tree-sra.c (create_access): Do not create zero size accesses.
22209 (get_access_for_expr): Do not search for zero sized accesses.
22211 2020-02-19 Martin Jambor <mjambor@suse.cz>
22213 PR tree-optimization/93667
22214 * tree-sra.c (scalarizable_type_p): Return false if record fields
22215 do not follow wach other.
22217 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
22219 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
22220 rather than fmv.x.s/fmv.s.x.
22222 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
22224 * config/aarch64/aarch64-simd-builtins.def
22225 (intrinsic_vec_smult_lo_): New.
22226 (intrinsic_vec_umult_lo_): Likewise.
22227 (vec_widen_smult_hi_): Likewise.
22228 (vec_widen_umult_hi_): Likewise.
22229 * config/aarch64/aarch64-simd.md
22230 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
22231 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
22232 (vmull_high_s16): Likewise.
22233 (vmull_high_s32): Likewise.
22234 (vmull_high_u8): Likewise.
22235 (vmull_high_u16): Likewise.
22236 (vmull_high_u32): Likewise.
22237 (vmull_s8): Likewise.
22238 (vmull_s16): Likewise.
22239 (vmull_s32): Likewise.
22240 (vmull_u8): Likewise.
22241 (vmull_u16): Likewise.
22242 (vmull_u32): Likewise.
22244 2020-02-18 Martin Liska <mliska@suse.cz>
22246 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
22247 bootstrap by missing removal of invalid sanity check.
22249 2020-02-18 Martin Liska <mliska@suse.cz>
22252 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
22253 Always compare LHS of gimple_assign.
22255 2020-02-18 Martin Liska <mliska@suse.cz>
22258 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
22259 and return type of functions.
22260 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
22261 Drop MALLOC attribute for void functions.
22262 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
22263 malloc_state for a new VOID clone.
22265 2020-02-18 Martin Liska <mliska@suse.cz>
22268 * common.opt: Add -fprofile-reproducibility.
22269 * doc/invoke.texi: Document it.
22270 * value-prof.c (dump_histogram_value):
22271 Document and support behavior for counters[0]
22272 being a negative value.
22273 (get_nth_most_common_value): Handle negative
22274 counters[0] in respect to flag_profile_reproducible.
22276 2020-02-18 Jakub Jelinek <jakub@redhat.com>
22279 * cgraph.c (verify_speculative_call): Use speculative_id instead of
22280 speculative_uid in messages. Remove trailing whitespace from error
22281 message. Use num_speculative_call_targets instead of
22282 num_speculative_targets in a message.
22283 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
22284 edge messages and stmt instead of cal_stmt in reference message.
22286 PR tree-optimization/93780
22287 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
22288 before calling build_vector_type.
22289 (execute_update_addresses_taken): Likewise.
22292 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
22293 typo, functoin -> function.
22294 * tree.c (free_lang_data_in_decl): Fix comment typo,
22295 functoin -> function.
22296 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
22298 2020-02-17 David Malcolm <dmalcolm@redhat.com>
22300 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
22302 (print_option_information): Don't call get_option_url if URLs
22305 2020-02-17 Alexandre Oliva <oliva@adacore.com>
22307 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
22308 handling of register_common-less targets.
22310 2020-02-17 Martin Liska <mliska@suse.cz>
22313 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
22315 2020-02-17 Martin Liska <mliska@suse.cz>
22317 PR translation/93755
22318 * config/rs6000/rs6000.c (rs6000_option_override_internal):
22321 2020-02-17 Martin Liska <mliska@suse.cz>
22324 * config/rx/elf.opt: Fix typo.
22326 2020-02-17 Richard Biener <rguenther@suse.de>
22329 * opts-global.c (print_ignored_options): Use inform and
22332 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
22335 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
22337 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
22340 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
22341 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
22343 2020-02-15 Jason Merrill <jason@redhat.com>
22345 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
22347 2020-02-15 Jakub Jelinek <jakub@redhat.com>
22349 PR tree-optimization/93744
22350 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
22351 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
22352 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
22353 sure @2 in the first and @1 in the other patterns has no side-effects.
22355 2020-02-15 David Malcolm <dmalcolm@redhat.com>
22356 Bernd Edlinger <bernd.edlinger@hotmail.de>
22360 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
22361 * configure.ac (--with-diagnostics-urls): New configuration
22362 option, based on --with-diagnostics-color.
22363 (DIAGNOSTICS_URLS_DEFAULT): New define.
22364 * config.h: Regenerate.
22365 * configure: Regenerate.
22366 * diagnostic.c (diagnostic_urls_init): Handle -1 for
22367 DIAGNOSTICS_URLS_DEFAULT from configure-time
22368 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
22369 and TERM_URLS environment variable.
22370 * diagnostic-url.h (diagnostic_url_format): New enum type.
22371 (diagnostic_urls_enabled_p): rename to...
22372 (determine_url_format): ... this, and change return type.
22373 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
22374 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
22375 the linux console, and mingw.
22376 (diagnostic_urls_enabled_p): rename to...
22377 (determine_url_format): ... this, and adjust.
22378 * pretty-print.h (pretty_printer::show_urls): rename to...
22379 (pretty_printer::url_format): ... this, and change to enum.
22380 * pretty-print.c (pretty_printer::pretty_printer,
22381 pp_begin_url, pp_end_url, test_urls): Adjust.
22382 * doc/install.texi (--with-diagnostics-urls): Document the new
22383 configuration option.
22384 (--with-diagnostics-color): Document the existing interaction
22385 with GCC_COLORS better.
22386 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
22387 vindex reference. Update description of defaults based on the above.
22388 (-fdiagnostics-color): Update description of how -fdiagnostics-color
22389 interacts with GCC_COLORS.
22391 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
22394 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
22395 conjunction with TARGET_GNU_TLS in early return.
22397 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
22399 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
22400 the mode is not wider than UNITS_PER_WORD.
22402 2020-02-14 Martin Jambor <mjambor@suse.cz>
22404 PR tree-optimization/93516
22405 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
22406 access of the same type as the parent.
22407 (propagate_subaccesses_from_lhs): Likewise.
22409 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
22412 * config/i386/avx512vbmi2intrin.h
22413 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
22414 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
22415 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
22416 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
22417 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
22418 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
22419 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
22420 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
22421 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
22422 of lacking a closing parenthesis.
22423 * config/i386/avx512vbmi2vlintrin.h
22424 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
22425 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
22426 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
22427 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
22428 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
22429 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
22430 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
22431 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
22432 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
22433 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
22434 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
22435 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
22436 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
22437 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
22438 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
22439 _mm_shldi_epi32, _mm_mask_shldi_epi32,
22440 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
22441 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
22443 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
22446 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
22447 the target function entry.
22449 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22451 * common/config/arc/arc-common.c (arc_option_optimization_table):
22452 Disable if-conversion step when optimized for size.
22454 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22456 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
22457 R12-R15 are always in ARCOMPACT16_REGS register class.
22458 * config/arc/arc.opt (mq-class): Deprecate.
22459 * config/arc/constraint.md ("q"): Remove dependency on mq-class
22461 * doc/invoke.texi (mq-class): Update text.
22462 * common/config/arc/arc-common.c (arc_option_optimization_table):
22465 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22467 * config/arc/arc.c (arc_insn_cost): New function.
22468 (TARGET_INSN_COST): Define.
22469 * config/arc/arc.md (cost): New attribute.
22470 (add_n): Use arc_nonmemory_operand.
22471 (ashlsi3_insn): Likewise, also update constraints.
22472 (ashrsi3_insn): Likewise.
22473 (rotrsi3): Likewise.
22474 (add_shift): Likewise.
22475 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
22477 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22479 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
22481 (umulsidi_600): Likewise.
22483 2020-02-13 Jakub Jelinek <jakub@redhat.com>
22486 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
22487 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
22488 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
22489 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
22490 pass __A to the builtin followed by __W instead of __A followed by
22492 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
22493 _mm512_mask_popcnt_epi64): Likewise.
22494 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
22495 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
22496 _mm256_mask_popcnt_epi64): Likewise.
22498 PR tree-optimization/93582
22499 * fold-const.h (shift_bytes_in_array_left,
22500 shift_bytes_in_array_right): Declare.
22501 * fold-const.c (shift_bytes_in_array_left,
22502 shift_bytes_in_array_right): New function, moved from
22503 gimple-ssa-store-merging.c, no longer static.
22504 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
22505 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
22506 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
22507 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
22508 shift_bytes_in_array.
22509 (verify_shift_bytes_in_array): Rename to ...
22510 (verify_shift_bytes_in_array_left): ... this. Use
22511 shift_bytes_in_array_left instead of shift_bytes_in_array.
22512 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
22513 instead of verify_shift_bytes_in_array.
22514 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
22515 / native_interpret_expr where the store covers all needed bits,
22516 punt on PDP-endian, otherwise allow all involved offsets and sizes
22517 not to be byte-aligned.
22520 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
22521 use const_0_to_255_operand predicate instead of immediate_operand.
22522 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
22523 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
22524 vgf2p8affineinvqb_<mode><mask_name>,
22525 vgf2p8affineqb_<mode><mask_name>): Drop mode from
22526 const_0_to_255_operand predicated operands.
22528 2020-02-12 Jeff Law <law@redhat.com>
22530 * config/h8300/h8300.md (comparison shortening peepholes): Use
22531 a mode iterator to merge the HImode and SImode peepholes.
22533 2020-02-12 Jakub Jelinek <jakub@redhat.com>
22535 PR middle-end/93663
22536 * real.c (is_even): Make static. Function comment fix.
22537 (is_halfway_below): Make static, don't assert R is not inf/nan,
22538 instead return false for those. Small formatting fixes.
22540 2020-02-12 Martin Sebor <msebor@redhat.com>
22542 PR middle-end/93646
22543 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
22544 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
22545 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
22546 (strlen_check_and_optimize_call): Adjust callee name.
22548 2020-02-12 Jeff Law <law@redhat.com>
22550 * config/h8300/h8300.md (comparison shortening peepholes): Drop
22551 (and (xor)) variant. Combine other two into single peephole.
22553 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
22555 PR rtl-optimization/93565
22556 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
22558 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
22560 * config/aarch64/aarch64-simd.md
22561 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
22562 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
22563 generating separate ADDV and zero_extend patterns.
22564 * config/aarch64/iterators.md (VDQV_E): New iterator.
22566 2020-02-12 Jeff Law <law@redhat.com>
22568 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
22569 expanders, splits, etc.
22570 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
22571 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
22572 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
22573 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
22574 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
22575 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
22576 function prototype.
22577 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
22579 2020-02-12 Jakub Jelinek <jakub@redhat.com>
22582 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
22583 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
22584 TARGET_AVX512DQ from condition.
22585 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
22586 instead of <mask_mode512bit_condition> in condition. If
22587 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
22589 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
22592 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
22595 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
22597 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
22599 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
22600 where strlen is more legible.
22601 (rs6000_builtin_vectorized_libmass): Ditto.
22602 (rs6000_print_options_internal): Ditto.
22604 2020-02-11 Martin Sebor <msebor@redhat.com>
22606 PR tree-optimization/93683
22607 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
22609 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
22611 * config/rs6000/predicates.md (cint34_operand): Rename the
22612 -mprefixed-addr option to be -mprefixed.
22613 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
22614 the -mprefixed-addr option to be -mprefixed.
22615 (OTHER_FUTURE_MASKS): Likewise.
22616 (POWERPC_MASKS): Likewise.
22617 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
22618 the -mprefixed-addr option to be -mprefixed. Change error
22619 messages to refer to -mprefixed.
22620 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
22622 (rs6000_legitimate_offset_address_p): Likewise.
22623 (rs6000_mode_dependent_address): Likewise.
22624 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
22625 "-mprefixed" for target attributes and pragmas.
22626 (address_to_insn_form): Rename the -mprefixed-addr option to be
22628 (rs6000_adjust_insn_length): Likewise.
22629 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
22630 -mprefixed-addr option to be -mprefixed.
22631 (ASM_OUTPUT_OPCODE): Likewise.
22632 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
22633 -mprefixed-addr option to be -mprefixed.
22634 * config/rs6000/rs6000.opt (-mprefixed): Rename the
22635 -mprefixed-addr option to be prefixed. Change the option from
22636 being undocumented to being documented.
22637 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
22638 -mprefixed option. Update the -mpcrel documentation to mention
22641 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
22643 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
22644 including FIRST_PSEUDO_REGISTER - 1.
22645 * ira-color.c (print_hard_reg_set): Ditto.
22647 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22649 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
22650 (USTERNOP_QUALIFIERS): New define.
22651 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
22652 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
22653 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
22654 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
22655 * config/arm/arm_neon.h (vusdot_s32): New.
22656 (vusdot_lane_s32): New.
22657 (vusdotq_lane_s32): New.
22658 (vsudot_lane_s32): New.
22659 (vsudotq_lane_s32): New.
22660 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
22661 * config/arm/iterators.md (DOTPROD_I8MM): New.
22662 (sup, opsuffix): Add <us/su>.
22663 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
22664 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
22666 2020-02-11 Richard Biener <rguenther@suse.de>
22668 PR tree-optimization/93661
22669 PR tree-optimization/93662
22670 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
22671 tree_to_poly_int64.
22672 * tree-sra.c (get_access_for_expr): Likewise.
22674 2020-02-10 Jakub Jelinek <jakub@redhat.com>
22677 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
22678 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
22679 Change condition from TARGET_AVX2 to TARGET_AVX.
22681 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
22684 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
22685 argument of strncmp.
22687 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
22689 Try to generate zero-based comparisons.
22690 * config/cris/cris.c (cris_reduce_compare): New function.
22691 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
22692 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
22693 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
22695 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
22698 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
22699 in Thumb state and also as a destination in Arm state. Add T16
22702 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
22704 * md.texi (Define Subst): Match closing paren in example.
22706 2020-02-10 Jakub Jelinek <jakub@redhat.com>
22710 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
22711 arguments of strncmp.
22713 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
22716 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
22717 but different source value.
22718 (adjust_callers_for_value_intersection): New function.
22719 (gather_edges_for_value): Adjust order of callers to let a
22720 non-self-recursive caller be the first element.
22721 (self_recursive_pass_through_p): Add a new parameter "simple", and
22722 check generalized self-recursive pass-through jump function.
22723 (self_recursive_agg_pass_through_p): Likewise.
22724 (find_more_scalar_values_for_callers_subset): Compute value from
22725 pass-through jump function for self-recursive.
22726 (intersect_with_plats): Cleanup previous implementation code for value
22727 itersection with self-recursive call edge.
22728 (intersect_with_agg_replacements): Likewise.
22729 (intersect_aggregates_with_edge): Deduce value from pass-through jump
22730 function for self-recursive call edge. Cleanup previous implementation
22731 code for value intersection with self-recursive call edge.
22732 (decide_whether_version_node): Remove dead callers and adjust order
22733 to let a non-self-recursive caller be the first element.
22735 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
22737 * recog.c: Move pass_split_before_sched2 code in front of
22738 pass_split_before_regstack.
22739 (pass_data_split_before_sched2): Rename pass to split3 from split4.
22740 (pass_data_split_before_regstack): Rename pass to split4 from split3.
22741 (rest_of_handle_split_before_sched2): Remove.
22742 (pass_split_before_sched2::execute): Unconditionally call
22744 (enable_split_before_sched2): New function.
22745 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
22746 (pass_split_before_regstack::gate): Ditto.
22747 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
22748 Update name check for renamed split4 pass.
22749 * config/sh/sh.c (register_sh_passes): Update pass insertion
22750 point for renamed split4 pass.
22752 2020-02-09 Jakub Jelinek <jakub@redhat.com>
22754 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
22755 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
22756 copying them around between host and target.
22758 2020-02-08 Andrew Pinski <apinski@marvell.com>
22761 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
22762 STRICT_ALIGNMENT also.
22764 2020-02-08 Jim Wilson <jimw@sifive.com>
22767 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
22769 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
22770 Jakub Jelinek <jakub@redhat.com>
22773 * config/i386/i386.h (CALL_USED_REGISTERS): Make
22774 xmm16-xmm31 call-used even in 64-bit ms-abi.
22776 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
22778 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
22779 (simd_ummla, simd_usmmla): Likewise.
22780 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
22781 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
22782 (vusmmlaq_s32): New.
22784 2020-02-07 Richard Biener <rguenther@suse.de>
22786 PR middle-end/93519
22787 * tree-inline.c (fold_marked_statements): Do a PRE walk,
22788 skipping unreachable regions.
22789 (optimize_inline_calls): Skip folding stmts when we didn't
22792 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
22795 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
22796 Don't return aggregates with only SFmode and DFmode in SSE
22798 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
22800 2020-02-07 Jakub Jelinek <jakub@redhat.com>
22803 * config/rs6000/rs6000-logue.c
22804 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
22805 if it fails, move rs into end_addr and retry. Add
22806 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
22807 the insn pattern doesn't describe well what exactly happens to
22811 * config/i386/predicates.md (avx_identity_operand): Remove.
22812 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
22813 (avx_<castmode><avxsizesuffix>_<castmode>,
22814 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
22815 a VEC_CONCAT of the operand and UNSPEC_CAST.
22816 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
22817 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
22821 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
22822 recog_data.insn if distance_non_agu_define changed it.
22824 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
22827 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
22828 we only had X-FORM (reg+reg) addressing for vectors. Also before
22829 ISA 3.0, we only had X-FORM addressing for scalars in the
22830 traditional Altivec registers.
22832 2020-02-06 <zhongyunde@huawei.com>
22833 Vladimir Makarov <vmakarov@redhat.com>
22835 PR rtl-optimization/93561
22836 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
22837 hard register range.
22839 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22841 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
22844 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
22846 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
22847 where the low and the high 32 bits are equal to each other specially,
22848 with an rldimi instruction.
22850 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
22852 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
22854 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
22856 * config/arm/arm-tables.opt: Regenerate.
22858 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22861 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
22862 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
22863 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
22865 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22867 PR rtl-optimization/87763
22868 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
22870 2020-02-06 Delia Burduv <delia.burduv@arm.com>
22872 * config/aarch64/aarch64-simd-builtins.def
22873 (bfmlaq): New built-in function.
22874 (bfmlalb): New built-in function.
22875 (bfmlalt): New built-in function.
22876 (bfmlalb_lane): New built-in function.
22877 (bfmlalt_lane): New built-in function.
22878 * config/aarch64/aarch64-simd.md
22879 (aarch64_bfmmlaqv4sf): New pattern.
22880 (aarch64_bfmlal<bt>v4sf): New pattern.
22881 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
22882 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
22883 (vbfmlalbq_f32): New intrinsic.
22884 (vbfmlaltq_f32): New intrinsic.
22885 (vbfmlalbq_lane_f32): New intrinsic.
22886 (vbfmlaltq_lane_f32): New intrinsic.
22887 (vbfmlalbq_laneq_f32): New intrinsic.
22888 (vbfmlaltq_laneq_f32): New intrinsic.
22889 * config/aarch64/iterators.md (BF_MLA): New int iterator.
22890 (bt): New int attribute.
22892 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
22894 * config/i386/i386.md (*pushtf): Emit "#" instead of
22895 calling gcc_unreachable in insn output.
22898 (*pushsf_rex64): Ditto for alternatives other than 1.
22899 (*pushsf): Ditto for alternatives other than 1.
22901 2020-02-06 Martin Liska <mliska@suse.cz>
22903 PR gcov-profile/91971
22904 PR gcov-profile/93466
22905 * coverage.c (coverage_init): Revert mangling of
22906 path into filename. It can lead to huge filename length.
22907 Creation of subfolders seem more natural.
22909 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22912 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
22913 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
22914 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
22916 2020-02-06 Jakub Jelinek <jakub@redhat.com>
22919 * config/i386/predicates.md (avx_identity_operand): New predicate.
22920 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
22921 define_insn_and_split.
22924 * omp-low.c (use_pointer_for_field): For nested constructs, also
22925 look for map clauses on target construct.
22926 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
22927 taskreg_nesting_level.
22930 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
22931 shared clause, call omp_notice_variable on outer context if any.
22933 2020-02-05 Jason Merrill <jason@redhat.com>
22936 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
22937 non-zero address even if weak and not yet defined.
22939 2020-02-05 Martin Sebor <msebor@redhat.com>
22941 PR tree-optimization/92765
22942 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
22943 * tree-ssa-strlen.c (compute_string_length): Remove.
22944 (determine_min_objsize): Remove.
22945 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
22946 Avoid using type size as the upper bound on string length.
22947 (handle_builtin_string_cmp): Add an argument. Adjust.
22948 (strlen_check_and_optimize_call): Pass additional argument to
22949 handle_builtin_string_cmp.
22951 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
22953 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
22954 (*pushdi2_rex64 peephole2): Unconditionally split after
22955 epilogue_completed.
22956 (*ashl<mode>3_doubleword): Ditto.
22957 (*<shift_insn><mode>3_doubleword): Ditto.
22959 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
22962 * config/rs6000/rs6000.c (get_vector_offset): Fix
22964 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
22966 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
22968 2020-02-05 David Malcolm <dmalcolm@redhat.com>
22970 * doc/analyzer.texi
22971 (Special Functions for Debugging the Analyzer): Update description
22972 of __analyzer_dump_exploded_nodes.
22974 2020-02-05 Jakub Jelinek <jakub@redhat.com>
22977 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
22978 include sets and not clobbers in the vzeroupper pattern.
22979 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
22980 the parallel has 17 (64-bit) or 9 (32-bit) elts.
22981 (*avx_vzeroupper_1): New define_insn_and_split.
22984 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
22985 don't run when !optimize.
22986 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
22989 2020-02-05 Richard Biener <rguenther@suse.de>
22991 PR middle-end/90648
22992 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
22993 checks before matching calls.
22995 2020-02-05 Jakub Jelinek <jakub@redhat.com>
22997 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
22998 function comment typo.
23000 PR middle-end/93555
23001 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
23002 simd_clone_create failed when i == 0, adjust clone->nargs by
23005 2020-02-05 Martin Liska <mliska@suse.cz>
23008 * doc/invoke.texi: Document that one should
23009 not combine ASLR and -fpch.
23011 2020-02-04 Richard Biener <rguenther@suse.de>
23013 PR tree-optimization/93538
23014 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
23016 2020-02-04 Richard Biener <rguenther@suse.de>
23018 PR tree-optimization/91123
23019 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
23020 (vn_walk_cb_data::last_vuse): New member.
23021 (vn_walk_cb_data::saved_operands): Likewsie.
23022 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
23023 (vn_walk_cb_data::push_partial_def): Use finish.
23024 (vn_reference_lookup_2): Update last_vuse and use finish if
23025 we've saved operands.
23026 (vn_reference_lookup_3): Use finish and update calls to
23027 push_partial_defs everywhere. When translating through
23028 memcpy or aggregate copies save off operands and alias-set.
23029 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
23030 operation for redundant store removal.
23032 2020-02-04 Richard Biener <rguenther@suse.de>
23034 PR tree-optimization/92819
23035 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
23036 generating more stmts than before.
23038 2020-02-04 Martin Liska <mliska@suse.cz>
23040 * config/arm/arm.c (arm_gen_far_branch): Move the function
23041 outside of selftests.
23043 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
23045 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
23046 function to adjust PC-relative vector addresses.
23047 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
23048 handle vectors with PC-relative addresses.
23050 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
23052 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
23054 (hard_reg_and_mode_to_addr_mask): Delete.
23055 (rs6000_adjust_vec_address): If the original vector address
23056 was REG+REG or REG+OFFSET and the element is not zero, do the add
23057 of the elements in the original address before adding the offset
23058 for the vector element. Use address_to_insn_form to validate the
23059 address using the register being loaded, rather than guessing
23060 whether the address is a DS-FORM or DQ-FORM address.
23062 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
23064 * config/rs6000/rs6000.c (get_vector_offset): New helper function
23065 to calculate the offset in memory from the start of a vector of a
23066 particular element. Add code to keep the element number in
23067 bounds if the element number is variable.
23068 (rs6000_adjust_vec_address): Move calculation of offset of the
23069 vector element to get_vector_offset.
23070 (rs6000_split_vec_extract_var): Do not do the initial AND of
23071 element here, move the code to get_vector_offset.
23073 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
23075 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
23078 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
23080 * config/rs6000/constraints.md: Improve documentation.
23082 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
23085 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
23086 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
23088 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
23090 * config.gcc: Remove "carrizo" support.
23091 * config/gcn/gcn-opts.h (processor_type): Likewise.
23092 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
23093 * config/gcn/gcn.opt (gpu_type): Likewise.
23094 * config/gcn/t-omp-device: Likewise.
23096 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23099 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
23100 * config/arm/arm.c (arm_gen_far_branch): New function
23101 arm_gen_far_branch.
23102 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
23104 2020-02-03 Julian Brown <julian@codesourcery.com>
23105 Tobias Burnus <tobias@codesourcery.com>
23107 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
23109 2020-02-03 Jakub Jelinek <jakub@redhat.com>
23112 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
23113 valid RTL to sum up the lowest and second lowest bytes of the popcnt
23116 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
23118 PR rtl-optimization/91333
23119 * ira-color.c (struct allocno_color_data): Add member
23121 (init_allocno_threads): Set the member up.
23122 (bucket_allocno_compare_func): Add compare hard reg
23125 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
23127 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
23129 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
23130 * config.in: Regenerated.
23131 * configure: Regenerated.
23132 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
23133 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
23134 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
23136 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
23138 * configure: Regenerate.
23140 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
23142 PR rtl-optimization/91333
23143 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
23144 reg preferences comparison up.
23146 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
23148 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
23149 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
23150 aarch64-sve-builtins-base.h.
23151 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
23152 aarch64-sve-builtins-base.cc.
23153 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
23154 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
23155 (svcvtnt): Declare.
23156 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
23157 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
23158 (svcvtnt): New functions.
23159 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
23160 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
23161 (svcvtnt): New functions.
23162 (svcvt): Add a form that converts f32 to bf16.
23163 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
23164 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
23166 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
23167 Treat B as bfloat16_t.
23168 (ternary_bfloat_lane_base): New class.
23169 (ternary_bfloat_def): Likewise.
23170 (ternary_bfloat): New shape.
23171 (ternary_bfloat_lane_def): New class.
23172 (ternary_bfloat_lane): New shape.
23173 (ternary_bfloat_lanex2_def): New class.
23174 (ternary_bfloat_lanex2): New shape.
23175 (ternary_bfloat_opt_n_def): New class.
23176 (ternary_bfloat_opt_n): New shape.
23177 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
23178 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
23179 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
23180 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
23181 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
23182 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
23183 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
23184 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
23185 the pattern off the narrow mode instead of the wider one.
23186 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
23187 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
23188 (sve_fp_op): Handle them.
23189 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
23190 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
23192 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
23194 * config/aarch64/arm_sve.h: Include arm_bf16.h.
23195 * config/aarch64/aarch64-modes.def (BF): Move definition before
23196 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
23197 (SVE_MODES): Handle BF modes.
23198 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
23200 (aarch64_full_sve_mode): Likewise.
23201 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
23203 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
23204 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
23205 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
23206 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
23208 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
23210 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
23211 (TYPES_all_data): Add bf16.
23212 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
23213 (register_tuple_type): Increase buffer size.
23214 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
23215 (bf16): New type suffix.
23216 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
23217 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
23218 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
23219 Change type from all_data to all_arith.
23220 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
23221 (svminp): Likewise.
23223 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
23224 Matthew Malcomson <matthew.malcomson@arm.com>
23225 Richard Sandiford <richard.sandiford@arm.com>
23227 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
23228 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
23229 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
23230 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
23231 __ARM_FEATURE_MATMUL_FP64.
23232 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
23233 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
23234 be disabled at the same time.
23235 (f32mm): New extension.
23236 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
23237 (AARCH64_FL_F64MM): Bump to the next bit up.
23238 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
23239 (TARGET_SVE_F64MM): New macros.
23240 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
23241 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
23242 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
23243 (UNSPEC_ZIP2Q): New unspeccs.
23244 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
23245 (optab, sur, perm_insn): Handle the new unspecs.
23246 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
23247 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
23248 TARGET_SVE_F64MM instead of separate tests.
23249 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
23250 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
23251 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
23252 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
23253 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
23254 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
23255 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
23256 (TYPES_s_signed): New macro.
23257 (TYPES_s_integer): Use it.
23258 (TYPES_d_float): New macro.
23259 (TYPES_d_data): Use it.
23260 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
23261 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
23262 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
23263 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
23264 (svmmla): New shape.
23265 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
23266 template parameters.
23267 (ternary_resize2_lane_base): Likewise.
23268 (ternary_resize2_base): New class.
23269 (ternary_qq_lane_base): Likewise.
23270 (ternary_intq_uintq_lane_def): Likewise.
23271 (ternary_intq_uintq_lane): New shape.
23272 (ternary_intq_uintq_opt_n_def): New class
23273 (ternary_intq_uintq_opt_n): New shape.
23274 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
23275 (ternary_uintq_intq_def): New class.
23276 (ternary_uintq_intq): New shape.
23277 (ternary_uintq_intq_lane_def): New class.
23278 (ternary_uintq_intq_lane): New shape.
23279 (ternary_uintq_intq_opt_n_def): New class.
23280 (ternary_uintq_intq_opt_n): New shape.
23281 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
23282 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
23283 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
23284 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
23286 (svdotprod_lane_impl): ...this new class.
23287 (svmmla_impl, svusdot_impl): New classes.
23288 (svdot_lane): Update to use svdotprod_lane_impl.
23289 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
23290 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
23292 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
23293 function, with no types defined.
23294 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
23295 AARCH64_FL_I8MM functions.
23296 (svmmla): New AARCH64_FL_F32MM function.
23297 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
23298 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
23299 AARCH64_FL_F64MM function.
23300 (REQUIRED_EXTENSIONS):
23302 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
23304 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
23307 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
23309 * config/i386/i386.md (*movoi_internal_avx): Do not check for
23310 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
23311 (*movti_internal): Do not check for
23312 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
23313 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
23314 just after check for TARGET_AVX.
23315 (*movdf_internal): Ditto.
23316 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
23317 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
23318 * config/i386/sse.md (mov<mode>_internal): Only check
23319 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
23320 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
23321 (<sse>_andnot<mode>3<mask_name>): Move check for
23322 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
23323 (<code><mode>3<mask_name>): Ditto.
23324 (*andnot<mode>3): Ditto.
23325 (*andnottf3): Ditto.
23326 (*<code><mode>3): Ditto.
23327 (*<code>tf3): Ditto.
23328 (*andnot<VI:mode>3): Remove
23329 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
23330 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
23331 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
23332 (sse4_1_blendv<ssemodesuffix>): Ditto.
23333 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
23334 Explain that tune applies to 128bit instructions only.
23336 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
23338 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
23339 to definition of hsa_kernel_description. Parse assembly to find SGPR
23340 and VGPR count of kernel and store in hsa_kernel_description.
23342 2020-01-31 Tamar Christina <tamar.christina@arm.com>
23344 PR rtl-optimization/91838
23345 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
23346 to truncate if allowed or reject combination.
23348 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
23350 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
23351 (find_inv_vars_cb): Likewise.
23353 2020-01-31 David Malcolm <dmalcolm@redhat.com>
23355 * calls.c (special_function_p): Split out the check for DECL_NAME
23356 being non-NULL and fndecl being extern at file scope into a
23357 new maybe_special_function_p and call it. Drop check for fndecl
23358 being non-NULL that was after a usage of DECL_NAME (fndecl).
23359 * tree.h (maybe_special_function_p): New inline function.
23361 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
23363 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
23364 (mask_gather_load<mode>): ... here, and zero-initialize the
23366 (maskload<mode>di): Zero-initialize the destination.
23367 * config/gcn/gcn.c:
23369 2020-01-30 David Malcolm <dmalcolm@redhat.com>
23372 * doc/analyzer.texi (Limitations): Note that constraints on
23373 floating-point values are currently ignored.
23375 2020-01-30 Jakub Jelinek <jakub@redhat.com>
23378 * symtab.c (symtab_node::noninterposable_alias): If localalias
23379 already exists, but is not usable, append numbers after it until
23380 a unique name is found. Formatting fix.
23382 PR middle-end/93505
23383 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
23386 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
23388 * config/gcn/gcn.c (print_operand): Handle LTGT.
23389 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
23391 2020-01-30 Richard Biener <rguenther@suse.de>
23393 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
23394 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
23396 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
23398 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
23399 without a DECL in .data.rel.ro.local.
23401 2020-01-30 Jakub Jelinek <jakub@redhat.com>
23404 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
23408 * config/i386/sse.md
23409 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
23410 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
23411 any_extend code iterator instead of always zero_extend.
23412 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
23413 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
23414 Use any_extend code iterator instead of always zero_extend.
23415 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
23416 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
23417 Use any_extend code iterator instead of always zero_extend.
23418 (*sse2_pmovmskb_ext): New define_insn.
23419 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
23422 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
23423 (*popcountsi2_zext_falsedep): New define_insn.
23425 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
23427 * config.in: Regenerated.
23428 * configure: Regenerated.
23430 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
23433 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
23434 LLVM's assembler changed the default in version 9.
23436 2020-01-24 Jeff Law <law@redhat.com>
23438 PR tree-optimization/89689
23439 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
23441 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
23445 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23447 PR rtl-optimization/87763
23448 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
23449 simplification to handle subregs as well as bare regs.
23450 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
23452 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
23455 * ira.c (ira): Revert use of simplified LRA algorithm.
23457 2020-01-29 Martin Jambor <mjambor@suse.cz>
23459 PR tree-optimization/92706
23460 * tree-sra.c (struct access): Fields first_link, last_link,
23461 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
23462 next_rhs_queued and grp_rhs_queued respectively, new fields
23463 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
23464 (struct assign_link): Field next renamed to next_rhs, new field
23465 next_lhs. Updated comment.
23466 (work_queue_head): Renamed to rhs_work_queue_head.
23467 (lhs_work_queue_head): New variable.
23468 (add_link_to_lhs): New function.
23469 (relink_to_new_repr): Also relink LHS lists.
23470 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
23471 (add_access_to_lhs_work_queue): New function.
23472 (pop_access_from_work_queue): Renamed to
23473 pop_access_from_rhs_work_queue.
23474 (pop_access_from_lhs_work_queue): New function.
23475 (build_accesses_from_assign): Also add links to LHS lists and to LHS
23477 (child_would_conflict_in_lacc): Renamed to
23478 child_would_conflict_in_acc. Adjusted parameter names.
23479 (create_artificial_child_access): New parameter set_grp_read, use it.
23480 (subtree_mark_written_and_enqueue): Renamed to
23481 subtree_mark_written_and_rhs_enqueue.
23482 (propagate_subaccesses_across_link): Renamed to
23483 propagate_subaccesses_from_rhs.
23484 (propagate_subaccesses_from_lhs): New function.
23485 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
23488 2020-01-29 Martin Jambor <mjambor@suse.cz>
23490 PR tree-optimization/92706
23491 * tree-sra.c (struct access): Adjust comment of
23492 grp_total_scalarization.
23493 (find_access_in_subtree): Look for single children spanning an entire
23495 (scalarizable_type_p): Allow register accesses, adjust callers.
23496 (completely_scalarize): Remove function.
23497 (scalarize_elem): Likewise.
23498 (create_total_scalarization_access): Likewise.
23499 (sort_and_splice_var_accesses): Do not track total scalarization
23501 (analyze_access_subtree): New parameter totally, adjust to new meaning
23502 of grp_total_scalarization.
23503 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
23504 (can_totally_scalarize_forest_p): New function.
23505 (create_total_scalarization_access): Likewise.
23506 (create_total_access_and_reshape): Likewise.
23507 (total_should_skip_creating_access): Likewise.
23508 (totally_scalarize_subtree): Likewise.
23509 (analyze_all_variable_accesses): Perform total scalarization after
23510 subaccess propagation using the new functions above.
23511 (initialize_constant_pool_replacements): Output initializers by
23512 traversing the access tree.
23514 2020-01-29 Martin Jambor <mjambor@suse.cz>
23516 * tree-sra.c (verify_sra_access_forest): New function.
23517 (verify_all_sra_access_forests): Likewise.
23518 (create_artificial_child_access): Set parent.
23519 (analyze_all_variable_accesses): Call the verifier.
23521 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23523 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
23524 if called on indirect edge.
23525 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
23526 speculative call if needed.
23528 2020-01-29 Richard Biener <rguenther@suse.de>
23530 PR tree-optimization/93428
23531 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
23532 permutation when the load node is created.
23533 (vect_analyze_slp_instance): Re-use it here.
23535 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23537 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
23539 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
23541 PR rtl-optimization/93272
23542 * ira-lives.c (process_out_of_region_eh_regs): New function.
23543 (process_bb_node_lives): Call it.
23545 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23547 * coverage.c (read_counts_file): Make error message lowercase.
23549 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23551 * profile-count.c (profile_quality_display_names): Fix ordering.
23553 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23556 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
23557 hash only when edge is first within the sequence.
23558 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
23559 (symbol_table::create_edge): Do not set target_prob.
23560 (cgraph_edge::remove_caller): Watch for speculative calls when updating
23561 the call site hash.
23562 (cgraph_edge::make_speculative): Drop target_prob parameter.
23563 (cgraph_edge::speculative_call_info): Remove.
23564 (cgraph_edge::first_speculative_call_target): New member function.
23565 (update_call_stmt_hash_for_removing_direct_edge): New function.
23566 (cgraph_edge::resolve_speculation): Rewrite to new API.
23567 (cgraph_edge::speculative_call_for_target): New member function.
23568 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
23569 multiple speculation targets.
23570 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
23572 (verify_speculative_call): Verify that targets form an interval.
23573 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
23574 (cgraph_edge::first_speculative_call_target): New member function.
23575 (cgraph_edge::next_speculative_call_target): New member function.
23576 (cgraph_edge::speculative_call_target_ref): New member function.
23577 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
23578 (cgraph_edge): Remove target_prob.
23579 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
23580 Fix handling of speculative calls.
23581 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
23582 * ipa-fnsummary.c (analyze_function_body): Likewise.
23583 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
23584 * ipa-profile.c (dump_histogram): Fix formating.
23585 (ipa_profile_generate_summary): Watch for overflows.
23586 (ipa_profile): Do not require probablity to be 1/2; update to new API.
23587 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
23588 (update_indirect_edges_after_inlining): Update to new API.
23589 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
23591 * profile-count.h: (profile_probability::adjusted): New.
23592 * tree-inline.c (copy_bb): Update to new speculative call API; fix
23593 updating of profile.
23594 * value-prof.c (gimple_ic_transform): Rename to ...
23595 (dump_ic_profile): ... this one; update dumping.
23596 (stream_in_histogram_value): Fix formating.
23597 (gimple_value_profile_transformations): Update.
23599 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
23602 * config/i386/i386.md (*movoi_internal_avx): Remove
23603 TARGET_SSE_TYPELESS_STORES check.
23604 (*movti_internal): Prefer TARGET_AVX over
23605 TARGET_SSE_TYPELESS_STORES.
23606 (*movtf_internal): Likewise.
23607 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
23608 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
23609 from TARGET_SSE_TYPELESS_STORES.
23611 2020-01-28 David Malcolm <dmalcolm@redhat.com>
23613 * diagnostic-core.h (warning_at): Rename overload to...
23614 (warning_meta): ...this.
23615 (emit_diagnostic_valist): Delete decl of overload taking
23616 diagnostic_metadata.
23617 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
23618 (warning_at): Rename overload taking diagnostic_metadata to...
23619 (warning_meta): ...this.
23621 2020-01-28 Richard Biener <rguenther@suse.de>
23623 PR tree-optimization/93439
23624 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
23625 * tree-cfg.c (move_sese_region_to_fn): ... here.
23626 (verify_types_in_gimple_reference): Verify used cliques are
23629 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
23632 * config/i386/i386-options.c (set_ix86_tune_features): Add an
23633 argument of a pointer to struct gcc_options and pass it to
23634 parse_mtune_ctrl_str.
23635 (ix86_function_specific_restore): Pass opts to
23636 set_ix86_tune_features.
23637 (ix86_option_override_internal): Likewise.
23638 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
23639 gcc_options and use it for x_ix86_tune_ctrl_string.
23641 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23643 PR rtl-optimization/87763
23644 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
23645 simplification to handle subregs as well as bare regs.
23646 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
23648 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23650 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
23651 for reduction chains that (now) include a call.
23653 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23655 PR tree-optimization/92822
23656 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
23657 out the don't-care elements of a vector whose significant elements
23658 are duplicates, make the don't-care elements duplicates too.
23660 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23662 PR tree-optimization/93434
23663 * tree-predcom.c (split_data_refs_to_components): Record which
23664 components have had aliasing loads removed. Prevent store-store
23665 commoning for all such components.
23667 2020-01-28 Jakub Jelinek <jakub@redhat.com>
23670 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
23671 -1 or is_vshift is true, use new_vector with number of elts npatterns
23672 rather than new_unary_operation.
23674 PR tree-optimization/93454
23675 * gimple-fold.c (fold_array_ctor_reference): Perform
23676 elt_size.to_uhwi () just once, instead of calling it in every
23677 iteration. Punt if that value is above size of the temporary
23678 buffer. Decrease third native_encode_expr argument when
23679 bufoff + elt_sz is above size of buf.
23681 2020-01-27 Joseph Myers <joseph@codesourcery.com>
23683 * config/mips/mips.c (mips_declare_object_name)
23684 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
23686 2020-01-27 Martin Liska <mliska@suse.cz>
23688 PR gcov-profile/93403
23689 * tree-profile.c (gimple_init_gcov_profiler): Generate
23690 both __gcov_indirect_call_profiler_v4 and
23691 __gcov_indirect_call_profiler_v4_atomic.
23693 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23696 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
23698 (@aarch64_split_simd_mov<mode>): Use it.
23699 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
23700 Leave the vec_extract patterns to handle 2-element vectors.
23701 (aarch64_simd_mov_from_<mode>high): Likewise.
23702 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
23703 (vec_extractv2dfv1df): Likewise.
23705 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23707 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
23708 jump conditions for *compare_condjump<GPI:mode>.
23710 2020-01-27 David Malcolm <dmalcolm@redhat.com>
23713 * digraph.cc (test_edge::test_edge): Specify template for base
23716 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23718 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
23720 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23722 * config/arc/arc-protos.h (gen_mlo): Remove.
23723 (gen_mhi): Likewise.
23724 * config/arc/arc.c (AUX_MULHI): Define.
23725 (arc_must_save_reister): Special handling for r58/59.
23726 (arc_compute_frame_size): Consider mlo/mhi registers.
23727 (arc_save_callee_saves): Emit fp/sp move only when emit_move
23729 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
23730 mlo/mhi name selection.
23731 (arc_restore_callee_saves): Don't early restore blink when ISR.
23732 (arc_expand_prologue): Add mlo/mhi saving.
23733 (arc_expand_epilogue): Add mlo/mhi restoring.
23736 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
23737 numbering when MUL64 option is used.
23738 (DWARF2_FRAME_REG_OUT): Define.
23739 * config/arc/arc.md (arc600_stall): New pattern.
23740 (VUNSPEC_ARC_ARC600_STALL): Define.
23741 (mulsi64): Use correct mlo/mhi registers.
23742 (mulsi_600): Clean it up.
23743 * config/arc/predicates.md (mlo_operand): Remove any dependency on
23745 (mhi_operand): Likewise.
23747 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23748 Petro Karashchenko <petro.karashchenko@ring.com>
23750 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
23751 attributes if needed.
23752 (prepare_move_operands): Generate special unspec instruction for
23754 (arc_isuncached_mem_p): Propagate uncached attribute to each
23756 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
23757 (VUNSPEC_ARC_STDI): Likewise.
23758 (ALLI): New mode iterator.
23759 (mALLI): New mode attribute.
23760 (lddi): New instruction pattern.
23762 (stdidi_split): Split instruction for architectures which are not
23763 supporting ll64 option.
23764 (lddidi_split): Likewise.
23766 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23768 PR rtl-optimization/92989
23769 * lra-lives.c (process_bb_lives): Update the live-in set before
23770 processing additional clobbers.
23772 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23774 PR rtl-optimization/93170
23775 * cselib.c (cselib_invalidate_regno_val): New function, split out
23777 (cselib_invalidate_regno): ...here.
23778 (cselib_invalidated_by_call_p): New function.
23779 (cselib_process_insn): Iterate over all the hard-register entries in
23780 REG_VALUES and invalidate any that cross call-clobbered registers.
23782 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23784 * dojump.c (split_comparison): Use HONOR_NANS rather than
23785 HONOR_SNANS when splitting LTGT.
23787 2020-01-27 Martin Liska <mliska@suse.cz>
23790 * opts.c (print_filtered_help): Exclude language-specific
23791 options from --help=common unless enabled in all FEs.
23793 2020-01-27 Martin Liska <mliska@suse.cz>
23795 * opts.c (print_help): Exclude params from
23796 all except --help=param.
23798 2020-01-27 Martin Liska <mliska@suse.cz>
23801 * config/i386/i386-features.c (make_resolver_func):
23802 Align the code with ppc64 target implementation.
23803 Do not generate a unique name for resolver function.
23805 2020-01-27 Richard Biener <rguenther@suse.de>
23807 PR tree-optimization/93397
23808 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
23809 converted reduction chain SLP graph adjustment.
23811 2020-01-26 Marek Polacek <polacek@redhat.com>
23814 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
23817 2020-01-26 Jason Merrill <jason@redhat.com>
23820 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
23823 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
23825 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
23826 (rx_setmem): Likewise.
23828 2020-01-26 Jakub Jelinek <jakub@redhat.com>
23831 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
23832 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
23833 drop <di> from constraint of last operand.
23836 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
23837 TARGET_AVX2 and V4DFmode not in the split condition, but in the
23838 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
23840 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
23843 * ipa-cp.c (get_info_about_necessary_edges): Remove value
23846 2020-01-24 Jeff Law <law@redhat.com>
23848 PR tree-optimization/92788
23849 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
23852 2020-01-24 Jakub Jelinek <jakub@redhat.com>
23855 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
23856 *avx_vperm_broadcast_<mode>,
23857 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
23858 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
23859 Move before avx2_perm<mode>/avx512f_perm<mode>.
23862 * simplify-rtx.c (simplify_const_unary_operation,
23863 simplify_const_binary_operation): Punt for mode precision above
23864 MAX_BITSIZE_MODE_ANY_INT.
23866 2020-01-24 Andrew Pinski <apinski@marvell.com>
23868 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
23869 alu.shift_reg to 0.
23871 2020-01-24 Jeff Law <law@redhat.com>
23874 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
23875 for REGs. Call output_operand_lossage to get more reasonable
23878 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
23880 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
23881 gcn_fp_compare_operator.
23882 (vec_cmpu<mode>di): Use gcn_compare_operator.
23883 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
23884 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
23885 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
23886 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
23887 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
23888 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
23889 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
23890 gcn_fp_compare_operator.
23891 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
23892 gcn_fp_compare_operator.
23893 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
23894 gcn_fp_compare_operator.
23895 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
23896 gcn_fp_compare_operator.
23898 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
23900 * doc/install.texi (Cross-Compiler-Specific Options): Document
23901 `--with-toolexeclibdir' option.
23903 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
23905 * target.def (flags_regnum): Also mention effect on delay slot filling.
23906 * doc/tm.texi: Regenerate.
23908 2020-01-23 Jeff Law <law@redhat.com>
23910 PR translation/90162
23911 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
23913 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
23916 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
23919 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23921 PR rtl-optimization/93402
23922 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
23925 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
23927 * config.in: Regenerated.
23928 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
23929 for TARGET_LIBC_GNUSTACK.
23930 * configure: Regenerated.
23931 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
23932 found to be 2.31 or greater.
23934 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
23936 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
23938 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
23939 (mips_asm_file_end): New function. Delegate to
23940 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
23941 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
23943 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23946 * config/i386/i386-modes.def (POImode): New mode.
23947 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
23948 * config/i386/i386.md (DPWI): New mode attribute.
23949 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
23950 (QWI): Rename to...
23951 (QPWI): ... this. Use POI instead of OI for TImode.
23952 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
23953 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
23956 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23959 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
23961 (speculation_tracker_rev): New pattern.
23962 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
23963 Use speculation_tracker_rev to track the inverse condition.
23965 2020-01-23 Richard Biener <rguenther@suse.de>
23967 PR tree-optimization/93381
23968 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
23969 alias-set of the def as argument and record the first one.
23970 (vn_walk_cb_data::first_set): New member.
23971 (vn_reference_lookup_3): Pass the alias-set of the current def
23972 to push_partial_def. Fix alias-set used in the aggregate copy
23974 (vn_reference_lookup): Consistently set *last_vuse_ptr.
23975 * real.c (clear_significand_below): Fix out-of-bound access.
23977 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23980 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
23981 New define_insn patterns.
23983 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23985 * doc/sourcebuild.texi (check-function-bodies): Add an
23986 optional target/xfail selector.
23988 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23990 PR rtl-optimization/93124
23991 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
23992 bare USE and CLOBBER insns.
23994 2020-01-22 Andrew Pinski <apinski@marvell.com>
23996 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
23998 2020-01-22 David Malcolm <dmalcolm@redhat.com>
24001 * gdbinit.in (break-on-saved-diagnostic): Update for move of
24002 diagnostic_manager into "ana" namespace.
24003 * selftest-run-tests.c (selftest::run_tests): Update for move of
24004 selftest::run_analyzer_selftests to
24005 ana::selftest::run_analyzer_selftests.
24007 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
24009 * cfgexpand.c (union_stack_vars): Update the size.
24011 2020-01-22 Richard Biener <rguenther@suse.de>
24013 PR tree-optimization/93381
24014 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
24015 throughout, handle all conversions the same.
24017 2020-01-22 Jakub Jelinek <jakub@redhat.com>
24020 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
24021 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
24022 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
24023 Call force_reg on high_in2 unconditionally.
24025 2020-01-22 Martin Liska <mliska@suse.cz>
24027 PR tree-optimization/92924
24028 * profile.c (compute_value_histograms): Divide
24029 all counter values.
24031 2020-01-22 Jakub Jelinek <jakub@redhat.com>
24034 * output.h (assemble_name_resolve): Declare.
24035 * varasm.c (assemble_name_resolve): New function.
24036 (assemble_name): Use it.
24037 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
24039 2020-01-22 Joseph Myers <joseph@codesourcery.com>
24041 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
24042 update_web_docs_git instead of update_web_docs_svn.
24044 2020-01-21 Andrew Pinski <apinski@marvell.com>
24047 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
24048 as PTR mode. Have operand 1 as being modeless, it can be P mode.
24049 (*tlsgd_small_<mode>): Likewise.
24050 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
24051 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
24052 register. Convert that register back to dest using convert_mode.
24054 2020-01-21 Jim Wilson <jimw@sifive.com>
24056 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
24059 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
24060 Uros Bizjak <ubizjak@gmail.com>
24063 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
24065 (legitimize_tls_address): Do GNU2 TLS address computation in
24066 ptr_mode and zero-extend result to Pmode.
24067 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
24068 :P with :PTR and Pmode with ptr_mode.
24069 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
24070 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
24071 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
24073 2020-01-21 Jakub Jelinek <jakub@redhat.com>
24076 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
24077 the last two operands are CONST_INT_P before using them as such.
24079 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
24081 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
24082 to get the integer element types.
24084 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
24086 * config/aarch64/aarch64-sve-builtins.h
24087 (function_expander::convert_to_pmode): Declare.
24088 * config/aarch64/aarch64-sve-builtins.cc
24089 (function_expander::convert_to_pmode): New function.
24090 (function_expander::get_contiguous_base): Use it.
24091 (function_expander::prepare_gather_address_operands): Likewise.
24092 * config/aarch64/aarch64-sve-builtins-sve2.cc
24093 (svwhilerw_svwhilewr_impl::expand): Likewise.
24095 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
24098 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
24099 cfun->machine->label_is_assembled.
24100 (aarch64_print_patchable_function_entry): New.
24101 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
24102 * config/aarch64/aarch64.h (struct machine_function): New field,
24103 label_is_assembled.
24105 2020-01-21 David Malcolm <dmalcolm@redhat.com>
24108 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
24111 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
24114 * cgraph.c (cgraph_edge::resolve_speculation,
24115 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
24116 call_stmt_site_hash.
24118 2020-01-21 Martin Liska <mliska@suse.cz>
24120 * config/rs6000/rs6000.c (common_mode_defined): Remove
24123 2020-01-21 Richard Biener <rguenther@suse.de>
24125 PR tree-optimization/92328
24126 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
24127 type when value-numbering same-sized store by inserting a
24129 (eliminate_dom_walker::eliminate_stmt): When eliminating
24130 a redundant store handle bit-reinterpretation of the same value.
24132 2020-01-21 Andrew Pinski <apinski@marvel.com>
24135 * tree-into-ssa.c (prepare_block_for_update_1): Split out
24137 (prepare_block_for_update): This. Use a worklist instead of
24140 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24142 * config/arm/arm.c (clear_operation_p):
24143 Initialise last_regno, skip first iteration
24144 based on the first_set value and use ints instead
24145 of the unnecessary HOST_WIDE_INTs.
24147 2020-01-21 Jakub Jelinek <jakub@redhat.com>
24150 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
24151 compare_mode other than SFmode or DFmode.
24153 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
24156 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
24157 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
24158 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
24160 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
24162 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
24164 2020-01-20 Andrew Pinski <apinski@marvell.com>
24166 PR middle-end/93242
24167 * targhooks.c (default_print_patchable_function_entry): Use
24168 output_asm_insn to emit the nop instruction.
24170 2020-01-20 Fangrui Song <maskray@google.com>
24172 PR middle-end/93194
24173 * targhooks.c (default_print_patchable_function_entry): Align to
24176 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
24179 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
24180 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
24181 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
24182 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
24183 (*tls_dynamic_gnu2_lea_64): Renamed to ...
24184 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
24185 Remove the {q} suffix from lea.
24186 (*tls_dynamic_gnu2_call_64): Renamed to ...
24187 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
24188 (*tls_dynamic_gnu2_combine_64): Renamed to ...
24189 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
24190 Pass Pmode to gen_tls_dynamic_gnu2_64.
24192 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
24194 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
24196 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
24198 * config/aarch64/aarch64-sve-builtins-base.cc
24199 (svld1ro_impl::memory_vector_mode): Remove parameter name.
24201 2020-01-20 Richard Biener <rguenther@suse.de>
24204 * dwarf2out.c (prune_unused_types): Unconditionally mark
24205 called function DIEs.
24207 2020-01-20 Martin Liska <mliska@suse.cz>
24209 PR tree-optimization/93199
24210 * tree-eh.c (struct leh_state): Add
24211 new field outer_non_cleanup.
24212 (cleanup_is_dead_in): Pass leh_state instead
24213 of eh_region. Add a checking that state->outer_non_cleanup
24214 points to outer non-clean up region.
24215 (lower_try_finally): Record outer_non_cleanup
24217 (lower_catch): Likewise.
24218 (lower_eh_filter): Likewise.
24219 (lower_eh_must_not_throw): Likewise.
24220 (lower_cleanup): Likewise.
24222 2020-01-20 Richard Biener <rguenther@suse.de>
24224 PR tree-optimization/93094
24225 * tree-vectorizer.h (vect_loop_versioning): Adjust.
24226 (vect_transform_loop): Likewise.
24227 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
24228 loop_vectorized_call to vect_transform_loop.
24229 * tree-vect-loop.c (vect_transform_loop): Pass down
24230 loop_vectorized_call to vect_loop_versioning.
24231 * tree-vect-loop-manip.c (vect_loop_versioning): Use
24232 the earlier discovered loop_vectorized_call.
24234 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
24236 * doc/contribute.texi: Update for SVN -> Git transition.
24237 * doc/install.texi: Likewise.
24239 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
24242 * cgraph.c (cgraph_edge::make_speculative): Increase number of
24243 speculative targets.
24244 (verify_speculative_call): New function
24245 (cgraph_node::verify_node): Use it.
24246 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
24249 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
24252 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
24253 (cgraph_edge::make_direct): Remove all indirect targets.
24254 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
24255 (cgraph_node::verify_node): Verify that only one call_stmt or
24256 lto_stmt_uid is set.
24257 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
24259 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
24260 (lto_output_ref): Simplify streaming of stmt.
24261 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
24263 2020-01-18 Tamar Christina <tamar.christina@arm.com>
24265 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
24266 Mark parameter unused.
24268 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
24270 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
24272 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
24274 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
24276 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
24278 * Makefile.in: Add coroutine-passes.o.
24279 * builtin-types.def (BT_CONST_SIZE): New.
24280 (BT_FN_BOOL_PTR): New.
24281 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
24282 * builtins.def (DEF_COROUTINE_BUILTIN): New.
24283 * coroutine-builtins.def: New file.
24284 * coroutine-passes.cc: New file.
24285 * function.h (struct GTY function): Add a bit to indicate that the
24286 function is a coroutine component.
24287 * internal-fn.c (expand_CO_FRAME): New.
24288 (expand_CO_YIELD): New.
24289 (expand_CO_SUSPN): New.
24290 (expand_CO_ACTOR): New.
24291 * internal-fn.def (CO_ACTOR): New.
24295 * passes.def: Add pass_coroutine_lower_builtins,
24296 pass_coroutine_early_expand_ifns.
24297 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
24298 (make_pass_coroutine_early_expand_ifns): New.
24299 * doc/invoke.texi: Document the fcoroutines command line
24302 2020-01-18 Jakub Jelinek <jakub@redhat.com>
24304 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
24307 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
24308 after checking the argument is a REG. Don't use REGNO (reg)
24309 again to set last_regno, reuse regno variable instead.
24311 2020-01-17 David Malcolm <dmalcolm@redhat.com>
24313 * doc/analyzer.texi (Limitations): Add note about NaN.
24315 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24316 Sudakshina Das <sudi.das@arm.com>
24318 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
24319 and valid immediate.
24320 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
24321 (lshrdi3): Generate thumb2_lsrl for valid immediates.
24322 * config/arm/constraints.md (Pg): New.
24323 * config/arm/predicates.md (long_shift_imm): New.
24324 (arm_reg_or_long_shift_imm): Likewise.
24325 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
24326 (thumb2_lsll): Likewise.
24327 (thumb2_lsrl): New.
24329 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24330 Sudakshina Das <sudi.das@arm.com>
24332 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
24333 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
24334 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
24335 register pairs for doubleword quantities for ARMv8.1M-Mainline.
24336 * config/arm/thumb2.md (thumb2_asrl): New.
24337 (thumb2_lsll): Likewise.
24339 2020-01-17 Jakub Jelinek <jakub@redhat.com>
24341 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
24344 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
24346 * gdbinit.in (help-gcc-hooks): New command.
24347 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
24348 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
24351 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
24353 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
24354 correct target macro.
24356 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
24358 * config/aarch64/aarch64-protos.h
24359 (aarch64_sve_ld1ro_operand_p): New.
24360 * config/aarch64/aarch64-sve-builtins-base.cc
24361 (class load_replicate): New.
24362 (class svld1ro_impl): New.
24363 (class svld1rq_impl): Change to inherit from load_replicate.
24364 (svld1ro): New sve intrinsic function base.
24365 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
24366 New DEF_SVE_FUNCTION.
24367 * config/aarch64/aarch64-sve-builtins-base.h
24368 (svld1ro): New decl.
24369 * config/aarch64/aarch64-sve-builtins.cc
24370 (function_expander::add_mem_operand): Modify assert to allow
24372 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
24374 * config/aarch64/aarch64.c
24375 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
24376 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
24377 (aarch64_sve_ld1ro_operand_p): New.
24378 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
24379 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
24380 * config/aarch64/predicates.md
24381 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
24383 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
24385 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
24386 Introduce this ACLE specified predefined macro.
24387 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
24388 (fp): Disabling this disables f64mm.
24389 (simd): Disabling this disables f64mm.
24390 (fp16): Disabling this disables f64mm.
24391 (sve): Disabling this disables f64mm.
24392 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
24393 (AARCH64_ISA_F64MM): New.
24394 (TARGET_F64MM): New.
24395 * doc/invoke.texi (f64mm): Document new option.
24397 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
24399 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
24400 (neoversen1_tunings): Likewise.
24402 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
24405 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
24406 Add assert to ensure prolog has been emitted.
24407 (aarch64_split_atomic_op): Likewise.
24408 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
24409 Use epilogue_completed rather than reload_completed.
24410 (aarch64_atomic_exchange<mode>): Likewise.
24411 (aarch64_atomic_<atomic_optab><mode>): Likewise.
24412 (atomic_nand<mode>): Likewise.
24413 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
24414 (atomic_fetch_nand<mode>): Likewise.
24415 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
24416 (atomic_nand_fetch<mode>): Likewise.
24418 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
24421 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
24423 (REVERSE_CONDITION): Delete.
24424 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
24425 (CCFP_CCFPE): Likewise.
24426 (e): New mode attribute.
24427 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
24428 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
24429 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
24430 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
24431 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
24432 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
24433 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
24434 name of generator from gen_ccmpdi to gen_ccmpccdi.
24435 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
24436 the previous comparison but aren't able to, use the new ccmp_rev
24439 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
24441 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
24442 than testing directly for INTEGER_CST.
24443 (gimplify_target_expr, gimplify_omp_depend): Likewise.
24445 2020-01-17 Jakub Jelinek <jakub@redhat.com>
24447 PR tree-optimization/93292
24448 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
24449 get_vectype_for_scalar_type returns NULL.
24451 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
24453 * params.opt (-param=max-predicted-iterations): Increase range from 0.
24454 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
24456 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
24458 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
24460 * params.opt: (max-predicted-iterations): Set bounds.
24461 * predict.c (real_almost_one, real_br_prob_base,
24462 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
24463 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
24464 probabilities; do not truncate to reg_br_prob_bases.
24465 (estimate_loops_at_level): Pass max_cyclic_prob.
24466 (estimate_loops): Compute max_cyclic_prob.
24467 (estimate_bb_frequencies): Do not initialize real_*; update calculation
24469 * profile-count.c (profile_probability::to_sreal): New.
24470 * profile-count.h (class sreal): Move up in file.
24471 (profile_probability::to_sreal): Declare.
24473 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24476 (arm_invalid_conversion): New function for target hook.
24477 (arm_invalid_unary_op): New function for target hook.
24478 (arm_invalid_binary_op): New function for target hook.
24480 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24482 * config.gcc: Add arm_bf16.h.
24483 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
24484 (arm_simd_builtin_std_type): Add BFmode.
24485 (arm_init_simd_builtin_types): Define element types for vector types.
24486 (arm_init_bf16_types): New function.
24487 (arm_init_builtins): Add arm_init_bf16_types function call.
24488 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
24489 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
24490 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
24491 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
24492 (arm_vector_mode_supported_p): Add V4BF, V8BF.
24493 (arm_mangle_type): Add __bf16.
24494 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
24495 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
24496 arm_bf16_ptr_type_node.
24497 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
24498 define_split between ARM registers.
24499 * config/arm/arm_bf16.h: New file.
24500 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
24501 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
24502 (VQXMOV): Add V8BF.
24503 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
24504 * config/arm/vfp.md: Add BFmode to movhf patterns.
24506 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
24507 Andre Vieira <andre.simoesdiasvieira@arm.com>
24509 * config/arm/arm-cpus.in (mve, mve_float): New features.
24510 (dsp, mve, mve.fp): New options.
24511 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
24512 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
24513 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
24515 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24516 Thomas Preud'homme <thomas.preudhomme@arm.com>
24518 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
24520 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
24521 error for using -mcmse when targeting Armv8.1-M Mainline.
24523 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24524 Thomas Preud'homme <thomas.preudhomme@arm.com>
24526 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
24527 address in r4 when targeting Armv8.1-M Mainline.
24528 (nonsecure_call_value_internal): Likewise.
24529 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
24530 a register match_operand again. Emit BLXNS when targeting
24531 Armv8.1-M Mainline.
24532 (nonsecure_call_value_reg_thumb2): Likewise.
24534 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24535 Thomas Preud'homme <thomas.preudhomme@arm.com>
24537 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
24538 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
24539 variable as true when floating-point ABI is not hard. Replace
24540 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
24541 Generate VLSTM and VLLDM instruction respectively before and
24542 after a function call to cmse_nonsecure_call function.
24543 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
24544 (VUNSPEC_VLLDM): Likewise.
24545 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
24546 (lazy_load_multiple_insn): Likewise.
24548 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24549 Thomas Preud'homme <thomas.preudhomme@arm.com>
24551 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
24552 (arm_emit_vfp_multi_reg_pop): Likewise.
24553 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
24554 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
24555 restore callee-saved VFP registers.
24557 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24558 Thomas Preud'homme <thomas.preudhomme@arm.com>
24560 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
24561 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
24562 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
24563 callee-saved GPRs as well as clear ip register before doing a nonsecure
24564 call then restore callee-saved GPRs after it when targeting
24565 Armv8.1-M Mainline.
24566 (arm_reorg): Adapt to function rename.
24568 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24569 Thomas Preud'homme <thomas.preudhomme@arm.com>
24571 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
24572 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
24573 clear_vfp_multiple pattern based on a new vfp parameter.
24574 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
24575 targeting Armv8.1-M Mainline.
24576 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
24577 unconditionally when targeting Armv8.1-M Mainline architecture. Check
24578 whether VFP registers are available before looking call_used_regs for a
24580 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
24581 of prototype of clear_operation_p.
24582 (clear_vfp_multiple_operation): New predicate.
24583 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
24584 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
24586 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24587 Thomas Preud'homme <thomas.preudhomme@arm.com>
24589 * config/arm/arm-protos.h (clear_operation_p): Declare.
24590 * config/arm/arm.c (clear_operation_p): New function.
24591 (cmse_clear_registers): Generate clear_multiple instruction pattern if
24592 targeting Armv8.1-M Mainline or successor.
24593 (output_return_instruction): Only output APSR register clearing if
24594 Armv8.1-M Mainline instructions not available.
24595 (thumb_exit): Likewise.
24596 * config/arm/predicates.md (clear_multiple_operation): New predicate.
24597 * config/arm/thumb2.md (clear_apsr): New define_insn.
24598 (clear_multiple): Likewise.
24599 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
24601 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24602 Thomas Preud'homme <thomas.preudhomme@arm.com>
24604 * config/arm/arm.c (fp_sysreg_names): Declare and define.
24605 (use_return_insn): Also return false for Armv8.1-M Mainline.
24606 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
24607 Mainline instructions are available.
24608 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
24609 when targeting Armv8.1-M Mainline Security Extensions.
24610 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
24611 Mainline entry function.
24612 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
24613 targeting Armv8.1-M Mainline or successor.
24614 (arm_expand_epilogue): Fix indentation of caller-saved register
24615 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
24617 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
24618 (FP_SYSREGS): Likewise.
24619 (enum vfp_sysregs_encoding): Define enum.
24620 (fp_sysreg_names): Declare.
24621 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
24622 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
24623 (pop_fpsysreg_insn): Likewise.
24625 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24626 Thomas Preud'homme <thomas.preudhomme@arm.com>
24628 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
24629 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
24630 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
24631 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
24632 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
24633 (ARMv8_1m_main): New feature group.
24634 (armv8.1-m.main): New architecture.
24635 * config/arm/arm-tables.opt: Regenerate.
24636 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
24637 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
24638 (arm_options_perform_arch_sanity_checks): Error out when targeting
24639 Armv8.1-M Mainline Security Extensions.
24640 * config/arm/arm.h (arm_arch8_1m_main): Declare.
24642 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24644 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
24645 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
24646 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
24647 aarch64_bfdot_laneq): New.
24648 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
24649 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
24650 vbfdotq_laneq_f32): New.
24651 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
24652 VBFMLA_W, VBF): New.
24653 (isquadop): Add V4BF, V8BF.
24655 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24657 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
24658 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
24659 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
24660 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
24661 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
24662 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
24663 usdot_laneq, sudot_lane,sudot_laneq): New.
24664 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
24665 (aarch64_<sur>dot_lane): New.
24666 * config/aarch64/arm_neon.h (vusdot_s32): New.
24667 (vusdotq_s32): New.
24668 (vusdot_lane_s32): New.
24669 (vsudot_lane_s32): New.
24670 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
24671 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
24673 2020-01-16 Martin Liska <mliska@suse.cz>
24675 * value-prof.c (dump_histogram_value): Fix
24676 obvious spacing issue.
24678 2020-01-16 Andrew Pinski <apinski@marvell.com>
24680 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
24681 !storage_order_barrier_p.
24683 2020-01-16 Andrew Pinski <apinski@marvell.com>
24685 * sched-int.h (_dep): Add unused bit-field field for the padding.
24686 * sched-deps.c (init_dep_1): Init unused field.
24688 2020-01-16 Andrew Pinski <apinski@marvell.com>
24690 * optabs.h (create_expand_operand): Initialize target field also.
24692 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
24694 PR tree-optimization/92429
24695 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
24696 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
24698 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
24701 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
24703 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
24704 aarch64_sve_int_mode to each mode.
24706 2020-01-15 David Malcolm <dmalcolm@redhat.com>
24708 * doc/analyzer.texi (Overview): Add note about
24709 -fdump-ipa-analyzer.
24711 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
24713 PR tree-optimization/93231
24714 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
24715 input_type is unsigned. Use tree_to_shwi for shift constant.
24716 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
24717 (simplify_count_trailing_zeroes): Add test to handle known non-zero
24718 inputs more efficiently.
24720 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
24722 * config/i386/i386.md (*movsf_internal): Do not require
24723 SSE2 ISA for alternatives 14 and 15.
24725 2020-01-15 Richard Biener <rguenther@suse.de>
24727 PR middle-end/93273
24728 * tree-eh.c (sink_clobbers): If we already visited the destination
24729 block do not defer insertion.
24730 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
24731 the purpose of defered insertion.
24733 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24735 * BASE-VER: Bump to 10.0.1.
24737 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
24739 PR tree-optimization/93247
24740 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
24741 type of the stmt that we're going to vectorize.
24743 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
24745 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
24746 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
24749 2020-01-15 Martin Liska <mliska@suse.cz>
24751 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
24752 2 calls of streamer_read_hwi in a function call.
24754 2020-01-15 Richard Biener <rguenther@suse.de>
24756 * alias.c (record_alias_subset): Avoid redundant work when
24757 subset is already recorded.
24759 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24761 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
24762 the analyzer options provide CWE identifiers.
24764 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24766 * tree-diagnostic-path.cc (path_summary::event_range::print):
24767 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
24768 using get_pure_location.
24770 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24772 PR tree-optimization/93262
24773 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
24774 perform head trimming only if the last argument is constant,
24775 either all ones, or larger or equal to head trim, in the latter
24776 case decrease the last argument by head_trim.
24778 PR tree-optimization/93249
24779 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
24780 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
24781 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
24782 perform head trim unless we can prove there are no '\0' chars
24783 from the source among the first head_trim chars.
24785 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24787 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
24789 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24792 * config/i386/sse.md
24793 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
24794 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
24795 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
24796 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
24797 just a single alternative instead of two, make operands 1 and 2
24800 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
24803 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
24806 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24808 * Makefile.in (lang_opt_files): Add analyzer.opt.
24809 (ANALYZER_OBJS): New.
24810 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
24811 tristate.o and ANALYZER_OBJS.
24812 (TEXI_GCCINT_FILES): Add analyzer.texi.
24813 * common.opt (-fanalyzer): New driver option.
24814 * config.in: Regenerate.
24815 * configure: Regenerate.
24816 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
24817 (gccdepdir): Also create depdir for "analyzer" subdir.
24818 * digraph.cc: New file.
24819 * digraph.h: New file.
24820 * doc/analyzer.texi: New file.
24821 * doc/gccint.texi ("Static Analyzer") New menu item.
24822 (analyzer.texi): Include it.
24823 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
24824 ("Warning Options"): Add static analysis warnings to the list.
24825 (-Wno-analyzer-double-fclose): New option.
24826 (-Wno-analyzer-double-free): New option.
24827 (-Wno-analyzer-exposure-through-output-file): New option.
24828 (-Wno-analyzer-file-leak): New option.
24829 (-Wno-analyzer-free-of-non-heap): New option.
24830 (-Wno-analyzer-malloc-leak): New option.
24831 (-Wno-analyzer-possible-null-argument): New option.
24832 (-Wno-analyzer-possible-null-dereference): New option.
24833 (-Wno-analyzer-null-argument): New option.
24834 (-Wno-analyzer-null-dereference): New option.
24835 (-Wno-analyzer-stale-setjmp-buffer): New option.
24836 (-Wno-analyzer-tainted-array-index): New option.
24837 (-Wno-analyzer-use-after-free): New option.
24838 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
24839 (-Wno-analyzer-use-of-uninitialized-value): New option.
24840 (-Wanalyzer-too-complex): New option.
24841 (-fanalyzer-call-summaries): New warning.
24842 (-fanalyzer-checker=): New warning.
24843 (-fanalyzer-fine-grained): New warning.
24844 (-fno-analyzer-state-merge): New warning.
24845 (-fno-analyzer-state-purge): New warning.
24846 (-fanalyzer-transitivity): New warning.
24847 (-fanalyzer-verbose-edges): New warning.
24848 (-fanalyzer-verbose-state-changes): New warning.
24849 (-fanalyzer-verbosity=): New warning.
24850 (-fdump-analyzer): New warning.
24851 (-fdump-analyzer-callgraph): New warning.
24852 (-fdump-analyzer-exploded-graph): New warning.
24853 (-fdump-analyzer-exploded-nodes): New warning.
24854 (-fdump-analyzer-exploded-nodes-2): New warning.
24855 (-fdump-analyzer-exploded-nodes-3): New warning.
24856 (-fdump-analyzer-supergraph): New warning.
24857 * doc/sourcebuild.texi (dg-require-dot): New.
24858 (dg-check-dot): New.
24859 * gdbinit.in (break-on-saved-diagnostic): New command.
24860 * graphviz.cc: New file.
24861 * graphviz.h: New file.
24862 * ordered-hash-map-tests.cc: New file.
24863 * ordered-hash-map.h: New file.
24864 * passes.def (pass_analyzer): Add before
24865 pass_ipa_whole_program_visibility.
24866 * selftest-run-tests.c (selftest::run_tests): Call
24867 selftest::ordered_hash_map_tests_cc_tests.
24868 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
24870 * shortest-paths.h: New file.
24871 * timevar.def (TV_ANALYZER): New timevar.
24872 (TV_ANALYZER_SUPERGRAPH): Likewise.
24873 (TV_ANALYZER_STATE_PURGE): Likewise.
24874 (TV_ANALYZER_PLAN): Likewise.
24875 (TV_ANALYZER_SCC): Likewise.
24876 (TV_ANALYZER_WORKLIST): Likewise.
24877 (TV_ANALYZER_DUMP): Likewise.
24878 (TV_ANALYZER_DIAGNOSTICS): Likewise.
24879 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
24880 * tree-pass.h (make_pass_analyzer): New decl.
24881 * tristate.cc: New file.
24882 * tristate.h: New file.
24884 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
24887 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
24888 alternatives 9 and 10.
24890 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24892 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
24893 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
24894 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
24895 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
24896 (selftest::hash_map_tests_c_tests): Call it.
24897 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
24898 New static constant, using the value of = H::empty_zero_p.
24899 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
24900 from default_hash_traits <Value>.
24901 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
24903 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
24904 * hash-table.h (hash_table::alloc_entries): Guard the loop of
24905 calls to mark_empty with !Descriptor::empty_zero_p.
24906 (hash_table::empty_slow): Conditionalize the memset call with a
24907 check that Descriptor::empty_zero_p; otherwise, loop through the
24908 entries calling mark_empty on them.
24909 * hash-traits.h (int_hash::empty_zero_p): New static constant.
24910 (pointer_hash::empty_zero_p): Likewise.
24911 (pair_hash::empty_zero_p): Likewise.
24912 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
24914 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
24915 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
24916 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
24917 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
24918 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
24919 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
24920 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
24921 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
24922 * tree-vectorizer.h
24923 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
24926 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
24928 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
24929 fix typo on return value.
24931 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
24934 * cgraph.c (symbol_table::create_edge): Init speculative_id and
24936 (cgraph_edge::make_speculative): Add param for setting speculative_id
24938 (cgraph_edge::speculative_call_info): Update comments and find reference
24939 by speculative_id for multiple indirect targets.
24940 (cgraph_edge::resolve_speculation): Decrease the speculations
24941 for indirect edge, drop it's speculative if not direct target
24942 left. Update comments.
24943 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
24944 (cgraph_node::dump): Print num_speculative_call_targets.
24945 (cgraph_node::verify_node): Don't report error if speculative
24946 edge not include statement.
24947 (cgraph_edge::num_speculative_call_targets_p): New function.
24948 * cgraph.h (int common_target_id): Remove.
24949 (int common_target_probability): Remove.
24950 (num_speculative_call_targets): New variable.
24951 (make_speculative): Add param for setting speculative_id.
24952 (cgraph_edge::num_speculative_call_targets_p): New declare.
24953 (target_prob): New variable.
24954 (speculative_id): New variable.
24955 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
24956 call summaries for multiple speculative call targets.
24957 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
24958 * ipa-profile.c (struct speculative_call_target): New struct.
24959 (class speculative_call_summary): New class.
24960 (class speculative_call_summaries): New class.
24961 (call_sums): New variable.
24962 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
24963 (ipa_profile_write_edge_summary): New function.
24964 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
24965 (ipa_profile_dump_all_summaries): New function.
24966 (ipa_profile_read_edge_summary): New function.
24967 (ipa_profile_read_summary_section): New function.
24968 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
24969 (ipa_profile): Generate num_speculative_call_targets from
24971 * ipa-ref.h (speculative_id): New variable.
24972 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
24973 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
24974 common_target_probability. Stream out speculative_id and
24975 num_speculative_call_targets.
24976 (input_edge): Likewise.
24977 * predict.c (dump_prediction): Remove edges count assert to be
24979 * symtab.c (symtab_node::create_reference): Init speculative_id.
24980 (symtab_node::clone_references): Clone speculative_id.
24981 (symtab_node::clone_referring): Clone speculative_id.
24982 (symtab_node::clone_reference): Clone speculative_id.
24983 (symtab_node::clear_stmts_in_references): Clear speculative_id.
24984 * tree-inline.c (copy_bb): Duplicate all the speculative edges
24985 if indirect call contains multiple speculative targets.
24986 * value-prof.h (check_ic_target): Remove.
24987 * value-prof.c (gimple_value_profile_transformations):
24988 Use void function gimple_ic_transform.
24989 * value-prof.c (gimple_ic_transform): Handle topn case.
24990 Fix comment typos. Change it to a void function.
24992 2020-01-13 Andrew Pinski <apinski@marvell.com>
24994 * config/aarch64/aarch64-cores.def (octeontx2): New define.
24995 (octeontx2t98): New define.
24996 (octeontx2t96): New define.
24997 (octeontx2t93): New define.
24998 (octeontx2f95): New define.
24999 (octeontx2f95n): New define.
25000 (octeontx2f95mm): New define.
25001 * config/aarch64/aarch64-tune.md: Regenerate.
25002 * doc/invoke.texi (-mcpu=): Document the new cpu types.
25004 2020-01-13 Jason Merrill <jason@redhat.com>
25006 PR c++/33799 - destroy return value if local cleanup throws.
25007 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
25009 2020-01-13 Martin Liska <mliska@suse.cz>
25011 * ipa-cp.c (get_max_overall_size): Use newly
25012 renamed param param_ipa_cp_unit_growth.
25013 * params.opt: Remove legacy param name.
25015 2020-01-13 Martin Sebor <msebor@redhat.com>
25017 PR tree-optimization/93213
25018 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
25019 stores to be eliminated.
25021 2020-01-13 Martin Liska <mliska@suse.cz>
25023 * opts.c (print_help): Do not print CL_PARAM
25024 and CL_WARNING for CL_OPTIMIZATION.
25026 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
25029 * doc/invoke.texi (Warning Options): Add caveat about some warnings
25030 depending on optimization settings.
25032 2020-01-13 Jakub Jelinek <jakub@redhat.com>
25034 PR tree-optimization/90838
25035 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
25036 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
25037 argument rather than to initialize temporary for targets that
25038 don't use the mode argument at all. Initialize ctzval to avoid
25041 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
25043 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
25044 * tree-core.h: Document it.
25045 * gimplify.c (gimplify_omp_workshare): Set it.
25046 * omp-low.c (lower_omp_target): Use it.
25047 * tree-pretty-print.c (dump_omp_clause): Print it.
25049 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
25050 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
25052 2020-01-10 David Malcolm <dmalcolm@redhat.com>
25054 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
25055 * common.opt (fdiagnostics-path-format=): New option.
25056 (diagnostic_path_format): New enum.
25057 (fdiagnostics-show-path-depths): New option.
25058 * coretypes.h (diagnostic_event_id_t): New forward decl.
25059 * diagnostic-color.c (color_dict): Add "path".
25060 * diagnostic-event-id.h: New file.
25061 * diagnostic-format-json.cc (json_from_expanded_location): Make
25063 (json_end_diagnostic): Call context->make_json_for_path if it
25064 exists and the diagnostic has a path.
25065 (diagnostic_output_format_init): Clear context->print_path.
25066 * diagnostic-path.h: New file.
25067 * diagnostic-show-locus.c (colorizer::set_range): Special-case
25068 when printing a run of events in a diagnostic_path so that they
25069 all get the same color.
25070 (layout::m_diagnostic_path_p): New field.
25071 (layout::layout): Initialize it.
25072 (layout::print_any_labels): Don't colorize the label text for an
25073 event in a diagnostic_path.
25074 (gcc_rich_location::add_location_if_nearby): Add
25075 "restrict_to_current_line_spans" and "label" params. Pass the
25076 former to layout.maybe_add_location_range; pass the latter
25077 when calling add_range.
25078 * diagnostic.c: Include "diagnostic-path.h".
25079 (diagnostic_initialize): Initialize context->path_format and
25080 context->show_path_depths.
25081 (diagnostic_show_any_path): New function.
25082 (diagnostic_path::interprocedural_p): New function.
25083 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
25084 (simple_diagnostic_path::num_events): New function.
25085 (simple_diagnostic_path::get_event): New function.
25086 (simple_diagnostic_path::add_event): New function.
25087 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
25088 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
25089 (debug): New overload taking a diagnostic_path *.
25090 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
25091 * diagnostic.h (enum diagnostic_path_format): New enum.
25092 (json::value): New forward decl.
25093 (diagnostic_context::path_format): New field.
25094 (diagnostic_context::show_path_depths): New field.
25095 (diagnostic_context::print_path): New callback field.
25096 (diagnostic_context::make_json_for_path): New callback field.
25097 (diagnostic_show_any_path): New decl.
25098 (json_from_expanded_location): New decl.
25099 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
25100 (-fdiagnostics-show-path-depths): New option.
25101 (-fdiagnostics-color): Add "path" to description of default
25102 GCC_COLORS; describe it.
25103 (-fdiagnostics-format=json): Document how diagnostic paths are
25104 represented in the JSON output format.
25105 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
25106 Add optional params "restrict_to_current_line_spans" and "label".
25107 * opts.c (common_handle_option): Handle
25108 OPT_fdiagnostics_path_format_ and
25109 OPT_fdiagnostics_show_path_depths.
25110 * pretty-print.c: Include "diagnostic-event-id.h".
25111 (pp_format): Implement "%@" format code for printing
25112 diagnostic_event_id_t *.
25113 (selftest::test_pp_format): Add tests for "%@".
25114 * selftest-run-tests.c (selftest::run_tests): Call
25115 selftest::tree_diagnostic_path_cc_tests.
25116 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
25117 * toplev.c (general_init): Initialize global_dc->path_format and
25118 global_dc->show_path_depths.
25119 * tree-diagnostic-path.cc: New file.
25120 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
25121 non-static. Drop "diagnostic" param in favor of storing the
25122 original value of "where" and re-using it.
25123 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
25124 maybe_unwind_expanded_macro_loc.
25125 (tree_diagnostics_defaults): Initialize context->print_path and
25126 context->make_json_for_path.
25127 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
25129 (default_tree_make_json_for_path): New decl.
25130 (maybe_unwind_expanded_macro_loc): New decl.
25132 2020-01-10 Jakub Jelinek <jakub@redhat.com>
25134 PR tree-optimization/93210
25135 * fold-const.h (native_encode_initializer,
25136 can_native_interpret_type_p): Declare.
25137 * fold-const.c (native_encode_string): Fix up handling with off != -1,
25139 (native_encode_initializer): New function, moved from dwarf2out.c.
25140 Adjust to native_encode_expr compatible arguments, including dry-run
25141 and partial extraction modes. Don't handle STRING_CST.
25142 (can_native_interpret_type_p): No longer static.
25143 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
25144 offset / BITS_PER_UNIT fits into int and don't call it if
25145 can_native_interpret_type_p fails. If suboff is NULL and for
25146 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
25147 native_encode_initializer.
25148 (fold_const_aggregate_ref_1): Formatting fix.
25149 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
25150 (tree_add_const_value_attribute): Adjust caller.
25152 PR tree-optimization/90838
25153 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
25154 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
25155 CTZ_DEFINED_VALUE_AT_ZERO.
25157 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
25159 PR inline-asm/93027
25160 * lra-constraints.c (match_reload): Permit input operands have the
25161 same mode as output while other input operands have a different
25164 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
25166 PR tree-optimization/90838
25167 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
25168 (check_ctz_string): Likewise.
25169 (optimize_count_trailing_zeroes): Likewise.
25170 (simplify_count_trailing_zeroes): Likewise.
25171 (pass_forwprop::execute): Try ctz simplification.
25172 * match.pd: Add matching for ctz idioms.
25174 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
25176 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
25178 (aarch64_invalid_unary_op): New function for target hook.
25179 (aarch64_invalid_binary_op): New function for target hook.
25181 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
25183 * config.gcc: Add arm_bf16.h.
25184 * config/aarch64/aarch64-builtins.c
25185 (aarch64_simd_builtin_std_type): Add BFmode.
25186 (aarch64_init_simd_builtin_types): Define element types for vector
25188 (aarch64_init_bf16_types): New function.
25189 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
25190 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
25192 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
25193 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
25195 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
25196 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
25197 * config/aarch64/aarch64.c
25198 (aarch64_classify_vector_mode): Add support for BF types.
25199 (aarch64_gimplify_va_arg_expr): Add support for BF types.
25200 (aarch64_vq_mode): Add support for BF types.
25201 (aarch64_simd_container_mode): Add support for BF types.
25202 (aarch64_mangle_type): Add support for BF scalar type.
25203 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
25204 * config/aarch64/arm_bf16.h: New file.
25205 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
25206 * config/aarch64/iterators.md: Add BF types to mode attributes.
25207 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
25209 2020-01-10 Jason Merrill <jason@redhat.com>
25211 PR c++/93173 - incorrect tree sharing.
25212 * gimplify.c (copy_if_shared): No longer static.
25213 * gimplify.h: Declare it.
25215 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25217 * doc/invoke.texi (-msve-vector-bits=): Document that
25218 -msve-vector-bits=128 now generates VL-specific code for
25219 little-endian targets.
25220 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
25221 build_vector_type_for_mode to construct the data vector types.
25222 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
25223 VL-specific code for -msve-vector-bits=128 on little-endian targets.
25224 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
25225 for 128-bit vectors.
25227 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25229 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
25232 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25234 * config/aarch64/aarch64-builtins.c
25235 (aarch64_builtin_vectorized_function): Check for specific vector modes,
25236 rather than checking the number of elements and the element mode.
25238 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25240 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
25241 get_related_vectype_for_scalar_type rather than build_vector_type
25242 to create the index type for a conditional reduction.
25244 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25246 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
25247 for any type of gather or scatter, including strided accesses.
25249 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
25251 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
25254 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
25256 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
25257 get_dr_vinfo_offset
25258 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
25259 parameter and its use to reset DR_OFFSET's.
25260 (vect_transform_loop): Remove orig_drs_init argument.
25261 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
25262 member of dr_vec_info rather than the offset of the associated
25263 data_reference's innermost_loop_behavior.
25264 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
25265 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
25266 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
25267 get_dr_vinfo_offset.
25268 (vectorizable_store): Likewise.
25269 (vectorizable_load): Likewise.
25271 2020-01-10 Richard Biener <rguenther@suse.de>
25273 * gimple-ssa-store-merging
25274 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
25276 2020-01-10 Martin Liska <mliska@suse.cz>
25279 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
25280 encapsulation that was there before r280040.
25282 2020-01-10 Richard Biener <rguenther@suse.de>
25284 PR middle-end/93199
25285 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
25286 sequences to avoid walking them again for secondary opportunities.
25287 (pass_lower_eh_dispatch::execute): Instead actually insert
25290 2020-01-10 Richard Biener <rguenther@suse.de>
25292 PR middle-end/93199
25293 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
25294 (cleanup_all_empty_eh): Walk landing pads in reverse order to
25295 avoid quadraticness.
25297 2020-01-10 Martin Jambor <mjambor@suse.cz>
25299 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
25300 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
25301 to get param_ipa_sra_max_replacements.
25302 (param_splitting_across_edge): Pass the caller to
25303 pull_accesses_from_callee.
25305 2020-01-10 Martin Jambor <mjambor@suse.cz>
25307 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
25308 * ipa-cp.c (max_new_size): Removed.
25309 (orig_overall_size): New variable.
25310 (get_max_overall_size): New function.
25311 (estimate_local_effects): Use it. Adjust dump.
25312 (decide_about_value): Likewise.
25313 (ipcp_propagate_stage): Do not calculate max_new_size, just store
25314 orig_overall_size. Adjust dump.
25315 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
25317 2020-01-10 Martin Jambor <mjambor@suse.cz>
25319 * params.opt (param_ipa_max_agg_items): Mark as Optimization
25320 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
25321 instead of param_ipa_max_agg_items.
25322 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
25323 optimization info for the callee.
25325 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
25327 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
25328 markers if debug_inline_points is false.
25330 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25332 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
25334 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
25335 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
25336 aarch64-sve-builtins-sve2.h.
25337 (aarch64-sve-builtins-sve2.o): New rule.
25338 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
25339 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
25340 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
25341 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
25342 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
25343 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
25345 * config/aarch64/aarch64-sve.md: Update comments with SVE2
25346 instructions that are handled here.
25347 (@cond_asrd<mode>): Generalize to...
25348 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
25349 (*cond_asrd<mode>_2): Generalize to...
25350 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
25351 (*cond_asrd<mode>_z): Generalize to...
25352 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
25353 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
25354 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
25355 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
25356 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
25358 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
25359 (@aarch64_scatter_stnt<mode>): Likewise.
25360 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
25361 (@aarch64_mul_lane_<mode>): Likewise.
25362 (@aarch64_sve_suqadd<mode>_const): Likewise.
25363 (*<sur>h<addsub><mode>): Generalize to...
25364 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
25366 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
25367 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
25368 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
25369 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
25370 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
25371 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
25372 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
25373 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
25374 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
25375 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
25376 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
25377 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
25378 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
25379 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
25380 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
25381 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
25382 (@aarch64_sve2_xar<mode>): Likewise.
25383 (@aarch64_sve2_bcax<mode>): Likewise.
25384 (*aarch64_sve2_eor3<mode>): Rename to...
25385 (@aarch64_sve2_eor3<mode>): ...this.
25386 (@aarch64_sve2_bsl<mode>): New expander.
25387 (@aarch64_sve2_nbsl<mode>): Likewise.
25388 (@aarch64_sve2_bsl1n<mode>): Likewise.
25389 (@aarch64_sve2_bsl2n<mode>): Likewise.
25390 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
25391 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
25392 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
25393 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
25394 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
25395 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
25396 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
25397 (<su>mull<bt><Vwide>): Generalize to...
25398 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
25400 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
25401 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
25402 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
25403 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25404 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
25405 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25406 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
25407 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25408 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
25409 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25410 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
25411 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
25412 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
25413 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
25414 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
25415 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
25416 (<SHRNB:r>shrnb<mode>): Generalize to...
25417 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
25419 (<SHRNT:r>shrnt<mode>): Generalize to...
25420 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
25422 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
25423 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
25424 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
25425 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
25426 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
25427 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
25428 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
25429 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
25430 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
25431 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
25432 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
25433 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
25434 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
25435 (@aarch64_sve2_cvtnt<mode>): Likewise.
25436 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
25437 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
25438 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
25439 (@aarch64_sve2_cvtxnt<mode>): Likewise.
25440 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
25441 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
25442 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
25443 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
25444 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
25445 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
25446 (@aarch64_sve2_pmul<mode>): Likewise.
25447 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
25448 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
25449 (@aarch64_sve2_tbl2<mode>): Likewise.
25450 (@aarch64_sve2_tbx<mode>): Likewise.
25451 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
25452 (@aarch64_sve2_histcnt<mode>): Likewise.
25453 (@aarch64_sve2_histseg<mode>): Likewise.
25454 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
25455 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
25456 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
25457 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
25458 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
25459 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
25460 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
25461 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
25462 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
25463 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
25464 (SVE2_PMULL_PAIR_I): New mode iterators.
25465 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
25466 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
25467 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
25468 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
25469 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
25470 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
25471 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
25472 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
25473 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
25474 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
25475 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
25476 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
25477 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
25478 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
25479 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
25480 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
25481 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
25482 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
25483 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
25484 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
25485 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
25486 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
25487 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
25488 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
25489 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
25490 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
25491 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
25492 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
25493 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
25494 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
25495 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
25497 (VNARROW, Ventype): New mode attributes.
25498 (Vewtype): Handle VNx2DI. Fix typo in comment.
25499 (VDOUBLE): New mode attribute.
25500 (sve_lane_con): Handle VNx8HI.
25501 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
25502 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
25503 (sve_int_op, sve_int_op_rev): Handle the above codes.
25504 (sve_pred_int_rhs2_operand): Likewise.
25505 (MULLBT, SHRNB, SHRNT): Delete.
25506 (SVE_INT_SHIFT_IMM): New int iterator.
25507 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
25508 and UNSPEC_WHILEHS for TARGET_SVE2.
25509 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
25510 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
25511 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
25512 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
25513 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
25514 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
25515 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
25516 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
25517 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
25518 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
25519 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
25520 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
25521 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
25522 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
25523 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
25524 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
25525 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
25526 (optab): Handle the new unspecs.
25527 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
25529 (lr): Handle the new unspecs.
25531 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
25532 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
25533 (sve_int_qsub_op): New int attributes.
25534 (sve_fp_op, rot): Handle the new unspecs.
25535 * config/aarch64/aarch64-sve-builtins.h
25536 (function_resolver::require_matching_pointer_type): Declare.
25537 (function_resolver::resolve_unary): Add an optional boolean argument.
25538 (function_resolver::finish_opt_n_resolution): Add an optional
25539 type_suffix_index argument.
25540 (gimple_folder::redirect_call): Declare.
25541 (gimple_expander::prepare_gather_address_operands): Add an optional
25543 * config/aarch64/aarch64-sve-builtins.cc: Include
25544 aarch64-sve-builtins-sve2.h.
25545 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
25546 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
25547 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
25548 (TYPES_hsd_integer): Use TYPES_hsd_signed.
25549 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
25550 (TYPES_s_unsigned): Likewise.
25551 (TYPES_s_integer): Use TYPES_s_unsigned.
25552 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
25553 (TYPES_sd_integer): Use them.
25554 (TYPES_d_unsigned): New macro.
25555 (TYPES_d_integer): Use it.
25556 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
25557 (TYPES_cvt_narrow): Likewise.
25558 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
25559 (preds_mx): New variable.
25560 (function_builder::add_overloaded_function): Allow the new feature
25561 set to be more restrictive than the original one.
25562 (function_resolver::infer_pointer_type): Remove qualifiers from
25563 the pointer type before printing it.
25564 (function_resolver::require_matching_pointer_type): New function.
25565 (function_resolver::resolve_sv_displacement): Handle functions
25566 that don't support 32-bit vector indices or svint32_t vector offsets.
25567 (function_resolver::finish_opt_n_resolution): Take the inferred type
25568 as a separate argument.
25569 (function_resolver::resolve_unary): Optionally treat all forms in
25570 the same way as normal merging functions.
25571 (gimple_folder::redirect_call): New function.
25572 (function_expander::prepare_gather_address_operands): Add an argument
25573 that says whether scaled forms are available. If they aren't,
25574 handle scaling of vector indices and don't add the extension and
25576 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
25577 fall back to using cond_* instead.
25578 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
25579 Split out the member variables into...
25580 (rtx_code_function_base): ...this new base class.
25581 (rtx_code_function_rotated): Inherit rtx_code_function_base.
25582 (unspec_based_function): Split out the member variables into...
25583 (unspec_based_function_base): ...this new base class.
25584 (unspec_based_function_rotated): Inherit unspec_based_function_base.
25585 (unspec_based_function_exact_insn): New class.
25586 (unspec_based_add_function, unspec_based_add_lane_function)
25587 (unspec_based_lane_function, unspec_based_pred_function)
25588 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
25589 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
25590 (unspec_based_sub_function, unspec_based_sub_lane_function): New
25592 (unspec_based_fused_function): New class.
25593 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
25594 (unspec_based_fused_lane_function): New class.
25595 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
25597 (CODE_FOR_MODE1): New macro.
25598 (fixed_insn_function): New class.
25599 (while_comparison): Likewise.
25600 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
25601 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
25602 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
25603 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
25604 (load_gather_sv_restricted, shift_left_imm_long): Declare.
25605 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
25606 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
25607 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
25608 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
25609 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
25610 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
25611 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
25612 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
25613 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
25614 Also add an initial argument for unary_convert_narrowt, regardless
25615 of the predication type.
25616 (build_32_64): Allow loads and stores to specify MODE_none.
25617 (build_sv_index64, build_sv_uint_offset): New functions.
25618 (long_type_suffix): New function.
25619 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
25620 (binary_imm_long_base, load_gather_sv_base): Likewise.
25621 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
25622 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
25623 (unary_narrowb_base, unary_narrowt_base): Likewise.
25624 (binary_long_lane_def, binary_long_lane): New shape.
25625 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
25626 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
25627 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
25628 (binary_to_uint_def, binary_to_uint): Likewise.
25629 (binary_wide_def, binary_wide): Likewise.
25630 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
25631 (compare_def, compare): Likewise.
25632 (compare_ptr_def, compare_ptr): Likewise.
25633 (load_ext_gather_index_restricted_def,
25634 load_ext_gather_index_restricted): Likewise.
25635 (load_ext_gather_offset_restricted_def,
25636 load_ext_gather_offset_restricted): Likewise.
25637 (load_gather_sv_def): Inherit from load_gather_sv_base.
25638 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
25639 (shift_left_imm_def, shift_left_imm): Likewise.
25640 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
25641 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
25642 (store_scatter_index_restricted_def,
25643 store_scatter_index_restricted): Likewise.
25644 (store_scatter_offset_restricted_def,
25645 store_scatter_offset_restricted): Likewise.
25646 (tbl_tuple_def, tbl_tuple): Likewise.
25647 (ternary_long_lane_def, ternary_long_lane): Likewise.
25648 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
25649 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
25650 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
25651 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
25652 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
25653 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
25654 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
25655 (ternary_uint_def, ternary_uint): Likewise.
25656 (unary_convert): Fix typo in comment.
25657 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
25658 (unary_long_def, unary_long): Likewise.
25659 (unary_narrowb_def, unary_narrowb): Likewise.
25660 (unary_narrowt_def, unary_narrowt): Likewise.
25661 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
25662 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
25663 (unary_to_int_def, unary_to_int): Likewise.
25664 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
25665 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
25666 (svasrd_impl): Delete.
25667 (svcadd_impl::expand): Handle integer operations too.
25668 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
25669 new functions to derive the unspec numbers.
25670 (svmla_svmls_lane_impl): Replace with...
25671 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
25672 integer operations too.
25673 (svwhile_impl): Rename to...
25674 (svwhilelx_impl): ...this and inherit from while_comparison.
25675 (svasrd): Use unspec_based_function.
25676 (svmla_lane): Use svmla_lane_impl.
25677 (svmls_lane): Use svmls_lane_impl.
25678 (svrecpe, svrsqrte): Handle unsigned integer operations too.
25679 (svwhilele, svwhilelt): Use svwhilelx_impl.
25680 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
25681 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
25682 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
25683 * config/aarch64/aarch64-sve-builtins.def: Include
25684 aarch64-sve-builtins-sve2.def.
25686 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25688 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
25689 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
25690 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
25691 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
25692 immediates as well as vector ones.
25693 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
25694 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
25695 (aarch64_sve_qsub_immediate): Update calls accordingly.
25697 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25699 * config/aarch64/aarch64-sve2.md: Add banner comments.
25700 (<su>mulh<r>s<mode>3): Move further up file.
25701 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
25702 (*aarch64_sve2_sra<mode>): Move further down file.
25703 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
25705 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25707 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
25708 and UNSPEC_WHILEWR.
25709 (while_optab_cmp): Handle them.
25710 * config/aarch64/aarch64-sve.md
25711 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
25712 and add a "@" marker.
25713 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
25714 instead of gen_aarch64_sve2_while_ptest.
25715 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
25717 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25719 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
25720 (UNSPEC_WHILELE): ...this.
25721 (UNSPEC_WHILE_LO): Rename to...
25722 (UNSPEC_WHILELO): ...this.
25723 (UNSPEC_WHILE_LS): Rename to...
25724 (UNSPEC_WHILELS): ...this.
25725 (UNSPEC_WHILE_LT): Rename to...
25726 (UNSPEC_WHILELT): ...this.
25727 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
25728 (cmp_op, while_optab_cmp): Likewise.
25729 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
25730 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
25731 (svwhilelt): Likewise.
25733 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25735 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
25736 (unary_to_uint): Define.
25737 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
25738 (unary_count): Rename to...
25739 (unary_to_uint_def, unary_to_uint): ...this.
25740 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
25742 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25744 * config/aarch64/aarch64-sve-builtins-functions.h
25745 (code_for_mode_function): New class.
25746 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
25747 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
25748 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
25749 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
25750 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
25752 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25754 * config/aarch64/iterators.md (addsub): New code attribute.
25755 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
25757 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
25758 in the asm string and attributes. Fix indentation.
25759 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
25761 (@aarch64_sve_<optab><mode>): ...this.
25762 * config/aarch64/aarch64-sve-builtins.h
25763 (function_expander::expand_signed_unpred_op): Delete.
25764 * config/aarch64/aarch64-sve-builtins.cc
25765 (function_expander::expand_signed_unpred_op): Likewise.
25766 (function_expander::map_to_rtx_codes): If the optab isn't defined,
25767 try using code_for_aarch64_sve instead.
25768 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
25769 (svqsub_impl): Likewise.
25770 (svqadd, svqsub): Use rtx_code_function instead.
25772 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25774 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
25775 (HADDSUB, sur, addsub): Remove them.
25777 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25779 * tree-nrv.c (pass_return_slot::execute): Handle all internal
25780 functions the same way, rather than singling out those that
25781 aren't mapped directly to optabs.
25783 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25785 * target.def (compatible_vector_types_p): New target hook.
25786 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
25787 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
25788 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
25789 * doc/tm.texi: Regenerate.
25790 * gimple-expr.c: Include target.h.
25791 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
25792 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
25794 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
25795 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
25796 Use the original predicate if it already has a suitable type.
25798 2020-01-09 Martin Jambor <mjambor@suse.cz>
25800 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
25801 resolve_speculation and redirect_call_stmt_to_callee static. Change
25802 return type of set_call_stmt to cgraph_edge *.
25803 * auto-profile.c (afdo_indirect_call): Adjust call to
25804 redirect_call_stmt_to_callee.
25805 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
25806 make the this pointer explicit, adjust self-recursive calls and the
25807 call top make_direct. Return the resulting edge.
25808 (cgraph_edge::remove): Make this pointer explicit.
25809 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
25810 (cgraph_edge::make_direct): Likewise, adjust call to
25811 resolve_speculation.
25812 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
25813 call to set_call_stmt.
25814 (cgraph_update_edges_for_call_stmt_node): Update call to
25815 set_call_stmt and remove.
25816 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
25817 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
25818 (cgraph_node::create_edge_including_clones): Moved "first" definition
25819 of edge to the block where it was used. Adjusted calls to
25821 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
25822 cgraph_edge::remove.
25823 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
25824 make_direct and redirect_call_stmt_to_callee.
25825 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
25826 resolve_speculation and make_direct.
25827 * ipa-inline-transform.c (inline_transform): Adjust call to
25828 redirect_call_stmt_to_callee.
25829 (check_speculations_1):: Adjust call to resolve_speculation.
25830 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
25831 resolve-speculation.
25832 (inline_small_functions): Adjust call to resolve_speculation.
25833 (ipa_inline): Likewise.
25834 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
25836 * ipa-visibility.c (function_and_variable_visibility): Make iteration
25837 safe with regards to edge removal, adjust calls to
25838 redirect_call_stmt_to_callee.
25839 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
25840 and redirect_call_stmt_to_callee.
25841 * multiple_target.c (create_dispatcher_calls): Adjust call to
25842 redirect_call_stmt_to_callee
25843 (redirect_to_specific_clone): Likewise.
25844 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
25845 Adjust calls to cgraph_edge::remove.
25846 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
25847 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
25848 (expand_call_inline): Adjust call to cgraph_edge::remove.
25850 2020-01-09 Martin Liska <mliska@suse.cz>
25852 * params.opt: Set Optimization for
25853 param_max_speculative_devirt_maydefs.
25855 2020-01-09 Martin Sebor <msebor@redhat.com>
25857 PR middle-end/93200
25859 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
25861 2020-01-09 Martin Liska <mliska@suse.cz>
25863 * auto-profile.c (auto_profile): Use opt_for_fn
25865 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
25866 (propagate_vals_across_arith_jfunc): Likewise.
25867 (hint_time_bonus): Likewise.
25868 (incorporate_penalties): Likewise.
25869 (good_cloning_opportunity_p): Likewise.
25870 (perform_estimation_of_a_value): Likewise.
25871 (estimate_local_effects): Likewise.
25872 (ipcp_propagate_stage): Likewise.
25873 * ipa-fnsummary.c (decompose_param_expr): Likewise.
25874 (set_switch_stmt_execution_predicate): Likewise.
25875 (analyze_function_body): Likewise.
25876 * ipa-inline-analysis.c (offline_size): Likewise.
25877 * ipa-inline.c (early_inliner): Likewise.
25878 * ipa-prop.c (ipa_analyze_node): Likewise.
25879 (ipcp_transform_function): Likewise.
25880 * ipa-sra.c (process_scan_results): Likewise.
25881 (ipa_sra_summarize_function): Likewise.
25882 * params.opt: Rename ipcp-unit-growth to
25883 ipa-cp-unit-growth. Add Optimization for various
25884 IPA-related parameters.
25886 2020-01-09 Richard Biener <rguenther@suse.de>
25888 PR middle-end/93054
25889 * gimplify.c (gimplify_expr): Deal with NOP definitions.
25891 2020-01-09 Richard Biener <rguenther@suse.de>
25893 PR tree-optimization/93040
25894 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
25896 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
25898 * common/config/avr/avr-common.c (avr_option_optimization_table)
25899 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
25901 2020-01-09 Martin Liska <mliska@suse.cz>
25903 * cgraphclones.c (symbol_table::materialize_all_clones):
25904 Use cgraph_node::dump_name.
25906 2020-01-09 Jakub Jelinek <jakub@redhat.com>
25908 PR inline-asm/93202
25909 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
25910 output_operand_lossage instead of gcc_unreachable.
25911 * doc/md.texi (riscv f constraint): Fix typo.
25914 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
25915 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
25916 CONST_SCALAR_INT_P instead of CONST_INT_P.
25917 (*subv<mode>4_1): Rename to ...
25918 (subv<mode>4_1): ... this.
25919 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
25920 define_insn_and_split patterns.
25921 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
25924 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25926 * vec.c (class selftest::count_dtor): New class.
25927 (selftest::test_auto_delete_vec): New test.
25928 (selftest::vec_c_tests): Call it.
25929 * vec.h (class auto_delete_vec): New class template.
25930 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
25932 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25934 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
25936 2020-01-08 Jim Wilson <jimw@sifive.com>
25938 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
25939 use of TLS_MODEL_LOCAL_EXEC when not pic.
25941 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25943 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
25946 2020-01-08 Jakub Jelinek <jakub@redhat.com>
25949 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
25950 *stack_protect_set_3 peephole2): Also check that the second
25951 insns source is general_operand.
25954 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
25955 predicate for output operand instead of register_operand.
25956 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
25957 memory destination and non-memory operands[2].
25959 2020-01-08 Martin Liska <mliska@suse.cz>
25961 * cgraph.c (cgraph_node::dump): Use ::dump_name or
25962 ::dump_asm_name instead of (::name or ::asm_name).
25963 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
25964 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
25965 (analyze_functions): Likewise.
25966 (expand_all_functions): Likewise.
25967 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
25968 (propagate_bits_across_jump_function): Likewise.
25969 (dump_profile_updates): Likewise.
25970 (ipcp_store_bits_results): Likewise.
25971 (ipcp_store_vr_results): Likewise.
25972 * ipa-devirt.c (dump_targets): Likewise.
25973 * ipa-fnsummary.c (analyze_function_body): Likewise.
25974 * ipa-hsa.c (check_warn_node_versionable): Likewise.
25975 (process_hsa_functions): Likewise.
25976 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
25977 (set_alias_uids): Likewise.
25978 * ipa-inline-transform.c (save_inline_function_body): Likewise.
25979 * ipa-inline.c (recursive_inlining): Likewise.
25980 (inline_to_all_callers_1): Likewise.
25981 (ipa_inline): Likewise.
25982 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
25983 (ipa_propagate_frequency): Likewise.
25984 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
25985 (remove_described_reference): Likewise.
25986 * ipa-pure-const.c (worse_state): Likewise.
25987 (check_retval_uses): Likewise.
25988 (analyze_function): Likewise.
25989 (propagate_pure_const): Likewise.
25990 (propagate_nothrow): Likewise.
25991 (dump_malloc_lattice): Likewise.
25992 (propagate_malloc): Likewise.
25993 (pass_local_pure_const::execute): Likewise.
25994 * ipa-visibility.c (optimize_weakref): Likewise.
25995 (function_and_variable_visibility): Likewise.
25996 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
25997 (ipa_discover_variable_flags): Likewise.
25998 * lto-streamer-out.c (output_function): Likewise.
25999 (output_constructor): Likewise.
26000 * tree-inline.c (copy_bb): Likewise.
26001 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
26002 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
26004 2020-01-08 Richard Biener <rguenther@suse.de>
26006 PR middle-end/93199
26007 * tree-eh.c (sink_clobbers): Update virtual operands for
26008 the first and last stmt only. Add a dry-run capability.
26009 (pass_lower_eh_dispatch::execute): Perform clobber sinking
26010 after CFG manipulations and in RPO order to catch all
26011 secondary opportunities reliably.
26013 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
26016 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
26018 2019-01-08 Richard Biener <rguenther@suse.de>
26020 PR middle-end/93199
26021 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
26022 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
26023 virtual operand, also updating SSA use.
26024 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
26025 Update stmt after resetting virtual operand.
26026 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
26027 * gimple-iterator.c (gsi_remove): When not removing the stmt
26028 permanently do not delink immediate uses or mark the stmt modified.
26030 2020-01-08 Martin Liska <mliska@suse.cz>
26032 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
26033 (ipa_call_context::estimate_size_and_time): Likewise.
26034 (inline_analyze_function): Likewise.
26036 2020-01-08 Martin Liska <mliska@suse.cz>
26038 * cgraph.c (cgraph_node::dump): Use systematically
26041 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
26043 Add -nodevicespecs option for avr.
26046 * config/avr/avr.opt (-nodevicespecs): New driver option.
26047 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
26048 "-specs=device-specs/..." if that option is not set.
26049 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
26051 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
26053 Implement 64-bit double functions for avr.
26056 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
26057 --with-double-comparison.
26058 * doc/install.texi: Document them.
26059 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
26060 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
26061 <WITH_DOUBLE_COMPARISON>: New built-in defines.
26062 * doc/invoke.texi (AVR Built-in Macros): Document them.
26063 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
26064 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
26065 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
26067 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
26070 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
26071 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
26072 when only building rm-profile multilibs.
26074 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
26077 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
26078 lattice for a value to check.
26079 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
26080 finite propagation in self-recursive scc.
26082 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
26084 * ipa-inline.c (caller_growth_limits): Restore the AND.
26086 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
26088 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
26089 (VEC_ALLREG_ALT): New iterator.
26090 (VEC_ALLREG_INT_MODE): New iterator.
26091 (VCMP_MODE): New iterator.
26092 (VCMP_MODE_INT): New iterator.
26093 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
26094 (vec_cmp<u>v64qidi): New define_expand.
26095 (vec_cmp<mode>di_exec): Use VCMP_MODE.
26096 (vec_cmpu<mode>di_exec): New define_expand.
26097 (vec_cmp<u>v64qidi_exec): New define_expand.
26098 (vec_cmp<mode>di_dup): Use VCMP_MODE.
26099 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
26100 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
26101 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
26102 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
26103 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
26104 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
26105 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
26106 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
26107 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
26109 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
26110 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
26112 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
26114 * config/gcn/constraints.md (DA): Update description and match.
26116 (Db): New constraint.
26117 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
26119 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
26120 Implement 'Db' mixed immediate type.
26121 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
26122 (addcv64si3_dup<exec_vcc>): Delete.
26123 (subcv64si3<exec_vcc>): Rework constraints.
26124 (addv64di3): Rework constraints.
26125 (addv64di3_exec): Rework constraints.
26126 (subv64di3): Rework constraints.
26127 (addv64di3_dup): Delete.
26128 (addv64di3_dup_exec): Delete.
26129 (addv64di3_zext): Rework constraints.
26130 (addv64di3_zext_exec): Rework constraints.
26131 (addv64di3_zext_dup): Rework constraints.
26132 (addv64di3_zext_dup_exec): Rework constraints.
26133 (addv64di3_zext_dup2): Rework constraints.
26134 (addv64di3_zext_dup2_exec): Rework constraints.
26135 (addv64di3_sext_dup2): Rework constraints.
26136 (addv64di3_sext_dup2_exec): Rework constraints.
26138 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
26140 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
26141 existing target checks.
26143 2020-01-07 Richard Biener <rguenther@suse.de>
26145 * doc/install.texi: Bump minimal supported MPC version.
26147 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
26149 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
26150 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
26151 * langhooks.c: Include stor-layout.h.
26152 (lhd_simulate_enum_decl): New function.
26153 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
26154 handle_arm_sve_h for the LTO frontend.
26155 (register_vector_type): Cope with null returns from pushdecl.
26157 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
26159 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
26160 (aarch64_sve::nvectors_if_data_type): Replace with...
26161 (aarch64_sve::builtin_type_p): ...this.
26162 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
26163 (find_vector_type): Delete.
26164 (add_sve_type_attribute): New function.
26165 (lookup_sve_type_attribute): Likewise.
26166 (register_builtin_types): Add an "SVE type" attribute to each type.
26167 (register_tuple_type): Likewise.
26168 (svbool_type_p, nvectors_if_data_type): Delete.
26169 (mangle_builtin_type): Use lookup_sve_type_attribute.
26170 (builtin_type_p): Likewise. Add an overload that returns the
26171 number of constituent vector and predicate registers.
26172 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
26173 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
26174 instead of aarch64_sve_argument_p.
26175 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
26176 (aarch64_pass_by_reference): Likewise.
26177 (aarch64_function_value_1): Likewise.
26178 (aarch64_return_in_memory): Likewise.
26179 (aarch64_layout_arg): Likewise.
26181 2020-01-07 Jakub Jelinek <jakub@redhat.com>
26183 PR tree-optimization/93156
26184 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
26185 least significant bit is always clear.
26187 PR tree-optimization/93118
26188 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
26189 simplifier with two intermediate conversions.
26191 2020-01-07 Martin Liska <mliska@suse.cz>
26193 * params.opt: Add Optimization for various parameters.
26195 2020-01-07 Martin Liska <mliska@suse.cz>
26198 * doc/extend.texi: Explain cloning for target_clone
26201 2020-01-07 Martin Liska <mliska@suse.cz>
26203 PR tree-optimization/92860
26204 * common.opt: Make in Optimization option
26205 as it is affected by -O0, which is an Optimization
26207 * tree-inline.c (tree_inlinable_function_p):
26208 Use opt_for_fn for warn_inline.
26209 (expand_call_inline): Likewise.
26211 2020-01-07 Martin Liska <mliska@suse.cz>
26213 PR tree-optimization/92860
26214 * common.opt: Make flag_ree as optimization
26217 2020-01-07 Martin Liska <mliska@suse.cz>
26219 PR optimization/92860
26220 * params.opt: Mark param_min_crossjump_insns with Optimization
26223 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
26225 * ipa-inline-analysis.c (estimate_growth): Fix typo.
26226 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
26228 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
26230 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
26231 helper function to return the valid addressing formats for a given
26232 hard register and mode.
26233 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
26235 * config/rs6000/constraints.md (Q constraint): Update
26237 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
26240 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
26241 Use 'Q' for doing vector extract from memory.
26242 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
26244 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
26245 doing vector extract from memory.
26246 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
26247 extract from memory.
26249 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
26250 for the offset being 34-bits when -mcpu=future is used.
26252 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
26254 * config/pa/pa.md: Revert change to use ordered_comparison_operator
26255 instead of cmpib_comparison_operator in cmpib patterns.
26256 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
26257 of cmpib_comparison_operator. Revise comment.
26259 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26261 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
26262 in an IFN_DIV_POW2 node to be equal.
26264 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26266 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
26267 (vect_check_scalar_mask): ...this.
26268 (vectorizable_store, vectorizable_load): Update call accordingly.
26269 (vectorizable_call): Use vect_check_scalar_mask to check the mask
26270 argument in calls to conditional internal functions.
26272 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
26274 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
26275 '0' matching inputs.
26276 (subv64di3_exec): Likewise.
26278 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
26280 * config/mips/mips.c (vr4130_align_insns): Fix typo.
26281 * doc/md.texi (movstr): Likewise.
26283 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
26285 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
26288 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26290 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
26292 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
26293 to a temporary file and use move-if-change to update the real
26294 file where necessary.
26296 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26298 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
26299 rather than Upa for CPY /M.
26301 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
26303 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
26306 2020-01-06 Martin Liska <mliska@suse.cz>
26308 PR tree-optimization/92860
26309 * params.opt: Mark param_max_combine_insns with Optimization
26312 2020-01-05 Jakub Jelinek <jakub@redhat.com>
26315 * config/i386/i386.md (SWIDWI): New mode iterator.
26316 (DWI, dwi): Add TImode variants.
26317 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
26318 <general_hilo_operand> instead of <general_operand>. Use
26319 CONST_SCALAR_INT_P instead of CONST_INT_P.
26320 (*addv<mode>4_1): Rename to ...
26321 (addv<mode>4_1): ... this.
26322 (QWI): New mode attribute.
26323 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
26324 define_insn_and_split patterns.
26325 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
26327 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
26328 <general_hilo_operand> instead of <general_operand>.
26329 (*addcarry<mode>_1): New define_insn.
26330 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
26332 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
26334 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
26335 Use "call" instead of "set".
26337 2020-01-03 Martin Jambor <mjambor@suse.cz>
26340 * ipa-cp.c (print_all_lattices): Skip functions without info.
26342 2020-01-03 Jakub Jelinek <jakub@redhat.com>
26345 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
26346 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
26347 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
26348 for 'e' simd clones.
26351 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
26353 (mprefer-vector-width=): Add Save.
26354 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
26355 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
26356 (ix86_debug_options, ix86_function_specific_print): Adjust
26357 ix86_target_string callers.
26358 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
26359 (ix86_valid_target_attribute_tree): Likewise.
26360 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
26361 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
26362 ix86_target_string caller.
26365 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
26366 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
26367 instead of gen_int_shift_amount + convert_modes.
26369 PR rtl-optimization/93088
26370 * loop-iv.c (find_single_def_src): Punt after looking through
26371 128 reg copies for regs with single definitions. Move definitions
26374 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
26376 * config/arm/arm-c.c (arm_cpu_builtins): Define
26377 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
26378 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
26379 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
26380 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
26381 * config/arm/arm-tables.opt: Regenerated.
26382 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
26383 arm_arch_i8mm and arm_arch_bf16 when enabled.
26384 * config/arm/arm.h (TARGET_I8MM): New macro.
26385 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
26386 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
26387 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
26388 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
26389 (v8_6_a_simd_variants): New.
26390 (v8_*_a_simd_variants): Add i8mm and bf16.
26391 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
26393 2020-01-02 Jakub Jelinek <jakub@redhat.com>
26396 * predict.c (compute_function_frequency): Don't call
26397 warn_function_cold on functions that already have cold attribute.
26399 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
26402 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
26403 COMDAT group function labels in .data.rel.ro.local section.
26404 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
26407 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
26408 comparison_operator in B and S integer comparisons. Likewise, use
26409 ordered_comparison_operator instead of cmpib_comparison_operator in
26411 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
26413 2020-01-01 Jakub Jelinek <jakub@redhat.com>
26415 Update copyright years.
26417 * gcc.c (process_command): Update copyright notice dates.
26418 * gcov-dump.c (print_version): Ditto.
26419 * gcov.c (print_version): Ditto.
26420 * gcov-tool.c (print_version): Ditto.
26421 * gengtype.c (create_file): Ditto.
26422 * doc/cpp.texi: Bump @copying's copyright year.
26423 * doc/cppinternals.texi: Ditto.
26424 * doc/gcc.texi: Ditto.
26425 * doc/gccint.texi: Ditto.
26426 * doc/gcov.texi: Ditto.
26427 * doc/install.texi: Ditto.
26428 * doc/invoke.texi: Ditto.
26430 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
26432 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
26435 2020-01-01 Jakub Jelinek <jakub@redhat.com>
26437 PR tree-optimization/93098
26438 * match.pd (popcount): For shift amounts, use integer_onep
26439 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
26440 tests. Make sure that precision is power of two larger than or equal
26441 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
26442 instead of ULL suffixed constants. Formatting fixes.
26444 Copyright (C) 2020 Free Software Foundation, Inc.
26446 Copying and distribution of this file, with or without modification,
26447 are permitted in any medium without royalty provided the copyright
26448 notice and this notice are preserved.